1*acda3618SManivannan Sadhasivam /* SPDX-License-Identifier: GPL-2.0 */ 2*acda3618SManivannan Sadhasivam /* 3*acda3618SManivannan Sadhasivam * Qualcomm SDX55 interconnect IDs 4*acda3618SManivannan Sadhasivam * 5*acda3618SManivannan Sadhasivam * Copyright (c) 2021, Linaro Ltd. 6*acda3618SManivannan Sadhasivam * Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> 7*acda3618SManivannan Sadhasivam */ 8*acda3618SManivannan Sadhasivam 9*acda3618SManivannan Sadhasivam #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_SDX55_H 10*acda3618SManivannan Sadhasivam #define __DT_BINDINGS_INTERCONNECT_QCOM_SDX55_H 11*acda3618SManivannan Sadhasivam 12*acda3618SManivannan Sadhasivam #define MASTER_LLCC 0 13*acda3618SManivannan Sadhasivam #define SLAVE_EBI_CH0 1 14*acda3618SManivannan Sadhasivam 15*acda3618SManivannan Sadhasivam #define MASTER_TCU_0 0 16*acda3618SManivannan Sadhasivam #define MASTER_SNOC_GC_MEM_NOC 1 17*acda3618SManivannan Sadhasivam #define MASTER_AMPSS_M0 2 18*acda3618SManivannan Sadhasivam #define SLAVE_LLCC 3 19*acda3618SManivannan Sadhasivam #define SLAVE_MEM_NOC_SNOC 4 20*acda3618SManivannan Sadhasivam #define SLAVE_MEM_NOC_PCIE_SNOC 5 21*acda3618SManivannan Sadhasivam 22*acda3618SManivannan Sadhasivam #define MASTER_AUDIO 0 23*acda3618SManivannan Sadhasivam #define MASTER_BLSP_1 1 24*acda3618SManivannan Sadhasivam #define MASTER_QDSS_BAM 2 25*acda3618SManivannan Sadhasivam #define MASTER_QPIC 3 26*acda3618SManivannan Sadhasivam #define MASTER_SNOC_CFG 4 27*acda3618SManivannan Sadhasivam #define MASTER_SPMI_FETCHER 5 28*acda3618SManivannan Sadhasivam #define MASTER_ANOC_SNOC 6 29*acda3618SManivannan Sadhasivam #define MASTER_IPA 7 30*acda3618SManivannan Sadhasivam #define MASTER_MEM_NOC_SNOC 8 31*acda3618SManivannan Sadhasivam #define MASTER_MEM_NOC_PCIE_SNOC 9 32*acda3618SManivannan Sadhasivam #define MASTER_CRYPTO_CORE_0 10 33*acda3618SManivannan Sadhasivam #define MASTER_EMAC 11 34*acda3618SManivannan Sadhasivam #define MASTER_IPA_PCIE 12 35*acda3618SManivannan Sadhasivam #define MASTER_PCIE 13 36*acda3618SManivannan Sadhasivam #define MASTER_QDSS_ETR 14 37*acda3618SManivannan Sadhasivam #define MASTER_SDCC_1 15 38*acda3618SManivannan Sadhasivam #define MASTER_USB3 16 39*acda3618SManivannan Sadhasivam #define SLAVE_AOP 17 40*acda3618SManivannan Sadhasivam #define SLAVE_AOSS 18 41*acda3618SManivannan Sadhasivam #define SLAVE_APPSS 19 42*acda3618SManivannan Sadhasivam #define SLAVE_AUDIO 20 43*acda3618SManivannan Sadhasivam #define SLAVE_BLSP_1 21 44*acda3618SManivannan Sadhasivam #define SLAVE_CLK_CTL 22 45*acda3618SManivannan Sadhasivam #define SLAVE_CRYPTO_0_CFG 23 46*acda3618SManivannan Sadhasivam #define SLAVE_CNOC_DDRSS 24 47*acda3618SManivannan Sadhasivam #define SLAVE_ECC_CFG 25 48*acda3618SManivannan Sadhasivam #define SLAVE_EMAC_CFG 26 49*acda3618SManivannan Sadhasivam #define SLAVE_IMEM_CFG 27 50*acda3618SManivannan Sadhasivam #define SLAVE_IPA_CFG 28 51*acda3618SManivannan Sadhasivam #define SLAVE_CNOC_MSS 29 52*acda3618SManivannan Sadhasivam #define SLAVE_PCIE_PARF 30 53*acda3618SManivannan Sadhasivam #define SLAVE_PDM 31 54*acda3618SManivannan Sadhasivam #define SLAVE_PRNG 32 55*acda3618SManivannan Sadhasivam #define SLAVE_QDSS_CFG 33 56*acda3618SManivannan Sadhasivam #define SLAVE_QPIC 34 57*acda3618SManivannan Sadhasivam #define SLAVE_SDCC_1 35 58*acda3618SManivannan Sadhasivam #define SLAVE_SNOC_CFG 36 59*acda3618SManivannan Sadhasivam #define SLAVE_SPMI_FETCHER 37 60*acda3618SManivannan Sadhasivam #define SLAVE_SPMI_VGI_COEX 38 61*acda3618SManivannan Sadhasivam #define SLAVE_TCSR 39 62*acda3618SManivannan Sadhasivam #define SLAVE_TLMM 40 63*acda3618SManivannan Sadhasivam #define SLAVE_USB3 41 64*acda3618SManivannan Sadhasivam #define SLAVE_USB3_PHY_CFG 42 65*acda3618SManivannan Sadhasivam #define SLAVE_ANOC_SNOC 43 66*acda3618SManivannan Sadhasivam #define SLAVE_SNOC_MEM_NOC_GC 44 67*acda3618SManivannan Sadhasivam #define SLAVE_OCIMEM 45 68*acda3618SManivannan Sadhasivam #define SLAVE_SERVICE_SNOC 46 69*acda3618SManivannan Sadhasivam #define SLAVE_PCIE_0 47 70*acda3618SManivannan Sadhasivam #define SLAVE_QDSS_STM 48 71*acda3618SManivannan Sadhasivam #define SLAVE_TCU 49 72*acda3618SManivannan Sadhasivam 73*acda3618SManivannan Sadhasivam 74*acda3618SManivannan Sadhasivam #endif 75