xref: /openbmc/linux/include/dt-bindings/interconnect/qcom,msm8974.h (revision c95baf12f5077419db01313ab61c2aac007d40cd)
1*6120e5d8SBrian Masney /* SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) */
2*6120e5d8SBrian Masney /*
3*6120e5d8SBrian Masney  * Qualcomm msm8974 interconnect IDs
4*6120e5d8SBrian Masney  *
5*6120e5d8SBrian Masney  * Copyright (c) 2019 Brian Masney <masneyb@onstation.org>
6*6120e5d8SBrian Masney  */
7*6120e5d8SBrian Masney 
8*6120e5d8SBrian Masney #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_MSM8974_H
9*6120e5d8SBrian Masney #define __DT_BINDINGS_INTERCONNECT_QCOM_MSM8974_H
10*6120e5d8SBrian Masney 
11*6120e5d8SBrian Masney #define BIMC_MAS_AMPSS_M0		0
12*6120e5d8SBrian Masney #define BIMC_MAS_AMPSS_M1		1
13*6120e5d8SBrian Masney #define BIMC_MAS_MSS_PROC		2
14*6120e5d8SBrian Masney #define BIMC_TO_MNOC			3
15*6120e5d8SBrian Masney #define BIMC_TO_SNOC			4
16*6120e5d8SBrian Masney #define BIMC_SLV_EBI_CH0		5
17*6120e5d8SBrian Masney #define BIMC_SLV_AMPSS_L2		6
18*6120e5d8SBrian Masney 
19*6120e5d8SBrian Masney #define CNOC_MAS_RPM_INST		0
20*6120e5d8SBrian Masney #define CNOC_MAS_RPM_DATA		1
21*6120e5d8SBrian Masney #define CNOC_MAS_RPM_SYS		2
22*6120e5d8SBrian Masney #define CNOC_MAS_DEHR			3
23*6120e5d8SBrian Masney #define CNOC_MAS_QDSS_DAP		4
24*6120e5d8SBrian Masney #define CNOC_MAS_SPDM			5
25*6120e5d8SBrian Masney #define CNOC_MAS_TIC			6
26*6120e5d8SBrian Masney #define CNOC_SLV_CLK_CTL		7
27*6120e5d8SBrian Masney #define CNOC_SLV_CNOC_MSS		8
28*6120e5d8SBrian Masney #define CNOC_SLV_SECURITY		9
29*6120e5d8SBrian Masney #define CNOC_SLV_TCSR			10
30*6120e5d8SBrian Masney #define CNOC_SLV_TLMM			11
31*6120e5d8SBrian Masney #define CNOC_SLV_CRYPTO_0_CFG		12
32*6120e5d8SBrian Masney #define CNOC_SLV_CRYPTO_1_CFG		13
33*6120e5d8SBrian Masney #define CNOC_SLV_IMEM_CFG		14
34*6120e5d8SBrian Masney #define CNOC_SLV_MESSAGE_RAM		15
35*6120e5d8SBrian Masney #define CNOC_SLV_BIMC_CFG		16
36*6120e5d8SBrian Masney #define CNOC_SLV_BOOT_ROM		17
37*6120e5d8SBrian Masney #define CNOC_SLV_PMIC_ARB		18
38*6120e5d8SBrian Masney #define CNOC_SLV_SPDM_WRAPPER		19
39*6120e5d8SBrian Masney #define CNOC_SLV_DEHR_CFG		20
40*6120e5d8SBrian Masney #define CNOC_SLV_MPM			21
41*6120e5d8SBrian Masney #define CNOC_SLV_QDSS_CFG		22
42*6120e5d8SBrian Masney #define CNOC_SLV_RBCPR_CFG		23
43*6120e5d8SBrian Masney #define CNOC_SLV_RBCPR_QDSS_APU_CFG	24
44*6120e5d8SBrian Masney #define CNOC_TO_SNOC			25
45*6120e5d8SBrian Masney #define CNOC_SLV_CNOC_ONOC_CFG		26
46*6120e5d8SBrian Masney #define CNOC_SLV_CNOC_MNOC_MMSS_CFG	27
47*6120e5d8SBrian Masney #define CNOC_SLV_CNOC_MNOC_CFG		28
48*6120e5d8SBrian Masney #define CNOC_SLV_PNOC_CFG		29
49*6120e5d8SBrian Masney #define CNOC_SLV_SNOC_MPU_CFG		30
50*6120e5d8SBrian Masney #define CNOC_SLV_SNOC_CFG		31
51*6120e5d8SBrian Masney #define CNOC_SLV_EBI1_DLL_CFG		32
52*6120e5d8SBrian Masney #define CNOC_SLV_PHY_APU_CFG		33
53*6120e5d8SBrian Masney #define CNOC_SLV_EBI1_PHY_CFG		34
54*6120e5d8SBrian Masney #define CNOC_SLV_RPM			35
55*6120e5d8SBrian Masney #define CNOC_SLV_SERVICE_CNOC		36
56*6120e5d8SBrian Masney 
57*6120e5d8SBrian Masney #define MNOC_MAS_GRAPHICS_3D		0
58*6120e5d8SBrian Masney #define MNOC_MAS_JPEG			1
59*6120e5d8SBrian Masney #define MNOC_MAS_MDP_PORT0		2
60*6120e5d8SBrian Masney #define MNOC_MAS_VIDEO_P0		3
61*6120e5d8SBrian Masney #define MNOC_MAS_VIDEO_P1		4
62*6120e5d8SBrian Masney #define MNOC_MAS_VFE			5
63*6120e5d8SBrian Masney #define MNOC_TO_CNOC			6
64*6120e5d8SBrian Masney #define MNOC_TO_BIMC			7
65*6120e5d8SBrian Masney #define MNOC_SLV_CAMERA_CFG		8
66*6120e5d8SBrian Masney #define MNOC_SLV_DISPLAY_CFG		9
67*6120e5d8SBrian Masney #define MNOC_SLV_OCMEM_CFG		10
68*6120e5d8SBrian Masney #define MNOC_SLV_CPR_CFG		11
69*6120e5d8SBrian Masney #define MNOC_SLV_CPR_XPU_CFG		12
70*6120e5d8SBrian Masney #define MNOC_SLV_MISC_CFG		13
71*6120e5d8SBrian Masney #define MNOC_SLV_MISC_XPU_CFG		14
72*6120e5d8SBrian Masney #define MNOC_SLV_VENUS_CFG		15
73*6120e5d8SBrian Masney #define MNOC_SLV_GRAPHICS_3D_CFG	16
74*6120e5d8SBrian Masney #define MNOC_SLV_MMSS_CLK_CFG		17
75*6120e5d8SBrian Masney #define MNOC_SLV_MMSS_CLK_XPU_CFG	18
76*6120e5d8SBrian Masney #define MNOC_SLV_MNOC_MPU_CFG		19
77*6120e5d8SBrian Masney #define MNOC_SLV_ONOC_MPU_CFG		20
78*6120e5d8SBrian Masney #define MNOC_SLV_SERVICE_MNOC		21
79*6120e5d8SBrian Masney 
80*6120e5d8SBrian Masney #define OCMEM_NOC_TO_OCMEM_VNOC		0
81*6120e5d8SBrian Masney #define OCMEM_MAS_JPEG_OCMEM		1
82*6120e5d8SBrian Masney #define OCMEM_MAS_MDP_OCMEM		2
83*6120e5d8SBrian Masney #define OCMEM_MAS_VIDEO_P0_OCMEM	3
84*6120e5d8SBrian Masney #define OCMEM_MAS_VIDEO_P1_OCMEM	4
85*6120e5d8SBrian Masney #define OCMEM_MAS_VFE_OCMEM		5
86*6120e5d8SBrian Masney #define OCMEM_MAS_CNOC_ONOC_CFG		6
87*6120e5d8SBrian Masney #define OCMEM_SLV_SERVICE_ONOC		7
88*6120e5d8SBrian Masney #define OCMEM_VNOC_TO_SNOC		8
89*6120e5d8SBrian Masney #define OCMEM_VNOC_TO_OCMEM_NOC		9
90*6120e5d8SBrian Masney #define OCMEM_VNOC_MAS_GFX3D		10
91*6120e5d8SBrian Masney #define OCMEM_SLV_OCMEM			11
92*6120e5d8SBrian Masney 
93*6120e5d8SBrian Masney #define PNOC_MAS_PNOC_CFG		0
94*6120e5d8SBrian Masney #define PNOC_MAS_SDCC_1			1
95*6120e5d8SBrian Masney #define PNOC_MAS_SDCC_3			2
96*6120e5d8SBrian Masney #define PNOC_MAS_SDCC_4			3
97*6120e5d8SBrian Masney #define PNOC_MAS_SDCC_2			4
98*6120e5d8SBrian Masney #define PNOC_MAS_TSIF			5
99*6120e5d8SBrian Masney #define PNOC_MAS_BAM_DMA		6
100*6120e5d8SBrian Masney #define PNOC_MAS_BLSP_2			7
101*6120e5d8SBrian Masney #define PNOC_MAS_USB_HSIC		8
102*6120e5d8SBrian Masney #define PNOC_MAS_BLSP_1			9
103*6120e5d8SBrian Masney #define PNOC_MAS_USB_HS			10
104*6120e5d8SBrian Masney #define PNOC_TO_SNOC			11
105*6120e5d8SBrian Masney #define PNOC_SLV_SDCC_1			12
106*6120e5d8SBrian Masney #define PNOC_SLV_SDCC_3			13
107*6120e5d8SBrian Masney #define PNOC_SLV_SDCC_2			14
108*6120e5d8SBrian Masney #define PNOC_SLV_SDCC_4			15
109*6120e5d8SBrian Masney #define PNOC_SLV_TSIF			16
110*6120e5d8SBrian Masney #define PNOC_SLV_BAM_DMA		17
111*6120e5d8SBrian Masney #define PNOC_SLV_BLSP_2			18
112*6120e5d8SBrian Masney #define PNOC_SLV_USB_HSIC		19
113*6120e5d8SBrian Masney #define PNOC_SLV_BLSP_1			20
114*6120e5d8SBrian Masney #define PNOC_SLV_USB_HS			21
115*6120e5d8SBrian Masney #define PNOC_SLV_PDM			22
116*6120e5d8SBrian Masney #define PNOC_SLV_PERIPH_APU_CFG		23
117*6120e5d8SBrian Masney #define PNOC_SLV_PNOC_MPU_CFG		24
118*6120e5d8SBrian Masney #define PNOC_SLV_PRNG			25
119*6120e5d8SBrian Masney #define PNOC_SLV_SERVICE_PNOC		26
120*6120e5d8SBrian Masney 
121*6120e5d8SBrian Masney #define SNOC_MAS_LPASS_AHB		0
122*6120e5d8SBrian Masney #define SNOC_MAS_QDSS_BAM		1
123*6120e5d8SBrian Masney #define SNOC_MAS_SNOC_CFG		2
124*6120e5d8SBrian Masney #define SNOC_TO_BIMC			3
125*6120e5d8SBrian Masney #define SNOC_TO_CNOC			4
126*6120e5d8SBrian Masney #define SNOC_TO_PNOC			5
127*6120e5d8SBrian Masney #define SNOC_TO_OCMEM_VNOC		6
128*6120e5d8SBrian Masney #define SNOC_MAS_CRYPTO_CORE0		7
129*6120e5d8SBrian Masney #define SNOC_MAS_CRYPTO_CORE1		8
130*6120e5d8SBrian Masney #define SNOC_MAS_LPASS_PROC		9
131*6120e5d8SBrian Masney #define SNOC_MAS_MSS			10
132*6120e5d8SBrian Masney #define SNOC_MAS_MSS_NAV		11
133*6120e5d8SBrian Masney #define SNOC_MAS_OCMEM_DMA		12
134*6120e5d8SBrian Masney #define SNOC_MAS_WCSS			13
135*6120e5d8SBrian Masney #define SNOC_MAS_QDSS_ETR		14
136*6120e5d8SBrian Masney #define SNOC_MAS_USB3			15
137*6120e5d8SBrian Masney #define SNOC_SLV_AMPSS			16
138*6120e5d8SBrian Masney #define SNOC_SLV_LPASS			17
139*6120e5d8SBrian Masney #define SNOC_SLV_USB3			18
140*6120e5d8SBrian Masney #define SNOC_SLV_WCSS			19
141*6120e5d8SBrian Masney #define SNOC_SLV_OCIMEM			20
142*6120e5d8SBrian Masney #define SNOC_SLV_SNOC_OCMEM		21
143*6120e5d8SBrian Masney #define SNOC_SLV_SERVICE_SNOC		22
144*6120e5d8SBrian Masney #define SNOC_SLV_QDSS_STM		23
145*6120e5d8SBrian Masney 
146*6120e5d8SBrian Masney #endif
147