xref: /openbmc/linux/include/dt-bindings/iio/qcom,spmi-vadc.h (revision d3ba5586facfc038110333b5ce17f8bfccbcaddf)
1*d3ba5586SStanimir Varbanov /*
2*d3ba5586SStanimir Varbanov  * Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
3*d3ba5586SStanimir Varbanov  *
4*d3ba5586SStanimir Varbanov  * This program is free software; you can redistribute it and/or modify
5*d3ba5586SStanimir Varbanov  * it under the terms of the GNU General Public License version 2 and
6*d3ba5586SStanimir Varbanov  * only version 2 as published by the Free Software Foundation.
7*d3ba5586SStanimir Varbanov  *
8*d3ba5586SStanimir Varbanov  * This program is distributed in the hope that it will be useful
9*d3ba5586SStanimir Varbanov  * but WITHOUT ANY WARRANTY; without even the implied warranty of
10*d3ba5586SStanimir Varbanov  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
11*d3ba5586SStanimir Varbanov  * GNU General Public License for more details.
12*d3ba5586SStanimir Varbanov  */
13*d3ba5586SStanimir Varbanov 
14*d3ba5586SStanimir Varbanov #ifndef _DT_BINDINGS_QCOM_SPMI_VADC_H
15*d3ba5586SStanimir Varbanov #define _DT_BINDINGS_QCOM_SPMI_VADC_H
16*d3ba5586SStanimir Varbanov 
17*d3ba5586SStanimir Varbanov /* Voltage ADC channels */
18*d3ba5586SStanimir Varbanov #define VADC_USBIN				0x00
19*d3ba5586SStanimir Varbanov #define VADC_DCIN				0x01
20*d3ba5586SStanimir Varbanov #define VADC_VCHG_SNS				0x02
21*d3ba5586SStanimir Varbanov #define VADC_SPARE1_03				0x03
22*d3ba5586SStanimir Varbanov #define VADC_USB_ID_MV				0x04
23*d3ba5586SStanimir Varbanov #define VADC_VCOIN				0x05
24*d3ba5586SStanimir Varbanov #define VADC_VBAT_SNS				0x06
25*d3ba5586SStanimir Varbanov #define VADC_VSYS				0x07
26*d3ba5586SStanimir Varbanov #define VADC_DIE_TEMP				0x08
27*d3ba5586SStanimir Varbanov #define VADC_REF_625MV				0x09
28*d3ba5586SStanimir Varbanov #define VADC_REF_1250MV				0x0a
29*d3ba5586SStanimir Varbanov #define VADC_CHG_TEMP				0x0b
30*d3ba5586SStanimir Varbanov #define VADC_SPARE1				0x0c
31*d3ba5586SStanimir Varbanov #define VADC_SPARE2				0x0d
32*d3ba5586SStanimir Varbanov #define VADC_GND_REF				0x0e
33*d3ba5586SStanimir Varbanov #define VADC_VDD_VADC				0x0f
34*d3ba5586SStanimir Varbanov 
35*d3ba5586SStanimir Varbanov #define VADC_P_MUX1_1_1				0x10
36*d3ba5586SStanimir Varbanov #define VADC_P_MUX2_1_1				0x11
37*d3ba5586SStanimir Varbanov #define VADC_P_MUX3_1_1				0x12
38*d3ba5586SStanimir Varbanov #define VADC_P_MUX4_1_1				0x13
39*d3ba5586SStanimir Varbanov #define VADC_P_MUX5_1_1				0x14
40*d3ba5586SStanimir Varbanov #define VADC_P_MUX6_1_1				0x15
41*d3ba5586SStanimir Varbanov #define VADC_P_MUX7_1_1				0x16
42*d3ba5586SStanimir Varbanov #define VADC_P_MUX8_1_1				0x17
43*d3ba5586SStanimir Varbanov #define VADC_P_MUX9_1_1				0x18
44*d3ba5586SStanimir Varbanov #define VADC_P_MUX10_1_1			0x19
45*d3ba5586SStanimir Varbanov #define VADC_P_MUX11_1_1			0x1a
46*d3ba5586SStanimir Varbanov #define VADC_P_MUX12_1_1			0x1b
47*d3ba5586SStanimir Varbanov #define VADC_P_MUX13_1_1			0x1c
48*d3ba5586SStanimir Varbanov #define VADC_P_MUX14_1_1			0x1d
49*d3ba5586SStanimir Varbanov #define VADC_P_MUX15_1_1			0x1e
50*d3ba5586SStanimir Varbanov #define VADC_P_MUX16_1_1			0x1f
51*d3ba5586SStanimir Varbanov 
52*d3ba5586SStanimir Varbanov #define VADC_P_MUX1_1_3				0x20
53*d3ba5586SStanimir Varbanov #define VADC_P_MUX2_1_3				0x21
54*d3ba5586SStanimir Varbanov #define VADC_P_MUX3_1_3				0x22
55*d3ba5586SStanimir Varbanov #define VADC_P_MUX4_1_3				0x23
56*d3ba5586SStanimir Varbanov #define VADC_P_MUX5_1_3				0x24
57*d3ba5586SStanimir Varbanov #define VADC_P_MUX6_1_3				0x25
58*d3ba5586SStanimir Varbanov #define VADC_P_MUX7_1_3				0x26
59*d3ba5586SStanimir Varbanov #define VADC_P_MUX8_1_3				0x27
60*d3ba5586SStanimir Varbanov #define VADC_P_MUX9_1_3				0x28
61*d3ba5586SStanimir Varbanov #define VADC_P_MUX10_1_3			0x29
62*d3ba5586SStanimir Varbanov #define VADC_P_MUX11_1_3			0x2a
63*d3ba5586SStanimir Varbanov #define VADC_P_MUX12_1_3			0x2b
64*d3ba5586SStanimir Varbanov #define VADC_P_MUX13_1_3			0x2c
65*d3ba5586SStanimir Varbanov #define VADC_P_MUX14_1_3			0x2d
66*d3ba5586SStanimir Varbanov #define VADC_P_MUX15_1_3			0x2e
67*d3ba5586SStanimir Varbanov #define VADC_P_MUX16_1_3			0x2f
68*d3ba5586SStanimir Varbanov 
69*d3ba5586SStanimir Varbanov #define VADC_LR_MUX1_BAT_THERM			0x30
70*d3ba5586SStanimir Varbanov #define VADC_LR_MUX2_BAT_ID			0x31
71*d3ba5586SStanimir Varbanov #define VADC_LR_MUX3_XO_THERM			0x32
72*d3ba5586SStanimir Varbanov #define VADC_LR_MUX4_AMUX_THM1			0x33
73*d3ba5586SStanimir Varbanov #define VADC_LR_MUX5_AMUX_THM2			0x34
74*d3ba5586SStanimir Varbanov #define VADC_LR_MUX6_AMUX_THM3			0x35
75*d3ba5586SStanimir Varbanov #define VADC_LR_MUX7_HW_ID			0x36
76*d3ba5586SStanimir Varbanov #define VADC_LR_MUX8_AMUX_THM4			0x37
77*d3ba5586SStanimir Varbanov #define VADC_LR_MUX9_AMUX_THM5			0x38
78*d3ba5586SStanimir Varbanov #define VADC_LR_MUX10_USB_ID			0x39
79*d3ba5586SStanimir Varbanov #define VADC_AMUX_PU1				0x3a
80*d3ba5586SStanimir Varbanov #define VADC_AMUX_PU2				0x3b
81*d3ba5586SStanimir Varbanov #define VADC_LR_MUX3_BUF_XO_THERM		0x3c
82*d3ba5586SStanimir Varbanov 
83*d3ba5586SStanimir Varbanov #define VADC_LR_MUX1_PU1_BAT_THERM		0x70
84*d3ba5586SStanimir Varbanov #define VADC_LR_MUX2_PU1_BAT_ID			0x71
85*d3ba5586SStanimir Varbanov #define VADC_LR_MUX3_PU1_XO_THERM		0x72
86*d3ba5586SStanimir Varbanov #define VADC_LR_MUX4_PU1_AMUX_THM1		0x73
87*d3ba5586SStanimir Varbanov #define VADC_LR_MUX5_PU1_AMUX_THM2		0x74
88*d3ba5586SStanimir Varbanov #define VADC_LR_MUX6_PU1_AMUX_THM3		0x75
89*d3ba5586SStanimir Varbanov #define VADC_LR_MUX7_PU1_AMUX_HW_ID		0x76
90*d3ba5586SStanimir Varbanov #define VADC_LR_MUX8_PU1_AMUX_THM4		0x77
91*d3ba5586SStanimir Varbanov #define VADC_LR_MUX9_PU1_AMUX_THM5		0x78
92*d3ba5586SStanimir Varbanov #define VADC_LR_MUX10_PU1_AMUX_USB_ID		0x79
93*d3ba5586SStanimir Varbanov #define VADC_LR_MUX3_BUF_PU1_XO_THERM		0x7c
94*d3ba5586SStanimir Varbanov 
95*d3ba5586SStanimir Varbanov #define VADC_LR_MUX1_PU2_BAT_THERM		0xb0
96*d3ba5586SStanimir Varbanov #define VADC_LR_MUX2_PU2_BAT_ID			0xb1
97*d3ba5586SStanimir Varbanov #define VADC_LR_MUX3_PU2_XO_THERM		0xb2
98*d3ba5586SStanimir Varbanov #define VADC_LR_MUX4_PU2_AMUX_THM1		0xb3
99*d3ba5586SStanimir Varbanov #define VADC_LR_MUX5_PU2_AMUX_THM2		0xb4
100*d3ba5586SStanimir Varbanov #define VADC_LR_MUX6_PU2_AMUX_THM3		0xb5
101*d3ba5586SStanimir Varbanov #define VADC_LR_MUX7_PU2_AMUX_HW_ID		0xb6
102*d3ba5586SStanimir Varbanov #define VADC_LR_MUX8_PU2_AMUX_THM4		0xb7
103*d3ba5586SStanimir Varbanov #define VADC_LR_MUX9_PU2_AMUX_THM5		0xb8
104*d3ba5586SStanimir Varbanov #define VADC_LR_MUX10_PU2_AMUX_USB_ID		0xb9
105*d3ba5586SStanimir Varbanov #define VADC_LR_MUX3_BUF_PU2_XO_THERM		0xbc
106*d3ba5586SStanimir Varbanov 
107*d3ba5586SStanimir Varbanov #define VADC_LR_MUX1_PU1_PU2_BAT_THERM		0xf0
108*d3ba5586SStanimir Varbanov #define VADC_LR_MUX2_PU1_PU2_BAT_ID		0xf1
109*d3ba5586SStanimir Varbanov #define VADC_LR_MUX3_PU1_PU2_XO_THERM		0xf2
110*d3ba5586SStanimir Varbanov #define VADC_LR_MUX4_PU1_PU2_AMUX_THM1		0xf3
111*d3ba5586SStanimir Varbanov #define VADC_LR_MUX5_PU1_PU2_AMUX_THM2		0xf4
112*d3ba5586SStanimir Varbanov #define VADC_LR_MUX6_PU1_PU2_AMUX_THM3		0xf5
113*d3ba5586SStanimir Varbanov #define VADC_LR_MUX7_PU1_PU2_AMUX_HW_ID		0xf6
114*d3ba5586SStanimir Varbanov #define VADC_LR_MUX8_PU1_PU2_AMUX_THM4		0xf7
115*d3ba5586SStanimir Varbanov #define VADC_LR_MUX9_PU1_PU2_AMUX_THM5		0xf8
116*d3ba5586SStanimir Varbanov #define VADC_LR_MUX10_PU1_PU2_AMUX_USB_ID	0xf9
117*d3ba5586SStanimir Varbanov #define VADC_LR_MUX3_BUF_PU1_PU2_XO_THERM	0xfc
118*d3ba5586SStanimir Varbanov 
119*d3ba5586SStanimir Varbanov #endif /* _DT_BINDINGS_QCOM_SPMI_VADC_H */
120