1d1492bbdSJishnu Prakash /* SPDX-License-Identifier: GPL-2.0-only */ 2d1492bbdSJishnu Prakash /* 3d1492bbdSJishnu Prakash * Copyright (c) 2020, The Linux Foundation. All rights reserved. 4d1492bbdSJishnu Prakash */ 5d1492bbdSJishnu Prakash 6d1492bbdSJishnu Prakash #ifndef _DT_BINDINGS_QCOM_SPMI_VADC_PM8350_H 7d1492bbdSJishnu Prakash #define _DT_BINDINGS_QCOM_SPMI_VADC_PM8350_H 8d1492bbdSJishnu Prakash 9*b7297d45SDmitry Baryshkov #include <dt-bindings/iio/qcom,spmi-vadc.h> 10d1492bbdSJishnu Prakash 11*b7297d45SDmitry Baryshkov /* ADC channels for PM8350_ADC for PMIC7 */ 12*b7297d45SDmitry Baryshkov #define PM8350_ADC7_REF_GND(sid) ((sid) << 8 | ADC7_REF_GND) 13*b7297d45SDmitry Baryshkov #define PM8350_ADC7_1P25VREF(sid) ((sid) << 8 | ADC7_1P25VREF) 14*b7297d45SDmitry Baryshkov #define PM8350_ADC7_VREF_VADC(sid) ((sid) << 8 | ADC7_VREF_VADC) 15*b7297d45SDmitry Baryshkov #define PM8350_ADC7_DIE_TEMP(sid) ((sid) << 8 | ADC7_DIE_TEMP) 16*b7297d45SDmitry Baryshkov 17*b7297d45SDmitry Baryshkov #define PM8350_ADC7_AMUX_THM1(sid) ((sid) << 8 | ADC7_AMUX_THM1) 18*b7297d45SDmitry Baryshkov #define PM8350_ADC7_AMUX_THM2(sid) ((sid) << 8 | ADC7_AMUX_THM2) 19*b7297d45SDmitry Baryshkov #define PM8350_ADC7_AMUX_THM3(sid) ((sid) << 8 | ADC7_AMUX_THM3) 20*b7297d45SDmitry Baryshkov #define PM8350_ADC7_AMUX_THM4(sid) ((sid) << 8 | ADC7_AMUX_THM4) 21*b7297d45SDmitry Baryshkov #define PM8350_ADC7_AMUX_THM5(sid) ((sid) << 8 | ADC7_AMUX_THM5) 22*b7297d45SDmitry Baryshkov #define PM8350_ADC7_GPIO1(sid) ((sid) << 8 | ADC7_GPIO1) 23*b7297d45SDmitry Baryshkov #define PM8350_ADC7_GPIO2(sid) ((sid) << 8 | ADC7_GPIO2) 24*b7297d45SDmitry Baryshkov #define PM8350_ADC7_GPIO3(sid) ((sid) << 8 | ADC7_GPIO3) 25*b7297d45SDmitry Baryshkov #define PM8350_ADC7_GPIO4(sid) ((sid) << 8 | ADC7_GPIO4) 26d1492bbdSJishnu Prakash 27d1492bbdSJishnu Prakash /* 30k pull-up1 */ 28*b7297d45SDmitry Baryshkov #define PM8350_ADC7_AMUX_THM1_30K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM1_30K_PU) 29*b7297d45SDmitry Baryshkov #define PM8350_ADC7_AMUX_THM2_30K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM2_30K_PU) 30*b7297d45SDmitry Baryshkov #define PM8350_ADC7_AMUX_THM3_30K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM3_30K_PU) 31*b7297d45SDmitry Baryshkov #define PM8350_ADC7_AMUX_THM4_30K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM4_30K_PU) 32*b7297d45SDmitry Baryshkov #define PM8350_ADC7_AMUX_THM5_30K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM5_30K_PU) 33*b7297d45SDmitry Baryshkov #define PM8350_ADC7_GPIO1_30K_PU(sid) ((sid) << 8 | ADC7_GPIO1_30K_PU) 34*b7297d45SDmitry Baryshkov #define PM8350_ADC7_GPIO2_30K_PU(sid) ((sid) << 8 | ADC7_GPIO2_30K_PU) 35*b7297d45SDmitry Baryshkov #define PM8350_ADC7_GPIO3_30K_PU(sid) ((sid) << 8 | ADC7_GPIO3_30K_PU) 36*b7297d45SDmitry Baryshkov #define PM8350_ADC7_GPIO4_30K_PU(sid) ((sid) << 8 | ADC7_GPIO4_30K_PU) 37d1492bbdSJishnu Prakash 38d1492bbdSJishnu Prakash /* 100k pull-up2 */ 39*b7297d45SDmitry Baryshkov #define PM8350_ADC7_AMUX_THM1_100K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM1_100K_PU) 40*b7297d45SDmitry Baryshkov #define PM8350_ADC7_AMUX_THM2_100K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM2_100K_PU) 41*b7297d45SDmitry Baryshkov #define PM8350_ADC7_AMUX_THM3_100K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM3_100K_PU) 42*b7297d45SDmitry Baryshkov #define PM8350_ADC7_AMUX_THM4_100K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM4_100K_PU) 43*b7297d45SDmitry Baryshkov #define PM8350_ADC7_AMUX_THM5_100K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM5_100K_PU) 44*b7297d45SDmitry Baryshkov #define PM8350_ADC7_GPIO1_100K_PU(sid) ((sid) << 8 | ADC7_GPIO1_100K_PU) 45*b7297d45SDmitry Baryshkov #define PM8350_ADC7_GPIO2_100K_PU(sid) ((sid) << 8 | ADC7_GPIO2_100K_PU) 46*b7297d45SDmitry Baryshkov #define PM8350_ADC7_GPIO3_100K_PU(sid) ((sid) << 8 | ADC7_GPIO3_100K_PU) 47*b7297d45SDmitry Baryshkov #define PM8350_ADC7_GPIO4_100K_PU(sid) ((sid) << 8 | ADC7_GPIO4_100K_PU) 48d1492bbdSJishnu Prakash 49d1492bbdSJishnu Prakash /* 400k pull-up3 */ 50*b7297d45SDmitry Baryshkov #define PM8350_ADC7_AMUX_THM1_400K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM1_400K_PU) 51*b7297d45SDmitry Baryshkov #define PM8350_ADC7_AMUX_THM2_400K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM2_400K_PU) 52*b7297d45SDmitry Baryshkov #define PM8350_ADC7_AMUX_THM3_400K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM3_400K_PU) 53*b7297d45SDmitry Baryshkov #define PM8350_ADC7_AMUX_THM4_400K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM4_400K_PU) 54*b7297d45SDmitry Baryshkov #define PM8350_ADC7_AMUX_THM5_400K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM5_400K_PU) 55*b7297d45SDmitry Baryshkov #define PM8350_ADC7_GPIO1_400K_PU(sid) ((sid) << 8 | ADC7_GPIO1_400K_PU) 56*b7297d45SDmitry Baryshkov #define PM8350_ADC7_GPIO2_400K_PU(sid) ((sid) << 8 | ADC7_GPIO2_400K_PU) 57*b7297d45SDmitry Baryshkov #define PM8350_ADC7_GPIO3_400K_PU(sid) ((sid) << 8 | ADC7_GPIO3_400K_PU) 58*b7297d45SDmitry Baryshkov #define PM8350_ADC7_GPIO4_400K_PU(sid) ((sid) << 8 | ADC7_GPIO4_400K_PU) 59d1492bbdSJishnu Prakash 60d1492bbdSJishnu Prakash /* 1/3 Divider */ 61*b7297d45SDmitry Baryshkov #define PM8350_ADC7_GPIO4_DIV3(sid) ((sid) << 8 | ADC7_GPIO4_DIV3) 62d1492bbdSJishnu Prakash 63*b7297d45SDmitry Baryshkov #define PM8350_ADC7_VPH_PWR(sid) ((sid) << 8 | ADC7_VPH_PWR) 64d1492bbdSJishnu Prakash 65d1492bbdSJishnu Prakash #endif /* _DT_BINDINGS_QCOM_SPMI_VADC_PM8350_H */ 66