1*e55ef16bSHuqiang Qin /* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */ 2*e55ef16bSHuqiang Qin /* 3*e55ef16bSHuqiang Qin * Copyright (c) 2021 Amlogic, Inc. All rights reserved. 4*e55ef16bSHuqiang Qin * Author: Huqiang Qin <huqiang.qin@amlogic.com> 5*e55ef16bSHuqiang Qin */ 6*e55ef16bSHuqiang Qin 7*e55ef16bSHuqiang Qin #ifndef _DT_BINDINGS_AMLOGIC_C3_GPIO_H 8*e55ef16bSHuqiang Qin #define _DT_BINDINGS_AMLOGIC_C3_GPIO_H 9*e55ef16bSHuqiang Qin 10*e55ef16bSHuqiang Qin #define GPIOE_0 0 11*e55ef16bSHuqiang Qin #define GPIOE_1 1 12*e55ef16bSHuqiang Qin #define GPIOE_2 2 13*e55ef16bSHuqiang Qin #define GPIOE_3 3 14*e55ef16bSHuqiang Qin #define GPIOE_4 4 15*e55ef16bSHuqiang Qin 16*e55ef16bSHuqiang Qin #define GPIOB_0 5 17*e55ef16bSHuqiang Qin #define GPIOB_1 6 18*e55ef16bSHuqiang Qin #define GPIOB_2 7 19*e55ef16bSHuqiang Qin #define GPIOB_3 8 20*e55ef16bSHuqiang Qin #define GPIOB_4 9 21*e55ef16bSHuqiang Qin #define GPIOB_5 10 22*e55ef16bSHuqiang Qin #define GPIOB_6 11 23*e55ef16bSHuqiang Qin #define GPIOB_7 12 24*e55ef16bSHuqiang Qin #define GPIOB_8 13 25*e55ef16bSHuqiang Qin #define GPIOB_9 14 26*e55ef16bSHuqiang Qin #define GPIOB_10 15 27*e55ef16bSHuqiang Qin #define GPIOB_11 16 28*e55ef16bSHuqiang Qin #define GPIOB_12 17 29*e55ef16bSHuqiang Qin #define GPIOB_13 18 30*e55ef16bSHuqiang Qin #define GPIOB_14 19 31*e55ef16bSHuqiang Qin 32*e55ef16bSHuqiang Qin #define GPIOC_0 20 33*e55ef16bSHuqiang Qin #define GPIOC_1 21 34*e55ef16bSHuqiang Qin #define GPIOC_2 22 35*e55ef16bSHuqiang Qin #define GPIOC_3 23 36*e55ef16bSHuqiang Qin #define GPIOC_4 24 37*e55ef16bSHuqiang Qin #define GPIOC_5 25 38*e55ef16bSHuqiang Qin #define GPIOC_6 26 39*e55ef16bSHuqiang Qin 40*e55ef16bSHuqiang Qin #define GPIOX_0 27 41*e55ef16bSHuqiang Qin #define GPIOX_1 28 42*e55ef16bSHuqiang Qin #define GPIOX_2 29 43*e55ef16bSHuqiang Qin #define GPIOX_3 30 44*e55ef16bSHuqiang Qin #define GPIOX_4 31 45*e55ef16bSHuqiang Qin #define GPIOX_5 32 46*e55ef16bSHuqiang Qin #define GPIOX_6 33 47*e55ef16bSHuqiang Qin #define GPIOX_7 34 48*e55ef16bSHuqiang Qin #define GPIOX_8 35 49*e55ef16bSHuqiang Qin #define GPIOX_9 36 50*e55ef16bSHuqiang Qin #define GPIOX_10 37 51*e55ef16bSHuqiang Qin #define GPIOX_11 38 52*e55ef16bSHuqiang Qin #define GPIOX_12 39 53*e55ef16bSHuqiang Qin #define GPIOX_13 40 54*e55ef16bSHuqiang Qin 55*e55ef16bSHuqiang Qin #define GPIOD_0 41 56*e55ef16bSHuqiang Qin #define GPIOD_1 42 57*e55ef16bSHuqiang Qin #define GPIOD_2 43 58*e55ef16bSHuqiang Qin #define GPIOD_3 44 59*e55ef16bSHuqiang Qin #define GPIOD_4 45 60*e55ef16bSHuqiang Qin #define GPIOD_5 46 61*e55ef16bSHuqiang Qin #define GPIOD_6 47 62*e55ef16bSHuqiang Qin 63*e55ef16bSHuqiang Qin #define GPIOA_0 48 64*e55ef16bSHuqiang Qin #define GPIOA_1 49 65*e55ef16bSHuqiang Qin #define GPIOA_2 50 66*e55ef16bSHuqiang Qin #define GPIOA_3 51 67*e55ef16bSHuqiang Qin #define GPIOA_4 52 68*e55ef16bSHuqiang Qin #define GPIOA_5 53 69*e55ef16bSHuqiang Qin 70*e55ef16bSHuqiang Qin #define GPIO_TEST_N 54 71*e55ef16bSHuqiang Qin 72*e55ef16bSHuqiang Qin #endif /* _DT_BINDINGS_AMLOGIC_C3_GPIO_H */ 73