xref: /openbmc/linux/include/dt-bindings/dma/jz4780-dma.h (revision 3eb66e91a25497065c5322b1268cbc3953642227)
1*2d972b6aSEzequiel Garcia #ifndef __DT_BINDINGS_DMA_JZ4780_DMA_H__
2*2d972b6aSEzequiel Garcia #define __DT_BINDINGS_DMA_JZ4780_DMA_H__
3*2d972b6aSEzequiel Garcia 
4*2d972b6aSEzequiel Garcia /*
5*2d972b6aSEzequiel Garcia  * Request type numbers for the JZ4780 DMA controller (written to the DRTn
6*2d972b6aSEzequiel Garcia  * register for the channel).
7*2d972b6aSEzequiel Garcia  */
8*2d972b6aSEzequiel Garcia #define JZ4780_DMA_I2S1_TX	0x4
9*2d972b6aSEzequiel Garcia #define JZ4780_DMA_I2S1_RX	0x5
10*2d972b6aSEzequiel Garcia #define JZ4780_DMA_I2S0_TX	0x6
11*2d972b6aSEzequiel Garcia #define JZ4780_DMA_I2S0_RX	0x7
12*2d972b6aSEzequiel Garcia #define JZ4780_DMA_AUTO		0x8
13*2d972b6aSEzequiel Garcia #define JZ4780_DMA_SADC_RX	0x9
14*2d972b6aSEzequiel Garcia #define JZ4780_DMA_UART4_TX	0xc
15*2d972b6aSEzequiel Garcia #define JZ4780_DMA_UART4_RX	0xd
16*2d972b6aSEzequiel Garcia #define JZ4780_DMA_UART3_TX	0xe
17*2d972b6aSEzequiel Garcia #define JZ4780_DMA_UART3_RX	0xf
18*2d972b6aSEzequiel Garcia #define JZ4780_DMA_UART2_TX	0x10
19*2d972b6aSEzequiel Garcia #define JZ4780_DMA_UART2_RX	0x11
20*2d972b6aSEzequiel Garcia #define JZ4780_DMA_UART1_TX	0x12
21*2d972b6aSEzequiel Garcia #define JZ4780_DMA_UART1_RX	0x13
22*2d972b6aSEzequiel Garcia #define JZ4780_DMA_UART0_TX	0x14
23*2d972b6aSEzequiel Garcia #define JZ4780_DMA_UART0_RX	0x15
24*2d972b6aSEzequiel Garcia #define JZ4780_DMA_SSI0_TX	0x16
25*2d972b6aSEzequiel Garcia #define JZ4780_DMA_SSI0_RX	0x17
26*2d972b6aSEzequiel Garcia #define JZ4780_DMA_SSI1_TX	0x18
27*2d972b6aSEzequiel Garcia #define JZ4780_DMA_SSI1_RX	0x19
28*2d972b6aSEzequiel Garcia #define JZ4780_DMA_MSC0_TX	0x1a
29*2d972b6aSEzequiel Garcia #define JZ4780_DMA_MSC0_RX	0x1b
30*2d972b6aSEzequiel Garcia #define JZ4780_DMA_MSC1_TX	0x1c
31*2d972b6aSEzequiel Garcia #define JZ4780_DMA_MSC1_RX	0x1d
32*2d972b6aSEzequiel Garcia #define JZ4780_DMA_MSC2_TX	0x1e
33*2d972b6aSEzequiel Garcia #define JZ4780_DMA_MSC2_RX	0x1f
34*2d972b6aSEzequiel Garcia #define JZ4780_DMA_PCM0_TX	0x20
35*2d972b6aSEzequiel Garcia #define JZ4780_DMA_PCM0_RX	0x21
36*2d972b6aSEzequiel Garcia #define JZ4780_DMA_SMB0_TX	0x24
37*2d972b6aSEzequiel Garcia #define JZ4780_DMA_SMB0_RX	0x25
38*2d972b6aSEzequiel Garcia #define JZ4780_DMA_SMB1_TX	0x26
39*2d972b6aSEzequiel Garcia #define JZ4780_DMA_SMB1_RX	0x27
40*2d972b6aSEzequiel Garcia #define JZ4780_DMA_SMB2_TX	0x28
41*2d972b6aSEzequiel Garcia #define JZ4780_DMA_SMB2_RX	0x29
42*2d972b6aSEzequiel Garcia #define JZ4780_DMA_SMB3_TX	0x2a
43*2d972b6aSEzequiel Garcia #define JZ4780_DMA_SMB3_RX	0x2b
44*2d972b6aSEzequiel Garcia #define JZ4780_DMA_SMB4_TX	0x2c
45*2d972b6aSEzequiel Garcia #define JZ4780_DMA_SMB4_RX	0x2d
46*2d972b6aSEzequiel Garcia #define JZ4780_DMA_DES_TX	0x2e
47*2d972b6aSEzequiel Garcia #define JZ4780_DMA_DES_RX	0x2f
48*2d972b6aSEzequiel Garcia 
49*2d972b6aSEzequiel Garcia #endif /* __DT_BINDINGS_DMA_JZ4780_DMA_H__ */
50