xref: /openbmc/linux/include/dt-bindings/clock/stih407-clks.h (revision 6cb4f8dd1044849047023b76567231f41eb64c9e)
11befe7e4SGabriel FERNANDEZ /*
21befe7e4SGabriel FERNANDEZ  * This header provides constants clk index STMicroelectronics
31befe7e4SGabriel FERNANDEZ  * STiH407 SoC.
41befe7e4SGabriel FERNANDEZ  */
51befe7e4SGabriel FERNANDEZ #ifndef _DT_BINDINGS_CLK_STIH407
61befe7e4SGabriel FERNANDEZ #define _DT_BINDINGS_CLK_STIH407
71befe7e4SGabriel FERNANDEZ 
8*6cb4f8ddSLee Jones /* CLOCKGEN A0 */
9*6cb4f8ddSLee Jones #define CLK_IC_LMI0		0
10*6cb4f8ddSLee Jones #define CLK_IC_LMI1		1
11*6cb4f8ddSLee Jones 
121befe7e4SGabriel FERNANDEZ /* CLOCKGEN C0 */
1377deed2bSGabriel FERNANDEZ #define CLK_ICN_GPU		0
1477deed2bSGabriel FERNANDEZ #define CLK_FDMA		1
1577deed2bSGabriel FERNANDEZ #define CLK_NAND		2
1677deed2bSGabriel FERNANDEZ #define CLK_HVA			3
1777deed2bSGabriel FERNANDEZ #define CLK_PROC_STFE		4
1877deed2bSGabriel FERNANDEZ #define CLK_PROC_TP		5
1977deed2bSGabriel FERNANDEZ #define CLK_RX_ICN_DMU		6
2077deed2bSGabriel FERNANDEZ #define CLK_RX_ICN_DISP_0	6
2177deed2bSGabriel FERNANDEZ #define CLK_RX_ICN_DISP_1	6
2277deed2bSGabriel FERNANDEZ #define CLK_RX_ICN_HVA		7
2377deed2bSGabriel FERNANDEZ #define CLK_RX_ICN_TS		7
2477deed2bSGabriel FERNANDEZ #define CLK_ICN_CPU		8
2577deed2bSGabriel FERNANDEZ #define CLK_TX_ICN_DMU		9
2677deed2bSGabriel FERNANDEZ #define CLK_TX_ICN_HVA		9
2777deed2bSGabriel FERNANDEZ #define CLK_TX_ICN_TS		9
2877deed2bSGabriel FERNANDEZ #define CLK_ICN_COMPO		9
2977deed2bSGabriel FERNANDEZ #define CLK_MMC_0		10
3077deed2bSGabriel FERNANDEZ #define CLK_MMC_1		11
3177deed2bSGabriel FERNANDEZ #define CLK_JPEGDEC		12
3277deed2bSGabriel FERNANDEZ #define CLK_ICN_REG		13
3377deed2bSGabriel FERNANDEZ #define CLK_TRACE_A9		13
3477deed2bSGabriel FERNANDEZ #define CLK_PTI_STM		13
351befe7e4SGabriel FERNANDEZ #define CLK_EXT2F_A9		13
3677deed2bSGabriel FERNANDEZ #define CLK_IC_BDISP_0		14
3777deed2bSGabriel FERNANDEZ #define CLK_IC_BDISP_1		15
3877deed2bSGabriel FERNANDEZ #define CLK_PP_DMU		16
3977deed2bSGabriel FERNANDEZ #define CLK_VID_DMU		17
4077deed2bSGabriel FERNANDEZ #define CLK_DSS_LPC		18
4177deed2bSGabriel FERNANDEZ #define CLK_ST231_AUD_0		19
4277deed2bSGabriel FERNANDEZ #define CLK_ST231_GP_0		19
4377deed2bSGabriel FERNANDEZ #define CLK_ST231_GP_1		20
4477deed2bSGabriel FERNANDEZ #define CLK_ST231_DMU		21
4577deed2bSGabriel FERNANDEZ #define CLK_ICN_LMI		22
4677deed2bSGabriel FERNANDEZ #define CLK_TX_ICN_DISP_0	23
4777deed2bSGabriel FERNANDEZ #define CLK_TX_ICN_DISP_1	23
4877deed2bSGabriel FERNANDEZ #define CLK_ICN_SBC		24
4977deed2bSGabriel FERNANDEZ #define CLK_STFE_FRC2		25
5077deed2bSGabriel FERNANDEZ #define CLK_ETH_PHY		26
5177deed2bSGabriel FERNANDEZ #define CLK_ETH_REF_PHYCLK	27
5277deed2bSGabriel FERNANDEZ #define CLK_FLASH_PROMIP	28
5377deed2bSGabriel FERNANDEZ #define CLK_MAIN_DISP		29
5477deed2bSGabriel FERNANDEZ #define CLK_AUX_DISP		30
5577deed2bSGabriel FERNANDEZ #define CLK_COMPO_DVP		31
561befe7e4SGabriel FERNANDEZ 
5777deed2bSGabriel FERNANDEZ /* CLOCKGEN D0 */
5877deed2bSGabriel FERNANDEZ #define CLK_PCM_0		0
5977deed2bSGabriel FERNANDEZ #define CLK_PCM_1		1
6077deed2bSGabriel FERNANDEZ #define CLK_PCM_2		2
6177deed2bSGabriel FERNANDEZ #define CLK_SPDIFF		3
6277deed2bSGabriel FERNANDEZ 
6377deed2bSGabriel FERNANDEZ /* CLOCKGEN D2 */
6477deed2bSGabriel FERNANDEZ #define CLK_PIX_MAIN_DISP	0
6577deed2bSGabriel FERNANDEZ #define CLK_PIX_PIP		1
6677deed2bSGabriel FERNANDEZ #define CLK_PIX_GDP1		2
6777deed2bSGabriel FERNANDEZ #define CLK_PIX_GDP2		3
6877deed2bSGabriel FERNANDEZ #define CLK_PIX_GDP3		4
6977deed2bSGabriel FERNANDEZ #define CLK_PIX_GDP4		5
7077deed2bSGabriel FERNANDEZ #define CLK_PIX_AUX_DISP	6
7177deed2bSGabriel FERNANDEZ #define CLK_DENC		7
7277deed2bSGabriel FERNANDEZ #define CLK_PIX_HDDAC		8
7377deed2bSGabriel FERNANDEZ #define CLK_HDDAC		9
7477deed2bSGabriel FERNANDEZ #define CLK_SDDAC		10
7577deed2bSGabriel FERNANDEZ #define CLK_PIX_DVO		11
7677deed2bSGabriel FERNANDEZ #define CLK_DVO			12
7777deed2bSGabriel FERNANDEZ #define CLK_PIX_HDMI		13
7877deed2bSGabriel FERNANDEZ #define CLK_TMDS_HDMI		14
7977deed2bSGabriel FERNANDEZ #define CLK_REF_HDMIPHY		15
8077deed2bSGabriel FERNANDEZ 
8177deed2bSGabriel FERNANDEZ /* CLOCKGEN D3 */
8277deed2bSGabriel FERNANDEZ #define CLK_STFE_FRC1		0
8377deed2bSGabriel FERNANDEZ #define CLK_TSOUT_0		1
8477deed2bSGabriel FERNANDEZ #define CLK_TSOUT_1		2
8577deed2bSGabriel FERNANDEZ #define CLK_MCHI		3
8677deed2bSGabriel FERNANDEZ #define CLK_VSENS_COMPO		4
8777deed2bSGabriel FERNANDEZ #define CLK_FRC1_REMOTE		5
8877deed2bSGabriel FERNANDEZ #define CLK_LPC_0		6
8977deed2bSGabriel FERNANDEZ #define CLK_LPC_1		7
901befe7e4SGabriel FERNANDEZ #endif
91