1*04dc82e1SThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 2d863dc9eSPurna Chandra Mandal /* 3d863dc9eSPurna Chandra Mandal * Purna Chandra Mandal,<purna.mandal@microchip.com> 4d863dc9eSPurna Chandra Mandal * Copyright (C) 2015 Microchip Technology Inc. All rights reserved. 5d863dc9eSPurna Chandra Mandal */ 6d863dc9eSPurna Chandra Mandal 7d863dc9eSPurna Chandra Mandal #ifndef _DT_BINDINGS_CLK_MICROCHIP_PIC32_H_ 8d863dc9eSPurna Chandra Mandal #define _DT_BINDINGS_CLK_MICROCHIP_PIC32_H_ 9d863dc9eSPurna Chandra Mandal 10d863dc9eSPurna Chandra Mandal /* clock output indices */ 11d863dc9eSPurna Chandra Mandal #define POSCCLK 0 12d863dc9eSPurna Chandra Mandal #define FRCCLK 1 13d863dc9eSPurna Chandra Mandal #define BFRCCLK 2 14d863dc9eSPurna Chandra Mandal #define LPRCCLK 3 15d863dc9eSPurna Chandra Mandal #define SOSCCLK 4 16d863dc9eSPurna Chandra Mandal #define FRCDIVCLK 5 17d863dc9eSPurna Chandra Mandal #define PLLCLK 6 18d863dc9eSPurna Chandra Mandal #define SCLK 7 19d863dc9eSPurna Chandra Mandal #define PB1CLK 8 20d863dc9eSPurna Chandra Mandal #define PB2CLK 9 21d863dc9eSPurna Chandra Mandal #define PB3CLK 10 22d863dc9eSPurna Chandra Mandal #define PB4CLK 11 23d863dc9eSPurna Chandra Mandal #define PB5CLK 12 24d863dc9eSPurna Chandra Mandal #define PB6CLK 13 25d863dc9eSPurna Chandra Mandal #define PB7CLK 14 26d863dc9eSPurna Chandra Mandal #define REF1CLK 15 27d863dc9eSPurna Chandra Mandal #define REF2CLK 16 28d863dc9eSPurna Chandra Mandal #define REF3CLK 17 29d863dc9eSPurna Chandra Mandal #define REF4CLK 18 30d863dc9eSPurna Chandra Mandal #define REF5CLK 19 31d863dc9eSPurna Chandra Mandal #define UPLLCLK 20 32d863dc9eSPurna Chandra Mandal #define MAXCLKS 21 33d863dc9eSPurna Chandra Mandal 34d863dc9eSPurna Chandra Mandal #endif /* _DT_BINDINGS_CLK_MICROCHIP_PIC32_H_ */ 35