1*b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */ 2aaa2e7acSAl Viro #ifndef __ASM_GENERIC_EXTABLE_H 3aaa2e7acSAl Viro #define __ASM_GENERIC_EXTABLE_H 4aaa2e7acSAl Viro 5aaa2e7acSAl Viro /* 6aaa2e7acSAl Viro * The exception table consists of pairs of addresses: the first is the 7aaa2e7acSAl Viro * address of an instruction that is allowed to fault, and the second is 8aaa2e7acSAl Viro * the address at which the program should continue. No registers are 9aaa2e7acSAl Viro * modified, so it is entirely up to the continuation code to figure out 10aaa2e7acSAl Viro * what to do. 11aaa2e7acSAl Viro * 12aaa2e7acSAl Viro * All the routines below use bits of fixup code that are out of line 13aaa2e7acSAl Viro * with the main instruction path. This means when everything is well, 14aaa2e7acSAl Viro * we don't even have to jump over them. Further, they do not intrude 15aaa2e7acSAl Viro * on our cache or tlb entries. 16aaa2e7acSAl Viro */ 17aaa2e7acSAl Viro 18aaa2e7acSAl Viro struct exception_table_entry 19aaa2e7acSAl Viro { 20aaa2e7acSAl Viro unsigned long insn, fixup; 21aaa2e7acSAl Viro }; 22aaa2e7acSAl Viro 23aaa2e7acSAl Viro 24aaa2e7acSAl Viro struct pt_regs; 25aaa2e7acSAl Viro extern int fixup_exception(struct pt_regs *regs); 26aaa2e7acSAl Viro 27aaa2e7acSAl Viro #endif 28