xref: /openbmc/linux/drivers/watchdog/sunxi_wdt.c (revision c5ec618fbf83045b9d51679d809ddd45f990fe0a)
1d00680edSCarlo Caione /*
2d00680edSCarlo Caione  *      sunxi Watchdog Driver
3d00680edSCarlo Caione  *
4d00680edSCarlo Caione  *      Copyright (c) 2013 Carlo Caione
5d00680edSCarlo Caione  *                    2012 Henrik Nordstrom
6d00680edSCarlo Caione  *
7d00680edSCarlo Caione  *      This program is free software; you can redistribute it and/or
8d00680edSCarlo Caione  *      modify it under the terms of the GNU General Public License
9d00680edSCarlo Caione  *      as published by the Free Software Foundation; either version
10d00680edSCarlo Caione  *      2 of the License, or (at your option) any later version.
11d00680edSCarlo Caione  *
12d00680edSCarlo Caione  *      Based on xen_wdt.c
13d00680edSCarlo Caione  *      (c) Copyright 2010 Novell, Inc.
14d00680edSCarlo Caione  */
15d00680edSCarlo Caione 
16d00680edSCarlo Caione #include <linux/clk.h>
17440e96bcSMaxime Ripard #include <linux/delay.h>
18d00680edSCarlo Caione #include <linux/err.h>
19d00680edSCarlo Caione #include <linux/init.h>
20d00680edSCarlo Caione #include <linux/io.h>
21d00680edSCarlo Caione #include <linux/kernel.h>
22d00680edSCarlo Caione #include <linux/module.h>
23d00680edSCarlo Caione #include <linux/moduleparam.h>
24d20a1d90SGuenter Roeck #include <linux/notifier.h>
25d00680edSCarlo Caione #include <linux/of.h>
26f2147de3SChen-Yu Tsai #include <linux/of_device.h>
27d00680edSCarlo Caione #include <linux/platform_device.h>
28440e96bcSMaxime Ripard #include <linux/reboot.h>
29d00680edSCarlo Caione #include <linux/types.h>
30d00680edSCarlo Caione #include <linux/watchdog.h>
31d00680edSCarlo Caione 
32d00680edSCarlo Caione #define WDT_MAX_TIMEOUT         16
33d00680edSCarlo Caione #define WDT_MIN_TIMEOUT         1
34f2147de3SChen-Yu Tsai #define WDT_TIMEOUT_MASK        0x0F
35d00680edSCarlo Caione 
36d00680edSCarlo Caione #define WDT_CTRL_RELOAD         ((1 << 0) | (0x0a57 << 1))
37d00680edSCarlo Caione 
38d00680edSCarlo Caione #define WDT_MODE_EN             (1 << 0)
39d00680edSCarlo Caione 
40d00680edSCarlo Caione #define DRV_NAME		"sunxi-wdt"
41d00680edSCarlo Caione #define DRV_VERSION		"1.0"
42d00680edSCarlo Caione 
43d00680edSCarlo Caione static bool nowayout = WATCHDOG_NOWAYOUT;
44d00680edSCarlo Caione static unsigned int timeout = WDT_MAX_TIMEOUT;
45d00680edSCarlo Caione 
46f2147de3SChen-Yu Tsai /*
47f2147de3SChen-Yu Tsai  * This structure stores the register offsets for different variants
48f2147de3SChen-Yu Tsai  * of Allwinner's watchdog hardware.
49f2147de3SChen-Yu Tsai  */
50f2147de3SChen-Yu Tsai struct sunxi_wdt_reg {
51f2147de3SChen-Yu Tsai 	u8 wdt_ctrl;
52f2147de3SChen-Yu Tsai 	u8 wdt_cfg;
53f2147de3SChen-Yu Tsai 	u8 wdt_mode;
54f2147de3SChen-Yu Tsai 	u8 wdt_timeout_shift;
55f2147de3SChen-Yu Tsai 	u8 wdt_reset_mask;
56f2147de3SChen-Yu Tsai 	u8 wdt_reset_val;
57f2147de3SChen-Yu Tsai };
58f2147de3SChen-Yu Tsai 
59d00680edSCarlo Caione struct sunxi_wdt_dev {
60d00680edSCarlo Caione 	struct watchdog_device wdt_dev;
61d00680edSCarlo Caione 	void __iomem *wdt_base;
62f2147de3SChen-Yu Tsai 	const struct sunxi_wdt_reg *wdt_regs;
63d20a1d90SGuenter Roeck 	struct notifier_block restart_handler;
64d00680edSCarlo Caione };
65d00680edSCarlo Caione 
66d00680edSCarlo Caione /*
67d00680edSCarlo Caione  * wdt_timeout_map maps the watchdog timer interval value in seconds to
68f2147de3SChen-Yu Tsai  * the value of the register WDT_MODE at bits .wdt_timeout_shift ~ +3
69d00680edSCarlo Caione  *
70d00680edSCarlo Caione  * [timeout seconds] = register value
71d00680edSCarlo Caione  *
72d00680edSCarlo Caione  */
73d00680edSCarlo Caione 
74d00680edSCarlo Caione static const int wdt_timeout_map[] = {
7551ee34abSEmilio López 	[1] = 0x1,  /* 1s  */
7651ee34abSEmilio López 	[2] = 0x2,  /* 2s  */
7751ee34abSEmilio López 	[3] = 0x3,  /* 3s  */
7851ee34abSEmilio López 	[4] = 0x4,  /* 4s  */
7951ee34abSEmilio López 	[5] = 0x5,  /* 5s  */
8051ee34abSEmilio López 	[6] = 0x6,  /* 6s  */
8151ee34abSEmilio López 	[8] = 0x7,  /* 8s  */
8251ee34abSEmilio López 	[10] = 0x8, /* 10s */
8351ee34abSEmilio López 	[12] = 0x9, /* 12s */
8451ee34abSEmilio López 	[14] = 0xA, /* 14s */
8551ee34abSEmilio López 	[16] = 0xB, /* 16s */
86d00680edSCarlo Caione };
87d00680edSCarlo Caione 
88440e96bcSMaxime Ripard 
89d20a1d90SGuenter Roeck static int sunxi_restart_handle(struct notifier_block *this, unsigned long mode,
90d20a1d90SGuenter Roeck 				void *cmd)
91440e96bcSMaxime Ripard {
92d20a1d90SGuenter Roeck 	struct sunxi_wdt_dev *sunxi_wdt = container_of(this,
93d20a1d90SGuenter Roeck 						       struct sunxi_wdt_dev,
94d20a1d90SGuenter Roeck 						       restart_handler);
95d20a1d90SGuenter Roeck 	void __iomem *wdt_base = sunxi_wdt->wdt_base;
96f2147de3SChen-Yu Tsai 	const struct sunxi_wdt_reg *regs = sunxi_wdt->wdt_regs;
97f2147de3SChen-Yu Tsai 	u32 val;
98d20a1d90SGuenter Roeck 
99f2147de3SChen-Yu Tsai 	/* Set system reset function */
100f2147de3SChen-Yu Tsai 	val = readl(wdt_base + regs->wdt_cfg);
101f2147de3SChen-Yu Tsai 	val &= ~(regs->wdt_reset_mask);
102f2147de3SChen-Yu Tsai 	val |= regs->wdt_reset_val;
103f2147de3SChen-Yu Tsai 	writel(val, wdt_base + regs->wdt_cfg);
104f2147de3SChen-Yu Tsai 
105f2147de3SChen-Yu Tsai 	/* Set lowest timeout and enable watchdog */
106f2147de3SChen-Yu Tsai 	val = readl(wdt_base + regs->wdt_mode);
107f2147de3SChen-Yu Tsai 	val &= ~(WDT_TIMEOUT_MASK << regs->wdt_timeout_shift);
108f2147de3SChen-Yu Tsai 	val |= WDT_MODE_EN;
109f2147de3SChen-Yu Tsai 	writel(val, wdt_base + regs->wdt_mode);
110440e96bcSMaxime Ripard 
111440e96bcSMaxime Ripard 	/*
112440e96bcSMaxime Ripard 	 * Restart the watchdog. The default (and lowest) interval
113440e96bcSMaxime Ripard 	 * value for the watchdog is 0.5s.
114440e96bcSMaxime Ripard 	 */
115f2147de3SChen-Yu Tsai 	writel(WDT_CTRL_RELOAD, wdt_base + regs->wdt_ctrl);
116440e96bcSMaxime Ripard 
117440e96bcSMaxime Ripard 	while (1) {
118440e96bcSMaxime Ripard 		mdelay(5);
119f2147de3SChen-Yu Tsai 		val = readl(wdt_base + regs->wdt_mode);
120f2147de3SChen-Yu Tsai 		val |= WDT_MODE_EN;
121f2147de3SChen-Yu Tsai 		writel(val, wdt_base + regs->wdt_mode);
122440e96bcSMaxime Ripard 	}
123d20a1d90SGuenter Roeck 	return NOTIFY_DONE;
124440e96bcSMaxime Ripard }
125440e96bcSMaxime Ripard 
126d00680edSCarlo Caione static int sunxi_wdt_ping(struct watchdog_device *wdt_dev)
127d00680edSCarlo Caione {
128d00680edSCarlo Caione 	struct sunxi_wdt_dev *sunxi_wdt = watchdog_get_drvdata(wdt_dev);
129d00680edSCarlo Caione 	void __iomem *wdt_base = sunxi_wdt->wdt_base;
130f2147de3SChen-Yu Tsai 	const struct sunxi_wdt_reg *regs = sunxi_wdt->wdt_regs;
131d00680edSCarlo Caione 
132f2147de3SChen-Yu Tsai 	writel(WDT_CTRL_RELOAD, wdt_base + regs->wdt_ctrl);
133d00680edSCarlo Caione 
134d00680edSCarlo Caione 	return 0;
135d00680edSCarlo Caione }
136d00680edSCarlo Caione 
137d00680edSCarlo Caione static int sunxi_wdt_set_timeout(struct watchdog_device *wdt_dev,
138d00680edSCarlo Caione 		unsigned int timeout)
139d00680edSCarlo Caione {
140d00680edSCarlo Caione 	struct sunxi_wdt_dev *sunxi_wdt = watchdog_get_drvdata(wdt_dev);
141d00680edSCarlo Caione 	void __iomem *wdt_base = sunxi_wdt->wdt_base;
142f2147de3SChen-Yu Tsai 	const struct sunxi_wdt_reg *regs = sunxi_wdt->wdt_regs;
143d00680edSCarlo Caione 	u32 reg;
144d00680edSCarlo Caione 
145d00680edSCarlo Caione 	if (wdt_timeout_map[timeout] == 0)
146d00680edSCarlo Caione 		timeout++;
147d00680edSCarlo Caione 
148d00680edSCarlo Caione 	sunxi_wdt->wdt_dev.timeout = timeout;
149d00680edSCarlo Caione 
150f2147de3SChen-Yu Tsai 	reg = readl(wdt_base + regs->wdt_mode);
151f2147de3SChen-Yu Tsai 	reg &= ~(WDT_TIMEOUT_MASK << regs->wdt_timeout_shift);
152f2147de3SChen-Yu Tsai 	reg |= wdt_timeout_map[timeout] << regs->wdt_timeout_shift;
153f2147de3SChen-Yu Tsai 	writel(reg, wdt_base + regs->wdt_mode);
154d00680edSCarlo Caione 
155d00680edSCarlo Caione 	sunxi_wdt_ping(wdt_dev);
156d00680edSCarlo Caione 
157d00680edSCarlo Caione 	return 0;
158d00680edSCarlo Caione }
159d00680edSCarlo Caione 
160d00680edSCarlo Caione static int sunxi_wdt_stop(struct watchdog_device *wdt_dev)
161d00680edSCarlo Caione {
162d00680edSCarlo Caione 	struct sunxi_wdt_dev *sunxi_wdt = watchdog_get_drvdata(wdt_dev);
163d00680edSCarlo Caione 	void __iomem *wdt_base = sunxi_wdt->wdt_base;
164f2147de3SChen-Yu Tsai 	const struct sunxi_wdt_reg *regs = sunxi_wdt->wdt_regs;
165d00680edSCarlo Caione 
166f2147de3SChen-Yu Tsai 	writel(0, wdt_base + regs->wdt_mode);
167d00680edSCarlo Caione 
168d00680edSCarlo Caione 	return 0;
169d00680edSCarlo Caione }
170d00680edSCarlo Caione 
171d00680edSCarlo Caione static int sunxi_wdt_start(struct watchdog_device *wdt_dev)
172d00680edSCarlo Caione {
173d00680edSCarlo Caione 	u32 reg;
174d00680edSCarlo Caione 	struct sunxi_wdt_dev *sunxi_wdt = watchdog_get_drvdata(wdt_dev);
175d00680edSCarlo Caione 	void __iomem *wdt_base = sunxi_wdt->wdt_base;
176f2147de3SChen-Yu Tsai 	const struct sunxi_wdt_reg *regs = sunxi_wdt->wdt_regs;
177d00680edSCarlo Caione 	int ret;
178d00680edSCarlo Caione 
179d00680edSCarlo Caione 	ret = sunxi_wdt_set_timeout(&sunxi_wdt->wdt_dev,
180d00680edSCarlo Caione 			sunxi_wdt->wdt_dev.timeout);
181d00680edSCarlo Caione 	if (ret < 0)
182d00680edSCarlo Caione 		return ret;
183d00680edSCarlo Caione 
184f2147de3SChen-Yu Tsai 	/* Set system reset function */
185f2147de3SChen-Yu Tsai 	reg = readl(wdt_base + regs->wdt_cfg);
186f2147de3SChen-Yu Tsai 	reg &= ~(regs->wdt_reset_mask);
187f2147de3SChen-Yu Tsai 	reg |= ~(regs->wdt_reset_val);
188f2147de3SChen-Yu Tsai 	writel(reg, wdt_base + regs->wdt_cfg);
189f2147de3SChen-Yu Tsai 
190f2147de3SChen-Yu Tsai 	/* Enable watchdog */
191f2147de3SChen-Yu Tsai 	reg = readl(wdt_base + regs->wdt_mode);
192f2147de3SChen-Yu Tsai 	reg |= WDT_MODE_EN;
193f2147de3SChen-Yu Tsai 	writel(reg, wdt_base + regs->wdt_mode);
194d00680edSCarlo Caione 
195d00680edSCarlo Caione 	return 0;
196d00680edSCarlo Caione }
197d00680edSCarlo Caione 
198d00680edSCarlo Caione static const struct watchdog_info sunxi_wdt_info = {
199d00680edSCarlo Caione 	.identity	= DRV_NAME,
200d00680edSCarlo Caione 	.options	= WDIOF_SETTIMEOUT |
201d00680edSCarlo Caione 			  WDIOF_KEEPALIVEPING |
202d00680edSCarlo Caione 			  WDIOF_MAGICCLOSE,
203d00680edSCarlo Caione };
204d00680edSCarlo Caione 
205d00680edSCarlo Caione static const struct watchdog_ops sunxi_wdt_ops = {
206d00680edSCarlo Caione 	.owner		= THIS_MODULE,
207d00680edSCarlo Caione 	.start		= sunxi_wdt_start,
208d00680edSCarlo Caione 	.stop		= sunxi_wdt_stop,
209d00680edSCarlo Caione 	.ping		= sunxi_wdt_ping,
210d00680edSCarlo Caione 	.set_timeout	= sunxi_wdt_set_timeout,
211d00680edSCarlo Caione };
212d00680edSCarlo Caione 
213f2147de3SChen-Yu Tsai static const struct sunxi_wdt_reg sun4i_wdt_reg = {
214f2147de3SChen-Yu Tsai 	.wdt_ctrl = 0x00,
215f2147de3SChen-Yu Tsai 	.wdt_cfg = 0x04,
216f2147de3SChen-Yu Tsai 	.wdt_mode = 0x04,
217f2147de3SChen-Yu Tsai 	.wdt_timeout_shift = 3,
218f2147de3SChen-Yu Tsai 	.wdt_reset_mask = 0x02,
219f2147de3SChen-Yu Tsai 	.wdt_reset_val = 0x02,
220f2147de3SChen-Yu Tsai };
221f2147de3SChen-Yu Tsai 
222*c5ec618fSChen-Yu Tsai static const struct sunxi_wdt_reg sun6i_wdt_reg = {
223*c5ec618fSChen-Yu Tsai 	.wdt_ctrl = 0x10,
224*c5ec618fSChen-Yu Tsai 	.wdt_cfg = 0x14,
225*c5ec618fSChen-Yu Tsai 	.wdt_mode = 0x18,
226*c5ec618fSChen-Yu Tsai 	.wdt_timeout_shift = 4,
227*c5ec618fSChen-Yu Tsai 	.wdt_reset_mask = 0x03,
228*c5ec618fSChen-Yu Tsai 	.wdt_reset_val = 0x01,
229*c5ec618fSChen-Yu Tsai };
230*c5ec618fSChen-Yu Tsai 
231f2147de3SChen-Yu Tsai static const struct of_device_id sunxi_wdt_dt_ids[] = {
232f2147de3SChen-Yu Tsai 	{ .compatible = "allwinner,sun4i-a10-wdt", .data = &sun4i_wdt_reg },
233*c5ec618fSChen-Yu Tsai 	{ .compatible = "allwinner,sun6i-a31-wdt", .data = &sun6i_wdt_reg },
234f2147de3SChen-Yu Tsai 	{ /* sentinel */ }
235f2147de3SChen-Yu Tsai };
236f2147de3SChen-Yu Tsai MODULE_DEVICE_TABLE(of, sunxi_wdt_dt_ids);
237f2147de3SChen-Yu Tsai 
2381d5898b4SMaxime Ripard static int sunxi_wdt_probe(struct platform_device *pdev)
239d00680edSCarlo Caione {
240d00680edSCarlo Caione 	struct sunxi_wdt_dev *sunxi_wdt;
241f2147de3SChen-Yu Tsai 	const struct of_device_id *device;
242d00680edSCarlo Caione 	struct resource *res;
243d00680edSCarlo Caione 	int err;
244d00680edSCarlo Caione 
245d00680edSCarlo Caione 	sunxi_wdt = devm_kzalloc(&pdev->dev, sizeof(*sunxi_wdt), GFP_KERNEL);
246d00680edSCarlo Caione 	if (!sunxi_wdt)
247d00680edSCarlo Caione 		return -EINVAL;
248d00680edSCarlo Caione 
249d00680edSCarlo Caione 	platform_set_drvdata(pdev, sunxi_wdt);
250d00680edSCarlo Caione 
251f2147de3SChen-Yu Tsai 	device = of_match_device(sunxi_wdt_dt_ids, &pdev->dev);
252f2147de3SChen-Yu Tsai 	if (!device)
253f2147de3SChen-Yu Tsai 		return -ENODEV;
254f2147de3SChen-Yu Tsai 
255f2147de3SChen-Yu Tsai 	sunxi_wdt->wdt_regs = device->data;
256f2147de3SChen-Yu Tsai 
257d00680edSCarlo Caione 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
258d00680edSCarlo Caione 	sunxi_wdt->wdt_base = devm_ioremap_resource(&pdev->dev, res);
259d00680edSCarlo Caione 	if (IS_ERR(sunxi_wdt->wdt_base))
260d00680edSCarlo Caione 		return PTR_ERR(sunxi_wdt->wdt_base);
261d00680edSCarlo Caione 
262d00680edSCarlo Caione 	sunxi_wdt->wdt_dev.info = &sunxi_wdt_info;
263d00680edSCarlo Caione 	sunxi_wdt->wdt_dev.ops = &sunxi_wdt_ops;
264d00680edSCarlo Caione 	sunxi_wdt->wdt_dev.timeout = WDT_MAX_TIMEOUT;
265d00680edSCarlo Caione 	sunxi_wdt->wdt_dev.max_timeout = WDT_MAX_TIMEOUT;
266d00680edSCarlo Caione 	sunxi_wdt->wdt_dev.min_timeout = WDT_MIN_TIMEOUT;
267d00680edSCarlo Caione 	sunxi_wdt->wdt_dev.parent = &pdev->dev;
268d00680edSCarlo Caione 
269d00680edSCarlo Caione 	watchdog_init_timeout(&sunxi_wdt->wdt_dev, timeout, &pdev->dev);
270d00680edSCarlo Caione 	watchdog_set_nowayout(&sunxi_wdt->wdt_dev, nowayout);
271d00680edSCarlo Caione 
272d00680edSCarlo Caione 	watchdog_set_drvdata(&sunxi_wdt->wdt_dev, sunxi_wdt);
273d00680edSCarlo Caione 
274d00680edSCarlo Caione 	sunxi_wdt_stop(&sunxi_wdt->wdt_dev);
275d00680edSCarlo Caione 
276d00680edSCarlo Caione 	err = watchdog_register_device(&sunxi_wdt->wdt_dev);
277d00680edSCarlo Caione 	if (unlikely(err))
278d00680edSCarlo Caione 		return err;
279d00680edSCarlo Caione 
280d20a1d90SGuenter Roeck 	sunxi_wdt->restart_handler.notifier_call = sunxi_restart_handle;
281d20a1d90SGuenter Roeck 	sunxi_wdt->restart_handler.priority = 128;
282d20a1d90SGuenter Roeck 	err = register_restart_handler(&sunxi_wdt->restart_handler);
283d20a1d90SGuenter Roeck 	if (err)
284d20a1d90SGuenter Roeck 		dev_err(&pdev->dev,
285d20a1d90SGuenter Roeck 			"cannot register restart handler (err=%d)\n", err);
286440e96bcSMaxime Ripard 
287d00680edSCarlo Caione 	dev_info(&pdev->dev, "Watchdog enabled (timeout=%d sec, nowayout=%d)",
288d00680edSCarlo Caione 			sunxi_wdt->wdt_dev.timeout, nowayout);
289d00680edSCarlo Caione 
290d00680edSCarlo Caione 	return 0;
291d00680edSCarlo Caione }
292d00680edSCarlo Caione 
2931d5898b4SMaxime Ripard static int sunxi_wdt_remove(struct platform_device *pdev)
294d00680edSCarlo Caione {
295d00680edSCarlo Caione 	struct sunxi_wdt_dev *sunxi_wdt = platform_get_drvdata(pdev);
296d00680edSCarlo Caione 
297d20a1d90SGuenter Roeck 	unregister_restart_handler(&sunxi_wdt->restart_handler);
298440e96bcSMaxime Ripard 
299d00680edSCarlo Caione 	watchdog_unregister_device(&sunxi_wdt->wdt_dev);
300d00680edSCarlo Caione 	watchdog_set_drvdata(&sunxi_wdt->wdt_dev, NULL);
301d00680edSCarlo Caione 
302d00680edSCarlo Caione 	return 0;
303d00680edSCarlo Caione }
304d00680edSCarlo Caione 
305d00680edSCarlo Caione static void sunxi_wdt_shutdown(struct platform_device *pdev)
306d00680edSCarlo Caione {
307d00680edSCarlo Caione 	struct sunxi_wdt_dev *sunxi_wdt = platform_get_drvdata(pdev);
308d00680edSCarlo Caione 
309d00680edSCarlo Caione 	sunxi_wdt_stop(&sunxi_wdt->wdt_dev);
310d00680edSCarlo Caione }
311d00680edSCarlo Caione 
312d00680edSCarlo Caione static struct platform_driver sunxi_wdt_driver = {
313d00680edSCarlo Caione 	.probe		= sunxi_wdt_probe,
314d00680edSCarlo Caione 	.remove		= sunxi_wdt_remove,
315d00680edSCarlo Caione 	.shutdown	= sunxi_wdt_shutdown,
316d00680edSCarlo Caione 	.driver		= {
317d00680edSCarlo Caione 		.owner		= THIS_MODULE,
318d00680edSCarlo Caione 		.name		= DRV_NAME,
31985eee819SSachin Kamat 		.of_match_table	= sunxi_wdt_dt_ids,
320d00680edSCarlo Caione 	},
321d00680edSCarlo Caione };
322d00680edSCarlo Caione 
323d00680edSCarlo Caione module_platform_driver(sunxi_wdt_driver);
324d00680edSCarlo Caione 
325d00680edSCarlo Caione module_param(timeout, uint, 0);
326d00680edSCarlo Caione MODULE_PARM_DESC(timeout, "Watchdog heartbeat in seconds");
327d00680edSCarlo Caione 
328d00680edSCarlo Caione module_param(nowayout, bool, 0);
329d00680edSCarlo Caione MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
330d00680edSCarlo Caione 		"(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
331d00680edSCarlo Caione 
332d00680edSCarlo Caione MODULE_LICENSE("GPL");
333d00680edSCarlo Caione MODULE_AUTHOR("Carlo Caione <carlo.caione@gmail.com>");
334d00680edSCarlo Caione MODULE_AUTHOR("Henrik Nordstrom <henrik@henriknordstrom.net>");
335d00680edSCarlo Caione MODULE_DESCRIPTION("sunxi WatchDog Timer Driver");
336d00680edSCarlo Caione MODULE_VERSION(DRV_VERSION);
337