xref: /openbmc/linux/drivers/watchdog/sunxi_wdt.c (revision 4d8b229d5ea610affe672e919021e9d02cd877da)
1d00680edSCarlo Caione /*
2d00680edSCarlo Caione  *      sunxi Watchdog Driver
3d00680edSCarlo Caione  *
4d00680edSCarlo Caione  *      Copyright (c) 2013 Carlo Caione
5d00680edSCarlo Caione  *                    2012 Henrik Nordstrom
6d00680edSCarlo Caione  *
7d00680edSCarlo Caione  *      This program is free software; you can redistribute it and/or
8d00680edSCarlo Caione  *      modify it under the terms of the GNU General Public License
9d00680edSCarlo Caione  *      as published by the Free Software Foundation; either version
10d00680edSCarlo Caione  *      2 of the License, or (at your option) any later version.
11d00680edSCarlo Caione  *
12d00680edSCarlo Caione  *      Based on xen_wdt.c
13d00680edSCarlo Caione  *      (c) Copyright 2010 Novell, Inc.
14d00680edSCarlo Caione  */
15d00680edSCarlo Caione 
16d00680edSCarlo Caione #include <linux/clk.h>
17440e96bcSMaxime Ripard #include <linux/delay.h>
18d00680edSCarlo Caione #include <linux/err.h>
19d00680edSCarlo Caione #include <linux/init.h>
20d00680edSCarlo Caione #include <linux/io.h>
21d00680edSCarlo Caione #include <linux/kernel.h>
22d00680edSCarlo Caione #include <linux/module.h>
23d00680edSCarlo Caione #include <linux/moduleparam.h>
24d00680edSCarlo Caione #include <linux/of.h>
25f2147de3SChen-Yu Tsai #include <linux/of_device.h>
26d00680edSCarlo Caione #include <linux/platform_device.h>
27d00680edSCarlo Caione #include <linux/types.h>
28d00680edSCarlo Caione #include <linux/watchdog.h>
29d00680edSCarlo Caione 
30d00680edSCarlo Caione #define WDT_MAX_TIMEOUT         16
31d00680edSCarlo Caione #define WDT_MIN_TIMEOUT         1
32f2147de3SChen-Yu Tsai #define WDT_TIMEOUT_MASK        0x0F
33d00680edSCarlo Caione 
34d00680edSCarlo Caione #define WDT_CTRL_RELOAD         ((1 << 0) | (0x0a57 << 1))
35d00680edSCarlo Caione 
36d00680edSCarlo Caione #define WDT_MODE_EN             (1 << 0)
37d00680edSCarlo Caione 
38d00680edSCarlo Caione #define DRV_NAME		"sunxi-wdt"
39d00680edSCarlo Caione #define DRV_VERSION		"1.0"
40d00680edSCarlo Caione 
41d00680edSCarlo Caione static bool nowayout = WATCHDOG_NOWAYOUT;
42d00680edSCarlo Caione static unsigned int timeout = WDT_MAX_TIMEOUT;
43d00680edSCarlo Caione 
44f2147de3SChen-Yu Tsai /*
45f2147de3SChen-Yu Tsai  * This structure stores the register offsets for different variants
46f2147de3SChen-Yu Tsai  * of Allwinner's watchdog hardware.
47f2147de3SChen-Yu Tsai  */
48f2147de3SChen-Yu Tsai struct sunxi_wdt_reg {
49f2147de3SChen-Yu Tsai 	u8 wdt_ctrl;
50f2147de3SChen-Yu Tsai 	u8 wdt_cfg;
51f2147de3SChen-Yu Tsai 	u8 wdt_mode;
52f2147de3SChen-Yu Tsai 	u8 wdt_timeout_shift;
53f2147de3SChen-Yu Tsai 	u8 wdt_reset_mask;
54f2147de3SChen-Yu Tsai 	u8 wdt_reset_val;
55f2147de3SChen-Yu Tsai };
56f2147de3SChen-Yu Tsai 
57d00680edSCarlo Caione struct sunxi_wdt_dev {
58d00680edSCarlo Caione 	struct watchdog_device wdt_dev;
59d00680edSCarlo Caione 	void __iomem *wdt_base;
60f2147de3SChen-Yu Tsai 	const struct sunxi_wdt_reg *wdt_regs;
61d00680edSCarlo Caione };
62d00680edSCarlo Caione 
63d00680edSCarlo Caione /*
64d00680edSCarlo Caione  * wdt_timeout_map maps the watchdog timer interval value in seconds to
65f2147de3SChen-Yu Tsai  * the value of the register WDT_MODE at bits .wdt_timeout_shift ~ +3
66d00680edSCarlo Caione  *
67d00680edSCarlo Caione  * [timeout seconds] = register value
68d00680edSCarlo Caione  *
69d00680edSCarlo Caione  */
70d00680edSCarlo Caione 
71d00680edSCarlo Caione static const int wdt_timeout_map[] = {
7251ee34abSEmilio López 	[1] = 0x1,  /* 1s  */
7351ee34abSEmilio López 	[2] = 0x2,  /* 2s  */
7451ee34abSEmilio López 	[3] = 0x3,  /* 3s  */
7551ee34abSEmilio López 	[4] = 0x4,  /* 4s  */
7651ee34abSEmilio López 	[5] = 0x5,  /* 5s  */
7751ee34abSEmilio López 	[6] = 0x6,  /* 6s  */
7851ee34abSEmilio López 	[8] = 0x7,  /* 8s  */
7951ee34abSEmilio López 	[10] = 0x8, /* 10s */
8051ee34abSEmilio López 	[12] = 0x9, /* 12s */
8151ee34abSEmilio López 	[14] = 0xA, /* 14s */
8251ee34abSEmilio López 	[16] = 0xB, /* 16s */
83d00680edSCarlo Caione };
84d00680edSCarlo Caione 
85440e96bcSMaxime Ripard 
86*4d8b229dSGuenter Roeck static int sunxi_wdt_restart(struct watchdog_device *wdt_dev,
87*4d8b229dSGuenter Roeck 			     unsigned long action, void *data)
88440e96bcSMaxime Ripard {
890ebad1e5SDamien Riegel 	struct sunxi_wdt_dev *sunxi_wdt = watchdog_get_drvdata(wdt_dev);
90d20a1d90SGuenter Roeck 	void __iomem *wdt_base = sunxi_wdt->wdt_base;
91f2147de3SChen-Yu Tsai 	const struct sunxi_wdt_reg *regs = sunxi_wdt->wdt_regs;
92f2147de3SChen-Yu Tsai 	u32 val;
93d20a1d90SGuenter Roeck 
94f2147de3SChen-Yu Tsai 	/* Set system reset function */
95f2147de3SChen-Yu Tsai 	val = readl(wdt_base + regs->wdt_cfg);
96f2147de3SChen-Yu Tsai 	val &= ~(regs->wdt_reset_mask);
97f2147de3SChen-Yu Tsai 	val |= regs->wdt_reset_val;
98f2147de3SChen-Yu Tsai 	writel(val, wdt_base + regs->wdt_cfg);
99f2147de3SChen-Yu Tsai 
100f2147de3SChen-Yu Tsai 	/* Set lowest timeout and enable watchdog */
101f2147de3SChen-Yu Tsai 	val = readl(wdt_base + regs->wdt_mode);
102f2147de3SChen-Yu Tsai 	val &= ~(WDT_TIMEOUT_MASK << regs->wdt_timeout_shift);
103f2147de3SChen-Yu Tsai 	val |= WDT_MODE_EN;
104f2147de3SChen-Yu Tsai 	writel(val, wdt_base + regs->wdt_mode);
105440e96bcSMaxime Ripard 
106440e96bcSMaxime Ripard 	/*
107440e96bcSMaxime Ripard 	 * Restart the watchdog. The default (and lowest) interval
108440e96bcSMaxime Ripard 	 * value for the watchdog is 0.5s.
109440e96bcSMaxime Ripard 	 */
110f2147de3SChen-Yu Tsai 	writel(WDT_CTRL_RELOAD, wdt_base + regs->wdt_ctrl);
111440e96bcSMaxime Ripard 
112440e96bcSMaxime Ripard 	while (1) {
113440e96bcSMaxime Ripard 		mdelay(5);
114f2147de3SChen-Yu Tsai 		val = readl(wdt_base + regs->wdt_mode);
115f2147de3SChen-Yu Tsai 		val |= WDT_MODE_EN;
116f2147de3SChen-Yu Tsai 		writel(val, wdt_base + regs->wdt_mode);
117440e96bcSMaxime Ripard 	}
1180ebad1e5SDamien Riegel 	return 0;
119440e96bcSMaxime Ripard }
120440e96bcSMaxime Ripard 
121d00680edSCarlo Caione static int sunxi_wdt_ping(struct watchdog_device *wdt_dev)
122d00680edSCarlo Caione {
123d00680edSCarlo Caione 	struct sunxi_wdt_dev *sunxi_wdt = watchdog_get_drvdata(wdt_dev);
124d00680edSCarlo Caione 	void __iomem *wdt_base = sunxi_wdt->wdt_base;
125f2147de3SChen-Yu Tsai 	const struct sunxi_wdt_reg *regs = sunxi_wdt->wdt_regs;
126d00680edSCarlo Caione 
127f2147de3SChen-Yu Tsai 	writel(WDT_CTRL_RELOAD, wdt_base + regs->wdt_ctrl);
128d00680edSCarlo Caione 
129d00680edSCarlo Caione 	return 0;
130d00680edSCarlo Caione }
131d00680edSCarlo Caione 
132d00680edSCarlo Caione static int sunxi_wdt_set_timeout(struct watchdog_device *wdt_dev,
133d00680edSCarlo Caione 		unsigned int timeout)
134d00680edSCarlo Caione {
135d00680edSCarlo Caione 	struct sunxi_wdt_dev *sunxi_wdt = watchdog_get_drvdata(wdt_dev);
136d00680edSCarlo Caione 	void __iomem *wdt_base = sunxi_wdt->wdt_base;
137f2147de3SChen-Yu Tsai 	const struct sunxi_wdt_reg *regs = sunxi_wdt->wdt_regs;
138d00680edSCarlo Caione 	u32 reg;
139d00680edSCarlo Caione 
140d00680edSCarlo Caione 	if (wdt_timeout_map[timeout] == 0)
141d00680edSCarlo Caione 		timeout++;
142d00680edSCarlo Caione 
143d00680edSCarlo Caione 	sunxi_wdt->wdt_dev.timeout = timeout;
144d00680edSCarlo Caione 
145f2147de3SChen-Yu Tsai 	reg = readl(wdt_base + regs->wdt_mode);
146f2147de3SChen-Yu Tsai 	reg &= ~(WDT_TIMEOUT_MASK << regs->wdt_timeout_shift);
147f2147de3SChen-Yu Tsai 	reg |= wdt_timeout_map[timeout] << regs->wdt_timeout_shift;
148f2147de3SChen-Yu Tsai 	writel(reg, wdt_base + regs->wdt_mode);
149d00680edSCarlo Caione 
150d00680edSCarlo Caione 	sunxi_wdt_ping(wdt_dev);
151d00680edSCarlo Caione 
152d00680edSCarlo Caione 	return 0;
153d00680edSCarlo Caione }
154d00680edSCarlo Caione 
155d00680edSCarlo Caione static int sunxi_wdt_stop(struct watchdog_device *wdt_dev)
156d00680edSCarlo Caione {
157d00680edSCarlo Caione 	struct sunxi_wdt_dev *sunxi_wdt = watchdog_get_drvdata(wdt_dev);
158d00680edSCarlo Caione 	void __iomem *wdt_base = sunxi_wdt->wdt_base;
159f2147de3SChen-Yu Tsai 	const struct sunxi_wdt_reg *regs = sunxi_wdt->wdt_regs;
160d00680edSCarlo Caione 
161f2147de3SChen-Yu Tsai 	writel(0, wdt_base + regs->wdt_mode);
162d00680edSCarlo Caione 
163d00680edSCarlo Caione 	return 0;
164d00680edSCarlo Caione }
165d00680edSCarlo Caione 
166d00680edSCarlo Caione static int sunxi_wdt_start(struct watchdog_device *wdt_dev)
167d00680edSCarlo Caione {
168d00680edSCarlo Caione 	u32 reg;
169d00680edSCarlo Caione 	struct sunxi_wdt_dev *sunxi_wdt = watchdog_get_drvdata(wdt_dev);
170d00680edSCarlo Caione 	void __iomem *wdt_base = sunxi_wdt->wdt_base;
171f2147de3SChen-Yu Tsai 	const struct sunxi_wdt_reg *regs = sunxi_wdt->wdt_regs;
172d00680edSCarlo Caione 	int ret;
173d00680edSCarlo Caione 
174d00680edSCarlo Caione 	ret = sunxi_wdt_set_timeout(&sunxi_wdt->wdt_dev,
175d00680edSCarlo Caione 			sunxi_wdt->wdt_dev.timeout);
176d00680edSCarlo Caione 	if (ret < 0)
177d00680edSCarlo Caione 		return ret;
178d00680edSCarlo Caione 
179f2147de3SChen-Yu Tsai 	/* Set system reset function */
180f2147de3SChen-Yu Tsai 	reg = readl(wdt_base + regs->wdt_cfg);
181f2147de3SChen-Yu Tsai 	reg &= ~(regs->wdt_reset_mask);
1820919e444SFrancesco Lavra 	reg |= regs->wdt_reset_val;
183f2147de3SChen-Yu Tsai 	writel(reg, wdt_base + regs->wdt_cfg);
184f2147de3SChen-Yu Tsai 
185f2147de3SChen-Yu Tsai 	/* Enable watchdog */
186f2147de3SChen-Yu Tsai 	reg = readl(wdt_base + regs->wdt_mode);
187f2147de3SChen-Yu Tsai 	reg |= WDT_MODE_EN;
188f2147de3SChen-Yu Tsai 	writel(reg, wdt_base + regs->wdt_mode);
189d00680edSCarlo Caione 
190d00680edSCarlo Caione 	return 0;
191d00680edSCarlo Caione }
192d00680edSCarlo Caione 
193d00680edSCarlo Caione static const struct watchdog_info sunxi_wdt_info = {
194d00680edSCarlo Caione 	.identity	= DRV_NAME,
195d00680edSCarlo Caione 	.options	= WDIOF_SETTIMEOUT |
196d00680edSCarlo Caione 			  WDIOF_KEEPALIVEPING |
197d00680edSCarlo Caione 			  WDIOF_MAGICCLOSE,
198d00680edSCarlo Caione };
199d00680edSCarlo Caione 
200d00680edSCarlo Caione static const struct watchdog_ops sunxi_wdt_ops = {
201d00680edSCarlo Caione 	.owner		= THIS_MODULE,
202d00680edSCarlo Caione 	.start		= sunxi_wdt_start,
203d00680edSCarlo Caione 	.stop		= sunxi_wdt_stop,
204d00680edSCarlo Caione 	.ping		= sunxi_wdt_ping,
205d00680edSCarlo Caione 	.set_timeout	= sunxi_wdt_set_timeout,
2060ebad1e5SDamien Riegel 	.restart	= sunxi_wdt_restart,
207d00680edSCarlo Caione };
208d00680edSCarlo Caione 
209f2147de3SChen-Yu Tsai static const struct sunxi_wdt_reg sun4i_wdt_reg = {
210f2147de3SChen-Yu Tsai 	.wdt_ctrl = 0x00,
211f2147de3SChen-Yu Tsai 	.wdt_cfg = 0x04,
212f2147de3SChen-Yu Tsai 	.wdt_mode = 0x04,
213f2147de3SChen-Yu Tsai 	.wdt_timeout_shift = 3,
214f2147de3SChen-Yu Tsai 	.wdt_reset_mask = 0x02,
215f2147de3SChen-Yu Tsai 	.wdt_reset_val = 0x02,
216f2147de3SChen-Yu Tsai };
217f2147de3SChen-Yu Tsai 
218c5ec618fSChen-Yu Tsai static const struct sunxi_wdt_reg sun6i_wdt_reg = {
219c5ec618fSChen-Yu Tsai 	.wdt_ctrl = 0x10,
220c5ec618fSChen-Yu Tsai 	.wdt_cfg = 0x14,
221c5ec618fSChen-Yu Tsai 	.wdt_mode = 0x18,
222c5ec618fSChen-Yu Tsai 	.wdt_timeout_shift = 4,
223c5ec618fSChen-Yu Tsai 	.wdt_reset_mask = 0x03,
224c5ec618fSChen-Yu Tsai 	.wdt_reset_val = 0x01,
225c5ec618fSChen-Yu Tsai };
226c5ec618fSChen-Yu Tsai 
227f2147de3SChen-Yu Tsai static const struct of_device_id sunxi_wdt_dt_ids[] = {
228f2147de3SChen-Yu Tsai 	{ .compatible = "allwinner,sun4i-a10-wdt", .data = &sun4i_wdt_reg },
229c5ec618fSChen-Yu Tsai 	{ .compatible = "allwinner,sun6i-a31-wdt", .data = &sun6i_wdt_reg },
230f2147de3SChen-Yu Tsai 	{ /* sentinel */ }
231f2147de3SChen-Yu Tsai };
232f2147de3SChen-Yu Tsai MODULE_DEVICE_TABLE(of, sunxi_wdt_dt_ids);
233f2147de3SChen-Yu Tsai 
2341d5898b4SMaxime Ripard static int sunxi_wdt_probe(struct platform_device *pdev)
235d00680edSCarlo Caione {
236d00680edSCarlo Caione 	struct sunxi_wdt_dev *sunxi_wdt;
237f2147de3SChen-Yu Tsai 	const struct of_device_id *device;
238d00680edSCarlo Caione 	struct resource *res;
239d00680edSCarlo Caione 	int err;
240d00680edSCarlo Caione 
241d00680edSCarlo Caione 	sunxi_wdt = devm_kzalloc(&pdev->dev, sizeof(*sunxi_wdt), GFP_KERNEL);
242d00680edSCarlo Caione 	if (!sunxi_wdt)
243d00680edSCarlo Caione 		return -EINVAL;
244d00680edSCarlo Caione 
245d00680edSCarlo Caione 	platform_set_drvdata(pdev, sunxi_wdt);
246d00680edSCarlo Caione 
247f2147de3SChen-Yu Tsai 	device = of_match_device(sunxi_wdt_dt_ids, &pdev->dev);
248f2147de3SChen-Yu Tsai 	if (!device)
249f2147de3SChen-Yu Tsai 		return -ENODEV;
250f2147de3SChen-Yu Tsai 
251f2147de3SChen-Yu Tsai 	sunxi_wdt->wdt_regs = device->data;
252f2147de3SChen-Yu Tsai 
253d00680edSCarlo Caione 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
254d00680edSCarlo Caione 	sunxi_wdt->wdt_base = devm_ioremap_resource(&pdev->dev, res);
255d00680edSCarlo Caione 	if (IS_ERR(sunxi_wdt->wdt_base))
256d00680edSCarlo Caione 		return PTR_ERR(sunxi_wdt->wdt_base);
257d00680edSCarlo Caione 
258d00680edSCarlo Caione 	sunxi_wdt->wdt_dev.info = &sunxi_wdt_info;
259d00680edSCarlo Caione 	sunxi_wdt->wdt_dev.ops = &sunxi_wdt_ops;
260d00680edSCarlo Caione 	sunxi_wdt->wdt_dev.timeout = WDT_MAX_TIMEOUT;
261d00680edSCarlo Caione 	sunxi_wdt->wdt_dev.max_timeout = WDT_MAX_TIMEOUT;
262d00680edSCarlo Caione 	sunxi_wdt->wdt_dev.min_timeout = WDT_MIN_TIMEOUT;
263d00680edSCarlo Caione 	sunxi_wdt->wdt_dev.parent = &pdev->dev;
264d00680edSCarlo Caione 
265d00680edSCarlo Caione 	watchdog_init_timeout(&sunxi_wdt->wdt_dev, timeout, &pdev->dev);
266d00680edSCarlo Caione 	watchdog_set_nowayout(&sunxi_wdt->wdt_dev, nowayout);
2670ebad1e5SDamien Riegel 	watchdog_set_restart_priority(&sunxi_wdt->wdt_dev, 128);
268d00680edSCarlo Caione 
269d00680edSCarlo Caione 	watchdog_set_drvdata(&sunxi_wdt->wdt_dev, sunxi_wdt);
270d00680edSCarlo Caione 
271d00680edSCarlo Caione 	sunxi_wdt_stop(&sunxi_wdt->wdt_dev);
272d00680edSCarlo Caione 
273d00680edSCarlo Caione 	err = watchdog_register_device(&sunxi_wdt->wdt_dev);
274d00680edSCarlo Caione 	if (unlikely(err))
275d00680edSCarlo Caione 		return err;
276d00680edSCarlo Caione 
277d00680edSCarlo Caione 	dev_info(&pdev->dev, "Watchdog enabled (timeout=%d sec, nowayout=%d)",
278d00680edSCarlo Caione 			sunxi_wdt->wdt_dev.timeout, nowayout);
279d00680edSCarlo Caione 
280d00680edSCarlo Caione 	return 0;
281d00680edSCarlo Caione }
282d00680edSCarlo Caione 
2831d5898b4SMaxime Ripard static int sunxi_wdt_remove(struct platform_device *pdev)
284d00680edSCarlo Caione {
285d00680edSCarlo Caione 	struct sunxi_wdt_dev *sunxi_wdt = platform_get_drvdata(pdev);
286d00680edSCarlo Caione 
287d00680edSCarlo Caione 	watchdog_unregister_device(&sunxi_wdt->wdt_dev);
288d00680edSCarlo Caione 	watchdog_set_drvdata(&sunxi_wdt->wdt_dev, NULL);
289d00680edSCarlo Caione 
290d00680edSCarlo Caione 	return 0;
291d00680edSCarlo Caione }
292d00680edSCarlo Caione 
293d00680edSCarlo Caione static void sunxi_wdt_shutdown(struct platform_device *pdev)
294d00680edSCarlo Caione {
295d00680edSCarlo Caione 	struct sunxi_wdt_dev *sunxi_wdt = platform_get_drvdata(pdev);
296d00680edSCarlo Caione 
297d00680edSCarlo Caione 	sunxi_wdt_stop(&sunxi_wdt->wdt_dev);
298d00680edSCarlo Caione }
299d00680edSCarlo Caione 
300d00680edSCarlo Caione static struct platform_driver sunxi_wdt_driver = {
301d00680edSCarlo Caione 	.probe		= sunxi_wdt_probe,
302d00680edSCarlo Caione 	.remove		= sunxi_wdt_remove,
303d00680edSCarlo Caione 	.shutdown	= sunxi_wdt_shutdown,
304d00680edSCarlo Caione 	.driver		= {
305d00680edSCarlo Caione 		.name		= DRV_NAME,
30685eee819SSachin Kamat 		.of_match_table	= sunxi_wdt_dt_ids,
307d00680edSCarlo Caione 	},
308d00680edSCarlo Caione };
309d00680edSCarlo Caione 
310d00680edSCarlo Caione module_platform_driver(sunxi_wdt_driver);
311d00680edSCarlo Caione 
312d00680edSCarlo Caione module_param(timeout, uint, 0);
313d00680edSCarlo Caione MODULE_PARM_DESC(timeout, "Watchdog heartbeat in seconds");
314d00680edSCarlo Caione 
315d00680edSCarlo Caione module_param(nowayout, bool, 0);
316d00680edSCarlo Caione MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
317d00680edSCarlo Caione 		"(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
318d00680edSCarlo Caione 
319d00680edSCarlo Caione MODULE_LICENSE("GPL");
320d00680edSCarlo Caione MODULE_AUTHOR("Carlo Caione <carlo.caione@gmail.com>");
321d00680edSCarlo Caione MODULE_AUTHOR("Henrik Nordstrom <henrik@henriknordstrom.net>");
322d00680edSCarlo Caione MODULE_DESCRIPTION("sunxi WatchDog Timer Driver");
323d00680edSCarlo Caione MODULE_VERSION(DRV_VERSION);
324