1d0305aacSLinus Walleij // SPDX-License-Identifier: GPL-2.0-only
2d0305aacSLinus Walleij /*
3d0305aacSLinus Walleij * Copyright (C) ST-Ericsson SA 2011-2013
4d0305aacSLinus Walleij *
5d0305aacSLinus Walleij * Author: Mathieu Poirier <mathieu.poirier@linaro.org> for ST-Ericsson
6d0305aacSLinus Walleij * Author: Jonas Aaberg <jonas.aberg@stericsson.com> for ST-Ericsson
7d0305aacSLinus Walleij */
8d0305aacSLinus Walleij
9d0305aacSLinus Walleij #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
10d0305aacSLinus Walleij
11d0305aacSLinus Walleij #include <linux/module.h>
12d0305aacSLinus Walleij #include <linux/kernel.h>
13d0305aacSLinus Walleij #include <linux/moduleparam.h>
14d0305aacSLinus Walleij #include <linux/err.h>
15d0305aacSLinus Walleij #include <linux/uaccess.h>
16d0305aacSLinus Walleij #include <linux/watchdog.h>
17d0305aacSLinus Walleij #include <linux/platform_device.h>
18d0305aacSLinus Walleij
19d0305aacSLinus Walleij #include <linux/mfd/dbx500-prcmu.h>
20d0305aacSLinus Walleij
21d0305aacSLinus Walleij #define WATCHDOG_TIMEOUT 600 /* 10 minutes */
22d0305aacSLinus Walleij
23d0305aacSLinus Walleij #define WATCHDOG_MIN 0
24d0305aacSLinus Walleij #define WATCHDOG_MAX28 268435 /* 28 bit resolution in ms == 268435.455 s */
25d0305aacSLinus Walleij
26d0305aacSLinus Walleij static unsigned int timeout = WATCHDOG_TIMEOUT;
27d0305aacSLinus Walleij module_param(timeout, uint, 0);
28d0305aacSLinus Walleij MODULE_PARM_DESC(timeout,
29d0305aacSLinus Walleij "Watchdog timeout in seconds. default="
30d0305aacSLinus Walleij __MODULE_STRING(WATCHDOG_TIMEOUT) ".");
31d0305aacSLinus Walleij
32d0305aacSLinus Walleij static bool nowayout = WATCHDOG_NOWAYOUT;
33d0305aacSLinus Walleij module_param(nowayout, bool, 0);
34d0305aacSLinus Walleij MODULE_PARM_DESC(nowayout,
35d0305aacSLinus Walleij "Watchdog cannot be stopped once started (default="
36d0305aacSLinus Walleij __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
37d0305aacSLinus Walleij
db8500_wdt_start(struct watchdog_device * wdd)38c7388880SLinus Walleij static int db8500_wdt_start(struct watchdog_device *wdd)
39d0305aacSLinus Walleij {
40d0305aacSLinus Walleij return prcmu_enable_a9wdog(PRCMU_WDOG_ALL);
41d0305aacSLinus Walleij }
42d0305aacSLinus Walleij
db8500_wdt_stop(struct watchdog_device * wdd)43c7388880SLinus Walleij static int db8500_wdt_stop(struct watchdog_device *wdd)
44d0305aacSLinus Walleij {
45d0305aacSLinus Walleij return prcmu_disable_a9wdog(PRCMU_WDOG_ALL);
46d0305aacSLinus Walleij }
47d0305aacSLinus Walleij
db8500_wdt_keepalive(struct watchdog_device * wdd)48c7388880SLinus Walleij static int db8500_wdt_keepalive(struct watchdog_device *wdd)
49d0305aacSLinus Walleij {
50d0305aacSLinus Walleij return prcmu_kick_a9wdog(PRCMU_WDOG_ALL);
51d0305aacSLinus Walleij }
52d0305aacSLinus Walleij
db8500_wdt_set_timeout(struct watchdog_device * wdd,unsigned int timeout)53c7388880SLinus Walleij static int db8500_wdt_set_timeout(struct watchdog_device *wdd,
54d0305aacSLinus Walleij unsigned int timeout)
55d0305aacSLinus Walleij {
56c7388880SLinus Walleij db8500_wdt_stop(wdd);
57d0305aacSLinus Walleij prcmu_load_a9wdog(PRCMU_WDOG_ALL, timeout * 1000);
58c7388880SLinus Walleij db8500_wdt_start(wdd);
59d0305aacSLinus Walleij
60d0305aacSLinus Walleij return 0;
61d0305aacSLinus Walleij }
62d0305aacSLinus Walleij
63c7388880SLinus Walleij static const struct watchdog_info db8500_wdt_info = {
64d0305aacSLinus Walleij .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
65c7388880SLinus Walleij .identity = "DB8500 WDT",
66d0305aacSLinus Walleij .firmware_version = 1,
67d0305aacSLinus Walleij };
68d0305aacSLinus Walleij
69c7388880SLinus Walleij static const struct watchdog_ops db8500_wdt_ops = {
70d0305aacSLinus Walleij .owner = THIS_MODULE,
71c7388880SLinus Walleij .start = db8500_wdt_start,
72c7388880SLinus Walleij .stop = db8500_wdt_stop,
73c7388880SLinus Walleij .ping = db8500_wdt_keepalive,
74c7388880SLinus Walleij .set_timeout = db8500_wdt_set_timeout,
75d0305aacSLinus Walleij };
76d0305aacSLinus Walleij
77c7388880SLinus Walleij static struct watchdog_device db8500_wdt = {
78c7388880SLinus Walleij .info = &db8500_wdt_info,
79c7388880SLinus Walleij .ops = &db8500_wdt_ops,
80d0305aacSLinus Walleij .min_timeout = WATCHDOG_MIN,
81d0305aacSLinus Walleij .max_timeout = WATCHDOG_MAX28,
82d0305aacSLinus Walleij };
83d0305aacSLinus Walleij
db8500_wdt_probe(struct platform_device * pdev)84c7388880SLinus Walleij static int db8500_wdt_probe(struct platform_device *pdev)
85d0305aacSLinus Walleij {
86d0305aacSLinus Walleij struct device *dev = &pdev->dev;
87d0305aacSLinus Walleij int ret;
88d0305aacSLinus Walleij
89d0305aacSLinus Walleij timeout = 600; /* Default to 10 minutes */
90c7388880SLinus Walleij db8500_wdt.parent = dev;
91c7388880SLinus Walleij watchdog_set_nowayout(&db8500_wdt, nowayout);
92d0305aacSLinus Walleij
93d0305aacSLinus Walleij /* disable auto off on sleep */
94d0305aacSLinus Walleij prcmu_config_a9wdog(PRCMU_WDOG_CPU1, false);
95d0305aacSLinus Walleij
96d0305aacSLinus Walleij /* set HW initial value */
97d0305aacSLinus Walleij prcmu_load_a9wdog(PRCMU_WDOG_ALL, timeout * 1000);
98d0305aacSLinus Walleij
99c7388880SLinus Walleij ret = devm_watchdog_register_device(dev, &db8500_wdt);
100d0305aacSLinus Walleij if (ret)
101d0305aacSLinus Walleij return ret;
102d0305aacSLinus Walleij
103d0305aacSLinus Walleij dev_info(dev, "initialized\n");
104d0305aacSLinus Walleij
105d0305aacSLinus Walleij return 0;
106d0305aacSLinus Walleij }
107d0305aacSLinus Walleij
db8500_wdt_suspend(struct platform_device * pdev,pm_message_t state)108c7388880SLinus Walleij static int db8500_wdt_suspend(struct platform_device *pdev,
109d0305aacSLinus Walleij pm_message_t state)
110d0305aacSLinus Walleij {
111c7388880SLinus Walleij if (watchdog_active(&db8500_wdt)) {
112c7388880SLinus Walleij db8500_wdt_stop(&db8500_wdt);
113d0305aacSLinus Walleij prcmu_config_a9wdog(PRCMU_WDOG_CPU1, true);
114d0305aacSLinus Walleij
115d0305aacSLinus Walleij prcmu_load_a9wdog(PRCMU_WDOG_ALL, timeout * 1000);
116c7388880SLinus Walleij db8500_wdt_start(&db8500_wdt);
117d0305aacSLinus Walleij }
118d0305aacSLinus Walleij return 0;
119d0305aacSLinus Walleij }
120d0305aacSLinus Walleij
db8500_wdt_resume(struct platform_device * pdev)121c7388880SLinus Walleij static int db8500_wdt_resume(struct platform_device *pdev)
122d0305aacSLinus Walleij {
123c7388880SLinus Walleij if (watchdog_active(&db8500_wdt)) {
124c7388880SLinus Walleij db8500_wdt_stop(&db8500_wdt);
125d0305aacSLinus Walleij prcmu_config_a9wdog(PRCMU_WDOG_CPU1, false);
126d0305aacSLinus Walleij
127d0305aacSLinus Walleij prcmu_load_a9wdog(PRCMU_WDOG_ALL, timeout * 1000);
128c7388880SLinus Walleij db8500_wdt_start(&db8500_wdt);
129d0305aacSLinus Walleij }
130d0305aacSLinus Walleij return 0;
131d0305aacSLinus Walleij }
132d0305aacSLinus Walleij
133c7388880SLinus Walleij static struct platform_driver db8500_wdt_driver = {
134c7388880SLinus Walleij .probe = db8500_wdt_probe,
135*b49e2a3cSPaul Cercueil .suspend = pm_ptr(db8500_wdt_suspend),
136*b49e2a3cSPaul Cercueil .resume = pm_ptr(db8500_wdt_resume),
137d0305aacSLinus Walleij .driver = {
138c7388880SLinus Walleij .name = "db8500_wdt",
139d0305aacSLinus Walleij },
140d0305aacSLinus Walleij };
141d0305aacSLinus Walleij
142c7388880SLinus Walleij module_platform_driver(db8500_wdt_driver);
143d0305aacSLinus Walleij
144d0305aacSLinus Walleij MODULE_AUTHOR("Jonas Aaberg <jonas.aberg@stericsson.com>");
145c7388880SLinus Walleij MODULE_DESCRIPTION("DB8500 Watchdog Driver");
146d0305aacSLinus Walleij MODULE_LICENSE("GPL");
147c7388880SLinus Walleij MODULE_ALIAS("platform:db8500_wdt");
148