174ba9207SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later
2b7e04f8cSWim Van Sebroeck /*
3b7e04f8cSWim Van Sebroeck * sma cpu5 watchdog driver
4b7e04f8cSWim Van Sebroeck *
5b7e04f8cSWim Van Sebroeck * Copyright (C) 2003 Heiko Ronsdorf <hero@ihg.uni-duisburg.de>
6b7e04f8cSWim Van Sebroeck */
7b7e04f8cSWim Van Sebroeck
827c766aaSJoe Perches #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
927c766aaSJoe Perches
10b7e04f8cSWim Van Sebroeck #include <linux/module.h>
11b7e04f8cSWim Van Sebroeck #include <linux/moduleparam.h>
12b7e04f8cSWim Van Sebroeck #include <linux/types.h>
13b7e04f8cSWim Van Sebroeck #include <linux/errno.h>
14b7e04f8cSWim Van Sebroeck #include <linux/miscdevice.h>
15b7e04f8cSWim Van Sebroeck #include <linux/fs.h>
16b7e04f8cSWim Van Sebroeck #include <linux/ioport.h>
17b7e04f8cSWim Van Sebroeck #include <linux/timer.h>
18b7e04f8cSWim Van Sebroeck #include <linux/completion.h>
19b7e04f8cSWim Van Sebroeck #include <linux/jiffies.h>
206f932f18SAlan Cox #include <linux/io.h>
216f932f18SAlan Cox #include <linux/uaccess.h>
22b7e04f8cSWim Van Sebroeck #include <linux/watchdog.h>
23b7e04f8cSWim Van Sebroeck
24b7e04f8cSWim Van Sebroeck /* adjustable parameters */
25b7e04f8cSWim Van Sebroeck
266f932f18SAlan Cox static int verbose;
27b7e04f8cSWim Van Sebroeck static int port = 0x91;
28b7e04f8cSWim Van Sebroeck static int ticks = 10000;
291334f329SAxel Lin static DEFINE_SPINLOCK(cpu5wdt_lock);
30b7e04f8cSWim Van Sebroeck
31b7e04f8cSWim Van Sebroeck #define PFX "cpu5wdt: "
32b7e04f8cSWim Van Sebroeck
33b7e04f8cSWim Van Sebroeck #define CPU5WDT_EXTENT 0x0A
34b7e04f8cSWim Van Sebroeck
35b7e04f8cSWim Van Sebroeck #define CPU5WDT_STATUS_REG 0x00
36b7e04f8cSWim Van Sebroeck #define CPU5WDT_TIME_A_REG 0x02
37b7e04f8cSWim Van Sebroeck #define CPU5WDT_TIME_B_REG 0x03
38b7e04f8cSWim Van Sebroeck #define CPU5WDT_MODE_REG 0x04
39b7e04f8cSWim Van Sebroeck #define CPU5WDT_TRIGGER_REG 0x07
40b7e04f8cSWim Van Sebroeck #define CPU5WDT_ENABLE_REG 0x08
41b7e04f8cSWim Van Sebroeck #define CPU5WDT_RESET_REG 0x09
42b7e04f8cSWim Van Sebroeck
43b7e04f8cSWim Van Sebroeck #define CPU5WDT_INTERVAL (HZ/10+1)
44b7e04f8cSWim Van Sebroeck
45b7e04f8cSWim Van Sebroeck /* some device data */
46b7e04f8cSWim Van Sebroeck
47b7e04f8cSWim Van Sebroeck static struct {
48b7e04f8cSWim Van Sebroeck struct completion stop;
49996d62d4SFlorian Fainelli int running;
50b7e04f8cSWim Van Sebroeck struct timer_list timer;
51996d62d4SFlorian Fainelli int queue;
52b7e04f8cSWim Van Sebroeck int default_ticks;
53b7e04f8cSWim Van Sebroeck unsigned long inuse;
54b7e04f8cSWim Van Sebroeck } cpu5wdt_device;
55b7e04f8cSWim Van Sebroeck
56b7e04f8cSWim Van Sebroeck /* generic helper functions */
57b7e04f8cSWim Van Sebroeck
cpu5wdt_trigger(struct timer_list * unused)58e99e88a9SKees Cook static void cpu5wdt_trigger(struct timer_list *unused)
59b7e04f8cSWim Van Sebroeck {
60b7e04f8cSWim Van Sebroeck if (verbose > 2)
6127c766aaSJoe Perches pr_debug("trigger at %i ticks\n", ticks);
62b7e04f8cSWim Van Sebroeck
63b7e04f8cSWim Van Sebroeck if (cpu5wdt_device.running)
64b7e04f8cSWim Van Sebroeck ticks--;
65b7e04f8cSWim Van Sebroeck
666f932f18SAlan Cox spin_lock(&cpu5wdt_lock);
67b7e04f8cSWim Van Sebroeck /* keep watchdog alive */
68b7e04f8cSWim Van Sebroeck outb(1, port + CPU5WDT_TRIGGER_REG);
69b7e04f8cSWim Van Sebroeck
70b7e04f8cSWim Van Sebroeck /* requeue?? */
71b7e04f8cSWim Van Sebroeck if (cpu5wdt_device.queue && ticks)
72b7e04f8cSWim Van Sebroeck mod_timer(&cpu5wdt_device.timer, jiffies + CPU5WDT_INTERVAL);
73b7e04f8cSWim Van Sebroeck else {
74b7e04f8cSWim Van Sebroeck /* ticks doesn't matter anyway */
75b7e04f8cSWim Van Sebroeck complete(&cpu5wdt_device.stop);
76b7e04f8cSWim Van Sebroeck }
776f932f18SAlan Cox spin_unlock(&cpu5wdt_lock);
78b7e04f8cSWim Van Sebroeck
79b7e04f8cSWim Van Sebroeck }
80b7e04f8cSWim Van Sebroeck
cpu5wdt_reset(void)81b7e04f8cSWim Van Sebroeck static void cpu5wdt_reset(void)
82b7e04f8cSWim Van Sebroeck {
83b7e04f8cSWim Van Sebroeck ticks = cpu5wdt_device.default_ticks;
84b7e04f8cSWim Van Sebroeck
85b7e04f8cSWim Van Sebroeck if (verbose)
8627c766aaSJoe Perches pr_debug("reset (%i ticks)\n", (int) ticks);
87b7e04f8cSWim Van Sebroeck
88b7e04f8cSWim Van Sebroeck }
89b7e04f8cSWim Van Sebroeck
cpu5wdt_start(void)90b7e04f8cSWim Van Sebroeck static void cpu5wdt_start(void)
91b7e04f8cSWim Van Sebroeck {
926f932f18SAlan Cox unsigned long flags;
936f932f18SAlan Cox
946f932f18SAlan Cox spin_lock_irqsave(&cpu5wdt_lock, flags);
95b7e04f8cSWim Van Sebroeck if (!cpu5wdt_device.queue) {
96b7e04f8cSWim Van Sebroeck cpu5wdt_device.queue = 1;
97b7e04f8cSWim Van Sebroeck outb(0, port + CPU5WDT_TIME_A_REG);
98b7e04f8cSWim Van Sebroeck outb(0, port + CPU5WDT_TIME_B_REG);
99b7e04f8cSWim Van Sebroeck outb(1, port + CPU5WDT_MODE_REG);
100b7e04f8cSWim Van Sebroeck outb(0, port + CPU5WDT_RESET_REG);
101b7e04f8cSWim Van Sebroeck outb(0, port + CPU5WDT_ENABLE_REG);
102b7e04f8cSWim Van Sebroeck mod_timer(&cpu5wdt_device.timer, jiffies + CPU5WDT_INTERVAL);
103b7e04f8cSWim Van Sebroeck }
104b7e04f8cSWim Van Sebroeck /* if process dies, counter is not decremented */
105b7e04f8cSWim Van Sebroeck cpu5wdt_device.running++;
1066f932f18SAlan Cox spin_unlock_irqrestore(&cpu5wdt_lock, flags);
107b7e04f8cSWim Van Sebroeck }
108b7e04f8cSWim Van Sebroeck
cpu5wdt_stop(void)109b7e04f8cSWim Van Sebroeck static int cpu5wdt_stop(void)
110b7e04f8cSWim Van Sebroeck {
1116f932f18SAlan Cox unsigned long flags;
1126f932f18SAlan Cox
1136f932f18SAlan Cox spin_lock_irqsave(&cpu5wdt_lock, flags);
114b7e04f8cSWim Van Sebroeck if (cpu5wdt_device.running)
115b7e04f8cSWim Van Sebroeck cpu5wdt_device.running = 0;
116b7e04f8cSWim Van Sebroeck ticks = cpu5wdt_device.default_ticks;
1176f932f18SAlan Cox spin_unlock_irqrestore(&cpu5wdt_lock, flags);
118b7e04f8cSWim Van Sebroeck if (verbose)
11927c766aaSJoe Perches pr_crit("stop not possible\n");
120b7e04f8cSWim Van Sebroeck return -EIO;
121b7e04f8cSWim Van Sebroeck }
122b7e04f8cSWim Van Sebroeck
123b7e04f8cSWim Van Sebroeck /* filesystem operations */
124b7e04f8cSWim Van Sebroeck
cpu5wdt_open(struct inode * inode,struct file * file)125b7e04f8cSWim Van Sebroeck static int cpu5wdt_open(struct inode *inode, struct file *file)
126b7e04f8cSWim Van Sebroeck {
127b7e04f8cSWim Van Sebroeck if (test_and_set_bit(0, &cpu5wdt_device.inuse))
128b7e04f8cSWim Van Sebroeck return -EBUSY;
129c5bf68feSKirill Smelkov return stream_open(inode, file);
130b7e04f8cSWim Van Sebroeck }
131b7e04f8cSWim Van Sebroeck
cpu5wdt_release(struct inode * inode,struct file * file)132b7e04f8cSWim Van Sebroeck static int cpu5wdt_release(struct inode *inode, struct file *file)
133b7e04f8cSWim Van Sebroeck {
134b7e04f8cSWim Van Sebroeck clear_bit(0, &cpu5wdt_device.inuse);
135b7e04f8cSWim Van Sebroeck return 0;
136b7e04f8cSWim Van Sebroeck }
137b7e04f8cSWim Van Sebroeck
cpu5wdt_ioctl(struct file * file,unsigned int cmd,unsigned long arg)1386f932f18SAlan Cox static long cpu5wdt_ioctl(struct file *file, unsigned int cmd,
1396f932f18SAlan Cox unsigned long arg)
140b7e04f8cSWim Van Sebroeck {
141b7e04f8cSWim Van Sebroeck void __user *argp = (void __user *)arg;
1426f932f18SAlan Cox int __user *p = argp;
143b7e04f8cSWim Van Sebroeck unsigned int value;
14442747d71SWim Van Sebroeck static const struct watchdog_info ident = {
145b7e04f8cSWim Van Sebroeck .options = WDIOF_CARDRESET,
146b7e04f8cSWim Van Sebroeck .identity = "CPU5 WDT",
147b7e04f8cSWim Van Sebroeck };
148b7e04f8cSWim Van Sebroeck
149b7e04f8cSWim Van Sebroeck switch (cmd) {
1500c06090cSWim Van Sebroeck case WDIOC_GETSUPPORT:
1510c06090cSWim Van Sebroeck if (copy_to_user(argp, &ident, sizeof(ident)))
1520c06090cSWim Van Sebroeck return -EFAULT;
153b7e04f8cSWim Van Sebroeck break;
154b7e04f8cSWim Van Sebroeck case WDIOC_GETSTATUS:
155b7e04f8cSWim Van Sebroeck value = inb(port + CPU5WDT_STATUS_REG);
156b7e04f8cSWim Van Sebroeck value = (value >> 2) & 1;
1576f932f18SAlan Cox return put_user(value, p);
158b7e04f8cSWim Van Sebroeck case WDIOC_GETBOOTSTATUS:
1596f932f18SAlan Cox return put_user(0, p);
160b7e04f8cSWim Van Sebroeck case WDIOC_SETOPTIONS:
1616f932f18SAlan Cox if (get_user(value, p))
162b7e04f8cSWim Van Sebroeck return -EFAULT;
1636f932f18SAlan Cox if (value & WDIOS_ENABLECARD)
164b7e04f8cSWim Van Sebroeck cpu5wdt_start();
1656f932f18SAlan Cox if (value & WDIOS_DISABLECARD)
1666f932f18SAlan Cox cpu5wdt_stop();
167b7e04f8cSWim Van Sebroeck break;
1680c06090cSWim Van Sebroeck case WDIOC_KEEPALIVE:
1690c06090cSWim Van Sebroeck cpu5wdt_reset();
1700c06090cSWim Van Sebroeck break;
171b7e04f8cSWim Van Sebroeck default:
172b7e04f8cSWim Van Sebroeck return -ENOTTY;
173b7e04f8cSWim Van Sebroeck }
174b7e04f8cSWim Van Sebroeck return 0;
175b7e04f8cSWim Van Sebroeck }
176b7e04f8cSWim Van Sebroeck
cpu5wdt_write(struct file * file,const char __user * buf,size_t count,loff_t * ppos)1776f932f18SAlan Cox static ssize_t cpu5wdt_write(struct file *file, const char __user *buf,
1786f932f18SAlan Cox size_t count, loff_t *ppos)
179b7e04f8cSWim Van Sebroeck {
180b7e04f8cSWim Van Sebroeck if (!count)
181b7e04f8cSWim Van Sebroeck return -EIO;
182b7e04f8cSWim Van Sebroeck cpu5wdt_reset();
183b7e04f8cSWim Van Sebroeck return count;
184b7e04f8cSWim Van Sebroeck }
185b7e04f8cSWim Van Sebroeck
186b7e04f8cSWim Van Sebroeck static const struct file_operations cpu5wdt_fops = {
187b7e04f8cSWim Van Sebroeck .owner = THIS_MODULE,
188b7e04f8cSWim Van Sebroeck .llseek = no_llseek,
1896f932f18SAlan Cox .unlocked_ioctl = cpu5wdt_ioctl,
190b6dfb247SArnd Bergmann .compat_ioctl = compat_ptr_ioctl,
191b7e04f8cSWim Van Sebroeck .open = cpu5wdt_open,
192b7e04f8cSWim Van Sebroeck .write = cpu5wdt_write,
193b7e04f8cSWim Van Sebroeck .release = cpu5wdt_release,
194b7e04f8cSWim Van Sebroeck };
195b7e04f8cSWim Van Sebroeck
196b7e04f8cSWim Van Sebroeck static struct miscdevice cpu5wdt_misc = {
197b7e04f8cSWim Van Sebroeck .minor = WATCHDOG_MINOR,
198b7e04f8cSWim Van Sebroeck .name = "watchdog",
199b7e04f8cSWim Van Sebroeck .fops = &cpu5wdt_fops,
200b7e04f8cSWim Van Sebroeck };
201b7e04f8cSWim Van Sebroeck
202b7e04f8cSWim Van Sebroeck /* init/exit function */
203b7e04f8cSWim Van Sebroeck
cpu5wdt_init(void)2042d991a16SBill Pemberton static int cpu5wdt_init(void)
205b7e04f8cSWim Van Sebroeck {
206b7e04f8cSWim Van Sebroeck unsigned int val;
207b7e04f8cSWim Van Sebroeck int err;
208b7e04f8cSWim Van Sebroeck
209b7e04f8cSWim Van Sebroeck if (verbose)
21027c766aaSJoe Perches pr_debug("port=0x%x, verbose=%i\n", port, verbose);
2116f932f18SAlan Cox
2126f932f18SAlan Cox init_completion(&cpu5wdt_device.stop);
2136f932f18SAlan Cox cpu5wdt_device.queue = 0;
214e99e88a9SKees Cook timer_setup(&cpu5wdt_device.timer, cpu5wdt_trigger, 0);
2156f932f18SAlan Cox cpu5wdt_device.default_ticks = ticks;
216b7e04f8cSWim Van Sebroeck
217b7e04f8cSWim Van Sebroeck if (!request_region(port, CPU5WDT_EXTENT, PFX)) {
21827c766aaSJoe Perches pr_err("request_region failed\n");
219b7e04f8cSWim Van Sebroeck err = -EBUSY;
220b7e04f8cSWim Van Sebroeck goto no_port;
221b7e04f8cSWim Van Sebroeck }
222b7e04f8cSWim Van Sebroeck
223b7e04f8cSWim Van Sebroeck /* watchdog reboot? */
224b7e04f8cSWim Van Sebroeck val = inb(port + CPU5WDT_STATUS_REG);
225b7e04f8cSWim Van Sebroeck val = (val >> 2) & 1;
226b7e04f8cSWim Van Sebroeck if (!val)
22727c766aaSJoe Perches pr_info("sorry, was my fault\n");
228b7e04f8cSWim Van Sebroeck
2296f932f18SAlan Cox err = misc_register(&cpu5wdt_misc);
2306f932f18SAlan Cox if (err < 0) {
23127c766aaSJoe Perches pr_err("misc_register failed\n");
2326f932f18SAlan Cox goto no_misc;
2336f932f18SAlan Cox }
234b7e04f8cSWim Van Sebroeck
235b7e04f8cSWim Van Sebroeck
23627c766aaSJoe Perches pr_info("init success\n");
237b7e04f8cSWim Van Sebroeck return 0;
238b7e04f8cSWim Van Sebroeck
239b7e04f8cSWim Van Sebroeck no_misc:
240b7e04f8cSWim Van Sebroeck release_region(port, CPU5WDT_EXTENT);
241b7e04f8cSWim Van Sebroeck no_port:
242b7e04f8cSWim Van Sebroeck return err;
243b7e04f8cSWim Van Sebroeck }
244b7e04f8cSWim Van Sebroeck
cpu5wdt_init_module(void)2452d991a16SBill Pemberton static int cpu5wdt_init_module(void)
246b7e04f8cSWim Van Sebroeck {
247b7e04f8cSWim Van Sebroeck return cpu5wdt_init();
248b7e04f8cSWim Van Sebroeck }
249b7e04f8cSWim Van Sebroeck
cpu5wdt_exit(void)2504b12b896SBill Pemberton static void cpu5wdt_exit(void)
251b7e04f8cSWim Van Sebroeck {
252b7e04f8cSWim Van Sebroeck if (cpu5wdt_device.queue) {
253b7e04f8cSWim Van Sebroeck cpu5wdt_device.queue = 0;
254b7e04f8cSWim Van Sebroeck wait_for_completion(&cpu5wdt_device.stop);
255*9b1c063fSDuoming Zhou timer_shutdown_sync(&cpu5wdt_device.timer);
256b7e04f8cSWim Van Sebroeck }
257b7e04f8cSWim Van Sebroeck
258b7e04f8cSWim Van Sebroeck misc_deregister(&cpu5wdt_misc);
259b7e04f8cSWim Van Sebroeck
260b7e04f8cSWim Van Sebroeck release_region(port, CPU5WDT_EXTENT);
261b7e04f8cSWim Van Sebroeck
262b7e04f8cSWim Van Sebroeck }
263b7e04f8cSWim Van Sebroeck
cpu5wdt_exit_module(void)2644b12b896SBill Pemberton static void cpu5wdt_exit_module(void)
265b7e04f8cSWim Van Sebroeck {
266b7e04f8cSWim Van Sebroeck cpu5wdt_exit();
267b7e04f8cSWim Van Sebroeck }
268b7e04f8cSWim Van Sebroeck
269b7e04f8cSWim Van Sebroeck /* module entry points */
270b7e04f8cSWim Van Sebroeck
271b7e04f8cSWim Van Sebroeck module_init(cpu5wdt_init_module);
272b7e04f8cSWim Van Sebroeck module_exit(cpu5wdt_exit_module);
273b7e04f8cSWim Van Sebroeck
274b7e04f8cSWim Van Sebroeck MODULE_AUTHOR("Heiko Ronsdorf <hero@ihg.uni-duisburg.de>");
275b7e04f8cSWim Van Sebroeck MODULE_DESCRIPTION("sma cpu5 watchdog driver");
276b7e04f8cSWim Van Sebroeck MODULE_LICENSE("GPL");
277b7e04f8cSWim Van Sebroeck
2785d1c93ceSDavid Howells module_param_hw(port, int, ioport, 0);
279b7e04f8cSWim Van Sebroeck MODULE_PARM_DESC(port, "base address of watchdog card, default is 0x91");
280b7e04f8cSWim Van Sebroeck
281b7e04f8cSWim Van Sebroeck module_param(verbose, int, 0);
282b7e04f8cSWim Van Sebroeck MODULE_PARM_DESC(verbose, "be verbose, default is 0 (no)");
283b7e04f8cSWim Van Sebroeck
284b7e04f8cSWim Van Sebroeck module_param(ticks, int, 0);
285b7e04f8cSWim Van Sebroeck MODULE_PARM_DESC(ticks, "count down ticks, default is 10000");
286