15fd54aceSGreg Kroah-Hartman // SPDX-License-Identifier: GPL-2.0
2df2069acSChunfeng Yun /*
3df2069acSChunfeng Yun * Copyright (C) 2016 MediaTek Inc.
4df2069acSChunfeng Yun *
5df2069acSChunfeng Yun * Author: Chunfeng Yun <chunfeng.yun@mediatek.com>
6df2069acSChunfeng Yun */
7df2069acSChunfeng Yun
8df2069acSChunfeng Yun #include <linux/dma-mapping.h>
9df2069acSChunfeng Yun #include <linux/iopoll.h>
10df2069acSChunfeng Yun #include <linux/kernel.h>
11df2069acSChunfeng Yun #include <linux/module.h>
12df2069acSChunfeng Yun #include <linux/of_address.h>
13df2069acSChunfeng Yun #include <linux/of_irq.h>
14df2069acSChunfeng Yun #include <linux/platform_device.h>
15fa6f59e2SChunfeng Yun #include <linux/pm_wakeirq.h>
16e84e3e99SChunfeng Yun #include <linux/reset.h>
17df2069acSChunfeng Yun
18df2069acSChunfeng Yun #include "mtu3.h"
19b3f4e727SChunfeng Yun #include "mtu3_dr.h"
20ae078092SChunfeng Yun #include "mtu3_debug.h"
21df2069acSChunfeng Yun
22df2069acSChunfeng Yun /* u2-port0 should be powered on and enabled; */
ssusb_check_clocks(struct ssusb_mtk * ssusb,u32 ex_clks)23b3f4e727SChunfeng Yun int ssusb_check_clocks(struct ssusb_mtk *ssusb, u32 ex_clks)
24df2069acSChunfeng Yun {
25b3f4e727SChunfeng Yun void __iomem *ibase = ssusb->ippc_base;
26df2069acSChunfeng Yun u32 value, check_val;
27df2069acSChunfeng Yun int ret;
28df2069acSChunfeng Yun
29df2069acSChunfeng Yun check_val = ex_clks | SSUSB_SYS125_RST_B_STS | SSUSB_SYSPLL_STABLE |
30df2069acSChunfeng Yun SSUSB_REF_RST_B_STS;
31df2069acSChunfeng Yun
32df2069acSChunfeng Yun ret = readl_poll_timeout(ibase + U3D_SSUSB_IP_PW_STS1, value,
33df2069acSChunfeng Yun (check_val == (value & check_val)), 100, 20000);
34df2069acSChunfeng Yun if (ret) {
35b3f4e727SChunfeng Yun dev_err(ssusb->dev, "clks of sts1 are not stable!\n");
36df2069acSChunfeng Yun return ret;
37df2069acSChunfeng Yun }
38df2069acSChunfeng Yun
39df2069acSChunfeng Yun ret = readl_poll_timeout(ibase + U3D_SSUSB_IP_PW_STS2, value,
40df2069acSChunfeng Yun (value & SSUSB_U2_MAC_SYS_RST_B_STS), 100, 10000);
41df2069acSChunfeng Yun if (ret) {
42b3f4e727SChunfeng Yun dev_err(ssusb->dev, "mac2 clock is not stable\n");
43df2069acSChunfeng Yun return ret;
44df2069acSChunfeng Yun }
45df2069acSChunfeng Yun
46df2069acSChunfeng Yun return 0;
47df2069acSChunfeng Yun }
48df2069acSChunfeng Yun
wait_for_ip_sleep(struct ssusb_mtk * ssusb)496b587394SChunfeng Yun static int wait_for_ip_sleep(struct ssusb_mtk *ssusb)
506b587394SChunfeng Yun {
516b587394SChunfeng Yun bool sleep_check = true;
526b587394SChunfeng Yun u32 value;
536b587394SChunfeng Yun int ret;
546b587394SChunfeng Yun
556b587394SChunfeng Yun if (!ssusb->is_host)
566b587394SChunfeng Yun sleep_check = ssusb_gadget_ip_sleep_check(ssusb);
576b587394SChunfeng Yun
586b587394SChunfeng Yun if (!sleep_check)
596b587394SChunfeng Yun return 0;
606b587394SChunfeng Yun
616b587394SChunfeng Yun /* wait for ip enter sleep mode */
626b587394SChunfeng Yun ret = readl_poll_timeout(ssusb->ippc_base + U3D_SSUSB_IP_PW_STS1, value,
636b587394SChunfeng Yun (value & SSUSB_IP_SLEEP_STS), 100, 100000);
646b587394SChunfeng Yun if (ret) {
656b587394SChunfeng Yun dev_err(ssusb->dev, "ip sleep failed!!!\n");
666b587394SChunfeng Yun ret = -EBUSY;
67d98a30ccSChunfeng Yun } else {
68d98a30ccSChunfeng Yun /* workaround: avoid wrong wakeup signal latch for some soc */
69d98a30ccSChunfeng Yun usleep_range(100, 200);
706b587394SChunfeng Yun }
716b587394SChunfeng Yun
726b587394SChunfeng Yun return ret;
736b587394SChunfeng Yun }
746b587394SChunfeng Yun
ssusb_phy_init(struct ssusb_mtk * ssusb)75b3f4e727SChunfeng Yun static int ssusb_phy_init(struct ssusb_mtk *ssusb)
76b3f4e727SChunfeng Yun {
77b3f4e727SChunfeng Yun int i;
78b3f4e727SChunfeng Yun int ret;
79b3f4e727SChunfeng Yun
80b3f4e727SChunfeng Yun for (i = 0; i < ssusb->num_phys; i++) {
81b3f4e727SChunfeng Yun ret = phy_init(ssusb->phys[i]);
82b3f4e727SChunfeng Yun if (ret)
83b3f4e727SChunfeng Yun goto exit_phy;
84b3f4e727SChunfeng Yun }
85b3f4e727SChunfeng Yun return 0;
86b3f4e727SChunfeng Yun
87b3f4e727SChunfeng Yun exit_phy:
88b3f4e727SChunfeng Yun for (; i > 0; i--)
89b3f4e727SChunfeng Yun phy_exit(ssusb->phys[i - 1]);
90b3f4e727SChunfeng Yun
91b3f4e727SChunfeng Yun return ret;
92b3f4e727SChunfeng Yun }
93b3f4e727SChunfeng Yun
ssusb_phy_exit(struct ssusb_mtk * ssusb)94b3f4e727SChunfeng Yun static int ssusb_phy_exit(struct ssusb_mtk *ssusb)
95b3f4e727SChunfeng Yun {
96b3f4e727SChunfeng Yun int i;
97b3f4e727SChunfeng Yun
98b3f4e727SChunfeng Yun for (i = 0; i < ssusb->num_phys; i++)
99b3f4e727SChunfeng Yun phy_exit(ssusb->phys[i]);
100b3f4e727SChunfeng Yun
101b3f4e727SChunfeng Yun return 0;
102b3f4e727SChunfeng Yun }
103b3f4e727SChunfeng Yun
ssusb_phy_power_on(struct ssusb_mtk * ssusb)104b3f4e727SChunfeng Yun static int ssusb_phy_power_on(struct ssusb_mtk *ssusb)
105b3f4e727SChunfeng Yun {
106b3f4e727SChunfeng Yun int i;
107b3f4e727SChunfeng Yun int ret;
108b3f4e727SChunfeng Yun
109b3f4e727SChunfeng Yun for (i = 0; i < ssusb->num_phys; i++) {
110b3f4e727SChunfeng Yun ret = phy_power_on(ssusb->phys[i]);
111b3f4e727SChunfeng Yun if (ret)
112b3f4e727SChunfeng Yun goto power_off_phy;
113b3f4e727SChunfeng Yun }
114b3f4e727SChunfeng Yun return 0;
115b3f4e727SChunfeng Yun
116b3f4e727SChunfeng Yun power_off_phy:
117b3f4e727SChunfeng Yun for (; i > 0; i--)
118b3f4e727SChunfeng Yun phy_power_off(ssusb->phys[i - 1]);
119b3f4e727SChunfeng Yun
120b3f4e727SChunfeng Yun return ret;
121b3f4e727SChunfeng Yun }
122b3f4e727SChunfeng Yun
ssusb_phy_power_off(struct ssusb_mtk * ssusb)123b3f4e727SChunfeng Yun static void ssusb_phy_power_off(struct ssusb_mtk *ssusb)
124b3f4e727SChunfeng Yun {
125b3f4e727SChunfeng Yun unsigned int i;
126b3f4e727SChunfeng Yun
127b3f4e727SChunfeng Yun for (i = 0; i < ssusb->num_phys; i++)
128b3f4e727SChunfeng Yun phy_power_off(ssusb->phys[i]);
129b3f4e727SChunfeng Yun }
130b3f4e727SChunfeng Yun
ssusb_rscs_init(struct ssusb_mtk * ssusb)131a316da82SChunfeng Yun static int ssusb_rscs_init(struct ssusb_mtk *ssusb)
132a316da82SChunfeng Yun {
133a316da82SChunfeng Yun int ret = 0;
134a316da82SChunfeng Yun
135a316da82SChunfeng Yun ret = regulator_enable(ssusb->vusb33);
136a316da82SChunfeng Yun if (ret) {
137a316da82SChunfeng Yun dev_err(ssusb->dev, "failed to enable vusb33\n");
138a316da82SChunfeng Yun goto vusb33_err;
139a316da82SChunfeng Yun }
140a316da82SChunfeng Yun
141cd59ea91SChunfeng Yun ret = clk_bulk_prepare_enable(BULK_CLKS_CNT, ssusb->clks);
142a316da82SChunfeng Yun if (ret)
143a316da82SChunfeng Yun goto clks_err;
144a316da82SChunfeng Yun
145b3f4e727SChunfeng Yun ret = ssusb_phy_init(ssusb);
146df2069acSChunfeng Yun if (ret) {
147b3f4e727SChunfeng Yun dev_err(ssusb->dev, "failed to init phy\n");
148df2069acSChunfeng Yun goto phy_init_err;
149df2069acSChunfeng Yun }
150df2069acSChunfeng Yun
151b3f4e727SChunfeng Yun ret = ssusb_phy_power_on(ssusb);
152df2069acSChunfeng Yun if (ret) {
153b3f4e727SChunfeng Yun dev_err(ssusb->dev, "failed to power on phy\n");
154df2069acSChunfeng Yun goto phy_err;
155df2069acSChunfeng Yun }
156df2069acSChunfeng Yun
157df2069acSChunfeng Yun return 0;
158df2069acSChunfeng Yun
159df2069acSChunfeng Yun phy_err:
160b3f4e727SChunfeng Yun ssusb_phy_exit(ssusb);
161df2069acSChunfeng Yun phy_init_err:
162cd59ea91SChunfeng Yun clk_bulk_disable_unprepare(BULK_CLKS_CNT, ssusb->clks);
163a316da82SChunfeng Yun clks_err:
164b3f4e727SChunfeng Yun regulator_disable(ssusb->vusb33);
165df2069acSChunfeng Yun vusb33_err:
166df2069acSChunfeng Yun return ret;
167df2069acSChunfeng Yun }
168df2069acSChunfeng Yun
ssusb_rscs_exit(struct ssusb_mtk * ssusb)169b3f4e727SChunfeng Yun static void ssusb_rscs_exit(struct ssusb_mtk *ssusb)
170df2069acSChunfeng Yun {
171cd59ea91SChunfeng Yun clk_bulk_disable_unprepare(BULK_CLKS_CNT, ssusb->clks);
172b3f4e727SChunfeng Yun regulator_disable(ssusb->vusb33);
173b3f4e727SChunfeng Yun ssusb_phy_power_off(ssusb);
174b3f4e727SChunfeng Yun ssusb_phy_exit(ssusb);
175df2069acSChunfeng Yun }
176df2069acSChunfeng Yun
ssusb_ip_sw_reset(struct ssusb_mtk * ssusb)177b3f4e727SChunfeng Yun static void ssusb_ip_sw_reset(struct ssusb_mtk *ssusb)
178df2069acSChunfeng Yun {
179b3f4e727SChunfeng Yun /* reset whole ip (xhci & u3d) */
180b3f4e727SChunfeng Yun mtu3_setbits(ssusb->ippc_base, U3D_SSUSB_IP_PW_CTRL0, SSUSB_IP_SW_RST);
181df2069acSChunfeng Yun udelay(1);
182b3f4e727SChunfeng Yun mtu3_clrbits(ssusb->ippc_base, U3D_SSUSB_IP_PW_CTRL0, SSUSB_IP_SW_RST);
1831e3af5dfSHsin-Yi, Wang
1841e3af5dfSHsin-Yi, Wang /*
1851e3af5dfSHsin-Yi, Wang * device ip may be powered on in firmware/BROM stage before entering
1861e3af5dfSHsin-Yi, Wang * kernel stage;
1871e3af5dfSHsin-Yi, Wang * power down device ip, otherwise ip-sleep will fail when working as
1881e3af5dfSHsin-Yi, Wang * host only mode
1891e3af5dfSHsin-Yi, Wang */
1901e3af5dfSHsin-Yi, Wang mtu3_setbits(ssusb->ippc_base, U3D_SSUSB_IP_PW_CTRL2, SSUSB_IP_DEV_PDN);
191df2069acSChunfeng Yun }
192df2069acSChunfeng Yun
ssusb_u3_drd_check(struct ssusb_mtk * ssusb)193683ff6e4SChunfeng Yun static void ssusb_u3_drd_check(struct ssusb_mtk *ssusb)
194683ff6e4SChunfeng Yun {
195683ff6e4SChunfeng Yun struct otg_switch_mtk *otg_sx = &ssusb->otg_switch;
196683ff6e4SChunfeng Yun u32 dev_u3p_num;
197683ff6e4SChunfeng Yun u32 host_u3p_num;
198683ff6e4SChunfeng Yun u32 value;
199683ff6e4SChunfeng Yun
200683ff6e4SChunfeng Yun /* u3 port0 is disabled */
201683ff6e4SChunfeng Yun if (ssusb->u3p_dis_msk & BIT(0)) {
202683ff6e4SChunfeng Yun otg_sx->is_u3_drd = false;
203683ff6e4SChunfeng Yun goto out;
204683ff6e4SChunfeng Yun }
205683ff6e4SChunfeng Yun
206683ff6e4SChunfeng Yun value = mtu3_readl(ssusb->ippc_base, U3D_SSUSB_IP_DEV_CAP);
207683ff6e4SChunfeng Yun dev_u3p_num = SSUSB_IP_DEV_U3_PORT_NUM(value);
208683ff6e4SChunfeng Yun
209683ff6e4SChunfeng Yun value = mtu3_readl(ssusb->ippc_base, U3D_SSUSB_IP_XHCI_CAP);
210683ff6e4SChunfeng Yun host_u3p_num = SSUSB_IP_XHCI_U3_PORT_NUM(value);
211683ff6e4SChunfeng Yun
212683ff6e4SChunfeng Yun otg_sx->is_u3_drd = !!(dev_u3p_num && host_u3p_num);
213683ff6e4SChunfeng Yun
214683ff6e4SChunfeng Yun out:
215683ff6e4SChunfeng Yun dev_info(ssusb->dev, "usb3-drd: %d\n", otg_sx->is_u3_drd);
216683ff6e4SChunfeng Yun }
217683ff6e4SChunfeng Yun
get_ssusb_rscs(struct platform_device * pdev,struct ssusb_mtk * ssusb)218b3f4e727SChunfeng Yun static int get_ssusb_rscs(struct platform_device *pdev, struct ssusb_mtk *ssusb)
219df2069acSChunfeng Yun {
220df2069acSChunfeng Yun struct device_node *node = pdev->dev.of_node;
221d0ed062aSChunfeng Yun struct otg_switch_mtk *otg_sx = &ssusb->otg_switch;
222cd59ea91SChunfeng Yun struct clk_bulk_data *clks = ssusb->clks;
223df2069acSChunfeng Yun struct device *dev = &pdev->dev;
224b3f4e727SChunfeng Yun int i;
225b3f4e727SChunfeng Yun int ret;
226df2069acSChunfeng Yun
227ae078092SChunfeng Yun ssusb->vusb33 = devm_regulator_get(dev, "vusb33");
2285cbf2d69SChunfeng Yun if (IS_ERR(ssusb->vusb33)) {
2295cbf2d69SChunfeng Yun dev_err(dev, "failed to get vusb33\n");
2305cbf2d69SChunfeng Yun return PTR_ERR(ssusb->vusb33);
2315cbf2d69SChunfeng Yun }
2325cbf2d69SChunfeng Yun
233cd59ea91SChunfeng Yun clks[0].id = "sys_ck";
234cd59ea91SChunfeng Yun clks[1].id = "ref_ck";
235cd59ea91SChunfeng Yun clks[2].id = "mcu_ck";
236cd59ea91SChunfeng Yun clks[3].id = "dma_ck";
237*41792870SChunfeng Yun clks[4].id = "xhci_ck";
238*41792870SChunfeng Yun clks[5].id = "frmcnt_ck";
239cd59ea91SChunfeng Yun ret = devm_clk_bulk_get_optional(dev, BULK_CLKS_CNT, clks);
240cd59ea91SChunfeng Yun if (ret)
241cd59ea91SChunfeng Yun return ret;
2424d70d0c6SChunfeng Yun
243b3f4e727SChunfeng Yun ssusb->num_phys = of_count_phandle_with_args(node,
244b3f4e727SChunfeng Yun "phys", "#phy-cells");
245b3f4e727SChunfeng Yun if (ssusb->num_phys > 0) {
246b3f4e727SChunfeng Yun ssusb->phys = devm_kcalloc(dev, ssusb->num_phys,
247b3f4e727SChunfeng Yun sizeof(*ssusb->phys), GFP_KERNEL);
248b3f4e727SChunfeng Yun if (!ssusb->phys)
249b3f4e727SChunfeng Yun return -ENOMEM;
250b3f4e727SChunfeng Yun } else {
251b3f4e727SChunfeng Yun ssusb->num_phys = 0;
252df2069acSChunfeng Yun }
253df2069acSChunfeng Yun
254b3f4e727SChunfeng Yun for (i = 0; i < ssusb->num_phys; i++) {
255b3f4e727SChunfeng Yun ssusb->phys[i] = devm_of_phy_get_by_index(dev, node, i);
256b3f4e727SChunfeng Yun if (IS_ERR(ssusb->phys[i])) {
257b3f4e727SChunfeng Yun dev_err(dev, "failed to get phy-%d\n", i);
258b3f4e727SChunfeng Yun return PTR_ERR(ssusb->phys[i]);
259df2069acSChunfeng Yun }
260df2069acSChunfeng Yun }
261df2069acSChunfeng Yun
2625ad91812SChunfeng Yun ssusb->ippc_base = devm_platform_ioremap_resource_byname(pdev, "ippc");
263b7ecfe71SWei Yongjun if (IS_ERR(ssusb->ippc_base))
264b3f4e727SChunfeng Yun return PTR_ERR(ssusb->ippc_base);
265df2069acSChunfeng Yun
266fa6f59e2SChunfeng Yun ssusb->wakeup_irq = platform_get_irq_byname_optional(pdev, "wakeup");
267fa6f59e2SChunfeng Yun if (ssusb->wakeup_irq == -EPROBE_DEFER)
268fa6f59e2SChunfeng Yun return ssusb->wakeup_irq;
269fa6f59e2SChunfeng Yun
270b3f4e727SChunfeng Yun ssusb->dr_mode = usb_get_dr_mode(dev);
271dd9d2f3aSChunfeng Yun if (ssusb->dr_mode == USB_DR_MODE_UNKNOWN)
272dd9d2f3aSChunfeng Yun ssusb->dr_mode = USB_DR_MODE_OTG;
273b3f4e727SChunfeng Yun
274269f49ffSChunfeng Yun of_property_read_u32(node, "mediatek,u3p-dis-msk", &ssusb->u3p_dis_msk);
275269f49ffSChunfeng Yun
276b3f4e727SChunfeng Yun if (ssusb->dr_mode == USB_DR_MODE_PERIPHERAL)
277c858b4f3SChunfeng Yun goto out;
278b3f4e727SChunfeng Yun
279b3f4e727SChunfeng Yun /* if host role is supported */
280b3f4e727SChunfeng Yun ret = ssusb_wakeup_of_property_parse(ssusb, node);
281f0ede2c6SChunfeng Yun if (ret) {
282f0ede2c6SChunfeng Yun dev_err(dev, "failed to parse uwk property\n");
283b3f4e727SChunfeng Yun return ret;
284f0ede2c6SChunfeng Yun }
285b3f4e727SChunfeng Yun
286076f1a89SChunfeng Yun /* optional property, ignore the error if it does not exist */
287d7e12724SChunfeng Yun of_property_read_u32(node, "mediatek,u2p-dis-msk",
288d7e12724SChunfeng Yun &ssusb->u2p_dis_msk);
289076f1a89SChunfeng Yun
290918f0f23SChunfeng Yun otg_sx->vbus = devm_regulator_get(dev, "vbus");
291918f0f23SChunfeng Yun if (IS_ERR(otg_sx->vbus)) {
292d0ed062aSChunfeng Yun dev_err(dev, "failed to get vbus\n");
293918f0f23SChunfeng Yun return PTR_ERR(otg_sx->vbus);
294d0ed062aSChunfeng Yun }
295d0ed062aSChunfeng Yun
2966638ec51SChunfeng Yun if (ssusb->dr_mode == USB_DR_MODE_HOST)
297c858b4f3SChunfeng Yun goto out;
2986638ec51SChunfeng Yun
2996638ec51SChunfeng Yun /* if dual-role mode is supported */
300d0ed062aSChunfeng Yun otg_sx->manual_drd_enabled =
301d0ed062aSChunfeng Yun of_property_read_bool(node, "enable-manual-drd");
3021ac91ac5SChunfeng Yun otg_sx->role_sw_used = of_property_read_bool(node, "usb-role-switch");
303d0ed062aSChunfeng Yun
304d7e12724SChunfeng Yun /* can't disable port0 when use dual-role mode */
305d7e12724SChunfeng Yun ssusb->u2p_dis_msk &= ~0x1;
306d7e12724SChunfeng Yun
30751c236d5SChunfeng Yun if (otg_sx->role_sw_used || otg_sx->manual_drd_enabled)
30851c236d5SChunfeng Yun goto out;
30951c236d5SChunfeng Yun
31051c236d5SChunfeng Yun if (of_property_read_bool(node, "extcon")) {
311d0ed062aSChunfeng Yun otg_sx->edev = extcon_get_edev_by_phandle(ssusb->dev, 0);
312d0ed062aSChunfeng Yun if (IS_ERR(otg_sx->edev)) {
313f3ec606eSChunfeng Yun return dev_err_probe(dev, PTR_ERR(otg_sx->edev),
314f3ec606eSChunfeng Yun "couldn't get extcon device\n");
315d0ed062aSChunfeng Yun }
316d0ed062aSChunfeng Yun }
317d0ed062aSChunfeng Yun
318c858b4f3SChunfeng Yun out:
319683ff6e4SChunfeng Yun dev_info(dev, "dr_mode: %d, drd: %s\n", ssusb->dr_mode,
320c776f2c3SChunfeng Yun otg_sx->manual_drd_enabled ? "manual" : "auto");
321d7e12724SChunfeng Yun dev_info(dev, "u2p_dis_msk: %x, u3p_dis_msk: %x\n",
322d7e12724SChunfeng Yun ssusb->u2p_dis_msk, ssusb->u3p_dis_msk);
323d0ed062aSChunfeng Yun
324df2069acSChunfeng Yun return 0;
325df2069acSChunfeng Yun }
326df2069acSChunfeng Yun
mtu3_probe(struct platform_device * pdev)327df2069acSChunfeng Yun static int mtu3_probe(struct platform_device *pdev)
328df2069acSChunfeng Yun {
329b3f4e727SChunfeng Yun struct device_node *node = pdev->dev.of_node;
330df2069acSChunfeng Yun struct device *dev = &pdev->dev;
331b3f4e727SChunfeng Yun struct ssusb_mtk *ssusb;
332df2069acSChunfeng Yun int ret = -ENOMEM;
333df2069acSChunfeng Yun
334df2069acSChunfeng Yun /* all elements are set to ZERO as default value */
335b3f4e727SChunfeng Yun ssusb = devm_kzalloc(dev, sizeof(*ssusb), GFP_KERNEL);
336b3f4e727SChunfeng Yun if (!ssusb)
337df2069acSChunfeng Yun return -ENOMEM;
338df2069acSChunfeng Yun
339df2069acSChunfeng Yun ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));
340df2069acSChunfeng Yun if (ret) {
341df2069acSChunfeng Yun dev_err(dev, "No suitable DMA config available\n");
342df2069acSChunfeng Yun return -ENOTSUPP;
343df2069acSChunfeng Yun }
344df2069acSChunfeng Yun
345b3f4e727SChunfeng Yun platform_set_drvdata(pdev, ssusb);
346b3f4e727SChunfeng Yun ssusb->dev = dev;
347df2069acSChunfeng Yun
348b3f4e727SChunfeng Yun ret = get_ssusb_rscs(pdev, ssusb);
349df2069acSChunfeng Yun if (ret)
350df2069acSChunfeng Yun return ret;
351df2069acSChunfeng Yun
352ae078092SChunfeng Yun ssusb_debugfs_create_root(ssusb);
353ae078092SChunfeng Yun
354df2069acSChunfeng Yun /* enable power domain */
355fa6f59e2SChunfeng Yun pm_runtime_set_active(dev);
356fa6f59e2SChunfeng Yun pm_runtime_use_autosuspend(dev);
357fa6f59e2SChunfeng Yun pm_runtime_set_autosuspend_delay(dev, 4000);
358df2069acSChunfeng Yun pm_runtime_enable(dev);
359df2069acSChunfeng Yun pm_runtime_get_sync(dev);
360df2069acSChunfeng Yun
3611c703e29SChunfeng Yun device_init_wakeup(dev, true);
3621c703e29SChunfeng Yun
363b3f4e727SChunfeng Yun ret = ssusb_rscs_init(ssusb);
364df2069acSChunfeng Yun if (ret)
365df2069acSChunfeng Yun goto comm_init_err;
366df2069acSChunfeng Yun
367fa6f59e2SChunfeng Yun if (ssusb->wakeup_irq > 0) {
3687ddae8c7SChunfeng Yun ret = dev_pm_set_dedicated_wake_irq_reverse(dev, ssusb->wakeup_irq);
369fa6f59e2SChunfeng Yun if (ret) {
370fa6f59e2SChunfeng Yun dev_err(dev, "failed to set wakeup irq %d\n", ssusb->wakeup_irq);
371fa6f59e2SChunfeng Yun goto comm_exit;
372fa6f59e2SChunfeng Yun }
373fa6f59e2SChunfeng Yun dev_info(dev, "wakeup irq %d\n", ssusb->wakeup_irq);
374fa6f59e2SChunfeng Yun }
375fa6f59e2SChunfeng Yun
376e84e3e99SChunfeng Yun ret = device_reset_optional(dev);
377e84e3e99SChunfeng Yun if (ret) {
378e84e3e99SChunfeng Yun dev_err_probe(dev, ret, "failed to reset controller\n");
379e84e3e99SChunfeng Yun goto comm_exit;
380e84e3e99SChunfeng Yun }
381e84e3e99SChunfeng Yun
382b3f4e727SChunfeng Yun ssusb_ip_sw_reset(ssusb);
383683ff6e4SChunfeng Yun ssusb_u3_drd_check(ssusb);
384df2069acSChunfeng Yun
385b3f4e727SChunfeng Yun if (IS_ENABLED(CONFIG_USB_MTU3_HOST))
386b3f4e727SChunfeng Yun ssusb->dr_mode = USB_DR_MODE_HOST;
387b3f4e727SChunfeng Yun else if (IS_ENABLED(CONFIG_USB_MTU3_GADGET))
388b3f4e727SChunfeng Yun ssusb->dr_mode = USB_DR_MODE_PERIPHERAL;
389b3f4e727SChunfeng Yun
390b3f4e727SChunfeng Yun /* default as host */
391b3f4e727SChunfeng Yun ssusb->is_host = !(ssusb->dr_mode == USB_DR_MODE_PERIPHERAL);
392b3f4e727SChunfeng Yun
393b3f4e727SChunfeng Yun switch (ssusb->dr_mode) {
394b3f4e727SChunfeng Yun case USB_DR_MODE_PERIPHERAL:
395b3f4e727SChunfeng Yun ret = ssusb_gadget_init(ssusb);
396df2069acSChunfeng Yun if (ret) {
397df2069acSChunfeng Yun dev_err(dev, "failed to initialize gadget\n");
398df2069acSChunfeng Yun goto comm_exit;
399df2069acSChunfeng Yun }
400b3f4e727SChunfeng Yun break;
401b3f4e727SChunfeng Yun case USB_DR_MODE_HOST:
402b3f4e727SChunfeng Yun ret = ssusb_host_init(ssusb, node);
403b3f4e727SChunfeng Yun if (ret) {
404b3f4e727SChunfeng Yun dev_err(dev, "failed to initialize host\n");
405b3f4e727SChunfeng Yun goto comm_exit;
406b3f4e727SChunfeng Yun }
407b3f4e727SChunfeng Yun break;
408d0ed062aSChunfeng Yun case USB_DR_MODE_OTG:
409d0ed062aSChunfeng Yun ret = ssusb_gadget_init(ssusb);
410d0ed062aSChunfeng Yun if (ret) {
411d0ed062aSChunfeng Yun dev_err(dev, "failed to initialize gadget\n");
412d0ed062aSChunfeng Yun goto comm_exit;
413d0ed062aSChunfeng Yun }
414d0ed062aSChunfeng Yun
415d0ed062aSChunfeng Yun ret = ssusb_host_init(ssusb, node);
416d0ed062aSChunfeng Yun if (ret) {
417d0ed062aSChunfeng Yun dev_err(dev, "failed to initialize host\n");
418d0ed062aSChunfeng Yun goto gadget_exit;
419d0ed062aSChunfeng Yun }
420d0ed062aSChunfeng Yun
42103d8bfc1SChunfeng Yun ret = ssusb_otg_switch_init(ssusb);
42203d8bfc1SChunfeng Yun if (ret) {
42303d8bfc1SChunfeng Yun dev_err(dev, "failed to initialize switch\n");
42403d8bfc1SChunfeng Yun goto host_exit;
42503d8bfc1SChunfeng Yun }
426d0ed062aSChunfeng Yun break;
427b3f4e727SChunfeng Yun default:
428b3f4e727SChunfeng Yun dev_err(dev, "unsupported mode: %d\n", ssusb->dr_mode);
429b3f4e727SChunfeng Yun ret = -EINVAL;
430b3f4e727SChunfeng Yun goto comm_exit;
431b3f4e727SChunfeng Yun }
432df2069acSChunfeng Yun
433fa6f59e2SChunfeng Yun device_enable_async_suspend(dev);
434fa6f59e2SChunfeng Yun pm_runtime_mark_last_busy(dev);
435fa6f59e2SChunfeng Yun pm_runtime_put_autosuspend(dev);
436fa6f59e2SChunfeng Yun pm_runtime_forbid(dev);
437fa6f59e2SChunfeng Yun
438df2069acSChunfeng Yun return 0;
439df2069acSChunfeng Yun
44003d8bfc1SChunfeng Yun host_exit:
44103d8bfc1SChunfeng Yun ssusb_host_exit(ssusb);
442d0ed062aSChunfeng Yun gadget_exit:
443d0ed062aSChunfeng Yun ssusb_gadget_exit(ssusb);
444df2069acSChunfeng Yun comm_exit:
445b3f4e727SChunfeng Yun ssusb_rscs_exit(ssusb);
446df2069acSChunfeng Yun comm_init_err:
447fa6f59e2SChunfeng Yun pm_runtime_put_noidle(dev);
448df2069acSChunfeng Yun pm_runtime_disable(dev);
449ae078092SChunfeng Yun ssusb_debugfs_remove_root(ssusb);
450df2069acSChunfeng Yun
451df2069acSChunfeng Yun return ret;
452df2069acSChunfeng Yun }
453df2069acSChunfeng Yun
mtu3_remove(struct platform_device * pdev)454df2069acSChunfeng Yun static int mtu3_remove(struct platform_device *pdev)
455df2069acSChunfeng Yun {
456b3f4e727SChunfeng Yun struct ssusb_mtk *ssusb = platform_get_drvdata(pdev);
457df2069acSChunfeng Yun
458fa6f59e2SChunfeng Yun pm_runtime_get_sync(&pdev->dev);
459fa6f59e2SChunfeng Yun
460b3f4e727SChunfeng Yun switch (ssusb->dr_mode) {
461b3f4e727SChunfeng Yun case USB_DR_MODE_PERIPHERAL:
462b3f4e727SChunfeng Yun ssusb_gadget_exit(ssusb);
463b3f4e727SChunfeng Yun break;
464b3f4e727SChunfeng Yun case USB_DR_MODE_HOST:
465b3f4e727SChunfeng Yun ssusb_host_exit(ssusb);
466b3f4e727SChunfeng Yun break;
467d0ed062aSChunfeng Yun case USB_DR_MODE_OTG:
468d0ed062aSChunfeng Yun ssusb_otg_switch_exit(ssusb);
469d0ed062aSChunfeng Yun ssusb_gadget_exit(ssusb);
470d0ed062aSChunfeng Yun ssusb_host_exit(ssusb);
471d0ed062aSChunfeng Yun break;
472b3f4e727SChunfeng Yun default:
473b3f4e727SChunfeng Yun return -EINVAL;
474b3f4e727SChunfeng Yun }
475b3f4e727SChunfeng Yun
476b3f4e727SChunfeng Yun ssusb_rscs_exit(ssusb);
477ae078092SChunfeng Yun ssusb_debugfs_remove_root(ssusb);
478fa6f59e2SChunfeng Yun pm_runtime_disable(&pdev->dev);
479fa6f59e2SChunfeng Yun pm_runtime_put_noidle(&pdev->dev);
480fa6f59e2SChunfeng Yun pm_runtime_set_suspended(&pdev->dev);
481df2069acSChunfeng Yun
482df2069acSChunfeng Yun return 0;
483df2069acSChunfeng Yun }
484df2069acSChunfeng Yun
resume_ip_and_ports(struct ssusb_mtk * ssusb,pm_message_t msg)4856b587394SChunfeng Yun static int resume_ip_and_ports(struct ssusb_mtk *ssusb, pm_message_t msg)
4866b587394SChunfeng Yun {
4876b587394SChunfeng Yun switch (ssusb->dr_mode) {
4886b587394SChunfeng Yun case USB_DR_MODE_PERIPHERAL:
4896b587394SChunfeng Yun ssusb_gadget_resume(ssusb, msg);
4906b587394SChunfeng Yun break;
4916b587394SChunfeng Yun case USB_DR_MODE_HOST:
4926b587394SChunfeng Yun ssusb_host_resume(ssusb, false);
4936b587394SChunfeng Yun break;
4946b587394SChunfeng Yun case USB_DR_MODE_OTG:
4956b587394SChunfeng Yun ssusb_host_resume(ssusb, !ssusb->is_host);
4966b587394SChunfeng Yun if (!ssusb->is_host)
4976b587394SChunfeng Yun ssusb_gadget_resume(ssusb, msg);
4986b587394SChunfeng Yun
4996b587394SChunfeng Yun break;
5006b587394SChunfeng Yun default:
5016b587394SChunfeng Yun return -EINVAL;
5026b587394SChunfeng Yun }
5036b587394SChunfeng Yun
5046b587394SChunfeng Yun return 0;
5056b587394SChunfeng Yun }
5066b587394SChunfeng Yun
mtu3_suspend_common(struct device * dev,pm_message_t msg)507fa6f59e2SChunfeng Yun static int mtu3_suspend_common(struct device *dev, pm_message_t msg)
508b3f4e727SChunfeng Yun {
509f86c6888SWolfram Sang struct ssusb_mtk *ssusb = dev_get_drvdata(dev);
510427c6642SChunfeng Yun int ret = 0;
511b3f4e727SChunfeng Yun
512b3f4e727SChunfeng Yun dev_dbg(dev, "%s\n", __func__);
513b3f4e727SChunfeng Yun
514427c6642SChunfeng Yun switch (ssusb->dr_mode) {
515427c6642SChunfeng Yun case USB_DR_MODE_PERIPHERAL:
516427c6642SChunfeng Yun ret = ssusb_gadget_suspend(ssusb, msg);
517427c6642SChunfeng Yun if (ret)
5186b587394SChunfeng Yun goto err;
519427c6642SChunfeng Yun
520427c6642SChunfeng Yun break;
521427c6642SChunfeng Yun case USB_DR_MODE_HOST:
522427c6642SChunfeng Yun ssusb_host_suspend(ssusb);
523427c6642SChunfeng Yun break;
524427c6642SChunfeng Yun case USB_DR_MODE_OTG:
5256b587394SChunfeng Yun if (!ssusb->is_host) {
5266b587394SChunfeng Yun ret = ssusb_gadget_suspend(ssusb, msg);
5276b587394SChunfeng Yun if (ret)
5286b587394SChunfeng Yun goto err;
5296b587394SChunfeng Yun }
5300609c1aaSChunfeng Yun ssusb_host_suspend(ssusb);
531427c6642SChunfeng Yun break;
532427c6642SChunfeng Yun default:
533427c6642SChunfeng Yun return -EINVAL;
534427c6642SChunfeng Yun }
5356b587394SChunfeng Yun
5366b587394SChunfeng Yun ret = wait_for_ip_sleep(ssusb);
5376b587394SChunfeng Yun if (ret)
5386b587394SChunfeng Yun goto sleep_err;
5396b587394SChunfeng Yun
540b3f4e727SChunfeng Yun ssusb_phy_power_off(ssusb);
541cd59ea91SChunfeng Yun clk_bulk_disable_unprepare(BULK_CLKS_CNT, ssusb->clks);
542f0ede2c6SChunfeng Yun ssusb_wakeup_set(ssusb, true);
54350fdcb56SChunfeng Yun return 0;
544b3f4e727SChunfeng Yun
5456b587394SChunfeng Yun sleep_err:
5466b587394SChunfeng Yun resume_ip_and_ports(ssusb, msg);
5476b587394SChunfeng Yun err:
5486b587394SChunfeng Yun return ret;
549b3f4e727SChunfeng Yun }
550b3f4e727SChunfeng Yun
mtu3_resume_common(struct device * dev,pm_message_t msg)551fa6f59e2SChunfeng Yun static int mtu3_resume_common(struct device *dev, pm_message_t msg)
552b3f4e727SChunfeng Yun {
553f86c6888SWolfram Sang struct ssusb_mtk *ssusb = dev_get_drvdata(dev);
5540f4c3f90SArvind Yadav int ret;
555b3f4e727SChunfeng Yun
556b3f4e727SChunfeng Yun dev_dbg(dev, "%s\n", __func__);
557b3f4e727SChunfeng Yun
558f0ede2c6SChunfeng Yun ssusb_wakeup_set(ssusb, false);
559cd59ea91SChunfeng Yun ret = clk_bulk_prepare_enable(BULK_CLKS_CNT, ssusb->clks);
5600f4c3f90SArvind Yadav if (ret)
561a316da82SChunfeng Yun goto clks_err;
5620f4c3f90SArvind Yadav
5630f4c3f90SArvind Yadav ret = ssusb_phy_power_on(ssusb);
5640f4c3f90SArvind Yadav if (ret)
565a316da82SChunfeng Yun goto phy_err;
5660f4c3f90SArvind Yadav
5676b587394SChunfeng Yun return resume_ip_and_ports(ssusb, msg);
5680f4c3f90SArvind Yadav
569a316da82SChunfeng Yun phy_err:
570cd59ea91SChunfeng Yun clk_bulk_disable_unprepare(BULK_CLKS_CNT, ssusb->clks);
571a316da82SChunfeng Yun clks_err:
5720f4c3f90SArvind Yadav return ret;
573b3f4e727SChunfeng Yun }
574b3f4e727SChunfeng Yun
mtu3_suspend(struct device * dev)575fa6f59e2SChunfeng Yun static int __maybe_unused mtu3_suspend(struct device *dev)
576fa6f59e2SChunfeng Yun {
577fa6f59e2SChunfeng Yun return mtu3_suspend_common(dev, PMSG_SUSPEND);
578fa6f59e2SChunfeng Yun }
579fa6f59e2SChunfeng Yun
mtu3_resume(struct device * dev)580fa6f59e2SChunfeng Yun static int __maybe_unused mtu3_resume(struct device *dev)
581fa6f59e2SChunfeng Yun {
582fa6f59e2SChunfeng Yun return mtu3_resume_common(dev, PMSG_SUSPEND);
583fa6f59e2SChunfeng Yun }
584fa6f59e2SChunfeng Yun
mtu3_runtime_suspend(struct device * dev)585fa6f59e2SChunfeng Yun static int __maybe_unused mtu3_runtime_suspend(struct device *dev)
586fa6f59e2SChunfeng Yun {
587fa6f59e2SChunfeng Yun if (!device_may_wakeup(dev))
588fa6f59e2SChunfeng Yun return 0;
589fa6f59e2SChunfeng Yun
590fa6f59e2SChunfeng Yun return mtu3_suspend_common(dev, PMSG_AUTO_SUSPEND);
591fa6f59e2SChunfeng Yun }
592fa6f59e2SChunfeng Yun
mtu3_runtime_resume(struct device * dev)593fa6f59e2SChunfeng Yun static int __maybe_unused mtu3_runtime_resume(struct device *dev)
594fa6f59e2SChunfeng Yun {
595fa6f59e2SChunfeng Yun if (!device_may_wakeup(dev))
596fa6f59e2SChunfeng Yun return 0;
597fa6f59e2SChunfeng Yun
598fa6f59e2SChunfeng Yun return mtu3_resume_common(dev, PMSG_AUTO_SUSPEND);
599fa6f59e2SChunfeng Yun }
600fa6f59e2SChunfeng Yun
601b3f4e727SChunfeng Yun static const struct dev_pm_ops mtu3_pm_ops = {
602b3f4e727SChunfeng Yun SET_SYSTEM_SLEEP_PM_OPS(mtu3_suspend, mtu3_resume)
603fa6f59e2SChunfeng Yun SET_RUNTIME_PM_OPS(mtu3_runtime_suspend,
604fa6f59e2SChunfeng Yun mtu3_runtime_resume, NULL)
605b3f4e727SChunfeng Yun };
606b3f4e727SChunfeng Yun
607b3f4e727SChunfeng Yun #define DEV_PM_OPS (IS_ENABLED(CONFIG_PM) ? &mtu3_pm_ops : NULL)
608b3f4e727SChunfeng Yun
609df2069acSChunfeng Yun static const struct of_device_id mtu3_of_match[] = {
610df2069acSChunfeng Yun {.compatible = "mediatek,mt8173-mtu3",},
611dfcdcba9SChunfeng Yun {.compatible = "mediatek,mtu3",},
612df2069acSChunfeng Yun {},
613df2069acSChunfeng Yun };
614df2069acSChunfeng Yun MODULE_DEVICE_TABLE(of, mtu3_of_match);
615df2069acSChunfeng Yun
616df2069acSChunfeng Yun static struct platform_driver mtu3_driver = {
617df2069acSChunfeng Yun .probe = mtu3_probe,
618df2069acSChunfeng Yun .remove = mtu3_remove,
619df2069acSChunfeng Yun .driver = {
620df2069acSChunfeng Yun .name = MTU3_DRIVER_NAME,
621b3f4e727SChunfeng Yun .pm = DEV_PM_OPS,
62224327c47SChunfeng Yun .of_match_table = mtu3_of_match,
623df2069acSChunfeng Yun },
624df2069acSChunfeng Yun };
625df2069acSChunfeng Yun module_platform_driver(mtu3_driver);
626df2069acSChunfeng Yun
627df2069acSChunfeng Yun MODULE_AUTHOR("Chunfeng Yun <chunfeng.yun@mediatek.com>");
628df2069acSChunfeng Yun MODULE_LICENSE("GPL v2");
629df2069acSChunfeng Yun MODULE_DESCRIPTION("MediaTek USB3 DRD Controller Driver");
630