xref: /openbmc/linux/drivers/usb/host/uhci-q.c (revision 1da177e4c3f41524e886b7f1b8a0c1fc7321cac2)
1 /*
2  * Universal Host Controller Interface driver for USB.
3  *
4  * Maintainer: Alan Stern <stern@rowland.harvard.edu>
5  *
6  * (C) Copyright 1999 Linus Torvalds
7  * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
8  * (C) Copyright 1999 Randy Dunlap
9  * (C) Copyright 1999 Georg Acher, acher@in.tum.de
10  * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de
11  * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch
12  * (C) Copyright 1999 Roman Weissgaerber, weissg@vienna.at
13  * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface
14  *               support from usb-ohci.c by Adam Richter, adam@yggdrasil.com).
15  * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c)
16  * (C) Copyright 2004 Alan Stern, stern@rowland.harvard.edu
17  */
18 
19 static int uhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb);
20 static void uhci_unlink_generic(struct uhci_hcd *uhci, struct urb *urb);
21 static void uhci_remove_pending_urbps(struct uhci_hcd *uhci);
22 static void uhci_free_pending_qhs(struct uhci_hcd *uhci);
23 static void uhci_free_pending_tds(struct uhci_hcd *uhci);
24 
25 /*
26  * Technically, updating td->status here is a race, but it's not really a
27  * problem. The worst that can happen is that we set the IOC bit again
28  * generating a spurious interrupt. We could fix this by creating another
29  * QH and leaving the IOC bit always set, but then we would have to play
30  * games with the FSBR code to make sure we get the correct order in all
31  * the cases. I don't think it's worth the effort
32  */
33 static inline void uhci_set_next_interrupt(struct uhci_hcd *uhci)
34 {
35 	uhci->term_td->status |= cpu_to_le32(TD_CTRL_IOC);
36 }
37 
38 static inline void uhci_clear_next_interrupt(struct uhci_hcd *uhci)
39 {
40 	uhci->term_td->status &= ~cpu_to_le32(TD_CTRL_IOC);
41 }
42 
43 static inline void uhci_moveto_complete(struct uhci_hcd *uhci,
44 					struct urb_priv *urbp)
45 {
46 	list_move_tail(&urbp->urb_list, &uhci->complete_list);
47 }
48 
49 static struct uhci_td *uhci_alloc_td(struct uhci_hcd *uhci, struct usb_device *dev)
50 {
51 	dma_addr_t dma_handle;
52 	struct uhci_td *td;
53 
54 	td = dma_pool_alloc(uhci->td_pool, GFP_ATOMIC, &dma_handle);
55 	if (!td)
56 		return NULL;
57 
58 	td->dma_handle = dma_handle;
59 
60 	td->link = UHCI_PTR_TERM;
61 	td->buffer = 0;
62 
63 	td->frame = -1;
64 	td->dev = dev;
65 
66 	INIT_LIST_HEAD(&td->list);
67 	INIT_LIST_HEAD(&td->remove_list);
68 	INIT_LIST_HEAD(&td->fl_list);
69 
70 	usb_get_dev(dev);
71 
72 	return td;
73 }
74 
75 static inline void uhci_fill_td(struct uhci_td *td, u32 status,
76 		u32 token, u32 buffer)
77 {
78 	td->status = cpu_to_le32(status);
79 	td->token = cpu_to_le32(token);
80 	td->buffer = cpu_to_le32(buffer);
81 }
82 
83 /*
84  * We insert Isochronous URB's directly into the frame list at the beginning
85  */
86 static void uhci_insert_td_frame_list(struct uhci_hcd *uhci, struct uhci_td *td, unsigned framenum)
87 {
88 	framenum &= (UHCI_NUMFRAMES - 1);
89 
90 	td->frame = framenum;
91 
92 	/* Is there a TD already mapped there? */
93 	if (uhci->fl->frame_cpu[framenum]) {
94 		struct uhci_td *ftd, *ltd;
95 
96 		ftd = uhci->fl->frame_cpu[framenum];
97 		ltd = list_entry(ftd->fl_list.prev, struct uhci_td, fl_list);
98 
99 		list_add_tail(&td->fl_list, &ftd->fl_list);
100 
101 		td->link = ltd->link;
102 		wmb();
103 		ltd->link = cpu_to_le32(td->dma_handle);
104 	} else {
105 		td->link = uhci->fl->frame[framenum];
106 		wmb();
107 		uhci->fl->frame[framenum] = cpu_to_le32(td->dma_handle);
108 		uhci->fl->frame_cpu[framenum] = td;
109 	}
110 }
111 
112 static void uhci_remove_td(struct uhci_hcd *uhci, struct uhci_td *td)
113 {
114 	/* If it's not inserted, don't remove it */
115 	if (td->frame == -1 && list_empty(&td->fl_list))
116 		return;
117 
118 	if (td->frame != -1 && uhci->fl->frame_cpu[td->frame] == td) {
119 		if (list_empty(&td->fl_list)) {
120 			uhci->fl->frame[td->frame] = td->link;
121 			uhci->fl->frame_cpu[td->frame] = NULL;
122 		} else {
123 			struct uhci_td *ntd;
124 
125 			ntd = list_entry(td->fl_list.next, struct uhci_td, fl_list);
126 			uhci->fl->frame[td->frame] = cpu_to_le32(ntd->dma_handle);
127 			uhci->fl->frame_cpu[td->frame] = ntd;
128 		}
129 	} else {
130 		struct uhci_td *ptd;
131 
132 		ptd = list_entry(td->fl_list.prev, struct uhci_td, fl_list);
133 		ptd->link = td->link;
134 	}
135 
136 	wmb();
137 	td->link = UHCI_PTR_TERM;
138 
139 	list_del_init(&td->fl_list);
140 	td->frame = -1;
141 }
142 
143 /*
144  * Inserts a td list into qh.
145  */
146 static void uhci_insert_tds_in_qh(struct uhci_qh *qh, struct urb *urb, __le32 breadth)
147 {
148 	struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv;
149 	struct uhci_td *td;
150 	__le32 *plink;
151 
152 	/* Ordering isn't important here yet since the QH hasn't been */
153 	/* inserted into the schedule yet */
154 	plink = &qh->element;
155 	list_for_each_entry(td, &urbp->td_list, list) {
156 		*plink = cpu_to_le32(td->dma_handle) | breadth;
157 		plink = &td->link;
158 	}
159 	*plink = UHCI_PTR_TERM;
160 }
161 
162 static void uhci_free_td(struct uhci_hcd *uhci, struct uhci_td *td)
163 {
164 	if (!list_empty(&td->list))
165 		dev_warn(uhci_dev(uhci), "td %p still in list!\n", td);
166 	if (!list_empty(&td->remove_list))
167 		dev_warn(uhci_dev(uhci), "td %p still in remove_list!\n", td);
168 	if (!list_empty(&td->fl_list))
169 		dev_warn(uhci_dev(uhci), "td %p still in fl_list!\n", td);
170 
171 	if (td->dev)
172 		usb_put_dev(td->dev);
173 
174 	dma_pool_free(uhci->td_pool, td, td->dma_handle);
175 }
176 
177 static struct uhci_qh *uhci_alloc_qh(struct uhci_hcd *uhci, struct usb_device *dev)
178 {
179 	dma_addr_t dma_handle;
180 	struct uhci_qh *qh;
181 
182 	qh = dma_pool_alloc(uhci->qh_pool, GFP_ATOMIC, &dma_handle);
183 	if (!qh)
184 		return NULL;
185 
186 	qh->dma_handle = dma_handle;
187 
188 	qh->element = UHCI_PTR_TERM;
189 	qh->link = UHCI_PTR_TERM;
190 
191 	qh->dev = dev;
192 	qh->urbp = NULL;
193 
194 	INIT_LIST_HEAD(&qh->list);
195 	INIT_LIST_HEAD(&qh->remove_list);
196 
197 	usb_get_dev(dev);
198 
199 	return qh;
200 }
201 
202 static void uhci_free_qh(struct uhci_hcd *uhci, struct uhci_qh *qh)
203 {
204 	if (!list_empty(&qh->list))
205 		dev_warn(uhci_dev(uhci), "qh %p list not empty!\n", qh);
206 	if (!list_empty(&qh->remove_list))
207 		dev_warn(uhci_dev(uhci), "qh %p still in remove_list!\n", qh);
208 
209 	if (qh->dev)
210 		usb_put_dev(qh->dev);
211 
212 	dma_pool_free(uhci->qh_pool, qh, qh->dma_handle);
213 }
214 
215 /*
216  * Append this urb's qh after the last qh in skelqh->list
217  *
218  * Note that urb_priv.queue_list doesn't have a separate queue head;
219  * it's a ring with every element "live".
220  */
221 static void uhci_insert_qh(struct uhci_hcd *uhci, struct uhci_qh *skelqh, struct urb *urb)
222 {
223 	struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv;
224 	struct urb_priv *turbp;
225 	struct uhci_qh *lqh;
226 
227 	/* Grab the last QH */
228 	lqh = list_entry(skelqh->list.prev, struct uhci_qh, list);
229 
230 	/* Point to the next skelqh */
231 	urbp->qh->link = lqh->link;
232 	wmb();				/* Ordering is important */
233 
234 	/*
235 	 * Patch QHs for previous endpoint's queued URBs?  HC goes
236 	 * here next, not to the next skelqh it now points to.
237 	 *
238 	 *    lqh --> td ... --> qh ... --> td --> qh ... --> td
239 	 *     |                 |                 |
240 	 *     v                 v                 v
241 	 *     +<----------------+-----------------+
242 	 *     v
243 	 *    newqh --> td ... --> td
244 	 *     |
245 	 *     v
246 	 *    ...
247 	 *
248 	 * The HC could see (and use!) any of these as we write them.
249 	 */
250 	lqh->link = cpu_to_le32(urbp->qh->dma_handle) | UHCI_PTR_QH;
251 	if (lqh->urbp) {
252 		list_for_each_entry(turbp, &lqh->urbp->queue_list, queue_list)
253 			turbp->qh->link = lqh->link;
254 	}
255 
256 	list_add_tail(&urbp->qh->list, &skelqh->list);
257 }
258 
259 /*
260  * Start removal of QH from schedule; it finishes next frame.
261  * TDs should be unlinked before this is called.
262  */
263 static void uhci_remove_qh(struct uhci_hcd *uhci, struct uhci_qh *qh)
264 {
265 	struct uhci_qh *pqh;
266 	__le32 newlink;
267 
268 	if (!qh)
269 		return;
270 
271 	/*
272 	 * Only go through the hoops if it's actually linked in
273 	 */
274 	if (!list_empty(&qh->list)) {
275 
276 		/* If our queue is nonempty, make the next URB the head */
277 		if (!list_empty(&qh->urbp->queue_list)) {
278 			struct urb_priv *nurbp;
279 
280 			nurbp = list_entry(qh->urbp->queue_list.next,
281 					struct urb_priv, queue_list);
282 			nurbp->queued = 0;
283 			list_add(&nurbp->qh->list, &qh->list);
284 			newlink = cpu_to_le32(nurbp->qh->dma_handle) | UHCI_PTR_QH;
285 		} else
286 			newlink = qh->link;
287 
288 		/* Fix up the previous QH's queue to link to either
289 		 * the new head of this queue or the start of the
290 		 * next endpoint's queue. */
291 		pqh = list_entry(qh->list.prev, struct uhci_qh, list);
292 		pqh->link = newlink;
293 		if (pqh->urbp) {
294 			struct urb_priv *turbp;
295 
296 			list_for_each_entry(turbp, &pqh->urbp->queue_list,
297 					queue_list)
298 				turbp->qh->link = newlink;
299 		}
300 		wmb();
301 
302 		/* Leave qh->link in case the HC is on the QH now, it will */
303 		/* continue the rest of the schedule */
304 		qh->element = UHCI_PTR_TERM;
305 
306 		list_del_init(&qh->list);
307 	}
308 
309 	list_del_init(&qh->urbp->queue_list);
310 	qh->urbp = NULL;
311 
312 	uhci_get_current_frame_number(uhci);
313 	if (uhci->frame_number + uhci->is_stopped != uhci->qh_remove_age) {
314 		uhci_free_pending_qhs(uhci);
315 		uhci->qh_remove_age = uhci->frame_number;
316 	}
317 
318 	/* Check to see if the remove list is empty. Set the IOC bit */
319 	/* to force an interrupt so we can remove the QH */
320 	if (list_empty(&uhci->qh_remove_list))
321 		uhci_set_next_interrupt(uhci);
322 
323 	list_add(&qh->remove_list, &uhci->qh_remove_list);
324 }
325 
326 static int uhci_fixup_toggle(struct urb *urb, unsigned int toggle)
327 {
328 	struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv;
329 	struct uhci_td *td;
330 
331 	list_for_each_entry(td, &urbp->td_list, list) {
332 		if (toggle)
333 			td->token |= cpu_to_le32(TD_TOKEN_TOGGLE);
334 		else
335 			td->token &= ~cpu_to_le32(TD_TOKEN_TOGGLE);
336 
337 		toggle ^= 1;
338 	}
339 
340 	return toggle;
341 }
342 
343 /* This function will append one URB's QH to another URB's QH. This is for */
344 /* queuing interrupt, control or bulk transfers */
345 static void uhci_append_queued_urb(struct uhci_hcd *uhci, struct urb *eurb, struct urb *urb)
346 {
347 	struct urb_priv *eurbp, *urbp, *furbp, *lurbp;
348 	struct uhci_td *lltd;
349 
350 	eurbp = eurb->hcpriv;
351 	urbp = urb->hcpriv;
352 
353 	/* Find the first URB in the queue */
354 	furbp = eurbp;
355 	if (eurbp->queued) {
356 		list_for_each_entry(furbp, &eurbp->queue_list, queue_list)
357 			if (!furbp->queued)
358 				break;
359 	}
360 
361 	lurbp = list_entry(furbp->queue_list.prev, struct urb_priv, queue_list);
362 
363 	lltd = list_entry(lurbp->td_list.prev, struct uhci_td, list);
364 
365 	/* Control transfers always start with toggle 0 */
366 	if (!usb_pipecontrol(urb->pipe))
367 		usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe),
368 				usb_pipeout(urb->pipe),
369 				uhci_fixup_toggle(urb,
370 					uhci_toggle(td_token(lltd)) ^ 1));
371 
372 	/* All qh's in the queue need to link to the next queue */
373 	urbp->qh->link = eurbp->qh->link;
374 
375 	wmb();			/* Make sure we flush everything */
376 
377 	lltd->link = cpu_to_le32(urbp->qh->dma_handle) | UHCI_PTR_QH;
378 
379 	list_add_tail(&urbp->queue_list, &furbp->queue_list);
380 
381 	urbp->queued = 1;
382 }
383 
384 static void uhci_delete_queued_urb(struct uhci_hcd *uhci, struct urb *urb)
385 {
386 	struct urb_priv *urbp, *nurbp, *purbp, *turbp;
387 	struct uhci_td *pltd;
388 	unsigned int toggle;
389 
390 	urbp = urb->hcpriv;
391 
392 	if (list_empty(&urbp->queue_list))
393 		return;
394 
395 	nurbp = list_entry(urbp->queue_list.next, struct urb_priv, queue_list);
396 
397 	/*
398 	 * Fix up the toggle for the following URBs in the queue.
399 	 * Only needed for bulk and interrupt: control and isochronous
400 	 * endpoints don't propagate toggles between messages.
401 	 */
402 	if (usb_pipebulk(urb->pipe) || usb_pipeint(urb->pipe)) {
403 		if (!urbp->queued)
404 			/* We just set the toggle in uhci_unlink_generic */
405 			toggle = usb_gettoggle(urb->dev,
406 					usb_pipeendpoint(urb->pipe),
407 					usb_pipeout(urb->pipe));
408 		else {
409 			/* If we're in the middle of the queue, grab the */
410 			/* toggle from the TD previous to us */
411 			purbp = list_entry(urbp->queue_list.prev,
412 					struct urb_priv, queue_list);
413 			pltd = list_entry(purbp->td_list.prev,
414 					struct uhci_td, list);
415 			toggle = uhci_toggle(td_token(pltd)) ^ 1;
416 		}
417 
418 		list_for_each_entry(turbp, &urbp->queue_list, queue_list) {
419 			if (!turbp->queued)
420 				break;
421 			toggle = uhci_fixup_toggle(turbp->urb, toggle);
422 		}
423 
424 		usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe),
425 				usb_pipeout(urb->pipe), toggle);
426 	}
427 
428 	if (urbp->queued) {
429 		/* We're somewhere in the middle (or end).  The case where
430 		 * we're at the head is handled in uhci_remove_qh(). */
431 		purbp = list_entry(urbp->queue_list.prev, struct urb_priv,
432 				queue_list);
433 
434 		pltd = list_entry(purbp->td_list.prev, struct uhci_td, list);
435 		if (nurbp->queued)
436 			pltd->link = cpu_to_le32(nurbp->qh->dma_handle) | UHCI_PTR_QH;
437 		else
438 			/* The next URB happens to be the beginning, so */
439 			/*  we're the last, end the chain */
440 			pltd->link = UHCI_PTR_TERM;
441 	}
442 
443 	/* urbp->queue_list is handled in uhci_remove_qh() */
444 }
445 
446 static struct urb_priv *uhci_alloc_urb_priv(struct uhci_hcd *uhci, struct urb *urb)
447 {
448 	struct urb_priv *urbp;
449 
450 	urbp = kmem_cache_alloc(uhci_up_cachep, SLAB_ATOMIC);
451 	if (!urbp)
452 		return NULL;
453 
454 	memset((void *)urbp, 0, sizeof(*urbp));
455 
456 	urbp->inserttime = jiffies;
457 	urbp->fsbrtime = jiffies;
458 	urbp->urb = urb;
459 
460 	INIT_LIST_HEAD(&urbp->td_list);
461 	INIT_LIST_HEAD(&urbp->queue_list);
462 	INIT_LIST_HEAD(&urbp->urb_list);
463 
464 	list_add_tail(&urbp->urb_list, &uhci->urb_list);
465 
466 	urb->hcpriv = urbp;
467 
468 	return urbp;
469 }
470 
471 static void uhci_add_td_to_urb(struct urb *urb, struct uhci_td *td)
472 {
473 	struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv;
474 
475 	td->urb = urb;
476 
477 	list_add_tail(&td->list, &urbp->td_list);
478 }
479 
480 static void uhci_remove_td_from_urb(struct uhci_td *td)
481 {
482 	if (list_empty(&td->list))
483 		return;
484 
485 	list_del_init(&td->list);
486 
487 	td->urb = NULL;
488 }
489 
490 static void uhci_destroy_urb_priv(struct uhci_hcd *uhci, struct urb *urb)
491 {
492 	struct uhci_td *td, *tmp;
493 	struct urb_priv *urbp;
494 
495 	urbp = (struct urb_priv *)urb->hcpriv;
496 	if (!urbp)
497 		return;
498 
499 	if (!list_empty(&urbp->urb_list))
500 		dev_warn(uhci_dev(uhci), "urb %p still on uhci->urb_list "
501 				"or uhci->remove_list!\n", urb);
502 
503 	uhci_get_current_frame_number(uhci);
504 	if (uhci->frame_number + uhci->is_stopped != uhci->td_remove_age) {
505 		uhci_free_pending_tds(uhci);
506 		uhci->td_remove_age = uhci->frame_number;
507 	}
508 
509 	/* Check to see if the remove list is empty. Set the IOC bit */
510 	/* to force an interrupt so we can remove the TD's*/
511 	if (list_empty(&uhci->td_remove_list))
512 		uhci_set_next_interrupt(uhci);
513 
514 	list_for_each_entry_safe(td, tmp, &urbp->td_list, list) {
515 		uhci_remove_td_from_urb(td);
516 		uhci_remove_td(uhci, td);
517 		list_add(&td->remove_list, &uhci->td_remove_list);
518 	}
519 
520 	urb->hcpriv = NULL;
521 	kmem_cache_free(uhci_up_cachep, urbp);
522 }
523 
524 static void uhci_inc_fsbr(struct uhci_hcd *uhci, struct urb *urb)
525 {
526 	struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv;
527 
528 	if ((!(urb->transfer_flags & URB_NO_FSBR)) && !urbp->fsbr) {
529 		urbp->fsbr = 1;
530 		if (!uhci->fsbr++ && !uhci->fsbrtimeout)
531 			uhci->skel_term_qh->link = cpu_to_le32(uhci->skel_fs_control_qh->dma_handle) | UHCI_PTR_QH;
532 	}
533 }
534 
535 static void uhci_dec_fsbr(struct uhci_hcd *uhci, struct urb *urb)
536 {
537 	struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv;
538 
539 	if ((!(urb->transfer_flags & URB_NO_FSBR)) && urbp->fsbr) {
540 		urbp->fsbr = 0;
541 		if (!--uhci->fsbr)
542 			uhci->fsbrtimeout = jiffies + FSBR_DELAY;
543 	}
544 }
545 
546 /*
547  * Map status to standard result codes
548  *
549  * <status> is (td_status(td) & 0xF60000), a.k.a.
550  * uhci_status_bits(td_status(td)).
551  * Note: <status> does not include the TD_CTRL_NAK bit.
552  * <dir_out> is True for output TDs and False for input TDs.
553  */
554 static int uhci_map_status(int status, int dir_out)
555 {
556 	if (!status)
557 		return 0;
558 	if (status & TD_CTRL_BITSTUFF)			/* Bitstuff error */
559 		return -EPROTO;
560 	if (status & TD_CTRL_CRCTIMEO) {		/* CRC/Timeout */
561 		if (dir_out)
562 			return -EPROTO;
563 		else
564 			return -EILSEQ;
565 	}
566 	if (status & TD_CTRL_BABBLE)			/* Babble */
567 		return -EOVERFLOW;
568 	if (status & TD_CTRL_DBUFERR)			/* Buffer error */
569 		return -ENOSR;
570 	if (status & TD_CTRL_STALLED)			/* Stalled */
571 		return -EPIPE;
572 	WARN_ON(status & TD_CTRL_ACTIVE);		/* Active */
573 	return 0;
574 }
575 
576 /*
577  * Control transfers
578  */
579 static int uhci_submit_control(struct uhci_hcd *uhci, struct urb *urb, struct urb *eurb)
580 {
581 	struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv;
582 	struct uhci_td *td;
583 	struct uhci_qh *qh, *skelqh;
584 	unsigned long destination, status;
585 	int maxsze = usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe));
586 	int len = urb->transfer_buffer_length;
587 	dma_addr_t data = urb->transfer_dma;
588 
589 	/* The "pipe" thing contains the destination in bits 8--18 */
590 	destination = (urb->pipe & PIPE_DEVEP_MASK) | USB_PID_SETUP;
591 
592 	/* 3 errors */
593 	status = TD_CTRL_ACTIVE | uhci_maxerr(3);
594 	if (urb->dev->speed == USB_SPEED_LOW)
595 		status |= TD_CTRL_LS;
596 
597 	/*
598 	 * Build the TD for the control request setup packet
599 	 */
600 	td = uhci_alloc_td(uhci, urb->dev);
601 	if (!td)
602 		return -ENOMEM;
603 
604 	uhci_add_td_to_urb(urb, td);
605 	uhci_fill_td(td, status, destination | uhci_explen(7),
606 		urb->setup_dma);
607 
608 	/*
609 	 * If direction is "send", change the packet ID from SETUP (0x2D)
610 	 * to OUT (0xE1).  Else change it from SETUP to IN (0x69) and
611 	 * set Short Packet Detect (SPD) for all data packets.
612 	 */
613 	if (usb_pipeout(urb->pipe))
614 		destination ^= (USB_PID_SETUP ^ USB_PID_OUT);
615 	else {
616 		destination ^= (USB_PID_SETUP ^ USB_PID_IN);
617 		status |= TD_CTRL_SPD;
618 	}
619 
620 	/*
621 	 * Build the DATA TD's
622 	 */
623 	while (len > 0) {
624 		int pktsze = len;
625 
626 		if (pktsze > maxsze)
627 			pktsze = maxsze;
628 
629 		td = uhci_alloc_td(uhci, urb->dev);
630 		if (!td)
631 			return -ENOMEM;
632 
633 		/* Alternate Data0/1 (start with Data1) */
634 		destination ^= TD_TOKEN_TOGGLE;
635 
636 		uhci_add_td_to_urb(urb, td);
637 		uhci_fill_td(td, status, destination | uhci_explen(pktsze - 1),
638 			data);
639 
640 		data += pktsze;
641 		len -= pktsze;
642 	}
643 
644 	/*
645 	 * Build the final TD for control status
646 	 */
647 	td = uhci_alloc_td(uhci, urb->dev);
648 	if (!td)
649 		return -ENOMEM;
650 
651 	/*
652 	 * It's IN if the pipe is an output pipe or we're not expecting
653 	 * data back.
654 	 */
655 	destination &= ~TD_TOKEN_PID_MASK;
656 	if (usb_pipeout(urb->pipe) || !urb->transfer_buffer_length)
657 		destination |= USB_PID_IN;
658 	else
659 		destination |= USB_PID_OUT;
660 
661 	destination |= TD_TOKEN_TOGGLE;		/* End in Data1 */
662 
663 	status &= ~TD_CTRL_SPD;
664 
665 	uhci_add_td_to_urb(urb, td);
666 	uhci_fill_td(td, status | TD_CTRL_IOC,
667 		destination | uhci_explen(UHCI_NULL_DATA_SIZE), 0);
668 
669 	qh = uhci_alloc_qh(uhci, urb->dev);
670 	if (!qh)
671 		return -ENOMEM;
672 
673 	urbp->qh = qh;
674 	qh->urbp = urbp;
675 
676 	uhci_insert_tds_in_qh(qh, urb, UHCI_PTR_BREADTH);
677 
678 	/* Low-speed transfers get a different queue, and won't hog the bus.
679 	 * Also, some devices enumerate better without FSBR; the easiest way
680 	 * to do that is to put URBs on the low-speed queue while the device
681 	 * is in the DEFAULT state. */
682 	if (urb->dev->speed == USB_SPEED_LOW ||
683 			urb->dev->state == USB_STATE_DEFAULT)
684 		skelqh = uhci->skel_ls_control_qh;
685 	else {
686 		skelqh = uhci->skel_fs_control_qh;
687 		uhci_inc_fsbr(uhci, urb);
688 	}
689 
690 	if (eurb)
691 		uhci_append_queued_urb(uhci, eurb, urb);
692 	else
693 		uhci_insert_qh(uhci, skelqh, urb);
694 
695 	return -EINPROGRESS;
696 }
697 
698 /*
699  * If control-IN transfer was short, the status packet wasn't sent.
700  * This routine changes the element pointer in the QH to point at the
701  * status TD.  It's safe to do this even while the QH is live, because
702  * the hardware only updates the element pointer following a successful
703  * transfer.  The inactive TD for the short packet won't cause an update,
704  * so the pointer won't get overwritten.  The next time the controller
705  * sees this QH, it will send the status packet.
706  */
707 static int usb_control_retrigger_status(struct uhci_hcd *uhci, struct urb *urb)
708 {
709 	struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv;
710 	struct uhci_td *td;
711 
712 	urbp->short_control_packet = 1;
713 
714 	td = list_entry(urbp->td_list.prev, struct uhci_td, list);
715 	urbp->qh->element = cpu_to_le32(td->dma_handle);
716 
717 	return -EINPROGRESS;
718 }
719 
720 
721 static int uhci_result_control(struct uhci_hcd *uhci, struct urb *urb)
722 {
723 	struct list_head *tmp, *head;
724 	struct urb_priv *urbp = urb->hcpriv;
725 	struct uhci_td *td;
726 	unsigned int status;
727 	int ret = 0;
728 
729 	if (list_empty(&urbp->td_list))
730 		return -EINVAL;
731 
732 	head = &urbp->td_list;
733 
734 	if (urbp->short_control_packet) {
735 		tmp = head->prev;
736 		goto status_stage;
737 	}
738 
739 	tmp = head->next;
740 	td = list_entry(tmp, struct uhci_td, list);
741 
742 	/* The first TD is the SETUP stage, check the status, but skip */
743 	/*  the count */
744 	status = uhci_status_bits(td_status(td));
745 	if (status & TD_CTRL_ACTIVE)
746 		return -EINPROGRESS;
747 
748 	if (status)
749 		goto td_error;
750 
751 	urb->actual_length = 0;
752 
753 	/* The rest of the TD's (but the last) are data */
754 	tmp = tmp->next;
755 	while (tmp != head && tmp->next != head) {
756 		unsigned int ctrlstat;
757 
758 		td = list_entry(tmp, struct uhci_td, list);
759 		tmp = tmp->next;
760 
761 		ctrlstat = td_status(td);
762 		status = uhci_status_bits(ctrlstat);
763 		if (status & TD_CTRL_ACTIVE)
764 			return -EINPROGRESS;
765 
766 		urb->actual_length += uhci_actual_length(ctrlstat);
767 
768 		if (status)
769 			goto td_error;
770 
771 		/* Check to see if we received a short packet */
772 		if (uhci_actual_length(ctrlstat) <
773 				uhci_expected_length(td_token(td))) {
774 			if (urb->transfer_flags & URB_SHORT_NOT_OK) {
775 				ret = -EREMOTEIO;
776 				goto err;
777 			}
778 
779 			if (uhci_packetid(td_token(td)) == USB_PID_IN)
780 				return usb_control_retrigger_status(uhci, urb);
781 			else
782 				return 0;
783 		}
784 	}
785 
786 status_stage:
787 	td = list_entry(tmp, struct uhci_td, list);
788 
789 	/* Control status stage */
790 	status = td_status(td);
791 
792 #ifdef I_HAVE_BUGGY_APC_BACKUPS
793 	/* APC BackUPS Pro kludge */
794 	/* It tries to send all of the descriptor instead of the amount */
795 	/*  we requested */
796 	if (status & TD_CTRL_IOC &&	/* IOC is masked out by uhci_status_bits */
797 	    status & TD_CTRL_ACTIVE &&
798 	    status & TD_CTRL_NAK)
799 		return 0;
800 #endif
801 
802 	status = uhci_status_bits(status);
803 	if (status & TD_CTRL_ACTIVE)
804 		return -EINPROGRESS;
805 
806 	if (status)
807 		goto td_error;
808 
809 	return 0;
810 
811 td_error:
812 	ret = uhci_map_status(status, uhci_packetout(td_token(td)));
813 
814 err:
815 	if ((debug == 1 && ret != -EPIPE) || debug > 1) {
816 		/* Some debugging code */
817 		dev_dbg(uhci_dev(uhci), "%s: failed with status %x\n",
818 				__FUNCTION__, status);
819 
820 		if (errbuf) {
821 			/* Print the chain for debugging purposes */
822 			uhci_show_qh(urbp->qh, errbuf, ERRBUF_LEN, 0);
823 
824 			lprintk(errbuf);
825 		}
826 	}
827 
828 	return ret;
829 }
830 
831 /*
832  * Common submit for bulk and interrupt
833  */
834 static int uhci_submit_common(struct uhci_hcd *uhci, struct urb *urb, struct urb *eurb, struct uhci_qh *skelqh)
835 {
836 	struct uhci_td *td;
837 	struct uhci_qh *qh;
838 	unsigned long destination, status;
839 	int maxsze = usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe));
840 	int len = urb->transfer_buffer_length;
841 	struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv;
842 	dma_addr_t data = urb->transfer_dma;
843 
844 	if (len < 0)
845 		return -EINVAL;
846 
847 	/* The "pipe" thing contains the destination in bits 8--18 */
848 	destination = (urb->pipe & PIPE_DEVEP_MASK) | usb_packetid(urb->pipe);
849 
850 	status = uhci_maxerr(3) | TD_CTRL_ACTIVE;
851 	if (urb->dev->speed == USB_SPEED_LOW)
852 		status |= TD_CTRL_LS;
853 	if (usb_pipein(urb->pipe))
854 		status |= TD_CTRL_SPD;
855 
856 	/*
857 	 * Build the DATA TD's
858 	 */
859 	do {	/* Allow zero length packets */
860 		int pktsze = maxsze;
861 
862 		if (pktsze >= len) {
863 			pktsze = len;
864 			if (!(urb->transfer_flags & URB_SHORT_NOT_OK))
865 				status &= ~TD_CTRL_SPD;
866 		}
867 
868 		td = uhci_alloc_td(uhci, urb->dev);
869 		if (!td)
870 			return -ENOMEM;
871 
872 		uhci_add_td_to_urb(urb, td);
873 		uhci_fill_td(td, status, destination | uhci_explen(pktsze - 1) |
874 			(usb_gettoggle(urb->dev, usb_pipeendpoint(urb->pipe),
875 			 usb_pipeout(urb->pipe)) << TD_TOKEN_TOGGLE_SHIFT),
876 			data);
877 
878 		data += pktsze;
879 		len -= maxsze;
880 
881 		usb_dotoggle(urb->dev, usb_pipeendpoint(urb->pipe),
882 			usb_pipeout(urb->pipe));
883 	} while (len > 0);
884 
885 	/*
886 	 * URB_ZERO_PACKET means adding a 0-length packet, if direction
887 	 * is OUT and the transfer_length was an exact multiple of maxsze,
888 	 * hence (len = transfer_length - N * maxsze) == 0
889 	 * however, if transfer_length == 0, the zero packet was already
890 	 * prepared above.
891 	 */
892 	if (usb_pipeout(urb->pipe) && (urb->transfer_flags & URB_ZERO_PACKET) &&
893 	    !len && urb->transfer_buffer_length) {
894 		td = uhci_alloc_td(uhci, urb->dev);
895 		if (!td)
896 			return -ENOMEM;
897 
898 		uhci_add_td_to_urb(urb, td);
899 		uhci_fill_td(td, status, destination | uhci_explen(UHCI_NULL_DATA_SIZE) |
900 			(usb_gettoggle(urb->dev, usb_pipeendpoint(urb->pipe),
901 			 usb_pipeout(urb->pipe)) << TD_TOKEN_TOGGLE_SHIFT),
902 			data);
903 
904 		usb_dotoggle(urb->dev, usb_pipeendpoint(urb->pipe),
905 			usb_pipeout(urb->pipe));
906 	}
907 
908 	/* Set the interrupt-on-completion flag on the last packet.
909 	 * A more-or-less typical 4 KB URB (= size of one memory page)
910 	 * will require about 3 ms to transfer; that's a little on the
911 	 * fast side but not enough to justify delaying an interrupt
912 	 * more than 2 or 3 URBs, so we will ignore the URB_NO_INTERRUPT
913 	 * flag setting. */
914 	td->status |= cpu_to_le32(TD_CTRL_IOC);
915 
916 	qh = uhci_alloc_qh(uhci, urb->dev);
917 	if (!qh)
918 		return -ENOMEM;
919 
920 	urbp->qh = qh;
921 	qh->urbp = urbp;
922 
923 	/* Always breadth first */
924 	uhci_insert_tds_in_qh(qh, urb, UHCI_PTR_BREADTH);
925 
926 	if (eurb)
927 		uhci_append_queued_urb(uhci, eurb, urb);
928 	else
929 		uhci_insert_qh(uhci, skelqh, urb);
930 
931 	return -EINPROGRESS;
932 }
933 
934 /*
935  * Common result for bulk and interrupt
936  */
937 static int uhci_result_common(struct uhci_hcd *uhci, struct urb *urb)
938 {
939 	struct urb_priv *urbp = urb->hcpriv;
940 	struct uhci_td *td;
941 	unsigned int status = 0;
942 	int ret = 0;
943 
944 	urb->actual_length = 0;
945 
946 	list_for_each_entry(td, &urbp->td_list, list) {
947 		unsigned int ctrlstat = td_status(td);
948 
949 		status = uhci_status_bits(ctrlstat);
950 		if (status & TD_CTRL_ACTIVE)
951 			return -EINPROGRESS;
952 
953 		urb->actual_length += uhci_actual_length(ctrlstat);
954 
955 		if (status)
956 			goto td_error;
957 
958 		if (uhci_actual_length(ctrlstat) <
959 				uhci_expected_length(td_token(td))) {
960 			if (urb->transfer_flags & URB_SHORT_NOT_OK) {
961 				ret = -EREMOTEIO;
962 				goto err;
963 			} else
964 				return 0;
965 		}
966 	}
967 
968 	return 0;
969 
970 td_error:
971 	ret = uhci_map_status(status, uhci_packetout(td_token(td)));
972 
973 err:
974 	/*
975 	 * Enable this chunk of code if you want to see some more debugging.
976 	 * But be careful, it has the tendancy to starve out khubd and prevent
977 	 * disconnects from happening successfully if you have a slow debug
978 	 * log interface (like a serial console.
979 	 */
980 #if 0
981 	if ((debug == 1 && ret != -EPIPE) || debug > 1) {
982 		/* Some debugging code */
983 		dev_dbg(uhci_dev(uhci), "%s: failed with status %x\n",
984 				__FUNCTION__, status);
985 
986 		if (errbuf) {
987 			/* Print the chain for debugging purposes */
988 			uhci_show_qh(urbp->qh, errbuf, ERRBUF_LEN, 0);
989 
990 			lprintk(errbuf);
991 		}
992 	}
993 #endif
994 	return ret;
995 }
996 
997 static inline int uhci_submit_bulk(struct uhci_hcd *uhci, struct urb *urb, struct urb *eurb)
998 {
999 	int ret;
1000 
1001 	/* Can't have low-speed bulk transfers */
1002 	if (urb->dev->speed == USB_SPEED_LOW)
1003 		return -EINVAL;
1004 
1005 	ret = uhci_submit_common(uhci, urb, eurb, uhci->skel_bulk_qh);
1006 	if (ret == -EINPROGRESS)
1007 		uhci_inc_fsbr(uhci, urb);
1008 
1009 	return ret;
1010 }
1011 
1012 static inline int uhci_submit_interrupt(struct uhci_hcd *uhci, struct urb *urb, struct urb *eurb)
1013 {
1014 	/* USB 1.1 interrupt transfers only involve one packet per interval;
1015 	 * that's the uhci_submit_common() "breadth first" policy.  Drivers
1016 	 * can submit urbs of any length, but longer ones might need many
1017 	 * intervals to complete.
1018 	 */
1019 	return uhci_submit_common(uhci, urb, eurb, uhci->skelqh[__interval_to_skel(urb->interval)]);
1020 }
1021 
1022 /*
1023  * Isochronous transfers
1024  */
1025 static int isochronous_find_limits(struct uhci_hcd *uhci, struct urb *urb, unsigned int *start, unsigned int *end)
1026 {
1027 	struct urb *last_urb = NULL;
1028 	struct urb_priv *up;
1029 	int ret = 0;
1030 
1031 	list_for_each_entry(up, &uhci->urb_list, urb_list) {
1032 		struct urb *u = up->urb;
1033 
1034 		/* look for pending URB's with identical pipe handle */
1035 		if ((urb->pipe == u->pipe) && (urb->dev == u->dev) &&
1036 		    (u->status == -EINPROGRESS) && (u != urb)) {
1037 			if (!last_urb)
1038 				*start = u->start_frame;
1039 			last_urb = u;
1040 		}
1041 	}
1042 
1043 	if (last_urb) {
1044 		*end = (last_urb->start_frame + last_urb->number_of_packets *
1045 				last_urb->interval) & (UHCI_NUMFRAMES-1);
1046 		ret = 0;
1047 	} else
1048 		ret = -1;	/* no previous urb found */
1049 
1050 	return ret;
1051 }
1052 
1053 static int isochronous_find_start(struct uhci_hcd *uhci, struct urb *urb)
1054 {
1055 	int limits;
1056 	unsigned int start = 0, end = 0;
1057 
1058 	if (urb->number_of_packets > 900)	/* 900? Why? */
1059 		return -EFBIG;
1060 
1061 	limits = isochronous_find_limits(uhci, urb, &start, &end);
1062 
1063 	if (urb->transfer_flags & URB_ISO_ASAP) {
1064 		if (limits) {
1065 			uhci_get_current_frame_number(uhci);
1066 			urb->start_frame = (uhci->frame_number + 10)
1067 					& (UHCI_NUMFRAMES - 1);
1068 		} else
1069 			urb->start_frame = end;
1070 	} else {
1071 		urb->start_frame &= (UHCI_NUMFRAMES - 1);
1072 		/* FIXME: Sanity check */
1073 	}
1074 
1075 	return 0;
1076 }
1077 
1078 /*
1079  * Isochronous transfers
1080  */
1081 static int uhci_submit_isochronous(struct uhci_hcd *uhci, struct urb *urb)
1082 {
1083 	struct uhci_td *td;
1084 	int i, ret, frame;
1085 	int status, destination;
1086 
1087 	status = TD_CTRL_ACTIVE | TD_CTRL_IOS;
1088 	destination = (urb->pipe & PIPE_DEVEP_MASK) | usb_packetid(urb->pipe);
1089 
1090 	ret = isochronous_find_start(uhci, urb);
1091 	if (ret)
1092 		return ret;
1093 
1094 	frame = urb->start_frame;
1095 	for (i = 0; i < urb->number_of_packets; i++, frame += urb->interval) {
1096 		if (!urb->iso_frame_desc[i].length)
1097 			continue;
1098 
1099 		td = uhci_alloc_td(uhci, urb->dev);
1100 		if (!td)
1101 			return -ENOMEM;
1102 
1103 		uhci_add_td_to_urb(urb, td);
1104 		uhci_fill_td(td, status, destination | uhci_explen(urb->iso_frame_desc[i].length - 1),
1105 			urb->transfer_dma + urb->iso_frame_desc[i].offset);
1106 
1107 		if (i + 1 >= urb->number_of_packets)
1108 			td->status |= cpu_to_le32(TD_CTRL_IOC);
1109 
1110 		uhci_insert_td_frame_list(uhci, td, frame);
1111 	}
1112 
1113 	return -EINPROGRESS;
1114 }
1115 
1116 static int uhci_result_isochronous(struct uhci_hcd *uhci, struct urb *urb)
1117 {
1118 	struct uhci_td *td;
1119 	struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv;
1120 	int status;
1121 	int i, ret = 0;
1122 
1123 	urb->actual_length = 0;
1124 
1125 	i = 0;
1126 	list_for_each_entry(td, &urbp->td_list, list) {
1127 		int actlength;
1128 		unsigned int ctrlstat = td_status(td);
1129 
1130 		if (ctrlstat & TD_CTRL_ACTIVE)
1131 			return -EINPROGRESS;
1132 
1133 		actlength = uhci_actual_length(ctrlstat);
1134 		urb->iso_frame_desc[i].actual_length = actlength;
1135 		urb->actual_length += actlength;
1136 
1137 		status = uhci_map_status(uhci_status_bits(ctrlstat),
1138 				usb_pipeout(urb->pipe));
1139 		urb->iso_frame_desc[i].status = status;
1140 		if (status) {
1141 			urb->error_count++;
1142 			ret = status;
1143 		}
1144 
1145 		i++;
1146 	}
1147 
1148 	return ret;
1149 }
1150 
1151 static struct urb *uhci_find_urb_ep(struct uhci_hcd *uhci, struct urb *urb)
1152 {
1153 	struct urb_priv *up;
1154 
1155 	/* We don't match Isoc transfers since they are special */
1156 	if (usb_pipeisoc(urb->pipe))
1157 		return NULL;
1158 
1159 	list_for_each_entry(up, &uhci->urb_list, urb_list) {
1160 		struct urb *u = up->urb;
1161 
1162 		if (u->dev == urb->dev && u->status == -EINPROGRESS) {
1163 			/* For control, ignore the direction */
1164 			if (usb_pipecontrol(urb->pipe) &&
1165 			    (u->pipe & ~USB_DIR_IN) == (urb->pipe & ~USB_DIR_IN))
1166 				return u;
1167 			else if (u->pipe == urb->pipe)
1168 				return u;
1169 		}
1170 	}
1171 
1172 	return NULL;
1173 }
1174 
1175 static int uhci_urb_enqueue(struct usb_hcd *hcd,
1176 		struct usb_host_endpoint *ep,
1177 		struct urb *urb, int mem_flags)
1178 {
1179 	int ret;
1180 	struct uhci_hcd *uhci = hcd_to_uhci(hcd);
1181 	unsigned long flags;
1182 	struct urb *eurb;
1183 	int bustime;
1184 
1185 	spin_lock_irqsave(&uhci->lock, flags);
1186 
1187 	ret = urb->status;
1188 	if (ret != -EINPROGRESS)		/* URB already unlinked! */
1189 		goto out;
1190 
1191 	eurb = uhci_find_urb_ep(uhci, urb);
1192 
1193 	if (!uhci_alloc_urb_priv(uhci, urb)) {
1194 		ret = -ENOMEM;
1195 		goto out;
1196 	}
1197 
1198 	switch (usb_pipetype(urb->pipe)) {
1199 	case PIPE_CONTROL:
1200 		ret = uhci_submit_control(uhci, urb, eurb);
1201 		break;
1202 	case PIPE_INTERRUPT:
1203 		if (!eurb) {
1204 			bustime = usb_check_bandwidth(urb->dev, urb);
1205 			if (bustime < 0)
1206 				ret = bustime;
1207 			else {
1208 				ret = uhci_submit_interrupt(uhci, urb, eurb);
1209 				if (ret == -EINPROGRESS)
1210 					usb_claim_bandwidth(urb->dev, urb, bustime, 0);
1211 			}
1212 		} else {	/* inherit from parent */
1213 			urb->bandwidth = eurb->bandwidth;
1214 			ret = uhci_submit_interrupt(uhci, urb, eurb);
1215 		}
1216 		break;
1217 	case PIPE_BULK:
1218 		ret = uhci_submit_bulk(uhci, urb, eurb);
1219 		break;
1220 	case PIPE_ISOCHRONOUS:
1221 		bustime = usb_check_bandwidth(urb->dev, urb);
1222 		if (bustime < 0) {
1223 			ret = bustime;
1224 			break;
1225 		}
1226 
1227 		ret = uhci_submit_isochronous(uhci, urb);
1228 		if (ret == -EINPROGRESS)
1229 			usb_claim_bandwidth(urb->dev, urb, bustime, 1);
1230 		break;
1231 	}
1232 
1233 	if (ret != -EINPROGRESS) {
1234 		/* Submit failed, so delete it from the urb_list */
1235 		struct urb_priv *urbp = urb->hcpriv;
1236 
1237 		list_del_init(&urbp->urb_list);
1238 		uhci_destroy_urb_priv(uhci, urb);
1239 	} else
1240 		ret = 0;
1241 
1242 out:
1243 	spin_unlock_irqrestore(&uhci->lock, flags);
1244 	return ret;
1245 }
1246 
1247 /*
1248  * Return the result of a transfer
1249  */
1250 static void uhci_transfer_result(struct uhci_hcd *uhci, struct urb *urb)
1251 {
1252 	int ret = -EINPROGRESS;
1253 	struct urb_priv *urbp;
1254 
1255 	spin_lock(&urb->lock);
1256 
1257 	urbp = (struct urb_priv *)urb->hcpriv;
1258 
1259 	if (urb->status != -EINPROGRESS)	/* URB already dequeued */
1260 		goto out;
1261 
1262 	switch (usb_pipetype(urb->pipe)) {
1263 	case PIPE_CONTROL:
1264 		ret = uhci_result_control(uhci, urb);
1265 		break;
1266 	case PIPE_BULK:
1267 	case PIPE_INTERRUPT:
1268 		ret = uhci_result_common(uhci, urb);
1269 		break;
1270 	case PIPE_ISOCHRONOUS:
1271 		ret = uhci_result_isochronous(uhci, urb);
1272 		break;
1273 	}
1274 
1275 	if (ret == -EINPROGRESS)
1276 		goto out;
1277 	urb->status = ret;
1278 
1279 	switch (usb_pipetype(urb->pipe)) {
1280 	case PIPE_CONTROL:
1281 	case PIPE_BULK:
1282 	case PIPE_ISOCHRONOUS:
1283 		/* Release bandwidth for Interrupt or Isoc. transfers */
1284 		if (urb->bandwidth)
1285 			usb_release_bandwidth(urb->dev, urb, 1);
1286 		uhci_unlink_generic(uhci, urb);
1287 		break;
1288 	case PIPE_INTERRUPT:
1289 		/* Release bandwidth for Interrupt or Isoc. transfers */
1290 		/* Make sure we don't release if we have a queued URB */
1291 		if (list_empty(&urbp->queue_list) && urb->bandwidth)
1292 			usb_release_bandwidth(urb->dev, urb, 0);
1293 		else
1294 			/* bandwidth was passed on to queued URB, */
1295 			/* so don't let usb_unlink_urb() release it */
1296 			urb->bandwidth = 0;
1297 		uhci_unlink_generic(uhci, urb);
1298 		break;
1299 	default:
1300 		dev_info(uhci_dev(uhci), "%s: unknown pipe type %d "
1301 				"for urb %p\n",
1302 				__FUNCTION__, usb_pipetype(urb->pipe), urb);
1303 	}
1304 
1305 	/* Move it from uhci->urb_list to uhci->complete_list */
1306 	uhci_moveto_complete(uhci, urbp);
1307 
1308 out:
1309 	spin_unlock(&urb->lock);
1310 }
1311 
1312 static void uhci_unlink_generic(struct uhci_hcd *uhci, struct urb *urb)
1313 {
1314 	struct list_head *head;
1315 	struct uhci_td *td;
1316 	struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv;
1317 	int prevactive = 0;
1318 
1319 	uhci_dec_fsbr(uhci, urb);	/* Safe since it checks */
1320 
1321 	/*
1322 	 * Now we need to find out what the last successful toggle was
1323 	 * so we can update the local data toggle for the next transfer
1324 	 *
1325 	 * There are 2 ways the last successful completed TD is found:
1326 	 *
1327 	 * 1) The TD is NOT active and the actual length < expected length
1328 	 * 2) The TD is NOT active and it's the last TD in the chain
1329 	 *
1330 	 * and a third way the first uncompleted TD is found:
1331 	 *
1332 	 * 3) The TD is active and the previous TD is NOT active
1333 	 *
1334 	 * Control and Isochronous ignore the toggle, so this is safe
1335 	 * for all types
1336 	 *
1337 	 * FIXME: The toggle fixups won't be 100% reliable until we
1338 	 * change over to using a single queue for each endpoint and
1339 	 * stop the queue before unlinking.
1340 	 */
1341 	head = &urbp->td_list;
1342 	list_for_each_entry(td, head, list) {
1343 		unsigned int ctrlstat = td_status(td);
1344 
1345 		if (!(ctrlstat & TD_CTRL_ACTIVE) &&
1346 				(uhci_actual_length(ctrlstat) <
1347 				 uhci_expected_length(td_token(td)) ||
1348 				td->list.next == head))
1349 			usb_settoggle(urb->dev, uhci_endpoint(td_token(td)),
1350 				uhci_packetout(td_token(td)),
1351 				uhci_toggle(td_token(td)) ^ 1);
1352 		else if ((ctrlstat & TD_CTRL_ACTIVE) && !prevactive)
1353 			usb_settoggle(urb->dev, uhci_endpoint(td_token(td)),
1354 				uhci_packetout(td_token(td)),
1355 				uhci_toggle(td_token(td)));
1356 
1357 		prevactive = ctrlstat & TD_CTRL_ACTIVE;
1358 	}
1359 
1360 	uhci_delete_queued_urb(uhci, urb);
1361 
1362 	/* The interrupt loop will reclaim the QH's */
1363 	uhci_remove_qh(uhci, urbp->qh);
1364 	urbp->qh = NULL;
1365 }
1366 
1367 static int uhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb)
1368 {
1369 	struct uhci_hcd *uhci = hcd_to_uhci(hcd);
1370 	unsigned long flags;
1371 	struct urb_priv *urbp;
1372 
1373 	spin_lock_irqsave(&uhci->lock, flags);
1374 	urbp = urb->hcpriv;
1375 	if (!urbp)			/* URB was never linked! */
1376 		goto done;
1377 	list_del_init(&urbp->urb_list);
1378 
1379 	uhci_unlink_generic(uhci, urb);
1380 
1381 	uhci_get_current_frame_number(uhci);
1382 	if (uhci->frame_number + uhci->is_stopped != uhci->urb_remove_age) {
1383 		uhci_remove_pending_urbps(uhci);
1384 		uhci->urb_remove_age = uhci->frame_number;
1385 	}
1386 
1387 	/* If we're the first, set the next interrupt bit */
1388 	if (list_empty(&uhci->urb_remove_list))
1389 		uhci_set_next_interrupt(uhci);
1390 	list_add_tail(&urbp->urb_list, &uhci->urb_remove_list);
1391 
1392 done:
1393 	spin_unlock_irqrestore(&uhci->lock, flags);
1394 	return 0;
1395 }
1396 
1397 static int uhci_fsbr_timeout(struct uhci_hcd *uhci, struct urb *urb)
1398 {
1399 	struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv;
1400 	struct list_head *head;
1401 	struct uhci_td *td;
1402 	int count = 0;
1403 
1404 	uhci_dec_fsbr(uhci, urb);
1405 
1406 	urbp->fsbr_timeout = 1;
1407 
1408 	/*
1409 	 * Ideally we would want to fix qh->element as well, but it's
1410 	 * read/write by the HC, so that can introduce a race. It's not
1411 	 * really worth the hassle
1412 	 */
1413 
1414 	head = &urbp->td_list;
1415 	list_for_each_entry(td, head, list) {
1416 		/*
1417 		 * Make sure we don't do the last one (since it'll have the
1418 		 * TERM bit set) as well as we skip every so many TD's to
1419 		 * make sure it doesn't hog the bandwidth
1420 		 */
1421 		if (td->list.next != head && (count % DEPTH_INTERVAL) ==
1422 				(DEPTH_INTERVAL - 1))
1423 			td->link |= UHCI_PTR_DEPTH;
1424 
1425 		count++;
1426 	}
1427 
1428 	return 0;
1429 }
1430 
1431 static void uhci_free_pending_qhs(struct uhci_hcd *uhci)
1432 {
1433 	struct uhci_qh *qh, *tmp;
1434 
1435 	list_for_each_entry_safe(qh, tmp, &uhci->qh_remove_list, remove_list) {
1436 		list_del_init(&qh->remove_list);
1437 
1438 		uhci_free_qh(uhci, qh);
1439 	}
1440 }
1441 
1442 static void uhci_free_pending_tds(struct uhci_hcd *uhci)
1443 {
1444 	struct uhci_td *td, *tmp;
1445 
1446 	list_for_each_entry_safe(td, tmp, &uhci->td_remove_list, remove_list) {
1447 		list_del_init(&td->remove_list);
1448 
1449 		uhci_free_td(uhci, td);
1450 	}
1451 }
1452 
1453 static void
1454 uhci_finish_urb(struct usb_hcd *hcd, struct urb *urb, struct pt_regs *regs)
1455 __releases(uhci->lock)
1456 __acquires(uhci->lock)
1457 {
1458 	struct uhci_hcd *uhci = hcd_to_uhci(hcd);
1459 
1460 	uhci_destroy_urb_priv(uhci, urb);
1461 
1462 	spin_unlock(&uhci->lock);
1463 	usb_hcd_giveback_urb(hcd, urb, regs);
1464 	spin_lock(&uhci->lock);
1465 }
1466 
1467 static void uhci_finish_completion(struct uhci_hcd *uhci, struct pt_regs *regs)
1468 {
1469 	struct urb_priv *urbp, *tmp;
1470 
1471 	list_for_each_entry_safe(urbp, tmp, &uhci->complete_list, urb_list) {
1472 		struct urb *urb = urbp->urb;
1473 
1474 		list_del_init(&urbp->urb_list);
1475 		uhci_finish_urb(uhci_to_hcd(uhci), urb, regs);
1476 	}
1477 }
1478 
1479 static void uhci_remove_pending_urbps(struct uhci_hcd *uhci)
1480 {
1481 
1482 	/* Splice the urb_remove_list onto the end of the complete_list */
1483 	list_splice_init(&uhci->urb_remove_list, uhci->complete_list.prev);
1484 }
1485 
1486 /* Process events in the schedule, but only in one thread at a time */
1487 static void uhci_scan_schedule(struct uhci_hcd *uhci, struct pt_regs *regs)
1488 {
1489 	struct urb_priv *urbp, *tmp;
1490 
1491 	/* Don't allow re-entrant calls */
1492 	if (uhci->scan_in_progress) {
1493 		uhci->need_rescan = 1;
1494 		return;
1495 	}
1496 	uhci->scan_in_progress = 1;
1497  rescan:
1498 	uhci->need_rescan = 0;
1499 
1500 	uhci_get_current_frame_number(uhci);
1501 
1502 	if (uhci->frame_number + uhci->is_stopped != uhci->qh_remove_age)
1503 		uhci_free_pending_qhs(uhci);
1504 	if (uhci->frame_number + uhci->is_stopped != uhci->td_remove_age)
1505 		uhci_free_pending_tds(uhci);
1506 	if (uhci->frame_number + uhci->is_stopped != uhci->urb_remove_age)
1507 		uhci_remove_pending_urbps(uhci);
1508 
1509 	/* Walk the list of pending URBs to see which ones completed
1510 	 * (must be _safe because uhci_transfer_result() dequeues URBs) */
1511 	list_for_each_entry_safe(urbp, tmp, &uhci->urb_list, urb_list) {
1512 		struct urb *urb = urbp->urb;
1513 
1514 		/* Checks the status and does all of the magic necessary */
1515 		uhci_transfer_result(uhci, urb);
1516 	}
1517 	uhci_finish_completion(uhci, regs);
1518 
1519 	/* If the controller is stopped, we can finish these off right now */
1520 	if (uhci->is_stopped) {
1521 		uhci_free_pending_qhs(uhci);
1522 		uhci_free_pending_tds(uhci);
1523 		uhci_remove_pending_urbps(uhci);
1524 	}
1525 
1526 	if (uhci->need_rescan)
1527 		goto rescan;
1528 	uhci->scan_in_progress = 0;
1529 
1530 	if (list_empty(&uhci->urb_remove_list) &&
1531 	    list_empty(&uhci->td_remove_list) &&
1532 	    list_empty(&uhci->qh_remove_list))
1533 		uhci_clear_next_interrupt(uhci);
1534 	else
1535 		uhci_set_next_interrupt(uhci);
1536 
1537 	/* Wake up anyone waiting for an URB to complete */
1538 	wake_up_all(&uhci->waitqh);
1539 }
1540