1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * LiteUART serial controller (LiteX) Driver 4 * 5 * Copyright (C) 2019-2020 Antmicro <www.antmicro.com> 6 */ 7 8 #include <linux/bits.h> 9 #include <linux/console.h> 10 #include <linux/litex.h> 11 #include <linux/module.h> 12 #include <linux/of.h> 13 #include <linux/of_address.h> 14 #include <linux/of_platform.h> 15 #include <linux/serial.h> 16 #include <linux/serial_core.h> 17 #include <linux/slab.h> 18 #include <linux/timer.h> 19 #include <linux/tty_flip.h> 20 #include <linux/xarray.h> 21 22 /* 23 * CSRs definitions (base address offsets + width) 24 * 25 * The definitions below are true for LiteX SoC configured for 8-bit CSR Bus, 26 * 32-bit aligned. 27 * 28 * Supporting other configurations might require new definitions or a more 29 * generic way of indexing the LiteX CSRs. 30 * 31 * For more details on how CSRs are defined and handled in LiteX, see comments 32 * in the LiteX SoC Driver: drivers/soc/litex/litex_soc_ctrl.c 33 */ 34 #define OFF_RXTX 0x00 35 #define OFF_TXFULL 0x04 36 #define OFF_RXEMPTY 0x08 37 #define OFF_EV_STATUS 0x0c 38 #define OFF_EV_PENDING 0x10 39 #define OFF_EV_ENABLE 0x14 40 41 /* events */ 42 #define EV_TX BIT(0) 43 #define EV_RX BIT(1) 44 45 struct liteuart_port { 46 struct uart_port port; 47 struct timer_list timer; 48 u32 id; 49 }; 50 51 #define to_liteuart_port(port) container_of(port, struct liteuart_port, port) 52 53 static DEFINE_XARRAY_FLAGS(liteuart_array, XA_FLAGS_ALLOC); 54 55 #ifdef CONFIG_SERIAL_LITEUART_CONSOLE 56 static struct console liteuart_console; 57 #endif 58 59 static struct uart_driver liteuart_driver = { 60 .owner = THIS_MODULE, 61 .driver_name = KBUILD_MODNAME, 62 .dev_name = "ttyLXU", 63 .major = 0, 64 .minor = 0, 65 .nr = CONFIG_SERIAL_LITEUART_MAX_PORTS, 66 #ifdef CONFIG_SERIAL_LITEUART_CONSOLE 67 .cons = &liteuart_console, 68 #endif 69 }; 70 71 static void liteuart_timer(struct timer_list *t) 72 { 73 struct liteuart_port *uart = from_timer(uart, t, timer); 74 struct uart_port *port = &uart->port; 75 unsigned char __iomem *membase = port->membase; 76 int ch; 77 unsigned long status; 78 79 while ((status = !litex_read8(membase + OFF_RXEMPTY)) == 1) { 80 ch = litex_read8(membase + OFF_RXTX); 81 port->icount.rx++; 82 83 /* necessary for RXEMPTY to refresh its value */ 84 litex_write8(membase + OFF_EV_PENDING, EV_RX); 85 86 /* no overflow bits in status */ 87 if (!(uart_handle_sysrq_char(port, ch))) 88 uart_insert_char(port, status, 0, ch, TTY_NORMAL); 89 } 90 91 tty_flip_buffer_push(&port->state->port); 92 93 mod_timer(&uart->timer, jiffies + uart_poll_timeout(port)); 94 } 95 96 static void liteuart_putchar(struct uart_port *port, unsigned char ch) 97 { 98 while (litex_read8(port->membase + OFF_TXFULL)) 99 cpu_relax(); 100 101 litex_write8(port->membase + OFF_RXTX, ch); 102 } 103 104 static unsigned int liteuart_tx_empty(struct uart_port *port) 105 { 106 /* not really tx empty, just checking if tx is not full */ 107 if (!litex_read8(port->membase + OFF_TXFULL)) 108 return TIOCSER_TEMT; 109 110 return 0; 111 } 112 113 static void liteuart_set_mctrl(struct uart_port *port, unsigned int mctrl) 114 { 115 /* modem control register is not present in LiteUART */ 116 } 117 118 static unsigned int liteuart_get_mctrl(struct uart_port *port) 119 { 120 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR; 121 } 122 123 static void liteuart_stop_tx(struct uart_port *port) 124 { 125 } 126 127 static void liteuart_start_tx(struct uart_port *port) 128 { 129 struct circ_buf *xmit = &port->state->xmit; 130 unsigned char ch; 131 132 if (unlikely(port->x_char)) { 133 litex_write8(port->membase + OFF_RXTX, port->x_char); 134 port->icount.tx++; 135 port->x_char = 0; 136 } else if (!uart_circ_empty(xmit)) { 137 while (xmit->head != xmit->tail) { 138 ch = xmit->buf[xmit->tail]; 139 uart_xmit_advance(port, 1); 140 liteuart_putchar(port, ch); 141 } 142 } 143 144 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 145 uart_write_wakeup(port); 146 } 147 148 static void liteuart_stop_rx(struct uart_port *port) 149 { 150 struct liteuart_port *uart = to_liteuart_port(port); 151 152 /* just delete timer */ 153 del_timer(&uart->timer); 154 } 155 156 static int liteuart_startup(struct uart_port *port) 157 { 158 struct liteuart_port *uart = to_liteuart_port(port); 159 160 /* disable events */ 161 litex_write8(port->membase + OFF_EV_ENABLE, 0); 162 163 /* prepare timer for polling */ 164 timer_setup(&uart->timer, liteuart_timer, 0); 165 mod_timer(&uart->timer, jiffies + uart_poll_timeout(port)); 166 167 return 0; 168 } 169 170 static void liteuart_shutdown(struct uart_port *port) 171 { 172 } 173 174 static void liteuart_set_termios(struct uart_port *port, struct ktermios *new, 175 const struct ktermios *old) 176 { 177 unsigned int baud; 178 unsigned long flags; 179 180 spin_lock_irqsave(&port->lock, flags); 181 182 /* update baudrate */ 183 baud = uart_get_baud_rate(port, new, old, 0, 460800); 184 uart_update_timeout(port, new->c_cflag, baud); 185 186 spin_unlock_irqrestore(&port->lock, flags); 187 } 188 189 static const char *liteuart_type(struct uart_port *port) 190 { 191 return "liteuart"; 192 } 193 194 static void liteuart_config_port(struct uart_port *port, int flags) 195 { 196 /* 197 * Driver core for serial ports forces a non-zero value for port type. 198 * Write an arbitrary value here to accommodate the serial core driver, 199 * as ID part of UAPI is redundant. 200 */ 201 port->type = 1; 202 } 203 204 static int liteuart_verify_port(struct uart_port *port, 205 struct serial_struct *ser) 206 { 207 if (port->type != PORT_UNKNOWN && ser->type != 1) 208 return -EINVAL; 209 210 return 0; 211 } 212 213 static const struct uart_ops liteuart_ops = { 214 .tx_empty = liteuart_tx_empty, 215 .set_mctrl = liteuart_set_mctrl, 216 .get_mctrl = liteuart_get_mctrl, 217 .stop_tx = liteuart_stop_tx, 218 .start_tx = liteuart_start_tx, 219 .stop_rx = liteuart_stop_rx, 220 .startup = liteuart_startup, 221 .shutdown = liteuart_shutdown, 222 .set_termios = liteuart_set_termios, 223 .type = liteuart_type, 224 .config_port = liteuart_config_port, 225 .verify_port = liteuart_verify_port, 226 }; 227 228 static int liteuart_probe(struct platform_device *pdev) 229 { 230 struct liteuart_port *uart; 231 struct uart_port *port; 232 struct xa_limit limit; 233 int dev_id, ret; 234 235 /* look for aliases; auto-enumerate for free index if not found */ 236 dev_id = of_alias_get_id(pdev->dev.of_node, "serial"); 237 if (dev_id < 0) 238 limit = XA_LIMIT(0, CONFIG_SERIAL_LITEUART_MAX_PORTS); 239 else 240 limit = XA_LIMIT(dev_id, dev_id); 241 242 uart = devm_kzalloc(&pdev->dev, sizeof(struct liteuart_port), GFP_KERNEL); 243 if (!uart) 244 return -ENOMEM; 245 246 ret = xa_alloc(&liteuart_array, &dev_id, uart, limit, GFP_KERNEL); 247 if (ret) 248 return ret; 249 250 uart->id = dev_id; 251 port = &uart->port; 252 253 /* get membase */ 254 port->membase = devm_platform_get_and_ioremap_resource(pdev, 0, NULL); 255 if (IS_ERR(port->membase)) { 256 ret = PTR_ERR(port->membase); 257 goto err_erase_id; 258 } 259 260 /* values not from device tree */ 261 port->dev = &pdev->dev; 262 port->iotype = UPIO_MEM; 263 port->flags = UPF_BOOT_AUTOCONF; 264 port->ops = &liteuart_ops; 265 port->fifosize = 16; 266 port->type = PORT_UNKNOWN; 267 port->line = dev_id; 268 spin_lock_init(&port->lock); 269 270 platform_set_drvdata(pdev, port); 271 272 ret = uart_add_one_port(&liteuart_driver, &uart->port); 273 if (ret) 274 goto err_erase_id; 275 276 return 0; 277 278 err_erase_id: 279 xa_erase(&liteuart_array, uart->id); 280 281 return ret; 282 } 283 284 static int liteuart_remove(struct platform_device *pdev) 285 { 286 struct uart_port *port = platform_get_drvdata(pdev); 287 struct liteuart_port *uart = to_liteuart_port(port); 288 289 uart_remove_one_port(&liteuart_driver, port); 290 xa_erase(&liteuart_array, uart->id); 291 292 return 0; 293 } 294 295 static const struct of_device_id liteuart_of_match[] = { 296 { .compatible = "litex,liteuart" }, 297 {} 298 }; 299 MODULE_DEVICE_TABLE(of, liteuart_of_match); 300 301 static struct platform_driver liteuart_platform_driver = { 302 .probe = liteuart_probe, 303 .remove = liteuart_remove, 304 .driver = { 305 .name = KBUILD_MODNAME, 306 .of_match_table = liteuart_of_match, 307 }, 308 }; 309 310 #ifdef CONFIG_SERIAL_LITEUART_CONSOLE 311 312 static void liteuart_console_write(struct console *co, const char *s, 313 unsigned int count) 314 { 315 struct liteuart_port *uart; 316 struct uart_port *port; 317 unsigned long flags; 318 319 uart = (struct liteuart_port *)xa_load(&liteuart_array, co->index); 320 port = &uart->port; 321 322 spin_lock_irqsave(&port->lock, flags); 323 uart_console_write(port, s, count, liteuart_putchar); 324 spin_unlock_irqrestore(&port->lock, flags); 325 } 326 327 static int liteuart_console_setup(struct console *co, char *options) 328 { 329 struct liteuart_port *uart; 330 struct uart_port *port; 331 int baud = 115200; 332 int bits = 8; 333 int parity = 'n'; 334 int flow = 'n'; 335 336 uart = (struct liteuart_port *)xa_load(&liteuart_array, co->index); 337 if (!uart) 338 return -ENODEV; 339 340 port = &uart->port; 341 if (!port->membase) 342 return -ENODEV; 343 344 if (options) 345 uart_parse_options(options, &baud, &parity, &bits, &flow); 346 347 return uart_set_options(port, co, baud, parity, bits, flow); 348 } 349 350 static struct console liteuart_console = { 351 .name = KBUILD_MODNAME, 352 .write = liteuart_console_write, 353 .device = uart_console_device, 354 .setup = liteuart_console_setup, 355 .flags = CON_PRINTBUFFER, 356 .index = -1, 357 .data = &liteuart_driver, 358 }; 359 360 static int __init liteuart_console_init(void) 361 { 362 register_console(&liteuart_console); 363 364 return 0; 365 } 366 console_initcall(liteuart_console_init); 367 368 static void early_liteuart_write(struct console *console, const char *s, 369 unsigned int count) 370 { 371 struct earlycon_device *device = console->data; 372 struct uart_port *port = &device->port; 373 374 uart_console_write(port, s, count, liteuart_putchar); 375 } 376 377 static int __init early_liteuart_setup(struct earlycon_device *device, 378 const char *options) 379 { 380 if (!device->port.membase) 381 return -ENODEV; 382 383 device->con->write = early_liteuart_write; 384 return 0; 385 } 386 387 OF_EARLYCON_DECLARE(liteuart, "litex,liteuart", early_liteuart_setup); 388 #endif /* CONFIG_SERIAL_LITEUART_CONSOLE */ 389 390 static int __init liteuart_init(void) 391 { 392 int res; 393 394 res = uart_register_driver(&liteuart_driver); 395 if (res) 396 return res; 397 398 res = platform_driver_register(&liteuart_platform_driver); 399 if (res) 400 uart_unregister_driver(&liteuart_driver); 401 402 return res; 403 } 404 405 static void __exit liteuart_exit(void) 406 { 407 platform_driver_unregister(&liteuart_platform_driver); 408 uart_unregister_driver(&liteuart_driver); 409 } 410 411 module_init(liteuart_init); 412 module_exit(liteuart_exit); 413 414 MODULE_AUTHOR("Antmicro <www.antmicro.com>"); 415 MODULE_DESCRIPTION("LiteUART serial driver"); 416 MODULE_LICENSE("GPL v2"); 417 MODULE_ALIAS("platform:liteuart"); 418