1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * LiteUART serial controller (LiteX) Driver 4 * 5 * Copyright (C) 2019-2020 Antmicro <www.antmicro.com> 6 */ 7 8 #include <linux/bits.h> 9 #include <linux/console.h> 10 #include <linux/litex.h> 11 #include <linux/module.h> 12 #include <linux/of.h> 13 #include <linux/of_address.h> 14 #include <linux/of_platform.h> 15 #include <linux/serial.h> 16 #include <linux/serial_core.h> 17 #include <linux/slab.h> 18 #include <linux/timer.h> 19 #include <linux/tty_flip.h> 20 #include <linux/xarray.h> 21 22 /* 23 * CSRs definitions (base address offsets + width) 24 * 25 * The definitions below are true for LiteX SoC configured for 8-bit CSR Bus, 26 * 32-bit aligned. 27 * 28 * Supporting other configurations might require new definitions or a more 29 * generic way of indexing the LiteX CSRs. 30 * 31 * For more details on how CSRs are defined and handled in LiteX, see comments 32 * in the LiteX SoC Driver: drivers/soc/litex/litex_soc_ctrl.c 33 */ 34 #define OFF_RXTX 0x00 35 #define OFF_TXFULL 0x04 36 #define OFF_RXEMPTY 0x08 37 #define OFF_EV_STATUS 0x0c 38 #define OFF_EV_PENDING 0x10 39 #define OFF_EV_ENABLE 0x14 40 41 /* events */ 42 #define EV_TX BIT(0) 43 #define EV_RX BIT(1) 44 45 struct liteuart_port { 46 struct uart_port port; 47 struct timer_list timer; 48 u32 id; 49 }; 50 51 #define to_liteuart_port(port) container_of(port, struct liteuart_port, port) 52 53 static DEFINE_XARRAY_FLAGS(liteuart_array, XA_FLAGS_ALLOC); 54 55 #ifdef CONFIG_SERIAL_LITEUART_CONSOLE 56 static struct console liteuart_console; 57 #endif 58 59 static struct uart_driver liteuart_driver = { 60 .owner = THIS_MODULE, 61 .driver_name = KBUILD_MODNAME, 62 .dev_name = "ttyLXU", 63 .major = 0, 64 .minor = 0, 65 .nr = CONFIG_SERIAL_LITEUART_MAX_PORTS, 66 #ifdef CONFIG_SERIAL_LITEUART_CONSOLE 67 .cons = &liteuart_console, 68 #endif 69 }; 70 71 static void liteuart_timer(struct timer_list *t) 72 { 73 struct liteuart_port *uart = from_timer(uart, t, timer); 74 struct uart_port *port = &uart->port; 75 unsigned char __iomem *membase = port->membase; 76 u8 ch; 77 78 while (!litex_read8(membase + OFF_RXEMPTY)) { 79 ch = litex_read8(membase + OFF_RXTX); 80 port->icount.rx++; 81 82 /* necessary for RXEMPTY to refresh its value */ 83 litex_write8(membase + OFF_EV_PENDING, EV_RX); 84 85 /* no overflow bits in status */ 86 if (!(uart_handle_sysrq_char(port, ch))) 87 uart_insert_char(port, 1, 0, ch, TTY_NORMAL); 88 } 89 90 tty_flip_buffer_push(&port->state->port); 91 92 mod_timer(&uart->timer, jiffies + uart_poll_timeout(port)); 93 } 94 95 static void liteuart_putchar(struct uart_port *port, unsigned char ch) 96 { 97 while (litex_read8(port->membase + OFF_TXFULL)) 98 cpu_relax(); 99 100 litex_write8(port->membase + OFF_RXTX, ch); 101 } 102 103 static unsigned int liteuart_tx_empty(struct uart_port *port) 104 { 105 /* not really tx empty, just checking if tx is not full */ 106 if (!litex_read8(port->membase + OFF_TXFULL)) 107 return TIOCSER_TEMT; 108 109 return 0; 110 } 111 112 static void liteuart_set_mctrl(struct uart_port *port, unsigned int mctrl) 113 { 114 /* modem control register is not present in LiteUART */ 115 } 116 117 static unsigned int liteuart_get_mctrl(struct uart_port *port) 118 { 119 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR; 120 } 121 122 static void liteuart_stop_tx(struct uart_port *port) 123 { 124 } 125 126 static void liteuart_start_tx(struct uart_port *port) 127 { 128 struct circ_buf *xmit = &port->state->xmit; 129 unsigned char ch; 130 131 if (unlikely(port->x_char)) { 132 litex_write8(port->membase + OFF_RXTX, port->x_char); 133 port->icount.tx++; 134 port->x_char = 0; 135 } else if (!uart_circ_empty(xmit)) { 136 while (xmit->head != xmit->tail) { 137 ch = xmit->buf[xmit->tail]; 138 uart_xmit_advance(port, 1); 139 liteuart_putchar(port, ch); 140 } 141 } 142 143 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 144 uart_write_wakeup(port); 145 } 146 147 static void liteuart_stop_rx(struct uart_port *port) 148 { 149 struct liteuart_port *uart = to_liteuart_port(port); 150 151 /* just delete timer */ 152 del_timer(&uart->timer); 153 } 154 155 static int liteuart_startup(struct uart_port *port) 156 { 157 struct liteuart_port *uart = to_liteuart_port(port); 158 159 /* disable events */ 160 litex_write8(port->membase + OFF_EV_ENABLE, 0); 161 162 /* prepare timer for polling */ 163 timer_setup(&uart->timer, liteuart_timer, 0); 164 mod_timer(&uart->timer, jiffies + uart_poll_timeout(port)); 165 166 return 0; 167 } 168 169 static void liteuart_shutdown(struct uart_port *port) 170 { 171 } 172 173 static void liteuart_set_termios(struct uart_port *port, struct ktermios *new, 174 const struct ktermios *old) 175 { 176 unsigned int baud; 177 unsigned long flags; 178 179 spin_lock_irqsave(&port->lock, flags); 180 181 /* update baudrate */ 182 baud = uart_get_baud_rate(port, new, old, 0, 460800); 183 uart_update_timeout(port, new->c_cflag, baud); 184 185 spin_unlock_irqrestore(&port->lock, flags); 186 } 187 188 static const char *liteuart_type(struct uart_port *port) 189 { 190 return "liteuart"; 191 } 192 193 static void liteuart_config_port(struct uart_port *port, int flags) 194 { 195 /* 196 * Driver core for serial ports forces a non-zero value for port type. 197 * Write an arbitrary value here to accommodate the serial core driver, 198 * as ID part of UAPI is redundant. 199 */ 200 port->type = 1; 201 } 202 203 static int liteuart_verify_port(struct uart_port *port, 204 struct serial_struct *ser) 205 { 206 if (port->type != PORT_UNKNOWN && ser->type != 1) 207 return -EINVAL; 208 209 return 0; 210 } 211 212 static const struct uart_ops liteuart_ops = { 213 .tx_empty = liteuart_tx_empty, 214 .set_mctrl = liteuart_set_mctrl, 215 .get_mctrl = liteuart_get_mctrl, 216 .stop_tx = liteuart_stop_tx, 217 .start_tx = liteuart_start_tx, 218 .stop_rx = liteuart_stop_rx, 219 .startup = liteuart_startup, 220 .shutdown = liteuart_shutdown, 221 .set_termios = liteuart_set_termios, 222 .type = liteuart_type, 223 .config_port = liteuart_config_port, 224 .verify_port = liteuart_verify_port, 225 }; 226 227 static int liteuart_probe(struct platform_device *pdev) 228 { 229 struct liteuart_port *uart; 230 struct uart_port *port; 231 struct xa_limit limit; 232 int dev_id, ret; 233 234 /* look for aliases; auto-enumerate for free index if not found */ 235 dev_id = of_alias_get_id(pdev->dev.of_node, "serial"); 236 if (dev_id < 0) 237 limit = XA_LIMIT(0, CONFIG_SERIAL_LITEUART_MAX_PORTS); 238 else 239 limit = XA_LIMIT(dev_id, dev_id); 240 241 uart = devm_kzalloc(&pdev->dev, sizeof(struct liteuart_port), GFP_KERNEL); 242 if (!uart) 243 return -ENOMEM; 244 245 ret = xa_alloc(&liteuart_array, &dev_id, uart, limit, GFP_KERNEL); 246 if (ret) 247 return ret; 248 249 uart->id = dev_id; 250 port = &uart->port; 251 252 /* get membase */ 253 port->membase = devm_platform_get_and_ioremap_resource(pdev, 0, NULL); 254 if (IS_ERR(port->membase)) { 255 ret = PTR_ERR(port->membase); 256 goto err_erase_id; 257 } 258 259 /* values not from device tree */ 260 port->dev = &pdev->dev; 261 port->iotype = UPIO_MEM; 262 port->flags = UPF_BOOT_AUTOCONF; 263 port->ops = &liteuart_ops; 264 port->fifosize = 16; 265 port->type = PORT_UNKNOWN; 266 port->line = dev_id; 267 spin_lock_init(&port->lock); 268 269 platform_set_drvdata(pdev, port); 270 271 ret = uart_add_one_port(&liteuart_driver, &uart->port); 272 if (ret) 273 goto err_erase_id; 274 275 return 0; 276 277 err_erase_id: 278 xa_erase(&liteuart_array, uart->id); 279 280 return ret; 281 } 282 283 static int liteuart_remove(struct platform_device *pdev) 284 { 285 struct uart_port *port = platform_get_drvdata(pdev); 286 struct liteuart_port *uart = to_liteuart_port(port); 287 288 uart_remove_one_port(&liteuart_driver, port); 289 xa_erase(&liteuart_array, uart->id); 290 291 return 0; 292 } 293 294 static const struct of_device_id liteuart_of_match[] = { 295 { .compatible = "litex,liteuart" }, 296 {} 297 }; 298 MODULE_DEVICE_TABLE(of, liteuart_of_match); 299 300 static struct platform_driver liteuart_platform_driver = { 301 .probe = liteuart_probe, 302 .remove = liteuart_remove, 303 .driver = { 304 .name = KBUILD_MODNAME, 305 .of_match_table = liteuart_of_match, 306 }, 307 }; 308 309 #ifdef CONFIG_SERIAL_LITEUART_CONSOLE 310 311 static void liteuart_console_write(struct console *co, const char *s, 312 unsigned int count) 313 { 314 struct liteuart_port *uart; 315 struct uart_port *port; 316 unsigned long flags; 317 318 uart = (struct liteuart_port *)xa_load(&liteuart_array, co->index); 319 port = &uart->port; 320 321 spin_lock_irqsave(&port->lock, flags); 322 uart_console_write(port, s, count, liteuart_putchar); 323 spin_unlock_irqrestore(&port->lock, flags); 324 } 325 326 static int liteuart_console_setup(struct console *co, char *options) 327 { 328 struct liteuart_port *uart; 329 struct uart_port *port; 330 int baud = 115200; 331 int bits = 8; 332 int parity = 'n'; 333 int flow = 'n'; 334 335 uart = (struct liteuart_port *)xa_load(&liteuart_array, co->index); 336 if (!uart) 337 return -ENODEV; 338 339 port = &uart->port; 340 if (!port->membase) 341 return -ENODEV; 342 343 if (options) 344 uart_parse_options(options, &baud, &parity, &bits, &flow); 345 346 return uart_set_options(port, co, baud, parity, bits, flow); 347 } 348 349 static struct console liteuart_console = { 350 .name = KBUILD_MODNAME, 351 .write = liteuart_console_write, 352 .device = uart_console_device, 353 .setup = liteuart_console_setup, 354 .flags = CON_PRINTBUFFER, 355 .index = -1, 356 .data = &liteuart_driver, 357 }; 358 359 static int __init liteuart_console_init(void) 360 { 361 register_console(&liteuart_console); 362 363 return 0; 364 } 365 console_initcall(liteuart_console_init); 366 367 static void early_liteuart_write(struct console *console, const char *s, 368 unsigned int count) 369 { 370 struct earlycon_device *device = console->data; 371 struct uart_port *port = &device->port; 372 373 uart_console_write(port, s, count, liteuart_putchar); 374 } 375 376 static int __init early_liteuart_setup(struct earlycon_device *device, 377 const char *options) 378 { 379 if (!device->port.membase) 380 return -ENODEV; 381 382 device->con->write = early_liteuart_write; 383 return 0; 384 } 385 386 OF_EARLYCON_DECLARE(liteuart, "litex,liteuart", early_liteuart_setup); 387 #endif /* CONFIG_SERIAL_LITEUART_CONSOLE */ 388 389 static int __init liteuart_init(void) 390 { 391 int res; 392 393 res = uart_register_driver(&liteuart_driver); 394 if (res) 395 return res; 396 397 res = platform_driver_register(&liteuart_platform_driver); 398 if (res) 399 uart_unregister_driver(&liteuart_driver); 400 401 return res; 402 } 403 404 static void __exit liteuart_exit(void) 405 { 406 platform_driver_unregister(&liteuart_platform_driver); 407 uart_unregister_driver(&liteuart_driver); 408 } 409 410 module_init(liteuart_init); 411 module_exit(liteuart_exit); 412 413 MODULE_AUTHOR("Antmicro <www.antmicro.com>"); 414 MODULE_DESCRIPTION("LiteUART serial driver"); 415 MODULE_LICENSE("GPL v2"); 416 MODULE_ALIAS("platform:liteuart"); 417