xref: /openbmc/linux/drivers/tty/serial/liteuart.c (revision 771268843caa3ecd3fa43b05a6d1d74700785ad8)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * LiteUART serial controller (LiteX) Driver
4  *
5  * Copyright (C) 2019-2020 Antmicro <www.antmicro.com>
6  */
7 
8 #include <linux/bits.h>
9 #include <linux/console.h>
10 #include <linux/litex.h>
11 #include <linux/module.h>
12 #include <linux/of.h>
13 #include <linux/of_address.h>
14 #include <linux/of_platform.h>
15 #include <linux/serial.h>
16 #include <linux/serial_core.h>
17 #include <linux/slab.h>
18 #include <linux/timer.h>
19 #include <linux/tty_flip.h>
20 #include <linux/xarray.h>
21 
22 /*
23  * CSRs definitions (base address offsets + width)
24  *
25  * The definitions below are true for LiteX SoC configured for 8-bit CSR Bus,
26  * 32-bit aligned.
27  *
28  * Supporting other configurations might require new definitions or a more
29  * generic way of indexing the LiteX CSRs.
30  *
31  * For more details on how CSRs are defined and handled in LiteX, see comments
32  * in the LiteX SoC Driver: drivers/soc/litex/litex_soc_ctrl.c
33  */
34 #define OFF_RXTX	0x00
35 #define OFF_TXFULL	0x04
36 #define OFF_RXEMPTY	0x08
37 #define OFF_EV_STATUS	0x0c
38 #define OFF_EV_PENDING	0x10
39 #define OFF_EV_ENABLE	0x14
40 
41 /* events */
42 #define EV_TX		BIT(0)
43 #define EV_RX		BIT(1)
44 
45 struct liteuart_port {
46 	struct uart_port port;
47 	struct timer_list timer;
48 	u32 id;
49 };
50 
51 #define to_liteuart_port(port)	container_of(port, struct liteuart_port, port)
52 
53 static DEFINE_XARRAY_FLAGS(liteuart_array, XA_FLAGS_ALLOC);
54 
55 #ifdef CONFIG_SERIAL_LITEUART_CONSOLE
56 static struct console liteuart_console;
57 #endif
58 
59 static struct uart_driver liteuart_driver = {
60 	.owner = THIS_MODULE,
61 	.driver_name = KBUILD_MODNAME,
62 	.dev_name = "ttyLXU",
63 	.major = 0,
64 	.minor = 0,
65 	.nr = CONFIG_SERIAL_LITEUART_MAX_PORTS,
66 #ifdef CONFIG_SERIAL_LITEUART_CONSOLE
67 	.cons = &liteuart_console,
68 #endif
69 };
70 
71 static void liteuart_timer(struct timer_list *t)
72 {
73 	struct liteuart_port *uart = from_timer(uart, t, timer);
74 	struct uart_port *port = &uart->port;
75 	unsigned char __iomem *membase = port->membase;
76 	unsigned int flg = TTY_NORMAL;
77 	int ch;
78 	unsigned long status;
79 
80 	while ((status = !litex_read8(membase + OFF_RXEMPTY)) == 1) {
81 		ch = litex_read8(membase + OFF_RXTX);
82 		port->icount.rx++;
83 
84 		/* necessary for RXEMPTY to refresh its value */
85 		litex_write8(membase + OFF_EV_PENDING, EV_RX);
86 
87 		/* no overflow bits in status */
88 		if (!(uart_handle_sysrq_char(port, ch)))
89 			uart_insert_char(port, status, 0, ch, flg);
90 	}
91 
92 	tty_flip_buffer_push(&port->state->port);
93 
94 	mod_timer(&uart->timer, jiffies + uart_poll_timeout(port));
95 }
96 
97 static void liteuart_putchar(struct uart_port *port, unsigned char ch)
98 {
99 	while (litex_read8(port->membase + OFF_TXFULL))
100 		cpu_relax();
101 
102 	litex_write8(port->membase + OFF_RXTX, ch);
103 }
104 
105 static unsigned int liteuart_tx_empty(struct uart_port *port)
106 {
107 	/* not really tx empty, just checking if tx is not full */
108 	if (!litex_read8(port->membase + OFF_TXFULL))
109 		return TIOCSER_TEMT;
110 
111 	return 0;
112 }
113 
114 static void liteuart_set_mctrl(struct uart_port *port, unsigned int mctrl)
115 {
116 	/* modem control register is not present in LiteUART */
117 }
118 
119 static unsigned int liteuart_get_mctrl(struct uart_port *port)
120 {
121 	return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
122 }
123 
124 static void liteuart_stop_tx(struct uart_port *port)
125 {
126 }
127 
128 static void liteuart_start_tx(struct uart_port *port)
129 {
130 	struct circ_buf *xmit = &port->state->xmit;
131 	unsigned char ch;
132 
133 	if (unlikely(port->x_char)) {
134 		litex_write8(port->membase + OFF_RXTX, port->x_char);
135 		port->icount.tx++;
136 		port->x_char = 0;
137 	} else if (!uart_circ_empty(xmit)) {
138 		while (xmit->head != xmit->tail) {
139 			ch = xmit->buf[xmit->tail];
140 			uart_xmit_advance(port, 1);
141 			liteuart_putchar(port, ch);
142 		}
143 	}
144 
145 	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
146 		uart_write_wakeup(port);
147 }
148 
149 static void liteuart_stop_rx(struct uart_port *port)
150 {
151 	struct liteuart_port *uart = to_liteuart_port(port);
152 
153 	/* just delete timer */
154 	del_timer(&uart->timer);
155 }
156 
157 static int liteuart_startup(struct uart_port *port)
158 {
159 	struct liteuart_port *uart = to_liteuart_port(port);
160 
161 	/* disable events */
162 	litex_write8(port->membase + OFF_EV_ENABLE, 0);
163 
164 	/* prepare timer for polling */
165 	timer_setup(&uart->timer, liteuart_timer, 0);
166 	mod_timer(&uart->timer, jiffies + uart_poll_timeout(port));
167 
168 	return 0;
169 }
170 
171 static void liteuart_shutdown(struct uart_port *port)
172 {
173 }
174 
175 static void liteuart_set_termios(struct uart_port *port, struct ktermios *new,
176 				 const struct ktermios *old)
177 {
178 	unsigned int baud;
179 	unsigned long flags;
180 
181 	spin_lock_irqsave(&port->lock, flags);
182 
183 	/* update baudrate */
184 	baud = uart_get_baud_rate(port, new, old, 0, 460800);
185 	uart_update_timeout(port, new->c_cflag, baud);
186 
187 	spin_unlock_irqrestore(&port->lock, flags);
188 }
189 
190 static const char *liteuart_type(struct uart_port *port)
191 {
192 	return "liteuart";
193 }
194 
195 static void liteuart_config_port(struct uart_port *port, int flags)
196 {
197 	/*
198 	 * Driver core for serial ports forces a non-zero value for port type.
199 	 * Write an arbitrary value here to accommodate the serial core driver,
200 	 * as ID part of UAPI is redundant.
201 	 */
202 	port->type = 1;
203 }
204 
205 static int liteuart_verify_port(struct uart_port *port,
206 				struct serial_struct *ser)
207 {
208 	if (port->type != PORT_UNKNOWN && ser->type != 1)
209 		return -EINVAL;
210 
211 	return 0;
212 }
213 
214 static const struct uart_ops liteuart_ops = {
215 	.tx_empty	= liteuart_tx_empty,
216 	.set_mctrl	= liteuart_set_mctrl,
217 	.get_mctrl	= liteuart_get_mctrl,
218 	.stop_tx	= liteuart_stop_tx,
219 	.start_tx	= liteuart_start_tx,
220 	.stop_rx	= liteuart_stop_rx,
221 	.startup	= liteuart_startup,
222 	.shutdown	= liteuart_shutdown,
223 	.set_termios	= liteuart_set_termios,
224 	.type		= liteuart_type,
225 	.config_port	= liteuart_config_port,
226 	.verify_port	= liteuart_verify_port,
227 };
228 
229 static int liteuart_probe(struct platform_device *pdev)
230 {
231 	struct liteuart_port *uart;
232 	struct uart_port *port;
233 	struct xa_limit limit;
234 	int dev_id, ret;
235 
236 	/* look for aliases; auto-enumerate for free index if not found */
237 	dev_id = of_alias_get_id(pdev->dev.of_node, "serial");
238 	if (dev_id < 0)
239 		limit = XA_LIMIT(0, CONFIG_SERIAL_LITEUART_MAX_PORTS);
240 	else
241 		limit = XA_LIMIT(dev_id, dev_id);
242 
243 	uart = devm_kzalloc(&pdev->dev, sizeof(struct liteuart_port), GFP_KERNEL);
244 	if (!uart)
245 		return -ENOMEM;
246 
247 	ret = xa_alloc(&liteuart_array, &dev_id, uart, limit, GFP_KERNEL);
248 	if (ret)
249 		return ret;
250 
251 	uart->id = dev_id;
252 	port = &uart->port;
253 
254 	/* get membase */
255 	port->membase = devm_platform_get_and_ioremap_resource(pdev, 0, NULL);
256 	if (IS_ERR(port->membase)) {
257 		ret = PTR_ERR(port->membase);
258 		goto err_erase_id;
259 	}
260 
261 	/* values not from device tree */
262 	port->dev = &pdev->dev;
263 	port->iotype = UPIO_MEM;
264 	port->flags = UPF_BOOT_AUTOCONF;
265 	port->ops = &liteuart_ops;
266 	port->fifosize = 16;
267 	port->type = PORT_UNKNOWN;
268 	port->line = dev_id;
269 	spin_lock_init(&port->lock);
270 
271 	platform_set_drvdata(pdev, port);
272 
273 	ret = uart_add_one_port(&liteuart_driver, &uart->port);
274 	if (ret)
275 		goto err_erase_id;
276 
277 	return 0;
278 
279 err_erase_id:
280 	xa_erase(&liteuart_array, uart->id);
281 
282 	return ret;
283 }
284 
285 static int liteuart_remove(struct platform_device *pdev)
286 {
287 	struct uart_port *port = platform_get_drvdata(pdev);
288 	struct liteuart_port *uart = to_liteuart_port(port);
289 
290 	uart_remove_one_port(&liteuart_driver, port);
291 	xa_erase(&liteuart_array, uart->id);
292 
293 	return 0;
294 }
295 
296 static const struct of_device_id liteuart_of_match[] = {
297 	{ .compatible = "litex,liteuart" },
298 	{}
299 };
300 MODULE_DEVICE_TABLE(of, liteuart_of_match);
301 
302 static struct platform_driver liteuart_platform_driver = {
303 	.probe = liteuart_probe,
304 	.remove = liteuart_remove,
305 	.driver = {
306 		.name = KBUILD_MODNAME,
307 		.of_match_table = liteuart_of_match,
308 	},
309 };
310 
311 #ifdef CONFIG_SERIAL_LITEUART_CONSOLE
312 
313 static void liteuart_console_write(struct console *co, const char *s,
314 	unsigned int count)
315 {
316 	struct liteuart_port *uart;
317 	struct uart_port *port;
318 	unsigned long flags;
319 
320 	uart = (struct liteuart_port *)xa_load(&liteuart_array, co->index);
321 	port = &uart->port;
322 
323 	spin_lock_irqsave(&port->lock, flags);
324 	uart_console_write(port, s, count, liteuart_putchar);
325 	spin_unlock_irqrestore(&port->lock, flags);
326 }
327 
328 static int liteuart_console_setup(struct console *co, char *options)
329 {
330 	struct liteuart_port *uart;
331 	struct uart_port *port;
332 	int baud = 115200;
333 	int bits = 8;
334 	int parity = 'n';
335 	int flow = 'n';
336 
337 	uart = (struct liteuart_port *)xa_load(&liteuart_array, co->index);
338 	if (!uart)
339 		return -ENODEV;
340 
341 	port = &uart->port;
342 	if (!port->membase)
343 		return -ENODEV;
344 
345 	if (options)
346 		uart_parse_options(options, &baud, &parity, &bits, &flow);
347 
348 	return uart_set_options(port, co, baud, parity, bits, flow);
349 }
350 
351 static struct console liteuart_console = {
352 	.name = KBUILD_MODNAME,
353 	.write = liteuart_console_write,
354 	.device = uart_console_device,
355 	.setup = liteuart_console_setup,
356 	.flags = CON_PRINTBUFFER,
357 	.index = -1,
358 	.data = &liteuart_driver,
359 };
360 
361 static int __init liteuart_console_init(void)
362 {
363 	register_console(&liteuart_console);
364 
365 	return 0;
366 }
367 console_initcall(liteuart_console_init);
368 
369 static void early_liteuart_write(struct console *console, const char *s,
370 				    unsigned int count)
371 {
372 	struct earlycon_device *device = console->data;
373 	struct uart_port *port = &device->port;
374 
375 	uart_console_write(port, s, count, liteuart_putchar);
376 }
377 
378 static int __init early_liteuart_setup(struct earlycon_device *device,
379 				       const char *options)
380 {
381 	if (!device->port.membase)
382 		return -ENODEV;
383 
384 	device->con->write = early_liteuart_write;
385 	return 0;
386 }
387 
388 OF_EARLYCON_DECLARE(liteuart, "litex,liteuart", early_liteuart_setup);
389 #endif /* CONFIG_SERIAL_LITEUART_CONSOLE */
390 
391 static int __init liteuart_init(void)
392 {
393 	int res;
394 
395 	res = uart_register_driver(&liteuart_driver);
396 	if (res)
397 		return res;
398 
399 	res = platform_driver_register(&liteuart_platform_driver);
400 	if (res)
401 		uart_unregister_driver(&liteuart_driver);
402 
403 	return res;
404 }
405 
406 static void __exit liteuart_exit(void)
407 {
408 	platform_driver_unregister(&liteuart_platform_driver);
409 	uart_unregister_driver(&liteuart_driver);
410 }
411 
412 module_init(liteuart_init);
413 module_exit(liteuart_exit);
414 
415 MODULE_AUTHOR("Antmicro <www.antmicro.com>");
416 MODULE_DESCRIPTION("LiteUART serial driver");
417 MODULE_LICENSE("GPL v2");
418 MODULE_ALIAS("platform:liteuart");
419