xref: /openbmc/linux/drivers/tty/serial/8250/8250_fsl.c (revision 1ac731c529cd4d6adbce134754b51ff7d822b145)
1e3b3d0f5SGreg Kroah-Hartman // SPDX-License-Identifier: GPL-2.0
29bef3d41SPaul Gortmaker /*
39bef3d41SPaul Gortmaker  * Freescale 16550 UART "driver", Copyright (C) 2011 Paul Gortmaker.
411361610Skuldip dwivedi  * Copyright 2020 NXP
511361610Skuldip dwivedi  * Copyright 2020 Puresoftware Ltd.
69bef3d41SPaul Gortmaker  *
79bef3d41SPaul Gortmaker  * This isn't a full driver; it just provides an alternate IRQ
811361610Skuldip dwivedi  * handler to deal with an errata and provide ACPI wrapper.
911361610Skuldip dwivedi  * Everything else is just using the bog standard 8250 support.
109bef3d41SPaul Gortmaker  *
119bef3d41SPaul Gortmaker  * We follow code flow of serial8250_default_handle_irq() but add
129bef3d41SPaul Gortmaker  * a check for a break and insert a dummy read on the Rx for the
139bef3d41SPaul Gortmaker  * immediately following IRQ event.
149bef3d41SPaul Gortmaker  *
159bef3d41SPaul Gortmaker  * We re-use the already existing "bug handling" lsr_saved_flags
169bef3d41SPaul Gortmaker  * field to carry the "what we just did" information from the one
179bef3d41SPaul Gortmaker  * IRQ event to the next one.
189bef3d41SPaul Gortmaker  */
199bef3d41SPaul Gortmaker 
2011361610Skuldip dwivedi #include <linux/acpi.h>
2111361610Skuldip dwivedi #include <linux/serial_reg.h>
2211361610Skuldip dwivedi #include <linux/serial_8250.h>
2311361610Skuldip dwivedi 
2411361610Skuldip dwivedi #include "8250.h"
2511361610Skuldip dwivedi 
fsl8250_handle_irq(struct uart_port * port)269bef3d41SPaul Gortmaker int fsl8250_handle_irq(struct uart_port *port)
279bef3d41SPaul Gortmaker {
28853a9ae2SJohan Hovold 	unsigned long flags;
29f8ba5680SIlpo Järvinen 	u16 lsr, orig_lsr;
309bef3d41SPaul Gortmaker 	unsigned int iir;
31b1261c86SAndy Shevchenko 	struct uart_8250_port *up = up_to_u8250p(port);
329bef3d41SPaul Gortmaker 
33853a9ae2SJohan Hovold 	spin_lock_irqsave(&up->port.lock, flags);
349bef3d41SPaul Gortmaker 
359bef3d41SPaul Gortmaker 	iir = port->serial_in(port, UART_IIR);
369bef3d41SPaul Gortmaker 	if (iir & UART_IIR_NO_INT) {
37*6e01f9a5SJohan Hovold 		spin_unlock_irqrestore(&up->port.lock, flags);
389bef3d41SPaul Gortmaker 		return 0;
399bef3d41SPaul Gortmaker 	}
409bef3d41SPaul Gortmaker 
419bef3d41SPaul Gortmaker 	/*
429bef3d41SPaul Gortmaker 	 * For a single break the hardware reports LSR.BI for each character
439bef3d41SPaul Gortmaker 	 * time. This is described in the MPC8313E chip errata as "General17".
449bef3d41SPaul Gortmaker 	 * A typical break has a duration of 0.3s, with a 115200n8 configuration
45*6e01f9a5SJohan Hovold 	 * that (theoretically) corresponds to ~3500 interrupts in these 0.3s.
469bef3d41SPaul Gortmaker 	 * In practise it's less (around 500) because of hardware
479bef3d41SPaul Gortmaker 	 * and software latencies. The workaround recommended by the vendor is
489bef3d41SPaul Gortmaker 	 * to read the RX register (to clear LSR.DR and thus prevent a FIFO
499bef3d41SPaul Gortmaker 	 * aging interrupt). To prevent the irq from retriggering LSR must not be
509bef3d41SPaul Gortmaker 	 * read. (This would clear LSR.BI, hardware would reassert the BI event
516d7f677aSDarwin Dingel 	 * immediately and interrupt the CPU again. The hardware clears LSR.BI
526d7f677aSDarwin Dingel 	 * when the next valid char is read.)
536d7f677aSDarwin Dingel 	 */
549bef3d41SPaul Gortmaker 	if (unlikely(up->lsr_saved_flags & UART_LSR_BI)) {
556d7f677aSDarwin Dingel 		up->lsr_saved_flags &= ~UART_LSR_BI;
566d7f677aSDarwin Dingel 		port->serial_in(port, UART_RX);
576d7f677aSDarwin Dingel 		spin_unlock_irqrestore(&up->port.lock, flags);
586d7f677aSDarwin Dingel 		return 1;
596d7f677aSDarwin Dingel 	}
606d7f677aSDarwin Dingel 
616d7f677aSDarwin Dingel 	lsr = orig_lsr = up->port.serial_in(&up->port, UART_LSR);
626d7f677aSDarwin Dingel 
636d7f677aSDarwin Dingel 	/* Process incoming characters first */
646d7f677aSDarwin Dingel 	if ((lsr & (UART_LSR_DR | UART_LSR_BI)) &&
656d7f677aSDarwin Dingel 	    (up->ier & (UART_IER_RLSI | UART_IER_RDI))) {
666d7f677aSDarwin Dingel 		lsr = serial8250_rx_chars(up, lsr);
676d7f677aSDarwin Dingel 	}
686d7f677aSDarwin Dingel 
696d7f677aSDarwin Dingel 	/* Stop processing interrupts on input overrun */
706d7f677aSDarwin Dingel 	if ((orig_lsr & UART_LSR_OE) && (up->overrun_backoff_time_ms > 0)) {
716d7f677aSDarwin Dingel 		unsigned long delay;
726d7f677aSDarwin Dingel 
736d7f677aSDarwin Dingel 		up->ier = port->serial_in(port, UART_IER);
749bef3d41SPaul Gortmaker 		if (up->ier & (UART_IER_RLSI | UART_IER_RDI)) {
759bef3d41SPaul Gortmaker 			port->ops->stop_rx(port);
769bef3d41SPaul Gortmaker 		} else {
77409cc454SAndrij Abyzov 			/* Keep restarting the timer until
789bef3d41SPaul Gortmaker 			 * the input overrun subsides.
799bef3d41SPaul Gortmaker 			 */
809d3aacebSUwe Kleine-König 			cancel_delayed_work(&up->overrun_backoff);
8175f4e830SJohan Hovold 		}
82853a9ae2SJohan Hovold 
8375f4e830SJohan Hovold 		delay = msecs_to_jiffies(up->overrun_backoff_time_ms);
849bef3d41SPaul Gortmaker 		schedule_delayed_work(&up->overrun_backoff, delay);
859bef3d41SPaul Gortmaker 	}
86bd63acf9SArnd Bergmann 
8711361610Skuldip dwivedi 	serial8250_modem_status(up);
8811361610Skuldip dwivedi 
8928f5cb37SGeert Uytterhoeven 	if ((lsr & UART_LSR_THRE) && (up->ier & UART_IER_THRI))
9028f5cb37SGeert Uytterhoeven 		serial8250_tx_chars(up);
9128f5cb37SGeert Uytterhoeven 
9228f5cb37SGeert Uytterhoeven 	up->lsr_saved_flags |= orig_lsr & UART_LSR_BI;
9311361610Skuldip dwivedi 
9411361610Skuldip dwivedi 	uart_unlock_and_check_sysrq_irqrestore(&up->port, flags);
9511361610Skuldip dwivedi 
9611361610Skuldip dwivedi 	return 1;
9711361610Skuldip dwivedi }
9811361610Skuldip dwivedi EXPORT_SYMBOL_GPL(fsl8250_handle_irq);
9911361610Skuldip dwivedi 
10011361610Skuldip dwivedi #ifdef CONFIG_ACPI
10111361610Skuldip dwivedi struct fsl8250_data {
10211361610Skuldip dwivedi 	int	line;
10311361610Skuldip dwivedi };
10411361610Skuldip dwivedi 
fsl8250_acpi_probe(struct platform_device * pdev)10511361610Skuldip dwivedi static int fsl8250_acpi_probe(struct platform_device *pdev)
10611361610Skuldip dwivedi {
10711361610Skuldip dwivedi 	struct fsl8250_data *data;
10811361610Skuldip dwivedi 	struct uart_8250_port port8250;
109b9edc682SWang Qing 	struct device *dev = &pdev->dev;
11011361610Skuldip dwivedi 	struct resource *regs;
11111361610Skuldip dwivedi 
11211361610Skuldip dwivedi 	int ret, irq;
11311361610Skuldip dwivedi 
11411361610Skuldip dwivedi 	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
11511361610Skuldip dwivedi 	if (!regs) {
11611361610Skuldip dwivedi 		dev_err(dev, "no registers defined\n");
11711361610Skuldip dwivedi 		return -EINVAL;
11811361610Skuldip dwivedi 	}
11911361610Skuldip dwivedi 
12011361610Skuldip dwivedi 	irq = platform_get_irq(pdev, 0);
12111361610Skuldip dwivedi 	if (irq < 0)
12211361610Skuldip dwivedi 		return irq;
12311361610Skuldip dwivedi 
12411361610Skuldip dwivedi 	memset(&port8250, 0, sizeof(port8250));
12511361610Skuldip dwivedi 
12611361610Skuldip dwivedi 	ret = device_property_read_u32(dev, "clock-frequency",
12711361610Skuldip dwivedi 					&port8250.port.uartclk);
12811361610Skuldip dwivedi 	if (ret)
12911361610Skuldip dwivedi 		return ret;
13011361610Skuldip dwivedi 
13111361610Skuldip dwivedi 	spin_lock_init(&port8250.port.lock);
13211361610Skuldip dwivedi 
13311361610Skuldip dwivedi 	port8250.port.mapbase           = regs->start;
13411361610Skuldip dwivedi 	port8250.port.irq               = irq;
13511361610Skuldip dwivedi 	port8250.port.handle_irq        = fsl8250_handle_irq;
13611361610Skuldip dwivedi 	port8250.port.type              = PORT_16550A;
13711361610Skuldip dwivedi 	port8250.port.flags             = UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF
13811361610Skuldip dwivedi 						| UPF_FIXED_PORT | UPF_IOREMAP
13911361610Skuldip dwivedi 						| UPF_FIXED_TYPE;
14011361610Skuldip dwivedi 	port8250.port.dev               = dev;
14111361610Skuldip dwivedi 	port8250.port.mapsize           = resource_size(regs);
14211361610Skuldip dwivedi 	port8250.port.iotype            = UPIO_MEM;
14311361610Skuldip dwivedi 	port8250.port.irqflags          = IRQF_SHARED;
14411361610Skuldip dwivedi 
14511361610Skuldip dwivedi 	port8250.port.membase = devm_ioremap(dev,  port8250.port.mapbase,
14611361610Skuldip dwivedi 							port8250.port.mapsize);
14711361610Skuldip dwivedi 	if (!port8250.port.membase)
14811361610Skuldip dwivedi 		return -ENOMEM;
14911361610Skuldip dwivedi 
15011361610Skuldip dwivedi 	data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
15111361610Skuldip dwivedi 	if (!data)
15211361610Skuldip dwivedi 		return -ENOMEM;
15311361610Skuldip dwivedi 
15411361610Skuldip dwivedi 	data->line = serial8250_register_8250_port(&port8250);
15511361610Skuldip dwivedi 	if (data->line < 0)
15611361610Skuldip dwivedi 		return data->line;
15711361610Skuldip dwivedi 
15811361610Skuldip dwivedi 	platform_set_drvdata(pdev, data);
15911361610Skuldip dwivedi 	return 0;
16011361610Skuldip dwivedi }
16111361610Skuldip dwivedi 
fsl8250_acpi_remove(struct platform_device * pdev)16211361610Skuldip dwivedi static int fsl8250_acpi_remove(struct platform_device *pdev)
16311361610Skuldip dwivedi {
16411361610Skuldip dwivedi 	struct fsl8250_data *data = platform_get_drvdata(pdev);
16511361610Skuldip dwivedi 
16611361610Skuldip dwivedi 	serial8250_unregister_port(data->line);
16711361610Skuldip dwivedi 	return 0;
16811361610Skuldip dwivedi }
16911361610Skuldip dwivedi 
17011361610Skuldip dwivedi static const struct acpi_device_id fsl_8250_acpi_id[] = {
17111361610Skuldip dwivedi 	{ "NXP0018", 0 },
17211361610Skuldip dwivedi 	{ },
17311361610Skuldip dwivedi };
17411361610Skuldip dwivedi MODULE_DEVICE_TABLE(acpi, fsl_8250_acpi_id);
175 
176 static struct platform_driver fsl8250_platform_driver = {
177 	.driver = {
178 		.name			= "fsl-16550-uart",
179 		.acpi_match_table	= ACPI_PTR(fsl_8250_acpi_id),
180 	},
181 	.probe			= fsl8250_acpi_probe,
182 	.remove			= fsl8250_acpi_remove,
183 };
184 
185 module_platform_driver(fsl8250_platform_driver);
186 #endif
187 
188 MODULE_LICENSE("GPL");
189 MODULE_DESCRIPTION("Handling of Freescale specific 8250 variants");
190