xref: /openbmc/linux/drivers/spi/spi-pxa2xx-pci.c (revision 4f2c0a4acffbec01079c28f839422e64ddeff004)
109c434b8SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
2ca632f55SGrant Likely /*
38083d6b8SAndy Shevchenko  * PCI glue driver for SPI PXA2xx compatible controllers.
48083d6b8SAndy Shevchenko  * CE4100's SPI device is more or less the same one as found on PXA.
5ca632f55SGrant Likely  *
68083d6b8SAndy Shevchenko  * Copyright (C) 2016, 2021 Intel Corporation
7ca632f55SGrant Likely  */
8e379d2cdSAndy Shevchenko #include <linux/clk-provider.h>
9e379d2cdSAndy Shevchenko #include <linux/module.h>
10ca632f55SGrant Likely #include <linux/pci.h>
11ca632f55SGrant Likely #include <linux/platform_device.h>
120e476871SAndy Shevchenko 
13ca632f55SGrant Likely #include <linux/spi/pxa2xx_spi.h>
14ca632f55SGrant Likely 
15b729bf34SMika Westerberg #include <linux/dmaengine.h>
16b729bf34SMika Westerberg #include <linux/platform_data/dma-dw.h>
17b729bf34SMika Westerberg 
187e425c3cSAndy Shevchenko #define PCI_DEVICE_ID_INTEL_QUARK_X1000		0x0935
197e425c3cSAndy Shevchenko #define PCI_DEVICE_ID_INTEL_BYT			0x0f0e
207e425c3cSAndy Shevchenko #define PCI_DEVICE_ID_INTEL_MRFLD		0x1194
217e425c3cSAndy Shevchenko #define PCI_DEVICE_ID_INTEL_BSW0		0x228e
227e425c3cSAndy Shevchenko #define PCI_DEVICE_ID_INTEL_BSW1		0x2290
237e425c3cSAndy Shevchenko #define PCI_DEVICE_ID_INTEL_BSW2		0x22ac
247e425c3cSAndy Shevchenko #define PCI_DEVICE_ID_INTEL_CE4100		0x2e6a
257e425c3cSAndy Shevchenko #define PCI_DEVICE_ID_INTEL_LPT0_0		0x9c65
267e425c3cSAndy Shevchenko #define PCI_DEVICE_ID_INTEL_LPT0_1		0x9c66
277e425c3cSAndy Shevchenko #define PCI_DEVICE_ID_INTEL_LPT1_0		0x9ce5
287e425c3cSAndy Shevchenko #define PCI_DEVICE_ID_INTEL_LPT1_1		0x9ce6
29d6ba32d5SChew, Chiau Ee 
30d6ba32d5SChew, Chiau Ee struct pxa_spi_info {
31ba8d1353SAndy Shevchenko 	int (*setup)(struct pci_dev *pdev, struct pxa2xx_spi_controller *c);
32d6ba32d5SChew, Chiau Ee };
33d6ba32d5SChew, Chiau Ee 
34b729bf34SMika Westerberg static struct dw_dma_slave byt_tx_param = { .dst_id = 0 };
35b729bf34SMika Westerberg static struct dw_dma_slave byt_rx_param = { .src_id = 1 };
36b729bf34SMika Westerberg 
3725014521SAndy Shevchenko static struct dw_dma_slave mrfld3_tx_param = { .dst_id = 15 };
3825014521SAndy Shevchenko static struct dw_dma_slave mrfld3_rx_param = { .src_id = 14 };
3925014521SAndy Shevchenko static struct dw_dma_slave mrfld5_tx_param = { .dst_id = 13 };
4025014521SAndy Shevchenko static struct dw_dma_slave mrfld5_rx_param = { .src_id = 12 };
4125014521SAndy Shevchenko static struct dw_dma_slave mrfld6_tx_param = { .dst_id = 11 };
4225014521SAndy Shevchenko static struct dw_dma_slave mrfld6_rx_param = { .src_id = 10 };
4325014521SAndy Shevchenko 
4439d36536SMika Westerberg static struct dw_dma_slave bsw0_tx_param = { .dst_id = 0 };
4539d36536SMika Westerberg static struct dw_dma_slave bsw0_rx_param = { .src_id = 1 };
4639d36536SMika Westerberg static struct dw_dma_slave bsw1_tx_param = { .dst_id = 6 };
4739d36536SMika Westerberg static struct dw_dma_slave bsw1_rx_param = { .src_id = 7 };
4839d36536SMika Westerberg static struct dw_dma_slave bsw2_tx_param = { .dst_id = 8 };
4939d36536SMika Westerberg static struct dw_dma_slave bsw2_rx_param = { .src_id = 9 };
5039d36536SMika Westerberg 
5154c5d3bfSAndy Shevchenko static struct dw_dma_slave lpt1_tx_param = { .dst_id = 0 };
5254c5d3bfSAndy Shevchenko static struct dw_dma_slave lpt1_rx_param = { .src_id = 1 };
5354c5d3bfSAndy Shevchenko static struct dw_dma_slave lpt0_tx_param = { .dst_id = 2 };
5454c5d3bfSAndy Shevchenko static struct dw_dma_slave lpt0_rx_param = { .src_id = 3 };
55caba248dSLeif Liddy 
pxa2xx_spi_pci_clk_unregister(void * clk)56c3f4fc09SAndy Shevchenko static void pxa2xx_spi_pci_clk_unregister(void *clk)
57c3f4fc09SAndy Shevchenko {
58c3f4fc09SAndy Shevchenko 	clk_unregister(clk);
59c3f4fc09SAndy Shevchenko }
60c3f4fc09SAndy Shevchenko 
pxa2xx_spi_pci_clk_register(struct pci_dev * dev,struct ssp_device * ssp,unsigned long rate)61c3f4fc09SAndy Shevchenko static int pxa2xx_spi_pci_clk_register(struct pci_dev *dev, struct ssp_device *ssp,
62c3f4fc09SAndy Shevchenko 				       unsigned long rate)
63c3f4fc09SAndy Shevchenko {
64c3f4fc09SAndy Shevchenko 	char buf[40];
65c3f4fc09SAndy Shevchenko 
66c3f4fc09SAndy Shevchenko 	snprintf(buf, sizeof(buf), "pxa2xx-spi.%d", ssp->port_id);
67c3f4fc09SAndy Shevchenko 	ssp->clk = clk_register_fixed_rate(&dev->dev, buf, NULL, 0, rate);
68c3f4fc09SAndy Shevchenko 	if (IS_ERR(ssp->clk))
69c3f4fc09SAndy Shevchenko 		return PTR_ERR(ssp->clk);
70c3f4fc09SAndy Shevchenko 
71c3f4fc09SAndy Shevchenko 	return devm_add_action_or_reset(&dev->dev, pxa2xx_spi_pci_clk_unregister, ssp->clk);
72c3f4fc09SAndy Shevchenko }
73c3f4fc09SAndy Shevchenko 
lpss_dma_filter(struct dma_chan * chan,void * param)74b729bf34SMika Westerberg static bool lpss_dma_filter(struct dma_chan *chan, void *param)
75b729bf34SMika Westerberg {
76b729bf34SMika Westerberg 	struct dw_dma_slave *dws = param;
77b729bf34SMika Westerberg 
78b729bf34SMika Westerberg 	if (dws->dma_dev != chan->device->dev)
79b729bf34SMika Westerberg 		return false;
80b729bf34SMika Westerberg 
81b729bf34SMika Westerberg 	chan->private = dws;
82b729bf34SMika Westerberg 	return true;
83b729bf34SMika Westerberg }
84b729bf34SMika Westerberg 
lpss_dma_put_device(void * dma_dev)85609d7ffdSAndy Shevchenko static void lpss_dma_put_device(void *dma_dev)
86609d7ffdSAndy Shevchenko {
87609d7ffdSAndy Shevchenko 	pci_dev_put(dma_dev);
88609d7ffdSAndy Shevchenko }
89609d7ffdSAndy Shevchenko 
lpss_spi_setup(struct pci_dev * dev,struct pxa2xx_spi_controller * c)90ba8d1353SAndy Shevchenko static int lpss_spi_setup(struct pci_dev *dev, struct pxa2xx_spi_controller *c)
91ca632f55SGrant Likely {
92ba8d1353SAndy Shevchenko 	struct ssp_device *ssp = &c->ssp;
93cb50f3f3SAndy Shevchenko 	struct dw_dma_slave *tx, *rx;
94b729bf34SMika Westerberg 	struct pci_dev *dma_dev;
95609d7ffdSAndy Shevchenko 	int ret;
96ca632f55SGrant Likely 
977e425c3cSAndy Shevchenko 	switch (dev->device) {
987e425c3cSAndy Shevchenko 	case PCI_DEVICE_ID_INTEL_BYT:
99ba8d1353SAndy Shevchenko 		ssp->type = LPSS_BYT_SSP;
100ba8d1353SAndy Shevchenko 		ssp->port_id = 0;
1017e425c3cSAndy Shevchenko 		c->tx_param = &byt_tx_param;
1027e425c3cSAndy Shevchenko 		c->rx_param = &byt_rx_param;
1037e425c3cSAndy Shevchenko 		break;
1047e425c3cSAndy Shevchenko 	case PCI_DEVICE_ID_INTEL_BSW0:
105ba8d1353SAndy Shevchenko 		ssp->type = LPSS_BSW_SSP;
106ba8d1353SAndy Shevchenko 		ssp->port_id = 0;
1077e425c3cSAndy Shevchenko 		c->tx_param = &bsw0_tx_param;
1087e425c3cSAndy Shevchenko 		c->rx_param = &bsw0_rx_param;
1097e425c3cSAndy Shevchenko 		break;
1107e425c3cSAndy Shevchenko 	case PCI_DEVICE_ID_INTEL_BSW1:
111ba8d1353SAndy Shevchenko 		ssp->type = LPSS_BSW_SSP;
112ba8d1353SAndy Shevchenko 		ssp->port_id = 1;
1137e425c3cSAndy Shevchenko 		c->tx_param = &bsw1_tx_param;
1147e425c3cSAndy Shevchenko 		c->rx_param = &bsw1_rx_param;
1157e425c3cSAndy Shevchenko 		break;
1167e425c3cSAndy Shevchenko 	case PCI_DEVICE_ID_INTEL_BSW2:
117ba8d1353SAndy Shevchenko 		ssp->type = LPSS_BSW_SSP;
118ba8d1353SAndy Shevchenko 		ssp->port_id = 2;
1197e425c3cSAndy Shevchenko 		c->tx_param = &bsw2_tx_param;
1207e425c3cSAndy Shevchenko 		c->rx_param = &bsw2_rx_param;
1217e425c3cSAndy Shevchenko 		break;
1227e425c3cSAndy Shevchenko 	case PCI_DEVICE_ID_INTEL_LPT0_0:
1237e425c3cSAndy Shevchenko 	case PCI_DEVICE_ID_INTEL_LPT1_0:
124ba8d1353SAndy Shevchenko 		ssp->type = LPSS_LPT_SSP;
125ba8d1353SAndy Shevchenko 		ssp->port_id = 0;
1267e425c3cSAndy Shevchenko 		c->tx_param = &lpt0_tx_param;
1277e425c3cSAndy Shevchenko 		c->rx_param = &lpt0_rx_param;
1287e425c3cSAndy Shevchenko 		break;
1297e425c3cSAndy Shevchenko 	case PCI_DEVICE_ID_INTEL_LPT0_1:
1307e425c3cSAndy Shevchenko 	case PCI_DEVICE_ID_INTEL_LPT1_1:
131ba8d1353SAndy Shevchenko 		ssp->type = LPSS_LPT_SSP;
132ba8d1353SAndy Shevchenko 		ssp->port_id = 1;
1337e425c3cSAndy Shevchenko 		c->tx_param = &lpt1_tx_param;
1347e425c3cSAndy Shevchenko 		c->rx_param = &lpt1_rx_param;
1357e425c3cSAndy Shevchenko 		break;
1367e425c3cSAndy Shevchenko 	default:
1377e425c3cSAndy Shevchenko 		return -ENODEV;
1387e425c3cSAndy Shevchenko 	}
1397e425c3cSAndy Shevchenko 
140743485eaSAndy Shevchenko 	c->num_chipselect = 1;
141ba8d1353SAndy Shevchenko 
142ba8d1353SAndy Shevchenko 	ret = pxa2xx_spi_pci_clk_register(dev, ssp, 50000000);
143ba8d1353SAndy Shevchenko 	if (ret)
144ba8d1353SAndy Shevchenko 		return ret;
145b729bf34SMika Westerberg 
146b729bf34SMika Westerberg 	dma_dev = pci_get_slot(dev->bus, PCI_DEVFN(PCI_SLOT(dev->devfn), 0));
147609d7ffdSAndy Shevchenko 	ret = devm_add_action_or_reset(&dev->dev, lpss_dma_put_device, dma_dev);
148609d7ffdSAndy Shevchenko 	if (ret)
149609d7ffdSAndy Shevchenko 		return ret;
150b729bf34SMika Westerberg 
151cb50f3f3SAndy Shevchenko 	tx = c->tx_param;
152cb50f3f3SAndy Shevchenko 	tx->dma_dev = &dma_dev->dev;
153cb50f3f3SAndy Shevchenko 	tx->m_master = 0;
154cb50f3f3SAndy Shevchenko 	tx->p_master = 1;
155b729bf34SMika Westerberg 
156cb50f3f3SAndy Shevchenko 	rx = c->rx_param;
157cb50f3f3SAndy Shevchenko 	rx->dma_dev = &dma_dev->dev;
158cb50f3f3SAndy Shevchenko 	rx->m_master = 0;
159cb50f3f3SAndy Shevchenko 	rx->p_master = 1;
160b729bf34SMika Westerberg 
161743485eaSAndy Shevchenko 	c->dma_filter = lpss_dma_filter;
162bd2e24deSAndy Shevchenko 	c->dma_burst_size = 1;
163ba8d1353SAndy Shevchenko 	c->enable_dma = 1;
164743485eaSAndy Shevchenko 	return 0;
165743485eaSAndy Shevchenko }
166743485eaSAndy Shevchenko 
167*fcaaf76eSAndy Shevchenko static const struct pxa_spi_info lpss_info_config = {
1687e425c3cSAndy Shevchenko 	.setup = lpss_spi_setup,
1697e425c3cSAndy Shevchenko };
1707e425c3cSAndy Shevchenko 
ce4100_spi_setup(struct pci_dev * dev,struct pxa2xx_spi_controller * c)171ba8d1353SAndy Shevchenko static int ce4100_spi_setup(struct pci_dev *dev, struct pxa2xx_spi_controller *c)
17278e27f97SAndy Shevchenko {
173ba8d1353SAndy Shevchenko 	struct ssp_device *ssp = &c->ssp;
17478e27f97SAndy Shevchenko 
175ba8d1353SAndy Shevchenko 	ssp->type = PXA25x_SSP;
176ba8d1353SAndy Shevchenko 	ssp->port_id = dev->devfn;
177ba8d1353SAndy Shevchenko 	c->num_chipselect = dev->devfn;
178ba8d1353SAndy Shevchenko 
179ba8d1353SAndy Shevchenko 	return pxa2xx_spi_pci_clk_register(dev, ssp, 3686400);
18078e27f97SAndy Shevchenko }
18178e27f97SAndy Shevchenko 
182*fcaaf76eSAndy Shevchenko static const struct pxa_spi_info ce4100_info_config = {
1837e425c3cSAndy Shevchenko 	.setup = ce4100_spi_setup,
1847e425c3cSAndy Shevchenko };
1857e425c3cSAndy Shevchenko 
mrfld_spi_setup(struct pci_dev * dev,struct pxa2xx_spi_controller * c)186ba8d1353SAndy Shevchenko static int mrfld_spi_setup(struct pci_dev *dev, struct pxa2xx_spi_controller *c)
1874f470910SAndy Shevchenko {
188ba8d1353SAndy Shevchenko 	struct ssp_device *ssp = &c->ssp;
18925014521SAndy Shevchenko 	struct dw_dma_slave *tx, *rx;
190609d7ffdSAndy Shevchenko 	struct pci_dev *dma_dev;
191609d7ffdSAndy Shevchenko 	int ret;
19225014521SAndy Shevchenko 
193ba8d1353SAndy Shevchenko 	ssp->type = MRFLD_SSP;
194ba8d1353SAndy Shevchenko 
1954f470910SAndy Shevchenko 	switch (PCI_FUNC(dev->devfn)) {
1964f470910SAndy Shevchenko 	case 0:
197ba8d1353SAndy Shevchenko 		ssp->port_id = 3;
1984f470910SAndy Shevchenko 		c->num_chipselect = 1;
19925014521SAndy Shevchenko 		c->tx_param = &mrfld3_tx_param;
20025014521SAndy Shevchenko 		c->rx_param = &mrfld3_rx_param;
2014f470910SAndy Shevchenko 		break;
2024f470910SAndy Shevchenko 	case 1:
203ba8d1353SAndy Shevchenko 		ssp->port_id = 5;
2044f470910SAndy Shevchenko 		c->num_chipselect = 4;
20525014521SAndy Shevchenko 		c->tx_param = &mrfld5_tx_param;
20625014521SAndy Shevchenko 		c->rx_param = &mrfld5_rx_param;
2074f470910SAndy Shevchenko 		break;
2084f470910SAndy Shevchenko 	case 2:
209ba8d1353SAndy Shevchenko 		ssp->port_id = 6;
2104f470910SAndy Shevchenko 		c->num_chipselect = 1;
21125014521SAndy Shevchenko 		c->tx_param = &mrfld6_tx_param;
21225014521SAndy Shevchenko 		c->rx_param = &mrfld6_rx_param;
2134f470910SAndy Shevchenko 		break;
2144f470910SAndy Shevchenko 	default:
2154f470910SAndy Shevchenko 		return -ENODEV;
2164f470910SAndy Shevchenko 	}
21725014521SAndy Shevchenko 
218ba8d1353SAndy Shevchenko 	ret = pxa2xx_spi_pci_clk_register(dev, ssp, 25000000);
219ba8d1353SAndy Shevchenko 	if (ret)
220ba8d1353SAndy Shevchenko 		return ret;
22103f8e04eSAndy Shevchenko 
222609d7ffdSAndy Shevchenko 	dma_dev = pci_get_slot(dev->bus, PCI_DEVFN(21, 0));
223609d7ffdSAndy Shevchenko 	ret = devm_add_action_or_reset(&dev->dev, lpss_dma_put_device, dma_dev);
224609d7ffdSAndy Shevchenko 	if (ret)
225609d7ffdSAndy Shevchenko 		return ret;
226609d7ffdSAndy Shevchenko 
22725014521SAndy Shevchenko 	tx = c->tx_param;
22825014521SAndy Shevchenko 	tx->dma_dev = &dma_dev->dev;
22925014521SAndy Shevchenko 
23025014521SAndy Shevchenko 	rx = c->rx_param;
23125014521SAndy Shevchenko 	rx->dma_dev = &dma_dev->dev;
23225014521SAndy Shevchenko 
23325014521SAndy Shevchenko 	c->dma_filter = lpss_dma_filter;
23437821a82SAndy Shevchenko 	c->dma_burst_size = 8;
235ba8d1353SAndy Shevchenko 	c->enable_dma = 1;
2364f470910SAndy Shevchenko 	return 0;
2374f470910SAndy Shevchenko }
2384f470910SAndy Shevchenko 
239*fcaaf76eSAndy Shevchenko static const struct pxa_spi_info mrfld_info_config = {
2407e425c3cSAndy Shevchenko 	.setup = mrfld_spi_setup,
2417e425c3cSAndy Shevchenko };
2427e425c3cSAndy Shevchenko 
qrk_spi_setup(struct pci_dev * dev,struct pxa2xx_spi_controller * c)243ba8d1353SAndy Shevchenko static int qrk_spi_setup(struct pci_dev *dev, struct pxa2xx_spi_controller *c)
24471ea0e3aSAndy Shevchenko {
245ba8d1353SAndy Shevchenko 	struct ssp_device *ssp = &c->ssp;
24671ea0e3aSAndy Shevchenko 
247ba8d1353SAndy Shevchenko 	ssp->type = QUARK_X1000_SSP;
248ba8d1353SAndy Shevchenko 	ssp->port_id = dev->devfn;
249ba8d1353SAndy Shevchenko 	c->num_chipselect = 1;
250ba8d1353SAndy Shevchenko 
251ba8d1353SAndy Shevchenko 	return pxa2xx_spi_pci_clk_register(dev, ssp, 50000000);
25271ea0e3aSAndy Shevchenko }
25371ea0e3aSAndy Shevchenko 
254*fcaaf76eSAndy Shevchenko static const struct pxa_spi_info qrk_info_config = {
25571ea0e3aSAndy Shevchenko 	.setup = qrk_spi_setup,
256743485eaSAndy Shevchenko };
257743485eaSAndy Shevchenko 
pxa2xx_spi_pci_probe(struct pci_dev * dev,const struct pci_device_id * ent)258743485eaSAndy Shevchenko static int pxa2xx_spi_pci_probe(struct pci_dev *dev,
259743485eaSAndy Shevchenko 		const struct pci_device_id *ent)
260743485eaSAndy Shevchenko {
261*fcaaf76eSAndy Shevchenko 	const struct pxa_spi_info *info;
262743485eaSAndy Shevchenko 	struct platform_device_info pi;
263743485eaSAndy Shevchenko 	int ret;
264743485eaSAndy Shevchenko 	struct platform_device *pdev;
26551eea52dSLubomir Rintel 	struct pxa2xx_spi_controller spi_pdata;
266743485eaSAndy Shevchenko 	struct ssp_device *ssp;
267743485eaSAndy Shevchenko 
268743485eaSAndy Shevchenko 	ret = pcim_enable_device(dev);
269743485eaSAndy Shevchenko 	if (ret)
270743485eaSAndy Shevchenko 		return ret;
271743485eaSAndy Shevchenko 
272743485eaSAndy Shevchenko 	ret = pcim_iomap_regions(dev, 1 << 0, "PXA2xx SPI");
273743485eaSAndy Shevchenko 	if (ret)
274743485eaSAndy Shevchenko 		return ret;
275743485eaSAndy Shevchenko 
276743485eaSAndy Shevchenko 	memset(&spi_pdata, 0, sizeof(spi_pdata));
277ca632f55SGrant Likely 
278851bacf5SMika Westerberg 	ssp = &spi_pdata.ssp;
279c3dce24cSAndy Shevchenko 	ssp->dev = &dev->dev;
280ca632f55SGrant Likely 	ssp->phys_base = pci_resource_start(dev, 0);
2810202775bSMika Westerberg 	ssp->mmio_base = pcim_iomap_table(dev)[0];
282ba8d1353SAndy Shevchenko 
283ba8d1353SAndy Shevchenko 	info = (struct pxa_spi_info *)ent->driver_data;
284ba8d1353SAndy Shevchenko 	ret = info->setup(dev, &spi_pdata);
285ba8d1353SAndy Shevchenko 	if (ret)
286ba8d1353SAndy Shevchenko 		return ret;
287ca632f55SGrant Likely 
28864e02cb0SJan Kiszka 	pci_set_master(dev);
28964e02cb0SJan Kiszka 
29064e02cb0SJan Kiszka 	ret = pci_alloc_irq_vectors(dev, 1, 1, PCI_IRQ_ALL_TYPES);
29164e02cb0SJan Kiszka 	if (ret < 0)
29264e02cb0SJan Kiszka 		return ret;
29364e02cb0SJan Kiszka 	ssp->irq = pci_irq_vector(dev, 0);
29464e02cb0SJan Kiszka 
2950202775bSMika Westerberg 	memset(&pi, 0, sizeof(pi));
296a586f944SAndy Shevchenko 	pi.fwnode = dev_fwnode(&dev->dev);
2970202775bSMika Westerberg 	pi.parent = &dev->dev;
2980202775bSMika Westerberg 	pi.name = "pxa2xx-spi";
2990202775bSMika Westerberg 	pi.id = ssp->port_id;
3000202775bSMika Westerberg 	pi.data = &spi_pdata;
3010202775bSMika Westerberg 	pi.size_data = sizeof(spi_pdata);
302ca632f55SGrant Likely 
3030202775bSMika Westerberg 	pdev = platform_device_register_full(&pi);
304c3f4fc09SAndy Shevchenko 	if (IS_ERR(pdev))
305d77b5382SWei Yongjun 		return PTR_ERR(pdev);
3060202775bSMika Westerberg 
307851bacf5SMika Westerberg 	pci_set_drvdata(dev, pdev);
3080202775bSMika Westerberg 
3090202775bSMika Westerberg 	return 0;
310ca632f55SGrant Likely }
311ca632f55SGrant Likely 
pxa2xx_spi_pci_remove(struct pci_dev * dev)312d6ba32d5SChew, Chiau Ee static void pxa2xx_spi_pci_remove(struct pci_dev *dev)
313ca632f55SGrant Likely {
314851bacf5SMika Westerberg 	struct platform_device *pdev = pci_get_drvdata(dev);
315ca632f55SGrant Likely 
316851bacf5SMika Westerberg 	platform_device_unregister(pdev);
317ca632f55SGrant Likely }
318ca632f55SGrant Likely 
319d6ba32d5SChew, Chiau Ee static const struct pci_device_id pxa2xx_spi_pci_devices[] = {
3207e425c3cSAndy Shevchenko 	{ PCI_DEVICE_DATA(INTEL, QUARK_X1000, &qrk_info_config) },
3217e425c3cSAndy Shevchenko 	{ PCI_DEVICE_DATA(INTEL, BYT, &lpss_info_config) },
3227e425c3cSAndy Shevchenko 	{ PCI_DEVICE_DATA(INTEL, MRFLD, &mrfld_info_config) },
3237e425c3cSAndy Shevchenko 	{ PCI_DEVICE_DATA(INTEL, BSW0, &lpss_info_config) },
3247e425c3cSAndy Shevchenko 	{ PCI_DEVICE_DATA(INTEL, BSW1, &lpss_info_config) },
3257e425c3cSAndy Shevchenko 	{ PCI_DEVICE_DATA(INTEL, BSW2, &lpss_info_config) },
3267e425c3cSAndy Shevchenko 	{ PCI_DEVICE_DATA(INTEL, CE4100, &ce4100_info_config) },
3277e425c3cSAndy Shevchenko 	{ PCI_DEVICE_DATA(INTEL, LPT0_0, &lpss_info_config) },
3287e425c3cSAndy Shevchenko 	{ PCI_DEVICE_DATA(INTEL, LPT0_1, &lpss_info_config) },
3297e425c3cSAndy Shevchenko 	{ PCI_DEVICE_DATA(INTEL, LPT1_0, &lpss_info_config) },
3307e425c3cSAndy Shevchenko 	{ PCI_DEVICE_DATA(INTEL, LPT1_1, &lpss_info_config) },
33154c5d3bfSAndy Shevchenko 	{ }
332ca632f55SGrant Likely };
333d6ba32d5SChew, Chiau Ee MODULE_DEVICE_TABLE(pci, pxa2xx_spi_pci_devices);
334ca632f55SGrant Likely 
335d6ba32d5SChew, Chiau Ee static struct pci_driver pxa2xx_spi_pci_driver = {
336d6ba32d5SChew, Chiau Ee 	.name           = "pxa2xx_spi_pci",
337d6ba32d5SChew, Chiau Ee 	.id_table       = pxa2xx_spi_pci_devices,
338d6ba32d5SChew, Chiau Ee 	.probe          = pxa2xx_spi_pci_probe,
339d6ba32d5SChew, Chiau Ee 	.remove         = pxa2xx_spi_pci_remove,
340ca632f55SGrant Likely };
341ca632f55SGrant Likely 
342d6ba32d5SChew, Chiau Ee module_pci_driver(pxa2xx_spi_pci_driver);
343ca632f55SGrant Likely 
344d6ba32d5SChew, Chiau Ee MODULE_DESCRIPTION("CE4100/LPSS PCI-SPI glue code for PXA's driver");
345ca632f55SGrant Likely MODULE_LICENSE("GPL v2");
346ca632f55SGrant Likely MODULE_AUTHOR("Sebastian Andrzej Siewior <bigeasy@linutronix.de>");
347