1*2874c5fdSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-or-later */
2ca632f55SGrant Likely /*
3ca632f55SGrant Likely * Freescale SPI/eSPI controller driver library.
4ca632f55SGrant Likely *
5ca632f55SGrant Likely * Maintainer: Kumar Gala
6ca632f55SGrant Likely *
7ca632f55SGrant Likely * Copyright 2010 Freescale Semiconductor, Inc.
8ca632f55SGrant Likely * Copyright (C) 2006 Polycom, Inc.
9ca632f55SGrant Likely *
10ca632f55SGrant Likely * CPM SPI and QE buffer descriptors mode support:
11ca632f55SGrant Likely * Copyright (c) 2009 MontaVista Software, Inc.
12ca632f55SGrant Likely * Author: Anton Vorontsov <avorontsov@ru.mvista.com>
13ca632f55SGrant Likely */
14ca632f55SGrant Likely #ifndef __SPI_FSL_LIB_H__
15ca632f55SGrant Likely #define __SPI_FSL_LIB_H__
16ca632f55SGrant Likely
17ca632f55SGrant Likely #include <asm/io.h>
18ca632f55SGrant Likely
19ca632f55SGrant Likely /* SPI/eSPI Controller driver's private data. */
20ca632f55SGrant Likely struct mpc8xxx_spi {
21ca632f55SGrant Likely struct device *dev;
2246afd38bSHeiner Kallweit void __iomem *reg_base;
23ca632f55SGrant Likely
24ca632f55SGrant Likely /* rx & tx bufs from the spi_transfer */
25ca632f55SGrant Likely const void *tx;
26ca632f55SGrant Likely void *rx;
27ca632f55SGrant Likely
28ca632f55SGrant Likely int subblock;
29ca632f55SGrant Likely struct spi_pram __iomem *pram;
30e8beacbbSAndreas Larsson #ifdef CONFIG_FSL_SOC
31ca632f55SGrant Likely struct cpm_buf_desc __iomem *tx_bd;
32ca632f55SGrant Likely struct cpm_buf_desc __iomem *rx_bd;
33e8beacbbSAndreas Larsson #endif
34ca632f55SGrant Likely
35ca632f55SGrant Likely struct spi_transfer *xfer_in_progress;
36ca632f55SGrant Likely
37ca632f55SGrant Likely /* dma addresses for CPM transfers */
38ca632f55SGrant Likely dma_addr_t tx_dma;
39ca632f55SGrant Likely dma_addr_t rx_dma;
40ca632f55SGrant Likely bool map_tx_dma;
41ca632f55SGrant Likely bool map_rx_dma;
42ca632f55SGrant Likely
43ca632f55SGrant Likely dma_addr_t dma_dummy_tx;
44ca632f55SGrant Likely dma_addr_t dma_dummy_rx;
45ca632f55SGrant Likely
46ca632f55SGrant Likely /* functions to deal with different sized buffers */
47ca632f55SGrant Likely void (*get_rx) (u32 rx_data, struct mpc8xxx_spi *);
48ca632f55SGrant Likely u32(*get_tx) (struct mpc8xxx_spi *);
49ca632f55SGrant Likely
50ca632f55SGrant Likely unsigned int count;
51ca632f55SGrant Likely unsigned int irq;
52ca632f55SGrant Likely
53ca632f55SGrant Likely unsigned nsecs; /* (clock cycle time)/2 */
54ca632f55SGrant Likely
55ca632f55SGrant Likely u32 spibrg; /* SPIBRG input clock */
56ca632f55SGrant Likely u32 rx_shift; /* RX data reg shift when in qe mode */
57ca632f55SGrant Likely u32 tx_shift; /* TX data reg shift when in qe mode */
58ca632f55SGrant Likely
59ca632f55SGrant Likely unsigned int flags;
60ca632f55SGrant Likely
6138455d7aSEsben Haabendal #if IS_ENABLED(CONFIG_SPI_FSL_SPI)
62c3f3e771SAndreas Larsson int type;
6376a7498fSAndreas Larsson int native_chipselects;
648922a366SAndreas Larsson u8 max_bits_per_word;
65c3f3e771SAndreas Larsson
66b48c4e3cSAndreas Larsson void (*set_shifts)(u32 *rx_shift, u32 *tx_shift,
67b48c4e3cSAndreas Larsson int bits_per_word, int msb_first);
68b48c4e3cSAndreas Larsson #endif
69b48c4e3cSAndreas Larsson
70ca632f55SGrant Likely struct completion done;
71ca632f55SGrant Likely };
72ca632f55SGrant Likely
73ca632f55SGrant Likely struct spi_mpc8xxx_cs {
74ca632f55SGrant Likely /* functions to deal with different sized buffers */
75ca632f55SGrant Likely void (*get_rx) (u32 rx_data, struct mpc8xxx_spi *);
76ca632f55SGrant Likely u32 (*get_tx) (struct mpc8xxx_spi *);
77ca632f55SGrant Likely u32 rx_shift; /* RX data reg shift when in qe mode */
78ca632f55SGrant Likely u32 tx_shift; /* TX data reg shift when in qe mode */
79ca632f55SGrant Likely u32 hw_mode; /* Holds HW mode register settings */
80ca632f55SGrant Likely };
81ca632f55SGrant Likely
mpc8xxx_spi_write_reg(__be32 __iomem * reg,u32 val)82ca632f55SGrant Likely static inline void mpc8xxx_spi_write_reg(__be32 __iomem *reg, u32 val)
83ca632f55SGrant Likely {
84e8beacbbSAndreas Larsson iowrite32be(val, reg);
85ca632f55SGrant Likely }
86ca632f55SGrant Likely
mpc8xxx_spi_read_reg(__be32 __iomem * reg)87ca632f55SGrant Likely static inline u32 mpc8xxx_spi_read_reg(__be32 __iomem *reg)
88ca632f55SGrant Likely {
89e8beacbbSAndreas Larsson return ioread32be(reg);
90ca632f55SGrant Likely }
91ca632f55SGrant Likely
92ca632f55SGrant Likely struct mpc8xxx_spi_probe_info {
93ca632f55SGrant Likely struct fsl_spi_platform_data pdata;
9469b921acSRasmus Villemoes __be32 __iomem *immr_spi_cs;
95ca632f55SGrant Likely };
96ca632f55SGrant Likely
97ca632f55SGrant Likely extern u32 mpc8xxx_spi_tx_buf_u8(struct mpc8xxx_spi *mpc8xxx_spi);
98ca632f55SGrant Likely extern u32 mpc8xxx_spi_tx_buf_u16(struct mpc8xxx_spi *mpc8xxx_spi);
99ca632f55SGrant Likely extern u32 mpc8xxx_spi_tx_buf_u32(struct mpc8xxx_spi *mpc8xxx_spi);
100ca632f55SGrant Likely extern void mpc8xxx_spi_rx_buf_u8(u32 data, struct mpc8xxx_spi *mpc8xxx_spi);
101ca632f55SGrant Likely extern void mpc8xxx_spi_rx_buf_u16(u32 data, struct mpc8xxx_spi *mpc8xxx_spi);
102ca632f55SGrant Likely extern void mpc8xxx_spi_rx_buf_u32(u32 data, struct mpc8xxx_spi *mpc8xxx_spi);
103ca632f55SGrant Likely
104ca632f55SGrant Likely extern struct mpc8xxx_spi_probe_info *to_of_pinfo(
105ca632f55SGrant Likely struct fsl_spi_platform_data *pdata);
106ca632f55SGrant Likely extern const char *mpc8xxx_spi_strmode(unsigned int flags);
107c592becbSHeiner Kallweit extern void mpc8xxx_spi_probe(struct device *dev, struct resource *mem,
108ca632f55SGrant Likely unsigned int irq);
109ca632f55SGrant Likely extern int of_mpc8xxx_spi_probe(struct platform_device *ofdev);
110ca632f55SGrant Likely
111ca632f55SGrant Likely #endif /* __SPI_FSL_LIB_H__ */
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