xref: /openbmc/linux/drivers/spi/spi-clps711x.c (revision 8dda9d9a48baa4a4e0ff6ac9d8f1672f3bf6dfa5)
1161b96c3SAlexander Shiyan /*
2161b96c3SAlexander Shiyan  *  CLPS711X SPI bus driver
3161b96c3SAlexander Shiyan  *
498984796SAlexander Shiyan  *  Copyright (C) 2012-2014 Alexander Shiyan <shc_work@mail.ru>
5161b96c3SAlexander Shiyan  *
6161b96c3SAlexander Shiyan  * This program is free software; you can redistribute it and/or modify
7161b96c3SAlexander Shiyan  * it under the terms of the GNU General Public License as published by
8161b96c3SAlexander Shiyan  * the Free Software Foundation; either version 2 of the License, or
9161b96c3SAlexander Shiyan  * (at your option) any later version.
10161b96c3SAlexander Shiyan  */
11161b96c3SAlexander Shiyan 
12161b96c3SAlexander Shiyan #include <linux/io.h>
13161b96c3SAlexander Shiyan #include <linux/clk.h>
14161b96c3SAlexander Shiyan #include <linux/init.h>
15161b96c3SAlexander Shiyan #include <linux/gpio.h>
16161b96c3SAlexander Shiyan #include <linux/delay.h>
17161b96c3SAlexander Shiyan #include <linux/module.h>
18161b96c3SAlexander Shiyan #include <linux/interrupt.h>
19161b96c3SAlexander Shiyan #include <linux/platform_device.h>
20161b96c3SAlexander Shiyan #include <linux/spi/spi.h>
21161b96c3SAlexander Shiyan #include <linux/platform_data/spi-clps711x.h>
22161b96c3SAlexander Shiyan 
23161b96c3SAlexander Shiyan #include <mach/hardware.h>
24161b96c3SAlexander Shiyan 
25161b96c3SAlexander Shiyan #define DRIVER_NAME	"spi-clps711x"
26161b96c3SAlexander Shiyan 
27161b96c3SAlexander Shiyan struct spi_clps711x_data {
28161b96c3SAlexander Shiyan 	struct completion	done;
29161b96c3SAlexander Shiyan 
30161b96c3SAlexander Shiyan 	struct clk		*spi_clk;
31161b96c3SAlexander Shiyan 	u32			max_speed_hz;
32161b96c3SAlexander Shiyan 
33161b96c3SAlexander Shiyan 	u8			*tx_buf;
34161b96c3SAlexander Shiyan 	u8			*rx_buf;
35*8dda9d9aSAlexander Shiyan 	unsigned int		bpw;
36161b96c3SAlexander Shiyan 	int			len;
37161b96c3SAlexander Shiyan 
38161b96c3SAlexander Shiyan 	int			chipselect[0];
39161b96c3SAlexander Shiyan };
40161b96c3SAlexander Shiyan 
41161b96c3SAlexander Shiyan static int spi_clps711x_setup(struct spi_device *spi)
42161b96c3SAlexander Shiyan {
43161b96c3SAlexander Shiyan 	struct spi_clps711x_data *hw = spi_master_get_devdata(spi->master);
44161b96c3SAlexander Shiyan 
45161b96c3SAlexander Shiyan 	/* We are expect that SPI-device is not selected */
46161b96c3SAlexander Shiyan 	gpio_direction_output(hw->chipselect[spi->chip_select],
47161b96c3SAlexander Shiyan 			      !(spi->mode & SPI_CS_HIGH));
48161b96c3SAlexander Shiyan 
49161b96c3SAlexander Shiyan 	return 0;
50161b96c3SAlexander Shiyan }
51161b96c3SAlexander Shiyan 
52161b96c3SAlexander Shiyan static void spi_clps711x_setup_mode(struct spi_device *spi)
53161b96c3SAlexander Shiyan {
54161b96c3SAlexander Shiyan 	/* Setup edge for transfer */
55161b96c3SAlexander Shiyan 	if (spi->mode & SPI_CPHA)
56161b96c3SAlexander Shiyan 		clps_writew(clps_readw(SYSCON3) | SYSCON3_ADCCKNSEN, SYSCON3);
57161b96c3SAlexander Shiyan 	else
58161b96c3SAlexander Shiyan 		clps_writew(clps_readw(SYSCON3) & ~SYSCON3_ADCCKNSEN, SYSCON3);
59161b96c3SAlexander Shiyan }
60161b96c3SAlexander Shiyan 
61*8dda9d9aSAlexander Shiyan static void spi_clps711x_setup_xfer(struct spi_device *spi,
62161b96c3SAlexander Shiyan 				    struct spi_transfer *xfer)
63161b96c3SAlexander Shiyan {
64161b96c3SAlexander Shiyan 	u32 speed = xfer->speed_hz ? : spi->max_speed_hz;
65161b96c3SAlexander Shiyan 	struct spi_clps711x_data *hw = spi_master_get_devdata(spi->master);
66161b96c3SAlexander Shiyan 
67161b96c3SAlexander Shiyan 	/* Setup SPI frequency divider */
68161b96c3SAlexander Shiyan 	if (!speed || (speed >= hw->max_speed_hz))
69161b96c3SAlexander Shiyan 		clps_writel((clps_readl(SYSCON1) & ~SYSCON1_ADCKSEL_MASK) |
70161b96c3SAlexander Shiyan 			    SYSCON1_ADCKSEL(3), SYSCON1);
71161b96c3SAlexander Shiyan 	else if (speed >= (hw->max_speed_hz / 2))
72161b96c3SAlexander Shiyan 		clps_writel((clps_readl(SYSCON1) & ~SYSCON1_ADCKSEL_MASK) |
73161b96c3SAlexander Shiyan 			    SYSCON1_ADCKSEL(2), SYSCON1);
74161b96c3SAlexander Shiyan 	else if (speed >= (hw->max_speed_hz / 8))
75161b96c3SAlexander Shiyan 		clps_writel((clps_readl(SYSCON1) & ~SYSCON1_ADCKSEL_MASK) |
76161b96c3SAlexander Shiyan 			    SYSCON1_ADCKSEL(1), SYSCON1);
77161b96c3SAlexander Shiyan 	else
78161b96c3SAlexander Shiyan 		clps_writel((clps_readl(SYSCON1) & ~SYSCON1_ADCKSEL_MASK) |
79161b96c3SAlexander Shiyan 			    SYSCON1_ADCKSEL(0), SYSCON1);
80161b96c3SAlexander Shiyan }
81161b96c3SAlexander Shiyan 
82161b96c3SAlexander Shiyan static int spi_clps711x_transfer_one_message(struct spi_master *master,
83161b96c3SAlexander Shiyan 					     struct spi_message *msg)
84161b96c3SAlexander Shiyan {
85161b96c3SAlexander Shiyan 	struct spi_clps711x_data *hw = spi_master_get_devdata(master);
86*8dda9d9aSAlexander Shiyan 	struct spi_device *spi = msg->spi;
87161b96c3SAlexander Shiyan 	struct spi_transfer *xfer;
88*8dda9d9aSAlexander Shiyan 	int cs = hw->chipselect[spi->chip_select];
89161b96c3SAlexander Shiyan 
90*8dda9d9aSAlexander Shiyan 	spi_clps711x_setup_mode(spi);
91161b96c3SAlexander Shiyan 
92161b96c3SAlexander Shiyan 	list_for_each_entry(xfer, &msg->transfers, transfer_list) {
93c7a26f12SAlexander Shiyan 		u8 data;
94c7a26f12SAlexander Shiyan 
95*8dda9d9aSAlexander Shiyan 		spi_clps711x_setup_xfer(spi, xfer);
96161b96c3SAlexander Shiyan 
97*8dda9d9aSAlexander Shiyan 		gpio_set_value(cs, !!(spi->mode & SPI_CS_HIGH));
98161b96c3SAlexander Shiyan 
9916735d02SWolfram Sang 		reinit_completion(&hw->done);
100161b96c3SAlexander Shiyan 
101161b96c3SAlexander Shiyan 		hw->len = xfer->len;
102*8dda9d9aSAlexander Shiyan 		hw->bpw = xfer->bits_per_word ? : spi->bits_per_word;
103161b96c3SAlexander Shiyan 		hw->tx_buf = (u8 *)xfer->tx_buf;
104161b96c3SAlexander Shiyan 		hw->rx_buf = (u8 *)xfer->rx_buf;
105161b96c3SAlexander Shiyan 
106161b96c3SAlexander Shiyan 		/* Initiate transfer */
107c7a26f12SAlexander Shiyan 		data = hw->tx_buf ? *hw->tx_buf++ : 0;
108*8dda9d9aSAlexander Shiyan 		clps_writel(data | SYNCIO_FRMLEN(hw->bpw) | SYNCIO_TXFRMEN,
109*8dda9d9aSAlexander Shiyan 			    SYNCIO);
110161b96c3SAlexander Shiyan 
111161b96c3SAlexander Shiyan 		wait_for_completion(&hw->done);
112161b96c3SAlexander Shiyan 
113161b96c3SAlexander Shiyan 		if (xfer->delay_usecs)
114161b96c3SAlexander Shiyan 			udelay(xfer->delay_usecs);
115161b96c3SAlexander Shiyan 
116161b96c3SAlexander Shiyan 		if (xfer->cs_change ||
117161b96c3SAlexander Shiyan 		    list_is_last(&xfer->transfer_list, &msg->transfers))
118*8dda9d9aSAlexander Shiyan 			gpio_set_value(cs, !(spi->mode & SPI_CS_HIGH));
119161b96c3SAlexander Shiyan 
120161b96c3SAlexander Shiyan 		msg->actual_length += xfer->len;
121161b96c3SAlexander Shiyan 	}
122161b96c3SAlexander Shiyan 
123*8dda9d9aSAlexander Shiyan 	msg->status = 0;
124161b96c3SAlexander Shiyan 	spi_finalize_current_message(master);
125161b96c3SAlexander Shiyan 
126161b96c3SAlexander Shiyan 	return 0;
127161b96c3SAlexander Shiyan }
128161b96c3SAlexander Shiyan 
129161b96c3SAlexander Shiyan static irqreturn_t spi_clps711x_isr(int irq, void *dev_id)
130161b96c3SAlexander Shiyan {
131161b96c3SAlexander Shiyan 	struct spi_clps711x_data *hw = (struct spi_clps711x_data *)dev_id;
132c7a26f12SAlexander Shiyan 	u8 data;
133161b96c3SAlexander Shiyan 
134161b96c3SAlexander Shiyan 	/* Handle RX */
135161b96c3SAlexander Shiyan 	data = clps_readb(SYNCIO);
136161b96c3SAlexander Shiyan 	if (hw->rx_buf)
137c7a26f12SAlexander Shiyan 		*hw->rx_buf++ = data;
138161b96c3SAlexander Shiyan 
139161b96c3SAlexander Shiyan 	/* Handle TX */
140c7a26f12SAlexander Shiyan 	if (--hw->len > 0) {
141c7a26f12SAlexander Shiyan 		data = hw->tx_buf ? *hw->tx_buf++ : 0;
142*8dda9d9aSAlexander Shiyan 		clps_writel(data | SYNCIO_FRMLEN(hw->bpw) | SYNCIO_TXFRMEN,
143*8dda9d9aSAlexander Shiyan 			    SYNCIO);
144161b96c3SAlexander Shiyan 	} else
145161b96c3SAlexander Shiyan 		complete(&hw->done);
146161b96c3SAlexander Shiyan 
147161b96c3SAlexander Shiyan 	return IRQ_HANDLED;
148161b96c3SAlexander Shiyan }
149161b96c3SAlexander Shiyan 
150fd4a319bSGrant Likely static int spi_clps711x_probe(struct platform_device *pdev)
151161b96c3SAlexander Shiyan {
152161b96c3SAlexander Shiyan 	int i, ret;
153161b96c3SAlexander Shiyan 	struct spi_master *master;
154161b96c3SAlexander Shiyan 	struct spi_clps711x_data *hw;
155161b96c3SAlexander Shiyan 	struct spi_clps711x_pdata *pdata = dev_get_platdata(&pdev->dev);
156161b96c3SAlexander Shiyan 
157161b96c3SAlexander Shiyan 	if (!pdata) {
158161b96c3SAlexander Shiyan 		dev_err(&pdev->dev, "No platform data supplied\n");
159161b96c3SAlexander Shiyan 		return -EINVAL;
160161b96c3SAlexander Shiyan 	}
161161b96c3SAlexander Shiyan 
162161b96c3SAlexander Shiyan 	if (pdata->num_chipselect < 1) {
163161b96c3SAlexander Shiyan 		dev_err(&pdev->dev, "At least one CS must be defined\n");
164161b96c3SAlexander Shiyan 		return -EINVAL;
165161b96c3SAlexander Shiyan 	}
166161b96c3SAlexander Shiyan 
167161b96c3SAlexander Shiyan 	master = spi_alloc_master(&pdev->dev,
168161b96c3SAlexander Shiyan 				  sizeof(struct spi_clps711x_data) +
169161b96c3SAlexander Shiyan 				  sizeof(int) * pdata->num_chipselect);
170161b96c3SAlexander Shiyan 	if (!master) {
171161b96c3SAlexander Shiyan 		dev_err(&pdev->dev, "SPI allocating memory error\n");
172161b96c3SAlexander Shiyan 		return -ENOMEM;
173161b96c3SAlexander Shiyan 	}
174161b96c3SAlexander Shiyan 
175161b96c3SAlexander Shiyan 	master->bus_num = pdev->id;
176161b96c3SAlexander Shiyan 	master->mode_bits = SPI_CPHA | SPI_CS_HIGH;
177*8dda9d9aSAlexander Shiyan 	master->bits_per_word_mask =  SPI_BPW_RANGE_MASK(1, 8);
178161b96c3SAlexander Shiyan 	master->num_chipselect = pdata->num_chipselect;
179161b96c3SAlexander Shiyan 	master->setup = spi_clps711x_setup;
180161b96c3SAlexander Shiyan 	master->transfer_one_message = spi_clps711x_transfer_one_message;
181161b96c3SAlexander Shiyan 
182161b96c3SAlexander Shiyan 	hw = spi_master_get_devdata(master);
183161b96c3SAlexander Shiyan 
184161b96c3SAlexander Shiyan 	for (i = 0; i < master->num_chipselect; i++) {
185161b96c3SAlexander Shiyan 		hw->chipselect[i] = pdata->chipselect[i];
186161b96c3SAlexander Shiyan 		if (!gpio_is_valid(hw->chipselect[i])) {
187161b96c3SAlexander Shiyan 			dev_err(&pdev->dev, "Invalid CS GPIO %i\n", i);
188161b96c3SAlexander Shiyan 			ret = -EINVAL;
189161b96c3SAlexander Shiyan 			goto err_out;
190161b96c3SAlexander Shiyan 		}
19198984796SAlexander Shiyan 		if (devm_gpio_request(&pdev->dev, hw->chipselect[i], NULL)) {
192161b96c3SAlexander Shiyan 			dev_err(&pdev->dev, "Can't get CS GPIO %i\n", i);
193161b96c3SAlexander Shiyan 			ret = -EINVAL;
194161b96c3SAlexander Shiyan 			goto err_out;
195161b96c3SAlexander Shiyan 		}
196161b96c3SAlexander Shiyan 	}
197161b96c3SAlexander Shiyan 
198161b96c3SAlexander Shiyan 	hw->spi_clk = devm_clk_get(&pdev->dev, "spi");
199161b96c3SAlexander Shiyan 	if (IS_ERR(hw->spi_clk)) {
200161b96c3SAlexander Shiyan 		dev_err(&pdev->dev, "Can't get clocks\n");
201161b96c3SAlexander Shiyan 		ret = PTR_ERR(hw->spi_clk);
202161b96c3SAlexander Shiyan 		goto err_out;
203161b96c3SAlexander Shiyan 	}
204161b96c3SAlexander Shiyan 	hw->max_speed_hz = clk_get_rate(hw->spi_clk);
205161b96c3SAlexander Shiyan 
206161b96c3SAlexander Shiyan 	init_completion(&hw->done);
207161b96c3SAlexander Shiyan 	platform_set_drvdata(pdev, master);
208161b96c3SAlexander Shiyan 
209161b96c3SAlexander Shiyan 	/* Disable extended mode due hardware problems */
210161b96c3SAlexander Shiyan 	clps_writew(clps_readw(SYSCON3) & ~SYSCON3_ADCCON, SYSCON3);
211161b96c3SAlexander Shiyan 
212161b96c3SAlexander Shiyan 	/* Clear possible pending interrupt */
213161b96c3SAlexander Shiyan 	clps_readl(SYNCIO);
214161b96c3SAlexander Shiyan 
215161b96c3SAlexander Shiyan 	ret = devm_request_irq(&pdev->dev, IRQ_SSEOTI, spi_clps711x_isr, 0,
216161b96c3SAlexander Shiyan 			       dev_name(&pdev->dev), hw);
217161b96c3SAlexander Shiyan 	if (ret) {
218161b96c3SAlexander Shiyan 		dev_err(&pdev->dev, "Can't request IRQ\n");
219c7083790SSachin Kamat 		goto err_out;
220161b96c3SAlexander Shiyan 	}
221161b96c3SAlexander Shiyan 
222c493fc4bSJingoo Han 	ret = devm_spi_register_master(&pdev->dev, master);
223161b96c3SAlexander Shiyan 	if (!ret) {
224161b96c3SAlexander Shiyan 		dev_info(&pdev->dev,
225161b96c3SAlexander Shiyan 			 "SPI bus driver initialized. Master clock %u Hz\n",
226161b96c3SAlexander Shiyan 			 hw->max_speed_hz);
227161b96c3SAlexander Shiyan 		return 0;
228161b96c3SAlexander Shiyan 	}
229161b96c3SAlexander Shiyan 
230161b96c3SAlexander Shiyan 	dev_err(&pdev->dev, "Failed to register master\n");
231161b96c3SAlexander Shiyan 
232161b96c3SAlexander Shiyan err_out:
233161b96c3SAlexander Shiyan 	spi_master_put(master);
234161b96c3SAlexander Shiyan 
235161b96c3SAlexander Shiyan 	return ret;
236161b96c3SAlexander Shiyan }
237161b96c3SAlexander Shiyan 
238161b96c3SAlexander Shiyan static struct platform_driver clps711x_spi_driver = {
239161b96c3SAlexander Shiyan 	.driver	= {
240161b96c3SAlexander Shiyan 		.name	= DRIVER_NAME,
241161b96c3SAlexander Shiyan 		.owner	= THIS_MODULE,
242161b96c3SAlexander Shiyan 	},
243161b96c3SAlexander Shiyan 	.probe	= spi_clps711x_probe,
244161b96c3SAlexander Shiyan };
245161b96c3SAlexander Shiyan module_platform_driver(clps711x_spi_driver);
246161b96c3SAlexander Shiyan 
247161b96c3SAlexander Shiyan MODULE_LICENSE("GPL");
248161b96c3SAlexander Shiyan MODULE_AUTHOR("Alexander Shiyan <shc_work@mail.ru>");
249161b96c3SAlexander Shiyan MODULE_DESCRIPTION("CLPS711X SPI bus driver");
250350a9b33SAxel Lin MODULE_ALIAS("platform:" DRIVER_NAME);
251