1*63d49afeSJan Glauber /* 2*63d49afeSJan Glauber * This file is subject to the terms and conditions of the GNU General Public 3*63d49afeSJan Glauber * License. See the file "COPYING" in the main directory of this archive 4*63d49afeSJan Glauber * for more details. 5*63d49afeSJan Glauber * 6*63d49afeSJan Glauber * Copyright (C) 2011, 2012 Cavium, Inc. 7*63d49afeSJan Glauber */ 8*63d49afeSJan Glauber 9*63d49afeSJan Glauber #include <linux/platform_device.h> 10*63d49afeSJan Glauber #include <linux/spi/spi.h> 11*63d49afeSJan Glauber #include <linux/module.h> 12*63d49afeSJan Glauber #include <linux/io.h> 13*63d49afeSJan Glauber #include <linux/of.h> 14*63d49afeSJan Glauber 15*63d49afeSJan Glauber #include <asm/octeon/octeon.h> 16*63d49afeSJan Glauber 17*63d49afeSJan Glauber #include "spi-cavium.h" 18*63d49afeSJan Glauber 19*63d49afeSJan Glauber static int octeon_spi_probe(struct platform_device *pdev) 20*63d49afeSJan Glauber { 21*63d49afeSJan Glauber struct resource *res_mem; 22*63d49afeSJan Glauber void __iomem *reg_base; 23*63d49afeSJan Glauber struct spi_master *master; 24*63d49afeSJan Glauber struct octeon_spi *p; 25*63d49afeSJan Glauber int err = -ENOENT; 26*63d49afeSJan Glauber 27*63d49afeSJan Glauber master = spi_alloc_master(&pdev->dev, sizeof(struct octeon_spi)); 28*63d49afeSJan Glauber if (!master) 29*63d49afeSJan Glauber return -ENOMEM; 30*63d49afeSJan Glauber p = spi_master_get_devdata(master); 31*63d49afeSJan Glauber platform_set_drvdata(pdev, master); 32*63d49afeSJan Glauber 33*63d49afeSJan Glauber res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 34*63d49afeSJan Glauber reg_base = devm_ioremap_resource(&pdev->dev, res_mem); 35*63d49afeSJan Glauber if (IS_ERR(reg_base)) { 36*63d49afeSJan Glauber err = PTR_ERR(reg_base); 37*63d49afeSJan Glauber goto fail; 38*63d49afeSJan Glauber } 39*63d49afeSJan Glauber 40*63d49afeSJan Glauber p->register_base = reg_base; 41*63d49afeSJan Glauber p->sys_freq = octeon_get_io_clock_rate(); 42*63d49afeSJan Glauber 43*63d49afeSJan Glauber p->regs.config = 0; 44*63d49afeSJan Glauber p->regs.status = 0x08; 45*63d49afeSJan Glauber p->regs.tx = 0x10; 46*63d49afeSJan Glauber p->regs.data = 0x80; 47*63d49afeSJan Glauber 48*63d49afeSJan Glauber master->num_chipselect = 4; 49*63d49afeSJan Glauber master->mode_bits = SPI_CPHA | 50*63d49afeSJan Glauber SPI_CPOL | 51*63d49afeSJan Glauber SPI_CS_HIGH | 52*63d49afeSJan Glauber SPI_LSB_FIRST | 53*63d49afeSJan Glauber SPI_3WIRE; 54*63d49afeSJan Glauber 55*63d49afeSJan Glauber master->transfer_one_message = octeon_spi_transfer_one_message; 56*63d49afeSJan Glauber master->bits_per_word_mask = SPI_BPW_MASK(8); 57*63d49afeSJan Glauber master->max_speed_hz = OCTEON_SPI_MAX_CLOCK_HZ; 58*63d49afeSJan Glauber 59*63d49afeSJan Glauber master->dev.of_node = pdev->dev.of_node; 60*63d49afeSJan Glauber err = devm_spi_register_master(&pdev->dev, master); 61*63d49afeSJan Glauber if (err) { 62*63d49afeSJan Glauber dev_err(&pdev->dev, "register master failed: %d\n", err); 63*63d49afeSJan Glauber goto fail; 64*63d49afeSJan Glauber } 65*63d49afeSJan Glauber 66*63d49afeSJan Glauber dev_info(&pdev->dev, "OCTEON SPI bus driver\n"); 67*63d49afeSJan Glauber 68*63d49afeSJan Glauber return 0; 69*63d49afeSJan Glauber fail: 70*63d49afeSJan Glauber spi_master_put(master); 71*63d49afeSJan Glauber return err; 72*63d49afeSJan Glauber } 73*63d49afeSJan Glauber 74*63d49afeSJan Glauber static int octeon_spi_remove(struct platform_device *pdev) 75*63d49afeSJan Glauber { 76*63d49afeSJan Glauber struct spi_master *master = platform_get_drvdata(pdev); 77*63d49afeSJan Glauber struct octeon_spi *p = spi_master_get_devdata(master); 78*63d49afeSJan Glauber 79*63d49afeSJan Glauber /* Clear the CSENA* and put everything in a known state. */ 80*63d49afeSJan Glauber writeq(0, p->register_base + OCTEON_SPI_CFG(p)); 81*63d49afeSJan Glauber 82*63d49afeSJan Glauber return 0; 83*63d49afeSJan Glauber } 84*63d49afeSJan Glauber 85*63d49afeSJan Glauber static const struct of_device_id octeon_spi_match[] = { 86*63d49afeSJan Glauber { .compatible = "cavium,octeon-3010-spi", }, 87*63d49afeSJan Glauber {}, 88*63d49afeSJan Glauber }; 89*63d49afeSJan Glauber MODULE_DEVICE_TABLE(of, octeon_spi_match); 90*63d49afeSJan Glauber 91*63d49afeSJan Glauber static struct platform_driver octeon_spi_driver = { 92*63d49afeSJan Glauber .driver = { 93*63d49afeSJan Glauber .name = "spi-octeon", 94*63d49afeSJan Glauber .of_match_table = octeon_spi_match, 95*63d49afeSJan Glauber }, 96*63d49afeSJan Glauber .probe = octeon_spi_probe, 97*63d49afeSJan Glauber .remove = octeon_spi_remove, 98*63d49afeSJan Glauber }; 99*63d49afeSJan Glauber 100*63d49afeSJan Glauber module_platform_driver(octeon_spi_driver); 101*63d49afeSJan Glauber 102*63d49afeSJan Glauber MODULE_DESCRIPTION("Cavium, Inc. OCTEON SPI bus driver"); 103*63d49afeSJan Glauber MODULE_AUTHOR("David Daney"); 104*63d49afeSJan Glauber MODULE_LICENSE("GPL"); 105