xref: /openbmc/linux/drivers/soc/mediatek/mtk-infracfg.c (revision 11b490c6aea9666047d51127a665221102277edb)
11802d0beSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
216a624a9SSascha Hauer /*
316a624a9SSascha Hauer  * Copyright (c) 2015 Pengutronix, Sascha Hauer <kernel@pengutronix.de>
416a624a9SSascha Hauer  */
516a624a9SSascha Hauer 
616a624a9SSascha Hauer #include <linux/export.h>
716a624a9SSascha Hauer #include <linux/jiffies.h>
816a624a9SSascha Hauer #include <linux/regmap.h>
916a624a9SSascha Hauer #include <linux/soc/mediatek/infracfg.h>
1016a624a9SSascha Hauer #include <asm/processor.h>
1116a624a9SSascha Hauer 
12090c6243SSean Wang #define MTK_POLL_DELAY_US   10
13090c6243SSean Wang #define MTK_POLL_TIMEOUT    (jiffies_to_usecs(HZ))
14090c6243SSean Wang 
1516a624a9SSascha Hauer #define INFRA_TOPAXI_PROTECTEN		0x0220
1616a624a9SSascha Hauer #define INFRA_TOPAXI_PROTECTSTA1	0x0228
17fa7e843aSweiyi.lu@mediatek.com #define INFRA_TOPAXI_PROTECTEN_SET	0x0260
18fa7e843aSweiyi.lu@mediatek.com #define INFRA_TOPAXI_PROTECTEN_CLR	0x0264
1916a624a9SSascha Hauer 
2016a624a9SSascha Hauer /**
2116a624a9SSascha Hauer  * mtk_infracfg_set_bus_protection - enable bus protection
22*11b490c6SKrzysztof Kozlowski  * @infracfg: The infracfg regmap
2316a624a9SSascha Hauer  * @mask: The mask containing the protection bits to be enabled.
24fa7e843aSweiyi.lu@mediatek.com  * @reg_update: The boolean flag determines to set the protection bits
25fa7e843aSweiyi.lu@mediatek.com  *              by regmap_update_bits with enable register(PROTECTEN) or
26fa7e843aSweiyi.lu@mediatek.com  *              by regmap_write with set register(PROTECTEN_SET).
2716a624a9SSascha Hauer  *
2816a624a9SSascha Hauer  * This function enables the bus protection bits for disabled power
2916a624a9SSascha Hauer  * domains so that the system does not hang when some unit accesses the
3016a624a9SSascha Hauer  * bus while in power down.
3116a624a9SSascha Hauer  */
32fa7e843aSweiyi.lu@mediatek.com int mtk_infracfg_set_bus_protection(struct regmap *infracfg, u32 mask,
33fa7e843aSweiyi.lu@mediatek.com 		bool reg_update)
3416a624a9SSascha Hauer {
3516a624a9SSascha Hauer 	u32 val;
3616a624a9SSascha Hauer 	int ret;
3716a624a9SSascha Hauer 
38fa7e843aSweiyi.lu@mediatek.com 	if (reg_update)
39fa7e843aSweiyi.lu@mediatek.com 		regmap_update_bits(infracfg, INFRA_TOPAXI_PROTECTEN, mask,
40fa7e843aSweiyi.lu@mediatek.com 				mask);
41fa7e843aSweiyi.lu@mediatek.com 	else
42fa7e843aSweiyi.lu@mediatek.com 		regmap_write(infracfg, INFRA_TOPAXI_PROTECTEN_SET, mask);
4316a624a9SSascha Hauer 
44090c6243SSean Wang 	ret = regmap_read_poll_timeout(infracfg, INFRA_TOPAXI_PROTECTSTA1,
45090c6243SSean Wang 				       val, (val & mask) == mask,
46090c6243SSean Wang 				       MTK_POLL_DELAY_US, MTK_POLL_TIMEOUT);
4716a624a9SSascha Hauer 
4816a624a9SSascha Hauer 	return ret;
4916a624a9SSascha Hauer }
5016a624a9SSascha Hauer 
5116a624a9SSascha Hauer /**
5216a624a9SSascha Hauer  * mtk_infracfg_clear_bus_protection - disable bus protection
53*11b490c6SKrzysztof Kozlowski  * @infracfg: The infracfg regmap
5416a624a9SSascha Hauer  * @mask: The mask containing the protection bits to be disabled.
55fa7e843aSweiyi.lu@mediatek.com  * @reg_update: The boolean flag determines to clear the protection bits
56fa7e843aSweiyi.lu@mediatek.com  *              by regmap_update_bits with enable register(PROTECTEN) or
57fa7e843aSweiyi.lu@mediatek.com  *              by regmap_write with clear register(PROTECTEN_CLR).
5816a624a9SSascha Hauer  *
5916a624a9SSascha Hauer  * This function disables the bus protection bits previously enabled with
6016a624a9SSascha Hauer  * mtk_infracfg_set_bus_protection.
6116a624a9SSascha Hauer  */
62fa7e843aSweiyi.lu@mediatek.com 
63fa7e843aSweiyi.lu@mediatek.com int mtk_infracfg_clear_bus_protection(struct regmap *infracfg, u32 mask,
64fa7e843aSweiyi.lu@mediatek.com 		bool reg_update)
6516a624a9SSascha Hauer {
6616a624a9SSascha Hauer 	int ret;
67090c6243SSean Wang 	u32 val;
6816a624a9SSascha Hauer 
69fa7e843aSweiyi.lu@mediatek.com 	if (reg_update)
7016a624a9SSascha Hauer 		regmap_update_bits(infracfg, INFRA_TOPAXI_PROTECTEN, mask, 0);
71fa7e843aSweiyi.lu@mediatek.com 	else
72fa7e843aSweiyi.lu@mediatek.com 		regmap_write(infracfg, INFRA_TOPAXI_PROTECTEN_CLR, mask);
7316a624a9SSascha Hauer 
74090c6243SSean Wang 	ret = regmap_read_poll_timeout(infracfg, INFRA_TOPAXI_PROTECTSTA1,
75090c6243SSean Wang 				       val, !(val & mask),
76090c6243SSean Wang 				       MTK_POLL_DELAY_US, MTK_POLL_TIMEOUT);
7716a624a9SSascha Hauer 
7816a624a9SSascha Hauer 	return ret;
7916a624a9SSascha Hauer }
80