1b804923bSjason-jh.lin /* SPDX-License-Identifier: GPL-2.0-only */ 2b804923bSjason-jh.lin 3b804923bSjason-jh.lin #ifndef __SOC_MEDIATEK_MT8195_MMSYS_H 4b804923bSjason-jh.lin #define __SOC_MEDIATEK_MT8195_MMSYS_H 5b804923bSjason-jh.lin 6b804923bSjason-jh.lin #define MT8195_VDO0_OVL_MOUT_EN 0xf14 7b804923bSjason-jh.lin #define MT8195_MOUT_DISP_OVL0_TO_DISP_RDMA0 BIT(0) 8b804923bSjason-jh.lin #define MT8195_MOUT_DISP_OVL0_TO_DISP_WDMA0 BIT(1) 9b804923bSjason-jh.lin #define MT8195_MOUT_DISP_OVL0_TO_DISP_OVL1 BIT(2) 10b804923bSjason-jh.lin #define MT8195_MOUT_DISP_OVL1_TO_DISP_RDMA1 BIT(4) 11b804923bSjason-jh.lin #define MT8195_MOUT_DISP_OVL1_TO_DISP_WDMA1 BIT(5) 12b804923bSjason-jh.lin #define MT8195_MOUT_DISP_OVL1_TO_DISP_OVL0 BIT(6) 13b804923bSjason-jh.lin 14b804923bSjason-jh.lin #define MT8195_VDO0_SEL_IN 0xf34 15b804923bSjason-jh.lin #define MT8195_SEL_IN_VPP_MERGE_FROM_MASK GENMASK(1, 0) 16b804923bSjason-jh.lin #define MT8195_SEL_IN_VPP_MERGE_FROM_DSC_WRAP0_OUT (0 << 0) 17b804923bSjason-jh.lin #define MT8195_SEL_IN_VPP_MERGE_FROM_DISP_DITHER1 (1 << 0) 18b804923bSjason-jh.lin #define MT8195_SEL_IN_VPP_MERGE_FROM_VDO1_VIRTUAL0 (2 << 0) 19b804923bSjason-jh.lin #define MT8195_SEL_IN_DSC_WRAP0_IN_FROM_MASK GENMASK(4, 4) 20b804923bSjason-jh.lin #define MT8195_SEL_IN_DSC_WRAP0_IN_FROM_DISP_DITHER0 (0 << 4) 21b804923bSjason-jh.lin #define MT8195_SEL_IN_DSC_WRAP0_IN_FROM_VPP_MERGE (1 << 4) 22b804923bSjason-jh.lin #define MT8195_SEL_IN_DSC_WRAP1_IN_FROM_MASK GENMASK(5, 5) 23b804923bSjason-jh.lin #define MT8195_SEL_IN_DSC_WRAP1_IN_FROM_DISP_DITHER1 (0 << 5) 24b804923bSjason-jh.lin #define MT8195_SEL_IN_DSC_WRAP1_IN_FROM_VPP_MERGE (1 << 5) 25b804923bSjason-jh.lin #define MT8195_SEL_IN_SINA_VIRTUAL0_FROM_MASK GENMASK(8, 8) 26b804923bSjason-jh.lin #define MT8195_SEL_IN_SINA_VIRTUAL0_FROM_VPP_MERGE (0 << 8) 27b804923bSjason-jh.lin #define MT8195_SEL_IN_SINA_VIRTUAL0_FROM_DSC_WRAP1_OUT (1 << 8) 28b804923bSjason-jh.lin #define MT8195_SEL_IN_SINB_VIRTUAL0_FROM_MASK GENMASK(9, 9) 29b804923bSjason-jh.lin #define MT8195_SEL_IN_SINB_VIRTUAL0_FROM_DSC_WRAP0_OUT (0 << 9) 30b804923bSjason-jh.lin #define MT8195_SEL_IN_DP_INTF0_FROM_MASK GENMASK(13, 12) 31b804923bSjason-jh.lin #define MT8195_SEL_IN_DP_INTF0_FROM_DSC_WRAP1_OUT (0 << 0) 32b804923bSjason-jh.lin #define MT8195_SEL_IN_DP_INTF0_FROM_VPP_MERGE (1 << 12) 33b804923bSjason-jh.lin #define MT8195_SEL_IN_DP_INTF0_FROM_VDO1_VIRTUAL0 (2 << 12) 34b804923bSjason-jh.lin #define MT8195_SEL_IN_DSI0_FROM_MASK GENMASK(16, 16) 35b804923bSjason-jh.lin #define MT8195_SEL_IN_DSI0_FROM_DSC_WRAP0_OUT (0 << 16) 36b804923bSjason-jh.lin #define MT8195_SEL_IN_DSI0_FROM_DISP_DITHER0 (1 << 16) 37b804923bSjason-jh.lin #define MT8195_SEL_IN_DSI1_FROM_MASK GENMASK(17, 17) 38b804923bSjason-jh.lin #define MT8195_SEL_IN_DSI1_FROM_DSC_WRAP1_OUT (0 << 17) 39b804923bSjason-jh.lin #define MT8195_SEL_IN_DSI1_FROM_VPP_MERGE (1 << 17) 40b804923bSjason-jh.lin #define MT8195_SEL_IN_DISP_WDMA1_FROM_MASK GENMASK(20, 20) 41b804923bSjason-jh.lin #define MT8195_SEL_IN_DISP_WDMA1_FROM_DISP_OVL1 (0 << 20) 42b804923bSjason-jh.lin #define MT8195_SEL_IN_DISP_WDMA1_FROM_VPP_MERGE (1 << 20) 43b804923bSjason-jh.lin #define MT8195_SEL_IN_DSC_WRAP1_FROM_MASK GENMASK(21, 21) 44b804923bSjason-jh.lin #define MT8195_SEL_IN_DSC_WRAP1_OUT_FROM_DSC_WRAP1_IN (0 << 21) 45b804923bSjason-jh.lin #define MT8195_SEL_IN_DSC_WRAP1_OUT_FROM_DISP_DITHER1 (1 << 21) 46b804923bSjason-jh.lin #define MT8195_SEL_IN_DISP_WDMA0_FROM_MASK GENMASK(22, 22) 47b804923bSjason-jh.lin #define MT8195_SEL_IN_DISP_WDMA0_FROM_DISP_OVL0 (0 << 22) 48b804923bSjason-jh.lin 49b804923bSjason-jh.lin #define MT8195_VDO0_SEL_OUT 0xf38 50b804923bSjason-jh.lin #define MT8195_SOUT_DISP_DITHER0_TO_MASK BIT(0) 51b804923bSjason-jh.lin #define MT8195_SOUT_DISP_DITHER0_TO_DSC_WRAP0_IN (0 << 0) 52b804923bSjason-jh.lin #define MT8195_SOUT_DISP_DITHER0_TO_DSI0 (1 << 0) 53b804923bSjason-jh.lin #define MT8195_SOUT_DISP_DITHER1_TO_MASK GENMASK(2, 1) 54b804923bSjason-jh.lin #define MT8195_SOUT_DISP_DITHER1_TO_DSC_WRAP1_IN (0 << 1) 55b804923bSjason-jh.lin #define MT8195_SOUT_DISP_DITHER1_TO_VPP_MERGE (1 << 1) 56b804923bSjason-jh.lin #define MT8195_SOUT_DISP_DITHER1_TO_DSC_WRAP1_OUT (2 << 1) 57b804923bSjason-jh.lin #define MT8195_SOUT_VDO1_VIRTUAL0_TO_MASK GENMASK(4, 4) 58b804923bSjason-jh.lin #define MT8195_SOUT_VDO1_VIRTUAL0_TO_VPP_MERGE (0 << 4) 59b804923bSjason-jh.lin #define MT8195_SOUT_VDO1_VIRTUAL0_TO_DP_INTF0 (1 << 4) 60b804923bSjason-jh.lin #define MT8195_SOUT_VPP_MERGE_TO_MASK GENMASK(10, 8) 61b804923bSjason-jh.lin #define MT8195_SOUT_VPP_MERGE_TO_DSI1 (0 << 8) 62b804923bSjason-jh.lin #define MT8195_SOUT_VPP_MERGE_TO_DP_INTF0 (1 << 8) 63b804923bSjason-jh.lin #define MT8195_SOUT_VPP_MERGE_TO_SINA_VIRTUAL0 (2 << 8) 64b804923bSjason-jh.lin #define MT8195_SOUT_VPP_MERGE_TO_DISP_WDMA1 (3 << 8) 65b804923bSjason-jh.lin #define MT8195_SOUT_VPP_MERGE_TO_DSC_WRAP0_IN (4 << 8) 66b804923bSjason-jh.lin #define MT8195_SOUT_VPP_MERGE_TO_DSC_WRAP1_IN_MASK GENMASK(11, 11) 67b804923bSjason-jh.lin #define MT8195_SOUT_VPP_MERGE_TO_DSC_WRAP1_IN (0 << 11) 68b804923bSjason-jh.lin #define MT8195_SOUT_DSC_WRAP0_OUT_TO_MASK GENMASK(13, 12) 69b804923bSjason-jh.lin #define MT8195_SOUT_DSC_WRAP0_OUT_TO_DSI0 (0 << 12) 70b804923bSjason-jh.lin #define MT8195_SOUT_DSC_WRAP0_OUT_TO_SINB_VIRTUAL0 (1 << 12) 71b804923bSjason-jh.lin #define MT8195_SOUT_DSC_WRAP0_OUT_TO_VPP_MERGE (2 << 12) 72b804923bSjason-jh.lin #define MT8195_SOUT_DSC_WRAP1_OUT_TO_MASK GENMASK(17, 16) 73b804923bSjason-jh.lin #define MT8195_SOUT_DSC_WRAP1_OUT_TO_DSI1 (0 << 16) 74b804923bSjason-jh.lin #define MT8195_SOUT_DSC_WRAP1_OUT_TO_DP_INTF0 (1 << 16) 75b804923bSjason-jh.lin #define MT8195_SOUT_DSC_WRAP1_OUT_TO_SINA_VIRTUAL0 (2 << 16) 76b804923bSjason-jh.lin #define MT8195_SOUT_DSC_WRAP1_OUT_TO_VPP_MERGE (3 << 16) 77b804923bSjason-jh.lin 78b804923bSjason-jh.lin static const struct mtk_mmsys_routes mmsys_mt8195_routing_table[] = { 79b804923bSjason-jh.lin { 80b804923bSjason-jh.lin DDP_COMPONENT_OVL0, DDP_COMPONENT_RDMA0, 81b804923bSjason-jh.lin MT8195_VDO0_OVL_MOUT_EN, MT8195_MOUT_DISP_OVL0_TO_DISP_RDMA0, 82b804923bSjason-jh.lin MT8195_MOUT_DISP_OVL0_TO_DISP_RDMA0 83b804923bSjason-jh.lin }, { 84b804923bSjason-jh.lin DDP_COMPONENT_OVL0, DDP_COMPONENT_WDMA0, 85b804923bSjason-jh.lin MT8195_VDO0_OVL_MOUT_EN, MT8195_MOUT_DISP_OVL0_TO_DISP_WDMA0, 86b804923bSjason-jh.lin MT8195_MOUT_DISP_OVL0_TO_DISP_WDMA0 87b804923bSjason-jh.lin }, { 88b804923bSjason-jh.lin DDP_COMPONENT_OVL0, DDP_COMPONENT_OVL1, 89b804923bSjason-jh.lin MT8195_VDO0_OVL_MOUT_EN, MT8195_MOUT_DISP_OVL0_TO_DISP_OVL1, 90b804923bSjason-jh.lin MT8195_MOUT_DISP_OVL0_TO_DISP_OVL1 91b804923bSjason-jh.lin }, { 92b804923bSjason-jh.lin DDP_COMPONENT_OVL1, DDP_COMPONENT_RDMA1, 93b804923bSjason-jh.lin MT8195_VDO0_OVL_MOUT_EN, MT8195_MOUT_DISP_OVL1_TO_DISP_RDMA1, 94b804923bSjason-jh.lin MT8195_MOUT_DISP_OVL1_TO_DISP_RDMA1 95b804923bSjason-jh.lin }, { 96b804923bSjason-jh.lin DDP_COMPONENT_OVL1, DDP_COMPONENT_WDMA1, 97b804923bSjason-jh.lin MT8195_VDO0_OVL_MOUT_EN, MT8195_MOUT_DISP_OVL1_TO_DISP_WDMA1, 98b804923bSjason-jh.lin MT8195_MOUT_DISP_OVL1_TO_DISP_WDMA1 99b804923bSjason-jh.lin }, { 100b804923bSjason-jh.lin DDP_COMPONENT_OVL1, DDP_COMPONENT_OVL0, 101b804923bSjason-jh.lin MT8195_VDO0_OVL_MOUT_EN, MT8195_MOUT_DISP_OVL1_TO_DISP_OVL0, 102b804923bSjason-jh.lin MT8195_MOUT_DISP_OVL1_TO_DISP_OVL0 103b804923bSjason-jh.lin }, { 104b804923bSjason-jh.lin DDP_COMPONENT_DSC0, DDP_COMPONENT_MERGE0, 105b804923bSjason-jh.lin MT8195_VDO0_SEL_IN, MT8195_SEL_IN_VPP_MERGE_FROM_MASK, 106b804923bSjason-jh.lin MT8195_SEL_IN_VPP_MERGE_FROM_DSC_WRAP0_OUT 107b804923bSjason-jh.lin }, { 108b804923bSjason-jh.lin DDP_COMPONENT_DITHER1, DDP_COMPONENT_MERGE0, 109b804923bSjason-jh.lin MT8195_VDO0_SEL_IN, MT8195_SEL_IN_VPP_MERGE_FROM_MASK, 110b804923bSjason-jh.lin MT8195_SEL_IN_VPP_MERGE_FROM_DISP_DITHER1 111b804923bSjason-jh.lin }, { 112b804923bSjason-jh.lin DDP_COMPONENT_MERGE5, DDP_COMPONENT_MERGE0, 113b804923bSjason-jh.lin MT8195_VDO0_SEL_IN, MT8195_SEL_IN_VPP_MERGE_FROM_MASK, 114b804923bSjason-jh.lin MT8195_SEL_IN_VPP_MERGE_FROM_VDO1_VIRTUAL0 115b804923bSjason-jh.lin }, { 116*4e8988c6Sjason-jh.lin DDP_COMPONENT_DITHER0, DDP_COMPONENT_DSC0, 117b804923bSjason-jh.lin MT8195_VDO0_SEL_IN, MT8195_SEL_IN_DSC_WRAP0_IN_FROM_MASK, 118b804923bSjason-jh.lin MT8195_SEL_IN_DSC_WRAP0_IN_FROM_DISP_DITHER0 119b804923bSjason-jh.lin }, { 120b804923bSjason-jh.lin DDP_COMPONENT_MERGE0, DDP_COMPONENT_DSC0, 121b804923bSjason-jh.lin MT8195_VDO0_SEL_IN, MT8195_SEL_IN_DSC_WRAP0_IN_FROM_MASK, 122b804923bSjason-jh.lin MT8195_SEL_IN_DSC_WRAP0_IN_FROM_VPP_MERGE 123b804923bSjason-jh.lin }, { 124b804923bSjason-jh.lin DDP_COMPONENT_DITHER1, DDP_COMPONENT_DSC1, 125b804923bSjason-jh.lin MT8195_VDO0_SEL_IN, MT8195_SEL_IN_DSC_WRAP1_IN_FROM_MASK, 126b804923bSjason-jh.lin MT8195_SEL_IN_DSC_WRAP1_IN_FROM_DISP_DITHER1 127b804923bSjason-jh.lin }, { 128b804923bSjason-jh.lin DDP_COMPONENT_MERGE0, DDP_COMPONENT_DSC1, 129b804923bSjason-jh.lin MT8195_VDO0_SEL_IN, MT8195_SEL_IN_DSC_WRAP1_IN_FROM_MASK, 130b804923bSjason-jh.lin MT8195_SEL_IN_DSC_WRAP1_IN_FROM_VPP_MERGE 131b804923bSjason-jh.lin }, { 132b804923bSjason-jh.lin DDP_COMPONENT_MERGE0, DDP_COMPONENT_DP_INTF1, 133b804923bSjason-jh.lin MT8195_VDO0_SEL_IN, MT8195_SEL_IN_SINA_VIRTUAL0_FROM_MASK, 134b804923bSjason-jh.lin MT8195_SEL_IN_SINA_VIRTUAL0_FROM_VPP_MERGE 135b804923bSjason-jh.lin }, { 136b804923bSjason-jh.lin DDP_COMPONENT_MERGE0, DDP_COMPONENT_DPI0, 137b804923bSjason-jh.lin MT8195_VDO0_SEL_IN, MT8195_SEL_IN_SINA_VIRTUAL0_FROM_MASK, 138b804923bSjason-jh.lin MT8195_SEL_IN_SINA_VIRTUAL0_FROM_VPP_MERGE 139b804923bSjason-jh.lin }, { 140b804923bSjason-jh.lin DDP_COMPONENT_MERGE0, DDP_COMPONENT_DPI1, 141b804923bSjason-jh.lin MT8195_VDO0_SEL_IN, MT8195_SEL_IN_SINA_VIRTUAL0_FROM_MASK, 142b804923bSjason-jh.lin MT8195_SEL_IN_SINA_VIRTUAL0_FROM_VPP_MERGE 143b804923bSjason-jh.lin }, { 144b804923bSjason-jh.lin DDP_COMPONENT_DSC1, DDP_COMPONENT_DP_INTF1, 145b804923bSjason-jh.lin MT8195_VDO0_SEL_IN, MT8195_SEL_IN_SINA_VIRTUAL0_FROM_MASK, 146b804923bSjason-jh.lin MT8195_SEL_IN_SINA_VIRTUAL0_FROM_DSC_WRAP1_OUT 147b804923bSjason-jh.lin }, { 148b804923bSjason-jh.lin DDP_COMPONENT_DSC1, DDP_COMPONENT_DPI0, 149b804923bSjason-jh.lin MT8195_VDO0_SEL_IN, MT8195_SEL_IN_SINA_VIRTUAL0_FROM_MASK, 150b804923bSjason-jh.lin MT8195_SEL_IN_SINA_VIRTUAL0_FROM_DSC_WRAP1_OUT 151b804923bSjason-jh.lin }, { 152b804923bSjason-jh.lin DDP_COMPONENT_DSC1, DDP_COMPONENT_DPI1, 153b804923bSjason-jh.lin MT8195_VDO0_SEL_IN, MT8195_SEL_IN_SINA_VIRTUAL0_FROM_MASK, 154b804923bSjason-jh.lin MT8195_SEL_IN_SINA_VIRTUAL0_FROM_DSC_WRAP1_OUT 155b804923bSjason-jh.lin }, { 156b804923bSjason-jh.lin DDP_COMPONENT_DSC0, DDP_COMPONENT_DP_INTF1, 157b804923bSjason-jh.lin MT8195_VDO0_SEL_IN, MT8195_SEL_IN_SINB_VIRTUAL0_FROM_MASK, 158b804923bSjason-jh.lin MT8195_SEL_IN_SINB_VIRTUAL0_FROM_DSC_WRAP0_OUT 159b804923bSjason-jh.lin }, { 160b804923bSjason-jh.lin DDP_COMPONENT_DSC0, DDP_COMPONENT_DPI0, 161b804923bSjason-jh.lin MT8195_VDO0_SEL_IN, MT8195_SEL_IN_SINB_VIRTUAL0_FROM_MASK, 162b804923bSjason-jh.lin MT8195_SEL_IN_SINB_VIRTUAL0_FROM_DSC_WRAP0_OUT 163b804923bSjason-jh.lin }, { 164b804923bSjason-jh.lin DDP_COMPONENT_DSC0, DDP_COMPONENT_DPI1, 165b804923bSjason-jh.lin MT8195_VDO0_SEL_IN, MT8195_SEL_IN_SINB_VIRTUAL0_FROM_MASK, 166b804923bSjason-jh.lin MT8195_SEL_IN_SINB_VIRTUAL0_FROM_DSC_WRAP0_OUT 167b804923bSjason-jh.lin }, { 168b804923bSjason-jh.lin DDP_COMPONENT_DSC1, DDP_COMPONENT_DP_INTF0, 169b804923bSjason-jh.lin MT8195_VDO0_SEL_IN, MT8195_SEL_IN_DP_INTF0_FROM_MASK, 170b804923bSjason-jh.lin MT8195_SEL_IN_DP_INTF0_FROM_DSC_WRAP1_OUT 171b804923bSjason-jh.lin }, { 172b804923bSjason-jh.lin DDP_COMPONENT_MERGE0, DDP_COMPONENT_DP_INTF0, 173b804923bSjason-jh.lin MT8195_VDO0_SEL_IN, MT8195_SEL_IN_DP_INTF0_FROM_MASK, 174b804923bSjason-jh.lin MT8195_SEL_IN_DP_INTF0_FROM_VPP_MERGE 175b804923bSjason-jh.lin }, { 176b804923bSjason-jh.lin DDP_COMPONENT_MERGE5, DDP_COMPONENT_DP_INTF0, 177b804923bSjason-jh.lin MT8195_VDO0_SEL_IN, MT8195_SEL_IN_DP_INTF0_FROM_MASK, 178b804923bSjason-jh.lin MT8195_SEL_IN_DP_INTF0_FROM_VDO1_VIRTUAL0 179b804923bSjason-jh.lin }, { 180b804923bSjason-jh.lin DDP_COMPONENT_DSC0, DDP_COMPONENT_DSI0, 181b804923bSjason-jh.lin MT8195_VDO0_SEL_IN, MT8195_SEL_IN_DSI0_FROM_MASK, 182b804923bSjason-jh.lin MT8195_SEL_IN_DSI0_FROM_DSC_WRAP0_OUT 183b804923bSjason-jh.lin }, { 184*4e8988c6Sjason-jh.lin DDP_COMPONENT_DITHER0, DDP_COMPONENT_DSI0, 185b804923bSjason-jh.lin MT8195_VDO0_SEL_IN, MT8195_SEL_IN_DSI0_FROM_MASK, 186b804923bSjason-jh.lin MT8195_SEL_IN_DSI0_FROM_DISP_DITHER0 187b804923bSjason-jh.lin }, { 188b804923bSjason-jh.lin DDP_COMPONENT_DSC1, DDP_COMPONENT_DSI1, 189b804923bSjason-jh.lin MT8195_VDO0_SEL_IN, MT8195_SEL_IN_DSI1_FROM_MASK, 190b804923bSjason-jh.lin MT8195_SEL_IN_DSI1_FROM_DSC_WRAP1_OUT 191b804923bSjason-jh.lin }, { 192b804923bSjason-jh.lin DDP_COMPONENT_MERGE0, DDP_COMPONENT_DSI1, 193b804923bSjason-jh.lin MT8195_VDO0_SEL_IN, MT8195_SEL_IN_DSI1_FROM_MASK, 194b804923bSjason-jh.lin MT8195_SEL_IN_DSI1_FROM_VPP_MERGE 195b804923bSjason-jh.lin }, { 196b804923bSjason-jh.lin DDP_COMPONENT_OVL1, DDP_COMPONENT_WDMA1, 197b804923bSjason-jh.lin MT8195_VDO0_SEL_IN, MT8195_SEL_IN_DISP_WDMA1_FROM_MASK, 198b804923bSjason-jh.lin MT8195_SEL_IN_DISP_WDMA1_FROM_DISP_OVL1 199b804923bSjason-jh.lin }, { 200b804923bSjason-jh.lin DDP_COMPONENT_MERGE0, DDP_COMPONENT_WDMA1, 201b804923bSjason-jh.lin MT8195_VDO0_SEL_IN, MT8195_SEL_IN_DISP_WDMA1_FROM_MASK, 202b804923bSjason-jh.lin MT8195_SEL_IN_DISP_WDMA1_FROM_VPP_MERGE 203b804923bSjason-jh.lin }, { 204b804923bSjason-jh.lin DDP_COMPONENT_DSC1, DDP_COMPONENT_DSI1, 205b804923bSjason-jh.lin MT8195_VDO0_SEL_IN, MT8195_SEL_IN_DSC_WRAP1_FROM_MASK, 206b804923bSjason-jh.lin MT8195_SEL_IN_DSC_WRAP1_OUT_FROM_DSC_WRAP1_IN 207b804923bSjason-jh.lin }, { 208b804923bSjason-jh.lin DDP_COMPONENT_DSC1, DDP_COMPONENT_DP_INTF0, 209b804923bSjason-jh.lin MT8195_VDO0_SEL_IN, MT8195_SEL_IN_DSC_WRAP1_FROM_MASK, 210b804923bSjason-jh.lin MT8195_SEL_IN_DSC_WRAP1_OUT_FROM_DSC_WRAP1_IN 211b804923bSjason-jh.lin }, { 212b804923bSjason-jh.lin DDP_COMPONENT_DSC1, DDP_COMPONENT_DP_INTF1, 213b804923bSjason-jh.lin MT8195_VDO0_SEL_IN, MT8195_SEL_IN_DSC_WRAP1_FROM_MASK, 214b804923bSjason-jh.lin MT8195_SEL_IN_DSC_WRAP1_OUT_FROM_DSC_WRAP1_IN 215b804923bSjason-jh.lin }, { 216b804923bSjason-jh.lin DDP_COMPONENT_DSC1, DDP_COMPONENT_DPI0, 217b804923bSjason-jh.lin MT8195_VDO0_SEL_IN, MT8195_SEL_IN_DSC_WRAP1_FROM_MASK, 218b804923bSjason-jh.lin MT8195_SEL_IN_DSC_WRAP1_OUT_FROM_DSC_WRAP1_IN 219b804923bSjason-jh.lin }, { 220b804923bSjason-jh.lin DDP_COMPONENT_DSC1, DDP_COMPONENT_DPI1, 221b804923bSjason-jh.lin MT8195_VDO0_SEL_IN, MT8195_SEL_IN_DSC_WRAP1_FROM_MASK, 222b804923bSjason-jh.lin MT8195_SEL_IN_DSC_WRAP1_OUT_FROM_DSC_WRAP1_IN 223b804923bSjason-jh.lin }, { 224b804923bSjason-jh.lin DDP_COMPONENT_DSC1, DDP_COMPONENT_MERGE0, 225b804923bSjason-jh.lin MT8195_VDO0_SEL_IN, MT8195_SEL_IN_DSC_WRAP1_FROM_MASK, 226b804923bSjason-jh.lin MT8195_SEL_IN_DSC_WRAP1_OUT_FROM_DSC_WRAP1_IN 227b804923bSjason-jh.lin }, { 228b804923bSjason-jh.lin DDP_COMPONENT_DITHER1, DDP_COMPONENT_DSI1, 229b804923bSjason-jh.lin MT8195_VDO0_SEL_IN, MT8195_SEL_IN_DSC_WRAP1_FROM_MASK, 230b804923bSjason-jh.lin MT8195_SEL_IN_DSC_WRAP1_OUT_FROM_DISP_DITHER1 231b804923bSjason-jh.lin }, { 232b804923bSjason-jh.lin DDP_COMPONENT_DITHER1, DDP_COMPONENT_DP_INTF0, 233b804923bSjason-jh.lin MT8195_VDO0_SEL_IN, MT8195_SEL_IN_DSC_WRAP1_FROM_MASK, 234b804923bSjason-jh.lin MT8195_SEL_IN_DSC_WRAP1_OUT_FROM_DISP_DITHER1 235b804923bSjason-jh.lin }, { 236b804923bSjason-jh.lin DDP_COMPONENT_DITHER1, DDP_COMPONENT_DPI0, 237b804923bSjason-jh.lin MT8195_VDO0_SEL_IN, MT8195_SEL_IN_DSC_WRAP1_FROM_MASK, 238b804923bSjason-jh.lin MT8195_SEL_IN_DSC_WRAP1_OUT_FROM_DISP_DITHER1 239b804923bSjason-jh.lin }, { 240b804923bSjason-jh.lin DDP_COMPONENT_DITHER1, DDP_COMPONENT_DPI1, 241b804923bSjason-jh.lin MT8195_VDO0_SEL_IN, MT8195_SEL_IN_DSC_WRAP1_FROM_MASK, 242b804923bSjason-jh.lin MT8195_SEL_IN_DSC_WRAP1_OUT_FROM_DISP_DITHER1 243b804923bSjason-jh.lin }, { 244b804923bSjason-jh.lin DDP_COMPONENT_OVL0, DDP_COMPONENT_WDMA0, 245b804923bSjason-jh.lin MT8195_VDO0_SEL_IN, MT8195_SEL_IN_DISP_WDMA0_FROM_MASK, 246b804923bSjason-jh.lin MT8195_SEL_IN_DISP_WDMA0_FROM_DISP_OVL0 247b804923bSjason-jh.lin }, { 248*4e8988c6Sjason-jh.lin DDP_COMPONENT_DITHER0, DDP_COMPONENT_DSC0, 249b804923bSjason-jh.lin MT8195_VDO0_SEL_OUT, MT8195_SOUT_DISP_DITHER0_TO_MASK, 250b804923bSjason-jh.lin MT8195_SOUT_DISP_DITHER0_TO_DSC_WRAP0_IN 251b804923bSjason-jh.lin }, { 252*4e8988c6Sjason-jh.lin DDP_COMPONENT_DITHER0, DDP_COMPONENT_DSI0, 253b804923bSjason-jh.lin MT8195_VDO0_SEL_OUT, MT8195_SOUT_DISP_DITHER0_TO_MASK, 254b804923bSjason-jh.lin MT8195_SOUT_DISP_DITHER0_TO_DSI0 255b804923bSjason-jh.lin }, { 256b804923bSjason-jh.lin DDP_COMPONENT_DITHER1, DDP_COMPONENT_DSC1, 257b804923bSjason-jh.lin MT8195_VDO0_SEL_OUT, MT8195_SOUT_DISP_DITHER1_TO_MASK, 258b804923bSjason-jh.lin MT8195_SOUT_DISP_DITHER1_TO_DSC_WRAP1_IN 259b804923bSjason-jh.lin }, { 260b804923bSjason-jh.lin DDP_COMPONENT_DITHER1, DDP_COMPONENT_MERGE0, 261b804923bSjason-jh.lin MT8195_VDO0_SEL_OUT, MT8195_SOUT_DISP_DITHER1_TO_MASK, 262b804923bSjason-jh.lin MT8195_SOUT_DISP_DITHER1_TO_VPP_MERGE 263b804923bSjason-jh.lin }, { 264b804923bSjason-jh.lin DDP_COMPONENT_DITHER1, DDP_COMPONENT_DSI1, 265b804923bSjason-jh.lin MT8195_VDO0_SEL_OUT, MT8195_SOUT_DISP_DITHER1_TO_MASK, 266b804923bSjason-jh.lin MT8195_SOUT_DISP_DITHER1_TO_DSC_WRAP1_OUT 267b804923bSjason-jh.lin }, { 268b804923bSjason-jh.lin DDP_COMPONENT_DITHER1, DDP_COMPONENT_DP_INTF0, 269b804923bSjason-jh.lin MT8195_VDO0_SEL_OUT, MT8195_SOUT_DISP_DITHER1_TO_MASK, 270b804923bSjason-jh.lin MT8195_SOUT_DISP_DITHER1_TO_DSC_WRAP1_OUT 271b804923bSjason-jh.lin }, { 272b804923bSjason-jh.lin DDP_COMPONENT_DITHER1, DDP_COMPONENT_DP_INTF1, 273b804923bSjason-jh.lin MT8195_VDO0_SEL_OUT, MT8195_SOUT_DISP_DITHER1_TO_MASK, 274b804923bSjason-jh.lin MT8195_SOUT_DISP_DITHER1_TO_DSC_WRAP1_OUT 275b804923bSjason-jh.lin }, { 276b804923bSjason-jh.lin DDP_COMPONENT_DITHER1, DDP_COMPONENT_DPI0, 277b804923bSjason-jh.lin MT8195_VDO0_SEL_OUT, MT8195_SOUT_DISP_DITHER1_TO_MASK, 278b804923bSjason-jh.lin MT8195_SOUT_DISP_DITHER1_TO_DSC_WRAP1_OUT 279b804923bSjason-jh.lin }, { 280b804923bSjason-jh.lin DDP_COMPONENT_DITHER1, DDP_COMPONENT_DPI1, 281b804923bSjason-jh.lin MT8195_VDO0_SEL_OUT, MT8195_SOUT_DISP_DITHER1_TO_MASK, 282b804923bSjason-jh.lin MT8195_SOUT_DISP_DITHER1_TO_DSC_WRAP1_OUT 283b804923bSjason-jh.lin }, { 284b804923bSjason-jh.lin DDP_COMPONENT_MERGE5, DDP_COMPONENT_MERGE0, 285b804923bSjason-jh.lin MT8195_VDO0_SEL_OUT, MT8195_SOUT_VDO1_VIRTUAL0_TO_MASK, 286b804923bSjason-jh.lin MT8195_SOUT_VDO1_VIRTUAL0_TO_VPP_MERGE 287b804923bSjason-jh.lin }, { 288b804923bSjason-jh.lin DDP_COMPONENT_MERGE5, DDP_COMPONENT_DP_INTF0, 289b804923bSjason-jh.lin MT8195_VDO0_SEL_OUT, MT8195_SOUT_VDO1_VIRTUAL0_TO_MASK, 290b804923bSjason-jh.lin MT8195_SOUT_VDO1_VIRTUAL0_TO_DP_INTF0 291b804923bSjason-jh.lin }, { 292b804923bSjason-jh.lin DDP_COMPONENT_MERGE0, DDP_COMPONENT_DSI1, 293b804923bSjason-jh.lin MT8195_VDO0_SEL_OUT, MT8195_SOUT_VPP_MERGE_TO_MASK, 294b804923bSjason-jh.lin MT8195_SOUT_VPP_MERGE_TO_DSI1 295b804923bSjason-jh.lin }, { 296b804923bSjason-jh.lin DDP_COMPONENT_MERGE0, DDP_COMPONENT_DP_INTF0, 297b804923bSjason-jh.lin MT8195_VDO0_SEL_OUT, MT8195_SOUT_VPP_MERGE_TO_MASK, 298b804923bSjason-jh.lin MT8195_SOUT_VPP_MERGE_TO_DP_INTF0 299b804923bSjason-jh.lin }, { 300b804923bSjason-jh.lin DDP_COMPONENT_MERGE0, DDP_COMPONENT_DP_INTF1, 301b804923bSjason-jh.lin MT8195_VDO0_SEL_OUT, MT8195_SOUT_VPP_MERGE_TO_MASK, 302b804923bSjason-jh.lin MT8195_SOUT_VPP_MERGE_TO_SINA_VIRTUAL0 303b804923bSjason-jh.lin }, { 304b804923bSjason-jh.lin DDP_COMPONENT_MERGE0, DDP_COMPONENT_DPI0, 305b804923bSjason-jh.lin MT8195_VDO0_SEL_OUT, MT8195_SOUT_VPP_MERGE_TO_MASK, 306b804923bSjason-jh.lin MT8195_SOUT_VPP_MERGE_TO_SINA_VIRTUAL0 307b804923bSjason-jh.lin }, { 308b804923bSjason-jh.lin DDP_COMPONENT_MERGE0, DDP_COMPONENT_DPI1, 309b804923bSjason-jh.lin MT8195_VDO0_SEL_OUT, MT8195_SOUT_VPP_MERGE_TO_MASK, 310b804923bSjason-jh.lin MT8195_SOUT_VPP_MERGE_TO_SINA_VIRTUAL0 311b804923bSjason-jh.lin }, { 312b804923bSjason-jh.lin DDP_COMPONENT_MERGE0, DDP_COMPONENT_WDMA1, 313b804923bSjason-jh.lin MT8195_VDO0_SEL_OUT, MT8195_SOUT_VPP_MERGE_TO_MASK, 314b804923bSjason-jh.lin MT8195_SOUT_VPP_MERGE_TO_DISP_WDMA1 315b804923bSjason-jh.lin }, { 316b804923bSjason-jh.lin DDP_COMPONENT_MERGE0, DDP_COMPONENT_DSC0, 317b804923bSjason-jh.lin MT8195_VDO0_SEL_OUT, MT8195_SOUT_VPP_MERGE_TO_MASK, 318b804923bSjason-jh.lin MT8195_SOUT_VPP_MERGE_TO_DSC_WRAP0_IN 319b804923bSjason-jh.lin }, { 320b804923bSjason-jh.lin DDP_COMPONENT_MERGE0, DDP_COMPONENT_DSC1, 321b804923bSjason-jh.lin MT8195_VDO0_SEL_OUT, MT8195_SOUT_VPP_MERGE_TO_DSC_WRAP1_IN_MASK, 322b804923bSjason-jh.lin MT8195_SOUT_VPP_MERGE_TO_DSC_WRAP1_IN 323b804923bSjason-jh.lin }, { 324b804923bSjason-jh.lin DDP_COMPONENT_DSC0, DDP_COMPONENT_DSI0, 325b804923bSjason-jh.lin MT8195_VDO0_SEL_OUT, MT8195_SOUT_DSC_WRAP0_OUT_TO_MASK, 326b804923bSjason-jh.lin MT8195_SOUT_DSC_WRAP0_OUT_TO_DSI0 327b804923bSjason-jh.lin }, { 328b804923bSjason-jh.lin DDP_COMPONENT_DSC0, DDP_COMPONENT_DP_INTF1, 329b804923bSjason-jh.lin MT8195_VDO0_SEL_OUT, MT8195_SOUT_DSC_WRAP0_OUT_TO_MASK, 330b804923bSjason-jh.lin MT8195_SOUT_DSC_WRAP0_OUT_TO_SINB_VIRTUAL0 331b804923bSjason-jh.lin }, { 332b804923bSjason-jh.lin DDP_COMPONENT_DSC0, DDP_COMPONENT_DPI0, 333b804923bSjason-jh.lin MT8195_VDO0_SEL_OUT, MT8195_SOUT_DSC_WRAP0_OUT_TO_MASK, 334b804923bSjason-jh.lin MT8195_SOUT_DSC_WRAP0_OUT_TO_SINB_VIRTUAL0 335b804923bSjason-jh.lin }, { 336b804923bSjason-jh.lin DDP_COMPONENT_DSC0, DDP_COMPONENT_DPI1, 337b804923bSjason-jh.lin MT8195_VDO0_SEL_OUT, MT8195_SOUT_DSC_WRAP0_OUT_TO_MASK, 338b804923bSjason-jh.lin MT8195_SOUT_DSC_WRAP0_OUT_TO_SINB_VIRTUAL0 339b804923bSjason-jh.lin }, { 340b804923bSjason-jh.lin DDP_COMPONENT_DSC0, DDP_COMPONENT_MERGE0, 341b804923bSjason-jh.lin MT8195_VDO0_SEL_OUT, MT8195_SOUT_DSC_WRAP0_OUT_TO_MASK, 342b804923bSjason-jh.lin MT8195_SOUT_DSC_WRAP0_OUT_TO_VPP_MERGE 343b804923bSjason-jh.lin }, { 344b804923bSjason-jh.lin DDP_COMPONENT_DSC1, DDP_COMPONENT_DSI1, 345b804923bSjason-jh.lin MT8195_VDO0_SEL_OUT, MT8195_SOUT_DSC_WRAP1_OUT_TO_MASK, 346b804923bSjason-jh.lin MT8195_SOUT_DSC_WRAP1_OUT_TO_DSI1 347b804923bSjason-jh.lin }, { 348b804923bSjason-jh.lin DDP_COMPONENT_DSC1, DDP_COMPONENT_DP_INTF0, 349b804923bSjason-jh.lin MT8195_VDO0_SEL_OUT, MT8195_SOUT_DSC_WRAP1_OUT_TO_MASK, 350b804923bSjason-jh.lin MT8195_SOUT_DSC_WRAP1_OUT_TO_DP_INTF0 351b804923bSjason-jh.lin }, { 352b804923bSjason-jh.lin DDP_COMPONENT_DSC1, DDP_COMPONENT_DP_INTF1, 353b804923bSjason-jh.lin MT8195_VDO0_SEL_OUT, MT8195_SOUT_DSC_WRAP1_OUT_TO_MASK, 354b804923bSjason-jh.lin MT8195_SOUT_DSC_WRAP1_OUT_TO_SINA_VIRTUAL0 355b804923bSjason-jh.lin }, { 356b804923bSjason-jh.lin DDP_COMPONENT_DSC1, DDP_COMPONENT_DPI0, 357b804923bSjason-jh.lin MT8195_VDO0_SEL_OUT, MT8195_SOUT_DSC_WRAP1_OUT_TO_MASK, 358b804923bSjason-jh.lin MT8195_SOUT_DSC_WRAP1_OUT_TO_SINA_VIRTUAL0 359b804923bSjason-jh.lin }, { 360b804923bSjason-jh.lin DDP_COMPONENT_DSC1, DDP_COMPONENT_DPI1, 361b804923bSjason-jh.lin MT8195_VDO0_SEL_OUT, MT8195_SOUT_DSC_WRAP1_OUT_TO_MASK, 362b804923bSjason-jh.lin MT8195_SOUT_DSC_WRAP1_OUT_TO_SINA_VIRTUAL0 363b804923bSjason-jh.lin }, { 364b804923bSjason-jh.lin DDP_COMPONENT_DSC1, DDP_COMPONENT_MERGE0, 365b804923bSjason-jh.lin MT8195_VDO0_SEL_OUT, MT8195_SOUT_DSC_WRAP1_OUT_TO_MASK, 366b804923bSjason-jh.lin MT8195_SOUT_DSC_WRAP1_OUT_TO_VPP_MERGE 367b804923bSjason-jh.lin } 368b804923bSjason-jh.lin }; 369b804923bSjason-jh.lin 370b804923bSjason-jh.lin #endif /* __SOC_MEDIATEK_MT8195_MMSYS_H */ 371