1c89105c9SRoy Pledge // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2c89105c9SRoy Pledge /*
3c89105c9SRoy Pledge * Copyright 2014-2016 Freescale Semiconductor Inc.
4c89105c9SRoy Pledge * Copyright NXP 2016
5c89105c9SRoy Pledge *
6c89105c9SRoy Pledge */
7c89105c9SRoy Pledge
8c89105c9SRoy Pledge #include <linux/types.h>
9c89105c9SRoy Pledge #include <linux/init.h>
10c89105c9SRoy Pledge #include <linux/module.h>
11c89105c9SRoy Pledge #include <linux/platform_device.h>
12c89105c9SRoy Pledge #include <linux/interrupt.h>
13c89105c9SRoy Pledge #include <linux/dma-mapping.h>
14c89105c9SRoy Pledge #include <linux/delay.h>
15c89105c9SRoy Pledge #include <linux/io.h>
1651da14e9SIoana Ciornei #include <linux/sys_soc.h>
17c89105c9SRoy Pledge
18c89105c9SRoy Pledge #include <linux/fsl/mc.h>
19c89105c9SRoy Pledge #include <soc/fsl/dpaa2-io.h>
20c89105c9SRoy Pledge
21c89105c9SRoy Pledge #include "qbman-portal.h"
22c89105c9SRoy Pledge #include "dpio.h"
23c89105c9SRoy Pledge #include "dpio-cmd.h"
24c89105c9SRoy Pledge
25c89105c9SRoy Pledge MODULE_LICENSE("Dual BSD/GPL");
26c89105c9SRoy Pledge MODULE_AUTHOR("Freescale Semiconductor, Inc");
27c89105c9SRoy Pledge MODULE_DESCRIPTION("DPIO Driver");
28c89105c9SRoy Pledge
29c89105c9SRoy Pledge struct dpio_priv {
30c89105c9SRoy Pledge struct dpaa2_io *io;
31c89105c9SRoy Pledge };
32c89105c9SRoy Pledge
33991e8732SIoana Ciornei static cpumask_var_t cpus_unused_mask;
34991e8732SIoana Ciornei
3551da14e9SIoana Ciornei static const struct soc_device_attribute ls1088a_soc[] = {
3651da14e9SIoana Ciornei {.family = "QorIQ LS1088A"},
3751da14e9SIoana Ciornei { /* sentinel */ }
3851da14e9SIoana Ciornei };
3951da14e9SIoana Ciornei
4051da14e9SIoana Ciornei static const struct soc_device_attribute ls2080a_soc[] = {
4151da14e9SIoana Ciornei {.family = "QorIQ LS2080A"},
4251da14e9SIoana Ciornei { /* sentinel */ }
4351da14e9SIoana Ciornei };
4451da14e9SIoana Ciornei
4551da14e9SIoana Ciornei static const struct soc_device_attribute ls2088a_soc[] = {
4651da14e9SIoana Ciornei {.family = "QorIQ LS2088A"},
4751da14e9SIoana Ciornei { /* sentinel */ }
4851da14e9SIoana Ciornei };
4951da14e9SIoana Ciornei
5051da14e9SIoana Ciornei static const struct soc_device_attribute lx2160a_soc[] = {
5151da14e9SIoana Ciornei {.family = "QorIQ LX2160A"},
5251da14e9SIoana Ciornei { /* sentinel */ }
5351da14e9SIoana Ciornei };
5451da14e9SIoana Ciornei
dpaa2_dpio_get_cluster_sdest(struct fsl_mc_device * dpio_dev,int cpu)5551da14e9SIoana Ciornei static int dpaa2_dpio_get_cluster_sdest(struct fsl_mc_device *dpio_dev, int cpu)
5651da14e9SIoana Ciornei {
5751da14e9SIoana Ciornei int cluster_base, cluster_size;
5851da14e9SIoana Ciornei
5951da14e9SIoana Ciornei if (soc_device_match(ls1088a_soc)) {
6051da14e9SIoana Ciornei cluster_base = 2;
6151da14e9SIoana Ciornei cluster_size = 4;
6251da14e9SIoana Ciornei } else if (soc_device_match(ls2080a_soc) ||
6351da14e9SIoana Ciornei soc_device_match(ls2088a_soc) ||
6451da14e9SIoana Ciornei soc_device_match(lx2160a_soc)) {
6551da14e9SIoana Ciornei cluster_base = 0;
6651da14e9SIoana Ciornei cluster_size = 2;
6751da14e9SIoana Ciornei } else {
6851da14e9SIoana Ciornei dev_err(&dpio_dev->dev, "unknown SoC version\n");
6951da14e9SIoana Ciornei return -1;
7051da14e9SIoana Ciornei }
7151da14e9SIoana Ciornei
7251da14e9SIoana Ciornei return cluster_base + cpu / cluster_size;
7351da14e9SIoana Ciornei }
7451da14e9SIoana Ciornei
dpio_irq_handler(int irq_num,void * arg)75c89105c9SRoy Pledge static irqreturn_t dpio_irq_handler(int irq_num, void *arg)
76c89105c9SRoy Pledge {
77c89105c9SRoy Pledge struct device *dev = (struct device *)arg;
78c89105c9SRoy Pledge struct dpio_priv *priv = dev_get_drvdata(dev);
79c89105c9SRoy Pledge
80c89105c9SRoy Pledge return dpaa2_io_irq(priv->io);
81c89105c9SRoy Pledge }
82c89105c9SRoy Pledge
unregister_dpio_irq_handlers(struct fsl_mc_device * dpio_dev)83c89105c9SRoy Pledge static void unregister_dpio_irq_handlers(struct fsl_mc_device *dpio_dev)
84c89105c9SRoy Pledge {
85c89105c9SRoy Pledge struct fsl_mc_device_irq *irq;
86c89105c9SRoy Pledge
87c89105c9SRoy Pledge irq = dpio_dev->irqs[0];
88c89105c9SRoy Pledge
89c89105c9SRoy Pledge /* clear the affinity hint */
90d86a6d47SThomas Gleixner irq_set_affinity_hint(irq->virq, NULL);
91c89105c9SRoy Pledge }
92c89105c9SRoy Pledge
register_dpio_irq_handlers(struct fsl_mc_device * dpio_dev,int cpu)93c89105c9SRoy Pledge static int register_dpio_irq_handlers(struct fsl_mc_device *dpio_dev, int cpu)
94c89105c9SRoy Pledge {
95c89105c9SRoy Pledge int error;
96c89105c9SRoy Pledge struct fsl_mc_device_irq *irq;
97c89105c9SRoy Pledge
98c89105c9SRoy Pledge irq = dpio_dev->irqs[0];
99c89105c9SRoy Pledge error = devm_request_irq(&dpio_dev->dev,
100d86a6d47SThomas Gleixner irq->virq,
101c89105c9SRoy Pledge dpio_irq_handler,
102c89105c9SRoy Pledge 0,
103c89105c9SRoy Pledge dev_name(&dpio_dev->dev),
104c89105c9SRoy Pledge &dpio_dev->dev);
105c89105c9SRoy Pledge if (error < 0) {
106c89105c9SRoy Pledge dev_err(&dpio_dev->dev,
107c89105c9SRoy Pledge "devm_request_irq() failed: %d\n",
108c89105c9SRoy Pledge error);
109c89105c9SRoy Pledge return error;
110c89105c9SRoy Pledge }
111c89105c9SRoy Pledge
112c89105c9SRoy Pledge /* set the affinity hint */
113d86a6d47SThomas Gleixner if (irq_set_affinity_hint(irq->virq, cpumask_of(cpu)))
114c89105c9SRoy Pledge dev_err(&dpio_dev->dev,
115c89105c9SRoy Pledge "irq_set_affinity failed irq %d cpu %d\n",
116d86a6d47SThomas Gleixner irq->virq, cpu);
117c89105c9SRoy Pledge
118c89105c9SRoy Pledge return 0;
119c89105c9SRoy Pledge }
120c89105c9SRoy Pledge
dpaa2_dpio_probe(struct fsl_mc_device * dpio_dev)121c89105c9SRoy Pledge static int dpaa2_dpio_probe(struct fsl_mc_device *dpio_dev)
122c89105c9SRoy Pledge {
123c89105c9SRoy Pledge struct dpio_attr dpio_attrs;
124c89105c9SRoy Pledge struct dpaa2_io_desc desc;
125c89105c9SRoy Pledge struct dpio_priv *priv;
126c89105c9SRoy Pledge int err = -ENOMEM;
127c89105c9SRoy Pledge struct device *dev = &dpio_dev->dev;
128991e8732SIoana Ciornei int possible_next_cpu;
12951da14e9SIoana Ciornei int sdest;
130c89105c9SRoy Pledge
131c89105c9SRoy Pledge priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
132c89105c9SRoy Pledge if (!priv)
133c89105c9SRoy Pledge goto err_priv_alloc;
134c89105c9SRoy Pledge
135c89105c9SRoy Pledge dev_set_drvdata(dev, priv);
136c89105c9SRoy Pledge
137c89105c9SRoy Pledge err = fsl_mc_portal_allocate(dpio_dev, 0, &dpio_dev->mc_io);
138c89105c9SRoy Pledge if (err) {
139c89105c9SRoy Pledge dev_dbg(dev, "MC portal allocation failed\n");
140c89105c9SRoy Pledge err = -EPROBE_DEFER;
141c89105c9SRoy Pledge goto err_priv_alloc;
142c89105c9SRoy Pledge }
143c89105c9SRoy Pledge
144c89105c9SRoy Pledge err = dpio_open(dpio_dev->mc_io, 0, dpio_dev->obj_desc.id,
145c89105c9SRoy Pledge &dpio_dev->mc_handle);
146c89105c9SRoy Pledge if (err) {
147c89105c9SRoy Pledge dev_err(dev, "dpio_open() failed\n");
148c89105c9SRoy Pledge goto err_open;
149c89105c9SRoy Pledge }
150c89105c9SRoy Pledge
15111c8bac9SRoy Pledge err = dpio_reset(dpio_dev->mc_io, 0, dpio_dev->mc_handle);
15211c8bac9SRoy Pledge if (err) {
15311c8bac9SRoy Pledge dev_err(dev, "dpio_reset() failed\n");
15411c8bac9SRoy Pledge goto err_reset;
15511c8bac9SRoy Pledge }
15611c8bac9SRoy Pledge
157c89105c9SRoy Pledge err = dpio_get_attributes(dpio_dev->mc_io, 0, dpio_dev->mc_handle,
158c89105c9SRoy Pledge &dpio_attrs);
159c89105c9SRoy Pledge if (err) {
160c89105c9SRoy Pledge dev_err(dev, "dpio_get_attributes() failed %d\n", err);
161c89105c9SRoy Pledge goto err_get_attr;
162c89105c9SRoy Pledge }
163c89105c9SRoy Pledge desc.qman_version = dpio_attrs.qbman_version;
1642cf0b6feSIoana Ciornei desc.qman_clk = dpio_attrs.clk;
165c89105c9SRoy Pledge
166c89105c9SRoy Pledge err = dpio_enable(dpio_dev->mc_io, 0, dpio_dev->mc_handle);
167c89105c9SRoy Pledge if (err) {
168c89105c9SRoy Pledge dev_err(dev, "dpio_enable() failed %d\n", err);
169c89105c9SRoy Pledge goto err_get_attr;
170c89105c9SRoy Pledge }
171c89105c9SRoy Pledge
172c89105c9SRoy Pledge /* initialize DPIO descriptor */
173c89105c9SRoy Pledge desc.receives_notifications = dpio_attrs.num_priorities ? 1 : 0;
174c89105c9SRoy Pledge desc.has_8prio = dpio_attrs.num_priorities == 8 ? 1 : 0;
175c89105c9SRoy Pledge desc.dpio_id = dpio_dev->obj_desc.id;
176c89105c9SRoy Pledge
177c89105c9SRoy Pledge /* get the cpu to use for the affinity hint */
178991e8732SIoana Ciornei possible_next_cpu = cpumask_first(cpus_unused_mask);
179991e8732SIoana Ciornei if (possible_next_cpu >= nr_cpu_ids) {
180c89105c9SRoy Pledge dev_err(dev, "probe failed. Number of DPIOs exceeds NR_CPUS.\n");
181c89105c9SRoy Pledge err = -ERANGE;
182c89105c9SRoy Pledge goto err_allocate_irqs;
183c89105c9SRoy Pledge }
184991e8732SIoana Ciornei desc.cpu = possible_next_cpu;
185991e8732SIoana Ciornei cpumask_clear_cpu(possible_next_cpu, cpus_unused_mask);
186c89105c9SRoy Pledge
18751da14e9SIoana Ciornei sdest = dpaa2_dpio_get_cluster_sdest(dpio_dev, desc.cpu);
18851da14e9SIoana Ciornei if (sdest >= 0) {
18951da14e9SIoana Ciornei err = dpio_set_stashing_destination(dpio_dev->mc_io, 0,
19051da14e9SIoana Ciornei dpio_dev->mc_handle,
19151da14e9SIoana Ciornei sdest);
19251da14e9SIoana Ciornei if (err)
19351da14e9SIoana Ciornei dev_err(dev, "dpio_set_stashing_destination failed for cpu%d\n",
19451da14e9SIoana Ciornei desc.cpu);
19551da14e9SIoana Ciornei }
19651da14e9SIoana Ciornei
1975842efa4SRoy Pledge if (dpio_dev->obj_desc.region_count < 3) {
1985842efa4SRoy Pledge /* No support for DDR backed portals, use classic mapping */
199c89105c9SRoy Pledge /*
2005842efa4SRoy Pledge * Set the CENA regs to be the cache inhibited area of the
2015842efa4SRoy Pledge * portal to avoid coherency issues if a user migrates to
2025842efa4SRoy Pledge * another core.
203c89105c9SRoy Pledge */
204c89105c9SRoy Pledge desc.regs_cena = devm_memremap(dev, dpio_dev->regions[1].start,
205c89105c9SRoy Pledge resource_size(&dpio_dev->regions[1]),
206c89105c9SRoy Pledge MEMREMAP_WC);
2075842efa4SRoy Pledge } else {
2085842efa4SRoy Pledge desc.regs_cena = devm_memremap(dev, dpio_dev->regions[2].start,
2095842efa4SRoy Pledge resource_size(&dpio_dev->regions[2]),
2105842efa4SRoy Pledge MEMREMAP_WB);
2115842efa4SRoy Pledge }
2125842efa4SRoy Pledge
213c89105c9SRoy Pledge if (IS_ERR(desc.regs_cena)) {
214c89105c9SRoy Pledge dev_err(dev, "devm_memremap failed\n");
215c89105c9SRoy Pledge err = PTR_ERR(desc.regs_cena);
216c89105c9SRoy Pledge goto err_allocate_irqs;
217c89105c9SRoy Pledge }
218c89105c9SRoy Pledge
219c89105c9SRoy Pledge desc.regs_cinh = devm_ioremap(dev, dpio_dev->regions[1].start,
220c89105c9SRoy Pledge resource_size(&dpio_dev->regions[1]));
221c89105c9SRoy Pledge if (!desc.regs_cinh) {
222c89105c9SRoy Pledge err = -ENOMEM;
223c89105c9SRoy Pledge dev_err(dev, "devm_ioremap failed\n");
224c89105c9SRoy Pledge goto err_allocate_irqs;
225c89105c9SRoy Pledge }
226c89105c9SRoy Pledge
227c89105c9SRoy Pledge err = fsl_mc_allocate_irqs(dpio_dev);
228c89105c9SRoy Pledge if (err) {
229c89105c9SRoy Pledge dev_err(dev, "fsl_mc_allocate_irqs failed. err=%d\n", err);
230c89105c9SRoy Pledge goto err_allocate_irqs;
231c89105c9SRoy Pledge }
232c89105c9SRoy Pledge
233cf9ff75dSIoana Ciornei priv->io = dpaa2_io_create(&desc, dev);
234c89105c9SRoy Pledge if (!priv->io) {
235c89105c9SRoy Pledge dev_err(dev, "dpaa2_io_create failed\n");
236c89105c9SRoy Pledge err = -ENOMEM;
237c89105c9SRoy Pledge goto err_dpaa2_io_create;
238c89105c9SRoy Pledge }
239c89105c9SRoy Pledge
240fe8fe772SGrigore Popescu err = register_dpio_irq_handlers(dpio_dev, desc.cpu);
241fe8fe772SGrigore Popescu if (err)
242fe8fe772SGrigore Popescu goto err_register_dpio_irq;
243fe8fe772SGrigore Popescu
244c89105c9SRoy Pledge dev_info(dev, "probed\n");
245c89105c9SRoy Pledge dev_dbg(dev, " receives_notifications = %d\n",
246c89105c9SRoy Pledge desc.receives_notifications);
247c89105c9SRoy Pledge dpio_close(dpio_dev->mc_io, 0, dpio_dev->mc_handle);
248c89105c9SRoy Pledge
249c89105c9SRoy Pledge return 0;
250c89105c9SRoy Pledge
251c89105c9SRoy Pledge err_dpaa2_io_create:
252c89105c9SRoy Pledge unregister_dpio_irq_handlers(dpio_dev);
253c89105c9SRoy Pledge err_register_dpio_irq:
254c89105c9SRoy Pledge fsl_mc_free_irqs(dpio_dev);
255c89105c9SRoy Pledge err_allocate_irqs:
256c89105c9SRoy Pledge dpio_disable(dpio_dev->mc_io, 0, dpio_dev->mc_handle);
257c89105c9SRoy Pledge err_get_attr:
25811c8bac9SRoy Pledge err_reset:
259c89105c9SRoy Pledge dpio_close(dpio_dev->mc_io, 0, dpio_dev->mc_handle);
260c89105c9SRoy Pledge err_open:
261c89105c9SRoy Pledge fsl_mc_portal_free(dpio_dev->mc_io);
262c89105c9SRoy Pledge err_priv_alloc:
263c89105c9SRoy Pledge return err;
264c89105c9SRoy Pledge }
265c89105c9SRoy Pledge
266c89105c9SRoy Pledge /* Tear down interrupts for a given DPIO object */
dpio_teardown_irqs(struct fsl_mc_device * dpio_dev)267c89105c9SRoy Pledge static void dpio_teardown_irqs(struct fsl_mc_device *dpio_dev)
268c89105c9SRoy Pledge {
269c89105c9SRoy Pledge unregister_dpio_irq_handlers(dpio_dev);
270c89105c9SRoy Pledge fsl_mc_free_irqs(dpio_dev);
271c89105c9SRoy Pledge }
272c89105c9SRoy Pledge
dpaa2_dpio_remove(struct fsl_mc_device * dpio_dev)273*59272ad8SUwe Kleine-König static void dpaa2_dpio_remove(struct fsl_mc_device *dpio_dev)
274c89105c9SRoy Pledge {
275c89105c9SRoy Pledge struct device *dev;
276c89105c9SRoy Pledge struct dpio_priv *priv;
277991e8732SIoana Ciornei int err = 0, cpu;
278c89105c9SRoy Pledge
279c89105c9SRoy Pledge dev = &dpio_dev->dev;
280c89105c9SRoy Pledge priv = dev_get_drvdata(dev);
281c1959066SDan Carpenter cpu = dpaa2_io_get_cpu(priv->io);
282c89105c9SRoy Pledge
283c89105c9SRoy Pledge dpaa2_io_down(priv->io);
284c89105c9SRoy Pledge
285c89105c9SRoy Pledge dpio_teardown_irqs(dpio_dev);
286c89105c9SRoy Pledge
287991e8732SIoana Ciornei cpumask_set_cpu(cpu, cpus_unused_mask);
288991e8732SIoana Ciornei
289c89105c9SRoy Pledge err = dpio_open(dpio_dev->mc_io, 0, dpio_dev->obj_desc.id,
290c89105c9SRoy Pledge &dpio_dev->mc_handle);
291c89105c9SRoy Pledge if (err) {
292c89105c9SRoy Pledge dev_err(dev, "dpio_open() failed\n");
293c89105c9SRoy Pledge goto err_open;
294c89105c9SRoy Pledge }
295c89105c9SRoy Pledge
296c89105c9SRoy Pledge dpio_disable(dpio_dev->mc_io, 0, dpio_dev->mc_handle);
297c89105c9SRoy Pledge
298c89105c9SRoy Pledge dpio_close(dpio_dev->mc_io, 0, dpio_dev->mc_handle);
299c89105c9SRoy Pledge
300c89105c9SRoy Pledge err_open:
301c89105c9SRoy Pledge fsl_mc_portal_free(dpio_dev->mc_io);
302c89105c9SRoy Pledge }
303c89105c9SRoy Pledge
304c89105c9SRoy Pledge static const struct fsl_mc_device_id dpaa2_dpio_match_id_table[] = {
305c89105c9SRoy Pledge {
306c89105c9SRoy Pledge .vendor = FSL_MC_VENDOR_FREESCALE,
307c89105c9SRoy Pledge .obj_type = "dpio",
308c89105c9SRoy Pledge },
309c89105c9SRoy Pledge { .vendor = 0x0 }
310c89105c9SRoy Pledge };
311c89105c9SRoy Pledge
312c89105c9SRoy Pledge static struct fsl_mc_driver dpaa2_dpio_driver = {
313c89105c9SRoy Pledge .driver = {
314c89105c9SRoy Pledge .name = KBUILD_MODNAME,
315c89105c9SRoy Pledge .owner = THIS_MODULE,
316c89105c9SRoy Pledge },
317c89105c9SRoy Pledge .probe = dpaa2_dpio_probe,
318c89105c9SRoy Pledge .remove = dpaa2_dpio_remove,
319c89105c9SRoy Pledge .match_id_table = dpaa2_dpio_match_id_table
320c89105c9SRoy Pledge };
321c89105c9SRoy Pledge
dpio_driver_init(void)322c89105c9SRoy Pledge static int dpio_driver_init(void)
323c89105c9SRoy Pledge {
324991e8732SIoana Ciornei if (!zalloc_cpumask_var(&cpus_unused_mask, GFP_KERNEL))
325991e8732SIoana Ciornei return -ENOMEM;
326991e8732SIoana Ciornei cpumask_copy(cpus_unused_mask, cpu_online_mask);
327991e8732SIoana Ciornei
328c89105c9SRoy Pledge return fsl_mc_driver_register(&dpaa2_dpio_driver);
329c89105c9SRoy Pledge }
330c89105c9SRoy Pledge
dpio_driver_exit(void)331c89105c9SRoy Pledge static void dpio_driver_exit(void)
332c89105c9SRoy Pledge {
333991e8732SIoana Ciornei free_cpumask_var(cpus_unused_mask);
334c89105c9SRoy Pledge fsl_mc_driver_unregister(&dpaa2_dpio_driver);
335c89105c9SRoy Pledge }
336c89105c9SRoy Pledge module_init(dpio_driver_init);
337c89105c9SRoy Pledge module_exit(dpio_driver_exit);
338