xref: /openbmc/linux/drivers/slimbus/slimbus.h (revision 917809e2280bb83994be8b642373fd941d40c407)
146a2bb5aSSagar Dharia // SPDX-License-Identifier: GPL-2.0
246a2bb5aSSagar Dharia /*
346a2bb5aSSagar Dharia  * Copyright (c) 2011-2017, The Linux Foundation
446a2bb5aSSagar Dharia  */
546a2bb5aSSagar Dharia 
646a2bb5aSSagar Dharia #ifndef _DRIVERS_SLIMBUS_H
746a2bb5aSSagar Dharia #define _DRIVERS_SLIMBUS_H
846a2bb5aSSagar Dharia #include <linux/module.h>
946a2bb5aSSagar Dharia #include <linux/device.h>
1046a2bb5aSSagar Dharia #include <linux/mutex.h>
11afbdcc7cSSagar Dharia #include <linux/completion.h>
1246a2bb5aSSagar Dharia #include <linux/slimbus.h>
1346a2bb5aSSagar Dharia 
14ce96188bSSrinivas Kandagatla /* Standard values per SLIMbus spec needed by controllers and devices */
15ce96188bSSrinivas Kandagatla #define SLIM_CL_PER_SUPERFRAME		6144
16ce96188bSSrinivas Kandagatla #define SLIM_CL_PER_SUPERFRAME_DIV8	(SLIM_CL_PER_SUPERFRAME >> 3)
17ce96188bSSrinivas Kandagatla 
18afbdcc7cSSagar Dharia /* SLIMbus message types. Related to interpretation of message code. */
19afbdcc7cSSagar Dharia #define SLIM_MSG_MT_CORE			0x0
20*917809e2SSrinivas Kandagatla #define SLIM_MSG_MT_DEST_REFERRED_USER		0x2
21*917809e2SSrinivas Kandagatla #define SLIM_MSG_MT_SRC_REFERRED_USER		0x6
22afbdcc7cSSagar Dharia 
23ce96188bSSrinivas Kandagatla /*
24ce96188bSSrinivas Kandagatla  * SLIM Broadcast header format
25ce96188bSSrinivas Kandagatla  * BYTE 0: MT[7:5] RL[4:0]
26ce96188bSSrinivas Kandagatla  * BYTE 1: RSVD[7] MC[6:0]
27ce96188bSSrinivas Kandagatla  * BYTE 2: RSVD[7:6] DT[5:4] PI[3:0]
28ce96188bSSrinivas Kandagatla  */
29ce96188bSSrinivas Kandagatla #define SLIM_MSG_MT_MASK	GENMASK(2, 0)
30ce96188bSSrinivas Kandagatla #define SLIM_MSG_MT_SHIFT	5
31ce96188bSSrinivas Kandagatla #define SLIM_MSG_RL_MASK	GENMASK(4, 0)
32ce96188bSSrinivas Kandagatla #define SLIM_MSG_RL_SHIFT	0
33ce96188bSSrinivas Kandagatla #define SLIM_MSG_MC_MASK	GENMASK(6, 0)
34ce96188bSSrinivas Kandagatla #define SLIM_MSG_MC_SHIFT	0
35ce96188bSSrinivas Kandagatla #define SLIM_MSG_DT_MASK	GENMASK(1, 0)
36ce96188bSSrinivas Kandagatla #define SLIM_MSG_DT_SHIFT	4
37ce96188bSSrinivas Kandagatla 
38ce96188bSSrinivas Kandagatla #define SLIM_HEADER_GET_MT(b)	((b >> SLIM_MSG_MT_SHIFT) & SLIM_MSG_MT_MASK)
39ce96188bSSrinivas Kandagatla #define SLIM_HEADER_GET_RL(b)	((b >> SLIM_MSG_RL_SHIFT) & SLIM_MSG_RL_MASK)
40ce96188bSSrinivas Kandagatla #define SLIM_HEADER_GET_MC(b)	((b >> SLIM_MSG_MC_SHIFT) & SLIM_MSG_MC_MASK)
41ce96188bSSrinivas Kandagatla #define SLIM_HEADER_GET_DT(b)	((b >> SLIM_MSG_DT_SHIFT) & SLIM_MSG_DT_MASK)
42ce96188bSSrinivas Kandagatla 
43ce96188bSSrinivas Kandagatla /* Device management messages used by this framework */
44ce96188bSSrinivas Kandagatla #define SLIM_MSG_MC_REPORT_PRESENT               0x1
45ce96188bSSrinivas Kandagatla #define SLIM_MSG_MC_ASSIGN_LOGICAL_ADDRESS       0x2
46ce96188bSSrinivas Kandagatla #define SLIM_MSG_MC_REPORT_ABSENT                0xF
47ce96188bSSrinivas Kandagatla 
484b14e62aSSagar Dharia /* Clock pause Reconfiguration messages */
494b14e62aSSagar Dharia #define SLIM_MSG_MC_BEGIN_RECONFIGURATION        0x40
504b14e62aSSagar Dharia #define SLIM_MSG_MC_NEXT_PAUSE_CLOCK             0x4A
514b14e62aSSagar Dharia #define SLIM_MSG_MC_RECONFIGURE_NOW              0x5F
524b14e62aSSagar Dharia 
53*917809e2SSrinivas Kandagatla /*
54*917809e2SSrinivas Kandagatla  * Clock pause flag to indicate that the reconfig message
55*917809e2SSrinivas Kandagatla  * corresponds to clock pause sequence
56*917809e2SSrinivas Kandagatla  */
57*917809e2SSrinivas Kandagatla #define SLIM_MSG_CLK_PAUSE_SEQ_FLG		(1U << 8)
58*917809e2SSrinivas Kandagatla 
594b14e62aSSagar Dharia /* Clock pause values per SLIMbus spec */
604b14e62aSSagar Dharia #define SLIM_CLK_FAST				0
614b14e62aSSagar Dharia #define SLIM_CLK_CONST_PHASE			1
624b14e62aSSagar Dharia #define SLIM_CLK_UNSPECIFIED			2
634b14e62aSSagar Dharia 
64afbdcc7cSSagar Dharia /* Destination type Values */
65afbdcc7cSSagar Dharia #define SLIM_MSG_DEST_LOGICALADDR	0
66afbdcc7cSSagar Dharia #define SLIM_MSG_DEST_ENUMADDR		1
67afbdcc7cSSagar Dharia #define	SLIM_MSG_DEST_BROADCAST		3
68afbdcc7cSSagar Dharia 
6946a2bb5aSSagar Dharia /* Standard values per SLIMbus spec needed by controllers and devices */
7046a2bb5aSSagar Dharia #define SLIM_MAX_CLK_GEAR		10
7146a2bb5aSSagar Dharia #define SLIM_MIN_CLK_GEAR		1
7246a2bb5aSSagar Dharia 
7346a2bb5aSSagar Dharia /* Manager's logical address is set to 0xFF per spec */
7446a2bb5aSSagar Dharia #define SLIM_LA_MANAGER 0xFF
7546a2bb5aSSagar Dharia 
76afbdcc7cSSagar Dharia #define SLIM_MAX_TIDS			256
7746a2bb5aSSagar Dharia /**
7846a2bb5aSSagar Dharia  * struct slim_framer - Represents SLIMbus framer.
7946a2bb5aSSagar Dharia  * Every controller may have multiple framers. There is 1 active framer device
8046a2bb5aSSagar Dharia  * responsible for clocking the bus.
8146a2bb5aSSagar Dharia  * Manager is responsible for framer hand-over.
8246a2bb5aSSagar Dharia  * @dev: Driver model representation of the device.
8346a2bb5aSSagar Dharia  * @e_addr: Enumeration address of the framer.
8446a2bb5aSSagar Dharia  * @rootfreq: Root Frequency at which the framer can run. This is maximum
8546a2bb5aSSagar Dharia  *	frequency ('clock gear 10') at which the bus can operate.
8646a2bb5aSSagar Dharia  * @superfreq: Superframes per root frequency. Every frame is 6144 bits.
8746a2bb5aSSagar Dharia  */
8846a2bb5aSSagar Dharia struct slim_framer {
8946a2bb5aSSagar Dharia 	struct device		dev;
9046a2bb5aSSagar Dharia 	struct slim_eaddr	e_addr;
9146a2bb5aSSagar Dharia 	int			rootfreq;
9246a2bb5aSSagar Dharia 	int			superfreq;
9346a2bb5aSSagar Dharia };
9446a2bb5aSSagar Dharia 
9546a2bb5aSSagar Dharia #define to_slim_framer(d) container_of(d, struct slim_framer, dev)
9646a2bb5aSSagar Dharia 
9746a2bb5aSSagar Dharia /**
98afbdcc7cSSagar Dharia  * struct slim_msg_txn - Message to be sent by the controller.
99afbdcc7cSSagar Dharia  *			This structure has packet header,
100afbdcc7cSSagar Dharia  *			payload and buffer to be filled (if any)
101afbdcc7cSSagar Dharia  * @rl: Header field. remaining length.
102afbdcc7cSSagar Dharia  * @mt: Header field. Message type.
103afbdcc7cSSagar Dharia  * @mc: Header field. LSB is message code for type mt.
104afbdcc7cSSagar Dharia  * @dt: Header field. Destination type.
105afbdcc7cSSagar Dharia  * @ec: Element code. Used for elemental access APIs.
106afbdcc7cSSagar Dharia  * @tid: Transaction ID. Used for messages expecting response.
107afbdcc7cSSagar Dharia  *	(relevant for message-codes involving read operation)
108afbdcc7cSSagar Dharia  * @la: Logical address of the device this message is going to.
109afbdcc7cSSagar Dharia  *	(Not used when destination type is broadcast.)
110afbdcc7cSSagar Dharia  * @msg: Elemental access message to be read/written
111afbdcc7cSSagar Dharia  * @comp: completion if read/write is synchronous, used internally
112afbdcc7cSSagar Dharia  *	for tid based transactions.
113afbdcc7cSSagar Dharia  */
114afbdcc7cSSagar Dharia struct slim_msg_txn {
115afbdcc7cSSagar Dharia 	u8			rl;
116afbdcc7cSSagar Dharia 	u8			mt;
117afbdcc7cSSagar Dharia 	u8			mc;
118afbdcc7cSSagar Dharia 	u8			dt;
119afbdcc7cSSagar Dharia 	u16			ec;
120afbdcc7cSSagar Dharia 	u8			tid;
121afbdcc7cSSagar Dharia 	u8			la;
122afbdcc7cSSagar Dharia 	struct slim_val_inf	*msg;
123afbdcc7cSSagar Dharia 	struct	completion	*comp;
124afbdcc7cSSagar Dharia };
125afbdcc7cSSagar Dharia 
126afbdcc7cSSagar Dharia /* Frequently used message transaction structures */
127afbdcc7cSSagar Dharia #define DEFINE_SLIM_LDEST_TXN(name, mc, rl, la, msg) \
128afbdcc7cSSagar Dharia 	struct slim_msg_txn name = { rl, 0, mc, SLIM_MSG_DEST_LOGICALADDR, 0,\
129afbdcc7cSSagar Dharia 					0, la, msg, }
1304b14e62aSSagar Dharia 
1314b14e62aSSagar Dharia #define DEFINE_SLIM_BCAST_TXN(name, mc, rl, la, msg) \
1324b14e62aSSagar Dharia 	struct slim_msg_txn name = { rl, 0, mc, SLIM_MSG_DEST_BROADCAST, 0,\
1334b14e62aSSagar Dharia 					0, la, msg, }
134ce96188bSSrinivas Kandagatla 
135ce96188bSSrinivas Kandagatla #define DEFINE_SLIM_EDEST_TXN(name, mc, rl, la, msg) \
136ce96188bSSrinivas Kandagatla 	struct slim_msg_txn name = { rl, 0, mc, SLIM_MSG_DEST_ENUMADDR, 0,\
137ce96188bSSrinivas Kandagatla 					0, la, msg, }
1384b14e62aSSagar Dharia /**
1394b14e62aSSagar Dharia  * enum slim_clk_state: SLIMbus controller's clock state used internally for
1404b14e62aSSagar Dharia  *	maintaining current clock state.
1414b14e62aSSagar Dharia  * @SLIM_CLK_ACTIVE: SLIMbus clock is active
1424b14e62aSSagar Dharia  * @SLIM_CLK_ENTERING_PAUSE: SLIMbus clock pause sequence is being sent on the
1434b14e62aSSagar Dharia  *	bus. If this succeeds, state changes to SLIM_CLK_PAUSED. If the
1444b14e62aSSagar Dharia  *	transition fails, state changes back to SLIM_CLK_ACTIVE
1454b14e62aSSagar Dharia  * @SLIM_CLK_PAUSED: SLIMbus controller clock has paused.
1464b14e62aSSagar Dharia  */
1474b14e62aSSagar Dharia enum slim_clk_state {
1484b14e62aSSagar Dharia 	SLIM_CLK_ACTIVE,
1494b14e62aSSagar Dharia 	SLIM_CLK_ENTERING_PAUSE,
1504b14e62aSSagar Dharia 	SLIM_CLK_PAUSED,
1514b14e62aSSagar Dharia };
1524b14e62aSSagar Dharia 
1534b14e62aSSagar Dharia /**
1544b14e62aSSagar Dharia  * struct slim_sched: Framework uses this structure internally for scheduling.
1554b14e62aSSagar Dharia  * @clk_state: Controller's clock state from enum slim_clk_state
1564b14e62aSSagar Dharia  * @pause_comp: Signals completion of clock pause sequence. This is useful when
1574b14e62aSSagar Dharia  *	client tries to call SLIMbus transaction when controller is entering
1584b14e62aSSagar Dharia  *	clock pause.
1594b14e62aSSagar Dharia  * @m_reconf: This mutex is held until current reconfiguration (data channel
1604b14e62aSSagar Dharia  *	scheduling, message bandwidth reservation) is done. Message APIs can
1614b14e62aSSagar Dharia  *	use the bus concurrently when this mutex is held since elemental access
1624b14e62aSSagar Dharia  *	messages can be sent on the bus when reconfiguration is in progress.
1634b14e62aSSagar Dharia  */
1644b14e62aSSagar Dharia struct slim_sched {
1654b14e62aSSagar Dharia 	enum slim_clk_state	clk_state;
1664b14e62aSSagar Dharia 	struct completion	pause_comp;
1674b14e62aSSagar Dharia 	struct mutex		m_reconf;
1684b14e62aSSagar Dharia };
1694b14e62aSSagar Dharia 
170afbdcc7cSSagar Dharia /**
17146a2bb5aSSagar Dharia  * struct slim_controller  - Controls every instance of SLIMbus
17246a2bb5aSSagar Dharia  *				(similar to 'master' on SPI)
17346a2bb5aSSagar Dharia  * @dev: Device interface to this driver
17446a2bb5aSSagar Dharia  * @id: Board-specific number identifier for this controller/bus
17546a2bb5aSSagar Dharia  * @name: Name for this controller
17646a2bb5aSSagar Dharia  * @min_cg: Minimum clock gear supported by this controller (default value: 1)
17746a2bb5aSSagar Dharia  * @max_cg: Maximum clock gear supported by this controller (default value: 10)
17846a2bb5aSSagar Dharia  * @clkgear: Current clock gear in which this bus is running
17946a2bb5aSSagar Dharia  * @laddr_ida: logical address id allocator
18046a2bb5aSSagar Dharia  * @a_framer: Active framer which is clocking the bus managed by this controller
18146a2bb5aSSagar Dharia  * @lock: Mutex protecting controller data structures
18246a2bb5aSSagar Dharia  * @devices: Slim device list
18346a2bb5aSSagar Dharia  * @tid_idr: tid id allocator
18446a2bb5aSSagar Dharia  * @txn_lock: Lock to protect table of transactions
1854b14e62aSSagar Dharia  * @sched: scheduler structure used by the controller
186afbdcc7cSSagar Dharia  * @xfer_msg: Transfer a message on this controller (this can be a broadcast
187afbdcc7cSSagar Dharia  *	control/status message like data channel setup, or a unicast message
188afbdcc7cSSagar Dharia  *	like value element read/write.
18946a2bb5aSSagar Dharia  * @set_laddr: Setup logical address at laddr for the slave with elemental
19046a2bb5aSSagar Dharia  *	address e_addr. Drivers implementing controller will be expected to
19146a2bb5aSSagar Dharia  *	send unicast message to this device with its logical address.
19246a2bb5aSSagar Dharia  * @get_laddr: It is possible that controller needs to set fixed logical
19346a2bb5aSSagar Dharia  *	address table and get_laddr can be used in that case so that controller
19446a2bb5aSSagar Dharia  *	can do this assignment. Use case is when the master is on the remote
19546a2bb5aSSagar Dharia  *	processor side, who is resposible for allocating laddr.
1964b14e62aSSagar Dharia  * @wakeup: This function pointer implements controller-specific procedure
1974b14e62aSSagar Dharia  *	to wake it up from clock-pause. Framework will call this to bring
1984b14e62aSSagar Dharia  *	the controller out of clock pause.
19946a2bb5aSSagar Dharia  *
20046a2bb5aSSagar Dharia  *	'Manager device' is responsible for  device management, bandwidth
20146a2bb5aSSagar Dharia  *	allocation, channel setup, and port associations per channel.
20246a2bb5aSSagar Dharia  *	Device management means Logical address assignment/removal based on
20346a2bb5aSSagar Dharia  *	enumeration (report-present, report-absent) of a device.
20446a2bb5aSSagar Dharia  *	Bandwidth allocation is done dynamically by the manager based on active
20546a2bb5aSSagar Dharia  *	channels on the bus, message-bandwidth requests made by SLIMbus devices.
20646a2bb5aSSagar Dharia  *	Based on current bandwidth usage, manager chooses a frequency to run
20746a2bb5aSSagar Dharia  *	the bus at (in steps of 'clock-gear', 1 through 10, each clock gear
20846a2bb5aSSagar Dharia  *	representing twice the frequency than the previous gear).
20946a2bb5aSSagar Dharia  *	Manager is also responsible for entering (and exiting) low-power-mode
21046a2bb5aSSagar Dharia  *	(known as 'clock pause').
21146a2bb5aSSagar Dharia  *	Manager can do handover of framer if there are multiple framers on the
21246a2bb5aSSagar Dharia  *	bus and a certain usecase warrants using certain framer to avoid keeping
21346a2bb5aSSagar Dharia  *	previous framer being powered-on.
21446a2bb5aSSagar Dharia  *
21546a2bb5aSSagar Dharia  *	Controller here performs duties of the manager device, and 'interface
21646a2bb5aSSagar Dharia  *	device'. Interface device is responsible for monitoring the bus and
21746a2bb5aSSagar Dharia  *	reporting information such as loss-of-synchronization, data
21846a2bb5aSSagar Dharia  *	slot-collision.
21946a2bb5aSSagar Dharia  */
22046a2bb5aSSagar Dharia struct slim_controller {
22146a2bb5aSSagar Dharia 	struct device		*dev;
22246a2bb5aSSagar Dharia 	unsigned int		id;
22346a2bb5aSSagar Dharia 	char			name[SLIMBUS_NAME_SIZE];
22446a2bb5aSSagar Dharia 	int			min_cg;
22546a2bb5aSSagar Dharia 	int			max_cg;
22646a2bb5aSSagar Dharia 	int			clkgear;
22746a2bb5aSSagar Dharia 	struct ida		laddr_ida;
22846a2bb5aSSagar Dharia 	struct slim_framer	*a_framer;
22946a2bb5aSSagar Dharia 	struct mutex		lock;
23046a2bb5aSSagar Dharia 	struct list_head	devices;
23146a2bb5aSSagar Dharia 	struct idr		tid_idr;
23246a2bb5aSSagar Dharia 	spinlock_t		txn_lock;
2334b14e62aSSagar Dharia 	struct slim_sched	sched;
234afbdcc7cSSagar Dharia 	int			(*xfer_msg)(struct slim_controller *ctrl,
235afbdcc7cSSagar Dharia 					    struct slim_msg_txn *tx);
23646a2bb5aSSagar Dharia 	int			(*set_laddr)(struct slim_controller *ctrl,
23746a2bb5aSSagar Dharia 					     struct slim_eaddr *ea, u8 laddr);
23846a2bb5aSSagar Dharia 	int			(*get_laddr)(struct slim_controller *ctrl,
23946a2bb5aSSagar Dharia 					     struct slim_eaddr *ea, u8 *laddr);
2404b14e62aSSagar Dharia 	int			(*wakeup)(struct slim_controller *ctrl);
24146a2bb5aSSagar Dharia };
24246a2bb5aSSagar Dharia 
24346a2bb5aSSagar Dharia int slim_device_report_present(struct slim_controller *ctrl,
24446a2bb5aSSagar Dharia 			       struct slim_eaddr *e_addr, u8 *laddr);
24546a2bb5aSSagar Dharia void slim_report_absent(struct slim_device *sbdev);
24646a2bb5aSSagar Dharia int slim_register_controller(struct slim_controller *ctrl);
24746a2bb5aSSagar Dharia int slim_unregister_controller(struct slim_controller *ctrl);
248afbdcc7cSSagar Dharia void slim_msg_response(struct slim_controller *ctrl, u8 *reply, u8 tid, u8 l);
249afbdcc7cSSagar Dharia int slim_do_transfer(struct slim_controller *ctrl, struct slim_msg_txn *txn);
2504b14e62aSSagar Dharia int slim_ctrl_clk_pause(struct slim_controller *ctrl, bool wakeup, u8 restart);
251d3062a21SSrinivas Kandagatla int slim_alloc_txn_tid(struct slim_controller *ctrl, struct slim_msg_txn *txn);
252d3062a21SSrinivas Kandagatla void slim_free_txn_tid(struct slim_controller *ctrl, struct slim_msg_txn *txn);
25346a2bb5aSSagar Dharia 
254afbdcc7cSSagar Dharia static inline bool slim_tid_txn(u8 mt, u8 mc)
255afbdcc7cSSagar Dharia {
256afbdcc7cSSagar Dharia 	return (mt == SLIM_MSG_MT_CORE &&
257afbdcc7cSSagar Dharia 		(mc == SLIM_MSG_MC_REQUEST_INFORMATION ||
258afbdcc7cSSagar Dharia 		 mc == SLIM_MSG_MC_REQUEST_CLEAR_INFORMATION ||
259afbdcc7cSSagar Dharia 		 mc == SLIM_MSG_MC_REQUEST_VALUE ||
260afbdcc7cSSagar Dharia 		 mc == SLIM_MSG_MC_REQUEST_CLEAR_INFORMATION));
261afbdcc7cSSagar Dharia }
262afbdcc7cSSagar Dharia 
263afbdcc7cSSagar Dharia static inline bool slim_ec_txn(u8 mt, u8 mc)
264afbdcc7cSSagar Dharia {
265afbdcc7cSSagar Dharia 	return (mt == SLIM_MSG_MT_CORE &&
266afbdcc7cSSagar Dharia 		((mc >= SLIM_MSG_MC_REQUEST_INFORMATION &&
267afbdcc7cSSagar Dharia 		  mc <= SLIM_MSG_MC_REPORT_INFORMATION) ||
268afbdcc7cSSagar Dharia 		 (mc >= SLIM_MSG_MC_REQUEST_VALUE &&
269afbdcc7cSSagar Dharia 		  mc <= SLIM_MSG_MC_CHANGE_VALUE)));
270afbdcc7cSSagar Dharia }
27146a2bb5aSSagar Dharia #endif /* _LINUX_SLIMBUS_H */
272