1 /* 2 * IRQ chip definitions for INTC IRQs. 3 * 4 * Copyright (C) 2007, 2008 Magnus Damm 5 * Copyright (C) 2009, 2010 Paul Mundt 6 * 7 * This file is subject to the terms and conditions of the GNU General Public 8 * License. See the file "COPYING" in the main directory of this archive 9 * for more details. 10 */ 11 #include <linux/cpumask.h> 12 #include <linux/io.h> 13 #include "internals.h" 14 15 void _intc_enable(struct irq_data *data, unsigned long handle) 16 { 17 unsigned int irq = data->irq; 18 struct intc_desc_int *d = get_intc_desc(irq); 19 unsigned long addr; 20 unsigned int cpu; 21 22 for (cpu = 0; cpu < SMP_NR(d, _INTC_ADDR_E(handle)); cpu++) { 23 #ifdef CONFIG_SMP 24 if (!cpumask_test_cpu(cpu, data->affinity)) 25 continue; 26 #endif 27 addr = INTC_REG(d, _INTC_ADDR_E(handle), cpu); 28 intc_enable_fns[_INTC_MODE(handle)](addr, handle, intc_reg_fns\ 29 [_INTC_FN(handle)], irq); 30 } 31 32 intc_balancing_enable(irq); 33 } 34 35 static void intc_enable(struct irq_data *data) 36 { 37 _intc_enable(data, (unsigned long)irq_data_get_irq_chip_data(data)); 38 } 39 40 static void intc_disable(struct irq_data *data) 41 { 42 unsigned int irq = data->irq; 43 struct intc_desc_int *d = get_intc_desc(irq); 44 unsigned long handle = (unsigned long)irq_data_get_irq_chip_data(data); 45 unsigned long addr; 46 unsigned int cpu; 47 48 intc_balancing_disable(irq); 49 50 for (cpu = 0; cpu < SMP_NR(d, _INTC_ADDR_D(handle)); cpu++) { 51 #ifdef CONFIG_SMP 52 if (!cpumask_test_cpu(cpu, data->affinity)) 53 continue; 54 #endif 55 addr = INTC_REG(d, _INTC_ADDR_D(handle), cpu); 56 intc_disable_fns[_INTC_MODE(handle)](addr, handle,intc_reg_fns\ 57 [_INTC_FN(handle)], irq); 58 } 59 } 60 61 #ifdef CONFIG_SMP 62 /* 63 * This is held with the irq desc lock held, so we don't require any 64 * additional locking here at the intc desc level. The affinity mask is 65 * later tested in the enable/disable paths. 66 */ 67 static int intc_set_affinity(struct irq_data *data, 68 const struct cpumask *cpumask, 69 bool force) 70 { 71 if (!cpumask_intersects(cpumask, cpu_online_mask)) 72 return -1; 73 74 cpumask_copy(data->affinity, cpumask); 75 76 return IRQ_SET_MASK_OK_NOCOPY; 77 } 78 #endif 79 80 static void intc_mask_ack(struct irq_data *data) 81 { 82 unsigned int irq = data->irq; 83 struct intc_desc_int *d = get_intc_desc(irq); 84 unsigned long handle = intc_get_ack_handle(irq); 85 unsigned long addr; 86 87 intc_disable(data); 88 89 /* read register and write zero only to the associated bit */ 90 if (handle) { 91 unsigned int value; 92 93 addr = INTC_REG(d, _INTC_ADDR_D(handle), 0); 94 value = intc_set_field_from_handle(0, 1, handle); 95 96 switch (_INTC_FN(handle)) { 97 case REG_FN_MODIFY_BASE + 0: /* 8bit */ 98 __raw_readb(addr); 99 __raw_writeb(0xff ^ value, addr); 100 break; 101 case REG_FN_MODIFY_BASE + 1: /* 16bit */ 102 __raw_readw(addr); 103 __raw_writew(0xffff ^ value, addr); 104 break; 105 case REG_FN_MODIFY_BASE + 3: /* 32bit */ 106 __raw_readl(addr); 107 __raw_writel(0xffffffff ^ value, addr); 108 break; 109 default: 110 BUG(); 111 break; 112 } 113 } 114 } 115 116 static struct intc_handle_int *intc_find_irq(struct intc_handle_int *hp, 117 unsigned int nr_hp, 118 unsigned int irq) 119 { 120 int i; 121 122 /* 123 * this doesn't scale well, but... 124 * 125 * this function should only be used for cerain uncommon 126 * operations such as intc_set_priority() and intc_set_type() 127 * and in those rare cases performance doesn't matter that much. 128 * keeping the memory footprint low is more important. 129 * 130 * one rather simple way to speed this up and still keep the 131 * memory footprint down is to make sure the array is sorted 132 * and then perform a bisect to lookup the irq. 133 */ 134 for (i = 0; i < nr_hp; i++) { 135 if ((hp + i)->irq != irq) 136 continue; 137 138 return hp + i; 139 } 140 141 return NULL; 142 } 143 144 int intc_set_priority(unsigned int irq, unsigned int prio) 145 { 146 struct intc_desc_int *d = get_intc_desc(irq); 147 struct irq_data *data = irq_get_irq_data(irq); 148 struct intc_handle_int *ihp; 149 150 if (!intc_get_prio_level(irq) || prio <= 1) 151 return -EINVAL; 152 153 ihp = intc_find_irq(d->prio, d->nr_prio, irq); 154 if (ihp) { 155 if (prio >= (1 << _INTC_WIDTH(ihp->handle))) 156 return -EINVAL; 157 158 intc_set_prio_level(irq, prio); 159 160 /* 161 * only set secondary masking method directly 162 * primary masking method is using intc_prio_level[irq] 163 * priority level will be set during next enable() 164 */ 165 if (_INTC_FN(ihp->handle) != REG_FN_ERR) 166 _intc_enable(data, ihp->handle); 167 } 168 return 0; 169 } 170 171 #define SENSE_VALID_FLAG 0x80 172 #define VALID(x) (x | SENSE_VALID_FLAG) 173 174 static unsigned char intc_irq_sense_table[IRQ_TYPE_SENSE_MASK + 1] = { 175 [IRQ_TYPE_EDGE_FALLING] = VALID(0), 176 [IRQ_TYPE_EDGE_RISING] = VALID(1), 177 [IRQ_TYPE_LEVEL_LOW] = VALID(2), 178 /* SH7706, SH7707 and SH7709 do not support high level triggered */ 179 #if !defined(CONFIG_CPU_SUBTYPE_SH7706) && \ 180 !defined(CONFIG_CPU_SUBTYPE_SH7707) && \ 181 !defined(CONFIG_CPU_SUBTYPE_SH7709) 182 [IRQ_TYPE_LEVEL_HIGH] = VALID(3), 183 #endif 184 #if defined(CONFIG_ARM) /* all recent SH-Mobile / R-Mobile ARM support this */ 185 [IRQ_TYPE_EDGE_BOTH] = VALID(4), 186 #endif 187 }; 188 189 static int intc_set_type(struct irq_data *data, unsigned int type) 190 { 191 unsigned int irq = data->irq; 192 struct intc_desc_int *d = get_intc_desc(irq); 193 unsigned char value = intc_irq_sense_table[type & IRQ_TYPE_SENSE_MASK]; 194 struct intc_handle_int *ihp; 195 unsigned long addr; 196 197 if (!value) 198 return -EINVAL; 199 200 value &= ~SENSE_VALID_FLAG; 201 202 ihp = intc_find_irq(d->sense, d->nr_sense, irq); 203 if (ihp) { 204 /* PINT has 2-bit sense registers, should fail on EDGE_BOTH */ 205 if (value >= (1 << _INTC_WIDTH(ihp->handle))) 206 return -EINVAL; 207 208 addr = INTC_REG(d, _INTC_ADDR_E(ihp->handle), 0); 209 intc_reg_fns[_INTC_FN(ihp->handle)](addr, ihp->handle, value); 210 } 211 212 return 0; 213 } 214 215 struct irq_chip intc_irq_chip = { 216 .irq_mask = intc_disable, 217 .irq_unmask = intc_enable, 218 .irq_mask_ack = intc_mask_ack, 219 .irq_enable = intc_enable, 220 .irq_disable = intc_disable, 221 .irq_set_type = intc_set_type, 222 #ifdef CONFIG_SMP 223 .irq_set_affinity = intc_set_affinity, 224 #endif 225 .flags = IRQCHIP_SKIP_SET_WAKE, 226 }; 227