1b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */ 248a31030SOndrej Zary #ifndef _WD719X_H_ 348a31030SOndrej Zary #define _WD719X_H_ 448a31030SOndrej Zary 548a31030SOndrej Zary #define WD719X_SG 255 /* Scatter/gather size */ 648a31030SOndrej Zary 748a31030SOndrej Zary struct wd719x_sglist { 848a31030SOndrej Zary __le32 ptr; 948a31030SOndrej Zary __le32 length; 1048a31030SOndrej Zary } __packed; 1148a31030SOndrej Zary 1248a31030SOndrej Zary enum wd719x_card_type { 1348a31030SOndrej Zary WD719X_TYPE_UNKNOWN = 0, 1448a31030SOndrej Zary WD719X_TYPE_7193, 1548a31030SOndrej Zary WD719X_TYPE_7197, 1648a31030SOndrej Zary WD719X_TYPE_7296, 1748a31030SOndrej Zary }; 1848a31030SOndrej Zary 1948a31030SOndrej Zary union wd719x_regs { 2048a31030SOndrej Zary __le32 all; /* All Status at once */ 2148a31030SOndrej Zary struct { 2248a31030SOndrej Zary u8 OPC; /* Opcode register */ 2348a31030SOndrej Zary u8 SCSI; /* SCSI Errors */ 2448a31030SOndrej Zary u8 SUE; /* Spider unique Errors */ 2548a31030SOndrej Zary u8 INT; /* Interrupt Status */ 2648a31030SOndrej Zary } bytes; 2748a31030SOndrej Zary }; 2848a31030SOndrej Zary 2948a31030SOndrej Zary /* Spider Command Block (SCB) */ 3048a31030SOndrej Zary struct wd719x_scb { 3148a31030SOndrej Zary __le32 Int_SCB; /* 00-03 Internal SCB link pointer (must be cleared) */ 3248a31030SOndrej Zary u8 SCB_opcode; /* 04 SCB Command opcode */ 3348a31030SOndrej Zary u8 CDB_tag; /* 05 SCSI Tag byte for CDB queues (0 if untagged) */ 3448a31030SOndrej Zary u8 lun; /* 06 SCSI LUN */ 3548a31030SOndrej Zary u8 devid; /* 07 SCSI Device ID */ 3648a31030SOndrej Zary u8 CDB[16]; /* 08-23 SCSI CDB (16 bytes as defined by ANSI spec. */ 3748a31030SOndrej Zary __le32 data_p; /* 24-27 Data transfer address (or SG list address) */ 3848a31030SOndrej Zary __le32 data_length; /* 28-31 Data transfer Length (or SG list length) */ 3948a31030SOndrej Zary __le32 CDB_link; /* 32-35 SCSI CDB Link Ptr */ 4048a31030SOndrej Zary __le32 sense_buf; /* 36-39 Auto request sense buffer address */ 4148a31030SOndrej Zary u8 sense_buf_length;/* 40 Auto request sense transfer length */ 4248a31030SOndrej Zary u8 reserved; /* 41 reserved */ 4348a31030SOndrej Zary u8 SCB_options; /* 42 SCB-options */ 4448a31030SOndrej Zary u8 SCB_tag_msg; /* 43 Tagged messages options */ 4548a31030SOndrej Zary /* Not filled in by host */ 4648a31030SOndrej Zary __le32 req_ptr; /* 44-47 Ptr to Host Request returned on interrupt */ 4748a31030SOndrej Zary u8 host_opcode; /* 48 Host Command Opcode (same as AMR_00) */ 4848a31030SOndrej Zary u8 scsi_stat; /* 49 SCSI Status returned */ 4948a31030SOndrej Zary u8 ret_error; /* 50 SPIDER Unique Error Code returned (SUE) */ 5048a31030SOndrej Zary u8 int_stat; /* 51 Message u8 / Interrupt Status byte returned */ 5148a31030SOndrej Zary __le32 transferred; /* 52-55 Bytes Transferred */ 5248a31030SOndrej Zary u8 last_trans[3]; /* 56-58 Bytes Transferred in last session */ 5348a31030SOndrej Zary u8 length; /* 59 SCSI Messages Length (1-8) */ 5448a31030SOndrej Zary u8 sync_offset; /* 60 Synchronous offset */ 5548a31030SOndrej Zary u8 sync_rate; /* 61 Synchronous rate */ 5648a31030SOndrej Zary u8 flags[2]; /* 62-63 SCB specific flags (local to each thread) */ 5748a31030SOndrej Zary /* everything below is for driver use (not used by card) */ 5848a31030SOndrej Zary dma_addr_t phys; /* bus address of the SCB */ 59*70d1b920SBart Van Assche dma_addr_t dma_handle; 6048a31030SOndrej Zary struct scsi_cmnd *cmd; /* a copy of the pointer we were passed */ 6148a31030SOndrej Zary struct list_head list; 6248a31030SOndrej Zary struct wd719x_sglist sg_list[WD719X_SG] __aligned(8); /* SG list */ 6348a31030SOndrej Zary } __packed; 6448a31030SOndrej Zary 6548a31030SOndrej Zary struct wd719x { 6648a31030SOndrej Zary struct Scsi_Host *sh; /* pointer to host structure */ 6748a31030SOndrej Zary struct pci_dev *pdev; 6848a31030SOndrej Zary void __iomem *base; 6948a31030SOndrej Zary enum wd719x_card_type type; /* type of card */ 7048a31030SOndrej Zary void *fw_virt; /* firmware buffer CPU address */ 7148a31030SOndrej Zary dma_addr_t fw_phys; /* firmware buffer bus address */ 7248a31030SOndrej Zary size_t fw_size; /* firmware buffer size */ 7348a31030SOndrej Zary struct wd719x_host_param *params; /* host parameters (EEPROM) */ 7448a31030SOndrej Zary dma_addr_t params_phys; /* host parameters bus address */ 7548a31030SOndrej Zary void *hash_virt; /* hash table CPU address */ 7648a31030SOndrej Zary dma_addr_t hash_phys; /* hash table bus address */ 7748a31030SOndrej Zary struct list_head active_scbs; 7848a31030SOndrej Zary }; 7948a31030SOndrej Zary 8048a31030SOndrej Zary /* timeout delays in microsecs */ 8148a31030SOndrej Zary #define WD719X_WAIT_FOR_CMD_READY 500 8248a31030SOndrej Zary #define WD719X_WAIT_FOR_RISC 2000 8348a31030SOndrej Zary #define WD719X_WAIT_FOR_SCSI_RESET 3000000 8448a31030SOndrej Zary 8548a31030SOndrej Zary /* All commands except 0x00 generate an interrupt */ 8648a31030SOndrej Zary #define WD719X_CMD_READY 0x00 /* Command register ready (or noop) */ 8748a31030SOndrej Zary #define WD719X_CMD_INIT_RISC 0x01 /* Initialize RISC */ 8848a31030SOndrej Zary /* 0x02 is reserved */ 8948a31030SOndrej Zary #define WD719X_CMD_BUSRESET 0x03 /* Assert SCSI bus reset */ 9048a31030SOndrej Zary #define WD719X_CMD_READ_FIRMVER 0x04 /* Read the Firmware Revision */ 9148a31030SOndrej Zary #define WD719X_CMD_ECHO_BYTES 0x05 /* Echo command bytes (DW) */ 9248a31030SOndrej Zary /* 0x06 is reserved */ 9348a31030SOndrej Zary /* 0x07 is reserved */ 9448a31030SOndrej Zary #define WD719X_CMD_GET_PARAM 0x08 /* Get programmable parameters */ 9548a31030SOndrej Zary #define WD719X_CMD_SET_PARAM 0x09 /* Set programmable parameters */ 9648a31030SOndrej Zary #define WD719X_CMD_SLEEP 0x0a /* Put SPIDER to sleep */ 9748a31030SOndrej Zary #define WD719X_CMD_READ_INIT 0x0b /* Read initialization parameters */ 9848a31030SOndrej Zary #define WD719X_CMD_RESTORE_INIT 0x0c /* Restore initialization parameters */ 9948a31030SOndrej Zary /* 0x0d is reserved */ 10048a31030SOndrej Zary /* 0x0e is reserved */ 10148a31030SOndrej Zary /* 0x0f is reserved */ 10248a31030SOndrej Zary #define WD719X_CMD_ABORT_TAG 0x10 /* Send Abort tag message to target */ 10348a31030SOndrej Zary #define WD719X_CMD_ABORT 0x11 /* Send Abort message to target */ 10448a31030SOndrej Zary #define WD719X_CMD_RESET 0x12 /* Send Reset message to target */ 10548a31030SOndrej Zary #define WD719X_CMD_INIT_SCAM 0x13 /* Initiate SCAM */ 10648a31030SOndrej Zary #define WD719X_CMD_GET_SYNC 0x14 /* Get synchronous rates */ 10748a31030SOndrej Zary #define WD719X_CMD_SET_SYNC 0x15 /* Set synchronous rates */ 10848a31030SOndrej Zary #define WD719X_CMD_GET_WIDTH 0x16 /* Get SCSI bus width */ 10948a31030SOndrej Zary #define WD719X_CMD_SET_WIDTH 0x17 /* Set SCSI bus width */ 11048a31030SOndrej Zary #define WD719X_CMD_GET_TAGS 0x18 /* Get tag flags */ 11148a31030SOndrej Zary #define WD719X_CMD_SET_TAGS 0x19 /* Set tag flags */ 11248a31030SOndrej Zary #define WD719X_CMD_GET_PARAM2 0x1a /* Get programmable params (format 2) */ 11348a31030SOndrej Zary #define WD719X_CMD_SET_PARAM2 0x1b /* Set programmable params (format 2) */ 11448a31030SOndrej Zary /* Commands with request pointers (mailbox) */ 11548a31030SOndrej Zary #define WD719X_CMD_PROCESS_SCB 0x80 /* Process SCSI Control Block (SCB) */ 11648a31030SOndrej Zary /* No interrupt generated on acceptance of SCB pointer */ 11748a31030SOndrej Zary 11848a31030SOndrej Zary /* interrupt status defines */ 11948a31030SOndrej Zary #define WD719X_INT_NONE 0x00 /* No interrupt pending */ 12048a31030SOndrej Zary #define WD719X_INT_NOERRORS 0x01 /* Command completed with no errors */ 12148a31030SOndrej Zary #define WD719X_INT_LINKNOERRORS 0x02 /* link cmd completed with no errors */ 12248a31030SOndrej Zary #define WD719X_INT_LINKNOSTATUS 0x03 /* link cmd completed with no flag set */ 12348a31030SOndrej Zary #define WD719X_INT_ERRORSLOGGED 0x04 /* cmd completed with errors logged */ 12448a31030SOndrej Zary #define WD719X_INT_SPIDERFAILED 0x05 /* cmd failed without valid SCSI status */ 12548a31030SOndrej Zary #define WD719X_INT_BADINT 0x80 /* unsolicited interrupt */ 12648a31030SOndrej Zary #define WD719X_INT_PIOREADY 0xf0 /* data ready for PIO output */ 12748a31030SOndrej Zary 12848a31030SOndrej Zary /* Spider Unique Error Codes (SUE) */ 12948a31030SOndrej Zary #define WD719X_SUE_NOERRORS 0x00 /* No errors detected by SPIDER */ 13048a31030SOndrej Zary #define WD719X_SUE_REJECTED 0x01 /* Command Rejected (bad opcode/param) */ 13148a31030SOndrej Zary #define WD719X_SUE_SCBQFULL 0x02 /* SCB queue full */ 13248a31030SOndrej Zary /* 0x03 is reserved */ 13348a31030SOndrej Zary #define WD719X_SUE_TERM 0x04 /* Host terminated SCB via primative cmd */ 13448a31030SOndrej Zary #define WD719X_SUE_CHAN1PAR 0x05 /* PCI Channel 1 parity error occurred */ 13548a31030SOndrej Zary #define WD719X_SUE_CHAN1ABORT 0x06 /* PCI Channel 1 system abort occurred */ 13648a31030SOndrej Zary #define WD719X_SUE_CHAN23PAR 0x07 /* PCI Channel 2/3 parity error occurred */ 13748a31030SOndrej Zary #define WD719X_SUE_CHAN23ABORT 0x08 /* PCI Channel 2/3 system abort occurred */ 13848a31030SOndrej Zary #define WD719X_SUE_TIMEOUT 0x10 /* Selection/reselection timeout */ 13948a31030SOndrej Zary #define WD719X_SUE_RESET 0x11 /* SCSI bus reset occurred */ 14048a31030SOndrej Zary #define WD719X_SUE_BUSERROR 0x12 /* SCSI bus error */ 14148a31030SOndrej Zary #define WD719X_SUE_WRONGWAY 0x13 /* Wrong data transfer dir set by target */ 14248a31030SOndrej Zary #define WD719X_SUE_BADPHASE 0x14 /* SCSI phase illegal or unexpected */ 14348a31030SOndrej Zary #define WD719X_SUE_TOOLONG 0x15 /* target requested too much data */ 14448a31030SOndrej Zary #define WD719X_SUE_BUSFREE 0x16 /* Unexpected SCSI bus free */ 14548a31030SOndrej Zary #define WD719X_SUE_ARSDONE 0x17 /* Auto request sense executed */ 14648a31030SOndrej Zary #define WD719X_SUE_IGNORED 0x18 /* SCSI message was ignored by target */ 14748a31030SOndrej Zary #define WD719X_SUE_WRONGTAGS 0x19 /* Tagged SCB & tags off (or vice versa) */ 14848a31030SOndrej Zary #define WD719X_SUE_BADTAGS 0x1a /* Wrong tag message type for target */ 14948a31030SOndrej Zary #define WD719X_SUE_NOSCAMID 0x1b /* No SCAM soft ID available */ 15048a31030SOndrej Zary 15148a31030SOndrej Zary /* code sizes */ 15248a31030SOndrej Zary #define WD719X_HASH_TABLE_SIZE 4096 15348a31030SOndrej Zary 15448a31030SOndrej Zary /* Advanced Mode Registers */ 15548a31030SOndrej Zary /* Regs 0x00..0x1f are for Advanced Mode of the card (RISC is running). */ 15648a31030SOndrej Zary #define WD719X_AMR_COMMAND 0x00 15748a31030SOndrej Zary #define WD719X_AMR_CMD_PARAM 0x01 15848a31030SOndrej Zary #define WD719X_AMR_CMD_PARAM_2 0x02 15948a31030SOndrej Zary #define WD719X_AMR_CMD_PARAM_3 0x03 16048a31030SOndrej Zary #define WD719X_AMR_SCB_IN 0x04 16148a31030SOndrej Zary 16248a31030SOndrej Zary #define WD719X_AMR_BIOS_SHARE_INT 0x0f 16348a31030SOndrej Zary 16448a31030SOndrej Zary #define WD719X_AMR_SCB_OUT 0x18 16548a31030SOndrej Zary #define WD719X_AMR_OP_CODE 0x1c 16648a31030SOndrej Zary #define WD719X_AMR_SCSI_STATUS 0x1d 16748a31030SOndrej Zary #define WD719X_AMR_SCB_ERROR 0x1e 16848a31030SOndrej Zary #define WD719X_AMR_INT_STATUS 0x1f 16948a31030SOndrej Zary 17048a31030SOndrej Zary #define WD719X_DISABLE_INT 0x80 17148a31030SOndrej Zary 17248a31030SOndrej Zary /* SCB flags */ 17348a31030SOndrej Zary #define WD719X_SCB_FLAGS_CHECK_DIRECTION 0x01 17448a31030SOndrej Zary #define WD719X_SCB_FLAGS_PCI_TO_SCSI 0x02 17548a31030SOndrej Zary #define WD719X_SCB_FLAGS_AUTO_REQUEST_SENSE 0x10 17648a31030SOndrej Zary #define WD719X_SCB_FLAGS_DO_SCATTER_GATHER 0x20 17748a31030SOndrej Zary #define WD719X_SCB_FLAGS_NO_DISCONNECT 0x40 17848a31030SOndrej Zary 17948a31030SOndrej Zary /* PCI Registers used for reset, initial code download */ 18048a31030SOndrej Zary /* Regs 0x20..0x3f are for Normal (DOS) mode (RISC is asleep). */ 18148a31030SOndrej Zary #define WD719X_PCI_GPIO_CONTROL 0x3C 18248a31030SOndrej Zary #define WD719X_PCI_GPIO_DATA 0x3D 18348a31030SOndrej Zary #define WD719X_PCI_PORT_RESET 0x3E 18448a31030SOndrej Zary #define WD719X_PCI_MODE_SELECT 0x3F 18548a31030SOndrej Zary 18648a31030SOndrej Zary #define WD719X_PCI_EXTERNAL_ADDR 0x60 18748a31030SOndrej Zary #define WD719X_PCI_INTERNAL_ADDR 0x64 18848a31030SOndrej Zary #define WD719X_PCI_DMA_TRANSFER_SIZE 0x66 18948a31030SOndrej Zary #define WD719X_PCI_CHANNEL2_3CMD 0x68 19048a31030SOndrej Zary #define WD719X_PCI_CHANNEL2_3STATUS 0x69 19148a31030SOndrej Zary 19248a31030SOndrej Zary #define WD719X_GPIO_ID_BITS 0x0a 19348a31030SOndrej Zary #define WD719X_PRAM_BASE_ADDR 0x00 19448a31030SOndrej Zary 19548a31030SOndrej Zary /* codes written to or read from the card */ 19648a31030SOndrej Zary #define WD719X_PCI_RESET 0x01 19748a31030SOndrej Zary #define WD719X_ENABLE_ADVANCE_MODE 0x01 19848a31030SOndrej Zary 19948a31030SOndrej Zary #define WD719X_START_CHANNEL2_3DMA 0x17 20048a31030SOndrej Zary #define WD719X_START_CHANNEL2_3DONE 0x01 20148a31030SOndrej Zary #define WD719X_START_CHANNEL2_3ABORT 0x20 20248a31030SOndrej Zary 20348a31030SOndrej Zary /* 33C296 GPIO bits for EEPROM pins */ 20448a31030SOndrej Zary #define WD719X_EE_DI (1 << 1) 20548a31030SOndrej Zary #define WD719X_EE_CS (1 << 2) 20648a31030SOndrej Zary #define WD719X_EE_CLK (1 << 3) 20748a31030SOndrej Zary #define WD719X_EE_DO (1 << 4) 20848a31030SOndrej Zary 20948a31030SOndrej Zary /* EEPROM contents */ 21048a31030SOndrej Zary struct wd719x_eeprom_header { 21148a31030SOndrej Zary u8 sig1; 21248a31030SOndrej Zary u8 sig2; 21348a31030SOndrej Zary u8 version; 21448a31030SOndrej Zary u8 checksum; 21548a31030SOndrej Zary u8 cfg_offset; 21648a31030SOndrej Zary u8 cfg_size; 21748a31030SOndrej Zary u8 setup_offset; 21848a31030SOndrej Zary u8 setup_size; 21948a31030SOndrej Zary } __packed; 22048a31030SOndrej Zary 22148a31030SOndrej Zary #define WD719X_EE_SIG1 0 22248a31030SOndrej Zary #define WD719X_EE_SIG2 1 22348a31030SOndrej Zary #define WD719X_EE_VERSION 2 22448a31030SOndrej Zary #define WD719X_EE_CHECKSUM 3 22548a31030SOndrej Zary #define WD719X_EE_CFG_OFFSET 4 22648a31030SOndrej Zary #define WD719X_EE_CFG_SIZE 5 22748a31030SOndrej Zary #define WD719X_EE_SETUP_OFFSET 6 22848a31030SOndrej Zary #define WD719X_EE_SETUP_SIZE 7 22948a31030SOndrej Zary 23048a31030SOndrej Zary #define WD719X_EE_SCSI_ID_MASK 0xf 23148a31030SOndrej Zary 23248a31030SOndrej Zary /* SPIDER Host Parameters Block (=EEPROM configuration block) */ 23348a31030SOndrej Zary struct wd719x_host_param { 23448a31030SOndrej Zary u8 ch_1_th; /* FIFO threshold */ 23548a31030SOndrej Zary u8 scsi_conf; /* SCSI configuration */ 23648a31030SOndrej Zary u8 own_scsi_id; /* controller SCSI ID */ 23748a31030SOndrej Zary u8 sel_timeout; /* selection timeout*/ 23848a31030SOndrej Zary u8 sleep_timer; /* seep timer */ 23948a31030SOndrej Zary __le16 cdb_size;/* CDB size groups */ 24048a31030SOndrej Zary __le16 tag_en; /* Tag msg enables (ID 0-15) */ 24148a31030SOndrej Zary u8 scsi_pad; /* SCSI pad control */ 24248a31030SOndrej Zary __le32 wide; /* WIDE msg options (ID 0-15) */ 24348a31030SOndrej Zary __le32 sync; /* SYNC msg options (ID 0-15) */ 24448a31030SOndrej Zary u8 soft_mask; /* soft error mask */ 24548a31030SOndrej Zary u8 unsol_mask; /* unsolicited error mask */ 24648a31030SOndrej Zary } __packed; 24748a31030SOndrej Zary 24848a31030SOndrej Zary #endif /* _WD719X_H_ */ 249