177adf3f0SThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 2e84067d7SDuane Grigsby /* 3e84067d7SDuane Grigsby * QLogic Fibre Channel HBA Driver 4e84067d7SDuane Grigsby * Copyright (c) 2003-2017 QLogic Corporation 5e84067d7SDuane Grigsby */ 6e84067d7SDuane Grigsby #ifndef __QLA_NVME_H 7e84067d7SDuane Grigsby #define __QLA_NVME_H 8e84067d7SDuane Grigsby 9e84067d7SDuane Grigsby #include <uapi/scsi/fc/fc_fs.h> 10e84067d7SDuane Grigsby #include <uapi/scsi/fc/fc_els.h> 11e84067d7SDuane Grigsby #include <linux/nvme-fc-driver.h> 12e84067d7SDuane Grigsby 130f7e51f6Shimanshu.madhani@cavium.com #include "qla_def.h" 1415b7a68cSBart Van Assche #include "qla_dsd.h" 150f7e51f6Shimanshu.madhani@cavium.com 1665120de2SShreyas Deodhar #define MIN_NVME_HW_QUEUES 1 1765120de2SShreyas Deodhar #define DEF_NVME_HW_QUEUES 8 1865120de2SShreyas Deodhar 19e84067d7SDuane Grigsby #define NVME_ATIO_CMD_OFF 32 20e84067d7SDuane Grigsby #define NVME_FIRST_PACKET_CMDLEN (64 - NVME_ATIO_CMD_OFF) 21e84067d7SDuane Grigsby #define Q2T_NVME_NUM_TAGS 2048 22e84067d7SDuane Grigsby #define QLA_MAX_FC_SEGMENTS 64 23e84067d7SDuane Grigsby 24*875386b9SManish Rangankar struct qla_nvme_unsol_ctx; 250f7e51f6Shimanshu.madhani@cavium.com struct scsi_qla_host; 260f7e51f6Shimanshu.madhani@cavium.com struct qla_hw_data; 270f7e51f6Shimanshu.madhani@cavium.com struct req_que; 28e84067d7SDuane Grigsby struct srb; 290f7e51f6Shimanshu.madhani@cavium.com 30e84067d7SDuane Grigsby struct nvme_private { 31e84067d7SDuane Grigsby struct srb *sp; 32e84067d7SDuane Grigsby struct nvmefc_ls_req *fd; 33e84067d7SDuane Grigsby struct work_struct ls_work; 34e473b307SDarren Trapp struct work_struct abort_work; 35e84067d7SDuane Grigsby int comp_status; 364c2a2d01SQuinn Tran spinlock_t cmd_lock; 37e84067d7SDuane Grigsby }; 38e84067d7SDuane Grigsby 399dd9686bSDarren Trapp struct qla_nvme_rport { 40e84067d7SDuane Grigsby struct fc_port *fcport; 41*875386b9SManish Rangankar struct qla_nvme_unsol_ctx *uctx; 42e84067d7SDuane Grigsby }; 43e84067d7SDuane Grigsby 44e84067d7SDuane Grigsby #define COMMAND_NVME 0x88 /* Command Type FC-NVMe IOCB */ 45e84067d7SDuane Grigsby struct cmd_nvme { 46e84067d7SDuane Grigsby uint8_t entry_type; /* Entry type. */ 47e84067d7SDuane Grigsby uint8_t entry_count; /* Entry count. */ 48e84067d7SDuane Grigsby uint8_t sys_define; /* System defined. */ 49e84067d7SDuane Grigsby uint8_t entry_status; /* Entry Status. */ 50e84067d7SDuane Grigsby 51e84067d7SDuane Grigsby uint32_t handle; /* System handle. */ 5221038b09SBart Van Assche __le16 nport_handle; /* N_PORT handle. */ 5321038b09SBart Van Assche __le16 timeout; /* Command timeout. */ 54e84067d7SDuane Grigsby 5521038b09SBart Van Assche __le16 dseg_count; /* Data segment count. */ 5621038b09SBart Van Assche __le16 nvme_rsp_dsd_len; /* NVMe RSP DSD length */ 57e84067d7SDuane Grigsby 58e84067d7SDuane Grigsby uint64_t rsvd; 59e84067d7SDuane Grigsby 6021038b09SBart Van Assche __le16 control_flags; /* Control Flags */ 61cf3c54fbSSaurav Kashyap #define CF_ADMIN_ASYNC_EVENT BIT_13 6203aaa89fSDarren Trapp #define CF_NVME_FIRST_BURST_ENABLE BIT_11 63e84067d7SDuane Grigsby #define CF_DIF_SEG_DESCR_ENABLE BIT_3 64e84067d7SDuane Grigsby #define CF_DATA_SEG_DESCR_ENABLE BIT_2 65e84067d7SDuane Grigsby #define CF_READ_DATA BIT_1 66e84067d7SDuane Grigsby #define CF_WRITE_DATA BIT_0 67e84067d7SDuane Grigsby 6821038b09SBart Van Assche __le16 nvme_cmnd_dseg_len; /* Data segment length. */ 69d4556a49SBart Van Assche __le64 nvme_cmnd_dseg_address __packed;/* Data segment address. */ 70d4556a49SBart Van Assche __le64 nvme_rsp_dseg_address __packed; /* Data segment address. */ 71e84067d7SDuane Grigsby 7221038b09SBart Van Assche __le32 byte_count; /* Total byte count. */ 73e84067d7SDuane Grigsby 74e84067d7SDuane Grigsby uint8_t port_id[3]; /* PortID of destination port. */ 75e84067d7SDuane Grigsby uint8_t vp_index; 76e84067d7SDuane Grigsby 7715b7a68cSBart Van Assche struct dsd64 nvme_dsd; 78e84067d7SDuane Grigsby }; 79e84067d7SDuane Grigsby 80*875386b9SManish Rangankar #define PURLS_MSLEEP_INTERVAL 1 81*875386b9SManish Rangankar #define PURLS_RETRY_COUNT 5 82*875386b9SManish Rangankar 83e84067d7SDuane Grigsby #define PT_LS4_REQUEST 0x89 /* Link Service pass-through IOCB (request) */ 84e84067d7SDuane Grigsby struct pt_ls4_request { 85e84067d7SDuane Grigsby uint8_t entry_type; 86e84067d7SDuane Grigsby uint8_t entry_count; 87e84067d7SDuane Grigsby uint8_t sys_define; 88e84067d7SDuane Grigsby uint8_t entry_status; 89e84067d7SDuane Grigsby uint32_t handle; 9021038b09SBart Van Assche __le16 status; 9121038b09SBart Van Assche __le16 nport_handle; 9221038b09SBart Van Assche __le16 tx_dseg_count; 93e84067d7SDuane Grigsby uint8_t vp_index; 94e84067d7SDuane Grigsby uint8_t rsvd; 9521038b09SBart Van Assche __le16 timeout; 9621038b09SBart Van Assche __le16 control_flags; 97e84067d7SDuane Grigsby #define CF_LS4_SHIFT 13 98e84067d7SDuane Grigsby #define CF_LS4_ORIGINATOR 0 99e84067d7SDuane Grigsby #define CF_LS4_RESPONDER 1 100e84067d7SDuane Grigsby #define CF_LS4_RESPONDER_TERM 2 101e84067d7SDuane Grigsby 10221038b09SBart Van Assche __le16 rx_dseg_count; 10321038b09SBart Van Assche __le16 rsvd2; 10421038b09SBart Van Assche __le32 exchange_address; 10521038b09SBart Van Assche __le32 rsvd3; 10621038b09SBart Van Assche __le32 rx_byte_count; 10721038b09SBart Van Assche __le32 tx_byte_count; 10815b7a68cSBart Van Assche struct dsd64 dsd[2]; 109e84067d7SDuane Grigsby }; 110e84067d7SDuane Grigsby 111e84067d7SDuane Grigsby #define PT_LS4_UNSOL 0x56 /* pass-up unsolicited rec FC-NVMe request */ 112e84067d7SDuane Grigsby struct pt_ls4_rx_unsol { 113e84067d7SDuane Grigsby uint8_t entry_type; 114e84067d7SDuane Grigsby uint8_t entry_count; 11521038b09SBart Van Assche __le16 rsvd0; 11621038b09SBart Van Assche __le16 rsvd1; 117e84067d7SDuane Grigsby uint8_t vp_index; 118e84067d7SDuane Grigsby uint8_t rsvd2; 11921038b09SBart Van Assche __le16 rsvd3; 12021038b09SBart Van Assche __le16 nport_handle; 12121038b09SBart Van Assche __le16 frame_size; 12221038b09SBart Van Assche __le16 rsvd4; 12321038b09SBart Van Assche __le32 exchange_address; 124e84067d7SDuane Grigsby uint8_t d_id[3]; 125e84067d7SDuane Grigsby uint8_t r_ctl; 126*875386b9SManish Rangankar le_id_t s_id; 127e84067d7SDuane Grigsby uint8_t cs_ctl; 128e84067d7SDuane Grigsby uint8_t f_ctl[3]; 129e84067d7SDuane Grigsby uint8_t type; 13021038b09SBart Van Assche __le16 seq_cnt; 131e84067d7SDuane Grigsby uint8_t df_ctl; 132e84067d7SDuane Grigsby uint8_t seq_id; 13321038b09SBart Van Assche __le16 rx_id; 13421038b09SBart Van Assche __le16 ox_id; 13521038b09SBart Van Assche __le32 desc0; 136e84067d7SDuane Grigsby #define PT_LS4_PAYLOAD_OFFSET 0x2c 137e84067d7SDuane Grigsby #define PT_LS4_FIRST_PACKET_LEN 20 138*875386b9SManish Rangankar __le32 payload[5]; 139e84067d7SDuane Grigsby }; 1400f7e51f6Shimanshu.madhani@cavium.com 1410f7e51f6Shimanshu.madhani@cavium.com /* 1420f7e51f6Shimanshu.madhani@cavium.com * Global functions prototype in qla_nvme.c source file. 1430f7e51f6Shimanshu.madhani@cavium.com */ 1448777e431SQuinn Tran int qla_nvme_register_hba(struct scsi_qla_host *); 1450f7e51f6Shimanshu.madhani@cavium.com int qla_nvme_register_remote(struct scsi_qla_host *, struct fc_port *); 1460f7e51f6Shimanshu.madhani@cavium.com void qla_nvme_delete(struct scsi_qla_host *); 1470f7e51f6Shimanshu.madhani@cavium.com void qla24xx_nvme_ls4_iocb(struct scsi_qla_host *, struct pt_ls4_request *, 1480f7e51f6Shimanshu.madhani@cavium.com struct req_que *); 1496c18a43eSBart Van Assche void qla24xx_async_gffid_sp_done(struct srb *sp, int); 150e84067d7SDuane Grigsby #endif 151