1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * QLogic Fibre Channel HBA Driver 4 * Copyright (c) 2003-2014 QLogic Corporation 5 */ 6 #include "qla_def.h" 7 #include "qla_gbl.h" 8 9 #include <linux/delay.h> 10 #include <linux/slab.h> 11 #include <linux/vmalloc.h> 12 13 #include "qla_devtbl.h" 14 15 #ifdef CONFIG_SPARC 16 #include <asm/prom.h> 17 #endif 18 19 #include "qla_target.h" 20 21 /* 22 * QLogic ISP2x00 Hardware Support Function Prototypes. 23 */ 24 static int qla2x00_isp_firmware(scsi_qla_host_t *); 25 static int qla2x00_setup_chip(scsi_qla_host_t *); 26 static int qla2x00_fw_ready(scsi_qla_host_t *); 27 static int qla2x00_configure_hba(scsi_qla_host_t *); 28 static int qla2x00_configure_loop(scsi_qla_host_t *); 29 static int qla2x00_configure_local_loop(scsi_qla_host_t *); 30 static int qla2x00_configure_fabric(scsi_qla_host_t *); 31 static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *); 32 static int qla2x00_restart_isp(scsi_qla_host_t *); 33 34 static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *); 35 static int qla84xx_init_chip(scsi_qla_host_t *); 36 static int qla25xx_init_queues(struct qla_hw_data *); 37 static void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, 38 struct event_arg *ea); 39 static void qla24xx_handle_prli_done_event(struct scsi_qla_host *, 40 struct event_arg *); 41 static void __qla24xx_handle_gpdb_event(scsi_qla_host_t *, struct event_arg *); 42 43 /* SRB Extensions ---------------------------------------------------------- */ 44 45 void 46 qla2x00_sp_timeout(struct timer_list *t) 47 { 48 srb_t *sp = from_timer(sp, t, u.iocb_cmd.timer); 49 struct srb_iocb *iocb; 50 scsi_qla_host_t *vha = sp->vha; 51 52 WARN_ON(irqs_disabled()); 53 iocb = &sp->u.iocb_cmd; 54 iocb->timeout(sp); 55 56 /* ref: TMR */ 57 kref_put(&sp->cmd_kref, qla2x00_sp_release); 58 59 if (vha && qla2x00_isp_reg_stat(vha->hw)) { 60 ql_log(ql_log_info, vha, 0x9008, 61 "PCI/Register disconnect.\n"); 62 qla_pci_set_eeh_busy(vha); 63 } 64 } 65 66 void qla2x00_sp_free(srb_t *sp) 67 { 68 struct srb_iocb *iocb = &sp->u.iocb_cmd; 69 70 del_timer(&iocb->timer); 71 qla2x00_rel_sp(sp); 72 } 73 74 void qla2xxx_rel_done_warning(srb_t *sp, int res) 75 { 76 WARN_ONCE(1, "Calling done() of an already freed srb %p object\n", sp); 77 } 78 79 void qla2xxx_rel_free_warning(srb_t *sp) 80 { 81 WARN_ONCE(1, "Calling free() of an already freed srb %p object\n", sp); 82 } 83 84 /* Asynchronous Login/Logout Routines -------------------------------------- */ 85 86 unsigned long 87 qla2x00_get_async_timeout(struct scsi_qla_host *vha) 88 { 89 unsigned long tmo; 90 struct qla_hw_data *ha = vha->hw; 91 92 /* Firmware should use switch negotiated r_a_tov for timeout. */ 93 tmo = ha->r_a_tov / 10 * 2; 94 if (IS_QLAFX00(ha)) { 95 tmo = FX00_DEF_RATOV * 2; 96 } else if (!IS_FWI2_CAPABLE(ha)) { 97 /* 98 * Except for earlier ISPs where the timeout is seeded from the 99 * initialization control block. 100 */ 101 tmo = ha->login_timeout; 102 } 103 return tmo; 104 } 105 106 static void qla24xx_abort_iocb_timeout(void *data) 107 { 108 srb_t *sp = data; 109 struct srb_iocb *abt = &sp->u.iocb_cmd; 110 struct qla_qpair *qpair = sp->qpair; 111 u32 handle; 112 unsigned long flags; 113 int sp_found = 0, cmdsp_found = 0; 114 115 if (sp->cmd_sp) 116 ql_dbg(ql_dbg_async, sp->vha, 0x507c, 117 "Abort timeout - cmd hdl=%x, cmd type=%x hdl=%x, type=%x\n", 118 sp->cmd_sp->handle, sp->cmd_sp->type, 119 sp->handle, sp->type); 120 else 121 ql_dbg(ql_dbg_async, sp->vha, 0x507c, 122 "Abort timeout 2 - hdl=%x, type=%x\n", 123 sp->handle, sp->type); 124 125 spin_lock_irqsave(qpair->qp_lock_ptr, flags); 126 for (handle = 1; handle < qpair->req->num_outstanding_cmds; handle++) { 127 if (sp->cmd_sp && (qpair->req->outstanding_cmds[handle] == 128 sp->cmd_sp)) { 129 qpair->req->outstanding_cmds[handle] = NULL; 130 cmdsp_found = 1; 131 qla_put_fw_resources(qpair, &sp->cmd_sp->iores); 132 } 133 134 /* removing the abort */ 135 if (qpair->req->outstanding_cmds[handle] == sp) { 136 qpair->req->outstanding_cmds[handle] = NULL; 137 sp_found = 1; 138 qla_put_fw_resources(qpair, &sp->iores); 139 break; 140 } 141 } 142 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags); 143 144 if (cmdsp_found && sp->cmd_sp) { 145 /* 146 * This done function should take care of 147 * original command ref: INIT 148 */ 149 sp->cmd_sp->done(sp->cmd_sp, QLA_OS_TIMER_EXPIRED); 150 } 151 152 if (sp_found) { 153 abt->u.abt.comp_status = cpu_to_le16(CS_TIMEOUT); 154 sp->done(sp, QLA_OS_TIMER_EXPIRED); 155 } 156 } 157 158 static void qla24xx_abort_sp_done(srb_t *sp, int res) 159 { 160 struct srb_iocb *abt = &sp->u.iocb_cmd; 161 srb_t *orig_sp = sp->cmd_sp; 162 163 if (orig_sp) 164 qla_wait_nvme_release_cmd_kref(orig_sp); 165 166 if (sp->flags & SRB_WAKEUP_ON_COMP) 167 complete(&abt->u.abt.comp); 168 else 169 /* ref: INIT */ 170 kref_put(&sp->cmd_kref, qla2x00_sp_release); 171 } 172 173 int qla24xx_async_abort_cmd(srb_t *cmd_sp, bool wait) 174 { 175 scsi_qla_host_t *vha = cmd_sp->vha; 176 struct srb_iocb *abt_iocb; 177 srb_t *sp; 178 int rval = QLA_FUNCTION_FAILED; 179 180 /* ref: INIT for ABTS command */ 181 sp = qla2xxx_get_qpair_sp(cmd_sp->vha, cmd_sp->qpair, cmd_sp->fcport, 182 GFP_ATOMIC); 183 if (!sp) 184 return QLA_MEMORY_ALLOC_FAILED; 185 186 qla_vha_mark_busy(vha); 187 abt_iocb = &sp->u.iocb_cmd; 188 sp->type = SRB_ABT_CMD; 189 sp->name = "abort"; 190 sp->qpair = cmd_sp->qpair; 191 sp->cmd_sp = cmd_sp; 192 if (wait) 193 sp->flags = SRB_WAKEUP_ON_COMP; 194 195 init_completion(&abt_iocb->u.abt.comp); 196 /* FW can send 2 x ABTS's timeout/20s */ 197 qla2x00_init_async_sp(sp, 42, qla24xx_abort_sp_done); 198 sp->u.iocb_cmd.timeout = qla24xx_abort_iocb_timeout; 199 200 abt_iocb->u.abt.cmd_hndl = cmd_sp->handle; 201 abt_iocb->u.abt.req_que_no = cpu_to_le16(cmd_sp->qpair->req->id); 202 203 ql_dbg(ql_dbg_async, vha, 0x507c, 204 "Abort command issued - hdl=%x, type=%x\n", cmd_sp->handle, 205 cmd_sp->type); 206 207 rval = qla2x00_start_sp(sp); 208 if (rval != QLA_SUCCESS) { 209 /* ref: INIT */ 210 kref_put(&sp->cmd_kref, qla2x00_sp_release); 211 return rval; 212 } 213 214 if (wait) { 215 wait_for_completion(&abt_iocb->u.abt.comp); 216 rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ? 217 QLA_SUCCESS : QLA_ERR_FROM_FW; 218 /* ref: INIT */ 219 kref_put(&sp->cmd_kref, qla2x00_sp_release); 220 } 221 222 return rval; 223 } 224 225 void 226 qla2x00_async_iocb_timeout(void *data) 227 { 228 srb_t *sp = data; 229 fc_port_t *fcport = sp->fcport; 230 struct srb_iocb *lio = &sp->u.iocb_cmd; 231 int rc, h; 232 unsigned long flags; 233 234 if (fcport) { 235 ql_dbg(ql_dbg_disc, fcport->vha, 0x2071, 236 "Async-%s timeout - hdl=%x portid=%06x %8phC.\n", 237 sp->name, sp->handle, fcport->d_id.b24, fcport->port_name); 238 239 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 240 } else { 241 pr_info("Async-%s timeout - hdl=%x.\n", 242 sp->name, sp->handle); 243 } 244 245 switch (sp->type) { 246 case SRB_LOGIN_CMD: 247 rc = qla24xx_async_abort_cmd(sp, false); 248 if (rc) { 249 /* Retry as needed. */ 250 lio->u.logio.data[0] = MBS_COMMAND_ERROR; 251 lio->u.logio.data[1] = 252 lio->u.logio.flags & SRB_LOGIN_RETRIED ? 253 QLA_LOGIO_LOGIN_RETRIED : 0; 254 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags); 255 for (h = 1; h < sp->qpair->req->num_outstanding_cmds; 256 h++) { 257 if (sp->qpair->req->outstanding_cmds[h] == 258 sp) { 259 sp->qpair->req->outstanding_cmds[h] = 260 NULL; 261 break; 262 } 263 } 264 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags); 265 sp->done(sp, QLA_FUNCTION_TIMEOUT); 266 } 267 break; 268 case SRB_LOGOUT_CMD: 269 case SRB_CT_PTHRU_CMD: 270 case SRB_MB_IOCB: 271 case SRB_NACK_PLOGI: 272 case SRB_NACK_PRLI: 273 case SRB_NACK_LOGO: 274 case SRB_CTRL_VP: 275 default: 276 rc = qla24xx_async_abort_cmd(sp, false); 277 if (rc) { 278 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags); 279 for (h = 1; h < sp->qpair->req->num_outstanding_cmds; 280 h++) { 281 if (sp->qpair->req->outstanding_cmds[h] == 282 sp) { 283 sp->qpair->req->outstanding_cmds[h] = 284 NULL; 285 break; 286 } 287 } 288 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags); 289 sp->done(sp, QLA_FUNCTION_TIMEOUT); 290 } 291 break; 292 } 293 } 294 295 static void qla2x00_async_login_sp_done(srb_t *sp, int res) 296 { 297 struct scsi_qla_host *vha = sp->vha; 298 struct srb_iocb *lio = &sp->u.iocb_cmd; 299 struct event_arg ea; 300 301 ql_dbg(ql_dbg_disc, vha, 0x20dd, 302 "%s %8phC res %d \n", __func__, sp->fcport->port_name, res); 303 304 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 305 306 if (!test_bit(UNLOADING, &vha->dpc_flags)) { 307 memset(&ea, 0, sizeof(ea)); 308 ea.fcport = sp->fcport; 309 ea.data[0] = lio->u.logio.data[0]; 310 ea.data[1] = lio->u.logio.data[1]; 311 ea.iop[0] = lio->u.logio.iop[0]; 312 ea.iop[1] = lio->u.logio.iop[1]; 313 ea.sp = sp; 314 if (res) 315 ea.data[0] = MBS_COMMAND_ERROR; 316 qla24xx_handle_plogi_done_event(vha, &ea); 317 } 318 319 /* ref: INIT */ 320 kref_put(&sp->cmd_kref, qla2x00_sp_release); 321 } 322 323 int 324 qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport, 325 uint16_t *data) 326 { 327 srb_t *sp; 328 struct srb_iocb *lio; 329 int rval = QLA_FUNCTION_FAILED; 330 331 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT) || 332 fcport->loop_id == FC_NO_LOOP_ID) { 333 ql_log(ql_log_warn, vha, 0xffff, 334 "%s: %8phC - not sending command.\n", 335 __func__, fcport->port_name); 336 return rval; 337 } 338 339 /* ref: INIT */ 340 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 341 if (!sp) 342 goto done; 343 344 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_PEND); 345 fcport->flags |= FCF_ASYNC_SENT; 346 fcport->logout_completed = 0; 347 348 sp->type = SRB_LOGIN_CMD; 349 sp->name = "login"; 350 sp->gen1 = fcport->rscn_gen; 351 sp->gen2 = fcport->login_gen; 352 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2, 353 qla2x00_async_login_sp_done); 354 355 lio = &sp->u.iocb_cmd; 356 if (N2N_TOPO(fcport->vha->hw) && fcport_is_bigger(fcport)) { 357 lio->u.logio.flags |= SRB_LOGIN_PRLI_ONLY; 358 } else { 359 if (vha->hw->flags.edif_enabled && 360 DBELL_ACTIVE(vha)) { 361 lio->u.logio.flags |= 362 (SRB_LOGIN_FCSP | SRB_LOGIN_SKIP_PRLI); 363 } else { 364 lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI; 365 } 366 } 367 368 if (NVME_TARGET(vha->hw, fcport)) 369 lio->u.logio.flags |= SRB_LOGIN_SKIP_PRLI; 370 371 rval = qla2x00_start_sp(sp); 372 373 ql_dbg(ql_dbg_disc, vha, 0x2072, 374 "Async-login - %8phC hdl=%x, loopid=%x portid=%06x retries=%d %s.\n", 375 fcport->port_name, sp->handle, fcport->loop_id, 376 fcport->d_id.b24, fcport->login_retry, 377 lio->u.logio.flags & SRB_LOGIN_FCSP ? "FCSP" : ""); 378 379 if (rval != QLA_SUCCESS) { 380 fcport->flags |= FCF_LOGIN_NEEDED; 381 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 382 goto done_free_sp; 383 } 384 385 return rval; 386 387 done_free_sp: 388 /* ref: INIT */ 389 kref_put(&sp->cmd_kref, qla2x00_sp_release); 390 fcport->flags &= ~FCF_ASYNC_SENT; 391 done: 392 fcport->flags &= ~FCF_ASYNC_ACTIVE; 393 394 /* 395 * async login failed. Could be due to iocb/exchange resource 396 * being low. Set state DELETED for re-login process to start again. 397 */ 398 qla2x00_set_fcport_disc_state(fcport, DSC_DELETED); 399 return rval; 400 } 401 402 static void qla2x00_async_logout_sp_done(srb_t *sp, int res) 403 { 404 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 405 sp->fcport->login_gen++; 406 qlt_logo_completion_handler(sp->fcport, sp->u.iocb_cmd.u.logio.data[0]); 407 /* ref: INIT */ 408 kref_put(&sp->cmd_kref, qla2x00_sp_release); 409 } 410 411 int 412 qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport) 413 { 414 srb_t *sp; 415 int rval = QLA_FUNCTION_FAILED; 416 417 fcport->flags |= FCF_ASYNC_SENT; 418 /* ref: INIT */ 419 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 420 if (!sp) 421 goto done; 422 423 sp->type = SRB_LOGOUT_CMD; 424 sp->name = "logout"; 425 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2, 426 qla2x00_async_logout_sp_done), 427 428 ql_dbg(ql_dbg_disc, vha, 0x2070, 429 "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x %8phC explicit %d.\n", 430 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 431 fcport->d_id.b.area, fcport->d_id.b.al_pa, 432 fcport->port_name, fcport->explicit_logout); 433 434 rval = qla2x00_start_sp(sp); 435 if (rval != QLA_SUCCESS) 436 goto done_free_sp; 437 return rval; 438 439 done_free_sp: 440 /* ref: INIT */ 441 kref_put(&sp->cmd_kref, qla2x00_sp_release); 442 done: 443 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 444 return rval; 445 } 446 447 void 448 qla2x00_async_prlo_done(struct scsi_qla_host *vha, fc_port_t *fcport, 449 uint16_t *data) 450 { 451 fcport->flags &= ~FCF_ASYNC_ACTIVE; 452 /* Don't re-login in target mode */ 453 if (!fcport->tgt_session) 454 qla2x00_mark_device_lost(vha, fcport, 1); 455 qlt_logo_completion_handler(fcport, data[0]); 456 } 457 458 static void qla2x00_async_prlo_sp_done(srb_t *sp, int res) 459 { 460 struct srb_iocb *lio = &sp->u.iocb_cmd; 461 struct scsi_qla_host *vha = sp->vha; 462 463 sp->fcport->flags &= ~FCF_ASYNC_ACTIVE; 464 if (!test_bit(UNLOADING, &vha->dpc_flags)) 465 qla2x00_post_async_prlo_done_work(sp->fcport->vha, sp->fcport, 466 lio->u.logio.data); 467 /* ref: INIT */ 468 kref_put(&sp->cmd_kref, qla2x00_sp_release); 469 } 470 471 int 472 qla2x00_async_prlo(struct scsi_qla_host *vha, fc_port_t *fcport) 473 { 474 srb_t *sp; 475 int rval; 476 477 rval = QLA_FUNCTION_FAILED; 478 /* ref: INIT */ 479 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 480 if (!sp) 481 goto done; 482 483 sp->type = SRB_PRLO_CMD; 484 sp->name = "prlo"; 485 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2, 486 qla2x00_async_prlo_sp_done); 487 488 ql_dbg(ql_dbg_disc, vha, 0x2070, 489 "Async-prlo - hdl=%x loop-id=%x portid=%02x%02x%02x.\n", 490 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 491 fcport->d_id.b.area, fcport->d_id.b.al_pa); 492 493 rval = qla2x00_start_sp(sp); 494 if (rval != QLA_SUCCESS) 495 goto done_free_sp; 496 497 return rval; 498 499 done_free_sp: 500 /* ref: INIT */ 501 kref_put(&sp->cmd_kref, qla2x00_sp_release); 502 done: 503 fcport->flags &= ~FCF_ASYNC_ACTIVE; 504 return rval; 505 } 506 507 static 508 void qla24xx_handle_adisc_event(scsi_qla_host_t *vha, struct event_arg *ea) 509 { 510 struct fc_port *fcport = ea->fcport; 511 unsigned long flags; 512 513 ql_dbg(ql_dbg_disc, vha, 0x20d2, 514 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d lid %d\n", 515 __func__, fcport->port_name, fcport->disc_state, 516 fcport->fw_login_state, ea->rc, fcport->login_gen, ea->sp->gen2, 517 fcport->rscn_gen, ea->sp->gen1, fcport->loop_id); 518 519 WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n", 520 ea->data[0]); 521 522 if (ea->data[0] != MBS_COMMAND_COMPLETE) { 523 ql_dbg(ql_dbg_disc, vha, 0x2066, 524 "%s %8phC: adisc fail: post delete\n", 525 __func__, ea->fcport->port_name); 526 527 spin_lock_irqsave(&vha->work_lock, flags); 528 /* deleted = 0 & logout_on_delete = force fw cleanup */ 529 if (fcport->deleted == QLA_SESS_DELETED) 530 fcport->deleted = 0; 531 532 fcport->logout_on_delete = 1; 533 spin_unlock_irqrestore(&vha->work_lock, flags); 534 535 qlt_schedule_sess_for_deletion(ea->fcport); 536 return; 537 } 538 539 if (ea->fcport->disc_state == DSC_DELETE_PEND) 540 return; 541 542 if (ea->sp->gen2 != ea->fcport->login_gen) { 543 /* target side must have changed it. */ 544 ql_dbg(ql_dbg_disc, vha, 0x20d3, 545 "%s %8phC generation changed\n", 546 __func__, ea->fcport->port_name); 547 return; 548 } else if (ea->sp->gen1 != ea->fcport->rscn_gen) { 549 qla_rscn_replay(fcport); 550 qlt_schedule_sess_for_deletion(fcport); 551 return; 552 } 553 554 __qla24xx_handle_gpdb_event(vha, ea); 555 } 556 557 static int qla_post_els_plogi_work(struct scsi_qla_host *vha, fc_port_t *fcport) 558 { 559 struct qla_work_evt *e; 560 561 e = qla2x00_alloc_work(vha, QLA_EVT_ELS_PLOGI); 562 if (!e) 563 return QLA_FUNCTION_FAILED; 564 565 e->u.fcport.fcport = fcport; 566 fcport->flags |= FCF_ASYNC_ACTIVE; 567 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_PEND); 568 return qla2x00_post_work(vha, e); 569 } 570 571 static void qla2x00_async_adisc_sp_done(srb_t *sp, int res) 572 { 573 struct scsi_qla_host *vha = sp->vha; 574 struct event_arg ea; 575 struct srb_iocb *lio = &sp->u.iocb_cmd; 576 577 ql_dbg(ql_dbg_disc, vha, 0x2066, 578 "Async done-%s res %x %8phC\n", 579 sp->name, res, sp->fcport->port_name); 580 581 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 582 583 memset(&ea, 0, sizeof(ea)); 584 ea.rc = res; 585 ea.data[0] = lio->u.logio.data[0]; 586 ea.data[1] = lio->u.logio.data[1]; 587 ea.iop[0] = lio->u.logio.iop[0]; 588 ea.iop[1] = lio->u.logio.iop[1]; 589 ea.fcport = sp->fcport; 590 ea.sp = sp; 591 if (res) 592 ea.data[0] = MBS_COMMAND_ERROR; 593 594 qla24xx_handle_adisc_event(vha, &ea); 595 /* ref: INIT */ 596 kref_put(&sp->cmd_kref, qla2x00_sp_release); 597 } 598 599 int 600 qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport, 601 uint16_t *data) 602 { 603 srb_t *sp; 604 struct srb_iocb *lio; 605 int rval = QLA_FUNCTION_FAILED; 606 607 if (IS_SESSION_DELETED(fcport)) { 608 ql_log(ql_log_warn, vha, 0xffff, 609 "%s: %8phC is being delete - not sending command.\n", 610 __func__, fcport->port_name); 611 fcport->flags &= ~FCF_ASYNC_ACTIVE; 612 return rval; 613 } 614 615 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) 616 return rval; 617 618 fcport->flags |= FCF_ASYNC_SENT; 619 /* ref: INIT */ 620 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 621 if (!sp) 622 goto done; 623 624 sp->type = SRB_ADISC_CMD; 625 sp->name = "adisc"; 626 sp->gen1 = fcport->rscn_gen; 627 sp->gen2 = fcport->login_gen; 628 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2, 629 qla2x00_async_adisc_sp_done); 630 631 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) { 632 lio = &sp->u.iocb_cmd; 633 lio->u.logio.flags |= SRB_LOGIN_RETRIED; 634 } 635 636 ql_dbg(ql_dbg_disc, vha, 0x206f, 637 "Async-adisc - hdl=%x loopid=%x portid=%06x %8phC.\n", 638 sp->handle, fcport->loop_id, fcport->d_id.b24, fcport->port_name); 639 640 rval = qla2x00_start_sp(sp); 641 if (rval != QLA_SUCCESS) 642 goto done_free_sp; 643 644 return rval; 645 646 done_free_sp: 647 /* ref: INIT */ 648 kref_put(&sp->cmd_kref, qla2x00_sp_release); 649 done: 650 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 651 qla2x00_post_async_adisc_work(vha, fcport, data); 652 return rval; 653 } 654 655 static bool qla2x00_is_reserved_id(scsi_qla_host_t *vha, uint16_t loop_id) 656 { 657 struct qla_hw_data *ha = vha->hw; 658 659 if (IS_FWI2_CAPABLE(ha)) 660 return loop_id > NPH_LAST_HANDLE; 661 662 return (loop_id > ha->max_loop_id && loop_id < SNS_FIRST_LOOP_ID) || 663 loop_id == MANAGEMENT_SERVER || loop_id == BROADCAST; 664 } 665 666 /** 667 * qla2x00_find_new_loop_id - scan through our port list and find a new usable loop ID 668 * @vha: adapter state pointer. 669 * @dev: port structure pointer. 670 * 671 * Returns: 672 * qla2x00 local function return status code. 673 * 674 * Context: 675 * Kernel context. 676 */ 677 static int qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev) 678 { 679 int rval; 680 struct qla_hw_data *ha = vha->hw; 681 unsigned long flags = 0; 682 683 rval = QLA_SUCCESS; 684 685 spin_lock_irqsave(&ha->vport_slock, flags); 686 687 dev->loop_id = find_first_zero_bit(ha->loop_id_map, LOOPID_MAP_SIZE); 688 if (dev->loop_id >= LOOPID_MAP_SIZE || 689 qla2x00_is_reserved_id(vha, dev->loop_id)) { 690 dev->loop_id = FC_NO_LOOP_ID; 691 rval = QLA_FUNCTION_FAILED; 692 } else { 693 set_bit(dev->loop_id, ha->loop_id_map); 694 } 695 spin_unlock_irqrestore(&ha->vport_slock, flags); 696 697 if (rval == QLA_SUCCESS) 698 ql_dbg(ql_dbg_disc, dev->vha, 0x2086, 699 "Assigning new loopid=%x, portid=%x.\n", 700 dev->loop_id, dev->d_id.b24); 701 else 702 ql_log(ql_log_warn, dev->vha, 0x2087, 703 "No loop_id's available, portid=%x.\n", 704 dev->d_id.b24); 705 706 return rval; 707 } 708 709 void qla2x00_clear_loop_id(fc_port_t *fcport) 710 { 711 struct qla_hw_data *ha = fcport->vha->hw; 712 713 if (fcport->loop_id == FC_NO_LOOP_ID || 714 qla2x00_is_reserved_id(fcport->vha, fcport->loop_id)) 715 return; 716 717 clear_bit(fcport->loop_id, ha->loop_id_map); 718 fcport->loop_id = FC_NO_LOOP_ID; 719 } 720 721 static void qla24xx_handle_gnl_done_event(scsi_qla_host_t *vha, 722 struct event_arg *ea) 723 { 724 fc_port_t *fcport, *conflict_fcport; 725 struct get_name_list_extended *e; 726 u16 i, n, found = 0, loop_id; 727 port_id_t id; 728 u64 wwn; 729 u16 data[2]; 730 u8 current_login_state, nvme_cls; 731 732 fcport = ea->fcport; 733 ql_dbg(ql_dbg_disc, vha, 0xffff, 734 "%s %8phC DS %d LS rc %d %d login %d|%d rscn %d|%d lid %d edif %d\n", 735 __func__, fcport->port_name, fcport->disc_state, 736 fcport->fw_login_state, ea->rc, 737 fcport->login_gen, fcport->last_login_gen, 738 fcport->rscn_gen, fcport->last_rscn_gen, vha->loop_id, fcport->edif.enable); 739 740 if (fcport->disc_state == DSC_DELETE_PEND) 741 return; 742 743 if (ea->rc) { /* rval */ 744 if (fcport->login_retry == 0) { 745 ql_dbg(ql_dbg_disc, vha, 0x20de, 746 "GNL failed Port login retry %8phN, retry cnt=%d.\n", 747 fcport->port_name, fcport->login_retry); 748 } 749 return; 750 } 751 752 if (fcport->last_rscn_gen != fcport->rscn_gen) { 753 qla_rscn_replay(fcport); 754 qlt_schedule_sess_for_deletion(fcport); 755 return; 756 } else if (fcport->last_login_gen != fcport->login_gen) { 757 ql_dbg(ql_dbg_disc, vha, 0x20e0, 758 "%s %8phC login gen changed\n", 759 __func__, fcport->port_name); 760 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 761 return; 762 } 763 764 n = ea->data[0] / sizeof(struct get_name_list_extended); 765 766 ql_dbg(ql_dbg_disc, vha, 0x20e1, 767 "%s %d %8phC n %d %02x%02x%02x lid %d \n", 768 __func__, __LINE__, fcport->port_name, n, 769 fcport->d_id.b.domain, fcport->d_id.b.area, 770 fcport->d_id.b.al_pa, fcport->loop_id); 771 772 for (i = 0; i < n; i++) { 773 e = &vha->gnl.l[i]; 774 wwn = wwn_to_u64(e->port_name); 775 id.b.domain = e->port_id[2]; 776 id.b.area = e->port_id[1]; 777 id.b.al_pa = e->port_id[0]; 778 id.b.rsvd_1 = 0; 779 780 if (memcmp((u8 *)&wwn, fcport->port_name, WWN_SIZE)) 781 continue; 782 783 if (IS_SW_RESV_ADDR(id)) 784 continue; 785 786 found = 1; 787 788 loop_id = le16_to_cpu(e->nport_handle); 789 loop_id = (loop_id & 0x7fff); 790 nvme_cls = e->current_login_state >> 4; 791 current_login_state = e->current_login_state & 0xf; 792 793 if (PRLI_PHASE(nvme_cls)) { 794 current_login_state = nvme_cls; 795 fcport->fc4_type &= ~FS_FC4TYPE_FCP; 796 fcport->fc4_type |= FS_FC4TYPE_NVME; 797 } else if (PRLI_PHASE(current_login_state)) { 798 fcport->fc4_type |= FS_FC4TYPE_FCP; 799 fcport->fc4_type &= ~FS_FC4TYPE_NVME; 800 } 801 802 ql_dbg(ql_dbg_disc, vha, 0x20e2, 803 "%s found %8phC CLS [%x|%x] fc4_type %d ID[%06x|%06x] lid[%d|%d]\n", 804 __func__, fcport->port_name, 805 e->current_login_state, fcport->fw_login_state, 806 fcport->fc4_type, id.b24, fcport->d_id.b24, 807 loop_id, fcport->loop_id); 808 809 switch (fcport->disc_state) { 810 case DSC_DELETE_PEND: 811 case DSC_DELETED: 812 break; 813 default: 814 if ((id.b24 != fcport->d_id.b24 && 815 fcport->d_id.b24 && 816 fcport->loop_id != FC_NO_LOOP_ID) || 817 (fcport->loop_id != FC_NO_LOOP_ID && 818 fcport->loop_id != loop_id)) { 819 ql_dbg(ql_dbg_disc, vha, 0x20e3, 820 "%s %d %8phC post del sess\n", 821 __func__, __LINE__, fcport->port_name); 822 if (fcport->n2n_flag) 823 fcport->d_id.b24 = 0; 824 qlt_schedule_sess_for_deletion(fcport); 825 return; 826 } 827 break; 828 } 829 830 fcport->loop_id = loop_id; 831 if (fcport->n2n_flag) 832 fcport->d_id.b24 = id.b24; 833 834 wwn = wwn_to_u64(fcport->port_name); 835 qlt_find_sess_invalidate_other(vha, wwn, 836 id, loop_id, &conflict_fcport); 837 838 if (conflict_fcport) { 839 /* 840 * Another share fcport share the same loop_id & 841 * nport id. Conflict fcport needs to finish 842 * cleanup before this fcport can proceed to login. 843 */ 844 conflict_fcport->conflict = fcport; 845 fcport->login_pause = 1; 846 } 847 848 switch (vha->hw->current_topology) { 849 default: 850 switch (current_login_state) { 851 case DSC_LS_PRLI_COMP: 852 ql_dbg(ql_dbg_disc, 853 vha, 0x20e4, "%s %d %8phC post gpdb\n", 854 __func__, __LINE__, fcport->port_name); 855 856 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0) 857 fcport->port_type = FCT_INITIATOR; 858 else 859 fcport->port_type = FCT_TARGET; 860 data[0] = data[1] = 0; 861 qla2x00_post_async_adisc_work(vha, fcport, 862 data); 863 break; 864 case DSC_LS_PLOGI_COMP: 865 if (vha->hw->flags.edif_enabled) { 866 /* check to see if App support Secure */ 867 qla24xx_post_gpdb_work(vha, fcport, 0); 868 break; 869 } 870 fallthrough; 871 case DSC_LS_PORT_UNAVAIL: 872 default: 873 if (fcport->loop_id == FC_NO_LOOP_ID) { 874 qla2x00_find_new_loop_id(vha, fcport); 875 fcport->fw_login_state = 876 DSC_LS_PORT_UNAVAIL; 877 } 878 ql_dbg(ql_dbg_disc, vha, 0x20e5, 879 "%s %d %8phC\n", __func__, __LINE__, 880 fcport->port_name); 881 qla24xx_fcport_handle_login(vha, fcport); 882 break; 883 } 884 break; 885 case ISP_CFG_N: 886 fcport->fw_login_state = current_login_state; 887 fcport->d_id = id; 888 switch (current_login_state) { 889 case DSC_LS_PRLI_PEND: 890 /* 891 * In the middle of PRLI. Let it finish. 892 * Allow relogin code to recheck state again 893 * with GNL. Push disc_state back to DELETED 894 * so GNL can go out again 895 */ 896 qla2x00_set_fcport_disc_state(fcport, 897 DSC_DELETED); 898 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 899 break; 900 case DSC_LS_PRLI_COMP: 901 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0) 902 fcport->port_type = FCT_INITIATOR; 903 else 904 fcport->port_type = FCT_TARGET; 905 906 data[0] = data[1] = 0; 907 qla2x00_post_async_adisc_work(vha, fcport, 908 data); 909 break; 910 case DSC_LS_PLOGI_COMP: 911 if (vha->hw->flags.edif_enabled && 912 DBELL_ACTIVE(vha)) { 913 /* check to see if App support secure or not */ 914 qla24xx_post_gpdb_work(vha, fcport, 0); 915 break; 916 } 917 if (fcport_is_bigger(fcport)) { 918 /* local adapter is smaller */ 919 if (fcport->loop_id != FC_NO_LOOP_ID) 920 qla2x00_clear_loop_id(fcport); 921 922 fcport->loop_id = loop_id; 923 qla24xx_fcport_handle_login(vha, 924 fcport); 925 break; 926 } 927 fallthrough; 928 default: 929 if (fcport_is_smaller(fcport)) { 930 /* local adapter is bigger */ 931 if (fcport->loop_id != FC_NO_LOOP_ID) 932 qla2x00_clear_loop_id(fcport); 933 934 fcport->loop_id = loop_id; 935 qla24xx_fcport_handle_login(vha, 936 fcport); 937 } 938 break; 939 } 940 break; 941 } /* switch (ha->current_topology) */ 942 } 943 944 if (!found) { 945 switch (vha->hw->current_topology) { 946 case ISP_CFG_F: 947 case ISP_CFG_FL: 948 for (i = 0; i < n; i++) { 949 e = &vha->gnl.l[i]; 950 id.b.domain = e->port_id[0]; 951 id.b.area = e->port_id[1]; 952 id.b.al_pa = e->port_id[2]; 953 id.b.rsvd_1 = 0; 954 loop_id = le16_to_cpu(e->nport_handle); 955 956 if (fcport->d_id.b24 == id.b24) { 957 conflict_fcport = 958 qla2x00_find_fcport_by_wwpn(vha, 959 e->port_name, 0); 960 if (conflict_fcport) { 961 ql_dbg(ql_dbg_disc + ql_dbg_verbose, 962 vha, 0x20e5, 963 "%s %d %8phC post del sess\n", 964 __func__, __LINE__, 965 conflict_fcport->port_name); 966 qlt_schedule_sess_for_deletion 967 (conflict_fcport); 968 } 969 } 970 /* 971 * FW already picked this loop id for 972 * another fcport 973 */ 974 if (fcport->loop_id == loop_id) 975 fcport->loop_id = FC_NO_LOOP_ID; 976 } 977 qla24xx_fcport_handle_login(vha, fcport); 978 break; 979 case ISP_CFG_N: 980 qla2x00_set_fcport_disc_state(fcport, DSC_DELETED); 981 if (time_after_eq(jiffies, fcport->dm_login_expire)) { 982 if (fcport->n2n_link_reset_cnt < 2) { 983 fcport->n2n_link_reset_cnt++; 984 /* 985 * remote port is not sending PLOGI. 986 * Reset link to kick start his state 987 * machine 988 */ 989 set_bit(N2N_LINK_RESET, 990 &vha->dpc_flags); 991 } else { 992 if (fcport->n2n_chip_reset < 1) { 993 ql_log(ql_log_info, vha, 0x705d, 994 "Chip reset to bring laser down"); 995 set_bit(ISP_ABORT_NEEDED, 996 &vha->dpc_flags); 997 fcport->n2n_chip_reset++; 998 } else { 999 ql_log(ql_log_info, vha, 0x705d, 1000 "Remote port %8ph is not coming back\n", 1001 fcport->port_name); 1002 fcport->scan_state = 0; 1003 } 1004 } 1005 qla2xxx_wake_dpc(vha); 1006 } else { 1007 /* 1008 * report port suppose to do PLOGI. Give him 1009 * more time. FW will catch it. 1010 */ 1011 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1012 } 1013 break; 1014 case ISP_CFG_NL: 1015 qla24xx_fcport_handle_login(vha, fcport); 1016 break; 1017 default: 1018 break; 1019 } 1020 } 1021 } /* gnl_event */ 1022 1023 static void qla24xx_async_gnl_sp_done(srb_t *sp, int res) 1024 { 1025 struct scsi_qla_host *vha = sp->vha; 1026 unsigned long flags; 1027 struct fc_port *fcport = NULL, *tf; 1028 u16 i, n = 0, loop_id; 1029 struct event_arg ea; 1030 struct get_name_list_extended *e; 1031 u64 wwn; 1032 struct list_head h; 1033 bool found = false; 1034 1035 ql_dbg(ql_dbg_disc, vha, 0x20e7, 1036 "Async done-%s res %x mb[1]=%x mb[2]=%x \n", 1037 sp->name, res, sp->u.iocb_cmd.u.mbx.in_mb[1], 1038 sp->u.iocb_cmd.u.mbx.in_mb[2]); 1039 1040 1041 sp->fcport->flags &= ~(FCF_ASYNC_SENT|FCF_ASYNC_ACTIVE); 1042 memset(&ea, 0, sizeof(ea)); 1043 ea.sp = sp; 1044 ea.rc = res; 1045 1046 if (sp->u.iocb_cmd.u.mbx.in_mb[1] >= 1047 sizeof(struct get_name_list_extended)) { 1048 n = sp->u.iocb_cmd.u.mbx.in_mb[1] / 1049 sizeof(struct get_name_list_extended); 1050 ea.data[0] = sp->u.iocb_cmd.u.mbx.in_mb[1]; /* amnt xfered */ 1051 } 1052 1053 for (i = 0; i < n; i++) { 1054 e = &vha->gnl.l[i]; 1055 loop_id = le16_to_cpu(e->nport_handle); 1056 /* mask out reserve bit */ 1057 loop_id = (loop_id & 0x7fff); 1058 set_bit(loop_id, vha->hw->loop_id_map); 1059 wwn = wwn_to_u64(e->port_name); 1060 1061 ql_dbg(ql_dbg_disc, vha, 0x20e8, 1062 "%s %8phC %02x:%02x:%02x CLS %x/%x lid %x \n", 1063 __func__, &wwn, e->port_id[2], e->port_id[1], 1064 e->port_id[0], e->current_login_state, e->last_login_state, 1065 (loop_id & 0x7fff)); 1066 } 1067 1068 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1069 1070 INIT_LIST_HEAD(&h); 1071 fcport = tf = NULL; 1072 if (!list_empty(&vha->gnl.fcports)) 1073 list_splice_init(&vha->gnl.fcports, &h); 1074 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1075 1076 list_for_each_entry_safe(fcport, tf, &h, gnl_entry) { 1077 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1078 list_del_init(&fcport->gnl_entry); 1079 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 1080 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1081 ea.fcport = fcport; 1082 1083 qla24xx_handle_gnl_done_event(vha, &ea); 1084 } 1085 1086 /* create new fcport if fw has knowledge of new sessions */ 1087 for (i = 0; i < n; i++) { 1088 port_id_t id; 1089 u64 wwnn; 1090 1091 e = &vha->gnl.l[i]; 1092 wwn = wwn_to_u64(e->port_name); 1093 1094 found = false; 1095 list_for_each_entry_safe(fcport, tf, &vha->vp_fcports, list) { 1096 if (!memcmp((u8 *)&wwn, fcport->port_name, 1097 WWN_SIZE)) { 1098 found = true; 1099 break; 1100 } 1101 } 1102 1103 id.b.domain = e->port_id[2]; 1104 id.b.area = e->port_id[1]; 1105 id.b.al_pa = e->port_id[0]; 1106 id.b.rsvd_1 = 0; 1107 1108 if (!found && wwn && !IS_SW_RESV_ADDR(id)) { 1109 ql_dbg(ql_dbg_disc, vha, 0x2065, 1110 "%s %d %8phC %06x post new sess\n", 1111 __func__, __LINE__, (u8 *)&wwn, id.b24); 1112 wwnn = wwn_to_u64(e->node_name); 1113 qla24xx_post_newsess_work(vha, &id, (u8 *)&wwn, 1114 (u8 *)&wwnn, NULL, 0); 1115 } 1116 } 1117 1118 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1119 vha->gnl.sent = 0; 1120 if (!list_empty(&vha->gnl.fcports)) { 1121 /* retrigger gnl */ 1122 list_for_each_entry_safe(fcport, tf, &vha->gnl.fcports, 1123 gnl_entry) { 1124 list_del_init(&fcport->gnl_entry); 1125 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 1126 if (qla24xx_post_gnl_work(vha, fcport) == QLA_SUCCESS) 1127 break; 1128 } 1129 } 1130 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1131 1132 /* ref: INIT */ 1133 kref_put(&sp->cmd_kref, qla2x00_sp_release); 1134 } 1135 1136 int qla24xx_async_gnl(struct scsi_qla_host *vha, fc_port_t *fcport) 1137 { 1138 srb_t *sp; 1139 int rval = QLA_FUNCTION_FAILED; 1140 unsigned long flags; 1141 u16 *mb; 1142 1143 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) 1144 goto done; 1145 1146 ql_dbg(ql_dbg_disc, vha, 0x20d9, 1147 "Async-gnlist WWPN %8phC \n", fcport->port_name); 1148 1149 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1150 fcport->flags |= FCF_ASYNC_SENT; 1151 qla2x00_set_fcport_disc_state(fcport, DSC_GNL); 1152 fcport->last_rscn_gen = fcport->rscn_gen; 1153 fcport->last_login_gen = fcport->login_gen; 1154 1155 list_add_tail(&fcport->gnl_entry, &vha->gnl.fcports); 1156 if (vha->gnl.sent) { 1157 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1158 return QLA_SUCCESS; 1159 } 1160 vha->gnl.sent = 1; 1161 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1162 1163 /* ref: INIT */ 1164 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1165 if (!sp) 1166 goto done; 1167 1168 sp->type = SRB_MB_IOCB; 1169 sp->name = "gnlist"; 1170 sp->gen1 = fcport->rscn_gen; 1171 sp->gen2 = fcport->login_gen; 1172 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2, 1173 qla24xx_async_gnl_sp_done); 1174 1175 mb = sp->u.iocb_cmd.u.mbx.out_mb; 1176 mb[0] = MBC_PORT_NODE_NAME_LIST; 1177 mb[1] = BIT_2 | BIT_3; 1178 mb[2] = MSW(vha->gnl.ldma); 1179 mb[3] = LSW(vha->gnl.ldma); 1180 mb[6] = MSW(MSD(vha->gnl.ldma)); 1181 mb[7] = LSW(MSD(vha->gnl.ldma)); 1182 mb[8] = vha->gnl.size; 1183 mb[9] = vha->vp_idx; 1184 1185 ql_dbg(ql_dbg_disc, vha, 0x20da, 1186 "Async-%s - OUT WWPN %8phC hndl %x\n", 1187 sp->name, fcport->port_name, sp->handle); 1188 1189 rval = qla2x00_start_sp(sp); 1190 if (rval != QLA_SUCCESS) 1191 goto done_free_sp; 1192 1193 return rval; 1194 1195 done_free_sp: 1196 /* ref: INIT */ 1197 kref_put(&sp->cmd_kref, qla2x00_sp_release); 1198 fcport->flags &= ~(FCF_ASYNC_SENT); 1199 done: 1200 fcport->flags &= ~(FCF_ASYNC_ACTIVE); 1201 return rval; 1202 } 1203 1204 int qla24xx_post_gnl_work(struct scsi_qla_host *vha, fc_port_t *fcport) 1205 { 1206 struct qla_work_evt *e; 1207 1208 e = qla2x00_alloc_work(vha, QLA_EVT_GNL); 1209 if (!e) 1210 return QLA_FUNCTION_FAILED; 1211 1212 e->u.fcport.fcport = fcport; 1213 fcport->flags |= FCF_ASYNC_ACTIVE; 1214 return qla2x00_post_work(vha, e); 1215 } 1216 1217 static void qla24xx_async_gpdb_sp_done(srb_t *sp, int res) 1218 { 1219 struct scsi_qla_host *vha = sp->vha; 1220 struct qla_hw_data *ha = vha->hw; 1221 fc_port_t *fcport = sp->fcport; 1222 u16 *mb = sp->u.iocb_cmd.u.mbx.in_mb; 1223 struct event_arg ea; 1224 1225 ql_dbg(ql_dbg_disc, vha, 0x20db, 1226 "Async done-%s res %x, WWPN %8phC mb[1]=%x mb[2]=%x \n", 1227 sp->name, res, fcport->port_name, mb[1], mb[2]); 1228 1229 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 1230 1231 if (res == QLA_FUNCTION_TIMEOUT) 1232 goto done; 1233 1234 memset(&ea, 0, sizeof(ea)); 1235 ea.fcport = fcport; 1236 ea.sp = sp; 1237 1238 qla24xx_handle_gpdb_event(vha, &ea); 1239 1240 done: 1241 dma_pool_free(ha->s_dma_pool, sp->u.iocb_cmd.u.mbx.in, 1242 sp->u.iocb_cmd.u.mbx.in_dma); 1243 1244 kref_put(&sp->cmd_kref, qla2x00_sp_release); 1245 } 1246 1247 int qla24xx_post_prli_work(struct scsi_qla_host *vha, fc_port_t *fcport) 1248 { 1249 struct qla_work_evt *e; 1250 1251 if (vha->host->active_mode == MODE_TARGET) 1252 return QLA_FUNCTION_FAILED; 1253 1254 e = qla2x00_alloc_work(vha, QLA_EVT_PRLI); 1255 if (!e) 1256 return QLA_FUNCTION_FAILED; 1257 1258 e->u.fcport.fcport = fcport; 1259 1260 return qla2x00_post_work(vha, e); 1261 } 1262 1263 static void qla2x00_async_prli_sp_done(srb_t *sp, int res) 1264 { 1265 struct scsi_qla_host *vha = sp->vha; 1266 struct srb_iocb *lio = &sp->u.iocb_cmd; 1267 struct event_arg ea; 1268 1269 ql_dbg(ql_dbg_disc, vha, 0x2129, 1270 "%s %8phC res %x\n", __func__, 1271 sp->fcport->port_name, res); 1272 1273 sp->fcport->flags &= ~FCF_ASYNC_SENT; 1274 1275 if (!test_bit(UNLOADING, &vha->dpc_flags)) { 1276 memset(&ea, 0, sizeof(ea)); 1277 ea.fcport = sp->fcport; 1278 ea.data[0] = lio->u.logio.data[0]; 1279 ea.data[1] = lio->u.logio.data[1]; 1280 ea.iop[0] = lio->u.logio.iop[0]; 1281 ea.iop[1] = lio->u.logio.iop[1]; 1282 ea.sp = sp; 1283 if (res == QLA_OS_TIMER_EXPIRED) 1284 ea.data[0] = QLA_OS_TIMER_EXPIRED; 1285 else if (res) 1286 ea.data[0] = MBS_COMMAND_ERROR; 1287 1288 qla24xx_handle_prli_done_event(vha, &ea); 1289 } 1290 1291 kref_put(&sp->cmd_kref, qla2x00_sp_release); 1292 } 1293 1294 int 1295 qla24xx_async_prli(struct scsi_qla_host *vha, fc_port_t *fcport) 1296 { 1297 srb_t *sp; 1298 struct srb_iocb *lio; 1299 int rval = QLA_FUNCTION_FAILED; 1300 1301 if (!vha->flags.online) { 1302 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s %d %8phC exit\n", 1303 __func__, __LINE__, fcport->port_name); 1304 return rval; 1305 } 1306 1307 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND || 1308 fcport->fw_login_state == DSC_LS_PRLI_PEND) && 1309 qla_dual_mode_enabled(vha)) { 1310 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s %d %8phC exit\n", 1311 __func__, __LINE__, fcport->port_name); 1312 return rval; 1313 } 1314 1315 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1316 if (!sp) 1317 return rval; 1318 1319 fcport->flags |= FCF_ASYNC_SENT; 1320 fcport->logout_completed = 0; 1321 1322 sp->type = SRB_PRLI_CMD; 1323 sp->name = "prli"; 1324 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2, 1325 qla2x00_async_prli_sp_done); 1326 1327 lio = &sp->u.iocb_cmd; 1328 lio->u.logio.flags = 0; 1329 1330 if (NVME_TARGET(vha->hw, fcport)) 1331 lio->u.logio.flags |= SRB_LOGIN_NVME_PRLI; 1332 1333 ql_dbg(ql_dbg_disc, vha, 0x211b, 1334 "Async-prli - %8phC hdl=%x, loopid=%x portid=%06x retries=%d fc4type %x priority %x %s.\n", 1335 fcport->port_name, sp->handle, fcport->loop_id, fcport->d_id.b24, 1336 fcport->login_retry, fcport->fc4_type, vha->hw->fc4_type_priority, 1337 NVME_TARGET(vha->hw, fcport) ? "nvme" : "fcp"); 1338 1339 rval = qla2x00_start_sp(sp); 1340 if (rval != QLA_SUCCESS) { 1341 fcport->flags |= FCF_LOGIN_NEEDED; 1342 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1343 goto done_free_sp; 1344 } 1345 1346 return rval; 1347 1348 done_free_sp: 1349 /* ref: INIT */ 1350 kref_put(&sp->cmd_kref, qla2x00_sp_release); 1351 fcport->flags &= ~FCF_ASYNC_SENT; 1352 return rval; 1353 } 1354 1355 int qla24xx_post_gpdb_work(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt) 1356 { 1357 struct qla_work_evt *e; 1358 1359 e = qla2x00_alloc_work(vha, QLA_EVT_GPDB); 1360 if (!e) 1361 return QLA_FUNCTION_FAILED; 1362 1363 e->u.fcport.fcport = fcport; 1364 e->u.fcport.opt = opt; 1365 fcport->flags |= FCF_ASYNC_ACTIVE; 1366 return qla2x00_post_work(vha, e); 1367 } 1368 1369 int qla24xx_async_gpdb(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt) 1370 { 1371 srb_t *sp; 1372 struct srb_iocb *mbx; 1373 int rval = QLA_FUNCTION_FAILED; 1374 u16 *mb; 1375 dma_addr_t pd_dma; 1376 struct port_database_24xx *pd; 1377 struct qla_hw_data *ha = vha->hw; 1378 1379 if (IS_SESSION_DELETED(fcport)) { 1380 ql_log(ql_log_warn, vha, 0xffff, 1381 "%s: %8phC is being delete - not sending command.\n", 1382 __func__, fcport->port_name); 1383 fcport->flags &= ~FCF_ASYNC_ACTIVE; 1384 return rval; 1385 } 1386 1387 if (!vha->flags.online || fcport->flags & FCF_ASYNC_SENT) { 1388 ql_log(ql_log_warn, vha, 0xffff, 1389 "%s: %8phC online %d flags %x - not sending command.\n", 1390 __func__, fcport->port_name, vha->flags.online, fcport->flags); 1391 goto done; 1392 } 1393 1394 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1395 if (!sp) 1396 goto done; 1397 1398 qla2x00_set_fcport_disc_state(fcport, DSC_GPDB); 1399 1400 fcport->flags |= FCF_ASYNC_SENT; 1401 sp->type = SRB_MB_IOCB; 1402 sp->name = "gpdb"; 1403 sp->gen1 = fcport->rscn_gen; 1404 sp->gen2 = fcport->login_gen; 1405 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2, 1406 qla24xx_async_gpdb_sp_done); 1407 1408 pd = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma); 1409 if (pd == NULL) { 1410 ql_log(ql_log_warn, vha, 0xd043, 1411 "Failed to allocate port database structure.\n"); 1412 goto done_free_sp; 1413 } 1414 1415 mb = sp->u.iocb_cmd.u.mbx.out_mb; 1416 mb[0] = MBC_GET_PORT_DATABASE; 1417 mb[1] = fcport->loop_id; 1418 mb[2] = MSW(pd_dma); 1419 mb[3] = LSW(pd_dma); 1420 mb[6] = MSW(MSD(pd_dma)); 1421 mb[7] = LSW(MSD(pd_dma)); 1422 mb[9] = vha->vp_idx; 1423 mb[10] = opt; 1424 1425 mbx = &sp->u.iocb_cmd; 1426 mbx->u.mbx.in = (void *)pd; 1427 mbx->u.mbx.in_dma = pd_dma; 1428 1429 ql_dbg(ql_dbg_disc, vha, 0x20dc, 1430 "Async-%s %8phC hndl %x opt %x\n", 1431 sp->name, fcport->port_name, sp->handle, opt); 1432 1433 rval = qla2x00_start_sp(sp); 1434 if (rval != QLA_SUCCESS) 1435 goto done_free_sp; 1436 return rval; 1437 1438 done_free_sp: 1439 if (pd) 1440 dma_pool_free(ha->s_dma_pool, pd, pd_dma); 1441 1442 kref_put(&sp->cmd_kref, qla2x00_sp_release); 1443 fcport->flags &= ~FCF_ASYNC_SENT; 1444 done: 1445 fcport->flags &= ~FCF_ASYNC_ACTIVE; 1446 qla24xx_post_gpdb_work(vha, fcport, opt); 1447 return rval; 1448 } 1449 1450 static 1451 void __qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea) 1452 { 1453 unsigned long flags; 1454 1455 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1456 ea->fcport->login_gen++; 1457 ea->fcport->logout_on_delete = 1; 1458 1459 if (!ea->fcport->login_succ && !IS_SW_RESV_ADDR(ea->fcport->d_id)) { 1460 vha->fcport_count++; 1461 ea->fcport->login_succ = 1; 1462 1463 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1464 qla24xx_sched_upd_fcport(ea->fcport); 1465 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1466 } else if (ea->fcport->login_succ) { 1467 /* 1468 * We have an existing session. A late RSCN delivery 1469 * must have triggered the session to be re-validate. 1470 * Session is still valid. 1471 */ 1472 ql_dbg(ql_dbg_disc, vha, 0x20d6, 1473 "%s %d %8phC session revalidate success\n", 1474 __func__, __LINE__, ea->fcport->port_name); 1475 qla2x00_set_fcport_disc_state(ea->fcport, DSC_LOGIN_COMPLETE); 1476 } 1477 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1478 } 1479 1480 static int qla_chk_secure_login(scsi_qla_host_t *vha, fc_port_t *fcport, 1481 struct port_database_24xx *pd) 1482 { 1483 int rc = 0; 1484 1485 if (pd->secure_login) { 1486 ql_dbg(ql_dbg_disc, vha, 0x104d, 1487 "Secure Login established on %8phC\n", 1488 fcport->port_name); 1489 fcport->flags |= FCF_FCSP_DEVICE; 1490 } else { 1491 ql_dbg(ql_dbg_disc, vha, 0x104d, 1492 "non-Secure Login %8phC", 1493 fcport->port_name); 1494 fcport->flags &= ~FCF_FCSP_DEVICE; 1495 } 1496 if (vha->hw->flags.edif_enabled) { 1497 if (fcport->flags & FCF_FCSP_DEVICE) { 1498 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_AUTH_PEND); 1499 /* Start edif prli timer & ring doorbell for app */ 1500 fcport->edif.rx_sa_set = 0; 1501 fcport->edif.tx_sa_set = 0; 1502 fcport->edif.rx_sa_pending = 0; 1503 fcport->edif.tx_sa_pending = 0; 1504 1505 qla2x00_post_aen_work(vha, FCH_EVT_PORT_ONLINE, 1506 fcport->d_id.b24); 1507 1508 if (DBELL_ACTIVE(vha)) { 1509 ql_dbg(ql_dbg_disc, vha, 0x20ef, 1510 "%s %d %8phC EDIF: post DB_AUTH: AUTH needed\n", 1511 __func__, __LINE__, fcport->port_name); 1512 fcport->edif.app_sess_online = 1; 1513 1514 qla_edb_eventcreate(vha, VND_CMD_AUTH_STATE_NEEDED, 1515 fcport->d_id.b24, 0, fcport); 1516 } 1517 1518 rc = 1; 1519 } else if (qla_ini_mode_enabled(vha) || qla_dual_mode_enabled(vha)) { 1520 ql_dbg(ql_dbg_disc, vha, 0x2117, 1521 "%s %d %8phC post prli\n", 1522 __func__, __LINE__, fcport->port_name); 1523 qla24xx_post_prli_work(vha, fcport); 1524 rc = 1; 1525 } 1526 } 1527 return rc; 1528 } 1529 1530 static 1531 void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea) 1532 { 1533 fc_port_t *fcport = ea->fcport; 1534 struct port_database_24xx *pd; 1535 struct srb *sp = ea->sp; 1536 uint8_t ls; 1537 1538 pd = (struct port_database_24xx *)sp->u.iocb_cmd.u.mbx.in; 1539 1540 fcport->flags &= ~FCF_ASYNC_SENT; 1541 1542 ql_dbg(ql_dbg_disc, vha, 0x20d2, 1543 "%s %8phC DS %d LS %x fc4_type %x rc %x\n", __func__, 1544 fcport->port_name, fcport->disc_state, pd->current_login_state, 1545 fcport->fc4_type, ea->rc); 1546 1547 if (fcport->disc_state == DSC_DELETE_PEND) { 1548 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC\n", 1549 __func__, __LINE__, fcport->port_name); 1550 return; 1551 } 1552 1553 if (NVME_TARGET(vha->hw, fcport)) 1554 ls = pd->current_login_state >> 4; 1555 else 1556 ls = pd->current_login_state & 0xf; 1557 1558 if (ea->sp->gen2 != fcport->login_gen) { 1559 /* target side must have changed it. */ 1560 1561 ql_dbg(ql_dbg_disc, vha, 0x20d3, 1562 "%s %8phC generation changed\n", 1563 __func__, fcport->port_name); 1564 return; 1565 } else if (ea->sp->gen1 != fcport->rscn_gen) { 1566 qla_rscn_replay(fcport); 1567 qlt_schedule_sess_for_deletion(fcport); 1568 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC, ls %x\n", 1569 __func__, __LINE__, fcport->port_name, ls); 1570 return; 1571 } 1572 1573 switch (ls) { 1574 case PDS_PRLI_COMPLETE: 1575 __qla24xx_parse_gpdb(vha, fcport, pd); 1576 break; 1577 case PDS_PLOGI_COMPLETE: 1578 if (qla_chk_secure_login(vha, fcport, pd)) { 1579 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC, ls %x\n", 1580 __func__, __LINE__, fcport->port_name, ls); 1581 return; 1582 } 1583 fallthrough; 1584 case PDS_PLOGI_PENDING: 1585 case PDS_PRLI_PENDING: 1586 case PDS_PRLI2_PENDING: 1587 /* Set discovery state back to GNL to Relogin attempt */ 1588 if (qla_dual_mode_enabled(vha) || 1589 qla_ini_mode_enabled(vha)) { 1590 qla2x00_set_fcport_disc_state(fcport, DSC_GNL); 1591 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1592 } 1593 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC, ls %x\n", 1594 __func__, __LINE__, fcport->port_name, ls); 1595 return; 1596 case PDS_LOGO_PENDING: 1597 case PDS_PORT_UNAVAILABLE: 1598 default: 1599 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC post del sess\n", 1600 __func__, __LINE__, fcport->port_name); 1601 qlt_schedule_sess_for_deletion(fcport); 1602 return; 1603 } 1604 __qla24xx_handle_gpdb_event(vha, ea); 1605 } /* gpdb event */ 1606 1607 static void qla_chk_n2n_b4_login(struct scsi_qla_host *vha, fc_port_t *fcport) 1608 { 1609 u8 login = 0; 1610 int rc; 1611 1612 ql_dbg(ql_dbg_disc, vha, 0x307b, 1613 "%s %8phC DS %d LS %d lid %d retries=%d\n", 1614 __func__, fcport->port_name, fcport->disc_state, 1615 fcport->fw_login_state, fcport->loop_id, fcport->login_retry); 1616 1617 if (qla_tgt_mode_enabled(vha)) 1618 return; 1619 1620 if (qla_dual_mode_enabled(vha)) { 1621 if (N2N_TOPO(vha->hw)) { 1622 u64 mywwn, wwn; 1623 1624 mywwn = wwn_to_u64(vha->port_name); 1625 wwn = wwn_to_u64(fcport->port_name); 1626 if (mywwn > wwn) 1627 login = 1; 1628 else if ((fcport->fw_login_state == DSC_LS_PLOGI_COMP) 1629 && time_after_eq(jiffies, 1630 fcport->plogi_nack_done_deadline)) 1631 login = 1; 1632 } else { 1633 login = 1; 1634 } 1635 } else { 1636 /* initiator mode */ 1637 login = 1; 1638 } 1639 1640 if (login && fcport->login_retry) { 1641 fcport->login_retry--; 1642 if (fcport->loop_id == FC_NO_LOOP_ID) { 1643 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 1644 rc = qla2x00_find_new_loop_id(vha, fcport); 1645 if (rc) { 1646 ql_dbg(ql_dbg_disc, vha, 0x20e6, 1647 "%s %d %8phC post del sess - out of loopid\n", 1648 __func__, __LINE__, fcport->port_name); 1649 fcport->scan_state = 0; 1650 qlt_schedule_sess_for_deletion(fcport); 1651 return; 1652 } 1653 } 1654 ql_dbg(ql_dbg_disc, vha, 0x20bf, 1655 "%s %d %8phC post login\n", 1656 __func__, __LINE__, fcport->port_name); 1657 qla2x00_post_async_login_work(vha, fcport, NULL); 1658 } 1659 } 1660 1661 int qla24xx_fcport_handle_login(struct scsi_qla_host *vha, fc_port_t *fcport) 1662 { 1663 u16 data[2]; 1664 u16 sec; 1665 1666 ql_dbg(ql_dbg_disc, vha, 0x20d8, 1667 "%s %8phC DS %d LS %d P %d fl %x confl %p rscn %d|%d login %d lid %d scan %d fc4type %x\n", 1668 __func__, fcport->port_name, fcport->disc_state, 1669 fcport->fw_login_state, fcport->login_pause, fcport->flags, 1670 fcport->conflict, fcport->last_rscn_gen, fcport->rscn_gen, 1671 fcport->login_gen, fcport->loop_id, fcport->scan_state, 1672 fcport->fc4_type); 1673 1674 if (fcport->scan_state != QLA_FCPORT_FOUND || 1675 fcport->disc_state == DSC_DELETE_PEND) 1676 return 0; 1677 1678 if ((fcport->loop_id != FC_NO_LOOP_ID) && 1679 qla_dual_mode_enabled(vha) && 1680 ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || 1681 (fcport->fw_login_state == DSC_LS_PRLI_PEND))) 1682 return 0; 1683 1684 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP && 1685 !N2N_TOPO(vha->hw)) { 1686 if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) { 1687 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1688 return 0; 1689 } 1690 } 1691 1692 /* Target won't initiate port login if fabric is present */ 1693 if (vha->host->active_mode == MODE_TARGET && !N2N_TOPO(vha->hw)) 1694 return 0; 1695 1696 if (fcport->flags & (FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE)) { 1697 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1698 return 0; 1699 } 1700 1701 switch (fcport->disc_state) { 1702 case DSC_DELETED: 1703 switch (vha->hw->current_topology) { 1704 case ISP_CFG_N: 1705 if (fcport_is_smaller(fcport)) { 1706 /* this adapter is bigger */ 1707 if (fcport->login_retry) { 1708 if (fcport->loop_id == FC_NO_LOOP_ID) { 1709 qla2x00_find_new_loop_id(vha, 1710 fcport); 1711 fcport->fw_login_state = 1712 DSC_LS_PORT_UNAVAIL; 1713 } 1714 fcport->login_retry--; 1715 qla_post_els_plogi_work(vha, fcport); 1716 } else { 1717 ql_log(ql_log_info, vha, 0x705d, 1718 "Unable to reach remote port %8phC", 1719 fcport->port_name); 1720 } 1721 } else { 1722 qla24xx_post_gnl_work(vha, fcport); 1723 } 1724 break; 1725 default: 1726 if (fcport->loop_id == FC_NO_LOOP_ID) { 1727 ql_dbg(ql_dbg_disc, vha, 0x20bd, 1728 "%s %d %8phC post gnl\n", 1729 __func__, __LINE__, fcport->port_name); 1730 qla24xx_post_gnl_work(vha, fcport); 1731 } else { 1732 qla_chk_n2n_b4_login(vha, fcport); 1733 } 1734 break; 1735 } 1736 break; 1737 1738 case DSC_GNL: 1739 switch (vha->hw->current_topology) { 1740 case ISP_CFG_N: 1741 if ((fcport->current_login_state & 0xf) == 0x6) { 1742 ql_dbg(ql_dbg_disc, vha, 0x2118, 1743 "%s %d %8phC post GPDB work\n", 1744 __func__, __LINE__, fcport->port_name); 1745 fcport->chip_reset = 1746 vha->hw->base_qpair->chip_reset; 1747 qla24xx_post_gpdb_work(vha, fcport, 0); 1748 } else { 1749 ql_dbg(ql_dbg_disc, vha, 0x2118, 1750 "%s %d %8phC post %s PRLI\n", 1751 __func__, __LINE__, fcport->port_name, 1752 NVME_TARGET(vha->hw, fcport) ? "NVME" : 1753 "FC"); 1754 qla24xx_post_prli_work(vha, fcport); 1755 } 1756 break; 1757 default: 1758 if (fcport->login_pause) { 1759 ql_dbg(ql_dbg_disc, vha, 0x20d8, 1760 "%s %d %8phC exit\n", 1761 __func__, __LINE__, 1762 fcport->port_name); 1763 fcport->last_rscn_gen = fcport->rscn_gen; 1764 fcport->last_login_gen = fcport->login_gen; 1765 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1766 break; 1767 } 1768 qla_chk_n2n_b4_login(vha, fcport); 1769 break; 1770 } 1771 break; 1772 1773 case DSC_LOGIN_FAILED: 1774 if (N2N_TOPO(vha->hw)) 1775 qla_chk_n2n_b4_login(vha, fcport); 1776 else 1777 qlt_schedule_sess_for_deletion(fcport); 1778 break; 1779 1780 case DSC_LOGIN_COMPLETE: 1781 /* recheck login state */ 1782 data[0] = data[1] = 0; 1783 qla2x00_post_async_adisc_work(vha, fcport, data); 1784 break; 1785 1786 case DSC_LOGIN_PEND: 1787 if (vha->hw->flags.edif_enabled) 1788 break; 1789 1790 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) { 1791 ql_dbg(ql_dbg_disc, vha, 0x2118, 1792 "%s %d %8phC post %s PRLI\n", 1793 __func__, __LINE__, fcport->port_name, 1794 NVME_TARGET(vha->hw, fcport) ? "NVME" : "FC"); 1795 qla24xx_post_prli_work(vha, fcport); 1796 } 1797 break; 1798 1799 case DSC_UPD_FCPORT: 1800 sec = jiffies_to_msecs(jiffies - 1801 fcport->jiffies_at_registration)/1000; 1802 if (fcport->sec_since_registration < sec && sec && 1803 !(sec % 60)) { 1804 fcport->sec_since_registration = sec; 1805 ql_dbg(ql_dbg_disc, fcport->vha, 0xffff, 1806 "%s %8phC - Slow Rport registration(%d Sec)\n", 1807 __func__, fcport->port_name, sec); 1808 } 1809 1810 if (fcport->next_disc_state != DSC_DELETE_PEND) 1811 fcport->next_disc_state = DSC_ADISC; 1812 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1813 break; 1814 1815 default: 1816 break; 1817 } 1818 1819 return 0; 1820 } 1821 1822 int qla24xx_post_newsess_work(struct scsi_qla_host *vha, port_id_t *id, 1823 u8 *port_name, u8 *node_name, void *pla, u8 fc4_type) 1824 { 1825 struct qla_work_evt *e; 1826 1827 e = qla2x00_alloc_work(vha, QLA_EVT_NEW_SESS); 1828 if (!e) 1829 return QLA_FUNCTION_FAILED; 1830 1831 e->u.new_sess.id = *id; 1832 e->u.new_sess.pla = pla; 1833 e->u.new_sess.fc4_type = fc4_type; 1834 memcpy(e->u.new_sess.port_name, port_name, WWN_SIZE); 1835 if (node_name) 1836 memcpy(e->u.new_sess.node_name, node_name, WWN_SIZE); 1837 1838 return qla2x00_post_work(vha, e); 1839 } 1840 1841 void qla2x00_handle_rscn(scsi_qla_host_t *vha, struct event_arg *ea) 1842 { 1843 fc_port_t *fcport; 1844 unsigned long flags; 1845 1846 switch (ea->id.b.rsvd_1) { 1847 case RSCN_PORT_ADDR: 1848 fcport = qla2x00_find_fcport_by_nportid(vha, &ea->id, 1); 1849 if (fcport) { 1850 if (ql2xfc2target && 1851 fcport->flags & FCF_FCP2_DEVICE && 1852 atomic_read(&fcport->state) == FCS_ONLINE) { 1853 ql_dbg(ql_dbg_disc, vha, 0x2115, 1854 "Delaying session delete for FCP2 portid=%06x %8phC ", 1855 fcport->d_id.b24, fcport->port_name); 1856 return; 1857 } 1858 1859 if (vha->hw->flags.edif_enabled && DBELL_ACTIVE(vha)) { 1860 /* 1861 * On ipsec start by remote port, Target port 1862 * may use RSCN to trigger initiator to 1863 * relogin. If driver is already in the 1864 * process of a relogin, then ignore the RSCN 1865 * and allow the current relogin to continue. 1866 * This reduces thrashing of the connection. 1867 */ 1868 if (atomic_read(&fcport->state) == FCS_ONLINE) { 1869 /* 1870 * If state = online, then set scan_needed=1 to do relogin. 1871 * Otherwise we're already in the middle of a relogin 1872 */ 1873 fcport->scan_needed = 1; 1874 fcport->rscn_gen++; 1875 } 1876 } else { 1877 fcport->scan_needed = 1; 1878 fcport->rscn_gen++; 1879 } 1880 } 1881 break; 1882 case RSCN_AREA_ADDR: 1883 list_for_each_entry(fcport, &vha->vp_fcports, list) { 1884 if (fcport->flags & FCF_FCP2_DEVICE && 1885 atomic_read(&fcport->state) == FCS_ONLINE) 1886 continue; 1887 1888 if ((ea->id.b24 & 0xffff00) == (fcport->d_id.b24 & 0xffff00)) { 1889 fcport->scan_needed = 1; 1890 fcport->rscn_gen++; 1891 } 1892 } 1893 break; 1894 case RSCN_DOM_ADDR: 1895 list_for_each_entry(fcport, &vha->vp_fcports, list) { 1896 if (fcport->flags & FCF_FCP2_DEVICE && 1897 atomic_read(&fcport->state) == FCS_ONLINE) 1898 continue; 1899 1900 if ((ea->id.b24 & 0xff0000) == (fcport->d_id.b24 & 0xff0000)) { 1901 fcport->scan_needed = 1; 1902 fcport->rscn_gen++; 1903 } 1904 } 1905 break; 1906 case RSCN_FAB_ADDR: 1907 default: 1908 list_for_each_entry(fcport, &vha->vp_fcports, list) { 1909 if (fcport->flags & FCF_FCP2_DEVICE && 1910 atomic_read(&fcport->state) == FCS_ONLINE) 1911 continue; 1912 1913 fcport->scan_needed = 1; 1914 fcport->rscn_gen++; 1915 } 1916 break; 1917 } 1918 1919 spin_lock_irqsave(&vha->work_lock, flags); 1920 if (vha->scan.scan_flags == 0) { 1921 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s: schedule\n", __func__); 1922 vha->scan.scan_flags |= SF_QUEUED; 1923 schedule_delayed_work(&vha->scan.scan_work, 5); 1924 } 1925 spin_unlock_irqrestore(&vha->work_lock, flags); 1926 } 1927 1928 void qla24xx_handle_relogin_event(scsi_qla_host_t *vha, 1929 struct event_arg *ea) 1930 { 1931 fc_port_t *fcport = ea->fcport; 1932 1933 if (test_bit(UNLOADING, &vha->dpc_flags)) 1934 return; 1935 1936 ql_dbg(ql_dbg_disc, vha, 0x2102, 1937 "%s %8phC DS %d LS %d P %d del %d cnfl %p rscn %d|%d login %d|%d fl %x\n", 1938 __func__, fcport->port_name, fcport->disc_state, 1939 fcport->fw_login_state, fcport->login_pause, 1940 fcport->deleted, fcport->conflict, 1941 fcport->last_rscn_gen, fcport->rscn_gen, 1942 fcport->last_login_gen, fcport->login_gen, 1943 fcport->flags); 1944 1945 if (fcport->last_rscn_gen != fcport->rscn_gen) { 1946 ql_dbg(ql_dbg_disc, vha, 0x20e9, "%s %d %8phC post gnl\n", 1947 __func__, __LINE__, fcport->port_name); 1948 qla24xx_post_gnl_work(vha, fcport); 1949 return; 1950 } 1951 1952 qla24xx_fcport_handle_login(vha, fcport); 1953 } 1954 1955 void qla_handle_els_plogi_done(scsi_qla_host_t *vha, 1956 struct event_arg *ea) 1957 { 1958 if (N2N_TOPO(vha->hw) && fcport_is_smaller(ea->fcport) && 1959 vha->hw->flags.edif_enabled) { 1960 /* check to see if App support Secure */ 1961 qla24xx_post_gpdb_work(vha, ea->fcport, 0); 1962 return; 1963 } 1964 1965 /* for pure Target Mode, PRLI will not be initiated */ 1966 if (vha->host->active_mode == MODE_TARGET) 1967 return; 1968 1969 ql_dbg(ql_dbg_disc, vha, 0x2118, 1970 "%s %d %8phC post PRLI\n", 1971 __func__, __LINE__, ea->fcport->port_name); 1972 qla24xx_post_prli_work(vha, ea->fcport); 1973 } 1974 1975 /* 1976 * RSCN(s) came in for this fcport, but the RSCN(s) was not able 1977 * to be consumed by the fcport 1978 */ 1979 void qla_rscn_replay(fc_port_t *fcport) 1980 { 1981 struct event_arg ea; 1982 1983 switch (fcport->disc_state) { 1984 case DSC_DELETE_PEND: 1985 return; 1986 default: 1987 break; 1988 } 1989 1990 if (fcport->scan_needed) { 1991 memset(&ea, 0, sizeof(ea)); 1992 ea.id = fcport->d_id; 1993 ea.id.b.rsvd_1 = RSCN_PORT_ADDR; 1994 qla2x00_handle_rscn(fcport->vha, &ea); 1995 } 1996 } 1997 1998 static void 1999 qla2x00_tmf_iocb_timeout(void *data) 2000 { 2001 srb_t *sp = data; 2002 struct srb_iocb *tmf = &sp->u.iocb_cmd; 2003 int rc, h; 2004 unsigned long flags; 2005 2006 if (sp->type == SRB_MARKER) 2007 rc = QLA_FUNCTION_FAILED; 2008 else 2009 rc = qla24xx_async_abort_cmd(sp, false); 2010 2011 if (rc) { 2012 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags); 2013 for (h = 1; h < sp->qpair->req->num_outstanding_cmds; h++) { 2014 if (sp->qpair->req->outstanding_cmds[h] == sp) { 2015 sp->qpair->req->outstanding_cmds[h] = NULL; 2016 qla_put_fw_resources(sp->qpair, &sp->iores); 2017 break; 2018 } 2019 } 2020 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags); 2021 tmf->u.tmf.comp_status = cpu_to_le16(CS_TIMEOUT); 2022 tmf->u.tmf.data = QLA_FUNCTION_FAILED; 2023 complete(&tmf->u.tmf.comp); 2024 } 2025 } 2026 2027 static void qla_marker_sp_done(srb_t *sp, int res) 2028 { 2029 struct srb_iocb *tmf = &sp->u.iocb_cmd; 2030 2031 if (res != QLA_SUCCESS) 2032 ql_dbg(ql_dbg_taskm, sp->vha, 0x8004, 2033 "Async-marker fail hdl=%x portid=%06x ctrl=%x lun=%lld qp=%d.\n", 2034 sp->handle, sp->fcport->d_id.b24, sp->u.iocb_cmd.u.tmf.flags, 2035 sp->u.iocb_cmd.u.tmf.lun, sp->qpair->id); 2036 2037 sp->u.iocb_cmd.u.tmf.data = res; 2038 complete(&tmf->u.tmf.comp); 2039 } 2040 2041 #define START_SP_W_RETRIES(_sp, _rval, _chip_gen, _login_gen) \ 2042 {\ 2043 int cnt = 5; \ 2044 do { \ 2045 if (_chip_gen != sp->vha->hw->chip_reset || _login_gen != sp->fcport->login_gen) {\ 2046 _rval = EINVAL; \ 2047 break; \ 2048 } \ 2049 _rval = qla2x00_start_sp(_sp); \ 2050 if (_rval == EAGAIN) \ 2051 msleep(1); \ 2052 else \ 2053 break; \ 2054 cnt--; \ 2055 } while (cnt); \ 2056 } 2057 2058 /** 2059 * qla26xx_marker: send marker IOCB and wait for the completion of it. 2060 * @arg: pointer to argument list. 2061 * It is assume caller will provide an fcport pointer and modifier 2062 */ 2063 static int 2064 qla26xx_marker(struct tmf_arg *arg) 2065 { 2066 struct scsi_qla_host *vha = arg->vha; 2067 struct srb_iocb *tm_iocb; 2068 srb_t *sp; 2069 int rval = QLA_FUNCTION_FAILED; 2070 fc_port_t *fcport = arg->fcport; 2071 u32 chip_gen, login_gen; 2072 2073 if (TMF_NOT_READY(arg->fcport)) { 2074 ql_dbg(ql_dbg_taskm, vha, 0x8039, 2075 "FC port not ready for marker loop-id=%x portid=%06x modifier=%x lun=%lld qp=%d.\n", 2076 fcport->loop_id, fcport->d_id.b24, 2077 arg->modifier, arg->lun, arg->qpair->id); 2078 return QLA_SUSPENDED; 2079 } 2080 2081 chip_gen = vha->hw->chip_reset; 2082 login_gen = fcport->login_gen; 2083 2084 /* ref: INIT */ 2085 sp = qla2xxx_get_qpair_sp(vha, arg->qpair, fcport, GFP_KERNEL); 2086 if (!sp) 2087 goto done; 2088 2089 sp->type = SRB_MARKER; 2090 sp->name = "marker"; 2091 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha), qla_marker_sp_done); 2092 sp->u.iocb_cmd.timeout = qla2x00_tmf_iocb_timeout; 2093 2094 tm_iocb = &sp->u.iocb_cmd; 2095 init_completion(&tm_iocb->u.tmf.comp); 2096 tm_iocb->u.tmf.modifier = arg->modifier; 2097 tm_iocb->u.tmf.lun = arg->lun; 2098 tm_iocb->u.tmf.loop_id = fcport->loop_id; 2099 tm_iocb->u.tmf.vp_index = vha->vp_idx; 2100 2101 START_SP_W_RETRIES(sp, rval, chip_gen, login_gen); 2102 2103 ql_dbg(ql_dbg_taskm, vha, 0x8006, 2104 "Async-marker hdl=%x loop-id=%x portid=%06x modifier=%x lun=%lld qp=%d rval %d.\n", 2105 sp->handle, fcport->loop_id, fcport->d_id.b24, 2106 arg->modifier, arg->lun, sp->qpair->id, rval); 2107 2108 if (rval != QLA_SUCCESS) { 2109 ql_log(ql_log_warn, vha, 0x8031, 2110 "Marker IOCB send failure (%x).\n", rval); 2111 goto done_free_sp; 2112 } 2113 2114 wait_for_completion(&tm_iocb->u.tmf.comp); 2115 rval = tm_iocb->u.tmf.data; 2116 2117 if (rval != QLA_SUCCESS) { 2118 ql_log(ql_log_warn, vha, 0x8019, 2119 "Marker failed hdl=%x loop-id=%x portid=%06x modifier=%x lun=%lld qp=%d rval %d.\n", 2120 sp->handle, fcport->loop_id, fcport->d_id.b24, 2121 arg->modifier, arg->lun, sp->qpair->id, rval); 2122 } 2123 2124 done_free_sp: 2125 /* ref: INIT */ 2126 kref_put(&sp->cmd_kref, qla2x00_sp_release); 2127 done: 2128 return rval; 2129 } 2130 2131 static void qla2x00_tmf_sp_done(srb_t *sp, int res) 2132 { 2133 struct srb_iocb *tmf = &sp->u.iocb_cmd; 2134 2135 if (res) 2136 tmf->u.tmf.data = res; 2137 complete(&tmf->u.tmf.comp); 2138 } 2139 2140 static int qla_tmf_wait(struct tmf_arg *arg) 2141 { 2142 /* there are only 2 types of error handling that reaches here, lun or target reset */ 2143 if (arg->flags & (TCF_LUN_RESET | TCF_ABORT_TASK_SET | TCF_CLEAR_TASK_SET)) 2144 return qla2x00_eh_wait_for_pending_commands(arg->vha, 2145 arg->fcport->d_id.b24, arg->lun, WAIT_LUN); 2146 else 2147 return qla2x00_eh_wait_for_pending_commands(arg->vha, 2148 arg->fcport->d_id.b24, arg->lun, WAIT_TARGET); 2149 } 2150 2151 static int 2152 __qla2x00_async_tm_cmd(struct tmf_arg *arg) 2153 { 2154 struct scsi_qla_host *vha = arg->vha; 2155 struct srb_iocb *tm_iocb; 2156 srb_t *sp; 2157 int rval = QLA_FUNCTION_FAILED; 2158 fc_port_t *fcport = arg->fcport; 2159 u32 chip_gen, login_gen; 2160 u64 jif; 2161 2162 if (TMF_NOT_READY(arg->fcport)) { 2163 ql_dbg(ql_dbg_taskm, vha, 0x8032, 2164 "FC port not ready for TM command loop-id=%x portid=%06x modifier=%x lun=%lld qp=%d.\n", 2165 fcport->loop_id, fcport->d_id.b24, 2166 arg->modifier, arg->lun, arg->qpair->id); 2167 return QLA_SUSPENDED; 2168 } 2169 2170 chip_gen = vha->hw->chip_reset; 2171 login_gen = fcport->login_gen; 2172 2173 /* ref: INIT */ 2174 sp = qla2xxx_get_qpair_sp(vha, arg->qpair, fcport, GFP_KERNEL); 2175 if (!sp) 2176 goto done; 2177 2178 qla_vha_mark_busy(vha); 2179 sp->type = SRB_TM_CMD; 2180 sp->name = "tmf"; 2181 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha), 2182 qla2x00_tmf_sp_done); 2183 sp->u.iocb_cmd.timeout = qla2x00_tmf_iocb_timeout; 2184 2185 tm_iocb = &sp->u.iocb_cmd; 2186 init_completion(&tm_iocb->u.tmf.comp); 2187 tm_iocb->u.tmf.flags = arg->flags; 2188 tm_iocb->u.tmf.lun = arg->lun; 2189 2190 START_SP_W_RETRIES(sp, rval, chip_gen, login_gen); 2191 2192 ql_dbg(ql_dbg_taskm, vha, 0x802f, 2193 "Async-tmf hdl=%x loop-id=%x portid=%06x ctrl=%x lun=%lld qp=%d rval=%x.\n", 2194 sp->handle, fcport->loop_id, fcport->d_id.b24, 2195 arg->flags, arg->lun, sp->qpair->id, rval); 2196 2197 if (rval != QLA_SUCCESS) 2198 goto done_free_sp; 2199 wait_for_completion(&tm_iocb->u.tmf.comp); 2200 2201 rval = tm_iocb->u.tmf.data; 2202 2203 if (rval != QLA_SUCCESS) { 2204 ql_log(ql_log_warn, vha, 0x8030, 2205 "TM IOCB failed (%x).\n", rval); 2206 } 2207 2208 if (!test_bit(UNLOADING, &vha->dpc_flags) && !IS_QLAFX00(vha->hw)) { 2209 jif = jiffies; 2210 if (qla_tmf_wait(arg)) { 2211 ql_log(ql_log_info, vha, 0x803e, 2212 "Waited %u ms Nexus=%ld:%06x:%llu.\n", 2213 jiffies_to_msecs(jiffies - jif), vha->host_no, 2214 fcport->d_id.b24, arg->lun); 2215 } 2216 2217 if (chip_gen == vha->hw->chip_reset && login_gen == fcport->login_gen) { 2218 rval = qla26xx_marker(arg); 2219 } else { 2220 ql_log(ql_log_info, vha, 0x803e, 2221 "Skip Marker due to disruption. Nexus=%ld:%06x:%llu.\n", 2222 vha->host_no, fcport->d_id.b24, arg->lun); 2223 rval = QLA_FUNCTION_FAILED; 2224 } 2225 } 2226 2227 done_free_sp: 2228 /* ref: INIT */ 2229 kref_put(&sp->cmd_kref, qla2x00_sp_release); 2230 done: 2231 return rval; 2232 } 2233 2234 static void qla_put_tmf(struct tmf_arg *arg) 2235 { 2236 struct scsi_qla_host *vha = arg->vha; 2237 struct qla_hw_data *ha = vha->hw; 2238 unsigned long flags; 2239 2240 spin_lock_irqsave(&ha->tgt.sess_lock, flags); 2241 ha->active_tmf--; 2242 list_del(&arg->tmf_elem); 2243 spin_unlock_irqrestore(&ha->tgt.sess_lock, flags); 2244 } 2245 2246 static 2247 int qla_get_tmf(struct tmf_arg *arg) 2248 { 2249 struct scsi_qla_host *vha = arg->vha; 2250 struct qla_hw_data *ha = vha->hw; 2251 unsigned long flags; 2252 fc_port_t *fcport = arg->fcport; 2253 int rc = 0; 2254 struct tmf_arg *t; 2255 2256 spin_lock_irqsave(&ha->tgt.sess_lock, flags); 2257 list_for_each_entry(t, &ha->tmf_active, tmf_elem) { 2258 if (t->fcport == arg->fcport && t->lun == arg->lun) { 2259 /* reject duplicate TMF */ 2260 ql_log(ql_log_warn, vha, 0x802c, 2261 "found duplicate TMF. Nexus=%ld:%06x:%llu.\n", 2262 vha->host_no, fcport->d_id.b24, arg->lun); 2263 spin_unlock_irqrestore(&ha->tgt.sess_lock, flags); 2264 return -EINVAL; 2265 } 2266 } 2267 2268 list_add_tail(&arg->tmf_elem, &ha->tmf_pending); 2269 while (ha->active_tmf >= MAX_ACTIVE_TMF) { 2270 spin_unlock_irqrestore(&ha->tgt.sess_lock, flags); 2271 2272 msleep(1); 2273 2274 spin_lock_irqsave(&ha->tgt.sess_lock, flags); 2275 if (TMF_NOT_READY(fcport)) { 2276 ql_log(ql_log_warn, vha, 0x802c, 2277 "Unable to acquire TM resource due to disruption.\n"); 2278 rc = EIO; 2279 break; 2280 } 2281 if (ha->active_tmf < MAX_ACTIVE_TMF && 2282 list_is_first(&arg->tmf_elem, &ha->tmf_pending)) 2283 break; 2284 } 2285 2286 list_del(&arg->tmf_elem); 2287 2288 if (!rc) { 2289 ha->active_tmf++; 2290 list_add_tail(&arg->tmf_elem, &ha->tmf_active); 2291 } 2292 2293 spin_unlock_irqrestore(&ha->tgt.sess_lock, flags); 2294 2295 return rc; 2296 } 2297 2298 int 2299 qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint64_t lun, 2300 uint32_t tag) 2301 { 2302 struct scsi_qla_host *vha = fcport->vha; 2303 struct tmf_arg a; 2304 int rval = QLA_SUCCESS; 2305 2306 if (TMF_NOT_READY(fcport)) 2307 return QLA_SUSPENDED; 2308 2309 a.vha = fcport->vha; 2310 a.fcport = fcport; 2311 a.lun = lun; 2312 a.flags = flags; 2313 INIT_LIST_HEAD(&a.tmf_elem); 2314 2315 if (flags & (TCF_LUN_RESET|TCF_ABORT_TASK_SET|TCF_CLEAR_TASK_SET|TCF_CLEAR_ACA)) { 2316 a.modifier = MK_SYNC_ID_LUN; 2317 } else { 2318 a.modifier = MK_SYNC_ID; 2319 } 2320 2321 if (qla_get_tmf(&a)) 2322 return QLA_FUNCTION_FAILED; 2323 2324 a.qpair = vha->hw->base_qpair; 2325 rval = __qla2x00_async_tm_cmd(&a); 2326 2327 qla_put_tmf(&a); 2328 return rval; 2329 } 2330 2331 int 2332 qla24xx_async_abort_command(srb_t *sp) 2333 { 2334 unsigned long flags = 0; 2335 2336 uint32_t handle; 2337 fc_port_t *fcport = sp->fcport; 2338 struct qla_qpair *qpair = sp->qpair; 2339 struct scsi_qla_host *vha = fcport->vha; 2340 struct req_que *req = qpair->req; 2341 2342 spin_lock_irqsave(qpair->qp_lock_ptr, flags); 2343 for (handle = 1; handle < req->num_outstanding_cmds; handle++) { 2344 if (req->outstanding_cmds[handle] == sp) 2345 break; 2346 } 2347 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags); 2348 2349 if (handle == req->num_outstanding_cmds) { 2350 /* Command not found. */ 2351 return QLA_ERR_NOT_FOUND; 2352 } 2353 if (sp->type == SRB_FXIOCB_DCMD) 2354 return qlafx00_fx_disc(vha, &vha->hw->mr.fcport, 2355 FXDISC_ABORT_IOCTL); 2356 2357 return qla24xx_async_abort_cmd(sp, true); 2358 } 2359 2360 static void 2361 qla24xx_handle_prli_done_event(struct scsi_qla_host *vha, struct event_arg *ea) 2362 { 2363 struct srb *sp; 2364 WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n", 2365 ea->data[0]); 2366 2367 switch (ea->data[0]) { 2368 case MBS_COMMAND_COMPLETE: 2369 ql_dbg(ql_dbg_disc, vha, 0x2118, 2370 "%s %d %8phC post gpdb\n", 2371 __func__, __LINE__, ea->fcport->port_name); 2372 2373 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset; 2374 ea->fcport->logout_on_delete = 1; 2375 ea->fcport->nvme_prli_service_param = ea->iop[0]; 2376 if (ea->iop[0] & NVME_PRLI_SP_FIRST_BURST) 2377 ea->fcport->nvme_first_burst_size = 2378 (ea->iop[1] & 0xffff) * 512; 2379 else 2380 ea->fcport->nvme_first_burst_size = 0; 2381 qla24xx_post_gpdb_work(vha, ea->fcport, 0); 2382 break; 2383 default: 2384 sp = ea->sp; 2385 ql_dbg(ql_dbg_disc, vha, 0x2118, 2386 "%s %d %8phC priority %s, fc4type %x prev try %s\n", 2387 __func__, __LINE__, ea->fcport->port_name, 2388 vha->hw->fc4_type_priority == FC4_PRIORITY_FCP ? 2389 "FCP" : "NVMe", ea->fcport->fc4_type, 2390 (sp->u.iocb_cmd.u.logio.flags & SRB_LOGIN_NVME_PRLI) ? 2391 "NVME" : "FCP"); 2392 2393 if (NVME_FCP_TARGET(ea->fcport)) { 2394 if (sp->u.iocb_cmd.u.logio.flags & SRB_LOGIN_NVME_PRLI) 2395 ea->fcport->do_prli_nvme = 0; 2396 else 2397 ea->fcport->do_prli_nvme = 1; 2398 } else { 2399 ea->fcport->do_prli_nvme = 0; 2400 } 2401 2402 if (N2N_TOPO(vha->hw)) { 2403 if (ea->fcport->n2n_link_reset_cnt == 2404 vha->hw->login_retry_count && 2405 ea->fcport->flags & FCF_FCSP_DEVICE) { 2406 /* remote authentication app just started */ 2407 ea->fcport->n2n_link_reset_cnt = 0; 2408 } 2409 2410 if (ea->fcport->n2n_link_reset_cnt < 2411 vha->hw->login_retry_count) { 2412 ea->fcport->n2n_link_reset_cnt++; 2413 vha->relogin_jif = jiffies + 2 * HZ; 2414 /* 2415 * PRLI failed. Reset link to kick start 2416 * state machine 2417 */ 2418 set_bit(N2N_LINK_RESET, &vha->dpc_flags); 2419 qla2xxx_wake_dpc(vha); 2420 } else { 2421 ql_log(ql_log_warn, vha, 0x2119, 2422 "%s %d %8phC Unable to reconnect\n", 2423 __func__, __LINE__, 2424 ea->fcport->port_name); 2425 } 2426 } else { 2427 /* 2428 * switch connect. login failed. Take connection down 2429 * and allow relogin to retrigger 2430 */ 2431 ea->fcport->flags &= ~FCF_ASYNC_SENT; 2432 ea->fcport->keep_nport_handle = 0; 2433 ea->fcport->logout_on_delete = 1; 2434 qlt_schedule_sess_for_deletion(ea->fcport); 2435 } 2436 break; 2437 } 2438 } 2439 2440 void 2441 qla24xx_handle_plogi_done_event(struct scsi_qla_host *vha, struct event_arg *ea) 2442 { 2443 port_id_t cid; /* conflict Nport id */ 2444 u16 lid; 2445 struct fc_port *conflict_fcport; 2446 unsigned long flags; 2447 struct fc_port *fcport = ea->fcport; 2448 2449 ql_dbg(ql_dbg_disc, vha, 0xffff, 2450 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d data %x|%x iop %x|%x\n", 2451 __func__, fcport->port_name, fcport->disc_state, 2452 fcport->fw_login_state, ea->rc, ea->sp->gen2, fcport->login_gen, 2453 ea->sp->gen1, fcport->rscn_gen, 2454 ea->data[0], ea->data[1], ea->iop[0], ea->iop[1]); 2455 2456 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || 2457 (fcport->fw_login_state == DSC_LS_PRLI_PEND)) { 2458 ql_dbg(ql_dbg_disc, vha, 0x20ea, 2459 "%s %d %8phC Remote is trying to login\n", 2460 __func__, __LINE__, fcport->port_name); 2461 return; 2462 } 2463 2464 if ((fcport->disc_state == DSC_DELETE_PEND) || 2465 (fcport->disc_state == DSC_DELETED)) { 2466 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 2467 return; 2468 } 2469 2470 if (ea->sp->gen2 != fcport->login_gen) { 2471 /* target side must have changed it. */ 2472 ql_dbg(ql_dbg_disc, vha, 0x20d3, 2473 "%s %8phC generation changed\n", 2474 __func__, fcport->port_name); 2475 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 2476 return; 2477 } else if (ea->sp->gen1 != fcport->rscn_gen) { 2478 ql_dbg(ql_dbg_disc, vha, 0x20d3, 2479 "%s %8phC RSCN generation changed\n", 2480 __func__, fcport->port_name); 2481 qla_rscn_replay(fcport); 2482 qlt_schedule_sess_for_deletion(fcport); 2483 return; 2484 } 2485 2486 WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n", 2487 ea->data[0]); 2488 2489 switch (ea->data[0]) { 2490 case MBS_COMMAND_COMPLETE: 2491 /* 2492 * Driver must validate login state - If PRLI not complete, 2493 * force a relogin attempt via implicit LOGO, PLOGI, and PRLI 2494 * requests. 2495 */ 2496 if (vha->hw->flags.edif_enabled) { 2497 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map); 2498 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 2499 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset; 2500 ea->fcport->logout_on_delete = 1; 2501 ea->fcport->send_els_logo = 0; 2502 ea->fcport->fw_login_state = DSC_LS_PLOGI_COMP; 2503 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 2504 2505 qla24xx_post_gpdb_work(vha, ea->fcport, 0); 2506 } else { 2507 if (NVME_TARGET(vha->hw, fcport)) { 2508 ql_dbg(ql_dbg_disc, vha, 0x2117, 2509 "%s %d %8phC post prli\n", 2510 __func__, __LINE__, fcport->port_name); 2511 qla24xx_post_prli_work(vha, fcport); 2512 } else { 2513 ql_dbg(ql_dbg_disc, vha, 0x20ea, 2514 "%s %d %8phC LoopID 0x%x in use with %06x. post gpdb\n", 2515 __func__, __LINE__, fcport->port_name, 2516 fcport->loop_id, fcport->d_id.b24); 2517 2518 set_bit(fcport->loop_id, vha->hw->loop_id_map); 2519 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 2520 fcport->chip_reset = vha->hw->base_qpair->chip_reset; 2521 fcport->logout_on_delete = 1; 2522 fcport->send_els_logo = 0; 2523 fcport->fw_login_state = DSC_LS_PRLI_COMP; 2524 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 2525 2526 qla24xx_post_gpdb_work(vha, fcport, 0); 2527 } 2528 } 2529 break; 2530 case MBS_COMMAND_ERROR: 2531 ql_dbg(ql_dbg_disc, vha, 0x20eb, "%s %d %8phC cmd error %x\n", 2532 __func__, __LINE__, ea->fcport->port_name, ea->data[1]); 2533 2534 qlt_schedule_sess_for_deletion(ea->fcport); 2535 break; 2536 case MBS_LOOP_ID_USED: 2537 /* data[1] = IO PARAM 1 = nport ID */ 2538 cid.b.domain = (ea->iop[1] >> 16) & 0xff; 2539 cid.b.area = (ea->iop[1] >> 8) & 0xff; 2540 cid.b.al_pa = ea->iop[1] & 0xff; 2541 cid.b.rsvd_1 = 0; 2542 2543 ql_dbg(ql_dbg_disc, vha, 0x20ec, 2544 "%s %d %8phC lid %#x in use with pid %06x post gnl\n", 2545 __func__, __LINE__, ea->fcport->port_name, 2546 ea->fcport->loop_id, cid.b24); 2547 2548 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map); 2549 ea->fcport->loop_id = FC_NO_LOOP_ID; 2550 qla24xx_post_gnl_work(vha, ea->fcport); 2551 break; 2552 case MBS_PORT_ID_USED: 2553 lid = ea->iop[1] & 0xffff; 2554 qlt_find_sess_invalidate_other(vha, 2555 wwn_to_u64(ea->fcport->port_name), 2556 ea->fcport->d_id, lid, &conflict_fcport); 2557 2558 if (conflict_fcport) { 2559 /* 2560 * Another fcport share the same loop_id/nport id. 2561 * Conflict fcport needs to finish cleanup before this 2562 * fcport can proceed to login. 2563 */ 2564 conflict_fcport->conflict = ea->fcport; 2565 ea->fcport->login_pause = 1; 2566 2567 ql_dbg(ql_dbg_disc, vha, 0x20ed, 2568 "%s %d %8phC NPortId %06x inuse with loopid 0x%x.\n", 2569 __func__, __LINE__, ea->fcport->port_name, 2570 ea->fcport->d_id.b24, lid); 2571 } else { 2572 ql_dbg(ql_dbg_disc, vha, 0x20ed, 2573 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. sched delete\n", 2574 __func__, __LINE__, ea->fcport->port_name, 2575 ea->fcport->d_id.b24, lid); 2576 2577 qla2x00_clear_loop_id(ea->fcport); 2578 set_bit(lid, vha->hw->loop_id_map); 2579 ea->fcport->loop_id = lid; 2580 ea->fcport->keep_nport_handle = 0; 2581 ea->fcport->logout_on_delete = 1; 2582 qlt_schedule_sess_for_deletion(ea->fcport); 2583 } 2584 break; 2585 } 2586 return; 2587 } 2588 2589 /****************************************************************************/ 2590 /* QLogic ISP2x00 Hardware Support Functions. */ 2591 /****************************************************************************/ 2592 2593 static int 2594 qla83xx_nic_core_fw_load(scsi_qla_host_t *vha) 2595 { 2596 int rval = QLA_SUCCESS; 2597 struct qla_hw_data *ha = vha->hw; 2598 uint32_t idc_major_ver, idc_minor_ver; 2599 uint16_t config[4]; 2600 2601 qla83xx_idc_lock(vha, 0); 2602 2603 /* SV: TODO: Assign initialization timeout from 2604 * flash-info / other param 2605 */ 2606 ha->fcoe_dev_init_timeout = QLA83XX_IDC_INITIALIZATION_TIMEOUT; 2607 ha->fcoe_reset_timeout = QLA83XX_IDC_RESET_ACK_TIMEOUT; 2608 2609 /* Set our fcoe function presence */ 2610 if (__qla83xx_set_drv_presence(vha) != QLA_SUCCESS) { 2611 ql_dbg(ql_dbg_p3p, vha, 0xb077, 2612 "Error while setting DRV-Presence.\n"); 2613 rval = QLA_FUNCTION_FAILED; 2614 goto exit; 2615 } 2616 2617 /* Decide the reset ownership */ 2618 qla83xx_reset_ownership(vha); 2619 2620 /* 2621 * On first protocol driver load: 2622 * Init-Owner: Set IDC-Major-Version and Clear IDC-Lock-Recovery 2623 * register. 2624 * Others: Check compatibility with current IDC Major version. 2625 */ 2626 qla83xx_rd_reg(vha, QLA83XX_IDC_MAJOR_VERSION, &idc_major_ver); 2627 if (ha->flags.nic_core_reset_owner) { 2628 /* Set IDC Major version */ 2629 idc_major_ver = QLA83XX_SUPP_IDC_MAJOR_VERSION; 2630 qla83xx_wr_reg(vha, QLA83XX_IDC_MAJOR_VERSION, idc_major_ver); 2631 2632 /* Clearing IDC-Lock-Recovery register */ 2633 qla83xx_wr_reg(vha, QLA83XX_IDC_LOCK_RECOVERY, 0); 2634 } else if (idc_major_ver != QLA83XX_SUPP_IDC_MAJOR_VERSION) { 2635 /* 2636 * Clear further IDC participation if we are not compatible with 2637 * the current IDC Major Version. 2638 */ 2639 ql_log(ql_log_warn, vha, 0xb07d, 2640 "Failing load, idc_major_ver=%d, expected_major_ver=%d.\n", 2641 idc_major_ver, QLA83XX_SUPP_IDC_MAJOR_VERSION); 2642 __qla83xx_clear_drv_presence(vha); 2643 rval = QLA_FUNCTION_FAILED; 2644 goto exit; 2645 } 2646 /* Each function sets its supported Minor version. */ 2647 qla83xx_rd_reg(vha, QLA83XX_IDC_MINOR_VERSION, &idc_minor_ver); 2648 idc_minor_ver |= (QLA83XX_SUPP_IDC_MINOR_VERSION << (ha->portnum * 2)); 2649 qla83xx_wr_reg(vha, QLA83XX_IDC_MINOR_VERSION, idc_minor_ver); 2650 2651 if (ha->flags.nic_core_reset_owner) { 2652 memset(config, 0, sizeof(config)); 2653 if (!qla81xx_get_port_config(vha, config)) 2654 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, 2655 QLA8XXX_DEV_READY); 2656 } 2657 2658 rval = qla83xx_idc_state_handler(vha); 2659 2660 exit: 2661 qla83xx_idc_unlock(vha, 0); 2662 2663 return rval; 2664 } 2665 2666 /* 2667 * qla2x00_initialize_adapter 2668 * Initialize board. 2669 * 2670 * Input: 2671 * ha = adapter block pointer. 2672 * 2673 * Returns: 2674 * 0 = success 2675 */ 2676 int 2677 qla2x00_initialize_adapter(scsi_qla_host_t *vha) 2678 { 2679 int rval; 2680 struct qla_hw_data *ha = vha->hw; 2681 struct req_que *req = ha->req_q_map[0]; 2682 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 2683 2684 memset(&vha->qla_stats, 0, sizeof(vha->qla_stats)); 2685 memset(&vha->fc_host_stat, 0, sizeof(vha->fc_host_stat)); 2686 2687 /* Clear adapter flags. */ 2688 vha->flags.online = 0; 2689 ha->flags.chip_reset_done = 0; 2690 vha->flags.reset_active = 0; 2691 ha->flags.pci_channel_io_perm_failure = 0; 2692 ha->flags.eeh_busy = 0; 2693 vha->qla_stats.jiffies_at_last_reset = get_jiffies_64(); 2694 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 2695 atomic_set(&vha->loop_state, LOOP_DOWN); 2696 vha->device_flags = DFLG_NO_CABLE; 2697 vha->dpc_flags = 0; 2698 vha->flags.management_server_logged_in = 0; 2699 vha->marker_needed = 0; 2700 ha->isp_abort_cnt = 0; 2701 ha->beacon_blink_led = 0; 2702 2703 set_bit(0, ha->req_qid_map); 2704 set_bit(0, ha->rsp_qid_map); 2705 2706 ql_dbg(ql_dbg_init, vha, 0x0040, 2707 "Configuring PCI space...\n"); 2708 rval = ha->isp_ops->pci_config(vha); 2709 if (rval) { 2710 ql_log(ql_log_warn, vha, 0x0044, 2711 "Unable to configure PCI space.\n"); 2712 return (rval); 2713 } 2714 2715 ha->isp_ops->reset_chip(vha); 2716 2717 /* Check for secure flash support */ 2718 if (IS_QLA28XX(ha)) { 2719 if (rd_reg_word(®->mailbox12) & BIT_0) 2720 ha->flags.secure_adapter = 1; 2721 ql_log(ql_log_info, vha, 0xffff, "Secure Adapter: %s\n", 2722 (ha->flags.secure_adapter) ? "Yes" : "No"); 2723 } 2724 2725 2726 rval = qla2xxx_get_flash_info(vha); 2727 if (rval) { 2728 ql_log(ql_log_fatal, vha, 0x004f, 2729 "Unable to validate FLASH data.\n"); 2730 return rval; 2731 } 2732 2733 if (IS_QLA8044(ha)) { 2734 qla8044_read_reset_template(vha); 2735 2736 /* NOTE: If ql2xdontresethba==1, set IDC_CTRL DONTRESET_BIT0. 2737 * If DONRESET_BIT0 is set, drivers should not set dev_state 2738 * to NEED_RESET. But if NEED_RESET is set, drivers should 2739 * should honor the reset. */ 2740 if (ql2xdontresethba == 1) 2741 qla8044_set_idc_dontreset(vha); 2742 } 2743 2744 ha->isp_ops->get_flash_version(vha, req->ring); 2745 ql_dbg(ql_dbg_init, vha, 0x0061, 2746 "Configure NVRAM parameters...\n"); 2747 2748 /* Let priority default to FCP, can be overridden by nvram_config */ 2749 ha->fc4_type_priority = FC4_PRIORITY_FCP; 2750 2751 ha->isp_ops->nvram_config(vha); 2752 2753 if (ha->fc4_type_priority != FC4_PRIORITY_FCP && 2754 ha->fc4_type_priority != FC4_PRIORITY_NVME) 2755 ha->fc4_type_priority = FC4_PRIORITY_FCP; 2756 2757 ql_log(ql_log_info, vha, 0xffff, "FC4 priority set to %s\n", 2758 ha->fc4_type_priority == FC4_PRIORITY_FCP ? "FCP" : "NVMe"); 2759 2760 if (ha->flags.disable_serdes) { 2761 /* Mask HBA via NVRAM settings? */ 2762 ql_log(ql_log_info, vha, 0x0077, 2763 "Masking HBA WWPN %8phN (via NVRAM).\n", vha->port_name); 2764 return QLA_FUNCTION_FAILED; 2765 } 2766 2767 ql_dbg(ql_dbg_init, vha, 0x0078, 2768 "Verifying loaded RISC code...\n"); 2769 2770 /* If smartsan enabled then require fdmi and rdp enabled */ 2771 if (ql2xsmartsan) { 2772 ql2xfdmienable = 1; 2773 ql2xrdpenable = 1; 2774 } 2775 2776 if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) { 2777 rval = ha->isp_ops->chip_diag(vha); 2778 if (rval) 2779 return (rval); 2780 rval = qla2x00_setup_chip(vha); 2781 if (rval) 2782 return (rval); 2783 } 2784 2785 if (IS_QLA84XX(ha)) { 2786 ha->cs84xx = qla84xx_get_chip(vha); 2787 if (!ha->cs84xx) { 2788 ql_log(ql_log_warn, vha, 0x00d0, 2789 "Unable to configure ISP84XX.\n"); 2790 return QLA_FUNCTION_FAILED; 2791 } 2792 } 2793 2794 if (qla_ini_mode_enabled(vha) || qla_dual_mode_enabled(vha)) 2795 rval = qla2x00_init_rings(vha); 2796 2797 /* No point in continuing if firmware initialization failed. */ 2798 if (rval != QLA_SUCCESS) 2799 return rval; 2800 2801 ha->flags.chip_reset_done = 1; 2802 2803 if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) { 2804 /* Issue verify 84xx FW IOCB to complete 84xx initialization */ 2805 rval = qla84xx_init_chip(vha); 2806 if (rval != QLA_SUCCESS) { 2807 ql_log(ql_log_warn, vha, 0x00d4, 2808 "Unable to initialize ISP84XX.\n"); 2809 qla84xx_put_chip(vha); 2810 } 2811 } 2812 2813 /* Load the NIC Core f/w if we are the first protocol driver. */ 2814 if (IS_QLA8031(ha)) { 2815 rval = qla83xx_nic_core_fw_load(vha); 2816 if (rval) 2817 ql_log(ql_log_warn, vha, 0x0124, 2818 "Error in initializing NIC Core f/w.\n"); 2819 } 2820 2821 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha)) 2822 qla24xx_read_fcp_prio_cfg(vha); 2823 2824 if (IS_P3P_TYPE(ha)) 2825 qla82xx_set_driver_version(vha, QLA2XXX_VERSION); 2826 else 2827 qla25xx_set_driver_version(vha, QLA2XXX_VERSION); 2828 2829 return (rval); 2830 } 2831 2832 /** 2833 * qla2100_pci_config() - Setup ISP21xx PCI configuration registers. 2834 * @vha: HA context 2835 * 2836 * Returns 0 on success. 2837 */ 2838 int 2839 qla2100_pci_config(scsi_qla_host_t *vha) 2840 { 2841 uint16_t w; 2842 unsigned long flags; 2843 struct qla_hw_data *ha = vha->hw; 2844 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2845 2846 pci_set_master(ha->pdev); 2847 pci_try_set_mwi(ha->pdev); 2848 2849 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2850 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2851 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2852 2853 pci_disable_rom(ha->pdev); 2854 2855 /* Get PCI bus information. */ 2856 spin_lock_irqsave(&ha->hardware_lock, flags); 2857 ha->pci_attr = rd_reg_word(®->ctrl_status); 2858 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2859 2860 return QLA_SUCCESS; 2861 } 2862 2863 /** 2864 * qla2300_pci_config() - Setup ISP23xx PCI configuration registers. 2865 * @vha: HA context 2866 * 2867 * Returns 0 on success. 2868 */ 2869 int 2870 qla2300_pci_config(scsi_qla_host_t *vha) 2871 { 2872 uint16_t w; 2873 unsigned long flags = 0; 2874 uint32_t cnt; 2875 struct qla_hw_data *ha = vha->hw; 2876 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2877 2878 pci_set_master(ha->pdev); 2879 pci_try_set_mwi(ha->pdev); 2880 2881 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2882 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2883 2884 if (IS_QLA2322(ha) || IS_QLA6322(ha)) 2885 w &= ~PCI_COMMAND_INTX_DISABLE; 2886 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2887 2888 /* 2889 * If this is a 2300 card and not 2312, reset the 2890 * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately, 2891 * the 2310 also reports itself as a 2300 so we need to get the 2892 * fb revision level -- a 6 indicates it really is a 2300 and 2893 * not a 2310. 2894 */ 2895 if (IS_QLA2300(ha)) { 2896 spin_lock_irqsave(&ha->hardware_lock, flags); 2897 2898 /* Pause RISC. */ 2899 wrt_reg_word(®->hccr, HCCR_PAUSE_RISC); 2900 for (cnt = 0; cnt < 30000; cnt++) { 2901 if ((rd_reg_word(®->hccr) & HCCR_RISC_PAUSE) != 0) 2902 break; 2903 2904 udelay(10); 2905 } 2906 2907 /* Select FPM registers. */ 2908 wrt_reg_word(®->ctrl_status, 0x20); 2909 rd_reg_word(®->ctrl_status); 2910 2911 /* Get the fb rev level */ 2912 ha->fb_rev = RD_FB_CMD_REG(ha, reg); 2913 2914 if (ha->fb_rev == FPM_2300) 2915 pci_clear_mwi(ha->pdev); 2916 2917 /* Deselect FPM registers. */ 2918 wrt_reg_word(®->ctrl_status, 0x0); 2919 rd_reg_word(®->ctrl_status); 2920 2921 /* Release RISC module. */ 2922 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC); 2923 for (cnt = 0; cnt < 30000; cnt++) { 2924 if ((rd_reg_word(®->hccr) & HCCR_RISC_PAUSE) == 0) 2925 break; 2926 2927 udelay(10); 2928 } 2929 2930 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2931 } 2932 2933 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); 2934 2935 pci_disable_rom(ha->pdev); 2936 2937 /* Get PCI bus information. */ 2938 spin_lock_irqsave(&ha->hardware_lock, flags); 2939 ha->pci_attr = rd_reg_word(®->ctrl_status); 2940 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2941 2942 return QLA_SUCCESS; 2943 } 2944 2945 /** 2946 * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers. 2947 * @vha: HA context 2948 * 2949 * Returns 0 on success. 2950 */ 2951 int 2952 qla24xx_pci_config(scsi_qla_host_t *vha) 2953 { 2954 uint16_t w; 2955 unsigned long flags = 0; 2956 struct qla_hw_data *ha = vha->hw; 2957 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 2958 2959 pci_set_master(ha->pdev); 2960 pci_try_set_mwi(ha->pdev); 2961 2962 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2963 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2964 w &= ~PCI_COMMAND_INTX_DISABLE; 2965 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2966 2967 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); 2968 2969 /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */ 2970 if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX)) 2971 pcix_set_mmrbc(ha->pdev, 2048); 2972 2973 /* PCIe -- adjust Maximum Read Request Size (2048). */ 2974 if (pci_is_pcie(ha->pdev)) 2975 pcie_set_readrq(ha->pdev, 4096); 2976 2977 pci_disable_rom(ha->pdev); 2978 2979 ha->chip_revision = ha->pdev->revision; 2980 2981 /* Get PCI bus information. */ 2982 spin_lock_irqsave(&ha->hardware_lock, flags); 2983 ha->pci_attr = rd_reg_dword(®->ctrl_status); 2984 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2985 2986 return QLA_SUCCESS; 2987 } 2988 2989 /** 2990 * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers. 2991 * @vha: HA context 2992 * 2993 * Returns 0 on success. 2994 */ 2995 int 2996 qla25xx_pci_config(scsi_qla_host_t *vha) 2997 { 2998 uint16_t w; 2999 struct qla_hw_data *ha = vha->hw; 3000 3001 pci_set_master(ha->pdev); 3002 pci_try_set_mwi(ha->pdev); 3003 3004 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 3005 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 3006 w &= ~PCI_COMMAND_INTX_DISABLE; 3007 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 3008 3009 /* PCIe -- adjust Maximum Read Request Size (2048). */ 3010 if (pci_is_pcie(ha->pdev)) 3011 pcie_set_readrq(ha->pdev, 4096); 3012 3013 pci_disable_rom(ha->pdev); 3014 3015 ha->chip_revision = ha->pdev->revision; 3016 3017 return QLA_SUCCESS; 3018 } 3019 3020 /** 3021 * qla2x00_isp_firmware() - Choose firmware image. 3022 * @vha: HA context 3023 * 3024 * Returns 0 on success. 3025 */ 3026 static int 3027 qla2x00_isp_firmware(scsi_qla_host_t *vha) 3028 { 3029 int rval; 3030 uint16_t loop_id, topo, sw_cap; 3031 uint8_t domain, area, al_pa; 3032 struct qla_hw_data *ha = vha->hw; 3033 3034 /* Assume loading risc code */ 3035 rval = QLA_FUNCTION_FAILED; 3036 3037 if (ha->flags.disable_risc_code_load) { 3038 ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n"); 3039 3040 /* Verify checksum of loaded RISC code. */ 3041 rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address); 3042 if (rval == QLA_SUCCESS) { 3043 /* And, verify we are not in ROM code. */ 3044 rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa, 3045 &area, &domain, &topo, &sw_cap); 3046 } 3047 } 3048 3049 if (rval) 3050 ql_dbg(ql_dbg_init, vha, 0x007a, 3051 "**** Load RISC code ****.\n"); 3052 3053 return (rval); 3054 } 3055 3056 /** 3057 * qla2x00_reset_chip() - Reset ISP chip. 3058 * @vha: HA context 3059 * 3060 * Returns 0 on success. 3061 */ 3062 int 3063 qla2x00_reset_chip(scsi_qla_host_t *vha) 3064 { 3065 unsigned long flags = 0; 3066 struct qla_hw_data *ha = vha->hw; 3067 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 3068 uint32_t cnt; 3069 uint16_t cmd; 3070 int rval = QLA_FUNCTION_FAILED; 3071 3072 if (unlikely(pci_channel_offline(ha->pdev))) 3073 return rval; 3074 3075 ha->isp_ops->disable_intrs(ha); 3076 3077 spin_lock_irqsave(&ha->hardware_lock, flags); 3078 3079 /* Turn off master enable */ 3080 cmd = 0; 3081 pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd); 3082 cmd &= ~PCI_COMMAND_MASTER; 3083 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); 3084 3085 if (!IS_QLA2100(ha)) { 3086 /* Pause RISC. */ 3087 wrt_reg_word(®->hccr, HCCR_PAUSE_RISC); 3088 if (IS_QLA2200(ha) || IS_QLA2300(ha)) { 3089 for (cnt = 0; cnt < 30000; cnt++) { 3090 if ((rd_reg_word(®->hccr) & 3091 HCCR_RISC_PAUSE) != 0) 3092 break; 3093 udelay(100); 3094 } 3095 } else { 3096 rd_reg_word(®->hccr); /* PCI Posting. */ 3097 udelay(10); 3098 } 3099 3100 /* Select FPM registers. */ 3101 wrt_reg_word(®->ctrl_status, 0x20); 3102 rd_reg_word(®->ctrl_status); /* PCI Posting. */ 3103 3104 /* FPM Soft Reset. */ 3105 wrt_reg_word(®->fpm_diag_config, 0x100); 3106 rd_reg_word(®->fpm_diag_config); /* PCI Posting. */ 3107 3108 /* Toggle Fpm Reset. */ 3109 if (!IS_QLA2200(ha)) { 3110 wrt_reg_word(®->fpm_diag_config, 0x0); 3111 rd_reg_word(®->fpm_diag_config); /* PCI Posting. */ 3112 } 3113 3114 /* Select frame buffer registers. */ 3115 wrt_reg_word(®->ctrl_status, 0x10); 3116 rd_reg_word(®->ctrl_status); /* PCI Posting. */ 3117 3118 /* Reset frame buffer FIFOs. */ 3119 if (IS_QLA2200(ha)) { 3120 WRT_FB_CMD_REG(ha, reg, 0xa000); 3121 RD_FB_CMD_REG(ha, reg); /* PCI Posting. */ 3122 } else { 3123 WRT_FB_CMD_REG(ha, reg, 0x00fc); 3124 3125 /* Read back fb_cmd until zero or 3 seconds max */ 3126 for (cnt = 0; cnt < 3000; cnt++) { 3127 if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0) 3128 break; 3129 udelay(100); 3130 } 3131 } 3132 3133 /* Select RISC module registers. */ 3134 wrt_reg_word(®->ctrl_status, 0); 3135 rd_reg_word(®->ctrl_status); /* PCI Posting. */ 3136 3137 /* Reset RISC processor. */ 3138 wrt_reg_word(®->hccr, HCCR_RESET_RISC); 3139 rd_reg_word(®->hccr); /* PCI Posting. */ 3140 3141 /* Release RISC processor. */ 3142 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC); 3143 rd_reg_word(®->hccr); /* PCI Posting. */ 3144 } 3145 3146 wrt_reg_word(®->hccr, HCCR_CLR_RISC_INT); 3147 wrt_reg_word(®->hccr, HCCR_CLR_HOST_INT); 3148 3149 /* Reset ISP chip. */ 3150 wrt_reg_word(®->ctrl_status, CSR_ISP_SOFT_RESET); 3151 3152 /* Wait for RISC to recover from reset. */ 3153 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 3154 /* 3155 * It is necessary to for a delay here since the card doesn't 3156 * respond to PCI reads during a reset. On some architectures 3157 * this will result in an MCA. 3158 */ 3159 udelay(20); 3160 for (cnt = 30000; cnt; cnt--) { 3161 if ((rd_reg_word(®->ctrl_status) & 3162 CSR_ISP_SOFT_RESET) == 0) 3163 break; 3164 udelay(100); 3165 } 3166 } else 3167 udelay(10); 3168 3169 /* Reset RISC processor. */ 3170 wrt_reg_word(®->hccr, HCCR_RESET_RISC); 3171 3172 wrt_reg_word(®->semaphore, 0); 3173 3174 /* Release RISC processor. */ 3175 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC); 3176 rd_reg_word(®->hccr); /* PCI Posting. */ 3177 3178 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 3179 for (cnt = 0; cnt < 30000; cnt++) { 3180 if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY) 3181 break; 3182 3183 udelay(100); 3184 } 3185 } else 3186 udelay(100); 3187 3188 /* Turn on master enable */ 3189 cmd |= PCI_COMMAND_MASTER; 3190 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); 3191 3192 /* Disable RISC pause on FPM parity error. */ 3193 if (!IS_QLA2100(ha)) { 3194 wrt_reg_word(®->hccr, HCCR_DISABLE_PARITY_PAUSE); 3195 rd_reg_word(®->hccr); /* PCI Posting. */ 3196 } 3197 3198 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3199 3200 return QLA_SUCCESS; 3201 } 3202 3203 /** 3204 * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC. 3205 * @vha: HA context 3206 * 3207 * Returns 0 on success. 3208 */ 3209 static int 3210 qla81xx_reset_mpi(scsi_qla_host_t *vha) 3211 { 3212 uint16_t mb[4] = {0x1010, 0, 1, 0}; 3213 3214 if (!IS_QLA81XX(vha->hw)) 3215 return QLA_SUCCESS; 3216 3217 return qla81xx_write_mpi_register(vha, mb); 3218 } 3219 3220 static int 3221 qla_chk_risc_recovery(scsi_qla_host_t *vha) 3222 { 3223 struct qla_hw_data *ha = vha->hw; 3224 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 3225 __le16 __iomem *mbptr = ®->mailbox0; 3226 int i; 3227 u16 mb[32]; 3228 int rc = QLA_SUCCESS; 3229 3230 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha)) 3231 return rc; 3232 3233 /* this check is only valid after RISC reset */ 3234 mb[0] = rd_reg_word(mbptr); 3235 mbptr++; 3236 if (mb[0] == 0xf) { 3237 rc = QLA_FUNCTION_FAILED; 3238 3239 for (i = 1; i < 32; i++) { 3240 mb[i] = rd_reg_word(mbptr); 3241 mbptr++; 3242 } 3243 3244 ql_log(ql_log_warn, vha, 0x1015, 3245 "RISC reset failed. mb[0-7] %04xh %04xh %04xh %04xh %04xh %04xh %04xh %04xh\n", 3246 mb[0], mb[1], mb[2], mb[3], mb[4], mb[5], mb[6], mb[7]); 3247 ql_log(ql_log_warn, vha, 0x1015, 3248 "RISC reset failed. mb[8-15] %04xh %04xh %04xh %04xh %04xh %04xh %04xh %04xh\n", 3249 mb[8], mb[9], mb[10], mb[11], mb[12], mb[13], mb[14], 3250 mb[15]); 3251 ql_log(ql_log_warn, vha, 0x1015, 3252 "RISC reset failed. mb[16-23] %04xh %04xh %04xh %04xh %04xh %04xh %04xh %04xh\n", 3253 mb[16], mb[17], mb[18], mb[19], mb[20], mb[21], mb[22], 3254 mb[23]); 3255 ql_log(ql_log_warn, vha, 0x1015, 3256 "RISC reset failed. mb[24-31] %04xh %04xh %04xh %04xh %04xh %04xh %04xh %04xh\n", 3257 mb[24], mb[25], mb[26], mb[27], mb[28], mb[29], mb[30], 3258 mb[31]); 3259 } 3260 return rc; 3261 } 3262 3263 /** 3264 * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC. 3265 * @vha: HA context 3266 * 3267 * Returns 0 on success. 3268 */ 3269 static inline int 3270 qla24xx_reset_risc(scsi_qla_host_t *vha) 3271 { 3272 unsigned long flags = 0; 3273 struct qla_hw_data *ha = vha->hw; 3274 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 3275 uint32_t cnt; 3276 uint16_t wd; 3277 static int abts_cnt; /* ISP abort retry counts */ 3278 int rval = QLA_SUCCESS; 3279 int print = 1; 3280 3281 spin_lock_irqsave(&ha->hardware_lock, flags); 3282 3283 /* Reset RISC. */ 3284 wrt_reg_dword(®->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); 3285 for (cnt = 0; cnt < 30000; cnt++) { 3286 if ((rd_reg_dword(®->ctrl_status) & CSRX_DMA_ACTIVE) == 0) 3287 break; 3288 3289 udelay(10); 3290 } 3291 3292 if (!(rd_reg_dword(®->ctrl_status) & CSRX_DMA_ACTIVE)) 3293 set_bit(DMA_SHUTDOWN_CMPL, &ha->fw_dump_cap_flags); 3294 3295 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017e, 3296 "HCCR: 0x%x, Control Status %x, DMA active status:0x%x\n", 3297 rd_reg_dword(®->hccr), 3298 rd_reg_dword(®->ctrl_status), 3299 (rd_reg_dword(®->ctrl_status) & CSRX_DMA_ACTIVE)); 3300 3301 wrt_reg_dword(®->ctrl_status, 3302 CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); 3303 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd); 3304 3305 udelay(100); 3306 3307 /* Wait for firmware to complete NVRAM accesses. */ 3308 rd_reg_word(®->mailbox0); 3309 for (cnt = 10000; rd_reg_word(®->mailbox0) != 0 && 3310 rval == QLA_SUCCESS; cnt--) { 3311 barrier(); 3312 if (cnt) 3313 udelay(5); 3314 else 3315 rval = QLA_FUNCTION_TIMEOUT; 3316 } 3317 3318 if (rval == QLA_SUCCESS) 3319 set_bit(ISP_MBX_RDY, &ha->fw_dump_cap_flags); 3320 3321 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017f, 3322 "HCCR: 0x%x, MailBox0 Status 0x%x\n", 3323 rd_reg_dword(®->hccr), 3324 rd_reg_word(®->mailbox0)); 3325 3326 /* Wait for soft-reset to complete. */ 3327 rd_reg_dword(®->ctrl_status); 3328 for (cnt = 0; cnt < 60; cnt++) { 3329 barrier(); 3330 if ((rd_reg_dword(®->ctrl_status) & 3331 CSRX_ISP_SOFT_RESET) == 0) 3332 break; 3333 3334 udelay(5); 3335 } 3336 if (!(rd_reg_dword(®->ctrl_status) & CSRX_ISP_SOFT_RESET)) 3337 set_bit(ISP_SOFT_RESET_CMPL, &ha->fw_dump_cap_flags); 3338 3339 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015d, 3340 "HCCR: 0x%x, Soft Reset status: 0x%x\n", 3341 rd_reg_dword(®->hccr), 3342 rd_reg_dword(®->ctrl_status)); 3343 3344 /* If required, do an MPI FW reset now */ 3345 if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) { 3346 if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) { 3347 if (++abts_cnt < 5) { 3348 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 3349 set_bit(MPI_RESET_NEEDED, &vha->dpc_flags); 3350 } else { 3351 /* 3352 * We exhausted the ISP abort retries. We have to 3353 * set the board offline. 3354 */ 3355 abts_cnt = 0; 3356 vha->flags.online = 0; 3357 } 3358 } 3359 } 3360 3361 wrt_reg_dword(®->hccr, HCCRX_SET_RISC_RESET); 3362 rd_reg_dword(®->hccr); 3363 3364 wrt_reg_dword(®->hccr, HCCRX_REL_RISC_PAUSE); 3365 rd_reg_dword(®->hccr); 3366 3367 wrt_reg_dword(®->hccr, HCCRX_CLR_RISC_RESET); 3368 mdelay(10); 3369 rd_reg_dword(®->hccr); 3370 3371 wd = rd_reg_word(®->mailbox0); 3372 for (cnt = 300; wd != 0 && rval == QLA_SUCCESS; cnt--) { 3373 barrier(); 3374 if (cnt) { 3375 mdelay(1); 3376 if (print && qla_chk_risc_recovery(vha)) 3377 print = 0; 3378 3379 wd = rd_reg_word(®->mailbox0); 3380 } else { 3381 rval = QLA_FUNCTION_TIMEOUT; 3382 3383 ql_log(ql_log_warn, vha, 0x015e, 3384 "RISC reset timeout\n"); 3385 } 3386 } 3387 3388 if (rval == QLA_SUCCESS) 3389 set_bit(RISC_RDY_AFT_RESET, &ha->fw_dump_cap_flags); 3390 3391 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015e, 3392 "Host Risc 0x%x, mailbox0 0x%x\n", 3393 rd_reg_dword(®->hccr), 3394 rd_reg_word(®->mailbox0)); 3395 3396 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3397 3398 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015f, 3399 "Driver in %s mode\n", 3400 IS_NOPOLLING_TYPE(ha) ? "Interrupt" : "Polling"); 3401 3402 if (IS_NOPOLLING_TYPE(ha)) 3403 ha->isp_ops->enable_intrs(ha); 3404 3405 return rval; 3406 } 3407 3408 static void 3409 qla25xx_read_risc_sema_reg(scsi_qla_host_t *vha, uint32_t *data) 3410 { 3411 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24; 3412 3413 wrt_reg_dword(®->iobase_addr, RISC_REGISTER_BASE_OFFSET); 3414 *data = rd_reg_dword(®->iobase_window + RISC_REGISTER_WINDOW_OFFSET); 3415 } 3416 3417 static void 3418 qla25xx_write_risc_sema_reg(scsi_qla_host_t *vha, uint32_t data) 3419 { 3420 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24; 3421 3422 wrt_reg_dword(®->iobase_addr, RISC_REGISTER_BASE_OFFSET); 3423 wrt_reg_dword(®->iobase_window + RISC_REGISTER_WINDOW_OFFSET, data); 3424 } 3425 3426 static void 3427 qla25xx_manipulate_risc_semaphore(scsi_qla_host_t *vha) 3428 { 3429 uint32_t wd32 = 0; 3430 uint delta_msec = 100; 3431 uint elapsed_msec = 0; 3432 uint timeout_msec; 3433 ulong n; 3434 3435 if (vha->hw->pdev->subsystem_device != 0x0175 && 3436 vha->hw->pdev->subsystem_device != 0x0240) 3437 return; 3438 3439 wrt_reg_dword(&vha->hw->iobase->isp24.hccr, HCCRX_SET_RISC_PAUSE); 3440 udelay(100); 3441 3442 attempt: 3443 timeout_msec = TIMEOUT_SEMAPHORE; 3444 n = timeout_msec / delta_msec; 3445 while (n--) { 3446 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_SET); 3447 qla25xx_read_risc_sema_reg(vha, &wd32); 3448 if (wd32 & RISC_SEMAPHORE) 3449 break; 3450 msleep(delta_msec); 3451 elapsed_msec += delta_msec; 3452 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED) 3453 goto force; 3454 } 3455 3456 if (!(wd32 & RISC_SEMAPHORE)) 3457 goto force; 3458 3459 if (!(wd32 & RISC_SEMAPHORE_FORCE)) 3460 goto acquired; 3461 3462 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_CLR); 3463 timeout_msec = TIMEOUT_SEMAPHORE_FORCE; 3464 n = timeout_msec / delta_msec; 3465 while (n--) { 3466 qla25xx_read_risc_sema_reg(vha, &wd32); 3467 if (!(wd32 & RISC_SEMAPHORE_FORCE)) 3468 break; 3469 msleep(delta_msec); 3470 elapsed_msec += delta_msec; 3471 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED) 3472 goto force; 3473 } 3474 3475 if (wd32 & RISC_SEMAPHORE_FORCE) 3476 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_CLR); 3477 3478 goto attempt; 3479 3480 force: 3481 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_SET); 3482 3483 acquired: 3484 return; 3485 } 3486 3487 /** 3488 * qla24xx_reset_chip() - Reset ISP24xx chip. 3489 * @vha: HA context 3490 * 3491 * Returns 0 on success. 3492 */ 3493 int 3494 qla24xx_reset_chip(scsi_qla_host_t *vha) 3495 { 3496 struct qla_hw_data *ha = vha->hw; 3497 int rval = QLA_FUNCTION_FAILED; 3498 3499 if (pci_channel_offline(ha->pdev) && 3500 ha->flags.pci_channel_io_perm_failure) { 3501 return rval; 3502 } 3503 3504 ha->isp_ops->disable_intrs(ha); 3505 3506 qla25xx_manipulate_risc_semaphore(vha); 3507 3508 /* Perform RISC reset. */ 3509 rval = qla24xx_reset_risc(vha); 3510 3511 return rval; 3512 } 3513 3514 /** 3515 * qla2x00_chip_diag() - Test chip for proper operation. 3516 * @vha: HA context 3517 * 3518 * Returns 0 on success. 3519 */ 3520 int 3521 qla2x00_chip_diag(scsi_qla_host_t *vha) 3522 { 3523 int rval; 3524 struct qla_hw_data *ha = vha->hw; 3525 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 3526 unsigned long flags = 0; 3527 uint16_t data; 3528 uint32_t cnt; 3529 uint16_t mb[5]; 3530 struct req_que *req = ha->req_q_map[0]; 3531 3532 /* Assume a failed state */ 3533 rval = QLA_FUNCTION_FAILED; 3534 3535 ql_dbg(ql_dbg_init, vha, 0x007b, "Testing device at %p.\n", 3536 ®->flash_address); 3537 3538 spin_lock_irqsave(&ha->hardware_lock, flags); 3539 3540 /* Reset ISP chip. */ 3541 wrt_reg_word(®->ctrl_status, CSR_ISP_SOFT_RESET); 3542 3543 /* 3544 * We need to have a delay here since the card will not respond while 3545 * in reset causing an MCA on some architectures. 3546 */ 3547 udelay(20); 3548 data = qla2x00_debounce_register(®->ctrl_status); 3549 for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) { 3550 udelay(5); 3551 data = rd_reg_word(®->ctrl_status); 3552 barrier(); 3553 } 3554 3555 if (!cnt) 3556 goto chip_diag_failed; 3557 3558 ql_dbg(ql_dbg_init, vha, 0x007c, 3559 "Reset register cleared by chip reset.\n"); 3560 3561 /* Reset RISC processor. */ 3562 wrt_reg_word(®->hccr, HCCR_RESET_RISC); 3563 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC); 3564 3565 /* Workaround for QLA2312 PCI parity error */ 3566 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 3567 data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0)); 3568 for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) { 3569 udelay(5); 3570 data = RD_MAILBOX_REG(ha, reg, 0); 3571 barrier(); 3572 } 3573 } else 3574 udelay(10); 3575 3576 if (!cnt) 3577 goto chip_diag_failed; 3578 3579 /* Check product ID of chip */ 3580 ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product ID of chip.\n"); 3581 3582 mb[1] = RD_MAILBOX_REG(ha, reg, 1); 3583 mb[2] = RD_MAILBOX_REG(ha, reg, 2); 3584 mb[3] = RD_MAILBOX_REG(ha, reg, 3); 3585 mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4)); 3586 if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) || 3587 mb[3] != PROD_ID_3) { 3588 ql_log(ql_log_warn, vha, 0x0062, 3589 "Wrong product ID = 0x%x,0x%x,0x%x.\n", 3590 mb[1], mb[2], mb[3]); 3591 3592 goto chip_diag_failed; 3593 } 3594 ha->product_id[0] = mb[1]; 3595 ha->product_id[1] = mb[2]; 3596 ha->product_id[2] = mb[3]; 3597 ha->product_id[3] = mb[4]; 3598 3599 /* Adjust fw RISC transfer size */ 3600 if (req->length > 1024) 3601 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024; 3602 else 3603 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 3604 req->length; 3605 3606 if (IS_QLA2200(ha) && 3607 RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) { 3608 /* Limit firmware transfer size with a 2200A */ 3609 ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n"); 3610 3611 ha->device_type |= DT_ISP2200A; 3612 ha->fw_transfer_size = 128; 3613 } 3614 3615 /* Wrap Incoming Mailboxes Test. */ 3616 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3617 3618 ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n"); 3619 rval = qla2x00_mbx_reg_test(vha); 3620 if (rval) 3621 ql_log(ql_log_warn, vha, 0x0080, 3622 "Failed mailbox send register test.\n"); 3623 else 3624 /* Flag a successful rval */ 3625 rval = QLA_SUCCESS; 3626 spin_lock_irqsave(&ha->hardware_lock, flags); 3627 3628 chip_diag_failed: 3629 if (rval) 3630 ql_log(ql_log_info, vha, 0x0081, 3631 "Chip diagnostics **** FAILED ****.\n"); 3632 3633 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3634 3635 return (rval); 3636 } 3637 3638 /** 3639 * qla24xx_chip_diag() - Test ISP24xx for proper operation. 3640 * @vha: HA context 3641 * 3642 * Returns 0 on success. 3643 */ 3644 int 3645 qla24xx_chip_diag(scsi_qla_host_t *vha) 3646 { 3647 int rval; 3648 struct qla_hw_data *ha = vha->hw; 3649 struct req_que *req = ha->req_q_map[0]; 3650 3651 if (IS_P3P_TYPE(ha)) 3652 return QLA_SUCCESS; 3653 3654 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length; 3655 3656 rval = qla2x00_mbx_reg_test(vha); 3657 if (rval) { 3658 ql_log(ql_log_warn, vha, 0x0082, 3659 "Failed mailbox send register test.\n"); 3660 } else { 3661 /* Flag a successful rval */ 3662 rval = QLA_SUCCESS; 3663 } 3664 3665 return rval; 3666 } 3667 3668 static void 3669 qla2x00_init_fce_trace(scsi_qla_host_t *vha) 3670 { 3671 int rval; 3672 dma_addr_t tc_dma; 3673 void *tc; 3674 struct qla_hw_data *ha = vha->hw; 3675 3676 if (!IS_FWI2_CAPABLE(ha)) 3677 return; 3678 3679 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) && 3680 !IS_QLA27XX(ha) && !IS_QLA28XX(ha)) 3681 return; 3682 3683 if (ha->fce) { 3684 ql_dbg(ql_dbg_init, vha, 0x00bd, 3685 "%s: FCE Mem is already allocated.\n", 3686 __func__); 3687 return; 3688 } 3689 3690 /* Allocate memory for Fibre Channel Event Buffer. */ 3691 tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma, 3692 GFP_KERNEL); 3693 if (!tc) { 3694 ql_log(ql_log_warn, vha, 0x00be, 3695 "Unable to allocate (%d KB) for FCE.\n", 3696 FCE_SIZE / 1024); 3697 return; 3698 } 3699 3700 rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS, 3701 ha->fce_mb, &ha->fce_bufs); 3702 if (rval) { 3703 ql_log(ql_log_warn, vha, 0x00bf, 3704 "Unable to initialize FCE (%d).\n", rval); 3705 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc, tc_dma); 3706 return; 3707 } 3708 3709 ql_dbg(ql_dbg_init, vha, 0x00c0, 3710 "Allocated (%d KB) for FCE...\n", FCE_SIZE / 1024); 3711 3712 ha->flags.fce_enabled = 1; 3713 ha->fce_dma = tc_dma; 3714 ha->fce = tc; 3715 } 3716 3717 static void 3718 qla2x00_init_eft_trace(scsi_qla_host_t *vha) 3719 { 3720 int rval; 3721 dma_addr_t tc_dma; 3722 void *tc; 3723 struct qla_hw_data *ha = vha->hw; 3724 3725 if (!IS_FWI2_CAPABLE(ha)) 3726 return; 3727 3728 if (ha->eft) { 3729 ql_dbg(ql_dbg_init, vha, 0x00bd, 3730 "%s: EFT Mem is already allocated.\n", 3731 __func__); 3732 return; 3733 } 3734 3735 /* Allocate memory for Extended Trace Buffer. */ 3736 tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma, 3737 GFP_KERNEL); 3738 if (!tc) { 3739 ql_log(ql_log_warn, vha, 0x00c1, 3740 "Unable to allocate (%d KB) for EFT.\n", 3741 EFT_SIZE / 1024); 3742 return; 3743 } 3744 3745 rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS); 3746 if (rval) { 3747 ql_log(ql_log_warn, vha, 0x00c2, 3748 "Unable to initialize EFT (%d).\n", rval); 3749 dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc, tc_dma); 3750 return; 3751 } 3752 3753 ql_dbg(ql_dbg_init, vha, 0x00c3, 3754 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024); 3755 3756 ha->eft_dma = tc_dma; 3757 ha->eft = tc; 3758 } 3759 3760 static void 3761 qla2x00_alloc_offload_mem(scsi_qla_host_t *vha) 3762 { 3763 qla2x00_init_fce_trace(vha); 3764 qla2x00_init_eft_trace(vha); 3765 } 3766 3767 void 3768 qla2x00_alloc_fw_dump(scsi_qla_host_t *vha) 3769 { 3770 uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size, 3771 eft_size, fce_size, mq_size; 3772 struct qla_hw_data *ha = vha->hw; 3773 struct req_que *req = ha->req_q_map[0]; 3774 struct rsp_que *rsp = ha->rsp_q_map[0]; 3775 struct qla2xxx_fw_dump *fw_dump; 3776 3777 if (ha->fw_dump) { 3778 ql_dbg(ql_dbg_init, vha, 0x00bd, 3779 "Firmware dump already allocated.\n"); 3780 return; 3781 } 3782 3783 ha->fw_dumped = 0; 3784 ha->fw_dump_cap_flags = 0; 3785 dump_size = fixed_size = mem_size = eft_size = fce_size = mq_size = 0; 3786 req_q_size = rsp_q_size = 0; 3787 3788 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 3789 fixed_size = sizeof(struct qla2100_fw_dump); 3790 } else if (IS_QLA23XX(ha)) { 3791 fixed_size = offsetof(struct qla2300_fw_dump, data_ram); 3792 mem_size = (ha->fw_memory_size - 0x11000 + 1) * 3793 sizeof(uint16_t); 3794 } else if (IS_FWI2_CAPABLE(ha)) { 3795 if (IS_QLA83XX(ha)) 3796 fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem); 3797 else if (IS_QLA81XX(ha)) 3798 fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem); 3799 else if (IS_QLA25XX(ha)) 3800 fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem); 3801 else 3802 fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem); 3803 3804 mem_size = (ha->fw_memory_size - 0x100000 + 1) * 3805 sizeof(uint32_t); 3806 if (ha->mqenable) { 3807 if (!IS_QLA83XX(ha)) 3808 mq_size = sizeof(struct qla2xxx_mq_chain); 3809 /* 3810 * Allocate maximum buffer size for all queues - Q0. 3811 * Resizing must be done at end-of-dump processing. 3812 */ 3813 mq_size += (ha->max_req_queues - 1) * 3814 (req->length * sizeof(request_t)); 3815 mq_size += (ha->max_rsp_queues - 1) * 3816 (rsp->length * sizeof(response_t)); 3817 } 3818 if (ha->tgt.atio_ring) 3819 mq_size += ha->tgt.atio_q_length * sizeof(request_t); 3820 3821 qla2x00_init_fce_trace(vha); 3822 if (ha->fce) 3823 fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE; 3824 qla2x00_init_eft_trace(vha); 3825 if (ha->eft) 3826 eft_size = EFT_SIZE; 3827 } 3828 3829 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) { 3830 struct fwdt *fwdt = ha->fwdt; 3831 uint j; 3832 3833 for (j = 0; j < 2; j++, fwdt++) { 3834 if (!fwdt->template) { 3835 ql_dbg(ql_dbg_init, vha, 0x00ba, 3836 "-> fwdt%u no template\n", j); 3837 continue; 3838 } 3839 ql_dbg(ql_dbg_init, vha, 0x00fa, 3840 "-> fwdt%u calculating fwdump size...\n", j); 3841 fwdt->dump_size = qla27xx_fwdt_calculate_dump_size( 3842 vha, fwdt->template); 3843 ql_dbg(ql_dbg_init, vha, 0x00fa, 3844 "-> fwdt%u calculated fwdump size = %#lx bytes\n", 3845 j, fwdt->dump_size); 3846 dump_size += fwdt->dump_size; 3847 } 3848 /* Add space for spare MPI fw dump. */ 3849 dump_size += ha->fwdt[1].dump_size; 3850 } else { 3851 req_q_size = req->length * sizeof(request_t); 3852 rsp_q_size = rsp->length * sizeof(response_t); 3853 dump_size = offsetof(struct qla2xxx_fw_dump, isp); 3854 dump_size += fixed_size + mem_size + req_q_size + rsp_q_size 3855 + eft_size; 3856 ha->chain_offset = dump_size; 3857 dump_size += mq_size + fce_size; 3858 if (ha->exchoffld_buf) 3859 dump_size += sizeof(struct qla2xxx_offld_chain) + 3860 ha->exchoffld_size; 3861 if (ha->exlogin_buf) 3862 dump_size += sizeof(struct qla2xxx_offld_chain) + 3863 ha->exlogin_size; 3864 } 3865 3866 if (!ha->fw_dump_len || dump_size > ha->fw_dump_alloc_len) { 3867 3868 ql_dbg(ql_dbg_init, vha, 0x00c5, 3869 "%s dump_size %d fw_dump_len %d fw_dump_alloc_len %d\n", 3870 __func__, dump_size, ha->fw_dump_len, 3871 ha->fw_dump_alloc_len); 3872 3873 fw_dump = vmalloc(dump_size); 3874 if (!fw_dump) { 3875 ql_log(ql_log_warn, vha, 0x00c4, 3876 "Unable to allocate (%d KB) for firmware dump.\n", 3877 dump_size / 1024); 3878 } else { 3879 mutex_lock(&ha->optrom_mutex); 3880 if (ha->fw_dumped) { 3881 memcpy(fw_dump, ha->fw_dump, ha->fw_dump_len); 3882 vfree(ha->fw_dump); 3883 ha->fw_dump = fw_dump; 3884 ha->fw_dump_alloc_len = dump_size; 3885 ql_dbg(ql_dbg_init, vha, 0x00c5, 3886 "Re-Allocated (%d KB) and save firmware dump.\n", 3887 dump_size / 1024); 3888 } else { 3889 vfree(ha->fw_dump); 3890 ha->fw_dump = fw_dump; 3891 3892 ha->fw_dump_len = ha->fw_dump_alloc_len = 3893 dump_size; 3894 ql_dbg(ql_dbg_init, vha, 0x00c5, 3895 "Allocated (%d KB) for firmware dump.\n", 3896 dump_size / 1024); 3897 3898 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) { 3899 ha->mpi_fw_dump = (char *)fw_dump + 3900 ha->fwdt[1].dump_size; 3901 mutex_unlock(&ha->optrom_mutex); 3902 return; 3903 } 3904 3905 ha->fw_dump->signature[0] = 'Q'; 3906 ha->fw_dump->signature[1] = 'L'; 3907 ha->fw_dump->signature[2] = 'G'; 3908 ha->fw_dump->signature[3] = 'C'; 3909 ha->fw_dump->version = htonl(1); 3910 3911 ha->fw_dump->fixed_size = htonl(fixed_size); 3912 ha->fw_dump->mem_size = htonl(mem_size); 3913 ha->fw_dump->req_q_size = htonl(req_q_size); 3914 ha->fw_dump->rsp_q_size = htonl(rsp_q_size); 3915 3916 ha->fw_dump->eft_size = htonl(eft_size); 3917 ha->fw_dump->eft_addr_l = 3918 htonl(LSD(ha->eft_dma)); 3919 ha->fw_dump->eft_addr_h = 3920 htonl(MSD(ha->eft_dma)); 3921 3922 ha->fw_dump->header_size = 3923 htonl(offsetof 3924 (struct qla2xxx_fw_dump, isp)); 3925 } 3926 mutex_unlock(&ha->optrom_mutex); 3927 } 3928 } 3929 } 3930 3931 static int 3932 qla81xx_mpi_sync(scsi_qla_host_t *vha) 3933 { 3934 #define MPS_MASK 0xe0 3935 int rval; 3936 uint16_t dc; 3937 uint32_t dw; 3938 3939 if (!IS_QLA81XX(vha->hw)) 3940 return QLA_SUCCESS; 3941 3942 rval = qla2x00_write_ram_word(vha, 0x7c00, 1); 3943 if (rval != QLA_SUCCESS) { 3944 ql_log(ql_log_warn, vha, 0x0105, 3945 "Unable to acquire semaphore.\n"); 3946 goto done; 3947 } 3948 3949 pci_read_config_word(vha->hw->pdev, 0x54, &dc); 3950 rval = qla2x00_read_ram_word(vha, 0x7a15, &dw); 3951 if (rval != QLA_SUCCESS) { 3952 ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n"); 3953 goto done_release; 3954 } 3955 3956 dc &= MPS_MASK; 3957 if (dc == (dw & MPS_MASK)) 3958 goto done_release; 3959 3960 dw &= ~MPS_MASK; 3961 dw |= dc; 3962 rval = qla2x00_write_ram_word(vha, 0x7a15, dw); 3963 if (rval != QLA_SUCCESS) { 3964 ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n"); 3965 } 3966 3967 done_release: 3968 rval = qla2x00_write_ram_word(vha, 0x7c00, 0); 3969 if (rval != QLA_SUCCESS) { 3970 ql_log(ql_log_warn, vha, 0x006d, 3971 "Unable to release semaphore.\n"); 3972 } 3973 3974 done: 3975 return rval; 3976 } 3977 3978 int 3979 qla2x00_alloc_outstanding_cmds(struct qla_hw_data *ha, struct req_que *req) 3980 { 3981 /* Don't try to reallocate the array */ 3982 if (req->outstanding_cmds) 3983 return QLA_SUCCESS; 3984 3985 if (!IS_FWI2_CAPABLE(ha)) 3986 req->num_outstanding_cmds = DEFAULT_OUTSTANDING_COMMANDS; 3987 else { 3988 if (ha->cur_fw_xcb_count <= ha->cur_fw_iocb_count) 3989 req->num_outstanding_cmds = ha->cur_fw_xcb_count; 3990 else 3991 req->num_outstanding_cmds = ha->cur_fw_iocb_count; 3992 } 3993 3994 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds, 3995 sizeof(srb_t *), 3996 GFP_KERNEL); 3997 3998 if (!req->outstanding_cmds) { 3999 /* 4000 * Try to allocate a minimal size just so we can get through 4001 * initialization. 4002 */ 4003 req->num_outstanding_cmds = MIN_OUTSTANDING_COMMANDS; 4004 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds, 4005 sizeof(srb_t *), 4006 GFP_KERNEL); 4007 4008 if (!req->outstanding_cmds) { 4009 ql_log(ql_log_fatal, NULL, 0x0126, 4010 "Failed to allocate memory for " 4011 "outstanding_cmds for req_que %p.\n", req); 4012 req->num_outstanding_cmds = 0; 4013 return QLA_FUNCTION_FAILED; 4014 } 4015 } 4016 4017 return QLA_SUCCESS; 4018 } 4019 4020 #define PRINT_FIELD(_field, _flag, _str) { \ 4021 if (a0->_field & _flag) {\ 4022 if (p) {\ 4023 strcat(ptr, "|");\ 4024 ptr++;\ 4025 leftover--;\ 4026 } \ 4027 len = snprintf(ptr, leftover, "%s", _str); \ 4028 p = 1;\ 4029 leftover -= len;\ 4030 ptr += len; \ 4031 } \ 4032 } 4033 4034 static void qla2xxx_print_sfp_info(struct scsi_qla_host *vha) 4035 { 4036 #define STR_LEN 64 4037 struct sff_8247_a0 *a0 = (struct sff_8247_a0 *)vha->hw->sfp_data; 4038 u8 str[STR_LEN], *ptr, p; 4039 int leftover, len; 4040 4041 memset(str, 0, STR_LEN); 4042 snprintf(str, SFF_VEN_NAME_LEN+1, a0->vendor_name); 4043 ql_dbg(ql_dbg_init, vha, 0x015a, 4044 "SFP MFG Name: %s\n", str); 4045 4046 memset(str, 0, STR_LEN); 4047 snprintf(str, SFF_PART_NAME_LEN+1, a0->vendor_pn); 4048 ql_dbg(ql_dbg_init, vha, 0x015c, 4049 "SFP Part Name: %s\n", str); 4050 4051 /* media */ 4052 memset(str, 0, STR_LEN); 4053 ptr = str; 4054 leftover = STR_LEN; 4055 p = len = 0; 4056 PRINT_FIELD(fc_med_cc9, FC_MED_TW, "Twin AX"); 4057 PRINT_FIELD(fc_med_cc9, FC_MED_TP, "Twisted Pair"); 4058 PRINT_FIELD(fc_med_cc9, FC_MED_MI, "Min Coax"); 4059 PRINT_FIELD(fc_med_cc9, FC_MED_TV, "Video Coax"); 4060 PRINT_FIELD(fc_med_cc9, FC_MED_M6, "MultiMode 62.5um"); 4061 PRINT_FIELD(fc_med_cc9, FC_MED_M5, "MultiMode 50um"); 4062 PRINT_FIELD(fc_med_cc9, FC_MED_SM, "SingleMode"); 4063 ql_dbg(ql_dbg_init, vha, 0x0160, 4064 "SFP Media: %s\n", str); 4065 4066 /* link length */ 4067 memset(str, 0, STR_LEN); 4068 ptr = str; 4069 leftover = STR_LEN; 4070 p = len = 0; 4071 PRINT_FIELD(fc_ll_cc7, FC_LL_VL, "Very Long"); 4072 PRINT_FIELD(fc_ll_cc7, FC_LL_S, "Short"); 4073 PRINT_FIELD(fc_ll_cc7, FC_LL_I, "Intermediate"); 4074 PRINT_FIELD(fc_ll_cc7, FC_LL_L, "Long"); 4075 PRINT_FIELD(fc_ll_cc7, FC_LL_M, "Medium"); 4076 ql_dbg(ql_dbg_init, vha, 0x0196, 4077 "SFP Link Length: %s\n", str); 4078 4079 memset(str, 0, STR_LEN); 4080 ptr = str; 4081 leftover = STR_LEN; 4082 p = len = 0; 4083 PRINT_FIELD(fc_ll_cc7, FC_LL_SA, "Short Wave (SA)"); 4084 PRINT_FIELD(fc_ll_cc7, FC_LL_LC, "Long Wave(LC)"); 4085 PRINT_FIELD(fc_tec_cc8, FC_TEC_SN, "Short Wave (SN)"); 4086 PRINT_FIELD(fc_tec_cc8, FC_TEC_SL, "Short Wave (SL)"); 4087 PRINT_FIELD(fc_tec_cc8, FC_TEC_LL, "Long Wave (LL)"); 4088 ql_dbg(ql_dbg_init, vha, 0x016e, 4089 "SFP FC Link Tech: %s\n", str); 4090 4091 if (a0->length_km) 4092 ql_dbg(ql_dbg_init, vha, 0x016f, 4093 "SFP Distant: %d km\n", a0->length_km); 4094 if (a0->length_100m) 4095 ql_dbg(ql_dbg_init, vha, 0x0170, 4096 "SFP Distant: %d m\n", a0->length_100m*100); 4097 if (a0->length_50um_10m) 4098 ql_dbg(ql_dbg_init, vha, 0x0189, 4099 "SFP Distant (WL=50um): %d m\n", a0->length_50um_10m * 10); 4100 if (a0->length_62um_10m) 4101 ql_dbg(ql_dbg_init, vha, 0x018a, 4102 "SFP Distant (WL=62.5um): %d m\n", a0->length_62um_10m * 10); 4103 if (a0->length_om4_10m) 4104 ql_dbg(ql_dbg_init, vha, 0x0194, 4105 "SFP Distant (OM4): %d m\n", a0->length_om4_10m * 10); 4106 if (a0->length_om3_10m) 4107 ql_dbg(ql_dbg_init, vha, 0x0195, 4108 "SFP Distant (OM3): %d m\n", a0->length_om3_10m * 10); 4109 } 4110 4111 4112 /** 4113 * qla24xx_detect_sfp() 4114 * 4115 * @vha: adapter state pointer. 4116 * 4117 * @return 4118 * 0 -- Configure firmware to use short-range settings -- normal 4119 * buffer-to-buffer credits. 4120 * 4121 * 1 -- Configure firmware to use long-range settings -- extra 4122 * buffer-to-buffer credits should be allocated with 4123 * ha->lr_distance containing distance settings from NVRAM or SFP 4124 * (if supported). 4125 */ 4126 int 4127 qla24xx_detect_sfp(scsi_qla_host_t *vha) 4128 { 4129 int rc, used_nvram; 4130 struct sff_8247_a0 *a; 4131 struct qla_hw_data *ha = vha->hw; 4132 struct nvram_81xx *nv = ha->nvram; 4133 #define LR_DISTANCE_UNKNOWN 2 4134 static const char * const types[] = { "Short", "Long" }; 4135 static const char * const lengths[] = { "(10km)", "(5km)", "" }; 4136 u8 ll = 0; 4137 4138 /* Seed with NVRAM settings. */ 4139 used_nvram = 0; 4140 ha->flags.lr_detected = 0; 4141 if (IS_BPM_RANGE_CAPABLE(ha) && 4142 (nv->enhanced_features & NEF_LR_DIST_ENABLE)) { 4143 used_nvram = 1; 4144 ha->flags.lr_detected = 1; 4145 ha->lr_distance = 4146 (nv->enhanced_features >> LR_DIST_NV_POS) 4147 & LR_DIST_NV_MASK; 4148 } 4149 4150 if (!IS_BPM_ENABLED(vha)) 4151 goto out; 4152 /* Determine SR/LR capabilities of SFP/Transceiver. */ 4153 rc = qla2x00_read_sfp_dev(vha, NULL, 0); 4154 if (rc) 4155 goto out; 4156 4157 used_nvram = 0; 4158 a = (struct sff_8247_a0 *)vha->hw->sfp_data; 4159 qla2xxx_print_sfp_info(vha); 4160 4161 ha->flags.lr_detected = 0; 4162 ll = a->fc_ll_cc7; 4163 if (ll & FC_LL_VL || ll & FC_LL_L) { 4164 /* Long range, track length. */ 4165 ha->flags.lr_detected = 1; 4166 4167 if (a->length_km > 5 || a->length_100m > 50) 4168 ha->lr_distance = LR_DISTANCE_10K; 4169 else 4170 ha->lr_distance = LR_DISTANCE_5K; 4171 } 4172 4173 out: 4174 ql_dbg(ql_dbg_async, vha, 0x507b, 4175 "SFP detect: %s-Range SFP %s (nvr=%x ll=%x lr=%x lrd=%x).\n", 4176 types[ha->flags.lr_detected], 4177 ha->flags.lr_detected ? lengths[ha->lr_distance] : 4178 lengths[LR_DISTANCE_UNKNOWN], 4179 used_nvram, ll, ha->flags.lr_detected, ha->lr_distance); 4180 return ha->flags.lr_detected; 4181 } 4182 4183 static void __qla_adjust_iocb_limit(struct qla_qpair *qpair) 4184 { 4185 u8 num_qps; 4186 u16 limit; 4187 struct qla_hw_data *ha = qpair->vha->hw; 4188 4189 num_qps = ha->num_qpairs + 1; 4190 limit = (ha->orig_fw_iocb_count * QLA_IOCB_PCT_LIMIT) / 100; 4191 4192 qpair->fwres.iocbs_total = ha->orig_fw_iocb_count; 4193 qpair->fwres.iocbs_limit = limit; 4194 qpair->fwres.iocbs_qp_limit = limit / num_qps; 4195 4196 qpair->fwres.exch_total = ha->orig_fw_xcb_count; 4197 qpair->fwres.exch_limit = (ha->orig_fw_xcb_count * 4198 QLA_IOCB_PCT_LIMIT) / 100; 4199 } 4200 4201 void qla_init_iocb_limit(scsi_qla_host_t *vha) 4202 { 4203 u8 i; 4204 struct qla_hw_data *ha = vha->hw; 4205 4206 __qla_adjust_iocb_limit(ha->base_qpair); 4207 ha->base_qpair->fwres.iocbs_used = 0; 4208 ha->base_qpair->fwres.exch_used = 0; 4209 4210 for (i = 0; i < ha->max_qpairs; i++) { 4211 if (ha->queue_pair_map[i]) { 4212 __qla_adjust_iocb_limit(ha->queue_pair_map[i]); 4213 ha->queue_pair_map[i]->fwres.iocbs_used = 0; 4214 ha->queue_pair_map[i]->fwres.exch_used = 0; 4215 } 4216 } 4217 } 4218 4219 void qla_adjust_iocb_limit(scsi_qla_host_t *vha) 4220 { 4221 u8 i; 4222 struct qla_hw_data *ha = vha->hw; 4223 4224 __qla_adjust_iocb_limit(ha->base_qpair); 4225 4226 for (i = 0; i < ha->max_qpairs; i++) { 4227 if (ha->queue_pair_map[i]) 4228 __qla_adjust_iocb_limit(ha->queue_pair_map[i]); 4229 } 4230 } 4231 4232 /** 4233 * qla2x00_setup_chip() - Load and start RISC firmware. 4234 * @vha: HA context 4235 * 4236 * Returns 0 on success. 4237 */ 4238 static int 4239 qla2x00_setup_chip(scsi_qla_host_t *vha) 4240 { 4241 int rval; 4242 uint32_t srisc_address = 0; 4243 struct qla_hw_data *ha = vha->hw; 4244 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 4245 unsigned long flags; 4246 uint16_t fw_major_version; 4247 int done_once = 0; 4248 4249 if (IS_P3P_TYPE(ha)) { 4250 rval = ha->isp_ops->load_risc(vha, &srisc_address); 4251 if (rval == QLA_SUCCESS) { 4252 qla2x00_stop_firmware(vha); 4253 goto enable_82xx_npiv; 4254 } else 4255 goto failed; 4256 } 4257 4258 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { 4259 /* Disable SRAM, Instruction RAM and GP RAM parity. */ 4260 spin_lock_irqsave(&ha->hardware_lock, flags); 4261 wrt_reg_word(®->hccr, (HCCR_ENABLE_PARITY + 0x0)); 4262 rd_reg_word(®->hccr); 4263 spin_unlock_irqrestore(&ha->hardware_lock, flags); 4264 } 4265 4266 qla81xx_mpi_sync(vha); 4267 4268 execute_fw_with_lr: 4269 /* Load firmware sequences */ 4270 rval = ha->isp_ops->load_risc(vha, &srisc_address); 4271 if (rval == QLA_SUCCESS) { 4272 ql_dbg(ql_dbg_init, vha, 0x00c9, 4273 "Verifying Checksum of loaded RISC code.\n"); 4274 4275 rval = qla2x00_verify_checksum(vha, srisc_address); 4276 if (rval == QLA_SUCCESS) { 4277 /* Start firmware execution. */ 4278 ql_dbg(ql_dbg_init, vha, 0x00ca, 4279 "Starting firmware.\n"); 4280 4281 if (ql2xexlogins) 4282 ha->flags.exlogins_enabled = 1; 4283 4284 if (qla_is_exch_offld_enabled(vha)) 4285 ha->flags.exchoffld_enabled = 1; 4286 4287 rval = qla2x00_execute_fw(vha, srisc_address); 4288 /* Retrieve firmware information. */ 4289 if (rval == QLA_SUCCESS) { 4290 /* Enable BPM support? */ 4291 if (!done_once++ && qla24xx_detect_sfp(vha)) { 4292 ql_dbg(ql_dbg_init, vha, 0x00ca, 4293 "Re-starting firmware -- BPM.\n"); 4294 /* Best-effort - re-init. */ 4295 ha->isp_ops->reset_chip(vha); 4296 ha->isp_ops->chip_diag(vha); 4297 goto execute_fw_with_lr; 4298 } 4299 4300 if (IS_ZIO_THRESHOLD_CAPABLE(ha)) 4301 qla27xx_set_zio_threshold(vha, 4302 ha->last_zio_threshold); 4303 4304 rval = qla2x00_set_exlogins_buffer(vha); 4305 if (rval != QLA_SUCCESS) 4306 goto failed; 4307 4308 rval = qla2x00_set_exchoffld_buffer(vha); 4309 if (rval != QLA_SUCCESS) 4310 goto failed; 4311 4312 enable_82xx_npiv: 4313 fw_major_version = ha->fw_major_version; 4314 if (IS_P3P_TYPE(ha)) 4315 qla82xx_check_md_needed(vha); 4316 else 4317 rval = qla2x00_get_fw_version(vha); 4318 if (rval != QLA_SUCCESS) 4319 goto failed; 4320 ha->flags.npiv_supported = 0; 4321 if (IS_QLA2XXX_MIDTYPE(ha) && 4322 (ha->fw_attributes & BIT_2)) { 4323 ha->flags.npiv_supported = 1; 4324 if ((!ha->max_npiv_vports) || 4325 ((ha->max_npiv_vports + 1) % 4326 MIN_MULTI_ID_FABRIC)) 4327 ha->max_npiv_vports = 4328 MIN_MULTI_ID_FABRIC - 1; 4329 } 4330 qla2x00_get_resource_cnts(vha); 4331 qla_init_iocb_limit(vha); 4332 4333 /* 4334 * Allocate the array of outstanding commands 4335 * now that we know the firmware resources. 4336 */ 4337 rval = qla2x00_alloc_outstanding_cmds(ha, 4338 vha->req); 4339 if (rval != QLA_SUCCESS) 4340 goto failed; 4341 4342 if (!fw_major_version && !(IS_P3P_TYPE(ha))) 4343 qla2x00_alloc_offload_mem(vha); 4344 4345 if (ql2xallocfwdump && !(IS_P3P_TYPE(ha))) 4346 qla2x00_alloc_fw_dump(vha); 4347 4348 } else { 4349 goto failed; 4350 } 4351 } else { 4352 ql_log(ql_log_fatal, vha, 0x00cd, 4353 "ISP Firmware failed checksum.\n"); 4354 goto failed; 4355 } 4356 4357 /* Enable PUREX PASSTHRU */ 4358 if (ql2xrdpenable || ha->flags.scm_supported_f || 4359 ha->flags.edif_enabled) 4360 qla25xx_set_els_cmds_supported(vha); 4361 } else 4362 goto failed; 4363 4364 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { 4365 /* Enable proper parity. */ 4366 spin_lock_irqsave(&ha->hardware_lock, flags); 4367 if (IS_QLA2300(ha)) 4368 /* SRAM parity */ 4369 wrt_reg_word(®->hccr, HCCR_ENABLE_PARITY + 0x1); 4370 else 4371 /* SRAM, Instruction RAM and GP RAM parity */ 4372 wrt_reg_word(®->hccr, HCCR_ENABLE_PARITY + 0x7); 4373 rd_reg_word(®->hccr); 4374 spin_unlock_irqrestore(&ha->hardware_lock, flags); 4375 } 4376 4377 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) 4378 ha->flags.fac_supported = 1; 4379 else if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) { 4380 uint32_t size; 4381 4382 rval = qla81xx_fac_get_sector_size(vha, &size); 4383 if (rval == QLA_SUCCESS) { 4384 ha->flags.fac_supported = 1; 4385 ha->fdt_block_size = size << 2; 4386 } else { 4387 ql_log(ql_log_warn, vha, 0x00ce, 4388 "Unsupported FAC firmware (%d.%02d.%02d).\n", 4389 ha->fw_major_version, ha->fw_minor_version, 4390 ha->fw_subminor_version); 4391 4392 if (IS_QLA83XX(ha)) { 4393 ha->flags.fac_supported = 0; 4394 rval = QLA_SUCCESS; 4395 } 4396 } 4397 } 4398 failed: 4399 if (rval) { 4400 ql_log(ql_log_fatal, vha, 0x00cf, 4401 "Setup chip ****FAILED****.\n"); 4402 } 4403 4404 return (rval); 4405 } 4406 4407 /** 4408 * qla2x00_init_response_q_entries() - Initializes response queue entries. 4409 * @rsp: response queue 4410 * 4411 * Beginning of request ring has initialization control block already built 4412 * by nvram config routine. 4413 * 4414 * Returns 0 on success. 4415 */ 4416 void 4417 qla2x00_init_response_q_entries(struct rsp_que *rsp) 4418 { 4419 uint16_t cnt; 4420 response_t *pkt; 4421 4422 rsp->ring_ptr = rsp->ring; 4423 rsp->ring_index = 0; 4424 rsp->status_srb = NULL; 4425 pkt = rsp->ring_ptr; 4426 for (cnt = 0; cnt < rsp->length; cnt++) { 4427 pkt->signature = RESPONSE_PROCESSED; 4428 pkt++; 4429 } 4430 } 4431 4432 /** 4433 * qla2x00_update_fw_options() - Read and process firmware options. 4434 * @vha: HA context 4435 * 4436 * Returns 0 on success. 4437 */ 4438 void 4439 qla2x00_update_fw_options(scsi_qla_host_t *vha) 4440 { 4441 uint16_t swing, emphasis, tx_sens, rx_sens; 4442 struct qla_hw_data *ha = vha->hw; 4443 4444 memset(ha->fw_options, 0, sizeof(ha->fw_options)); 4445 qla2x00_get_fw_options(vha, ha->fw_options); 4446 4447 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 4448 return; 4449 4450 /* Serial Link options. */ 4451 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115, 4452 "Serial link options.\n"); 4453 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109, 4454 ha->fw_seriallink_options, sizeof(ha->fw_seriallink_options)); 4455 4456 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING; 4457 if (ha->fw_seriallink_options[3] & BIT_2) { 4458 ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING; 4459 4460 /* 1G settings */ 4461 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0); 4462 emphasis = (ha->fw_seriallink_options[2] & 4463 (BIT_4 | BIT_3)) >> 3; 4464 tx_sens = ha->fw_seriallink_options[0] & 4465 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 4466 rx_sens = (ha->fw_seriallink_options[0] & 4467 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; 4468 ha->fw_options[10] = (emphasis << 14) | (swing << 8); 4469 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { 4470 if (rx_sens == 0x0) 4471 rx_sens = 0x3; 4472 ha->fw_options[10] |= (tx_sens << 4) | rx_sens; 4473 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) 4474 ha->fw_options[10] |= BIT_5 | 4475 ((rx_sens & (BIT_1 | BIT_0)) << 2) | 4476 (tx_sens & (BIT_1 | BIT_0)); 4477 4478 /* 2G settings */ 4479 swing = (ha->fw_seriallink_options[2] & 4480 (BIT_7 | BIT_6 | BIT_5)) >> 5; 4481 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0); 4482 tx_sens = ha->fw_seriallink_options[1] & 4483 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 4484 rx_sens = (ha->fw_seriallink_options[1] & 4485 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; 4486 ha->fw_options[11] = (emphasis << 14) | (swing << 8); 4487 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { 4488 if (rx_sens == 0x0) 4489 rx_sens = 0x3; 4490 ha->fw_options[11] |= (tx_sens << 4) | rx_sens; 4491 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) 4492 ha->fw_options[11] |= BIT_5 | 4493 ((rx_sens & (BIT_1 | BIT_0)) << 2) | 4494 (tx_sens & (BIT_1 | BIT_0)); 4495 } 4496 4497 /* FCP2 options. */ 4498 /* Return command IOCBs without waiting for an ABTS to complete. */ 4499 ha->fw_options[3] |= BIT_13; 4500 4501 /* LED scheme. */ 4502 if (ha->flags.enable_led_scheme) 4503 ha->fw_options[2] |= BIT_12; 4504 4505 /* Detect ISP6312. */ 4506 if (IS_QLA6312(ha)) 4507 ha->fw_options[2] |= BIT_13; 4508 4509 /* Set Retry FLOGI in case of P2P connection */ 4510 if (ha->operating_mode == P2P) { 4511 ha->fw_options[2] |= BIT_3; 4512 ql_dbg(ql_dbg_disc, vha, 0x2100, 4513 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 4514 __func__, ha->fw_options[2]); 4515 } 4516 4517 /* Update firmware options. */ 4518 qla2x00_set_fw_options(vha, ha->fw_options); 4519 } 4520 4521 void 4522 qla24xx_update_fw_options(scsi_qla_host_t *vha) 4523 { 4524 int rval; 4525 struct qla_hw_data *ha = vha->hw; 4526 4527 if (IS_P3P_TYPE(ha)) 4528 return; 4529 4530 /* Hold status IOCBs until ABTS response received. */ 4531 if (ql2xfwholdabts) 4532 ha->fw_options[3] |= BIT_12; 4533 4534 /* Set Retry FLOGI in case of P2P connection */ 4535 if (ha->operating_mode == P2P) { 4536 ha->fw_options[2] |= BIT_3; 4537 ql_dbg(ql_dbg_disc, vha, 0x2101, 4538 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 4539 __func__, ha->fw_options[2]); 4540 } 4541 4542 /* Move PUREX, ABTS RX & RIDA to ATIOQ */ 4543 if (ql2xmvasynctoatio && !ha->flags.edif_enabled && 4544 (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))) { 4545 if (qla_tgt_mode_enabled(vha) || 4546 qla_dual_mode_enabled(vha)) 4547 ha->fw_options[2] |= BIT_11; 4548 else 4549 ha->fw_options[2] &= ~BIT_11; 4550 } 4551 4552 if (IS_QLA25XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha) || 4553 IS_QLA28XX(ha)) { 4554 /* 4555 * Tell FW to track each exchange to prevent 4556 * driver from using stale exchange. 4557 */ 4558 if (qla_tgt_mode_enabled(vha) || 4559 qla_dual_mode_enabled(vha)) 4560 ha->fw_options[2] |= BIT_4; 4561 else 4562 ha->fw_options[2] &= ~(BIT_4); 4563 4564 /* Reserve 1/2 of emergency exchanges for ELS.*/ 4565 if (qla2xuseresexchforels) 4566 ha->fw_options[2] |= BIT_8; 4567 else 4568 ha->fw_options[2] &= ~BIT_8; 4569 4570 /* 4571 * N2N: set Secure=1 for PLOGI ACC and 4572 * fw shal not send PRLI after PLOGI Acc 4573 */ 4574 if (ha->flags.edif_enabled && 4575 DBELL_ACTIVE(vha)) { 4576 ha->fw_options[3] |= BIT_15; 4577 ha->flags.n2n_fw_acc_sec = 1; 4578 } else { 4579 ha->fw_options[3] &= ~BIT_15; 4580 ha->flags.n2n_fw_acc_sec = 0; 4581 } 4582 } 4583 4584 if (ql2xrdpenable || ha->flags.scm_supported_f || 4585 ha->flags.edif_enabled) 4586 ha->fw_options[1] |= ADD_FO1_ENABLE_PUREX_IOCB; 4587 4588 /* Enable Async 8130/8131 events -- transceiver insertion/removal */ 4589 if (IS_BPM_RANGE_CAPABLE(ha)) 4590 ha->fw_options[3] |= BIT_10; 4591 4592 ql_dbg(ql_dbg_init, vha, 0x00e8, 4593 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n", 4594 __func__, ha->fw_options[1], ha->fw_options[2], 4595 ha->fw_options[3], vha->host->active_mode); 4596 4597 if (ha->fw_options[1] || ha->fw_options[2] || ha->fw_options[3]) 4598 qla2x00_set_fw_options(vha, ha->fw_options); 4599 4600 /* Update Serial Link options. */ 4601 if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0) 4602 return; 4603 4604 rval = qla2x00_set_serdes_params(vha, 4605 le16_to_cpu(ha->fw_seriallink_options24[1]), 4606 le16_to_cpu(ha->fw_seriallink_options24[2]), 4607 le16_to_cpu(ha->fw_seriallink_options24[3])); 4608 if (rval != QLA_SUCCESS) { 4609 ql_log(ql_log_warn, vha, 0x0104, 4610 "Unable to update Serial Link options (%x).\n", rval); 4611 } 4612 } 4613 4614 void 4615 qla2x00_config_rings(struct scsi_qla_host *vha) 4616 { 4617 struct qla_hw_data *ha = vha->hw; 4618 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 4619 struct req_que *req = ha->req_q_map[0]; 4620 struct rsp_que *rsp = ha->rsp_q_map[0]; 4621 4622 /* Setup ring parameters in initialization control block. */ 4623 ha->init_cb->request_q_outpointer = cpu_to_le16(0); 4624 ha->init_cb->response_q_inpointer = cpu_to_le16(0); 4625 ha->init_cb->request_q_length = cpu_to_le16(req->length); 4626 ha->init_cb->response_q_length = cpu_to_le16(rsp->length); 4627 put_unaligned_le64(req->dma, &ha->init_cb->request_q_address); 4628 put_unaligned_le64(rsp->dma, &ha->init_cb->response_q_address); 4629 4630 wrt_reg_word(ISP_REQ_Q_IN(ha, reg), 0); 4631 wrt_reg_word(ISP_REQ_Q_OUT(ha, reg), 0); 4632 wrt_reg_word(ISP_RSP_Q_IN(ha, reg), 0); 4633 wrt_reg_word(ISP_RSP_Q_OUT(ha, reg), 0); 4634 rd_reg_word(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */ 4635 } 4636 4637 void 4638 qla24xx_config_rings(struct scsi_qla_host *vha) 4639 { 4640 struct qla_hw_data *ha = vha->hw; 4641 device_reg_t *reg = ISP_QUE_REG(ha, 0); 4642 struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp; 4643 struct qla_msix_entry *msix; 4644 struct init_cb_24xx *icb; 4645 uint16_t rid = 0; 4646 struct req_que *req = ha->req_q_map[0]; 4647 struct rsp_que *rsp = ha->rsp_q_map[0]; 4648 4649 /* Setup ring parameters in initialization control block. */ 4650 icb = (struct init_cb_24xx *)ha->init_cb; 4651 icb->request_q_outpointer = cpu_to_le16(0); 4652 icb->response_q_inpointer = cpu_to_le16(0); 4653 icb->request_q_length = cpu_to_le16(req->length); 4654 icb->response_q_length = cpu_to_le16(rsp->length); 4655 put_unaligned_le64(req->dma, &icb->request_q_address); 4656 put_unaligned_le64(rsp->dma, &icb->response_q_address); 4657 4658 /* Setup ATIO queue dma pointers for target mode */ 4659 icb->atio_q_inpointer = cpu_to_le16(0); 4660 icb->atio_q_length = cpu_to_le16(ha->tgt.atio_q_length); 4661 put_unaligned_le64(ha->tgt.atio_dma, &icb->atio_q_address); 4662 4663 if (IS_SHADOW_REG_CAPABLE(ha)) 4664 icb->firmware_options_2 |= cpu_to_le32(BIT_30|BIT_29); 4665 4666 if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha) || 4667 IS_QLA28XX(ha)) { 4668 icb->qos = cpu_to_le16(QLA_DEFAULT_QUE_QOS); 4669 icb->rid = cpu_to_le16(rid); 4670 if (ha->flags.msix_enabled) { 4671 msix = &ha->msix_entries[1]; 4672 ql_dbg(ql_dbg_init, vha, 0x0019, 4673 "Registering vector 0x%x for base que.\n", 4674 msix->entry); 4675 icb->msix = cpu_to_le16(msix->entry); 4676 } 4677 /* Use alternate PCI bus number */ 4678 if (MSB(rid)) 4679 icb->firmware_options_2 |= cpu_to_le32(BIT_19); 4680 /* Use alternate PCI devfn */ 4681 if (LSB(rid)) 4682 icb->firmware_options_2 |= cpu_to_le32(BIT_18); 4683 4684 /* Use Disable MSIX Handshake mode for capable adapters */ 4685 if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) && 4686 (ha->flags.msix_enabled)) { 4687 icb->firmware_options_2 &= cpu_to_le32(~BIT_22); 4688 ha->flags.disable_msix_handshake = 1; 4689 ql_dbg(ql_dbg_init, vha, 0x00fe, 4690 "MSIX Handshake Disable Mode turned on.\n"); 4691 } else { 4692 icb->firmware_options_2 |= cpu_to_le32(BIT_22); 4693 } 4694 icb->firmware_options_2 |= cpu_to_le32(BIT_23); 4695 4696 wrt_reg_dword(®->isp25mq.req_q_in, 0); 4697 wrt_reg_dword(®->isp25mq.req_q_out, 0); 4698 wrt_reg_dword(®->isp25mq.rsp_q_in, 0); 4699 wrt_reg_dword(®->isp25mq.rsp_q_out, 0); 4700 } else { 4701 wrt_reg_dword(®->isp24.req_q_in, 0); 4702 wrt_reg_dword(®->isp24.req_q_out, 0); 4703 wrt_reg_dword(®->isp24.rsp_q_in, 0); 4704 wrt_reg_dword(®->isp24.rsp_q_out, 0); 4705 } 4706 4707 qlt_24xx_config_rings(vha); 4708 4709 /* If the user has configured the speed, set it here */ 4710 if (ha->set_data_rate) { 4711 ql_dbg(ql_dbg_init, vha, 0x00fd, 4712 "Speed set by user : %s Gbps \n", 4713 qla2x00_get_link_speed_str(ha, ha->set_data_rate)); 4714 icb->firmware_options_3 = cpu_to_le32(ha->set_data_rate << 13); 4715 } 4716 4717 /* PCI posting */ 4718 rd_reg_word(&ioreg->hccr); 4719 } 4720 4721 /** 4722 * qla2x00_init_rings() - Initializes firmware. 4723 * @vha: HA context 4724 * 4725 * Beginning of request ring has initialization control block already built 4726 * by nvram config routine. 4727 * 4728 * Returns 0 on success. 4729 */ 4730 int 4731 qla2x00_init_rings(scsi_qla_host_t *vha) 4732 { 4733 int rval; 4734 unsigned long flags = 0; 4735 int cnt, que; 4736 struct qla_hw_data *ha = vha->hw; 4737 struct req_que *req; 4738 struct rsp_que *rsp; 4739 struct mid_init_cb_24xx *mid_init_cb = 4740 (struct mid_init_cb_24xx *) ha->init_cb; 4741 4742 spin_lock_irqsave(&ha->hardware_lock, flags); 4743 4744 /* Clear outstanding commands array. */ 4745 for (que = 0; que < ha->max_req_queues; que++) { 4746 req = ha->req_q_map[que]; 4747 if (!req || !test_bit(que, ha->req_qid_map)) 4748 continue; 4749 req->out_ptr = (uint16_t *)(req->ring + req->length); 4750 *req->out_ptr = 0; 4751 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) 4752 req->outstanding_cmds[cnt] = NULL; 4753 4754 req->current_outstanding_cmd = 1; 4755 4756 /* Initialize firmware. */ 4757 req->ring_ptr = req->ring; 4758 req->ring_index = 0; 4759 req->cnt = req->length; 4760 } 4761 4762 for (que = 0; que < ha->max_rsp_queues; que++) { 4763 rsp = ha->rsp_q_map[que]; 4764 if (!rsp || !test_bit(que, ha->rsp_qid_map)) 4765 continue; 4766 rsp->in_ptr = (uint16_t *)(rsp->ring + rsp->length); 4767 *rsp->in_ptr = 0; 4768 /* Initialize response queue entries */ 4769 if (IS_QLAFX00(ha)) 4770 qlafx00_init_response_q_entries(rsp); 4771 else 4772 qla2x00_init_response_q_entries(rsp); 4773 } 4774 4775 ha->tgt.atio_ring_ptr = ha->tgt.atio_ring; 4776 ha->tgt.atio_ring_index = 0; 4777 /* Initialize ATIO queue entries */ 4778 qlt_init_atio_q_entries(vha); 4779 4780 ha->isp_ops->config_rings(vha); 4781 4782 spin_unlock_irqrestore(&ha->hardware_lock, flags); 4783 4784 if (IS_QLAFX00(ha)) { 4785 rval = qlafx00_init_firmware(vha, ha->init_cb_size); 4786 goto next_check; 4787 } 4788 4789 /* Update any ISP specific firmware options before initialization. */ 4790 ha->isp_ops->update_fw_options(vha); 4791 4792 ql_dbg(ql_dbg_init, vha, 0x00d1, 4793 "Issue init firmware FW opt 1-3= %08x %08x %08x.\n", 4794 le32_to_cpu(mid_init_cb->init_cb.firmware_options_1), 4795 le32_to_cpu(mid_init_cb->init_cb.firmware_options_2), 4796 le32_to_cpu(mid_init_cb->init_cb.firmware_options_3)); 4797 4798 if (ha->flags.npiv_supported) { 4799 if (ha->operating_mode == LOOP && !IS_CNA_CAPABLE(ha)) 4800 ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1; 4801 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports); 4802 } 4803 4804 if (IS_FWI2_CAPABLE(ha)) { 4805 mid_init_cb->options = cpu_to_le16(BIT_1); 4806 mid_init_cb->init_cb.execution_throttle = 4807 cpu_to_le16(ha->cur_fw_xcb_count); 4808 ha->flags.dport_enabled = 4809 (le32_to_cpu(mid_init_cb->init_cb.firmware_options_1) & 4810 BIT_7) != 0; 4811 ql_dbg(ql_dbg_init, vha, 0x0191, "DPORT Support: %s.\n", 4812 (ha->flags.dport_enabled) ? "enabled" : "disabled"); 4813 /* FA-WWPN Status */ 4814 ha->flags.fawwpn_enabled = 4815 (le32_to_cpu(mid_init_cb->init_cb.firmware_options_1) & 4816 BIT_6) != 0; 4817 ql_dbg(ql_dbg_init, vha, 0x00bc, "FA-WWPN Support: %s.\n", 4818 (ha->flags.fawwpn_enabled) ? "enabled" : "disabled"); 4819 /* Init_cb will be reused for other command(s). Save a backup copy of port_name */ 4820 memcpy(ha->port_name, ha->init_cb->port_name, WWN_SIZE); 4821 } 4822 4823 /* ELS pass through payload is limit by frame size. */ 4824 if (ha->flags.edif_enabled) 4825 mid_init_cb->init_cb.frame_payload_size = cpu_to_le16(ELS_MAX_PAYLOAD); 4826 4827 QLA_FW_STARTED(ha); 4828 rval = qla2x00_init_firmware(vha, ha->init_cb_size); 4829 next_check: 4830 if (rval) { 4831 QLA_FW_STOPPED(ha); 4832 ql_log(ql_log_fatal, vha, 0x00d2, 4833 "Init Firmware **** FAILED ****.\n"); 4834 } else { 4835 ql_dbg(ql_dbg_init, vha, 0x00d3, 4836 "Init Firmware -- success.\n"); 4837 vha->u_ql2xexchoffld = vha->u_ql2xiniexchg = 0; 4838 } 4839 4840 return (rval); 4841 } 4842 4843 /** 4844 * qla2x00_fw_ready() - Waits for firmware ready. 4845 * @vha: HA context 4846 * 4847 * Returns 0 on success. 4848 */ 4849 static int 4850 qla2x00_fw_ready(scsi_qla_host_t *vha) 4851 { 4852 int rval; 4853 unsigned long wtime, mtime, cs84xx_time; 4854 uint16_t min_wait; /* Minimum wait time if loop is down */ 4855 uint16_t wait_time; /* Wait time if loop is coming ready */ 4856 uint16_t state[6]; 4857 struct qla_hw_data *ha = vha->hw; 4858 4859 if (IS_QLAFX00(vha->hw)) 4860 return qlafx00_fw_ready(vha); 4861 4862 /* Time to wait for loop down */ 4863 if (IS_P3P_TYPE(ha)) 4864 min_wait = 30; 4865 else 4866 min_wait = 20; 4867 4868 /* 4869 * Firmware should take at most one RATOV to login, plus 5 seconds for 4870 * our own processing. 4871 */ 4872 if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) { 4873 wait_time = min_wait; 4874 } 4875 4876 /* Min wait time if loop down */ 4877 mtime = jiffies + (min_wait * HZ); 4878 4879 /* wait time before firmware ready */ 4880 wtime = jiffies + (wait_time * HZ); 4881 4882 /* Wait for ISP to finish LIP */ 4883 if (!vha->flags.init_done) 4884 ql_log(ql_log_info, vha, 0x801e, 4885 "Waiting for LIP to complete.\n"); 4886 4887 do { 4888 memset(state, -1, sizeof(state)); 4889 rval = qla2x00_get_firmware_state(vha, state); 4890 if (rval == QLA_SUCCESS) { 4891 if (state[0] < FSTATE_LOSS_OF_SYNC) { 4892 vha->device_flags &= ~DFLG_NO_CABLE; 4893 } 4894 if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) { 4895 ql_dbg(ql_dbg_taskm, vha, 0x801f, 4896 "fw_state=%x 84xx=%x.\n", state[0], 4897 state[2]); 4898 if ((state[2] & FSTATE_LOGGED_IN) && 4899 (state[2] & FSTATE_WAITING_FOR_VERIFY)) { 4900 ql_dbg(ql_dbg_taskm, vha, 0x8028, 4901 "Sending verify iocb.\n"); 4902 4903 cs84xx_time = jiffies; 4904 rval = qla84xx_init_chip(vha); 4905 if (rval != QLA_SUCCESS) { 4906 ql_log(ql_log_warn, 4907 vha, 0x8007, 4908 "Init chip failed.\n"); 4909 break; 4910 } 4911 4912 /* Add time taken to initialize. */ 4913 cs84xx_time = jiffies - cs84xx_time; 4914 wtime += cs84xx_time; 4915 mtime += cs84xx_time; 4916 ql_dbg(ql_dbg_taskm, vha, 0x8008, 4917 "Increasing wait time by %ld. " 4918 "New time %ld.\n", cs84xx_time, 4919 wtime); 4920 } 4921 } else if (state[0] == FSTATE_READY) { 4922 ql_dbg(ql_dbg_taskm, vha, 0x8037, 4923 "F/W Ready - OK.\n"); 4924 4925 qla2x00_get_retry_cnt(vha, &ha->retry_count, 4926 &ha->login_timeout, &ha->r_a_tov); 4927 4928 rval = QLA_SUCCESS; 4929 break; 4930 } 4931 4932 rval = QLA_FUNCTION_FAILED; 4933 4934 if (atomic_read(&vha->loop_down_timer) && 4935 state[0] != FSTATE_READY) { 4936 /* Loop down. Timeout on min_wait for states 4937 * other than Wait for Login. 4938 */ 4939 if (time_after_eq(jiffies, mtime)) { 4940 ql_log(ql_log_info, vha, 0x8038, 4941 "Cable is unplugged...\n"); 4942 4943 vha->device_flags |= DFLG_NO_CABLE; 4944 break; 4945 } 4946 } 4947 } else { 4948 /* Mailbox cmd failed. Timeout on min_wait. */ 4949 if (time_after_eq(jiffies, mtime) || 4950 ha->flags.isp82xx_fw_hung) 4951 break; 4952 } 4953 4954 if (time_after_eq(jiffies, wtime)) 4955 break; 4956 4957 /* Delay for a while */ 4958 msleep(500); 4959 } while (1); 4960 4961 ql_dbg(ql_dbg_taskm, vha, 0x803a, 4962 "fw_state=%x (%x, %x, %x, %x %x) curr time=%lx.\n", state[0], 4963 state[1], state[2], state[3], state[4], state[5], jiffies); 4964 4965 if (rval && !(vha->device_flags & DFLG_NO_CABLE)) { 4966 ql_log(ql_log_warn, vha, 0x803b, 4967 "Firmware ready **** FAILED ****.\n"); 4968 } 4969 4970 return (rval); 4971 } 4972 4973 /* 4974 * qla2x00_configure_hba 4975 * Setup adapter context. 4976 * 4977 * Input: 4978 * ha = adapter state pointer. 4979 * 4980 * Returns: 4981 * 0 = success 4982 * 4983 * Context: 4984 * Kernel context. 4985 */ 4986 static int 4987 qla2x00_configure_hba(scsi_qla_host_t *vha) 4988 { 4989 int rval; 4990 uint16_t loop_id; 4991 uint16_t topo; 4992 uint16_t sw_cap; 4993 uint8_t al_pa; 4994 uint8_t area; 4995 uint8_t domain; 4996 char connect_type[22]; 4997 struct qla_hw_data *ha = vha->hw; 4998 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); 4999 port_id_t id; 5000 unsigned long flags; 5001 5002 /* Get host addresses. */ 5003 rval = qla2x00_get_adapter_id(vha, 5004 &loop_id, &al_pa, &area, &domain, &topo, &sw_cap); 5005 if (rval != QLA_SUCCESS) { 5006 if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) || 5007 IS_CNA_CAPABLE(ha) || 5008 (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) { 5009 ql_dbg(ql_dbg_disc, vha, 0x2008, 5010 "Loop is in a transition state.\n"); 5011 } else { 5012 ql_log(ql_log_warn, vha, 0x2009, 5013 "Unable to get host loop ID.\n"); 5014 if (IS_FWI2_CAPABLE(ha) && (vha == base_vha) && 5015 (rval == QLA_COMMAND_ERROR && loop_id == 0x1b)) { 5016 ql_log(ql_log_warn, vha, 0x1151, 5017 "Doing link init.\n"); 5018 if (qla24xx_link_initialize(vha) == QLA_SUCCESS) 5019 return rval; 5020 } 5021 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 5022 } 5023 return (rval); 5024 } 5025 5026 if (topo == 4) { 5027 ql_log(ql_log_info, vha, 0x200a, 5028 "Cannot get topology - retrying.\n"); 5029 return (QLA_FUNCTION_FAILED); 5030 } 5031 5032 vha->loop_id = loop_id; 5033 5034 /* initialize */ 5035 ha->min_external_loopid = SNS_FIRST_LOOP_ID; 5036 ha->operating_mode = LOOP; 5037 5038 switch (topo) { 5039 case 0: 5040 ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n"); 5041 ha->switch_cap = 0; 5042 ha->current_topology = ISP_CFG_NL; 5043 strcpy(connect_type, "(Loop)"); 5044 break; 5045 5046 case 1: 5047 ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n"); 5048 ha->switch_cap = sw_cap; 5049 ha->current_topology = ISP_CFG_FL; 5050 strcpy(connect_type, "(FL_Port)"); 5051 break; 5052 5053 case 2: 5054 ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n"); 5055 ha->switch_cap = 0; 5056 ha->operating_mode = P2P; 5057 ha->current_topology = ISP_CFG_N; 5058 strcpy(connect_type, "(N_Port-to-N_Port)"); 5059 break; 5060 5061 case 3: 5062 ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n"); 5063 ha->switch_cap = sw_cap; 5064 ha->operating_mode = P2P; 5065 ha->current_topology = ISP_CFG_F; 5066 strcpy(connect_type, "(F_Port)"); 5067 break; 5068 5069 default: 5070 ql_dbg(ql_dbg_disc, vha, 0x200f, 5071 "HBA in unknown topology %x, using NL.\n", topo); 5072 ha->switch_cap = 0; 5073 ha->current_topology = ISP_CFG_NL; 5074 strcpy(connect_type, "(Loop)"); 5075 break; 5076 } 5077 5078 /* Save Host port and loop ID. */ 5079 /* byte order - Big Endian */ 5080 id.b.domain = domain; 5081 id.b.area = area; 5082 id.b.al_pa = al_pa; 5083 id.b.rsvd_1 = 0; 5084 spin_lock_irqsave(&ha->hardware_lock, flags); 5085 if (vha->hw->flags.edif_enabled) { 5086 if (topo != 2) 5087 qla_update_host_map(vha, id); 5088 } else if (!(topo == 2 && ha->flags.n2n_bigger)) 5089 qla_update_host_map(vha, id); 5090 spin_unlock_irqrestore(&ha->hardware_lock, flags); 5091 5092 if (!vha->flags.init_done) 5093 ql_log(ql_log_info, vha, 0x2010, 5094 "Topology - %s, Host Loop address 0x%x.\n", 5095 connect_type, vha->loop_id); 5096 5097 return(rval); 5098 } 5099 5100 inline void 5101 qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len, 5102 const char *def) 5103 { 5104 char *st, *en; 5105 uint16_t index; 5106 uint64_t zero[2] = { 0 }; 5107 struct qla_hw_data *ha = vha->hw; 5108 int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) && 5109 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha); 5110 5111 if (len > sizeof(zero)) 5112 len = sizeof(zero); 5113 if (memcmp(model, &zero, len) != 0) { 5114 memcpy(ha->model_number, model, len); 5115 st = en = ha->model_number; 5116 en += len - 1; 5117 while (en > st) { 5118 if (*en != 0x20 && *en != 0x00) 5119 break; 5120 *en-- = '\0'; 5121 } 5122 5123 index = (ha->pdev->subsystem_device & 0xff); 5124 if (use_tbl && 5125 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && 5126 index < QLA_MODEL_NAMES) 5127 strscpy(ha->model_desc, 5128 qla2x00_model_name[index * 2 + 1], 5129 sizeof(ha->model_desc)); 5130 } else { 5131 index = (ha->pdev->subsystem_device & 0xff); 5132 if (use_tbl && 5133 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && 5134 index < QLA_MODEL_NAMES) { 5135 strscpy(ha->model_number, 5136 qla2x00_model_name[index * 2], 5137 sizeof(ha->model_number)); 5138 strscpy(ha->model_desc, 5139 qla2x00_model_name[index * 2 + 1], 5140 sizeof(ha->model_desc)); 5141 } else { 5142 strscpy(ha->model_number, def, 5143 sizeof(ha->model_number)); 5144 } 5145 } 5146 if (IS_FWI2_CAPABLE(ha)) 5147 qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc, 5148 sizeof(ha->model_desc)); 5149 } 5150 5151 /* On sparc systems, obtain port and node WWN from firmware 5152 * properties. 5153 */ 5154 static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv) 5155 { 5156 #ifdef CONFIG_SPARC 5157 struct qla_hw_data *ha = vha->hw; 5158 struct pci_dev *pdev = ha->pdev; 5159 struct device_node *dp = pci_device_to_OF_node(pdev); 5160 const u8 *val; 5161 int len; 5162 5163 val = of_get_property(dp, "port-wwn", &len); 5164 if (val && len >= WWN_SIZE) 5165 memcpy(nv->port_name, val, WWN_SIZE); 5166 5167 val = of_get_property(dp, "node-wwn", &len); 5168 if (val && len >= WWN_SIZE) 5169 memcpy(nv->node_name, val, WWN_SIZE); 5170 #endif 5171 } 5172 5173 /* 5174 * NVRAM configuration for ISP 2xxx 5175 * 5176 * Input: 5177 * ha = adapter block pointer. 5178 * 5179 * Output: 5180 * initialization control block in response_ring 5181 * host adapters parameters in host adapter block 5182 * 5183 * Returns: 5184 * 0 = success. 5185 */ 5186 int 5187 qla2x00_nvram_config(scsi_qla_host_t *vha) 5188 { 5189 int rval; 5190 uint8_t chksum = 0; 5191 uint16_t cnt; 5192 uint8_t *dptr1, *dptr2; 5193 struct qla_hw_data *ha = vha->hw; 5194 init_cb_t *icb = ha->init_cb; 5195 nvram_t *nv = ha->nvram; 5196 uint8_t *ptr = ha->nvram; 5197 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 5198 5199 rval = QLA_SUCCESS; 5200 5201 /* Determine NVRAM starting address. */ 5202 ha->nvram_size = sizeof(*nv); 5203 ha->nvram_base = 0; 5204 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha)) 5205 if ((rd_reg_word(®->ctrl_status) >> 14) == 1) 5206 ha->nvram_base = 0x80; 5207 5208 /* Get NVRAM data and calculate checksum. */ 5209 ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size); 5210 for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++) 5211 chksum += *ptr++; 5212 5213 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f, 5214 "Contents of NVRAM.\n"); 5215 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110, 5216 nv, ha->nvram_size); 5217 5218 /* Bad NVRAM data, set defaults parameters. */ 5219 if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) || 5220 nv->nvram_version < 1) { 5221 /* Reset NVRAM data. */ 5222 ql_log(ql_log_warn, vha, 0x0064, 5223 "Inconsistent NVRAM detected: checksum=%#x id=%.4s version=%#x.\n", 5224 chksum, nv->id, nv->nvram_version); 5225 ql_log(ql_log_warn, vha, 0x0065, 5226 "Falling back to " 5227 "functioning (yet invalid -- WWPN) defaults.\n"); 5228 5229 /* 5230 * Set default initialization control block. 5231 */ 5232 memset(nv, 0, ha->nvram_size); 5233 nv->parameter_block_version = ICB_VERSION; 5234 5235 if (IS_QLA23XX(ha)) { 5236 nv->firmware_options[0] = BIT_2 | BIT_1; 5237 nv->firmware_options[1] = BIT_7 | BIT_5; 5238 nv->add_firmware_options[0] = BIT_5; 5239 nv->add_firmware_options[1] = BIT_5 | BIT_4; 5240 nv->frame_payload_size = cpu_to_le16(2048); 5241 nv->special_options[1] = BIT_7; 5242 } else if (IS_QLA2200(ha)) { 5243 nv->firmware_options[0] = BIT_2 | BIT_1; 5244 nv->firmware_options[1] = BIT_7 | BIT_5; 5245 nv->add_firmware_options[0] = BIT_5; 5246 nv->add_firmware_options[1] = BIT_5 | BIT_4; 5247 nv->frame_payload_size = cpu_to_le16(1024); 5248 } else if (IS_QLA2100(ha)) { 5249 nv->firmware_options[0] = BIT_3 | BIT_1; 5250 nv->firmware_options[1] = BIT_5; 5251 nv->frame_payload_size = cpu_to_le16(1024); 5252 } 5253 5254 nv->max_iocb_allocation = cpu_to_le16(256); 5255 nv->execution_throttle = cpu_to_le16(16); 5256 nv->retry_count = 8; 5257 nv->retry_delay = 1; 5258 5259 nv->port_name[0] = 33; 5260 nv->port_name[3] = 224; 5261 nv->port_name[4] = 139; 5262 5263 qla2xxx_nvram_wwn_from_ofw(vha, nv); 5264 5265 nv->login_timeout = 4; 5266 5267 /* 5268 * Set default host adapter parameters 5269 */ 5270 nv->host_p[1] = BIT_2; 5271 nv->reset_delay = 5; 5272 nv->port_down_retry_count = 8; 5273 nv->max_luns_per_target = cpu_to_le16(8); 5274 nv->link_down_timeout = 60; 5275 5276 rval = 1; 5277 } 5278 5279 /* Reset Initialization control block */ 5280 memset(icb, 0, ha->init_cb_size); 5281 5282 /* 5283 * Setup driver NVRAM options. 5284 */ 5285 nv->firmware_options[0] |= (BIT_6 | BIT_1); 5286 nv->firmware_options[0] &= ~(BIT_5 | BIT_4); 5287 nv->firmware_options[1] |= (BIT_5 | BIT_0); 5288 nv->firmware_options[1] &= ~BIT_4; 5289 5290 if (IS_QLA23XX(ha)) { 5291 nv->firmware_options[0] |= BIT_2; 5292 nv->firmware_options[0] &= ~BIT_3; 5293 nv->special_options[0] &= ~BIT_6; 5294 nv->add_firmware_options[1] |= BIT_5 | BIT_4; 5295 5296 if (IS_QLA2300(ha)) { 5297 if (ha->fb_rev == FPM_2310) { 5298 strcpy(ha->model_number, "QLA2310"); 5299 } else { 5300 strcpy(ha->model_number, "QLA2300"); 5301 } 5302 } else { 5303 qla2x00_set_model_info(vha, nv->model_number, 5304 sizeof(nv->model_number), "QLA23xx"); 5305 } 5306 } else if (IS_QLA2200(ha)) { 5307 nv->firmware_options[0] |= BIT_2; 5308 /* 5309 * 'Point-to-point preferred, else loop' is not a safe 5310 * connection mode setting. 5311 */ 5312 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) == 5313 (BIT_5 | BIT_4)) { 5314 /* Force 'loop preferred, else point-to-point'. */ 5315 nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4); 5316 nv->add_firmware_options[0] |= BIT_5; 5317 } 5318 strcpy(ha->model_number, "QLA22xx"); 5319 } else /*if (IS_QLA2100(ha))*/ { 5320 strcpy(ha->model_number, "QLA2100"); 5321 } 5322 5323 /* 5324 * Copy over NVRAM RISC parameter block to initialization control block. 5325 */ 5326 dptr1 = (uint8_t *)icb; 5327 dptr2 = (uint8_t *)&nv->parameter_block_version; 5328 cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version; 5329 while (cnt--) 5330 *dptr1++ = *dptr2++; 5331 5332 /* Copy 2nd half. */ 5333 dptr1 = (uint8_t *)icb->add_firmware_options; 5334 cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options; 5335 while (cnt--) 5336 *dptr1++ = *dptr2++; 5337 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size); 5338 /* Use alternate WWN? */ 5339 if (nv->host_p[1] & BIT_7) { 5340 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 5341 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 5342 } 5343 5344 /* Prepare nodename */ 5345 if ((icb->firmware_options[1] & BIT_6) == 0) { 5346 /* 5347 * Firmware will apply the following mask if the nodename was 5348 * not provided. 5349 */ 5350 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 5351 icb->node_name[0] &= 0xF0; 5352 } 5353 5354 /* 5355 * Set host adapter parameters. 5356 */ 5357 5358 /* 5359 * BIT_7 in the host-parameters section allows for modification to 5360 * internal driver logging. 5361 */ 5362 if (nv->host_p[0] & BIT_7) 5363 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK; 5364 ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0); 5365 /* Always load RISC code on non ISP2[12]00 chips. */ 5366 if (!IS_QLA2100(ha) && !IS_QLA2200(ha)) 5367 ha->flags.disable_risc_code_load = 0; 5368 ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0); 5369 ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0); 5370 ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0); 5371 ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0; 5372 ha->flags.disable_serdes = 0; 5373 5374 ha->operating_mode = 5375 (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4; 5376 5377 memcpy(ha->fw_seriallink_options, nv->seriallink_options, 5378 sizeof(ha->fw_seriallink_options)); 5379 5380 /* save HBA serial number */ 5381 ha->serial0 = icb->port_name[5]; 5382 ha->serial1 = icb->port_name[6]; 5383 ha->serial2 = icb->port_name[7]; 5384 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 5385 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 5386 5387 icb->execution_throttle = cpu_to_le16(0xFFFF); 5388 5389 ha->retry_count = nv->retry_count; 5390 5391 /* Set minimum login_timeout to 4 seconds. */ 5392 if (nv->login_timeout != ql2xlogintimeout) 5393 nv->login_timeout = ql2xlogintimeout; 5394 if (nv->login_timeout < 4) 5395 nv->login_timeout = 4; 5396 ha->login_timeout = nv->login_timeout; 5397 5398 /* Set minimum RATOV to 100 tenths of a second. */ 5399 ha->r_a_tov = 100; 5400 5401 ha->loop_reset_delay = nv->reset_delay; 5402 5403 /* Link Down Timeout = 0: 5404 * 5405 * When Port Down timer expires we will start returning 5406 * I/O's to OS with "DID_NO_CONNECT". 5407 * 5408 * Link Down Timeout != 0: 5409 * 5410 * The driver waits for the link to come up after link down 5411 * before returning I/Os to OS with "DID_NO_CONNECT". 5412 */ 5413 if (nv->link_down_timeout == 0) { 5414 ha->loop_down_abort_time = 5415 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 5416 } else { 5417 ha->link_down_timeout = nv->link_down_timeout; 5418 ha->loop_down_abort_time = 5419 (LOOP_DOWN_TIME - ha->link_down_timeout); 5420 } 5421 5422 /* 5423 * Need enough time to try and get the port back. 5424 */ 5425 ha->port_down_retry_count = nv->port_down_retry_count; 5426 if (qlport_down_retry) 5427 ha->port_down_retry_count = qlport_down_retry; 5428 /* Set login_retry_count */ 5429 ha->login_retry_count = nv->retry_count; 5430 if (ha->port_down_retry_count == nv->port_down_retry_count && 5431 ha->port_down_retry_count > 3) 5432 ha->login_retry_count = ha->port_down_retry_count; 5433 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 5434 ha->login_retry_count = ha->port_down_retry_count; 5435 if (ql2xloginretrycount) 5436 ha->login_retry_count = ql2xloginretrycount; 5437 5438 icb->lun_enables = cpu_to_le16(0); 5439 icb->command_resource_count = 0; 5440 icb->immediate_notify_resource_count = 0; 5441 icb->timeout = cpu_to_le16(0); 5442 5443 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 5444 /* Enable RIO */ 5445 icb->firmware_options[0] &= ~BIT_3; 5446 icb->add_firmware_options[0] &= 5447 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); 5448 icb->add_firmware_options[0] |= BIT_2; 5449 icb->response_accumulation_timer = 3; 5450 icb->interrupt_delay_timer = 5; 5451 5452 vha->flags.process_response_queue = 1; 5453 } else { 5454 /* Enable ZIO. */ 5455 if (!vha->flags.init_done) { 5456 ha->zio_mode = icb->add_firmware_options[0] & 5457 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 5458 ha->zio_timer = icb->interrupt_delay_timer ? 5459 icb->interrupt_delay_timer : 2; 5460 } 5461 icb->add_firmware_options[0] &= 5462 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); 5463 vha->flags.process_response_queue = 0; 5464 if (ha->zio_mode != QLA_ZIO_DISABLED) { 5465 ha->zio_mode = QLA_ZIO_MODE_6; 5466 5467 ql_log(ql_log_info, vha, 0x0068, 5468 "ZIO mode %d enabled; timer delay (%d us).\n", 5469 ha->zio_mode, ha->zio_timer * 100); 5470 5471 icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode; 5472 icb->interrupt_delay_timer = (uint8_t)ha->zio_timer; 5473 vha->flags.process_response_queue = 1; 5474 } 5475 } 5476 5477 if (rval) { 5478 ql_log(ql_log_warn, vha, 0x0069, 5479 "NVRAM configuration failed.\n"); 5480 } 5481 return (rval); 5482 } 5483 5484 void qla2x00_set_fcport_state(fc_port_t *fcport, int state) 5485 { 5486 int old_state; 5487 5488 old_state = atomic_read(&fcport->state); 5489 atomic_set(&fcport->state, state); 5490 5491 /* Don't print state transitions during initial allocation of fcport */ 5492 if (old_state && old_state != state) { 5493 ql_dbg(ql_dbg_disc, fcport->vha, 0x207d, 5494 "FCPort %8phC state transitioned from %s to %s - portid=%02x%02x%02x.\n", 5495 fcport->port_name, port_state_str[old_state], 5496 port_state_str[state], fcport->d_id.b.domain, 5497 fcport->d_id.b.area, fcport->d_id.b.al_pa); 5498 } 5499 } 5500 5501 /** 5502 * qla2x00_alloc_fcport() - Allocate a generic fcport. 5503 * @vha: HA context 5504 * @flags: allocation flags 5505 * 5506 * Returns a pointer to the allocated fcport, or NULL, if none available. 5507 */ 5508 fc_port_t * 5509 qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags) 5510 { 5511 fc_port_t *fcport; 5512 5513 fcport = kzalloc(sizeof(fc_port_t), flags); 5514 if (!fcport) 5515 return NULL; 5516 5517 fcport->ct_desc.ct_sns = dma_alloc_coherent(&vha->hw->pdev->dev, 5518 sizeof(struct ct_sns_pkt), &fcport->ct_desc.ct_sns_dma, 5519 flags); 5520 if (!fcport->ct_desc.ct_sns) { 5521 ql_log(ql_log_warn, vha, 0xd049, 5522 "Failed to allocate ct_sns request.\n"); 5523 kfree(fcport); 5524 return NULL; 5525 } 5526 5527 /* Setup fcport template structure. */ 5528 fcport->vha = vha; 5529 fcport->port_type = FCT_UNKNOWN; 5530 fcport->loop_id = FC_NO_LOOP_ID; 5531 qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED); 5532 fcport->supported_classes = FC_COS_UNSPECIFIED; 5533 fcport->fp_speed = PORT_SPEED_UNKNOWN; 5534 5535 fcport->disc_state = DSC_DELETED; 5536 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 5537 fcport->deleted = QLA_SESS_DELETED; 5538 fcport->login_retry = vha->hw->login_retry_count; 5539 fcport->chip_reset = vha->hw->base_qpair->chip_reset; 5540 fcport->logout_on_delete = 1; 5541 fcport->tgt_link_down_time = QLA2XX_MAX_LINK_DOWN_TIME; 5542 fcport->tgt_short_link_down_cnt = 0; 5543 fcport->dev_loss_tmo = 0; 5544 5545 if (!fcport->ct_desc.ct_sns) { 5546 ql_log(ql_log_warn, vha, 0xd049, 5547 "Failed to allocate ct_sns request.\n"); 5548 kfree(fcport); 5549 return NULL; 5550 } 5551 5552 INIT_WORK(&fcport->del_work, qla24xx_delete_sess_fn); 5553 INIT_WORK(&fcport->free_work, qlt_free_session_done); 5554 INIT_WORK(&fcport->reg_work, qla_register_fcport_fn); 5555 INIT_LIST_HEAD(&fcport->gnl_entry); 5556 INIT_LIST_HEAD(&fcport->list); 5557 5558 INIT_LIST_HEAD(&fcport->sess_cmd_list); 5559 spin_lock_init(&fcport->sess_cmd_lock); 5560 5561 spin_lock_init(&fcport->edif.sa_list_lock); 5562 INIT_LIST_HEAD(&fcport->edif.tx_sa_list); 5563 INIT_LIST_HEAD(&fcport->edif.rx_sa_list); 5564 5565 spin_lock_init(&fcport->edif.indx_list_lock); 5566 INIT_LIST_HEAD(&fcport->edif.edif_indx_list); 5567 5568 return fcport; 5569 } 5570 5571 void 5572 qla2x00_free_fcport(fc_port_t *fcport) 5573 { 5574 if (fcport->ct_desc.ct_sns) { 5575 dma_free_coherent(&fcport->vha->hw->pdev->dev, 5576 sizeof(struct ct_sns_pkt), fcport->ct_desc.ct_sns, 5577 fcport->ct_desc.ct_sns_dma); 5578 5579 fcport->ct_desc.ct_sns = NULL; 5580 } 5581 5582 qla_edif_flush_sa_ctl_lists(fcport); 5583 list_del(&fcport->list); 5584 qla2x00_clear_loop_id(fcport); 5585 5586 qla_edif_list_del(fcport); 5587 5588 kfree(fcport); 5589 } 5590 5591 static void qla_get_login_template(scsi_qla_host_t *vha) 5592 { 5593 struct qla_hw_data *ha = vha->hw; 5594 int rval; 5595 u32 *bp, sz; 5596 __be32 *q; 5597 5598 memset(ha->init_cb, 0, ha->init_cb_size); 5599 sz = min_t(int, sizeof(struct fc_els_csp), ha->init_cb_size); 5600 rval = qla24xx_get_port_login_templ(vha, ha->init_cb_dma, 5601 ha->init_cb, sz); 5602 if (rval != QLA_SUCCESS) { 5603 ql_dbg(ql_dbg_init, vha, 0x00d1, 5604 "PLOGI ELS param read fail.\n"); 5605 return; 5606 } 5607 q = (__be32 *)&ha->plogi_els_payld.fl_csp; 5608 5609 bp = (uint32_t *)ha->init_cb; 5610 cpu_to_be32_array(q, bp, sz / 4); 5611 ha->flags.plogi_template_valid = 1; 5612 } 5613 5614 /* 5615 * qla2x00_configure_loop 5616 * Updates Fibre Channel Device Database with what is actually on loop. 5617 * 5618 * Input: 5619 * ha = adapter block pointer. 5620 * 5621 * Returns: 5622 * 0 = success. 5623 * 1 = error. 5624 * 2 = database was full and device was not configured. 5625 */ 5626 static int 5627 qla2x00_configure_loop(scsi_qla_host_t *vha) 5628 { 5629 int rval; 5630 unsigned long flags, save_flags; 5631 struct qla_hw_data *ha = vha->hw; 5632 5633 rval = QLA_SUCCESS; 5634 5635 /* Get Initiator ID */ 5636 if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) { 5637 rval = qla2x00_configure_hba(vha); 5638 if (rval != QLA_SUCCESS) { 5639 ql_dbg(ql_dbg_disc, vha, 0x2013, 5640 "Unable to configure HBA.\n"); 5641 return (rval); 5642 } 5643 } 5644 5645 save_flags = flags = vha->dpc_flags; 5646 ql_dbg(ql_dbg_disc, vha, 0x2014, 5647 "Configure loop -- dpc flags = 0x%lx.\n", flags); 5648 5649 /* 5650 * If we have both an RSCN and PORT UPDATE pending then handle them 5651 * both at the same time. 5652 */ 5653 clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5654 clear_bit(RSCN_UPDATE, &vha->dpc_flags); 5655 5656 qla2x00_get_data_rate(vha); 5657 qla_get_login_template(vha); 5658 5659 /* Determine what we need to do */ 5660 if ((ha->current_topology == ISP_CFG_FL || 5661 ha->current_topology == ISP_CFG_F) && 5662 (test_bit(LOCAL_LOOP_UPDATE, &flags))) { 5663 5664 set_bit(RSCN_UPDATE, &flags); 5665 clear_bit(LOCAL_LOOP_UPDATE, &flags); 5666 5667 } else if (ha->current_topology == ISP_CFG_NL || 5668 ha->current_topology == ISP_CFG_N) { 5669 clear_bit(RSCN_UPDATE, &flags); 5670 set_bit(LOCAL_LOOP_UPDATE, &flags); 5671 } else if (!vha->flags.online || 5672 (test_bit(ABORT_ISP_ACTIVE, &flags))) { 5673 set_bit(RSCN_UPDATE, &flags); 5674 set_bit(LOCAL_LOOP_UPDATE, &flags); 5675 } 5676 5677 if (test_bit(LOCAL_LOOP_UPDATE, &flags)) { 5678 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 5679 ql_dbg(ql_dbg_disc, vha, 0x2015, 5680 "Loop resync needed, failing.\n"); 5681 rval = QLA_FUNCTION_FAILED; 5682 } else 5683 rval = qla2x00_configure_local_loop(vha); 5684 } 5685 5686 if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) { 5687 if (LOOP_TRANSITION(vha)) { 5688 ql_dbg(ql_dbg_disc, vha, 0x2099, 5689 "Needs RSCN update and loop transition.\n"); 5690 rval = QLA_FUNCTION_FAILED; 5691 } 5692 else 5693 rval = qla2x00_configure_fabric(vha); 5694 } 5695 5696 if (rval == QLA_SUCCESS) { 5697 if (atomic_read(&vha->loop_down_timer) || 5698 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 5699 rval = QLA_FUNCTION_FAILED; 5700 } else { 5701 atomic_set(&vha->loop_state, LOOP_READY); 5702 ql_dbg(ql_dbg_disc, vha, 0x2069, 5703 "LOOP READY.\n"); 5704 ha->flags.fw_init_done = 1; 5705 5706 /* 5707 * use link up to wake up app to get ready for 5708 * authentication. 5709 */ 5710 if (ha->flags.edif_enabled && DBELL_INACTIVE(vha)) 5711 qla2x00_post_aen_work(vha, FCH_EVT_LINKUP, 5712 ha->link_data_rate); 5713 5714 /* 5715 * Process any ATIO queue entries that came in 5716 * while we weren't online. 5717 */ 5718 if (qla_tgt_mode_enabled(vha) || 5719 qla_dual_mode_enabled(vha)) { 5720 spin_lock_irqsave(&ha->tgt.atio_lock, flags); 5721 qlt_24xx_process_atio_queue(vha, 0); 5722 spin_unlock_irqrestore(&ha->tgt.atio_lock, 5723 flags); 5724 } 5725 } 5726 } 5727 5728 if (rval) { 5729 ql_dbg(ql_dbg_disc, vha, 0x206a, 5730 "%s *** FAILED ***.\n", __func__); 5731 } else { 5732 ql_dbg(ql_dbg_disc, vha, 0x206b, 5733 "%s: exiting normally. local port wwpn %8phN id %06x)\n", 5734 __func__, vha->port_name, vha->d_id.b24); 5735 } 5736 5737 /* Restore state if a resync event occurred during processing */ 5738 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 5739 if (test_bit(LOCAL_LOOP_UPDATE, &save_flags)) 5740 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5741 if (test_bit(RSCN_UPDATE, &save_flags)) { 5742 set_bit(RSCN_UPDATE, &vha->dpc_flags); 5743 } 5744 } 5745 5746 return (rval); 5747 } 5748 5749 static int qla2x00_configure_n2n_loop(scsi_qla_host_t *vha) 5750 { 5751 unsigned long flags; 5752 fc_port_t *fcport; 5753 5754 ql_dbg(ql_dbg_disc, vha, 0x206a, "%s %d.\n", __func__, __LINE__); 5755 5756 if (test_and_clear_bit(N2N_LOGIN_NEEDED, &vha->dpc_flags)) 5757 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 5758 5759 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5760 if (fcport->n2n_flag) { 5761 qla24xx_fcport_handle_login(vha, fcport); 5762 return QLA_SUCCESS; 5763 } 5764 } 5765 5766 spin_lock_irqsave(&vha->work_lock, flags); 5767 vha->scan.scan_retry++; 5768 spin_unlock_irqrestore(&vha->work_lock, flags); 5769 5770 if (vha->scan.scan_retry < MAX_SCAN_RETRIES) { 5771 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5772 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5773 } 5774 return QLA_FUNCTION_FAILED; 5775 } 5776 5777 static void 5778 qla_reinitialize_link(scsi_qla_host_t *vha) 5779 { 5780 int rval; 5781 5782 atomic_set(&vha->loop_state, LOOP_DOWN); 5783 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 5784 rval = qla2x00_full_login_lip(vha); 5785 if (rval == QLA_SUCCESS) { 5786 ql_dbg(ql_dbg_disc, vha, 0xd050, "Link reinitialized\n"); 5787 } else { 5788 ql_dbg(ql_dbg_disc, vha, 0xd051, 5789 "Link reinitialization failed (%d)\n", rval); 5790 } 5791 } 5792 5793 /* 5794 * qla2x00_configure_local_loop 5795 * Updates Fibre Channel Device Database with local loop devices. 5796 * 5797 * Input: 5798 * ha = adapter block pointer. 5799 * 5800 * Returns: 5801 * 0 = success. 5802 */ 5803 static int 5804 qla2x00_configure_local_loop(scsi_qla_host_t *vha) 5805 { 5806 int rval, rval2; 5807 int found; 5808 fc_port_t *fcport, *new_fcport; 5809 uint16_t index; 5810 uint16_t entries; 5811 struct gid_list_info *gid; 5812 uint16_t loop_id; 5813 uint8_t domain, area, al_pa; 5814 struct qla_hw_data *ha = vha->hw; 5815 unsigned long flags; 5816 5817 /* Inititae N2N login. */ 5818 if (N2N_TOPO(ha)) 5819 return qla2x00_configure_n2n_loop(vha); 5820 5821 new_fcport = NULL; 5822 entries = MAX_FIBRE_DEVICES_LOOP; 5823 5824 /* Get list of logged in devices. */ 5825 memset(ha->gid_list, 0, qla2x00_gid_list_size(ha)); 5826 rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma, 5827 &entries); 5828 if (rval != QLA_SUCCESS) 5829 goto err; 5830 5831 ql_dbg(ql_dbg_disc, vha, 0x2011, 5832 "Entries in ID list (%d).\n", entries); 5833 ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075, 5834 ha->gid_list, entries * sizeof(*ha->gid_list)); 5835 5836 if (entries == 0) { 5837 spin_lock_irqsave(&vha->work_lock, flags); 5838 vha->scan.scan_retry++; 5839 spin_unlock_irqrestore(&vha->work_lock, flags); 5840 5841 if (vha->scan.scan_retry < MAX_SCAN_RETRIES) { 5842 u8 loop_map_entries = 0; 5843 int rc; 5844 5845 rc = qla2x00_get_fcal_position_map(vha, NULL, 5846 &loop_map_entries); 5847 if (rc == QLA_SUCCESS && loop_map_entries > 1) { 5848 /* 5849 * There are devices that are still not logged 5850 * in. Reinitialize to give them a chance. 5851 */ 5852 qla_reinitialize_link(vha); 5853 return QLA_FUNCTION_FAILED; 5854 } 5855 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5856 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5857 } 5858 } else { 5859 vha->scan.scan_retry = 0; 5860 } 5861 5862 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5863 fcport->scan_state = QLA_FCPORT_SCAN; 5864 } 5865 5866 /* Allocate temporary fcport for any new fcports discovered. */ 5867 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 5868 if (new_fcport == NULL) { 5869 ql_log(ql_log_warn, vha, 0x2012, 5870 "Memory allocation failed for fcport.\n"); 5871 rval = QLA_MEMORY_ALLOC_FAILED; 5872 goto err; 5873 } 5874 new_fcport->flags &= ~FCF_FABRIC_DEVICE; 5875 5876 /* Add devices to port list. */ 5877 gid = ha->gid_list; 5878 for (index = 0; index < entries; index++) { 5879 domain = gid->domain; 5880 area = gid->area; 5881 al_pa = gid->al_pa; 5882 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 5883 loop_id = gid->loop_id_2100; 5884 else 5885 loop_id = le16_to_cpu(gid->loop_id); 5886 gid = (void *)gid + ha->gid_list_info_size; 5887 5888 /* Bypass reserved domain fields. */ 5889 if ((domain & 0xf0) == 0xf0) 5890 continue; 5891 5892 /* Bypass if not same domain and area of adapter. */ 5893 if (area && domain && ((area != vha->d_id.b.area) || 5894 (domain != vha->d_id.b.domain)) && 5895 (ha->current_topology == ISP_CFG_NL)) 5896 continue; 5897 5898 5899 /* Bypass invalid local loop ID. */ 5900 if (loop_id > LAST_LOCAL_LOOP_ID) 5901 continue; 5902 5903 memset(new_fcport->port_name, 0, WWN_SIZE); 5904 5905 /* Fill in member data. */ 5906 new_fcport->d_id.b.domain = domain; 5907 new_fcport->d_id.b.area = area; 5908 new_fcport->d_id.b.al_pa = al_pa; 5909 new_fcport->loop_id = loop_id; 5910 new_fcport->scan_state = QLA_FCPORT_FOUND; 5911 5912 rval2 = qla2x00_get_port_database(vha, new_fcport, 0); 5913 if (rval2 != QLA_SUCCESS) { 5914 ql_dbg(ql_dbg_disc, vha, 0x2097, 5915 "Failed to retrieve fcport information " 5916 "-- get_port_database=%x, loop_id=0x%04x.\n", 5917 rval2, new_fcport->loop_id); 5918 /* Skip retry if N2N */ 5919 if (ha->current_topology != ISP_CFG_N) { 5920 ql_dbg(ql_dbg_disc, vha, 0x2105, 5921 "Scheduling resync.\n"); 5922 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5923 continue; 5924 } 5925 } 5926 5927 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 5928 /* Check for matching device in port list. */ 5929 found = 0; 5930 fcport = NULL; 5931 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5932 if (memcmp(new_fcport->port_name, fcport->port_name, 5933 WWN_SIZE)) 5934 continue; 5935 5936 fcport->flags &= ~FCF_FABRIC_DEVICE; 5937 fcport->loop_id = new_fcport->loop_id; 5938 fcport->port_type = new_fcport->port_type; 5939 fcport->d_id.b24 = new_fcport->d_id.b24; 5940 memcpy(fcport->node_name, new_fcport->node_name, 5941 WWN_SIZE); 5942 fcport->scan_state = QLA_FCPORT_FOUND; 5943 if (fcport->login_retry == 0) { 5944 fcport->login_retry = vha->hw->login_retry_count; 5945 ql_dbg(ql_dbg_disc, vha, 0x2135, 5946 "Port login retry %8phN, lid 0x%04x retry cnt=%d.\n", 5947 fcport->port_name, fcport->loop_id, 5948 fcport->login_retry); 5949 } 5950 found++; 5951 break; 5952 } 5953 5954 if (!found) { 5955 /* New device, add to fcports list. */ 5956 list_add_tail(&new_fcport->list, &vha->vp_fcports); 5957 5958 /* Allocate a new replacement fcport. */ 5959 fcport = new_fcport; 5960 5961 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 5962 5963 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 5964 5965 if (new_fcport == NULL) { 5966 ql_log(ql_log_warn, vha, 0xd031, 5967 "Failed to allocate memory for fcport.\n"); 5968 rval = QLA_MEMORY_ALLOC_FAILED; 5969 goto err; 5970 } 5971 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 5972 new_fcport->flags &= ~FCF_FABRIC_DEVICE; 5973 } 5974 5975 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 5976 5977 /* Base iIDMA settings on HBA port speed. */ 5978 fcport->fp_speed = ha->link_data_rate; 5979 } 5980 5981 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5982 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5983 break; 5984 5985 if (fcport->scan_state == QLA_FCPORT_SCAN) { 5986 if ((qla_dual_mode_enabled(vha) || 5987 qla_ini_mode_enabled(vha)) && 5988 atomic_read(&fcport->state) == FCS_ONLINE) { 5989 qla2x00_mark_device_lost(vha, fcport, 5990 ql2xplogiabsentdevice); 5991 if (fcport->loop_id != FC_NO_LOOP_ID && 5992 (fcport->flags & FCF_FCP2_DEVICE) == 0 && 5993 fcport->port_type != FCT_INITIATOR && 5994 fcport->port_type != FCT_BROADCAST) { 5995 ql_dbg(ql_dbg_disc, vha, 0x20f0, 5996 "%s %d %8phC post del sess\n", 5997 __func__, __LINE__, 5998 fcport->port_name); 5999 6000 qlt_schedule_sess_for_deletion(fcport); 6001 continue; 6002 } 6003 } 6004 } 6005 6006 if (fcport->scan_state == QLA_FCPORT_FOUND) 6007 qla24xx_fcport_handle_login(vha, fcport); 6008 } 6009 6010 qla2x00_free_fcport(new_fcport); 6011 6012 return rval; 6013 6014 err: 6015 ql_dbg(ql_dbg_disc, vha, 0x2098, 6016 "Configure local loop error exit: rval=%x.\n", rval); 6017 return rval; 6018 } 6019 6020 static void 6021 qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) 6022 { 6023 int rval; 6024 uint16_t mb[MAILBOX_REGISTER_COUNT]; 6025 struct qla_hw_data *ha = vha->hw; 6026 6027 if (!IS_IIDMA_CAPABLE(ha)) 6028 return; 6029 6030 if (atomic_read(&fcport->state) != FCS_ONLINE) 6031 return; 6032 6033 if (fcport->fp_speed == PORT_SPEED_UNKNOWN || 6034 fcport->fp_speed > ha->link_data_rate || 6035 !ha->flags.gpsc_supported) 6036 return; 6037 6038 rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed, 6039 mb); 6040 if (rval != QLA_SUCCESS) { 6041 ql_dbg(ql_dbg_disc, vha, 0x2004, 6042 "Unable to adjust iIDMA %8phN -- %04x %x %04x %04x.\n", 6043 fcport->port_name, rval, fcport->fp_speed, mb[0], mb[1]); 6044 } else { 6045 ql_dbg(ql_dbg_disc, vha, 0x2005, 6046 "iIDMA adjusted to %s GB/s (%X) on %8phN.\n", 6047 qla2x00_get_link_speed_str(ha, fcport->fp_speed), 6048 fcport->fp_speed, fcport->port_name); 6049 } 6050 } 6051 6052 void qla_do_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport) 6053 { 6054 qla2x00_iidma_fcport(vha, fcport); 6055 qla24xx_update_fcport_fcp_prio(vha, fcport); 6056 } 6057 6058 int qla_post_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport) 6059 { 6060 struct qla_work_evt *e; 6061 6062 e = qla2x00_alloc_work(vha, QLA_EVT_IIDMA); 6063 if (!e) 6064 return QLA_FUNCTION_FAILED; 6065 6066 e->u.fcport.fcport = fcport; 6067 return qla2x00_post_work(vha, e); 6068 } 6069 6070 /* qla2x00_reg_remote_port is reserved for Initiator Mode only.*/ 6071 static void 6072 qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport) 6073 { 6074 struct fc_rport_identifiers rport_ids; 6075 struct fc_rport *rport; 6076 unsigned long flags; 6077 6078 if (atomic_read(&fcport->state) == FCS_ONLINE) 6079 return; 6080 6081 rport_ids.node_name = wwn_to_u64(fcport->node_name); 6082 rport_ids.port_name = wwn_to_u64(fcport->port_name); 6083 rport_ids.port_id = fcport->d_id.b.domain << 16 | 6084 fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa; 6085 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; 6086 fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids); 6087 if (!rport) { 6088 ql_log(ql_log_warn, vha, 0x2006, 6089 "Unable to allocate fc remote port.\n"); 6090 return; 6091 } 6092 6093 spin_lock_irqsave(fcport->vha->host->host_lock, flags); 6094 *((fc_port_t **)rport->dd_data) = fcport; 6095 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); 6096 fcport->dev_loss_tmo = rport->dev_loss_tmo; 6097 6098 rport->supported_classes = fcport->supported_classes; 6099 6100 rport_ids.roles = FC_PORT_ROLE_UNKNOWN; 6101 if (fcport->port_type == FCT_INITIATOR) 6102 rport_ids.roles |= FC_PORT_ROLE_FCP_INITIATOR; 6103 if (fcport->port_type == FCT_TARGET) 6104 rport_ids.roles |= FC_PORT_ROLE_FCP_TARGET; 6105 if (fcport->port_type & FCT_NVME_INITIATOR) 6106 rport_ids.roles |= FC_PORT_ROLE_NVME_INITIATOR; 6107 if (fcport->port_type & FCT_NVME_TARGET) 6108 rport_ids.roles |= FC_PORT_ROLE_NVME_TARGET; 6109 if (fcport->port_type & FCT_NVME_DISCOVERY) 6110 rport_ids.roles |= FC_PORT_ROLE_NVME_DISCOVERY; 6111 6112 fc_remote_port_rolechg(rport, rport_ids.roles); 6113 6114 ql_dbg(ql_dbg_disc, vha, 0x20ee, 6115 "%s: %8phN. rport %ld:0:%d (%p) is %s mode\n", 6116 __func__, fcport->port_name, vha->host_no, 6117 rport->scsi_target_id, rport, 6118 (fcport->port_type == FCT_TARGET) ? "tgt" : 6119 ((fcport->port_type & FCT_NVME) ? "nvme" : "ini")); 6120 } 6121 6122 /* 6123 * qla2x00_update_fcport 6124 * Updates device on list. 6125 * 6126 * Input: 6127 * ha = adapter block pointer. 6128 * fcport = port structure pointer. 6129 * 6130 * Return: 6131 * 0 - Success 6132 * BIT_0 - error 6133 * 6134 * Context: 6135 * Kernel context. 6136 */ 6137 void 6138 qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) 6139 { 6140 unsigned long flags; 6141 6142 if (IS_SW_RESV_ADDR(fcport->d_id)) 6143 return; 6144 6145 ql_dbg(ql_dbg_disc, vha, 0x20ef, "%s %8phC\n", 6146 __func__, fcport->port_name); 6147 6148 qla2x00_set_fcport_disc_state(fcport, DSC_UPD_FCPORT); 6149 fcport->login_retry = vha->hw->login_retry_count; 6150 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 6151 6152 spin_lock_irqsave(&vha->work_lock, flags); 6153 fcport->deleted = 0; 6154 spin_unlock_irqrestore(&vha->work_lock, flags); 6155 6156 if (vha->hw->current_topology == ISP_CFG_NL) 6157 fcport->logout_on_delete = 0; 6158 else 6159 fcport->logout_on_delete = 1; 6160 fcport->n2n_chip_reset = fcport->n2n_link_reset_cnt = 0; 6161 6162 if (fcport->tgt_link_down_time < fcport->dev_loss_tmo) { 6163 fcport->tgt_short_link_down_cnt++; 6164 fcport->tgt_link_down_time = QLA2XX_MAX_LINK_DOWN_TIME; 6165 } 6166 6167 switch (vha->hw->current_topology) { 6168 case ISP_CFG_N: 6169 case ISP_CFG_NL: 6170 fcport->keep_nport_handle = 1; 6171 break; 6172 default: 6173 break; 6174 } 6175 6176 qla2x00_iidma_fcport(vha, fcport); 6177 6178 qla2x00_dfs_create_rport(vha, fcport); 6179 6180 qla24xx_update_fcport_fcp_prio(vha, fcport); 6181 6182 switch (vha->host->active_mode) { 6183 case MODE_INITIATOR: 6184 qla2x00_reg_remote_port(vha, fcport); 6185 break; 6186 case MODE_TARGET: 6187 if (!vha->vha_tgt.qla_tgt->tgt_stop && 6188 !vha->vha_tgt.qla_tgt->tgt_stopped) 6189 qlt_fc_port_added(vha, fcport); 6190 break; 6191 case MODE_DUAL: 6192 qla2x00_reg_remote_port(vha, fcport); 6193 if (!vha->vha_tgt.qla_tgt->tgt_stop && 6194 !vha->vha_tgt.qla_tgt->tgt_stopped) 6195 qlt_fc_port_added(vha, fcport); 6196 break; 6197 default: 6198 break; 6199 } 6200 6201 if (NVME_TARGET(vha->hw, fcport)) 6202 qla_nvme_register_remote(vha, fcport); 6203 6204 qla2x00_set_fcport_state(fcport, FCS_ONLINE); 6205 6206 if (IS_IIDMA_CAPABLE(vha->hw) && vha->hw->flags.gpsc_supported) { 6207 if (fcport->id_changed) { 6208 fcport->id_changed = 0; 6209 ql_dbg(ql_dbg_disc, vha, 0x20d7, 6210 "%s %d %8phC post gfpnid fcp_cnt %d\n", 6211 __func__, __LINE__, fcport->port_name, 6212 vha->fcport_count); 6213 qla24xx_post_gfpnid_work(vha, fcport); 6214 } else { 6215 ql_dbg(ql_dbg_disc, vha, 0x20d7, 6216 "%s %d %8phC post gpsc fcp_cnt %d\n", 6217 __func__, __LINE__, fcport->port_name, 6218 vha->fcport_count); 6219 qla24xx_post_gpsc_work(vha, fcport); 6220 } 6221 } 6222 6223 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_COMPLETE); 6224 } 6225 6226 void qla_register_fcport_fn(struct work_struct *work) 6227 { 6228 fc_port_t *fcport = container_of(work, struct fc_port, reg_work); 6229 u32 rscn_gen = fcport->rscn_gen; 6230 u16 data[2]; 6231 6232 if (IS_SW_RESV_ADDR(fcport->d_id)) 6233 return; 6234 6235 qla2x00_update_fcport(fcport->vha, fcport); 6236 6237 ql_dbg(ql_dbg_disc, fcport->vha, 0x911e, 6238 "%s rscn gen %d/%d next DS %d\n", __func__, 6239 rscn_gen, fcport->rscn_gen, fcport->next_disc_state); 6240 6241 if (rscn_gen != fcport->rscn_gen) { 6242 /* RSCN(s) came in while registration */ 6243 switch (fcport->next_disc_state) { 6244 case DSC_DELETE_PEND: 6245 qlt_schedule_sess_for_deletion(fcport); 6246 break; 6247 case DSC_ADISC: 6248 data[0] = data[1] = 0; 6249 qla2x00_post_async_adisc_work(fcport->vha, fcport, 6250 data); 6251 break; 6252 default: 6253 break; 6254 } 6255 } 6256 } 6257 6258 /* 6259 * qla2x00_configure_fabric 6260 * Setup SNS devices with loop ID's. 6261 * 6262 * Input: 6263 * ha = adapter block pointer. 6264 * 6265 * Returns: 6266 * 0 = success. 6267 * BIT_0 = error 6268 */ 6269 static int 6270 qla2x00_configure_fabric(scsi_qla_host_t *vha) 6271 { 6272 int rval; 6273 fc_port_t *fcport; 6274 uint16_t mb[MAILBOX_REGISTER_COUNT]; 6275 uint16_t loop_id; 6276 struct qla_hw_data *ha = vha->hw; 6277 int discovery_gen; 6278 6279 /* If FL port exists, then SNS is present */ 6280 if (IS_FWI2_CAPABLE(ha)) 6281 loop_id = NPH_F_PORT; 6282 else 6283 loop_id = SNS_FL_PORT; 6284 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1); 6285 if (rval != QLA_SUCCESS) { 6286 ql_dbg(ql_dbg_disc, vha, 0x20a0, 6287 "MBX_GET_PORT_NAME failed, No FL Port.\n"); 6288 6289 vha->device_flags &= ~SWITCH_FOUND; 6290 return (QLA_SUCCESS); 6291 } 6292 vha->device_flags |= SWITCH_FOUND; 6293 6294 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_port_name, 0); 6295 if (rval != QLA_SUCCESS) 6296 ql_dbg(ql_dbg_disc, vha, 0x20ff, 6297 "Failed to get Fabric Port Name\n"); 6298 6299 if (qla_tgt_mode_enabled(vha) || qla_dual_mode_enabled(vha)) { 6300 rval = qla2x00_send_change_request(vha, 0x3, 0); 6301 if (rval != QLA_SUCCESS) 6302 ql_log(ql_log_warn, vha, 0x121, 6303 "Failed to enable receiving of RSCN requests: 0x%x.\n", 6304 rval); 6305 } 6306 6307 do { 6308 qla2x00_mgmt_svr_login(vha); 6309 6310 /* Ensure we are logged into the SNS. */ 6311 loop_id = NPH_SNS_LID(ha); 6312 rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff, 6313 0xfc, mb, BIT_1|BIT_0); 6314 if (rval != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) { 6315 ql_dbg(ql_dbg_disc, vha, 0x20a1, 6316 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[6]=%x mb[7]=%x (%x).\n", 6317 loop_id, mb[0], mb[1], mb[2], mb[6], mb[7], rval); 6318 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 6319 return rval; 6320 } 6321 6322 /* FDMI support. */ 6323 if (ql2xfdmienable && 6324 test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags)) 6325 qla2x00_fdmi_register(vha); 6326 6327 if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) { 6328 if (qla2x00_rft_id(vha)) { 6329 /* EMPTY */ 6330 ql_dbg(ql_dbg_disc, vha, 0x20a2, 6331 "Register FC-4 TYPE failed.\n"); 6332 if (test_bit(LOOP_RESYNC_NEEDED, 6333 &vha->dpc_flags)) 6334 break; 6335 } 6336 if (qla2x00_rff_id(vha, FC4_TYPE_FCP_SCSI)) { 6337 /* EMPTY */ 6338 ql_dbg(ql_dbg_disc, vha, 0x209a, 6339 "Register FC-4 Features failed.\n"); 6340 if (test_bit(LOOP_RESYNC_NEEDED, 6341 &vha->dpc_flags)) 6342 break; 6343 } 6344 if (vha->flags.nvme_enabled) { 6345 if (qla2x00_rff_id(vha, FC_TYPE_NVME)) { 6346 ql_dbg(ql_dbg_disc, vha, 0x2049, 6347 "Register NVME FC Type Features failed.\n"); 6348 } 6349 } 6350 if (qla2x00_rnn_id(vha)) { 6351 /* EMPTY */ 6352 ql_dbg(ql_dbg_disc, vha, 0x2104, 6353 "Register Node Name failed.\n"); 6354 if (test_bit(LOOP_RESYNC_NEEDED, 6355 &vha->dpc_flags)) 6356 break; 6357 } else if (qla2x00_rsnn_nn(vha)) { 6358 /* EMPTY */ 6359 ql_dbg(ql_dbg_disc, vha, 0x209b, 6360 "Register Symbolic Node Name failed.\n"); 6361 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 6362 break; 6363 } 6364 } 6365 6366 6367 /* Mark the time right before querying FW for connected ports. 6368 * This process is long, asynchronous and by the time it's done, 6369 * collected information might not be accurate anymore. E.g. 6370 * disconnected port might have re-connected and a brand new 6371 * session has been created. In this case session's generation 6372 * will be newer than discovery_gen. */ 6373 qlt_do_generation_tick(vha, &discovery_gen); 6374 6375 if (USE_ASYNC_SCAN(ha)) { 6376 rval = qla24xx_async_gpnft(vha, FC4_TYPE_FCP_SCSI, 6377 NULL); 6378 if (rval) 6379 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 6380 } else { 6381 list_for_each_entry(fcport, &vha->vp_fcports, list) 6382 fcport->scan_state = QLA_FCPORT_SCAN; 6383 6384 rval = qla2x00_find_all_fabric_devs(vha); 6385 } 6386 if (rval != QLA_SUCCESS) 6387 break; 6388 } while (0); 6389 6390 if (!vha->nvme_local_port && vha->flags.nvme_enabled) 6391 qla_nvme_register_hba(vha); 6392 6393 if (rval) 6394 ql_dbg(ql_dbg_disc, vha, 0x2068, 6395 "Configure fabric error exit rval=%d.\n", rval); 6396 6397 return (rval); 6398 } 6399 6400 /* 6401 * qla2x00_find_all_fabric_devs 6402 * 6403 * Input: 6404 * ha = adapter block pointer. 6405 * dev = database device entry pointer. 6406 * 6407 * Returns: 6408 * 0 = success. 6409 * 6410 * Context: 6411 * Kernel context. 6412 */ 6413 static int 6414 qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha) 6415 { 6416 int rval; 6417 uint16_t loop_id; 6418 fc_port_t *fcport, *new_fcport; 6419 int found; 6420 6421 sw_info_t *swl; 6422 int swl_idx; 6423 int first_dev, last_dev; 6424 port_id_t wrap = {}, nxt_d_id; 6425 struct qla_hw_data *ha = vha->hw; 6426 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 6427 unsigned long flags; 6428 6429 rval = QLA_SUCCESS; 6430 6431 /* Try GID_PT to get device list, else GAN. */ 6432 if (!ha->swl) 6433 ha->swl = kcalloc(ha->max_fibre_devices, sizeof(sw_info_t), 6434 GFP_KERNEL); 6435 swl = ha->swl; 6436 if (!swl) { 6437 /*EMPTY*/ 6438 ql_dbg(ql_dbg_disc, vha, 0x209c, 6439 "GID_PT allocations failed, fallback on GA_NXT.\n"); 6440 } else { 6441 memset(swl, 0, ha->max_fibre_devices * sizeof(sw_info_t)); 6442 if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) { 6443 swl = NULL; 6444 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 6445 return rval; 6446 } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) { 6447 swl = NULL; 6448 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 6449 return rval; 6450 } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) { 6451 swl = NULL; 6452 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 6453 return rval; 6454 } else if (qla2x00_gfpn_id(vha, swl) != QLA_SUCCESS) { 6455 swl = NULL; 6456 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 6457 return rval; 6458 } 6459 6460 /* If other queries succeeded probe for FC-4 type */ 6461 if (swl) { 6462 qla2x00_gff_id(vha, swl); 6463 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 6464 return rval; 6465 } 6466 } 6467 swl_idx = 0; 6468 6469 /* Allocate temporary fcport for any new fcports discovered. */ 6470 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 6471 if (new_fcport == NULL) { 6472 ql_log(ql_log_warn, vha, 0x209d, 6473 "Failed to allocate memory for fcport.\n"); 6474 return (QLA_MEMORY_ALLOC_FAILED); 6475 } 6476 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); 6477 /* Set start port ID scan at adapter ID. */ 6478 first_dev = 1; 6479 last_dev = 0; 6480 6481 /* Starting free loop ID. */ 6482 loop_id = ha->min_external_loopid; 6483 for (; loop_id <= ha->max_loop_id; loop_id++) { 6484 if (qla2x00_is_reserved_id(vha, loop_id)) 6485 continue; 6486 6487 if (ha->current_topology == ISP_CFG_FL && 6488 (atomic_read(&vha->loop_down_timer) || 6489 LOOP_TRANSITION(vha))) { 6490 atomic_set(&vha->loop_down_timer, 0); 6491 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 6492 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 6493 break; 6494 } 6495 6496 if (swl != NULL) { 6497 if (last_dev) { 6498 wrap.b24 = new_fcport->d_id.b24; 6499 } else { 6500 new_fcport->d_id.b24 = swl[swl_idx].d_id.b24; 6501 memcpy(new_fcport->node_name, 6502 swl[swl_idx].node_name, WWN_SIZE); 6503 memcpy(new_fcport->port_name, 6504 swl[swl_idx].port_name, WWN_SIZE); 6505 memcpy(new_fcport->fabric_port_name, 6506 swl[swl_idx].fabric_port_name, WWN_SIZE); 6507 new_fcport->fp_speed = swl[swl_idx].fp_speed; 6508 new_fcport->fc4_type = swl[swl_idx].fc4_type; 6509 6510 new_fcport->nvme_flag = 0; 6511 if (vha->flags.nvme_enabled && 6512 swl[swl_idx].fc4_type & FS_FC4TYPE_NVME) { 6513 ql_log(ql_log_info, vha, 0x2131, 6514 "FOUND: NVME port %8phC as FC Type 28h\n", 6515 new_fcport->port_name); 6516 } 6517 6518 if (swl[swl_idx].d_id.b.rsvd_1 != 0) { 6519 last_dev = 1; 6520 } 6521 swl_idx++; 6522 } 6523 } else { 6524 /* Send GA_NXT to the switch */ 6525 rval = qla2x00_ga_nxt(vha, new_fcport); 6526 if (rval != QLA_SUCCESS) { 6527 ql_log(ql_log_warn, vha, 0x209e, 6528 "SNS scan failed -- assuming " 6529 "zero-entry result.\n"); 6530 rval = QLA_SUCCESS; 6531 break; 6532 } 6533 } 6534 6535 /* If wrap on switch device list, exit. */ 6536 if (first_dev) { 6537 wrap.b24 = new_fcport->d_id.b24; 6538 first_dev = 0; 6539 } else if (new_fcport->d_id.b24 == wrap.b24) { 6540 ql_dbg(ql_dbg_disc, vha, 0x209f, 6541 "Device wrap (%02x%02x%02x).\n", 6542 new_fcport->d_id.b.domain, 6543 new_fcport->d_id.b.area, 6544 new_fcport->d_id.b.al_pa); 6545 break; 6546 } 6547 6548 /* Bypass if same physical adapter. */ 6549 if (new_fcport->d_id.b24 == base_vha->d_id.b24) 6550 continue; 6551 6552 /* Bypass virtual ports of the same host. */ 6553 if (qla2x00_is_a_vp_did(vha, new_fcport->d_id.b24)) 6554 continue; 6555 6556 /* Bypass if same domain and area of adapter. */ 6557 if (((new_fcport->d_id.b24 & 0xffff00) == 6558 (vha->d_id.b24 & 0xffff00)) && ha->current_topology == 6559 ISP_CFG_FL) 6560 continue; 6561 6562 /* Bypass reserved domain fields. */ 6563 if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0) 6564 continue; 6565 6566 /* Bypass ports whose FCP-4 type is not FCP_SCSI */ 6567 if (ql2xgffidenable && 6568 (!(new_fcport->fc4_type & FS_FC4TYPE_FCP) && 6569 new_fcport->fc4_type != 0)) 6570 continue; 6571 6572 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 6573 6574 /* Locate matching device in database. */ 6575 found = 0; 6576 list_for_each_entry(fcport, &vha->vp_fcports, list) { 6577 if (memcmp(new_fcport->port_name, fcport->port_name, 6578 WWN_SIZE)) 6579 continue; 6580 6581 fcport->scan_state = QLA_FCPORT_FOUND; 6582 6583 found++; 6584 6585 /* Update port state. */ 6586 memcpy(fcport->fabric_port_name, 6587 new_fcport->fabric_port_name, WWN_SIZE); 6588 fcport->fp_speed = new_fcport->fp_speed; 6589 6590 /* 6591 * If address the same and state FCS_ONLINE 6592 * (or in target mode), nothing changed. 6593 */ 6594 if (fcport->d_id.b24 == new_fcport->d_id.b24 && 6595 (atomic_read(&fcport->state) == FCS_ONLINE || 6596 (vha->host->active_mode == MODE_TARGET))) { 6597 break; 6598 } 6599 6600 if (fcport->login_retry == 0) 6601 fcport->login_retry = 6602 vha->hw->login_retry_count; 6603 /* 6604 * If device was not a fabric device before. 6605 */ 6606 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) { 6607 fcport->d_id.b24 = new_fcport->d_id.b24; 6608 qla2x00_clear_loop_id(fcport); 6609 fcport->flags |= (FCF_FABRIC_DEVICE | 6610 FCF_LOGIN_NEEDED); 6611 break; 6612 } 6613 6614 /* 6615 * Port ID changed or device was marked to be updated; 6616 * Log it out if still logged in and mark it for 6617 * relogin later. 6618 */ 6619 if (qla_tgt_mode_enabled(base_vha)) { 6620 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf080, 6621 "port changed FC ID, %8phC" 6622 " old %x:%x:%x (loop_id 0x%04x)-> new %x:%x:%x\n", 6623 fcport->port_name, 6624 fcport->d_id.b.domain, 6625 fcport->d_id.b.area, 6626 fcport->d_id.b.al_pa, 6627 fcport->loop_id, 6628 new_fcport->d_id.b.domain, 6629 new_fcport->d_id.b.area, 6630 new_fcport->d_id.b.al_pa); 6631 fcport->d_id.b24 = new_fcport->d_id.b24; 6632 break; 6633 } 6634 6635 fcport->d_id.b24 = new_fcport->d_id.b24; 6636 fcport->flags |= FCF_LOGIN_NEEDED; 6637 break; 6638 } 6639 6640 if (found && NVME_TARGET(vha->hw, fcport)) { 6641 if (fcport->disc_state == DSC_DELETE_PEND) { 6642 qla2x00_set_fcport_disc_state(fcport, DSC_GNL); 6643 vha->fcport_count--; 6644 fcport->login_succ = 0; 6645 } 6646 } 6647 6648 if (found) { 6649 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 6650 continue; 6651 } 6652 /* If device was not in our fcports list, then add it. */ 6653 new_fcport->scan_state = QLA_FCPORT_FOUND; 6654 list_add_tail(&new_fcport->list, &vha->vp_fcports); 6655 6656 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 6657 6658 6659 /* Allocate a new replacement fcport. */ 6660 nxt_d_id.b24 = new_fcport->d_id.b24; 6661 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 6662 if (new_fcport == NULL) { 6663 ql_log(ql_log_warn, vha, 0xd032, 6664 "Memory allocation failed for fcport.\n"); 6665 return (QLA_MEMORY_ALLOC_FAILED); 6666 } 6667 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); 6668 new_fcport->d_id.b24 = nxt_d_id.b24; 6669 } 6670 6671 qla2x00_free_fcport(new_fcport); 6672 6673 /* 6674 * Logout all previous fabric dev marked lost, except FCP2 devices. 6675 */ 6676 list_for_each_entry(fcport, &vha->vp_fcports, list) { 6677 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 6678 break; 6679 6680 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) 6681 continue; 6682 6683 if (fcport->scan_state == QLA_FCPORT_SCAN) { 6684 if ((qla_dual_mode_enabled(vha) || 6685 qla_ini_mode_enabled(vha)) && 6686 atomic_read(&fcport->state) == FCS_ONLINE) { 6687 qla2x00_mark_device_lost(vha, fcport, 6688 ql2xplogiabsentdevice); 6689 if (fcport->loop_id != FC_NO_LOOP_ID && 6690 (fcport->flags & FCF_FCP2_DEVICE) == 0 && 6691 fcport->port_type != FCT_INITIATOR && 6692 fcport->port_type != FCT_BROADCAST) { 6693 ql_dbg(ql_dbg_disc, vha, 0x20f0, 6694 "%s %d %8phC post del sess\n", 6695 __func__, __LINE__, 6696 fcport->port_name); 6697 qlt_schedule_sess_for_deletion(fcport); 6698 continue; 6699 } 6700 } 6701 } 6702 6703 if (fcport->scan_state == QLA_FCPORT_FOUND && 6704 (fcport->flags & FCF_LOGIN_NEEDED) != 0) 6705 qla24xx_fcport_handle_login(vha, fcport); 6706 } 6707 return (rval); 6708 } 6709 6710 /* FW does not set aside Loop id for MGMT Server/FFFFFAh */ 6711 int 6712 qla2x00_reserve_mgmt_server_loop_id(scsi_qla_host_t *vha) 6713 { 6714 int loop_id = FC_NO_LOOP_ID; 6715 int lid = NPH_MGMT_SERVER - vha->vp_idx; 6716 unsigned long flags; 6717 struct qla_hw_data *ha = vha->hw; 6718 6719 if (vha->vp_idx == 0) { 6720 set_bit(NPH_MGMT_SERVER, ha->loop_id_map); 6721 return NPH_MGMT_SERVER; 6722 } 6723 6724 /* pick id from high and work down to low */ 6725 spin_lock_irqsave(&ha->vport_slock, flags); 6726 for (; lid > 0; lid--) { 6727 if (!test_bit(lid, vha->hw->loop_id_map)) { 6728 set_bit(lid, vha->hw->loop_id_map); 6729 loop_id = lid; 6730 break; 6731 } 6732 } 6733 spin_unlock_irqrestore(&ha->vport_slock, flags); 6734 6735 return loop_id; 6736 } 6737 6738 /* 6739 * qla2x00_fabric_login 6740 * Issue fabric login command. 6741 * 6742 * Input: 6743 * ha = adapter block pointer. 6744 * device = pointer to FC device type structure. 6745 * 6746 * Returns: 6747 * 0 - Login successfully 6748 * 1 - Login failed 6749 * 2 - Initiator device 6750 * 3 - Fatal error 6751 */ 6752 int 6753 qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport, 6754 uint16_t *next_loopid) 6755 { 6756 int rval; 6757 int retry; 6758 uint16_t tmp_loopid; 6759 uint16_t mb[MAILBOX_REGISTER_COUNT]; 6760 struct qla_hw_data *ha = vha->hw; 6761 6762 retry = 0; 6763 tmp_loopid = 0; 6764 6765 for (;;) { 6766 ql_dbg(ql_dbg_disc, vha, 0x2000, 6767 "Trying Fabric Login w/loop id 0x%04x for port " 6768 "%02x%02x%02x.\n", 6769 fcport->loop_id, fcport->d_id.b.domain, 6770 fcport->d_id.b.area, fcport->d_id.b.al_pa); 6771 6772 /* Login fcport on switch. */ 6773 rval = ha->isp_ops->fabric_login(vha, fcport->loop_id, 6774 fcport->d_id.b.domain, fcport->d_id.b.area, 6775 fcport->d_id.b.al_pa, mb, BIT_0); 6776 if (rval != QLA_SUCCESS) { 6777 return rval; 6778 } 6779 if (mb[0] == MBS_PORT_ID_USED) { 6780 /* 6781 * Device has another loop ID. The firmware team 6782 * recommends the driver perform an implicit login with 6783 * the specified ID again. The ID we just used is save 6784 * here so we return with an ID that can be tried by 6785 * the next login. 6786 */ 6787 retry++; 6788 tmp_loopid = fcport->loop_id; 6789 fcport->loop_id = mb[1]; 6790 6791 ql_dbg(ql_dbg_disc, vha, 0x2001, 6792 "Fabric Login: port in use - next loop " 6793 "id=0x%04x, port id= %02x%02x%02x.\n", 6794 fcport->loop_id, fcport->d_id.b.domain, 6795 fcport->d_id.b.area, fcport->d_id.b.al_pa); 6796 6797 } else if (mb[0] == MBS_COMMAND_COMPLETE) { 6798 /* 6799 * Login succeeded. 6800 */ 6801 if (retry) { 6802 /* A retry occurred before. */ 6803 *next_loopid = tmp_loopid; 6804 } else { 6805 /* 6806 * No retry occurred before. Just increment the 6807 * ID value for next login. 6808 */ 6809 *next_loopid = (fcport->loop_id + 1); 6810 } 6811 6812 if (mb[1] & BIT_0) { 6813 fcport->port_type = FCT_INITIATOR; 6814 } else { 6815 fcport->port_type = FCT_TARGET; 6816 if (mb[1] & BIT_1) { 6817 fcport->flags |= FCF_FCP2_DEVICE; 6818 } 6819 } 6820 6821 if (mb[10] & BIT_0) 6822 fcport->supported_classes |= FC_COS_CLASS2; 6823 if (mb[10] & BIT_1) 6824 fcport->supported_classes |= FC_COS_CLASS3; 6825 6826 if (IS_FWI2_CAPABLE(ha)) { 6827 if (mb[10] & BIT_7) 6828 fcport->flags |= 6829 FCF_CONF_COMP_SUPPORTED; 6830 } 6831 6832 rval = QLA_SUCCESS; 6833 break; 6834 } else if (mb[0] == MBS_LOOP_ID_USED) { 6835 /* 6836 * Loop ID already used, try next loop ID. 6837 */ 6838 fcport->loop_id++; 6839 rval = qla2x00_find_new_loop_id(vha, fcport); 6840 if (rval != QLA_SUCCESS) { 6841 /* Ran out of loop IDs to use */ 6842 break; 6843 } 6844 } else if (mb[0] == MBS_COMMAND_ERROR) { 6845 /* 6846 * Firmware possibly timed out during login. If NO 6847 * retries are left to do then the device is declared 6848 * dead. 6849 */ 6850 *next_loopid = fcport->loop_id; 6851 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 6852 fcport->d_id.b.domain, fcport->d_id.b.area, 6853 fcport->d_id.b.al_pa); 6854 qla2x00_mark_device_lost(vha, fcport, 1); 6855 6856 rval = 1; 6857 break; 6858 } else { 6859 /* 6860 * unrecoverable / not handled error 6861 */ 6862 ql_dbg(ql_dbg_disc, vha, 0x2002, 6863 "Failed=%x port_id=%02x%02x%02x loop_id=%x " 6864 "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain, 6865 fcport->d_id.b.area, fcport->d_id.b.al_pa, 6866 fcport->loop_id, jiffies); 6867 6868 *next_loopid = fcport->loop_id; 6869 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 6870 fcport->d_id.b.domain, fcport->d_id.b.area, 6871 fcport->d_id.b.al_pa); 6872 qla2x00_clear_loop_id(fcport); 6873 fcport->login_retry = 0; 6874 6875 rval = 3; 6876 break; 6877 } 6878 } 6879 6880 return (rval); 6881 } 6882 6883 /* 6884 * qla2x00_local_device_login 6885 * Issue local device login command. 6886 * 6887 * Input: 6888 * ha = adapter block pointer. 6889 * loop_id = loop id of device to login to. 6890 * 6891 * Returns (Where's the #define!!!!): 6892 * 0 - Login successfully 6893 * 1 - Login failed 6894 * 3 - Fatal error 6895 */ 6896 int 6897 qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport) 6898 { 6899 int rval; 6900 uint16_t mb[MAILBOX_REGISTER_COUNT]; 6901 6902 memset(mb, 0, sizeof(mb)); 6903 rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0); 6904 if (rval == QLA_SUCCESS) { 6905 /* Interrogate mailbox registers for any errors */ 6906 if (mb[0] == MBS_COMMAND_ERROR) 6907 rval = 1; 6908 else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR) 6909 /* device not in PCB table */ 6910 rval = 3; 6911 } 6912 6913 return (rval); 6914 } 6915 6916 /* 6917 * qla2x00_loop_resync 6918 * Resync with fibre channel devices. 6919 * 6920 * Input: 6921 * ha = adapter block pointer. 6922 * 6923 * Returns: 6924 * 0 = success 6925 */ 6926 int 6927 qla2x00_loop_resync(scsi_qla_host_t *vha) 6928 { 6929 int rval = QLA_SUCCESS; 6930 uint32_t wait_time; 6931 6932 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6933 if (vha->flags.online) { 6934 if (!(rval = qla2x00_fw_ready(vha))) { 6935 /* Wait at most MAX_TARGET RSCNs for a stable link. */ 6936 wait_time = 256; 6937 do { 6938 if (!IS_QLAFX00(vha->hw)) { 6939 /* 6940 * Issue a marker after FW becomes 6941 * ready. 6942 */ 6943 qla2x00_marker(vha, vha->hw->base_qpair, 6944 0, 0, MK_SYNC_ALL); 6945 vha->marker_needed = 0; 6946 } 6947 6948 /* Remap devices on Loop. */ 6949 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 6950 6951 if (IS_QLAFX00(vha->hw)) 6952 qlafx00_configure_devices(vha); 6953 else 6954 qla2x00_configure_loop(vha); 6955 6956 wait_time--; 6957 } while (!atomic_read(&vha->loop_down_timer) && 6958 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 6959 && wait_time && (test_bit(LOOP_RESYNC_NEEDED, 6960 &vha->dpc_flags))); 6961 } 6962 } 6963 6964 if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 6965 return (QLA_FUNCTION_FAILED); 6966 6967 if (rval) 6968 ql_dbg(ql_dbg_disc, vha, 0x206c, 6969 "%s *** FAILED ***.\n", __func__); 6970 6971 return (rval); 6972 } 6973 6974 /* 6975 * qla2x00_perform_loop_resync 6976 * Description: This function will set the appropriate flags and call 6977 * qla2x00_loop_resync. If successful loop will be resynced 6978 * Arguments : scsi_qla_host_t pointer 6979 * returm : Success or Failure 6980 */ 6981 6982 int qla2x00_perform_loop_resync(scsi_qla_host_t *ha) 6983 { 6984 int32_t rval = 0; 6985 6986 if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) { 6987 /*Configure the flags so that resync happens properly*/ 6988 atomic_set(&ha->loop_down_timer, 0); 6989 if (!(ha->device_flags & DFLG_NO_CABLE)) { 6990 atomic_set(&ha->loop_state, LOOP_UP); 6991 set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags); 6992 set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags); 6993 set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags); 6994 6995 rval = qla2x00_loop_resync(ha); 6996 } else 6997 atomic_set(&ha->loop_state, LOOP_DEAD); 6998 6999 clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags); 7000 } 7001 7002 return rval; 7003 } 7004 7005 /* Assumes idc_lock always held on entry */ 7006 void 7007 qla83xx_reset_ownership(scsi_qla_host_t *vha) 7008 { 7009 struct qla_hw_data *ha = vha->hw; 7010 uint32_t drv_presence, drv_presence_mask; 7011 uint32_t dev_part_info1, dev_part_info2, class_type; 7012 uint32_t class_type_mask = 0x3; 7013 uint16_t fcoe_other_function = 0xffff, i; 7014 7015 if (IS_QLA8044(ha)) { 7016 drv_presence = qla8044_rd_direct(vha, 7017 QLA8044_CRB_DRV_ACTIVE_INDEX); 7018 dev_part_info1 = qla8044_rd_direct(vha, 7019 QLA8044_CRB_DEV_PART_INFO_INDEX); 7020 dev_part_info2 = qla8044_rd_direct(vha, 7021 QLA8044_CRB_DEV_PART_INFO2); 7022 } else { 7023 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence); 7024 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO1, &dev_part_info1); 7025 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO2, &dev_part_info2); 7026 } 7027 for (i = 0; i < 8; i++) { 7028 class_type = ((dev_part_info1 >> (i * 4)) & class_type_mask); 7029 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) && 7030 (i != ha->portnum)) { 7031 fcoe_other_function = i; 7032 break; 7033 } 7034 } 7035 if (fcoe_other_function == 0xffff) { 7036 for (i = 0; i < 8; i++) { 7037 class_type = ((dev_part_info2 >> (i * 4)) & 7038 class_type_mask); 7039 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) && 7040 ((i + 8) != ha->portnum)) { 7041 fcoe_other_function = i + 8; 7042 break; 7043 } 7044 } 7045 } 7046 /* 7047 * Prepare drv-presence mask based on fcoe functions present. 7048 * However consider only valid physical fcoe function numbers (0-15). 7049 */ 7050 drv_presence_mask = ~((1 << (ha->portnum)) | 7051 ((fcoe_other_function == 0xffff) ? 7052 0 : (1 << (fcoe_other_function)))); 7053 7054 /* We are the reset owner iff: 7055 * - No other protocol drivers present. 7056 * - This is the lowest among fcoe functions. */ 7057 if (!(drv_presence & drv_presence_mask) && 7058 (ha->portnum < fcoe_other_function)) { 7059 ql_dbg(ql_dbg_p3p, vha, 0xb07f, 7060 "This host is Reset owner.\n"); 7061 ha->flags.nic_core_reset_owner = 1; 7062 } 7063 } 7064 7065 static int 7066 __qla83xx_set_drv_ack(scsi_qla_host_t *vha) 7067 { 7068 int rval = QLA_SUCCESS; 7069 struct qla_hw_data *ha = vha->hw; 7070 uint32_t drv_ack; 7071 7072 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack); 7073 if (rval == QLA_SUCCESS) { 7074 drv_ack |= (1 << ha->portnum); 7075 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack); 7076 } 7077 7078 return rval; 7079 } 7080 7081 static int 7082 __qla83xx_clear_drv_ack(scsi_qla_host_t *vha) 7083 { 7084 int rval = QLA_SUCCESS; 7085 struct qla_hw_data *ha = vha->hw; 7086 uint32_t drv_ack; 7087 7088 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack); 7089 if (rval == QLA_SUCCESS) { 7090 drv_ack &= ~(1 << ha->portnum); 7091 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack); 7092 } 7093 7094 return rval; 7095 } 7096 7097 /* Assumes idc-lock always held on entry */ 7098 void 7099 qla83xx_idc_audit(scsi_qla_host_t *vha, int audit_type) 7100 { 7101 struct qla_hw_data *ha = vha->hw; 7102 uint32_t idc_audit_reg = 0, duration_secs = 0; 7103 7104 switch (audit_type) { 7105 case IDC_AUDIT_TIMESTAMP: 7106 ha->idc_audit_ts = (jiffies_to_msecs(jiffies) / 1000); 7107 idc_audit_reg = (ha->portnum) | 7108 (IDC_AUDIT_TIMESTAMP << 7) | (ha->idc_audit_ts << 8); 7109 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg); 7110 break; 7111 7112 case IDC_AUDIT_COMPLETION: 7113 duration_secs = ((jiffies_to_msecs(jiffies) - 7114 jiffies_to_msecs(ha->idc_audit_ts)) / 1000); 7115 idc_audit_reg = (ha->portnum) | 7116 (IDC_AUDIT_COMPLETION << 7) | (duration_secs << 8); 7117 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg); 7118 break; 7119 7120 default: 7121 ql_log(ql_log_warn, vha, 0xb078, 7122 "Invalid audit type specified.\n"); 7123 break; 7124 } 7125 } 7126 7127 /* Assumes idc_lock always held on entry */ 7128 static int 7129 qla83xx_initiating_reset(scsi_qla_host_t *vha) 7130 { 7131 struct qla_hw_data *ha = vha->hw; 7132 uint32_t idc_control, dev_state; 7133 7134 __qla83xx_get_idc_control(vha, &idc_control); 7135 if ((idc_control & QLA83XX_IDC_RESET_DISABLED)) { 7136 ql_log(ql_log_info, vha, 0xb080, 7137 "NIC Core reset has been disabled. idc-control=0x%x\n", 7138 idc_control); 7139 return QLA_FUNCTION_FAILED; 7140 } 7141 7142 /* Set NEED-RESET iff in READY state and we are the reset-owner */ 7143 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state); 7144 if (ha->flags.nic_core_reset_owner && dev_state == QLA8XXX_DEV_READY) { 7145 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, 7146 QLA8XXX_DEV_NEED_RESET); 7147 ql_log(ql_log_info, vha, 0xb056, "HW State: NEED RESET.\n"); 7148 qla83xx_idc_audit(vha, IDC_AUDIT_TIMESTAMP); 7149 } else { 7150 ql_log(ql_log_info, vha, 0xb057, "HW State: %s.\n", 7151 qdev_state(dev_state)); 7152 7153 /* SV: XXX: Is timeout required here? */ 7154 /* Wait for IDC state change READY -> NEED_RESET */ 7155 while (dev_state == QLA8XXX_DEV_READY) { 7156 qla83xx_idc_unlock(vha, 0); 7157 msleep(200); 7158 qla83xx_idc_lock(vha, 0); 7159 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state); 7160 } 7161 } 7162 7163 /* Send IDC ack by writing to drv-ack register */ 7164 __qla83xx_set_drv_ack(vha); 7165 7166 return QLA_SUCCESS; 7167 } 7168 7169 int 7170 __qla83xx_set_idc_control(scsi_qla_host_t *vha, uint32_t idc_control) 7171 { 7172 return qla83xx_wr_reg(vha, QLA83XX_IDC_CONTROL, idc_control); 7173 } 7174 7175 int 7176 __qla83xx_get_idc_control(scsi_qla_host_t *vha, uint32_t *idc_control) 7177 { 7178 return qla83xx_rd_reg(vha, QLA83XX_IDC_CONTROL, idc_control); 7179 } 7180 7181 static int 7182 qla83xx_check_driver_presence(scsi_qla_host_t *vha) 7183 { 7184 uint32_t drv_presence = 0; 7185 struct qla_hw_data *ha = vha->hw; 7186 7187 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence); 7188 if (drv_presence & (1 << ha->portnum)) 7189 return QLA_SUCCESS; 7190 else 7191 return QLA_TEST_FAILED; 7192 } 7193 7194 int 7195 qla83xx_nic_core_reset(scsi_qla_host_t *vha) 7196 { 7197 int rval = QLA_SUCCESS; 7198 struct qla_hw_data *ha = vha->hw; 7199 7200 ql_dbg(ql_dbg_p3p, vha, 0xb058, 7201 "Entered %s().\n", __func__); 7202 7203 if (vha->device_flags & DFLG_DEV_FAILED) { 7204 ql_log(ql_log_warn, vha, 0xb059, 7205 "Device in unrecoverable FAILED state.\n"); 7206 return QLA_FUNCTION_FAILED; 7207 } 7208 7209 qla83xx_idc_lock(vha, 0); 7210 7211 if (qla83xx_check_driver_presence(vha) != QLA_SUCCESS) { 7212 ql_log(ql_log_warn, vha, 0xb05a, 7213 "Function=0x%x has been removed from IDC participation.\n", 7214 ha->portnum); 7215 rval = QLA_FUNCTION_FAILED; 7216 goto exit; 7217 } 7218 7219 qla83xx_reset_ownership(vha); 7220 7221 rval = qla83xx_initiating_reset(vha); 7222 7223 /* 7224 * Perform reset if we are the reset-owner, 7225 * else wait till IDC state changes to READY/FAILED. 7226 */ 7227 if (rval == QLA_SUCCESS) { 7228 rval = qla83xx_idc_state_handler(vha); 7229 7230 if (rval == QLA_SUCCESS) 7231 ha->flags.nic_core_hung = 0; 7232 __qla83xx_clear_drv_ack(vha); 7233 } 7234 7235 exit: 7236 qla83xx_idc_unlock(vha, 0); 7237 7238 ql_dbg(ql_dbg_p3p, vha, 0xb05b, "Exiting %s.\n", __func__); 7239 7240 return rval; 7241 } 7242 7243 int 7244 qla2xxx_mctp_dump(scsi_qla_host_t *vha) 7245 { 7246 struct qla_hw_data *ha = vha->hw; 7247 int rval = QLA_FUNCTION_FAILED; 7248 7249 if (!IS_MCTP_CAPABLE(ha)) { 7250 /* This message can be removed from the final version */ 7251 ql_log(ql_log_info, vha, 0x506d, 7252 "This board is not MCTP capable\n"); 7253 return rval; 7254 } 7255 7256 if (!ha->mctp_dump) { 7257 ha->mctp_dump = dma_alloc_coherent(&ha->pdev->dev, 7258 MCTP_DUMP_SIZE, &ha->mctp_dump_dma, GFP_KERNEL); 7259 7260 if (!ha->mctp_dump) { 7261 ql_log(ql_log_warn, vha, 0x506e, 7262 "Failed to allocate memory for mctp dump\n"); 7263 return rval; 7264 } 7265 } 7266 7267 #define MCTP_DUMP_STR_ADDR 0x00000000 7268 rval = qla2x00_dump_mctp_data(vha, ha->mctp_dump_dma, 7269 MCTP_DUMP_STR_ADDR, MCTP_DUMP_SIZE/4); 7270 if (rval != QLA_SUCCESS) { 7271 ql_log(ql_log_warn, vha, 0x506f, 7272 "Failed to capture mctp dump\n"); 7273 } else { 7274 ql_log(ql_log_info, vha, 0x5070, 7275 "Mctp dump capture for host (%ld/%p).\n", 7276 vha->host_no, ha->mctp_dump); 7277 ha->mctp_dumped = 1; 7278 } 7279 7280 if (!ha->flags.nic_core_reset_hdlr_active && !ha->portnum) { 7281 ha->flags.nic_core_reset_hdlr_active = 1; 7282 rval = qla83xx_restart_nic_firmware(vha); 7283 if (rval) 7284 /* NIC Core reset failed. */ 7285 ql_log(ql_log_warn, vha, 0x5071, 7286 "Failed to restart nic firmware\n"); 7287 else 7288 ql_dbg(ql_dbg_p3p, vha, 0xb084, 7289 "Restarted NIC firmware successfully.\n"); 7290 ha->flags.nic_core_reset_hdlr_active = 0; 7291 } 7292 7293 return rval; 7294 7295 } 7296 7297 /* 7298 * qla2x00_quiesce_io 7299 * Description: This function will block the new I/Os 7300 * Its not aborting any I/Os as context 7301 * is not destroyed during quiescence 7302 * Arguments: scsi_qla_host_t 7303 * return : void 7304 */ 7305 void 7306 qla2x00_quiesce_io(scsi_qla_host_t *vha) 7307 { 7308 struct qla_hw_data *ha = vha->hw; 7309 struct scsi_qla_host *vp, *tvp; 7310 unsigned long flags; 7311 7312 ql_dbg(ql_dbg_dpc, vha, 0x401d, 7313 "Quiescing I/O - ha=%p.\n", ha); 7314 7315 atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME); 7316 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 7317 atomic_set(&vha->loop_state, LOOP_DOWN); 7318 qla2x00_mark_all_devices_lost(vha); 7319 7320 spin_lock_irqsave(&ha->vport_slock, flags); 7321 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { 7322 atomic_inc(&vp->vref_count); 7323 spin_unlock_irqrestore(&ha->vport_slock, flags); 7324 7325 qla2x00_mark_all_devices_lost(vp); 7326 7327 spin_lock_irqsave(&ha->vport_slock, flags); 7328 atomic_dec(&vp->vref_count); 7329 } 7330 spin_unlock_irqrestore(&ha->vport_slock, flags); 7331 } else { 7332 if (!atomic_read(&vha->loop_down_timer)) 7333 atomic_set(&vha->loop_down_timer, 7334 LOOP_DOWN_TIME); 7335 } 7336 /* Wait for pending cmds to complete */ 7337 WARN_ON_ONCE(qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) 7338 != QLA_SUCCESS); 7339 } 7340 7341 void 7342 qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha) 7343 { 7344 struct qla_hw_data *ha = vha->hw; 7345 struct scsi_qla_host *vp, *tvp; 7346 unsigned long flags; 7347 fc_port_t *fcport; 7348 u16 i; 7349 7350 /* For ISP82XX, driver waits for completion of the commands. 7351 * online flag should be set. 7352 */ 7353 if (!(IS_P3P_TYPE(ha))) 7354 vha->flags.online = 0; 7355 ha->flags.chip_reset_done = 0; 7356 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 7357 vha->qla_stats.total_isp_aborts++; 7358 7359 ql_log(ql_log_info, vha, 0x00af, 7360 "Performing ISP error recovery - ha=%p.\n", ha); 7361 7362 ha->flags.purge_mbox = 1; 7363 /* For ISP82XX, reset_chip is just disabling interrupts. 7364 * Driver waits for the completion of the commands. 7365 * the interrupts need to be enabled. 7366 */ 7367 if (!(IS_P3P_TYPE(ha))) 7368 ha->isp_ops->reset_chip(vha); 7369 7370 ha->link_data_rate = PORT_SPEED_UNKNOWN; 7371 SAVE_TOPO(ha); 7372 ha->flags.rida_fmt2 = 0; 7373 ha->flags.n2n_ae = 0; 7374 ha->flags.lip_ae = 0; 7375 ha->current_topology = 0; 7376 QLA_FW_STOPPED(ha); 7377 ha->flags.fw_init_done = 0; 7378 ha->chip_reset++; 7379 ha->base_qpair->chip_reset = ha->chip_reset; 7380 ha->base_qpair->cmd_cnt = ha->base_qpair->cmd_completion_cnt = 0; 7381 ha->base_qpair->prev_completion_cnt = 0; 7382 for (i = 0; i < ha->max_qpairs; i++) { 7383 if (ha->queue_pair_map[i]) { 7384 ha->queue_pair_map[i]->chip_reset = 7385 ha->base_qpair->chip_reset; 7386 ha->queue_pair_map[i]->cmd_cnt = 7387 ha->queue_pair_map[i]->cmd_completion_cnt = 0; 7388 ha->base_qpair->prev_completion_cnt = 0; 7389 } 7390 } 7391 7392 /* purge MBox commands */ 7393 if (atomic_read(&ha->num_pend_mbx_stage3)) { 7394 clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags); 7395 complete(&ha->mbx_intr_comp); 7396 } 7397 7398 i = 0; 7399 while (atomic_read(&ha->num_pend_mbx_stage3) || 7400 atomic_read(&ha->num_pend_mbx_stage2) || 7401 atomic_read(&ha->num_pend_mbx_stage1)) { 7402 msleep(20); 7403 i++; 7404 if (i > 50) 7405 break; 7406 } 7407 ha->flags.purge_mbox = 0; 7408 7409 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 7410 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 7411 atomic_set(&vha->loop_state, LOOP_DOWN); 7412 qla2x00_mark_all_devices_lost(vha); 7413 7414 spin_lock_irqsave(&ha->vport_slock, flags); 7415 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { 7416 atomic_inc(&vp->vref_count); 7417 spin_unlock_irqrestore(&ha->vport_slock, flags); 7418 7419 qla2x00_mark_all_devices_lost(vp); 7420 7421 spin_lock_irqsave(&ha->vport_slock, flags); 7422 atomic_dec(&vp->vref_count); 7423 } 7424 spin_unlock_irqrestore(&ha->vport_slock, flags); 7425 } else { 7426 if (!atomic_read(&vha->loop_down_timer)) 7427 atomic_set(&vha->loop_down_timer, 7428 LOOP_DOWN_TIME); 7429 } 7430 7431 /* Clear all async request states across all VPs. */ 7432 list_for_each_entry(fcport, &vha->vp_fcports, list) { 7433 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 7434 fcport->scan_state = 0; 7435 } 7436 spin_lock_irqsave(&ha->vport_slock, flags); 7437 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { 7438 atomic_inc(&vp->vref_count); 7439 spin_unlock_irqrestore(&ha->vport_slock, flags); 7440 7441 list_for_each_entry(fcport, &vp->vp_fcports, list) 7442 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 7443 7444 spin_lock_irqsave(&ha->vport_slock, flags); 7445 atomic_dec(&vp->vref_count); 7446 } 7447 spin_unlock_irqrestore(&ha->vport_slock, flags); 7448 7449 /* Make sure for ISP 82XX IO DMA is complete */ 7450 if (IS_P3P_TYPE(ha)) { 7451 qla82xx_chip_reset_cleanup(vha); 7452 ql_log(ql_log_info, vha, 0x00b4, 7453 "Done chip reset cleanup.\n"); 7454 7455 /* Done waiting for pending commands. Reset online flag */ 7456 vha->flags.online = 0; 7457 } 7458 7459 /* Requeue all commands in outstanding command list. */ 7460 qla2x00_abort_all_cmds(vha, DID_RESET << 16); 7461 /* memory barrier */ 7462 wmb(); 7463 } 7464 7465 /* 7466 * qla2x00_abort_isp 7467 * Resets ISP and aborts all outstanding commands. 7468 * 7469 * Input: 7470 * ha = adapter block pointer. 7471 * 7472 * Returns: 7473 * 0 = success 7474 */ 7475 int 7476 qla2x00_abort_isp(scsi_qla_host_t *vha) 7477 { 7478 int rval; 7479 uint8_t status = 0; 7480 struct qla_hw_data *ha = vha->hw; 7481 struct scsi_qla_host *vp, *tvp; 7482 struct req_que *req = ha->req_q_map[0]; 7483 unsigned long flags; 7484 7485 if (vha->flags.online) { 7486 qla2x00_abort_isp_cleanup(vha); 7487 7488 vha->dport_status |= DPORT_DIAG_CHIP_RESET_IN_PROGRESS; 7489 vha->dport_status &= ~DPORT_DIAG_IN_PROGRESS; 7490 7491 if (vha->hw->flags.port_isolated) 7492 return status; 7493 7494 if (qla2x00_isp_reg_stat(ha)) { 7495 ql_log(ql_log_info, vha, 0x803f, 7496 "ISP Abort - ISP reg disconnect, exiting.\n"); 7497 return status; 7498 } 7499 7500 if (test_and_clear_bit(ISP_ABORT_TO_ROM, &vha->dpc_flags)) { 7501 ha->flags.chip_reset_done = 1; 7502 vha->flags.online = 1; 7503 status = 0; 7504 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 7505 return status; 7506 } 7507 7508 if (IS_QLA8031(ha)) { 7509 ql_dbg(ql_dbg_p3p, vha, 0xb05c, 7510 "Clearing fcoe driver presence.\n"); 7511 if (qla83xx_clear_drv_presence(vha) != QLA_SUCCESS) 7512 ql_dbg(ql_dbg_p3p, vha, 0xb073, 7513 "Error while clearing DRV-Presence.\n"); 7514 } 7515 7516 if (unlikely(pci_channel_offline(ha->pdev) && 7517 ha->flags.pci_channel_io_perm_failure)) { 7518 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 7519 status = 0; 7520 return status; 7521 } 7522 7523 switch (vha->qlini_mode) { 7524 case QLA2XXX_INI_MODE_DISABLED: 7525 if (!qla_tgt_mode_enabled(vha)) 7526 return 0; 7527 break; 7528 case QLA2XXX_INI_MODE_DUAL: 7529 if (!qla_dual_mode_enabled(vha) && 7530 !qla_ini_mode_enabled(vha)) 7531 return 0; 7532 break; 7533 case QLA2XXX_INI_MODE_ENABLED: 7534 default: 7535 break; 7536 } 7537 7538 ha->isp_ops->get_flash_version(vha, req->ring); 7539 7540 if (qla2x00_isp_reg_stat(ha)) { 7541 ql_log(ql_log_info, vha, 0x803f, 7542 "ISP Abort - ISP reg disconnect pre nvram config, exiting.\n"); 7543 return status; 7544 } 7545 ha->isp_ops->nvram_config(vha); 7546 7547 if (qla2x00_isp_reg_stat(ha)) { 7548 ql_log(ql_log_info, vha, 0x803f, 7549 "ISP Abort - ISP reg disconnect post nvmram config, exiting.\n"); 7550 return status; 7551 } 7552 if (!qla2x00_restart_isp(vha)) { 7553 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 7554 7555 if (!atomic_read(&vha->loop_down_timer)) { 7556 /* 7557 * Issue marker command only when we are going 7558 * to start the I/O . 7559 */ 7560 vha->marker_needed = 1; 7561 } 7562 7563 vha->flags.online = 1; 7564 7565 ha->isp_ops->enable_intrs(ha); 7566 7567 ha->isp_abort_cnt = 0; 7568 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 7569 7570 if (IS_QLA81XX(ha) || IS_QLA8031(ha)) 7571 qla2x00_get_fw_version(vha); 7572 if (ha->fce) { 7573 ha->flags.fce_enabled = 1; 7574 memset(ha->fce, 0, 7575 fce_calc_size(ha->fce_bufs)); 7576 rval = qla2x00_enable_fce_trace(vha, 7577 ha->fce_dma, ha->fce_bufs, ha->fce_mb, 7578 &ha->fce_bufs); 7579 if (rval) { 7580 ql_log(ql_log_warn, vha, 0x8033, 7581 "Unable to reinitialize FCE " 7582 "(%d).\n", rval); 7583 ha->flags.fce_enabled = 0; 7584 } 7585 } 7586 7587 if (ha->eft) { 7588 memset(ha->eft, 0, EFT_SIZE); 7589 rval = qla2x00_enable_eft_trace(vha, 7590 ha->eft_dma, EFT_NUM_BUFFERS); 7591 if (rval) { 7592 ql_log(ql_log_warn, vha, 0x8034, 7593 "Unable to reinitialize EFT " 7594 "(%d).\n", rval); 7595 } 7596 } 7597 } else { /* failed the ISP abort */ 7598 vha->flags.online = 1; 7599 if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { 7600 if (ha->isp_abort_cnt == 0) { 7601 ql_log(ql_log_fatal, vha, 0x8035, 7602 "ISP error recover failed - " 7603 "board disabled.\n"); 7604 /* 7605 * The next call disables the board 7606 * completely. 7607 */ 7608 qla2x00_abort_isp_cleanup(vha); 7609 vha->flags.online = 0; 7610 clear_bit(ISP_ABORT_RETRY, 7611 &vha->dpc_flags); 7612 status = 0; 7613 } else { /* schedule another ISP abort */ 7614 ha->isp_abort_cnt--; 7615 ql_dbg(ql_dbg_taskm, vha, 0x8020, 7616 "ISP abort - retry remaining %d.\n", 7617 ha->isp_abort_cnt); 7618 status = 1; 7619 } 7620 } else { 7621 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT; 7622 ql_dbg(ql_dbg_taskm, vha, 0x8021, 7623 "ISP error recovery - retrying (%d) " 7624 "more times.\n", ha->isp_abort_cnt); 7625 set_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 7626 status = 1; 7627 } 7628 } 7629 7630 } 7631 7632 if (vha->hw->flags.port_isolated) { 7633 qla2x00_abort_isp_cleanup(vha); 7634 return status; 7635 } 7636 7637 if (!status) { 7638 ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__); 7639 qla2x00_configure_hba(vha); 7640 spin_lock_irqsave(&ha->vport_slock, flags); 7641 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { 7642 if (vp->vp_idx) { 7643 atomic_inc(&vp->vref_count); 7644 spin_unlock_irqrestore(&ha->vport_slock, flags); 7645 7646 qla2x00_vp_abort_isp(vp); 7647 7648 spin_lock_irqsave(&ha->vport_slock, flags); 7649 atomic_dec(&vp->vref_count); 7650 } 7651 } 7652 spin_unlock_irqrestore(&ha->vport_slock, flags); 7653 7654 if (IS_QLA8031(ha)) { 7655 ql_dbg(ql_dbg_p3p, vha, 0xb05d, 7656 "Setting back fcoe driver presence.\n"); 7657 if (qla83xx_set_drv_presence(vha) != QLA_SUCCESS) 7658 ql_dbg(ql_dbg_p3p, vha, 0xb074, 7659 "Error while setting DRV-Presence.\n"); 7660 } 7661 } else { 7662 ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n", 7663 __func__); 7664 } 7665 7666 return(status); 7667 } 7668 7669 /* 7670 * qla2x00_restart_isp 7671 * restarts the ISP after a reset 7672 * 7673 * Input: 7674 * ha = adapter block pointer. 7675 * 7676 * Returns: 7677 * 0 = success 7678 */ 7679 static int 7680 qla2x00_restart_isp(scsi_qla_host_t *vha) 7681 { 7682 int status; 7683 struct qla_hw_data *ha = vha->hw; 7684 7685 /* If firmware needs to be loaded */ 7686 if (qla2x00_isp_firmware(vha)) { 7687 vha->flags.online = 0; 7688 status = ha->isp_ops->chip_diag(vha); 7689 if (status) 7690 return status; 7691 status = qla2x00_setup_chip(vha); 7692 if (status) 7693 return status; 7694 } 7695 7696 status = qla2x00_init_rings(vha); 7697 if (status) 7698 return status; 7699 7700 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 7701 ha->flags.chip_reset_done = 1; 7702 7703 /* Initialize the queues in use */ 7704 qla25xx_init_queues(ha); 7705 7706 status = qla2x00_fw_ready(vha); 7707 if (status) { 7708 /* if no cable then assume it's good */ 7709 return vha->device_flags & DFLG_NO_CABLE ? 0 : status; 7710 } 7711 7712 /* Issue a marker after FW becomes ready. */ 7713 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL); 7714 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 7715 7716 return 0; 7717 } 7718 7719 static int 7720 qla25xx_init_queues(struct qla_hw_data *ha) 7721 { 7722 struct rsp_que *rsp = NULL; 7723 struct req_que *req = NULL; 7724 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 7725 int ret = -1; 7726 int i; 7727 7728 for (i = 1; i < ha->max_rsp_queues; i++) { 7729 rsp = ha->rsp_q_map[i]; 7730 if (rsp && test_bit(i, ha->rsp_qid_map)) { 7731 rsp->options &= ~BIT_0; 7732 ret = qla25xx_init_rsp_que(base_vha, rsp); 7733 if (ret != QLA_SUCCESS) 7734 ql_dbg(ql_dbg_init, base_vha, 0x00ff, 7735 "%s Rsp que: %d init failed.\n", 7736 __func__, rsp->id); 7737 else 7738 ql_dbg(ql_dbg_init, base_vha, 0x0100, 7739 "%s Rsp que: %d inited.\n", 7740 __func__, rsp->id); 7741 } 7742 } 7743 for (i = 1; i < ha->max_req_queues; i++) { 7744 req = ha->req_q_map[i]; 7745 if (req && test_bit(i, ha->req_qid_map)) { 7746 /* Clear outstanding commands array. */ 7747 req->options &= ~BIT_0; 7748 ret = qla25xx_init_req_que(base_vha, req); 7749 if (ret != QLA_SUCCESS) 7750 ql_dbg(ql_dbg_init, base_vha, 0x0101, 7751 "%s Req que: %d init failed.\n", 7752 __func__, req->id); 7753 else 7754 ql_dbg(ql_dbg_init, base_vha, 0x0102, 7755 "%s Req que: %d inited.\n", 7756 __func__, req->id); 7757 } 7758 } 7759 return ret; 7760 } 7761 7762 /* 7763 * qla2x00_reset_adapter 7764 * Reset adapter. 7765 * 7766 * Input: 7767 * ha = adapter block pointer. 7768 */ 7769 int 7770 qla2x00_reset_adapter(scsi_qla_host_t *vha) 7771 { 7772 unsigned long flags = 0; 7773 struct qla_hw_data *ha = vha->hw; 7774 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 7775 7776 vha->flags.online = 0; 7777 ha->isp_ops->disable_intrs(ha); 7778 7779 spin_lock_irqsave(&ha->hardware_lock, flags); 7780 wrt_reg_word(®->hccr, HCCR_RESET_RISC); 7781 rd_reg_word(®->hccr); /* PCI Posting. */ 7782 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC); 7783 rd_reg_word(®->hccr); /* PCI Posting. */ 7784 spin_unlock_irqrestore(&ha->hardware_lock, flags); 7785 7786 return QLA_SUCCESS; 7787 } 7788 7789 int 7790 qla24xx_reset_adapter(scsi_qla_host_t *vha) 7791 { 7792 unsigned long flags = 0; 7793 struct qla_hw_data *ha = vha->hw; 7794 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 7795 7796 if (IS_P3P_TYPE(ha)) 7797 return QLA_SUCCESS; 7798 7799 vha->flags.online = 0; 7800 ha->isp_ops->disable_intrs(ha); 7801 7802 spin_lock_irqsave(&ha->hardware_lock, flags); 7803 wrt_reg_dword(®->hccr, HCCRX_SET_RISC_RESET); 7804 rd_reg_dword(®->hccr); 7805 wrt_reg_dword(®->hccr, HCCRX_REL_RISC_PAUSE); 7806 rd_reg_dword(®->hccr); 7807 spin_unlock_irqrestore(&ha->hardware_lock, flags); 7808 7809 if (IS_NOPOLLING_TYPE(ha)) 7810 ha->isp_ops->enable_intrs(ha); 7811 7812 return QLA_SUCCESS; 7813 } 7814 7815 /* On sparc systems, obtain port and node WWN from firmware 7816 * properties. 7817 */ 7818 static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, 7819 struct nvram_24xx *nv) 7820 { 7821 #ifdef CONFIG_SPARC 7822 struct qla_hw_data *ha = vha->hw; 7823 struct pci_dev *pdev = ha->pdev; 7824 struct device_node *dp = pci_device_to_OF_node(pdev); 7825 const u8 *val; 7826 int len; 7827 7828 val = of_get_property(dp, "port-wwn", &len); 7829 if (val && len >= WWN_SIZE) 7830 memcpy(nv->port_name, val, WWN_SIZE); 7831 7832 val = of_get_property(dp, "node-wwn", &len); 7833 if (val && len >= WWN_SIZE) 7834 memcpy(nv->node_name, val, WWN_SIZE); 7835 #endif 7836 } 7837 7838 int 7839 qla24xx_nvram_config(scsi_qla_host_t *vha) 7840 { 7841 int rval; 7842 struct init_cb_24xx *icb; 7843 struct nvram_24xx *nv; 7844 __le32 *dptr; 7845 uint8_t *dptr1, *dptr2; 7846 uint32_t chksum; 7847 uint16_t cnt; 7848 struct qla_hw_data *ha = vha->hw; 7849 7850 rval = QLA_SUCCESS; 7851 icb = (struct init_cb_24xx *)ha->init_cb; 7852 nv = ha->nvram; 7853 7854 /* Determine NVRAM starting address. */ 7855 if (ha->port_no == 0) { 7856 ha->nvram_base = FA_NVRAM_FUNC0_ADDR; 7857 ha->vpd_base = FA_NVRAM_VPD0_ADDR; 7858 } else { 7859 ha->nvram_base = FA_NVRAM_FUNC1_ADDR; 7860 ha->vpd_base = FA_NVRAM_VPD1_ADDR; 7861 } 7862 7863 ha->nvram_size = sizeof(*nv); 7864 ha->vpd_size = FA_NVRAM_VPD_SIZE; 7865 7866 /* Get VPD data into cache */ 7867 ha->vpd = ha->nvram + VPD_OFFSET; 7868 ha->isp_ops->read_nvram(vha, ha->vpd, 7869 ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4); 7870 7871 /* Get NVRAM data into cache and calculate checksum. */ 7872 dptr = (__force __le32 *)nv; 7873 ha->isp_ops->read_nvram(vha, dptr, ha->nvram_base, ha->nvram_size); 7874 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++) 7875 chksum += le32_to_cpu(*dptr); 7876 7877 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a, 7878 "Contents of NVRAM\n"); 7879 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d, 7880 nv, ha->nvram_size); 7881 7882 /* Bad NVRAM data, set defaults parameters. */ 7883 if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) || 7884 le16_to_cpu(nv->nvram_version) < ICB_VERSION) { 7885 /* Reset NVRAM data. */ 7886 ql_log(ql_log_warn, vha, 0x006b, 7887 "Inconsistent NVRAM checksum=%#x id=%.4s version=%#x.\n", 7888 chksum, nv->id, nv->nvram_version); 7889 ql_dump_buffer(ql_dbg_init, vha, 0x006b, nv, sizeof(*nv)); 7890 ql_log(ql_log_warn, vha, 0x006c, 7891 "Falling back to functioning (yet invalid -- WWPN) " 7892 "defaults.\n"); 7893 7894 /* 7895 * Set default initialization control block. 7896 */ 7897 memset(nv, 0, ha->nvram_size); 7898 nv->nvram_version = cpu_to_le16(ICB_VERSION); 7899 nv->version = cpu_to_le16(ICB_VERSION); 7900 nv->frame_payload_size = cpu_to_le16(2048); 7901 nv->execution_throttle = cpu_to_le16(0xFFFF); 7902 nv->exchange_count = cpu_to_le16(0); 7903 nv->hard_address = cpu_to_le16(124); 7904 nv->port_name[0] = 0x21; 7905 nv->port_name[1] = 0x00 + ha->port_no + 1; 7906 nv->port_name[2] = 0x00; 7907 nv->port_name[3] = 0xe0; 7908 nv->port_name[4] = 0x8b; 7909 nv->port_name[5] = 0x1c; 7910 nv->port_name[6] = 0x55; 7911 nv->port_name[7] = 0x86; 7912 nv->node_name[0] = 0x20; 7913 nv->node_name[1] = 0x00; 7914 nv->node_name[2] = 0x00; 7915 nv->node_name[3] = 0xe0; 7916 nv->node_name[4] = 0x8b; 7917 nv->node_name[5] = 0x1c; 7918 nv->node_name[6] = 0x55; 7919 nv->node_name[7] = 0x86; 7920 qla24xx_nvram_wwn_from_ofw(vha, nv); 7921 nv->login_retry_count = cpu_to_le16(8); 7922 nv->interrupt_delay_timer = cpu_to_le16(0); 7923 nv->login_timeout = cpu_to_le16(0); 7924 nv->firmware_options_1 = 7925 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); 7926 nv->firmware_options_2 = cpu_to_le32(2 << 4); 7927 nv->firmware_options_2 |= cpu_to_le32(BIT_12); 7928 nv->firmware_options_3 = cpu_to_le32(2 << 13); 7929 nv->host_p = cpu_to_le32(BIT_11|BIT_10); 7930 nv->efi_parameters = cpu_to_le32(0); 7931 nv->reset_delay = 5; 7932 nv->max_luns_per_target = cpu_to_le16(128); 7933 nv->port_down_retry_count = cpu_to_le16(30); 7934 nv->link_down_timeout = cpu_to_le16(30); 7935 7936 rval = 1; 7937 } 7938 7939 if (qla_tgt_mode_enabled(vha)) { 7940 /* Don't enable full login after initial LIP */ 7941 nv->firmware_options_1 &= cpu_to_le32(~BIT_13); 7942 /* Don't enable LIP full login for initiator */ 7943 nv->host_p &= cpu_to_le32(~BIT_10); 7944 } 7945 7946 qlt_24xx_config_nvram_stage1(vha, nv); 7947 7948 /* Reset Initialization control block */ 7949 memset(icb, 0, ha->init_cb_size); 7950 7951 /* Copy 1st segment. */ 7952 dptr1 = (uint8_t *)icb; 7953 dptr2 = (uint8_t *)&nv->version; 7954 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; 7955 while (cnt--) 7956 *dptr1++ = *dptr2++; 7957 7958 icb->login_retry_count = nv->login_retry_count; 7959 icb->link_down_on_nos = nv->link_down_on_nos; 7960 7961 /* Copy 2nd segment. */ 7962 dptr1 = (uint8_t *)&icb->interrupt_delay_timer; 7963 dptr2 = (uint8_t *)&nv->interrupt_delay_timer; 7964 cnt = (uint8_t *)&icb->reserved_3 - 7965 (uint8_t *)&icb->interrupt_delay_timer; 7966 while (cnt--) 7967 *dptr1++ = *dptr2++; 7968 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size); 7969 /* 7970 * Setup driver NVRAM options. 7971 */ 7972 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), 7973 "QLA2462"); 7974 7975 qlt_24xx_config_nvram_stage2(vha, icb); 7976 7977 if (nv->host_p & cpu_to_le32(BIT_15)) { 7978 /* Use alternate WWN? */ 7979 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 7980 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 7981 } 7982 7983 /* Prepare nodename */ 7984 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) { 7985 /* 7986 * Firmware will apply the following mask if the nodename was 7987 * not provided. 7988 */ 7989 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 7990 icb->node_name[0] &= 0xF0; 7991 } 7992 7993 /* Set host adapter parameters. */ 7994 ha->flags.disable_risc_code_load = 0; 7995 ha->flags.enable_lip_reset = 0; 7996 ha->flags.enable_lip_full_login = 7997 le32_to_cpu(nv->host_p) & BIT_10 ? 1 : 0; 7998 ha->flags.enable_target_reset = 7999 le32_to_cpu(nv->host_p) & BIT_11 ? 1 : 0; 8000 ha->flags.enable_led_scheme = 0; 8001 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1 : 0; 8002 8003 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & 8004 (BIT_6 | BIT_5 | BIT_4)) >> 4; 8005 8006 memcpy(ha->fw_seriallink_options24, nv->seriallink_options, 8007 sizeof(ha->fw_seriallink_options24)); 8008 8009 /* save HBA serial number */ 8010 ha->serial0 = icb->port_name[5]; 8011 ha->serial1 = icb->port_name[6]; 8012 ha->serial2 = icb->port_name[7]; 8013 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 8014 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 8015 8016 icb->execution_throttle = cpu_to_le16(0xFFFF); 8017 8018 ha->retry_count = le16_to_cpu(nv->login_retry_count); 8019 8020 /* Set minimum login_timeout to 4 seconds. */ 8021 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) 8022 nv->login_timeout = cpu_to_le16(ql2xlogintimeout); 8023 if (le16_to_cpu(nv->login_timeout) < 4) 8024 nv->login_timeout = cpu_to_le16(4); 8025 ha->login_timeout = le16_to_cpu(nv->login_timeout); 8026 8027 /* Set minimum RATOV to 100 tenths of a second. */ 8028 ha->r_a_tov = 100; 8029 8030 ha->loop_reset_delay = nv->reset_delay; 8031 8032 /* Link Down Timeout = 0: 8033 * 8034 * When Port Down timer expires we will start returning 8035 * I/O's to OS with "DID_NO_CONNECT". 8036 * 8037 * Link Down Timeout != 0: 8038 * 8039 * The driver waits for the link to come up after link down 8040 * before returning I/Os to OS with "DID_NO_CONNECT". 8041 */ 8042 if (le16_to_cpu(nv->link_down_timeout) == 0) { 8043 ha->loop_down_abort_time = 8044 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 8045 } else { 8046 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); 8047 ha->loop_down_abort_time = 8048 (LOOP_DOWN_TIME - ha->link_down_timeout); 8049 } 8050 8051 /* Need enough time to try and get the port back. */ 8052 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); 8053 if (qlport_down_retry) 8054 ha->port_down_retry_count = qlport_down_retry; 8055 8056 /* Set login_retry_count */ 8057 ha->login_retry_count = le16_to_cpu(nv->login_retry_count); 8058 if (ha->port_down_retry_count == 8059 le16_to_cpu(nv->port_down_retry_count) && 8060 ha->port_down_retry_count > 3) 8061 ha->login_retry_count = ha->port_down_retry_count; 8062 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 8063 ha->login_retry_count = ha->port_down_retry_count; 8064 if (ql2xloginretrycount) 8065 ha->login_retry_count = ql2xloginretrycount; 8066 8067 /* N2N: driver will initiate Login instead of FW */ 8068 icb->firmware_options_3 |= cpu_to_le32(BIT_8); 8069 8070 /* Enable ZIO. */ 8071 if (!vha->flags.init_done) { 8072 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & 8073 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 8074 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? 8075 le16_to_cpu(icb->interrupt_delay_timer) : 2; 8076 } 8077 icb->firmware_options_2 &= cpu_to_le32( 8078 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); 8079 if (ha->zio_mode != QLA_ZIO_DISABLED) { 8080 ha->zio_mode = QLA_ZIO_MODE_6; 8081 8082 ql_log(ql_log_info, vha, 0x006f, 8083 "ZIO mode %d enabled; timer delay (%d us).\n", 8084 ha->zio_mode, ha->zio_timer * 100); 8085 8086 icb->firmware_options_2 |= cpu_to_le32( 8087 (uint32_t)ha->zio_mode); 8088 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); 8089 } 8090 8091 if (rval) { 8092 ql_log(ql_log_warn, vha, 0x0070, 8093 "NVRAM configuration failed.\n"); 8094 } 8095 return (rval); 8096 } 8097 8098 static void 8099 qla27xx_print_image(struct scsi_qla_host *vha, char *name, 8100 struct qla27xx_image_status *image_status) 8101 { 8102 ql_dbg(ql_dbg_init, vha, 0x018b, 8103 "%s %s: mask=%#02x gen=%#04x ver=%u.%u map=%#01x sum=%#08x sig=%#08x\n", 8104 name, "status", 8105 image_status->image_status_mask, 8106 le16_to_cpu(image_status->generation), 8107 image_status->ver_major, 8108 image_status->ver_minor, 8109 image_status->bitmap, 8110 le32_to_cpu(image_status->checksum), 8111 le32_to_cpu(image_status->signature)); 8112 } 8113 8114 static bool 8115 qla28xx_check_aux_image_status_signature( 8116 struct qla27xx_image_status *image_status) 8117 { 8118 ulong signature = le32_to_cpu(image_status->signature); 8119 8120 return signature != QLA28XX_AUX_IMG_STATUS_SIGN; 8121 } 8122 8123 static bool 8124 qla27xx_check_image_status_signature(struct qla27xx_image_status *image_status) 8125 { 8126 ulong signature = le32_to_cpu(image_status->signature); 8127 8128 return 8129 signature != QLA27XX_IMG_STATUS_SIGN && 8130 signature != QLA28XX_IMG_STATUS_SIGN; 8131 } 8132 8133 static ulong 8134 qla27xx_image_status_checksum(struct qla27xx_image_status *image_status) 8135 { 8136 __le32 *p = (__force __le32 *)image_status; 8137 uint n = sizeof(*image_status) / sizeof(*p); 8138 uint32_t sum = 0; 8139 8140 for ( ; n--; p++) 8141 sum += le32_to_cpup(p); 8142 8143 return sum; 8144 } 8145 8146 static inline uint 8147 qla28xx_component_bitmask(struct qla27xx_image_status *aux, uint bitmask) 8148 { 8149 return aux->bitmap & bitmask ? 8150 QLA27XX_SECONDARY_IMAGE : QLA27XX_PRIMARY_IMAGE; 8151 } 8152 8153 static void 8154 qla28xx_component_status( 8155 struct active_regions *active_regions, struct qla27xx_image_status *aux) 8156 { 8157 active_regions->aux.board_config = 8158 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_BOARD_CONFIG); 8159 8160 active_regions->aux.vpd_nvram = 8161 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_VPD_NVRAM); 8162 8163 active_regions->aux.npiv_config_0_1 = 8164 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_NPIV_CONFIG_0_1); 8165 8166 active_regions->aux.npiv_config_2_3 = 8167 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_NPIV_CONFIG_2_3); 8168 8169 active_regions->aux.nvme_params = 8170 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_NVME_PARAMS); 8171 } 8172 8173 static int 8174 qla27xx_compare_image_generation( 8175 struct qla27xx_image_status *pri_image_status, 8176 struct qla27xx_image_status *sec_image_status) 8177 { 8178 /* calculate generation delta as uint16 (this accounts for wrap) */ 8179 int16_t delta = 8180 le16_to_cpu(pri_image_status->generation) - 8181 le16_to_cpu(sec_image_status->generation); 8182 8183 ql_dbg(ql_dbg_init, NULL, 0x0180, "generation delta = %d\n", delta); 8184 8185 return delta; 8186 } 8187 8188 void 8189 qla28xx_get_aux_images( 8190 struct scsi_qla_host *vha, struct active_regions *active_regions) 8191 { 8192 struct qla_hw_data *ha = vha->hw; 8193 struct qla27xx_image_status pri_aux_image_status, sec_aux_image_status; 8194 bool valid_pri_image = false, valid_sec_image = false; 8195 bool active_pri_image = false, active_sec_image = false; 8196 8197 if (!ha->flt_region_aux_img_status_pri) { 8198 ql_dbg(ql_dbg_init, vha, 0x018a, "Primary aux image not addressed\n"); 8199 goto check_sec_image; 8200 } 8201 8202 qla24xx_read_flash_data(vha, (uint32_t *)&pri_aux_image_status, 8203 ha->flt_region_aux_img_status_pri, 8204 sizeof(pri_aux_image_status) >> 2); 8205 qla27xx_print_image(vha, "Primary aux image", &pri_aux_image_status); 8206 8207 if (qla28xx_check_aux_image_status_signature(&pri_aux_image_status)) { 8208 ql_dbg(ql_dbg_init, vha, 0x018b, 8209 "Primary aux image signature (%#x) not valid\n", 8210 le32_to_cpu(pri_aux_image_status.signature)); 8211 goto check_sec_image; 8212 } 8213 8214 if (qla27xx_image_status_checksum(&pri_aux_image_status)) { 8215 ql_dbg(ql_dbg_init, vha, 0x018c, 8216 "Primary aux image checksum failed\n"); 8217 goto check_sec_image; 8218 } 8219 8220 valid_pri_image = true; 8221 8222 if (pri_aux_image_status.image_status_mask & 1) { 8223 ql_dbg(ql_dbg_init, vha, 0x018d, 8224 "Primary aux image is active\n"); 8225 active_pri_image = true; 8226 } 8227 8228 check_sec_image: 8229 if (!ha->flt_region_aux_img_status_sec) { 8230 ql_dbg(ql_dbg_init, vha, 0x018a, 8231 "Secondary aux image not addressed\n"); 8232 goto check_valid_image; 8233 } 8234 8235 qla24xx_read_flash_data(vha, (uint32_t *)&sec_aux_image_status, 8236 ha->flt_region_aux_img_status_sec, 8237 sizeof(sec_aux_image_status) >> 2); 8238 qla27xx_print_image(vha, "Secondary aux image", &sec_aux_image_status); 8239 8240 if (qla28xx_check_aux_image_status_signature(&sec_aux_image_status)) { 8241 ql_dbg(ql_dbg_init, vha, 0x018b, 8242 "Secondary aux image signature (%#x) not valid\n", 8243 le32_to_cpu(sec_aux_image_status.signature)); 8244 goto check_valid_image; 8245 } 8246 8247 if (qla27xx_image_status_checksum(&sec_aux_image_status)) { 8248 ql_dbg(ql_dbg_init, vha, 0x018c, 8249 "Secondary aux image checksum failed\n"); 8250 goto check_valid_image; 8251 } 8252 8253 valid_sec_image = true; 8254 8255 if (sec_aux_image_status.image_status_mask & 1) { 8256 ql_dbg(ql_dbg_init, vha, 0x018d, 8257 "Secondary aux image is active\n"); 8258 active_sec_image = true; 8259 } 8260 8261 check_valid_image: 8262 if (valid_pri_image && active_pri_image && 8263 valid_sec_image && active_sec_image) { 8264 if (qla27xx_compare_image_generation(&pri_aux_image_status, 8265 &sec_aux_image_status) >= 0) { 8266 qla28xx_component_status(active_regions, 8267 &pri_aux_image_status); 8268 } else { 8269 qla28xx_component_status(active_regions, 8270 &sec_aux_image_status); 8271 } 8272 } else if (valid_pri_image && active_pri_image) { 8273 qla28xx_component_status(active_regions, &pri_aux_image_status); 8274 } else if (valid_sec_image && active_sec_image) { 8275 qla28xx_component_status(active_regions, &sec_aux_image_status); 8276 } 8277 8278 ql_dbg(ql_dbg_init, vha, 0x018f, 8279 "aux images active: BCFG=%u VPD/NVR=%u NPIV0/1=%u NPIV2/3=%u, NVME=%u\n", 8280 active_regions->aux.board_config, 8281 active_regions->aux.vpd_nvram, 8282 active_regions->aux.npiv_config_0_1, 8283 active_regions->aux.npiv_config_2_3, 8284 active_regions->aux.nvme_params); 8285 } 8286 8287 void 8288 qla27xx_get_active_image(struct scsi_qla_host *vha, 8289 struct active_regions *active_regions) 8290 { 8291 struct qla_hw_data *ha = vha->hw; 8292 struct qla27xx_image_status pri_image_status, sec_image_status; 8293 bool valid_pri_image = false, valid_sec_image = false; 8294 bool active_pri_image = false, active_sec_image = false; 8295 8296 if (!ha->flt_region_img_status_pri) { 8297 ql_dbg(ql_dbg_init, vha, 0x018a, "Primary image not addressed\n"); 8298 goto check_sec_image; 8299 } 8300 8301 if (qla24xx_read_flash_data(vha, (uint32_t *)&pri_image_status, 8302 ha->flt_region_img_status_pri, sizeof(pri_image_status) >> 2) != 8303 QLA_SUCCESS) { 8304 WARN_ON_ONCE(true); 8305 goto check_sec_image; 8306 } 8307 qla27xx_print_image(vha, "Primary image", &pri_image_status); 8308 8309 if (qla27xx_check_image_status_signature(&pri_image_status)) { 8310 ql_dbg(ql_dbg_init, vha, 0x018b, 8311 "Primary image signature (%#x) not valid\n", 8312 le32_to_cpu(pri_image_status.signature)); 8313 goto check_sec_image; 8314 } 8315 8316 if (qla27xx_image_status_checksum(&pri_image_status)) { 8317 ql_dbg(ql_dbg_init, vha, 0x018c, 8318 "Primary image checksum failed\n"); 8319 goto check_sec_image; 8320 } 8321 8322 valid_pri_image = true; 8323 8324 if (pri_image_status.image_status_mask & 1) { 8325 ql_dbg(ql_dbg_init, vha, 0x018d, 8326 "Primary image is active\n"); 8327 active_pri_image = true; 8328 } 8329 8330 check_sec_image: 8331 if (!ha->flt_region_img_status_sec) { 8332 ql_dbg(ql_dbg_init, vha, 0x018a, "Secondary image not addressed\n"); 8333 goto check_valid_image; 8334 } 8335 8336 qla24xx_read_flash_data(vha, (uint32_t *)(&sec_image_status), 8337 ha->flt_region_img_status_sec, sizeof(sec_image_status) >> 2); 8338 qla27xx_print_image(vha, "Secondary image", &sec_image_status); 8339 8340 if (qla27xx_check_image_status_signature(&sec_image_status)) { 8341 ql_dbg(ql_dbg_init, vha, 0x018b, 8342 "Secondary image signature (%#x) not valid\n", 8343 le32_to_cpu(sec_image_status.signature)); 8344 goto check_valid_image; 8345 } 8346 8347 if (qla27xx_image_status_checksum(&sec_image_status)) { 8348 ql_dbg(ql_dbg_init, vha, 0x018c, 8349 "Secondary image checksum failed\n"); 8350 goto check_valid_image; 8351 } 8352 8353 valid_sec_image = true; 8354 8355 if (sec_image_status.image_status_mask & 1) { 8356 ql_dbg(ql_dbg_init, vha, 0x018d, 8357 "Secondary image is active\n"); 8358 active_sec_image = true; 8359 } 8360 8361 check_valid_image: 8362 if (valid_pri_image && active_pri_image) 8363 active_regions->global = QLA27XX_PRIMARY_IMAGE; 8364 8365 if (valid_sec_image && active_sec_image) { 8366 if (!active_regions->global || 8367 qla27xx_compare_image_generation( 8368 &pri_image_status, &sec_image_status) < 0) { 8369 active_regions->global = QLA27XX_SECONDARY_IMAGE; 8370 } 8371 } 8372 8373 ql_dbg(ql_dbg_init, vha, 0x018f, "active image %s (%u)\n", 8374 active_regions->global == QLA27XX_DEFAULT_IMAGE ? 8375 "default (boot/fw)" : 8376 active_regions->global == QLA27XX_PRIMARY_IMAGE ? 8377 "primary" : 8378 active_regions->global == QLA27XX_SECONDARY_IMAGE ? 8379 "secondary" : "invalid", 8380 active_regions->global); 8381 } 8382 8383 bool qla24xx_risc_firmware_invalid(uint32_t *dword) 8384 { 8385 return 8386 !(dword[4] | dword[5] | dword[6] | dword[7]) || 8387 !(~dword[4] | ~dword[5] | ~dword[6] | ~dword[7]); 8388 } 8389 8390 static int 8391 qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr, 8392 uint32_t faddr) 8393 { 8394 int rval; 8395 uint templates, segments, fragment; 8396 ulong i; 8397 uint j; 8398 ulong dlen; 8399 uint32_t *dcode; 8400 uint32_t risc_addr, risc_size, risc_attr = 0; 8401 struct qla_hw_data *ha = vha->hw; 8402 struct req_que *req = ha->req_q_map[0]; 8403 struct fwdt *fwdt = ha->fwdt; 8404 8405 ql_dbg(ql_dbg_init, vha, 0x008b, 8406 "FW: Loading firmware from flash (%x).\n", faddr); 8407 8408 dcode = (uint32_t *)req->ring; 8409 qla24xx_read_flash_data(vha, dcode, faddr, 8); 8410 if (qla24xx_risc_firmware_invalid(dcode)) { 8411 ql_log(ql_log_fatal, vha, 0x008c, 8412 "Unable to verify the integrity of flash firmware " 8413 "image.\n"); 8414 ql_log(ql_log_fatal, vha, 0x008d, 8415 "Firmware data: %08x %08x %08x %08x.\n", 8416 dcode[0], dcode[1], dcode[2], dcode[3]); 8417 8418 return QLA_FUNCTION_FAILED; 8419 } 8420 8421 dcode = (uint32_t *)req->ring; 8422 *srisc_addr = 0; 8423 segments = FA_RISC_CODE_SEGMENTS; 8424 for (j = 0; j < segments; j++) { 8425 ql_dbg(ql_dbg_init, vha, 0x008d, 8426 "-> Loading segment %u...\n", j); 8427 qla24xx_read_flash_data(vha, dcode, faddr, 10); 8428 risc_addr = be32_to_cpu((__force __be32)dcode[2]); 8429 risc_size = be32_to_cpu((__force __be32)dcode[3]); 8430 if (!*srisc_addr) { 8431 *srisc_addr = risc_addr; 8432 risc_attr = be32_to_cpu((__force __be32)dcode[9]); 8433 } 8434 8435 dlen = ha->fw_transfer_size >> 2; 8436 for (fragment = 0; risc_size; fragment++) { 8437 if (dlen > risc_size) 8438 dlen = risc_size; 8439 8440 ql_dbg(ql_dbg_init, vha, 0x008e, 8441 "-> Loading fragment %u: %#x <- %#x (%#lx dwords)...\n", 8442 fragment, risc_addr, faddr, dlen); 8443 qla24xx_read_flash_data(vha, dcode, faddr, dlen); 8444 for (i = 0; i < dlen; i++) 8445 dcode[i] = swab32(dcode[i]); 8446 8447 rval = qla2x00_load_ram(vha, req->dma, risc_addr, dlen); 8448 if (rval) { 8449 ql_log(ql_log_fatal, vha, 0x008f, 8450 "-> Failed load firmware fragment %u.\n", 8451 fragment); 8452 return QLA_FUNCTION_FAILED; 8453 } 8454 8455 faddr += dlen; 8456 risc_addr += dlen; 8457 risc_size -= dlen; 8458 } 8459 } 8460 8461 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha)) 8462 return QLA_SUCCESS; 8463 8464 templates = (risc_attr & BIT_9) ? 2 : 1; 8465 ql_dbg(ql_dbg_init, vha, 0x0160, "-> templates = %u\n", templates); 8466 for (j = 0; j < templates; j++, fwdt++) { 8467 vfree(fwdt->template); 8468 fwdt->template = NULL; 8469 fwdt->length = 0; 8470 8471 dcode = (uint32_t *)req->ring; 8472 qla24xx_read_flash_data(vha, dcode, faddr, 7); 8473 risc_size = be32_to_cpu((__force __be32)dcode[2]); 8474 ql_dbg(ql_dbg_init, vha, 0x0161, 8475 "-> fwdt%u template array at %#x (%#x dwords)\n", 8476 j, faddr, risc_size); 8477 if (!risc_size || !~risc_size) { 8478 ql_dbg(ql_dbg_init, vha, 0x0162, 8479 "-> fwdt%u failed to read array\n", j); 8480 goto failed; 8481 } 8482 8483 /* skip header and ignore checksum */ 8484 faddr += 7; 8485 risc_size -= 8; 8486 8487 ql_dbg(ql_dbg_init, vha, 0x0163, 8488 "-> fwdt%u template allocate template %#x words...\n", 8489 j, risc_size); 8490 fwdt->template = vmalloc_array(risc_size, sizeof(*dcode)); 8491 if (!fwdt->template) { 8492 ql_log(ql_log_warn, vha, 0x0164, 8493 "-> fwdt%u failed allocate template.\n", j); 8494 goto failed; 8495 } 8496 8497 dcode = fwdt->template; 8498 qla24xx_read_flash_data(vha, dcode, faddr, risc_size); 8499 8500 if (!qla27xx_fwdt_template_valid(dcode)) { 8501 ql_log(ql_log_warn, vha, 0x0165, 8502 "-> fwdt%u failed template validate\n", j); 8503 goto failed; 8504 } 8505 8506 dlen = qla27xx_fwdt_template_size(dcode); 8507 ql_dbg(ql_dbg_init, vha, 0x0166, 8508 "-> fwdt%u template size %#lx bytes (%#lx words)\n", 8509 j, dlen, dlen / sizeof(*dcode)); 8510 if (dlen > risc_size * sizeof(*dcode)) { 8511 ql_log(ql_log_warn, vha, 0x0167, 8512 "-> fwdt%u template exceeds array (%-lu bytes)\n", 8513 j, dlen - risc_size * sizeof(*dcode)); 8514 goto failed; 8515 } 8516 8517 fwdt->length = dlen; 8518 ql_dbg(ql_dbg_init, vha, 0x0168, 8519 "-> fwdt%u loaded template ok\n", j); 8520 8521 faddr += risc_size + 1; 8522 } 8523 8524 return QLA_SUCCESS; 8525 8526 failed: 8527 vfree(fwdt->template); 8528 fwdt->template = NULL; 8529 fwdt->length = 0; 8530 8531 return QLA_SUCCESS; 8532 } 8533 8534 #define QLA_FW_URL "http://ldriver.qlogic.com/firmware/" 8535 8536 int 8537 qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 8538 { 8539 int rval; 8540 int i, fragment; 8541 uint16_t *wcode; 8542 __be16 *fwcode; 8543 uint32_t risc_addr, risc_size, fwclen, wlen, *seg; 8544 struct fw_blob *blob; 8545 struct qla_hw_data *ha = vha->hw; 8546 struct req_que *req = ha->req_q_map[0]; 8547 8548 /* Load firmware blob. */ 8549 blob = qla2x00_request_firmware(vha); 8550 if (!blob) { 8551 ql_log(ql_log_info, vha, 0x0083, 8552 "Firmware image unavailable.\n"); 8553 ql_log(ql_log_info, vha, 0x0084, 8554 "Firmware images can be retrieved from: "QLA_FW_URL ".\n"); 8555 return QLA_FUNCTION_FAILED; 8556 } 8557 8558 rval = QLA_SUCCESS; 8559 8560 wcode = (uint16_t *)req->ring; 8561 *srisc_addr = 0; 8562 fwcode = (__force __be16 *)blob->fw->data; 8563 fwclen = 0; 8564 8565 /* Validate firmware image by checking version. */ 8566 if (blob->fw->size < 8 * sizeof(uint16_t)) { 8567 ql_log(ql_log_fatal, vha, 0x0085, 8568 "Unable to verify integrity of firmware image (%zd).\n", 8569 blob->fw->size); 8570 goto fail_fw_integrity; 8571 } 8572 for (i = 0; i < 4; i++) 8573 wcode[i] = be16_to_cpu(fwcode[i + 4]); 8574 if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff && 8575 wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 && 8576 wcode[2] == 0 && wcode[3] == 0)) { 8577 ql_log(ql_log_fatal, vha, 0x0086, 8578 "Unable to verify integrity of firmware image.\n"); 8579 ql_log(ql_log_fatal, vha, 0x0087, 8580 "Firmware data: %04x %04x %04x %04x.\n", 8581 wcode[0], wcode[1], wcode[2], wcode[3]); 8582 goto fail_fw_integrity; 8583 } 8584 8585 seg = blob->segs; 8586 while (*seg && rval == QLA_SUCCESS) { 8587 risc_addr = *seg; 8588 *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr; 8589 risc_size = be16_to_cpu(fwcode[3]); 8590 8591 /* Validate firmware image size. */ 8592 fwclen += risc_size * sizeof(uint16_t); 8593 if (blob->fw->size < fwclen) { 8594 ql_log(ql_log_fatal, vha, 0x0088, 8595 "Unable to verify integrity of firmware image " 8596 "(%zd).\n", blob->fw->size); 8597 goto fail_fw_integrity; 8598 } 8599 8600 fragment = 0; 8601 while (risc_size > 0 && rval == QLA_SUCCESS) { 8602 wlen = (uint16_t)(ha->fw_transfer_size >> 1); 8603 if (wlen > risc_size) 8604 wlen = risc_size; 8605 ql_dbg(ql_dbg_init, vha, 0x0089, 8606 "Loading risc segment@ risc addr %x number of " 8607 "words 0x%x.\n", risc_addr, wlen); 8608 8609 for (i = 0; i < wlen; i++) 8610 wcode[i] = swab16((__force u32)fwcode[i]); 8611 8612 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 8613 wlen); 8614 if (rval) { 8615 ql_log(ql_log_fatal, vha, 0x008a, 8616 "Failed to load segment %d of firmware.\n", 8617 fragment); 8618 break; 8619 } 8620 8621 fwcode += wlen; 8622 risc_addr += wlen; 8623 risc_size -= wlen; 8624 fragment++; 8625 } 8626 8627 /* Next segment. */ 8628 seg++; 8629 } 8630 return rval; 8631 8632 fail_fw_integrity: 8633 return QLA_FUNCTION_FAILED; 8634 } 8635 8636 static int 8637 qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr) 8638 { 8639 int rval; 8640 uint templates, segments, fragment; 8641 uint32_t *dcode; 8642 ulong dlen; 8643 uint32_t risc_addr, risc_size, risc_attr = 0; 8644 ulong i; 8645 uint j; 8646 struct fw_blob *blob; 8647 __be32 *fwcode; 8648 struct qla_hw_data *ha = vha->hw; 8649 struct req_que *req = ha->req_q_map[0]; 8650 struct fwdt *fwdt = ha->fwdt; 8651 8652 ql_dbg(ql_dbg_init, vha, 0x0090, 8653 "-> FW: Loading via request-firmware.\n"); 8654 8655 blob = qla2x00_request_firmware(vha); 8656 if (!blob) { 8657 ql_log(ql_log_warn, vha, 0x0092, 8658 "-> Firmware file not found.\n"); 8659 8660 return QLA_FUNCTION_FAILED; 8661 } 8662 8663 fwcode = (__force __be32 *)blob->fw->data; 8664 dcode = (__force uint32_t *)fwcode; 8665 if (qla24xx_risc_firmware_invalid(dcode)) { 8666 ql_log(ql_log_fatal, vha, 0x0093, 8667 "Unable to verify integrity of firmware image (%zd).\n", 8668 blob->fw->size); 8669 ql_log(ql_log_fatal, vha, 0x0095, 8670 "Firmware data: %08x %08x %08x %08x.\n", 8671 dcode[0], dcode[1], dcode[2], dcode[3]); 8672 return QLA_FUNCTION_FAILED; 8673 } 8674 8675 dcode = (uint32_t *)req->ring; 8676 *srisc_addr = 0; 8677 segments = FA_RISC_CODE_SEGMENTS; 8678 for (j = 0; j < segments; j++) { 8679 ql_dbg(ql_dbg_init, vha, 0x0096, 8680 "-> Loading segment %u...\n", j); 8681 risc_addr = be32_to_cpu(fwcode[2]); 8682 risc_size = be32_to_cpu(fwcode[3]); 8683 8684 if (!*srisc_addr) { 8685 *srisc_addr = risc_addr; 8686 risc_attr = be32_to_cpu(fwcode[9]); 8687 } 8688 8689 dlen = ha->fw_transfer_size >> 2; 8690 for (fragment = 0; risc_size; fragment++) { 8691 if (dlen > risc_size) 8692 dlen = risc_size; 8693 8694 ql_dbg(ql_dbg_init, vha, 0x0097, 8695 "-> Loading fragment %u: %#x <- %#x (%#lx words)...\n", 8696 fragment, risc_addr, 8697 (uint32_t)(fwcode - (typeof(fwcode))blob->fw->data), 8698 dlen); 8699 8700 for (i = 0; i < dlen; i++) 8701 dcode[i] = swab32((__force u32)fwcode[i]); 8702 8703 rval = qla2x00_load_ram(vha, req->dma, risc_addr, dlen); 8704 if (rval) { 8705 ql_log(ql_log_fatal, vha, 0x0098, 8706 "-> Failed load firmware fragment %u.\n", 8707 fragment); 8708 return QLA_FUNCTION_FAILED; 8709 } 8710 8711 fwcode += dlen; 8712 risc_addr += dlen; 8713 risc_size -= dlen; 8714 } 8715 } 8716 8717 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha)) 8718 return QLA_SUCCESS; 8719 8720 templates = (risc_attr & BIT_9) ? 2 : 1; 8721 ql_dbg(ql_dbg_init, vha, 0x0170, "-> templates = %u\n", templates); 8722 for (j = 0; j < templates; j++, fwdt++) { 8723 vfree(fwdt->template); 8724 fwdt->template = NULL; 8725 fwdt->length = 0; 8726 8727 risc_size = be32_to_cpu(fwcode[2]); 8728 ql_dbg(ql_dbg_init, vha, 0x0171, 8729 "-> fwdt%u template array at %#x (%#x dwords)\n", 8730 j, (uint32_t)((void *)fwcode - (void *)blob->fw->data), 8731 risc_size); 8732 if (!risc_size || !~risc_size) { 8733 ql_dbg(ql_dbg_init, vha, 0x0172, 8734 "-> fwdt%u failed to read array\n", j); 8735 goto failed; 8736 } 8737 8738 /* skip header and ignore checksum */ 8739 fwcode += 7; 8740 risc_size -= 8; 8741 8742 ql_dbg(ql_dbg_init, vha, 0x0173, 8743 "-> fwdt%u template allocate template %#x words...\n", 8744 j, risc_size); 8745 fwdt->template = vmalloc_array(risc_size, sizeof(*dcode)); 8746 if (!fwdt->template) { 8747 ql_log(ql_log_warn, vha, 0x0174, 8748 "-> fwdt%u failed allocate template.\n", j); 8749 goto failed; 8750 } 8751 8752 dcode = fwdt->template; 8753 for (i = 0; i < risc_size; i++) 8754 dcode[i] = (__force u32)fwcode[i]; 8755 8756 if (!qla27xx_fwdt_template_valid(dcode)) { 8757 ql_log(ql_log_warn, vha, 0x0175, 8758 "-> fwdt%u failed template validate\n", j); 8759 goto failed; 8760 } 8761 8762 dlen = qla27xx_fwdt_template_size(dcode); 8763 ql_dbg(ql_dbg_init, vha, 0x0176, 8764 "-> fwdt%u template size %#lx bytes (%#lx words)\n", 8765 j, dlen, dlen / sizeof(*dcode)); 8766 if (dlen > risc_size * sizeof(*dcode)) { 8767 ql_log(ql_log_warn, vha, 0x0177, 8768 "-> fwdt%u template exceeds array (%-lu bytes)\n", 8769 j, dlen - risc_size * sizeof(*dcode)); 8770 goto failed; 8771 } 8772 8773 fwdt->length = dlen; 8774 ql_dbg(ql_dbg_init, vha, 0x0178, 8775 "-> fwdt%u loaded template ok\n", j); 8776 8777 fwcode += risc_size + 1; 8778 } 8779 8780 return QLA_SUCCESS; 8781 8782 failed: 8783 vfree(fwdt->template); 8784 fwdt->template = NULL; 8785 fwdt->length = 0; 8786 8787 return QLA_SUCCESS; 8788 } 8789 8790 int 8791 qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 8792 { 8793 int rval; 8794 8795 if (ql2xfwloadbin == 1) 8796 return qla81xx_load_risc(vha, srisc_addr); 8797 8798 /* 8799 * FW Load priority: 8800 * 1) Firmware via request-firmware interface (.bin file). 8801 * 2) Firmware residing in flash. 8802 */ 8803 rval = qla24xx_load_risc_blob(vha, srisc_addr); 8804 if (rval == QLA_SUCCESS) 8805 return rval; 8806 8807 return qla24xx_load_risc_flash(vha, srisc_addr, 8808 vha->hw->flt_region_fw); 8809 } 8810 8811 int 8812 qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 8813 { 8814 int rval; 8815 struct qla_hw_data *ha = vha->hw; 8816 struct active_regions active_regions = { }; 8817 8818 if (ql2xfwloadbin == 2) 8819 goto try_blob_fw; 8820 8821 /* FW Load priority: 8822 * 1) Firmware residing in flash. 8823 * 2) Firmware via request-firmware interface (.bin file). 8824 * 3) Golden-Firmware residing in flash -- (limited operation). 8825 */ 8826 8827 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha)) 8828 goto try_primary_fw; 8829 8830 qla27xx_get_active_image(vha, &active_regions); 8831 8832 if (active_regions.global != QLA27XX_SECONDARY_IMAGE) 8833 goto try_primary_fw; 8834 8835 ql_dbg(ql_dbg_init, vha, 0x008b, 8836 "Loading secondary firmware image.\n"); 8837 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw_sec); 8838 if (!rval) 8839 return rval; 8840 8841 try_primary_fw: 8842 ql_dbg(ql_dbg_init, vha, 0x008b, 8843 "Loading primary firmware image.\n"); 8844 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw); 8845 if (!rval) 8846 return rval; 8847 8848 try_blob_fw: 8849 rval = qla24xx_load_risc_blob(vha, srisc_addr); 8850 if (!rval || !ha->flt_region_gold_fw) 8851 return rval; 8852 8853 ql_log(ql_log_info, vha, 0x0099, 8854 "Attempting to fallback to golden firmware.\n"); 8855 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw); 8856 if (rval) 8857 return rval; 8858 8859 ql_log(ql_log_info, vha, 0x009a, "Need firmware flash update.\n"); 8860 ha->flags.running_gold_fw = 1; 8861 return rval; 8862 } 8863 8864 void 8865 qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha) 8866 { 8867 int ret, retries; 8868 struct qla_hw_data *ha = vha->hw; 8869 8870 if (ha->flags.pci_channel_io_perm_failure) 8871 return; 8872 if (!IS_FWI2_CAPABLE(ha)) 8873 return; 8874 if (!ha->fw_major_version) 8875 return; 8876 if (!ha->flags.fw_started) 8877 return; 8878 8879 ret = qla2x00_stop_firmware(vha); 8880 for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT && 8881 ret != QLA_INVALID_COMMAND && retries ; retries--) { 8882 ha->isp_ops->reset_chip(vha); 8883 if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS) 8884 continue; 8885 if (qla2x00_setup_chip(vha) != QLA_SUCCESS) 8886 continue; 8887 ql_log(ql_log_info, vha, 0x8015, 8888 "Attempting retry of stop-firmware command.\n"); 8889 ret = qla2x00_stop_firmware(vha); 8890 } 8891 8892 QLA_FW_STOPPED(ha); 8893 ha->flags.fw_init_done = 0; 8894 } 8895 8896 int 8897 qla24xx_configure_vhba(scsi_qla_host_t *vha) 8898 { 8899 int rval = QLA_SUCCESS; 8900 int rval2; 8901 uint16_t mb[MAILBOX_REGISTER_COUNT]; 8902 struct qla_hw_data *ha = vha->hw; 8903 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 8904 8905 if (!vha->vp_idx) 8906 return -EINVAL; 8907 8908 rval = qla2x00_fw_ready(base_vha); 8909 8910 if (rval == QLA_SUCCESS) { 8911 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 8912 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL); 8913 } 8914 8915 vha->flags.management_server_logged_in = 0; 8916 8917 /* Login to SNS first */ 8918 rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, 8919 BIT_1); 8920 if (rval2 != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) { 8921 if (rval2 == QLA_MEMORY_ALLOC_FAILED) 8922 ql_dbg(ql_dbg_init, vha, 0x0120, 8923 "Failed SNS login: loop_id=%x, rval2=%d\n", 8924 NPH_SNS, rval2); 8925 else 8926 ql_dbg(ql_dbg_init, vha, 0x0103, 8927 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x " 8928 "mb[2]=%x mb[6]=%x mb[7]=%x.\n", 8929 NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]); 8930 return (QLA_FUNCTION_FAILED); 8931 } 8932 8933 atomic_set(&vha->loop_down_timer, 0); 8934 atomic_set(&vha->loop_state, LOOP_UP); 8935 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 8936 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 8937 rval = qla2x00_loop_resync(base_vha); 8938 8939 return rval; 8940 } 8941 8942 /* 84XX Support **************************************************************/ 8943 8944 static LIST_HEAD(qla_cs84xx_list); 8945 static DEFINE_MUTEX(qla_cs84xx_mutex); 8946 8947 static struct qla_chip_state_84xx * 8948 qla84xx_get_chip(struct scsi_qla_host *vha) 8949 { 8950 struct qla_chip_state_84xx *cs84xx; 8951 struct qla_hw_data *ha = vha->hw; 8952 8953 mutex_lock(&qla_cs84xx_mutex); 8954 8955 /* Find any shared 84xx chip. */ 8956 list_for_each_entry(cs84xx, &qla_cs84xx_list, list) { 8957 if (cs84xx->bus == ha->pdev->bus) { 8958 kref_get(&cs84xx->kref); 8959 goto done; 8960 } 8961 } 8962 8963 cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL); 8964 if (!cs84xx) 8965 goto done; 8966 8967 kref_init(&cs84xx->kref); 8968 spin_lock_init(&cs84xx->access_lock); 8969 mutex_init(&cs84xx->fw_update_mutex); 8970 cs84xx->bus = ha->pdev->bus; 8971 8972 list_add_tail(&cs84xx->list, &qla_cs84xx_list); 8973 done: 8974 mutex_unlock(&qla_cs84xx_mutex); 8975 return cs84xx; 8976 } 8977 8978 static void 8979 __qla84xx_chip_release(struct kref *kref) 8980 { 8981 struct qla_chip_state_84xx *cs84xx = 8982 container_of(kref, struct qla_chip_state_84xx, kref); 8983 8984 mutex_lock(&qla_cs84xx_mutex); 8985 list_del(&cs84xx->list); 8986 mutex_unlock(&qla_cs84xx_mutex); 8987 kfree(cs84xx); 8988 } 8989 8990 void 8991 qla84xx_put_chip(struct scsi_qla_host *vha) 8992 { 8993 struct qla_hw_data *ha = vha->hw; 8994 8995 if (ha->cs84xx) 8996 kref_put(&ha->cs84xx->kref, __qla84xx_chip_release); 8997 } 8998 8999 static int 9000 qla84xx_init_chip(scsi_qla_host_t *vha) 9001 { 9002 int rval; 9003 uint16_t status[2]; 9004 struct qla_hw_data *ha = vha->hw; 9005 9006 mutex_lock(&ha->cs84xx->fw_update_mutex); 9007 9008 rval = qla84xx_verify_chip(vha, status); 9009 9010 mutex_unlock(&ha->cs84xx->fw_update_mutex); 9011 9012 return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED : 9013 QLA_SUCCESS; 9014 } 9015 9016 /* 81XX Support **************************************************************/ 9017 9018 int 9019 qla81xx_nvram_config(scsi_qla_host_t *vha) 9020 { 9021 int rval; 9022 struct init_cb_81xx *icb; 9023 struct nvram_81xx *nv; 9024 __le32 *dptr; 9025 uint8_t *dptr1, *dptr2; 9026 uint32_t chksum; 9027 uint16_t cnt; 9028 struct qla_hw_data *ha = vha->hw; 9029 uint32_t faddr; 9030 struct active_regions active_regions = { }; 9031 9032 rval = QLA_SUCCESS; 9033 icb = (struct init_cb_81xx *)ha->init_cb; 9034 nv = ha->nvram; 9035 9036 /* Determine NVRAM starting address. */ 9037 ha->nvram_size = sizeof(*nv); 9038 ha->vpd_size = FA_NVRAM_VPD_SIZE; 9039 if (IS_P3P_TYPE(ha) || IS_QLA8031(ha)) 9040 ha->vpd_size = FA_VPD_SIZE_82XX; 9041 9042 if (IS_QLA28XX(ha) || IS_QLA27XX(ha)) 9043 qla28xx_get_aux_images(vha, &active_regions); 9044 9045 /* Get VPD data into cache */ 9046 ha->vpd = ha->nvram + VPD_OFFSET; 9047 9048 faddr = ha->flt_region_vpd; 9049 if (IS_QLA28XX(ha)) { 9050 if (active_regions.aux.vpd_nvram == QLA27XX_SECONDARY_IMAGE) 9051 faddr = ha->flt_region_vpd_sec; 9052 ql_dbg(ql_dbg_init, vha, 0x0110, 9053 "Loading %s nvram image.\n", 9054 active_regions.aux.vpd_nvram == QLA27XX_PRIMARY_IMAGE ? 9055 "primary" : "secondary"); 9056 } 9057 ha->isp_ops->read_optrom(vha, ha->vpd, faddr << 2, ha->vpd_size); 9058 9059 /* Get NVRAM data into cache and calculate checksum. */ 9060 faddr = ha->flt_region_nvram; 9061 if (IS_QLA28XX(ha)) { 9062 if (active_regions.aux.vpd_nvram == QLA27XX_SECONDARY_IMAGE) 9063 faddr = ha->flt_region_nvram_sec; 9064 } 9065 ql_dbg(ql_dbg_init, vha, 0x0110, 9066 "Loading %s nvram image.\n", 9067 active_regions.aux.vpd_nvram == QLA27XX_PRIMARY_IMAGE ? 9068 "primary" : "secondary"); 9069 ha->isp_ops->read_optrom(vha, ha->nvram, faddr << 2, ha->nvram_size); 9070 9071 dptr = (__force __le32 *)nv; 9072 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++) 9073 chksum += le32_to_cpu(*dptr); 9074 9075 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111, 9076 "Contents of NVRAM:\n"); 9077 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112, 9078 nv, ha->nvram_size); 9079 9080 /* Bad NVRAM data, set defaults parameters. */ 9081 if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) || 9082 le16_to_cpu(nv->nvram_version) < ICB_VERSION) { 9083 /* Reset NVRAM data. */ 9084 ql_log(ql_log_info, vha, 0x0073, 9085 "Inconsistent NVRAM checksum=%#x id=%.4s version=%#x.\n", 9086 chksum, nv->id, le16_to_cpu(nv->nvram_version)); 9087 ql_dump_buffer(ql_dbg_init, vha, 0x0073, nv, sizeof(*nv)); 9088 ql_log(ql_log_info, vha, 0x0074, 9089 "Falling back to functioning (yet invalid -- WWPN) " 9090 "defaults.\n"); 9091 9092 /* 9093 * Set default initialization control block. 9094 */ 9095 memset(nv, 0, ha->nvram_size); 9096 nv->nvram_version = cpu_to_le16(ICB_VERSION); 9097 nv->version = cpu_to_le16(ICB_VERSION); 9098 nv->frame_payload_size = cpu_to_le16(2048); 9099 nv->execution_throttle = cpu_to_le16(0xFFFF); 9100 nv->exchange_count = cpu_to_le16(0); 9101 nv->port_name[0] = 0x21; 9102 nv->port_name[1] = 0x00 + ha->port_no + 1; 9103 nv->port_name[2] = 0x00; 9104 nv->port_name[3] = 0xe0; 9105 nv->port_name[4] = 0x8b; 9106 nv->port_name[5] = 0x1c; 9107 nv->port_name[6] = 0x55; 9108 nv->port_name[7] = 0x86; 9109 nv->node_name[0] = 0x20; 9110 nv->node_name[1] = 0x00; 9111 nv->node_name[2] = 0x00; 9112 nv->node_name[3] = 0xe0; 9113 nv->node_name[4] = 0x8b; 9114 nv->node_name[5] = 0x1c; 9115 nv->node_name[6] = 0x55; 9116 nv->node_name[7] = 0x86; 9117 nv->login_retry_count = cpu_to_le16(8); 9118 nv->interrupt_delay_timer = cpu_to_le16(0); 9119 nv->login_timeout = cpu_to_le16(0); 9120 nv->firmware_options_1 = 9121 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); 9122 nv->firmware_options_2 = cpu_to_le32(2 << 4); 9123 nv->firmware_options_2 |= cpu_to_le32(BIT_12); 9124 nv->firmware_options_3 = cpu_to_le32(2 << 13); 9125 nv->host_p = cpu_to_le32(BIT_11|BIT_10); 9126 nv->efi_parameters = cpu_to_le32(0); 9127 nv->reset_delay = 5; 9128 nv->max_luns_per_target = cpu_to_le16(128); 9129 nv->port_down_retry_count = cpu_to_le16(30); 9130 nv->link_down_timeout = cpu_to_le16(180); 9131 nv->enode_mac[0] = 0x00; 9132 nv->enode_mac[1] = 0xC0; 9133 nv->enode_mac[2] = 0xDD; 9134 nv->enode_mac[3] = 0x04; 9135 nv->enode_mac[4] = 0x05; 9136 nv->enode_mac[5] = 0x06 + ha->port_no + 1; 9137 9138 rval = 1; 9139 } 9140 9141 if (IS_T10_PI_CAPABLE(ha)) 9142 nv->frame_payload_size &= cpu_to_le16(~7); 9143 9144 qlt_81xx_config_nvram_stage1(vha, nv); 9145 9146 /* Reset Initialization control block */ 9147 memset(icb, 0, ha->init_cb_size); 9148 9149 /* Copy 1st segment. */ 9150 dptr1 = (uint8_t *)icb; 9151 dptr2 = (uint8_t *)&nv->version; 9152 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; 9153 while (cnt--) 9154 *dptr1++ = *dptr2++; 9155 9156 icb->login_retry_count = nv->login_retry_count; 9157 9158 /* Copy 2nd segment. */ 9159 dptr1 = (uint8_t *)&icb->interrupt_delay_timer; 9160 dptr2 = (uint8_t *)&nv->interrupt_delay_timer; 9161 cnt = (uint8_t *)&icb->reserved_5 - 9162 (uint8_t *)&icb->interrupt_delay_timer; 9163 while (cnt--) 9164 *dptr1++ = *dptr2++; 9165 9166 memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac)); 9167 /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */ 9168 if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) { 9169 icb->enode_mac[0] = 0x00; 9170 icb->enode_mac[1] = 0xC0; 9171 icb->enode_mac[2] = 0xDD; 9172 icb->enode_mac[3] = 0x04; 9173 icb->enode_mac[4] = 0x05; 9174 icb->enode_mac[5] = 0x06 + ha->port_no + 1; 9175 } 9176 9177 /* Use extended-initialization control block. */ 9178 memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb)); 9179 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size); 9180 /* 9181 * Setup driver NVRAM options. 9182 */ 9183 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), 9184 "QLE8XXX"); 9185 9186 qlt_81xx_config_nvram_stage2(vha, icb); 9187 9188 /* Use alternate WWN? */ 9189 if (nv->host_p & cpu_to_le32(BIT_15)) { 9190 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 9191 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 9192 } 9193 9194 /* Prepare nodename */ 9195 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) { 9196 /* 9197 * Firmware will apply the following mask if the nodename was 9198 * not provided. 9199 */ 9200 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 9201 icb->node_name[0] &= 0xF0; 9202 } 9203 9204 if (IS_QLA28XX(ha) || IS_QLA27XX(ha)) { 9205 if ((nv->enhanced_features & BIT_7) == 0) 9206 ha->flags.scm_supported_a = 1; 9207 } 9208 9209 /* Set host adapter parameters. */ 9210 ha->flags.disable_risc_code_load = 0; 9211 ha->flags.enable_lip_reset = 0; 9212 ha->flags.enable_lip_full_login = 9213 le32_to_cpu(nv->host_p) & BIT_10 ? 1 : 0; 9214 ha->flags.enable_target_reset = 9215 le32_to_cpu(nv->host_p) & BIT_11 ? 1 : 0; 9216 ha->flags.enable_led_scheme = 0; 9217 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1 : 0; 9218 9219 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & 9220 (BIT_6 | BIT_5 | BIT_4)) >> 4; 9221 9222 /* save HBA serial number */ 9223 ha->serial0 = icb->port_name[5]; 9224 ha->serial1 = icb->port_name[6]; 9225 ha->serial2 = icb->port_name[7]; 9226 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 9227 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 9228 9229 icb->execution_throttle = cpu_to_le16(0xFFFF); 9230 9231 ha->retry_count = le16_to_cpu(nv->login_retry_count); 9232 9233 /* Set minimum login_timeout to 4 seconds. */ 9234 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) 9235 nv->login_timeout = cpu_to_le16(ql2xlogintimeout); 9236 if (le16_to_cpu(nv->login_timeout) < 4) 9237 nv->login_timeout = cpu_to_le16(4); 9238 ha->login_timeout = le16_to_cpu(nv->login_timeout); 9239 9240 /* Set minimum RATOV to 100 tenths of a second. */ 9241 ha->r_a_tov = 100; 9242 9243 ha->loop_reset_delay = nv->reset_delay; 9244 9245 /* Link Down Timeout = 0: 9246 * 9247 * When Port Down timer expires we will start returning 9248 * I/O's to OS with "DID_NO_CONNECT". 9249 * 9250 * Link Down Timeout != 0: 9251 * 9252 * The driver waits for the link to come up after link down 9253 * before returning I/Os to OS with "DID_NO_CONNECT". 9254 */ 9255 if (le16_to_cpu(nv->link_down_timeout) == 0) { 9256 ha->loop_down_abort_time = 9257 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 9258 } else { 9259 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); 9260 ha->loop_down_abort_time = 9261 (LOOP_DOWN_TIME - ha->link_down_timeout); 9262 } 9263 9264 /* Need enough time to try and get the port back. */ 9265 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); 9266 if (qlport_down_retry) 9267 ha->port_down_retry_count = qlport_down_retry; 9268 9269 /* Set login_retry_count */ 9270 ha->login_retry_count = le16_to_cpu(nv->login_retry_count); 9271 if (ha->port_down_retry_count == 9272 le16_to_cpu(nv->port_down_retry_count) && 9273 ha->port_down_retry_count > 3) 9274 ha->login_retry_count = ha->port_down_retry_count; 9275 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 9276 ha->login_retry_count = ha->port_down_retry_count; 9277 if (ql2xloginretrycount) 9278 ha->login_retry_count = ql2xloginretrycount; 9279 9280 /* if not running MSI-X we need handshaking on interrupts */ 9281 if (!vha->hw->flags.msix_enabled && 9282 (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))) 9283 icb->firmware_options_2 |= cpu_to_le32(BIT_22); 9284 9285 /* Enable ZIO. */ 9286 if (!vha->flags.init_done) { 9287 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & 9288 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 9289 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? 9290 le16_to_cpu(icb->interrupt_delay_timer) : 2; 9291 } 9292 icb->firmware_options_2 &= cpu_to_le32( 9293 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); 9294 vha->flags.process_response_queue = 0; 9295 if (ha->zio_mode != QLA_ZIO_DISABLED) { 9296 ha->zio_mode = QLA_ZIO_MODE_6; 9297 9298 ql_log(ql_log_info, vha, 0x0075, 9299 "ZIO mode %d enabled; timer delay (%d us).\n", 9300 ha->zio_mode, 9301 ha->zio_timer * 100); 9302 9303 icb->firmware_options_2 |= cpu_to_le32( 9304 (uint32_t)ha->zio_mode); 9305 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); 9306 vha->flags.process_response_queue = 1; 9307 } 9308 9309 /* enable RIDA Format2 */ 9310 icb->firmware_options_3 |= cpu_to_le32(BIT_0); 9311 9312 /* N2N: driver will initiate Login instead of FW */ 9313 icb->firmware_options_3 |= cpu_to_le32(BIT_8); 9314 9315 /* Determine NVMe/FCP priority for target ports */ 9316 ha->fc4_type_priority = qla2xxx_get_fc4_priority(vha); 9317 9318 if (rval) { 9319 ql_log(ql_log_warn, vha, 0x0076, 9320 "NVRAM configuration failed.\n"); 9321 } 9322 return (rval); 9323 } 9324 9325 int 9326 qla82xx_restart_isp(scsi_qla_host_t *vha) 9327 { 9328 int status, rval; 9329 struct qla_hw_data *ha = vha->hw; 9330 struct scsi_qla_host *vp, *tvp; 9331 unsigned long flags; 9332 9333 status = qla2x00_init_rings(vha); 9334 if (!status) { 9335 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 9336 ha->flags.chip_reset_done = 1; 9337 9338 status = qla2x00_fw_ready(vha); 9339 if (!status) { 9340 /* Issue a marker after FW becomes ready. */ 9341 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL); 9342 vha->flags.online = 1; 9343 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 9344 } 9345 9346 /* if no cable then assume it's good */ 9347 if ((vha->device_flags & DFLG_NO_CABLE)) 9348 status = 0; 9349 } 9350 9351 if (!status) { 9352 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 9353 9354 if (!atomic_read(&vha->loop_down_timer)) { 9355 /* 9356 * Issue marker command only when we are going 9357 * to start the I/O . 9358 */ 9359 vha->marker_needed = 1; 9360 } 9361 9362 ha->isp_ops->enable_intrs(ha); 9363 9364 ha->isp_abort_cnt = 0; 9365 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 9366 9367 /* Update the firmware version */ 9368 status = qla82xx_check_md_needed(vha); 9369 9370 if (ha->fce) { 9371 ha->flags.fce_enabled = 1; 9372 memset(ha->fce, 0, 9373 fce_calc_size(ha->fce_bufs)); 9374 rval = qla2x00_enable_fce_trace(vha, 9375 ha->fce_dma, ha->fce_bufs, ha->fce_mb, 9376 &ha->fce_bufs); 9377 if (rval) { 9378 ql_log(ql_log_warn, vha, 0x8001, 9379 "Unable to reinitialize FCE (%d).\n", 9380 rval); 9381 ha->flags.fce_enabled = 0; 9382 } 9383 } 9384 9385 if (ha->eft) { 9386 memset(ha->eft, 0, EFT_SIZE); 9387 rval = qla2x00_enable_eft_trace(vha, 9388 ha->eft_dma, EFT_NUM_BUFFERS); 9389 if (rval) { 9390 ql_log(ql_log_warn, vha, 0x8010, 9391 "Unable to reinitialize EFT (%d).\n", 9392 rval); 9393 } 9394 } 9395 } 9396 9397 if (!status) { 9398 ql_dbg(ql_dbg_taskm, vha, 0x8011, 9399 "qla82xx_restart_isp succeeded.\n"); 9400 9401 spin_lock_irqsave(&ha->vport_slock, flags); 9402 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { 9403 if (vp->vp_idx) { 9404 atomic_inc(&vp->vref_count); 9405 spin_unlock_irqrestore(&ha->vport_slock, flags); 9406 9407 qla2x00_vp_abort_isp(vp); 9408 9409 spin_lock_irqsave(&ha->vport_slock, flags); 9410 atomic_dec(&vp->vref_count); 9411 } 9412 } 9413 spin_unlock_irqrestore(&ha->vport_slock, flags); 9414 9415 } else { 9416 ql_log(ql_log_warn, vha, 0x8016, 9417 "qla82xx_restart_isp **** FAILED ****.\n"); 9418 } 9419 9420 return status; 9421 } 9422 9423 /* 9424 * qla24xx_get_fcp_prio 9425 * Gets the fcp cmd priority value for the logged in port. 9426 * Looks for a match of the port descriptors within 9427 * each of the fcp prio config entries. If a match is found, 9428 * the tag (priority) value is returned. 9429 * 9430 * Input: 9431 * vha = scsi host structure pointer. 9432 * fcport = port structure pointer. 9433 * 9434 * Return: 9435 * non-zero (if found) 9436 * -1 (if not found) 9437 * 9438 * Context: 9439 * Kernel context 9440 */ 9441 static int 9442 qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) 9443 { 9444 int i, entries; 9445 uint8_t pid_match, wwn_match; 9446 int priority; 9447 uint32_t pid1, pid2; 9448 uint64_t wwn1, wwn2; 9449 struct qla_fcp_prio_entry *pri_entry; 9450 struct qla_hw_data *ha = vha->hw; 9451 9452 if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled) 9453 return -1; 9454 9455 priority = -1; 9456 entries = ha->fcp_prio_cfg->num_entries; 9457 pri_entry = &ha->fcp_prio_cfg->entry[0]; 9458 9459 for (i = 0; i < entries; i++) { 9460 pid_match = wwn_match = 0; 9461 9462 if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) { 9463 pri_entry++; 9464 continue; 9465 } 9466 9467 /* check source pid for a match */ 9468 if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) { 9469 pid1 = pri_entry->src_pid & INVALID_PORT_ID; 9470 pid2 = vha->d_id.b24 & INVALID_PORT_ID; 9471 if (pid1 == INVALID_PORT_ID) 9472 pid_match++; 9473 else if (pid1 == pid2) 9474 pid_match++; 9475 } 9476 9477 /* check destination pid for a match */ 9478 if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) { 9479 pid1 = pri_entry->dst_pid & INVALID_PORT_ID; 9480 pid2 = fcport->d_id.b24 & INVALID_PORT_ID; 9481 if (pid1 == INVALID_PORT_ID) 9482 pid_match++; 9483 else if (pid1 == pid2) 9484 pid_match++; 9485 } 9486 9487 /* check source WWN for a match */ 9488 if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) { 9489 wwn1 = wwn_to_u64(vha->port_name); 9490 wwn2 = wwn_to_u64(pri_entry->src_wwpn); 9491 if (wwn2 == (uint64_t)-1) 9492 wwn_match++; 9493 else if (wwn1 == wwn2) 9494 wwn_match++; 9495 } 9496 9497 /* check destination WWN for a match */ 9498 if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) { 9499 wwn1 = wwn_to_u64(fcport->port_name); 9500 wwn2 = wwn_to_u64(pri_entry->dst_wwpn); 9501 if (wwn2 == (uint64_t)-1) 9502 wwn_match++; 9503 else if (wwn1 == wwn2) 9504 wwn_match++; 9505 } 9506 9507 if (pid_match == 2 || wwn_match == 2) { 9508 /* Found a matching entry */ 9509 if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID) 9510 priority = pri_entry->tag; 9511 break; 9512 } 9513 9514 pri_entry++; 9515 } 9516 9517 return priority; 9518 } 9519 9520 /* 9521 * qla24xx_update_fcport_fcp_prio 9522 * Activates fcp priority for the logged in fc port 9523 * 9524 * Input: 9525 * vha = scsi host structure pointer. 9526 * fcp = port structure pointer. 9527 * 9528 * Return: 9529 * QLA_SUCCESS or QLA_FUNCTION_FAILED 9530 * 9531 * Context: 9532 * Kernel context. 9533 */ 9534 int 9535 qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) 9536 { 9537 int ret; 9538 int priority; 9539 uint16_t mb[5]; 9540 9541 if (fcport->port_type != FCT_TARGET || 9542 fcport->loop_id == FC_NO_LOOP_ID) 9543 return QLA_FUNCTION_FAILED; 9544 9545 priority = qla24xx_get_fcp_prio(vha, fcport); 9546 if (priority < 0) 9547 return QLA_FUNCTION_FAILED; 9548 9549 if (IS_P3P_TYPE(vha->hw)) { 9550 fcport->fcp_prio = priority & 0xf; 9551 return QLA_SUCCESS; 9552 } 9553 9554 ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb); 9555 if (ret == QLA_SUCCESS) { 9556 if (fcport->fcp_prio != priority) 9557 ql_dbg(ql_dbg_user, vha, 0x709e, 9558 "Updated FCP_CMND priority - value=%d loop_id=%d " 9559 "port_id=%02x%02x%02x.\n", priority, 9560 fcport->loop_id, fcport->d_id.b.domain, 9561 fcport->d_id.b.area, fcport->d_id.b.al_pa); 9562 fcport->fcp_prio = priority & 0xf; 9563 } else 9564 ql_dbg(ql_dbg_user, vha, 0x704f, 9565 "Unable to update FCP_CMND priority - ret=0x%x for " 9566 "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id, 9567 fcport->d_id.b.domain, fcport->d_id.b.area, 9568 fcport->d_id.b.al_pa); 9569 return ret; 9570 } 9571 9572 /* 9573 * qla24xx_update_all_fcp_prio 9574 * Activates fcp priority for all the logged in ports 9575 * 9576 * Input: 9577 * ha = adapter block pointer. 9578 * 9579 * Return: 9580 * QLA_SUCCESS or QLA_FUNCTION_FAILED 9581 * 9582 * Context: 9583 * Kernel context. 9584 */ 9585 int 9586 qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha) 9587 { 9588 int ret; 9589 fc_port_t *fcport; 9590 9591 ret = QLA_FUNCTION_FAILED; 9592 /* We need to set priority for all logged in ports */ 9593 list_for_each_entry(fcport, &vha->vp_fcports, list) 9594 ret = qla24xx_update_fcport_fcp_prio(vha, fcport); 9595 9596 return ret; 9597 } 9598 9599 struct qla_qpair *qla2xxx_create_qpair(struct scsi_qla_host *vha, int qos, 9600 int vp_idx, bool startqp) 9601 { 9602 int rsp_id = 0; 9603 int req_id = 0; 9604 int i; 9605 struct qla_hw_data *ha = vha->hw; 9606 uint16_t qpair_id = 0; 9607 struct qla_qpair *qpair = NULL; 9608 struct qla_msix_entry *msix; 9609 9610 if (!(ha->fw_attributes & BIT_6) || !ha->flags.msix_enabled) { 9611 ql_log(ql_log_warn, vha, 0x00181, 9612 "FW/Driver is not multi-queue capable.\n"); 9613 return NULL; 9614 } 9615 9616 if (ql2xmqsupport || ql2xnvmeenable) { 9617 qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL); 9618 if (qpair == NULL) { 9619 ql_log(ql_log_warn, vha, 0x0182, 9620 "Failed to allocate memory for queue pair.\n"); 9621 return NULL; 9622 } 9623 9624 qpair->hw = vha->hw; 9625 qpair->vha = vha; 9626 qpair->qp_lock_ptr = &qpair->qp_lock; 9627 spin_lock_init(&qpair->qp_lock); 9628 qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0; 9629 9630 /* Assign available que pair id */ 9631 mutex_lock(&ha->mq_lock); 9632 qpair_id = find_first_zero_bit(ha->qpair_qid_map, ha->max_qpairs); 9633 if (ha->num_qpairs >= ha->max_qpairs) { 9634 mutex_unlock(&ha->mq_lock); 9635 ql_log(ql_log_warn, vha, 0x0183, 9636 "No resources to create additional q pair.\n"); 9637 goto fail_qid_map; 9638 } 9639 ha->num_qpairs++; 9640 set_bit(qpair_id, ha->qpair_qid_map); 9641 ha->queue_pair_map[qpair_id] = qpair; 9642 qpair->id = qpair_id; 9643 qpair->vp_idx = vp_idx; 9644 qpair->fw_started = ha->flags.fw_started; 9645 INIT_LIST_HEAD(&qpair->hints_list); 9646 qpair->chip_reset = ha->base_qpair->chip_reset; 9647 qpair->enable_class_2 = ha->base_qpair->enable_class_2; 9648 qpair->enable_explicit_conf = 9649 ha->base_qpair->enable_explicit_conf; 9650 9651 for (i = 0; i < ha->msix_count; i++) { 9652 msix = &ha->msix_entries[i]; 9653 if (msix->in_use) 9654 continue; 9655 qpair->msix = msix; 9656 ql_dbg(ql_dbg_multiq, vha, 0xc00f, 9657 "Vector %x selected for qpair\n", msix->vector); 9658 break; 9659 } 9660 if (!qpair->msix) { 9661 ql_log(ql_log_warn, vha, 0x0184, 9662 "Out of MSI-X vectors!.\n"); 9663 goto fail_msix; 9664 } 9665 9666 qpair->msix->in_use = 1; 9667 list_add_tail(&qpair->qp_list_elem, &vha->qp_list); 9668 qpair->pdev = ha->pdev; 9669 if (IS_QLA27XX(ha) || IS_QLA83XX(ha) || IS_QLA28XX(ha)) 9670 qpair->reqq_start_iocbs = qla_83xx_start_iocbs; 9671 9672 mutex_unlock(&ha->mq_lock); 9673 9674 /* Create response queue first */ 9675 rsp_id = qla25xx_create_rsp_que(ha, 0, 0, 0, qpair, startqp); 9676 if (!rsp_id) { 9677 ql_log(ql_log_warn, vha, 0x0185, 9678 "Failed to create response queue.\n"); 9679 goto fail_rsp; 9680 } 9681 9682 qpair->rsp = ha->rsp_q_map[rsp_id]; 9683 9684 /* Create request queue */ 9685 req_id = qla25xx_create_req_que(ha, 0, vp_idx, 0, rsp_id, qos, 9686 startqp); 9687 if (!req_id) { 9688 ql_log(ql_log_warn, vha, 0x0186, 9689 "Failed to create request queue.\n"); 9690 goto fail_req; 9691 } 9692 9693 qpair->req = ha->req_q_map[req_id]; 9694 qpair->rsp->req = qpair->req; 9695 qpair->rsp->qpair = qpair; 9696 9697 if (!qpair->cpu_mapped) 9698 qla_cpu_update(qpair, raw_smp_processor_id()); 9699 9700 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) { 9701 if (ha->fw_attributes & BIT_4) 9702 qpair->difdix_supported = 1; 9703 } 9704 9705 qpair->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep); 9706 if (!qpair->srb_mempool) { 9707 ql_log(ql_log_warn, vha, 0xd036, 9708 "Failed to create srb mempool for qpair %d\n", 9709 qpair->id); 9710 goto fail_mempool; 9711 } 9712 9713 if (qla_create_buf_pool(vha, qpair)) { 9714 ql_log(ql_log_warn, vha, 0xd036, 9715 "Failed to initialize buf pool for qpair %d\n", 9716 qpair->id); 9717 goto fail_bufpool; 9718 } 9719 9720 /* Mark as online */ 9721 qpair->online = 1; 9722 9723 if (!vha->flags.qpairs_available) 9724 vha->flags.qpairs_available = 1; 9725 9726 ql_dbg(ql_dbg_multiq, vha, 0xc00d, 9727 "Request/Response queue pair created, id %d\n", 9728 qpair->id); 9729 ql_dbg(ql_dbg_init, vha, 0x0187, 9730 "Request/Response queue pair created, id %d\n", 9731 qpair->id); 9732 } 9733 return qpair; 9734 9735 fail_bufpool: 9736 mempool_destroy(qpair->srb_mempool); 9737 fail_mempool: 9738 qla25xx_delete_req_que(vha, qpair->req); 9739 fail_req: 9740 qla25xx_delete_rsp_que(vha, qpair->rsp); 9741 fail_rsp: 9742 mutex_lock(&ha->mq_lock); 9743 qpair->msix->in_use = 0; 9744 list_del(&qpair->qp_list_elem); 9745 if (list_empty(&vha->qp_list)) 9746 vha->flags.qpairs_available = 0; 9747 fail_msix: 9748 ha->queue_pair_map[qpair_id] = NULL; 9749 clear_bit(qpair_id, ha->qpair_qid_map); 9750 ha->num_qpairs--; 9751 mutex_unlock(&ha->mq_lock); 9752 fail_qid_map: 9753 kfree(qpair); 9754 return NULL; 9755 } 9756 9757 int qla2xxx_delete_qpair(struct scsi_qla_host *vha, struct qla_qpair *qpair) 9758 { 9759 int ret = QLA_FUNCTION_FAILED; 9760 struct qla_hw_data *ha = qpair->hw; 9761 9762 qpair->delete_in_progress = 1; 9763 9764 qla_free_buf_pool(qpair); 9765 9766 ret = qla25xx_delete_req_que(vha, qpair->req); 9767 if (ret != QLA_SUCCESS) 9768 goto fail; 9769 9770 ret = qla25xx_delete_rsp_que(vha, qpair->rsp); 9771 if (ret != QLA_SUCCESS) 9772 goto fail; 9773 9774 mutex_lock(&ha->mq_lock); 9775 ha->queue_pair_map[qpair->id] = NULL; 9776 clear_bit(qpair->id, ha->qpair_qid_map); 9777 ha->num_qpairs--; 9778 list_del(&qpair->qp_list_elem); 9779 if (list_empty(&vha->qp_list)) { 9780 vha->flags.qpairs_available = 0; 9781 vha->flags.qpairs_req_created = 0; 9782 vha->flags.qpairs_rsp_created = 0; 9783 } 9784 mempool_destroy(qpair->srb_mempool); 9785 kfree(qpair); 9786 mutex_unlock(&ha->mq_lock); 9787 9788 return QLA_SUCCESS; 9789 fail: 9790 return ret; 9791 } 9792 9793 uint64_t 9794 qla2x00_count_set_bits(uint32_t num) 9795 { 9796 /* Brian Kernighan's Algorithm */ 9797 u64 count = 0; 9798 9799 while (num) { 9800 num &= (num - 1); 9801 count++; 9802 } 9803 return count; 9804 } 9805 9806 uint64_t 9807 qla2x00_get_num_tgts(scsi_qla_host_t *vha) 9808 { 9809 fc_port_t *f, *tf; 9810 u64 count = 0; 9811 9812 f = NULL; 9813 tf = NULL; 9814 9815 list_for_each_entry_safe(f, tf, &vha->vp_fcports, list) { 9816 if (f->port_type != FCT_TARGET) 9817 continue; 9818 count++; 9819 } 9820 return count; 9821 } 9822 9823 int qla2xxx_reset_stats(struct Scsi_Host *host, u32 flags) 9824 { 9825 scsi_qla_host_t *vha = shost_priv(host); 9826 fc_port_t *fcport = NULL; 9827 unsigned long int_flags; 9828 9829 if (flags & QLA2XX_HW_ERROR) 9830 vha->hw_err_cnt = 0; 9831 if (flags & QLA2XX_SHT_LNK_DWN) 9832 vha->short_link_down_cnt = 0; 9833 if (flags & QLA2XX_INT_ERR) 9834 vha->interface_err_cnt = 0; 9835 if (flags & QLA2XX_CMD_TIMEOUT) 9836 vha->cmd_timeout_cnt = 0; 9837 if (flags & QLA2XX_RESET_CMD_ERR) 9838 vha->reset_cmd_err_cnt = 0; 9839 if (flags & QLA2XX_TGT_SHT_LNK_DOWN) { 9840 spin_lock_irqsave(&vha->hw->tgt.sess_lock, int_flags); 9841 list_for_each_entry(fcport, &vha->vp_fcports, list) { 9842 fcport->tgt_short_link_down_cnt = 0; 9843 fcport->tgt_link_down_time = QLA2XX_MAX_LINK_DOWN_TIME; 9844 } 9845 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, int_flags); 9846 } 9847 vha->link_down_time = QLA2XX_MAX_LINK_DOWN_TIME; 9848 return 0; 9849 } 9850 9851 int qla2xxx_start_stats(struct Scsi_Host *host, u32 flags) 9852 { 9853 return qla2xxx_reset_stats(host, flags); 9854 } 9855 9856 int qla2xxx_stop_stats(struct Scsi_Host *host, u32 flags) 9857 { 9858 return qla2xxx_reset_stats(host, flags); 9859 } 9860 9861 int qla2xxx_get_ini_stats(struct Scsi_Host *host, u32 flags, 9862 void *data, u64 size) 9863 { 9864 scsi_qla_host_t *vha = shost_priv(host); 9865 struct ql_vnd_host_stats_resp *resp = (struct ql_vnd_host_stats_resp *)data; 9866 struct ql_vnd_stats *rsp_data = &resp->stats; 9867 u64 ini_entry_count = 0; 9868 u64 i = 0; 9869 u64 entry_count = 0; 9870 u64 num_tgt = 0; 9871 u32 tmp_stat_type = 0; 9872 fc_port_t *fcport = NULL; 9873 unsigned long int_flags; 9874 9875 /* Copy stat type to work on it */ 9876 tmp_stat_type = flags; 9877 9878 if (tmp_stat_type & BIT_17) { 9879 num_tgt = qla2x00_get_num_tgts(vha); 9880 /* unset BIT_17 */ 9881 tmp_stat_type &= ~(1 << 17); 9882 } 9883 ini_entry_count = qla2x00_count_set_bits(tmp_stat_type); 9884 9885 entry_count = ini_entry_count + num_tgt; 9886 9887 rsp_data->entry_count = entry_count; 9888 9889 i = 0; 9890 if (flags & QLA2XX_HW_ERROR) { 9891 rsp_data->entry[i].stat_type = QLA2XX_HW_ERROR; 9892 rsp_data->entry[i].tgt_num = 0x0; 9893 rsp_data->entry[i].cnt = vha->hw_err_cnt; 9894 i++; 9895 } 9896 9897 if (flags & QLA2XX_SHT_LNK_DWN) { 9898 rsp_data->entry[i].stat_type = QLA2XX_SHT_LNK_DWN; 9899 rsp_data->entry[i].tgt_num = 0x0; 9900 rsp_data->entry[i].cnt = vha->short_link_down_cnt; 9901 i++; 9902 } 9903 9904 if (flags & QLA2XX_INT_ERR) { 9905 rsp_data->entry[i].stat_type = QLA2XX_INT_ERR; 9906 rsp_data->entry[i].tgt_num = 0x0; 9907 rsp_data->entry[i].cnt = vha->interface_err_cnt; 9908 i++; 9909 } 9910 9911 if (flags & QLA2XX_CMD_TIMEOUT) { 9912 rsp_data->entry[i].stat_type = QLA2XX_CMD_TIMEOUT; 9913 rsp_data->entry[i].tgt_num = 0x0; 9914 rsp_data->entry[i].cnt = vha->cmd_timeout_cnt; 9915 i++; 9916 } 9917 9918 if (flags & QLA2XX_RESET_CMD_ERR) { 9919 rsp_data->entry[i].stat_type = QLA2XX_RESET_CMD_ERR; 9920 rsp_data->entry[i].tgt_num = 0x0; 9921 rsp_data->entry[i].cnt = vha->reset_cmd_err_cnt; 9922 i++; 9923 } 9924 9925 /* i will continue from previous loop, as target 9926 * entries are after initiator 9927 */ 9928 if (flags & QLA2XX_TGT_SHT_LNK_DOWN) { 9929 spin_lock_irqsave(&vha->hw->tgt.sess_lock, int_flags); 9930 list_for_each_entry(fcport, &vha->vp_fcports, list) { 9931 if (fcport->port_type != FCT_TARGET) 9932 continue; 9933 if (!fcport->rport) 9934 continue; 9935 rsp_data->entry[i].stat_type = QLA2XX_TGT_SHT_LNK_DOWN; 9936 rsp_data->entry[i].tgt_num = fcport->rport->number; 9937 rsp_data->entry[i].cnt = fcport->tgt_short_link_down_cnt; 9938 i++; 9939 } 9940 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, int_flags); 9941 } 9942 resp->status = EXT_STATUS_OK; 9943 9944 return 0; 9945 } 9946 9947 int qla2xxx_get_tgt_stats(struct Scsi_Host *host, u32 flags, 9948 struct fc_rport *rport, void *data, u64 size) 9949 { 9950 struct ql_vnd_tgt_stats_resp *tgt_data = data; 9951 fc_port_t *fcport = *(fc_port_t **)rport->dd_data; 9952 9953 tgt_data->status = 0; 9954 tgt_data->stats.entry_count = 1; 9955 tgt_data->stats.entry[0].stat_type = flags; 9956 tgt_data->stats.entry[0].tgt_num = rport->number; 9957 tgt_data->stats.entry[0].cnt = fcport->tgt_short_link_down_cnt; 9958 9959 return 0; 9960 } 9961 9962 int qla2xxx_disable_port(struct Scsi_Host *host) 9963 { 9964 scsi_qla_host_t *vha = shost_priv(host); 9965 9966 vha->hw->flags.port_isolated = 1; 9967 9968 if (qla2x00_isp_reg_stat(vha->hw)) { 9969 ql_log(ql_log_info, vha, 0x9006, 9970 "PCI/Register disconnect, exiting.\n"); 9971 qla_pci_set_eeh_busy(vha); 9972 return FAILED; 9973 } 9974 if (qla2x00_chip_is_down(vha)) 9975 return 0; 9976 9977 if (vha->flags.online) { 9978 qla2x00_abort_isp_cleanup(vha); 9979 qla2x00_wait_for_sess_deletion(vha); 9980 } 9981 9982 return 0; 9983 } 9984 9985 int qla2xxx_enable_port(struct Scsi_Host *host) 9986 { 9987 scsi_qla_host_t *vha = shost_priv(host); 9988 9989 if (qla2x00_isp_reg_stat(vha->hw)) { 9990 ql_log(ql_log_info, vha, 0x9001, 9991 "PCI/Register disconnect, exiting.\n"); 9992 qla_pci_set_eeh_busy(vha); 9993 return FAILED; 9994 } 9995 9996 vha->hw->flags.port_isolated = 0; 9997 /* Set the flag to 1, so that isp_abort can proceed */ 9998 vha->flags.online = 1; 9999 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 10000 qla2xxx_wake_dpc(vha); 10001 10002 return 0; 10003 } 10004