1 /******************************************************************* 2 * This file is part of the Emulex Linux Device Driver for * 3 * Fibre Channel Host Bus Adapters. * 4 * Copyright (C) 2017-2019 Broadcom. All Rights Reserved. The term * 5 * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. * 6 * Copyright (C) 2009-2016 Emulex. All rights reserved. * 7 * EMULEX and SLI are trademarks of Emulex. * 8 * www.broadcom.com * 9 * * 10 * This program is free software; you can redistribute it and/or * 11 * modify it under the terms of version 2 of the GNU General * 12 * Public License as published by the Free Software Foundation. * 13 * This program is distributed in the hope that it will be useful. * 14 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND * 15 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, * 16 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE * 17 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD * 18 * TO BE LEGALLY INVALID. See the GNU General Public License for * 19 * more details, a copy of which can be found in the file COPYING * 20 * included with this package. * 21 *******************************************************************/ 22 23 #if defined(CONFIG_DEBUG_FS) && !defined(CONFIG_SCSI_LPFC_DEBUG_FS) 24 #define CONFIG_SCSI_LPFC_DEBUG_FS 25 #endif 26 27 #define LPFC_ACTIVE_MBOX_WAIT_CNT 100 28 #define LPFC_XRI_EXCH_BUSY_WAIT_TMO 10000 29 #define LPFC_XRI_EXCH_BUSY_WAIT_T1 10 30 #define LPFC_XRI_EXCH_BUSY_WAIT_T2 30000 31 #define LPFC_RPI_LOW_WATER_MARK 10 32 33 #define LPFC_UNREG_FCF 1 34 #define LPFC_SKIP_UNREG_FCF 0 35 36 /* Amount of time in seconds for waiting FCF rediscovery to complete */ 37 #define LPFC_FCF_REDISCOVER_WAIT_TMO 2000 /* msec */ 38 39 /* Number of SGL entries can be posted in a 4KB nonembedded mbox command */ 40 #define LPFC_NEMBED_MBOX_SGL_CNT 254 41 42 /* Multi-queue arrangement for FCP EQ/CQ/WQ tuples */ 43 #define LPFC_HBA_HDWQ_MIN 0 44 #define LPFC_HBA_HDWQ_MAX 128 45 #define LPFC_HBA_HDWQ_DEF 0 46 47 /* 48 * Provide the default FCF Record attributes used by the driver 49 * when nonFIP mode is configured and there is no other default 50 * FCF Record attributes. 51 */ 52 #define LPFC_FCOE_FCF_DEF_INDEX 0 53 #define LPFC_FCOE_FCF_GET_FIRST 0xFFFF 54 #define LPFC_FCOE_FCF_NEXT_NONE 0xFFFF 55 56 #define LPFC_FCOE_NULL_VID 0xFFF 57 #define LPFC_FCOE_IGNORE_VID 0xFFFF 58 59 /* First 3 bytes of default FCF MAC is specified by FC_MAP */ 60 #define LPFC_FCOE_FCF_MAC3 0xFF 61 #define LPFC_FCOE_FCF_MAC4 0xFF 62 #define LPFC_FCOE_FCF_MAC5 0xFE 63 #define LPFC_FCOE_FCF_MAP0 0x0E 64 #define LPFC_FCOE_FCF_MAP1 0xFC 65 #define LPFC_FCOE_FCF_MAP2 0x00 66 #define LPFC_FCOE_MAX_RCV_SIZE 0x800 67 #define LPFC_FCOE_FKA_ADV_PER 0 68 #define LPFC_FCOE_FIP_PRIORITY 0x80 69 70 #define sli4_sid_from_fc_hdr(fc_hdr) \ 71 ((fc_hdr)->fh_s_id[0] << 16 | \ 72 (fc_hdr)->fh_s_id[1] << 8 | \ 73 (fc_hdr)->fh_s_id[2]) 74 75 #define sli4_did_from_fc_hdr(fc_hdr) \ 76 ((fc_hdr)->fh_d_id[0] << 16 | \ 77 (fc_hdr)->fh_d_id[1] << 8 | \ 78 (fc_hdr)->fh_d_id[2]) 79 80 #define sli4_fctl_from_fc_hdr(fc_hdr) \ 81 ((fc_hdr)->fh_f_ctl[0] << 16 | \ 82 (fc_hdr)->fh_f_ctl[1] << 8 | \ 83 (fc_hdr)->fh_f_ctl[2]) 84 85 #define sli4_type_from_fc_hdr(fc_hdr) \ 86 ((fc_hdr)->fh_type) 87 88 #define LPFC_FW_RESET_MAXIMUM_WAIT_10MS_CNT 12000 89 90 #define INT_FW_UPGRADE 0 91 #define RUN_FW_UPGRADE 1 92 93 enum lpfc_sli4_queue_type { 94 LPFC_EQ, 95 LPFC_GCQ, 96 LPFC_MCQ, 97 LPFC_WCQ, 98 LPFC_RCQ, 99 LPFC_MQ, 100 LPFC_WQ, 101 LPFC_HRQ, 102 LPFC_DRQ 103 }; 104 105 /* The queue sub-type defines the functional purpose of the queue */ 106 enum lpfc_sli4_queue_subtype { 107 LPFC_NONE, 108 LPFC_MBOX, 109 LPFC_IO, 110 LPFC_ELS, 111 LPFC_NVMET, 112 LPFC_NVME_LS, 113 LPFC_USOL 114 }; 115 116 /* RQ buffer list */ 117 struct lpfc_rqb { 118 uint16_t entry_count; /* Current number of RQ slots */ 119 uint16_t buffer_count; /* Current number of buffers posted */ 120 struct list_head rqb_buffer_list; /* buffers assigned to this HBQ */ 121 /* Callback for HBQ buffer allocation */ 122 struct rqb_dmabuf *(*rqb_alloc_buffer)(struct lpfc_hba *); 123 /* Callback for HBQ buffer free */ 124 void (*rqb_free_buffer)(struct lpfc_hba *, 125 struct rqb_dmabuf *); 126 }; 127 128 struct lpfc_queue { 129 struct list_head list; 130 struct list_head wq_list; 131 struct list_head wqfull_list; 132 enum lpfc_sli4_queue_type type; 133 enum lpfc_sli4_queue_subtype subtype; 134 struct lpfc_hba *phba; 135 struct list_head child_list; 136 struct list_head page_list; 137 struct list_head sgl_list; 138 struct list_head cpu_list; 139 uint32_t entry_count; /* Number of entries to support on the queue */ 140 uint32_t entry_size; /* Size of each queue entry. */ 141 uint32_t entry_cnt_per_pg; 142 uint32_t notify_interval; /* Queue Notification Interval 143 * For chip->host queues (EQ, CQ, RQ): 144 * specifies the interval (number of 145 * entries) where the doorbell is rung to 146 * notify the chip of entry consumption. 147 * For host->chip queues (WQ): 148 * specifies the interval (number of 149 * entries) where consumption CQE is 150 * requested to indicate WQ entries 151 * consumed by the chip. 152 * Not used on an MQ. 153 */ 154 #define LPFC_EQ_NOTIFY_INTRVL 16 155 #define LPFC_CQ_NOTIFY_INTRVL 16 156 #define LPFC_WQ_NOTIFY_INTRVL 16 157 #define LPFC_RQ_NOTIFY_INTRVL 16 158 uint32_t max_proc_limit; /* Queue Processing Limit 159 * For chip->host queues (EQ, CQ): 160 * specifies the maximum number of 161 * entries to be consumed in one 162 * processing iteration sequence. Queue 163 * will be rearmed after each iteration. 164 * Not used on an MQ, RQ or WQ. 165 */ 166 #define LPFC_EQ_MAX_PROC_LIMIT 256 167 #define LPFC_CQ_MIN_PROC_LIMIT 64 168 #define LPFC_CQ_MAX_PROC_LIMIT LPFC_CQE_EXP_COUNT // 4096 169 #define LPFC_CQ_DEF_MAX_PROC_LIMIT LPFC_CQE_DEF_COUNT // 1024 170 #define LPFC_CQ_MIN_THRESHOLD_TO_POLL 64 171 #define LPFC_CQ_MAX_THRESHOLD_TO_POLL LPFC_CQ_DEF_MAX_PROC_LIMIT 172 #define LPFC_CQ_DEF_THRESHOLD_TO_POLL LPFC_CQ_DEF_MAX_PROC_LIMIT 173 uint32_t queue_claimed; /* indicates queue is being processed */ 174 uint32_t queue_id; /* Queue ID assigned by the hardware */ 175 uint32_t assoc_qid; /* Queue ID associated with, for CQ/WQ/MQ */ 176 uint32_t host_index; /* The host's index for putting or getting */ 177 uint32_t hba_index; /* The last known hba index for get or put */ 178 uint32_t q_mode; 179 180 struct lpfc_sli_ring *pring; /* ptr to io ring associated with q */ 181 struct lpfc_rqb *rqbp; /* ptr to RQ buffers */ 182 183 uint16_t page_count; /* Number of pages allocated for this queue */ 184 uint16_t page_size; /* size of page allocated for this queue */ 185 #define LPFC_EXPANDED_PAGE_SIZE 16384 186 #define LPFC_DEFAULT_PAGE_SIZE 4096 187 uint16_t chann; /* Hardware Queue association WQ/CQ */ 188 /* CPU affinity for EQ */ 189 #define LPFC_FIND_BY_EQ 0 190 #define LPFC_FIND_BY_HDWQ 1 191 uint8_t db_format; 192 #define LPFC_DB_RING_FORMAT 0x01 193 #define LPFC_DB_LIST_FORMAT 0x02 194 uint8_t q_flag; 195 #define HBA_NVMET_WQFULL 0x1 /* We hit WQ Full condition for NVMET */ 196 #define HBA_NVMET_CQ_NOTIFY 0x1 /* LPFC_NVMET_CQ_NOTIFY CQEs this EQE */ 197 #define LPFC_NVMET_CQ_NOTIFY 4 198 void __iomem *db_regaddr; 199 uint16_t dpp_enable; 200 uint16_t dpp_id; 201 void __iomem *dpp_regaddr; 202 203 /* For q stats */ 204 uint32_t q_cnt_1; 205 uint32_t q_cnt_2; 206 uint32_t q_cnt_3; 207 uint64_t q_cnt_4; 208 /* defines for EQ stats */ 209 #define EQ_max_eqe q_cnt_1 210 #define EQ_no_entry q_cnt_2 211 #define EQ_cqe_cnt q_cnt_3 212 #define EQ_processed q_cnt_4 213 214 /* defines for CQ stats */ 215 #define CQ_mbox q_cnt_1 216 #define CQ_max_cqe q_cnt_1 217 #define CQ_release_wqe q_cnt_2 218 #define CQ_xri_aborted q_cnt_3 219 #define CQ_wq q_cnt_4 220 221 /* defines for WQ stats */ 222 #define WQ_overflow q_cnt_1 223 #define WQ_posted q_cnt_4 224 225 /* defines for RQ stats */ 226 #define RQ_no_posted_buf q_cnt_1 227 #define RQ_no_buf_found q_cnt_2 228 #define RQ_buf_posted q_cnt_3 229 #define RQ_rcv_buf q_cnt_4 230 231 struct work_struct irqwork; 232 struct work_struct spwork; 233 struct delayed_work sched_irqwork; 234 struct delayed_work sched_spwork; 235 236 uint64_t isr_timestamp; 237 uint16_t hdwq; 238 uint16_t last_cpu; /* most recent cpu */ 239 uint8_t qe_valid; 240 struct lpfc_queue *assoc_qp; 241 void **q_pgs; /* array to index entries per page */ 242 }; 243 244 struct lpfc_sli4_link { 245 uint32_t speed; 246 uint8_t duplex; 247 uint8_t status; 248 uint8_t type; 249 uint8_t number; 250 uint8_t fault; 251 uint32_t logical_speed; 252 uint16_t topology; 253 }; 254 255 struct lpfc_fcf_rec { 256 uint8_t fabric_name[8]; 257 uint8_t switch_name[8]; 258 uint8_t mac_addr[6]; 259 uint16_t fcf_indx; 260 uint32_t priority; 261 uint16_t vlan_id; 262 uint32_t addr_mode; 263 uint32_t flag; 264 #define BOOT_ENABLE 0x01 265 #define RECORD_VALID 0x02 266 }; 267 268 struct lpfc_fcf_pri_rec { 269 uint16_t fcf_index; 270 #define LPFC_FCF_ON_PRI_LIST 0x0001 271 #define LPFC_FCF_FLOGI_FAILED 0x0002 272 uint16_t flag; 273 uint32_t priority; 274 }; 275 276 struct lpfc_fcf_pri { 277 struct list_head list; 278 struct lpfc_fcf_pri_rec fcf_rec; 279 }; 280 281 /* 282 * Maximum FCF table index, it is for driver internal book keeping, it 283 * just needs to be no less than the supported HBA's FCF table size. 284 */ 285 #define LPFC_SLI4_FCF_TBL_INDX_MAX 32 286 287 struct lpfc_fcf { 288 uint16_t fcfi; 289 uint32_t fcf_flag; 290 #define FCF_AVAILABLE 0x01 /* FCF available for discovery */ 291 #define FCF_REGISTERED 0x02 /* FCF registered with FW */ 292 #define FCF_SCAN_DONE 0x04 /* FCF table scan done */ 293 #define FCF_IN_USE 0x08 /* Atleast one discovery completed */ 294 #define FCF_INIT_DISC 0x10 /* Initial FCF discovery */ 295 #define FCF_DEAD_DISC 0x20 /* FCF DEAD fast FCF failover discovery */ 296 #define FCF_ACVL_DISC 0x40 /* All CVL fast FCF failover discovery */ 297 #define FCF_DISCOVERY (FCF_INIT_DISC | FCF_DEAD_DISC | FCF_ACVL_DISC) 298 #define FCF_REDISC_PEND 0x80 /* FCF rediscovery pending */ 299 #define FCF_REDISC_EVT 0x100 /* FCF rediscovery event to worker thread */ 300 #define FCF_REDISC_FOV 0x200 /* Post FCF rediscovery fast failover */ 301 #define FCF_REDISC_PROG (FCF_REDISC_PEND | FCF_REDISC_EVT) 302 uint16_t fcf_redisc_attempted; 303 uint32_t addr_mode; 304 uint32_t eligible_fcf_cnt; 305 struct lpfc_fcf_rec current_rec; 306 struct lpfc_fcf_rec failover_rec; 307 struct list_head fcf_pri_list; 308 struct lpfc_fcf_pri fcf_pri[LPFC_SLI4_FCF_TBL_INDX_MAX]; 309 uint32_t current_fcf_scan_pri; 310 struct timer_list redisc_wait; 311 unsigned long *fcf_rr_bmask; /* Eligible FCF indexes for RR failover */ 312 }; 313 314 315 #define LPFC_REGION23_SIGNATURE "RG23" 316 #define LPFC_REGION23_VERSION 1 317 #define LPFC_REGION23_LAST_REC 0xff 318 #define DRIVER_SPECIFIC_TYPE 0xA2 319 #define LINUX_DRIVER_ID 0x20 320 #define PORT_STE_TYPE 0x1 321 322 struct lpfc_fip_param_hdr { 323 uint8_t type; 324 #define FCOE_PARAM_TYPE 0xA0 325 uint8_t length; 326 #define FCOE_PARAM_LENGTH 2 327 uint8_t parm_version; 328 #define FIPP_VERSION 0x01 329 uint8_t parm_flags; 330 #define lpfc_fip_param_hdr_fipp_mode_SHIFT 6 331 #define lpfc_fip_param_hdr_fipp_mode_MASK 0x3 332 #define lpfc_fip_param_hdr_fipp_mode_WORD parm_flags 333 #define FIPP_MODE_ON 0x1 334 #define FIPP_MODE_OFF 0x0 335 #define FIPP_VLAN_VALID 0x1 336 }; 337 338 struct lpfc_fcoe_params { 339 uint8_t fc_map[3]; 340 uint8_t reserved1; 341 uint16_t vlan_tag; 342 uint8_t reserved[2]; 343 }; 344 345 struct lpfc_fcf_conn_hdr { 346 uint8_t type; 347 #define FCOE_CONN_TBL_TYPE 0xA1 348 uint8_t length; /* words */ 349 uint8_t reserved[2]; 350 }; 351 352 struct lpfc_fcf_conn_rec { 353 uint16_t flags; 354 #define FCFCNCT_VALID 0x0001 355 #define FCFCNCT_BOOT 0x0002 356 #define FCFCNCT_PRIMARY 0x0004 /* if not set, Secondary */ 357 #define FCFCNCT_FBNM_VALID 0x0008 358 #define FCFCNCT_SWNM_VALID 0x0010 359 #define FCFCNCT_VLAN_VALID 0x0020 360 #define FCFCNCT_AM_VALID 0x0040 361 #define FCFCNCT_AM_PREFERRED 0x0080 /* if not set, AM Required */ 362 #define FCFCNCT_AM_SPMA 0x0100 /* if not set, FPMA */ 363 364 uint16_t vlan_tag; 365 uint8_t fabric_name[8]; 366 uint8_t switch_name[8]; 367 }; 368 369 struct lpfc_fcf_conn_entry { 370 struct list_head list; 371 struct lpfc_fcf_conn_rec conn_rec; 372 }; 373 374 /* 375 * Define the host's bootstrap mailbox. This structure contains 376 * the member attributes needed to create, use, and destroy the 377 * bootstrap mailbox region. 378 * 379 * The macro definitions for the bmbx data structure are defined 380 * in lpfc_hw4.h with the register definition. 381 */ 382 struct lpfc_bmbx { 383 struct lpfc_dmabuf *dmabuf; 384 struct dma_address dma_address; 385 void *avirt; 386 dma_addr_t aphys; 387 uint32_t bmbx_size; 388 }; 389 390 #define LPFC_EQE_SIZE LPFC_EQE_SIZE_4 391 392 #define LPFC_EQE_SIZE_4B 4 393 #define LPFC_EQE_SIZE_16B 16 394 #define LPFC_CQE_SIZE 16 395 #define LPFC_WQE_SIZE 64 396 #define LPFC_WQE128_SIZE 128 397 #define LPFC_MQE_SIZE 256 398 #define LPFC_RQE_SIZE 8 399 400 #define LPFC_EQE_DEF_COUNT 1024 401 #define LPFC_CQE_DEF_COUNT 1024 402 #define LPFC_CQE_EXP_COUNT 4096 403 #define LPFC_WQE_DEF_COUNT 256 404 #define LPFC_WQE_EXP_COUNT 1024 405 #define LPFC_MQE_DEF_COUNT 16 406 #define LPFC_RQE_DEF_COUNT 512 407 408 #define LPFC_QUEUE_NOARM false 409 #define LPFC_QUEUE_REARM true 410 411 412 /* 413 * SLI4 CT field defines 414 */ 415 #define SLI4_CT_RPI 0 416 #define SLI4_CT_VPI 1 417 #define SLI4_CT_VFI 2 418 #define SLI4_CT_FCFI 3 419 420 /* 421 * SLI4 specific data structures 422 */ 423 struct lpfc_max_cfg_param { 424 uint16_t max_xri; 425 uint16_t xri_base; 426 uint16_t xri_used; 427 uint16_t max_rpi; 428 uint16_t rpi_base; 429 uint16_t rpi_used; 430 uint16_t max_vpi; 431 uint16_t vpi_base; 432 uint16_t vpi_used; 433 uint16_t max_vfi; 434 uint16_t vfi_base; 435 uint16_t vfi_used; 436 uint16_t max_fcfi; 437 uint16_t fcfi_used; 438 uint16_t max_eq; 439 uint16_t max_rq; 440 uint16_t max_cq; 441 uint16_t max_wq; 442 }; 443 444 struct lpfc_hba; 445 /* SLI4 HBA multi-fcp queue handler struct */ 446 #define LPFC_SLI4_HANDLER_NAME_SZ 16 447 struct lpfc_hba_eq_hdl { 448 uint32_t idx; 449 char handler_name[LPFC_SLI4_HANDLER_NAME_SZ]; 450 struct lpfc_hba *phba; 451 struct lpfc_queue *eq; 452 }; 453 454 /*BB Credit recovery value*/ 455 struct lpfc_bbscn_params { 456 uint32_t word0; 457 #define lpfc_bbscn_min_SHIFT 0 458 #define lpfc_bbscn_min_MASK 0x0000000F 459 #define lpfc_bbscn_min_WORD word0 460 #define lpfc_bbscn_max_SHIFT 4 461 #define lpfc_bbscn_max_MASK 0x0000000F 462 #define lpfc_bbscn_max_WORD word0 463 #define lpfc_bbscn_def_SHIFT 8 464 #define lpfc_bbscn_def_MASK 0x0000000F 465 #define lpfc_bbscn_def_WORD word0 466 }; 467 468 /* Port Capabilities for SLI4 Parameters */ 469 struct lpfc_pc_sli4_params { 470 uint32_t supported; 471 uint32_t if_type; 472 uint32_t sli_rev; 473 uint32_t sli_family; 474 uint32_t featurelevel_1; 475 uint32_t featurelevel_2; 476 uint32_t proto_types; 477 #define LPFC_SLI4_PROTO_FCOE 0x0000001 478 #define LPFC_SLI4_PROTO_FC 0x0000002 479 #define LPFC_SLI4_PROTO_NIC 0x0000004 480 #define LPFC_SLI4_PROTO_ISCSI 0x0000008 481 #define LPFC_SLI4_PROTO_RDMA 0x0000010 482 uint32_t sge_supp_len; 483 uint32_t if_page_sz; 484 uint32_t rq_db_window; 485 uint32_t loopbk_scope; 486 uint32_t oas_supported; 487 uint32_t eq_pages_max; 488 uint32_t eqe_size; 489 uint32_t cq_pages_max; 490 uint32_t cqe_size; 491 uint32_t mq_pages_max; 492 uint32_t mqe_size; 493 uint32_t mq_elem_cnt; 494 uint32_t wq_pages_max; 495 uint32_t wqe_size; 496 uint32_t rq_pages_max; 497 uint32_t rqe_size; 498 uint32_t hdr_pages_max; 499 uint32_t hdr_size; 500 uint32_t hdr_pp_align; 501 uint32_t sgl_pages_max; 502 uint32_t sgl_pp_align; 503 uint8_t cqv; 504 uint8_t mqv; 505 uint8_t wqv; 506 uint8_t rqv; 507 uint8_t eqav; 508 uint8_t cqav; 509 uint8_t wqsize; 510 uint8_t bv1s; 511 #define LPFC_WQ_SZ64_SUPPORT 1 512 #define LPFC_WQ_SZ128_SUPPORT 2 513 uint8_t wqpcnt; 514 uint8_t nvme; 515 }; 516 517 #define LPFC_CQ_4K_PAGE_SZ 0x1 518 #define LPFC_CQ_16K_PAGE_SZ 0x4 519 #define LPFC_WQ_4K_PAGE_SZ 0x1 520 #define LPFC_WQ_16K_PAGE_SZ 0x4 521 522 struct lpfc_iov { 523 uint32_t pf_number; 524 uint32_t vf_number; 525 }; 526 527 struct lpfc_sli4_lnk_info { 528 uint8_t lnk_dv; 529 #define LPFC_LNK_DAT_INVAL 0 530 #define LPFC_LNK_DAT_VAL 1 531 uint8_t lnk_tp; 532 #define LPFC_LNK_GE 0x0 /* FCoE */ 533 #define LPFC_LNK_FC 0x1 /* FC */ 534 #define LPFC_LNK_FC_TRUNKED 0x2 /* FC_Trunked */ 535 uint8_t lnk_no; 536 uint8_t optic_state; 537 }; 538 539 #define LPFC_SLI4_HANDLER_CNT (LPFC_HBA_IO_CHAN_MAX+ \ 540 LPFC_FOF_IO_CHAN_NUM) 541 542 /* Used for IRQ vector to CPU mapping */ 543 struct lpfc_vector_map_info { 544 uint16_t phys_id; 545 uint16_t core_id; 546 uint16_t irq; 547 uint16_t eq; 548 uint16_t hdwq; 549 uint16_t flag; 550 #define LPFC_CPU_MAP_HYPER 0x1 551 #define LPFC_CPU_MAP_UNASSIGN 0x2 552 #define LPFC_CPU_FIRST_IRQ 0x4 553 }; 554 #define LPFC_VECTOR_MAP_EMPTY 0xffff 555 556 /* Multi-XRI pool */ 557 #define XRI_BATCH 8 558 559 struct lpfc_pbl_pool { 560 struct list_head list; 561 u32 count; 562 spinlock_t lock; /* lock for pbl_pool*/ 563 }; 564 565 struct lpfc_pvt_pool { 566 u32 low_watermark; 567 u32 high_watermark; 568 569 struct list_head list; 570 u32 count; 571 spinlock_t lock; /* lock for pvt_pool */ 572 }; 573 574 struct lpfc_multixri_pool { 575 u32 xri_limit; 576 577 /* Starting point when searching a pbl_pool with round-robin method */ 578 u32 rrb_next_hwqid; 579 580 /* Used by lpfc_adjust_pvt_pool_count. 581 * io_req_count is incremented by 1 during IO submission. The heartbeat 582 * handler uses these two variables to determine if pvt_pool is idle or 583 * busy. 584 */ 585 u32 prev_io_req_count; 586 u32 io_req_count; 587 588 /* statistics */ 589 u32 pbl_empty_count; 590 #ifdef LPFC_MXP_STAT 591 u32 above_limit_count; 592 u32 below_limit_count; 593 u32 local_pbl_hit_count; 594 u32 other_pbl_hit_count; 595 u32 stat_max_hwm; 596 597 #define LPFC_MXP_SNAPSHOT_TAKEN 3 /* snapshot is taken at 3rd heartbeats */ 598 u32 stat_pbl_count; 599 u32 stat_pvt_count; 600 u32 stat_busy_count; 601 u32 stat_snapshot_taken; 602 #endif 603 604 /* TODO: Separate pvt_pool into get and put list */ 605 struct lpfc_pbl_pool pbl_pool; /* Public free XRI pool */ 606 struct lpfc_pvt_pool pvt_pool; /* Private free XRI pool */ 607 }; 608 609 struct lpfc_fc4_ctrl_stat { 610 u32 input_requests; 611 u32 output_requests; 612 u32 control_requests; 613 u32 io_cmpls; 614 }; 615 616 #ifdef LPFC_HDWQ_LOCK_STAT 617 struct lpfc_lock_stat { 618 uint32_t alloc_xri_get; 619 uint32_t alloc_xri_put; 620 uint32_t free_xri; 621 uint32_t wq_access; 622 uint32_t alloc_pvt_pool; 623 uint32_t mv_from_pvt_pool; 624 uint32_t mv_to_pub_pool; 625 uint32_t mv_to_pvt_pool; 626 uint32_t free_pub_pool; 627 uint32_t free_pvt_pool; 628 }; 629 #endif 630 631 struct lpfc_eq_intr_info { 632 struct list_head list; 633 uint32_t icnt; 634 }; 635 636 /* SLI4 HBA data structure entries */ 637 struct lpfc_sli4_hdw_queue { 638 /* Pointers to the constructed SLI4 queues */ 639 struct lpfc_queue *hba_eq; /* Event queues for HBA */ 640 struct lpfc_queue *io_cq; /* Fast-path FCP & NVME compl queue */ 641 struct lpfc_queue *io_wq; /* Fast-path FCP & NVME work queue */ 642 uint16_t io_cq_map; 643 644 /* Keep track of IO buffers for this hardware queue */ 645 spinlock_t io_buf_list_get_lock; /* Common buf alloc list lock */ 646 struct list_head lpfc_io_buf_list_get; 647 spinlock_t io_buf_list_put_lock; /* Common buf free list lock */ 648 struct list_head lpfc_io_buf_list_put; 649 spinlock_t abts_io_buf_list_lock; /* list of aborted IOs */ 650 struct list_head lpfc_abts_io_buf_list; 651 uint32_t total_io_bufs; 652 uint32_t get_io_bufs; 653 uint32_t put_io_bufs; 654 uint32_t empty_io_bufs; 655 uint32_t abts_scsi_io_bufs; 656 uint32_t abts_nvme_io_bufs; 657 658 /* Multi-XRI pool per HWQ */ 659 struct lpfc_multixri_pool *p_multixri_pool; 660 661 /* FC-4 Stats counters */ 662 struct lpfc_fc4_ctrl_stat nvme_cstat; 663 struct lpfc_fc4_ctrl_stat scsi_cstat; 664 #ifdef LPFC_HDWQ_LOCK_STAT 665 struct lpfc_lock_stat lock_conflict; 666 #endif 667 668 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS 669 #define LPFC_CHECK_CPU_CNT 128 670 uint32_t cpucheck_rcv_io[LPFC_CHECK_CPU_CNT]; 671 uint32_t cpucheck_xmt_io[LPFC_CHECK_CPU_CNT]; 672 uint32_t cpucheck_cmpl_io[LPFC_CHECK_CPU_CNT]; 673 #endif 674 675 /* Per HDWQ pool resources */ 676 struct list_head sgl_list; 677 struct list_head cmd_rsp_buf_list; 678 679 /* Lock for syncing Per HDWQ pool resources */ 680 spinlock_t hdwq_lock; 681 }; 682 683 #ifdef LPFC_HDWQ_LOCK_STAT 684 /* compile time trylock stats */ 685 #define lpfc_qp_spin_lock_irqsave(lock, flag, qp, lstat) \ 686 { \ 687 int only_once = 1; \ 688 while (spin_trylock_irqsave(lock, flag) == 0) { \ 689 if (only_once) { \ 690 only_once = 0; \ 691 qp->lock_conflict.lstat++; \ 692 } \ 693 } \ 694 } 695 #define lpfc_qp_spin_lock(lock, qp, lstat) \ 696 { \ 697 int only_once = 1; \ 698 while (spin_trylock(lock) == 0) { \ 699 if (only_once) { \ 700 only_once = 0; \ 701 qp->lock_conflict.lstat++; \ 702 } \ 703 } \ 704 } 705 #else 706 #define lpfc_qp_spin_lock_irqsave(lock, flag, qp, lstat) \ 707 spin_lock_irqsave(lock, flag) 708 #define lpfc_qp_spin_lock(lock, qp, lstat) spin_lock(lock) 709 #endif 710 711 struct lpfc_sli4_hba { 712 void __iomem *conf_regs_memmap_p; /* Kernel memory mapped address for 713 * config space registers 714 */ 715 void __iomem *ctrl_regs_memmap_p; /* Kernel memory mapped address for 716 * control registers 717 */ 718 void __iomem *drbl_regs_memmap_p; /* Kernel memory mapped address for 719 * doorbell registers 720 */ 721 void __iomem *dpp_regs_memmap_p; /* Kernel memory mapped address for 722 * dpp registers 723 */ 724 union { 725 struct { 726 /* IF Type 0, BAR 0 PCI cfg space reg mem map */ 727 void __iomem *UERRLOregaddr; 728 void __iomem *UERRHIregaddr; 729 void __iomem *UEMASKLOregaddr; 730 void __iomem *UEMASKHIregaddr; 731 } if_type0; 732 struct { 733 /* IF Type 2, BAR 0 PCI cfg space reg mem map. */ 734 void __iomem *STATUSregaddr; 735 void __iomem *CTRLregaddr; 736 void __iomem *ERR1regaddr; 737 #define SLIPORT_ERR1_REG_ERR_CODE_1 0x1 738 #define SLIPORT_ERR1_REG_ERR_CODE_2 0x2 739 void __iomem *ERR2regaddr; 740 #define SLIPORT_ERR2_REG_FW_RESTART 0x0 741 #define SLIPORT_ERR2_REG_FUNC_PROVISON 0x1 742 #define SLIPORT_ERR2_REG_FORCED_DUMP 0x2 743 #define SLIPORT_ERR2_REG_FAILURE_EQ 0x3 744 #define SLIPORT_ERR2_REG_FAILURE_CQ 0x4 745 #define SLIPORT_ERR2_REG_FAILURE_BUS 0x5 746 #define SLIPORT_ERR2_REG_FAILURE_RQ 0x6 747 void __iomem *EQDregaddr; 748 } if_type2; 749 } u; 750 751 /* IF type 0, BAR1 and if type 2, Bar 0 CSR register memory map */ 752 void __iomem *PSMPHRregaddr; 753 754 /* Well-known SLI INTF register memory map. */ 755 void __iomem *SLIINTFregaddr; 756 757 /* IF type 0, BAR 1 function CSR register memory map */ 758 void __iomem *ISRregaddr; /* HST_ISR register */ 759 void __iomem *IMRregaddr; /* HST_IMR register */ 760 void __iomem *ISCRregaddr; /* HST_ISCR register */ 761 /* IF type 0, BAR 0 and if type 2, BAR 0 doorbell register memory map */ 762 void __iomem *RQDBregaddr; /* RQ_DOORBELL register */ 763 void __iomem *WQDBregaddr; /* WQ_DOORBELL register */ 764 void __iomem *CQDBregaddr; /* CQ_DOORBELL register */ 765 void __iomem *EQDBregaddr; /* EQ_DOORBELL register */ 766 void __iomem *MQDBregaddr; /* MQ_DOORBELL register */ 767 void __iomem *BMBXregaddr; /* BootStrap MBX register */ 768 769 uint32_t ue_mask_lo; 770 uint32_t ue_mask_hi; 771 uint32_t ue_to_sr; 772 uint32_t ue_to_rp; 773 struct lpfc_register sli_intf; 774 struct lpfc_pc_sli4_params pc_sli4_params; 775 struct lpfc_bbscn_params bbscn_params; 776 struct lpfc_hba_eq_hdl *hba_eq_hdl; /* HBA per-WQ handle */ 777 778 void (*sli4_eq_clr_intr)(struct lpfc_queue *q); 779 void (*sli4_write_eq_db)(struct lpfc_hba *phba, struct lpfc_queue *eq, 780 uint32_t count, bool arm); 781 void (*sli4_write_cq_db)(struct lpfc_hba *phba, struct lpfc_queue *cq, 782 uint32_t count, bool arm); 783 784 /* Pointers to the constructed SLI4 queues */ 785 struct lpfc_sli4_hdw_queue *hdwq; 786 struct list_head lpfc_wq_list; 787 788 /* Pointers to the constructed SLI4 queues for NVMET */ 789 struct lpfc_queue **nvmet_cqset; /* Fast-path NVMET CQ Set queues */ 790 struct lpfc_queue **nvmet_mrq_hdr; /* Fast-path NVMET hdr MRQs */ 791 struct lpfc_queue **nvmet_mrq_data; /* Fast-path NVMET data MRQs */ 792 793 struct lpfc_queue *mbx_cq; /* Slow-path mailbox complete queue */ 794 struct lpfc_queue *els_cq; /* Slow-path ELS response complete queue */ 795 struct lpfc_queue *nvmels_cq; /* NVME LS complete queue */ 796 struct lpfc_queue *mbx_wq; /* Slow-path MBOX work queue */ 797 struct lpfc_queue *els_wq; /* Slow-path ELS work queue */ 798 struct lpfc_queue *nvmels_wq; /* NVME LS work queue */ 799 struct lpfc_queue *hdr_rq; /* Slow-path Header Receive queue */ 800 struct lpfc_queue *dat_rq; /* Slow-path Data Receive queue */ 801 802 struct lpfc_name wwnn; 803 struct lpfc_name wwpn; 804 805 uint32_t fw_func_mode; /* FW function protocol mode */ 806 uint32_t ulp0_mode; /* ULP0 protocol mode */ 807 uint32_t ulp1_mode; /* ULP1 protocol mode */ 808 809 /* Optimized Access Storage specific queues/structures */ 810 uint64_t oas_next_lun; 811 uint8_t oas_next_tgt_wwpn[8]; 812 uint8_t oas_next_vpt_wwpn[8]; 813 814 /* Setup information for various queue parameters */ 815 int eq_esize; 816 int eq_ecount; 817 int cq_esize; 818 int cq_ecount; 819 int wq_esize; 820 int wq_ecount; 821 int mq_esize; 822 int mq_ecount; 823 int rq_esize; 824 int rq_ecount; 825 #define LPFC_SP_EQ_MAX_INTR_SEC 10000 826 #define LPFC_FP_EQ_MAX_INTR_SEC 10000 827 828 uint32_t intr_enable; 829 struct lpfc_bmbx bmbx; 830 struct lpfc_max_cfg_param max_cfg_param; 831 uint16_t extents_in_use; /* must allocate resource extents. */ 832 uint16_t rpi_hdrs_in_use; /* must post rpi hdrs if set. */ 833 uint16_t next_xri; /* last_xri - max_cfg_param.xri_base = used */ 834 uint16_t next_rpi; 835 uint16_t io_xri_max; 836 uint16_t io_xri_cnt; 837 uint16_t io_xri_start; 838 uint16_t els_xri_cnt; 839 uint16_t nvmet_xri_cnt; 840 uint16_t nvmet_io_wait_cnt; 841 uint16_t nvmet_io_wait_total; 842 uint16_t cq_max; 843 struct lpfc_queue **cq_lookup; 844 struct list_head lpfc_els_sgl_list; 845 struct list_head lpfc_abts_els_sgl_list; 846 spinlock_t abts_io_buf_list_lock; /* list of aborted SCSI IOs */ 847 struct list_head lpfc_abts_io_buf_list; 848 struct list_head lpfc_nvmet_sgl_list; 849 spinlock_t abts_nvmet_buf_list_lock; /* list of aborted NVMET IOs */ 850 struct list_head lpfc_abts_nvmet_ctx_list; 851 spinlock_t t_active_list_lock; /* list of active NVMET IOs */ 852 struct list_head t_active_ctx_list; 853 struct list_head lpfc_nvmet_io_wait_list; 854 struct lpfc_nvmet_ctx_info *nvmet_ctx_info; 855 struct lpfc_sglq **lpfc_sglq_active_list; 856 struct list_head lpfc_rpi_hdr_list; 857 unsigned long *rpi_bmask; 858 uint16_t *rpi_ids; 859 uint16_t rpi_count; 860 struct list_head lpfc_rpi_blk_list; 861 unsigned long *xri_bmask; 862 uint16_t *xri_ids; 863 struct list_head lpfc_xri_blk_list; 864 unsigned long *vfi_bmask; 865 uint16_t *vfi_ids; 866 uint16_t vfi_count; 867 struct list_head lpfc_vfi_blk_list; 868 struct lpfc_sli4_flags sli4_flags; 869 struct list_head sp_queue_event; 870 struct list_head sp_cqe_event_pool; 871 struct list_head sp_asynce_work_queue; 872 struct list_head sp_fcp_xri_aborted_work_queue; 873 struct list_head sp_els_xri_aborted_work_queue; 874 struct list_head sp_unsol_work_queue; 875 struct lpfc_sli4_link link_state; 876 struct lpfc_sli4_lnk_info lnk_info; 877 uint32_t pport_name_sta; 878 #define LPFC_SLI4_PPNAME_NON 0 879 #define LPFC_SLI4_PPNAME_GET 1 880 struct lpfc_iov iov; 881 spinlock_t sgl_list_lock; /* list of aborted els IOs */ 882 spinlock_t nvmet_io_wait_lock; /* IOs waiting for ctx resources */ 883 uint32_t physical_port; 884 885 /* CPU to vector mapping information */ 886 struct lpfc_vector_map_info *cpu_map; 887 uint16_t num_possible_cpu; 888 uint16_t num_present_cpu; 889 uint16_t curr_disp_cpu; 890 struct lpfc_eq_intr_info __percpu *eq_info; 891 uint32_t conf_trunk; 892 #define lpfc_conf_trunk_port0_WORD conf_trunk 893 #define lpfc_conf_trunk_port0_SHIFT 0 894 #define lpfc_conf_trunk_port0_MASK 0x1 895 #define lpfc_conf_trunk_port1_WORD conf_trunk 896 #define lpfc_conf_trunk_port1_SHIFT 1 897 #define lpfc_conf_trunk_port1_MASK 0x1 898 #define lpfc_conf_trunk_port2_WORD conf_trunk 899 #define lpfc_conf_trunk_port2_SHIFT 2 900 #define lpfc_conf_trunk_port2_MASK 0x1 901 #define lpfc_conf_trunk_port3_WORD conf_trunk 902 #define lpfc_conf_trunk_port3_SHIFT 3 903 #define lpfc_conf_trunk_port3_MASK 0x1 904 #define lpfc_conf_trunk_port0_nd_WORD conf_trunk 905 #define lpfc_conf_trunk_port0_nd_SHIFT 4 906 #define lpfc_conf_trunk_port0_nd_MASK 0x1 907 #define lpfc_conf_trunk_port1_nd_WORD conf_trunk 908 #define lpfc_conf_trunk_port1_nd_SHIFT 5 909 #define lpfc_conf_trunk_port1_nd_MASK 0x1 910 #define lpfc_conf_trunk_port2_nd_WORD conf_trunk 911 #define lpfc_conf_trunk_port2_nd_SHIFT 6 912 #define lpfc_conf_trunk_port2_nd_MASK 0x1 913 #define lpfc_conf_trunk_port3_nd_WORD conf_trunk 914 #define lpfc_conf_trunk_port3_nd_SHIFT 7 915 #define lpfc_conf_trunk_port3_nd_MASK 0x1 916 }; 917 918 enum lpfc_sge_type { 919 GEN_BUFF_TYPE, 920 SCSI_BUFF_TYPE, 921 NVMET_BUFF_TYPE 922 }; 923 924 enum lpfc_sgl_state { 925 SGL_FREED, 926 SGL_ALLOCATED, 927 SGL_XRI_ABORTED 928 }; 929 930 struct lpfc_sglq { 931 /* lpfc_sglqs are used in double linked lists */ 932 struct list_head list; 933 struct list_head clist; 934 enum lpfc_sge_type buff_type; /* is this a scsi sgl */ 935 enum lpfc_sgl_state state; 936 struct lpfc_nodelist *ndlp; /* ndlp associated with IO */ 937 uint16_t iotag; /* pre-assigned IO tag */ 938 uint16_t sli4_lxritag; /* logical pre-assigned xri. */ 939 uint16_t sli4_xritag; /* pre-assigned XRI, (OXID) tag. */ 940 struct sli4_sge *sgl; /* pre-assigned SGL */ 941 void *virt; /* virtual address. */ 942 dma_addr_t phys; /* physical address */ 943 }; 944 945 struct lpfc_rpi_hdr { 946 struct list_head list; 947 uint32_t len; 948 struct lpfc_dmabuf *dmabuf; 949 uint32_t page_count; 950 uint32_t start_rpi; 951 uint16_t next_rpi; 952 }; 953 954 struct lpfc_rsrc_blks { 955 struct list_head list; 956 uint16_t rsrc_start; 957 uint16_t rsrc_size; 958 uint16_t rsrc_used; 959 }; 960 961 struct lpfc_rdp_context { 962 struct lpfc_nodelist *ndlp; 963 uint16_t ox_id; 964 uint16_t rx_id; 965 READ_LNK_VAR link_stat; 966 uint8_t page_a0[DMP_SFF_PAGE_A0_SIZE]; 967 uint8_t page_a2[DMP_SFF_PAGE_A2_SIZE]; 968 void (*cmpl)(struct lpfc_hba *, struct lpfc_rdp_context*, int); 969 }; 970 971 struct lpfc_lcb_context { 972 uint8_t sub_command; 973 uint8_t type; 974 uint8_t capability; 975 uint8_t frequency; 976 uint16_t duration; 977 uint16_t ox_id; 978 uint16_t rx_id; 979 struct lpfc_nodelist *ndlp; 980 }; 981 982 983 /* 984 * SLI4 specific function prototypes 985 */ 986 int lpfc_pci_function_reset(struct lpfc_hba *); 987 int lpfc_sli4_pdev_status_reg_wait(struct lpfc_hba *); 988 int lpfc_sli4_hba_setup(struct lpfc_hba *); 989 int lpfc_sli4_config(struct lpfc_hba *, struct lpfcMboxq *, uint8_t, 990 uint8_t, uint32_t, bool); 991 void lpfc_sli4_mbox_cmd_free(struct lpfc_hba *, struct lpfcMboxq *); 992 void lpfc_sli4_mbx_sge_set(struct lpfcMboxq *, uint32_t, dma_addr_t, uint32_t); 993 void lpfc_sli4_mbx_sge_get(struct lpfcMboxq *, uint32_t, 994 struct lpfc_mbx_sge *); 995 int lpfc_sli4_mbx_read_fcf_rec(struct lpfc_hba *, struct lpfcMboxq *, 996 uint16_t); 997 998 void lpfc_sli4_hba_reset(struct lpfc_hba *); 999 struct lpfc_queue *lpfc_sli4_queue_alloc(struct lpfc_hba *phba, 1000 uint32_t page_size, 1001 uint32_t entry_size, 1002 uint32_t entry_count, int cpu); 1003 void lpfc_sli4_queue_free(struct lpfc_queue *); 1004 int lpfc_eq_create(struct lpfc_hba *, struct lpfc_queue *, uint32_t); 1005 void lpfc_modify_hba_eq_delay(struct lpfc_hba *phba, uint32_t startq, 1006 uint32_t numq, uint32_t usdelay); 1007 int lpfc_cq_create(struct lpfc_hba *, struct lpfc_queue *, 1008 struct lpfc_queue *, uint32_t, uint32_t); 1009 int lpfc_cq_create_set(struct lpfc_hba *phba, struct lpfc_queue **cqp, 1010 struct lpfc_sli4_hdw_queue *hdwq, uint32_t type, 1011 uint32_t subtype); 1012 int32_t lpfc_mq_create(struct lpfc_hba *, struct lpfc_queue *, 1013 struct lpfc_queue *, uint32_t); 1014 int lpfc_wq_create(struct lpfc_hba *, struct lpfc_queue *, 1015 struct lpfc_queue *, uint32_t); 1016 int lpfc_rq_create(struct lpfc_hba *, struct lpfc_queue *, 1017 struct lpfc_queue *, struct lpfc_queue *, uint32_t); 1018 int lpfc_mrq_create(struct lpfc_hba *phba, struct lpfc_queue **hrqp, 1019 struct lpfc_queue **drqp, struct lpfc_queue **cqp, 1020 uint32_t subtype); 1021 int lpfc_eq_destroy(struct lpfc_hba *, struct lpfc_queue *); 1022 int lpfc_cq_destroy(struct lpfc_hba *, struct lpfc_queue *); 1023 int lpfc_mq_destroy(struct lpfc_hba *, struct lpfc_queue *); 1024 int lpfc_wq_destroy(struct lpfc_hba *, struct lpfc_queue *); 1025 int lpfc_rq_destroy(struct lpfc_hba *, struct lpfc_queue *, 1026 struct lpfc_queue *); 1027 int lpfc_sli4_queue_setup(struct lpfc_hba *); 1028 void lpfc_sli4_queue_unset(struct lpfc_hba *); 1029 int lpfc_sli4_post_sgl(struct lpfc_hba *, dma_addr_t, dma_addr_t, uint16_t); 1030 int lpfc_repost_io_sgl_list(struct lpfc_hba *phba); 1031 uint16_t lpfc_sli4_next_xritag(struct lpfc_hba *); 1032 void lpfc_sli4_free_xri(struct lpfc_hba *, int); 1033 int lpfc_sli4_post_async_mbox(struct lpfc_hba *); 1034 struct lpfc_cq_event *__lpfc_sli4_cq_event_alloc(struct lpfc_hba *); 1035 struct lpfc_cq_event *lpfc_sli4_cq_event_alloc(struct lpfc_hba *); 1036 void __lpfc_sli4_cq_event_release(struct lpfc_hba *, struct lpfc_cq_event *); 1037 void lpfc_sli4_cq_event_release(struct lpfc_hba *, struct lpfc_cq_event *); 1038 int lpfc_sli4_init_rpi_hdrs(struct lpfc_hba *); 1039 int lpfc_sli4_post_rpi_hdr(struct lpfc_hba *, struct lpfc_rpi_hdr *); 1040 int lpfc_sli4_post_all_rpi_hdrs(struct lpfc_hba *); 1041 struct lpfc_rpi_hdr *lpfc_sli4_create_rpi_hdr(struct lpfc_hba *); 1042 void lpfc_sli4_remove_rpi_hdrs(struct lpfc_hba *); 1043 int lpfc_sli4_alloc_rpi(struct lpfc_hba *); 1044 void lpfc_sli4_free_rpi(struct lpfc_hba *, int); 1045 void lpfc_sli4_remove_rpis(struct lpfc_hba *); 1046 void lpfc_sli4_async_event_proc(struct lpfc_hba *); 1047 void lpfc_sli4_fcf_redisc_event_proc(struct lpfc_hba *); 1048 int lpfc_sli4_resume_rpi(struct lpfc_nodelist *, 1049 void (*)(struct lpfc_hba *, LPFC_MBOXQ_t *), void *); 1050 void lpfc_sli4_fcp_xri_abort_event_proc(struct lpfc_hba *); 1051 void lpfc_sli4_els_xri_abort_event_proc(struct lpfc_hba *); 1052 void lpfc_sli4_nvme_xri_aborted(struct lpfc_hba *phba, 1053 struct sli4_wcqe_xri_aborted *axri, 1054 struct lpfc_io_buf *lpfc_ncmd); 1055 void lpfc_sli4_io_xri_aborted(struct lpfc_hba *phba, 1056 struct sli4_wcqe_xri_aborted *axri, int idx); 1057 void lpfc_sli4_nvmet_xri_aborted(struct lpfc_hba *phba, 1058 struct sli4_wcqe_xri_aborted *axri); 1059 void lpfc_sli4_els_xri_aborted(struct lpfc_hba *, 1060 struct sli4_wcqe_xri_aborted *); 1061 void lpfc_sli4_vport_delete_els_xri_aborted(struct lpfc_vport *); 1062 void lpfc_sli4_vport_delete_fcp_xri_aborted(struct lpfc_vport *); 1063 int lpfc_sli4_brdreset(struct lpfc_hba *); 1064 int lpfc_sli4_add_fcf_record(struct lpfc_hba *, struct fcf_record *); 1065 void lpfc_sli_remove_dflt_fcf(struct lpfc_hba *); 1066 int lpfc_sli4_get_els_iocb_cnt(struct lpfc_hba *); 1067 int lpfc_sli4_get_iocb_cnt(struct lpfc_hba *phba); 1068 int lpfc_sli4_init_vpi(struct lpfc_vport *); 1069 void lpfc_sli4_eq_clr_intr(struct lpfc_queue *); 1070 void lpfc_sli4_write_cq_db(struct lpfc_hba *phba, struct lpfc_queue *q, 1071 uint32_t count, bool arm); 1072 void lpfc_sli4_write_eq_db(struct lpfc_hba *phba, struct lpfc_queue *q, 1073 uint32_t count, bool arm); 1074 void lpfc_sli4_if6_eq_clr_intr(struct lpfc_queue *q); 1075 void lpfc_sli4_if6_write_cq_db(struct lpfc_hba *phba, struct lpfc_queue *q, 1076 uint32_t count, bool arm); 1077 void lpfc_sli4_if6_write_eq_db(struct lpfc_hba *phba, struct lpfc_queue *q, 1078 uint32_t count, bool arm); 1079 void lpfc_sli4_fcfi_unreg(struct lpfc_hba *, uint16_t); 1080 int lpfc_sli4_fcf_scan_read_fcf_rec(struct lpfc_hba *, uint16_t); 1081 int lpfc_sli4_fcf_rr_read_fcf_rec(struct lpfc_hba *, uint16_t); 1082 int lpfc_sli4_read_fcf_rec(struct lpfc_hba *, uint16_t); 1083 void lpfc_mbx_cmpl_fcf_scan_read_fcf_rec(struct lpfc_hba *, LPFC_MBOXQ_t *); 1084 void lpfc_mbx_cmpl_fcf_rr_read_fcf_rec(struct lpfc_hba *, LPFC_MBOXQ_t *); 1085 void lpfc_mbx_cmpl_read_fcf_rec(struct lpfc_hba *, LPFC_MBOXQ_t *); 1086 int lpfc_sli4_unregister_fcf(struct lpfc_hba *); 1087 int lpfc_sli4_post_status_check(struct lpfc_hba *); 1088 uint8_t lpfc_sli_config_mbox_subsys_get(struct lpfc_hba *, LPFC_MBOXQ_t *); 1089 uint8_t lpfc_sli_config_mbox_opcode_get(struct lpfc_hba *, LPFC_MBOXQ_t *); 1090 void lpfc_sli4_ras_dma_free(struct lpfc_hba *phba); 1091 struct sli4_hybrid_sgl *lpfc_get_sgl_per_hdwq(struct lpfc_hba *phba, 1092 struct lpfc_io_buf *buf); 1093 struct fcp_cmd_rsp_buf *lpfc_get_cmd_rsp_buf_per_hdwq(struct lpfc_hba *phba, 1094 struct lpfc_io_buf *buf); 1095 int lpfc_put_sgl_per_hdwq(struct lpfc_hba *phba, struct lpfc_io_buf *buf); 1096 int lpfc_put_cmd_rsp_buf_per_hdwq(struct lpfc_hba *phba, 1097 struct lpfc_io_buf *buf); 1098 void lpfc_free_sgl_per_hdwq(struct lpfc_hba *phba, 1099 struct lpfc_sli4_hdw_queue *hdwq); 1100 void lpfc_free_cmd_rsp_buf_per_hdwq(struct lpfc_hba *phba, 1101 struct lpfc_sli4_hdw_queue *hdwq); 1102 static inline void *lpfc_sli4_qe(struct lpfc_queue *q, uint16_t idx) 1103 { 1104 return q->q_pgs[idx / q->entry_cnt_per_pg] + 1105 (q->entry_size * (idx % q->entry_cnt_per_pg)); 1106 } 1107