1 /******************************************************************* 2 * This file is part of the Emulex Linux Device Driver for * 3 * Fibre Channel Host Bus Adapters. * 4 * Copyright (C) 2017-2019 Broadcom. All Rights Reserved. The term * 5 * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. * 6 * Copyright (C) 2009-2016 Emulex. All rights reserved. * 7 * EMULEX and SLI are trademarks of Emulex. * 8 * www.broadcom.com * 9 * * 10 * This program is free software; you can redistribute it and/or * 11 * modify it under the terms of version 2 of the GNU General * 12 * Public License as published by the Free Software Foundation. * 13 * This program is distributed in the hope that it will be useful. * 14 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND * 15 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, * 16 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE * 17 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD * 18 * TO BE LEGALLY INVALID. See the GNU General Public License for * 19 * more details, a copy of which can be found in the file COPYING * 20 * included with this package. * 21 *******************************************************************/ 22 23 #if defined(CONFIG_DEBUG_FS) && !defined(CONFIG_SCSI_LPFC_DEBUG_FS) 24 #define CONFIG_SCSI_LPFC_DEBUG_FS 25 #endif 26 27 #define LPFC_ACTIVE_MBOX_WAIT_CNT 100 28 #define LPFC_XRI_EXCH_BUSY_WAIT_TMO 10000 29 #define LPFC_XRI_EXCH_BUSY_WAIT_T1 10 30 #define LPFC_XRI_EXCH_BUSY_WAIT_T2 30000 31 #define LPFC_RPI_LOW_WATER_MARK 10 32 33 #define LPFC_UNREG_FCF 1 34 #define LPFC_SKIP_UNREG_FCF 0 35 36 /* Amount of time in seconds for waiting FCF rediscovery to complete */ 37 #define LPFC_FCF_REDISCOVER_WAIT_TMO 2000 /* msec */ 38 39 /* Number of SGL entries can be posted in a 4KB nonembedded mbox command */ 40 #define LPFC_NEMBED_MBOX_SGL_CNT 254 41 42 /* Multi-queue arrangement for FCP EQ/CQ/WQ tuples */ 43 #define LPFC_HBA_HDWQ_MIN 0 44 #define LPFC_HBA_HDWQ_MAX 128 45 #define LPFC_HBA_HDWQ_DEF 0 46 47 /* FCP MQ queue count limiting */ 48 #define LPFC_FCP_MQ_THRESHOLD_MIN 0 49 #define LPFC_FCP_MQ_THRESHOLD_MAX 128 50 #define LPFC_FCP_MQ_THRESHOLD_DEF 8 51 52 /* Common buffer size to accomidate SCSI and NVME IO buffers */ 53 #define LPFC_COMMON_IO_BUF_SZ 768 54 55 /* 56 * Provide the default FCF Record attributes used by the driver 57 * when nonFIP mode is configured and there is no other default 58 * FCF Record attributes. 59 */ 60 #define LPFC_FCOE_FCF_DEF_INDEX 0 61 #define LPFC_FCOE_FCF_GET_FIRST 0xFFFF 62 #define LPFC_FCOE_FCF_NEXT_NONE 0xFFFF 63 64 #define LPFC_FCOE_NULL_VID 0xFFF 65 #define LPFC_FCOE_IGNORE_VID 0xFFFF 66 67 /* First 3 bytes of default FCF MAC is specified by FC_MAP */ 68 #define LPFC_FCOE_FCF_MAC3 0xFF 69 #define LPFC_FCOE_FCF_MAC4 0xFF 70 #define LPFC_FCOE_FCF_MAC5 0xFE 71 #define LPFC_FCOE_FCF_MAP0 0x0E 72 #define LPFC_FCOE_FCF_MAP1 0xFC 73 #define LPFC_FCOE_FCF_MAP2 0x00 74 #define LPFC_FCOE_MAX_RCV_SIZE 0x800 75 #define LPFC_FCOE_FKA_ADV_PER 0 76 #define LPFC_FCOE_FIP_PRIORITY 0x80 77 78 #define sli4_sid_from_fc_hdr(fc_hdr) \ 79 ((fc_hdr)->fh_s_id[0] << 16 | \ 80 (fc_hdr)->fh_s_id[1] << 8 | \ 81 (fc_hdr)->fh_s_id[2]) 82 83 #define sli4_did_from_fc_hdr(fc_hdr) \ 84 ((fc_hdr)->fh_d_id[0] << 16 | \ 85 (fc_hdr)->fh_d_id[1] << 8 | \ 86 (fc_hdr)->fh_d_id[2]) 87 88 #define sli4_fctl_from_fc_hdr(fc_hdr) \ 89 ((fc_hdr)->fh_f_ctl[0] << 16 | \ 90 (fc_hdr)->fh_f_ctl[1] << 8 | \ 91 (fc_hdr)->fh_f_ctl[2]) 92 93 #define sli4_type_from_fc_hdr(fc_hdr) \ 94 ((fc_hdr)->fh_type) 95 96 #define LPFC_FW_RESET_MAXIMUM_WAIT_10MS_CNT 12000 97 98 #define INT_FW_UPGRADE 0 99 #define RUN_FW_UPGRADE 1 100 101 enum lpfc_sli4_queue_type { 102 LPFC_EQ, 103 LPFC_GCQ, 104 LPFC_MCQ, 105 LPFC_WCQ, 106 LPFC_RCQ, 107 LPFC_MQ, 108 LPFC_WQ, 109 LPFC_HRQ, 110 LPFC_DRQ 111 }; 112 113 /* The queue sub-type defines the functional purpose of the queue */ 114 enum lpfc_sli4_queue_subtype { 115 LPFC_NONE, 116 LPFC_MBOX, 117 LPFC_FCP, 118 LPFC_ELS, 119 LPFC_NVME, 120 LPFC_NVMET, 121 LPFC_NVME_LS, 122 LPFC_USOL 123 }; 124 125 /* RQ buffer list */ 126 struct lpfc_rqb { 127 uint16_t entry_count; /* Current number of RQ slots */ 128 uint16_t buffer_count; /* Current number of buffers posted */ 129 struct list_head rqb_buffer_list; /* buffers assigned to this HBQ */ 130 /* Callback for HBQ buffer allocation */ 131 struct rqb_dmabuf *(*rqb_alloc_buffer)(struct lpfc_hba *); 132 /* Callback for HBQ buffer free */ 133 void (*rqb_free_buffer)(struct lpfc_hba *, 134 struct rqb_dmabuf *); 135 }; 136 137 struct lpfc_queue { 138 struct list_head list; 139 struct list_head wq_list; 140 struct list_head wqfull_list; 141 enum lpfc_sli4_queue_type type; 142 enum lpfc_sli4_queue_subtype subtype; 143 struct lpfc_hba *phba; 144 struct list_head child_list; 145 struct list_head page_list; 146 struct list_head sgl_list; 147 struct list_head cpu_list; 148 uint32_t entry_count; /* Number of entries to support on the queue */ 149 uint32_t entry_size; /* Size of each queue entry. */ 150 uint32_t entry_cnt_per_pg; 151 uint32_t notify_interval; /* Queue Notification Interval 152 * For chip->host queues (EQ, CQ, RQ): 153 * specifies the interval (number of 154 * entries) where the doorbell is rung to 155 * notify the chip of entry consumption. 156 * For host->chip queues (WQ): 157 * specifies the interval (number of 158 * entries) where consumption CQE is 159 * requested to indicate WQ entries 160 * consumed by the chip. 161 * Not used on an MQ. 162 */ 163 #define LPFC_EQ_NOTIFY_INTRVL 16 164 #define LPFC_CQ_NOTIFY_INTRVL 16 165 #define LPFC_WQ_NOTIFY_INTRVL 16 166 #define LPFC_RQ_NOTIFY_INTRVL 16 167 uint32_t max_proc_limit; /* Queue Processing Limit 168 * For chip->host queues (EQ, CQ): 169 * specifies the maximum number of 170 * entries to be consumed in one 171 * processing iteration sequence. Queue 172 * will be rearmed after each iteration. 173 * Not used on an MQ, RQ or WQ. 174 */ 175 #define LPFC_EQ_MAX_PROC_LIMIT 256 176 #define LPFC_CQ_MIN_PROC_LIMIT 64 177 #define LPFC_CQ_MAX_PROC_LIMIT LPFC_CQE_EXP_COUNT // 4096 178 #define LPFC_CQ_DEF_MAX_PROC_LIMIT LPFC_CQE_DEF_COUNT // 1024 179 #define LPFC_CQ_MIN_THRESHOLD_TO_POLL 64 180 #define LPFC_CQ_MAX_THRESHOLD_TO_POLL LPFC_CQ_DEF_MAX_PROC_LIMIT 181 #define LPFC_CQ_DEF_THRESHOLD_TO_POLL LPFC_CQ_DEF_MAX_PROC_LIMIT 182 uint32_t queue_claimed; /* indicates queue is being processed */ 183 uint32_t queue_id; /* Queue ID assigned by the hardware */ 184 uint32_t assoc_qid; /* Queue ID associated with, for CQ/WQ/MQ */ 185 uint32_t host_index; /* The host's index for putting or getting */ 186 uint32_t hba_index; /* The last known hba index for get or put */ 187 uint32_t q_mode; 188 189 struct lpfc_sli_ring *pring; /* ptr to io ring associated with q */ 190 struct lpfc_rqb *rqbp; /* ptr to RQ buffers */ 191 192 uint16_t page_count; /* Number of pages allocated for this queue */ 193 uint16_t page_size; /* size of page allocated for this queue */ 194 #define LPFC_EXPANDED_PAGE_SIZE 16384 195 #define LPFC_DEFAULT_PAGE_SIZE 4096 196 uint16_t chann; /* Hardware Queue association WQ/CQ */ 197 /* CPU affinity for EQ */ 198 #define LPFC_FIND_BY_EQ 0 199 #define LPFC_FIND_BY_HDWQ 1 200 uint8_t db_format; 201 #define LPFC_DB_RING_FORMAT 0x01 202 #define LPFC_DB_LIST_FORMAT 0x02 203 uint8_t q_flag; 204 #define HBA_NVMET_WQFULL 0x1 /* We hit WQ Full condition for NVMET */ 205 #define HBA_NVMET_CQ_NOTIFY 0x1 /* LPFC_NVMET_CQ_NOTIFY CQEs this EQE */ 206 #define LPFC_NVMET_CQ_NOTIFY 4 207 void __iomem *db_regaddr; 208 uint16_t dpp_enable; 209 uint16_t dpp_id; 210 void __iomem *dpp_regaddr; 211 212 /* For q stats */ 213 uint32_t q_cnt_1; 214 uint32_t q_cnt_2; 215 uint32_t q_cnt_3; 216 uint64_t q_cnt_4; 217 /* defines for EQ stats */ 218 #define EQ_max_eqe q_cnt_1 219 #define EQ_no_entry q_cnt_2 220 #define EQ_cqe_cnt q_cnt_3 221 #define EQ_processed q_cnt_4 222 223 /* defines for CQ stats */ 224 #define CQ_mbox q_cnt_1 225 #define CQ_max_cqe q_cnt_1 226 #define CQ_release_wqe q_cnt_2 227 #define CQ_xri_aborted q_cnt_3 228 #define CQ_wq q_cnt_4 229 230 /* defines for WQ stats */ 231 #define WQ_overflow q_cnt_1 232 #define WQ_posted q_cnt_4 233 234 /* defines for RQ stats */ 235 #define RQ_no_posted_buf q_cnt_1 236 #define RQ_no_buf_found q_cnt_2 237 #define RQ_buf_posted q_cnt_3 238 #define RQ_rcv_buf q_cnt_4 239 240 struct work_struct irqwork; 241 struct work_struct spwork; 242 struct delayed_work sched_irqwork; 243 struct delayed_work sched_spwork; 244 245 uint64_t isr_timestamp; 246 uint16_t hdwq; 247 uint16_t last_cpu; /* most recent cpu */ 248 uint8_t qe_valid; 249 struct lpfc_queue *assoc_qp; 250 void **q_pgs; /* array to index entries per page */ 251 }; 252 253 struct lpfc_sli4_link { 254 uint32_t speed; 255 uint8_t duplex; 256 uint8_t status; 257 uint8_t type; 258 uint8_t number; 259 uint8_t fault; 260 uint32_t logical_speed; 261 uint16_t topology; 262 }; 263 264 struct lpfc_fcf_rec { 265 uint8_t fabric_name[8]; 266 uint8_t switch_name[8]; 267 uint8_t mac_addr[6]; 268 uint16_t fcf_indx; 269 uint32_t priority; 270 uint16_t vlan_id; 271 uint32_t addr_mode; 272 uint32_t flag; 273 #define BOOT_ENABLE 0x01 274 #define RECORD_VALID 0x02 275 }; 276 277 struct lpfc_fcf_pri_rec { 278 uint16_t fcf_index; 279 #define LPFC_FCF_ON_PRI_LIST 0x0001 280 #define LPFC_FCF_FLOGI_FAILED 0x0002 281 uint16_t flag; 282 uint32_t priority; 283 }; 284 285 struct lpfc_fcf_pri { 286 struct list_head list; 287 struct lpfc_fcf_pri_rec fcf_rec; 288 }; 289 290 /* 291 * Maximum FCF table index, it is for driver internal book keeping, it 292 * just needs to be no less than the supported HBA's FCF table size. 293 */ 294 #define LPFC_SLI4_FCF_TBL_INDX_MAX 32 295 296 struct lpfc_fcf { 297 uint16_t fcfi; 298 uint32_t fcf_flag; 299 #define FCF_AVAILABLE 0x01 /* FCF available for discovery */ 300 #define FCF_REGISTERED 0x02 /* FCF registered with FW */ 301 #define FCF_SCAN_DONE 0x04 /* FCF table scan done */ 302 #define FCF_IN_USE 0x08 /* Atleast one discovery completed */ 303 #define FCF_INIT_DISC 0x10 /* Initial FCF discovery */ 304 #define FCF_DEAD_DISC 0x20 /* FCF DEAD fast FCF failover discovery */ 305 #define FCF_ACVL_DISC 0x40 /* All CVL fast FCF failover discovery */ 306 #define FCF_DISCOVERY (FCF_INIT_DISC | FCF_DEAD_DISC | FCF_ACVL_DISC) 307 #define FCF_REDISC_PEND 0x80 /* FCF rediscovery pending */ 308 #define FCF_REDISC_EVT 0x100 /* FCF rediscovery event to worker thread */ 309 #define FCF_REDISC_FOV 0x200 /* Post FCF rediscovery fast failover */ 310 #define FCF_REDISC_PROG (FCF_REDISC_PEND | FCF_REDISC_EVT) 311 uint16_t fcf_redisc_attempted; 312 uint32_t addr_mode; 313 uint32_t eligible_fcf_cnt; 314 struct lpfc_fcf_rec current_rec; 315 struct lpfc_fcf_rec failover_rec; 316 struct list_head fcf_pri_list; 317 struct lpfc_fcf_pri fcf_pri[LPFC_SLI4_FCF_TBL_INDX_MAX]; 318 uint32_t current_fcf_scan_pri; 319 struct timer_list redisc_wait; 320 unsigned long *fcf_rr_bmask; /* Eligible FCF indexes for RR failover */ 321 }; 322 323 324 #define LPFC_REGION23_SIGNATURE "RG23" 325 #define LPFC_REGION23_VERSION 1 326 #define LPFC_REGION23_LAST_REC 0xff 327 #define DRIVER_SPECIFIC_TYPE 0xA2 328 #define LINUX_DRIVER_ID 0x20 329 #define PORT_STE_TYPE 0x1 330 331 struct lpfc_fip_param_hdr { 332 uint8_t type; 333 #define FCOE_PARAM_TYPE 0xA0 334 uint8_t length; 335 #define FCOE_PARAM_LENGTH 2 336 uint8_t parm_version; 337 #define FIPP_VERSION 0x01 338 uint8_t parm_flags; 339 #define lpfc_fip_param_hdr_fipp_mode_SHIFT 6 340 #define lpfc_fip_param_hdr_fipp_mode_MASK 0x3 341 #define lpfc_fip_param_hdr_fipp_mode_WORD parm_flags 342 #define FIPP_MODE_ON 0x1 343 #define FIPP_MODE_OFF 0x0 344 #define FIPP_VLAN_VALID 0x1 345 }; 346 347 struct lpfc_fcoe_params { 348 uint8_t fc_map[3]; 349 uint8_t reserved1; 350 uint16_t vlan_tag; 351 uint8_t reserved[2]; 352 }; 353 354 struct lpfc_fcf_conn_hdr { 355 uint8_t type; 356 #define FCOE_CONN_TBL_TYPE 0xA1 357 uint8_t length; /* words */ 358 uint8_t reserved[2]; 359 }; 360 361 struct lpfc_fcf_conn_rec { 362 uint16_t flags; 363 #define FCFCNCT_VALID 0x0001 364 #define FCFCNCT_BOOT 0x0002 365 #define FCFCNCT_PRIMARY 0x0004 /* if not set, Secondary */ 366 #define FCFCNCT_FBNM_VALID 0x0008 367 #define FCFCNCT_SWNM_VALID 0x0010 368 #define FCFCNCT_VLAN_VALID 0x0020 369 #define FCFCNCT_AM_VALID 0x0040 370 #define FCFCNCT_AM_PREFERRED 0x0080 /* if not set, AM Required */ 371 #define FCFCNCT_AM_SPMA 0x0100 /* if not set, FPMA */ 372 373 uint16_t vlan_tag; 374 uint8_t fabric_name[8]; 375 uint8_t switch_name[8]; 376 }; 377 378 struct lpfc_fcf_conn_entry { 379 struct list_head list; 380 struct lpfc_fcf_conn_rec conn_rec; 381 }; 382 383 /* 384 * Define the host's bootstrap mailbox. This structure contains 385 * the member attributes needed to create, use, and destroy the 386 * bootstrap mailbox region. 387 * 388 * The macro definitions for the bmbx data structure are defined 389 * in lpfc_hw4.h with the register definition. 390 */ 391 struct lpfc_bmbx { 392 struct lpfc_dmabuf *dmabuf; 393 struct dma_address dma_address; 394 void *avirt; 395 dma_addr_t aphys; 396 uint32_t bmbx_size; 397 }; 398 399 #define LPFC_EQE_SIZE LPFC_EQE_SIZE_4 400 401 #define LPFC_EQE_SIZE_4B 4 402 #define LPFC_EQE_SIZE_16B 16 403 #define LPFC_CQE_SIZE 16 404 #define LPFC_WQE_SIZE 64 405 #define LPFC_WQE128_SIZE 128 406 #define LPFC_MQE_SIZE 256 407 #define LPFC_RQE_SIZE 8 408 409 #define LPFC_EQE_DEF_COUNT 1024 410 #define LPFC_CQE_DEF_COUNT 1024 411 #define LPFC_CQE_EXP_COUNT 4096 412 #define LPFC_WQE_DEF_COUNT 256 413 #define LPFC_WQE_EXP_COUNT 1024 414 #define LPFC_MQE_DEF_COUNT 16 415 #define LPFC_RQE_DEF_COUNT 512 416 417 #define LPFC_QUEUE_NOARM false 418 #define LPFC_QUEUE_REARM true 419 420 421 /* 422 * SLI4 CT field defines 423 */ 424 #define SLI4_CT_RPI 0 425 #define SLI4_CT_VPI 1 426 #define SLI4_CT_VFI 2 427 #define SLI4_CT_FCFI 3 428 429 /* 430 * SLI4 specific data structures 431 */ 432 struct lpfc_max_cfg_param { 433 uint16_t max_xri; 434 uint16_t xri_base; 435 uint16_t xri_used; 436 uint16_t max_rpi; 437 uint16_t rpi_base; 438 uint16_t rpi_used; 439 uint16_t max_vpi; 440 uint16_t vpi_base; 441 uint16_t vpi_used; 442 uint16_t max_vfi; 443 uint16_t vfi_base; 444 uint16_t vfi_used; 445 uint16_t max_fcfi; 446 uint16_t fcfi_used; 447 uint16_t max_eq; 448 uint16_t max_rq; 449 uint16_t max_cq; 450 uint16_t max_wq; 451 }; 452 453 struct lpfc_hba; 454 /* SLI4 HBA multi-fcp queue handler struct */ 455 #define LPFC_SLI4_HANDLER_NAME_SZ 16 456 struct lpfc_hba_eq_hdl { 457 uint32_t idx; 458 char handler_name[LPFC_SLI4_HANDLER_NAME_SZ]; 459 struct lpfc_hba *phba; 460 struct lpfc_queue *eq; 461 }; 462 463 /*BB Credit recovery value*/ 464 struct lpfc_bbscn_params { 465 uint32_t word0; 466 #define lpfc_bbscn_min_SHIFT 0 467 #define lpfc_bbscn_min_MASK 0x0000000F 468 #define lpfc_bbscn_min_WORD word0 469 #define lpfc_bbscn_max_SHIFT 4 470 #define lpfc_bbscn_max_MASK 0x0000000F 471 #define lpfc_bbscn_max_WORD word0 472 #define lpfc_bbscn_def_SHIFT 8 473 #define lpfc_bbscn_def_MASK 0x0000000F 474 #define lpfc_bbscn_def_WORD word0 475 }; 476 477 /* Port Capabilities for SLI4 Parameters */ 478 struct lpfc_pc_sli4_params { 479 uint32_t supported; 480 uint32_t if_type; 481 uint32_t sli_rev; 482 uint32_t sli_family; 483 uint32_t featurelevel_1; 484 uint32_t featurelevel_2; 485 uint32_t proto_types; 486 #define LPFC_SLI4_PROTO_FCOE 0x0000001 487 #define LPFC_SLI4_PROTO_FC 0x0000002 488 #define LPFC_SLI4_PROTO_NIC 0x0000004 489 #define LPFC_SLI4_PROTO_ISCSI 0x0000008 490 #define LPFC_SLI4_PROTO_RDMA 0x0000010 491 uint32_t sge_supp_len; 492 uint32_t if_page_sz; 493 uint32_t rq_db_window; 494 uint32_t loopbk_scope; 495 uint32_t oas_supported; 496 uint32_t eq_pages_max; 497 uint32_t eqe_size; 498 uint32_t cq_pages_max; 499 uint32_t cqe_size; 500 uint32_t mq_pages_max; 501 uint32_t mqe_size; 502 uint32_t mq_elem_cnt; 503 uint32_t wq_pages_max; 504 uint32_t wqe_size; 505 uint32_t rq_pages_max; 506 uint32_t rqe_size; 507 uint32_t hdr_pages_max; 508 uint32_t hdr_size; 509 uint32_t hdr_pp_align; 510 uint32_t sgl_pages_max; 511 uint32_t sgl_pp_align; 512 uint8_t cqv; 513 uint8_t mqv; 514 uint8_t wqv; 515 uint8_t rqv; 516 uint8_t eqav; 517 uint8_t cqav; 518 uint8_t wqsize; 519 uint8_t bv1s; 520 #define LPFC_WQ_SZ64_SUPPORT 1 521 #define LPFC_WQ_SZ128_SUPPORT 2 522 uint8_t wqpcnt; 523 uint8_t nvme; 524 }; 525 526 #define LPFC_CQ_4K_PAGE_SZ 0x1 527 #define LPFC_CQ_16K_PAGE_SZ 0x4 528 #define LPFC_WQ_4K_PAGE_SZ 0x1 529 #define LPFC_WQ_16K_PAGE_SZ 0x4 530 531 struct lpfc_iov { 532 uint32_t pf_number; 533 uint32_t vf_number; 534 }; 535 536 struct lpfc_sli4_lnk_info { 537 uint8_t lnk_dv; 538 #define LPFC_LNK_DAT_INVAL 0 539 #define LPFC_LNK_DAT_VAL 1 540 uint8_t lnk_tp; 541 #define LPFC_LNK_GE 0x0 /* FCoE */ 542 #define LPFC_LNK_FC 0x1 /* FC */ 543 #define LPFC_LNK_FC_TRUNKED 0x2 /* FC_Trunked */ 544 uint8_t lnk_no; 545 uint8_t optic_state; 546 }; 547 548 #define LPFC_SLI4_HANDLER_CNT (LPFC_HBA_IO_CHAN_MAX+ \ 549 LPFC_FOF_IO_CHAN_NUM) 550 551 /* Used for IRQ vector to CPU mapping */ 552 struct lpfc_vector_map_info { 553 uint16_t phys_id; 554 uint16_t core_id; 555 uint16_t irq; 556 uint16_t eq; 557 uint16_t hdwq; 558 uint16_t flag; 559 #define LPFC_CPU_MAP_HYPER 0x1 560 #define LPFC_CPU_MAP_UNASSIGN 0x2 561 #define LPFC_CPU_FIRST_IRQ 0x4 562 }; 563 #define LPFC_VECTOR_MAP_EMPTY 0xffff 564 565 /* Multi-XRI pool */ 566 #define XRI_BATCH 8 567 568 struct lpfc_pbl_pool { 569 struct list_head list; 570 u32 count; 571 spinlock_t lock; /* lock for pbl_pool*/ 572 }; 573 574 struct lpfc_pvt_pool { 575 u32 low_watermark; 576 u32 high_watermark; 577 578 struct list_head list; 579 u32 count; 580 spinlock_t lock; /* lock for pvt_pool */ 581 }; 582 583 struct lpfc_multixri_pool { 584 u32 xri_limit; 585 586 /* Starting point when searching a pbl_pool with round-robin method */ 587 u32 rrb_next_hwqid; 588 589 /* Used by lpfc_adjust_pvt_pool_count. 590 * io_req_count is incremented by 1 during IO submission. The heartbeat 591 * handler uses these two variables to determine if pvt_pool is idle or 592 * busy. 593 */ 594 u32 prev_io_req_count; 595 u32 io_req_count; 596 597 /* statistics */ 598 u32 pbl_empty_count; 599 #ifdef LPFC_MXP_STAT 600 u32 above_limit_count; 601 u32 below_limit_count; 602 u32 local_pbl_hit_count; 603 u32 other_pbl_hit_count; 604 u32 stat_max_hwm; 605 606 #define LPFC_MXP_SNAPSHOT_TAKEN 3 /* snapshot is taken at 3rd heartbeats */ 607 u32 stat_pbl_count; 608 u32 stat_pvt_count; 609 u32 stat_busy_count; 610 u32 stat_snapshot_taken; 611 #endif 612 613 /* TODO: Separate pvt_pool into get and put list */ 614 struct lpfc_pbl_pool pbl_pool; /* Public free XRI pool */ 615 struct lpfc_pvt_pool pvt_pool; /* Private free XRI pool */ 616 }; 617 618 struct lpfc_fc4_ctrl_stat { 619 u32 input_requests; 620 u32 output_requests; 621 u32 control_requests; 622 u32 io_cmpls; 623 }; 624 625 #ifdef LPFC_HDWQ_LOCK_STAT 626 struct lpfc_lock_stat { 627 uint32_t alloc_xri_get; 628 uint32_t alloc_xri_put; 629 uint32_t free_xri; 630 uint32_t wq_access; 631 uint32_t alloc_pvt_pool; 632 uint32_t mv_from_pvt_pool; 633 uint32_t mv_to_pub_pool; 634 uint32_t mv_to_pvt_pool; 635 uint32_t free_pub_pool; 636 uint32_t free_pvt_pool; 637 }; 638 #endif 639 640 struct lpfc_eq_intr_info { 641 struct list_head list; 642 uint32_t icnt; 643 }; 644 645 /* SLI4 HBA data structure entries */ 646 struct lpfc_sli4_hdw_queue { 647 /* Pointers to the constructed SLI4 queues */ 648 struct lpfc_queue *hba_eq; /* Event queues for HBA */ 649 struct lpfc_queue *fcp_cq; /* Fast-path FCP compl queue */ 650 struct lpfc_queue *nvme_cq; /* Fast-path NVME compl queue */ 651 struct lpfc_queue *fcp_wq; /* Fast-path FCP work queue */ 652 struct lpfc_queue *nvme_wq; /* Fast-path NVME work queue */ 653 uint16_t fcp_cq_map; 654 uint16_t nvme_cq_map; 655 656 /* Keep track of IO buffers for this hardware queue */ 657 spinlock_t io_buf_list_get_lock; /* Common buf alloc list lock */ 658 struct list_head lpfc_io_buf_list_get; 659 spinlock_t io_buf_list_put_lock; /* Common buf free list lock */ 660 struct list_head lpfc_io_buf_list_put; 661 spinlock_t abts_scsi_buf_list_lock; /* list of aborted SCSI IOs */ 662 struct list_head lpfc_abts_scsi_buf_list; 663 spinlock_t abts_nvme_buf_list_lock; /* list of aborted NVME IOs */ 664 struct list_head lpfc_abts_nvme_buf_list; 665 uint32_t total_io_bufs; 666 uint32_t get_io_bufs; 667 uint32_t put_io_bufs; 668 uint32_t empty_io_bufs; 669 uint32_t abts_scsi_io_bufs; 670 uint32_t abts_nvme_io_bufs; 671 672 /* Multi-XRI pool per HWQ */ 673 struct lpfc_multixri_pool *p_multixri_pool; 674 675 /* FC-4 Stats counters */ 676 struct lpfc_fc4_ctrl_stat nvme_cstat; 677 struct lpfc_fc4_ctrl_stat scsi_cstat; 678 #ifdef LPFC_HDWQ_LOCK_STAT 679 struct lpfc_lock_stat lock_conflict; 680 #endif 681 682 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS 683 #define LPFC_CHECK_CPU_CNT 128 684 uint32_t cpucheck_rcv_io[LPFC_CHECK_CPU_CNT]; 685 uint32_t cpucheck_xmt_io[LPFC_CHECK_CPU_CNT]; 686 uint32_t cpucheck_cmpl_io[LPFC_CHECK_CPU_CNT]; 687 #endif 688 }; 689 690 #ifdef LPFC_HDWQ_LOCK_STAT 691 /* compile time trylock stats */ 692 #define lpfc_qp_spin_lock_irqsave(lock, flag, qp, lstat) \ 693 { \ 694 int only_once = 1; \ 695 while (spin_trylock_irqsave(lock, flag) == 0) { \ 696 if (only_once) { \ 697 only_once = 0; \ 698 qp->lock_conflict.lstat++; \ 699 } \ 700 } \ 701 } 702 #define lpfc_qp_spin_lock(lock, qp, lstat) \ 703 { \ 704 int only_once = 1; \ 705 while (spin_trylock(lock) == 0) { \ 706 if (only_once) { \ 707 only_once = 0; \ 708 qp->lock_conflict.lstat++; \ 709 } \ 710 } \ 711 } 712 #else 713 #define lpfc_qp_spin_lock_irqsave(lock, flag, qp, lstat) \ 714 spin_lock_irqsave(lock, flag) 715 #define lpfc_qp_spin_lock(lock, qp, lstat) spin_lock(lock) 716 #endif 717 718 struct lpfc_sli4_hba { 719 void __iomem *conf_regs_memmap_p; /* Kernel memory mapped address for 720 * config space registers 721 */ 722 void __iomem *ctrl_regs_memmap_p; /* Kernel memory mapped address for 723 * control registers 724 */ 725 void __iomem *drbl_regs_memmap_p; /* Kernel memory mapped address for 726 * doorbell registers 727 */ 728 void __iomem *dpp_regs_memmap_p; /* Kernel memory mapped address for 729 * dpp registers 730 */ 731 union { 732 struct { 733 /* IF Type 0, BAR 0 PCI cfg space reg mem map */ 734 void __iomem *UERRLOregaddr; 735 void __iomem *UERRHIregaddr; 736 void __iomem *UEMASKLOregaddr; 737 void __iomem *UEMASKHIregaddr; 738 } if_type0; 739 struct { 740 /* IF Type 2, BAR 0 PCI cfg space reg mem map. */ 741 void __iomem *STATUSregaddr; 742 void __iomem *CTRLregaddr; 743 void __iomem *ERR1regaddr; 744 #define SLIPORT_ERR1_REG_ERR_CODE_1 0x1 745 #define SLIPORT_ERR1_REG_ERR_CODE_2 0x2 746 void __iomem *ERR2regaddr; 747 #define SLIPORT_ERR2_REG_FW_RESTART 0x0 748 #define SLIPORT_ERR2_REG_FUNC_PROVISON 0x1 749 #define SLIPORT_ERR2_REG_FORCED_DUMP 0x2 750 #define SLIPORT_ERR2_REG_FAILURE_EQ 0x3 751 #define SLIPORT_ERR2_REG_FAILURE_CQ 0x4 752 #define SLIPORT_ERR2_REG_FAILURE_BUS 0x5 753 #define SLIPORT_ERR2_REG_FAILURE_RQ 0x6 754 void __iomem *EQDregaddr; 755 } if_type2; 756 } u; 757 758 /* IF type 0, BAR1 and if type 2, Bar 0 CSR register memory map */ 759 void __iomem *PSMPHRregaddr; 760 761 /* Well-known SLI INTF register memory map. */ 762 void __iomem *SLIINTFregaddr; 763 764 /* IF type 0, BAR 1 function CSR register memory map */ 765 void __iomem *ISRregaddr; /* HST_ISR register */ 766 void __iomem *IMRregaddr; /* HST_IMR register */ 767 void __iomem *ISCRregaddr; /* HST_ISCR register */ 768 /* IF type 0, BAR 0 and if type 2, BAR 0 doorbell register memory map */ 769 void __iomem *RQDBregaddr; /* RQ_DOORBELL register */ 770 void __iomem *WQDBregaddr; /* WQ_DOORBELL register */ 771 void __iomem *CQDBregaddr; /* CQ_DOORBELL register */ 772 void __iomem *EQDBregaddr; /* EQ_DOORBELL register */ 773 void __iomem *MQDBregaddr; /* MQ_DOORBELL register */ 774 void __iomem *BMBXregaddr; /* BootStrap MBX register */ 775 776 uint32_t ue_mask_lo; 777 uint32_t ue_mask_hi; 778 uint32_t ue_to_sr; 779 uint32_t ue_to_rp; 780 struct lpfc_register sli_intf; 781 struct lpfc_pc_sli4_params pc_sli4_params; 782 struct lpfc_bbscn_params bbscn_params; 783 struct lpfc_hba_eq_hdl *hba_eq_hdl; /* HBA per-WQ handle */ 784 785 void (*sli4_eq_clr_intr)(struct lpfc_queue *q); 786 void (*sli4_write_eq_db)(struct lpfc_hba *phba, struct lpfc_queue *eq, 787 uint32_t count, bool arm); 788 void (*sli4_write_cq_db)(struct lpfc_hba *phba, struct lpfc_queue *cq, 789 uint32_t count, bool arm); 790 791 /* Pointers to the constructed SLI4 queues */ 792 struct lpfc_sli4_hdw_queue *hdwq; 793 struct list_head lpfc_wq_list; 794 795 /* Pointers to the constructed SLI4 queues for NVMET */ 796 struct lpfc_queue **nvmet_cqset; /* Fast-path NVMET CQ Set queues */ 797 struct lpfc_queue **nvmet_mrq_hdr; /* Fast-path NVMET hdr MRQs */ 798 struct lpfc_queue **nvmet_mrq_data; /* Fast-path NVMET data MRQs */ 799 800 struct lpfc_queue *mbx_cq; /* Slow-path mailbox complete queue */ 801 struct lpfc_queue *els_cq; /* Slow-path ELS response complete queue */ 802 struct lpfc_queue *nvmels_cq; /* NVME LS complete queue */ 803 struct lpfc_queue *mbx_wq; /* Slow-path MBOX work queue */ 804 struct lpfc_queue *els_wq; /* Slow-path ELS work queue */ 805 struct lpfc_queue *nvmels_wq; /* NVME LS work queue */ 806 struct lpfc_queue *hdr_rq; /* Slow-path Header Receive queue */ 807 struct lpfc_queue *dat_rq; /* Slow-path Data Receive queue */ 808 809 struct lpfc_name wwnn; 810 struct lpfc_name wwpn; 811 812 uint32_t fw_func_mode; /* FW function protocol mode */ 813 uint32_t ulp0_mode; /* ULP0 protocol mode */ 814 uint32_t ulp1_mode; /* ULP1 protocol mode */ 815 816 /* Optimized Access Storage specific queues/structures */ 817 uint64_t oas_next_lun; 818 uint8_t oas_next_tgt_wwpn[8]; 819 uint8_t oas_next_vpt_wwpn[8]; 820 821 /* Setup information for various queue parameters */ 822 int eq_esize; 823 int eq_ecount; 824 int cq_esize; 825 int cq_ecount; 826 int wq_esize; 827 int wq_ecount; 828 int mq_esize; 829 int mq_ecount; 830 int rq_esize; 831 int rq_ecount; 832 #define LPFC_SP_EQ_MAX_INTR_SEC 10000 833 #define LPFC_FP_EQ_MAX_INTR_SEC 10000 834 835 uint32_t intr_enable; 836 struct lpfc_bmbx bmbx; 837 struct lpfc_max_cfg_param max_cfg_param; 838 uint16_t extents_in_use; /* must allocate resource extents. */ 839 uint16_t rpi_hdrs_in_use; /* must post rpi hdrs if set. */ 840 uint16_t next_xri; /* last_xri - max_cfg_param.xri_base = used */ 841 uint16_t next_rpi; 842 uint16_t io_xri_max; 843 uint16_t io_xri_cnt; 844 uint16_t io_xri_start; 845 uint16_t els_xri_cnt; 846 uint16_t nvmet_xri_cnt; 847 uint16_t nvmet_io_wait_cnt; 848 uint16_t nvmet_io_wait_total; 849 uint16_t cq_max; 850 struct lpfc_queue **cq_lookup; 851 struct list_head lpfc_els_sgl_list; 852 struct list_head lpfc_abts_els_sgl_list; 853 spinlock_t abts_scsi_buf_list_lock; /* list of aborted SCSI IOs */ 854 struct list_head lpfc_abts_scsi_buf_list; 855 struct list_head lpfc_nvmet_sgl_list; 856 spinlock_t abts_nvmet_buf_list_lock; /* list of aborted NVMET IOs */ 857 struct list_head lpfc_abts_nvmet_ctx_list; 858 spinlock_t t_active_list_lock; /* list of active NVMET IOs */ 859 struct list_head t_active_ctx_list; 860 struct list_head lpfc_nvmet_io_wait_list; 861 struct lpfc_nvmet_ctx_info *nvmet_ctx_info; 862 struct lpfc_sglq **lpfc_sglq_active_list; 863 struct list_head lpfc_rpi_hdr_list; 864 unsigned long *rpi_bmask; 865 uint16_t *rpi_ids; 866 uint16_t rpi_count; 867 struct list_head lpfc_rpi_blk_list; 868 unsigned long *xri_bmask; 869 uint16_t *xri_ids; 870 struct list_head lpfc_xri_blk_list; 871 unsigned long *vfi_bmask; 872 uint16_t *vfi_ids; 873 uint16_t vfi_count; 874 struct list_head lpfc_vfi_blk_list; 875 struct lpfc_sli4_flags sli4_flags; 876 struct list_head sp_queue_event; 877 struct list_head sp_cqe_event_pool; 878 struct list_head sp_asynce_work_queue; 879 struct list_head sp_fcp_xri_aborted_work_queue; 880 struct list_head sp_els_xri_aborted_work_queue; 881 struct list_head sp_unsol_work_queue; 882 struct lpfc_sli4_link link_state; 883 struct lpfc_sli4_lnk_info lnk_info; 884 uint32_t pport_name_sta; 885 #define LPFC_SLI4_PPNAME_NON 0 886 #define LPFC_SLI4_PPNAME_GET 1 887 struct lpfc_iov iov; 888 spinlock_t sgl_list_lock; /* list of aborted els IOs */ 889 spinlock_t nvmet_io_wait_lock; /* IOs waiting for ctx resources */ 890 uint32_t physical_port; 891 892 /* CPU to vector mapping information */ 893 struct lpfc_vector_map_info *cpu_map; 894 uint16_t num_possible_cpu; 895 uint16_t num_present_cpu; 896 uint16_t curr_disp_cpu; 897 struct lpfc_eq_intr_info __percpu *eq_info; 898 uint32_t conf_trunk; 899 #define lpfc_conf_trunk_port0_WORD conf_trunk 900 #define lpfc_conf_trunk_port0_SHIFT 0 901 #define lpfc_conf_trunk_port0_MASK 0x1 902 #define lpfc_conf_trunk_port1_WORD conf_trunk 903 #define lpfc_conf_trunk_port1_SHIFT 1 904 #define lpfc_conf_trunk_port1_MASK 0x1 905 #define lpfc_conf_trunk_port2_WORD conf_trunk 906 #define lpfc_conf_trunk_port2_SHIFT 2 907 #define lpfc_conf_trunk_port2_MASK 0x1 908 #define lpfc_conf_trunk_port3_WORD conf_trunk 909 #define lpfc_conf_trunk_port3_SHIFT 3 910 #define lpfc_conf_trunk_port3_MASK 0x1 911 #define lpfc_conf_trunk_port0_nd_WORD conf_trunk 912 #define lpfc_conf_trunk_port0_nd_SHIFT 4 913 #define lpfc_conf_trunk_port0_nd_MASK 0x1 914 #define lpfc_conf_trunk_port1_nd_WORD conf_trunk 915 #define lpfc_conf_trunk_port1_nd_SHIFT 5 916 #define lpfc_conf_trunk_port1_nd_MASK 0x1 917 #define lpfc_conf_trunk_port2_nd_WORD conf_trunk 918 #define lpfc_conf_trunk_port2_nd_SHIFT 6 919 #define lpfc_conf_trunk_port2_nd_MASK 0x1 920 #define lpfc_conf_trunk_port3_nd_WORD conf_trunk 921 #define lpfc_conf_trunk_port3_nd_SHIFT 7 922 #define lpfc_conf_trunk_port3_nd_MASK 0x1 923 }; 924 925 enum lpfc_sge_type { 926 GEN_BUFF_TYPE, 927 SCSI_BUFF_TYPE, 928 NVMET_BUFF_TYPE 929 }; 930 931 enum lpfc_sgl_state { 932 SGL_FREED, 933 SGL_ALLOCATED, 934 SGL_XRI_ABORTED 935 }; 936 937 struct lpfc_sglq { 938 /* lpfc_sglqs are used in double linked lists */ 939 struct list_head list; 940 struct list_head clist; 941 enum lpfc_sge_type buff_type; /* is this a scsi sgl */ 942 enum lpfc_sgl_state state; 943 struct lpfc_nodelist *ndlp; /* ndlp associated with IO */ 944 uint16_t iotag; /* pre-assigned IO tag */ 945 uint16_t sli4_lxritag; /* logical pre-assigned xri. */ 946 uint16_t sli4_xritag; /* pre-assigned XRI, (OXID) tag. */ 947 struct sli4_sge *sgl; /* pre-assigned SGL */ 948 void *virt; /* virtual address. */ 949 dma_addr_t phys; /* physical address */ 950 }; 951 952 struct lpfc_rpi_hdr { 953 struct list_head list; 954 uint32_t len; 955 struct lpfc_dmabuf *dmabuf; 956 uint32_t page_count; 957 uint32_t start_rpi; 958 uint16_t next_rpi; 959 }; 960 961 struct lpfc_rsrc_blks { 962 struct list_head list; 963 uint16_t rsrc_start; 964 uint16_t rsrc_size; 965 uint16_t rsrc_used; 966 }; 967 968 struct lpfc_rdp_context { 969 struct lpfc_nodelist *ndlp; 970 uint16_t ox_id; 971 uint16_t rx_id; 972 READ_LNK_VAR link_stat; 973 uint8_t page_a0[DMP_SFF_PAGE_A0_SIZE]; 974 uint8_t page_a2[DMP_SFF_PAGE_A2_SIZE]; 975 void (*cmpl)(struct lpfc_hba *, struct lpfc_rdp_context*, int); 976 }; 977 978 struct lpfc_lcb_context { 979 uint8_t sub_command; 980 uint8_t type; 981 uint8_t capability; 982 uint8_t frequency; 983 uint16_t duration; 984 uint16_t ox_id; 985 uint16_t rx_id; 986 struct lpfc_nodelist *ndlp; 987 }; 988 989 990 /* 991 * SLI4 specific function prototypes 992 */ 993 int lpfc_pci_function_reset(struct lpfc_hba *); 994 int lpfc_sli4_pdev_status_reg_wait(struct lpfc_hba *); 995 int lpfc_sli4_hba_setup(struct lpfc_hba *); 996 int lpfc_sli4_config(struct lpfc_hba *, struct lpfcMboxq *, uint8_t, 997 uint8_t, uint32_t, bool); 998 void lpfc_sli4_mbox_cmd_free(struct lpfc_hba *, struct lpfcMboxq *); 999 void lpfc_sli4_mbx_sge_set(struct lpfcMboxq *, uint32_t, dma_addr_t, uint32_t); 1000 void lpfc_sli4_mbx_sge_get(struct lpfcMboxq *, uint32_t, 1001 struct lpfc_mbx_sge *); 1002 int lpfc_sli4_mbx_read_fcf_rec(struct lpfc_hba *, struct lpfcMboxq *, 1003 uint16_t); 1004 1005 void lpfc_sli4_hba_reset(struct lpfc_hba *); 1006 struct lpfc_queue *lpfc_sli4_queue_alloc(struct lpfc_hba *phba, 1007 uint32_t page_size, 1008 uint32_t entry_size, 1009 uint32_t entry_count, int cpu); 1010 void lpfc_sli4_queue_free(struct lpfc_queue *); 1011 int lpfc_eq_create(struct lpfc_hba *, struct lpfc_queue *, uint32_t); 1012 void lpfc_modify_hba_eq_delay(struct lpfc_hba *phba, uint32_t startq, 1013 uint32_t numq, uint32_t usdelay); 1014 int lpfc_cq_create(struct lpfc_hba *, struct lpfc_queue *, 1015 struct lpfc_queue *, uint32_t, uint32_t); 1016 int lpfc_cq_create_set(struct lpfc_hba *phba, struct lpfc_queue **cqp, 1017 struct lpfc_sli4_hdw_queue *hdwq, uint32_t type, 1018 uint32_t subtype); 1019 int32_t lpfc_mq_create(struct lpfc_hba *, struct lpfc_queue *, 1020 struct lpfc_queue *, uint32_t); 1021 int lpfc_wq_create(struct lpfc_hba *, struct lpfc_queue *, 1022 struct lpfc_queue *, uint32_t); 1023 int lpfc_rq_create(struct lpfc_hba *, struct lpfc_queue *, 1024 struct lpfc_queue *, struct lpfc_queue *, uint32_t); 1025 int lpfc_mrq_create(struct lpfc_hba *phba, struct lpfc_queue **hrqp, 1026 struct lpfc_queue **drqp, struct lpfc_queue **cqp, 1027 uint32_t subtype); 1028 int lpfc_eq_destroy(struct lpfc_hba *, struct lpfc_queue *); 1029 int lpfc_cq_destroy(struct lpfc_hba *, struct lpfc_queue *); 1030 int lpfc_mq_destroy(struct lpfc_hba *, struct lpfc_queue *); 1031 int lpfc_wq_destroy(struct lpfc_hba *, struct lpfc_queue *); 1032 int lpfc_rq_destroy(struct lpfc_hba *, struct lpfc_queue *, 1033 struct lpfc_queue *); 1034 int lpfc_sli4_queue_setup(struct lpfc_hba *); 1035 void lpfc_sli4_queue_unset(struct lpfc_hba *); 1036 int lpfc_sli4_post_sgl(struct lpfc_hba *, dma_addr_t, dma_addr_t, uint16_t); 1037 int lpfc_repost_io_sgl_list(struct lpfc_hba *phba); 1038 uint16_t lpfc_sli4_next_xritag(struct lpfc_hba *); 1039 void lpfc_sli4_free_xri(struct lpfc_hba *, int); 1040 int lpfc_sli4_post_async_mbox(struct lpfc_hba *); 1041 struct lpfc_cq_event *__lpfc_sli4_cq_event_alloc(struct lpfc_hba *); 1042 struct lpfc_cq_event *lpfc_sli4_cq_event_alloc(struct lpfc_hba *); 1043 void __lpfc_sli4_cq_event_release(struct lpfc_hba *, struct lpfc_cq_event *); 1044 void lpfc_sli4_cq_event_release(struct lpfc_hba *, struct lpfc_cq_event *); 1045 int lpfc_sli4_init_rpi_hdrs(struct lpfc_hba *); 1046 int lpfc_sli4_post_rpi_hdr(struct lpfc_hba *, struct lpfc_rpi_hdr *); 1047 int lpfc_sli4_post_all_rpi_hdrs(struct lpfc_hba *); 1048 struct lpfc_rpi_hdr *lpfc_sli4_create_rpi_hdr(struct lpfc_hba *); 1049 void lpfc_sli4_remove_rpi_hdrs(struct lpfc_hba *); 1050 int lpfc_sli4_alloc_rpi(struct lpfc_hba *); 1051 void lpfc_sli4_free_rpi(struct lpfc_hba *, int); 1052 void lpfc_sli4_remove_rpis(struct lpfc_hba *); 1053 void lpfc_sli4_async_event_proc(struct lpfc_hba *); 1054 void lpfc_sli4_fcf_redisc_event_proc(struct lpfc_hba *); 1055 int lpfc_sli4_resume_rpi(struct lpfc_nodelist *, 1056 void (*)(struct lpfc_hba *, LPFC_MBOXQ_t *), void *); 1057 void lpfc_sli4_fcp_xri_abort_event_proc(struct lpfc_hba *); 1058 void lpfc_sli4_els_xri_abort_event_proc(struct lpfc_hba *); 1059 void lpfc_sli4_fcp_xri_aborted(struct lpfc_hba *, 1060 struct sli4_wcqe_xri_aborted *, int); 1061 void lpfc_sli4_nvme_xri_aborted(struct lpfc_hba *phba, 1062 struct sli4_wcqe_xri_aborted *axri, int idx); 1063 void lpfc_sli4_nvmet_xri_aborted(struct lpfc_hba *phba, 1064 struct sli4_wcqe_xri_aborted *axri); 1065 void lpfc_sli4_els_xri_aborted(struct lpfc_hba *, 1066 struct sli4_wcqe_xri_aborted *); 1067 void lpfc_sli4_vport_delete_els_xri_aborted(struct lpfc_vport *); 1068 void lpfc_sli4_vport_delete_fcp_xri_aborted(struct lpfc_vport *); 1069 int lpfc_sli4_brdreset(struct lpfc_hba *); 1070 int lpfc_sli4_add_fcf_record(struct lpfc_hba *, struct fcf_record *); 1071 void lpfc_sli_remove_dflt_fcf(struct lpfc_hba *); 1072 int lpfc_sli4_get_els_iocb_cnt(struct lpfc_hba *); 1073 int lpfc_sli4_get_iocb_cnt(struct lpfc_hba *phba); 1074 int lpfc_sli4_init_vpi(struct lpfc_vport *); 1075 void lpfc_sli4_eq_clr_intr(struct lpfc_queue *); 1076 void lpfc_sli4_write_cq_db(struct lpfc_hba *phba, struct lpfc_queue *q, 1077 uint32_t count, bool arm); 1078 void lpfc_sli4_write_eq_db(struct lpfc_hba *phba, struct lpfc_queue *q, 1079 uint32_t count, bool arm); 1080 void lpfc_sli4_if6_eq_clr_intr(struct lpfc_queue *q); 1081 void lpfc_sli4_if6_write_cq_db(struct lpfc_hba *phba, struct lpfc_queue *q, 1082 uint32_t count, bool arm); 1083 void lpfc_sli4_if6_write_eq_db(struct lpfc_hba *phba, struct lpfc_queue *q, 1084 uint32_t count, bool arm); 1085 void lpfc_sli4_fcfi_unreg(struct lpfc_hba *, uint16_t); 1086 int lpfc_sli4_fcf_scan_read_fcf_rec(struct lpfc_hba *, uint16_t); 1087 int lpfc_sli4_fcf_rr_read_fcf_rec(struct lpfc_hba *, uint16_t); 1088 int lpfc_sli4_read_fcf_rec(struct lpfc_hba *, uint16_t); 1089 void lpfc_mbx_cmpl_fcf_scan_read_fcf_rec(struct lpfc_hba *, LPFC_MBOXQ_t *); 1090 void lpfc_mbx_cmpl_fcf_rr_read_fcf_rec(struct lpfc_hba *, LPFC_MBOXQ_t *); 1091 void lpfc_mbx_cmpl_read_fcf_rec(struct lpfc_hba *, LPFC_MBOXQ_t *); 1092 int lpfc_sli4_unregister_fcf(struct lpfc_hba *); 1093 int lpfc_sli4_post_status_check(struct lpfc_hba *); 1094 uint8_t lpfc_sli_config_mbox_subsys_get(struct lpfc_hba *, LPFC_MBOXQ_t *); 1095 uint8_t lpfc_sli_config_mbox_opcode_get(struct lpfc_hba *, LPFC_MBOXQ_t *); 1096 void lpfc_sli4_ras_dma_free(struct lpfc_hba *phba); 1097 static inline void *lpfc_sli4_qe(struct lpfc_queue *q, uint16_t idx) 1098 { 1099 return q->q_pgs[idx / q->entry_cnt_per_pg] + 1100 (q->entry_size * (idx % q->entry_cnt_per_pg)); 1101 } 1102