xref: /openbmc/linux/drivers/scsi/ips.c (revision d5cb9783536a41df9f9cba5b0a1d78047ed787f7)
1 /*****************************************************************************/
2 /* ips.c -- driver for the Adaptec / IBM ServeRAID controller                */
3 /*                                                                           */
4 /* Written By: Keith Mitchell, IBM Corporation                               */
5 /*             Jack Hammer, Adaptec, Inc.                                    */
6 /*             David Jeffery, Adaptec, Inc.                                  */
7 /*                                                                           */
8 /* Copyright (C) 2000 IBM Corporation                                        */
9 /* Copyright (C) 2002,2003 Adaptec, Inc.                                     */
10 /*                                                                           */
11 /* This program is free software; you can redistribute it and/or modify      */
12 /* it under the terms of the GNU General Public License as published by      */
13 /* the Free Software Foundation; either version 2 of the License, or         */
14 /* (at your option) any later version.                                       */
15 /*                                                                           */
16 /* This program is distributed in the hope that it will be useful,           */
17 /* but WITHOUT ANY WARRANTY; without even the implied warranty of            */
18 /* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the             */
19 /* GNU General Public License for more details.                              */
20 /*                                                                           */
21 /* NO WARRANTY                                                               */
22 /* THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR        */
23 /* CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT      */
24 /* LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,      */
25 /* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is    */
26 /* solely responsible for determining the appropriateness of using and       */
27 /* distributing the Program and assumes all risks associated with its        */
28 /* exercise of rights under this Agreement, including but not limited to     */
29 /* the risks and costs of program errors, damage to or loss of data,         */
30 /* programs or equipment, and unavailability or interruption of operations.  */
31 /*                                                                           */
32 /* DISCLAIMER OF LIABILITY                                                   */
33 /* NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY   */
34 /* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL        */
35 /* DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND   */
36 /* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR     */
37 /* TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE    */
38 /* USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED  */
39 /* HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES             */
40 /*                                                                           */
41 /* You should have received a copy of the GNU General Public License         */
42 /* along with this program; if not, write to the Free Software               */
43 /* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA */
44 /*                                                                           */
45 /* Bugs/Comments/Suggestions about this driver should be mailed to:          */
46 /*      ipslinux@adaptec.com        	                                     */
47 /*                                                                           */
48 /* For system support issues, contact your local IBM Customer support.       */
49 /* Directions to find IBM Customer Support for each country can be found at: */
50 /*      http://www.ibm.com/planetwide/                                       */
51 /*                                                                           */
52 /*****************************************************************************/
53 
54 /*****************************************************************************/
55 /* Change Log                                                                */
56 /*                                                                           */
57 /* 0.99.02  - Breakup commands that are bigger than 8 * the stripe size      */
58 /* 0.99.03  - Make interrupt routine handle all completed request on the     */
59 /*            adapter not just the first one                                 */
60 /*          - Make sure passthru commands get woken up if we run out of      */
61 /*            SCBs                                                           */
62 /*          - Send all of the commands on the queue at once rather than      */
63 /*            one at a time since the card will support it.                  */
64 /* 0.99.04  - Fix race condition in the passthru mechanism -- this required  */
65 /*            the interface to the utilities to change                       */
66 /*          - Fix error recovery code                                        */
67 /* 0.99.05  - Fix an oops when we get certain passthru commands              */
68 /* 1.00.00  - Initial Public Release                                         */
69 /*            Functionally equivalent to 0.99.05                             */
70 /* 3.60.00  - Bump max commands to 128 for use with firmware 3.60            */
71 /*          - Change version to 3.60 to coincide with release numbering.     */
72 /* 3.60.01  - Remove bogus error check in passthru routine                   */
73 /* 3.60.02  - Make DCDB direction based on lookup table                      */
74 /*          - Only allow one DCDB command to a SCSI ID at a time             */
75 /* 4.00.00  - Add support for ServeRAID 4                                    */
76 /* 4.00.01  - Add support for First Failure Data Capture                     */
77 /* 4.00.02  - Fix problem with PT DCDB with no buffer                        */
78 /* 4.00.03  - Add alternative passthru interface                             */
79 /*          - Add ability to flash BIOS                                      */
80 /* 4.00.04  - Rename structures/constants to be prefixed with IPS_           */
81 /* 4.00.05  - Remove wish_block from init routine                            */
82 /*          - Use linux/spinlock.h instead of asm/spinlock.h for kernels     */
83 /*            2.3.18 and later                                               */
84 /*          - Sync with other changes from the 2.3 kernels                   */
85 /* 4.00.06  - Fix timeout with initial FFDC command                          */
86 /* 4.00.06a - Port to 2.4 (trivial) -- Christoph Hellwig <hch@infradead.org> */
87 /* 4.10.00  - Add support for ServeRAID 4M/4L                                */
88 /* 4.10.13  - Fix for dynamic unload and proc file system                    */
89 /* 4.20.03  - Rename version to coincide with new release schedules          */
90 /*            Performance fixes                                              */
91 /*            Fix truncation of /proc files with cat                         */
92 /*            Merge in changes through kernel 2.4.0test1ac21                 */
93 /* 4.20.13  - Fix some failure cases / reset code                            */
94 /*          - Hook into the reboot_notifier to flush the controller cache    */
95 /* 4.50.01  - Fix problem when there is a hole in logical drive numbering    */
96 /* 4.70.09  - Use a Common ( Large Buffer ) for Flashing from the JCRM CD    */
97 /*          - Add IPSSEND Flash Support                                      */
98 /*          - Set Sense Data for Unknown SCSI Command                        */
99 /*          - Use Slot Number from NVRAM Page 5                              */
100 /*          - Restore caller's DCDB Structure                                */
101 /* 4.70.12  - Corrective actions for bad controller ( during initialization )*/
102 /* 4.70.13  - Don't Send CDB's if we already know the device is not present  */
103 /*          - Don't release HA Lock in ips_next() until SC taken off queue   */
104 /*          - Unregister SCSI device in ips_release()                        */
105 /* 4.70.15  - Fix Breakup for very large ( non-SG ) requests in ips_done()   */
106 /* 4.71.00  - Change all memory allocations to not use GFP_DMA flag          */
107 /*            Code Clean-Up for 2.4.x kernel                                 */
108 /* 4.72.00  - Allow for a Scatter-Gather Element to exceed MAX_XFER Size     */
109 /* 4.72.01  - I/O Mapped Memory release ( so "insmod ips" does not Fail )    */
110 /*          - Don't Issue Internal FFDC Command if there are Active Commands */
111 /*          - Close Window for getting too many IOCTL's active               */
112 /* 4.80.00  - Make ia64 Safe                                                 */
113 /* 4.80.04  - Eliminate calls to strtok() if 2.4.x or greater                */
114 /*          - Adjustments to Device Queue Depth                              */
115 /* 4.80.14  - Take all semaphores off stack                                  */
116 /*          - Clean Up New_IOCTL path                                        */
117 /* 4.80.20  - Set max_sectors in Scsi_Host structure ( if >= 2.4.7 kernel )  */
118 /*          - 5 second delay needed after resetting an i960 adapter          */
119 /* 4.80.26  - Clean up potential code problems ( Arjan's recommendations )   */
120 /* 4.90.01  - Version Matching for FirmWare, BIOS, and Driver                */
121 /* 4.90.05  - Use New PCI Architecture to facilitate Hot Plug Development    */
122 /* 4.90.08  - Increase Delays in Flashing ( Trombone Only - 4H )             */
123 /* 4.90.08  - Data Corruption if First Scatter Gather Element is > 64K       */
124 /* 4.90.11  - Don't actually RESET unless it's physically required           */
125 /*          - Remove unused compile options                                  */
126 /* 5.00.01  - Sarasota ( 5i ) adapters must always be scanned first          */
127 /*          - Get rid on IOCTL_NEW_COMMAND code                              */
128 /*          - Add Extended DCDB Commands for Tape Support in 5I              */
129 /* 5.10.12  - use pci_dma interfaces, update for 2.5 kernel changes          */
130 /* 5.10.15  - remove unused code (sem, macros, etc.)                         */
131 /* 5.30.00  - use __devexit_p()                                              */
132 /* 6.00.00  - Add 6x Adapters and Battery Flash                              */
133 /* 6.10.00  - Remove 1G Addressing Limitations                               */
134 /* 6.11.xx  - Get VersionInfo buffer off the stack !              DDTS 60401 */
135 /* 6.11.xx  - Make Logical Drive Info structure safe for DMA      DDTS 60639 */
136 /* 7.10.18  - Add highmem_io flag in SCSI Templete for 2.4 kernels           */
137 /*          - Fix path/name for scsi_hosts.h include for 2.6 kernels         */
138 /*          - Fix sort order of 7k                                           */
139 /*          - Remove 3 unused "inline" functions                             */
140 /* 7.12.xx  - Use STATIC functions whereever possible                        */
141 /*          - Clean up deprecated MODULE_PARM calls                          */
142 /*****************************************************************************/
143 
144 /*
145  * Conditional Compilation directives for this driver:
146  *
147  * IPS_DEBUG            - Turn on debugging info
148  *
149  * Parameters:
150  *
151  * debug:<number>       - Set debug level to <number>
152  *                        NOTE: only works when IPS_DEBUG compile directive is used.
153  *       1              - Normal debug messages
154  *       2              - Verbose debug messages
155  *       11             - Method trace (non interrupt)
156  *       12             - Method trace (includes interrupt)
157  *
158  * noi2o                - Don't use I2O Queues (ServeRAID 4 only)
159  * nommap               - Don't use memory mapped I/O
160  * ioctlsize            - Initial size of the IOCTL buffer
161  */
162 
163 #include <asm/io.h>
164 #include <asm/byteorder.h>
165 #include <asm/page.h>
166 #include <linux/stddef.h>
167 #include <linux/version.h>
168 #include <linux/string.h>
169 #include <linux/errno.h>
170 #include <linux/kernel.h>
171 #include <linux/ioport.h>
172 #include <linux/slab.h>
173 #include <linux/delay.h>
174 #include <linux/pci.h>
175 #include <linux/proc_fs.h>
176 #include <linux/reboot.h>
177 #include <linux/interrupt.h>
178 
179 #include <linux/blkdev.h>
180 #include <linux/types.h>
181 
182 #include <scsi/sg.h>
183 
184 #include "scsi.h"
185 
186 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,5,0)
187 #include "hosts.h"
188 #else
189 #include <scsi/scsi_host.h>
190 #endif
191 
192 #include "ips.h"
193 
194 #include <linux/module.h>
195 
196 #include <linux/stat.h>
197 #include <linux/config.h>
198 
199 #include <linux/spinlock.h>
200 #include <linux/init.h>
201 
202 #include <linux/smp.h>
203 
204 #ifdef MODULE
205 static char *ips = NULL;
206 module_param(ips, charp, 0);
207 #endif
208 
209 /*
210  * DRIVER_VER
211  */
212 #define IPS_VERSION_HIGH        "7.12"
213 #define IPS_VERSION_LOW         ".02 "
214 
215 #if !defined(__i386__) && !defined(__ia64__) && !defined(__x86_64__)
216 #warning "This driver has only been tested on the x86/ia64/x86_64 platforms"
217 #endif
218 
219 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,5,0)
220 #include <linux/blk.h>
221 #include "sd.h"
222 #define IPS_LOCK_SAVE(lock,flags) spin_lock_irqsave(&io_request_lock,flags)
223 #define IPS_UNLOCK_RESTORE(lock,flags) spin_unlock_irqrestore(&io_request_lock,flags)
224 #ifndef __devexit_p
225 #define __devexit_p(x) x
226 #endif
227 #else
228 #define IPS_LOCK_SAVE(lock,flags) do{spin_lock(lock);(void)flags;}while(0)
229 #define IPS_UNLOCK_RESTORE(lock,flags) do{spin_unlock(lock);(void)flags;}while(0)
230 #endif
231 
232 #define IPS_DMA_DIR(scb) ((!scb->scsi_cmd || ips_is_passthru(scb->scsi_cmd) || \
233                          DMA_NONE == scb->scsi_cmd->sc_data_direction) ? \
234                          PCI_DMA_BIDIRECTIONAL : \
235                          scb->scsi_cmd->sc_data_direction)
236 
237 #ifdef IPS_DEBUG
238 #define METHOD_TRACE(s, i)    if (ips_debug >= (i+10)) printk(KERN_NOTICE s "\n");
239 #define DEBUG(i, s)           if (ips_debug >= i) printk(KERN_NOTICE s "\n");
240 #define DEBUG_VAR(i, s, v...) if (ips_debug >= i) printk(KERN_NOTICE s "\n", v);
241 #else
242 #define METHOD_TRACE(s, i)
243 #define DEBUG(i, s)
244 #define DEBUG_VAR(i, s, v...)
245 #endif
246 
247 /*
248  * Function prototypes
249  */
250 static int ips_detect(Scsi_Host_Template *);
251 static int ips_release(struct Scsi_Host *);
252 static int ips_eh_abort(Scsi_Cmnd *);
253 static int ips_eh_reset(Scsi_Cmnd *);
254 static int ips_queue(Scsi_Cmnd *, void (*)(Scsi_Cmnd *));
255 static const char *ips_info(struct Scsi_Host *);
256 static irqreturn_t do_ipsintr(int, void *, struct pt_regs *);
257 static int ips_hainit(ips_ha_t *);
258 static int ips_map_status(ips_ha_t *, ips_scb_t *, ips_stat_t *);
259 static int ips_send_wait(ips_ha_t *, ips_scb_t *, int, int);
260 static int ips_send_cmd(ips_ha_t *, ips_scb_t *);
261 static int ips_online(ips_ha_t *, ips_scb_t *);
262 static int ips_inquiry(ips_ha_t *, ips_scb_t *);
263 static int ips_rdcap(ips_ha_t *, ips_scb_t *);
264 static int ips_msense(ips_ha_t *, ips_scb_t *);
265 static int ips_reqsen(ips_ha_t *, ips_scb_t *);
266 static int ips_deallocatescbs(ips_ha_t *, int);
267 static int ips_allocatescbs(ips_ha_t *);
268 static int ips_reset_copperhead(ips_ha_t *);
269 static int ips_reset_copperhead_memio(ips_ha_t *);
270 static int ips_reset_morpheus(ips_ha_t *);
271 static int ips_issue_copperhead(ips_ha_t *, ips_scb_t *);
272 static int ips_issue_copperhead_memio(ips_ha_t *, ips_scb_t *);
273 static int ips_issue_i2o(ips_ha_t *, ips_scb_t *);
274 static int ips_issue_i2o_memio(ips_ha_t *, ips_scb_t *);
275 static int ips_isintr_copperhead(ips_ha_t *);
276 static int ips_isintr_copperhead_memio(ips_ha_t *);
277 static int ips_isintr_morpheus(ips_ha_t *);
278 static int ips_wait(ips_ha_t *, int, int);
279 static int ips_write_driver_status(ips_ha_t *, int);
280 static int ips_read_adapter_status(ips_ha_t *, int);
281 static int ips_read_subsystem_parameters(ips_ha_t *, int);
282 static int ips_read_config(ips_ha_t *, int);
283 static int ips_clear_adapter(ips_ha_t *, int);
284 static int ips_readwrite_page5(ips_ha_t *, int, int);
285 static int ips_init_copperhead(ips_ha_t *);
286 static int ips_init_copperhead_memio(ips_ha_t *);
287 static int ips_init_morpheus(ips_ha_t *);
288 static int ips_isinit_copperhead(ips_ha_t *);
289 static int ips_isinit_copperhead_memio(ips_ha_t *);
290 static int ips_isinit_morpheus(ips_ha_t *);
291 static int ips_erase_bios(ips_ha_t *);
292 static int ips_program_bios(ips_ha_t *, char *, uint32_t, uint32_t);
293 static int ips_verify_bios(ips_ha_t *, char *, uint32_t, uint32_t);
294 static int ips_erase_bios_memio(ips_ha_t *);
295 static int ips_program_bios_memio(ips_ha_t *, char *, uint32_t, uint32_t);
296 static int ips_verify_bios_memio(ips_ha_t *, char *, uint32_t, uint32_t);
297 static int ips_flash_copperhead(ips_ha_t *, ips_passthru_t *, ips_scb_t *);
298 static int ips_flash_bios(ips_ha_t *, ips_passthru_t *, ips_scb_t *);
299 static int ips_flash_firmware(ips_ha_t *, ips_passthru_t *, ips_scb_t *);
300 static void ips_free_flash_copperhead(ips_ha_t * ha);
301 static void ips_get_bios_version(ips_ha_t *, int);
302 static void ips_identify_controller(ips_ha_t *);
303 static void ips_chkstatus(ips_ha_t *, IPS_STATUS *);
304 static void ips_enable_int_copperhead(ips_ha_t *);
305 static void ips_enable_int_copperhead_memio(ips_ha_t *);
306 static void ips_enable_int_morpheus(ips_ha_t *);
307 static int ips_intr_copperhead(ips_ha_t *);
308 static int ips_intr_morpheus(ips_ha_t *);
309 static void ips_next(ips_ha_t *, int);
310 static void ipsintr_blocking(ips_ha_t *, struct ips_scb *);
311 static void ipsintr_done(ips_ha_t *, struct ips_scb *);
312 static void ips_done(ips_ha_t *, ips_scb_t *);
313 static void ips_free(ips_ha_t *);
314 static void ips_init_scb(ips_ha_t *, ips_scb_t *);
315 static void ips_freescb(ips_ha_t *, ips_scb_t *);
316 static void ips_setup_funclist(ips_ha_t *);
317 static void ips_statinit(ips_ha_t *);
318 static void ips_statinit_memio(ips_ha_t *);
319 static void ips_fix_ffdc_time(ips_ha_t *, ips_scb_t *, time_t);
320 static void ips_ffdc_reset(ips_ha_t *, int);
321 static void ips_ffdc_time(ips_ha_t *);
322 static uint32_t ips_statupd_copperhead(ips_ha_t *);
323 static uint32_t ips_statupd_copperhead_memio(ips_ha_t *);
324 static uint32_t ips_statupd_morpheus(ips_ha_t *);
325 static ips_scb_t *ips_getscb(ips_ha_t *);
326 static void ips_putq_scb_head(ips_scb_queue_t *, ips_scb_t *);
327 static void ips_putq_wait_tail(ips_wait_queue_t *, Scsi_Cmnd *);
328 static void ips_putq_copp_tail(ips_copp_queue_t *,
329 				      ips_copp_wait_item_t *);
330 static ips_scb_t *ips_removeq_scb_head(ips_scb_queue_t *);
331 static ips_scb_t *ips_removeq_scb(ips_scb_queue_t *, ips_scb_t *);
332 static Scsi_Cmnd *ips_removeq_wait_head(ips_wait_queue_t *);
333 static Scsi_Cmnd *ips_removeq_wait(ips_wait_queue_t *, Scsi_Cmnd *);
334 static ips_copp_wait_item_t *ips_removeq_copp(ips_copp_queue_t *,
335 						     ips_copp_wait_item_t *);
336 static ips_copp_wait_item_t *ips_removeq_copp_head(ips_copp_queue_t *);
337 
338 static int ips_is_passthru(Scsi_Cmnd *);
339 static int ips_make_passthru(ips_ha_t *, Scsi_Cmnd *, ips_scb_t *, int);
340 static int ips_usrcmd(ips_ha_t *, ips_passthru_t *, ips_scb_t *);
341 static void ips_cleanup_passthru(ips_ha_t *, ips_scb_t *);
342 static void ips_scmd_buf_write(Scsi_Cmnd * scmd, void *data,
343 			       unsigned int count);
344 static void ips_scmd_buf_read(Scsi_Cmnd * scmd, void *data, unsigned int count);
345 
346 static int ips_proc_info(struct Scsi_Host *, char *, char **, off_t, int, int);
347 static int ips_host_info(ips_ha_t *, char *, off_t, int);
348 static void copy_mem_info(IPS_INFOSTR *, char *, int);
349 static int copy_info(IPS_INFOSTR *, char *, ...);
350 static int ips_get_version_info(ips_ha_t * ha, dma_addr_t, int intr);
351 static void ips_version_check(ips_ha_t * ha, int intr);
352 static int ips_abort_init(ips_ha_t * ha, int index);
353 static int ips_init_phase2(int index);
354 
355 static int ips_init_phase1(struct pci_dev *pci_dev, int *indexPtr);
356 static int ips_register_scsi(int index);
357 
358 static int  ips_poll_for_flush_complete(ips_ha_t * ha);
359 static void ips_flush_and_reset(ips_ha_t *ha);
360 
361 /*
362  * global variables
363  */
364 static const char ips_name[] = "ips";
365 static struct Scsi_Host *ips_sh[IPS_MAX_ADAPTERS];	/* Array of host controller structures */
366 static ips_ha_t *ips_ha[IPS_MAX_ADAPTERS];	/* Array of HA structures */
367 static unsigned int ips_next_controller;
368 static unsigned int ips_num_controllers;
369 static unsigned int ips_released_controllers;
370 static int ips_hotplug;
371 static int ips_cmd_timeout = 60;
372 static int ips_reset_timeout = 60 * 5;
373 static int ips_force_memio = 1;		/* Always use Memory Mapped I/O    */
374 static int ips_force_i2o = 1;	/* Always use I2O command delivery */
375 static int ips_ioctlsize = IPS_IOCTL_SIZE;	/* Size of the ioctl buffer        */
376 static int ips_cd_boot;			/* Booting from Manager CD         */
377 static char *ips_FlashData = NULL;	/* CD Boot - Flash Data Buffer      */
378 static dma_addr_t ips_flashbusaddr;
379 static long ips_FlashDataInUse;		/* CD Boot - Flash Data In Use Flag */
380 static uint32_t MaxLiteCmds = 32;	/* Max Active Cmds for a Lite Adapter */
381 static Scsi_Host_Template ips_driver_template = {
382 	.detect			= ips_detect,
383 	.release		= ips_release,
384 	.info			= ips_info,
385 	.queuecommand		= ips_queue,
386 	.eh_abort_handler	= ips_eh_abort,
387 	.eh_host_reset_handler	= ips_eh_reset,
388 	.proc_name		= "ips",
389 #if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
390 	.proc_info		= ips_proc_info,
391 	.slave_configure	= ips_slave_configure,
392 #else
393 	.proc_info		= ips_proc24_info,
394 	.select_queue_depths	= ips_select_queue_depth,
395 #endif
396 	.bios_param		= ips_biosparam,
397 	.this_id		= -1,
398 	.sg_tablesize		= IPS_MAX_SG,
399 	.cmd_per_lun		= 3,
400 	.use_clustering		= ENABLE_CLUSTERING,
401 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
402 	.use_new_eh_code	= 1,
403 #endif
404 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,20)  &&  LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
405     .highmem_io          = 1,
406 #endif
407 };
408 
409 static IPS_DEFINE_COMPAT_TABLE( Compatable );	/* Version Compatability Table      */
410 
411 
412 /* This table describes all ServeRAID Adapters */
413 static struct  pci_device_id  ips_pci_table[] = {
414 	{ 0x1014, 0x002E, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
415 	{ 0x1014, 0x01BD, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
416 	{ 0x9005, 0x0250, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
417 	{ 0, }
418 };
419 
420 MODULE_DEVICE_TABLE( pci, ips_pci_table );
421 
422 static char ips_hot_plug_name[] = "ips";
423 
424 static int __devinit  ips_insert_device(struct pci_dev *pci_dev, const struct pci_device_id *ent);
425 static void __devexit ips_remove_device(struct pci_dev *pci_dev);
426 
427 static struct pci_driver ips_pci_driver = {
428 	.name		= ips_hot_plug_name,
429 	.id_table	= ips_pci_table,
430 	.probe		= ips_insert_device,
431 	.remove		= __devexit_p(ips_remove_device),
432 };
433 
434 
435 /*
436  * Necessary forward function protoypes
437  */
438 static int ips_halt(struct notifier_block *nb, ulong event, void *buf);
439 
440 #define MAX_ADAPTER_NAME 15
441 
442 static char ips_adapter_name[][30] = {
443 	"ServeRAID",
444 	"ServeRAID II",
445 	"ServeRAID on motherboard",
446 	"ServeRAID on motherboard",
447 	"ServeRAID 3H",
448 	"ServeRAID 3L",
449 	"ServeRAID 4H",
450 	"ServeRAID 4M",
451 	"ServeRAID 4L",
452 	"ServeRAID 4Mx",
453 	"ServeRAID 4Lx",
454 	"ServeRAID 5i",
455 	"ServeRAID 5i",
456 	"ServeRAID 6M",
457 	"ServeRAID 6i",
458 	"ServeRAID 7t",
459 	"ServeRAID 7k",
460 	"ServeRAID 7M"
461 };
462 
463 static struct notifier_block ips_notifier = {
464 	ips_halt, NULL, 0
465 };
466 
467 /*
468  * Direction table
469  */
470 static char ips_command_direction[] = {
471 	IPS_DATA_NONE, IPS_DATA_NONE, IPS_DATA_IN, IPS_DATA_IN, IPS_DATA_OUT,
472 	IPS_DATA_IN, IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_IN, IPS_DATA_UNK,
473 	IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
474 	IPS_DATA_IN, IPS_DATA_NONE, IPS_DATA_NONE, IPS_DATA_IN, IPS_DATA_OUT,
475 	IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_NONE, IPS_DATA_NONE, IPS_DATA_OUT,
476 	IPS_DATA_NONE, IPS_DATA_IN, IPS_DATA_NONE, IPS_DATA_IN, IPS_DATA_OUT,
477 	IPS_DATA_NONE, IPS_DATA_UNK, IPS_DATA_IN, IPS_DATA_UNK, IPS_DATA_IN,
478 	IPS_DATA_UNK, IPS_DATA_OUT, IPS_DATA_IN, IPS_DATA_UNK, IPS_DATA_UNK,
479 	IPS_DATA_IN, IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_NONE, IPS_DATA_UNK,
480 	IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_OUT,
481 	IPS_DATA_OUT, IPS_DATA_NONE, IPS_DATA_IN, IPS_DATA_NONE, IPS_DATA_NONE,
482 	IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_OUT,
483 	IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_OUT,
484 	IPS_DATA_OUT, IPS_DATA_IN, IPS_DATA_IN, IPS_DATA_IN, IPS_DATA_NONE,
485 	IPS_DATA_UNK, IPS_DATA_NONE, IPS_DATA_NONE, IPS_DATA_NONE, IPS_DATA_UNK,
486 	IPS_DATA_NONE, IPS_DATA_OUT, IPS_DATA_IN, IPS_DATA_UNK, IPS_DATA_UNK,
487 	IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
488 	IPS_DATA_OUT, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
489 	IPS_DATA_IN, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
490 	IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
491 	IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
492 	IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
493 	IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
494 	IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
495 	IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
496 	IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
497 	IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
498 	IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
499 	IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
500 	IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
501 	IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
502 	IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
503 	IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
504 	IPS_DATA_NONE, IPS_DATA_NONE, IPS_DATA_UNK, IPS_DATA_IN, IPS_DATA_NONE,
505 	IPS_DATA_OUT, IPS_DATA_UNK, IPS_DATA_NONE, IPS_DATA_UNK, IPS_DATA_OUT,
506 	IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_NONE,
507 	IPS_DATA_UNK, IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_IN, IPS_DATA_IN,
508 	IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
509 	IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
510 	IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
511 	IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
512 	IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
513 	IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
514 	IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
515 	IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
516 	IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
517 	IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_OUT,
518 	IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
519 	IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
520 	IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
521 	IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK
522 };
523 
524 
525 /****************************************************************************/
526 /*                                                                          */
527 /* Routine Name: ips_setup                                                  */
528 /*                                                                          */
529 /* Routine Description:                                                     */
530 /*                                                                          */
531 /*   setup parameters to the driver                                         */
532 /*                                                                          */
533 /****************************************************************************/
534 static int
535 ips_setup(char *ips_str)
536 {
537 
538 	int i;
539 	char *key;
540 	char *value;
541 	IPS_OPTION options[] = {
542 		{"noi2o", &ips_force_i2o, 0},
543 		{"nommap", &ips_force_memio, 0},
544 		{"ioctlsize", &ips_ioctlsize, IPS_IOCTL_SIZE},
545 		{"cdboot", &ips_cd_boot, 0},
546 		{"maxcmds", &MaxLiteCmds, 32},
547 	};
548 
549 	/* Don't use strtok() anymore ( if 2.4 Kernel or beyond ) */
550 	/* Search for value */
551 	while ((key = strsep(&ips_str, ",."))) {
552 		if (!*key)
553 			continue;
554 		value = strchr(key, ':');
555 		if (value)
556 			*value++ = '\0';
557 		/*
558 		 * We now have key/value pairs.
559 		 * Update the variables
560 		 */
561 		for (i = 0; i < (sizeof (options) / sizeof (options[0])); i++) {
562 			if (strnicmp
563 			    (key, options[i].option_name,
564 			     strlen(options[i].option_name)) == 0) {
565 				if (value)
566 					*options[i].option_flag =
567 					    simple_strtoul(value, NULL, 0);
568 				else
569 					*options[i].option_flag =
570 					    options[i].option_value;
571 				break;
572 			}
573 		}
574 	}
575 
576 	return (1);
577 }
578 
579 __setup("ips=", ips_setup);
580 
581 /****************************************************************************/
582 /*                                                                          */
583 /* Routine Name: ips_detect                                                 */
584 /*                                                                          */
585 /* Routine Description:                                                     */
586 /*                                                                          */
587 /*   Detect and initialize the driver                                       */
588 /*                                                                          */
589 /* NOTE: this routine is called under the io_request_lock spinlock          */
590 /*                                                                          */
591 /****************************************************************************/
592 static int
593 ips_detect(Scsi_Host_Template * SHT)
594 {
595 	int i;
596 
597 	METHOD_TRACE("ips_detect", 1);
598 
599 #ifdef MODULE
600 	if (ips)
601 		ips_setup(ips);
602 #endif
603 
604 	for (i = 0; i < ips_num_controllers; i++) {
605 		if (ips_register_scsi(i))
606 			ips_free(ips_ha[i]);
607 		ips_released_controllers++;
608 	}
609 	ips_hotplug = 1;
610 	return (ips_num_controllers);
611 }
612 
613 /****************************************************************************/
614 /*   configure the function pointers to use the functions that will work    */
615 /*   with the found version of the adapter                                  */
616 /****************************************************************************/
617 static void
618 ips_setup_funclist(ips_ha_t * ha)
619 {
620 
621 	/*
622 	 * Setup Functions
623 	 */
624 	if (IPS_IS_MORPHEUS(ha) || IPS_IS_MARCO(ha)) {
625 		/* morpheus / marco / sebring */
626 		ha->func.isintr = ips_isintr_morpheus;
627 		ha->func.isinit = ips_isinit_morpheus;
628 		ha->func.issue = ips_issue_i2o_memio;
629 		ha->func.init = ips_init_morpheus;
630 		ha->func.statupd = ips_statupd_morpheus;
631 		ha->func.reset = ips_reset_morpheus;
632 		ha->func.intr = ips_intr_morpheus;
633 		ha->func.enableint = ips_enable_int_morpheus;
634 	} else if (IPS_USE_MEMIO(ha)) {
635 		/* copperhead w/MEMIO */
636 		ha->func.isintr = ips_isintr_copperhead_memio;
637 		ha->func.isinit = ips_isinit_copperhead_memio;
638 		ha->func.init = ips_init_copperhead_memio;
639 		ha->func.statupd = ips_statupd_copperhead_memio;
640 		ha->func.statinit = ips_statinit_memio;
641 		ha->func.reset = ips_reset_copperhead_memio;
642 		ha->func.intr = ips_intr_copperhead;
643 		ha->func.erasebios = ips_erase_bios_memio;
644 		ha->func.programbios = ips_program_bios_memio;
645 		ha->func.verifybios = ips_verify_bios_memio;
646 		ha->func.enableint = ips_enable_int_copperhead_memio;
647 		if (IPS_USE_I2O_DELIVER(ha))
648 			ha->func.issue = ips_issue_i2o_memio;
649 		else
650 			ha->func.issue = ips_issue_copperhead_memio;
651 	} else {
652 		/* copperhead */
653 		ha->func.isintr = ips_isintr_copperhead;
654 		ha->func.isinit = ips_isinit_copperhead;
655 		ha->func.init = ips_init_copperhead;
656 		ha->func.statupd = ips_statupd_copperhead;
657 		ha->func.statinit = ips_statinit;
658 		ha->func.reset = ips_reset_copperhead;
659 		ha->func.intr = ips_intr_copperhead;
660 		ha->func.erasebios = ips_erase_bios;
661 		ha->func.programbios = ips_program_bios;
662 		ha->func.verifybios = ips_verify_bios;
663 		ha->func.enableint = ips_enable_int_copperhead;
664 
665 		if (IPS_USE_I2O_DELIVER(ha))
666 			ha->func.issue = ips_issue_i2o;
667 		else
668 			ha->func.issue = ips_issue_copperhead;
669 	}
670 }
671 
672 /****************************************************************************/
673 /*                                                                          */
674 /* Routine Name: ips_release                                                */
675 /*                                                                          */
676 /* Routine Description:                                                     */
677 /*                                                                          */
678 /*   Remove a driver                                                        */
679 /*                                                                          */
680 /****************************************************************************/
681 static int
682 ips_release(struct Scsi_Host *sh)
683 {
684 	ips_scb_t *scb;
685 	ips_ha_t *ha;
686 	int i;
687 
688 	METHOD_TRACE("ips_release", 1);
689 
690 	for (i = 0; i < IPS_MAX_ADAPTERS && ips_sh[i] != sh; i++) ;
691 
692 	if (i == IPS_MAX_ADAPTERS) {
693 		printk(KERN_WARNING
694 		       "(%s) release, invalid Scsi_Host pointer.\n", ips_name);
695 		BUG();
696 		return (FALSE);
697 	}
698 
699 	ha = IPS_HA(sh);
700 
701 	if (!ha)
702 		return (FALSE);
703 
704 	/* flush the cache on the controller */
705 	scb = &ha->scbs[ha->max_cmds - 1];
706 
707 	ips_init_scb(ha, scb);
708 
709 	scb->timeout = ips_cmd_timeout;
710 	scb->cdb[0] = IPS_CMD_FLUSH;
711 
712 	scb->cmd.flush_cache.op_code = IPS_CMD_FLUSH;
713 	scb->cmd.flush_cache.command_id = IPS_COMMAND_ID(ha, scb);
714 	scb->cmd.flush_cache.state = IPS_NORM_STATE;
715 	scb->cmd.flush_cache.reserved = 0;
716 	scb->cmd.flush_cache.reserved2 = 0;
717 	scb->cmd.flush_cache.reserved3 = 0;
718 	scb->cmd.flush_cache.reserved4 = 0;
719 
720 	IPS_PRINTK(KERN_WARNING, ha->pcidev, "Flushing Cache.\n");
721 
722 	/* send command */
723 	if (ips_send_wait(ha, scb, ips_cmd_timeout, IPS_INTR_ON) == IPS_FAILURE)
724 		IPS_PRINTK(KERN_WARNING, ha->pcidev, "Incomplete Flush.\n");
725 
726 	IPS_PRINTK(KERN_WARNING, ha->pcidev, "Flushing Complete.\n");
727 
728 	ips_sh[i] = NULL;
729 	ips_ha[i] = NULL;
730 
731 	/* free extra memory */
732 	ips_free(ha);
733 
734 	/* Free I/O Region */
735 	if (ha->io_addr)
736 		release_region(ha->io_addr, ha->io_len);
737 
738 	/* free IRQ */
739 	free_irq(ha->irq, ha);
740 
741 	IPS_REMOVE_HOST(sh);
742 	scsi_host_put(sh);
743 
744 	ips_released_controllers++;
745 
746 	return (FALSE);
747 }
748 
749 /****************************************************************************/
750 /*                                                                          */
751 /* Routine Name: ips_halt                                                   */
752 /*                                                                          */
753 /* Routine Description:                                                     */
754 /*                                                                          */
755 /*   Perform cleanup when the system reboots                                */
756 /*                                                                          */
757 /****************************************************************************/
758 static int
759 ips_halt(struct notifier_block *nb, ulong event, void *buf)
760 {
761 	ips_scb_t *scb;
762 	ips_ha_t *ha;
763 	int i;
764 
765 	if ((event != SYS_RESTART) && (event != SYS_HALT) &&
766 	    (event != SYS_POWER_OFF))
767 		return (NOTIFY_DONE);
768 
769 	for (i = 0; i < ips_next_controller; i++) {
770 		ha = (ips_ha_t *) ips_ha[i];
771 
772 		if (!ha)
773 			continue;
774 
775 		if (!ha->active)
776 			continue;
777 
778 		/* flush the cache on the controller */
779 		scb = &ha->scbs[ha->max_cmds - 1];
780 
781 		ips_init_scb(ha, scb);
782 
783 		scb->timeout = ips_cmd_timeout;
784 		scb->cdb[0] = IPS_CMD_FLUSH;
785 
786 		scb->cmd.flush_cache.op_code = IPS_CMD_FLUSH;
787 		scb->cmd.flush_cache.command_id = IPS_COMMAND_ID(ha, scb);
788 		scb->cmd.flush_cache.state = IPS_NORM_STATE;
789 		scb->cmd.flush_cache.reserved = 0;
790 		scb->cmd.flush_cache.reserved2 = 0;
791 		scb->cmd.flush_cache.reserved3 = 0;
792 		scb->cmd.flush_cache.reserved4 = 0;
793 
794 		IPS_PRINTK(KERN_WARNING, ha->pcidev, "Flushing Cache.\n");
795 
796 		/* send command */
797 		if (ips_send_wait(ha, scb, ips_cmd_timeout, IPS_INTR_ON) ==
798 		    IPS_FAILURE)
799 			IPS_PRINTK(KERN_WARNING, ha->pcidev,
800 				   "Incomplete Flush.\n");
801 		else
802 			IPS_PRINTK(KERN_WARNING, ha->pcidev,
803 				   "Flushing Complete.\n");
804 	}
805 
806 	return (NOTIFY_OK);
807 }
808 
809 /****************************************************************************/
810 /*                                                                          */
811 /* Routine Name: ips_eh_abort                                               */
812 /*                                                                          */
813 /* Routine Description:                                                     */
814 /*                                                                          */
815 /*   Abort a command (using the new error code stuff)                       */
816 /* Note: this routine is called under the io_request_lock                   */
817 /****************************************************************************/
818 int
819 ips_eh_abort(Scsi_Cmnd * SC)
820 {
821 	ips_ha_t *ha;
822 	ips_copp_wait_item_t *item;
823 	int ret;
824 	unsigned long cpu_flags;
825 	struct Scsi_Host *host;
826 
827 	METHOD_TRACE("ips_eh_abort", 1);
828 
829 	if (!SC)
830 		return (FAILED);
831 
832 	host = SC->device->host;
833 	ha = (ips_ha_t *) SC->device->host->hostdata;
834 
835 	if (!ha)
836 		return (FAILED);
837 
838 	if (!ha->active)
839 		return (FAILED);
840 
841 	IPS_LOCK_SAVE(host->host_lock, cpu_flags);
842 
843 	/* See if the command is on the copp queue */
844 	item = ha->copp_waitlist.head;
845 	while ((item) && (item->scsi_cmd != SC))
846 		item = item->next;
847 
848 	if (item) {
849 		/* Found it */
850 		ips_removeq_copp(&ha->copp_waitlist, item);
851 		ret = (SUCCESS);
852 
853 		/* See if the command is on the wait queue */
854 	} else if (ips_removeq_wait(&ha->scb_waitlist, SC)) {
855 		/* command not sent yet */
856 		ret = (SUCCESS);
857 	} else {
858 		/* command must have already been sent */
859 		ret = (FAILED);
860 	}
861 
862 	IPS_UNLOCK_RESTORE(host->host_lock, cpu_flags);
863 	return ret;
864 }
865 
866 /****************************************************************************/
867 /*                                                                          */
868 /* Routine Name: ips_eh_reset                                               */
869 /*                                                                          */
870 /* Routine Description:                                                     */
871 /*                                                                          */
872 /*   Reset the controller (with new eh error code)                          */
873 /*                                                                          */
874 /* NOTE: this routine is called under the io_request_lock spinlock          */
875 /*                                                                          */
876 /****************************************************************************/
877 static int
878 __ips_eh_reset(Scsi_Cmnd * SC)
879 {
880 	int ret;
881 	int i;
882 	ips_ha_t *ha;
883 	ips_scb_t *scb;
884 	ips_copp_wait_item_t *item;
885 
886 	METHOD_TRACE("ips_eh_reset", 1);
887 
888 #ifdef NO_IPS_RESET
889 	return (FAILED);
890 #else
891 
892 	if (!SC) {
893 		DEBUG(1, "Reset called with NULL scsi command");
894 
895 		return (FAILED);
896 	}
897 
898 	ha = (ips_ha_t *) SC->device->host->hostdata;
899 
900 	if (!ha) {
901 		DEBUG(1, "Reset called with NULL ha struct");
902 
903 		return (FAILED);
904 	}
905 
906 	if (!ha->active)
907 		return (FAILED);
908 
909 	/* See if the command is on the copp queue */
910 	item = ha->copp_waitlist.head;
911 	while ((item) && (item->scsi_cmd != SC))
912 		item = item->next;
913 
914 	if (item) {
915 		/* Found it */
916 		ips_removeq_copp(&ha->copp_waitlist, item);
917 		return (SUCCESS);
918 	}
919 
920 	/* See if the command is on the wait queue */
921 	if (ips_removeq_wait(&ha->scb_waitlist, SC)) {
922 		/* command not sent yet */
923 		return (SUCCESS);
924 	}
925 
926 	/* An explanation for the casual observer:                              */
927 	/* Part of the function of a RAID controller is automatic error         */
928 	/* detection and recovery.  As such, the only problem that physically   */
929 	/* resetting an adapter will ever fix is when, for some reason,         */
930 	/* the driver is not successfully communicating with the adapter.       */
931 	/* Therefore, we will attempt to flush this adapter.  If that succeeds, */
932 	/* then there's no real purpose in a physical reset. This will complete */
933 	/* much faster and avoids any problems that might be caused by a        */
934 	/* physical reset ( such as having to fail all the outstanding I/O's ). */
935 
936 	if (ha->ioctl_reset == 0) {	/* IF Not an IOCTL Requested Reset */
937 		scb = &ha->scbs[ha->max_cmds - 1];
938 
939 		ips_init_scb(ha, scb);
940 
941 		scb->timeout = ips_cmd_timeout;
942 		scb->cdb[0] = IPS_CMD_FLUSH;
943 
944 		scb->cmd.flush_cache.op_code = IPS_CMD_FLUSH;
945 		scb->cmd.flush_cache.command_id = IPS_COMMAND_ID(ha, scb);
946 		scb->cmd.flush_cache.state = IPS_NORM_STATE;
947 		scb->cmd.flush_cache.reserved = 0;
948 		scb->cmd.flush_cache.reserved2 = 0;
949 		scb->cmd.flush_cache.reserved3 = 0;
950 		scb->cmd.flush_cache.reserved4 = 0;
951 
952 		/* Attempt the flush command */
953 		ret = ips_send_wait(ha, scb, ips_cmd_timeout, IPS_INTR_IORL);
954 		if (ret == IPS_SUCCESS) {
955 			IPS_PRINTK(KERN_NOTICE, ha->pcidev,
956 				   "Reset Request - Flushed Cache\n");
957 			return (SUCCESS);
958 		}
959 	}
960 
961 	/* Either we can't communicate with the adapter or it's an IOCTL request */
962 	/* from a utility.  A physical reset is needed at this point.            */
963 
964 	ha->ioctl_reset = 0;	/* Reset the IOCTL Requested Reset Flag */
965 
966 	/*
967 	 * command must have already been sent
968 	 * reset the controller
969 	 */
970 	IPS_PRINTK(KERN_NOTICE, ha->pcidev, "Resetting controller.\n");
971 	ret = (*ha->func.reset) (ha);
972 
973 	if (!ret) {
974 		Scsi_Cmnd *scsi_cmd;
975 
976 		IPS_PRINTK(KERN_NOTICE, ha->pcidev,
977 			   "Controller reset failed - controller now offline.\n");
978 
979 		/* Now fail all of the active commands */
980 		DEBUG_VAR(1, "(%s%d) Failing active commands",
981 			  ips_name, ha->host_num);
982 
983 		while ((scb = ips_removeq_scb_head(&ha->scb_activelist))) {
984 			scb->scsi_cmd->result = DID_ERROR << 16;
985 			scb->scsi_cmd->scsi_done(scb->scsi_cmd);
986 			ips_freescb(ha, scb);
987 		}
988 
989 		/* Now fail all of the pending commands */
990 		DEBUG_VAR(1, "(%s%d) Failing pending commands",
991 			  ips_name, ha->host_num);
992 
993 		while ((scsi_cmd = ips_removeq_wait_head(&ha->scb_waitlist))) {
994 			scsi_cmd->result = DID_ERROR;
995 			scsi_cmd->scsi_done(scsi_cmd);
996 		}
997 
998 		ha->active = FALSE;
999 		return (FAILED);
1000 	}
1001 
1002 	if (!ips_clear_adapter(ha, IPS_INTR_IORL)) {
1003 		Scsi_Cmnd *scsi_cmd;
1004 
1005 		IPS_PRINTK(KERN_NOTICE, ha->pcidev,
1006 			   "Controller reset failed - controller now offline.\n");
1007 
1008 		/* Now fail all of the active commands */
1009 		DEBUG_VAR(1, "(%s%d) Failing active commands",
1010 			  ips_name, ha->host_num);
1011 
1012 		while ((scb = ips_removeq_scb_head(&ha->scb_activelist))) {
1013 			scb->scsi_cmd->result = DID_ERROR << 16;
1014 			scb->scsi_cmd->scsi_done(scb->scsi_cmd);
1015 			ips_freescb(ha, scb);
1016 		}
1017 
1018 		/* Now fail all of the pending commands */
1019 		DEBUG_VAR(1, "(%s%d) Failing pending commands",
1020 			  ips_name, ha->host_num);
1021 
1022 		while ((scsi_cmd = ips_removeq_wait_head(&ha->scb_waitlist))) {
1023 			scsi_cmd->result = DID_ERROR << 16;
1024 			scsi_cmd->scsi_done(scsi_cmd);
1025 		}
1026 
1027 		ha->active = FALSE;
1028 		return (FAILED);
1029 	}
1030 
1031 	/* FFDC */
1032 	if (le32_to_cpu(ha->subsys->param[3]) & 0x300000) {
1033 		struct timeval tv;
1034 
1035 		do_gettimeofday(&tv);
1036 		ha->last_ffdc = tv.tv_sec;
1037 		ha->reset_count++;
1038 		ips_ffdc_reset(ha, IPS_INTR_IORL);
1039 	}
1040 
1041 	/* Now fail all of the active commands */
1042 	DEBUG_VAR(1, "(%s%d) Failing active commands", ips_name, ha->host_num);
1043 
1044 	while ((scb = ips_removeq_scb_head(&ha->scb_activelist))) {
1045 		scb->scsi_cmd->result =
1046 		    (DID_RESET << 16) | (SUGGEST_RETRY << 24);
1047 		scb->scsi_cmd->scsi_done(scb->scsi_cmd);
1048 		ips_freescb(ha, scb);
1049 	}
1050 
1051 	/* Reset DCDB active command bits */
1052 	for (i = 1; i < ha->nbus; i++)
1053 		ha->dcdb_active[i - 1] = 0;
1054 
1055 	/* Reset the number of active IOCTLs */
1056 	ha->num_ioctl = 0;
1057 
1058 	ips_next(ha, IPS_INTR_IORL);
1059 
1060 	return (SUCCESS);
1061 #endif				/* NO_IPS_RESET */
1062 
1063 }
1064 
1065 static int
1066 ips_eh_reset(Scsi_Cmnd * SC)
1067 {
1068 	int rc;
1069 
1070 	spin_lock_irq(SC->device->host->host_lock);
1071 	rc = __ips_eh_reset(SC);
1072 	spin_unlock_irq(SC->device->host->host_lock);
1073 
1074 	return rc;
1075 }
1076 
1077 /****************************************************************************/
1078 /*                                                                          */
1079 /* Routine Name: ips_queue                                                  */
1080 /*                                                                          */
1081 /* Routine Description:                                                     */
1082 /*                                                                          */
1083 /*   Send a command to the controller                                       */
1084 /*                                                                          */
1085 /* NOTE:                                                                    */
1086 /*    Linux obtains io_request_lock before calling this function            */
1087 /*                                                                          */
1088 /****************************************************************************/
1089 static int
1090 ips_queue(Scsi_Cmnd * SC, void (*done) (Scsi_Cmnd *))
1091 {
1092 	ips_ha_t *ha;
1093 	ips_passthru_t *pt;
1094 
1095 	METHOD_TRACE("ips_queue", 1);
1096 
1097 	ha = (ips_ha_t *) SC->device->host->hostdata;
1098 
1099 	if (!ha)
1100 		return (1);
1101 
1102 	if (!ha->active)
1103 		return (DID_ERROR);
1104 
1105 	if (ips_is_passthru(SC)) {
1106 		if (ha->copp_waitlist.count == IPS_MAX_IOCTL_QUEUE) {
1107 			SC->result = DID_BUS_BUSY << 16;
1108 			done(SC);
1109 
1110 			return (0);
1111 		}
1112 	} else if (ha->scb_waitlist.count == IPS_MAX_QUEUE) {
1113 		SC->result = DID_BUS_BUSY << 16;
1114 		done(SC);
1115 
1116 		return (0);
1117 	}
1118 
1119 	SC->scsi_done = done;
1120 
1121 	DEBUG_VAR(2, "(%s%d): ips_queue: cmd 0x%X (%d %d %d)",
1122 		  ips_name,
1123 		  ha->host_num,
1124 		  SC->cmnd[0],
1125 		  SC->device->channel, SC->device->id, SC->device->lun);
1126 
1127 	/* Check for command to initiator IDs */
1128 	if ((scmd_channel(SC) > 0)
1129 	    && (scmd_id(SC) == ha->ha_id[scmd_channel(SC)])) {
1130 		SC->result = DID_NO_CONNECT << 16;
1131 		done(SC);
1132 
1133 		return (0);
1134 	}
1135 
1136 	if (ips_is_passthru(SC)) {
1137 
1138 		ips_copp_wait_item_t *scratch;
1139 
1140 		/* A Reset IOCTL is only sent by the boot CD in extreme cases.           */
1141 		/* There can never be any system activity ( network or disk ), but check */
1142 		/* anyway just as a good practice.                                       */
1143 		pt = (ips_passthru_t *) SC->request_buffer;
1144 		if ((pt->CoppCP.cmd.reset.op_code == IPS_CMD_RESET_CHANNEL) &&
1145 		    (pt->CoppCP.cmd.reset.adapter_flag == 1)) {
1146 			if (ha->scb_activelist.count != 0) {
1147 				SC->result = DID_BUS_BUSY << 16;
1148 				done(SC);
1149 				return (0);
1150 			}
1151 			ha->ioctl_reset = 1;	/* This reset request is from an IOCTL */
1152 			ips_eh_reset(SC);
1153 			SC->result = DID_OK << 16;
1154 			SC->scsi_done(SC);
1155 			return (0);
1156 		}
1157 
1158 		/* allocate space for the scribble */
1159 		scratch = kmalloc(sizeof (ips_copp_wait_item_t), GFP_ATOMIC);
1160 
1161 		if (!scratch) {
1162 			SC->result = DID_ERROR << 16;
1163 			done(SC);
1164 
1165 			return (0);
1166 		}
1167 
1168 		scratch->scsi_cmd = SC;
1169 		scratch->next = NULL;
1170 
1171 		ips_putq_copp_tail(&ha->copp_waitlist, scratch);
1172 	} else {
1173 		ips_putq_wait_tail(&ha->scb_waitlist, SC);
1174 	}
1175 
1176 	ips_next(ha, IPS_INTR_IORL);
1177 
1178 	return (0);
1179 }
1180 
1181 /****************************************************************************/
1182 /*                                                                          */
1183 /* Routine Name: ips_biosparam                                              */
1184 /*                                                                          */
1185 /* Routine Description:                                                     */
1186 /*                                                                          */
1187 /*   Set bios geometry for the controller                                   */
1188 /*                                                                          */
1189 /****************************************************************************/
1190 static int
1191 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
1192 ips_biosparam(Disk * disk, kdev_t dev, int geom[])
1193 {
1194 	ips_ha_t *ha = (ips_ha_t *) disk->device->host->hostdata;
1195 	unsigned long capacity = disk->capacity;
1196 #else
1197 ips_biosparam(struct scsi_device *sdev, struct block_device *bdev,
1198 	      sector_t capacity, int geom[])
1199 {
1200 	ips_ha_t *ha = (ips_ha_t *) sdev->host->hostdata;
1201 #endif
1202 	int heads;
1203 	int sectors;
1204 	int cylinders;
1205 
1206 	METHOD_TRACE("ips_biosparam", 1);
1207 
1208 	if (!ha)
1209 		/* ?!?! host adater info invalid */
1210 		return (0);
1211 
1212 	if (!ha->active)
1213 		return (0);
1214 
1215 	if (!ips_read_adapter_status(ha, IPS_INTR_ON))
1216 		/* ?!?! Enquiry command failed */
1217 		return (0);
1218 
1219 	if ((capacity > 0x400000) && ((ha->enq->ucMiscFlag & 0x8) == 0)) {
1220 		heads = IPS_NORM_HEADS;
1221 		sectors = IPS_NORM_SECTORS;
1222 	} else {
1223 		heads = IPS_COMP_HEADS;
1224 		sectors = IPS_COMP_SECTORS;
1225 	}
1226 
1227 	cylinders = (unsigned long) capacity / (heads * sectors);
1228 
1229 	DEBUG_VAR(2, "Geometry: heads: %d, sectors: %d, cylinders: %d",
1230 		  heads, sectors, cylinders);
1231 
1232 	geom[0] = heads;
1233 	geom[1] = sectors;
1234 	geom[2] = cylinders;
1235 
1236 	return (0);
1237 }
1238 
1239 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
1240 
1241 /* ips_proc24_info is a wrapper around ips_proc_info *
1242  * for compatibility with the 2.4 scsi parameters    */
1243 static int
1244 ips_proc24_info(char *buffer, char **start, off_t offset, int length,
1245 		              int hostno, int func)
1246 {
1247 	int i;
1248 
1249 	for (i = 0; i < ips_next_controller; i++) {
1250 		if (ips_sh[i] && ips_sh[i]->host_no == hostno) {
1251 			return ips_proc_info(ips_sh[i], buffer, start,
1252 					     offset, length, func);
1253 		}
1254 	}
1255 	return -EINVAL;
1256 }
1257 
1258 /****************************************************************************/
1259 /*                                                                          */
1260 /* Routine Name: ips_select_queue_depth                                     */
1261 /*                                                                          */
1262 /* Routine Description:                                                     */
1263 /*                                                                          */
1264 /*   Select queue depths for the devices on the contoller                   */
1265 /*                                                                          */
1266 /****************************************************************************/
1267 static void
1268 ips_select_queue_depth(struct Scsi_Host *host, Scsi_Device * scsi_devs)
1269 {
1270 	Scsi_Device *device;
1271 	ips_ha_t *ha;
1272 	int count = 0;
1273 	int min;
1274 
1275 	ha = IPS_HA(host);
1276 	min = ha->max_cmds / 4;
1277 
1278 	for (device = scsi_devs; device; device = device->next) {
1279 		if (device->host == host) {
1280 			if ((device->channel == 0) && (device->type == 0))
1281 				count++;
1282 		}
1283 	}
1284 
1285 	for (device = scsi_devs; device; device = device->next) {
1286 		if (device->host == host) {
1287 			if ((device->channel == 0) && (device->type == 0)) {
1288 				device->queue_depth =
1289 				    (ha->max_cmds - 1) / count;
1290 				if (device->queue_depth < min)
1291 					device->queue_depth = min;
1292 			} else {
1293 				device->queue_depth = 2;
1294 			}
1295 
1296 			if (device->queue_depth < 2)
1297 				device->queue_depth = 2;
1298 		}
1299 	}
1300 }
1301 
1302 #else
1303 /****************************************************************************/
1304 /*                                                                          */
1305 /* Routine Name: ips_slave_configure                                        */
1306 /*                                                                          */
1307 /* Routine Description:                                                     */
1308 /*                                                                          */
1309 /*   Set queue depths on devices once scan is complete                      */
1310 /*                                                                          */
1311 /****************************************************************************/
1312 static int
1313 ips_slave_configure(Scsi_Device * SDptr)
1314 {
1315 	ips_ha_t *ha;
1316 	int min;
1317 
1318 	ha = IPS_HA(SDptr->host);
1319 	if (SDptr->tagged_supported && SDptr->type == TYPE_DISK) {
1320 		min = ha->max_cmds / 2;
1321 		if (ha->enq->ucLogDriveCount <= 2)
1322 			min = ha->max_cmds - 1;
1323 		scsi_adjust_queue_depth(SDptr, MSG_ORDERED_TAG, min);
1324 	}
1325 	return 0;
1326 }
1327 #endif
1328 
1329 /****************************************************************************/
1330 /*                                                                          */
1331 /* Routine Name: do_ipsintr                                                 */
1332 /*                                                                          */
1333 /* Routine Description:                                                     */
1334 /*                                                                          */
1335 /*   Wrapper for the interrupt handler                                      */
1336 /*                                                                          */
1337 /****************************************************************************/
1338 static irqreturn_t
1339 do_ipsintr(int irq, void *dev_id, struct pt_regs * regs)
1340 {
1341 	ips_ha_t *ha;
1342 	unsigned long cpu_flags;
1343 	struct Scsi_Host *host;
1344 	int irqstatus;
1345 
1346 	METHOD_TRACE("do_ipsintr", 2);
1347 
1348 	ha = (ips_ha_t *) dev_id;
1349 	if (!ha)
1350 		return IRQ_NONE;
1351 	host = ips_sh[ha->host_num];
1352 	/* interrupt during initialization */
1353 	if (!host) {
1354 		(*ha->func.intr) (ha);
1355 		return IRQ_HANDLED;
1356 	}
1357 
1358 	IPS_LOCK_SAVE(host->host_lock, cpu_flags);
1359 
1360 	if (!ha->active) {
1361 		IPS_UNLOCK_RESTORE(host->host_lock, cpu_flags);
1362 		return IRQ_HANDLED;
1363 	}
1364 
1365 	irqstatus = (*ha->func.intr) (ha);
1366 
1367 	IPS_UNLOCK_RESTORE(host->host_lock, cpu_flags);
1368 
1369 	/* start the next command */
1370 	ips_next(ha, IPS_INTR_ON);
1371 	return IRQ_RETVAL(irqstatus);
1372 }
1373 
1374 /****************************************************************************/
1375 /*                                                                          */
1376 /* Routine Name: ips_intr_copperhead                                        */
1377 /*                                                                          */
1378 /* Routine Description:                                                     */
1379 /*                                                                          */
1380 /*   Polling interrupt handler                                              */
1381 /*                                                                          */
1382 /*   ASSUMES interrupts are disabled                                        */
1383 /*                                                                          */
1384 /****************************************************************************/
1385 int
1386 ips_intr_copperhead(ips_ha_t * ha)
1387 {
1388 	ips_stat_t *sp;
1389 	ips_scb_t *scb;
1390 	IPS_STATUS cstatus;
1391 	int intrstatus;
1392 
1393 	METHOD_TRACE("ips_intr", 2);
1394 
1395 	if (!ha)
1396 		return 0;
1397 
1398 	if (!ha->active)
1399 		return 0;
1400 
1401 	intrstatus = (*ha->func.isintr) (ha);
1402 
1403 	if (!intrstatus) {
1404 		/*
1405 		 * Unexpected/Shared interrupt
1406 		 */
1407 
1408 		return 0;
1409 	}
1410 
1411 	while (TRUE) {
1412 		sp = &ha->sp;
1413 
1414 		intrstatus = (*ha->func.isintr) (ha);
1415 
1416 		if (!intrstatus)
1417 			break;
1418 		else
1419 			cstatus.value = (*ha->func.statupd) (ha);
1420 
1421 		if (cstatus.fields.command_id > (IPS_MAX_CMDS - 1)) {
1422 			/* Spurious Interupt ? */
1423 			continue;
1424 		}
1425 
1426 		ips_chkstatus(ha, &cstatus);
1427 		scb = (ips_scb_t *) sp->scb_addr;
1428 
1429 		/*
1430 		 * use the callback function to finish things up
1431 		 * NOTE: interrupts are OFF for this
1432 		 */
1433 		(*scb->callback) (ha, scb);
1434 	}			/* end while */
1435 	return 1;
1436 }
1437 
1438 /****************************************************************************/
1439 /*                                                                          */
1440 /* Routine Name: ips_intr_morpheus                                          */
1441 /*                                                                          */
1442 /* Routine Description:                                                     */
1443 /*                                                                          */
1444 /*   Polling interrupt handler                                              */
1445 /*                                                                          */
1446 /*   ASSUMES interrupts are disabled                                        */
1447 /*                                                                          */
1448 /****************************************************************************/
1449 int
1450 ips_intr_morpheus(ips_ha_t * ha)
1451 {
1452 	ips_stat_t *sp;
1453 	ips_scb_t *scb;
1454 	IPS_STATUS cstatus;
1455 	int intrstatus;
1456 
1457 	METHOD_TRACE("ips_intr_morpheus", 2);
1458 
1459 	if (!ha)
1460 		return 0;
1461 
1462 	if (!ha->active)
1463 		return 0;
1464 
1465 	intrstatus = (*ha->func.isintr) (ha);
1466 
1467 	if (!intrstatus) {
1468 		/*
1469 		 * Unexpected/Shared interrupt
1470 		 */
1471 
1472 		return 0;
1473 	}
1474 
1475 	while (TRUE) {
1476 		sp = &ha->sp;
1477 
1478 		intrstatus = (*ha->func.isintr) (ha);
1479 
1480 		if (!intrstatus)
1481 			break;
1482 		else
1483 			cstatus.value = (*ha->func.statupd) (ha);
1484 
1485 		if (cstatus.value == 0xffffffff)
1486 			/* No more to process */
1487 			break;
1488 
1489 		if (cstatus.fields.command_id > (IPS_MAX_CMDS - 1)) {
1490 			IPS_PRINTK(KERN_WARNING, ha->pcidev,
1491 				   "Spurious interrupt; no ccb.\n");
1492 
1493 			continue;
1494 		}
1495 
1496 		ips_chkstatus(ha, &cstatus);
1497 		scb = (ips_scb_t *) sp->scb_addr;
1498 
1499 		/*
1500 		 * use the callback function to finish things up
1501 		 * NOTE: interrupts are OFF for this
1502 		 */
1503 		(*scb->callback) (ha, scb);
1504 	}			/* end while */
1505 	return 1;
1506 }
1507 
1508 /****************************************************************************/
1509 /*                                                                          */
1510 /* Routine Name: ips_info                                                   */
1511 /*                                                                          */
1512 /* Routine Description:                                                     */
1513 /*                                                                          */
1514 /*   Return info about the driver                                           */
1515 /*                                                                          */
1516 /****************************************************************************/
1517 static const char *
1518 ips_info(struct Scsi_Host *SH)
1519 {
1520 	static char buffer[256];
1521 	char *bp;
1522 	ips_ha_t *ha;
1523 
1524 	METHOD_TRACE("ips_info", 1);
1525 
1526 	ha = IPS_HA(SH);
1527 
1528 	if (!ha)
1529 		return (NULL);
1530 
1531 	bp = &buffer[0];
1532 	memset(bp, 0, sizeof (buffer));
1533 
1534 	sprintf(bp, "%s%s%s Build %d", "IBM PCI ServeRAID ",
1535 		IPS_VERSION_HIGH, IPS_VERSION_LOW, IPS_BUILD_IDENT);
1536 
1537 	if (ha->ad_type > 0 && ha->ad_type <= MAX_ADAPTER_NAME) {
1538 		strcat(bp, " <");
1539 		strcat(bp, ips_adapter_name[ha->ad_type - 1]);
1540 		strcat(bp, ">");
1541 	}
1542 
1543 	return (bp);
1544 }
1545 
1546 /****************************************************************************/
1547 /*                                                                          */
1548 /* Routine Name: ips_proc_info                                              */
1549 /*                                                                          */
1550 /* Routine Description:                                                     */
1551 /*                                                                          */
1552 /*   The passthru interface for the driver                                  */
1553 /*                                                                          */
1554 /****************************************************************************/
1555 static int
1556 ips_proc_info(struct Scsi_Host *host, char *buffer, char **start, off_t offset,
1557 	      int length, int func)
1558 {
1559 	int i;
1560 	int ret;
1561 	ips_ha_t *ha = NULL;
1562 
1563 	METHOD_TRACE("ips_proc_info", 1);
1564 
1565 	/* Find our host structure */
1566 	for (i = 0; i < ips_next_controller; i++) {
1567 		if (ips_sh[i]) {
1568 			if (ips_sh[i] == host) {
1569 				ha = (ips_ha_t *) ips_sh[i]->hostdata;
1570 				break;
1571 			}
1572 		}
1573 	}
1574 
1575 	if (!ha)
1576 		return (-EINVAL);
1577 
1578 	if (func) {
1579 		/* write */
1580 		return (0);
1581 	} else {
1582 		/* read */
1583 		if (start)
1584 			*start = buffer;
1585 
1586 		ret = ips_host_info(ha, buffer, offset, length);
1587 
1588 		return (ret);
1589 	}
1590 }
1591 
1592 /*--------------------------------------------------------------------------*/
1593 /* Helper Functions                                                         */
1594 /*--------------------------------------------------------------------------*/
1595 
1596 /****************************************************************************/
1597 /*                                                                          */
1598 /* Routine Name: ips_is_passthru                                            */
1599 /*                                                                          */
1600 /* Routine Description:                                                     */
1601 /*                                                                          */
1602 /*   Determine if the specified SCSI command is really a passthru command   */
1603 /*                                                                          */
1604 /****************************************************************************/
1605 static int
1606 ips_is_passthru(Scsi_Cmnd * SC)
1607 {
1608 	unsigned long flags;
1609 
1610 	METHOD_TRACE("ips_is_passthru", 1);
1611 
1612 	if (!SC)
1613 		return (0);
1614 
1615 	if ((SC->cmnd[0] == IPS_IOCTL_COMMAND) &&
1616 	    (SC->device->channel == 0) &&
1617 	    (SC->device->id == IPS_ADAPTER_ID) &&
1618 	    (SC->device->lun == 0) && SC->request_buffer) {
1619 		if ((!SC->use_sg) && SC->request_bufflen &&
1620 		    (((char *) SC->request_buffer)[0] == 'C') &&
1621 		    (((char *) SC->request_buffer)[1] == 'O') &&
1622 		    (((char *) SC->request_buffer)[2] == 'P') &&
1623 		    (((char *) SC->request_buffer)[3] == 'P'))
1624 			return 1;
1625 		else if (SC->use_sg) {
1626 			struct scatterlist *sg = SC->request_buffer;
1627 			char  *buffer;
1628 
1629 			/* kmap_atomic() ensures addressability of the user buffer.*/
1630 			/* local_irq_save() protects the KM_IRQ0 address slot.     */
1631 			local_irq_save(flags);
1632 			buffer = kmap_atomic(sg->page, KM_IRQ0) + sg->offset;
1633 			if (buffer && buffer[0] == 'C' && buffer[1] == 'O' &&
1634 			    buffer[2] == 'P' && buffer[3] == 'P') {
1635 				kunmap_atomic(buffer - sg->offset, KM_IRQ0);
1636 				local_irq_restore(flags);
1637 				return 1;
1638 			}
1639 			kunmap_atomic(buffer - sg->offset, KM_IRQ0);
1640 			local_irq_restore(flags);
1641 		}
1642 	}
1643 	return 0;
1644 }
1645 
1646 /****************************************************************************/
1647 /*                                                                          */
1648 /* Routine Name: ips_alloc_passthru_buffer                                  */
1649 /*                                                                          */
1650 /* Routine Description:                                                     */
1651 /*   allocate a buffer large enough for the ioctl data if the ioctl buffer  */
1652 /*   is too small or doesn't exist                                          */
1653 /****************************************************************************/
1654 static int
1655 ips_alloc_passthru_buffer(ips_ha_t * ha, int length)
1656 {
1657 	void *bigger_buf;
1658 	dma_addr_t dma_busaddr;
1659 
1660 	if (ha->ioctl_data && length <= ha->ioctl_len)
1661 		return 0;
1662 	/* there is no buffer or it's not big enough, allocate a new one */
1663 	bigger_buf = pci_alloc_consistent(ha->pcidev, length, &dma_busaddr);
1664 	if (bigger_buf) {
1665 		/* free the old memory */
1666 		pci_free_consistent(ha->pcidev, ha->ioctl_len, ha->ioctl_data,
1667 				    ha->ioctl_busaddr);
1668 		/* use the new memory */
1669 		ha->ioctl_data = (char *) bigger_buf;
1670 		ha->ioctl_len = length;
1671 		ha->ioctl_busaddr = dma_busaddr;
1672 	} else {
1673 		return -1;
1674 	}
1675 	return 0;
1676 }
1677 
1678 /****************************************************************************/
1679 /*                                                                          */
1680 /* Routine Name: ips_make_passthru                                          */
1681 /*                                                                          */
1682 /* Routine Description:                                                     */
1683 /*                                                                          */
1684 /*   Make a passthru command out of the info in the Scsi block              */
1685 /*                                                                          */
1686 /****************************************************************************/
1687 static int
1688 ips_make_passthru(ips_ha_t * ha, Scsi_Cmnd * SC, ips_scb_t * scb, int intr)
1689 {
1690 	ips_passthru_t *pt;
1691 	int length = 0;
1692 	int ret;
1693 
1694 	METHOD_TRACE("ips_make_passthru", 1);
1695 
1696 	if (!SC->use_sg) {
1697 		length = SC->request_bufflen;
1698 	} else {
1699 		struct scatterlist *sg = SC->request_buffer;
1700 		int i;
1701 		for (i = 0; i < SC->use_sg; i++)
1702 			length += sg[i].length;
1703 	}
1704 	if (length < sizeof (ips_passthru_t)) {
1705 		/* wrong size */
1706 		DEBUG_VAR(1, "(%s%d) Passthru structure wrong size",
1707 			  ips_name, ha->host_num);
1708 		return (IPS_FAILURE);
1709 	}
1710 	if (ips_alloc_passthru_buffer(ha, length)) {
1711 		/* allocation failure!  If ha->ioctl_data exists, use it to return
1712 		   some error codes.  Return a failed command to the scsi layer. */
1713 		if (ha->ioctl_data) {
1714 			pt = (ips_passthru_t *) ha->ioctl_data;
1715 			ips_scmd_buf_read(SC, pt, sizeof (ips_passthru_t));
1716 			pt->BasicStatus = 0x0B;
1717 			pt->ExtendedStatus = 0x00;
1718 			ips_scmd_buf_write(SC, pt, sizeof (ips_passthru_t));
1719 		}
1720 		return IPS_FAILURE;
1721 	}
1722 	ha->ioctl_datasize = length;
1723 
1724 	ips_scmd_buf_read(SC, ha->ioctl_data, ha->ioctl_datasize);
1725 	pt = (ips_passthru_t *) ha->ioctl_data;
1726 
1727 	/*
1728 	 * Some notes about the passthru interface used
1729 	 *
1730 	 * IF the scsi op_code == 0x0d then we assume
1731 	 * that the data came along with/goes with the
1732 	 * packet we received from the sg driver. In this
1733 	 * case the CmdBSize field of the pt structure is
1734 	 * used for the size of the buffer.
1735 	 */
1736 
1737 	switch (pt->CoppCmd) {
1738 	case IPS_NUMCTRLS:
1739 		memcpy(ha->ioctl_data + sizeof (ips_passthru_t),
1740 		       &ips_num_controllers, sizeof (int));
1741 		ips_scmd_buf_write(SC, ha->ioctl_data,
1742 				   sizeof (ips_passthru_t) + sizeof (int));
1743 		SC->result = DID_OK << 16;
1744 
1745 		return (IPS_SUCCESS_IMM);
1746 
1747 	case IPS_COPPUSRCMD:
1748 	case IPS_COPPIOCCMD:
1749 		if (SC->cmnd[0] == IPS_IOCTL_COMMAND) {
1750 			if (length < (sizeof (ips_passthru_t) + pt->CmdBSize)) {
1751 				/* wrong size */
1752 				DEBUG_VAR(1,
1753 					  "(%s%d) Passthru structure wrong size",
1754 					  ips_name, ha->host_num);
1755 
1756 				return (IPS_FAILURE);
1757 			}
1758 
1759 			if (ha->device_id == IPS_DEVICEID_COPPERHEAD &&
1760 			    pt->CoppCP.cmd.flashfw.op_code ==
1761 			    IPS_CMD_RW_BIOSFW) {
1762 				ret = ips_flash_copperhead(ha, pt, scb);
1763 				ips_scmd_buf_write(SC, ha->ioctl_data,
1764 						   sizeof (ips_passthru_t));
1765 				return ret;
1766 			}
1767 			if (ips_usrcmd(ha, pt, scb))
1768 				return (IPS_SUCCESS);
1769 			else
1770 				return (IPS_FAILURE);
1771 		}
1772 
1773 		break;
1774 
1775 	}			/* end switch */
1776 
1777 	return (IPS_FAILURE);
1778 }
1779 
1780 /****************************************************************************/
1781 /* Routine Name: ips_flash_copperhead                                       */
1782 /* Routine Description:                                                     */
1783 /*   Flash the BIOS/FW on a Copperhead style controller                     */
1784 /****************************************************************************/
1785 static int
1786 ips_flash_copperhead(ips_ha_t * ha, ips_passthru_t * pt, ips_scb_t * scb)
1787 {
1788 	int datasize;
1789 
1790 	/* Trombone is the only copperhead that can do packet flash, but only
1791 	 * for firmware. No one said it had to make sence. */
1792 	if (IPS_IS_TROMBONE(ha) && pt->CoppCP.cmd.flashfw.type == IPS_FW_IMAGE) {
1793 		if (ips_usrcmd(ha, pt, scb))
1794 			return IPS_SUCCESS;
1795 		else
1796 			return IPS_FAILURE;
1797 	}
1798 	pt->BasicStatus = 0x0B;
1799 	pt->ExtendedStatus = 0;
1800 	scb->scsi_cmd->result = DID_OK << 16;
1801 	/* IF it's OK to Use the "CD BOOT" Flash Buffer, then you can     */
1802 	/* avoid allocating a huge buffer per adapter ( which can fail ). */
1803 	if (pt->CoppCP.cmd.flashfw.type == IPS_BIOS_IMAGE &&
1804 	    pt->CoppCP.cmd.flashfw.direction == IPS_ERASE_BIOS) {
1805 		pt->BasicStatus = 0;
1806 		return ips_flash_bios(ha, pt, scb);
1807 	} else if (pt->CoppCP.cmd.flashfw.packet_num == 0) {
1808 		if (ips_FlashData && !test_and_set_bit(0, &ips_FlashDataInUse)){
1809 			ha->flash_data = ips_FlashData;
1810 			ha->flash_busaddr = ips_flashbusaddr;
1811 			ha->flash_len = PAGE_SIZE << 7;
1812 			ha->flash_datasize = 0;
1813 		} else if (!ha->flash_data) {
1814 			datasize = pt->CoppCP.cmd.flashfw.total_packets *
1815 			    pt->CoppCP.cmd.flashfw.count;
1816 			ha->flash_data = pci_alloc_consistent(ha->pcidev,
1817 					                      datasize,
1818 							      &ha->flash_busaddr);
1819 			if (!ha->flash_data){
1820 				printk(KERN_WARNING "Unable to allocate a flash buffer\n");
1821 				return IPS_FAILURE;
1822 			}
1823 			ha->flash_datasize = 0;
1824 			ha->flash_len = datasize;
1825 		} else
1826 			return IPS_FAILURE;
1827 	} else {
1828 		if (pt->CoppCP.cmd.flashfw.count + ha->flash_datasize >
1829 		    ha->flash_len) {
1830 			ips_free_flash_copperhead(ha);
1831 			IPS_PRINTK(KERN_WARNING, ha->pcidev,
1832 				   "failed size sanity check\n");
1833 			return IPS_FAILURE;
1834 		}
1835 	}
1836 	if (!ha->flash_data)
1837 		return IPS_FAILURE;
1838 	pt->BasicStatus = 0;
1839 	memcpy(&ha->flash_data[ha->flash_datasize], pt + 1,
1840 	       pt->CoppCP.cmd.flashfw.count);
1841 	ha->flash_datasize += pt->CoppCP.cmd.flashfw.count;
1842 	if (pt->CoppCP.cmd.flashfw.packet_num ==
1843 	    pt->CoppCP.cmd.flashfw.total_packets - 1) {
1844 		if (pt->CoppCP.cmd.flashfw.type == IPS_BIOS_IMAGE)
1845 			return ips_flash_bios(ha, pt, scb);
1846 		else if (pt->CoppCP.cmd.flashfw.type == IPS_FW_IMAGE)
1847 			return ips_flash_firmware(ha, pt, scb);
1848 	}
1849 	return IPS_SUCCESS_IMM;
1850 }
1851 
1852 /****************************************************************************/
1853 /* Routine Name: ips_flash_bios                                             */
1854 /* Routine Description:                                                     */
1855 /*   flashes the bios of a copperhead adapter                               */
1856 /****************************************************************************/
1857 static int
1858 ips_flash_bios(ips_ha_t * ha, ips_passthru_t * pt, ips_scb_t * scb)
1859 {
1860 
1861 	if (pt->CoppCP.cmd.flashfw.type == IPS_BIOS_IMAGE &&
1862 	    pt->CoppCP.cmd.flashfw.direction == IPS_WRITE_BIOS) {
1863 		if ((!ha->func.programbios) || (!ha->func.erasebios) ||
1864 		    (!ha->func.verifybios))
1865 			goto error;
1866 		if ((*ha->func.erasebios) (ha)) {
1867 			DEBUG_VAR(1,
1868 				  "(%s%d) flash bios failed - unable to erase flash",
1869 				  ips_name, ha->host_num);
1870 			goto error;
1871 		} else
1872 		    if ((*ha->func.programbios) (ha,
1873 						 ha->flash_data +
1874 						 IPS_BIOS_HEADER,
1875 						 ha->flash_datasize -
1876 						 IPS_BIOS_HEADER, 0)) {
1877 			DEBUG_VAR(1,
1878 				  "(%s%d) flash bios failed - unable to flash",
1879 				  ips_name, ha->host_num);
1880 			goto error;
1881 		} else
1882 		    if ((*ha->func.verifybios) (ha,
1883 						ha->flash_data +
1884 						IPS_BIOS_HEADER,
1885 						ha->flash_datasize -
1886 						IPS_BIOS_HEADER, 0)) {
1887 			DEBUG_VAR(1,
1888 				  "(%s%d) flash bios failed - unable to verify flash",
1889 				  ips_name, ha->host_num);
1890 			goto error;
1891 		}
1892 		ips_free_flash_copperhead(ha);
1893 		return IPS_SUCCESS_IMM;
1894 	} else if (pt->CoppCP.cmd.flashfw.type == IPS_BIOS_IMAGE &&
1895 		   pt->CoppCP.cmd.flashfw.direction == IPS_ERASE_BIOS) {
1896 		if (!ha->func.erasebios)
1897 			goto error;
1898 		if ((*ha->func.erasebios) (ha)) {
1899 			DEBUG_VAR(1,
1900 				  "(%s%d) flash bios failed - unable to erase flash",
1901 				  ips_name, ha->host_num);
1902 			goto error;
1903 		}
1904 		return IPS_SUCCESS_IMM;
1905 	}
1906       error:
1907 	pt->BasicStatus = 0x0B;
1908 	pt->ExtendedStatus = 0x00;
1909 	ips_free_flash_copperhead(ha);
1910 	return IPS_FAILURE;
1911 }
1912 
1913 /****************************************************************************/
1914 /*                                                                          */
1915 /* Routine Name: ips_fill_scb_sg_single                                     */
1916 /*                                                                          */
1917 /* Routine Description:                                                     */
1918 /*   Fill in a single scb sg_list element from an address                   */
1919 /*   return a -1 if a breakup occurred                                      */
1920 /****************************************************************************/
1921 static int
1922 ips_fill_scb_sg_single(ips_ha_t * ha, dma_addr_t busaddr,
1923 		       ips_scb_t * scb, int indx, unsigned int e_len)
1924 {
1925 
1926 	int ret_val = 0;
1927 
1928 	if ((scb->data_len + e_len) > ha->max_xfer) {
1929 		e_len = ha->max_xfer - scb->data_len;
1930 		scb->breakup = indx;
1931 		++scb->sg_break;
1932 		ret_val = -1;
1933 	} else {
1934 		scb->breakup = 0;
1935 		scb->sg_break = 0;
1936 	}
1937 	if (IPS_USE_ENH_SGLIST(ha)) {
1938 		scb->sg_list.enh_list[indx].address_lo =
1939 		    cpu_to_le32(pci_dma_lo32(busaddr));
1940 		scb->sg_list.enh_list[indx].address_hi =
1941 		    cpu_to_le32(pci_dma_hi32(busaddr));
1942 		scb->sg_list.enh_list[indx].length = cpu_to_le32(e_len);
1943 	} else {
1944 		scb->sg_list.std_list[indx].address =
1945 		    cpu_to_le32(pci_dma_lo32(busaddr));
1946 		scb->sg_list.std_list[indx].length = cpu_to_le32(e_len);
1947 	}
1948 
1949 	++scb->sg_len;
1950 	scb->data_len += e_len;
1951 	return ret_val;
1952 }
1953 
1954 /****************************************************************************/
1955 /* Routine Name: ips_flash_firmware                                         */
1956 /* Routine Description:                                                     */
1957 /*   flashes the firmware of a copperhead adapter                           */
1958 /****************************************************************************/
1959 static int
1960 ips_flash_firmware(ips_ha_t * ha, ips_passthru_t * pt, ips_scb_t * scb)
1961 {
1962 	IPS_SG_LIST sg_list;
1963 	uint32_t cmd_busaddr;
1964 
1965 	if (pt->CoppCP.cmd.flashfw.type == IPS_FW_IMAGE &&
1966 	    pt->CoppCP.cmd.flashfw.direction == IPS_WRITE_FW) {
1967 		memset(&pt->CoppCP.cmd, 0, sizeof (IPS_HOST_COMMAND));
1968 		pt->CoppCP.cmd.flashfw.op_code = IPS_CMD_DOWNLOAD;
1969 		pt->CoppCP.cmd.flashfw.count = cpu_to_le32(ha->flash_datasize);
1970 	} else {
1971 		pt->BasicStatus = 0x0B;
1972 		pt->ExtendedStatus = 0x00;
1973 		ips_free_flash_copperhead(ha);
1974 		return IPS_FAILURE;
1975 	}
1976 	/* Save the S/G list pointer so it doesn't get clobbered */
1977 	sg_list.list = scb->sg_list.list;
1978 	cmd_busaddr = scb->scb_busaddr;
1979 	/* copy in the CP */
1980 	memcpy(&scb->cmd, &pt->CoppCP.cmd, sizeof (IPS_IOCTL_CMD));
1981 	/* FIX stuff that might be wrong */
1982 	scb->sg_list.list = sg_list.list;
1983 	scb->scb_busaddr = cmd_busaddr;
1984 	scb->bus = scb->scsi_cmd->device->channel;
1985 	scb->target_id = scb->scsi_cmd->device->id;
1986 	scb->lun = scb->scsi_cmd->device->lun;
1987 	scb->sg_len = 0;
1988 	scb->data_len = 0;
1989 	scb->flags = 0;
1990 	scb->op_code = 0;
1991 	scb->callback = ipsintr_done;
1992 	scb->timeout = ips_cmd_timeout;
1993 
1994 	scb->data_len = ha->flash_datasize;
1995 	scb->data_busaddr =
1996 	    pci_map_single(ha->pcidev, ha->flash_data, scb->data_len,
1997 			   IPS_DMA_DIR(scb));
1998 	scb->flags |= IPS_SCB_MAP_SINGLE;
1999 	scb->cmd.flashfw.command_id = IPS_COMMAND_ID(ha, scb);
2000 	scb->cmd.flashfw.buffer_addr = cpu_to_le32(scb->data_busaddr);
2001 	if (pt->TimeOut)
2002 		scb->timeout = pt->TimeOut;
2003 	scb->scsi_cmd->result = DID_OK << 16;
2004 	return IPS_SUCCESS;
2005 }
2006 
2007 /****************************************************************************/
2008 /* Routine Name: ips_free_flash_copperhead                                  */
2009 /* Routine Description:                                                     */
2010 /*   release the memory resources used to hold the flash image              */
2011 /****************************************************************************/
2012 static void
2013 ips_free_flash_copperhead(ips_ha_t * ha)
2014 {
2015 	if (ha->flash_data == ips_FlashData)
2016 		test_and_clear_bit(0, &ips_FlashDataInUse);
2017 	else if (ha->flash_data)
2018 		pci_free_consistent(ha->pcidev, ha->flash_len, ha->flash_data,
2019 				    ha->flash_busaddr);
2020 	ha->flash_data = NULL;
2021 }
2022 
2023 /****************************************************************************/
2024 /*                                                                          */
2025 /* Routine Name: ips_usrcmd                                                 */
2026 /*                                                                          */
2027 /* Routine Description:                                                     */
2028 /*                                                                          */
2029 /*   Process a user command and make it ready to send                       */
2030 /*                                                                          */
2031 /****************************************************************************/
2032 static int
2033 ips_usrcmd(ips_ha_t * ha, ips_passthru_t * pt, ips_scb_t * scb)
2034 {
2035 	IPS_SG_LIST sg_list;
2036 	uint32_t cmd_busaddr;
2037 
2038 	METHOD_TRACE("ips_usrcmd", 1);
2039 
2040 	if ((!scb) || (!pt) || (!ha))
2041 		return (0);
2042 
2043 	/* Save the S/G list pointer so it doesn't get clobbered */
2044 	sg_list.list = scb->sg_list.list;
2045 	cmd_busaddr = scb->scb_busaddr;
2046 	/* copy in the CP */
2047 	memcpy(&scb->cmd, &pt->CoppCP.cmd, sizeof (IPS_IOCTL_CMD));
2048 	memcpy(&scb->dcdb, &pt->CoppCP.dcdb, sizeof (IPS_DCDB_TABLE));
2049 
2050 	/* FIX stuff that might be wrong */
2051 	scb->sg_list.list = sg_list.list;
2052 	scb->scb_busaddr = cmd_busaddr;
2053 	scb->bus = scb->scsi_cmd->device->channel;
2054 	scb->target_id = scb->scsi_cmd->device->id;
2055 	scb->lun = scb->scsi_cmd->device->lun;
2056 	scb->sg_len = 0;
2057 	scb->data_len = 0;
2058 	scb->flags = 0;
2059 	scb->op_code = 0;
2060 	scb->callback = ipsintr_done;
2061 	scb->timeout = ips_cmd_timeout;
2062 	scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb);
2063 
2064 	/* we don't support DCDB/READ/WRITE Scatter Gather */
2065 	if ((scb->cmd.basic_io.op_code == IPS_CMD_READ_SG) ||
2066 	    (scb->cmd.basic_io.op_code == IPS_CMD_WRITE_SG) ||
2067 	    (scb->cmd.basic_io.op_code == IPS_CMD_DCDB_SG))
2068 		return (0);
2069 
2070 	if (pt->CmdBSize) {
2071 		scb->data_len = pt->CmdBSize;
2072 		scb->data_busaddr = ha->ioctl_busaddr + sizeof (ips_passthru_t);
2073 	} else {
2074 		scb->data_busaddr = 0L;
2075 	}
2076 
2077 	if (scb->cmd.dcdb.op_code == IPS_CMD_DCDB)
2078 		scb->cmd.dcdb.dcdb_address = cpu_to_le32(scb->scb_busaddr +
2079 							 (unsigned long) &scb->
2080 							 dcdb -
2081 							 (unsigned long) scb);
2082 
2083 	if (pt->CmdBSize) {
2084 		if (scb->cmd.dcdb.op_code == IPS_CMD_DCDB)
2085 			scb->dcdb.buffer_pointer =
2086 			    cpu_to_le32(scb->data_busaddr);
2087 		else
2088 			scb->cmd.basic_io.sg_addr =
2089 			    cpu_to_le32(scb->data_busaddr);
2090 	}
2091 
2092 	/* set timeouts */
2093 	if (pt->TimeOut) {
2094 		scb->timeout = pt->TimeOut;
2095 
2096 		if (pt->TimeOut <= 10)
2097 			scb->dcdb.cmd_attribute |= IPS_TIMEOUT10;
2098 		else if (pt->TimeOut <= 60)
2099 			scb->dcdb.cmd_attribute |= IPS_TIMEOUT60;
2100 		else
2101 			scb->dcdb.cmd_attribute |= IPS_TIMEOUT20M;
2102 	}
2103 
2104 	/* assume success */
2105 	scb->scsi_cmd->result = DID_OK << 16;
2106 
2107 	/* success */
2108 	return (1);
2109 }
2110 
2111 /****************************************************************************/
2112 /*                                                                          */
2113 /* Routine Name: ips_cleanup_passthru                                       */
2114 /*                                                                          */
2115 /* Routine Description:                                                     */
2116 /*                                                                          */
2117 /*   Cleanup after a passthru command                                       */
2118 /*                                                                          */
2119 /****************************************************************************/
2120 static void
2121 ips_cleanup_passthru(ips_ha_t * ha, ips_scb_t * scb)
2122 {
2123 	ips_passthru_t *pt;
2124 
2125 	METHOD_TRACE("ips_cleanup_passthru", 1);
2126 
2127 	if ((!scb) || (!scb->scsi_cmd) || (!scb->scsi_cmd->request_buffer)) {
2128 		DEBUG_VAR(1, "(%s%d) couldn't cleanup after passthru",
2129 			  ips_name, ha->host_num);
2130 
2131 		return;
2132 	}
2133 	pt = (ips_passthru_t *) ha->ioctl_data;
2134 
2135 	/* Copy data back to the user */
2136 	if (scb->cmd.dcdb.op_code == IPS_CMD_DCDB)	/* Copy DCDB Back to Caller's Area */
2137 		memcpy(&pt->CoppCP.dcdb, &scb->dcdb, sizeof (IPS_DCDB_TABLE));
2138 
2139 	pt->BasicStatus = scb->basic_status;
2140 	pt->ExtendedStatus = scb->extended_status;
2141 	pt->AdapterType = ha->ad_type;
2142 
2143 	if (ha->device_id == IPS_DEVICEID_COPPERHEAD &&
2144 	    (scb->cmd.flashfw.op_code == IPS_CMD_DOWNLOAD ||
2145 	     scb->cmd.flashfw.op_code == IPS_CMD_RW_BIOSFW))
2146 		ips_free_flash_copperhead(ha);
2147 
2148 	ips_scmd_buf_write(scb->scsi_cmd, ha->ioctl_data, ha->ioctl_datasize);
2149 }
2150 
2151 /****************************************************************************/
2152 /*                                                                          */
2153 /* Routine Name: ips_host_info                                              */
2154 /*                                                                          */
2155 /* Routine Description:                                                     */
2156 /*                                                                          */
2157 /*   The passthru interface for the driver                                  */
2158 /*                                                                          */
2159 /****************************************************************************/
2160 static int
2161 ips_host_info(ips_ha_t * ha, char *ptr, off_t offset, int len)
2162 {
2163 	IPS_INFOSTR info;
2164 
2165 	METHOD_TRACE("ips_host_info", 1);
2166 
2167 	info.buffer = ptr;
2168 	info.length = len;
2169 	info.offset = offset;
2170 	info.pos = 0;
2171 	info.localpos = 0;
2172 
2173 	copy_info(&info, "\nIBM ServeRAID General Information:\n\n");
2174 
2175 	if ((le32_to_cpu(ha->nvram->signature) == IPS_NVRAM_P5_SIG) &&
2176 	    (le16_to_cpu(ha->nvram->adapter_type) != 0))
2177 		copy_info(&info, "\tController Type                   : %s\n",
2178 			  ips_adapter_name[ha->ad_type - 1]);
2179 	else
2180 		copy_info(&info,
2181 			  "\tController Type                   : Unknown\n");
2182 
2183 	if (ha->io_addr)
2184 		copy_info(&info,
2185 			  "\tIO region                         : 0x%lx (%d bytes)\n",
2186 			  ha->io_addr, ha->io_len);
2187 
2188 	if (ha->mem_addr) {
2189 		copy_info(&info,
2190 			  "\tMemory region                     : 0x%lx (%d bytes)\n",
2191 			  ha->mem_addr, ha->mem_len);
2192 		copy_info(&info,
2193 			  "\tShared memory address             : 0x%lx\n",
2194 			  ha->mem_ptr);
2195 	}
2196 
2197 	copy_info(&info, "\tIRQ number                        : %d\n", ha->irq);
2198 
2199     /* For the Next 3 lines Check for Binary 0 at the end and don't include it if it's there. */
2200     /* That keeps everything happy for "text" operations on the proc file.                    */
2201 
2202 	if (le32_to_cpu(ha->nvram->signature) == IPS_NVRAM_P5_SIG) {
2203         if (ha->nvram->bios_low[3] == 0) {
2204             copy_info(&info,
2205 			          "\tBIOS Version                      : %c%c%c%c%c%c%c\n",
2206 			          ha->nvram->bios_high[0], ha->nvram->bios_high[1],
2207 			          ha->nvram->bios_high[2], ha->nvram->bios_high[3],
2208 			          ha->nvram->bios_low[0], ha->nvram->bios_low[1],
2209 			          ha->nvram->bios_low[2]);
2210 
2211         } else {
2212 		    copy_info(&info,
2213 			          "\tBIOS Version                      : %c%c%c%c%c%c%c%c\n",
2214 			          ha->nvram->bios_high[0], ha->nvram->bios_high[1],
2215 			          ha->nvram->bios_high[2], ha->nvram->bios_high[3],
2216 			          ha->nvram->bios_low[0], ha->nvram->bios_low[1],
2217 			          ha->nvram->bios_low[2], ha->nvram->bios_low[3]);
2218         }
2219 
2220     }
2221 
2222     if (ha->enq->CodeBlkVersion[7] == 0) {
2223         copy_info(&info,
2224 		          "\tFirmware Version                  : %c%c%c%c%c%c%c\n",
2225 		          ha->enq->CodeBlkVersion[0], ha->enq->CodeBlkVersion[1],
2226 		          ha->enq->CodeBlkVersion[2], ha->enq->CodeBlkVersion[3],
2227 		          ha->enq->CodeBlkVersion[4], ha->enq->CodeBlkVersion[5],
2228 		          ha->enq->CodeBlkVersion[6]);
2229     } else {
2230         copy_info(&info,
2231 		          "\tFirmware Version                  : %c%c%c%c%c%c%c%c\n",
2232 		          ha->enq->CodeBlkVersion[0], ha->enq->CodeBlkVersion[1],
2233 		          ha->enq->CodeBlkVersion[2], ha->enq->CodeBlkVersion[3],
2234 		          ha->enq->CodeBlkVersion[4], ha->enq->CodeBlkVersion[5],
2235 		          ha->enq->CodeBlkVersion[6], ha->enq->CodeBlkVersion[7]);
2236     }
2237 
2238     if (ha->enq->BootBlkVersion[7] == 0) {
2239         copy_info(&info,
2240 		          "\tBoot Block Version                : %c%c%c%c%c%c%c\n",
2241 		          ha->enq->BootBlkVersion[0], ha->enq->BootBlkVersion[1],
2242 		          ha->enq->BootBlkVersion[2], ha->enq->BootBlkVersion[3],
2243 		          ha->enq->BootBlkVersion[4], ha->enq->BootBlkVersion[5],
2244 		          ha->enq->BootBlkVersion[6]);
2245     } else {
2246         copy_info(&info,
2247 		          "\tBoot Block Version                : %c%c%c%c%c%c%c%c\n",
2248 		          ha->enq->BootBlkVersion[0], ha->enq->BootBlkVersion[1],
2249 		          ha->enq->BootBlkVersion[2], ha->enq->BootBlkVersion[3],
2250 		          ha->enq->BootBlkVersion[4], ha->enq->BootBlkVersion[5],
2251 		          ha->enq->BootBlkVersion[6], ha->enq->BootBlkVersion[7]);
2252     }
2253 
2254 	copy_info(&info, "\tDriver Version                    : %s%s\n",
2255 		  IPS_VERSION_HIGH, IPS_VERSION_LOW);
2256 
2257 	copy_info(&info, "\tDriver Build                      : %d\n",
2258 		  IPS_BUILD_IDENT);
2259 
2260 	copy_info(&info, "\tMax Physical Devices              : %d\n",
2261 		  ha->enq->ucMaxPhysicalDevices);
2262 	copy_info(&info, "\tMax Active Commands               : %d\n",
2263 		  ha->max_cmds);
2264 	copy_info(&info, "\tCurrent Queued Commands           : %d\n",
2265 		  ha->scb_waitlist.count);
2266 	copy_info(&info, "\tCurrent Active Commands           : %d\n",
2267 		  ha->scb_activelist.count - ha->num_ioctl);
2268 	copy_info(&info, "\tCurrent Queued PT Commands        : %d\n",
2269 		  ha->copp_waitlist.count);
2270 	copy_info(&info, "\tCurrent Active PT Commands        : %d\n",
2271 		  ha->num_ioctl);
2272 
2273 	copy_info(&info, "\n");
2274 
2275 	return (info.localpos);
2276 }
2277 
2278 /****************************************************************************/
2279 /*                                                                          */
2280 /* Routine Name: copy_mem_info                                              */
2281 /*                                                                          */
2282 /* Routine Description:                                                     */
2283 /*                                                                          */
2284 /*   Copy data into an IPS_INFOSTR structure                                */
2285 /*                                                                          */
2286 /****************************************************************************/
2287 static void
2288 copy_mem_info(IPS_INFOSTR * info, char *data, int len)
2289 {
2290 	METHOD_TRACE("copy_mem_info", 1);
2291 
2292 	if (info->pos + len < info->offset) {
2293 		info->pos += len;
2294 		return;
2295 	}
2296 
2297 	if (info->pos < info->offset) {
2298 		data += (info->offset - info->pos);
2299 		len -= (info->offset - info->pos);
2300 		info->pos += (info->offset - info->pos);
2301 	}
2302 
2303 	if (info->localpos + len > info->length)
2304 		len = info->length - info->localpos;
2305 
2306 	if (len > 0) {
2307 		memcpy(info->buffer + info->localpos, data, len);
2308 		info->pos += len;
2309 		info->localpos += len;
2310 	}
2311 }
2312 
2313 /****************************************************************************/
2314 /*                                                                          */
2315 /* Routine Name: copy_info                                                  */
2316 /*                                                                          */
2317 /* Routine Description:                                                     */
2318 /*                                                                          */
2319 /*   printf style wrapper for an info structure                             */
2320 /*                                                                          */
2321 /****************************************************************************/
2322 static int
2323 copy_info(IPS_INFOSTR * info, char *fmt, ...)
2324 {
2325 	va_list args;
2326 	char buf[128];
2327 	int len;
2328 
2329 	METHOD_TRACE("copy_info", 1);
2330 
2331 	va_start(args, fmt);
2332 	len = vsprintf(buf, fmt, args);
2333 	va_end(args);
2334 
2335 	copy_mem_info(info, buf, len);
2336 
2337 	return (len);
2338 }
2339 
2340 /****************************************************************************/
2341 /*                                                                          */
2342 /* Routine Name: ips_identify_controller                                    */
2343 /*                                                                          */
2344 /* Routine Description:                                                     */
2345 /*                                                                          */
2346 /*   Identify this controller                                               */
2347 /*                                                                          */
2348 /****************************************************************************/
2349 static void
2350 ips_identify_controller(ips_ha_t * ha)
2351 {
2352 	METHOD_TRACE("ips_identify_controller", 1);
2353 
2354 	switch (ha->device_id) {
2355 	case IPS_DEVICEID_COPPERHEAD:
2356 		if (ha->revision_id <= IPS_REVID_SERVERAID) {
2357 			ha->ad_type = IPS_ADTYPE_SERVERAID;
2358 		} else if (ha->revision_id == IPS_REVID_SERVERAID2) {
2359 			ha->ad_type = IPS_ADTYPE_SERVERAID2;
2360 		} else if (ha->revision_id == IPS_REVID_NAVAJO) {
2361 			ha->ad_type = IPS_ADTYPE_NAVAJO;
2362 		} else if ((ha->revision_id == IPS_REVID_SERVERAID2)
2363 			   && (ha->slot_num == 0)) {
2364 			ha->ad_type = IPS_ADTYPE_KIOWA;
2365 		} else if ((ha->revision_id >= IPS_REVID_CLARINETP1) &&
2366 			   (ha->revision_id <= IPS_REVID_CLARINETP3)) {
2367 			if (ha->enq->ucMaxPhysicalDevices == 15)
2368 				ha->ad_type = IPS_ADTYPE_SERVERAID3L;
2369 			else
2370 				ha->ad_type = IPS_ADTYPE_SERVERAID3;
2371 		} else if ((ha->revision_id >= IPS_REVID_TROMBONE32) &&
2372 			   (ha->revision_id <= IPS_REVID_TROMBONE64)) {
2373 			ha->ad_type = IPS_ADTYPE_SERVERAID4H;
2374 		}
2375 		break;
2376 
2377 	case IPS_DEVICEID_MORPHEUS:
2378 		switch (ha->subdevice_id) {
2379 		case IPS_SUBDEVICEID_4L:
2380 			ha->ad_type = IPS_ADTYPE_SERVERAID4L;
2381 			break;
2382 
2383 		case IPS_SUBDEVICEID_4M:
2384 			ha->ad_type = IPS_ADTYPE_SERVERAID4M;
2385 			break;
2386 
2387 		case IPS_SUBDEVICEID_4MX:
2388 			ha->ad_type = IPS_ADTYPE_SERVERAID4MX;
2389 			break;
2390 
2391 		case IPS_SUBDEVICEID_4LX:
2392 			ha->ad_type = IPS_ADTYPE_SERVERAID4LX;
2393 			break;
2394 
2395 		case IPS_SUBDEVICEID_5I2:
2396 			ha->ad_type = IPS_ADTYPE_SERVERAID5I2;
2397 			break;
2398 
2399 		case IPS_SUBDEVICEID_5I1:
2400 			ha->ad_type = IPS_ADTYPE_SERVERAID5I1;
2401 			break;
2402 		}
2403 
2404 		break;
2405 
2406 	case IPS_DEVICEID_MARCO:
2407 		switch (ha->subdevice_id) {
2408 		case IPS_SUBDEVICEID_6M:
2409 			ha->ad_type = IPS_ADTYPE_SERVERAID6M;
2410 			break;
2411 		case IPS_SUBDEVICEID_6I:
2412 			ha->ad_type = IPS_ADTYPE_SERVERAID6I;
2413 			break;
2414 		case IPS_SUBDEVICEID_7k:
2415 			ha->ad_type = IPS_ADTYPE_SERVERAID7k;
2416 			break;
2417 		case IPS_SUBDEVICEID_7M:
2418 			ha->ad_type = IPS_ADTYPE_SERVERAID7M;
2419 			break;
2420 		}
2421 		break;
2422 	}
2423 }
2424 
2425 /****************************************************************************/
2426 /*                                                                          */
2427 /* Routine Name: ips_get_bios_version                                       */
2428 /*                                                                          */
2429 /* Routine Description:                                                     */
2430 /*                                                                          */
2431 /*   Get the BIOS revision number                                           */
2432 /*                                                                          */
2433 /****************************************************************************/
2434 static void
2435 ips_get_bios_version(ips_ha_t * ha, int intr)
2436 {
2437 	ips_scb_t *scb;
2438 	int ret;
2439 	uint8_t major;
2440 	uint8_t minor;
2441 	uint8_t subminor;
2442 	uint8_t *buffer;
2443 	char hexDigits[] =
2444 	    { '0', '1', '2', '3', '4', '5', '6', '7', '8', '9', 'A', 'B', 'C',
2445      'D', 'E', 'F' };
2446 
2447 	METHOD_TRACE("ips_get_bios_version", 1);
2448 
2449 	major = 0;
2450 	minor = 0;
2451 
2452 	strncpy(ha->bios_version, "       ?", 8);
2453 
2454 	if (ha->device_id == IPS_DEVICEID_COPPERHEAD) {
2455 		if (IPS_USE_MEMIO(ha)) {
2456 			/* Memory Mapped I/O */
2457 
2458 			/* test 1st byte */
2459 			writel(0, ha->mem_ptr + IPS_REG_FLAP);
2460 			if (ha->revision_id == IPS_REVID_TROMBONE64)
2461 				udelay(25);	/* 25 us */
2462 
2463 			if (readb(ha->mem_ptr + IPS_REG_FLDP) != 0x55)
2464 				return;
2465 
2466 			writel(1, ha->mem_ptr + IPS_REG_FLAP);
2467 			if (ha->revision_id == IPS_REVID_TROMBONE64)
2468 				udelay(25);	/* 25 us */
2469 
2470 			if (readb(ha->mem_ptr + IPS_REG_FLDP) != 0xAA)
2471 				return;
2472 
2473 			/* Get Major version */
2474 			writel(0x1FF, ha->mem_ptr + IPS_REG_FLAP);
2475 			if (ha->revision_id == IPS_REVID_TROMBONE64)
2476 				udelay(25);	/* 25 us */
2477 
2478 			major = readb(ha->mem_ptr + IPS_REG_FLDP);
2479 
2480 			/* Get Minor version */
2481 			writel(0x1FE, ha->mem_ptr + IPS_REG_FLAP);
2482 			if (ha->revision_id == IPS_REVID_TROMBONE64)
2483 				udelay(25);	/* 25 us */
2484 			minor = readb(ha->mem_ptr + IPS_REG_FLDP);
2485 
2486 			/* Get SubMinor version */
2487 			writel(0x1FD, ha->mem_ptr + IPS_REG_FLAP);
2488 			if (ha->revision_id == IPS_REVID_TROMBONE64)
2489 				udelay(25);	/* 25 us */
2490 			subminor = readb(ha->mem_ptr + IPS_REG_FLDP);
2491 
2492 		} else {
2493 			/* Programmed I/O */
2494 
2495 			/* test 1st byte */
2496 			outl(0, ha->io_addr + IPS_REG_FLAP);
2497 			if (ha->revision_id == IPS_REVID_TROMBONE64)
2498 				udelay(25);	/* 25 us */
2499 
2500 			if (inb(ha->io_addr + IPS_REG_FLDP) != 0x55)
2501 				return;
2502 
2503 			outl(cpu_to_le32(1), ha->io_addr + IPS_REG_FLAP);
2504 			if (ha->revision_id == IPS_REVID_TROMBONE64)
2505 				udelay(25);	/* 25 us */
2506 
2507 			if (inb(ha->io_addr + IPS_REG_FLDP) != 0xAA)
2508 				return;
2509 
2510 			/* Get Major version */
2511 			outl(cpu_to_le32(0x1FF), ha->io_addr + IPS_REG_FLAP);
2512 			if (ha->revision_id == IPS_REVID_TROMBONE64)
2513 				udelay(25);	/* 25 us */
2514 
2515 			major = inb(ha->io_addr + IPS_REG_FLDP);
2516 
2517 			/* Get Minor version */
2518 			outl(cpu_to_le32(0x1FE), ha->io_addr + IPS_REG_FLAP);
2519 			if (ha->revision_id == IPS_REVID_TROMBONE64)
2520 				udelay(25);	/* 25 us */
2521 
2522 			minor = inb(ha->io_addr + IPS_REG_FLDP);
2523 
2524 			/* Get SubMinor version */
2525 			outl(cpu_to_le32(0x1FD), ha->io_addr + IPS_REG_FLAP);
2526 			if (ha->revision_id == IPS_REVID_TROMBONE64)
2527 				udelay(25);	/* 25 us */
2528 
2529 			subminor = inb(ha->io_addr + IPS_REG_FLDP);
2530 
2531 		}
2532 	} else {
2533 		/* Morpheus Family - Send Command to the card */
2534 
2535 		buffer = ha->ioctl_data;
2536 
2537 		memset(buffer, 0, 0x1000);
2538 
2539 		scb = &ha->scbs[ha->max_cmds - 1];
2540 
2541 		ips_init_scb(ha, scb);
2542 
2543 		scb->timeout = ips_cmd_timeout;
2544 		scb->cdb[0] = IPS_CMD_RW_BIOSFW;
2545 
2546 		scb->cmd.flashfw.op_code = IPS_CMD_RW_BIOSFW;
2547 		scb->cmd.flashfw.command_id = IPS_COMMAND_ID(ha, scb);
2548 		scb->cmd.flashfw.type = 1;
2549 		scb->cmd.flashfw.direction = 0;
2550 		scb->cmd.flashfw.count = cpu_to_le32(0x800);
2551 		scb->cmd.flashfw.total_packets = 1;
2552 		scb->cmd.flashfw.packet_num = 0;
2553 		scb->data_len = 0x1000;
2554 		scb->cmd.flashfw.buffer_addr = ha->ioctl_busaddr;
2555 
2556 		/* issue the command */
2557 		if (((ret =
2558 		      ips_send_wait(ha, scb, ips_cmd_timeout,
2559 				    intr)) == IPS_FAILURE)
2560 		    || (ret == IPS_SUCCESS_IMM)
2561 		    || ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1)) {
2562 			/* Error occurred */
2563 
2564 			return;
2565 		}
2566 
2567 		if ((buffer[0xC0] == 0x55) && (buffer[0xC1] == 0xAA)) {
2568 			major = buffer[0x1ff + 0xC0];	/* Offset 0x1ff after the header (0xc0) */
2569 			minor = buffer[0x1fe + 0xC0];	/* Offset 0x1fe after the header (0xc0) */
2570 			subminor = buffer[0x1fd + 0xC0];	/* Offset 0x1fd after the header (0xc0) */
2571 		} else {
2572 			return;
2573 		}
2574 	}
2575 
2576 	ha->bios_version[0] = hexDigits[(major & 0xF0) >> 4];
2577 	ha->bios_version[1] = '.';
2578 	ha->bios_version[2] = hexDigits[major & 0x0F];
2579 	ha->bios_version[3] = hexDigits[subminor];
2580 	ha->bios_version[4] = '.';
2581 	ha->bios_version[5] = hexDigits[(minor & 0xF0) >> 4];
2582 	ha->bios_version[6] = hexDigits[minor & 0x0F];
2583 	ha->bios_version[7] = 0;
2584 }
2585 
2586 /****************************************************************************/
2587 /*                                                                          */
2588 /* Routine Name: ips_hainit                                                 */
2589 /*                                                                          */
2590 /* Routine Description:                                                     */
2591 /*                                                                          */
2592 /*   Initialize the controller                                              */
2593 /*                                                                          */
2594 /* NOTE: Assumes to be called from with a lock                              */
2595 /*                                                                          */
2596 /****************************************************************************/
2597 static int
2598 ips_hainit(ips_ha_t * ha)
2599 {
2600 	int i;
2601 	struct timeval tv;
2602 
2603 	METHOD_TRACE("ips_hainit", 1);
2604 
2605 	if (!ha)
2606 		return (0);
2607 
2608 	if (ha->func.statinit)
2609 		(*ha->func.statinit) (ha);
2610 
2611 	if (ha->func.enableint)
2612 		(*ha->func.enableint) (ha);
2613 
2614 	/* Send FFDC */
2615 	ha->reset_count = 1;
2616 	do_gettimeofday(&tv);
2617 	ha->last_ffdc = tv.tv_sec;
2618 	ips_ffdc_reset(ha, IPS_INTR_IORL);
2619 
2620 	if (!ips_read_config(ha, IPS_INTR_IORL)) {
2621 		IPS_PRINTK(KERN_WARNING, ha->pcidev,
2622 			   "unable to read config from controller.\n");
2623 
2624 		return (0);
2625 	}
2626 	/* end if */
2627 	if (!ips_read_adapter_status(ha, IPS_INTR_IORL)) {
2628 		IPS_PRINTK(KERN_WARNING, ha->pcidev,
2629 			   "unable to read controller status.\n");
2630 
2631 		return (0);
2632 	}
2633 
2634 	/* Identify this controller */
2635 	ips_identify_controller(ha);
2636 
2637 	if (!ips_read_subsystem_parameters(ha, IPS_INTR_IORL)) {
2638 		IPS_PRINTK(KERN_WARNING, ha->pcidev,
2639 			   "unable to read subsystem parameters.\n");
2640 
2641 		return (0);
2642 	}
2643 
2644 	/* write nvram user page 5 */
2645 	if (!ips_write_driver_status(ha, IPS_INTR_IORL)) {
2646 		IPS_PRINTK(KERN_WARNING, ha->pcidev,
2647 			   "unable to write driver info to controller.\n");
2648 
2649 		return (0);
2650 	}
2651 
2652 	/* If there are Logical Drives and a Reset Occurred, then an EraseStripeLock is Needed */
2653 	if ((ha->conf->ucLogDriveCount > 0) && (ha->requires_esl == 1))
2654 		ips_clear_adapter(ha, IPS_INTR_IORL);
2655 
2656 	/* set limits on SID, LUN, BUS */
2657 	ha->ntargets = IPS_MAX_TARGETS + 1;
2658 	ha->nlun = 1;
2659 	ha->nbus = (ha->enq->ucMaxPhysicalDevices / IPS_MAX_TARGETS) + 1;
2660 
2661 	switch (ha->conf->logical_drive[0].ucStripeSize) {
2662 	case 4:
2663 		ha->max_xfer = 0x10000;
2664 		break;
2665 
2666 	case 5:
2667 		ha->max_xfer = 0x20000;
2668 		break;
2669 
2670 	case 6:
2671 		ha->max_xfer = 0x40000;
2672 		break;
2673 
2674 	case 7:
2675 	default:
2676 		ha->max_xfer = 0x80000;
2677 		break;
2678 	}
2679 
2680 	/* setup max concurrent commands */
2681 	if (le32_to_cpu(ha->subsys->param[4]) & 0x1) {
2682 		/* Use the new method */
2683 		ha->max_cmds = ha->enq->ucConcurrentCmdCount;
2684 	} else {
2685 		/* use the old method */
2686 		switch (ha->conf->logical_drive[0].ucStripeSize) {
2687 		case 4:
2688 			ha->max_cmds = 32;
2689 			break;
2690 
2691 		case 5:
2692 			ha->max_cmds = 16;
2693 			break;
2694 
2695 		case 6:
2696 			ha->max_cmds = 8;
2697 			break;
2698 
2699 		case 7:
2700 		default:
2701 			ha->max_cmds = 4;
2702 			break;
2703 		}
2704 	}
2705 
2706 	/* Limit the Active Commands on a Lite Adapter */
2707 	if ((ha->ad_type == IPS_ADTYPE_SERVERAID3L) ||
2708 	    (ha->ad_type == IPS_ADTYPE_SERVERAID4L) ||
2709 	    (ha->ad_type == IPS_ADTYPE_SERVERAID4LX)) {
2710 		if ((ha->max_cmds > MaxLiteCmds) && (MaxLiteCmds))
2711 			ha->max_cmds = MaxLiteCmds;
2712 	}
2713 
2714 	/* set controller IDs */
2715 	ha->ha_id[0] = IPS_ADAPTER_ID;
2716 	for (i = 1; i < ha->nbus; i++) {
2717 		ha->ha_id[i] = ha->conf->init_id[i - 1] & 0x1f;
2718 		ha->dcdb_active[i - 1] = 0;
2719 	}
2720 
2721 	return (1);
2722 }
2723 
2724 /****************************************************************************/
2725 /*                                                                          */
2726 /* Routine Name: ips_next                                                   */
2727 /*                                                                          */
2728 /* Routine Description:                                                     */
2729 /*                                                                          */
2730 /*   Take the next command off the queue and send it to the controller      */
2731 /*                                                                          */
2732 /****************************************************************************/
2733 static void
2734 ips_next(ips_ha_t * ha, int intr)
2735 {
2736 	ips_scb_t *scb;
2737 	Scsi_Cmnd *SC;
2738 	Scsi_Cmnd *p;
2739 	Scsi_Cmnd *q;
2740 	ips_copp_wait_item_t *item;
2741 	int ret;
2742 	unsigned long cpu_flags = 0;
2743 	struct Scsi_Host *host;
2744 	METHOD_TRACE("ips_next", 1);
2745 
2746 	if (!ha)
2747 		return;
2748 	host = ips_sh[ha->host_num];
2749 	/*
2750 	 * Block access to the queue function so
2751 	 * this command won't time out
2752 	 */
2753 	if (intr == IPS_INTR_ON)
2754 		IPS_LOCK_SAVE(host->host_lock, cpu_flags);
2755 
2756 	if ((ha->subsys->param[3] & 0x300000)
2757 	    && (ha->scb_activelist.count == 0)) {
2758 		struct timeval tv;
2759 
2760 		do_gettimeofday(&tv);
2761 
2762 		if (tv.tv_sec - ha->last_ffdc > IPS_SECS_8HOURS) {
2763 			ha->last_ffdc = tv.tv_sec;
2764 			ips_ffdc_time(ha);
2765 		}
2766 	}
2767 
2768 	/*
2769 	 * Send passthru commands
2770 	 * These have priority over normal I/O
2771 	 * but shouldn't affect performance too much
2772 	 * since we limit the number that can be active
2773 	 * on the card at any one time
2774 	 */
2775 	while ((ha->num_ioctl < IPS_MAX_IOCTL) &&
2776 	       (ha->copp_waitlist.head) && (scb = ips_getscb(ha))) {
2777 
2778 		item = ips_removeq_copp_head(&ha->copp_waitlist);
2779 		ha->num_ioctl++;
2780 		if (intr == IPS_INTR_ON)
2781 			IPS_UNLOCK_RESTORE(host->host_lock, cpu_flags);
2782 		scb->scsi_cmd = item->scsi_cmd;
2783 		kfree(item);
2784 
2785 		ret = ips_make_passthru(ha, scb->scsi_cmd, scb, intr);
2786 
2787 		if (intr == IPS_INTR_ON)
2788 			IPS_LOCK_SAVE(host->host_lock, cpu_flags);
2789 		switch (ret) {
2790 		case IPS_FAILURE:
2791 			if (scb->scsi_cmd) {
2792 				scb->scsi_cmd->result = DID_ERROR << 16;
2793 				scb->scsi_cmd->scsi_done(scb->scsi_cmd);
2794 			}
2795 
2796 			ips_freescb(ha, scb);
2797 			break;
2798 		case IPS_SUCCESS_IMM:
2799 			if (scb->scsi_cmd) {
2800 				scb->scsi_cmd->result = DID_OK << 16;
2801 				scb->scsi_cmd->scsi_done(scb->scsi_cmd);
2802 			}
2803 
2804 			ips_freescb(ha, scb);
2805 			break;
2806 		default:
2807 			break;
2808 		}		/* end case */
2809 
2810 		if (ret != IPS_SUCCESS) {
2811 			ha->num_ioctl--;
2812 			continue;
2813 		}
2814 
2815 		ret = ips_send_cmd(ha, scb);
2816 
2817 		if (ret == IPS_SUCCESS)
2818 			ips_putq_scb_head(&ha->scb_activelist, scb);
2819 		else
2820 			ha->num_ioctl--;
2821 
2822 		switch (ret) {
2823 		case IPS_FAILURE:
2824 			if (scb->scsi_cmd) {
2825 				scb->scsi_cmd->result = DID_ERROR << 16;
2826 			}
2827 
2828 			ips_freescb(ha, scb);
2829 			break;
2830 		case IPS_SUCCESS_IMM:
2831 			ips_freescb(ha, scb);
2832 			break;
2833 		default:
2834 			break;
2835 		}		/* end case */
2836 
2837 	}
2838 
2839 	/*
2840 	 * Send "Normal" I/O commands
2841 	 */
2842 
2843 	p = ha->scb_waitlist.head;
2844 	while ((p) && (scb = ips_getscb(ha))) {
2845 		if ((scmd_channel(p) > 0)
2846 		    && (ha->
2847 			dcdb_active[scmd_channel(p) -
2848 				    1] & (1 << scmd_id(p)))) {
2849 			ips_freescb(ha, scb);
2850 			p = (Scsi_Cmnd *) p->host_scribble;
2851 			continue;
2852 		}
2853 
2854 		q = p;
2855 		SC = ips_removeq_wait(&ha->scb_waitlist, q);
2856 
2857 		if (intr == IPS_INTR_ON)
2858 			IPS_UNLOCK_RESTORE(host->host_lock, cpu_flags);	/* Unlock HA after command is taken off queue */
2859 
2860 		SC->result = DID_OK;
2861 		SC->host_scribble = NULL;
2862 
2863 		memset(SC->sense_buffer, 0, sizeof (SC->sense_buffer));
2864 
2865 		scb->target_id = SC->device->id;
2866 		scb->lun = SC->device->lun;
2867 		scb->bus = SC->device->channel;
2868 		scb->scsi_cmd = SC;
2869 		scb->breakup = 0;
2870 		scb->data_len = 0;
2871 		scb->callback = ipsintr_done;
2872 		scb->timeout = ips_cmd_timeout;
2873 		memset(&scb->cmd, 0, 16);
2874 
2875 		/* copy in the CDB */
2876 		memcpy(scb->cdb, SC->cmnd, SC->cmd_len);
2877 
2878 		/* Now handle the data buffer */
2879 		if (SC->use_sg) {
2880 			struct scatterlist *sg;
2881 			int i;
2882 
2883 			sg = SC->request_buffer;
2884 			scb->sg_count = pci_map_sg(ha->pcidev, sg, SC->use_sg,
2885 						   SC->sc_data_direction);
2886 			scb->flags |= IPS_SCB_MAP_SG;
2887 			for (i = 0; i < scb->sg_count; i++) {
2888 				if (ips_fill_scb_sg_single
2889 				    (ha, sg_dma_address(&sg[i]), scb, i,
2890 				     sg_dma_len(&sg[i])) < 0)
2891 					break;
2892 			}
2893 			scb->dcdb.transfer_length = scb->data_len;
2894 		} else {
2895 			if (SC->request_bufflen) {
2896 				scb->data_busaddr =
2897 				    pci_map_single(ha->pcidev,
2898 						   SC->request_buffer,
2899 						   SC->request_bufflen,
2900 						   SC->sc_data_direction);
2901 				scb->flags |= IPS_SCB_MAP_SINGLE;
2902 				ips_fill_scb_sg_single(ha, scb->data_busaddr,
2903 						       scb, 0,
2904 						       SC->request_bufflen);
2905 				scb->dcdb.transfer_length = scb->data_len;
2906 			} else {
2907 				scb->data_busaddr = 0L;
2908 				scb->sg_len = 0;
2909 				scb->data_len = 0;
2910 				scb->dcdb.transfer_length = 0;
2911 			}
2912 
2913 		}
2914 
2915 		scb->dcdb.cmd_attribute =
2916 		    ips_command_direction[scb->scsi_cmd->cmnd[0]];
2917 
2918         /* Allow a WRITE BUFFER Command to Have no Data */
2919         /* This is Used by Tape Flash Utilites          */
2920         if ((scb->scsi_cmd->cmnd[0] == WRITE_BUFFER) && (scb->data_len == 0))
2921             scb->dcdb.cmd_attribute = 0;
2922 
2923 		if (!(scb->dcdb.cmd_attribute & 0x3))
2924 			scb->dcdb.transfer_length = 0;
2925 
2926 		if (scb->data_len >= IPS_MAX_XFER) {
2927 			scb->dcdb.cmd_attribute |= IPS_TRANSFER64K;
2928 			scb->dcdb.transfer_length = 0;
2929 		}
2930 		if (intr == IPS_INTR_ON)
2931 			IPS_LOCK_SAVE(host->host_lock, cpu_flags);
2932 
2933 		ret = ips_send_cmd(ha, scb);
2934 
2935 		switch (ret) {
2936 		case IPS_SUCCESS:
2937 			ips_putq_scb_head(&ha->scb_activelist, scb);
2938 			break;
2939 		case IPS_FAILURE:
2940 			if (scb->scsi_cmd) {
2941 				scb->scsi_cmd->result = DID_ERROR << 16;
2942 				scb->scsi_cmd->scsi_done(scb->scsi_cmd);
2943 			}
2944 
2945 			if (scb->bus)
2946 				ha->dcdb_active[scb->bus - 1] &=
2947 				    ~(1 << scb->target_id);
2948 
2949 			ips_freescb(ha, scb);
2950 			break;
2951 		case IPS_SUCCESS_IMM:
2952 			if (scb->scsi_cmd)
2953 				scb->scsi_cmd->scsi_done(scb->scsi_cmd);
2954 
2955 			if (scb->bus)
2956 				ha->dcdb_active[scb->bus - 1] &=
2957 				    ~(1 << scb->target_id);
2958 
2959 			ips_freescb(ha, scb);
2960 			break;
2961 		default:
2962 			break;
2963 		}		/* end case */
2964 
2965 		p = (Scsi_Cmnd *) p->host_scribble;
2966 
2967 	}			/* end while */
2968 
2969 	if (intr == IPS_INTR_ON)
2970 		IPS_UNLOCK_RESTORE(host->host_lock, cpu_flags);
2971 }
2972 
2973 /****************************************************************************/
2974 /*                                                                          */
2975 /* Routine Name: ips_putq_scb_head                                          */
2976 /*                                                                          */
2977 /* Routine Description:                                                     */
2978 /*                                                                          */
2979 /*   Add an item to the head of the queue                                   */
2980 /*                                                                          */
2981 /* ASSUMED to be called from within the HA lock                             */
2982 /*                                                                          */
2983 /****************************************************************************/
2984 static void
2985 ips_putq_scb_head(ips_scb_queue_t * queue, ips_scb_t * item)
2986 {
2987 	METHOD_TRACE("ips_putq_scb_head", 1);
2988 
2989 	if (!item)
2990 		return;
2991 
2992 	item->q_next = queue->head;
2993 	queue->head = item;
2994 
2995 	if (!queue->tail)
2996 		queue->tail = item;
2997 
2998 	queue->count++;
2999 }
3000 
3001 /****************************************************************************/
3002 /*                                                                          */
3003 /* Routine Name: ips_removeq_scb_head                                       */
3004 /*                                                                          */
3005 /* Routine Description:                                                     */
3006 /*                                                                          */
3007 /*   Remove the head of the queue                                           */
3008 /*                                                                          */
3009 /* ASSUMED to be called from within the HA lock                             */
3010 /*                                                                          */
3011 /****************************************************************************/
3012 static ips_scb_t *
3013 ips_removeq_scb_head(ips_scb_queue_t * queue)
3014 {
3015 	ips_scb_t *item;
3016 
3017 	METHOD_TRACE("ips_removeq_scb_head", 1);
3018 
3019 	item = queue->head;
3020 
3021 	if (!item) {
3022 		return (NULL);
3023 	}
3024 
3025 	queue->head = item->q_next;
3026 	item->q_next = NULL;
3027 
3028 	if (queue->tail == item)
3029 		queue->tail = NULL;
3030 
3031 	queue->count--;
3032 
3033 	return (item);
3034 }
3035 
3036 /****************************************************************************/
3037 /*                                                                          */
3038 /* Routine Name: ips_removeq_scb                                            */
3039 /*                                                                          */
3040 /* Routine Description:                                                     */
3041 /*                                                                          */
3042 /*   Remove an item from a queue                                            */
3043 /*                                                                          */
3044 /* ASSUMED to be called from within the HA lock                             */
3045 /*                                                                          */
3046 /****************************************************************************/
3047 static ips_scb_t *
3048 ips_removeq_scb(ips_scb_queue_t * queue, ips_scb_t * item)
3049 {
3050 	ips_scb_t *p;
3051 
3052 	METHOD_TRACE("ips_removeq_scb", 1);
3053 
3054 	if (!item)
3055 		return (NULL);
3056 
3057 	if (item == queue->head) {
3058 		return (ips_removeq_scb_head(queue));
3059 	}
3060 
3061 	p = queue->head;
3062 
3063 	while ((p) && (item != p->q_next))
3064 		p = p->q_next;
3065 
3066 	if (p) {
3067 		/* found a match */
3068 		p->q_next = item->q_next;
3069 
3070 		if (!item->q_next)
3071 			queue->tail = p;
3072 
3073 		item->q_next = NULL;
3074 		queue->count--;
3075 
3076 		return (item);
3077 	}
3078 
3079 	return (NULL);
3080 }
3081 
3082 /****************************************************************************/
3083 /*                                                                          */
3084 /* Routine Name: ips_putq_wait_tail                                         */
3085 /*                                                                          */
3086 /* Routine Description:                                                     */
3087 /*                                                                          */
3088 /*   Add an item to the tail of the queue                                   */
3089 /*                                                                          */
3090 /* ASSUMED to be called from within the HA lock                             */
3091 /*                                                                          */
3092 /****************************************************************************/
3093 static void
3094 ips_putq_wait_tail(ips_wait_queue_t * queue, Scsi_Cmnd * item)
3095 {
3096 	METHOD_TRACE("ips_putq_wait_tail", 1);
3097 
3098 	if (!item)
3099 		return;
3100 
3101 	item->host_scribble = NULL;
3102 
3103 	if (queue->tail)
3104 		queue->tail->host_scribble = (char *) item;
3105 
3106 	queue->tail = item;
3107 
3108 	if (!queue->head)
3109 		queue->head = item;
3110 
3111 	queue->count++;
3112 }
3113 
3114 /****************************************************************************/
3115 /*                                                                          */
3116 /* Routine Name: ips_removeq_wait_head                                      */
3117 /*                                                                          */
3118 /* Routine Description:                                                     */
3119 /*                                                                          */
3120 /*   Remove the head of the queue                                           */
3121 /*                                                                          */
3122 /* ASSUMED to be called from within the HA lock                             */
3123 /*                                                                          */
3124 /****************************************************************************/
3125 static Scsi_Cmnd *
3126 ips_removeq_wait_head(ips_wait_queue_t * queue)
3127 {
3128 	Scsi_Cmnd *item;
3129 
3130 	METHOD_TRACE("ips_removeq_wait_head", 1);
3131 
3132 	item = queue->head;
3133 
3134 	if (!item) {
3135 		return (NULL);
3136 	}
3137 
3138 	queue->head = (Scsi_Cmnd *) item->host_scribble;
3139 	item->host_scribble = NULL;
3140 
3141 	if (queue->tail == item)
3142 		queue->tail = NULL;
3143 
3144 	queue->count--;
3145 
3146 	return (item);
3147 }
3148 
3149 /****************************************************************************/
3150 /*                                                                          */
3151 /* Routine Name: ips_removeq_wait                                           */
3152 /*                                                                          */
3153 /* Routine Description:                                                     */
3154 /*                                                                          */
3155 /*   Remove an item from a queue                                            */
3156 /*                                                                          */
3157 /* ASSUMED to be called from within the HA lock                             */
3158 /*                                                                          */
3159 /****************************************************************************/
3160 static Scsi_Cmnd *
3161 ips_removeq_wait(ips_wait_queue_t * queue, Scsi_Cmnd * item)
3162 {
3163 	Scsi_Cmnd *p;
3164 
3165 	METHOD_TRACE("ips_removeq_wait", 1);
3166 
3167 	if (!item)
3168 		return (NULL);
3169 
3170 	if (item == queue->head) {
3171 		return (ips_removeq_wait_head(queue));
3172 	}
3173 
3174 	p = queue->head;
3175 
3176 	while ((p) && (item != (Scsi_Cmnd *) p->host_scribble))
3177 		p = (Scsi_Cmnd *) p->host_scribble;
3178 
3179 	if (p) {
3180 		/* found a match */
3181 		p->host_scribble = item->host_scribble;
3182 
3183 		if (!item->host_scribble)
3184 			queue->tail = p;
3185 
3186 		item->host_scribble = NULL;
3187 		queue->count--;
3188 
3189 		return (item);
3190 	}
3191 
3192 	return (NULL);
3193 }
3194 
3195 /****************************************************************************/
3196 /*                                                                          */
3197 /* Routine Name: ips_putq_copp_tail                                         */
3198 /*                                                                          */
3199 /* Routine Description:                                                     */
3200 /*                                                                          */
3201 /*   Add an item to the tail of the queue                                   */
3202 /*                                                                          */
3203 /* ASSUMED to be called from within the HA lock                             */
3204 /*                                                                          */
3205 /****************************************************************************/
3206 static void
3207 ips_putq_copp_tail(ips_copp_queue_t * queue, ips_copp_wait_item_t * item)
3208 {
3209 	METHOD_TRACE("ips_putq_copp_tail", 1);
3210 
3211 	if (!item)
3212 		return;
3213 
3214 	item->next = NULL;
3215 
3216 	if (queue->tail)
3217 		queue->tail->next = item;
3218 
3219 	queue->tail = item;
3220 
3221 	if (!queue->head)
3222 		queue->head = item;
3223 
3224 	queue->count++;
3225 }
3226 
3227 /****************************************************************************/
3228 /*                                                                          */
3229 /* Routine Name: ips_removeq_copp_head                                      */
3230 /*                                                                          */
3231 /* Routine Description:                                                     */
3232 /*                                                                          */
3233 /*   Remove the head of the queue                                           */
3234 /*                                                                          */
3235 /* ASSUMED to be called from within the HA lock                             */
3236 /*                                                                          */
3237 /****************************************************************************/
3238 static ips_copp_wait_item_t *
3239 ips_removeq_copp_head(ips_copp_queue_t * queue)
3240 {
3241 	ips_copp_wait_item_t *item;
3242 
3243 	METHOD_TRACE("ips_removeq_copp_head", 1);
3244 
3245 	item = queue->head;
3246 
3247 	if (!item) {
3248 		return (NULL);
3249 	}
3250 
3251 	queue->head = item->next;
3252 	item->next = NULL;
3253 
3254 	if (queue->tail == item)
3255 		queue->tail = NULL;
3256 
3257 	queue->count--;
3258 
3259 	return (item);
3260 }
3261 
3262 /****************************************************************************/
3263 /*                                                                          */
3264 /* Routine Name: ips_removeq_copp                                           */
3265 /*                                                                          */
3266 /* Routine Description:                                                     */
3267 /*                                                                          */
3268 /*   Remove an item from a queue                                            */
3269 /*                                                                          */
3270 /* ASSUMED to be called from within the HA lock                             */
3271 /*                                                                          */
3272 /****************************************************************************/
3273 static ips_copp_wait_item_t *
3274 ips_removeq_copp(ips_copp_queue_t * queue, ips_copp_wait_item_t * item)
3275 {
3276 	ips_copp_wait_item_t *p;
3277 
3278 	METHOD_TRACE("ips_removeq_copp", 1);
3279 
3280 	if (!item)
3281 		return (NULL);
3282 
3283 	if (item == queue->head) {
3284 		return (ips_removeq_copp_head(queue));
3285 	}
3286 
3287 	p = queue->head;
3288 
3289 	while ((p) && (item != p->next))
3290 		p = p->next;
3291 
3292 	if (p) {
3293 		/* found a match */
3294 		p->next = item->next;
3295 
3296 		if (!item->next)
3297 			queue->tail = p;
3298 
3299 		item->next = NULL;
3300 		queue->count--;
3301 
3302 		return (item);
3303 	}
3304 
3305 	return (NULL);
3306 }
3307 
3308 /****************************************************************************/
3309 /*                                                                          */
3310 /* Routine Name: ipsintr_blocking                                           */
3311 /*                                                                          */
3312 /* Routine Description:                                                     */
3313 /*                                                                          */
3314 /*   Finalize an interrupt for internal commands                            */
3315 /*                                                                          */
3316 /****************************************************************************/
3317 static void
3318 ipsintr_blocking(ips_ha_t * ha, ips_scb_t * scb)
3319 {
3320 	METHOD_TRACE("ipsintr_blocking", 2);
3321 
3322 	ips_freescb(ha, scb);
3323 	if ((ha->waitflag == TRUE) && (ha->cmd_in_progress == scb->cdb[0])) {
3324 		ha->waitflag = FALSE;
3325 
3326 		return;
3327 	}
3328 }
3329 
3330 /****************************************************************************/
3331 /*                                                                          */
3332 /* Routine Name: ipsintr_done                                               */
3333 /*                                                                          */
3334 /* Routine Description:                                                     */
3335 /*                                                                          */
3336 /*   Finalize an interrupt for non-internal commands                        */
3337 /*                                                                          */
3338 /****************************************************************************/
3339 static void
3340 ipsintr_done(ips_ha_t * ha, ips_scb_t * scb)
3341 {
3342 	METHOD_TRACE("ipsintr_done", 2);
3343 
3344 	if (!scb) {
3345 		IPS_PRINTK(KERN_WARNING, ha->pcidev,
3346 			   "Spurious interrupt; scb NULL.\n");
3347 
3348 		return;
3349 	}
3350 
3351 	if (scb->scsi_cmd == NULL) {
3352 		/* unexpected interrupt */
3353 		IPS_PRINTK(KERN_WARNING, ha->pcidev,
3354 			   "Spurious interrupt; scsi_cmd not set.\n");
3355 
3356 		return;
3357 	}
3358 
3359 	ips_done(ha, scb);
3360 }
3361 
3362 /****************************************************************************/
3363 /*                                                                          */
3364 /* Routine Name: ips_done                                                   */
3365 /*                                                                          */
3366 /* Routine Description:                                                     */
3367 /*                                                                          */
3368 /*   Do housekeeping on completed commands                                  */
3369 /*  ASSUMED to be called form within the request lock                       */
3370 /****************************************************************************/
3371 static void
3372 ips_done(ips_ha_t * ha, ips_scb_t * scb)
3373 {
3374 	int ret;
3375 
3376 	METHOD_TRACE("ips_done", 1);
3377 
3378 	if (!scb)
3379 		return;
3380 
3381 	if ((scb->scsi_cmd) && (ips_is_passthru(scb->scsi_cmd))) {
3382 		ips_cleanup_passthru(ha, scb);
3383 		ha->num_ioctl--;
3384 	} else {
3385 		/*
3386 		 * Check to see if this command had too much
3387 		 * data and had to be broke up.  If so, queue
3388 		 * the rest of the data and continue.
3389 		 */
3390 		if ((scb->breakup) || (scb->sg_break)) {
3391 			/* we had a data breakup */
3392 			scb->data_len = 0;
3393 
3394 			if (scb->sg_count) {
3395 				/* S/G request */
3396 				struct scatterlist *sg;
3397 				int ips_sg_index = 0;
3398 				int sg_dma_index;
3399 
3400 				sg = scb->scsi_cmd->request_buffer;
3401 
3402 				/* Spin forward to last dma chunk */
3403 				sg_dma_index = scb->breakup;
3404 
3405 				/* Take care of possible partial on last chunk */
3406 				ips_fill_scb_sg_single(ha,
3407 						       sg_dma_address(&sg
3408 								      [sg_dma_index]),
3409 						       scb, ips_sg_index++,
3410 						       sg_dma_len(&sg
3411 								  [sg_dma_index]));
3412 
3413 				for (; sg_dma_index < scb->sg_count;
3414 				     sg_dma_index++) {
3415 					if (ips_fill_scb_sg_single
3416 					    (ha,
3417 					     sg_dma_address(&sg[sg_dma_index]),
3418 					     scb, ips_sg_index++,
3419 					     sg_dma_len(&sg[sg_dma_index])) < 0)
3420 						break;
3421 
3422 				}
3423 
3424 			} else {
3425 				/* Non S/G Request */
3426 				(void) ips_fill_scb_sg_single(ha,
3427 							      scb->
3428 							      data_busaddr +
3429 							      (scb->sg_break *
3430 							       ha->max_xfer),
3431 							      scb, 0,
3432 							      scb->scsi_cmd->
3433 							      request_bufflen -
3434 							      (scb->sg_break *
3435 							       ha->max_xfer));
3436 			}
3437 
3438 			scb->dcdb.transfer_length = scb->data_len;
3439 			scb->dcdb.cmd_attribute |=
3440 			    ips_command_direction[scb->scsi_cmd->cmnd[0]];
3441 
3442 			if (!(scb->dcdb.cmd_attribute & 0x3))
3443 				scb->dcdb.transfer_length = 0;
3444 
3445 			if (scb->data_len >= IPS_MAX_XFER) {
3446 				scb->dcdb.cmd_attribute |= IPS_TRANSFER64K;
3447 				scb->dcdb.transfer_length = 0;
3448 			}
3449 
3450 			ret = ips_send_cmd(ha, scb);
3451 
3452 			switch (ret) {
3453 			case IPS_FAILURE:
3454 				if (scb->scsi_cmd) {
3455 					scb->scsi_cmd->result = DID_ERROR << 16;
3456 					scb->scsi_cmd->scsi_done(scb->scsi_cmd);
3457 				}
3458 
3459 				ips_freescb(ha, scb);
3460 				break;
3461 			case IPS_SUCCESS_IMM:
3462 				if (scb->scsi_cmd) {
3463 					scb->scsi_cmd->result = DID_ERROR << 16;
3464 					scb->scsi_cmd->scsi_done(scb->scsi_cmd);
3465 				}
3466 
3467 				ips_freescb(ha, scb);
3468 				break;
3469 			default:
3470 				break;
3471 			}	/* end case */
3472 
3473 			return;
3474 		}
3475 	}			/* end if passthru */
3476 
3477 	if (scb->bus) {
3478 		ha->dcdb_active[scb->bus - 1] &= ~(1 << scb->target_id);
3479 	}
3480 
3481 	scb->scsi_cmd->scsi_done(scb->scsi_cmd);
3482 
3483 	ips_freescb(ha, scb);
3484 }
3485 
3486 /****************************************************************************/
3487 /*                                                                          */
3488 /* Routine Name: ips_map_status                                             */
3489 /*                                                                          */
3490 /* Routine Description:                                                     */
3491 /*                                                                          */
3492 /*   Map Controller Error codes to Linux Error Codes                        */
3493 /*                                                                          */
3494 /****************************************************************************/
3495 static int
3496 ips_map_status(ips_ha_t * ha, ips_scb_t * scb, ips_stat_t * sp)
3497 {
3498 	int errcode;
3499 	int device_error;
3500 	uint32_t transfer_len;
3501 	IPS_DCDB_TABLE_TAPE *tapeDCDB;
3502 
3503 	METHOD_TRACE("ips_map_status", 1);
3504 
3505 	if (scb->bus) {
3506 		DEBUG_VAR(2,
3507 			  "(%s%d) Physical device error (%d %d %d): %x %x, Sense Key: %x, ASC: %x, ASCQ: %x",
3508 			  ips_name, ha->host_num,
3509 			  scb->scsi_cmd->device->channel,
3510 			  scb->scsi_cmd->device->id, scb->scsi_cmd->device->lun,
3511 			  scb->basic_status, scb->extended_status,
3512 			  scb->extended_status ==
3513 			  IPS_ERR_CKCOND ? scb->dcdb.sense_info[2] & 0xf : 0,
3514 			  scb->extended_status ==
3515 			  IPS_ERR_CKCOND ? scb->dcdb.sense_info[12] : 0,
3516 			  scb->extended_status ==
3517 			  IPS_ERR_CKCOND ? scb->dcdb.sense_info[13] : 0);
3518 	}
3519 
3520 	/* default driver error */
3521 	errcode = DID_ERROR;
3522 	device_error = 0;
3523 
3524 	switch (scb->basic_status & IPS_GSC_STATUS_MASK) {
3525 	case IPS_CMD_TIMEOUT:
3526 		errcode = DID_TIME_OUT;
3527 		break;
3528 
3529 	case IPS_INVAL_OPCO:
3530 	case IPS_INVAL_CMD_BLK:
3531 	case IPS_INVAL_PARM_BLK:
3532 	case IPS_LD_ERROR:
3533 	case IPS_CMD_CMPLT_WERROR:
3534 		break;
3535 
3536 	case IPS_PHYS_DRV_ERROR:
3537 		switch (scb->extended_status) {
3538 		case IPS_ERR_SEL_TO:
3539 			if (scb->bus)
3540 				errcode = DID_NO_CONNECT;
3541 
3542 			break;
3543 
3544 		case IPS_ERR_OU_RUN:
3545 			if ((scb->cmd.dcdb.op_code == IPS_CMD_EXTENDED_DCDB) ||
3546 			    (scb->cmd.dcdb.op_code ==
3547 			     IPS_CMD_EXTENDED_DCDB_SG)) {
3548 				tapeDCDB = (IPS_DCDB_TABLE_TAPE *) & scb->dcdb;
3549 				transfer_len = tapeDCDB->transfer_length;
3550 			} else {
3551 				transfer_len =
3552 				    (uint32_t) scb->dcdb.transfer_length;
3553 			}
3554 
3555 			if ((scb->bus) && (transfer_len < scb->data_len)) {
3556 				/* Underrun - set default to no error */
3557 				errcode = DID_OK;
3558 
3559 				/* Restrict access to physical DASD */
3560 				if ((scb->scsi_cmd->cmnd[0] == INQUIRY) &&
3561 				    ((((char *) scb->scsi_cmd->
3562 				       buffer)[0] & 0x1f) == TYPE_DISK)) {
3563 					/* underflow -- no error               */
3564 					/* restrict access to physical DASD    */
3565 					errcode = DID_TIME_OUT;
3566 					break;
3567 				}
3568 			} else
3569 				errcode = DID_ERROR;
3570 
3571 			break;
3572 
3573 		case IPS_ERR_RECOVERY:
3574 			/* don't fail recovered errors */
3575 			if (scb->bus)
3576 				errcode = DID_OK;
3577 
3578 			break;
3579 
3580 		case IPS_ERR_HOST_RESET:
3581 		case IPS_ERR_DEV_RESET:
3582 			errcode = DID_RESET;
3583 			break;
3584 
3585 		case IPS_ERR_CKCOND:
3586 			if (scb->bus) {
3587 				if ((scb->cmd.dcdb.op_code ==
3588 				     IPS_CMD_EXTENDED_DCDB)
3589 				    || (scb->cmd.dcdb.op_code ==
3590 					IPS_CMD_EXTENDED_DCDB_SG)) {
3591 					tapeDCDB =
3592 					    (IPS_DCDB_TABLE_TAPE *) & scb->dcdb;
3593 					memcpy(scb->scsi_cmd->sense_buffer,
3594 					       tapeDCDB->sense_info,
3595 					       sizeof (scb->scsi_cmd->
3596 						       sense_buffer));
3597 				} else {
3598 					memcpy(scb->scsi_cmd->sense_buffer,
3599 					       scb->dcdb.sense_info,
3600 					       sizeof (scb->scsi_cmd->
3601 						       sense_buffer));
3602 				}
3603 				device_error = 2;	/* check condition */
3604 			}
3605 
3606 			errcode = DID_OK;
3607 
3608 			break;
3609 
3610 		default:
3611 			errcode = DID_ERROR;
3612 			break;
3613 
3614 		}		/* end switch */
3615 	}			/* end switch */
3616 
3617 	scb->scsi_cmd->result = device_error | (errcode << 16);
3618 
3619 	return (1);
3620 }
3621 
3622 /****************************************************************************/
3623 /*                                                                          */
3624 /* Routine Name: ips_send_wait                                              */
3625 /*                                                                          */
3626 /* Routine Description:                                                     */
3627 /*                                                                          */
3628 /*   Send a command to the controller and wait for it to return             */
3629 /*                                                                          */
3630 /*   The FFDC Time Stamp use this function for the callback, but doesn't    */
3631 /*   actually need to wait.                                                 */
3632 /****************************************************************************/
3633 static int
3634 ips_send_wait(ips_ha_t * ha, ips_scb_t * scb, int timeout, int intr)
3635 {
3636 	int ret;
3637 
3638 	METHOD_TRACE("ips_send_wait", 1);
3639 
3640 	if (intr != IPS_FFDC) {	/* Won't be Waiting if this is a Time Stamp */
3641 		ha->waitflag = TRUE;
3642 		ha->cmd_in_progress = scb->cdb[0];
3643 	}
3644 	scb->callback = ipsintr_blocking;
3645 	ret = ips_send_cmd(ha, scb);
3646 
3647 	if ((ret == IPS_FAILURE) || (ret == IPS_SUCCESS_IMM))
3648 		return (ret);
3649 
3650 	if (intr != IPS_FFDC)	/* Don't Wait around if this is a Time Stamp */
3651 		ret = ips_wait(ha, timeout, intr);
3652 
3653 	return (ret);
3654 }
3655 
3656 /****************************************************************************/
3657 /*                                                                          */
3658 /* Routine Name: ips_scmd_buf_write                                         */
3659 /*                                                                          */
3660 /* Routine Description:                                                     */
3661 /*  Write data to Scsi_Cmnd request_buffer at proper offsets                */
3662 /****************************************************************************/
3663 static void
3664 ips_scmd_buf_write(Scsi_Cmnd * scmd, void *data, unsigned
3665 		   int count)
3666 {
3667 	if (scmd->use_sg) {
3668 		int i;
3669 		unsigned int min_cnt, xfer_cnt;
3670 		char *cdata = (char *) data;
3671 		unsigned char *buffer;
3672 		unsigned long flags;
3673 		struct scatterlist *sg = scmd->request_buffer;
3674 		for (i = 0, xfer_cnt = 0;
3675 		     (i < scmd->use_sg) && (xfer_cnt < count); i++) {
3676 			min_cnt = min(count - xfer_cnt, sg[i].length);
3677 
3678 			/* kmap_atomic() ensures addressability of the data buffer.*/
3679 			/* local_irq_save() protects the KM_IRQ0 address slot.     */
3680 			local_irq_save(flags);
3681 			buffer = kmap_atomic(sg[i].page, KM_IRQ0) + sg[i].offset;
3682 			memcpy(buffer, &cdata[xfer_cnt], min_cnt);
3683 			kunmap_atomic(buffer - sg[i].offset, KM_IRQ0);
3684 			local_irq_restore(flags);
3685 
3686 			xfer_cnt += min_cnt;
3687 		}
3688 
3689 	} else {
3690 		unsigned int min_cnt = min(count, scmd->request_bufflen);
3691 		memcpy(scmd->request_buffer, data, min_cnt);
3692 	}
3693 }
3694 
3695 /****************************************************************************/
3696 /*                                                                          */
3697 /* Routine Name: ips_scmd_buf_read                                          */
3698 /*                                                                          */
3699 /* Routine Description:                                                     */
3700 /*  Copy data from a Scsi_Cmnd to a new, linear buffer                      */
3701 /****************************************************************************/
3702 static void
3703 ips_scmd_buf_read(Scsi_Cmnd * scmd, void *data, unsigned
3704 		  int count)
3705 {
3706 	if (scmd->use_sg) {
3707 		int i;
3708 		unsigned int min_cnt, xfer_cnt;
3709 		char *cdata = (char *) data;
3710 		unsigned char *buffer;
3711 		unsigned long flags;
3712 		struct scatterlist *sg = scmd->request_buffer;
3713 		for (i = 0, xfer_cnt = 0;
3714 		     (i < scmd->use_sg) && (xfer_cnt < count); i++) {
3715 			min_cnt = min(count - xfer_cnt, sg[i].length);
3716 
3717 			/* kmap_atomic() ensures addressability of the data buffer.*/
3718 			/* local_irq_save() protects the KM_IRQ0 address slot.     */
3719 			local_irq_save(flags);
3720 			buffer = kmap_atomic(sg[i].page, KM_IRQ0) + sg[i].offset;
3721 			memcpy(&cdata[xfer_cnt], buffer, min_cnt);
3722 			kunmap_atomic(buffer - sg[i].offset, KM_IRQ0);
3723 			local_irq_restore(flags);
3724 
3725 			xfer_cnt += min_cnt;
3726 		}
3727 
3728 	} else {
3729 		unsigned int min_cnt = min(count, scmd->request_bufflen);
3730 		memcpy(data, scmd->request_buffer, min_cnt);
3731 	}
3732 }
3733 
3734 /****************************************************************************/
3735 /*                                                                          */
3736 /* Routine Name: ips_send_cmd                                               */
3737 /*                                                                          */
3738 /* Routine Description:                                                     */
3739 /*                                                                          */
3740 /*   Map SCSI commands to ServeRAID commands for logical drives             */
3741 /*                                                                          */
3742 /****************************************************************************/
3743 static int
3744 ips_send_cmd(ips_ha_t * ha, ips_scb_t * scb)
3745 {
3746 	int ret;
3747 	char *sp;
3748 	int device_error;
3749 	IPS_DCDB_TABLE_TAPE *tapeDCDB;
3750 	int TimeOut;
3751 
3752 	METHOD_TRACE("ips_send_cmd", 1);
3753 
3754 	ret = IPS_SUCCESS;
3755 
3756 	if (!scb->scsi_cmd) {
3757 		/* internal command */
3758 
3759 		if (scb->bus > 0) {
3760 			/* Controller commands can't be issued */
3761 			/* to real devices -- fail them        */
3762 			if ((ha->waitflag == TRUE) &&
3763 			    (ha->cmd_in_progress == scb->cdb[0])) {
3764 				ha->waitflag = FALSE;
3765 			}
3766 
3767 			return (1);
3768 		}
3769 	} else if ((scb->bus == 0) && (!ips_is_passthru(scb->scsi_cmd))) {
3770 		/* command to logical bus -- interpret */
3771 		ret = IPS_SUCCESS_IMM;
3772 
3773 		switch (scb->scsi_cmd->cmnd[0]) {
3774 		case ALLOW_MEDIUM_REMOVAL:
3775 		case REZERO_UNIT:
3776 		case ERASE:
3777 		case WRITE_FILEMARKS:
3778 		case SPACE:
3779 			scb->scsi_cmd->result = DID_ERROR << 16;
3780 			break;
3781 
3782 		case START_STOP:
3783 			scb->scsi_cmd->result = DID_OK << 16;
3784 
3785 		case TEST_UNIT_READY:
3786 		case INQUIRY:
3787 			if (scb->target_id == IPS_ADAPTER_ID) {
3788 				/*
3789 				 * Either we have a TUR
3790 				 * or we have a SCSI inquiry
3791 				 */
3792 				if (scb->scsi_cmd->cmnd[0] == TEST_UNIT_READY)
3793 					scb->scsi_cmd->result = DID_OK << 16;
3794 
3795 				if (scb->scsi_cmd->cmnd[0] == INQUIRY) {
3796 					IPS_SCSI_INQ_DATA inquiry;
3797 
3798 					memset(&inquiry, 0,
3799 					       sizeof (IPS_SCSI_INQ_DATA));
3800 
3801 					inquiry.DeviceType =
3802 					    IPS_SCSI_INQ_TYPE_PROCESSOR;
3803 					inquiry.DeviceTypeQualifier =
3804 					    IPS_SCSI_INQ_LU_CONNECTED;
3805 					inquiry.Version = IPS_SCSI_INQ_REV2;
3806 					inquiry.ResponseDataFormat =
3807 					    IPS_SCSI_INQ_RD_REV2;
3808 					inquiry.AdditionalLength = 31;
3809 					inquiry.Flags[0] =
3810 					    IPS_SCSI_INQ_Address16;
3811 					inquiry.Flags[1] =
3812 					    IPS_SCSI_INQ_WBus16 |
3813 					    IPS_SCSI_INQ_Sync;
3814 					strncpy(inquiry.VendorId, "IBM     ",
3815 						8);
3816 					strncpy(inquiry.ProductId,
3817 						"SERVERAID       ", 16);
3818 					strncpy(inquiry.ProductRevisionLevel,
3819 						"1.00", 4);
3820 
3821 					ips_scmd_buf_write(scb->scsi_cmd,
3822 							   &inquiry,
3823 							   sizeof (inquiry));
3824 
3825 					scb->scsi_cmd->result = DID_OK << 16;
3826 				}
3827 			} else {
3828 				scb->cmd.logical_info.op_code = IPS_CMD_GET_LD_INFO;
3829 				scb->cmd.logical_info.command_id = IPS_COMMAND_ID(ha, scb);
3830 				scb->cmd.logical_info.reserved = 0;
3831 				scb->cmd.logical_info.reserved2 = 0;
3832 				scb->data_len = sizeof (IPS_LD_INFO);
3833 				scb->data_busaddr = ha->logical_drive_info_dma_addr;
3834 				scb->flags = 0;
3835 				scb->cmd.logical_info.buffer_addr = scb->data_busaddr;
3836 				ret = IPS_SUCCESS;
3837 			}
3838 
3839 			break;
3840 
3841 		case REQUEST_SENSE:
3842 			ips_reqsen(ha, scb);
3843 			scb->scsi_cmd->result = DID_OK << 16;
3844 			break;
3845 
3846 		case READ_6:
3847 		case WRITE_6:
3848 			if (!scb->sg_len) {
3849 				scb->cmd.basic_io.op_code =
3850 				    (scb->scsi_cmd->cmnd[0] ==
3851 				     READ_6) ? IPS_CMD_READ : IPS_CMD_WRITE;
3852 				scb->cmd.basic_io.enhanced_sg = 0;
3853 				scb->cmd.basic_io.sg_addr =
3854 				    cpu_to_le32(scb->data_busaddr);
3855 			} else {
3856 				scb->cmd.basic_io.op_code =
3857 				    (scb->scsi_cmd->cmnd[0] ==
3858 				     READ_6) ? IPS_CMD_READ_SG :
3859 				    IPS_CMD_WRITE_SG;
3860 				scb->cmd.basic_io.enhanced_sg =
3861 				    IPS_USE_ENH_SGLIST(ha) ? 0xFF : 0;
3862 				scb->cmd.basic_io.sg_addr =
3863 				    cpu_to_le32(scb->sg_busaddr);
3864 			}
3865 
3866 			scb->cmd.basic_io.segment_4G = 0;
3867 			scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb);
3868 			scb->cmd.basic_io.log_drv = scb->target_id;
3869 			scb->cmd.basic_io.sg_count = scb->sg_len;
3870 
3871 			if (scb->cmd.basic_io.lba)
3872 				scb->cmd.basic_io.lba =
3873 				    cpu_to_le32(le32_to_cpu
3874 						(scb->cmd.basic_io.lba) +
3875 						le16_to_cpu(scb->cmd.basic_io.
3876 							    sector_count));
3877 			else
3878 				scb->cmd.basic_io.lba =
3879 				    (((scb->scsi_cmd->
3880 				       cmnd[1] & 0x1f) << 16) | (scb->scsi_cmd->
3881 								 cmnd[2] << 8) |
3882 				     (scb->scsi_cmd->cmnd[3]));
3883 
3884 			scb->cmd.basic_io.sector_count =
3885 			    cpu_to_le16(scb->data_len / IPS_BLKSIZE);
3886 
3887 			if (le16_to_cpu(scb->cmd.basic_io.sector_count) == 0)
3888 				scb->cmd.basic_io.sector_count =
3889 				    cpu_to_le16(256);
3890 
3891 			ret = IPS_SUCCESS;
3892 			break;
3893 
3894 		case READ_10:
3895 		case WRITE_10:
3896 			if (!scb->sg_len) {
3897 				scb->cmd.basic_io.op_code =
3898 				    (scb->scsi_cmd->cmnd[0] ==
3899 				     READ_10) ? IPS_CMD_READ : IPS_CMD_WRITE;
3900 				scb->cmd.basic_io.enhanced_sg = 0;
3901 				scb->cmd.basic_io.sg_addr =
3902 				    cpu_to_le32(scb->data_busaddr);
3903 			} else {
3904 				scb->cmd.basic_io.op_code =
3905 				    (scb->scsi_cmd->cmnd[0] ==
3906 				     READ_10) ? IPS_CMD_READ_SG :
3907 				    IPS_CMD_WRITE_SG;
3908 				scb->cmd.basic_io.enhanced_sg =
3909 				    IPS_USE_ENH_SGLIST(ha) ? 0xFF : 0;
3910 				scb->cmd.basic_io.sg_addr =
3911 				    cpu_to_le32(scb->sg_busaddr);
3912 			}
3913 
3914 			scb->cmd.basic_io.segment_4G = 0;
3915 			scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb);
3916 			scb->cmd.basic_io.log_drv = scb->target_id;
3917 			scb->cmd.basic_io.sg_count = scb->sg_len;
3918 
3919 			if (scb->cmd.basic_io.lba)
3920 				scb->cmd.basic_io.lba =
3921 				    cpu_to_le32(le32_to_cpu
3922 						(scb->cmd.basic_io.lba) +
3923 						le16_to_cpu(scb->cmd.basic_io.
3924 							    sector_count));
3925 			else
3926 				scb->cmd.basic_io.lba =
3927 				    ((scb->scsi_cmd->cmnd[2] << 24) | (scb->
3928 								       scsi_cmd->
3929 								       cmnd[3]
3930 								       << 16) |
3931 				     (scb->scsi_cmd->cmnd[4] << 8) | scb->
3932 				     scsi_cmd->cmnd[5]);
3933 
3934 			scb->cmd.basic_io.sector_count =
3935 			    cpu_to_le16(scb->data_len / IPS_BLKSIZE);
3936 
3937 			if (cpu_to_le16(scb->cmd.basic_io.sector_count) == 0) {
3938 				/*
3939 				 * This is a null condition
3940 				 * we don't have to do anything
3941 				 * so just return
3942 				 */
3943 				scb->scsi_cmd->result = DID_OK << 16;
3944 			} else
3945 				ret = IPS_SUCCESS;
3946 
3947 			break;
3948 
3949 		case RESERVE:
3950 		case RELEASE:
3951 			scb->scsi_cmd->result = DID_OK << 16;
3952 			break;
3953 
3954 		case MODE_SENSE:
3955 			scb->cmd.basic_io.op_code = IPS_CMD_ENQUIRY;
3956 			scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb);
3957 			scb->cmd.basic_io.segment_4G = 0;
3958 			scb->cmd.basic_io.enhanced_sg = 0;
3959 			scb->data_len = sizeof (*ha->enq);
3960 			scb->cmd.basic_io.sg_addr = ha->enq_busaddr;
3961 			ret = IPS_SUCCESS;
3962 			break;
3963 
3964 		case READ_CAPACITY:
3965 			scb->cmd.logical_info.op_code = IPS_CMD_GET_LD_INFO;
3966 			scb->cmd.logical_info.command_id = IPS_COMMAND_ID(ha, scb);
3967 			scb->cmd.logical_info.reserved = 0;
3968 			scb->cmd.logical_info.reserved2 = 0;
3969 			scb->cmd.logical_info.reserved3 = 0;
3970 			scb->data_len = sizeof (IPS_LD_INFO);
3971 			scb->data_busaddr = ha->logical_drive_info_dma_addr;
3972 			scb->flags = 0;
3973 			scb->cmd.logical_info.buffer_addr = scb->data_busaddr;
3974 			ret = IPS_SUCCESS;
3975 			break;
3976 
3977 		case SEND_DIAGNOSTIC:
3978 		case REASSIGN_BLOCKS:
3979 		case FORMAT_UNIT:
3980 		case SEEK_10:
3981 		case VERIFY:
3982 		case READ_DEFECT_DATA:
3983 		case READ_BUFFER:
3984 		case WRITE_BUFFER:
3985 			scb->scsi_cmd->result = DID_OK << 16;
3986 			break;
3987 
3988 		default:
3989 			/* Set the Return Info to appear like the Command was */
3990 			/* attempted, a Check Condition occurred, and Sense   */
3991 			/* Data indicating an Invalid CDB OpCode is returned. */
3992 			sp = (char *) scb->scsi_cmd->sense_buffer;
3993 			memset(sp, 0, sizeof (scb->scsi_cmd->sense_buffer));
3994 
3995 			sp[0] = 0x70;	/* Error Code               */
3996 			sp[2] = ILLEGAL_REQUEST;	/* Sense Key 5 Illegal Req. */
3997 			sp[7] = 0x0A;	/* Additional Sense Length  */
3998 			sp[12] = 0x20;	/* ASC = Invalid OpCode     */
3999 			sp[13] = 0x00;	/* ASCQ                     */
4000 
4001 			device_error = 2;	/* Indicate Check Condition */
4002 			scb->scsi_cmd->result = device_error | (DID_OK << 16);
4003 			break;
4004 		}		/* end switch */
4005 	}
4006 	/* end if */
4007 	if (ret == IPS_SUCCESS_IMM)
4008 		return (ret);
4009 
4010 	/* setup DCDB */
4011 	if (scb->bus > 0) {
4012 
4013 		/* If we already know the Device is Not there, no need to attempt a Command   */
4014 		/* This also protects an NT FailOver Controller from getting CDB's sent to it */
4015 		if (ha->conf->dev[scb->bus - 1][scb->target_id].ucState == 0) {
4016 			scb->scsi_cmd->result = DID_NO_CONNECT << 16;
4017 			return (IPS_SUCCESS_IMM);
4018 		}
4019 
4020 		ha->dcdb_active[scb->bus - 1] |= (1 << scb->target_id);
4021 		scb->cmd.dcdb.command_id = IPS_COMMAND_ID(ha, scb);
4022 		scb->cmd.dcdb.dcdb_address = cpu_to_le32(scb->scb_busaddr +
4023 							 (unsigned long) &scb->
4024 							 dcdb -
4025 							 (unsigned long) scb);
4026 		scb->cmd.dcdb.reserved = 0;
4027 		scb->cmd.dcdb.reserved2 = 0;
4028 		scb->cmd.dcdb.reserved3 = 0;
4029 		scb->cmd.dcdb.segment_4G = 0;
4030 		scb->cmd.dcdb.enhanced_sg = 0;
4031 
4032 		TimeOut = scb->scsi_cmd->timeout_per_command;
4033 
4034 		if (ha->subsys->param[4] & 0x00100000) {	/* If NEW Tape DCDB is Supported */
4035 			if (!scb->sg_len) {
4036 				scb->cmd.dcdb.op_code = IPS_CMD_EXTENDED_DCDB;
4037 			} else {
4038 				scb->cmd.dcdb.op_code =
4039 				    IPS_CMD_EXTENDED_DCDB_SG;
4040 				scb->cmd.dcdb.enhanced_sg =
4041 				    IPS_USE_ENH_SGLIST(ha) ? 0xFF : 0;
4042 			}
4043 
4044 			tapeDCDB = (IPS_DCDB_TABLE_TAPE *) & scb->dcdb;	/* Use Same Data Area as Old DCDB Struct */
4045 			tapeDCDB->device_address =
4046 			    ((scb->bus - 1) << 4) | scb->target_id;
4047 			tapeDCDB->cmd_attribute |= IPS_DISCONNECT_ALLOWED;
4048 			tapeDCDB->cmd_attribute &= ~IPS_TRANSFER64K;	/* Always Turn OFF 64K Size Flag */
4049 
4050 			if (TimeOut) {
4051 				if (TimeOut < (10 * HZ))
4052 					tapeDCDB->cmd_attribute |= IPS_TIMEOUT10;	/* TimeOut is 10 Seconds */
4053 				else if (TimeOut < (60 * HZ))
4054 					tapeDCDB->cmd_attribute |= IPS_TIMEOUT60;	/* TimeOut is 60 Seconds */
4055 				else if (TimeOut < (1200 * HZ))
4056 					tapeDCDB->cmd_attribute |= IPS_TIMEOUT20M;	/* TimeOut is 20 Minutes */
4057 			}
4058 
4059 			tapeDCDB->cdb_length = scb->scsi_cmd->cmd_len;
4060 			tapeDCDB->reserved_for_LUN = 0;
4061 			tapeDCDB->transfer_length = scb->data_len;
4062 			if (scb->cmd.dcdb.op_code == IPS_CMD_EXTENDED_DCDB_SG)
4063 				tapeDCDB->buffer_pointer =
4064 				    cpu_to_le32(scb->sg_busaddr);
4065 			else
4066 				tapeDCDB->buffer_pointer =
4067 				    cpu_to_le32(scb->data_busaddr);
4068 			tapeDCDB->sg_count = scb->sg_len;
4069 			tapeDCDB->sense_length = sizeof (tapeDCDB->sense_info);
4070 			tapeDCDB->scsi_status = 0;
4071 			tapeDCDB->reserved = 0;
4072 			memcpy(tapeDCDB->scsi_cdb, scb->scsi_cmd->cmnd,
4073 			       scb->scsi_cmd->cmd_len);
4074 		} else {
4075 			if (!scb->sg_len) {
4076 				scb->cmd.dcdb.op_code = IPS_CMD_DCDB;
4077 			} else {
4078 				scb->cmd.dcdb.op_code = IPS_CMD_DCDB_SG;
4079 				scb->cmd.dcdb.enhanced_sg =
4080 				    IPS_USE_ENH_SGLIST(ha) ? 0xFF : 0;
4081 			}
4082 
4083 			scb->dcdb.device_address =
4084 			    ((scb->bus - 1) << 4) | scb->target_id;
4085 			scb->dcdb.cmd_attribute |= IPS_DISCONNECT_ALLOWED;
4086 
4087 			if (TimeOut) {
4088 				if (TimeOut < (10 * HZ))
4089 					scb->dcdb.cmd_attribute |= IPS_TIMEOUT10;	/* TimeOut is 10 Seconds */
4090 				else if (TimeOut < (60 * HZ))
4091 					scb->dcdb.cmd_attribute |= IPS_TIMEOUT60;	/* TimeOut is 60 Seconds */
4092 				else if (TimeOut < (1200 * HZ))
4093 					scb->dcdb.cmd_attribute |= IPS_TIMEOUT20M;	/* TimeOut is 20 Minutes */
4094 			}
4095 
4096 			scb->dcdb.transfer_length = scb->data_len;
4097 			if (scb->dcdb.cmd_attribute & IPS_TRANSFER64K)
4098 				scb->dcdb.transfer_length = 0;
4099 			if (scb->cmd.dcdb.op_code == IPS_CMD_DCDB_SG)
4100 				scb->dcdb.buffer_pointer =
4101 				    cpu_to_le32(scb->sg_busaddr);
4102 			else
4103 				scb->dcdb.buffer_pointer =
4104 				    cpu_to_le32(scb->data_busaddr);
4105 			scb->dcdb.cdb_length = scb->scsi_cmd->cmd_len;
4106 			scb->dcdb.sense_length = sizeof (scb->dcdb.sense_info);
4107 			scb->dcdb.sg_count = scb->sg_len;
4108 			scb->dcdb.reserved = 0;
4109 			memcpy(scb->dcdb.scsi_cdb, scb->scsi_cmd->cmnd,
4110 			       scb->scsi_cmd->cmd_len);
4111 			scb->dcdb.scsi_status = 0;
4112 			scb->dcdb.reserved2[0] = 0;
4113 			scb->dcdb.reserved2[1] = 0;
4114 			scb->dcdb.reserved2[2] = 0;
4115 		}
4116 	}
4117 
4118 	return ((*ha->func.issue) (ha, scb));
4119 }
4120 
4121 /****************************************************************************/
4122 /*                                                                          */
4123 /* Routine Name: ips_chk_status                                             */
4124 /*                                                                          */
4125 /* Routine Description:                                                     */
4126 /*                                                                          */
4127 /*   Check the status of commands to logical drives                         */
4128 /*   Assumed to be called with the HA lock                                  */
4129 /****************************************************************************/
4130 static void
4131 ips_chkstatus(ips_ha_t * ha, IPS_STATUS * pstatus)
4132 {
4133 	ips_scb_t *scb;
4134 	ips_stat_t *sp;
4135 	uint8_t basic_status;
4136 	uint8_t ext_status;
4137 	int errcode;
4138 
4139 	METHOD_TRACE("ips_chkstatus", 1);
4140 
4141 	scb = &ha->scbs[pstatus->fields.command_id];
4142 	scb->basic_status = basic_status =
4143 	    pstatus->fields.basic_status & IPS_BASIC_STATUS_MASK;
4144 	scb->extended_status = ext_status = pstatus->fields.extended_status;
4145 
4146 	sp = &ha->sp;
4147 	sp->residue_len = 0;
4148 	sp->scb_addr = (void *) scb;
4149 
4150 	/* Remove the item from the active queue */
4151 	ips_removeq_scb(&ha->scb_activelist, scb);
4152 
4153 	if (!scb->scsi_cmd)
4154 		/* internal commands are handled in do_ipsintr */
4155 		return;
4156 
4157 	DEBUG_VAR(2, "(%s%d) ips_chkstatus: cmd 0x%X id %d (%d %d %d)",
4158 		  ips_name,
4159 		  ha->host_num,
4160 		  scb->cdb[0],
4161 		  scb->cmd.basic_io.command_id,
4162 		  scb->bus, scb->target_id, scb->lun);
4163 
4164 	if ((scb->scsi_cmd) && (ips_is_passthru(scb->scsi_cmd)))
4165 		/* passthru - just returns the raw result */
4166 		return;
4167 
4168 	errcode = DID_OK;
4169 
4170 	if (((basic_status & IPS_GSC_STATUS_MASK) == IPS_CMD_SUCCESS) ||
4171 	    ((basic_status & IPS_GSC_STATUS_MASK) == IPS_CMD_RECOVERED_ERROR)) {
4172 
4173 		if (scb->bus == 0) {
4174 			if ((basic_status & IPS_GSC_STATUS_MASK) ==
4175 			    IPS_CMD_RECOVERED_ERROR) {
4176 				DEBUG_VAR(1,
4177 					  "(%s%d) Recovered Logical Drive Error OpCode: %x, BSB: %x, ESB: %x",
4178 					  ips_name, ha->host_num,
4179 					  scb->cmd.basic_io.op_code,
4180 					  basic_status, ext_status);
4181 			}
4182 
4183 			switch (scb->scsi_cmd->cmnd[0]) {
4184 			case ALLOW_MEDIUM_REMOVAL:
4185 			case REZERO_UNIT:
4186 			case ERASE:
4187 			case WRITE_FILEMARKS:
4188 			case SPACE:
4189 				errcode = DID_ERROR;
4190 				break;
4191 
4192 			case START_STOP:
4193 				break;
4194 
4195 			case TEST_UNIT_READY:
4196 				if (!ips_online(ha, scb)) {
4197 					errcode = DID_TIME_OUT;
4198 				}
4199 				break;
4200 
4201 			case INQUIRY:
4202 				if (ips_online(ha, scb)) {
4203 					ips_inquiry(ha, scb);
4204 				} else {
4205 					errcode = DID_TIME_OUT;
4206 				}
4207 				break;
4208 
4209 			case REQUEST_SENSE:
4210 				ips_reqsen(ha, scb);
4211 				break;
4212 
4213 			case READ_6:
4214 			case WRITE_6:
4215 			case READ_10:
4216 			case WRITE_10:
4217 			case RESERVE:
4218 			case RELEASE:
4219 				break;
4220 
4221 			case MODE_SENSE:
4222 				if (!ips_online(ha, scb)
4223 				    || !ips_msense(ha, scb)) {
4224 					errcode = DID_ERROR;
4225 				}
4226 				break;
4227 
4228 			case READ_CAPACITY:
4229 				if (ips_online(ha, scb))
4230 					ips_rdcap(ha, scb);
4231 				else {
4232 					errcode = DID_TIME_OUT;
4233 				}
4234 				break;
4235 
4236 			case SEND_DIAGNOSTIC:
4237 			case REASSIGN_BLOCKS:
4238 				break;
4239 
4240 			case FORMAT_UNIT:
4241 				errcode = DID_ERROR;
4242 				break;
4243 
4244 			case SEEK_10:
4245 			case VERIFY:
4246 			case READ_DEFECT_DATA:
4247 			case READ_BUFFER:
4248 			case WRITE_BUFFER:
4249 				break;
4250 
4251 			default:
4252 				errcode = DID_ERROR;
4253 			}	/* end switch */
4254 
4255 			scb->scsi_cmd->result = errcode << 16;
4256 		} else {	/* bus == 0 */
4257 			/* restrict access to physical drives */
4258 			if ((scb->scsi_cmd->cmnd[0] == INQUIRY) &&
4259 			    ((((char *) scb->scsi_cmd->buffer)[0] & 0x1f) ==
4260 			     TYPE_DISK)) {
4261 
4262 				scb->scsi_cmd->result = DID_TIME_OUT << 16;
4263 			}
4264 		}		/* else */
4265 	} else {		/* recovered error / success */
4266 		if (scb->bus == 0) {
4267 			DEBUG_VAR(1,
4268 				  "(%s%d) Unrecovered Logical Drive Error OpCode: %x, BSB: %x, ESB: %x",
4269 				  ips_name, ha->host_num,
4270 				  scb->cmd.basic_io.op_code, basic_status,
4271 				  ext_status);
4272 		}
4273 
4274 		ips_map_status(ha, scb, sp);
4275 	}			/* else */
4276 }
4277 
4278 /****************************************************************************/
4279 /*                                                                          */
4280 /* Routine Name: ips_online                                                 */
4281 /*                                                                          */
4282 /* Routine Description:                                                     */
4283 /*                                                                          */
4284 /*   Determine if a logical drive is online                                 */
4285 /*                                                                          */
4286 /****************************************************************************/
4287 static int
4288 ips_online(ips_ha_t * ha, ips_scb_t * scb)
4289 {
4290 	METHOD_TRACE("ips_online", 1);
4291 
4292 	if (scb->target_id >= IPS_MAX_LD)
4293 		return (0);
4294 
4295 	if ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1) {
4296 		memset(ha->logical_drive_info, 0, sizeof (IPS_LD_INFO));
4297 		return (0);
4298 	}
4299 
4300 	if (ha->logical_drive_info->drive_info[scb->target_id].state !=
4301 	    IPS_LD_OFFLINE
4302 	    && ha->logical_drive_info->drive_info[scb->target_id].state !=
4303 	    IPS_LD_FREE
4304 	    && ha->logical_drive_info->drive_info[scb->target_id].state !=
4305 	    IPS_LD_CRS
4306 	    && ha->logical_drive_info->drive_info[scb->target_id].state !=
4307 	    IPS_LD_SYS)
4308 		return (1);
4309 	else
4310 		return (0);
4311 }
4312 
4313 /****************************************************************************/
4314 /*                                                                          */
4315 /* Routine Name: ips_inquiry                                                */
4316 /*                                                                          */
4317 /* Routine Description:                                                     */
4318 /*                                                                          */
4319 /*   Simulate an inquiry command to a logical drive                         */
4320 /*                                                                          */
4321 /****************************************************************************/
4322 static int
4323 ips_inquiry(ips_ha_t * ha, ips_scb_t * scb)
4324 {
4325 	IPS_SCSI_INQ_DATA inquiry;
4326 
4327 	METHOD_TRACE("ips_inquiry", 1);
4328 
4329 	memset(&inquiry, 0, sizeof (IPS_SCSI_INQ_DATA));
4330 
4331 	inquiry.DeviceType = IPS_SCSI_INQ_TYPE_DASD;
4332 	inquiry.DeviceTypeQualifier = IPS_SCSI_INQ_LU_CONNECTED;
4333 	inquiry.Version = IPS_SCSI_INQ_REV2;
4334 	inquiry.ResponseDataFormat = IPS_SCSI_INQ_RD_REV2;
4335 	inquiry.AdditionalLength = 31;
4336 	inquiry.Flags[0] = IPS_SCSI_INQ_Address16;
4337 	inquiry.Flags[1] =
4338 	    IPS_SCSI_INQ_WBus16 | IPS_SCSI_INQ_Sync | IPS_SCSI_INQ_CmdQue;
4339 	strncpy(inquiry.VendorId, "IBM     ", 8);
4340 	strncpy(inquiry.ProductId, "SERVERAID       ", 16);
4341 	strncpy(inquiry.ProductRevisionLevel, "1.00", 4);
4342 
4343 	ips_scmd_buf_write(scb->scsi_cmd, &inquiry, sizeof (inquiry));
4344 
4345 	return (1);
4346 }
4347 
4348 /****************************************************************************/
4349 /*                                                                          */
4350 /* Routine Name: ips_rdcap                                                  */
4351 /*                                                                          */
4352 /* Routine Description:                                                     */
4353 /*                                                                          */
4354 /*   Simulate a read capacity command to a logical drive                    */
4355 /*                                                                          */
4356 /****************************************************************************/
4357 static int
4358 ips_rdcap(ips_ha_t * ha, ips_scb_t * scb)
4359 {
4360 	IPS_SCSI_CAPACITY cap;
4361 
4362 	METHOD_TRACE("ips_rdcap", 1);
4363 
4364 	if (scb->scsi_cmd->bufflen < 8)
4365 		return (0);
4366 
4367 	cap.lba =
4368 	    cpu_to_be32(le32_to_cpu
4369 			(ha->logical_drive_info->
4370 			 drive_info[scb->target_id].sector_count) - 1);
4371 	cap.len = cpu_to_be32((uint32_t) IPS_BLKSIZE);
4372 
4373 	ips_scmd_buf_write(scb->scsi_cmd, &cap, sizeof (cap));
4374 
4375 	return (1);
4376 }
4377 
4378 /****************************************************************************/
4379 /*                                                                          */
4380 /* Routine Name: ips_msense                                                 */
4381 /*                                                                          */
4382 /* Routine Description:                                                     */
4383 /*                                                                          */
4384 /*   Simulate a mode sense command to a logical drive                       */
4385 /*                                                                          */
4386 /****************************************************************************/
4387 static int
4388 ips_msense(ips_ha_t * ha, ips_scb_t * scb)
4389 {
4390 	uint16_t heads;
4391 	uint16_t sectors;
4392 	uint32_t cylinders;
4393 	IPS_SCSI_MODE_PAGE_DATA mdata;
4394 
4395 	METHOD_TRACE("ips_msense", 1);
4396 
4397 	if (le32_to_cpu(ha->enq->ulDriveSize[scb->target_id]) > 0x400000 &&
4398 	    (ha->enq->ucMiscFlag & 0x8) == 0) {
4399 		heads = IPS_NORM_HEADS;
4400 		sectors = IPS_NORM_SECTORS;
4401 	} else {
4402 		heads = IPS_COMP_HEADS;
4403 		sectors = IPS_COMP_SECTORS;
4404 	}
4405 
4406 	cylinders =
4407 	    (le32_to_cpu(ha->enq->ulDriveSize[scb->target_id]) -
4408 	     1) / (heads * sectors);
4409 
4410 	memset(&mdata, 0, sizeof (IPS_SCSI_MODE_PAGE_DATA));
4411 
4412 	mdata.hdr.BlockDescLength = 8;
4413 
4414 	switch (scb->scsi_cmd->cmnd[2] & 0x3f) {
4415 	case 0x03:		/* page 3 */
4416 		mdata.pdata.pg3.PageCode = 3;
4417 		mdata.pdata.pg3.PageLength = sizeof (IPS_SCSI_MODE_PAGE3);
4418 		mdata.hdr.DataLength =
4419 		    3 + mdata.hdr.BlockDescLength + mdata.pdata.pg3.PageLength;
4420 		mdata.pdata.pg3.TracksPerZone = 0;
4421 		mdata.pdata.pg3.AltSectorsPerZone = 0;
4422 		mdata.pdata.pg3.AltTracksPerZone = 0;
4423 		mdata.pdata.pg3.AltTracksPerVolume = 0;
4424 		mdata.pdata.pg3.SectorsPerTrack = cpu_to_be16(sectors);
4425 		mdata.pdata.pg3.BytesPerSector = cpu_to_be16(IPS_BLKSIZE);
4426 		mdata.pdata.pg3.Interleave = cpu_to_be16(1);
4427 		mdata.pdata.pg3.TrackSkew = 0;
4428 		mdata.pdata.pg3.CylinderSkew = 0;
4429 		mdata.pdata.pg3.flags = IPS_SCSI_MP3_SoftSector;
4430 		break;
4431 
4432 	case 0x4:
4433 		mdata.pdata.pg4.PageCode = 4;
4434 		mdata.pdata.pg4.PageLength = sizeof (IPS_SCSI_MODE_PAGE4);
4435 		mdata.hdr.DataLength =
4436 		    3 + mdata.hdr.BlockDescLength + mdata.pdata.pg4.PageLength;
4437 		mdata.pdata.pg4.CylindersHigh =
4438 		    cpu_to_be16((cylinders >> 8) & 0xFFFF);
4439 		mdata.pdata.pg4.CylindersLow = (cylinders & 0xFF);
4440 		mdata.pdata.pg4.Heads = heads;
4441 		mdata.pdata.pg4.WritePrecompHigh = 0;
4442 		mdata.pdata.pg4.WritePrecompLow = 0;
4443 		mdata.pdata.pg4.ReducedWriteCurrentHigh = 0;
4444 		mdata.pdata.pg4.ReducedWriteCurrentLow = 0;
4445 		mdata.pdata.pg4.StepRate = cpu_to_be16(1);
4446 		mdata.pdata.pg4.LandingZoneHigh = 0;
4447 		mdata.pdata.pg4.LandingZoneLow = 0;
4448 		mdata.pdata.pg4.flags = 0;
4449 		mdata.pdata.pg4.RotationalOffset = 0;
4450 		mdata.pdata.pg4.MediumRotationRate = 0;
4451 		break;
4452 	case 0x8:
4453 		mdata.pdata.pg8.PageCode = 8;
4454 		mdata.pdata.pg8.PageLength = sizeof (IPS_SCSI_MODE_PAGE8);
4455 		mdata.hdr.DataLength =
4456 		    3 + mdata.hdr.BlockDescLength + mdata.pdata.pg8.PageLength;
4457 		/* everything else is left set to 0 */
4458 		break;
4459 
4460 	default:
4461 		return (0);
4462 	}			/* end switch */
4463 
4464 	ips_scmd_buf_write(scb->scsi_cmd, &mdata, sizeof (mdata));
4465 
4466 	return (1);
4467 }
4468 
4469 /****************************************************************************/
4470 /*                                                                          */
4471 /* Routine Name: ips_reqsen                                                 */
4472 /*                                                                          */
4473 /* Routine Description:                                                     */
4474 /*                                                                          */
4475 /*   Simulate a request sense command to a logical drive                    */
4476 /*                                                                          */
4477 /****************************************************************************/
4478 static int
4479 ips_reqsen(ips_ha_t * ha, ips_scb_t * scb)
4480 {
4481 	IPS_SCSI_REQSEN reqsen;
4482 
4483 	METHOD_TRACE("ips_reqsen", 1);
4484 
4485 	memset(&reqsen, 0, sizeof (IPS_SCSI_REQSEN));
4486 
4487 	reqsen.ResponseCode =
4488 	    IPS_SCSI_REQSEN_VALID | IPS_SCSI_REQSEN_CURRENT_ERR;
4489 	reqsen.AdditionalLength = 10;
4490 	reqsen.AdditionalSenseCode = IPS_SCSI_REQSEN_NO_SENSE;
4491 	reqsen.AdditionalSenseCodeQual = IPS_SCSI_REQSEN_NO_SENSE;
4492 
4493 	ips_scmd_buf_write(scb->scsi_cmd, &reqsen, sizeof (reqsen));
4494 
4495 	return (1);
4496 }
4497 
4498 /****************************************************************************/
4499 /*                                                                          */
4500 /* Routine Name: ips_free                                                   */
4501 /*                                                                          */
4502 /* Routine Description:                                                     */
4503 /*                                                                          */
4504 /*   Free any allocated space for this controller                           */
4505 /*                                                                          */
4506 /****************************************************************************/
4507 static void
4508 ips_free(ips_ha_t * ha)
4509 {
4510 
4511 	METHOD_TRACE("ips_free", 1);
4512 
4513 	if (ha) {
4514 		if (ha->enq) {
4515 			pci_free_consistent(ha->pcidev, sizeof(IPS_ENQ),
4516 					    ha->enq, ha->enq_busaddr);
4517 			ha->enq = NULL;
4518 		}
4519 
4520 		if (ha->conf) {
4521 			kfree(ha->conf);
4522 			ha->conf = NULL;
4523 		}
4524 
4525 		if (ha->adapt) {
4526 			pci_free_consistent(ha->pcidev,
4527 					    sizeof (IPS_ADAPTER) +
4528 					    sizeof (IPS_IO_CMD), ha->adapt,
4529 					    ha->adapt->hw_status_start);
4530 			ha->adapt = NULL;
4531 		}
4532 
4533 		if (ha->logical_drive_info) {
4534 			pci_free_consistent(ha->pcidev,
4535 					    sizeof (IPS_LD_INFO),
4536 					    ha->logical_drive_info,
4537 					    ha->logical_drive_info_dma_addr);
4538 			ha->logical_drive_info = NULL;
4539 		}
4540 
4541 		if (ha->nvram) {
4542 			kfree(ha->nvram);
4543 			ha->nvram = NULL;
4544 		}
4545 
4546 		if (ha->subsys) {
4547 			kfree(ha->subsys);
4548 			ha->subsys = NULL;
4549 		}
4550 
4551 		if (ha->ioctl_data) {
4552 			pci_free_consistent(ha->pcidev, ha->ioctl_len,
4553 					    ha->ioctl_data, ha->ioctl_busaddr);
4554 			ha->ioctl_data = NULL;
4555 			ha->ioctl_datasize = 0;
4556 			ha->ioctl_len = 0;
4557 		}
4558 		ips_deallocatescbs(ha, ha->max_cmds);
4559 
4560 		/* free memory mapped (if applicable) */
4561 		if (ha->mem_ptr) {
4562 			iounmap(ha->ioremap_ptr);
4563 			ha->ioremap_ptr = NULL;
4564 			ha->mem_ptr = NULL;
4565 		}
4566 
4567 		if (ha->mem_addr)
4568 			release_mem_region(ha->mem_addr, ha->mem_len);
4569 		ha->mem_addr = 0;
4570 
4571 	}
4572 }
4573 
4574 /****************************************************************************/
4575 /*                                                                          */
4576 /* Routine Name: ips_deallocatescbs                                         */
4577 /*                                                                          */
4578 /* Routine Description:                                                     */
4579 /*                                                                          */
4580 /*   Free the command blocks                                                */
4581 /*                                                                          */
4582 /****************************************************************************/
4583 static int
4584 ips_deallocatescbs(ips_ha_t * ha, int cmds)
4585 {
4586 	if (ha->scbs) {
4587 		pci_free_consistent(ha->pcidev,
4588 				    IPS_SGLIST_SIZE(ha) * IPS_MAX_SG * cmds,
4589 				    ha->scbs->sg_list.list,
4590 				    ha->scbs->sg_busaddr);
4591 		pci_free_consistent(ha->pcidev, sizeof (ips_scb_t) * cmds,
4592 				    ha->scbs, ha->scbs->scb_busaddr);
4593 		ha->scbs = NULL;
4594 	}			/* end if */
4595 	return 1;
4596 }
4597 
4598 /****************************************************************************/
4599 /*                                                                          */
4600 /* Routine Name: ips_allocatescbs                                           */
4601 /*                                                                          */
4602 /* Routine Description:                                                     */
4603 /*                                                                          */
4604 /*   Allocate the command blocks                                            */
4605 /*                                                                          */
4606 /****************************************************************************/
4607 static int
4608 ips_allocatescbs(ips_ha_t * ha)
4609 {
4610 	ips_scb_t *scb_p;
4611 	IPS_SG_LIST ips_sg;
4612 	int i;
4613 	dma_addr_t command_dma, sg_dma;
4614 
4615 	METHOD_TRACE("ips_allocatescbs", 1);
4616 
4617 	/* Allocate memory for the SCBs */
4618 	ha->scbs =
4619 	    pci_alloc_consistent(ha->pcidev, ha->max_cmds * sizeof (ips_scb_t),
4620 				 &command_dma);
4621 	if (ha->scbs == NULL)
4622 		return 0;
4623 	ips_sg.list =
4624 	    pci_alloc_consistent(ha->pcidev,
4625 				 IPS_SGLIST_SIZE(ha) * IPS_MAX_SG *
4626 				 ha->max_cmds, &sg_dma);
4627 	if (ips_sg.list == NULL) {
4628 		pci_free_consistent(ha->pcidev,
4629 				    ha->max_cmds * sizeof (ips_scb_t), ha->scbs,
4630 				    command_dma);
4631 		return 0;
4632 	}
4633 
4634 	memset(ha->scbs, 0, ha->max_cmds * sizeof (ips_scb_t));
4635 
4636 	for (i = 0; i < ha->max_cmds; i++) {
4637 		scb_p = &ha->scbs[i];
4638 		scb_p->scb_busaddr = command_dma + sizeof (ips_scb_t) * i;
4639 		/* set up S/G list */
4640 		if (IPS_USE_ENH_SGLIST(ha)) {
4641 			scb_p->sg_list.enh_list =
4642 			    ips_sg.enh_list + i * IPS_MAX_SG;
4643 			scb_p->sg_busaddr =
4644 			    sg_dma + IPS_SGLIST_SIZE(ha) * IPS_MAX_SG * i;
4645 		} else {
4646 			scb_p->sg_list.std_list =
4647 			    ips_sg.std_list + i * IPS_MAX_SG;
4648 			scb_p->sg_busaddr =
4649 			    sg_dma + IPS_SGLIST_SIZE(ha) * IPS_MAX_SG * i;
4650 		}
4651 
4652 		/* add to the free list */
4653 		if (i < ha->max_cmds - 1) {
4654 			scb_p->q_next = ha->scb_freelist;
4655 			ha->scb_freelist = scb_p;
4656 		}
4657 	}
4658 
4659 	/* success */
4660 	return (1);
4661 }
4662 
4663 /****************************************************************************/
4664 /*                                                                          */
4665 /* Routine Name: ips_init_scb                                               */
4666 /*                                                                          */
4667 /* Routine Description:                                                     */
4668 /*                                                                          */
4669 /*   Initialize a CCB to default values                                     */
4670 /*                                                                          */
4671 /****************************************************************************/
4672 static void
4673 ips_init_scb(ips_ha_t * ha, ips_scb_t * scb)
4674 {
4675 	IPS_SG_LIST sg_list;
4676 	uint32_t cmd_busaddr, sg_busaddr;
4677 	METHOD_TRACE("ips_init_scb", 1);
4678 
4679 	if (scb == NULL)
4680 		return;
4681 
4682 	sg_list.list = scb->sg_list.list;
4683 	cmd_busaddr = scb->scb_busaddr;
4684 	sg_busaddr = scb->sg_busaddr;
4685 	/* zero fill */
4686 	memset(scb, 0, sizeof (ips_scb_t));
4687 	memset(ha->dummy, 0, sizeof (IPS_IO_CMD));
4688 
4689 	/* Initialize dummy command bucket */
4690 	ha->dummy->op_code = 0xFF;
4691 	ha->dummy->ccsar = cpu_to_le32(ha->adapt->hw_status_start
4692 				       + sizeof (IPS_ADAPTER));
4693 	ha->dummy->command_id = IPS_MAX_CMDS;
4694 
4695 	/* set bus address of scb */
4696 	scb->scb_busaddr = cmd_busaddr;
4697 	scb->sg_busaddr = sg_busaddr;
4698 	scb->sg_list.list = sg_list.list;
4699 
4700 	/* Neptune Fix */
4701 	scb->cmd.basic_io.cccr = cpu_to_le32((uint32_t) IPS_BIT_ILE);
4702 	scb->cmd.basic_io.ccsar = cpu_to_le32(ha->adapt->hw_status_start
4703 					      + sizeof (IPS_ADAPTER));
4704 }
4705 
4706 /****************************************************************************/
4707 /*                                                                          */
4708 /* Routine Name: ips_get_scb                                                */
4709 /*                                                                          */
4710 /* Routine Description:                                                     */
4711 /*                                                                          */
4712 /*   Initialize a CCB to default values                                     */
4713 /*                                                                          */
4714 /* ASSUMED to be callled from within a lock                                 */
4715 /*                                                                          */
4716 /****************************************************************************/
4717 static ips_scb_t *
4718 ips_getscb(ips_ha_t * ha)
4719 {
4720 	ips_scb_t *scb;
4721 
4722 	METHOD_TRACE("ips_getscb", 1);
4723 
4724 	if ((scb = ha->scb_freelist) == NULL) {
4725 
4726 		return (NULL);
4727 	}
4728 
4729 	ha->scb_freelist = scb->q_next;
4730 	scb->flags = 0;
4731 	scb->q_next = NULL;
4732 
4733 	ips_init_scb(ha, scb);
4734 
4735 	return (scb);
4736 }
4737 
4738 /****************************************************************************/
4739 /*                                                                          */
4740 /* Routine Name: ips_free_scb                                               */
4741 /*                                                                          */
4742 /* Routine Description:                                                     */
4743 /*                                                                          */
4744 /*   Return an unused CCB back to the free list                             */
4745 /*                                                                          */
4746 /* ASSUMED to be called from within a lock                                  */
4747 /*                                                                          */
4748 /****************************************************************************/
4749 static void
4750 ips_freescb(ips_ha_t * ha, ips_scb_t * scb)
4751 {
4752 
4753 	METHOD_TRACE("ips_freescb", 1);
4754 	if (scb->flags & IPS_SCB_MAP_SG)
4755 		pci_unmap_sg(ha->pcidev, scb->scsi_cmd->request_buffer,
4756 			     scb->scsi_cmd->use_sg, IPS_DMA_DIR(scb));
4757 	else if (scb->flags & IPS_SCB_MAP_SINGLE)
4758 		pci_unmap_single(ha->pcidev, scb->data_busaddr, scb->data_len,
4759 				 IPS_DMA_DIR(scb));
4760 
4761 	/* check to make sure this is not our "special" scb */
4762 	if (IPS_COMMAND_ID(ha, scb) < (ha->max_cmds - 1)) {
4763 		scb->q_next = ha->scb_freelist;
4764 		ha->scb_freelist = scb;
4765 	}
4766 }
4767 
4768 /****************************************************************************/
4769 /*                                                                          */
4770 /* Routine Name: ips_isinit_copperhead                                      */
4771 /*                                                                          */
4772 /* Routine Description:                                                     */
4773 /*                                                                          */
4774 /*   Is controller initialized ?                                            */
4775 /*                                                                          */
4776 /****************************************************************************/
4777 static int
4778 ips_isinit_copperhead(ips_ha_t * ha)
4779 {
4780 	uint8_t scpr;
4781 	uint8_t isr;
4782 
4783 	METHOD_TRACE("ips_isinit_copperhead", 1);
4784 
4785 	isr = inb(ha->io_addr + IPS_REG_HISR);
4786 	scpr = inb(ha->io_addr + IPS_REG_SCPR);
4787 
4788 	if (((isr & IPS_BIT_EI) == 0) && ((scpr & IPS_BIT_EBM) == 0))
4789 		return (0);
4790 	else
4791 		return (1);
4792 }
4793 
4794 /****************************************************************************/
4795 /*                                                                          */
4796 /* Routine Name: ips_isinit_copperhead_memio                                */
4797 /*                                                                          */
4798 /* Routine Description:                                                     */
4799 /*                                                                          */
4800 /*   Is controller initialized ?                                            */
4801 /*                                                                          */
4802 /****************************************************************************/
4803 static int
4804 ips_isinit_copperhead_memio(ips_ha_t * ha)
4805 {
4806 	uint8_t isr = 0;
4807 	uint8_t scpr;
4808 
4809 	METHOD_TRACE("ips_is_init_copperhead_memio", 1);
4810 
4811 	isr = readb(ha->mem_ptr + IPS_REG_HISR);
4812 	scpr = readb(ha->mem_ptr + IPS_REG_SCPR);
4813 
4814 	if (((isr & IPS_BIT_EI) == 0) && ((scpr & IPS_BIT_EBM) == 0))
4815 		return (0);
4816 	else
4817 		return (1);
4818 }
4819 
4820 /****************************************************************************/
4821 /*                                                                          */
4822 /* Routine Name: ips_isinit_morpheus                                        */
4823 /*                                                                          */
4824 /* Routine Description:                                                     */
4825 /*                                                                          */
4826 /*   Is controller initialized ?                                            */
4827 /*                                                                          */
4828 /****************************************************************************/
4829 static int
4830 ips_isinit_morpheus(ips_ha_t * ha)
4831 {
4832 	uint32_t post;
4833 	uint32_t bits;
4834 
4835 	METHOD_TRACE("ips_is_init_morpheus", 1);
4836 
4837 	if (ips_isintr_morpheus(ha))
4838 	    ips_flush_and_reset(ha);
4839 
4840 	post = readl(ha->mem_ptr + IPS_REG_I960_MSG0);
4841 	bits = readl(ha->mem_ptr + IPS_REG_I2O_HIR);
4842 
4843 	if (post == 0)
4844 		return (0);
4845 	else if (bits & 0x3)
4846 		return (0);
4847 	else
4848 		return (1);
4849 }
4850 
4851 /****************************************************************************/
4852 /*                                                                          */
4853 /* Routine Name: ips_flush_and_reset                                        */
4854 /*                                                                          */
4855 /* Routine Description:                                                     */
4856 /*                                                                          */
4857 /*   Perform cleanup ( FLUSH and RESET ) when the adapter is in an unknown  */
4858 /*   state ( was trying to INIT and an interrupt was already pending ) ...  */
4859 /*                                                                          */
4860 /****************************************************************************/
4861 static void
4862 ips_flush_and_reset(ips_ha_t *ha)
4863 {
4864 	ips_scb_t *scb;
4865 	int  ret;
4866  	int  time;
4867 	int  done;
4868 	dma_addr_t command_dma;
4869 
4870 	/* Create a usuable SCB */
4871 	scb = pci_alloc_consistent(ha->pcidev, sizeof(ips_scb_t), &command_dma);
4872 	if (scb) {
4873 	    memset(scb, 0, sizeof(ips_scb_t));
4874 	    ips_init_scb(ha, scb);
4875 	    scb->scb_busaddr = command_dma;
4876 
4877 	    scb->timeout = ips_cmd_timeout;
4878 	    scb->cdb[0] = IPS_CMD_FLUSH;
4879 
4880 	    scb->cmd.flush_cache.op_code = IPS_CMD_FLUSH;
4881 	    scb->cmd.flush_cache.command_id = IPS_MAX_CMDS;   /* Use an ID that would otherwise not exist */
4882 	    scb->cmd.flush_cache.state = IPS_NORM_STATE;
4883 	    scb->cmd.flush_cache.reserved = 0;
4884 	    scb->cmd.flush_cache.reserved2 = 0;
4885 	    scb->cmd.flush_cache.reserved3 = 0;
4886 	    scb->cmd.flush_cache.reserved4 = 0;
4887 
4888 	    ret = ips_send_cmd(ha, scb);                      /* Send the Flush Command */
4889 
4890 	    if (ret == IPS_SUCCESS) {
4891 	        time = 60 * IPS_ONE_SEC;	              /* Max Wait time is 60 seconds */
4892 	        done = 0;
4893 
4894 	        while ((time > 0) && (!done)) {
4895 	           done = ips_poll_for_flush_complete(ha);
4896 	           /* This may look evil, but it's only done during extremely rare start-up conditions ! */
4897 	           udelay(1000);
4898 	           time--;
4899 	        }
4900         }
4901 	}
4902 
4903 	/* Now RESET and INIT the adapter */
4904 	(*ha->func.reset) (ha);
4905 
4906 	pci_free_consistent(ha->pcidev, sizeof(ips_scb_t), scb, command_dma);
4907 	return;
4908 }
4909 
4910 /****************************************************************************/
4911 /*                                                                          */
4912 /* Routine Name: ips_poll_for_flush_complete                                */
4913 /*                                                                          */
4914 /* Routine Description:                                                     */
4915 /*                                                                          */
4916 /*   Poll for the Flush Command issued by ips_flush_and_reset() to complete */
4917 /*   All other responses are just taken off the queue and ignored           */
4918 /*                                                                          */
4919 /****************************************************************************/
4920 static int
4921 ips_poll_for_flush_complete(ips_ha_t * ha)
4922 {
4923 	IPS_STATUS cstatus;
4924 
4925 	while (TRUE) {
4926 	    cstatus.value = (*ha->func.statupd) (ha);
4927 
4928 	    if (cstatus.value == 0xffffffff)      /* If No Interrupt to process */
4929 			break;
4930 
4931 	    /* Success is when we see the Flush Command ID */
4932 	    if (cstatus.fields.command_id == IPS_MAX_CMDS )
4933 	        return 1;
4934 	 }
4935 
4936 	return 0;
4937 }
4938 
4939 /****************************************************************************/
4940 /*                                                                          */
4941 /* Routine Name: ips_enable_int_copperhead                                  */
4942 /*                                                                          */
4943 /* Routine Description:                                                     */
4944 /*   Turn on interrupts                                                     */
4945 /*                                                                          */
4946 /****************************************************************************/
4947 static void
4948 ips_enable_int_copperhead(ips_ha_t * ha)
4949 {
4950 	METHOD_TRACE("ips_enable_int_copperhead", 1);
4951 
4952 	outb(ha->io_addr + IPS_REG_HISR, IPS_BIT_EI);
4953 	inb(ha->io_addr + IPS_REG_HISR);	/*Ensure PCI Posting Completes*/
4954 }
4955 
4956 /****************************************************************************/
4957 /*                                                                          */
4958 /* Routine Name: ips_enable_int_copperhead_memio                            */
4959 /*                                                                          */
4960 /* Routine Description:                                                     */
4961 /*   Turn on interrupts                                                     */
4962 /*                                                                          */
4963 /****************************************************************************/
4964 static void
4965 ips_enable_int_copperhead_memio(ips_ha_t * ha)
4966 {
4967 	METHOD_TRACE("ips_enable_int_copperhead_memio", 1);
4968 
4969 	writeb(IPS_BIT_EI, ha->mem_ptr + IPS_REG_HISR);
4970 	readb(ha->mem_ptr + IPS_REG_HISR);	/*Ensure PCI Posting Completes*/
4971 }
4972 
4973 /****************************************************************************/
4974 /*                                                                          */
4975 /* Routine Name: ips_enable_int_morpheus                                    */
4976 /*                                                                          */
4977 /* Routine Description:                                                     */
4978 /*   Turn on interrupts                                                     */
4979 /*                                                                          */
4980 /****************************************************************************/
4981 static void
4982 ips_enable_int_morpheus(ips_ha_t * ha)
4983 {
4984 	uint32_t Oimr;
4985 
4986 	METHOD_TRACE("ips_enable_int_morpheus", 1);
4987 
4988 	Oimr = readl(ha->mem_ptr + IPS_REG_I960_OIMR);
4989 	Oimr &= ~0x08;
4990 	writel(Oimr, ha->mem_ptr + IPS_REG_I960_OIMR);
4991 	readl(ha->mem_ptr + IPS_REG_I960_OIMR);	/*Ensure PCI Posting Completes*/
4992 }
4993 
4994 /****************************************************************************/
4995 /*                                                                          */
4996 /* Routine Name: ips_init_copperhead                                        */
4997 /*                                                                          */
4998 /* Routine Description:                                                     */
4999 /*                                                                          */
5000 /*   Initialize a copperhead controller                                     */
5001 /*                                                                          */
5002 /****************************************************************************/
5003 static int
5004 ips_init_copperhead(ips_ha_t * ha)
5005 {
5006 	uint8_t Isr;
5007 	uint8_t Cbsp;
5008 	uint8_t PostByte[IPS_MAX_POST_BYTES];
5009 	uint8_t ConfigByte[IPS_MAX_CONFIG_BYTES];
5010 	int i, j;
5011 
5012 	METHOD_TRACE("ips_init_copperhead", 1);
5013 
5014 	for (i = 0; i < IPS_MAX_POST_BYTES; i++) {
5015 		for (j = 0; j < 45; j++) {
5016 			Isr = inb(ha->io_addr + IPS_REG_HISR);
5017 			if (Isr & IPS_BIT_GHI)
5018 				break;
5019 
5020 			/* Delay for 1 Second */
5021 			MDELAY(IPS_ONE_SEC);
5022 		}
5023 
5024 		if (j >= 45)
5025 			/* error occurred */
5026 			return (0);
5027 
5028 		PostByte[i] = inb(ha->io_addr + IPS_REG_ISPR);
5029 		outb(Isr, ha->io_addr + IPS_REG_HISR);
5030 	}
5031 
5032 	if (PostByte[0] < IPS_GOOD_POST_STATUS) {
5033 		IPS_PRINTK(KERN_WARNING, ha->pcidev,
5034 			   "reset controller fails (post status %x %x).\n",
5035 			   PostByte[0], PostByte[1]);
5036 
5037 		return (0);
5038 	}
5039 
5040 	for (i = 0; i < IPS_MAX_CONFIG_BYTES; i++) {
5041 		for (j = 0; j < 240; j++) {
5042 			Isr = inb(ha->io_addr + IPS_REG_HISR);
5043 			if (Isr & IPS_BIT_GHI)
5044 				break;
5045 
5046 			/* Delay for 1 Second */
5047 			MDELAY(IPS_ONE_SEC);
5048 		}
5049 
5050 		if (j >= 240)
5051 			/* error occurred */
5052 			return (0);
5053 
5054 		ConfigByte[i] = inb(ha->io_addr + IPS_REG_ISPR);
5055 		outb(Isr, ha->io_addr + IPS_REG_HISR);
5056 	}
5057 
5058 	for (i = 0; i < 240; i++) {
5059 		Cbsp = inb(ha->io_addr + IPS_REG_CBSP);
5060 
5061 		if ((Cbsp & IPS_BIT_OP) == 0)
5062 			break;
5063 
5064 		/* Delay for 1 Second */
5065 		MDELAY(IPS_ONE_SEC);
5066 	}
5067 
5068 	if (i >= 240)
5069 		/* reset failed */
5070 		return (0);
5071 
5072 	/* setup CCCR */
5073 	outl(cpu_to_le32(0x1010), ha->io_addr + IPS_REG_CCCR);
5074 
5075 	/* Enable busmastering */
5076 	outb(IPS_BIT_EBM, ha->io_addr + IPS_REG_SCPR);
5077 
5078 	if (ha->revision_id == IPS_REVID_TROMBONE64)
5079 		/* fix for anaconda64 */
5080 		outl(0, ha->io_addr + IPS_REG_NDAE);
5081 
5082 	/* Enable interrupts */
5083 	outb(IPS_BIT_EI, ha->io_addr + IPS_REG_HISR);
5084 
5085 	return (1);
5086 }
5087 
5088 /****************************************************************************/
5089 /*                                                                          */
5090 /* Routine Name: ips_init_copperhead_memio                                  */
5091 /*                                                                          */
5092 /* Routine Description:                                                     */
5093 /*                                                                          */
5094 /*   Initialize a copperhead controller with memory mapped I/O              */
5095 /*                                                                          */
5096 /****************************************************************************/
5097 static int
5098 ips_init_copperhead_memio(ips_ha_t * ha)
5099 {
5100 	uint8_t Isr = 0;
5101 	uint8_t Cbsp;
5102 	uint8_t PostByte[IPS_MAX_POST_BYTES];
5103 	uint8_t ConfigByte[IPS_MAX_CONFIG_BYTES];
5104 	int i, j;
5105 
5106 	METHOD_TRACE("ips_init_copperhead_memio", 1);
5107 
5108 	for (i = 0; i < IPS_MAX_POST_BYTES; i++) {
5109 		for (j = 0; j < 45; j++) {
5110 			Isr = readb(ha->mem_ptr + IPS_REG_HISR);
5111 			if (Isr & IPS_BIT_GHI)
5112 				break;
5113 
5114 			/* Delay for 1 Second */
5115 			MDELAY(IPS_ONE_SEC);
5116 		}
5117 
5118 		if (j >= 45)
5119 			/* error occurred */
5120 			return (0);
5121 
5122 		PostByte[i] = readb(ha->mem_ptr + IPS_REG_ISPR);
5123 		writeb(Isr, ha->mem_ptr + IPS_REG_HISR);
5124 	}
5125 
5126 	if (PostByte[0] < IPS_GOOD_POST_STATUS) {
5127 		IPS_PRINTK(KERN_WARNING, ha->pcidev,
5128 			   "reset controller fails (post status %x %x).\n",
5129 			   PostByte[0], PostByte[1]);
5130 
5131 		return (0);
5132 	}
5133 
5134 	for (i = 0; i < IPS_MAX_CONFIG_BYTES; i++) {
5135 		for (j = 0; j < 240; j++) {
5136 			Isr = readb(ha->mem_ptr + IPS_REG_HISR);
5137 			if (Isr & IPS_BIT_GHI)
5138 				break;
5139 
5140 			/* Delay for 1 Second */
5141 			MDELAY(IPS_ONE_SEC);
5142 		}
5143 
5144 		if (j >= 240)
5145 			/* error occurred */
5146 			return (0);
5147 
5148 		ConfigByte[i] = readb(ha->mem_ptr + IPS_REG_ISPR);
5149 		writeb(Isr, ha->mem_ptr + IPS_REG_HISR);
5150 	}
5151 
5152 	for (i = 0; i < 240; i++) {
5153 		Cbsp = readb(ha->mem_ptr + IPS_REG_CBSP);
5154 
5155 		if ((Cbsp & IPS_BIT_OP) == 0)
5156 			break;
5157 
5158 		/* Delay for 1 Second */
5159 		MDELAY(IPS_ONE_SEC);
5160 	}
5161 
5162 	if (i >= 240)
5163 		/* error occurred */
5164 		return (0);
5165 
5166 	/* setup CCCR */
5167 	writel(0x1010, ha->mem_ptr + IPS_REG_CCCR);
5168 
5169 	/* Enable busmastering */
5170 	writeb(IPS_BIT_EBM, ha->mem_ptr + IPS_REG_SCPR);
5171 
5172 	if (ha->revision_id == IPS_REVID_TROMBONE64)
5173 		/* fix for anaconda64 */
5174 		writel(0, ha->mem_ptr + IPS_REG_NDAE);
5175 
5176 	/* Enable interrupts */
5177 	writeb(IPS_BIT_EI, ha->mem_ptr + IPS_REG_HISR);
5178 
5179 	/* if we get here then everything went OK */
5180 	return (1);
5181 }
5182 
5183 /****************************************************************************/
5184 /*                                                                          */
5185 /* Routine Name: ips_init_morpheus                                          */
5186 /*                                                                          */
5187 /* Routine Description:                                                     */
5188 /*                                                                          */
5189 /*   Initialize a morpheus controller                                       */
5190 /*                                                                          */
5191 /****************************************************************************/
5192 static int
5193 ips_init_morpheus(ips_ha_t * ha)
5194 {
5195 	uint32_t Post;
5196 	uint32_t Config;
5197 	uint32_t Isr;
5198 	uint32_t Oimr;
5199 	int i;
5200 
5201 	METHOD_TRACE("ips_init_morpheus", 1);
5202 
5203 	/* Wait up to 45 secs for Post */
5204 	for (i = 0; i < 45; i++) {
5205 		Isr = readl(ha->mem_ptr + IPS_REG_I2O_HIR);
5206 
5207 		if (Isr & IPS_BIT_I960_MSG0I)
5208 			break;
5209 
5210 		/* Delay for 1 Second */
5211 		MDELAY(IPS_ONE_SEC);
5212 	}
5213 
5214 	if (i >= 45) {
5215 		/* error occurred */
5216 		IPS_PRINTK(KERN_WARNING, ha->pcidev,
5217 			   "timeout waiting for post.\n");
5218 
5219 		return (0);
5220 	}
5221 
5222 	Post = readl(ha->mem_ptr + IPS_REG_I960_MSG0);
5223 
5224 	if (Post == 0x4F00) {	/* If Flashing the Battery PIC         */
5225 		IPS_PRINTK(KERN_WARNING, ha->pcidev,
5226 			   "Flashing Battery PIC, Please wait ...\n");
5227 
5228 		/* Clear the interrupt bit */
5229 		Isr = (uint32_t) IPS_BIT_I960_MSG0I;
5230 		writel(Isr, ha->mem_ptr + IPS_REG_I2O_HIR);
5231 
5232 		for (i = 0; i < 120; i++) {	/*    Wait Up to 2 Min. for Completion */
5233 			Post = readl(ha->mem_ptr + IPS_REG_I960_MSG0);
5234 			if (Post != 0x4F00)
5235 				break;
5236 			/* Delay for 1 Second */
5237 			MDELAY(IPS_ONE_SEC);
5238 		}
5239 
5240 		if (i >= 120) {
5241 			IPS_PRINTK(KERN_WARNING, ha->pcidev,
5242 				   "timeout waiting for Battery PIC Flash\n");
5243 			return (0);
5244 		}
5245 
5246 	}
5247 
5248 	/* Clear the interrupt bit */
5249 	Isr = (uint32_t) IPS_BIT_I960_MSG0I;
5250 	writel(Isr, ha->mem_ptr + IPS_REG_I2O_HIR);
5251 
5252 	if (Post < (IPS_GOOD_POST_STATUS << 8)) {
5253 		IPS_PRINTK(KERN_WARNING, ha->pcidev,
5254 			   "reset controller fails (post status %x).\n", Post);
5255 
5256 		return (0);
5257 	}
5258 
5259 	/* Wait up to 240 secs for config bytes */
5260 	for (i = 0; i < 240; i++) {
5261 		Isr = readl(ha->mem_ptr + IPS_REG_I2O_HIR);
5262 
5263 		if (Isr & IPS_BIT_I960_MSG1I)
5264 			break;
5265 
5266 		/* Delay for 1 Second */
5267 		MDELAY(IPS_ONE_SEC);
5268 	}
5269 
5270 	if (i >= 240) {
5271 		/* error occurred */
5272 		IPS_PRINTK(KERN_WARNING, ha->pcidev,
5273 			   "timeout waiting for config.\n");
5274 
5275 		return (0);
5276 	}
5277 
5278 	Config = readl(ha->mem_ptr + IPS_REG_I960_MSG1);
5279 
5280 	/* Clear interrupt bit */
5281 	Isr = (uint32_t) IPS_BIT_I960_MSG1I;
5282 	writel(Isr, ha->mem_ptr + IPS_REG_I2O_HIR);
5283 
5284 	/* Turn on the interrupts */
5285 	Oimr = readl(ha->mem_ptr + IPS_REG_I960_OIMR);
5286 	Oimr &= ~0x8;
5287 	writel(Oimr, ha->mem_ptr + IPS_REG_I960_OIMR);
5288 
5289 	/* if we get here then everything went OK */
5290 
5291 	/* Since we did a RESET, an EraseStripeLock may be needed */
5292 	if (Post == 0xEF10) {
5293 		if ((Config == 0x000F) || (Config == 0x0009))
5294 			ha->requires_esl = 1;
5295 	}
5296 
5297 	return (1);
5298 }
5299 
5300 /****************************************************************************/
5301 /*                                                                          */
5302 /* Routine Name: ips_reset_copperhead                                       */
5303 /*                                                                          */
5304 /* Routine Description:                                                     */
5305 /*                                                                          */
5306 /*   Reset the controller                                                   */
5307 /*                                                                          */
5308 /****************************************************************************/
5309 static int
5310 ips_reset_copperhead(ips_ha_t * ha)
5311 {
5312 	int reset_counter;
5313 
5314 	METHOD_TRACE("ips_reset_copperhead", 1);
5315 
5316 	DEBUG_VAR(1, "(%s%d) ips_reset_copperhead: io addr: %x, irq: %d",
5317 		  ips_name, ha->host_num, ha->io_addr, ha->irq);
5318 
5319 	reset_counter = 0;
5320 
5321 	while (reset_counter < 2) {
5322 		reset_counter++;
5323 
5324 		outb(IPS_BIT_RST, ha->io_addr + IPS_REG_SCPR);
5325 
5326 		/* Delay for 1 Second */
5327 		MDELAY(IPS_ONE_SEC);
5328 
5329 		outb(0, ha->io_addr + IPS_REG_SCPR);
5330 
5331 		/* Delay for 1 Second */
5332 		MDELAY(IPS_ONE_SEC);
5333 
5334 		if ((*ha->func.init) (ha))
5335 			break;
5336 		else if (reset_counter >= 2) {
5337 
5338 			return (0);
5339 		}
5340 	}
5341 
5342 	return (1);
5343 }
5344 
5345 /****************************************************************************/
5346 /*                                                                          */
5347 /* Routine Name: ips_reset_copperhead_memio                                 */
5348 /*                                                                          */
5349 /* Routine Description:                                                     */
5350 /*                                                                          */
5351 /*   Reset the controller                                                   */
5352 /*                                                                          */
5353 /****************************************************************************/
5354 static int
5355 ips_reset_copperhead_memio(ips_ha_t * ha)
5356 {
5357 	int reset_counter;
5358 
5359 	METHOD_TRACE("ips_reset_copperhead_memio", 1);
5360 
5361 	DEBUG_VAR(1, "(%s%d) ips_reset_copperhead_memio: mem addr: %x, irq: %d",
5362 		  ips_name, ha->host_num, ha->mem_addr, ha->irq);
5363 
5364 	reset_counter = 0;
5365 
5366 	while (reset_counter < 2) {
5367 		reset_counter++;
5368 
5369 		writeb(IPS_BIT_RST, ha->mem_ptr + IPS_REG_SCPR);
5370 
5371 		/* Delay for 1 Second */
5372 		MDELAY(IPS_ONE_SEC);
5373 
5374 		writeb(0, ha->mem_ptr + IPS_REG_SCPR);
5375 
5376 		/* Delay for 1 Second */
5377 		MDELAY(IPS_ONE_SEC);
5378 
5379 		if ((*ha->func.init) (ha))
5380 			break;
5381 		else if (reset_counter >= 2) {
5382 
5383 			return (0);
5384 		}
5385 	}
5386 
5387 	return (1);
5388 }
5389 
5390 /****************************************************************************/
5391 /*                                                                          */
5392 /* Routine Name: ips_reset_morpheus                                         */
5393 /*                                                                          */
5394 /* Routine Description:                                                     */
5395 /*                                                                          */
5396 /*   Reset the controller                                                   */
5397 /*                                                                          */
5398 /****************************************************************************/
5399 static int
5400 ips_reset_morpheus(ips_ha_t * ha)
5401 {
5402 	int reset_counter;
5403 	uint8_t junk;
5404 
5405 	METHOD_TRACE("ips_reset_morpheus", 1);
5406 
5407 	DEBUG_VAR(1, "(%s%d) ips_reset_morpheus: mem addr: %x, irq: %d",
5408 		  ips_name, ha->host_num, ha->mem_addr, ha->irq);
5409 
5410 	reset_counter = 0;
5411 
5412 	while (reset_counter < 2) {
5413 		reset_counter++;
5414 
5415 		writel(0x80000000, ha->mem_ptr + IPS_REG_I960_IDR);
5416 
5417 		/* Delay for 5 Seconds */
5418 		MDELAY(5 * IPS_ONE_SEC);
5419 
5420 		/* Do a PCI config read to wait for adapter */
5421 		pci_read_config_byte(ha->pcidev, 4, &junk);
5422 
5423 		if ((*ha->func.init) (ha))
5424 			break;
5425 		else if (reset_counter >= 2) {
5426 
5427 			return (0);
5428 		}
5429 	}
5430 
5431 	return (1);
5432 }
5433 
5434 /****************************************************************************/
5435 /*                                                                          */
5436 /* Routine Name: ips_statinit                                               */
5437 /*                                                                          */
5438 /* Routine Description:                                                     */
5439 /*                                                                          */
5440 /*   Initialize the status queues on the controller                         */
5441 /*                                                                          */
5442 /****************************************************************************/
5443 static void
5444 ips_statinit(ips_ha_t * ha)
5445 {
5446 	uint32_t phys_status_start;
5447 
5448 	METHOD_TRACE("ips_statinit", 1);
5449 
5450 	ha->adapt->p_status_start = ha->adapt->status;
5451 	ha->adapt->p_status_end = ha->adapt->status + IPS_MAX_CMDS;
5452 	ha->adapt->p_status_tail = ha->adapt->status;
5453 
5454 	phys_status_start = ha->adapt->hw_status_start;
5455 	outl(cpu_to_le32(phys_status_start), ha->io_addr + IPS_REG_SQSR);
5456 	outl(cpu_to_le32(phys_status_start + IPS_STATUS_Q_SIZE),
5457 	     ha->io_addr + IPS_REG_SQER);
5458 	outl(cpu_to_le32(phys_status_start + IPS_STATUS_SIZE),
5459 	     ha->io_addr + IPS_REG_SQHR);
5460 	outl(cpu_to_le32(phys_status_start), ha->io_addr + IPS_REG_SQTR);
5461 
5462 	ha->adapt->hw_status_tail = phys_status_start;
5463 }
5464 
5465 /****************************************************************************/
5466 /*                                                                          */
5467 /* Routine Name: ips_statinit_memio                                         */
5468 /*                                                                          */
5469 /* Routine Description:                                                     */
5470 /*                                                                          */
5471 /*   Initialize the status queues on the controller                         */
5472 /*                                                                          */
5473 /****************************************************************************/
5474 static void
5475 ips_statinit_memio(ips_ha_t * ha)
5476 {
5477 	uint32_t phys_status_start;
5478 
5479 	METHOD_TRACE("ips_statinit_memio", 1);
5480 
5481 	ha->adapt->p_status_start = ha->adapt->status;
5482 	ha->adapt->p_status_end = ha->adapt->status + IPS_MAX_CMDS;
5483 	ha->adapt->p_status_tail = ha->adapt->status;
5484 
5485 	phys_status_start = ha->adapt->hw_status_start;
5486 	writel(phys_status_start, ha->mem_ptr + IPS_REG_SQSR);
5487 	writel(phys_status_start + IPS_STATUS_Q_SIZE,
5488 	       ha->mem_ptr + IPS_REG_SQER);
5489 	writel(phys_status_start + IPS_STATUS_SIZE, ha->mem_ptr + IPS_REG_SQHR);
5490 	writel(phys_status_start, ha->mem_ptr + IPS_REG_SQTR);
5491 
5492 	ha->adapt->hw_status_tail = phys_status_start;
5493 }
5494 
5495 /****************************************************************************/
5496 /*                                                                          */
5497 /* Routine Name: ips_statupd_copperhead                                     */
5498 /*                                                                          */
5499 /* Routine Description:                                                     */
5500 /*                                                                          */
5501 /*   Remove an element from the status queue                                */
5502 /*                                                                          */
5503 /****************************************************************************/
5504 static uint32_t
5505 ips_statupd_copperhead(ips_ha_t * ha)
5506 {
5507 	METHOD_TRACE("ips_statupd_copperhead", 1);
5508 
5509 	if (ha->adapt->p_status_tail != ha->adapt->p_status_end) {
5510 		ha->adapt->p_status_tail++;
5511 		ha->adapt->hw_status_tail += sizeof (IPS_STATUS);
5512 	} else {
5513 		ha->adapt->p_status_tail = ha->adapt->p_status_start;
5514 		ha->adapt->hw_status_tail = ha->adapt->hw_status_start;
5515 	}
5516 
5517 	outl(cpu_to_le32(ha->adapt->hw_status_tail),
5518 	     ha->io_addr + IPS_REG_SQTR);
5519 
5520 	return (ha->adapt->p_status_tail->value);
5521 }
5522 
5523 /****************************************************************************/
5524 /*                                                                          */
5525 /* Routine Name: ips_statupd_copperhead_memio                               */
5526 /*                                                                          */
5527 /* Routine Description:                                                     */
5528 /*                                                                          */
5529 /*   Remove an element from the status queue                                */
5530 /*                                                                          */
5531 /****************************************************************************/
5532 static uint32_t
5533 ips_statupd_copperhead_memio(ips_ha_t * ha)
5534 {
5535 	METHOD_TRACE("ips_statupd_copperhead_memio", 1);
5536 
5537 	if (ha->adapt->p_status_tail != ha->adapt->p_status_end) {
5538 		ha->adapt->p_status_tail++;
5539 		ha->adapt->hw_status_tail += sizeof (IPS_STATUS);
5540 	} else {
5541 		ha->adapt->p_status_tail = ha->adapt->p_status_start;
5542 		ha->adapt->hw_status_tail = ha->adapt->hw_status_start;
5543 	}
5544 
5545 	writel(ha->adapt->hw_status_tail, ha->mem_ptr + IPS_REG_SQTR);
5546 
5547 	return (ha->adapt->p_status_tail->value);
5548 }
5549 
5550 /****************************************************************************/
5551 /*                                                                          */
5552 /* Routine Name: ips_statupd_morpheus                                       */
5553 /*                                                                          */
5554 /* Routine Description:                                                     */
5555 /*                                                                          */
5556 /*   Remove an element from the status queue                                */
5557 /*                                                                          */
5558 /****************************************************************************/
5559 static uint32_t
5560 ips_statupd_morpheus(ips_ha_t * ha)
5561 {
5562 	uint32_t val;
5563 
5564 	METHOD_TRACE("ips_statupd_morpheus", 1);
5565 
5566 	val = readl(ha->mem_ptr + IPS_REG_I2O_OUTMSGQ);
5567 
5568 	return (val);
5569 }
5570 
5571 /****************************************************************************/
5572 /*                                                                          */
5573 /* Routine Name: ips_issue_copperhead                                       */
5574 /*                                                                          */
5575 /* Routine Description:                                                     */
5576 /*                                                                          */
5577 /*   Send a command down to the controller                                  */
5578 /*                                                                          */
5579 /****************************************************************************/
5580 static int
5581 ips_issue_copperhead(ips_ha_t * ha, ips_scb_t * scb)
5582 {
5583 	uint32_t TimeOut;
5584 	uint32_t val;
5585 
5586 	METHOD_TRACE("ips_issue_copperhead", 1);
5587 
5588 	if (scb->scsi_cmd) {
5589 		DEBUG_VAR(2, "(%s%d) ips_issue: cmd 0x%X id %d (%d %d %d)",
5590 			  ips_name,
5591 			  ha->host_num,
5592 			  scb->cdb[0],
5593 			  scb->cmd.basic_io.command_id,
5594 			  scb->bus, scb->target_id, scb->lun);
5595 	} else {
5596 		DEBUG_VAR(2, KERN_NOTICE "(%s%d) ips_issue: logical cmd id %d",
5597 			  ips_name, ha->host_num, scb->cmd.basic_io.command_id);
5598 	}
5599 
5600 	TimeOut = 0;
5601 
5602 	while ((val =
5603 		le32_to_cpu(inl(ha->io_addr + IPS_REG_CCCR))) & IPS_BIT_SEM) {
5604 		udelay(1000);
5605 
5606 		if (++TimeOut >= IPS_SEM_TIMEOUT) {
5607 			if (!(val & IPS_BIT_START_STOP))
5608 				break;
5609 
5610 			IPS_PRINTK(KERN_WARNING, ha->pcidev,
5611 				   "ips_issue val [0x%x].\n", val);
5612 			IPS_PRINTK(KERN_WARNING, ha->pcidev,
5613 				   "ips_issue semaphore chk timeout.\n");
5614 
5615 			return (IPS_FAILURE);
5616 		}		/* end if */
5617 	}			/* end while */
5618 
5619 	outl(cpu_to_le32(scb->scb_busaddr), ha->io_addr + IPS_REG_CCSAR);
5620 	outw(cpu_to_le32(IPS_BIT_START_CMD), ha->io_addr + IPS_REG_CCCR);
5621 
5622 	return (IPS_SUCCESS);
5623 }
5624 
5625 /****************************************************************************/
5626 /*                                                                          */
5627 /* Routine Name: ips_issue_copperhead_memio                                 */
5628 /*                                                                          */
5629 /* Routine Description:                                                     */
5630 /*                                                                          */
5631 /*   Send a command down to the controller                                  */
5632 /*                                                                          */
5633 /****************************************************************************/
5634 static int
5635 ips_issue_copperhead_memio(ips_ha_t * ha, ips_scb_t * scb)
5636 {
5637 	uint32_t TimeOut;
5638 	uint32_t val;
5639 
5640 	METHOD_TRACE("ips_issue_copperhead_memio", 1);
5641 
5642 	if (scb->scsi_cmd) {
5643 		DEBUG_VAR(2, "(%s%d) ips_issue: cmd 0x%X id %d (%d %d %d)",
5644 			  ips_name,
5645 			  ha->host_num,
5646 			  scb->cdb[0],
5647 			  scb->cmd.basic_io.command_id,
5648 			  scb->bus, scb->target_id, scb->lun);
5649 	} else {
5650 		DEBUG_VAR(2, "(%s%d) ips_issue: logical cmd id %d",
5651 			  ips_name, ha->host_num, scb->cmd.basic_io.command_id);
5652 	}
5653 
5654 	TimeOut = 0;
5655 
5656 	while ((val = readl(ha->mem_ptr + IPS_REG_CCCR)) & IPS_BIT_SEM) {
5657 		udelay(1000);
5658 
5659 		if (++TimeOut >= IPS_SEM_TIMEOUT) {
5660 			if (!(val & IPS_BIT_START_STOP))
5661 				break;
5662 
5663 			IPS_PRINTK(KERN_WARNING, ha->pcidev,
5664 				   "ips_issue val [0x%x].\n", val);
5665 			IPS_PRINTK(KERN_WARNING, ha->pcidev,
5666 				   "ips_issue semaphore chk timeout.\n");
5667 
5668 			return (IPS_FAILURE);
5669 		}		/* end if */
5670 	}			/* end while */
5671 
5672 	writel(scb->scb_busaddr, ha->mem_ptr + IPS_REG_CCSAR);
5673 	writel(IPS_BIT_START_CMD, ha->mem_ptr + IPS_REG_CCCR);
5674 
5675 	return (IPS_SUCCESS);
5676 }
5677 
5678 /****************************************************************************/
5679 /*                                                                          */
5680 /* Routine Name: ips_issue_i2o                                              */
5681 /*                                                                          */
5682 /* Routine Description:                                                     */
5683 /*                                                                          */
5684 /*   Send a command down to the controller                                  */
5685 /*                                                                          */
5686 /****************************************************************************/
5687 static int
5688 ips_issue_i2o(ips_ha_t * ha, ips_scb_t * scb)
5689 {
5690 
5691 	METHOD_TRACE("ips_issue_i2o", 1);
5692 
5693 	if (scb->scsi_cmd) {
5694 		DEBUG_VAR(2, "(%s%d) ips_issue: cmd 0x%X id %d (%d %d %d)",
5695 			  ips_name,
5696 			  ha->host_num,
5697 			  scb->cdb[0],
5698 			  scb->cmd.basic_io.command_id,
5699 			  scb->bus, scb->target_id, scb->lun);
5700 	} else {
5701 		DEBUG_VAR(2, "(%s%d) ips_issue: logical cmd id %d",
5702 			  ips_name, ha->host_num, scb->cmd.basic_io.command_id);
5703 	}
5704 
5705 	outl(cpu_to_le32(scb->scb_busaddr), ha->io_addr + IPS_REG_I2O_INMSGQ);
5706 
5707 	return (IPS_SUCCESS);
5708 }
5709 
5710 /****************************************************************************/
5711 /*                                                                          */
5712 /* Routine Name: ips_issue_i2o_memio                                        */
5713 /*                                                                          */
5714 /* Routine Description:                                                     */
5715 /*                                                                          */
5716 /*   Send a command down to the controller                                  */
5717 /*                                                                          */
5718 /****************************************************************************/
5719 static int
5720 ips_issue_i2o_memio(ips_ha_t * ha, ips_scb_t * scb)
5721 {
5722 
5723 	METHOD_TRACE("ips_issue_i2o_memio", 1);
5724 
5725 	if (scb->scsi_cmd) {
5726 		DEBUG_VAR(2, "(%s%d) ips_issue: cmd 0x%X id %d (%d %d %d)",
5727 			  ips_name,
5728 			  ha->host_num,
5729 			  scb->cdb[0],
5730 			  scb->cmd.basic_io.command_id,
5731 			  scb->bus, scb->target_id, scb->lun);
5732 	} else {
5733 		DEBUG_VAR(2, "(%s%d) ips_issue: logical cmd id %d",
5734 			  ips_name, ha->host_num, scb->cmd.basic_io.command_id);
5735 	}
5736 
5737 	writel(scb->scb_busaddr, ha->mem_ptr + IPS_REG_I2O_INMSGQ);
5738 
5739 	return (IPS_SUCCESS);
5740 }
5741 
5742 /****************************************************************************/
5743 /*                                                                          */
5744 /* Routine Name: ips_isintr_copperhead                                      */
5745 /*                                                                          */
5746 /* Routine Description:                                                     */
5747 /*                                                                          */
5748 /*   Test to see if an interrupt is for us                                  */
5749 /*                                                                          */
5750 /****************************************************************************/
5751 static int
5752 ips_isintr_copperhead(ips_ha_t * ha)
5753 {
5754 	uint8_t Isr;
5755 
5756 	METHOD_TRACE("ips_isintr_copperhead", 2);
5757 
5758 	Isr = inb(ha->io_addr + IPS_REG_HISR);
5759 
5760 	if (Isr == 0xFF)
5761 		/* ?!?! Nothing really there */
5762 		return (0);
5763 
5764 	if (Isr & IPS_BIT_SCE)
5765 		return (1);
5766 	else if (Isr & (IPS_BIT_SQO | IPS_BIT_GHI)) {
5767 		/* status queue overflow or GHI */
5768 		/* just clear the interrupt */
5769 		outb(Isr, ha->io_addr + IPS_REG_HISR);
5770 	}
5771 
5772 	return (0);
5773 }
5774 
5775 /****************************************************************************/
5776 /*                                                                          */
5777 /* Routine Name: ips_isintr_copperhead_memio                                */
5778 /*                                                                          */
5779 /* Routine Description:                                                     */
5780 /*                                                                          */
5781 /*   Test to see if an interrupt is for us                                  */
5782 /*                                                                          */
5783 /****************************************************************************/
5784 static int
5785 ips_isintr_copperhead_memio(ips_ha_t * ha)
5786 {
5787 	uint8_t Isr;
5788 
5789 	METHOD_TRACE("ips_isintr_memio", 2);
5790 
5791 	Isr = readb(ha->mem_ptr + IPS_REG_HISR);
5792 
5793 	if (Isr == 0xFF)
5794 		/* ?!?! Nothing really there */
5795 		return (0);
5796 
5797 	if (Isr & IPS_BIT_SCE)
5798 		return (1);
5799 	else if (Isr & (IPS_BIT_SQO | IPS_BIT_GHI)) {
5800 		/* status queue overflow or GHI */
5801 		/* just clear the interrupt */
5802 		writeb(Isr, ha->mem_ptr + IPS_REG_HISR);
5803 	}
5804 
5805 	return (0);
5806 }
5807 
5808 /****************************************************************************/
5809 /*                                                                          */
5810 /* Routine Name: ips_isintr_morpheus                                        */
5811 /*                                                                          */
5812 /* Routine Description:                                                     */
5813 /*                                                                          */
5814 /*   Test to see if an interrupt is for us                                  */
5815 /*                                                                          */
5816 /****************************************************************************/
5817 static int
5818 ips_isintr_morpheus(ips_ha_t * ha)
5819 {
5820 	uint32_t Isr;
5821 
5822 	METHOD_TRACE("ips_isintr_morpheus", 2);
5823 
5824 	Isr = readl(ha->mem_ptr + IPS_REG_I2O_HIR);
5825 
5826 	if (Isr & IPS_BIT_I2O_OPQI)
5827 		return (1);
5828 	else
5829 		return (0);
5830 }
5831 
5832 /****************************************************************************/
5833 /*                                                                          */
5834 /* Routine Name: ips_wait                                                   */
5835 /*                                                                          */
5836 /* Routine Description:                                                     */
5837 /*                                                                          */
5838 /*   Wait for a command to complete                                         */
5839 /*                                                                          */
5840 /****************************************************************************/
5841 static int
5842 ips_wait(ips_ha_t * ha, int time, int intr)
5843 {
5844 	int ret;
5845 	int done;
5846 
5847 	METHOD_TRACE("ips_wait", 1);
5848 
5849 	ret = IPS_FAILURE;
5850 	done = FALSE;
5851 
5852 	time *= IPS_ONE_SEC;	/* convert seconds */
5853 
5854 	while ((time > 0) && (!done)) {
5855 		if (intr == IPS_INTR_ON) {
5856 			if (ha->waitflag == FALSE) {
5857 				ret = IPS_SUCCESS;
5858 				done = TRUE;
5859 				break;
5860 			}
5861 		} else if (intr == IPS_INTR_IORL) {
5862 			if (ha->waitflag == FALSE) {
5863 				/*
5864 				 * controller generated an interrupt to
5865 				 * acknowledge completion of the command
5866 				 * and ips_intr() has serviced the interrupt.
5867 				 */
5868 				ret = IPS_SUCCESS;
5869 				done = TRUE;
5870 				break;
5871 			}
5872 
5873 			/*
5874 			 * NOTE: we already have the io_request_lock so
5875 			 * even if we get an interrupt it won't get serviced
5876 			 * until after we finish.
5877 			 */
5878 
5879 			(*ha->func.intr) (ha);
5880 		}
5881 
5882 		/* This looks like a very evil loop, but it only does this during start-up */
5883 		udelay(1000);
5884 		time--;
5885 	}
5886 
5887 	return (ret);
5888 }
5889 
5890 /****************************************************************************/
5891 /*                                                                          */
5892 /* Routine Name: ips_write_driver_status                                    */
5893 /*                                                                          */
5894 /* Routine Description:                                                     */
5895 /*                                                                          */
5896 /*   Write OS/Driver version to Page 5 of the nvram on the controller       */
5897 /*                                                                          */
5898 /****************************************************************************/
5899 static int
5900 ips_write_driver_status(ips_ha_t * ha, int intr)
5901 {
5902 	METHOD_TRACE("ips_write_driver_status", 1);
5903 
5904 	if (!ips_readwrite_page5(ha, FALSE, intr)) {
5905 		IPS_PRINTK(KERN_WARNING, ha->pcidev,
5906 			   "unable to read NVRAM page 5.\n");
5907 
5908 		return (0);
5909 	}
5910 
5911 	/* check to make sure the page has a valid */
5912 	/* signature */
5913 	if (le32_to_cpu(ha->nvram->signature) != IPS_NVRAM_P5_SIG) {
5914 		DEBUG_VAR(1,
5915 			  "(%s%d) NVRAM page 5 has an invalid signature: %X.",
5916 			  ips_name, ha->host_num, ha->nvram->signature);
5917 		ha->nvram->signature = IPS_NVRAM_P5_SIG;
5918 	}
5919 
5920 	DEBUG_VAR(2,
5921 		  "(%s%d) Ad Type: %d, Ad Slot: %d, BIOS: %c%c%c%c %c%c%c%c.",
5922 		  ips_name, ha->host_num, le16_to_cpu(ha->nvram->adapter_type),
5923 		  ha->nvram->adapter_slot, ha->nvram->bios_high[0],
5924 		  ha->nvram->bios_high[1], ha->nvram->bios_high[2],
5925 		  ha->nvram->bios_high[3], ha->nvram->bios_low[0],
5926 		  ha->nvram->bios_low[1], ha->nvram->bios_low[2],
5927 		  ha->nvram->bios_low[3]);
5928 
5929 	ips_get_bios_version(ha, intr);
5930 
5931 	/* change values (as needed) */
5932 	ha->nvram->operating_system = IPS_OS_LINUX;
5933 	ha->nvram->adapter_type = ha->ad_type;
5934 	strncpy((char *) ha->nvram->driver_high, IPS_VERSION_HIGH, 4);
5935 	strncpy((char *) ha->nvram->driver_low, IPS_VERSION_LOW, 4);
5936 	strncpy((char *) ha->nvram->bios_high, ha->bios_version, 4);
5937 	strncpy((char *) ha->nvram->bios_low, ha->bios_version + 4, 4);
5938 
5939 	ips_version_check(ha, intr);	/* Check BIOS/FW/Driver Versions */
5940 
5941 	/* now update the page */
5942 	if (!ips_readwrite_page5(ha, TRUE, intr)) {
5943 		IPS_PRINTK(KERN_WARNING, ha->pcidev,
5944 			   "unable to write NVRAM page 5.\n");
5945 
5946 		return (0);
5947 	}
5948 
5949 	/* IF NVRAM Page 5 is OK, Use it for Slot Number Info Because Linux Doesn't Do Slots */
5950 	ha->slot_num = ha->nvram->adapter_slot;
5951 
5952 	return (1);
5953 }
5954 
5955 /****************************************************************************/
5956 /*                                                                          */
5957 /* Routine Name: ips_read_adapter_status                                    */
5958 /*                                                                          */
5959 /* Routine Description:                                                     */
5960 /*                                                                          */
5961 /*   Do an Inquiry command to the adapter                                   */
5962 /*                                                                          */
5963 /****************************************************************************/
5964 static int
5965 ips_read_adapter_status(ips_ha_t * ha, int intr)
5966 {
5967 	ips_scb_t *scb;
5968 	int ret;
5969 
5970 	METHOD_TRACE("ips_read_adapter_status", 1);
5971 
5972 	scb = &ha->scbs[ha->max_cmds - 1];
5973 
5974 	ips_init_scb(ha, scb);
5975 
5976 	scb->timeout = ips_cmd_timeout;
5977 	scb->cdb[0] = IPS_CMD_ENQUIRY;
5978 
5979 	scb->cmd.basic_io.op_code = IPS_CMD_ENQUIRY;
5980 	scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb);
5981 	scb->cmd.basic_io.sg_count = 0;
5982 	scb->cmd.basic_io.lba = 0;
5983 	scb->cmd.basic_io.sector_count = 0;
5984 	scb->cmd.basic_io.log_drv = 0;
5985 	scb->data_len = sizeof (*ha->enq);
5986 	scb->cmd.basic_io.sg_addr = ha->enq_busaddr;
5987 
5988 	/* send command */
5989 	if (((ret =
5990 	      ips_send_wait(ha, scb, ips_cmd_timeout, intr)) == IPS_FAILURE)
5991 	    || (ret == IPS_SUCCESS_IMM)
5992 	    || ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1))
5993 		return (0);
5994 
5995 	return (1);
5996 }
5997 
5998 /****************************************************************************/
5999 /*                                                                          */
6000 /* Routine Name: ips_read_subsystem_parameters                              */
6001 /*                                                                          */
6002 /* Routine Description:                                                     */
6003 /*                                                                          */
6004 /*   Read subsystem parameters from the adapter                             */
6005 /*                                                                          */
6006 /****************************************************************************/
6007 static int
6008 ips_read_subsystem_parameters(ips_ha_t * ha, int intr)
6009 {
6010 	ips_scb_t *scb;
6011 	int ret;
6012 
6013 	METHOD_TRACE("ips_read_subsystem_parameters", 1);
6014 
6015 	scb = &ha->scbs[ha->max_cmds - 1];
6016 
6017 	ips_init_scb(ha, scb);
6018 
6019 	scb->timeout = ips_cmd_timeout;
6020 	scb->cdb[0] = IPS_CMD_GET_SUBSYS;
6021 
6022 	scb->cmd.basic_io.op_code = IPS_CMD_GET_SUBSYS;
6023 	scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb);
6024 	scb->cmd.basic_io.sg_count = 0;
6025 	scb->cmd.basic_io.lba = 0;
6026 	scb->cmd.basic_io.sector_count = 0;
6027 	scb->cmd.basic_io.log_drv = 0;
6028 	scb->data_len = sizeof (*ha->subsys);
6029 	scb->cmd.basic_io.sg_addr = ha->ioctl_busaddr;
6030 
6031 	/* send command */
6032 	if (((ret =
6033 	      ips_send_wait(ha, scb, ips_cmd_timeout, intr)) == IPS_FAILURE)
6034 	    || (ret == IPS_SUCCESS_IMM)
6035 	    || ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1))
6036 		return (0);
6037 
6038 	memcpy(ha->subsys, ha->ioctl_data, sizeof(*ha->subsys));
6039 	return (1);
6040 }
6041 
6042 /****************************************************************************/
6043 /*                                                                          */
6044 /* Routine Name: ips_read_config                                            */
6045 /*                                                                          */
6046 /* Routine Description:                                                     */
6047 /*                                                                          */
6048 /*   Read the configuration on the adapter                                  */
6049 /*                                                                          */
6050 /****************************************************************************/
6051 static int
6052 ips_read_config(ips_ha_t * ha, int intr)
6053 {
6054 	ips_scb_t *scb;
6055 	int i;
6056 	int ret;
6057 
6058 	METHOD_TRACE("ips_read_config", 1);
6059 
6060 	/* set defaults for initiator IDs */
6061 	for (i = 0; i < 4; i++)
6062 		ha->conf->init_id[i] = 7;
6063 
6064 	scb = &ha->scbs[ha->max_cmds - 1];
6065 
6066 	ips_init_scb(ha, scb);
6067 
6068 	scb->timeout = ips_cmd_timeout;
6069 	scb->cdb[0] = IPS_CMD_READ_CONF;
6070 
6071 	scb->cmd.basic_io.op_code = IPS_CMD_READ_CONF;
6072 	scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb);
6073 	scb->data_len = sizeof (*ha->conf);
6074 	scb->cmd.basic_io.sg_addr = ha->ioctl_busaddr;
6075 
6076 	/* send command */
6077 	if (((ret =
6078 	      ips_send_wait(ha, scb, ips_cmd_timeout, intr)) == IPS_FAILURE)
6079 	    || (ret == IPS_SUCCESS_IMM)
6080 	    || ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1)) {
6081 
6082 		memset(ha->conf, 0, sizeof (IPS_CONF));
6083 
6084 		/* reset initiator IDs */
6085 		for (i = 0; i < 4; i++)
6086 			ha->conf->init_id[i] = 7;
6087 
6088 		/* Allow Completed with Errors, so JCRM can access the Adapter to fix the problems */
6089 		if ((scb->basic_status & IPS_GSC_STATUS_MASK) ==
6090 		    IPS_CMD_CMPLT_WERROR)
6091 			return (1);
6092 
6093 		return (0);
6094 	}
6095 
6096 	memcpy(ha->conf, ha->ioctl_data, sizeof(*ha->conf));
6097 	return (1);
6098 }
6099 
6100 /****************************************************************************/
6101 /*                                                                          */
6102 /* Routine Name: ips_readwrite_page5                                        */
6103 /*                                                                          */
6104 /* Routine Description:                                                     */
6105 /*                                                                          */
6106 /*   Read nvram page 5 from the adapter                                     */
6107 /*                                                                          */
6108 /****************************************************************************/
6109 static int
6110 ips_readwrite_page5(ips_ha_t * ha, int write, int intr)
6111 {
6112 	ips_scb_t *scb;
6113 	int ret;
6114 
6115 	METHOD_TRACE("ips_readwrite_page5", 1);
6116 
6117 	scb = &ha->scbs[ha->max_cmds - 1];
6118 
6119 	ips_init_scb(ha, scb);
6120 
6121 	scb->timeout = ips_cmd_timeout;
6122 	scb->cdb[0] = IPS_CMD_RW_NVRAM_PAGE;
6123 
6124 	scb->cmd.nvram.op_code = IPS_CMD_RW_NVRAM_PAGE;
6125 	scb->cmd.nvram.command_id = IPS_COMMAND_ID(ha, scb);
6126 	scb->cmd.nvram.page = 5;
6127 	scb->cmd.nvram.write = write;
6128 	scb->cmd.nvram.reserved = 0;
6129 	scb->cmd.nvram.reserved2 = 0;
6130 	scb->data_len = sizeof (*ha->nvram);
6131 	scb->cmd.nvram.buffer_addr = ha->ioctl_busaddr;
6132 	if (write)
6133 		memcpy(ha->ioctl_data, ha->nvram, sizeof(*ha->nvram));
6134 
6135 	/* issue the command */
6136 	if (((ret =
6137 	      ips_send_wait(ha, scb, ips_cmd_timeout, intr)) == IPS_FAILURE)
6138 	    || (ret == IPS_SUCCESS_IMM)
6139 	    || ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1)) {
6140 
6141 		memset(ha->nvram, 0, sizeof (IPS_NVRAM_P5));
6142 
6143 		return (0);
6144 	}
6145 	if (!write)
6146 		memcpy(ha->nvram, ha->ioctl_data, sizeof(*ha->nvram));
6147 	return (1);
6148 }
6149 
6150 /****************************************************************************/
6151 /*                                                                          */
6152 /* Routine Name: ips_clear_adapter                                          */
6153 /*                                                                          */
6154 /* Routine Description:                                                     */
6155 /*                                                                          */
6156 /*   Clear the stripe lock tables                                           */
6157 /*                                                                          */
6158 /****************************************************************************/
6159 static int
6160 ips_clear_adapter(ips_ha_t * ha, int intr)
6161 {
6162 	ips_scb_t *scb;
6163 	int ret;
6164 
6165 	METHOD_TRACE("ips_clear_adapter", 1);
6166 
6167 	scb = &ha->scbs[ha->max_cmds - 1];
6168 
6169 	ips_init_scb(ha, scb);
6170 
6171 	scb->timeout = ips_reset_timeout;
6172 	scb->cdb[0] = IPS_CMD_CONFIG_SYNC;
6173 
6174 	scb->cmd.config_sync.op_code = IPS_CMD_CONFIG_SYNC;
6175 	scb->cmd.config_sync.command_id = IPS_COMMAND_ID(ha, scb);
6176 	scb->cmd.config_sync.channel = 0;
6177 	scb->cmd.config_sync.source_target = IPS_POCL;
6178 	scb->cmd.config_sync.reserved = 0;
6179 	scb->cmd.config_sync.reserved2 = 0;
6180 	scb->cmd.config_sync.reserved3 = 0;
6181 
6182 	/* issue command */
6183 	if (((ret =
6184 	      ips_send_wait(ha, scb, ips_reset_timeout, intr)) == IPS_FAILURE)
6185 	    || (ret == IPS_SUCCESS_IMM)
6186 	    || ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1))
6187 		return (0);
6188 
6189 	/* send unlock stripe command */
6190 	ips_init_scb(ha, scb);
6191 
6192 	scb->cdb[0] = IPS_CMD_ERROR_TABLE;
6193 	scb->timeout = ips_reset_timeout;
6194 
6195 	scb->cmd.unlock_stripe.op_code = IPS_CMD_ERROR_TABLE;
6196 	scb->cmd.unlock_stripe.command_id = IPS_COMMAND_ID(ha, scb);
6197 	scb->cmd.unlock_stripe.log_drv = 0;
6198 	scb->cmd.unlock_stripe.control = IPS_CSL;
6199 	scb->cmd.unlock_stripe.reserved = 0;
6200 	scb->cmd.unlock_stripe.reserved2 = 0;
6201 	scb->cmd.unlock_stripe.reserved3 = 0;
6202 
6203 	/* issue command */
6204 	if (((ret =
6205 	      ips_send_wait(ha, scb, ips_cmd_timeout, intr)) == IPS_FAILURE)
6206 	    || (ret == IPS_SUCCESS_IMM)
6207 	    || ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1))
6208 		return (0);
6209 
6210 	return (1);
6211 }
6212 
6213 /****************************************************************************/
6214 /*                                                                          */
6215 /* Routine Name: ips_ffdc_reset                                             */
6216 /*                                                                          */
6217 /* Routine Description:                                                     */
6218 /*                                                                          */
6219 /*   FFDC: write reset info                                                 */
6220 /*                                                                          */
6221 /****************************************************************************/
6222 static void
6223 ips_ffdc_reset(ips_ha_t * ha, int intr)
6224 {
6225 	ips_scb_t *scb;
6226 
6227 	METHOD_TRACE("ips_ffdc_reset", 1);
6228 
6229 	scb = &ha->scbs[ha->max_cmds - 1];
6230 
6231 	ips_init_scb(ha, scb);
6232 
6233 	scb->timeout = ips_cmd_timeout;
6234 	scb->cdb[0] = IPS_CMD_FFDC;
6235 	scb->cmd.ffdc.op_code = IPS_CMD_FFDC;
6236 	scb->cmd.ffdc.command_id = IPS_COMMAND_ID(ha, scb);
6237 	scb->cmd.ffdc.reset_count = ha->reset_count;
6238 	scb->cmd.ffdc.reset_type = 0x80;
6239 
6240 	/* convert time to what the card wants */
6241 	ips_fix_ffdc_time(ha, scb, ha->last_ffdc);
6242 
6243 	/* issue command */
6244 	ips_send_wait(ha, scb, ips_cmd_timeout, intr);
6245 }
6246 
6247 /****************************************************************************/
6248 /*                                                                          */
6249 /* Routine Name: ips_ffdc_time                                              */
6250 /*                                                                          */
6251 /* Routine Description:                                                     */
6252 /*                                                                          */
6253 /*   FFDC: write time info                                                  */
6254 /*                                                                          */
6255 /****************************************************************************/
6256 static void
6257 ips_ffdc_time(ips_ha_t * ha)
6258 {
6259 	ips_scb_t *scb;
6260 
6261 	METHOD_TRACE("ips_ffdc_time", 1);
6262 
6263 	DEBUG_VAR(1, "(%s%d) Sending time update.", ips_name, ha->host_num);
6264 
6265 	scb = &ha->scbs[ha->max_cmds - 1];
6266 
6267 	ips_init_scb(ha, scb);
6268 
6269 	scb->timeout = ips_cmd_timeout;
6270 	scb->cdb[0] = IPS_CMD_FFDC;
6271 	scb->cmd.ffdc.op_code = IPS_CMD_FFDC;
6272 	scb->cmd.ffdc.command_id = IPS_COMMAND_ID(ha, scb);
6273 	scb->cmd.ffdc.reset_count = 0;
6274 	scb->cmd.ffdc.reset_type = 0;
6275 
6276 	/* convert time to what the card wants */
6277 	ips_fix_ffdc_time(ha, scb, ha->last_ffdc);
6278 
6279 	/* issue command */
6280 	ips_send_wait(ha, scb, ips_cmd_timeout, IPS_FFDC);
6281 }
6282 
6283 /****************************************************************************/
6284 /*                                                                          */
6285 /* Routine Name: ips_fix_ffdc_time                                          */
6286 /*                                                                          */
6287 /* Routine Description:                                                     */
6288 /*   Adjust time_t to what the card wants                                   */
6289 /*                                                                          */
6290 /****************************************************************************/
6291 static void
6292 ips_fix_ffdc_time(ips_ha_t * ha, ips_scb_t * scb, time_t current_time)
6293 {
6294 	long days;
6295 	long rem;
6296 	int i;
6297 	int year;
6298 	int yleap;
6299 	int year_lengths[2] = { IPS_DAYS_NORMAL_YEAR, IPS_DAYS_LEAP_YEAR };
6300 	int month_lengths[12][2] = { {31, 31},
6301 	{28, 29},
6302 	{31, 31},
6303 	{30, 30},
6304 	{31, 31},
6305 	{30, 30},
6306 	{31, 31},
6307 	{31, 31},
6308 	{30, 30},
6309 	{31, 31},
6310 	{30, 30},
6311 	{31, 31}
6312 	};
6313 
6314 	METHOD_TRACE("ips_fix_ffdc_time", 1);
6315 
6316 	days = current_time / IPS_SECS_DAY;
6317 	rem = current_time % IPS_SECS_DAY;
6318 
6319 	scb->cmd.ffdc.hour = (rem / IPS_SECS_HOUR);
6320 	rem = rem % IPS_SECS_HOUR;
6321 	scb->cmd.ffdc.minute = (rem / IPS_SECS_MIN);
6322 	scb->cmd.ffdc.second = (rem % IPS_SECS_MIN);
6323 
6324 	year = IPS_EPOCH_YEAR;
6325 	while (days < 0 || days >= year_lengths[yleap = IPS_IS_LEAP_YEAR(year)]) {
6326 		int newy;
6327 
6328 		newy = year + (days / IPS_DAYS_NORMAL_YEAR);
6329 		if (days < 0)
6330 			--newy;
6331 		days -= (newy - year) * IPS_DAYS_NORMAL_YEAR +
6332 		    IPS_NUM_LEAP_YEARS_THROUGH(newy - 1) -
6333 		    IPS_NUM_LEAP_YEARS_THROUGH(year - 1);
6334 		year = newy;
6335 	}
6336 
6337 	scb->cmd.ffdc.yearH = year / 100;
6338 	scb->cmd.ffdc.yearL = year % 100;
6339 
6340 	for (i = 0; days >= month_lengths[i][yleap]; ++i)
6341 		days -= month_lengths[i][yleap];
6342 
6343 	scb->cmd.ffdc.month = i + 1;
6344 	scb->cmd.ffdc.day = days + 1;
6345 }
6346 
6347 /****************************************************************************
6348  * BIOS Flash Routines                                                      *
6349  ****************************************************************************/
6350 
6351 /****************************************************************************/
6352 /*                                                                          */
6353 /* Routine Name: ips_erase_bios                                             */
6354 /*                                                                          */
6355 /* Routine Description:                                                     */
6356 /*   Erase the BIOS on the adapter                                          */
6357 /*                                                                          */
6358 /****************************************************************************/
6359 static int
6360 ips_erase_bios(ips_ha_t * ha)
6361 {
6362 	int timeout;
6363 	uint8_t status = 0;
6364 
6365 	METHOD_TRACE("ips_erase_bios", 1);
6366 
6367 	status = 0;
6368 
6369 	/* Clear the status register */
6370 	outl(0, ha->io_addr + IPS_REG_FLAP);
6371 	if (ha->revision_id == IPS_REVID_TROMBONE64)
6372 		udelay(25);	/* 25 us */
6373 
6374 	outb(0x50, ha->io_addr + IPS_REG_FLDP);
6375 	if (ha->revision_id == IPS_REVID_TROMBONE64)
6376 		udelay(25);	/* 25 us */
6377 
6378 	/* Erase Setup */
6379 	outb(0x20, ha->io_addr + IPS_REG_FLDP);
6380 	if (ha->revision_id == IPS_REVID_TROMBONE64)
6381 		udelay(25);	/* 25 us */
6382 
6383 	/* Erase Confirm */
6384 	outb(0xD0, ha->io_addr + IPS_REG_FLDP);
6385 	if (ha->revision_id == IPS_REVID_TROMBONE64)
6386 		udelay(25);	/* 25 us */
6387 
6388 	/* Erase Status */
6389 	outb(0x70, ha->io_addr + IPS_REG_FLDP);
6390 	if (ha->revision_id == IPS_REVID_TROMBONE64)
6391 		udelay(25);	/* 25 us */
6392 
6393 	timeout = 80000;	/* 80 seconds */
6394 
6395 	while (timeout > 0) {
6396 		if (ha->revision_id == IPS_REVID_TROMBONE64) {
6397 			outl(0, ha->io_addr + IPS_REG_FLAP);
6398 			udelay(25);	/* 25 us */
6399 		}
6400 
6401 		status = inb(ha->io_addr + IPS_REG_FLDP);
6402 
6403 		if (status & 0x80)
6404 			break;
6405 
6406 		MDELAY(1);
6407 		timeout--;
6408 	}
6409 
6410 	/* check for timeout */
6411 	if (timeout <= 0) {
6412 		/* timeout */
6413 
6414 		/* try to suspend the erase */
6415 		outb(0xB0, ha->io_addr + IPS_REG_FLDP);
6416 		if (ha->revision_id == IPS_REVID_TROMBONE64)
6417 			udelay(25);	/* 25 us */
6418 
6419 		/* wait for 10 seconds */
6420 		timeout = 10000;
6421 		while (timeout > 0) {
6422 			if (ha->revision_id == IPS_REVID_TROMBONE64) {
6423 				outl(0, ha->io_addr + IPS_REG_FLAP);
6424 				udelay(25);	/* 25 us */
6425 			}
6426 
6427 			status = inb(ha->io_addr + IPS_REG_FLDP);
6428 
6429 			if (status & 0xC0)
6430 				break;
6431 
6432 			MDELAY(1);
6433 			timeout--;
6434 		}
6435 
6436 		return (1);
6437 	}
6438 
6439 	/* check for valid VPP */
6440 	if (status & 0x08)
6441 		/* VPP failure */
6442 		return (1);
6443 
6444 	/* check for succesful flash */
6445 	if (status & 0x30)
6446 		/* sequence error */
6447 		return (1);
6448 
6449 	/* Otherwise, we were successful */
6450 	/* clear status */
6451 	outb(0x50, ha->io_addr + IPS_REG_FLDP);
6452 	if (ha->revision_id == IPS_REVID_TROMBONE64)
6453 		udelay(25);	/* 25 us */
6454 
6455 	/* enable reads */
6456 	outb(0xFF, ha->io_addr + IPS_REG_FLDP);
6457 	if (ha->revision_id == IPS_REVID_TROMBONE64)
6458 		udelay(25);	/* 25 us */
6459 
6460 	return (0);
6461 }
6462 
6463 /****************************************************************************/
6464 /*                                                                          */
6465 /* Routine Name: ips_erase_bios_memio                                       */
6466 /*                                                                          */
6467 /* Routine Description:                                                     */
6468 /*   Erase the BIOS on the adapter                                          */
6469 /*                                                                          */
6470 /****************************************************************************/
6471 static int
6472 ips_erase_bios_memio(ips_ha_t * ha)
6473 {
6474 	int timeout;
6475 	uint8_t status;
6476 
6477 	METHOD_TRACE("ips_erase_bios_memio", 1);
6478 
6479 	status = 0;
6480 
6481 	/* Clear the status register */
6482 	writel(0, ha->mem_ptr + IPS_REG_FLAP);
6483 	if (ha->revision_id == IPS_REVID_TROMBONE64)
6484 		udelay(25);	/* 25 us */
6485 
6486 	writeb(0x50, ha->mem_ptr + IPS_REG_FLDP);
6487 	if (ha->revision_id == IPS_REVID_TROMBONE64)
6488 		udelay(25);	/* 25 us */
6489 
6490 	/* Erase Setup */
6491 	writeb(0x20, ha->mem_ptr + IPS_REG_FLDP);
6492 	if (ha->revision_id == IPS_REVID_TROMBONE64)
6493 		udelay(25);	/* 25 us */
6494 
6495 	/* Erase Confirm */
6496 	writeb(0xD0, ha->mem_ptr + IPS_REG_FLDP);
6497 	if (ha->revision_id == IPS_REVID_TROMBONE64)
6498 		udelay(25);	/* 25 us */
6499 
6500 	/* Erase Status */
6501 	writeb(0x70, ha->mem_ptr + IPS_REG_FLDP);
6502 	if (ha->revision_id == IPS_REVID_TROMBONE64)
6503 		udelay(25);	/* 25 us */
6504 
6505 	timeout = 80000;	/* 80 seconds */
6506 
6507 	while (timeout > 0) {
6508 		if (ha->revision_id == IPS_REVID_TROMBONE64) {
6509 			writel(0, ha->mem_ptr + IPS_REG_FLAP);
6510 			udelay(25);	/* 25 us */
6511 		}
6512 
6513 		status = readb(ha->mem_ptr + IPS_REG_FLDP);
6514 
6515 		if (status & 0x80)
6516 			break;
6517 
6518 		MDELAY(1);
6519 		timeout--;
6520 	}
6521 
6522 	/* check for timeout */
6523 	if (timeout <= 0) {
6524 		/* timeout */
6525 
6526 		/* try to suspend the erase */
6527 		writeb(0xB0, ha->mem_ptr + IPS_REG_FLDP);
6528 		if (ha->revision_id == IPS_REVID_TROMBONE64)
6529 			udelay(25);	/* 25 us */
6530 
6531 		/* wait for 10 seconds */
6532 		timeout = 10000;
6533 		while (timeout > 0) {
6534 			if (ha->revision_id == IPS_REVID_TROMBONE64) {
6535 				writel(0, ha->mem_ptr + IPS_REG_FLAP);
6536 				udelay(25);	/* 25 us */
6537 			}
6538 
6539 			status = readb(ha->mem_ptr + IPS_REG_FLDP);
6540 
6541 			if (status & 0xC0)
6542 				break;
6543 
6544 			MDELAY(1);
6545 			timeout--;
6546 		}
6547 
6548 		return (1);
6549 	}
6550 
6551 	/* check for valid VPP */
6552 	if (status & 0x08)
6553 		/* VPP failure */
6554 		return (1);
6555 
6556 	/* check for succesful flash */
6557 	if (status & 0x30)
6558 		/* sequence error */
6559 		return (1);
6560 
6561 	/* Otherwise, we were successful */
6562 	/* clear status */
6563 	writeb(0x50, ha->mem_ptr + IPS_REG_FLDP);
6564 	if (ha->revision_id == IPS_REVID_TROMBONE64)
6565 		udelay(25);	/* 25 us */
6566 
6567 	/* enable reads */
6568 	writeb(0xFF, ha->mem_ptr + IPS_REG_FLDP);
6569 	if (ha->revision_id == IPS_REVID_TROMBONE64)
6570 		udelay(25);	/* 25 us */
6571 
6572 	return (0);
6573 }
6574 
6575 /****************************************************************************/
6576 /*                                                                          */
6577 /* Routine Name: ips_program_bios                                           */
6578 /*                                                                          */
6579 /* Routine Description:                                                     */
6580 /*   Program the BIOS on the adapter                                        */
6581 /*                                                                          */
6582 /****************************************************************************/
6583 static int
6584 ips_program_bios(ips_ha_t * ha, char *buffer, uint32_t buffersize,
6585 		 uint32_t offset)
6586 {
6587 	int i;
6588 	int timeout;
6589 	uint8_t status = 0;
6590 
6591 	METHOD_TRACE("ips_program_bios", 1);
6592 
6593 	status = 0;
6594 
6595 	for (i = 0; i < buffersize; i++) {
6596 		/* write a byte */
6597 		outl(cpu_to_le32(i + offset), ha->io_addr + IPS_REG_FLAP);
6598 		if (ha->revision_id == IPS_REVID_TROMBONE64)
6599 			udelay(25);	/* 25 us */
6600 
6601 		outb(0x40, ha->io_addr + IPS_REG_FLDP);
6602 		if (ha->revision_id == IPS_REVID_TROMBONE64)
6603 			udelay(25);	/* 25 us */
6604 
6605 		outb(buffer[i], ha->io_addr + IPS_REG_FLDP);
6606 		if (ha->revision_id == IPS_REVID_TROMBONE64)
6607 			udelay(25);	/* 25 us */
6608 
6609 		/* wait up to one second */
6610 		timeout = 1000;
6611 		while (timeout > 0) {
6612 			if (ha->revision_id == IPS_REVID_TROMBONE64) {
6613 				outl(0, ha->io_addr + IPS_REG_FLAP);
6614 				udelay(25);	/* 25 us */
6615 			}
6616 
6617 			status = inb(ha->io_addr + IPS_REG_FLDP);
6618 
6619 			if (status & 0x80)
6620 				break;
6621 
6622 			MDELAY(1);
6623 			timeout--;
6624 		}
6625 
6626 		if (timeout == 0) {
6627 			/* timeout error */
6628 			outl(0, ha->io_addr + IPS_REG_FLAP);
6629 			if (ha->revision_id == IPS_REVID_TROMBONE64)
6630 				udelay(25);	/* 25 us */
6631 
6632 			outb(0xFF, ha->io_addr + IPS_REG_FLDP);
6633 			if (ha->revision_id == IPS_REVID_TROMBONE64)
6634 				udelay(25);	/* 25 us */
6635 
6636 			return (1);
6637 		}
6638 
6639 		/* check the status */
6640 		if (status & 0x18) {
6641 			/* programming error */
6642 			outl(0, ha->io_addr + IPS_REG_FLAP);
6643 			if (ha->revision_id == IPS_REVID_TROMBONE64)
6644 				udelay(25);	/* 25 us */
6645 
6646 			outb(0xFF, ha->io_addr + IPS_REG_FLDP);
6647 			if (ha->revision_id == IPS_REVID_TROMBONE64)
6648 				udelay(25);	/* 25 us */
6649 
6650 			return (1);
6651 		}
6652 	}			/* end for */
6653 
6654 	/* Enable reading */
6655 	outl(0, ha->io_addr + IPS_REG_FLAP);
6656 	if (ha->revision_id == IPS_REVID_TROMBONE64)
6657 		udelay(25);	/* 25 us */
6658 
6659 	outb(0xFF, ha->io_addr + IPS_REG_FLDP);
6660 	if (ha->revision_id == IPS_REVID_TROMBONE64)
6661 		udelay(25);	/* 25 us */
6662 
6663 	return (0);
6664 }
6665 
6666 /****************************************************************************/
6667 /*                                                                          */
6668 /* Routine Name: ips_program_bios_memio                                     */
6669 /*                                                                          */
6670 /* Routine Description:                                                     */
6671 /*   Program the BIOS on the adapter                                        */
6672 /*                                                                          */
6673 /****************************************************************************/
6674 static int
6675 ips_program_bios_memio(ips_ha_t * ha, char *buffer, uint32_t buffersize,
6676 		       uint32_t offset)
6677 {
6678 	int i;
6679 	int timeout;
6680 	uint8_t status = 0;
6681 
6682 	METHOD_TRACE("ips_program_bios_memio", 1);
6683 
6684 	status = 0;
6685 
6686 	for (i = 0; i < buffersize; i++) {
6687 		/* write a byte */
6688 		writel(i + offset, ha->mem_ptr + IPS_REG_FLAP);
6689 		if (ha->revision_id == IPS_REVID_TROMBONE64)
6690 			udelay(25);	/* 25 us */
6691 
6692 		writeb(0x40, ha->mem_ptr + IPS_REG_FLDP);
6693 		if (ha->revision_id == IPS_REVID_TROMBONE64)
6694 			udelay(25);	/* 25 us */
6695 
6696 		writeb(buffer[i], ha->mem_ptr + IPS_REG_FLDP);
6697 		if (ha->revision_id == IPS_REVID_TROMBONE64)
6698 			udelay(25);	/* 25 us */
6699 
6700 		/* wait up to one second */
6701 		timeout = 1000;
6702 		while (timeout > 0) {
6703 			if (ha->revision_id == IPS_REVID_TROMBONE64) {
6704 				writel(0, ha->mem_ptr + IPS_REG_FLAP);
6705 				udelay(25);	/* 25 us */
6706 			}
6707 
6708 			status = readb(ha->mem_ptr + IPS_REG_FLDP);
6709 
6710 			if (status & 0x80)
6711 				break;
6712 
6713 			MDELAY(1);
6714 			timeout--;
6715 		}
6716 
6717 		if (timeout == 0) {
6718 			/* timeout error */
6719 			writel(0, ha->mem_ptr + IPS_REG_FLAP);
6720 			if (ha->revision_id == IPS_REVID_TROMBONE64)
6721 				udelay(25);	/* 25 us */
6722 
6723 			writeb(0xFF, ha->mem_ptr + IPS_REG_FLDP);
6724 			if (ha->revision_id == IPS_REVID_TROMBONE64)
6725 				udelay(25);	/* 25 us */
6726 
6727 			return (1);
6728 		}
6729 
6730 		/* check the status */
6731 		if (status & 0x18) {
6732 			/* programming error */
6733 			writel(0, ha->mem_ptr + IPS_REG_FLAP);
6734 			if (ha->revision_id == IPS_REVID_TROMBONE64)
6735 				udelay(25);	/* 25 us */
6736 
6737 			writeb(0xFF, ha->mem_ptr + IPS_REG_FLDP);
6738 			if (ha->revision_id == IPS_REVID_TROMBONE64)
6739 				udelay(25);	/* 25 us */
6740 
6741 			return (1);
6742 		}
6743 	}			/* end for */
6744 
6745 	/* Enable reading */
6746 	writel(0, ha->mem_ptr + IPS_REG_FLAP);
6747 	if (ha->revision_id == IPS_REVID_TROMBONE64)
6748 		udelay(25);	/* 25 us */
6749 
6750 	writeb(0xFF, ha->mem_ptr + IPS_REG_FLDP);
6751 	if (ha->revision_id == IPS_REVID_TROMBONE64)
6752 		udelay(25);	/* 25 us */
6753 
6754 	return (0);
6755 }
6756 
6757 /****************************************************************************/
6758 /*                                                                          */
6759 /* Routine Name: ips_verify_bios                                            */
6760 /*                                                                          */
6761 /* Routine Description:                                                     */
6762 /*   Verify the BIOS on the adapter                                         */
6763 /*                                                                          */
6764 /****************************************************************************/
6765 static int
6766 ips_verify_bios(ips_ha_t * ha, char *buffer, uint32_t buffersize,
6767 		uint32_t offset)
6768 {
6769 	uint8_t checksum;
6770 	int i;
6771 
6772 	METHOD_TRACE("ips_verify_bios", 1);
6773 
6774 	/* test 1st byte */
6775 	outl(0, ha->io_addr + IPS_REG_FLAP);
6776 	if (ha->revision_id == IPS_REVID_TROMBONE64)
6777 		udelay(25);	/* 25 us */
6778 
6779 	if (inb(ha->io_addr + IPS_REG_FLDP) != 0x55)
6780 		return (1);
6781 
6782 	outl(cpu_to_le32(1), ha->io_addr + IPS_REG_FLAP);
6783 	if (ha->revision_id == IPS_REVID_TROMBONE64)
6784 		udelay(25);	/* 25 us */
6785 	if (inb(ha->io_addr + IPS_REG_FLDP) != 0xAA)
6786 		return (1);
6787 
6788 	checksum = 0xff;
6789 	for (i = 2; i < buffersize; i++) {
6790 
6791 		outl(cpu_to_le32(i + offset), ha->io_addr + IPS_REG_FLAP);
6792 		if (ha->revision_id == IPS_REVID_TROMBONE64)
6793 			udelay(25);	/* 25 us */
6794 
6795 		checksum = (uint8_t) checksum + inb(ha->io_addr + IPS_REG_FLDP);
6796 	}
6797 
6798 	if (checksum != 0)
6799 		/* failure */
6800 		return (1);
6801 	else
6802 		/* success */
6803 		return (0);
6804 }
6805 
6806 /****************************************************************************/
6807 /*                                                                          */
6808 /* Routine Name: ips_verify_bios_memio                                      */
6809 /*                                                                          */
6810 /* Routine Description:                                                     */
6811 /*   Verify the BIOS on the adapter                                         */
6812 /*                                                                          */
6813 /****************************************************************************/
6814 static int
6815 ips_verify_bios_memio(ips_ha_t * ha, char *buffer, uint32_t buffersize,
6816 		      uint32_t offset)
6817 {
6818 	uint8_t checksum;
6819 	int i;
6820 
6821 	METHOD_TRACE("ips_verify_bios_memio", 1);
6822 
6823 	/* test 1st byte */
6824 	writel(0, ha->mem_ptr + IPS_REG_FLAP);
6825 	if (ha->revision_id == IPS_REVID_TROMBONE64)
6826 		udelay(25);	/* 25 us */
6827 
6828 	if (readb(ha->mem_ptr + IPS_REG_FLDP) != 0x55)
6829 		return (1);
6830 
6831 	writel(1, ha->mem_ptr + IPS_REG_FLAP);
6832 	if (ha->revision_id == IPS_REVID_TROMBONE64)
6833 		udelay(25);	/* 25 us */
6834 	if (readb(ha->mem_ptr + IPS_REG_FLDP) != 0xAA)
6835 		return (1);
6836 
6837 	checksum = 0xff;
6838 	for (i = 2; i < buffersize; i++) {
6839 
6840 		writel(i + offset, ha->mem_ptr + IPS_REG_FLAP);
6841 		if (ha->revision_id == IPS_REVID_TROMBONE64)
6842 			udelay(25);	/* 25 us */
6843 
6844 		checksum =
6845 		    (uint8_t) checksum + readb(ha->mem_ptr + IPS_REG_FLDP);
6846 	}
6847 
6848 	if (checksum != 0)
6849 		/* failure */
6850 		return (1);
6851 	else
6852 		/* success */
6853 		return (0);
6854 }
6855 
6856 /*---------------------------------------------------------------------------*/
6857 /*   Routine Name: ips_version_check                                         */
6858 /*                                                                           */
6859 /*   Dependencies:                                                           */
6860 /*     Assumes that ips_read_adapter_status() is called first filling in     */
6861 /*     the data for SubSystem Parameters.                                    */
6862 /*     Called from ips_write_driver_status() so it also assumes NVRAM Page 5 */
6863 /*     Data is available.                                                    */
6864 /*                                                                           */
6865 /*---------------------------------------------------------------------------*/
6866 static void
6867 ips_version_check(ips_ha_t * ha, int intr)
6868 {
6869 	IPS_VERSION_DATA *VersionInfo;
6870 	uint8_t FirmwareVersion[IPS_COMPAT_ID_LENGTH + 1];
6871 	uint8_t BiosVersion[IPS_COMPAT_ID_LENGTH + 1];
6872 	int MatchError;
6873 	int rc;
6874 	char BiosString[10];
6875 	char FirmwareString[10];
6876 
6877 	METHOD_TRACE("ips_version_check", 1);
6878 
6879 	VersionInfo = ( IPS_VERSION_DATA * ) ha->ioctl_data;
6880 
6881 	memset(FirmwareVersion, 0, IPS_COMPAT_ID_LENGTH + 1);
6882 	memset(BiosVersion, 0, IPS_COMPAT_ID_LENGTH + 1);
6883 
6884 	/* Get the Compatible BIOS Version from NVRAM Page 5 */
6885 	memcpy(BiosVersion, ha->nvram->BiosCompatibilityID,
6886 	       IPS_COMPAT_ID_LENGTH);
6887 
6888 	rc = IPS_FAILURE;
6889 	if (ha->subsys->param[4] & IPS_GET_VERSION_SUPPORT) {	/* If Versioning is Supported */
6890 		/* Get the Version Info with a Get Version Command */
6891 		memset( VersionInfo, 0, sizeof (IPS_VERSION_DATA));
6892 		rc = ips_get_version_info(ha, ha->ioctl_busaddr, intr);
6893 		if (rc == IPS_SUCCESS)
6894 			memcpy(FirmwareVersion, VersionInfo->compatibilityId,
6895 			       IPS_COMPAT_ID_LENGTH);
6896 	}
6897 
6898 	if (rc != IPS_SUCCESS) {	/* If Data Not Obtainable from a GetVersion Command */
6899 		/* Get the Firmware Version from Enquiry Data */
6900 		memcpy(FirmwareVersion, ha->enq->CodeBlkVersion,
6901 		       IPS_COMPAT_ID_LENGTH);
6902 	}
6903 
6904 	/* printk(KERN_WARNING "Adapter's BIOS Version  = %s\n", BiosVersion);          */
6905 	/* printk(KERN_WARNING "BIOS Compatible Version = %s\n", IPS_COMPAT_BIOS);      */
6906 	/* printk(KERN_WARNING "Adapter's Firmware Version  = %s\n", FirmwareVersion);  */
6907 	/* printk(KERN_WARNING "Firmware Compatible Version = %s \n", Compatable[ ha->nvram->adapter_type ]); */
6908 
6909 	MatchError = 0;
6910 
6911 	if (strncmp
6912 	    (FirmwareVersion, Compatable[ha->nvram->adapter_type],
6913 	     IPS_COMPAT_ID_LENGTH) != 0)
6914 		MatchError = 1;
6915 
6916 	if (strncmp(BiosVersion, IPS_COMPAT_BIOS, IPS_COMPAT_ID_LENGTH) != 0)
6917 		MatchError = 1;
6918 
6919 	ha->nvram->versioning = 1;	/* Indicate the Driver Supports Versioning */
6920 
6921 	if (MatchError) {
6922 		ha->nvram->version_mismatch = 1;
6923 		if (ips_cd_boot == 0) {
6924 			strncpy(&BiosString[0], ha->nvram->bios_high, 4);
6925 			strncpy(&BiosString[4], ha->nvram->bios_low, 4);
6926 			BiosString[8] = 0;
6927 
6928 			strncpy(&FirmwareString[0], ha->enq->CodeBlkVersion, 8);
6929 			FirmwareString[8] = 0;
6930 
6931 			IPS_PRINTK(KERN_WARNING, ha->pcidev,
6932 				   "Warning ! ! ! ServeRAID Version Mismatch\n");
6933 			IPS_PRINTK(KERN_WARNING, ha->pcidev,
6934 				   "Bios = %s, Firmware = %s, Device Driver = %s%s\n",
6935 				   BiosString, FirmwareString, IPS_VERSION_HIGH,
6936 				   IPS_VERSION_LOW);
6937 			IPS_PRINTK(KERN_WARNING, ha->pcidev,
6938 				   "These levels should match to avoid possible compatibility problems.\n");
6939 		}
6940 	} else {
6941 		ha->nvram->version_mismatch = 0;
6942 	}
6943 
6944 	return;
6945 }
6946 
6947 /*---------------------------------------------------------------------------*/
6948 /*   Routine Name: ips_get_version_info                                      */
6949 /*                                                                           */
6950 /*   Routine Description:                                                    */
6951 /*     Issue an internal GETVERSION Command                                  */
6952 /*                                                                           */
6953 /*   Return Value:                                                           */
6954 /*     0 if Successful, else non-zero                                        */
6955 /*---------------------------------------------------------------------------*/
6956 static int
6957 ips_get_version_info(ips_ha_t * ha, dma_addr_t Buffer, int intr)
6958 {
6959 	ips_scb_t *scb;
6960 	int rc;
6961 
6962 	METHOD_TRACE("ips_get_version_info", 1);
6963 
6964 	scb = &ha->scbs[ha->max_cmds - 1];
6965 
6966 	ips_init_scb(ha, scb);
6967 
6968 	scb->timeout = ips_cmd_timeout;
6969 	scb->cdb[0] = IPS_CMD_GET_VERSION_INFO;
6970 	scb->cmd.version_info.op_code = IPS_CMD_GET_VERSION_INFO;
6971 	scb->cmd.version_info.command_id = IPS_COMMAND_ID(ha, scb);
6972 	scb->cmd.version_info.reserved = 0;
6973 	scb->cmd.version_info.count = sizeof (IPS_VERSION_DATA);
6974 	scb->cmd.version_info.reserved2 = 0;
6975 	scb->data_len = sizeof (IPS_VERSION_DATA);
6976 	scb->data_busaddr = Buffer;
6977 	scb->cmd.version_info.buffer_addr = Buffer;
6978 	scb->flags = 0;
6979 
6980 	/* issue command */
6981 	rc = ips_send_wait(ha, scb, ips_cmd_timeout, intr);
6982 	return (rc);
6983 }
6984 
6985 /****************************************************************************/
6986 /*                                                                          */
6987 /* Routine Name: ips_abort_init                                             */
6988 /*                                                                          */
6989 /* Routine Description:                                                     */
6990 /*   cleanup routine for a failed adapter initialization                    */
6991 /****************************************************************************/
6992 static int
6993 ips_abort_init(ips_ha_t * ha, int index)
6994 {
6995 	ha->active = 0;
6996 	ips_free(ha);
6997 	ips_ha[index] = NULL;
6998 	ips_sh[index] = NULL;
6999 	return -1;
7000 }
7001 
7002 /****************************************************************************/
7003 /*                                                                          */
7004 /* Routine Name: ips_shift_controllers                                      */
7005 /*                                                                          */
7006 /* Routine Description:                                                     */
7007 /*   helper function for ordering adapters                                  */
7008 /****************************************************************************/
7009 static void
7010 ips_shift_controllers(int lowindex, int highindex)
7011 {
7012 	ips_ha_t *ha_sav = ips_ha[highindex];
7013 	struct Scsi_Host *sh_sav = ips_sh[highindex];
7014 	int i;
7015 
7016 	for (i = highindex; i > lowindex; i--) {
7017 		ips_ha[i] = ips_ha[i - 1];
7018 		ips_sh[i] = ips_sh[i - 1];
7019 		ips_ha[i]->host_num = i;
7020 	}
7021 	ha_sav->host_num = lowindex;
7022 	ips_ha[lowindex] = ha_sav;
7023 	ips_sh[lowindex] = sh_sav;
7024 }
7025 
7026 /****************************************************************************/
7027 /*                                                                          */
7028 /* Routine Name: ips_order_controllers                                      */
7029 /*                                                                          */
7030 /* Routine Description:                                                     */
7031 /*   place controllers is the "proper" boot order                           */
7032 /****************************************************************************/
7033 static void
7034 ips_order_controllers(void)
7035 {
7036 	int i, j, tmp, position = 0;
7037 	IPS_NVRAM_P5 *nvram;
7038 	if (!ips_ha[0])
7039 		return;
7040 	nvram = ips_ha[0]->nvram;
7041 
7042 	if (nvram->adapter_order[0]) {
7043 		for (i = 1; i <= nvram->adapter_order[0]; i++) {
7044 			for (j = position; j < ips_num_controllers; j++) {
7045 				switch (ips_ha[j]->ad_type) {
7046 				case IPS_ADTYPE_SERVERAID6M:
7047 				case IPS_ADTYPE_SERVERAID7M:
7048 					if (nvram->adapter_order[i] == 'M') {
7049 						ips_shift_controllers(position,
7050 								      j);
7051 						position++;
7052 					}
7053 					break;
7054 				case IPS_ADTYPE_SERVERAID4L:
7055 				case IPS_ADTYPE_SERVERAID4M:
7056 				case IPS_ADTYPE_SERVERAID4MX:
7057 				case IPS_ADTYPE_SERVERAID4LX:
7058 					if (nvram->adapter_order[i] == 'N') {
7059 						ips_shift_controllers(position,
7060 								      j);
7061 						position++;
7062 					}
7063 					break;
7064 				case IPS_ADTYPE_SERVERAID6I:
7065 				case IPS_ADTYPE_SERVERAID5I2:
7066 				case IPS_ADTYPE_SERVERAID5I1:
7067 				case IPS_ADTYPE_SERVERAID7k:
7068 					if (nvram->adapter_order[i] == 'S') {
7069 						ips_shift_controllers(position,
7070 								      j);
7071 						position++;
7072 					}
7073 					break;
7074 				case IPS_ADTYPE_SERVERAID:
7075 				case IPS_ADTYPE_SERVERAID2:
7076 				case IPS_ADTYPE_NAVAJO:
7077 				case IPS_ADTYPE_KIOWA:
7078 				case IPS_ADTYPE_SERVERAID3L:
7079 				case IPS_ADTYPE_SERVERAID3:
7080 				case IPS_ADTYPE_SERVERAID4H:
7081 					if (nvram->adapter_order[i] == 'A') {
7082 						ips_shift_controllers(position,
7083 								      j);
7084 						position++;
7085 					}
7086 					break;
7087 				default:
7088 					break;
7089 				}
7090 			}
7091 		}
7092 		/* if adapter_order[0], then ordering is complete */
7093 		return;
7094 	}
7095 	/* old bios, use older ordering */
7096 	tmp = 0;
7097 	for (i = position; i < ips_num_controllers; i++) {
7098 		if (ips_ha[i]->ad_type == IPS_ADTYPE_SERVERAID5I2 ||
7099 		    ips_ha[i]->ad_type == IPS_ADTYPE_SERVERAID5I1) {
7100 			ips_shift_controllers(position, i);
7101 			position++;
7102 			tmp = 1;
7103 		}
7104 	}
7105 	/* if there were no 5I cards, then don't do any extra ordering */
7106 	if (!tmp)
7107 		return;
7108 	for (i = position; i < ips_num_controllers; i++) {
7109 		if (ips_ha[i]->ad_type == IPS_ADTYPE_SERVERAID4L ||
7110 		    ips_ha[i]->ad_type == IPS_ADTYPE_SERVERAID4M ||
7111 		    ips_ha[i]->ad_type == IPS_ADTYPE_SERVERAID4LX ||
7112 		    ips_ha[i]->ad_type == IPS_ADTYPE_SERVERAID4MX) {
7113 			ips_shift_controllers(position, i);
7114 			position++;
7115 		}
7116 	}
7117 
7118 	return;
7119 }
7120 
7121 /****************************************************************************/
7122 /*                                                                          */
7123 /* Routine Name: ips_register_scsi                                          */
7124 /*                                                                          */
7125 /* Routine Description:                                                     */
7126 /*   perform any registration and setup with the scsi layer                 */
7127 /****************************************************************************/
7128 static int
7129 ips_register_scsi(int index)
7130 {
7131 	struct Scsi_Host *sh;
7132 	ips_ha_t *ha, *oldha = ips_ha[index];
7133 	sh = scsi_host_alloc(&ips_driver_template, sizeof (ips_ha_t));
7134 	if (!sh) {
7135 		IPS_PRINTK(KERN_WARNING, oldha->pcidev,
7136 			   "Unable to register controller with SCSI subsystem\n");
7137 		return -1;
7138 	}
7139 	ha = IPS_HA(sh);
7140 	memcpy(ha, oldha, sizeof (ips_ha_t));
7141 	free_irq(oldha->irq, oldha);
7142 	/* Install the interrupt handler with the new ha */
7143 	if (request_irq(ha->irq, do_ipsintr, SA_SHIRQ, ips_name, ha)) {
7144 		IPS_PRINTK(KERN_WARNING, ha->pcidev,
7145 			   "Unable to install interrupt handler\n");
7146 		scsi_host_put(sh);
7147 		return -1;
7148 	}
7149 
7150 	kfree(oldha);
7151 	ips_sh[index] = sh;
7152 	ips_ha[index] = ha;
7153 	IPS_SCSI_SET_DEVICE(sh, ha);
7154 
7155 	/* Store away needed values for later use */
7156 	sh->io_port = ha->io_addr;
7157 	sh->n_io_port = ha->io_addr ? 255 : 0;
7158 	sh->unique_id = (ha->io_addr) ? ha->io_addr : ha->mem_addr;
7159 	sh->irq = ha->irq;
7160 	sh->sg_tablesize = sh->hostt->sg_tablesize;
7161 	sh->can_queue = sh->hostt->can_queue;
7162 	sh->cmd_per_lun = sh->hostt->cmd_per_lun;
7163 	sh->unchecked_isa_dma = sh->hostt->unchecked_isa_dma;
7164 	sh->use_clustering = sh->hostt->use_clustering;
7165 
7166 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,7)
7167 	sh->max_sectors = 128;
7168 #endif
7169 
7170 	sh->max_id = ha->ntargets;
7171 	sh->max_lun = ha->nlun;
7172 	sh->max_channel = ha->nbus - 1;
7173 	sh->can_queue = ha->max_cmds - 1;
7174 
7175 	IPS_ADD_HOST(sh, NULL);
7176 	return 0;
7177 }
7178 
7179 /*---------------------------------------------------------------------------*/
7180 /*   Routine Name: ips_remove_device                                         */
7181 /*                                                                           */
7182 /*   Routine Description:                                                    */
7183 /*     Remove one Adapter ( Hot Plugging )                                   */
7184 /*---------------------------------------------------------------------------*/
7185 static void __devexit
7186 ips_remove_device(struct pci_dev *pci_dev)
7187 {
7188 	int i;
7189 	struct Scsi_Host *sh;
7190 	ips_ha_t *ha;
7191 
7192 	for (i = 0; i < IPS_MAX_ADAPTERS; i++) {
7193 		ha = ips_ha[i];
7194 		if (ha) {
7195 			if ((pci_dev->bus->number == ha->pcidev->bus->number) &&
7196 			    (pci_dev->devfn == ha->pcidev->devfn)) {
7197 				sh = ips_sh[i];
7198 				ips_release(sh);
7199 			}
7200 		}
7201 	}
7202 }
7203 
7204 /****************************************************************************/
7205 /*                                                                          */
7206 /* Routine Name: ips_module_init                                            */
7207 /*                                                                          */
7208 /* Routine Description:                                                     */
7209 /*   function called on module load                                         */
7210 /****************************************************************************/
7211 static int __init
7212 ips_module_init(void)
7213 {
7214 	if (pci_module_init(&ips_pci_driver) < 0)
7215 		return -ENODEV;
7216 	ips_driver_template.module = THIS_MODULE;
7217 	ips_order_controllers();
7218 	if (IPS_REGISTER_HOSTS(&ips_driver_template)) {
7219 		pci_unregister_driver(&ips_pci_driver);
7220 		return -ENODEV;
7221 	}
7222 	register_reboot_notifier(&ips_notifier);
7223 	return 0;
7224 }
7225 
7226 /****************************************************************************/
7227 /*                                                                          */
7228 /* Routine Name: ips_module_exit                                            */
7229 /*                                                                          */
7230 /* Routine Description:                                                     */
7231 /*   function called on module unload                                       */
7232 /****************************************************************************/
7233 static void __exit
7234 ips_module_exit(void)
7235 {
7236 	IPS_UNREGISTER_HOSTS(&ips_driver_template);
7237 	pci_unregister_driver(&ips_pci_driver);
7238 	unregister_reboot_notifier(&ips_notifier);
7239 }
7240 
7241 module_init(ips_module_init);
7242 module_exit(ips_module_exit);
7243 
7244 /*---------------------------------------------------------------------------*/
7245 /*   Routine Name: ips_insert_device                                         */
7246 /*                                                                           */
7247 /*   Routine Description:                                                    */
7248 /*     Add One Adapter ( Hot Plug )                                          */
7249 /*                                                                           */
7250 /*   Return Value:                                                           */
7251 /*     0 if Successful, else non-zero                                        */
7252 /*---------------------------------------------------------------------------*/
7253 static int __devinit
7254 ips_insert_device(struct pci_dev *pci_dev, const struct pci_device_id *ent)
7255 {
7256 	int index;
7257 	int rc;
7258 
7259 	METHOD_TRACE("ips_insert_device", 1);
7260 	if (pci_enable_device(pci_dev))
7261 		return -1;
7262 
7263 	rc = ips_init_phase1(pci_dev, &index);
7264 	if (rc == SUCCESS)
7265 		rc = ips_init_phase2(index);
7266 
7267 	if (ips_hotplug)
7268 		if (ips_register_scsi(index)) {
7269 			ips_free(ips_ha[index]);
7270 			rc = -1;
7271 		}
7272 
7273 	if (rc == SUCCESS)
7274 		ips_num_controllers++;
7275 
7276 	ips_next_controller = ips_num_controllers;
7277 	return rc;
7278 }
7279 
7280 /*---------------------------------------------------------------------------*/
7281 /*   Routine Name: ips_init_phase1                                           */
7282 /*                                                                           */
7283 /*   Routine Description:                                                    */
7284 /*     Adapter Initialization                                                */
7285 /*                                                                           */
7286 /*   Return Value:                                                           */
7287 /*     0 if Successful, else non-zero                                        */
7288 /*---------------------------------------------------------------------------*/
7289 static int
7290 ips_init_phase1(struct pci_dev *pci_dev, int *indexPtr)
7291 {
7292 	ips_ha_t *ha;
7293 	uint32_t io_addr;
7294 	uint32_t mem_addr;
7295 	uint32_t io_len;
7296 	uint32_t mem_len;
7297 	uint8_t revision_id;
7298 	uint8_t bus;
7299 	uint8_t func;
7300 	uint8_t irq;
7301 	uint16_t subdevice_id;
7302 	int j;
7303 	int index;
7304 	dma_addr_t dma_address;
7305 	char __iomem *ioremap_ptr;
7306 	char __iomem *mem_ptr;
7307 	uint32_t IsDead;
7308 
7309 	METHOD_TRACE("ips_init_phase1", 1);
7310 	index = IPS_MAX_ADAPTERS;
7311 	for (j = 0; j < IPS_MAX_ADAPTERS; j++) {
7312 		if (ips_ha[j] == 0) {
7313 			index = j;
7314 			break;
7315 		}
7316 	}
7317 
7318 	if (index >= IPS_MAX_ADAPTERS)
7319 		return -1;
7320 
7321 	/* stuff that we get in dev */
7322 	irq = pci_dev->irq;
7323 	bus = pci_dev->bus->number;
7324 	func = pci_dev->devfn;
7325 
7326 	/* Init MEM/IO addresses to 0 */
7327 	mem_addr = 0;
7328 	io_addr = 0;
7329 	mem_len = 0;
7330 	io_len = 0;
7331 
7332 	for (j = 0; j < 2; j++) {
7333 		if (!pci_resource_start(pci_dev, j))
7334 			break;
7335 
7336 		if (pci_resource_flags(pci_dev, j) & IORESOURCE_IO) {
7337 			io_addr = pci_resource_start(pci_dev, j);
7338 			io_len = pci_resource_len(pci_dev, j);
7339 		} else {
7340 			mem_addr = pci_resource_start(pci_dev, j);
7341 			mem_len = pci_resource_len(pci_dev, j);
7342 		}
7343 	}
7344 
7345 	/* setup memory mapped area (if applicable) */
7346 	if (mem_addr) {
7347 		uint32_t base;
7348 		uint32_t offs;
7349 
7350 		if (!request_mem_region(mem_addr, mem_len, "ips")) {
7351 			IPS_PRINTK(KERN_WARNING, pci_dev,
7352 				   "Couldn't allocate IO Memory space %x len %d.\n",
7353 				   mem_addr, mem_len);
7354 			return -1;
7355 		}
7356 
7357 		base = mem_addr & PAGE_MASK;
7358 		offs = mem_addr - base;
7359 		ioremap_ptr = ioremap(base, PAGE_SIZE);
7360 		mem_ptr = ioremap_ptr + offs;
7361 	} else {
7362 		ioremap_ptr = NULL;
7363 		mem_ptr = NULL;
7364 	}
7365 
7366 	/* setup I/O mapped area (if applicable) */
7367 	if (io_addr) {
7368 		if (!request_region(io_addr, io_len, "ips")) {
7369 			IPS_PRINTK(KERN_WARNING, pci_dev,
7370 				   "Couldn't allocate IO space %x len %d.\n",
7371 				   io_addr, io_len);
7372 			return -1;
7373 		}
7374 	}
7375 
7376 	/* get the revision ID */
7377 	if (pci_read_config_byte(pci_dev, PCI_REVISION_ID, &revision_id)) {
7378 		IPS_PRINTK(KERN_WARNING, pci_dev, "Can't get revision id.\n");
7379 		return -1;
7380 	}
7381 
7382 	subdevice_id = pci_dev->subsystem_device;
7383 
7384 	/* found a controller */
7385 	ha = kmalloc(sizeof (ips_ha_t), GFP_KERNEL);
7386 	if (ha == NULL) {
7387 		IPS_PRINTK(KERN_WARNING, pci_dev,
7388 			   "Unable to allocate temporary ha struct\n");
7389 		return -1;
7390 	}
7391 
7392 	memset(ha, 0, sizeof (ips_ha_t));
7393 
7394 	ips_sh[index] = NULL;
7395 	ips_ha[index] = ha;
7396 	ha->active = 1;
7397 
7398 	/* Store info in HA structure */
7399 	ha->irq = irq;
7400 	ha->io_addr = io_addr;
7401 	ha->io_len = io_len;
7402 	ha->mem_addr = mem_addr;
7403 	ha->mem_len = mem_len;
7404 	ha->mem_ptr = mem_ptr;
7405 	ha->ioremap_ptr = ioremap_ptr;
7406 	ha->host_num = (uint32_t) index;
7407 	ha->revision_id = revision_id;
7408 	ha->slot_num = PCI_SLOT(pci_dev->devfn);
7409 	ha->device_id = pci_dev->device;
7410 	ha->subdevice_id = subdevice_id;
7411 	ha->pcidev = pci_dev;
7412 
7413 	/*
7414 	 * Set the pci_dev's dma_mask.  Not all adapters support 64bit
7415 	 * addressing so don't enable it if the adapter can't support
7416 	 * it!  Also, don't use 64bit addressing if dma addresses
7417 	 * are guaranteed to be < 4G.
7418 	 */
7419 	if (IPS_ENABLE_DMA64 && IPS_HAS_ENH_SGLIST(ha) &&
7420 	    !pci_set_dma_mask(ha->pcidev, 0xffffffffffffffffULL)) {
7421 		(ha)->flags |= IPS_HA_ENH_SG;
7422 	} else {
7423 		if (pci_set_dma_mask(ha->pcidev, 0xffffffffULL) != 0) {
7424 			printk(KERN_WARNING "Unable to set DMA Mask\n");
7425 			return ips_abort_init(ha, index);
7426 		}
7427 	}
7428 	if(ips_cd_boot && !ips_FlashData){
7429 		ips_FlashData = pci_alloc_consistent(pci_dev, PAGE_SIZE << 7,
7430 						     &ips_flashbusaddr);
7431 	}
7432 
7433 	ha->enq = pci_alloc_consistent(pci_dev, sizeof (IPS_ENQ),
7434 				       &ha->enq_busaddr);
7435 	if (!ha->enq) {
7436 		IPS_PRINTK(KERN_WARNING, pci_dev,
7437 			   "Unable to allocate host inquiry structure\n");
7438 		return ips_abort_init(ha, index);
7439 	}
7440 
7441 	ha->adapt = pci_alloc_consistent(pci_dev, sizeof (IPS_ADAPTER) +
7442 					 sizeof (IPS_IO_CMD), &dma_address);
7443 	if (!ha->adapt) {
7444 		IPS_PRINTK(KERN_WARNING, pci_dev,
7445 			   "Unable to allocate host adapt & dummy structures\n");
7446 		return ips_abort_init(ha, index);
7447 	}
7448 	ha->adapt->hw_status_start = dma_address;
7449 	ha->dummy = (void *) (ha->adapt + 1);
7450 
7451 
7452 
7453 	ha->logical_drive_info = pci_alloc_consistent(pci_dev, sizeof (IPS_LD_INFO), &dma_address);
7454 	if (!ha->logical_drive_info) {
7455 		IPS_PRINTK(KERN_WARNING, pci_dev,
7456 			   "Unable to allocate logical drive info structure\n");
7457 		return ips_abort_init(ha, index);
7458 	}
7459 	ha->logical_drive_info_dma_addr = dma_address;
7460 
7461 
7462 	ha->conf = kmalloc(sizeof (IPS_CONF), GFP_KERNEL);
7463 
7464 	if (!ha->conf) {
7465 		IPS_PRINTK(KERN_WARNING, pci_dev,
7466 			   "Unable to allocate host conf structure\n");
7467 		return ips_abort_init(ha, index);
7468 	}
7469 
7470 	ha->nvram = kmalloc(sizeof (IPS_NVRAM_P5), GFP_KERNEL);
7471 
7472 	if (!ha->nvram) {
7473 		IPS_PRINTK(KERN_WARNING, pci_dev,
7474 			   "Unable to allocate host NVRAM structure\n");
7475 		return ips_abort_init(ha, index);
7476 	}
7477 
7478 	ha->subsys = kmalloc(sizeof (IPS_SUBSYS), GFP_KERNEL);
7479 
7480 	if (!ha->subsys) {
7481 		IPS_PRINTK(KERN_WARNING, pci_dev,
7482 			   "Unable to allocate host subsystem structure\n");
7483 		return ips_abort_init(ha, index);
7484 	}
7485 
7486 	/* the ioctl buffer is now used during adapter initialization, so its
7487 	 * successful allocation is now required */
7488 	if (ips_ioctlsize < PAGE_SIZE)
7489 		ips_ioctlsize = PAGE_SIZE;
7490 
7491 	ha->ioctl_data = pci_alloc_consistent(pci_dev, ips_ioctlsize,
7492 					      &ha->ioctl_busaddr);
7493 	ha->ioctl_len = ips_ioctlsize;
7494 	if (!ha->ioctl_data) {
7495 		IPS_PRINTK(KERN_WARNING, pci_dev,
7496 			   "Unable to allocate IOCTL data\n");
7497 		return ips_abort_init(ha, index);
7498 	}
7499 
7500 	/*
7501 	 * Setup Functions
7502 	 */
7503 	ips_setup_funclist(ha);
7504 
7505 	if ((IPS_IS_MORPHEUS(ha)) || (IPS_IS_MARCO(ha))) {
7506 		/* If Morpheus appears dead, reset it */
7507 		IsDead = readl(ha->mem_ptr + IPS_REG_I960_MSG1);
7508 		if (IsDead == 0xDEADBEEF) {
7509 			ips_reset_morpheus(ha);
7510 		}
7511 	}
7512 
7513 	/*
7514 	 * Initialize the card if it isn't already
7515 	 */
7516 
7517 	if (!(*ha->func.isinit) (ha)) {
7518 		if (!(*ha->func.init) (ha)) {
7519 			/*
7520 			 * Initialization failed
7521 			 */
7522 			IPS_PRINTK(KERN_WARNING, pci_dev,
7523 				   "Unable to initialize controller\n");
7524 			return ips_abort_init(ha, index);
7525 		}
7526 	}
7527 
7528 	*indexPtr = index;
7529 	return SUCCESS;
7530 }
7531 
7532 /*---------------------------------------------------------------------------*/
7533 /*   Routine Name: ips_init_phase2                                           */
7534 /*                                                                           */
7535 /*   Routine Description:                                                    */
7536 /*     Adapter Initialization Phase 2                                        */
7537 /*                                                                           */
7538 /*   Return Value:                                                           */
7539 /*     0 if Successful, else non-zero                                        */
7540 /*---------------------------------------------------------------------------*/
7541 static int
7542 ips_init_phase2(int index)
7543 {
7544 	ips_ha_t *ha;
7545 
7546 	ha = ips_ha[index];
7547 
7548 	METHOD_TRACE("ips_init_phase2", 1);
7549 	if (!ha->active) {
7550 		ips_ha[index] = NULL;
7551 		return -1;
7552 	}
7553 
7554 	/* Install the interrupt handler */
7555 	if (request_irq(ha->irq, do_ipsintr, SA_SHIRQ, ips_name, ha)) {
7556 		IPS_PRINTK(KERN_WARNING, ha->pcidev,
7557 			   "Unable to install interrupt handler\n");
7558 		return ips_abort_init(ha, index);
7559 	}
7560 
7561 	/*
7562 	 * Allocate a temporary SCB for initialization
7563 	 */
7564 	ha->max_cmds = 1;
7565 	if (!ips_allocatescbs(ha)) {
7566 		IPS_PRINTK(KERN_WARNING, ha->pcidev,
7567 			   "Unable to allocate a CCB\n");
7568 		free_irq(ha->irq, ha);
7569 		return ips_abort_init(ha, index);
7570 	}
7571 
7572 	if (!ips_hainit(ha)) {
7573 		IPS_PRINTK(KERN_WARNING, ha->pcidev,
7574 			   "Unable to initialize controller\n");
7575 		free_irq(ha->irq, ha);
7576 		return ips_abort_init(ha, index);
7577 	}
7578 	/* Free the temporary SCB */
7579 	ips_deallocatescbs(ha, 1);
7580 
7581 	/* allocate CCBs */
7582 	if (!ips_allocatescbs(ha)) {
7583 		IPS_PRINTK(KERN_WARNING, ha->pcidev,
7584 			   "Unable to allocate CCBs\n");
7585 		free_irq(ha->irq, ha);
7586 		return ips_abort_init(ha, index);
7587 	}
7588 
7589 	return SUCCESS;
7590 }
7591 
7592 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,9)
7593 MODULE_LICENSE("GPL");
7594 #endif
7595 
7596 MODULE_DESCRIPTION("IBM ServeRAID Adapter Driver " IPS_VER_STRING);
7597 
7598 #ifdef MODULE_VERSION
7599 MODULE_VERSION(IPS_VER_STRING);
7600 #endif
7601 
7602 
7603 /*
7604  * Overrides for Emacs so that we almost follow Linus's tabbing style.
7605  * Emacs will notice this stuff at the end of the file and automatically
7606  * adjust the settings for this buffer only.  This must remain at the end
7607  * of the file.
7608  * ---------------------------------------------------------------------------
7609  * Local variables:
7610  * c-indent-level: 2
7611  * c-brace-imaginary-offset: 0
7612  * c-brace-offset: -2
7613  * c-argdecl-indent: 2
7614  * c-label-offset: -2
7615  * c-continued-statement-offset: 2
7616  * c-continued-brace-offset: 0
7617  * indent-tabs-mode: nil
7618  * tab-width: 8
7619  * End:
7620  */
7621