1 /* 2 * Disk Array driver for HP Smart Array SAS controllers 3 * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P. 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License as published by 7 * the Free Software Foundation; version 2 of the License. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or 12 * NON INFRINGEMENT. See the GNU General Public License for more details. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program; if not, write to the Free Software 16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 17 * 18 * Questions/Comments/Bugfixes to iss_storagedev@hp.com 19 * 20 */ 21 22 #include <linux/module.h> 23 #include <linux/interrupt.h> 24 #include <linux/types.h> 25 #include <linux/pci.h> 26 #include <linux/pci-aspm.h> 27 #include <linux/kernel.h> 28 #include <linux/slab.h> 29 #include <linux/delay.h> 30 #include <linux/fs.h> 31 #include <linux/timer.h> 32 #include <linux/seq_file.h> 33 #include <linux/init.h> 34 #include <linux/spinlock.h> 35 #include <linux/compat.h> 36 #include <linux/blktrace_api.h> 37 #include <linux/uaccess.h> 38 #include <linux/io.h> 39 #include <linux/dma-mapping.h> 40 #include <linux/completion.h> 41 #include <linux/moduleparam.h> 42 #include <scsi/scsi.h> 43 #include <scsi/scsi_cmnd.h> 44 #include <scsi/scsi_device.h> 45 #include <scsi/scsi_host.h> 46 #include <scsi/scsi_tcq.h> 47 #include <linux/cciss_ioctl.h> 48 #include <linux/string.h> 49 #include <linux/bitmap.h> 50 #include <linux/atomic.h> 51 #include <linux/kthread.h> 52 #include <linux/jiffies.h> 53 #include "hpsa_cmd.h" 54 #include "hpsa.h" 55 56 /* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */ 57 #define HPSA_DRIVER_VERSION "2.0.2-1" 58 #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")" 59 #define HPSA "hpsa" 60 61 /* How long to wait (in milliseconds) for board to go into simple mode */ 62 #define MAX_CONFIG_WAIT 30000 63 #define MAX_IOCTL_CONFIG_WAIT 1000 64 65 /*define how many times we will try a command because of bus resets */ 66 #define MAX_CMD_RETRIES 3 67 68 /* Embedded module documentation macros - see modules.h */ 69 MODULE_AUTHOR("Hewlett-Packard Company"); 70 MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \ 71 HPSA_DRIVER_VERSION); 72 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers"); 73 MODULE_VERSION(HPSA_DRIVER_VERSION); 74 MODULE_LICENSE("GPL"); 75 76 static int hpsa_allow_any; 77 module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR); 78 MODULE_PARM_DESC(hpsa_allow_any, 79 "Allow hpsa driver to access unknown HP Smart Array hardware"); 80 static int hpsa_simple_mode; 81 module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR); 82 MODULE_PARM_DESC(hpsa_simple_mode, 83 "Use 'simple mode' rather than 'performant mode'"); 84 85 /* define the PCI info for the cards we can control */ 86 static const struct pci_device_id hpsa_pci_device_id[] = { 87 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241}, 88 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243}, 89 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245}, 90 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247}, 91 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249}, 92 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324a}, 93 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324b}, 94 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233}, 95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350}, 96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351}, 97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352}, 98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353}, 99 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354}, 100 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355}, 101 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356}, 102 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1920}, 103 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1921}, 104 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1922}, 105 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1923}, 106 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1924}, 107 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1925}, 108 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1926}, 109 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1928}, 110 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x334d}, 111 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 112 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0}, 113 {0,} 114 }; 115 116 MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id); 117 118 /* board_id = Subsystem Device ID & Vendor ID 119 * product = Marketing Name for the board 120 * access = Address of the struct of function pointers 121 */ 122 static struct board_type products[] = { 123 {0x3241103C, "Smart Array P212", &SA5_access}, 124 {0x3243103C, "Smart Array P410", &SA5_access}, 125 {0x3245103C, "Smart Array P410i", &SA5_access}, 126 {0x3247103C, "Smart Array P411", &SA5_access}, 127 {0x3249103C, "Smart Array P812", &SA5_access}, 128 {0x324a103C, "Smart Array P712m", &SA5_access}, 129 {0x324b103C, "Smart Array P711m", &SA5_access}, 130 {0x3350103C, "Smart Array P222", &SA5_access}, 131 {0x3351103C, "Smart Array P420", &SA5_access}, 132 {0x3352103C, "Smart Array P421", &SA5_access}, 133 {0x3353103C, "Smart Array P822", &SA5_access}, 134 {0x3354103C, "Smart Array P420i", &SA5_access}, 135 {0x3355103C, "Smart Array P220i", &SA5_access}, 136 {0x3356103C, "Smart Array P721m", &SA5_access}, 137 {0x1920103C, "Smart Array", &SA5_access}, 138 {0x1921103C, "Smart Array", &SA5_access}, 139 {0x1922103C, "Smart Array", &SA5_access}, 140 {0x1923103C, "Smart Array", &SA5_access}, 141 {0x1924103C, "Smart Array", &SA5_access}, 142 {0x1925103C, "Smart Array", &SA5_access}, 143 {0x1926103C, "Smart Array", &SA5_access}, 144 {0x1928103C, "Smart Array", &SA5_access}, 145 {0x334d103C, "Smart Array P822se", &SA5_access}, 146 {0xFFFF103C, "Unknown Smart Array", &SA5_access}, 147 }; 148 149 static int number_of_controllers; 150 151 static struct list_head hpsa_ctlr_list = LIST_HEAD_INIT(hpsa_ctlr_list); 152 static spinlock_t lockup_detector_lock; 153 static struct task_struct *hpsa_lockup_detector; 154 155 static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id); 156 static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id); 157 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg); 158 static void start_io(struct ctlr_info *h); 159 160 #ifdef CONFIG_COMPAT 161 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg); 162 #endif 163 164 static void cmd_free(struct ctlr_info *h, struct CommandList *c); 165 static void cmd_special_free(struct ctlr_info *h, struct CommandList *c); 166 static struct CommandList *cmd_alloc(struct ctlr_info *h); 167 static struct CommandList *cmd_special_alloc(struct ctlr_info *h); 168 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 169 void *buff, size_t size, u8 page_code, unsigned char *scsi3addr, 170 int cmd_type); 171 172 static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd); 173 static void hpsa_scan_start(struct Scsi_Host *); 174 static int hpsa_scan_finished(struct Scsi_Host *sh, 175 unsigned long elapsed_time); 176 static int hpsa_change_queue_depth(struct scsi_device *sdev, 177 int qdepth, int reason); 178 179 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd); 180 static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd); 181 static int hpsa_slave_alloc(struct scsi_device *sdev); 182 static void hpsa_slave_destroy(struct scsi_device *sdev); 183 184 static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno); 185 static int check_for_unit_attention(struct ctlr_info *h, 186 struct CommandList *c); 187 static void check_ioctl_unit_attention(struct ctlr_info *h, 188 struct CommandList *c); 189 /* performant mode helper functions */ 190 static void calc_bucket_map(int *bucket, int num_buckets, 191 int nsgs, int *bucket_map); 192 static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h); 193 static inline u32 next_command(struct ctlr_info *h, u8 q); 194 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 195 u32 *cfg_base_addr, u64 *cfg_base_addr_index, 196 u64 *cfg_offset); 197 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 198 unsigned long *memory_bar); 199 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id); 200 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 201 int wait_for_ready); 202 static inline void finish_cmd(struct CommandList *c); 203 #define BOARD_NOT_READY 0 204 #define BOARD_READY 1 205 206 static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev) 207 { 208 unsigned long *priv = shost_priv(sdev->host); 209 return (struct ctlr_info *) *priv; 210 } 211 212 static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh) 213 { 214 unsigned long *priv = shost_priv(sh); 215 return (struct ctlr_info *) *priv; 216 } 217 218 static int check_for_unit_attention(struct ctlr_info *h, 219 struct CommandList *c) 220 { 221 if (c->err_info->SenseInfo[2] != UNIT_ATTENTION) 222 return 0; 223 224 switch (c->err_info->SenseInfo[12]) { 225 case STATE_CHANGED: 226 dev_warn(&h->pdev->dev, HPSA "%d: a state change " 227 "detected, command retried\n", h->ctlr); 228 break; 229 case LUN_FAILED: 230 dev_warn(&h->pdev->dev, HPSA "%d: LUN failure " 231 "detected, action required\n", h->ctlr); 232 break; 233 case REPORT_LUNS_CHANGED: 234 dev_warn(&h->pdev->dev, HPSA "%d: report LUN data " 235 "changed, action required\n", h->ctlr); 236 /* 237 * Note: this REPORT_LUNS_CHANGED condition only occurs on the external 238 * target (array) devices. 239 */ 240 break; 241 case POWER_OR_RESET: 242 dev_warn(&h->pdev->dev, HPSA "%d: a power on " 243 "or device reset detected\n", h->ctlr); 244 break; 245 case UNIT_ATTENTION_CLEARED: 246 dev_warn(&h->pdev->dev, HPSA "%d: unit attention " 247 "cleared by another initiator\n", h->ctlr); 248 break; 249 default: 250 dev_warn(&h->pdev->dev, HPSA "%d: unknown " 251 "unit attention detected\n", h->ctlr); 252 break; 253 } 254 return 1; 255 } 256 257 static int check_for_busy(struct ctlr_info *h, struct CommandList *c) 258 { 259 if (c->err_info->CommandStatus != CMD_TARGET_STATUS || 260 (c->err_info->ScsiStatus != SAM_STAT_BUSY && 261 c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL)) 262 return 0; 263 dev_warn(&h->pdev->dev, HPSA "device busy"); 264 return 1; 265 } 266 267 static ssize_t host_store_rescan(struct device *dev, 268 struct device_attribute *attr, 269 const char *buf, size_t count) 270 { 271 struct ctlr_info *h; 272 struct Scsi_Host *shost = class_to_shost(dev); 273 h = shost_to_hba(shost); 274 hpsa_scan_start(h->scsi_host); 275 return count; 276 } 277 278 static ssize_t host_show_firmware_revision(struct device *dev, 279 struct device_attribute *attr, char *buf) 280 { 281 struct ctlr_info *h; 282 struct Scsi_Host *shost = class_to_shost(dev); 283 unsigned char *fwrev; 284 285 h = shost_to_hba(shost); 286 if (!h->hba_inquiry_data) 287 return 0; 288 fwrev = &h->hba_inquiry_data[32]; 289 return snprintf(buf, 20, "%c%c%c%c\n", 290 fwrev[0], fwrev[1], fwrev[2], fwrev[3]); 291 } 292 293 static ssize_t host_show_commands_outstanding(struct device *dev, 294 struct device_attribute *attr, char *buf) 295 { 296 struct Scsi_Host *shost = class_to_shost(dev); 297 struct ctlr_info *h = shost_to_hba(shost); 298 299 return snprintf(buf, 20, "%d\n", h->commands_outstanding); 300 } 301 302 static ssize_t host_show_transport_mode(struct device *dev, 303 struct device_attribute *attr, char *buf) 304 { 305 struct ctlr_info *h; 306 struct Scsi_Host *shost = class_to_shost(dev); 307 308 h = shost_to_hba(shost); 309 return snprintf(buf, 20, "%s\n", 310 h->transMethod & CFGTBL_Trans_Performant ? 311 "performant" : "simple"); 312 } 313 314 /* List of controllers which cannot be hard reset on kexec with reset_devices */ 315 static u32 unresettable_controller[] = { 316 0x324a103C, /* Smart Array P712m */ 317 0x324b103C, /* SmartArray P711m */ 318 0x3223103C, /* Smart Array P800 */ 319 0x3234103C, /* Smart Array P400 */ 320 0x3235103C, /* Smart Array P400i */ 321 0x3211103C, /* Smart Array E200i */ 322 0x3212103C, /* Smart Array E200 */ 323 0x3213103C, /* Smart Array E200i */ 324 0x3214103C, /* Smart Array E200i */ 325 0x3215103C, /* Smart Array E200i */ 326 0x3237103C, /* Smart Array E500 */ 327 0x323D103C, /* Smart Array P700m */ 328 0x40800E11, /* Smart Array 5i */ 329 0x409C0E11, /* Smart Array 6400 */ 330 0x409D0E11, /* Smart Array 6400 EM */ 331 0x40700E11, /* Smart Array 5300 */ 332 0x40820E11, /* Smart Array 532 */ 333 0x40830E11, /* Smart Array 5312 */ 334 0x409A0E11, /* Smart Array 641 */ 335 0x409B0E11, /* Smart Array 642 */ 336 0x40910E11, /* Smart Array 6i */ 337 }; 338 339 /* List of controllers which cannot even be soft reset */ 340 static u32 soft_unresettable_controller[] = { 341 0x40800E11, /* Smart Array 5i */ 342 0x40700E11, /* Smart Array 5300 */ 343 0x40820E11, /* Smart Array 532 */ 344 0x40830E11, /* Smart Array 5312 */ 345 0x409A0E11, /* Smart Array 641 */ 346 0x409B0E11, /* Smart Array 642 */ 347 0x40910E11, /* Smart Array 6i */ 348 /* Exclude 640x boards. These are two pci devices in one slot 349 * which share a battery backed cache module. One controls the 350 * cache, the other accesses the cache through the one that controls 351 * it. If we reset the one controlling the cache, the other will 352 * likely not be happy. Just forbid resetting this conjoined mess. 353 * The 640x isn't really supported by hpsa anyway. 354 */ 355 0x409C0E11, /* Smart Array 6400 */ 356 0x409D0E11, /* Smart Array 6400 EM */ 357 }; 358 359 static int ctlr_is_hard_resettable(u32 board_id) 360 { 361 int i; 362 363 for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++) 364 if (unresettable_controller[i] == board_id) 365 return 0; 366 return 1; 367 } 368 369 static int ctlr_is_soft_resettable(u32 board_id) 370 { 371 int i; 372 373 for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++) 374 if (soft_unresettable_controller[i] == board_id) 375 return 0; 376 return 1; 377 } 378 379 static int ctlr_is_resettable(u32 board_id) 380 { 381 return ctlr_is_hard_resettable(board_id) || 382 ctlr_is_soft_resettable(board_id); 383 } 384 385 static ssize_t host_show_resettable(struct device *dev, 386 struct device_attribute *attr, char *buf) 387 { 388 struct ctlr_info *h; 389 struct Scsi_Host *shost = class_to_shost(dev); 390 391 h = shost_to_hba(shost); 392 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id)); 393 } 394 395 static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[]) 396 { 397 return (scsi3addr[3] & 0xC0) == 0x40; 398 } 399 400 static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG", 401 "1(ADM)", "UNKNOWN" 402 }; 403 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1) 404 405 static ssize_t raid_level_show(struct device *dev, 406 struct device_attribute *attr, char *buf) 407 { 408 ssize_t l = 0; 409 unsigned char rlevel; 410 struct ctlr_info *h; 411 struct scsi_device *sdev; 412 struct hpsa_scsi_dev_t *hdev; 413 unsigned long flags; 414 415 sdev = to_scsi_device(dev); 416 h = sdev_to_hba(sdev); 417 spin_lock_irqsave(&h->lock, flags); 418 hdev = sdev->hostdata; 419 if (!hdev) { 420 spin_unlock_irqrestore(&h->lock, flags); 421 return -ENODEV; 422 } 423 424 /* Is this even a logical drive? */ 425 if (!is_logical_dev_addr_mode(hdev->scsi3addr)) { 426 spin_unlock_irqrestore(&h->lock, flags); 427 l = snprintf(buf, PAGE_SIZE, "N/A\n"); 428 return l; 429 } 430 431 rlevel = hdev->raid_level; 432 spin_unlock_irqrestore(&h->lock, flags); 433 if (rlevel > RAID_UNKNOWN) 434 rlevel = RAID_UNKNOWN; 435 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]); 436 return l; 437 } 438 439 static ssize_t lunid_show(struct device *dev, 440 struct device_attribute *attr, char *buf) 441 { 442 struct ctlr_info *h; 443 struct scsi_device *sdev; 444 struct hpsa_scsi_dev_t *hdev; 445 unsigned long flags; 446 unsigned char lunid[8]; 447 448 sdev = to_scsi_device(dev); 449 h = sdev_to_hba(sdev); 450 spin_lock_irqsave(&h->lock, flags); 451 hdev = sdev->hostdata; 452 if (!hdev) { 453 spin_unlock_irqrestore(&h->lock, flags); 454 return -ENODEV; 455 } 456 memcpy(lunid, hdev->scsi3addr, sizeof(lunid)); 457 spin_unlock_irqrestore(&h->lock, flags); 458 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 459 lunid[0], lunid[1], lunid[2], lunid[3], 460 lunid[4], lunid[5], lunid[6], lunid[7]); 461 } 462 463 static ssize_t unique_id_show(struct device *dev, 464 struct device_attribute *attr, char *buf) 465 { 466 struct ctlr_info *h; 467 struct scsi_device *sdev; 468 struct hpsa_scsi_dev_t *hdev; 469 unsigned long flags; 470 unsigned char sn[16]; 471 472 sdev = to_scsi_device(dev); 473 h = sdev_to_hba(sdev); 474 spin_lock_irqsave(&h->lock, flags); 475 hdev = sdev->hostdata; 476 if (!hdev) { 477 spin_unlock_irqrestore(&h->lock, flags); 478 return -ENODEV; 479 } 480 memcpy(sn, hdev->device_id, sizeof(sn)); 481 spin_unlock_irqrestore(&h->lock, flags); 482 return snprintf(buf, 16 * 2 + 2, 483 "%02X%02X%02X%02X%02X%02X%02X%02X" 484 "%02X%02X%02X%02X%02X%02X%02X%02X\n", 485 sn[0], sn[1], sn[2], sn[3], 486 sn[4], sn[5], sn[6], sn[7], 487 sn[8], sn[9], sn[10], sn[11], 488 sn[12], sn[13], sn[14], sn[15]); 489 } 490 491 static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL); 492 static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL); 493 static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL); 494 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan); 495 static DEVICE_ATTR(firmware_revision, S_IRUGO, 496 host_show_firmware_revision, NULL); 497 static DEVICE_ATTR(commands_outstanding, S_IRUGO, 498 host_show_commands_outstanding, NULL); 499 static DEVICE_ATTR(transport_mode, S_IRUGO, 500 host_show_transport_mode, NULL); 501 static DEVICE_ATTR(resettable, S_IRUGO, 502 host_show_resettable, NULL); 503 504 static struct device_attribute *hpsa_sdev_attrs[] = { 505 &dev_attr_raid_level, 506 &dev_attr_lunid, 507 &dev_attr_unique_id, 508 NULL, 509 }; 510 511 static struct device_attribute *hpsa_shost_attrs[] = { 512 &dev_attr_rescan, 513 &dev_attr_firmware_revision, 514 &dev_attr_commands_outstanding, 515 &dev_attr_transport_mode, 516 &dev_attr_resettable, 517 NULL, 518 }; 519 520 static struct scsi_host_template hpsa_driver_template = { 521 .module = THIS_MODULE, 522 .name = HPSA, 523 .proc_name = HPSA, 524 .queuecommand = hpsa_scsi_queue_command, 525 .scan_start = hpsa_scan_start, 526 .scan_finished = hpsa_scan_finished, 527 .change_queue_depth = hpsa_change_queue_depth, 528 .this_id = -1, 529 .use_clustering = ENABLE_CLUSTERING, 530 .eh_abort_handler = hpsa_eh_abort_handler, 531 .eh_device_reset_handler = hpsa_eh_device_reset_handler, 532 .ioctl = hpsa_ioctl, 533 .slave_alloc = hpsa_slave_alloc, 534 .slave_destroy = hpsa_slave_destroy, 535 #ifdef CONFIG_COMPAT 536 .compat_ioctl = hpsa_compat_ioctl, 537 #endif 538 .sdev_attrs = hpsa_sdev_attrs, 539 .shost_attrs = hpsa_shost_attrs, 540 .max_sectors = 8192, 541 }; 542 543 544 /* Enqueuing and dequeuing functions for cmdlists. */ 545 static inline void addQ(struct list_head *list, struct CommandList *c) 546 { 547 list_add_tail(&c->list, list); 548 } 549 550 static inline u32 next_command(struct ctlr_info *h, u8 q) 551 { 552 u32 a; 553 struct reply_pool *rq = &h->reply_queue[q]; 554 unsigned long flags; 555 556 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant))) 557 return h->access.command_completed(h, q); 558 559 if ((rq->head[rq->current_entry] & 1) == rq->wraparound) { 560 a = rq->head[rq->current_entry]; 561 rq->current_entry++; 562 spin_lock_irqsave(&h->lock, flags); 563 h->commands_outstanding--; 564 spin_unlock_irqrestore(&h->lock, flags); 565 } else { 566 a = FIFO_EMPTY; 567 } 568 /* Check for wraparound */ 569 if (rq->current_entry == h->max_commands) { 570 rq->current_entry = 0; 571 rq->wraparound ^= 1; 572 } 573 return a; 574 } 575 576 /* set_performant_mode: Modify the tag for cciss performant 577 * set bit 0 for pull model, bits 3-1 for block fetch 578 * register number 579 */ 580 static void set_performant_mode(struct ctlr_info *h, struct CommandList *c) 581 { 582 if (likely(h->transMethod & CFGTBL_Trans_Performant)) { 583 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1); 584 if (likely(h->msix_vector)) 585 c->Header.ReplyQueue = 586 raw_smp_processor_id() % h->nreply_queues; 587 } 588 } 589 590 static int is_firmware_flash_cmd(u8 *cdb) 591 { 592 return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE; 593 } 594 595 /* 596 * During firmware flash, the heartbeat register may not update as frequently 597 * as it should. So we dial down lockup detection during firmware flash. and 598 * dial it back up when firmware flash completes. 599 */ 600 #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ) 601 #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ) 602 static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h, 603 struct CommandList *c) 604 { 605 if (!is_firmware_flash_cmd(c->Request.CDB)) 606 return; 607 atomic_inc(&h->firmware_flash_in_progress); 608 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH; 609 } 610 611 static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h, 612 struct CommandList *c) 613 { 614 if (is_firmware_flash_cmd(c->Request.CDB) && 615 atomic_dec_and_test(&h->firmware_flash_in_progress)) 616 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 617 } 618 619 static void enqueue_cmd_and_start_io(struct ctlr_info *h, 620 struct CommandList *c) 621 { 622 unsigned long flags; 623 624 set_performant_mode(h, c); 625 dial_down_lockup_detection_during_fw_flash(h, c); 626 spin_lock_irqsave(&h->lock, flags); 627 addQ(&h->reqQ, c); 628 h->Qdepth++; 629 spin_unlock_irqrestore(&h->lock, flags); 630 start_io(h); 631 } 632 633 static inline void removeQ(struct CommandList *c) 634 { 635 if (WARN_ON(list_empty(&c->list))) 636 return; 637 list_del_init(&c->list); 638 } 639 640 static inline int is_hba_lunid(unsigned char scsi3addr[]) 641 { 642 return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0; 643 } 644 645 static inline int is_scsi_rev_5(struct ctlr_info *h) 646 { 647 if (!h->hba_inquiry_data) 648 return 0; 649 if ((h->hba_inquiry_data[2] & 0x07) == 5) 650 return 1; 651 return 0; 652 } 653 654 static int hpsa_find_target_lun(struct ctlr_info *h, 655 unsigned char scsi3addr[], int bus, int *target, int *lun) 656 { 657 /* finds an unused bus, target, lun for a new physical device 658 * assumes h->devlock is held 659 */ 660 int i, found = 0; 661 DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES); 662 663 bitmap_zero(lun_taken, HPSA_MAX_DEVICES); 664 665 for (i = 0; i < h->ndevices; i++) { 666 if (h->dev[i]->bus == bus && h->dev[i]->target != -1) 667 __set_bit(h->dev[i]->target, lun_taken); 668 } 669 670 i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES); 671 if (i < HPSA_MAX_DEVICES) { 672 /* *bus = 1; */ 673 *target = i; 674 *lun = 0; 675 found = 1; 676 } 677 return !found; 678 } 679 680 /* Add an entry into h->dev[] array. */ 681 static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno, 682 struct hpsa_scsi_dev_t *device, 683 struct hpsa_scsi_dev_t *added[], int *nadded) 684 { 685 /* assumes h->devlock is held */ 686 int n = h->ndevices; 687 int i; 688 unsigned char addr1[8], addr2[8]; 689 struct hpsa_scsi_dev_t *sd; 690 691 if (n >= HPSA_MAX_DEVICES) { 692 dev_err(&h->pdev->dev, "too many devices, some will be " 693 "inaccessible.\n"); 694 return -1; 695 } 696 697 /* physical devices do not have lun or target assigned until now. */ 698 if (device->lun != -1) 699 /* Logical device, lun is already assigned. */ 700 goto lun_assigned; 701 702 /* If this device a non-zero lun of a multi-lun device 703 * byte 4 of the 8-byte LUN addr will contain the logical 704 * unit no, zero otherise. 705 */ 706 if (device->scsi3addr[4] == 0) { 707 /* This is not a non-zero lun of a multi-lun device */ 708 if (hpsa_find_target_lun(h, device->scsi3addr, 709 device->bus, &device->target, &device->lun) != 0) 710 return -1; 711 goto lun_assigned; 712 } 713 714 /* This is a non-zero lun of a multi-lun device. 715 * Search through our list and find the device which 716 * has the same 8 byte LUN address, excepting byte 4. 717 * Assign the same bus and target for this new LUN. 718 * Use the logical unit number from the firmware. 719 */ 720 memcpy(addr1, device->scsi3addr, 8); 721 addr1[4] = 0; 722 for (i = 0; i < n; i++) { 723 sd = h->dev[i]; 724 memcpy(addr2, sd->scsi3addr, 8); 725 addr2[4] = 0; 726 /* differ only in byte 4? */ 727 if (memcmp(addr1, addr2, 8) == 0) { 728 device->bus = sd->bus; 729 device->target = sd->target; 730 device->lun = device->scsi3addr[4]; 731 break; 732 } 733 } 734 if (device->lun == -1) { 735 dev_warn(&h->pdev->dev, "physical device with no LUN=0," 736 " suspect firmware bug or unsupported hardware " 737 "configuration.\n"); 738 return -1; 739 } 740 741 lun_assigned: 742 743 h->dev[n] = device; 744 h->ndevices++; 745 added[*nadded] = device; 746 (*nadded)++; 747 748 /* initially, (before registering with scsi layer) we don't 749 * know our hostno and we don't want to print anything first 750 * time anyway (the scsi layer's inquiries will show that info) 751 */ 752 /* if (hostno != -1) */ 753 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n", 754 scsi_device_type(device->devtype), hostno, 755 device->bus, device->target, device->lun); 756 return 0; 757 } 758 759 /* Update an entry in h->dev[] array. */ 760 static void hpsa_scsi_update_entry(struct ctlr_info *h, int hostno, 761 int entry, struct hpsa_scsi_dev_t *new_entry) 762 { 763 /* assumes h->devlock is held */ 764 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 765 766 /* Raid level changed. */ 767 h->dev[entry]->raid_level = new_entry->raid_level; 768 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d updated.\n", 769 scsi_device_type(new_entry->devtype), hostno, new_entry->bus, 770 new_entry->target, new_entry->lun); 771 } 772 773 /* Replace an entry from h->dev[] array. */ 774 static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno, 775 int entry, struct hpsa_scsi_dev_t *new_entry, 776 struct hpsa_scsi_dev_t *added[], int *nadded, 777 struct hpsa_scsi_dev_t *removed[], int *nremoved) 778 { 779 /* assumes h->devlock is held */ 780 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 781 removed[*nremoved] = h->dev[entry]; 782 (*nremoved)++; 783 784 /* 785 * New physical devices won't have target/lun assigned yet 786 * so we need to preserve the values in the slot we are replacing. 787 */ 788 if (new_entry->target == -1) { 789 new_entry->target = h->dev[entry]->target; 790 new_entry->lun = h->dev[entry]->lun; 791 } 792 793 h->dev[entry] = new_entry; 794 added[*nadded] = new_entry; 795 (*nadded)++; 796 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n", 797 scsi_device_type(new_entry->devtype), hostno, new_entry->bus, 798 new_entry->target, new_entry->lun); 799 } 800 801 /* Remove an entry from h->dev[] array. */ 802 static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry, 803 struct hpsa_scsi_dev_t *removed[], int *nremoved) 804 { 805 /* assumes h->devlock is held */ 806 int i; 807 struct hpsa_scsi_dev_t *sd; 808 809 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 810 811 sd = h->dev[entry]; 812 removed[*nremoved] = h->dev[entry]; 813 (*nremoved)++; 814 815 for (i = entry; i < h->ndevices-1; i++) 816 h->dev[i] = h->dev[i+1]; 817 h->ndevices--; 818 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n", 819 scsi_device_type(sd->devtype), hostno, sd->bus, sd->target, 820 sd->lun); 821 } 822 823 #define SCSI3ADDR_EQ(a, b) ( \ 824 (a)[7] == (b)[7] && \ 825 (a)[6] == (b)[6] && \ 826 (a)[5] == (b)[5] && \ 827 (a)[4] == (b)[4] && \ 828 (a)[3] == (b)[3] && \ 829 (a)[2] == (b)[2] && \ 830 (a)[1] == (b)[1] && \ 831 (a)[0] == (b)[0]) 832 833 static void fixup_botched_add(struct ctlr_info *h, 834 struct hpsa_scsi_dev_t *added) 835 { 836 /* called when scsi_add_device fails in order to re-adjust 837 * h->dev[] to match the mid layer's view. 838 */ 839 unsigned long flags; 840 int i, j; 841 842 spin_lock_irqsave(&h->lock, flags); 843 for (i = 0; i < h->ndevices; i++) { 844 if (h->dev[i] == added) { 845 for (j = i; j < h->ndevices-1; j++) 846 h->dev[j] = h->dev[j+1]; 847 h->ndevices--; 848 break; 849 } 850 } 851 spin_unlock_irqrestore(&h->lock, flags); 852 kfree(added); 853 } 854 855 static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1, 856 struct hpsa_scsi_dev_t *dev2) 857 { 858 /* we compare everything except lun and target as these 859 * are not yet assigned. Compare parts likely 860 * to differ first 861 */ 862 if (memcmp(dev1->scsi3addr, dev2->scsi3addr, 863 sizeof(dev1->scsi3addr)) != 0) 864 return 0; 865 if (memcmp(dev1->device_id, dev2->device_id, 866 sizeof(dev1->device_id)) != 0) 867 return 0; 868 if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0) 869 return 0; 870 if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0) 871 return 0; 872 if (dev1->devtype != dev2->devtype) 873 return 0; 874 if (dev1->bus != dev2->bus) 875 return 0; 876 return 1; 877 } 878 879 static inline int device_updated(struct hpsa_scsi_dev_t *dev1, 880 struct hpsa_scsi_dev_t *dev2) 881 { 882 /* Device attributes that can change, but don't mean 883 * that the device is a different device, nor that the OS 884 * needs to be told anything about the change. 885 */ 886 if (dev1->raid_level != dev2->raid_level) 887 return 1; 888 return 0; 889 } 890 891 /* Find needle in haystack. If exact match found, return DEVICE_SAME, 892 * and return needle location in *index. If scsi3addr matches, but not 893 * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle 894 * location in *index. 895 * In the case of a minor device attribute change, such as RAID level, just 896 * return DEVICE_UPDATED, along with the updated device's location in index. 897 * If needle not found, return DEVICE_NOT_FOUND. 898 */ 899 static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle, 900 struct hpsa_scsi_dev_t *haystack[], int haystack_size, 901 int *index) 902 { 903 int i; 904 #define DEVICE_NOT_FOUND 0 905 #define DEVICE_CHANGED 1 906 #define DEVICE_SAME 2 907 #define DEVICE_UPDATED 3 908 for (i = 0; i < haystack_size; i++) { 909 if (haystack[i] == NULL) /* previously removed. */ 910 continue; 911 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) { 912 *index = i; 913 if (device_is_the_same(needle, haystack[i])) { 914 if (device_updated(needle, haystack[i])) 915 return DEVICE_UPDATED; 916 return DEVICE_SAME; 917 } else { 918 return DEVICE_CHANGED; 919 } 920 } 921 } 922 *index = -1; 923 return DEVICE_NOT_FOUND; 924 } 925 926 static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno, 927 struct hpsa_scsi_dev_t *sd[], int nsds) 928 { 929 /* sd contains scsi3 addresses and devtypes, and inquiry 930 * data. This function takes what's in sd to be the current 931 * reality and updates h->dev[] to reflect that reality. 932 */ 933 int i, entry, device_change, changes = 0; 934 struct hpsa_scsi_dev_t *csd; 935 unsigned long flags; 936 struct hpsa_scsi_dev_t **added, **removed; 937 int nadded, nremoved; 938 struct Scsi_Host *sh = NULL; 939 940 added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL); 941 removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL); 942 943 if (!added || !removed) { 944 dev_warn(&h->pdev->dev, "out of memory in " 945 "adjust_hpsa_scsi_table\n"); 946 goto free_and_out; 947 } 948 949 spin_lock_irqsave(&h->devlock, flags); 950 951 /* find any devices in h->dev[] that are not in 952 * sd[] and remove them from h->dev[], and for any 953 * devices which have changed, remove the old device 954 * info and add the new device info. 955 * If minor device attributes change, just update 956 * the existing device structure. 957 */ 958 i = 0; 959 nremoved = 0; 960 nadded = 0; 961 while (i < h->ndevices) { 962 csd = h->dev[i]; 963 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry); 964 if (device_change == DEVICE_NOT_FOUND) { 965 changes++; 966 hpsa_scsi_remove_entry(h, hostno, i, 967 removed, &nremoved); 968 continue; /* remove ^^^, hence i not incremented */ 969 } else if (device_change == DEVICE_CHANGED) { 970 changes++; 971 hpsa_scsi_replace_entry(h, hostno, i, sd[entry], 972 added, &nadded, removed, &nremoved); 973 /* Set it to NULL to prevent it from being freed 974 * at the bottom of hpsa_update_scsi_devices() 975 */ 976 sd[entry] = NULL; 977 } else if (device_change == DEVICE_UPDATED) { 978 hpsa_scsi_update_entry(h, hostno, i, sd[entry]); 979 } 980 i++; 981 } 982 983 /* Now, make sure every device listed in sd[] is also 984 * listed in h->dev[], adding them if they aren't found 985 */ 986 987 for (i = 0; i < nsds; i++) { 988 if (!sd[i]) /* if already added above. */ 989 continue; 990 device_change = hpsa_scsi_find_entry(sd[i], h->dev, 991 h->ndevices, &entry); 992 if (device_change == DEVICE_NOT_FOUND) { 993 changes++; 994 if (hpsa_scsi_add_entry(h, hostno, sd[i], 995 added, &nadded) != 0) 996 break; 997 sd[i] = NULL; /* prevent from being freed later. */ 998 } else if (device_change == DEVICE_CHANGED) { 999 /* should never happen... */ 1000 changes++; 1001 dev_warn(&h->pdev->dev, 1002 "device unexpectedly changed.\n"); 1003 /* but if it does happen, we just ignore that device */ 1004 } 1005 } 1006 spin_unlock_irqrestore(&h->devlock, flags); 1007 1008 /* Don't notify scsi mid layer of any changes the first time through 1009 * (or if there are no changes) scsi_scan_host will do it later the 1010 * first time through. 1011 */ 1012 if (hostno == -1 || !changes) 1013 goto free_and_out; 1014 1015 sh = h->scsi_host; 1016 /* Notify scsi mid layer of any removed devices */ 1017 for (i = 0; i < nremoved; i++) { 1018 struct scsi_device *sdev = 1019 scsi_device_lookup(sh, removed[i]->bus, 1020 removed[i]->target, removed[i]->lun); 1021 if (sdev != NULL) { 1022 scsi_remove_device(sdev); 1023 scsi_device_put(sdev); 1024 } else { 1025 /* We don't expect to get here. 1026 * future cmds to this device will get selection 1027 * timeout as if the device was gone. 1028 */ 1029 dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d " 1030 " for removal.", hostno, removed[i]->bus, 1031 removed[i]->target, removed[i]->lun); 1032 } 1033 kfree(removed[i]); 1034 removed[i] = NULL; 1035 } 1036 1037 /* Notify scsi mid layer of any added devices */ 1038 for (i = 0; i < nadded; i++) { 1039 if (scsi_add_device(sh, added[i]->bus, 1040 added[i]->target, added[i]->lun) == 0) 1041 continue; 1042 dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, " 1043 "device not added.\n", hostno, added[i]->bus, 1044 added[i]->target, added[i]->lun); 1045 /* now we have to remove it from h->dev, 1046 * since it didn't get added to scsi mid layer 1047 */ 1048 fixup_botched_add(h, added[i]); 1049 } 1050 1051 free_and_out: 1052 kfree(added); 1053 kfree(removed); 1054 } 1055 1056 /* 1057 * Lookup bus/target/lun and retrun corresponding struct hpsa_scsi_dev_t * 1058 * Assume's h->devlock is held. 1059 */ 1060 static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h, 1061 int bus, int target, int lun) 1062 { 1063 int i; 1064 struct hpsa_scsi_dev_t *sd; 1065 1066 for (i = 0; i < h->ndevices; i++) { 1067 sd = h->dev[i]; 1068 if (sd->bus == bus && sd->target == target && sd->lun == lun) 1069 return sd; 1070 } 1071 return NULL; 1072 } 1073 1074 /* link sdev->hostdata to our per-device structure. */ 1075 static int hpsa_slave_alloc(struct scsi_device *sdev) 1076 { 1077 struct hpsa_scsi_dev_t *sd; 1078 unsigned long flags; 1079 struct ctlr_info *h; 1080 1081 h = sdev_to_hba(sdev); 1082 spin_lock_irqsave(&h->devlock, flags); 1083 sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev), 1084 sdev_id(sdev), sdev->lun); 1085 if (sd != NULL) 1086 sdev->hostdata = sd; 1087 spin_unlock_irqrestore(&h->devlock, flags); 1088 return 0; 1089 } 1090 1091 static void hpsa_slave_destroy(struct scsi_device *sdev) 1092 { 1093 /* nothing to do. */ 1094 } 1095 1096 static void hpsa_free_sg_chain_blocks(struct ctlr_info *h) 1097 { 1098 int i; 1099 1100 if (!h->cmd_sg_list) 1101 return; 1102 for (i = 0; i < h->nr_cmds; i++) { 1103 kfree(h->cmd_sg_list[i]); 1104 h->cmd_sg_list[i] = NULL; 1105 } 1106 kfree(h->cmd_sg_list); 1107 h->cmd_sg_list = NULL; 1108 } 1109 1110 static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h) 1111 { 1112 int i; 1113 1114 if (h->chainsize <= 0) 1115 return 0; 1116 1117 h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds, 1118 GFP_KERNEL); 1119 if (!h->cmd_sg_list) 1120 return -ENOMEM; 1121 for (i = 0; i < h->nr_cmds; i++) { 1122 h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) * 1123 h->chainsize, GFP_KERNEL); 1124 if (!h->cmd_sg_list[i]) 1125 goto clean; 1126 } 1127 return 0; 1128 1129 clean: 1130 hpsa_free_sg_chain_blocks(h); 1131 return -ENOMEM; 1132 } 1133 1134 static int hpsa_map_sg_chain_block(struct ctlr_info *h, 1135 struct CommandList *c) 1136 { 1137 struct SGDescriptor *chain_sg, *chain_block; 1138 u64 temp64; 1139 1140 chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 1141 chain_block = h->cmd_sg_list[c->cmdindex]; 1142 chain_sg->Ext = HPSA_SG_CHAIN; 1143 chain_sg->Len = sizeof(*chain_sg) * 1144 (c->Header.SGTotal - h->max_cmd_sg_entries); 1145 temp64 = pci_map_single(h->pdev, chain_block, chain_sg->Len, 1146 PCI_DMA_TODEVICE); 1147 if (dma_mapping_error(&h->pdev->dev, temp64)) { 1148 /* prevent subsequent unmapping */ 1149 chain_sg->Addr.lower = 0; 1150 chain_sg->Addr.upper = 0; 1151 return -1; 1152 } 1153 chain_sg->Addr.lower = (u32) (temp64 & 0x0FFFFFFFFULL); 1154 chain_sg->Addr.upper = (u32) ((temp64 >> 32) & 0x0FFFFFFFFULL); 1155 return 0; 1156 } 1157 1158 static void hpsa_unmap_sg_chain_block(struct ctlr_info *h, 1159 struct CommandList *c) 1160 { 1161 struct SGDescriptor *chain_sg; 1162 union u64bit temp64; 1163 1164 if (c->Header.SGTotal <= h->max_cmd_sg_entries) 1165 return; 1166 1167 chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 1168 temp64.val32.lower = chain_sg->Addr.lower; 1169 temp64.val32.upper = chain_sg->Addr.upper; 1170 pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE); 1171 } 1172 1173 static void complete_scsi_command(struct CommandList *cp) 1174 { 1175 struct scsi_cmnd *cmd; 1176 struct ctlr_info *h; 1177 struct ErrorInfo *ei; 1178 1179 unsigned char sense_key; 1180 unsigned char asc; /* additional sense code */ 1181 unsigned char ascq; /* additional sense code qualifier */ 1182 unsigned long sense_data_size; 1183 1184 ei = cp->err_info; 1185 cmd = (struct scsi_cmnd *) cp->scsi_cmd; 1186 h = cp->h; 1187 1188 scsi_dma_unmap(cmd); /* undo the DMA mappings */ 1189 if (cp->Header.SGTotal > h->max_cmd_sg_entries) 1190 hpsa_unmap_sg_chain_block(h, cp); 1191 1192 cmd->result = (DID_OK << 16); /* host byte */ 1193 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 1194 cmd->result |= ei->ScsiStatus; 1195 1196 /* copy the sense data whether we need to or not. */ 1197 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo)) 1198 sense_data_size = SCSI_SENSE_BUFFERSIZE; 1199 else 1200 sense_data_size = sizeof(ei->SenseInfo); 1201 if (ei->SenseLen < sense_data_size) 1202 sense_data_size = ei->SenseLen; 1203 1204 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size); 1205 scsi_set_resid(cmd, ei->ResidualCnt); 1206 1207 if (ei->CommandStatus == 0) { 1208 cmd_free(h, cp); 1209 cmd->scsi_done(cmd); 1210 return; 1211 } 1212 1213 /* an error has occurred */ 1214 switch (ei->CommandStatus) { 1215 1216 case CMD_TARGET_STATUS: 1217 if (ei->ScsiStatus) { 1218 /* Get sense key */ 1219 sense_key = 0xf & ei->SenseInfo[2]; 1220 /* Get additional sense code */ 1221 asc = ei->SenseInfo[12]; 1222 /* Get addition sense code qualifier */ 1223 ascq = ei->SenseInfo[13]; 1224 } 1225 1226 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) { 1227 if (check_for_unit_attention(h, cp)) { 1228 cmd->result = DID_SOFT_ERROR << 16; 1229 break; 1230 } 1231 if (sense_key == ILLEGAL_REQUEST) { 1232 /* 1233 * SCSI REPORT_LUNS is commonly unsupported on 1234 * Smart Array. Suppress noisy complaint. 1235 */ 1236 if (cp->Request.CDB[0] == REPORT_LUNS) 1237 break; 1238 1239 /* If ASC/ASCQ indicate Logical Unit 1240 * Not Supported condition, 1241 */ 1242 if ((asc == 0x25) && (ascq == 0x0)) { 1243 dev_warn(&h->pdev->dev, "cp %p " 1244 "has check condition\n", cp); 1245 break; 1246 } 1247 } 1248 1249 if (sense_key == NOT_READY) { 1250 /* If Sense is Not Ready, Logical Unit 1251 * Not ready, Manual Intervention 1252 * required 1253 */ 1254 if ((asc == 0x04) && (ascq == 0x03)) { 1255 dev_warn(&h->pdev->dev, "cp %p " 1256 "has check condition: unit " 1257 "not ready, manual " 1258 "intervention required\n", cp); 1259 break; 1260 } 1261 } 1262 if (sense_key == ABORTED_COMMAND) { 1263 /* Aborted command is retryable */ 1264 dev_warn(&h->pdev->dev, "cp %p " 1265 "has check condition: aborted command: " 1266 "ASC: 0x%x, ASCQ: 0x%x\n", 1267 cp, asc, ascq); 1268 cmd->result = DID_SOFT_ERROR << 16; 1269 break; 1270 } 1271 /* Must be some other type of check condition */ 1272 dev_dbg(&h->pdev->dev, "cp %p has check condition: " 1273 "unknown type: " 1274 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, " 1275 "Returning result: 0x%x, " 1276 "cmd=[%02x %02x %02x %02x %02x " 1277 "%02x %02x %02x %02x %02x %02x " 1278 "%02x %02x %02x %02x %02x]\n", 1279 cp, sense_key, asc, ascq, 1280 cmd->result, 1281 cmd->cmnd[0], cmd->cmnd[1], 1282 cmd->cmnd[2], cmd->cmnd[3], 1283 cmd->cmnd[4], cmd->cmnd[5], 1284 cmd->cmnd[6], cmd->cmnd[7], 1285 cmd->cmnd[8], cmd->cmnd[9], 1286 cmd->cmnd[10], cmd->cmnd[11], 1287 cmd->cmnd[12], cmd->cmnd[13], 1288 cmd->cmnd[14], cmd->cmnd[15]); 1289 break; 1290 } 1291 1292 1293 /* Problem was not a check condition 1294 * Pass it up to the upper layers... 1295 */ 1296 if (ei->ScsiStatus) { 1297 dev_warn(&h->pdev->dev, "cp %p has status 0x%x " 1298 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, " 1299 "Returning result: 0x%x\n", 1300 cp, ei->ScsiStatus, 1301 sense_key, asc, ascq, 1302 cmd->result); 1303 } else { /* scsi status is zero??? How??? */ 1304 dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. " 1305 "Returning no connection.\n", cp), 1306 1307 /* Ordinarily, this case should never happen, 1308 * but there is a bug in some released firmware 1309 * revisions that allows it to happen if, for 1310 * example, a 4100 backplane loses power and 1311 * the tape drive is in it. We assume that 1312 * it's a fatal error of some kind because we 1313 * can't show that it wasn't. We will make it 1314 * look like selection timeout since that is 1315 * the most common reason for this to occur, 1316 * and it's severe enough. 1317 */ 1318 1319 cmd->result = DID_NO_CONNECT << 16; 1320 } 1321 break; 1322 1323 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 1324 break; 1325 case CMD_DATA_OVERRUN: 1326 dev_warn(&h->pdev->dev, "cp %p has" 1327 " completed with data overrun " 1328 "reported\n", cp); 1329 break; 1330 case CMD_INVALID: { 1331 /* print_bytes(cp, sizeof(*cp), 1, 0); 1332 print_cmd(cp); */ 1333 /* We get CMD_INVALID if you address a non-existent device 1334 * instead of a selection timeout (no response). You will 1335 * see this if you yank out a drive, then try to access it. 1336 * This is kind of a shame because it means that any other 1337 * CMD_INVALID (e.g. driver bug) will get interpreted as a 1338 * missing target. */ 1339 cmd->result = DID_NO_CONNECT << 16; 1340 } 1341 break; 1342 case CMD_PROTOCOL_ERR: 1343 cmd->result = DID_ERROR << 16; 1344 dev_warn(&h->pdev->dev, "cp %p has " 1345 "protocol error\n", cp); 1346 break; 1347 case CMD_HARDWARE_ERR: 1348 cmd->result = DID_ERROR << 16; 1349 dev_warn(&h->pdev->dev, "cp %p had hardware error\n", cp); 1350 break; 1351 case CMD_CONNECTION_LOST: 1352 cmd->result = DID_ERROR << 16; 1353 dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp); 1354 break; 1355 case CMD_ABORTED: 1356 cmd->result = DID_ABORT << 16; 1357 dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n", 1358 cp, ei->ScsiStatus); 1359 break; 1360 case CMD_ABORT_FAILED: 1361 cmd->result = DID_ERROR << 16; 1362 dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp); 1363 break; 1364 case CMD_UNSOLICITED_ABORT: 1365 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */ 1366 dev_warn(&h->pdev->dev, "cp %p aborted due to an unsolicited " 1367 "abort\n", cp); 1368 break; 1369 case CMD_TIMEOUT: 1370 cmd->result = DID_TIME_OUT << 16; 1371 dev_warn(&h->pdev->dev, "cp %p timedout\n", cp); 1372 break; 1373 case CMD_UNABORTABLE: 1374 cmd->result = DID_ERROR << 16; 1375 dev_warn(&h->pdev->dev, "Command unabortable\n"); 1376 break; 1377 default: 1378 cmd->result = DID_ERROR << 16; 1379 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n", 1380 cp, ei->CommandStatus); 1381 } 1382 cmd_free(h, cp); 1383 cmd->scsi_done(cmd); 1384 } 1385 1386 static void hpsa_pci_unmap(struct pci_dev *pdev, 1387 struct CommandList *c, int sg_used, int data_direction) 1388 { 1389 int i; 1390 union u64bit addr64; 1391 1392 for (i = 0; i < sg_used; i++) { 1393 addr64.val32.lower = c->SG[i].Addr.lower; 1394 addr64.val32.upper = c->SG[i].Addr.upper; 1395 pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len, 1396 data_direction); 1397 } 1398 } 1399 1400 static int hpsa_map_one(struct pci_dev *pdev, 1401 struct CommandList *cp, 1402 unsigned char *buf, 1403 size_t buflen, 1404 int data_direction) 1405 { 1406 u64 addr64; 1407 1408 if (buflen == 0 || data_direction == PCI_DMA_NONE) { 1409 cp->Header.SGList = 0; 1410 cp->Header.SGTotal = 0; 1411 return 0; 1412 } 1413 1414 addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction); 1415 if (dma_mapping_error(&pdev->dev, addr64)) { 1416 /* Prevent subsequent unmap of something never mapped */ 1417 cp->Header.SGList = 0; 1418 cp->Header.SGTotal = 0; 1419 return -1; 1420 } 1421 cp->SG[0].Addr.lower = 1422 (u32) (addr64 & (u64) 0x00000000FFFFFFFF); 1423 cp->SG[0].Addr.upper = 1424 (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF); 1425 cp->SG[0].Len = buflen; 1426 cp->Header.SGList = (u8) 1; /* no. SGs contig in this cmd */ 1427 cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */ 1428 return 0; 1429 } 1430 1431 static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h, 1432 struct CommandList *c) 1433 { 1434 DECLARE_COMPLETION_ONSTACK(wait); 1435 1436 c->waiting = &wait; 1437 enqueue_cmd_and_start_io(h, c); 1438 wait_for_completion(&wait); 1439 } 1440 1441 static void hpsa_scsi_do_simple_cmd_core_if_no_lockup(struct ctlr_info *h, 1442 struct CommandList *c) 1443 { 1444 unsigned long flags; 1445 1446 /* If controller lockup detected, fake a hardware error. */ 1447 spin_lock_irqsave(&h->lock, flags); 1448 if (unlikely(h->lockup_detected)) { 1449 spin_unlock_irqrestore(&h->lock, flags); 1450 c->err_info->CommandStatus = CMD_HARDWARE_ERR; 1451 } else { 1452 spin_unlock_irqrestore(&h->lock, flags); 1453 hpsa_scsi_do_simple_cmd_core(h, c); 1454 } 1455 } 1456 1457 #define MAX_DRIVER_CMD_RETRIES 25 1458 static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h, 1459 struct CommandList *c, int data_direction) 1460 { 1461 int backoff_time = 10, retry_count = 0; 1462 1463 do { 1464 memset(c->err_info, 0, sizeof(*c->err_info)); 1465 hpsa_scsi_do_simple_cmd_core(h, c); 1466 retry_count++; 1467 if (retry_count > 3) { 1468 msleep(backoff_time); 1469 if (backoff_time < 1000) 1470 backoff_time *= 2; 1471 } 1472 } while ((check_for_unit_attention(h, c) || 1473 check_for_busy(h, c)) && 1474 retry_count <= MAX_DRIVER_CMD_RETRIES); 1475 hpsa_pci_unmap(h->pdev, c, 1, data_direction); 1476 } 1477 1478 static void hpsa_scsi_interpret_error(struct CommandList *cp) 1479 { 1480 struct ErrorInfo *ei; 1481 struct device *d = &cp->h->pdev->dev; 1482 1483 ei = cp->err_info; 1484 switch (ei->CommandStatus) { 1485 case CMD_TARGET_STATUS: 1486 dev_warn(d, "cmd %p has completed with errors\n", cp); 1487 dev_warn(d, "cmd %p has SCSI Status = %x\n", cp, 1488 ei->ScsiStatus); 1489 if (ei->ScsiStatus == 0) 1490 dev_warn(d, "SCSI status is abnormally zero. " 1491 "(probably indicates selection timeout " 1492 "reported incorrectly due to a known " 1493 "firmware bug, circa July, 2001.)\n"); 1494 break; 1495 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 1496 dev_info(d, "UNDERRUN\n"); 1497 break; 1498 case CMD_DATA_OVERRUN: 1499 dev_warn(d, "cp %p has completed with data overrun\n", cp); 1500 break; 1501 case CMD_INVALID: { 1502 /* controller unfortunately reports SCSI passthru's 1503 * to non-existent targets as invalid commands. 1504 */ 1505 dev_warn(d, "cp %p is reported invalid (probably means " 1506 "target device no longer present)\n", cp); 1507 /* print_bytes((unsigned char *) cp, sizeof(*cp), 1, 0); 1508 print_cmd(cp); */ 1509 } 1510 break; 1511 case CMD_PROTOCOL_ERR: 1512 dev_warn(d, "cp %p has protocol error \n", cp); 1513 break; 1514 case CMD_HARDWARE_ERR: 1515 /* cmd->result = DID_ERROR << 16; */ 1516 dev_warn(d, "cp %p had hardware error\n", cp); 1517 break; 1518 case CMD_CONNECTION_LOST: 1519 dev_warn(d, "cp %p had connection lost\n", cp); 1520 break; 1521 case CMD_ABORTED: 1522 dev_warn(d, "cp %p was aborted\n", cp); 1523 break; 1524 case CMD_ABORT_FAILED: 1525 dev_warn(d, "cp %p reports abort failed\n", cp); 1526 break; 1527 case CMD_UNSOLICITED_ABORT: 1528 dev_warn(d, "cp %p aborted due to an unsolicited abort\n", cp); 1529 break; 1530 case CMD_TIMEOUT: 1531 dev_warn(d, "cp %p timed out\n", cp); 1532 break; 1533 case CMD_UNABORTABLE: 1534 dev_warn(d, "Command unabortable\n"); 1535 break; 1536 default: 1537 dev_warn(d, "cp %p returned unknown status %x\n", cp, 1538 ei->CommandStatus); 1539 } 1540 } 1541 1542 static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr, 1543 unsigned char page, unsigned char *buf, 1544 unsigned char bufsize) 1545 { 1546 int rc = IO_OK; 1547 struct CommandList *c; 1548 struct ErrorInfo *ei; 1549 1550 c = cmd_special_alloc(h); 1551 1552 if (c == NULL) { /* trouble... */ 1553 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n"); 1554 return -ENOMEM; 1555 } 1556 1557 if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, 1558 page, scsi3addr, TYPE_CMD)) { 1559 rc = -1; 1560 goto out; 1561 } 1562 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE); 1563 ei = c->err_info; 1564 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 1565 hpsa_scsi_interpret_error(c); 1566 rc = -1; 1567 } 1568 out: 1569 cmd_special_free(h, c); 1570 return rc; 1571 } 1572 1573 static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr) 1574 { 1575 int rc = IO_OK; 1576 struct CommandList *c; 1577 struct ErrorInfo *ei; 1578 1579 c = cmd_special_alloc(h); 1580 1581 if (c == NULL) { /* trouble... */ 1582 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n"); 1583 return -ENOMEM; 1584 } 1585 1586 /* fill_cmd can't fail here, no data buffer to map. */ 1587 (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, 1588 NULL, 0, 0, scsi3addr, TYPE_MSG); 1589 hpsa_scsi_do_simple_cmd_core(h, c); 1590 /* no unmap needed here because no data xfer. */ 1591 1592 ei = c->err_info; 1593 if (ei->CommandStatus != 0) { 1594 hpsa_scsi_interpret_error(c); 1595 rc = -1; 1596 } 1597 cmd_special_free(h, c); 1598 return rc; 1599 } 1600 1601 static void hpsa_get_raid_level(struct ctlr_info *h, 1602 unsigned char *scsi3addr, unsigned char *raid_level) 1603 { 1604 int rc; 1605 unsigned char *buf; 1606 1607 *raid_level = RAID_UNKNOWN; 1608 buf = kzalloc(64, GFP_KERNEL); 1609 if (!buf) 1610 return; 1611 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0xC1, buf, 64); 1612 if (rc == 0) 1613 *raid_level = buf[8]; 1614 if (*raid_level > RAID_UNKNOWN) 1615 *raid_level = RAID_UNKNOWN; 1616 kfree(buf); 1617 return; 1618 } 1619 1620 /* Get the device id from inquiry page 0x83 */ 1621 static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr, 1622 unsigned char *device_id, int buflen) 1623 { 1624 int rc; 1625 unsigned char *buf; 1626 1627 if (buflen > 16) 1628 buflen = 16; 1629 buf = kzalloc(64, GFP_KERNEL); 1630 if (!buf) 1631 return -1; 1632 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0x83, buf, 64); 1633 if (rc == 0) 1634 memcpy(device_id, &buf[8], buflen); 1635 kfree(buf); 1636 return rc != 0; 1637 } 1638 1639 static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical, 1640 struct ReportLUNdata *buf, int bufsize, 1641 int extended_response) 1642 { 1643 int rc = IO_OK; 1644 struct CommandList *c; 1645 unsigned char scsi3addr[8]; 1646 struct ErrorInfo *ei; 1647 1648 c = cmd_special_alloc(h); 1649 if (c == NULL) { /* trouble... */ 1650 dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n"); 1651 return -1; 1652 } 1653 /* address the controller */ 1654 memset(scsi3addr, 0, sizeof(scsi3addr)); 1655 if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h, 1656 buf, bufsize, 0, scsi3addr, TYPE_CMD)) { 1657 rc = -1; 1658 goto out; 1659 } 1660 if (extended_response) 1661 c->Request.CDB[1] = extended_response; 1662 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE); 1663 ei = c->err_info; 1664 if (ei->CommandStatus != 0 && 1665 ei->CommandStatus != CMD_DATA_UNDERRUN) { 1666 hpsa_scsi_interpret_error(c); 1667 rc = -1; 1668 } 1669 out: 1670 cmd_special_free(h, c); 1671 return rc; 1672 } 1673 1674 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 1675 struct ReportLUNdata *buf, 1676 int bufsize, int extended_response) 1677 { 1678 return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response); 1679 } 1680 1681 static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h, 1682 struct ReportLUNdata *buf, int bufsize) 1683 { 1684 return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0); 1685 } 1686 1687 static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device, 1688 int bus, int target, int lun) 1689 { 1690 device->bus = bus; 1691 device->target = target; 1692 device->lun = lun; 1693 } 1694 1695 static int hpsa_update_device_info(struct ctlr_info *h, 1696 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device, 1697 unsigned char *is_OBDR_device) 1698 { 1699 1700 #define OBDR_SIG_OFFSET 43 1701 #define OBDR_TAPE_SIG "$DR-10" 1702 #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1) 1703 #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN) 1704 1705 unsigned char *inq_buff; 1706 unsigned char *obdr_sig; 1707 1708 inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL); 1709 if (!inq_buff) 1710 goto bail_out; 1711 1712 /* Do an inquiry to the device to see what it is. */ 1713 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff, 1714 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) { 1715 /* Inquiry failed (msg printed already) */ 1716 dev_err(&h->pdev->dev, 1717 "hpsa_update_device_info: inquiry failed\n"); 1718 goto bail_out; 1719 } 1720 1721 this_device->devtype = (inq_buff[0] & 0x1f); 1722 memcpy(this_device->scsi3addr, scsi3addr, 8); 1723 memcpy(this_device->vendor, &inq_buff[8], 1724 sizeof(this_device->vendor)); 1725 memcpy(this_device->model, &inq_buff[16], 1726 sizeof(this_device->model)); 1727 memset(this_device->device_id, 0, 1728 sizeof(this_device->device_id)); 1729 hpsa_get_device_id(h, scsi3addr, this_device->device_id, 1730 sizeof(this_device->device_id)); 1731 1732 if (this_device->devtype == TYPE_DISK && 1733 is_logical_dev_addr_mode(scsi3addr)) 1734 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level); 1735 else 1736 this_device->raid_level = RAID_UNKNOWN; 1737 1738 if (is_OBDR_device) { 1739 /* See if this is a One-Button-Disaster-Recovery device 1740 * by looking for "$DR-10" at offset 43 in inquiry data. 1741 */ 1742 obdr_sig = &inq_buff[OBDR_SIG_OFFSET]; 1743 *is_OBDR_device = (this_device->devtype == TYPE_ROM && 1744 strncmp(obdr_sig, OBDR_TAPE_SIG, 1745 OBDR_SIG_LEN) == 0); 1746 } 1747 1748 kfree(inq_buff); 1749 return 0; 1750 1751 bail_out: 1752 kfree(inq_buff); 1753 return 1; 1754 } 1755 1756 static unsigned char *ext_target_model[] = { 1757 "MSA2012", 1758 "MSA2024", 1759 "MSA2312", 1760 "MSA2324", 1761 "P2000 G3 SAS", 1762 NULL, 1763 }; 1764 1765 static int is_ext_target(struct ctlr_info *h, struct hpsa_scsi_dev_t *device) 1766 { 1767 int i; 1768 1769 for (i = 0; ext_target_model[i]; i++) 1770 if (strncmp(device->model, ext_target_model[i], 1771 strlen(ext_target_model[i])) == 0) 1772 return 1; 1773 return 0; 1774 } 1775 1776 /* Helper function to assign bus, target, lun mapping of devices. 1777 * Puts non-external target logical volumes on bus 0, external target logical 1778 * volumes on bus 1, physical devices on bus 2. and the hba on bus 3. 1779 * Logical drive target and lun are assigned at this time, but 1780 * physical device lun and target assignment are deferred (assigned 1781 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.) 1782 */ 1783 static void figure_bus_target_lun(struct ctlr_info *h, 1784 u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device) 1785 { 1786 u32 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes)); 1787 1788 if (!is_logical_dev_addr_mode(lunaddrbytes)) { 1789 /* physical device, target and lun filled in later */ 1790 if (is_hba_lunid(lunaddrbytes)) 1791 hpsa_set_bus_target_lun(device, 3, 0, lunid & 0x3fff); 1792 else 1793 /* defer target, lun assignment for physical devices */ 1794 hpsa_set_bus_target_lun(device, 2, -1, -1); 1795 return; 1796 } 1797 /* It's a logical device */ 1798 if (is_ext_target(h, device)) { 1799 /* external target way, put logicals on bus 1 1800 * and match target/lun numbers box 1801 * reports, other smart array, bus 0, target 0, match lunid 1802 */ 1803 hpsa_set_bus_target_lun(device, 1804 1, (lunid >> 16) & 0x3fff, lunid & 0x00ff); 1805 return; 1806 } 1807 hpsa_set_bus_target_lun(device, 0, 0, lunid & 0x3fff); 1808 } 1809 1810 /* 1811 * If there is no lun 0 on a target, linux won't find any devices. 1812 * For the external targets (arrays), we have to manually detect the enclosure 1813 * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report 1814 * it for some reason. *tmpdevice is the target we're adding, 1815 * this_device is a pointer into the current element of currentsd[] 1816 * that we're building up in update_scsi_devices(), below. 1817 * lunzerobits is a bitmap that tracks which targets already have a 1818 * lun 0 assigned. 1819 * Returns 1 if an enclosure was added, 0 if not. 1820 */ 1821 static int add_ext_target_dev(struct ctlr_info *h, 1822 struct hpsa_scsi_dev_t *tmpdevice, 1823 struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes, 1824 unsigned long lunzerobits[], int *n_ext_target_devs) 1825 { 1826 unsigned char scsi3addr[8]; 1827 1828 if (test_bit(tmpdevice->target, lunzerobits)) 1829 return 0; /* There is already a lun 0 on this target. */ 1830 1831 if (!is_logical_dev_addr_mode(lunaddrbytes)) 1832 return 0; /* It's the logical targets that may lack lun 0. */ 1833 1834 if (!is_ext_target(h, tmpdevice)) 1835 return 0; /* Only external target devices have this problem. */ 1836 1837 if (tmpdevice->lun == 0) /* if lun is 0, then we have a lun 0. */ 1838 return 0; 1839 1840 memset(scsi3addr, 0, 8); 1841 scsi3addr[3] = tmpdevice->target; 1842 if (is_hba_lunid(scsi3addr)) 1843 return 0; /* Don't add the RAID controller here. */ 1844 1845 if (is_scsi_rev_5(h)) 1846 return 0; /* p1210m doesn't need to do this. */ 1847 1848 if (*n_ext_target_devs >= MAX_EXT_TARGETS) { 1849 dev_warn(&h->pdev->dev, "Maximum number of external " 1850 "target devices exceeded. Check your hardware " 1851 "configuration."); 1852 return 0; 1853 } 1854 1855 if (hpsa_update_device_info(h, scsi3addr, this_device, NULL)) 1856 return 0; 1857 (*n_ext_target_devs)++; 1858 hpsa_set_bus_target_lun(this_device, 1859 tmpdevice->bus, tmpdevice->target, 0); 1860 set_bit(tmpdevice->target, lunzerobits); 1861 return 1; 1862 } 1863 1864 /* 1865 * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev, 1866 * logdev. The number of luns in physdev and logdev are returned in 1867 * *nphysicals and *nlogicals, respectively. 1868 * Returns 0 on success, -1 otherwise. 1869 */ 1870 static int hpsa_gather_lun_info(struct ctlr_info *h, 1871 int reportlunsize, 1872 struct ReportLUNdata *physdev, u32 *nphysicals, 1873 struct ReportLUNdata *logdev, u32 *nlogicals) 1874 { 1875 if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) { 1876 dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 1877 return -1; 1878 } 1879 *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 8; 1880 if (*nphysicals > HPSA_MAX_PHYS_LUN) { 1881 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded." 1882 " %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN, 1883 *nphysicals - HPSA_MAX_PHYS_LUN); 1884 *nphysicals = HPSA_MAX_PHYS_LUN; 1885 } 1886 if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) { 1887 dev_err(&h->pdev->dev, "report logical LUNs failed.\n"); 1888 return -1; 1889 } 1890 *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8; 1891 /* Reject Logicals in excess of our max capability. */ 1892 if (*nlogicals > HPSA_MAX_LUN) { 1893 dev_warn(&h->pdev->dev, 1894 "maximum logical LUNs (%d) exceeded. " 1895 "%d LUNs ignored.\n", HPSA_MAX_LUN, 1896 *nlogicals - HPSA_MAX_LUN); 1897 *nlogicals = HPSA_MAX_LUN; 1898 } 1899 if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) { 1900 dev_warn(&h->pdev->dev, 1901 "maximum logical + physical LUNs (%d) exceeded. " 1902 "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN, 1903 *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN); 1904 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals; 1905 } 1906 return 0; 1907 } 1908 1909 u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, int i, 1910 int nphysicals, int nlogicals, struct ReportLUNdata *physdev_list, 1911 struct ReportLUNdata *logdev_list) 1912 { 1913 /* Helper function, figure out where the LUN ID info is coming from 1914 * given index i, lists of physical and logical devices, where in 1915 * the list the raid controller is supposed to appear (first or last) 1916 */ 1917 1918 int logicals_start = nphysicals + (raid_ctlr_position == 0); 1919 int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0); 1920 1921 if (i == raid_ctlr_position) 1922 return RAID_CTLR_LUNID; 1923 1924 if (i < logicals_start) 1925 return &physdev_list->LUN[i - (raid_ctlr_position == 0)][0]; 1926 1927 if (i < last_device) 1928 return &logdev_list->LUN[i - nphysicals - 1929 (raid_ctlr_position == 0)][0]; 1930 BUG(); 1931 return NULL; 1932 } 1933 1934 static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno) 1935 { 1936 /* the idea here is we could get notified 1937 * that some devices have changed, so we do a report 1938 * physical luns and report logical luns cmd, and adjust 1939 * our list of devices accordingly. 1940 * 1941 * The scsi3addr's of devices won't change so long as the 1942 * adapter is not reset. That means we can rescan and 1943 * tell which devices we already know about, vs. new 1944 * devices, vs. disappearing devices. 1945 */ 1946 struct ReportLUNdata *physdev_list = NULL; 1947 struct ReportLUNdata *logdev_list = NULL; 1948 u32 nphysicals = 0; 1949 u32 nlogicals = 0; 1950 u32 ndev_allocated = 0; 1951 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice; 1952 int ncurrent = 0; 1953 int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8; 1954 int i, n_ext_target_devs, ndevs_to_allocate; 1955 int raid_ctlr_position; 1956 DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS); 1957 1958 currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL); 1959 physdev_list = kzalloc(reportlunsize, GFP_KERNEL); 1960 logdev_list = kzalloc(reportlunsize, GFP_KERNEL); 1961 tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL); 1962 1963 if (!currentsd || !physdev_list || !logdev_list || !tmpdevice) { 1964 dev_err(&h->pdev->dev, "out of memory\n"); 1965 goto out; 1966 } 1967 memset(lunzerobits, 0, sizeof(lunzerobits)); 1968 1969 if (hpsa_gather_lun_info(h, reportlunsize, physdev_list, &nphysicals, 1970 logdev_list, &nlogicals)) 1971 goto out; 1972 1973 /* We might see up to the maximum number of logical and physical disks 1974 * plus external target devices, and a device for the local RAID 1975 * controller. 1976 */ 1977 ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1; 1978 1979 /* Allocate the per device structures */ 1980 for (i = 0; i < ndevs_to_allocate; i++) { 1981 if (i >= HPSA_MAX_DEVICES) { 1982 dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded." 1983 " %d devices ignored.\n", HPSA_MAX_DEVICES, 1984 ndevs_to_allocate - HPSA_MAX_DEVICES); 1985 break; 1986 } 1987 1988 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL); 1989 if (!currentsd[i]) { 1990 dev_warn(&h->pdev->dev, "out of memory at %s:%d\n", 1991 __FILE__, __LINE__); 1992 goto out; 1993 } 1994 ndev_allocated++; 1995 } 1996 1997 if (unlikely(is_scsi_rev_5(h))) 1998 raid_ctlr_position = 0; 1999 else 2000 raid_ctlr_position = nphysicals + nlogicals; 2001 2002 /* adjust our table of devices */ 2003 n_ext_target_devs = 0; 2004 for (i = 0; i < nphysicals + nlogicals + 1; i++) { 2005 u8 *lunaddrbytes, is_OBDR = 0; 2006 2007 /* Figure out where the LUN ID info is coming from */ 2008 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position, 2009 i, nphysicals, nlogicals, physdev_list, logdev_list); 2010 /* skip masked physical devices. */ 2011 if (lunaddrbytes[3] & 0xC0 && 2012 i < nphysicals + (raid_ctlr_position == 0)) 2013 continue; 2014 2015 /* Get device type, vendor, model, device id */ 2016 if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice, 2017 &is_OBDR)) 2018 continue; /* skip it if we can't talk to it. */ 2019 figure_bus_target_lun(h, lunaddrbytes, tmpdevice); 2020 this_device = currentsd[ncurrent]; 2021 2022 /* 2023 * For external target devices, we have to insert a LUN 0 which 2024 * doesn't show up in CCISS_REPORT_PHYSICAL data, but there 2025 * is nonetheless an enclosure device there. We have to 2026 * present that otherwise linux won't find anything if 2027 * there is no lun 0. 2028 */ 2029 if (add_ext_target_dev(h, tmpdevice, this_device, 2030 lunaddrbytes, lunzerobits, 2031 &n_ext_target_devs)) { 2032 ncurrent++; 2033 this_device = currentsd[ncurrent]; 2034 } 2035 2036 *this_device = *tmpdevice; 2037 2038 switch (this_device->devtype) { 2039 case TYPE_ROM: 2040 /* We don't *really* support actual CD-ROM devices, 2041 * just "One Button Disaster Recovery" tape drive 2042 * which temporarily pretends to be a CD-ROM drive. 2043 * So we check that the device is really an OBDR tape 2044 * device by checking for "$DR-10" in bytes 43-48 of 2045 * the inquiry data. 2046 */ 2047 if (is_OBDR) 2048 ncurrent++; 2049 break; 2050 case TYPE_DISK: 2051 if (i < nphysicals) 2052 break; 2053 ncurrent++; 2054 break; 2055 case TYPE_TAPE: 2056 case TYPE_MEDIUM_CHANGER: 2057 ncurrent++; 2058 break; 2059 case TYPE_RAID: 2060 /* Only present the Smartarray HBA as a RAID controller. 2061 * If it's a RAID controller other than the HBA itself 2062 * (an external RAID controller, MSA500 or similar) 2063 * don't present it. 2064 */ 2065 if (!is_hba_lunid(lunaddrbytes)) 2066 break; 2067 ncurrent++; 2068 break; 2069 default: 2070 break; 2071 } 2072 if (ncurrent >= HPSA_MAX_DEVICES) 2073 break; 2074 } 2075 adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent); 2076 out: 2077 kfree(tmpdevice); 2078 for (i = 0; i < ndev_allocated; i++) 2079 kfree(currentsd[i]); 2080 kfree(currentsd); 2081 kfree(physdev_list); 2082 kfree(logdev_list); 2083 } 2084 2085 /* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci 2086 * dma mapping and fills in the scatter gather entries of the 2087 * hpsa command, cp. 2088 */ 2089 static int hpsa_scatter_gather(struct ctlr_info *h, 2090 struct CommandList *cp, 2091 struct scsi_cmnd *cmd) 2092 { 2093 unsigned int len; 2094 struct scatterlist *sg; 2095 u64 addr64; 2096 int use_sg, i, sg_index, chained; 2097 struct SGDescriptor *curr_sg; 2098 2099 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 2100 2101 use_sg = scsi_dma_map(cmd); 2102 if (use_sg < 0) 2103 return use_sg; 2104 2105 if (!use_sg) 2106 goto sglist_finished; 2107 2108 curr_sg = cp->SG; 2109 chained = 0; 2110 sg_index = 0; 2111 scsi_for_each_sg(cmd, sg, use_sg, i) { 2112 if (i == h->max_cmd_sg_entries - 1 && 2113 use_sg > h->max_cmd_sg_entries) { 2114 chained = 1; 2115 curr_sg = h->cmd_sg_list[cp->cmdindex]; 2116 sg_index = 0; 2117 } 2118 addr64 = (u64) sg_dma_address(sg); 2119 len = sg_dma_len(sg); 2120 curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL); 2121 curr_sg->Addr.upper = (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL); 2122 curr_sg->Len = len; 2123 curr_sg->Ext = 0; /* we are not chaining */ 2124 curr_sg++; 2125 } 2126 2127 if (use_sg + chained > h->maxSG) 2128 h->maxSG = use_sg + chained; 2129 2130 if (chained) { 2131 cp->Header.SGList = h->max_cmd_sg_entries; 2132 cp->Header.SGTotal = (u16) (use_sg + 1); 2133 if (hpsa_map_sg_chain_block(h, cp)) { 2134 scsi_dma_unmap(cmd); 2135 return -1; 2136 } 2137 return 0; 2138 } 2139 2140 sglist_finished: 2141 2142 cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */ 2143 cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */ 2144 return 0; 2145 } 2146 2147 2148 static int hpsa_scsi_queue_command_lck(struct scsi_cmnd *cmd, 2149 void (*done)(struct scsi_cmnd *)) 2150 { 2151 struct ctlr_info *h; 2152 struct hpsa_scsi_dev_t *dev; 2153 unsigned char scsi3addr[8]; 2154 struct CommandList *c; 2155 unsigned long flags; 2156 2157 /* Get the ptr to our adapter structure out of cmd->host. */ 2158 h = sdev_to_hba(cmd->device); 2159 dev = cmd->device->hostdata; 2160 if (!dev) { 2161 cmd->result = DID_NO_CONNECT << 16; 2162 done(cmd); 2163 return 0; 2164 } 2165 memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr)); 2166 2167 spin_lock_irqsave(&h->lock, flags); 2168 if (unlikely(h->lockup_detected)) { 2169 spin_unlock_irqrestore(&h->lock, flags); 2170 cmd->result = DID_ERROR << 16; 2171 done(cmd); 2172 return 0; 2173 } 2174 spin_unlock_irqrestore(&h->lock, flags); 2175 c = cmd_alloc(h); 2176 if (c == NULL) { /* trouble... */ 2177 dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n"); 2178 return SCSI_MLQUEUE_HOST_BUSY; 2179 } 2180 2181 /* Fill in the command list header */ 2182 2183 cmd->scsi_done = done; /* save this for use by completion code */ 2184 2185 /* save c in case we have to abort it */ 2186 cmd->host_scribble = (unsigned char *) c; 2187 2188 c->cmd_type = CMD_SCSI; 2189 c->scsi_cmd = cmd; 2190 c->Header.ReplyQueue = 0; /* unused in simple mode */ 2191 memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8); 2192 c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT); 2193 c->Header.Tag.lower |= DIRECT_LOOKUP_BIT; 2194 2195 /* Fill in the request block... */ 2196 2197 c->Request.Timeout = 0; 2198 memset(c->Request.CDB, 0, sizeof(c->Request.CDB)); 2199 BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB)); 2200 c->Request.CDBLen = cmd->cmd_len; 2201 memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len); 2202 c->Request.Type.Type = TYPE_CMD; 2203 c->Request.Type.Attribute = ATTR_SIMPLE; 2204 switch (cmd->sc_data_direction) { 2205 case DMA_TO_DEVICE: 2206 c->Request.Type.Direction = XFER_WRITE; 2207 break; 2208 case DMA_FROM_DEVICE: 2209 c->Request.Type.Direction = XFER_READ; 2210 break; 2211 case DMA_NONE: 2212 c->Request.Type.Direction = XFER_NONE; 2213 break; 2214 case DMA_BIDIRECTIONAL: 2215 /* This can happen if a buggy application does a scsi passthru 2216 * and sets both inlen and outlen to non-zero. ( see 2217 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() ) 2218 */ 2219 2220 c->Request.Type.Direction = XFER_RSVD; 2221 /* This is technically wrong, and hpsa controllers should 2222 * reject it with CMD_INVALID, which is the most correct 2223 * response, but non-fibre backends appear to let it 2224 * slide by, and give the same results as if this field 2225 * were set correctly. Either way is acceptable for 2226 * our purposes here. 2227 */ 2228 2229 break; 2230 2231 default: 2232 dev_err(&h->pdev->dev, "unknown data direction: %d\n", 2233 cmd->sc_data_direction); 2234 BUG(); 2235 break; 2236 } 2237 2238 if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */ 2239 cmd_free(h, c); 2240 return SCSI_MLQUEUE_HOST_BUSY; 2241 } 2242 enqueue_cmd_and_start_io(h, c); 2243 /* the cmd'll come back via intr handler in complete_scsi_command() */ 2244 return 0; 2245 } 2246 2247 static DEF_SCSI_QCMD(hpsa_scsi_queue_command) 2248 2249 static void hpsa_scan_start(struct Scsi_Host *sh) 2250 { 2251 struct ctlr_info *h = shost_to_hba(sh); 2252 unsigned long flags; 2253 2254 /* wait until any scan already in progress is finished. */ 2255 while (1) { 2256 spin_lock_irqsave(&h->scan_lock, flags); 2257 if (h->scan_finished) 2258 break; 2259 spin_unlock_irqrestore(&h->scan_lock, flags); 2260 wait_event(h->scan_wait_queue, h->scan_finished); 2261 /* Note: We don't need to worry about a race between this 2262 * thread and driver unload because the midlayer will 2263 * have incremented the reference count, so unload won't 2264 * happen if we're in here. 2265 */ 2266 } 2267 h->scan_finished = 0; /* mark scan as in progress */ 2268 spin_unlock_irqrestore(&h->scan_lock, flags); 2269 2270 hpsa_update_scsi_devices(h, h->scsi_host->host_no); 2271 2272 spin_lock_irqsave(&h->scan_lock, flags); 2273 h->scan_finished = 1; /* mark scan as finished. */ 2274 wake_up_all(&h->scan_wait_queue); 2275 spin_unlock_irqrestore(&h->scan_lock, flags); 2276 } 2277 2278 static int hpsa_scan_finished(struct Scsi_Host *sh, 2279 unsigned long elapsed_time) 2280 { 2281 struct ctlr_info *h = shost_to_hba(sh); 2282 unsigned long flags; 2283 int finished; 2284 2285 spin_lock_irqsave(&h->scan_lock, flags); 2286 finished = h->scan_finished; 2287 spin_unlock_irqrestore(&h->scan_lock, flags); 2288 return finished; 2289 } 2290 2291 static int hpsa_change_queue_depth(struct scsi_device *sdev, 2292 int qdepth, int reason) 2293 { 2294 struct ctlr_info *h = sdev_to_hba(sdev); 2295 2296 if (reason != SCSI_QDEPTH_DEFAULT) 2297 return -ENOTSUPP; 2298 2299 if (qdepth < 1) 2300 qdepth = 1; 2301 else 2302 if (qdepth > h->nr_cmds) 2303 qdepth = h->nr_cmds; 2304 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth); 2305 return sdev->queue_depth; 2306 } 2307 2308 static void hpsa_unregister_scsi(struct ctlr_info *h) 2309 { 2310 /* we are being forcibly unloaded, and may not refuse. */ 2311 scsi_remove_host(h->scsi_host); 2312 scsi_host_put(h->scsi_host); 2313 h->scsi_host = NULL; 2314 } 2315 2316 static int hpsa_register_scsi(struct ctlr_info *h) 2317 { 2318 struct Scsi_Host *sh; 2319 int error; 2320 2321 sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h)); 2322 if (sh == NULL) 2323 goto fail; 2324 2325 sh->io_port = 0; 2326 sh->n_io_port = 0; 2327 sh->this_id = -1; 2328 sh->max_channel = 3; 2329 sh->max_cmd_len = MAX_COMMAND_SIZE; 2330 sh->max_lun = HPSA_MAX_LUN; 2331 sh->max_id = HPSA_MAX_LUN; 2332 sh->can_queue = h->nr_cmds; 2333 sh->cmd_per_lun = h->nr_cmds; 2334 sh->sg_tablesize = h->maxsgentries; 2335 h->scsi_host = sh; 2336 sh->hostdata[0] = (unsigned long) h; 2337 sh->irq = h->intr[h->intr_mode]; 2338 sh->unique_id = sh->irq; 2339 error = scsi_add_host(sh, &h->pdev->dev); 2340 if (error) 2341 goto fail_host_put; 2342 scsi_scan_host(sh); 2343 return 0; 2344 2345 fail_host_put: 2346 dev_err(&h->pdev->dev, "%s: scsi_add_host" 2347 " failed for controller %d\n", __func__, h->ctlr); 2348 scsi_host_put(sh); 2349 return error; 2350 fail: 2351 dev_err(&h->pdev->dev, "%s: scsi_host_alloc" 2352 " failed for controller %d\n", __func__, h->ctlr); 2353 return -ENOMEM; 2354 } 2355 2356 static int wait_for_device_to_become_ready(struct ctlr_info *h, 2357 unsigned char lunaddr[]) 2358 { 2359 int rc = 0; 2360 int count = 0; 2361 int waittime = 1; /* seconds */ 2362 struct CommandList *c; 2363 2364 c = cmd_special_alloc(h); 2365 if (!c) { 2366 dev_warn(&h->pdev->dev, "out of memory in " 2367 "wait_for_device_to_become_ready.\n"); 2368 return IO_ERROR; 2369 } 2370 2371 /* Send test unit ready until device ready, or give up. */ 2372 while (count < HPSA_TUR_RETRY_LIMIT) { 2373 2374 /* Wait for a bit. do this first, because if we send 2375 * the TUR right away, the reset will just abort it. 2376 */ 2377 msleep(1000 * waittime); 2378 count++; 2379 2380 /* Increase wait time with each try, up to a point. */ 2381 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS) 2382 waittime = waittime * 2; 2383 2384 /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */ 2385 (void) fill_cmd(c, TEST_UNIT_READY, h, 2386 NULL, 0, 0, lunaddr, TYPE_CMD); 2387 hpsa_scsi_do_simple_cmd_core(h, c); 2388 /* no unmap needed here because no data xfer. */ 2389 2390 if (c->err_info->CommandStatus == CMD_SUCCESS) 2391 break; 2392 2393 if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 2394 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION && 2395 (c->err_info->SenseInfo[2] == NO_SENSE || 2396 c->err_info->SenseInfo[2] == UNIT_ATTENTION)) 2397 break; 2398 2399 dev_warn(&h->pdev->dev, "waiting %d secs " 2400 "for device to become ready.\n", waittime); 2401 rc = 1; /* device not ready. */ 2402 } 2403 2404 if (rc) 2405 dev_warn(&h->pdev->dev, "giving up on device.\n"); 2406 else 2407 dev_warn(&h->pdev->dev, "device is ready.\n"); 2408 2409 cmd_special_free(h, c); 2410 return rc; 2411 } 2412 2413 /* Need at least one of these error handlers to keep ../scsi/hosts.c from 2414 * complaining. Doing a host- or bus-reset can't do anything good here. 2415 */ 2416 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd) 2417 { 2418 int rc; 2419 struct ctlr_info *h; 2420 struct hpsa_scsi_dev_t *dev; 2421 2422 /* find the controller to which the command to be aborted was sent */ 2423 h = sdev_to_hba(scsicmd->device); 2424 if (h == NULL) /* paranoia */ 2425 return FAILED; 2426 dev = scsicmd->device->hostdata; 2427 if (!dev) { 2428 dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: " 2429 "device lookup failed.\n"); 2430 return FAILED; 2431 } 2432 dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n", 2433 h->scsi_host->host_no, dev->bus, dev->target, dev->lun); 2434 /* send a reset to the SCSI LUN which the command was sent to */ 2435 rc = hpsa_send_reset(h, dev->scsi3addr); 2436 if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0) 2437 return SUCCESS; 2438 2439 dev_warn(&h->pdev->dev, "resetting device failed.\n"); 2440 return FAILED; 2441 } 2442 2443 static void swizzle_abort_tag(u8 *tag) 2444 { 2445 u8 original_tag[8]; 2446 2447 memcpy(original_tag, tag, 8); 2448 tag[0] = original_tag[3]; 2449 tag[1] = original_tag[2]; 2450 tag[2] = original_tag[1]; 2451 tag[3] = original_tag[0]; 2452 tag[4] = original_tag[7]; 2453 tag[5] = original_tag[6]; 2454 tag[6] = original_tag[5]; 2455 tag[7] = original_tag[4]; 2456 } 2457 2458 static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr, 2459 struct CommandList *abort, int swizzle) 2460 { 2461 int rc = IO_OK; 2462 struct CommandList *c; 2463 struct ErrorInfo *ei; 2464 2465 c = cmd_special_alloc(h); 2466 if (c == NULL) { /* trouble... */ 2467 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n"); 2468 return -ENOMEM; 2469 } 2470 2471 /* fill_cmd can't fail here, no buffer to map */ 2472 (void) fill_cmd(c, HPSA_ABORT_MSG, h, abort, 2473 0, 0, scsi3addr, TYPE_MSG); 2474 if (swizzle) 2475 swizzle_abort_tag(&c->Request.CDB[4]); 2476 hpsa_scsi_do_simple_cmd_core(h, c); 2477 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd_core completed.\n", 2478 __func__, abort->Header.Tag.upper, abort->Header.Tag.lower); 2479 /* no unmap needed here because no data xfer. */ 2480 2481 ei = c->err_info; 2482 switch (ei->CommandStatus) { 2483 case CMD_SUCCESS: 2484 break; 2485 case CMD_UNABORTABLE: /* Very common, don't make noise. */ 2486 rc = -1; 2487 break; 2488 default: 2489 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n", 2490 __func__, abort->Header.Tag.upper, 2491 abort->Header.Tag.lower); 2492 hpsa_scsi_interpret_error(c); 2493 rc = -1; 2494 break; 2495 } 2496 cmd_special_free(h, c); 2497 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", __func__, 2498 abort->Header.Tag.upper, abort->Header.Tag.lower); 2499 return rc; 2500 } 2501 2502 /* 2503 * hpsa_find_cmd_in_queue 2504 * 2505 * Used to determine whether a command (find) is still present 2506 * in queue_head. Optionally excludes the last element of queue_head. 2507 * 2508 * This is used to avoid unnecessary aborts. Commands in h->reqQ have 2509 * not yet been submitted, and so can be aborted by the driver without 2510 * sending an abort to the hardware. 2511 * 2512 * Returns pointer to command if found in queue, NULL otherwise. 2513 */ 2514 static struct CommandList *hpsa_find_cmd_in_queue(struct ctlr_info *h, 2515 struct scsi_cmnd *find, struct list_head *queue_head) 2516 { 2517 unsigned long flags; 2518 struct CommandList *c = NULL; /* ptr into cmpQ */ 2519 2520 if (!find) 2521 return 0; 2522 spin_lock_irqsave(&h->lock, flags); 2523 list_for_each_entry(c, queue_head, list) { 2524 if (c->scsi_cmd == NULL) /* e.g.: passthru ioctl */ 2525 continue; 2526 if (c->scsi_cmd == find) { 2527 spin_unlock_irqrestore(&h->lock, flags); 2528 return c; 2529 } 2530 } 2531 spin_unlock_irqrestore(&h->lock, flags); 2532 return NULL; 2533 } 2534 2535 static struct CommandList *hpsa_find_cmd_in_queue_by_tag(struct ctlr_info *h, 2536 u8 *tag, struct list_head *queue_head) 2537 { 2538 unsigned long flags; 2539 struct CommandList *c; 2540 2541 spin_lock_irqsave(&h->lock, flags); 2542 list_for_each_entry(c, queue_head, list) { 2543 if (memcmp(&c->Header.Tag, tag, 8) != 0) 2544 continue; 2545 spin_unlock_irqrestore(&h->lock, flags); 2546 return c; 2547 } 2548 spin_unlock_irqrestore(&h->lock, flags); 2549 return NULL; 2550 } 2551 2552 /* Some Smart Arrays need the abort tag swizzled, and some don't. It's hard to 2553 * tell which kind we're dealing with, so we send the abort both ways. There 2554 * shouldn't be any collisions between swizzled and unswizzled tags due to the 2555 * way we construct our tags but we check anyway in case the assumptions which 2556 * make this true someday become false. 2557 */ 2558 static int hpsa_send_abort_both_ways(struct ctlr_info *h, 2559 unsigned char *scsi3addr, struct CommandList *abort) 2560 { 2561 u8 swizzled_tag[8]; 2562 struct CommandList *c; 2563 int rc = 0, rc2 = 0; 2564 2565 /* we do not expect to find the swizzled tag in our queue, but 2566 * check anyway just to be sure the assumptions which make this 2567 * the case haven't become wrong. 2568 */ 2569 memcpy(swizzled_tag, &abort->Request.CDB[4], 8); 2570 swizzle_abort_tag(swizzled_tag); 2571 c = hpsa_find_cmd_in_queue_by_tag(h, swizzled_tag, &h->cmpQ); 2572 if (c != NULL) { 2573 dev_warn(&h->pdev->dev, "Unexpectedly found byte-swapped tag in completion queue.\n"); 2574 return hpsa_send_abort(h, scsi3addr, abort, 0); 2575 } 2576 rc = hpsa_send_abort(h, scsi3addr, abort, 0); 2577 2578 /* if the command is still in our queue, we can't conclude that it was 2579 * aborted (it might have just completed normally) but in any case 2580 * we don't need to try to abort it another way. 2581 */ 2582 c = hpsa_find_cmd_in_queue(h, abort->scsi_cmd, &h->cmpQ); 2583 if (c) 2584 rc2 = hpsa_send_abort(h, scsi3addr, abort, 1); 2585 return rc && rc2; 2586 } 2587 2588 /* Send an abort for the specified command. 2589 * If the device and controller support it, 2590 * send a task abort request. 2591 */ 2592 static int hpsa_eh_abort_handler(struct scsi_cmnd *sc) 2593 { 2594 2595 int i, rc; 2596 struct ctlr_info *h; 2597 struct hpsa_scsi_dev_t *dev; 2598 struct CommandList *abort; /* pointer to command to be aborted */ 2599 struct CommandList *found; 2600 struct scsi_cmnd *as; /* ptr to scsi cmd inside aborted command. */ 2601 char msg[256]; /* For debug messaging. */ 2602 int ml = 0; 2603 2604 /* Find the controller of the command to be aborted */ 2605 h = sdev_to_hba(sc->device); 2606 if (WARN(h == NULL, 2607 "ABORT REQUEST FAILED, Controller lookup failed.\n")) 2608 return FAILED; 2609 2610 /* Check that controller supports some kind of task abort */ 2611 if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) && 2612 !(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags)) 2613 return FAILED; 2614 2615 memset(msg, 0, sizeof(msg)); 2616 ml += sprintf(msg+ml, "ABORT REQUEST on C%d:B%d:T%d:L%d ", 2617 h->scsi_host->host_no, sc->device->channel, 2618 sc->device->id, sc->device->lun); 2619 2620 /* Find the device of the command to be aborted */ 2621 dev = sc->device->hostdata; 2622 if (!dev) { 2623 dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n", 2624 msg); 2625 return FAILED; 2626 } 2627 2628 /* Get SCSI command to be aborted */ 2629 abort = (struct CommandList *) sc->host_scribble; 2630 if (abort == NULL) { 2631 dev_err(&h->pdev->dev, "%s FAILED, Command to abort is NULL.\n", 2632 msg); 2633 return FAILED; 2634 } 2635 2636 ml += sprintf(msg+ml, "Tag:0x%08x:%08x ", 2637 abort->Header.Tag.upper, abort->Header.Tag.lower); 2638 as = (struct scsi_cmnd *) abort->scsi_cmd; 2639 if (as != NULL) 2640 ml += sprintf(msg+ml, "Command:0x%x SN:0x%lx ", 2641 as->cmnd[0], as->serial_number); 2642 dev_dbg(&h->pdev->dev, "%s\n", msg); 2643 dev_warn(&h->pdev->dev, "Abort request on C%d:B%d:T%d:L%d\n", 2644 h->scsi_host->host_no, dev->bus, dev->target, dev->lun); 2645 2646 /* Search reqQ to See if command is queued but not submitted, 2647 * if so, complete the command with aborted status and remove 2648 * it from the reqQ. 2649 */ 2650 found = hpsa_find_cmd_in_queue(h, sc, &h->reqQ); 2651 if (found) { 2652 found->err_info->CommandStatus = CMD_ABORTED; 2653 finish_cmd(found); 2654 dev_info(&h->pdev->dev, "%s Request SUCCEEDED (driver queue).\n", 2655 msg); 2656 return SUCCESS; 2657 } 2658 2659 /* not in reqQ, if also not in cmpQ, must have already completed */ 2660 found = hpsa_find_cmd_in_queue(h, sc, &h->cmpQ); 2661 if (!found) { 2662 dev_dbg(&h->pdev->dev, "%s Request SUCCEEDED (not known to driver).\n", 2663 msg); 2664 return SUCCESS; 2665 } 2666 2667 /* 2668 * Command is in flight, or possibly already completed 2669 * by the firmware (but not to the scsi mid layer) but we can't 2670 * distinguish which. Send the abort down. 2671 */ 2672 rc = hpsa_send_abort_both_ways(h, dev->scsi3addr, abort); 2673 if (rc != 0) { 2674 dev_dbg(&h->pdev->dev, "%s Request FAILED.\n", msg); 2675 dev_warn(&h->pdev->dev, "FAILED abort on device C%d:B%d:T%d:L%d\n", 2676 h->scsi_host->host_no, 2677 dev->bus, dev->target, dev->lun); 2678 return FAILED; 2679 } 2680 dev_info(&h->pdev->dev, "%s REQUEST SUCCEEDED.\n", msg); 2681 2682 /* If the abort(s) above completed and actually aborted the 2683 * command, then the command to be aborted should already be 2684 * completed. If not, wait around a bit more to see if they 2685 * manage to complete normally. 2686 */ 2687 #define ABORT_COMPLETE_WAIT_SECS 30 2688 for (i = 0; i < ABORT_COMPLETE_WAIT_SECS * 10; i++) { 2689 found = hpsa_find_cmd_in_queue(h, sc, &h->cmpQ); 2690 if (!found) 2691 return SUCCESS; 2692 msleep(100); 2693 } 2694 dev_warn(&h->pdev->dev, "%s FAILED. Aborted command has not completed after %d seconds.\n", 2695 msg, ABORT_COMPLETE_WAIT_SECS); 2696 return FAILED; 2697 } 2698 2699 2700 /* 2701 * For operations that cannot sleep, a command block is allocated at init, 2702 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track 2703 * which ones are free or in use. Lock must be held when calling this. 2704 * cmd_free() is the complement. 2705 */ 2706 static struct CommandList *cmd_alloc(struct ctlr_info *h) 2707 { 2708 struct CommandList *c; 2709 int i; 2710 union u64bit temp64; 2711 dma_addr_t cmd_dma_handle, err_dma_handle; 2712 unsigned long flags; 2713 2714 spin_lock_irqsave(&h->lock, flags); 2715 do { 2716 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds); 2717 if (i == h->nr_cmds) { 2718 spin_unlock_irqrestore(&h->lock, flags); 2719 return NULL; 2720 } 2721 } while (test_and_set_bit 2722 (i & (BITS_PER_LONG - 1), 2723 h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0); 2724 spin_unlock_irqrestore(&h->lock, flags); 2725 2726 c = h->cmd_pool + i; 2727 memset(c, 0, sizeof(*c)); 2728 cmd_dma_handle = h->cmd_pool_dhandle 2729 + i * sizeof(*c); 2730 c->err_info = h->errinfo_pool + i; 2731 memset(c->err_info, 0, sizeof(*c->err_info)); 2732 err_dma_handle = h->errinfo_pool_dhandle 2733 + i * sizeof(*c->err_info); 2734 2735 c->cmdindex = i; 2736 2737 INIT_LIST_HEAD(&c->list); 2738 c->busaddr = (u32) cmd_dma_handle; 2739 temp64.val = (u64) err_dma_handle; 2740 c->ErrDesc.Addr.lower = temp64.val32.lower; 2741 c->ErrDesc.Addr.upper = temp64.val32.upper; 2742 c->ErrDesc.Len = sizeof(*c->err_info); 2743 2744 c->h = h; 2745 return c; 2746 } 2747 2748 /* For operations that can wait for kmalloc to possibly sleep, 2749 * this routine can be called. Lock need not be held to call 2750 * cmd_special_alloc. cmd_special_free() is the complement. 2751 */ 2752 static struct CommandList *cmd_special_alloc(struct ctlr_info *h) 2753 { 2754 struct CommandList *c; 2755 union u64bit temp64; 2756 dma_addr_t cmd_dma_handle, err_dma_handle; 2757 2758 c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle); 2759 if (c == NULL) 2760 return NULL; 2761 memset(c, 0, sizeof(*c)); 2762 2763 c->cmdindex = -1; 2764 2765 c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info), 2766 &err_dma_handle); 2767 2768 if (c->err_info == NULL) { 2769 pci_free_consistent(h->pdev, 2770 sizeof(*c), c, cmd_dma_handle); 2771 return NULL; 2772 } 2773 memset(c->err_info, 0, sizeof(*c->err_info)); 2774 2775 INIT_LIST_HEAD(&c->list); 2776 c->busaddr = (u32) cmd_dma_handle; 2777 temp64.val = (u64) err_dma_handle; 2778 c->ErrDesc.Addr.lower = temp64.val32.lower; 2779 c->ErrDesc.Addr.upper = temp64.val32.upper; 2780 c->ErrDesc.Len = sizeof(*c->err_info); 2781 2782 c->h = h; 2783 return c; 2784 } 2785 2786 static void cmd_free(struct ctlr_info *h, struct CommandList *c) 2787 { 2788 int i; 2789 unsigned long flags; 2790 2791 i = c - h->cmd_pool; 2792 spin_lock_irqsave(&h->lock, flags); 2793 clear_bit(i & (BITS_PER_LONG - 1), 2794 h->cmd_pool_bits + (i / BITS_PER_LONG)); 2795 spin_unlock_irqrestore(&h->lock, flags); 2796 } 2797 2798 static void cmd_special_free(struct ctlr_info *h, struct CommandList *c) 2799 { 2800 union u64bit temp64; 2801 2802 temp64.val32.lower = c->ErrDesc.Addr.lower; 2803 temp64.val32.upper = c->ErrDesc.Addr.upper; 2804 pci_free_consistent(h->pdev, sizeof(*c->err_info), 2805 c->err_info, (dma_addr_t) temp64.val); 2806 pci_free_consistent(h->pdev, sizeof(*c), 2807 c, (dma_addr_t) (c->busaddr & DIRECT_LOOKUP_MASK)); 2808 } 2809 2810 #ifdef CONFIG_COMPAT 2811 2812 static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg) 2813 { 2814 IOCTL32_Command_struct __user *arg32 = 2815 (IOCTL32_Command_struct __user *) arg; 2816 IOCTL_Command_struct arg64; 2817 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64)); 2818 int err; 2819 u32 cp; 2820 2821 memset(&arg64, 0, sizeof(arg64)); 2822 err = 0; 2823 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 2824 sizeof(arg64.LUN_info)); 2825 err |= copy_from_user(&arg64.Request, &arg32->Request, 2826 sizeof(arg64.Request)); 2827 err |= copy_from_user(&arg64.error_info, &arg32->error_info, 2828 sizeof(arg64.error_info)); 2829 err |= get_user(arg64.buf_size, &arg32->buf_size); 2830 err |= get_user(cp, &arg32->buf); 2831 arg64.buf = compat_ptr(cp); 2832 err |= copy_to_user(p, &arg64, sizeof(arg64)); 2833 2834 if (err) 2835 return -EFAULT; 2836 2837 err = hpsa_ioctl(dev, CCISS_PASSTHRU, (void *)p); 2838 if (err) 2839 return err; 2840 err |= copy_in_user(&arg32->error_info, &p->error_info, 2841 sizeof(arg32->error_info)); 2842 if (err) 2843 return -EFAULT; 2844 return err; 2845 } 2846 2847 static int hpsa_ioctl32_big_passthru(struct scsi_device *dev, 2848 int cmd, void *arg) 2849 { 2850 BIG_IOCTL32_Command_struct __user *arg32 = 2851 (BIG_IOCTL32_Command_struct __user *) arg; 2852 BIG_IOCTL_Command_struct arg64; 2853 BIG_IOCTL_Command_struct __user *p = 2854 compat_alloc_user_space(sizeof(arg64)); 2855 int err; 2856 u32 cp; 2857 2858 memset(&arg64, 0, sizeof(arg64)); 2859 err = 0; 2860 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 2861 sizeof(arg64.LUN_info)); 2862 err |= copy_from_user(&arg64.Request, &arg32->Request, 2863 sizeof(arg64.Request)); 2864 err |= copy_from_user(&arg64.error_info, &arg32->error_info, 2865 sizeof(arg64.error_info)); 2866 err |= get_user(arg64.buf_size, &arg32->buf_size); 2867 err |= get_user(arg64.malloc_size, &arg32->malloc_size); 2868 err |= get_user(cp, &arg32->buf); 2869 arg64.buf = compat_ptr(cp); 2870 err |= copy_to_user(p, &arg64, sizeof(arg64)); 2871 2872 if (err) 2873 return -EFAULT; 2874 2875 err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p); 2876 if (err) 2877 return err; 2878 err |= copy_in_user(&arg32->error_info, &p->error_info, 2879 sizeof(arg32->error_info)); 2880 if (err) 2881 return -EFAULT; 2882 return err; 2883 } 2884 2885 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg) 2886 { 2887 switch (cmd) { 2888 case CCISS_GETPCIINFO: 2889 case CCISS_GETINTINFO: 2890 case CCISS_SETINTINFO: 2891 case CCISS_GETNODENAME: 2892 case CCISS_SETNODENAME: 2893 case CCISS_GETHEARTBEAT: 2894 case CCISS_GETBUSTYPES: 2895 case CCISS_GETFIRMVER: 2896 case CCISS_GETDRIVVER: 2897 case CCISS_REVALIDVOLS: 2898 case CCISS_DEREGDISK: 2899 case CCISS_REGNEWDISK: 2900 case CCISS_REGNEWD: 2901 case CCISS_RESCANDISK: 2902 case CCISS_GETLUNINFO: 2903 return hpsa_ioctl(dev, cmd, arg); 2904 2905 case CCISS_PASSTHRU32: 2906 return hpsa_ioctl32_passthru(dev, cmd, arg); 2907 case CCISS_BIG_PASSTHRU32: 2908 return hpsa_ioctl32_big_passthru(dev, cmd, arg); 2909 2910 default: 2911 return -ENOIOCTLCMD; 2912 } 2913 } 2914 #endif 2915 2916 static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp) 2917 { 2918 struct hpsa_pci_info pciinfo; 2919 2920 if (!argp) 2921 return -EINVAL; 2922 pciinfo.domain = pci_domain_nr(h->pdev->bus); 2923 pciinfo.bus = h->pdev->bus->number; 2924 pciinfo.dev_fn = h->pdev->devfn; 2925 pciinfo.board_id = h->board_id; 2926 if (copy_to_user(argp, &pciinfo, sizeof(pciinfo))) 2927 return -EFAULT; 2928 return 0; 2929 } 2930 2931 static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp) 2932 { 2933 DriverVer_type DriverVer; 2934 unsigned char vmaj, vmin, vsubmin; 2935 int rc; 2936 2937 rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu", 2938 &vmaj, &vmin, &vsubmin); 2939 if (rc != 3) { 2940 dev_info(&h->pdev->dev, "driver version string '%s' " 2941 "unrecognized.", HPSA_DRIVER_VERSION); 2942 vmaj = 0; 2943 vmin = 0; 2944 vsubmin = 0; 2945 } 2946 DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin; 2947 if (!argp) 2948 return -EINVAL; 2949 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type))) 2950 return -EFAULT; 2951 return 0; 2952 } 2953 2954 static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp) 2955 { 2956 IOCTL_Command_struct iocommand; 2957 struct CommandList *c; 2958 char *buff = NULL; 2959 union u64bit temp64; 2960 int rc = 0; 2961 2962 if (!argp) 2963 return -EINVAL; 2964 if (!capable(CAP_SYS_RAWIO)) 2965 return -EPERM; 2966 if (copy_from_user(&iocommand, argp, sizeof(iocommand))) 2967 return -EFAULT; 2968 if ((iocommand.buf_size < 1) && 2969 (iocommand.Request.Type.Direction != XFER_NONE)) { 2970 return -EINVAL; 2971 } 2972 if (iocommand.buf_size > 0) { 2973 buff = kmalloc(iocommand.buf_size, GFP_KERNEL); 2974 if (buff == NULL) 2975 return -EFAULT; 2976 if (iocommand.Request.Type.Direction == XFER_WRITE) { 2977 /* Copy the data into the buffer we created */ 2978 if (copy_from_user(buff, iocommand.buf, 2979 iocommand.buf_size)) { 2980 rc = -EFAULT; 2981 goto out_kfree; 2982 } 2983 } else { 2984 memset(buff, 0, iocommand.buf_size); 2985 } 2986 } 2987 c = cmd_special_alloc(h); 2988 if (c == NULL) { 2989 rc = -ENOMEM; 2990 goto out_kfree; 2991 } 2992 /* Fill in the command type */ 2993 c->cmd_type = CMD_IOCTL_PEND; 2994 /* Fill in Command Header */ 2995 c->Header.ReplyQueue = 0; /* unused in simple mode */ 2996 if (iocommand.buf_size > 0) { /* buffer to fill */ 2997 c->Header.SGList = 1; 2998 c->Header.SGTotal = 1; 2999 } else { /* no buffers to fill */ 3000 c->Header.SGList = 0; 3001 c->Header.SGTotal = 0; 3002 } 3003 memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN)); 3004 /* use the kernel address the cmd block for tag */ 3005 c->Header.Tag.lower = c->busaddr; 3006 3007 /* Fill in Request block */ 3008 memcpy(&c->Request, &iocommand.Request, 3009 sizeof(c->Request)); 3010 3011 /* Fill in the scatter gather information */ 3012 if (iocommand.buf_size > 0) { 3013 temp64.val = pci_map_single(h->pdev, buff, 3014 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL); 3015 if (dma_mapping_error(&h->pdev->dev, temp64.val)) { 3016 c->SG[0].Addr.lower = 0; 3017 c->SG[0].Addr.upper = 0; 3018 c->SG[0].Len = 0; 3019 rc = -ENOMEM; 3020 goto out; 3021 } 3022 c->SG[0].Addr.lower = temp64.val32.lower; 3023 c->SG[0].Addr.upper = temp64.val32.upper; 3024 c->SG[0].Len = iocommand.buf_size; 3025 c->SG[0].Ext = 0; /* we are not chaining*/ 3026 } 3027 hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c); 3028 if (iocommand.buf_size > 0) 3029 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL); 3030 check_ioctl_unit_attention(h, c); 3031 3032 /* Copy the error information out */ 3033 memcpy(&iocommand.error_info, c->err_info, 3034 sizeof(iocommand.error_info)); 3035 if (copy_to_user(argp, &iocommand, sizeof(iocommand))) { 3036 rc = -EFAULT; 3037 goto out; 3038 } 3039 if (iocommand.Request.Type.Direction == XFER_READ && 3040 iocommand.buf_size > 0) { 3041 /* Copy the data out of the buffer we created */ 3042 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) { 3043 rc = -EFAULT; 3044 goto out; 3045 } 3046 } 3047 out: 3048 cmd_special_free(h, c); 3049 out_kfree: 3050 kfree(buff); 3051 return rc; 3052 } 3053 3054 static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp) 3055 { 3056 BIG_IOCTL_Command_struct *ioc; 3057 struct CommandList *c; 3058 unsigned char **buff = NULL; 3059 int *buff_size = NULL; 3060 union u64bit temp64; 3061 BYTE sg_used = 0; 3062 int status = 0; 3063 int i; 3064 u32 left; 3065 u32 sz; 3066 BYTE __user *data_ptr; 3067 3068 if (!argp) 3069 return -EINVAL; 3070 if (!capable(CAP_SYS_RAWIO)) 3071 return -EPERM; 3072 ioc = (BIG_IOCTL_Command_struct *) 3073 kmalloc(sizeof(*ioc), GFP_KERNEL); 3074 if (!ioc) { 3075 status = -ENOMEM; 3076 goto cleanup1; 3077 } 3078 if (copy_from_user(ioc, argp, sizeof(*ioc))) { 3079 status = -EFAULT; 3080 goto cleanup1; 3081 } 3082 if ((ioc->buf_size < 1) && 3083 (ioc->Request.Type.Direction != XFER_NONE)) { 3084 status = -EINVAL; 3085 goto cleanup1; 3086 } 3087 /* Check kmalloc limits using all SGs */ 3088 if (ioc->malloc_size > MAX_KMALLOC_SIZE) { 3089 status = -EINVAL; 3090 goto cleanup1; 3091 } 3092 if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) { 3093 status = -EINVAL; 3094 goto cleanup1; 3095 } 3096 buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL); 3097 if (!buff) { 3098 status = -ENOMEM; 3099 goto cleanup1; 3100 } 3101 buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL); 3102 if (!buff_size) { 3103 status = -ENOMEM; 3104 goto cleanup1; 3105 } 3106 left = ioc->buf_size; 3107 data_ptr = ioc->buf; 3108 while (left) { 3109 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left; 3110 buff_size[sg_used] = sz; 3111 buff[sg_used] = kmalloc(sz, GFP_KERNEL); 3112 if (buff[sg_used] == NULL) { 3113 status = -ENOMEM; 3114 goto cleanup1; 3115 } 3116 if (ioc->Request.Type.Direction == XFER_WRITE) { 3117 if (copy_from_user(buff[sg_used], data_ptr, sz)) { 3118 status = -ENOMEM; 3119 goto cleanup1; 3120 } 3121 } else 3122 memset(buff[sg_used], 0, sz); 3123 left -= sz; 3124 data_ptr += sz; 3125 sg_used++; 3126 } 3127 c = cmd_special_alloc(h); 3128 if (c == NULL) { 3129 status = -ENOMEM; 3130 goto cleanup1; 3131 } 3132 c->cmd_type = CMD_IOCTL_PEND; 3133 c->Header.ReplyQueue = 0; 3134 c->Header.SGList = c->Header.SGTotal = sg_used; 3135 memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN)); 3136 c->Header.Tag.lower = c->busaddr; 3137 memcpy(&c->Request, &ioc->Request, sizeof(c->Request)); 3138 if (ioc->buf_size > 0) { 3139 int i; 3140 for (i = 0; i < sg_used; i++) { 3141 temp64.val = pci_map_single(h->pdev, buff[i], 3142 buff_size[i], PCI_DMA_BIDIRECTIONAL); 3143 if (dma_mapping_error(&h->pdev->dev, temp64.val)) { 3144 c->SG[i].Addr.lower = 0; 3145 c->SG[i].Addr.upper = 0; 3146 c->SG[i].Len = 0; 3147 hpsa_pci_unmap(h->pdev, c, i, 3148 PCI_DMA_BIDIRECTIONAL); 3149 status = -ENOMEM; 3150 goto cleanup1; 3151 } 3152 c->SG[i].Addr.lower = temp64.val32.lower; 3153 c->SG[i].Addr.upper = temp64.val32.upper; 3154 c->SG[i].Len = buff_size[i]; 3155 /* we are not chaining */ 3156 c->SG[i].Ext = 0; 3157 } 3158 } 3159 hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c); 3160 if (sg_used) 3161 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL); 3162 check_ioctl_unit_attention(h, c); 3163 /* Copy the error information out */ 3164 memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info)); 3165 if (copy_to_user(argp, ioc, sizeof(*ioc))) { 3166 cmd_special_free(h, c); 3167 status = -EFAULT; 3168 goto cleanup1; 3169 } 3170 if (ioc->Request.Type.Direction == XFER_READ && ioc->buf_size > 0) { 3171 /* Copy the data out of the buffer we created */ 3172 BYTE __user *ptr = ioc->buf; 3173 for (i = 0; i < sg_used; i++) { 3174 if (copy_to_user(ptr, buff[i], buff_size[i])) { 3175 cmd_special_free(h, c); 3176 status = -EFAULT; 3177 goto cleanup1; 3178 } 3179 ptr += buff_size[i]; 3180 } 3181 } 3182 cmd_special_free(h, c); 3183 status = 0; 3184 cleanup1: 3185 if (buff) { 3186 for (i = 0; i < sg_used; i++) 3187 kfree(buff[i]); 3188 kfree(buff); 3189 } 3190 kfree(buff_size); 3191 kfree(ioc); 3192 return status; 3193 } 3194 3195 static void check_ioctl_unit_attention(struct ctlr_info *h, 3196 struct CommandList *c) 3197 { 3198 if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 3199 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) 3200 (void) check_for_unit_attention(h, c); 3201 } 3202 /* 3203 * ioctl 3204 */ 3205 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg) 3206 { 3207 struct ctlr_info *h; 3208 void __user *argp = (void __user *)arg; 3209 3210 h = sdev_to_hba(dev); 3211 3212 switch (cmd) { 3213 case CCISS_DEREGDISK: 3214 case CCISS_REGNEWDISK: 3215 case CCISS_REGNEWD: 3216 hpsa_scan_start(h->scsi_host); 3217 return 0; 3218 case CCISS_GETPCIINFO: 3219 return hpsa_getpciinfo_ioctl(h, argp); 3220 case CCISS_GETDRIVVER: 3221 return hpsa_getdrivver_ioctl(h, argp); 3222 case CCISS_PASSTHRU: 3223 return hpsa_passthru_ioctl(h, argp); 3224 case CCISS_BIG_PASSTHRU: 3225 return hpsa_big_passthru_ioctl(h, argp); 3226 default: 3227 return -ENOTTY; 3228 } 3229 } 3230 3231 static int hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr, 3232 u8 reset_type) 3233 { 3234 struct CommandList *c; 3235 3236 c = cmd_alloc(h); 3237 if (!c) 3238 return -ENOMEM; 3239 /* fill_cmd can't fail here, no data buffer to map */ 3240 (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, 3241 RAID_CTLR_LUNID, TYPE_MSG); 3242 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */ 3243 c->waiting = NULL; 3244 enqueue_cmd_and_start_io(h, c); 3245 /* Don't wait for completion, the reset won't complete. Don't free 3246 * the command either. This is the last command we will send before 3247 * re-initializing everything, so it doesn't matter and won't leak. 3248 */ 3249 return 0; 3250 } 3251 3252 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 3253 void *buff, size_t size, u8 page_code, unsigned char *scsi3addr, 3254 int cmd_type) 3255 { 3256 int pci_dir = XFER_NONE; 3257 struct CommandList *a; /* for commands to be aborted */ 3258 3259 c->cmd_type = CMD_IOCTL_PEND; 3260 c->Header.ReplyQueue = 0; 3261 if (buff != NULL && size > 0) { 3262 c->Header.SGList = 1; 3263 c->Header.SGTotal = 1; 3264 } else { 3265 c->Header.SGList = 0; 3266 c->Header.SGTotal = 0; 3267 } 3268 c->Header.Tag.lower = c->busaddr; 3269 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8); 3270 3271 c->Request.Type.Type = cmd_type; 3272 if (cmd_type == TYPE_CMD) { 3273 switch (cmd) { 3274 case HPSA_INQUIRY: 3275 /* are we trying to read a vital product page */ 3276 if (page_code != 0) { 3277 c->Request.CDB[1] = 0x01; 3278 c->Request.CDB[2] = page_code; 3279 } 3280 c->Request.CDBLen = 6; 3281 c->Request.Type.Attribute = ATTR_SIMPLE; 3282 c->Request.Type.Direction = XFER_READ; 3283 c->Request.Timeout = 0; 3284 c->Request.CDB[0] = HPSA_INQUIRY; 3285 c->Request.CDB[4] = size & 0xFF; 3286 break; 3287 case HPSA_REPORT_LOG: 3288 case HPSA_REPORT_PHYS: 3289 /* Talking to controller so It's a physical command 3290 mode = 00 target = 0. Nothing to write. 3291 */ 3292 c->Request.CDBLen = 12; 3293 c->Request.Type.Attribute = ATTR_SIMPLE; 3294 c->Request.Type.Direction = XFER_READ; 3295 c->Request.Timeout = 0; 3296 c->Request.CDB[0] = cmd; 3297 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 3298 c->Request.CDB[7] = (size >> 16) & 0xFF; 3299 c->Request.CDB[8] = (size >> 8) & 0xFF; 3300 c->Request.CDB[9] = size & 0xFF; 3301 break; 3302 case HPSA_CACHE_FLUSH: 3303 c->Request.CDBLen = 12; 3304 c->Request.Type.Attribute = ATTR_SIMPLE; 3305 c->Request.Type.Direction = XFER_WRITE; 3306 c->Request.Timeout = 0; 3307 c->Request.CDB[0] = BMIC_WRITE; 3308 c->Request.CDB[6] = BMIC_CACHE_FLUSH; 3309 c->Request.CDB[7] = (size >> 8) & 0xFF; 3310 c->Request.CDB[8] = size & 0xFF; 3311 break; 3312 case TEST_UNIT_READY: 3313 c->Request.CDBLen = 6; 3314 c->Request.Type.Attribute = ATTR_SIMPLE; 3315 c->Request.Type.Direction = XFER_NONE; 3316 c->Request.Timeout = 0; 3317 break; 3318 default: 3319 dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd); 3320 BUG(); 3321 return -1; 3322 } 3323 } else if (cmd_type == TYPE_MSG) { 3324 switch (cmd) { 3325 3326 case HPSA_DEVICE_RESET_MSG: 3327 c->Request.CDBLen = 16; 3328 c->Request.Type.Type = 1; /* It is a MSG not a CMD */ 3329 c->Request.Type.Attribute = ATTR_SIMPLE; 3330 c->Request.Type.Direction = XFER_NONE; 3331 c->Request.Timeout = 0; /* Don't time out */ 3332 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 3333 c->Request.CDB[0] = cmd; 3334 c->Request.CDB[1] = HPSA_RESET_TYPE_LUN; 3335 /* If bytes 4-7 are zero, it means reset the */ 3336 /* LunID device */ 3337 c->Request.CDB[4] = 0x00; 3338 c->Request.CDB[5] = 0x00; 3339 c->Request.CDB[6] = 0x00; 3340 c->Request.CDB[7] = 0x00; 3341 break; 3342 case HPSA_ABORT_MSG: 3343 a = buff; /* point to command to be aborted */ 3344 dev_dbg(&h->pdev->dev, "Abort Tag:0x%08x:%08x using request Tag:0x%08x:%08x\n", 3345 a->Header.Tag.upper, a->Header.Tag.lower, 3346 c->Header.Tag.upper, c->Header.Tag.lower); 3347 c->Request.CDBLen = 16; 3348 c->Request.Type.Type = TYPE_MSG; 3349 c->Request.Type.Attribute = ATTR_SIMPLE; 3350 c->Request.Type.Direction = XFER_WRITE; 3351 c->Request.Timeout = 0; /* Don't time out */ 3352 c->Request.CDB[0] = HPSA_TASK_MANAGEMENT; 3353 c->Request.CDB[1] = HPSA_TMF_ABORT_TASK; 3354 c->Request.CDB[2] = 0x00; /* reserved */ 3355 c->Request.CDB[3] = 0x00; /* reserved */ 3356 /* Tag to abort goes in CDB[4]-CDB[11] */ 3357 c->Request.CDB[4] = a->Header.Tag.lower & 0xFF; 3358 c->Request.CDB[5] = (a->Header.Tag.lower >> 8) & 0xFF; 3359 c->Request.CDB[6] = (a->Header.Tag.lower >> 16) & 0xFF; 3360 c->Request.CDB[7] = (a->Header.Tag.lower >> 24) & 0xFF; 3361 c->Request.CDB[8] = a->Header.Tag.upper & 0xFF; 3362 c->Request.CDB[9] = (a->Header.Tag.upper >> 8) & 0xFF; 3363 c->Request.CDB[10] = (a->Header.Tag.upper >> 16) & 0xFF; 3364 c->Request.CDB[11] = (a->Header.Tag.upper >> 24) & 0xFF; 3365 c->Request.CDB[12] = 0x00; /* reserved */ 3366 c->Request.CDB[13] = 0x00; /* reserved */ 3367 c->Request.CDB[14] = 0x00; /* reserved */ 3368 c->Request.CDB[15] = 0x00; /* reserved */ 3369 break; 3370 default: 3371 dev_warn(&h->pdev->dev, "unknown message type %d\n", 3372 cmd); 3373 BUG(); 3374 } 3375 } else { 3376 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type); 3377 BUG(); 3378 } 3379 3380 switch (c->Request.Type.Direction) { 3381 case XFER_READ: 3382 pci_dir = PCI_DMA_FROMDEVICE; 3383 break; 3384 case XFER_WRITE: 3385 pci_dir = PCI_DMA_TODEVICE; 3386 break; 3387 case XFER_NONE: 3388 pci_dir = PCI_DMA_NONE; 3389 break; 3390 default: 3391 pci_dir = PCI_DMA_BIDIRECTIONAL; 3392 } 3393 if (hpsa_map_one(h->pdev, c, buff, size, pci_dir)) 3394 return -1; 3395 return 0; 3396 } 3397 3398 /* 3399 * Map (physical) PCI mem into (virtual) kernel space 3400 */ 3401 static void __iomem *remap_pci_mem(ulong base, ulong size) 3402 { 3403 ulong page_base = ((ulong) base) & PAGE_MASK; 3404 ulong page_offs = ((ulong) base) - page_base; 3405 void __iomem *page_remapped = ioremap_nocache(page_base, 3406 page_offs + size); 3407 3408 return page_remapped ? (page_remapped + page_offs) : NULL; 3409 } 3410 3411 /* Takes cmds off the submission queue and sends them to the hardware, 3412 * then puts them on the queue of cmds waiting for completion. 3413 */ 3414 static void start_io(struct ctlr_info *h) 3415 { 3416 struct CommandList *c; 3417 unsigned long flags; 3418 3419 spin_lock_irqsave(&h->lock, flags); 3420 while (!list_empty(&h->reqQ)) { 3421 c = list_entry(h->reqQ.next, struct CommandList, list); 3422 /* can't do anything if fifo is full */ 3423 if ((h->access.fifo_full(h))) { 3424 dev_warn(&h->pdev->dev, "fifo full\n"); 3425 break; 3426 } 3427 3428 /* Get the first entry from the Request Q */ 3429 removeQ(c); 3430 h->Qdepth--; 3431 3432 /* Put job onto the completed Q */ 3433 addQ(&h->cmpQ, c); 3434 3435 /* Must increment commands_outstanding before unlocking 3436 * and submitting to avoid race checking for fifo full 3437 * condition. 3438 */ 3439 h->commands_outstanding++; 3440 if (h->commands_outstanding > h->max_outstanding) 3441 h->max_outstanding = h->commands_outstanding; 3442 3443 /* Tell the controller execute command */ 3444 spin_unlock_irqrestore(&h->lock, flags); 3445 h->access.submit_command(h, c); 3446 spin_lock_irqsave(&h->lock, flags); 3447 } 3448 spin_unlock_irqrestore(&h->lock, flags); 3449 } 3450 3451 static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q) 3452 { 3453 return h->access.command_completed(h, q); 3454 } 3455 3456 static inline bool interrupt_pending(struct ctlr_info *h) 3457 { 3458 return h->access.intr_pending(h); 3459 } 3460 3461 static inline long interrupt_not_for_us(struct ctlr_info *h) 3462 { 3463 return (h->access.intr_pending(h) == 0) || 3464 (h->interrupts_enabled == 0); 3465 } 3466 3467 static inline int bad_tag(struct ctlr_info *h, u32 tag_index, 3468 u32 raw_tag) 3469 { 3470 if (unlikely(tag_index >= h->nr_cmds)) { 3471 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag); 3472 return 1; 3473 } 3474 return 0; 3475 } 3476 3477 static inline void finish_cmd(struct CommandList *c) 3478 { 3479 unsigned long flags; 3480 3481 spin_lock_irqsave(&c->h->lock, flags); 3482 removeQ(c); 3483 spin_unlock_irqrestore(&c->h->lock, flags); 3484 dial_up_lockup_detection_on_fw_flash_complete(c->h, c); 3485 if (likely(c->cmd_type == CMD_SCSI)) 3486 complete_scsi_command(c); 3487 else if (c->cmd_type == CMD_IOCTL_PEND) 3488 complete(c->waiting); 3489 } 3490 3491 static inline u32 hpsa_tag_contains_index(u32 tag) 3492 { 3493 return tag & DIRECT_LOOKUP_BIT; 3494 } 3495 3496 static inline u32 hpsa_tag_to_index(u32 tag) 3497 { 3498 return tag >> DIRECT_LOOKUP_SHIFT; 3499 } 3500 3501 3502 static inline u32 hpsa_tag_discard_error_bits(struct ctlr_info *h, u32 tag) 3503 { 3504 #define HPSA_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1) 3505 #define HPSA_SIMPLE_ERROR_BITS 0x03 3506 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant))) 3507 return tag & ~HPSA_SIMPLE_ERROR_BITS; 3508 return tag & ~HPSA_PERF_ERROR_BITS; 3509 } 3510 3511 /* process completion of an indexed ("direct lookup") command */ 3512 static inline void process_indexed_cmd(struct ctlr_info *h, 3513 u32 raw_tag) 3514 { 3515 u32 tag_index; 3516 struct CommandList *c; 3517 3518 tag_index = hpsa_tag_to_index(raw_tag); 3519 if (!bad_tag(h, tag_index, raw_tag)) { 3520 c = h->cmd_pool + tag_index; 3521 finish_cmd(c); 3522 } 3523 } 3524 3525 /* process completion of a non-indexed command */ 3526 static inline void process_nonindexed_cmd(struct ctlr_info *h, 3527 u32 raw_tag) 3528 { 3529 u32 tag; 3530 struct CommandList *c = NULL; 3531 unsigned long flags; 3532 3533 tag = hpsa_tag_discard_error_bits(h, raw_tag); 3534 spin_lock_irqsave(&h->lock, flags); 3535 list_for_each_entry(c, &h->cmpQ, list) { 3536 if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) { 3537 spin_unlock_irqrestore(&h->lock, flags); 3538 finish_cmd(c); 3539 return; 3540 } 3541 } 3542 spin_unlock_irqrestore(&h->lock, flags); 3543 bad_tag(h, h->nr_cmds + 1, raw_tag); 3544 } 3545 3546 /* Some controllers, like p400, will give us one interrupt 3547 * after a soft reset, even if we turned interrupts off. 3548 * Only need to check for this in the hpsa_xxx_discard_completions 3549 * functions. 3550 */ 3551 static int ignore_bogus_interrupt(struct ctlr_info *h) 3552 { 3553 if (likely(!reset_devices)) 3554 return 0; 3555 3556 if (likely(h->interrupts_enabled)) 3557 return 0; 3558 3559 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled " 3560 "(known firmware bug.) Ignoring.\n"); 3561 3562 return 1; 3563 } 3564 3565 /* 3566 * Convert &h->q[x] (passed to interrupt handlers) back to h. 3567 * Relies on (h-q[x] == x) being true for x such that 3568 * 0 <= x < MAX_REPLY_QUEUES. 3569 */ 3570 static struct ctlr_info *queue_to_hba(u8 *queue) 3571 { 3572 return container_of((queue - *queue), struct ctlr_info, q[0]); 3573 } 3574 3575 static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue) 3576 { 3577 struct ctlr_info *h = queue_to_hba(queue); 3578 u8 q = *(u8 *) queue; 3579 u32 raw_tag; 3580 3581 if (ignore_bogus_interrupt(h)) 3582 return IRQ_NONE; 3583 3584 if (interrupt_not_for_us(h)) 3585 return IRQ_NONE; 3586 h->last_intr_timestamp = get_jiffies_64(); 3587 while (interrupt_pending(h)) { 3588 raw_tag = get_next_completion(h, q); 3589 while (raw_tag != FIFO_EMPTY) 3590 raw_tag = next_command(h, q); 3591 } 3592 return IRQ_HANDLED; 3593 } 3594 3595 static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue) 3596 { 3597 struct ctlr_info *h = queue_to_hba(queue); 3598 u32 raw_tag; 3599 u8 q = *(u8 *) queue; 3600 3601 if (ignore_bogus_interrupt(h)) 3602 return IRQ_NONE; 3603 3604 h->last_intr_timestamp = get_jiffies_64(); 3605 raw_tag = get_next_completion(h, q); 3606 while (raw_tag != FIFO_EMPTY) 3607 raw_tag = next_command(h, q); 3608 return IRQ_HANDLED; 3609 } 3610 3611 static irqreturn_t do_hpsa_intr_intx(int irq, void *queue) 3612 { 3613 struct ctlr_info *h = queue_to_hba((u8 *) queue); 3614 u32 raw_tag; 3615 u8 q = *(u8 *) queue; 3616 3617 if (interrupt_not_for_us(h)) 3618 return IRQ_NONE; 3619 h->last_intr_timestamp = get_jiffies_64(); 3620 while (interrupt_pending(h)) { 3621 raw_tag = get_next_completion(h, q); 3622 while (raw_tag != FIFO_EMPTY) { 3623 if (likely(hpsa_tag_contains_index(raw_tag))) 3624 process_indexed_cmd(h, raw_tag); 3625 else 3626 process_nonindexed_cmd(h, raw_tag); 3627 raw_tag = next_command(h, q); 3628 } 3629 } 3630 return IRQ_HANDLED; 3631 } 3632 3633 static irqreturn_t do_hpsa_intr_msi(int irq, void *queue) 3634 { 3635 struct ctlr_info *h = queue_to_hba(queue); 3636 u32 raw_tag; 3637 u8 q = *(u8 *) queue; 3638 3639 h->last_intr_timestamp = get_jiffies_64(); 3640 raw_tag = get_next_completion(h, q); 3641 while (raw_tag != FIFO_EMPTY) { 3642 if (likely(hpsa_tag_contains_index(raw_tag))) 3643 process_indexed_cmd(h, raw_tag); 3644 else 3645 process_nonindexed_cmd(h, raw_tag); 3646 raw_tag = next_command(h, q); 3647 } 3648 return IRQ_HANDLED; 3649 } 3650 3651 /* Send a message CDB to the firmware. Careful, this only works 3652 * in simple mode, not performant mode due to the tag lookup. 3653 * We only ever use this immediately after a controller reset. 3654 */ 3655 static int hpsa_message(struct pci_dev *pdev, unsigned char opcode, 3656 unsigned char type) 3657 { 3658 struct Command { 3659 struct CommandListHeader CommandHeader; 3660 struct RequestBlock Request; 3661 struct ErrDescriptor ErrorDescriptor; 3662 }; 3663 struct Command *cmd; 3664 static const size_t cmd_sz = sizeof(*cmd) + 3665 sizeof(cmd->ErrorDescriptor); 3666 dma_addr_t paddr64; 3667 uint32_t paddr32, tag; 3668 void __iomem *vaddr; 3669 int i, err; 3670 3671 vaddr = pci_ioremap_bar(pdev, 0); 3672 if (vaddr == NULL) 3673 return -ENOMEM; 3674 3675 /* The Inbound Post Queue only accepts 32-bit physical addresses for the 3676 * CCISS commands, so they must be allocated from the lower 4GiB of 3677 * memory. 3678 */ 3679 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 3680 if (err) { 3681 iounmap(vaddr); 3682 return -ENOMEM; 3683 } 3684 3685 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64); 3686 if (cmd == NULL) { 3687 iounmap(vaddr); 3688 return -ENOMEM; 3689 } 3690 3691 /* This must fit, because of the 32-bit consistent DMA mask. Also, 3692 * although there's no guarantee, we assume that the address is at 3693 * least 4-byte aligned (most likely, it's page-aligned). 3694 */ 3695 paddr32 = paddr64; 3696 3697 cmd->CommandHeader.ReplyQueue = 0; 3698 cmd->CommandHeader.SGList = 0; 3699 cmd->CommandHeader.SGTotal = 0; 3700 cmd->CommandHeader.Tag.lower = paddr32; 3701 cmd->CommandHeader.Tag.upper = 0; 3702 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8); 3703 3704 cmd->Request.CDBLen = 16; 3705 cmd->Request.Type.Type = TYPE_MSG; 3706 cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE; 3707 cmd->Request.Type.Direction = XFER_NONE; 3708 cmd->Request.Timeout = 0; /* Don't time out */ 3709 cmd->Request.CDB[0] = opcode; 3710 cmd->Request.CDB[1] = type; 3711 memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */ 3712 cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd); 3713 cmd->ErrorDescriptor.Addr.upper = 0; 3714 cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo); 3715 3716 writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET); 3717 3718 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) { 3719 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET); 3720 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr32) 3721 break; 3722 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS); 3723 } 3724 3725 iounmap(vaddr); 3726 3727 /* we leak the DMA buffer here ... no choice since the controller could 3728 * still complete the command. 3729 */ 3730 if (i == HPSA_MSG_SEND_RETRY_LIMIT) { 3731 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n", 3732 opcode, type); 3733 return -ETIMEDOUT; 3734 } 3735 3736 pci_free_consistent(pdev, cmd_sz, cmd, paddr64); 3737 3738 if (tag & HPSA_ERROR_BIT) { 3739 dev_err(&pdev->dev, "controller message %02x:%02x failed\n", 3740 opcode, type); 3741 return -EIO; 3742 } 3743 3744 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n", 3745 opcode, type); 3746 return 0; 3747 } 3748 3749 #define hpsa_noop(p) hpsa_message(p, 3, 0) 3750 3751 static int hpsa_controller_hard_reset(struct pci_dev *pdev, 3752 void * __iomem vaddr, u32 use_doorbell) 3753 { 3754 u16 pmcsr; 3755 int pos; 3756 3757 if (use_doorbell) { 3758 /* For everything after the P600, the PCI power state method 3759 * of resetting the controller doesn't work, so we have this 3760 * other way using the doorbell register. 3761 */ 3762 dev_info(&pdev->dev, "using doorbell to reset controller\n"); 3763 writel(use_doorbell, vaddr + SA5_DOORBELL); 3764 } else { /* Try to do it the PCI power state way */ 3765 3766 /* Quoting from the Open CISS Specification: "The Power 3767 * Management Control/Status Register (CSR) controls the power 3768 * state of the device. The normal operating state is D0, 3769 * CSR=00h. The software off state is D3, CSR=03h. To reset 3770 * the controller, place the interface device in D3 then to D0, 3771 * this causes a secondary PCI reset which will reset the 3772 * controller." */ 3773 3774 pos = pci_find_capability(pdev, PCI_CAP_ID_PM); 3775 if (pos == 0) { 3776 dev_err(&pdev->dev, 3777 "hpsa_reset_controller: " 3778 "PCI PM not supported\n"); 3779 return -ENODEV; 3780 } 3781 dev_info(&pdev->dev, "using PCI PM to reset controller\n"); 3782 /* enter the D3hot power management state */ 3783 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr); 3784 pmcsr &= ~PCI_PM_CTRL_STATE_MASK; 3785 pmcsr |= PCI_D3hot; 3786 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr); 3787 3788 msleep(500); 3789 3790 /* enter the D0 power management state */ 3791 pmcsr &= ~PCI_PM_CTRL_STATE_MASK; 3792 pmcsr |= PCI_D0; 3793 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr); 3794 3795 /* 3796 * The P600 requires a small delay when changing states. 3797 * Otherwise we may think the board did not reset and we bail. 3798 * This for kdump only and is particular to the P600. 3799 */ 3800 msleep(500); 3801 } 3802 return 0; 3803 } 3804 3805 static void init_driver_version(char *driver_version, int len) 3806 { 3807 memset(driver_version, 0, len); 3808 strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1); 3809 } 3810 3811 static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable) 3812 { 3813 char *driver_version; 3814 int i, size = sizeof(cfgtable->driver_version); 3815 3816 driver_version = kmalloc(size, GFP_KERNEL); 3817 if (!driver_version) 3818 return -ENOMEM; 3819 3820 init_driver_version(driver_version, size); 3821 for (i = 0; i < size; i++) 3822 writeb(driver_version[i], &cfgtable->driver_version[i]); 3823 kfree(driver_version); 3824 return 0; 3825 } 3826 3827 static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable, 3828 unsigned char *driver_ver) 3829 { 3830 int i; 3831 3832 for (i = 0; i < sizeof(cfgtable->driver_version); i++) 3833 driver_ver[i] = readb(&cfgtable->driver_version[i]); 3834 } 3835 3836 static int controller_reset_failed(struct CfgTable __iomem *cfgtable) 3837 { 3838 3839 char *driver_ver, *old_driver_ver; 3840 int rc, size = sizeof(cfgtable->driver_version); 3841 3842 old_driver_ver = kmalloc(2 * size, GFP_KERNEL); 3843 if (!old_driver_ver) 3844 return -ENOMEM; 3845 driver_ver = old_driver_ver + size; 3846 3847 /* After a reset, the 32 bytes of "driver version" in the cfgtable 3848 * should have been changed, otherwise we know the reset failed. 3849 */ 3850 init_driver_version(old_driver_ver, size); 3851 read_driver_ver_from_cfgtable(cfgtable, driver_ver); 3852 rc = !memcmp(driver_ver, old_driver_ver, size); 3853 kfree(old_driver_ver); 3854 return rc; 3855 } 3856 /* This does a hard reset of the controller using PCI power management 3857 * states or the using the doorbell register. 3858 */ 3859 static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev) 3860 { 3861 u64 cfg_offset; 3862 u32 cfg_base_addr; 3863 u64 cfg_base_addr_index; 3864 void __iomem *vaddr; 3865 unsigned long paddr; 3866 u32 misc_fw_support; 3867 int rc; 3868 struct CfgTable __iomem *cfgtable; 3869 u32 use_doorbell; 3870 u32 board_id; 3871 u16 command_register; 3872 3873 /* For controllers as old as the P600, this is very nearly 3874 * the same thing as 3875 * 3876 * pci_save_state(pci_dev); 3877 * pci_set_power_state(pci_dev, PCI_D3hot); 3878 * pci_set_power_state(pci_dev, PCI_D0); 3879 * pci_restore_state(pci_dev); 3880 * 3881 * For controllers newer than the P600, the pci power state 3882 * method of resetting doesn't work so we have another way 3883 * using the doorbell register. 3884 */ 3885 3886 rc = hpsa_lookup_board_id(pdev, &board_id); 3887 if (rc < 0 || !ctlr_is_resettable(board_id)) { 3888 dev_warn(&pdev->dev, "Not resetting device.\n"); 3889 return -ENODEV; 3890 } 3891 3892 /* if controller is soft- but not hard resettable... */ 3893 if (!ctlr_is_hard_resettable(board_id)) 3894 return -ENOTSUPP; /* try soft reset later. */ 3895 3896 /* Save the PCI command register */ 3897 pci_read_config_word(pdev, 4, &command_register); 3898 /* Turn the board off. This is so that later pci_restore_state() 3899 * won't turn the board on before the rest of config space is ready. 3900 */ 3901 pci_disable_device(pdev); 3902 pci_save_state(pdev); 3903 3904 /* find the first memory BAR, so we can find the cfg table */ 3905 rc = hpsa_pci_find_memory_BAR(pdev, &paddr); 3906 if (rc) 3907 return rc; 3908 vaddr = remap_pci_mem(paddr, 0x250); 3909 if (!vaddr) 3910 return -ENOMEM; 3911 3912 /* find cfgtable in order to check if reset via doorbell is supported */ 3913 rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr, 3914 &cfg_base_addr_index, &cfg_offset); 3915 if (rc) 3916 goto unmap_vaddr; 3917 cfgtable = remap_pci_mem(pci_resource_start(pdev, 3918 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable)); 3919 if (!cfgtable) { 3920 rc = -ENOMEM; 3921 goto unmap_vaddr; 3922 } 3923 rc = write_driver_ver_to_cfgtable(cfgtable); 3924 if (rc) 3925 goto unmap_vaddr; 3926 3927 /* If reset via doorbell register is supported, use that. 3928 * There are two such methods. Favor the newest method. 3929 */ 3930 misc_fw_support = readl(&cfgtable->misc_fw_support); 3931 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2; 3932 if (use_doorbell) { 3933 use_doorbell = DOORBELL_CTLR_RESET2; 3934 } else { 3935 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET; 3936 if (use_doorbell) { 3937 dev_warn(&pdev->dev, "Soft reset not supported. " 3938 "Firmware update is required.\n"); 3939 rc = -ENOTSUPP; /* try soft reset */ 3940 goto unmap_cfgtable; 3941 } 3942 } 3943 3944 rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell); 3945 if (rc) 3946 goto unmap_cfgtable; 3947 3948 pci_restore_state(pdev); 3949 rc = pci_enable_device(pdev); 3950 if (rc) { 3951 dev_warn(&pdev->dev, "failed to enable device.\n"); 3952 goto unmap_cfgtable; 3953 } 3954 pci_write_config_word(pdev, 4, command_register); 3955 3956 /* Some devices (notably the HP Smart Array 5i Controller) 3957 need a little pause here */ 3958 msleep(HPSA_POST_RESET_PAUSE_MSECS); 3959 3960 /* Wait for board to become not ready, then ready. */ 3961 dev_info(&pdev->dev, "Waiting for board to reset.\n"); 3962 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY); 3963 if (rc) { 3964 dev_warn(&pdev->dev, 3965 "failed waiting for board to reset." 3966 " Will try soft reset.\n"); 3967 rc = -ENOTSUPP; /* Not expected, but try soft reset later */ 3968 goto unmap_cfgtable; 3969 } 3970 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY); 3971 if (rc) { 3972 dev_warn(&pdev->dev, 3973 "failed waiting for board to become ready " 3974 "after hard reset\n"); 3975 goto unmap_cfgtable; 3976 } 3977 3978 rc = controller_reset_failed(vaddr); 3979 if (rc < 0) 3980 goto unmap_cfgtable; 3981 if (rc) { 3982 dev_warn(&pdev->dev, "Unable to successfully reset " 3983 "controller. Will try soft reset.\n"); 3984 rc = -ENOTSUPP; 3985 } else { 3986 dev_info(&pdev->dev, "board ready after hard reset.\n"); 3987 } 3988 3989 unmap_cfgtable: 3990 iounmap(cfgtable); 3991 3992 unmap_vaddr: 3993 iounmap(vaddr); 3994 return rc; 3995 } 3996 3997 /* 3998 * We cannot read the structure directly, for portability we must use 3999 * the io functions. 4000 * This is for debug only. 4001 */ 4002 static void print_cfg_table(struct device *dev, struct CfgTable *tb) 4003 { 4004 #ifdef HPSA_DEBUG 4005 int i; 4006 char temp_name[17]; 4007 4008 dev_info(dev, "Controller Configuration information\n"); 4009 dev_info(dev, "------------------------------------\n"); 4010 for (i = 0; i < 4; i++) 4011 temp_name[i] = readb(&(tb->Signature[i])); 4012 temp_name[4] = '\0'; 4013 dev_info(dev, " Signature = %s\n", temp_name); 4014 dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence))); 4015 dev_info(dev, " Transport methods supported = 0x%x\n", 4016 readl(&(tb->TransportSupport))); 4017 dev_info(dev, " Transport methods active = 0x%x\n", 4018 readl(&(tb->TransportActive))); 4019 dev_info(dev, " Requested transport Method = 0x%x\n", 4020 readl(&(tb->HostWrite.TransportRequest))); 4021 dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n", 4022 readl(&(tb->HostWrite.CoalIntDelay))); 4023 dev_info(dev, " Coalesce Interrupt Count = 0x%x\n", 4024 readl(&(tb->HostWrite.CoalIntCount))); 4025 dev_info(dev, " Max outstanding commands = 0x%d\n", 4026 readl(&(tb->CmdsOutMax))); 4027 dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes))); 4028 for (i = 0; i < 16; i++) 4029 temp_name[i] = readb(&(tb->ServerName[i])); 4030 temp_name[16] = '\0'; 4031 dev_info(dev, " Server Name = %s\n", temp_name); 4032 dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n", 4033 readl(&(tb->HeartBeat))); 4034 #endif /* HPSA_DEBUG */ 4035 } 4036 4037 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr) 4038 { 4039 int i, offset, mem_type, bar_type; 4040 4041 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */ 4042 return 0; 4043 offset = 0; 4044 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { 4045 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE; 4046 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO) 4047 offset += 4; 4048 else { 4049 mem_type = pci_resource_flags(pdev, i) & 4050 PCI_BASE_ADDRESS_MEM_TYPE_MASK; 4051 switch (mem_type) { 4052 case PCI_BASE_ADDRESS_MEM_TYPE_32: 4053 case PCI_BASE_ADDRESS_MEM_TYPE_1M: 4054 offset += 4; /* 32 bit */ 4055 break; 4056 case PCI_BASE_ADDRESS_MEM_TYPE_64: 4057 offset += 8; 4058 break; 4059 default: /* reserved in PCI 2.2 */ 4060 dev_warn(&pdev->dev, 4061 "base address is invalid\n"); 4062 return -1; 4063 break; 4064 } 4065 } 4066 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0) 4067 return i + 1; 4068 } 4069 return -1; 4070 } 4071 4072 /* If MSI/MSI-X is supported by the kernel we will try to enable it on 4073 * controllers that are capable. If not, we use IO-APIC mode. 4074 */ 4075 4076 static void hpsa_interrupt_mode(struct ctlr_info *h) 4077 { 4078 #ifdef CONFIG_PCI_MSI 4079 int err, i; 4080 struct msix_entry hpsa_msix_entries[MAX_REPLY_QUEUES]; 4081 4082 for (i = 0; i < MAX_REPLY_QUEUES; i++) { 4083 hpsa_msix_entries[i].vector = 0; 4084 hpsa_msix_entries[i].entry = i; 4085 } 4086 4087 /* Some boards advertise MSI but don't really support it */ 4088 if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) || 4089 (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11)) 4090 goto default_int_mode; 4091 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) { 4092 dev_info(&h->pdev->dev, "MSIX\n"); 4093 err = pci_enable_msix(h->pdev, hpsa_msix_entries, 4094 MAX_REPLY_QUEUES); 4095 if (!err) { 4096 for (i = 0; i < MAX_REPLY_QUEUES; i++) 4097 h->intr[i] = hpsa_msix_entries[i].vector; 4098 h->msix_vector = 1; 4099 return; 4100 } 4101 if (err > 0) { 4102 dev_warn(&h->pdev->dev, "only %d MSI-X vectors " 4103 "available\n", err); 4104 goto default_int_mode; 4105 } else { 4106 dev_warn(&h->pdev->dev, "MSI-X init failed %d\n", 4107 err); 4108 goto default_int_mode; 4109 } 4110 } 4111 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) { 4112 dev_info(&h->pdev->dev, "MSI\n"); 4113 if (!pci_enable_msi(h->pdev)) 4114 h->msi_vector = 1; 4115 else 4116 dev_warn(&h->pdev->dev, "MSI init failed\n"); 4117 } 4118 default_int_mode: 4119 #endif /* CONFIG_PCI_MSI */ 4120 /* if we get here we're going to use the default interrupt mode */ 4121 h->intr[h->intr_mode] = h->pdev->irq; 4122 } 4123 4124 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id) 4125 { 4126 int i; 4127 u32 subsystem_vendor_id, subsystem_device_id; 4128 4129 subsystem_vendor_id = pdev->subsystem_vendor; 4130 subsystem_device_id = pdev->subsystem_device; 4131 *board_id = ((subsystem_device_id << 16) & 0xffff0000) | 4132 subsystem_vendor_id; 4133 4134 for (i = 0; i < ARRAY_SIZE(products); i++) 4135 if (*board_id == products[i].board_id) 4136 return i; 4137 4138 if ((subsystem_vendor_id != PCI_VENDOR_ID_HP && 4139 subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) || 4140 !hpsa_allow_any) { 4141 dev_warn(&pdev->dev, "unrecognized board ID: " 4142 "0x%08x, ignoring.\n", *board_id); 4143 return -ENODEV; 4144 } 4145 return ARRAY_SIZE(products) - 1; /* generic unknown smart array */ 4146 } 4147 4148 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 4149 unsigned long *memory_bar) 4150 { 4151 int i; 4152 4153 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) 4154 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) { 4155 /* addressing mode bits already removed */ 4156 *memory_bar = pci_resource_start(pdev, i); 4157 dev_dbg(&pdev->dev, "memory BAR = %lx\n", 4158 *memory_bar); 4159 return 0; 4160 } 4161 dev_warn(&pdev->dev, "no memory BAR found\n"); 4162 return -ENODEV; 4163 } 4164 4165 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 4166 int wait_for_ready) 4167 { 4168 int i, iterations; 4169 u32 scratchpad; 4170 if (wait_for_ready) 4171 iterations = HPSA_BOARD_READY_ITERATIONS; 4172 else 4173 iterations = HPSA_BOARD_NOT_READY_ITERATIONS; 4174 4175 for (i = 0; i < iterations; i++) { 4176 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET); 4177 if (wait_for_ready) { 4178 if (scratchpad == HPSA_FIRMWARE_READY) 4179 return 0; 4180 } else { 4181 if (scratchpad != HPSA_FIRMWARE_READY) 4182 return 0; 4183 } 4184 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS); 4185 } 4186 dev_warn(&pdev->dev, "board not ready, timed out.\n"); 4187 return -ENODEV; 4188 } 4189 4190 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 4191 u32 *cfg_base_addr, u64 *cfg_base_addr_index, 4192 u64 *cfg_offset) 4193 { 4194 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET); 4195 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET); 4196 *cfg_base_addr &= (u32) 0x0000ffff; 4197 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr); 4198 if (*cfg_base_addr_index == -1) { 4199 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n"); 4200 return -ENODEV; 4201 } 4202 return 0; 4203 } 4204 4205 static int hpsa_find_cfgtables(struct ctlr_info *h) 4206 { 4207 u64 cfg_offset; 4208 u32 cfg_base_addr; 4209 u64 cfg_base_addr_index; 4210 u32 trans_offset; 4211 int rc; 4212 4213 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 4214 &cfg_base_addr_index, &cfg_offset); 4215 if (rc) 4216 return rc; 4217 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev, 4218 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable)); 4219 if (!h->cfgtable) 4220 return -ENOMEM; 4221 rc = write_driver_ver_to_cfgtable(h->cfgtable); 4222 if (rc) 4223 return rc; 4224 /* Find performant mode table. */ 4225 trans_offset = readl(&h->cfgtable->TransMethodOffset); 4226 h->transtable = remap_pci_mem(pci_resource_start(h->pdev, 4227 cfg_base_addr_index)+cfg_offset+trans_offset, 4228 sizeof(*h->transtable)); 4229 if (!h->transtable) 4230 return -ENOMEM; 4231 return 0; 4232 } 4233 4234 static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h) 4235 { 4236 h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands)); 4237 4238 /* Limit commands in memory limited kdump scenario. */ 4239 if (reset_devices && h->max_commands > 32) 4240 h->max_commands = 32; 4241 4242 if (h->max_commands < 16) { 4243 dev_warn(&h->pdev->dev, "Controller reports " 4244 "max supported commands of %d, an obvious lie. " 4245 "Using 16. Ensure that firmware is up to date.\n", 4246 h->max_commands); 4247 h->max_commands = 16; 4248 } 4249 } 4250 4251 /* Interrogate the hardware for some limits: 4252 * max commands, max SG elements without chaining, and with chaining, 4253 * SG chain block size, etc. 4254 */ 4255 static void hpsa_find_board_params(struct ctlr_info *h) 4256 { 4257 hpsa_get_max_perf_mode_cmds(h); 4258 h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */ 4259 h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements)); 4260 /* 4261 * Limit in-command s/g elements to 32 save dma'able memory. 4262 * Howvever spec says if 0, use 31 4263 */ 4264 h->max_cmd_sg_entries = 31; 4265 if (h->maxsgentries > 512) { 4266 h->max_cmd_sg_entries = 32; 4267 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries + 1; 4268 h->maxsgentries--; /* save one for chain pointer */ 4269 } else { 4270 h->maxsgentries = 31; /* default to traditional values */ 4271 h->chainsize = 0; 4272 } 4273 4274 /* Find out what task management functions are supported and cache */ 4275 h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags)); 4276 } 4277 4278 static inline bool hpsa_CISS_signature_present(struct ctlr_info *h) 4279 { 4280 if (!check_signature(h->cfgtable->Signature, "CISS", 4)) { 4281 dev_warn(&h->pdev->dev, "not a valid CISS config table\n"); 4282 return false; 4283 } 4284 return true; 4285 } 4286 4287 /* Need to enable prefetch in the SCSI core for 6400 in x86 */ 4288 static inline void hpsa_enable_scsi_prefetch(struct ctlr_info *h) 4289 { 4290 #ifdef CONFIG_X86 4291 u32 prefetch; 4292 4293 prefetch = readl(&(h->cfgtable->SCSI_Prefetch)); 4294 prefetch |= 0x100; 4295 writel(prefetch, &(h->cfgtable->SCSI_Prefetch)); 4296 #endif 4297 } 4298 4299 /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result 4300 * in a prefetch beyond physical memory. 4301 */ 4302 static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h) 4303 { 4304 u32 dma_prefetch; 4305 4306 if (h->board_id != 0x3225103C) 4307 return; 4308 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG); 4309 dma_prefetch |= 0x8000; 4310 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG); 4311 } 4312 4313 static void hpsa_wait_for_mode_change_ack(struct ctlr_info *h) 4314 { 4315 int i; 4316 u32 doorbell_value; 4317 unsigned long flags; 4318 4319 /* under certain very rare conditions, this can take awhile. 4320 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right 4321 * as we enter this code.) 4322 */ 4323 for (i = 0; i < MAX_CONFIG_WAIT; i++) { 4324 spin_lock_irqsave(&h->lock, flags); 4325 doorbell_value = readl(h->vaddr + SA5_DOORBELL); 4326 spin_unlock_irqrestore(&h->lock, flags); 4327 if (!(doorbell_value & CFGTBL_ChangeReq)) 4328 break; 4329 /* delay and try again */ 4330 usleep_range(10000, 20000); 4331 } 4332 } 4333 4334 static int hpsa_enter_simple_mode(struct ctlr_info *h) 4335 { 4336 u32 trans_support; 4337 4338 trans_support = readl(&(h->cfgtable->TransportSupport)); 4339 if (!(trans_support & SIMPLE_MODE)) 4340 return -ENOTSUPP; 4341 4342 h->max_commands = readl(&(h->cfgtable->CmdsOutMax)); 4343 /* Update the field, and then ring the doorbell */ 4344 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest)); 4345 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 4346 hpsa_wait_for_mode_change_ack(h); 4347 print_cfg_table(&h->pdev->dev, h->cfgtable); 4348 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) { 4349 dev_warn(&h->pdev->dev, 4350 "unable to get board into simple mode\n"); 4351 return -ENODEV; 4352 } 4353 h->transMethod = CFGTBL_Trans_Simple; 4354 return 0; 4355 } 4356 4357 static int hpsa_pci_init(struct ctlr_info *h) 4358 { 4359 int prod_index, err; 4360 4361 prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id); 4362 if (prod_index < 0) 4363 return -ENODEV; 4364 h->product_name = products[prod_index].product_name; 4365 h->access = *(products[prod_index].access); 4366 4367 pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S | 4368 PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM); 4369 4370 err = pci_enable_device(h->pdev); 4371 if (err) { 4372 dev_warn(&h->pdev->dev, "unable to enable PCI device\n"); 4373 return err; 4374 } 4375 4376 /* Enable bus mastering (pci_disable_device may disable this) */ 4377 pci_set_master(h->pdev); 4378 4379 err = pci_request_regions(h->pdev, HPSA); 4380 if (err) { 4381 dev_err(&h->pdev->dev, 4382 "cannot obtain PCI resources, aborting\n"); 4383 return err; 4384 } 4385 hpsa_interrupt_mode(h); 4386 err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr); 4387 if (err) 4388 goto err_out_free_res; 4389 h->vaddr = remap_pci_mem(h->paddr, 0x250); 4390 if (!h->vaddr) { 4391 err = -ENOMEM; 4392 goto err_out_free_res; 4393 } 4394 err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 4395 if (err) 4396 goto err_out_free_res; 4397 err = hpsa_find_cfgtables(h); 4398 if (err) 4399 goto err_out_free_res; 4400 hpsa_find_board_params(h); 4401 4402 if (!hpsa_CISS_signature_present(h)) { 4403 err = -ENODEV; 4404 goto err_out_free_res; 4405 } 4406 hpsa_enable_scsi_prefetch(h); 4407 hpsa_p600_dma_prefetch_quirk(h); 4408 err = hpsa_enter_simple_mode(h); 4409 if (err) 4410 goto err_out_free_res; 4411 return 0; 4412 4413 err_out_free_res: 4414 if (h->transtable) 4415 iounmap(h->transtable); 4416 if (h->cfgtable) 4417 iounmap(h->cfgtable); 4418 if (h->vaddr) 4419 iounmap(h->vaddr); 4420 pci_disable_device(h->pdev); 4421 pci_release_regions(h->pdev); 4422 return err; 4423 } 4424 4425 static void hpsa_hba_inquiry(struct ctlr_info *h) 4426 { 4427 int rc; 4428 4429 #define HBA_INQUIRY_BYTE_COUNT 64 4430 h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL); 4431 if (!h->hba_inquiry_data) 4432 return; 4433 rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0, 4434 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT); 4435 if (rc != 0) { 4436 kfree(h->hba_inquiry_data); 4437 h->hba_inquiry_data = NULL; 4438 } 4439 } 4440 4441 static int hpsa_init_reset_devices(struct pci_dev *pdev) 4442 { 4443 int rc, i; 4444 4445 if (!reset_devices) 4446 return 0; 4447 4448 /* Reset the controller with a PCI power-cycle or via doorbell */ 4449 rc = hpsa_kdump_hard_reset_controller(pdev); 4450 4451 /* -ENOTSUPP here means we cannot reset the controller 4452 * but it's already (and still) up and running in 4453 * "performant mode". Or, it might be 640x, which can't reset 4454 * due to concerns about shared bbwc between 6402/6404 pair. 4455 */ 4456 if (rc == -ENOTSUPP) 4457 return rc; /* just try to do the kdump anyhow. */ 4458 if (rc) 4459 return -ENODEV; 4460 4461 /* Now try to get the controller to respond to a no-op */ 4462 dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n"); 4463 for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) { 4464 if (hpsa_noop(pdev) == 0) 4465 break; 4466 else 4467 dev_warn(&pdev->dev, "no-op failed%s\n", 4468 (i < 11 ? "; re-trying" : "")); 4469 } 4470 return 0; 4471 } 4472 4473 static int hpsa_allocate_cmd_pool(struct ctlr_info *h) 4474 { 4475 h->cmd_pool_bits = kzalloc( 4476 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) * 4477 sizeof(unsigned long), GFP_KERNEL); 4478 h->cmd_pool = pci_alloc_consistent(h->pdev, 4479 h->nr_cmds * sizeof(*h->cmd_pool), 4480 &(h->cmd_pool_dhandle)); 4481 h->errinfo_pool = pci_alloc_consistent(h->pdev, 4482 h->nr_cmds * sizeof(*h->errinfo_pool), 4483 &(h->errinfo_pool_dhandle)); 4484 if ((h->cmd_pool_bits == NULL) 4485 || (h->cmd_pool == NULL) 4486 || (h->errinfo_pool == NULL)) { 4487 dev_err(&h->pdev->dev, "out of memory in %s", __func__); 4488 return -ENOMEM; 4489 } 4490 return 0; 4491 } 4492 4493 static void hpsa_free_cmd_pool(struct ctlr_info *h) 4494 { 4495 kfree(h->cmd_pool_bits); 4496 if (h->cmd_pool) 4497 pci_free_consistent(h->pdev, 4498 h->nr_cmds * sizeof(struct CommandList), 4499 h->cmd_pool, h->cmd_pool_dhandle); 4500 if (h->errinfo_pool) 4501 pci_free_consistent(h->pdev, 4502 h->nr_cmds * sizeof(struct ErrorInfo), 4503 h->errinfo_pool, 4504 h->errinfo_pool_dhandle); 4505 } 4506 4507 static int hpsa_request_irq(struct ctlr_info *h, 4508 irqreturn_t (*msixhandler)(int, void *), 4509 irqreturn_t (*intxhandler)(int, void *)) 4510 { 4511 int rc, i; 4512 4513 /* 4514 * initialize h->q[x] = x so that interrupt handlers know which 4515 * queue to process. 4516 */ 4517 for (i = 0; i < MAX_REPLY_QUEUES; i++) 4518 h->q[i] = (u8) i; 4519 4520 if (h->intr_mode == PERF_MODE_INT && h->msix_vector) { 4521 /* If performant mode and MSI-X, use multiple reply queues */ 4522 for (i = 0; i < MAX_REPLY_QUEUES; i++) 4523 rc = request_irq(h->intr[i], msixhandler, 4524 0, h->devname, 4525 &h->q[i]); 4526 } else { 4527 /* Use single reply pool */ 4528 if (h->msix_vector || h->msi_vector) { 4529 rc = request_irq(h->intr[h->intr_mode], 4530 msixhandler, 0, h->devname, 4531 &h->q[h->intr_mode]); 4532 } else { 4533 rc = request_irq(h->intr[h->intr_mode], 4534 intxhandler, IRQF_SHARED, h->devname, 4535 &h->q[h->intr_mode]); 4536 } 4537 } 4538 if (rc) { 4539 dev_err(&h->pdev->dev, "unable to get irq %d for %s\n", 4540 h->intr[h->intr_mode], h->devname); 4541 return -ENODEV; 4542 } 4543 return 0; 4544 } 4545 4546 static int hpsa_kdump_soft_reset(struct ctlr_info *h) 4547 { 4548 if (hpsa_send_host_reset(h, RAID_CTLR_LUNID, 4549 HPSA_RESET_TYPE_CONTROLLER)) { 4550 dev_warn(&h->pdev->dev, "Resetting array controller failed.\n"); 4551 return -EIO; 4552 } 4553 4554 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n"); 4555 if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) { 4556 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n"); 4557 return -1; 4558 } 4559 4560 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n"); 4561 if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) { 4562 dev_warn(&h->pdev->dev, "Board failed to become ready " 4563 "after soft reset.\n"); 4564 return -1; 4565 } 4566 4567 return 0; 4568 } 4569 4570 static void free_irqs(struct ctlr_info *h) 4571 { 4572 int i; 4573 4574 if (!h->msix_vector || h->intr_mode != PERF_MODE_INT) { 4575 /* Single reply queue, only one irq to free */ 4576 i = h->intr_mode; 4577 free_irq(h->intr[i], &h->q[i]); 4578 return; 4579 } 4580 4581 for (i = 0; i < MAX_REPLY_QUEUES; i++) 4582 free_irq(h->intr[i], &h->q[i]); 4583 } 4584 4585 static void hpsa_free_irqs_and_disable_msix(struct ctlr_info *h) 4586 { 4587 free_irqs(h); 4588 #ifdef CONFIG_PCI_MSI 4589 if (h->msix_vector) { 4590 if (h->pdev->msix_enabled) 4591 pci_disable_msix(h->pdev); 4592 } else if (h->msi_vector) { 4593 if (h->pdev->msi_enabled) 4594 pci_disable_msi(h->pdev); 4595 } 4596 #endif /* CONFIG_PCI_MSI */ 4597 } 4598 4599 static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h) 4600 { 4601 hpsa_free_irqs_and_disable_msix(h); 4602 hpsa_free_sg_chain_blocks(h); 4603 hpsa_free_cmd_pool(h); 4604 kfree(h->blockFetchTable); 4605 pci_free_consistent(h->pdev, h->reply_pool_size, 4606 h->reply_pool, h->reply_pool_dhandle); 4607 if (h->vaddr) 4608 iounmap(h->vaddr); 4609 if (h->transtable) 4610 iounmap(h->transtable); 4611 if (h->cfgtable) 4612 iounmap(h->cfgtable); 4613 pci_release_regions(h->pdev); 4614 kfree(h); 4615 } 4616 4617 static void remove_ctlr_from_lockup_detector_list(struct ctlr_info *h) 4618 { 4619 assert_spin_locked(&lockup_detector_lock); 4620 if (!hpsa_lockup_detector) 4621 return; 4622 if (h->lockup_detected) 4623 return; /* already stopped the lockup detector */ 4624 list_del(&h->lockup_list); 4625 } 4626 4627 /* Called when controller lockup detected. */ 4628 static void fail_all_cmds_on_list(struct ctlr_info *h, struct list_head *list) 4629 { 4630 struct CommandList *c = NULL; 4631 4632 assert_spin_locked(&h->lock); 4633 /* Mark all outstanding commands as failed and complete them. */ 4634 while (!list_empty(list)) { 4635 c = list_entry(list->next, struct CommandList, list); 4636 c->err_info->CommandStatus = CMD_HARDWARE_ERR; 4637 finish_cmd(c); 4638 } 4639 } 4640 4641 static void controller_lockup_detected(struct ctlr_info *h) 4642 { 4643 unsigned long flags; 4644 4645 assert_spin_locked(&lockup_detector_lock); 4646 remove_ctlr_from_lockup_detector_list(h); 4647 h->access.set_intr_mask(h, HPSA_INTR_OFF); 4648 spin_lock_irqsave(&h->lock, flags); 4649 h->lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET); 4650 spin_unlock_irqrestore(&h->lock, flags); 4651 dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x\n", 4652 h->lockup_detected); 4653 pci_disable_device(h->pdev); 4654 spin_lock_irqsave(&h->lock, flags); 4655 fail_all_cmds_on_list(h, &h->cmpQ); 4656 fail_all_cmds_on_list(h, &h->reqQ); 4657 spin_unlock_irqrestore(&h->lock, flags); 4658 } 4659 4660 static void detect_controller_lockup(struct ctlr_info *h) 4661 { 4662 u64 now; 4663 u32 heartbeat; 4664 unsigned long flags; 4665 4666 assert_spin_locked(&lockup_detector_lock); 4667 now = get_jiffies_64(); 4668 /* If we've received an interrupt recently, we're ok. */ 4669 if (time_after64(h->last_intr_timestamp + 4670 (h->heartbeat_sample_interval), now)) 4671 return; 4672 4673 /* 4674 * If we've already checked the heartbeat recently, we're ok. 4675 * This could happen if someone sends us a signal. We 4676 * otherwise don't care about signals in this thread. 4677 */ 4678 if (time_after64(h->last_heartbeat_timestamp + 4679 (h->heartbeat_sample_interval), now)) 4680 return; 4681 4682 /* If heartbeat has not changed since we last looked, we're not ok. */ 4683 spin_lock_irqsave(&h->lock, flags); 4684 heartbeat = readl(&h->cfgtable->HeartBeat); 4685 spin_unlock_irqrestore(&h->lock, flags); 4686 if (h->last_heartbeat == heartbeat) { 4687 controller_lockup_detected(h); 4688 return; 4689 } 4690 4691 /* We're ok. */ 4692 h->last_heartbeat = heartbeat; 4693 h->last_heartbeat_timestamp = now; 4694 } 4695 4696 static int detect_controller_lockup_thread(void *notused) 4697 { 4698 struct ctlr_info *h; 4699 unsigned long flags; 4700 4701 while (1) { 4702 struct list_head *this, *tmp; 4703 4704 schedule_timeout_interruptible(HEARTBEAT_SAMPLE_INTERVAL); 4705 if (kthread_should_stop()) 4706 break; 4707 spin_lock_irqsave(&lockup_detector_lock, flags); 4708 list_for_each_safe(this, tmp, &hpsa_ctlr_list) { 4709 h = list_entry(this, struct ctlr_info, lockup_list); 4710 detect_controller_lockup(h); 4711 } 4712 spin_unlock_irqrestore(&lockup_detector_lock, flags); 4713 } 4714 return 0; 4715 } 4716 4717 static void add_ctlr_to_lockup_detector_list(struct ctlr_info *h) 4718 { 4719 unsigned long flags; 4720 4721 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 4722 spin_lock_irqsave(&lockup_detector_lock, flags); 4723 list_add_tail(&h->lockup_list, &hpsa_ctlr_list); 4724 spin_unlock_irqrestore(&lockup_detector_lock, flags); 4725 } 4726 4727 static void start_controller_lockup_detector(struct ctlr_info *h) 4728 { 4729 /* Start the lockup detector thread if not already started */ 4730 if (!hpsa_lockup_detector) { 4731 spin_lock_init(&lockup_detector_lock); 4732 hpsa_lockup_detector = 4733 kthread_run(detect_controller_lockup_thread, 4734 NULL, HPSA); 4735 } 4736 if (!hpsa_lockup_detector) { 4737 dev_warn(&h->pdev->dev, 4738 "Could not start lockup detector thread\n"); 4739 return; 4740 } 4741 add_ctlr_to_lockup_detector_list(h); 4742 } 4743 4744 static void stop_controller_lockup_detector(struct ctlr_info *h) 4745 { 4746 unsigned long flags; 4747 4748 spin_lock_irqsave(&lockup_detector_lock, flags); 4749 remove_ctlr_from_lockup_detector_list(h); 4750 /* If the list of ctlr's to monitor is empty, stop the thread */ 4751 if (list_empty(&hpsa_ctlr_list)) { 4752 spin_unlock_irqrestore(&lockup_detector_lock, flags); 4753 kthread_stop(hpsa_lockup_detector); 4754 spin_lock_irqsave(&lockup_detector_lock, flags); 4755 hpsa_lockup_detector = NULL; 4756 } 4757 spin_unlock_irqrestore(&lockup_detector_lock, flags); 4758 } 4759 4760 static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 4761 { 4762 int dac, rc; 4763 struct ctlr_info *h; 4764 int try_soft_reset = 0; 4765 unsigned long flags; 4766 4767 if (number_of_controllers == 0) 4768 printk(KERN_INFO DRIVER_NAME "\n"); 4769 4770 rc = hpsa_init_reset_devices(pdev); 4771 if (rc) { 4772 if (rc != -ENOTSUPP) 4773 return rc; 4774 /* If the reset fails in a particular way (it has no way to do 4775 * a proper hard reset, so returns -ENOTSUPP) we can try to do 4776 * a soft reset once we get the controller configured up to the 4777 * point that it can accept a command. 4778 */ 4779 try_soft_reset = 1; 4780 rc = 0; 4781 } 4782 4783 reinit_after_soft_reset: 4784 4785 /* Command structures must be aligned on a 32-byte boundary because 4786 * the 5 lower bits of the address are used by the hardware. and by 4787 * the driver. See comments in hpsa.h for more info. 4788 */ 4789 #define COMMANDLIST_ALIGNMENT 32 4790 BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT); 4791 h = kzalloc(sizeof(*h), GFP_KERNEL); 4792 if (!h) 4793 return -ENOMEM; 4794 4795 h->pdev = pdev; 4796 h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT; 4797 INIT_LIST_HEAD(&h->cmpQ); 4798 INIT_LIST_HEAD(&h->reqQ); 4799 spin_lock_init(&h->lock); 4800 spin_lock_init(&h->scan_lock); 4801 rc = hpsa_pci_init(h); 4802 if (rc != 0) 4803 goto clean1; 4804 4805 sprintf(h->devname, HPSA "%d", number_of_controllers); 4806 h->ctlr = number_of_controllers; 4807 number_of_controllers++; 4808 4809 /* configure PCI DMA stuff */ 4810 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 4811 if (rc == 0) { 4812 dac = 1; 4813 } else { 4814 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 4815 if (rc == 0) { 4816 dac = 0; 4817 } else { 4818 dev_err(&pdev->dev, "no suitable DMA available\n"); 4819 goto clean1; 4820 } 4821 } 4822 4823 /* make sure the board interrupts are off */ 4824 h->access.set_intr_mask(h, HPSA_INTR_OFF); 4825 4826 if (hpsa_request_irq(h, do_hpsa_intr_msi, do_hpsa_intr_intx)) 4827 goto clean2; 4828 dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n", 4829 h->devname, pdev->device, 4830 h->intr[h->intr_mode], dac ? "" : " not"); 4831 if (hpsa_allocate_cmd_pool(h)) 4832 goto clean4; 4833 if (hpsa_allocate_sg_chain_blocks(h)) 4834 goto clean4; 4835 init_waitqueue_head(&h->scan_wait_queue); 4836 h->scan_finished = 1; /* no scan currently in progress */ 4837 4838 pci_set_drvdata(pdev, h); 4839 h->ndevices = 0; 4840 h->scsi_host = NULL; 4841 spin_lock_init(&h->devlock); 4842 hpsa_put_ctlr_into_performant_mode(h); 4843 4844 /* At this point, the controller is ready to take commands. 4845 * Now, if reset_devices and the hard reset didn't work, try 4846 * the soft reset and see if that works. 4847 */ 4848 if (try_soft_reset) { 4849 4850 /* This is kind of gross. We may or may not get a completion 4851 * from the soft reset command, and if we do, then the value 4852 * from the fifo may or may not be valid. So, we wait 10 secs 4853 * after the reset throwing away any completions we get during 4854 * that time. Unregister the interrupt handler and register 4855 * fake ones to scoop up any residual completions. 4856 */ 4857 spin_lock_irqsave(&h->lock, flags); 4858 h->access.set_intr_mask(h, HPSA_INTR_OFF); 4859 spin_unlock_irqrestore(&h->lock, flags); 4860 free_irqs(h); 4861 rc = hpsa_request_irq(h, hpsa_msix_discard_completions, 4862 hpsa_intx_discard_completions); 4863 if (rc) { 4864 dev_warn(&h->pdev->dev, "Failed to request_irq after " 4865 "soft reset.\n"); 4866 goto clean4; 4867 } 4868 4869 rc = hpsa_kdump_soft_reset(h); 4870 if (rc) 4871 /* Neither hard nor soft reset worked, we're hosed. */ 4872 goto clean4; 4873 4874 dev_info(&h->pdev->dev, "Board READY.\n"); 4875 dev_info(&h->pdev->dev, 4876 "Waiting for stale completions to drain.\n"); 4877 h->access.set_intr_mask(h, HPSA_INTR_ON); 4878 msleep(10000); 4879 h->access.set_intr_mask(h, HPSA_INTR_OFF); 4880 4881 rc = controller_reset_failed(h->cfgtable); 4882 if (rc) 4883 dev_info(&h->pdev->dev, 4884 "Soft reset appears to have failed.\n"); 4885 4886 /* since the controller's reset, we have to go back and re-init 4887 * everything. Easiest to just forget what we've done and do it 4888 * all over again. 4889 */ 4890 hpsa_undo_allocations_after_kdump_soft_reset(h); 4891 try_soft_reset = 0; 4892 if (rc) 4893 /* don't go to clean4, we already unallocated */ 4894 return -ENODEV; 4895 4896 goto reinit_after_soft_reset; 4897 } 4898 4899 /* Turn the interrupts on so we can service requests */ 4900 h->access.set_intr_mask(h, HPSA_INTR_ON); 4901 4902 hpsa_hba_inquiry(h); 4903 hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */ 4904 start_controller_lockup_detector(h); 4905 return 1; 4906 4907 clean4: 4908 hpsa_free_sg_chain_blocks(h); 4909 hpsa_free_cmd_pool(h); 4910 free_irqs(h); 4911 clean2: 4912 clean1: 4913 kfree(h); 4914 return rc; 4915 } 4916 4917 static void hpsa_flush_cache(struct ctlr_info *h) 4918 { 4919 char *flush_buf; 4920 struct CommandList *c; 4921 4922 flush_buf = kzalloc(4, GFP_KERNEL); 4923 if (!flush_buf) 4924 return; 4925 4926 c = cmd_special_alloc(h); 4927 if (!c) { 4928 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n"); 4929 goto out_of_memory; 4930 } 4931 if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0, 4932 RAID_CTLR_LUNID, TYPE_CMD)) { 4933 goto out; 4934 } 4935 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE); 4936 if (c->err_info->CommandStatus != 0) 4937 out: 4938 dev_warn(&h->pdev->dev, 4939 "error flushing cache on controller\n"); 4940 cmd_special_free(h, c); 4941 out_of_memory: 4942 kfree(flush_buf); 4943 } 4944 4945 static void hpsa_shutdown(struct pci_dev *pdev) 4946 { 4947 struct ctlr_info *h; 4948 4949 h = pci_get_drvdata(pdev); 4950 /* Turn board interrupts off and send the flush cache command 4951 * sendcmd will turn off interrupt, and send the flush... 4952 * To write all data in the battery backed cache to disks 4953 */ 4954 hpsa_flush_cache(h); 4955 h->access.set_intr_mask(h, HPSA_INTR_OFF); 4956 hpsa_free_irqs_and_disable_msix(h); 4957 } 4958 4959 static void hpsa_free_device_info(struct ctlr_info *h) 4960 { 4961 int i; 4962 4963 for (i = 0; i < h->ndevices; i++) 4964 kfree(h->dev[i]); 4965 } 4966 4967 static void hpsa_remove_one(struct pci_dev *pdev) 4968 { 4969 struct ctlr_info *h; 4970 4971 if (pci_get_drvdata(pdev) == NULL) { 4972 dev_err(&pdev->dev, "unable to remove device\n"); 4973 return; 4974 } 4975 h = pci_get_drvdata(pdev); 4976 stop_controller_lockup_detector(h); 4977 hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */ 4978 hpsa_shutdown(pdev); 4979 iounmap(h->vaddr); 4980 iounmap(h->transtable); 4981 iounmap(h->cfgtable); 4982 hpsa_free_device_info(h); 4983 hpsa_free_sg_chain_blocks(h); 4984 pci_free_consistent(h->pdev, 4985 h->nr_cmds * sizeof(struct CommandList), 4986 h->cmd_pool, h->cmd_pool_dhandle); 4987 pci_free_consistent(h->pdev, 4988 h->nr_cmds * sizeof(struct ErrorInfo), 4989 h->errinfo_pool, h->errinfo_pool_dhandle); 4990 pci_free_consistent(h->pdev, h->reply_pool_size, 4991 h->reply_pool, h->reply_pool_dhandle); 4992 kfree(h->cmd_pool_bits); 4993 kfree(h->blockFetchTable); 4994 kfree(h->hba_inquiry_data); 4995 pci_disable_device(pdev); 4996 pci_release_regions(pdev); 4997 pci_set_drvdata(pdev, NULL); 4998 kfree(h); 4999 } 5000 5001 static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev, 5002 __attribute__((unused)) pm_message_t state) 5003 { 5004 return -ENOSYS; 5005 } 5006 5007 static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev) 5008 { 5009 return -ENOSYS; 5010 } 5011 5012 static struct pci_driver hpsa_pci_driver = { 5013 .name = HPSA, 5014 .probe = hpsa_init_one, 5015 .remove = hpsa_remove_one, 5016 .id_table = hpsa_pci_device_id, /* id_table */ 5017 .shutdown = hpsa_shutdown, 5018 .suspend = hpsa_suspend, 5019 .resume = hpsa_resume, 5020 }; 5021 5022 /* Fill in bucket_map[], given nsgs (the max number of 5023 * scatter gather elements supported) and bucket[], 5024 * which is an array of 8 integers. The bucket[] array 5025 * contains 8 different DMA transfer sizes (in 16 5026 * byte increments) which the controller uses to fetch 5027 * commands. This function fills in bucket_map[], which 5028 * maps a given number of scatter gather elements to one of 5029 * the 8 DMA transfer sizes. The point of it is to allow the 5030 * controller to only do as much DMA as needed to fetch the 5031 * command, with the DMA transfer size encoded in the lower 5032 * bits of the command address. 5033 */ 5034 static void calc_bucket_map(int bucket[], int num_buckets, 5035 int nsgs, int *bucket_map) 5036 { 5037 int i, j, b, size; 5038 5039 /* even a command with 0 SGs requires 4 blocks */ 5040 #define MINIMUM_TRANSFER_BLOCKS 4 5041 #define NUM_BUCKETS 8 5042 /* Note, bucket_map must have nsgs+1 entries. */ 5043 for (i = 0; i <= nsgs; i++) { 5044 /* Compute size of a command with i SG entries */ 5045 size = i + MINIMUM_TRANSFER_BLOCKS; 5046 b = num_buckets; /* Assume the biggest bucket */ 5047 /* Find the bucket that is just big enough */ 5048 for (j = 0; j < 8; j++) { 5049 if (bucket[j] >= size) { 5050 b = j; 5051 break; 5052 } 5053 } 5054 /* for a command with i SG entries, use bucket b. */ 5055 bucket_map[i] = b; 5056 } 5057 } 5058 5059 static void hpsa_enter_performant_mode(struct ctlr_info *h, u32 use_short_tags) 5060 { 5061 int i; 5062 unsigned long register_value; 5063 5064 /* This is a bit complicated. There are 8 registers on 5065 * the controller which we write to to tell it 8 different 5066 * sizes of commands which there may be. It's a way of 5067 * reducing the DMA done to fetch each command. Encoded into 5068 * each command's tag are 3 bits which communicate to the controller 5069 * which of the eight sizes that command fits within. The size of 5070 * each command depends on how many scatter gather entries there are. 5071 * Each SG entry requires 16 bytes. The eight registers are programmed 5072 * with the number of 16-byte blocks a command of that size requires. 5073 * The smallest command possible requires 5 such 16 byte blocks. 5074 * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte 5075 * blocks. Note, this only extends to the SG entries contained 5076 * within the command block, and does not extend to chained blocks 5077 * of SG elements. bft[] contains the eight values we write to 5078 * the registers. They are not evenly distributed, but have more 5079 * sizes for small commands, and fewer sizes for larger commands. 5080 */ 5081 int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4}; 5082 BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4); 5083 /* 5 = 1 s/g entry or 4k 5084 * 6 = 2 s/g entry or 8k 5085 * 8 = 4 s/g entry or 16k 5086 * 10 = 6 s/g entry or 24k 5087 */ 5088 5089 /* Controller spec: zero out this buffer. */ 5090 memset(h->reply_pool, 0, h->reply_pool_size); 5091 5092 bft[7] = SG_ENTRIES_IN_CMD + 4; 5093 calc_bucket_map(bft, ARRAY_SIZE(bft), 5094 SG_ENTRIES_IN_CMD, h->blockFetchTable); 5095 for (i = 0; i < 8; i++) 5096 writel(bft[i], &h->transtable->BlockFetch[i]); 5097 5098 /* size of controller ring buffer */ 5099 writel(h->max_commands, &h->transtable->RepQSize); 5100 writel(h->nreply_queues, &h->transtable->RepQCount); 5101 writel(0, &h->transtable->RepQCtrAddrLow32); 5102 writel(0, &h->transtable->RepQCtrAddrHigh32); 5103 5104 for (i = 0; i < h->nreply_queues; i++) { 5105 writel(0, &h->transtable->RepQAddr[i].upper); 5106 writel(h->reply_pool_dhandle + 5107 (h->max_commands * sizeof(u64) * i), 5108 &h->transtable->RepQAddr[i].lower); 5109 } 5110 5111 writel(CFGTBL_Trans_Performant | use_short_tags | 5112 CFGTBL_Trans_enable_directed_msix, 5113 &(h->cfgtable->HostWrite.TransportRequest)); 5114 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 5115 hpsa_wait_for_mode_change_ack(h); 5116 register_value = readl(&(h->cfgtable->TransportActive)); 5117 if (!(register_value & CFGTBL_Trans_Performant)) { 5118 dev_warn(&h->pdev->dev, "unable to get board into" 5119 " performant mode\n"); 5120 return; 5121 } 5122 /* Change the access methods to the performant access methods */ 5123 h->access = SA5_performant_access; 5124 h->transMethod = CFGTBL_Trans_Performant; 5125 } 5126 5127 static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h) 5128 { 5129 u32 trans_support; 5130 int i; 5131 5132 if (hpsa_simple_mode) 5133 return; 5134 5135 trans_support = readl(&(h->cfgtable->TransportSupport)); 5136 if (!(trans_support & PERFORMANT_MODE)) 5137 return; 5138 5139 h->nreply_queues = h->msix_vector ? MAX_REPLY_QUEUES : 1; 5140 hpsa_get_max_perf_mode_cmds(h); 5141 /* Performant mode ring buffer and supporting data structures */ 5142 h->reply_pool_size = h->max_commands * sizeof(u64) * h->nreply_queues; 5143 h->reply_pool = pci_alloc_consistent(h->pdev, h->reply_pool_size, 5144 &(h->reply_pool_dhandle)); 5145 5146 for (i = 0; i < h->nreply_queues; i++) { 5147 h->reply_queue[i].head = &h->reply_pool[h->max_commands * i]; 5148 h->reply_queue[i].size = h->max_commands; 5149 h->reply_queue[i].wraparound = 1; /* spec: init to 1 */ 5150 h->reply_queue[i].current_entry = 0; 5151 } 5152 5153 /* Need a block fetch table for performant mode */ 5154 h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) * 5155 sizeof(u32)), GFP_KERNEL); 5156 5157 if ((h->reply_pool == NULL) 5158 || (h->blockFetchTable == NULL)) 5159 goto clean_up; 5160 5161 hpsa_enter_performant_mode(h, 5162 trans_support & CFGTBL_Trans_use_short_tags); 5163 5164 return; 5165 5166 clean_up: 5167 if (h->reply_pool) 5168 pci_free_consistent(h->pdev, h->reply_pool_size, 5169 h->reply_pool, h->reply_pool_dhandle); 5170 kfree(h->blockFetchTable); 5171 } 5172 5173 /* 5174 * This is it. Register the PCI driver information for the cards we control 5175 * the OS will call our registered routines when it finds one of our cards. 5176 */ 5177 static int __init hpsa_init(void) 5178 { 5179 return pci_register_driver(&hpsa_pci_driver); 5180 } 5181 5182 static void __exit hpsa_cleanup(void) 5183 { 5184 pci_unregister_driver(&hpsa_pci_driver); 5185 } 5186 5187 module_init(hpsa_init); 5188 module_exit(hpsa_cleanup); 5189