1 /* 2 * Disk Array driver for HP Smart Array SAS controllers 3 * Copyright 2016 Microsemi Corporation 4 * Copyright 2014-2015 PMC-Sierra, Inc. 5 * Copyright 2000,2009-2015 Hewlett-Packard Development Company, L.P. 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; version 2 of the License. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or 14 * NON INFRINGEMENT. See the GNU General Public License for more details. 15 * 16 * Questions/Comments/Bugfixes to esc.storagedev@microsemi.com 17 * 18 */ 19 20 #include <linux/module.h> 21 #include <linux/interrupt.h> 22 #include <linux/types.h> 23 #include <linux/pci.h> 24 #include <linux/pci-aspm.h> 25 #include <linux/kernel.h> 26 #include <linux/slab.h> 27 #include <linux/delay.h> 28 #include <linux/fs.h> 29 #include <linux/timer.h> 30 #include <linux/init.h> 31 #include <linux/spinlock.h> 32 #include <linux/compat.h> 33 #include <linux/blktrace_api.h> 34 #include <linux/uaccess.h> 35 #include <linux/io.h> 36 #include <linux/dma-mapping.h> 37 #include <linux/completion.h> 38 #include <linux/moduleparam.h> 39 #include <scsi/scsi.h> 40 #include <scsi/scsi_cmnd.h> 41 #include <scsi/scsi_device.h> 42 #include <scsi/scsi_host.h> 43 #include <scsi/scsi_tcq.h> 44 #include <scsi/scsi_eh.h> 45 #include <scsi/scsi_transport_sas.h> 46 #include <scsi/scsi_dbg.h> 47 #include <linux/cciss_ioctl.h> 48 #include <linux/string.h> 49 #include <linux/bitmap.h> 50 #include <linux/atomic.h> 51 #include <linux/jiffies.h> 52 #include <linux/percpu-defs.h> 53 #include <linux/percpu.h> 54 #include <asm/unaligned.h> 55 #include <asm/div64.h> 56 #include "hpsa_cmd.h" 57 #include "hpsa.h" 58 59 /* 60 * HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' 61 * with an optional trailing '-' followed by a byte value (0-255). 62 */ 63 #define HPSA_DRIVER_VERSION "3.4.18-0" 64 #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")" 65 #define HPSA "hpsa" 66 67 /* How long to wait for CISS doorbell communication */ 68 #define CLEAR_EVENT_WAIT_INTERVAL 20 /* ms for each msleep() call */ 69 #define MODE_CHANGE_WAIT_INTERVAL 10 /* ms for each msleep() call */ 70 #define MAX_CLEAR_EVENT_WAIT 30000 /* times 20 ms = 600 s */ 71 #define MAX_MODE_CHANGE_WAIT 2000 /* times 10 ms = 20 s */ 72 #define MAX_IOCTL_CONFIG_WAIT 1000 73 74 /*define how many times we will try a command because of bus resets */ 75 #define MAX_CMD_RETRIES 3 76 77 /* Embedded module documentation macros - see modules.h */ 78 MODULE_AUTHOR("Hewlett-Packard Company"); 79 MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \ 80 HPSA_DRIVER_VERSION); 81 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers"); 82 MODULE_VERSION(HPSA_DRIVER_VERSION); 83 MODULE_LICENSE("GPL"); 84 85 static int hpsa_allow_any; 86 module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR); 87 MODULE_PARM_DESC(hpsa_allow_any, 88 "Allow hpsa driver to access unknown HP Smart Array hardware"); 89 static int hpsa_simple_mode; 90 module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR); 91 MODULE_PARM_DESC(hpsa_simple_mode, 92 "Use 'simple mode' rather than 'performant mode'"); 93 94 /* define the PCI info for the cards we can control */ 95 static const struct pci_device_id hpsa_pci_device_id[] = { 96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241}, 97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243}, 98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245}, 99 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247}, 100 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249}, 101 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A}, 102 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B}, 103 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233}, 104 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350}, 105 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351}, 106 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352}, 107 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353}, 108 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354}, 109 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355}, 110 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356}, 111 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103c, 0x1920}, 112 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1921}, 113 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1922}, 114 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1923}, 115 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1924}, 116 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103c, 0x1925}, 117 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1926}, 118 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1928}, 119 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1929}, 120 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BD}, 121 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BE}, 122 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BF}, 123 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C0}, 124 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C1}, 125 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C2}, 126 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C3}, 127 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C4}, 128 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C5}, 129 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C6}, 130 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C7}, 131 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C8}, 132 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C9}, 133 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CA}, 134 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CB}, 135 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CC}, 136 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CD}, 137 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CE}, 138 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0580}, 139 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0581}, 140 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0582}, 141 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0583}, 142 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0584}, 143 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0585}, 144 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076}, 145 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087}, 146 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D}, 147 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088}, 148 {PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f}, 149 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 150 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0}, 151 {0,} 152 }; 153 154 MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id); 155 156 /* board_id = Subsystem Device ID & Vendor ID 157 * product = Marketing Name for the board 158 * access = Address of the struct of function pointers 159 */ 160 static struct board_type products[] = { 161 {0x3241103C, "Smart Array P212", &SA5_access}, 162 {0x3243103C, "Smart Array P410", &SA5_access}, 163 {0x3245103C, "Smart Array P410i", &SA5_access}, 164 {0x3247103C, "Smart Array P411", &SA5_access}, 165 {0x3249103C, "Smart Array P812", &SA5_access}, 166 {0x324A103C, "Smart Array P712m", &SA5_access}, 167 {0x324B103C, "Smart Array P711m", &SA5_access}, 168 {0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */ 169 {0x3350103C, "Smart Array P222", &SA5_access}, 170 {0x3351103C, "Smart Array P420", &SA5_access}, 171 {0x3352103C, "Smart Array P421", &SA5_access}, 172 {0x3353103C, "Smart Array P822", &SA5_access}, 173 {0x3354103C, "Smart Array P420i", &SA5_access}, 174 {0x3355103C, "Smart Array P220i", &SA5_access}, 175 {0x3356103C, "Smart Array P721m", &SA5_access}, 176 {0x1920103C, "Smart Array P430i", &SA5_access}, 177 {0x1921103C, "Smart Array P830i", &SA5_access}, 178 {0x1922103C, "Smart Array P430", &SA5_access}, 179 {0x1923103C, "Smart Array P431", &SA5_access}, 180 {0x1924103C, "Smart Array P830", &SA5_access}, 181 {0x1925103C, "Smart Array P831", &SA5_access}, 182 {0x1926103C, "Smart Array P731m", &SA5_access}, 183 {0x1928103C, "Smart Array P230i", &SA5_access}, 184 {0x1929103C, "Smart Array P530", &SA5_access}, 185 {0x21BD103C, "Smart Array P244br", &SA5_access}, 186 {0x21BE103C, "Smart Array P741m", &SA5_access}, 187 {0x21BF103C, "Smart HBA H240ar", &SA5_access}, 188 {0x21C0103C, "Smart Array P440ar", &SA5_access}, 189 {0x21C1103C, "Smart Array P840ar", &SA5_access}, 190 {0x21C2103C, "Smart Array P440", &SA5_access}, 191 {0x21C3103C, "Smart Array P441", &SA5_access}, 192 {0x21C4103C, "Smart Array", &SA5_access}, 193 {0x21C5103C, "Smart Array P841", &SA5_access}, 194 {0x21C6103C, "Smart HBA H244br", &SA5_access}, 195 {0x21C7103C, "Smart HBA H240", &SA5_access}, 196 {0x21C8103C, "Smart HBA H241", &SA5_access}, 197 {0x21C9103C, "Smart Array", &SA5_access}, 198 {0x21CA103C, "Smart Array P246br", &SA5_access}, 199 {0x21CB103C, "Smart Array P840", &SA5_access}, 200 {0x21CC103C, "Smart Array", &SA5_access}, 201 {0x21CD103C, "Smart Array", &SA5_access}, 202 {0x21CE103C, "Smart HBA", &SA5_access}, 203 {0x05809005, "SmartHBA-SA", &SA5_access}, 204 {0x05819005, "SmartHBA-SA 8i", &SA5_access}, 205 {0x05829005, "SmartHBA-SA 8i8e", &SA5_access}, 206 {0x05839005, "SmartHBA-SA 8e", &SA5_access}, 207 {0x05849005, "SmartHBA-SA 16i", &SA5_access}, 208 {0x05859005, "SmartHBA-SA 4i4e", &SA5_access}, 209 {0x00761590, "HP Storage P1224 Array Controller", &SA5_access}, 210 {0x00871590, "HP Storage P1224e Array Controller", &SA5_access}, 211 {0x007D1590, "HP Storage P1228 Array Controller", &SA5_access}, 212 {0x00881590, "HP Storage P1228e Array Controller", &SA5_access}, 213 {0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access}, 214 {0xFFFF103C, "Unknown Smart Array", &SA5_access}, 215 }; 216 217 static struct scsi_transport_template *hpsa_sas_transport_template; 218 static int hpsa_add_sas_host(struct ctlr_info *h); 219 static void hpsa_delete_sas_host(struct ctlr_info *h); 220 static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node, 221 struct hpsa_scsi_dev_t *device); 222 static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device); 223 static struct hpsa_scsi_dev_t 224 *hpsa_find_device_by_sas_rphy(struct ctlr_info *h, 225 struct sas_rphy *rphy); 226 227 #define SCSI_CMD_BUSY ((struct scsi_cmnd *)&hpsa_cmd_busy) 228 static const struct scsi_cmnd hpsa_cmd_busy; 229 #define SCSI_CMD_IDLE ((struct scsi_cmnd *)&hpsa_cmd_idle) 230 static const struct scsi_cmnd hpsa_cmd_idle; 231 static int number_of_controllers; 232 233 static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id); 234 static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id); 235 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg); 236 237 #ifdef CONFIG_COMPAT 238 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, 239 void __user *arg); 240 #endif 241 242 static void cmd_free(struct ctlr_info *h, struct CommandList *c); 243 static struct CommandList *cmd_alloc(struct ctlr_info *h); 244 static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c); 245 static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h, 246 struct scsi_cmnd *scmd); 247 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 248 void *buff, size_t size, u16 page_code, unsigned char *scsi3addr, 249 int cmd_type); 250 static void hpsa_free_cmd_pool(struct ctlr_info *h); 251 #define VPD_PAGE (1 << 8) 252 #define HPSA_SIMPLE_ERROR_BITS 0x03 253 254 static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd); 255 static void hpsa_scan_start(struct Scsi_Host *); 256 static int hpsa_scan_finished(struct Scsi_Host *sh, 257 unsigned long elapsed_time); 258 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth); 259 260 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd); 261 static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd); 262 static int hpsa_slave_alloc(struct scsi_device *sdev); 263 static int hpsa_slave_configure(struct scsi_device *sdev); 264 static void hpsa_slave_destroy(struct scsi_device *sdev); 265 266 static void hpsa_update_scsi_devices(struct ctlr_info *h); 267 static int check_for_unit_attention(struct ctlr_info *h, 268 struct CommandList *c); 269 static void check_ioctl_unit_attention(struct ctlr_info *h, 270 struct CommandList *c); 271 /* performant mode helper functions */ 272 static void calc_bucket_map(int *bucket, int num_buckets, 273 int nsgs, int min_blocks, u32 *bucket_map); 274 static void hpsa_free_performant_mode(struct ctlr_info *h); 275 static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h); 276 static inline u32 next_command(struct ctlr_info *h, u8 q); 277 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 278 u32 *cfg_base_addr, u64 *cfg_base_addr_index, 279 u64 *cfg_offset); 280 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 281 unsigned long *memory_bar); 282 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id); 283 static int wait_for_device_to_become_ready(struct ctlr_info *h, 284 unsigned char lunaddr[], 285 int reply_queue); 286 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 287 int wait_for_ready); 288 static inline void finish_cmd(struct CommandList *c); 289 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h); 290 #define BOARD_NOT_READY 0 291 #define BOARD_READY 1 292 static void hpsa_drain_accel_commands(struct ctlr_info *h); 293 static void hpsa_flush_cache(struct ctlr_info *h); 294 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h, 295 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 296 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk); 297 static void hpsa_command_resubmit_worker(struct work_struct *work); 298 static u32 lockup_detected(struct ctlr_info *h); 299 static int detect_controller_lockup(struct ctlr_info *h); 300 static void hpsa_disable_rld_caching(struct ctlr_info *h); 301 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 302 struct ReportExtendedLUNdata *buf, int bufsize); 303 static bool hpsa_vpd_page_supported(struct ctlr_info *h, 304 unsigned char scsi3addr[], u8 page); 305 static int hpsa_luns_changed(struct ctlr_info *h); 306 static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c, 307 struct hpsa_scsi_dev_t *dev, 308 unsigned char *scsi3addr); 309 310 static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev) 311 { 312 unsigned long *priv = shost_priv(sdev->host); 313 return (struct ctlr_info *) *priv; 314 } 315 316 static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh) 317 { 318 unsigned long *priv = shost_priv(sh); 319 return (struct ctlr_info *) *priv; 320 } 321 322 static inline bool hpsa_is_cmd_idle(struct CommandList *c) 323 { 324 return c->scsi_cmd == SCSI_CMD_IDLE; 325 } 326 327 static inline bool hpsa_is_pending_event(struct CommandList *c) 328 { 329 return c->abort_pending || c->reset_pending; 330 } 331 332 /* extract sense key, asc, and ascq from sense data. -1 means invalid. */ 333 static void decode_sense_data(const u8 *sense_data, int sense_data_len, 334 u8 *sense_key, u8 *asc, u8 *ascq) 335 { 336 struct scsi_sense_hdr sshdr; 337 bool rc; 338 339 *sense_key = -1; 340 *asc = -1; 341 *ascq = -1; 342 343 if (sense_data_len < 1) 344 return; 345 346 rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr); 347 if (rc) { 348 *sense_key = sshdr.sense_key; 349 *asc = sshdr.asc; 350 *ascq = sshdr.ascq; 351 } 352 } 353 354 static int check_for_unit_attention(struct ctlr_info *h, 355 struct CommandList *c) 356 { 357 u8 sense_key, asc, ascq; 358 int sense_len; 359 360 if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo)) 361 sense_len = sizeof(c->err_info->SenseInfo); 362 else 363 sense_len = c->err_info->SenseLen; 364 365 decode_sense_data(c->err_info->SenseInfo, sense_len, 366 &sense_key, &asc, &ascq); 367 if (sense_key != UNIT_ATTENTION || asc == 0xff) 368 return 0; 369 370 switch (asc) { 371 case STATE_CHANGED: 372 dev_warn(&h->pdev->dev, 373 "%s: a state change detected, command retried\n", 374 h->devname); 375 break; 376 case LUN_FAILED: 377 dev_warn(&h->pdev->dev, 378 "%s: LUN failure detected\n", h->devname); 379 break; 380 case REPORT_LUNS_CHANGED: 381 dev_warn(&h->pdev->dev, 382 "%s: report LUN data changed\n", h->devname); 383 /* 384 * Note: this REPORT_LUNS_CHANGED condition only occurs on the external 385 * target (array) devices. 386 */ 387 break; 388 case POWER_OR_RESET: 389 dev_warn(&h->pdev->dev, 390 "%s: a power on or device reset detected\n", 391 h->devname); 392 break; 393 case UNIT_ATTENTION_CLEARED: 394 dev_warn(&h->pdev->dev, 395 "%s: unit attention cleared by another initiator\n", 396 h->devname); 397 break; 398 default: 399 dev_warn(&h->pdev->dev, 400 "%s: unknown unit attention detected\n", 401 h->devname); 402 break; 403 } 404 return 1; 405 } 406 407 static int check_for_busy(struct ctlr_info *h, struct CommandList *c) 408 { 409 if (c->err_info->CommandStatus != CMD_TARGET_STATUS || 410 (c->err_info->ScsiStatus != SAM_STAT_BUSY && 411 c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL)) 412 return 0; 413 dev_warn(&h->pdev->dev, HPSA "device busy"); 414 return 1; 415 } 416 417 static u32 lockup_detected(struct ctlr_info *h); 418 static ssize_t host_show_lockup_detected(struct device *dev, 419 struct device_attribute *attr, char *buf) 420 { 421 int ld; 422 struct ctlr_info *h; 423 struct Scsi_Host *shost = class_to_shost(dev); 424 425 h = shost_to_hba(shost); 426 ld = lockup_detected(h); 427 428 return sprintf(buf, "ld=%d\n", ld); 429 } 430 431 static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev, 432 struct device_attribute *attr, 433 const char *buf, size_t count) 434 { 435 int status, len; 436 struct ctlr_info *h; 437 struct Scsi_Host *shost = class_to_shost(dev); 438 char tmpbuf[10]; 439 440 if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO)) 441 return -EACCES; 442 len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count; 443 strncpy(tmpbuf, buf, len); 444 tmpbuf[len] = '\0'; 445 if (sscanf(tmpbuf, "%d", &status) != 1) 446 return -EINVAL; 447 h = shost_to_hba(shost); 448 h->acciopath_status = !!status; 449 dev_warn(&h->pdev->dev, 450 "hpsa: HP SSD Smart Path %s via sysfs update.\n", 451 h->acciopath_status ? "enabled" : "disabled"); 452 return count; 453 } 454 455 static ssize_t host_store_raid_offload_debug(struct device *dev, 456 struct device_attribute *attr, 457 const char *buf, size_t count) 458 { 459 int debug_level, len; 460 struct ctlr_info *h; 461 struct Scsi_Host *shost = class_to_shost(dev); 462 char tmpbuf[10]; 463 464 if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO)) 465 return -EACCES; 466 len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count; 467 strncpy(tmpbuf, buf, len); 468 tmpbuf[len] = '\0'; 469 if (sscanf(tmpbuf, "%d", &debug_level) != 1) 470 return -EINVAL; 471 if (debug_level < 0) 472 debug_level = 0; 473 h = shost_to_hba(shost); 474 h->raid_offload_debug = debug_level; 475 dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n", 476 h->raid_offload_debug); 477 return count; 478 } 479 480 static ssize_t host_store_rescan(struct device *dev, 481 struct device_attribute *attr, 482 const char *buf, size_t count) 483 { 484 struct ctlr_info *h; 485 struct Scsi_Host *shost = class_to_shost(dev); 486 h = shost_to_hba(shost); 487 hpsa_scan_start(h->scsi_host); 488 return count; 489 } 490 491 static ssize_t host_show_firmware_revision(struct device *dev, 492 struct device_attribute *attr, char *buf) 493 { 494 struct ctlr_info *h; 495 struct Scsi_Host *shost = class_to_shost(dev); 496 unsigned char *fwrev; 497 498 h = shost_to_hba(shost); 499 if (!h->hba_inquiry_data) 500 return 0; 501 fwrev = &h->hba_inquiry_data[32]; 502 return snprintf(buf, 20, "%c%c%c%c\n", 503 fwrev[0], fwrev[1], fwrev[2], fwrev[3]); 504 } 505 506 static ssize_t host_show_commands_outstanding(struct device *dev, 507 struct device_attribute *attr, char *buf) 508 { 509 struct Scsi_Host *shost = class_to_shost(dev); 510 struct ctlr_info *h = shost_to_hba(shost); 511 512 return snprintf(buf, 20, "%d\n", 513 atomic_read(&h->commands_outstanding)); 514 } 515 516 static ssize_t host_show_transport_mode(struct device *dev, 517 struct device_attribute *attr, char *buf) 518 { 519 struct ctlr_info *h; 520 struct Scsi_Host *shost = class_to_shost(dev); 521 522 h = shost_to_hba(shost); 523 return snprintf(buf, 20, "%s\n", 524 h->transMethod & CFGTBL_Trans_Performant ? 525 "performant" : "simple"); 526 } 527 528 static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev, 529 struct device_attribute *attr, char *buf) 530 { 531 struct ctlr_info *h; 532 struct Scsi_Host *shost = class_to_shost(dev); 533 534 h = shost_to_hba(shost); 535 return snprintf(buf, 30, "HP SSD Smart Path %s\n", 536 (h->acciopath_status == 1) ? "enabled" : "disabled"); 537 } 538 539 /* List of controllers which cannot be hard reset on kexec with reset_devices */ 540 static u32 unresettable_controller[] = { 541 0x324a103C, /* Smart Array P712m */ 542 0x324b103C, /* Smart Array P711m */ 543 0x3223103C, /* Smart Array P800 */ 544 0x3234103C, /* Smart Array P400 */ 545 0x3235103C, /* Smart Array P400i */ 546 0x3211103C, /* Smart Array E200i */ 547 0x3212103C, /* Smart Array E200 */ 548 0x3213103C, /* Smart Array E200i */ 549 0x3214103C, /* Smart Array E200i */ 550 0x3215103C, /* Smart Array E200i */ 551 0x3237103C, /* Smart Array E500 */ 552 0x323D103C, /* Smart Array P700m */ 553 0x40800E11, /* Smart Array 5i */ 554 0x409C0E11, /* Smart Array 6400 */ 555 0x409D0E11, /* Smart Array 6400 EM */ 556 0x40700E11, /* Smart Array 5300 */ 557 0x40820E11, /* Smart Array 532 */ 558 0x40830E11, /* Smart Array 5312 */ 559 0x409A0E11, /* Smart Array 641 */ 560 0x409B0E11, /* Smart Array 642 */ 561 0x40910E11, /* Smart Array 6i */ 562 }; 563 564 /* List of controllers which cannot even be soft reset */ 565 static u32 soft_unresettable_controller[] = { 566 0x40800E11, /* Smart Array 5i */ 567 0x40700E11, /* Smart Array 5300 */ 568 0x40820E11, /* Smart Array 532 */ 569 0x40830E11, /* Smart Array 5312 */ 570 0x409A0E11, /* Smart Array 641 */ 571 0x409B0E11, /* Smart Array 642 */ 572 0x40910E11, /* Smart Array 6i */ 573 /* Exclude 640x boards. These are two pci devices in one slot 574 * which share a battery backed cache module. One controls the 575 * cache, the other accesses the cache through the one that controls 576 * it. If we reset the one controlling the cache, the other will 577 * likely not be happy. Just forbid resetting this conjoined mess. 578 * The 640x isn't really supported by hpsa anyway. 579 */ 580 0x409C0E11, /* Smart Array 6400 */ 581 0x409D0E11, /* Smart Array 6400 EM */ 582 }; 583 584 static u32 needs_abort_tags_swizzled[] = { 585 0x323D103C, /* Smart Array P700m */ 586 0x324a103C, /* Smart Array P712m */ 587 0x324b103C, /* SmartArray P711m */ 588 }; 589 590 static int board_id_in_array(u32 a[], int nelems, u32 board_id) 591 { 592 int i; 593 594 for (i = 0; i < nelems; i++) 595 if (a[i] == board_id) 596 return 1; 597 return 0; 598 } 599 600 static int ctlr_is_hard_resettable(u32 board_id) 601 { 602 return !board_id_in_array(unresettable_controller, 603 ARRAY_SIZE(unresettable_controller), board_id); 604 } 605 606 static int ctlr_is_soft_resettable(u32 board_id) 607 { 608 return !board_id_in_array(soft_unresettable_controller, 609 ARRAY_SIZE(soft_unresettable_controller), board_id); 610 } 611 612 static int ctlr_is_resettable(u32 board_id) 613 { 614 return ctlr_is_hard_resettable(board_id) || 615 ctlr_is_soft_resettable(board_id); 616 } 617 618 static int ctlr_needs_abort_tags_swizzled(u32 board_id) 619 { 620 return board_id_in_array(needs_abort_tags_swizzled, 621 ARRAY_SIZE(needs_abort_tags_swizzled), board_id); 622 } 623 624 static ssize_t host_show_resettable(struct device *dev, 625 struct device_attribute *attr, char *buf) 626 { 627 struct ctlr_info *h; 628 struct Scsi_Host *shost = class_to_shost(dev); 629 630 h = shost_to_hba(shost); 631 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id)); 632 } 633 634 static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[]) 635 { 636 return (scsi3addr[3] & 0xC0) == 0x40; 637 } 638 639 static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6", 640 "1(+0)ADM", "UNKNOWN", "PHYS DRV" 641 }; 642 #define HPSA_RAID_0 0 643 #define HPSA_RAID_4 1 644 #define HPSA_RAID_1 2 /* also used for RAID 10 */ 645 #define HPSA_RAID_5 3 /* also used for RAID 50 */ 646 #define HPSA_RAID_51 4 647 #define HPSA_RAID_6 5 /* also used for RAID 60 */ 648 #define HPSA_RAID_ADM 6 /* also used for RAID 1+0 ADM */ 649 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 2) 650 #define PHYSICAL_DRIVE (ARRAY_SIZE(raid_label) - 1) 651 652 static inline bool is_logical_device(struct hpsa_scsi_dev_t *device) 653 { 654 return !device->physical_device; 655 } 656 657 static ssize_t raid_level_show(struct device *dev, 658 struct device_attribute *attr, char *buf) 659 { 660 ssize_t l = 0; 661 unsigned char rlevel; 662 struct ctlr_info *h; 663 struct scsi_device *sdev; 664 struct hpsa_scsi_dev_t *hdev; 665 unsigned long flags; 666 667 sdev = to_scsi_device(dev); 668 h = sdev_to_hba(sdev); 669 spin_lock_irqsave(&h->lock, flags); 670 hdev = sdev->hostdata; 671 if (!hdev) { 672 spin_unlock_irqrestore(&h->lock, flags); 673 return -ENODEV; 674 } 675 676 /* Is this even a logical drive? */ 677 if (!is_logical_device(hdev)) { 678 spin_unlock_irqrestore(&h->lock, flags); 679 l = snprintf(buf, PAGE_SIZE, "N/A\n"); 680 return l; 681 } 682 683 rlevel = hdev->raid_level; 684 spin_unlock_irqrestore(&h->lock, flags); 685 if (rlevel > RAID_UNKNOWN) 686 rlevel = RAID_UNKNOWN; 687 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]); 688 return l; 689 } 690 691 static ssize_t lunid_show(struct device *dev, 692 struct device_attribute *attr, char *buf) 693 { 694 struct ctlr_info *h; 695 struct scsi_device *sdev; 696 struct hpsa_scsi_dev_t *hdev; 697 unsigned long flags; 698 unsigned char lunid[8]; 699 700 sdev = to_scsi_device(dev); 701 h = sdev_to_hba(sdev); 702 spin_lock_irqsave(&h->lock, flags); 703 hdev = sdev->hostdata; 704 if (!hdev) { 705 spin_unlock_irqrestore(&h->lock, flags); 706 return -ENODEV; 707 } 708 memcpy(lunid, hdev->scsi3addr, sizeof(lunid)); 709 spin_unlock_irqrestore(&h->lock, flags); 710 return snprintf(buf, 20, "0x%8phN\n", lunid); 711 } 712 713 static ssize_t unique_id_show(struct device *dev, 714 struct device_attribute *attr, char *buf) 715 { 716 struct ctlr_info *h; 717 struct scsi_device *sdev; 718 struct hpsa_scsi_dev_t *hdev; 719 unsigned long flags; 720 unsigned char sn[16]; 721 722 sdev = to_scsi_device(dev); 723 h = sdev_to_hba(sdev); 724 spin_lock_irqsave(&h->lock, flags); 725 hdev = sdev->hostdata; 726 if (!hdev) { 727 spin_unlock_irqrestore(&h->lock, flags); 728 return -ENODEV; 729 } 730 memcpy(sn, hdev->device_id, sizeof(sn)); 731 spin_unlock_irqrestore(&h->lock, flags); 732 return snprintf(buf, 16 * 2 + 2, 733 "%02X%02X%02X%02X%02X%02X%02X%02X" 734 "%02X%02X%02X%02X%02X%02X%02X%02X\n", 735 sn[0], sn[1], sn[2], sn[3], 736 sn[4], sn[5], sn[6], sn[7], 737 sn[8], sn[9], sn[10], sn[11], 738 sn[12], sn[13], sn[14], sn[15]); 739 } 740 741 static ssize_t sas_address_show(struct device *dev, 742 struct device_attribute *attr, char *buf) 743 { 744 struct ctlr_info *h; 745 struct scsi_device *sdev; 746 struct hpsa_scsi_dev_t *hdev; 747 unsigned long flags; 748 u64 sas_address; 749 750 sdev = to_scsi_device(dev); 751 h = sdev_to_hba(sdev); 752 spin_lock_irqsave(&h->lock, flags); 753 hdev = sdev->hostdata; 754 if (!hdev || is_logical_device(hdev) || !hdev->expose_device) { 755 spin_unlock_irqrestore(&h->lock, flags); 756 return -ENODEV; 757 } 758 sas_address = hdev->sas_address; 759 spin_unlock_irqrestore(&h->lock, flags); 760 761 return snprintf(buf, PAGE_SIZE, "0x%016llx\n", sas_address); 762 } 763 764 static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev, 765 struct device_attribute *attr, char *buf) 766 { 767 struct ctlr_info *h; 768 struct scsi_device *sdev; 769 struct hpsa_scsi_dev_t *hdev; 770 unsigned long flags; 771 int offload_enabled; 772 773 sdev = to_scsi_device(dev); 774 h = sdev_to_hba(sdev); 775 spin_lock_irqsave(&h->lock, flags); 776 hdev = sdev->hostdata; 777 if (!hdev) { 778 spin_unlock_irqrestore(&h->lock, flags); 779 return -ENODEV; 780 } 781 offload_enabled = hdev->offload_enabled; 782 spin_unlock_irqrestore(&h->lock, flags); 783 return snprintf(buf, 20, "%d\n", offload_enabled); 784 } 785 786 #define MAX_PATHS 8 787 static ssize_t path_info_show(struct device *dev, 788 struct device_attribute *attr, char *buf) 789 { 790 struct ctlr_info *h; 791 struct scsi_device *sdev; 792 struct hpsa_scsi_dev_t *hdev; 793 unsigned long flags; 794 int i; 795 int output_len = 0; 796 u8 box; 797 u8 bay; 798 u8 path_map_index = 0; 799 char *active; 800 unsigned char phys_connector[2]; 801 802 sdev = to_scsi_device(dev); 803 h = sdev_to_hba(sdev); 804 spin_lock_irqsave(&h->devlock, flags); 805 hdev = sdev->hostdata; 806 if (!hdev) { 807 spin_unlock_irqrestore(&h->devlock, flags); 808 return -ENODEV; 809 } 810 811 bay = hdev->bay; 812 for (i = 0; i < MAX_PATHS; i++) { 813 path_map_index = 1<<i; 814 if (i == hdev->active_path_index) 815 active = "Active"; 816 else if (hdev->path_map & path_map_index) 817 active = "Inactive"; 818 else 819 continue; 820 821 output_len += scnprintf(buf + output_len, 822 PAGE_SIZE - output_len, 823 "[%d:%d:%d:%d] %20.20s ", 824 h->scsi_host->host_no, 825 hdev->bus, hdev->target, hdev->lun, 826 scsi_device_type(hdev->devtype)); 827 828 if (hdev->devtype == TYPE_RAID || is_logical_device(hdev)) { 829 output_len += scnprintf(buf + output_len, 830 PAGE_SIZE - output_len, 831 "%s\n", active); 832 continue; 833 } 834 835 box = hdev->box[i]; 836 memcpy(&phys_connector, &hdev->phys_connector[i], 837 sizeof(phys_connector)); 838 if (phys_connector[0] < '0') 839 phys_connector[0] = '0'; 840 if (phys_connector[1] < '0') 841 phys_connector[1] = '0'; 842 output_len += scnprintf(buf + output_len, 843 PAGE_SIZE - output_len, 844 "PORT: %.2s ", 845 phys_connector); 846 if ((hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC) && 847 hdev->expose_device) { 848 if (box == 0 || box == 0xFF) { 849 output_len += scnprintf(buf + output_len, 850 PAGE_SIZE - output_len, 851 "BAY: %hhu %s\n", 852 bay, active); 853 } else { 854 output_len += scnprintf(buf + output_len, 855 PAGE_SIZE - output_len, 856 "BOX: %hhu BAY: %hhu %s\n", 857 box, bay, active); 858 } 859 } else if (box != 0 && box != 0xFF) { 860 output_len += scnprintf(buf + output_len, 861 PAGE_SIZE - output_len, "BOX: %hhu %s\n", 862 box, active); 863 } else 864 output_len += scnprintf(buf + output_len, 865 PAGE_SIZE - output_len, "%s\n", active); 866 } 867 868 spin_unlock_irqrestore(&h->devlock, flags); 869 return output_len; 870 } 871 872 static ssize_t host_show_ctlr_num(struct device *dev, 873 struct device_attribute *attr, char *buf) 874 { 875 struct ctlr_info *h; 876 struct Scsi_Host *shost = class_to_shost(dev); 877 878 h = shost_to_hba(shost); 879 return snprintf(buf, 20, "%d\n", h->ctlr); 880 } 881 882 static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL); 883 static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL); 884 static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL); 885 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan); 886 static DEVICE_ATTR(sas_address, S_IRUGO, sas_address_show, NULL); 887 static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO, 888 host_show_hp_ssd_smart_path_enabled, NULL); 889 static DEVICE_ATTR(path_info, S_IRUGO, path_info_show, NULL); 890 static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH, 891 host_show_hp_ssd_smart_path_status, 892 host_store_hp_ssd_smart_path_status); 893 static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL, 894 host_store_raid_offload_debug); 895 static DEVICE_ATTR(firmware_revision, S_IRUGO, 896 host_show_firmware_revision, NULL); 897 static DEVICE_ATTR(commands_outstanding, S_IRUGO, 898 host_show_commands_outstanding, NULL); 899 static DEVICE_ATTR(transport_mode, S_IRUGO, 900 host_show_transport_mode, NULL); 901 static DEVICE_ATTR(resettable, S_IRUGO, 902 host_show_resettable, NULL); 903 static DEVICE_ATTR(lockup_detected, S_IRUGO, 904 host_show_lockup_detected, NULL); 905 static DEVICE_ATTR(ctlr_num, S_IRUGO, 906 host_show_ctlr_num, NULL); 907 908 static struct device_attribute *hpsa_sdev_attrs[] = { 909 &dev_attr_raid_level, 910 &dev_attr_lunid, 911 &dev_attr_unique_id, 912 &dev_attr_hp_ssd_smart_path_enabled, 913 &dev_attr_path_info, 914 &dev_attr_sas_address, 915 NULL, 916 }; 917 918 static struct device_attribute *hpsa_shost_attrs[] = { 919 &dev_attr_rescan, 920 &dev_attr_firmware_revision, 921 &dev_attr_commands_outstanding, 922 &dev_attr_transport_mode, 923 &dev_attr_resettable, 924 &dev_attr_hp_ssd_smart_path_status, 925 &dev_attr_raid_offload_debug, 926 &dev_attr_lockup_detected, 927 &dev_attr_ctlr_num, 928 NULL, 929 }; 930 931 #define HPSA_NRESERVED_CMDS (HPSA_CMDS_RESERVED_FOR_ABORTS + \ 932 HPSA_CMDS_RESERVED_FOR_DRIVER + HPSA_MAX_CONCURRENT_PASSTHRUS) 933 934 static struct scsi_host_template hpsa_driver_template = { 935 .module = THIS_MODULE, 936 .name = HPSA, 937 .proc_name = HPSA, 938 .queuecommand = hpsa_scsi_queue_command, 939 .scan_start = hpsa_scan_start, 940 .scan_finished = hpsa_scan_finished, 941 .change_queue_depth = hpsa_change_queue_depth, 942 .this_id = -1, 943 .use_clustering = ENABLE_CLUSTERING, 944 .eh_abort_handler = hpsa_eh_abort_handler, 945 .eh_device_reset_handler = hpsa_eh_device_reset_handler, 946 .ioctl = hpsa_ioctl, 947 .slave_alloc = hpsa_slave_alloc, 948 .slave_configure = hpsa_slave_configure, 949 .slave_destroy = hpsa_slave_destroy, 950 #ifdef CONFIG_COMPAT 951 .compat_ioctl = hpsa_compat_ioctl, 952 #endif 953 .sdev_attrs = hpsa_sdev_attrs, 954 .shost_attrs = hpsa_shost_attrs, 955 .max_sectors = 8192, 956 .no_write_same = 1, 957 }; 958 959 static inline u32 next_command(struct ctlr_info *h, u8 q) 960 { 961 u32 a; 962 struct reply_queue_buffer *rq = &h->reply_queue[q]; 963 964 if (h->transMethod & CFGTBL_Trans_io_accel1) 965 return h->access.command_completed(h, q); 966 967 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant))) 968 return h->access.command_completed(h, q); 969 970 if ((rq->head[rq->current_entry] & 1) == rq->wraparound) { 971 a = rq->head[rq->current_entry]; 972 rq->current_entry++; 973 atomic_dec(&h->commands_outstanding); 974 } else { 975 a = FIFO_EMPTY; 976 } 977 /* Check for wraparound */ 978 if (rq->current_entry == h->max_commands) { 979 rq->current_entry = 0; 980 rq->wraparound ^= 1; 981 } 982 return a; 983 } 984 985 /* 986 * There are some special bits in the bus address of the 987 * command that we have to set for the controller to know 988 * how to process the command: 989 * 990 * Normal performant mode: 991 * bit 0: 1 means performant mode, 0 means simple mode. 992 * bits 1-3 = block fetch table entry 993 * bits 4-6 = command type (== 0) 994 * 995 * ioaccel1 mode: 996 * bit 0 = "performant mode" bit. 997 * bits 1-3 = block fetch table entry 998 * bits 4-6 = command type (== 110) 999 * (command type is needed because ioaccel1 mode 1000 * commands are submitted through the same register as normal 1001 * mode commands, so this is how the controller knows whether 1002 * the command is normal mode or ioaccel1 mode.) 1003 * 1004 * ioaccel2 mode: 1005 * bit 0 = "performant mode" bit. 1006 * bits 1-4 = block fetch table entry (note extra bit) 1007 * bits 4-6 = not needed, because ioaccel2 mode has 1008 * a separate special register for submitting commands. 1009 */ 1010 1011 /* 1012 * set_performant_mode: Modify the tag for cciss performant 1013 * set bit 0 for pull model, bits 3-1 for block fetch 1014 * register number 1015 */ 1016 #define DEFAULT_REPLY_QUEUE (-1) 1017 static void set_performant_mode(struct ctlr_info *h, struct CommandList *c, 1018 int reply_queue) 1019 { 1020 if (likely(h->transMethod & CFGTBL_Trans_Performant)) { 1021 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1); 1022 if (unlikely(!h->msix_vectors)) 1023 return; 1024 if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1025 c->Header.ReplyQueue = 1026 raw_smp_processor_id() % h->nreply_queues; 1027 else 1028 c->Header.ReplyQueue = reply_queue % h->nreply_queues; 1029 } 1030 } 1031 1032 static void set_ioaccel1_performant_mode(struct ctlr_info *h, 1033 struct CommandList *c, 1034 int reply_queue) 1035 { 1036 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex]; 1037 1038 /* 1039 * Tell the controller to post the reply to the queue for this 1040 * processor. This seems to give the best I/O throughput. 1041 */ 1042 if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1043 cp->ReplyQueue = smp_processor_id() % h->nreply_queues; 1044 else 1045 cp->ReplyQueue = reply_queue % h->nreply_queues; 1046 /* 1047 * Set the bits in the address sent down to include: 1048 * - performant mode bit (bit 0) 1049 * - pull count (bits 1-3) 1050 * - command type (bits 4-6) 1051 */ 1052 c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) | 1053 IOACCEL1_BUSADDR_CMDTYPE; 1054 } 1055 1056 static void set_ioaccel2_tmf_performant_mode(struct ctlr_info *h, 1057 struct CommandList *c, 1058 int reply_queue) 1059 { 1060 struct hpsa_tmf_struct *cp = (struct hpsa_tmf_struct *) 1061 &h->ioaccel2_cmd_pool[c->cmdindex]; 1062 1063 /* Tell the controller to post the reply to the queue for this 1064 * processor. This seems to give the best I/O throughput. 1065 */ 1066 if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1067 cp->reply_queue = smp_processor_id() % h->nreply_queues; 1068 else 1069 cp->reply_queue = reply_queue % h->nreply_queues; 1070 /* Set the bits in the address sent down to include: 1071 * - performant mode bit not used in ioaccel mode 2 1072 * - pull count (bits 0-3) 1073 * - command type isn't needed for ioaccel2 1074 */ 1075 c->busaddr |= h->ioaccel2_blockFetchTable[0]; 1076 } 1077 1078 static void set_ioaccel2_performant_mode(struct ctlr_info *h, 1079 struct CommandList *c, 1080 int reply_queue) 1081 { 1082 struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex]; 1083 1084 /* 1085 * Tell the controller to post the reply to the queue for this 1086 * processor. This seems to give the best I/O throughput. 1087 */ 1088 if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1089 cp->reply_queue = smp_processor_id() % h->nreply_queues; 1090 else 1091 cp->reply_queue = reply_queue % h->nreply_queues; 1092 /* 1093 * Set the bits in the address sent down to include: 1094 * - performant mode bit not used in ioaccel mode 2 1095 * - pull count (bits 0-3) 1096 * - command type isn't needed for ioaccel2 1097 */ 1098 c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]); 1099 } 1100 1101 static int is_firmware_flash_cmd(u8 *cdb) 1102 { 1103 return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE; 1104 } 1105 1106 /* 1107 * During firmware flash, the heartbeat register may not update as frequently 1108 * as it should. So we dial down lockup detection during firmware flash. and 1109 * dial it back up when firmware flash completes. 1110 */ 1111 #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ) 1112 #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ) 1113 static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h, 1114 struct CommandList *c) 1115 { 1116 if (!is_firmware_flash_cmd(c->Request.CDB)) 1117 return; 1118 atomic_inc(&h->firmware_flash_in_progress); 1119 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH; 1120 } 1121 1122 static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h, 1123 struct CommandList *c) 1124 { 1125 if (is_firmware_flash_cmd(c->Request.CDB) && 1126 atomic_dec_and_test(&h->firmware_flash_in_progress)) 1127 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 1128 } 1129 1130 static void __enqueue_cmd_and_start_io(struct ctlr_info *h, 1131 struct CommandList *c, int reply_queue) 1132 { 1133 dial_down_lockup_detection_during_fw_flash(h, c); 1134 atomic_inc(&h->commands_outstanding); 1135 switch (c->cmd_type) { 1136 case CMD_IOACCEL1: 1137 set_ioaccel1_performant_mode(h, c, reply_queue); 1138 writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET); 1139 break; 1140 case CMD_IOACCEL2: 1141 set_ioaccel2_performant_mode(h, c, reply_queue); 1142 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32); 1143 break; 1144 case IOACCEL2_TMF: 1145 set_ioaccel2_tmf_performant_mode(h, c, reply_queue); 1146 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32); 1147 break; 1148 default: 1149 set_performant_mode(h, c, reply_queue); 1150 h->access.submit_command(h, c); 1151 } 1152 } 1153 1154 static void enqueue_cmd_and_start_io(struct ctlr_info *h, struct CommandList *c) 1155 { 1156 if (unlikely(hpsa_is_pending_event(c))) 1157 return finish_cmd(c); 1158 1159 __enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE); 1160 } 1161 1162 static inline int is_hba_lunid(unsigned char scsi3addr[]) 1163 { 1164 return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0; 1165 } 1166 1167 static inline int is_scsi_rev_5(struct ctlr_info *h) 1168 { 1169 if (!h->hba_inquiry_data) 1170 return 0; 1171 if ((h->hba_inquiry_data[2] & 0x07) == 5) 1172 return 1; 1173 return 0; 1174 } 1175 1176 static int hpsa_find_target_lun(struct ctlr_info *h, 1177 unsigned char scsi3addr[], int bus, int *target, int *lun) 1178 { 1179 /* finds an unused bus, target, lun for a new physical device 1180 * assumes h->devlock is held 1181 */ 1182 int i, found = 0; 1183 DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES); 1184 1185 bitmap_zero(lun_taken, HPSA_MAX_DEVICES); 1186 1187 for (i = 0; i < h->ndevices; i++) { 1188 if (h->dev[i]->bus == bus && h->dev[i]->target != -1) 1189 __set_bit(h->dev[i]->target, lun_taken); 1190 } 1191 1192 i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES); 1193 if (i < HPSA_MAX_DEVICES) { 1194 /* *bus = 1; */ 1195 *target = i; 1196 *lun = 0; 1197 found = 1; 1198 } 1199 return !found; 1200 } 1201 1202 static void hpsa_show_dev_msg(const char *level, struct ctlr_info *h, 1203 struct hpsa_scsi_dev_t *dev, char *description) 1204 { 1205 #define LABEL_SIZE 25 1206 char label[LABEL_SIZE]; 1207 1208 if (h == NULL || h->pdev == NULL || h->scsi_host == NULL) 1209 return; 1210 1211 switch (dev->devtype) { 1212 case TYPE_RAID: 1213 snprintf(label, LABEL_SIZE, "controller"); 1214 break; 1215 case TYPE_ENCLOSURE: 1216 snprintf(label, LABEL_SIZE, "enclosure"); 1217 break; 1218 case TYPE_DISK: 1219 case TYPE_ZBC: 1220 if (dev->external) 1221 snprintf(label, LABEL_SIZE, "external"); 1222 else if (!is_logical_dev_addr_mode(dev->scsi3addr)) 1223 snprintf(label, LABEL_SIZE, "%s", 1224 raid_label[PHYSICAL_DRIVE]); 1225 else 1226 snprintf(label, LABEL_SIZE, "RAID-%s", 1227 dev->raid_level > RAID_UNKNOWN ? "?" : 1228 raid_label[dev->raid_level]); 1229 break; 1230 case TYPE_ROM: 1231 snprintf(label, LABEL_SIZE, "rom"); 1232 break; 1233 case TYPE_TAPE: 1234 snprintf(label, LABEL_SIZE, "tape"); 1235 break; 1236 case TYPE_MEDIUM_CHANGER: 1237 snprintf(label, LABEL_SIZE, "changer"); 1238 break; 1239 default: 1240 snprintf(label, LABEL_SIZE, "UNKNOWN"); 1241 break; 1242 } 1243 1244 dev_printk(level, &h->pdev->dev, 1245 "scsi %d:%d:%d:%d: %s %s %.8s %.16s %s SSDSmartPathCap%c En%c Exp=%d\n", 1246 h->scsi_host->host_no, dev->bus, dev->target, dev->lun, 1247 description, 1248 scsi_device_type(dev->devtype), 1249 dev->vendor, 1250 dev->model, 1251 label, 1252 dev->offload_config ? '+' : '-', 1253 dev->offload_enabled ? '+' : '-', 1254 dev->expose_device); 1255 } 1256 1257 /* Add an entry into h->dev[] array. */ 1258 static int hpsa_scsi_add_entry(struct ctlr_info *h, 1259 struct hpsa_scsi_dev_t *device, 1260 struct hpsa_scsi_dev_t *added[], int *nadded) 1261 { 1262 /* assumes h->devlock is held */ 1263 int n = h->ndevices; 1264 int i; 1265 unsigned char addr1[8], addr2[8]; 1266 struct hpsa_scsi_dev_t *sd; 1267 1268 if (n >= HPSA_MAX_DEVICES) { 1269 dev_err(&h->pdev->dev, "too many devices, some will be " 1270 "inaccessible.\n"); 1271 return -1; 1272 } 1273 1274 /* physical devices do not have lun or target assigned until now. */ 1275 if (device->lun != -1) 1276 /* Logical device, lun is already assigned. */ 1277 goto lun_assigned; 1278 1279 /* If this device a non-zero lun of a multi-lun device 1280 * byte 4 of the 8-byte LUN addr will contain the logical 1281 * unit no, zero otherwise. 1282 */ 1283 if (device->scsi3addr[4] == 0) { 1284 /* This is not a non-zero lun of a multi-lun device */ 1285 if (hpsa_find_target_lun(h, device->scsi3addr, 1286 device->bus, &device->target, &device->lun) != 0) 1287 return -1; 1288 goto lun_assigned; 1289 } 1290 1291 /* This is a non-zero lun of a multi-lun device. 1292 * Search through our list and find the device which 1293 * has the same 8 byte LUN address, excepting byte 4 and 5. 1294 * Assign the same bus and target for this new LUN. 1295 * Use the logical unit number from the firmware. 1296 */ 1297 memcpy(addr1, device->scsi3addr, 8); 1298 addr1[4] = 0; 1299 addr1[5] = 0; 1300 for (i = 0; i < n; i++) { 1301 sd = h->dev[i]; 1302 memcpy(addr2, sd->scsi3addr, 8); 1303 addr2[4] = 0; 1304 addr2[5] = 0; 1305 /* differ only in byte 4 and 5? */ 1306 if (memcmp(addr1, addr2, 8) == 0) { 1307 device->bus = sd->bus; 1308 device->target = sd->target; 1309 device->lun = device->scsi3addr[4]; 1310 break; 1311 } 1312 } 1313 if (device->lun == -1) { 1314 dev_warn(&h->pdev->dev, "physical device with no LUN=0," 1315 " suspect firmware bug or unsupported hardware " 1316 "configuration.\n"); 1317 return -1; 1318 } 1319 1320 lun_assigned: 1321 1322 h->dev[n] = device; 1323 h->ndevices++; 1324 added[*nadded] = device; 1325 (*nadded)++; 1326 hpsa_show_dev_msg(KERN_INFO, h, device, 1327 device->expose_device ? "added" : "masked"); 1328 device->offload_to_be_enabled = device->offload_enabled; 1329 device->offload_enabled = 0; 1330 return 0; 1331 } 1332 1333 /* Update an entry in h->dev[] array. */ 1334 static void hpsa_scsi_update_entry(struct ctlr_info *h, 1335 int entry, struct hpsa_scsi_dev_t *new_entry) 1336 { 1337 int offload_enabled; 1338 /* assumes h->devlock is held */ 1339 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1340 1341 /* Raid level changed. */ 1342 h->dev[entry]->raid_level = new_entry->raid_level; 1343 1344 /* Raid offload parameters changed. Careful about the ordering. */ 1345 if (new_entry->offload_config && new_entry->offload_enabled) { 1346 /* 1347 * if drive is newly offload_enabled, we want to copy the 1348 * raid map data first. If previously offload_enabled and 1349 * offload_config were set, raid map data had better be 1350 * the same as it was before. if raid map data is changed 1351 * then it had better be the case that 1352 * h->dev[entry]->offload_enabled is currently 0. 1353 */ 1354 h->dev[entry]->raid_map = new_entry->raid_map; 1355 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 1356 } 1357 if (new_entry->hba_ioaccel_enabled) { 1358 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 1359 wmb(); /* set ioaccel_handle *before* hba_ioaccel_enabled */ 1360 } 1361 h->dev[entry]->hba_ioaccel_enabled = new_entry->hba_ioaccel_enabled; 1362 h->dev[entry]->offload_config = new_entry->offload_config; 1363 h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror; 1364 h->dev[entry]->queue_depth = new_entry->queue_depth; 1365 1366 /* 1367 * We can turn off ioaccel offload now, but need to delay turning 1368 * it on until we can update h->dev[entry]->phys_disk[], but we 1369 * can't do that until all the devices are updated. 1370 */ 1371 h->dev[entry]->offload_to_be_enabled = new_entry->offload_enabled; 1372 if (!new_entry->offload_enabled) 1373 h->dev[entry]->offload_enabled = 0; 1374 1375 offload_enabled = h->dev[entry]->offload_enabled; 1376 h->dev[entry]->offload_enabled = h->dev[entry]->offload_to_be_enabled; 1377 hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated"); 1378 h->dev[entry]->offload_enabled = offload_enabled; 1379 } 1380 1381 /* Replace an entry from h->dev[] array. */ 1382 static void hpsa_scsi_replace_entry(struct ctlr_info *h, 1383 int entry, struct hpsa_scsi_dev_t *new_entry, 1384 struct hpsa_scsi_dev_t *added[], int *nadded, 1385 struct hpsa_scsi_dev_t *removed[], int *nremoved) 1386 { 1387 /* assumes h->devlock is held */ 1388 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1389 removed[*nremoved] = h->dev[entry]; 1390 (*nremoved)++; 1391 1392 /* 1393 * New physical devices won't have target/lun assigned yet 1394 * so we need to preserve the values in the slot we are replacing. 1395 */ 1396 if (new_entry->target == -1) { 1397 new_entry->target = h->dev[entry]->target; 1398 new_entry->lun = h->dev[entry]->lun; 1399 } 1400 1401 h->dev[entry] = new_entry; 1402 added[*nadded] = new_entry; 1403 (*nadded)++; 1404 hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced"); 1405 new_entry->offload_to_be_enabled = new_entry->offload_enabled; 1406 new_entry->offload_enabled = 0; 1407 } 1408 1409 /* Remove an entry from h->dev[] array. */ 1410 static void hpsa_scsi_remove_entry(struct ctlr_info *h, int entry, 1411 struct hpsa_scsi_dev_t *removed[], int *nremoved) 1412 { 1413 /* assumes h->devlock is held */ 1414 int i; 1415 struct hpsa_scsi_dev_t *sd; 1416 1417 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1418 1419 sd = h->dev[entry]; 1420 removed[*nremoved] = h->dev[entry]; 1421 (*nremoved)++; 1422 1423 for (i = entry; i < h->ndevices-1; i++) 1424 h->dev[i] = h->dev[i+1]; 1425 h->ndevices--; 1426 hpsa_show_dev_msg(KERN_INFO, h, sd, "removed"); 1427 } 1428 1429 #define SCSI3ADDR_EQ(a, b) ( \ 1430 (a)[7] == (b)[7] && \ 1431 (a)[6] == (b)[6] && \ 1432 (a)[5] == (b)[5] && \ 1433 (a)[4] == (b)[4] && \ 1434 (a)[3] == (b)[3] && \ 1435 (a)[2] == (b)[2] && \ 1436 (a)[1] == (b)[1] && \ 1437 (a)[0] == (b)[0]) 1438 1439 static void fixup_botched_add(struct ctlr_info *h, 1440 struct hpsa_scsi_dev_t *added) 1441 { 1442 /* called when scsi_add_device fails in order to re-adjust 1443 * h->dev[] to match the mid layer's view. 1444 */ 1445 unsigned long flags; 1446 int i, j; 1447 1448 spin_lock_irqsave(&h->lock, flags); 1449 for (i = 0; i < h->ndevices; i++) { 1450 if (h->dev[i] == added) { 1451 for (j = i; j < h->ndevices-1; j++) 1452 h->dev[j] = h->dev[j+1]; 1453 h->ndevices--; 1454 break; 1455 } 1456 } 1457 spin_unlock_irqrestore(&h->lock, flags); 1458 kfree(added); 1459 } 1460 1461 static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1, 1462 struct hpsa_scsi_dev_t *dev2) 1463 { 1464 /* we compare everything except lun and target as these 1465 * are not yet assigned. Compare parts likely 1466 * to differ first 1467 */ 1468 if (memcmp(dev1->scsi3addr, dev2->scsi3addr, 1469 sizeof(dev1->scsi3addr)) != 0) 1470 return 0; 1471 if (memcmp(dev1->device_id, dev2->device_id, 1472 sizeof(dev1->device_id)) != 0) 1473 return 0; 1474 if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0) 1475 return 0; 1476 if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0) 1477 return 0; 1478 if (dev1->devtype != dev2->devtype) 1479 return 0; 1480 if (dev1->bus != dev2->bus) 1481 return 0; 1482 return 1; 1483 } 1484 1485 static inline int device_updated(struct hpsa_scsi_dev_t *dev1, 1486 struct hpsa_scsi_dev_t *dev2) 1487 { 1488 /* Device attributes that can change, but don't mean 1489 * that the device is a different device, nor that the OS 1490 * needs to be told anything about the change. 1491 */ 1492 if (dev1->raid_level != dev2->raid_level) 1493 return 1; 1494 if (dev1->offload_config != dev2->offload_config) 1495 return 1; 1496 if (dev1->offload_enabled != dev2->offload_enabled) 1497 return 1; 1498 if (!is_logical_dev_addr_mode(dev1->scsi3addr)) 1499 if (dev1->queue_depth != dev2->queue_depth) 1500 return 1; 1501 return 0; 1502 } 1503 1504 /* Find needle in haystack. If exact match found, return DEVICE_SAME, 1505 * and return needle location in *index. If scsi3addr matches, but not 1506 * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle 1507 * location in *index. 1508 * In the case of a minor device attribute change, such as RAID level, just 1509 * return DEVICE_UPDATED, along with the updated device's location in index. 1510 * If needle not found, return DEVICE_NOT_FOUND. 1511 */ 1512 static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle, 1513 struct hpsa_scsi_dev_t *haystack[], int haystack_size, 1514 int *index) 1515 { 1516 int i; 1517 #define DEVICE_NOT_FOUND 0 1518 #define DEVICE_CHANGED 1 1519 #define DEVICE_SAME 2 1520 #define DEVICE_UPDATED 3 1521 if (needle == NULL) 1522 return DEVICE_NOT_FOUND; 1523 1524 for (i = 0; i < haystack_size; i++) { 1525 if (haystack[i] == NULL) /* previously removed. */ 1526 continue; 1527 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) { 1528 *index = i; 1529 if (device_is_the_same(needle, haystack[i])) { 1530 if (device_updated(needle, haystack[i])) 1531 return DEVICE_UPDATED; 1532 return DEVICE_SAME; 1533 } else { 1534 /* Keep offline devices offline */ 1535 if (needle->volume_offline) 1536 return DEVICE_NOT_FOUND; 1537 return DEVICE_CHANGED; 1538 } 1539 } 1540 } 1541 *index = -1; 1542 return DEVICE_NOT_FOUND; 1543 } 1544 1545 static void hpsa_monitor_offline_device(struct ctlr_info *h, 1546 unsigned char scsi3addr[]) 1547 { 1548 struct offline_device_entry *device; 1549 unsigned long flags; 1550 1551 /* Check to see if device is already on the list */ 1552 spin_lock_irqsave(&h->offline_device_lock, flags); 1553 list_for_each_entry(device, &h->offline_device_list, offline_list) { 1554 if (memcmp(device->scsi3addr, scsi3addr, 1555 sizeof(device->scsi3addr)) == 0) { 1556 spin_unlock_irqrestore(&h->offline_device_lock, flags); 1557 return; 1558 } 1559 } 1560 spin_unlock_irqrestore(&h->offline_device_lock, flags); 1561 1562 /* Device is not on the list, add it. */ 1563 device = kmalloc(sizeof(*device), GFP_KERNEL); 1564 if (!device) 1565 return; 1566 1567 memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr)); 1568 spin_lock_irqsave(&h->offline_device_lock, flags); 1569 list_add_tail(&device->offline_list, &h->offline_device_list); 1570 spin_unlock_irqrestore(&h->offline_device_lock, flags); 1571 } 1572 1573 /* Print a message explaining various offline volume states */ 1574 static void hpsa_show_volume_status(struct ctlr_info *h, 1575 struct hpsa_scsi_dev_t *sd) 1576 { 1577 if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED) 1578 dev_info(&h->pdev->dev, 1579 "C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n", 1580 h->scsi_host->host_no, 1581 sd->bus, sd->target, sd->lun); 1582 switch (sd->volume_offline) { 1583 case HPSA_LV_OK: 1584 break; 1585 case HPSA_LV_UNDERGOING_ERASE: 1586 dev_info(&h->pdev->dev, 1587 "C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n", 1588 h->scsi_host->host_no, 1589 sd->bus, sd->target, sd->lun); 1590 break; 1591 case HPSA_LV_NOT_AVAILABLE: 1592 dev_info(&h->pdev->dev, 1593 "C%d:B%d:T%d:L%d Volume is waiting for transforming volume.\n", 1594 h->scsi_host->host_no, 1595 sd->bus, sd->target, sd->lun); 1596 break; 1597 case HPSA_LV_UNDERGOING_RPI: 1598 dev_info(&h->pdev->dev, 1599 "C%d:B%d:T%d:L%d Volume is undergoing rapid parity init.\n", 1600 h->scsi_host->host_no, 1601 sd->bus, sd->target, sd->lun); 1602 break; 1603 case HPSA_LV_PENDING_RPI: 1604 dev_info(&h->pdev->dev, 1605 "C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n", 1606 h->scsi_host->host_no, 1607 sd->bus, sd->target, sd->lun); 1608 break; 1609 case HPSA_LV_ENCRYPTED_NO_KEY: 1610 dev_info(&h->pdev->dev, 1611 "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n", 1612 h->scsi_host->host_no, 1613 sd->bus, sd->target, sd->lun); 1614 break; 1615 case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER: 1616 dev_info(&h->pdev->dev, 1617 "C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n", 1618 h->scsi_host->host_no, 1619 sd->bus, sd->target, sd->lun); 1620 break; 1621 case HPSA_LV_UNDERGOING_ENCRYPTION: 1622 dev_info(&h->pdev->dev, 1623 "C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n", 1624 h->scsi_host->host_no, 1625 sd->bus, sd->target, sd->lun); 1626 break; 1627 case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING: 1628 dev_info(&h->pdev->dev, 1629 "C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n", 1630 h->scsi_host->host_no, 1631 sd->bus, sd->target, sd->lun); 1632 break; 1633 case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 1634 dev_info(&h->pdev->dev, 1635 "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n", 1636 h->scsi_host->host_no, 1637 sd->bus, sd->target, sd->lun); 1638 break; 1639 case HPSA_LV_PENDING_ENCRYPTION: 1640 dev_info(&h->pdev->dev, 1641 "C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n", 1642 h->scsi_host->host_no, 1643 sd->bus, sd->target, sd->lun); 1644 break; 1645 case HPSA_LV_PENDING_ENCRYPTION_REKEYING: 1646 dev_info(&h->pdev->dev, 1647 "C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n", 1648 h->scsi_host->host_no, 1649 sd->bus, sd->target, sd->lun); 1650 break; 1651 } 1652 } 1653 1654 /* 1655 * Figure the list of physical drive pointers for a logical drive with 1656 * raid offload configured. 1657 */ 1658 static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h, 1659 struct hpsa_scsi_dev_t *dev[], int ndevices, 1660 struct hpsa_scsi_dev_t *logical_drive) 1661 { 1662 struct raid_map_data *map = &logical_drive->raid_map; 1663 struct raid_map_disk_data *dd = &map->data[0]; 1664 int i, j; 1665 int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) + 1666 le16_to_cpu(map->metadata_disks_per_row); 1667 int nraid_map_entries = le16_to_cpu(map->row_cnt) * 1668 le16_to_cpu(map->layout_map_count) * 1669 total_disks_per_row; 1670 int nphys_disk = le16_to_cpu(map->layout_map_count) * 1671 total_disks_per_row; 1672 int qdepth; 1673 1674 if (nraid_map_entries > RAID_MAP_MAX_ENTRIES) 1675 nraid_map_entries = RAID_MAP_MAX_ENTRIES; 1676 1677 logical_drive->nphysical_disks = nraid_map_entries; 1678 1679 qdepth = 0; 1680 for (i = 0; i < nraid_map_entries; i++) { 1681 logical_drive->phys_disk[i] = NULL; 1682 if (!logical_drive->offload_config) 1683 continue; 1684 for (j = 0; j < ndevices; j++) { 1685 if (dev[j] == NULL) 1686 continue; 1687 if (dev[j]->devtype != TYPE_DISK && 1688 dev[j]->devtype != TYPE_ZBC) 1689 continue; 1690 if (is_logical_device(dev[j])) 1691 continue; 1692 if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle) 1693 continue; 1694 1695 logical_drive->phys_disk[i] = dev[j]; 1696 if (i < nphys_disk) 1697 qdepth = min(h->nr_cmds, qdepth + 1698 logical_drive->phys_disk[i]->queue_depth); 1699 break; 1700 } 1701 1702 /* 1703 * This can happen if a physical drive is removed and 1704 * the logical drive is degraded. In that case, the RAID 1705 * map data will refer to a physical disk which isn't actually 1706 * present. And in that case offload_enabled should already 1707 * be 0, but we'll turn it off here just in case 1708 */ 1709 if (!logical_drive->phys_disk[i]) { 1710 logical_drive->offload_enabled = 0; 1711 logical_drive->offload_to_be_enabled = 0; 1712 logical_drive->queue_depth = 8; 1713 } 1714 } 1715 if (nraid_map_entries) 1716 /* 1717 * This is correct for reads, too high for full stripe writes, 1718 * way too high for partial stripe writes 1719 */ 1720 logical_drive->queue_depth = qdepth; 1721 else 1722 logical_drive->queue_depth = h->nr_cmds; 1723 } 1724 1725 static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h, 1726 struct hpsa_scsi_dev_t *dev[], int ndevices) 1727 { 1728 int i; 1729 1730 for (i = 0; i < ndevices; i++) { 1731 if (dev[i] == NULL) 1732 continue; 1733 if (dev[i]->devtype != TYPE_DISK && 1734 dev[i]->devtype != TYPE_ZBC) 1735 continue; 1736 if (!is_logical_device(dev[i])) 1737 continue; 1738 1739 /* 1740 * If offload is currently enabled, the RAID map and 1741 * phys_disk[] assignment *better* not be changing 1742 * and since it isn't changing, we do not need to 1743 * update it. 1744 */ 1745 if (dev[i]->offload_enabled) 1746 continue; 1747 1748 hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]); 1749 } 1750 } 1751 1752 static int hpsa_add_device(struct ctlr_info *h, struct hpsa_scsi_dev_t *device) 1753 { 1754 int rc = 0; 1755 1756 if (!h->scsi_host) 1757 return 1; 1758 1759 if (is_logical_device(device)) /* RAID */ 1760 rc = scsi_add_device(h->scsi_host, device->bus, 1761 device->target, device->lun); 1762 else /* HBA */ 1763 rc = hpsa_add_sas_device(h->sas_host, device); 1764 1765 return rc; 1766 } 1767 1768 static int hpsa_find_outstanding_commands_for_dev(struct ctlr_info *h, 1769 struct hpsa_scsi_dev_t *dev) 1770 { 1771 int i; 1772 int count = 0; 1773 1774 for (i = 0; i < h->nr_cmds; i++) { 1775 struct CommandList *c = h->cmd_pool + i; 1776 int refcount = atomic_inc_return(&c->refcount); 1777 1778 if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, 1779 dev->scsi3addr)) { 1780 unsigned long flags; 1781 1782 spin_lock_irqsave(&h->lock, flags); /* Implied MB */ 1783 if (!hpsa_is_cmd_idle(c)) 1784 ++count; 1785 spin_unlock_irqrestore(&h->lock, flags); 1786 } 1787 1788 cmd_free(h, c); 1789 } 1790 1791 return count; 1792 } 1793 1794 static void hpsa_wait_for_outstanding_commands_for_dev(struct ctlr_info *h, 1795 struct hpsa_scsi_dev_t *device) 1796 { 1797 int cmds = 0; 1798 int waits = 0; 1799 1800 while (1) { 1801 cmds = hpsa_find_outstanding_commands_for_dev(h, device); 1802 if (cmds == 0) 1803 break; 1804 if (++waits > 20) 1805 break; 1806 dev_warn(&h->pdev->dev, 1807 "%s: removing device with %d outstanding commands!\n", 1808 __func__, cmds); 1809 msleep(1000); 1810 } 1811 } 1812 1813 static void hpsa_remove_device(struct ctlr_info *h, 1814 struct hpsa_scsi_dev_t *device) 1815 { 1816 struct scsi_device *sdev = NULL; 1817 1818 if (!h->scsi_host) 1819 return; 1820 1821 if (is_logical_device(device)) { /* RAID */ 1822 sdev = scsi_device_lookup(h->scsi_host, device->bus, 1823 device->target, device->lun); 1824 if (sdev) { 1825 scsi_remove_device(sdev); 1826 scsi_device_put(sdev); 1827 } else { 1828 /* 1829 * We don't expect to get here. Future commands 1830 * to this device will get a selection timeout as 1831 * if the device were gone. 1832 */ 1833 hpsa_show_dev_msg(KERN_WARNING, h, device, 1834 "didn't find device for removal."); 1835 } 1836 } else { /* HBA */ 1837 1838 device->removed = 1; 1839 hpsa_wait_for_outstanding_commands_for_dev(h, device); 1840 1841 hpsa_remove_sas_device(device); 1842 } 1843 } 1844 1845 static void adjust_hpsa_scsi_table(struct ctlr_info *h, 1846 struct hpsa_scsi_dev_t *sd[], int nsds) 1847 { 1848 /* sd contains scsi3 addresses and devtypes, and inquiry 1849 * data. This function takes what's in sd to be the current 1850 * reality and updates h->dev[] to reflect that reality. 1851 */ 1852 int i, entry, device_change, changes = 0; 1853 struct hpsa_scsi_dev_t *csd; 1854 unsigned long flags; 1855 struct hpsa_scsi_dev_t **added, **removed; 1856 int nadded, nremoved; 1857 1858 /* 1859 * A reset can cause a device status to change 1860 * re-schedule the scan to see what happened. 1861 */ 1862 if (h->reset_in_progress) { 1863 h->drv_req_rescan = 1; 1864 return; 1865 } 1866 1867 added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL); 1868 removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL); 1869 1870 if (!added || !removed) { 1871 dev_warn(&h->pdev->dev, "out of memory in " 1872 "adjust_hpsa_scsi_table\n"); 1873 goto free_and_out; 1874 } 1875 1876 spin_lock_irqsave(&h->devlock, flags); 1877 1878 /* find any devices in h->dev[] that are not in 1879 * sd[] and remove them from h->dev[], and for any 1880 * devices which have changed, remove the old device 1881 * info and add the new device info. 1882 * If minor device attributes change, just update 1883 * the existing device structure. 1884 */ 1885 i = 0; 1886 nremoved = 0; 1887 nadded = 0; 1888 while (i < h->ndevices) { 1889 csd = h->dev[i]; 1890 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry); 1891 if (device_change == DEVICE_NOT_FOUND) { 1892 changes++; 1893 hpsa_scsi_remove_entry(h, i, removed, &nremoved); 1894 continue; /* remove ^^^, hence i not incremented */ 1895 } else if (device_change == DEVICE_CHANGED) { 1896 changes++; 1897 hpsa_scsi_replace_entry(h, i, sd[entry], 1898 added, &nadded, removed, &nremoved); 1899 /* Set it to NULL to prevent it from being freed 1900 * at the bottom of hpsa_update_scsi_devices() 1901 */ 1902 sd[entry] = NULL; 1903 } else if (device_change == DEVICE_UPDATED) { 1904 hpsa_scsi_update_entry(h, i, sd[entry]); 1905 } 1906 i++; 1907 } 1908 1909 /* Now, make sure every device listed in sd[] is also 1910 * listed in h->dev[], adding them if they aren't found 1911 */ 1912 1913 for (i = 0; i < nsds; i++) { 1914 if (!sd[i]) /* if already added above. */ 1915 continue; 1916 1917 /* Don't add devices which are NOT READY, FORMAT IN PROGRESS 1918 * as the SCSI mid-layer does not handle such devices well. 1919 * It relentlessly loops sending TUR at 3Hz, then READ(10) 1920 * at 160Hz, and prevents the system from coming up. 1921 */ 1922 if (sd[i]->volume_offline) { 1923 hpsa_show_volume_status(h, sd[i]); 1924 hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline"); 1925 continue; 1926 } 1927 1928 device_change = hpsa_scsi_find_entry(sd[i], h->dev, 1929 h->ndevices, &entry); 1930 if (device_change == DEVICE_NOT_FOUND) { 1931 changes++; 1932 if (hpsa_scsi_add_entry(h, sd[i], added, &nadded) != 0) 1933 break; 1934 sd[i] = NULL; /* prevent from being freed later. */ 1935 } else if (device_change == DEVICE_CHANGED) { 1936 /* should never happen... */ 1937 changes++; 1938 dev_warn(&h->pdev->dev, 1939 "device unexpectedly changed.\n"); 1940 /* but if it does happen, we just ignore that device */ 1941 } 1942 } 1943 hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices); 1944 1945 /* Now that h->dev[]->phys_disk[] is coherent, we can enable 1946 * any logical drives that need it enabled. 1947 */ 1948 for (i = 0; i < h->ndevices; i++) { 1949 if (h->dev[i] == NULL) 1950 continue; 1951 h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled; 1952 } 1953 1954 spin_unlock_irqrestore(&h->devlock, flags); 1955 1956 /* Monitor devices which are in one of several NOT READY states to be 1957 * brought online later. This must be done without holding h->devlock, 1958 * so don't touch h->dev[] 1959 */ 1960 for (i = 0; i < nsds; i++) { 1961 if (!sd[i]) /* if already added above. */ 1962 continue; 1963 if (sd[i]->volume_offline) 1964 hpsa_monitor_offline_device(h, sd[i]->scsi3addr); 1965 } 1966 1967 /* Don't notify scsi mid layer of any changes the first time through 1968 * (or if there are no changes) scsi_scan_host will do it later the 1969 * first time through. 1970 */ 1971 if (!changes) 1972 goto free_and_out; 1973 1974 /* Notify scsi mid layer of any removed devices */ 1975 for (i = 0; i < nremoved; i++) { 1976 if (removed[i] == NULL) 1977 continue; 1978 if (removed[i]->expose_device) 1979 hpsa_remove_device(h, removed[i]); 1980 kfree(removed[i]); 1981 removed[i] = NULL; 1982 } 1983 1984 /* Notify scsi mid layer of any added devices */ 1985 for (i = 0; i < nadded; i++) { 1986 int rc = 0; 1987 1988 if (added[i] == NULL) 1989 continue; 1990 if (!(added[i]->expose_device)) 1991 continue; 1992 rc = hpsa_add_device(h, added[i]); 1993 if (!rc) 1994 continue; 1995 dev_warn(&h->pdev->dev, 1996 "addition failed %d, device not added.", rc); 1997 /* now we have to remove it from h->dev, 1998 * since it didn't get added to scsi mid layer 1999 */ 2000 fixup_botched_add(h, added[i]); 2001 h->drv_req_rescan = 1; 2002 } 2003 2004 free_and_out: 2005 kfree(added); 2006 kfree(removed); 2007 } 2008 2009 /* 2010 * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t * 2011 * Assume's h->devlock is held. 2012 */ 2013 static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h, 2014 int bus, int target, int lun) 2015 { 2016 int i; 2017 struct hpsa_scsi_dev_t *sd; 2018 2019 for (i = 0; i < h->ndevices; i++) { 2020 sd = h->dev[i]; 2021 if (sd->bus == bus && sd->target == target && sd->lun == lun) 2022 return sd; 2023 } 2024 return NULL; 2025 } 2026 2027 static int hpsa_slave_alloc(struct scsi_device *sdev) 2028 { 2029 struct hpsa_scsi_dev_t *sd = NULL; 2030 unsigned long flags; 2031 struct ctlr_info *h; 2032 2033 h = sdev_to_hba(sdev); 2034 spin_lock_irqsave(&h->devlock, flags); 2035 if (sdev_channel(sdev) == HPSA_PHYSICAL_DEVICE_BUS) { 2036 struct scsi_target *starget; 2037 struct sas_rphy *rphy; 2038 2039 starget = scsi_target(sdev); 2040 rphy = target_to_rphy(starget); 2041 sd = hpsa_find_device_by_sas_rphy(h, rphy); 2042 if (sd) { 2043 sd->target = sdev_id(sdev); 2044 sd->lun = sdev->lun; 2045 } 2046 } 2047 if (!sd) 2048 sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev), 2049 sdev_id(sdev), sdev->lun); 2050 2051 if (sd && sd->expose_device) { 2052 atomic_set(&sd->ioaccel_cmds_out, 0); 2053 sdev->hostdata = sd; 2054 } else 2055 sdev->hostdata = NULL; 2056 spin_unlock_irqrestore(&h->devlock, flags); 2057 return 0; 2058 } 2059 2060 /* configure scsi device based on internal per-device structure */ 2061 static int hpsa_slave_configure(struct scsi_device *sdev) 2062 { 2063 struct hpsa_scsi_dev_t *sd; 2064 int queue_depth; 2065 2066 sd = sdev->hostdata; 2067 sdev->no_uld_attach = !sd || !sd->expose_device; 2068 2069 if (sd) 2070 queue_depth = sd->queue_depth != 0 ? 2071 sd->queue_depth : sdev->host->can_queue; 2072 else 2073 queue_depth = sdev->host->can_queue; 2074 2075 scsi_change_queue_depth(sdev, queue_depth); 2076 2077 return 0; 2078 } 2079 2080 static void hpsa_slave_destroy(struct scsi_device *sdev) 2081 { 2082 /* nothing to do. */ 2083 } 2084 2085 static void hpsa_free_ioaccel2_sg_chain_blocks(struct ctlr_info *h) 2086 { 2087 int i; 2088 2089 if (!h->ioaccel2_cmd_sg_list) 2090 return; 2091 for (i = 0; i < h->nr_cmds; i++) { 2092 kfree(h->ioaccel2_cmd_sg_list[i]); 2093 h->ioaccel2_cmd_sg_list[i] = NULL; 2094 } 2095 kfree(h->ioaccel2_cmd_sg_list); 2096 h->ioaccel2_cmd_sg_list = NULL; 2097 } 2098 2099 static int hpsa_allocate_ioaccel2_sg_chain_blocks(struct ctlr_info *h) 2100 { 2101 int i; 2102 2103 if (h->chainsize <= 0) 2104 return 0; 2105 2106 h->ioaccel2_cmd_sg_list = 2107 kzalloc(sizeof(*h->ioaccel2_cmd_sg_list) * h->nr_cmds, 2108 GFP_KERNEL); 2109 if (!h->ioaccel2_cmd_sg_list) 2110 return -ENOMEM; 2111 for (i = 0; i < h->nr_cmds; i++) { 2112 h->ioaccel2_cmd_sg_list[i] = 2113 kmalloc(sizeof(*h->ioaccel2_cmd_sg_list[i]) * 2114 h->maxsgentries, GFP_KERNEL); 2115 if (!h->ioaccel2_cmd_sg_list[i]) 2116 goto clean; 2117 } 2118 return 0; 2119 2120 clean: 2121 hpsa_free_ioaccel2_sg_chain_blocks(h); 2122 return -ENOMEM; 2123 } 2124 2125 static void hpsa_free_sg_chain_blocks(struct ctlr_info *h) 2126 { 2127 int i; 2128 2129 if (!h->cmd_sg_list) 2130 return; 2131 for (i = 0; i < h->nr_cmds; i++) { 2132 kfree(h->cmd_sg_list[i]); 2133 h->cmd_sg_list[i] = NULL; 2134 } 2135 kfree(h->cmd_sg_list); 2136 h->cmd_sg_list = NULL; 2137 } 2138 2139 static int hpsa_alloc_sg_chain_blocks(struct ctlr_info *h) 2140 { 2141 int i; 2142 2143 if (h->chainsize <= 0) 2144 return 0; 2145 2146 h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds, 2147 GFP_KERNEL); 2148 if (!h->cmd_sg_list) 2149 return -ENOMEM; 2150 2151 for (i = 0; i < h->nr_cmds; i++) { 2152 h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) * 2153 h->chainsize, GFP_KERNEL); 2154 if (!h->cmd_sg_list[i]) 2155 goto clean; 2156 2157 } 2158 return 0; 2159 2160 clean: 2161 hpsa_free_sg_chain_blocks(h); 2162 return -ENOMEM; 2163 } 2164 2165 static int hpsa_map_ioaccel2_sg_chain_block(struct ctlr_info *h, 2166 struct io_accel2_cmd *cp, struct CommandList *c) 2167 { 2168 struct ioaccel2_sg_element *chain_block; 2169 u64 temp64; 2170 u32 chain_size; 2171 2172 chain_block = h->ioaccel2_cmd_sg_list[c->cmdindex]; 2173 chain_size = le32_to_cpu(cp->sg[0].length); 2174 temp64 = pci_map_single(h->pdev, chain_block, chain_size, 2175 PCI_DMA_TODEVICE); 2176 if (dma_mapping_error(&h->pdev->dev, temp64)) { 2177 /* prevent subsequent unmapping */ 2178 cp->sg->address = 0; 2179 return -1; 2180 } 2181 cp->sg->address = cpu_to_le64(temp64); 2182 return 0; 2183 } 2184 2185 static void hpsa_unmap_ioaccel2_sg_chain_block(struct ctlr_info *h, 2186 struct io_accel2_cmd *cp) 2187 { 2188 struct ioaccel2_sg_element *chain_sg; 2189 u64 temp64; 2190 u32 chain_size; 2191 2192 chain_sg = cp->sg; 2193 temp64 = le64_to_cpu(chain_sg->address); 2194 chain_size = le32_to_cpu(cp->sg[0].length); 2195 pci_unmap_single(h->pdev, temp64, chain_size, PCI_DMA_TODEVICE); 2196 } 2197 2198 static int hpsa_map_sg_chain_block(struct ctlr_info *h, 2199 struct CommandList *c) 2200 { 2201 struct SGDescriptor *chain_sg, *chain_block; 2202 u64 temp64; 2203 u32 chain_len; 2204 2205 chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 2206 chain_block = h->cmd_sg_list[c->cmdindex]; 2207 chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN); 2208 chain_len = sizeof(*chain_sg) * 2209 (le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries); 2210 chain_sg->Len = cpu_to_le32(chain_len); 2211 temp64 = pci_map_single(h->pdev, chain_block, chain_len, 2212 PCI_DMA_TODEVICE); 2213 if (dma_mapping_error(&h->pdev->dev, temp64)) { 2214 /* prevent subsequent unmapping */ 2215 chain_sg->Addr = cpu_to_le64(0); 2216 return -1; 2217 } 2218 chain_sg->Addr = cpu_to_le64(temp64); 2219 return 0; 2220 } 2221 2222 static void hpsa_unmap_sg_chain_block(struct ctlr_info *h, 2223 struct CommandList *c) 2224 { 2225 struct SGDescriptor *chain_sg; 2226 2227 if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries) 2228 return; 2229 2230 chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 2231 pci_unmap_single(h->pdev, le64_to_cpu(chain_sg->Addr), 2232 le32_to_cpu(chain_sg->Len), PCI_DMA_TODEVICE); 2233 } 2234 2235 2236 /* Decode the various types of errors on ioaccel2 path. 2237 * Return 1 for any error that should generate a RAID path retry. 2238 * Return 0 for errors that don't require a RAID path retry. 2239 */ 2240 static int handle_ioaccel_mode2_error(struct ctlr_info *h, 2241 struct CommandList *c, 2242 struct scsi_cmnd *cmd, 2243 struct io_accel2_cmd *c2, 2244 struct hpsa_scsi_dev_t *dev) 2245 { 2246 int data_len; 2247 int retry = 0; 2248 u32 ioaccel2_resid = 0; 2249 2250 switch (c2->error_data.serv_response) { 2251 case IOACCEL2_SERV_RESPONSE_COMPLETE: 2252 switch (c2->error_data.status) { 2253 case IOACCEL2_STATUS_SR_TASK_COMP_GOOD: 2254 break; 2255 case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND: 2256 cmd->result |= SAM_STAT_CHECK_CONDITION; 2257 if (c2->error_data.data_present != 2258 IOACCEL2_SENSE_DATA_PRESENT) { 2259 memset(cmd->sense_buffer, 0, 2260 SCSI_SENSE_BUFFERSIZE); 2261 break; 2262 } 2263 /* copy the sense data */ 2264 data_len = c2->error_data.sense_data_len; 2265 if (data_len > SCSI_SENSE_BUFFERSIZE) 2266 data_len = SCSI_SENSE_BUFFERSIZE; 2267 if (data_len > sizeof(c2->error_data.sense_data_buff)) 2268 data_len = 2269 sizeof(c2->error_data.sense_data_buff); 2270 memcpy(cmd->sense_buffer, 2271 c2->error_data.sense_data_buff, data_len); 2272 retry = 1; 2273 break; 2274 case IOACCEL2_STATUS_SR_TASK_COMP_BUSY: 2275 retry = 1; 2276 break; 2277 case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON: 2278 retry = 1; 2279 break; 2280 case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL: 2281 retry = 1; 2282 break; 2283 case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED: 2284 retry = 1; 2285 break; 2286 default: 2287 retry = 1; 2288 break; 2289 } 2290 break; 2291 case IOACCEL2_SERV_RESPONSE_FAILURE: 2292 switch (c2->error_data.status) { 2293 case IOACCEL2_STATUS_SR_IO_ERROR: 2294 case IOACCEL2_STATUS_SR_IO_ABORTED: 2295 case IOACCEL2_STATUS_SR_OVERRUN: 2296 retry = 1; 2297 break; 2298 case IOACCEL2_STATUS_SR_UNDERRUN: 2299 cmd->result = (DID_OK << 16); /* host byte */ 2300 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 2301 ioaccel2_resid = get_unaligned_le32( 2302 &c2->error_data.resid_cnt[0]); 2303 scsi_set_resid(cmd, ioaccel2_resid); 2304 break; 2305 case IOACCEL2_STATUS_SR_NO_PATH_TO_DEVICE: 2306 case IOACCEL2_STATUS_SR_INVALID_DEVICE: 2307 case IOACCEL2_STATUS_SR_IOACCEL_DISABLED: 2308 /* 2309 * Did an HBA disk disappear? We will eventually 2310 * get a state change event from the controller but 2311 * in the meantime, we need to tell the OS that the 2312 * HBA disk is no longer there and stop I/O 2313 * from going down. This allows the potential re-insert 2314 * of the disk to get the same device node. 2315 */ 2316 if (dev->physical_device && dev->expose_device) { 2317 cmd->result = DID_NO_CONNECT << 16; 2318 dev->removed = 1; 2319 h->drv_req_rescan = 1; 2320 dev_warn(&h->pdev->dev, 2321 "%s: device is gone!\n", __func__); 2322 } else 2323 /* 2324 * Retry by sending down the RAID path. 2325 * We will get an event from ctlr to 2326 * trigger rescan regardless. 2327 */ 2328 retry = 1; 2329 break; 2330 default: 2331 retry = 1; 2332 } 2333 break; 2334 case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE: 2335 break; 2336 case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS: 2337 break; 2338 case IOACCEL2_SERV_RESPONSE_TMF_REJECTED: 2339 retry = 1; 2340 break; 2341 case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN: 2342 break; 2343 default: 2344 retry = 1; 2345 break; 2346 } 2347 2348 return retry; /* retry on raid path? */ 2349 } 2350 2351 static void hpsa_cmd_resolve_events(struct ctlr_info *h, 2352 struct CommandList *c) 2353 { 2354 bool do_wake = false; 2355 2356 /* 2357 * Prevent the following race in the abort handler: 2358 * 2359 * 1. LLD is requested to abort a SCSI command 2360 * 2. The SCSI command completes 2361 * 3. The struct CommandList associated with step 2 is made available 2362 * 4. New I/O request to LLD to another LUN re-uses struct CommandList 2363 * 5. Abort handler follows scsi_cmnd->host_scribble and 2364 * finds struct CommandList and tries to aborts it 2365 * Now we have aborted the wrong command. 2366 * 2367 * Reset c->scsi_cmd here so that the abort or reset handler will know 2368 * this command has completed. Then, check to see if the handler is 2369 * waiting for this command, and, if so, wake it. 2370 */ 2371 c->scsi_cmd = SCSI_CMD_IDLE; 2372 mb(); /* Declare command idle before checking for pending events. */ 2373 if (c->abort_pending) { 2374 do_wake = true; 2375 c->abort_pending = false; 2376 } 2377 if (c->reset_pending) { 2378 unsigned long flags; 2379 struct hpsa_scsi_dev_t *dev; 2380 2381 /* 2382 * There appears to be a reset pending; lock the lock and 2383 * reconfirm. If so, then decrement the count of outstanding 2384 * commands and wake the reset command if this is the last one. 2385 */ 2386 spin_lock_irqsave(&h->lock, flags); 2387 dev = c->reset_pending; /* Re-fetch under the lock. */ 2388 if (dev && atomic_dec_and_test(&dev->reset_cmds_out)) 2389 do_wake = true; 2390 c->reset_pending = NULL; 2391 spin_unlock_irqrestore(&h->lock, flags); 2392 } 2393 2394 if (do_wake) 2395 wake_up_all(&h->event_sync_wait_queue); 2396 } 2397 2398 static void hpsa_cmd_resolve_and_free(struct ctlr_info *h, 2399 struct CommandList *c) 2400 { 2401 hpsa_cmd_resolve_events(h, c); 2402 cmd_tagged_free(h, c); 2403 } 2404 2405 static void hpsa_cmd_free_and_done(struct ctlr_info *h, 2406 struct CommandList *c, struct scsi_cmnd *cmd) 2407 { 2408 hpsa_cmd_resolve_and_free(h, c); 2409 if (cmd && cmd->scsi_done) 2410 cmd->scsi_done(cmd); 2411 } 2412 2413 static void hpsa_retry_cmd(struct ctlr_info *h, struct CommandList *c) 2414 { 2415 INIT_WORK(&c->work, hpsa_command_resubmit_worker); 2416 queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work); 2417 } 2418 2419 static void hpsa_set_scsi_cmd_aborted(struct scsi_cmnd *cmd) 2420 { 2421 cmd->result = DID_ABORT << 16; 2422 } 2423 2424 static void hpsa_cmd_abort_and_free(struct ctlr_info *h, struct CommandList *c, 2425 struct scsi_cmnd *cmd) 2426 { 2427 hpsa_set_scsi_cmd_aborted(cmd); 2428 dev_warn(&h->pdev->dev, "CDB %16phN was aborted with status 0x%x\n", 2429 c->Request.CDB, c->err_info->ScsiStatus); 2430 hpsa_cmd_resolve_and_free(h, c); 2431 } 2432 2433 static void process_ioaccel2_completion(struct ctlr_info *h, 2434 struct CommandList *c, struct scsi_cmnd *cmd, 2435 struct hpsa_scsi_dev_t *dev) 2436 { 2437 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 2438 2439 /* check for good status */ 2440 if (likely(c2->error_data.serv_response == 0 && 2441 c2->error_data.status == 0)) 2442 return hpsa_cmd_free_and_done(h, c, cmd); 2443 2444 /* 2445 * Any RAID offload error results in retry which will use 2446 * the normal I/O path so the controller can handle whatever's 2447 * wrong. 2448 */ 2449 if (is_logical_device(dev) && 2450 c2->error_data.serv_response == 2451 IOACCEL2_SERV_RESPONSE_FAILURE) { 2452 if (c2->error_data.status == 2453 IOACCEL2_STATUS_SR_IOACCEL_DISABLED) { 2454 dev->offload_enabled = 0; 2455 dev->offload_to_be_enabled = 0; 2456 } 2457 2458 return hpsa_retry_cmd(h, c); 2459 } 2460 2461 if (handle_ioaccel_mode2_error(h, c, cmd, c2, dev)) 2462 return hpsa_retry_cmd(h, c); 2463 2464 return hpsa_cmd_free_and_done(h, c, cmd); 2465 } 2466 2467 /* Returns 0 on success, < 0 otherwise. */ 2468 static int hpsa_evaluate_tmf_status(struct ctlr_info *h, 2469 struct CommandList *cp) 2470 { 2471 u8 tmf_status = cp->err_info->ScsiStatus; 2472 2473 switch (tmf_status) { 2474 case CISS_TMF_COMPLETE: 2475 /* 2476 * CISS_TMF_COMPLETE never happens, instead, 2477 * ei->CommandStatus == 0 for this case. 2478 */ 2479 case CISS_TMF_SUCCESS: 2480 return 0; 2481 case CISS_TMF_INVALID_FRAME: 2482 case CISS_TMF_NOT_SUPPORTED: 2483 case CISS_TMF_FAILED: 2484 case CISS_TMF_WRONG_LUN: 2485 case CISS_TMF_OVERLAPPED_TAG: 2486 break; 2487 default: 2488 dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n", 2489 tmf_status); 2490 break; 2491 } 2492 return -tmf_status; 2493 } 2494 2495 static void complete_scsi_command(struct CommandList *cp) 2496 { 2497 struct scsi_cmnd *cmd; 2498 struct ctlr_info *h; 2499 struct ErrorInfo *ei; 2500 struct hpsa_scsi_dev_t *dev; 2501 struct io_accel2_cmd *c2; 2502 2503 u8 sense_key; 2504 u8 asc; /* additional sense code */ 2505 u8 ascq; /* additional sense code qualifier */ 2506 unsigned long sense_data_size; 2507 2508 ei = cp->err_info; 2509 cmd = cp->scsi_cmd; 2510 h = cp->h; 2511 2512 if (!cmd->device) { 2513 cmd->result = DID_NO_CONNECT << 16; 2514 return hpsa_cmd_free_and_done(h, cp, cmd); 2515 } 2516 2517 dev = cmd->device->hostdata; 2518 if (!dev) { 2519 cmd->result = DID_NO_CONNECT << 16; 2520 return hpsa_cmd_free_and_done(h, cp, cmd); 2521 } 2522 c2 = &h->ioaccel2_cmd_pool[cp->cmdindex]; 2523 2524 scsi_dma_unmap(cmd); /* undo the DMA mappings */ 2525 if ((cp->cmd_type == CMD_SCSI) && 2526 (le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries)) 2527 hpsa_unmap_sg_chain_block(h, cp); 2528 2529 if ((cp->cmd_type == CMD_IOACCEL2) && 2530 (c2->sg[0].chain_indicator == IOACCEL2_CHAIN)) 2531 hpsa_unmap_ioaccel2_sg_chain_block(h, c2); 2532 2533 cmd->result = (DID_OK << 16); /* host byte */ 2534 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 2535 2536 if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1) { 2537 if (dev->physical_device && dev->expose_device && 2538 dev->removed) { 2539 cmd->result = DID_NO_CONNECT << 16; 2540 return hpsa_cmd_free_and_done(h, cp, cmd); 2541 } 2542 if (likely(cp->phys_disk != NULL)) 2543 atomic_dec(&cp->phys_disk->ioaccel_cmds_out); 2544 } 2545 2546 /* 2547 * We check for lockup status here as it may be set for 2548 * CMD_SCSI, CMD_IOACCEL1 and CMD_IOACCEL2 commands by 2549 * fail_all_oustanding_cmds() 2550 */ 2551 if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) { 2552 /* DID_NO_CONNECT will prevent a retry */ 2553 cmd->result = DID_NO_CONNECT << 16; 2554 return hpsa_cmd_free_and_done(h, cp, cmd); 2555 } 2556 2557 if ((unlikely(hpsa_is_pending_event(cp)))) { 2558 if (cp->reset_pending) 2559 return hpsa_cmd_free_and_done(h, cp, cmd); 2560 if (cp->abort_pending) 2561 return hpsa_cmd_abort_and_free(h, cp, cmd); 2562 } 2563 2564 if (cp->cmd_type == CMD_IOACCEL2) 2565 return process_ioaccel2_completion(h, cp, cmd, dev); 2566 2567 scsi_set_resid(cmd, ei->ResidualCnt); 2568 if (ei->CommandStatus == 0) 2569 return hpsa_cmd_free_and_done(h, cp, cmd); 2570 2571 /* For I/O accelerator commands, copy over some fields to the normal 2572 * CISS header used below for error handling. 2573 */ 2574 if (cp->cmd_type == CMD_IOACCEL1) { 2575 struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex]; 2576 cp->Header.SGList = scsi_sg_count(cmd); 2577 cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList); 2578 cp->Request.CDBLen = le16_to_cpu(c->io_flags) & 2579 IOACCEL1_IOFLAGS_CDBLEN_MASK; 2580 cp->Header.tag = c->tag; 2581 memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8); 2582 memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen); 2583 2584 /* Any RAID offload error results in retry which will use 2585 * the normal I/O path so the controller can handle whatever's 2586 * wrong. 2587 */ 2588 if (is_logical_device(dev)) { 2589 if (ei->CommandStatus == CMD_IOACCEL_DISABLED) 2590 dev->offload_enabled = 0; 2591 return hpsa_retry_cmd(h, cp); 2592 } 2593 } 2594 2595 /* an error has occurred */ 2596 switch (ei->CommandStatus) { 2597 2598 case CMD_TARGET_STATUS: 2599 cmd->result |= ei->ScsiStatus; 2600 /* copy the sense data */ 2601 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo)) 2602 sense_data_size = SCSI_SENSE_BUFFERSIZE; 2603 else 2604 sense_data_size = sizeof(ei->SenseInfo); 2605 if (ei->SenseLen < sense_data_size) 2606 sense_data_size = ei->SenseLen; 2607 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size); 2608 if (ei->ScsiStatus) 2609 decode_sense_data(ei->SenseInfo, sense_data_size, 2610 &sense_key, &asc, &ascq); 2611 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) { 2612 if (sense_key == ABORTED_COMMAND) { 2613 cmd->result |= DID_SOFT_ERROR << 16; 2614 break; 2615 } 2616 break; 2617 } 2618 /* Problem was not a check condition 2619 * Pass it up to the upper layers... 2620 */ 2621 if (ei->ScsiStatus) { 2622 dev_warn(&h->pdev->dev, "cp %p has status 0x%x " 2623 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, " 2624 "Returning result: 0x%x\n", 2625 cp, ei->ScsiStatus, 2626 sense_key, asc, ascq, 2627 cmd->result); 2628 } else { /* scsi status is zero??? How??? */ 2629 dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. " 2630 "Returning no connection.\n", cp), 2631 2632 /* Ordinarily, this case should never happen, 2633 * but there is a bug in some released firmware 2634 * revisions that allows it to happen if, for 2635 * example, a 4100 backplane loses power and 2636 * the tape drive is in it. We assume that 2637 * it's a fatal error of some kind because we 2638 * can't show that it wasn't. We will make it 2639 * look like selection timeout since that is 2640 * the most common reason for this to occur, 2641 * and it's severe enough. 2642 */ 2643 2644 cmd->result = DID_NO_CONNECT << 16; 2645 } 2646 break; 2647 2648 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 2649 break; 2650 case CMD_DATA_OVERRUN: 2651 dev_warn(&h->pdev->dev, 2652 "CDB %16phN data overrun\n", cp->Request.CDB); 2653 break; 2654 case CMD_INVALID: { 2655 /* print_bytes(cp, sizeof(*cp), 1, 0); 2656 print_cmd(cp); */ 2657 /* We get CMD_INVALID if you address a non-existent device 2658 * instead of a selection timeout (no response). You will 2659 * see this if you yank out a drive, then try to access it. 2660 * This is kind of a shame because it means that any other 2661 * CMD_INVALID (e.g. driver bug) will get interpreted as a 2662 * missing target. */ 2663 cmd->result = DID_NO_CONNECT << 16; 2664 } 2665 break; 2666 case CMD_PROTOCOL_ERR: 2667 cmd->result = DID_ERROR << 16; 2668 dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n", 2669 cp->Request.CDB); 2670 break; 2671 case CMD_HARDWARE_ERR: 2672 cmd->result = DID_ERROR << 16; 2673 dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n", 2674 cp->Request.CDB); 2675 break; 2676 case CMD_CONNECTION_LOST: 2677 cmd->result = DID_ERROR << 16; 2678 dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n", 2679 cp->Request.CDB); 2680 break; 2681 case CMD_ABORTED: 2682 /* Return now to avoid calling scsi_done(). */ 2683 return hpsa_cmd_abort_and_free(h, cp, cmd); 2684 case CMD_ABORT_FAILED: 2685 cmd->result = DID_ERROR << 16; 2686 dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n", 2687 cp->Request.CDB); 2688 break; 2689 case CMD_UNSOLICITED_ABORT: 2690 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */ 2691 dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n", 2692 cp->Request.CDB); 2693 break; 2694 case CMD_TIMEOUT: 2695 cmd->result = DID_TIME_OUT << 16; 2696 dev_warn(&h->pdev->dev, "CDB %16phN timed out\n", 2697 cp->Request.CDB); 2698 break; 2699 case CMD_UNABORTABLE: 2700 cmd->result = DID_ERROR << 16; 2701 dev_warn(&h->pdev->dev, "Command unabortable\n"); 2702 break; 2703 case CMD_TMF_STATUS: 2704 if (hpsa_evaluate_tmf_status(h, cp)) /* TMF failed? */ 2705 cmd->result = DID_ERROR << 16; 2706 break; 2707 case CMD_IOACCEL_DISABLED: 2708 /* This only handles the direct pass-through case since RAID 2709 * offload is handled above. Just attempt a retry. 2710 */ 2711 cmd->result = DID_SOFT_ERROR << 16; 2712 dev_warn(&h->pdev->dev, 2713 "cp %p had HP SSD Smart Path error\n", cp); 2714 break; 2715 default: 2716 cmd->result = DID_ERROR << 16; 2717 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n", 2718 cp, ei->CommandStatus); 2719 } 2720 2721 return hpsa_cmd_free_and_done(h, cp, cmd); 2722 } 2723 2724 static void hpsa_pci_unmap(struct pci_dev *pdev, 2725 struct CommandList *c, int sg_used, int data_direction) 2726 { 2727 int i; 2728 2729 for (i = 0; i < sg_used; i++) 2730 pci_unmap_single(pdev, (dma_addr_t) le64_to_cpu(c->SG[i].Addr), 2731 le32_to_cpu(c->SG[i].Len), 2732 data_direction); 2733 } 2734 2735 static int hpsa_map_one(struct pci_dev *pdev, 2736 struct CommandList *cp, 2737 unsigned char *buf, 2738 size_t buflen, 2739 int data_direction) 2740 { 2741 u64 addr64; 2742 2743 if (buflen == 0 || data_direction == PCI_DMA_NONE) { 2744 cp->Header.SGList = 0; 2745 cp->Header.SGTotal = cpu_to_le16(0); 2746 return 0; 2747 } 2748 2749 addr64 = pci_map_single(pdev, buf, buflen, data_direction); 2750 if (dma_mapping_error(&pdev->dev, addr64)) { 2751 /* Prevent subsequent unmap of something never mapped */ 2752 cp->Header.SGList = 0; 2753 cp->Header.SGTotal = cpu_to_le16(0); 2754 return -1; 2755 } 2756 cp->SG[0].Addr = cpu_to_le64(addr64); 2757 cp->SG[0].Len = cpu_to_le32(buflen); 2758 cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */ 2759 cp->Header.SGList = 1; /* no. SGs contig in this cmd */ 2760 cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */ 2761 return 0; 2762 } 2763 2764 #define NO_TIMEOUT ((unsigned long) -1) 2765 #define DEFAULT_TIMEOUT 30000 /* milliseconds */ 2766 static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h, 2767 struct CommandList *c, int reply_queue, unsigned long timeout_msecs) 2768 { 2769 DECLARE_COMPLETION_ONSTACK(wait); 2770 2771 c->waiting = &wait; 2772 __enqueue_cmd_and_start_io(h, c, reply_queue); 2773 if (timeout_msecs == NO_TIMEOUT) { 2774 /* TODO: get rid of this no-timeout thing */ 2775 wait_for_completion_io(&wait); 2776 return IO_OK; 2777 } 2778 if (!wait_for_completion_io_timeout(&wait, 2779 msecs_to_jiffies(timeout_msecs))) { 2780 dev_warn(&h->pdev->dev, "Command timed out.\n"); 2781 return -ETIMEDOUT; 2782 } 2783 return IO_OK; 2784 } 2785 2786 static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c, 2787 int reply_queue, unsigned long timeout_msecs) 2788 { 2789 if (unlikely(lockup_detected(h))) { 2790 c->err_info->CommandStatus = CMD_CTLR_LOCKUP; 2791 return IO_OK; 2792 } 2793 return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs); 2794 } 2795 2796 static u32 lockup_detected(struct ctlr_info *h) 2797 { 2798 int cpu; 2799 u32 rc, *lockup_detected; 2800 2801 cpu = get_cpu(); 2802 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 2803 rc = *lockup_detected; 2804 put_cpu(); 2805 return rc; 2806 } 2807 2808 #define MAX_DRIVER_CMD_RETRIES 25 2809 static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h, 2810 struct CommandList *c, int data_direction, unsigned long timeout_msecs) 2811 { 2812 int backoff_time = 10, retry_count = 0; 2813 int rc; 2814 2815 do { 2816 memset(c->err_info, 0, sizeof(*c->err_info)); 2817 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 2818 timeout_msecs); 2819 if (rc) 2820 break; 2821 retry_count++; 2822 if (retry_count > 3) { 2823 msleep(backoff_time); 2824 if (backoff_time < 1000) 2825 backoff_time *= 2; 2826 } 2827 } while ((check_for_unit_attention(h, c) || 2828 check_for_busy(h, c)) && 2829 retry_count <= MAX_DRIVER_CMD_RETRIES); 2830 hpsa_pci_unmap(h->pdev, c, 1, data_direction); 2831 if (retry_count > MAX_DRIVER_CMD_RETRIES) 2832 rc = -EIO; 2833 return rc; 2834 } 2835 2836 static void hpsa_print_cmd(struct ctlr_info *h, char *txt, 2837 struct CommandList *c) 2838 { 2839 const u8 *cdb = c->Request.CDB; 2840 const u8 *lun = c->Header.LUN.LunAddrBytes; 2841 2842 dev_warn(&h->pdev->dev, "%s: LUN:%8phN CDB:%16phN\n", 2843 txt, lun, cdb); 2844 } 2845 2846 static void hpsa_scsi_interpret_error(struct ctlr_info *h, 2847 struct CommandList *cp) 2848 { 2849 const struct ErrorInfo *ei = cp->err_info; 2850 struct device *d = &cp->h->pdev->dev; 2851 u8 sense_key, asc, ascq; 2852 int sense_len; 2853 2854 switch (ei->CommandStatus) { 2855 case CMD_TARGET_STATUS: 2856 if (ei->SenseLen > sizeof(ei->SenseInfo)) 2857 sense_len = sizeof(ei->SenseInfo); 2858 else 2859 sense_len = ei->SenseLen; 2860 decode_sense_data(ei->SenseInfo, sense_len, 2861 &sense_key, &asc, &ascq); 2862 hpsa_print_cmd(h, "SCSI status", cp); 2863 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) 2864 dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n", 2865 sense_key, asc, ascq); 2866 else 2867 dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus); 2868 if (ei->ScsiStatus == 0) 2869 dev_warn(d, "SCSI status is abnormally zero. " 2870 "(probably indicates selection timeout " 2871 "reported incorrectly due to a known " 2872 "firmware bug, circa July, 2001.)\n"); 2873 break; 2874 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 2875 break; 2876 case CMD_DATA_OVERRUN: 2877 hpsa_print_cmd(h, "overrun condition", cp); 2878 break; 2879 case CMD_INVALID: { 2880 /* controller unfortunately reports SCSI passthru's 2881 * to non-existent targets as invalid commands. 2882 */ 2883 hpsa_print_cmd(h, "invalid command", cp); 2884 dev_warn(d, "probably means device no longer present\n"); 2885 } 2886 break; 2887 case CMD_PROTOCOL_ERR: 2888 hpsa_print_cmd(h, "protocol error", cp); 2889 break; 2890 case CMD_HARDWARE_ERR: 2891 hpsa_print_cmd(h, "hardware error", cp); 2892 break; 2893 case CMD_CONNECTION_LOST: 2894 hpsa_print_cmd(h, "connection lost", cp); 2895 break; 2896 case CMD_ABORTED: 2897 hpsa_print_cmd(h, "aborted", cp); 2898 break; 2899 case CMD_ABORT_FAILED: 2900 hpsa_print_cmd(h, "abort failed", cp); 2901 break; 2902 case CMD_UNSOLICITED_ABORT: 2903 hpsa_print_cmd(h, "unsolicited abort", cp); 2904 break; 2905 case CMD_TIMEOUT: 2906 hpsa_print_cmd(h, "timed out", cp); 2907 break; 2908 case CMD_UNABORTABLE: 2909 hpsa_print_cmd(h, "unabortable", cp); 2910 break; 2911 case CMD_CTLR_LOCKUP: 2912 hpsa_print_cmd(h, "controller lockup detected", cp); 2913 break; 2914 default: 2915 hpsa_print_cmd(h, "unknown status", cp); 2916 dev_warn(d, "Unknown command status %x\n", 2917 ei->CommandStatus); 2918 } 2919 } 2920 2921 static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr, 2922 u16 page, unsigned char *buf, 2923 unsigned char bufsize) 2924 { 2925 int rc = IO_OK; 2926 struct CommandList *c; 2927 struct ErrorInfo *ei; 2928 2929 c = cmd_alloc(h); 2930 2931 if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, 2932 page, scsi3addr, TYPE_CMD)) { 2933 rc = -1; 2934 goto out; 2935 } 2936 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 2937 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 2938 if (rc) 2939 goto out; 2940 ei = c->err_info; 2941 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 2942 hpsa_scsi_interpret_error(h, c); 2943 rc = -1; 2944 } 2945 out: 2946 cmd_free(h, c); 2947 return rc; 2948 } 2949 2950 static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr, 2951 u8 reset_type, int reply_queue) 2952 { 2953 int rc = IO_OK; 2954 struct CommandList *c; 2955 struct ErrorInfo *ei; 2956 2957 c = cmd_alloc(h); 2958 2959 2960 /* fill_cmd can't fail here, no data buffer to map. */ 2961 (void) fill_cmd(c, reset_type, h, NULL, 0, 0, 2962 scsi3addr, TYPE_MSG); 2963 rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT); 2964 if (rc) { 2965 dev_warn(&h->pdev->dev, "Failed to send reset command\n"); 2966 goto out; 2967 } 2968 /* no unmap needed here because no data xfer. */ 2969 2970 ei = c->err_info; 2971 if (ei->CommandStatus != 0) { 2972 hpsa_scsi_interpret_error(h, c); 2973 rc = -1; 2974 } 2975 out: 2976 cmd_free(h, c); 2977 return rc; 2978 } 2979 2980 static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c, 2981 struct hpsa_scsi_dev_t *dev, 2982 unsigned char *scsi3addr) 2983 { 2984 int i; 2985 bool match = false; 2986 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 2987 struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2; 2988 2989 if (hpsa_is_cmd_idle(c)) 2990 return false; 2991 2992 switch (c->cmd_type) { 2993 case CMD_SCSI: 2994 case CMD_IOCTL_PEND: 2995 match = !memcmp(scsi3addr, &c->Header.LUN.LunAddrBytes, 2996 sizeof(c->Header.LUN.LunAddrBytes)); 2997 break; 2998 2999 case CMD_IOACCEL1: 3000 case CMD_IOACCEL2: 3001 if (c->phys_disk == dev) { 3002 /* HBA mode match */ 3003 match = true; 3004 } else { 3005 /* Possible RAID mode -- check each phys dev. */ 3006 /* FIXME: Do we need to take out a lock here? If 3007 * so, we could just call hpsa_get_pdisk_of_ioaccel2() 3008 * instead. */ 3009 for (i = 0; i < dev->nphysical_disks && !match; i++) { 3010 /* FIXME: an alternate test might be 3011 * 3012 * match = dev->phys_disk[i]->ioaccel_handle 3013 * == c2->scsi_nexus; */ 3014 match = dev->phys_disk[i] == c->phys_disk; 3015 } 3016 } 3017 break; 3018 3019 case IOACCEL2_TMF: 3020 for (i = 0; i < dev->nphysical_disks && !match; i++) { 3021 match = dev->phys_disk[i]->ioaccel_handle == 3022 le32_to_cpu(ac->it_nexus); 3023 } 3024 break; 3025 3026 case 0: /* The command is in the middle of being initialized. */ 3027 match = false; 3028 break; 3029 3030 default: 3031 dev_err(&h->pdev->dev, "unexpected cmd_type: %d\n", 3032 c->cmd_type); 3033 BUG(); 3034 } 3035 3036 return match; 3037 } 3038 3039 static int hpsa_do_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev, 3040 unsigned char *scsi3addr, u8 reset_type, int reply_queue) 3041 { 3042 int i; 3043 int rc = 0; 3044 3045 /* We can really only handle one reset at a time */ 3046 if (mutex_lock_interruptible(&h->reset_mutex) == -EINTR) { 3047 dev_warn(&h->pdev->dev, "concurrent reset wait interrupted.\n"); 3048 return -EINTR; 3049 } 3050 3051 BUG_ON(atomic_read(&dev->reset_cmds_out) != 0); 3052 3053 for (i = 0; i < h->nr_cmds; i++) { 3054 struct CommandList *c = h->cmd_pool + i; 3055 int refcount = atomic_inc_return(&c->refcount); 3056 3057 if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, scsi3addr)) { 3058 unsigned long flags; 3059 3060 /* 3061 * Mark the target command as having a reset pending, 3062 * then lock a lock so that the command cannot complete 3063 * while we're considering it. If the command is not 3064 * idle then count it; otherwise revoke the event. 3065 */ 3066 c->reset_pending = dev; 3067 spin_lock_irqsave(&h->lock, flags); /* Implied MB */ 3068 if (!hpsa_is_cmd_idle(c)) 3069 atomic_inc(&dev->reset_cmds_out); 3070 else 3071 c->reset_pending = NULL; 3072 spin_unlock_irqrestore(&h->lock, flags); 3073 } 3074 3075 cmd_free(h, c); 3076 } 3077 3078 rc = hpsa_send_reset(h, scsi3addr, reset_type, reply_queue); 3079 if (!rc) 3080 wait_event(h->event_sync_wait_queue, 3081 atomic_read(&dev->reset_cmds_out) == 0 || 3082 lockup_detected(h)); 3083 3084 if (unlikely(lockup_detected(h))) { 3085 dev_warn(&h->pdev->dev, 3086 "Controller lockup detected during reset wait\n"); 3087 rc = -ENODEV; 3088 } 3089 3090 if (unlikely(rc)) 3091 atomic_set(&dev->reset_cmds_out, 0); 3092 else 3093 rc = wait_for_device_to_become_ready(h, scsi3addr, 0); 3094 3095 mutex_unlock(&h->reset_mutex); 3096 return rc; 3097 } 3098 3099 static void hpsa_get_raid_level(struct ctlr_info *h, 3100 unsigned char *scsi3addr, unsigned char *raid_level) 3101 { 3102 int rc; 3103 unsigned char *buf; 3104 3105 *raid_level = RAID_UNKNOWN; 3106 buf = kzalloc(64, GFP_KERNEL); 3107 if (!buf) 3108 return; 3109 3110 if (!hpsa_vpd_page_supported(h, scsi3addr, 3111 HPSA_VPD_LV_DEVICE_GEOMETRY)) 3112 goto exit; 3113 3114 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 3115 HPSA_VPD_LV_DEVICE_GEOMETRY, buf, 64); 3116 3117 if (rc == 0) 3118 *raid_level = buf[8]; 3119 if (*raid_level > RAID_UNKNOWN) 3120 *raid_level = RAID_UNKNOWN; 3121 exit: 3122 kfree(buf); 3123 return; 3124 } 3125 3126 #define HPSA_MAP_DEBUG 3127 #ifdef HPSA_MAP_DEBUG 3128 static void hpsa_debug_map_buff(struct ctlr_info *h, int rc, 3129 struct raid_map_data *map_buff) 3130 { 3131 struct raid_map_disk_data *dd = &map_buff->data[0]; 3132 int map, row, col; 3133 u16 map_cnt, row_cnt, disks_per_row; 3134 3135 if (rc != 0) 3136 return; 3137 3138 /* Show details only if debugging has been activated. */ 3139 if (h->raid_offload_debug < 2) 3140 return; 3141 3142 dev_info(&h->pdev->dev, "structure_size = %u\n", 3143 le32_to_cpu(map_buff->structure_size)); 3144 dev_info(&h->pdev->dev, "volume_blk_size = %u\n", 3145 le32_to_cpu(map_buff->volume_blk_size)); 3146 dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n", 3147 le64_to_cpu(map_buff->volume_blk_cnt)); 3148 dev_info(&h->pdev->dev, "physicalBlockShift = %u\n", 3149 map_buff->phys_blk_shift); 3150 dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n", 3151 map_buff->parity_rotation_shift); 3152 dev_info(&h->pdev->dev, "strip_size = %u\n", 3153 le16_to_cpu(map_buff->strip_size)); 3154 dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n", 3155 le64_to_cpu(map_buff->disk_starting_blk)); 3156 dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n", 3157 le64_to_cpu(map_buff->disk_blk_cnt)); 3158 dev_info(&h->pdev->dev, "data_disks_per_row = %u\n", 3159 le16_to_cpu(map_buff->data_disks_per_row)); 3160 dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n", 3161 le16_to_cpu(map_buff->metadata_disks_per_row)); 3162 dev_info(&h->pdev->dev, "row_cnt = %u\n", 3163 le16_to_cpu(map_buff->row_cnt)); 3164 dev_info(&h->pdev->dev, "layout_map_count = %u\n", 3165 le16_to_cpu(map_buff->layout_map_count)); 3166 dev_info(&h->pdev->dev, "flags = 0x%x\n", 3167 le16_to_cpu(map_buff->flags)); 3168 dev_info(&h->pdev->dev, "encrypytion = %s\n", 3169 le16_to_cpu(map_buff->flags) & 3170 RAID_MAP_FLAG_ENCRYPT_ON ? "ON" : "OFF"); 3171 dev_info(&h->pdev->dev, "dekindex = %u\n", 3172 le16_to_cpu(map_buff->dekindex)); 3173 map_cnt = le16_to_cpu(map_buff->layout_map_count); 3174 for (map = 0; map < map_cnt; map++) { 3175 dev_info(&h->pdev->dev, "Map%u:\n", map); 3176 row_cnt = le16_to_cpu(map_buff->row_cnt); 3177 for (row = 0; row < row_cnt; row++) { 3178 dev_info(&h->pdev->dev, " Row%u:\n", row); 3179 disks_per_row = 3180 le16_to_cpu(map_buff->data_disks_per_row); 3181 for (col = 0; col < disks_per_row; col++, dd++) 3182 dev_info(&h->pdev->dev, 3183 " D%02u: h=0x%04x xor=%u,%u\n", 3184 col, dd->ioaccel_handle, 3185 dd->xor_mult[0], dd->xor_mult[1]); 3186 disks_per_row = 3187 le16_to_cpu(map_buff->metadata_disks_per_row); 3188 for (col = 0; col < disks_per_row; col++, dd++) 3189 dev_info(&h->pdev->dev, 3190 " M%02u: h=0x%04x xor=%u,%u\n", 3191 col, dd->ioaccel_handle, 3192 dd->xor_mult[0], dd->xor_mult[1]); 3193 } 3194 } 3195 } 3196 #else 3197 static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h, 3198 __attribute__((unused)) int rc, 3199 __attribute__((unused)) struct raid_map_data *map_buff) 3200 { 3201 } 3202 #endif 3203 3204 static int hpsa_get_raid_map(struct ctlr_info *h, 3205 unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device) 3206 { 3207 int rc = 0; 3208 struct CommandList *c; 3209 struct ErrorInfo *ei; 3210 3211 c = cmd_alloc(h); 3212 3213 if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map, 3214 sizeof(this_device->raid_map), 0, 3215 scsi3addr, TYPE_CMD)) { 3216 dev_warn(&h->pdev->dev, "hpsa_get_raid_map fill_cmd failed\n"); 3217 cmd_free(h, c); 3218 return -1; 3219 } 3220 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3221 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 3222 if (rc) 3223 goto out; 3224 ei = c->err_info; 3225 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3226 hpsa_scsi_interpret_error(h, c); 3227 rc = -1; 3228 goto out; 3229 } 3230 cmd_free(h, c); 3231 3232 /* @todo in the future, dynamically allocate RAID map memory */ 3233 if (le32_to_cpu(this_device->raid_map.structure_size) > 3234 sizeof(this_device->raid_map)) { 3235 dev_warn(&h->pdev->dev, "RAID map size is too large!\n"); 3236 rc = -1; 3237 } 3238 hpsa_debug_map_buff(h, rc, &this_device->raid_map); 3239 return rc; 3240 out: 3241 cmd_free(h, c); 3242 return rc; 3243 } 3244 3245 static int hpsa_bmic_sense_subsystem_information(struct ctlr_info *h, 3246 unsigned char scsi3addr[], u16 bmic_device_index, 3247 struct bmic_sense_subsystem_info *buf, size_t bufsize) 3248 { 3249 int rc = IO_OK; 3250 struct CommandList *c; 3251 struct ErrorInfo *ei; 3252 3253 c = cmd_alloc(h); 3254 3255 rc = fill_cmd(c, BMIC_SENSE_SUBSYSTEM_INFORMATION, h, buf, bufsize, 3256 0, RAID_CTLR_LUNID, TYPE_CMD); 3257 if (rc) 3258 goto out; 3259 3260 c->Request.CDB[2] = bmic_device_index & 0xff; 3261 c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff; 3262 3263 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3264 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 3265 if (rc) 3266 goto out; 3267 ei = c->err_info; 3268 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3269 hpsa_scsi_interpret_error(h, c); 3270 rc = -1; 3271 } 3272 out: 3273 cmd_free(h, c); 3274 return rc; 3275 } 3276 3277 static int hpsa_bmic_id_controller(struct ctlr_info *h, 3278 struct bmic_identify_controller *buf, size_t bufsize) 3279 { 3280 int rc = IO_OK; 3281 struct CommandList *c; 3282 struct ErrorInfo *ei; 3283 3284 c = cmd_alloc(h); 3285 3286 rc = fill_cmd(c, BMIC_IDENTIFY_CONTROLLER, h, buf, bufsize, 3287 0, RAID_CTLR_LUNID, TYPE_CMD); 3288 if (rc) 3289 goto out; 3290 3291 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3292 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 3293 if (rc) 3294 goto out; 3295 ei = c->err_info; 3296 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3297 hpsa_scsi_interpret_error(h, c); 3298 rc = -1; 3299 } 3300 out: 3301 cmd_free(h, c); 3302 return rc; 3303 } 3304 3305 static int hpsa_bmic_id_physical_device(struct ctlr_info *h, 3306 unsigned char scsi3addr[], u16 bmic_device_index, 3307 struct bmic_identify_physical_device *buf, size_t bufsize) 3308 { 3309 int rc = IO_OK; 3310 struct CommandList *c; 3311 struct ErrorInfo *ei; 3312 3313 c = cmd_alloc(h); 3314 rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize, 3315 0, RAID_CTLR_LUNID, TYPE_CMD); 3316 if (rc) 3317 goto out; 3318 3319 c->Request.CDB[2] = bmic_device_index & 0xff; 3320 c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff; 3321 3322 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE, 3323 DEFAULT_TIMEOUT); 3324 ei = c->err_info; 3325 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3326 hpsa_scsi_interpret_error(h, c); 3327 rc = -1; 3328 } 3329 out: 3330 cmd_free(h, c); 3331 3332 return rc; 3333 } 3334 3335 /* 3336 * get enclosure information 3337 * struct ReportExtendedLUNdata *rlep - Used for BMIC drive number 3338 * struct hpsa_scsi_dev_t *encl_dev - device entry for enclosure 3339 * Uses id_physical_device to determine the box_index. 3340 */ 3341 static void hpsa_get_enclosure_info(struct ctlr_info *h, 3342 unsigned char *scsi3addr, 3343 struct ReportExtendedLUNdata *rlep, int rle_index, 3344 struct hpsa_scsi_dev_t *encl_dev) 3345 { 3346 int rc = -1; 3347 struct CommandList *c = NULL; 3348 struct ErrorInfo *ei = NULL; 3349 struct bmic_sense_storage_box_params *bssbp = NULL; 3350 struct bmic_identify_physical_device *id_phys = NULL; 3351 struct ext_report_lun_entry *rle = &rlep->LUN[rle_index]; 3352 u16 bmic_device_index = 0; 3353 3354 bmic_device_index = GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]); 3355 3356 if (encl_dev->target == -1 || encl_dev->lun == -1) { 3357 rc = IO_OK; 3358 goto out; 3359 } 3360 3361 if (bmic_device_index == 0xFF00 || MASKED_DEVICE(&rle->lunid[0])) { 3362 rc = IO_OK; 3363 goto out; 3364 } 3365 3366 bssbp = kzalloc(sizeof(*bssbp), GFP_KERNEL); 3367 if (!bssbp) 3368 goto out; 3369 3370 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 3371 if (!id_phys) 3372 goto out; 3373 3374 rc = hpsa_bmic_id_physical_device(h, scsi3addr, bmic_device_index, 3375 id_phys, sizeof(*id_phys)); 3376 if (rc) { 3377 dev_warn(&h->pdev->dev, "%s: id_phys failed %d bdi[0x%x]\n", 3378 __func__, encl_dev->external, bmic_device_index); 3379 goto out; 3380 } 3381 3382 c = cmd_alloc(h); 3383 3384 rc = fill_cmd(c, BMIC_SENSE_STORAGE_BOX_PARAMS, h, bssbp, 3385 sizeof(*bssbp), 0, RAID_CTLR_LUNID, TYPE_CMD); 3386 3387 if (rc) 3388 goto out; 3389 3390 if (id_phys->phys_connector[1] == 'E') 3391 c->Request.CDB[5] = id_phys->box_index; 3392 else 3393 c->Request.CDB[5] = 0; 3394 3395 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE, 3396 DEFAULT_TIMEOUT); 3397 if (rc) 3398 goto out; 3399 3400 ei = c->err_info; 3401 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3402 rc = -1; 3403 goto out; 3404 } 3405 3406 encl_dev->box[id_phys->active_path_number] = bssbp->phys_box_on_port; 3407 memcpy(&encl_dev->phys_connector[id_phys->active_path_number], 3408 bssbp->phys_connector, sizeof(bssbp->phys_connector)); 3409 3410 rc = IO_OK; 3411 out: 3412 kfree(bssbp); 3413 kfree(id_phys); 3414 3415 if (c) 3416 cmd_free(h, c); 3417 3418 if (rc != IO_OK) 3419 hpsa_show_dev_msg(KERN_INFO, h, encl_dev, 3420 "Error, could not get enclosure information\n"); 3421 } 3422 3423 static u64 hpsa_get_sas_address_from_report_physical(struct ctlr_info *h, 3424 unsigned char *scsi3addr) 3425 { 3426 struct ReportExtendedLUNdata *physdev; 3427 u32 nphysicals; 3428 u64 sa = 0; 3429 int i; 3430 3431 physdev = kzalloc(sizeof(*physdev), GFP_KERNEL); 3432 if (!physdev) 3433 return 0; 3434 3435 if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) { 3436 dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 3437 kfree(physdev); 3438 return 0; 3439 } 3440 nphysicals = get_unaligned_be32(physdev->LUNListLength) / 24; 3441 3442 for (i = 0; i < nphysicals; i++) 3443 if (!memcmp(&physdev->LUN[i].lunid[0], scsi3addr, 8)) { 3444 sa = get_unaligned_be64(&physdev->LUN[i].wwid[0]); 3445 break; 3446 } 3447 3448 kfree(physdev); 3449 3450 return sa; 3451 } 3452 3453 static void hpsa_get_sas_address(struct ctlr_info *h, unsigned char *scsi3addr, 3454 struct hpsa_scsi_dev_t *dev) 3455 { 3456 int rc; 3457 u64 sa = 0; 3458 3459 if (is_hba_lunid(scsi3addr)) { 3460 struct bmic_sense_subsystem_info *ssi; 3461 3462 ssi = kzalloc(sizeof(*ssi), GFP_KERNEL); 3463 if (!ssi) 3464 return; 3465 3466 rc = hpsa_bmic_sense_subsystem_information(h, 3467 scsi3addr, 0, ssi, sizeof(*ssi)); 3468 if (rc == 0) { 3469 sa = get_unaligned_be64(ssi->primary_world_wide_id); 3470 h->sas_address = sa; 3471 } 3472 3473 kfree(ssi); 3474 } else 3475 sa = hpsa_get_sas_address_from_report_physical(h, scsi3addr); 3476 3477 dev->sas_address = sa; 3478 } 3479 3480 /* Get a device id from inquiry page 0x83 */ 3481 static bool hpsa_vpd_page_supported(struct ctlr_info *h, 3482 unsigned char scsi3addr[], u8 page) 3483 { 3484 int rc; 3485 int i; 3486 int pages; 3487 unsigned char *buf, bufsize; 3488 3489 buf = kzalloc(256, GFP_KERNEL); 3490 if (!buf) 3491 return false; 3492 3493 /* Get the size of the page list first */ 3494 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 3495 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES, 3496 buf, HPSA_VPD_HEADER_SZ); 3497 if (rc != 0) 3498 goto exit_unsupported; 3499 pages = buf[3]; 3500 if ((pages + HPSA_VPD_HEADER_SZ) <= 255) 3501 bufsize = pages + HPSA_VPD_HEADER_SZ; 3502 else 3503 bufsize = 255; 3504 3505 /* Get the whole VPD page list */ 3506 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 3507 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES, 3508 buf, bufsize); 3509 if (rc != 0) 3510 goto exit_unsupported; 3511 3512 pages = buf[3]; 3513 for (i = 1; i <= pages; i++) 3514 if (buf[3 + i] == page) 3515 goto exit_supported; 3516 exit_unsupported: 3517 kfree(buf); 3518 return false; 3519 exit_supported: 3520 kfree(buf); 3521 return true; 3522 } 3523 3524 static void hpsa_get_ioaccel_status(struct ctlr_info *h, 3525 unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device) 3526 { 3527 int rc; 3528 unsigned char *buf; 3529 u8 ioaccel_status; 3530 3531 this_device->offload_config = 0; 3532 this_device->offload_enabled = 0; 3533 this_device->offload_to_be_enabled = 0; 3534 3535 buf = kzalloc(64, GFP_KERNEL); 3536 if (!buf) 3537 return; 3538 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS)) 3539 goto out; 3540 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 3541 VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64); 3542 if (rc != 0) 3543 goto out; 3544 3545 #define IOACCEL_STATUS_BYTE 4 3546 #define OFFLOAD_CONFIGURED_BIT 0x01 3547 #define OFFLOAD_ENABLED_BIT 0x02 3548 ioaccel_status = buf[IOACCEL_STATUS_BYTE]; 3549 this_device->offload_config = 3550 !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT); 3551 if (this_device->offload_config) { 3552 this_device->offload_enabled = 3553 !!(ioaccel_status & OFFLOAD_ENABLED_BIT); 3554 if (hpsa_get_raid_map(h, scsi3addr, this_device)) 3555 this_device->offload_enabled = 0; 3556 } 3557 this_device->offload_to_be_enabled = this_device->offload_enabled; 3558 out: 3559 kfree(buf); 3560 return; 3561 } 3562 3563 /* Get the device id from inquiry page 0x83 */ 3564 static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr, 3565 unsigned char *device_id, int index, int buflen) 3566 { 3567 int rc; 3568 unsigned char *buf; 3569 3570 /* Does controller have VPD for device id? */ 3571 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_DEVICE_ID)) 3572 return 1; /* not supported */ 3573 3574 buf = kzalloc(64, GFP_KERNEL); 3575 if (!buf) 3576 return -ENOMEM; 3577 3578 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 3579 HPSA_VPD_LV_DEVICE_ID, buf, 64); 3580 if (rc == 0) { 3581 if (buflen > 16) 3582 buflen = 16; 3583 memcpy(device_id, &buf[8], buflen); 3584 } 3585 3586 kfree(buf); 3587 3588 return rc; /*0 - got id, otherwise, didn't */ 3589 } 3590 3591 static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical, 3592 void *buf, int bufsize, 3593 int extended_response) 3594 { 3595 int rc = IO_OK; 3596 struct CommandList *c; 3597 unsigned char scsi3addr[8]; 3598 struct ErrorInfo *ei; 3599 3600 c = cmd_alloc(h); 3601 3602 /* address the controller */ 3603 memset(scsi3addr, 0, sizeof(scsi3addr)); 3604 if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h, 3605 buf, bufsize, 0, scsi3addr, TYPE_CMD)) { 3606 rc = -1; 3607 goto out; 3608 } 3609 if (extended_response) 3610 c->Request.CDB[1] = extended_response; 3611 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3612 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 3613 if (rc) 3614 goto out; 3615 ei = c->err_info; 3616 if (ei->CommandStatus != 0 && 3617 ei->CommandStatus != CMD_DATA_UNDERRUN) { 3618 hpsa_scsi_interpret_error(h, c); 3619 rc = -1; 3620 } else { 3621 struct ReportLUNdata *rld = buf; 3622 3623 if (rld->extended_response_flag != extended_response) { 3624 dev_err(&h->pdev->dev, 3625 "report luns requested format %u, got %u\n", 3626 extended_response, 3627 rld->extended_response_flag); 3628 rc = -1; 3629 } 3630 } 3631 out: 3632 cmd_free(h, c); 3633 return rc; 3634 } 3635 3636 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 3637 struct ReportExtendedLUNdata *buf, int bufsize) 3638 { 3639 int rc; 3640 struct ReportLUNdata *lbuf; 3641 3642 rc = hpsa_scsi_do_report_luns(h, 0, buf, bufsize, 3643 HPSA_REPORT_PHYS_EXTENDED); 3644 if (!rc || !hpsa_allow_any) 3645 return rc; 3646 3647 /* REPORT PHYS EXTENDED is not supported */ 3648 lbuf = kzalloc(sizeof(*lbuf), GFP_KERNEL); 3649 if (!lbuf) 3650 return -ENOMEM; 3651 3652 rc = hpsa_scsi_do_report_luns(h, 0, lbuf, sizeof(*lbuf), 0); 3653 if (!rc) { 3654 int i; 3655 u32 nphys; 3656 3657 /* Copy ReportLUNdata header */ 3658 memcpy(buf, lbuf, 8); 3659 nphys = be32_to_cpu(*((__be32 *)lbuf->LUNListLength)) / 8; 3660 for (i = 0; i < nphys; i++) 3661 memcpy(buf->LUN[i].lunid, lbuf->LUN[i], 8); 3662 } 3663 kfree(lbuf); 3664 return rc; 3665 } 3666 3667 static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h, 3668 struct ReportLUNdata *buf, int bufsize) 3669 { 3670 return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0); 3671 } 3672 3673 static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device, 3674 int bus, int target, int lun) 3675 { 3676 device->bus = bus; 3677 device->target = target; 3678 device->lun = lun; 3679 } 3680 3681 /* Use VPD inquiry to get details of volume status */ 3682 static int hpsa_get_volume_status(struct ctlr_info *h, 3683 unsigned char scsi3addr[]) 3684 { 3685 int rc; 3686 int status; 3687 int size; 3688 unsigned char *buf; 3689 3690 buf = kzalloc(64, GFP_KERNEL); 3691 if (!buf) 3692 return HPSA_VPD_LV_STATUS_UNSUPPORTED; 3693 3694 /* Does controller have VPD for logical volume status? */ 3695 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS)) 3696 goto exit_failed; 3697 3698 /* Get the size of the VPD return buffer */ 3699 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS, 3700 buf, HPSA_VPD_HEADER_SZ); 3701 if (rc != 0) 3702 goto exit_failed; 3703 size = buf[3]; 3704 3705 /* Now get the whole VPD buffer */ 3706 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS, 3707 buf, size + HPSA_VPD_HEADER_SZ); 3708 if (rc != 0) 3709 goto exit_failed; 3710 status = buf[4]; /* status byte */ 3711 3712 kfree(buf); 3713 return status; 3714 exit_failed: 3715 kfree(buf); 3716 return HPSA_VPD_LV_STATUS_UNSUPPORTED; 3717 } 3718 3719 /* Determine offline status of a volume. 3720 * Return either: 3721 * 0 (not offline) 3722 * 0xff (offline for unknown reasons) 3723 * # (integer code indicating one of several NOT READY states 3724 * describing why a volume is to be kept offline) 3725 */ 3726 static unsigned char hpsa_volume_offline(struct ctlr_info *h, 3727 unsigned char scsi3addr[]) 3728 { 3729 struct CommandList *c; 3730 unsigned char *sense; 3731 u8 sense_key, asc, ascq; 3732 int sense_len; 3733 int rc, ldstat = 0; 3734 u16 cmd_status; 3735 u8 scsi_status; 3736 #define ASC_LUN_NOT_READY 0x04 3737 #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04 3738 #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02 3739 3740 c = cmd_alloc(h); 3741 3742 (void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD); 3743 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 3744 DEFAULT_TIMEOUT); 3745 if (rc) { 3746 cmd_free(h, c); 3747 return HPSA_VPD_LV_STATUS_UNSUPPORTED; 3748 } 3749 sense = c->err_info->SenseInfo; 3750 if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo)) 3751 sense_len = sizeof(c->err_info->SenseInfo); 3752 else 3753 sense_len = c->err_info->SenseLen; 3754 decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq); 3755 cmd_status = c->err_info->CommandStatus; 3756 scsi_status = c->err_info->ScsiStatus; 3757 cmd_free(h, c); 3758 3759 /* Determine the reason for not ready state */ 3760 ldstat = hpsa_get_volume_status(h, scsi3addr); 3761 3762 /* Keep volume offline in certain cases: */ 3763 switch (ldstat) { 3764 case HPSA_LV_FAILED: 3765 case HPSA_LV_UNDERGOING_ERASE: 3766 case HPSA_LV_NOT_AVAILABLE: 3767 case HPSA_LV_UNDERGOING_RPI: 3768 case HPSA_LV_PENDING_RPI: 3769 case HPSA_LV_ENCRYPTED_NO_KEY: 3770 case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER: 3771 case HPSA_LV_UNDERGOING_ENCRYPTION: 3772 case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING: 3773 case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 3774 return ldstat; 3775 case HPSA_VPD_LV_STATUS_UNSUPPORTED: 3776 /* If VPD status page isn't available, 3777 * use ASC/ASCQ to determine state 3778 */ 3779 if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) || 3780 (ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ)) 3781 return ldstat; 3782 break; 3783 default: 3784 break; 3785 } 3786 return HPSA_LV_OK; 3787 } 3788 3789 /* 3790 * Find out if a logical device supports aborts by simply trying one. 3791 * Smart Array may claim not to support aborts on logical drives, but 3792 * if a MSA2000 * is connected, the drives on that will be presented 3793 * by the Smart Array as logical drives, and aborts may be sent to 3794 * those devices successfully. So the simplest way to find out is 3795 * to simply try an abort and see how the device responds. 3796 */ 3797 static int hpsa_device_supports_aborts(struct ctlr_info *h, 3798 unsigned char *scsi3addr) 3799 { 3800 struct CommandList *c; 3801 struct ErrorInfo *ei; 3802 int rc = 0; 3803 3804 u64 tag = (u64) -1; /* bogus tag */ 3805 3806 /* Assume that physical devices support aborts */ 3807 if (!is_logical_dev_addr_mode(scsi3addr)) 3808 return 1; 3809 3810 c = cmd_alloc(h); 3811 3812 (void) fill_cmd(c, HPSA_ABORT_MSG, h, &tag, 0, 0, scsi3addr, TYPE_MSG); 3813 (void) hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 3814 DEFAULT_TIMEOUT); 3815 /* no unmap needed here because no data xfer. */ 3816 ei = c->err_info; 3817 switch (ei->CommandStatus) { 3818 case CMD_INVALID: 3819 rc = 0; 3820 break; 3821 case CMD_UNABORTABLE: 3822 case CMD_ABORT_FAILED: 3823 rc = 1; 3824 break; 3825 case CMD_TMF_STATUS: 3826 rc = hpsa_evaluate_tmf_status(h, c); 3827 break; 3828 default: 3829 rc = 0; 3830 break; 3831 } 3832 cmd_free(h, c); 3833 return rc; 3834 } 3835 3836 static int hpsa_update_device_info(struct ctlr_info *h, 3837 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device, 3838 unsigned char *is_OBDR_device) 3839 { 3840 3841 #define OBDR_SIG_OFFSET 43 3842 #define OBDR_TAPE_SIG "$DR-10" 3843 #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1) 3844 #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN) 3845 3846 unsigned char *inq_buff; 3847 unsigned char *obdr_sig; 3848 int rc = 0; 3849 3850 inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL); 3851 if (!inq_buff) { 3852 rc = -ENOMEM; 3853 goto bail_out; 3854 } 3855 3856 /* Do an inquiry to the device to see what it is. */ 3857 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff, 3858 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) { 3859 dev_err(&h->pdev->dev, 3860 "%s: inquiry failed, device will be skipped.\n", 3861 __func__); 3862 rc = HPSA_INQUIRY_FAILED; 3863 goto bail_out; 3864 } 3865 3866 scsi_sanitize_inquiry_string(&inq_buff[8], 8); 3867 scsi_sanitize_inquiry_string(&inq_buff[16], 16); 3868 3869 this_device->devtype = (inq_buff[0] & 0x1f); 3870 memcpy(this_device->scsi3addr, scsi3addr, 8); 3871 memcpy(this_device->vendor, &inq_buff[8], 3872 sizeof(this_device->vendor)); 3873 memcpy(this_device->model, &inq_buff[16], 3874 sizeof(this_device->model)); 3875 this_device->rev = inq_buff[2]; 3876 memset(this_device->device_id, 0, 3877 sizeof(this_device->device_id)); 3878 if (hpsa_get_device_id(h, scsi3addr, this_device->device_id, 8, 3879 sizeof(this_device->device_id))) 3880 dev_err(&h->pdev->dev, 3881 "hpsa%d: %s: can't get device id for host %d:C0:T%d:L%d\t%s\t%.16s\n", 3882 h->ctlr, __func__, 3883 h->scsi_host->host_no, 3884 this_device->target, this_device->lun, 3885 scsi_device_type(this_device->devtype), 3886 this_device->model); 3887 3888 if ((this_device->devtype == TYPE_DISK || 3889 this_device->devtype == TYPE_ZBC) && 3890 is_logical_dev_addr_mode(scsi3addr)) { 3891 unsigned char volume_offline; 3892 3893 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level); 3894 if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC) 3895 hpsa_get_ioaccel_status(h, scsi3addr, this_device); 3896 volume_offline = hpsa_volume_offline(h, scsi3addr); 3897 this_device->volume_offline = volume_offline; 3898 if (volume_offline == HPSA_LV_FAILED) { 3899 rc = HPSA_LV_FAILED; 3900 dev_err(&h->pdev->dev, 3901 "%s: LV failed, device will be skipped.\n", 3902 __func__); 3903 goto bail_out; 3904 } 3905 } else { 3906 this_device->raid_level = RAID_UNKNOWN; 3907 this_device->offload_config = 0; 3908 this_device->offload_enabled = 0; 3909 this_device->offload_to_be_enabled = 0; 3910 this_device->hba_ioaccel_enabled = 0; 3911 this_device->volume_offline = 0; 3912 this_device->queue_depth = h->nr_cmds; 3913 } 3914 3915 if (is_OBDR_device) { 3916 /* See if this is a One-Button-Disaster-Recovery device 3917 * by looking for "$DR-10" at offset 43 in inquiry data. 3918 */ 3919 obdr_sig = &inq_buff[OBDR_SIG_OFFSET]; 3920 *is_OBDR_device = (this_device->devtype == TYPE_ROM && 3921 strncmp(obdr_sig, OBDR_TAPE_SIG, 3922 OBDR_SIG_LEN) == 0); 3923 } 3924 kfree(inq_buff); 3925 return 0; 3926 3927 bail_out: 3928 kfree(inq_buff); 3929 return rc; 3930 } 3931 3932 static void hpsa_update_device_supports_aborts(struct ctlr_info *h, 3933 struct hpsa_scsi_dev_t *dev, u8 *scsi3addr) 3934 { 3935 unsigned long flags; 3936 int rc, entry; 3937 /* 3938 * See if this device supports aborts. If we already know 3939 * the device, we already know if it supports aborts, otherwise 3940 * we have to find out if it supports aborts by trying one. 3941 */ 3942 spin_lock_irqsave(&h->devlock, flags); 3943 rc = hpsa_scsi_find_entry(dev, h->dev, h->ndevices, &entry); 3944 if ((rc == DEVICE_SAME || rc == DEVICE_UPDATED) && 3945 entry >= 0 && entry < h->ndevices) { 3946 dev->supports_aborts = h->dev[entry]->supports_aborts; 3947 spin_unlock_irqrestore(&h->devlock, flags); 3948 } else { 3949 spin_unlock_irqrestore(&h->devlock, flags); 3950 dev->supports_aborts = 3951 hpsa_device_supports_aborts(h, scsi3addr); 3952 if (dev->supports_aborts < 0) 3953 dev->supports_aborts = 0; 3954 } 3955 } 3956 3957 /* 3958 * Helper function to assign bus, target, lun mapping of devices. 3959 * Logical drive target and lun are assigned at this time, but 3960 * physical device lun and target assignment are deferred (assigned 3961 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.) 3962 */ 3963 static void figure_bus_target_lun(struct ctlr_info *h, 3964 u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device) 3965 { 3966 u32 lunid = get_unaligned_le32(lunaddrbytes); 3967 3968 if (!is_logical_dev_addr_mode(lunaddrbytes)) { 3969 /* physical device, target and lun filled in later */ 3970 if (is_hba_lunid(lunaddrbytes)) { 3971 int bus = HPSA_HBA_BUS; 3972 3973 if (!device->rev) 3974 bus = HPSA_LEGACY_HBA_BUS; 3975 hpsa_set_bus_target_lun(device, 3976 bus, 0, lunid & 0x3fff); 3977 } else 3978 /* defer target, lun assignment for physical devices */ 3979 hpsa_set_bus_target_lun(device, 3980 HPSA_PHYSICAL_DEVICE_BUS, -1, -1); 3981 return; 3982 } 3983 /* It's a logical device */ 3984 if (device->external) { 3985 hpsa_set_bus_target_lun(device, 3986 HPSA_EXTERNAL_RAID_VOLUME_BUS, (lunid >> 16) & 0x3fff, 3987 lunid & 0x00ff); 3988 return; 3989 } 3990 hpsa_set_bus_target_lun(device, HPSA_RAID_VOLUME_BUS, 3991 0, lunid & 0x3fff); 3992 } 3993 3994 3995 /* 3996 * Get address of physical disk used for an ioaccel2 mode command: 3997 * 1. Extract ioaccel2 handle from the command. 3998 * 2. Find a matching ioaccel2 handle from list of physical disks. 3999 * 3. Return: 4000 * 1 and set scsi3addr to address of matching physical 4001 * 0 if no matching physical disk was found. 4002 */ 4003 static int hpsa_get_pdisk_of_ioaccel2(struct ctlr_info *h, 4004 struct CommandList *ioaccel2_cmd_to_abort, unsigned char *scsi3addr) 4005 { 4006 struct io_accel2_cmd *c2 = 4007 &h->ioaccel2_cmd_pool[ioaccel2_cmd_to_abort->cmdindex]; 4008 unsigned long flags; 4009 int i; 4010 4011 spin_lock_irqsave(&h->devlock, flags); 4012 for (i = 0; i < h->ndevices; i++) 4013 if (h->dev[i]->ioaccel_handle == le32_to_cpu(c2->scsi_nexus)) { 4014 memcpy(scsi3addr, h->dev[i]->scsi3addr, 4015 sizeof(h->dev[i]->scsi3addr)); 4016 spin_unlock_irqrestore(&h->devlock, flags); 4017 return 1; 4018 } 4019 spin_unlock_irqrestore(&h->devlock, flags); 4020 return 0; 4021 } 4022 4023 static int figure_external_status(struct ctlr_info *h, int raid_ctlr_position, 4024 int i, int nphysicals, int nlocal_logicals) 4025 { 4026 /* In report logicals, local logicals are listed first, 4027 * then any externals. 4028 */ 4029 int logicals_start = nphysicals + (raid_ctlr_position == 0); 4030 4031 if (i == raid_ctlr_position) 4032 return 0; 4033 4034 if (i < logicals_start) 4035 return 0; 4036 4037 /* i is in logicals range, but still within local logicals */ 4038 if ((i - nphysicals - (raid_ctlr_position == 0)) < nlocal_logicals) 4039 return 0; 4040 4041 return 1; /* it's an external lun */ 4042 } 4043 4044 /* 4045 * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev, 4046 * logdev. The number of luns in physdev and logdev are returned in 4047 * *nphysicals and *nlogicals, respectively. 4048 * Returns 0 on success, -1 otherwise. 4049 */ 4050 static int hpsa_gather_lun_info(struct ctlr_info *h, 4051 struct ReportExtendedLUNdata *physdev, u32 *nphysicals, 4052 struct ReportLUNdata *logdev, u32 *nlogicals) 4053 { 4054 if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) { 4055 dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 4056 return -1; 4057 } 4058 *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24; 4059 if (*nphysicals > HPSA_MAX_PHYS_LUN) { 4060 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n", 4061 HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN); 4062 *nphysicals = HPSA_MAX_PHYS_LUN; 4063 } 4064 if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) { 4065 dev_err(&h->pdev->dev, "report logical LUNs failed.\n"); 4066 return -1; 4067 } 4068 *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8; 4069 /* Reject Logicals in excess of our max capability. */ 4070 if (*nlogicals > HPSA_MAX_LUN) { 4071 dev_warn(&h->pdev->dev, 4072 "maximum logical LUNs (%d) exceeded. " 4073 "%d LUNs ignored.\n", HPSA_MAX_LUN, 4074 *nlogicals - HPSA_MAX_LUN); 4075 *nlogicals = HPSA_MAX_LUN; 4076 } 4077 if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) { 4078 dev_warn(&h->pdev->dev, 4079 "maximum logical + physical LUNs (%d) exceeded. " 4080 "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN, 4081 *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN); 4082 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals; 4083 } 4084 return 0; 4085 } 4086 4087 static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, 4088 int i, int nphysicals, int nlogicals, 4089 struct ReportExtendedLUNdata *physdev_list, 4090 struct ReportLUNdata *logdev_list) 4091 { 4092 /* Helper function, figure out where the LUN ID info is coming from 4093 * given index i, lists of physical and logical devices, where in 4094 * the list the raid controller is supposed to appear (first or last) 4095 */ 4096 4097 int logicals_start = nphysicals + (raid_ctlr_position == 0); 4098 int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0); 4099 4100 if (i == raid_ctlr_position) 4101 return RAID_CTLR_LUNID; 4102 4103 if (i < logicals_start) 4104 return &physdev_list->LUN[i - 4105 (raid_ctlr_position == 0)].lunid[0]; 4106 4107 if (i < last_device) 4108 return &logdev_list->LUN[i - nphysicals - 4109 (raid_ctlr_position == 0)][0]; 4110 BUG(); 4111 return NULL; 4112 } 4113 4114 /* get physical drive ioaccel handle and queue depth */ 4115 static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h, 4116 struct hpsa_scsi_dev_t *dev, 4117 struct ReportExtendedLUNdata *rlep, int rle_index, 4118 struct bmic_identify_physical_device *id_phys) 4119 { 4120 int rc; 4121 struct ext_report_lun_entry *rle; 4122 4123 /* 4124 * external targets don't support BMIC 4125 */ 4126 if (dev->external) { 4127 dev->queue_depth = 7; 4128 return; 4129 } 4130 4131 rle = &rlep->LUN[rle_index]; 4132 4133 dev->ioaccel_handle = rle->ioaccel_handle; 4134 if ((rle->device_flags & 0x08) && dev->ioaccel_handle) 4135 dev->hba_ioaccel_enabled = 1; 4136 memset(id_phys, 0, sizeof(*id_phys)); 4137 rc = hpsa_bmic_id_physical_device(h, &rle->lunid[0], 4138 GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]), id_phys, 4139 sizeof(*id_phys)); 4140 if (!rc) 4141 /* Reserve space for FW operations */ 4142 #define DRIVE_CMDS_RESERVED_FOR_FW 2 4143 #define DRIVE_QUEUE_DEPTH 7 4144 dev->queue_depth = 4145 le16_to_cpu(id_phys->current_queue_depth_limit) - 4146 DRIVE_CMDS_RESERVED_FOR_FW; 4147 else 4148 dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */ 4149 } 4150 4151 static void hpsa_get_path_info(struct hpsa_scsi_dev_t *this_device, 4152 struct ReportExtendedLUNdata *rlep, int rle_index, 4153 struct bmic_identify_physical_device *id_phys) 4154 { 4155 struct ext_report_lun_entry *rle = &rlep->LUN[rle_index]; 4156 4157 if ((rle->device_flags & 0x08) && this_device->ioaccel_handle) 4158 this_device->hba_ioaccel_enabled = 1; 4159 4160 memcpy(&this_device->active_path_index, 4161 &id_phys->active_path_number, 4162 sizeof(this_device->active_path_index)); 4163 memcpy(&this_device->path_map, 4164 &id_phys->redundant_path_present_map, 4165 sizeof(this_device->path_map)); 4166 memcpy(&this_device->box, 4167 &id_phys->alternate_paths_phys_box_on_port, 4168 sizeof(this_device->box)); 4169 memcpy(&this_device->phys_connector, 4170 &id_phys->alternate_paths_phys_connector, 4171 sizeof(this_device->phys_connector)); 4172 memcpy(&this_device->bay, 4173 &id_phys->phys_bay_in_box, 4174 sizeof(this_device->bay)); 4175 } 4176 4177 /* get number of local logical disks. */ 4178 static int hpsa_set_local_logical_count(struct ctlr_info *h, 4179 struct bmic_identify_controller *id_ctlr, 4180 u32 *nlocals) 4181 { 4182 int rc; 4183 4184 if (!id_ctlr) { 4185 dev_warn(&h->pdev->dev, "%s: id_ctlr buffer is NULL.\n", 4186 __func__); 4187 return -ENOMEM; 4188 } 4189 memset(id_ctlr, 0, sizeof(*id_ctlr)); 4190 rc = hpsa_bmic_id_controller(h, id_ctlr, sizeof(*id_ctlr)); 4191 if (!rc) 4192 if (id_ctlr->configured_logical_drive_count < 256) 4193 *nlocals = id_ctlr->configured_logical_drive_count; 4194 else 4195 *nlocals = le16_to_cpu( 4196 id_ctlr->extended_logical_unit_count); 4197 else 4198 *nlocals = -1; 4199 return rc; 4200 } 4201 4202 static bool hpsa_is_disk_spare(struct ctlr_info *h, u8 *lunaddrbytes) 4203 { 4204 struct bmic_identify_physical_device *id_phys; 4205 bool is_spare = false; 4206 int rc; 4207 4208 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 4209 if (!id_phys) 4210 return false; 4211 4212 rc = hpsa_bmic_id_physical_device(h, 4213 lunaddrbytes, 4214 GET_BMIC_DRIVE_NUMBER(lunaddrbytes), 4215 id_phys, sizeof(*id_phys)); 4216 if (rc == 0) 4217 is_spare = (id_phys->more_flags >> 6) & 0x01; 4218 4219 kfree(id_phys); 4220 return is_spare; 4221 } 4222 4223 #define RPL_DEV_FLAG_NON_DISK 0x1 4224 #define RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED 0x2 4225 #define RPL_DEV_FLAG_UNCONFIG_DISK 0x4 4226 4227 #define BMIC_DEVICE_TYPE_ENCLOSURE 6 4228 4229 static bool hpsa_skip_device(struct ctlr_info *h, u8 *lunaddrbytes, 4230 struct ext_report_lun_entry *rle) 4231 { 4232 u8 device_flags; 4233 u8 device_type; 4234 4235 if (!MASKED_DEVICE(lunaddrbytes)) 4236 return false; 4237 4238 device_flags = rle->device_flags; 4239 device_type = rle->device_type; 4240 4241 if (device_flags & RPL_DEV_FLAG_NON_DISK) { 4242 if (device_type == BMIC_DEVICE_TYPE_ENCLOSURE) 4243 return false; 4244 return true; 4245 } 4246 4247 if (!(device_flags & RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED)) 4248 return false; 4249 4250 if (device_flags & RPL_DEV_FLAG_UNCONFIG_DISK) 4251 return false; 4252 4253 /* 4254 * Spares may be spun down, we do not want to 4255 * do an Inquiry to a RAID set spare drive as 4256 * that would have them spun up, that is a 4257 * performance hit because I/O to the RAID device 4258 * stops while the spin up occurs which can take 4259 * over 50 seconds. 4260 */ 4261 if (hpsa_is_disk_spare(h, lunaddrbytes)) 4262 return true; 4263 4264 return false; 4265 } 4266 4267 static void hpsa_update_scsi_devices(struct ctlr_info *h) 4268 { 4269 /* the idea here is we could get notified 4270 * that some devices have changed, so we do a report 4271 * physical luns and report logical luns cmd, and adjust 4272 * our list of devices accordingly. 4273 * 4274 * The scsi3addr's of devices won't change so long as the 4275 * adapter is not reset. That means we can rescan and 4276 * tell which devices we already know about, vs. new 4277 * devices, vs. disappearing devices. 4278 */ 4279 struct ReportExtendedLUNdata *physdev_list = NULL; 4280 struct ReportLUNdata *logdev_list = NULL; 4281 struct bmic_identify_physical_device *id_phys = NULL; 4282 struct bmic_identify_controller *id_ctlr = NULL; 4283 u32 nphysicals = 0; 4284 u32 nlogicals = 0; 4285 u32 nlocal_logicals = 0; 4286 u32 ndev_allocated = 0; 4287 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice; 4288 int ncurrent = 0; 4289 int i, n_ext_target_devs, ndevs_to_allocate; 4290 int raid_ctlr_position; 4291 bool physical_device; 4292 DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS); 4293 4294 currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL); 4295 physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL); 4296 logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL); 4297 tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL); 4298 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 4299 id_ctlr = kzalloc(sizeof(*id_ctlr), GFP_KERNEL); 4300 4301 if (!currentsd || !physdev_list || !logdev_list || 4302 !tmpdevice || !id_phys || !id_ctlr) { 4303 dev_err(&h->pdev->dev, "out of memory\n"); 4304 goto out; 4305 } 4306 memset(lunzerobits, 0, sizeof(lunzerobits)); 4307 4308 h->drv_req_rescan = 0; /* cancel scheduled rescan - we're doing it. */ 4309 4310 if (hpsa_gather_lun_info(h, physdev_list, &nphysicals, 4311 logdev_list, &nlogicals)) { 4312 h->drv_req_rescan = 1; 4313 goto out; 4314 } 4315 4316 /* Set number of local logicals (non PTRAID) */ 4317 if (hpsa_set_local_logical_count(h, id_ctlr, &nlocal_logicals)) { 4318 dev_warn(&h->pdev->dev, 4319 "%s: Can't determine number of local logical devices.\n", 4320 __func__); 4321 } 4322 4323 /* We might see up to the maximum number of logical and physical disks 4324 * plus external target devices, and a device for the local RAID 4325 * controller. 4326 */ 4327 ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1; 4328 4329 /* Allocate the per device structures */ 4330 for (i = 0; i < ndevs_to_allocate; i++) { 4331 if (i >= HPSA_MAX_DEVICES) { 4332 dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded." 4333 " %d devices ignored.\n", HPSA_MAX_DEVICES, 4334 ndevs_to_allocate - HPSA_MAX_DEVICES); 4335 break; 4336 } 4337 4338 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL); 4339 if (!currentsd[i]) { 4340 h->drv_req_rescan = 1; 4341 goto out; 4342 } 4343 ndev_allocated++; 4344 } 4345 4346 if (is_scsi_rev_5(h)) 4347 raid_ctlr_position = 0; 4348 else 4349 raid_ctlr_position = nphysicals + nlogicals; 4350 4351 /* adjust our table of devices */ 4352 n_ext_target_devs = 0; 4353 for (i = 0; i < nphysicals + nlogicals + 1; i++) { 4354 u8 *lunaddrbytes, is_OBDR = 0; 4355 int rc = 0; 4356 int phys_dev_index = i - (raid_ctlr_position == 0); 4357 bool skip_device = false; 4358 4359 physical_device = i < nphysicals + (raid_ctlr_position == 0); 4360 4361 /* Figure out where the LUN ID info is coming from */ 4362 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position, 4363 i, nphysicals, nlogicals, physdev_list, logdev_list); 4364 4365 /* Determine if this is a lun from an external target array */ 4366 tmpdevice->external = 4367 figure_external_status(h, raid_ctlr_position, i, 4368 nphysicals, nlocal_logicals); 4369 4370 /* 4371 * Skip over some devices such as a spare. 4372 */ 4373 if (!tmpdevice->external && physical_device) { 4374 skip_device = hpsa_skip_device(h, lunaddrbytes, 4375 &physdev_list->LUN[phys_dev_index]); 4376 if (skip_device) 4377 continue; 4378 } 4379 4380 /* Get device type, vendor, model, device id */ 4381 rc = hpsa_update_device_info(h, lunaddrbytes, tmpdevice, 4382 &is_OBDR); 4383 if (rc == -ENOMEM) { 4384 dev_warn(&h->pdev->dev, 4385 "Out of memory, rescan deferred.\n"); 4386 h->drv_req_rescan = 1; 4387 goto out; 4388 } 4389 if (rc) { 4390 h->drv_req_rescan = 1; 4391 continue; 4392 } 4393 4394 figure_bus_target_lun(h, lunaddrbytes, tmpdevice); 4395 hpsa_update_device_supports_aborts(h, tmpdevice, lunaddrbytes); 4396 this_device = currentsd[ncurrent]; 4397 4398 /* Turn on discovery_polling if there are ext target devices. 4399 * Event-based change notification is unreliable for those. 4400 */ 4401 if (!h->discovery_polling) { 4402 if (tmpdevice->external) { 4403 h->discovery_polling = 1; 4404 dev_info(&h->pdev->dev, 4405 "External target, activate discovery polling.\n"); 4406 } 4407 } 4408 4409 4410 *this_device = *tmpdevice; 4411 this_device->physical_device = physical_device; 4412 4413 /* 4414 * Expose all devices except for physical devices that 4415 * are masked. 4416 */ 4417 if (MASKED_DEVICE(lunaddrbytes) && this_device->physical_device) 4418 this_device->expose_device = 0; 4419 else 4420 this_device->expose_device = 1; 4421 4422 4423 /* 4424 * Get the SAS address for physical devices that are exposed. 4425 */ 4426 if (this_device->physical_device && this_device->expose_device) 4427 hpsa_get_sas_address(h, lunaddrbytes, this_device); 4428 4429 switch (this_device->devtype) { 4430 case TYPE_ROM: 4431 /* We don't *really* support actual CD-ROM devices, 4432 * just "One Button Disaster Recovery" tape drive 4433 * which temporarily pretends to be a CD-ROM drive. 4434 * So we check that the device is really an OBDR tape 4435 * device by checking for "$DR-10" in bytes 43-48 of 4436 * the inquiry data. 4437 */ 4438 if (is_OBDR) 4439 ncurrent++; 4440 break; 4441 case TYPE_DISK: 4442 case TYPE_ZBC: 4443 if (this_device->physical_device) { 4444 /* The disk is in HBA mode. */ 4445 /* Never use RAID mapper in HBA mode. */ 4446 this_device->offload_enabled = 0; 4447 hpsa_get_ioaccel_drive_info(h, this_device, 4448 physdev_list, phys_dev_index, id_phys); 4449 hpsa_get_path_info(this_device, 4450 physdev_list, phys_dev_index, id_phys); 4451 } 4452 ncurrent++; 4453 break; 4454 case TYPE_TAPE: 4455 case TYPE_MEDIUM_CHANGER: 4456 ncurrent++; 4457 break; 4458 case TYPE_ENCLOSURE: 4459 if (!this_device->external) 4460 hpsa_get_enclosure_info(h, lunaddrbytes, 4461 physdev_list, phys_dev_index, 4462 this_device); 4463 ncurrent++; 4464 break; 4465 case TYPE_RAID: 4466 /* Only present the Smartarray HBA as a RAID controller. 4467 * If it's a RAID controller other than the HBA itself 4468 * (an external RAID controller, MSA500 or similar) 4469 * don't present it. 4470 */ 4471 if (!is_hba_lunid(lunaddrbytes)) 4472 break; 4473 ncurrent++; 4474 break; 4475 default: 4476 break; 4477 } 4478 if (ncurrent >= HPSA_MAX_DEVICES) 4479 break; 4480 } 4481 4482 if (h->sas_host == NULL) { 4483 int rc = 0; 4484 4485 rc = hpsa_add_sas_host(h); 4486 if (rc) { 4487 dev_warn(&h->pdev->dev, 4488 "Could not add sas host %d\n", rc); 4489 goto out; 4490 } 4491 } 4492 4493 adjust_hpsa_scsi_table(h, currentsd, ncurrent); 4494 out: 4495 kfree(tmpdevice); 4496 for (i = 0; i < ndev_allocated; i++) 4497 kfree(currentsd[i]); 4498 kfree(currentsd); 4499 kfree(physdev_list); 4500 kfree(logdev_list); 4501 kfree(id_ctlr); 4502 kfree(id_phys); 4503 } 4504 4505 static void hpsa_set_sg_descriptor(struct SGDescriptor *desc, 4506 struct scatterlist *sg) 4507 { 4508 u64 addr64 = (u64) sg_dma_address(sg); 4509 unsigned int len = sg_dma_len(sg); 4510 4511 desc->Addr = cpu_to_le64(addr64); 4512 desc->Len = cpu_to_le32(len); 4513 desc->Ext = 0; 4514 } 4515 4516 /* 4517 * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci 4518 * dma mapping and fills in the scatter gather entries of the 4519 * hpsa command, cp. 4520 */ 4521 static int hpsa_scatter_gather(struct ctlr_info *h, 4522 struct CommandList *cp, 4523 struct scsi_cmnd *cmd) 4524 { 4525 struct scatterlist *sg; 4526 int use_sg, i, sg_limit, chained, last_sg; 4527 struct SGDescriptor *curr_sg; 4528 4529 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 4530 4531 use_sg = scsi_dma_map(cmd); 4532 if (use_sg < 0) 4533 return use_sg; 4534 4535 if (!use_sg) 4536 goto sglist_finished; 4537 4538 /* 4539 * If the number of entries is greater than the max for a single list, 4540 * then we have a chained list; we will set up all but one entry in the 4541 * first list (the last entry is saved for link information); 4542 * otherwise, we don't have a chained list and we'll set up at each of 4543 * the entries in the one list. 4544 */ 4545 curr_sg = cp->SG; 4546 chained = use_sg > h->max_cmd_sg_entries; 4547 sg_limit = chained ? h->max_cmd_sg_entries - 1 : use_sg; 4548 last_sg = scsi_sg_count(cmd) - 1; 4549 scsi_for_each_sg(cmd, sg, sg_limit, i) { 4550 hpsa_set_sg_descriptor(curr_sg, sg); 4551 curr_sg++; 4552 } 4553 4554 if (chained) { 4555 /* 4556 * Continue with the chained list. Set curr_sg to the chained 4557 * list. Modify the limit to the total count less the entries 4558 * we've already set up. Resume the scan at the list entry 4559 * where the previous loop left off. 4560 */ 4561 curr_sg = h->cmd_sg_list[cp->cmdindex]; 4562 sg_limit = use_sg - sg_limit; 4563 for_each_sg(sg, sg, sg_limit, i) { 4564 hpsa_set_sg_descriptor(curr_sg, sg); 4565 curr_sg++; 4566 } 4567 } 4568 4569 /* Back the pointer up to the last entry and mark it as "last". */ 4570 (curr_sg - 1)->Ext = cpu_to_le32(HPSA_SG_LAST); 4571 4572 if (use_sg + chained > h->maxSG) 4573 h->maxSG = use_sg + chained; 4574 4575 if (chained) { 4576 cp->Header.SGList = h->max_cmd_sg_entries; 4577 cp->Header.SGTotal = cpu_to_le16(use_sg + 1); 4578 if (hpsa_map_sg_chain_block(h, cp)) { 4579 scsi_dma_unmap(cmd); 4580 return -1; 4581 } 4582 return 0; 4583 } 4584 4585 sglist_finished: 4586 4587 cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */ 4588 cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */ 4589 return 0; 4590 } 4591 4592 #define IO_ACCEL_INELIGIBLE (1) 4593 static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len) 4594 { 4595 int is_write = 0; 4596 u32 block; 4597 u32 block_cnt; 4598 4599 /* Perform some CDB fixups if needed using 10 byte reads/writes only */ 4600 switch (cdb[0]) { 4601 case WRITE_6: 4602 case WRITE_12: 4603 is_write = 1; 4604 case READ_6: 4605 case READ_12: 4606 if (*cdb_len == 6) { 4607 block = (((cdb[1] & 0x1F) << 16) | 4608 (cdb[2] << 8) | 4609 cdb[3]); 4610 block_cnt = cdb[4]; 4611 if (block_cnt == 0) 4612 block_cnt = 256; 4613 } else { 4614 BUG_ON(*cdb_len != 12); 4615 block = get_unaligned_be32(&cdb[2]); 4616 block_cnt = get_unaligned_be32(&cdb[6]); 4617 } 4618 if (block_cnt > 0xffff) 4619 return IO_ACCEL_INELIGIBLE; 4620 4621 cdb[0] = is_write ? WRITE_10 : READ_10; 4622 cdb[1] = 0; 4623 cdb[2] = (u8) (block >> 24); 4624 cdb[3] = (u8) (block >> 16); 4625 cdb[4] = (u8) (block >> 8); 4626 cdb[5] = (u8) (block); 4627 cdb[6] = 0; 4628 cdb[7] = (u8) (block_cnt >> 8); 4629 cdb[8] = (u8) (block_cnt); 4630 cdb[9] = 0; 4631 *cdb_len = 10; 4632 break; 4633 } 4634 return 0; 4635 } 4636 4637 static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h, 4638 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 4639 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4640 { 4641 struct scsi_cmnd *cmd = c->scsi_cmd; 4642 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex]; 4643 unsigned int len; 4644 unsigned int total_len = 0; 4645 struct scatterlist *sg; 4646 u64 addr64; 4647 int use_sg, i; 4648 struct SGDescriptor *curr_sg; 4649 u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE; 4650 4651 /* TODO: implement chaining support */ 4652 if (scsi_sg_count(cmd) > h->ioaccel_maxsg) { 4653 atomic_dec(&phys_disk->ioaccel_cmds_out); 4654 return IO_ACCEL_INELIGIBLE; 4655 } 4656 4657 BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX); 4658 4659 if (fixup_ioaccel_cdb(cdb, &cdb_len)) { 4660 atomic_dec(&phys_disk->ioaccel_cmds_out); 4661 return IO_ACCEL_INELIGIBLE; 4662 } 4663 4664 c->cmd_type = CMD_IOACCEL1; 4665 4666 /* Adjust the DMA address to point to the accelerated command buffer */ 4667 c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle + 4668 (c->cmdindex * sizeof(*cp)); 4669 BUG_ON(c->busaddr & 0x0000007F); 4670 4671 use_sg = scsi_dma_map(cmd); 4672 if (use_sg < 0) { 4673 atomic_dec(&phys_disk->ioaccel_cmds_out); 4674 return use_sg; 4675 } 4676 4677 if (use_sg) { 4678 curr_sg = cp->SG; 4679 scsi_for_each_sg(cmd, sg, use_sg, i) { 4680 addr64 = (u64) sg_dma_address(sg); 4681 len = sg_dma_len(sg); 4682 total_len += len; 4683 curr_sg->Addr = cpu_to_le64(addr64); 4684 curr_sg->Len = cpu_to_le32(len); 4685 curr_sg->Ext = cpu_to_le32(0); 4686 curr_sg++; 4687 } 4688 (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST); 4689 4690 switch (cmd->sc_data_direction) { 4691 case DMA_TO_DEVICE: 4692 control |= IOACCEL1_CONTROL_DATA_OUT; 4693 break; 4694 case DMA_FROM_DEVICE: 4695 control |= IOACCEL1_CONTROL_DATA_IN; 4696 break; 4697 case DMA_NONE: 4698 control |= IOACCEL1_CONTROL_NODATAXFER; 4699 break; 4700 default: 4701 dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4702 cmd->sc_data_direction); 4703 BUG(); 4704 break; 4705 } 4706 } else { 4707 control |= IOACCEL1_CONTROL_NODATAXFER; 4708 } 4709 4710 c->Header.SGList = use_sg; 4711 /* Fill out the command structure to submit */ 4712 cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF); 4713 cp->transfer_len = cpu_to_le32(total_len); 4714 cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ | 4715 (cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK)); 4716 cp->control = cpu_to_le32(control); 4717 memcpy(cp->CDB, cdb, cdb_len); 4718 memcpy(cp->CISS_LUN, scsi3addr, 8); 4719 /* Tag was already set at init time. */ 4720 enqueue_cmd_and_start_io(h, c); 4721 return 0; 4722 } 4723 4724 /* 4725 * Queue a command directly to a device behind the controller using the 4726 * I/O accelerator path. 4727 */ 4728 static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h, 4729 struct CommandList *c) 4730 { 4731 struct scsi_cmnd *cmd = c->scsi_cmd; 4732 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4733 4734 if (!dev) 4735 return -1; 4736 4737 c->phys_disk = dev; 4738 4739 return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle, 4740 cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev); 4741 } 4742 4743 /* 4744 * Set encryption parameters for the ioaccel2 request 4745 */ 4746 static void set_encrypt_ioaccel2(struct ctlr_info *h, 4747 struct CommandList *c, struct io_accel2_cmd *cp) 4748 { 4749 struct scsi_cmnd *cmd = c->scsi_cmd; 4750 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4751 struct raid_map_data *map = &dev->raid_map; 4752 u64 first_block; 4753 4754 /* Are we doing encryption on this device */ 4755 if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON)) 4756 return; 4757 /* Set the data encryption key index. */ 4758 cp->dekindex = map->dekindex; 4759 4760 /* Set the encryption enable flag, encoded into direction field. */ 4761 cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK; 4762 4763 /* Set encryption tweak values based on logical block address 4764 * If block size is 512, tweak value is LBA. 4765 * For other block sizes, tweak is (LBA * block size)/ 512) 4766 */ 4767 switch (cmd->cmnd[0]) { 4768 /* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */ 4769 case READ_6: 4770 case WRITE_6: 4771 first_block = (((cmd->cmnd[1] & 0x1F) << 16) | 4772 (cmd->cmnd[2] << 8) | 4773 cmd->cmnd[3]); 4774 break; 4775 case WRITE_10: 4776 case READ_10: 4777 /* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */ 4778 case WRITE_12: 4779 case READ_12: 4780 first_block = get_unaligned_be32(&cmd->cmnd[2]); 4781 break; 4782 case WRITE_16: 4783 case READ_16: 4784 first_block = get_unaligned_be64(&cmd->cmnd[2]); 4785 break; 4786 default: 4787 dev_err(&h->pdev->dev, 4788 "ERROR: %s: size (0x%x) not supported for encryption\n", 4789 __func__, cmd->cmnd[0]); 4790 BUG(); 4791 break; 4792 } 4793 4794 if (le32_to_cpu(map->volume_blk_size) != 512) 4795 first_block = first_block * 4796 le32_to_cpu(map->volume_blk_size)/512; 4797 4798 cp->tweak_lower = cpu_to_le32(first_block); 4799 cp->tweak_upper = cpu_to_le32(first_block >> 32); 4800 } 4801 4802 static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h, 4803 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 4804 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4805 { 4806 struct scsi_cmnd *cmd = c->scsi_cmd; 4807 struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex]; 4808 struct ioaccel2_sg_element *curr_sg; 4809 int use_sg, i; 4810 struct scatterlist *sg; 4811 u64 addr64; 4812 u32 len; 4813 u32 total_len = 0; 4814 4815 if (!cmd->device) 4816 return -1; 4817 4818 if (!cmd->device->hostdata) 4819 return -1; 4820 4821 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 4822 4823 if (fixup_ioaccel_cdb(cdb, &cdb_len)) { 4824 atomic_dec(&phys_disk->ioaccel_cmds_out); 4825 return IO_ACCEL_INELIGIBLE; 4826 } 4827 4828 c->cmd_type = CMD_IOACCEL2; 4829 /* Adjust the DMA address to point to the accelerated command buffer */ 4830 c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle + 4831 (c->cmdindex * sizeof(*cp)); 4832 BUG_ON(c->busaddr & 0x0000007F); 4833 4834 memset(cp, 0, sizeof(*cp)); 4835 cp->IU_type = IOACCEL2_IU_TYPE; 4836 4837 use_sg = scsi_dma_map(cmd); 4838 if (use_sg < 0) { 4839 atomic_dec(&phys_disk->ioaccel_cmds_out); 4840 return use_sg; 4841 } 4842 4843 if (use_sg) { 4844 curr_sg = cp->sg; 4845 if (use_sg > h->ioaccel_maxsg) { 4846 addr64 = le64_to_cpu( 4847 h->ioaccel2_cmd_sg_list[c->cmdindex]->address); 4848 curr_sg->address = cpu_to_le64(addr64); 4849 curr_sg->length = 0; 4850 curr_sg->reserved[0] = 0; 4851 curr_sg->reserved[1] = 0; 4852 curr_sg->reserved[2] = 0; 4853 curr_sg->chain_indicator = 0x80; 4854 4855 curr_sg = h->ioaccel2_cmd_sg_list[c->cmdindex]; 4856 } 4857 scsi_for_each_sg(cmd, sg, use_sg, i) { 4858 addr64 = (u64) sg_dma_address(sg); 4859 len = sg_dma_len(sg); 4860 total_len += len; 4861 curr_sg->address = cpu_to_le64(addr64); 4862 curr_sg->length = cpu_to_le32(len); 4863 curr_sg->reserved[0] = 0; 4864 curr_sg->reserved[1] = 0; 4865 curr_sg->reserved[2] = 0; 4866 curr_sg->chain_indicator = 0; 4867 curr_sg++; 4868 } 4869 4870 switch (cmd->sc_data_direction) { 4871 case DMA_TO_DEVICE: 4872 cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4873 cp->direction |= IOACCEL2_DIR_DATA_OUT; 4874 break; 4875 case DMA_FROM_DEVICE: 4876 cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4877 cp->direction |= IOACCEL2_DIR_DATA_IN; 4878 break; 4879 case DMA_NONE: 4880 cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4881 cp->direction |= IOACCEL2_DIR_NO_DATA; 4882 break; 4883 default: 4884 dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4885 cmd->sc_data_direction); 4886 BUG(); 4887 break; 4888 } 4889 } else { 4890 cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4891 cp->direction |= IOACCEL2_DIR_NO_DATA; 4892 } 4893 4894 /* Set encryption parameters, if necessary */ 4895 set_encrypt_ioaccel2(h, c, cp); 4896 4897 cp->scsi_nexus = cpu_to_le32(ioaccel_handle); 4898 cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT); 4899 memcpy(cp->cdb, cdb, sizeof(cp->cdb)); 4900 4901 cp->data_len = cpu_to_le32(total_len); 4902 cp->err_ptr = cpu_to_le64(c->busaddr + 4903 offsetof(struct io_accel2_cmd, error_data)); 4904 cp->err_len = cpu_to_le32(sizeof(cp->error_data)); 4905 4906 /* fill in sg elements */ 4907 if (use_sg > h->ioaccel_maxsg) { 4908 cp->sg_count = 1; 4909 cp->sg[0].length = cpu_to_le32(use_sg * sizeof(cp->sg[0])); 4910 if (hpsa_map_ioaccel2_sg_chain_block(h, cp, c)) { 4911 atomic_dec(&phys_disk->ioaccel_cmds_out); 4912 scsi_dma_unmap(cmd); 4913 return -1; 4914 } 4915 } else 4916 cp->sg_count = (u8) use_sg; 4917 4918 enqueue_cmd_and_start_io(h, c); 4919 return 0; 4920 } 4921 4922 /* 4923 * Queue a command to the correct I/O accelerator path. 4924 */ 4925 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h, 4926 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 4927 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4928 { 4929 if (!c->scsi_cmd->device) 4930 return -1; 4931 4932 if (!c->scsi_cmd->device->hostdata) 4933 return -1; 4934 4935 /* Try to honor the device's queue depth */ 4936 if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) > 4937 phys_disk->queue_depth) { 4938 atomic_dec(&phys_disk->ioaccel_cmds_out); 4939 return IO_ACCEL_INELIGIBLE; 4940 } 4941 if (h->transMethod & CFGTBL_Trans_io_accel1) 4942 return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle, 4943 cdb, cdb_len, scsi3addr, 4944 phys_disk); 4945 else 4946 return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle, 4947 cdb, cdb_len, scsi3addr, 4948 phys_disk); 4949 } 4950 4951 static void raid_map_helper(struct raid_map_data *map, 4952 int offload_to_mirror, u32 *map_index, u32 *current_group) 4953 { 4954 if (offload_to_mirror == 0) { 4955 /* use physical disk in the first mirrored group. */ 4956 *map_index %= le16_to_cpu(map->data_disks_per_row); 4957 return; 4958 } 4959 do { 4960 /* determine mirror group that *map_index indicates */ 4961 *current_group = *map_index / 4962 le16_to_cpu(map->data_disks_per_row); 4963 if (offload_to_mirror == *current_group) 4964 continue; 4965 if (*current_group < le16_to_cpu(map->layout_map_count) - 1) { 4966 /* select map index from next group */ 4967 *map_index += le16_to_cpu(map->data_disks_per_row); 4968 (*current_group)++; 4969 } else { 4970 /* select map index from first group */ 4971 *map_index %= le16_to_cpu(map->data_disks_per_row); 4972 *current_group = 0; 4973 } 4974 } while (offload_to_mirror != *current_group); 4975 } 4976 4977 /* 4978 * Attempt to perform offload RAID mapping for a logical volume I/O. 4979 */ 4980 static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h, 4981 struct CommandList *c) 4982 { 4983 struct scsi_cmnd *cmd = c->scsi_cmd; 4984 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4985 struct raid_map_data *map = &dev->raid_map; 4986 struct raid_map_disk_data *dd = &map->data[0]; 4987 int is_write = 0; 4988 u32 map_index; 4989 u64 first_block, last_block; 4990 u32 block_cnt; 4991 u32 blocks_per_row; 4992 u64 first_row, last_row; 4993 u32 first_row_offset, last_row_offset; 4994 u32 first_column, last_column; 4995 u64 r0_first_row, r0_last_row; 4996 u32 r5or6_blocks_per_row; 4997 u64 r5or6_first_row, r5or6_last_row; 4998 u32 r5or6_first_row_offset, r5or6_last_row_offset; 4999 u32 r5or6_first_column, r5or6_last_column; 5000 u32 total_disks_per_row; 5001 u32 stripesize; 5002 u32 first_group, last_group, current_group; 5003 u32 map_row; 5004 u32 disk_handle; 5005 u64 disk_block; 5006 u32 disk_block_cnt; 5007 u8 cdb[16]; 5008 u8 cdb_len; 5009 u16 strip_size; 5010 #if BITS_PER_LONG == 32 5011 u64 tmpdiv; 5012 #endif 5013 int offload_to_mirror; 5014 5015 if (!dev) 5016 return -1; 5017 5018 /* check for valid opcode, get LBA and block count */ 5019 switch (cmd->cmnd[0]) { 5020 case WRITE_6: 5021 is_write = 1; 5022 case READ_6: 5023 first_block = (((cmd->cmnd[1] & 0x1F) << 16) | 5024 (cmd->cmnd[2] << 8) | 5025 cmd->cmnd[3]); 5026 block_cnt = cmd->cmnd[4]; 5027 if (block_cnt == 0) 5028 block_cnt = 256; 5029 break; 5030 case WRITE_10: 5031 is_write = 1; 5032 case READ_10: 5033 first_block = 5034 (((u64) cmd->cmnd[2]) << 24) | 5035 (((u64) cmd->cmnd[3]) << 16) | 5036 (((u64) cmd->cmnd[4]) << 8) | 5037 cmd->cmnd[5]; 5038 block_cnt = 5039 (((u32) cmd->cmnd[7]) << 8) | 5040 cmd->cmnd[8]; 5041 break; 5042 case WRITE_12: 5043 is_write = 1; 5044 case READ_12: 5045 first_block = 5046 (((u64) cmd->cmnd[2]) << 24) | 5047 (((u64) cmd->cmnd[3]) << 16) | 5048 (((u64) cmd->cmnd[4]) << 8) | 5049 cmd->cmnd[5]; 5050 block_cnt = 5051 (((u32) cmd->cmnd[6]) << 24) | 5052 (((u32) cmd->cmnd[7]) << 16) | 5053 (((u32) cmd->cmnd[8]) << 8) | 5054 cmd->cmnd[9]; 5055 break; 5056 case WRITE_16: 5057 is_write = 1; 5058 case READ_16: 5059 first_block = 5060 (((u64) cmd->cmnd[2]) << 56) | 5061 (((u64) cmd->cmnd[3]) << 48) | 5062 (((u64) cmd->cmnd[4]) << 40) | 5063 (((u64) cmd->cmnd[5]) << 32) | 5064 (((u64) cmd->cmnd[6]) << 24) | 5065 (((u64) cmd->cmnd[7]) << 16) | 5066 (((u64) cmd->cmnd[8]) << 8) | 5067 cmd->cmnd[9]; 5068 block_cnt = 5069 (((u32) cmd->cmnd[10]) << 24) | 5070 (((u32) cmd->cmnd[11]) << 16) | 5071 (((u32) cmd->cmnd[12]) << 8) | 5072 cmd->cmnd[13]; 5073 break; 5074 default: 5075 return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */ 5076 } 5077 last_block = first_block + block_cnt - 1; 5078 5079 /* check for write to non-RAID-0 */ 5080 if (is_write && dev->raid_level != 0) 5081 return IO_ACCEL_INELIGIBLE; 5082 5083 /* check for invalid block or wraparound */ 5084 if (last_block >= le64_to_cpu(map->volume_blk_cnt) || 5085 last_block < first_block) 5086 return IO_ACCEL_INELIGIBLE; 5087 5088 /* calculate stripe information for the request */ 5089 blocks_per_row = le16_to_cpu(map->data_disks_per_row) * 5090 le16_to_cpu(map->strip_size); 5091 strip_size = le16_to_cpu(map->strip_size); 5092 #if BITS_PER_LONG == 32 5093 tmpdiv = first_block; 5094 (void) do_div(tmpdiv, blocks_per_row); 5095 first_row = tmpdiv; 5096 tmpdiv = last_block; 5097 (void) do_div(tmpdiv, blocks_per_row); 5098 last_row = tmpdiv; 5099 first_row_offset = (u32) (first_block - (first_row * blocks_per_row)); 5100 last_row_offset = (u32) (last_block - (last_row * blocks_per_row)); 5101 tmpdiv = first_row_offset; 5102 (void) do_div(tmpdiv, strip_size); 5103 first_column = tmpdiv; 5104 tmpdiv = last_row_offset; 5105 (void) do_div(tmpdiv, strip_size); 5106 last_column = tmpdiv; 5107 #else 5108 first_row = first_block / blocks_per_row; 5109 last_row = last_block / blocks_per_row; 5110 first_row_offset = (u32) (first_block - (first_row * blocks_per_row)); 5111 last_row_offset = (u32) (last_block - (last_row * blocks_per_row)); 5112 first_column = first_row_offset / strip_size; 5113 last_column = last_row_offset / strip_size; 5114 #endif 5115 5116 /* if this isn't a single row/column then give to the controller */ 5117 if ((first_row != last_row) || (first_column != last_column)) 5118 return IO_ACCEL_INELIGIBLE; 5119 5120 /* proceeding with driver mapping */ 5121 total_disks_per_row = le16_to_cpu(map->data_disks_per_row) + 5122 le16_to_cpu(map->metadata_disks_per_row); 5123 map_row = ((u32)(first_row >> map->parity_rotation_shift)) % 5124 le16_to_cpu(map->row_cnt); 5125 map_index = (map_row * total_disks_per_row) + first_column; 5126 5127 switch (dev->raid_level) { 5128 case HPSA_RAID_0: 5129 break; /* nothing special to do */ 5130 case HPSA_RAID_1: 5131 /* Handles load balance across RAID 1 members. 5132 * (2-drive R1 and R10 with even # of drives.) 5133 * Appropriate for SSDs, not optimal for HDDs 5134 */ 5135 BUG_ON(le16_to_cpu(map->layout_map_count) != 2); 5136 if (dev->offload_to_mirror) 5137 map_index += le16_to_cpu(map->data_disks_per_row); 5138 dev->offload_to_mirror = !dev->offload_to_mirror; 5139 break; 5140 case HPSA_RAID_ADM: 5141 /* Handles N-way mirrors (R1-ADM) 5142 * and R10 with # of drives divisible by 3.) 5143 */ 5144 BUG_ON(le16_to_cpu(map->layout_map_count) != 3); 5145 5146 offload_to_mirror = dev->offload_to_mirror; 5147 raid_map_helper(map, offload_to_mirror, 5148 &map_index, ¤t_group); 5149 /* set mirror group to use next time */ 5150 offload_to_mirror = 5151 (offload_to_mirror >= 5152 le16_to_cpu(map->layout_map_count) - 1) 5153 ? 0 : offload_to_mirror + 1; 5154 dev->offload_to_mirror = offload_to_mirror; 5155 /* Avoid direct use of dev->offload_to_mirror within this 5156 * function since multiple threads might simultaneously 5157 * increment it beyond the range of dev->layout_map_count -1. 5158 */ 5159 break; 5160 case HPSA_RAID_5: 5161 case HPSA_RAID_6: 5162 if (le16_to_cpu(map->layout_map_count) <= 1) 5163 break; 5164 5165 /* Verify first and last block are in same RAID group */ 5166 r5or6_blocks_per_row = 5167 le16_to_cpu(map->strip_size) * 5168 le16_to_cpu(map->data_disks_per_row); 5169 BUG_ON(r5or6_blocks_per_row == 0); 5170 stripesize = r5or6_blocks_per_row * 5171 le16_to_cpu(map->layout_map_count); 5172 #if BITS_PER_LONG == 32 5173 tmpdiv = first_block; 5174 first_group = do_div(tmpdiv, stripesize); 5175 tmpdiv = first_group; 5176 (void) do_div(tmpdiv, r5or6_blocks_per_row); 5177 first_group = tmpdiv; 5178 tmpdiv = last_block; 5179 last_group = do_div(tmpdiv, stripesize); 5180 tmpdiv = last_group; 5181 (void) do_div(tmpdiv, r5or6_blocks_per_row); 5182 last_group = tmpdiv; 5183 #else 5184 first_group = (first_block % stripesize) / r5or6_blocks_per_row; 5185 last_group = (last_block % stripesize) / r5or6_blocks_per_row; 5186 #endif 5187 if (first_group != last_group) 5188 return IO_ACCEL_INELIGIBLE; 5189 5190 /* Verify request is in a single row of RAID 5/6 */ 5191 #if BITS_PER_LONG == 32 5192 tmpdiv = first_block; 5193 (void) do_div(tmpdiv, stripesize); 5194 first_row = r5or6_first_row = r0_first_row = tmpdiv; 5195 tmpdiv = last_block; 5196 (void) do_div(tmpdiv, stripesize); 5197 r5or6_last_row = r0_last_row = tmpdiv; 5198 #else 5199 first_row = r5or6_first_row = r0_first_row = 5200 first_block / stripesize; 5201 r5or6_last_row = r0_last_row = last_block / stripesize; 5202 #endif 5203 if (r5or6_first_row != r5or6_last_row) 5204 return IO_ACCEL_INELIGIBLE; 5205 5206 5207 /* Verify request is in a single column */ 5208 #if BITS_PER_LONG == 32 5209 tmpdiv = first_block; 5210 first_row_offset = do_div(tmpdiv, stripesize); 5211 tmpdiv = first_row_offset; 5212 first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row); 5213 r5or6_first_row_offset = first_row_offset; 5214 tmpdiv = last_block; 5215 r5or6_last_row_offset = do_div(tmpdiv, stripesize); 5216 tmpdiv = r5or6_last_row_offset; 5217 r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row); 5218 tmpdiv = r5or6_first_row_offset; 5219 (void) do_div(tmpdiv, map->strip_size); 5220 first_column = r5or6_first_column = tmpdiv; 5221 tmpdiv = r5or6_last_row_offset; 5222 (void) do_div(tmpdiv, map->strip_size); 5223 r5or6_last_column = tmpdiv; 5224 #else 5225 first_row_offset = r5or6_first_row_offset = 5226 (u32)((first_block % stripesize) % 5227 r5or6_blocks_per_row); 5228 5229 r5or6_last_row_offset = 5230 (u32)((last_block % stripesize) % 5231 r5or6_blocks_per_row); 5232 5233 first_column = r5or6_first_column = 5234 r5or6_first_row_offset / le16_to_cpu(map->strip_size); 5235 r5or6_last_column = 5236 r5or6_last_row_offset / le16_to_cpu(map->strip_size); 5237 #endif 5238 if (r5or6_first_column != r5or6_last_column) 5239 return IO_ACCEL_INELIGIBLE; 5240 5241 /* Request is eligible */ 5242 map_row = ((u32)(first_row >> map->parity_rotation_shift)) % 5243 le16_to_cpu(map->row_cnt); 5244 5245 map_index = (first_group * 5246 (le16_to_cpu(map->row_cnt) * total_disks_per_row)) + 5247 (map_row * total_disks_per_row) + first_column; 5248 break; 5249 default: 5250 return IO_ACCEL_INELIGIBLE; 5251 } 5252 5253 if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES)) 5254 return IO_ACCEL_INELIGIBLE; 5255 5256 c->phys_disk = dev->phys_disk[map_index]; 5257 if (!c->phys_disk) 5258 return IO_ACCEL_INELIGIBLE; 5259 5260 disk_handle = dd[map_index].ioaccel_handle; 5261 disk_block = le64_to_cpu(map->disk_starting_blk) + 5262 first_row * le16_to_cpu(map->strip_size) + 5263 (first_row_offset - first_column * 5264 le16_to_cpu(map->strip_size)); 5265 disk_block_cnt = block_cnt; 5266 5267 /* handle differing logical/physical block sizes */ 5268 if (map->phys_blk_shift) { 5269 disk_block <<= map->phys_blk_shift; 5270 disk_block_cnt <<= map->phys_blk_shift; 5271 } 5272 BUG_ON(disk_block_cnt > 0xffff); 5273 5274 /* build the new CDB for the physical disk I/O */ 5275 if (disk_block > 0xffffffff) { 5276 cdb[0] = is_write ? WRITE_16 : READ_16; 5277 cdb[1] = 0; 5278 cdb[2] = (u8) (disk_block >> 56); 5279 cdb[3] = (u8) (disk_block >> 48); 5280 cdb[4] = (u8) (disk_block >> 40); 5281 cdb[5] = (u8) (disk_block >> 32); 5282 cdb[6] = (u8) (disk_block >> 24); 5283 cdb[7] = (u8) (disk_block >> 16); 5284 cdb[8] = (u8) (disk_block >> 8); 5285 cdb[9] = (u8) (disk_block); 5286 cdb[10] = (u8) (disk_block_cnt >> 24); 5287 cdb[11] = (u8) (disk_block_cnt >> 16); 5288 cdb[12] = (u8) (disk_block_cnt >> 8); 5289 cdb[13] = (u8) (disk_block_cnt); 5290 cdb[14] = 0; 5291 cdb[15] = 0; 5292 cdb_len = 16; 5293 } else { 5294 cdb[0] = is_write ? WRITE_10 : READ_10; 5295 cdb[1] = 0; 5296 cdb[2] = (u8) (disk_block >> 24); 5297 cdb[3] = (u8) (disk_block >> 16); 5298 cdb[4] = (u8) (disk_block >> 8); 5299 cdb[5] = (u8) (disk_block); 5300 cdb[6] = 0; 5301 cdb[7] = (u8) (disk_block_cnt >> 8); 5302 cdb[8] = (u8) (disk_block_cnt); 5303 cdb[9] = 0; 5304 cdb_len = 10; 5305 } 5306 return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len, 5307 dev->scsi3addr, 5308 dev->phys_disk[map_index]); 5309 } 5310 5311 /* 5312 * Submit commands down the "normal" RAID stack path 5313 * All callers to hpsa_ciss_submit must check lockup_detected 5314 * beforehand, before (opt.) and after calling cmd_alloc 5315 */ 5316 static int hpsa_ciss_submit(struct ctlr_info *h, 5317 struct CommandList *c, struct scsi_cmnd *cmd, 5318 unsigned char scsi3addr[]) 5319 { 5320 cmd->host_scribble = (unsigned char *) c; 5321 c->cmd_type = CMD_SCSI; 5322 c->scsi_cmd = cmd; 5323 c->Header.ReplyQueue = 0; /* unused in simple mode */ 5324 memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8); 5325 c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT)); 5326 5327 /* Fill in the request block... */ 5328 5329 c->Request.Timeout = 0; 5330 BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB)); 5331 c->Request.CDBLen = cmd->cmd_len; 5332 memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len); 5333 switch (cmd->sc_data_direction) { 5334 case DMA_TO_DEVICE: 5335 c->Request.type_attr_dir = 5336 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE); 5337 break; 5338 case DMA_FROM_DEVICE: 5339 c->Request.type_attr_dir = 5340 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ); 5341 break; 5342 case DMA_NONE: 5343 c->Request.type_attr_dir = 5344 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE); 5345 break; 5346 case DMA_BIDIRECTIONAL: 5347 /* This can happen if a buggy application does a scsi passthru 5348 * and sets both inlen and outlen to non-zero. ( see 5349 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() ) 5350 */ 5351 5352 c->Request.type_attr_dir = 5353 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD); 5354 /* This is technically wrong, and hpsa controllers should 5355 * reject it with CMD_INVALID, which is the most correct 5356 * response, but non-fibre backends appear to let it 5357 * slide by, and give the same results as if this field 5358 * were set correctly. Either way is acceptable for 5359 * our purposes here. 5360 */ 5361 5362 break; 5363 5364 default: 5365 dev_err(&h->pdev->dev, "unknown data direction: %d\n", 5366 cmd->sc_data_direction); 5367 BUG(); 5368 break; 5369 } 5370 5371 if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */ 5372 hpsa_cmd_resolve_and_free(h, c); 5373 return SCSI_MLQUEUE_HOST_BUSY; 5374 } 5375 enqueue_cmd_and_start_io(h, c); 5376 /* the cmd'll come back via intr handler in complete_scsi_command() */ 5377 return 0; 5378 } 5379 5380 static void hpsa_cmd_init(struct ctlr_info *h, int index, 5381 struct CommandList *c) 5382 { 5383 dma_addr_t cmd_dma_handle, err_dma_handle; 5384 5385 /* Zero out all of commandlist except the last field, refcount */ 5386 memset(c, 0, offsetof(struct CommandList, refcount)); 5387 c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT)); 5388 cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c); 5389 c->err_info = h->errinfo_pool + index; 5390 memset(c->err_info, 0, sizeof(*c->err_info)); 5391 err_dma_handle = h->errinfo_pool_dhandle 5392 + index * sizeof(*c->err_info); 5393 c->cmdindex = index; 5394 c->busaddr = (u32) cmd_dma_handle; 5395 c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle); 5396 c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info)); 5397 c->h = h; 5398 c->scsi_cmd = SCSI_CMD_IDLE; 5399 } 5400 5401 static void hpsa_preinitialize_commands(struct ctlr_info *h) 5402 { 5403 int i; 5404 5405 for (i = 0; i < h->nr_cmds; i++) { 5406 struct CommandList *c = h->cmd_pool + i; 5407 5408 hpsa_cmd_init(h, i, c); 5409 atomic_set(&c->refcount, 0); 5410 } 5411 } 5412 5413 static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index, 5414 struct CommandList *c) 5415 { 5416 dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c); 5417 5418 BUG_ON(c->cmdindex != index); 5419 5420 memset(c->Request.CDB, 0, sizeof(c->Request.CDB)); 5421 memset(c->err_info, 0, sizeof(*c->err_info)); 5422 c->busaddr = (u32) cmd_dma_handle; 5423 } 5424 5425 static int hpsa_ioaccel_submit(struct ctlr_info *h, 5426 struct CommandList *c, struct scsi_cmnd *cmd, 5427 unsigned char *scsi3addr) 5428 { 5429 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 5430 int rc = IO_ACCEL_INELIGIBLE; 5431 5432 if (!dev) 5433 return SCSI_MLQUEUE_HOST_BUSY; 5434 5435 cmd->host_scribble = (unsigned char *) c; 5436 5437 if (dev->offload_enabled) { 5438 hpsa_cmd_init(h, c->cmdindex, c); 5439 c->cmd_type = CMD_SCSI; 5440 c->scsi_cmd = cmd; 5441 rc = hpsa_scsi_ioaccel_raid_map(h, c); 5442 if (rc < 0) /* scsi_dma_map failed. */ 5443 rc = SCSI_MLQUEUE_HOST_BUSY; 5444 } else if (dev->hba_ioaccel_enabled) { 5445 hpsa_cmd_init(h, c->cmdindex, c); 5446 c->cmd_type = CMD_SCSI; 5447 c->scsi_cmd = cmd; 5448 rc = hpsa_scsi_ioaccel_direct_map(h, c); 5449 if (rc < 0) /* scsi_dma_map failed. */ 5450 rc = SCSI_MLQUEUE_HOST_BUSY; 5451 } 5452 return rc; 5453 } 5454 5455 static void hpsa_command_resubmit_worker(struct work_struct *work) 5456 { 5457 struct scsi_cmnd *cmd; 5458 struct hpsa_scsi_dev_t *dev; 5459 struct CommandList *c = container_of(work, struct CommandList, work); 5460 5461 cmd = c->scsi_cmd; 5462 dev = cmd->device->hostdata; 5463 if (!dev) { 5464 cmd->result = DID_NO_CONNECT << 16; 5465 return hpsa_cmd_free_and_done(c->h, c, cmd); 5466 } 5467 if (c->reset_pending) 5468 return hpsa_cmd_free_and_done(c->h, c, cmd); 5469 if (c->abort_pending) 5470 return hpsa_cmd_abort_and_free(c->h, c, cmd); 5471 if (c->cmd_type == CMD_IOACCEL2) { 5472 struct ctlr_info *h = c->h; 5473 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 5474 int rc; 5475 5476 if (c2->error_data.serv_response == 5477 IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL) { 5478 rc = hpsa_ioaccel_submit(h, c, cmd, dev->scsi3addr); 5479 if (rc == 0) 5480 return; 5481 if (rc == SCSI_MLQUEUE_HOST_BUSY) { 5482 /* 5483 * If we get here, it means dma mapping failed. 5484 * Try again via scsi mid layer, which will 5485 * then get SCSI_MLQUEUE_HOST_BUSY. 5486 */ 5487 cmd->result = DID_IMM_RETRY << 16; 5488 return hpsa_cmd_free_and_done(h, c, cmd); 5489 } 5490 /* else, fall thru and resubmit down CISS path */ 5491 } 5492 } 5493 hpsa_cmd_partial_init(c->h, c->cmdindex, c); 5494 if (hpsa_ciss_submit(c->h, c, cmd, dev->scsi3addr)) { 5495 /* 5496 * If we get here, it means dma mapping failed. Try 5497 * again via scsi mid layer, which will then get 5498 * SCSI_MLQUEUE_HOST_BUSY. 5499 * 5500 * hpsa_ciss_submit will have already freed c 5501 * if it encountered a dma mapping failure. 5502 */ 5503 cmd->result = DID_IMM_RETRY << 16; 5504 cmd->scsi_done(cmd); 5505 } 5506 } 5507 5508 /* Running in struct Scsi_Host->host_lock less mode */ 5509 static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd) 5510 { 5511 struct ctlr_info *h; 5512 struct hpsa_scsi_dev_t *dev; 5513 unsigned char scsi3addr[8]; 5514 struct CommandList *c; 5515 int rc = 0; 5516 5517 /* Get the ptr to our adapter structure out of cmd->host. */ 5518 h = sdev_to_hba(cmd->device); 5519 5520 BUG_ON(cmd->request->tag < 0); 5521 5522 dev = cmd->device->hostdata; 5523 if (!dev) { 5524 cmd->result = DID_NO_CONNECT << 16; 5525 cmd->scsi_done(cmd); 5526 return 0; 5527 } 5528 5529 if (dev->removed) { 5530 cmd->result = DID_NO_CONNECT << 16; 5531 cmd->scsi_done(cmd); 5532 return 0; 5533 } 5534 5535 memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr)); 5536 5537 if (unlikely(lockup_detected(h))) { 5538 cmd->result = DID_NO_CONNECT << 16; 5539 cmd->scsi_done(cmd); 5540 return 0; 5541 } 5542 c = cmd_tagged_alloc(h, cmd); 5543 5544 /* 5545 * Call alternate submit routine for I/O accelerated commands. 5546 * Retries always go down the normal I/O path. 5547 */ 5548 if (likely(cmd->retries == 0 && 5549 !blk_rq_is_passthrough(cmd->request) && 5550 h->acciopath_status)) { 5551 rc = hpsa_ioaccel_submit(h, c, cmd, scsi3addr); 5552 if (rc == 0) 5553 return 0; 5554 if (rc == SCSI_MLQUEUE_HOST_BUSY) { 5555 hpsa_cmd_resolve_and_free(h, c); 5556 return SCSI_MLQUEUE_HOST_BUSY; 5557 } 5558 } 5559 return hpsa_ciss_submit(h, c, cmd, scsi3addr); 5560 } 5561 5562 static void hpsa_scan_complete(struct ctlr_info *h) 5563 { 5564 unsigned long flags; 5565 5566 spin_lock_irqsave(&h->scan_lock, flags); 5567 h->scan_finished = 1; 5568 wake_up(&h->scan_wait_queue); 5569 spin_unlock_irqrestore(&h->scan_lock, flags); 5570 } 5571 5572 static void hpsa_scan_start(struct Scsi_Host *sh) 5573 { 5574 struct ctlr_info *h = shost_to_hba(sh); 5575 unsigned long flags; 5576 5577 /* 5578 * Don't let rescans be initiated on a controller known to be locked 5579 * up. If the controller locks up *during* a rescan, that thread is 5580 * probably hosed, but at least we can prevent new rescan threads from 5581 * piling up on a locked up controller. 5582 */ 5583 if (unlikely(lockup_detected(h))) 5584 return hpsa_scan_complete(h); 5585 5586 /* 5587 * If a scan is already waiting to run, no need to add another 5588 */ 5589 spin_lock_irqsave(&h->scan_lock, flags); 5590 if (h->scan_waiting) { 5591 spin_unlock_irqrestore(&h->scan_lock, flags); 5592 return; 5593 } 5594 5595 spin_unlock_irqrestore(&h->scan_lock, flags); 5596 5597 /* wait until any scan already in progress is finished. */ 5598 while (1) { 5599 spin_lock_irqsave(&h->scan_lock, flags); 5600 if (h->scan_finished) 5601 break; 5602 h->scan_waiting = 1; 5603 spin_unlock_irqrestore(&h->scan_lock, flags); 5604 wait_event(h->scan_wait_queue, h->scan_finished); 5605 /* Note: We don't need to worry about a race between this 5606 * thread and driver unload because the midlayer will 5607 * have incremented the reference count, so unload won't 5608 * happen if we're in here. 5609 */ 5610 } 5611 h->scan_finished = 0; /* mark scan as in progress */ 5612 h->scan_waiting = 0; 5613 spin_unlock_irqrestore(&h->scan_lock, flags); 5614 5615 if (unlikely(lockup_detected(h))) 5616 return hpsa_scan_complete(h); 5617 5618 /* 5619 * Do the scan after a reset completion 5620 */ 5621 if (h->reset_in_progress) { 5622 h->drv_req_rescan = 1; 5623 hpsa_scan_complete(h); 5624 return; 5625 } 5626 5627 hpsa_update_scsi_devices(h); 5628 5629 hpsa_scan_complete(h); 5630 } 5631 5632 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth) 5633 { 5634 struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata; 5635 5636 if (!logical_drive) 5637 return -ENODEV; 5638 5639 if (qdepth < 1) 5640 qdepth = 1; 5641 else if (qdepth > logical_drive->queue_depth) 5642 qdepth = logical_drive->queue_depth; 5643 5644 return scsi_change_queue_depth(sdev, qdepth); 5645 } 5646 5647 static int hpsa_scan_finished(struct Scsi_Host *sh, 5648 unsigned long elapsed_time) 5649 { 5650 struct ctlr_info *h = shost_to_hba(sh); 5651 unsigned long flags; 5652 int finished; 5653 5654 spin_lock_irqsave(&h->scan_lock, flags); 5655 finished = h->scan_finished; 5656 spin_unlock_irqrestore(&h->scan_lock, flags); 5657 return finished; 5658 } 5659 5660 static int hpsa_scsi_host_alloc(struct ctlr_info *h) 5661 { 5662 struct Scsi_Host *sh; 5663 5664 sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h)); 5665 if (sh == NULL) { 5666 dev_err(&h->pdev->dev, "scsi_host_alloc failed\n"); 5667 return -ENOMEM; 5668 } 5669 5670 sh->io_port = 0; 5671 sh->n_io_port = 0; 5672 sh->this_id = -1; 5673 sh->max_channel = 3; 5674 sh->max_cmd_len = MAX_COMMAND_SIZE; 5675 sh->max_lun = HPSA_MAX_LUN; 5676 sh->max_id = HPSA_MAX_LUN; 5677 sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS; 5678 sh->cmd_per_lun = sh->can_queue; 5679 sh->sg_tablesize = h->maxsgentries; 5680 sh->transportt = hpsa_sas_transport_template; 5681 sh->hostdata[0] = (unsigned long) h; 5682 sh->irq = pci_irq_vector(h->pdev, 0); 5683 sh->unique_id = sh->irq; 5684 5685 h->scsi_host = sh; 5686 return 0; 5687 } 5688 5689 static int hpsa_scsi_add_host(struct ctlr_info *h) 5690 { 5691 int rv; 5692 5693 rv = scsi_add_host(h->scsi_host, &h->pdev->dev); 5694 if (rv) { 5695 dev_err(&h->pdev->dev, "scsi_add_host failed\n"); 5696 return rv; 5697 } 5698 scsi_scan_host(h->scsi_host); 5699 return 0; 5700 } 5701 5702 /* 5703 * The block layer has already gone to the trouble of picking out a unique, 5704 * small-integer tag for this request. We use an offset from that value as 5705 * an index to select our command block. (The offset allows us to reserve the 5706 * low-numbered entries for our own uses.) 5707 */ 5708 static int hpsa_get_cmd_index(struct scsi_cmnd *scmd) 5709 { 5710 int idx = scmd->request->tag; 5711 5712 if (idx < 0) 5713 return idx; 5714 5715 /* Offset to leave space for internal cmds. */ 5716 return idx += HPSA_NRESERVED_CMDS; 5717 } 5718 5719 /* 5720 * Send a TEST_UNIT_READY command to the specified LUN using the specified 5721 * reply queue; returns zero if the unit is ready, and non-zero otherwise. 5722 */ 5723 static int hpsa_send_test_unit_ready(struct ctlr_info *h, 5724 struct CommandList *c, unsigned char lunaddr[], 5725 int reply_queue) 5726 { 5727 int rc; 5728 5729 /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */ 5730 (void) fill_cmd(c, TEST_UNIT_READY, h, 5731 NULL, 0, 0, lunaddr, TYPE_CMD); 5732 rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 5733 if (rc) 5734 return rc; 5735 /* no unmap needed here because no data xfer. */ 5736 5737 /* Check if the unit is already ready. */ 5738 if (c->err_info->CommandStatus == CMD_SUCCESS) 5739 return 0; 5740 5741 /* 5742 * The first command sent after reset will receive "unit attention" to 5743 * indicate that the LUN has been reset...this is actually what we're 5744 * looking for (but, success is good too). 5745 */ 5746 if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 5747 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION && 5748 (c->err_info->SenseInfo[2] == NO_SENSE || 5749 c->err_info->SenseInfo[2] == UNIT_ATTENTION)) 5750 return 0; 5751 5752 return 1; 5753 } 5754 5755 /* 5756 * Wait for a TEST_UNIT_READY command to complete, retrying as necessary; 5757 * returns zero when the unit is ready, and non-zero when giving up. 5758 */ 5759 static int hpsa_wait_for_test_unit_ready(struct ctlr_info *h, 5760 struct CommandList *c, 5761 unsigned char lunaddr[], int reply_queue) 5762 { 5763 int rc; 5764 int count = 0; 5765 int waittime = 1; /* seconds */ 5766 5767 /* Send test unit ready until device ready, or give up. */ 5768 for (count = 0; count < HPSA_TUR_RETRY_LIMIT; count++) { 5769 5770 /* 5771 * Wait for a bit. do this first, because if we send 5772 * the TUR right away, the reset will just abort it. 5773 */ 5774 msleep(1000 * waittime); 5775 5776 rc = hpsa_send_test_unit_ready(h, c, lunaddr, reply_queue); 5777 if (!rc) 5778 break; 5779 5780 /* Increase wait time with each try, up to a point. */ 5781 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS) 5782 waittime *= 2; 5783 5784 dev_warn(&h->pdev->dev, 5785 "waiting %d secs for device to become ready.\n", 5786 waittime); 5787 } 5788 5789 return rc; 5790 } 5791 5792 static int wait_for_device_to_become_ready(struct ctlr_info *h, 5793 unsigned char lunaddr[], 5794 int reply_queue) 5795 { 5796 int first_queue; 5797 int last_queue; 5798 int rq; 5799 int rc = 0; 5800 struct CommandList *c; 5801 5802 c = cmd_alloc(h); 5803 5804 /* 5805 * If no specific reply queue was requested, then send the TUR 5806 * repeatedly, requesting a reply on each reply queue; otherwise execute 5807 * the loop exactly once using only the specified queue. 5808 */ 5809 if (reply_queue == DEFAULT_REPLY_QUEUE) { 5810 first_queue = 0; 5811 last_queue = h->nreply_queues - 1; 5812 } else { 5813 first_queue = reply_queue; 5814 last_queue = reply_queue; 5815 } 5816 5817 for (rq = first_queue; rq <= last_queue; rq++) { 5818 rc = hpsa_wait_for_test_unit_ready(h, c, lunaddr, rq); 5819 if (rc) 5820 break; 5821 } 5822 5823 if (rc) 5824 dev_warn(&h->pdev->dev, "giving up on device.\n"); 5825 else 5826 dev_warn(&h->pdev->dev, "device is ready.\n"); 5827 5828 cmd_free(h, c); 5829 return rc; 5830 } 5831 5832 /* Need at least one of these error handlers to keep ../scsi/hosts.c from 5833 * complaining. Doing a host- or bus-reset can't do anything good here. 5834 */ 5835 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd) 5836 { 5837 int rc; 5838 struct ctlr_info *h; 5839 struct hpsa_scsi_dev_t *dev; 5840 u8 reset_type; 5841 char msg[48]; 5842 5843 /* find the controller to which the command to be aborted was sent */ 5844 h = sdev_to_hba(scsicmd->device); 5845 if (h == NULL) /* paranoia */ 5846 return FAILED; 5847 5848 if (lockup_detected(h)) 5849 return FAILED; 5850 5851 dev = scsicmd->device->hostdata; 5852 if (!dev) { 5853 dev_err(&h->pdev->dev, "%s: device lookup failed\n", __func__); 5854 return FAILED; 5855 } 5856 5857 if (dev->devtype == TYPE_ENCLOSURE) 5858 return SUCCESS; 5859 5860 /* if controller locked up, we can guarantee command won't complete */ 5861 if (lockup_detected(h)) { 5862 snprintf(msg, sizeof(msg), 5863 "cmd %d RESET FAILED, lockup detected", 5864 hpsa_get_cmd_index(scsicmd)); 5865 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 5866 return FAILED; 5867 } 5868 5869 /* this reset request might be the result of a lockup; check */ 5870 if (detect_controller_lockup(h)) { 5871 snprintf(msg, sizeof(msg), 5872 "cmd %d RESET FAILED, new lockup detected", 5873 hpsa_get_cmd_index(scsicmd)); 5874 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 5875 return FAILED; 5876 } 5877 5878 /* Do not attempt on controller */ 5879 if (is_hba_lunid(dev->scsi3addr)) 5880 return SUCCESS; 5881 5882 if (is_logical_dev_addr_mode(dev->scsi3addr)) 5883 reset_type = HPSA_DEVICE_RESET_MSG; 5884 else 5885 reset_type = HPSA_PHYS_TARGET_RESET; 5886 5887 sprintf(msg, "resetting %s", 5888 reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical "); 5889 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 5890 5891 h->reset_in_progress = 1; 5892 5893 /* send a reset to the SCSI LUN which the command was sent to */ 5894 rc = hpsa_do_reset(h, dev, dev->scsi3addr, reset_type, 5895 DEFAULT_REPLY_QUEUE); 5896 sprintf(msg, "reset %s %s", 5897 reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ", 5898 rc == 0 ? "completed successfully" : "failed"); 5899 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 5900 h->reset_in_progress = 0; 5901 return rc == 0 ? SUCCESS : FAILED; 5902 } 5903 5904 static void swizzle_abort_tag(u8 *tag) 5905 { 5906 u8 original_tag[8]; 5907 5908 memcpy(original_tag, tag, 8); 5909 tag[0] = original_tag[3]; 5910 tag[1] = original_tag[2]; 5911 tag[2] = original_tag[1]; 5912 tag[3] = original_tag[0]; 5913 tag[4] = original_tag[7]; 5914 tag[5] = original_tag[6]; 5915 tag[6] = original_tag[5]; 5916 tag[7] = original_tag[4]; 5917 } 5918 5919 static void hpsa_get_tag(struct ctlr_info *h, 5920 struct CommandList *c, __le32 *taglower, __le32 *tagupper) 5921 { 5922 u64 tag; 5923 if (c->cmd_type == CMD_IOACCEL1) { 5924 struct io_accel1_cmd *cm1 = (struct io_accel1_cmd *) 5925 &h->ioaccel_cmd_pool[c->cmdindex]; 5926 tag = le64_to_cpu(cm1->tag); 5927 *tagupper = cpu_to_le32(tag >> 32); 5928 *taglower = cpu_to_le32(tag); 5929 return; 5930 } 5931 if (c->cmd_type == CMD_IOACCEL2) { 5932 struct io_accel2_cmd *cm2 = (struct io_accel2_cmd *) 5933 &h->ioaccel2_cmd_pool[c->cmdindex]; 5934 /* upper tag not used in ioaccel2 mode */ 5935 memset(tagupper, 0, sizeof(*tagupper)); 5936 *taglower = cm2->Tag; 5937 return; 5938 } 5939 tag = le64_to_cpu(c->Header.tag); 5940 *tagupper = cpu_to_le32(tag >> 32); 5941 *taglower = cpu_to_le32(tag); 5942 } 5943 5944 static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr, 5945 struct CommandList *abort, int reply_queue) 5946 { 5947 int rc = IO_OK; 5948 struct CommandList *c; 5949 struct ErrorInfo *ei; 5950 __le32 tagupper, taglower; 5951 5952 c = cmd_alloc(h); 5953 5954 /* fill_cmd can't fail here, no buffer to map */ 5955 (void) fill_cmd(c, HPSA_ABORT_MSG, h, &abort->Header.tag, 5956 0, 0, scsi3addr, TYPE_MSG); 5957 if (h->needs_abort_tags_swizzled) 5958 swizzle_abort_tag(&c->Request.CDB[4]); 5959 (void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 5960 hpsa_get_tag(h, abort, &taglower, &tagupper); 5961 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd(abort) completed.\n", 5962 __func__, tagupper, taglower); 5963 /* no unmap needed here because no data xfer. */ 5964 5965 ei = c->err_info; 5966 switch (ei->CommandStatus) { 5967 case CMD_SUCCESS: 5968 break; 5969 case CMD_TMF_STATUS: 5970 rc = hpsa_evaluate_tmf_status(h, c); 5971 break; 5972 case CMD_UNABORTABLE: /* Very common, don't make noise. */ 5973 rc = -1; 5974 break; 5975 default: 5976 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n", 5977 __func__, tagupper, taglower); 5978 hpsa_scsi_interpret_error(h, c); 5979 rc = -1; 5980 break; 5981 } 5982 cmd_free(h, c); 5983 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", 5984 __func__, tagupper, taglower); 5985 return rc; 5986 } 5987 5988 static void setup_ioaccel2_abort_cmd(struct CommandList *c, struct ctlr_info *h, 5989 struct CommandList *command_to_abort, int reply_queue) 5990 { 5991 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 5992 struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2; 5993 struct io_accel2_cmd *c2a = 5994 &h->ioaccel2_cmd_pool[command_to_abort->cmdindex]; 5995 struct scsi_cmnd *scmd = command_to_abort->scsi_cmd; 5996 struct hpsa_scsi_dev_t *dev = scmd->device->hostdata; 5997 5998 if (!dev) 5999 return; 6000 6001 /* 6002 * We're overlaying struct hpsa_tmf_struct on top of something which 6003 * was allocated as a struct io_accel2_cmd, so we better be sure it 6004 * actually fits, and doesn't overrun the error info space. 6005 */ 6006 BUILD_BUG_ON(sizeof(struct hpsa_tmf_struct) > 6007 sizeof(struct io_accel2_cmd)); 6008 BUG_ON(offsetof(struct io_accel2_cmd, error_data) < 6009 offsetof(struct hpsa_tmf_struct, error_len) + 6010 sizeof(ac->error_len)); 6011 6012 c->cmd_type = IOACCEL2_TMF; 6013 c->scsi_cmd = SCSI_CMD_BUSY; 6014 6015 /* Adjust the DMA address to point to the accelerated command buffer */ 6016 c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle + 6017 (c->cmdindex * sizeof(struct io_accel2_cmd)); 6018 BUG_ON(c->busaddr & 0x0000007F); 6019 6020 memset(ac, 0, sizeof(*c2)); /* yes this is correct */ 6021 ac->iu_type = IOACCEL2_IU_TMF_TYPE; 6022 ac->reply_queue = reply_queue; 6023 ac->tmf = IOACCEL2_TMF_ABORT; 6024 ac->it_nexus = cpu_to_le32(dev->ioaccel_handle); 6025 memset(ac->lun_id, 0, sizeof(ac->lun_id)); 6026 ac->tag = cpu_to_le64(c->cmdindex << DIRECT_LOOKUP_SHIFT); 6027 ac->abort_tag = cpu_to_le64(le32_to_cpu(c2a->Tag)); 6028 ac->error_ptr = cpu_to_le64(c->busaddr + 6029 offsetof(struct io_accel2_cmd, error_data)); 6030 ac->error_len = cpu_to_le32(sizeof(c2->error_data)); 6031 } 6032 6033 /* ioaccel2 path firmware cannot handle abort task requests. 6034 * Change abort requests to physical target reset, and send to the 6035 * address of the physical disk used for the ioaccel 2 command. 6036 * Return 0 on success (IO_OK) 6037 * -1 on failure 6038 */ 6039 6040 static int hpsa_send_reset_as_abort_ioaccel2(struct ctlr_info *h, 6041 unsigned char *scsi3addr, struct CommandList *abort, int reply_queue) 6042 { 6043 int rc = IO_OK; 6044 struct scsi_cmnd *scmd; /* scsi command within request being aborted */ 6045 struct hpsa_scsi_dev_t *dev; /* device to which scsi cmd was sent */ 6046 unsigned char phys_scsi3addr[8]; /* addr of phys disk with volume */ 6047 unsigned char *psa = &phys_scsi3addr[0]; 6048 6049 /* Get a pointer to the hpsa logical device. */ 6050 scmd = abort->scsi_cmd; 6051 dev = (struct hpsa_scsi_dev_t *)(scmd->device->hostdata); 6052 if (dev == NULL) { 6053 dev_warn(&h->pdev->dev, 6054 "Cannot abort: no device pointer for command.\n"); 6055 return -1; /* not abortable */ 6056 } 6057 6058 if (h->raid_offload_debug > 0) 6059 dev_info(&h->pdev->dev, 6060 "scsi %d:%d:%d:%d %s scsi3addr 0x%8phN\n", 6061 h->scsi_host->host_no, dev->bus, dev->target, dev->lun, 6062 "Reset as abort", scsi3addr); 6063 6064 if (!dev->offload_enabled) { 6065 dev_warn(&h->pdev->dev, 6066 "Can't abort: device is not operating in HP SSD Smart Path mode.\n"); 6067 return -1; /* not abortable */ 6068 } 6069 6070 /* Incoming scsi3addr is logical addr. We need physical disk addr. */ 6071 if (!hpsa_get_pdisk_of_ioaccel2(h, abort, psa)) { 6072 dev_warn(&h->pdev->dev, "Can't abort: Failed lookup of physical address.\n"); 6073 return -1; /* not abortable */ 6074 } 6075 6076 /* send the reset */ 6077 if (h->raid_offload_debug > 0) 6078 dev_info(&h->pdev->dev, 6079 "Reset as abort: Resetting physical device at scsi3addr 0x%8phN\n", 6080 psa); 6081 rc = hpsa_do_reset(h, dev, psa, HPSA_PHYS_TARGET_RESET, reply_queue); 6082 if (rc != 0) { 6083 dev_warn(&h->pdev->dev, 6084 "Reset as abort: Failed on physical device at scsi3addr 0x%8phN\n", 6085 psa); 6086 return rc; /* failed to reset */ 6087 } 6088 6089 /* wait for device to recover */ 6090 if (wait_for_device_to_become_ready(h, psa, reply_queue) != 0) { 6091 dev_warn(&h->pdev->dev, 6092 "Reset as abort: Failed: Device never recovered from reset: 0x%8phN\n", 6093 psa); 6094 return -1; /* failed to recover */ 6095 } 6096 6097 /* device recovered */ 6098 dev_info(&h->pdev->dev, 6099 "Reset as abort: Device recovered from reset: scsi3addr 0x%8phN\n", 6100 psa); 6101 6102 return rc; /* success */ 6103 } 6104 6105 static int hpsa_send_abort_ioaccel2(struct ctlr_info *h, 6106 struct CommandList *abort, int reply_queue) 6107 { 6108 int rc = IO_OK; 6109 struct CommandList *c; 6110 __le32 taglower, tagupper; 6111 struct hpsa_scsi_dev_t *dev; 6112 struct io_accel2_cmd *c2; 6113 6114 dev = abort->scsi_cmd->device->hostdata; 6115 if (!dev) 6116 return -1; 6117 6118 if (!dev->offload_enabled && !dev->hba_ioaccel_enabled) 6119 return -1; 6120 6121 c = cmd_alloc(h); 6122 setup_ioaccel2_abort_cmd(c, h, abort, reply_queue); 6123 c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 6124 (void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 6125 hpsa_get_tag(h, abort, &taglower, &tagupper); 6126 dev_dbg(&h->pdev->dev, 6127 "%s: Tag:0x%08x:%08x: do_simple_cmd(ioaccel2 abort) completed.\n", 6128 __func__, tagupper, taglower); 6129 /* no unmap needed here because no data xfer. */ 6130 6131 dev_dbg(&h->pdev->dev, 6132 "%s: Tag:0x%08x:%08x: abort service response = 0x%02x.\n", 6133 __func__, tagupper, taglower, c2->error_data.serv_response); 6134 switch (c2->error_data.serv_response) { 6135 case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE: 6136 case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS: 6137 rc = 0; 6138 break; 6139 case IOACCEL2_SERV_RESPONSE_TMF_REJECTED: 6140 case IOACCEL2_SERV_RESPONSE_FAILURE: 6141 case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN: 6142 rc = -1; 6143 break; 6144 default: 6145 dev_warn(&h->pdev->dev, 6146 "%s: Tag:0x%08x:%08x: unknown abort service response 0x%02x\n", 6147 __func__, tagupper, taglower, 6148 c2->error_data.serv_response); 6149 rc = -1; 6150 } 6151 cmd_free(h, c); 6152 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", __func__, 6153 tagupper, taglower); 6154 return rc; 6155 } 6156 6157 static int hpsa_send_abort_both_ways(struct ctlr_info *h, 6158 struct hpsa_scsi_dev_t *dev, struct CommandList *abort, int reply_queue) 6159 { 6160 /* 6161 * ioccelerator mode 2 commands should be aborted via the 6162 * accelerated path, since RAID path is unaware of these commands, 6163 * but not all underlying firmware can handle abort TMF. 6164 * Change abort to physical device reset when abort TMF is unsupported. 6165 */ 6166 if (abort->cmd_type == CMD_IOACCEL2) { 6167 if ((HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags) || 6168 dev->physical_device) 6169 return hpsa_send_abort_ioaccel2(h, abort, 6170 reply_queue); 6171 else 6172 return hpsa_send_reset_as_abort_ioaccel2(h, 6173 dev->scsi3addr, 6174 abort, reply_queue); 6175 } 6176 return hpsa_send_abort(h, dev->scsi3addr, abort, reply_queue); 6177 } 6178 6179 /* Find out which reply queue a command was meant to return on */ 6180 static int hpsa_extract_reply_queue(struct ctlr_info *h, 6181 struct CommandList *c) 6182 { 6183 if (c->cmd_type == CMD_IOACCEL2) 6184 return h->ioaccel2_cmd_pool[c->cmdindex].reply_queue; 6185 return c->Header.ReplyQueue; 6186 } 6187 6188 /* 6189 * Limit concurrency of abort commands to prevent 6190 * over-subscription of commands 6191 */ 6192 static inline int wait_for_available_abort_cmd(struct ctlr_info *h) 6193 { 6194 #define ABORT_CMD_WAIT_MSECS 5000 6195 return !wait_event_timeout(h->abort_cmd_wait_queue, 6196 atomic_dec_if_positive(&h->abort_cmds_available) >= 0, 6197 msecs_to_jiffies(ABORT_CMD_WAIT_MSECS)); 6198 } 6199 6200 /* Send an abort for the specified command. 6201 * If the device and controller support it, 6202 * send a task abort request. 6203 */ 6204 static int hpsa_eh_abort_handler(struct scsi_cmnd *sc) 6205 { 6206 6207 int rc; 6208 struct ctlr_info *h; 6209 struct hpsa_scsi_dev_t *dev; 6210 struct CommandList *abort; /* pointer to command to be aborted */ 6211 struct scsi_cmnd *as; /* ptr to scsi cmd inside aborted command. */ 6212 char msg[256]; /* For debug messaging. */ 6213 int ml = 0; 6214 __le32 tagupper, taglower; 6215 int refcount, reply_queue; 6216 6217 if (sc == NULL) 6218 return FAILED; 6219 6220 if (sc->device == NULL) 6221 return FAILED; 6222 6223 /* Find the controller of the command to be aborted */ 6224 h = sdev_to_hba(sc->device); 6225 if (h == NULL) 6226 return FAILED; 6227 6228 /* Find the device of the command to be aborted */ 6229 dev = sc->device->hostdata; 6230 if (!dev) { 6231 dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n", 6232 msg); 6233 return FAILED; 6234 } 6235 6236 /* If controller locked up, we can guarantee command won't complete */ 6237 if (lockup_detected(h)) { 6238 hpsa_show_dev_msg(KERN_WARNING, h, dev, 6239 "ABORT FAILED, lockup detected"); 6240 return FAILED; 6241 } 6242 6243 /* This is a good time to check if controller lockup has occurred */ 6244 if (detect_controller_lockup(h)) { 6245 hpsa_show_dev_msg(KERN_WARNING, h, dev, 6246 "ABORT FAILED, new lockup detected"); 6247 return FAILED; 6248 } 6249 6250 /* Check that controller supports some kind of task abort */ 6251 if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) && 6252 !(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags)) 6253 return FAILED; 6254 6255 memset(msg, 0, sizeof(msg)); 6256 ml += sprintf(msg+ml, "scsi %d:%d:%d:%llu %s %p", 6257 h->scsi_host->host_no, sc->device->channel, 6258 sc->device->id, sc->device->lun, 6259 "Aborting command", sc); 6260 6261 /* Get SCSI command to be aborted */ 6262 abort = (struct CommandList *) sc->host_scribble; 6263 if (abort == NULL) { 6264 /* This can happen if the command already completed. */ 6265 return SUCCESS; 6266 } 6267 refcount = atomic_inc_return(&abort->refcount); 6268 if (refcount == 1) { /* Command is done already. */ 6269 cmd_free(h, abort); 6270 return SUCCESS; 6271 } 6272 6273 /* Don't bother trying the abort if we know it won't work. */ 6274 if (abort->cmd_type != CMD_IOACCEL2 && 6275 abort->cmd_type != CMD_IOACCEL1 && !dev->supports_aborts) { 6276 cmd_free(h, abort); 6277 return FAILED; 6278 } 6279 6280 /* 6281 * Check that we're aborting the right command. 6282 * It's possible the CommandList already completed and got re-used. 6283 */ 6284 if (abort->scsi_cmd != sc) { 6285 cmd_free(h, abort); 6286 return SUCCESS; 6287 } 6288 6289 abort->abort_pending = true; 6290 hpsa_get_tag(h, abort, &taglower, &tagupper); 6291 reply_queue = hpsa_extract_reply_queue(h, abort); 6292 ml += sprintf(msg+ml, "Tag:0x%08x:%08x ", tagupper, taglower); 6293 as = abort->scsi_cmd; 6294 if (as != NULL) 6295 ml += sprintf(msg+ml, 6296 "CDBLen: %d CDB: 0x%02x%02x... SN: 0x%lx ", 6297 as->cmd_len, as->cmnd[0], as->cmnd[1], 6298 as->serial_number); 6299 dev_warn(&h->pdev->dev, "%s BEING SENT\n", msg); 6300 hpsa_show_dev_msg(KERN_WARNING, h, dev, "Aborting command"); 6301 6302 /* 6303 * Command is in flight, or possibly already completed 6304 * by the firmware (but not to the scsi mid layer) but we can't 6305 * distinguish which. Send the abort down. 6306 */ 6307 if (wait_for_available_abort_cmd(h)) { 6308 dev_warn(&h->pdev->dev, 6309 "%s FAILED, timeout waiting for an abort command to become available.\n", 6310 msg); 6311 cmd_free(h, abort); 6312 return FAILED; 6313 } 6314 rc = hpsa_send_abort_both_ways(h, dev, abort, reply_queue); 6315 atomic_inc(&h->abort_cmds_available); 6316 wake_up_all(&h->abort_cmd_wait_queue); 6317 if (rc != 0) { 6318 dev_warn(&h->pdev->dev, "%s SENT, FAILED\n", msg); 6319 hpsa_show_dev_msg(KERN_WARNING, h, dev, 6320 "FAILED to abort command"); 6321 cmd_free(h, abort); 6322 return FAILED; 6323 } 6324 dev_info(&h->pdev->dev, "%s SENT, SUCCESS\n", msg); 6325 wait_event(h->event_sync_wait_queue, 6326 abort->scsi_cmd != sc || lockup_detected(h)); 6327 cmd_free(h, abort); 6328 return !lockup_detected(h) ? SUCCESS : FAILED; 6329 } 6330 6331 /* 6332 * For operations with an associated SCSI command, a command block is allocated 6333 * at init, and managed by cmd_tagged_alloc() and cmd_tagged_free() using the 6334 * block request tag as an index into a table of entries. cmd_tagged_free() is 6335 * the complement, although cmd_free() may be called instead. 6336 */ 6337 static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h, 6338 struct scsi_cmnd *scmd) 6339 { 6340 int idx = hpsa_get_cmd_index(scmd); 6341 struct CommandList *c = h->cmd_pool + idx; 6342 6343 if (idx < HPSA_NRESERVED_CMDS || idx >= h->nr_cmds) { 6344 dev_err(&h->pdev->dev, "Bad block tag: %d not in [%d..%d]\n", 6345 idx, HPSA_NRESERVED_CMDS, h->nr_cmds - 1); 6346 /* The index value comes from the block layer, so if it's out of 6347 * bounds, it's probably not our bug. 6348 */ 6349 BUG(); 6350 } 6351 6352 atomic_inc(&c->refcount); 6353 if (unlikely(!hpsa_is_cmd_idle(c))) { 6354 /* 6355 * We expect that the SCSI layer will hand us a unique tag 6356 * value. Thus, there should never be a collision here between 6357 * two requests...because if the selected command isn't idle 6358 * then someone is going to be very disappointed. 6359 */ 6360 dev_err(&h->pdev->dev, 6361 "tag collision (tag=%d) in cmd_tagged_alloc().\n", 6362 idx); 6363 if (c->scsi_cmd != NULL) 6364 scsi_print_command(c->scsi_cmd); 6365 scsi_print_command(scmd); 6366 } 6367 6368 hpsa_cmd_partial_init(h, idx, c); 6369 return c; 6370 } 6371 6372 static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c) 6373 { 6374 /* 6375 * Release our reference to the block. We don't need to do anything 6376 * else to free it, because it is accessed by index. (There's no point 6377 * in checking the result of the decrement, since we cannot guarantee 6378 * that there isn't a concurrent abort which is also accessing it.) 6379 */ 6380 (void)atomic_dec(&c->refcount); 6381 } 6382 6383 /* 6384 * For operations that cannot sleep, a command block is allocated at init, 6385 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track 6386 * which ones are free or in use. Lock must be held when calling this. 6387 * cmd_free() is the complement. 6388 * This function never gives up and returns NULL. If it hangs, 6389 * another thread must call cmd_free() to free some tags. 6390 */ 6391 6392 static struct CommandList *cmd_alloc(struct ctlr_info *h) 6393 { 6394 struct CommandList *c; 6395 int refcount, i; 6396 int offset = 0; 6397 6398 /* 6399 * There is some *extremely* small but non-zero chance that that 6400 * multiple threads could get in here, and one thread could 6401 * be scanning through the list of bits looking for a free 6402 * one, but the free ones are always behind him, and other 6403 * threads sneak in behind him and eat them before he can 6404 * get to them, so that while there is always a free one, a 6405 * very unlucky thread might be starved anyway, never able to 6406 * beat the other threads. In reality, this happens so 6407 * infrequently as to be indistinguishable from never. 6408 * 6409 * Note that we start allocating commands before the SCSI host structure 6410 * is initialized. Since the search starts at bit zero, this 6411 * all works, since we have at least one command structure available; 6412 * however, it means that the structures with the low indexes have to be 6413 * reserved for driver-initiated requests, while requests from the block 6414 * layer will use the higher indexes. 6415 */ 6416 6417 for (;;) { 6418 i = find_next_zero_bit(h->cmd_pool_bits, 6419 HPSA_NRESERVED_CMDS, 6420 offset); 6421 if (unlikely(i >= HPSA_NRESERVED_CMDS)) { 6422 offset = 0; 6423 continue; 6424 } 6425 c = h->cmd_pool + i; 6426 refcount = atomic_inc_return(&c->refcount); 6427 if (unlikely(refcount > 1)) { 6428 cmd_free(h, c); /* already in use */ 6429 offset = (i + 1) % HPSA_NRESERVED_CMDS; 6430 continue; 6431 } 6432 set_bit(i & (BITS_PER_LONG - 1), 6433 h->cmd_pool_bits + (i / BITS_PER_LONG)); 6434 break; /* it's ours now. */ 6435 } 6436 hpsa_cmd_partial_init(h, i, c); 6437 return c; 6438 } 6439 6440 /* 6441 * This is the complementary operation to cmd_alloc(). Note, however, in some 6442 * corner cases it may also be used to free blocks allocated by 6443 * cmd_tagged_alloc() in which case the ref-count decrement does the trick and 6444 * the clear-bit is harmless. 6445 */ 6446 static void cmd_free(struct ctlr_info *h, struct CommandList *c) 6447 { 6448 if (atomic_dec_and_test(&c->refcount)) { 6449 int i; 6450 6451 i = c - h->cmd_pool; 6452 clear_bit(i & (BITS_PER_LONG - 1), 6453 h->cmd_pool_bits + (i / BITS_PER_LONG)); 6454 } 6455 } 6456 6457 #ifdef CONFIG_COMPAT 6458 6459 static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, 6460 void __user *arg) 6461 { 6462 IOCTL32_Command_struct __user *arg32 = 6463 (IOCTL32_Command_struct __user *) arg; 6464 IOCTL_Command_struct arg64; 6465 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64)); 6466 int err; 6467 u32 cp; 6468 6469 memset(&arg64, 0, sizeof(arg64)); 6470 err = 0; 6471 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 6472 sizeof(arg64.LUN_info)); 6473 err |= copy_from_user(&arg64.Request, &arg32->Request, 6474 sizeof(arg64.Request)); 6475 err |= copy_from_user(&arg64.error_info, &arg32->error_info, 6476 sizeof(arg64.error_info)); 6477 err |= get_user(arg64.buf_size, &arg32->buf_size); 6478 err |= get_user(cp, &arg32->buf); 6479 arg64.buf = compat_ptr(cp); 6480 err |= copy_to_user(p, &arg64, sizeof(arg64)); 6481 6482 if (err) 6483 return -EFAULT; 6484 6485 err = hpsa_ioctl(dev, CCISS_PASSTHRU, p); 6486 if (err) 6487 return err; 6488 err |= copy_in_user(&arg32->error_info, &p->error_info, 6489 sizeof(arg32->error_info)); 6490 if (err) 6491 return -EFAULT; 6492 return err; 6493 } 6494 6495 static int hpsa_ioctl32_big_passthru(struct scsi_device *dev, 6496 int cmd, void __user *arg) 6497 { 6498 BIG_IOCTL32_Command_struct __user *arg32 = 6499 (BIG_IOCTL32_Command_struct __user *) arg; 6500 BIG_IOCTL_Command_struct arg64; 6501 BIG_IOCTL_Command_struct __user *p = 6502 compat_alloc_user_space(sizeof(arg64)); 6503 int err; 6504 u32 cp; 6505 6506 memset(&arg64, 0, sizeof(arg64)); 6507 err = 0; 6508 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 6509 sizeof(arg64.LUN_info)); 6510 err |= copy_from_user(&arg64.Request, &arg32->Request, 6511 sizeof(arg64.Request)); 6512 err |= copy_from_user(&arg64.error_info, &arg32->error_info, 6513 sizeof(arg64.error_info)); 6514 err |= get_user(arg64.buf_size, &arg32->buf_size); 6515 err |= get_user(arg64.malloc_size, &arg32->malloc_size); 6516 err |= get_user(cp, &arg32->buf); 6517 arg64.buf = compat_ptr(cp); 6518 err |= copy_to_user(p, &arg64, sizeof(arg64)); 6519 6520 if (err) 6521 return -EFAULT; 6522 6523 err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, p); 6524 if (err) 6525 return err; 6526 err |= copy_in_user(&arg32->error_info, &p->error_info, 6527 sizeof(arg32->error_info)); 6528 if (err) 6529 return -EFAULT; 6530 return err; 6531 } 6532 6533 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void __user *arg) 6534 { 6535 switch (cmd) { 6536 case CCISS_GETPCIINFO: 6537 case CCISS_GETINTINFO: 6538 case CCISS_SETINTINFO: 6539 case CCISS_GETNODENAME: 6540 case CCISS_SETNODENAME: 6541 case CCISS_GETHEARTBEAT: 6542 case CCISS_GETBUSTYPES: 6543 case CCISS_GETFIRMVER: 6544 case CCISS_GETDRIVVER: 6545 case CCISS_REVALIDVOLS: 6546 case CCISS_DEREGDISK: 6547 case CCISS_REGNEWDISK: 6548 case CCISS_REGNEWD: 6549 case CCISS_RESCANDISK: 6550 case CCISS_GETLUNINFO: 6551 return hpsa_ioctl(dev, cmd, arg); 6552 6553 case CCISS_PASSTHRU32: 6554 return hpsa_ioctl32_passthru(dev, cmd, arg); 6555 case CCISS_BIG_PASSTHRU32: 6556 return hpsa_ioctl32_big_passthru(dev, cmd, arg); 6557 6558 default: 6559 return -ENOIOCTLCMD; 6560 } 6561 } 6562 #endif 6563 6564 static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp) 6565 { 6566 struct hpsa_pci_info pciinfo; 6567 6568 if (!argp) 6569 return -EINVAL; 6570 pciinfo.domain = pci_domain_nr(h->pdev->bus); 6571 pciinfo.bus = h->pdev->bus->number; 6572 pciinfo.dev_fn = h->pdev->devfn; 6573 pciinfo.board_id = h->board_id; 6574 if (copy_to_user(argp, &pciinfo, sizeof(pciinfo))) 6575 return -EFAULT; 6576 return 0; 6577 } 6578 6579 static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp) 6580 { 6581 DriverVer_type DriverVer; 6582 unsigned char vmaj, vmin, vsubmin; 6583 int rc; 6584 6585 rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu", 6586 &vmaj, &vmin, &vsubmin); 6587 if (rc != 3) { 6588 dev_info(&h->pdev->dev, "driver version string '%s' " 6589 "unrecognized.", HPSA_DRIVER_VERSION); 6590 vmaj = 0; 6591 vmin = 0; 6592 vsubmin = 0; 6593 } 6594 DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin; 6595 if (!argp) 6596 return -EINVAL; 6597 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type))) 6598 return -EFAULT; 6599 return 0; 6600 } 6601 6602 static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp) 6603 { 6604 IOCTL_Command_struct iocommand; 6605 struct CommandList *c; 6606 char *buff = NULL; 6607 u64 temp64; 6608 int rc = 0; 6609 6610 if (!argp) 6611 return -EINVAL; 6612 if (!capable(CAP_SYS_RAWIO)) 6613 return -EPERM; 6614 if (copy_from_user(&iocommand, argp, sizeof(iocommand))) 6615 return -EFAULT; 6616 if ((iocommand.buf_size < 1) && 6617 (iocommand.Request.Type.Direction != XFER_NONE)) { 6618 return -EINVAL; 6619 } 6620 if (iocommand.buf_size > 0) { 6621 buff = kmalloc(iocommand.buf_size, GFP_KERNEL); 6622 if (buff == NULL) 6623 return -ENOMEM; 6624 if (iocommand.Request.Type.Direction & XFER_WRITE) { 6625 /* Copy the data into the buffer we created */ 6626 if (copy_from_user(buff, iocommand.buf, 6627 iocommand.buf_size)) { 6628 rc = -EFAULT; 6629 goto out_kfree; 6630 } 6631 } else { 6632 memset(buff, 0, iocommand.buf_size); 6633 } 6634 } 6635 c = cmd_alloc(h); 6636 6637 /* Fill in the command type */ 6638 c->cmd_type = CMD_IOCTL_PEND; 6639 c->scsi_cmd = SCSI_CMD_BUSY; 6640 /* Fill in Command Header */ 6641 c->Header.ReplyQueue = 0; /* unused in simple mode */ 6642 if (iocommand.buf_size > 0) { /* buffer to fill */ 6643 c->Header.SGList = 1; 6644 c->Header.SGTotal = cpu_to_le16(1); 6645 } else { /* no buffers to fill */ 6646 c->Header.SGList = 0; 6647 c->Header.SGTotal = cpu_to_le16(0); 6648 } 6649 memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN)); 6650 6651 /* Fill in Request block */ 6652 memcpy(&c->Request, &iocommand.Request, 6653 sizeof(c->Request)); 6654 6655 /* Fill in the scatter gather information */ 6656 if (iocommand.buf_size > 0) { 6657 temp64 = pci_map_single(h->pdev, buff, 6658 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL); 6659 if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) { 6660 c->SG[0].Addr = cpu_to_le64(0); 6661 c->SG[0].Len = cpu_to_le32(0); 6662 rc = -ENOMEM; 6663 goto out; 6664 } 6665 c->SG[0].Addr = cpu_to_le64(temp64); 6666 c->SG[0].Len = cpu_to_le32(iocommand.buf_size); 6667 c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */ 6668 } 6669 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 6670 NO_TIMEOUT); 6671 if (iocommand.buf_size > 0) 6672 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL); 6673 check_ioctl_unit_attention(h, c); 6674 if (rc) { 6675 rc = -EIO; 6676 goto out; 6677 } 6678 6679 /* Copy the error information out */ 6680 memcpy(&iocommand.error_info, c->err_info, 6681 sizeof(iocommand.error_info)); 6682 if (copy_to_user(argp, &iocommand, sizeof(iocommand))) { 6683 rc = -EFAULT; 6684 goto out; 6685 } 6686 if ((iocommand.Request.Type.Direction & XFER_READ) && 6687 iocommand.buf_size > 0) { 6688 /* Copy the data out of the buffer we created */ 6689 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) { 6690 rc = -EFAULT; 6691 goto out; 6692 } 6693 } 6694 out: 6695 cmd_free(h, c); 6696 out_kfree: 6697 kfree(buff); 6698 return rc; 6699 } 6700 6701 static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp) 6702 { 6703 BIG_IOCTL_Command_struct *ioc; 6704 struct CommandList *c; 6705 unsigned char **buff = NULL; 6706 int *buff_size = NULL; 6707 u64 temp64; 6708 BYTE sg_used = 0; 6709 int status = 0; 6710 u32 left; 6711 u32 sz; 6712 BYTE __user *data_ptr; 6713 6714 if (!argp) 6715 return -EINVAL; 6716 if (!capable(CAP_SYS_RAWIO)) 6717 return -EPERM; 6718 ioc = kmalloc(sizeof(*ioc), GFP_KERNEL); 6719 if (!ioc) { 6720 status = -ENOMEM; 6721 goto cleanup1; 6722 } 6723 if (copy_from_user(ioc, argp, sizeof(*ioc))) { 6724 status = -EFAULT; 6725 goto cleanup1; 6726 } 6727 if ((ioc->buf_size < 1) && 6728 (ioc->Request.Type.Direction != XFER_NONE)) { 6729 status = -EINVAL; 6730 goto cleanup1; 6731 } 6732 /* Check kmalloc limits using all SGs */ 6733 if (ioc->malloc_size > MAX_KMALLOC_SIZE) { 6734 status = -EINVAL; 6735 goto cleanup1; 6736 } 6737 if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) { 6738 status = -EINVAL; 6739 goto cleanup1; 6740 } 6741 buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL); 6742 if (!buff) { 6743 status = -ENOMEM; 6744 goto cleanup1; 6745 } 6746 buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL); 6747 if (!buff_size) { 6748 status = -ENOMEM; 6749 goto cleanup1; 6750 } 6751 left = ioc->buf_size; 6752 data_ptr = ioc->buf; 6753 while (left) { 6754 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left; 6755 buff_size[sg_used] = sz; 6756 buff[sg_used] = kmalloc(sz, GFP_KERNEL); 6757 if (buff[sg_used] == NULL) { 6758 status = -ENOMEM; 6759 goto cleanup1; 6760 } 6761 if (ioc->Request.Type.Direction & XFER_WRITE) { 6762 if (copy_from_user(buff[sg_used], data_ptr, sz)) { 6763 status = -EFAULT; 6764 goto cleanup1; 6765 } 6766 } else 6767 memset(buff[sg_used], 0, sz); 6768 left -= sz; 6769 data_ptr += sz; 6770 sg_used++; 6771 } 6772 c = cmd_alloc(h); 6773 6774 c->cmd_type = CMD_IOCTL_PEND; 6775 c->scsi_cmd = SCSI_CMD_BUSY; 6776 c->Header.ReplyQueue = 0; 6777 c->Header.SGList = (u8) sg_used; 6778 c->Header.SGTotal = cpu_to_le16(sg_used); 6779 memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN)); 6780 memcpy(&c->Request, &ioc->Request, sizeof(c->Request)); 6781 if (ioc->buf_size > 0) { 6782 int i; 6783 for (i = 0; i < sg_used; i++) { 6784 temp64 = pci_map_single(h->pdev, buff[i], 6785 buff_size[i], PCI_DMA_BIDIRECTIONAL); 6786 if (dma_mapping_error(&h->pdev->dev, 6787 (dma_addr_t) temp64)) { 6788 c->SG[i].Addr = cpu_to_le64(0); 6789 c->SG[i].Len = cpu_to_le32(0); 6790 hpsa_pci_unmap(h->pdev, c, i, 6791 PCI_DMA_BIDIRECTIONAL); 6792 status = -ENOMEM; 6793 goto cleanup0; 6794 } 6795 c->SG[i].Addr = cpu_to_le64(temp64); 6796 c->SG[i].Len = cpu_to_le32(buff_size[i]); 6797 c->SG[i].Ext = cpu_to_le32(0); 6798 } 6799 c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST); 6800 } 6801 status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 6802 NO_TIMEOUT); 6803 if (sg_used) 6804 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL); 6805 check_ioctl_unit_attention(h, c); 6806 if (status) { 6807 status = -EIO; 6808 goto cleanup0; 6809 } 6810 6811 /* Copy the error information out */ 6812 memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info)); 6813 if (copy_to_user(argp, ioc, sizeof(*ioc))) { 6814 status = -EFAULT; 6815 goto cleanup0; 6816 } 6817 if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) { 6818 int i; 6819 6820 /* Copy the data out of the buffer we created */ 6821 BYTE __user *ptr = ioc->buf; 6822 for (i = 0; i < sg_used; i++) { 6823 if (copy_to_user(ptr, buff[i], buff_size[i])) { 6824 status = -EFAULT; 6825 goto cleanup0; 6826 } 6827 ptr += buff_size[i]; 6828 } 6829 } 6830 status = 0; 6831 cleanup0: 6832 cmd_free(h, c); 6833 cleanup1: 6834 if (buff) { 6835 int i; 6836 6837 for (i = 0; i < sg_used; i++) 6838 kfree(buff[i]); 6839 kfree(buff); 6840 } 6841 kfree(buff_size); 6842 kfree(ioc); 6843 return status; 6844 } 6845 6846 static void check_ioctl_unit_attention(struct ctlr_info *h, 6847 struct CommandList *c) 6848 { 6849 if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 6850 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) 6851 (void) check_for_unit_attention(h, c); 6852 } 6853 6854 /* 6855 * ioctl 6856 */ 6857 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg) 6858 { 6859 struct ctlr_info *h; 6860 void __user *argp = (void __user *)arg; 6861 int rc; 6862 6863 h = sdev_to_hba(dev); 6864 6865 switch (cmd) { 6866 case CCISS_DEREGDISK: 6867 case CCISS_REGNEWDISK: 6868 case CCISS_REGNEWD: 6869 hpsa_scan_start(h->scsi_host); 6870 return 0; 6871 case CCISS_GETPCIINFO: 6872 return hpsa_getpciinfo_ioctl(h, argp); 6873 case CCISS_GETDRIVVER: 6874 return hpsa_getdrivver_ioctl(h, argp); 6875 case CCISS_PASSTHRU: 6876 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 6877 return -EAGAIN; 6878 rc = hpsa_passthru_ioctl(h, argp); 6879 atomic_inc(&h->passthru_cmds_avail); 6880 return rc; 6881 case CCISS_BIG_PASSTHRU: 6882 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 6883 return -EAGAIN; 6884 rc = hpsa_big_passthru_ioctl(h, argp); 6885 atomic_inc(&h->passthru_cmds_avail); 6886 return rc; 6887 default: 6888 return -ENOTTY; 6889 } 6890 } 6891 6892 static void hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr, 6893 u8 reset_type) 6894 { 6895 struct CommandList *c; 6896 6897 c = cmd_alloc(h); 6898 6899 /* fill_cmd can't fail here, no data buffer to map */ 6900 (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, 6901 RAID_CTLR_LUNID, TYPE_MSG); 6902 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */ 6903 c->waiting = NULL; 6904 enqueue_cmd_and_start_io(h, c); 6905 /* Don't wait for completion, the reset won't complete. Don't free 6906 * the command either. This is the last command we will send before 6907 * re-initializing everything, so it doesn't matter and won't leak. 6908 */ 6909 return; 6910 } 6911 6912 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 6913 void *buff, size_t size, u16 page_code, unsigned char *scsi3addr, 6914 int cmd_type) 6915 { 6916 int pci_dir = XFER_NONE; 6917 u64 tag; /* for commands to be aborted */ 6918 6919 c->cmd_type = CMD_IOCTL_PEND; 6920 c->scsi_cmd = SCSI_CMD_BUSY; 6921 c->Header.ReplyQueue = 0; 6922 if (buff != NULL && size > 0) { 6923 c->Header.SGList = 1; 6924 c->Header.SGTotal = cpu_to_le16(1); 6925 } else { 6926 c->Header.SGList = 0; 6927 c->Header.SGTotal = cpu_to_le16(0); 6928 } 6929 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8); 6930 6931 if (cmd_type == TYPE_CMD) { 6932 switch (cmd) { 6933 case HPSA_INQUIRY: 6934 /* are we trying to read a vital product page */ 6935 if (page_code & VPD_PAGE) { 6936 c->Request.CDB[1] = 0x01; 6937 c->Request.CDB[2] = (page_code & 0xff); 6938 } 6939 c->Request.CDBLen = 6; 6940 c->Request.type_attr_dir = 6941 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6942 c->Request.Timeout = 0; 6943 c->Request.CDB[0] = HPSA_INQUIRY; 6944 c->Request.CDB[4] = size & 0xFF; 6945 break; 6946 case HPSA_REPORT_LOG: 6947 case HPSA_REPORT_PHYS: 6948 /* Talking to controller so It's a physical command 6949 mode = 00 target = 0. Nothing to write. 6950 */ 6951 c->Request.CDBLen = 12; 6952 c->Request.type_attr_dir = 6953 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6954 c->Request.Timeout = 0; 6955 c->Request.CDB[0] = cmd; 6956 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 6957 c->Request.CDB[7] = (size >> 16) & 0xFF; 6958 c->Request.CDB[8] = (size >> 8) & 0xFF; 6959 c->Request.CDB[9] = size & 0xFF; 6960 break; 6961 case BMIC_SENSE_DIAG_OPTIONS: 6962 c->Request.CDBLen = 16; 6963 c->Request.type_attr_dir = 6964 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6965 c->Request.Timeout = 0; 6966 /* Spec says this should be BMIC_WRITE */ 6967 c->Request.CDB[0] = BMIC_READ; 6968 c->Request.CDB[6] = BMIC_SENSE_DIAG_OPTIONS; 6969 break; 6970 case BMIC_SET_DIAG_OPTIONS: 6971 c->Request.CDBLen = 16; 6972 c->Request.type_attr_dir = 6973 TYPE_ATTR_DIR(cmd_type, 6974 ATTR_SIMPLE, XFER_WRITE); 6975 c->Request.Timeout = 0; 6976 c->Request.CDB[0] = BMIC_WRITE; 6977 c->Request.CDB[6] = BMIC_SET_DIAG_OPTIONS; 6978 break; 6979 case HPSA_CACHE_FLUSH: 6980 c->Request.CDBLen = 12; 6981 c->Request.type_attr_dir = 6982 TYPE_ATTR_DIR(cmd_type, 6983 ATTR_SIMPLE, XFER_WRITE); 6984 c->Request.Timeout = 0; 6985 c->Request.CDB[0] = BMIC_WRITE; 6986 c->Request.CDB[6] = BMIC_CACHE_FLUSH; 6987 c->Request.CDB[7] = (size >> 8) & 0xFF; 6988 c->Request.CDB[8] = size & 0xFF; 6989 break; 6990 case TEST_UNIT_READY: 6991 c->Request.CDBLen = 6; 6992 c->Request.type_attr_dir = 6993 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 6994 c->Request.Timeout = 0; 6995 break; 6996 case HPSA_GET_RAID_MAP: 6997 c->Request.CDBLen = 12; 6998 c->Request.type_attr_dir = 6999 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 7000 c->Request.Timeout = 0; 7001 c->Request.CDB[0] = HPSA_CISS_READ; 7002 c->Request.CDB[1] = cmd; 7003 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 7004 c->Request.CDB[7] = (size >> 16) & 0xFF; 7005 c->Request.CDB[8] = (size >> 8) & 0xFF; 7006 c->Request.CDB[9] = size & 0xFF; 7007 break; 7008 case BMIC_SENSE_CONTROLLER_PARAMETERS: 7009 c->Request.CDBLen = 10; 7010 c->Request.type_attr_dir = 7011 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 7012 c->Request.Timeout = 0; 7013 c->Request.CDB[0] = BMIC_READ; 7014 c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS; 7015 c->Request.CDB[7] = (size >> 16) & 0xFF; 7016 c->Request.CDB[8] = (size >> 8) & 0xFF; 7017 break; 7018 case BMIC_IDENTIFY_PHYSICAL_DEVICE: 7019 c->Request.CDBLen = 10; 7020 c->Request.type_attr_dir = 7021 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 7022 c->Request.Timeout = 0; 7023 c->Request.CDB[0] = BMIC_READ; 7024 c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE; 7025 c->Request.CDB[7] = (size >> 16) & 0xFF; 7026 c->Request.CDB[8] = (size >> 8) & 0XFF; 7027 break; 7028 case BMIC_SENSE_SUBSYSTEM_INFORMATION: 7029 c->Request.CDBLen = 10; 7030 c->Request.type_attr_dir = 7031 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 7032 c->Request.Timeout = 0; 7033 c->Request.CDB[0] = BMIC_READ; 7034 c->Request.CDB[6] = BMIC_SENSE_SUBSYSTEM_INFORMATION; 7035 c->Request.CDB[7] = (size >> 16) & 0xFF; 7036 c->Request.CDB[8] = (size >> 8) & 0XFF; 7037 break; 7038 case BMIC_SENSE_STORAGE_BOX_PARAMS: 7039 c->Request.CDBLen = 10; 7040 c->Request.type_attr_dir = 7041 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 7042 c->Request.Timeout = 0; 7043 c->Request.CDB[0] = BMIC_READ; 7044 c->Request.CDB[6] = BMIC_SENSE_STORAGE_BOX_PARAMS; 7045 c->Request.CDB[7] = (size >> 16) & 0xFF; 7046 c->Request.CDB[8] = (size >> 8) & 0XFF; 7047 break; 7048 case BMIC_IDENTIFY_CONTROLLER: 7049 c->Request.CDBLen = 10; 7050 c->Request.type_attr_dir = 7051 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 7052 c->Request.Timeout = 0; 7053 c->Request.CDB[0] = BMIC_READ; 7054 c->Request.CDB[1] = 0; 7055 c->Request.CDB[2] = 0; 7056 c->Request.CDB[3] = 0; 7057 c->Request.CDB[4] = 0; 7058 c->Request.CDB[5] = 0; 7059 c->Request.CDB[6] = BMIC_IDENTIFY_CONTROLLER; 7060 c->Request.CDB[7] = (size >> 16) & 0xFF; 7061 c->Request.CDB[8] = (size >> 8) & 0XFF; 7062 c->Request.CDB[9] = 0; 7063 break; 7064 default: 7065 dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd); 7066 BUG(); 7067 return -1; 7068 } 7069 } else if (cmd_type == TYPE_MSG) { 7070 switch (cmd) { 7071 7072 case HPSA_PHYS_TARGET_RESET: 7073 c->Request.CDBLen = 16; 7074 c->Request.type_attr_dir = 7075 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 7076 c->Request.Timeout = 0; /* Don't time out */ 7077 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 7078 c->Request.CDB[0] = HPSA_RESET; 7079 c->Request.CDB[1] = HPSA_TARGET_RESET_TYPE; 7080 /* Physical target reset needs no control bytes 4-7*/ 7081 c->Request.CDB[4] = 0x00; 7082 c->Request.CDB[5] = 0x00; 7083 c->Request.CDB[6] = 0x00; 7084 c->Request.CDB[7] = 0x00; 7085 break; 7086 case HPSA_DEVICE_RESET_MSG: 7087 c->Request.CDBLen = 16; 7088 c->Request.type_attr_dir = 7089 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 7090 c->Request.Timeout = 0; /* Don't time out */ 7091 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 7092 c->Request.CDB[0] = cmd; 7093 c->Request.CDB[1] = HPSA_RESET_TYPE_LUN; 7094 /* If bytes 4-7 are zero, it means reset the */ 7095 /* LunID device */ 7096 c->Request.CDB[4] = 0x00; 7097 c->Request.CDB[5] = 0x00; 7098 c->Request.CDB[6] = 0x00; 7099 c->Request.CDB[7] = 0x00; 7100 break; 7101 case HPSA_ABORT_MSG: 7102 memcpy(&tag, buff, sizeof(tag)); 7103 dev_dbg(&h->pdev->dev, 7104 "Abort Tag:0x%016llx using rqst Tag:0x%016llx", 7105 tag, c->Header.tag); 7106 c->Request.CDBLen = 16; 7107 c->Request.type_attr_dir = 7108 TYPE_ATTR_DIR(cmd_type, 7109 ATTR_SIMPLE, XFER_WRITE); 7110 c->Request.Timeout = 0; /* Don't time out */ 7111 c->Request.CDB[0] = HPSA_TASK_MANAGEMENT; 7112 c->Request.CDB[1] = HPSA_TMF_ABORT_TASK; 7113 c->Request.CDB[2] = 0x00; /* reserved */ 7114 c->Request.CDB[3] = 0x00; /* reserved */ 7115 /* Tag to abort goes in CDB[4]-CDB[11] */ 7116 memcpy(&c->Request.CDB[4], &tag, sizeof(tag)); 7117 c->Request.CDB[12] = 0x00; /* reserved */ 7118 c->Request.CDB[13] = 0x00; /* reserved */ 7119 c->Request.CDB[14] = 0x00; /* reserved */ 7120 c->Request.CDB[15] = 0x00; /* reserved */ 7121 break; 7122 default: 7123 dev_warn(&h->pdev->dev, "unknown message type %d\n", 7124 cmd); 7125 BUG(); 7126 } 7127 } else { 7128 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type); 7129 BUG(); 7130 } 7131 7132 switch (GET_DIR(c->Request.type_attr_dir)) { 7133 case XFER_READ: 7134 pci_dir = PCI_DMA_FROMDEVICE; 7135 break; 7136 case XFER_WRITE: 7137 pci_dir = PCI_DMA_TODEVICE; 7138 break; 7139 case XFER_NONE: 7140 pci_dir = PCI_DMA_NONE; 7141 break; 7142 default: 7143 pci_dir = PCI_DMA_BIDIRECTIONAL; 7144 } 7145 if (hpsa_map_one(h->pdev, c, buff, size, pci_dir)) 7146 return -1; 7147 return 0; 7148 } 7149 7150 /* 7151 * Map (physical) PCI mem into (virtual) kernel space 7152 */ 7153 static void __iomem *remap_pci_mem(ulong base, ulong size) 7154 { 7155 ulong page_base = ((ulong) base) & PAGE_MASK; 7156 ulong page_offs = ((ulong) base) - page_base; 7157 void __iomem *page_remapped = ioremap_nocache(page_base, 7158 page_offs + size); 7159 7160 return page_remapped ? (page_remapped + page_offs) : NULL; 7161 } 7162 7163 static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q) 7164 { 7165 return h->access.command_completed(h, q); 7166 } 7167 7168 static inline bool interrupt_pending(struct ctlr_info *h) 7169 { 7170 return h->access.intr_pending(h); 7171 } 7172 7173 static inline long interrupt_not_for_us(struct ctlr_info *h) 7174 { 7175 return (h->access.intr_pending(h) == 0) || 7176 (h->interrupts_enabled == 0); 7177 } 7178 7179 static inline int bad_tag(struct ctlr_info *h, u32 tag_index, 7180 u32 raw_tag) 7181 { 7182 if (unlikely(tag_index >= h->nr_cmds)) { 7183 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag); 7184 return 1; 7185 } 7186 return 0; 7187 } 7188 7189 static inline void finish_cmd(struct CommandList *c) 7190 { 7191 dial_up_lockup_detection_on_fw_flash_complete(c->h, c); 7192 if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI 7193 || c->cmd_type == CMD_IOACCEL2)) 7194 complete_scsi_command(c); 7195 else if (c->cmd_type == CMD_IOCTL_PEND || c->cmd_type == IOACCEL2_TMF) 7196 complete(c->waiting); 7197 } 7198 7199 /* process completion of an indexed ("direct lookup") command */ 7200 static inline void process_indexed_cmd(struct ctlr_info *h, 7201 u32 raw_tag) 7202 { 7203 u32 tag_index; 7204 struct CommandList *c; 7205 7206 tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT; 7207 if (!bad_tag(h, tag_index, raw_tag)) { 7208 c = h->cmd_pool + tag_index; 7209 finish_cmd(c); 7210 } 7211 } 7212 7213 /* Some controllers, like p400, will give us one interrupt 7214 * after a soft reset, even if we turned interrupts off. 7215 * Only need to check for this in the hpsa_xxx_discard_completions 7216 * functions. 7217 */ 7218 static int ignore_bogus_interrupt(struct ctlr_info *h) 7219 { 7220 if (likely(!reset_devices)) 7221 return 0; 7222 7223 if (likely(h->interrupts_enabled)) 7224 return 0; 7225 7226 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled " 7227 "(known firmware bug.) Ignoring.\n"); 7228 7229 return 1; 7230 } 7231 7232 /* 7233 * Convert &h->q[x] (passed to interrupt handlers) back to h. 7234 * Relies on (h-q[x] == x) being true for x such that 7235 * 0 <= x < MAX_REPLY_QUEUES. 7236 */ 7237 static struct ctlr_info *queue_to_hba(u8 *queue) 7238 { 7239 return container_of((queue - *queue), struct ctlr_info, q[0]); 7240 } 7241 7242 static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue) 7243 { 7244 struct ctlr_info *h = queue_to_hba(queue); 7245 u8 q = *(u8 *) queue; 7246 u32 raw_tag; 7247 7248 if (ignore_bogus_interrupt(h)) 7249 return IRQ_NONE; 7250 7251 if (interrupt_not_for_us(h)) 7252 return IRQ_NONE; 7253 h->last_intr_timestamp = get_jiffies_64(); 7254 while (interrupt_pending(h)) { 7255 raw_tag = get_next_completion(h, q); 7256 while (raw_tag != FIFO_EMPTY) 7257 raw_tag = next_command(h, q); 7258 } 7259 return IRQ_HANDLED; 7260 } 7261 7262 static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue) 7263 { 7264 struct ctlr_info *h = queue_to_hba(queue); 7265 u32 raw_tag; 7266 u8 q = *(u8 *) queue; 7267 7268 if (ignore_bogus_interrupt(h)) 7269 return IRQ_NONE; 7270 7271 h->last_intr_timestamp = get_jiffies_64(); 7272 raw_tag = get_next_completion(h, q); 7273 while (raw_tag != FIFO_EMPTY) 7274 raw_tag = next_command(h, q); 7275 return IRQ_HANDLED; 7276 } 7277 7278 static irqreturn_t do_hpsa_intr_intx(int irq, void *queue) 7279 { 7280 struct ctlr_info *h = queue_to_hba((u8 *) queue); 7281 u32 raw_tag; 7282 u8 q = *(u8 *) queue; 7283 7284 if (interrupt_not_for_us(h)) 7285 return IRQ_NONE; 7286 h->last_intr_timestamp = get_jiffies_64(); 7287 while (interrupt_pending(h)) { 7288 raw_tag = get_next_completion(h, q); 7289 while (raw_tag != FIFO_EMPTY) { 7290 process_indexed_cmd(h, raw_tag); 7291 raw_tag = next_command(h, q); 7292 } 7293 } 7294 return IRQ_HANDLED; 7295 } 7296 7297 static irqreturn_t do_hpsa_intr_msi(int irq, void *queue) 7298 { 7299 struct ctlr_info *h = queue_to_hba(queue); 7300 u32 raw_tag; 7301 u8 q = *(u8 *) queue; 7302 7303 h->last_intr_timestamp = get_jiffies_64(); 7304 raw_tag = get_next_completion(h, q); 7305 while (raw_tag != FIFO_EMPTY) { 7306 process_indexed_cmd(h, raw_tag); 7307 raw_tag = next_command(h, q); 7308 } 7309 return IRQ_HANDLED; 7310 } 7311 7312 /* Send a message CDB to the firmware. Careful, this only works 7313 * in simple mode, not performant mode due to the tag lookup. 7314 * We only ever use this immediately after a controller reset. 7315 */ 7316 static int hpsa_message(struct pci_dev *pdev, unsigned char opcode, 7317 unsigned char type) 7318 { 7319 struct Command { 7320 struct CommandListHeader CommandHeader; 7321 struct RequestBlock Request; 7322 struct ErrDescriptor ErrorDescriptor; 7323 }; 7324 struct Command *cmd; 7325 static const size_t cmd_sz = sizeof(*cmd) + 7326 sizeof(cmd->ErrorDescriptor); 7327 dma_addr_t paddr64; 7328 __le32 paddr32; 7329 u32 tag; 7330 void __iomem *vaddr; 7331 int i, err; 7332 7333 vaddr = pci_ioremap_bar(pdev, 0); 7334 if (vaddr == NULL) 7335 return -ENOMEM; 7336 7337 /* The Inbound Post Queue only accepts 32-bit physical addresses for the 7338 * CCISS commands, so they must be allocated from the lower 4GiB of 7339 * memory. 7340 */ 7341 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 7342 if (err) { 7343 iounmap(vaddr); 7344 return err; 7345 } 7346 7347 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64); 7348 if (cmd == NULL) { 7349 iounmap(vaddr); 7350 return -ENOMEM; 7351 } 7352 7353 /* This must fit, because of the 32-bit consistent DMA mask. Also, 7354 * although there's no guarantee, we assume that the address is at 7355 * least 4-byte aligned (most likely, it's page-aligned). 7356 */ 7357 paddr32 = cpu_to_le32(paddr64); 7358 7359 cmd->CommandHeader.ReplyQueue = 0; 7360 cmd->CommandHeader.SGList = 0; 7361 cmd->CommandHeader.SGTotal = cpu_to_le16(0); 7362 cmd->CommandHeader.tag = cpu_to_le64(paddr64); 7363 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8); 7364 7365 cmd->Request.CDBLen = 16; 7366 cmd->Request.type_attr_dir = 7367 TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE); 7368 cmd->Request.Timeout = 0; /* Don't time out */ 7369 cmd->Request.CDB[0] = opcode; 7370 cmd->Request.CDB[1] = type; 7371 memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */ 7372 cmd->ErrorDescriptor.Addr = 7373 cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd))); 7374 cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo)); 7375 7376 writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET); 7377 7378 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) { 7379 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET); 7380 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64) 7381 break; 7382 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS); 7383 } 7384 7385 iounmap(vaddr); 7386 7387 /* we leak the DMA buffer here ... no choice since the controller could 7388 * still complete the command. 7389 */ 7390 if (i == HPSA_MSG_SEND_RETRY_LIMIT) { 7391 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n", 7392 opcode, type); 7393 return -ETIMEDOUT; 7394 } 7395 7396 pci_free_consistent(pdev, cmd_sz, cmd, paddr64); 7397 7398 if (tag & HPSA_ERROR_BIT) { 7399 dev_err(&pdev->dev, "controller message %02x:%02x failed\n", 7400 opcode, type); 7401 return -EIO; 7402 } 7403 7404 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n", 7405 opcode, type); 7406 return 0; 7407 } 7408 7409 #define hpsa_noop(p) hpsa_message(p, 3, 0) 7410 7411 static int hpsa_controller_hard_reset(struct pci_dev *pdev, 7412 void __iomem *vaddr, u32 use_doorbell) 7413 { 7414 7415 if (use_doorbell) { 7416 /* For everything after the P600, the PCI power state method 7417 * of resetting the controller doesn't work, so we have this 7418 * other way using the doorbell register. 7419 */ 7420 dev_info(&pdev->dev, "using doorbell to reset controller\n"); 7421 writel(use_doorbell, vaddr + SA5_DOORBELL); 7422 7423 /* PMC hardware guys tell us we need a 10 second delay after 7424 * doorbell reset and before any attempt to talk to the board 7425 * at all to ensure that this actually works and doesn't fall 7426 * over in some weird corner cases. 7427 */ 7428 msleep(10000); 7429 } else { /* Try to do it the PCI power state way */ 7430 7431 /* Quoting from the Open CISS Specification: "The Power 7432 * Management Control/Status Register (CSR) controls the power 7433 * state of the device. The normal operating state is D0, 7434 * CSR=00h. The software off state is D3, CSR=03h. To reset 7435 * the controller, place the interface device in D3 then to D0, 7436 * this causes a secondary PCI reset which will reset the 7437 * controller." */ 7438 7439 int rc = 0; 7440 7441 dev_info(&pdev->dev, "using PCI PM to reset controller\n"); 7442 7443 /* enter the D3hot power management state */ 7444 rc = pci_set_power_state(pdev, PCI_D3hot); 7445 if (rc) 7446 return rc; 7447 7448 msleep(500); 7449 7450 /* enter the D0 power management state */ 7451 rc = pci_set_power_state(pdev, PCI_D0); 7452 if (rc) 7453 return rc; 7454 7455 /* 7456 * The P600 requires a small delay when changing states. 7457 * Otherwise we may think the board did not reset and we bail. 7458 * This for kdump only and is particular to the P600. 7459 */ 7460 msleep(500); 7461 } 7462 return 0; 7463 } 7464 7465 static void init_driver_version(char *driver_version, int len) 7466 { 7467 memset(driver_version, 0, len); 7468 strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1); 7469 } 7470 7471 static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable) 7472 { 7473 char *driver_version; 7474 int i, size = sizeof(cfgtable->driver_version); 7475 7476 driver_version = kmalloc(size, GFP_KERNEL); 7477 if (!driver_version) 7478 return -ENOMEM; 7479 7480 init_driver_version(driver_version, size); 7481 for (i = 0; i < size; i++) 7482 writeb(driver_version[i], &cfgtable->driver_version[i]); 7483 kfree(driver_version); 7484 return 0; 7485 } 7486 7487 static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable, 7488 unsigned char *driver_ver) 7489 { 7490 int i; 7491 7492 for (i = 0; i < sizeof(cfgtable->driver_version); i++) 7493 driver_ver[i] = readb(&cfgtable->driver_version[i]); 7494 } 7495 7496 static int controller_reset_failed(struct CfgTable __iomem *cfgtable) 7497 { 7498 7499 char *driver_ver, *old_driver_ver; 7500 int rc, size = sizeof(cfgtable->driver_version); 7501 7502 old_driver_ver = kmalloc(2 * size, GFP_KERNEL); 7503 if (!old_driver_ver) 7504 return -ENOMEM; 7505 driver_ver = old_driver_ver + size; 7506 7507 /* After a reset, the 32 bytes of "driver version" in the cfgtable 7508 * should have been changed, otherwise we know the reset failed. 7509 */ 7510 init_driver_version(old_driver_ver, size); 7511 read_driver_ver_from_cfgtable(cfgtable, driver_ver); 7512 rc = !memcmp(driver_ver, old_driver_ver, size); 7513 kfree(old_driver_ver); 7514 return rc; 7515 } 7516 /* This does a hard reset of the controller using PCI power management 7517 * states or the using the doorbell register. 7518 */ 7519 static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id) 7520 { 7521 u64 cfg_offset; 7522 u32 cfg_base_addr; 7523 u64 cfg_base_addr_index; 7524 void __iomem *vaddr; 7525 unsigned long paddr; 7526 u32 misc_fw_support; 7527 int rc; 7528 struct CfgTable __iomem *cfgtable; 7529 u32 use_doorbell; 7530 u16 command_register; 7531 7532 /* For controllers as old as the P600, this is very nearly 7533 * the same thing as 7534 * 7535 * pci_save_state(pci_dev); 7536 * pci_set_power_state(pci_dev, PCI_D3hot); 7537 * pci_set_power_state(pci_dev, PCI_D0); 7538 * pci_restore_state(pci_dev); 7539 * 7540 * For controllers newer than the P600, the pci power state 7541 * method of resetting doesn't work so we have another way 7542 * using the doorbell register. 7543 */ 7544 7545 if (!ctlr_is_resettable(board_id)) { 7546 dev_warn(&pdev->dev, "Controller not resettable\n"); 7547 return -ENODEV; 7548 } 7549 7550 /* if controller is soft- but not hard resettable... */ 7551 if (!ctlr_is_hard_resettable(board_id)) 7552 return -ENOTSUPP; /* try soft reset later. */ 7553 7554 /* Save the PCI command register */ 7555 pci_read_config_word(pdev, 4, &command_register); 7556 pci_save_state(pdev); 7557 7558 /* find the first memory BAR, so we can find the cfg table */ 7559 rc = hpsa_pci_find_memory_BAR(pdev, &paddr); 7560 if (rc) 7561 return rc; 7562 vaddr = remap_pci_mem(paddr, 0x250); 7563 if (!vaddr) 7564 return -ENOMEM; 7565 7566 /* find cfgtable in order to check if reset via doorbell is supported */ 7567 rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr, 7568 &cfg_base_addr_index, &cfg_offset); 7569 if (rc) 7570 goto unmap_vaddr; 7571 cfgtable = remap_pci_mem(pci_resource_start(pdev, 7572 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable)); 7573 if (!cfgtable) { 7574 rc = -ENOMEM; 7575 goto unmap_vaddr; 7576 } 7577 rc = write_driver_ver_to_cfgtable(cfgtable); 7578 if (rc) 7579 goto unmap_cfgtable; 7580 7581 /* If reset via doorbell register is supported, use that. 7582 * There are two such methods. Favor the newest method. 7583 */ 7584 misc_fw_support = readl(&cfgtable->misc_fw_support); 7585 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2; 7586 if (use_doorbell) { 7587 use_doorbell = DOORBELL_CTLR_RESET2; 7588 } else { 7589 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET; 7590 if (use_doorbell) { 7591 dev_warn(&pdev->dev, 7592 "Soft reset not supported. Firmware update is required.\n"); 7593 rc = -ENOTSUPP; /* try soft reset */ 7594 goto unmap_cfgtable; 7595 } 7596 } 7597 7598 rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell); 7599 if (rc) 7600 goto unmap_cfgtable; 7601 7602 pci_restore_state(pdev); 7603 pci_write_config_word(pdev, 4, command_register); 7604 7605 /* Some devices (notably the HP Smart Array 5i Controller) 7606 need a little pause here */ 7607 msleep(HPSA_POST_RESET_PAUSE_MSECS); 7608 7609 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY); 7610 if (rc) { 7611 dev_warn(&pdev->dev, 7612 "Failed waiting for board to become ready after hard reset\n"); 7613 goto unmap_cfgtable; 7614 } 7615 7616 rc = controller_reset_failed(vaddr); 7617 if (rc < 0) 7618 goto unmap_cfgtable; 7619 if (rc) { 7620 dev_warn(&pdev->dev, "Unable to successfully reset " 7621 "controller. Will try soft reset.\n"); 7622 rc = -ENOTSUPP; 7623 } else { 7624 dev_info(&pdev->dev, "board ready after hard reset.\n"); 7625 } 7626 7627 unmap_cfgtable: 7628 iounmap(cfgtable); 7629 7630 unmap_vaddr: 7631 iounmap(vaddr); 7632 return rc; 7633 } 7634 7635 /* 7636 * We cannot read the structure directly, for portability we must use 7637 * the io functions. 7638 * This is for debug only. 7639 */ 7640 static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb) 7641 { 7642 #ifdef HPSA_DEBUG 7643 int i; 7644 char temp_name[17]; 7645 7646 dev_info(dev, "Controller Configuration information\n"); 7647 dev_info(dev, "------------------------------------\n"); 7648 for (i = 0; i < 4; i++) 7649 temp_name[i] = readb(&(tb->Signature[i])); 7650 temp_name[4] = '\0'; 7651 dev_info(dev, " Signature = %s\n", temp_name); 7652 dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence))); 7653 dev_info(dev, " Transport methods supported = 0x%x\n", 7654 readl(&(tb->TransportSupport))); 7655 dev_info(dev, " Transport methods active = 0x%x\n", 7656 readl(&(tb->TransportActive))); 7657 dev_info(dev, " Requested transport Method = 0x%x\n", 7658 readl(&(tb->HostWrite.TransportRequest))); 7659 dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n", 7660 readl(&(tb->HostWrite.CoalIntDelay))); 7661 dev_info(dev, " Coalesce Interrupt Count = 0x%x\n", 7662 readl(&(tb->HostWrite.CoalIntCount))); 7663 dev_info(dev, " Max outstanding commands = %d\n", 7664 readl(&(tb->CmdsOutMax))); 7665 dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes))); 7666 for (i = 0; i < 16; i++) 7667 temp_name[i] = readb(&(tb->ServerName[i])); 7668 temp_name[16] = '\0'; 7669 dev_info(dev, " Server Name = %s\n", temp_name); 7670 dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n", 7671 readl(&(tb->HeartBeat))); 7672 #endif /* HPSA_DEBUG */ 7673 } 7674 7675 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr) 7676 { 7677 int i, offset, mem_type, bar_type; 7678 7679 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */ 7680 return 0; 7681 offset = 0; 7682 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { 7683 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE; 7684 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO) 7685 offset += 4; 7686 else { 7687 mem_type = pci_resource_flags(pdev, i) & 7688 PCI_BASE_ADDRESS_MEM_TYPE_MASK; 7689 switch (mem_type) { 7690 case PCI_BASE_ADDRESS_MEM_TYPE_32: 7691 case PCI_BASE_ADDRESS_MEM_TYPE_1M: 7692 offset += 4; /* 32 bit */ 7693 break; 7694 case PCI_BASE_ADDRESS_MEM_TYPE_64: 7695 offset += 8; 7696 break; 7697 default: /* reserved in PCI 2.2 */ 7698 dev_warn(&pdev->dev, 7699 "base address is invalid\n"); 7700 return -1; 7701 break; 7702 } 7703 } 7704 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0) 7705 return i + 1; 7706 } 7707 return -1; 7708 } 7709 7710 static void hpsa_disable_interrupt_mode(struct ctlr_info *h) 7711 { 7712 pci_free_irq_vectors(h->pdev); 7713 h->msix_vectors = 0; 7714 } 7715 7716 /* If MSI/MSI-X is supported by the kernel we will try to enable it on 7717 * controllers that are capable. If not, we use legacy INTx mode. 7718 */ 7719 static int hpsa_interrupt_mode(struct ctlr_info *h) 7720 { 7721 unsigned int flags = PCI_IRQ_LEGACY; 7722 int ret; 7723 7724 /* Some boards advertise MSI but don't really support it */ 7725 switch (h->board_id) { 7726 case 0x40700E11: 7727 case 0x40800E11: 7728 case 0x40820E11: 7729 case 0x40830E11: 7730 break; 7731 default: 7732 ret = pci_alloc_irq_vectors(h->pdev, 1, MAX_REPLY_QUEUES, 7733 PCI_IRQ_MSIX | PCI_IRQ_AFFINITY); 7734 if (ret > 0) { 7735 h->msix_vectors = ret; 7736 return 0; 7737 } 7738 7739 flags |= PCI_IRQ_MSI; 7740 break; 7741 } 7742 7743 ret = pci_alloc_irq_vectors(h->pdev, 1, 1, flags); 7744 if (ret < 0) 7745 return ret; 7746 return 0; 7747 } 7748 7749 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id) 7750 { 7751 int i; 7752 u32 subsystem_vendor_id, subsystem_device_id; 7753 7754 subsystem_vendor_id = pdev->subsystem_vendor; 7755 subsystem_device_id = pdev->subsystem_device; 7756 *board_id = ((subsystem_device_id << 16) & 0xffff0000) | 7757 subsystem_vendor_id; 7758 7759 for (i = 0; i < ARRAY_SIZE(products); i++) 7760 if (*board_id == products[i].board_id) 7761 return i; 7762 7763 if ((subsystem_vendor_id != PCI_VENDOR_ID_HP && 7764 subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) || 7765 !hpsa_allow_any) { 7766 dev_warn(&pdev->dev, "unrecognized board ID: " 7767 "0x%08x, ignoring.\n", *board_id); 7768 return -ENODEV; 7769 } 7770 return ARRAY_SIZE(products) - 1; /* generic unknown smart array */ 7771 } 7772 7773 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 7774 unsigned long *memory_bar) 7775 { 7776 int i; 7777 7778 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) 7779 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) { 7780 /* addressing mode bits already removed */ 7781 *memory_bar = pci_resource_start(pdev, i); 7782 dev_dbg(&pdev->dev, "memory BAR = %lx\n", 7783 *memory_bar); 7784 return 0; 7785 } 7786 dev_warn(&pdev->dev, "no memory BAR found\n"); 7787 return -ENODEV; 7788 } 7789 7790 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 7791 int wait_for_ready) 7792 { 7793 int i, iterations; 7794 u32 scratchpad; 7795 if (wait_for_ready) 7796 iterations = HPSA_BOARD_READY_ITERATIONS; 7797 else 7798 iterations = HPSA_BOARD_NOT_READY_ITERATIONS; 7799 7800 for (i = 0; i < iterations; i++) { 7801 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET); 7802 if (wait_for_ready) { 7803 if (scratchpad == HPSA_FIRMWARE_READY) 7804 return 0; 7805 } else { 7806 if (scratchpad != HPSA_FIRMWARE_READY) 7807 return 0; 7808 } 7809 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS); 7810 } 7811 dev_warn(&pdev->dev, "board not ready, timed out.\n"); 7812 return -ENODEV; 7813 } 7814 7815 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 7816 u32 *cfg_base_addr, u64 *cfg_base_addr_index, 7817 u64 *cfg_offset) 7818 { 7819 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET); 7820 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET); 7821 *cfg_base_addr &= (u32) 0x0000ffff; 7822 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr); 7823 if (*cfg_base_addr_index == -1) { 7824 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n"); 7825 return -ENODEV; 7826 } 7827 return 0; 7828 } 7829 7830 static void hpsa_free_cfgtables(struct ctlr_info *h) 7831 { 7832 if (h->transtable) { 7833 iounmap(h->transtable); 7834 h->transtable = NULL; 7835 } 7836 if (h->cfgtable) { 7837 iounmap(h->cfgtable); 7838 h->cfgtable = NULL; 7839 } 7840 } 7841 7842 /* Find and map CISS config table and transfer table 7843 + * several items must be unmapped (freed) later 7844 + * */ 7845 static int hpsa_find_cfgtables(struct ctlr_info *h) 7846 { 7847 u64 cfg_offset; 7848 u32 cfg_base_addr; 7849 u64 cfg_base_addr_index; 7850 u32 trans_offset; 7851 int rc; 7852 7853 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 7854 &cfg_base_addr_index, &cfg_offset); 7855 if (rc) 7856 return rc; 7857 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev, 7858 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable)); 7859 if (!h->cfgtable) { 7860 dev_err(&h->pdev->dev, "Failed mapping cfgtable\n"); 7861 return -ENOMEM; 7862 } 7863 rc = write_driver_ver_to_cfgtable(h->cfgtable); 7864 if (rc) 7865 return rc; 7866 /* Find performant mode table. */ 7867 trans_offset = readl(&h->cfgtable->TransMethodOffset); 7868 h->transtable = remap_pci_mem(pci_resource_start(h->pdev, 7869 cfg_base_addr_index)+cfg_offset+trans_offset, 7870 sizeof(*h->transtable)); 7871 if (!h->transtable) { 7872 dev_err(&h->pdev->dev, "Failed mapping transfer table\n"); 7873 hpsa_free_cfgtables(h); 7874 return -ENOMEM; 7875 } 7876 return 0; 7877 } 7878 7879 static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h) 7880 { 7881 #define MIN_MAX_COMMANDS 16 7882 BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS); 7883 7884 h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands); 7885 7886 /* Limit commands in memory limited kdump scenario. */ 7887 if (reset_devices && h->max_commands > 32) 7888 h->max_commands = 32; 7889 7890 if (h->max_commands < MIN_MAX_COMMANDS) { 7891 dev_warn(&h->pdev->dev, 7892 "Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n", 7893 h->max_commands, 7894 MIN_MAX_COMMANDS); 7895 h->max_commands = MIN_MAX_COMMANDS; 7896 } 7897 } 7898 7899 /* If the controller reports that the total max sg entries is greater than 512, 7900 * then we know that chained SG blocks work. (Original smart arrays did not 7901 * support chained SG blocks and would return zero for max sg entries.) 7902 */ 7903 static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h) 7904 { 7905 return h->maxsgentries > 512; 7906 } 7907 7908 /* Interrogate the hardware for some limits: 7909 * max commands, max SG elements without chaining, and with chaining, 7910 * SG chain block size, etc. 7911 */ 7912 static void hpsa_find_board_params(struct ctlr_info *h) 7913 { 7914 hpsa_get_max_perf_mode_cmds(h); 7915 h->nr_cmds = h->max_commands; 7916 h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements)); 7917 h->fw_support = readl(&(h->cfgtable->misc_fw_support)); 7918 if (hpsa_supports_chained_sg_blocks(h)) { 7919 /* Limit in-command s/g elements to 32 save dma'able memory. */ 7920 h->max_cmd_sg_entries = 32; 7921 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries; 7922 h->maxsgentries--; /* save one for chain pointer */ 7923 } else { 7924 /* 7925 * Original smart arrays supported at most 31 s/g entries 7926 * embedded inline in the command (trying to use more 7927 * would lock up the controller) 7928 */ 7929 h->max_cmd_sg_entries = 31; 7930 h->maxsgentries = 31; /* default to traditional values */ 7931 h->chainsize = 0; 7932 } 7933 7934 /* Find out what task management functions are supported and cache */ 7935 h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags)); 7936 if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags)) 7937 dev_warn(&h->pdev->dev, "Physical aborts not supported\n"); 7938 if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags)) 7939 dev_warn(&h->pdev->dev, "Logical aborts not supported\n"); 7940 if (!(HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags)) 7941 dev_warn(&h->pdev->dev, "HP SSD Smart Path aborts not supported\n"); 7942 } 7943 7944 static inline bool hpsa_CISS_signature_present(struct ctlr_info *h) 7945 { 7946 if (!check_signature(h->cfgtable->Signature, "CISS", 4)) { 7947 dev_err(&h->pdev->dev, "not a valid CISS config table\n"); 7948 return false; 7949 } 7950 return true; 7951 } 7952 7953 static inline void hpsa_set_driver_support_bits(struct ctlr_info *h) 7954 { 7955 u32 driver_support; 7956 7957 driver_support = readl(&(h->cfgtable->driver_support)); 7958 /* Need to enable prefetch in the SCSI core for 6400 in x86 */ 7959 #ifdef CONFIG_X86 7960 driver_support |= ENABLE_SCSI_PREFETCH; 7961 #endif 7962 driver_support |= ENABLE_UNIT_ATTN; 7963 writel(driver_support, &(h->cfgtable->driver_support)); 7964 } 7965 7966 /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result 7967 * in a prefetch beyond physical memory. 7968 */ 7969 static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h) 7970 { 7971 u32 dma_prefetch; 7972 7973 if (h->board_id != 0x3225103C) 7974 return; 7975 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG); 7976 dma_prefetch |= 0x8000; 7977 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG); 7978 } 7979 7980 static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h) 7981 { 7982 int i; 7983 u32 doorbell_value; 7984 unsigned long flags; 7985 /* wait until the clear_event_notify bit 6 is cleared by controller. */ 7986 for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) { 7987 spin_lock_irqsave(&h->lock, flags); 7988 doorbell_value = readl(h->vaddr + SA5_DOORBELL); 7989 spin_unlock_irqrestore(&h->lock, flags); 7990 if (!(doorbell_value & DOORBELL_CLEAR_EVENTS)) 7991 goto done; 7992 /* delay and try again */ 7993 msleep(CLEAR_EVENT_WAIT_INTERVAL); 7994 } 7995 return -ENODEV; 7996 done: 7997 return 0; 7998 } 7999 8000 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h) 8001 { 8002 int i; 8003 u32 doorbell_value; 8004 unsigned long flags; 8005 8006 /* under certain very rare conditions, this can take awhile. 8007 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right 8008 * as we enter this code.) 8009 */ 8010 for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) { 8011 if (h->remove_in_progress) 8012 goto done; 8013 spin_lock_irqsave(&h->lock, flags); 8014 doorbell_value = readl(h->vaddr + SA5_DOORBELL); 8015 spin_unlock_irqrestore(&h->lock, flags); 8016 if (!(doorbell_value & CFGTBL_ChangeReq)) 8017 goto done; 8018 /* delay and try again */ 8019 msleep(MODE_CHANGE_WAIT_INTERVAL); 8020 } 8021 return -ENODEV; 8022 done: 8023 return 0; 8024 } 8025 8026 /* return -ENODEV or other reason on error, 0 on success */ 8027 static int hpsa_enter_simple_mode(struct ctlr_info *h) 8028 { 8029 u32 trans_support; 8030 8031 trans_support = readl(&(h->cfgtable->TransportSupport)); 8032 if (!(trans_support & SIMPLE_MODE)) 8033 return -ENOTSUPP; 8034 8035 h->max_commands = readl(&(h->cfgtable->CmdsOutMax)); 8036 8037 /* Update the field, and then ring the doorbell */ 8038 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest)); 8039 writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi); 8040 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 8041 if (hpsa_wait_for_mode_change_ack(h)) 8042 goto error; 8043 print_cfg_table(&h->pdev->dev, h->cfgtable); 8044 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) 8045 goto error; 8046 h->transMethod = CFGTBL_Trans_Simple; 8047 return 0; 8048 error: 8049 dev_err(&h->pdev->dev, "failed to enter simple mode\n"); 8050 return -ENODEV; 8051 } 8052 8053 /* free items allocated or mapped by hpsa_pci_init */ 8054 static void hpsa_free_pci_init(struct ctlr_info *h) 8055 { 8056 hpsa_free_cfgtables(h); /* pci_init 4 */ 8057 iounmap(h->vaddr); /* pci_init 3 */ 8058 h->vaddr = NULL; 8059 hpsa_disable_interrupt_mode(h); /* pci_init 2 */ 8060 /* 8061 * call pci_disable_device before pci_release_regions per 8062 * Documentation/PCI/pci.txt 8063 */ 8064 pci_disable_device(h->pdev); /* pci_init 1 */ 8065 pci_release_regions(h->pdev); /* pci_init 2 */ 8066 } 8067 8068 /* several items must be freed later */ 8069 static int hpsa_pci_init(struct ctlr_info *h) 8070 { 8071 int prod_index, err; 8072 8073 prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id); 8074 if (prod_index < 0) 8075 return prod_index; 8076 h->product_name = products[prod_index].product_name; 8077 h->access = *(products[prod_index].access); 8078 8079 h->needs_abort_tags_swizzled = 8080 ctlr_needs_abort_tags_swizzled(h->board_id); 8081 8082 pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S | 8083 PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM); 8084 8085 err = pci_enable_device(h->pdev); 8086 if (err) { 8087 dev_err(&h->pdev->dev, "failed to enable PCI device\n"); 8088 pci_disable_device(h->pdev); 8089 return err; 8090 } 8091 8092 err = pci_request_regions(h->pdev, HPSA); 8093 if (err) { 8094 dev_err(&h->pdev->dev, 8095 "failed to obtain PCI resources\n"); 8096 pci_disable_device(h->pdev); 8097 return err; 8098 } 8099 8100 pci_set_master(h->pdev); 8101 8102 err = hpsa_interrupt_mode(h); 8103 if (err) 8104 goto clean1; 8105 err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr); 8106 if (err) 8107 goto clean2; /* intmode+region, pci */ 8108 h->vaddr = remap_pci_mem(h->paddr, 0x250); 8109 if (!h->vaddr) { 8110 dev_err(&h->pdev->dev, "failed to remap PCI mem\n"); 8111 err = -ENOMEM; 8112 goto clean2; /* intmode+region, pci */ 8113 } 8114 err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 8115 if (err) 8116 goto clean3; /* vaddr, intmode+region, pci */ 8117 err = hpsa_find_cfgtables(h); 8118 if (err) 8119 goto clean3; /* vaddr, intmode+region, pci */ 8120 hpsa_find_board_params(h); 8121 8122 if (!hpsa_CISS_signature_present(h)) { 8123 err = -ENODEV; 8124 goto clean4; /* cfgtables, vaddr, intmode+region, pci */ 8125 } 8126 hpsa_set_driver_support_bits(h); 8127 hpsa_p600_dma_prefetch_quirk(h); 8128 err = hpsa_enter_simple_mode(h); 8129 if (err) 8130 goto clean4; /* cfgtables, vaddr, intmode+region, pci */ 8131 return 0; 8132 8133 clean4: /* cfgtables, vaddr, intmode+region, pci */ 8134 hpsa_free_cfgtables(h); 8135 clean3: /* vaddr, intmode+region, pci */ 8136 iounmap(h->vaddr); 8137 h->vaddr = NULL; 8138 clean2: /* intmode+region, pci */ 8139 hpsa_disable_interrupt_mode(h); 8140 clean1: 8141 /* 8142 * call pci_disable_device before pci_release_regions per 8143 * Documentation/PCI/pci.txt 8144 */ 8145 pci_disable_device(h->pdev); 8146 pci_release_regions(h->pdev); 8147 return err; 8148 } 8149 8150 static void hpsa_hba_inquiry(struct ctlr_info *h) 8151 { 8152 int rc; 8153 8154 #define HBA_INQUIRY_BYTE_COUNT 64 8155 h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL); 8156 if (!h->hba_inquiry_data) 8157 return; 8158 rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0, 8159 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT); 8160 if (rc != 0) { 8161 kfree(h->hba_inquiry_data); 8162 h->hba_inquiry_data = NULL; 8163 } 8164 } 8165 8166 static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id) 8167 { 8168 int rc, i; 8169 void __iomem *vaddr; 8170 8171 if (!reset_devices) 8172 return 0; 8173 8174 /* kdump kernel is loading, we don't know in which state is 8175 * the pci interface. The dev->enable_cnt is equal zero 8176 * so we call enable+disable, wait a while and switch it on. 8177 */ 8178 rc = pci_enable_device(pdev); 8179 if (rc) { 8180 dev_warn(&pdev->dev, "Failed to enable PCI device\n"); 8181 return -ENODEV; 8182 } 8183 pci_disable_device(pdev); 8184 msleep(260); /* a randomly chosen number */ 8185 rc = pci_enable_device(pdev); 8186 if (rc) { 8187 dev_warn(&pdev->dev, "failed to enable device.\n"); 8188 return -ENODEV; 8189 } 8190 8191 pci_set_master(pdev); 8192 8193 vaddr = pci_ioremap_bar(pdev, 0); 8194 if (vaddr == NULL) { 8195 rc = -ENOMEM; 8196 goto out_disable; 8197 } 8198 writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET); 8199 iounmap(vaddr); 8200 8201 /* Reset the controller with a PCI power-cycle or via doorbell */ 8202 rc = hpsa_kdump_hard_reset_controller(pdev, board_id); 8203 8204 /* -ENOTSUPP here means we cannot reset the controller 8205 * but it's already (and still) up and running in 8206 * "performant mode". Or, it might be 640x, which can't reset 8207 * due to concerns about shared bbwc between 6402/6404 pair. 8208 */ 8209 if (rc) 8210 goto out_disable; 8211 8212 /* Now try to get the controller to respond to a no-op */ 8213 dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n"); 8214 for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) { 8215 if (hpsa_noop(pdev) == 0) 8216 break; 8217 else 8218 dev_warn(&pdev->dev, "no-op failed%s\n", 8219 (i < 11 ? "; re-trying" : "")); 8220 } 8221 8222 out_disable: 8223 8224 pci_disable_device(pdev); 8225 return rc; 8226 } 8227 8228 static void hpsa_free_cmd_pool(struct ctlr_info *h) 8229 { 8230 kfree(h->cmd_pool_bits); 8231 h->cmd_pool_bits = NULL; 8232 if (h->cmd_pool) { 8233 pci_free_consistent(h->pdev, 8234 h->nr_cmds * sizeof(struct CommandList), 8235 h->cmd_pool, 8236 h->cmd_pool_dhandle); 8237 h->cmd_pool = NULL; 8238 h->cmd_pool_dhandle = 0; 8239 } 8240 if (h->errinfo_pool) { 8241 pci_free_consistent(h->pdev, 8242 h->nr_cmds * sizeof(struct ErrorInfo), 8243 h->errinfo_pool, 8244 h->errinfo_pool_dhandle); 8245 h->errinfo_pool = NULL; 8246 h->errinfo_pool_dhandle = 0; 8247 } 8248 } 8249 8250 static int hpsa_alloc_cmd_pool(struct ctlr_info *h) 8251 { 8252 h->cmd_pool_bits = kzalloc( 8253 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) * 8254 sizeof(unsigned long), GFP_KERNEL); 8255 h->cmd_pool = pci_alloc_consistent(h->pdev, 8256 h->nr_cmds * sizeof(*h->cmd_pool), 8257 &(h->cmd_pool_dhandle)); 8258 h->errinfo_pool = pci_alloc_consistent(h->pdev, 8259 h->nr_cmds * sizeof(*h->errinfo_pool), 8260 &(h->errinfo_pool_dhandle)); 8261 if ((h->cmd_pool_bits == NULL) 8262 || (h->cmd_pool == NULL) 8263 || (h->errinfo_pool == NULL)) { 8264 dev_err(&h->pdev->dev, "out of memory in %s", __func__); 8265 goto clean_up; 8266 } 8267 hpsa_preinitialize_commands(h); 8268 return 0; 8269 clean_up: 8270 hpsa_free_cmd_pool(h); 8271 return -ENOMEM; 8272 } 8273 8274 /* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */ 8275 static void hpsa_free_irqs(struct ctlr_info *h) 8276 { 8277 int i; 8278 8279 if (!h->msix_vectors || h->intr_mode != PERF_MODE_INT) { 8280 /* Single reply queue, only one irq to free */ 8281 free_irq(pci_irq_vector(h->pdev, 0), &h->q[h->intr_mode]); 8282 h->q[h->intr_mode] = 0; 8283 return; 8284 } 8285 8286 for (i = 0; i < h->msix_vectors; i++) { 8287 free_irq(pci_irq_vector(h->pdev, i), &h->q[i]); 8288 h->q[i] = 0; 8289 } 8290 for (; i < MAX_REPLY_QUEUES; i++) 8291 h->q[i] = 0; 8292 } 8293 8294 /* returns 0 on success; cleans up and returns -Enn on error */ 8295 static int hpsa_request_irqs(struct ctlr_info *h, 8296 irqreturn_t (*msixhandler)(int, void *), 8297 irqreturn_t (*intxhandler)(int, void *)) 8298 { 8299 int rc, i; 8300 8301 /* 8302 * initialize h->q[x] = x so that interrupt handlers know which 8303 * queue to process. 8304 */ 8305 for (i = 0; i < MAX_REPLY_QUEUES; i++) 8306 h->q[i] = (u8) i; 8307 8308 if (h->intr_mode == PERF_MODE_INT && h->msix_vectors > 0) { 8309 /* If performant mode and MSI-X, use multiple reply queues */ 8310 for (i = 0; i < h->msix_vectors; i++) { 8311 sprintf(h->intrname[i], "%s-msix%d", h->devname, i); 8312 rc = request_irq(pci_irq_vector(h->pdev, i), msixhandler, 8313 0, h->intrname[i], 8314 &h->q[i]); 8315 if (rc) { 8316 int j; 8317 8318 dev_err(&h->pdev->dev, 8319 "failed to get irq %d for %s\n", 8320 pci_irq_vector(h->pdev, i), h->devname); 8321 for (j = 0; j < i; j++) { 8322 free_irq(pci_irq_vector(h->pdev, j), &h->q[j]); 8323 h->q[j] = 0; 8324 } 8325 for (; j < MAX_REPLY_QUEUES; j++) 8326 h->q[j] = 0; 8327 return rc; 8328 } 8329 } 8330 } else { 8331 /* Use single reply pool */ 8332 if (h->msix_vectors > 0 || h->pdev->msi_enabled) { 8333 sprintf(h->intrname[0], "%s-msi%s", h->devname, 8334 h->msix_vectors ? "x" : ""); 8335 rc = request_irq(pci_irq_vector(h->pdev, 0), 8336 msixhandler, 0, 8337 h->intrname[0], 8338 &h->q[h->intr_mode]); 8339 } else { 8340 sprintf(h->intrname[h->intr_mode], 8341 "%s-intx", h->devname); 8342 rc = request_irq(pci_irq_vector(h->pdev, 0), 8343 intxhandler, IRQF_SHARED, 8344 h->intrname[0], 8345 &h->q[h->intr_mode]); 8346 } 8347 } 8348 if (rc) { 8349 dev_err(&h->pdev->dev, "failed to get irq %d for %s\n", 8350 pci_irq_vector(h->pdev, 0), h->devname); 8351 hpsa_free_irqs(h); 8352 return -ENODEV; 8353 } 8354 return 0; 8355 } 8356 8357 static int hpsa_kdump_soft_reset(struct ctlr_info *h) 8358 { 8359 int rc; 8360 hpsa_send_host_reset(h, RAID_CTLR_LUNID, HPSA_RESET_TYPE_CONTROLLER); 8361 8362 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n"); 8363 rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY); 8364 if (rc) { 8365 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n"); 8366 return rc; 8367 } 8368 8369 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n"); 8370 rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 8371 if (rc) { 8372 dev_warn(&h->pdev->dev, "Board failed to become ready " 8373 "after soft reset.\n"); 8374 return rc; 8375 } 8376 8377 return 0; 8378 } 8379 8380 static void hpsa_free_reply_queues(struct ctlr_info *h) 8381 { 8382 int i; 8383 8384 for (i = 0; i < h->nreply_queues; i++) { 8385 if (!h->reply_queue[i].head) 8386 continue; 8387 pci_free_consistent(h->pdev, 8388 h->reply_queue_size, 8389 h->reply_queue[i].head, 8390 h->reply_queue[i].busaddr); 8391 h->reply_queue[i].head = NULL; 8392 h->reply_queue[i].busaddr = 0; 8393 } 8394 h->reply_queue_size = 0; 8395 } 8396 8397 static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h) 8398 { 8399 hpsa_free_performant_mode(h); /* init_one 7 */ 8400 hpsa_free_sg_chain_blocks(h); /* init_one 6 */ 8401 hpsa_free_cmd_pool(h); /* init_one 5 */ 8402 hpsa_free_irqs(h); /* init_one 4 */ 8403 scsi_host_put(h->scsi_host); /* init_one 3 */ 8404 h->scsi_host = NULL; /* init_one 3 */ 8405 hpsa_free_pci_init(h); /* init_one 2_5 */ 8406 free_percpu(h->lockup_detected); /* init_one 2 */ 8407 h->lockup_detected = NULL; /* init_one 2 */ 8408 if (h->resubmit_wq) { 8409 destroy_workqueue(h->resubmit_wq); /* init_one 1 */ 8410 h->resubmit_wq = NULL; 8411 } 8412 if (h->rescan_ctlr_wq) { 8413 destroy_workqueue(h->rescan_ctlr_wq); 8414 h->rescan_ctlr_wq = NULL; 8415 } 8416 kfree(h); /* init_one 1 */ 8417 } 8418 8419 /* Called when controller lockup detected. */ 8420 static void fail_all_outstanding_cmds(struct ctlr_info *h) 8421 { 8422 int i, refcount; 8423 struct CommandList *c; 8424 int failcount = 0; 8425 8426 flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */ 8427 for (i = 0; i < h->nr_cmds; i++) { 8428 c = h->cmd_pool + i; 8429 refcount = atomic_inc_return(&c->refcount); 8430 if (refcount > 1) { 8431 c->err_info->CommandStatus = CMD_CTLR_LOCKUP; 8432 finish_cmd(c); 8433 atomic_dec(&h->commands_outstanding); 8434 failcount++; 8435 } 8436 cmd_free(h, c); 8437 } 8438 dev_warn(&h->pdev->dev, 8439 "failed %d commands in fail_all\n", failcount); 8440 } 8441 8442 static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value) 8443 { 8444 int cpu; 8445 8446 for_each_online_cpu(cpu) { 8447 u32 *lockup_detected; 8448 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 8449 *lockup_detected = value; 8450 } 8451 wmb(); /* be sure the per-cpu variables are out to memory */ 8452 } 8453 8454 static void controller_lockup_detected(struct ctlr_info *h) 8455 { 8456 unsigned long flags; 8457 u32 lockup_detected; 8458 8459 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8460 spin_lock_irqsave(&h->lock, flags); 8461 lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET); 8462 if (!lockup_detected) { 8463 /* no heartbeat, but controller gave us a zero. */ 8464 dev_warn(&h->pdev->dev, 8465 "lockup detected after %d but scratchpad register is zero\n", 8466 h->heartbeat_sample_interval / HZ); 8467 lockup_detected = 0xffffffff; 8468 } 8469 set_lockup_detected_for_all_cpus(h, lockup_detected); 8470 spin_unlock_irqrestore(&h->lock, flags); 8471 dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n", 8472 lockup_detected, h->heartbeat_sample_interval / HZ); 8473 pci_disable_device(h->pdev); 8474 fail_all_outstanding_cmds(h); 8475 } 8476 8477 static int detect_controller_lockup(struct ctlr_info *h) 8478 { 8479 u64 now; 8480 u32 heartbeat; 8481 unsigned long flags; 8482 8483 now = get_jiffies_64(); 8484 /* If we've received an interrupt recently, we're ok. */ 8485 if (time_after64(h->last_intr_timestamp + 8486 (h->heartbeat_sample_interval), now)) 8487 return false; 8488 8489 /* 8490 * If we've already checked the heartbeat recently, we're ok. 8491 * This could happen if someone sends us a signal. We 8492 * otherwise don't care about signals in this thread. 8493 */ 8494 if (time_after64(h->last_heartbeat_timestamp + 8495 (h->heartbeat_sample_interval), now)) 8496 return false; 8497 8498 /* If heartbeat has not changed since we last looked, we're not ok. */ 8499 spin_lock_irqsave(&h->lock, flags); 8500 heartbeat = readl(&h->cfgtable->HeartBeat); 8501 spin_unlock_irqrestore(&h->lock, flags); 8502 if (h->last_heartbeat == heartbeat) { 8503 controller_lockup_detected(h); 8504 return true; 8505 } 8506 8507 /* We're ok. */ 8508 h->last_heartbeat = heartbeat; 8509 h->last_heartbeat_timestamp = now; 8510 return false; 8511 } 8512 8513 static void hpsa_ack_ctlr_events(struct ctlr_info *h) 8514 { 8515 int i; 8516 char *event_type; 8517 8518 if (!(h->fw_support & MISC_FW_EVENT_NOTIFY)) 8519 return; 8520 8521 /* Ask the controller to clear the events we're handling. */ 8522 if ((h->transMethod & (CFGTBL_Trans_io_accel1 8523 | CFGTBL_Trans_io_accel2)) && 8524 (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE || 8525 h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) { 8526 8527 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE) 8528 event_type = "state change"; 8529 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE) 8530 event_type = "configuration change"; 8531 /* Stop sending new RAID offload reqs via the IO accelerator */ 8532 scsi_block_requests(h->scsi_host); 8533 for (i = 0; i < h->ndevices; i++) { 8534 h->dev[i]->offload_enabled = 0; 8535 h->dev[i]->offload_to_be_enabled = 0; 8536 } 8537 hpsa_drain_accel_commands(h); 8538 /* Set 'accelerator path config change' bit */ 8539 dev_warn(&h->pdev->dev, 8540 "Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n", 8541 h->events, event_type); 8542 writel(h->events, &(h->cfgtable->clear_event_notify)); 8543 /* Set the "clear event notify field update" bit 6 */ 8544 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL); 8545 /* Wait until ctlr clears 'clear event notify field', bit 6 */ 8546 hpsa_wait_for_clear_event_notify_ack(h); 8547 scsi_unblock_requests(h->scsi_host); 8548 } else { 8549 /* Acknowledge controller notification events. */ 8550 writel(h->events, &(h->cfgtable->clear_event_notify)); 8551 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL); 8552 hpsa_wait_for_clear_event_notify_ack(h); 8553 #if 0 8554 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 8555 hpsa_wait_for_mode_change_ack(h); 8556 #endif 8557 } 8558 return; 8559 } 8560 8561 /* Check a register on the controller to see if there are configuration 8562 * changes (added/changed/removed logical drives, etc.) which mean that 8563 * we should rescan the controller for devices. 8564 * Also check flag for driver-initiated rescan. 8565 */ 8566 static int hpsa_ctlr_needs_rescan(struct ctlr_info *h) 8567 { 8568 if (h->drv_req_rescan) { 8569 h->drv_req_rescan = 0; 8570 return 1; 8571 } 8572 8573 if (!(h->fw_support & MISC_FW_EVENT_NOTIFY)) 8574 return 0; 8575 8576 h->events = readl(&(h->cfgtable->event_notify)); 8577 return h->events & RESCAN_REQUIRED_EVENT_BITS; 8578 } 8579 8580 /* 8581 * Check if any of the offline devices have become ready 8582 */ 8583 static int hpsa_offline_devices_ready(struct ctlr_info *h) 8584 { 8585 unsigned long flags; 8586 struct offline_device_entry *d; 8587 struct list_head *this, *tmp; 8588 8589 spin_lock_irqsave(&h->offline_device_lock, flags); 8590 list_for_each_safe(this, tmp, &h->offline_device_list) { 8591 d = list_entry(this, struct offline_device_entry, 8592 offline_list); 8593 spin_unlock_irqrestore(&h->offline_device_lock, flags); 8594 if (!hpsa_volume_offline(h, d->scsi3addr)) { 8595 spin_lock_irqsave(&h->offline_device_lock, flags); 8596 list_del(&d->offline_list); 8597 spin_unlock_irqrestore(&h->offline_device_lock, flags); 8598 return 1; 8599 } 8600 spin_lock_irqsave(&h->offline_device_lock, flags); 8601 } 8602 spin_unlock_irqrestore(&h->offline_device_lock, flags); 8603 return 0; 8604 } 8605 8606 static int hpsa_luns_changed(struct ctlr_info *h) 8607 { 8608 int rc = 1; /* assume there are changes */ 8609 struct ReportLUNdata *logdev = NULL; 8610 8611 /* if we can't find out if lun data has changed, 8612 * assume that it has. 8613 */ 8614 8615 if (!h->lastlogicals) 8616 return rc; 8617 8618 logdev = kzalloc(sizeof(*logdev), GFP_KERNEL); 8619 if (!logdev) 8620 return rc; 8621 8622 if (hpsa_scsi_do_report_luns(h, 1, logdev, sizeof(*logdev), 0)) { 8623 dev_warn(&h->pdev->dev, 8624 "report luns failed, can't track lun changes.\n"); 8625 goto out; 8626 } 8627 if (memcmp(logdev, h->lastlogicals, sizeof(*logdev))) { 8628 dev_info(&h->pdev->dev, 8629 "Lun changes detected.\n"); 8630 memcpy(h->lastlogicals, logdev, sizeof(*logdev)); 8631 goto out; 8632 } else 8633 rc = 0; /* no changes detected. */ 8634 out: 8635 kfree(logdev); 8636 return rc; 8637 } 8638 8639 static void hpsa_rescan_ctlr_worker(struct work_struct *work) 8640 { 8641 unsigned long flags; 8642 struct ctlr_info *h = container_of(to_delayed_work(work), 8643 struct ctlr_info, rescan_ctlr_work); 8644 8645 8646 if (h->remove_in_progress) 8647 return; 8648 8649 /* 8650 * Do the scan after the reset 8651 */ 8652 if (h->reset_in_progress) { 8653 h->drv_req_rescan = 1; 8654 return; 8655 } 8656 8657 if (hpsa_ctlr_needs_rescan(h) || hpsa_offline_devices_ready(h)) { 8658 scsi_host_get(h->scsi_host); 8659 hpsa_ack_ctlr_events(h); 8660 hpsa_scan_start(h->scsi_host); 8661 scsi_host_put(h->scsi_host); 8662 } else if (h->discovery_polling) { 8663 hpsa_disable_rld_caching(h); 8664 if (hpsa_luns_changed(h)) { 8665 struct Scsi_Host *sh = NULL; 8666 8667 dev_info(&h->pdev->dev, 8668 "driver discovery polling rescan.\n"); 8669 sh = scsi_host_get(h->scsi_host); 8670 if (sh != NULL) { 8671 hpsa_scan_start(sh); 8672 scsi_host_put(sh); 8673 } 8674 } 8675 } 8676 spin_lock_irqsave(&h->lock, flags); 8677 if (!h->remove_in_progress) 8678 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work, 8679 h->heartbeat_sample_interval); 8680 spin_unlock_irqrestore(&h->lock, flags); 8681 } 8682 8683 static void hpsa_monitor_ctlr_worker(struct work_struct *work) 8684 { 8685 unsigned long flags; 8686 struct ctlr_info *h = container_of(to_delayed_work(work), 8687 struct ctlr_info, monitor_ctlr_work); 8688 8689 detect_controller_lockup(h); 8690 if (lockup_detected(h)) 8691 return; 8692 8693 spin_lock_irqsave(&h->lock, flags); 8694 if (!h->remove_in_progress) 8695 schedule_delayed_work(&h->monitor_ctlr_work, 8696 h->heartbeat_sample_interval); 8697 spin_unlock_irqrestore(&h->lock, flags); 8698 } 8699 8700 static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h, 8701 char *name) 8702 { 8703 struct workqueue_struct *wq = NULL; 8704 8705 wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr); 8706 if (!wq) 8707 dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name); 8708 8709 return wq; 8710 } 8711 8712 static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 8713 { 8714 int dac, rc; 8715 struct ctlr_info *h; 8716 int try_soft_reset = 0; 8717 unsigned long flags; 8718 u32 board_id; 8719 8720 if (number_of_controllers == 0) 8721 printk(KERN_INFO DRIVER_NAME "\n"); 8722 8723 rc = hpsa_lookup_board_id(pdev, &board_id); 8724 if (rc < 0) { 8725 dev_warn(&pdev->dev, "Board ID not found\n"); 8726 return rc; 8727 } 8728 8729 rc = hpsa_init_reset_devices(pdev, board_id); 8730 if (rc) { 8731 if (rc != -ENOTSUPP) 8732 return rc; 8733 /* If the reset fails in a particular way (it has no way to do 8734 * a proper hard reset, so returns -ENOTSUPP) we can try to do 8735 * a soft reset once we get the controller configured up to the 8736 * point that it can accept a command. 8737 */ 8738 try_soft_reset = 1; 8739 rc = 0; 8740 } 8741 8742 reinit_after_soft_reset: 8743 8744 /* Command structures must be aligned on a 32-byte boundary because 8745 * the 5 lower bits of the address are used by the hardware. and by 8746 * the driver. See comments in hpsa.h for more info. 8747 */ 8748 BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT); 8749 h = kzalloc(sizeof(*h), GFP_KERNEL); 8750 if (!h) { 8751 dev_err(&pdev->dev, "Failed to allocate controller head\n"); 8752 return -ENOMEM; 8753 } 8754 8755 h->pdev = pdev; 8756 8757 h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT; 8758 INIT_LIST_HEAD(&h->offline_device_list); 8759 spin_lock_init(&h->lock); 8760 spin_lock_init(&h->offline_device_lock); 8761 spin_lock_init(&h->scan_lock); 8762 atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS); 8763 atomic_set(&h->abort_cmds_available, HPSA_CMDS_RESERVED_FOR_ABORTS); 8764 8765 /* Allocate and clear per-cpu variable lockup_detected */ 8766 h->lockup_detected = alloc_percpu(u32); 8767 if (!h->lockup_detected) { 8768 dev_err(&h->pdev->dev, "Failed to allocate lockup detector\n"); 8769 rc = -ENOMEM; 8770 goto clean1; /* aer/h */ 8771 } 8772 set_lockup_detected_for_all_cpus(h, 0); 8773 8774 rc = hpsa_pci_init(h); 8775 if (rc) 8776 goto clean2; /* lu, aer/h */ 8777 8778 /* relies on h-> settings made by hpsa_pci_init, including 8779 * interrupt_mode h->intr */ 8780 rc = hpsa_scsi_host_alloc(h); 8781 if (rc) 8782 goto clean2_5; /* pci, lu, aer/h */ 8783 8784 sprintf(h->devname, HPSA "%d", h->scsi_host->host_no); 8785 h->ctlr = number_of_controllers; 8786 number_of_controllers++; 8787 8788 /* configure PCI DMA stuff */ 8789 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 8790 if (rc == 0) { 8791 dac = 1; 8792 } else { 8793 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 8794 if (rc == 0) { 8795 dac = 0; 8796 } else { 8797 dev_err(&pdev->dev, "no suitable DMA available\n"); 8798 goto clean3; /* shost, pci, lu, aer/h */ 8799 } 8800 } 8801 8802 /* make sure the board interrupts are off */ 8803 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8804 8805 rc = hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx); 8806 if (rc) 8807 goto clean3; /* shost, pci, lu, aer/h */ 8808 rc = hpsa_alloc_cmd_pool(h); 8809 if (rc) 8810 goto clean4; /* irq, shost, pci, lu, aer/h */ 8811 rc = hpsa_alloc_sg_chain_blocks(h); 8812 if (rc) 8813 goto clean5; /* cmd, irq, shost, pci, lu, aer/h */ 8814 init_waitqueue_head(&h->scan_wait_queue); 8815 init_waitqueue_head(&h->abort_cmd_wait_queue); 8816 init_waitqueue_head(&h->event_sync_wait_queue); 8817 mutex_init(&h->reset_mutex); 8818 h->scan_finished = 1; /* no scan currently in progress */ 8819 h->scan_waiting = 0; 8820 8821 pci_set_drvdata(pdev, h); 8822 h->ndevices = 0; 8823 8824 spin_lock_init(&h->devlock); 8825 rc = hpsa_put_ctlr_into_performant_mode(h); 8826 if (rc) 8827 goto clean6; /* sg, cmd, irq, shost, pci, lu, aer/h */ 8828 8829 /* create the resubmit workqueue */ 8830 h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan"); 8831 if (!h->rescan_ctlr_wq) { 8832 rc = -ENOMEM; 8833 goto clean7; 8834 } 8835 8836 h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit"); 8837 if (!h->resubmit_wq) { 8838 rc = -ENOMEM; 8839 goto clean7; /* aer/h */ 8840 } 8841 8842 /* 8843 * At this point, the controller is ready to take commands. 8844 * Now, if reset_devices and the hard reset didn't work, try 8845 * the soft reset and see if that works. 8846 */ 8847 if (try_soft_reset) { 8848 8849 /* This is kind of gross. We may or may not get a completion 8850 * from the soft reset command, and if we do, then the value 8851 * from the fifo may or may not be valid. So, we wait 10 secs 8852 * after the reset throwing away any completions we get during 8853 * that time. Unregister the interrupt handler and register 8854 * fake ones to scoop up any residual completions. 8855 */ 8856 spin_lock_irqsave(&h->lock, flags); 8857 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8858 spin_unlock_irqrestore(&h->lock, flags); 8859 hpsa_free_irqs(h); 8860 rc = hpsa_request_irqs(h, hpsa_msix_discard_completions, 8861 hpsa_intx_discard_completions); 8862 if (rc) { 8863 dev_warn(&h->pdev->dev, 8864 "Failed to request_irq after soft reset.\n"); 8865 /* 8866 * cannot goto clean7 or free_irqs will be called 8867 * again. Instead, do its work 8868 */ 8869 hpsa_free_performant_mode(h); /* clean7 */ 8870 hpsa_free_sg_chain_blocks(h); /* clean6 */ 8871 hpsa_free_cmd_pool(h); /* clean5 */ 8872 /* 8873 * skip hpsa_free_irqs(h) clean4 since that 8874 * was just called before request_irqs failed 8875 */ 8876 goto clean3; 8877 } 8878 8879 rc = hpsa_kdump_soft_reset(h); 8880 if (rc) 8881 /* Neither hard nor soft reset worked, we're hosed. */ 8882 goto clean7; 8883 8884 dev_info(&h->pdev->dev, "Board READY.\n"); 8885 dev_info(&h->pdev->dev, 8886 "Waiting for stale completions to drain.\n"); 8887 h->access.set_intr_mask(h, HPSA_INTR_ON); 8888 msleep(10000); 8889 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8890 8891 rc = controller_reset_failed(h->cfgtable); 8892 if (rc) 8893 dev_info(&h->pdev->dev, 8894 "Soft reset appears to have failed.\n"); 8895 8896 /* since the controller's reset, we have to go back and re-init 8897 * everything. Easiest to just forget what we've done and do it 8898 * all over again. 8899 */ 8900 hpsa_undo_allocations_after_kdump_soft_reset(h); 8901 try_soft_reset = 0; 8902 if (rc) 8903 /* don't goto clean, we already unallocated */ 8904 return -ENODEV; 8905 8906 goto reinit_after_soft_reset; 8907 } 8908 8909 /* Enable Accelerated IO path at driver layer */ 8910 h->acciopath_status = 1; 8911 /* Disable discovery polling.*/ 8912 h->discovery_polling = 0; 8913 8914 8915 /* Turn the interrupts on so we can service requests */ 8916 h->access.set_intr_mask(h, HPSA_INTR_ON); 8917 8918 hpsa_hba_inquiry(h); 8919 8920 h->lastlogicals = kzalloc(sizeof(*(h->lastlogicals)), GFP_KERNEL); 8921 if (!h->lastlogicals) 8922 dev_info(&h->pdev->dev, 8923 "Can't track change to report lun data\n"); 8924 8925 /* hook into SCSI subsystem */ 8926 rc = hpsa_scsi_add_host(h); 8927 if (rc) 8928 goto clean7; /* perf, sg, cmd, irq, shost, pci, lu, aer/h */ 8929 8930 /* Monitor the controller for firmware lockups */ 8931 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 8932 INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker); 8933 schedule_delayed_work(&h->monitor_ctlr_work, 8934 h->heartbeat_sample_interval); 8935 INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker); 8936 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work, 8937 h->heartbeat_sample_interval); 8938 return 0; 8939 8940 clean7: /* perf, sg, cmd, irq, shost, pci, lu, aer/h */ 8941 hpsa_free_performant_mode(h); 8942 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8943 clean6: /* sg, cmd, irq, pci, lockup, wq/aer/h */ 8944 hpsa_free_sg_chain_blocks(h); 8945 clean5: /* cmd, irq, shost, pci, lu, aer/h */ 8946 hpsa_free_cmd_pool(h); 8947 clean4: /* irq, shost, pci, lu, aer/h */ 8948 hpsa_free_irqs(h); 8949 clean3: /* shost, pci, lu, aer/h */ 8950 scsi_host_put(h->scsi_host); 8951 h->scsi_host = NULL; 8952 clean2_5: /* pci, lu, aer/h */ 8953 hpsa_free_pci_init(h); 8954 clean2: /* lu, aer/h */ 8955 if (h->lockup_detected) { 8956 free_percpu(h->lockup_detected); 8957 h->lockup_detected = NULL; 8958 } 8959 clean1: /* wq/aer/h */ 8960 if (h->resubmit_wq) { 8961 destroy_workqueue(h->resubmit_wq); 8962 h->resubmit_wq = NULL; 8963 } 8964 if (h->rescan_ctlr_wq) { 8965 destroy_workqueue(h->rescan_ctlr_wq); 8966 h->rescan_ctlr_wq = NULL; 8967 } 8968 kfree(h); 8969 return rc; 8970 } 8971 8972 static void hpsa_flush_cache(struct ctlr_info *h) 8973 { 8974 char *flush_buf; 8975 struct CommandList *c; 8976 int rc; 8977 8978 if (unlikely(lockup_detected(h))) 8979 return; 8980 flush_buf = kzalloc(4, GFP_KERNEL); 8981 if (!flush_buf) 8982 return; 8983 8984 c = cmd_alloc(h); 8985 8986 if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0, 8987 RAID_CTLR_LUNID, TYPE_CMD)) { 8988 goto out; 8989 } 8990 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 8991 PCI_DMA_TODEVICE, DEFAULT_TIMEOUT); 8992 if (rc) 8993 goto out; 8994 if (c->err_info->CommandStatus != 0) 8995 out: 8996 dev_warn(&h->pdev->dev, 8997 "error flushing cache on controller\n"); 8998 cmd_free(h, c); 8999 kfree(flush_buf); 9000 } 9001 9002 /* Make controller gather fresh report lun data each time we 9003 * send down a report luns request 9004 */ 9005 static void hpsa_disable_rld_caching(struct ctlr_info *h) 9006 { 9007 u32 *options; 9008 struct CommandList *c; 9009 int rc; 9010 9011 /* Don't bother trying to set diag options if locked up */ 9012 if (unlikely(h->lockup_detected)) 9013 return; 9014 9015 options = kzalloc(sizeof(*options), GFP_KERNEL); 9016 if (!options) 9017 return; 9018 9019 c = cmd_alloc(h); 9020 9021 /* first, get the current diag options settings */ 9022 if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0, 9023 RAID_CTLR_LUNID, TYPE_CMD)) 9024 goto errout; 9025 9026 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 9027 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 9028 if ((rc != 0) || (c->err_info->CommandStatus != 0)) 9029 goto errout; 9030 9031 /* Now, set the bit for disabling the RLD caching */ 9032 *options |= HPSA_DIAG_OPTS_DISABLE_RLD_CACHING; 9033 9034 if (fill_cmd(c, BMIC_SET_DIAG_OPTIONS, h, options, 4, 0, 9035 RAID_CTLR_LUNID, TYPE_CMD)) 9036 goto errout; 9037 9038 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 9039 PCI_DMA_TODEVICE, DEFAULT_TIMEOUT); 9040 if ((rc != 0) || (c->err_info->CommandStatus != 0)) 9041 goto errout; 9042 9043 /* Now verify that it got set: */ 9044 if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0, 9045 RAID_CTLR_LUNID, TYPE_CMD)) 9046 goto errout; 9047 9048 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 9049 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 9050 if ((rc != 0) || (c->err_info->CommandStatus != 0)) 9051 goto errout; 9052 9053 if (*options & HPSA_DIAG_OPTS_DISABLE_RLD_CACHING) 9054 goto out; 9055 9056 errout: 9057 dev_err(&h->pdev->dev, 9058 "Error: failed to disable report lun data caching.\n"); 9059 out: 9060 cmd_free(h, c); 9061 kfree(options); 9062 } 9063 9064 static void hpsa_shutdown(struct pci_dev *pdev) 9065 { 9066 struct ctlr_info *h; 9067 9068 h = pci_get_drvdata(pdev); 9069 /* Turn board interrupts off and send the flush cache command 9070 * sendcmd will turn off interrupt, and send the flush... 9071 * To write all data in the battery backed cache to disks 9072 */ 9073 hpsa_flush_cache(h); 9074 h->access.set_intr_mask(h, HPSA_INTR_OFF); 9075 hpsa_free_irqs(h); /* init_one 4 */ 9076 hpsa_disable_interrupt_mode(h); /* pci_init 2 */ 9077 } 9078 9079 static void hpsa_free_device_info(struct ctlr_info *h) 9080 { 9081 int i; 9082 9083 for (i = 0; i < h->ndevices; i++) { 9084 kfree(h->dev[i]); 9085 h->dev[i] = NULL; 9086 } 9087 } 9088 9089 static void hpsa_remove_one(struct pci_dev *pdev) 9090 { 9091 struct ctlr_info *h; 9092 unsigned long flags; 9093 9094 if (pci_get_drvdata(pdev) == NULL) { 9095 dev_err(&pdev->dev, "unable to remove device\n"); 9096 return; 9097 } 9098 h = pci_get_drvdata(pdev); 9099 9100 /* Get rid of any controller monitoring work items */ 9101 spin_lock_irqsave(&h->lock, flags); 9102 h->remove_in_progress = 1; 9103 spin_unlock_irqrestore(&h->lock, flags); 9104 cancel_delayed_work_sync(&h->monitor_ctlr_work); 9105 cancel_delayed_work_sync(&h->rescan_ctlr_work); 9106 destroy_workqueue(h->rescan_ctlr_wq); 9107 destroy_workqueue(h->resubmit_wq); 9108 9109 /* 9110 * Call before disabling interrupts. 9111 * scsi_remove_host can trigger I/O operations especially 9112 * when multipath is enabled. There can be SYNCHRONIZE CACHE 9113 * operations which cannot complete and will hang the system. 9114 */ 9115 if (h->scsi_host) 9116 scsi_remove_host(h->scsi_host); /* init_one 8 */ 9117 /* includes hpsa_free_irqs - init_one 4 */ 9118 /* includes hpsa_disable_interrupt_mode - pci_init 2 */ 9119 hpsa_shutdown(pdev); 9120 9121 hpsa_free_device_info(h); /* scan */ 9122 9123 kfree(h->hba_inquiry_data); /* init_one 10 */ 9124 h->hba_inquiry_data = NULL; /* init_one 10 */ 9125 hpsa_free_ioaccel2_sg_chain_blocks(h); 9126 hpsa_free_performant_mode(h); /* init_one 7 */ 9127 hpsa_free_sg_chain_blocks(h); /* init_one 6 */ 9128 hpsa_free_cmd_pool(h); /* init_one 5 */ 9129 kfree(h->lastlogicals); 9130 9131 /* hpsa_free_irqs already called via hpsa_shutdown init_one 4 */ 9132 9133 scsi_host_put(h->scsi_host); /* init_one 3 */ 9134 h->scsi_host = NULL; /* init_one 3 */ 9135 9136 /* includes hpsa_disable_interrupt_mode - pci_init 2 */ 9137 hpsa_free_pci_init(h); /* init_one 2.5 */ 9138 9139 free_percpu(h->lockup_detected); /* init_one 2 */ 9140 h->lockup_detected = NULL; /* init_one 2 */ 9141 /* (void) pci_disable_pcie_error_reporting(pdev); */ /* init_one 1 */ 9142 9143 hpsa_delete_sas_host(h); 9144 9145 kfree(h); /* init_one 1 */ 9146 } 9147 9148 static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev, 9149 __attribute__((unused)) pm_message_t state) 9150 { 9151 return -ENOSYS; 9152 } 9153 9154 static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev) 9155 { 9156 return -ENOSYS; 9157 } 9158 9159 static struct pci_driver hpsa_pci_driver = { 9160 .name = HPSA, 9161 .probe = hpsa_init_one, 9162 .remove = hpsa_remove_one, 9163 .id_table = hpsa_pci_device_id, /* id_table */ 9164 .shutdown = hpsa_shutdown, 9165 .suspend = hpsa_suspend, 9166 .resume = hpsa_resume, 9167 }; 9168 9169 /* Fill in bucket_map[], given nsgs (the max number of 9170 * scatter gather elements supported) and bucket[], 9171 * which is an array of 8 integers. The bucket[] array 9172 * contains 8 different DMA transfer sizes (in 16 9173 * byte increments) which the controller uses to fetch 9174 * commands. This function fills in bucket_map[], which 9175 * maps a given number of scatter gather elements to one of 9176 * the 8 DMA transfer sizes. The point of it is to allow the 9177 * controller to only do as much DMA as needed to fetch the 9178 * command, with the DMA transfer size encoded in the lower 9179 * bits of the command address. 9180 */ 9181 static void calc_bucket_map(int bucket[], int num_buckets, 9182 int nsgs, int min_blocks, u32 *bucket_map) 9183 { 9184 int i, j, b, size; 9185 9186 /* Note, bucket_map must have nsgs+1 entries. */ 9187 for (i = 0; i <= nsgs; i++) { 9188 /* Compute size of a command with i SG entries */ 9189 size = i + min_blocks; 9190 b = num_buckets; /* Assume the biggest bucket */ 9191 /* Find the bucket that is just big enough */ 9192 for (j = 0; j < num_buckets; j++) { 9193 if (bucket[j] >= size) { 9194 b = j; 9195 break; 9196 } 9197 } 9198 /* for a command with i SG entries, use bucket b. */ 9199 bucket_map[i] = b; 9200 } 9201 } 9202 9203 /* 9204 * return -ENODEV on err, 0 on success (or no action) 9205 * allocates numerous items that must be freed later 9206 */ 9207 static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support) 9208 { 9209 int i; 9210 unsigned long register_value; 9211 unsigned long transMethod = CFGTBL_Trans_Performant | 9212 (trans_support & CFGTBL_Trans_use_short_tags) | 9213 CFGTBL_Trans_enable_directed_msix | 9214 (trans_support & (CFGTBL_Trans_io_accel1 | 9215 CFGTBL_Trans_io_accel2)); 9216 struct access_method access = SA5_performant_access; 9217 9218 /* This is a bit complicated. There are 8 registers on 9219 * the controller which we write to to tell it 8 different 9220 * sizes of commands which there may be. It's a way of 9221 * reducing the DMA done to fetch each command. Encoded into 9222 * each command's tag are 3 bits which communicate to the controller 9223 * which of the eight sizes that command fits within. The size of 9224 * each command depends on how many scatter gather entries there are. 9225 * Each SG entry requires 16 bytes. The eight registers are programmed 9226 * with the number of 16-byte blocks a command of that size requires. 9227 * The smallest command possible requires 5 such 16 byte blocks. 9228 * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte 9229 * blocks. Note, this only extends to the SG entries contained 9230 * within the command block, and does not extend to chained blocks 9231 * of SG elements. bft[] contains the eight values we write to 9232 * the registers. They are not evenly distributed, but have more 9233 * sizes for small commands, and fewer sizes for larger commands. 9234 */ 9235 int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4}; 9236 #define MIN_IOACCEL2_BFT_ENTRY 5 9237 #define HPSA_IOACCEL2_HEADER_SZ 4 9238 int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12, 9239 13, 14, 15, 16, 17, 18, 19, 9240 HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES}; 9241 BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16); 9242 BUILD_BUG_ON(ARRAY_SIZE(bft) != 8); 9243 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) > 9244 16 * MIN_IOACCEL2_BFT_ENTRY); 9245 BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16); 9246 BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4); 9247 /* 5 = 1 s/g entry or 4k 9248 * 6 = 2 s/g entry or 8k 9249 * 8 = 4 s/g entry or 16k 9250 * 10 = 6 s/g entry or 24k 9251 */ 9252 9253 /* If the controller supports either ioaccel method then 9254 * we can also use the RAID stack submit path that does not 9255 * perform the superfluous readl() after each command submission. 9256 */ 9257 if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2)) 9258 access = SA5_performant_access_no_read; 9259 9260 /* Controller spec: zero out this buffer. */ 9261 for (i = 0; i < h->nreply_queues; i++) 9262 memset(h->reply_queue[i].head, 0, h->reply_queue_size); 9263 9264 bft[7] = SG_ENTRIES_IN_CMD + 4; 9265 calc_bucket_map(bft, ARRAY_SIZE(bft), 9266 SG_ENTRIES_IN_CMD, 4, h->blockFetchTable); 9267 for (i = 0; i < 8; i++) 9268 writel(bft[i], &h->transtable->BlockFetch[i]); 9269 9270 /* size of controller ring buffer */ 9271 writel(h->max_commands, &h->transtable->RepQSize); 9272 writel(h->nreply_queues, &h->transtable->RepQCount); 9273 writel(0, &h->transtable->RepQCtrAddrLow32); 9274 writel(0, &h->transtable->RepQCtrAddrHigh32); 9275 9276 for (i = 0; i < h->nreply_queues; i++) { 9277 writel(0, &h->transtable->RepQAddr[i].upper); 9278 writel(h->reply_queue[i].busaddr, 9279 &h->transtable->RepQAddr[i].lower); 9280 } 9281 9282 writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi); 9283 writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest)); 9284 /* 9285 * enable outbound interrupt coalescing in accelerator mode; 9286 */ 9287 if (trans_support & CFGTBL_Trans_io_accel1) { 9288 access = SA5_ioaccel_mode1_access; 9289 writel(10, &h->cfgtable->HostWrite.CoalIntDelay); 9290 writel(4, &h->cfgtable->HostWrite.CoalIntCount); 9291 } else 9292 if (trans_support & CFGTBL_Trans_io_accel2) 9293 access = SA5_ioaccel_mode2_access; 9294 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 9295 if (hpsa_wait_for_mode_change_ack(h)) { 9296 dev_err(&h->pdev->dev, 9297 "performant mode problem - doorbell timeout\n"); 9298 return -ENODEV; 9299 } 9300 register_value = readl(&(h->cfgtable->TransportActive)); 9301 if (!(register_value & CFGTBL_Trans_Performant)) { 9302 dev_err(&h->pdev->dev, 9303 "performant mode problem - transport not active\n"); 9304 return -ENODEV; 9305 } 9306 /* Change the access methods to the performant access methods */ 9307 h->access = access; 9308 h->transMethod = transMethod; 9309 9310 if (!((trans_support & CFGTBL_Trans_io_accel1) || 9311 (trans_support & CFGTBL_Trans_io_accel2))) 9312 return 0; 9313 9314 if (trans_support & CFGTBL_Trans_io_accel1) { 9315 /* Set up I/O accelerator mode */ 9316 for (i = 0; i < h->nreply_queues; i++) { 9317 writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX); 9318 h->reply_queue[i].current_entry = 9319 readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX); 9320 } 9321 bft[7] = h->ioaccel_maxsg + 8; 9322 calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8, 9323 h->ioaccel1_blockFetchTable); 9324 9325 /* initialize all reply queue entries to unused */ 9326 for (i = 0; i < h->nreply_queues; i++) 9327 memset(h->reply_queue[i].head, 9328 (u8) IOACCEL_MODE1_REPLY_UNUSED, 9329 h->reply_queue_size); 9330 9331 /* set all the constant fields in the accelerator command 9332 * frames once at init time to save CPU cycles later. 9333 */ 9334 for (i = 0; i < h->nr_cmds; i++) { 9335 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i]; 9336 9337 cp->function = IOACCEL1_FUNCTION_SCSIIO; 9338 cp->err_info = (u32) (h->errinfo_pool_dhandle + 9339 (i * sizeof(struct ErrorInfo))); 9340 cp->err_info_len = sizeof(struct ErrorInfo); 9341 cp->sgl_offset = IOACCEL1_SGLOFFSET; 9342 cp->host_context_flags = 9343 cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT); 9344 cp->timeout_sec = 0; 9345 cp->ReplyQueue = 0; 9346 cp->tag = 9347 cpu_to_le64((i << DIRECT_LOOKUP_SHIFT)); 9348 cp->host_addr = 9349 cpu_to_le64(h->ioaccel_cmd_pool_dhandle + 9350 (i * sizeof(struct io_accel1_cmd))); 9351 } 9352 } else if (trans_support & CFGTBL_Trans_io_accel2) { 9353 u64 cfg_offset, cfg_base_addr_index; 9354 u32 bft2_offset, cfg_base_addr; 9355 int rc; 9356 9357 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 9358 &cfg_base_addr_index, &cfg_offset); 9359 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64); 9360 bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ; 9361 calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg, 9362 4, h->ioaccel2_blockFetchTable); 9363 bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset); 9364 BUILD_BUG_ON(offsetof(struct CfgTable, 9365 io_accel_request_size_offset) != 0xb8); 9366 h->ioaccel2_bft2_regs = 9367 remap_pci_mem(pci_resource_start(h->pdev, 9368 cfg_base_addr_index) + 9369 cfg_offset + bft2_offset, 9370 ARRAY_SIZE(bft2) * 9371 sizeof(*h->ioaccel2_bft2_regs)); 9372 for (i = 0; i < ARRAY_SIZE(bft2); i++) 9373 writel(bft2[i], &h->ioaccel2_bft2_regs[i]); 9374 } 9375 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 9376 if (hpsa_wait_for_mode_change_ack(h)) { 9377 dev_err(&h->pdev->dev, 9378 "performant mode problem - enabling ioaccel mode\n"); 9379 return -ENODEV; 9380 } 9381 return 0; 9382 } 9383 9384 /* Free ioaccel1 mode command blocks and block fetch table */ 9385 static void hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info *h) 9386 { 9387 if (h->ioaccel_cmd_pool) { 9388 pci_free_consistent(h->pdev, 9389 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool), 9390 h->ioaccel_cmd_pool, 9391 h->ioaccel_cmd_pool_dhandle); 9392 h->ioaccel_cmd_pool = NULL; 9393 h->ioaccel_cmd_pool_dhandle = 0; 9394 } 9395 kfree(h->ioaccel1_blockFetchTable); 9396 h->ioaccel1_blockFetchTable = NULL; 9397 } 9398 9399 /* Allocate ioaccel1 mode command blocks and block fetch table */ 9400 static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h) 9401 { 9402 h->ioaccel_maxsg = 9403 readl(&(h->cfgtable->io_accel_max_embedded_sg_count)); 9404 if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES) 9405 h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES; 9406 9407 /* Command structures must be aligned on a 128-byte boundary 9408 * because the 7 lower bits of the address are used by the 9409 * hardware. 9410 */ 9411 BUILD_BUG_ON(sizeof(struct io_accel1_cmd) % 9412 IOACCEL1_COMMANDLIST_ALIGNMENT); 9413 h->ioaccel_cmd_pool = 9414 pci_alloc_consistent(h->pdev, 9415 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool), 9416 &(h->ioaccel_cmd_pool_dhandle)); 9417 9418 h->ioaccel1_blockFetchTable = 9419 kmalloc(((h->ioaccel_maxsg + 1) * 9420 sizeof(u32)), GFP_KERNEL); 9421 9422 if ((h->ioaccel_cmd_pool == NULL) || 9423 (h->ioaccel1_blockFetchTable == NULL)) 9424 goto clean_up; 9425 9426 memset(h->ioaccel_cmd_pool, 0, 9427 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool)); 9428 return 0; 9429 9430 clean_up: 9431 hpsa_free_ioaccel1_cmd_and_bft(h); 9432 return -ENOMEM; 9433 } 9434 9435 /* Free ioaccel2 mode command blocks and block fetch table */ 9436 static void hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info *h) 9437 { 9438 hpsa_free_ioaccel2_sg_chain_blocks(h); 9439 9440 if (h->ioaccel2_cmd_pool) { 9441 pci_free_consistent(h->pdev, 9442 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 9443 h->ioaccel2_cmd_pool, 9444 h->ioaccel2_cmd_pool_dhandle); 9445 h->ioaccel2_cmd_pool = NULL; 9446 h->ioaccel2_cmd_pool_dhandle = 0; 9447 } 9448 kfree(h->ioaccel2_blockFetchTable); 9449 h->ioaccel2_blockFetchTable = NULL; 9450 } 9451 9452 /* Allocate ioaccel2 mode command blocks and block fetch table */ 9453 static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h) 9454 { 9455 int rc; 9456 9457 /* Allocate ioaccel2 mode command blocks and block fetch table */ 9458 9459 h->ioaccel_maxsg = 9460 readl(&(h->cfgtable->io_accel_max_embedded_sg_count)); 9461 if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES) 9462 h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES; 9463 9464 BUILD_BUG_ON(sizeof(struct io_accel2_cmd) % 9465 IOACCEL2_COMMANDLIST_ALIGNMENT); 9466 h->ioaccel2_cmd_pool = 9467 pci_alloc_consistent(h->pdev, 9468 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 9469 &(h->ioaccel2_cmd_pool_dhandle)); 9470 9471 h->ioaccel2_blockFetchTable = 9472 kmalloc(((h->ioaccel_maxsg + 1) * 9473 sizeof(u32)), GFP_KERNEL); 9474 9475 if ((h->ioaccel2_cmd_pool == NULL) || 9476 (h->ioaccel2_blockFetchTable == NULL)) { 9477 rc = -ENOMEM; 9478 goto clean_up; 9479 } 9480 9481 rc = hpsa_allocate_ioaccel2_sg_chain_blocks(h); 9482 if (rc) 9483 goto clean_up; 9484 9485 memset(h->ioaccel2_cmd_pool, 0, 9486 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool)); 9487 return 0; 9488 9489 clean_up: 9490 hpsa_free_ioaccel2_cmd_and_bft(h); 9491 return rc; 9492 } 9493 9494 /* Free items allocated by hpsa_put_ctlr_into_performant_mode */ 9495 static void hpsa_free_performant_mode(struct ctlr_info *h) 9496 { 9497 kfree(h->blockFetchTable); 9498 h->blockFetchTable = NULL; 9499 hpsa_free_reply_queues(h); 9500 hpsa_free_ioaccel1_cmd_and_bft(h); 9501 hpsa_free_ioaccel2_cmd_and_bft(h); 9502 } 9503 9504 /* return -ENODEV on error, 0 on success (or no action) 9505 * allocates numerous items that must be freed later 9506 */ 9507 static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h) 9508 { 9509 u32 trans_support; 9510 unsigned long transMethod = CFGTBL_Trans_Performant | 9511 CFGTBL_Trans_use_short_tags; 9512 int i, rc; 9513 9514 if (hpsa_simple_mode) 9515 return 0; 9516 9517 trans_support = readl(&(h->cfgtable->TransportSupport)); 9518 if (!(trans_support & PERFORMANT_MODE)) 9519 return 0; 9520 9521 /* Check for I/O accelerator mode support */ 9522 if (trans_support & CFGTBL_Trans_io_accel1) { 9523 transMethod |= CFGTBL_Trans_io_accel1 | 9524 CFGTBL_Trans_enable_directed_msix; 9525 rc = hpsa_alloc_ioaccel1_cmd_and_bft(h); 9526 if (rc) 9527 return rc; 9528 } else if (trans_support & CFGTBL_Trans_io_accel2) { 9529 transMethod |= CFGTBL_Trans_io_accel2 | 9530 CFGTBL_Trans_enable_directed_msix; 9531 rc = hpsa_alloc_ioaccel2_cmd_and_bft(h); 9532 if (rc) 9533 return rc; 9534 } 9535 9536 h->nreply_queues = h->msix_vectors > 0 ? h->msix_vectors : 1; 9537 hpsa_get_max_perf_mode_cmds(h); 9538 /* Performant mode ring buffer and supporting data structures */ 9539 h->reply_queue_size = h->max_commands * sizeof(u64); 9540 9541 for (i = 0; i < h->nreply_queues; i++) { 9542 h->reply_queue[i].head = pci_alloc_consistent(h->pdev, 9543 h->reply_queue_size, 9544 &(h->reply_queue[i].busaddr)); 9545 if (!h->reply_queue[i].head) { 9546 rc = -ENOMEM; 9547 goto clean1; /* rq, ioaccel */ 9548 } 9549 h->reply_queue[i].size = h->max_commands; 9550 h->reply_queue[i].wraparound = 1; /* spec: init to 1 */ 9551 h->reply_queue[i].current_entry = 0; 9552 } 9553 9554 /* Need a block fetch table for performant mode */ 9555 h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) * 9556 sizeof(u32)), GFP_KERNEL); 9557 if (!h->blockFetchTable) { 9558 rc = -ENOMEM; 9559 goto clean1; /* rq, ioaccel */ 9560 } 9561 9562 rc = hpsa_enter_performant_mode(h, trans_support); 9563 if (rc) 9564 goto clean2; /* bft, rq, ioaccel */ 9565 return 0; 9566 9567 clean2: /* bft, rq, ioaccel */ 9568 kfree(h->blockFetchTable); 9569 h->blockFetchTable = NULL; 9570 clean1: /* rq, ioaccel */ 9571 hpsa_free_reply_queues(h); 9572 hpsa_free_ioaccel1_cmd_and_bft(h); 9573 hpsa_free_ioaccel2_cmd_and_bft(h); 9574 return rc; 9575 } 9576 9577 static int is_accelerated_cmd(struct CommandList *c) 9578 { 9579 return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2; 9580 } 9581 9582 static void hpsa_drain_accel_commands(struct ctlr_info *h) 9583 { 9584 struct CommandList *c = NULL; 9585 int i, accel_cmds_out; 9586 int refcount; 9587 9588 do { /* wait for all outstanding ioaccel commands to drain out */ 9589 accel_cmds_out = 0; 9590 for (i = 0; i < h->nr_cmds; i++) { 9591 c = h->cmd_pool + i; 9592 refcount = atomic_inc_return(&c->refcount); 9593 if (refcount > 1) /* Command is allocated */ 9594 accel_cmds_out += is_accelerated_cmd(c); 9595 cmd_free(h, c); 9596 } 9597 if (accel_cmds_out <= 0) 9598 break; 9599 msleep(100); 9600 } while (1); 9601 } 9602 9603 static struct hpsa_sas_phy *hpsa_alloc_sas_phy( 9604 struct hpsa_sas_port *hpsa_sas_port) 9605 { 9606 struct hpsa_sas_phy *hpsa_sas_phy; 9607 struct sas_phy *phy; 9608 9609 hpsa_sas_phy = kzalloc(sizeof(*hpsa_sas_phy), GFP_KERNEL); 9610 if (!hpsa_sas_phy) 9611 return NULL; 9612 9613 phy = sas_phy_alloc(hpsa_sas_port->parent_node->parent_dev, 9614 hpsa_sas_port->next_phy_index); 9615 if (!phy) { 9616 kfree(hpsa_sas_phy); 9617 return NULL; 9618 } 9619 9620 hpsa_sas_port->next_phy_index++; 9621 hpsa_sas_phy->phy = phy; 9622 hpsa_sas_phy->parent_port = hpsa_sas_port; 9623 9624 return hpsa_sas_phy; 9625 } 9626 9627 static void hpsa_free_sas_phy(struct hpsa_sas_phy *hpsa_sas_phy) 9628 { 9629 struct sas_phy *phy = hpsa_sas_phy->phy; 9630 9631 sas_port_delete_phy(hpsa_sas_phy->parent_port->port, phy); 9632 sas_phy_free(phy); 9633 if (hpsa_sas_phy->added_to_port) 9634 list_del(&hpsa_sas_phy->phy_list_entry); 9635 kfree(hpsa_sas_phy); 9636 } 9637 9638 static int hpsa_sas_port_add_phy(struct hpsa_sas_phy *hpsa_sas_phy) 9639 { 9640 int rc; 9641 struct hpsa_sas_port *hpsa_sas_port; 9642 struct sas_phy *phy; 9643 struct sas_identify *identify; 9644 9645 hpsa_sas_port = hpsa_sas_phy->parent_port; 9646 phy = hpsa_sas_phy->phy; 9647 9648 identify = &phy->identify; 9649 memset(identify, 0, sizeof(*identify)); 9650 identify->sas_address = hpsa_sas_port->sas_address; 9651 identify->device_type = SAS_END_DEVICE; 9652 identify->initiator_port_protocols = SAS_PROTOCOL_STP; 9653 identify->target_port_protocols = SAS_PROTOCOL_STP; 9654 phy->minimum_linkrate_hw = SAS_LINK_RATE_UNKNOWN; 9655 phy->maximum_linkrate_hw = SAS_LINK_RATE_UNKNOWN; 9656 phy->minimum_linkrate = SAS_LINK_RATE_UNKNOWN; 9657 phy->maximum_linkrate = SAS_LINK_RATE_UNKNOWN; 9658 phy->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN; 9659 9660 rc = sas_phy_add(hpsa_sas_phy->phy); 9661 if (rc) 9662 return rc; 9663 9664 sas_port_add_phy(hpsa_sas_port->port, hpsa_sas_phy->phy); 9665 list_add_tail(&hpsa_sas_phy->phy_list_entry, 9666 &hpsa_sas_port->phy_list_head); 9667 hpsa_sas_phy->added_to_port = true; 9668 9669 return 0; 9670 } 9671 9672 static int 9673 hpsa_sas_port_add_rphy(struct hpsa_sas_port *hpsa_sas_port, 9674 struct sas_rphy *rphy) 9675 { 9676 struct sas_identify *identify; 9677 9678 identify = &rphy->identify; 9679 identify->sas_address = hpsa_sas_port->sas_address; 9680 identify->initiator_port_protocols = SAS_PROTOCOL_STP; 9681 identify->target_port_protocols = SAS_PROTOCOL_STP; 9682 9683 return sas_rphy_add(rphy); 9684 } 9685 9686 static struct hpsa_sas_port 9687 *hpsa_alloc_sas_port(struct hpsa_sas_node *hpsa_sas_node, 9688 u64 sas_address) 9689 { 9690 int rc; 9691 struct hpsa_sas_port *hpsa_sas_port; 9692 struct sas_port *port; 9693 9694 hpsa_sas_port = kzalloc(sizeof(*hpsa_sas_port), GFP_KERNEL); 9695 if (!hpsa_sas_port) 9696 return NULL; 9697 9698 INIT_LIST_HEAD(&hpsa_sas_port->phy_list_head); 9699 hpsa_sas_port->parent_node = hpsa_sas_node; 9700 9701 port = sas_port_alloc_num(hpsa_sas_node->parent_dev); 9702 if (!port) 9703 goto free_hpsa_port; 9704 9705 rc = sas_port_add(port); 9706 if (rc) 9707 goto free_sas_port; 9708 9709 hpsa_sas_port->port = port; 9710 hpsa_sas_port->sas_address = sas_address; 9711 list_add_tail(&hpsa_sas_port->port_list_entry, 9712 &hpsa_sas_node->port_list_head); 9713 9714 return hpsa_sas_port; 9715 9716 free_sas_port: 9717 sas_port_free(port); 9718 free_hpsa_port: 9719 kfree(hpsa_sas_port); 9720 9721 return NULL; 9722 } 9723 9724 static void hpsa_free_sas_port(struct hpsa_sas_port *hpsa_sas_port) 9725 { 9726 struct hpsa_sas_phy *hpsa_sas_phy; 9727 struct hpsa_sas_phy *next; 9728 9729 list_for_each_entry_safe(hpsa_sas_phy, next, 9730 &hpsa_sas_port->phy_list_head, phy_list_entry) 9731 hpsa_free_sas_phy(hpsa_sas_phy); 9732 9733 sas_port_delete(hpsa_sas_port->port); 9734 list_del(&hpsa_sas_port->port_list_entry); 9735 kfree(hpsa_sas_port); 9736 } 9737 9738 static struct hpsa_sas_node *hpsa_alloc_sas_node(struct device *parent_dev) 9739 { 9740 struct hpsa_sas_node *hpsa_sas_node; 9741 9742 hpsa_sas_node = kzalloc(sizeof(*hpsa_sas_node), GFP_KERNEL); 9743 if (hpsa_sas_node) { 9744 hpsa_sas_node->parent_dev = parent_dev; 9745 INIT_LIST_HEAD(&hpsa_sas_node->port_list_head); 9746 } 9747 9748 return hpsa_sas_node; 9749 } 9750 9751 static void hpsa_free_sas_node(struct hpsa_sas_node *hpsa_sas_node) 9752 { 9753 struct hpsa_sas_port *hpsa_sas_port; 9754 struct hpsa_sas_port *next; 9755 9756 if (!hpsa_sas_node) 9757 return; 9758 9759 list_for_each_entry_safe(hpsa_sas_port, next, 9760 &hpsa_sas_node->port_list_head, port_list_entry) 9761 hpsa_free_sas_port(hpsa_sas_port); 9762 9763 kfree(hpsa_sas_node); 9764 } 9765 9766 static struct hpsa_scsi_dev_t 9767 *hpsa_find_device_by_sas_rphy(struct ctlr_info *h, 9768 struct sas_rphy *rphy) 9769 { 9770 int i; 9771 struct hpsa_scsi_dev_t *device; 9772 9773 for (i = 0; i < h->ndevices; i++) { 9774 device = h->dev[i]; 9775 if (!device->sas_port) 9776 continue; 9777 if (device->sas_port->rphy == rphy) 9778 return device; 9779 } 9780 9781 return NULL; 9782 } 9783 9784 static int hpsa_add_sas_host(struct ctlr_info *h) 9785 { 9786 int rc; 9787 struct device *parent_dev; 9788 struct hpsa_sas_node *hpsa_sas_node; 9789 struct hpsa_sas_port *hpsa_sas_port; 9790 struct hpsa_sas_phy *hpsa_sas_phy; 9791 9792 parent_dev = &h->scsi_host->shost_gendev; 9793 9794 hpsa_sas_node = hpsa_alloc_sas_node(parent_dev); 9795 if (!hpsa_sas_node) 9796 return -ENOMEM; 9797 9798 hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, h->sas_address); 9799 if (!hpsa_sas_port) { 9800 rc = -ENODEV; 9801 goto free_sas_node; 9802 } 9803 9804 hpsa_sas_phy = hpsa_alloc_sas_phy(hpsa_sas_port); 9805 if (!hpsa_sas_phy) { 9806 rc = -ENODEV; 9807 goto free_sas_port; 9808 } 9809 9810 rc = hpsa_sas_port_add_phy(hpsa_sas_phy); 9811 if (rc) 9812 goto free_sas_phy; 9813 9814 h->sas_host = hpsa_sas_node; 9815 9816 return 0; 9817 9818 free_sas_phy: 9819 hpsa_free_sas_phy(hpsa_sas_phy); 9820 free_sas_port: 9821 hpsa_free_sas_port(hpsa_sas_port); 9822 free_sas_node: 9823 hpsa_free_sas_node(hpsa_sas_node); 9824 9825 return rc; 9826 } 9827 9828 static void hpsa_delete_sas_host(struct ctlr_info *h) 9829 { 9830 hpsa_free_sas_node(h->sas_host); 9831 } 9832 9833 static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node, 9834 struct hpsa_scsi_dev_t *device) 9835 { 9836 int rc; 9837 struct hpsa_sas_port *hpsa_sas_port; 9838 struct sas_rphy *rphy; 9839 9840 hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, device->sas_address); 9841 if (!hpsa_sas_port) 9842 return -ENOMEM; 9843 9844 rphy = sas_end_device_alloc(hpsa_sas_port->port); 9845 if (!rphy) { 9846 rc = -ENODEV; 9847 goto free_sas_port; 9848 } 9849 9850 hpsa_sas_port->rphy = rphy; 9851 device->sas_port = hpsa_sas_port; 9852 9853 rc = hpsa_sas_port_add_rphy(hpsa_sas_port, rphy); 9854 if (rc) 9855 goto free_sas_port; 9856 9857 return 0; 9858 9859 free_sas_port: 9860 hpsa_free_sas_port(hpsa_sas_port); 9861 device->sas_port = NULL; 9862 9863 return rc; 9864 } 9865 9866 static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device) 9867 { 9868 if (device->sas_port) { 9869 hpsa_free_sas_port(device->sas_port); 9870 device->sas_port = NULL; 9871 } 9872 } 9873 9874 static int 9875 hpsa_sas_get_linkerrors(struct sas_phy *phy) 9876 { 9877 return 0; 9878 } 9879 9880 static int 9881 hpsa_sas_get_enclosure_identifier(struct sas_rphy *rphy, u64 *identifier) 9882 { 9883 *identifier = 0; 9884 return 0; 9885 } 9886 9887 static int 9888 hpsa_sas_get_bay_identifier(struct sas_rphy *rphy) 9889 { 9890 return -ENXIO; 9891 } 9892 9893 static int 9894 hpsa_sas_phy_reset(struct sas_phy *phy, int hard_reset) 9895 { 9896 return 0; 9897 } 9898 9899 static int 9900 hpsa_sas_phy_enable(struct sas_phy *phy, int enable) 9901 { 9902 return 0; 9903 } 9904 9905 static int 9906 hpsa_sas_phy_setup(struct sas_phy *phy) 9907 { 9908 return 0; 9909 } 9910 9911 static void 9912 hpsa_sas_phy_release(struct sas_phy *phy) 9913 { 9914 } 9915 9916 static int 9917 hpsa_sas_phy_speed(struct sas_phy *phy, struct sas_phy_linkrates *rates) 9918 { 9919 return -EINVAL; 9920 } 9921 9922 /* SMP = Serial Management Protocol */ 9923 static int 9924 hpsa_sas_smp_handler(struct Scsi_Host *shost, struct sas_rphy *rphy, 9925 struct request *req) 9926 { 9927 return -EINVAL; 9928 } 9929 9930 static struct sas_function_template hpsa_sas_transport_functions = { 9931 .get_linkerrors = hpsa_sas_get_linkerrors, 9932 .get_enclosure_identifier = hpsa_sas_get_enclosure_identifier, 9933 .get_bay_identifier = hpsa_sas_get_bay_identifier, 9934 .phy_reset = hpsa_sas_phy_reset, 9935 .phy_enable = hpsa_sas_phy_enable, 9936 .phy_setup = hpsa_sas_phy_setup, 9937 .phy_release = hpsa_sas_phy_release, 9938 .set_phy_speed = hpsa_sas_phy_speed, 9939 .smp_handler = hpsa_sas_smp_handler, 9940 }; 9941 9942 /* 9943 * This is it. Register the PCI driver information for the cards we control 9944 * the OS will call our registered routines when it finds one of our cards. 9945 */ 9946 static int __init hpsa_init(void) 9947 { 9948 int rc; 9949 9950 hpsa_sas_transport_template = 9951 sas_attach_transport(&hpsa_sas_transport_functions); 9952 if (!hpsa_sas_transport_template) 9953 return -ENODEV; 9954 9955 rc = pci_register_driver(&hpsa_pci_driver); 9956 9957 if (rc) 9958 sas_release_transport(hpsa_sas_transport_template); 9959 9960 return rc; 9961 } 9962 9963 static void __exit hpsa_cleanup(void) 9964 { 9965 pci_unregister_driver(&hpsa_pci_driver); 9966 sas_release_transport(hpsa_sas_transport_template); 9967 } 9968 9969 static void __attribute__((unused)) verify_offsets(void) 9970 { 9971 #define VERIFY_OFFSET(member, offset) \ 9972 BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset) 9973 9974 VERIFY_OFFSET(structure_size, 0); 9975 VERIFY_OFFSET(volume_blk_size, 4); 9976 VERIFY_OFFSET(volume_blk_cnt, 8); 9977 VERIFY_OFFSET(phys_blk_shift, 16); 9978 VERIFY_OFFSET(parity_rotation_shift, 17); 9979 VERIFY_OFFSET(strip_size, 18); 9980 VERIFY_OFFSET(disk_starting_blk, 20); 9981 VERIFY_OFFSET(disk_blk_cnt, 28); 9982 VERIFY_OFFSET(data_disks_per_row, 36); 9983 VERIFY_OFFSET(metadata_disks_per_row, 38); 9984 VERIFY_OFFSET(row_cnt, 40); 9985 VERIFY_OFFSET(layout_map_count, 42); 9986 VERIFY_OFFSET(flags, 44); 9987 VERIFY_OFFSET(dekindex, 46); 9988 /* VERIFY_OFFSET(reserved, 48 */ 9989 VERIFY_OFFSET(data, 64); 9990 9991 #undef VERIFY_OFFSET 9992 9993 #define VERIFY_OFFSET(member, offset) \ 9994 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset) 9995 9996 VERIFY_OFFSET(IU_type, 0); 9997 VERIFY_OFFSET(direction, 1); 9998 VERIFY_OFFSET(reply_queue, 2); 9999 /* VERIFY_OFFSET(reserved1, 3); */ 10000 VERIFY_OFFSET(scsi_nexus, 4); 10001 VERIFY_OFFSET(Tag, 8); 10002 VERIFY_OFFSET(cdb, 16); 10003 VERIFY_OFFSET(cciss_lun, 32); 10004 VERIFY_OFFSET(data_len, 40); 10005 VERIFY_OFFSET(cmd_priority_task_attr, 44); 10006 VERIFY_OFFSET(sg_count, 45); 10007 /* VERIFY_OFFSET(reserved3 */ 10008 VERIFY_OFFSET(err_ptr, 48); 10009 VERIFY_OFFSET(err_len, 56); 10010 /* VERIFY_OFFSET(reserved4 */ 10011 VERIFY_OFFSET(sg, 64); 10012 10013 #undef VERIFY_OFFSET 10014 10015 #define VERIFY_OFFSET(member, offset) \ 10016 BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset) 10017 10018 VERIFY_OFFSET(dev_handle, 0x00); 10019 VERIFY_OFFSET(reserved1, 0x02); 10020 VERIFY_OFFSET(function, 0x03); 10021 VERIFY_OFFSET(reserved2, 0x04); 10022 VERIFY_OFFSET(err_info, 0x0C); 10023 VERIFY_OFFSET(reserved3, 0x10); 10024 VERIFY_OFFSET(err_info_len, 0x12); 10025 VERIFY_OFFSET(reserved4, 0x13); 10026 VERIFY_OFFSET(sgl_offset, 0x14); 10027 VERIFY_OFFSET(reserved5, 0x15); 10028 VERIFY_OFFSET(transfer_len, 0x1C); 10029 VERIFY_OFFSET(reserved6, 0x20); 10030 VERIFY_OFFSET(io_flags, 0x24); 10031 VERIFY_OFFSET(reserved7, 0x26); 10032 VERIFY_OFFSET(LUN, 0x34); 10033 VERIFY_OFFSET(control, 0x3C); 10034 VERIFY_OFFSET(CDB, 0x40); 10035 VERIFY_OFFSET(reserved8, 0x50); 10036 VERIFY_OFFSET(host_context_flags, 0x60); 10037 VERIFY_OFFSET(timeout_sec, 0x62); 10038 VERIFY_OFFSET(ReplyQueue, 0x64); 10039 VERIFY_OFFSET(reserved9, 0x65); 10040 VERIFY_OFFSET(tag, 0x68); 10041 VERIFY_OFFSET(host_addr, 0x70); 10042 VERIFY_OFFSET(CISS_LUN, 0x78); 10043 VERIFY_OFFSET(SG, 0x78 + 8); 10044 #undef VERIFY_OFFSET 10045 } 10046 10047 module_init(hpsa_init); 10048 module_exit(hpsa_cleanup); 10049