1 /* 2 * Disk Array driver for HP Smart Array SAS controllers 3 * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P. 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License as published by 7 * the Free Software Foundation; version 2 of the License. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or 12 * NON INFRINGEMENT. See the GNU General Public License for more details. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program; if not, write to the Free Software 16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 17 * 18 * Questions/Comments/Bugfixes to iss_storagedev@hp.com 19 * 20 */ 21 22 #include <linux/module.h> 23 #include <linux/interrupt.h> 24 #include <linux/types.h> 25 #include <linux/pci.h> 26 #include <linux/pci-aspm.h> 27 #include <linux/kernel.h> 28 #include <linux/slab.h> 29 #include <linux/delay.h> 30 #include <linux/fs.h> 31 #include <linux/timer.h> 32 #include <linux/seq_file.h> 33 #include <linux/init.h> 34 #include <linux/spinlock.h> 35 #include <linux/compat.h> 36 #include <linux/blktrace_api.h> 37 #include <linux/uaccess.h> 38 #include <linux/io.h> 39 #include <linux/dma-mapping.h> 40 #include <linux/completion.h> 41 #include <linux/moduleparam.h> 42 #include <scsi/scsi.h> 43 #include <scsi/scsi_cmnd.h> 44 #include <scsi/scsi_device.h> 45 #include <scsi/scsi_host.h> 46 #include <scsi/scsi_tcq.h> 47 #include <linux/cciss_ioctl.h> 48 #include <linux/string.h> 49 #include <linux/bitmap.h> 50 #include <linux/atomic.h> 51 #include <linux/kthread.h> 52 #include <linux/jiffies.h> 53 #include "hpsa_cmd.h" 54 #include "hpsa.h" 55 56 /* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */ 57 #define HPSA_DRIVER_VERSION "2.0.2-1" 58 #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")" 59 #define HPSA "hpsa" 60 61 /* How long to wait (in milliseconds) for board to go into simple mode */ 62 #define MAX_CONFIG_WAIT 30000 63 #define MAX_IOCTL_CONFIG_WAIT 1000 64 65 /*define how many times we will try a command because of bus resets */ 66 #define MAX_CMD_RETRIES 3 67 68 /* Embedded module documentation macros - see modules.h */ 69 MODULE_AUTHOR("Hewlett-Packard Company"); 70 MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \ 71 HPSA_DRIVER_VERSION); 72 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers"); 73 MODULE_VERSION(HPSA_DRIVER_VERSION); 74 MODULE_LICENSE("GPL"); 75 76 static int hpsa_allow_any; 77 module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR); 78 MODULE_PARM_DESC(hpsa_allow_any, 79 "Allow hpsa driver to access unknown HP Smart Array hardware"); 80 static int hpsa_simple_mode; 81 module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR); 82 MODULE_PARM_DESC(hpsa_simple_mode, 83 "Use 'simple mode' rather than 'performant mode'"); 84 85 /* define the PCI info for the cards we can control */ 86 static const struct pci_device_id hpsa_pci_device_id[] = { 87 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241}, 88 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243}, 89 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245}, 90 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247}, 91 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249}, 92 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324a}, 93 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324b}, 94 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233}, 95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350}, 96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351}, 97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352}, 98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353}, 99 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354}, 100 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355}, 101 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356}, 102 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 103 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0}, 104 {0,} 105 }; 106 107 MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id); 108 109 /* board_id = Subsystem Device ID & Vendor ID 110 * product = Marketing Name for the board 111 * access = Address of the struct of function pointers 112 */ 113 static struct board_type products[] = { 114 {0x3241103C, "Smart Array P212", &SA5_access}, 115 {0x3243103C, "Smart Array P410", &SA5_access}, 116 {0x3245103C, "Smart Array P410i", &SA5_access}, 117 {0x3247103C, "Smart Array P411", &SA5_access}, 118 {0x3249103C, "Smart Array P812", &SA5_access}, 119 {0x324a103C, "Smart Array P712m", &SA5_access}, 120 {0x324b103C, "Smart Array P711m", &SA5_access}, 121 {0x3350103C, "Smart Array", &SA5_access}, 122 {0x3351103C, "Smart Array", &SA5_access}, 123 {0x3352103C, "Smart Array", &SA5_access}, 124 {0x3353103C, "Smart Array", &SA5_access}, 125 {0x3354103C, "Smart Array", &SA5_access}, 126 {0x3355103C, "Smart Array", &SA5_access}, 127 {0x3356103C, "Smart Array", &SA5_access}, 128 {0xFFFF103C, "Unknown Smart Array", &SA5_access}, 129 }; 130 131 static int number_of_controllers; 132 133 static struct list_head hpsa_ctlr_list = LIST_HEAD_INIT(hpsa_ctlr_list); 134 static spinlock_t lockup_detector_lock; 135 static struct task_struct *hpsa_lockup_detector; 136 137 static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id); 138 static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id); 139 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg); 140 static void start_io(struct ctlr_info *h); 141 142 #ifdef CONFIG_COMPAT 143 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg); 144 #endif 145 146 static void cmd_free(struct ctlr_info *h, struct CommandList *c); 147 static void cmd_special_free(struct ctlr_info *h, struct CommandList *c); 148 static struct CommandList *cmd_alloc(struct ctlr_info *h); 149 static struct CommandList *cmd_special_alloc(struct ctlr_info *h); 150 static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 151 void *buff, size_t size, u8 page_code, unsigned char *scsi3addr, 152 int cmd_type); 153 154 static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd); 155 static void hpsa_scan_start(struct Scsi_Host *); 156 static int hpsa_scan_finished(struct Scsi_Host *sh, 157 unsigned long elapsed_time); 158 static int hpsa_change_queue_depth(struct scsi_device *sdev, 159 int qdepth, int reason); 160 161 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd); 162 static int hpsa_slave_alloc(struct scsi_device *sdev); 163 static void hpsa_slave_destroy(struct scsi_device *sdev); 164 165 static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno); 166 static int check_for_unit_attention(struct ctlr_info *h, 167 struct CommandList *c); 168 static void check_ioctl_unit_attention(struct ctlr_info *h, 169 struct CommandList *c); 170 /* performant mode helper functions */ 171 static void calc_bucket_map(int *bucket, int num_buckets, 172 int nsgs, int *bucket_map); 173 static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h); 174 static inline u32 next_command(struct ctlr_info *h); 175 static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev, 176 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index, 177 u64 *cfg_offset); 178 static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 179 unsigned long *memory_bar); 180 static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id); 181 static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev, 182 void __iomem *vaddr, int wait_for_ready); 183 #define BOARD_NOT_READY 0 184 #define BOARD_READY 1 185 186 static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev) 187 { 188 unsigned long *priv = shost_priv(sdev->host); 189 return (struct ctlr_info *) *priv; 190 } 191 192 static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh) 193 { 194 unsigned long *priv = shost_priv(sh); 195 return (struct ctlr_info *) *priv; 196 } 197 198 static int check_for_unit_attention(struct ctlr_info *h, 199 struct CommandList *c) 200 { 201 if (c->err_info->SenseInfo[2] != UNIT_ATTENTION) 202 return 0; 203 204 switch (c->err_info->SenseInfo[12]) { 205 case STATE_CHANGED: 206 dev_warn(&h->pdev->dev, HPSA "%d: a state change " 207 "detected, command retried\n", h->ctlr); 208 break; 209 case LUN_FAILED: 210 dev_warn(&h->pdev->dev, HPSA "%d: LUN failure " 211 "detected, action required\n", h->ctlr); 212 break; 213 case REPORT_LUNS_CHANGED: 214 dev_warn(&h->pdev->dev, HPSA "%d: report LUN data " 215 "changed, action required\n", h->ctlr); 216 /* 217 * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012. 218 */ 219 break; 220 case POWER_OR_RESET: 221 dev_warn(&h->pdev->dev, HPSA "%d: a power on " 222 "or device reset detected\n", h->ctlr); 223 break; 224 case UNIT_ATTENTION_CLEARED: 225 dev_warn(&h->pdev->dev, HPSA "%d: unit attention " 226 "cleared by another initiator\n", h->ctlr); 227 break; 228 default: 229 dev_warn(&h->pdev->dev, HPSA "%d: unknown " 230 "unit attention detected\n", h->ctlr); 231 break; 232 } 233 return 1; 234 } 235 236 static ssize_t host_store_rescan(struct device *dev, 237 struct device_attribute *attr, 238 const char *buf, size_t count) 239 { 240 struct ctlr_info *h; 241 struct Scsi_Host *shost = class_to_shost(dev); 242 h = shost_to_hba(shost); 243 hpsa_scan_start(h->scsi_host); 244 return count; 245 } 246 247 static ssize_t host_show_firmware_revision(struct device *dev, 248 struct device_attribute *attr, char *buf) 249 { 250 struct ctlr_info *h; 251 struct Scsi_Host *shost = class_to_shost(dev); 252 unsigned char *fwrev; 253 254 h = shost_to_hba(shost); 255 if (!h->hba_inquiry_data) 256 return 0; 257 fwrev = &h->hba_inquiry_data[32]; 258 return snprintf(buf, 20, "%c%c%c%c\n", 259 fwrev[0], fwrev[1], fwrev[2], fwrev[3]); 260 } 261 262 static ssize_t host_show_commands_outstanding(struct device *dev, 263 struct device_attribute *attr, char *buf) 264 { 265 struct Scsi_Host *shost = class_to_shost(dev); 266 struct ctlr_info *h = shost_to_hba(shost); 267 268 return snprintf(buf, 20, "%d\n", h->commands_outstanding); 269 } 270 271 static ssize_t host_show_transport_mode(struct device *dev, 272 struct device_attribute *attr, char *buf) 273 { 274 struct ctlr_info *h; 275 struct Scsi_Host *shost = class_to_shost(dev); 276 277 h = shost_to_hba(shost); 278 return snprintf(buf, 20, "%s\n", 279 h->transMethod & CFGTBL_Trans_Performant ? 280 "performant" : "simple"); 281 } 282 283 /* List of controllers which cannot be hard reset on kexec with reset_devices */ 284 static u32 unresettable_controller[] = { 285 0x324a103C, /* Smart Array P712m */ 286 0x324b103C, /* SmartArray P711m */ 287 0x3223103C, /* Smart Array P800 */ 288 0x3234103C, /* Smart Array P400 */ 289 0x3235103C, /* Smart Array P400i */ 290 0x3211103C, /* Smart Array E200i */ 291 0x3212103C, /* Smart Array E200 */ 292 0x3213103C, /* Smart Array E200i */ 293 0x3214103C, /* Smart Array E200i */ 294 0x3215103C, /* Smart Array E200i */ 295 0x3237103C, /* Smart Array E500 */ 296 0x323D103C, /* Smart Array P700m */ 297 0x40800E11, /* Smart Array 5i */ 298 0x409C0E11, /* Smart Array 6400 */ 299 0x409D0E11, /* Smart Array 6400 EM */ 300 }; 301 302 /* List of controllers which cannot even be soft reset */ 303 static u32 soft_unresettable_controller[] = { 304 0x40800E11, /* Smart Array 5i */ 305 /* Exclude 640x boards. These are two pci devices in one slot 306 * which share a battery backed cache module. One controls the 307 * cache, the other accesses the cache through the one that controls 308 * it. If we reset the one controlling the cache, the other will 309 * likely not be happy. Just forbid resetting this conjoined mess. 310 * The 640x isn't really supported by hpsa anyway. 311 */ 312 0x409C0E11, /* Smart Array 6400 */ 313 0x409D0E11, /* Smart Array 6400 EM */ 314 }; 315 316 static int ctlr_is_hard_resettable(u32 board_id) 317 { 318 int i; 319 320 for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++) 321 if (unresettable_controller[i] == board_id) 322 return 0; 323 return 1; 324 } 325 326 static int ctlr_is_soft_resettable(u32 board_id) 327 { 328 int i; 329 330 for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++) 331 if (soft_unresettable_controller[i] == board_id) 332 return 0; 333 return 1; 334 } 335 336 static int ctlr_is_resettable(u32 board_id) 337 { 338 return ctlr_is_hard_resettable(board_id) || 339 ctlr_is_soft_resettable(board_id); 340 } 341 342 static ssize_t host_show_resettable(struct device *dev, 343 struct device_attribute *attr, char *buf) 344 { 345 struct ctlr_info *h; 346 struct Scsi_Host *shost = class_to_shost(dev); 347 348 h = shost_to_hba(shost); 349 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id)); 350 } 351 352 static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[]) 353 { 354 return (scsi3addr[3] & 0xC0) == 0x40; 355 } 356 357 static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG", 358 "UNKNOWN" 359 }; 360 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1) 361 362 static ssize_t raid_level_show(struct device *dev, 363 struct device_attribute *attr, char *buf) 364 { 365 ssize_t l = 0; 366 unsigned char rlevel; 367 struct ctlr_info *h; 368 struct scsi_device *sdev; 369 struct hpsa_scsi_dev_t *hdev; 370 unsigned long flags; 371 372 sdev = to_scsi_device(dev); 373 h = sdev_to_hba(sdev); 374 spin_lock_irqsave(&h->lock, flags); 375 hdev = sdev->hostdata; 376 if (!hdev) { 377 spin_unlock_irqrestore(&h->lock, flags); 378 return -ENODEV; 379 } 380 381 /* Is this even a logical drive? */ 382 if (!is_logical_dev_addr_mode(hdev->scsi3addr)) { 383 spin_unlock_irqrestore(&h->lock, flags); 384 l = snprintf(buf, PAGE_SIZE, "N/A\n"); 385 return l; 386 } 387 388 rlevel = hdev->raid_level; 389 spin_unlock_irqrestore(&h->lock, flags); 390 if (rlevel > RAID_UNKNOWN) 391 rlevel = RAID_UNKNOWN; 392 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]); 393 return l; 394 } 395 396 static ssize_t lunid_show(struct device *dev, 397 struct device_attribute *attr, char *buf) 398 { 399 struct ctlr_info *h; 400 struct scsi_device *sdev; 401 struct hpsa_scsi_dev_t *hdev; 402 unsigned long flags; 403 unsigned char lunid[8]; 404 405 sdev = to_scsi_device(dev); 406 h = sdev_to_hba(sdev); 407 spin_lock_irqsave(&h->lock, flags); 408 hdev = sdev->hostdata; 409 if (!hdev) { 410 spin_unlock_irqrestore(&h->lock, flags); 411 return -ENODEV; 412 } 413 memcpy(lunid, hdev->scsi3addr, sizeof(lunid)); 414 spin_unlock_irqrestore(&h->lock, flags); 415 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 416 lunid[0], lunid[1], lunid[2], lunid[3], 417 lunid[4], lunid[5], lunid[6], lunid[7]); 418 } 419 420 static ssize_t unique_id_show(struct device *dev, 421 struct device_attribute *attr, char *buf) 422 { 423 struct ctlr_info *h; 424 struct scsi_device *sdev; 425 struct hpsa_scsi_dev_t *hdev; 426 unsigned long flags; 427 unsigned char sn[16]; 428 429 sdev = to_scsi_device(dev); 430 h = sdev_to_hba(sdev); 431 spin_lock_irqsave(&h->lock, flags); 432 hdev = sdev->hostdata; 433 if (!hdev) { 434 spin_unlock_irqrestore(&h->lock, flags); 435 return -ENODEV; 436 } 437 memcpy(sn, hdev->device_id, sizeof(sn)); 438 spin_unlock_irqrestore(&h->lock, flags); 439 return snprintf(buf, 16 * 2 + 2, 440 "%02X%02X%02X%02X%02X%02X%02X%02X" 441 "%02X%02X%02X%02X%02X%02X%02X%02X\n", 442 sn[0], sn[1], sn[2], sn[3], 443 sn[4], sn[5], sn[6], sn[7], 444 sn[8], sn[9], sn[10], sn[11], 445 sn[12], sn[13], sn[14], sn[15]); 446 } 447 448 static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL); 449 static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL); 450 static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL); 451 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan); 452 static DEVICE_ATTR(firmware_revision, S_IRUGO, 453 host_show_firmware_revision, NULL); 454 static DEVICE_ATTR(commands_outstanding, S_IRUGO, 455 host_show_commands_outstanding, NULL); 456 static DEVICE_ATTR(transport_mode, S_IRUGO, 457 host_show_transport_mode, NULL); 458 static DEVICE_ATTR(resettable, S_IRUGO, 459 host_show_resettable, NULL); 460 461 static struct device_attribute *hpsa_sdev_attrs[] = { 462 &dev_attr_raid_level, 463 &dev_attr_lunid, 464 &dev_attr_unique_id, 465 NULL, 466 }; 467 468 static struct device_attribute *hpsa_shost_attrs[] = { 469 &dev_attr_rescan, 470 &dev_attr_firmware_revision, 471 &dev_attr_commands_outstanding, 472 &dev_attr_transport_mode, 473 &dev_attr_resettable, 474 NULL, 475 }; 476 477 static struct scsi_host_template hpsa_driver_template = { 478 .module = THIS_MODULE, 479 .name = HPSA, 480 .proc_name = HPSA, 481 .queuecommand = hpsa_scsi_queue_command, 482 .scan_start = hpsa_scan_start, 483 .scan_finished = hpsa_scan_finished, 484 .change_queue_depth = hpsa_change_queue_depth, 485 .this_id = -1, 486 .use_clustering = ENABLE_CLUSTERING, 487 .eh_device_reset_handler = hpsa_eh_device_reset_handler, 488 .ioctl = hpsa_ioctl, 489 .slave_alloc = hpsa_slave_alloc, 490 .slave_destroy = hpsa_slave_destroy, 491 #ifdef CONFIG_COMPAT 492 .compat_ioctl = hpsa_compat_ioctl, 493 #endif 494 .sdev_attrs = hpsa_sdev_attrs, 495 .shost_attrs = hpsa_shost_attrs, 496 .max_sectors = 8192, 497 }; 498 499 500 /* Enqueuing and dequeuing functions for cmdlists. */ 501 static inline void addQ(struct list_head *list, struct CommandList *c) 502 { 503 list_add_tail(&c->list, list); 504 } 505 506 static inline u32 next_command(struct ctlr_info *h) 507 { 508 u32 a; 509 510 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant))) 511 return h->access.command_completed(h); 512 513 if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) { 514 a = *(h->reply_pool_head); /* Next cmd in ring buffer */ 515 (h->reply_pool_head)++; 516 h->commands_outstanding--; 517 } else { 518 a = FIFO_EMPTY; 519 } 520 /* Check for wraparound */ 521 if (h->reply_pool_head == (h->reply_pool + h->max_commands)) { 522 h->reply_pool_head = h->reply_pool; 523 h->reply_pool_wraparound ^= 1; 524 } 525 return a; 526 } 527 528 /* set_performant_mode: Modify the tag for cciss performant 529 * set bit 0 for pull model, bits 3-1 for block fetch 530 * register number 531 */ 532 static void set_performant_mode(struct ctlr_info *h, struct CommandList *c) 533 { 534 if (likely(h->transMethod & CFGTBL_Trans_Performant)) 535 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1); 536 } 537 538 static void enqueue_cmd_and_start_io(struct ctlr_info *h, 539 struct CommandList *c) 540 { 541 unsigned long flags; 542 543 set_performant_mode(h, c); 544 spin_lock_irqsave(&h->lock, flags); 545 addQ(&h->reqQ, c); 546 h->Qdepth++; 547 start_io(h); 548 spin_unlock_irqrestore(&h->lock, flags); 549 } 550 551 static inline void removeQ(struct CommandList *c) 552 { 553 if (WARN_ON(list_empty(&c->list))) 554 return; 555 list_del_init(&c->list); 556 } 557 558 static inline int is_hba_lunid(unsigned char scsi3addr[]) 559 { 560 return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0; 561 } 562 563 static inline int is_scsi_rev_5(struct ctlr_info *h) 564 { 565 if (!h->hba_inquiry_data) 566 return 0; 567 if ((h->hba_inquiry_data[2] & 0x07) == 5) 568 return 1; 569 return 0; 570 } 571 572 static int hpsa_find_target_lun(struct ctlr_info *h, 573 unsigned char scsi3addr[], int bus, int *target, int *lun) 574 { 575 /* finds an unused bus, target, lun for a new physical device 576 * assumes h->devlock is held 577 */ 578 int i, found = 0; 579 DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES); 580 581 memset(&lun_taken[0], 0, HPSA_MAX_DEVICES >> 3); 582 583 for (i = 0; i < h->ndevices; i++) { 584 if (h->dev[i]->bus == bus && h->dev[i]->target != -1) 585 set_bit(h->dev[i]->target, lun_taken); 586 } 587 588 for (i = 0; i < HPSA_MAX_DEVICES; i++) { 589 if (!test_bit(i, lun_taken)) { 590 /* *bus = 1; */ 591 *target = i; 592 *lun = 0; 593 found = 1; 594 break; 595 } 596 } 597 return !found; 598 } 599 600 /* Add an entry into h->dev[] array. */ 601 static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno, 602 struct hpsa_scsi_dev_t *device, 603 struct hpsa_scsi_dev_t *added[], int *nadded) 604 { 605 /* assumes h->devlock is held */ 606 int n = h->ndevices; 607 int i; 608 unsigned char addr1[8], addr2[8]; 609 struct hpsa_scsi_dev_t *sd; 610 611 if (n >= HPSA_MAX_DEVICES) { 612 dev_err(&h->pdev->dev, "too many devices, some will be " 613 "inaccessible.\n"); 614 return -1; 615 } 616 617 /* physical devices do not have lun or target assigned until now. */ 618 if (device->lun != -1) 619 /* Logical device, lun is already assigned. */ 620 goto lun_assigned; 621 622 /* If this device a non-zero lun of a multi-lun device 623 * byte 4 of the 8-byte LUN addr will contain the logical 624 * unit no, zero otherise. 625 */ 626 if (device->scsi3addr[4] == 0) { 627 /* This is not a non-zero lun of a multi-lun device */ 628 if (hpsa_find_target_lun(h, device->scsi3addr, 629 device->bus, &device->target, &device->lun) != 0) 630 return -1; 631 goto lun_assigned; 632 } 633 634 /* This is a non-zero lun of a multi-lun device. 635 * Search through our list and find the device which 636 * has the same 8 byte LUN address, excepting byte 4. 637 * Assign the same bus and target for this new LUN. 638 * Use the logical unit number from the firmware. 639 */ 640 memcpy(addr1, device->scsi3addr, 8); 641 addr1[4] = 0; 642 for (i = 0; i < n; i++) { 643 sd = h->dev[i]; 644 memcpy(addr2, sd->scsi3addr, 8); 645 addr2[4] = 0; 646 /* differ only in byte 4? */ 647 if (memcmp(addr1, addr2, 8) == 0) { 648 device->bus = sd->bus; 649 device->target = sd->target; 650 device->lun = device->scsi3addr[4]; 651 break; 652 } 653 } 654 if (device->lun == -1) { 655 dev_warn(&h->pdev->dev, "physical device with no LUN=0," 656 " suspect firmware bug or unsupported hardware " 657 "configuration.\n"); 658 return -1; 659 } 660 661 lun_assigned: 662 663 h->dev[n] = device; 664 h->ndevices++; 665 added[*nadded] = device; 666 (*nadded)++; 667 668 /* initially, (before registering with scsi layer) we don't 669 * know our hostno and we don't want to print anything first 670 * time anyway (the scsi layer's inquiries will show that info) 671 */ 672 /* if (hostno != -1) */ 673 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n", 674 scsi_device_type(device->devtype), hostno, 675 device->bus, device->target, device->lun); 676 return 0; 677 } 678 679 /* Replace an entry from h->dev[] array. */ 680 static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno, 681 int entry, struct hpsa_scsi_dev_t *new_entry, 682 struct hpsa_scsi_dev_t *added[], int *nadded, 683 struct hpsa_scsi_dev_t *removed[], int *nremoved) 684 { 685 /* assumes h->devlock is held */ 686 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 687 removed[*nremoved] = h->dev[entry]; 688 (*nremoved)++; 689 690 /* 691 * New physical devices won't have target/lun assigned yet 692 * so we need to preserve the values in the slot we are replacing. 693 */ 694 if (new_entry->target == -1) { 695 new_entry->target = h->dev[entry]->target; 696 new_entry->lun = h->dev[entry]->lun; 697 } 698 699 h->dev[entry] = new_entry; 700 added[*nadded] = new_entry; 701 (*nadded)++; 702 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n", 703 scsi_device_type(new_entry->devtype), hostno, new_entry->bus, 704 new_entry->target, new_entry->lun); 705 } 706 707 /* Remove an entry from h->dev[] array. */ 708 static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry, 709 struct hpsa_scsi_dev_t *removed[], int *nremoved) 710 { 711 /* assumes h->devlock is held */ 712 int i; 713 struct hpsa_scsi_dev_t *sd; 714 715 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 716 717 sd = h->dev[entry]; 718 removed[*nremoved] = h->dev[entry]; 719 (*nremoved)++; 720 721 for (i = entry; i < h->ndevices-1; i++) 722 h->dev[i] = h->dev[i+1]; 723 h->ndevices--; 724 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n", 725 scsi_device_type(sd->devtype), hostno, sd->bus, sd->target, 726 sd->lun); 727 } 728 729 #define SCSI3ADDR_EQ(a, b) ( \ 730 (a)[7] == (b)[7] && \ 731 (a)[6] == (b)[6] && \ 732 (a)[5] == (b)[5] && \ 733 (a)[4] == (b)[4] && \ 734 (a)[3] == (b)[3] && \ 735 (a)[2] == (b)[2] && \ 736 (a)[1] == (b)[1] && \ 737 (a)[0] == (b)[0]) 738 739 static void fixup_botched_add(struct ctlr_info *h, 740 struct hpsa_scsi_dev_t *added) 741 { 742 /* called when scsi_add_device fails in order to re-adjust 743 * h->dev[] to match the mid layer's view. 744 */ 745 unsigned long flags; 746 int i, j; 747 748 spin_lock_irqsave(&h->lock, flags); 749 for (i = 0; i < h->ndevices; i++) { 750 if (h->dev[i] == added) { 751 for (j = i; j < h->ndevices-1; j++) 752 h->dev[j] = h->dev[j+1]; 753 h->ndevices--; 754 break; 755 } 756 } 757 spin_unlock_irqrestore(&h->lock, flags); 758 kfree(added); 759 } 760 761 static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1, 762 struct hpsa_scsi_dev_t *dev2) 763 { 764 /* we compare everything except lun and target as these 765 * are not yet assigned. Compare parts likely 766 * to differ first 767 */ 768 if (memcmp(dev1->scsi3addr, dev2->scsi3addr, 769 sizeof(dev1->scsi3addr)) != 0) 770 return 0; 771 if (memcmp(dev1->device_id, dev2->device_id, 772 sizeof(dev1->device_id)) != 0) 773 return 0; 774 if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0) 775 return 0; 776 if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0) 777 return 0; 778 if (dev1->devtype != dev2->devtype) 779 return 0; 780 if (dev1->bus != dev2->bus) 781 return 0; 782 return 1; 783 } 784 785 /* Find needle in haystack. If exact match found, return DEVICE_SAME, 786 * and return needle location in *index. If scsi3addr matches, but not 787 * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle 788 * location in *index. If needle not found, return DEVICE_NOT_FOUND. 789 */ 790 static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle, 791 struct hpsa_scsi_dev_t *haystack[], int haystack_size, 792 int *index) 793 { 794 int i; 795 #define DEVICE_NOT_FOUND 0 796 #define DEVICE_CHANGED 1 797 #define DEVICE_SAME 2 798 for (i = 0; i < haystack_size; i++) { 799 if (haystack[i] == NULL) /* previously removed. */ 800 continue; 801 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) { 802 *index = i; 803 if (device_is_the_same(needle, haystack[i])) 804 return DEVICE_SAME; 805 else 806 return DEVICE_CHANGED; 807 } 808 } 809 *index = -1; 810 return DEVICE_NOT_FOUND; 811 } 812 813 static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno, 814 struct hpsa_scsi_dev_t *sd[], int nsds) 815 { 816 /* sd contains scsi3 addresses and devtypes, and inquiry 817 * data. This function takes what's in sd to be the current 818 * reality and updates h->dev[] to reflect that reality. 819 */ 820 int i, entry, device_change, changes = 0; 821 struct hpsa_scsi_dev_t *csd; 822 unsigned long flags; 823 struct hpsa_scsi_dev_t **added, **removed; 824 int nadded, nremoved; 825 struct Scsi_Host *sh = NULL; 826 827 added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL); 828 removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL); 829 830 if (!added || !removed) { 831 dev_warn(&h->pdev->dev, "out of memory in " 832 "adjust_hpsa_scsi_table\n"); 833 goto free_and_out; 834 } 835 836 spin_lock_irqsave(&h->devlock, flags); 837 838 /* find any devices in h->dev[] that are not in 839 * sd[] and remove them from h->dev[], and for any 840 * devices which have changed, remove the old device 841 * info and add the new device info. 842 */ 843 i = 0; 844 nremoved = 0; 845 nadded = 0; 846 while (i < h->ndevices) { 847 csd = h->dev[i]; 848 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry); 849 if (device_change == DEVICE_NOT_FOUND) { 850 changes++; 851 hpsa_scsi_remove_entry(h, hostno, i, 852 removed, &nremoved); 853 continue; /* remove ^^^, hence i not incremented */ 854 } else if (device_change == DEVICE_CHANGED) { 855 changes++; 856 hpsa_scsi_replace_entry(h, hostno, i, sd[entry], 857 added, &nadded, removed, &nremoved); 858 /* Set it to NULL to prevent it from being freed 859 * at the bottom of hpsa_update_scsi_devices() 860 */ 861 sd[entry] = NULL; 862 } 863 i++; 864 } 865 866 /* Now, make sure every device listed in sd[] is also 867 * listed in h->dev[], adding them if they aren't found 868 */ 869 870 for (i = 0; i < nsds; i++) { 871 if (!sd[i]) /* if already added above. */ 872 continue; 873 device_change = hpsa_scsi_find_entry(sd[i], h->dev, 874 h->ndevices, &entry); 875 if (device_change == DEVICE_NOT_FOUND) { 876 changes++; 877 if (hpsa_scsi_add_entry(h, hostno, sd[i], 878 added, &nadded) != 0) 879 break; 880 sd[i] = NULL; /* prevent from being freed later. */ 881 } else if (device_change == DEVICE_CHANGED) { 882 /* should never happen... */ 883 changes++; 884 dev_warn(&h->pdev->dev, 885 "device unexpectedly changed.\n"); 886 /* but if it does happen, we just ignore that device */ 887 } 888 } 889 spin_unlock_irqrestore(&h->devlock, flags); 890 891 /* Don't notify scsi mid layer of any changes the first time through 892 * (or if there are no changes) scsi_scan_host will do it later the 893 * first time through. 894 */ 895 if (hostno == -1 || !changes) 896 goto free_and_out; 897 898 sh = h->scsi_host; 899 /* Notify scsi mid layer of any removed devices */ 900 for (i = 0; i < nremoved; i++) { 901 struct scsi_device *sdev = 902 scsi_device_lookup(sh, removed[i]->bus, 903 removed[i]->target, removed[i]->lun); 904 if (sdev != NULL) { 905 scsi_remove_device(sdev); 906 scsi_device_put(sdev); 907 } else { 908 /* We don't expect to get here. 909 * future cmds to this device will get selection 910 * timeout as if the device was gone. 911 */ 912 dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d " 913 " for removal.", hostno, removed[i]->bus, 914 removed[i]->target, removed[i]->lun); 915 } 916 kfree(removed[i]); 917 removed[i] = NULL; 918 } 919 920 /* Notify scsi mid layer of any added devices */ 921 for (i = 0; i < nadded; i++) { 922 if (scsi_add_device(sh, added[i]->bus, 923 added[i]->target, added[i]->lun) == 0) 924 continue; 925 dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, " 926 "device not added.\n", hostno, added[i]->bus, 927 added[i]->target, added[i]->lun); 928 /* now we have to remove it from h->dev, 929 * since it didn't get added to scsi mid layer 930 */ 931 fixup_botched_add(h, added[i]); 932 } 933 934 free_and_out: 935 kfree(added); 936 kfree(removed); 937 } 938 939 /* 940 * Lookup bus/target/lun and retrun corresponding struct hpsa_scsi_dev_t * 941 * Assume's h->devlock is held. 942 */ 943 static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h, 944 int bus, int target, int lun) 945 { 946 int i; 947 struct hpsa_scsi_dev_t *sd; 948 949 for (i = 0; i < h->ndevices; i++) { 950 sd = h->dev[i]; 951 if (sd->bus == bus && sd->target == target && sd->lun == lun) 952 return sd; 953 } 954 return NULL; 955 } 956 957 /* link sdev->hostdata to our per-device structure. */ 958 static int hpsa_slave_alloc(struct scsi_device *sdev) 959 { 960 struct hpsa_scsi_dev_t *sd; 961 unsigned long flags; 962 struct ctlr_info *h; 963 964 h = sdev_to_hba(sdev); 965 spin_lock_irqsave(&h->devlock, flags); 966 sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev), 967 sdev_id(sdev), sdev->lun); 968 if (sd != NULL) 969 sdev->hostdata = sd; 970 spin_unlock_irqrestore(&h->devlock, flags); 971 return 0; 972 } 973 974 static void hpsa_slave_destroy(struct scsi_device *sdev) 975 { 976 /* nothing to do. */ 977 } 978 979 static void hpsa_free_sg_chain_blocks(struct ctlr_info *h) 980 { 981 int i; 982 983 if (!h->cmd_sg_list) 984 return; 985 for (i = 0; i < h->nr_cmds; i++) { 986 kfree(h->cmd_sg_list[i]); 987 h->cmd_sg_list[i] = NULL; 988 } 989 kfree(h->cmd_sg_list); 990 h->cmd_sg_list = NULL; 991 } 992 993 static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h) 994 { 995 int i; 996 997 if (h->chainsize <= 0) 998 return 0; 999 1000 h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds, 1001 GFP_KERNEL); 1002 if (!h->cmd_sg_list) 1003 return -ENOMEM; 1004 for (i = 0; i < h->nr_cmds; i++) { 1005 h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) * 1006 h->chainsize, GFP_KERNEL); 1007 if (!h->cmd_sg_list[i]) 1008 goto clean; 1009 } 1010 return 0; 1011 1012 clean: 1013 hpsa_free_sg_chain_blocks(h); 1014 return -ENOMEM; 1015 } 1016 1017 static void hpsa_map_sg_chain_block(struct ctlr_info *h, 1018 struct CommandList *c) 1019 { 1020 struct SGDescriptor *chain_sg, *chain_block; 1021 u64 temp64; 1022 1023 chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 1024 chain_block = h->cmd_sg_list[c->cmdindex]; 1025 chain_sg->Ext = HPSA_SG_CHAIN; 1026 chain_sg->Len = sizeof(*chain_sg) * 1027 (c->Header.SGTotal - h->max_cmd_sg_entries); 1028 temp64 = pci_map_single(h->pdev, chain_block, chain_sg->Len, 1029 PCI_DMA_TODEVICE); 1030 chain_sg->Addr.lower = (u32) (temp64 & 0x0FFFFFFFFULL); 1031 chain_sg->Addr.upper = (u32) ((temp64 >> 32) & 0x0FFFFFFFFULL); 1032 } 1033 1034 static void hpsa_unmap_sg_chain_block(struct ctlr_info *h, 1035 struct CommandList *c) 1036 { 1037 struct SGDescriptor *chain_sg; 1038 union u64bit temp64; 1039 1040 if (c->Header.SGTotal <= h->max_cmd_sg_entries) 1041 return; 1042 1043 chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 1044 temp64.val32.lower = chain_sg->Addr.lower; 1045 temp64.val32.upper = chain_sg->Addr.upper; 1046 pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE); 1047 } 1048 1049 static void complete_scsi_command(struct CommandList *cp) 1050 { 1051 struct scsi_cmnd *cmd; 1052 struct ctlr_info *h; 1053 struct ErrorInfo *ei; 1054 1055 unsigned char sense_key; 1056 unsigned char asc; /* additional sense code */ 1057 unsigned char ascq; /* additional sense code qualifier */ 1058 unsigned long sense_data_size; 1059 1060 ei = cp->err_info; 1061 cmd = (struct scsi_cmnd *) cp->scsi_cmd; 1062 h = cp->h; 1063 1064 scsi_dma_unmap(cmd); /* undo the DMA mappings */ 1065 if (cp->Header.SGTotal > h->max_cmd_sg_entries) 1066 hpsa_unmap_sg_chain_block(h, cp); 1067 1068 cmd->result = (DID_OK << 16); /* host byte */ 1069 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 1070 cmd->result |= ei->ScsiStatus; 1071 1072 /* copy the sense data whether we need to or not. */ 1073 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo)) 1074 sense_data_size = SCSI_SENSE_BUFFERSIZE; 1075 else 1076 sense_data_size = sizeof(ei->SenseInfo); 1077 if (ei->SenseLen < sense_data_size) 1078 sense_data_size = ei->SenseLen; 1079 1080 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size); 1081 scsi_set_resid(cmd, ei->ResidualCnt); 1082 1083 if (ei->CommandStatus == 0) { 1084 cmd->scsi_done(cmd); 1085 cmd_free(h, cp); 1086 return; 1087 } 1088 1089 /* an error has occurred */ 1090 switch (ei->CommandStatus) { 1091 1092 case CMD_TARGET_STATUS: 1093 if (ei->ScsiStatus) { 1094 /* Get sense key */ 1095 sense_key = 0xf & ei->SenseInfo[2]; 1096 /* Get additional sense code */ 1097 asc = ei->SenseInfo[12]; 1098 /* Get addition sense code qualifier */ 1099 ascq = ei->SenseInfo[13]; 1100 } 1101 1102 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) { 1103 if (check_for_unit_attention(h, cp)) { 1104 cmd->result = DID_SOFT_ERROR << 16; 1105 break; 1106 } 1107 if (sense_key == ILLEGAL_REQUEST) { 1108 /* 1109 * SCSI REPORT_LUNS is commonly unsupported on 1110 * Smart Array. Suppress noisy complaint. 1111 */ 1112 if (cp->Request.CDB[0] == REPORT_LUNS) 1113 break; 1114 1115 /* If ASC/ASCQ indicate Logical Unit 1116 * Not Supported condition, 1117 */ 1118 if ((asc == 0x25) && (ascq == 0x0)) { 1119 dev_warn(&h->pdev->dev, "cp %p " 1120 "has check condition\n", cp); 1121 break; 1122 } 1123 } 1124 1125 if (sense_key == NOT_READY) { 1126 /* If Sense is Not Ready, Logical Unit 1127 * Not ready, Manual Intervention 1128 * required 1129 */ 1130 if ((asc == 0x04) && (ascq == 0x03)) { 1131 dev_warn(&h->pdev->dev, "cp %p " 1132 "has check condition: unit " 1133 "not ready, manual " 1134 "intervention required\n", cp); 1135 break; 1136 } 1137 } 1138 if (sense_key == ABORTED_COMMAND) { 1139 /* Aborted command is retryable */ 1140 dev_warn(&h->pdev->dev, "cp %p " 1141 "has check condition: aborted command: " 1142 "ASC: 0x%x, ASCQ: 0x%x\n", 1143 cp, asc, ascq); 1144 cmd->result = DID_SOFT_ERROR << 16; 1145 break; 1146 } 1147 /* Must be some other type of check condition */ 1148 dev_warn(&h->pdev->dev, "cp %p has check condition: " 1149 "unknown type: " 1150 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, " 1151 "Returning result: 0x%x, " 1152 "cmd=[%02x %02x %02x %02x %02x " 1153 "%02x %02x %02x %02x %02x %02x " 1154 "%02x %02x %02x %02x %02x]\n", 1155 cp, sense_key, asc, ascq, 1156 cmd->result, 1157 cmd->cmnd[0], cmd->cmnd[1], 1158 cmd->cmnd[2], cmd->cmnd[3], 1159 cmd->cmnd[4], cmd->cmnd[5], 1160 cmd->cmnd[6], cmd->cmnd[7], 1161 cmd->cmnd[8], cmd->cmnd[9], 1162 cmd->cmnd[10], cmd->cmnd[11], 1163 cmd->cmnd[12], cmd->cmnd[13], 1164 cmd->cmnd[14], cmd->cmnd[15]); 1165 break; 1166 } 1167 1168 1169 /* Problem was not a check condition 1170 * Pass it up to the upper layers... 1171 */ 1172 if (ei->ScsiStatus) { 1173 dev_warn(&h->pdev->dev, "cp %p has status 0x%x " 1174 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, " 1175 "Returning result: 0x%x\n", 1176 cp, ei->ScsiStatus, 1177 sense_key, asc, ascq, 1178 cmd->result); 1179 } else { /* scsi status is zero??? How??? */ 1180 dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. " 1181 "Returning no connection.\n", cp), 1182 1183 /* Ordinarily, this case should never happen, 1184 * but there is a bug in some released firmware 1185 * revisions that allows it to happen if, for 1186 * example, a 4100 backplane loses power and 1187 * the tape drive is in it. We assume that 1188 * it's a fatal error of some kind because we 1189 * can't show that it wasn't. We will make it 1190 * look like selection timeout since that is 1191 * the most common reason for this to occur, 1192 * and it's severe enough. 1193 */ 1194 1195 cmd->result = DID_NO_CONNECT << 16; 1196 } 1197 break; 1198 1199 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 1200 break; 1201 case CMD_DATA_OVERRUN: 1202 dev_warn(&h->pdev->dev, "cp %p has" 1203 " completed with data overrun " 1204 "reported\n", cp); 1205 break; 1206 case CMD_INVALID: { 1207 /* print_bytes(cp, sizeof(*cp), 1, 0); 1208 print_cmd(cp); */ 1209 /* We get CMD_INVALID if you address a non-existent device 1210 * instead of a selection timeout (no response). You will 1211 * see this if you yank out a drive, then try to access it. 1212 * This is kind of a shame because it means that any other 1213 * CMD_INVALID (e.g. driver bug) will get interpreted as a 1214 * missing target. */ 1215 cmd->result = DID_NO_CONNECT << 16; 1216 } 1217 break; 1218 case CMD_PROTOCOL_ERR: 1219 dev_warn(&h->pdev->dev, "cp %p has " 1220 "protocol error \n", cp); 1221 break; 1222 case CMD_HARDWARE_ERR: 1223 cmd->result = DID_ERROR << 16; 1224 dev_warn(&h->pdev->dev, "cp %p had hardware error\n", cp); 1225 break; 1226 case CMD_CONNECTION_LOST: 1227 cmd->result = DID_ERROR << 16; 1228 dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp); 1229 break; 1230 case CMD_ABORTED: 1231 cmd->result = DID_ABORT << 16; 1232 dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n", 1233 cp, ei->ScsiStatus); 1234 break; 1235 case CMD_ABORT_FAILED: 1236 cmd->result = DID_ERROR << 16; 1237 dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp); 1238 break; 1239 case CMD_UNSOLICITED_ABORT: 1240 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */ 1241 dev_warn(&h->pdev->dev, "cp %p aborted due to an unsolicited " 1242 "abort\n", cp); 1243 break; 1244 case CMD_TIMEOUT: 1245 cmd->result = DID_TIME_OUT << 16; 1246 dev_warn(&h->pdev->dev, "cp %p timedout\n", cp); 1247 break; 1248 case CMD_UNABORTABLE: 1249 cmd->result = DID_ERROR << 16; 1250 dev_warn(&h->pdev->dev, "Command unabortable\n"); 1251 break; 1252 default: 1253 cmd->result = DID_ERROR << 16; 1254 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n", 1255 cp, ei->CommandStatus); 1256 } 1257 cmd->scsi_done(cmd); 1258 cmd_free(h, cp); 1259 } 1260 1261 static void hpsa_pci_unmap(struct pci_dev *pdev, 1262 struct CommandList *c, int sg_used, int data_direction) 1263 { 1264 int i; 1265 union u64bit addr64; 1266 1267 for (i = 0; i < sg_used; i++) { 1268 addr64.val32.lower = c->SG[i].Addr.lower; 1269 addr64.val32.upper = c->SG[i].Addr.upper; 1270 pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len, 1271 data_direction); 1272 } 1273 } 1274 1275 static void hpsa_map_one(struct pci_dev *pdev, 1276 struct CommandList *cp, 1277 unsigned char *buf, 1278 size_t buflen, 1279 int data_direction) 1280 { 1281 u64 addr64; 1282 1283 if (buflen == 0 || data_direction == PCI_DMA_NONE) { 1284 cp->Header.SGList = 0; 1285 cp->Header.SGTotal = 0; 1286 return; 1287 } 1288 1289 addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction); 1290 cp->SG[0].Addr.lower = 1291 (u32) (addr64 & (u64) 0x00000000FFFFFFFF); 1292 cp->SG[0].Addr.upper = 1293 (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF); 1294 cp->SG[0].Len = buflen; 1295 cp->Header.SGList = (u8) 1; /* no. SGs contig in this cmd */ 1296 cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */ 1297 } 1298 1299 static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h, 1300 struct CommandList *c) 1301 { 1302 DECLARE_COMPLETION_ONSTACK(wait); 1303 1304 c->waiting = &wait; 1305 enqueue_cmd_and_start_io(h, c); 1306 wait_for_completion(&wait); 1307 } 1308 1309 static void hpsa_scsi_do_simple_cmd_core_if_no_lockup(struct ctlr_info *h, 1310 struct CommandList *c) 1311 { 1312 unsigned long flags; 1313 1314 /* If controller lockup detected, fake a hardware error. */ 1315 spin_lock_irqsave(&h->lock, flags); 1316 if (unlikely(h->lockup_detected)) { 1317 spin_unlock_irqrestore(&h->lock, flags); 1318 c->err_info->CommandStatus = CMD_HARDWARE_ERR; 1319 } else { 1320 spin_unlock_irqrestore(&h->lock, flags); 1321 hpsa_scsi_do_simple_cmd_core(h, c); 1322 } 1323 } 1324 1325 static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h, 1326 struct CommandList *c, int data_direction) 1327 { 1328 int retry_count = 0; 1329 1330 do { 1331 memset(c->err_info, 0, sizeof(*c->err_info)); 1332 hpsa_scsi_do_simple_cmd_core(h, c); 1333 retry_count++; 1334 } while (check_for_unit_attention(h, c) && retry_count <= 3); 1335 hpsa_pci_unmap(h->pdev, c, 1, data_direction); 1336 } 1337 1338 static void hpsa_scsi_interpret_error(struct CommandList *cp) 1339 { 1340 struct ErrorInfo *ei; 1341 struct device *d = &cp->h->pdev->dev; 1342 1343 ei = cp->err_info; 1344 switch (ei->CommandStatus) { 1345 case CMD_TARGET_STATUS: 1346 dev_warn(d, "cmd %p has completed with errors\n", cp); 1347 dev_warn(d, "cmd %p has SCSI Status = %x\n", cp, 1348 ei->ScsiStatus); 1349 if (ei->ScsiStatus == 0) 1350 dev_warn(d, "SCSI status is abnormally zero. " 1351 "(probably indicates selection timeout " 1352 "reported incorrectly due to a known " 1353 "firmware bug, circa July, 2001.)\n"); 1354 break; 1355 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 1356 dev_info(d, "UNDERRUN\n"); 1357 break; 1358 case CMD_DATA_OVERRUN: 1359 dev_warn(d, "cp %p has completed with data overrun\n", cp); 1360 break; 1361 case CMD_INVALID: { 1362 /* controller unfortunately reports SCSI passthru's 1363 * to non-existent targets as invalid commands. 1364 */ 1365 dev_warn(d, "cp %p is reported invalid (probably means " 1366 "target device no longer present)\n", cp); 1367 /* print_bytes((unsigned char *) cp, sizeof(*cp), 1, 0); 1368 print_cmd(cp); */ 1369 } 1370 break; 1371 case CMD_PROTOCOL_ERR: 1372 dev_warn(d, "cp %p has protocol error \n", cp); 1373 break; 1374 case CMD_HARDWARE_ERR: 1375 /* cmd->result = DID_ERROR << 16; */ 1376 dev_warn(d, "cp %p had hardware error\n", cp); 1377 break; 1378 case CMD_CONNECTION_LOST: 1379 dev_warn(d, "cp %p had connection lost\n", cp); 1380 break; 1381 case CMD_ABORTED: 1382 dev_warn(d, "cp %p was aborted\n", cp); 1383 break; 1384 case CMD_ABORT_FAILED: 1385 dev_warn(d, "cp %p reports abort failed\n", cp); 1386 break; 1387 case CMD_UNSOLICITED_ABORT: 1388 dev_warn(d, "cp %p aborted due to an unsolicited abort\n", cp); 1389 break; 1390 case CMD_TIMEOUT: 1391 dev_warn(d, "cp %p timed out\n", cp); 1392 break; 1393 case CMD_UNABORTABLE: 1394 dev_warn(d, "Command unabortable\n"); 1395 break; 1396 default: 1397 dev_warn(d, "cp %p returned unknown status %x\n", cp, 1398 ei->CommandStatus); 1399 } 1400 } 1401 1402 static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr, 1403 unsigned char page, unsigned char *buf, 1404 unsigned char bufsize) 1405 { 1406 int rc = IO_OK; 1407 struct CommandList *c; 1408 struct ErrorInfo *ei; 1409 1410 c = cmd_special_alloc(h); 1411 1412 if (c == NULL) { /* trouble... */ 1413 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n"); 1414 return -ENOMEM; 1415 } 1416 1417 fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, page, scsi3addr, TYPE_CMD); 1418 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE); 1419 ei = c->err_info; 1420 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 1421 hpsa_scsi_interpret_error(c); 1422 rc = -1; 1423 } 1424 cmd_special_free(h, c); 1425 return rc; 1426 } 1427 1428 static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr) 1429 { 1430 int rc = IO_OK; 1431 struct CommandList *c; 1432 struct ErrorInfo *ei; 1433 1434 c = cmd_special_alloc(h); 1435 1436 if (c == NULL) { /* trouble... */ 1437 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n"); 1438 return -ENOMEM; 1439 } 1440 1441 fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, scsi3addr, TYPE_MSG); 1442 hpsa_scsi_do_simple_cmd_core(h, c); 1443 /* no unmap needed here because no data xfer. */ 1444 1445 ei = c->err_info; 1446 if (ei->CommandStatus != 0) { 1447 hpsa_scsi_interpret_error(c); 1448 rc = -1; 1449 } 1450 cmd_special_free(h, c); 1451 return rc; 1452 } 1453 1454 static void hpsa_get_raid_level(struct ctlr_info *h, 1455 unsigned char *scsi3addr, unsigned char *raid_level) 1456 { 1457 int rc; 1458 unsigned char *buf; 1459 1460 *raid_level = RAID_UNKNOWN; 1461 buf = kzalloc(64, GFP_KERNEL); 1462 if (!buf) 1463 return; 1464 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0xC1, buf, 64); 1465 if (rc == 0) 1466 *raid_level = buf[8]; 1467 if (*raid_level > RAID_UNKNOWN) 1468 *raid_level = RAID_UNKNOWN; 1469 kfree(buf); 1470 return; 1471 } 1472 1473 /* Get the device id from inquiry page 0x83 */ 1474 static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr, 1475 unsigned char *device_id, int buflen) 1476 { 1477 int rc; 1478 unsigned char *buf; 1479 1480 if (buflen > 16) 1481 buflen = 16; 1482 buf = kzalloc(64, GFP_KERNEL); 1483 if (!buf) 1484 return -1; 1485 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0x83, buf, 64); 1486 if (rc == 0) 1487 memcpy(device_id, &buf[8], buflen); 1488 kfree(buf); 1489 return rc != 0; 1490 } 1491 1492 static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical, 1493 struct ReportLUNdata *buf, int bufsize, 1494 int extended_response) 1495 { 1496 int rc = IO_OK; 1497 struct CommandList *c; 1498 unsigned char scsi3addr[8]; 1499 struct ErrorInfo *ei; 1500 1501 c = cmd_special_alloc(h); 1502 if (c == NULL) { /* trouble... */ 1503 dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n"); 1504 return -1; 1505 } 1506 /* address the controller */ 1507 memset(scsi3addr, 0, sizeof(scsi3addr)); 1508 fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h, 1509 buf, bufsize, 0, scsi3addr, TYPE_CMD); 1510 if (extended_response) 1511 c->Request.CDB[1] = extended_response; 1512 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE); 1513 ei = c->err_info; 1514 if (ei->CommandStatus != 0 && 1515 ei->CommandStatus != CMD_DATA_UNDERRUN) { 1516 hpsa_scsi_interpret_error(c); 1517 rc = -1; 1518 } 1519 cmd_special_free(h, c); 1520 return rc; 1521 } 1522 1523 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 1524 struct ReportLUNdata *buf, 1525 int bufsize, int extended_response) 1526 { 1527 return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response); 1528 } 1529 1530 static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h, 1531 struct ReportLUNdata *buf, int bufsize) 1532 { 1533 return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0); 1534 } 1535 1536 static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device, 1537 int bus, int target, int lun) 1538 { 1539 device->bus = bus; 1540 device->target = target; 1541 device->lun = lun; 1542 } 1543 1544 static int hpsa_update_device_info(struct ctlr_info *h, 1545 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device, 1546 unsigned char *is_OBDR_device) 1547 { 1548 1549 #define OBDR_SIG_OFFSET 43 1550 #define OBDR_TAPE_SIG "$DR-10" 1551 #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1) 1552 #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN) 1553 1554 unsigned char *inq_buff; 1555 unsigned char *obdr_sig; 1556 1557 inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL); 1558 if (!inq_buff) 1559 goto bail_out; 1560 1561 /* Do an inquiry to the device to see what it is. */ 1562 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff, 1563 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) { 1564 /* Inquiry failed (msg printed already) */ 1565 dev_err(&h->pdev->dev, 1566 "hpsa_update_device_info: inquiry failed\n"); 1567 goto bail_out; 1568 } 1569 1570 this_device->devtype = (inq_buff[0] & 0x1f); 1571 memcpy(this_device->scsi3addr, scsi3addr, 8); 1572 memcpy(this_device->vendor, &inq_buff[8], 1573 sizeof(this_device->vendor)); 1574 memcpy(this_device->model, &inq_buff[16], 1575 sizeof(this_device->model)); 1576 memset(this_device->device_id, 0, 1577 sizeof(this_device->device_id)); 1578 hpsa_get_device_id(h, scsi3addr, this_device->device_id, 1579 sizeof(this_device->device_id)); 1580 1581 if (this_device->devtype == TYPE_DISK && 1582 is_logical_dev_addr_mode(scsi3addr)) 1583 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level); 1584 else 1585 this_device->raid_level = RAID_UNKNOWN; 1586 1587 if (is_OBDR_device) { 1588 /* See if this is a One-Button-Disaster-Recovery device 1589 * by looking for "$DR-10" at offset 43 in inquiry data. 1590 */ 1591 obdr_sig = &inq_buff[OBDR_SIG_OFFSET]; 1592 *is_OBDR_device = (this_device->devtype == TYPE_ROM && 1593 strncmp(obdr_sig, OBDR_TAPE_SIG, 1594 OBDR_SIG_LEN) == 0); 1595 } 1596 1597 kfree(inq_buff); 1598 return 0; 1599 1600 bail_out: 1601 kfree(inq_buff); 1602 return 1; 1603 } 1604 1605 static unsigned char *msa2xxx_model[] = { 1606 "MSA2012", 1607 "MSA2024", 1608 "MSA2312", 1609 "MSA2324", 1610 "P2000 G3 SAS", 1611 NULL, 1612 }; 1613 1614 static int is_msa2xxx(struct ctlr_info *h, struct hpsa_scsi_dev_t *device) 1615 { 1616 int i; 1617 1618 for (i = 0; msa2xxx_model[i]; i++) 1619 if (strncmp(device->model, msa2xxx_model[i], 1620 strlen(msa2xxx_model[i])) == 0) 1621 return 1; 1622 return 0; 1623 } 1624 1625 /* Helper function to assign bus, target, lun mapping of devices. 1626 * Puts non-msa2xxx logical volumes on bus 0, msa2xxx logical 1627 * volumes on bus 1, physical devices on bus 2. and the hba on bus 3. 1628 * Logical drive target and lun are assigned at this time, but 1629 * physical device lun and target assignment are deferred (assigned 1630 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.) 1631 */ 1632 static void figure_bus_target_lun(struct ctlr_info *h, 1633 u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device) 1634 { 1635 u32 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes)); 1636 1637 if (!is_logical_dev_addr_mode(lunaddrbytes)) { 1638 /* physical device, target and lun filled in later */ 1639 if (is_hba_lunid(lunaddrbytes)) 1640 hpsa_set_bus_target_lun(device, 3, 0, lunid & 0x3fff); 1641 else 1642 /* defer target, lun assignment for physical devices */ 1643 hpsa_set_bus_target_lun(device, 2, -1, -1); 1644 return; 1645 } 1646 /* It's a logical device */ 1647 if (is_msa2xxx(h, device)) { 1648 /* msa2xxx way, put logicals on bus 1 1649 * and match target/lun numbers box 1650 * reports, other smart array, bus 0, target 0, match lunid 1651 */ 1652 hpsa_set_bus_target_lun(device, 1653 1, (lunid >> 16) & 0x3fff, lunid & 0x00ff); 1654 return; 1655 } 1656 hpsa_set_bus_target_lun(device, 0, 0, lunid & 0x3fff); 1657 } 1658 1659 /* 1660 * If there is no lun 0 on a target, linux won't find any devices. 1661 * For the MSA2xxx boxes, we have to manually detect the enclosure 1662 * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report 1663 * it for some reason. *tmpdevice is the target we're adding, 1664 * this_device is a pointer into the current element of currentsd[] 1665 * that we're building up in update_scsi_devices(), below. 1666 * lunzerobits is a bitmap that tracks which targets already have a 1667 * lun 0 assigned. 1668 * Returns 1 if an enclosure was added, 0 if not. 1669 */ 1670 static int add_msa2xxx_enclosure_device(struct ctlr_info *h, 1671 struct hpsa_scsi_dev_t *tmpdevice, 1672 struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes, 1673 unsigned long lunzerobits[], int *nmsa2xxx_enclosures) 1674 { 1675 unsigned char scsi3addr[8]; 1676 1677 if (test_bit(tmpdevice->target, lunzerobits)) 1678 return 0; /* There is already a lun 0 on this target. */ 1679 1680 if (!is_logical_dev_addr_mode(lunaddrbytes)) 1681 return 0; /* It's the logical targets that may lack lun 0. */ 1682 1683 if (!is_msa2xxx(h, tmpdevice)) 1684 return 0; /* It's only the MSA2xxx that have this problem. */ 1685 1686 if (tmpdevice->lun == 0) /* if lun is 0, then we have a lun 0. */ 1687 return 0; 1688 1689 memset(scsi3addr, 0, 8); 1690 scsi3addr[3] = tmpdevice->target; 1691 if (is_hba_lunid(scsi3addr)) 1692 return 0; /* Don't add the RAID controller here. */ 1693 1694 if (is_scsi_rev_5(h)) 1695 return 0; /* p1210m doesn't need to do this. */ 1696 1697 if (*nmsa2xxx_enclosures >= MAX_EXT_TARGETS) { 1698 dev_warn(&h->pdev->dev, "Maximum number of external " 1699 "target devices exceeded. Check your hardware " 1700 "configuration."); 1701 return 0; 1702 } 1703 1704 if (hpsa_update_device_info(h, scsi3addr, this_device, NULL)) 1705 return 0; 1706 (*nmsa2xxx_enclosures)++; 1707 hpsa_set_bus_target_lun(this_device, 1708 tmpdevice->bus, tmpdevice->target, 0); 1709 set_bit(tmpdevice->target, lunzerobits); 1710 return 1; 1711 } 1712 1713 /* 1714 * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev, 1715 * logdev. The number of luns in physdev and logdev are returned in 1716 * *nphysicals and *nlogicals, respectively. 1717 * Returns 0 on success, -1 otherwise. 1718 */ 1719 static int hpsa_gather_lun_info(struct ctlr_info *h, 1720 int reportlunsize, 1721 struct ReportLUNdata *physdev, u32 *nphysicals, 1722 struct ReportLUNdata *logdev, u32 *nlogicals) 1723 { 1724 if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) { 1725 dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 1726 return -1; 1727 } 1728 *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 8; 1729 if (*nphysicals > HPSA_MAX_PHYS_LUN) { 1730 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded." 1731 " %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN, 1732 *nphysicals - HPSA_MAX_PHYS_LUN); 1733 *nphysicals = HPSA_MAX_PHYS_LUN; 1734 } 1735 if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) { 1736 dev_err(&h->pdev->dev, "report logical LUNs failed.\n"); 1737 return -1; 1738 } 1739 *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8; 1740 /* Reject Logicals in excess of our max capability. */ 1741 if (*nlogicals > HPSA_MAX_LUN) { 1742 dev_warn(&h->pdev->dev, 1743 "maximum logical LUNs (%d) exceeded. " 1744 "%d LUNs ignored.\n", HPSA_MAX_LUN, 1745 *nlogicals - HPSA_MAX_LUN); 1746 *nlogicals = HPSA_MAX_LUN; 1747 } 1748 if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) { 1749 dev_warn(&h->pdev->dev, 1750 "maximum logical + physical LUNs (%d) exceeded. " 1751 "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN, 1752 *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN); 1753 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals; 1754 } 1755 return 0; 1756 } 1757 1758 u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, int i, 1759 int nphysicals, int nlogicals, struct ReportLUNdata *physdev_list, 1760 struct ReportLUNdata *logdev_list) 1761 { 1762 /* Helper function, figure out where the LUN ID info is coming from 1763 * given index i, lists of physical and logical devices, where in 1764 * the list the raid controller is supposed to appear (first or last) 1765 */ 1766 1767 int logicals_start = nphysicals + (raid_ctlr_position == 0); 1768 int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0); 1769 1770 if (i == raid_ctlr_position) 1771 return RAID_CTLR_LUNID; 1772 1773 if (i < logicals_start) 1774 return &physdev_list->LUN[i - (raid_ctlr_position == 0)][0]; 1775 1776 if (i < last_device) 1777 return &logdev_list->LUN[i - nphysicals - 1778 (raid_ctlr_position == 0)][0]; 1779 BUG(); 1780 return NULL; 1781 } 1782 1783 static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno) 1784 { 1785 /* the idea here is we could get notified 1786 * that some devices have changed, so we do a report 1787 * physical luns and report logical luns cmd, and adjust 1788 * our list of devices accordingly. 1789 * 1790 * The scsi3addr's of devices won't change so long as the 1791 * adapter is not reset. That means we can rescan and 1792 * tell which devices we already know about, vs. new 1793 * devices, vs. disappearing devices. 1794 */ 1795 struct ReportLUNdata *physdev_list = NULL; 1796 struct ReportLUNdata *logdev_list = NULL; 1797 u32 nphysicals = 0; 1798 u32 nlogicals = 0; 1799 u32 ndev_allocated = 0; 1800 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice; 1801 int ncurrent = 0; 1802 int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8; 1803 int i, nmsa2xxx_enclosures, ndevs_to_allocate; 1804 int raid_ctlr_position; 1805 DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS); 1806 1807 currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL); 1808 physdev_list = kzalloc(reportlunsize, GFP_KERNEL); 1809 logdev_list = kzalloc(reportlunsize, GFP_KERNEL); 1810 tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL); 1811 1812 if (!currentsd || !physdev_list || !logdev_list || !tmpdevice) { 1813 dev_err(&h->pdev->dev, "out of memory\n"); 1814 goto out; 1815 } 1816 memset(lunzerobits, 0, sizeof(lunzerobits)); 1817 1818 if (hpsa_gather_lun_info(h, reportlunsize, physdev_list, &nphysicals, 1819 logdev_list, &nlogicals)) 1820 goto out; 1821 1822 /* We might see up to the maximum number of logical and physical disks 1823 * plus external target devices, and a device for the local RAID 1824 * controller. 1825 */ 1826 ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1; 1827 1828 /* Allocate the per device structures */ 1829 for (i = 0; i < ndevs_to_allocate; i++) { 1830 if (i >= HPSA_MAX_DEVICES) { 1831 dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded." 1832 " %d devices ignored.\n", HPSA_MAX_DEVICES, 1833 ndevs_to_allocate - HPSA_MAX_DEVICES); 1834 break; 1835 } 1836 1837 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL); 1838 if (!currentsd[i]) { 1839 dev_warn(&h->pdev->dev, "out of memory at %s:%d\n", 1840 __FILE__, __LINE__); 1841 goto out; 1842 } 1843 ndev_allocated++; 1844 } 1845 1846 if (unlikely(is_scsi_rev_5(h))) 1847 raid_ctlr_position = 0; 1848 else 1849 raid_ctlr_position = nphysicals + nlogicals; 1850 1851 /* adjust our table of devices */ 1852 nmsa2xxx_enclosures = 0; 1853 for (i = 0; i < nphysicals + nlogicals + 1; i++) { 1854 u8 *lunaddrbytes, is_OBDR = 0; 1855 1856 /* Figure out where the LUN ID info is coming from */ 1857 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position, 1858 i, nphysicals, nlogicals, physdev_list, logdev_list); 1859 /* skip masked physical devices. */ 1860 if (lunaddrbytes[3] & 0xC0 && 1861 i < nphysicals + (raid_ctlr_position == 0)) 1862 continue; 1863 1864 /* Get device type, vendor, model, device id */ 1865 if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice, 1866 &is_OBDR)) 1867 continue; /* skip it if we can't talk to it. */ 1868 figure_bus_target_lun(h, lunaddrbytes, tmpdevice); 1869 this_device = currentsd[ncurrent]; 1870 1871 /* 1872 * For the msa2xxx boxes, we have to insert a LUN 0 which 1873 * doesn't show up in CCISS_REPORT_PHYSICAL data, but there 1874 * is nonetheless an enclosure device there. We have to 1875 * present that otherwise linux won't find anything if 1876 * there is no lun 0. 1877 */ 1878 if (add_msa2xxx_enclosure_device(h, tmpdevice, this_device, 1879 lunaddrbytes, lunzerobits, 1880 &nmsa2xxx_enclosures)) { 1881 ncurrent++; 1882 this_device = currentsd[ncurrent]; 1883 } 1884 1885 *this_device = *tmpdevice; 1886 1887 switch (this_device->devtype) { 1888 case TYPE_ROM: 1889 /* We don't *really* support actual CD-ROM devices, 1890 * just "One Button Disaster Recovery" tape drive 1891 * which temporarily pretends to be a CD-ROM drive. 1892 * So we check that the device is really an OBDR tape 1893 * device by checking for "$DR-10" in bytes 43-48 of 1894 * the inquiry data. 1895 */ 1896 if (is_OBDR) 1897 ncurrent++; 1898 break; 1899 case TYPE_DISK: 1900 if (i < nphysicals) 1901 break; 1902 ncurrent++; 1903 break; 1904 case TYPE_TAPE: 1905 case TYPE_MEDIUM_CHANGER: 1906 ncurrent++; 1907 break; 1908 case TYPE_RAID: 1909 /* Only present the Smartarray HBA as a RAID controller. 1910 * If it's a RAID controller other than the HBA itself 1911 * (an external RAID controller, MSA500 or similar) 1912 * don't present it. 1913 */ 1914 if (!is_hba_lunid(lunaddrbytes)) 1915 break; 1916 ncurrent++; 1917 break; 1918 default: 1919 break; 1920 } 1921 if (ncurrent >= HPSA_MAX_DEVICES) 1922 break; 1923 } 1924 adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent); 1925 out: 1926 kfree(tmpdevice); 1927 for (i = 0; i < ndev_allocated; i++) 1928 kfree(currentsd[i]); 1929 kfree(currentsd); 1930 kfree(physdev_list); 1931 kfree(logdev_list); 1932 } 1933 1934 /* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci 1935 * dma mapping and fills in the scatter gather entries of the 1936 * hpsa command, cp. 1937 */ 1938 static int hpsa_scatter_gather(struct ctlr_info *h, 1939 struct CommandList *cp, 1940 struct scsi_cmnd *cmd) 1941 { 1942 unsigned int len; 1943 struct scatterlist *sg; 1944 u64 addr64; 1945 int use_sg, i, sg_index, chained; 1946 struct SGDescriptor *curr_sg; 1947 1948 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 1949 1950 use_sg = scsi_dma_map(cmd); 1951 if (use_sg < 0) 1952 return use_sg; 1953 1954 if (!use_sg) 1955 goto sglist_finished; 1956 1957 curr_sg = cp->SG; 1958 chained = 0; 1959 sg_index = 0; 1960 scsi_for_each_sg(cmd, sg, use_sg, i) { 1961 if (i == h->max_cmd_sg_entries - 1 && 1962 use_sg > h->max_cmd_sg_entries) { 1963 chained = 1; 1964 curr_sg = h->cmd_sg_list[cp->cmdindex]; 1965 sg_index = 0; 1966 } 1967 addr64 = (u64) sg_dma_address(sg); 1968 len = sg_dma_len(sg); 1969 curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL); 1970 curr_sg->Addr.upper = (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL); 1971 curr_sg->Len = len; 1972 curr_sg->Ext = 0; /* we are not chaining */ 1973 curr_sg++; 1974 } 1975 1976 if (use_sg + chained > h->maxSG) 1977 h->maxSG = use_sg + chained; 1978 1979 if (chained) { 1980 cp->Header.SGList = h->max_cmd_sg_entries; 1981 cp->Header.SGTotal = (u16) (use_sg + 1); 1982 hpsa_map_sg_chain_block(h, cp); 1983 return 0; 1984 } 1985 1986 sglist_finished: 1987 1988 cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */ 1989 cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */ 1990 return 0; 1991 } 1992 1993 1994 static int hpsa_scsi_queue_command_lck(struct scsi_cmnd *cmd, 1995 void (*done)(struct scsi_cmnd *)) 1996 { 1997 struct ctlr_info *h; 1998 struct hpsa_scsi_dev_t *dev; 1999 unsigned char scsi3addr[8]; 2000 struct CommandList *c; 2001 unsigned long flags; 2002 2003 /* Get the ptr to our adapter structure out of cmd->host. */ 2004 h = sdev_to_hba(cmd->device); 2005 dev = cmd->device->hostdata; 2006 if (!dev) { 2007 cmd->result = DID_NO_CONNECT << 16; 2008 done(cmd); 2009 return 0; 2010 } 2011 memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr)); 2012 2013 spin_lock_irqsave(&h->lock, flags); 2014 if (unlikely(h->lockup_detected)) { 2015 spin_unlock_irqrestore(&h->lock, flags); 2016 cmd->result = DID_ERROR << 16; 2017 done(cmd); 2018 return 0; 2019 } 2020 /* Need a lock as this is being allocated from the pool */ 2021 c = cmd_alloc(h); 2022 spin_unlock_irqrestore(&h->lock, flags); 2023 if (c == NULL) { /* trouble... */ 2024 dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n"); 2025 return SCSI_MLQUEUE_HOST_BUSY; 2026 } 2027 2028 /* Fill in the command list header */ 2029 2030 cmd->scsi_done = done; /* save this for use by completion code */ 2031 2032 /* save c in case we have to abort it */ 2033 cmd->host_scribble = (unsigned char *) c; 2034 2035 c->cmd_type = CMD_SCSI; 2036 c->scsi_cmd = cmd; 2037 c->Header.ReplyQueue = 0; /* unused in simple mode */ 2038 memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8); 2039 c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT); 2040 c->Header.Tag.lower |= DIRECT_LOOKUP_BIT; 2041 2042 /* Fill in the request block... */ 2043 2044 c->Request.Timeout = 0; 2045 memset(c->Request.CDB, 0, sizeof(c->Request.CDB)); 2046 BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB)); 2047 c->Request.CDBLen = cmd->cmd_len; 2048 memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len); 2049 c->Request.Type.Type = TYPE_CMD; 2050 c->Request.Type.Attribute = ATTR_SIMPLE; 2051 switch (cmd->sc_data_direction) { 2052 case DMA_TO_DEVICE: 2053 c->Request.Type.Direction = XFER_WRITE; 2054 break; 2055 case DMA_FROM_DEVICE: 2056 c->Request.Type.Direction = XFER_READ; 2057 break; 2058 case DMA_NONE: 2059 c->Request.Type.Direction = XFER_NONE; 2060 break; 2061 case DMA_BIDIRECTIONAL: 2062 /* This can happen if a buggy application does a scsi passthru 2063 * and sets both inlen and outlen to non-zero. ( see 2064 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() ) 2065 */ 2066 2067 c->Request.Type.Direction = XFER_RSVD; 2068 /* This is technically wrong, and hpsa controllers should 2069 * reject it with CMD_INVALID, which is the most correct 2070 * response, but non-fibre backends appear to let it 2071 * slide by, and give the same results as if this field 2072 * were set correctly. Either way is acceptable for 2073 * our purposes here. 2074 */ 2075 2076 break; 2077 2078 default: 2079 dev_err(&h->pdev->dev, "unknown data direction: %d\n", 2080 cmd->sc_data_direction); 2081 BUG(); 2082 break; 2083 } 2084 2085 if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */ 2086 cmd_free(h, c); 2087 return SCSI_MLQUEUE_HOST_BUSY; 2088 } 2089 enqueue_cmd_and_start_io(h, c); 2090 /* the cmd'll come back via intr handler in complete_scsi_command() */ 2091 return 0; 2092 } 2093 2094 static DEF_SCSI_QCMD(hpsa_scsi_queue_command) 2095 2096 static void hpsa_scan_start(struct Scsi_Host *sh) 2097 { 2098 struct ctlr_info *h = shost_to_hba(sh); 2099 unsigned long flags; 2100 2101 /* wait until any scan already in progress is finished. */ 2102 while (1) { 2103 spin_lock_irqsave(&h->scan_lock, flags); 2104 if (h->scan_finished) 2105 break; 2106 spin_unlock_irqrestore(&h->scan_lock, flags); 2107 wait_event(h->scan_wait_queue, h->scan_finished); 2108 /* Note: We don't need to worry about a race between this 2109 * thread and driver unload because the midlayer will 2110 * have incremented the reference count, so unload won't 2111 * happen if we're in here. 2112 */ 2113 } 2114 h->scan_finished = 0; /* mark scan as in progress */ 2115 spin_unlock_irqrestore(&h->scan_lock, flags); 2116 2117 hpsa_update_scsi_devices(h, h->scsi_host->host_no); 2118 2119 spin_lock_irqsave(&h->scan_lock, flags); 2120 h->scan_finished = 1; /* mark scan as finished. */ 2121 wake_up_all(&h->scan_wait_queue); 2122 spin_unlock_irqrestore(&h->scan_lock, flags); 2123 } 2124 2125 static int hpsa_scan_finished(struct Scsi_Host *sh, 2126 unsigned long elapsed_time) 2127 { 2128 struct ctlr_info *h = shost_to_hba(sh); 2129 unsigned long flags; 2130 int finished; 2131 2132 spin_lock_irqsave(&h->scan_lock, flags); 2133 finished = h->scan_finished; 2134 spin_unlock_irqrestore(&h->scan_lock, flags); 2135 return finished; 2136 } 2137 2138 static int hpsa_change_queue_depth(struct scsi_device *sdev, 2139 int qdepth, int reason) 2140 { 2141 struct ctlr_info *h = sdev_to_hba(sdev); 2142 2143 if (reason != SCSI_QDEPTH_DEFAULT) 2144 return -ENOTSUPP; 2145 2146 if (qdepth < 1) 2147 qdepth = 1; 2148 else 2149 if (qdepth > h->nr_cmds) 2150 qdepth = h->nr_cmds; 2151 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth); 2152 return sdev->queue_depth; 2153 } 2154 2155 static void hpsa_unregister_scsi(struct ctlr_info *h) 2156 { 2157 /* we are being forcibly unloaded, and may not refuse. */ 2158 scsi_remove_host(h->scsi_host); 2159 scsi_host_put(h->scsi_host); 2160 h->scsi_host = NULL; 2161 } 2162 2163 static int hpsa_register_scsi(struct ctlr_info *h) 2164 { 2165 struct Scsi_Host *sh; 2166 int error; 2167 2168 sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h)); 2169 if (sh == NULL) 2170 goto fail; 2171 2172 sh->io_port = 0; 2173 sh->n_io_port = 0; 2174 sh->this_id = -1; 2175 sh->max_channel = 3; 2176 sh->max_cmd_len = MAX_COMMAND_SIZE; 2177 sh->max_lun = HPSA_MAX_LUN; 2178 sh->max_id = HPSA_MAX_LUN; 2179 sh->can_queue = h->nr_cmds; 2180 sh->cmd_per_lun = h->nr_cmds; 2181 sh->sg_tablesize = h->maxsgentries; 2182 h->scsi_host = sh; 2183 sh->hostdata[0] = (unsigned long) h; 2184 sh->irq = h->intr[h->intr_mode]; 2185 sh->unique_id = sh->irq; 2186 error = scsi_add_host(sh, &h->pdev->dev); 2187 if (error) 2188 goto fail_host_put; 2189 scsi_scan_host(sh); 2190 return 0; 2191 2192 fail_host_put: 2193 dev_err(&h->pdev->dev, "%s: scsi_add_host" 2194 " failed for controller %d\n", __func__, h->ctlr); 2195 scsi_host_put(sh); 2196 return error; 2197 fail: 2198 dev_err(&h->pdev->dev, "%s: scsi_host_alloc" 2199 " failed for controller %d\n", __func__, h->ctlr); 2200 return -ENOMEM; 2201 } 2202 2203 static int wait_for_device_to_become_ready(struct ctlr_info *h, 2204 unsigned char lunaddr[]) 2205 { 2206 int rc = 0; 2207 int count = 0; 2208 int waittime = 1; /* seconds */ 2209 struct CommandList *c; 2210 2211 c = cmd_special_alloc(h); 2212 if (!c) { 2213 dev_warn(&h->pdev->dev, "out of memory in " 2214 "wait_for_device_to_become_ready.\n"); 2215 return IO_ERROR; 2216 } 2217 2218 /* Send test unit ready until device ready, or give up. */ 2219 while (count < HPSA_TUR_RETRY_LIMIT) { 2220 2221 /* Wait for a bit. do this first, because if we send 2222 * the TUR right away, the reset will just abort it. 2223 */ 2224 msleep(1000 * waittime); 2225 count++; 2226 2227 /* Increase wait time with each try, up to a point. */ 2228 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS) 2229 waittime = waittime * 2; 2230 2231 /* Send the Test Unit Ready */ 2232 fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, lunaddr, TYPE_CMD); 2233 hpsa_scsi_do_simple_cmd_core(h, c); 2234 /* no unmap needed here because no data xfer. */ 2235 2236 if (c->err_info->CommandStatus == CMD_SUCCESS) 2237 break; 2238 2239 if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 2240 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION && 2241 (c->err_info->SenseInfo[2] == NO_SENSE || 2242 c->err_info->SenseInfo[2] == UNIT_ATTENTION)) 2243 break; 2244 2245 dev_warn(&h->pdev->dev, "waiting %d secs " 2246 "for device to become ready.\n", waittime); 2247 rc = 1; /* device not ready. */ 2248 } 2249 2250 if (rc) 2251 dev_warn(&h->pdev->dev, "giving up on device.\n"); 2252 else 2253 dev_warn(&h->pdev->dev, "device is ready.\n"); 2254 2255 cmd_special_free(h, c); 2256 return rc; 2257 } 2258 2259 /* Need at least one of these error handlers to keep ../scsi/hosts.c from 2260 * complaining. Doing a host- or bus-reset can't do anything good here. 2261 */ 2262 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd) 2263 { 2264 int rc; 2265 struct ctlr_info *h; 2266 struct hpsa_scsi_dev_t *dev; 2267 2268 /* find the controller to which the command to be aborted was sent */ 2269 h = sdev_to_hba(scsicmd->device); 2270 if (h == NULL) /* paranoia */ 2271 return FAILED; 2272 dev = scsicmd->device->hostdata; 2273 if (!dev) { 2274 dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: " 2275 "device lookup failed.\n"); 2276 return FAILED; 2277 } 2278 dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n", 2279 h->scsi_host->host_no, dev->bus, dev->target, dev->lun); 2280 /* send a reset to the SCSI LUN which the command was sent to */ 2281 rc = hpsa_send_reset(h, dev->scsi3addr); 2282 if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0) 2283 return SUCCESS; 2284 2285 dev_warn(&h->pdev->dev, "resetting device failed.\n"); 2286 return FAILED; 2287 } 2288 2289 /* 2290 * For operations that cannot sleep, a command block is allocated at init, 2291 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track 2292 * which ones are free or in use. Lock must be held when calling this. 2293 * cmd_free() is the complement. 2294 */ 2295 static struct CommandList *cmd_alloc(struct ctlr_info *h) 2296 { 2297 struct CommandList *c; 2298 int i; 2299 union u64bit temp64; 2300 dma_addr_t cmd_dma_handle, err_dma_handle; 2301 2302 do { 2303 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds); 2304 if (i == h->nr_cmds) 2305 return NULL; 2306 } while (test_and_set_bit 2307 (i & (BITS_PER_LONG - 1), 2308 h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0); 2309 c = h->cmd_pool + i; 2310 memset(c, 0, sizeof(*c)); 2311 cmd_dma_handle = h->cmd_pool_dhandle 2312 + i * sizeof(*c); 2313 c->err_info = h->errinfo_pool + i; 2314 memset(c->err_info, 0, sizeof(*c->err_info)); 2315 err_dma_handle = h->errinfo_pool_dhandle 2316 + i * sizeof(*c->err_info); 2317 h->nr_allocs++; 2318 2319 c->cmdindex = i; 2320 2321 INIT_LIST_HEAD(&c->list); 2322 c->busaddr = (u32) cmd_dma_handle; 2323 temp64.val = (u64) err_dma_handle; 2324 c->ErrDesc.Addr.lower = temp64.val32.lower; 2325 c->ErrDesc.Addr.upper = temp64.val32.upper; 2326 c->ErrDesc.Len = sizeof(*c->err_info); 2327 2328 c->h = h; 2329 return c; 2330 } 2331 2332 /* For operations that can wait for kmalloc to possibly sleep, 2333 * this routine can be called. Lock need not be held to call 2334 * cmd_special_alloc. cmd_special_free() is the complement. 2335 */ 2336 static struct CommandList *cmd_special_alloc(struct ctlr_info *h) 2337 { 2338 struct CommandList *c; 2339 union u64bit temp64; 2340 dma_addr_t cmd_dma_handle, err_dma_handle; 2341 2342 c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle); 2343 if (c == NULL) 2344 return NULL; 2345 memset(c, 0, sizeof(*c)); 2346 2347 c->cmdindex = -1; 2348 2349 c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info), 2350 &err_dma_handle); 2351 2352 if (c->err_info == NULL) { 2353 pci_free_consistent(h->pdev, 2354 sizeof(*c), c, cmd_dma_handle); 2355 return NULL; 2356 } 2357 memset(c->err_info, 0, sizeof(*c->err_info)); 2358 2359 INIT_LIST_HEAD(&c->list); 2360 c->busaddr = (u32) cmd_dma_handle; 2361 temp64.val = (u64) err_dma_handle; 2362 c->ErrDesc.Addr.lower = temp64.val32.lower; 2363 c->ErrDesc.Addr.upper = temp64.val32.upper; 2364 c->ErrDesc.Len = sizeof(*c->err_info); 2365 2366 c->h = h; 2367 return c; 2368 } 2369 2370 static void cmd_free(struct ctlr_info *h, struct CommandList *c) 2371 { 2372 int i; 2373 2374 i = c - h->cmd_pool; 2375 clear_bit(i & (BITS_PER_LONG - 1), 2376 h->cmd_pool_bits + (i / BITS_PER_LONG)); 2377 h->nr_frees++; 2378 } 2379 2380 static void cmd_special_free(struct ctlr_info *h, struct CommandList *c) 2381 { 2382 union u64bit temp64; 2383 2384 temp64.val32.lower = c->ErrDesc.Addr.lower; 2385 temp64.val32.upper = c->ErrDesc.Addr.upper; 2386 pci_free_consistent(h->pdev, sizeof(*c->err_info), 2387 c->err_info, (dma_addr_t) temp64.val); 2388 pci_free_consistent(h->pdev, sizeof(*c), 2389 c, (dma_addr_t) (c->busaddr & DIRECT_LOOKUP_MASK)); 2390 } 2391 2392 #ifdef CONFIG_COMPAT 2393 2394 static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg) 2395 { 2396 IOCTL32_Command_struct __user *arg32 = 2397 (IOCTL32_Command_struct __user *) arg; 2398 IOCTL_Command_struct arg64; 2399 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64)); 2400 int err; 2401 u32 cp; 2402 2403 memset(&arg64, 0, sizeof(arg64)); 2404 err = 0; 2405 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 2406 sizeof(arg64.LUN_info)); 2407 err |= copy_from_user(&arg64.Request, &arg32->Request, 2408 sizeof(arg64.Request)); 2409 err |= copy_from_user(&arg64.error_info, &arg32->error_info, 2410 sizeof(arg64.error_info)); 2411 err |= get_user(arg64.buf_size, &arg32->buf_size); 2412 err |= get_user(cp, &arg32->buf); 2413 arg64.buf = compat_ptr(cp); 2414 err |= copy_to_user(p, &arg64, sizeof(arg64)); 2415 2416 if (err) 2417 return -EFAULT; 2418 2419 err = hpsa_ioctl(dev, CCISS_PASSTHRU, (void *)p); 2420 if (err) 2421 return err; 2422 err |= copy_in_user(&arg32->error_info, &p->error_info, 2423 sizeof(arg32->error_info)); 2424 if (err) 2425 return -EFAULT; 2426 return err; 2427 } 2428 2429 static int hpsa_ioctl32_big_passthru(struct scsi_device *dev, 2430 int cmd, void *arg) 2431 { 2432 BIG_IOCTL32_Command_struct __user *arg32 = 2433 (BIG_IOCTL32_Command_struct __user *) arg; 2434 BIG_IOCTL_Command_struct arg64; 2435 BIG_IOCTL_Command_struct __user *p = 2436 compat_alloc_user_space(sizeof(arg64)); 2437 int err; 2438 u32 cp; 2439 2440 memset(&arg64, 0, sizeof(arg64)); 2441 err = 0; 2442 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 2443 sizeof(arg64.LUN_info)); 2444 err |= copy_from_user(&arg64.Request, &arg32->Request, 2445 sizeof(arg64.Request)); 2446 err |= copy_from_user(&arg64.error_info, &arg32->error_info, 2447 sizeof(arg64.error_info)); 2448 err |= get_user(arg64.buf_size, &arg32->buf_size); 2449 err |= get_user(arg64.malloc_size, &arg32->malloc_size); 2450 err |= get_user(cp, &arg32->buf); 2451 arg64.buf = compat_ptr(cp); 2452 err |= copy_to_user(p, &arg64, sizeof(arg64)); 2453 2454 if (err) 2455 return -EFAULT; 2456 2457 err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p); 2458 if (err) 2459 return err; 2460 err |= copy_in_user(&arg32->error_info, &p->error_info, 2461 sizeof(arg32->error_info)); 2462 if (err) 2463 return -EFAULT; 2464 return err; 2465 } 2466 2467 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg) 2468 { 2469 switch (cmd) { 2470 case CCISS_GETPCIINFO: 2471 case CCISS_GETINTINFO: 2472 case CCISS_SETINTINFO: 2473 case CCISS_GETNODENAME: 2474 case CCISS_SETNODENAME: 2475 case CCISS_GETHEARTBEAT: 2476 case CCISS_GETBUSTYPES: 2477 case CCISS_GETFIRMVER: 2478 case CCISS_GETDRIVVER: 2479 case CCISS_REVALIDVOLS: 2480 case CCISS_DEREGDISK: 2481 case CCISS_REGNEWDISK: 2482 case CCISS_REGNEWD: 2483 case CCISS_RESCANDISK: 2484 case CCISS_GETLUNINFO: 2485 return hpsa_ioctl(dev, cmd, arg); 2486 2487 case CCISS_PASSTHRU32: 2488 return hpsa_ioctl32_passthru(dev, cmd, arg); 2489 case CCISS_BIG_PASSTHRU32: 2490 return hpsa_ioctl32_big_passthru(dev, cmd, arg); 2491 2492 default: 2493 return -ENOIOCTLCMD; 2494 } 2495 } 2496 #endif 2497 2498 static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp) 2499 { 2500 struct hpsa_pci_info pciinfo; 2501 2502 if (!argp) 2503 return -EINVAL; 2504 pciinfo.domain = pci_domain_nr(h->pdev->bus); 2505 pciinfo.bus = h->pdev->bus->number; 2506 pciinfo.dev_fn = h->pdev->devfn; 2507 pciinfo.board_id = h->board_id; 2508 if (copy_to_user(argp, &pciinfo, sizeof(pciinfo))) 2509 return -EFAULT; 2510 return 0; 2511 } 2512 2513 static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp) 2514 { 2515 DriverVer_type DriverVer; 2516 unsigned char vmaj, vmin, vsubmin; 2517 int rc; 2518 2519 rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu", 2520 &vmaj, &vmin, &vsubmin); 2521 if (rc != 3) { 2522 dev_info(&h->pdev->dev, "driver version string '%s' " 2523 "unrecognized.", HPSA_DRIVER_VERSION); 2524 vmaj = 0; 2525 vmin = 0; 2526 vsubmin = 0; 2527 } 2528 DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin; 2529 if (!argp) 2530 return -EINVAL; 2531 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type))) 2532 return -EFAULT; 2533 return 0; 2534 } 2535 2536 static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp) 2537 { 2538 IOCTL_Command_struct iocommand; 2539 struct CommandList *c; 2540 char *buff = NULL; 2541 union u64bit temp64; 2542 2543 if (!argp) 2544 return -EINVAL; 2545 if (!capable(CAP_SYS_RAWIO)) 2546 return -EPERM; 2547 if (copy_from_user(&iocommand, argp, sizeof(iocommand))) 2548 return -EFAULT; 2549 if ((iocommand.buf_size < 1) && 2550 (iocommand.Request.Type.Direction != XFER_NONE)) { 2551 return -EINVAL; 2552 } 2553 if (iocommand.buf_size > 0) { 2554 buff = kmalloc(iocommand.buf_size, GFP_KERNEL); 2555 if (buff == NULL) 2556 return -EFAULT; 2557 if (iocommand.Request.Type.Direction == XFER_WRITE) { 2558 /* Copy the data into the buffer we created */ 2559 if (copy_from_user(buff, iocommand.buf, 2560 iocommand.buf_size)) { 2561 kfree(buff); 2562 return -EFAULT; 2563 } 2564 } else { 2565 memset(buff, 0, iocommand.buf_size); 2566 } 2567 } 2568 c = cmd_special_alloc(h); 2569 if (c == NULL) { 2570 kfree(buff); 2571 return -ENOMEM; 2572 } 2573 /* Fill in the command type */ 2574 c->cmd_type = CMD_IOCTL_PEND; 2575 /* Fill in Command Header */ 2576 c->Header.ReplyQueue = 0; /* unused in simple mode */ 2577 if (iocommand.buf_size > 0) { /* buffer to fill */ 2578 c->Header.SGList = 1; 2579 c->Header.SGTotal = 1; 2580 } else { /* no buffers to fill */ 2581 c->Header.SGList = 0; 2582 c->Header.SGTotal = 0; 2583 } 2584 memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN)); 2585 /* use the kernel address the cmd block for tag */ 2586 c->Header.Tag.lower = c->busaddr; 2587 2588 /* Fill in Request block */ 2589 memcpy(&c->Request, &iocommand.Request, 2590 sizeof(c->Request)); 2591 2592 /* Fill in the scatter gather information */ 2593 if (iocommand.buf_size > 0) { 2594 temp64.val = pci_map_single(h->pdev, buff, 2595 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL); 2596 c->SG[0].Addr.lower = temp64.val32.lower; 2597 c->SG[0].Addr.upper = temp64.val32.upper; 2598 c->SG[0].Len = iocommand.buf_size; 2599 c->SG[0].Ext = 0; /* we are not chaining*/ 2600 } 2601 hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c); 2602 if (iocommand.buf_size > 0) 2603 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL); 2604 check_ioctl_unit_attention(h, c); 2605 2606 /* Copy the error information out */ 2607 memcpy(&iocommand.error_info, c->err_info, 2608 sizeof(iocommand.error_info)); 2609 if (copy_to_user(argp, &iocommand, sizeof(iocommand))) { 2610 kfree(buff); 2611 cmd_special_free(h, c); 2612 return -EFAULT; 2613 } 2614 if (iocommand.Request.Type.Direction == XFER_READ && 2615 iocommand.buf_size > 0) { 2616 /* Copy the data out of the buffer we created */ 2617 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) { 2618 kfree(buff); 2619 cmd_special_free(h, c); 2620 return -EFAULT; 2621 } 2622 } 2623 kfree(buff); 2624 cmd_special_free(h, c); 2625 return 0; 2626 } 2627 2628 static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp) 2629 { 2630 BIG_IOCTL_Command_struct *ioc; 2631 struct CommandList *c; 2632 unsigned char **buff = NULL; 2633 int *buff_size = NULL; 2634 union u64bit temp64; 2635 BYTE sg_used = 0; 2636 int status = 0; 2637 int i; 2638 u32 left; 2639 u32 sz; 2640 BYTE __user *data_ptr; 2641 2642 if (!argp) 2643 return -EINVAL; 2644 if (!capable(CAP_SYS_RAWIO)) 2645 return -EPERM; 2646 ioc = (BIG_IOCTL_Command_struct *) 2647 kmalloc(sizeof(*ioc), GFP_KERNEL); 2648 if (!ioc) { 2649 status = -ENOMEM; 2650 goto cleanup1; 2651 } 2652 if (copy_from_user(ioc, argp, sizeof(*ioc))) { 2653 status = -EFAULT; 2654 goto cleanup1; 2655 } 2656 if ((ioc->buf_size < 1) && 2657 (ioc->Request.Type.Direction != XFER_NONE)) { 2658 status = -EINVAL; 2659 goto cleanup1; 2660 } 2661 /* Check kmalloc limits using all SGs */ 2662 if (ioc->malloc_size > MAX_KMALLOC_SIZE) { 2663 status = -EINVAL; 2664 goto cleanup1; 2665 } 2666 if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) { 2667 status = -EINVAL; 2668 goto cleanup1; 2669 } 2670 buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL); 2671 if (!buff) { 2672 status = -ENOMEM; 2673 goto cleanup1; 2674 } 2675 buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL); 2676 if (!buff_size) { 2677 status = -ENOMEM; 2678 goto cleanup1; 2679 } 2680 left = ioc->buf_size; 2681 data_ptr = ioc->buf; 2682 while (left) { 2683 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left; 2684 buff_size[sg_used] = sz; 2685 buff[sg_used] = kmalloc(sz, GFP_KERNEL); 2686 if (buff[sg_used] == NULL) { 2687 status = -ENOMEM; 2688 goto cleanup1; 2689 } 2690 if (ioc->Request.Type.Direction == XFER_WRITE) { 2691 if (copy_from_user(buff[sg_used], data_ptr, sz)) { 2692 status = -ENOMEM; 2693 goto cleanup1; 2694 } 2695 } else 2696 memset(buff[sg_used], 0, sz); 2697 left -= sz; 2698 data_ptr += sz; 2699 sg_used++; 2700 } 2701 c = cmd_special_alloc(h); 2702 if (c == NULL) { 2703 status = -ENOMEM; 2704 goto cleanup1; 2705 } 2706 c->cmd_type = CMD_IOCTL_PEND; 2707 c->Header.ReplyQueue = 0; 2708 c->Header.SGList = c->Header.SGTotal = sg_used; 2709 memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN)); 2710 c->Header.Tag.lower = c->busaddr; 2711 memcpy(&c->Request, &ioc->Request, sizeof(c->Request)); 2712 if (ioc->buf_size > 0) { 2713 int i; 2714 for (i = 0; i < sg_used; i++) { 2715 temp64.val = pci_map_single(h->pdev, buff[i], 2716 buff_size[i], PCI_DMA_BIDIRECTIONAL); 2717 c->SG[i].Addr.lower = temp64.val32.lower; 2718 c->SG[i].Addr.upper = temp64.val32.upper; 2719 c->SG[i].Len = buff_size[i]; 2720 /* we are not chaining */ 2721 c->SG[i].Ext = 0; 2722 } 2723 } 2724 hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c); 2725 if (sg_used) 2726 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL); 2727 check_ioctl_unit_attention(h, c); 2728 /* Copy the error information out */ 2729 memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info)); 2730 if (copy_to_user(argp, ioc, sizeof(*ioc))) { 2731 cmd_special_free(h, c); 2732 status = -EFAULT; 2733 goto cleanup1; 2734 } 2735 if (ioc->Request.Type.Direction == XFER_READ && ioc->buf_size > 0) { 2736 /* Copy the data out of the buffer we created */ 2737 BYTE __user *ptr = ioc->buf; 2738 for (i = 0; i < sg_used; i++) { 2739 if (copy_to_user(ptr, buff[i], buff_size[i])) { 2740 cmd_special_free(h, c); 2741 status = -EFAULT; 2742 goto cleanup1; 2743 } 2744 ptr += buff_size[i]; 2745 } 2746 } 2747 cmd_special_free(h, c); 2748 status = 0; 2749 cleanup1: 2750 if (buff) { 2751 for (i = 0; i < sg_used; i++) 2752 kfree(buff[i]); 2753 kfree(buff); 2754 } 2755 kfree(buff_size); 2756 kfree(ioc); 2757 return status; 2758 } 2759 2760 static void check_ioctl_unit_attention(struct ctlr_info *h, 2761 struct CommandList *c) 2762 { 2763 if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 2764 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) 2765 (void) check_for_unit_attention(h, c); 2766 } 2767 /* 2768 * ioctl 2769 */ 2770 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg) 2771 { 2772 struct ctlr_info *h; 2773 void __user *argp = (void __user *)arg; 2774 2775 h = sdev_to_hba(dev); 2776 2777 switch (cmd) { 2778 case CCISS_DEREGDISK: 2779 case CCISS_REGNEWDISK: 2780 case CCISS_REGNEWD: 2781 hpsa_scan_start(h->scsi_host); 2782 return 0; 2783 case CCISS_GETPCIINFO: 2784 return hpsa_getpciinfo_ioctl(h, argp); 2785 case CCISS_GETDRIVVER: 2786 return hpsa_getdrivver_ioctl(h, argp); 2787 case CCISS_PASSTHRU: 2788 return hpsa_passthru_ioctl(h, argp); 2789 case CCISS_BIG_PASSTHRU: 2790 return hpsa_big_passthru_ioctl(h, argp); 2791 default: 2792 return -ENOTTY; 2793 } 2794 } 2795 2796 static int __devinit hpsa_send_host_reset(struct ctlr_info *h, 2797 unsigned char *scsi3addr, u8 reset_type) 2798 { 2799 struct CommandList *c; 2800 2801 c = cmd_alloc(h); 2802 if (!c) 2803 return -ENOMEM; 2804 fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, 2805 RAID_CTLR_LUNID, TYPE_MSG); 2806 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */ 2807 c->waiting = NULL; 2808 enqueue_cmd_and_start_io(h, c); 2809 /* Don't wait for completion, the reset won't complete. Don't free 2810 * the command either. This is the last command we will send before 2811 * re-initializing everything, so it doesn't matter and won't leak. 2812 */ 2813 return 0; 2814 } 2815 2816 static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 2817 void *buff, size_t size, u8 page_code, unsigned char *scsi3addr, 2818 int cmd_type) 2819 { 2820 int pci_dir = XFER_NONE; 2821 2822 c->cmd_type = CMD_IOCTL_PEND; 2823 c->Header.ReplyQueue = 0; 2824 if (buff != NULL && size > 0) { 2825 c->Header.SGList = 1; 2826 c->Header.SGTotal = 1; 2827 } else { 2828 c->Header.SGList = 0; 2829 c->Header.SGTotal = 0; 2830 } 2831 c->Header.Tag.lower = c->busaddr; 2832 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8); 2833 2834 c->Request.Type.Type = cmd_type; 2835 if (cmd_type == TYPE_CMD) { 2836 switch (cmd) { 2837 case HPSA_INQUIRY: 2838 /* are we trying to read a vital product page */ 2839 if (page_code != 0) { 2840 c->Request.CDB[1] = 0x01; 2841 c->Request.CDB[2] = page_code; 2842 } 2843 c->Request.CDBLen = 6; 2844 c->Request.Type.Attribute = ATTR_SIMPLE; 2845 c->Request.Type.Direction = XFER_READ; 2846 c->Request.Timeout = 0; 2847 c->Request.CDB[0] = HPSA_INQUIRY; 2848 c->Request.CDB[4] = size & 0xFF; 2849 break; 2850 case HPSA_REPORT_LOG: 2851 case HPSA_REPORT_PHYS: 2852 /* Talking to controller so It's a physical command 2853 mode = 00 target = 0. Nothing to write. 2854 */ 2855 c->Request.CDBLen = 12; 2856 c->Request.Type.Attribute = ATTR_SIMPLE; 2857 c->Request.Type.Direction = XFER_READ; 2858 c->Request.Timeout = 0; 2859 c->Request.CDB[0] = cmd; 2860 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 2861 c->Request.CDB[7] = (size >> 16) & 0xFF; 2862 c->Request.CDB[8] = (size >> 8) & 0xFF; 2863 c->Request.CDB[9] = size & 0xFF; 2864 break; 2865 case HPSA_CACHE_FLUSH: 2866 c->Request.CDBLen = 12; 2867 c->Request.Type.Attribute = ATTR_SIMPLE; 2868 c->Request.Type.Direction = XFER_WRITE; 2869 c->Request.Timeout = 0; 2870 c->Request.CDB[0] = BMIC_WRITE; 2871 c->Request.CDB[6] = BMIC_CACHE_FLUSH; 2872 c->Request.CDB[7] = (size >> 8) & 0xFF; 2873 c->Request.CDB[8] = size & 0xFF; 2874 break; 2875 case TEST_UNIT_READY: 2876 c->Request.CDBLen = 6; 2877 c->Request.Type.Attribute = ATTR_SIMPLE; 2878 c->Request.Type.Direction = XFER_NONE; 2879 c->Request.Timeout = 0; 2880 break; 2881 default: 2882 dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd); 2883 BUG(); 2884 return; 2885 } 2886 } else if (cmd_type == TYPE_MSG) { 2887 switch (cmd) { 2888 2889 case HPSA_DEVICE_RESET_MSG: 2890 c->Request.CDBLen = 16; 2891 c->Request.Type.Type = 1; /* It is a MSG not a CMD */ 2892 c->Request.Type.Attribute = ATTR_SIMPLE; 2893 c->Request.Type.Direction = XFER_NONE; 2894 c->Request.Timeout = 0; /* Don't time out */ 2895 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 2896 c->Request.CDB[0] = cmd; 2897 c->Request.CDB[1] = 0x03; /* Reset target above */ 2898 /* If bytes 4-7 are zero, it means reset the */ 2899 /* LunID device */ 2900 c->Request.CDB[4] = 0x00; 2901 c->Request.CDB[5] = 0x00; 2902 c->Request.CDB[6] = 0x00; 2903 c->Request.CDB[7] = 0x00; 2904 break; 2905 2906 default: 2907 dev_warn(&h->pdev->dev, "unknown message type %d\n", 2908 cmd); 2909 BUG(); 2910 } 2911 } else { 2912 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type); 2913 BUG(); 2914 } 2915 2916 switch (c->Request.Type.Direction) { 2917 case XFER_READ: 2918 pci_dir = PCI_DMA_FROMDEVICE; 2919 break; 2920 case XFER_WRITE: 2921 pci_dir = PCI_DMA_TODEVICE; 2922 break; 2923 case XFER_NONE: 2924 pci_dir = PCI_DMA_NONE; 2925 break; 2926 default: 2927 pci_dir = PCI_DMA_BIDIRECTIONAL; 2928 } 2929 2930 hpsa_map_one(h->pdev, c, buff, size, pci_dir); 2931 2932 return; 2933 } 2934 2935 /* 2936 * Map (physical) PCI mem into (virtual) kernel space 2937 */ 2938 static void __iomem *remap_pci_mem(ulong base, ulong size) 2939 { 2940 ulong page_base = ((ulong) base) & PAGE_MASK; 2941 ulong page_offs = ((ulong) base) - page_base; 2942 void __iomem *page_remapped = ioremap(page_base, page_offs + size); 2943 2944 return page_remapped ? (page_remapped + page_offs) : NULL; 2945 } 2946 2947 /* Takes cmds off the submission queue and sends them to the hardware, 2948 * then puts them on the queue of cmds waiting for completion. 2949 */ 2950 static void start_io(struct ctlr_info *h) 2951 { 2952 struct CommandList *c; 2953 2954 while (!list_empty(&h->reqQ)) { 2955 c = list_entry(h->reqQ.next, struct CommandList, list); 2956 /* can't do anything if fifo is full */ 2957 if ((h->access.fifo_full(h))) { 2958 dev_warn(&h->pdev->dev, "fifo full\n"); 2959 break; 2960 } 2961 2962 /* Get the first entry from the Request Q */ 2963 removeQ(c); 2964 h->Qdepth--; 2965 2966 /* Tell the controller execute command */ 2967 h->access.submit_command(h, c); 2968 2969 /* Put job onto the completed Q */ 2970 addQ(&h->cmpQ, c); 2971 } 2972 } 2973 2974 static inline unsigned long get_next_completion(struct ctlr_info *h) 2975 { 2976 return h->access.command_completed(h); 2977 } 2978 2979 static inline bool interrupt_pending(struct ctlr_info *h) 2980 { 2981 return h->access.intr_pending(h); 2982 } 2983 2984 static inline long interrupt_not_for_us(struct ctlr_info *h) 2985 { 2986 return (h->access.intr_pending(h) == 0) || 2987 (h->interrupts_enabled == 0); 2988 } 2989 2990 static inline int bad_tag(struct ctlr_info *h, u32 tag_index, 2991 u32 raw_tag) 2992 { 2993 if (unlikely(tag_index >= h->nr_cmds)) { 2994 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag); 2995 return 1; 2996 } 2997 return 0; 2998 } 2999 3000 static inline void finish_cmd(struct CommandList *c, u32 raw_tag) 3001 { 3002 removeQ(c); 3003 if (likely(c->cmd_type == CMD_SCSI)) 3004 complete_scsi_command(c); 3005 else if (c->cmd_type == CMD_IOCTL_PEND) 3006 complete(c->waiting); 3007 } 3008 3009 static inline u32 hpsa_tag_contains_index(u32 tag) 3010 { 3011 return tag & DIRECT_LOOKUP_BIT; 3012 } 3013 3014 static inline u32 hpsa_tag_to_index(u32 tag) 3015 { 3016 return tag >> DIRECT_LOOKUP_SHIFT; 3017 } 3018 3019 3020 static inline u32 hpsa_tag_discard_error_bits(struct ctlr_info *h, u32 tag) 3021 { 3022 #define HPSA_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1) 3023 #define HPSA_SIMPLE_ERROR_BITS 0x03 3024 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant))) 3025 return tag & ~HPSA_SIMPLE_ERROR_BITS; 3026 return tag & ~HPSA_PERF_ERROR_BITS; 3027 } 3028 3029 /* process completion of an indexed ("direct lookup") command */ 3030 static inline u32 process_indexed_cmd(struct ctlr_info *h, 3031 u32 raw_tag) 3032 { 3033 u32 tag_index; 3034 struct CommandList *c; 3035 3036 tag_index = hpsa_tag_to_index(raw_tag); 3037 if (bad_tag(h, tag_index, raw_tag)) 3038 return next_command(h); 3039 c = h->cmd_pool + tag_index; 3040 finish_cmd(c, raw_tag); 3041 return next_command(h); 3042 } 3043 3044 /* process completion of a non-indexed command */ 3045 static inline u32 process_nonindexed_cmd(struct ctlr_info *h, 3046 u32 raw_tag) 3047 { 3048 u32 tag; 3049 struct CommandList *c = NULL; 3050 3051 tag = hpsa_tag_discard_error_bits(h, raw_tag); 3052 list_for_each_entry(c, &h->cmpQ, list) { 3053 if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) { 3054 finish_cmd(c, raw_tag); 3055 return next_command(h); 3056 } 3057 } 3058 bad_tag(h, h->nr_cmds + 1, raw_tag); 3059 return next_command(h); 3060 } 3061 3062 /* Some controllers, like p400, will give us one interrupt 3063 * after a soft reset, even if we turned interrupts off. 3064 * Only need to check for this in the hpsa_xxx_discard_completions 3065 * functions. 3066 */ 3067 static int ignore_bogus_interrupt(struct ctlr_info *h) 3068 { 3069 if (likely(!reset_devices)) 3070 return 0; 3071 3072 if (likely(h->interrupts_enabled)) 3073 return 0; 3074 3075 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled " 3076 "(known firmware bug.) Ignoring.\n"); 3077 3078 return 1; 3079 } 3080 3081 static irqreturn_t hpsa_intx_discard_completions(int irq, void *dev_id) 3082 { 3083 struct ctlr_info *h = dev_id; 3084 unsigned long flags; 3085 u32 raw_tag; 3086 3087 if (ignore_bogus_interrupt(h)) 3088 return IRQ_NONE; 3089 3090 if (interrupt_not_for_us(h)) 3091 return IRQ_NONE; 3092 spin_lock_irqsave(&h->lock, flags); 3093 h->last_intr_timestamp = get_jiffies_64(); 3094 while (interrupt_pending(h)) { 3095 raw_tag = get_next_completion(h); 3096 while (raw_tag != FIFO_EMPTY) 3097 raw_tag = next_command(h); 3098 } 3099 spin_unlock_irqrestore(&h->lock, flags); 3100 return IRQ_HANDLED; 3101 } 3102 3103 static irqreturn_t hpsa_msix_discard_completions(int irq, void *dev_id) 3104 { 3105 struct ctlr_info *h = dev_id; 3106 unsigned long flags; 3107 u32 raw_tag; 3108 3109 if (ignore_bogus_interrupt(h)) 3110 return IRQ_NONE; 3111 3112 spin_lock_irqsave(&h->lock, flags); 3113 h->last_intr_timestamp = get_jiffies_64(); 3114 raw_tag = get_next_completion(h); 3115 while (raw_tag != FIFO_EMPTY) 3116 raw_tag = next_command(h); 3117 spin_unlock_irqrestore(&h->lock, flags); 3118 return IRQ_HANDLED; 3119 } 3120 3121 static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id) 3122 { 3123 struct ctlr_info *h = dev_id; 3124 unsigned long flags; 3125 u32 raw_tag; 3126 3127 if (interrupt_not_for_us(h)) 3128 return IRQ_NONE; 3129 spin_lock_irqsave(&h->lock, flags); 3130 h->last_intr_timestamp = get_jiffies_64(); 3131 while (interrupt_pending(h)) { 3132 raw_tag = get_next_completion(h); 3133 while (raw_tag != FIFO_EMPTY) { 3134 if (hpsa_tag_contains_index(raw_tag)) 3135 raw_tag = process_indexed_cmd(h, raw_tag); 3136 else 3137 raw_tag = process_nonindexed_cmd(h, raw_tag); 3138 } 3139 } 3140 spin_unlock_irqrestore(&h->lock, flags); 3141 return IRQ_HANDLED; 3142 } 3143 3144 static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id) 3145 { 3146 struct ctlr_info *h = dev_id; 3147 unsigned long flags; 3148 u32 raw_tag; 3149 3150 spin_lock_irqsave(&h->lock, flags); 3151 h->last_intr_timestamp = get_jiffies_64(); 3152 raw_tag = get_next_completion(h); 3153 while (raw_tag != FIFO_EMPTY) { 3154 if (hpsa_tag_contains_index(raw_tag)) 3155 raw_tag = process_indexed_cmd(h, raw_tag); 3156 else 3157 raw_tag = process_nonindexed_cmd(h, raw_tag); 3158 } 3159 spin_unlock_irqrestore(&h->lock, flags); 3160 return IRQ_HANDLED; 3161 } 3162 3163 /* Send a message CDB to the firmware. Careful, this only works 3164 * in simple mode, not performant mode due to the tag lookup. 3165 * We only ever use this immediately after a controller reset. 3166 */ 3167 static __devinit int hpsa_message(struct pci_dev *pdev, unsigned char opcode, 3168 unsigned char type) 3169 { 3170 struct Command { 3171 struct CommandListHeader CommandHeader; 3172 struct RequestBlock Request; 3173 struct ErrDescriptor ErrorDescriptor; 3174 }; 3175 struct Command *cmd; 3176 static const size_t cmd_sz = sizeof(*cmd) + 3177 sizeof(cmd->ErrorDescriptor); 3178 dma_addr_t paddr64; 3179 uint32_t paddr32, tag; 3180 void __iomem *vaddr; 3181 int i, err; 3182 3183 vaddr = pci_ioremap_bar(pdev, 0); 3184 if (vaddr == NULL) 3185 return -ENOMEM; 3186 3187 /* The Inbound Post Queue only accepts 32-bit physical addresses for the 3188 * CCISS commands, so they must be allocated from the lower 4GiB of 3189 * memory. 3190 */ 3191 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 3192 if (err) { 3193 iounmap(vaddr); 3194 return -ENOMEM; 3195 } 3196 3197 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64); 3198 if (cmd == NULL) { 3199 iounmap(vaddr); 3200 return -ENOMEM; 3201 } 3202 3203 /* This must fit, because of the 32-bit consistent DMA mask. Also, 3204 * although there's no guarantee, we assume that the address is at 3205 * least 4-byte aligned (most likely, it's page-aligned). 3206 */ 3207 paddr32 = paddr64; 3208 3209 cmd->CommandHeader.ReplyQueue = 0; 3210 cmd->CommandHeader.SGList = 0; 3211 cmd->CommandHeader.SGTotal = 0; 3212 cmd->CommandHeader.Tag.lower = paddr32; 3213 cmd->CommandHeader.Tag.upper = 0; 3214 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8); 3215 3216 cmd->Request.CDBLen = 16; 3217 cmd->Request.Type.Type = TYPE_MSG; 3218 cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE; 3219 cmd->Request.Type.Direction = XFER_NONE; 3220 cmd->Request.Timeout = 0; /* Don't time out */ 3221 cmd->Request.CDB[0] = opcode; 3222 cmd->Request.CDB[1] = type; 3223 memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */ 3224 cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd); 3225 cmd->ErrorDescriptor.Addr.upper = 0; 3226 cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo); 3227 3228 writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET); 3229 3230 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) { 3231 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET); 3232 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr32) 3233 break; 3234 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS); 3235 } 3236 3237 iounmap(vaddr); 3238 3239 /* we leak the DMA buffer here ... no choice since the controller could 3240 * still complete the command. 3241 */ 3242 if (i == HPSA_MSG_SEND_RETRY_LIMIT) { 3243 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n", 3244 opcode, type); 3245 return -ETIMEDOUT; 3246 } 3247 3248 pci_free_consistent(pdev, cmd_sz, cmd, paddr64); 3249 3250 if (tag & HPSA_ERROR_BIT) { 3251 dev_err(&pdev->dev, "controller message %02x:%02x failed\n", 3252 opcode, type); 3253 return -EIO; 3254 } 3255 3256 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n", 3257 opcode, type); 3258 return 0; 3259 } 3260 3261 #define hpsa_noop(p) hpsa_message(p, 3, 0) 3262 3263 static int hpsa_controller_hard_reset(struct pci_dev *pdev, 3264 void * __iomem vaddr, u32 use_doorbell) 3265 { 3266 u16 pmcsr; 3267 int pos; 3268 3269 if (use_doorbell) { 3270 /* For everything after the P600, the PCI power state method 3271 * of resetting the controller doesn't work, so we have this 3272 * other way using the doorbell register. 3273 */ 3274 dev_info(&pdev->dev, "using doorbell to reset controller\n"); 3275 writel(use_doorbell, vaddr + SA5_DOORBELL); 3276 } else { /* Try to do it the PCI power state way */ 3277 3278 /* Quoting from the Open CISS Specification: "The Power 3279 * Management Control/Status Register (CSR) controls the power 3280 * state of the device. The normal operating state is D0, 3281 * CSR=00h. The software off state is D3, CSR=03h. To reset 3282 * the controller, place the interface device in D3 then to D0, 3283 * this causes a secondary PCI reset which will reset the 3284 * controller." */ 3285 3286 pos = pci_find_capability(pdev, PCI_CAP_ID_PM); 3287 if (pos == 0) { 3288 dev_err(&pdev->dev, 3289 "hpsa_reset_controller: " 3290 "PCI PM not supported\n"); 3291 return -ENODEV; 3292 } 3293 dev_info(&pdev->dev, "using PCI PM to reset controller\n"); 3294 /* enter the D3hot power management state */ 3295 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr); 3296 pmcsr &= ~PCI_PM_CTRL_STATE_MASK; 3297 pmcsr |= PCI_D3hot; 3298 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr); 3299 3300 msleep(500); 3301 3302 /* enter the D0 power management state */ 3303 pmcsr &= ~PCI_PM_CTRL_STATE_MASK; 3304 pmcsr |= PCI_D0; 3305 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr); 3306 3307 /* 3308 * The P600 requires a small delay when changing states. 3309 * Otherwise we may think the board did not reset and we bail. 3310 * This for kdump only and is particular to the P600. 3311 */ 3312 msleep(500); 3313 } 3314 return 0; 3315 } 3316 3317 static __devinit void init_driver_version(char *driver_version, int len) 3318 { 3319 memset(driver_version, 0, len); 3320 strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1); 3321 } 3322 3323 static __devinit int write_driver_ver_to_cfgtable( 3324 struct CfgTable __iomem *cfgtable) 3325 { 3326 char *driver_version; 3327 int i, size = sizeof(cfgtable->driver_version); 3328 3329 driver_version = kmalloc(size, GFP_KERNEL); 3330 if (!driver_version) 3331 return -ENOMEM; 3332 3333 init_driver_version(driver_version, size); 3334 for (i = 0; i < size; i++) 3335 writeb(driver_version[i], &cfgtable->driver_version[i]); 3336 kfree(driver_version); 3337 return 0; 3338 } 3339 3340 static __devinit void read_driver_ver_from_cfgtable( 3341 struct CfgTable __iomem *cfgtable, unsigned char *driver_ver) 3342 { 3343 int i; 3344 3345 for (i = 0; i < sizeof(cfgtable->driver_version); i++) 3346 driver_ver[i] = readb(&cfgtable->driver_version[i]); 3347 } 3348 3349 static __devinit int controller_reset_failed( 3350 struct CfgTable __iomem *cfgtable) 3351 { 3352 3353 char *driver_ver, *old_driver_ver; 3354 int rc, size = sizeof(cfgtable->driver_version); 3355 3356 old_driver_ver = kmalloc(2 * size, GFP_KERNEL); 3357 if (!old_driver_ver) 3358 return -ENOMEM; 3359 driver_ver = old_driver_ver + size; 3360 3361 /* After a reset, the 32 bytes of "driver version" in the cfgtable 3362 * should have been changed, otherwise we know the reset failed. 3363 */ 3364 init_driver_version(old_driver_ver, size); 3365 read_driver_ver_from_cfgtable(cfgtable, driver_ver); 3366 rc = !memcmp(driver_ver, old_driver_ver, size); 3367 kfree(old_driver_ver); 3368 return rc; 3369 } 3370 /* This does a hard reset of the controller using PCI power management 3371 * states or the using the doorbell register. 3372 */ 3373 static __devinit int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev) 3374 { 3375 u64 cfg_offset; 3376 u32 cfg_base_addr; 3377 u64 cfg_base_addr_index; 3378 void __iomem *vaddr; 3379 unsigned long paddr; 3380 u32 misc_fw_support; 3381 int rc; 3382 struct CfgTable __iomem *cfgtable; 3383 u32 use_doorbell; 3384 u32 board_id; 3385 u16 command_register; 3386 3387 /* For controllers as old as the P600, this is very nearly 3388 * the same thing as 3389 * 3390 * pci_save_state(pci_dev); 3391 * pci_set_power_state(pci_dev, PCI_D3hot); 3392 * pci_set_power_state(pci_dev, PCI_D0); 3393 * pci_restore_state(pci_dev); 3394 * 3395 * For controllers newer than the P600, the pci power state 3396 * method of resetting doesn't work so we have another way 3397 * using the doorbell register. 3398 */ 3399 3400 rc = hpsa_lookup_board_id(pdev, &board_id); 3401 if (rc < 0 || !ctlr_is_resettable(board_id)) { 3402 dev_warn(&pdev->dev, "Not resetting device.\n"); 3403 return -ENODEV; 3404 } 3405 3406 /* if controller is soft- but not hard resettable... */ 3407 if (!ctlr_is_hard_resettable(board_id)) 3408 return -ENOTSUPP; /* try soft reset later. */ 3409 3410 /* Save the PCI command register */ 3411 pci_read_config_word(pdev, 4, &command_register); 3412 /* Turn the board off. This is so that later pci_restore_state() 3413 * won't turn the board on before the rest of config space is ready. 3414 */ 3415 pci_disable_device(pdev); 3416 pci_save_state(pdev); 3417 3418 /* find the first memory BAR, so we can find the cfg table */ 3419 rc = hpsa_pci_find_memory_BAR(pdev, &paddr); 3420 if (rc) 3421 return rc; 3422 vaddr = remap_pci_mem(paddr, 0x250); 3423 if (!vaddr) 3424 return -ENOMEM; 3425 3426 /* find cfgtable in order to check if reset via doorbell is supported */ 3427 rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr, 3428 &cfg_base_addr_index, &cfg_offset); 3429 if (rc) 3430 goto unmap_vaddr; 3431 cfgtable = remap_pci_mem(pci_resource_start(pdev, 3432 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable)); 3433 if (!cfgtable) { 3434 rc = -ENOMEM; 3435 goto unmap_vaddr; 3436 } 3437 rc = write_driver_ver_to_cfgtable(cfgtable); 3438 if (rc) 3439 goto unmap_vaddr; 3440 3441 /* If reset via doorbell register is supported, use that. 3442 * There are two such methods. Favor the newest method. 3443 */ 3444 misc_fw_support = readl(&cfgtable->misc_fw_support); 3445 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2; 3446 if (use_doorbell) { 3447 use_doorbell = DOORBELL_CTLR_RESET2; 3448 } else { 3449 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET; 3450 if (use_doorbell) { 3451 dev_warn(&pdev->dev, "Soft reset not supported. " 3452 "Firmware update is required.\n"); 3453 rc = -ENOTSUPP; /* try soft reset */ 3454 goto unmap_cfgtable; 3455 } 3456 } 3457 3458 rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell); 3459 if (rc) 3460 goto unmap_cfgtable; 3461 3462 pci_restore_state(pdev); 3463 rc = pci_enable_device(pdev); 3464 if (rc) { 3465 dev_warn(&pdev->dev, "failed to enable device.\n"); 3466 goto unmap_cfgtable; 3467 } 3468 pci_write_config_word(pdev, 4, command_register); 3469 3470 /* Some devices (notably the HP Smart Array 5i Controller) 3471 need a little pause here */ 3472 msleep(HPSA_POST_RESET_PAUSE_MSECS); 3473 3474 /* Wait for board to become not ready, then ready. */ 3475 dev_info(&pdev->dev, "Waiting for board to reset.\n"); 3476 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY); 3477 if (rc) { 3478 dev_warn(&pdev->dev, 3479 "failed waiting for board to reset." 3480 " Will try soft reset.\n"); 3481 rc = -ENOTSUPP; /* Not expected, but try soft reset later */ 3482 goto unmap_cfgtable; 3483 } 3484 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY); 3485 if (rc) { 3486 dev_warn(&pdev->dev, 3487 "failed waiting for board to become ready " 3488 "after hard reset\n"); 3489 goto unmap_cfgtable; 3490 } 3491 3492 rc = controller_reset_failed(vaddr); 3493 if (rc < 0) 3494 goto unmap_cfgtable; 3495 if (rc) { 3496 dev_warn(&pdev->dev, "Unable to successfully reset " 3497 "controller. Will try soft reset.\n"); 3498 rc = -ENOTSUPP; 3499 } else { 3500 dev_info(&pdev->dev, "board ready after hard reset.\n"); 3501 } 3502 3503 unmap_cfgtable: 3504 iounmap(cfgtable); 3505 3506 unmap_vaddr: 3507 iounmap(vaddr); 3508 return rc; 3509 } 3510 3511 /* 3512 * We cannot read the structure directly, for portability we must use 3513 * the io functions. 3514 * This is for debug only. 3515 */ 3516 static void print_cfg_table(struct device *dev, struct CfgTable *tb) 3517 { 3518 #ifdef HPSA_DEBUG 3519 int i; 3520 char temp_name[17]; 3521 3522 dev_info(dev, "Controller Configuration information\n"); 3523 dev_info(dev, "------------------------------------\n"); 3524 for (i = 0; i < 4; i++) 3525 temp_name[i] = readb(&(tb->Signature[i])); 3526 temp_name[4] = '\0'; 3527 dev_info(dev, " Signature = %s\n", temp_name); 3528 dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence))); 3529 dev_info(dev, " Transport methods supported = 0x%x\n", 3530 readl(&(tb->TransportSupport))); 3531 dev_info(dev, " Transport methods active = 0x%x\n", 3532 readl(&(tb->TransportActive))); 3533 dev_info(dev, " Requested transport Method = 0x%x\n", 3534 readl(&(tb->HostWrite.TransportRequest))); 3535 dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n", 3536 readl(&(tb->HostWrite.CoalIntDelay))); 3537 dev_info(dev, " Coalesce Interrupt Count = 0x%x\n", 3538 readl(&(tb->HostWrite.CoalIntCount))); 3539 dev_info(dev, " Max outstanding commands = 0x%d\n", 3540 readl(&(tb->CmdsOutMax))); 3541 dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes))); 3542 for (i = 0; i < 16; i++) 3543 temp_name[i] = readb(&(tb->ServerName[i])); 3544 temp_name[16] = '\0'; 3545 dev_info(dev, " Server Name = %s\n", temp_name); 3546 dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n", 3547 readl(&(tb->HeartBeat))); 3548 #endif /* HPSA_DEBUG */ 3549 } 3550 3551 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr) 3552 { 3553 int i, offset, mem_type, bar_type; 3554 3555 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */ 3556 return 0; 3557 offset = 0; 3558 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { 3559 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE; 3560 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO) 3561 offset += 4; 3562 else { 3563 mem_type = pci_resource_flags(pdev, i) & 3564 PCI_BASE_ADDRESS_MEM_TYPE_MASK; 3565 switch (mem_type) { 3566 case PCI_BASE_ADDRESS_MEM_TYPE_32: 3567 case PCI_BASE_ADDRESS_MEM_TYPE_1M: 3568 offset += 4; /* 32 bit */ 3569 break; 3570 case PCI_BASE_ADDRESS_MEM_TYPE_64: 3571 offset += 8; 3572 break; 3573 default: /* reserved in PCI 2.2 */ 3574 dev_warn(&pdev->dev, 3575 "base address is invalid\n"); 3576 return -1; 3577 break; 3578 } 3579 } 3580 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0) 3581 return i + 1; 3582 } 3583 return -1; 3584 } 3585 3586 /* If MSI/MSI-X is supported by the kernel we will try to enable it on 3587 * controllers that are capable. If not, we use IO-APIC mode. 3588 */ 3589 3590 static void __devinit hpsa_interrupt_mode(struct ctlr_info *h) 3591 { 3592 #ifdef CONFIG_PCI_MSI 3593 int err; 3594 struct msix_entry hpsa_msix_entries[4] = { {0, 0}, {0, 1}, 3595 {0, 2}, {0, 3} 3596 }; 3597 3598 /* Some boards advertise MSI but don't really support it */ 3599 if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) || 3600 (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11)) 3601 goto default_int_mode; 3602 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) { 3603 dev_info(&h->pdev->dev, "MSIX\n"); 3604 err = pci_enable_msix(h->pdev, hpsa_msix_entries, 4); 3605 if (!err) { 3606 h->intr[0] = hpsa_msix_entries[0].vector; 3607 h->intr[1] = hpsa_msix_entries[1].vector; 3608 h->intr[2] = hpsa_msix_entries[2].vector; 3609 h->intr[3] = hpsa_msix_entries[3].vector; 3610 h->msix_vector = 1; 3611 return; 3612 } 3613 if (err > 0) { 3614 dev_warn(&h->pdev->dev, "only %d MSI-X vectors " 3615 "available\n", err); 3616 goto default_int_mode; 3617 } else { 3618 dev_warn(&h->pdev->dev, "MSI-X init failed %d\n", 3619 err); 3620 goto default_int_mode; 3621 } 3622 } 3623 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) { 3624 dev_info(&h->pdev->dev, "MSI\n"); 3625 if (!pci_enable_msi(h->pdev)) 3626 h->msi_vector = 1; 3627 else 3628 dev_warn(&h->pdev->dev, "MSI init failed\n"); 3629 } 3630 default_int_mode: 3631 #endif /* CONFIG_PCI_MSI */ 3632 /* if we get here we're going to use the default interrupt mode */ 3633 h->intr[h->intr_mode] = h->pdev->irq; 3634 } 3635 3636 static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id) 3637 { 3638 int i; 3639 u32 subsystem_vendor_id, subsystem_device_id; 3640 3641 subsystem_vendor_id = pdev->subsystem_vendor; 3642 subsystem_device_id = pdev->subsystem_device; 3643 *board_id = ((subsystem_device_id << 16) & 0xffff0000) | 3644 subsystem_vendor_id; 3645 3646 for (i = 0; i < ARRAY_SIZE(products); i++) 3647 if (*board_id == products[i].board_id) 3648 return i; 3649 3650 if ((subsystem_vendor_id != PCI_VENDOR_ID_HP && 3651 subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) || 3652 !hpsa_allow_any) { 3653 dev_warn(&pdev->dev, "unrecognized board ID: " 3654 "0x%08x, ignoring.\n", *board_id); 3655 return -ENODEV; 3656 } 3657 return ARRAY_SIZE(products) - 1; /* generic unknown smart array */ 3658 } 3659 3660 static inline bool hpsa_board_disabled(struct pci_dev *pdev) 3661 { 3662 u16 command; 3663 3664 (void) pci_read_config_word(pdev, PCI_COMMAND, &command); 3665 return ((command & PCI_COMMAND_MEMORY) == 0); 3666 } 3667 3668 static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 3669 unsigned long *memory_bar) 3670 { 3671 int i; 3672 3673 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) 3674 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) { 3675 /* addressing mode bits already removed */ 3676 *memory_bar = pci_resource_start(pdev, i); 3677 dev_dbg(&pdev->dev, "memory BAR = %lx\n", 3678 *memory_bar); 3679 return 0; 3680 } 3681 dev_warn(&pdev->dev, "no memory BAR found\n"); 3682 return -ENODEV; 3683 } 3684 3685 static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev, 3686 void __iomem *vaddr, int wait_for_ready) 3687 { 3688 int i, iterations; 3689 u32 scratchpad; 3690 if (wait_for_ready) 3691 iterations = HPSA_BOARD_READY_ITERATIONS; 3692 else 3693 iterations = HPSA_BOARD_NOT_READY_ITERATIONS; 3694 3695 for (i = 0; i < iterations; i++) { 3696 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET); 3697 if (wait_for_ready) { 3698 if (scratchpad == HPSA_FIRMWARE_READY) 3699 return 0; 3700 } else { 3701 if (scratchpad != HPSA_FIRMWARE_READY) 3702 return 0; 3703 } 3704 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS); 3705 } 3706 dev_warn(&pdev->dev, "board not ready, timed out.\n"); 3707 return -ENODEV; 3708 } 3709 3710 static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev, 3711 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index, 3712 u64 *cfg_offset) 3713 { 3714 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET); 3715 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET); 3716 *cfg_base_addr &= (u32) 0x0000ffff; 3717 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr); 3718 if (*cfg_base_addr_index == -1) { 3719 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n"); 3720 return -ENODEV; 3721 } 3722 return 0; 3723 } 3724 3725 static int __devinit hpsa_find_cfgtables(struct ctlr_info *h) 3726 { 3727 u64 cfg_offset; 3728 u32 cfg_base_addr; 3729 u64 cfg_base_addr_index; 3730 u32 trans_offset; 3731 int rc; 3732 3733 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 3734 &cfg_base_addr_index, &cfg_offset); 3735 if (rc) 3736 return rc; 3737 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev, 3738 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable)); 3739 if (!h->cfgtable) 3740 return -ENOMEM; 3741 rc = write_driver_ver_to_cfgtable(h->cfgtable); 3742 if (rc) 3743 return rc; 3744 /* Find performant mode table. */ 3745 trans_offset = readl(&h->cfgtable->TransMethodOffset); 3746 h->transtable = remap_pci_mem(pci_resource_start(h->pdev, 3747 cfg_base_addr_index)+cfg_offset+trans_offset, 3748 sizeof(*h->transtable)); 3749 if (!h->transtable) 3750 return -ENOMEM; 3751 return 0; 3752 } 3753 3754 static void __devinit hpsa_get_max_perf_mode_cmds(struct ctlr_info *h) 3755 { 3756 h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands)); 3757 3758 /* Limit commands in memory limited kdump scenario. */ 3759 if (reset_devices && h->max_commands > 32) 3760 h->max_commands = 32; 3761 3762 if (h->max_commands < 16) { 3763 dev_warn(&h->pdev->dev, "Controller reports " 3764 "max supported commands of %d, an obvious lie. " 3765 "Using 16. Ensure that firmware is up to date.\n", 3766 h->max_commands); 3767 h->max_commands = 16; 3768 } 3769 } 3770 3771 /* Interrogate the hardware for some limits: 3772 * max commands, max SG elements without chaining, and with chaining, 3773 * SG chain block size, etc. 3774 */ 3775 static void __devinit hpsa_find_board_params(struct ctlr_info *h) 3776 { 3777 hpsa_get_max_perf_mode_cmds(h); 3778 h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */ 3779 h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements)); 3780 /* 3781 * Limit in-command s/g elements to 32 save dma'able memory. 3782 * Howvever spec says if 0, use 31 3783 */ 3784 h->max_cmd_sg_entries = 31; 3785 if (h->maxsgentries > 512) { 3786 h->max_cmd_sg_entries = 32; 3787 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries + 1; 3788 h->maxsgentries--; /* save one for chain pointer */ 3789 } else { 3790 h->maxsgentries = 31; /* default to traditional values */ 3791 h->chainsize = 0; 3792 } 3793 } 3794 3795 static inline bool hpsa_CISS_signature_present(struct ctlr_info *h) 3796 { 3797 if ((readb(&h->cfgtable->Signature[0]) != 'C') || 3798 (readb(&h->cfgtable->Signature[1]) != 'I') || 3799 (readb(&h->cfgtable->Signature[2]) != 'S') || 3800 (readb(&h->cfgtable->Signature[3]) != 'S')) { 3801 dev_warn(&h->pdev->dev, "not a valid CISS config table\n"); 3802 return false; 3803 } 3804 return true; 3805 } 3806 3807 /* Need to enable prefetch in the SCSI core for 6400 in x86 */ 3808 static inline void hpsa_enable_scsi_prefetch(struct ctlr_info *h) 3809 { 3810 #ifdef CONFIG_X86 3811 u32 prefetch; 3812 3813 prefetch = readl(&(h->cfgtable->SCSI_Prefetch)); 3814 prefetch |= 0x100; 3815 writel(prefetch, &(h->cfgtable->SCSI_Prefetch)); 3816 #endif 3817 } 3818 3819 /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result 3820 * in a prefetch beyond physical memory. 3821 */ 3822 static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h) 3823 { 3824 u32 dma_prefetch; 3825 3826 if (h->board_id != 0x3225103C) 3827 return; 3828 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG); 3829 dma_prefetch |= 0x8000; 3830 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG); 3831 } 3832 3833 static void __devinit hpsa_wait_for_mode_change_ack(struct ctlr_info *h) 3834 { 3835 int i; 3836 u32 doorbell_value; 3837 unsigned long flags; 3838 3839 /* under certain very rare conditions, this can take awhile. 3840 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right 3841 * as we enter this code.) 3842 */ 3843 for (i = 0; i < MAX_CONFIG_WAIT; i++) { 3844 spin_lock_irqsave(&h->lock, flags); 3845 doorbell_value = readl(h->vaddr + SA5_DOORBELL); 3846 spin_unlock_irqrestore(&h->lock, flags); 3847 if (!(doorbell_value & CFGTBL_ChangeReq)) 3848 break; 3849 /* delay and try again */ 3850 usleep_range(10000, 20000); 3851 } 3852 } 3853 3854 static int __devinit hpsa_enter_simple_mode(struct ctlr_info *h) 3855 { 3856 u32 trans_support; 3857 3858 trans_support = readl(&(h->cfgtable->TransportSupport)); 3859 if (!(trans_support & SIMPLE_MODE)) 3860 return -ENOTSUPP; 3861 3862 h->max_commands = readl(&(h->cfgtable->CmdsOutMax)); 3863 /* Update the field, and then ring the doorbell */ 3864 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest)); 3865 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 3866 hpsa_wait_for_mode_change_ack(h); 3867 print_cfg_table(&h->pdev->dev, h->cfgtable); 3868 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) { 3869 dev_warn(&h->pdev->dev, 3870 "unable to get board into simple mode\n"); 3871 return -ENODEV; 3872 } 3873 h->transMethod = CFGTBL_Trans_Simple; 3874 return 0; 3875 } 3876 3877 static int __devinit hpsa_pci_init(struct ctlr_info *h) 3878 { 3879 int prod_index, err; 3880 3881 prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id); 3882 if (prod_index < 0) 3883 return -ENODEV; 3884 h->product_name = products[prod_index].product_name; 3885 h->access = *(products[prod_index].access); 3886 3887 if (hpsa_board_disabled(h->pdev)) { 3888 dev_warn(&h->pdev->dev, "controller appears to be disabled\n"); 3889 return -ENODEV; 3890 } 3891 3892 pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S | 3893 PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM); 3894 3895 err = pci_enable_device(h->pdev); 3896 if (err) { 3897 dev_warn(&h->pdev->dev, "unable to enable PCI device\n"); 3898 return err; 3899 } 3900 3901 err = pci_request_regions(h->pdev, HPSA); 3902 if (err) { 3903 dev_err(&h->pdev->dev, 3904 "cannot obtain PCI resources, aborting\n"); 3905 return err; 3906 } 3907 hpsa_interrupt_mode(h); 3908 err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr); 3909 if (err) 3910 goto err_out_free_res; 3911 h->vaddr = remap_pci_mem(h->paddr, 0x250); 3912 if (!h->vaddr) { 3913 err = -ENOMEM; 3914 goto err_out_free_res; 3915 } 3916 err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 3917 if (err) 3918 goto err_out_free_res; 3919 err = hpsa_find_cfgtables(h); 3920 if (err) 3921 goto err_out_free_res; 3922 hpsa_find_board_params(h); 3923 3924 if (!hpsa_CISS_signature_present(h)) { 3925 err = -ENODEV; 3926 goto err_out_free_res; 3927 } 3928 hpsa_enable_scsi_prefetch(h); 3929 hpsa_p600_dma_prefetch_quirk(h); 3930 err = hpsa_enter_simple_mode(h); 3931 if (err) 3932 goto err_out_free_res; 3933 return 0; 3934 3935 err_out_free_res: 3936 if (h->transtable) 3937 iounmap(h->transtable); 3938 if (h->cfgtable) 3939 iounmap(h->cfgtable); 3940 if (h->vaddr) 3941 iounmap(h->vaddr); 3942 /* 3943 * Deliberately omit pci_disable_device(): it does something nasty to 3944 * Smart Array controllers that pci_enable_device does not undo 3945 */ 3946 pci_release_regions(h->pdev); 3947 return err; 3948 } 3949 3950 static void __devinit hpsa_hba_inquiry(struct ctlr_info *h) 3951 { 3952 int rc; 3953 3954 #define HBA_INQUIRY_BYTE_COUNT 64 3955 h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL); 3956 if (!h->hba_inquiry_data) 3957 return; 3958 rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0, 3959 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT); 3960 if (rc != 0) { 3961 kfree(h->hba_inquiry_data); 3962 h->hba_inquiry_data = NULL; 3963 } 3964 } 3965 3966 static __devinit int hpsa_init_reset_devices(struct pci_dev *pdev) 3967 { 3968 int rc, i; 3969 3970 if (!reset_devices) 3971 return 0; 3972 3973 /* Reset the controller with a PCI power-cycle or via doorbell */ 3974 rc = hpsa_kdump_hard_reset_controller(pdev); 3975 3976 /* -ENOTSUPP here means we cannot reset the controller 3977 * but it's already (and still) up and running in 3978 * "performant mode". Or, it might be 640x, which can't reset 3979 * due to concerns about shared bbwc between 6402/6404 pair. 3980 */ 3981 if (rc == -ENOTSUPP) 3982 return rc; /* just try to do the kdump anyhow. */ 3983 if (rc) 3984 return -ENODEV; 3985 3986 /* Now try to get the controller to respond to a no-op */ 3987 dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n"); 3988 for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) { 3989 if (hpsa_noop(pdev) == 0) 3990 break; 3991 else 3992 dev_warn(&pdev->dev, "no-op failed%s\n", 3993 (i < 11 ? "; re-trying" : "")); 3994 } 3995 return 0; 3996 } 3997 3998 static __devinit int hpsa_allocate_cmd_pool(struct ctlr_info *h) 3999 { 4000 h->cmd_pool_bits = kzalloc( 4001 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) * 4002 sizeof(unsigned long), GFP_KERNEL); 4003 h->cmd_pool = pci_alloc_consistent(h->pdev, 4004 h->nr_cmds * sizeof(*h->cmd_pool), 4005 &(h->cmd_pool_dhandle)); 4006 h->errinfo_pool = pci_alloc_consistent(h->pdev, 4007 h->nr_cmds * sizeof(*h->errinfo_pool), 4008 &(h->errinfo_pool_dhandle)); 4009 if ((h->cmd_pool_bits == NULL) 4010 || (h->cmd_pool == NULL) 4011 || (h->errinfo_pool == NULL)) { 4012 dev_err(&h->pdev->dev, "out of memory in %s", __func__); 4013 return -ENOMEM; 4014 } 4015 return 0; 4016 } 4017 4018 static void hpsa_free_cmd_pool(struct ctlr_info *h) 4019 { 4020 kfree(h->cmd_pool_bits); 4021 if (h->cmd_pool) 4022 pci_free_consistent(h->pdev, 4023 h->nr_cmds * sizeof(struct CommandList), 4024 h->cmd_pool, h->cmd_pool_dhandle); 4025 if (h->errinfo_pool) 4026 pci_free_consistent(h->pdev, 4027 h->nr_cmds * sizeof(struct ErrorInfo), 4028 h->errinfo_pool, 4029 h->errinfo_pool_dhandle); 4030 } 4031 4032 static int hpsa_request_irq(struct ctlr_info *h, 4033 irqreturn_t (*msixhandler)(int, void *), 4034 irqreturn_t (*intxhandler)(int, void *)) 4035 { 4036 int rc; 4037 4038 if (h->msix_vector || h->msi_vector) 4039 rc = request_irq(h->intr[h->intr_mode], msixhandler, 4040 0, h->devname, h); 4041 else 4042 rc = request_irq(h->intr[h->intr_mode], intxhandler, 4043 IRQF_SHARED, h->devname, h); 4044 if (rc) { 4045 dev_err(&h->pdev->dev, "unable to get irq %d for %s\n", 4046 h->intr[h->intr_mode], h->devname); 4047 return -ENODEV; 4048 } 4049 return 0; 4050 } 4051 4052 static int __devinit hpsa_kdump_soft_reset(struct ctlr_info *h) 4053 { 4054 if (hpsa_send_host_reset(h, RAID_CTLR_LUNID, 4055 HPSA_RESET_TYPE_CONTROLLER)) { 4056 dev_warn(&h->pdev->dev, "Resetting array controller failed.\n"); 4057 return -EIO; 4058 } 4059 4060 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n"); 4061 if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) { 4062 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n"); 4063 return -1; 4064 } 4065 4066 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n"); 4067 if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) { 4068 dev_warn(&h->pdev->dev, "Board failed to become ready " 4069 "after soft reset.\n"); 4070 return -1; 4071 } 4072 4073 return 0; 4074 } 4075 4076 static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h) 4077 { 4078 free_irq(h->intr[h->intr_mode], h); 4079 #ifdef CONFIG_PCI_MSI 4080 if (h->msix_vector) 4081 pci_disable_msix(h->pdev); 4082 else if (h->msi_vector) 4083 pci_disable_msi(h->pdev); 4084 #endif /* CONFIG_PCI_MSI */ 4085 hpsa_free_sg_chain_blocks(h); 4086 hpsa_free_cmd_pool(h); 4087 kfree(h->blockFetchTable); 4088 pci_free_consistent(h->pdev, h->reply_pool_size, 4089 h->reply_pool, h->reply_pool_dhandle); 4090 if (h->vaddr) 4091 iounmap(h->vaddr); 4092 if (h->transtable) 4093 iounmap(h->transtable); 4094 if (h->cfgtable) 4095 iounmap(h->cfgtable); 4096 pci_release_regions(h->pdev); 4097 kfree(h); 4098 } 4099 4100 static void remove_ctlr_from_lockup_detector_list(struct ctlr_info *h) 4101 { 4102 assert_spin_locked(&lockup_detector_lock); 4103 if (!hpsa_lockup_detector) 4104 return; 4105 if (h->lockup_detected) 4106 return; /* already stopped the lockup detector */ 4107 list_del(&h->lockup_list); 4108 } 4109 4110 /* Called when controller lockup detected. */ 4111 static void fail_all_cmds_on_list(struct ctlr_info *h, struct list_head *list) 4112 { 4113 struct CommandList *c = NULL; 4114 4115 assert_spin_locked(&h->lock); 4116 /* Mark all outstanding commands as failed and complete them. */ 4117 while (!list_empty(list)) { 4118 c = list_entry(list->next, struct CommandList, list); 4119 c->err_info->CommandStatus = CMD_HARDWARE_ERR; 4120 finish_cmd(c, c->Header.Tag.lower); 4121 } 4122 } 4123 4124 static void controller_lockup_detected(struct ctlr_info *h) 4125 { 4126 unsigned long flags; 4127 4128 assert_spin_locked(&lockup_detector_lock); 4129 remove_ctlr_from_lockup_detector_list(h); 4130 h->access.set_intr_mask(h, HPSA_INTR_OFF); 4131 spin_lock_irqsave(&h->lock, flags); 4132 h->lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET); 4133 spin_unlock_irqrestore(&h->lock, flags); 4134 dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x\n", 4135 h->lockup_detected); 4136 pci_disable_device(h->pdev); 4137 spin_lock_irqsave(&h->lock, flags); 4138 fail_all_cmds_on_list(h, &h->cmpQ); 4139 fail_all_cmds_on_list(h, &h->reqQ); 4140 spin_unlock_irqrestore(&h->lock, flags); 4141 } 4142 4143 #define HEARTBEAT_SAMPLE_INTERVAL (10 * HZ) 4144 #define HEARTBEAT_CHECK_MINIMUM_INTERVAL (HEARTBEAT_SAMPLE_INTERVAL / 2) 4145 4146 static void detect_controller_lockup(struct ctlr_info *h) 4147 { 4148 u64 now; 4149 u32 heartbeat; 4150 unsigned long flags; 4151 4152 assert_spin_locked(&lockup_detector_lock); 4153 now = get_jiffies_64(); 4154 /* If we've received an interrupt recently, we're ok. */ 4155 if (time_after64(h->last_intr_timestamp + 4156 (HEARTBEAT_CHECK_MINIMUM_INTERVAL), now)) 4157 return; 4158 4159 /* 4160 * If we've already checked the heartbeat recently, we're ok. 4161 * This could happen if someone sends us a signal. We 4162 * otherwise don't care about signals in this thread. 4163 */ 4164 if (time_after64(h->last_heartbeat_timestamp + 4165 (HEARTBEAT_CHECK_MINIMUM_INTERVAL), now)) 4166 return; 4167 4168 /* If heartbeat has not changed since we last looked, we're not ok. */ 4169 spin_lock_irqsave(&h->lock, flags); 4170 heartbeat = readl(&h->cfgtable->HeartBeat); 4171 spin_unlock_irqrestore(&h->lock, flags); 4172 if (h->last_heartbeat == heartbeat) { 4173 controller_lockup_detected(h); 4174 return; 4175 } 4176 4177 /* We're ok. */ 4178 h->last_heartbeat = heartbeat; 4179 h->last_heartbeat_timestamp = now; 4180 } 4181 4182 static int detect_controller_lockup_thread(void *notused) 4183 { 4184 struct ctlr_info *h; 4185 unsigned long flags; 4186 4187 while (1) { 4188 struct list_head *this, *tmp; 4189 4190 schedule_timeout_interruptible(HEARTBEAT_SAMPLE_INTERVAL); 4191 if (kthread_should_stop()) 4192 break; 4193 spin_lock_irqsave(&lockup_detector_lock, flags); 4194 list_for_each_safe(this, tmp, &hpsa_ctlr_list) { 4195 h = list_entry(this, struct ctlr_info, lockup_list); 4196 detect_controller_lockup(h); 4197 } 4198 spin_unlock_irqrestore(&lockup_detector_lock, flags); 4199 } 4200 return 0; 4201 } 4202 4203 static void add_ctlr_to_lockup_detector_list(struct ctlr_info *h) 4204 { 4205 unsigned long flags; 4206 4207 spin_lock_irqsave(&lockup_detector_lock, flags); 4208 list_add_tail(&h->lockup_list, &hpsa_ctlr_list); 4209 spin_unlock_irqrestore(&lockup_detector_lock, flags); 4210 } 4211 4212 static void start_controller_lockup_detector(struct ctlr_info *h) 4213 { 4214 /* Start the lockup detector thread if not already started */ 4215 if (!hpsa_lockup_detector) { 4216 spin_lock_init(&lockup_detector_lock); 4217 hpsa_lockup_detector = 4218 kthread_run(detect_controller_lockup_thread, 4219 NULL, HPSA); 4220 } 4221 if (!hpsa_lockup_detector) { 4222 dev_warn(&h->pdev->dev, 4223 "Could not start lockup detector thread\n"); 4224 return; 4225 } 4226 add_ctlr_to_lockup_detector_list(h); 4227 } 4228 4229 static void stop_controller_lockup_detector(struct ctlr_info *h) 4230 { 4231 unsigned long flags; 4232 4233 spin_lock_irqsave(&lockup_detector_lock, flags); 4234 remove_ctlr_from_lockup_detector_list(h); 4235 /* If the list of ctlr's to monitor is empty, stop the thread */ 4236 if (list_empty(&hpsa_ctlr_list)) { 4237 spin_unlock_irqrestore(&lockup_detector_lock, flags); 4238 kthread_stop(hpsa_lockup_detector); 4239 spin_lock_irqsave(&lockup_detector_lock, flags); 4240 hpsa_lockup_detector = NULL; 4241 } 4242 spin_unlock_irqrestore(&lockup_detector_lock, flags); 4243 } 4244 4245 static int __devinit hpsa_init_one(struct pci_dev *pdev, 4246 const struct pci_device_id *ent) 4247 { 4248 int dac, rc; 4249 struct ctlr_info *h; 4250 int try_soft_reset = 0; 4251 unsigned long flags; 4252 4253 if (number_of_controllers == 0) 4254 printk(KERN_INFO DRIVER_NAME "\n"); 4255 4256 rc = hpsa_init_reset_devices(pdev); 4257 if (rc) { 4258 if (rc != -ENOTSUPP) 4259 return rc; 4260 /* If the reset fails in a particular way (it has no way to do 4261 * a proper hard reset, so returns -ENOTSUPP) we can try to do 4262 * a soft reset once we get the controller configured up to the 4263 * point that it can accept a command. 4264 */ 4265 try_soft_reset = 1; 4266 rc = 0; 4267 } 4268 4269 reinit_after_soft_reset: 4270 4271 /* Command structures must be aligned on a 32-byte boundary because 4272 * the 5 lower bits of the address are used by the hardware. and by 4273 * the driver. See comments in hpsa.h for more info. 4274 */ 4275 #define COMMANDLIST_ALIGNMENT 32 4276 BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT); 4277 h = kzalloc(sizeof(*h), GFP_KERNEL); 4278 if (!h) 4279 return -ENOMEM; 4280 4281 h->pdev = pdev; 4282 h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT; 4283 INIT_LIST_HEAD(&h->cmpQ); 4284 INIT_LIST_HEAD(&h->reqQ); 4285 spin_lock_init(&h->lock); 4286 spin_lock_init(&h->scan_lock); 4287 rc = hpsa_pci_init(h); 4288 if (rc != 0) 4289 goto clean1; 4290 4291 sprintf(h->devname, HPSA "%d", number_of_controllers); 4292 h->ctlr = number_of_controllers; 4293 number_of_controllers++; 4294 4295 /* configure PCI DMA stuff */ 4296 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 4297 if (rc == 0) { 4298 dac = 1; 4299 } else { 4300 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 4301 if (rc == 0) { 4302 dac = 0; 4303 } else { 4304 dev_err(&pdev->dev, "no suitable DMA available\n"); 4305 goto clean1; 4306 } 4307 } 4308 4309 /* make sure the board interrupts are off */ 4310 h->access.set_intr_mask(h, HPSA_INTR_OFF); 4311 4312 if (hpsa_request_irq(h, do_hpsa_intr_msi, do_hpsa_intr_intx)) 4313 goto clean2; 4314 dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n", 4315 h->devname, pdev->device, 4316 h->intr[h->intr_mode], dac ? "" : " not"); 4317 if (hpsa_allocate_cmd_pool(h)) 4318 goto clean4; 4319 if (hpsa_allocate_sg_chain_blocks(h)) 4320 goto clean4; 4321 init_waitqueue_head(&h->scan_wait_queue); 4322 h->scan_finished = 1; /* no scan currently in progress */ 4323 4324 pci_set_drvdata(pdev, h); 4325 h->ndevices = 0; 4326 h->scsi_host = NULL; 4327 spin_lock_init(&h->devlock); 4328 hpsa_put_ctlr_into_performant_mode(h); 4329 4330 /* At this point, the controller is ready to take commands. 4331 * Now, if reset_devices and the hard reset didn't work, try 4332 * the soft reset and see if that works. 4333 */ 4334 if (try_soft_reset) { 4335 4336 /* This is kind of gross. We may or may not get a completion 4337 * from the soft reset command, and if we do, then the value 4338 * from the fifo may or may not be valid. So, we wait 10 secs 4339 * after the reset throwing away any completions we get during 4340 * that time. Unregister the interrupt handler and register 4341 * fake ones to scoop up any residual completions. 4342 */ 4343 spin_lock_irqsave(&h->lock, flags); 4344 h->access.set_intr_mask(h, HPSA_INTR_OFF); 4345 spin_unlock_irqrestore(&h->lock, flags); 4346 free_irq(h->intr[h->intr_mode], h); 4347 rc = hpsa_request_irq(h, hpsa_msix_discard_completions, 4348 hpsa_intx_discard_completions); 4349 if (rc) { 4350 dev_warn(&h->pdev->dev, "Failed to request_irq after " 4351 "soft reset.\n"); 4352 goto clean4; 4353 } 4354 4355 rc = hpsa_kdump_soft_reset(h); 4356 if (rc) 4357 /* Neither hard nor soft reset worked, we're hosed. */ 4358 goto clean4; 4359 4360 dev_info(&h->pdev->dev, "Board READY.\n"); 4361 dev_info(&h->pdev->dev, 4362 "Waiting for stale completions to drain.\n"); 4363 h->access.set_intr_mask(h, HPSA_INTR_ON); 4364 msleep(10000); 4365 h->access.set_intr_mask(h, HPSA_INTR_OFF); 4366 4367 rc = controller_reset_failed(h->cfgtable); 4368 if (rc) 4369 dev_info(&h->pdev->dev, 4370 "Soft reset appears to have failed.\n"); 4371 4372 /* since the controller's reset, we have to go back and re-init 4373 * everything. Easiest to just forget what we've done and do it 4374 * all over again. 4375 */ 4376 hpsa_undo_allocations_after_kdump_soft_reset(h); 4377 try_soft_reset = 0; 4378 if (rc) 4379 /* don't go to clean4, we already unallocated */ 4380 return -ENODEV; 4381 4382 goto reinit_after_soft_reset; 4383 } 4384 4385 /* Turn the interrupts on so we can service requests */ 4386 h->access.set_intr_mask(h, HPSA_INTR_ON); 4387 4388 hpsa_hba_inquiry(h); 4389 hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */ 4390 start_controller_lockup_detector(h); 4391 return 1; 4392 4393 clean4: 4394 hpsa_free_sg_chain_blocks(h); 4395 hpsa_free_cmd_pool(h); 4396 free_irq(h->intr[h->intr_mode], h); 4397 clean2: 4398 clean1: 4399 kfree(h); 4400 return rc; 4401 } 4402 4403 static void hpsa_flush_cache(struct ctlr_info *h) 4404 { 4405 char *flush_buf; 4406 struct CommandList *c; 4407 4408 flush_buf = kzalloc(4, GFP_KERNEL); 4409 if (!flush_buf) 4410 return; 4411 4412 c = cmd_special_alloc(h); 4413 if (!c) { 4414 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n"); 4415 goto out_of_memory; 4416 } 4417 fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0, 4418 RAID_CTLR_LUNID, TYPE_CMD); 4419 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE); 4420 if (c->err_info->CommandStatus != 0) 4421 dev_warn(&h->pdev->dev, 4422 "error flushing cache on controller\n"); 4423 cmd_special_free(h, c); 4424 out_of_memory: 4425 kfree(flush_buf); 4426 } 4427 4428 static void hpsa_shutdown(struct pci_dev *pdev) 4429 { 4430 struct ctlr_info *h; 4431 4432 h = pci_get_drvdata(pdev); 4433 /* Turn board interrupts off and send the flush cache command 4434 * sendcmd will turn off interrupt, and send the flush... 4435 * To write all data in the battery backed cache to disks 4436 */ 4437 hpsa_flush_cache(h); 4438 h->access.set_intr_mask(h, HPSA_INTR_OFF); 4439 free_irq(h->intr[h->intr_mode], h); 4440 #ifdef CONFIG_PCI_MSI 4441 if (h->msix_vector) 4442 pci_disable_msix(h->pdev); 4443 else if (h->msi_vector) 4444 pci_disable_msi(h->pdev); 4445 #endif /* CONFIG_PCI_MSI */ 4446 } 4447 4448 static void __devexit hpsa_free_device_info(struct ctlr_info *h) 4449 { 4450 int i; 4451 4452 for (i = 0; i < h->ndevices; i++) 4453 kfree(h->dev[i]); 4454 } 4455 4456 static void __devexit hpsa_remove_one(struct pci_dev *pdev) 4457 { 4458 struct ctlr_info *h; 4459 4460 if (pci_get_drvdata(pdev) == NULL) { 4461 dev_err(&pdev->dev, "unable to remove device\n"); 4462 return; 4463 } 4464 h = pci_get_drvdata(pdev); 4465 stop_controller_lockup_detector(h); 4466 hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */ 4467 hpsa_shutdown(pdev); 4468 iounmap(h->vaddr); 4469 iounmap(h->transtable); 4470 iounmap(h->cfgtable); 4471 hpsa_free_device_info(h); 4472 hpsa_free_sg_chain_blocks(h); 4473 pci_free_consistent(h->pdev, 4474 h->nr_cmds * sizeof(struct CommandList), 4475 h->cmd_pool, h->cmd_pool_dhandle); 4476 pci_free_consistent(h->pdev, 4477 h->nr_cmds * sizeof(struct ErrorInfo), 4478 h->errinfo_pool, h->errinfo_pool_dhandle); 4479 pci_free_consistent(h->pdev, h->reply_pool_size, 4480 h->reply_pool, h->reply_pool_dhandle); 4481 kfree(h->cmd_pool_bits); 4482 kfree(h->blockFetchTable); 4483 kfree(h->hba_inquiry_data); 4484 /* 4485 * Deliberately omit pci_disable_device(): it does something nasty to 4486 * Smart Array controllers that pci_enable_device does not undo 4487 */ 4488 pci_release_regions(pdev); 4489 pci_set_drvdata(pdev, NULL); 4490 kfree(h); 4491 } 4492 4493 static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev, 4494 __attribute__((unused)) pm_message_t state) 4495 { 4496 return -ENOSYS; 4497 } 4498 4499 static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev) 4500 { 4501 return -ENOSYS; 4502 } 4503 4504 static struct pci_driver hpsa_pci_driver = { 4505 .name = HPSA, 4506 .probe = hpsa_init_one, 4507 .remove = __devexit_p(hpsa_remove_one), 4508 .id_table = hpsa_pci_device_id, /* id_table */ 4509 .shutdown = hpsa_shutdown, 4510 .suspend = hpsa_suspend, 4511 .resume = hpsa_resume, 4512 }; 4513 4514 /* Fill in bucket_map[], given nsgs (the max number of 4515 * scatter gather elements supported) and bucket[], 4516 * which is an array of 8 integers. The bucket[] array 4517 * contains 8 different DMA transfer sizes (in 16 4518 * byte increments) which the controller uses to fetch 4519 * commands. This function fills in bucket_map[], which 4520 * maps a given number of scatter gather elements to one of 4521 * the 8 DMA transfer sizes. The point of it is to allow the 4522 * controller to only do as much DMA as needed to fetch the 4523 * command, with the DMA transfer size encoded in the lower 4524 * bits of the command address. 4525 */ 4526 static void calc_bucket_map(int bucket[], int num_buckets, 4527 int nsgs, int *bucket_map) 4528 { 4529 int i, j, b, size; 4530 4531 /* even a command with 0 SGs requires 4 blocks */ 4532 #define MINIMUM_TRANSFER_BLOCKS 4 4533 #define NUM_BUCKETS 8 4534 /* Note, bucket_map must have nsgs+1 entries. */ 4535 for (i = 0; i <= nsgs; i++) { 4536 /* Compute size of a command with i SG entries */ 4537 size = i + MINIMUM_TRANSFER_BLOCKS; 4538 b = num_buckets; /* Assume the biggest bucket */ 4539 /* Find the bucket that is just big enough */ 4540 for (j = 0; j < 8; j++) { 4541 if (bucket[j] >= size) { 4542 b = j; 4543 break; 4544 } 4545 } 4546 /* for a command with i SG entries, use bucket b. */ 4547 bucket_map[i] = b; 4548 } 4549 } 4550 4551 static __devinit void hpsa_enter_performant_mode(struct ctlr_info *h, 4552 u32 use_short_tags) 4553 { 4554 int i; 4555 unsigned long register_value; 4556 4557 /* This is a bit complicated. There are 8 registers on 4558 * the controller which we write to to tell it 8 different 4559 * sizes of commands which there may be. It's a way of 4560 * reducing the DMA done to fetch each command. Encoded into 4561 * each command's tag are 3 bits which communicate to the controller 4562 * which of the eight sizes that command fits within. The size of 4563 * each command depends on how many scatter gather entries there are. 4564 * Each SG entry requires 16 bytes. The eight registers are programmed 4565 * with the number of 16-byte blocks a command of that size requires. 4566 * The smallest command possible requires 5 such 16 byte blocks. 4567 * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte 4568 * blocks. Note, this only extends to the SG entries contained 4569 * within the command block, and does not extend to chained blocks 4570 * of SG elements. bft[] contains the eight values we write to 4571 * the registers. They are not evenly distributed, but have more 4572 * sizes for small commands, and fewer sizes for larger commands. 4573 */ 4574 int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4}; 4575 BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4); 4576 /* 5 = 1 s/g entry or 4k 4577 * 6 = 2 s/g entry or 8k 4578 * 8 = 4 s/g entry or 16k 4579 * 10 = 6 s/g entry or 24k 4580 */ 4581 4582 h->reply_pool_wraparound = 1; /* spec: init to 1 */ 4583 4584 /* Controller spec: zero out this buffer. */ 4585 memset(h->reply_pool, 0, h->reply_pool_size); 4586 h->reply_pool_head = h->reply_pool; 4587 4588 bft[7] = SG_ENTRIES_IN_CMD + 4; 4589 calc_bucket_map(bft, ARRAY_SIZE(bft), 4590 SG_ENTRIES_IN_CMD, h->blockFetchTable); 4591 for (i = 0; i < 8; i++) 4592 writel(bft[i], &h->transtable->BlockFetch[i]); 4593 4594 /* size of controller ring buffer */ 4595 writel(h->max_commands, &h->transtable->RepQSize); 4596 writel(1, &h->transtable->RepQCount); 4597 writel(0, &h->transtable->RepQCtrAddrLow32); 4598 writel(0, &h->transtable->RepQCtrAddrHigh32); 4599 writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32); 4600 writel(0, &h->transtable->RepQAddr0High32); 4601 writel(CFGTBL_Trans_Performant | use_short_tags, 4602 &(h->cfgtable->HostWrite.TransportRequest)); 4603 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 4604 hpsa_wait_for_mode_change_ack(h); 4605 register_value = readl(&(h->cfgtable->TransportActive)); 4606 if (!(register_value & CFGTBL_Trans_Performant)) { 4607 dev_warn(&h->pdev->dev, "unable to get board into" 4608 " performant mode\n"); 4609 return; 4610 } 4611 /* Change the access methods to the performant access methods */ 4612 h->access = SA5_performant_access; 4613 h->transMethod = CFGTBL_Trans_Performant; 4614 } 4615 4616 static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h) 4617 { 4618 u32 trans_support; 4619 4620 if (hpsa_simple_mode) 4621 return; 4622 4623 trans_support = readl(&(h->cfgtable->TransportSupport)); 4624 if (!(trans_support & PERFORMANT_MODE)) 4625 return; 4626 4627 hpsa_get_max_perf_mode_cmds(h); 4628 /* Performant mode ring buffer and supporting data structures */ 4629 h->reply_pool_size = h->max_commands * sizeof(u64); 4630 h->reply_pool = pci_alloc_consistent(h->pdev, h->reply_pool_size, 4631 &(h->reply_pool_dhandle)); 4632 4633 /* Need a block fetch table for performant mode */ 4634 h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) * 4635 sizeof(u32)), GFP_KERNEL); 4636 4637 if ((h->reply_pool == NULL) 4638 || (h->blockFetchTable == NULL)) 4639 goto clean_up; 4640 4641 hpsa_enter_performant_mode(h, 4642 trans_support & CFGTBL_Trans_use_short_tags); 4643 4644 return; 4645 4646 clean_up: 4647 if (h->reply_pool) 4648 pci_free_consistent(h->pdev, h->reply_pool_size, 4649 h->reply_pool, h->reply_pool_dhandle); 4650 kfree(h->blockFetchTable); 4651 } 4652 4653 /* 4654 * This is it. Register the PCI driver information for the cards we control 4655 * the OS will call our registered routines when it finds one of our cards. 4656 */ 4657 static int __init hpsa_init(void) 4658 { 4659 return pci_register_driver(&hpsa_pci_driver); 4660 } 4661 4662 static void __exit hpsa_cleanup(void) 4663 { 4664 pci_unregister_driver(&hpsa_pci_driver); 4665 } 4666 4667 module_init(hpsa_init); 4668 module_exit(hpsa_cleanup); 4669