1 /* 2 * Disk Array driver for HP Smart Array SAS controllers 3 * Copyright 2016 Microsemi Corporation 4 * Copyright 2014-2015 PMC-Sierra, Inc. 5 * Copyright 2000,2009-2015 Hewlett-Packard Development Company, L.P. 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; version 2 of the License. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or 14 * NON INFRINGEMENT. See the GNU General Public License for more details. 15 * 16 * Questions/Comments/Bugfixes to esc.storagedev@microsemi.com 17 * 18 */ 19 20 #include <linux/module.h> 21 #include <linux/interrupt.h> 22 #include <linux/types.h> 23 #include <linux/pci.h> 24 #include <linux/pci-aspm.h> 25 #include <linux/kernel.h> 26 #include <linux/slab.h> 27 #include <linux/delay.h> 28 #include <linux/fs.h> 29 #include <linux/timer.h> 30 #include <linux/init.h> 31 #include <linux/spinlock.h> 32 #include <linux/compat.h> 33 #include <linux/blktrace_api.h> 34 #include <linux/uaccess.h> 35 #include <linux/io.h> 36 #include <linux/dma-mapping.h> 37 #include <linux/completion.h> 38 #include <linux/moduleparam.h> 39 #include <scsi/scsi.h> 40 #include <scsi/scsi_cmnd.h> 41 #include <scsi/scsi_device.h> 42 #include <scsi/scsi_host.h> 43 #include <scsi/scsi_tcq.h> 44 #include <scsi/scsi_eh.h> 45 #include <scsi/scsi_transport_sas.h> 46 #include <scsi/scsi_dbg.h> 47 #include <linux/cciss_ioctl.h> 48 #include <linux/string.h> 49 #include <linux/bitmap.h> 50 #include <linux/atomic.h> 51 #include <linux/jiffies.h> 52 #include <linux/percpu-defs.h> 53 #include <linux/percpu.h> 54 #include <asm/unaligned.h> 55 #include <asm/div64.h> 56 #include "hpsa_cmd.h" 57 #include "hpsa.h" 58 59 /* 60 * HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' 61 * with an optional trailing '-' followed by a byte value (0-255). 62 */ 63 #define HPSA_DRIVER_VERSION "3.4.18-0" 64 #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")" 65 #define HPSA "hpsa" 66 67 /* How long to wait for CISS doorbell communication */ 68 #define CLEAR_EVENT_WAIT_INTERVAL 20 /* ms for each msleep() call */ 69 #define MODE_CHANGE_WAIT_INTERVAL 10 /* ms for each msleep() call */ 70 #define MAX_CLEAR_EVENT_WAIT 30000 /* times 20 ms = 600 s */ 71 #define MAX_MODE_CHANGE_WAIT 2000 /* times 10 ms = 20 s */ 72 #define MAX_IOCTL_CONFIG_WAIT 1000 73 74 /*define how many times we will try a command because of bus resets */ 75 #define MAX_CMD_RETRIES 3 76 77 /* Embedded module documentation macros - see modules.h */ 78 MODULE_AUTHOR("Hewlett-Packard Company"); 79 MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \ 80 HPSA_DRIVER_VERSION); 81 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers"); 82 MODULE_VERSION(HPSA_DRIVER_VERSION); 83 MODULE_LICENSE("GPL"); 84 85 static int hpsa_allow_any; 86 module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR); 87 MODULE_PARM_DESC(hpsa_allow_any, 88 "Allow hpsa driver to access unknown HP Smart Array hardware"); 89 static int hpsa_simple_mode; 90 module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR); 91 MODULE_PARM_DESC(hpsa_simple_mode, 92 "Use 'simple mode' rather than 'performant mode'"); 93 94 /* define the PCI info for the cards we can control */ 95 static const struct pci_device_id hpsa_pci_device_id[] = { 96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241}, 97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243}, 98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245}, 99 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247}, 100 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249}, 101 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A}, 102 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B}, 103 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233}, 104 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350}, 105 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351}, 106 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352}, 107 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353}, 108 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354}, 109 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355}, 110 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356}, 111 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103c, 0x1920}, 112 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1921}, 113 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1922}, 114 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1923}, 115 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1924}, 116 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103c, 0x1925}, 117 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1926}, 118 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1928}, 119 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1929}, 120 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BD}, 121 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BE}, 122 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BF}, 123 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C0}, 124 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C1}, 125 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C2}, 126 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C3}, 127 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C4}, 128 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C5}, 129 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C6}, 130 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C7}, 131 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C8}, 132 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C9}, 133 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CA}, 134 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CB}, 135 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CC}, 136 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CD}, 137 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CE}, 138 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0580}, 139 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0581}, 140 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0582}, 141 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0583}, 142 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0584}, 143 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0585}, 144 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076}, 145 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087}, 146 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D}, 147 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088}, 148 {PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f}, 149 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 150 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0}, 151 {0,} 152 }; 153 154 MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id); 155 156 /* board_id = Subsystem Device ID & Vendor ID 157 * product = Marketing Name for the board 158 * access = Address of the struct of function pointers 159 */ 160 static struct board_type products[] = { 161 {0x3241103C, "Smart Array P212", &SA5_access}, 162 {0x3243103C, "Smart Array P410", &SA5_access}, 163 {0x3245103C, "Smart Array P410i", &SA5_access}, 164 {0x3247103C, "Smart Array P411", &SA5_access}, 165 {0x3249103C, "Smart Array P812", &SA5_access}, 166 {0x324A103C, "Smart Array P712m", &SA5_access}, 167 {0x324B103C, "Smart Array P711m", &SA5_access}, 168 {0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */ 169 {0x3350103C, "Smart Array P222", &SA5_access}, 170 {0x3351103C, "Smart Array P420", &SA5_access}, 171 {0x3352103C, "Smart Array P421", &SA5_access}, 172 {0x3353103C, "Smart Array P822", &SA5_access}, 173 {0x3354103C, "Smart Array P420i", &SA5_access}, 174 {0x3355103C, "Smart Array P220i", &SA5_access}, 175 {0x3356103C, "Smart Array P721m", &SA5_access}, 176 {0x1920103C, "Smart Array P430i", &SA5_access}, 177 {0x1921103C, "Smart Array P830i", &SA5_access}, 178 {0x1922103C, "Smart Array P430", &SA5_access}, 179 {0x1923103C, "Smart Array P431", &SA5_access}, 180 {0x1924103C, "Smart Array P830", &SA5_access}, 181 {0x1925103C, "Smart Array P831", &SA5_access}, 182 {0x1926103C, "Smart Array P731m", &SA5_access}, 183 {0x1928103C, "Smart Array P230i", &SA5_access}, 184 {0x1929103C, "Smart Array P530", &SA5_access}, 185 {0x21BD103C, "Smart Array P244br", &SA5_access}, 186 {0x21BE103C, "Smart Array P741m", &SA5_access}, 187 {0x21BF103C, "Smart HBA H240ar", &SA5_access}, 188 {0x21C0103C, "Smart Array P440ar", &SA5_access}, 189 {0x21C1103C, "Smart Array P840ar", &SA5_access}, 190 {0x21C2103C, "Smart Array P440", &SA5_access}, 191 {0x21C3103C, "Smart Array P441", &SA5_access}, 192 {0x21C4103C, "Smart Array", &SA5_access}, 193 {0x21C5103C, "Smart Array P841", &SA5_access}, 194 {0x21C6103C, "Smart HBA H244br", &SA5_access}, 195 {0x21C7103C, "Smart HBA H240", &SA5_access}, 196 {0x21C8103C, "Smart HBA H241", &SA5_access}, 197 {0x21C9103C, "Smart Array", &SA5_access}, 198 {0x21CA103C, "Smart Array P246br", &SA5_access}, 199 {0x21CB103C, "Smart Array P840", &SA5_access}, 200 {0x21CC103C, "Smart Array", &SA5_access}, 201 {0x21CD103C, "Smart Array", &SA5_access}, 202 {0x21CE103C, "Smart HBA", &SA5_access}, 203 {0x05809005, "SmartHBA-SA", &SA5_access}, 204 {0x05819005, "SmartHBA-SA 8i", &SA5_access}, 205 {0x05829005, "SmartHBA-SA 8i8e", &SA5_access}, 206 {0x05839005, "SmartHBA-SA 8e", &SA5_access}, 207 {0x05849005, "SmartHBA-SA 16i", &SA5_access}, 208 {0x05859005, "SmartHBA-SA 4i4e", &SA5_access}, 209 {0x00761590, "HP Storage P1224 Array Controller", &SA5_access}, 210 {0x00871590, "HP Storage P1224e Array Controller", &SA5_access}, 211 {0x007D1590, "HP Storage P1228 Array Controller", &SA5_access}, 212 {0x00881590, "HP Storage P1228e Array Controller", &SA5_access}, 213 {0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access}, 214 {0xFFFF103C, "Unknown Smart Array", &SA5_access}, 215 }; 216 217 static struct scsi_transport_template *hpsa_sas_transport_template; 218 static int hpsa_add_sas_host(struct ctlr_info *h); 219 static void hpsa_delete_sas_host(struct ctlr_info *h); 220 static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node, 221 struct hpsa_scsi_dev_t *device); 222 static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device); 223 static struct hpsa_scsi_dev_t 224 *hpsa_find_device_by_sas_rphy(struct ctlr_info *h, 225 struct sas_rphy *rphy); 226 227 #define SCSI_CMD_BUSY ((struct scsi_cmnd *)&hpsa_cmd_busy) 228 static const struct scsi_cmnd hpsa_cmd_busy; 229 #define SCSI_CMD_IDLE ((struct scsi_cmnd *)&hpsa_cmd_idle) 230 static const struct scsi_cmnd hpsa_cmd_idle; 231 static int number_of_controllers; 232 233 static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id); 234 static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id); 235 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg); 236 237 #ifdef CONFIG_COMPAT 238 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, 239 void __user *arg); 240 #endif 241 242 static void cmd_free(struct ctlr_info *h, struct CommandList *c); 243 static struct CommandList *cmd_alloc(struct ctlr_info *h); 244 static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c); 245 static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h, 246 struct scsi_cmnd *scmd); 247 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 248 void *buff, size_t size, u16 page_code, unsigned char *scsi3addr, 249 int cmd_type); 250 static void hpsa_free_cmd_pool(struct ctlr_info *h); 251 #define VPD_PAGE (1 << 8) 252 #define HPSA_SIMPLE_ERROR_BITS 0x03 253 254 static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd); 255 static void hpsa_scan_start(struct Scsi_Host *); 256 static int hpsa_scan_finished(struct Scsi_Host *sh, 257 unsigned long elapsed_time); 258 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth); 259 260 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd); 261 static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd); 262 static int hpsa_slave_alloc(struct scsi_device *sdev); 263 static int hpsa_slave_configure(struct scsi_device *sdev); 264 static void hpsa_slave_destroy(struct scsi_device *sdev); 265 266 static void hpsa_update_scsi_devices(struct ctlr_info *h); 267 static int check_for_unit_attention(struct ctlr_info *h, 268 struct CommandList *c); 269 static void check_ioctl_unit_attention(struct ctlr_info *h, 270 struct CommandList *c); 271 /* performant mode helper functions */ 272 static void calc_bucket_map(int *bucket, int num_buckets, 273 int nsgs, int min_blocks, u32 *bucket_map); 274 static void hpsa_free_performant_mode(struct ctlr_info *h); 275 static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h); 276 static inline u32 next_command(struct ctlr_info *h, u8 q); 277 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 278 u32 *cfg_base_addr, u64 *cfg_base_addr_index, 279 u64 *cfg_offset); 280 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 281 unsigned long *memory_bar); 282 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id); 283 static int wait_for_device_to_become_ready(struct ctlr_info *h, 284 unsigned char lunaddr[], 285 int reply_queue); 286 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 287 int wait_for_ready); 288 static inline void finish_cmd(struct CommandList *c); 289 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h); 290 #define BOARD_NOT_READY 0 291 #define BOARD_READY 1 292 static void hpsa_drain_accel_commands(struct ctlr_info *h); 293 static void hpsa_flush_cache(struct ctlr_info *h); 294 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h, 295 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 296 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk); 297 static void hpsa_command_resubmit_worker(struct work_struct *work); 298 static u32 lockup_detected(struct ctlr_info *h); 299 static int detect_controller_lockup(struct ctlr_info *h); 300 static void hpsa_disable_rld_caching(struct ctlr_info *h); 301 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 302 struct ReportExtendedLUNdata *buf, int bufsize); 303 static bool hpsa_vpd_page_supported(struct ctlr_info *h, 304 unsigned char scsi3addr[], u8 page); 305 static int hpsa_luns_changed(struct ctlr_info *h); 306 static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c, 307 struct hpsa_scsi_dev_t *dev, 308 unsigned char *scsi3addr); 309 310 static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev) 311 { 312 unsigned long *priv = shost_priv(sdev->host); 313 return (struct ctlr_info *) *priv; 314 } 315 316 static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh) 317 { 318 unsigned long *priv = shost_priv(sh); 319 return (struct ctlr_info *) *priv; 320 } 321 322 static inline bool hpsa_is_cmd_idle(struct CommandList *c) 323 { 324 return c->scsi_cmd == SCSI_CMD_IDLE; 325 } 326 327 static inline bool hpsa_is_pending_event(struct CommandList *c) 328 { 329 return c->abort_pending || c->reset_pending; 330 } 331 332 /* extract sense key, asc, and ascq from sense data. -1 means invalid. */ 333 static void decode_sense_data(const u8 *sense_data, int sense_data_len, 334 u8 *sense_key, u8 *asc, u8 *ascq) 335 { 336 struct scsi_sense_hdr sshdr; 337 bool rc; 338 339 *sense_key = -1; 340 *asc = -1; 341 *ascq = -1; 342 343 if (sense_data_len < 1) 344 return; 345 346 rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr); 347 if (rc) { 348 *sense_key = sshdr.sense_key; 349 *asc = sshdr.asc; 350 *ascq = sshdr.ascq; 351 } 352 } 353 354 static int check_for_unit_attention(struct ctlr_info *h, 355 struct CommandList *c) 356 { 357 u8 sense_key, asc, ascq; 358 int sense_len; 359 360 if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo)) 361 sense_len = sizeof(c->err_info->SenseInfo); 362 else 363 sense_len = c->err_info->SenseLen; 364 365 decode_sense_data(c->err_info->SenseInfo, sense_len, 366 &sense_key, &asc, &ascq); 367 if (sense_key != UNIT_ATTENTION || asc == 0xff) 368 return 0; 369 370 switch (asc) { 371 case STATE_CHANGED: 372 dev_warn(&h->pdev->dev, 373 "%s: a state change detected, command retried\n", 374 h->devname); 375 break; 376 case LUN_FAILED: 377 dev_warn(&h->pdev->dev, 378 "%s: LUN failure detected\n", h->devname); 379 break; 380 case REPORT_LUNS_CHANGED: 381 dev_warn(&h->pdev->dev, 382 "%s: report LUN data changed\n", h->devname); 383 /* 384 * Note: this REPORT_LUNS_CHANGED condition only occurs on the external 385 * target (array) devices. 386 */ 387 break; 388 case POWER_OR_RESET: 389 dev_warn(&h->pdev->dev, 390 "%s: a power on or device reset detected\n", 391 h->devname); 392 break; 393 case UNIT_ATTENTION_CLEARED: 394 dev_warn(&h->pdev->dev, 395 "%s: unit attention cleared by another initiator\n", 396 h->devname); 397 break; 398 default: 399 dev_warn(&h->pdev->dev, 400 "%s: unknown unit attention detected\n", 401 h->devname); 402 break; 403 } 404 return 1; 405 } 406 407 static int check_for_busy(struct ctlr_info *h, struct CommandList *c) 408 { 409 if (c->err_info->CommandStatus != CMD_TARGET_STATUS || 410 (c->err_info->ScsiStatus != SAM_STAT_BUSY && 411 c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL)) 412 return 0; 413 dev_warn(&h->pdev->dev, HPSA "device busy"); 414 return 1; 415 } 416 417 static u32 lockup_detected(struct ctlr_info *h); 418 static ssize_t host_show_lockup_detected(struct device *dev, 419 struct device_attribute *attr, char *buf) 420 { 421 int ld; 422 struct ctlr_info *h; 423 struct Scsi_Host *shost = class_to_shost(dev); 424 425 h = shost_to_hba(shost); 426 ld = lockup_detected(h); 427 428 return sprintf(buf, "ld=%d\n", ld); 429 } 430 431 static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev, 432 struct device_attribute *attr, 433 const char *buf, size_t count) 434 { 435 int status, len; 436 struct ctlr_info *h; 437 struct Scsi_Host *shost = class_to_shost(dev); 438 char tmpbuf[10]; 439 440 if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO)) 441 return -EACCES; 442 len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count; 443 strncpy(tmpbuf, buf, len); 444 tmpbuf[len] = '\0'; 445 if (sscanf(tmpbuf, "%d", &status) != 1) 446 return -EINVAL; 447 h = shost_to_hba(shost); 448 h->acciopath_status = !!status; 449 dev_warn(&h->pdev->dev, 450 "hpsa: HP SSD Smart Path %s via sysfs update.\n", 451 h->acciopath_status ? "enabled" : "disabled"); 452 return count; 453 } 454 455 static ssize_t host_store_raid_offload_debug(struct device *dev, 456 struct device_attribute *attr, 457 const char *buf, size_t count) 458 { 459 int debug_level, len; 460 struct ctlr_info *h; 461 struct Scsi_Host *shost = class_to_shost(dev); 462 char tmpbuf[10]; 463 464 if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO)) 465 return -EACCES; 466 len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count; 467 strncpy(tmpbuf, buf, len); 468 tmpbuf[len] = '\0'; 469 if (sscanf(tmpbuf, "%d", &debug_level) != 1) 470 return -EINVAL; 471 if (debug_level < 0) 472 debug_level = 0; 473 h = shost_to_hba(shost); 474 h->raid_offload_debug = debug_level; 475 dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n", 476 h->raid_offload_debug); 477 return count; 478 } 479 480 static ssize_t host_store_rescan(struct device *dev, 481 struct device_attribute *attr, 482 const char *buf, size_t count) 483 { 484 struct ctlr_info *h; 485 struct Scsi_Host *shost = class_to_shost(dev); 486 h = shost_to_hba(shost); 487 hpsa_scan_start(h->scsi_host); 488 return count; 489 } 490 491 static ssize_t host_show_firmware_revision(struct device *dev, 492 struct device_attribute *attr, char *buf) 493 { 494 struct ctlr_info *h; 495 struct Scsi_Host *shost = class_to_shost(dev); 496 unsigned char *fwrev; 497 498 h = shost_to_hba(shost); 499 if (!h->hba_inquiry_data) 500 return 0; 501 fwrev = &h->hba_inquiry_data[32]; 502 return snprintf(buf, 20, "%c%c%c%c\n", 503 fwrev[0], fwrev[1], fwrev[2], fwrev[3]); 504 } 505 506 static ssize_t host_show_commands_outstanding(struct device *dev, 507 struct device_attribute *attr, char *buf) 508 { 509 struct Scsi_Host *shost = class_to_shost(dev); 510 struct ctlr_info *h = shost_to_hba(shost); 511 512 return snprintf(buf, 20, "%d\n", 513 atomic_read(&h->commands_outstanding)); 514 } 515 516 static ssize_t host_show_transport_mode(struct device *dev, 517 struct device_attribute *attr, char *buf) 518 { 519 struct ctlr_info *h; 520 struct Scsi_Host *shost = class_to_shost(dev); 521 522 h = shost_to_hba(shost); 523 return snprintf(buf, 20, "%s\n", 524 h->transMethod & CFGTBL_Trans_Performant ? 525 "performant" : "simple"); 526 } 527 528 static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev, 529 struct device_attribute *attr, char *buf) 530 { 531 struct ctlr_info *h; 532 struct Scsi_Host *shost = class_to_shost(dev); 533 534 h = shost_to_hba(shost); 535 return snprintf(buf, 30, "HP SSD Smart Path %s\n", 536 (h->acciopath_status == 1) ? "enabled" : "disabled"); 537 } 538 539 /* List of controllers which cannot be hard reset on kexec with reset_devices */ 540 static u32 unresettable_controller[] = { 541 0x324a103C, /* Smart Array P712m */ 542 0x324b103C, /* Smart Array P711m */ 543 0x3223103C, /* Smart Array P800 */ 544 0x3234103C, /* Smart Array P400 */ 545 0x3235103C, /* Smart Array P400i */ 546 0x3211103C, /* Smart Array E200i */ 547 0x3212103C, /* Smart Array E200 */ 548 0x3213103C, /* Smart Array E200i */ 549 0x3214103C, /* Smart Array E200i */ 550 0x3215103C, /* Smart Array E200i */ 551 0x3237103C, /* Smart Array E500 */ 552 0x323D103C, /* Smart Array P700m */ 553 0x40800E11, /* Smart Array 5i */ 554 0x409C0E11, /* Smart Array 6400 */ 555 0x409D0E11, /* Smart Array 6400 EM */ 556 0x40700E11, /* Smart Array 5300 */ 557 0x40820E11, /* Smart Array 532 */ 558 0x40830E11, /* Smart Array 5312 */ 559 0x409A0E11, /* Smart Array 641 */ 560 0x409B0E11, /* Smart Array 642 */ 561 0x40910E11, /* Smart Array 6i */ 562 }; 563 564 /* List of controllers which cannot even be soft reset */ 565 static u32 soft_unresettable_controller[] = { 566 0x40800E11, /* Smart Array 5i */ 567 0x40700E11, /* Smart Array 5300 */ 568 0x40820E11, /* Smart Array 532 */ 569 0x40830E11, /* Smart Array 5312 */ 570 0x409A0E11, /* Smart Array 641 */ 571 0x409B0E11, /* Smart Array 642 */ 572 0x40910E11, /* Smart Array 6i */ 573 /* Exclude 640x boards. These are two pci devices in one slot 574 * which share a battery backed cache module. One controls the 575 * cache, the other accesses the cache through the one that controls 576 * it. If we reset the one controlling the cache, the other will 577 * likely not be happy. Just forbid resetting this conjoined mess. 578 * The 640x isn't really supported by hpsa anyway. 579 */ 580 0x409C0E11, /* Smart Array 6400 */ 581 0x409D0E11, /* Smart Array 6400 EM */ 582 }; 583 584 static u32 needs_abort_tags_swizzled[] = { 585 0x323D103C, /* Smart Array P700m */ 586 0x324a103C, /* Smart Array P712m */ 587 0x324b103C, /* SmartArray P711m */ 588 }; 589 590 static int board_id_in_array(u32 a[], int nelems, u32 board_id) 591 { 592 int i; 593 594 for (i = 0; i < nelems; i++) 595 if (a[i] == board_id) 596 return 1; 597 return 0; 598 } 599 600 static int ctlr_is_hard_resettable(u32 board_id) 601 { 602 return !board_id_in_array(unresettable_controller, 603 ARRAY_SIZE(unresettable_controller), board_id); 604 } 605 606 static int ctlr_is_soft_resettable(u32 board_id) 607 { 608 return !board_id_in_array(soft_unresettable_controller, 609 ARRAY_SIZE(soft_unresettable_controller), board_id); 610 } 611 612 static int ctlr_is_resettable(u32 board_id) 613 { 614 return ctlr_is_hard_resettable(board_id) || 615 ctlr_is_soft_resettable(board_id); 616 } 617 618 static int ctlr_needs_abort_tags_swizzled(u32 board_id) 619 { 620 return board_id_in_array(needs_abort_tags_swizzled, 621 ARRAY_SIZE(needs_abort_tags_swizzled), board_id); 622 } 623 624 static ssize_t host_show_resettable(struct device *dev, 625 struct device_attribute *attr, char *buf) 626 { 627 struct ctlr_info *h; 628 struct Scsi_Host *shost = class_to_shost(dev); 629 630 h = shost_to_hba(shost); 631 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id)); 632 } 633 634 static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[]) 635 { 636 return (scsi3addr[3] & 0xC0) == 0x40; 637 } 638 639 static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6", 640 "1(+0)ADM", "UNKNOWN", "PHYS DRV" 641 }; 642 #define HPSA_RAID_0 0 643 #define HPSA_RAID_4 1 644 #define HPSA_RAID_1 2 /* also used for RAID 10 */ 645 #define HPSA_RAID_5 3 /* also used for RAID 50 */ 646 #define HPSA_RAID_51 4 647 #define HPSA_RAID_6 5 /* also used for RAID 60 */ 648 #define HPSA_RAID_ADM 6 /* also used for RAID 1+0 ADM */ 649 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 2) 650 #define PHYSICAL_DRIVE (ARRAY_SIZE(raid_label) - 1) 651 652 static inline bool is_logical_device(struct hpsa_scsi_dev_t *device) 653 { 654 return !device->physical_device; 655 } 656 657 static ssize_t raid_level_show(struct device *dev, 658 struct device_attribute *attr, char *buf) 659 { 660 ssize_t l = 0; 661 unsigned char rlevel; 662 struct ctlr_info *h; 663 struct scsi_device *sdev; 664 struct hpsa_scsi_dev_t *hdev; 665 unsigned long flags; 666 667 sdev = to_scsi_device(dev); 668 h = sdev_to_hba(sdev); 669 spin_lock_irqsave(&h->lock, flags); 670 hdev = sdev->hostdata; 671 if (!hdev) { 672 spin_unlock_irqrestore(&h->lock, flags); 673 return -ENODEV; 674 } 675 676 /* Is this even a logical drive? */ 677 if (!is_logical_device(hdev)) { 678 spin_unlock_irqrestore(&h->lock, flags); 679 l = snprintf(buf, PAGE_SIZE, "N/A\n"); 680 return l; 681 } 682 683 rlevel = hdev->raid_level; 684 spin_unlock_irqrestore(&h->lock, flags); 685 if (rlevel > RAID_UNKNOWN) 686 rlevel = RAID_UNKNOWN; 687 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]); 688 return l; 689 } 690 691 static ssize_t lunid_show(struct device *dev, 692 struct device_attribute *attr, char *buf) 693 { 694 struct ctlr_info *h; 695 struct scsi_device *sdev; 696 struct hpsa_scsi_dev_t *hdev; 697 unsigned long flags; 698 unsigned char lunid[8]; 699 700 sdev = to_scsi_device(dev); 701 h = sdev_to_hba(sdev); 702 spin_lock_irqsave(&h->lock, flags); 703 hdev = sdev->hostdata; 704 if (!hdev) { 705 spin_unlock_irqrestore(&h->lock, flags); 706 return -ENODEV; 707 } 708 memcpy(lunid, hdev->scsi3addr, sizeof(lunid)); 709 spin_unlock_irqrestore(&h->lock, flags); 710 return snprintf(buf, 20, "0x%8phN\n", lunid); 711 } 712 713 static ssize_t unique_id_show(struct device *dev, 714 struct device_attribute *attr, char *buf) 715 { 716 struct ctlr_info *h; 717 struct scsi_device *sdev; 718 struct hpsa_scsi_dev_t *hdev; 719 unsigned long flags; 720 unsigned char sn[16]; 721 722 sdev = to_scsi_device(dev); 723 h = sdev_to_hba(sdev); 724 spin_lock_irqsave(&h->lock, flags); 725 hdev = sdev->hostdata; 726 if (!hdev) { 727 spin_unlock_irqrestore(&h->lock, flags); 728 return -ENODEV; 729 } 730 memcpy(sn, hdev->device_id, sizeof(sn)); 731 spin_unlock_irqrestore(&h->lock, flags); 732 return snprintf(buf, 16 * 2 + 2, 733 "%02X%02X%02X%02X%02X%02X%02X%02X" 734 "%02X%02X%02X%02X%02X%02X%02X%02X\n", 735 sn[0], sn[1], sn[2], sn[3], 736 sn[4], sn[5], sn[6], sn[7], 737 sn[8], sn[9], sn[10], sn[11], 738 sn[12], sn[13], sn[14], sn[15]); 739 } 740 741 static ssize_t sas_address_show(struct device *dev, 742 struct device_attribute *attr, char *buf) 743 { 744 struct ctlr_info *h; 745 struct scsi_device *sdev; 746 struct hpsa_scsi_dev_t *hdev; 747 unsigned long flags; 748 u64 sas_address; 749 750 sdev = to_scsi_device(dev); 751 h = sdev_to_hba(sdev); 752 spin_lock_irqsave(&h->lock, flags); 753 hdev = sdev->hostdata; 754 if (!hdev || is_logical_device(hdev) || !hdev->expose_device) { 755 spin_unlock_irqrestore(&h->lock, flags); 756 return -ENODEV; 757 } 758 sas_address = hdev->sas_address; 759 spin_unlock_irqrestore(&h->lock, flags); 760 761 return snprintf(buf, PAGE_SIZE, "0x%016llx\n", sas_address); 762 } 763 764 static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev, 765 struct device_attribute *attr, char *buf) 766 { 767 struct ctlr_info *h; 768 struct scsi_device *sdev; 769 struct hpsa_scsi_dev_t *hdev; 770 unsigned long flags; 771 int offload_enabled; 772 773 sdev = to_scsi_device(dev); 774 h = sdev_to_hba(sdev); 775 spin_lock_irqsave(&h->lock, flags); 776 hdev = sdev->hostdata; 777 if (!hdev) { 778 spin_unlock_irqrestore(&h->lock, flags); 779 return -ENODEV; 780 } 781 offload_enabled = hdev->offload_enabled; 782 spin_unlock_irqrestore(&h->lock, flags); 783 return snprintf(buf, 20, "%d\n", offload_enabled); 784 } 785 786 #define MAX_PATHS 8 787 static ssize_t path_info_show(struct device *dev, 788 struct device_attribute *attr, char *buf) 789 { 790 struct ctlr_info *h; 791 struct scsi_device *sdev; 792 struct hpsa_scsi_dev_t *hdev; 793 unsigned long flags; 794 int i; 795 int output_len = 0; 796 u8 box; 797 u8 bay; 798 u8 path_map_index = 0; 799 char *active; 800 unsigned char phys_connector[2]; 801 802 sdev = to_scsi_device(dev); 803 h = sdev_to_hba(sdev); 804 spin_lock_irqsave(&h->devlock, flags); 805 hdev = sdev->hostdata; 806 if (!hdev) { 807 spin_unlock_irqrestore(&h->devlock, flags); 808 return -ENODEV; 809 } 810 811 bay = hdev->bay; 812 for (i = 0; i < MAX_PATHS; i++) { 813 path_map_index = 1<<i; 814 if (i == hdev->active_path_index) 815 active = "Active"; 816 else if (hdev->path_map & path_map_index) 817 active = "Inactive"; 818 else 819 continue; 820 821 output_len += scnprintf(buf + output_len, 822 PAGE_SIZE - output_len, 823 "[%d:%d:%d:%d] %20.20s ", 824 h->scsi_host->host_no, 825 hdev->bus, hdev->target, hdev->lun, 826 scsi_device_type(hdev->devtype)); 827 828 if (hdev->devtype == TYPE_RAID || is_logical_device(hdev)) { 829 output_len += scnprintf(buf + output_len, 830 PAGE_SIZE - output_len, 831 "%s\n", active); 832 continue; 833 } 834 835 box = hdev->box[i]; 836 memcpy(&phys_connector, &hdev->phys_connector[i], 837 sizeof(phys_connector)); 838 if (phys_connector[0] < '0') 839 phys_connector[0] = '0'; 840 if (phys_connector[1] < '0') 841 phys_connector[1] = '0'; 842 output_len += scnprintf(buf + output_len, 843 PAGE_SIZE - output_len, 844 "PORT: %.2s ", 845 phys_connector); 846 if ((hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC) && 847 hdev->expose_device) { 848 if (box == 0 || box == 0xFF) { 849 output_len += scnprintf(buf + output_len, 850 PAGE_SIZE - output_len, 851 "BAY: %hhu %s\n", 852 bay, active); 853 } else { 854 output_len += scnprintf(buf + output_len, 855 PAGE_SIZE - output_len, 856 "BOX: %hhu BAY: %hhu %s\n", 857 box, bay, active); 858 } 859 } else if (box != 0 && box != 0xFF) { 860 output_len += scnprintf(buf + output_len, 861 PAGE_SIZE - output_len, "BOX: %hhu %s\n", 862 box, active); 863 } else 864 output_len += scnprintf(buf + output_len, 865 PAGE_SIZE - output_len, "%s\n", active); 866 } 867 868 spin_unlock_irqrestore(&h->devlock, flags); 869 return output_len; 870 } 871 872 static ssize_t host_show_ctlr_num(struct device *dev, 873 struct device_attribute *attr, char *buf) 874 { 875 struct ctlr_info *h; 876 struct Scsi_Host *shost = class_to_shost(dev); 877 878 h = shost_to_hba(shost); 879 return snprintf(buf, 20, "%d\n", h->ctlr); 880 } 881 882 static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL); 883 static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL); 884 static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL); 885 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan); 886 static DEVICE_ATTR(sas_address, S_IRUGO, sas_address_show, NULL); 887 static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO, 888 host_show_hp_ssd_smart_path_enabled, NULL); 889 static DEVICE_ATTR(path_info, S_IRUGO, path_info_show, NULL); 890 static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH, 891 host_show_hp_ssd_smart_path_status, 892 host_store_hp_ssd_smart_path_status); 893 static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL, 894 host_store_raid_offload_debug); 895 static DEVICE_ATTR(firmware_revision, S_IRUGO, 896 host_show_firmware_revision, NULL); 897 static DEVICE_ATTR(commands_outstanding, S_IRUGO, 898 host_show_commands_outstanding, NULL); 899 static DEVICE_ATTR(transport_mode, S_IRUGO, 900 host_show_transport_mode, NULL); 901 static DEVICE_ATTR(resettable, S_IRUGO, 902 host_show_resettable, NULL); 903 static DEVICE_ATTR(lockup_detected, S_IRUGO, 904 host_show_lockup_detected, NULL); 905 static DEVICE_ATTR(ctlr_num, S_IRUGO, 906 host_show_ctlr_num, NULL); 907 908 static struct device_attribute *hpsa_sdev_attrs[] = { 909 &dev_attr_raid_level, 910 &dev_attr_lunid, 911 &dev_attr_unique_id, 912 &dev_attr_hp_ssd_smart_path_enabled, 913 &dev_attr_path_info, 914 &dev_attr_sas_address, 915 NULL, 916 }; 917 918 static struct device_attribute *hpsa_shost_attrs[] = { 919 &dev_attr_rescan, 920 &dev_attr_firmware_revision, 921 &dev_attr_commands_outstanding, 922 &dev_attr_transport_mode, 923 &dev_attr_resettable, 924 &dev_attr_hp_ssd_smart_path_status, 925 &dev_attr_raid_offload_debug, 926 &dev_attr_lockup_detected, 927 &dev_attr_ctlr_num, 928 NULL, 929 }; 930 931 #define HPSA_NRESERVED_CMDS (HPSA_CMDS_RESERVED_FOR_ABORTS + \ 932 HPSA_CMDS_RESERVED_FOR_DRIVER + HPSA_MAX_CONCURRENT_PASSTHRUS) 933 934 static struct scsi_host_template hpsa_driver_template = { 935 .module = THIS_MODULE, 936 .name = HPSA, 937 .proc_name = HPSA, 938 .queuecommand = hpsa_scsi_queue_command, 939 .scan_start = hpsa_scan_start, 940 .scan_finished = hpsa_scan_finished, 941 .change_queue_depth = hpsa_change_queue_depth, 942 .this_id = -1, 943 .use_clustering = ENABLE_CLUSTERING, 944 .eh_abort_handler = hpsa_eh_abort_handler, 945 .eh_device_reset_handler = hpsa_eh_device_reset_handler, 946 .ioctl = hpsa_ioctl, 947 .slave_alloc = hpsa_slave_alloc, 948 .slave_configure = hpsa_slave_configure, 949 .slave_destroy = hpsa_slave_destroy, 950 #ifdef CONFIG_COMPAT 951 .compat_ioctl = hpsa_compat_ioctl, 952 #endif 953 .sdev_attrs = hpsa_sdev_attrs, 954 .shost_attrs = hpsa_shost_attrs, 955 .max_sectors = 8192, 956 .no_write_same = 1, 957 }; 958 959 static inline u32 next_command(struct ctlr_info *h, u8 q) 960 { 961 u32 a; 962 struct reply_queue_buffer *rq = &h->reply_queue[q]; 963 964 if (h->transMethod & CFGTBL_Trans_io_accel1) 965 return h->access.command_completed(h, q); 966 967 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant))) 968 return h->access.command_completed(h, q); 969 970 if ((rq->head[rq->current_entry] & 1) == rq->wraparound) { 971 a = rq->head[rq->current_entry]; 972 rq->current_entry++; 973 atomic_dec(&h->commands_outstanding); 974 } else { 975 a = FIFO_EMPTY; 976 } 977 /* Check for wraparound */ 978 if (rq->current_entry == h->max_commands) { 979 rq->current_entry = 0; 980 rq->wraparound ^= 1; 981 } 982 return a; 983 } 984 985 /* 986 * There are some special bits in the bus address of the 987 * command that we have to set for the controller to know 988 * how to process the command: 989 * 990 * Normal performant mode: 991 * bit 0: 1 means performant mode, 0 means simple mode. 992 * bits 1-3 = block fetch table entry 993 * bits 4-6 = command type (== 0) 994 * 995 * ioaccel1 mode: 996 * bit 0 = "performant mode" bit. 997 * bits 1-3 = block fetch table entry 998 * bits 4-6 = command type (== 110) 999 * (command type is needed because ioaccel1 mode 1000 * commands are submitted through the same register as normal 1001 * mode commands, so this is how the controller knows whether 1002 * the command is normal mode or ioaccel1 mode.) 1003 * 1004 * ioaccel2 mode: 1005 * bit 0 = "performant mode" bit. 1006 * bits 1-4 = block fetch table entry (note extra bit) 1007 * bits 4-6 = not needed, because ioaccel2 mode has 1008 * a separate special register for submitting commands. 1009 */ 1010 1011 /* 1012 * set_performant_mode: Modify the tag for cciss performant 1013 * set bit 0 for pull model, bits 3-1 for block fetch 1014 * register number 1015 */ 1016 #define DEFAULT_REPLY_QUEUE (-1) 1017 static void set_performant_mode(struct ctlr_info *h, struct CommandList *c, 1018 int reply_queue) 1019 { 1020 if (likely(h->transMethod & CFGTBL_Trans_Performant)) { 1021 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1); 1022 if (unlikely(!h->msix_vectors)) 1023 return; 1024 if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1025 c->Header.ReplyQueue = 1026 raw_smp_processor_id() % h->nreply_queues; 1027 else 1028 c->Header.ReplyQueue = reply_queue % h->nreply_queues; 1029 } 1030 } 1031 1032 static void set_ioaccel1_performant_mode(struct ctlr_info *h, 1033 struct CommandList *c, 1034 int reply_queue) 1035 { 1036 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex]; 1037 1038 /* 1039 * Tell the controller to post the reply to the queue for this 1040 * processor. This seems to give the best I/O throughput. 1041 */ 1042 if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1043 cp->ReplyQueue = smp_processor_id() % h->nreply_queues; 1044 else 1045 cp->ReplyQueue = reply_queue % h->nreply_queues; 1046 /* 1047 * Set the bits in the address sent down to include: 1048 * - performant mode bit (bit 0) 1049 * - pull count (bits 1-3) 1050 * - command type (bits 4-6) 1051 */ 1052 c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) | 1053 IOACCEL1_BUSADDR_CMDTYPE; 1054 } 1055 1056 static void set_ioaccel2_tmf_performant_mode(struct ctlr_info *h, 1057 struct CommandList *c, 1058 int reply_queue) 1059 { 1060 struct hpsa_tmf_struct *cp = (struct hpsa_tmf_struct *) 1061 &h->ioaccel2_cmd_pool[c->cmdindex]; 1062 1063 /* Tell the controller to post the reply to the queue for this 1064 * processor. This seems to give the best I/O throughput. 1065 */ 1066 if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1067 cp->reply_queue = smp_processor_id() % h->nreply_queues; 1068 else 1069 cp->reply_queue = reply_queue % h->nreply_queues; 1070 /* Set the bits in the address sent down to include: 1071 * - performant mode bit not used in ioaccel mode 2 1072 * - pull count (bits 0-3) 1073 * - command type isn't needed for ioaccel2 1074 */ 1075 c->busaddr |= h->ioaccel2_blockFetchTable[0]; 1076 } 1077 1078 static void set_ioaccel2_performant_mode(struct ctlr_info *h, 1079 struct CommandList *c, 1080 int reply_queue) 1081 { 1082 struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex]; 1083 1084 /* 1085 * Tell the controller to post the reply to the queue for this 1086 * processor. This seems to give the best I/O throughput. 1087 */ 1088 if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1089 cp->reply_queue = smp_processor_id() % h->nreply_queues; 1090 else 1091 cp->reply_queue = reply_queue % h->nreply_queues; 1092 /* 1093 * Set the bits in the address sent down to include: 1094 * - performant mode bit not used in ioaccel mode 2 1095 * - pull count (bits 0-3) 1096 * - command type isn't needed for ioaccel2 1097 */ 1098 c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]); 1099 } 1100 1101 static int is_firmware_flash_cmd(u8 *cdb) 1102 { 1103 return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE; 1104 } 1105 1106 /* 1107 * During firmware flash, the heartbeat register may not update as frequently 1108 * as it should. So we dial down lockup detection during firmware flash. and 1109 * dial it back up when firmware flash completes. 1110 */ 1111 #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ) 1112 #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ) 1113 #define HPSA_EVENT_MONITOR_INTERVAL (15 * HZ) 1114 static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h, 1115 struct CommandList *c) 1116 { 1117 if (!is_firmware_flash_cmd(c->Request.CDB)) 1118 return; 1119 atomic_inc(&h->firmware_flash_in_progress); 1120 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH; 1121 } 1122 1123 static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h, 1124 struct CommandList *c) 1125 { 1126 if (is_firmware_flash_cmd(c->Request.CDB) && 1127 atomic_dec_and_test(&h->firmware_flash_in_progress)) 1128 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 1129 } 1130 1131 static void __enqueue_cmd_and_start_io(struct ctlr_info *h, 1132 struct CommandList *c, int reply_queue) 1133 { 1134 dial_down_lockup_detection_during_fw_flash(h, c); 1135 atomic_inc(&h->commands_outstanding); 1136 switch (c->cmd_type) { 1137 case CMD_IOACCEL1: 1138 set_ioaccel1_performant_mode(h, c, reply_queue); 1139 writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET); 1140 break; 1141 case CMD_IOACCEL2: 1142 set_ioaccel2_performant_mode(h, c, reply_queue); 1143 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32); 1144 break; 1145 case IOACCEL2_TMF: 1146 set_ioaccel2_tmf_performant_mode(h, c, reply_queue); 1147 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32); 1148 break; 1149 default: 1150 set_performant_mode(h, c, reply_queue); 1151 h->access.submit_command(h, c); 1152 } 1153 } 1154 1155 static void enqueue_cmd_and_start_io(struct ctlr_info *h, struct CommandList *c) 1156 { 1157 if (unlikely(hpsa_is_pending_event(c))) 1158 return finish_cmd(c); 1159 1160 __enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE); 1161 } 1162 1163 static inline int is_hba_lunid(unsigned char scsi3addr[]) 1164 { 1165 return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0; 1166 } 1167 1168 static inline int is_scsi_rev_5(struct ctlr_info *h) 1169 { 1170 if (!h->hba_inquiry_data) 1171 return 0; 1172 if ((h->hba_inquiry_data[2] & 0x07) == 5) 1173 return 1; 1174 return 0; 1175 } 1176 1177 static int hpsa_find_target_lun(struct ctlr_info *h, 1178 unsigned char scsi3addr[], int bus, int *target, int *lun) 1179 { 1180 /* finds an unused bus, target, lun for a new physical device 1181 * assumes h->devlock is held 1182 */ 1183 int i, found = 0; 1184 DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES); 1185 1186 bitmap_zero(lun_taken, HPSA_MAX_DEVICES); 1187 1188 for (i = 0; i < h->ndevices; i++) { 1189 if (h->dev[i]->bus == bus && h->dev[i]->target != -1) 1190 __set_bit(h->dev[i]->target, lun_taken); 1191 } 1192 1193 i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES); 1194 if (i < HPSA_MAX_DEVICES) { 1195 /* *bus = 1; */ 1196 *target = i; 1197 *lun = 0; 1198 found = 1; 1199 } 1200 return !found; 1201 } 1202 1203 static void hpsa_show_dev_msg(const char *level, struct ctlr_info *h, 1204 struct hpsa_scsi_dev_t *dev, char *description) 1205 { 1206 #define LABEL_SIZE 25 1207 char label[LABEL_SIZE]; 1208 1209 if (h == NULL || h->pdev == NULL || h->scsi_host == NULL) 1210 return; 1211 1212 switch (dev->devtype) { 1213 case TYPE_RAID: 1214 snprintf(label, LABEL_SIZE, "controller"); 1215 break; 1216 case TYPE_ENCLOSURE: 1217 snprintf(label, LABEL_SIZE, "enclosure"); 1218 break; 1219 case TYPE_DISK: 1220 case TYPE_ZBC: 1221 if (dev->external) 1222 snprintf(label, LABEL_SIZE, "external"); 1223 else if (!is_logical_dev_addr_mode(dev->scsi3addr)) 1224 snprintf(label, LABEL_SIZE, "%s", 1225 raid_label[PHYSICAL_DRIVE]); 1226 else 1227 snprintf(label, LABEL_SIZE, "RAID-%s", 1228 dev->raid_level > RAID_UNKNOWN ? "?" : 1229 raid_label[dev->raid_level]); 1230 break; 1231 case TYPE_ROM: 1232 snprintf(label, LABEL_SIZE, "rom"); 1233 break; 1234 case TYPE_TAPE: 1235 snprintf(label, LABEL_SIZE, "tape"); 1236 break; 1237 case TYPE_MEDIUM_CHANGER: 1238 snprintf(label, LABEL_SIZE, "changer"); 1239 break; 1240 default: 1241 snprintf(label, LABEL_SIZE, "UNKNOWN"); 1242 break; 1243 } 1244 1245 dev_printk(level, &h->pdev->dev, 1246 "scsi %d:%d:%d:%d: %s %s %.8s %.16s %s SSDSmartPathCap%c En%c Exp=%d\n", 1247 h->scsi_host->host_no, dev->bus, dev->target, dev->lun, 1248 description, 1249 scsi_device_type(dev->devtype), 1250 dev->vendor, 1251 dev->model, 1252 label, 1253 dev->offload_config ? '+' : '-', 1254 dev->offload_enabled ? '+' : '-', 1255 dev->expose_device); 1256 } 1257 1258 /* Add an entry into h->dev[] array. */ 1259 static int hpsa_scsi_add_entry(struct ctlr_info *h, 1260 struct hpsa_scsi_dev_t *device, 1261 struct hpsa_scsi_dev_t *added[], int *nadded) 1262 { 1263 /* assumes h->devlock is held */ 1264 int n = h->ndevices; 1265 int i; 1266 unsigned char addr1[8], addr2[8]; 1267 struct hpsa_scsi_dev_t *sd; 1268 1269 if (n >= HPSA_MAX_DEVICES) { 1270 dev_err(&h->pdev->dev, "too many devices, some will be " 1271 "inaccessible.\n"); 1272 return -1; 1273 } 1274 1275 /* physical devices do not have lun or target assigned until now. */ 1276 if (device->lun != -1) 1277 /* Logical device, lun is already assigned. */ 1278 goto lun_assigned; 1279 1280 /* If this device a non-zero lun of a multi-lun device 1281 * byte 4 of the 8-byte LUN addr will contain the logical 1282 * unit no, zero otherwise. 1283 */ 1284 if (device->scsi3addr[4] == 0) { 1285 /* This is not a non-zero lun of a multi-lun device */ 1286 if (hpsa_find_target_lun(h, device->scsi3addr, 1287 device->bus, &device->target, &device->lun) != 0) 1288 return -1; 1289 goto lun_assigned; 1290 } 1291 1292 /* This is a non-zero lun of a multi-lun device. 1293 * Search through our list and find the device which 1294 * has the same 8 byte LUN address, excepting byte 4 and 5. 1295 * Assign the same bus and target for this new LUN. 1296 * Use the logical unit number from the firmware. 1297 */ 1298 memcpy(addr1, device->scsi3addr, 8); 1299 addr1[4] = 0; 1300 addr1[5] = 0; 1301 for (i = 0; i < n; i++) { 1302 sd = h->dev[i]; 1303 memcpy(addr2, sd->scsi3addr, 8); 1304 addr2[4] = 0; 1305 addr2[5] = 0; 1306 /* differ only in byte 4 and 5? */ 1307 if (memcmp(addr1, addr2, 8) == 0) { 1308 device->bus = sd->bus; 1309 device->target = sd->target; 1310 device->lun = device->scsi3addr[4]; 1311 break; 1312 } 1313 } 1314 if (device->lun == -1) { 1315 dev_warn(&h->pdev->dev, "physical device with no LUN=0," 1316 " suspect firmware bug or unsupported hardware " 1317 "configuration.\n"); 1318 return -1; 1319 } 1320 1321 lun_assigned: 1322 1323 h->dev[n] = device; 1324 h->ndevices++; 1325 added[*nadded] = device; 1326 (*nadded)++; 1327 hpsa_show_dev_msg(KERN_INFO, h, device, 1328 device->expose_device ? "added" : "masked"); 1329 device->offload_to_be_enabled = device->offload_enabled; 1330 device->offload_enabled = 0; 1331 return 0; 1332 } 1333 1334 /* Update an entry in h->dev[] array. */ 1335 static void hpsa_scsi_update_entry(struct ctlr_info *h, 1336 int entry, struct hpsa_scsi_dev_t *new_entry) 1337 { 1338 int offload_enabled; 1339 /* assumes h->devlock is held */ 1340 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1341 1342 /* Raid level changed. */ 1343 h->dev[entry]->raid_level = new_entry->raid_level; 1344 1345 /* Raid offload parameters changed. Careful about the ordering. */ 1346 if (new_entry->offload_config && new_entry->offload_enabled) { 1347 /* 1348 * if drive is newly offload_enabled, we want to copy the 1349 * raid map data first. If previously offload_enabled and 1350 * offload_config were set, raid map data had better be 1351 * the same as it was before. if raid map data is changed 1352 * then it had better be the case that 1353 * h->dev[entry]->offload_enabled is currently 0. 1354 */ 1355 h->dev[entry]->raid_map = new_entry->raid_map; 1356 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 1357 } 1358 if (new_entry->hba_ioaccel_enabled) { 1359 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 1360 wmb(); /* set ioaccel_handle *before* hba_ioaccel_enabled */ 1361 } 1362 h->dev[entry]->hba_ioaccel_enabled = new_entry->hba_ioaccel_enabled; 1363 h->dev[entry]->offload_config = new_entry->offload_config; 1364 h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror; 1365 h->dev[entry]->queue_depth = new_entry->queue_depth; 1366 1367 /* 1368 * We can turn off ioaccel offload now, but need to delay turning 1369 * it on until we can update h->dev[entry]->phys_disk[], but we 1370 * can't do that until all the devices are updated. 1371 */ 1372 h->dev[entry]->offload_to_be_enabled = new_entry->offload_enabled; 1373 if (!new_entry->offload_enabled) 1374 h->dev[entry]->offload_enabled = 0; 1375 1376 offload_enabled = h->dev[entry]->offload_enabled; 1377 h->dev[entry]->offload_enabled = h->dev[entry]->offload_to_be_enabled; 1378 hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated"); 1379 h->dev[entry]->offload_enabled = offload_enabled; 1380 } 1381 1382 /* Replace an entry from h->dev[] array. */ 1383 static void hpsa_scsi_replace_entry(struct ctlr_info *h, 1384 int entry, struct hpsa_scsi_dev_t *new_entry, 1385 struct hpsa_scsi_dev_t *added[], int *nadded, 1386 struct hpsa_scsi_dev_t *removed[], int *nremoved) 1387 { 1388 /* assumes h->devlock is held */ 1389 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1390 removed[*nremoved] = h->dev[entry]; 1391 (*nremoved)++; 1392 1393 /* 1394 * New physical devices won't have target/lun assigned yet 1395 * so we need to preserve the values in the slot we are replacing. 1396 */ 1397 if (new_entry->target == -1) { 1398 new_entry->target = h->dev[entry]->target; 1399 new_entry->lun = h->dev[entry]->lun; 1400 } 1401 1402 h->dev[entry] = new_entry; 1403 added[*nadded] = new_entry; 1404 (*nadded)++; 1405 hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced"); 1406 new_entry->offload_to_be_enabled = new_entry->offload_enabled; 1407 new_entry->offload_enabled = 0; 1408 } 1409 1410 /* Remove an entry from h->dev[] array. */ 1411 static void hpsa_scsi_remove_entry(struct ctlr_info *h, int entry, 1412 struct hpsa_scsi_dev_t *removed[], int *nremoved) 1413 { 1414 /* assumes h->devlock is held */ 1415 int i; 1416 struct hpsa_scsi_dev_t *sd; 1417 1418 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1419 1420 sd = h->dev[entry]; 1421 removed[*nremoved] = h->dev[entry]; 1422 (*nremoved)++; 1423 1424 for (i = entry; i < h->ndevices-1; i++) 1425 h->dev[i] = h->dev[i+1]; 1426 h->ndevices--; 1427 hpsa_show_dev_msg(KERN_INFO, h, sd, "removed"); 1428 } 1429 1430 #define SCSI3ADDR_EQ(a, b) ( \ 1431 (a)[7] == (b)[7] && \ 1432 (a)[6] == (b)[6] && \ 1433 (a)[5] == (b)[5] && \ 1434 (a)[4] == (b)[4] && \ 1435 (a)[3] == (b)[3] && \ 1436 (a)[2] == (b)[2] && \ 1437 (a)[1] == (b)[1] && \ 1438 (a)[0] == (b)[0]) 1439 1440 static void fixup_botched_add(struct ctlr_info *h, 1441 struct hpsa_scsi_dev_t *added) 1442 { 1443 /* called when scsi_add_device fails in order to re-adjust 1444 * h->dev[] to match the mid layer's view. 1445 */ 1446 unsigned long flags; 1447 int i, j; 1448 1449 spin_lock_irqsave(&h->lock, flags); 1450 for (i = 0; i < h->ndevices; i++) { 1451 if (h->dev[i] == added) { 1452 for (j = i; j < h->ndevices-1; j++) 1453 h->dev[j] = h->dev[j+1]; 1454 h->ndevices--; 1455 break; 1456 } 1457 } 1458 spin_unlock_irqrestore(&h->lock, flags); 1459 kfree(added); 1460 } 1461 1462 static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1, 1463 struct hpsa_scsi_dev_t *dev2) 1464 { 1465 /* we compare everything except lun and target as these 1466 * are not yet assigned. Compare parts likely 1467 * to differ first 1468 */ 1469 if (memcmp(dev1->scsi3addr, dev2->scsi3addr, 1470 sizeof(dev1->scsi3addr)) != 0) 1471 return 0; 1472 if (memcmp(dev1->device_id, dev2->device_id, 1473 sizeof(dev1->device_id)) != 0) 1474 return 0; 1475 if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0) 1476 return 0; 1477 if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0) 1478 return 0; 1479 if (dev1->devtype != dev2->devtype) 1480 return 0; 1481 if (dev1->bus != dev2->bus) 1482 return 0; 1483 return 1; 1484 } 1485 1486 static inline int device_updated(struct hpsa_scsi_dev_t *dev1, 1487 struct hpsa_scsi_dev_t *dev2) 1488 { 1489 /* Device attributes that can change, but don't mean 1490 * that the device is a different device, nor that the OS 1491 * needs to be told anything about the change. 1492 */ 1493 if (dev1->raid_level != dev2->raid_level) 1494 return 1; 1495 if (dev1->offload_config != dev2->offload_config) 1496 return 1; 1497 if (dev1->offload_enabled != dev2->offload_enabled) 1498 return 1; 1499 if (!is_logical_dev_addr_mode(dev1->scsi3addr)) 1500 if (dev1->queue_depth != dev2->queue_depth) 1501 return 1; 1502 return 0; 1503 } 1504 1505 /* Find needle in haystack. If exact match found, return DEVICE_SAME, 1506 * and return needle location in *index. If scsi3addr matches, but not 1507 * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle 1508 * location in *index. 1509 * In the case of a minor device attribute change, such as RAID level, just 1510 * return DEVICE_UPDATED, along with the updated device's location in index. 1511 * If needle not found, return DEVICE_NOT_FOUND. 1512 */ 1513 static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle, 1514 struct hpsa_scsi_dev_t *haystack[], int haystack_size, 1515 int *index) 1516 { 1517 int i; 1518 #define DEVICE_NOT_FOUND 0 1519 #define DEVICE_CHANGED 1 1520 #define DEVICE_SAME 2 1521 #define DEVICE_UPDATED 3 1522 if (needle == NULL) 1523 return DEVICE_NOT_FOUND; 1524 1525 for (i = 0; i < haystack_size; i++) { 1526 if (haystack[i] == NULL) /* previously removed. */ 1527 continue; 1528 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) { 1529 *index = i; 1530 if (device_is_the_same(needle, haystack[i])) { 1531 if (device_updated(needle, haystack[i])) 1532 return DEVICE_UPDATED; 1533 return DEVICE_SAME; 1534 } else { 1535 /* Keep offline devices offline */ 1536 if (needle->volume_offline) 1537 return DEVICE_NOT_FOUND; 1538 return DEVICE_CHANGED; 1539 } 1540 } 1541 } 1542 *index = -1; 1543 return DEVICE_NOT_FOUND; 1544 } 1545 1546 static void hpsa_monitor_offline_device(struct ctlr_info *h, 1547 unsigned char scsi3addr[]) 1548 { 1549 struct offline_device_entry *device; 1550 unsigned long flags; 1551 1552 /* Check to see if device is already on the list */ 1553 spin_lock_irqsave(&h->offline_device_lock, flags); 1554 list_for_each_entry(device, &h->offline_device_list, offline_list) { 1555 if (memcmp(device->scsi3addr, scsi3addr, 1556 sizeof(device->scsi3addr)) == 0) { 1557 spin_unlock_irqrestore(&h->offline_device_lock, flags); 1558 return; 1559 } 1560 } 1561 spin_unlock_irqrestore(&h->offline_device_lock, flags); 1562 1563 /* Device is not on the list, add it. */ 1564 device = kmalloc(sizeof(*device), GFP_KERNEL); 1565 if (!device) 1566 return; 1567 1568 memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr)); 1569 spin_lock_irqsave(&h->offline_device_lock, flags); 1570 list_add_tail(&device->offline_list, &h->offline_device_list); 1571 spin_unlock_irqrestore(&h->offline_device_lock, flags); 1572 } 1573 1574 /* Print a message explaining various offline volume states */ 1575 static void hpsa_show_volume_status(struct ctlr_info *h, 1576 struct hpsa_scsi_dev_t *sd) 1577 { 1578 if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED) 1579 dev_info(&h->pdev->dev, 1580 "C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n", 1581 h->scsi_host->host_no, 1582 sd->bus, sd->target, sd->lun); 1583 switch (sd->volume_offline) { 1584 case HPSA_LV_OK: 1585 break; 1586 case HPSA_LV_UNDERGOING_ERASE: 1587 dev_info(&h->pdev->dev, 1588 "C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n", 1589 h->scsi_host->host_no, 1590 sd->bus, sd->target, sd->lun); 1591 break; 1592 case HPSA_LV_NOT_AVAILABLE: 1593 dev_info(&h->pdev->dev, 1594 "C%d:B%d:T%d:L%d Volume is waiting for transforming volume.\n", 1595 h->scsi_host->host_no, 1596 sd->bus, sd->target, sd->lun); 1597 break; 1598 case HPSA_LV_UNDERGOING_RPI: 1599 dev_info(&h->pdev->dev, 1600 "C%d:B%d:T%d:L%d Volume is undergoing rapid parity init.\n", 1601 h->scsi_host->host_no, 1602 sd->bus, sd->target, sd->lun); 1603 break; 1604 case HPSA_LV_PENDING_RPI: 1605 dev_info(&h->pdev->dev, 1606 "C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n", 1607 h->scsi_host->host_no, 1608 sd->bus, sd->target, sd->lun); 1609 break; 1610 case HPSA_LV_ENCRYPTED_NO_KEY: 1611 dev_info(&h->pdev->dev, 1612 "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n", 1613 h->scsi_host->host_no, 1614 sd->bus, sd->target, sd->lun); 1615 break; 1616 case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER: 1617 dev_info(&h->pdev->dev, 1618 "C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n", 1619 h->scsi_host->host_no, 1620 sd->bus, sd->target, sd->lun); 1621 break; 1622 case HPSA_LV_UNDERGOING_ENCRYPTION: 1623 dev_info(&h->pdev->dev, 1624 "C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n", 1625 h->scsi_host->host_no, 1626 sd->bus, sd->target, sd->lun); 1627 break; 1628 case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING: 1629 dev_info(&h->pdev->dev, 1630 "C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n", 1631 h->scsi_host->host_no, 1632 sd->bus, sd->target, sd->lun); 1633 break; 1634 case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 1635 dev_info(&h->pdev->dev, 1636 "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n", 1637 h->scsi_host->host_no, 1638 sd->bus, sd->target, sd->lun); 1639 break; 1640 case HPSA_LV_PENDING_ENCRYPTION: 1641 dev_info(&h->pdev->dev, 1642 "C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n", 1643 h->scsi_host->host_no, 1644 sd->bus, sd->target, sd->lun); 1645 break; 1646 case HPSA_LV_PENDING_ENCRYPTION_REKEYING: 1647 dev_info(&h->pdev->dev, 1648 "C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n", 1649 h->scsi_host->host_no, 1650 sd->bus, sd->target, sd->lun); 1651 break; 1652 } 1653 } 1654 1655 /* 1656 * Figure the list of physical drive pointers for a logical drive with 1657 * raid offload configured. 1658 */ 1659 static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h, 1660 struct hpsa_scsi_dev_t *dev[], int ndevices, 1661 struct hpsa_scsi_dev_t *logical_drive) 1662 { 1663 struct raid_map_data *map = &logical_drive->raid_map; 1664 struct raid_map_disk_data *dd = &map->data[0]; 1665 int i, j; 1666 int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) + 1667 le16_to_cpu(map->metadata_disks_per_row); 1668 int nraid_map_entries = le16_to_cpu(map->row_cnt) * 1669 le16_to_cpu(map->layout_map_count) * 1670 total_disks_per_row; 1671 int nphys_disk = le16_to_cpu(map->layout_map_count) * 1672 total_disks_per_row; 1673 int qdepth; 1674 1675 if (nraid_map_entries > RAID_MAP_MAX_ENTRIES) 1676 nraid_map_entries = RAID_MAP_MAX_ENTRIES; 1677 1678 logical_drive->nphysical_disks = nraid_map_entries; 1679 1680 qdepth = 0; 1681 for (i = 0; i < nraid_map_entries; i++) { 1682 logical_drive->phys_disk[i] = NULL; 1683 if (!logical_drive->offload_config) 1684 continue; 1685 for (j = 0; j < ndevices; j++) { 1686 if (dev[j] == NULL) 1687 continue; 1688 if (dev[j]->devtype != TYPE_DISK && 1689 dev[j]->devtype != TYPE_ZBC) 1690 continue; 1691 if (is_logical_device(dev[j])) 1692 continue; 1693 if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle) 1694 continue; 1695 1696 logical_drive->phys_disk[i] = dev[j]; 1697 if (i < nphys_disk) 1698 qdepth = min(h->nr_cmds, qdepth + 1699 logical_drive->phys_disk[i]->queue_depth); 1700 break; 1701 } 1702 1703 /* 1704 * This can happen if a physical drive is removed and 1705 * the logical drive is degraded. In that case, the RAID 1706 * map data will refer to a physical disk which isn't actually 1707 * present. And in that case offload_enabled should already 1708 * be 0, but we'll turn it off here just in case 1709 */ 1710 if (!logical_drive->phys_disk[i]) { 1711 logical_drive->offload_enabled = 0; 1712 logical_drive->offload_to_be_enabled = 0; 1713 logical_drive->queue_depth = 8; 1714 } 1715 } 1716 if (nraid_map_entries) 1717 /* 1718 * This is correct for reads, too high for full stripe writes, 1719 * way too high for partial stripe writes 1720 */ 1721 logical_drive->queue_depth = qdepth; 1722 else 1723 logical_drive->queue_depth = h->nr_cmds; 1724 } 1725 1726 static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h, 1727 struct hpsa_scsi_dev_t *dev[], int ndevices) 1728 { 1729 int i; 1730 1731 for (i = 0; i < ndevices; i++) { 1732 if (dev[i] == NULL) 1733 continue; 1734 if (dev[i]->devtype != TYPE_DISK && 1735 dev[i]->devtype != TYPE_ZBC) 1736 continue; 1737 if (!is_logical_device(dev[i])) 1738 continue; 1739 1740 /* 1741 * If offload is currently enabled, the RAID map and 1742 * phys_disk[] assignment *better* not be changing 1743 * and since it isn't changing, we do not need to 1744 * update it. 1745 */ 1746 if (dev[i]->offload_enabled) 1747 continue; 1748 1749 hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]); 1750 } 1751 } 1752 1753 static int hpsa_add_device(struct ctlr_info *h, struct hpsa_scsi_dev_t *device) 1754 { 1755 int rc = 0; 1756 1757 if (!h->scsi_host) 1758 return 1; 1759 1760 if (is_logical_device(device)) /* RAID */ 1761 rc = scsi_add_device(h->scsi_host, device->bus, 1762 device->target, device->lun); 1763 else /* HBA */ 1764 rc = hpsa_add_sas_device(h->sas_host, device); 1765 1766 return rc; 1767 } 1768 1769 static int hpsa_find_outstanding_commands_for_dev(struct ctlr_info *h, 1770 struct hpsa_scsi_dev_t *dev) 1771 { 1772 int i; 1773 int count = 0; 1774 1775 for (i = 0; i < h->nr_cmds; i++) { 1776 struct CommandList *c = h->cmd_pool + i; 1777 int refcount = atomic_inc_return(&c->refcount); 1778 1779 if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, 1780 dev->scsi3addr)) { 1781 unsigned long flags; 1782 1783 spin_lock_irqsave(&h->lock, flags); /* Implied MB */ 1784 if (!hpsa_is_cmd_idle(c)) 1785 ++count; 1786 spin_unlock_irqrestore(&h->lock, flags); 1787 } 1788 1789 cmd_free(h, c); 1790 } 1791 1792 return count; 1793 } 1794 1795 static void hpsa_wait_for_outstanding_commands_for_dev(struct ctlr_info *h, 1796 struct hpsa_scsi_dev_t *device) 1797 { 1798 int cmds = 0; 1799 int waits = 0; 1800 1801 while (1) { 1802 cmds = hpsa_find_outstanding_commands_for_dev(h, device); 1803 if (cmds == 0) 1804 break; 1805 if (++waits > 20) 1806 break; 1807 dev_warn(&h->pdev->dev, 1808 "%s: removing device with %d outstanding commands!\n", 1809 __func__, cmds); 1810 msleep(1000); 1811 } 1812 } 1813 1814 static void hpsa_remove_device(struct ctlr_info *h, 1815 struct hpsa_scsi_dev_t *device) 1816 { 1817 struct scsi_device *sdev = NULL; 1818 1819 if (!h->scsi_host) 1820 return; 1821 1822 if (is_logical_device(device)) { /* RAID */ 1823 sdev = scsi_device_lookup(h->scsi_host, device->bus, 1824 device->target, device->lun); 1825 if (sdev) { 1826 scsi_remove_device(sdev); 1827 scsi_device_put(sdev); 1828 } else { 1829 /* 1830 * We don't expect to get here. Future commands 1831 * to this device will get a selection timeout as 1832 * if the device were gone. 1833 */ 1834 hpsa_show_dev_msg(KERN_WARNING, h, device, 1835 "didn't find device for removal."); 1836 } 1837 } else { /* HBA */ 1838 1839 device->removed = 1; 1840 hpsa_wait_for_outstanding_commands_for_dev(h, device); 1841 1842 hpsa_remove_sas_device(device); 1843 } 1844 } 1845 1846 static void adjust_hpsa_scsi_table(struct ctlr_info *h, 1847 struct hpsa_scsi_dev_t *sd[], int nsds) 1848 { 1849 /* sd contains scsi3 addresses and devtypes, and inquiry 1850 * data. This function takes what's in sd to be the current 1851 * reality and updates h->dev[] to reflect that reality. 1852 */ 1853 int i, entry, device_change, changes = 0; 1854 struct hpsa_scsi_dev_t *csd; 1855 unsigned long flags; 1856 struct hpsa_scsi_dev_t **added, **removed; 1857 int nadded, nremoved; 1858 1859 /* 1860 * A reset can cause a device status to change 1861 * re-schedule the scan to see what happened. 1862 */ 1863 spin_lock_irqsave(&h->reset_lock, flags); 1864 if (h->reset_in_progress) { 1865 h->drv_req_rescan = 1; 1866 spin_unlock_irqrestore(&h->reset_lock, flags); 1867 return; 1868 } 1869 spin_unlock_irqrestore(&h->reset_lock, flags); 1870 1871 added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL); 1872 removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL); 1873 1874 if (!added || !removed) { 1875 dev_warn(&h->pdev->dev, "out of memory in " 1876 "adjust_hpsa_scsi_table\n"); 1877 goto free_and_out; 1878 } 1879 1880 spin_lock_irqsave(&h->devlock, flags); 1881 1882 /* find any devices in h->dev[] that are not in 1883 * sd[] and remove them from h->dev[], and for any 1884 * devices which have changed, remove the old device 1885 * info and add the new device info. 1886 * If minor device attributes change, just update 1887 * the existing device structure. 1888 */ 1889 i = 0; 1890 nremoved = 0; 1891 nadded = 0; 1892 while (i < h->ndevices) { 1893 csd = h->dev[i]; 1894 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry); 1895 if (device_change == DEVICE_NOT_FOUND) { 1896 changes++; 1897 hpsa_scsi_remove_entry(h, i, removed, &nremoved); 1898 continue; /* remove ^^^, hence i not incremented */ 1899 } else if (device_change == DEVICE_CHANGED) { 1900 changes++; 1901 hpsa_scsi_replace_entry(h, i, sd[entry], 1902 added, &nadded, removed, &nremoved); 1903 /* Set it to NULL to prevent it from being freed 1904 * at the bottom of hpsa_update_scsi_devices() 1905 */ 1906 sd[entry] = NULL; 1907 } else if (device_change == DEVICE_UPDATED) { 1908 hpsa_scsi_update_entry(h, i, sd[entry]); 1909 } 1910 i++; 1911 } 1912 1913 /* Now, make sure every device listed in sd[] is also 1914 * listed in h->dev[], adding them if they aren't found 1915 */ 1916 1917 for (i = 0; i < nsds; i++) { 1918 if (!sd[i]) /* if already added above. */ 1919 continue; 1920 1921 /* Don't add devices which are NOT READY, FORMAT IN PROGRESS 1922 * as the SCSI mid-layer does not handle such devices well. 1923 * It relentlessly loops sending TUR at 3Hz, then READ(10) 1924 * at 160Hz, and prevents the system from coming up. 1925 */ 1926 if (sd[i]->volume_offline) { 1927 hpsa_show_volume_status(h, sd[i]); 1928 hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline"); 1929 continue; 1930 } 1931 1932 device_change = hpsa_scsi_find_entry(sd[i], h->dev, 1933 h->ndevices, &entry); 1934 if (device_change == DEVICE_NOT_FOUND) { 1935 changes++; 1936 if (hpsa_scsi_add_entry(h, sd[i], added, &nadded) != 0) 1937 break; 1938 sd[i] = NULL; /* prevent from being freed later. */ 1939 } else if (device_change == DEVICE_CHANGED) { 1940 /* should never happen... */ 1941 changes++; 1942 dev_warn(&h->pdev->dev, 1943 "device unexpectedly changed.\n"); 1944 /* but if it does happen, we just ignore that device */ 1945 } 1946 } 1947 hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices); 1948 1949 /* Now that h->dev[]->phys_disk[] is coherent, we can enable 1950 * any logical drives that need it enabled. 1951 */ 1952 for (i = 0; i < h->ndevices; i++) { 1953 if (h->dev[i] == NULL) 1954 continue; 1955 h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled; 1956 } 1957 1958 spin_unlock_irqrestore(&h->devlock, flags); 1959 1960 /* Monitor devices which are in one of several NOT READY states to be 1961 * brought online later. This must be done without holding h->devlock, 1962 * so don't touch h->dev[] 1963 */ 1964 for (i = 0; i < nsds; i++) { 1965 if (!sd[i]) /* if already added above. */ 1966 continue; 1967 if (sd[i]->volume_offline) 1968 hpsa_monitor_offline_device(h, sd[i]->scsi3addr); 1969 } 1970 1971 /* Don't notify scsi mid layer of any changes the first time through 1972 * (or if there are no changes) scsi_scan_host will do it later the 1973 * first time through. 1974 */ 1975 if (!changes) 1976 goto free_and_out; 1977 1978 /* Notify scsi mid layer of any removed devices */ 1979 for (i = 0; i < nremoved; i++) { 1980 if (removed[i] == NULL) 1981 continue; 1982 if (removed[i]->expose_device) 1983 hpsa_remove_device(h, removed[i]); 1984 kfree(removed[i]); 1985 removed[i] = NULL; 1986 } 1987 1988 /* Notify scsi mid layer of any added devices */ 1989 for (i = 0; i < nadded; i++) { 1990 int rc = 0; 1991 1992 if (added[i] == NULL) 1993 continue; 1994 if (!(added[i]->expose_device)) 1995 continue; 1996 rc = hpsa_add_device(h, added[i]); 1997 if (!rc) 1998 continue; 1999 dev_warn(&h->pdev->dev, 2000 "addition failed %d, device not added.", rc); 2001 /* now we have to remove it from h->dev, 2002 * since it didn't get added to scsi mid layer 2003 */ 2004 fixup_botched_add(h, added[i]); 2005 h->drv_req_rescan = 1; 2006 } 2007 2008 free_and_out: 2009 kfree(added); 2010 kfree(removed); 2011 } 2012 2013 /* 2014 * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t * 2015 * Assume's h->devlock is held. 2016 */ 2017 static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h, 2018 int bus, int target, int lun) 2019 { 2020 int i; 2021 struct hpsa_scsi_dev_t *sd; 2022 2023 for (i = 0; i < h->ndevices; i++) { 2024 sd = h->dev[i]; 2025 if (sd->bus == bus && sd->target == target && sd->lun == lun) 2026 return sd; 2027 } 2028 return NULL; 2029 } 2030 2031 static int hpsa_slave_alloc(struct scsi_device *sdev) 2032 { 2033 struct hpsa_scsi_dev_t *sd = NULL; 2034 unsigned long flags; 2035 struct ctlr_info *h; 2036 2037 h = sdev_to_hba(sdev); 2038 spin_lock_irqsave(&h->devlock, flags); 2039 if (sdev_channel(sdev) == HPSA_PHYSICAL_DEVICE_BUS) { 2040 struct scsi_target *starget; 2041 struct sas_rphy *rphy; 2042 2043 starget = scsi_target(sdev); 2044 rphy = target_to_rphy(starget); 2045 sd = hpsa_find_device_by_sas_rphy(h, rphy); 2046 if (sd) { 2047 sd->target = sdev_id(sdev); 2048 sd->lun = sdev->lun; 2049 } 2050 } 2051 if (!sd) 2052 sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev), 2053 sdev_id(sdev), sdev->lun); 2054 2055 if (sd && sd->expose_device) { 2056 atomic_set(&sd->ioaccel_cmds_out, 0); 2057 sdev->hostdata = sd; 2058 } else 2059 sdev->hostdata = NULL; 2060 spin_unlock_irqrestore(&h->devlock, flags); 2061 return 0; 2062 } 2063 2064 /* configure scsi device based on internal per-device structure */ 2065 static int hpsa_slave_configure(struct scsi_device *sdev) 2066 { 2067 struct hpsa_scsi_dev_t *sd; 2068 int queue_depth; 2069 2070 sd = sdev->hostdata; 2071 sdev->no_uld_attach = !sd || !sd->expose_device; 2072 2073 if (sd) { 2074 if (sd->external) 2075 queue_depth = EXTERNAL_QD; 2076 else 2077 queue_depth = sd->queue_depth != 0 ? 2078 sd->queue_depth : sdev->host->can_queue; 2079 } else 2080 queue_depth = sdev->host->can_queue; 2081 2082 scsi_change_queue_depth(sdev, queue_depth); 2083 2084 return 0; 2085 } 2086 2087 static void hpsa_slave_destroy(struct scsi_device *sdev) 2088 { 2089 /* nothing to do. */ 2090 } 2091 2092 static void hpsa_free_ioaccel2_sg_chain_blocks(struct ctlr_info *h) 2093 { 2094 int i; 2095 2096 if (!h->ioaccel2_cmd_sg_list) 2097 return; 2098 for (i = 0; i < h->nr_cmds; i++) { 2099 kfree(h->ioaccel2_cmd_sg_list[i]); 2100 h->ioaccel2_cmd_sg_list[i] = NULL; 2101 } 2102 kfree(h->ioaccel2_cmd_sg_list); 2103 h->ioaccel2_cmd_sg_list = NULL; 2104 } 2105 2106 static int hpsa_allocate_ioaccel2_sg_chain_blocks(struct ctlr_info *h) 2107 { 2108 int i; 2109 2110 if (h->chainsize <= 0) 2111 return 0; 2112 2113 h->ioaccel2_cmd_sg_list = 2114 kzalloc(sizeof(*h->ioaccel2_cmd_sg_list) * h->nr_cmds, 2115 GFP_KERNEL); 2116 if (!h->ioaccel2_cmd_sg_list) 2117 return -ENOMEM; 2118 for (i = 0; i < h->nr_cmds; i++) { 2119 h->ioaccel2_cmd_sg_list[i] = 2120 kmalloc(sizeof(*h->ioaccel2_cmd_sg_list[i]) * 2121 h->maxsgentries, GFP_KERNEL); 2122 if (!h->ioaccel2_cmd_sg_list[i]) 2123 goto clean; 2124 } 2125 return 0; 2126 2127 clean: 2128 hpsa_free_ioaccel2_sg_chain_blocks(h); 2129 return -ENOMEM; 2130 } 2131 2132 static void hpsa_free_sg_chain_blocks(struct ctlr_info *h) 2133 { 2134 int i; 2135 2136 if (!h->cmd_sg_list) 2137 return; 2138 for (i = 0; i < h->nr_cmds; i++) { 2139 kfree(h->cmd_sg_list[i]); 2140 h->cmd_sg_list[i] = NULL; 2141 } 2142 kfree(h->cmd_sg_list); 2143 h->cmd_sg_list = NULL; 2144 } 2145 2146 static int hpsa_alloc_sg_chain_blocks(struct ctlr_info *h) 2147 { 2148 int i; 2149 2150 if (h->chainsize <= 0) 2151 return 0; 2152 2153 h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds, 2154 GFP_KERNEL); 2155 if (!h->cmd_sg_list) 2156 return -ENOMEM; 2157 2158 for (i = 0; i < h->nr_cmds; i++) { 2159 h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) * 2160 h->chainsize, GFP_KERNEL); 2161 if (!h->cmd_sg_list[i]) 2162 goto clean; 2163 2164 } 2165 return 0; 2166 2167 clean: 2168 hpsa_free_sg_chain_blocks(h); 2169 return -ENOMEM; 2170 } 2171 2172 static int hpsa_map_ioaccel2_sg_chain_block(struct ctlr_info *h, 2173 struct io_accel2_cmd *cp, struct CommandList *c) 2174 { 2175 struct ioaccel2_sg_element *chain_block; 2176 u64 temp64; 2177 u32 chain_size; 2178 2179 chain_block = h->ioaccel2_cmd_sg_list[c->cmdindex]; 2180 chain_size = le32_to_cpu(cp->sg[0].length); 2181 temp64 = pci_map_single(h->pdev, chain_block, chain_size, 2182 PCI_DMA_TODEVICE); 2183 if (dma_mapping_error(&h->pdev->dev, temp64)) { 2184 /* prevent subsequent unmapping */ 2185 cp->sg->address = 0; 2186 return -1; 2187 } 2188 cp->sg->address = cpu_to_le64(temp64); 2189 return 0; 2190 } 2191 2192 static void hpsa_unmap_ioaccel2_sg_chain_block(struct ctlr_info *h, 2193 struct io_accel2_cmd *cp) 2194 { 2195 struct ioaccel2_sg_element *chain_sg; 2196 u64 temp64; 2197 u32 chain_size; 2198 2199 chain_sg = cp->sg; 2200 temp64 = le64_to_cpu(chain_sg->address); 2201 chain_size = le32_to_cpu(cp->sg[0].length); 2202 pci_unmap_single(h->pdev, temp64, chain_size, PCI_DMA_TODEVICE); 2203 } 2204 2205 static int hpsa_map_sg_chain_block(struct ctlr_info *h, 2206 struct CommandList *c) 2207 { 2208 struct SGDescriptor *chain_sg, *chain_block; 2209 u64 temp64; 2210 u32 chain_len; 2211 2212 chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 2213 chain_block = h->cmd_sg_list[c->cmdindex]; 2214 chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN); 2215 chain_len = sizeof(*chain_sg) * 2216 (le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries); 2217 chain_sg->Len = cpu_to_le32(chain_len); 2218 temp64 = pci_map_single(h->pdev, chain_block, chain_len, 2219 PCI_DMA_TODEVICE); 2220 if (dma_mapping_error(&h->pdev->dev, temp64)) { 2221 /* prevent subsequent unmapping */ 2222 chain_sg->Addr = cpu_to_le64(0); 2223 return -1; 2224 } 2225 chain_sg->Addr = cpu_to_le64(temp64); 2226 return 0; 2227 } 2228 2229 static void hpsa_unmap_sg_chain_block(struct ctlr_info *h, 2230 struct CommandList *c) 2231 { 2232 struct SGDescriptor *chain_sg; 2233 2234 if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries) 2235 return; 2236 2237 chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 2238 pci_unmap_single(h->pdev, le64_to_cpu(chain_sg->Addr), 2239 le32_to_cpu(chain_sg->Len), PCI_DMA_TODEVICE); 2240 } 2241 2242 2243 /* Decode the various types of errors on ioaccel2 path. 2244 * Return 1 for any error that should generate a RAID path retry. 2245 * Return 0 for errors that don't require a RAID path retry. 2246 */ 2247 static int handle_ioaccel_mode2_error(struct ctlr_info *h, 2248 struct CommandList *c, 2249 struct scsi_cmnd *cmd, 2250 struct io_accel2_cmd *c2, 2251 struct hpsa_scsi_dev_t *dev) 2252 { 2253 int data_len; 2254 int retry = 0; 2255 u32 ioaccel2_resid = 0; 2256 2257 switch (c2->error_data.serv_response) { 2258 case IOACCEL2_SERV_RESPONSE_COMPLETE: 2259 switch (c2->error_data.status) { 2260 case IOACCEL2_STATUS_SR_TASK_COMP_GOOD: 2261 break; 2262 case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND: 2263 cmd->result |= SAM_STAT_CHECK_CONDITION; 2264 if (c2->error_data.data_present != 2265 IOACCEL2_SENSE_DATA_PRESENT) { 2266 memset(cmd->sense_buffer, 0, 2267 SCSI_SENSE_BUFFERSIZE); 2268 break; 2269 } 2270 /* copy the sense data */ 2271 data_len = c2->error_data.sense_data_len; 2272 if (data_len > SCSI_SENSE_BUFFERSIZE) 2273 data_len = SCSI_SENSE_BUFFERSIZE; 2274 if (data_len > sizeof(c2->error_data.sense_data_buff)) 2275 data_len = 2276 sizeof(c2->error_data.sense_data_buff); 2277 memcpy(cmd->sense_buffer, 2278 c2->error_data.sense_data_buff, data_len); 2279 retry = 1; 2280 break; 2281 case IOACCEL2_STATUS_SR_TASK_COMP_BUSY: 2282 retry = 1; 2283 break; 2284 case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON: 2285 retry = 1; 2286 break; 2287 case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL: 2288 retry = 1; 2289 break; 2290 case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED: 2291 retry = 1; 2292 break; 2293 default: 2294 retry = 1; 2295 break; 2296 } 2297 break; 2298 case IOACCEL2_SERV_RESPONSE_FAILURE: 2299 switch (c2->error_data.status) { 2300 case IOACCEL2_STATUS_SR_IO_ERROR: 2301 case IOACCEL2_STATUS_SR_IO_ABORTED: 2302 case IOACCEL2_STATUS_SR_OVERRUN: 2303 retry = 1; 2304 break; 2305 case IOACCEL2_STATUS_SR_UNDERRUN: 2306 cmd->result = (DID_OK << 16); /* host byte */ 2307 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 2308 ioaccel2_resid = get_unaligned_le32( 2309 &c2->error_data.resid_cnt[0]); 2310 scsi_set_resid(cmd, ioaccel2_resid); 2311 break; 2312 case IOACCEL2_STATUS_SR_NO_PATH_TO_DEVICE: 2313 case IOACCEL2_STATUS_SR_INVALID_DEVICE: 2314 case IOACCEL2_STATUS_SR_IOACCEL_DISABLED: 2315 /* 2316 * Did an HBA disk disappear? We will eventually 2317 * get a state change event from the controller but 2318 * in the meantime, we need to tell the OS that the 2319 * HBA disk is no longer there and stop I/O 2320 * from going down. This allows the potential re-insert 2321 * of the disk to get the same device node. 2322 */ 2323 if (dev->physical_device && dev->expose_device) { 2324 cmd->result = DID_NO_CONNECT << 16; 2325 dev->removed = 1; 2326 h->drv_req_rescan = 1; 2327 dev_warn(&h->pdev->dev, 2328 "%s: device is gone!\n", __func__); 2329 } else 2330 /* 2331 * Retry by sending down the RAID path. 2332 * We will get an event from ctlr to 2333 * trigger rescan regardless. 2334 */ 2335 retry = 1; 2336 break; 2337 default: 2338 retry = 1; 2339 } 2340 break; 2341 case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE: 2342 break; 2343 case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS: 2344 break; 2345 case IOACCEL2_SERV_RESPONSE_TMF_REJECTED: 2346 retry = 1; 2347 break; 2348 case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN: 2349 break; 2350 default: 2351 retry = 1; 2352 break; 2353 } 2354 2355 return retry; /* retry on raid path? */ 2356 } 2357 2358 static void hpsa_cmd_resolve_events(struct ctlr_info *h, 2359 struct CommandList *c) 2360 { 2361 bool do_wake = false; 2362 2363 /* 2364 * Prevent the following race in the abort handler: 2365 * 2366 * 1. LLD is requested to abort a SCSI command 2367 * 2. The SCSI command completes 2368 * 3. The struct CommandList associated with step 2 is made available 2369 * 4. New I/O request to LLD to another LUN re-uses struct CommandList 2370 * 5. Abort handler follows scsi_cmnd->host_scribble and 2371 * finds struct CommandList and tries to aborts it 2372 * Now we have aborted the wrong command. 2373 * 2374 * Reset c->scsi_cmd here so that the abort or reset handler will know 2375 * this command has completed. Then, check to see if the handler is 2376 * waiting for this command, and, if so, wake it. 2377 */ 2378 c->scsi_cmd = SCSI_CMD_IDLE; 2379 mb(); /* Declare command idle before checking for pending events. */ 2380 if (c->abort_pending) { 2381 do_wake = true; 2382 c->abort_pending = false; 2383 } 2384 if (c->reset_pending) { 2385 unsigned long flags; 2386 struct hpsa_scsi_dev_t *dev; 2387 2388 /* 2389 * There appears to be a reset pending; lock the lock and 2390 * reconfirm. If so, then decrement the count of outstanding 2391 * commands and wake the reset command if this is the last one. 2392 */ 2393 spin_lock_irqsave(&h->lock, flags); 2394 dev = c->reset_pending; /* Re-fetch under the lock. */ 2395 if (dev && atomic_dec_and_test(&dev->reset_cmds_out)) 2396 do_wake = true; 2397 c->reset_pending = NULL; 2398 spin_unlock_irqrestore(&h->lock, flags); 2399 } 2400 2401 if (do_wake) 2402 wake_up_all(&h->event_sync_wait_queue); 2403 } 2404 2405 static void hpsa_cmd_resolve_and_free(struct ctlr_info *h, 2406 struct CommandList *c) 2407 { 2408 hpsa_cmd_resolve_events(h, c); 2409 cmd_tagged_free(h, c); 2410 } 2411 2412 static void hpsa_cmd_free_and_done(struct ctlr_info *h, 2413 struct CommandList *c, struct scsi_cmnd *cmd) 2414 { 2415 hpsa_cmd_resolve_and_free(h, c); 2416 if (cmd && cmd->scsi_done) 2417 cmd->scsi_done(cmd); 2418 } 2419 2420 static void hpsa_retry_cmd(struct ctlr_info *h, struct CommandList *c) 2421 { 2422 INIT_WORK(&c->work, hpsa_command_resubmit_worker); 2423 queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work); 2424 } 2425 2426 static void hpsa_set_scsi_cmd_aborted(struct scsi_cmnd *cmd) 2427 { 2428 cmd->result = DID_ABORT << 16; 2429 } 2430 2431 static void hpsa_cmd_abort_and_free(struct ctlr_info *h, struct CommandList *c, 2432 struct scsi_cmnd *cmd) 2433 { 2434 hpsa_set_scsi_cmd_aborted(cmd); 2435 dev_warn(&h->pdev->dev, "CDB %16phN was aborted with status 0x%x\n", 2436 c->Request.CDB, c->err_info->ScsiStatus); 2437 hpsa_cmd_resolve_and_free(h, c); 2438 } 2439 2440 static void process_ioaccel2_completion(struct ctlr_info *h, 2441 struct CommandList *c, struct scsi_cmnd *cmd, 2442 struct hpsa_scsi_dev_t *dev) 2443 { 2444 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 2445 2446 /* check for good status */ 2447 if (likely(c2->error_data.serv_response == 0 && 2448 c2->error_data.status == 0)) 2449 return hpsa_cmd_free_and_done(h, c, cmd); 2450 2451 /* 2452 * Any RAID offload error results in retry which will use 2453 * the normal I/O path so the controller can handle whatever's 2454 * wrong. 2455 */ 2456 if (is_logical_device(dev) && 2457 c2->error_data.serv_response == 2458 IOACCEL2_SERV_RESPONSE_FAILURE) { 2459 if (c2->error_data.status == 2460 IOACCEL2_STATUS_SR_IOACCEL_DISABLED) { 2461 dev->offload_enabled = 0; 2462 dev->offload_to_be_enabled = 0; 2463 } 2464 2465 return hpsa_retry_cmd(h, c); 2466 } 2467 2468 if (handle_ioaccel_mode2_error(h, c, cmd, c2, dev)) 2469 return hpsa_retry_cmd(h, c); 2470 2471 return hpsa_cmd_free_and_done(h, c, cmd); 2472 } 2473 2474 /* Returns 0 on success, < 0 otherwise. */ 2475 static int hpsa_evaluate_tmf_status(struct ctlr_info *h, 2476 struct CommandList *cp) 2477 { 2478 u8 tmf_status = cp->err_info->ScsiStatus; 2479 2480 switch (tmf_status) { 2481 case CISS_TMF_COMPLETE: 2482 /* 2483 * CISS_TMF_COMPLETE never happens, instead, 2484 * ei->CommandStatus == 0 for this case. 2485 */ 2486 case CISS_TMF_SUCCESS: 2487 return 0; 2488 case CISS_TMF_INVALID_FRAME: 2489 case CISS_TMF_NOT_SUPPORTED: 2490 case CISS_TMF_FAILED: 2491 case CISS_TMF_WRONG_LUN: 2492 case CISS_TMF_OVERLAPPED_TAG: 2493 break; 2494 default: 2495 dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n", 2496 tmf_status); 2497 break; 2498 } 2499 return -tmf_status; 2500 } 2501 2502 static void complete_scsi_command(struct CommandList *cp) 2503 { 2504 struct scsi_cmnd *cmd; 2505 struct ctlr_info *h; 2506 struct ErrorInfo *ei; 2507 struct hpsa_scsi_dev_t *dev; 2508 struct io_accel2_cmd *c2; 2509 2510 u8 sense_key; 2511 u8 asc; /* additional sense code */ 2512 u8 ascq; /* additional sense code qualifier */ 2513 unsigned long sense_data_size; 2514 2515 ei = cp->err_info; 2516 cmd = cp->scsi_cmd; 2517 h = cp->h; 2518 2519 if (!cmd->device) { 2520 cmd->result = DID_NO_CONNECT << 16; 2521 return hpsa_cmd_free_and_done(h, cp, cmd); 2522 } 2523 2524 dev = cmd->device->hostdata; 2525 if (!dev) { 2526 cmd->result = DID_NO_CONNECT << 16; 2527 return hpsa_cmd_free_and_done(h, cp, cmd); 2528 } 2529 c2 = &h->ioaccel2_cmd_pool[cp->cmdindex]; 2530 2531 scsi_dma_unmap(cmd); /* undo the DMA mappings */ 2532 if ((cp->cmd_type == CMD_SCSI) && 2533 (le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries)) 2534 hpsa_unmap_sg_chain_block(h, cp); 2535 2536 if ((cp->cmd_type == CMD_IOACCEL2) && 2537 (c2->sg[0].chain_indicator == IOACCEL2_CHAIN)) 2538 hpsa_unmap_ioaccel2_sg_chain_block(h, c2); 2539 2540 cmd->result = (DID_OK << 16); /* host byte */ 2541 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 2542 2543 if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1) { 2544 if (dev->physical_device && dev->expose_device && 2545 dev->removed) { 2546 cmd->result = DID_NO_CONNECT << 16; 2547 return hpsa_cmd_free_and_done(h, cp, cmd); 2548 } 2549 if (likely(cp->phys_disk != NULL)) 2550 atomic_dec(&cp->phys_disk->ioaccel_cmds_out); 2551 } 2552 2553 /* 2554 * We check for lockup status here as it may be set for 2555 * CMD_SCSI, CMD_IOACCEL1 and CMD_IOACCEL2 commands by 2556 * fail_all_oustanding_cmds() 2557 */ 2558 if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) { 2559 /* DID_NO_CONNECT will prevent a retry */ 2560 cmd->result = DID_NO_CONNECT << 16; 2561 return hpsa_cmd_free_and_done(h, cp, cmd); 2562 } 2563 2564 if ((unlikely(hpsa_is_pending_event(cp)))) { 2565 if (cp->reset_pending) 2566 return hpsa_cmd_free_and_done(h, cp, cmd); 2567 if (cp->abort_pending) 2568 return hpsa_cmd_abort_and_free(h, cp, cmd); 2569 } 2570 2571 if (cp->cmd_type == CMD_IOACCEL2) 2572 return process_ioaccel2_completion(h, cp, cmd, dev); 2573 2574 scsi_set_resid(cmd, ei->ResidualCnt); 2575 if (ei->CommandStatus == 0) 2576 return hpsa_cmd_free_and_done(h, cp, cmd); 2577 2578 /* For I/O accelerator commands, copy over some fields to the normal 2579 * CISS header used below for error handling. 2580 */ 2581 if (cp->cmd_type == CMD_IOACCEL1) { 2582 struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex]; 2583 cp->Header.SGList = scsi_sg_count(cmd); 2584 cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList); 2585 cp->Request.CDBLen = le16_to_cpu(c->io_flags) & 2586 IOACCEL1_IOFLAGS_CDBLEN_MASK; 2587 cp->Header.tag = c->tag; 2588 memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8); 2589 memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen); 2590 2591 /* Any RAID offload error results in retry which will use 2592 * the normal I/O path so the controller can handle whatever's 2593 * wrong. 2594 */ 2595 if (is_logical_device(dev)) { 2596 if (ei->CommandStatus == CMD_IOACCEL_DISABLED) 2597 dev->offload_enabled = 0; 2598 return hpsa_retry_cmd(h, cp); 2599 } 2600 } 2601 2602 /* an error has occurred */ 2603 switch (ei->CommandStatus) { 2604 2605 case CMD_TARGET_STATUS: 2606 cmd->result |= ei->ScsiStatus; 2607 /* copy the sense data */ 2608 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo)) 2609 sense_data_size = SCSI_SENSE_BUFFERSIZE; 2610 else 2611 sense_data_size = sizeof(ei->SenseInfo); 2612 if (ei->SenseLen < sense_data_size) 2613 sense_data_size = ei->SenseLen; 2614 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size); 2615 if (ei->ScsiStatus) 2616 decode_sense_data(ei->SenseInfo, sense_data_size, 2617 &sense_key, &asc, &ascq); 2618 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) { 2619 if (sense_key == ABORTED_COMMAND) { 2620 cmd->result |= DID_SOFT_ERROR << 16; 2621 break; 2622 } 2623 break; 2624 } 2625 /* Problem was not a check condition 2626 * Pass it up to the upper layers... 2627 */ 2628 if (ei->ScsiStatus) { 2629 dev_warn(&h->pdev->dev, "cp %p has status 0x%x " 2630 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, " 2631 "Returning result: 0x%x\n", 2632 cp, ei->ScsiStatus, 2633 sense_key, asc, ascq, 2634 cmd->result); 2635 } else { /* scsi status is zero??? How??? */ 2636 dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. " 2637 "Returning no connection.\n", cp), 2638 2639 /* Ordinarily, this case should never happen, 2640 * but there is a bug in some released firmware 2641 * revisions that allows it to happen if, for 2642 * example, a 4100 backplane loses power and 2643 * the tape drive is in it. We assume that 2644 * it's a fatal error of some kind because we 2645 * can't show that it wasn't. We will make it 2646 * look like selection timeout since that is 2647 * the most common reason for this to occur, 2648 * and it's severe enough. 2649 */ 2650 2651 cmd->result = DID_NO_CONNECT << 16; 2652 } 2653 break; 2654 2655 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 2656 break; 2657 case CMD_DATA_OVERRUN: 2658 dev_warn(&h->pdev->dev, 2659 "CDB %16phN data overrun\n", cp->Request.CDB); 2660 break; 2661 case CMD_INVALID: { 2662 /* print_bytes(cp, sizeof(*cp), 1, 0); 2663 print_cmd(cp); */ 2664 /* We get CMD_INVALID if you address a non-existent device 2665 * instead of a selection timeout (no response). You will 2666 * see this if you yank out a drive, then try to access it. 2667 * This is kind of a shame because it means that any other 2668 * CMD_INVALID (e.g. driver bug) will get interpreted as a 2669 * missing target. */ 2670 cmd->result = DID_NO_CONNECT << 16; 2671 } 2672 break; 2673 case CMD_PROTOCOL_ERR: 2674 cmd->result = DID_ERROR << 16; 2675 dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n", 2676 cp->Request.CDB); 2677 break; 2678 case CMD_HARDWARE_ERR: 2679 cmd->result = DID_ERROR << 16; 2680 dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n", 2681 cp->Request.CDB); 2682 break; 2683 case CMD_CONNECTION_LOST: 2684 cmd->result = DID_ERROR << 16; 2685 dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n", 2686 cp->Request.CDB); 2687 break; 2688 case CMD_ABORTED: 2689 /* Return now to avoid calling scsi_done(). */ 2690 return hpsa_cmd_abort_and_free(h, cp, cmd); 2691 case CMD_ABORT_FAILED: 2692 cmd->result = DID_ERROR << 16; 2693 dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n", 2694 cp->Request.CDB); 2695 break; 2696 case CMD_UNSOLICITED_ABORT: 2697 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */ 2698 dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n", 2699 cp->Request.CDB); 2700 break; 2701 case CMD_TIMEOUT: 2702 cmd->result = DID_TIME_OUT << 16; 2703 dev_warn(&h->pdev->dev, "CDB %16phN timed out\n", 2704 cp->Request.CDB); 2705 break; 2706 case CMD_UNABORTABLE: 2707 cmd->result = DID_ERROR << 16; 2708 dev_warn(&h->pdev->dev, "Command unabortable\n"); 2709 break; 2710 case CMD_TMF_STATUS: 2711 if (hpsa_evaluate_tmf_status(h, cp)) /* TMF failed? */ 2712 cmd->result = DID_ERROR << 16; 2713 break; 2714 case CMD_IOACCEL_DISABLED: 2715 /* This only handles the direct pass-through case since RAID 2716 * offload is handled above. Just attempt a retry. 2717 */ 2718 cmd->result = DID_SOFT_ERROR << 16; 2719 dev_warn(&h->pdev->dev, 2720 "cp %p had HP SSD Smart Path error\n", cp); 2721 break; 2722 default: 2723 cmd->result = DID_ERROR << 16; 2724 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n", 2725 cp, ei->CommandStatus); 2726 } 2727 2728 return hpsa_cmd_free_and_done(h, cp, cmd); 2729 } 2730 2731 static void hpsa_pci_unmap(struct pci_dev *pdev, 2732 struct CommandList *c, int sg_used, int data_direction) 2733 { 2734 int i; 2735 2736 for (i = 0; i < sg_used; i++) 2737 pci_unmap_single(pdev, (dma_addr_t) le64_to_cpu(c->SG[i].Addr), 2738 le32_to_cpu(c->SG[i].Len), 2739 data_direction); 2740 } 2741 2742 static int hpsa_map_one(struct pci_dev *pdev, 2743 struct CommandList *cp, 2744 unsigned char *buf, 2745 size_t buflen, 2746 int data_direction) 2747 { 2748 u64 addr64; 2749 2750 if (buflen == 0 || data_direction == PCI_DMA_NONE) { 2751 cp->Header.SGList = 0; 2752 cp->Header.SGTotal = cpu_to_le16(0); 2753 return 0; 2754 } 2755 2756 addr64 = pci_map_single(pdev, buf, buflen, data_direction); 2757 if (dma_mapping_error(&pdev->dev, addr64)) { 2758 /* Prevent subsequent unmap of something never mapped */ 2759 cp->Header.SGList = 0; 2760 cp->Header.SGTotal = cpu_to_le16(0); 2761 return -1; 2762 } 2763 cp->SG[0].Addr = cpu_to_le64(addr64); 2764 cp->SG[0].Len = cpu_to_le32(buflen); 2765 cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */ 2766 cp->Header.SGList = 1; /* no. SGs contig in this cmd */ 2767 cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */ 2768 return 0; 2769 } 2770 2771 #define NO_TIMEOUT ((unsigned long) -1) 2772 #define DEFAULT_TIMEOUT 30000 /* milliseconds */ 2773 static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h, 2774 struct CommandList *c, int reply_queue, unsigned long timeout_msecs) 2775 { 2776 DECLARE_COMPLETION_ONSTACK(wait); 2777 2778 c->waiting = &wait; 2779 __enqueue_cmd_and_start_io(h, c, reply_queue); 2780 if (timeout_msecs == NO_TIMEOUT) { 2781 /* TODO: get rid of this no-timeout thing */ 2782 wait_for_completion_io(&wait); 2783 return IO_OK; 2784 } 2785 if (!wait_for_completion_io_timeout(&wait, 2786 msecs_to_jiffies(timeout_msecs))) { 2787 dev_warn(&h->pdev->dev, "Command timed out.\n"); 2788 return -ETIMEDOUT; 2789 } 2790 return IO_OK; 2791 } 2792 2793 static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c, 2794 int reply_queue, unsigned long timeout_msecs) 2795 { 2796 if (unlikely(lockup_detected(h))) { 2797 c->err_info->CommandStatus = CMD_CTLR_LOCKUP; 2798 return IO_OK; 2799 } 2800 return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs); 2801 } 2802 2803 static u32 lockup_detected(struct ctlr_info *h) 2804 { 2805 int cpu; 2806 u32 rc, *lockup_detected; 2807 2808 cpu = get_cpu(); 2809 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 2810 rc = *lockup_detected; 2811 put_cpu(); 2812 return rc; 2813 } 2814 2815 #define MAX_DRIVER_CMD_RETRIES 25 2816 static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h, 2817 struct CommandList *c, int data_direction, unsigned long timeout_msecs) 2818 { 2819 int backoff_time = 10, retry_count = 0; 2820 int rc; 2821 2822 do { 2823 memset(c->err_info, 0, sizeof(*c->err_info)); 2824 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 2825 timeout_msecs); 2826 if (rc) 2827 break; 2828 retry_count++; 2829 if (retry_count > 3) { 2830 msleep(backoff_time); 2831 if (backoff_time < 1000) 2832 backoff_time *= 2; 2833 } 2834 } while ((check_for_unit_attention(h, c) || 2835 check_for_busy(h, c)) && 2836 retry_count <= MAX_DRIVER_CMD_RETRIES); 2837 hpsa_pci_unmap(h->pdev, c, 1, data_direction); 2838 if (retry_count > MAX_DRIVER_CMD_RETRIES) 2839 rc = -EIO; 2840 return rc; 2841 } 2842 2843 static void hpsa_print_cmd(struct ctlr_info *h, char *txt, 2844 struct CommandList *c) 2845 { 2846 const u8 *cdb = c->Request.CDB; 2847 const u8 *lun = c->Header.LUN.LunAddrBytes; 2848 2849 dev_warn(&h->pdev->dev, "%s: LUN:%8phN CDB:%16phN\n", 2850 txt, lun, cdb); 2851 } 2852 2853 static void hpsa_scsi_interpret_error(struct ctlr_info *h, 2854 struct CommandList *cp) 2855 { 2856 const struct ErrorInfo *ei = cp->err_info; 2857 struct device *d = &cp->h->pdev->dev; 2858 u8 sense_key, asc, ascq; 2859 int sense_len; 2860 2861 switch (ei->CommandStatus) { 2862 case CMD_TARGET_STATUS: 2863 if (ei->SenseLen > sizeof(ei->SenseInfo)) 2864 sense_len = sizeof(ei->SenseInfo); 2865 else 2866 sense_len = ei->SenseLen; 2867 decode_sense_data(ei->SenseInfo, sense_len, 2868 &sense_key, &asc, &ascq); 2869 hpsa_print_cmd(h, "SCSI status", cp); 2870 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) 2871 dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n", 2872 sense_key, asc, ascq); 2873 else 2874 dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus); 2875 if (ei->ScsiStatus == 0) 2876 dev_warn(d, "SCSI status is abnormally zero. " 2877 "(probably indicates selection timeout " 2878 "reported incorrectly due to a known " 2879 "firmware bug, circa July, 2001.)\n"); 2880 break; 2881 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 2882 break; 2883 case CMD_DATA_OVERRUN: 2884 hpsa_print_cmd(h, "overrun condition", cp); 2885 break; 2886 case CMD_INVALID: { 2887 /* controller unfortunately reports SCSI passthru's 2888 * to non-existent targets as invalid commands. 2889 */ 2890 hpsa_print_cmd(h, "invalid command", cp); 2891 dev_warn(d, "probably means device no longer present\n"); 2892 } 2893 break; 2894 case CMD_PROTOCOL_ERR: 2895 hpsa_print_cmd(h, "protocol error", cp); 2896 break; 2897 case CMD_HARDWARE_ERR: 2898 hpsa_print_cmd(h, "hardware error", cp); 2899 break; 2900 case CMD_CONNECTION_LOST: 2901 hpsa_print_cmd(h, "connection lost", cp); 2902 break; 2903 case CMD_ABORTED: 2904 hpsa_print_cmd(h, "aborted", cp); 2905 break; 2906 case CMD_ABORT_FAILED: 2907 hpsa_print_cmd(h, "abort failed", cp); 2908 break; 2909 case CMD_UNSOLICITED_ABORT: 2910 hpsa_print_cmd(h, "unsolicited abort", cp); 2911 break; 2912 case CMD_TIMEOUT: 2913 hpsa_print_cmd(h, "timed out", cp); 2914 break; 2915 case CMD_UNABORTABLE: 2916 hpsa_print_cmd(h, "unabortable", cp); 2917 break; 2918 case CMD_CTLR_LOCKUP: 2919 hpsa_print_cmd(h, "controller lockup detected", cp); 2920 break; 2921 default: 2922 hpsa_print_cmd(h, "unknown status", cp); 2923 dev_warn(d, "Unknown command status %x\n", 2924 ei->CommandStatus); 2925 } 2926 } 2927 2928 static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr, 2929 u16 page, unsigned char *buf, 2930 unsigned char bufsize) 2931 { 2932 int rc = IO_OK; 2933 struct CommandList *c; 2934 struct ErrorInfo *ei; 2935 2936 c = cmd_alloc(h); 2937 2938 if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, 2939 page, scsi3addr, TYPE_CMD)) { 2940 rc = -1; 2941 goto out; 2942 } 2943 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 2944 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 2945 if (rc) 2946 goto out; 2947 ei = c->err_info; 2948 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 2949 hpsa_scsi_interpret_error(h, c); 2950 rc = -1; 2951 } 2952 out: 2953 cmd_free(h, c); 2954 return rc; 2955 } 2956 2957 static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr, 2958 u8 reset_type, int reply_queue) 2959 { 2960 int rc = IO_OK; 2961 struct CommandList *c; 2962 struct ErrorInfo *ei; 2963 2964 c = cmd_alloc(h); 2965 2966 2967 /* fill_cmd can't fail here, no data buffer to map. */ 2968 (void) fill_cmd(c, reset_type, h, NULL, 0, 0, 2969 scsi3addr, TYPE_MSG); 2970 rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT); 2971 if (rc) { 2972 dev_warn(&h->pdev->dev, "Failed to send reset command\n"); 2973 goto out; 2974 } 2975 /* no unmap needed here because no data xfer. */ 2976 2977 ei = c->err_info; 2978 if (ei->CommandStatus != 0) { 2979 hpsa_scsi_interpret_error(h, c); 2980 rc = -1; 2981 } 2982 out: 2983 cmd_free(h, c); 2984 return rc; 2985 } 2986 2987 static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c, 2988 struct hpsa_scsi_dev_t *dev, 2989 unsigned char *scsi3addr) 2990 { 2991 int i; 2992 bool match = false; 2993 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 2994 struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2; 2995 2996 if (hpsa_is_cmd_idle(c)) 2997 return false; 2998 2999 switch (c->cmd_type) { 3000 case CMD_SCSI: 3001 case CMD_IOCTL_PEND: 3002 match = !memcmp(scsi3addr, &c->Header.LUN.LunAddrBytes, 3003 sizeof(c->Header.LUN.LunAddrBytes)); 3004 break; 3005 3006 case CMD_IOACCEL1: 3007 case CMD_IOACCEL2: 3008 if (c->phys_disk == dev) { 3009 /* HBA mode match */ 3010 match = true; 3011 } else { 3012 /* Possible RAID mode -- check each phys dev. */ 3013 /* FIXME: Do we need to take out a lock here? If 3014 * so, we could just call hpsa_get_pdisk_of_ioaccel2() 3015 * instead. */ 3016 for (i = 0; i < dev->nphysical_disks && !match; i++) { 3017 /* FIXME: an alternate test might be 3018 * 3019 * match = dev->phys_disk[i]->ioaccel_handle 3020 * == c2->scsi_nexus; */ 3021 match = dev->phys_disk[i] == c->phys_disk; 3022 } 3023 } 3024 break; 3025 3026 case IOACCEL2_TMF: 3027 for (i = 0; i < dev->nphysical_disks && !match; i++) { 3028 match = dev->phys_disk[i]->ioaccel_handle == 3029 le32_to_cpu(ac->it_nexus); 3030 } 3031 break; 3032 3033 case 0: /* The command is in the middle of being initialized. */ 3034 match = false; 3035 break; 3036 3037 default: 3038 dev_err(&h->pdev->dev, "unexpected cmd_type: %d\n", 3039 c->cmd_type); 3040 BUG(); 3041 } 3042 3043 return match; 3044 } 3045 3046 static int hpsa_do_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev, 3047 unsigned char *scsi3addr, u8 reset_type, int reply_queue) 3048 { 3049 int i; 3050 int rc = 0; 3051 3052 /* We can really only handle one reset at a time */ 3053 if (mutex_lock_interruptible(&h->reset_mutex) == -EINTR) { 3054 dev_warn(&h->pdev->dev, "concurrent reset wait interrupted.\n"); 3055 return -EINTR; 3056 } 3057 3058 BUG_ON(atomic_read(&dev->reset_cmds_out) != 0); 3059 3060 for (i = 0; i < h->nr_cmds; i++) { 3061 struct CommandList *c = h->cmd_pool + i; 3062 int refcount = atomic_inc_return(&c->refcount); 3063 3064 if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, scsi3addr)) { 3065 unsigned long flags; 3066 3067 /* 3068 * Mark the target command as having a reset pending, 3069 * then lock a lock so that the command cannot complete 3070 * while we're considering it. If the command is not 3071 * idle then count it; otherwise revoke the event. 3072 */ 3073 c->reset_pending = dev; 3074 spin_lock_irqsave(&h->lock, flags); /* Implied MB */ 3075 if (!hpsa_is_cmd_idle(c)) 3076 atomic_inc(&dev->reset_cmds_out); 3077 else 3078 c->reset_pending = NULL; 3079 spin_unlock_irqrestore(&h->lock, flags); 3080 } 3081 3082 cmd_free(h, c); 3083 } 3084 3085 rc = hpsa_send_reset(h, scsi3addr, reset_type, reply_queue); 3086 if (!rc) 3087 wait_event(h->event_sync_wait_queue, 3088 atomic_read(&dev->reset_cmds_out) == 0 || 3089 lockup_detected(h)); 3090 3091 if (unlikely(lockup_detected(h))) { 3092 dev_warn(&h->pdev->dev, 3093 "Controller lockup detected during reset wait\n"); 3094 rc = -ENODEV; 3095 } 3096 3097 if (unlikely(rc)) 3098 atomic_set(&dev->reset_cmds_out, 0); 3099 else 3100 rc = wait_for_device_to_become_ready(h, scsi3addr, 0); 3101 3102 mutex_unlock(&h->reset_mutex); 3103 return rc; 3104 } 3105 3106 static void hpsa_get_raid_level(struct ctlr_info *h, 3107 unsigned char *scsi3addr, unsigned char *raid_level) 3108 { 3109 int rc; 3110 unsigned char *buf; 3111 3112 *raid_level = RAID_UNKNOWN; 3113 buf = kzalloc(64, GFP_KERNEL); 3114 if (!buf) 3115 return; 3116 3117 if (!hpsa_vpd_page_supported(h, scsi3addr, 3118 HPSA_VPD_LV_DEVICE_GEOMETRY)) 3119 goto exit; 3120 3121 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 3122 HPSA_VPD_LV_DEVICE_GEOMETRY, buf, 64); 3123 3124 if (rc == 0) 3125 *raid_level = buf[8]; 3126 if (*raid_level > RAID_UNKNOWN) 3127 *raid_level = RAID_UNKNOWN; 3128 exit: 3129 kfree(buf); 3130 return; 3131 } 3132 3133 #define HPSA_MAP_DEBUG 3134 #ifdef HPSA_MAP_DEBUG 3135 static void hpsa_debug_map_buff(struct ctlr_info *h, int rc, 3136 struct raid_map_data *map_buff) 3137 { 3138 struct raid_map_disk_data *dd = &map_buff->data[0]; 3139 int map, row, col; 3140 u16 map_cnt, row_cnt, disks_per_row; 3141 3142 if (rc != 0) 3143 return; 3144 3145 /* Show details only if debugging has been activated. */ 3146 if (h->raid_offload_debug < 2) 3147 return; 3148 3149 dev_info(&h->pdev->dev, "structure_size = %u\n", 3150 le32_to_cpu(map_buff->structure_size)); 3151 dev_info(&h->pdev->dev, "volume_blk_size = %u\n", 3152 le32_to_cpu(map_buff->volume_blk_size)); 3153 dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n", 3154 le64_to_cpu(map_buff->volume_blk_cnt)); 3155 dev_info(&h->pdev->dev, "physicalBlockShift = %u\n", 3156 map_buff->phys_blk_shift); 3157 dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n", 3158 map_buff->parity_rotation_shift); 3159 dev_info(&h->pdev->dev, "strip_size = %u\n", 3160 le16_to_cpu(map_buff->strip_size)); 3161 dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n", 3162 le64_to_cpu(map_buff->disk_starting_blk)); 3163 dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n", 3164 le64_to_cpu(map_buff->disk_blk_cnt)); 3165 dev_info(&h->pdev->dev, "data_disks_per_row = %u\n", 3166 le16_to_cpu(map_buff->data_disks_per_row)); 3167 dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n", 3168 le16_to_cpu(map_buff->metadata_disks_per_row)); 3169 dev_info(&h->pdev->dev, "row_cnt = %u\n", 3170 le16_to_cpu(map_buff->row_cnt)); 3171 dev_info(&h->pdev->dev, "layout_map_count = %u\n", 3172 le16_to_cpu(map_buff->layout_map_count)); 3173 dev_info(&h->pdev->dev, "flags = 0x%x\n", 3174 le16_to_cpu(map_buff->flags)); 3175 dev_info(&h->pdev->dev, "encrypytion = %s\n", 3176 le16_to_cpu(map_buff->flags) & 3177 RAID_MAP_FLAG_ENCRYPT_ON ? "ON" : "OFF"); 3178 dev_info(&h->pdev->dev, "dekindex = %u\n", 3179 le16_to_cpu(map_buff->dekindex)); 3180 map_cnt = le16_to_cpu(map_buff->layout_map_count); 3181 for (map = 0; map < map_cnt; map++) { 3182 dev_info(&h->pdev->dev, "Map%u:\n", map); 3183 row_cnt = le16_to_cpu(map_buff->row_cnt); 3184 for (row = 0; row < row_cnt; row++) { 3185 dev_info(&h->pdev->dev, " Row%u:\n", row); 3186 disks_per_row = 3187 le16_to_cpu(map_buff->data_disks_per_row); 3188 for (col = 0; col < disks_per_row; col++, dd++) 3189 dev_info(&h->pdev->dev, 3190 " D%02u: h=0x%04x xor=%u,%u\n", 3191 col, dd->ioaccel_handle, 3192 dd->xor_mult[0], dd->xor_mult[1]); 3193 disks_per_row = 3194 le16_to_cpu(map_buff->metadata_disks_per_row); 3195 for (col = 0; col < disks_per_row; col++, dd++) 3196 dev_info(&h->pdev->dev, 3197 " M%02u: h=0x%04x xor=%u,%u\n", 3198 col, dd->ioaccel_handle, 3199 dd->xor_mult[0], dd->xor_mult[1]); 3200 } 3201 } 3202 } 3203 #else 3204 static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h, 3205 __attribute__((unused)) int rc, 3206 __attribute__((unused)) struct raid_map_data *map_buff) 3207 { 3208 } 3209 #endif 3210 3211 static int hpsa_get_raid_map(struct ctlr_info *h, 3212 unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device) 3213 { 3214 int rc = 0; 3215 struct CommandList *c; 3216 struct ErrorInfo *ei; 3217 3218 c = cmd_alloc(h); 3219 3220 if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map, 3221 sizeof(this_device->raid_map), 0, 3222 scsi3addr, TYPE_CMD)) { 3223 dev_warn(&h->pdev->dev, "hpsa_get_raid_map fill_cmd failed\n"); 3224 cmd_free(h, c); 3225 return -1; 3226 } 3227 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3228 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 3229 if (rc) 3230 goto out; 3231 ei = c->err_info; 3232 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3233 hpsa_scsi_interpret_error(h, c); 3234 rc = -1; 3235 goto out; 3236 } 3237 cmd_free(h, c); 3238 3239 /* @todo in the future, dynamically allocate RAID map memory */ 3240 if (le32_to_cpu(this_device->raid_map.structure_size) > 3241 sizeof(this_device->raid_map)) { 3242 dev_warn(&h->pdev->dev, "RAID map size is too large!\n"); 3243 rc = -1; 3244 } 3245 hpsa_debug_map_buff(h, rc, &this_device->raid_map); 3246 return rc; 3247 out: 3248 cmd_free(h, c); 3249 return rc; 3250 } 3251 3252 static int hpsa_bmic_sense_subsystem_information(struct ctlr_info *h, 3253 unsigned char scsi3addr[], u16 bmic_device_index, 3254 struct bmic_sense_subsystem_info *buf, size_t bufsize) 3255 { 3256 int rc = IO_OK; 3257 struct CommandList *c; 3258 struct ErrorInfo *ei; 3259 3260 c = cmd_alloc(h); 3261 3262 rc = fill_cmd(c, BMIC_SENSE_SUBSYSTEM_INFORMATION, h, buf, bufsize, 3263 0, RAID_CTLR_LUNID, TYPE_CMD); 3264 if (rc) 3265 goto out; 3266 3267 c->Request.CDB[2] = bmic_device_index & 0xff; 3268 c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff; 3269 3270 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3271 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 3272 if (rc) 3273 goto out; 3274 ei = c->err_info; 3275 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3276 hpsa_scsi_interpret_error(h, c); 3277 rc = -1; 3278 } 3279 out: 3280 cmd_free(h, c); 3281 return rc; 3282 } 3283 3284 static int hpsa_bmic_id_controller(struct ctlr_info *h, 3285 struct bmic_identify_controller *buf, size_t bufsize) 3286 { 3287 int rc = IO_OK; 3288 struct CommandList *c; 3289 struct ErrorInfo *ei; 3290 3291 c = cmd_alloc(h); 3292 3293 rc = fill_cmd(c, BMIC_IDENTIFY_CONTROLLER, h, buf, bufsize, 3294 0, RAID_CTLR_LUNID, TYPE_CMD); 3295 if (rc) 3296 goto out; 3297 3298 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3299 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 3300 if (rc) 3301 goto out; 3302 ei = c->err_info; 3303 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3304 hpsa_scsi_interpret_error(h, c); 3305 rc = -1; 3306 } 3307 out: 3308 cmd_free(h, c); 3309 return rc; 3310 } 3311 3312 static int hpsa_bmic_id_physical_device(struct ctlr_info *h, 3313 unsigned char scsi3addr[], u16 bmic_device_index, 3314 struct bmic_identify_physical_device *buf, size_t bufsize) 3315 { 3316 int rc = IO_OK; 3317 struct CommandList *c; 3318 struct ErrorInfo *ei; 3319 3320 c = cmd_alloc(h); 3321 rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize, 3322 0, RAID_CTLR_LUNID, TYPE_CMD); 3323 if (rc) 3324 goto out; 3325 3326 c->Request.CDB[2] = bmic_device_index & 0xff; 3327 c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff; 3328 3329 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE, 3330 DEFAULT_TIMEOUT); 3331 ei = c->err_info; 3332 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3333 hpsa_scsi_interpret_error(h, c); 3334 rc = -1; 3335 } 3336 out: 3337 cmd_free(h, c); 3338 3339 return rc; 3340 } 3341 3342 /* 3343 * get enclosure information 3344 * struct ReportExtendedLUNdata *rlep - Used for BMIC drive number 3345 * struct hpsa_scsi_dev_t *encl_dev - device entry for enclosure 3346 * Uses id_physical_device to determine the box_index. 3347 */ 3348 static void hpsa_get_enclosure_info(struct ctlr_info *h, 3349 unsigned char *scsi3addr, 3350 struct ReportExtendedLUNdata *rlep, int rle_index, 3351 struct hpsa_scsi_dev_t *encl_dev) 3352 { 3353 int rc = -1; 3354 struct CommandList *c = NULL; 3355 struct ErrorInfo *ei = NULL; 3356 struct bmic_sense_storage_box_params *bssbp = NULL; 3357 struct bmic_identify_physical_device *id_phys = NULL; 3358 struct ext_report_lun_entry *rle = &rlep->LUN[rle_index]; 3359 u16 bmic_device_index = 0; 3360 3361 bmic_device_index = GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]); 3362 3363 if (encl_dev->target == -1 || encl_dev->lun == -1) { 3364 rc = IO_OK; 3365 goto out; 3366 } 3367 3368 if (bmic_device_index == 0xFF00 || MASKED_DEVICE(&rle->lunid[0])) { 3369 rc = IO_OK; 3370 goto out; 3371 } 3372 3373 bssbp = kzalloc(sizeof(*bssbp), GFP_KERNEL); 3374 if (!bssbp) 3375 goto out; 3376 3377 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 3378 if (!id_phys) 3379 goto out; 3380 3381 rc = hpsa_bmic_id_physical_device(h, scsi3addr, bmic_device_index, 3382 id_phys, sizeof(*id_phys)); 3383 if (rc) { 3384 dev_warn(&h->pdev->dev, "%s: id_phys failed %d bdi[0x%x]\n", 3385 __func__, encl_dev->external, bmic_device_index); 3386 goto out; 3387 } 3388 3389 c = cmd_alloc(h); 3390 3391 rc = fill_cmd(c, BMIC_SENSE_STORAGE_BOX_PARAMS, h, bssbp, 3392 sizeof(*bssbp), 0, RAID_CTLR_LUNID, TYPE_CMD); 3393 3394 if (rc) 3395 goto out; 3396 3397 if (id_phys->phys_connector[1] == 'E') 3398 c->Request.CDB[5] = id_phys->box_index; 3399 else 3400 c->Request.CDB[5] = 0; 3401 3402 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE, 3403 DEFAULT_TIMEOUT); 3404 if (rc) 3405 goto out; 3406 3407 ei = c->err_info; 3408 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3409 rc = -1; 3410 goto out; 3411 } 3412 3413 encl_dev->box[id_phys->active_path_number] = bssbp->phys_box_on_port; 3414 memcpy(&encl_dev->phys_connector[id_phys->active_path_number], 3415 bssbp->phys_connector, sizeof(bssbp->phys_connector)); 3416 3417 rc = IO_OK; 3418 out: 3419 kfree(bssbp); 3420 kfree(id_phys); 3421 3422 if (c) 3423 cmd_free(h, c); 3424 3425 if (rc != IO_OK) 3426 hpsa_show_dev_msg(KERN_INFO, h, encl_dev, 3427 "Error, could not get enclosure information\n"); 3428 } 3429 3430 static u64 hpsa_get_sas_address_from_report_physical(struct ctlr_info *h, 3431 unsigned char *scsi3addr) 3432 { 3433 struct ReportExtendedLUNdata *physdev; 3434 u32 nphysicals; 3435 u64 sa = 0; 3436 int i; 3437 3438 physdev = kzalloc(sizeof(*physdev), GFP_KERNEL); 3439 if (!physdev) 3440 return 0; 3441 3442 if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) { 3443 dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 3444 kfree(physdev); 3445 return 0; 3446 } 3447 nphysicals = get_unaligned_be32(physdev->LUNListLength) / 24; 3448 3449 for (i = 0; i < nphysicals; i++) 3450 if (!memcmp(&physdev->LUN[i].lunid[0], scsi3addr, 8)) { 3451 sa = get_unaligned_be64(&physdev->LUN[i].wwid[0]); 3452 break; 3453 } 3454 3455 kfree(physdev); 3456 3457 return sa; 3458 } 3459 3460 static void hpsa_get_sas_address(struct ctlr_info *h, unsigned char *scsi3addr, 3461 struct hpsa_scsi_dev_t *dev) 3462 { 3463 int rc; 3464 u64 sa = 0; 3465 3466 if (is_hba_lunid(scsi3addr)) { 3467 struct bmic_sense_subsystem_info *ssi; 3468 3469 ssi = kzalloc(sizeof(*ssi), GFP_KERNEL); 3470 if (!ssi) 3471 return; 3472 3473 rc = hpsa_bmic_sense_subsystem_information(h, 3474 scsi3addr, 0, ssi, sizeof(*ssi)); 3475 if (rc == 0) { 3476 sa = get_unaligned_be64(ssi->primary_world_wide_id); 3477 h->sas_address = sa; 3478 } 3479 3480 kfree(ssi); 3481 } else 3482 sa = hpsa_get_sas_address_from_report_physical(h, scsi3addr); 3483 3484 dev->sas_address = sa; 3485 } 3486 3487 /* Get a device id from inquiry page 0x83 */ 3488 static bool hpsa_vpd_page_supported(struct ctlr_info *h, 3489 unsigned char scsi3addr[], u8 page) 3490 { 3491 int rc; 3492 int i; 3493 int pages; 3494 unsigned char *buf, bufsize; 3495 3496 buf = kzalloc(256, GFP_KERNEL); 3497 if (!buf) 3498 return false; 3499 3500 /* Get the size of the page list first */ 3501 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 3502 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES, 3503 buf, HPSA_VPD_HEADER_SZ); 3504 if (rc != 0) 3505 goto exit_unsupported; 3506 pages = buf[3]; 3507 if ((pages + HPSA_VPD_HEADER_SZ) <= 255) 3508 bufsize = pages + HPSA_VPD_HEADER_SZ; 3509 else 3510 bufsize = 255; 3511 3512 /* Get the whole VPD page list */ 3513 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 3514 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES, 3515 buf, bufsize); 3516 if (rc != 0) 3517 goto exit_unsupported; 3518 3519 pages = buf[3]; 3520 for (i = 1; i <= pages; i++) 3521 if (buf[3 + i] == page) 3522 goto exit_supported; 3523 exit_unsupported: 3524 kfree(buf); 3525 return false; 3526 exit_supported: 3527 kfree(buf); 3528 return true; 3529 } 3530 3531 static void hpsa_get_ioaccel_status(struct ctlr_info *h, 3532 unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device) 3533 { 3534 int rc; 3535 unsigned char *buf; 3536 u8 ioaccel_status; 3537 3538 this_device->offload_config = 0; 3539 this_device->offload_enabled = 0; 3540 this_device->offload_to_be_enabled = 0; 3541 3542 buf = kzalloc(64, GFP_KERNEL); 3543 if (!buf) 3544 return; 3545 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS)) 3546 goto out; 3547 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 3548 VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64); 3549 if (rc != 0) 3550 goto out; 3551 3552 #define IOACCEL_STATUS_BYTE 4 3553 #define OFFLOAD_CONFIGURED_BIT 0x01 3554 #define OFFLOAD_ENABLED_BIT 0x02 3555 ioaccel_status = buf[IOACCEL_STATUS_BYTE]; 3556 this_device->offload_config = 3557 !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT); 3558 if (this_device->offload_config) { 3559 this_device->offload_enabled = 3560 !!(ioaccel_status & OFFLOAD_ENABLED_BIT); 3561 if (hpsa_get_raid_map(h, scsi3addr, this_device)) 3562 this_device->offload_enabled = 0; 3563 } 3564 this_device->offload_to_be_enabled = this_device->offload_enabled; 3565 out: 3566 kfree(buf); 3567 return; 3568 } 3569 3570 /* Get the device id from inquiry page 0x83 */ 3571 static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr, 3572 unsigned char *device_id, int index, int buflen) 3573 { 3574 int rc; 3575 unsigned char *buf; 3576 3577 /* Does controller have VPD for device id? */ 3578 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_DEVICE_ID)) 3579 return 1; /* not supported */ 3580 3581 buf = kzalloc(64, GFP_KERNEL); 3582 if (!buf) 3583 return -ENOMEM; 3584 3585 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 3586 HPSA_VPD_LV_DEVICE_ID, buf, 64); 3587 if (rc == 0) { 3588 if (buflen > 16) 3589 buflen = 16; 3590 memcpy(device_id, &buf[8], buflen); 3591 } 3592 3593 kfree(buf); 3594 3595 return rc; /*0 - got id, otherwise, didn't */ 3596 } 3597 3598 static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical, 3599 void *buf, int bufsize, 3600 int extended_response) 3601 { 3602 int rc = IO_OK; 3603 struct CommandList *c; 3604 unsigned char scsi3addr[8]; 3605 struct ErrorInfo *ei; 3606 3607 c = cmd_alloc(h); 3608 3609 /* address the controller */ 3610 memset(scsi3addr, 0, sizeof(scsi3addr)); 3611 if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h, 3612 buf, bufsize, 0, scsi3addr, TYPE_CMD)) { 3613 rc = -1; 3614 goto out; 3615 } 3616 if (extended_response) 3617 c->Request.CDB[1] = extended_response; 3618 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3619 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 3620 if (rc) 3621 goto out; 3622 ei = c->err_info; 3623 if (ei->CommandStatus != 0 && 3624 ei->CommandStatus != CMD_DATA_UNDERRUN) { 3625 hpsa_scsi_interpret_error(h, c); 3626 rc = -1; 3627 } else { 3628 struct ReportLUNdata *rld = buf; 3629 3630 if (rld->extended_response_flag != extended_response) { 3631 dev_err(&h->pdev->dev, 3632 "report luns requested format %u, got %u\n", 3633 extended_response, 3634 rld->extended_response_flag); 3635 rc = -1; 3636 } 3637 } 3638 out: 3639 cmd_free(h, c); 3640 return rc; 3641 } 3642 3643 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 3644 struct ReportExtendedLUNdata *buf, int bufsize) 3645 { 3646 int rc; 3647 struct ReportLUNdata *lbuf; 3648 3649 rc = hpsa_scsi_do_report_luns(h, 0, buf, bufsize, 3650 HPSA_REPORT_PHYS_EXTENDED); 3651 if (!rc || !hpsa_allow_any) 3652 return rc; 3653 3654 /* REPORT PHYS EXTENDED is not supported */ 3655 lbuf = kzalloc(sizeof(*lbuf), GFP_KERNEL); 3656 if (!lbuf) 3657 return -ENOMEM; 3658 3659 rc = hpsa_scsi_do_report_luns(h, 0, lbuf, sizeof(*lbuf), 0); 3660 if (!rc) { 3661 int i; 3662 u32 nphys; 3663 3664 /* Copy ReportLUNdata header */ 3665 memcpy(buf, lbuf, 8); 3666 nphys = be32_to_cpu(*((__be32 *)lbuf->LUNListLength)) / 8; 3667 for (i = 0; i < nphys; i++) 3668 memcpy(buf->LUN[i].lunid, lbuf->LUN[i], 8); 3669 } 3670 kfree(lbuf); 3671 return rc; 3672 } 3673 3674 static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h, 3675 struct ReportLUNdata *buf, int bufsize) 3676 { 3677 return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0); 3678 } 3679 3680 static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device, 3681 int bus, int target, int lun) 3682 { 3683 device->bus = bus; 3684 device->target = target; 3685 device->lun = lun; 3686 } 3687 3688 /* Use VPD inquiry to get details of volume status */ 3689 static int hpsa_get_volume_status(struct ctlr_info *h, 3690 unsigned char scsi3addr[]) 3691 { 3692 int rc; 3693 int status; 3694 int size; 3695 unsigned char *buf; 3696 3697 buf = kzalloc(64, GFP_KERNEL); 3698 if (!buf) 3699 return HPSA_VPD_LV_STATUS_UNSUPPORTED; 3700 3701 /* Does controller have VPD for logical volume status? */ 3702 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS)) 3703 goto exit_failed; 3704 3705 /* Get the size of the VPD return buffer */ 3706 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS, 3707 buf, HPSA_VPD_HEADER_SZ); 3708 if (rc != 0) 3709 goto exit_failed; 3710 size = buf[3]; 3711 3712 /* Now get the whole VPD buffer */ 3713 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS, 3714 buf, size + HPSA_VPD_HEADER_SZ); 3715 if (rc != 0) 3716 goto exit_failed; 3717 status = buf[4]; /* status byte */ 3718 3719 kfree(buf); 3720 return status; 3721 exit_failed: 3722 kfree(buf); 3723 return HPSA_VPD_LV_STATUS_UNSUPPORTED; 3724 } 3725 3726 /* Determine offline status of a volume. 3727 * Return either: 3728 * 0 (not offline) 3729 * 0xff (offline for unknown reasons) 3730 * # (integer code indicating one of several NOT READY states 3731 * describing why a volume is to be kept offline) 3732 */ 3733 static unsigned char hpsa_volume_offline(struct ctlr_info *h, 3734 unsigned char scsi3addr[]) 3735 { 3736 struct CommandList *c; 3737 unsigned char *sense; 3738 u8 sense_key, asc, ascq; 3739 int sense_len; 3740 int rc, ldstat = 0; 3741 u16 cmd_status; 3742 u8 scsi_status; 3743 #define ASC_LUN_NOT_READY 0x04 3744 #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04 3745 #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02 3746 3747 c = cmd_alloc(h); 3748 3749 (void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD); 3750 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 3751 DEFAULT_TIMEOUT); 3752 if (rc) { 3753 cmd_free(h, c); 3754 return HPSA_VPD_LV_STATUS_UNSUPPORTED; 3755 } 3756 sense = c->err_info->SenseInfo; 3757 if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo)) 3758 sense_len = sizeof(c->err_info->SenseInfo); 3759 else 3760 sense_len = c->err_info->SenseLen; 3761 decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq); 3762 cmd_status = c->err_info->CommandStatus; 3763 scsi_status = c->err_info->ScsiStatus; 3764 cmd_free(h, c); 3765 3766 /* Determine the reason for not ready state */ 3767 ldstat = hpsa_get_volume_status(h, scsi3addr); 3768 3769 /* Keep volume offline in certain cases: */ 3770 switch (ldstat) { 3771 case HPSA_LV_FAILED: 3772 case HPSA_LV_UNDERGOING_ERASE: 3773 case HPSA_LV_NOT_AVAILABLE: 3774 case HPSA_LV_UNDERGOING_RPI: 3775 case HPSA_LV_PENDING_RPI: 3776 case HPSA_LV_ENCRYPTED_NO_KEY: 3777 case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER: 3778 case HPSA_LV_UNDERGOING_ENCRYPTION: 3779 case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING: 3780 case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 3781 return ldstat; 3782 case HPSA_VPD_LV_STATUS_UNSUPPORTED: 3783 /* If VPD status page isn't available, 3784 * use ASC/ASCQ to determine state 3785 */ 3786 if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) || 3787 (ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ)) 3788 return ldstat; 3789 break; 3790 default: 3791 break; 3792 } 3793 return HPSA_LV_OK; 3794 } 3795 3796 /* 3797 * Find out if a logical device supports aborts by simply trying one. 3798 * Smart Array may claim not to support aborts on logical drives, but 3799 * if a MSA2000 * is connected, the drives on that will be presented 3800 * by the Smart Array as logical drives, and aborts may be sent to 3801 * those devices successfully. So the simplest way to find out is 3802 * to simply try an abort and see how the device responds. 3803 */ 3804 static int hpsa_device_supports_aborts(struct ctlr_info *h, 3805 unsigned char *scsi3addr) 3806 { 3807 struct CommandList *c; 3808 struct ErrorInfo *ei; 3809 int rc = 0; 3810 3811 u64 tag = (u64) -1; /* bogus tag */ 3812 3813 /* Assume that physical devices support aborts */ 3814 if (!is_logical_dev_addr_mode(scsi3addr)) 3815 return 1; 3816 3817 c = cmd_alloc(h); 3818 3819 (void) fill_cmd(c, HPSA_ABORT_MSG, h, &tag, 0, 0, scsi3addr, TYPE_MSG); 3820 (void) hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 3821 DEFAULT_TIMEOUT); 3822 /* no unmap needed here because no data xfer. */ 3823 ei = c->err_info; 3824 switch (ei->CommandStatus) { 3825 case CMD_INVALID: 3826 rc = 0; 3827 break; 3828 case CMD_UNABORTABLE: 3829 case CMD_ABORT_FAILED: 3830 rc = 1; 3831 break; 3832 case CMD_TMF_STATUS: 3833 rc = hpsa_evaluate_tmf_status(h, c); 3834 break; 3835 default: 3836 rc = 0; 3837 break; 3838 } 3839 cmd_free(h, c); 3840 return rc; 3841 } 3842 3843 static int hpsa_update_device_info(struct ctlr_info *h, 3844 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device, 3845 unsigned char *is_OBDR_device) 3846 { 3847 3848 #define OBDR_SIG_OFFSET 43 3849 #define OBDR_TAPE_SIG "$DR-10" 3850 #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1) 3851 #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN) 3852 3853 unsigned char *inq_buff; 3854 unsigned char *obdr_sig; 3855 int rc = 0; 3856 3857 inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL); 3858 if (!inq_buff) { 3859 rc = -ENOMEM; 3860 goto bail_out; 3861 } 3862 3863 /* Do an inquiry to the device to see what it is. */ 3864 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff, 3865 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) { 3866 dev_err(&h->pdev->dev, 3867 "%s: inquiry failed, device will be skipped.\n", 3868 __func__); 3869 rc = HPSA_INQUIRY_FAILED; 3870 goto bail_out; 3871 } 3872 3873 scsi_sanitize_inquiry_string(&inq_buff[8], 8); 3874 scsi_sanitize_inquiry_string(&inq_buff[16], 16); 3875 3876 this_device->devtype = (inq_buff[0] & 0x1f); 3877 memcpy(this_device->scsi3addr, scsi3addr, 8); 3878 memcpy(this_device->vendor, &inq_buff[8], 3879 sizeof(this_device->vendor)); 3880 memcpy(this_device->model, &inq_buff[16], 3881 sizeof(this_device->model)); 3882 this_device->rev = inq_buff[2]; 3883 memset(this_device->device_id, 0, 3884 sizeof(this_device->device_id)); 3885 if (hpsa_get_device_id(h, scsi3addr, this_device->device_id, 8, 3886 sizeof(this_device->device_id))) 3887 dev_err(&h->pdev->dev, 3888 "hpsa%d: %s: can't get device id for host %d:C0:T%d:L%d\t%s\t%.16s\n", 3889 h->ctlr, __func__, 3890 h->scsi_host->host_no, 3891 this_device->target, this_device->lun, 3892 scsi_device_type(this_device->devtype), 3893 this_device->model); 3894 3895 if ((this_device->devtype == TYPE_DISK || 3896 this_device->devtype == TYPE_ZBC) && 3897 is_logical_dev_addr_mode(scsi3addr)) { 3898 unsigned char volume_offline; 3899 3900 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level); 3901 if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC) 3902 hpsa_get_ioaccel_status(h, scsi3addr, this_device); 3903 volume_offline = hpsa_volume_offline(h, scsi3addr); 3904 this_device->volume_offline = volume_offline; 3905 if (volume_offline == HPSA_LV_FAILED) { 3906 rc = HPSA_LV_FAILED; 3907 dev_err(&h->pdev->dev, 3908 "%s: LV failed, device will be skipped.\n", 3909 __func__); 3910 goto bail_out; 3911 } 3912 } else { 3913 this_device->raid_level = RAID_UNKNOWN; 3914 this_device->offload_config = 0; 3915 this_device->offload_enabled = 0; 3916 this_device->offload_to_be_enabled = 0; 3917 this_device->hba_ioaccel_enabled = 0; 3918 this_device->volume_offline = 0; 3919 this_device->queue_depth = h->nr_cmds; 3920 } 3921 3922 if (this_device->external) 3923 this_device->queue_depth = EXTERNAL_QD; 3924 3925 if (is_OBDR_device) { 3926 /* See if this is a One-Button-Disaster-Recovery device 3927 * by looking for "$DR-10" at offset 43 in inquiry data. 3928 */ 3929 obdr_sig = &inq_buff[OBDR_SIG_OFFSET]; 3930 *is_OBDR_device = (this_device->devtype == TYPE_ROM && 3931 strncmp(obdr_sig, OBDR_TAPE_SIG, 3932 OBDR_SIG_LEN) == 0); 3933 } 3934 kfree(inq_buff); 3935 return 0; 3936 3937 bail_out: 3938 kfree(inq_buff); 3939 return rc; 3940 } 3941 3942 static void hpsa_update_device_supports_aborts(struct ctlr_info *h, 3943 struct hpsa_scsi_dev_t *dev, u8 *scsi3addr) 3944 { 3945 unsigned long flags; 3946 int rc, entry; 3947 /* 3948 * See if this device supports aborts. If we already know 3949 * the device, we already know if it supports aborts, otherwise 3950 * we have to find out if it supports aborts by trying one. 3951 */ 3952 spin_lock_irqsave(&h->devlock, flags); 3953 rc = hpsa_scsi_find_entry(dev, h->dev, h->ndevices, &entry); 3954 if ((rc == DEVICE_SAME || rc == DEVICE_UPDATED) && 3955 entry >= 0 && entry < h->ndevices) { 3956 dev->supports_aborts = h->dev[entry]->supports_aborts; 3957 spin_unlock_irqrestore(&h->devlock, flags); 3958 } else { 3959 spin_unlock_irqrestore(&h->devlock, flags); 3960 dev->supports_aborts = 3961 hpsa_device_supports_aborts(h, scsi3addr); 3962 if (dev->supports_aborts < 0) 3963 dev->supports_aborts = 0; 3964 } 3965 } 3966 3967 /* 3968 * Helper function to assign bus, target, lun mapping of devices. 3969 * Logical drive target and lun are assigned at this time, but 3970 * physical device lun and target assignment are deferred (assigned 3971 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.) 3972 */ 3973 static void figure_bus_target_lun(struct ctlr_info *h, 3974 u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device) 3975 { 3976 u32 lunid = get_unaligned_le32(lunaddrbytes); 3977 3978 if (!is_logical_dev_addr_mode(lunaddrbytes)) { 3979 /* physical device, target and lun filled in later */ 3980 if (is_hba_lunid(lunaddrbytes)) { 3981 int bus = HPSA_HBA_BUS; 3982 3983 if (!device->rev) 3984 bus = HPSA_LEGACY_HBA_BUS; 3985 hpsa_set_bus_target_lun(device, 3986 bus, 0, lunid & 0x3fff); 3987 } else 3988 /* defer target, lun assignment for physical devices */ 3989 hpsa_set_bus_target_lun(device, 3990 HPSA_PHYSICAL_DEVICE_BUS, -1, -1); 3991 return; 3992 } 3993 /* It's a logical device */ 3994 if (device->external) { 3995 hpsa_set_bus_target_lun(device, 3996 HPSA_EXTERNAL_RAID_VOLUME_BUS, (lunid >> 16) & 0x3fff, 3997 lunid & 0x00ff); 3998 return; 3999 } 4000 hpsa_set_bus_target_lun(device, HPSA_RAID_VOLUME_BUS, 4001 0, lunid & 0x3fff); 4002 } 4003 4004 4005 /* 4006 * Get address of physical disk used for an ioaccel2 mode command: 4007 * 1. Extract ioaccel2 handle from the command. 4008 * 2. Find a matching ioaccel2 handle from list of physical disks. 4009 * 3. Return: 4010 * 1 and set scsi3addr to address of matching physical 4011 * 0 if no matching physical disk was found. 4012 */ 4013 static int hpsa_get_pdisk_of_ioaccel2(struct ctlr_info *h, 4014 struct CommandList *ioaccel2_cmd_to_abort, unsigned char *scsi3addr) 4015 { 4016 struct io_accel2_cmd *c2 = 4017 &h->ioaccel2_cmd_pool[ioaccel2_cmd_to_abort->cmdindex]; 4018 unsigned long flags; 4019 int i; 4020 4021 spin_lock_irqsave(&h->devlock, flags); 4022 for (i = 0; i < h->ndevices; i++) 4023 if (h->dev[i]->ioaccel_handle == le32_to_cpu(c2->scsi_nexus)) { 4024 memcpy(scsi3addr, h->dev[i]->scsi3addr, 4025 sizeof(h->dev[i]->scsi3addr)); 4026 spin_unlock_irqrestore(&h->devlock, flags); 4027 return 1; 4028 } 4029 spin_unlock_irqrestore(&h->devlock, flags); 4030 return 0; 4031 } 4032 4033 static int figure_external_status(struct ctlr_info *h, int raid_ctlr_position, 4034 int i, int nphysicals, int nlocal_logicals) 4035 { 4036 /* In report logicals, local logicals are listed first, 4037 * then any externals. 4038 */ 4039 int logicals_start = nphysicals + (raid_ctlr_position == 0); 4040 4041 if (i == raid_ctlr_position) 4042 return 0; 4043 4044 if (i < logicals_start) 4045 return 0; 4046 4047 /* i is in logicals range, but still within local logicals */ 4048 if ((i - nphysicals - (raid_ctlr_position == 0)) < nlocal_logicals) 4049 return 0; 4050 4051 return 1; /* it's an external lun */ 4052 } 4053 4054 /* 4055 * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev, 4056 * logdev. The number of luns in physdev and logdev are returned in 4057 * *nphysicals and *nlogicals, respectively. 4058 * Returns 0 on success, -1 otherwise. 4059 */ 4060 static int hpsa_gather_lun_info(struct ctlr_info *h, 4061 struct ReportExtendedLUNdata *physdev, u32 *nphysicals, 4062 struct ReportLUNdata *logdev, u32 *nlogicals) 4063 { 4064 if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) { 4065 dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 4066 return -1; 4067 } 4068 *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24; 4069 if (*nphysicals > HPSA_MAX_PHYS_LUN) { 4070 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n", 4071 HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN); 4072 *nphysicals = HPSA_MAX_PHYS_LUN; 4073 } 4074 if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) { 4075 dev_err(&h->pdev->dev, "report logical LUNs failed.\n"); 4076 return -1; 4077 } 4078 *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8; 4079 /* Reject Logicals in excess of our max capability. */ 4080 if (*nlogicals > HPSA_MAX_LUN) { 4081 dev_warn(&h->pdev->dev, 4082 "maximum logical LUNs (%d) exceeded. " 4083 "%d LUNs ignored.\n", HPSA_MAX_LUN, 4084 *nlogicals - HPSA_MAX_LUN); 4085 *nlogicals = HPSA_MAX_LUN; 4086 } 4087 if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) { 4088 dev_warn(&h->pdev->dev, 4089 "maximum logical + physical LUNs (%d) exceeded. " 4090 "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN, 4091 *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN); 4092 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals; 4093 } 4094 return 0; 4095 } 4096 4097 static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, 4098 int i, int nphysicals, int nlogicals, 4099 struct ReportExtendedLUNdata *physdev_list, 4100 struct ReportLUNdata *logdev_list) 4101 { 4102 /* Helper function, figure out where the LUN ID info is coming from 4103 * given index i, lists of physical and logical devices, where in 4104 * the list the raid controller is supposed to appear (first or last) 4105 */ 4106 4107 int logicals_start = nphysicals + (raid_ctlr_position == 0); 4108 int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0); 4109 4110 if (i == raid_ctlr_position) 4111 return RAID_CTLR_LUNID; 4112 4113 if (i < logicals_start) 4114 return &physdev_list->LUN[i - 4115 (raid_ctlr_position == 0)].lunid[0]; 4116 4117 if (i < last_device) 4118 return &logdev_list->LUN[i - nphysicals - 4119 (raid_ctlr_position == 0)][0]; 4120 BUG(); 4121 return NULL; 4122 } 4123 4124 /* get physical drive ioaccel handle and queue depth */ 4125 static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h, 4126 struct hpsa_scsi_dev_t *dev, 4127 struct ReportExtendedLUNdata *rlep, int rle_index, 4128 struct bmic_identify_physical_device *id_phys) 4129 { 4130 int rc; 4131 struct ext_report_lun_entry *rle; 4132 4133 rle = &rlep->LUN[rle_index]; 4134 4135 dev->ioaccel_handle = rle->ioaccel_handle; 4136 if ((rle->device_flags & 0x08) && dev->ioaccel_handle) 4137 dev->hba_ioaccel_enabled = 1; 4138 memset(id_phys, 0, sizeof(*id_phys)); 4139 rc = hpsa_bmic_id_physical_device(h, &rle->lunid[0], 4140 GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]), id_phys, 4141 sizeof(*id_phys)); 4142 if (!rc) 4143 /* Reserve space for FW operations */ 4144 #define DRIVE_CMDS_RESERVED_FOR_FW 2 4145 #define DRIVE_QUEUE_DEPTH 7 4146 dev->queue_depth = 4147 le16_to_cpu(id_phys->current_queue_depth_limit) - 4148 DRIVE_CMDS_RESERVED_FOR_FW; 4149 else 4150 dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */ 4151 } 4152 4153 static void hpsa_get_path_info(struct hpsa_scsi_dev_t *this_device, 4154 struct ReportExtendedLUNdata *rlep, int rle_index, 4155 struct bmic_identify_physical_device *id_phys) 4156 { 4157 struct ext_report_lun_entry *rle = &rlep->LUN[rle_index]; 4158 4159 if ((rle->device_flags & 0x08) && this_device->ioaccel_handle) 4160 this_device->hba_ioaccel_enabled = 1; 4161 4162 memcpy(&this_device->active_path_index, 4163 &id_phys->active_path_number, 4164 sizeof(this_device->active_path_index)); 4165 memcpy(&this_device->path_map, 4166 &id_phys->redundant_path_present_map, 4167 sizeof(this_device->path_map)); 4168 memcpy(&this_device->box, 4169 &id_phys->alternate_paths_phys_box_on_port, 4170 sizeof(this_device->box)); 4171 memcpy(&this_device->phys_connector, 4172 &id_phys->alternate_paths_phys_connector, 4173 sizeof(this_device->phys_connector)); 4174 memcpy(&this_device->bay, 4175 &id_phys->phys_bay_in_box, 4176 sizeof(this_device->bay)); 4177 } 4178 4179 /* get number of local logical disks. */ 4180 static int hpsa_set_local_logical_count(struct ctlr_info *h, 4181 struct bmic_identify_controller *id_ctlr, 4182 u32 *nlocals) 4183 { 4184 int rc; 4185 4186 if (!id_ctlr) { 4187 dev_warn(&h->pdev->dev, "%s: id_ctlr buffer is NULL.\n", 4188 __func__); 4189 return -ENOMEM; 4190 } 4191 memset(id_ctlr, 0, sizeof(*id_ctlr)); 4192 rc = hpsa_bmic_id_controller(h, id_ctlr, sizeof(*id_ctlr)); 4193 if (!rc) 4194 if (id_ctlr->configured_logical_drive_count < 256) 4195 *nlocals = id_ctlr->configured_logical_drive_count; 4196 else 4197 *nlocals = le16_to_cpu( 4198 id_ctlr->extended_logical_unit_count); 4199 else 4200 *nlocals = -1; 4201 return rc; 4202 } 4203 4204 static bool hpsa_is_disk_spare(struct ctlr_info *h, u8 *lunaddrbytes) 4205 { 4206 struct bmic_identify_physical_device *id_phys; 4207 bool is_spare = false; 4208 int rc; 4209 4210 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 4211 if (!id_phys) 4212 return false; 4213 4214 rc = hpsa_bmic_id_physical_device(h, 4215 lunaddrbytes, 4216 GET_BMIC_DRIVE_NUMBER(lunaddrbytes), 4217 id_phys, sizeof(*id_phys)); 4218 if (rc == 0) 4219 is_spare = (id_phys->more_flags >> 6) & 0x01; 4220 4221 kfree(id_phys); 4222 return is_spare; 4223 } 4224 4225 #define RPL_DEV_FLAG_NON_DISK 0x1 4226 #define RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED 0x2 4227 #define RPL_DEV_FLAG_UNCONFIG_DISK 0x4 4228 4229 #define BMIC_DEVICE_TYPE_ENCLOSURE 6 4230 4231 static bool hpsa_skip_device(struct ctlr_info *h, u8 *lunaddrbytes, 4232 struct ext_report_lun_entry *rle) 4233 { 4234 u8 device_flags; 4235 u8 device_type; 4236 4237 if (!MASKED_DEVICE(lunaddrbytes)) 4238 return false; 4239 4240 device_flags = rle->device_flags; 4241 device_type = rle->device_type; 4242 4243 if (device_flags & RPL_DEV_FLAG_NON_DISK) { 4244 if (device_type == BMIC_DEVICE_TYPE_ENCLOSURE) 4245 return false; 4246 return true; 4247 } 4248 4249 if (!(device_flags & RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED)) 4250 return false; 4251 4252 if (device_flags & RPL_DEV_FLAG_UNCONFIG_DISK) 4253 return false; 4254 4255 /* 4256 * Spares may be spun down, we do not want to 4257 * do an Inquiry to a RAID set spare drive as 4258 * that would have them spun up, that is a 4259 * performance hit because I/O to the RAID device 4260 * stops while the spin up occurs which can take 4261 * over 50 seconds. 4262 */ 4263 if (hpsa_is_disk_spare(h, lunaddrbytes)) 4264 return true; 4265 4266 return false; 4267 } 4268 4269 static void hpsa_update_scsi_devices(struct ctlr_info *h) 4270 { 4271 /* the idea here is we could get notified 4272 * that some devices have changed, so we do a report 4273 * physical luns and report logical luns cmd, and adjust 4274 * our list of devices accordingly. 4275 * 4276 * The scsi3addr's of devices won't change so long as the 4277 * adapter is not reset. That means we can rescan and 4278 * tell which devices we already know about, vs. new 4279 * devices, vs. disappearing devices. 4280 */ 4281 struct ReportExtendedLUNdata *physdev_list = NULL; 4282 struct ReportLUNdata *logdev_list = NULL; 4283 struct bmic_identify_physical_device *id_phys = NULL; 4284 struct bmic_identify_controller *id_ctlr = NULL; 4285 u32 nphysicals = 0; 4286 u32 nlogicals = 0; 4287 u32 nlocal_logicals = 0; 4288 u32 ndev_allocated = 0; 4289 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice; 4290 int ncurrent = 0; 4291 int i, n_ext_target_devs, ndevs_to_allocate; 4292 int raid_ctlr_position; 4293 bool physical_device; 4294 DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS); 4295 4296 currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL); 4297 physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL); 4298 logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL); 4299 tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL); 4300 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 4301 id_ctlr = kzalloc(sizeof(*id_ctlr), GFP_KERNEL); 4302 4303 if (!currentsd || !physdev_list || !logdev_list || 4304 !tmpdevice || !id_phys || !id_ctlr) { 4305 dev_err(&h->pdev->dev, "out of memory\n"); 4306 goto out; 4307 } 4308 memset(lunzerobits, 0, sizeof(lunzerobits)); 4309 4310 h->drv_req_rescan = 0; /* cancel scheduled rescan - we're doing it. */ 4311 4312 if (hpsa_gather_lun_info(h, physdev_list, &nphysicals, 4313 logdev_list, &nlogicals)) { 4314 h->drv_req_rescan = 1; 4315 goto out; 4316 } 4317 4318 /* Set number of local logicals (non PTRAID) */ 4319 if (hpsa_set_local_logical_count(h, id_ctlr, &nlocal_logicals)) { 4320 dev_warn(&h->pdev->dev, 4321 "%s: Can't determine number of local logical devices.\n", 4322 __func__); 4323 } 4324 4325 /* We might see up to the maximum number of logical and physical disks 4326 * plus external target devices, and a device for the local RAID 4327 * controller. 4328 */ 4329 ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1; 4330 4331 /* Allocate the per device structures */ 4332 for (i = 0; i < ndevs_to_allocate; i++) { 4333 if (i >= HPSA_MAX_DEVICES) { 4334 dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded." 4335 " %d devices ignored.\n", HPSA_MAX_DEVICES, 4336 ndevs_to_allocate - HPSA_MAX_DEVICES); 4337 break; 4338 } 4339 4340 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL); 4341 if (!currentsd[i]) { 4342 h->drv_req_rescan = 1; 4343 goto out; 4344 } 4345 ndev_allocated++; 4346 } 4347 4348 if (is_scsi_rev_5(h)) 4349 raid_ctlr_position = 0; 4350 else 4351 raid_ctlr_position = nphysicals + nlogicals; 4352 4353 /* adjust our table of devices */ 4354 n_ext_target_devs = 0; 4355 for (i = 0; i < nphysicals + nlogicals + 1; i++) { 4356 u8 *lunaddrbytes, is_OBDR = 0; 4357 int rc = 0; 4358 int phys_dev_index = i - (raid_ctlr_position == 0); 4359 bool skip_device = false; 4360 4361 physical_device = i < nphysicals + (raid_ctlr_position == 0); 4362 4363 /* Figure out where the LUN ID info is coming from */ 4364 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position, 4365 i, nphysicals, nlogicals, physdev_list, logdev_list); 4366 4367 /* Determine if this is a lun from an external target array */ 4368 tmpdevice->external = 4369 figure_external_status(h, raid_ctlr_position, i, 4370 nphysicals, nlocal_logicals); 4371 4372 /* 4373 * Skip over some devices such as a spare. 4374 */ 4375 if (!tmpdevice->external && physical_device) { 4376 skip_device = hpsa_skip_device(h, lunaddrbytes, 4377 &physdev_list->LUN[phys_dev_index]); 4378 if (skip_device) 4379 continue; 4380 } 4381 4382 /* Get device type, vendor, model, device id */ 4383 rc = hpsa_update_device_info(h, lunaddrbytes, tmpdevice, 4384 &is_OBDR); 4385 if (rc == -ENOMEM) { 4386 dev_warn(&h->pdev->dev, 4387 "Out of memory, rescan deferred.\n"); 4388 h->drv_req_rescan = 1; 4389 goto out; 4390 } 4391 if (rc) { 4392 h->drv_req_rescan = 1; 4393 continue; 4394 } 4395 4396 figure_bus_target_lun(h, lunaddrbytes, tmpdevice); 4397 hpsa_update_device_supports_aborts(h, tmpdevice, lunaddrbytes); 4398 this_device = currentsd[ncurrent]; 4399 4400 /* Turn on discovery_polling if there are ext target devices. 4401 * Event-based change notification is unreliable for those. 4402 */ 4403 if (!h->discovery_polling) { 4404 if (tmpdevice->external) { 4405 h->discovery_polling = 1; 4406 dev_info(&h->pdev->dev, 4407 "External target, activate discovery polling.\n"); 4408 } 4409 } 4410 4411 4412 *this_device = *tmpdevice; 4413 this_device->physical_device = physical_device; 4414 4415 /* 4416 * Expose all devices except for physical devices that 4417 * are masked. 4418 */ 4419 if (MASKED_DEVICE(lunaddrbytes) && this_device->physical_device) 4420 this_device->expose_device = 0; 4421 else 4422 this_device->expose_device = 1; 4423 4424 4425 /* 4426 * Get the SAS address for physical devices that are exposed. 4427 */ 4428 if (this_device->physical_device && this_device->expose_device) 4429 hpsa_get_sas_address(h, lunaddrbytes, this_device); 4430 4431 switch (this_device->devtype) { 4432 case TYPE_ROM: 4433 /* We don't *really* support actual CD-ROM devices, 4434 * just "One Button Disaster Recovery" tape drive 4435 * which temporarily pretends to be a CD-ROM drive. 4436 * So we check that the device is really an OBDR tape 4437 * device by checking for "$DR-10" in bytes 43-48 of 4438 * the inquiry data. 4439 */ 4440 if (is_OBDR) 4441 ncurrent++; 4442 break; 4443 case TYPE_DISK: 4444 case TYPE_ZBC: 4445 if (this_device->physical_device) { 4446 /* The disk is in HBA mode. */ 4447 /* Never use RAID mapper in HBA mode. */ 4448 this_device->offload_enabled = 0; 4449 hpsa_get_ioaccel_drive_info(h, this_device, 4450 physdev_list, phys_dev_index, id_phys); 4451 hpsa_get_path_info(this_device, 4452 physdev_list, phys_dev_index, id_phys); 4453 } 4454 ncurrent++; 4455 break; 4456 case TYPE_TAPE: 4457 case TYPE_MEDIUM_CHANGER: 4458 ncurrent++; 4459 break; 4460 case TYPE_ENCLOSURE: 4461 if (!this_device->external) 4462 hpsa_get_enclosure_info(h, lunaddrbytes, 4463 physdev_list, phys_dev_index, 4464 this_device); 4465 ncurrent++; 4466 break; 4467 case TYPE_RAID: 4468 /* Only present the Smartarray HBA as a RAID controller. 4469 * If it's a RAID controller other than the HBA itself 4470 * (an external RAID controller, MSA500 or similar) 4471 * don't present it. 4472 */ 4473 if (!is_hba_lunid(lunaddrbytes)) 4474 break; 4475 ncurrent++; 4476 break; 4477 default: 4478 break; 4479 } 4480 if (ncurrent >= HPSA_MAX_DEVICES) 4481 break; 4482 } 4483 4484 if (h->sas_host == NULL) { 4485 int rc = 0; 4486 4487 rc = hpsa_add_sas_host(h); 4488 if (rc) { 4489 dev_warn(&h->pdev->dev, 4490 "Could not add sas host %d\n", rc); 4491 goto out; 4492 } 4493 } 4494 4495 adjust_hpsa_scsi_table(h, currentsd, ncurrent); 4496 out: 4497 kfree(tmpdevice); 4498 for (i = 0; i < ndev_allocated; i++) 4499 kfree(currentsd[i]); 4500 kfree(currentsd); 4501 kfree(physdev_list); 4502 kfree(logdev_list); 4503 kfree(id_ctlr); 4504 kfree(id_phys); 4505 } 4506 4507 static void hpsa_set_sg_descriptor(struct SGDescriptor *desc, 4508 struct scatterlist *sg) 4509 { 4510 u64 addr64 = (u64) sg_dma_address(sg); 4511 unsigned int len = sg_dma_len(sg); 4512 4513 desc->Addr = cpu_to_le64(addr64); 4514 desc->Len = cpu_to_le32(len); 4515 desc->Ext = 0; 4516 } 4517 4518 /* 4519 * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci 4520 * dma mapping and fills in the scatter gather entries of the 4521 * hpsa command, cp. 4522 */ 4523 static int hpsa_scatter_gather(struct ctlr_info *h, 4524 struct CommandList *cp, 4525 struct scsi_cmnd *cmd) 4526 { 4527 struct scatterlist *sg; 4528 int use_sg, i, sg_limit, chained, last_sg; 4529 struct SGDescriptor *curr_sg; 4530 4531 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 4532 4533 use_sg = scsi_dma_map(cmd); 4534 if (use_sg < 0) 4535 return use_sg; 4536 4537 if (!use_sg) 4538 goto sglist_finished; 4539 4540 /* 4541 * If the number of entries is greater than the max for a single list, 4542 * then we have a chained list; we will set up all but one entry in the 4543 * first list (the last entry is saved for link information); 4544 * otherwise, we don't have a chained list and we'll set up at each of 4545 * the entries in the one list. 4546 */ 4547 curr_sg = cp->SG; 4548 chained = use_sg > h->max_cmd_sg_entries; 4549 sg_limit = chained ? h->max_cmd_sg_entries - 1 : use_sg; 4550 last_sg = scsi_sg_count(cmd) - 1; 4551 scsi_for_each_sg(cmd, sg, sg_limit, i) { 4552 hpsa_set_sg_descriptor(curr_sg, sg); 4553 curr_sg++; 4554 } 4555 4556 if (chained) { 4557 /* 4558 * Continue with the chained list. Set curr_sg to the chained 4559 * list. Modify the limit to the total count less the entries 4560 * we've already set up. Resume the scan at the list entry 4561 * where the previous loop left off. 4562 */ 4563 curr_sg = h->cmd_sg_list[cp->cmdindex]; 4564 sg_limit = use_sg - sg_limit; 4565 for_each_sg(sg, sg, sg_limit, i) { 4566 hpsa_set_sg_descriptor(curr_sg, sg); 4567 curr_sg++; 4568 } 4569 } 4570 4571 /* Back the pointer up to the last entry and mark it as "last". */ 4572 (curr_sg - 1)->Ext = cpu_to_le32(HPSA_SG_LAST); 4573 4574 if (use_sg + chained > h->maxSG) 4575 h->maxSG = use_sg + chained; 4576 4577 if (chained) { 4578 cp->Header.SGList = h->max_cmd_sg_entries; 4579 cp->Header.SGTotal = cpu_to_le16(use_sg + 1); 4580 if (hpsa_map_sg_chain_block(h, cp)) { 4581 scsi_dma_unmap(cmd); 4582 return -1; 4583 } 4584 return 0; 4585 } 4586 4587 sglist_finished: 4588 4589 cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */ 4590 cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */ 4591 return 0; 4592 } 4593 4594 #define IO_ACCEL_INELIGIBLE (1) 4595 static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len) 4596 { 4597 int is_write = 0; 4598 u32 block; 4599 u32 block_cnt; 4600 4601 /* Perform some CDB fixups if needed using 10 byte reads/writes only */ 4602 switch (cdb[0]) { 4603 case WRITE_6: 4604 case WRITE_12: 4605 is_write = 1; 4606 case READ_6: 4607 case READ_12: 4608 if (*cdb_len == 6) { 4609 block = (((cdb[1] & 0x1F) << 16) | 4610 (cdb[2] << 8) | 4611 cdb[3]); 4612 block_cnt = cdb[4]; 4613 if (block_cnt == 0) 4614 block_cnt = 256; 4615 } else { 4616 BUG_ON(*cdb_len != 12); 4617 block = get_unaligned_be32(&cdb[2]); 4618 block_cnt = get_unaligned_be32(&cdb[6]); 4619 } 4620 if (block_cnt > 0xffff) 4621 return IO_ACCEL_INELIGIBLE; 4622 4623 cdb[0] = is_write ? WRITE_10 : READ_10; 4624 cdb[1] = 0; 4625 cdb[2] = (u8) (block >> 24); 4626 cdb[3] = (u8) (block >> 16); 4627 cdb[4] = (u8) (block >> 8); 4628 cdb[5] = (u8) (block); 4629 cdb[6] = 0; 4630 cdb[7] = (u8) (block_cnt >> 8); 4631 cdb[8] = (u8) (block_cnt); 4632 cdb[9] = 0; 4633 *cdb_len = 10; 4634 break; 4635 } 4636 return 0; 4637 } 4638 4639 static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h, 4640 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 4641 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4642 { 4643 struct scsi_cmnd *cmd = c->scsi_cmd; 4644 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex]; 4645 unsigned int len; 4646 unsigned int total_len = 0; 4647 struct scatterlist *sg; 4648 u64 addr64; 4649 int use_sg, i; 4650 struct SGDescriptor *curr_sg; 4651 u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE; 4652 4653 /* TODO: implement chaining support */ 4654 if (scsi_sg_count(cmd) > h->ioaccel_maxsg) { 4655 atomic_dec(&phys_disk->ioaccel_cmds_out); 4656 return IO_ACCEL_INELIGIBLE; 4657 } 4658 4659 BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX); 4660 4661 if (fixup_ioaccel_cdb(cdb, &cdb_len)) { 4662 atomic_dec(&phys_disk->ioaccel_cmds_out); 4663 return IO_ACCEL_INELIGIBLE; 4664 } 4665 4666 c->cmd_type = CMD_IOACCEL1; 4667 4668 /* Adjust the DMA address to point to the accelerated command buffer */ 4669 c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle + 4670 (c->cmdindex * sizeof(*cp)); 4671 BUG_ON(c->busaddr & 0x0000007F); 4672 4673 use_sg = scsi_dma_map(cmd); 4674 if (use_sg < 0) { 4675 atomic_dec(&phys_disk->ioaccel_cmds_out); 4676 return use_sg; 4677 } 4678 4679 if (use_sg) { 4680 curr_sg = cp->SG; 4681 scsi_for_each_sg(cmd, sg, use_sg, i) { 4682 addr64 = (u64) sg_dma_address(sg); 4683 len = sg_dma_len(sg); 4684 total_len += len; 4685 curr_sg->Addr = cpu_to_le64(addr64); 4686 curr_sg->Len = cpu_to_le32(len); 4687 curr_sg->Ext = cpu_to_le32(0); 4688 curr_sg++; 4689 } 4690 (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST); 4691 4692 switch (cmd->sc_data_direction) { 4693 case DMA_TO_DEVICE: 4694 control |= IOACCEL1_CONTROL_DATA_OUT; 4695 break; 4696 case DMA_FROM_DEVICE: 4697 control |= IOACCEL1_CONTROL_DATA_IN; 4698 break; 4699 case DMA_NONE: 4700 control |= IOACCEL1_CONTROL_NODATAXFER; 4701 break; 4702 default: 4703 dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4704 cmd->sc_data_direction); 4705 BUG(); 4706 break; 4707 } 4708 } else { 4709 control |= IOACCEL1_CONTROL_NODATAXFER; 4710 } 4711 4712 c->Header.SGList = use_sg; 4713 /* Fill out the command structure to submit */ 4714 cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF); 4715 cp->transfer_len = cpu_to_le32(total_len); 4716 cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ | 4717 (cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK)); 4718 cp->control = cpu_to_le32(control); 4719 memcpy(cp->CDB, cdb, cdb_len); 4720 memcpy(cp->CISS_LUN, scsi3addr, 8); 4721 /* Tag was already set at init time. */ 4722 enqueue_cmd_and_start_io(h, c); 4723 return 0; 4724 } 4725 4726 /* 4727 * Queue a command directly to a device behind the controller using the 4728 * I/O accelerator path. 4729 */ 4730 static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h, 4731 struct CommandList *c) 4732 { 4733 struct scsi_cmnd *cmd = c->scsi_cmd; 4734 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4735 4736 if (!dev) 4737 return -1; 4738 4739 c->phys_disk = dev; 4740 4741 return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle, 4742 cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev); 4743 } 4744 4745 /* 4746 * Set encryption parameters for the ioaccel2 request 4747 */ 4748 static void set_encrypt_ioaccel2(struct ctlr_info *h, 4749 struct CommandList *c, struct io_accel2_cmd *cp) 4750 { 4751 struct scsi_cmnd *cmd = c->scsi_cmd; 4752 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4753 struct raid_map_data *map = &dev->raid_map; 4754 u64 first_block; 4755 4756 /* Are we doing encryption on this device */ 4757 if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON)) 4758 return; 4759 /* Set the data encryption key index. */ 4760 cp->dekindex = map->dekindex; 4761 4762 /* Set the encryption enable flag, encoded into direction field. */ 4763 cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK; 4764 4765 /* Set encryption tweak values based on logical block address 4766 * If block size is 512, tweak value is LBA. 4767 * For other block sizes, tweak is (LBA * block size)/ 512) 4768 */ 4769 switch (cmd->cmnd[0]) { 4770 /* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */ 4771 case READ_6: 4772 case WRITE_6: 4773 first_block = (((cmd->cmnd[1] & 0x1F) << 16) | 4774 (cmd->cmnd[2] << 8) | 4775 cmd->cmnd[3]); 4776 break; 4777 case WRITE_10: 4778 case READ_10: 4779 /* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */ 4780 case WRITE_12: 4781 case READ_12: 4782 first_block = get_unaligned_be32(&cmd->cmnd[2]); 4783 break; 4784 case WRITE_16: 4785 case READ_16: 4786 first_block = get_unaligned_be64(&cmd->cmnd[2]); 4787 break; 4788 default: 4789 dev_err(&h->pdev->dev, 4790 "ERROR: %s: size (0x%x) not supported for encryption\n", 4791 __func__, cmd->cmnd[0]); 4792 BUG(); 4793 break; 4794 } 4795 4796 if (le32_to_cpu(map->volume_blk_size) != 512) 4797 first_block = first_block * 4798 le32_to_cpu(map->volume_blk_size)/512; 4799 4800 cp->tweak_lower = cpu_to_le32(first_block); 4801 cp->tweak_upper = cpu_to_le32(first_block >> 32); 4802 } 4803 4804 static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h, 4805 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 4806 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4807 { 4808 struct scsi_cmnd *cmd = c->scsi_cmd; 4809 struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex]; 4810 struct ioaccel2_sg_element *curr_sg; 4811 int use_sg, i; 4812 struct scatterlist *sg; 4813 u64 addr64; 4814 u32 len; 4815 u32 total_len = 0; 4816 4817 if (!cmd->device) 4818 return -1; 4819 4820 if (!cmd->device->hostdata) 4821 return -1; 4822 4823 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 4824 4825 if (fixup_ioaccel_cdb(cdb, &cdb_len)) { 4826 atomic_dec(&phys_disk->ioaccel_cmds_out); 4827 return IO_ACCEL_INELIGIBLE; 4828 } 4829 4830 c->cmd_type = CMD_IOACCEL2; 4831 /* Adjust the DMA address to point to the accelerated command buffer */ 4832 c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle + 4833 (c->cmdindex * sizeof(*cp)); 4834 BUG_ON(c->busaddr & 0x0000007F); 4835 4836 memset(cp, 0, sizeof(*cp)); 4837 cp->IU_type = IOACCEL2_IU_TYPE; 4838 4839 use_sg = scsi_dma_map(cmd); 4840 if (use_sg < 0) { 4841 atomic_dec(&phys_disk->ioaccel_cmds_out); 4842 return use_sg; 4843 } 4844 4845 if (use_sg) { 4846 curr_sg = cp->sg; 4847 if (use_sg > h->ioaccel_maxsg) { 4848 addr64 = le64_to_cpu( 4849 h->ioaccel2_cmd_sg_list[c->cmdindex]->address); 4850 curr_sg->address = cpu_to_le64(addr64); 4851 curr_sg->length = 0; 4852 curr_sg->reserved[0] = 0; 4853 curr_sg->reserved[1] = 0; 4854 curr_sg->reserved[2] = 0; 4855 curr_sg->chain_indicator = 0x80; 4856 4857 curr_sg = h->ioaccel2_cmd_sg_list[c->cmdindex]; 4858 } 4859 scsi_for_each_sg(cmd, sg, use_sg, i) { 4860 addr64 = (u64) sg_dma_address(sg); 4861 len = sg_dma_len(sg); 4862 total_len += len; 4863 curr_sg->address = cpu_to_le64(addr64); 4864 curr_sg->length = cpu_to_le32(len); 4865 curr_sg->reserved[0] = 0; 4866 curr_sg->reserved[1] = 0; 4867 curr_sg->reserved[2] = 0; 4868 curr_sg->chain_indicator = 0; 4869 curr_sg++; 4870 } 4871 4872 switch (cmd->sc_data_direction) { 4873 case DMA_TO_DEVICE: 4874 cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4875 cp->direction |= IOACCEL2_DIR_DATA_OUT; 4876 break; 4877 case DMA_FROM_DEVICE: 4878 cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4879 cp->direction |= IOACCEL2_DIR_DATA_IN; 4880 break; 4881 case DMA_NONE: 4882 cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4883 cp->direction |= IOACCEL2_DIR_NO_DATA; 4884 break; 4885 default: 4886 dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4887 cmd->sc_data_direction); 4888 BUG(); 4889 break; 4890 } 4891 } else { 4892 cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4893 cp->direction |= IOACCEL2_DIR_NO_DATA; 4894 } 4895 4896 /* Set encryption parameters, if necessary */ 4897 set_encrypt_ioaccel2(h, c, cp); 4898 4899 cp->scsi_nexus = cpu_to_le32(ioaccel_handle); 4900 cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT); 4901 memcpy(cp->cdb, cdb, sizeof(cp->cdb)); 4902 4903 cp->data_len = cpu_to_le32(total_len); 4904 cp->err_ptr = cpu_to_le64(c->busaddr + 4905 offsetof(struct io_accel2_cmd, error_data)); 4906 cp->err_len = cpu_to_le32(sizeof(cp->error_data)); 4907 4908 /* fill in sg elements */ 4909 if (use_sg > h->ioaccel_maxsg) { 4910 cp->sg_count = 1; 4911 cp->sg[0].length = cpu_to_le32(use_sg * sizeof(cp->sg[0])); 4912 if (hpsa_map_ioaccel2_sg_chain_block(h, cp, c)) { 4913 atomic_dec(&phys_disk->ioaccel_cmds_out); 4914 scsi_dma_unmap(cmd); 4915 return -1; 4916 } 4917 } else 4918 cp->sg_count = (u8) use_sg; 4919 4920 enqueue_cmd_and_start_io(h, c); 4921 return 0; 4922 } 4923 4924 /* 4925 * Queue a command to the correct I/O accelerator path. 4926 */ 4927 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h, 4928 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 4929 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4930 { 4931 if (!c->scsi_cmd->device) 4932 return -1; 4933 4934 if (!c->scsi_cmd->device->hostdata) 4935 return -1; 4936 4937 /* Try to honor the device's queue depth */ 4938 if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) > 4939 phys_disk->queue_depth) { 4940 atomic_dec(&phys_disk->ioaccel_cmds_out); 4941 return IO_ACCEL_INELIGIBLE; 4942 } 4943 if (h->transMethod & CFGTBL_Trans_io_accel1) 4944 return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle, 4945 cdb, cdb_len, scsi3addr, 4946 phys_disk); 4947 else 4948 return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle, 4949 cdb, cdb_len, scsi3addr, 4950 phys_disk); 4951 } 4952 4953 static void raid_map_helper(struct raid_map_data *map, 4954 int offload_to_mirror, u32 *map_index, u32 *current_group) 4955 { 4956 if (offload_to_mirror == 0) { 4957 /* use physical disk in the first mirrored group. */ 4958 *map_index %= le16_to_cpu(map->data_disks_per_row); 4959 return; 4960 } 4961 do { 4962 /* determine mirror group that *map_index indicates */ 4963 *current_group = *map_index / 4964 le16_to_cpu(map->data_disks_per_row); 4965 if (offload_to_mirror == *current_group) 4966 continue; 4967 if (*current_group < le16_to_cpu(map->layout_map_count) - 1) { 4968 /* select map index from next group */ 4969 *map_index += le16_to_cpu(map->data_disks_per_row); 4970 (*current_group)++; 4971 } else { 4972 /* select map index from first group */ 4973 *map_index %= le16_to_cpu(map->data_disks_per_row); 4974 *current_group = 0; 4975 } 4976 } while (offload_to_mirror != *current_group); 4977 } 4978 4979 /* 4980 * Attempt to perform offload RAID mapping for a logical volume I/O. 4981 */ 4982 static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h, 4983 struct CommandList *c) 4984 { 4985 struct scsi_cmnd *cmd = c->scsi_cmd; 4986 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4987 struct raid_map_data *map = &dev->raid_map; 4988 struct raid_map_disk_data *dd = &map->data[0]; 4989 int is_write = 0; 4990 u32 map_index; 4991 u64 first_block, last_block; 4992 u32 block_cnt; 4993 u32 blocks_per_row; 4994 u64 first_row, last_row; 4995 u32 first_row_offset, last_row_offset; 4996 u32 first_column, last_column; 4997 u64 r0_first_row, r0_last_row; 4998 u32 r5or6_blocks_per_row; 4999 u64 r5or6_first_row, r5or6_last_row; 5000 u32 r5or6_first_row_offset, r5or6_last_row_offset; 5001 u32 r5or6_first_column, r5or6_last_column; 5002 u32 total_disks_per_row; 5003 u32 stripesize; 5004 u32 first_group, last_group, current_group; 5005 u32 map_row; 5006 u32 disk_handle; 5007 u64 disk_block; 5008 u32 disk_block_cnt; 5009 u8 cdb[16]; 5010 u8 cdb_len; 5011 u16 strip_size; 5012 #if BITS_PER_LONG == 32 5013 u64 tmpdiv; 5014 #endif 5015 int offload_to_mirror; 5016 5017 if (!dev) 5018 return -1; 5019 5020 /* check for valid opcode, get LBA and block count */ 5021 switch (cmd->cmnd[0]) { 5022 case WRITE_6: 5023 is_write = 1; 5024 case READ_6: 5025 first_block = (((cmd->cmnd[1] & 0x1F) << 16) | 5026 (cmd->cmnd[2] << 8) | 5027 cmd->cmnd[3]); 5028 block_cnt = cmd->cmnd[4]; 5029 if (block_cnt == 0) 5030 block_cnt = 256; 5031 break; 5032 case WRITE_10: 5033 is_write = 1; 5034 case READ_10: 5035 first_block = 5036 (((u64) cmd->cmnd[2]) << 24) | 5037 (((u64) cmd->cmnd[3]) << 16) | 5038 (((u64) cmd->cmnd[4]) << 8) | 5039 cmd->cmnd[5]; 5040 block_cnt = 5041 (((u32) cmd->cmnd[7]) << 8) | 5042 cmd->cmnd[8]; 5043 break; 5044 case WRITE_12: 5045 is_write = 1; 5046 case READ_12: 5047 first_block = 5048 (((u64) cmd->cmnd[2]) << 24) | 5049 (((u64) cmd->cmnd[3]) << 16) | 5050 (((u64) cmd->cmnd[4]) << 8) | 5051 cmd->cmnd[5]; 5052 block_cnt = 5053 (((u32) cmd->cmnd[6]) << 24) | 5054 (((u32) cmd->cmnd[7]) << 16) | 5055 (((u32) cmd->cmnd[8]) << 8) | 5056 cmd->cmnd[9]; 5057 break; 5058 case WRITE_16: 5059 is_write = 1; 5060 case READ_16: 5061 first_block = 5062 (((u64) cmd->cmnd[2]) << 56) | 5063 (((u64) cmd->cmnd[3]) << 48) | 5064 (((u64) cmd->cmnd[4]) << 40) | 5065 (((u64) cmd->cmnd[5]) << 32) | 5066 (((u64) cmd->cmnd[6]) << 24) | 5067 (((u64) cmd->cmnd[7]) << 16) | 5068 (((u64) cmd->cmnd[8]) << 8) | 5069 cmd->cmnd[9]; 5070 block_cnt = 5071 (((u32) cmd->cmnd[10]) << 24) | 5072 (((u32) cmd->cmnd[11]) << 16) | 5073 (((u32) cmd->cmnd[12]) << 8) | 5074 cmd->cmnd[13]; 5075 break; 5076 default: 5077 return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */ 5078 } 5079 last_block = first_block + block_cnt - 1; 5080 5081 /* check for write to non-RAID-0 */ 5082 if (is_write && dev->raid_level != 0) 5083 return IO_ACCEL_INELIGIBLE; 5084 5085 /* check for invalid block or wraparound */ 5086 if (last_block >= le64_to_cpu(map->volume_blk_cnt) || 5087 last_block < first_block) 5088 return IO_ACCEL_INELIGIBLE; 5089 5090 /* calculate stripe information for the request */ 5091 blocks_per_row = le16_to_cpu(map->data_disks_per_row) * 5092 le16_to_cpu(map->strip_size); 5093 strip_size = le16_to_cpu(map->strip_size); 5094 #if BITS_PER_LONG == 32 5095 tmpdiv = first_block; 5096 (void) do_div(tmpdiv, blocks_per_row); 5097 first_row = tmpdiv; 5098 tmpdiv = last_block; 5099 (void) do_div(tmpdiv, blocks_per_row); 5100 last_row = tmpdiv; 5101 first_row_offset = (u32) (first_block - (first_row * blocks_per_row)); 5102 last_row_offset = (u32) (last_block - (last_row * blocks_per_row)); 5103 tmpdiv = first_row_offset; 5104 (void) do_div(tmpdiv, strip_size); 5105 first_column = tmpdiv; 5106 tmpdiv = last_row_offset; 5107 (void) do_div(tmpdiv, strip_size); 5108 last_column = tmpdiv; 5109 #else 5110 first_row = first_block / blocks_per_row; 5111 last_row = last_block / blocks_per_row; 5112 first_row_offset = (u32) (first_block - (first_row * blocks_per_row)); 5113 last_row_offset = (u32) (last_block - (last_row * blocks_per_row)); 5114 first_column = first_row_offset / strip_size; 5115 last_column = last_row_offset / strip_size; 5116 #endif 5117 5118 /* if this isn't a single row/column then give to the controller */ 5119 if ((first_row != last_row) || (first_column != last_column)) 5120 return IO_ACCEL_INELIGIBLE; 5121 5122 /* proceeding with driver mapping */ 5123 total_disks_per_row = le16_to_cpu(map->data_disks_per_row) + 5124 le16_to_cpu(map->metadata_disks_per_row); 5125 map_row = ((u32)(first_row >> map->parity_rotation_shift)) % 5126 le16_to_cpu(map->row_cnt); 5127 map_index = (map_row * total_disks_per_row) + first_column; 5128 5129 switch (dev->raid_level) { 5130 case HPSA_RAID_0: 5131 break; /* nothing special to do */ 5132 case HPSA_RAID_1: 5133 /* Handles load balance across RAID 1 members. 5134 * (2-drive R1 and R10 with even # of drives.) 5135 * Appropriate for SSDs, not optimal for HDDs 5136 */ 5137 BUG_ON(le16_to_cpu(map->layout_map_count) != 2); 5138 if (dev->offload_to_mirror) 5139 map_index += le16_to_cpu(map->data_disks_per_row); 5140 dev->offload_to_mirror = !dev->offload_to_mirror; 5141 break; 5142 case HPSA_RAID_ADM: 5143 /* Handles N-way mirrors (R1-ADM) 5144 * and R10 with # of drives divisible by 3.) 5145 */ 5146 BUG_ON(le16_to_cpu(map->layout_map_count) != 3); 5147 5148 offload_to_mirror = dev->offload_to_mirror; 5149 raid_map_helper(map, offload_to_mirror, 5150 &map_index, ¤t_group); 5151 /* set mirror group to use next time */ 5152 offload_to_mirror = 5153 (offload_to_mirror >= 5154 le16_to_cpu(map->layout_map_count) - 1) 5155 ? 0 : offload_to_mirror + 1; 5156 dev->offload_to_mirror = offload_to_mirror; 5157 /* Avoid direct use of dev->offload_to_mirror within this 5158 * function since multiple threads might simultaneously 5159 * increment it beyond the range of dev->layout_map_count -1. 5160 */ 5161 break; 5162 case HPSA_RAID_5: 5163 case HPSA_RAID_6: 5164 if (le16_to_cpu(map->layout_map_count) <= 1) 5165 break; 5166 5167 /* Verify first and last block are in same RAID group */ 5168 r5or6_blocks_per_row = 5169 le16_to_cpu(map->strip_size) * 5170 le16_to_cpu(map->data_disks_per_row); 5171 BUG_ON(r5or6_blocks_per_row == 0); 5172 stripesize = r5or6_blocks_per_row * 5173 le16_to_cpu(map->layout_map_count); 5174 #if BITS_PER_LONG == 32 5175 tmpdiv = first_block; 5176 first_group = do_div(tmpdiv, stripesize); 5177 tmpdiv = first_group; 5178 (void) do_div(tmpdiv, r5or6_blocks_per_row); 5179 first_group = tmpdiv; 5180 tmpdiv = last_block; 5181 last_group = do_div(tmpdiv, stripesize); 5182 tmpdiv = last_group; 5183 (void) do_div(tmpdiv, r5or6_blocks_per_row); 5184 last_group = tmpdiv; 5185 #else 5186 first_group = (first_block % stripesize) / r5or6_blocks_per_row; 5187 last_group = (last_block % stripesize) / r5or6_blocks_per_row; 5188 #endif 5189 if (first_group != last_group) 5190 return IO_ACCEL_INELIGIBLE; 5191 5192 /* Verify request is in a single row of RAID 5/6 */ 5193 #if BITS_PER_LONG == 32 5194 tmpdiv = first_block; 5195 (void) do_div(tmpdiv, stripesize); 5196 first_row = r5or6_first_row = r0_first_row = tmpdiv; 5197 tmpdiv = last_block; 5198 (void) do_div(tmpdiv, stripesize); 5199 r5or6_last_row = r0_last_row = tmpdiv; 5200 #else 5201 first_row = r5or6_first_row = r0_first_row = 5202 first_block / stripesize; 5203 r5or6_last_row = r0_last_row = last_block / stripesize; 5204 #endif 5205 if (r5or6_first_row != r5or6_last_row) 5206 return IO_ACCEL_INELIGIBLE; 5207 5208 5209 /* Verify request is in a single column */ 5210 #if BITS_PER_LONG == 32 5211 tmpdiv = first_block; 5212 first_row_offset = do_div(tmpdiv, stripesize); 5213 tmpdiv = first_row_offset; 5214 first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row); 5215 r5or6_first_row_offset = first_row_offset; 5216 tmpdiv = last_block; 5217 r5or6_last_row_offset = do_div(tmpdiv, stripesize); 5218 tmpdiv = r5or6_last_row_offset; 5219 r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row); 5220 tmpdiv = r5or6_first_row_offset; 5221 (void) do_div(tmpdiv, map->strip_size); 5222 first_column = r5or6_first_column = tmpdiv; 5223 tmpdiv = r5or6_last_row_offset; 5224 (void) do_div(tmpdiv, map->strip_size); 5225 r5or6_last_column = tmpdiv; 5226 #else 5227 first_row_offset = r5or6_first_row_offset = 5228 (u32)((first_block % stripesize) % 5229 r5or6_blocks_per_row); 5230 5231 r5or6_last_row_offset = 5232 (u32)((last_block % stripesize) % 5233 r5or6_blocks_per_row); 5234 5235 first_column = r5or6_first_column = 5236 r5or6_first_row_offset / le16_to_cpu(map->strip_size); 5237 r5or6_last_column = 5238 r5or6_last_row_offset / le16_to_cpu(map->strip_size); 5239 #endif 5240 if (r5or6_first_column != r5or6_last_column) 5241 return IO_ACCEL_INELIGIBLE; 5242 5243 /* Request is eligible */ 5244 map_row = ((u32)(first_row >> map->parity_rotation_shift)) % 5245 le16_to_cpu(map->row_cnt); 5246 5247 map_index = (first_group * 5248 (le16_to_cpu(map->row_cnt) * total_disks_per_row)) + 5249 (map_row * total_disks_per_row) + first_column; 5250 break; 5251 default: 5252 return IO_ACCEL_INELIGIBLE; 5253 } 5254 5255 if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES)) 5256 return IO_ACCEL_INELIGIBLE; 5257 5258 c->phys_disk = dev->phys_disk[map_index]; 5259 if (!c->phys_disk) 5260 return IO_ACCEL_INELIGIBLE; 5261 5262 disk_handle = dd[map_index].ioaccel_handle; 5263 disk_block = le64_to_cpu(map->disk_starting_blk) + 5264 first_row * le16_to_cpu(map->strip_size) + 5265 (first_row_offset - first_column * 5266 le16_to_cpu(map->strip_size)); 5267 disk_block_cnt = block_cnt; 5268 5269 /* handle differing logical/physical block sizes */ 5270 if (map->phys_blk_shift) { 5271 disk_block <<= map->phys_blk_shift; 5272 disk_block_cnt <<= map->phys_blk_shift; 5273 } 5274 BUG_ON(disk_block_cnt > 0xffff); 5275 5276 /* build the new CDB for the physical disk I/O */ 5277 if (disk_block > 0xffffffff) { 5278 cdb[0] = is_write ? WRITE_16 : READ_16; 5279 cdb[1] = 0; 5280 cdb[2] = (u8) (disk_block >> 56); 5281 cdb[3] = (u8) (disk_block >> 48); 5282 cdb[4] = (u8) (disk_block >> 40); 5283 cdb[5] = (u8) (disk_block >> 32); 5284 cdb[6] = (u8) (disk_block >> 24); 5285 cdb[7] = (u8) (disk_block >> 16); 5286 cdb[8] = (u8) (disk_block >> 8); 5287 cdb[9] = (u8) (disk_block); 5288 cdb[10] = (u8) (disk_block_cnt >> 24); 5289 cdb[11] = (u8) (disk_block_cnt >> 16); 5290 cdb[12] = (u8) (disk_block_cnt >> 8); 5291 cdb[13] = (u8) (disk_block_cnt); 5292 cdb[14] = 0; 5293 cdb[15] = 0; 5294 cdb_len = 16; 5295 } else { 5296 cdb[0] = is_write ? WRITE_10 : READ_10; 5297 cdb[1] = 0; 5298 cdb[2] = (u8) (disk_block >> 24); 5299 cdb[3] = (u8) (disk_block >> 16); 5300 cdb[4] = (u8) (disk_block >> 8); 5301 cdb[5] = (u8) (disk_block); 5302 cdb[6] = 0; 5303 cdb[7] = (u8) (disk_block_cnt >> 8); 5304 cdb[8] = (u8) (disk_block_cnt); 5305 cdb[9] = 0; 5306 cdb_len = 10; 5307 } 5308 return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len, 5309 dev->scsi3addr, 5310 dev->phys_disk[map_index]); 5311 } 5312 5313 /* 5314 * Submit commands down the "normal" RAID stack path 5315 * All callers to hpsa_ciss_submit must check lockup_detected 5316 * beforehand, before (opt.) and after calling cmd_alloc 5317 */ 5318 static int hpsa_ciss_submit(struct ctlr_info *h, 5319 struct CommandList *c, struct scsi_cmnd *cmd, 5320 unsigned char scsi3addr[]) 5321 { 5322 cmd->host_scribble = (unsigned char *) c; 5323 c->cmd_type = CMD_SCSI; 5324 c->scsi_cmd = cmd; 5325 c->Header.ReplyQueue = 0; /* unused in simple mode */ 5326 memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8); 5327 c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT)); 5328 5329 /* Fill in the request block... */ 5330 5331 c->Request.Timeout = 0; 5332 BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB)); 5333 c->Request.CDBLen = cmd->cmd_len; 5334 memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len); 5335 switch (cmd->sc_data_direction) { 5336 case DMA_TO_DEVICE: 5337 c->Request.type_attr_dir = 5338 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE); 5339 break; 5340 case DMA_FROM_DEVICE: 5341 c->Request.type_attr_dir = 5342 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ); 5343 break; 5344 case DMA_NONE: 5345 c->Request.type_attr_dir = 5346 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE); 5347 break; 5348 case DMA_BIDIRECTIONAL: 5349 /* This can happen if a buggy application does a scsi passthru 5350 * and sets both inlen and outlen to non-zero. ( see 5351 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() ) 5352 */ 5353 5354 c->Request.type_attr_dir = 5355 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD); 5356 /* This is technically wrong, and hpsa controllers should 5357 * reject it with CMD_INVALID, which is the most correct 5358 * response, but non-fibre backends appear to let it 5359 * slide by, and give the same results as if this field 5360 * were set correctly. Either way is acceptable for 5361 * our purposes here. 5362 */ 5363 5364 break; 5365 5366 default: 5367 dev_err(&h->pdev->dev, "unknown data direction: %d\n", 5368 cmd->sc_data_direction); 5369 BUG(); 5370 break; 5371 } 5372 5373 if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */ 5374 hpsa_cmd_resolve_and_free(h, c); 5375 return SCSI_MLQUEUE_HOST_BUSY; 5376 } 5377 enqueue_cmd_and_start_io(h, c); 5378 /* the cmd'll come back via intr handler in complete_scsi_command() */ 5379 return 0; 5380 } 5381 5382 static void hpsa_cmd_init(struct ctlr_info *h, int index, 5383 struct CommandList *c) 5384 { 5385 dma_addr_t cmd_dma_handle, err_dma_handle; 5386 5387 /* Zero out all of commandlist except the last field, refcount */ 5388 memset(c, 0, offsetof(struct CommandList, refcount)); 5389 c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT)); 5390 cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c); 5391 c->err_info = h->errinfo_pool + index; 5392 memset(c->err_info, 0, sizeof(*c->err_info)); 5393 err_dma_handle = h->errinfo_pool_dhandle 5394 + index * sizeof(*c->err_info); 5395 c->cmdindex = index; 5396 c->busaddr = (u32) cmd_dma_handle; 5397 c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle); 5398 c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info)); 5399 c->h = h; 5400 c->scsi_cmd = SCSI_CMD_IDLE; 5401 } 5402 5403 static void hpsa_preinitialize_commands(struct ctlr_info *h) 5404 { 5405 int i; 5406 5407 for (i = 0; i < h->nr_cmds; i++) { 5408 struct CommandList *c = h->cmd_pool + i; 5409 5410 hpsa_cmd_init(h, i, c); 5411 atomic_set(&c->refcount, 0); 5412 } 5413 } 5414 5415 static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index, 5416 struct CommandList *c) 5417 { 5418 dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c); 5419 5420 BUG_ON(c->cmdindex != index); 5421 5422 memset(c->Request.CDB, 0, sizeof(c->Request.CDB)); 5423 memset(c->err_info, 0, sizeof(*c->err_info)); 5424 c->busaddr = (u32) cmd_dma_handle; 5425 } 5426 5427 static int hpsa_ioaccel_submit(struct ctlr_info *h, 5428 struct CommandList *c, struct scsi_cmnd *cmd, 5429 unsigned char *scsi3addr) 5430 { 5431 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 5432 int rc = IO_ACCEL_INELIGIBLE; 5433 5434 if (!dev) 5435 return SCSI_MLQUEUE_HOST_BUSY; 5436 5437 cmd->host_scribble = (unsigned char *) c; 5438 5439 if (dev->offload_enabled) { 5440 hpsa_cmd_init(h, c->cmdindex, c); 5441 c->cmd_type = CMD_SCSI; 5442 c->scsi_cmd = cmd; 5443 rc = hpsa_scsi_ioaccel_raid_map(h, c); 5444 if (rc < 0) /* scsi_dma_map failed. */ 5445 rc = SCSI_MLQUEUE_HOST_BUSY; 5446 } else if (dev->hba_ioaccel_enabled) { 5447 hpsa_cmd_init(h, c->cmdindex, c); 5448 c->cmd_type = CMD_SCSI; 5449 c->scsi_cmd = cmd; 5450 rc = hpsa_scsi_ioaccel_direct_map(h, c); 5451 if (rc < 0) /* scsi_dma_map failed. */ 5452 rc = SCSI_MLQUEUE_HOST_BUSY; 5453 } 5454 return rc; 5455 } 5456 5457 static void hpsa_command_resubmit_worker(struct work_struct *work) 5458 { 5459 struct scsi_cmnd *cmd; 5460 struct hpsa_scsi_dev_t *dev; 5461 struct CommandList *c = container_of(work, struct CommandList, work); 5462 5463 cmd = c->scsi_cmd; 5464 dev = cmd->device->hostdata; 5465 if (!dev) { 5466 cmd->result = DID_NO_CONNECT << 16; 5467 return hpsa_cmd_free_and_done(c->h, c, cmd); 5468 } 5469 if (c->reset_pending) 5470 return hpsa_cmd_free_and_done(c->h, c, cmd); 5471 if (c->abort_pending) 5472 return hpsa_cmd_abort_and_free(c->h, c, cmd); 5473 if (c->cmd_type == CMD_IOACCEL2) { 5474 struct ctlr_info *h = c->h; 5475 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 5476 int rc; 5477 5478 if (c2->error_data.serv_response == 5479 IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL) { 5480 rc = hpsa_ioaccel_submit(h, c, cmd, dev->scsi3addr); 5481 if (rc == 0) 5482 return; 5483 if (rc == SCSI_MLQUEUE_HOST_BUSY) { 5484 /* 5485 * If we get here, it means dma mapping failed. 5486 * Try again via scsi mid layer, which will 5487 * then get SCSI_MLQUEUE_HOST_BUSY. 5488 */ 5489 cmd->result = DID_IMM_RETRY << 16; 5490 return hpsa_cmd_free_and_done(h, c, cmd); 5491 } 5492 /* else, fall thru and resubmit down CISS path */ 5493 } 5494 } 5495 hpsa_cmd_partial_init(c->h, c->cmdindex, c); 5496 if (hpsa_ciss_submit(c->h, c, cmd, dev->scsi3addr)) { 5497 /* 5498 * If we get here, it means dma mapping failed. Try 5499 * again via scsi mid layer, which will then get 5500 * SCSI_MLQUEUE_HOST_BUSY. 5501 * 5502 * hpsa_ciss_submit will have already freed c 5503 * if it encountered a dma mapping failure. 5504 */ 5505 cmd->result = DID_IMM_RETRY << 16; 5506 cmd->scsi_done(cmd); 5507 } 5508 } 5509 5510 /* Running in struct Scsi_Host->host_lock less mode */ 5511 static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd) 5512 { 5513 struct ctlr_info *h; 5514 struct hpsa_scsi_dev_t *dev; 5515 unsigned char scsi3addr[8]; 5516 struct CommandList *c; 5517 int rc = 0; 5518 5519 /* Get the ptr to our adapter structure out of cmd->host. */ 5520 h = sdev_to_hba(cmd->device); 5521 5522 BUG_ON(cmd->request->tag < 0); 5523 5524 dev = cmd->device->hostdata; 5525 if (!dev) { 5526 cmd->result = DID_NO_CONNECT << 16; 5527 cmd->scsi_done(cmd); 5528 return 0; 5529 } 5530 5531 if (dev->removed) { 5532 cmd->result = DID_NO_CONNECT << 16; 5533 cmd->scsi_done(cmd); 5534 return 0; 5535 } 5536 5537 memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr)); 5538 5539 if (unlikely(lockup_detected(h))) { 5540 cmd->result = DID_NO_CONNECT << 16; 5541 cmd->scsi_done(cmd); 5542 return 0; 5543 } 5544 c = cmd_tagged_alloc(h, cmd); 5545 5546 /* 5547 * Call alternate submit routine for I/O accelerated commands. 5548 * Retries always go down the normal I/O path. 5549 */ 5550 if (likely(cmd->retries == 0 && 5551 !blk_rq_is_passthrough(cmd->request) && 5552 h->acciopath_status)) { 5553 rc = hpsa_ioaccel_submit(h, c, cmd, scsi3addr); 5554 if (rc == 0) 5555 return 0; 5556 if (rc == SCSI_MLQUEUE_HOST_BUSY) { 5557 hpsa_cmd_resolve_and_free(h, c); 5558 return SCSI_MLQUEUE_HOST_BUSY; 5559 } 5560 } 5561 return hpsa_ciss_submit(h, c, cmd, scsi3addr); 5562 } 5563 5564 static void hpsa_scan_complete(struct ctlr_info *h) 5565 { 5566 unsigned long flags; 5567 5568 spin_lock_irqsave(&h->scan_lock, flags); 5569 h->scan_finished = 1; 5570 wake_up(&h->scan_wait_queue); 5571 spin_unlock_irqrestore(&h->scan_lock, flags); 5572 } 5573 5574 static void hpsa_scan_start(struct Scsi_Host *sh) 5575 { 5576 struct ctlr_info *h = shost_to_hba(sh); 5577 unsigned long flags; 5578 5579 /* 5580 * Don't let rescans be initiated on a controller known to be locked 5581 * up. If the controller locks up *during* a rescan, that thread is 5582 * probably hosed, but at least we can prevent new rescan threads from 5583 * piling up on a locked up controller. 5584 */ 5585 if (unlikely(lockup_detected(h))) 5586 return hpsa_scan_complete(h); 5587 5588 /* 5589 * If a scan is already waiting to run, no need to add another 5590 */ 5591 spin_lock_irqsave(&h->scan_lock, flags); 5592 if (h->scan_waiting) { 5593 spin_unlock_irqrestore(&h->scan_lock, flags); 5594 return; 5595 } 5596 5597 spin_unlock_irqrestore(&h->scan_lock, flags); 5598 5599 /* wait until any scan already in progress is finished. */ 5600 while (1) { 5601 spin_lock_irqsave(&h->scan_lock, flags); 5602 if (h->scan_finished) 5603 break; 5604 h->scan_waiting = 1; 5605 spin_unlock_irqrestore(&h->scan_lock, flags); 5606 wait_event(h->scan_wait_queue, h->scan_finished); 5607 /* Note: We don't need to worry about a race between this 5608 * thread and driver unload because the midlayer will 5609 * have incremented the reference count, so unload won't 5610 * happen if we're in here. 5611 */ 5612 } 5613 h->scan_finished = 0; /* mark scan as in progress */ 5614 h->scan_waiting = 0; 5615 spin_unlock_irqrestore(&h->scan_lock, flags); 5616 5617 if (unlikely(lockup_detected(h))) 5618 return hpsa_scan_complete(h); 5619 5620 /* 5621 * Do the scan after a reset completion 5622 */ 5623 spin_lock_irqsave(&h->reset_lock, flags); 5624 if (h->reset_in_progress) { 5625 h->drv_req_rescan = 1; 5626 spin_unlock_irqrestore(&h->reset_lock, flags); 5627 hpsa_scan_complete(h); 5628 return; 5629 } 5630 spin_unlock_irqrestore(&h->reset_lock, flags); 5631 5632 hpsa_update_scsi_devices(h); 5633 5634 hpsa_scan_complete(h); 5635 } 5636 5637 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth) 5638 { 5639 struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata; 5640 5641 if (!logical_drive) 5642 return -ENODEV; 5643 5644 if (qdepth < 1) 5645 qdepth = 1; 5646 else if (qdepth > logical_drive->queue_depth) 5647 qdepth = logical_drive->queue_depth; 5648 5649 return scsi_change_queue_depth(sdev, qdepth); 5650 } 5651 5652 static int hpsa_scan_finished(struct Scsi_Host *sh, 5653 unsigned long elapsed_time) 5654 { 5655 struct ctlr_info *h = shost_to_hba(sh); 5656 unsigned long flags; 5657 int finished; 5658 5659 spin_lock_irqsave(&h->scan_lock, flags); 5660 finished = h->scan_finished; 5661 spin_unlock_irqrestore(&h->scan_lock, flags); 5662 return finished; 5663 } 5664 5665 static int hpsa_scsi_host_alloc(struct ctlr_info *h) 5666 { 5667 struct Scsi_Host *sh; 5668 5669 sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h)); 5670 if (sh == NULL) { 5671 dev_err(&h->pdev->dev, "scsi_host_alloc failed\n"); 5672 return -ENOMEM; 5673 } 5674 5675 sh->io_port = 0; 5676 sh->n_io_port = 0; 5677 sh->this_id = -1; 5678 sh->max_channel = 3; 5679 sh->max_cmd_len = MAX_COMMAND_SIZE; 5680 sh->max_lun = HPSA_MAX_LUN; 5681 sh->max_id = HPSA_MAX_LUN; 5682 sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS; 5683 sh->cmd_per_lun = sh->can_queue; 5684 sh->sg_tablesize = h->maxsgentries; 5685 sh->transportt = hpsa_sas_transport_template; 5686 sh->hostdata[0] = (unsigned long) h; 5687 sh->irq = pci_irq_vector(h->pdev, 0); 5688 sh->unique_id = sh->irq; 5689 5690 h->scsi_host = sh; 5691 return 0; 5692 } 5693 5694 static int hpsa_scsi_add_host(struct ctlr_info *h) 5695 { 5696 int rv; 5697 5698 rv = scsi_add_host(h->scsi_host, &h->pdev->dev); 5699 if (rv) { 5700 dev_err(&h->pdev->dev, "scsi_add_host failed\n"); 5701 return rv; 5702 } 5703 scsi_scan_host(h->scsi_host); 5704 return 0; 5705 } 5706 5707 /* 5708 * The block layer has already gone to the trouble of picking out a unique, 5709 * small-integer tag for this request. We use an offset from that value as 5710 * an index to select our command block. (The offset allows us to reserve the 5711 * low-numbered entries for our own uses.) 5712 */ 5713 static int hpsa_get_cmd_index(struct scsi_cmnd *scmd) 5714 { 5715 int idx = scmd->request->tag; 5716 5717 if (idx < 0) 5718 return idx; 5719 5720 /* Offset to leave space for internal cmds. */ 5721 return idx += HPSA_NRESERVED_CMDS; 5722 } 5723 5724 /* 5725 * Send a TEST_UNIT_READY command to the specified LUN using the specified 5726 * reply queue; returns zero if the unit is ready, and non-zero otherwise. 5727 */ 5728 static int hpsa_send_test_unit_ready(struct ctlr_info *h, 5729 struct CommandList *c, unsigned char lunaddr[], 5730 int reply_queue) 5731 { 5732 int rc; 5733 5734 /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */ 5735 (void) fill_cmd(c, TEST_UNIT_READY, h, 5736 NULL, 0, 0, lunaddr, TYPE_CMD); 5737 rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 5738 if (rc) 5739 return rc; 5740 /* no unmap needed here because no data xfer. */ 5741 5742 /* Check if the unit is already ready. */ 5743 if (c->err_info->CommandStatus == CMD_SUCCESS) 5744 return 0; 5745 5746 /* 5747 * The first command sent after reset will receive "unit attention" to 5748 * indicate that the LUN has been reset...this is actually what we're 5749 * looking for (but, success is good too). 5750 */ 5751 if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 5752 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION && 5753 (c->err_info->SenseInfo[2] == NO_SENSE || 5754 c->err_info->SenseInfo[2] == UNIT_ATTENTION)) 5755 return 0; 5756 5757 return 1; 5758 } 5759 5760 /* 5761 * Wait for a TEST_UNIT_READY command to complete, retrying as necessary; 5762 * returns zero when the unit is ready, and non-zero when giving up. 5763 */ 5764 static int hpsa_wait_for_test_unit_ready(struct ctlr_info *h, 5765 struct CommandList *c, 5766 unsigned char lunaddr[], int reply_queue) 5767 { 5768 int rc; 5769 int count = 0; 5770 int waittime = 1; /* seconds */ 5771 5772 /* Send test unit ready until device ready, or give up. */ 5773 for (count = 0; count < HPSA_TUR_RETRY_LIMIT; count++) { 5774 5775 /* 5776 * Wait for a bit. do this first, because if we send 5777 * the TUR right away, the reset will just abort it. 5778 */ 5779 msleep(1000 * waittime); 5780 5781 rc = hpsa_send_test_unit_ready(h, c, lunaddr, reply_queue); 5782 if (!rc) 5783 break; 5784 5785 /* Increase wait time with each try, up to a point. */ 5786 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS) 5787 waittime *= 2; 5788 5789 dev_warn(&h->pdev->dev, 5790 "waiting %d secs for device to become ready.\n", 5791 waittime); 5792 } 5793 5794 return rc; 5795 } 5796 5797 static int wait_for_device_to_become_ready(struct ctlr_info *h, 5798 unsigned char lunaddr[], 5799 int reply_queue) 5800 { 5801 int first_queue; 5802 int last_queue; 5803 int rq; 5804 int rc = 0; 5805 struct CommandList *c; 5806 5807 c = cmd_alloc(h); 5808 5809 /* 5810 * If no specific reply queue was requested, then send the TUR 5811 * repeatedly, requesting a reply on each reply queue; otherwise execute 5812 * the loop exactly once using only the specified queue. 5813 */ 5814 if (reply_queue == DEFAULT_REPLY_QUEUE) { 5815 first_queue = 0; 5816 last_queue = h->nreply_queues - 1; 5817 } else { 5818 first_queue = reply_queue; 5819 last_queue = reply_queue; 5820 } 5821 5822 for (rq = first_queue; rq <= last_queue; rq++) { 5823 rc = hpsa_wait_for_test_unit_ready(h, c, lunaddr, rq); 5824 if (rc) 5825 break; 5826 } 5827 5828 if (rc) 5829 dev_warn(&h->pdev->dev, "giving up on device.\n"); 5830 else 5831 dev_warn(&h->pdev->dev, "device is ready.\n"); 5832 5833 cmd_free(h, c); 5834 return rc; 5835 } 5836 5837 /* Need at least one of these error handlers to keep ../scsi/hosts.c from 5838 * complaining. Doing a host- or bus-reset can't do anything good here. 5839 */ 5840 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd) 5841 { 5842 int rc = SUCCESS; 5843 struct ctlr_info *h; 5844 struct hpsa_scsi_dev_t *dev; 5845 u8 reset_type; 5846 char msg[48]; 5847 unsigned long flags; 5848 5849 /* find the controller to which the command to be aborted was sent */ 5850 h = sdev_to_hba(scsicmd->device); 5851 if (h == NULL) /* paranoia */ 5852 return FAILED; 5853 5854 spin_lock_irqsave(&h->reset_lock, flags); 5855 h->reset_in_progress = 1; 5856 spin_unlock_irqrestore(&h->reset_lock, flags); 5857 5858 if (lockup_detected(h)) { 5859 rc = FAILED; 5860 goto return_reset_status; 5861 } 5862 5863 dev = scsicmd->device->hostdata; 5864 if (!dev) { 5865 dev_err(&h->pdev->dev, "%s: device lookup failed\n", __func__); 5866 rc = FAILED; 5867 goto return_reset_status; 5868 } 5869 5870 if (dev->devtype == TYPE_ENCLOSURE) { 5871 rc = SUCCESS; 5872 goto return_reset_status; 5873 } 5874 5875 /* if controller locked up, we can guarantee command won't complete */ 5876 if (lockup_detected(h)) { 5877 snprintf(msg, sizeof(msg), 5878 "cmd %d RESET FAILED, lockup detected", 5879 hpsa_get_cmd_index(scsicmd)); 5880 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 5881 rc = FAILED; 5882 goto return_reset_status; 5883 } 5884 5885 /* this reset request might be the result of a lockup; check */ 5886 if (detect_controller_lockup(h)) { 5887 snprintf(msg, sizeof(msg), 5888 "cmd %d RESET FAILED, new lockup detected", 5889 hpsa_get_cmd_index(scsicmd)); 5890 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 5891 rc = FAILED; 5892 goto return_reset_status; 5893 } 5894 5895 /* Do not attempt on controller */ 5896 if (is_hba_lunid(dev->scsi3addr)) { 5897 rc = SUCCESS; 5898 goto return_reset_status; 5899 } 5900 5901 if (is_logical_dev_addr_mode(dev->scsi3addr)) 5902 reset_type = HPSA_DEVICE_RESET_MSG; 5903 else 5904 reset_type = HPSA_PHYS_TARGET_RESET; 5905 5906 sprintf(msg, "resetting %s", 5907 reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical "); 5908 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 5909 5910 /* send a reset to the SCSI LUN which the command was sent to */ 5911 rc = hpsa_do_reset(h, dev, dev->scsi3addr, reset_type, 5912 DEFAULT_REPLY_QUEUE); 5913 if (rc == 0) 5914 rc = SUCCESS; 5915 else 5916 rc = FAILED; 5917 5918 sprintf(msg, "reset %s %s", 5919 reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ", 5920 rc == SUCCESS ? "completed successfully" : "failed"); 5921 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 5922 5923 return_reset_status: 5924 spin_lock_irqsave(&h->reset_lock, flags); 5925 h->reset_in_progress = 0; 5926 spin_unlock_irqrestore(&h->reset_lock, flags); 5927 return rc; 5928 } 5929 5930 static void swizzle_abort_tag(u8 *tag) 5931 { 5932 u8 original_tag[8]; 5933 5934 memcpy(original_tag, tag, 8); 5935 tag[0] = original_tag[3]; 5936 tag[1] = original_tag[2]; 5937 tag[2] = original_tag[1]; 5938 tag[3] = original_tag[0]; 5939 tag[4] = original_tag[7]; 5940 tag[5] = original_tag[6]; 5941 tag[6] = original_tag[5]; 5942 tag[7] = original_tag[4]; 5943 } 5944 5945 static void hpsa_get_tag(struct ctlr_info *h, 5946 struct CommandList *c, __le32 *taglower, __le32 *tagupper) 5947 { 5948 u64 tag; 5949 if (c->cmd_type == CMD_IOACCEL1) { 5950 struct io_accel1_cmd *cm1 = (struct io_accel1_cmd *) 5951 &h->ioaccel_cmd_pool[c->cmdindex]; 5952 tag = le64_to_cpu(cm1->tag); 5953 *tagupper = cpu_to_le32(tag >> 32); 5954 *taglower = cpu_to_le32(tag); 5955 return; 5956 } 5957 if (c->cmd_type == CMD_IOACCEL2) { 5958 struct io_accel2_cmd *cm2 = (struct io_accel2_cmd *) 5959 &h->ioaccel2_cmd_pool[c->cmdindex]; 5960 /* upper tag not used in ioaccel2 mode */ 5961 memset(tagupper, 0, sizeof(*tagupper)); 5962 *taglower = cm2->Tag; 5963 return; 5964 } 5965 tag = le64_to_cpu(c->Header.tag); 5966 *tagupper = cpu_to_le32(tag >> 32); 5967 *taglower = cpu_to_le32(tag); 5968 } 5969 5970 static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr, 5971 struct CommandList *abort, int reply_queue) 5972 { 5973 int rc = IO_OK; 5974 struct CommandList *c; 5975 struct ErrorInfo *ei; 5976 __le32 tagupper, taglower; 5977 5978 c = cmd_alloc(h); 5979 5980 /* fill_cmd can't fail here, no buffer to map */ 5981 (void) fill_cmd(c, HPSA_ABORT_MSG, h, &abort->Header.tag, 5982 0, 0, scsi3addr, TYPE_MSG); 5983 if (h->needs_abort_tags_swizzled) 5984 swizzle_abort_tag(&c->Request.CDB[4]); 5985 (void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 5986 hpsa_get_tag(h, abort, &taglower, &tagupper); 5987 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd(abort) completed.\n", 5988 __func__, tagupper, taglower); 5989 /* no unmap needed here because no data xfer. */ 5990 5991 ei = c->err_info; 5992 switch (ei->CommandStatus) { 5993 case CMD_SUCCESS: 5994 break; 5995 case CMD_TMF_STATUS: 5996 rc = hpsa_evaluate_tmf_status(h, c); 5997 break; 5998 case CMD_UNABORTABLE: /* Very common, don't make noise. */ 5999 rc = -1; 6000 break; 6001 default: 6002 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n", 6003 __func__, tagupper, taglower); 6004 hpsa_scsi_interpret_error(h, c); 6005 rc = -1; 6006 break; 6007 } 6008 cmd_free(h, c); 6009 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", 6010 __func__, tagupper, taglower); 6011 return rc; 6012 } 6013 6014 static void setup_ioaccel2_abort_cmd(struct CommandList *c, struct ctlr_info *h, 6015 struct CommandList *command_to_abort, int reply_queue) 6016 { 6017 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 6018 struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2; 6019 struct io_accel2_cmd *c2a = 6020 &h->ioaccel2_cmd_pool[command_to_abort->cmdindex]; 6021 struct scsi_cmnd *scmd = command_to_abort->scsi_cmd; 6022 struct hpsa_scsi_dev_t *dev = scmd->device->hostdata; 6023 6024 if (!dev) 6025 return; 6026 6027 /* 6028 * We're overlaying struct hpsa_tmf_struct on top of something which 6029 * was allocated as a struct io_accel2_cmd, so we better be sure it 6030 * actually fits, and doesn't overrun the error info space. 6031 */ 6032 BUILD_BUG_ON(sizeof(struct hpsa_tmf_struct) > 6033 sizeof(struct io_accel2_cmd)); 6034 BUG_ON(offsetof(struct io_accel2_cmd, error_data) < 6035 offsetof(struct hpsa_tmf_struct, error_len) + 6036 sizeof(ac->error_len)); 6037 6038 c->cmd_type = IOACCEL2_TMF; 6039 c->scsi_cmd = SCSI_CMD_BUSY; 6040 6041 /* Adjust the DMA address to point to the accelerated command buffer */ 6042 c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle + 6043 (c->cmdindex * sizeof(struct io_accel2_cmd)); 6044 BUG_ON(c->busaddr & 0x0000007F); 6045 6046 memset(ac, 0, sizeof(*c2)); /* yes this is correct */ 6047 ac->iu_type = IOACCEL2_IU_TMF_TYPE; 6048 ac->reply_queue = reply_queue; 6049 ac->tmf = IOACCEL2_TMF_ABORT; 6050 ac->it_nexus = cpu_to_le32(dev->ioaccel_handle); 6051 memset(ac->lun_id, 0, sizeof(ac->lun_id)); 6052 ac->tag = cpu_to_le64(c->cmdindex << DIRECT_LOOKUP_SHIFT); 6053 ac->abort_tag = cpu_to_le64(le32_to_cpu(c2a->Tag)); 6054 ac->error_ptr = cpu_to_le64(c->busaddr + 6055 offsetof(struct io_accel2_cmd, error_data)); 6056 ac->error_len = cpu_to_le32(sizeof(c2->error_data)); 6057 } 6058 6059 /* ioaccel2 path firmware cannot handle abort task requests. 6060 * Change abort requests to physical target reset, and send to the 6061 * address of the physical disk used for the ioaccel 2 command. 6062 * Return 0 on success (IO_OK) 6063 * -1 on failure 6064 */ 6065 6066 static int hpsa_send_reset_as_abort_ioaccel2(struct ctlr_info *h, 6067 unsigned char *scsi3addr, struct CommandList *abort, int reply_queue) 6068 { 6069 int rc = IO_OK; 6070 struct scsi_cmnd *scmd; /* scsi command within request being aborted */ 6071 struct hpsa_scsi_dev_t *dev; /* device to which scsi cmd was sent */ 6072 unsigned char phys_scsi3addr[8]; /* addr of phys disk with volume */ 6073 unsigned char *psa = &phys_scsi3addr[0]; 6074 6075 /* Get a pointer to the hpsa logical device. */ 6076 scmd = abort->scsi_cmd; 6077 dev = (struct hpsa_scsi_dev_t *)(scmd->device->hostdata); 6078 if (dev == NULL) { 6079 dev_warn(&h->pdev->dev, 6080 "Cannot abort: no device pointer for command.\n"); 6081 return -1; /* not abortable */ 6082 } 6083 6084 if (h->raid_offload_debug > 0) 6085 dev_info(&h->pdev->dev, 6086 "scsi %d:%d:%d:%d %s scsi3addr 0x%8phN\n", 6087 h->scsi_host->host_no, dev->bus, dev->target, dev->lun, 6088 "Reset as abort", scsi3addr); 6089 6090 if (!dev->offload_enabled) { 6091 dev_warn(&h->pdev->dev, 6092 "Can't abort: device is not operating in HP SSD Smart Path mode.\n"); 6093 return -1; /* not abortable */ 6094 } 6095 6096 /* Incoming scsi3addr is logical addr. We need physical disk addr. */ 6097 if (!hpsa_get_pdisk_of_ioaccel2(h, abort, psa)) { 6098 dev_warn(&h->pdev->dev, "Can't abort: Failed lookup of physical address.\n"); 6099 return -1; /* not abortable */ 6100 } 6101 6102 /* send the reset */ 6103 if (h->raid_offload_debug > 0) 6104 dev_info(&h->pdev->dev, 6105 "Reset as abort: Resetting physical device at scsi3addr 0x%8phN\n", 6106 psa); 6107 rc = hpsa_do_reset(h, dev, psa, HPSA_PHYS_TARGET_RESET, reply_queue); 6108 if (rc != 0) { 6109 dev_warn(&h->pdev->dev, 6110 "Reset as abort: Failed on physical device at scsi3addr 0x%8phN\n", 6111 psa); 6112 return rc; /* failed to reset */ 6113 } 6114 6115 /* wait for device to recover */ 6116 if (wait_for_device_to_become_ready(h, psa, reply_queue) != 0) { 6117 dev_warn(&h->pdev->dev, 6118 "Reset as abort: Failed: Device never recovered from reset: 0x%8phN\n", 6119 psa); 6120 return -1; /* failed to recover */ 6121 } 6122 6123 /* device recovered */ 6124 dev_info(&h->pdev->dev, 6125 "Reset as abort: Device recovered from reset: scsi3addr 0x%8phN\n", 6126 psa); 6127 6128 return rc; /* success */ 6129 } 6130 6131 static int hpsa_send_abort_ioaccel2(struct ctlr_info *h, 6132 struct CommandList *abort, int reply_queue) 6133 { 6134 int rc = IO_OK; 6135 struct CommandList *c; 6136 __le32 taglower, tagupper; 6137 struct hpsa_scsi_dev_t *dev; 6138 struct io_accel2_cmd *c2; 6139 6140 dev = abort->scsi_cmd->device->hostdata; 6141 if (!dev) 6142 return -1; 6143 6144 if (!dev->offload_enabled && !dev->hba_ioaccel_enabled) 6145 return -1; 6146 6147 c = cmd_alloc(h); 6148 setup_ioaccel2_abort_cmd(c, h, abort, reply_queue); 6149 c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 6150 (void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 6151 hpsa_get_tag(h, abort, &taglower, &tagupper); 6152 dev_dbg(&h->pdev->dev, 6153 "%s: Tag:0x%08x:%08x: do_simple_cmd(ioaccel2 abort) completed.\n", 6154 __func__, tagupper, taglower); 6155 /* no unmap needed here because no data xfer. */ 6156 6157 dev_dbg(&h->pdev->dev, 6158 "%s: Tag:0x%08x:%08x: abort service response = 0x%02x.\n", 6159 __func__, tagupper, taglower, c2->error_data.serv_response); 6160 switch (c2->error_data.serv_response) { 6161 case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE: 6162 case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS: 6163 rc = 0; 6164 break; 6165 case IOACCEL2_SERV_RESPONSE_TMF_REJECTED: 6166 case IOACCEL2_SERV_RESPONSE_FAILURE: 6167 case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN: 6168 rc = -1; 6169 break; 6170 default: 6171 dev_warn(&h->pdev->dev, 6172 "%s: Tag:0x%08x:%08x: unknown abort service response 0x%02x\n", 6173 __func__, tagupper, taglower, 6174 c2->error_data.serv_response); 6175 rc = -1; 6176 } 6177 cmd_free(h, c); 6178 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", __func__, 6179 tagupper, taglower); 6180 return rc; 6181 } 6182 6183 static int hpsa_send_abort_both_ways(struct ctlr_info *h, 6184 struct hpsa_scsi_dev_t *dev, struct CommandList *abort, int reply_queue) 6185 { 6186 /* 6187 * ioccelerator mode 2 commands should be aborted via the 6188 * accelerated path, since RAID path is unaware of these commands, 6189 * but not all underlying firmware can handle abort TMF. 6190 * Change abort to physical device reset when abort TMF is unsupported. 6191 */ 6192 if (abort->cmd_type == CMD_IOACCEL2) { 6193 if ((HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags) || 6194 dev->physical_device) 6195 return hpsa_send_abort_ioaccel2(h, abort, 6196 reply_queue); 6197 else 6198 return hpsa_send_reset_as_abort_ioaccel2(h, 6199 dev->scsi3addr, 6200 abort, reply_queue); 6201 } 6202 return hpsa_send_abort(h, dev->scsi3addr, abort, reply_queue); 6203 } 6204 6205 /* Find out which reply queue a command was meant to return on */ 6206 static int hpsa_extract_reply_queue(struct ctlr_info *h, 6207 struct CommandList *c) 6208 { 6209 if (c->cmd_type == CMD_IOACCEL2) 6210 return h->ioaccel2_cmd_pool[c->cmdindex].reply_queue; 6211 return c->Header.ReplyQueue; 6212 } 6213 6214 /* 6215 * Limit concurrency of abort commands to prevent 6216 * over-subscription of commands 6217 */ 6218 static inline int wait_for_available_abort_cmd(struct ctlr_info *h) 6219 { 6220 #define ABORT_CMD_WAIT_MSECS 5000 6221 return !wait_event_timeout(h->abort_cmd_wait_queue, 6222 atomic_dec_if_positive(&h->abort_cmds_available) >= 0, 6223 msecs_to_jiffies(ABORT_CMD_WAIT_MSECS)); 6224 } 6225 6226 /* Send an abort for the specified command. 6227 * If the device and controller support it, 6228 * send a task abort request. 6229 */ 6230 static int hpsa_eh_abort_handler(struct scsi_cmnd *sc) 6231 { 6232 6233 int rc; 6234 struct ctlr_info *h; 6235 struct hpsa_scsi_dev_t *dev; 6236 struct CommandList *abort; /* pointer to command to be aborted */ 6237 struct scsi_cmnd *as; /* ptr to scsi cmd inside aborted command. */ 6238 char msg[256]; /* For debug messaging. */ 6239 int ml = 0; 6240 __le32 tagupper, taglower; 6241 int refcount, reply_queue; 6242 6243 if (sc == NULL) 6244 return FAILED; 6245 6246 if (sc->device == NULL) 6247 return FAILED; 6248 6249 /* Find the controller of the command to be aborted */ 6250 h = sdev_to_hba(sc->device); 6251 if (h == NULL) 6252 return FAILED; 6253 6254 /* Find the device of the command to be aborted */ 6255 dev = sc->device->hostdata; 6256 if (!dev) { 6257 dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n", 6258 msg); 6259 return FAILED; 6260 } 6261 6262 /* If controller locked up, we can guarantee command won't complete */ 6263 if (lockup_detected(h)) { 6264 hpsa_show_dev_msg(KERN_WARNING, h, dev, 6265 "ABORT FAILED, lockup detected"); 6266 return FAILED; 6267 } 6268 6269 /* This is a good time to check if controller lockup has occurred */ 6270 if (detect_controller_lockup(h)) { 6271 hpsa_show_dev_msg(KERN_WARNING, h, dev, 6272 "ABORT FAILED, new lockup detected"); 6273 return FAILED; 6274 } 6275 6276 /* Check that controller supports some kind of task abort */ 6277 if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) && 6278 !(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags)) 6279 return FAILED; 6280 6281 memset(msg, 0, sizeof(msg)); 6282 ml += sprintf(msg+ml, "scsi %d:%d:%d:%llu %s %p", 6283 h->scsi_host->host_no, sc->device->channel, 6284 sc->device->id, sc->device->lun, 6285 "Aborting command", sc); 6286 6287 /* Get SCSI command to be aborted */ 6288 abort = (struct CommandList *) sc->host_scribble; 6289 if (abort == NULL) { 6290 /* This can happen if the command already completed. */ 6291 return SUCCESS; 6292 } 6293 refcount = atomic_inc_return(&abort->refcount); 6294 if (refcount == 1) { /* Command is done already. */ 6295 cmd_free(h, abort); 6296 return SUCCESS; 6297 } 6298 6299 /* Don't bother trying the abort if we know it won't work. */ 6300 if (abort->cmd_type != CMD_IOACCEL2 && 6301 abort->cmd_type != CMD_IOACCEL1 && !dev->supports_aborts) { 6302 cmd_free(h, abort); 6303 return FAILED; 6304 } 6305 6306 /* 6307 * Check that we're aborting the right command. 6308 * It's possible the CommandList already completed and got re-used. 6309 */ 6310 if (abort->scsi_cmd != sc) { 6311 cmd_free(h, abort); 6312 return SUCCESS; 6313 } 6314 6315 abort->abort_pending = true; 6316 hpsa_get_tag(h, abort, &taglower, &tagupper); 6317 reply_queue = hpsa_extract_reply_queue(h, abort); 6318 ml += sprintf(msg+ml, "Tag:0x%08x:%08x ", tagupper, taglower); 6319 as = abort->scsi_cmd; 6320 if (as != NULL) 6321 ml += sprintf(msg+ml, 6322 "CDBLen: %d CDB: 0x%02x%02x... SN: 0x%lx ", 6323 as->cmd_len, as->cmnd[0], as->cmnd[1], 6324 as->serial_number); 6325 dev_warn(&h->pdev->dev, "%s BEING SENT\n", msg); 6326 hpsa_show_dev_msg(KERN_WARNING, h, dev, "Aborting command"); 6327 6328 /* 6329 * Command is in flight, or possibly already completed 6330 * by the firmware (but not to the scsi mid layer) but we can't 6331 * distinguish which. Send the abort down. 6332 */ 6333 if (wait_for_available_abort_cmd(h)) { 6334 dev_warn(&h->pdev->dev, 6335 "%s FAILED, timeout waiting for an abort command to become available.\n", 6336 msg); 6337 cmd_free(h, abort); 6338 return FAILED; 6339 } 6340 rc = hpsa_send_abort_both_ways(h, dev, abort, reply_queue); 6341 atomic_inc(&h->abort_cmds_available); 6342 wake_up_all(&h->abort_cmd_wait_queue); 6343 if (rc != 0) { 6344 dev_warn(&h->pdev->dev, "%s SENT, FAILED\n", msg); 6345 hpsa_show_dev_msg(KERN_WARNING, h, dev, 6346 "FAILED to abort command"); 6347 cmd_free(h, abort); 6348 return FAILED; 6349 } 6350 dev_info(&h->pdev->dev, "%s SENT, SUCCESS\n", msg); 6351 wait_event(h->event_sync_wait_queue, 6352 abort->scsi_cmd != sc || lockup_detected(h)); 6353 cmd_free(h, abort); 6354 return !lockup_detected(h) ? SUCCESS : FAILED; 6355 } 6356 6357 /* 6358 * For operations with an associated SCSI command, a command block is allocated 6359 * at init, and managed by cmd_tagged_alloc() and cmd_tagged_free() using the 6360 * block request tag as an index into a table of entries. cmd_tagged_free() is 6361 * the complement, although cmd_free() may be called instead. 6362 */ 6363 static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h, 6364 struct scsi_cmnd *scmd) 6365 { 6366 int idx = hpsa_get_cmd_index(scmd); 6367 struct CommandList *c = h->cmd_pool + idx; 6368 6369 if (idx < HPSA_NRESERVED_CMDS || idx >= h->nr_cmds) { 6370 dev_err(&h->pdev->dev, "Bad block tag: %d not in [%d..%d]\n", 6371 idx, HPSA_NRESERVED_CMDS, h->nr_cmds - 1); 6372 /* The index value comes from the block layer, so if it's out of 6373 * bounds, it's probably not our bug. 6374 */ 6375 BUG(); 6376 } 6377 6378 atomic_inc(&c->refcount); 6379 if (unlikely(!hpsa_is_cmd_idle(c))) { 6380 /* 6381 * We expect that the SCSI layer will hand us a unique tag 6382 * value. Thus, there should never be a collision here between 6383 * two requests...because if the selected command isn't idle 6384 * then someone is going to be very disappointed. 6385 */ 6386 dev_err(&h->pdev->dev, 6387 "tag collision (tag=%d) in cmd_tagged_alloc().\n", 6388 idx); 6389 if (c->scsi_cmd != NULL) 6390 scsi_print_command(c->scsi_cmd); 6391 scsi_print_command(scmd); 6392 } 6393 6394 hpsa_cmd_partial_init(h, idx, c); 6395 return c; 6396 } 6397 6398 static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c) 6399 { 6400 /* 6401 * Release our reference to the block. We don't need to do anything 6402 * else to free it, because it is accessed by index. (There's no point 6403 * in checking the result of the decrement, since we cannot guarantee 6404 * that there isn't a concurrent abort which is also accessing it.) 6405 */ 6406 (void)atomic_dec(&c->refcount); 6407 } 6408 6409 /* 6410 * For operations that cannot sleep, a command block is allocated at init, 6411 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track 6412 * which ones are free or in use. Lock must be held when calling this. 6413 * cmd_free() is the complement. 6414 * This function never gives up and returns NULL. If it hangs, 6415 * another thread must call cmd_free() to free some tags. 6416 */ 6417 6418 static struct CommandList *cmd_alloc(struct ctlr_info *h) 6419 { 6420 struct CommandList *c; 6421 int refcount, i; 6422 int offset = 0; 6423 6424 /* 6425 * There is some *extremely* small but non-zero chance that that 6426 * multiple threads could get in here, and one thread could 6427 * be scanning through the list of bits looking for a free 6428 * one, but the free ones are always behind him, and other 6429 * threads sneak in behind him and eat them before he can 6430 * get to them, so that while there is always a free one, a 6431 * very unlucky thread might be starved anyway, never able to 6432 * beat the other threads. In reality, this happens so 6433 * infrequently as to be indistinguishable from never. 6434 * 6435 * Note that we start allocating commands before the SCSI host structure 6436 * is initialized. Since the search starts at bit zero, this 6437 * all works, since we have at least one command structure available; 6438 * however, it means that the structures with the low indexes have to be 6439 * reserved for driver-initiated requests, while requests from the block 6440 * layer will use the higher indexes. 6441 */ 6442 6443 for (;;) { 6444 i = find_next_zero_bit(h->cmd_pool_bits, 6445 HPSA_NRESERVED_CMDS, 6446 offset); 6447 if (unlikely(i >= HPSA_NRESERVED_CMDS)) { 6448 offset = 0; 6449 continue; 6450 } 6451 c = h->cmd_pool + i; 6452 refcount = atomic_inc_return(&c->refcount); 6453 if (unlikely(refcount > 1)) { 6454 cmd_free(h, c); /* already in use */ 6455 offset = (i + 1) % HPSA_NRESERVED_CMDS; 6456 continue; 6457 } 6458 set_bit(i & (BITS_PER_LONG - 1), 6459 h->cmd_pool_bits + (i / BITS_PER_LONG)); 6460 break; /* it's ours now. */ 6461 } 6462 hpsa_cmd_partial_init(h, i, c); 6463 return c; 6464 } 6465 6466 /* 6467 * This is the complementary operation to cmd_alloc(). Note, however, in some 6468 * corner cases it may also be used to free blocks allocated by 6469 * cmd_tagged_alloc() in which case the ref-count decrement does the trick and 6470 * the clear-bit is harmless. 6471 */ 6472 static void cmd_free(struct ctlr_info *h, struct CommandList *c) 6473 { 6474 if (atomic_dec_and_test(&c->refcount)) { 6475 int i; 6476 6477 i = c - h->cmd_pool; 6478 clear_bit(i & (BITS_PER_LONG - 1), 6479 h->cmd_pool_bits + (i / BITS_PER_LONG)); 6480 } 6481 } 6482 6483 #ifdef CONFIG_COMPAT 6484 6485 static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, 6486 void __user *arg) 6487 { 6488 IOCTL32_Command_struct __user *arg32 = 6489 (IOCTL32_Command_struct __user *) arg; 6490 IOCTL_Command_struct arg64; 6491 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64)); 6492 int err; 6493 u32 cp; 6494 6495 memset(&arg64, 0, sizeof(arg64)); 6496 err = 0; 6497 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 6498 sizeof(arg64.LUN_info)); 6499 err |= copy_from_user(&arg64.Request, &arg32->Request, 6500 sizeof(arg64.Request)); 6501 err |= copy_from_user(&arg64.error_info, &arg32->error_info, 6502 sizeof(arg64.error_info)); 6503 err |= get_user(arg64.buf_size, &arg32->buf_size); 6504 err |= get_user(cp, &arg32->buf); 6505 arg64.buf = compat_ptr(cp); 6506 err |= copy_to_user(p, &arg64, sizeof(arg64)); 6507 6508 if (err) 6509 return -EFAULT; 6510 6511 err = hpsa_ioctl(dev, CCISS_PASSTHRU, p); 6512 if (err) 6513 return err; 6514 err |= copy_in_user(&arg32->error_info, &p->error_info, 6515 sizeof(arg32->error_info)); 6516 if (err) 6517 return -EFAULT; 6518 return err; 6519 } 6520 6521 static int hpsa_ioctl32_big_passthru(struct scsi_device *dev, 6522 int cmd, void __user *arg) 6523 { 6524 BIG_IOCTL32_Command_struct __user *arg32 = 6525 (BIG_IOCTL32_Command_struct __user *) arg; 6526 BIG_IOCTL_Command_struct arg64; 6527 BIG_IOCTL_Command_struct __user *p = 6528 compat_alloc_user_space(sizeof(arg64)); 6529 int err; 6530 u32 cp; 6531 6532 memset(&arg64, 0, sizeof(arg64)); 6533 err = 0; 6534 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 6535 sizeof(arg64.LUN_info)); 6536 err |= copy_from_user(&arg64.Request, &arg32->Request, 6537 sizeof(arg64.Request)); 6538 err |= copy_from_user(&arg64.error_info, &arg32->error_info, 6539 sizeof(arg64.error_info)); 6540 err |= get_user(arg64.buf_size, &arg32->buf_size); 6541 err |= get_user(arg64.malloc_size, &arg32->malloc_size); 6542 err |= get_user(cp, &arg32->buf); 6543 arg64.buf = compat_ptr(cp); 6544 err |= copy_to_user(p, &arg64, sizeof(arg64)); 6545 6546 if (err) 6547 return -EFAULT; 6548 6549 err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, p); 6550 if (err) 6551 return err; 6552 err |= copy_in_user(&arg32->error_info, &p->error_info, 6553 sizeof(arg32->error_info)); 6554 if (err) 6555 return -EFAULT; 6556 return err; 6557 } 6558 6559 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void __user *arg) 6560 { 6561 switch (cmd) { 6562 case CCISS_GETPCIINFO: 6563 case CCISS_GETINTINFO: 6564 case CCISS_SETINTINFO: 6565 case CCISS_GETNODENAME: 6566 case CCISS_SETNODENAME: 6567 case CCISS_GETHEARTBEAT: 6568 case CCISS_GETBUSTYPES: 6569 case CCISS_GETFIRMVER: 6570 case CCISS_GETDRIVVER: 6571 case CCISS_REVALIDVOLS: 6572 case CCISS_DEREGDISK: 6573 case CCISS_REGNEWDISK: 6574 case CCISS_REGNEWD: 6575 case CCISS_RESCANDISK: 6576 case CCISS_GETLUNINFO: 6577 return hpsa_ioctl(dev, cmd, arg); 6578 6579 case CCISS_PASSTHRU32: 6580 return hpsa_ioctl32_passthru(dev, cmd, arg); 6581 case CCISS_BIG_PASSTHRU32: 6582 return hpsa_ioctl32_big_passthru(dev, cmd, arg); 6583 6584 default: 6585 return -ENOIOCTLCMD; 6586 } 6587 } 6588 #endif 6589 6590 static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp) 6591 { 6592 struct hpsa_pci_info pciinfo; 6593 6594 if (!argp) 6595 return -EINVAL; 6596 pciinfo.domain = pci_domain_nr(h->pdev->bus); 6597 pciinfo.bus = h->pdev->bus->number; 6598 pciinfo.dev_fn = h->pdev->devfn; 6599 pciinfo.board_id = h->board_id; 6600 if (copy_to_user(argp, &pciinfo, sizeof(pciinfo))) 6601 return -EFAULT; 6602 return 0; 6603 } 6604 6605 static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp) 6606 { 6607 DriverVer_type DriverVer; 6608 unsigned char vmaj, vmin, vsubmin; 6609 int rc; 6610 6611 rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu", 6612 &vmaj, &vmin, &vsubmin); 6613 if (rc != 3) { 6614 dev_info(&h->pdev->dev, "driver version string '%s' " 6615 "unrecognized.", HPSA_DRIVER_VERSION); 6616 vmaj = 0; 6617 vmin = 0; 6618 vsubmin = 0; 6619 } 6620 DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin; 6621 if (!argp) 6622 return -EINVAL; 6623 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type))) 6624 return -EFAULT; 6625 return 0; 6626 } 6627 6628 static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp) 6629 { 6630 IOCTL_Command_struct iocommand; 6631 struct CommandList *c; 6632 char *buff = NULL; 6633 u64 temp64; 6634 int rc = 0; 6635 6636 if (!argp) 6637 return -EINVAL; 6638 if (!capable(CAP_SYS_RAWIO)) 6639 return -EPERM; 6640 if (copy_from_user(&iocommand, argp, sizeof(iocommand))) 6641 return -EFAULT; 6642 if ((iocommand.buf_size < 1) && 6643 (iocommand.Request.Type.Direction != XFER_NONE)) { 6644 return -EINVAL; 6645 } 6646 if (iocommand.buf_size > 0) { 6647 buff = kmalloc(iocommand.buf_size, GFP_KERNEL); 6648 if (buff == NULL) 6649 return -ENOMEM; 6650 if (iocommand.Request.Type.Direction & XFER_WRITE) { 6651 /* Copy the data into the buffer we created */ 6652 if (copy_from_user(buff, iocommand.buf, 6653 iocommand.buf_size)) { 6654 rc = -EFAULT; 6655 goto out_kfree; 6656 } 6657 } else { 6658 memset(buff, 0, iocommand.buf_size); 6659 } 6660 } 6661 c = cmd_alloc(h); 6662 6663 /* Fill in the command type */ 6664 c->cmd_type = CMD_IOCTL_PEND; 6665 c->scsi_cmd = SCSI_CMD_BUSY; 6666 /* Fill in Command Header */ 6667 c->Header.ReplyQueue = 0; /* unused in simple mode */ 6668 if (iocommand.buf_size > 0) { /* buffer to fill */ 6669 c->Header.SGList = 1; 6670 c->Header.SGTotal = cpu_to_le16(1); 6671 } else { /* no buffers to fill */ 6672 c->Header.SGList = 0; 6673 c->Header.SGTotal = cpu_to_le16(0); 6674 } 6675 memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN)); 6676 6677 /* Fill in Request block */ 6678 memcpy(&c->Request, &iocommand.Request, 6679 sizeof(c->Request)); 6680 6681 /* Fill in the scatter gather information */ 6682 if (iocommand.buf_size > 0) { 6683 temp64 = pci_map_single(h->pdev, buff, 6684 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL); 6685 if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) { 6686 c->SG[0].Addr = cpu_to_le64(0); 6687 c->SG[0].Len = cpu_to_le32(0); 6688 rc = -ENOMEM; 6689 goto out; 6690 } 6691 c->SG[0].Addr = cpu_to_le64(temp64); 6692 c->SG[0].Len = cpu_to_le32(iocommand.buf_size); 6693 c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */ 6694 } 6695 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 6696 NO_TIMEOUT); 6697 if (iocommand.buf_size > 0) 6698 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL); 6699 check_ioctl_unit_attention(h, c); 6700 if (rc) { 6701 rc = -EIO; 6702 goto out; 6703 } 6704 6705 /* Copy the error information out */ 6706 memcpy(&iocommand.error_info, c->err_info, 6707 sizeof(iocommand.error_info)); 6708 if (copy_to_user(argp, &iocommand, sizeof(iocommand))) { 6709 rc = -EFAULT; 6710 goto out; 6711 } 6712 if ((iocommand.Request.Type.Direction & XFER_READ) && 6713 iocommand.buf_size > 0) { 6714 /* Copy the data out of the buffer we created */ 6715 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) { 6716 rc = -EFAULT; 6717 goto out; 6718 } 6719 } 6720 out: 6721 cmd_free(h, c); 6722 out_kfree: 6723 kfree(buff); 6724 return rc; 6725 } 6726 6727 static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp) 6728 { 6729 BIG_IOCTL_Command_struct *ioc; 6730 struct CommandList *c; 6731 unsigned char **buff = NULL; 6732 int *buff_size = NULL; 6733 u64 temp64; 6734 BYTE sg_used = 0; 6735 int status = 0; 6736 u32 left; 6737 u32 sz; 6738 BYTE __user *data_ptr; 6739 6740 if (!argp) 6741 return -EINVAL; 6742 if (!capable(CAP_SYS_RAWIO)) 6743 return -EPERM; 6744 ioc = kmalloc(sizeof(*ioc), GFP_KERNEL); 6745 if (!ioc) { 6746 status = -ENOMEM; 6747 goto cleanup1; 6748 } 6749 if (copy_from_user(ioc, argp, sizeof(*ioc))) { 6750 status = -EFAULT; 6751 goto cleanup1; 6752 } 6753 if ((ioc->buf_size < 1) && 6754 (ioc->Request.Type.Direction != XFER_NONE)) { 6755 status = -EINVAL; 6756 goto cleanup1; 6757 } 6758 /* Check kmalloc limits using all SGs */ 6759 if (ioc->malloc_size > MAX_KMALLOC_SIZE) { 6760 status = -EINVAL; 6761 goto cleanup1; 6762 } 6763 if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) { 6764 status = -EINVAL; 6765 goto cleanup1; 6766 } 6767 buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL); 6768 if (!buff) { 6769 status = -ENOMEM; 6770 goto cleanup1; 6771 } 6772 buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL); 6773 if (!buff_size) { 6774 status = -ENOMEM; 6775 goto cleanup1; 6776 } 6777 left = ioc->buf_size; 6778 data_ptr = ioc->buf; 6779 while (left) { 6780 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left; 6781 buff_size[sg_used] = sz; 6782 buff[sg_used] = kmalloc(sz, GFP_KERNEL); 6783 if (buff[sg_used] == NULL) { 6784 status = -ENOMEM; 6785 goto cleanup1; 6786 } 6787 if (ioc->Request.Type.Direction & XFER_WRITE) { 6788 if (copy_from_user(buff[sg_used], data_ptr, sz)) { 6789 status = -EFAULT; 6790 goto cleanup1; 6791 } 6792 } else 6793 memset(buff[sg_used], 0, sz); 6794 left -= sz; 6795 data_ptr += sz; 6796 sg_used++; 6797 } 6798 c = cmd_alloc(h); 6799 6800 c->cmd_type = CMD_IOCTL_PEND; 6801 c->scsi_cmd = SCSI_CMD_BUSY; 6802 c->Header.ReplyQueue = 0; 6803 c->Header.SGList = (u8) sg_used; 6804 c->Header.SGTotal = cpu_to_le16(sg_used); 6805 memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN)); 6806 memcpy(&c->Request, &ioc->Request, sizeof(c->Request)); 6807 if (ioc->buf_size > 0) { 6808 int i; 6809 for (i = 0; i < sg_used; i++) { 6810 temp64 = pci_map_single(h->pdev, buff[i], 6811 buff_size[i], PCI_DMA_BIDIRECTIONAL); 6812 if (dma_mapping_error(&h->pdev->dev, 6813 (dma_addr_t) temp64)) { 6814 c->SG[i].Addr = cpu_to_le64(0); 6815 c->SG[i].Len = cpu_to_le32(0); 6816 hpsa_pci_unmap(h->pdev, c, i, 6817 PCI_DMA_BIDIRECTIONAL); 6818 status = -ENOMEM; 6819 goto cleanup0; 6820 } 6821 c->SG[i].Addr = cpu_to_le64(temp64); 6822 c->SG[i].Len = cpu_to_le32(buff_size[i]); 6823 c->SG[i].Ext = cpu_to_le32(0); 6824 } 6825 c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST); 6826 } 6827 status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 6828 NO_TIMEOUT); 6829 if (sg_used) 6830 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL); 6831 check_ioctl_unit_attention(h, c); 6832 if (status) { 6833 status = -EIO; 6834 goto cleanup0; 6835 } 6836 6837 /* Copy the error information out */ 6838 memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info)); 6839 if (copy_to_user(argp, ioc, sizeof(*ioc))) { 6840 status = -EFAULT; 6841 goto cleanup0; 6842 } 6843 if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) { 6844 int i; 6845 6846 /* Copy the data out of the buffer we created */ 6847 BYTE __user *ptr = ioc->buf; 6848 for (i = 0; i < sg_used; i++) { 6849 if (copy_to_user(ptr, buff[i], buff_size[i])) { 6850 status = -EFAULT; 6851 goto cleanup0; 6852 } 6853 ptr += buff_size[i]; 6854 } 6855 } 6856 status = 0; 6857 cleanup0: 6858 cmd_free(h, c); 6859 cleanup1: 6860 if (buff) { 6861 int i; 6862 6863 for (i = 0; i < sg_used; i++) 6864 kfree(buff[i]); 6865 kfree(buff); 6866 } 6867 kfree(buff_size); 6868 kfree(ioc); 6869 return status; 6870 } 6871 6872 static void check_ioctl_unit_attention(struct ctlr_info *h, 6873 struct CommandList *c) 6874 { 6875 if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 6876 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) 6877 (void) check_for_unit_attention(h, c); 6878 } 6879 6880 /* 6881 * ioctl 6882 */ 6883 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg) 6884 { 6885 struct ctlr_info *h; 6886 void __user *argp = (void __user *)arg; 6887 int rc; 6888 6889 h = sdev_to_hba(dev); 6890 6891 switch (cmd) { 6892 case CCISS_DEREGDISK: 6893 case CCISS_REGNEWDISK: 6894 case CCISS_REGNEWD: 6895 hpsa_scan_start(h->scsi_host); 6896 return 0; 6897 case CCISS_GETPCIINFO: 6898 return hpsa_getpciinfo_ioctl(h, argp); 6899 case CCISS_GETDRIVVER: 6900 return hpsa_getdrivver_ioctl(h, argp); 6901 case CCISS_PASSTHRU: 6902 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 6903 return -EAGAIN; 6904 rc = hpsa_passthru_ioctl(h, argp); 6905 atomic_inc(&h->passthru_cmds_avail); 6906 return rc; 6907 case CCISS_BIG_PASSTHRU: 6908 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 6909 return -EAGAIN; 6910 rc = hpsa_big_passthru_ioctl(h, argp); 6911 atomic_inc(&h->passthru_cmds_avail); 6912 return rc; 6913 default: 6914 return -ENOTTY; 6915 } 6916 } 6917 6918 static void hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr, 6919 u8 reset_type) 6920 { 6921 struct CommandList *c; 6922 6923 c = cmd_alloc(h); 6924 6925 /* fill_cmd can't fail here, no data buffer to map */ 6926 (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, 6927 RAID_CTLR_LUNID, TYPE_MSG); 6928 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */ 6929 c->waiting = NULL; 6930 enqueue_cmd_and_start_io(h, c); 6931 /* Don't wait for completion, the reset won't complete. Don't free 6932 * the command either. This is the last command we will send before 6933 * re-initializing everything, so it doesn't matter and won't leak. 6934 */ 6935 return; 6936 } 6937 6938 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 6939 void *buff, size_t size, u16 page_code, unsigned char *scsi3addr, 6940 int cmd_type) 6941 { 6942 int pci_dir = XFER_NONE; 6943 u64 tag; /* for commands to be aborted */ 6944 6945 c->cmd_type = CMD_IOCTL_PEND; 6946 c->scsi_cmd = SCSI_CMD_BUSY; 6947 c->Header.ReplyQueue = 0; 6948 if (buff != NULL && size > 0) { 6949 c->Header.SGList = 1; 6950 c->Header.SGTotal = cpu_to_le16(1); 6951 } else { 6952 c->Header.SGList = 0; 6953 c->Header.SGTotal = cpu_to_le16(0); 6954 } 6955 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8); 6956 6957 if (cmd_type == TYPE_CMD) { 6958 switch (cmd) { 6959 case HPSA_INQUIRY: 6960 /* are we trying to read a vital product page */ 6961 if (page_code & VPD_PAGE) { 6962 c->Request.CDB[1] = 0x01; 6963 c->Request.CDB[2] = (page_code & 0xff); 6964 } 6965 c->Request.CDBLen = 6; 6966 c->Request.type_attr_dir = 6967 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6968 c->Request.Timeout = 0; 6969 c->Request.CDB[0] = HPSA_INQUIRY; 6970 c->Request.CDB[4] = size & 0xFF; 6971 break; 6972 case HPSA_REPORT_LOG: 6973 case HPSA_REPORT_PHYS: 6974 /* Talking to controller so It's a physical command 6975 mode = 00 target = 0. Nothing to write. 6976 */ 6977 c->Request.CDBLen = 12; 6978 c->Request.type_attr_dir = 6979 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6980 c->Request.Timeout = 0; 6981 c->Request.CDB[0] = cmd; 6982 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 6983 c->Request.CDB[7] = (size >> 16) & 0xFF; 6984 c->Request.CDB[8] = (size >> 8) & 0xFF; 6985 c->Request.CDB[9] = size & 0xFF; 6986 break; 6987 case BMIC_SENSE_DIAG_OPTIONS: 6988 c->Request.CDBLen = 16; 6989 c->Request.type_attr_dir = 6990 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6991 c->Request.Timeout = 0; 6992 /* Spec says this should be BMIC_WRITE */ 6993 c->Request.CDB[0] = BMIC_READ; 6994 c->Request.CDB[6] = BMIC_SENSE_DIAG_OPTIONS; 6995 break; 6996 case BMIC_SET_DIAG_OPTIONS: 6997 c->Request.CDBLen = 16; 6998 c->Request.type_attr_dir = 6999 TYPE_ATTR_DIR(cmd_type, 7000 ATTR_SIMPLE, XFER_WRITE); 7001 c->Request.Timeout = 0; 7002 c->Request.CDB[0] = BMIC_WRITE; 7003 c->Request.CDB[6] = BMIC_SET_DIAG_OPTIONS; 7004 break; 7005 case HPSA_CACHE_FLUSH: 7006 c->Request.CDBLen = 12; 7007 c->Request.type_attr_dir = 7008 TYPE_ATTR_DIR(cmd_type, 7009 ATTR_SIMPLE, XFER_WRITE); 7010 c->Request.Timeout = 0; 7011 c->Request.CDB[0] = BMIC_WRITE; 7012 c->Request.CDB[6] = BMIC_CACHE_FLUSH; 7013 c->Request.CDB[7] = (size >> 8) & 0xFF; 7014 c->Request.CDB[8] = size & 0xFF; 7015 break; 7016 case TEST_UNIT_READY: 7017 c->Request.CDBLen = 6; 7018 c->Request.type_attr_dir = 7019 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 7020 c->Request.Timeout = 0; 7021 break; 7022 case HPSA_GET_RAID_MAP: 7023 c->Request.CDBLen = 12; 7024 c->Request.type_attr_dir = 7025 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 7026 c->Request.Timeout = 0; 7027 c->Request.CDB[0] = HPSA_CISS_READ; 7028 c->Request.CDB[1] = cmd; 7029 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 7030 c->Request.CDB[7] = (size >> 16) & 0xFF; 7031 c->Request.CDB[8] = (size >> 8) & 0xFF; 7032 c->Request.CDB[9] = size & 0xFF; 7033 break; 7034 case BMIC_SENSE_CONTROLLER_PARAMETERS: 7035 c->Request.CDBLen = 10; 7036 c->Request.type_attr_dir = 7037 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 7038 c->Request.Timeout = 0; 7039 c->Request.CDB[0] = BMIC_READ; 7040 c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS; 7041 c->Request.CDB[7] = (size >> 16) & 0xFF; 7042 c->Request.CDB[8] = (size >> 8) & 0xFF; 7043 break; 7044 case BMIC_IDENTIFY_PHYSICAL_DEVICE: 7045 c->Request.CDBLen = 10; 7046 c->Request.type_attr_dir = 7047 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 7048 c->Request.Timeout = 0; 7049 c->Request.CDB[0] = BMIC_READ; 7050 c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE; 7051 c->Request.CDB[7] = (size >> 16) & 0xFF; 7052 c->Request.CDB[8] = (size >> 8) & 0XFF; 7053 break; 7054 case BMIC_SENSE_SUBSYSTEM_INFORMATION: 7055 c->Request.CDBLen = 10; 7056 c->Request.type_attr_dir = 7057 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 7058 c->Request.Timeout = 0; 7059 c->Request.CDB[0] = BMIC_READ; 7060 c->Request.CDB[6] = BMIC_SENSE_SUBSYSTEM_INFORMATION; 7061 c->Request.CDB[7] = (size >> 16) & 0xFF; 7062 c->Request.CDB[8] = (size >> 8) & 0XFF; 7063 break; 7064 case BMIC_SENSE_STORAGE_BOX_PARAMS: 7065 c->Request.CDBLen = 10; 7066 c->Request.type_attr_dir = 7067 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 7068 c->Request.Timeout = 0; 7069 c->Request.CDB[0] = BMIC_READ; 7070 c->Request.CDB[6] = BMIC_SENSE_STORAGE_BOX_PARAMS; 7071 c->Request.CDB[7] = (size >> 16) & 0xFF; 7072 c->Request.CDB[8] = (size >> 8) & 0XFF; 7073 break; 7074 case BMIC_IDENTIFY_CONTROLLER: 7075 c->Request.CDBLen = 10; 7076 c->Request.type_attr_dir = 7077 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 7078 c->Request.Timeout = 0; 7079 c->Request.CDB[0] = BMIC_READ; 7080 c->Request.CDB[1] = 0; 7081 c->Request.CDB[2] = 0; 7082 c->Request.CDB[3] = 0; 7083 c->Request.CDB[4] = 0; 7084 c->Request.CDB[5] = 0; 7085 c->Request.CDB[6] = BMIC_IDENTIFY_CONTROLLER; 7086 c->Request.CDB[7] = (size >> 16) & 0xFF; 7087 c->Request.CDB[8] = (size >> 8) & 0XFF; 7088 c->Request.CDB[9] = 0; 7089 break; 7090 default: 7091 dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd); 7092 BUG(); 7093 return -1; 7094 } 7095 } else if (cmd_type == TYPE_MSG) { 7096 switch (cmd) { 7097 7098 case HPSA_PHYS_TARGET_RESET: 7099 c->Request.CDBLen = 16; 7100 c->Request.type_attr_dir = 7101 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 7102 c->Request.Timeout = 0; /* Don't time out */ 7103 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 7104 c->Request.CDB[0] = HPSA_RESET; 7105 c->Request.CDB[1] = HPSA_TARGET_RESET_TYPE; 7106 /* Physical target reset needs no control bytes 4-7*/ 7107 c->Request.CDB[4] = 0x00; 7108 c->Request.CDB[5] = 0x00; 7109 c->Request.CDB[6] = 0x00; 7110 c->Request.CDB[7] = 0x00; 7111 break; 7112 case HPSA_DEVICE_RESET_MSG: 7113 c->Request.CDBLen = 16; 7114 c->Request.type_attr_dir = 7115 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 7116 c->Request.Timeout = 0; /* Don't time out */ 7117 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 7118 c->Request.CDB[0] = cmd; 7119 c->Request.CDB[1] = HPSA_RESET_TYPE_LUN; 7120 /* If bytes 4-7 are zero, it means reset the */ 7121 /* LunID device */ 7122 c->Request.CDB[4] = 0x00; 7123 c->Request.CDB[5] = 0x00; 7124 c->Request.CDB[6] = 0x00; 7125 c->Request.CDB[7] = 0x00; 7126 break; 7127 case HPSA_ABORT_MSG: 7128 memcpy(&tag, buff, sizeof(tag)); 7129 dev_dbg(&h->pdev->dev, 7130 "Abort Tag:0x%016llx using rqst Tag:0x%016llx", 7131 tag, c->Header.tag); 7132 c->Request.CDBLen = 16; 7133 c->Request.type_attr_dir = 7134 TYPE_ATTR_DIR(cmd_type, 7135 ATTR_SIMPLE, XFER_WRITE); 7136 c->Request.Timeout = 0; /* Don't time out */ 7137 c->Request.CDB[0] = HPSA_TASK_MANAGEMENT; 7138 c->Request.CDB[1] = HPSA_TMF_ABORT_TASK; 7139 c->Request.CDB[2] = 0x00; /* reserved */ 7140 c->Request.CDB[3] = 0x00; /* reserved */ 7141 /* Tag to abort goes in CDB[4]-CDB[11] */ 7142 memcpy(&c->Request.CDB[4], &tag, sizeof(tag)); 7143 c->Request.CDB[12] = 0x00; /* reserved */ 7144 c->Request.CDB[13] = 0x00; /* reserved */ 7145 c->Request.CDB[14] = 0x00; /* reserved */ 7146 c->Request.CDB[15] = 0x00; /* reserved */ 7147 break; 7148 default: 7149 dev_warn(&h->pdev->dev, "unknown message type %d\n", 7150 cmd); 7151 BUG(); 7152 } 7153 } else { 7154 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type); 7155 BUG(); 7156 } 7157 7158 switch (GET_DIR(c->Request.type_attr_dir)) { 7159 case XFER_READ: 7160 pci_dir = PCI_DMA_FROMDEVICE; 7161 break; 7162 case XFER_WRITE: 7163 pci_dir = PCI_DMA_TODEVICE; 7164 break; 7165 case XFER_NONE: 7166 pci_dir = PCI_DMA_NONE; 7167 break; 7168 default: 7169 pci_dir = PCI_DMA_BIDIRECTIONAL; 7170 } 7171 if (hpsa_map_one(h->pdev, c, buff, size, pci_dir)) 7172 return -1; 7173 return 0; 7174 } 7175 7176 /* 7177 * Map (physical) PCI mem into (virtual) kernel space 7178 */ 7179 static void __iomem *remap_pci_mem(ulong base, ulong size) 7180 { 7181 ulong page_base = ((ulong) base) & PAGE_MASK; 7182 ulong page_offs = ((ulong) base) - page_base; 7183 void __iomem *page_remapped = ioremap_nocache(page_base, 7184 page_offs + size); 7185 7186 return page_remapped ? (page_remapped + page_offs) : NULL; 7187 } 7188 7189 static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q) 7190 { 7191 return h->access.command_completed(h, q); 7192 } 7193 7194 static inline bool interrupt_pending(struct ctlr_info *h) 7195 { 7196 return h->access.intr_pending(h); 7197 } 7198 7199 static inline long interrupt_not_for_us(struct ctlr_info *h) 7200 { 7201 return (h->access.intr_pending(h) == 0) || 7202 (h->interrupts_enabled == 0); 7203 } 7204 7205 static inline int bad_tag(struct ctlr_info *h, u32 tag_index, 7206 u32 raw_tag) 7207 { 7208 if (unlikely(tag_index >= h->nr_cmds)) { 7209 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag); 7210 return 1; 7211 } 7212 return 0; 7213 } 7214 7215 static inline void finish_cmd(struct CommandList *c) 7216 { 7217 dial_up_lockup_detection_on_fw_flash_complete(c->h, c); 7218 if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI 7219 || c->cmd_type == CMD_IOACCEL2)) 7220 complete_scsi_command(c); 7221 else if (c->cmd_type == CMD_IOCTL_PEND || c->cmd_type == IOACCEL2_TMF) 7222 complete(c->waiting); 7223 } 7224 7225 /* process completion of an indexed ("direct lookup") command */ 7226 static inline void process_indexed_cmd(struct ctlr_info *h, 7227 u32 raw_tag) 7228 { 7229 u32 tag_index; 7230 struct CommandList *c; 7231 7232 tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT; 7233 if (!bad_tag(h, tag_index, raw_tag)) { 7234 c = h->cmd_pool + tag_index; 7235 finish_cmd(c); 7236 } 7237 } 7238 7239 /* Some controllers, like p400, will give us one interrupt 7240 * after a soft reset, even if we turned interrupts off. 7241 * Only need to check for this in the hpsa_xxx_discard_completions 7242 * functions. 7243 */ 7244 static int ignore_bogus_interrupt(struct ctlr_info *h) 7245 { 7246 if (likely(!reset_devices)) 7247 return 0; 7248 7249 if (likely(h->interrupts_enabled)) 7250 return 0; 7251 7252 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled " 7253 "(known firmware bug.) Ignoring.\n"); 7254 7255 return 1; 7256 } 7257 7258 /* 7259 * Convert &h->q[x] (passed to interrupt handlers) back to h. 7260 * Relies on (h-q[x] == x) being true for x such that 7261 * 0 <= x < MAX_REPLY_QUEUES. 7262 */ 7263 static struct ctlr_info *queue_to_hba(u8 *queue) 7264 { 7265 return container_of((queue - *queue), struct ctlr_info, q[0]); 7266 } 7267 7268 static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue) 7269 { 7270 struct ctlr_info *h = queue_to_hba(queue); 7271 u8 q = *(u8 *) queue; 7272 u32 raw_tag; 7273 7274 if (ignore_bogus_interrupt(h)) 7275 return IRQ_NONE; 7276 7277 if (interrupt_not_for_us(h)) 7278 return IRQ_NONE; 7279 h->last_intr_timestamp = get_jiffies_64(); 7280 while (interrupt_pending(h)) { 7281 raw_tag = get_next_completion(h, q); 7282 while (raw_tag != FIFO_EMPTY) 7283 raw_tag = next_command(h, q); 7284 } 7285 return IRQ_HANDLED; 7286 } 7287 7288 static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue) 7289 { 7290 struct ctlr_info *h = queue_to_hba(queue); 7291 u32 raw_tag; 7292 u8 q = *(u8 *) queue; 7293 7294 if (ignore_bogus_interrupt(h)) 7295 return IRQ_NONE; 7296 7297 h->last_intr_timestamp = get_jiffies_64(); 7298 raw_tag = get_next_completion(h, q); 7299 while (raw_tag != FIFO_EMPTY) 7300 raw_tag = next_command(h, q); 7301 return IRQ_HANDLED; 7302 } 7303 7304 static irqreturn_t do_hpsa_intr_intx(int irq, void *queue) 7305 { 7306 struct ctlr_info *h = queue_to_hba((u8 *) queue); 7307 u32 raw_tag; 7308 u8 q = *(u8 *) queue; 7309 7310 if (interrupt_not_for_us(h)) 7311 return IRQ_NONE; 7312 h->last_intr_timestamp = get_jiffies_64(); 7313 while (interrupt_pending(h)) { 7314 raw_tag = get_next_completion(h, q); 7315 while (raw_tag != FIFO_EMPTY) { 7316 process_indexed_cmd(h, raw_tag); 7317 raw_tag = next_command(h, q); 7318 } 7319 } 7320 return IRQ_HANDLED; 7321 } 7322 7323 static irqreturn_t do_hpsa_intr_msi(int irq, void *queue) 7324 { 7325 struct ctlr_info *h = queue_to_hba(queue); 7326 u32 raw_tag; 7327 u8 q = *(u8 *) queue; 7328 7329 h->last_intr_timestamp = get_jiffies_64(); 7330 raw_tag = get_next_completion(h, q); 7331 while (raw_tag != FIFO_EMPTY) { 7332 process_indexed_cmd(h, raw_tag); 7333 raw_tag = next_command(h, q); 7334 } 7335 return IRQ_HANDLED; 7336 } 7337 7338 /* Send a message CDB to the firmware. Careful, this only works 7339 * in simple mode, not performant mode due to the tag lookup. 7340 * We only ever use this immediately after a controller reset. 7341 */ 7342 static int hpsa_message(struct pci_dev *pdev, unsigned char opcode, 7343 unsigned char type) 7344 { 7345 struct Command { 7346 struct CommandListHeader CommandHeader; 7347 struct RequestBlock Request; 7348 struct ErrDescriptor ErrorDescriptor; 7349 }; 7350 struct Command *cmd; 7351 static const size_t cmd_sz = sizeof(*cmd) + 7352 sizeof(cmd->ErrorDescriptor); 7353 dma_addr_t paddr64; 7354 __le32 paddr32; 7355 u32 tag; 7356 void __iomem *vaddr; 7357 int i, err; 7358 7359 vaddr = pci_ioremap_bar(pdev, 0); 7360 if (vaddr == NULL) 7361 return -ENOMEM; 7362 7363 /* The Inbound Post Queue only accepts 32-bit physical addresses for the 7364 * CCISS commands, so they must be allocated from the lower 4GiB of 7365 * memory. 7366 */ 7367 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 7368 if (err) { 7369 iounmap(vaddr); 7370 return err; 7371 } 7372 7373 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64); 7374 if (cmd == NULL) { 7375 iounmap(vaddr); 7376 return -ENOMEM; 7377 } 7378 7379 /* This must fit, because of the 32-bit consistent DMA mask. Also, 7380 * although there's no guarantee, we assume that the address is at 7381 * least 4-byte aligned (most likely, it's page-aligned). 7382 */ 7383 paddr32 = cpu_to_le32(paddr64); 7384 7385 cmd->CommandHeader.ReplyQueue = 0; 7386 cmd->CommandHeader.SGList = 0; 7387 cmd->CommandHeader.SGTotal = cpu_to_le16(0); 7388 cmd->CommandHeader.tag = cpu_to_le64(paddr64); 7389 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8); 7390 7391 cmd->Request.CDBLen = 16; 7392 cmd->Request.type_attr_dir = 7393 TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE); 7394 cmd->Request.Timeout = 0; /* Don't time out */ 7395 cmd->Request.CDB[0] = opcode; 7396 cmd->Request.CDB[1] = type; 7397 memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */ 7398 cmd->ErrorDescriptor.Addr = 7399 cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd))); 7400 cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo)); 7401 7402 writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET); 7403 7404 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) { 7405 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET); 7406 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64) 7407 break; 7408 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS); 7409 } 7410 7411 iounmap(vaddr); 7412 7413 /* we leak the DMA buffer here ... no choice since the controller could 7414 * still complete the command. 7415 */ 7416 if (i == HPSA_MSG_SEND_RETRY_LIMIT) { 7417 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n", 7418 opcode, type); 7419 return -ETIMEDOUT; 7420 } 7421 7422 pci_free_consistent(pdev, cmd_sz, cmd, paddr64); 7423 7424 if (tag & HPSA_ERROR_BIT) { 7425 dev_err(&pdev->dev, "controller message %02x:%02x failed\n", 7426 opcode, type); 7427 return -EIO; 7428 } 7429 7430 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n", 7431 opcode, type); 7432 return 0; 7433 } 7434 7435 #define hpsa_noop(p) hpsa_message(p, 3, 0) 7436 7437 static int hpsa_controller_hard_reset(struct pci_dev *pdev, 7438 void __iomem *vaddr, u32 use_doorbell) 7439 { 7440 7441 if (use_doorbell) { 7442 /* For everything after the P600, the PCI power state method 7443 * of resetting the controller doesn't work, so we have this 7444 * other way using the doorbell register. 7445 */ 7446 dev_info(&pdev->dev, "using doorbell to reset controller\n"); 7447 writel(use_doorbell, vaddr + SA5_DOORBELL); 7448 7449 /* PMC hardware guys tell us we need a 10 second delay after 7450 * doorbell reset and before any attempt to talk to the board 7451 * at all to ensure that this actually works and doesn't fall 7452 * over in some weird corner cases. 7453 */ 7454 msleep(10000); 7455 } else { /* Try to do it the PCI power state way */ 7456 7457 /* Quoting from the Open CISS Specification: "The Power 7458 * Management Control/Status Register (CSR) controls the power 7459 * state of the device. The normal operating state is D0, 7460 * CSR=00h. The software off state is D3, CSR=03h. To reset 7461 * the controller, place the interface device in D3 then to D0, 7462 * this causes a secondary PCI reset which will reset the 7463 * controller." */ 7464 7465 int rc = 0; 7466 7467 dev_info(&pdev->dev, "using PCI PM to reset controller\n"); 7468 7469 /* enter the D3hot power management state */ 7470 rc = pci_set_power_state(pdev, PCI_D3hot); 7471 if (rc) 7472 return rc; 7473 7474 msleep(500); 7475 7476 /* enter the D0 power management state */ 7477 rc = pci_set_power_state(pdev, PCI_D0); 7478 if (rc) 7479 return rc; 7480 7481 /* 7482 * The P600 requires a small delay when changing states. 7483 * Otherwise we may think the board did not reset and we bail. 7484 * This for kdump only and is particular to the P600. 7485 */ 7486 msleep(500); 7487 } 7488 return 0; 7489 } 7490 7491 static void init_driver_version(char *driver_version, int len) 7492 { 7493 memset(driver_version, 0, len); 7494 strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1); 7495 } 7496 7497 static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable) 7498 { 7499 char *driver_version; 7500 int i, size = sizeof(cfgtable->driver_version); 7501 7502 driver_version = kmalloc(size, GFP_KERNEL); 7503 if (!driver_version) 7504 return -ENOMEM; 7505 7506 init_driver_version(driver_version, size); 7507 for (i = 0; i < size; i++) 7508 writeb(driver_version[i], &cfgtable->driver_version[i]); 7509 kfree(driver_version); 7510 return 0; 7511 } 7512 7513 static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable, 7514 unsigned char *driver_ver) 7515 { 7516 int i; 7517 7518 for (i = 0; i < sizeof(cfgtable->driver_version); i++) 7519 driver_ver[i] = readb(&cfgtable->driver_version[i]); 7520 } 7521 7522 static int controller_reset_failed(struct CfgTable __iomem *cfgtable) 7523 { 7524 7525 char *driver_ver, *old_driver_ver; 7526 int rc, size = sizeof(cfgtable->driver_version); 7527 7528 old_driver_ver = kmalloc(2 * size, GFP_KERNEL); 7529 if (!old_driver_ver) 7530 return -ENOMEM; 7531 driver_ver = old_driver_ver + size; 7532 7533 /* After a reset, the 32 bytes of "driver version" in the cfgtable 7534 * should have been changed, otherwise we know the reset failed. 7535 */ 7536 init_driver_version(old_driver_ver, size); 7537 read_driver_ver_from_cfgtable(cfgtable, driver_ver); 7538 rc = !memcmp(driver_ver, old_driver_ver, size); 7539 kfree(old_driver_ver); 7540 return rc; 7541 } 7542 /* This does a hard reset of the controller using PCI power management 7543 * states or the using the doorbell register. 7544 */ 7545 static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id) 7546 { 7547 u64 cfg_offset; 7548 u32 cfg_base_addr; 7549 u64 cfg_base_addr_index; 7550 void __iomem *vaddr; 7551 unsigned long paddr; 7552 u32 misc_fw_support; 7553 int rc; 7554 struct CfgTable __iomem *cfgtable; 7555 u32 use_doorbell; 7556 u16 command_register; 7557 7558 /* For controllers as old as the P600, this is very nearly 7559 * the same thing as 7560 * 7561 * pci_save_state(pci_dev); 7562 * pci_set_power_state(pci_dev, PCI_D3hot); 7563 * pci_set_power_state(pci_dev, PCI_D0); 7564 * pci_restore_state(pci_dev); 7565 * 7566 * For controllers newer than the P600, the pci power state 7567 * method of resetting doesn't work so we have another way 7568 * using the doorbell register. 7569 */ 7570 7571 if (!ctlr_is_resettable(board_id)) { 7572 dev_warn(&pdev->dev, "Controller not resettable\n"); 7573 return -ENODEV; 7574 } 7575 7576 /* if controller is soft- but not hard resettable... */ 7577 if (!ctlr_is_hard_resettable(board_id)) 7578 return -ENOTSUPP; /* try soft reset later. */ 7579 7580 /* Save the PCI command register */ 7581 pci_read_config_word(pdev, 4, &command_register); 7582 pci_save_state(pdev); 7583 7584 /* find the first memory BAR, so we can find the cfg table */ 7585 rc = hpsa_pci_find_memory_BAR(pdev, &paddr); 7586 if (rc) 7587 return rc; 7588 vaddr = remap_pci_mem(paddr, 0x250); 7589 if (!vaddr) 7590 return -ENOMEM; 7591 7592 /* find cfgtable in order to check if reset via doorbell is supported */ 7593 rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr, 7594 &cfg_base_addr_index, &cfg_offset); 7595 if (rc) 7596 goto unmap_vaddr; 7597 cfgtable = remap_pci_mem(pci_resource_start(pdev, 7598 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable)); 7599 if (!cfgtable) { 7600 rc = -ENOMEM; 7601 goto unmap_vaddr; 7602 } 7603 rc = write_driver_ver_to_cfgtable(cfgtable); 7604 if (rc) 7605 goto unmap_cfgtable; 7606 7607 /* If reset via doorbell register is supported, use that. 7608 * There are two such methods. Favor the newest method. 7609 */ 7610 misc_fw_support = readl(&cfgtable->misc_fw_support); 7611 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2; 7612 if (use_doorbell) { 7613 use_doorbell = DOORBELL_CTLR_RESET2; 7614 } else { 7615 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET; 7616 if (use_doorbell) { 7617 dev_warn(&pdev->dev, 7618 "Soft reset not supported. Firmware update is required.\n"); 7619 rc = -ENOTSUPP; /* try soft reset */ 7620 goto unmap_cfgtable; 7621 } 7622 } 7623 7624 rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell); 7625 if (rc) 7626 goto unmap_cfgtable; 7627 7628 pci_restore_state(pdev); 7629 pci_write_config_word(pdev, 4, command_register); 7630 7631 /* Some devices (notably the HP Smart Array 5i Controller) 7632 need a little pause here */ 7633 msleep(HPSA_POST_RESET_PAUSE_MSECS); 7634 7635 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY); 7636 if (rc) { 7637 dev_warn(&pdev->dev, 7638 "Failed waiting for board to become ready after hard reset\n"); 7639 goto unmap_cfgtable; 7640 } 7641 7642 rc = controller_reset_failed(vaddr); 7643 if (rc < 0) 7644 goto unmap_cfgtable; 7645 if (rc) { 7646 dev_warn(&pdev->dev, "Unable to successfully reset " 7647 "controller. Will try soft reset.\n"); 7648 rc = -ENOTSUPP; 7649 } else { 7650 dev_info(&pdev->dev, "board ready after hard reset.\n"); 7651 } 7652 7653 unmap_cfgtable: 7654 iounmap(cfgtable); 7655 7656 unmap_vaddr: 7657 iounmap(vaddr); 7658 return rc; 7659 } 7660 7661 /* 7662 * We cannot read the structure directly, for portability we must use 7663 * the io functions. 7664 * This is for debug only. 7665 */ 7666 static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb) 7667 { 7668 #ifdef HPSA_DEBUG 7669 int i; 7670 char temp_name[17]; 7671 7672 dev_info(dev, "Controller Configuration information\n"); 7673 dev_info(dev, "------------------------------------\n"); 7674 for (i = 0; i < 4; i++) 7675 temp_name[i] = readb(&(tb->Signature[i])); 7676 temp_name[4] = '\0'; 7677 dev_info(dev, " Signature = %s\n", temp_name); 7678 dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence))); 7679 dev_info(dev, " Transport methods supported = 0x%x\n", 7680 readl(&(tb->TransportSupport))); 7681 dev_info(dev, " Transport methods active = 0x%x\n", 7682 readl(&(tb->TransportActive))); 7683 dev_info(dev, " Requested transport Method = 0x%x\n", 7684 readl(&(tb->HostWrite.TransportRequest))); 7685 dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n", 7686 readl(&(tb->HostWrite.CoalIntDelay))); 7687 dev_info(dev, " Coalesce Interrupt Count = 0x%x\n", 7688 readl(&(tb->HostWrite.CoalIntCount))); 7689 dev_info(dev, " Max outstanding commands = %d\n", 7690 readl(&(tb->CmdsOutMax))); 7691 dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes))); 7692 for (i = 0; i < 16; i++) 7693 temp_name[i] = readb(&(tb->ServerName[i])); 7694 temp_name[16] = '\0'; 7695 dev_info(dev, " Server Name = %s\n", temp_name); 7696 dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n", 7697 readl(&(tb->HeartBeat))); 7698 #endif /* HPSA_DEBUG */ 7699 } 7700 7701 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr) 7702 { 7703 int i, offset, mem_type, bar_type; 7704 7705 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */ 7706 return 0; 7707 offset = 0; 7708 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { 7709 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE; 7710 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO) 7711 offset += 4; 7712 else { 7713 mem_type = pci_resource_flags(pdev, i) & 7714 PCI_BASE_ADDRESS_MEM_TYPE_MASK; 7715 switch (mem_type) { 7716 case PCI_BASE_ADDRESS_MEM_TYPE_32: 7717 case PCI_BASE_ADDRESS_MEM_TYPE_1M: 7718 offset += 4; /* 32 bit */ 7719 break; 7720 case PCI_BASE_ADDRESS_MEM_TYPE_64: 7721 offset += 8; 7722 break; 7723 default: /* reserved in PCI 2.2 */ 7724 dev_warn(&pdev->dev, 7725 "base address is invalid\n"); 7726 return -1; 7727 break; 7728 } 7729 } 7730 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0) 7731 return i + 1; 7732 } 7733 return -1; 7734 } 7735 7736 static void hpsa_disable_interrupt_mode(struct ctlr_info *h) 7737 { 7738 pci_free_irq_vectors(h->pdev); 7739 h->msix_vectors = 0; 7740 } 7741 7742 /* If MSI/MSI-X is supported by the kernel we will try to enable it on 7743 * controllers that are capable. If not, we use legacy INTx mode. 7744 */ 7745 static int hpsa_interrupt_mode(struct ctlr_info *h) 7746 { 7747 unsigned int flags = PCI_IRQ_LEGACY; 7748 int ret; 7749 7750 /* Some boards advertise MSI but don't really support it */ 7751 switch (h->board_id) { 7752 case 0x40700E11: 7753 case 0x40800E11: 7754 case 0x40820E11: 7755 case 0x40830E11: 7756 break; 7757 default: 7758 ret = pci_alloc_irq_vectors(h->pdev, 1, MAX_REPLY_QUEUES, 7759 PCI_IRQ_MSIX | PCI_IRQ_AFFINITY); 7760 if (ret > 0) { 7761 h->msix_vectors = ret; 7762 return 0; 7763 } 7764 7765 flags |= PCI_IRQ_MSI; 7766 break; 7767 } 7768 7769 ret = pci_alloc_irq_vectors(h->pdev, 1, 1, flags); 7770 if (ret < 0) 7771 return ret; 7772 return 0; 7773 } 7774 7775 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id) 7776 { 7777 int i; 7778 u32 subsystem_vendor_id, subsystem_device_id; 7779 7780 subsystem_vendor_id = pdev->subsystem_vendor; 7781 subsystem_device_id = pdev->subsystem_device; 7782 *board_id = ((subsystem_device_id << 16) & 0xffff0000) | 7783 subsystem_vendor_id; 7784 7785 for (i = 0; i < ARRAY_SIZE(products); i++) 7786 if (*board_id == products[i].board_id) 7787 return i; 7788 7789 if ((subsystem_vendor_id != PCI_VENDOR_ID_HP && 7790 subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) || 7791 !hpsa_allow_any) { 7792 dev_warn(&pdev->dev, "unrecognized board ID: " 7793 "0x%08x, ignoring.\n", *board_id); 7794 return -ENODEV; 7795 } 7796 return ARRAY_SIZE(products) - 1; /* generic unknown smart array */ 7797 } 7798 7799 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 7800 unsigned long *memory_bar) 7801 { 7802 int i; 7803 7804 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) 7805 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) { 7806 /* addressing mode bits already removed */ 7807 *memory_bar = pci_resource_start(pdev, i); 7808 dev_dbg(&pdev->dev, "memory BAR = %lx\n", 7809 *memory_bar); 7810 return 0; 7811 } 7812 dev_warn(&pdev->dev, "no memory BAR found\n"); 7813 return -ENODEV; 7814 } 7815 7816 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 7817 int wait_for_ready) 7818 { 7819 int i, iterations; 7820 u32 scratchpad; 7821 if (wait_for_ready) 7822 iterations = HPSA_BOARD_READY_ITERATIONS; 7823 else 7824 iterations = HPSA_BOARD_NOT_READY_ITERATIONS; 7825 7826 for (i = 0; i < iterations; i++) { 7827 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET); 7828 if (wait_for_ready) { 7829 if (scratchpad == HPSA_FIRMWARE_READY) 7830 return 0; 7831 } else { 7832 if (scratchpad != HPSA_FIRMWARE_READY) 7833 return 0; 7834 } 7835 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS); 7836 } 7837 dev_warn(&pdev->dev, "board not ready, timed out.\n"); 7838 return -ENODEV; 7839 } 7840 7841 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 7842 u32 *cfg_base_addr, u64 *cfg_base_addr_index, 7843 u64 *cfg_offset) 7844 { 7845 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET); 7846 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET); 7847 *cfg_base_addr &= (u32) 0x0000ffff; 7848 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr); 7849 if (*cfg_base_addr_index == -1) { 7850 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n"); 7851 return -ENODEV; 7852 } 7853 return 0; 7854 } 7855 7856 static void hpsa_free_cfgtables(struct ctlr_info *h) 7857 { 7858 if (h->transtable) { 7859 iounmap(h->transtable); 7860 h->transtable = NULL; 7861 } 7862 if (h->cfgtable) { 7863 iounmap(h->cfgtable); 7864 h->cfgtable = NULL; 7865 } 7866 } 7867 7868 /* Find and map CISS config table and transfer table 7869 + * several items must be unmapped (freed) later 7870 + * */ 7871 static int hpsa_find_cfgtables(struct ctlr_info *h) 7872 { 7873 u64 cfg_offset; 7874 u32 cfg_base_addr; 7875 u64 cfg_base_addr_index; 7876 u32 trans_offset; 7877 int rc; 7878 7879 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 7880 &cfg_base_addr_index, &cfg_offset); 7881 if (rc) 7882 return rc; 7883 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev, 7884 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable)); 7885 if (!h->cfgtable) { 7886 dev_err(&h->pdev->dev, "Failed mapping cfgtable\n"); 7887 return -ENOMEM; 7888 } 7889 rc = write_driver_ver_to_cfgtable(h->cfgtable); 7890 if (rc) 7891 return rc; 7892 /* Find performant mode table. */ 7893 trans_offset = readl(&h->cfgtable->TransMethodOffset); 7894 h->transtable = remap_pci_mem(pci_resource_start(h->pdev, 7895 cfg_base_addr_index)+cfg_offset+trans_offset, 7896 sizeof(*h->transtable)); 7897 if (!h->transtable) { 7898 dev_err(&h->pdev->dev, "Failed mapping transfer table\n"); 7899 hpsa_free_cfgtables(h); 7900 return -ENOMEM; 7901 } 7902 return 0; 7903 } 7904 7905 static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h) 7906 { 7907 #define MIN_MAX_COMMANDS 16 7908 BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS); 7909 7910 h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands); 7911 7912 /* Limit commands in memory limited kdump scenario. */ 7913 if (reset_devices && h->max_commands > 32) 7914 h->max_commands = 32; 7915 7916 if (h->max_commands < MIN_MAX_COMMANDS) { 7917 dev_warn(&h->pdev->dev, 7918 "Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n", 7919 h->max_commands, 7920 MIN_MAX_COMMANDS); 7921 h->max_commands = MIN_MAX_COMMANDS; 7922 } 7923 } 7924 7925 /* If the controller reports that the total max sg entries is greater than 512, 7926 * then we know that chained SG blocks work. (Original smart arrays did not 7927 * support chained SG blocks and would return zero for max sg entries.) 7928 */ 7929 static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h) 7930 { 7931 return h->maxsgentries > 512; 7932 } 7933 7934 /* Interrogate the hardware for some limits: 7935 * max commands, max SG elements without chaining, and with chaining, 7936 * SG chain block size, etc. 7937 */ 7938 static void hpsa_find_board_params(struct ctlr_info *h) 7939 { 7940 hpsa_get_max_perf_mode_cmds(h); 7941 h->nr_cmds = h->max_commands; 7942 h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements)); 7943 h->fw_support = readl(&(h->cfgtable->misc_fw_support)); 7944 if (hpsa_supports_chained_sg_blocks(h)) { 7945 /* Limit in-command s/g elements to 32 save dma'able memory. */ 7946 h->max_cmd_sg_entries = 32; 7947 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries; 7948 h->maxsgentries--; /* save one for chain pointer */ 7949 } else { 7950 /* 7951 * Original smart arrays supported at most 31 s/g entries 7952 * embedded inline in the command (trying to use more 7953 * would lock up the controller) 7954 */ 7955 h->max_cmd_sg_entries = 31; 7956 h->maxsgentries = 31; /* default to traditional values */ 7957 h->chainsize = 0; 7958 } 7959 7960 /* Find out what task management functions are supported and cache */ 7961 h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags)); 7962 if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags)) 7963 dev_warn(&h->pdev->dev, "Physical aborts not supported\n"); 7964 if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags)) 7965 dev_warn(&h->pdev->dev, "Logical aborts not supported\n"); 7966 if (!(HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags)) 7967 dev_warn(&h->pdev->dev, "HP SSD Smart Path aborts not supported\n"); 7968 } 7969 7970 static inline bool hpsa_CISS_signature_present(struct ctlr_info *h) 7971 { 7972 if (!check_signature(h->cfgtable->Signature, "CISS", 4)) { 7973 dev_err(&h->pdev->dev, "not a valid CISS config table\n"); 7974 return false; 7975 } 7976 return true; 7977 } 7978 7979 static inline void hpsa_set_driver_support_bits(struct ctlr_info *h) 7980 { 7981 u32 driver_support; 7982 7983 driver_support = readl(&(h->cfgtable->driver_support)); 7984 /* Need to enable prefetch in the SCSI core for 6400 in x86 */ 7985 #ifdef CONFIG_X86 7986 driver_support |= ENABLE_SCSI_PREFETCH; 7987 #endif 7988 driver_support |= ENABLE_UNIT_ATTN; 7989 writel(driver_support, &(h->cfgtable->driver_support)); 7990 } 7991 7992 /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result 7993 * in a prefetch beyond physical memory. 7994 */ 7995 static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h) 7996 { 7997 u32 dma_prefetch; 7998 7999 if (h->board_id != 0x3225103C) 8000 return; 8001 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG); 8002 dma_prefetch |= 0x8000; 8003 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG); 8004 } 8005 8006 static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h) 8007 { 8008 int i; 8009 u32 doorbell_value; 8010 unsigned long flags; 8011 /* wait until the clear_event_notify bit 6 is cleared by controller. */ 8012 for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) { 8013 spin_lock_irqsave(&h->lock, flags); 8014 doorbell_value = readl(h->vaddr + SA5_DOORBELL); 8015 spin_unlock_irqrestore(&h->lock, flags); 8016 if (!(doorbell_value & DOORBELL_CLEAR_EVENTS)) 8017 goto done; 8018 /* delay and try again */ 8019 msleep(CLEAR_EVENT_WAIT_INTERVAL); 8020 } 8021 return -ENODEV; 8022 done: 8023 return 0; 8024 } 8025 8026 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h) 8027 { 8028 int i; 8029 u32 doorbell_value; 8030 unsigned long flags; 8031 8032 /* under certain very rare conditions, this can take awhile. 8033 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right 8034 * as we enter this code.) 8035 */ 8036 for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) { 8037 if (h->remove_in_progress) 8038 goto done; 8039 spin_lock_irqsave(&h->lock, flags); 8040 doorbell_value = readl(h->vaddr + SA5_DOORBELL); 8041 spin_unlock_irqrestore(&h->lock, flags); 8042 if (!(doorbell_value & CFGTBL_ChangeReq)) 8043 goto done; 8044 /* delay and try again */ 8045 msleep(MODE_CHANGE_WAIT_INTERVAL); 8046 } 8047 return -ENODEV; 8048 done: 8049 return 0; 8050 } 8051 8052 /* return -ENODEV or other reason on error, 0 on success */ 8053 static int hpsa_enter_simple_mode(struct ctlr_info *h) 8054 { 8055 u32 trans_support; 8056 8057 trans_support = readl(&(h->cfgtable->TransportSupport)); 8058 if (!(trans_support & SIMPLE_MODE)) 8059 return -ENOTSUPP; 8060 8061 h->max_commands = readl(&(h->cfgtable->CmdsOutMax)); 8062 8063 /* Update the field, and then ring the doorbell */ 8064 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest)); 8065 writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi); 8066 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 8067 if (hpsa_wait_for_mode_change_ack(h)) 8068 goto error; 8069 print_cfg_table(&h->pdev->dev, h->cfgtable); 8070 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) 8071 goto error; 8072 h->transMethod = CFGTBL_Trans_Simple; 8073 return 0; 8074 error: 8075 dev_err(&h->pdev->dev, "failed to enter simple mode\n"); 8076 return -ENODEV; 8077 } 8078 8079 /* free items allocated or mapped by hpsa_pci_init */ 8080 static void hpsa_free_pci_init(struct ctlr_info *h) 8081 { 8082 hpsa_free_cfgtables(h); /* pci_init 4 */ 8083 iounmap(h->vaddr); /* pci_init 3 */ 8084 h->vaddr = NULL; 8085 hpsa_disable_interrupt_mode(h); /* pci_init 2 */ 8086 /* 8087 * call pci_disable_device before pci_release_regions per 8088 * Documentation/PCI/pci.txt 8089 */ 8090 pci_disable_device(h->pdev); /* pci_init 1 */ 8091 pci_release_regions(h->pdev); /* pci_init 2 */ 8092 } 8093 8094 /* several items must be freed later */ 8095 static int hpsa_pci_init(struct ctlr_info *h) 8096 { 8097 int prod_index, err; 8098 8099 prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id); 8100 if (prod_index < 0) 8101 return prod_index; 8102 h->product_name = products[prod_index].product_name; 8103 h->access = *(products[prod_index].access); 8104 8105 h->needs_abort_tags_swizzled = 8106 ctlr_needs_abort_tags_swizzled(h->board_id); 8107 8108 pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S | 8109 PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM); 8110 8111 err = pci_enable_device(h->pdev); 8112 if (err) { 8113 dev_err(&h->pdev->dev, "failed to enable PCI device\n"); 8114 pci_disable_device(h->pdev); 8115 return err; 8116 } 8117 8118 err = pci_request_regions(h->pdev, HPSA); 8119 if (err) { 8120 dev_err(&h->pdev->dev, 8121 "failed to obtain PCI resources\n"); 8122 pci_disable_device(h->pdev); 8123 return err; 8124 } 8125 8126 pci_set_master(h->pdev); 8127 8128 err = hpsa_interrupt_mode(h); 8129 if (err) 8130 goto clean1; 8131 err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr); 8132 if (err) 8133 goto clean2; /* intmode+region, pci */ 8134 h->vaddr = remap_pci_mem(h->paddr, 0x250); 8135 if (!h->vaddr) { 8136 dev_err(&h->pdev->dev, "failed to remap PCI mem\n"); 8137 err = -ENOMEM; 8138 goto clean2; /* intmode+region, pci */ 8139 } 8140 err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 8141 if (err) 8142 goto clean3; /* vaddr, intmode+region, pci */ 8143 err = hpsa_find_cfgtables(h); 8144 if (err) 8145 goto clean3; /* vaddr, intmode+region, pci */ 8146 hpsa_find_board_params(h); 8147 8148 if (!hpsa_CISS_signature_present(h)) { 8149 err = -ENODEV; 8150 goto clean4; /* cfgtables, vaddr, intmode+region, pci */ 8151 } 8152 hpsa_set_driver_support_bits(h); 8153 hpsa_p600_dma_prefetch_quirk(h); 8154 err = hpsa_enter_simple_mode(h); 8155 if (err) 8156 goto clean4; /* cfgtables, vaddr, intmode+region, pci */ 8157 return 0; 8158 8159 clean4: /* cfgtables, vaddr, intmode+region, pci */ 8160 hpsa_free_cfgtables(h); 8161 clean3: /* vaddr, intmode+region, pci */ 8162 iounmap(h->vaddr); 8163 h->vaddr = NULL; 8164 clean2: /* intmode+region, pci */ 8165 hpsa_disable_interrupt_mode(h); 8166 clean1: 8167 /* 8168 * call pci_disable_device before pci_release_regions per 8169 * Documentation/PCI/pci.txt 8170 */ 8171 pci_disable_device(h->pdev); 8172 pci_release_regions(h->pdev); 8173 return err; 8174 } 8175 8176 static void hpsa_hba_inquiry(struct ctlr_info *h) 8177 { 8178 int rc; 8179 8180 #define HBA_INQUIRY_BYTE_COUNT 64 8181 h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL); 8182 if (!h->hba_inquiry_data) 8183 return; 8184 rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0, 8185 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT); 8186 if (rc != 0) { 8187 kfree(h->hba_inquiry_data); 8188 h->hba_inquiry_data = NULL; 8189 } 8190 } 8191 8192 static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id) 8193 { 8194 int rc, i; 8195 void __iomem *vaddr; 8196 8197 if (!reset_devices) 8198 return 0; 8199 8200 /* kdump kernel is loading, we don't know in which state is 8201 * the pci interface. The dev->enable_cnt is equal zero 8202 * so we call enable+disable, wait a while and switch it on. 8203 */ 8204 rc = pci_enable_device(pdev); 8205 if (rc) { 8206 dev_warn(&pdev->dev, "Failed to enable PCI device\n"); 8207 return -ENODEV; 8208 } 8209 pci_disable_device(pdev); 8210 msleep(260); /* a randomly chosen number */ 8211 rc = pci_enable_device(pdev); 8212 if (rc) { 8213 dev_warn(&pdev->dev, "failed to enable device.\n"); 8214 return -ENODEV; 8215 } 8216 8217 pci_set_master(pdev); 8218 8219 vaddr = pci_ioremap_bar(pdev, 0); 8220 if (vaddr == NULL) { 8221 rc = -ENOMEM; 8222 goto out_disable; 8223 } 8224 writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET); 8225 iounmap(vaddr); 8226 8227 /* Reset the controller with a PCI power-cycle or via doorbell */ 8228 rc = hpsa_kdump_hard_reset_controller(pdev, board_id); 8229 8230 /* -ENOTSUPP here means we cannot reset the controller 8231 * but it's already (and still) up and running in 8232 * "performant mode". Or, it might be 640x, which can't reset 8233 * due to concerns about shared bbwc between 6402/6404 pair. 8234 */ 8235 if (rc) 8236 goto out_disable; 8237 8238 /* Now try to get the controller to respond to a no-op */ 8239 dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n"); 8240 for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) { 8241 if (hpsa_noop(pdev) == 0) 8242 break; 8243 else 8244 dev_warn(&pdev->dev, "no-op failed%s\n", 8245 (i < 11 ? "; re-trying" : "")); 8246 } 8247 8248 out_disable: 8249 8250 pci_disable_device(pdev); 8251 return rc; 8252 } 8253 8254 static void hpsa_free_cmd_pool(struct ctlr_info *h) 8255 { 8256 kfree(h->cmd_pool_bits); 8257 h->cmd_pool_bits = NULL; 8258 if (h->cmd_pool) { 8259 pci_free_consistent(h->pdev, 8260 h->nr_cmds * sizeof(struct CommandList), 8261 h->cmd_pool, 8262 h->cmd_pool_dhandle); 8263 h->cmd_pool = NULL; 8264 h->cmd_pool_dhandle = 0; 8265 } 8266 if (h->errinfo_pool) { 8267 pci_free_consistent(h->pdev, 8268 h->nr_cmds * sizeof(struct ErrorInfo), 8269 h->errinfo_pool, 8270 h->errinfo_pool_dhandle); 8271 h->errinfo_pool = NULL; 8272 h->errinfo_pool_dhandle = 0; 8273 } 8274 } 8275 8276 static int hpsa_alloc_cmd_pool(struct ctlr_info *h) 8277 { 8278 h->cmd_pool_bits = kzalloc( 8279 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) * 8280 sizeof(unsigned long), GFP_KERNEL); 8281 h->cmd_pool = pci_alloc_consistent(h->pdev, 8282 h->nr_cmds * sizeof(*h->cmd_pool), 8283 &(h->cmd_pool_dhandle)); 8284 h->errinfo_pool = pci_alloc_consistent(h->pdev, 8285 h->nr_cmds * sizeof(*h->errinfo_pool), 8286 &(h->errinfo_pool_dhandle)); 8287 if ((h->cmd_pool_bits == NULL) 8288 || (h->cmd_pool == NULL) 8289 || (h->errinfo_pool == NULL)) { 8290 dev_err(&h->pdev->dev, "out of memory in %s", __func__); 8291 goto clean_up; 8292 } 8293 hpsa_preinitialize_commands(h); 8294 return 0; 8295 clean_up: 8296 hpsa_free_cmd_pool(h); 8297 return -ENOMEM; 8298 } 8299 8300 /* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */ 8301 static void hpsa_free_irqs(struct ctlr_info *h) 8302 { 8303 int i; 8304 8305 if (!h->msix_vectors || h->intr_mode != PERF_MODE_INT) { 8306 /* Single reply queue, only one irq to free */ 8307 free_irq(pci_irq_vector(h->pdev, 0), &h->q[h->intr_mode]); 8308 h->q[h->intr_mode] = 0; 8309 return; 8310 } 8311 8312 for (i = 0; i < h->msix_vectors; i++) { 8313 free_irq(pci_irq_vector(h->pdev, i), &h->q[i]); 8314 h->q[i] = 0; 8315 } 8316 for (; i < MAX_REPLY_QUEUES; i++) 8317 h->q[i] = 0; 8318 } 8319 8320 /* returns 0 on success; cleans up and returns -Enn on error */ 8321 static int hpsa_request_irqs(struct ctlr_info *h, 8322 irqreturn_t (*msixhandler)(int, void *), 8323 irqreturn_t (*intxhandler)(int, void *)) 8324 { 8325 int rc, i; 8326 8327 /* 8328 * initialize h->q[x] = x so that interrupt handlers know which 8329 * queue to process. 8330 */ 8331 for (i = 0; i < MAX_REPLY_QUEUES; i++) 8332 h->q[i] = (u8) i; 8333 8334 if (h->intr_mode == PERF_MODE_INT && h->msix_vectors > 0) { 8335 /* If performant mode and MSI-X, use multiple reply queues */ 8336 for (i = 0; i < h->msix_vectors; i++) { 8337 sprintf(h->intrname[i], "%s-msix%d", h->devname, i); 8338 rc = request_irq(pci_irq_vector(h->pdev, i), msixhandler, 8339 0, h->intrname[i], 8340 &h->q[i]); 8341 if (rc) { 8342 int j; 8343 8344 dev_err(&h->pdev->dev, 8345 "failed to get irq %d for %s\n", 8346 pci_irq_vector(h->pdev, i), h->devname); 8347 for (j = 0; j < i; j++) { 8348 free_irq(pci_irq_vector(h->pdev, j), &h->q[j]); 8349 h->q[j] = 0; 8350 } 8351 for (; j < MAX_REPLY_QUEUES; j++) 8352 h->q[j] = 0; 8353 return rc; 8354 } 8355 } 8356 } else { 8357 /* Use single reply pool */ 8358 if (h->msix_vectors > 0 || h->pdev->msi_enabled) { 8359 sprintf(h->intrname[0], "%s-msi%s", h->devname, 8360 h->msix_vectors ? "x" : ""); 8361 rc = request_irq(pci_irq_vector(h->pdev, 0), 8362 msixhandler, 0, 8363 h->intrname[0], 8364 &h->q[h->intr_mode]); 8365 } else { 8366 sprintf(h->intrname[h->intr_mode], 8367 "%s-intx", h->devname); 8368 rc = request_irq(pci_irq_vector(h->pdev, 0), 8369 intxhandler, IRQF_SHARED, 8370 h->intrname[0], 8371 &h->q[h->intr_mode]); 8372 } 8373 } 8374 if (rc) { 8375 dev_err(&h->pdev->dev, "failed to get irq %d for %s\n", 8376 pci_irq_vector(h->pdev, 0), h->devname); 8377 hpsa_free_irqs(h); 8378 return -ENODEV; 8379 } 8380 return 0; 8381 } 8382 8383 static int hpsa_kdump_soft_reset(struct ctlr_info *h) 8384 { 8385 int rc; 8386 hpsa_send_host_reset(h, RAID_CTLR_LUNID, HPSA_RESET_TYPE_CONTROLLER); 8387 8388 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n"); 8389 rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY); 8390 if (rc) { 8391 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n"); 8392 return rc; 8393 } 8394 8395 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n"); 8396 rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 8397 if (rc) { 8398 dev_warn(&h->pdev->dev, "Board failed to become ready " 8399 "after soft reset.\n"); 8400 return rc; 8401 } 8402 8403 return 0; 8404 } 8405 8406 static void hpsa_free_reply_queues(struct ctlr_info *h) 8407 { 8408 int i; 8409 8410 for (i = 0; i < h->nreply_queues; i++) { 8411 if (!h->reply_queue[i].head) 8412 continue; 8413 pci_free_consistent(h->pdev, 8414 h->reply_queue_size, 8415 h->reply_queue[i].head, 8416 h->reply_queue[i].busaddr); 8417 h->reply_queue[i].head = NULL; 8418 h->reply_queue[i].busaddr = 0; 8419 } 8420 h->reply_queue_size = 0; 8421 } 8422 8423 static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h) 8424 { 8425 hpsa_free_performant_mode(h); /* init_one 7 */ 8426 hpsa_free_sg_chain_blocks(h); /* init_one 6 */ 8427 hpsa_free_cmd_pool(h); /* init_one 5 */ 8428 hpsa_free_irqs(h); /* init_one 4 */ 8429 scsi_host_put(h->scsi_host); /* init_one 3 */ 8430 h->scsi_host = NULL; /* init_one 3 */ 8431 hpsa_free_pci_init(h); /* init_one 2_5 */ 8432 free_percpu(h->lockup_detected); /* init_one 2 */ 8433 h->lockup_detected = NULL; /* init_one 2 */ 8434 if (h->resubmit_wq) { 8435 destroy_workqueue(h->resubmit_wq); /* init_one 1 */ 8436 h->resubmit_wq = NULL; 8437 } 8438 if (h->rescan_ctlr_wq) { 8439 destroy_workqueue(h->rescan_ctlr_wq); 8440 h->rescan_ctlr_wq = NULL; 8441 } 8442 kfree(h); /* init_one 1 */ 8443 } 8444 8445 /* Called when controller lockup detected. */ 8446 static void fail_all_outstanding_cmds(struct ctlr_info *h) 8447 { 8448 int i, refcount; 8449 struct CommandList *c; 8450 int failcount = 0; 8451 8452 flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */ 8453 for (i = 0; i < h->nr_cmds; i++) { 8454 c = h->cmd_pool + i; 8455 refcount = atomic_inc_return(&c->refcount); 8456 if (refcount > 1) { 8457 c->err_info->CommandStatus = CMD_CTLR_LOCKUP; 8458 finish_cmd(c); 8459 atomic_dec(&h->commands_outstanding); 8460 failcount++; 8461 } 8462 cmd_free(h, c); 8463 } 8464 dev_warn(&h->pdev->dev, 8465 "failed %d commands in fail_all\n", failcount); 8466 } 8467 8468 static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value) 8469 { 8470 int cpu; 8471 8472 for_each_online_cpu(cpu) { 8473 u32 *lockup_detected; 8474 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 8475 *lockup_detected = value; 8476 } 8477 wmb(); /* be sure the per-cpu variables are out to memory */ 8478 } 8479 8480 static void controller_lockup_detected(struct ctlr_info *h) 8481 { 8482 unsigned long flags; 8483 u32 lockup_detected; 8484 8485 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8486 spin_lock_irqsave(&h->lock, flags); 8487 lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET); 8488 if (!lockup_detected) { 8489 /* no heartbeat, but controller gave us a zero. */ 8490 dev_warn(&h->pdev->dev, 8491 "lockup detected after %d but scratchpad register is zero\n", 8492 h->heartbeat_sample_interval / HZ); 8493 lockup_detected = 0xffffffff; 8494 } 8495 set_lockup_detected_for_all_cpus(h, lockup_detected); 8496 spin_unlock_irqrestore(&h->lock, flags); 8497 dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n", 8498 lockup_detected, h->heartbeat_sample_interval / HZ); 8499 pci_disable_device(h->pdev); 8500 fail_all_outstanding_cmds(h); 8501 } 8502 8503 static int detect_controller_lockup(struct ctlr_info *h) 8504 { 8505 u64 now; 8506 u32 heartbeat; 8507 unsigned long flags; 8508 8509 now = get_jiffies_64(); 8510 /* If we've received an interrupt recently, we're ok. */ 8511 if (time_after64(h->last_intr_timestamp + 8512 (h->heartbeat_sample_interval), now)) 8513 return false; 8514 8515 /* 8516 * If we've already checked the heartbeat recently, we're ok. 8517 * This could happen if someone sends us a signal. We 8518 * otherwise don't care about signals in this thread. 8519 */ 8520 if (time_after64(h->last_heartbeat_timestamp + 8521 (h->heartbeat_sample_interval), now)) 8522 return false; 8523 8524 /* If heartbeat has not changed since we last looked, we're not ok. */ 8525 spin_lock_irqsave(&h->lock, flags); 8526 heartbeat = readl(&h->cfgtable->HeartBeat); 8527 spin_unlock_irqrestore(&h->lock, flags); 8528 if (h->last_heartbeat == heartbeat) { 8529 controller_lockup_detected(h); 8530 return true; 8531 } 8532 8533 /* We're ok. */ 8534 h->last_heartbeat = heartbeat; 8535 h->last_heartbeat_timestamp = now; 8536 return false; 8537 } 8538 8539 static void hpsa_ack_ctlr_events(struct ctlr_info *h) 8540 { 8541 int i; 8542 char *event_type; 8543 8544 if (!(h->fw_support & MISC_FW_EVENT_NOTIFY)) 8545 return; 8546 8547 /* Ask the controller to clear the events we're handling. */ 8548 if ((h->transMethod & (CFGTBL_Trans_io_accel1 8549 | CFGTBL_Trans_io_accel2)) && 8550 (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE || 8551 h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) { 8552 8553 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE) 8554 event_type = "state change"; 8555 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE) 8556 event_type = "configuration change"; 8557 /* Stop sending new RAID offload reqs via the IO accelerator */ 8558 scsi_block_requests(h->scsi_host); 8559 for (i = 0; i < h->ndevices; i++) { 8560 h->dev[i]->offload_enabled = 0; 8561 h->dev[i]->offload_to_be_enabled = 0; 8562 } 8563 hpsa_drain_accel_commands(h); 8564 /* Set 'accelerator path config change' bit */ 8565 dev_warn(&h->pdev->dev, 8566 "Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n", 8567 h->events, event_type); 8568 writel(h->events, &(h->cfgtable->clear_event_notify)); 8569 /* Set the "clear event notify field update" bit 6 */ 8570 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL); 8571 /* Wait until ctlr clears 'clear event notify field', bit 6 */ 8572 hpsa_wait_for_clear_event_notify_ack(h); 8573 scsi_unblock_requests(h->scsi_host); 8574 } else { 8575 /* Acknowledge controller notification events. */ 8576 writel(h->events, &(h->cfgtable->clear_event_notify)); 8577 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL); 8578 hpsa_wait_for_clear_event_notify_ack(h); 8579 #if 0 8580 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 8581 hpsa_wait_for_mode_change_ack(h); 8582 #endif 8583 } 8584 return; 8585 } 8586 8587 /* Check a register on the controller to see if there are configuration 8588 * changes (added/changed/removed logical drives, etc.) which mean that 8589 * we should rescan the controller for devices. 8590 * Also check flag for driver-initiated rescan. 8591 */ 8592 static int hpsa_ctlr_needs_rescan(struct ctlr_info *h) 8593 { 8594 if (h->drv_req_rescan) { 8595 h->drv_req_rescan = 0; 8596 return 1; 8597 } 8598 8599 if (!(h->fw_support & MISC_FW_EVENT_NOTIFY)) 8600 return 0; 8601 8602 h->events = readl(&(h->cfgtable->event_notify)); 8603 return h->events & RESCAN_REQUIRED_EVENT_BITS; 8604 } 8605 8606 /* 8607 * Check if any of the offline devices have become ready 8608 */ 8609 static int hpsa_offline_devices_ready(struct ctlr_info *h) 8610 { 8611 unsigned long flags; 8612 struct offline_device_entry *d; 8613 struct list_head *this, *tmp; 8614 8615 spin_lock_irqsave(&h->offline_device_lock, flags); 8616 list_for_each_safe(this, tmp, &h->offline_device_list) { 8617 d = list_entry(this, struct offline_device_entry, 8618 offline_list); 8619 spin_unlock_irqrestore(&h->offline_device_lock, flags); 8620 if (!hpsa_volume_offline(h, d->scsi3addr)) { 8621 spin_lock_irqsave(&h->offline_device_lock, flags); 8622 list_del(&d->offline_list); 8623 spin_unlock_irqrestore(&h->offline_device_lock, flags); 8624 return 1; 8625 } 8626 spin_lock_irqsave(&h->offline_device_lock, flags); 8627 } 8628 spin_unlock_irqrestore(&h->offline_device_lock, flags); 8629 return 0; 8630 } 8631 8632 static int hpsa_luns_changed(struct ctlr_info *h) 8633 { 8634 int rc = 1; /* assume there are changes */ 8635 struct ReportLUNdata *logdev = NULL; 8636 8637 /* if we can't find out if lun data has changed, 8638 * assume that it has. 8639 */ 8640 8641 if (!h->lastlogicals) 8642 return rc; 8643 8644 logdev = kzalloc(sizeof(*logdev), GFP_KERNEL); 8645 if (!logdev) 8646 return rc; 8647 8648 if (hpsa_scsi_do_report_luns(h, 1, logdev, sizeof(*logdev), 0)) { 8649 dev_warn(&h->pdev->dev, 8650 "report luns failed, can't track lun changes.\n"); 8651 goto out; 8652 } 8653 if (memcmp(logdev, h->lastlogicals, sizeof(*logdev))) { 8654 dev_info(&h->pdev->dev, 8655 "Lun changes detected.\n"); 8656 memcpy(h->lastlogicals, logdev, sizeof(*logdev)); 8657 goto out; 8658 } else 8659 rc = 0; /* no changes detected. */ 8660 out: 8661 kfree(logdev); 8662 return rc; 8663 } 8664 8665 static void hpsa_perform_rescan(struct ctlr_info *h) 8666 { 8667 struct Scsi_Host *sh = NULL; 8668 unsigned long flags; 8669 8670 /* 8671 * Do the scan after the reset 8672 */ 8673 spin_lock_irqsave(&h->reset_lock, flags); 8674 if (h->reset_in_progress) { 8675 h->drv_req_rescan = 1; 8676 spin_unlock_irqrestore(&h->reset_lock, flags); 8677 return; 8678 } 8679 spin_unlock_irqrestore(&h->reset_lock, flags); 8680 8681 sh = scsi_host_get(h->scsi_host); 8682 if (sh != NULL) { 8683 hpsa_scan_start(sh); 8684 scsi_host_put(sh); 8685 h->drv_req_rescan = 0; 8686 } 8687 } 8688 8689 /* 8690 * watch for controller events 8691 */ 8692 static void hpsa_event_monitor_worker(struct work_struct *work) 8693 { 8694 struct ctlr_info *h = container_of(to_delayed_work(work), 8695 struct ctlr_info, event_monitor_work); 8696 unsigned long flags; 8697 8698 spin_lock_irqsave(&h->lock, flags); 8699 if (h->remove_in_progress) { 8700 spin_unlock_irqrestore(&h->lock, flags); 8701 return; 8702 } 8703 spin_unlock_irqrestore(&h->lock, flags); 8704 8705 if (hpsa_ctlr_needs_rescan(h)) { 8706 hpsa_ack_ctlr_events(h); 8707 hpsa_perform_rescan(h); 8708 } 8709 8710 spin_lock_irqsave(&h->lock, flags); 8711 if (!h->remove_in_progress) 8712 schedule_delayed_work(&h->event_monitor_work, 8713 HPSA_EVENT_MONITOR_INTERVAL); 8714 spin_unlock_irqrestore(&h->lock, flags); 8715 } 8716 8717 static void hpsa_rescan_ctlr_worker(struct work_struct *work) 8718 { 8719 unsigned long flags; 8720 struct ctlr_info *h = container_of(to_delayed_work(work), 8721 struct ctlr_info, rescan_ctlr_work); 8722 8723 spin_lock_irqsave(&h->lock, flags); 8724 if (h->remove_in_progress) { 8725 spin_unlock_irqrestore(&h->lock, flags); 8726 return; 8727 } 8728 spin_unlock_irqrestore(&h->lock, flags); 8729 8730 if (h->drv_req_rescan || hpsa_offline_devices_ready(h)) { 8731 hpsa_perform_rescan(h); 8732 } else if (h->discovery_polling) { 8733 hpsa_disable_rld_caching(h); 8734 if (hpsa_luns_changed(h)) { 8735 dev_info(&h->pdev->dev, 8736 "driver discovery polling rescan.\n"); 8737 hpsa_perform_rescan(h); 8738 } 8739 } 8740 spin_lock_irqsave(&h->lock, flags); 8741 if (!h->remove_in_progress) 8742 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work, 8743 h->heartbeat_sample_interval); 8744 spin_unlock_irqrestore(&h->lock, flags); 8745 } 8746 8747 static void hpsa_monitor_ctlr_worker(struct work_struct *work) 8748 { 8749 unsigned long flags; 8750 struct ctlr_info *h = container_of(to_delayed_work(work), 8751 struct ctlr_info, monitor_ctlr_work); 8752 8753 detect_controller_lockup(h); 8754 if (lockup_detected(h)) 8755 return; 8756 8757 spin_lock_irqsave(&h->lock, flags); 8758 if (!h->remove_in_progress) 8759 schedule_delayed_work(&h->monitor_ctlr_work, 8760 h->heartbeat_sample_interval); 8761 spin_unlock_irqrestore(&h->lock, flags); 8762 } 8763 8764 static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h, 8765 char *name) 8766 { 8767 struct workqueue_struct *wq = NULL; 8768 8769 wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr); 8770 if (!wq) 8771 dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name); 8772 8773 return wq; 8774 } 8775 8776 static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 8777 { 8778 int dac, rc; 8779 struct ctlr_info *h; 8780 int try_soft_reset = 0; 8781 unsigned long flags; 8782 u32 board_id; 8783 8784 if (number_of_controllers == 0) 8785 printk(KERN_INFO DRIVER_NAME "\n"); 8786 8787 rc = hpsa_lookup_board_id(pdev, &board_id); 8788 if (rc < 0) { 8789 dev_warn(&pdev->dev, "Board ID not found\n"); 8790 return rc; 8791 } 8792 8793 rc = hpsa_init_reset_devices(pdev, board_id); 8794 if (rc) { 8795 if (rc != -ENOTSUPP) 8796 return rc; 8797 /* If the reset fails in a particular way (it has no way to do 8798 * a proper hard reset, so returns -ENOTSUPP) we can try to do 8799 * a soft reset once we get the controller configured up to the 8800 * point that it can accept a command. 8801 */ 8802 try_soft_reset = 1; 8803 rc = 0; 8804 } 8805 8806 reinit_after_soft_reset: 8807 8808 /* Command structures must be aligned on a 32-byte boundary because 8809 * the 5 lower bits of the address are used by the hardware. and by 8810 * the driver. See comments in hpsa.h for more info. 8811 */ 8812 BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT); 8813 h = kzalloc(sizeof(*h), GFP_KERNEL); 8814 if (!h) { 8815 dev_err(&pdev->dev, "Failed to allocate controller head\n"); 8816 return -ENOMEM; 8817 } 8818 8819 h->pdev = pdev; 8820 8821 h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT; 8822 INIT_LIST_HEAD(&h->offline_device_list); 8823 spin_lock_init(&h->lock); 8824 spin_lock_init(&h->offline_device_lock); 8825 spin_lock_init(&h->scan_lock); 8826 spin_lock_init(&h->reset_lock); 8827 atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS); 8828 atomic_set(&h->abort_cmds_available, HPSA_CMDS_RESERVED_FOR_ABORTS); 8829 8830 /* Allocate and clear per-cpu variable lockup_detected */ 8831 h->lockup_detected = alloc_percpu(u32); 8832 if (!h->lockup_detected) { 8833 dev_err(&h->pdev->dev, "Failed to allocate lockup detector\n"); 8834 rc = -ENOMEM; 8835 goto clean1; /* aer/h */ 8836 } 8837 set_lockup_detected_for_all_cpus(h, 0); 8838 8839 rc = hpsa_pci_init(h); 8840 if (rc) 8841 goto clean2; /* lu, aer/h */ 8842 8843 /* relies on h-> settings made by hpsa_pci_init, including 8844 * interrupt_mode h->intr */ 8845 rc = hpsa_scsi_host_alloc(h); 8846 if (rc) 8847 goto clean2_5; /* pci, lu, aer/h */ 8848 8849 sprintf(h->devname, HPSA "%d", h->scsi_host->host_no); 8850 h->ctlr = number_of_controllers; 8851 number_of_controllers++; 8852 8853 /* configure PCI DMA stuff */ 8854 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 8855 if (rc == 0) { 8856 dac = 1; 8857 } else { 8858 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 8859 if (rc == 0) { 8860 dac = 0; 8861 } else { 8862 dev_err(&pdev->dev, "no suitable DMA available\n"); 8863 goto clean3; /* shost, pci, lu, aer/h */ 8864 } 8865 } 8866 8867 /* make sure the board interrupts are off */ 8868 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8869 8870 rc = hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx); 8871 if (rc) 8872 goto clean3; /* shost, pci, lu, aer/h */ 8873 rc = hpsa_alloc_cmd_pool(h); 8874 if (rc) 8875 goto clean4; /* irq, shost, pci, lu, aer/h */ 8876 rc = hpsa_alloc_sg_chain_blocks(h); 8877 if (rc) 8878 goto clean5; /* cmd, irq, shost, pci, lu, aer/h */ 8879 init_waitqueue_head(&h->scan_wait_queue); 8880 init_waitqueue_head(&h->abort_cmd_wait_queue); 8881 init_waitqueue_head(&h->event_sync_wait_queue); 8882 mutex_init(&h->reset_mutex); 8883 h->scan_finished = 1; /* no scan currently in progress */ 8884 h->scan_waiting = 0; 8885 8886 pci_set_drvdata(pdev, h); 8887 h->ndevices = 0; 8888 8889 spin_lock_init(&h->devlock); 8890 rc = hpsa_put_ctlr_into_performant_mode(h); 8891 if (rc) 8892 goto clean6; /* sg, cmd, irq, shost, pci, lu, aer/h */ 8893 8894 /* create the resubmit workqueue */ 8895 h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan"); 8896 if (!h->rescan_ctlr_wq) { 8897 rc = -ENOMEM; 8898 goto clean7; 8899 } 8900 8901 h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit"); 8902 if (!h->resubmit_wq) { 8903 rc = -ENOMEM; 8904 goto clean7; /* aer/h */ 8905 } 8906 8907 /* 8908 * At this point, the controller is ready to take commands. 8909 * Now, if reset_devices and the hard reset didn't work, try 8910 * the soft reset and see if that works. 8911 */ 8912 if (try_soft_reset) { 8913 8914 /* This is kind of gross. We may or may not get a completion 8915 * from the soft reset command, and if we do, then the value 8916 * from the fifo may or may not be valid. So, we wait 10 secs 8917 * after the reset throwing away any completions we get during 8918 * that time. Unregister the interrupt handler and register 8919 * fake ones to scoop up any residual completions. 8920 */ 8921 spin_lock_irqsave(&h->lock, flags); 8922 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8923 spin_unlock_irqrestore(&h->lock, flags); 8924 hpsa_free_irqs(h); 8925 rc = hpsa_request_irqs(h, hpsa_msix_discard_completions, 8926 hpsa_intx_discard_completions); 8927 if (rc) { 8928 dev_warn(&h->pdev->dev, 8929 "Failed to request_irq after soft reset.\n"); 8930 /* 8931 * cannot goto clean7 or free_irqs will be called 8932 * again. Instead, do its work 8933 */ 8934 hpsa_free_performant_mode(h); /* clean7 */ 8935 hpsa_free_sg_chain_blocks(h); /* clean6 */ 8936 hpsa_free_cmd_pool(h); /* clean5 */ 8937 /* 8938 * skip hpsa_free_irqs(h) clean4 since that 8939 * was just called before request_irqs failed 8940 */ 8941 goto clean3; 8942 } 8943 8944 rc = hpsa_kdump_soft_reset(h); 8945 if (rc) 8946 /* Neither hard nor soft reset worked, we're hosed. */ 8947 goto clean7; 8948 8949 dev_info(&h->pdev->dev, "Board READY.\n"); 8950 dev_info(&h->pdev->dev, 8951 "Waiting for stale completions to drain.\n"); 8952 h->access.set_intr_mask(h, HPSA_INTR_ON); 8953 msleep(10000); 8954 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8955 8956 rc = controller_reset_failed(h->cfgtable); 8957 if (rc) 8958 dev_info(&h->pdev->dev, 8959 "Soft reset appears to have failed.\n"); 8960 8961 /* since the controller's reset, we have to go back and re-init 8962 * everything. Easiest to just forget what we've done and do it 8963 * all over again. 8964 */ 8965 hpsa_undo_allocations_after_kdump_soft_reset(h); 8966 try_soft_reset = 0; 8967 if (rc) 8968 /* don't goto clean, we already unallocated */ 8969 return -ENODEV; 8970 8971 goto reinit_after_soft_reset; 8972 } 8973 8974 /* Enable Accelerated IO path at driver layer */ 8975 h->acciopath_status = 1; 8976 /* Disable discovery polling.*/ 8977 h->discovery_polling = 0; 8978 8979 8980 /* Turn the interrupts on so we can service requests */ 8981 h->access.set_intr_mask(h, HPSA_INTR_ON); 8982 8983 hpsa_hba_inquiry(h); 8984 8985 h->lastlogicals = kzalloc(sizeof(*(h->lastlogicals)), GFP_KERNEL); 8986 if (!h->lastlogicals) 8987 dev_info(&h->pdev->dev, 8988 "Can't track change to report lun data\n"); 8989 8990 /* hook into SCSI subsystem */ 8991 rc = hpsa_scsi_add_host(h); 8992 if (rc) 8993 goto clean7; /* perf, sg, cmd, irq, shost, pci, lu, aer/h */ 8994 8995 /* Monitor the controller for firmware lockups */ 8996 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 8997 INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker); 8998 schedule_delayed_work(&h->monitor_ctlr_work, 8999 h->heartbeat_sample_interval); 9000 INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker); 9001 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work, 9002 h->heartbeat_sample_interval); 9003 INIT_DELAYED_WORK(&h->event_monitor_work, hpsa_event_monitor_worker); 9004 schedule_delayed_work(&h->event_monitor_work, 9005 HPSA_EVENT_MONITOR_INTERVAL); 9006 return 0; 9007 9008 clean7: /* perf, sg, cmd, irq, shost, pci, lu, aer/h */ 9009 hpsa_free_performant_mode(h); 9010 h->access.set_intr_mask(h, HPSA_INTR_OFF); 9011 clean6: /* sg, cmd, irq, pci, lockup, wq/aer/h */ 9012 hpsa_free_sg_chain_blocks(h); 9013 clean5: /* cmd, irq, shost, pci, lu, aer/h */ 9014 hpsa_free_cmd_pool(h); 9015 clean4: /* irq, shost, pci, lu, aer/h */ 9016 hpsa_free_irqs(h); 9017 clean3: /* shost, pci, lu, aer/h */ 9018 scsi_host_put(h->scsi_host); 9019 h->scsi_host = NULL; 9020 clean2_5: /* pci, lu, aer/h */ 9021 hpsa_free_pci_init(h); 9022 clean2: /* lu, aer/h */ 9023 if (h->lockup_detected) { 9024 free_percpu(h->lockup_detected); 9025 h->lockup_detected = NULL; 9026 } 9027 clean1: /* wq/aer/h */ 9028 if (h->resubmit_wq) { 9029 destroy_workqueue(h->resubmit_wq); 9030 h->resubmit_wq = NULL; 9031 } 9032 if (h->rescan_ctlr_wq) { 9033 destroy_workqueue(h->rescan_ctlr_wq); 9034 h->rescan_ctlr_wq = NULL; 9035 } 9036 kfree(h); 9037 return rc; 9038 } 9039 9040 static void hpsa_flush_cache(struct ctlr_info *h) 9041 { 9042 char *flush_buf; 9043 struct CommandList *c; 9044 int rc; 9045 9046 if (unlikely(lockup_detected(h))) 9047 return; 9048 flush_buf = kzalloc(4, GFP_KERNEL); 9049 if (!flush_buf) 9050 return; 9051 9052 c = cmd_alloc(h); 9053 9054 if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0, 9055 RAID_CTLR_LUNID, TYPE_CMD)) { 9056 goto out; 9057 } 9058 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 9059 PCI_DMA_TODEVICE, DEFAULT_TIMEOUT); 9060 if (rc) 9061 goto out; 9062 if (c->err_info->CommandStatus != 0) 9063 out: 9064 dev_warn(&h->pdev->dev, 9065 "error flushing cache on controller\n"); 9066 cmd_free(h, c); 9067 kfree(flush_buf); 9068 } 9069 9070 /* Make controller gather fresh report lun data each time we 9071 * send down a report luns request 9072 */ 9073 static void hpsa_disable_rld_caching(struct ctlr_info *h) 9074 { 9075 u32 *options; 9076 struct CommandList *c; 9077 int rc; 9078 9079 /* Don't bother trying to set diag options if locked up */ 9080 if (unlikely(h->lockup_detected)) 9081 return; 9082 9083 options = kzalloc(sizeof(*options), GFP_KERNEL); 9084 if (!options) 9085 return; 9086 9087 c = cmd_alloc(h); 9088 9089 /* first, get the current diag options settings */ 9090 if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0, 9091 RAID_CTLR_LUNID, TYPE_CMD)) 9092 goto errout; 9093 9094 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 9095 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 9096 if ((rc != 0) || (c->err_info->CommandStatus != 0)) 9097 goto errout; 9098 9099 /* Now, set the bit for disabling the RLD caching */ 9100 *options |= HPSA_DIAG_OPTS_DISABLE_RLD_CACHING; 9101 9102 if (fill_cmd(c, BMIC_SET_DIAG_OPTIONS, h, options, 4, 0, 9103 RAID_CTLR_LUNID, TYPE_CMD)) 9104 goto errout; 9105 9106 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 9107 PCI_DMA_TODEVICE, DEFAULT_TIMEOUT); 9108 if ((rc != 0) || (c->err_info->CommandStatus != 0)) 9109 goto errout; 9110 9111 /* Now verify that it got set: */ 9112 if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0, 9113 RAID_CTLR_LUNID, TYPE_CMD)) 9114 goto errout; 9115 9116 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 9117 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 9118 if ((rc != 0) || (c->err_info->CommandStatus != 0)) 9119 goto errout; 9120 9121 if (*options & HPSA_DIAG_OPTS_DISABLE_RLD_CACHING) 9122 goto out; 9123 9124 errout: 9125 dev_err(&h->pdev->dev, 9126 "Error: failed to disable report lun data caching.\n"); 9127 out: 9128 cmd_free(h, c); 9129 kfree(options); 9130 } 9131 9132 static void hpsa_shutdown(struct pci_dev *pdev) 9133 { 9134 struct ctlr_info *h; 9135 9136 h = pci_get_drvdata(pdev); 9137 /* Turn board interrupts off and send the flush cache command 9138 * sendcmd will turn off interrupt, and send the flush... 9139 * To write all data in the battery backed cache to disks 9140 */ 9141 hpsa_flush_cache(h); 9142 h->access.set_intr_mask(h, HPSA_INTR_OFF); 9143 hpsa_free_irqs(h); /* init_one 4 */ 9144 hpsa_disable_interrupt_mode(h); /* pci_init 2 */ 9145 } 9146 9147 static void hpsa_free_device_info(struct ctlr_info *h) 9148 { 9149 int i; 9150 9151 for (i = 0; i < h->ndevices; i++) { 9152 kfree(h->dev[i]); 9153 h->dev[i] = NULL; 9154 } 9155 } 9156 9157 static void hpsa_remove_one(struct pci_dev *pdev) 9158 { 9159 struct ctlr_info *h; 9160 unsigned long flags; 9161 9162 if (pci_get_drvdata(pdev) == NULL) { 9163 dev_err(&pdev->dev, "unable to remove device\n"); 9164 return; 9165 } 9166 h = pci_get_drvdata(pdev); 9167 9168 /* Get rid of any controller monitoring work items */ 9169 spin_lock_irqsave(&h->lock, flags); 9170 h->remove_in_progress = 1; 9171 spin_unlock_irqrestore(&h->lock, flags); 9172 cancel_delayed_work_sync(&h->monitor_ctlr_work); 9173 cancel_delayed_work_sync(&h->rescan_ctlr_work); 9174 cancel_delayed_work_sync(&h->event_monitor_work); 9175 destroy_workqueue(h->rescan_ctlr_wq); 9176 destroy_workqueue(h->resubmit_wq); 9177 9178 /* 9179 * Call before disabling interrupts. 9180 * scsi_remove_host can trigger I/O operations especially 9181 * when multipath is enabled. There can be SYNCHRONIZE CACHE 9182 * operations which cannot complete and will hang the system. 9183 */ 9184 if (h->scsi_host) 9185 scsi_remove_host(h->scsi_host); /* init_one 8 */ 9186 /* includes hpsa_free_irqs - init_one 4 */ 9187 /* includes hpsa_disable_interrupt_mode - pci_init 2 */ 9188 hpsa_shutdown(pdev); 9189 9190 hpsa_free_device_info(h); /* scan */ 9191 9192 kfree(h->hba_inquiry_data); /* init_one 10 */ 9193 h->hba_inquiry_data = NULL; /* init_one 10 */ 9194 hpsa_free_ioaccel2_sg_chain_blocks(h); 9195 hpsa_free_performant_mode(h); /* init_one 7 */ 9196 hpsa_free_sg_chain_blocks(h); /* init_one 6 */ 9197 hpsa_free_cmd_pool(h); /* init_one 5 */ 9198 kfree(h->lastlogicals); 9199 9200 /* hpsa_free_irqs already called via hpsa_shutdown init_one 4 */ 9201 9202 scsi_host_put(h->scsi_host); /* init_one 3 */ 9203 h->scsi_host = NULL; /* init_one 3 */ 9204 9205 /* includes hpsa_disable_interrupt_mode - pci_init 2 */ 9206 hpsa_free_pci_init(h); /* init_one 2.5 */ 9207 9208 free_percpu(h->lockup_detected); /* init_one 2 */ 9209 h->lockup_detected = NULL; /* init_one 2 */ 9210 /* (void) pci_disable_pcie_error_reporting(pdev); */ /* init_one 1 */ 9211 9212 hpsa_delete_sas_host(h); 9213 9214 kfree(h); /* init_one 1 */ 9215 } 9216 9217 static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev, 9218 __attribute__((unused)) pm_message_t state) 9219 { 9220 return -ENOSYS; 9221 } 9222 9223 static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev) 9224 { 9225 return -ENOSYS; 9226 } 9227 9228 static struct pci_driver hpsa_pci_driver = { 9229 .name = HPSA, 9230 .probe = hpsa_init_one, 9231 .remove = hpsa_remove_one, 9232 .id_table = hpsa_pci_device_id, /* id_table */ 9233 .shutdown = hpsa_shutdown, 9234 .suspend = hpsa_suspend, 9235 .resume = hpsa_resume, 9236 }; 9237 9238 /* Fill in bucket_map[], given nsgs (the max number of 9239 * scatter gather elements supported) and bucket[], 9240 * which is an array of 8 integers. The bucket[] array 9241 * contains 8 different DMA transfer sizes (in 16 9242 * byte increments) which the controller uses to fetch 9243 * commands. This function fills in bucket_map[], which 9244 * maps a given number of scatter gather elements to one of 9245 * the 8 DMA transfer sizes. The point of it is to allow the 9246 * controller to only do as much DMA as needed to fetch the 9247 * command, with the DMA transfer size encoded in the lower 9248 * bits of the command address. 9249 */ 9250 static void calc_bucket_map(int bucket[], int num_buckets, 9251 int nsgs, int min_blocks, u32 *bucket_map) 9252 { 9253 int i, j, b, size; 9254 9255 /* Note, bucket_map must have nsgs+1 entries. */ 9256 for (i = 0; i <= nsgs; i++) { 9257 /* Compute size of a command with i SG entries */ 9258 size = i + min_blocks; 9259 b = num_buckets; /* Assume the biggest bucket */ 9260 /* Find the bucket that is just big enough */ 9261 for (j = 0; j < num_buckets; j++) { 9262 if (bucket[j] >= size) { 9263 b = j; 9264 break; 9265 } 9266 } 9267 /* for a command with i SG entries, use bucket b. */ 9268 bucket_map[i] = b; 9269 } 9270 } 9271 9272 /* 9273 * return -ENODEV on err, 0 on success (or no action) 9274 * allocates numerous items that must be freed later 9275 */ 9276 static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support) 9277 { 9278 int i; 9279 unsigned long register_value; 9280 unsigned long transMethod = CFGTBL_Trans_Performant | 9281 (trans_support & CFGTBL_Trans_use_short_tags) | 9282 CFGTBL_Trans_enable_directed_msix | 9283 (trans_support & (CFGTBL_Trans_io_accel1 | 9284 CFGTBL_Trans_io_accel2)); 9285 struct access_method access = SA5_performant_access; 9286 9287 /* This is a bit complicated. There are 8 registers on 9288 * the controller which we write to to tell it 8 different 9289 * sizes of commands which there may be. It's a way of 9290 * reducing the DMA done to fetch each command. Encoded into 9291 * each command's tag are 3 bits which communicate to the controller 9292 * which of the eight sizes that command fits within. The size of 9293 * each command depends on how many scatter gather entries there are. 9294 * Each SG entry requires 16 bytes. The eight registers are programmed 9295 * with the number of 16-byte blocks a command of that size requires. 9296 * The smallest command possible requires 5 such 16 byte blocks. 9297 * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte 9298 * blocks. Note, this only extends to the SG entries contained 9299 * within the command block, and does not extend to chained blocks 9300 * of SG elements. bft[] contains the eight values we write to 9301 * the registers. They are not evenly distributed, but have more 9302 * sizes for small commands, and fewer sizes for larger commands. 9303 */ 9304 int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4}; 9305 #define MIN_IOACCEL2_BFT_ENTRY 5 9306 #define HPSA_IOACCEL2_HEADER_SZ 4 9307 int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12, 9308 13, 14, 15, 16, 17, 18, 19, 9309 HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES}; 9310 BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16); 9311 BUILD_BUG_ON(ARRAY_SIZE(bft) != 8); 9312 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) > 9313 16 * MIN_IOACCEL2_BFT_ENTRY); 9314 BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16); 9315 BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4); 9316 /* 5 = 1 s/g entry or 4k 9317 * 6 = 2 s/g entry or 8k 9318 * 8 = 4 s/g entry or 16k 9319 * 10 = 6 s/g entry or 24k 9320 */ 9321 9322 /* If the controller supports either ioaccel method then 9323 * we can also use the RAID stack submit path that does not 9324 * perform the superfluous readl() after each command submission. 9325 */ 9326 if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2)) 9327 access = SA5_performant_access_no_read; 9328 9329 /* Controller spec: zero out this buffer. */ 9330 for (i = 0; i < h->nreply_queues; i++) 9331 memset(h->reply_queue[i].head, 0, h->reply_queue_size); 9332 9333 bft[7] = SG_ENTRIES_IN_CMD + 4; 9334 calc_bucket_map(bft, ARRAY_SIZE(bft), 9335 SG_ENTRIES_IN_CMD, 4, h->blockFetchTable); 9336 for (i = 0; i < 8; i++) 9337 writel(bft[i], &h->transtable->BlockFetch[i]); 9338 9339 /* size of controller ring buffer */ 9340 writel(h->max_commands, &h->transtable->RepQSize); 9341 writel(h->nreply_queues, &h->transtable->RepQCount); 9342 writel(0, &h->transtable->RepQCtrAddrLow32); 9343 writel(0, &h->transtable->RepQCtrAddrHigh32); 9344 9345 for (i = 0; i < h->nreply_queues; i++) { 9346 writel(0, &h->transtable->RepQAddr[i].upper); 9347 writel(h->reply_queue[i].busaddr, 9348 &h->transtable->RepQAddr[i].lower); 9349 } 9350 9351 writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi); 9352 writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest)); 9353 /* 9354 * enable outbound interrupt coalescing in accelerator mode; 9355 */ 9356 if (trans_support & CFGTBL_Trans_io_accel1) { 9357 access = SA5_ioaccel_mode1_access; 9358 writel(10, &h->cfgtable->HostWrite.CoalIntDelay); 9359 writel(4, &h->cfgtable->HostWrite.CoalIntCount); 9360 } else 9361 if (trans_support & CFGTBL_Trans_io_accel2) 9362 access = SA5_ioaccel_mode2_access; 9363 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 9364 if (hpsa_wait_for_mode_change_ack(h)) { 9365 dev_err(&h->pdev->dev, 9366 "performant mode problem - doorbell timeout\n"); 9367 return -ENODEV; 9368 } 9369 register_value = readl(&(h->cfgtable->TransportActive)); 9370 if (!(register_value & CFGTBL_Trans_Performant)) { 9371 dev_err(&h->pdev->dev, 9372 "performant mode problem - transport not active\n"); 9373 return -ENODEV; 9374 } 9375 /* Change the access methods to the performant access methods */ 9376 h->access = access; 9377 h->transMethod = transMethod; 9378 9379 if (!((trans_support & CFGTBL_Trans_io_accel1) || 9380 (trans_support & CFGTBL_Trans_io_accel2))) 9381 return 0; 9382 9383 if (trans_support & CFGTBL_Trans_io_accel1) { 9384 /* Set up I/O accelerator mode */ 9385 for (i = 0; i < h->nreply_queues; i++) { 9386 writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX); 9387 h->reply_queue[i].current_entry = 9388 readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX); 9389 } 9390 bft[7] = h->ioaccel_maxsg + 8; 9391 calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8, 9392 h->ioaccel1_blockFetchTable); 9393 9394 /* initialize all reply queue entries to unused */ 9395 for (i = 0; i < h->nreply_queues; i++) 9396 memset(h->reply_queue[i].head, 9397 (u8) IOACCEL_MODE1_REPLY_UNUSED, 9398 h->reply_queue_size); 9399 9400 /* set all the constant fields in the accelerator command 9401 * frames once at init time to save CPU cycles later. 9402 */ 9403 for (i = 0; i < h->nr_cmds; i++) { 9404 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i]; 9405 9406 cp->function = IOACCEL1_FUNCTION_SCSIIO; 9407 cp->err_info = (u32) (h->errinfo_pool_dhandle + 9408 (i * sizeof(struct ErrorInfo))); 9409 cp->err_info_len = sizeof(struct ErrorInfo); 9410 cp->sgl_offset = IOACCEL1_SGLOFFSET; 9411 cp->host_context_flags = 9412 cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT); 9413 cp->timeout_sec = 0; 9414 cp->ReplyQueue = 0; 9415 cp->tag = 9416 cpu_to_le64((i << DIRECT_LOOKUP_SHIFT)); 9417 cp->host_addr = 9418 cpu_to_le64(h->ioaccel_cmd_pool_dhandle + 9419 (i * sizeof(struct io_accel1_cmd))); 9420 } 9421 } else if (trans_support & CFGTBL_Trans_io_accel2) { 9422 u64 cfg_offset, cfg_base_addr_index; 9423 u32 bft2_offset, cfg_base_addr; 9424 int rc; 9425 9426 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 9427 &cfg_base_addr_index, &cfg_offset); 9428 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64); 9429 bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ; 9430 calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg, 9431 4, h->ioaccel2_blockFetchTable); 9432 bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset); 9433 BUILD_BUG_ON(offsetof(struct CfgTable, 9434 io_accel_request_size_offset) != 0xb8); 9435 h->ioaccel2_bft2_regs = 9436 remap_pci_mem(pci_resource_start(h->pdev, 9437 cfg_base_addr_index) + 9438 cfg_offset + bft2_offset, 9439 ARRAY_SIZE(bft2) * 9440 sizeof(*h->ioaccel2_bft2_regs)); 9441 for (i = 0; i < ARRAY_SIZE(bft2); i++) 9442 writel(bft2[i], &h->ioaccel2_bft2_regs[i]); 9443 } 9444 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 9445 if (hpsa_wait_for_mode_change_ack(h)) { 9446 dev_err(&h->pdev->dev, 9447 "performant mode problem - enabling ioaccel mode\n"); 9448 return -ENODEV; 9449 } 9450 return 0; 9451 } 9452 9453 /* Free ioaccel1 mode command blocks and block fetch table */ 9454 static void hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info *h) 9455 { 9456 if (h->ioaccel_cmd_pool) { 9457 pci_free_consistent(h->pdev, 9458 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool), 9459 h->ioaccel_cmd_pool, 9460 h->ioaccel_cmd_pool_dhandle); 9461 h->ioaccel_cmd_pool = NULL; 9462 h->ioaccel_cmd_pool_dhandle = 0; 9463 } 9464 kfree(h->ioaccel1_blockFetchTable); 9465 h->ioaccel1_blockFetchTable = NULL; 9466 } 9467 9468 /* Allocate ioaccel1 mode command blocks and block fetch table */ 9469 static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h) 9470 { 9471 h->ioaccel_maxsg = 9472 readl(&(h->cfgtable->io_accel_max_embedded_sg_count)); 9473 if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES) 9474 h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES; 9475 9476 /* Command structures must be aligned on a 128-byte boundary 9477 * because the 7 lower bits of the address are used by the 9478 * hardware. 9479 */ 9480 BUILD_BUG_ON(sizeof(struct io_accel1_cmd) % 9481 IOACCEL1_COMMANDLIST_ALIGNMENT); 9482 h->ioaccel_cmd_pool = 9483 pci_alloc_consistent(h->pdev, 9484 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool), 9485 &(h->ioaccel_cmd_pool_dhandle)); 9486 9487 h->ioaccel1_blockFetchTable = 9488 kmalloc(((h->ioaccel_maxsg + 1) * 9489 sizeof(u32)), GFP_KERNEL); 9490 9491 if ((h->ioaccel_cmd_pool == NULL) || 9492 (h->ioaccel1_blockFetchTable == NULL)) 9493 goto clean_up; 9494 9495 memset(h->ioaccel_cmd_pool, 0, 9496 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool)); 9497 return 0; 9498 9499 clean_up: 9500 hpsa_free_ioaccel1_cmd_and_bft(h); 9501 return -ENOMEM; 9502 } 9503 9504 /* Free ioaccel2 mode command blocks and block fetch table */ 9505 static void hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info *h) 9506 { 9507 hpsa_free_ioaccel2_sg_chain_blocks(h); 9508 9509 if (h->ioaccel2_cmd_pool) { 9510 pci_free_consistent(h->pdev, 9511 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 9512 h->ioaccel2_cmd_pool, 9513 h->ioaccel2_cmd_pool_dhandle); 9514 h->ioaccel2_cmd_pool = NULL; 9515 h->ioaccel2_cmd_pool_dhandle = 0; 9516 } 9517 kfree(h->ioaccel2_blockFetchTable); 9518 h->ioaccel2_blockFetchTable = NULL; 9519 } 9520 9521 /* Allocate ioaccel2 mode command blocks and block fetch table */ 9522 static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h) 9523 { 9524 int rc; 9525 9526 /* Allocate ioaccel2 mode command blocks and block fetch table */ 9527 9528 h->ioaccel_maxsg = 9529 readl(&(h->cfgtable->io_accel_max_embedded_sg_count)); 9530 if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES) 9531 h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES; 9532 9533 BUILD_BUG_ON(sizeof(struct io_accel2_cmd) % 9534 IOACCEL2_COMMANDLIST_ALIGNMENT); 9535 h->ioaccel2_cmd_pool = 9536 pci_alloc_consistent(h->pdev, 9537 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 9538 &(h->ioaccel2_cmd_pool_dhandle)); 9539 9540 h->ioaccel2_blockFetchTable = 9541 kmalloc(((h->ioaccel_maxsg + 1) * 9542 sizeof(u32)), GFP_KERNEL); 9543 9544 if ((h->ioaccel2_cmd_pool == NULL) || 9545 (h->ioaccel2_blockFetchTable == NULL)) { 9546 rc = -ENOMEM; 9547 goto clean_up; 9548 } 9549 9550 rc = hpsa_allocate_ioaccel2_sg_chain_blocks(h); 9551 if (rc) 9552 goto clean_up; 9553 9554 memset(h->ioaccel2_cmd_pool, 0, 9555 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool)); 9556 return 0; 9557 9558 clean_up: 9559 hpsa_free_ioaccel2_cmd_and_bft(h); 9560 return rc; 9561 } 9562 9563 /* Free items allocated by hpsa_put_ctlr_into_performant_mode */ 9564 static void hpsa_free_performant_mode(struct ctlr_info *h) 9565 { 9566 kfree(h->blockFetchTable); 9567 h->blockFetchTable = NULL; 9568 hpsa_free_reply_queues(h); 9569 hpsa_free_ioaccel1_cmd_and_bft(h); 9570 hpsa_free_ioaccel2_cmd_and_bft(h); 9571 } 9572 9573 /* return -ENODEV on error, 0 on success (or no action) 9574 * allocates numerous items that must be freed later 9575 */ 9576 static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h) 9577 { 9578 u32 trans_support; 9579 unsigned long transMethod = CFGTBL_Trans_Performant | 9580 CFGTBL_Trans_use_short_tags; 9581 int i, rc; 9582 9583 if (hpsa_simple_mode) 9584 return 0; 9585 9586 trans_support = readl(&(h->cfgtable->TransportSupport)); 9587 if (!(trans_support & PERFORMANT_MODE)) 9588 return 0; 9589 9590 /* Check for I/O accelerator mode support */ 9591 if (trans_support & CFGTBL_Trans_io_accel1) { 9592 transMethod |= CFGTBL_Trans_io_accel1 | 9593 CFGTBL_Trans_enable_directed_msix; 9594 rc = hpsa_alloc_ioaccel1_cmd_and_bft(h); 9595 if (rc) 9596 return rc; 9597 } else if (trans_support & CFGTBL_Trans_io_accel2) { 9598 transMethod |= CFGTBL_Trans_io_accel2 | 9599 CFGTBL_Trans_enable_directed_msix; 9600 rc = hpsa_alloc_ioaccel2_cmd_and_bft(h); 9601 if (rc) 9602 return rc; 9603 } 9604 9605 h->nreply_queues = h->msix_vectors > 0 ? h->msix_vectors : 1; 9606 hpsa_get_max_perf_mode_cmds(h); 9607 /* Performant mode ring buffer and supporting data structures */ 9608 h->reply_queue_size = h->max_commands * sizeof(u64); 9609 9610 for (i = 0; i < h->nreply_queues; i++) { 9611 h->reply_queue[i].head = pci_alloc_consistent(h->pdev, 9612 h->reply_queue_size, 9613 &(h->reply_queue[i].busaddr)); 9614 if (!h->reply_queue[i].head) { 9615 rc = -ENOMEM; 9616 goto clean1; /* rq, ioaccel */ 9617 } 9618 h->reply_queue[i].size = h->max_commands; 9619 h->reply_queue[i].wraparound = 1; /* spec: init to 1 */ 9620 h->reply_queue[i].current_entry = 0; 9621 } 9622 9623 /* Need a block fetch table for performant mode */ 9624 h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) * 9625 sizeof(u32)), GFP_KERNEL); 9626 if (!h->blockFetchTable) { 9627 rc = -ENOMEM; 9628 goto clean1; /* rq, ioaccel */ 9629 } 9630 9631 rc = hpsa_enter_performant_mode(h, trans_support); 9632 if (rc) 9633 goto clean2; /* bft, rq, ioaccel */ 9634 return 0; 9635 9636 clean2: /* bft, rq, ioaccel */ 9637 kfree(h->blockFetchTable); 9638 h->blockFetchTable = NULL; 9639 clean1: /* rq, ioaccel */ 9640 hpsa_free_reply_queues(h); 9641 hpsa_free_ioaccel1_cmd_and_bft(h); 9642 hpsa_free_ioaccel2_cmd_and_bft(h); 9643 return rc; 9644 } 9645 9646 static int is_accelerated_cmd(struct CommandList *c) 9647 { 9648 return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2; 9649 } 9650 9651 static void hpsa_drain_accel_commands(struct ctlr_info *h) 9652 { 9653 struct CommandList *c = NULL; 9654 int i, accel_cmds_out; 9655 int refcount; 9656 9657 do { /* wait for all outstanding ioaccel commands to drain out */ 9658 accel_cmds_out = 0; 9659 for (i = 0; i < h->nr_cmds; i++) { 9660 c = h->cmd_pool + i; 9661 refcount = atomic_inc_return(&c->refcount); 9662 if (refcount > 1) /* Command is allocated */ 9663 accel_cmds_out += is_accelerated_cmd(c); 9664 cmd_free(h, c); 9665 } 9666 if (accel_cmds_out <= 0) 9667 break; 9668 msleep(100); 9669 } while (1); 9670 } 9671 9672 static struct hpsa_sas_phy *hpsa_alloc_sas_phy( 9673 struct hpsa_sas_port *hpsa_sas_port) 9674 { 9675 struct hpsa_sas_phy *hpsa_sas_phy; 9676 struct sas_phy *phy; 9677 9678 hpsa_sas_phy = kzalloc(sizeof(*hpsa_sas_phy), GFP_KERNEL); 9679 if (!hpsa_sas_phy) 9680 return NULL; 9681 9682 phy = sas_phy_alloc(hpsa_sas_port->parent_node->parent_dev, 9683 hpsa_sas_port->next_phy_index); 9684 if (!phy) { 9685 kfree(hpsa_sas_phy); 9686 return NULL; 9687 } 9688 9689 hpsa_sas_port->next_phy_index++; 9690 hpsa_sas_phy->phy = phy; 9691 hpsa_sas_phy->parent_port = hpsa_sas_port; 9692 9693 return hpsa_sas_phy; 9694 } 9695 9696 static void hpsa_free_sas_phy(struct hpsa_sas_phy *hpsa_sas_phy) 9697 { 9698 struct sas_phy *phy = hpsa_sas_phy->phy; 9699 9700 sas_port_delete_phy(hpsa_sas_phy->parent_port->port, phy); 9701 sas_phy_free(phy); 9702 if (hpsa_sas_phy->added_to_port) 9703 list_del(&hpsa_sas_phy->phy_list_entry); 9704 kfree(hpsa_sas_phy); 9705 } 9706 9707 static int hpsa_sas_port_add_phy(struct hpsa_sas_phy *hpsa_sas_phy) 9708 { 9709 int rc; 9710 struct hpsa_sas_port *hpsa_sas_port; 9711 struct sas_phy *phy; 9712 struct sas_identify *identify; 9713 9714 hpsa_sas_port = hpsa_sas_phy->parent_port; 9715 phy = hpsa_sas_phy->phy; 9716 9717 identify = &phy->identify; 9718 memset(identify, 0, sizeof(*identify)); 9719 identify->sas_address = hpsa_sas_port->sas_address; 9720 identify->device_type = SAS_END_DEVICE; 9721 identify->initiator_port_protocols = SAS_PROTOCOL_STP; 9722 identify->target_port_protocols = SAS_PROTOCOL_STP; 9723 phy->minimum_linkrate_hw = SAS_LINK_RATE_UNKNOWN; 9724 phy->maximum_linkrate_hw = SAS_LINK_RATE_UNKNOWN; 9725 phy->minimum_linkrate = SAS_LINK_RATE_UNKNOWN; 9726 phy->maximum_linkrate = SAS_LINK_RATE_UNKNOWN; 9727 phy->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN; 9728 9729 rc = sas_phy_add(hpsa_sas_phy->phy); 9730 if (rc) 9731 return rc; 9732 9733 sas_port_add_phy(hpsa_sas_port->port, hpsa_sas_phy->phy); 9734 list_add_tail(&hpsa_sas_phy->phy_list_entry, 9735 &hpsa_sas_port->phy_list_head); 9736 hpsa_sas_phy->added_to_port = true; 9737 9738 return 0; 9739 } 9740 9741 static int 9742 hpsa_sas_port_add_rphy(struct hpsa_sas_port *hpsa_sas_port, 9743 struct sas_rphy *rphy) 9744 { 9745 struct sas_identify *identify; 9746 9747 identify = &rphy->identify; 9748 identify->sas_address = hpsa_sas_port->sas_address; 9749 identify->initiator_port_protocols = SAS_PROTOCOL_STP; 9750 identify->target_port_protocols = SAS_PROTOCOL_STP; 9751 9752 return sas_rphy_add(rphy); 9753 } 9754 9755 static struct hpsa_sas_port 9756 *hpsa_alloc_sas_port(struct hpsa_sas_node *hpsa_sas_node, 9757 u64 sas_address) 9758 { 9759 int rc; 9760 struct hpsa_sas_port *hpsa_sas_port; 9761 struct sas_port *port; 9762 9763 hpsa_sas_port = kzalloc(sizeof(*hpsa_sas_port), GFP_KERNEL); 9764 if (!hpsa_sas_port) 9765 return NULL; 9766 9767 INIT_LIST_HEAD(&hpsa_sas_port->phy_list_head); 9768 hpsa_sas_port->parent_node = hpsa_sas_node; 9769 9770 port = sas_port_alloc_num(hpsa_sas_node->parent_dev); 9771 if (!port) 9772 goto free_hpsa_port; 9773 9774 rc = sas_port_add(port); 9775 if (rc) 9776 goto free_sas_port; 9777 9778 hpsa_sas_port->port = port; 9779 hpsa_sas_port->sas_address = sas_address; 9780 list_add_tail(&hpsa_sas_port->port_list_entry, 9781 &hpsa_sas_node->port_list_head); 9782 9783 return hpsa_sas_port; 9784 9785 free_sas_port: 9786 sas_port_free(port); 9787 free_hpsa_port: 9788 kfree(hpsa_sas_port); 9789 9790 return NULL; 9791 } 9792 9793 static void hpsa_free_sas_port(struct hpsa_sas_port *hpsa_sas_port) 9794 { 9795 struct hpsa_sas_phy *hpsa_sas_phy; 9796 struct hpsa_sas_phy *next; 9797 9798 list_for_each_entry_safe(hpsa_sas_phy, next, 9799 &hpsa_sas_port->phy_list_head, phy_list_entry) 9800 hpsa_free_sas_phy(hpsa_sas_phy); 9801 9802 sas_port_delete(hpsa_sas_port->port); 9803 list_del(&hpsa_sas_port->port_list_entry); 9804 kfree(hpsa_sas_port); 9805 } 9806 9807 static struct hpsa_sas_node *hpsa_alloc_sas_node(struct device *parent_dev) 9808 { 9809 struct hpsa_sas_node *hpsa_sas_node; 9810 9811 hpsa_sas_node = kzalloc(sizeof(*hpsa_sas_node), GFP_KERNEL); 9812 if (hpsa_sas_node) { 9813 hpsa_sas_node->parent_dev = parent_dev; 9814 INIT_LIST_HEAD(&hpsa_sas_node->port_list_head); 9815 } 9816 9817 return hpsa_sas_node; 9818 } 9819 9820 static void hpsa_free_sas_node(struct hpsa_sas_node *hpsa_sas_node) 9821 { 9822 struct hpsa_sas_port *hpsa_sas_port; 9823 struct hpsa_sas_port *next; 9824 9825 if (!hpsa_sas_node) 9826 return; 9827 9828 list_for_each_entry_safe(hpsa_sas_port, next, 9829 &hpsa_sas_node->port_list_head, port_list_entry) 9830 hpsa_free_sas_port(hpsa_sas_port); 9831 9832 kfree(hpsa_sas_node); 9833 } 9834 9835 static struct hpsa_scsi_dev_t 9836 *hpsa_find_device_by_sas_rphy(struct ctlr_info *h, 9837 struct sas_rphy *rphy) 9838 { 9839 int i; 9840 struct hpsa_scsi_dev_t *device; 9841 9842 for (i = 0; i < h->ndevices; i++) { 9843 device = h->dev[i]; 9844 if (!device->sas_port) 9845 continue; 9846 if (device->sas_port->rphy == rphy) 9847 return device; 9848 } 9849 9850 return NULL; 9851 } 9852 9853 static int hpsa_add_sas_host(struct ctlr_info *h) 9854 { 9855 int rc; 9856 struct device *parent_dev; 9857 struct hpsa_sas_node *hpsa_sas_node; 9858 struct hpsa_sas_port *hpsa_sas_port; 9859 struct hpsa_sas_phy *hpsa_sas_phy; 9860 9861 parent_dev = &h->scsi_host->shost_gendev; 9862 9863 hpsa_sas_node = hpsa_alloc_sas_node(parent_dev); 9864 if (!hpsa_sas_node) 9865 return -ENOMEM; 9866 9867 hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, h->sas_address); 9868 if (!hpsa_sas_port) { 9869 rc = -ENODEV; 9870 goto free_sas_node; 9871 } 9872 9873 hpsa_sas_phy = hpsa_alloc_sas_phy(hpsa_sas_port); 9874 if (!hpsa_sas_phy) { 9875 rc = -ENODEV; 9876 goto free_sas_port; 9877 } 9878 9879 rc = hpsa_sas_port_add_phy(hpsa_sas_phy); 9880 if (rc) 9881 goto free_sas_phy; 9882 9883 h->sas_host = hpsa_sas_node; 9884 9885 return 0; 9886 9887 free_sas_phy: 9888 hpsa_free_sas_phy(hpsa_sas_phy); 9889 free_sas_port: 9890 hpsa_free_sas_port(hpsa_sas_port); 9891 free_sas_node: 9892 hpsa_free_sas_node(hpsa_sas_node); 9893 9894 return rc; 9895 } 9896 9897 static void hpsa_delete_sas_host(struct ctlr_info *h) 9898 { 9899 hpsa_free_sas_node(h->sas_host); 9900 } 9901 9902 static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node, 9903 struct hpsa_scsi_dev_t *device) 9904 { 9905 int rc; 9906 struct hpsa_sas_port *hpsa_sas_port; 9907 struct sas_rphy *rphy; 9908 9909 hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, device->sas_address); 9910 if (!hpsa_sas_port) 9911 return -ENOMEM; 9912 9913 rphy = sas_end_device_alloc(hpsa_sas_port->port); 9914 if (!rphy) { 9915 rc = -ENODEV; 9916 goto free_sas_port; 9917 } 9918 9919 hpsa_sas_port->rphy = rphy; 9920 device->sas_port = hpsa_sas_port; 9921 9922 rc = hpsa_sas_port_add_rphy(hpsa_sas_port, rphy); 9923 if (rc) 9924 goto free_sas_port; 9925 9926 return 0; 9927 9928 free_sas_port: 9929 hpsa_free_sas_port(hpsa_sas_port); 9930 device->sas_port = NULL; 9931 9932 return rc; 9933 } 9934 9935 static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device) 9936 { 9937 if (device->sas_port) { 9938 hpsa_free_sas_port(device->sas_port); 9939 device->sas_port = NULL; 9940 } 9941 } 9942 9943 static int 9944 hpsa_sas_get_linkerrors(struct sas_phy *phy) 9945 { 9946 return 0; 9947 } 9948 9949 static int 9950 hpsa_sas_get_enclosure_identifier(struct sas_rphy *rphy, u64 *identifier) 9951 { 9952 *identifier = 0; 9953 return 0; 9954 } 9955 9956 static int 9957 hpsa_sas_get_bay_identifier(struct sas_rphy *rphy) 9958 { 9959 return -ENXIO; 9960 } 9961 9962 static int 9963 hpsa_sas_phy_reset(struct sas_phy *phy, int hard_reset) 9964 { 9965 return 0; 9966 } 9967 9968 static int 9969 hpsa_sas_phy_enable(struct sas_phy *phy, int enable) 9970 { 9971 return 0; 9972 } 9973 9974 static int 9975 hpsa_sas_phy_setup(struct sas_phy *phy) 9976 { 9977 return 0; 9978 } 9979 9980 static void 9981 hpsa_sas_phy_release(struct sas_phy *phy) 9982 { 9983 } 9984 9985 static int 9986 hpsa_sas_phy_speed(struct sas_phy *phy, struct sas_phy_linkrates *rates) 9987 { 9988 return -EINVAL; 9989 } 9990 9991 /* SMP = Serial Management Protocol */ 9992 static int 9993 hpsa_sas_smp_handler(struct Scsi_Host *shost, struct sas_rphy *rphy, 9994 struct request *req) 9995 { 9996 return -EINVAL; 9997 } 9998 9999 static struct sas_function_template hpsa_sas_transport_functions = { 10000 .get_linkerrors = hpsa_sas_get_linkerrors, 10001 .get_enclosure_identifier = hpsa_sas_get_enclosure_identifier, 10002 .get_bay_identifier = hpsa_sas_get_bay_identifier, 10003 .phy_reset = hpsa_sas_phy_reset, 10004 .phy_enable = hpsa_sas_phy_enable, 10005 .phy_setup = hpsa_sas_phy_setup, 10006 .phy_release = hpsa_sas_phy_release, 10007 .set_phy_speed = hpsa_sas_phy_speed, 10008 .smp_handler = hpsa_sas_smp_handler, 10009 }; 10010 10011 /* 10012 * This is it. Register the PCI driver information for the cards we control 10013 * the OS will call our registered routines when it finds one of our cards. 10014 */ 10015 static int __init hpsa_init(void) 10016 { 10017 int rc; 10018 10019 hpsa_sas_transport_template = 10020 sas_attach_transport(&hpsa_sas_transport_functions); 10021 if (!hpsa_sas_transport_template) 10022 return -ENODEV; 10023 10024 rc = pci_register_driver(&hpsa_pci_driver); 10025 10026 if (rc) 10027 sas_release_transport(hpsa_sas_transport_template); 10028 10029 return rc; 10030 } 10031 10032 static void __exit hpsa_cleanup(void) 10033 { 10034 pci_unregister_driver(&hpsa_pci_driver); 10035 sas_release_transport(hpsa_sas_transport_template); 10036 } 10037 10038 static void __attribute__((unused)) verify_offsets(void) 10039 { 10040 #define VERIFY_OFFSET(member, offset) \ 10041 BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset) 10042 10043 VERIFY_OFFSET(structure_size, 0); 10044 VERIFY_OFFSET(volume_blk_size, 4); 10045 VERIFY_OFFSET(volume_blk_cnt, 8); 10046 VERIFY_OFFSET(phys_blk_shift, 16); 10047 VERIFY_OFFSET(parity_rotation_shift, 17); 10048 VERIFY_OFFSET(strip_size, 18); 10049 VERIFY_OFFSET(disk_starting_blk, 20); 10050 VERIFY_OFFSET(disk_blk_cnt, 28); 10051 VERIFY_OFFSET(data_disks_per_row, 36); 10052 VERIFY_OFFSET(metadata_disks_per_row, 38); 10053 VERIFY_OFFSET(row_cnt, 40); 10054 VERIFY_OFFSET(layout_map_count, 42); 10055 VERIFY_OFFSET(flags, 44); 10056 VERIFY_OFFSET(dekindex, 46); 10057 /* VERIFY_OFFSET(reserved, 48 */ 10058 VERIFY_OFFSET(data, 64); 10059 10060 #undef VERIFY_OFFSET 10061 10062 #define VERIFY_OFFSET(member, offset) \ 10063 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset) 10064 10065 VERIFY_OFFSET(IU_type, 0); 10066 VERIFY_OFFSET(direction, 1); 10067 VERIFY_OFFSET(reply_queue, 2); 10068 /* VERIFY_OFFSET(reserved1, 3); */ 10069 VERIFY_OFFSET(scsi_nexus, 4); 10070 VERIFY_OFFSET(Tag, 8); 10071 VERIFY_OFFSET(cdb, 16); 10072 VERIFY_OFFSET(cciss_lun, 32); 10073 VERIFY_OFFSET(data_len, 40); 10074 VERIFY_OFFSET(cmd_priority_task_attr, 44); 10075 VERIFY_OFFSET(sg_count, 45); 10076 /* VERIFY_OFFSET(reserved3 */ 10077 VERIFY_OFFSET(err_ptr, 48); 10078 VERIFY_OFFSET(err_len, 56); 10079 /* VERIFY_OFFSET(reserved4 */ 10080 VERIFY_OFFSET(sg, 64); 10081 10082 #undef VERIFY_OFFSET 10083 10084 #define VERIFY_OFFSET(member, offset) \ 10085 BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset) 10086 10087 VERIFY_OFFSET(dev_handle, 0x00); 10088 VERIFY_OFFSET(reserved1, 0x02); 10089 VERIFY_OFFSET(function, 0x03); 10090 VERIFY_OFFSET(reserved2, 0x04); 10091 VERIFY_OFFSET(err_info, 0x0C); 10092 VERIFY_OFFSET(reserved3, 0x10); 10093 VERIFY_OFFSET(err_info_len, 0x12); 10094 VERIFY_OFFSET(reserved4, 0x13); 10095 VERIFY_OFFSET(sgl_offset, 0x14); 10096 VERIFY_OFFSET(reserved5, 0x15); 10097 VERIFY_OFFSET(transfer_len, 0x1C); 10098 VERIFY_OFFSET(reserved6, 0x20); 10099 VERIFY_OFFSET(io_flags, 0x24); 10100 VERIFY_OFFSET(reserved7, 0x26); 10101 VERIFY_OFFSET(LUN, 0x34); 10102 VERIFY_OFFSET(control, 0x3C); 10103 VERIFY_OFFSET(CDB, 0x40); 10104 VERIFY_OFFSET(reserved8, 0x50); 10105 VERIFY_OFFSET(host_context_flags, 0x60); 10106 VERIFY_OFFSET(timeout_sec, 0x62); 10107 VERIFY_OFFSET(ReplyQueue, 0x64); 10108 VERIFY_OFFSET(reserved9, 0x65); 10109 VERIFY_OFFSET(tag, 0x68); 10110 VERIFY_OFFSET(host_addr, 0x70); 10111 VERIFY_OFFSET(CISS_LUN, 0x78); 10112 VERIFY_OFFSET(SG, 0x78 + 8); 10113 #undef VERIFY_OFFSET 10114 } 10115 10116 module_init(hpsa_init); 10117 module_exit(hpsa_cleanup); 10118