1 /* 2 * Disk Array driver for HP Smart Array SAS controllers 3 * Copyright 2016 Microsemi Corporation 4 * Copyright 2014-2015 PMC-Sierra, Inc. 5 * Copyright 2000,2009-2015 Hewlett-Packard Development Company, L.P. 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; version 2 of the License. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or 14 * NON INFRINGEMENT. See the GNU General Public License for more details. 15 * 16 * Questions/Comments/Bugfixes to esc.storagedev@microsemi.com 17 * 18 */ 19 20 #include <linux/module.h> 21 #include <linux/interrupt.h> 22 #include <linux/types.h> 23 #include <linux/pci.h> 24 #include <linux/pci-aspm.h> 25 #include <linux/kernel.h> 26 #include <linux/slab.h> 27 #include <linux/delay.h> 28 #include <linux/fs.h> 29 #include <linux/timer.h> 30 #include <linux/init.h> 31 #include <linux/spinlock.h> 32 #include <linux/compat.h> 33 #include <linux/blktrace_api.h> 34 #include <linux/uaccess.h> 35 #include <linux/io.h> 36 #include <linux/dma-mapping.h> 37 #include <linux/completion.h> 38 #include <linux/moduleparam.h> 39 #include <scsi/scsi.h> 40 #include <scsi/scsi_cmnd.h> 41 #include <scsi/scsi_device.h> 42 #include <scsi/scsi_host.h> 43 #include <scsi/scsi_tcq.h> 44 #include <scsi/scsi_eh.h> 45 #include <scsi/scsi_transport_sas.h> 46 #include <scsi/scsi_dbg.h> 47 #include <linux/cciss_ioctl.h> 48 #include <linux/string.h> 49 #include <linux/bitmap.h> 50 #include <linux/atomic.h> 51 #include <linux/jiffies.h> 52 #include <linux/percpu-defs.h> 53 #include <linux/percpu.h> 54 #include <asm/unaligned.h> 55 #include <asm/div64.h> 56 #include "hpsa_cmd.h" 57 #include "hpsa.h" 58 59 /* 60 * HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' 61 * with an optional trailing '-' followed by a byte value (0-255). 62 */ 63 #define HPSA_DRIVER_VERSION "3.4.16-0" 64 #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")" 65 #define HPSA "hpsa" 66 67 /* How long to wait for CISS doorbell communication */ 68 #define CLEAR_EVENT_WAIT_INTERVAL 20 /* ms for each msleep() call */ 69 #define MODE_CHANGE_WAIT_INTERVAL 10 /* ms for each msleep() call */ 70 #define MAX_CLEAR_EVENT_WAIT 30000 /* times 20 ms = 600 s */ 71 #define MAX_MODE_CHANGE_WAIT 2000 /* times 10 ms = 20 s */ 72 #define MAX_IOCTL_CONFIG_WAIT 1000 73 74 /*define how many times we will try a command because of bus resets */ 75 #define MAX_CMD_RETRIES 3 76 77 /* Embedded module documentation macros - see modules.h */ 78 MODULE_AUTHOR("Hewlett-Packard Company"); 79 MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \ 80 HPSA_DRIVER_VERSION); 81 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers"); 82 MODULE_VERSION(HPSA_DRIVER_VERSION); 83 MODULE_LICENSE("GPL"); 84 85 static int hpsa_allow_any; 86 module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR); 87 MODULE_PARM_DESC(hpsa_allow_any, 88 "Allow hpsa driver to access unknown HP Smart Array hardware"); 89 static int hpsa_simple_mode; 90 module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR); 91 MODULE_PARM_DESC(hpsa_simple_mode, 92 "Use 'simple mode' rather than 'performant mode'"); 93 94 /* define the PCI info for the cards we can control */ 95 static const struct pci_device_id hpsa_pci_device_id[] = { 96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241}, 97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243}, 98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245}, 99 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247}, 100 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249}, 101 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A}, 102 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B}, 103 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233}, 104 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350}, 105 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351}, 106 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352}, 107 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353}, 108 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354}, 109 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355}, 110 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356}, 111 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1921}, 112 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1922}, 113 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1923}, 114 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1924}, 115 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1926}, 116 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1928}, 117 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1929}, 118 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BD}, 119 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BE}, 120 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BF}, 121 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C0}, 122 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C1}, 123 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C2}, 124 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C3}, 125 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C4}, 126 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C5}, 127 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C6}, 128 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C7}, 129 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C8}, 130 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C9}, 131 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CA}, 132 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CB}, 133 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CC}, 134 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CD}, 135 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CE}, 136 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0580}, 137 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0581}, 138 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0582}, 139 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0583}, 140 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0584}, 141 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0585}, 142 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076}, 143 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087}, 144 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D}, 145 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088}, 146 {PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f}, 147 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 148 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0}, 149 {0,} 150 }; 151 152 MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id); 153 154 /* board_id = Subsystem Device ID & Vendor ID 155 * product = Marketing Name for the board 156 * access = Address of the struct of function pointers 157 */ 158 static struct board_type products[] = { 159 {0x3241103C, "Smart Array P212", &SA5_access}, 160 {0x3243103C, "Smart Array P410", &SA5_access}, 161 {0x3245103C, "Smart Array P410i", &SA5_access}, 162 {0x3247103C, "Smart Array P411", &SA5_access}, 163 {0x3249103C, "Smart Array P812", &SA5_access}, 164 {0x324A103C, "Smart Array P712m", &SA5_access}, 165 {0x324B103C, "Smart Array P711m", &SA5_access}, 166 {0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */ 167 {0x3350103C, "Smart Array P222", &SA5_access}, 168 {0x3351103C, "Smart Array P420", &SA5_access}, 169 {0x3352103C, "Smart Array P421", &SA5_access}, 170 {0x3353103C, "Smart Array P822", &SA5_access}, 171 {0x3354103C, "Smart Array P420i", &SA5_access}, 172 {0x3355103C, "Smart Array P220i", &SA5_access}, 173 {0x3356103C, "Smart Array P721m", &SA5_access}, 174 {0x1921103C, "Smart Array P830i", &SA5_access}, 175 {0x1922103C, "Smart Array P430", &SA5_access}, 176 {0x1923103C, "Smart Array P431", &SA5_access}, 177 {0x1924103C, "Smart Array P830", &SA5_access}, 178 {0x1926103C, "Smart Array P731m", &SA5_access}, 179 {0x1928103C, "Smart Array P230i", &SA5_access}, 180 {0x1929103C, "Smart Array P530", &SA5_access}, 181 {0x21BD103C, "Smart Array P244br", &SA5_access}, 182 {0x21BE103C, "Smart Array P741m", &SA5_access}, 183 {0x21BF103C, "Smart HBA H240ar", &SA5_access}, 184 {0x21C0103C, "Smart Array P440ar", &SA5_access}, 185 {0x21C1103C, "Smart Array P840ar", &SA5_access}, 186 {0x21C2103C, "Smart Array P440", &SA5_access}, 187 {0x21C3103C, "Smart Array P441", &SA5_access}, 188 {0x21C4103C, "Smart Array", &SA5_access}, 189 {0x21C5103C, "Smart Array P841", &SA5_access}, 190 {0x21C6103C, "Smart HBA H244br", &SA5_access}, 191 {0x21C7103C, "Smart HBA H240", &SA5_access}, 192 {0x21C8103C, "Smart HBA H241", &SA5_access}, 193 {0x21C9103C, "Smart Array", &SA5_access}, 194 {0x21CA103C, "Smart Array P246br", &SA5_access}, 195 {0x21CB103C, "Smart Array P840", &SA5_access}, 196 {0x21CC103C, "Smart Array", &SA5_access}, 197 {0x21CD103C, "Smart Array", &SA5_access}, 198 {0x21CE103C, "Smart HBA", &SA5_access}, 199 {0x05809005, "SmartHBA-SA", &SA5_access}, 200 {0x05819005, "SmartHBA-SA 8i", &SA5_access}, 201 {0x05829005, "SmartHBA-SA 8i8e", &SA5_access}, 202 {0x05839005, "SmartHBA-SA 8e", &SA5_access}, 203 {0x05849005, "SmartHBA-SA 16i", &SA5_access}, 204 {0x05859005, "SmartHBA-SA 4i4e", &SA5_access}, 205 {0x00761590, "HP Storage P1224 Array Controller", &SA5_access}, 206 {0x00871590, "HP Storage P1224e Array Controller", &SA5_access}, 207 {0x007D1590, "HP Storage P1228 Array Controller", &SA5_access}, 208 {0x00881590, "HP Storage P1228e Array Controller", &SA5_access}, 209 {0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access}, 210 {0xFFFF103C, "Unknown Smart Array", &SA5_access}, 211 }; 212 213 static struct scsi_transport_template *hpsa_sas_transport_template; 214 static int hpsa_add_sas_host(struct ctlr_info *h); 215 static void hpsa_delete_sas_host(struct ctlr_info *h); 216 static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node, 217 struct hpsa_scsi_dev_t *device); 218 static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device); 219 static struct hpsa_scsi_dev_t 220 *hpsa_find_device_by_sas_rphy(struct ctlr_info *h, 221 struct sas_rphy *rphy); 222 223 #define SCSI_CMD_BUSY ((struct scsi_cmnd *)&hpsa_cmd_busy) 224 static const struct scsi_cmnd hpsa_cmd_busy; 225 #define SCSI_CMD_IDLE ((struct scsi_cmnd *)&hpsa_cmd_idle) 226 static const struct scsi_cmnd hpsa_cmd_idle; 227 static int number_of_controllers; 228 229 static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id); 230 static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id); 231 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg); 232 233 #ifdef CONFIG_COMPAT 234 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, 235 void __user *arg); 236 #endif 237 238 static void cmd_free(struct ctlr_info *h, struct CommandList *c); 239 static struct CommandList *cmd_alloc(struct ctlr_info *h); 240 static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c); 241 static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h, 242 struct scsi_cmnd *scmd); 243 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 244 void *buff, size_t size, u16 page_code, unsigned char *scsi3addr, 245 int cmd_type); 246 static void hpsa_free_cmd_pool(struct ctlr_info *h); 247 #define VPD_PAGE (1 << 8) 248 #define HPSA_SIMPLE_ERROR_BITS 0x03 249 250 static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd); 251 static void hpsa_scan_start(struct Scsi_Host *); 252 static int hpsa_scan_finished(struct Scsi_Host *sh, 253 unsigned long elapsed_time); 254 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth); 255 256 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd); 257 static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd); 258 static int hpsa_slave_alloc(struct scsi_device *sdev); 259 static int hpsa_slave_configure(struct scsi_device *sdev); 260 static void hpsa_slave_destroy(struct scsi_device *sdev); 261 262 static void hpsa_update_scsi_devices(struct ctlr_info *h); 263 static int check_for_unit_attention(struct ctlr_info *h, 264 struct CommandList *c); 265 static void check_ioctl_unit_attention(struct ctlr_info *h, 266 struct CommandList *c); 267 /* performant mode helper functions */ 268 static void calc_bucket_map(int *bucket, int num_buckets, 269 int nsgs, int min_blocks, u32 *bucket_map); 270 static void hpsa_free_performant_mode(struct ctlr_info *h); 271 static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h); 272 static inline u32 next_command(struct ctlr_info *h, u8 q); 273 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 274 u32 *cfg_base_addr, u64 *cfg_base_addr_index, 275 u64 *cfg_offset); 276 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 277 unsigned long *memory_bar); 278 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id); 279 static int wait_for_device_to_become_ready(struct ctlr_info *h, 280 unsigned char lunaddr[], 281 int reply_queue); 282 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 283 int wait_for_ready); 284 static inline void finish_cmd(struct CommandList *c); 285 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h); 286 #define BOARD_NOT_READY 0 287 #define BOARD_READY 1 288 static void hpsa_drain_accel_commands(struct ctlr_info *h); 289 static void hpsa_flush_cache(struct ctlr_info *h); 290 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h, 291 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 292 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk); 293 static void hpsa_command_resubmit_worker(struct work_struct *work); 294 static u32 lockup_detected(struct ctlr_info *h); 295 static int detect_controller_lockup(struct ctlr_info *h); 296 static void hpsa_disable_rld_caching(struct ctlr_info *h); 297 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 298 struct ReportExtendedLUNdata *buf, int bufsize); 299 static bool hpsa_vpd_page_supported(struct ctlr_info *h, 300 unsigned char scsi3addr[], u8 page); 301 static int hpsa_luns_changed(struct ctlr_info *h); 302 static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c, 303 struct hpsa_scsi_dev_t *dev, 304 unsigned char *scsi3addr); 305 306 static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev) 307 { 308 unsigned long *priv = shost_priv(sdev->host); 309 return (struct ctlr_info *) *priv; 310 } 311 312 static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh) 313 { 314 unsigned long *priv = shost_priv(sh); 315 return (struct ctlr_info *) *priv; 316 } 317 318 static inline bool hpsa_is_cmd_idle(struct CommandList *c) 319 { 320 return c->scsi_cmd == SCSI_CMD_IDLE; 321 } 322 323 static inline bool hpsa_is_pending_event(struct CommandList *c) 324 { 325 return c->abort_pending || c->reset_pending; 326 } 327 328 /* extract sense key, asc, and ascq from sense data. -1 means invalid. */ 329 static void decode_sense_data(const u8 *sense_data, int sense_data_len, 330 u8 *sense_key, u8 *asc, u8 *ascq) 331 { 332 struct scsi_sense_hdr sshdr; 333 bool rc; 334 335 *sense_key = -1; 336 *asc = -1; 337 *ascq = -1; 338 339 if (sense_data_len < 1) 340 return; 341 342 rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr); 343 if (rc) { 344 *sense_key = sshdr.sense_key; 345 *asc = sshdr.asc; 346 *ascq = sshdr.ascq; 347 } 348 } 349 350 static int check_for_unit_attention(struct ctlr_info *h, 351 struct CommandList *c) 352 { 353 u8 sense_key, asc, ascq; 354 int sense_len; 355 356 if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo)) 357 sense_len = sizeof(c->err_info->SenseInfo); 358 else 359 sense_len = c->err_info->SenseLen; 360 361 decode_sense_data(c->err_info->SenseInfo, sense_len, 362 &sense_key, &asc, &ascq); 363 if (sense_key != UNIT_ATTENTION || asc == 0xff) 364 return 0; 365 366 switch (asc) { 367 case STATE_CHANGED: 368 dev_warn(&h->pdev->dev, 369 "%s: a state change detected, command retried\n", 370 h->devname); 371 break; 372 case LUN_FAILED: 373 dev_warn(&h->pdev->dev, 374 "%s: LUN failure detected\n", h->devname); 375 break; 376 case REPORT_LUNS_CHANGED: 377 dev_warn(&h->pdev->dev, 378 "%s: report LUN data changed\n", h->devname); 379 /* 380 * Note: this REPORT_LUNS_CHANGED condition only occurs on the external 381 * target (array) devices. 382 */ 383 break; 384 case POWER_OR_RESET: 385 dev_warn(&h->pdev->dev, 386 "%s: a power on or device reset detected\n", 387 h->devname); 388 break; 389 case UNIT_ATTENTION_CLEARED: 390 dev_warn(&h->pdev->dev, 391 "%s: unit attention cleared by another initiator\n", 392 h->devname); 393 break; 394 default: 395 dev_warn(&h->pdev->dev, 396 "%s: unknown unit attention detected\n", 397 h->devname); 398 break; 399 } 400 return 1; 401 } 402 403 static int check_for_busy(struct ctlr_info *h, struct CommandList *c) 404 { 405 if (c->err_info->CommandStatus != CMD_TARGET_STATUS || 406 (c->err_info->ScsiStatus != SAM_STAT_BUSY && 407 c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL)) 408 return 0; 409 dev_warn(&h->pdev->dev, HPSA "device busy"); 410 return 1; 411 } 412 413 static u32 lockup_detected(struct ctlr_info *h); 414 static ssize_t host_show_lockup_detected(struct device *dev, 415 struct device_attribute *attr, char *buf) 416 { 417 int ld; 418 struct ctlr_info *h; 419 struct Scsi_Host *shost = class_to_shost(dev); 420 421 h = shost_to_hba(shost); 422 ld = lockup_detected(h); 423 424 return sprintf(buf, "ld=%d\n", ld); 425 } 426 427 static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev, 428 struct device_attribute *attr, 429 const char *buf, size_t count) 430 { 431 int status, len; 432 struct ctlr_info *h; 433 struct Scsi_Host *shost = class_to_shost(dev); 434 char tmpbuf[10]; 435 436 if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO)) 437 return -EACCES; 438 len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count; 439 strncpy(tmpbuf, buf, len); 440 tmpbuf[len] = '\0'; 441 if (sscanf(tmpbuf, "%d", &status) != 1) 442 return -EINVAL; 443 h = shost_to_hba(shost); 444 h->acciopath_status = !!status; 445 dev_warn(&h->pdev->dev, 446 "hpsa: HP SSD Smart Path %s via sysfs update.\n", 447 h->acciopath_status ? "enabled" : "disabled"); 448 return count; 449 } 450 451 static ssize_t host_store_raid_offload_debug(struct device *dev, 452 struct device_attribute *attr, 453 const char *buf, size_t count) 454 { 455 int debug_level, len; 456 struct ctlr_info *h; 457 struct Scsi_Host *shost = class_to_shost(dev); 458 char tmpbuf[10]; 459 460 if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO)) 461 return -EACCES; 462 len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count; 463 strncpy(tmpbuf, buf, len); 464 tmpbuf[len] = '\0'; 465 if (sscanf(tmpbuf, "%d", &debug_level) != 1) 466 return -EINVAL; 467 if (debug_level < 0) 468 debug_level = 0; 469 h = shost_to_hba(shost); 470 h->raid_offload_debug = debug_level; 471 dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n", 472 h->raid_offload_debug); 473 return count; 474 } 475 476 static ssize_t host_store_rescan(struct device *dev, 477 struct device_attribute *attr, 478 const char *buf, size_t count) 479 { 480 struct ctlr_info *h; 481 struct Scsi_Host *shost = class_to_shost(dev); 482 h = shost_to_hba(shost); 483 hpsa_scan_start(h->scsi_host); 484 return count; 485 } 486 487 static ssize_t host_show_firmware_revision(struct device *dev, 488 struct device_attribute *attr, char *buf) 489 { 490 struct ctlr_info *h; 491 struct Scsi_Host *shost = class_to_shost(dev); 492 unsigned char *fwrev; 493 494 h = shost_to_hba(shost); 495 if (!h->hba_inquiry_data) 496 return 0; 497 fwrev = &h->hba_inquiry_data[32]; 498 return snprintf(buf, 20, "%c%c%c%c\n", 499 fwrev[0], fwrev[1], fwrev[2], fwrev[3]); 500 } 501 502 static ssize_t host_show_commands_outstanding(struct device *dev, 503 struct device_attribute *attr, char *buf) 504 { 505 struct Scsi_Host *shost = class_to_shost(dev); 506 struct ctlr_info *h = shost_to_hba(shost); 507 508 return snprintf(buf, 20, "%d\n", 509 atomic_read(&h->commands_outstanding)); 510 } 511 512 static ssize_t host_show_transport_mode(struct device *dev, 513 struct device_attribute *attr, char *buf) 514 { 515 struct ctlr_info *h; 516 struct Scsi_Host *shost = class_to_shost(dev); 517 518 h = shost_to_hba(shost); 519 return snprintf(buf, 20, "%s\n", 520 h->transMethod & CFGTBL_Trans_Performant ? 521 "performant" : "simple"); 522 } 523 524 static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev, 525 struct device_attribute *attr, char *buf) 526 { 527 struct ctlr_info *h; 528 struct Scsi_Host *shost = class_to_shost(dev); 529 530 h = shost_to_hba(shost); 531 return snprintf(buf, 30, "HP SSD Smart Path %s\n", 532 (h->acciopath_status == 1) ? "enabled" : "disabled"); 533 } 534 535 /* List of controllers which cannot be hard reset on kexec with reset_devices */ 536 static u32 unresettable_controller[] = { 537 0x324a103C, /* Smart Array P712m */ 538 0x324b103C, /* Smart Array P711m */ 539 0x3223103C, /* Smart Array P800 */ 540 0x3234103C, /* Smart Array P400 */ 541 0x3235103C, /* Smart Array P400i */ 542 0x3211103C, /* Smart Array E200i */ 543 0x3212103C, /* Smart Array E200 */ 544 0x3213103C, /* Smart Array E200i */ 545 0x3214103C, /* Smart Array E200i */ 546 0x3215103C, /* Smart Array E200i */ 547 0x3237103C, /* Smart Array E500 */ 548 0x323D103C, /* Smart Array P700m */ 549 0x40800E11, /* Smart Array 5i */ 550 0x409C0E11, /* Smart Array 6400 */ 551 0x409D0E11, /* Smart Array 6400 EM */ 552 0x40700E11, /* Smart Array 5300 */ 553 0x40820E11, /* Smart Array 532 */ 554 0x40830E11, /* Smart Array 5312 */ 555 0x409A0E11, /* Smart Array 641 */ 556 0x409B0E11, /* Smart Array 642 */ 557 0x40910E11, /* Smart Array 6i */ 558 }; 559 560 /* List of controllers which cannot even be soft reset */ 561 static u32 soft_unresettable_controller[] = { 562 0x40800E11, /* Smart Array 5i */ 563 0x40700E11, /* Smart Array 5300 */ 564 0x40820E11, /* Smart Array 532 */ 565 0x40830E11, /* Smart Array 5312 */ 566 0x409A0E11, /* Smart Array 641 */ 567 0x409B0E11, /* Smart Array 642 */ 568 0x40910E11, /* Smart Array 6i */ 569 /* Exclude 640x boards. These are two pci devices in one slot 570 * which share a battery backed cache module. One controls the 571 * cache, the other accesses the cache through the one that controls 572 * it. If we reset the one controlling the cache, the other will 573 * likely not be happy. Just forbid resetting this conjoined mess. 574 * The 640x isn't really supported by hpsa anyway. 575 */ 576 0x409C0E11, /* Smart Array 6400 */ 577 0x409D0E11, /* Smart Array 6400 EM */ 578 }; 579 580 static u32 needs_abort_tags_swizzled[] = { 581 0x323D103C, /* Smart Array P700m */ 582 0x324a103C, /* Smart Array P712m */ 583 0x324b103C, /* SmartArray P711m */ 584 }; 585 586 static int board_id_in_array(u32 a[], int nelems, u32 board_id) 587 { 588 int i; 589 590 for (i = 0; i < nelems; i++) 591 if (a[i] == board_id) 592 return 1; 593 return 0; 594 } 595 596 static int ctlr_is_hard_resettable(u32 board_id) 597 { 598 return !board_id_in_array(unresettable_controller, 599 ARRAY_SIZE(unresettable_controller), board_id); 600 } 601 602 static int ctlr_is_soft_resettable(u32 board_id) 603 { 604 return !board_id_in_array(soft_unresettable_controller, 605 ARRAY_SIZE(soft_unresettable_controller), board_id); 606 } 607 608 static int ctlr_is_resettable(u32 board_id) 609 { 610 return ctlr_is_hard_resettable(board_id) || 611 ctlr_is_soft_resettable(board_id); 612 } 613 614 static int ctlr_needs_abort_tags_swizzled(u32 board_id) 615 { 616 return board_id_in_array(needs_abort_tags_swizzled, 617 ARRAY_SIZE(needs_abort_tags_swizzled), board_id); 618 } 619 620 static ssize_t host_show_resettable(struct device *dev, 621 struct device_attribute *attr, char *buf) 622 { 623 struct ctlr_info *h; 624 struct Scsi_Host *shost = class_to_shost(dev); 625 626 h = shost_to_hba(shost); 627 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id)); 628 } 629 630 static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[]) 631 { 632 return (scsi3addr[3] & 0xC0) == 0x40; 633 } 634 635 static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6", 636 "1(+0)ADM", "UNKNOWN", "PHYS DRV" 637 }; 638 #define HPSA_RAID_0 0 639 #define HPSA_RAID_4 1 640 #define HPSA_RAID_1 2 /* also used for RAID 10 */ 641 #define HPSA_RAID_5 3 /* also used for RAID 50 */ 642 #define HPSA_RAID_51 4 643 #define HPSA_RAID_6 5 /* also used for RAID 60 */ 644 #define HPSA_RAID_ADM 6 /* also used for RAID 1+0 ADM */ 645 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 2) 646 #define PHYSICAL_DRIVE (ARRAY_SIZE(raid_label) - 1) 647 648 static inline bool is_logical_device(struct hpsa_scsi_dev_t *device) 649 { 650 return !device->physical_device; 651 } 652 653 static ssize_t raid_level_show(struct device *dev, 654 struct device_attribute *attr, char *buf) 655 { 656 ssize_t l = 0; 657 unsigned char rlevel; 658 struct ctlr_info *h; 659 struct scsi_device *sdev; 660 struct hpsa_scsi_dev_t *hdev; 661 unsigned long flags; 662 663 sdev = to_scsi_device(dev); 664 h = sdev_to_hba(sdev); 665 spin_lock_irqsave(&h->lock, flags); 666 hdev = sdev->hostdata; 667 if (!hdev) { 668 spin_unlock_irqrestore(&h->lock, flags); 669 return -ENODEV; 670 } 671 672 /* Is this even a logical drive? */ 673 if (!is_logical_device(hdev)) { 674 spin_unlock_irqrestore(&h->lock, flags); 675 l = snprintf(buf, PAGE_SIZE, "N/A\n"); 676 return l; 677 } 678 679 rlevel = hdev->raid_level; 680 spin_unlock_irqrestore(&h->lock, flags); 681 if (rlevel > RAID_UNKNOWN) 682 rlevel = RAID_UNKNOWN; 683 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]); 684 return l; 685 } 686 687 static ssize_t lunid_show(struct device *dev, 688 struct device_attribute *attr, char *buf) 689 { 690 struct ctlr_info *h; 691 struct scsi_device *sdev; 692 struct hpsa_scsi_dev_t *hdev; 693 unsigned long flags; 694 unsigned char lunid[8]; 695 696 sdev = to_scsi_device(dev); 697 h = sdev_to_hba(sdev); 698 spin_lock_irqsave(&h->lock, flags); 699 hdev = sdev->hostdata; 700 if (!hdev) { 701 spin_unlock_irqrestore(&h->lock, flags); 702 return -ENODEV; 703 } 704 memcpy(lunid, hdev->scsi3addr, sizeof(lunid)); 705 spin_unlock_irqrestore(&h->lock, flags); 706 return snprintf(buf, 20, "0x%8phN\n", lunid); 707 } 708 709 static ssize_t unique_id_show(struct device *dev, 710 struct device_attribute *attr, char *buf) 711 { 712 struct ctlr_info *h; 713 struct scsi_device *sdev; 714 struct hpsa_scsi_dev_t *hdev; 715 unsigned long flags; 716 unsigned char sn[16]; 717 718 sdev = to_scsi_device(dev); 719 h = sdev_to_hba(sdev); 720 spin_lock_irqsave(&h->lock, flags); 721 hdev = sdev->hostdata; 722 if (!hdev) { 723 spin_unlock_irqrestore(&h->lock, flags); 724 return -ENODEV; 725 } 726 memcpy(sn, hdev->device_id, sizeof(sn)); 727 spin_unlock_irqrestore(&h->lock, flags); 728 return snprintf(buf, 16 * 2 + 2, 729 "%02X%02X%02X%02X%02X%02X%02X%02X" 730 "%02X%02X%02X%02X%02X%02X%02X%02X\n", 731 sn[0], sn[1], sn[2], sn[3], 732 sn[4], sn[5], sn[6], sn[7], 733 sn[8], sn[9], sn[10], sn[11], 734 sn[12], sn[13], sn[14], sn[15]); 735 } 736 737 static ssize_t sas_address_show(struct device *dev, 738 struct device_attribute *attr, char *buf) 739 { 740 struct ctlr_info *h; 741 struct scsi_device *sdev; 742 struct hpsa_scsi_dev_t *hdev; 743 unsigned long flags; 744 u64 sas_address; 745 746 sdev = to_scsi_device(dev); 747 h = sdev_to_hba(sdev); 748 spin_lock_irqsave(&h->lock, flags); 749 hdev = sdev->hostdata; 750 if (!hdev || is_logical_device(hdev) || !hdev->expose_device) { 751 spin_unlock_irqrestore(&h->lock, flags); 752 return -ENODEV; 753 } 754 sas_address = hdev->sas_address; 755 spin_unlock_irqrestore(&h->lock, flags); 756 757 return snprintf(buf, PAGE_SIZE, "0x%016llx\n", sas_address); 758 } 759 760 static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev, 761 struct device_attribute *attr, char *buf) 762 { 763 struct ctlr_info *h; 764 struct scsi_device *sdev; 765 struct hpsa_scsi_dev_t *hdev; 766 unsigned long flags; 767 int offload_enabled; 768 769 sdev = to_scsi_device(dev); 770 h = sdev_to_hba(sdev); 771 spin_lock_irqsave(&h->lock, flags); 772 hdev = sdev->hostdata; 773 if (!hdev) { 774 spin_unlock_irqrestore(&h->lock, flags); 775 return -ENODEV; 776 } 777 offload_enabled = hdev->offload_enabled; 778 spin_unlock_irqrestore(&h->lock, flags); 779 return snprintf(buf, 20, "%d\n", offload_enabled); 780 } 781 782 #define MAX_PATHS 8 783 static ssize_t path_info_show(struct device *dev, 784 struct device_attribute *attr, char *buf) 785 { 786 struct ctlr_info *h; 787 struct scsi_device *sdev; 788 struct hpsa_scsi_dev_t *hdev; 789 unsigned long flags; 790 int i; 791 int output_len = 0; 792 u8 box; 793 u8 bay; 794 u8 path_map_index = 0; 795 char *active; 796 unsigned char phys_connector[2]; 797 798 sdev = to_scsi_device(dev); 799 h = sdev_to_hba(sdev); 800 spin_lock_irqsave(&h->devlock, flags); 801 hdev = sdev->hostdata; 802 if (!hdev) { 803 spin_unlock_irqrestore(&h->devlock, flags); 804 return -ENODEV; 805 } 806 807 bay = hdev->bay; 808 for (i = 0; i < MAX_PATHS; i++) { 809 path_map_index = 1<<i; 810 if (i == hdev->active_path_index) 811 active = "Active"; 812 else if (hdev->path_map & path_map_index) 813 active = "Inactive"; 814 else 815 continue; 816 817 output_len += scnprintf(buf + output_len, 818 PAGE_SIZE - output_len, 819 "[%d:%d:%d:%d] %20.20s ", 820 h->scsi_host->host_no, 821 hdev->bus, hdev->target, hdev->lun, 822 scsi_device_type(hdev->devtype)); 823 824 if (hdev->devtype == TYPE_RAID || is_logical_device(hdev)) { 825 output_len += scnprintf(buf + output_len, 826 PAGE_SIZE - output_len, 827 "%s\n", active); 828 continue; 829 } 830 831 box = hdev->box[i]; 832 memcpy(&phys_connector, &hdev->phys_connector[i], 833 sizeof(phys_connector)); 834 if (phys_connector[0] < '0') 835 phys_connector[0] = '0'; 836 if (phys_connector[1] < '0') 837 phys_connector[1] = '0'; 838 output_len += scnprintf(buf + output_len, 839 PAGE_SIZE - output_len, 840 "PORT: %.2s ", 841 phys_connector); 842 if ((hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC) && 843 hdev->expose_device) { 844 if (box == 0 || box == 0xFF) { 845 output_len += scnprintf(buf + output_len, 846 PAGE_SIZE - output_len, 847 "BAY: %hhu %s\n", 848 bay, active); 849 } else { 850 output_len += scnprintf(buf + output_len, 851 PAGE_SIZE - output_len, 852 "BOX: %hhu BAY: %hhu %s\n", 853 box, bay, active); 854 } 855 } else if (box != 0 && box != 0xFF) { 856 output_len += scnprintf(buf + output_len, 857 PAGE_SIZE - output_len, "BOX: %hhu %s\n", 858 box, active); 859 } else 860 output_len += scnprintf(buf + output_len, 861 PAGE_SIZE - output_len, "%s\n", active); 862 } 863 864 spin_unlock_irqrestore(&h->devlock, flags); 865 return output_len; 866 } 867 868 static ssize_t host_show_ctlr_num(struct device *dev, 869 struct device_attribute *attr, char *buf) 870 { 871 struct ctlr_info *h; 872 struct Scsi_Host *shost = class_to_shost(dev); 873 874 h = shost_to_hba(shost); 875 return snprintf(buf, 20, "%d\n", h->ctlr); 876 } 877 878 static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL); 879 static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL); 880 static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL); 881 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan); 882 static DEVICE_ATTR(sas_address, S_IRUGO, sas_address_show, NULL); 883 static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO, 884 host_show_hp_ssd_smart_path_enabled, NULL); 885 static DEVICE_ATTR(path_info, S_IRUGO, path_info_show, NULL); 886 static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH, 887 host_show_hp_ssd_smart_path_status, 888 host_store_hp_ssd_smart_path_status); 889 static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL, 890 host_store_raid_offload_debug); 891 static DEVICE_ATTR(firmware_revision, S_IRUGO, 892 host_show_firmware_revision, NULL); 893 static DEVICE_ATTR(commands_outstanding, S_IRUGO, 894 host_show_commands_outstanding, NULL); 895 static DEVICE_ATTR(transport_mode, S_IRUGO, 896 host_show_transport_mode, NULL); 897 static DEVICE_ATTR(resettable, S_IRUGO, 898 host_show_resettable, NULL); 899 static DEVICE_ATTR(lockup_detected, S_IRUGO, 900 host_show_lockup_detected, NULL); 901 static DEVICE_ATTR(ctlr_num, S_IRUGO, 902 host_show_ctlr_num, NULL); 903 904 static struct device_attribute *hpsa_sdev_attrs[] = { 905 &dev_attr_raid_level, 906 &dev_attr_lunid, 907 &dev_attr_unique_id, 908 &dev_attr_hp_ssd_smart_path_enabled, 909 &dev_attr_path_info, 910 &dev_attr_sas_address, 911 NULL, 912 }; 913 914 static struct device_attribute *hpsa_shost_attrs[] = { 915 &dev_attr_rescan, 916 &dev_attr_firmware_revision, 917 &dev_attr_commands_outstanding, 918 &dev_attr_transport_mode, 919 &dev_attr_resettable, 920 &dev_attr_hp_ssd_smart_path_status, 921 &dev_attr_raid_offload_debug, 922 &dev_attr_lockup_detected, 923 &dev_attr_ctlr_num, 924 NULL, 925 }; 926 927 #define HPSA_NRESERVED_CMDS (HPSA_CMDS_RESERVED_FOR_ABORTS + \ 928 HPSA_CMDS_RESERVED_FOR_DRIVER + HPSA_MAX_CONCURRENT_PASSTHRUS) 929 930 static struct scsi_host_template hpsa_driver_template = { 931 .module = THIS_MODULE, 932 .name = HPSA, 933 .proc_name = HPSA, 934 .queuecommand = hpsa_scsi_queue_command, 935 .scan_start = hpsa_scan_start, 936 .scan_finished = hpsa_scan_finished, 937 .change_queue_depth = hpsa_change_queue_depth, 938 .this_id = -1, 939 .use_clustering = ENABLE_CLUSTERING, 940 .eh_abort_handler = hpsa_eh_abort_handler, 941 .eh_device_reset_handler = hpsa_eh_device_reset_handler, 942 .ioctl = hpsa_ioctl, 943 .slave_alloc = hpsa_slave_alloc, 944 .slave_configure = hpsa_slave_configure, 945 .slave_destroy = hpsa_slave_destroy, 946 #ifdef CONFIG_COMPAT 947 .compat_ioctl = hpsa_compat_ioctl, 948 #endif 949 .sdev_attrs = hpsa_sdev_attrs, 950 .shost_attrs = hpsa_shost_attrs, 951 .max_sectors = 8192, 952 .no_write_same = 1, 953 }; 954 955 static inline u32 next_command(struct ctlr_info *h, u8 q) 956 { 957 u32 a; 958 struct reply_queue_buffer *rq = &h->reply_queue[q]; 959 960 if (h->transMethod & CFGTBL_Trans_io_accel1) 961 return h->access.command_completed(h, q); 962 963 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant))) 964 return h->access.command_completed(h, q); 965 966 if ((rq->head[rq->current_entry] & 1) == rq->wraparound) { 967 a = rq->head[rq->current_entry]; 968 rq->current_entry++; 969 atomic_dec(&h->commands_outstanding); 970 } else { 971 a = FIFO_EMPTY; 972 } 973 /* Check for wraparound */ 974 if (rq->current_entry == h->max_commands) { 975 rq->current_entry = 0; 976 rq->wraparound ^= 1; 977 } 978 return a; 979 } 980 981 /* 982 * There are some special bits in the bus address of the 983 * command that we have to set for the controller to know 984 * how to process the command: 985 * 986 * Normal performant mode: 987 * bit 0: 1 means performant mode, 0 means simple mode. 988 * bits 1-3 = block fetch table entry 989 * bits 4-6 = command type (== 0) 990 * 991 * ioaccel1 mode: 992 * bit 0 = "performant mode" bit. 993 * bits 1-3 = block fetch table entry 994 * bits 4-6 = command type (== 110) 995 * (command type is needed because ioaccel1 mode 996 * commands are submitted through the same register as normal 997 * mode commands, so this is how the controller knows whether 998 * the command is normal mode or ioaccel1 mode.) 999 * 1000 * ioaccel2 mode: 1001 * bit 0 = "performant mode" bit. 1002 * bits 1-4 = block fetch table entry (note extra bit) 1003 * bits 4-6 = not needed, because ioaccel2 mode has 1004 * a separate special register for submitting commands. 1005 */ 1006 1007 /* 1008 * set_performant_mode: Modify the tag for cciss performant 1009 * set bit 0 for pull model, bits 3-1 for block fetch 1010 * register number 1011 */ 1012 #define DEFAULT_REPLY_QUEUE (-1) 1013 static void set_performant_mode(struct ctlr_info *h, struct CommandList *c, 1014 int reply_queue) 1015 { 1016 if (likely(h->transMethod & CFGTBL_Trans_Performant)) { 1017 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1); 1018 if (unlikely(!h->msix_vectors)) 1019 return; 1020 if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1021 c->Header.ReplyQueue = 1022 raw_smp_processor_id() % h->nreply_queues; 1023 else 1024 c->Header.ReplyQueue = reply_queue % h->nreply_queues; 1025 } 1026 } 1027 1028 static void set_ioaccel1_performant_mode(struct ctlr_info *h, 1029 struct CommandList *c, 1030 int reply_queue) 1031 { 1032 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex]; 1033 1034 /* 1035 * Tell the controller to post the reply to the queue for this 1036 * processor. This seems to give the best I/O throughput. 1037 */ 1038 if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1039 cp->ReplyQueue = smp_processor_id() % h->nreply_queues; 1040 else 1041 cp->ReplyQueue = reply_queue % h->nreply_queues; 1042 /* 1043 * Set the bits in the address sent down to include: 1044 * - performant mode bit (bit 0) 1045 * - pull count (bits 1-3) 1046 * - command type (bits 4-6) 1047 */ 1048 c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) | 1049 IOACCEL1_BUSADDR_CMDTYPE; 1050 } 1051 1052 static void set_ioaccel2_tmf_performant_mode(struct ctlr_info *h, 1053 struct CommandList *c, 1054 int reply_queue) 1055 { 1056 struct hpsa_tmf_struct *cp = (struct hpsa_tmf_struct *) 1057 &h->ioaccel2_cmd_pool[c->cmdindex]; 1058 1059 /* Tell the controller to post the reply to the queue for this 1060 * processor. This seems to give the best I/O throughput. 1061 */ 1062 if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1063 cp->reply_queue = smp_processor_id() % h->nreply_queues; 1064 else 1065 cp->reply_queue = reply_queue % h->nreply_queues; 1066 /* Set the bits in the address sent down to include: 1067 * - performant mode bit not used in ioaccel mode 2 1068 * - pull count (bits 0-3) 1069 * - command type isn't needed for ioaccel2 1070 */ 1071 c->busaddr |= h->ioaccel2_blockFetchTable[0]; 1072 } 1073 1074 static void set_ioaccel2_performant_mode(struct ctlr_info *h, 1075 struct CommandList *c, 1076 int reply_queue) 1077 { 1078 struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex]; 1079 1080 /* 1081 * Tell the controller to post the reply to the queue for this 1082 * processor. This seems to give the best I/O throughput. 1083 */ 1084 if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1085 cp->reply_queue = smp_processor_id() % h->nreply_queues; 1086 else 1087 cp->reply_queue = reply_queue % h->nreply_queues; 1088 /* 1089 * Set the bits in the address sent down to include: 1090 * - performant mode bit not used in ioaccel mode 2 1091 * - pull count (bits 0-3) 1092 * - command type isn't needed for ioaccel2 1093 */ 1094 c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]); 1095 } 1096 1097 static int is_firmware_flash_cmd(u8 *cdb) 1098 { 1099 return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE; 1100 } 1101 1102 /* 1103 * During firmware flash, the heartbeat register may not update as frequently 1104 * as it should. So we dial down lockup detection during firmware flash. and 1105 * dial it back up when firmware flash completes. 1106 */ 1107 #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ) 1108 #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ) 1109 static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h, 1110 struct CommandList *c) 1111 { 1112 if (!is_firmware_flash_cmd(c->Request.CDB)) 1113 return; 1114 atomic_inc(&h->firmware_flash_in_progress); 1115 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH; 1116 } 1117 1118 static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h, 1119 struct CommandList *c) 1120 { 1121 if (is_firmware_flash_cmd(c->Request.CDB) && 1122 atomic_dec_and_test(&h->firmware_flash_in_progress)) 1123 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 1124 } 1125 1126 static void __enqueue_cmd_and_start_io(struct ctlr_info *h, 1127 struct CommandList *c, int reply_queue) 1128 { 1129 dial_down_lockup_detection_during_fw_flash(h, c); 1130 atomic_inc(&h->commands_outstanding); 1131 switch (c->cmd_type) { 1132 case CMD_IOACCEL1: 1133 set_ioaccel1_performant_mode(h, c, reply_queue); 1134 writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET); 1135 break; 1136 case CMD_IOACCEL2: 1137 set_ioaccel2_performant_mode(h, c, reply_queue); 1138 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32); 1139 break; 1140 case IOACCEL2_TMF: 1141 set_ioaccel2_tmf_performant_mode(h, c, reply_queue); 1142 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32); 1143 break; 1144 default: 1145 set_performant_mode(h, c, reply_queue); 1146 h->access.submit_command(h, c); 1147 } 1148 } 1149 1150 static void enqueue_cmd_and_start_io(struct ctlr_info *h, struct CommandList *c) 1151 { 1152 if (unlikely(hpsa_is_pending_event(c))) 1153 return finish_cmd(c); 1154 1155 __enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE); 1156 } 1157 1158 static inline int is_hba_lunid(unsigned char scsi3addr[]) 1159 { 1160 return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0; 1161 } 1162 1163 static inline int is_scsi_rev_5(struct ctlr_info *h) 1164 { 1165 if (!h->hba_inquiry_data) 1166 return 0; 1167 if ((h->hba_inquiry_data[2] & 0x07) == 5) 1168 return 1; 1169 return 0; 1170 } 1171 1172 static int hpsa_find_target_lun(struct ctlr_info *h, 1173 unsigned char scsi3addr[], int bus, int *target, int *lun) 1174 { 1175 /* finds an unused bus, target, lun for a new physical device 1176 * assumes h->devlock is held 1177 */ 1178 int i, found = 0; 1179 DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES); 1180 1181 bitmap_zero(lun_taken, HPSA_MAX_DEVICES); 1182 1183 for (i = 0; i < h->ndevices; i++) { 1184 if (h->dev[i]->bus == bus && h->dev[i]->target != -1) 1185 __set_bit(h->dev[i]->target, lun_taken); 1186 } 1187 1188 i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES); 1189 if (i < HPSA_MAX_DEVICES) { 1190 /* *bus = 1; */ 1191 *target = i; 1192 *lun = 0; 1193 found = 1; 1194 } 1195 return !found; 1196 } 1197 1198 static void hpsa_show_dev_msg(const char *level, struct ctlr_info *h, 1199 struct hpsa_scsi_dev_t *dev, char *description) 1200 { 1201 #define LABEL_SIZE 25 1202 char label[LABEL_SIZE]; 1203 1204 if (h == NULL || h->pdev == NULL || h->scsi_host == NULL) 1205 return; 1206 1207 switch (dev->devtype) { 1208 case TYPE_RAID: 1209 snprintf(label, LABEL_SIZE, "controller"); 1210 break; 1211 case TYPE_ENCLOSURE: 1212 snprintf(label, LABEL_SIZE, "enclosure"); 1213 break; 1214 case TYPE_DISK: 1215 case TYPE_ZBC: 1216 if (dev->external) 1217 snprintf(label, LABEL_SIZE, "external"); 1218 else if (!is_logical_dev_addr_mode(dev->scsi3addr)) 1219 snprintf(label, LABEL_SIZE, "%s", 1220 raid_label[PHYSICAL_DRIVE]); 1221 else 1222 snprintf(label, LABEL_SIZE, "RAID-%s", 1223 dev->raid_level > RAID_UNKNOWN ? "?" : 1224 raid_label[dev->raid_level]); 1225 break; 1226 case TYPE_ROM: 1227 snprintf(label, LABEL_SIZE, "rom"); 1228 break; 1229 case TYPE_TAPE: 1230 snprintf(label, LABEL_SIZE, "tape"); 1231 break; 1232 case TYPE_MEDIUM_CHANGER: 1233 snprintf(label, LABEL_SIZE, "changer"); 1234 break; 1235 default: 1236 snprintf(label, LABEL_SIZE, "UNKNOWN"); 1237 break; 1238 } 1239 1240 dev_printk(level, &h->pdev->dev, 1241 "scsi %d:%d:%d:%d: %s %s %.8s %.16s %s SSDSmartPathCap%c En%c Exp=%d\n", 1242 h->scsi_host->host_no, dev->bus, dev->target, dev->lun, 1243 description, 1244 scsi_device_type(dev->devtype), 1245 dev->vendor, 1246 dev->model, 1247 label, 1248 dev->offload_config ? '+' : '-', 1249 dev->offload_enabled ? '+' : '-', 1250 dev->expose_device); 1251 } 1252 1253 /* Add an entry into h->dev[] array. */ 1254 static int hpsa_scsi_add_entry(struct ctlr_info *h, 1255 struct hpsa_scsi_dev_t *device, 1256 struct hpsa_scsi_dev_t *added[], int *nadded) 1257 { 1258 /* assumes h->devlock is held */ 1259 int n = h->ndevices; 1260 int i; 1261 unsigned char addr1[8], addr2[8]; 1262 struct hpsa_scsi_dev_t *sd; 1263 1264 if (n >= HPSA_MAX_DEVICES) { 1265 dev_err(&h->pdev->dev, "too many devices, some will be " 1266 "inaccessible.\n"); 1267 return -1; 1268 } 1269 1270 /* physical devices do not have lun or target assigned until now. */ 1271 if (device->lun != -1) 1272 /* Logical device, lun is already assigned. */ 1273 goto lun_assigned; 1274 1275 /* If this device a non-zero lun of a multi-lun device 1276 * byte 4 of the 8-byte LUN addr will contain the logical 1277 * unit no, zero otherwise. 1278 */ 1279 if (device->scsi3addr[4] == 0) { 1280 /* This is not a non-zero lun of a multi-lun device */ 1281 if (hpsa_find_target_lun(h, device->scsi3addr, 1282 device->bus, &device->target, &device->lun) != 0) 1283 return -1; 1284 goto lun_assigned; 1285 } 1286 1287 /* This is a non-zero lun of a multi-lun device. 1288 * Search through our list and find the device which 1289 * has the same 8 byte LUN address, excepting byte 4 and 5. 1290 * Assign the same bus and target for this new LUN. 1291 * Use the logical unit number from the firmware. 1292 */ 1293 memcpy(addr1, device->scsi3addr, 8); 1294 addr1[4] = 0; 1295 addr1[5] = 0; 1296 for (i = 0; i < n; i++) { 1297 sd = h->dev[i]; 1298 memcpy(addr2, sd->scsi3addr, 8); 1299 addr2[4] = 0; 1300 addr2[5] = 0; 1301 /* differ only in byte 4 and 5? */ 1302 if (memcmp(addr1, addr2, 8) == 0) { 1303 device->bus = sd->bus; 1304 device->target = sd->target; 1305 device->lun = device->scsi3addr[4]; 1306 break; 1307 } 1308 } 1309 if (device->lun == -1) { 1310 dev_warn(&h->pdev->dev, "physical device with no LUN=0," 1311 " suspect firmware bug or unsupported hardware " 1312 "configuration.\n"); 1313 return -1; 1314 } 1315 1316 lun_assigned: 1317 1318 h->dev[n] = device; 1319 h->ndevices++; 1320 added[*nadded] = device; 1321 (*nadded)++; 1322 hpsa_show_dev_msg(KERN_INFO, h, device, 1323 device->expose_device ? "added" : "masked"); 1324 device->offload_to_be_enabled = device->offload_enabled; 1325 device->offload_enabled = 0; 1326 return 0; 1327 } 1328 1329 /* Update an entry in h->dev[] array. */ 1330 static void hpsa_scsi_update_entry(struct ctlr_info *h, 1331 int entry, struct hpsa_scsi_dev_t *new_entry) 1332 { 1333 int offload_enabled; 1334 /* assumes h->devlock is held */ 1335 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1336 1337 /* Raid level changed. */ 1338 h->dev[entry]->raid_level = new_entry->raid_level; 1339 1340 /* Raid offload parameters changed. Careful about the ordering. */ 1341 if (new_entry->offload_config && new_entry->offload_enabled) { 1342 /* 1343 * if drive is newly offload_enabled, we want to copy the 1344 * raid map data first. If previously offload_enabled and 1345 * offload_config were set, raid map data had better be 1346 * the same as it was before. if raid map data is changed 1347 * then it had better be the case that 1348 * h->dev[entry]->offload_enabled is currently 0. 1349 */ 1350 h->dev[entry]->raid_map = new_entry->raid_map; 1351 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 1352 } 1353 if (new_entry->hba_ioaccel_enabled) { 1354 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 1355 wmb(); /* set ioaccel_handle *before* hba_ioaccel_enabled */ 1356 } 1357 h->dev[entry]->hba_ioaccel_enabled = new_entry->hba_ioaccel_enabled; 1358 h->dev[entry]->offload_config = new_entry->offload_config; 1359 h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror; 1360 h->dev[entry]->queue_depth = new_entry->queue_depth; 1361 1362 /* 1363 * We can turn off ioaccel offload now, but need to delay turning 1364 * it on until we can update h->dev[entry]->phys_disk[], but we 1365 * can't do that until all the devices are updated. 1366 */ 1367 h->dev[entry]->offload_to_be_enabled = new_entry->offload_enabled; 1368 if (!new_entry->offload_enabled) 1369 h->dev[entry]->offload_enabled = 0; 1370 1371 offload_enabled = h->dev[entry]->offload_enabled; 1372 h->dev[entry]->offload_enabled = h->dev[entry]->offload_to_be_enabled; 1373 hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated"); 1374 h->dev[entry]->offload_enabled = offload_enabled; 1375 } 1376 1377 /* Replace an entry from h->dev[] array. */ 1378 static void hpsa_scsi_replace_entry(struct ctlr_info *h, 1379 int entry, struct hpsa_scsi_dev_t *new_entry, 1380 struct hpsa_scsi_dev_t *added[], int *nadded, 1381 struct hpsa_scsi_dev_t *removed[], int *nremoved) 1382 { 1383 /* assumes h->devlock is held */ 1384 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1385 removed[*nremoved] = h->dev[entry]; 1386 (*nremoved)++; 1387 1388 /* 1389 * New physical devices won't have target/lun assigned yet 1390 * so we need to preserve the values in the slot we are replacing. 1391 */ 1392 if (new_entry->target == -1) { 1393 new_entry->target = h->dev[entry]->target; 1394 new_entry->lun = h->dev[entry]->lun; 1395 } 1396 1397 h->dev[entry] = new_entry; 1398 added[*nadded] = new_entry; 1399 (*nadded)++; 1400 hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced"); 1401 new_entry->offload_to_be_enabled = new_entry->offload_enabled; 1402 new_entry->offload_enabled = 0; 1403 } 1404 1405 /* Remove an entry from h->dev[] array. */ 1406 static void hpsa_scsi_remove_entry(struct ctlr_info *h, int entry, 1407 struct hpsa_scsi_dev_t *removed[], int *nremoved) 1408 { 1409 /* assumes h->devlock is held */ 1410 int i; 1411 struct hpsa_scsi_dev_t *sd; 1412 1413 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1414 1415 sd = h->dev[entry]; 1416 removed[*nremoved] = h->dev[entry]; 1417 (*nremoved)++; 1418 1419 for (i = entry; i < h->ndevices-1; i++) 1420 h->dev[i] = h->dev[i+1]; 1421 h->ndevices--; 1422 hpsa_show_dev_msg(KERN_INFO, h, sd, "removed"); 1423 } 1424 1425 #define SCSI3ADDR_EQ(a, b) ( \ 1426 (a)[7] == (b)[7] && \ 1427 (a)[6] == (b)[6] && \ 1428 (a)[5] == (b)[5] && \ 1429 (a)[4] == (b)[4] && \ 1430 (a)[3] == (b)[3] && \ 1431 (a)[2] == (b)[2] && \ 1432 (a)[1] == (b)[1] && \ 1433 (a)[0] == (b)[0]) 1434 1435 static void fixup_botched_add(struct ctlr_info *h, 1436 struct hpsa_scsi_dev_t *added) 1437 { 1438 /* called when scsi_add_device fails in order to re-adjust 1439 * h->dev[] to match the mid layer's view. 1440 */ 1441 unsigned long flags; 1442 int i, j; 1443 1444 spin_lock_irqsave(&h->lock, flags); 1445 for (i = 0; i < h->ndevices; i++) { 1446 if (h->dev[i] == added) { 1447 for (j = i; j < h->ndevices-1; j++) 1448 h->dev[j] = h->dev[j+1]; 1449 h->ndevices--; 1450 break; 1451 } 1452 } 1453 spin_unlock_irqrestore(&h->lock, flags); 1454 kfree(added); 1455 } 1456 1457 static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1, 1458 struct hpsa_scsi_dev_t *dev2) 1459 { 1460 /* we compare everything except lun and target as these 1461 * are not yet assigned. Compare parts likely 1462 * to differ first 1463 */ 1464 if (memcmp(dev1->scsi3addr, dev2->scsi3addr, 1465 sizeof(dev1->scsi3addr)) != 0) 1466 return 0; 1467 if (memcmp(dev1->device_id, dev2->device_id, 1468 sizeof(dev1->device_id)) != 0) 1469 return 0; 1470 if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0) 1471 return 0; 1472 if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0) 1473 return 0; 1474 if (dev1->devtype != dev2->devtype) 1475 return 0; 1476 if (dev1->bus != dev2->bus) 1477 return 0; 1478 return 1; 1479 } 1480 1481 static inline int device_updated(struct hpsa_scsi_dev_t *dev1, 1482 struct hpsa_scsi_dev_t *dev2) 1483 { 1484 /* Device attributes that can change, but don't mean 1485 * that the device is a different device, nor that the OS 1486 * needs to be told anything about the change. 1487 */ 1488 if (dev1->raid_level != dev2->raid_level) 1489 return 1; 1490 if (dev1->offload_config != dev2->offload_config) 1491 return 1; 1492 if (dev1->offload_enabled != dev2->offload_enabled) 1493 return 1; 1494 if (!is_logical_dev_addr_mode(dev1->scsi3addr)) 1495 if (dev1->queue_depth != dev2->queue_depth) 1496 return 1; 1497 return 0; 1498 } 1499 1500 /* Find needle in haystack. If exact match found, return DEVICE_SAME, 1501 * and return needle location in *index. If scsi3addr matches, but not 1502 * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle 1503 * location in *index. 1504 * In the case of a minor device attribute change, such as RAID level, just 1505 * return DEVICE_UPDATED, along with the updated device's location in index. 1506 * If needle not found, return DEVICE_NOT_FOUND. 1507 */ 1508 static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle, 1509 struct hpsa_scsi_dev_t *haystack[], int haystack_size, 1510 int *index) 1511 { 1512 int i; 1513 #define DEVICE_NOT_FOUND 0 1514 #define DEVICE_CHANGED 1 1515 #define DEVICE_SAME 2 1516 #define DEVICE_UPDATED 3 1517 if (needle == NULL) 1518 return DEVICE_NOT_FOUND; 1519 1520 for (i = 0; i < haystack_size; i++) { 1521 if (haystack[i] == NULL) /* previously removed. */ 1522 continue; 1523 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) { 1524 *index = i; 1525 if (device_is_the_same(needle, haystack[i])) { 1526 if (device_updated(needle, haystack[i])) 1527 return DEVICE_UPDATED; 1528 return DEVICE_SAME; 1529 } else { 1530 /* Keep offline devices offline */ 1531 if (needle->volume_offline) 1532 return DEVICE_NOT_FOUND; 1533 return DEVICE_CHANGED; 1534 } 1535 } 1536 } 1537 *index = -1; 1538 return DEVICE_NOT_FOUND; 1539 } 1540 1541 static void hpsa_monitor_offline_device(struct ctlr_info *h, 1542 unsigned char scsi3addr[]) 1543 { 1544 struct offline_device_entry *device; 1545 unsigned long flags; 1546 1547 /* Check to see if device is already on the list */ 1548 spin_lock_irqsave(&h->offline_device_lock, flags); 1549 list_for_each_entry(device, &h->offline_device_list, offline_list) { 1550 if (memcmp(device->scsi3addr, scsi3addr, 1551 sizeof(device->scsi3addr)) == 0) { 1552 spin_unlock_irqrestore(&h->offline_device_lock, flags); 1553 return; 1554 } 1555 } 1556 spin_unlock_irqrestore(&h->offline_device_lock, flags); 1557 1558 /* Device is not on the list, add it. */ 1559 device = kmalloc(sizeof(*device), GFP_KERNEL); 1560 if (!device) { 1561 dev_warn(&h->pdev->dev, "out of memory in %s\n", __func__); 1562 return; 1563 } 1564 memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr)); 1565 spin_lock_irqsave(&h->offline_device_lock, flags); 1566 list_add_tail(&device->offline_list, &h->offline_device_list); 1567 spin_unlock_irqrestore(&h->offline_device_lock, flags); 1568 } 1569 1570 /* Print a message explaining various offline volume states */ 1571 static void hpsa_show_volume_status(struct ctlr_info *h, 1572 struct hpsa_scsi_dev_t *sd) 1573 { 1574 if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED) 1575 dev_info(&h->pdev->dev, 1576 "C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n", 1577 h->scsi_host->host_no, 1578 sd->bus, sd->target, sd->lun); 1579 switch (sd->volume_offline) { 1580 case HPSA_LV_OK: 1581 break; 1582 case HPSA_LV_UNDERGOING_ERASE: 1583 dev_info(&h->pdev->dev, 1584 "C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n", 1585 h->scsi_host->host_no, 1586 sd->bus, sd->target, sd->lun); 1587 break; 1588 case HPSA_LV_NOT_AVAILABLE: 1589 dev_info(&h->pdev->dev, 1590 "C%d:B%d:T%d:L%d Volume is waiting for transforming volume.\n", 1591 h->scsi_host->host_no, 1592 sd->bus, sd->target, sd->lun); 1593 break; 1594 case HPSA_LV_UNDERGOING_RPI: 1595 dev_info(&h->pdev->dev, 1596 "C%d:B%d:T%d:L%d Volume is undergoing rapid parity init.\n", 1597 h->scsi_host->host_no, 1598 sd->bus, sd->target, sd->lun); 1599 break; 1600 case HPSA_LV_PENDING_RPI: 1601 dev_info(&h->pdev->dev, 1602 "C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n", 1603 h->scsi_host->host_no, 1604 sd->bus, sd->target, sd->lun); 1605 break; 1606 case HPSA_LV_ENCRYPTED_NO_KEY: 1607 dev_info(&h->pdev->dev, 1608 "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n", 1609 h->scsi_host->host_no, 1610 sd->bus, sd->target, sd->lun); 1611 break; 1612 case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER: 1613 dev_info(&h->pdev->dev, 1614 "C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n", 1615 h->scsi_host->host_no, 1616 sd->bus, sd->target, sd->lun); 1617 break; 1618 case HPSA_LV_UNDERGOING_ENCRYPTION: 1619 dev_info(&h->pdev->dev, 1620 "C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n", 1621 h->scsi_host->host_no, 1622 sd->bus, sd->target, sd->lun); 1623 break; 1624 case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING: 1625 dev_info(&h->pdev->dev, 1626 "C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n", 1627 h->scsi_host->host_no, 1628 sd->bus, sd->target, sd->lun); 1629 break; 1630 case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 1631 dev_info(&h->pdev->dev, 1632 "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n", 1633 h->scsi_host->host_no, 1634 sd->bus, sd->target, sd->lun); 1635 break; 1636 case HPSA_LV_PENDING_ENCRYPTION: 1637 dev_info(&h->pdev->dev, 1638 "C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n", 1639 h->scsi_host->host_no, 1640 sd->bus, sd->target, sd->lun); 1641 break; 1642 case HPSA_LV_PENDING_ENCRYPTION_REKEYING: 1643 dev_info(&h->pdev->dev, 1644 "C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n", 1645 h->scsi_host->host_no, 1646 sd->bus, sd->target, sd->lun); 1647 break; 1648 } 1649 } 1650 1651 /* 1652 * Figure the list of physical drive pointers for a logical drive with 1653 * raid offload configured. 1654 */ 1655 static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h, 1656 struct hpsa_scsi_dev_t *dev[], int ndevices, 1657 struct hpsa_scsi_dev_t *logical_drive) 1658 { 1659 struct raid_map_data *map = &logical_drive->raid_map; 1660 struct raid_map_disk_data *dd = &map->data[0]; 1661 int i, j; 1662 int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) + 1663 le16_to_cpu(map->metadata_disks_per_row); 1664 int nraid_map_entries = le16_to_cpu(map->row_cnt) * 1665 le16_to_cpu(map->layout_map_count) * 1666 total_disks_per_row; 1667 int nphys_disk = le16_to_cpu(map->layout_map_count) * 1668 total_disks_per_row; 1669 int qdepth; 1670 1671 if (nraid_map_entries > RAID_MAP_MAX_ENTRIES) 1672 nraid_map_entries = RAID_MAP_MAX_ENTRIES; 1673 1674 logical_drive->nphysical_disks = nraid_map_entries; 1675 1676 qdepth = 0; 1677 for (i = 0; i < nraid_map_entries; i++) { 1678 logical_drive->phys_disk[i] = NULL; 1679 if (!logical_drive->offload_config) 1680 continue; 1681 for (j = 0; j < ndevices; j++) { 1682 if (dev[j] == NULL) 1683 continue; 1684 if (dev[j]->devtype != TYPE_DISK && 1685 dev[j]->devtype != TYPE_ZBC) 1686 continue; 1687 if (is_logical_device(dev[j])) 1688 continue; 1689 if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle) 1690 continue; 1691 1692 logical_drive->phys_disk[i] = dev[j]; 1693 if (i < nphys_disk) 1694 qdepth = min(h->nr_cmds, qdepth + 1695 logical_drive->phys_disk[i]->queue_depth); 1696 break; 1697 } 1698 1699 /* 1700 * This can happen if a physical drive is removed and 1701 * the logical drive is degraded. In that case, the RAID 1702 * map data will refer to a physical disk which isn't actually 1703 * present. And in that case offload_enabled should already 1704 * be 0, but we'll turn it off here just in case 1705 */ 1706 if (!logical_drive->phys_disk[i]) { 1707 logical_drive->offload_enabled = 0; 1708 logical_drive->offload_to_be_enabled = 0; 1709 logical_drive->queue_depth = 8; 1710 } 1711 } 1712 if (nraid_map_entries) 1713 /* 1714 * This is correct for reads, too high for full stripe writes, 1715 * way too high for partial stripe writes 1716 */ 1717 logical_drive->queue_depth = qdepth; 1718 else 1719 logical_drive->queue_depth = h->nr_cmds; 1720 } 1721 1722 static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h, 1723 struct hpsa_scsi_dev_t *dev[], int ndevices) 1724 { 1725 int i; 1726 1727 for (i = 0; i < ndevices; i++) { 1728 if (dev[i] == NULL) 1729 continue; 1730 if (dev[i]->devtype != TYPE_DISK && 1731 dev[i]->devtype != TYPE_ZBC) 1732 continue; 1733 if (!is_logical_device(dev[i])) 1734 continue; 1735 1736 /* 1737 * If offload is currently enabled, the RAID map and 1738 * phys_disk[] assignment *better* not be changing 1739 * and since it isn't changing, we do not need to 1740 * update it. 1741 */ 1742 if (dev[i]->offload_enabled) 1743 continue; 1744 1745 hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]); 1746 } 1747 } 1748 1749 static int hpsa_add_device(struct ctlr_info *h, struct hpsa_scsi_dev_t *device) 1750 { 1751 int rc = 0; 1752 1753 if (!h->scsi_host) 1754 return 1; 1755 1756 if (is_logical_device(device)) /* RAID */ 1757 rc = scsi_add_device(h->scsi_host, device->bus, 1758 device->target, device->lun); 1759 else /* HBA */ 1760 rc = hpsa_add_sas_device(h->sas_host, device); 1761 1762 return rc; 1763 } 1764 1765 static int hpsa_find_outstanding_commands_for_dev(struct ctlr_info *h, 1766 struct hpsa_scsi_dev_t *dev) 1767 { 1768 int i; 1769 int count = 0; 1770 1771 for (i = 0; i < h->nr_cmds; i++) { 1772 struct CommandList *c = h->cmd_pool + i; 1773 int refcount = atomic_inc_return(&c->refcount); 1774 1775 if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, 1776 dev->scsi3addr)) { 1777 unsigned long flags; 1778 1779 spin_lock_irqsave(&h->lock, flags); /* Implied MB */ 1780 if (!hpsa_is_cmd_idle(c)) 1781 ++count; 1782 spin_unlock_irqrestore(&h->lock, flags); 1783 } 1784 1785 cmd_free(h, c); 1786 } 1787 1788 return count; 1789 } 1790 1791 static void hpsa_wait_for_outstanding_commands_for_dev(struct ctlr_info *h, 1792 struct hpsa_scsi_dev_t *device) 1793 { 1794 int cmds = 0; 1795 int waits = 0; 1796 1797 while (1) { 1798 cmds = hpsa_find_outstanding_commands_for_dev(h, device); 1799 if (cmds == 0) 1800 break; 1801 if (++waits > 20) 1802 break; 1803 dev_warn(&h->pdev->dev, 1804 "%s: removing device with %d outstanding commands!\n", 1805 __func__, cmds); 1806 msleep(1000); 1807 } 1808 } 1809 1810 static void hpsa_remove_device(struct ctlr_info *h, 1811 struct hpsa_scsi_dev_t *device) 1812 { 1813 struct scsi_device *sdev = NULL; 1814 1815 if (!h->scsi_host) 1816 return; 1817 1818 if (is_logical_device(device)) { /* RAID */ 1819 sdev = scsi_device_lookup(h->scsi_host, device->bus, 1820 device->target, device->lun); 1821 if (sdev) { 1822 scsi_remove_device(sdev); 1823 scsi_device_put(sdev); 1824 } else { 1825 /* 1826 * We don't expect to get here. Future commands 1827 * to this device will get a selection timeout as 1828 * if the device were gone. 1829 */ 1830 hpsa_show_dev_msg(KERN_WARNING, h, device, 1831 "didn't find device for removal."); 1832 } 1833 } else { /* HBA */ 1834 1835 device->removed = 1; 1836 hpsa_wait_for_outstanding_commands_for_dev(h, device); 1837 1838 hpsa_remove_sas_device(device); 1839 } 1840 } 1841 1842 static void adjust_hpsa_scsi_table(struct ctlr_info *h, 1843 struct hpsa_scsi_dev_t *sd[], int nsds) 1844 { 1845 /* sd contains scsi3 addresses and devtypes, and inquiry 1846 * data. This function takes what's in sd to be the current 1847 * reality and updates h->dev[] to reflect that reality. 1848 */ 1849 int i, entry, device_change, changes = 0; 1850 struct hpsa_scsi_dev_t *csd; 1851 unsigned long flags; 1852 struct hpsa_scsi_dev_t **added, **removed; 1853 int nadded, nremoved; 1854 1855 /* 1856 * A reset can cause a device status to change 1857 * re-schedule the scan to see what happened. 1858 */ 1859 if (h->reset_in_progress) { 1860 h->drv_req_rescan = 1; 1861 return; 1862 } 1863 1864 added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL); 1865 removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL); 1866 1867 if (!added || !removed) { 1868 dev_warn(&h->pdev->dev, "out of memory in " 1869 "adjust_hpsa_scsi_table\n"); 1870 goto free_and_out; 1871 } 1872 1873 spin_lock_irqsave(&h->devlock, flags); 1874 1875 /* find any devices in h->dev[] that are not in 1876 * sd[] and remove them from h->dev[], and for any 1877 * devices which have changed, remove the old device 1878 * info and add the new device info. 1879 * If minor device attributes change, just update 1880 * the existing device structure. 1881 */ 1882 i = 0; 1883 nremoved = 0; 1884 nadded = 0; 1885 while (i < h->ndevices) { 1886 csd = h->dev[i]; 1887 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry); 1888 if (device_change == DEVICE_NOT_FOUND) { 1889 changes++; 1890 hpsa_scsi_remove_entry(h, i, removed, &nremoved); 1891 continue; /* remove ^^^, hence i not incremented */ 1892 } else if (device_change == DEVICE_CHANGED) { 1893 changes++; 1894 hpsa_scsi_replace_entry(h, i, sd[entry], 1895 added, &nadded, removed, &nremoved); 1896 /* Set it to NULL to prevent it from being freed 1897 * at the bottom of hpsa_update_scsi_devices() 1898 */ 1899 sd[entry] = NULL; 1900 } else if (device_change == DEVICE_UPDATED) { 1901 hpsa_scsi_update_entry(h, i, sd[entry]); 1902 } 1903 i++; 1904 } 1905 1906 /* Now, make sure every device listed in sd[] is also 1907 * listed in h->dev[], adding them if they aren't found 1908 */ 1909 1910 for (i = 0; i < nsds; i++) { 1911 if (!sd[i]) /* if already added above. */ 1912 continue; 1913 1914 /* Don't add devices which are NOT READY, FORMAT IN PROGRESS 1915 * as the SCSI mid-layer does not handle such devices well. 1916 * It relentlessly loops sending TUR at 3Hz, then READ(10) 1917 * at 160Hz, and prevents the system from coming up. 1918 */ 1919 if (sd[i]->volume_offline) { 1920 hpsa_show_volume_status(h, sd[i]); 1921 hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline"); 1922 continue; 1923 } 1924 1925 device_change = hpsa_scsi_find_entry(sd[i], h->dev, 1926 h->ndevices, &entry); 1927 if (device_change == DEVICE_NOT_FOUND) { 1928 changes++; 1929 if (hpsa_scsi_add_entry(h, sd[i], added, &nadded) != 0) 1930 break; 1931 sd[i] = NULL; /* prevent from being freed later. */ 1932 } else if (device_change == DEVICE_CHANGED) { 1933 /* should never happen... */ 1934 changes++; 1935 dev_warn(&h->pdev->dev, 1936 "device unexpectedly changed.\n"); 1937 /* but if it does happen, we just ignore that device */ 1938 } 1939 } 1940 hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices); 1941 1942 /* Now that h->dev[]->phys_disk[] is coherent, we can enable 1943 * any logical drives that need it enabled. 1944 */ 1945 for (i = 0; i < h->ndevices; i++) { 1946 if (h->dev[i] == NULL) 1947 continue; 1948 h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled; 1949 } 1950 1951 spin_unlock_irqrestore(&h->devlock, flags); 1952 1953 /* Monitor devices which are in one of several NOT READY states to be 1954 * brought online later. This must be done without holding h->devlock, 1955 * so don't touch h->dev[] 1956 */ 1957 for (i = 0; i < nsds; i++) { 1958 if (!sd[i]) /* if already added above. */ 1959 continue; 1960 if (sd[i]->volume_offline) 1961 hpsa_monitor_offline_device(h, sd[i]->scsi3addr); 1962 } 1963 1964 /* Don't notify scsi mid layer of any changes the first time through 1965 * (or if there are no changes) scsi_scan_host will do it later the 1966 * first time through. 1967 */ 1968 if (!changes) 1969 goto free_and_out; 1970 1971 /* Notify scsi mid layer of any removed devices */ 1972 for (i = 0; i < nremoved; i++) { 1973 if (removed[i] == NULL) 1974 continue; 1975 if (removed[i]->expose_device) 1976 hpsa_remove_device(h, removed[i]); 1977 kfree(removed[i]); 1978 removed[i] = NULL; 1979 } 1980 1981 /* Notify scsi mid layer of any added devices */ 1982 for (i = 0; i < nadded; i++) { 1983 int rc = 0; 1984 1985 if (added[i] == NULL) 1986 continue; 1987 if (!(added[i]->expose_device)) 1988 continue; 1989 rc = hpsa_add_device(h, added[i]); 1990 if (!rc) 1991 continue; 1992 dev_warn(&h->pdev->dev, 1993 "addition failed %d, device not added.", rc); 1994 /* now we have to remove it from h->dev, 1995 * since it didn't get added to scsi mid layer 1996 */ 1997 fixup_botched_add(h, added[i]); 1998 h->drv_req_rescan = 1; 1999 } 2000 2001 free_and_out: 2002 kfree(added); 2003 kfree(removed); 2004 } 2005 2006 /* 2007 * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t * 2008 * Assume's h->devlock is held. 2009 */ 2010 static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h, 2011 int bus, int target, int lun) 2012 { 2013 int i; 2014 struct hpsa_scsi_dev_t *sd; 2015 2016 for (i = 0; i < h->ndevices; i++) { 2017 sd = h->dev[i]; 2018 if (sd->bus == bus && sd->target == target && sd->lun == lun) 2019 return sd; 2020 } 2021 return NULL; 2022 } 2023 2024 static int hpsa_slave_alloc(struct scsi_device *sdev) 2025 { 2026 struct hpsa_scsi_dev_t *sd; 2027 unsigned long flags; 2028 struct ctlr_info *h; 2029 2030 h = sdev_to_hba(sdev); 2031 spin_lock_irqsave(&h->devlock, flags); 2032 if (sdev_channel(sdev) == HPSA_PHYSICAL_DEVICE_BUS) { 2033 struct scsi_target *starget; 2034 struct sas_rphy *rphy; 2035 2036 starget = scsi_target(sdev); 2037 rphy = target_to_rphy(starget); 2038 sd = hpsa_find_device_by_sas_rphy(h, rphy); 2039 if (sd) { 2040 sd->target = sdev_id(sdev); 2041 sd->lun = sdev->lun; 2042 } 2043 } else 2044 sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev), 2045 sdev_id(sdev), sdev->lun); 2046 2047 if (sd && sd->expose_device) { 2048 atomic_set(&sd->ioaccel_cmds_out, 0); 2049 sdev->hostdata = sd; 2050 } else 2051 sdev->hostdata = NULL; 2052 spin_unlock_irqrestore(&h->devlock, flags); 2053 return 0; 2054 } 2055 2056 /* configure scsi device based on internal per-device structure */ 2057 static int hpsa_slave_configure(struct scsi_device *sdev) 2058 { 2059 struct hpsa_scsi_dev_t *sd; 2060 int queue_depth; 2061 2062 sd = sdev->hostdata; 2063 sdev->no_uld_attach = !sd || !sd->expose_device; 2064 2065 if (sd) 2066 queue_depth = sd->queue_depth != 0 ? 2067 sd->queue_depth : sdev->host->can_queue; 2068 else 2069 queue_depth = sdev->host->can_queue; 2070 2071 scsi_change_queue_depth(sdev, queue_depth); 2072 2073 return 0; 2074 } 2075 2076 static void hpsa_slave_destroy(struct scsi_device *sdev) 2077 { 2078 /* nothing to do. */ 2079 } 2080 2081 static void hpsa_free_ioaccel2_sg_chain_blocks(struct ctlr_info *h) 2082 { 2083 int i; 2084 2085 if (!h->ioaccel2_cmd_sg_list) 2086 return; 2087 for (i = 0; i < h->nr_cmds; i++) { 2088 kfree(h->ioaccel2_cmd_sg_list[i]); 2089 h->ioaccel2_cmd_sg_list[i] = NULL; 2090 } 2091 kfree(h->ioaccel2_cmd_sg_list); 2092 h->ioaccel2_cmd_sg_list = NULL; 2093 } 2094 2095 static int hpsa_allocate_ioaccel2_sg_chain_blocks(struct ctlr_info *h) 2096 { 2097 int i; 2098 2099 if (h->chainsize <= 0) 2100 return 0; 2101 2102 h->ioaccel2_cmd_sg_list = 2103 kzalloc(sizeof(*h->ioaccel2_cmd_sg_list) * h->nr_cmds, 2104 GFP_KERNEL); 2105 if (!h->ioaccel2_cmd_sg_list) 2106 return -ENOMEM; 2107 for (i = 0; i < h->nr_cmds; i++) { 2108 h->ioaccel2_cmd_sg_list[i] = 2109 kmalloc(sizeof(*h->ioaccel2_cmd_sg_list[i]) * 2110 h->maxsgentries, GFP_KERNEL); 2111 if (!h->ioaccel2_cmd_sg_list[i]) 2112 goto clean; 2113 } 2114 return 0; 2115 2116 clean: 2117 hpsa_free_ioaccel2_sg_chain_blocks(h); 2118 return -ENOMEM; 2119 } 2120 2121 static void hpsa_free_sg_chain_blocks(struct ctlr_info *h) 2122 { 2123 int i; 2124 2125 if (!h->cmd_sg_list) 2126 return; 2127 for (i = 0; i < h->nr_cmds; i++) { 2128 kfree(h->cmd_sg_list[i]); 2129 h->cmd_sg_list[i] = NULL; 2130 } 2131 kfree(h->cmd_sg_list); 2132 h->cmd_sg_list = NULL; 2133 } 2134 2135 static int hpsa_alloc_sg_chain_blocks(struct ctlr_info *h) 2136 { 2137 int i; 2138 2139 if (h->chainsize <= 0) 2140 return 0; 2141 2142 h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds, 2143 GFP_KERNEL); 2144 if (!h->cmd_sg_list) { 2145 dev_err(&h->pdev->dev, "Failed to allocate SG list\n"); 2146 return -ENOMEM; 2147 } 2148 for (i = 0; i < h->nr_cmds; i++) { 2149 h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) * 2150 h->chainsize, GFP_KERNEL); 2151 if (!h->cmd_sg_list[i]) { 2152 dev_err(&h->pdev->dev, "Failed to allocate cmd SG\n"); 2153 goto clean; 2154 } 2155 } 2156 return 0; 2157 2158 clean: 2159 hpsa_free_sg_chain_blocks(h); 2160 return -ENOMEM; 2161 } 2162 2163 static int hpsa_map_ioaccel2_sg_chain_block(struct ctlr_info *h, 2164 struct io_accel2_cmd *cp, struct CommandList *c) 2165 { 2166 struct ioaccel2_sg_element *chain_block; 2167 u64 temp64; 2168 u32 chain_size; 2169 2170 chain_block = h->ioaccel2_cmd_sg_list[c->cmdindex]; 2171 chain_size = le32_to_cpu(cp->sg[0].length); 2172 temp64 = pci_map_single(h->pdev, chain_block, chain_size, 2173 PCI_DMA_TODEVICE); 2174 if (dma_mapping_error(&h->pdev->dev, temp64)) { 2175 /* prevent subsequent unmapping */ 2176 cp->sg->address = 0; 2177 return -1; 2178 } 2179 cp->sg->address = cpu_to_le64(temp64); 2180 return 0; 2181 } 2182 2183 static void hpsa_unmap_ioaccel2_sg_chain_block(struct ctlr_info *h, 2184 struct io_accel2_cmd *cp) 2185 { 2186 struct ioaccel2_sg_element *chain_sg; 2187 u64 temp64; 2188 u32 chain_size; 2189 2190 chain_sg = cp->sg; 2191 temp64 = le64_to_cpu(chain_sg->address); 2192 chain_size = le32_to_cpu(cp->sg[0].length); 2193 pci_unmap_single(h->pdev, temp64, chain_size, PCI_DMA_TODEVICE); 2194 } 2195 2196 static int hpsa_map_sg_chain_block(struct ctlr_info *h, 2197 struct CommandList *c) 2198 { 2199 struct SGDescriptor *chain_sg, *chain_block; 2200 u64 temp64; 2201 u32 chain_len; 2202 2203 chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 2204 chain_block = h->cmd_sg_list[c->cmdindex]; 2205 chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN); 2206 chain_len = sizeof(*chain_sg) * 2207 (le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries); 2208 chain_sg->Len = cpu_to_le32(chain_len); 2209 temp64 = pci_map_single(h->pdev, chain_block, chain_len, 2210 PCI_DMA_TODEVICE); 2211 if (dma_mapping_error(&h->pdev->dev, temp64)) { 2212 /* prevent subsequent unmapping */ 2213 chain_sg->Addr = cpu_to_le64(0); 2214 return -1; 2215 } 2216 chain_sg->Addr = cpu_to_le64(temp64); 2217 return 0; 2218 } 2219 2220 static void hpsa_unmap_sg_chain_block(struct ctlr_info *h, 2221 struct CommandList *c) 2222 { 2223 struct SGDescriptor *chain_sg; 2224 2225 if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries) 2226 return; 2227 2228 chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 2229 pci_unmap_single(h->pdev, le64_to_cpu(chain_sg->Addr), 2230 le32_to_cpu(chain_sg->Len), PCI_DMA_TODEVICE); 2231 } 2232 2233 2234 /* Decode the various types of errors on ioaccel2 path. 2235 * Return 1 for any error that should generate a RAID path retry. 2236 * Return 0 for errors that don't require a RAID path retry. 2237 */ 2238 static int handle_ioaccel_mode2_error(struct ctlr_info *h, 2239 struct CommandList *c, 2240 struct scsi_cmnd *cmd, 2241 struct io_accel2_cmd *c2, 2242 struct hpsa_scsi_dev_t *dev) 2243 { 2244 int data_len; 2245 int retry = 0; 2246 u32 ioaccel2_resid = 0; 2247 2248 switch (c2->error_data.serv_response) { 2249 case IOACCEL2_SERV_RESPONSE_COMPLETE: 2250 switch (c2->error_data.status) { 2251 case IOACCEL2_STATUS_SR_TASK_COMP_GOOD: 2252 break; 2253 case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND: 2254 cmd->result |= SAM_STAT_CHECK_CONDITION; 2255 if (c2->error_data.data_present != 2256 IOACCEL2_SENSE_DATA_PRESENT) { 2257 memset(cmd->sense_buffer, 0, 2258 SCSI_SENSE_BUFFERSIZE); 2259 break; 2260 } 2261 /* copy the sense data */ 2262 data_len = c2->error_data.sense_data_len; 2263 if (data_len > SCSI_SENSE_BUFFERSIZE) 2264 data_len = SCSI_SENSE_BUFFERSIZE; 2265 if (data_len > sizeof(c2->error_data.sense_data_buff)) 2266 data_len = 2267 sizeof(c2->error_data.sense_data_buff); 2268 memcpy(cmd->sense_buffer, 2269 c2->error_data.sense_data_buff, data_len); 2270 retry = 1; 2271 break; 2272 case IOACCEL2_STATUS_SR_TASK_COMP_BUSY: 2273 retry = 1; 2274 break; 2275 case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON: 2276 retry = 1; 2277 break; 2278 case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL: 2279 retry = 1; 2280 break; 2281 case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED: 2282 retry = 1; 2283 break; 2284 default: 2285 retry = 1; 2286 break; 2287 } 2288 break; 2289 case IOACCEL2_SERV_RESPONSE_FAILURE: 2290 switch (c2->error_data.status) { 2291 case IOACCEL2_STATUS_SR_IO_ERROR: 2292 case IOACCEL2_STATUS_SR_IO_ABORTED: 2293 case IOACCEL2_STATUS_SR_OVERRUN: 2294 retry = 1; 2295 break; 2296 case IOACCEL2_STATUS_SR_UNDERRUN: 2297 cmd->result = (DID_OK << 16); /* host byte */ 2298 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 2299 ioaccel2_resid = get_unaligned_le32( 2300 &c2->error_data.resid_cnt[0]); 2301 scsi_set_resid(cmd, ioaccel2_resid); 2302 break; 2303 case IOACCEL2_STATUS_SR_NO_PATH_TO_DEVICE: 2304 case IOACCEL2_STATUS_SR_INVALID_DEVICE: 2305 case IOACCEL2_STATUS_SR_IOACCEL_DISABLED: 2306 /* 2307 * Did an HBA disk disappear? We will eventually 2308 * get a state change event from the controller but 2309 * in the meantime, we need to tell the OS that the 2310 * HBA disk is no longer there and stop I/O 2311 * from going down. This allows the potential re-insert 2312 * of the disk to get the same device node. 2313 */ 2314 if (dev->physical_device && dev->expose_device) { 2315 cmd->result = DID_NO_CONNECT << 16; 2316 dev->removed = 1; 2317 h->drv_req_rescan = 1; 2318 dev_warn(&h->pdev->dev, 2319 "%s: device is gone!\n", __func__); 2320 } else 2321 /* 2322 * Retry by sending down the RAID path. 2323 * We will get an event from ctlr to 2324 * trigger rescan regardless. 2325 */ 2326 retry = 1; 2327 break; 2328 default: 2329 retry = 1; 2330 } 2331 break; 2332 case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE: 2333 break; 2334 case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS: 2335 break; 2336 case IOACCEL2_SERV_RESPONSE_TMF_REJECTED: 2337 retry = 1; 2338 break; 2339 case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN: 2340 break; 2341 default: 2342 retry = 1; 2343 break; 2344 } 2345 2346 return retry; /* retry on raid path? */ 2347 } 2348 2349 static void hpsa_cmd_resolve_events(struct ctlr_info *h, 2350 struct CommandList *c) 2351 { 2352 bool do_wake = false; 2353 2354 /* 2355 * Prevent the following race in the abort handler: 2356 * 2357 * 1. LLD is requested to abort a SCSI command 2358 * 2. The SCSI command completes 2359 * 3. The struct CommandList associated with step 2 is made available 2360 * 4. New I/O request to LLD to another LUN re-uses struct CommandList 2361 * 5. Abort handler follows scsi_cmnd->host_scribble and 2362 * finds struct CommandList and tries to aborts it 2363 * Now we have aborted the wrong command. 2364 * 2365 * Reset c->scsi_cmd here so that the abort or reset handler will know 2366 * this command has completed. Then, check to see if the handler is 2367 * waiting for this command, and, if so, wake it. 2368 */ 2369 c->scsi_cmd = SCSI_CMD_IDLE; 2370 mb(); /* Declare command idle before checking for pending events. */ 2371 if (c->abort_pending) { 2372 do_wake = true; 2373 c->abort_pending = false; 2374 } 2375 if (c->reset_pending) { 2376 unsigned long flags; 2377 struct hpsa_scsi_dev_t *dev; 2378 2379 /* 2380 * There appears to be a reset pending; lock the lock and 2381 * reconfirm. If so, then decrement the count of outstanding 2382 * commands and wake the reset command if this is the last one. 2383 */ 2384 spin_lock_irqsave(&h->lock, flags); 2385 dev = c->reset_pending; /* Re-fetch under the lock. */ 2386 if (dev && atomic_dec_and_test(&dev->reset_cmds_out)) 2387 do_wake = true; 2388 c->reset_pending = NULL; 2389 spin_unlock_irqrestore(&h->lock, flags); 2390 } 2391 2392 if (do_wake) 2393 wake_up_all(&h->event_sync_wait_queue); 2394 } 2395 2396 static void hpsa_cmd_resolve_and_free(struct ctlr_info *h, 2397 struct CommandList *c) 2398 { 2399 hpsa_cmd_resolve_events(h, c); 2400 cmd_tagged_free(h, c); 2401 } 2402 2403 static void hpsa_cmd_free_and_done(struct ctlr_info *h, 2404 struct CommandList *c, struct scsi_cmnd *cmd) 2405 { 2406 hpsa_cmd_resolve_and_free(h, c); 2407 if (cmd && cmd->scsi_done) 2408 cmd->scsi_done(cmd); 2409 } 2410 2411 static void hpsa_retry_cmd(struct ctlr_info *h, struct CommandList *c) 2412 { 2413 INIT_WORK(&c->work, hpsa_command_resubmit_worker); 2414 queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work); 2415 } 2416 2417 static void hpsa_set_scsi_cmd_aborted(struct scsi_cmnd *cmd) 2418 { 2419 cmd->result = DID_ABORT << 16; 2420 } 2421 2422 static void hpsa_cmd_abort_and_free(struct ctlr_info *h, struct CommandList *c, 2423 struct scsi_cmnd *cmd) 2424 { 2425 hpsa_set_scsi_cmd_aborted(cmd); 2426 dev_warn(&h->pdev->dev, "CDB %16phN was aborted with status 0x%x\n", 2427 c->Request.CDB, c->err_info->ScsiStatus); 2428 hpsa_cmd_resolve_and_free(h, c); 2429 } 2430 2431 static void process_ioaccel2_completion(struct ctlr_info *h, 2432 struct CommandList *c, struct scsi_cmnd *cmd, 2433 struct hpsa_scsi_dev_t *dev) 2434 { 2435 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 2436 2437 /* check for good status */ 2438 if (likely(c2->error_data.serv_response == 0 && 2439 c2->error_data.status == 0)) 2440 return hpsa_cmd_free_and_done(h, c, cmd); 2441 2442 /* 2443 * Any RAID offload error results in retry which will use 2444 * the normal I/O path so the controller can handle whatever's 2445 * wrong. 2446 */ 2447 if (is_logical_device(dev) && 2448 c2->error_data.serv_response == 2449 IOACCEL2_SERV_RESPONSE_FAILURE) { 2450 if (c2->error_data.status == 2451 IOACCEL2_STATUS_SR_IOACCEL_DISABLED) { 2452 dev->offload_enabled = 0; 2453 dev->offload_to_be_enabled = 0; 2454 } 2455 2456 return hpsa_retry_cmd(h, c); 2457 } 2458 2459 if (handle_ioaccel_mode2_error(h, c, cmd, c2, dev)) 2460 return hpsa_retry_cmd(h, c); 2461 2462 return hpsa_cmd_free_and_done(h, c, cmd); 2463 } 2464 2465 /* Returns 0 on success, < 0 otherwise. */ 2466 static int hpsa_evaluate_tmf_status(struct ctlr_info *h, 2467 struct CommandList *cp) 2468 { 2469 u8 tmf_status = cp->err_info->ScsiStatus; 2470 2471 switch (tmf_status) { 2472 case CISS_TMF_COMPLETE: 2473 /* 2474 * CISS_TMF_COMPLETE never happens, instead, 2475 * ei->CommandStatus == 0 for this case. 2476 */ 2477 case CISS_TMF_SUCCESS: 2478 return 0; 2479 case CISS_TMF_INVALID_FRAME: 2480 case CISS_TMF_NOT_SUPPORTED: 2481 case CISS_TMF_FAILED: 2482 case CISS_TMF_WRONG_LUN: 2483 case CISS_TMF_OVERLAPPED_TAG: 2484 break; 2485 default: 2486 dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n", 2487 tmf_status); 2488 break; 2489 } 2490 return -tmf_status; 2491 } 2492 2493 static void complete_scsi_command(struct CommandList *cp) 2494 { 2495 struct scsi_cmnd *cmd; 2496 struct ctlr_info *h; 2497 struct ErrorInfo *ei; 2498 struct hpsa_scsi_dev_t *dev; 2499 struct io_accel2_cmd *c2; 2500 2501 u8 sense_key; 2502 u8 asc; /* additional sense code */ 2503 u8 ascq; /* additional sense code qualifier */ 2504 unsigned long sense_data_size; 2505 2506 ei = cp->err_info; 2507 cmd = cp->scsi_cmd; 2508 h = cp->h; 2509 2510 if (!cmd->device) { 2511 cmd->result = DID_NO_CONNECT << 16; 2512 return hpsa_cmd_free_and_done(h, cp, cmd); 2513 } 2514 2515 dev = cmd->device->hostdata; 2516 if (!dev) { 2517 cmd->result = DID_NO_CONNECT << 16; 2518 return hpsa_cmd_free_and_done(h, cp, cmd); 2519 } 2520 c2 = &h->ioaccel2_cmd_pool[cp->cmdindex]; 2521 2522 scsi_dma_unmap(cmd); /* undo the DMA mappings */ 2523 if ((cp->cmd_type == CMD_SCSI) && 2524 (le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries)) 2525 hpsa_unmap_sg_chain_block(h, cp); 2526 2527 if ((cp->cmd_type == CMD_IOACCEL2) && 2528 (c2->sg[0].chain_indicator == IOACCEL2_CHAIN)) 2529 hpsa_unmap_ioaccel2_sg_chain_block(h, c2); 2530 2531 cmd->result = (DID_OK << 16); /* host byte */ 2532 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 2533 2534 if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1) { 2535 if (dev->physical_device && dev->expose_device && 2536 dev->removed) { 2537 cmd->result = DID_NO_CONNECT << 16; 2538 return hpsa_cmd_free_and_done(h, cp, cmd); 2539 } 2540 if (likely(cp->phys_disk != NULL)) 2541 atomic_dec(&cp->phys_disk->ioaccel_cmds_out); 2542 } 2543 2544 /* 2545 * We check for lockup status here as it may be set for 2546 * CMD_SCSI, CMD_IOACCEL1 and CMD_IOACCEL2 commands by 2547 * fail_all_oustanding_cmds() 2548 */ 2549 if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) { 2550 /* DID_NO_CONNECT will prevent a retry */ 2551 cmd->result = DID_NO_CONNECT << 16; 2552 return hpsa_cmd_free_and_done(h, cp, cmd); 2553 } 2554 2555 if ((unlikely(hpsa_is_pending_event(cp)))) { 2556 if (cp->reset_pending) 2557 return hpsa_cmd_free_and_done(h, cp, cmd); 2558 if (cp->abort_pending) 2559 return hpsa_cmd_abort_and_free(h, cp, cmd); 2560 } 2561 2562 if (cp->cmd_type == CMD_IOACCEL2) 2563 return process_ioaccel2_completion(h, cp, cmd, dev); 2564 2565 scsi_set_resid(cmd, ei->ResidualCnt); 2566 if (ei->CommandStatus == 0) 2567 return hpsa_cmd_free_and_done(h, cp, cmd); 2568 2569 /* For I/O accelerator commands, copy over some fields to the normal 2570 * CISS header used below for error handling. 2571 */ 2572 if (cp->cmd_type == CMD_IOACCEL1) { 2573 struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex]; 2574 cp->Header.SGList = scsi_sg_count(cmd); 2575 cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList); 2576 cp->Request.CDBLen = le16_to_cpu(c->io_flags) & 2577 IOACCEL1_IOFLAGS_CDBLEN_MASK; 2578 cp->Header.tag = c->tag; 2579 memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8); 2580 memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen); 2581 2582 /* Any RAID offload error results in retry which will use 2583 * the normal I/O path so the controller can handle whatever's 2584 * wrong. 2585 */ 2586 if (is_logical_device(dev)) { 2587 if (ei->CommandStatus == CMD_IOACCEL_DISABLED) 2588 dev->offload_enabled = 0; 2589 return hpsa_retry_cmd(h, cp); 2590 } 2591 } 2592 2593 /* an error has occurred */ 2594 switch (ei->CommandStatus) { 2595 2596 case CMD_TARGET_STATUS: 2597 cmd->result |= ei->ScsiStatus; 2598 /* copy the sense data */ 2599 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo)) 2600 sense_data_size = SCSI_SENSE_BUFFERSIZE; 2601 else 2602 sense_data_size = sizeof(ei->SenseInfo); 2603 if (ei->SenseLen < sense_data_size) 2604 sense_data_size = ei->SenseLen; 2605 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size); 2606 if (ei->ScsiStatus) 2607 decode_sense_data(ei->SenseInfo, sense_data_size, 2608 &sense_key, &asc, &ascq); 2609 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) { 2610 if (sense_key == ABORTED_COMMAND) { 2611 cmd->result |= DID_SOFT_ERROR << 16; 2612 break; 2613 } 2614 break; 2615 } 2616 /* Problem was not a check condition 2617 * Pass it up to the upper layers... 2618 */ 2619 if (ei->ScsiStatus) { 2620 dev_warn(&h->pdev->dev, "cp %p has status 0x%x " 2621 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, " 2622 "Returning result: 0x%x\n", 2623 cp, ei->ScsiStatus, 2624 sense_key, asc, ascq, 2625 cmd->result); 2626 } else { /* scsi status is zero??? How??? */ 2627 dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. " 2628 "Returning no connection.\n", cp), 2629 2630 /* Ordinarily, this case should never happen, 2631 * but there is a bug in some released firmware 2632 * revisions that allows it to happen if, for 2633 * example, a 4100 backplane loses power and 2634 * the tape drive is in it. We assume that 2635 * it's a fatal error of some kind because we 2636 * can't show that it wasn't. We will make it 2637 * look like selection timeout since that is 2638 * the most common reason for this to occur, 2639 * and it's severe enough. 2640 */ 2641 2642 cmd->result = DID_NO_CONNECT << 16; 2643 } 2644 break; 2645 2646 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 2647 break; 2648 case CMD_DATA_OVERRUN: 2649 dev_warn(&h->pdev->dev, 2650 "CDB %16phN data overrun\n", cp->Request.CDB); 2651 break; 2652 case CMD_INVALID: { 2653 /* print_bytes(cp, sizeof(*cp), 1, 0); 2654 print_cmd(cp); */ 2655 /* We get CMD_INVALID if you address a non-existent device 2656 * instead of a selection timeout (no response). You will 2657 * see this if you yank out a drive, then try to access it. 2658 * This is kind of a shame because it means that any other 2659 * CMD_INVALID (e.g. driver bug) will get interpreted as a 2660 * missing target. */ 2661 cmd->result = DID_NO_CONNECT << 16; 2662 } 2663 break; 2664 case CMD_PROTOCOL_ERR: 2665 cmd->result = DID_ERROR << 16; 2666 dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n", 2667 cp->Request.CDB); 2668 break; 2669 case CMD_HARDWARE_ERR: 2670 cmd->result = DID_ERROR << 16; 2671 dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n", 2672 cp->Request.CDB); 2673 break; 2674 case CMD_CONNECTION_LOST: 2675 cmd->result = DID_ERROR << 16; 2676 dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n", 2677 cp->Request.CDB); 2678 break; 2679 case CMD_ABORTED: 2680 /* Return now to avoid calling scsi_done(). */ 2681 return hpsa_cmd_abort_and_free(h, cp, cmd); 2682 case CMD_ABORT_FAILED: 2683 cmd->result = DID_ERROR << 16; 2684 dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n", 2685 cp->Request.CDB); 2686 break; 2687 case CMD_UNSOLICITED_ABORT: 2688 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */ 2689 dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n", 2690 cp->Request.CDB); 2691 break; 2692 case CMD_TIMEOUT: 2693 cmd->result = DID_TIME_OUT << 16; 2694 dev_warn(&h->pdev->dev, "CDB %16phN timed out\n", 2695 cp->Request.CDB); 2696 break; 2697 case CMD_UNABORTABLE: 2698 cmd->result = DID_ERROR << 16; 2699 dev_warn(&h->pdev->dev, "Command unabortable\n"); 2700 break; 2701 case CMD_TMF_STATUS: 2702 if (hpsa_evaluate_tmf_status(h, cp)) /* TMF failed? */ 2703 cmd->result = DID_ERROR << 16; 2704 break; 2705 case CMD_IOACCEL_DISABLED: 2706 /* This only handles the direct pass-through case since RAID 2707 * offload is handled above. Just attempt a retry. 2708 */ 2709 cmd->result = DID_SOFT_ERROR << 16; 2710 dev_warn(&h->pdev->dev, 2711 "cp %p had HP SSD Smart Path error\n", cp); 2712 break; 2713 default: 2714 cmd->result = DID_ERROR << 16; 2715 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n", 2716 cp, ei->CommandStatus); 2717 } 2718 2719 return hpsa_cmd_free_and_done(h, cp, cmd); 2720 } 2721 2722 static void hpsa_pci_unmap(struct pci_dev *pdev, 2723 struct CommandList *c, int sg_used, int data_direction) 2724 { 2725 int i; 2726 2727 for (i = 0; i < sg_used; i++) 2728 pci_unmap_single(pdev, (dma_addr_t) le64_to_cpu(c->SG[i].Addr), 2729 le32_to_cpu(c->SG[i].Len), 2730 data_direction); 2731 } 2732 2733 static int hpsa_map_one(struct pci_dev *pdev, 2734 struct CommandList *cp, 2735 unsigned char *buf, 2736 size_t buflen, 2737 int data_direction) 2738 { 2739 u64 addr64; 2740 2741 if (buflen == 0 || data_direction == PCI_DMA_NONE) { 2742 cp->Header.SGList = 0; 2743 cp->Header.SGTotal = cpu_to_le16(0); 2744 return 0; 2745 } 2746 2747 addr64 = pci_map_single(pdev, buf, buflen, data_direction); 2748 if (dma_mapping_error(&pdev->dev, addr64)) { 2749 /* Prevent subsequent unmap of something never mapped */ 2750 cp->Header.SGList = 0; 2751 cp->Header.SGTotal = cpu_to_le16(0); 2752 return -1; 2753 } 2754 cp->SG[0].Addr = cpu_to_le64(addr64); 2755 cp->SG[0].Len = cpu_to_le32(buflen); 2756 cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */ 2757 cp->Header.SGList = 1; /* no. SGs contig in this cmd */ 2758 cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */ 2759 return 0; 2760 } 2761 2762 #define NO_TIMEOUT ((unsigned long) -1) 2763 #define DEFAULT_TIMEOUT 30000 /* milliseconds */ 2764 static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h, 2765 struct CommandList *c, int reply_queue, unsigned long timeout_msecs) 2766 { 2767 DECLARE_COMPLETION_ONSTACK(wait); 2768 2769 c->waiting = &wait; 2770 __enqueue_cmd_and_start_io(h, c, reply_queue); 2771 if (timeout_msecs == NO_TIMEOUT) { 2772 /* TODO: get rid of this no-timeout thing */ 2773 wait_for_completion_io(&wait); 2774 return IO_OK; 2775 } 2776 if (!wait_for_completion_io_timeout(&wait, 2777 msecs_to_jiffies(timeout_msecs))) { 2778 dev_warn(&h->pdev->dev, "Command timed out.\n"); 2779 return -ETIMEDOUT; 2780 } 2781 return IO_OK; 2782 } 2783 2784 static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c, 2785 int reply_queue, unsigned long timeout_msecs) 2786 { 2787 if (unlikely(lockup_detected(h))) { 2788 c->err_info->CommandStatus = CMD_CTLR_LOCKUP; 2789 return IO_OK; 2790 } 2791 return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs); 2792 } 2793 2794 static u32 lockup_detected(struct ctlr_info *h) 2795 { 2796 int cpu; 2797 u32 rc, *lockup_detected; 2798 2799 cpu = get_cpu(); 2800 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 2801 rc = *lockup_detected; 2802 put_cpu(); 2803 return rc; 2804 } 2805 2806 #define MAX_DRIVER_CMD_RETRIES 25 2807 static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h, 2808 struct CommandList *c, int data_direction, unsigned long timeout_msecs) 2809 { 2810 int backoff_time = 10, retry_count = 0; 2811 int rc; 2812 2813 do { 2814 memset(c->err_info, 0, sizeof(*c->err_info)); 2815 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 2816 timeout_msecs); 2817 if (rc) 2818 break; 2819 retry_count++; 2820 if (retry_count > 3) { 2821 msleep(backoff_time); 2822 if (backoff_time < 1000) 2823 backoff_time *= 2; 2824 } 2825 } while ((check_for_unit_attention(h, c) || 2826 check_for_busy(h, c)) && 2827 retry_count <= MAX_DRIVER_CMD_RETRIES); 2828 hpsa_pci_unmap(h->pdev, c, 1, data_direction); 2829 if (retry_count > MAX_DRIVER_CMD_RETRIES) 2830 rc = -EIO; 2831 return rc; 2832 } 2833 2834 static void hpsa_print_cmd(struct ctlr_info *h, char *txt, 2835 struct CommandList *c) 2836 { 2837 const u8 *cdb = c->Request.CDB; 2838 const u8 *lun = c->Header.LUN.LunAddrBytes; 2839 2840 dev_warn(&h->pdev->dev, "%s: LUN:%8phN CDB:%16phN\n", 2841 txt, lun, cdb); 2842 } 2843 2844 static void hpsa_scsi_interpret_error(struct ctlr_info *h, 2845 struct CommandList *cp) 2846 { 2847 const struct ErrorInfo *ei = cp->err_info; 2848 struct device *d = &cp->h->pdev->dev; 2849 u8 sense_key, asc, ascq; 2850 int sense_len; 2851 2852 switch (ei->CommandStatus) { 2853 case CMD_TARGET_STATUS: 2854 if (ei->SenseLen > sizeof(ei->SenseInfo)) 2855 sense_len = sizeof(ei->SenseInfo); 2856 else 2857 sense_len = ei->SenseLen; 2858 decode_sense_data(ei->SenseInfo, sense_len, 2859 &sense_key, &asc, &ascq); 2860 hpsa_print_cmd(h, "SCSI status", cp); 2861 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) 2862 dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n", 2863 sense_key, asc, ascq); 2864 else 2865 dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus); 2866 if (ei->ScsiStatus == 0) 2867 dev_warn(d, "SCSI status is abnormally zero. " 2868 "(probably indicates selection timeout " 2869 "reported incorrectly due to a known " 2870 "firmware bug, circa July, 2001.)\n"); 2871 break; 2872 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 2873 break; 2874 case CMD_DATA_OVERRUN: 2875 hpsa_print_cmd(h, "overrun condition", cp); 2876 break; 2877 case CMD_INVALID: { 2878 /* controller unfortunately reports SCSI passthru's 2879 * to non-existent targets as invalid commands. 2880 */ 2881 hpsa_print_cmd(h, "invalid command", cp); 2882 dev_warn(d, "probably means device no longer present\n"); 2883 } 2884 break; 2885 case CMD_PROTOCOL_ERR: 2886 hpsa_print_cmd(h, "protocol error", cp); 2887 break; 2888 case CMD_HARDWARE_ERR: 2889 hpsa_print_cmd(h, "hardware error", cp); 2890 break; 2891 case CMD_CONNECTION_LOST: 2892 hpsa_print_cmd(h, "connection lost", cp); 2893 break; 2894 case CMD_ABORTED: 2895 hpsa_print_cmd(h, "aborted", cp); 2896 break; 2897 case CMD_ABORT_FAILED: 2898 hpsa_print_cmd(h, "abort failed", cp); 2899 break; 2900 case CMD_UNSOLICITED_ABORT: 2901 hpsa_print_cmd(h, "unsolicited abort", cp); 2902 break; 2903 case CMD_TIMEOUT: 2904 hpsa_print_cmd(h, "timed out", cp); 2905 break; 2906 case CMD_UNABORTABLE: 2907 hpsa_print_cmd(h, "unabortable", cp); 2908 break; 2909 case CMD_CTLR_LOCKUP: 2910 hpsa_print_cmd(h, "controller lockup detected", cp); 2911 break; 2912 default: 2913 hpsa_print_cmd(h, "unknown status", cp); 2914 dev_warn(d, "Unknown command status %x\n", 2915 ei->CommandStatus); 2916 } 2917 } 2918 2919 static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr, 2920 u16 page, unsigned char *buf, 2921 unsigned char bufsize) 2922 { 2923 int rc = IO_OK; 2924 struct CommandList *c; 2925 struct ErrorInfo *ei; 2926 2927 c = cmd_alloc(h); 2928 2929 if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, 2930 page, scsi3addr, TYPE_CMD)) { 2931 rc = -1; 2932 goto out; 2933 } 2934 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 2935 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 2936 if (rc) 2937 goto out; 2938 ei = c->err_info; 2939 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 2940 hpsa_scsi_interpret_error(h, c); 2941 rc = -1; 2942 } 2943 out: 2944 cmd_free(h, c); 2945 return rc; 2946 } 2947 2948 static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr, 2949 u8 reset_type, int reply_queue) 2950 { 2951 int rc = IO_OK; 2952 struct CommandList *c; 2953 struct ErrorInfo *ei; 2954 2955 c = cmd_alloc(h); 2956 2957 2958 /* fill_cmd can't fail here, no data buffer to map. */ 2959 (void) fill_cmd(c, reset_type, h, NULL, 0, 0, 2960 scsi3addr, TYPE_MSG); 2961 rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 2962 if (rc) { 2963 dev_warn(&h->pdev->dev, "Failed to send reset command\n"); 2964 goto out; 2965 } 2966 /* no unmap needed here because no data xfer. */ 2967 2968 ei = c->err_info; 2969 if (ei->CommandStatus != 0) { 2970 hpsa_scsi_interpret_error(h, c); 2971 rc = -1; 2972 } 2973 out: 2974 cmd_free(h, c); 2975 return rc; 2976 } 2977 2978 static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c, 2979 struct hpsa_scsi_dev_t *dev, 2980 unsigned char *scsi3addr) 2981 { 2982 int i; 2983 bool match = false; 2984 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 2985 struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2; 2986 2987 if (hpsa_is_cmd_idle(c)) 2988 return false; 2989 2990 switch (c->cmd_type) { 2991 case CMD_SCSI: 2992 case CMD_IOCTL_PEND: 2993 match = !memcmp(scsi3addr, &c->Header.LUN.LunAddrBytes, 2994 sizeof(c->Header.LUN.LunAddrBytes)); 2995 break; 2996 2997 case CMD_IOACCEL1: 2998 case CMD_IOACCEL2: 2999 if (c->phys_disk == dev) { 3000 /* HBA mode match */ 3001 match = true; 3002 } else { 3003 /* Possible RAID mode -- check each phys dev. */ 3004 /* FIXME: Do we need to take out a lock here? If 3005 * so, we could just call hpsa_get_pdisk_of_ioaccel2() 3006 * instead. */ 3007 for (i = 0; i < dev->nphysical_disks && !match; i++) { 3008 /* FIXME: an alternate test might be 3009 * 3010 * match = dev->phys_disk[i]->ioaccel_handle 3011 * == c2->scsi_nexus; */ 3012 match = dev->phys_disk[i] == c->phys_disk; 3013 } 3014 } 3015 break; 3016 3017 case IOACCEL2_TMF: 3018 for (i = 0; i < dev->nphysical_disks && !match; i++) { 3019 match = dev->phys_disk[i]->ioaccel_handle == 3020 le32_to_cpu(ac->it_nexus); 3021 } 3022 break; 3023 3024 case 0: /* The command is in the middle of being initialized. */ 3025 match = false; 3026 break; 3027 3028 default: 3029 dev_err(&h->pdev->dev, "unexpected cmd_type: %d\n", 3030 c->cmd_type); 3031 BUG(); 3032 } 3033 3034 return match; 3035 } 3036 3037 static int hpsa_do_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev, 3038 unsigned char *scsi3addr, u8 reset_type, int reply_queue) 3039 { 3040 int i; 3041 int rc = 0; 3042 3043 /* We can really only handle one reset at a time */ 3044 if (mutex_lock_interruptible(&h->reset_mutex) == -EINTR) { 3045 dev_warn(&h->pdev->dev, "concurrent reset wait interrupted.\n"); 3046 return -EINTR; 3047 } 3048 3049 BUG_ON(atomic_read(&dev->reset_cmds_out) != 0); 3050 3051 for (i = 0; i < h->nr_cmds; i++) { 3052 struct CommandList *c = h->cmd_pool + i; 3053 int refcount = atomic_inc_return(&c->refcount); 3054 3055 if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, scsi3addr)) { 3056 unsigned long flags; 3057 3058 /* 3059 * Mark the target command as having a reset pending, 3060 * then lock a lock so that the command cannot complete 3061 * while we're considering it. If the command is not 3062 * idle then count it; otherwise revoke the event. 3063 */ 3064 c->reset_pending = dev; 3065 spin_lock_irqsave(&h->lock, flags); /* Implied MB */ 3066 if (!hpsa_is_cmd_idle(c)) 3067 atomic_inc(&dev->reset_cmds_out); 3068 else 3069 c->reset_pending = NULL; 3070 spin_unlock_irqrestore(&h->lock, flags); 3071 } 3072 3073 cmd_free(h, c); 3074 } 3075 3076 rc = hpsa_send_reset(h, scsi3addr, reset_type, reply_queue); 3077 if (!rc) 3078 wait_event(h->event_sync_wait_queue, 3079 atomic_read(&dev->reset_cmds_out) == 0 || 3080 lockup_detected(h)); 3081 3082 if (unlikely(lockup_detected(h))) { 3083 dev_warn(&h->pdev->dev, 3084 "Controller lockup detected during reset wait\n"); 3085 rc = -ENODEV; 3086 } 3087 3088 if (unlikely(rc)) 3089 atomic_set(&dev->reset_cmds_out, 0); 3090 else 3091 wait_for_device_to_become_ready(h, scsi3addr, 0); 3092 3093 mutex_unlock(&h->reset_mutex); 3094 return rc; 3095 } 3096 3097 static void hpsa_get_raid_level(struct ctlr_info *h, 3098 unsigned char *scsi3addr, unsigned char *raid_level) 3099 { 3100 int rc; 3101 unsigned char *buf; 3102 3103 *raid_level = RAID_UNKNOWN; 3104 buf = kzalloc(64, GFP_KERNEL); 3105 if (!buf) 3106 return; 3107 3108 if (!hpsa_vpd_page_supported(h, scsi3addr, 3109 HPSA_VPD_LV_DEVICE_GEOMETRY)) 3110 goto exit; 3111 3112 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 3113 HPSA_VPD_LV_DEVICE_GEOMETRY, buf, 64); 3114 3115 if (rc == 0) 3116 *raid_level = buf[8]; 3117 if (*raid_level > RAID_UNKNOWN) 3118 *raid_level = RAID_UNKNOWN; 3119 exit: 3120 kfree(buf); 3121 return; 3122 } 3123 3124 #define HPSA_MAP_DEBUG 3125 #ifdef HPSA_MAP_DEBUG 3126 static void hpsa_debug_map_buff(struct ctlr_info *h, int rc, 3127 struct raid_map_data *map_buff) 3128 { 3129 struct raid_map_disk_data *dd = &map_buff->data[0]; 3130 int map, row, col; 3131 u16 map_cnt, row_cnt, disks_per_row; 3132 3133 if (rc != 0) 3134 return; 3135 3136 /* Show details only if debugging has been activated. */ 3137 if (h->raid_offload_debug < 2) 3138 return; 3139 3140 dev_info(&h->pdev->dev, "structure_size = %u\n", 3141 le32_to_cpu(map_buff->structure_size)); 3142 dev_info(&h->pdev->dev, "volume_blk_size = %u\n", 3143 le32_to_cpu(map_buff->volume_blk_size)); 3144 dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n", 3145 le64_to_cpu(map_buff->volume_blk_cnt)); 3146 dev_info(&h->pdev->dev, "physicalBlockShift = %u\n", 3147 map_buff->phys_blk_shift); 3148 dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n", 3149 map_buff->parity_rotation_shift); 3150 dev_info(&h->pdev->dev, "strip_size = %u\n", 3151 le16_to_cpu(map_buff->strip_size)); 3152 dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n", 3153 le64_to_cpu(map_buff->disk_starting_blk)); 3154 dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n", 3155 le64_to_cpu(map_buff->disk_blk_cnt)); 3156 dev_info(&h->pdev->dev, "data_disks_per_row = %u\n", 3157 le16_to_cpu(map_buff->data_disks_per_row)); 3158 dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n", 3159 le16_to_cpu(map_buff->metadata_disks_per_row)); 3160 dev_info(&h->pdev->dev, "row_cnt = %u\n", 3161 le16_to_cpu(map_buff->row_cnt)); 3162 dev_info(&h->pdev->dev, "layout_map_count = %u\n", 3163 le16_to_cpu(map_buff->layout_map_count)); 3164 dev_info(&h->pdev->dev, "flags = 0x%x\n", 3165 le16_to_cpu(map_buff->flags)); 3166 dev_info(&h->pdev->dev, "encrypytion = %s\n", 3167 le16_to_cpu(map_buff->flags) & 3168 RAID_MAP_FLAG_ENCRYPT_ON ? "ON" : "OFF"); 3169 dev_info(&h->pdev->dev, "dekindex = %u\n", 3170 le16_to_cpu(map_buff->dekindex)); 3171 map_cnt = le16_to_cpu(map_buff->layout_map_count); 3172 for (map = 0; map < map_cnt; map++) { 3173 dev_info(&h->pdev->dev, "Map%u:\n", map); 3174 row_cnt = le16_to_cpu(map_buff->row_cnt); 3175 for (row = 0; row < row_cnt; row++) { 3176 dev_info(&h->pdev->dev, " Row%u:\n", row); 3177 disks_per_row = 3178 le16_to_cpu(map_buff->data_disks_per_row); 3179 for (col = 0; col < disks_per_row; col++, dd++) 3180 dev_info(&h->pdev->dev, 3181 " D%02u: h=0x%04x xor=%u,%u\n", 3182 col, dd->ioaccel_handle, 3183 dd->xor_mult[0], dd->xor_mult[1]); 3184 disks_per_row = 3185 le16_to_cpu(map_buff->metadata_disks_per_row); 3186 for (col = 0; col < disks_per_row; col++, dd++) 3187 dev_info(&h->pdev->dev, 3188 " M%02u: h=0x%04x xor=%u,%u\n", 3189 col, dd->ioaccel_handle, 3190 dd->xor_mult[0], dd->xor_mult[1]); 3191 } 3192 } 3193 } 3194 #else 3195 static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h, 3196 __attribute__((unused)) int rc, 3197 __attribute__((unused)) struct raid_map_data *map_buff) 3198 { 3199 } 3200 #endif 3201 3202 static int hpsa_get_raid_map(struct ctlr_info *h, 3203 unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device) 3204 { 3205 int rc = 0; 3206 struct CommandList *c; 3207 struct ErrorInfo *ei; 3208 3209 c = cmd_alloc(h); 3210 3211 if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map, 3212 sizeof(this_device->raid_map), 0, 3213 scsi3addr, TYPE_CMD)) { 3214 dev_warn(&h->pdev->dev, "hpsa_get_raid_map fill_cmd failed\n"); 3215 cmd_free(h, c); 3216 return -1; 3217 } 3218 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3219 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 3220 if (rc) 3221 goto out; 3222 ei = c->err_info; 3223 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3224 hpsa_scsi_interpret_error(h, c); 3225 rc = -1; 3226 goto out; 3227 } 3228 cmd_free(h, c); 3229 3230 /* @todo in the future, dynamically allocate RAID map memory */ 3231 if (le32_to_cpu(this_device->raid_map.structure_size) > 3232 sizeof(this_device->raid_map)) { 3233 dev_warn(&h->pdev->dev, "RAID map size is too large!\n"); 3234 rc = -1; 3235 } 3236 hpsa_debug_map_buff(h, rc, &this_device->raid_map); 3237 return rc; 3238 out: 3239 cmd_free(h, c); 3240 return rc; 3241 } 3242 3243 static int hpsa_bmic_sense_subsystem_information(struct ctlr_info *h, 3244 unsigned char scsi3addr[], u16 bmic_device_index, 3245 struct bmic_sense_subsystem_info *buf, size_t bufsize) 3246 { 3247 int rc = IO_OK; 3248 struct CommandList *c; 3249 struct ErrorInfo *ei; 3250 3251 c = cmd_alloc(h); 3252 3253 rc = fill_cmd(c, BMIC_SENSE_SUBSYSTEM_INFORMATION, h, buf, bufsize, 3254 0, RAID_CTLR_LUNID, TYPE_CMD); 3255 if (rc) 3256 goto out; 3257 3258 c->Request.CDB[2] = bmic_device_index & 0xff; 3259 c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff; 3260 3261 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3262 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 3263 if (rc) 3264 goto out; 3265 ei = c->err_info; 3266 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3267 hpsa_scsi_interpret_error(h, c); 3268 rc = -1; 3269 } 3270 out: 3271 cmd_free(h, c); 3272 return rc; 3273 } 3274 3275 static int hpsa_bmic_id_controller(struct ctlr_info *h, 3276 struct bmic_identify_controller *buf, size_t bufsize) 3277 { 3278 int rc = IO_OK; 3279 struct CommandList *c; 3280 struct ErrorInfo *ei; 3281 3282 c = cmd_alloc(h); 3283 3284 rc = fill_cmd(c, BMIC_IDENTIFY_CONTROLLER, h, buf, bufsize, 3285 0, RAID_CTLR_LUNID, TYPE_CMD); 3286 if (rc) 3287 goto out; 3288 3289 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3290 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 3291 if (rc) 3292 goto out; 3293 ei = c->err_info; 3294 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3295 hpsa_scsi_interpret_error(h, c); 3296 rc = -1; 3297 } 3298 out: 3299 cmd_free(h, c); 3300 return rc; 3301 } 3302 3303 static int hpsa_bmic_id_physical_device(struct ctlr_info *h, 3304 unsigned char scsi3addr[], u16 bmic_device_index, 3305 struct bmic_identify_physical_device *buf, size_t bufsize) 3306 { 3307 int rc = IO_OK; 3308 struct CommandList *c; 3309 struct ErrorInfo *ei; 3310 3311 c = cmd_alloc(h); 3312 rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize, 3313 0, RAID_CTLR_LUNID, TYPE_CMD); 3314 if (rc) 3315 goto out; 3316 3317 c->Request.CDB[2] = bmic_device_index & 0xff; 3318 c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff; 3319 3320 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE, 3321 DEFAULT_TIMEOUT); 3322 ei = c->err_info; 3323 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3324 hpsa_scsi_interpret_error(h, c); 3325 rc = -1; 3326 } 3327 out: 3328 cmd_free(h, c); 3329 3330 return rc; 3331 } 3332 3333 /* 3334 * get enclosure information 3335 * struct ReportExtendedLUNdata *rlep - Used for BMIC drive number 3336 * struct hpsa_scsi_dev_t *encl_dev - device entry for enclosure 3337 * Uses id_physical_device to determine the box_index. 3338 */ 3339 static void hpsa_get_enclosure_info(struct ctlr_info *h, 3340 unsigned char *scsi3addr, 3341 struct ReportExtendedLUNdata *rlep, int rle_index, 3342 struct hpsa_scsi_dev_t *encl_dev) 3343 { 3344 int rc = -1; 3345 struct CommandList *c = NULL; 3346 struct ErrorInfo *ei = NULL; 3347 struct bmic_sense_storage_box_params *bssbp = NULL; 3348 struct bmic_identify_physical_device *id_phys = NULL; 3349 struct ext_report_lun_entry *rle = &rlep->LUN[rle_index]; 3350 u16 bmic_device_index = 0; 3351 3352 bmic_device_index = GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]); 3353 3354 if (bmic_device_index == 0xFF00 || MASKED_DEVICE(&rle->lunid[0])) { 3355 rc = IO_OK; 3356 goto out; 3357 } 3358 3359 bssbp = kzalloc(sizeof(*bssbp), GFP_KERNEL); 3360 if (!bssbp) 3361 goto out; 3362 3363 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 3364 if (!id_phys) 3365 goto out; 3366 3367 rc = hpsa_bmic_id_physical_device(h, scsi3addr, bmic_device_index, 3368 id_phys, sizeof(*id_phys)); 3369 if (rc) { 3370 dev_warn(&h->pdev->dev, "%s: id_phys failed %d bdi[0x%x]\n", 3371 __func__, encl_dev->external, bmic_device_index); 3372 goto out; 3373 } 3374 3375 c = cmd_alloc(h); 3376 3377 rc = fill_cmd(c, BMIC_SENSE_STORAGE_BOX_PARAMS, h, bssbp, 3378 sizeof(*bssbp), 0, RAID_CTLR_LUNID, TYPE_CMD); 3379 3380 if (rc) 3381 goto out; 3382 3383 if (id_phys->phys_connector[1] == 'E') 3384 c->Request.CDB[5] = id_phys->box_index; 3385 else 3386 c->Request.CDB[5] = 0; 3387 3388 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE, 3389 DEFAULT_TIMEOUT); 3390 if (rc) 3391 goto out; 3392 3393 ei = c->err_info; 3394 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3395 rc = -1; 3396 goto out; 3397 } 3398 3399 encl_dev->box[id_phys->active_path_number] = bssbp->phys_box_on_port; 3400 memcpy(&encl_dev->phys_connector[id_phys->active_path_number], 3401 bssbp->phys_connector, sizeof(bssbp->phys_connector)); 3402 3403 rc = IO_OK; 3404 out: 3405 kfree(bssbp); 3406 kfree(id_phys); 3407 3408 if (c) 3409 cmd_free(h, c); 3410 3411 if (rc != IO_OK) 3412 hpsa_show_dev_msg(KERN_INFO, h, encl_dev, 3413 "Error, could not get enclosure information\n"); 3414 } 3415 3416 static u64 hpsa_get_sas_address_from_report_physical(struct ctlr_info *h, 3417 unsigned char *scsi3addr) 3418 { 3419 struct ReportExtendedLUNdata *physdev; 3420 u32 nphysicals; 3421 u64 sa = 0; 3422 int i; 3423 3424 physdev = kzalloc(sizeof(*physdev), GFP_KERNEL); 3425 if (!physdev) 3426 return 0; 3427 3428 if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) { 3429 dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 3430 kfree(physdev); 3431 return 0; 3432 } 3433 nphysicals = get_unaligned_be32(physdev->LUNListLength) / 24; 3434 3435 for (i = 0; i < nphysicals; i++) 3436 if (!memcmp(&physdev->LUN[i].lunid[0], scsi3addr, 8)) { 3437 sa = get_unaligned_be64(&physdev->LUN[i].wwid[0]); 3438 break; 3439 } 3440 3441 kfree(physdev); 3442 3443 return sa; 3444 } 3445 3446 static void hpsa_get_sas_address(struct ctlr_info *h, unsigned char *scsi3addr, 3447 struct hpsa_scsi_dev_t *dev) 3448 { 3449 int rc; 3450 u64 sa = 0; 3451 3452 if (is_hba_lunid(scsi3addr)) { 3453 struct bmic_sense_subsystem_info *ssi; 3454 3455 ssi = kzalloc(sizeof(*ssi), GFP_KERNEL); 3456 if (ssi == NULL) { 3457 dev_warn(&h->pdev->dev, 3458 "%s: out of memory\n", __func__); 3459 return; 3460 } 3461 3462 rc = hpsa_bmic_sense_subsystem_information(h, 3463 scsi3addr, 0, ssi, sizeof(*ssi)); 3464 if (rc == 0) { 3465 sa = get_unaligned_be64(ssi->primary_world_wide_id); 3466 h->sas_address = sa; 3467 } 3468 3469 kfree(ssi); 3470 } else 3471 sa = hpsa_get_sas_address_from_report_physical(h, scsi3addr); 3472 3473 dev->sas_address = sa; 3474 } 3475 3476 /* Get a device id from inquiry page 0x83 */ 3477 static bool hpsa_vpd_page_supported(struct ctlr_info *h, 3478 unsigned char scsi3addr[], u8 page) 3479 { 3480 int rc; 3481 int i; 3482 int pages; 3483 unsigned char *buf, bufsize; 3484 3485 buf = kzalloc(256, GFP_KERNEL); 3486 if (!buf) 3487 return false; 3488 3489 /* Get the size of the page list first */ 3490 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 3491 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES, 3492 buf, HPSA_VPD_HEADER_SZ); 3493 if (rc != 0) 3494 goto exit_unsupported; 3495 pages = buf[3]; 3496 if ((pages + HPSA_VPD_HEADER_SZ) <= 255) 3497 bufsize = pages + HPSA_VPD_HEADER_SZ; 3498 else 3499 bufsize = 255; 3500 3501 /* Get the whole VPD page list */ 3502 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 3503 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES, 3504 buf, bufsize); 3505 if (rc != 0) 3506 goto exit_unsupported; 3507 3508 pages = buf[3]; 3509 for (i = 1; i <= pages; i++) 3510 if (buf[3 + i] == page) 3511 goto exit_supported; 3512 exit_unsupported: 3513 kfree(buf); 3514 return false; 3515 exit_supported: 3516 kfree(buf); 3517 return true; 3518 } 3519 3520 static void hpsa_get_ioaccel_status(struct ctlr_info *h, 3521 unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device) 3522 { 3523 int rc; 3524 unsigned char *buf; 3525 u8 ioaccel_status; 3526 3527 this_device->offload_config = 0; 3528 this_device->offload_enabled = 0; 3529 this_device->offload_to_be_enabled = 0; 3530 3531 buf = kzalloc(64, GFP_KERNEL); 3532 if (!buf) 3533 return; 3534 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS)) 3535 goto out; 3536 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 3537 VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64); 3538 if (rc != 0) 3539 goto out; 3540 3541 #define IOACCEL_STATUS_BYTE 4 3542 #define OFFLOAD_CONFIGURED_BIT 0x01 3543 #define OFFLOAD_ENABLED_BIT 0x02 3544 ioaccel_status = buf[IOACCEL_STATUS_BYTE]; 3545 this_device->offload_config = 3546 !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT); 3547 if (this_device->offload_config) { 3548 this_device->offload_enabled = 3549 !!(ioaccel_status & OFFLOAD_ENABLED_BIT); 3550 if (hpsa_get_raid_map(h, scsi3addr, this_device)) 3551 this_device->offload_enabled = 0; 3552 } 3553 this_device->offload_to_be_enabled = this_device->offload_enabled; 3554 out: 3555 kfree(buf); 3556 return; 3557 } 3558 3559 /* Get the device id from inquiry page 0x83 */ 3560 static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr, 3561 unsigned char *device_id, int index, int buflen) 3562 { 3563 int rc; 3564 unsigned char *buf; 3565 3566 /* Does controller have VPD for device id? */ 3567 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_DEVICE_ID)) 3568 return 1; /* not supported */ 3569 3570 buf = kzalloc(64, GFP_KERNEL); 3571 if (!buf) 3572 return -ENOMEM; 3573 3574 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 3575 HPSA_VPD_LV_DEVICE_ID, buf, 64); 3576 if (rc == 0) { 3577 if (buflen > 16) 3578 buflen = 16; 3579 memcpy(device_id, &buf[8], buflen); 3580 } 3581 3582 kfree(buf); 3583 3584 return rc; /*0 - got id, otherwise, didn't */ 3585 } 3586 3587 static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical, 3588 void *buf, int bufsize, 3589 int extended_response) 3590 { 3591 int rc = IO_OK; 3592 struct CommandList *c; 3593 unsigned char scsi3addr[8]; 3594 struct ErrorInfo *ei; 3595 3596 c = cmd_alloc(h); 3597 3598 /* address the controller */ 3599 memset(scsi3addr, 0, sizeof(scsi3addr)); 3600 if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h, 3601 buf, bufsize, 0, scsi3addr, TYPE_CMD)) { 3602 rc = -1; 3603 goto out; 3604 } 3605 if (extended_response) 3606 c->Request.CDB[1] = extended_response; 3607 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3608 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 3609 if (rc) 3610 goto out; 3611 ei = c->err_info; 3612 if (ei->CommandStatus != 0 && 3613 ei->CommandStatus != CMD_DATA_UNDERRUN) { 3614 hpsa_scsi_interpret_error(h, c); 3615 rc = -1; 3616 } else { 3617 struct ReportLUNdata *rld = buf; 3618 3619 if (rld->extended_response_flag != extended_response) { 3620 dev_err(&h->pdev->dev, 3621 "report luns requested format %u, got %u\n", 3622 extended_response, 3623 rld->extended_response_flag); 3624 rc = -1; 3625 } 3626 } 3627 out: 3628 cmd_free(h, c); 3629 return rc; 3630 } 3631 3632 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 3633 struct ReportExtendedLUNdata *buf, int bufsize) 3634 { 3635 int rc; 3636 struct ReportLUNdata *lbuf; 3637 3638 rc = hpsa_scsi_do_report_luns(h, 0, buf, bufsize, 3639 HPSA_REPORT_PHYS_EXTENDED); 3640 if (!rc || !hpsa_allow_any) 3641 return rc; 3642 3643 /* REPORT PHYS EXTENDED is not supported */ 3644 lbuf = kzalloc(sizeof(*lbuf), GFP_KERNEL); 3645 if (!lbuf) 3646 return -ENOMEM; 3647 3648 rc = hpsa_scsi_do_report_luns(h, 0, lbuf, sizeof(*lbuf), 0); 3649 if (!rc) { 3650 int i; 3651 u32 nphys; 3652 3653 /* Copy ReportLUNdata header */ 3654 memcpy(buf, lbuf, 8); 3655 nphys = be32_to_cpu(*((__be32 *)lbuf->LUNListLength)) / 8; 3656 for (i = 0; i < nphys; i++) 3657 memcpy(buf->LUN[i].lunid, lbuf->LUN[i], 8); 3658 } 3659 kfree(lbuf); 3660 return rc; 3661 } 3662 3663 static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h, 3664 struct ReportLUNdata *buf, int bufsize) 3665 { 3666 return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0); 3667 } 3668 3669 static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device, 3670 int bus, int target, int lun) 3671 { 3672 device->bus = bus; 3673 device->target = target; 3674 device->lun = lun; 3675 } 3676 3677 /* Use VPD inquiry to get details of volume status */ 3678 static int hpsa_get_volume_status(struct ctlr_info *h, 3679 unsigned char scsi3addr[]) 3680 { 3681 int rc; 3682 int status; 3683 int size; 3684 unsigned char *buf; 3685 3686 buf = kzalloc(64, GFP_KERNEL); 3687 if (!buf) 3688 return HPSA_VPD_LV_STATUS_UNSUPPORTED; 3689 3690 /* Does controller have VPD for logical volume status? */ 3691 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS)) 3692 goto exit_failed; 3693 3694 /* Get the size of the VPD return buffer */ 3695 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS, 3696 buf, HPSA_VPD_HEADER_SZ); 3697 if (rc != 0) 3698 goto exit_failed; 3699 size = buf[3]; 3700 3701 /* Now get the whole VPD buffer */ 3702 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS, 3703 buf, size + HPSA_VPD_HEADER_SZ); 3704 if (rc != 0) 3705 goto exit_failed; 3706 status = buf[4]; /* status byte */ 3707 3708 kfree(buf); 3709 return status; 3710 exit_failed: 3711 kfree(buf); 3712 return HPSA_VPD_LV_STATUS_UNSUPPORTED; 3713 } 3714 3715 /* Determine offline status of a volume. 3716 * Return either: 3717 * 0 (not offline) 3718 * 0xff (offline for unknown reasons) 3719 * # (integer code indicating one of several NOT READY states 3720 * describing why a volume is to be kept offline) 3721 */ 3722 static int hpsa_volume_offline(struct ctlr_info *h, 3723 unsigned char scsi3addr[]) 3724 { 3725 struct CommandList *c; 3726 unsigned char *sense; 3727 u8 sense_key, asc, ascq; 3728 int sense_len; 3729 int rc, ldstat = 0; 3730 u16 cmd_status; 3731 u8 scsi_status; 3732 #define ASC_LUN_NOT_READY 0x04 3733 #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04 3734 #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02 3735 3736 c = cmd_alloc(h); 3737 3738 (void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD); 3739 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 3740 DEFAULT_TIMEOUT); 3741 if (rc) { 3742 cmd_free(h, c); 3743 return 0; 3744 } 3745 sense = c->err_info->SenseInfo; 3746 if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo)) 3747 sense_len = sizeof(c->err_info->SenseInfo); 3748 else 3749 sense_len = c->err_info->SenseLen; 3750 decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq); 3751 cmd_status = c->err_info->CommandStatus; 3752 scsi_status = c->err_info->ScsiStatus; 3753 cmd_free(h, c); 3754 /* Is the volume 'not ready'? */ 3755 if (cmd_status != CMD_TARGET_STATUS || 3756 scsi_status != SAM_STAT_CHECK_CONDITION || 3757 sense_key != NOT_READY || 3758 asc != ASC_LUN_NOT_READY) { 3759 return 0; 3760 } 3761 3762 /* Determine the reason for not ready state */ 3763 ldstat = hpsa_get_volume_status(h, scsi3addr); 3764 3765 /* Keep volume offline in certain cases: */ 3766 switch (ldstat) { 3767 case HPSA_LV_UNDERGOING_ERASE: 3768 case HPSA_LV_NOT_AVAILABLE: 3769 case HPSA_LV_UNDERGOING_RPI: 3770 case HPSA_LV_PENDING_RPI: 3771 case HPSA_LV_ENCRYPTED_NO_KEY: 3772 case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER: 3773 case HPSA_LV_UNDERGOING_ENCRYPTION: 3774 case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING: 3775 case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 3776 return ldstat; 3777 case HPSA_VPD_LV_STATUS_UNSUPPORTED: 3778 /* If VPD status page isn't available, 3779 * use ASC/ASCQ to determine state 3780 */ 3781 if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) || 3782 (ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ)) 3783 return ldstat; 3784 break; 3785 default: 3786 break; 3787 } 3788 return 0; 3789 } 3790 3791 /* 3792 * Find out if a logical device supports aborts by simply trying one. 3793 * Smart Array may claim not to support aborts on logical drives, but 3794 * if a MSA2000 * is connected, the drives on that will be presented 3795 * by the Smart Array as logical drives, and aborts may be sent to 3796 * those devices successfully. So the simplest way to find out is 3797 * to simply try an abort and see how the device responds. 3798 */ 3799 static int hpsa_device_supports_aborts(struct ctlr_info *h, 3800 unsigned char *scsi3addr) 3801 { 3802 struct CommandList *c; 3803 struct ErrorInfo *ei; 3804 int rc = 0; 3805 3806 u64 tag = (u64) -1; /* bogus tag */ 3807 3808 /* Assume that physical devices support aborts */ 3809 if (!is_logical_dev_addr_mode(scsi3addr)) 3810 return 1; 3811 3812 c = cmd_alloc(h); 3813 3814 (void) fill_cmd(c, HPSA_ABORT_MSG, h, &tag, 0, 0, scsi3addr, TYPE_MSG); 3815 (void) hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 3816 DEFAULT_TIMEOUT); 3817 /* no unmap needed here because no data xfer. */ 3818 ei = c->err_info; 3819 switch (ei->CommandStatus) { 3820 case CMD_INVALID: 3821 rc = 0; 3822 break; 3823 case CMD_UNABORTABLE: 3824 case CMD_ABORT_FAILED: 3825 rc = 1; 3826 break; 3827 case CMD_TMF_STATUS: 3828 rc = hpsa_evaluate_tmf_status(h, c); 3829 break; 3830 default: 3831 rc = 0; 3832 break; 3833 } 3834 cmd_free(h, c); 3835 return rc; 3836 } 3837 3838 static int hpsa_update_device_info(struct ctlr_info *h, 3839 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device, 3840 unsigned char *is_OBDR_device) 3841 { 3842 3843 #define OBDR_SIG_OFFSET 43 3844 #define OBDR_TAPE_SIG "$DR-10" 3845 #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1) 3846 #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN) 3847 3848 unsigned char *inq_buff; 3849 unsigned char *obdr_sig; 3850 int rc = 0; 3851 3852 inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL); 3853 if (!inq_buff) { 3854 rc = -ENOMEM; 3855 goto bail_out; 3856 } 3857 3858 /* Do an inquiry to the device to see what it is. */ 3859 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff, 3860 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) { 3861 /* Inquiry failed (msg printed already) */ 3862 dev_err(&h->pdev->dev, 3863 "hpsa_update_device_info: inquiry failed\n"); 3864 rc = -EIO; 3865 goto bail_out; 3866 } 3867 3868 scsi_sanitize_inquiry_string(&inq_buff[8], 8); 3869 scsi_sanitize_inquiry_string(&inq_buff[16], 16); 3870 3871 this_device->devtype = (inq_buff[0] & 0x1f); 3872 memcpy(this_device->scsi3addr, scsi3addr, 8); 3873 memcpy(this_device->vendor, &inq_buff[8], 3874 sizeof(this_device->vendor)); 3875 memcpy(this_device->model, &inq_buff[16], 3876 sizeof(this_device->model)); 3877 memset(this_device->device_id, 0, 3878 sizeof(this_device->device_id)); 3879 if (hpsa_get_device_id(h, scsi3addr, this_device->device_id, 8, 3880 sizeof(this_device->device_id))) 3881 dev_err(&h->pdev->dev, 3882 "hpsa%d: %s: can't get device id for host %d:C0:T%d:L%d\t%s\t%.16s\n", 3883 h->ctlr, __func__, 3884 h->scsi_host->host_no, 3885 this_device->target, this_device->lun, 3886 scsi_device_type(this_device->devtype), 3887 this_device->model); 3888 3889 if ((this_device->devtype == TYPE_DISK || 3890 this_device->devtype == TYPE_ZBC) && 3891 is_logical_dev_addr_mode(scsi3addr)) { 3892 int volume_offline; 3893 3894 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level); 3895 if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC) 3896 hpsa_get_ioaccel_status(h, scsi3addr, this_device); 3897 volume_offline = hpsa_volume_offline(h, scsi3addr); 3898 if (volume_offline < 0 || volume_offline > 0xff) 3899 volume_offline = HPSA_VPD_LV_STATUS_UNSUPPORTED; 3900 this_device->volume_offline = volume_offline & 0xff; 3901 } else { 3902 this_device->raid_level = RAID_UNKNOWN; 3903 this_device->offload_config = 0; 3904 this_device->offload_enabled = 0; 3905 this_device->offload_to_be_enabled = 0; 3906 this_device->hba_ioaccel_enabled = 0; 3907 this_device->volume_offline = 0; 3908 this_device->queue_depth = h->nr_cmds; 3909 } 3910 3911 if (is_OBDR_device) { 3912 /* See if this is a One-Button-Disaster-Recovery device 3913 * by looking for "$DR-10" at offset 43 in inquiry data. 3914 */ 3915 obdr_sig = &inq_buff[OBDR_SIG_OFFSET]; 3916 *is_OBDR_device = (this_device->devtype == TYPE_ROM && 3917 strncmp(obdr_sig, OBDR_TAPE_SIG, 3918 OBDR_SIG_LEN) == 0); 3919 } 3920 kfree(inq_buff); 3921 return 0; 3922 3923 bail_out: 3924 kfree(inq_buff); 3925 return rc; 3926 } 3927 3928 static void hpsa_update_device_supports_aborts(struct ctlr_info *h, 3929 struct hpsa_scsi_dev_t *dev, u8 *scsi3addr) 3930 { 3931 unsigned long flags; 3932 int rc, entry; 3933 /* 3934 * See if this device supports aborts. If we already know 3935 * the device, we already know if it supports aborts, otherwise 3936 * we have to find out if it supports aborts by trying one. 3937 */ 3938 spin_lock_irqsave(&h->devlock, flags); 3939 rc = hpsa_scsi_find_entry(dev, h->dev, h->ndevices, &entry); 3940 if ((rc == DEVICE_SAME || rc == DEVICE_UPDATED) && 3941 entry >= 0 && entry < h->ndevices) { 3942 dev->supports_aborts = h->dev[entry]->supports_aborts; 3943 spin_unlock_irqrestore(&h->devlock, flags); 3944 } else { 3945 spin_unlock_irqrestore(&h->devlock, flags); 3946 dev->supports_aborts = 3947 hpsa_device_supports_aborts(h, scsi3addr); 3948 if (dev->supports_aborts < 0) 3949 dev->supports_aborts = 0; 3950 } 3951 } 3952 3953 /* 3954 * Helper function to assign bus, target, lun mapping of devices. 3955 * Logical drive target and lun are assigned at this time, but 3956 * physical device lun and target assignment are deferred (assigned 3957 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.) 3958 */ 3959 static void figure_bus_target_lun(struct ctlr_info *h, 3960 u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device) 3961 { 3962 u32 lunid = get_unaligned_le32(lunaddrbytes); 3963 3964 if (!is_logical_dev_addr_mode(lunaddrbytes)) { 3965 /* physical device, target and lun filled in later */ 3966 if (is_hba_lunid(lunaddrbytes)) 3967 hpsa_set_bus_target_lun(device, 3968 HPSA_HBA_BUS, 0, lunid & 0x3fff); 3969 else 3970 /* defer target, lun assignment for physical devices */ 3971 hpsa_set_bus_target_lun(device, 3972 HPSA_PHYSICAL_DEVICE_BUS, -1, -1); 3973 return; 3974 } 3975 /* It's a logical device */ 3976 if (device->external) { 3977 hpsa_set_bus_target_lun(device, 3978 HPSA_EXTERNAL_RAID_VOLUME_BUS, (lunid >> 16) & 0x3fff, 3979 lunid & 0x00ff); 3980 return; 3981 } 3982 hpsa_set_bus_target_lun(device, HPSA_RAID_VOLUME_BUS, 3983 0, lunid & 0x3fff); 3984 } 3985 3986 3987 /* 3988 * Get address of physical disk used for an ioaccel2 mode command: 3989 * 1. Extract ioaccel2 handle from the command. 3990 * 2. Find a matching ioaccel2 handle from list of physical disks. 3991 * 3. Return: 3992 * 1 and set scsi3addr to address of matching physical 3993 * 0 if no matching physical disk was found. 3994 */ 3995 static int hpsa_get_pdisk_of_ioaccel2(struct ctlr_info *h, 3996 struct CommandList *ioaccel2_cmd_to_abort, unsigned char *scsi3addr) 3997 { 3998 struct io_accel2_cmd *c2 = 3999 &h->ioaccel2_cmd_pool[ioaccel2_cmd_to_abort->cmdindex]; 4000 unsigned long flags; 4001 int i; 4002 4003 spin_lock_irqsave(&h->devlock, flags); 4004 for (i = 0; i < h->ndevices; i++) 4005 if (h->dev[i]->ioaccel_handle == le32_to_cpu(c2->scsi_nexus)) { 4006 memcpy(scsi3addr, h->dev[i]->scsi3addr, 4007 sizeof(h->dev[i]->scsi3addr)); 4008 spin_unlock_irqrestore(&h->devlock, flags); 4009 return 1; 4010 } 4011 spin_unlock_irqrestore(&h->devlock, flags); 4012 return 0; 4013 } 4014 4015 static int figure_external_status(struct ctlr_info *h, int raid_ctlr_position, 4016 int i, int nphysicals, int nlocal_logicals) 4017 { 4018 /* In report logicals, local logicals are listed first, 4019 * then any externals. 4020 */ 4021 int logicals_start = nphysicals + (raid_ctlr_position == 0); 4022 4023 if (i == raid_ctlr_position) 4024 return 0; 4025 4026 if (i < logicals_start) 4027 return 0; 4028 4029 /* i is in logicals range, but still within local logicals */ 4030 if ((i - nphysicals - (raid_ctlr_position == 0)) < nlocal_logicals) 4031 return 0; 4032 4033 return 1; /* it's an external lun */ 4034 } 4035 4036 /* 4037 * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev, 4038 * logdev. The number of luns in physdev and logdev are returned in 4039 * *nphysicals and *nlogicals, respectively. 4040 * Returns 0 on success, -1 otherwise. 4041 */ 4042 static int hpsa_gather_lun_info(struct ctlr_info *h, 4043 struct ReportExtendedLUNdata *physdev, u32 *nphysicals, 4044 struct ReportLUNdata *logdev, u32 *nlogicals) 4045 { 4046 if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) { 4047 dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 4048 return -1; 4049 } 4050 *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24; 4051 if (*nphysicals > HPSA_MAX_PHYS_LUN) { 4052 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n", 4053 HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN); 4054 *nphysicals = HPSA_MAX_PHYS_LUN; 4055 } 4056 if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) { 4057 dev_err(&h->pdev->dev, "report logical LUNs failed.\n"); 4058 return -1; 4059 } 4060 *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8; 4061 /* Reject Logicals in excess of our max capability. */ 4062 if (*nlogicals > HPSA_MAX_LUN) { 4063 dev_warn(&h->pdev->dev, 4064 "maximum logical LUNs (%d) exceeded. " 4065 "%d LUNs ignored.\n", HPSA_MAX_LUN, 4066 *nlogicals - HPSA_MAX_LUN); 4067 *nlogicals = HPSA_MAX_LUN; 4068 } 4069 if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) { 4070 dev_warn(&h->pdev->dev, 4071 "maximum logical + physical LUNs (%d) exceeded. " 4072 "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN, 4073 *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN); 4074 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals; 4075 } 4076 return 0; 4077 } 4078 4079 static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, 4080 int i, int nphysicals, int nlogicals, 4081 struct ReportExtendedLUNdata *physdev_list, 4082 struct ReportLUNdata *logdev_list) 4083 { 4084 /* Helper function, figure out where the LUN ID info is coming from 4085 * given index i, lists of physical and logical devices, where in 4086 * the list the raid controller is supposed to appear (first or last) 4087 */ 4088 4089 int logicals_start = nphysicals + (raid_ctlr_position == 0); 4090 int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0); 4091 4092 if (i == raid_ctlr_position) 4093 return RAID_CTLR_LUNID; 4094 4095 if (i < logicals_start) 4096 return &physdev_list->LUN[i - 4097 (raid_ctlr_position == 0)].lunid[0]; 4098 4099 if (i < last_device) 4100 return &logdev_list->LUN[i - nphysicals - 4101 (raid_ctlr_position == 0)][0]; 4102 BUG(); 4103 return NULL; 4104 } 4105 4106 /* get physical drive ioaccel handle and queue depth */ 4107 static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h, 4108 struct hpsa_scsi_dev_t *dev, 4109 struct ReportExtendedLUNdata *rlep, int rle_index, 4110 struct bmic_identify_physical_device *id_phys) 4111 { 4112 int rc; 4113 struct ext_report_lun_entry *rle; 4114 4115 /* 4116 * external targets don't support BMIC 4117 */ 4118 if (dev->external) { 4119 dev->queue_depth = 7; 4120 return; 4121 } 4122 4123 rle = &rlep->LUN[rle_index]; 4124 4125 dev->ioaccel_handle = rle->ioaccel_handle; 4126 if ((rle->device_flags & 0x08) && dev->ioaccel_handle) 4127 dev->hba_ioaccel_enabled = 1; 4128 memset(id_phys, 0, sizeof(*id_phys)); 4129 rc = hpsa_bmic_id_physical_device(h, &rle->lunid[0], 4130 GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]), id_phys, 4131 sizeof(*id_phys)); 4132 if (!rc) 4133 /* Reserve space for FW operations */ 4134 #define DRIVE_CMDS_RESERVED_FOR_FW 2 4135 #define DRIVE_QUEUE_DEPTH 7 4136 dev->queue_depth = 4137 le16_to_cpu(id_phys->current_queue_depth_limit) - 4138 DRIVE_CMDS_RESERVED_FOR_FW; 4139 else 4140 dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */ 4141 } 4142 4143 static void hpsa_get_path_info(struct hpsa_scsi_dev_t *this_device, 4144 struct ReportExtendedLUNdata *rlep, int rle_index, 4145 struct bmic_identify_physical_device *id_phys) 4146 { 4147 struct ext_report_lun_entry *rle = &rlep->LUN[rle_index]; 4148 4149 if ((rle->device_flags & 0x08) && this_device->ioaccel_handle) 4150 this_device->hba_ioaccel_enabled = 1; 4151 4152 memcpy(&this_device->active_path_index, 4153 &id_phys->active_path_number, 4154 sizeof(this_device->active_path_index)); 4155 memcpy(&this_device->path_map, 4156 &id_phys->redundant_path_present_map, 4157 sizeof(this_device->path_map)); 4158 memcpy(&this_device->box, 4159 &id_phys->alternate_paths_phys_box_on_port, 4160 sizeof(this_device->box)); 4161 memcpy(&this_device->phys_connector, 4162 &id_phys->alternate_paths_phys_connector, 4163 sizeof(this_device->phys_connector)); 4164 memcpy(&this_device->bay, 4165 &id_phys->phys_bay_in_box, 4166 sizeof(this_device->bay)); 4167 } 4168 4169 /* get number of local logical disks. */ 4170 static int hpsa_set_local_logical_count(struct ctlr_info *h, 4171 struct bmic_identify_controller *id_ctlr, 4172 u32 *nlocals) 4173 { 4174 int rc; 4175 4176 if (!id_ctlr) { 4177 dev_warn(&h->pdev->dev, "%s: id_ctlr buffer is NULL.\n", 4178 __func__); 4179 return -ENOMEM; 4180 } 4181 memset(id_ctlr, 0, sizeof(*id_ctlr)); 4182 rc = hpsa_bmic_id_controller(h, id_ctlr, sizeof(*id_ctlr)); 4183 if (!rc) 4184 if (id_ctlr->configured_logical_drive_count < 256) 4185 *nlocals = id_ctlr->configured_logical_drive_count; 4186 else 4187 *nlocals = le16_to_cpu( 4188 id_ctlr->extended_logical_unit_count); 4189 else 4190 *nlocals = -1; 4191 return rc; 4192 } 4193 4194 static bool hpsa_is_disk_spare(struct ctlr_info *h, u8 *lunaddrbytes) 4195 { 4196 struct bmic_identify_physical_device *id_phys; 4197 bool is_spare = false; 4198 int rc; 4199 4200 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 4201 if (!id_phys) 4202 return false; 4203 4204 rc = hpsa_bmic_id_physical_device(h, 4205 lunaddrbytes, 4206 GET_BMIC_DRIVE_NUMBER(lunaddrbytes), 4207 id_phys, sizeof(*id_phys)); 4208 if (rc == 0) 4209 is_spare = (id_phys->more_flags >> 6) & 0x01; 4210 4211 kfree(id_phys); 4212 return is_spare; 4213 } 4214 4215 #define RPL_DEV_FLAG_NON_DISK 0x1 4216 #define RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED 0x2 4217 #define RPL_DEV_FLAG_UNCONFIG_DISK 0x4 4218 4219 #define BMIC_DEVICE_TYPE_ENCLOSURE 6 4220 4221 static bool hpsa_skip_device(struct ctlr_info *h, u8 *lunaddrbytes, 4222 struct ext_report_lun_entry *rle) 4223 { 4224 u8 device_flags; 4225 u8 device_type; 4226 4227 if (!MASKED_DEVICE(lunaddrbytes)) 4228 return false; 4229 4230 device_flags = rle->device_flags; 4231 device_type = rle->device_type; 4232 4233 if (device_flags & RPL_DEV_FLAG_NON_DISK) { 4234 if (device_type == BMIC_DEVICE_TYPE_ENCLOSURE) 4235 return false; 4236 return true; 4237 } 4238 4239 if (!(device_flags & RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED)) 4240 return false; 4241 4242 if (device_flags & RPL_DEV_FLAG_UNCONFIG_DISK) 4243 return false; 4244 4245 /* 4246 * Spares may be spun down, we do not want to 4247 * do an Inquiry to a RAID set spare drive as 4248 * that would have them spun up, that is a 4249 * performance hit because I/O to the RAID device 4250 * stops while the spin up occurs which can take 4251 * over 50 seconds. 4252 */ 4253 if (hpsa_is_disk_spare(h, lunaddrbytes)) 4254 return true; 4255 4256 return false; 4257 } 4258 4259 static void hpsa_update_scsi_devices(struct ctlr_info *h) 4260 { 4261 /* the idea here is we could get notified 4262 * that some devices have changed, so we do a report 4263 * physical luns and report logical luns cmd, and adjust 4264 * our list of devices accordingly. 4265 * 4266 * The scsi3addr's of devices won't change so long as the 4267 * adapter is not reset. That means we can rescan and 4268 * tell which devices we already know about, vs. new 4269 * devices, vs. disappearing devices. 4270 */ 4271 struct ReportExtendedLUNdata *physdev_list = NULL; 4272 struct ReportLUNdata *logdev_list = NULL; 4273 struct bmic_identify_physical_device *id_phys = NULL; 4274 struct bmic_identify_controller *id_ctlr = NULL; 4275 u32 nphysicals = 0; 4276 u32 nlogicals = 0; 4277 u32 nlocal_logicals = 0; 4278 u32 ndev_allocated = 0; 4279 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice; 4280 int ncurrent = 0; 4281 int i, n_ext_target_devs, ndevs_to_allocate; 4282 int raid_ctlr_position; 4283 bool physical_device; 4284 DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS); 4285 4286 currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL); 4287 physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL); 4288 logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL); 4289 tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL); 4290 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 4291 id_ctlr = kzalloc(sizeof(*id_ctlr), GFP_KERNEL); 4292 4293 if (!currentsd || !physdev_list || !logdev_list || 4294 !tmpdevice || !id_phys || !id_ctlr) { 4295 dev_err(&h->pdev->dev, "out of memory\n"); 4296 goto out; 4297 } 4298 memset(lunzerobits, 0, sizeof(lunzerobits)); 4299 4300 h->drv_req_rescan = 0; /* cancel scheduled rescan - we're doing it. */ 4301 4302 if (hpsa_gather_lun_info(h, physdev_list, &nphysicals, 4303 logdev_list, &nlogicals)) { 4304 h->drv_req_rescan = 1; 4305 goto out; 4306 } 4307 4308 /* Set number of local logicals (non PTRAID) */ 4309 if (hpsa_set_local_logical_count(h, id_ctlr, &nlocal_logicals)) { 4310 dev_warn(&h->pdev->dev, 4311 "%s: Can't determine number of local logical devices.\n", 4312 __func__); 4313 } 4314 4315 /* We might see up to the maximum number of logical and physical disks 4316 * plus external target devices, and a device for the local RAID 4317 * controller. 4318 */ 4319 ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1; 4320 4321 /* Allocate the per device structures */ 4322 for (i = 0; i < ndevs_to_allocate; i++) { 4323 if (i >= HPSA_MAX_DEVICES) { 4324 dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded." 4325 " %d devices ignored.\n", HPSA_MAX_DEVICES, 4326 ndevs_to_allocate - HPSA_MAX_DEVICES); 4327 break; 4328 } 4329 4330 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL); 4331 if (!currentsd[i]) { 4332 dev_warn(&h->pdev->dev, "out of memory at %s:%d\n", 4333 __FILE__, __LINE__); 4334 h->drv_req_rescan = 1; 4335 goto out; 4336 } 4337 ndev_allocated++; 4338 } 4339 4340 if (is_scsi_rev_5(h)) 4341 raid_ctlr_position = 0; 4342 else 4343 raid_ctlr_position = nphysicals + nlogicals; 4344 4345 /* adjust our table of devices */ 4346 n_ext_target_devs = 0; 4347 for (i = 0; i < nphysicals + nlogicals + 1; i++) { 4348 u8 *lunaddrbytes, is_OBDR = 0; 4349 int rc = 0; 4350 int phys_dev_index = i - (raid_ctlr_position == 0); 4351 bool skip_device = false; 4352 4353 physical_device = i < nphysicals + (raid_ctlr_position == 0); 4354 4355 /* Figure out where the LUN ID info is coming from */ 4356 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position, 4357 i, nphysicals, nlogicals, physdev_list, logdev_list); 4358 4359 /* Determine if this is a lun from an external target array */ 4360 tmpdevice->external = 4361 figure_external_status(h, raid_ctlr_position, i, 4362 nphysicals, nlocal_logicals); 4363 4364 /* 4365 * Skip over some devices such as a spare. 4366 */ 4367 if (!tmpdevice->external && physical_device) { 4368 skip_device = hpsa_skip_device(h, lunaddrbytes, 4369 &physdev_list->LUN[phys_dev_index]); 4370 if (skip_device) 4371 continue; 4372 } 4373 4374 /* Get device type, vendor, model, device id */ 4375 rc = hpsa_update_device_info(h, lunaddrbytes, tmpdevice, 4376 &is_OBDR); 4377 if (rc == -ENOMEM) { 4378 dev_warn(&h->pdev->dev, 4379 "Out of memory, rescan deferred.\n"); 4380 h->drv_req_rescan = 1; 4381 goto out; 4382 } 4383 if (rc) { 4384 dev_warn(&h->pdev->dev, 4385 "Inquiry failed, skipping device.\n"); 4386 continue; 4387 } 4388 4389 figure_bus_target_lun(h, lunaddrbytes, tmpdevice); 4390 hpsa_update_device_supports_aborts(h, tmpdevice, lunaddrbytes); 4391 this_device = currentsd[ncurrent]; 4392 4393 /* Turn on discovery_polling if there are ext target devices. 4394 * Event-based change notification is unreliable for those. 4395 */ 4396 if (!h->discovery_polling) { 4397 if (tmpdevice->external) { 4398 h->discovery_polling = 1; 4399 dev_info(&h->pdev->dev, 4400 "External target, activate discovery polling.\n"); 4401 } 4402 } 4403 4404 4405 *this_device = *tmpdevice; 4406 this_device->physical_device = physical_device; 4407 4408 /* 4409 * Expose all devices except for physical devices that 4410 * are masked. 4411 */ 4412 if (MASKED_DEVICE(lunaddrbytes) && this_device->physical_device) 4413 this_device->expose_device = 0; 4414 else 4415 this_device->expose_device = 1; 4416 4417 4418 /* 4419 * Get the SAS address for physical devices that are exposed. 4420 */ 4421 if (this_device->physical_device && this_device->expose_device) 4422 hpsa_get_sas_address(h, lunaddrbytes, this_device); 4423 4424 switch (this_device->devtype) { 4425 case TYPE_ROM: 4426 /* We don't *really* support actual CD-ROM devices, 4427 * just "One Button Disaster Recovery" tape drive 4428 * which temporarily pretends to be a CD-ROM drive. 4429 * So we check that the device is really an OBDR tape 4430 * device by checking for "$DR-10" in bytes 43-48 of 4431 * the inquiry data. 4432 */ 4433 if (is_OBDR) 4434 ncurrent++; 4435 break; 4436 case TYPE_DISK: 4437 case TYPE_ZBC: 4438 if (this_device->physical_device) { 4439 /* The disk is in HBA mode. */ 4440 /* Never use RAID mapper in HBA mode. */ 4441 this_device->offload_enabled = 0; 4442 hpsa_get_ioaccel_drive_info(h, this_device, 4443 physdev_list, phys_dev_index, id_phys); 4444 hpsa_get_path_info(this_device, 4445 physdev_list, phys_dev_index, id_phys); 4446 } 4447 ncurrent++; 4448 break; 4449 case TYPE_TAPE: 4450 case TYPE_MEDIUM_CHANGER: 4451 ncurrent++; 4452 break; 4453 case TYPE_ENCLOSURE: 4454 if (!this_device->external) 4455 hpsa_get_enclosure_info(h, lunaddrbytes, 4456 physdev_list, phys_dev_index, 4457 this_device); 4458 ncurrent++; 4459 break; 4460 case TYPE_RAID: 4461 /* Only present the Smartarray HBA as a RAID controller. 4462 * If it's a RAID controller other than the HBA itself 4463 * (an external RAID controller, MSA500 or similar) 4464 * don't present it. 4465 */ 4466 if (!is_hba_lunid(lunaddrbytes)) 4467 break; 4468 ncurrent++; 4469 break; 4470 default: 4471 break; 4472 } 4473 if (ncurrent >= HPSA_MAX_DEVICES) 4474 break; 4475 } 4476 4477 if (h->sas_host == NULL) { 4478 int rc = 0; 4479 4480 rc = hpsa_add_sas_host(h); 4481 if (rc) { 4482 dev_warn(&h->pdev->dev, 4483 "Could not add sas host %d\n", rc); 4484 goto out; 4485 } 4486 } 4487 4488 adjust_hpsa_scsi_table(h, currentsd, ncurrent); 4489 out: 4490 kfree(tmpdevice); 4491 for (i = 0; i < ndev_allocated; i++) 4492 kfree(currentsd[i]); 4493 kfree(currentsd); 4494 kfree(physdev_list); 4495 kfree(logdev_list); 4496 kfree(id_ctlr); 4497 kfree(id_phys); 4498 } 4499 4500 static void hpsa_set_sg_descriptor(struct SGDescriptor *desc, 4501 struct scatterlist *sg) 4502 { 4503 u64 addr64 = (u64) sg_dma_address(sg); 4504 unsigned int len = sg_dma_len(sg); 4505 4506 desc->Addr = cpu_to_le64(addr64); 4507 desc->Len = cpu_to_le32(len); 4508 desc->Ext = 0; 4509 } 4510 4511 /* 4512 * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci 4513 * dma mapping and fills in the scatter gather entries of the 4514 * hpsa command, cp. 4515 */ 4516 static int hpsa_scatter_gather(struct ctlr_info *h, 4517 struct CommandList *cp, 4518 struct scsi_cmnd *cmd) 4519 { 4520 struct scatterlist *sg; 4521 int use_sg, i, sg_limit, chained, last_sg; 4522 struct SGDescriptor *curr_sg; 4523 4524 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 4525 4526 use_sg = scsi_dma_map(cmd); 4527 if (use_sg < 0) 4528 return use_sg; 4529 4530 if (!use_sg) 4531 goto sglist_finished; 4532 4533 /* 4534 * If the number of entries is greater than the max for a single list, 4535 * then we have a chained list; we will set up all but one entry in the 4536 * first list (the last entry is saved for link information); 4537 * otherwise, we don't have a chained list and we'll set up at each of 4538 * the entries in the one list. 4539 */ 4540 curr_sg = cp->SG; 4541 chained = use_sg > h->max_cmd_sg_entries; 4542 sg_limit = chained ? h->max_cmd_sg_entries - 1 : use_sg; 4543 last_sg = scsi_sg_count(cmd) - 1; 4544 scsi_for_each_sg(cmd, sg, sg_limit, i) { 4545 hpsa_set_sg_descriptor(curr_sg, sg); 4546 curr_sg++; 4547 } 4548 4549 if (chained) { 4550 /* 4551 * Continue with the chained list. Set curr_sg to the chained 4552 * list. Modify the limit to the total count less the entries 4553 * we've already set up. Resume the scan at the list entry 4554 * where the previous loop left off. 4555 */ 4556 curr_sg = h->cmd_sg_list[cp->cmdindex]; 4557 sg_limit = use_sg - sg_limit; 4558 for_each_sg(sg, sg, sg_limit, i) { 4559 hpsa_set_sg_descriptor(curr_sg, sg); 4560 curr_sg++; 4561 } 4562 } 4563 4564 /* Back the pointer up to the last entry and mark it as "last". */ 4565 (curr_sg - 1)->Ext = cpu_to_le32(HPSA_SG_LAST); 4566 4567 if (use_sg + chained > h->maxSG) 4568 h->maxSG = use_sg + chained; 4569 4570 if (chained) { 4571 cp->Header.SGList = h->max_cmd_sg_entries; 4572 cp->Header.SGTotal = cpu_to_le16(use_sg + 1); 4573 if (hpsa_map_sg_chain_block(h, cp)) { 4574 scsi_dma_unmap(cmd); 4575 return -1; 4576 } 4577 return 0; 4578 } 4579 4580 sglist_finished: 4581 4582 cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */ 4583 cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */ 4584 return 0; 4585 } 4586 4587 #define IO_ACCEL_INELIGIBLE (1) 4588 static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len) 4589 { 4590 int is_write = 0; 4591 u32 block; 4592 u32 block_cnt; 4593 4594 /* Perform some CDB fixups if needed using 10 byte reads/writes only */ 4595 switch (cdb[0]) { 4596 case WRITE_6: 4597 case WRITE_12: 4598 is_write = 1; 4599 case READ_6: 4600 case READ_12: 4601 if (*cdb_len == 6) { 4602 block = (((cdb[1] & 0x1F) << 16) | 4603 (cdb[2] << 8) | 4604 cdb[3]); 4605 block_cnt = cdb[4]; 4606 if (block_cnt == 0) 4607 block_cnt = 256; 4608 } else { 4609 BUG_ON(*cdb_len != 12); 4610 block = get_unaligned_be32(&cdb[2]); 4611 block_cnt = get_unaligned_be32(&cdb[6]); 4612 } 4613 if (block_cnt > 0xffff) 4614 return IO_ACCEL_INELIGIBLE; 4615 4616 cdb[0] = is_write ? WRITE_10 : READ_10; 4617 cdb[1] = 0; 4618 cdb[2] = (u8) (block >> 24); 4619 cdb[3] = (u8) (block >> 16); 4620 cdb[4] = (u8) (block >> 8); 4621 cdb[5] = (u8) (block); 4622 cdb[6] = 0; 4623 cdb[7] = (u8) (block_cnt >> 8); 4624 cdb[8] = (u8) (block_cnt); 4625 cdb[9] = 0; 4626 *cdb_len = 10; 4627 break; 4628 } 4629 return 0; 4630 } 4631 4632 static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h, 4633 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 4634 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4635 { 4636 struct scsi_cmnd *cmd = c->scsi_cmd; 4637 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex]; 4638 unsigned int len; 4639 unsigned int total_len = 0; 4640 struct scatterlist *sg; 4641 u64 addr64; 4642 int use_sg, i; 4643 struct SGDescriptor *curr_sg; 4644 u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE; 4645 4646 /* TODO: implement chaining support */ 4647 if (scsi_sg_count(cmd) > h->ioaccel_maxsg) { 4648 atomic_dec(&phys_disk->ioaccel_cmds_out); 4649 return IO_ACCEL_INELIGIBLE; 4650 } 4651 4652 BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX); 4653 4654 if (fixup_ioaccel_cdb(cdb, &cdb_len)) { 4655 atomic_dec(&phys_disk->ioaccel_cmds_out); 4656 return IO_ACCEL_INELIGIBLE; 4657 } 4658 4659 c->cmd_type = CMD_IOACCEL1; 4660 4661 /* Adjust the DMA address to point to the accelerated command buffer */ 4662 c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle + 4663 (c->cmdindex * sizeof(*cp)); 4664 BUG_ON(c->busaddr & 0x0000007F); 4665 4666 use_sg = scsi_dma_map(cmd); 4667 if (use_sg < 0) { 4668 atomic_dec(&phys_disk->ioaccel_cmds_out); 4669 return use_sg; 4670 } 4671 4672 if (use_sg) { 4673 curr_sg = cp->SG; 4674 scsi_for_each_sg(cmd, sg, use_sg, i) { 4675 addr64 = (u64) sg_dma_address(sg); 4676 len = sg_dma_len(sg); 4677 total_len += len; 4678 curr_sg->Addr = cpu_to_le64(addr64); 4679 curr_sg->Len = cpu_to_le32(len); 4680 curr_sg->Ext = cpu_to_le32(0); 4681 curr_sg++; 4682 } 4683 (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST); 4684 4685 switch (cmd->sc_data_direction) { 4686 case DMA_TO_DEVICE: 4687 control |= IOACCEL1_CONTROL_DATA_OUT; 4688 break; 4689 case DMA_FROM_DEVICE: 4690 control |= IOACCEL1_CONTROL_DATA_IN; 4691 break; 4692 case DMA_NONE: 4693 control |= IOACCEL1_CONTROL_NODATAXFER; 4694 break; 4695 default: 4696 dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4697 cmd->sc_data_direction); 4698 BUG(); 4699 break; 4700 } 4701 } else { 4702 control |= IOACCEL1_CONTROL_NODATAXFER; 4703 } 4704 4705 c->Header.SGList = use_sg; 4706 /* Fill out the command structure to submit */ 4707 cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF); 4708 cp->transfer_len = cpu_to_le32(total_len); 4709 cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ | 4710 (cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK)); 4711 cp->control = cpu_to_le32(control); 4712 memcpy(cp->CDB, cdb, cdb_len); 4713 memcpy(cp->CISS_LUN, scsi3addr, 8); 4714 /* Tag was already set at init time. */ 4715 enqueue_cmd_and_start_io(h, c); 4716 return 0; 4717 } 4718 4719 /* 4720 * Queue a command directly to a device behind the controller using the 4721 * I/O accelerator path. 4722 */ 4723 static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h, 4724 struct CommandList *c) 4725 { 4726 struct scsi_cmnd *cmd = c->scsi_cmd; 4727 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4728 4729 if (!dev) 4730 return -1; 4731 4732 c->phys_disk = dev; 4733 4734 return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle, 4735 cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev); 4736 } 4737 4738 /* 4739 * Set encryption parameters for the ioaccel2 request 4740 */ 4741 static void set_encrypt_ioaccel2(struct ctlr_info *h, 4742 struct CommandList *c, struct io_accel2_cmd *cp) 4743 { 4744 struct scsi_cmnd *cmd = c->scsi_cmd; 4745 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4746 struct raid_map_data *map = &dev->raid_map; 4747 u64 first_block; 4748 4749 /* Are we doing encryption on this device */ 4750 if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON)) 4751 return; 4752 /* Set the data encryption key index. */ 4753 cp->dekindex = map->dekindex; 4754 4755 /* Set the encryption enable flag, encoded into direction field. */ 4756 cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK; 4757 4758 /* Set encryption tweak values based on logical block address 4759 * If block size is 512, tweak value is LBA. 4760 * For other block sizes, tweak is (LBA * block size)/ 512) 4761 */ 4762 switch (cmd->cmnd[0]) { 4763 /* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */ 4764 case READ_6: 4765 case WRITE_6: 4766 first_block = (((cmd->cmnd[1] & 0x1F) << 16) | 4767 (cmd->cmnd[2] << 8) | 4768 cmd->cmnd[3]); 4769 break; 4770 case WRITE_10: 4771 case READ_10: 4772 /* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */ 4773 case WRITE_12: 4774 case READ_12: 4775 first_block = get_unaligned_be32(&cmd->cmnd[2]); 4776 break; 4777 case WRITE_16: 4778 case READ_16: 4779 first_block = get_unaligned_be64(&cmd->cmnd[2]); 4780 break; 4781 default: 4782 dev_err(&h->pdev->dev, 4783 "ERROR: %s: size (0x%x) not supported for encryption\n", 4784 __func__, cmd->cmnd[0]); 4785 BUG(); 4786 break; 4787 } 4788 4789 if (le32_to_cpu(map->volume_blk_size) != 512) 4790 first_block = first_block * 4791 le32_to_cpu(map->volume_blk_size)/512; 4792 4793 cp->tweak_lower = cpu_to_le32(first_block); 4794 cp->tweak_upper = cpu_to_le32(first_block >> 32); 4795 } 4796 4797 static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h, 4798 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 4799 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4800 { 4801 struct scsi_cmnd *cmd = c->scsi_cmd; 4802 struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex]; 4803 struct ioaccel2_sg_element *curr_sg; 4804 int use_sg, i; 4805 struct scatterlist *sg; 4806 u64 addr64; 4807 u32 len; 4808 u32 total_len = 0; 4809 4810 if (!cmd->device) 4811 return -1; 4812 4813 if (!cmd->device->hostdata) 4814 return -1; 4815 4816 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 4817 4818 if (fixup_ioaccel_cdb(cdb, &cdb_len)) { 4819 atomic_dec(&phys_disk->ioaccel_cmds_out); 4820 return IO_ACCEL_INELIGIBLE; 4821 } 4822 4823 c->cmd_type = CMD_IOACCEL2; 4824 /* Adjust the DMA address to point to the accelerated command buffer */ 4825 c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle + 4826 (c->cmdindex * sizeof(*cp)); 4827 BUG_ON(c->busaddr & 0x0000007F); 4828 4829 memset(cp, 0, sizeof(*cp)); 4830 cp->IU_type = IOACCEL2_IU_TYPE; 4831 4832 use_sg = scsi_dma_map(cmd); 4833 if (use_sg < 0) { 4834 atomic_dec(&phys_disk->ioaccel_cmds_out); 4835 return use_sg; 4836 } 4837 4838 if (use_sg) { 4839 curr_sg = cp->sg; 4840 if (use_sg > h->ioaccel_maxsg) { 4841 addr64 = le64_to_cpu( 4842 h->ioaccel2_cmd_sg_list[c->cmdindex]->address); 4843 curr_sg->address = cpu_to_le64(addr64); 4844 curr_sg->length = 0; 4845 curr_sg->reserved[0] = 0; 4846 curr_sg->reserved[1] = 0; 4847 curr_sg->reserved[2] = 0; 4848 curr_sg->chain_indicator = 0x80; 4849 4850 curr_sg = h->ioaccel2_cmd_sg_list[c->cmdindex]; 4851 } 4852 scsi_for_each_sg(cmd, sg, use_sg, i) { 4853 addr64 = (u64) sg_dma_address(sg); 4854 len = sg_dma_len(sg); 4855 total_len += len; 4856 curr_sg->address = cpu_to_le64(addr64); 4857 curr_sg->length = cpu_to_le32(len); 4858 curr_sg->reserved[0] = 0; 4859 curr_sg->reserved[1] = 0; 4860 curr_sg->reserved[2] = 0; 4861 curr_sg->chain_indicator = 0; 4862 curr_sg++; 4863 } 4864 4865 switch (cmd->sc_data_direction) { 4866 case DMA_TO_DEVICE: 4867 cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4868 cp->direction |= IOACCEL2_DIR_DATA_OUT; 4869 break; 4870 case DMA_FROM_DEVICE: 4871 cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4872 cp->direction |= IOACCEL2_DIR_DATA_IN; 4873 break; 4874 case DMA_NONE: 4875 cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4876 cp->direction |= IOACCEL2_DIR_NO_DATA; 4877 break; 4878 default: 4879 dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4880 cmd->sc_data_direction); 4881 BUG(); 4882 break; 4883 } 4884 } else { 4885 cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4886 cp->direction |= IOACCEL2_DIR_NO_DATA; 4887 } 4888 4889 /* Set encryption parameters, if necessary */ 4890 set_encrypt_ioaccel2(h, c, cp); 4891 4892 cp->scsi_nexus = cpu_to_le32(ioaccel_handle); 4893 cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT); 4894 memcpy(cp->cdb, cdb, sizeof(cp->cdb)); 4895 4896 cp->data_len = cpu_to_le32(total_len); 4897 cp->err_ptr = cpu_to_le64(c->busaddr + 4898 offsetof(struct io_accel2_cmd, error_data)); 4899 cp->err_len = cpu_to_le32(sizeof(cp->error_data)); 4900 4901 /* fill in sg elements */ 4902 if (use_sg > h->ioaccel_maxsg) { 4903 cp->sg_count = 1; 4904 cp->sg[0].length = cpu_to_le32(use_sg * sizeof(cp->sg[0])); 4905 if (hpsa_map_ioaccel2_sg_chain_block(h, cp, c)) { 4906 atomic_dec(&phys_disk->ioaccel_cmds_out); 4907 scsi_dma_unmap(cmd); 4908 return -1; 4909 } 4910 } else 4911 cp->sg_count = (u8) use_sg; 4912 4913 enqueue_cmd_and_start_io(h, c); 4914 return 0; 4915 } 4916 4917 /* 4918 * Queue a command to the correct I/O accelerator path. 4919 */ 4920 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h, 4921 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 4922 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4923 { 4924 if (!c->scsi_cmd->device) 4925 return -1; 4926 4927 if (!c->scsi_cmd->device->hostdata) 4928 return -1; 4929 4930 /* Try to honor the device's queue depth */ 4931 if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) > 4932 phys_disk->queue_depth) { 4933 atomic_dec(&phys_disk->ioaccel_cmds_out); 4934 return IO_ACCEL_INELIGIBLE; 4935 } 4936 if (h->transMethod & CFGTBL_Trans_io_accel1) 4937 return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle, 4938 cdb, cdb_len, scsi3addr, 4939 phys_disk); 4940 else 4941 return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle, 4942 cdb, cdb_len, scsi3addr, 4943 phys_disk); 4944 } 4945 4946 static void raid_map_helper(struct raid_map_data *map, 4947 int offload_to_mirror, u32 *map_index, u32 *current_group) 4948 { 4949 if (offload_to_mirror == 0) { 4950 /* use physical disk in the first mirrored group. */ 4951 *map_index %= le16_to_cpu(map->data_disks_per_row); 4952 return; 4953 } 4954 do { 4955 /* determine mirror group that *map_index indicates */ 4956 *current_group = *map_index / 4957 le16_to_cpu(map->data_disks_per_row); 4958 if (offload_to_mirror == *current_group) 4959 continue; 4960 if (*current_group < le16_to_cpu(map->layout_map_count) - 1) { 4961 /* select map index from next group */ 4962 *map_index += le16_to_cpu(map->data_disks_per_row); 4963 (*current_group)++; 4964 } else { 4965 /* select map index from first group */ 4966 *map_index %= le16_to_cpu(map->data_disks_per_row); 4967 *current_group = 0; 4968 } 4969 } while (offload_to_mirror != *current_group); 4970 } 4971 4972 /* 4973 * Attempt to perform offload RAID mapping for a logical volume I/O. 4974 */ 4975 static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h, 4976 struct CommandList *c) 4977 { 4978 struct scsi_cmnd *cmd = c->scsi_cmd; 4979 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4980 struct raid_map_data *map = &dev->raid_map; 4981 struct raid_map_disk_data *dd = &map->data[0]; 4982 int is_write = 0; 4983 u32 map_index; 4984 u64 first_block, last_block; 4985 u32 block_cnt; 4986 u32 blocks_per_row; 4987 u64 first_row, last_row; 4988 u32 first_row_offset, last_row_offset; 4989 u32 first_column, last_column; 4990 u64 r0_first_row, r0_last_row; 4991 u32 r5or6_blocks_per_row; 4992 u64 r5or6_first_row, r5or6_last_row; 4993 u32 r5or6_first_row_offset, r5or6_last_row_offset; 4994 u32 r5or6_first_column, r5or6_last_column; 4995 u32 total_disks_per_row; 4996 u32 stripesize; 4997 u32 first_group, last_group, current_group; 4998 u32 map_row; 4999 u32 disk_handle; 5000 u64 disk_block; 5001 u32 disk_block_cnt; 5002 u8 cdb[16]; 5003 u8 cdb_len; 5004 u16 strip_size; 5005 #if BITS_PER_LONG == 32 5006 u64 tmpdiv; 5007 #endif 5008 int offload_to_mirror; 5009 5010 if (!dev) 5011 return -1; 5012 5013 /* check for valid opcode, get LBA and block count */ 5014 switch (cmd->cmnd[0]) { 5015 case WRITE_6: 5016 is_write = 1; 5017 case READ_6: 5018 first_block = (((cmd->cmnd[1] & 0x1F) << 16) | 5019 (cmd->cmnd[2] << 8) | 5020 cmd->cmnd[3]); 5021 block_cnt = cmd->cmnd[4]; 5022 if (block_cnt == 0) 5023 block_cnt = 256; 5024 break; 5025 case WRITE_10: 5026 is_write = 1; 5027 case READ_10: 5028 first_block = 5029 (((u64) cmd->cmnd[2]) << 24) | 5030 (((u64) cmd->cmnd[3]) << 16) | 5031 (((u64) cmd->cmnd[4]) << 8) | 5032 cmd->cmnd[5]; 5033 block_cnt = 5034 (((u32) cmd->cmnd[7]) << 8) | 5035 cmd->cmnd[8]; 5036 break; 5037 case WRITE_12: 5038 is_write = 1; 5039 case READ_12: 5040 first_block = 5041 (((u64) cmd->cmnd[2]) << 24) | 5042 (((u64) cmd->cmnd[3]) << 16) | 5043 (((u64) cmd->cmnd[4]) << 8) | 5044 cmd->cmnd[5]; 5045 block_cnt = 5046 (((u32) cmd->cmnd[6]) << 24) | 5047 (((u32) cmd->cmnd[7]) << 16) | 5048 (((u32) cmd->cmnd[8]) << 8) | 5049 cmd->cmnd[9]; 5050 break; 5051 case WRITE_16: 5052 is_write = 1; 5053 case READ_16: 5054 first_block = 5055 (((u64) cmd->cmnd[2]) << 56) | 5056 (((u64) cmd->cmnd[3]) << 48) | 5057 (((u64) cmd->cmnd[4]) << 40) | 5058 (((u64) cmd->cmnd[5]) << 32) | 5059 (((u64) cmd->cmnd[6]) << 24) | 5060 (((u64) cmd->cmnd[7]) << 16) | 5061 (((u64) cmd->cmnd[8]) << 8) | 5062 cmd->cmnd[9]; 5063 block_cnt = 5064 (((u32) cmd->cmnd[10]) << 24) | 5065 (((u32) cmd->cmnd[11]) << 16) | 5066 (((u32) cmd->cmnd[12]) << 8) | 5067 cmd->cmnd[13]; 5068 break; 5069 default: 5070 return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */ 5071 } 5072 last_block = first_block + block_cnt - 1; 5073 5074 /* check for write to non-RAID-0 */ 5075 if (is_write && dev->raid_level != 0) 5076 return IO_ACCEL_INELIGIBLE; 5077 5078 /* check for invalid block or wraparound */ 5079 if (last_block >= le64_to_cpu(map->volume_blk_cnt) || 5080 last_block < first_block) 5081 return IO_ACCEL_INELIGIBLE; 5082 5083 /* calculate stripe information for the request */ 5084 blocks_per_row = le16_to_cpu(map->data_disks_per_row) * 5085 le16_to_cpu(map->strip_size); 5086 strip_size = le16_to_cpu(map->strip_size); 5087 #if BITS_PER_LONG == 32 5088 tmpdiv = first_block; 5089 (void) do_div(tmpdiv, blocks_per_row); 5090 first_row = tmpdiv; 5091 tmpdiv = last_block; 5092 (void) do_div(tmpdiv, blocks_per_row); 5093 last_row = tmpdiv; 5094 first_row_offset = (u32) (first_block - (first_row * blocks_per_row)); 5095 last_row_offset = (u32) (last_block - (last_row * blocks_per_row)); 5096 tmpdiv = first_row_offset; 5097 (void) do_div(tmpdiv, strip_size); 5098 first_column = tmpdiv; 5099 tmpdiv = last_row_offset; 5100 (void) do_div(tmpdiv, strip_size); 5101 last_column = tmpdiv; 5102 #else 5103 first_row = first_block / blocks_per_row; 5104 last_row = last_block / blocks_per_row; 5105 first_row_offset = (u32) (first_block - (first_row * blocks_per_row)); 5106 last_row_offset = (u32) (last_block - (last_row * blocks_per_row)); 5107 first_column = first_row_offset / strip_size; 5108 last_column = last_row_offset / strip_size; 5109 #endif 5110 5111 /* if this isn't a single row/column then give to the controller */ 5112 if ((first_row != last_row) || (first_column != last_column)) 5113 return IO_ACCEL_INELIGIBLE; 5114 5115 /* proceeding with driver mapping */ 5116 total_disks_per_row = le16_to_cpu(map->data_disks_per_row) + 5117 le16_to_cpu(map->metadata_disks_per_row); 5118 map_row = ((u32)(first_row >> map->parity_rotation_shift)) % 5119 le16_to_cpu(map->row_cnt); 5120 map_index = (map_row * total_disks_per_row) + first_column; 5121 5122 switch (dev->raid_level) { 5123 case HPSA_RAID_0: 5124 break; /* nothing special to do */ 5125 case HPSA_RAID_1: 5126 /* Handles load balance across RAID 1 members. 5127 * (2-drive R1 and R10 with even # of drives.) 5128 * Appropriate for SSDs, not optimal for HDDs 5129 */ 5130 BUG_ON(le16_to_cpu(map->layout_map_count) != 2); 5131 if (dev->offload_to_mirror) 5132 map_index += le16_to_cpu(map->data_disks_per_row); 5133 dev->offload_to_mirror = !dev->offload_to_mirror; 5134 break; 5135 case HPSA_RAID_ADM: 5136 /* Handles N-way mirrors (R1-ADM) 5137 * and R10 with # of drives divisible by 3.) 5138 */ 5139 BUG_ON(le16_to_cpu(map->layout_map_count) != 3); 5140 5141 offload_to_mirror = dev->offload_to_mirror; 5142 raid_map_helper(map, offload_to_mirror, 5143 &map_index, ¤t_group); 5144 /* set mirror group to use next time */ 5145 offload_to_mirror = 5146 (offload_to_mirror >= 5147 le16_to_cpu(map->layout_map_count) - 1) 5148 ? 0 : offload_to_mirror + 1; 5149 dev->offload_to_mirror = offload_to_mirror; 5150 /* Avoid direct use of dev->offload_to_mirror within this 5151 * function since multiple threads might simultaneously 5152 * increment it beyond the range of dev->layout_map_count -1. 5153 */ 5154 break; 5155 case HPSA_RAID_5: 5156 case HPSA_RAID_6: 5157 if (le16_to_cpu(map->layout_map_count) <= 1) 5158 break; 5159 5160 /* Verify first and last block are in same RAID group */ 5161 r5or6_blocks_per_row = 5162 le16_to_cpu(map->strip_size) * 5163 le16_to_cpu(map->data_disks_per_row); 5164 BUG_ON(r5or6_blocks_per_row == 0); 5165 stripesize = r5or6_blocks_per_row * 5166 le16_to_cpu(map->layout_map_count); 5167 #if BITS_PER_LONG == 32 5168 tmpdiv = first_block; 5169 first_group = do_div(tmpdiv, stripesize); 5170 tmpdiv = first_group; 5171 (void) do_div(tmpdiv, r5or6_blocks_per_row); 5172 first_group = tmpdiv; 5173 tmpdiv = last_block; 5174 last_group = do_div(tmpdiv, stripesize); 5175 tmpdiv = last_group; 5176 (void) do_div(tmpdiv, r5or6_blocks_per_row); 5177 last_group = tmpdiv; 5178 #else 5179 first_group = (first_block % stripesize) / r5or6_blocks_per_row; 5180 last_group = (last_block % stripesize) / r5or6_blocks_per_row; 5181 #endif 5182 if (first_group != last_group) 5183 return IO_ACCEL_INELIGIBLE; 5184 5185 /* Verify request is in a single row of RAID 5/6 */ 5186 #if BITS_PER_LONG == 32 5187 tmpdiv = first_block; 5188 (void) do_div(tmpdiv, stripesize); 5189 first_row = r5or6_first_row = r0_first_row = tmpdiv; 5190 tmpdiv = last_block; 5191 (void) do_div(tmpdiv, stripesize); 5192 r5or6_last_row = r0_last_row = tmpdiv; 5193 #else 5194 first_row = r5or6_first_row = r0_first_row = 5195 first_block / stripesize; 5196 r5or6_last_row = r0_last_row = last_block / stripesize; 5197 #endif 5198 if (r5or6_first_row != r5or6_last_row) 5199 return IO_ACCEL_INELIGIBLE; 5200 5201 5202 /* Verify request is in a single column */ 5203 #if BITS_PER_LONG == 32 5204 tmpdiv = first_block; 5205 first_row_offset = do_div(tmpdiv, stripesize); 5206 tmpdiv = first_row_offset; 5207 first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row); 5208 r5or6_first_row_offset = first_row_offset; 5209 tmpdiv = last_block; 5210 r5or6_last_row_offset = do_div(tmpdiv, stripesize); 5211 tmpdiv = r5or6_last_row_offset; 5212 r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row); 5213 tmpdiv = r5or6_first_row_offset; 5214 (void) do_div(tmpdiv, map->strip_size); 5215 first_column = r5or6_first_column = tmpdiv; 5216 tmpdiv = r5or6_last_row_offset; 5217 (void) do_div(tmpdiv, map->strip_size); 5218 r5or6_last_column = tmpdiv; 5219 #else 5220 first_row_offset = r5or6_first_row_offset = 5221 (u32)((first_block % stripesize) % 5222 r5or6_blocks_per_row); 5223 5224 r5or6_last_row_offset = 5225 (u32)((last_block % stripesize) % 5226 r5or6_blocks_per_row); 5227 5228 first_column = r5or6_first_column = 5229 r5or6_first_row_offset / le16_to_cpu(map->strip_size); 5230 r5or6_last_column = 5231 r5or6_last_row_offset / le16_to_cpu(map->strip_size); 5232 #endif 5233 if (r5or6_first_column != r5or6_last_column) 5234 return IO_ACCEL_INELIGIBLE; 5235 5236 /* Request is eligible */ 5237 map_row = ((u32)(first_row >> map->parity_rotation_shift)) % 5238 le16_to_cpu(map->row_cnt); 5239 5240 map_index = (first_group * 5241 (le16_to_cpu(map->row_cnt) * total_disks_per_row)) + 5242 (map_row * total_disks_per_row) + first_column; 5243 break; 5244 default: 5245 return IO_ACCEL_INELIGIBLE; 5246 } 5247 5248 if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES)) 5249 return IO_ACCEL_INELIGIBLE; 5250 5251 c->phys_disk = dev->phys_disk[map_index]; 5252 if (!c->phys_disk) 5253 return IO_ACCEL_INELIGIBLE; 5254 5255 disk_handle = dd[map_index].ioaccel_handle; 5256 disk_block = le64_to_cpu(map->disk_starting_blk) + 5257 first_row * le16_to_cpu(map->strip_size) + 5258 (first_row_offset - first_column * 5259 le16_to_cpu(map->strip_size)); 5260 disk_block_cnt = block_cnt; 5261 5262 /* handle differing logical/physical block sizes */ 5263 if (map->phys_blk_shift) { 5264 disk_block <<= map->phys_blk_shift; 5265 disk_block_cnt <<= map->phys_blk_shift; 5266 } 5267 BUG_ON(disk_block_cnt > 0xffff); 5268 5269 /* build the new CDB for the physical disk I/O */ 5270 if (disk_block > 0xffffffff) { 5271 cdb[0] = is_write ? WRITE_16 : READ_16; 5272 cdb[1] = 0; 5273 cdb[2] = (u8) (disk_block >> 56); 5274 cdb[3] = (u8) (disk_block >> 48); 5275 cdb[4] = (u8) (disk_block >> 40); 5276 cdb[5] = (u8) (disk_block >> 32); 5277 cdb[6] = (u8) (disk_block >> 24); 5278 cdb[7] = (u8) (disk_block >> 16); 5279 cdb[8] = (u8) (disk_block >> 8); 5280 cdb[9] = (u8) (disk_block); 5281 cdb[10] = (u8) (disk_block_cnt >> 24); 5282 cdb[11] = (u8) (disk_block_cnt >> 16); 5283 cdb[12] = (u8) (disk_block_cnt >> 8); 5284 cdb[13] = (u8) (disk_block_cnt); 5285 cdb[14] = 0; 5286 cdb[15] = 0; 5287 cdb_len = 16; 5288 } else { 5289 cdb[0] = is_write ? WRITE_10 : READ_10; 5290 cdb[1] = 0; 5291 cdb[2] = (u8) (disk_block >> 24); 5292 cdb[3] = (u8) (disk_block >> 16); 5293 cdb[4] = (u8) (disk_block >> 8); 5294 cdb[5] = (u8) (disk_block); 5295 cdb[6] = 0; 5296 cdb[7] = (u8) (disk_block_cnt >> 8); 5297 cdb[8] = (u8) (disk_block_cnt); 5298 cdb[9] = 0; 5299 cdb_len = 10; 5300 } 5301 return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len, 5302 dev->scsi3addr, 5303 dev->phys_disk[map_index]); 5304 } 5305 5306 /* 5307 * Submit commands down the "normal" RAID stack path 5308 * All callers to hpsa_ciss_submit must check lockup_detected 5309 * beforehand, before (opt.) and after calling cmd_alloc 5310 */ 5311 static int hpsa_ciss_submit(struct ctlr_info *h, 5312 struct CommandList *c, struct scsi_cmnd *cmd, 5313 unsigned char scsi3addr[]) 5314 { 5315 cmd->host_scribble = (unsigned char *) c; 5316 c->cmd_type = CMD_SCSI; 5317 c->scsi_cmd = cmd; 5318 c->Header.ReplyQueue = 0; /* unused in simple mode */ 5319 memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8); 5320 c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT)); 5321 5322 /* Fill in the request block... */ 5323 5324 c->Request.Timeout = 0; 5325 BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB)); 5326 c->Request.CDBLen = cmd->cmd_len; 5327 memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len); 5328 switch (cmd->sc_data_direction) { 5329 case DMA_TO_DEVICE: 5330 c->Request.type_attr_dir = 5331 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE); 5332 break; 5333 case DMA_FROM_DEVICE: 5334 c->Request.type_attr_dir = 5335 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ); 5336 break; 5337 case DMA_NONE: 5338 c->Request.type_attr_dir = 5339 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE); 5340 break; 5341 case DMA_BIDIRECTIONAL: 5342 /* This can happen if a buggy application does a scsi passthru 5343 * and sets both inlen and outlen to non-zero. ( see 5344 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() ) 5345 */ 5346 5347 c->Request.type_attr_dir = 5348 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD); 5349 /* This is technically wrong, and hpsa controllers should 5350 * reject it with CMD_INVALID, which is the most correct 5351 * response, but non-fibre backends appear to let it 5352 * slide by, and give the same results as if this field 5353 * were set correctly. Either way is acceptable for 5354 * our purposes here. 5355 */ 5356 5357 break; 5358 5359 default: 5360 dev_err(&h->pdev->dev, "unknown data direction: %d\n", 5361 cmd->sc_data_direction); 5362 BUG(); 5363 break; 5364 } 5365 5366 if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */ 5367 hpsa_cmd_resolve_and_free(h, c); 5368 return SCSI_MLQUEUE_HOST_BUSY; 5369 } 5370 enqueue_cmd_and_start_io(h, c); 5371 /* the cmd'll come back via intr handler in complete_scsi_command() */ 5372 return 0; 5373 } 5374 5375 static void hpsa_cmd_init(struct ctlr_info *h, int index, 5376 struct CommandList *c) 5377 { 5378 dma_addr_t cmd_dma_handle, err_dma_handle; 5379 5380 /* Zero out all of commandlist except the last field, refcount */ 5381 memset(c, 0, offsetof(struct CommandList, refcount)); 5382 c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT)); 5383 cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c); 5384 c->err_info = h->errinfo_pool + index; 5385 memset(c->err_info, 0, sizeof(*c->err_info)); 5386 err_dma_handle = h->errinfo_pool_dhandle 5387 + index * sizeof(*c->err_info); 5388 c->cmdindex = index; 5389 c->busaddr = (u32) cmd_dma_handle; 5390 c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle); 5391 c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info)); 5392 c->h = h; 5393 c->scsi_cmd = SCSI_CMD_IDLE; 5394 } 5395 5396 static void hpsa_preinitialize_commands(struct ctlr_info *h) 5397 { 5398 int i; 5399 5400 for (i = 0; i < h->nr_cmds; i++) { 5401 struct CommandList *c = h->cmd_pool + i; 5402 5403 hpsa_cmd_init(h, i, c); 5404 atomic_set(&c->refcount, 0); 5405 } 5406 } 5407 5408 static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index, 5409 struct CommandList *c) 5410 { 5411 dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c); 5412 5413 BUG_ON(c->cmdindex != index); 5414 5415 memset(c->Request.CDB, 0, sizeof(c->Request.CDB)); 5416 memset(c->err_info, 0, sizeof(*c->err_info)); 5417 c->busaddr = (u32) cmd_dma_handle; 5418 } 5419 5420 static int hpsa_ioaccel_submit(struct ctlr_info *h, 5421 struct CommandList *c, struct scsi_cmnd *cmd, 5422 unsigned char *scsi3addr) 5423 { 5424 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 5425 int rc = IO_ACCEL_INELIGIBLE; 5426 5427 if (!dev) 5428 return SCSI_MLQUEUE_HOST_BUSY; 5429 5430 cmd->host_scribble = (unsigned char *) c; 5431 5432 if (dev->offload_enabled) { 5433 hpsa_cmd_init(h, c->cmdindex, c); 5434 c->cmd_type = CMD_SCSI; 5435 c->scsi_cmd = cmd; 5436 rc = hpsa_scsi_ioaccel_raid_map(h, c); 5437 if (rc < 0) /* scsi_dma_map failed. */ 5438 rc = SCSI_MLQUEUE_HOST_BUSY; 5439 } else if (dev->hba_ioaccel_enabled) { 5440 hpsa_cmd_init(h, c->cmdindex, c); 5441 c->cmd_type = CMD_SCSI; 5442 c->scsi_cmd = cmd; 5443 rc = hpsa_scsi_ioaccel_direct_map(h, c); 5444 if (rc < 0) /* scsi_dma_map failed. */ 5445 rc = SCSI_MLQUEUE_HOST_BUSY; 5446 } 5447 return rc; 5448 } 5449 5450 static void hpsa_command_resubmit_worker(struct work_struct *work) 5451 { 5452 struct scsi_cmnd *cmd; 5453 struct hpsa_scsi_dev_t *dev; 5454 struct CommandList *c = container_of(work, struct CommandList, work); 5455 5456 cmd = c->scsi_cmd; 5457 dev = cmd->device->hostdata; 5458 if (!dev) { 5459 cmd->result = DID_NO_CONNECT << 16; 5460 return hpsa_cmd_free_and_done(c->h, c, cmd); 5461 } 5462 if (c->reset_pending) 5463 return hpsa_cmd_resolve_and_free(c->h, c); 5464 if (c->abort_pending) 5465 return hpsa_cmd_abort_and_free(c->h, c, cmd); 5466 if (c->cmd_type == CMD_IOACCEL2) { 5467 struct ctlr_info *h = c->h; 5468 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 5469 int rc; 5470 5471 if (c2->error_data.serv_response == 5472 IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL) { 5473 rc = hpsa_ioaccel_submit(h, c, cmd, dev->scsi3addr); 5474 if (rc == 0) 5475 return; 5476 if (rc == SCSI_MLQUEUE_HOST_BUSY) { 5477 /* 5478 * If we get here, it means dma mapping failed. 5479 * Try again via scsi mid layer, which will 5480 * then get SCSI_MLQUEUE_HOST_BUSY. 5481 */ 5482 cmd->result = DID_IMM_RETRY << 16; 5483 return hpsa_cmd_free_and_done(h, c, cmd); 5484 } 5485 /* else, fall thru and resubmit down CISS path */ 5486 } 5487 } 5488 hpsa_cmd_partial_init(c->h, c->cmdindex, c); 5489 if (hpsa_ciss_submit(c->h, c, cmd, dev->scsi3addr)) { 5490 /* 5491 * If we get here, it means dma mapping failed. Try 5492 * again via scsi mid layer, which will then get 5493 * SCSI_MLQUEUE_HOST_BUSY. 5494 * 5495 * hpsa_ciss_submit will have already freed c 5496 * if it encountered a dma mapping failure. 5497 */ 5498 cmd->result = DID_IMM_RETRY << 16; 5499 cmd->scsi_done(cmd); 5500 } 5501 } 5502 5503 /* Running in struct Scsi_Host->host_lock less mode */ 5504 static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd) 5505 { 5506 struct ctlr_info *h; 5507 struct hpsa_scsi_dev_t *dev; 5508 unsigned char scsi3addr[8]; 5509 struct CommandList *c; 5510 int rc = 0; 5511 5512 /* Get the ptr to our adapter structure out of cmd->host. */ 5513 h = sdev_to_hba(cmd->device); 5514 5515 BUG_ON(cmd->request->tag < 0); 5516 5517 dev = cmd->device->hostdata; 5518 if (!dev) { 5519 cmd->result = DID_NO_CONNECT << 16; 5520 cmd->scsi_done(cmd); 5521 return 0; 5522 } 5523 5524 if (dev->removed) { 5525 cmd->result = DID_NO_CONNECT << 16; 5526 cmd->scsi_done(cmd); 5527 return 0; 5528 } 5529 5530 memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr)); 5531 5532 if (unlikely(lockup_detected(h))) { 5533 cmd->result = DID_NO_CONNECT << 16; 5534 cmd->scsi_done(cmd); 5535 return 0; 5536 } 5537 c = cmd_tagged_alloc(h, cmd); 5538 5539 /* 5540 * Call alternate submit routine for I/O accelerated commands. 5541 * Retries always go down the normal I/O path. 5542 */ 5543 if (likely(cmd->retries == 0 && 5544 cmd->request->cmd_type == REQ_TYPE_FS && 5545 h->acciopath_status)) { 5546 rc = hpsa_ioaccel_submit(h, c, cmd, scsi3addr); 5547 if (rc == 0) 5548 return 0; 5549 if (rc == SCSI_MLQUEUE_HOST_BUSY) { 5550 hpsa_cmd_resolve_and_free(h, c); 5551 return SCSI_MLQUEUE_HOST_BUSY; 5552 } 5553 } 5554 return hpsa_ciss_submit(h, c, cmd, scsi3addr); 5555 } 5556 5557 static void hpsa_scan_complete(struct ctlr_info *h) 5558 { 5559 unsigned long flags; 5560 5561 spin_lock_irqsave(&h->scan_lock, flags); 5562 h->scan_finished = 1; 5563 wake_up_all(&h->scan_wait_queue); 5564 spin_unlock_irqrestore(&h->scan_lock, flags); 5565 } 5566 5567 static void hpsa_scan_start(struct Scsi_Host *sh) 5568 { 5569 struct ctlr_info *h = shost_to_hba(sh); 5570 unsigned long flags; 5571 5572 /* 5573 * Don't let rescans be initiated on a controller known to be locked 5574 * up. If the controller locks up *during* a rescan, that thread is 5575 * probably hosed, but at least we can prevent new rescan threads from 5576 * piling up on a locked up controller. 5577 */ 5578 if (unlikely(lockup_detected(h))) 5579 return hpsa_scan_complete(h); 5580 5581 /* wait until any scan already in progress is finished. */ 5582 while (1) { 5583 spin_lock_irqsave(&h->scan_lock, flags); 5584 if (h->scan_finished) 5585 break; 5586 spin_unlock_irqrestore(&h->scan_lock, flags); 5587 wait_event(h->scan_wait_queue, h->scan_finished); 5588 /* Note: We don't need to worry about a race between this 5589 * thread and driver unload because the midlayer will 5590 * have incremented the reference count, so unload won't 5591 * happen if we're in here. 5592 */ 5593 } 5594 h->scan_finished = 0; /* mark scan as in progress */ 5595 spin_unlock_irqrestore(&h->scan_lock, flags); 5596 5597 if (unlikely(lockup_detected(h))) 5598 return hpsa_scan_complete(h); 5599 5600 /* 5601 * Do the scan after a reset completion 5602 */ 5603 if (h->reset_in_progress) { 5604 h->drv_req_rescan = 1; 5605 return; 5606 } 5607 5608 hpsa_update_scsi_devices(h); 5609 5610 hpsa_scan_complete(h); 5611 } 5612 5613 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth) 5614 { 5615 struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata; 5616 5617 if (!logical_drive) 5618 return -ENODEV; 5619 5620 if (qdepth < 1) 5621 qdepth = 1; 5622 else if (qdepth > logical_drive->queue_depth) 5623 qdepth = logical_drive->queue_depth; 5624 5625 return scsi_change_queue_depth(sdev, qdepth); 5626 } 5627 5628 static int hpsa_scan_finished(struct Scsi_Host *sh, 5629 unsigned long elapsed_time) 5630 { 5631 struct ctlr_info *h = shost_to_hba(sh); 5632 unsigned long flags; 5633 int finished; 5634 5635 spin_lock_irqsave(&h->scan_lock, flags); 5636 finished = h->scan_finished; 5637 spin_unlock_irqrestore(&h->scan_lock, flags); 5638 return finished; 5639 } 5640 5641 static int hpsa_scsi_host_alloc(struct ctlr_info *h) 5642 { 5643 struct Scsi_Host *sh; 5644 5645 sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h)); 5646 if (sh == NULL) { 5647 dev_err(&h->pdev->dev, "scsi_host_alloc failed\n"); 5648 return -ENOMEM; 5649 } 5650 5651 sh->io_port = 0; 5652 sh->n_io_port = 0; 5653 sh->this_id = -1; 5654 sh->max_channel = 3; 5655 sh->max_cmd_len = MAX_COMMAND_SIZE; 5656 sh->max_lun = HPSA_MAX_LUN; 5657 sh->max_id = HPSA_MAX_LUN; 5658 sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS; 5659 sh->cmd_per_lun = sh->can_queue; 5660 sh->sg_tablesize = h->maxsgentries; 5661 sh->transportt = hpsa_sas_transport_template; 5662 sh->hostdata[0] = (unsigned long) h; 5663 sh->irq = pci_irq_vector(h->pdev, 0); 5664 sh->unique_id = sh->irq; 5665 5666 h->scsi_host = sh; 5667 return 0; 5668 } 5669 5670 static int hpsa_scsi_add_host(struct ctlr_info *h) 5671 { 5672 int rv; 5673 5674 rv = scsi_add_host(h->scsi_host, &h->pdev->dev); 5675 if (rv) { 5676 dev_err(&h->pdev->dev, "scsi_add_host failed\n"); 5677 return rv; 5678 } 5679 scsi_scan_host(h->scsi_host); 5680 return 0; 5681 } 5682 5683 /* 5684 * The block layer has already gone to the trouble of picking out a unique, 5685 * small-integer tag for this request. We use an offset from that value as 5686 * an index to select our command block. (The offset allows us to reserve the 5687 * low-numbered entries for our own uses.) 5688 */ 5689 static int hpsa_get_cmd_index(struct scsi_cmnd *scmd) 5690 { 5691 int idx = scmd->request->tag; 5692 5693 if (idx < 0) 5694 return idx; 5695 5696 /* Offset to leave space for internal cmds. */ 5697 return idx += HPSA_NRESERVED_CMDS; 5698 } 5699 5700 /* 5701 * Send a TEST_UNIT_READY command to the specified LUN using the specified 5702 * reply queue; returns zero if the unit is ready, and non-zero otherwise. 5703 */ 5704 static int hpsa_send_test_unit_ready(struct ctlr_info *h, 5705 struct CommandList *c, unsigned char lunaddr[], 5706 int reply_queue) 5707 { 5708 int rc; 5709 5710 /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */ 5711 (void) fill_cmd(c, TEST_UNIT_READY, h, 5712 NULL, 0, 0, lunaddr, TYPE_CMD); 5713 rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 5714 if (rc) 5715 return rc; 5716 /* no unmap needed here because no data xfer. */ 5717 5718 /* Check if the unit is already ready. */ 5719 if (c->err_info->CommandStatus == CMD_SUCCESS) 5720 return 0; 5721 5722 /* 5723 * The first command sent after reset will receive "unit attention" to 5724 * indicate that the LUN has been reset...this is actually what we're 5725 * looking for (but, success is good too). 5726 */ 5727 if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 5728 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION && 5729 (c->err_info->SenseInfo[2] == NO_SENSE || 5730 c->err_info->SenseInfo[2] == UNIT_ATTENTION)) 5731 return 0; 5732 5733 return 1; 5734 } 5735 5736 /* 5737 * Wait for a TEST_UNIT_READY command to complete, retrying as necessary; 5738 * returns zero when the unit is ready, and non-zero when giving up. 5739 */ 5740 static int hpsa_wait_for_test_unit_ready(struct ctlr_info *h, 5741 struct CommandList *c, 5742 unsigned char lunaddr[], int reply_queue) 5743 { 5744 int rc; 5745 int count = 0; 5746 int waittime = 1; /* seconds */ 5747 5748 /* Send test unit ready until device ready, or give up. */ 5749 for (count = 0; count < HPSA_TUR_RETRY_LIMIT; count++) { 5750 5751 /* 5752 * Wait for a bit. do this first, because if we send 5753 * the TUR right away, the reset will just abort it. 5754 */ 5755 msleep(1000 * waittime); 5756 5757 rc = hpsa_send_test_unit_ready(h, c, lunaddr, reply_queue); 5758 if (!rc) 5759 break; 5760 5761 /* Increase wait time with each try, up to a point. */ 5762 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS) 5763 waittime *= 2; 5764 5765 dev_warn(&h->pdev->dev, 5766 "waiting %d secs for device to become ready.\n", 5767 waittime); 5768 } 5769 5770 return rc; 5771 } 5772 5773 static int wait_for_device_to_become_ready(struct ctlr_info *h, 5774 unsigned char lunaddr[], 5775 int reply_queue) 5776 { 5777 int first_queue; 5778 int last_queue; 5779 int rq; 5780 int rc = 0; 5781 struct CommandList *c; 5782 5783 c = cmd_alloc(h); 5784 5785 /* 5786 * If no specific reply queue was requested, then send the TUR 5787 * repeatedly, requesting a reply on each reply queue; otherwise execute 5788 * the loop exactly once using only the specified queue. 5789 */ 5790 if (reply_queue == DEFAULT_REPLY_QUEUE) { 5791 first_queue = 0; 5792 last_queue = h->nreply_queues - 1; 5793 } else { 5794 first_queue = reply_queue; 5795 last_queue = reply_queue; 5796 } 5797 5798 for (rq = first_queue; rq <= last_queue; rq++) { 5799 rc = hpsa_wait_for_test_unit_ready(h, c, lunaddr, rq); 5800 if (rc) 5801 break; 5802 } 5803 5804 if (rc) 5805 dev_warn(&h->pdev->dev, "giving up on device.\n"); 5806 else 5807 dev_warn(&h->pdev->dev, "device is ready.\n"); 5808 5809 cmd_free(h, c); 5810 return rc; 5811 } 5812 5813 /* Need at least one of these error handlers to keep ../scsi/hosts.c from 5814 * complaining. Doing a host- or bus-reset can't do anything good here. 5815 */ 5816 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd) 5817 { 5818 int rc; 5819 struct ctlr_info *h; 5820 struct hpsa_scsi_dev_t *dev; 5821 u8 reset_type; 5822 char msg[48]; 5823 5824 /* find the controller to which the command to be aborted was sent */ 5825 h = sdev_to_hba(scsicmd->device); 5826 if (h == NULL) /* paranoia */ 5827 return FAILED; 5828 5829 if (lockup_detected(h)) 5830 return FAILED; 5831 5832 dev = scsicmd->device->hostdata; 5833 if (!dev) { 5834 dev_err(&h->pdev->dev, "%s: device lookup failed\n", __func__); 5835 return FAILED; 5836 } 5837 5838 /* if controller locked up, we can guarantee command won't complete */ 5839 if (lockup_detected(h)) { 5840 snprintf(msg, sizeof(msg), 5841 "cmd %d RESET FAILED, lockup detected", 5842 hpsa_get_cmd_index(scsicmd)); 5843 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 5844 return FAILED; 5845 } 5846 5847 /* this reset request might be the result of a lockup; check */ 5848 if (detect_controller_lockup(h)) { 5849 snprintf(msg, sizeof(msg), 5850 "cmd %d RESET FAILED, new lockup detected", 5851 hpsa_get_cmd_index(scsicmd)); 5852 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 5853 return FAILED; 5854 } 5855 5856 /* Do not attempt on controller */ 5857 if (is_hba_lunid(dev->scsi3addr)) 5858 return SUCCESS; 5859 5860 if (is_logical_dev_addr_mode(dev->scsi3addr)) 5861 reset_type = HPSA_DEVICE_RESET_MSG; 5862 else 5863 reset_type = HPSA_PHYS_TARGET_RESET; 5864 5865 sprintf(msg, "resetting %s", 5866 reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical "); 5867 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 5868 5869 h->reset_in_progress = 1; 5870 5871 /* send a reset to the SCSI LUN which the command was sent to */ 5872 rc = hpsa_do_reset(h, dev, dev->scsi3addr, reset_type, 5873 DEFAULT_REPLY_QUEUE); 5874 sprintf(msg, "reset %s %s", 5875 reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ", 5876 rc == 0 ? "completed successfully" : "failed"); 5877 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 5878 h->reset_in_progress = 0; 5879 return rc == 0 ? SUCCESS : FAILED; 5880 } 5881 5882 static void swizzle_abort_tag(u8 *tag) 5883 { 5884 u8 original_tag[8]; 5885 5886 memcpy(original_tag, tag, 8); 5887 tag[0] = original_tag[3]; 5888 tag[1] = original_tag[2]; 5889 tag[2] = original_tag[1]; 5890 tag[3] = original_tag[0]; 5891 tag[4] = original_tag[7]; 5892 tag[5] = original_tag[6]; 5893 tag[6] = original_tag[5]; 5894 tag[7] = original_tag[4]; 5895 } 5896 5897 static void hpsa_get_tag(struct ctlr_info *h, 5898 struct CommandList *c, __le32 *taglower, __le32 *tagupper) 5899 { 5900 u64 tag; 5901 if (c->cmd_type == CMD_IOACCEL1) { 5902 struct io_accel1_cmd *cm1 = (struct io_accel1_cmd *) 5903 &h->ioaccel_cmd_pool[c->cmdindex]; 5904 tag = le64_to_cpu(cm1->tag); 5905 *tagupper = cpu_to_le32(tag >> 32); 5906 *taglower = cpu_to_le32(tag); 5907 return; 5908 } 5909 if (c->cmd_type == CMD_IOACCEL2) { 5910 struct io_accel2_cmd *cm2 = (struct io_accel2_cmd *) 5911 &h->ioaccel2_cmd_pool[c->cmdindex]; 5912 /* upper tag not used in ioaccel2 mode */ 5913 memset(tagupper, 0, sizeof(*tagupper)); 5914 *taglower = cm2->Tag; 5915 return; 5916 } 5917 tag = le64_to_cpu(c->Header.tag); 5918 *tagupper = cpu_to_le32(tag >> 32); 5919 *taglower = cpu_to_le32(tag); 5920 } 5921 5922 static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr, 5923 struct CommandList *abort, int reply_queue) 5924 { 5925 int rc = IO_OK; 5926 struct CommandList *c; 5927 struct ErrorInfo *ei; 5928 __le32 tagupper, taglower; 5929 5930 c = cmd_alloc(h); 5931 5932 /* fill_cmd can't fail here, no buffer to map */ 5933 (void) fill_cmd(c, HPSA_ABORT_MSG, h, &abort->Header.tag, 5934 0, 0, scsi3addr, TYPE_MSG); 5935 if (h->needs_abort_tags_swizzled) 5936 swizzle_abort_tag(&c->Request.CDB[4]); 5937 (void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 5938 hpsa_get_tag(h, abort, &taglower, &tagupper); 5939 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd(abort) completed.\n", 5940 __func__, tagupper, taglower); 5941 /* no unmap needed here because no data xfer. */ 5942 5943 ei = c->err_info; 5944 switch (ei->CommandStatus) { 5945 case CMD_SUCCESS: 5946 break; 5947 case CMD_TMF_STATUS: 5948 rc = hpsa_evaluate_tmf_status(h, c); 5949 break; 5950 case CMD_UNABORTABLE: /* Very common, don't make noise. */ 5951 rc = -1; 5952 break; 5953 default: 5954 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n", 5955 __func__, tagupper, taglower); 5956 hpsa_scsi_interpret_error(h, c); 5957 rc = -1; 5958 break; 5959 } 5960 cmd_free(h, c); 5961 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", 5962 __func__, tagupper, taglower); 5963 return rc; 5964 } 5965 5966 static void setup_ioaccel2_abort_cmd(struct CommandList *c, struct ctlr_info *h, 5967 struct CommandList *command_to_abort, int reply_queue) 5968 { 5969 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 5970 struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2; 5971 struct io_accel2_cmd *c2a = 5972 &h->ioaccel2_cmd_pool[command_to_abort->cmdindex]; 5973 struct scsi_cmnd *scmd = command_to_abort->scsi_cmd; 5974 struct hpsa_scsi_dev_t *dev = scmd->device->hostdata; 5975 5976 if (!dev) 5977 return; 5978 5979 /* 5980 * We're overlaying struct hpsa_tmf_struct on top of something which 5981 * was allocated as a struct io_accel2_cmd, so we better be sure it 5982 * actually fits, and doesn't overrun the error info space. 5983 */ 5984 BUILD_BUG_ON(sizeof(struct hpsa_tmf_struct) > 5985 sizeof(struct io_accel2_cmd)); 5986 BUG_ON(offsetof(struct io_accel2_cmd, error_data) < 5987 offsetof(struct hpsa_tmf_struct, error_len) + 5988 sizeof(ac->error_len)); 5989 5990 c->cmd_type = IOACCEL2_TMF; 5991 c->scsi_cmd = SCSI_CMD_BUSY; 5992 5993 /* Adjust the DMA address to point to the accelerated command buffer */ 5994 c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle + 5995 (c->cmdindex * sizeof(struct io_accel2_cmd)); 5996 BUG_ON(c->busaddr & 0x0000007F); 5997 5998 memset(ac, 0, sizeof(*c2)); /* yes this is correct */ 5999 ac->iu_type = IOACCEL2_IU_TMF_TYPE; 6000 ac->reply_queue = reply_queue; 6001 ac->tmf = IOACCEL2_TMF_ABORT; 6002 ac->it_nexus = cpu_to_le32(dev->ioaccel_handle); 6003 memset(ac->lun_id, 0, sizeof(ac->lun_id)); 6004 ac->tag = cpu_to_le64(c->cmdindex << DIRECT_LOOKUP_SHIFT); 6005 ac->abort_tag = cpu_to_le64(le32_to_cpu(c2a->Tag)); 6006 ac->error_ptr = cpu_to_le64(c->busaddr + 6007 offsetof(struct io_accel2_cmd, error_data)); 6008 ac->error_len = cpu_to_le32(sizeof(c2->error_data)); 6009 } 6010 6011 /* ioaccel2 path firmware cannot handle abort task requests. 6012 * Change abort requests to physical target reset, and send to the 6013 * address of the physical disk used for the ioaccel 2 command. 6014 * Return 0 on success (IO_OK) 6015 * -1 on failure 6016 */ 6017 6018 static int hpsa_send_reset_as_abort_ioaccel2(struct ctlr_info *h, 6019 unsigned char *scsi3addr, struct CommandList *abort, int reply_queue) 6020 { 6021 int rc = IO_OK; 6022 struct scsi_cmnd *scmd; /* scsi command within request being aborted */ 6023 struct hpsa_scsi_dev_t *dev; /* device to which scsi cmd was sent */ 6024 unsigned char phys_scsi3addr[8]; /* addr of phys disk with volume */ 6025 unsigned char *psa = &phys_scsi3addr[0]; 6026 6027 /* Get a pointer to the hpsa logical device. */ 6028 scmd = abort->scsi_cmd; 6029 dev = (struct hpsa_scsi_dev_t *)(scmd->device->hostdata); 6030 if (dev == NULL) { 6031 dev_warn(&h->pdev->dev, 6032 "Cannot abort: no device pointer for command.\n"); 6033 return -1; /* not abortable */ 6034 } 6035 6036 if (h->raid_offload_debug > 0) 6037 dev_info(&h->pdev->dev, 6038 "scsi %d:%d:%d:%d %s scsi3addr 0x%8phN\n", 6039 h->scsi_host->host_no, dev->bus, dev->target, dev->lun, 6040 "Reset as abort", scsi3addr); 6041 6042 if (!dev->offload_enabled) { 6043 dev_warn(&h->pdev->dev, 6044 "Can't abort: device is not operating in HP SSD Smart Path mode.\n"); 6045 return -1; /* not abortable */ 6046 } 6047 6048 /* Incoming scsi3addr is logical addr. We need physical disk addr. */ 6049 if (!hpsa_get_pdisk_of_ioaccel2(h, abort, psa)) { 6050 dev_warn(&h->pdev->dev, "Can't abort: Failed lookup of physical address.\n"); 6051 return -1; /* not abortable */ 6052 } 6053 6054 /* send the reset */ 6055 if (h->raid_offload_debug > 0) 6056 dev_info(&h->pdev->dev, 6057 "Reset as abort: Resetting physical device at scsi3addr 0x%8phN\n", 6058 psa); 6059 rc = hpsa_do_reset(h, dev, psa, HPSA_PHYS_TARGET_RESET, reply_queue); 6060 if (rc != 0) { 6061 dev_warn(&h->pdev->dev, 6062 "Reset as abort: Failed on physical device at scsi3addr 0x%8phN\n", 6063 psa); 6064 return rc; /* failed to reset */ 6065 } 6066 6067 /* wait for device to recover */ 6068 if (wait_for_device_to_become_ready(h, psa, reply_queue) != 0) { 6069 dev_warn(&h->pdev->dev, 6070 "Reset as abort: Failed: Device never recovered from reset: 0x%8phN\n", 6071 psa); 6072 return -1; /* failed to recover */ 6073 } 6074 6075 /* device recovered */ 6076 dev_info(&h->pdev->dev, 6077 "Reset as abort: Device recovered from reset: scsi3addr 0x%8phN\n", 6078 psa); 6079 6080 return rc; /* success */ 6081 } 6082 6083 static int hpsa_send_abort_ioaccel2(struct ctlr_info *h, 6084 struct CommandList *abort, int reply_queue) 6085 { 6086 int rc = IO_OK; 6087 struct CommandList *c; 6088 __le32 taglower, tagupper; 6089 struct hpsa_scsi_dev_t *dev; 6090 struct io_accel2_cmd *c2; 6091 6092 dev = abort->scsi_cmd->device->hostdata; 6093 if (!dev) 6094 return -1; 6095 6096 if (!dev->offload_enabled && !dev->hba_ioaccel_enabled) 6097 return -1; 6098 6099 c = cmd_alloc(h); 6100 setup_ioaccel2_abort_cmd(c, h, abort, reply_queue); 6101 c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 6102 (void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 6103 hpsa_get_tag(h, abort, &taglower, &tagupper); 6104 dev_dbg(&h->pdev->dev, 6105 "%s: Tag:0x%08x:%08x: do_simple_cmd(ioaccel2 abort) completed.\n", 6106 __func__, tagupper, taglower); 6107 /* no unmap needed here because no data xfer. */ 6108 6109 dev_dbg(&h->pdev->dev, 6110 "%s: Tag:0x%08x:%08x: abort service response = 0x%02x.\n", 6111 __func__, tagupper, taglower, c2->error_data.serv_response); 6112 switch (c2->error_data.serv_response) { 6113 case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE: 6114 case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS: 6115 rc = 0; 6116 break; 6117 case IOACCEL2_SERV_RESPONSE_TMF_REJECTED: 6118 case IOACCEL2_SERV_RESPONSE_FAILURE: 6119 case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN: 6120 rc = -1; 6121 break; 6122 default: 6123 dev_warn(&h->pdev->dev, 6124 "%s: Tag:0x%08x:%08x: unknown abort service response 0x%02x\n", 6125 __func__, tagupper, taglower, 6126 c2->error_data.serv_response); 6127 rc = -1; 6128 } 6129 cmd_free(h, c); 6130 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", __func__, 6131 tagupper, taglower); 6132 return rc; 6133 } 6134 6135 static int hpsa_send_abort_both_ways(struct ctlr_info *h, 6136 struct hpsa_scsi_dev_t *dev, struct CommandList *abort, int reply_queue) 6137 { 6138 /* 6139 * ioccelerator mode 2 commands should be aborted via the 6140 * accelerated path, since RAID path is unaware of these commands, 6141 * but not all underlying firmware can handle abort TMF. 6142 * Change abort to physical device reset when abort TMF is unsupported. 6143 */ 6144 if (abort->cmd_type == CMD_IOACCEL2) { 6145 if ((HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags) || 6146 dev->physical_device) 6147 return hpsa_send_abort_ioaccel2(h, abort, 6148 reply_queue); 6149 else 6150 return hpsa_send_reset_as_abort_ioaccel2(h, 6151 dev->scsi3addr, 6152 abort, reply_queue); 6153 } 6154 return hpsa_send_abort(h, dev->scsi3addr, abort, reply_queue); 6155 } 6156 6157 /* Find out which reply queue a command was meant to return on */ 6158 static int hpsa_extract_reply_queue(struct ctlr_info *h, 6159 struct CommandList *c) 6160 { 6161 if (c->cmd_type == CMD_IOACCEL2) 6162 return h->ioaccel2_cmd_pool[c->cmdindex].reply_queue; 6163 return c->Header.ReplyQueue; 6164 } 6165 6166 /* 6167 * Limit concurrency of abort commands to prevent 6168 * over-subscription of commands 6169 */ 6170 static inline int wait_for_available_abort_cmd(struct ctlr_info *h) 6171 { 6172 #define ABORT_CMD_WAIT_MSECS 5000 6173 return !wait_event_timeout(h->abort_cmd_wait_queue, 6174 atomic_dec_if_positive(&h->abort_cmds_available) >= 0, 6175 msecs_to_jiffies(ABORT_CMD_WAIT_MSECS)); 6176 } 6177 6178 /* Send an abort for the specified command. 6179 * If the device and controller support it, 6180 * send a task abort request. 6181 */ 6182 static int hpsa_eh_abort_handler(struct scsi_cmnd *sc) 6183 { 6184 6185 int rc; 6186 struct ctlr_info *h; 6187 struct hpsa_scsi_dev_t *dev; 6188 struct CommandList *abort; /* pointer to command to be aborted */ 6189 struct scsi_cmnd *as; /* ptr to scsi cmd inside aborted command. */ 6190 char msg[256]; /* For debug messaging. */ 6191 int ml = 0; 6192 __le32 tagupper, taglower; 6193 int refcount, reply_queue; 6194 6195 if (sc == NULL) 6196 return FAILED; 6197 6198 if (sc->device == NULL) 6199 return FAILED; 6200 6201 /* Find the controller of the command to be aborted */ 6202 h = sdev_to_hba(sc->device); 6203 if (h == NULL) 6204 return FAILED; 6205 6206 /* Find the device of the command to be aborted */ 6207 dev = sc->device->hostdata; 6208 if (!dev) { 6209 dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n", 6210 msg); 6211 return FAILED; 6212 } 6213 6214 /* If controller locked up, we can guarantee command won't complete */ 6215 if (lockup_detected(h)) { 6216 hpsa_show_dev_msg(KERN_WARNING, h, dev, 6217 "ABORT FAILED, lockup detected"); 6218 return FAILED; 6219 } 6220 6221 /* This is a good time to check if controller lockup has occurred */ 6222 if (detect_controller_lockup(h)) { 6223 hpsa_show_dev_msg(KERN_WARNING, h, dev, 6224 "ABORT FAILED, new lockup detected"); 6225 return FAILED; 6226 } 6227 6228 /* Check that controller supports some kind of task abort */ 6229 if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) && 6230 !(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags)) 6231 return FAILED; 6232 6233 memset(msg, 0, sizeof(msg)); 6234 ml += sprintf(msg+ml, "scsi %d:%d:%d:%llu %s %p", 6235 h->scsi_host->host_no, sc->device->channel, 6236 sc->device->id, sc->device->lun, 6237 "Aborting command", sc); 6238 6239 /* Get SCSI command to be aborted */ 6240 abort = (struct CommandList *) sc->host_scribble; 6241 if (abort == NULL) { 6242 /* This can happen if the command already completed. */ 6243 return SUCCESS; 6244 } 6245 refcount = atomic_inc_return(&abort->refcount); 6246 if (refcount == 1) { /* Command is done already. */ 6247 cmd_free(h, abort); 6248 return SUCCESS; 6249 } 6250 6251 /* Don't bother trying the abort if we know it won't work. */ 6252 if (abort->cmd_type != CMD_IOACCEL2 && 6253 abort->cmd_type != CMD_IOACCEL1 && !dev->supports_aborts) { 6254 cmd_free(h, abort); 6255 return FAILED; 6256 } 6257 6258 /* 6259 * Check that we're aborting the right command. 6260 * It's possible the CommandList already completed and got re-used. 6261 */ 6262 if (abort->scsi_cmd != sc) { 6263 cmd_free(h, abort); 6264 return SUCCESS; 6265 } 6266 6267 abort->abort_pending = true; 6268 hpsa_get_tag(h, abort, &taglower, &tagupper); 6269 reply_queue = hpsa_extract_reply_queue(h, abort); 6270 ml += sprintf(msg+ml, "Tag:0x%08x:%08x ", tagupper, taglower); 6271 as = abort->scsi_cmd; 6272 if (as != NULL) 6273 ml += sprintf(msg+ml, 6274 "CDBLen: %d CDB: 0x%02x%02x... SN: 0x%lx ", 6275 as->cmd_len, as->cmnd[0], as->cmnd[1], 6276 as->serial_number); 6277 dev_warn(&h->pdev->dev, "%s BEING SENT\n", msg); 6278 hpsa_show_dev_msg(KERN_WARNING, h, dev, "Aborting command"); 6279 6280 /* 6281 * Command is in flight, or possibly already completed 6282 * by the firmware (but not to the scsi mid layer) but we can't 6283 * distinguish which. Send the abort down. 6284 */ 6285 if (wait_for_available_abort_cmd(h)) { 6286 dev_warn(&h->pdev->dev, 6287 "%s FAILED, timeout waiting for an abort command to become available.\n", 6288 msg); 6289 cmd_free(h, abort); 6290 return FAILED; 6291 } 6292 rc = hpsa_send_abort_both_ways(h, dev, abort, reply_queue); 6293 atomic_inc(&h->abort_cmds_available); 6294 wake_up_all(&h->abort_cmd_wait_queue); 6295 if (rc != 0) { 6296 dev_warn(&h->pdev->dev, "%s SENT, FAILED\n", msg); 6297 hpsa_show_dev_msg(KERN_WARNING, h, dev, 6298 "FAILED to abort command"); 6299 cmd_free(h, abort); 6300 return FAILED; 6301 } 6302 dev_info(&h->pdev->dev, "%s SENT, SUCCESS\n", msg); 6303 wait_event(h->event_sync_wait_queue, 6304 abort->scsi_cmd != sc || lockup_detected(h)); 6305 cmd_free(h, abort); 6306 return !lockup_detected(h) ? SUCCESS : FAILED; 6307 } 6308 6309 /* 6310 * For operations with an associated SCSI command, a command block is allocated 6311 * at init, and managed by cmd_tagged_alloc() and cmd_tagged_free() using the 6312 * block request tag as an index into a table of entries. cmd_tagged_free() is 6313 * the complement, although cmd_free() may be called instead. 6314 */ 6315 static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h, 6316 struct scsi_cmnd *scmd) 6317 { 6318 int idx = hpsa_get_cmd_index(scmd); 6319 struct CommandList *c = h->cmd_pool + idx; 6320 6321 if (idx < HPSA_NRESERVED_CMDS || idx >= h->nr_cmds) { 6322 dev_err(&h->pdev->dev, "Bad block tag: %d not in [%d..%d]\n", 6323 idx, HPSA_NRESERVED_CMDS, h->nr_cmds - 1); 6324 /* The index value comes from the block layer, so if it's out of 6325 * bounds, it's probably not our bug. 6326 */ 6327 BUG(); 6328 } 6329 6330 atomic_inc(&c->refcount); 6331 if (unlikely(!hpsa_is_cmd_idle(c))) { 6332 /* 6333 * We expect that the SCSI layer will hand us a unique tag 6334 * value. Thus, there should never be a collision here between 6335 * two requests...because if the selected command isn't idle 6336 * then someone is going to be very disappointed. 6337 */ 6338 dev_err(&h->pdev->dev, 6339 "tag collision (tag=%d) in cmd_tagged_alloc().\n", 6340 idx); 6341 if (c->scsi_cmd != NULL) 6342 scsi_print_command(c->scsi_cmd); 6343 scsi_print_command(scmd); 6344 } 6345 6346 hpsa_cmd_partial_init(h, idx, c); 6347 return c; 6348 } 6349 6350 static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c) 6351 { 6352 /* 6353 * Release our reference to the block. We don't need to do anything 6354 * else to free it, because it is accessed by index. (There's no point 6355 * in checking the result of the decrement, since we cannot guarantee 6356 * that there isn't a concurrent abort which is also accessing it.) 6357 */ 6358 (void)atomic_dec(&c->refcount); 6359 } 6360 6361 /* 6362 * For operations that cannot sleep, a command block is allocated at init, 6363 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track 6364 * which ones are free or in use. Lock must be held when calling this. 6365 * cmd_free() is the complement. 6366 * This function never gives up and returns NULL. If it hangs, 6367 * another thread must call cmd_free() to free some tags. 6368 */ 6369 6370 static struct CommandList *cmd_alloc(struct ctlr_info *h) 6371 { 6372 struct CommandList *c; 6373 int refcount, i; 6374 int offset = 0; 6375 6376 /* 6377 * There is some *extremely* small but non-zero chance that that 6378 * multiple threads could get in here, and one thread could 6379 * be scanning through the list of bits looking for a free 6380 * one, but the free ones are always behind him, and other 6381 * threads sneak in behind him and eat them before he can 6382 * get to them, so that while there is always a free one, a 6383 * very unlucky thread might be starved anyway, never able to 6384 * beat the other threads. In reality, this happens so 6385 * infrequently as to be indistinguishable from never. 6386 * 6387 * Note that we start allocating commands before the SCSI host structure 6388 * is initialized. Since the search starts at bit zero, this 6389 * all works, since we have at least one command structure available; 6390 * however, it means that the structures with the low indexes have to be 6391 * reserved for driver-initiated requests, while requests from the block 6392 * layer will use the higher indexes. 6393 */ 6394 6395 for (;;) { 6396 i = find_next_zero_bit(h->cmd_pool_bits, 6397 HPSA_NRESERVED_CMDS, 6398 offset); 6399 if (unlikely(i >= HPSA_NRESERVED_CMDS)) { 6400 offset = 0; 6401 continue; 6402 } 6403 c = h->cmd_pool + i; 6404 refcount = atomic_inc_return(&c->refcount); 6405 if (unlikely(refcount > 1)) { 6406 cmd_free(h, c); /* already in use */ 6407 offset = (i + 1) % HPSA_NRESERVED_CMDS; 6408 continue; 6409 } 6410 set_bit(i & (BITS_PER_LONG - 1), 6411 h->cmd_pool_bits + (i / BITS_PER_LONG)); 6412 break; /* it's ours now. */ 6413 } 6414 hpsa_cmd_partial_init(h, i, c); 6415 return c; 6416 } 6417 6418 /* 6419 * This is the complementary operation to cmd_alloc(). Note, however, in some 6420 * corner cases it may also be used to free blocks allocated by 6421 * cmd_tagged_alloc() in which case the ref-count decrement does the trick and 6422 * the clear-bit is harmless. 6423 */ 6424 static void cmd_free(struct ctlr_info *h, struct CommandList *c) 6425 { 6426 if (atomic_dec_and_test(&c->refcount)) { 6427 int i; 6428 6429 i = c - h->cmd_pool; 6430 clear_bit(i & (BITS_PER_LONG - 1), 6431 h->cmd_pool_bits + (i / BITS_PER_LONG)); 6432 } 6433 } 6434 6435 #ifdef CONFIG_COMPAT 6436 6437 static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, 6438 void __user *arg) 6439 { 6440 IOCTL32_Command_struct __user *arg32 = 6441 (IOCTL32_Command_struct __user *) arg; 6442 IOCTL_Command_struct arg64; 6443 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64)); 6444 int err; 6445 u32 cp; 6446 6447 memset(&arg64, 0, sizeof(arg64)); 6448 err = 0; 6449 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 6450 sizeof(arg64.LUN_info)); 6451 err |= copy_from_user(&arg64.Request, &arg32->Request, 6452 sizeof(arg64.Request)); 6453 err |= copy_from_user(&arg64.error_info, &arg32->error_info, 6454 sizeof(arg64.error_info)); 6455 err |= get_user(arg64.buf_size, &arg32->buf_size); 6456 err |= get_user(cp, &arg32->buf); 6457 arg64.buf = compat_ptr(cp); 6458 err |= copy_to_user(p, &arg64, sizeof(arg64)); 6459 6460 if (err) 6461 return -EFAULT; 6462 6463 err = hpsa_ioctl(dev, CCISS_PASSTHRU, p); 6464 if (err) 6465 return err; 6466 err |= copy_in_user(&arg32->error_info, &p->error_info, 6467 sizeof(arg32->error_info)); 6468 if (err) 6469 return -EFAULT; 6470 return err; 6471 } 6472 6473 static int hpsa_ioctl32_big_passthru(struct scsi_device *dev, 6474 int cmd, void __user *arg) 6475 { 6476 BIG_IOCTL32_Command_struct __user *arg32 = 6477 (BIG_IOCTL32_Command_struct __user *) arg; 6478 BIG_IOCTL_Command_struct arg64; 6479 BIG_IOCTL_Command_struct __user *p = 6480 compat_alloc_user_space(sizeof(arg64)); 6481 int err; 6482 u32 cp; 6483 6484 memset(&arg64, 0, sizeof(arg64)); 6485 err = 0; 6486 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 6487 sizeof(arg64.LUN_info)); 6488 err |= copy_from_user(&arg64.Request, &arg32->Request, 6489 sizeof(arg64.Request)); 6490 err |= copy_from_user(&arg64.error_info, &arg32->error_info, 6491 sizeof(arg64.error_info)); 6492 err |= get_user(arg64.buf_size, &arg32->buf_size); 6493 err |= get_user(arg64.malloc_size, &arg32->malloc_size); 6494 err |= get_user(cp, &arg32->buf); 6495 arg64.buf = compat_ptr(cp); 6496 err |= copy_to_user(p, &arg64, sizeof(arg64)); 6497 6498 if (err) 6499 return -EFAULT; 6500 6501 err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, p); 6502 if (err) 6503 return err; 6504 err |= copy_in_user(&arg32->error_info, &p->error_info, 6505 sizeof(arg32->error_info)); 6506 if (err) 6507 return -EFAULT; 6508 return err; 6509 } 6510 6511 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void __user *arg) 6512 { 6513 switch (cmd) { 6514 case CCISS_GETPCIINFO: 6515 case CCISS_GETINTINFO: 6516 case CCISS_SETINTINFO: 6517 case CCISS_GETNODENAME: 6518 case CCISS_SETNODENAME: 6519 case CCISS_GETHEARTBEAT: 6520 case CCISS_GETBUSTYPES: 6521 case CCISS_GETFIRMVER: 6522 case CCISS_GETDRIVVER: 6523 case CCISS_REVALIDVOLS: 6524 case CCISS_DEREGDISK: 6525 case CCISS_REGNEWDISK: 6526 case CCISS_REGNEWD: 6527 case CCISS_RESCANDISK: 6528 case CCISS_GETLUNINFO: 6529 return hpsa_ioctl(dev, cmd, arg); 6530 6531 case CCISS_PASSTHRU32: 6532 return hpsa_ioctl32_passthru(dev, cmd, arg); 6533 case CCISS_BIG_PASSTHRU32: 6534 return hpsa_ioctl32_big_passthru(dev, cmd, arg); 6535 6536 default: 6537 return -ENOIOCTLCMD; 6538 } 6539 } 6540 #endif 6541 6542 static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp) 6543 { 6544 struct hpsa_pci_info pciinfo; 6545 6546 if (!argp) 6547 return -EINVAL; 6548 pciinfo.domain = pci_domain_nr(h->pdev->bus); 6549 pciinfo.bus = h->pdev->bus->number; 6550 pciinfo.dev_fn = h->pdev->devfn; 6551 pciinfo.board_id = h->board_id; 6552 if (copy_to_user(argp, &pciinfo, sizeof(pciinfo))) 6553 return -EFAULT; 6554 return 0; 6555 } 6556 6557 static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp) 6558 { 6559 DriverVer_type DriverVer; 6560 unsigned char vmaj, vmin, vsubmin; 6561 int rc; 6562 6563 rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu", 6564 &vmaj, &vmin, &vsubmin); 6565 if (rc != 3) { 6566 dev_info(&h->pdev->dev, "driver version string '%s' " 6567 "unrecognized.", HPSA_DRIVER_VERSION); 6568 vmaj = 0; 6569 vmin = 0; 6570 vsubmin = 0; 6571 } 6572 DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin; 6573 if (!argp) 6574 return -EINVAL; 6575 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type))) 6576 return -EFAULT; 6577 return 0; 6578 } 6579 6580 static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp) 6581 { 6582 IOCTL_Command_struct iocommand; 6583 struct CommandList *c; 6584 char *buff = NULL; 6585 u64 temp64; 6586 int rc = 0; 6587 6588 if (!argp) 6589 return -EINVAL; 6590 if (!capable(CAP_SYS_RAWIO)) 6591 return -EPERM; 6592 if (copy_from_user(&iocommand, argp, sizeof(iocommand))) 6593 return -EFAULT; 6594 if ((iocommand.buf_size < 1) && 6595 (iocommand.Request.Type.Direction != XFER_NONE)) { 6596 return -EINVAL; 6597 } 6598 if (iocommand.buf_size > 0) { 6599 buff = kmalloc(iocommand.buf_size, GFP_KERNEL); 6600 if (buff == NULL) 6601 return -ENOMEM; 6602 if (iocommand.Request.Type.Direction & XFER_WRITE) { 6603 /* Copy the data into the buffer we created */ 6604 if (copy_from_user(buff, iocommand.buf, 6605 iocommand.buf_size)) { 6606 rc = -EFAULT; 6607 goto out_kfree; 6608 } 6609 } else { 6610 memset(buff, 0, iocommand.buf_size); 6611 } 6612 } 6613 c = cmd_alloc(h); 6614 6615 /* Fill in the command type */ 6616 c->cmd_type = CMD_IOCTL_PEND; 6617 c->scsi_cmd = SCSI_CMD_BUSY; 6618 /* Fill in Command Header */ 6619 c->Header.ReplyQueue = 0; /* unused in simple mode */ 6620 if (iocommand.buf_size > 0) { /* buffer to fill */ 6621 c->Header.SGList = 1; 6622 c->Header.SGTotal = cpu_to_le16(1); 6623 } else { /* no buffers to fill */ 6624 c->Header.SGList = 0; 6625 c->Header.SGTotal = cpu_to_le16(0); 6626 } 6627 memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN)); 6628 6629 /* Fill in Request block */ 6630 memcpy(&c->Request, &iocommand.Request, 6631 sizeof(c->Request)); 6632 6633 /* Fill in the scatter gather information */ 6634 if (iocommand.buf_size > 0) { 6635 temp64 = pci_map_single(h->pdev, buff, 6636 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL); 6637 if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) { 6638 c->SG[0].Addr = cpu_to_le64(0); 6639 c->SG[0].Len = cpu_to_le32(0); 6640 rc = -ENOMEM; 6641 goto out; 6642 } 6643 c->SG[0].Addr = cpu_to_le64(temp64); 6644 c->SG[0].Len = cpu_to_le32(iocommand.buf_size); 6645 c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */ 6646 } 6647 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 6648 NO_TIMEOUT); 6649 if (iocommand.buf_size > 0) 6650 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL); 6651 check_ioctl_unit_attention(h, c); 6652 if (rc) { 6653 rc = -EIO; 6654 goto out; 6655 } 6656 6657 /* Copy the error information out */ 6658 memcpy(&iocommand.error_info, c->err_info, 6659 sizeof(iocommand.error_info)); 6660 if (copy_to_user(argp, &iocommand, sizeof(iocommand))) { 6661 rc = -EFAULT; 6662 goto out; 6663 } 6664 if ((iocommand.Request.Type.Direction & XFER_READ) && 6665 iocommand.buf_size > 0) { 6666 /* Copy the data out of the buffer we created */ 6667 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) { 6668 rc = -EFAULT; 6669 goto out; 6670 } 6671 } 6672 out: 6673 cmd_free(h, c); 6674 out_kfree: 6675 kfree(buff); 6676 return rc; 6677 } 6678 6679 static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp) 6680 { 6681 BIG_IOCTL_Command_struct *ioc; 6682 struct CommandList *c; 6683 unsigned char **buff = NULL; 6684 int *buff_size = NULL; 6685 u64 temp64; 6686 BYTE sg_used = 0; 6687 int status = 0; 6688 u32 left; 6689 u32 sz; 6690 BYTE __user *data_ptr; 6691 6692 if (!argp) 6693 return -EINVAL; 6694 if (!capable(CAP_SYS_RAWIO)) 6695 return -EPERM; 6696 ioc = kmalloc(sizeof(*ioc), GFP_KERNEL); 6697 if (!ioc) { 6698 status = -ENOMEM; 6699 goto cleanup1; 6700 } 6701 if (copy_from_user(ioc, argp, sizeof(*ioc))) { 6702 status = -EFAULT; 6703 goto cleanup1; 6704 } 6705 if ((ioc->buf_size < 1) && 6706 (ioc->Request.Type.Direction != XFER_NONE)) { 6707 status = -EINVAL; 6708 goto cleanup1; 6709 } 6710 /* Check kmalloc limits using all SGs */ 6711 if (ioc->malloc_size > MAX_KMALLOC_SIZE) { 6712 status = -EINVAL; 6713 goto cleanup1; 6714 } 6715 if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) { 6716 status = -EINVAL; 6717 goto cleanup1; 6718 } 6719 buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL); 6720 if (!buff) { 6721 status = -ENOMEM; 6722 goto cleanup1; 6723 } 6724 buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL); 6725 if (!buff_size) { 6726 status = -ENOMEM; 6727 goto cleanup1; 6728 } 6729 left = ioc->buf_size; 6730 data_ptr = ioc->buf; 6731 while (left) { 6732 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left; 6733 buff_size[sg_used] = sz; 6734 buff[sg_used] = kmalloc(sz, GFP_KERNEL); 6735 if (buff[sg_used] == NULL) { 6736 status = -ENOMEM; 6737 goto cleanup1; 6738 } 6739 if (ioc->Request.Type.Direction & XFER_WRITE) { 6740 if (copy_from_user(buff[sg_used], data_ptr, sz)) { 6741 status = -EFAULT; 6742 goto cleanup1; 6743 } 6744 } else 6745 memset(buff[sg_used], 0, sz); 6746 left -= sz; 6747 data_ptr += sz; 6748 sg_used++; 6749 } 6750 c = cmd_alloc(h); 6751 6752 c->cmd_type = CMD_IOCTL_PEND; 6753 c->scsi_cmd = SCSI_CMD_BUSY; 6754 c->Header.ReplyQueue = 0; 6755 c->Header.SGList = (u8) sg_used; 6756 c->Header.SGTotal = cpu_to_le16(sg_used); 6757 memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN)); 6758 memcpy(&c->Request, &ioc->Request, sizeof(c->Request)); 6759 if (ioc->buf_size > 0) { 6760 int i; 6761 for (i = 0; i < sg_used; i++) { 6762 temp64 = pci_map_single(h->pdev, buff[i], 6763 buff_size[i], PCI_DMA_BIDIRECTIONAL); 6764 if (dma_mapping_error(&h->pdev->dev, 6765 (dma_addr_t) temp64)) { 6766 c->SG[i].Addr = cpu_to_le64(0); 6767 c->SG[i].Len = cpu_to_le32(0); 6768 hpsa_pci_unmap(h->pdev, c, i, 6769 PCI_DMA_BIDIRECTIONAL); 6770 status = -ENOMEM; 6771 goto cleanup0; 6772 } 6773 c->SG[i].Addr = cpu_to_le64(temp64); 6774 c->SG[i].Len = cpu_to_le32(buff_size[i]); 6775 c->SG[i].Ext = cpu_to_le32(0); 6776 } 6777 c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST); 6778 } 6779 status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 6780 NO_TIMEOUT); 6781 if (sg_used) 6782 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL); 6783 check_ioctl_unit_attention(h, c); 6784 if (status) { 6785 status = -EIO; 6786 goto cleanup0; 6787 } 6788 6789 /* Copy the error information out */ 6790 memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info)); 6791 if (copy_to_user(argp, ioc, sizeof(*ioc))) { 6792 status = -EFAULT; 6793 goto cleanup0; 6794 } 6795 if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) { 6796 int i; 6797 6798 /* Copy the data out of the buffer we created */ 6799 BYTE __user *ptr = ioc->buf; 6800 for (i = 0; i < sg_used; i++) { 6801 if (copy_to_user(ptr, buff[i], buff_size[i])) { 6802 status = -EFAULT; 6803 goto cleanup0; 6804 } 6805 ptr += buff_size[i]; 6806 } 6807 } 6808 status = 0; 6809 cleanup0: 6810 cmd_free(h, c); 6811 cleanup1: 6812 if (buff) { 6813 int i; 6814 6815 for (i = 0; i < sg_used; i++) 6816 kfree(buff[i]); 6817 kfree(buff); 6818 } 6819 kfree(buff_size); 6820 kfree(ioc); 6821 return status; 6822 } 6823 6824 static void check_ioctl_unit_attention(struct ctlr_info *h, 6825 struct CommandList *c) 6826 { 6827 if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 6828 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) 6829 (void) check_for_unit_attention(h, c); 6830 } 6831 6832 /* 6833 * ioctl 6834 */ 6835 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg) 6836 { 6837 struct ctlr_info *h; 6838 void __user *argp = (void __user *)arg; 6839 int rc; 6840 6841 h = sdev_to_hba(dev); 6842 6843 switch (cmd) { 6844 case CCISS_DEREGDISK: 6845 case CCISS_REGNEWDISK: 6846 case CCISS_REGNEWD: 6847 hpsa_scan_start(h->scsi_host); 6848 return 0; 6849 case CCISS_GETPCIINFO: 6850 return hpsa_getpciinfo_ioctl(h, argp); 6851 case CCISS_GETDRIVVER: 6852 return hpsa_getdrivver_ioctl(h, argp); 6853 case CCISS_PASSTHRU: 6854 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 6855 return -EAGAIN; 6856 rc = hpsa_passthru_ioctl(h, argp); 6857 atomic_inc(&h->passthru_cmds_avail); 6858 return rc; 6859 case CCISS_BIG_PASSTHRU: 6860 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 6861 return -EAGAIN; 6862 rc = hpsa_big_passthru_ioctl(h, argp); 6863 atomic_inc(&h->passthru_cmds_avail); 6864 return rc; 6865 default: 6866 return -ENOTTY; 6867 } 6868 } 6869 6870 static void hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr, 6871 u8 reset_type) 6872 { 6873 struct CommandList *c; 6874 6875 c = cmd_alloc(h); 6876 6877 /* fill_cmd can't fail here, no data buffer to map */ 6878 (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, 6879 RAID_CTLR_LUNID, TYPE_MSG); 6880 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */ 6881 c->waiting = NULL; 6882 enqueue_cmd_and_start_io(h, c); 6883 /* Don't wait for completion, the reset won't complete. Don't free 6884 * the command either. This is the last command we will send before 6885 * re-initializing everything, so it doesn't matter and won't leak. 6886 */ 6887 return; 6888 } 6889 6890 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 6891 void *buff, size_t size, u16 page_code, unsigned char *scsi3addr, 6892 int cmd_type) 6893 { 6894 int pci_dir = XFER_NONE; 6895 u64 tag; /* for commands to be aborted */ 6896 6897 c->cmd_type = CMD_IOCTL_PEND; 6898 c->scsi_cmd = SCSI_CMD_BUSY; 6899 c->Header.ReplyQueue = 0; 6900 if (buff != NULL && size > 0) { 6901 c->Header.SGList = 1; 6902 c->Header.SGTotal = cpu_to_le16(1); 6903 } else { 6904 c->Header.SGList = 0; 6905 c->Header.SGTotal = cpu_to_le16(0); 6906 } 6907 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8); 6908 6909 if (cmd_type == TYPE_CMD) { 6910 switch (cmd) { 6911 case HPSA_INQUIRY: 6912 /* are we trying to read a vital product page */ 6913 if (page_code & VPD_PAGE) { 6914 c->Request.CDB[1] = 0x01; 6915 c->Request.CDB[2] = (page_code & 0xff); 6916 } 6917 c->Request.CDBLen = 6; 6918 c->Request.type_attr_dir = 6919 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6920 c->Request.Timeout = 0; 6921 c->Request.CDB[0] = HPSA_INQUIRY; 6922 c->Request.CDB[4] = size & 0xFF; 6923 break; 6924 case HPSA_REPORT_LOG: 6925 case HPSA_REPORT_PHYS: 6926 /* Talking to controller so It's a physical command 6927 mode = 00 target = 0. Nothing to write. 6928 */ 6929 c->Request.CDBLen = 12; 6930 c->Request.type_attr_dir = 6931 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6932 c->Request.Timeout = 0; 6933 c->Request.CDB[0] = cmd; 6934 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 6935 c->Request.CDB[7] = (size >> 16) & 0xFF; 6936 c->Request.CDB[8] = (size >> 8) & 0xFF; 6937 c->Request.CDB[9] = size & 0xFF; 6938 break; 6939 case BMIC_SENSE_DIAG_OPTIONS: 6940 c->Request.CDBLen = 16; 6941 c->Request.type_attr_dir = 6942 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6943 c->Request.Timeout = 0; 6944 /* Spec says this should be BMIC_WRITE */ 6945 c->Request.CDB[0] = BMIC_READ; 6946 c->Request.CDB[6] = BMIC_SENSE_DIAG_OPTIONS; 6947 break; 6948 case BMIC_SET_DIAG_OPTIONS: 6949 c->Request.CDBLen = 16; 6950 c->Request.type_attr_dir = 6951 TYPE_ATTR_DIR(cmd_type, 6952 ATTR_SIMPLE, XFER_WRITE); 6953 c->Request.Timeout = 0; 6954 c->Request.CDB[0] = BMIC_WRITE; 6955 c->Request.CDB[6] = BMIC_SET_DIAG_OPTIONS; 6956 break; 6957 case HPSA_CACHE_FLUSH: 6958 c->Request.CDBLen = 12; 6959 c->Request.type_attr_dir = 6960 TYPE_ATTR_DIR(cmd_type, 6961 ATTR_SIMPLE, XFER_WRITE); 6962 c->Request.Timeout = 0; 6963 c->Request.CDB[0] = BMIC_WRITE; 6964 c->Request.CDB[6] = BMIC_CACHE_FLUSH; 6965 c->Request.CDB[7] = (size >> 8) & 0xFF; 6966 c->Request.CDB[8] = size & 0xFF; 6967 break; 6968 case TEST_UNIT_READY: 6969 c->Request.CDBLen = 6; 6970 c->Request.type_attr_dir = 6971 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 6972 c->Request.Timeout = 0; 6973 break; 6974 case HPSA_GET_RAID_MAP: 6975 c->Request.CDBLen = 12; 6976 c->Request.type_attr_dir = 6977 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6978 c->Request.Timeout = 0; 6979 c->Request.CDB[0] = HPSA_CISS_READ; 6980 c->Request.CDB[1] = cmd; 6981 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 6982 c->Request.CDB[7] = (size >> 16) & 0xFF; 6983 c->Request.CDB[8] = (size >> 8) & 0xFF; 6984 c->Request.CDB[9] = size & 0xFF; 6985 break; 6986 case BMIC_SENSE_CONTROLLER_PARAMETERS: 6987 c->Request.CDBLen = 10; 6988 c->Request.type_attr_dir = 6989 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6990 c->Request.Timeout = 0; 6991 c->Request.CDB[0] = BMIC_READ; 6992 c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS; 6993 c->Request.CDB[7] = (size >> 16) & 0xFF; 6994 c->Request.CDB[8] = (size >> 8) & 0xFF; 6995 break; 6996 case BMIC_IDENTIFY_PHYSICAL_DEVICE: 6997 c->Request.CDBLen = 10; 6998 c->Request.type_attr_dir = 6999 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 7000 c->Request.Timeout = 0; 7001 c->Request.CDB[0] = BMIC_READ; 7002 c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE; 7003 c->Request.CDB[7] = (size >> 16) & 0xFF; 7004 c->Request.CDB[8] = (size >> 8) & 0XFF; 7005 break; 7006 case BMIC_SENSE_SUBSYSTEM_INFORMATION: 7007 c->Request.CDBLen = 10; 7008 c->Request.type_attr_dir = 7009 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 7010 c->Request.Timeout = 0; 7011 c->Request.CDB[0] = BMIC_READ; 7012 c->Request.CDB[6] = BMIC_SENSE_SUBSYSTEM_INFORMATION; 7013 c->Request.CDB[7] = (size >> 16) & 0xFF; 7014 c->Request.CDB[8] = (size >> 8) & 0XFF; 7015 break; 7016 case BMIC_SENSE_STORAGE_BOX_PARAMS: 7017 c->Request.CDBLen = 10; 7018 c->Request.type_attr_dir = 7019 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 7020 c->Request.Timeout = 0; 7021 c->Request.CDB[0] = BMIC_READ; 7022 c->Request.CDB[6] = BMIC_SENSE_STORAGE_BOX_PARAMS; 7023 c->Request.CDB[7] = (size >> 16) & 0xFF; 7024 c->Request.CDB[8] = (size >> 8) & 0XFF; 7025 break; 7026 case BMIC_IDENTIFY_CONTROLLER: 7027 c->Request.CDBLen = 10; 7028 c->Request.type_attr_dir = 7029 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 7030 c->Request.Timeout = 0; 7031 c->Request.CDB[0] = BMIC_READ; 7032 c->Request.CDB[1] = 0; 7033 c->Request.CDB[2] = 0; 7034 c->Request.CDB[3] = 0; 7035 c->Request.CDB[4] = 0; 7036 c->Request.CDB[5] = 0; 7037 c->Request.CDB[6] = BMIC_IDENTIFY_CONTROLLER; 7038 c->Request.CDB[7] = (size >> 16) & 0xFF; 7039 c->Request.CDB[8] = (size >> 8) & 0XFF; 7040 c->Request.CDB[9] = 0; 7041 break; 7042 default: 7043 dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd); 7044 BUG(); 7045 return -1; 7046 } 7047 } else if (cmd_type == TYPE_MSG) { 7048 switch (cmd) { 7049 7050 case HPSA_PHYS_TARGET_RESET: 7051 c->Request.CDBLen = 16; 7052 c->Request.type_attr_dir = 7053 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 7054 c->Request.Timeout = 0; /* Don't time out */ 7055 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 7056 c->Request.CDB[0] = HPSA_RESET; 7057 c->Request.CDB[1] = HPSA_TARGET_RESET_TYPE; 7058 /* Physical target reset needs no control bytes 4-7*/ 7059 c->Request.CDB[4] = 0x00; 7060 c->Request.CDB[5] = 0x00; 7061 c->Request.CDB[6] = 0x00; 7062 c->Request.CDB[7] = 0x00; 7063 break; 7064 case HPSA_DEVICE_RESET_MSG: 7065 c->Request.CDBLen = 16; 7066 c->Request.type_attr_dir = 7067 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 7068 c->Request.Timeout = 0; /* Don't time out */ 7069 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 7070 c->Request.CDB[0] = cmd; 7071 c->Request.CDB[1] = HPSA_RESET_TYPE_LUN; 7072 /* If bytes 4-7 are zero, it means reset the */ 7073 /* LunID device */ 7074 c->Request.CDB[4] = 0x00; 7075 c->Request.CDB[5] = 0x00; 7076 c->Request.CDB[6] = 0x00; 7077 c->Request.CDB[7] = 0x00; 7078 break; 7079 case HPSA_ABORT_MSG: 7080 memcpy(&tag, buff, sizeof(tag)); 7081 dev_dbg(&h->pdev->dev, 7082 "Abort Tag:0x%016llx using rqst Tag:0x%016llx", 7083 tag, c->Header.tag); 7084 c->Request.CDBLen = 16; 7085 c->Request.type_attr_dir = 7086 TYPE_ATTR_DIR(cmd_type, 7087 ATTR_SIMPLE, XFER_WRITE); 7088 c->Request.Timeout = 0; /* Don't time out */ 7089 c->Request.CDB[0] = HPSA_TASK_MANAGEMENT; 7090 c->Request.CDB[1] = HPSA_TMF_ABORT_TASK; 7091 c->Request.CDB[2] = 0x00; /* reserved */ 7092 c->Request.CDB[3] = 0x00; /* reserved */ 7093 /* Tag to abort goes in CDB[4]-CDB[11] */ 7094 memcpy(&c->Request.CDB[4], &tag, sizeof(tag)); 7095 c->Request.CDB[12] = 0x00; /* reserved */ 7096 c->Request.CDB[13] = 0x00; /* reserved */ 7097 c->Request.CDB[14] = 0x00; /* reserved */ 7098 c->Request.CDB[15] = 0x00; /* reserved */ 7099 break; 7100 default: 7101 dev_warn(&h->pdev->dev, "unknown message type %d\n", 7102 cmd); 7103 BUG(); 7104 } 7105 } else { 7106 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type); 7107 BUG(); 7108 } 7109 7110 switch (GET_DIR(c->Request.type_attr_dir)) { 7111 case XFER_READ: 7112 pci_dir = PCI_DMA_FROMDEVICE; 7113 break; 7114 case XFER_WRITE: 7115 pci_dir = PCI_DMA_TODEVICE; 7116 break; 7117 case XFER_NONE: 7118 pci_dir = PCI_DMA_NONE; 7119 break; 7120 default: 7121 pci_dir = PCI_DMA_BIDIRECTIONAL; 7122 } 7123 if (hpsa_map_one(h->pdev, c, buff, size, pci_dir)) 7124 return -1; 7125 return 0; 7126 } 7127 7128 /* 7129 * Map (physical) PCI mem into (virtual) kernel space 7130 */ 7131 static void __iomem *remap_pci_mem(ulong base, ulong size) 7132 { 7133 ulong page_base = ((ulong) base) & PAGE_MASK; 7134 ulong page_offs = ((ulong) base) - page_base; 7135 void __iomem *page_remapped = ioremap_nocache(page_base, 7136 page_offs + size); 7137 7138 return page_remapped ? (page_remapped + page_offs) : NULL; 7139 } 7140 7141 static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q) 7142 { 7143 return h->access.command_completed(h, q); 7144 } 7145 7146 static inline bool interrupt_pending(struct ctlr_info *h) 7147 { 7148 return h->access.intr_pending(h); 7149 } 7150 7151 static inline long interrupt_not_for_us(struct ctlr_info *h) 7152 { 7153 return (h->access.intr_pending(h) == 0) || 7154 (h->interrupts_enabled == 0); 7155 } 7156 7157 static inline int bad_tag(struct ctlr_info *h, u32 tag_index, 7158 u32 raw_tag) 7159 { 7160 if (unlikely(tag_index >= h->nr_cmds)) { 7161 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag); 7162 return 1; 7163 } 7164 return 0; 7165 } 7166 7167 static inline void finish_cmd(struct CommandList *c) 7168 { 7169 dial_up_lockup_detection_on_fw_flash_complete(c->h, c); 7170 if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI 7171 || c->cmd_type == CMD_IOACCEL2)) 7172 complete_scsi_command(c); 7173 else if (c->cmd_type == CMD_IOCTL_PEND || c->cmd_type == IOACCEL2_TMF) 7174 complete(c->waiting); 7175 } 7176 7177 /* process completion of an indexed ("direct lookup") command */ 7178 static inline void process_indexed_cmd(struct ctlr_info *h, 7179 u32 raw_tag) 7180 { 7181 u32 tag_index; 7182 struct CommandList *c; 7183 7184 tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT; 7185 if (!bad_tag(h, tag_index, raw_tag)) { 7186 c = h->cmd_pool + tag_index; 7187 finish_cmd(c); 7188 } 7189 } 7190 7191 /* Some controllers, like p400, will give us one interrupt 7192 * after a soft reset, even if we turned interrupts off. 7193 * Only need to check for this in the hpsa_xxx_discard_completions 7194 * functions. 7195 */ 7196 static int ignore_bogus_interrupt(struct ctlr_info *h) 7197 { 7198 if (likely(!reset_devices)) 7199 return 0; 7200 7201 if (likely(h->interrupts_enabled)) 7202 return 0; 7203 7204 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled " 7205 "(known firmware bug.) Ignoring.\n"); 7206 7207 return 1; 7208 } 7209 7210 /* 7211 * Convert &h->q[x] (passed to interrupt handlers) back to h. 7212 * Relies on (h-q[x] == x) being true for x such that 7213 * 0 <= x < MAX_REPLY_QUEUES. 7214 */ 7215 static struct ctlr_info *queue_to_hba(u8 *queue) 7216 { 7217 return container_of((queue - *queue), struct ctlr_info, q[0]); 7218 } 7219 7220 static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue) 7221 { 7222 struct ctlr_info *h = queue_to_hba(queue); 7223 u8 q = *(u8 *) queue; 7224 u32 raw_tag; 7225 7226 if (ignore_bogus_interrupt(h)) 7227 return IRQ_NONE; 7228 7229 if (interrupt_not_for_us(h)) 7230 return IRQ_NONE; 7231 h->last_intr_timestamp = get_jiffies_64(); 7232 while (interrupt_pending(h)) { 7233 raw_tag = get_next_completion(h, q); 7234 while (raw_tag != FIFO_EMPTY) 7235 raw_tag = next_command(h, q); 7236 } 7237 return IRQ_HANDLED; 7238 } 7239 7240 static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue) 7241 { 7242 struct ctlr_info *h = queue_to_hba(queue); 7243 u32 raw_tag; 7244 u8 q = *(u8 *) queue; 7245 7246 if (ignore_bogus_interrupt(h)) 7247 return IRQ_NONE; 7248 7249 h->last_intr_timestamp = get_jiffies_64(); 7250 raw_tag = get_next_completion(h, q); 7251 while (raw_tag != FIFO_EMPTY) 7252 raw_tag = next_command(h, q); 7253 return IRQ_HANDLED; 7254 } 7255 7256 static irqreturn_t do_hpsa_intr_intx(int irq, void *queue) 7257 { 7258 struct ctlr_info *h = queue_to_hba((u8 *) queue); 7259 u32 raw_tag; 7260 u8 q = *(u8 *) queue; 7261 7262 if (interrupt_not_for_us(h)) 7263 return IRQ_NONE; 7264 h->last_intr_timestamp = get_jiffies_64(); 7265 while (interrupt_pending(h)) { 7266 raw_tag = get_next_completion(h, q); 7267 while (raw_tag != FIFO_EMPTY) { 7268 process_indexed_cmd(h, raw_tag); 7269 raw_tag = next_command(h, q); 7270 } 7271 } 7272 return IRQ_HANDLED; 7273 } 7274 7275 static irqreturn_t do_hpsa_intr_msi(int irq, void *queue) 7276 { 7277 struct ctlr_info *h = queue_to_hba(queue); 7278 u32 raw_tag; 7279 u8 q = *(u8 *) queue; 7280 7281 h->last_intr_timestamp = get_jiffies_64(); 7282 raw_tag = get_next_completion(h, q); 7283 while (raw_tag != FIFO_EMPTY) { 7284 process_indexed_cmd(h, raw_tag); 7285 raw_tag = next_command(h, q); 7286 } 7287 return IRQ_HANDLED; 7288 } 7289 7290 /* Send a message CDB to the firmware. Careful, this only works 7291 * in simple mode, not performant mode due to the tag lookup. 7292 * We only ever use this immediately after a controller reset. 7293 */ 7294 static int hpsa_message(struct pci_dev *pdev, unsigned char opcode, 7295 unsigned char type) 7296 { 7297 struct Command { 7298 struct CommandListHeader CommandHeader; 7299 struct RequestBlock Request; 7300 struct ErrDescriptor ErrorDescriptor; 7301 }; 7302 struct Command *cmd; 7303 static const size_t cmd_sz = sizeof(*cmd) + 7304 sizeof(cmd->ErrorDescriptor); 7305 dma_addr_t paddr64; 7306 __le32 paddr32; 7307 u32 tag; 7308 void __iomem *vaddr; 7309 int i, err; 7310 7311 vaddr = pci_ioremap_bar(pdev, 0); 7312 if (vaddr == NULL) 7313 return -ENOMEM; 7314 7315 /* The Inbound Post Queue only accepts 32-bit physical addresses for the 7316 * CCISS commands, so they must be allocated from the lower 4GiB of 7317 * memory. 7318 */ 7319 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 7320 if (err) { 7321 iounmap(vaddr); 7322 return err; 7323 } 7324 7325 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64); 7326 if (cmd == NULL) { 7327 iounmap(vaddr); 7328 return -ENOMEM; 7329 } 7330 7331 /* This must fit, because of the 32-bit consistent DMA mask. Also, 7332 * although there's no guarantee, we assume that the address is at 7333 * least 4-byte aligned (most likely, it's page-aligned). 7334 */ 7335 paddr32 = cpu_to_le32(paddr64); 7336 7337 cmd->CommandHeader.ReplyQueue = 0; 7338 cmd->CommandHeader.SGList = 0; 7339 cmd->CommandHeader.SGTotal = cpu_to_le16(0); 7340 cmd->CommandHeader.tag = cpu_to_le64(paddr64); 7341 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8); 7342 7343 cmd->Request.CDBLen = 16; 7344 cmd->Request.type_attr_dir = 7345 TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE); 7346 cmd->Request.Timeout = 0; /* Don't time out */ 7347 cmd->Request.CDB[0] = opcode; 7348 cmd->Request.CDB[1] = type; 7349 memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */ 7350 cmd->ErrorDescriptor.Addr = 7351 cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd))); 7352 cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo)); 7353 7354 writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET); 7355 7356 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) { 7357 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET); 7358 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64) 7359 break; 7360 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS); 7361 } 7362 7363 iounmap(vaddr); 7364 7365 /* we leak the DMA buffer here ... no choice since the controller could 7366 * still complete the command. 7367 */ 7368 if (i == HPSA_MSG_SEND_RETRY_LIMIT) { 7369 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n", 7370 opcode, type); 7371 return -ETIMEDOUT; 7372 } 7373 7374 pci_free_consistent(pdev, cmd_sz, cmd, paddr64); 7375 7376 if (tag & HPSA_ERROR_BIT) { 7377 dev_err(&pdev->dev, "controller message %02x:%02x failed\n", 7378 opcode, type); 7379 return -EIO; 7380 } 7381 7382 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n", 7383 opcode, type); 7384 return 0; 7385 } 7386 7387 #define hpsa_noop(p) hpsa_message(p, 3, 0) 7388 7389 static int hpsa_controller_hard_reset(struct pci_dev *pdev, 7390 void __iomem *vaddr, u32 use_doorbell) 7391 { 7392 7393 if (use_doorbell) { 7394 /* For everything after the P600, the PCI power state method 7395 * of resetting the controller doesn't work, so we have this 7396 * other way using the doorbell register. 7397 */ 7398 dev_info(&pdev->dev, "using doorbell to reset controller\n"); 7399 writel(use_doorbell, vaddr + SA5_DOORBELL); 7400 7401 /* PMC hardware guys tell us we need a 10 second delay after 7402 * doorbell reset and before any attempt to talk to the board 7403 * at all to ensure that this actually works and doesn't fall 7404 * over in some weird corner cases. 7405 */ 7406 msleep(10000); 7407 } else { /* Try to do it the PCI power state way */ 7408 7409 /* Quoting from the Open CISS Specification: "The Power 7410 * Management Control/Status Register (CSR) controls the power 7411 * state of the device. The normal operating state is D0, 7412 * CSR=00h. The software off state is D3, CSR=03h. To reset 7413 * the controller, place the interface device in D3 then to D0, 7414 * this causes a secondary PCI reset which will reset the 7415 * controller." */ 7416 7417 int rc = 0; 7418 7419 dev_info(&pdev->dev, "using PCI PM to reset controller\n"); 7420 7421 /* enter the D3hot power management state */ 7422 rc = pci_set_power_state(pdev, PCI_D3hot); 7423 if (rc) 7424 return rc; 7425 7426 msleep(500); 7427 7428 /* enter the D0 power management state */ 7429 rc = pci_set_power_state(pdev, PCI_D0); 7430 if (rc) 7431 return rc; 7432 7433 /* 7434 * The P600 requires a small delay when changing states. 7435 * Otherwise we may think the board did not reset and we bail. 7436 * This for kdump only and is particular to the P600. 7437 */ 7438 msleep(500); 7439 } 7440 return 0; 7441 } 7442 7443 static void init_driver_version(char *driver_version, int len) 7444 { 7445 memset(driver_version, 0, len); 7446 strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1); 7447 } 7448 7449 static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable) 7450 { 7451 char *driver_version; 7452 int i, size = sizeof(cfgtable->driver_version); 7453 7454 driver_version = kmalloc(size, GFP_KERNEL); 7455 if (!driver_version) 7456 return -ENOMEM; 7457 7458 init_driver_version(driver_version, size); 7459 for (i = 0; i < size; i++) 7460 writeb(driver_version[i], &cfgtable->driver_version[i]); 7461 kfree(driver_version); 7462 return 0; 7463 } 7464 7465 static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable, 7466 unsigned char *driver_ver) 7467 { 7468 int i; 7469 7470 for (i = 0; i < sizeof(cfgtable->driver_version); i++) 7471 driver_ver[i] = readb(&cfgtable->driver_version[i]); 7472 } 7473 7474 static int controller_reset_failed(struct CfgTable __iomem *cfgtable) 7475 { 7476 7477 char *driver_ver, *old_driver_ver; 7478 int rc, size = sizeof(cfgtable->driver_version); 7479 7480 old_driver_ver = kmalloc(2 * size, GFP_KERNEL); 7481 if (!old_driver_ver) 7482 return -ENOMEM; 7483 driver_ver = old_driver_ver + size; 7484 7485 /* After a reset, the 32 bytes of "driver version" in the cfgtable 7486 * should have been changed, otherwise we know the reset failed. 7487 */ 7488 init_driver_version(old_driver_ver, size); 7489 read_driver_ver_from_cfgtable(cfgtable, driver_ver); 7490 rc = !memcmp(driver_ver, old_driver_ver, size); 7491 kfree(old_driver_ver); 7492 return rc; 7493 } 7494 /* This does a hard reset of the controller using PCI power management 7495 * states or the using the doorbell register. 7496 */ 7497 static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id) 7498 { 7499 u64 cfg_offset; 7500 u32 cfg_base_addr; 7501 u64 cfg_base_addr_index; 7502 void __iomem *vaddr; 7503 unsigned long paddr; 7504 u32 misc_fw_support; 7505 int rc; 7506 struct CfgTable __iomem *cfgtable; 7507 u32 use_doorbell; 7508 u16 command_register; 7509 7510 /* For controllers as old as the P600, this is very nearly 7511 * the same thing as 7512 * 7513 * pci_save_state(pci_dev); 7514 * pci_set_power_state(pci_dev, PCI_D3hot); 7515 * pci_set_power_state(pci_dev, PCI_D0); 7516 * pci_restore_state(pci_dev); 7517 * 7518 * For controllers newer than the P600, the pci power state 7519 * method of resetting doesn't work so we have another way 7520 * using the doorbell register. 7521 */ 7522 7523 if (!ctlr_is_resettable(board_id)) { 7524 dev_warn(&pdev->dev, "Controller not resettable\n"); 7525 return -ENODEV; 7526 } 7527 7528 /* if controller is soft- but not hard resettable... */ 7529 if (!ctlr_is_hard_resettable(board_id)) 7530 return -ENOTSUPP; /* try soft reset later. */ 7531 7532 /* Save the PCI command register */ 7533 pci_read_config_word(pdev, 4, &command_register); 7534 pci_save_state(pdev); 7535 7536 /* find the first memory BAR, so we can find the cfg table */ 7537 rc = hpsa_pci_find_memory_BAR(pdev, &paddr); 7538 if (rc) 7539 return rc; 7540 vaddr = remap_pci_mem(paddr, 0x250); 7541 if (!vaddr) 7542 return -ENOMEM; 7543 7544 /* find cfgtable in order to check if reset via doorbell is supported */ 7545 rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr, 7546 &cfg_base_addr_index, &cfg_offset); 7547 if (rc) 7548 goto unmap_vaddr; 7549 cfgtable = remap_pci_mem(pci_resource_start(pdev, 7550 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable)); 7551 if (!cfgtable) { 7552 rc = -ENOMEM; 7553 goto unmap_vaddr; 7554 } 7555 rc = write_driver_ver_to_cfgtable(cfgtable); 7556 if (rc) 7557 goto unmap_cfgtable; 7558 7559 /* If reset via doorbell register is supported, use that. 7560 * There are two such methods. Favor the newest method. 7561 */ 7562 misc_fw_support = readl(&cfgtable->misc_fw_support); 7563 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2; 7564 if (use_doorbell) { 7565 use_doorbell = DOORBELL_CTLR_RESET2; 7566 } else { 7567 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET; 7568 if (use_doorbell) { 7569 dev_warn(&pdev->dev, 7570 "Soft reset not supported. Firmware update is required.\n"); 7571 rc = -ENOTSUPP; /* try soft reset */ 7572 goto unmap_cfgtable; 7573 } 7574 } 7575 7576 rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell); 7577 if (rc) 7578 goto unmap_cfgtable; 7579 7580 pci_restore_state(pdev); 7581 pci_write_config_word(pdev, 4, command_register); 7582 7583 /* Some devices (notably the HP Smart Array 5i Controller) 7584 need a little pause here */ 7585 msleep(HPSA_POST_RESET_PAUSE_MSECS); 7586 7587 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY); 7588 if (rc) { 7589 dev_warn(&pdev->dev, 7590 "Failed waiting for board to become ready after hard reset\n"); 7591 goto unmap_cfgtable; 7592 } 7593 7594 rc = controller_reset_failed(vaddr); 7595 if (rc < 0) 7596 goto unmap_cfgtable; 7597 if (rc) { 7598 dev_warn(&pdev->dev, "Unable to successfully reset " 7599 "controller. Will try soft reset.\n"); 7600 rc = -ENOTSUPP; 7601 } else { 7602 dev_info(&pdev->dev, "board ready after hard reset.\n"); 7603 } 7604 7605 unmap_cfgtable: 7606 iounmap(cfgtable); 7607 7608 unmap_vaddr: 7609 iounmap(vaddr); 7610 return rc; 7611 } 7612 7613 /* 7614 * We cannot read the structure directly, for portability we must use 7615 * the io functions. 7616 * This is for debug only. 7617 */ 7618 static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb) 7619 { 7620 #ifdef HPSA_DEBUG 7621 int i; 7622 char temp_name[17]; 7623 7624 dev_info(dev, "Controller Configuration information\n"); 7625 dev_info(dev, "------------------------------------\n"); 7626 for (i = 0; i < 4; i++) 7627 temp_name[i] = readb(&(tb->Signature[i])); 7628 temp_name[4] = '\0'; 7629 dev_info(dev, " Signature = %s\n", temp_name); 7630 dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence))); 7631 dev_info(dev, " Transport methods supported = 0x%x\n", 7632 readl(&(tb->TransportSupport))); 7633 dev_info(dev, " Transport methods active = 0x%x\n", 7634 readl(&(tb->TransportActive))); 7635 dev_info(dev, " Requested transport Method = 0x%x\n", 7636 readl(&(tb->HostWrite.TransportRequest))); 7637 dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n", 7638 readl(&(tb->HostWrite.CoalIntDelay))); 7639 dev_info(dev, " Coalesce Interrupt Count = 0x%x\n", 7640 readl(&(tb->HostWrite.CoalIntCount))); 7641 dev_info(dev, " Max outstanding commands = %d\n", 7642 readl(&(tb->CmdsOutMax))); 7643 dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes))); 7644 for (i = 0; i < 16; i++) 7645 temp_name[i] = readb(&(tb->ServerName[i])); 7646 temp_name[16] = '\0'; 7647 dev_info(dev, " Server Name = %s\n", temp_name); 7648 dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n", 7649 readl(&(tb->HeartBeat))); 7650 #endif /* HPSA_DEBUG */ 7651 } 7652 7653 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr) 7654 { 7655 int i, offset, mem_type, bar_type; 7656 7657 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */ 7658 return 0; 7659 offset = 0; 7660 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { 7661 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE; 7662 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO) 7663 offset += 4; 7664 else { 7665 mem_type = pci_resource_flags(pdev, i) & 7666 PCI_BASE_ADDRESS_MEM_TYPE_MASK; 7667 switch (mem_type) { 7668 case PCI_BASE_ADDRESS_MEM_TYPE_32: 7669 case PCI_BASE_ADDRESS_MEM_TYPE_1M: 7670 offset += 4; /* 32 bit */ 7671 break; 7672 case PCI_BASE_ADDRESS_MEM_TYPE_64: 7673 offset += 8; 7674 break; 7675 default: /* reserved in PCI 2.2 */ 7676 dev_warn(&pdev->dev, 7677 "base address is invalid\n"); 7678 return -1; 7679 break; 7680 } 7681 } 7682 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0) 7683 return i + 1; 7684 } 7685 return -1; 7686 } 7687 7688 static void hpsa_disable_interrupt_mode(struct ctlr_info *h) 7689 { 7690 pci_free_irq_vectors(h->pdev); 7691 h->msix_vectors = 0; 7692 } 7693 7694 /* If MSI/MSI-X is supported by the kernel we will try to enable it on 7695 * controllers that are capable. If not, we use legacy INTx mode. 7696 */ 7697 static int hpsa_interrupt_mode(struct ctlr_info *h) 7698 { 7699 unsigned int flags = PCI_IRQ_LEGACY; 7700 int ret; 7701 7702 /* Some boards advertise MSI but don't really support it */ 7703 switch (h->board_id) { 7704 case 0x40700E11: 7705 case 0x40800E11: 7706 case 0x40820E11: 7707 case 0x40830E11: 7708 break; 7709 default: 7710 ret = pci_alloc_irq_vectors(h->pdev, 1, MAX_REPLY_QUEUES, 7711 PCI_IRQ_MSIX | PCI_IRQ_AFFINITY); 7712 if (ret > 0) { 7713 h->msix_vectors = ret; 7714 return 0; 7715 } 7716 7717 flags |= PCI_IRQ_MSI; 7718 break; 7719 } 7720 7721 ret = pci_alloc_irq_vectors(h->pdev, 1, 1, flags); 7722 if (ret < 0) 7723 return ret; 7724 return 0; 7725 } 7726 7727 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id) 7728 { 7729 int i; 7730 u32 subsystem_vendor_id, subsystem_device_id; 7731 7732 subsystem_vendor_id = pdev->subsystem_vendor; 7733 subsystem_device_id = pdev->subsystem_device; 7734 *board_id = ((subsystem_device_id << 16) & 0xffff0000) | 7735 subsystem_vendor_id; 7736 7737 for (i = 0; i < ARRAY_SIZE(products); i++) 7738 if (*board_id == products[i].board_id) 7739 return i; 7740 7741 if ((subsystem_vendor_id != PCI_VENDOR_ID_HP && 7742 subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) || 7743 !hpsa_allow_any) { 7744 dev_warn(&pdev->dev, "unrecognized board ID: " 7745 "0x%08x, ignoring.\n", *board_id); 7746 return -ENODEV; 7747 } 7748 return ARRAY_SIZE(products) - 1; /* generic unknown smart array */ 7749 } 7750 7751 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 7752 unsigned long *memory_bar) 7753 { 7754 int i; 7755 7756 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) 7757 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) { 7758 /* addressing mode bits already removed */ 7759 *memory_bar = pci_resource_start(pdev, i); 7760 dev_dbg(&pdev->dev, "memory BAR = %lx\n", 7761 *memory_bar); 7762 return 0; 7763 } 7764 dev_warn(&pdev->dev, "no memory BAR found\n"); 7765 return -ENODEV; 7766 } 7767 7768 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 7769 int wait_for_ready) 7770 { 7771 int i, iterations; 7772 u32 scratchpad; 7773 if (wait_for_ready) 7774 iterations = HPSA_BOARD_READY_ITERATIONS; 7775 else 7776 iterations = HPSA_BOARD_NOT_READY_ITERATIONS; 7777 7778 for (i = 0; i < iterations; i++) { 7779 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET); 7780 if (wait_for_ready) { 7781 if (scratchpad == HPSA_FIRMWARE_READY) 7782 return 0; 7783 } else { 7784 if (scratchpad != HPSA_FIRMWARE_READY) 7785 return 0; 7786 } 7787 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS); 7788 } 7789 dev_warn(&pdev->dev, "board not ready, timed out.\n"); 7790 return -ENODEV; 7791 } 7792 7793 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 7794 u32 *cfg_base_addr, u64 *cfg_base_addr_index, 7795 u64 *cfg_offset) 7796 { 7797 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET); 7798 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET); 7799 *cfg_base_addr &= (u32) 0x0000ffff; 7800 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr); 7801 if (*cfg_base_addr_index == -1) { 7802 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n"); 7803 return -ENODEV; 7804 } 7805 return 0; 7806 } 7807 7808 static void hpsa_free_cfgtables(struct ctlr_info *h) 7809 { 7810 if (h->transtable) { 7811 iounmap(h->transtable); 7812 h->transtable = NULL; 7813 } 7814 if (h->cfgtable) { 7815 iounmap(h->cfgtable); 7816 h->cfgtable = NULL; 7817 } 7818 } 7819 7820 /* Find and map CISS config table and transfer table 7821 + * several items must be unmapped (freed) later 7822 + * */ 7823 static int hpsa_find_cfgtables(struct ctlr_info *h) 7824 { 7825 u64 cfg_offset; 7826 u32 cfg_base_addr; 7827 u64 cfg_base_addr_index; 7828 u32 trans_offset; 7829 int rc; 7830 7831 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 7832 &cfg_base_addr_index, &cfg_offset); 7833 if (rc) 7834 return rc; 7835 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev, 7836 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable)); 7837 if (!h->cfgtable) { 7838 dev_err(&h->pdev->dev, "Failed mapping cfgtable\n"); 7839 return -ENOMEM; 7840 } 7841 rc = write_driver_ver_to_cfgtable(h->cfgtable); 7842 if (rc) 7843 return rc; 7844 /* Find performant mode table. */ 7845 trans_offset = readl(&h->cfgtable->TransMethodOffset); 7846 h->transtable = remap_pci_mem(pci_resource_start(h->pdev, 7847 cfg_base_addr_index)+cfg_offset+trans_offset, 7848 sizeof(*h->transtable)); 7849 if (!h->transtable) { 7850 dev_err(&h->pdev->dev, "Failed mapping transfer table\n"); 7851 hpsa_free_cfgtables(h); 7852 return -ENOMEM; 7853 } 7854 return 0; 7855 } 7856 7857 static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h) 7858 { 7859 #define MIN_MAX_COMMANDS 16 7860 BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS); 7861 7862 h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands); 7863 7864 /* Limit commands in memory limited kdump scenario. */ 7865 if (reset_devices && h->max_commands > 32) 7866 h->max_commands = 32; 7867 7868 if (h->max_commands < MIN_MAX_COMMANDS) { 7869 dev_warn(&h->pdev->dev, 7870 "Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n", 7871 h->max_commands, 7872 MIN_MAX_COMMANDS); 7873 h->max_commands = MIN_MAX_COMMANDS; 7874 } 7875 } 7876 7877 /* If the controller reports that the total max sg entries is greater than 512, 7878 * then we know that chained SG blocks work. (Original smart arrays did not 7879 * support chained SG blocks and would return zero for max sg entries.) 7880 */ 7881 static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h) 7882 { 7883 return h->maxsgentries > 512; 7884 } 7885 7886 /* Interrogate the hardware for some limits: 7887 * max commands, max SG elements without chaining, and with chaining, 7888 * SG chain block size, etc. 7889 */ 7890 static void hpsa_find_board_params(struct ctlr_info *h) 7891 { 7892 hpsa_get_max_perf_mode_cmds(h); 7893 h->nr_cmds = h->max_commands; 7894 h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements)); 7895 h->fw_support = readl(&(h->cfgtable->misc_fw_support)); 7896 if (hpsa_supports_chained_sg_blocks(h)) { 7897 /* Limit in-command s/g elements to 32 save dma'able memory. */ 7898 h->max_cmd_sg_entries = 32; 7899 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries; 7900 h->maxsgentries--; /* save one for chain pointer */ 7901 } else { 7902 /* 7903 * Original smart arrays supported at most 31 s/g entries 7904 * embedded inline in the command (trying to use more 7905 * would lock up the controller) 7906 */ 7907 h->max_cmd_sg_entries = 31; 7908 h->maxsgentries = 31; /* default to traditional values */ 7909 h->chainsize = 0; 7910 } 7911 7912 /* Find out what task management functions are supported and cache */ 7913 h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags)); 7914 if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags)) 7915 dev_warn(&h->pdev->dev, "Physical aborts not supported\n"); 7916 if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags)) 7917 dev_warn(&h->pdev->dev, "Logical aborts not supported\n"); 7918 if (!(HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags)) 7919 dev_warn(&h->pdev->dev, "HP SSD Smart Path aborts not supported\n"); 7920 } 7921 7922 static inline bool hpsa_CISS_signature_present(struct ctlr_info *h) 7923 { 7924 if (!check_signature(h->cfgtable->Signature, "CISS", 4)) { 7925 dev_err(&h->pdev->dev, "not a valid CISS config table\n"); 7926 return false; 7927 } 7928 return true; 7929 } 7930 7931 static inline void hpsa_set_driver_support_bits(struct ctlr_info *h) 7932 { 7933 u32 driver_support; 7934 7935 driver_support = readl(&(h->cfgtable->driver_support)); 7936 /* Need to enable prefetch in the SCSI core for 6400 in x86 */ 7937 #ifdef CONFIG_X86 7938 driver_support |= ENABLE_SCSI_PREFETCH; 7939 #endif 7940 driver_support |= ENABLE_UNIT_ATTN; 7941 writel(driver_support, &(h->cfgtable->driver_support)); 7942 } 7943 7944 /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result 7945 * in a prefetch beyond physical memory. 7946 */ 7947 static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h) 7948 { 7949 u32 dma_prefetch; 7950 7951 if (h->board_id != 0x3225103C) 7952 return; 7953 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG); 7954 dma_prefetch |= 0x8000; 7955 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG); 7956 } 7957 7958 static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h) 7959 { 7960 int i; 7961 u32 doorbell_value; 7962 unsigned long flags; 7963 /* wait until the clear_event_notify bit 6 is cleared by controller. */ 7964 for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) { 7965 spin_lock_irqsave(&h->lock, flags); 7966 doorbell_value = readl(h->vaddr + SA5_DOORBELL); 7967 spin_unlock_irqrestore(&h->lock, flags); 7968 if (!(doorbell_value & DOORBELL_CLEAR_EVENTS)) 7969 goto done; 7970 /* delay and try again */ 7971 msleep(CLEAR_EVENT_WAIT_INTERVAL); 7972 } 7973 return -ENODEV; 7974 done: 7975 return 0; 7976 } 7977 7978 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h) 7979 { 7980 int i; 7981 u32 doorbell_value; 7982 unsigned long flags; 7983 7984 /* under certain very rare conditions, this can take awhile. 7985 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right 7986 * as we enter this code.) 7987 */ 7988 for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) { 7989 if (h->remove_in_progress) 7990 goto done; 7991 spin_lock_irqsave(&h->lock, flags); 7992 doorbell_value = readl(h->vaddr + SA5_DOORBELL); 7993 spin_unlock_irqrestore(&h->lock, flags); 7994 if (!(doorbell_value & CFGTBL_ChangeReq)) 7995 goto done; 7996 /* delay and try again */ 7997 msleep(MODE_CHANGE_WAIT_INTERVAL); 7998 } 7999 return -ENODEV; 8000 done: 8001 return 0; 8002 } 8003 8004 /* return -ENODEV or other reason on error, 0 on success */ 8005 static int hpsa_enter_simple_mode(struct ctlr_info *h) 8006 { 8007 u32 trans_support; 8008 8009 trans_support = readl(&(h->cfgtable->TransportSupport)); 8010 if (!(trans_support & SIMPLE_MODE)) 8011 return -ENOTSUPP; 8012 8013 h->max_commands = readl(&(h->cfgtable->CmdsOutMax)); 8014 8015 /* Update the field, and then ring the doorbell */ 8016 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest)); 8017 writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi); 8018 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 8019 if (hpsa_wait_for_mode_change_ack(h)) 8020 goto error; 8021 print_cfg_table(&h->pdev->dev, h->cfgtable); 8022 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) 8023 goto error; 8024 h->transMethod = CFGTBL_Trans_Simple; 8025 return 0; 8026 error: 8027 dev_err(&h->pdev->dev, "failed to enter simple mode\n"); 8028 return -ENODEV; 8029 } 8030 8031 /* free items allocated or mapped by hpsa_pci_init */ 8032 static void hpsa_free_pci_init(struct ctlr_info *h) 8033 { 8034 hpsa_free_cfgtables(h); /* pci_init 4 */ 8035 iounmap(h->vaddr); /* pci_init 3 */ 8036 h->vaddr = NULL; 8037 hpsa_disable_interrupt_mode(h); /* pci_init 2 */ 8038 /* 8039 * call pci_disable_device before pci_release_regions per 8040 * Documentation/PCI/pci.txt 8041 */ 8042 pci_disable_device(h->pdev); /* pci_init 1 */ 8043 pci_release_regions(h->pdev); /* pci_init 2 */ 8044 } 8045 8046 /* several items must be freed later */ 8047 static int hpsa_pci_init(struct ctlr_info *h) 8048 { 8049 int prod_index, err; 8050 8051 prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id); 8052 if (prod_index < 0) 8053 return prod_index; 8054 h->product_name = products[prod_index].product_name; 8055 h->access = *(products[prod_index].access); 8056 8057 h->needs_abort_tags_swizzled = 8058 ctlr_needs_abort_tags_swizzled(h->board_id); 8059 8060 pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S | 8061 PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM); 8062 8063 err = pci_enable_device(h->pdev); 8064 if (err) { 8065 dev_err(&h->pdev->dev, "failed to enable PCI device\n"); 8066 pci_disable_device(h->pdev); 8067 return err; 8068 } 8069 8070 err = pci_request_regions(h->pdev, HPSA); 8071 if (err) { 8072 dev_err(&h->pdev->dev, 8073 "failed to obtain PCI resources\n"); 8074 pci_disable_device(h->pdev); 8075 return err; 8076 } 8077 8078 pci_set_master(h->pdev); 8079 8080 err = hpsa_interrupt_mode(h); 8081 if (err) 8082 goto clean1; 8083 err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr); 8084 if (err) 8085 goto clean2; /* intmode+region, pci */ 8086 h->vaddr = remap_pci_mem(h->paddr, 0x250); 8087 if (!h->vaddr) { 8088 dev_err(&h->pdev->dev, "failed to remap PCI mem\n"); 8089 err = -ENOMEM; 8090 goto clean2; /* intmode+region, pci */ 8091 } 8092 err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 8093 if (err) 8094 goto clean3; /* vaddr, intmode+region, pci */ 8095 err = hpsa_find_cfgtables(h); 8096 if (err) 8097 goto clean3; /* vaddr, intmode+region, pci */ 8098 hpsa_find_board_params(h); 8099 8100 if (!hpsa_CISS_signature_present(h)) { 8101 err = -ENODEV; 8102 goto clean4; /* cfgtables, vaddr, intmode+region, pci */ 8103 } 8104 hpsa_set_driver_support_bits(h); 8105 hpsa_p600_dma_prefetch_quirk(h); 8106 err = hpsa_enter_simple_mode(h); 8107 if (err) 8108 goto clean4; /* cfgtables, vaddr, intmode+region, pci */ 8109 return 0; 8110 8111 clean4: /* cfgtables, vaddr, intmode+region, pci */ 8112 hpsa_free_cfgtables(h); 8113 clean3: /* vaddr, intmode+region, pci */ 8114 iounmap(h->vaddr); 8115 h->vaddr = NULL; 8116 clean2: /* intmode+region, pci */ 8117 hpsa_disable_interrupt_mode(h); 8118 clean1: 8119 /* 8120 * call pci_disable_device before pci_release_regions per 8121 * Documentation/PCI/pci.txt 8122 */ 8123 pci_disable_device(h->pdev); 8124 pci_release_regions(h->pdev); 8125 return err; 8126 } 8127 8128 static void hpsa_hba_inquiry(struct ctlr_info *h) 8129 { 8130 int rc; 8131 8132 #define HBA_INQUIRY_BYTE_COUNT 64 8133 h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL); 8134 if (!h->hba_inquiry_data) 8135 return; 8136 rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0, 8137 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT); 8138 if (rc != 0) { 8139 kfree(h->hba_inquiry_data); 8140 h->hba_inquiry_data = NULL; 8141 } 8142 } 8143 8144 static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id) 8145 { 8146 int rc, i; 8147 void __iomem *vaddr; 8148 8149 if (!reset_devices) 8150 return 0; 8151 8152 /* kdump kernel is loading, we don't know in which state is 8153 * the pci interface. The dev->enable_cnt is equal zero 8154 * so we call enable+disable, wait a while and switch it on. 8155 */ 8156 rc = pci_enable_device(pdev); 8157 if (rc) { 8158 dev_warn(&pdev->dev, "Failed to enable PCI device\n"); 8159 return -ENODEV; 8160 } 8161 pci_disable_device(pdev); 8162 msleep(260); /* a randomly chosen number */ 8163 rc = pci_enable_device(pdev); 8164 if (rc) { 8165 dev_warn(&pdev->dev, "failed to enable device.\n"); 8166 return -ENODEV; 8167 } 8168 8169 pci_set_master(pdev); 8170 8171 vaddr = pci_ioremap_bar(pdev, 0); 8172 if (vaddr == NULL) { 8173 rc = -ENOMEM; 8174 goto out_disable; 8175 } 8176 writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET); 8177 iounmap(vaddr); 8178 8179 /* Reset the controller with a PCI power-cycle or via doorbell */ 8180 rc = hpsa_kdump_hard_reset_controller(pdev, board_id); 8181 8182 /* -ENOTSUPP here means we cannot reset the controller 8183 * but it's already (and still) up and running in 8184 * "performant mode". Or, it might be 640x, which can't reset 8185 * due to concerns about shared bbwc between 6402/6404 pair. 8186 */ 8187 if (rc) 8188 goto out_disable; 8189 8190 /* Now try to get the controller to respond to a no-op */ 8191 dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n"); 8192 for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) { 8193 if (hpsa_noop(pdev) == 0) 8194 break; 8195 else 8196 dev_warn(&pdev->dev, "no-op failed%s\n", 8197 (i < 11 ? "; re-trying" : "")); 8198 } 8199 8200 out_disable: 8201 8202 pci_disable_device(pdev); 8203 return rc; 8204 } 8205 8206 static void hpsa_free_cmd_pool(struct ctlr_info *h) 8207 { 8208 kfree(h->cmd_pool_bits); 8209 h->cmd_pool_bits = NULL; 8210 if (h->cmd_pool) { 8211 pci_free_consistent(h->pdev, 8212 h->nr_cmds * sizeof(struct CommandList), 8213 h->cmd_pool, 8214 h->cmd_pool_dhandle); 8215 h->cmd_pool = NULL; 8216 h->cmd_pool_dhandle = 0; 8217 } 8218 if (h->errinfo_pool) { 8219 pci_free_consistent(h->pdev, 8220 h->nr_cmds * sizeof(struct ErrorInfo), 8221 h->errinfo_pool, 8222 h->errinfo_pool_dhandle); 8223 h->errinfo_pool = NULL; 8224 h->errinfo_pool_dhandle = 0; 8225 } 8226 } 8227 8228 static int hpsa_alloc_cmd_pool(struct ctlr_info *h) 8229 { 8230 h->cmd_pool_bits = kzalloc( 8231 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) * 8232 sizeof(unsigned long), GFP_KERNEL); 8233 h->cmd_pool = pci_alloc_consistent(h->pdev, 8234 h->nr_cmds * sizeof(*h->cmd_pool), 8235 &(h->cmd_pool_dhandle)); 8236 h->errinfo_pool = pci_alloc_consistent(h->pdev, 8237 h->nr_cmds * sizeof(*h->errinfo_pool), 8238 &(h->errinfo_pool_dhandle)); 8239 if ((h->cmd_pool_bits == NULL) 8240 || (h->cmd_pool == NULL) 8241 || (h->errinfo_pool == NULL)) { 8242 dev_err(&h->pdev->dev, "out of memory in %s", __func__); 8243 goto clean_up; 8244 } 8245 hpsa_preinitialize_commands(h); 8246 return 0; 8247 clean_up: 8248 hpsa_free_cmd_pool(h); 8249 return -ENOMEM; 8250 } 8251 8252 /* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */ 8253 static void hpsa_free_irqs(struct ctlr_info *h) 8254 { 8255 int i; 8256 8257 if (!h->msix_vectors || h->intr_mode != PERF_MODE_INT) { 8258 /* Single reply queue, only one irq to free */ 8259 free_irq(pci_irq_vector(h->pdev, 0), &h->q[h->intr_mode]); 8260 h->q[h->intr_mode] = 0; 8261 return; 8262 } 8263 8264 for (i = 0; i < h->msix_vectors; i++) { 8265 free_irq(pci_irq_vector(h->pdev, i), &h->q[i]); 8266 h->q[i] = 0; 8267 } 8268 for (; i < MAX_REPLY_QUEUES; i++) 8269 h->q[i] = 0; 8270 } 8271 8272 /* returns 0 on success; cleans up and returns -Enn on error */ 8273 static int hpsa_request_irqs(struct ctlr_info *h, 8274 irqreturn_t (*msixhandler)(int, void *), 8275 irqreturn_t (*intxhandler)(int, void *)) 8276 { 8277 int rc, i; 8278 8279 /* 8280 * initialize h->q[x] = x so that interrupt handlers know which 8281 * queue to process. 8282 */ 8283 for (i = 0; i < MAX_REPLY_QUEUES; i++) 8284 h->q[i] = (u8) i; 8285 8286 if (h->intr_mode == PERF_MODE_INT && h->msix_vectors > 0) { 8287 /* If performant mode and MSI-X, use multiple reply queues */ 8288 for (i = 0; i < h->msix_vectors; i++) { 8289 sprintf(h->intrname[i], "%s-msix%d", h->devname, i); 8290 rc = request_irq(pci_irq_vector(h->pdev, i), msixhandler, 8291 0, h->intrname[i], 8292 &h->q[i]); 8293 if (rc) { 8294 int j; 8295 8296 dev_err(&h->pdev->dev, 8297 "failed to get irq %d for %s\n", 8298 pci_irq_vector(h->pdev, i), h->devname); 8299 for (j = 0; j < i; j++) { 8300 free_irq(pci_irq_vector(h->pdev, j), &h->q[j]); 8301 h->q[j] = 0; 8302 } 8303 for (; j < MAX_REPLY_QUEUES; j++) 8304 h->q[j] = 0; 8305 return rc; 8306 } 8307 } 8308 } else { 8309 /* Use single reply pool */ 8310 if (h->msix_vectors > 0 || h->pdev->msi_enabled) { 8311 sprintf(h->intrname[0], "%s-msi%s", h->devname, 8312 h->msix_vectors ? "x" : ""); 8313 rc = request_irq(pci_irq_vector(h->pdev, 0), 8314 msixhandler, 0, 8315 h->intrname[0], 8316 &h->q[h->intr_mode]); 8317 } else { 8318 sprintf(h->intrname[h->intr_mode], 8319 "%s-intx", h->devname); 8320 rc = request_irq(pci_irq_vector(h->pdev, 0), 8321 intxhandler, IRQF_SHARED, 8322 h->intrname[0], 8323 &h->q[h->intr_mode]); 8324 } 8325 } 8326 if (rc) { 8327 dev_err(&h->pdev->dev, "failed to get irq %d for %s\n", 8328 pci_irq_vector(h->pdev, 0), h->devname); 8329 hpsa_free_irqs(h); 8330 return -ENODEV; 8331 } 8332 return 0; 8333 } 8334 8335 static int hpsa_kdump_soft_reset(struct ctlr_info *h) 8336 { 8337 int rc; 8338 hpsa_send_host_reset(h, RAID_CTLR_LUNID, HPSA_RESET_TYPE_CONTROLLER); 8339 8340 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n"); 8341 rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY); 8342 if (rc) { 8343 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n"); 8344 return rc; 8345 } 8346 8347 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n"); 8348 rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 8349 if (rc) { 8350 dev_warn(&h->pdev->dev, "Board failed to become ready " 8351 "after soft reset.\n"); 8352 return rc; 8353 } 8354 8355 return 0; 8356 } 8357 8358 static void hpsa_free_reply_queues(struct ctlr_info *h) 8359 { 8360 int i; 8361 8362 for (i = 0; i < h->nreply_queues; i++) { 8363 if (!h->reply_queue[i].head) 8364 continue; 8365 pci_free_consistent(h->pdev, 8366 h->reply_queue_size, 8367 h->reply_queue[i].head, 8368 h->reply_queue[i].busaddr); 8369 h->reply_queue[i].head = NULL; 8370 h->reply_queue[i].busaddr = 0; 8371 } 8372 h->reply_queue_size = 0; 8373 } 8374 8375 static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h) 8376 { 8377 hpsa_free_performant_mode(h); /* init_one 7 */ 8378 hpsa_free_sg_chain_blocks(h); /* init_one 6 */ 8379 hpsa_free_cmd_pool(h); /* init_one 5 */ 8380 hpsa_free_irqs(h); /* init_one 4 */ 8381 scsi_host_put(h->scsi_host); /* init_one 3 */ 8382 h->scsi_host = NULL; /* init_one 3 */ 8383 hpsa_free_pci_init(h); /* init_one 2_5 */ 8384 free_percpu(h->lockup_detected); /* init_one 2 */ 8385 h->lockup_detected = NULL; /* init_one 2 */ 8386 if (h->resubmit_wq) { 8387 destroy_workqueue(h->resubmit_wq); /* init_one 1 */ 8388 h->resubmit_wq = NULL; 8389 } 8390 if (h->rescan_ctlr_wq) { 8391 destroy_workqueue(h->rescan_ctlr_wq); 8392 h->rescan_ctlr_wq = NULL; 8393 } 8394 kfree(h); /* init_one 1 */ 8395 } 8396 8397 /* Called when controller lockup detected. */ 8398 static void fail_all_outstanding_cmds(struct ctlr_info *h) 8399 { 8400 int i, refcount; 8401 struct CommandList *c; 8402 int failcount = 0; 8403 8404 flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */ 8405 for (i = 0; i < h->nr_cmds; i++) { 8406 c = h->cmd_pool + i; 8407 refcount = atomic_inc_return(&c->refcount); 8408 if (refcount > 1) { 8409 c->err_info->CommandStatus = CMD_CTLR_LOCKUP; 8410 finish_cmd(c); 8411 atomic_dec(&h->commands_outstanding); 8412 failcount++; 8413 } 8414 cmd_free(h, c); 8415 } 8416 dev_warn(&h->pdev->dev, 8417 "failed %d commands in fail_all\n", failcount); 8418 } 8419 8420 static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value) 8421 { 8422 int cpu; 8423 8424 for_each_online_cpu(cpu) { 8425 u32 *lockup_detected; 8426 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 8427 *lockup_detected = value; 8428 } 8429 wmb(); /* be sure the per-cpu variables are out to memory */ 8430 } 8431 8432 static void controller_lockup_detected(struct ctlr_info *h) 8433 { 8434 unsigned long flags; 8435 u32 lockup_detected; 8436 8437 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8438 spin_lock_irqsave(&h->lock, flags); 8439 lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET); 8440 if (!lockup_detected) { 8441 /* no heartbeat, but controller gave us a zero. */ 8442 dev_warn(&h->pdev->dev, 8443 "lockup detected after %d but scratchpad register is zero\n", 8444 h->heartbeat_sample_interval / HZ); 8445 lockup_detected = 0xffffffff; 8446 } 8447 set_lockup_detected_for_all_cpus(h, lockup_detected); 8448 spin_unlock_irqrestore(&h->lock, flags); 8449 dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n", 8450 lockup_detected, h->heartbeat_sample_interval / HZ); 8451 pci_disable_device(h->pdev); 8452 fail_all_outstanding_cmds(h); 8453 } 8454 8455 static int detect_controller_lockup(struct ctlr_info *h) 8456 { 8457 u64 now; 8458 u32 heartbeat; 8459 unsigned long flags; 8460 8461 now = get_jiffies_64(); 8462 /* If we've received an interrupt recently, we're ok. */ 8463 if (time_after64(h->last_intr_timestamp + 8464 (h->heartbeat_sample_interval), now)) 8465 return false; 8466 8467 /* 8468 * If we've already checked the heartbeat recently, we're ok. 8469 * This could happen if someone sends us a signal. We 8470 * otherwise don't care about signals in this thread. 8471 */ 8472 if (time_after64(h->last_heartbeat_timestamp + 8473 (h->heartbeat_sample_interval), now)) 8474 return false; 8475 8476 /* If heartbeat has not changed since we last looked, we're not ok. */ 8477 spin_lock_irqsave(&h->lock, flags); 8478 heartbeat = readl(&h->cfgtable->HeartBeat); 8479 spin_unlock_irqrestore(&h->lock, flags); 8480 if (h->last_heartbeat == heartbeat) { 8481 controller_lockup_detected(h); 8482 return true; 8483 } 8484 8485 /* We're ok. */ 8486 h->last_heartbeat = heartbeat; 8487 h->last_heartbeat_timestamp = now; 8488 return false; 8489 } 8490 8491 static void hpsa_ack_ctlr_events(struct ctlr_info *h) 8492 { 8493 int i; 8494 char *event_type; 8495 8496 if (!(h->fw_support & MISC_FW_EVENT_NOTIFY)) 8497 return; 8498 8499 /* Ask the controller to clear the events we're handling. */ 8500 if ((h->transMethod & (CFGTBL_Trans_io_accel1 8501 | CFGTBL_Trans_io_accel2)) && 8502 (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE || 8503 h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) { 8504 8505 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE) 8506 event_type = "state change"; 8507 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE) 8508 event_type = "configuration change"; 8509 /* Stop sending new RAID offload reqs via the IO accelerator */ 8510 scsi_block_requests(h->scsi_host); 8511 for (i = 0; i < h->ndevices; i++) { 8512 h->dev[i]->offload_enabled = 0; 8513 h->dev[i]->offload_to_be_enabled = 0; 8514 } 8515 hpsa_drain_accel_commands(h); 8516 /* Set 'accelerator path config change' bit */ 8517 dev_warn(&h->pdev->dev, 8518 "Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n", 8519 h->events, event_type); 8520 writel(h->events, &(h->cfgtable->clear_event_notify)); 8521 /* Set the "clear event notify field update" bit 6 */ 8522 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL); 8523 /* Wait until ctlr clears 'clear event notify field', bit 6 */ 8524 hpsa_wait_for_clear_event_notify_ack(h); 8525 scsi_unblock_requests(h->scsi_host); 8526 } else { 8527 /* Acknowledge controller notification events. */ 8528 writel(h->events, &(h->cfgtable->clear_event_notify)); 8529 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL); 8530 hpsa_wait_for_clear_event_notify_ack(h); 8531 #if 0 8532 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 8533 hpsa_wait_for_mode_change_ack(h); 8534 #endif 8535 } 8536 return; 8537 } 8538 8539 /* Check a register on the controller to see if there are configuration 8540 * changes (added/changed/removed logical drives, etc.) which mean that 8541 * we should rescan the controller for devices. 8542 * Also check flag for driver-initiated rescan. 8543 */ 8544 static int hpsa_ctlr_needs_rescan(struct ctlr_info *h) 8545 { 8546 if (h->drv_req_rescan) { 8547 h->drv_req_rescan = 0; 8548 return 1; 8549 } 8550 8551 if (!(h->fw_support & MISC_FW_EVENT_NOTIFY)) 8552 return 0; 8553 8554 h->events = readl(&(h->cfgtable->event_notify)); 8555 return h->events & RESCAN_REQUIRED_EVENT_BITS; 8556 } 8557 8558 /* 8559 * Check if any of the offline devices have become ready 8560 */ 8561 static int hpsa_offline_devices_ready(struct ctlr_info *h) 8562 { 8563 unsigned long flags; 8564 struct offline_device_entry *d; 8565 struct list_head *this, *tmp; 8566 8567 spin_lock_irqsave(&h->offline_device_lock, flags); 8568 list_for_each_safe(this, tmp, &h->offline_device_list) { 8569 d = list_entry(this, struct offline_device_entry, 8570 offline_list); 8571 spin_unlock_irqrestore(&h->offline_device_lock, flags); 8572 if (!hpsa_volume_offline(h, d->scsi3addr)) { 8573 spin_lock_irqsave(&h->offline_device_lock, flags); 8574 list_del(&d->offline_list); 8575 spin_unlock_irqrestore(&h->offline_device_lock, flags); 8576 return 1; 8577 } 8578 spin_lock_irqsave(&h->offline_device_lock, flags); 8579 } 8580 spin_unlock_irqrestore(&h->offline_device_lock, flags); 8581 return 0; 8582 } 8583 8584 static int hpsa_luns_changed(struct ctlr_info *h) 8585 { 8586 int rc = 1; /* assume there are changes */ 8587 struct ReportLUNdata *logdev = NULL; 8588 8589 /* if we can't find out if lun data has changed, 8590 * assume that it has. 8591 */ 8592 8593 if (!h->lastlogicals) 8594 goto out; 8595 8596 logdev = kzalloc(sizeof(*logdev), GFP_KERNEL); 8597 if (!logdev) { 8598 dev_warn(&h->pdev->dev, 8599 "Out of memory, can't track lun changes.\n"); 8600 goto out; 8601 } 8602 if (hpsa_scsi_do_report_luns(h, 1, logdev, sizeof(*logdev), 0)) { 8603 dev_warn(&h->pdev->dev, 8604 "report luns failed, can't track lun changes.\n"); 8605 goto out; 8606 } 8607 if (memcmp(logdev, h->lastlogicals, sizeof(*logdev))) { 8608 dev_info(&h->pdev->dev, 8609 "Lun changes detected.\n"); 8610 memcpy(h->lastlogicals, logdev, sizeof(*logdev)); 8611 goto out; 8612 } else 8613 rc = 0; /* no changes detected. */ 8614 out: 8615 kfree(logdev); 8616 return rc; 8617 } 8618 8619 static void hpsa_rescan_ctlr_worker(struct work_struct *work) 8620 { 8621 unsigned long flags; 8622 struct ctlr_info *h = container_of(to_delayed_work(work), 8623 struct ctlr_info, rescan_ctlr_work); 8624 8625 8626 if (h->remove_in_progress) 8627 return; 8628 8629 /* 8630 * Do the scan after the reset 8631 */ 8632 if (h->reset_in_progress) { 8633 h->drv_req_rescan = 1; 8634 return; 8635 } 8636 8637 if (hpsa_ctlr_needs_rescan(h) || hpsa_offline_devices_ready(h)) { 8638 scsi_host_get(h->scsi_host); 8639 hpsa_ack_ctlr_events(h); 8640 hpsa_scan_start(h->scsi_host); 8641 scsi_host_put(h->scsi_host); 8642 } else if (h->discovery_polling) { 8643 hpsa_disable_rld_caching(h); 8644 if (hpsa_luns_changed(h)) { 8645 struct Scsi_Host *sh = NULL; 8646 8647 dev_info(&h->pdev->dev, 8648 "driver discovery polling rescan.\n"); 8649 sh = scsi_host_get(h->scsi_host); 8650 if (sh != NULL) { 8651 hpsa_scan_start(sh); 8652 scsi_host_put(sh); 8653 } 8654 } 8655 } 8656 spin_lock_irqsave(&h->lock, flags); 8657 if (!h->remove_in_progress) 8658 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work, 8659 h->heartbeat_sample_interval); 8660 spin_unlock_irqrestore(&h->lock, flags); 8661 } 8662 8663 static void hpsa_monitor_ctlr_worker(struct work_struct *work) 8664 { 8665 unsigned long flags; 8666 struct ctlr_info *h = container_of(to_delayed_work(work), 8667 struct ctlr_info, monitor_ctlr_work); 8668 8669 detect_controller_lockup(h); 8670 if (lockup_detected(h)) 8671 return; 8672 8673 spin_lock_irqsave(&h->lock, flags); 8674 if (!h->remove_in_progress) 8675 schedule_delayed_work(&h->monitor_ctlr_work, 8676 h->heartbeat_sample_interval); 8677 spin_unlock_irqrestore(&h->lock, flags); 8678 } 8679 8680 static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h, 8681 char *name) 8682 { 8683 struct workqueue_struct *wq = NULL; 8684 8685 wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr); 8686 if (!wq) 8687 dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name); 8688 8689 return wq; 8690 } 8691 8692 static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 8693 { 8694 int dac, rc; 8695 struct ctlr_info *h; 8696 int try_soft_reset = 0; 8697 unsigned long flags; 8698 u32 board_id; 8699 8700 if (number_of_controllers == 0) 8701 printk(KERN_INFO DRIVER_NAME "\n"); 8702 8703 rc = hpsa_lookup_board_id(pdev, &board_id); 8704 if (rc < 0) { 8705 dev_warn(&pdev->dev, "Board ID not found\n"); 8706 return rc; 8707 } 8708 8709 rc = hpsa_init_reset_devices(pdev, board_id); 8710 if (rc) { 8711 if (rc != -ENOTSUPP) 8712 return rc; 8713 /* If the reset fails in a particular way (it has no way to do 8714 * a proper hard reset, so returns -ENOTSUPP) we can try to do 8715 * a soft reset once we get the controller configured up to the 8716 * point that it can accept a command. 8717 */ 8718 try_soft_reset = 1; 8719 rc = 0; 8720 } 8721 8722 reinit_after_soft_reset: 8723 8724 /* Command structures must be aligned on a 32-byte boundary because 8725 * the 5 lower bits of the address are used by the hardware. and by 8726 * the driver. See comments in hpsa.h for more info. 8727 */ 8728 BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT); 8729 h = kzalloc(sizeof(*h), GFP_KERNEL); 8730 if (!h) { 8731 dev_err(&pdev->dev, "Failed to allocate controller head\n"); 8732 return -ENOMEM; 8733 } 8734 8735 h->pdev = pdev; 8736 8737 h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT; 8738 INIT_LIST_HEAD(&h->offline_device_list); 8739 spin_lock_init(&h->lock); 8740 spin_lock_init(&h->offline_device_lock); 8741 spin_lock_init(&h->scan_lock); 8742 atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS); 8743 atomic_set(&h->abort_cmds_available, HPSA_CMDS_RESERVED_FOR_ABORTS); 8744 8745 /* Allocate and clear per-cpu variable lockup_detected */ 8746 h->lockup_detected = alloc_percpu(u32); 8747 if (!h->lockup_detected) { 8748 dev_err(&h->pdev->dev, "Failed to allocate lockup detector\n"); 8749 rc = -ENOMEM; 8750 goto clean1; /* aer/h */ 8751 } 8752 set_lockup_detected_for_all_cpus(h, 0); 8753 8754 rc = hpsa_pci_init(h); 8755 if (rc) 8756 goto clean2; /* lu, aer/h */ 8757 8758 /* relies on h-> settings made by hpsa_pci_init, including 8759 * interrupt_mode h->intr */ 8760 rc = hpsa_scsi_host_alloc(h); 8761 if (rc) 8762 goto clean2_5; /* pci, lu, aer/h */ 8763 8764 sprintf(h->devname, HPSA "%d", h->scsi_host->host_no); 8765 h->ctlr = number_of_controllers; 8766 number_of_controllers++; 8767 8768 /* configure PCI DMA stuff */ 8769 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 8770 if (rc == 0) { 8771 dac = 1; 8772 } else { 8773 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 8774 if (rc == 0) { 8775 dac = 0; 8776 } else { 8777 dev_err(&pdev->dev, "no suitable DMA available\n"); 8778 goto clean3; /* shost, pci, lu, aer/h */ 8779 } 8780 } 8781 8782 /* make sure the board interrupts are off */ 8783 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8784 8785 rc = hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx); 8786 if (rc) 8787 goto clean3; /* shost, pci, lu, aer/h */ 8788 rc = hpsa_alloc_cmd_pool(h); 8789 if (rc) 8790 goto clean4; /* irq, shost, pci, lu, aer/h */ 8791 rc = hpsa_alloc_sg_chain_blocks(h); 8792 if (rc) 8793 goto clean5; /* cmd, irq, shost, pci, lu, aer/h */ 8794 init_waitqueue_head(&h->scan_wait_queue); 8795 init_waitqueue_head(&h->abort_cmd_wait_queue); 8796 init_waitqueue_head(&h->event_sync_wait_queue); 8797 mutex_init(&h->reset_mutex); 8798 h->scan_finished = 1; /* no scan currently in progress */ 8799 8800 pci_set_drvdata(pdev, h); 8801 h->ndevices = 0; 8802 8803 spin_lock_init(&h->devlock); 8804 rc = hpsa_put_ctlr_into_performant_mode(h); 8805 if (rc) 8806 goto clean6; /* sg, cmd, irq, shost, pci, lu, aer/h */ 8807 8808 /* create the resubmit workqueue */ 8809 h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan"); 8810 if (!h->rescan_ctlr_wq) { 8811 rc = -ENOMEM; 8812 goto clean7; 8813 } 8814 8815 h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit"); 8816 if (!h->resubmit_wq) { 8817 rc = -ENOMEM; 8818 goto clean7; /* aer/h */ 8819 } 8820 8821 /* 8822 * At this point, the controller is ready to take commands. 8823 * Now, if reset_devices and the hard reset didn't work, try 8824 * the soft reset and see if that works. 8825 */ 8826 if (try_soft_reset) { 8827 8828 /* This is kind of gross. We may or may not get a completion 8829 * from the soft reset command, and if we do, then the value 8830 * from the fifo may or may not be valid. So, we wait 10 secs 8831 * after the reset throwing away any completions we get during 8832 * that time. Unregister the interrupt handler and register 8833 * fake ones to scoop up any residual completions. 8834 */ 8835 spin_lock_irqsave(&h->lock, flags); 8836 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8837 spin_unlock_irqrestore(&h->lock, flags); 8838 hpsa_free_irqs(h); 8839 rc = hpsa_request_irqs(h, hpsa_msix_discard_completions, 8840 hpsa_intx_discard_completions); 8841 if (rc) { 8842 dev_warn(&h->pdev->dev, 8843 "Failed to request_irq after soft reset.\n"); 8844 /* 8845 * cannot goto clean7 or free_irqs will be called 8846 * again. Instead, do its work 8847 */ 8848 hpsa_free_performant_mode(h); /* clean7 */ 8849 hpsa_free_sg_chain_blocks(h); /* clean6 */ 8850 hpsa_free_cmd_pool(h); /* clean5 */ 8851 /* 8852 * skip hpsa_free_irqs(h) clean4 since that 8853 * was just called before request_irqs failed 8854 */ 8855 goto clean3; 8856 } 8857 8858 rc = hpsa_kdump_soft_reset(h); 8859 if (rc) 8860 /* Neither hard nor soft reset worked, we're hosed. */ 8861 goto clean7; 8862 8863 dev_info(&h->pdev->dev, "Board READY.\n"); 8864 dev_info(&h->pdev->dev, 8865 "Waiting for stale completions to drain.\n"); 8866 h->access.set_intr_mask(h, HPSA_INTR_ON); 8867 msleep(10000); 8868 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8869 8870 rc = controller_reset_failed(h->cfgtable); 8871 if (rc) 8872 dev_info(&h->pdev->dev, 8873 "Soft reset appears to have failed.\n"); 8874 8875 /* since the controller's reset, we have to go back and re-init 8876 * everything. Easiest to just forget what we've done and do it 8877 * all over again. 8878 */ 8879 hpsa_undo_allocations_after_kdump_soft_reset(h); 8880 try_soft_reset = 0; 8881 if (rc) 8882 /* don't goto clean, we already unallocated */ 8883 return -ENODEV; 8884 8885 goto reinit_after_soft_reset; 8886 } 8887 8888 /* Enable Accelerated IO path at driver layer */ 8889 h->acciopath_status = 1; 8890 /* Disable discovery polling.*/ 8891 h->discovery_polling = 0; 8892 8893 8894 /* Turn the interrupts on so we can service requests */ 8895 h->access.set_intr_mask(h, HPSA_INTR_ON); 8896 8897 hpsa_hba_inquiry(h); 8898 8899 h->lastlogicals = kzalloc(sizeof(*(h->lastlogicals)), GFP_KERNEL); 8900 if (!h->lastlogicals) 8901 dev_info(&h->pdev->dev, 8902 "Can't track change to report lun data\n"); 8903 8904 /* hook into SCSI subsystem */ 8905 rc = hpsa_scsi_add_host(h); 8906 if (rc) 8907 goto clean7; /* perf, sg, cmd, irq, shost, pci, lu, aer/h */ 8908 8909 /* Monitor the controller for firmware lockups */ 8910 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 8911 INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker); 8912 schedule_delayed_work(&h->monitor_ctlr_work, 8913 h->heartbeat_sample_interval); 8914 INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker); 8915 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work, 8916 h->heartbeat_sample_interval); 8917 return 0; 8918 8919 clean7: /* perf, sg, cmd, irq, shost, pci, lu, aer/h */ 8920 hpsa_free_performant_mode(h); 8921 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8922 clean6: /* sg, cmd, irq, pci, lockup, wq/aer/h */ 8923 hpsa_free_sg_chain_blocks(h); 8924 clean5: /* cmd, irq, shost, pci, lu, aer/h */ 8925 hpsa_free_cmd_pool(h); 8926 clean4: /* irq, shost, pci, lu, aer/h */ 8927 hpsa_free_irqs(h); 8928 clean3: /* shost, pci, lu, aer/h */ 8929 scsi_host_put(h->scsi_host); 8930 h->scsi_host = NULL; 8931 clean2_5: /* pci, lu, aer/h */ 8932 hpsa_free_pci_init(h); 8933 clean2: /* lu, aer/h */ 8934 if (h->lockup_detected) { 8935 free_percpu(h->lockup_detected); 8936 h->lockup_detected = NULL; 8937 } 8938 clean1: /* wq/aer/h */ 8939 if (h->resubmit_wq) { 8940 destroy_workqueue(h->resubmit_wq); 8941 h->resubmit_wq = NULL; 8942 } 8943 if (h->rescan_ctlr_wq) { 8944 destroy_workqueue(h->rescan_ctlr_wq); 8945 h->rescan_ctlr_wq = NULL; 8946 } 8947 kfree(h); 8948 return rc; 8949 } 8950 8951 static void hpsa_flush_cache(struct ctlr_info *h) 8952 { 8953 char *flush_buf; 8954 struct CommandList *c; 8955 int rc; 8956 8957 if (unlikely(lockup_detected(h))) 8958 return; 8959 flush_buf = kzalloc(4, GFP_KERNEL); 8960 if (!flush_buf) 8961 return; 8962 8963 c = cmd_alloc(h); 8964 8965 if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0, 8966 RAID_CTLR_LUNID, TYPE_CMD)) { 8967 goto out; 8968 } 8969 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 8970 PCI_DMA_TODEVICE, DEFAULT_TIMEOUT); 8971 if (rc) 8972 goto out; 8973 if (c->err_info->CommandStatus != 0) 8974 out: 8975 dev_warn(&h->pdev->dev, 8976 "error flushing cache on controller\n"); 8977 cmd_free(h, c); 8978 kfree(flush_buf); 8979 } 8980 8981 /* Make controller gather fresh report lun data each time we 8982 * send down a report luns request 8983 */ 8984 static void hpsa_disable_rld_caching(struct ctlr_info *h) 8985 { 8986 u32 *options; 8987 struct CommandList *c; 8988 int rc; 8989 8990 /* Don't bother trying to set diag options if locked up */ 8991 if (unlikely(h->lockup_detected)) 8992 return; 8993 8994 options = kzalloc(sizeof(*options), GFP_KERNEL); 8995 if (!options) { 8996 dev_err(&h->pdev->dev, 8997 "Error: failed to disable rld caching, during alloc.\n"); 8998 return; 8999 } 9000 9001 c = cmd_alloc(h); 9002 9003 /* first, get the current diag options settings */ 9004 if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0, 9005 RAID_CTLR_LUNID, TYPE_CMD)) 9006 goto errout; 9007 9008 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 9009 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 9010 if ((rc != 0) || (c->err_info->CommandStatus != 0)) 9011 goto errout; 9012 9013 /* Now, set the bit for disabling the RLD caching */ 9014 *options |= HPSA_DIAG_OPTS_DISABLE_RLD_CACHING; 9015 9016 if (fill_cmd(c, BMIC_SET_DIAG_OPTIONS, h, options, 4, 0, 9017 RAID_CTLR_LUNID, TYPE_CMD)) 9018 goto errout; 9019 9020 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 9021 PCI_DMA_TODEVICE, DEFAULT_TIMEOUT); 9022 if ((rc != 0) || (c->err_info->CommandStatus != 0)) 9023 goto errout; 9024 9025 /* Now verify that it got set: */ 9026 if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0, 9027 RAID_CTLR_LUNID, TYPE_CMD)) 9028 goto errout; 9029 9030 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 9031 PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 9032 if ((rc != 0) || (c->err_info->CommandStatus != 0)) 9033 goto errout; 9034 9035 if (*options & HPSA_DIAG_OPTS_DISABLE_RLD_CACHING) 9036 goto out; 9037 9038 errout: 9039 dev_err(&h->pdev->dev, 9040 "Error: failed to disable report lun data caching.\n"); 9041 out: 9042 cmd_free(h, c); 9043 kfree(options); 9044 } 9045 9046 static void hpsa_shutdown(struct pci_dev *pdev) 9047 { 9048 struct ctlr_info *h; 9049 9050 h = pci_get_drvdata(pdev); 9051 /* Turn board interrupts off and send the flush cache command 9052 * sendcmd will turn off interrupt, and send the flush... 9053 * To write all data in the battery backed cache to disks 9054 */ 9055 hpsa_flush_cache(h); 9056 h->access.set_intr_mask(h, HPSA_INTR_OFF); 9057 hpsa_free_irqs(h); /* init_one 4 */ 9058 hpsa_disable_interrupt_mode(h); /* pci_init 2 */ 9059 } 9060 9061 static void hpsa_free_device_info(struct ctlr_info *h) 9062 { 9063 int i; 9064 9065 for (i = 0; i < h->ndevices; i++) { 9066 kfree(h->dev[i]); 9067 h->dev[i] = NULL; 9068 } 9069 } 9070 9071 static void hpsa_remove_one(struct pci_dev *pdev) 9072 { 9073 struct ctlr_info *h; 9074 unsigned long flags; 9075 9076 if (pci_get_drvdata(pdev) == NULL) { 9077 dev_err(&pdev->dev, "unable to remove device\n"); 9078 return; 9079 } 9080 h = pci_get_drvdata(pdev); 9081 9082 /* Get rid of any controller monitoring work items */ 9083 spin_lock_irqsave(&h->lock, flags); 9084 h->remove_in_progress = 1; 9085 spin_unlock_irqrestore(&h->lock, flags); 9086 cancel_delayed_work_sync(&h->monitor_ctlr_work); 9087 cancel_delayed_work_sync(&h->rescan_ctlr_work); 9088 destroy_workqueue(h->rescan_ctlr_wq); 9089 destroy_workqueue(h->resubmit_wq); 9090 9091 /* 9092 * Call before disabling interrupts. 9093 * scsi_remove_host can trigger I/O operations especially 9094 * when multipath is enabled. There can be SYNCHRONIZE CACHE 9095 * operations which cannot complete and will hang the system. 9096 */ 9097 if (h->scsi_host) 9098 scsi_remove_host(h->scsi_host); /* init_one 8 */ 9099 /* includes hpsa_free_irqs - init_one 4 */ 9100 /* includes hpsa_disable_interrupt_mode - pci_init 2 */ 9101 hpsa_shutdown(pdev); 9102 9103 hpsa_free_device_info(h); /* scan */ 9104 9105 kfree(h->hba_inquiry_data); /* init_one 10 */ 9106 h->hba_inquiry_data = NULL; /* init_one 10 */ 9107 hpsa_free_ioaccel2_sg_chain_blocks(h); 9108 hpsa_free_performant_mode(h); /* init_one 7 */ 9109 hpsa_free_sg_chain_blocks(h); /* init_one 6 */ 9110 hpsa_free_cmd_pool(h); /* init_one 5 */ 9111 kfree(h->lastlogicals); 9112 9113 /* hpsa_free_irqs already called via hpsa_shutdown init_one 4 */ 9114 9115 scsi_host_put(h->scsi_host); /* init_one 3 */ 9116 h->scsi_host = NULL; /* init_one 3 */ 9117 9118 /* includes hpsa_disable_interrupt_mode - pci_init 2 */ 9119 hpsa_free_pci_init(h); /* init_one 2.5 */ 9120 9121 free_percpu(h->lockup_detected); /* init_one 2 */ 9122 h->lockup_detected = NULL; /* init_one 2 */ 9123 /* (void) pci_disable_pcie_error_reporting(pdev); */ /* init_one 1 */ 9124 9125 hpsa_delete_sas_host(h); 9126 9127 kfree(h); /* init_one 1 */ 9128 } 9129 9130 static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev, 9131 __attribute__((unused)) pm_message_t state) 9132 { 9133 return -ENOSYS; 9134 } 9135 9136 static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev) 9137 { 9138 return -ENOSYS; 9139 } 9140 9141 static struct pci_driver hpsa_pci_driver = { 9142 .name = HPSA, 9143 .probe = hpsa_init_one, 9144 .remove = hpsa_remove_one, 9145 .id_table = hpsa_pci_device_id, /* id_table */ 9146 .shutdown = hpsa_shutdown, 9147 .suspend = hpsa_suspend, 9148 .resume = hpsa_resume, 9149 }; 9150 9151 /* Fill in bucket_map[], given nsgs (the max number of 9152 * scatter gather elements supported) and bucket[], 9153 * which is an array of 8 integers. The bucket[] array 9154 * contains 8 different DMA transfer sizes (in 16 9155 * byte increments) which the controller uses to fetch 9156 * commands. This function fills in bucket_map[], which 9157 * maps a given number of scatter gather elements to one of 9158 * the 8 DMA transfer sizes. The point of it is to allow the 9159 * controller to only do as much DMA as needed to fetch the 9160 * command, with the DMA transfer size encoded in the lower 9161 * bits of the command address. 9162 */ 9163 static void calc_bucket_map(int bucket[], int num_buckets, 9164 int nsgs, int min_blocks, u32 *bucket_map) 9165 { 9166 int i, j, b, size; 9167 9168 /* Note, bucket_map must have nsgs+1 entries. */ 9169 for (i = 0; i <= nsgs; i++) { 9170 /* Compute size of a command with i SG entries */ 9171 size = i + min_blocks; 9172 b = num_buckets; /* Assume the biggest bucket */ 9173 /* Find the bucket that is just big enough */ 9174 for (j = 0; j < num_buckets; j++) { 9175 if (bucket[j] >= size) { 9176 b = j; 9177 break; 9178 } 9179 } 9180 /* for a command with i SG entries, use bucket b. */ 9181 bucket_map[i] = b; 9182 } 9183 } 9184 9185 /* 9186 * return -ENODEV on err, 0 on success (or no action) 9187 * allocates numerous items that must be freed later 9188 */ 9189 static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support) 9190 { 9191 int i; 9192 unsigned long register_value; 9193 unsigned long transMethod = CFGTBL_Trans_Performant | 9194 (trans_support & CFGTBL_Trans_use_short_tags) | 9195 CFGTBL_Trans_enable_directed_msix | 9196 (trans_support & (CFGTBL_Trans_io_accel1 | 9197 CFGTBL_Trans_io_accel2)); 9198 struct access_method access = SA5_performant_access; 9199 9200 /* This is a bit complicated. There are 8 registers on 9201 * the controller which we write to to tell it 8 different 9202 * sizes of commands which there may be. It's a way of 9203 * reducing the DMA done to fetch each command. Encoded into 9204 * each command's tag are 3 bits which communicate to the controller 9205 * which of the eight sizes that command fits within. The size of 9206 * each command depends on how many scatter gather entries there are. 9207 * Each SG entry requires 16 bytes. The eight registers are programmed 9208 * with the number of 16-byte blocks a command of that size requires. 9209 * The smallest command possible requires 5 such 16 byte blocks. 9210 * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte 9211 * blocks. Note, this only extends to the SG entries contained 9212 * within the command block, and does not extend to chained blocks 9213 * of SG elements. bft[] contains the eight values we write to 9214 * the registers. They are not evenly distributed, but have more 9215 * sizes for small commands, and fewer sizes for larger commands. 9216 */ 9217 int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4}; 9218 #define MIN_IOACCEL2_BFT_ENTRY 5 9219 #define HPSA_IOACCEL2_HEADER_SZ 4 9220 int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12, 9221 13, 14, 15, 16, 17, 18, 19, 9222 HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES}; 9223 BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16); 9224 BUILD_BUG_ON(ARRAY_SIZE(bft) != 8); 9225 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) > 9226 16 * MIN_IOACCEL2_BFT_ENTRY); 9227 BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16); 9228 BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4); 9229 /* 5 = 1 s/g entry or 4k 9230 * 6 = 2 s/g entry or 8k 9231 * 8 = 4 s/g entry or 16k 9232 * 10 = 6 s/g entry or 24k 9233 */ 9234 9235 /* If the controller supports either ioaccel method then 9236 * we can also use the RAID stack submit path that does not 9237 * perform the superfluous readl() after each command submission. 9238 */ 9239 if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2)) 9240 access = SA5_performant_access_no_read; 9241 9242 /* Controller spec: zero out this buffer. */ 9243 for (i = 0; i < h->nreply_queues; i++) 9244 memset(h->reply_queue[i].head, 0, h->reply_queue_size); 9245 9246 bft[7] = SG_ENTRIES_IN_CMD + 4; 9247 calc_bucket_map(bft, ARRAY_SIZE(bft), 9248 SG_ENTRIES_IN_CMD, 4, h->blockFetchTable); 9249 for (i = 0; i < 8; i++) 9250 writel(bft[i], &h->transtable->BlockFetch[i]); 9251 9252 /* size of controller ring buffer */ 9253 writel(h->max_commands, &h->transtable->RepQSize); 9254 writel(h->nreply_queues, &h->transtable->RepQCount); 9255 writel(0, &h->transtable->RepQCtrAddrLow32); 9256 writel(0, &h->transtable->RepQCtrAddrHigh32); 9257 9258 for (i = 0; i < h->nreply_queues; i++) { 9259 writel(0, &h->transtable->RepQAddr[i].upper); 9260 writel(h->reply_queue[i].busaddr, 9261 &h->transtable->RepQAddr[i].lower); 9262 } 9263 9264 writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi); 9265 writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest)); 9266 /* 9267 * enable outbound interrupt coalescing in accelerator mode; 9268 */ 9269 if (trans_support & CFGTBL_Trans_io_accel1) { 9270 access = SA5_ioaccel_mode1_access; 9271 writel(10, &h->cfgtable->HostWrite.CoalIntDelay); 9272 writel(4, &h->cfgtable->HostWrite.CoalIntCount); 9273 } else { 9274 if (trans_support & CFGTBL_Trans_io_accel2) { 9275 access = SA5_ioaccel_mode2_access; 9276 writel(10, &h->cfgtable->HostWrite.CoalIntDelay); 9277 writel(4, &h->cfgtable->HostWrite.CoalIntCount); 9278 } 9279 } 9280 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 9281 if (hpsa_wait_for_mode_change_ack(h)) { 9282 dev_err(&h->pdev->dev, 9283 "performant mode problem - doorbell timeout\n"); 9284 return -ENODEV; 9285 } 9286 register_value = readl(&(h->cfgtable->TransportActive)); 9287 if (!(register_value & CFGTBL_Trans_Performant)) { 9288 dev_err(&h->pdev->dev, 9289 "performant mode problem - transport not active\n"); 9290 return -ENODEV; 9291 } 9292 /* Change the access methods to the performant access methods */ 9293 h->access = access; 9294 h->transMethod = transMethod; 9295 9296 if (!((trans_support & CFGTBL_Trans_io_accel1) || 9297 (trans_support & CFGTBL_Trans_io_accel2))) 9298 return 0; 9299 9300 if (trans_support & CFGTBL_Trans_io_accel1) { 9301 /* Set up I/O accelerator mode */ 9302 for (i = 0; i < h->nreply_queues; i++) { 9303 writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX); 9304 h->reply_queue[i].current_entry = 9305 readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX); 9306 } 9307 bft[7] = h->ioaccel_maxsg + 8; 9308 calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8, 9309 h->ioaccel1_blockFetchTable); 9310 9311 /* initialize all reply queue entries to unused */ 9312 for (i = 0; i < h->nreply_queues; i++) 9313 memset(h->reply_queue[i].head, 9314 (u8) IOACCEL_MODE1_REPLY_UNUSED, 9315 h->reply_queue_size); 9316 9317 /* set all the constant fields in the accelerator command 9318 * frames once at init time to save CPU cycles later. 9319 */ 9320 for (i = 0; i < h->nr_cmds; i++) { 9321 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i]; 9322 9323 cp->function = IOACCEL1_FUNCTION_SCSIIO; 9324 cp->err_info = (u32) (h->errinfo_pool_dhandle + 9325 (i * sizeof(struct ErrorInfo))); 9326 cp->err_info_len = sizeof(struct ErrorInfo); 9327 cp->sgl_offset = IOACCEL1_SGLOFFSET; 9328 cp->host_context_flags = 9329 cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT); 9330 cp->timeout_sec = 0; 9331 cp->ReplyQueue = 0; 9332 cp->tag = 9333 cpu_to_le64((i << DIRECT_LOOKUP_SHIFT)); 9334 cp->host_addr = 9335 cpu_to_le64(h->ioaccel_cmd_pool_dhandle + 9336 (i * sizeof(struct io_accel1_cmd))); 9337 } 9338 } else if (trans_support & CFGTBL_Trans_io_accel2) { 9339 u64 cfg_offset, cfg_base_addr_index; 9340 u32 bft2_offset, cfg_base_addr; 9341 int rc; 9342 9343 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 9344 &cfg_base_addr_index, &cfg_offset); 9345 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64); 9346 bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ; 9347 calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg, 9348 4, h->ioaccel2_blockFetchTable); 9349 bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset); 9350 BUILD_BUG_ON(offsetof(struct CfgTable, 9351 io_accel_request_size_offset) != 0xb8); 9352 h->ioaccel2_bft2_regs = 9353 remap_pci_mem(pci_resource_start(h->pdev, 9354 cfg_base_addr_index) + 9355 cfg_offset + bft2_offset, 9356 ARRAY_SIZE(bft2) * 9357 sizeof(*h->ioaccel2_bft2_regs)); 9358 for (i = 0; i < ARRAY_SIZE(bft2); i++) 9359 writel(bft2[i], &h->ioaccel2_bft2_regs[i]); 9360 } 9361 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 9362 if (hpsa_wait_for_mode_change_ack(h)) { 9363 dev_err(&h->pdev->dev, 9364 "performant mode problem - enabling ioaccel mode\n"); 9365 return -ENODEV; 9366 } 9367 return 0; 9368 } 9369 9370 /* Free ioaccel1 mode command blocks and block fetch table */ 9371 static void hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info *h) 9372 { 9373 if (h->ioaccel_cmd_pool) { 9374 pci_free_consistent(h->pdev, 9375 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool), 9376 h->ioaccel_cmd_pool, 9377 h->ioaccel_cmd_pool_dhandle); 9378 h->ioaccel_cmd_pool = NULL; 9379 h->ioaccel_cmd_pool_dhandle = 0; 9380 } 9381 kfree(h->ioaccel1_blockFetchTable); 9382 h->ioaccel1_blockFetchTable = NULL; 9383 } 9384 9385 /* Allocate ioaccel1 mode command blocks and block fetch table */ 9386 static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h) 9387 { 9388 h->ioaccel_maxsg = 9389 readl(&(h->cfgtable->io_accel_max_embedded_sg_count)); 9390 if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES) 9391 h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES; 9392 9393 /* Command structures must be aligned on a 128-byte boundary 9394 * because the 7 lower bits of the address are used by the 9395 * hardware. 9396 */ 9397 BUILD_BUG_ON(sizeof(struct io_accel1_cmd) % 9398 IOACCEL1_COMMANDLIST_ALIGNMENT); 9399 h->ioaccel_cmd_pool = 9400 pci_alloc_consistent(h->pdev, 9401 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool), 9402 &(h->ioaccel_cmd_pool_dhandle)); 9403 9404 h->ioaccel1_blockFetchTable = 9405 kmalloc(((h->ioaccel_maxsg + 1) * 9406 sizeof(u32)), GFP_KERNEL); 9407 9408 if ((h->ioaccel_cmd_pool == NULL) || 9409 (h->ioaccel1_blockFetchTable == NULL)) 9410 goto clean_up; 9411 9412 memset(h->ioaccel_cmd_pool, 0, 9413 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool)); 9414 return 0; 9415 9416 clean_up: 9417 hpsa_free_ioaccel1_cmd_and_bft(h); 9418 return -ENOMEM; 9419 } 9420 9421 /* Free ioaccel2 mode command blocks and block fetch table */ 9422 static void hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info *h) 9423 { 9424 hpsa_free_ioaccel2_sg_chain_blocks(h); 9425 9426 if (h->ioaccel2_cmd_pool) { 9427 pci_free_consistent(h->pdev, 9428 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 9429 h->ioaccel2_cmd_pool, 9430 h->ioaccel2_cmd_pool_dhandle); 9431 h->ioaccel2_cmd_pool = NULL; 9432 h->ioaccel2_cmd_pool_dhandle = 0; 9433 } 9434 kfree(h->ioaccel2_blockFetchTable); 9435 h->ioaccel2_blockFetchTable = NULL; 9436 } 9437 9438 /* Allocate ioaccel2 mode command blocks and block fetch table */ 9439 static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h) 9440 { 9441 int rc; 9442 9443 /* Allocate ioaccel2 mode command blocks and block fetch table */ 9444 9445 h->ioaccel_maxsg = 9446 readl(&(h->cfgtable->io_accel_max_embedded_sg_count)); 9447 if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES) 9448 h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES; 9449 9450 BUILD_BUG_ON(sizeof(struct io_accel2_cmd) % 9451 IOACCEL2_COMMANDLIST_ALIGNMENT); 9452 h->ioaccel2_cmd_pool = 9453 pci_alloc_consistent(h->pdev, 9454 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 9455 &(h->ioaccel2_cmd_pool_dhandle)); 9456 9457 h->ioaccel2_blockFetchTable = 9458 kmalloc(((h->ioaccel_maxsg + 1) * 9459 sizeof(u32)), GFP_KERNEL); 9460 9461 if ((h->ioaccel2_cmd_pool == NULL) || 9462 (h->ioaccel2_blockFetchTable == NULL)) { 9463 rc = -ENOMEM; 9464 goto clean_up; 9465 } 9466 9467 rc = hpsa_allocate_ioaccel2_sg_chain_blocks(h); 9468 if (rc) 9469 goto clean_up; 9470 9471 memset(h->ioaccel2_cmd_pool, 0, 9472 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool)); 9473 return 0; 9474 9475 clean_up: 9476 hpsa_free_ioaccel2_cmd_and_bft(h); 9477 return rc; 9478 } 9479 9480 /* Free items allocated by hpsa_put_ctlr_into_performant_mode */ 9481 static void hpsa_free_performant_mode(struct ctlr_info *h) 9482 { 9483 kfree(h->blockFetchTable); 9484 h->blockFetchTable = NULL; 9485 hpsa_free_reply_queues(h); 9486 hpsa_free_ioaccel1_cmd_and_bft(h); 9487 hpsa_free_ioaccel2_cmd_and_bft(h); 9488 } 9489 9490 /* return -ENODEV on error, 0 on success (or no action) 9491 * allocates numerous items that must be freed later 9492 */ 9493 static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h) 9494 { 9495 u32 trans_support; 9496 unsigned long transMethod = CFGTBL_Trans_Performant | 9497 CFGTBL_Trans_use_short_tags; 9498 int i, rc; 9499 9500 if (hpsa_simple_mode) 9501 return 0; 9502 9503 trans_support = readl(&(h->cfgtable->TransportSupport)); 9504 if (!(trans_support & PERFORMANT_MODE)) 9505 return 0; 9506 9507 /* Check for I/O accelerator mode support */ 9508 if (trans_support & CFGTBL_Trans_io_accel1) { 9509 transMethod |= CFGTBL_Trans_io_accel1 | 9510 CFGTBL_Trans_enable_directed_msix; 9511 rc = hpsa_alloc_ioaccel1_cmd_and_bft(h); 9512 if (rc) 9513 return rc; 9514 } else if (trans_support & CFGTBL_Trans_io_accel2) { 9515 transMethod |= CFGTBL_Trans_io_accel2 | 9516 CFGTBL_Trans_enable_directed_msix; 9517 rc = hpsa_alloc_ioaccel2_cmd_and_bft(h); 9518 if (rc) 9519 return rc; 9520 } 9521 9522 h->nreply_queues = h->msix_vectors > 0 ? h->msix_vectors : 1; 9523 hpsa_get_max_perf_mode_cmds(h); 9524 /* Performant mode ring buffer and supporting data structures */ 9525 h->reply_queue_size = h->max_commands * sizeof(u64); 9526 9527 for (i = 0; i < h->nreply_queues; i++) { 9528 h->reply_queue[i].head = pci_alloc_consistent(h->pdev, 9529 h->reply_queue_size, 9530 &(h->reply_queue[i].busaddr)); 9531 if (!h->reply_queue[i].head) { 9532 rc = -ENOMEM; 9533 goto clean1; /* rq, ioaccel */ 9534 } 9535 h->reply_queue[i].size = h->max_commands; 9536 h->reply_queue[i].wraparound = 1; /* spec: init to 1 */ 9537 h->reply_queue[i].current_entry = 0; 9538 } 9539 9540 /* Need a block fetch table for performant mode */ 9541 h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) * 9542 sizeof(u32)), GFP_KERNEL); 9543 if (!h->blockFetchTable) { 9544 rc = -ENOMEM; 9545 goto clean1; /* rq, ioaccel */ 9546 } 9547 9548 rc = hpsa_enter_performant_mode(h, trans_support); 9549 if (rc) 9550 goto clean2; /* bft, rq, ioaccel */ 9551 return 0; 9552 9553 clean2: /* bft, rq, ioaccel */ 9554 kfree(h->blockFetchTable); 9555 h->blockFetchTable = NULL; 9556 clean1: /* rq, ioaccel */ 9557 hpsa_free_reply_queues(h); 9558 hpsa_free_ioaccel1_cmd_and_bft(h); 9559 hpsa_free_ioaccel2_cmd_and_bft(h); 9560 return rc; 9561 } 9562 9563 static int is_accelerated_cmd(struct CommandList *c) 9564 { 9565 return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2; 9566 } 9567 9568 static void hpsa_drain_accel_commands(struct ctlr_info *h) 9569 { 9570 struct CommandList *c = NULL; 9571 int i, accel_cmds_out; 9572 int refcount; 9573 9574 do { /* wait for all outstanding ioaccel commands to drain out */ 9575 accel_cmds_out = 0; 9576 for (i = 0; i < h->nr_cmds; i++) { 9577 c = h->cmd_pool + i; 9578 refcount = atomic_inc_return(&c->refcount); 9579 if (refcount > 1) /* Command is allocated */ 9580 accel_cmds_out += is_accelerated_cmd(c); 9581 cmd_free(h, c); 9582 } 9583 if (accel_cmds_out <= 0) 9584 break; 9585 msleep(100); 9586 } while (1); 9587 } 9588 9589 static struct hpsa_sas_phy *hpsa_alloc_sas_phy( 9590 struct hpsa_sas_port *hpsa_sas_port) 9591 { 9592 struct hpsa_sas_phy *hpsa_sas_phy; 9593 struct sas_phy *phy; 9594 9595 hpsa_sas_phy = kzalloc(sizeof(*hpsa_sas_phy), GFP_KERNEL); 9596 if (!hpsa_sas_phy) 9597 return NULL; 9598 9599 phy = sas_phy_alloc(hpsa_sas_port->parent_node->parent_dev, 9600 hpsa_sas_port->next_phy_index); 9601 if (!phy) { 9602 kfree(hpsa_sas_phy); 9603 return NULL; 9604 } 9605 9606 hpsa_sas_port->next_phy_index++; 9607 hpsa_sas_phy->phy = phy; 9608 hpsa_sas_phy->parent_port = hpsa_sas_port; 9609 9610 return hpsa_sas_phy; 9611 } 9612 9613 static void hpsa_free_sas_phy(struct hpsa_sas_phy *hpsa_sas_phy) 9614 { 9615 struct sas_phy *phy = hpsa_sas_phy->phy; 9616 9617 sas_port_delete_phy(hpsa_sas_phy->parent_port->port, phy); 9618 sas_phy_free(phy); 9619 if (hpsa_sas_phy->added_to_port) 9620 list_del(&hpsa_sas_phy->phy_list_entry); 9621 kfree(hpsa_sas_phy); 9622 } 9623 9624 static int hpsa_sas_port_add_phy(struct hpsa_sas_phy *hpsa_sas_phy) 9625 { 9626 int rc; 9627 struct hpsa_sas_port *hpsa_sas_port; 9628 struct sas_phy *phy; 9629 struct sas_identify *identify; 9630 9631 hpsa_sas_port = hpsa_sas_phy->parent_port; 9632 phy = hpsa_sas_phy->phy; 9633 9634 identify = &phy->identify; 9635 memset(identify, 0, sizeof(*identify)); 9636 identify->sas_address = hpsa_sas_port->sas_address; 9637 identify->device_type = SAS_END_DEVICE; 9638 identify->initiator_port_protocols = SAS_PROTOCOL_STP; 9639 identify->target_port_protocols = SAS_PROTOCOL_STP; 9640 phy->minimum_linkrate_hw = SAS_LINK_RATE_UNKNOWN; 9641 phy->maximum_linkrate_hw = SAS_LINK_RATE_UNKNOWN; 9642 phy->minimum_linkrate = SAS_LINK_RATE_UNKNOWN; 9643 phy->maximum_linkrate = SAS_LINK_RATE_UNKNOWN; 9644 phy->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN; 9645 9646 rc = sas_phy_add(hpsa_sas_phy->phy); 9647 if (rc) 9648 return rc; 9649 9650 sas_port_add_phy(hpsa_sas_port->port, hpsa_sas_phy->phy); 9651 list_add_tail(&hpsa_sas_phy->phy_list_entry, 9652 &hpsa_sas_port->phy_list_head); 9653 hpsa_sas_phy->added_to_port = true; 9654 9655 return 0; 9656 } 9657 9658 static int 9659 hpsa_sas_port_add_rphy(struct hpsa_sas_port *hpsa_sas_port, 9660 struct sas_rphy *rphy) 9661 { 9662 struct sas_identify *identify; 9663 9664 identify = &rphy->identify; 9665 identify->sas_address = hpsa_sas_port->sas_address; 9666 identify->initiator_port_protocols = SAS_PROTOCOL_STP; 9667 identify->target_port_protocols = SAS_PROTOCOL_STP; 9668 9669 return sas_rphy_add(rphy); 9670 } 9671 9672 static struct hpsa_sas_port 9673 *hpsa_alloc_sas_port(struct hpsa_sas_node *hpsa_sas_node, 9674 u64 sas_address) 9675 { 9676 int rc; 9677 struct hpsa_sas_port *hpsa_sas_port; 9678 struct sas_port *port; 9679 9680 hpsa_sas_port = kzalloc(sizeof(*hpsa_sas_port), GFP_KERNEL); 9681 if (!hpsa_sas_port) 9682 return NULL; 9683 9684 INIT_LIST_HEAD(&hpsa_sas_port->phy_list_head); 9685 hpsa_sas_port->parent_node = hpsa_sas_node; 9686 9687 port = sas_port_alloc_num(hpsa_sas_node->parent_dev); 9688 if (!port) 9689 goto free_hpsa_port; 9690 9691 rc = sas_port_add(port); 9692 if (rc) 9693 goto free_sas_port; 9694 9695 hpsa_sas_port->port = port; 9696 hpsa_sas_port->sas_address = sas_address; 9697 list_add_tail(&hpsa_sas_port->port_list_entry, 9698 &hpsa_sas_node->port_list_head); 9699 9700 return hpsa_sas_port; 9701 9702 free_sas_port: 9703 sas_port_free(port); 9704 free_hpsa_port: 9705 kfree(hpsa_sas_port); 9706 9707 return NULL; 9708 } 9709 9710 static void hpsa_free_sas_port(struct hpsa_sas_port *hpsa_sas_port) 9711 { 9712 struct hpsa_sas_phy *hpsa_sas_phy; 9713 struct hpsa_sas_phy *next; 9714 9715 list_for_each_entry_safe(hpsa_sas_phy, next, 9716 &hpsa_sas_port->phy_list_head, phy_list_entry) 9717 hpsa_free_sas_phy(hpsa_sas_phy); 9718 9719 sas_port_delete(hpsa_sas_port->port); 9720 list_del(&hpsa_sas_port->port_list_entry); 9721 kfree(hpsa_sas_port); 9722 } 9723 9724 static struct hpsa_sas_node *hpsa_alloc_sas_node(struct device *parent_dev) 9725 { 9726 struct hpsa_sas_node *hpsa_sas_node; 9727 9728 hpsa_sas_node = kzalloc(sizeof(*hpsa_sas_node), GFP_KERNEL); 9729 if (hpsa_sas_node) { 9730 hpsa_sas_node->parent_dev = parent_dev; 9731 INIT_LIST_HEAD(&hpsa_sas_node->port_list_head); 9732 } 9733 9734 return hpsa_sas_node; 9735 } 9736 9737 static void hpsa_free_sas_node(struct hpsa_sas_node *hpsa_sas_node) 9738 { 9739 struct hpsa_sas_port *hpsa_sas_port; 9740 struct hpsa_sas_port *next; 9741 9742 if (!hpsa_sas_node) 9743 return; 9744 9745 list_for_each_entry_safe(hpsa_sas_port, next, 9746 &hpsa_sas_node->port_list_head, port_list_entry) 9747 hpsa_free_sas_port(hpsa_sas_port); 9748 9749 kfree(hpsa_sas_node); 9750 } 9751 9752 static struct hpsa_scsi_dev_t 9753 *hpsa_find_device_by_sas_rphy(struct ctlr_info *h, 9754 struct sas_rphy *rphy) 9755 { 9756 int i; 9757 struct hpsa_scsi_dev_t *device; 9758 9759 for (i = 0; i < h->ndevices; i++) { 9760 device = h->dev[i]; 9761 if (!device->sas_port) 9762 continue; 9763 if (device->sas_port->rphy == rphy) 9764 return device; 9765 } 9766 9767 return NULL; 9768 } 9769 9770 static int hpsa_add_sas_host(struct ctlr_info *h) 9771 { 9772 int rc; 9773 struct device *parent_dev; 9774 struct hpsa_sas_node *hpsa_sas_node; 9775 struct hpsa_sas_port *hpsa_sas_port; 9776 struct hpsa_sas_phy *hpsa_sas_phy; 9777 9778 parent_dev = &h->scsi_host->shost_gendev; 9779 9780 hpsa_sas_node = hpsa_alloc_sas_node(parent_dev); 9781 if (!hpsa_sas_node) 9782 return -ENOMEM; 9783 9784 hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, h->sas_address); 9785 if (!hpsa_sas_port) { 9786 rc = -ENODEV; 9787 goto free_sas_node; 9788 } 9789 9790 hpsa_sas_phy = hpsa_alloc_sas_phy(hpsa_sas_port); 9791 if (!hpsa_sas_phy) { 9792 rc = -ENODEV; 9793 goto free_sas_port; 9794 } 9795 9796 rc = hpsa_sas_port_add_phy(hpsa_sas_phy); 9797 if (rc) 9798 goto free_sas_phy; 9799 9800 h->sas_host = hpsa_sas_node; 9801 9802 return 0; 9803 9804 free_sas_phy: 9805 hpsa_free_sas_phy(hpsa_sas_phy); 9806 free_sas_port: 9807 hpsa_free_sas_port(hpsa_sas_port); 9808 free_sas_node: 9809 hpsa_free_sas_node(hpsa_sas_node); 9810 9811 return rc; 9812 } 9813 9814 static void hpsa_delete_sas_host(struct ctlr_info *h) 9815 { 9816 hpsa_free_sas_node(h->sas_host); 9817 } 9818 9819 static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node, 9820 struct hpsa_scsi_dev_t *device) 9821 { 9822 int rc; 9823 struct hpsa_sas_port *hpsa_sas_port; 9824 struct sas_rphy *rphy; 9825 9826 hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, device->sas_address); 9827 if (!hpsa_sas_port) 9828 return -ENOMEM; 9829 9830 rphy = sas_end_device_alloc(hpsa_sas_port->port); 9831 if (!rphy) { 9832 rc = -ENODEV; 9833 goto free_sas_port; 9834 } 9835 9836 hpsa_sas_port->rphy = rphy; 9837 device->sas_port = hpsa_sas_port; 9838 9839 rc = hpsa_sas_port_add_rphy(hpsa_sas_port, rphy); 9840 if (rc) 9841 goto free_sas_port; 9842 9843 return 0; 9844 9845 free_sas_port: 9846 hpsa_free_sas_port(hpsa_sas_port); 9847 device->sas_port = NULL; 9848 9849 return rc; 9850 } 9851 9852 static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device) 9853 { 9854 if (device->sas_port) { 9855 hpsa_free_sas_port(device->sas_port); 9856 device->sas_port = NULL; 9857 } 9858 } 9859 9860 static int 9861 hpsa_sas_get_linkerrors(struct sas_phy *phy) 9862 { 9863 return 0; 9864 } 9865 9866 static int 9867 hpsa_sas_get_enclosure_identifier(struct sas_rphy *rphy, u64 *identifier) 9868 { 9869 *identifier = 0; 9870 return 0; 9871 } 9872 9873 static int 9874 hpsa_sas_get_bay_identifier(struct sas_rphy *rphy) 9875 { 9876 return -ENXIO; 9877 } 9878 9879 static int 9880 hpsa_sas_phy_reset(struct sas_phy *phy, int hard_reset) 9881 { 9882 return 0; 9883 } 9884 9885 static int 9886 hpsa_sas_phy_enable(struct sas_phy *phy, int enable) 9887 { 9888 return 0; 9889 } 9890 9891 static int 9892 hpsa_sas_phy_setup(struct sas_phy *phy) 9893 { 9894 return 0; 9895 } 9896 9897 static void 9898 hpsa_sas_phy_release(struct sas_phy *phy) 9899 { 9900 } 9901 9902 static int 9903 hpsa_sas_phy_speed(struct sas_phy *phy, struct sas_phy_linkrates *rates) 9904 { 9905 return -EINVAL; 9906 } 9907 9908 /* SMP = Serial Management Protocol */ 9909 static int 9910 hpsa_sas_smp_handler(struct Scsi_Host *shost, struct sas_rphy *rphy, 9911 struct request *req) 9912 { 9913 return -EINVAL; 9914 } 9915 9916 static struct sas_function_template hpsa_sas_transport_functions = { 9917 .get_linkerrors = hpsa_sas_get_linkerrors, 9918 .get_enclosure_identifier = hpsa_sas_get_enclosure_identifier, 9919 .get_bay_identifier = hpsa_sas_get_bay_identifier, 9920 .phy_reset = hpsa_sas_phy_reset, 9921 .phy_enable = hpsa_sas_phy_enable, 9922 .phy_setup = hpsa_sas_phy_setup, 9923 .phy_release = hpsa_sas_phy_release, 9924 .set_phy_speed = hpsa_sas_phy_speed, 9925 .smp_handler = hpsa_sas_smp_handler, 9926 }; 9927 9928 /* 9929 * This is it. Register the PCI driver information for the cards we control 9930 * the OS will call our registered routines when it finds one of our cards. 9931 */ 9932 static int __init hpsa_init(void) 9933 { 9934 int rc; 9935 9936 hpsa_sas_transport_template = 9937 sas_attach_transport(&hpsa_sas_transport_functions); 9938 if (!hpsa_sas_transport_template) 9939 return -ENODEV; 9940 9941 rc = pci_register_driver(&hpsa_pci_driver); 9942 9943 if (rc) 9944 sas_release_transport(hpsa_sas_transport_template); 9945 9946 return rc; 9947 } 9948 9949 static void __exit hpsa_cleanup(void) 9950 { 9951 pci_unregister_driver(&hpsa_pci_driver); 9952 sas_release_transport(hpsa_sas_transport_template); 9953 } 9954 9955 static void __attribute__((unused)) verify_offsets(void) 9956 { 9957 #define VERIFY_OFFSET(member, offset) \ 9958 BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset) 9959 9960 VERIFY_OFFSET(structure_size, 0); 9961 VERIFY_OFFSET(volume_blk_size, 4); 9962 VERIFY_OFFSET(volume_blk_cnt, 8); 9963 VERIFY_OFFSET(phys_blk_shift, 16); 9964 VERIFY_OFFSET(parity_rotation_shift, 17); 9965 VERIFY_OFFSET(strip_size, 18); 9966 VERIFY_OFFSET(disk_starting_blk, 20); 9967 VERIFY_OFFSET(disk_blk_cnt, 28); 9968 VERIFY_OFFSET(data_disks_per_row, 36); 9969 VERIFY_OFFSET(metadata_disks_per_row, 38); 9970 VERIFY_OFFSET(row_cnt, 40); 9971 VERIFY_OFFSET(layout_map_count, 42); 9972 VERIFY_OFFSET(flags, 44); 9973 VERIFY_OFFSET(dekindex, 46); 9974 /* VERIFY_OFFSET(reserved, 48 */ 9975 VERIFY_OFFSET(data, 64); 9976 9977 #undef VERIFY_OFFSET 9978 9979 #define VERIFY_OFFSET(member, offset) \ 9980 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset) 9981 9982 VERIFY_OFFSET(IU_type, 0); 9983 VERIFY_OFFSET(direction, 1); 9984 VERIFY_OFFSET(reply_queue, 2); 9985 /* VERIFY_OFFSET(reserved1, 3); */ 9986 VERIFY_OFFSET(scsi_nexus, 4); 9987 VERIFY_OFFSET(Tag, 8); 9988 VERIFY_OFFSET(cdb, 16); 9989 VERIFY_OFFSET(cciss_lun, 32); 9990 VERIFY_OFFSET(data_len, 40); 9991 VERIFY_OFFSET(cmd_priority_task_attr, 44); 9992 VERIFY_OFFSET(sg_count, 45); 9993 /* VERIFY_OFFSET(reserved3 */ 9994 VERIFY_OFFSET(err_ptr, 48); 9995 VERIFY_OFFSET(err_len, 56); 9996 /* VERIFY_OFFSET(reserved4 */ 9997 VERIFY_OFFSET(sg, 64); 9998 9999 #undef VERIFY_OFFSET 10000 10001 #define VERIFY_OFFSET(member, offset) \ 10002 BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset) 10003 10004 VERIFY_OFFSET(dev_handle, 0x00); 10005 VERIFY_OFFSET(reserved1, 0x02); 10006 VERIFY_OFFSET(function, 0x03); 10007 VERIFY_OFFSET(reserved2, 0x04); 10008 VERIFY_OFFSET(err_info, 0x0C); 10009 VERIFY_OFFSET(reserved3, 0x10); 10010 VERIFY_OFFSET(err_info_len, 0x12); 10011 VERIFY_OFFSET(reserved4, 0x13); 10012 VERIFY_OFFSET(sgl_offset, 0x14); 10013 VERIFY_OFFSET(reserved5, 0x15); 10014 VERIFY_OFFSET(transfer_len, 0x1C); 10015 VERIFY_OFFSET(reserved6, 0x20); 10016 VERIFY_OFFSET(io_flags, 0x24); 10017 VERIFY_OFFSET(reserved7, 0x26); 10018 VERIFY_OFFSET(LUN, 0x34); 10019 VERIFY_OFFSET(control, 0x3C); 10020 VERIFY_OFFSET(CDB, 0x40); 10021 VERIFY_OFFSET(reserved8, 0x50); 10022 VERIFY_OFFSET(host_context_flags, 0x60); 10023 VERIFY_OFFSET(timeout_sec, 0x62); 10024 VERIFY_OFFSET(ReplyQueue, 0x64); 10025 VERIFY_OFFSET(reserved9, 0x65); 10026 VERIFY_OFFSET(tag, 0x68); 10027 VERIFY_OFFSET(host_addr, 0x70); 10028 VERIFY_OFFSET(CISS_LUN, 0x78); 10029 VERIFY_OFFSET(SG, 0x78 + 8); 10030 #undef VERIFY_OFFSET 10031 } 10032 10033 module_init(hpsa_init); 10034 module_exit(hpsa_cleanup); 10035