1edd16368SStephen M. Cameron /* 2edd16368SStephen M. Cameron * Disk Array driver for HP Smart Array SAS controllers 394c7bc31SDon Brace * Copyright 2016 Microsemi Corporation 41358f6dcSDon Brace * Copyright 2014-2015 PMC-Sierra, Inc. 51358f6dcSDon Brace * Copyright 2000,2009-2015 Hewlett-Packard Development Company, L.P. 6edd16368SStephen M. Cameron * 7edd16368SStephen M. Cameron * This program is free software; you can redistribute it and/or modify 8edd16368SStephen M. Cameron * it under the terms of the GNU General Public License as published by 9edd16368SStephen M. Cameron * the Free Software Foundation; version 2 of the License. 10edd16368SStephen M. Cameron * 11edd16368SStephen M. Cameron * This program is distributed in the hope that it will be useful, 12edd16368SStephen M. Cameron * but WITHOUT ANY WARRANTY; without even the implied warranty of 13edd16368SStephen M. Cameron * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or 14edd16368SStephen M. Cameron * NON INFRINGEMENT. See the GNU General Public License for more details. 15edd16368SStephen M. Cameron * 1694c7bc31SDon Brace * Questions/Comments/Bugfixes to esc.storagedev@microsemi.com 17edd16368SStephen M. Cameron * 18edd16368SStephen M. Cameron */ 19edd16368SStephen M. Cameron 20edd16368SStephen M. Cameron #include <linux/module.h> 21edd16368SStephen M. Cameron #include <linux/interrupt.h> 22edd16368SStephen M. Cameron #include <linux/types.h> 23edd16368SStephen M. Cameron #include <linux/pci.h> 24e5a44df8SMatthew Garrett #include <linux/pci-aspm.h> 25edd16368SStephen M. Cameron #include <linux/kernel.h> 26edd16368SStephen M. Cameron #include <linux/slab.h> 27edd16368SStephen M. Cameron #include <linux/delay.h> 28edd16368SStephen M. Cameron #include <linux/fs.h> 29edd16368SStephen M. Cameron #include <linux/timer.h> 30edd16368SStephen M. Cameron #include <linux/init.h> 31edd16368SStephen M. Cameron #include <linux/spinlock.h> 32edd16368SStephen M. Cameron #include <linux/compat.h> 33edd16368SStephen M. Cameron #include <linux/blktrace_api.h> 34edd16368SStephen M. Cameron #include <linux/uaccess.h> 35edd16368SStephen M. Cameron #include <linux/io.h> 36edd16368SStephen M. Cameron #include <linux/dma-mapping.h> 37edd16368SStephen M. Cameron #include <linux/completion.h> 38edd16368SStephen M. Cameron #include <linux/moduleparam.h> 39edd16368SStephen M. Cameron #include <scsi/scsi.h> 40edd16368SStephen M. Cameron #include <scsi/scsi_cmnd.h> 41edd16368SStephen M. Cameron #include <scsi/scsi_device.h> 42edd16368SStephen M. Cameron #include <scsi/scsi_host.h> 43667e23d4SStephen M. Cameron #include <scsi/scsi_tcq.h> 449437ac43SStephen Cameron #include <scsi/scsi_eh.h> 45d04e62b9SKevin Barnett #include <scsi/scsi_transport_sas.h> 4673153fe5SWebb Scales #include <scsi/scsi_dbg.h> 47edd16368SStephen M. Cameron #include <linux/cciss_ioctl.h> 48edd16368SStephen M. Cameron #include <linux/string.h> 49edd16368SStephen M. Cameron #include <linux/bitmap.h> 5060063497SArun Sharma #include <linux/atomic.h> 51a0c12413SStephen M. Cameron #include <linux/jiffies.h> 5242a91641SDon Brace #include <linux/percpu-defs.h> 53094963daSStephen M. Cameron #include <linux/percpu.h> 542b08b3e9SDon Brace #include <asm/unaligned.h> 55283b4a9bSStephen M. Cameron #include <asm/div64.h> 56edd16368SStephen M. Cameron #include "hpsa_cmd.h" 57edd16368SStephen M. Cameron #include "hpsa.h" 58edd16368SStephen M. Cameron 59ec2c3aa9SDon Brace /* 60ec2c3aa9SDon Brace * HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' 61ec2c3aa9SDon Brace * with an optional trailing '-' followed by a byte value (0-255). 62ec2c3aa9SDon Brace */ 6330c0061cSDon Brace #define HPSA_DRIVER_VERSION "3.4.20-0" 64edd16368SStephen M. Cameron #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")" 65f79cfec6SStephen M. Cameron #define HPSA "hpsa" 66edd16368SStephen M. Cameron 67007e7aa9SRobert Elliott /* How long to wait for CISS doorbell communication */ 68007e7aa9SRobert Elliott #define CLEAR_EVENT_WAIT_INTERVAL 20 /* ms for each msleep() call */ 69007e7aa9SRobert Elliott #define MODE_CHANGE_WAIT_INTERVAL 10 /* ms for each msleep() call */ 70007e7aa9SRobert Elliott #define MAX_CLEAR_EVENT_WAIT 30000 /* times 20 ms = 600 s */ 71007e7aa9SRobert Elliott #define MAX_MODE_CHANGE_WAIT 2000 /* times 10 ms = 20 s */ 72edd16368SStephen M. Cameron #define MAX_IOCTL_CONFIG_WAIT 1000 73edd16368SStephen M. Cameron 74edd16368SStephen M. Cameron /*define how many times we will try a command because of bus resets */ 75edd16368SStephen M. Cameron #define MAX_CMD_RETRIES 3 76edd16368SStephen M. Cameron 77edd16368SStephen M. Cameron /* Embedded module documentation macros - see modules.h */ 78edd16368SStephen M. Cameron MODULE_AUTHOR("Hewlett-Packard Company"); 79edd16368SStephen M. Cameron MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \ 80edd16368SStephen M. Cameron HPSA_DRIVER_VERSION); 81edd16368SStephen M. Cameron MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers"); 82edd16368SStephen M. Cameron MODULE_VERSION(HPSA_DRIVER_VERSION); 83edd16368SStephen M. Cameron MODULE_LICENSE("GPL"); 84edd16368SStephen M. Cameron 85edd16368SStephen M. Cameron static int hpsa_allow_any; 86edd16368SStephen M. Cameron module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR); 87edd16368SStephen M. Cameron MODULE_PARM_DESC(hpsa_allow_any, 88edd16368SStephen M. Cameron "Allow hpsa driver to access unknown HP Smart Array hardware"); 8902ec19c8SStephen M. Cameron static int hpsa_simple_mode; 9002ec19c8SStephen M. Cameron module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR); 9102ec19c8SStephen M. Cameron MODULE_PARM_DESC(hpsa_simple_mode, 9202ec19c8SStephen M. Cameron "Use 'simple mode' rather than 'performant mode'"); 93edd16368SStephen M. Cameron 94edd16368SStephen M. Cameron /* define the PCI info for the cards we can control */ 95edd16368SStephen M. Cameron static const struct pci_device_id hpsa_pci_device_id[] = { 96edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241}, 97edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243}, 98edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245}, 99edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247}, 100edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249}, 101163dbcd8SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A}, 102163dbcd8SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B}, 103f8b01eb9SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233}, 1049143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350}, 1059143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351}, 1069143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352}, 1079143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353}, 1089143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354}, 1099143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355}, 1109143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356}, 1117f1974a7SDon Brace {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103c, 0x1920}, 112fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1921}, 113fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1922}, 114fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1923}, 115fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1924}, 1167f1974a7SDon Brace {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103c, 0x1925}, 117fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1926}, 118fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1928}, 11997b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1929}, 12097b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BD}, 12197b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BE}, 12297b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BF}, 12397b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C0}, 12497b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C1}, 12597b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C2}, 12697b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C3}, 12797b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C4}, 12897b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C5}, 1293b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C6}, 13097b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C7}, 13197b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C8}, 13297b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C9}, 1333b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CA}, 1343b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CB}, 1353b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CC}, 1363b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CD}, 1373b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CE}, 138fdfa4b6dSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0580}, 139cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0581}, 140cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0582}, 141cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0583}, 142cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0584}, 143cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0585}, 1448e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076}, 1458e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087}, 1468e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D}, 1478e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088}, 1488e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f}, 149edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 150edd16368SStephen M. Cameron PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0}, 151edd16368SStephen M. Cameron {0,} 152edd16368SStephen M. Cameron }; 153edd16368SStephen M. Cameron 154edd16368SStephen M. Cameron MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id); 155edd16368SStephen M. Cameron 156edd16368SStephen M. Cameron /* board_id = Subsystem Device ID & Vendor ID 157edd16368SStephen M. Cameron * product = Marketing Name for the board 158edd16368SStephen M. Cameron * access = Address of the struct of function pointers 159edd16368SStephen M. Cameron */ 160edd16368SStephen M. Cameron static struct board_type products[] = { 161edd16368SStephen M. Cameron {0x3241103C, "Smart Array P212", &SA5_access}, 162edd16368SStephen M. Cameron {0x3243103C, "Smart Array P410", &SA5_access}, 163edd16368SStephen M. Cameron {0x3245103C, "Smart Array P410i", &SA5_access}, 164edd16368SStephen M. Cameron {0x3247103C, "Smart Array P411", &SA5_access}, 165edd16368SStephen M. Cameron {0x3249103C, "Smart Array P812", &SA5_access}, 166163dbcd8SMike Miller {0x324A103C, "Smart Array P712m", &SA5_access}, 167163dbcd8SMike Miller {0x324B103C, "Smart Array P711m", &SA5_access}, 1687d2cce58SStephen M. Cameron {0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */ 169fe0c9610SMike Miller {0x3350103C, "Smart Array P222", &SA5_access}, 170fe0c9610SMike Miller {0x3351103C, "Smart Array P420", &SA5_access}, 171fe0c9610SMike Miller {0x3352103C, "Smart Array P421", &SA5_access}, 172fe0c9610SMike Miller {0x3353103C, "Smart Array P822", &SA5_access}, 173fe0c9610SMike Miller {0x3354103C, "Smart Array P420i", &SA5_access}, 174fe0c9610SMike Miller {0x3355103C, "Smart Array P220i", &SA5_access}, 175fe0c9610SMike Miller {0x3356103C, "Smart Array P721m", &SA5_access}, 1767f1974a7SDon Brace {0x1920103C, "Smart Array P430i", &SA5_access}, 1771fd6c8e3SMike Miller {0x1921103C, "Smart Array P830i", &SA5_access}, 1781fd6c8e3SMike Miller {0x1922103C, "Smart Array P430", &SA5_access}, 1791fd6c8e3SMike Miller {0x1923103C, "Smart Array P431", &SA5_access}, 1801fd6c8e3SMike Miller {0x1924103C, "Smart Array P830", &SA5_access}, 1817f1974a7SDon Brace {0x1925103C, "Smart Array P831", &SA5_access}, 1821fd6c8e3SMike Miller {0x1926103C, "Smart Array P731m", &SA5_access}, 1831fd6c8e3SMike Miller {0x1928103C, "Smart Array P230i", &SA5_access}, 1841fd6c8e3SMike Miller {0x1929103C, "Smart Array P530", &SA5_access}, 18527fb8137SDon Brace {0x21BD103C, "Smart Array P244br", &SA5_access}, 18627fb8137SDon Brace {0x21BE103C, "Smart Array P741m", &SA5_access}, 18727fb8137SDon Brace {0x21BF103C, "Smart HBA H240ar", &SA5_access}, 18827fb8137SDon Brace {0x21C0103C, "Smart Array P440ar", &SA5_access}, 189c8ae0ab1SDon Brace {0x21C1103C, "Smart Array P840ar", &SA5_access}, 19027fb8137SDon Brace {0x21C2103C, "Smart Array P440", &SA5_access}, 19127fb8137SDon Brace {0x21C3103C, "Smart Array P441", &SA5_access}, 19297b9f53dSMike Miller {0x21C4103C, "Smart Array", &SA5_access}, 19327fb8137SDon Brace {0x21C5103C, "Smart Array P841", &SA5_access}, 19427fb8137SDon Brace {0x21C6103C, "Smart HBA H244br", &SA5_access}, 19527fb8137SDon Brace {0x21C7103C, "Smart HBA H240", &SA5_access}, 19627fb8137SDon Brace {0x21C8103C, "Smart HBA H241", &SA5_access}, 19797b9f53dSMike Miller {0x21C9103C, "Smart Array", &SA5_access}, 19827fb8137SDon Brace {0x21CA103C, "Smart Array P246br", &SA5_access}, 19927fb8137SDon Brace {0x21CB103C, "Smart Array P840", &SA5_access}, 2003b7a45e5SJoe Handzik {0x21CC103C, "Smart Array", &SA5_access}, 2013b7a45e5SJoe Handzik {0x21CD103C, "Smart Array", &SA5_access}, 20227fb8137SDon Brace {0x21CE103C, "Smart HBA", &SA5_access}, 203fdfa4b6dSDon Brace {0x05809005, "SmartHBA-SA", &SA5_access}, 204cbb47dcbSDon Brace {0x05819005, "SmartHBA-SA 8i", &SA5_access}, 205cbb47dcbSDon Brace {0x05829005, "SmartHBA-SA 8i8e", &SA5_access}, 206cbb47dcbSDon Brace {0x05839005, "SmartHBA-SA 8e", &SA5_access}, 207cbb47dcbSDon Brace {0x05849005, "SmartHBA-SA 16i", &SA5_access}, 208cbb47dcbSDon Brace {0x05859005, "SmartHBA-SA 4i4e", &SA5_access}, 2098e616a5eSStephen M. Cameron {0x00761590, "HP Storage P1224 Array Controller", &SA5_access}, 2108e616a5eSStephen M. Cameron {0x00871590, "HP Storage P1224e Array Controller", &SA5_access}, 2118e616a5eSStephen M. Cameron {0x007D1590, "HP Storage P1228 Array Controller", &SA5_access}, 2128e616a5eSStephen M. Cameron {0x00881590, "HP Storage P1228e Array Controller", &SA5_access}, 2138e616a5eSStephen M. Cameron {0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access}, 214edd16368SStephen M. Cameron {0xFFFF103C, "Unknown Smart Array", &SA5_access}, 215edd16368SStephen M. Cameron }; 216edd16368SStephen M. Cameron 217d04e62b9SKevin Barnett static struct scsi_transport_template *hpsa_sas_transport_template; 218d04e62b9SKevin Barnett static int hpsa_add_sas_host(struct ctlr_info *h); 219d04e62b9SKevin Barnett static void hpsa_delete_sas_host(struct ctlr_info *h); 220d04e62b9SKevin Barnett static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node, 221d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *device); 222d04e62b9SKevin Barnett static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device); 223d04e62b9SKevin Barnett static struct hpsa_scsi_dev_t 224d04e62b9SKevin Barnett *hpsa_find_device_by_sas_rphy(struct ctlr_info *h, 225d04e62b9SKevin Barnett struct sas_rphy *rphy); 226d04e62b9SKevin Barnett 227a58e7e53SWebb Scales #define SCSI_CMD_BUSY ((struct scsi_cmnd *)&hpsa_cmd_busy) 228a58e7e53SWebb Scales static const struct scsi_cmnd hpsa_cmd_busy; 229a58e7e53SWebb Scales #define SCSI_CMD_IDLE ((struct scsi_cmnd *)&hpsa_cmd_idle) 230a58e7e53SWebb Scales static const struct scsi_cmnd hpsa_cmd_idle; 231edd16368SStephen M. Cameron static int number_of_controllers; 232edd16368SStephen M. Cameron 23310f66018SStephen M. Cameron static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id); 23410f66018SStephen M. Cameron static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id); 23542a91641SDon Brace static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg); 236edd16368SStephen M. Cameron 237edd16368SStephen M. Cameron #ifdef CONFIG_COMPAT 23842a91641SDon Brace static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, 23942a91641SDon Brace void __user *arg); 240edd16368SStephen M. Cameron #endif 241edd16368SStephen M. Cameron 242edd16368SStephen M. Cameron static void cmd_free(struct ctlr_info *h, struct CommandList *c); 243edd16368SStephen M. Cameron static struct CommandList *cmd_alloc(struct ctlr_info *h); 24473153fe5SWebb Scales static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c); 24573153fe5SWebb Scales static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h, 24673153fe5SWebb Scales struct scsi_cmnd *scmd); 247a2dac136SStephen M. Cameron static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 248b7bb24ebSStephen M. Cameron void *buff, size_t size, u16 page_code, unsigned char *scsi3addr, 249edd16368SStephen M. Cameron int cmd_type); 2502c143342SRobert Elliott static void hpsa_free_cmd_pool(struct ctlr_info *h); 251b7bb24ebSStephen M. Cameron #define VPD_PAGE (1 << 8) 252b48d9804SDon Brace #define HPSA_SIMPLE_ERROR_BITS 0x03 253edd16368SStephen M. Cameron 254f281233dSJeff Garzik static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd); 255a08a8471SStephen M. Cameron static void hpsa_scan_start(struct Scsi_Host *); 256a08a8471SStephen M. Cameron static int hpsa_scan_finished(struct Scsi_Host *sh, 257a08a8471SStephen M. Cameron unsigned long elapsed_time); 2587c0a0229SDon Brace static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth); 259edd16368SStephen M. Cameron 260edd16368SStephen M. Cameron static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd); 261edd16368SStephen M. Cameron static int hpsa_slave_alloc(struct scsi_device *sdev); 26241ce4c35SStephen Cameron static int hpsa_slave_configure(struct scsi_device *sdev); 263edd16368SStephen M. Cameron static void hpsa_slave_destroy(struct scsi_device *sdev); 264edd16368SStephen M. Cameron 2658aa60681SDon Brace static void hpsa_update_scsi_devices(struct ctlr_info *h); 266edd16368SStephen M. Cameron static int check_for_unit_attention(struct ctlr_info *h, 267edd16368SStephen M. Cameron struct CommandList *c); 268edd16368SStephen M. Cameron static void check_ioctl_unit_attention(struct ctlr_info *h, 269edd16368SStephen M. Cameron struct CommandList *c); 270303932fdSDon Brace /* performant mode helper functions */ 271303932fdSDon Brace static void calc_bucket_map(int *bucket, int num_buckets, 2722b08b3e9SDon Brace int nsgs, int min_blocks, u32 *bucket_map); 273105a3dbcSRobert Elliott static void hpsa_free_performant_mode(struct ctlr_info *h); 274105a3dbcSRobert Elliott static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h); 275254f796bSMatt Gates static inline u32 next_command(struct ctlr_info *h, u8 q); 2766f039790SGreg Kroah-Hartman static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 2776f039790SGreg Kroah-Hartman u32 *cfg_base_addr, u64 *cfg_base_addr_index, 2781df8552aSStephen M. Cameron u64 *cfg_offset); 2796f039790SGreg Kroah-Hartman static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 2801df8552aSStephen M. Cameron unsigned long *memory_bar); 2816f039790SGreg Kroah-Hartman static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id); 282bfd7546cSDon Brace static int wait_for_device_to_become_ready(struct ctlr_info *h, 283bfd7546cSDon Brace unsigned char lunaddr[], 284bfd7546cSDon Brace int reply_queue); 2856f039790SGreg Kroah-Hartman static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 2866f039790SGreg Kroah-Hartman int wait_for_ready); 28775167d2cSStephen M. Cameron static inline void finish_cmd(struct CommandList *c); 288c706a795SRobert Elliott static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h); 289fe5389c8SStephen M. Cameron #define BOARD_NOT_READY 0 290fe5389c8SStephen M. Cameron #define BOARD_READY 1 29123100dd9SStephen M. Cameron static void hpsa_drain_accel_commands(struct ctlr_info *h); 29276438d08SStephen M. Cameron static void hpsa_flush_cache(struct ctlr_info *h); 293c349775eSScott Teel static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h, 294c349775eSScott Teel struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 29503383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk); 296080ef1ccSDon Brace static void hpsa_command_resubmit_worker(struct work_struct *work); 29725163bd5SWebb Scales static u32 lockup_detected(struct ctlr_info *h); 29825163bd5SWebb Scales static int detect_controller_lockup(struct ctlr_info *h); 299c2adae44SScott Teel static void hpsa_disable_rld_caching(struct ctlr_info *h); 300d04e62b9SKevin Barnett static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 301d04e62b9SKevin Barnett struct ReportExtendedLUNdata *buf, int bufsize); 3028383278dSScott Teel static bool hpsa_vpd_page_supported(struct ctlr_info *h, 3038383278dSScott Teel unsigned char scsi3addr[], u8 page); 30434592254SScott Teel static int hpsa_luns_changed(struct ctlr_info *h); 305ba74fdc4SDon Brace static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c, 306ba74fdc4SDon Brace struct hpsa_scsi_dev_t *dev, 307ba74fdc4SDon Brace unsigned char *scsi3addr); 308edd16368SStephen M. Cameron 309edd16368SStephen M. Cameron static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev) 310edd16368SStephen M. Cameron { 311edd16368SStephen M. Cameron unsigned long *priv = shost_priv(sdev->host); 312edd16368SStephen M. Cameron return (struct ctlr_info *) *priv; 313edd16368SStephen M. Cameron } 314edd16368SStephen M. Cameron 315a23513e8SStephen M. Cameron static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh) 316a23513e8SStephen M. Cameron { 317a23513e8SStephen M. Cameron unsigned long *priv = shost_priv(sh); 318a23513e8SStephen M. Cameron return (struct ctlr_info *) *priv; 319a23513e8SStephen M. Cameron } 320a23513e8SStephen M. Cameron 321a58e7e53SWebb Scales static inline bool hpsa_is_cmd_idle(struct CommandList *c) 322a58e7e53SWebb Scales { 323a58e7e53SWebb Scales return c->scsi_cmd == SCSI_CMD_IDLE; 324a58e7e53SWebb Scales } 325a58e7e53SWebb Scales 326d604f533SWebb Scales static inline bool hpsa_is_pending_event(struct CommandList *c) 327d604f533SWebb Scales { 32808ec46f6SDon Brace return c->reset_pending; 329d604f533SWebb Scales } 330d604f533SWebb Scales 3319437ac43SStephen Cameron /* extract sense key, asc, and ascq from sense data. -1 means invalid. */ 3329437ac43SStephen Cameron static void decode_sense_data(const u8 *sense_data, int sense_data_len, 3339437ac43SStephen Cameron u8 *sense_key, u8 *asc, u8 *ascq) 3349437ac43SStephen Cameron { 3359437ac43SStephen Cameron struct scsi_sense_hdr sshdr; 3369437ac43SStephen Cameron bool rc; 3379437ac43SStephen Cameron 3389437ac43SStephen Cameron *sense_key = -1; 3399437ac43SStephen Cameron *asc = -1; 3409437ac43SStephen Cameron *ascq = -1; 3419437ac43SStephen Cameron 3429437ac43SStephen Cameron if (sense_data_len < 1) 3439437ac43SStephen Cameron return; 3449437ac43SStephen Cameron 3459437ac43SStephen Cameron rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr); 3469437ac43SStephen Cameron if (rc) { 3479437ac43SStephen Cameron *sense_key = sshdr.sense_key; 3489437ac43SStephen Cameron *asc = sshdr.asc; 3499437ac43SStephen Cameron *ascq = sshdr.ascq; 3509437ac43SStephen Cameron } 3519437ac43SStephen Cameron } 3529437ac43SStephen Cameron 353edd16368SStephen M. Cameron static int check_for_unit_attention(struct ctlr_info *h, 354edd16368SStephen M. Cameron struct CommandList *c) 355edd16368SStephen M. Cameron { 3569437ac43SStephen Cameron u8 sense_key, asc, ascq; 3579437ac43SStephen Cameron int sense_len; 3589437ac43SStephen Cameron 3599437ac43SStephen Cameron if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo)) 3609437ac43SStephen Cameron sense_len = sizeof(c->err_info->SenseInfo); 3619437ac43SStephen Cameron else 3629437ac43SStephen Cameron sense_len = c->err_info->SenseLen; 3639437ac43SStephen Cameron 3649437ac43SStephen Cameron decode_sense_data(c->err_info->SenseInfo, sense_len, 3659437ac43SStephen Cameron &sense_key, &asc, &ascq); 36681c27557SDon Brace if (sense_key != UNIT_ATTENTION || asc == 0xff) 367edd16368SStephen M. Cameron return 0; 368edd16368SStephen M. Cameron 3699437ac43SStephen Cameron switch (asc) { 370edd16368SStephen M. Cameron case STATE_CHANGED: 3719437ac43SStephen Cameron dev_warn(&h->pdev->dev, 3722946e82bSRobert Elliott "%s: a state change detected, command retried\n", 3732946e82bSRobert Elliott h->devname); 374edd16368SStephen M. Cameron break; 375edd16368SStephen M. Cameron case LUN_FAILED: 3767f73695aSStephen M. Cameron dev_warn(&h->pdev->dev, 3772946e82bSRobert Elliott "%s: LUN failure detected\n", h->devname); 378edd16368SStephen M. Cameron break; 379edd16368SStephen M. Cameron case REPORT_LUNS_CHANGED: 3807f73695aSStephen M. Cameron dev_warn(&h->pdev->dev, 3812946e82bSRobert Elliott "%s: report LUN data changed\n", h->devname); 382edd16368SStephen M. Cameron /* 3834f4eb9f1SScott Teel * Note: this REPORT_LUNS_CHANGED condition only occurs on the external 3844f4eb9f1SScott Teel * target (array) devices. 385edd16368SStephen M. Cameron */ 386edd16368SStephen M. Cameron break; 387edd16368SStephen M. Cameron case POWER_OR_RESET: 3882946e82bSRobert Elliott dev_warn(&h->pdev->dev, 3892946e82bSRobert Elliott "%s: a power on or device reset detected\n", 3902946e82bSRobert Elliott h->devname); 391edd16368SStephen M. Cameron break; 392edd16368SStephen M. Cameron case UNIT_ATTENTION_CLEARED: 3932946e82bSRobert Elliott dev_warn(&h->pdev->dev, 3942946e82bSRobert Elliott "%s: unit attention cleared by another initiator\n", 3952946e82bSRobert Elliott h->devname); 396edd16368SStephen M. Cameron break; 397edd16368SStephen M. Cameron default: 3982946e82bSRobert Elliott dev_warn(&h->pdev->dev, 3992946e82bSRobert Elliott "%s: unknown unit attention detected\n", 4002946e82bSRobert Elliott h->devname); 401edd16368SStephen M. Cameron break; 402edd16368SStephen M. Cameron } 403edd16368SStephen M. Cameron return 1; 404edd16368SStephen M. Cameron } 405edd16368SStephen M. Cameron 406852af20aSMatt Bondurant static int check_for_busy(struct ctlr_info *h, struct CommandList *c) 407852af20aSMatt Bondurant { 408852af20aSMatt Bondurant if (c->err_info->CommandStatus != CMD_TARGET_STATUS || 409852af20aSMatt Bondurant (c->err_info->ScsiStatus != SAM_STAT_BUSY && 410852af20aSMatt Bondurant c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL)) 411852af20aSMatt Bondurant return 0; 412852af20aSMatt Bondurant dev_warn(&h->pdev->dev, HPSA "device busy"); 413852af20aSMatt Bondurant return 1; 414852af20aSMatt Bondurant } 415852af20aSMatt Bondurant 416e985c58fSStephen Cameron static u32 lockup_detected(struct ctlr_info *h); 417e985c58fSStephen Cameron static ssize_t host_show_lockup_detected(struct device *dev, 418e985c58fSStephen Cameron struct device_attribute *attr, char *buf) 419e985c58fSStephen Cameron { 420e985c58fSStephen Cameron int ld; 421e985c58fSStephen Cameron struct ctlr_info *h; 422e985c58fSStephen Cameron struct Scsi_Host *shost = class_to_shost(dev); 423e985c58fSStephen Cameron 424e985c58fSStephen Cameron h = shost_to_hba(shost); 425e985c58fSStephen Cameron ld = lockup_detected(h); 426e985c58fSStephen Cameron 427e985c58fSStephen Cameron return sprintf(buf, "ld=%d\n", ld); 428e985c58fSStephen Cameron } 429e985c58fSStephen Cameron 430da0697bdSScott Teel static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev, 431da0697bdSScott Teel struct device_attribute *attr, 432da0697bdSScott Teel const char *buf, size_t count) 433da0697bdSScott Teel { 434da0697bdSScott Teel int status, len; 435da0697bdSScott Teel struct ctlr_info *h; 436da0697bdSScott Teel struct Scsi_Host *shost = class_to_shost(dev); 437da0697bdSScott Teel char tmpbuf[10]; 438da0697bdSScott Teel 439da0697bdSScott Teel if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO)) 440da0697bdSScott Teel return -EACCES; 441da0697bdSScott Teel len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count; 442da0697bdSScott Teel strncpy(tmpbuf, buf, len); 443da0697bdSScott Teel tmpbuf[len] = '\0'; 444da0697bdSScott Teel if (sscanf(tmpbuf, "%d", &status) != 1) 445da0697bdSScott Teel return -EINVAL; 446da0697bdSScott Teel h = shost_to_hba(shost); 447da0697bdSScott Teel h->acciopath_status = !!status; 448da0697bdSScott Teel dev_warn(&h->pdev->dev, 449da0697bdSScott Teel "hpsa: HP SSD Smart Path %s via sysfs update.\n", 450da0697bdSScott Teel h->acciopath_status ? "enabled" : "disabled"); 451da0697bdSScott Teel return count; 452da0697bdSScott Teel } 453da0697bdSScott Teel 4542ba8bfc8SStephen M. Cameron static ssize_t host_store_raid_offload_debug(struct device *dev, 4552ba8bfc8SStephen M. Cameron struct device_attribute *attr, 4562ba8bfc8SStephen M. Cameron const char *buf, size_t count) 4572ba8bfc8SStephen M. Cameron { 4582ba8bfc8SStephen M. Cameron int debug_level, len; 4592ba8bfc8SStephen M. Cameron struct ctlr_info *h; 4602ba8bfc8SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 4612ba8bfc8SStephen M. Cameron char tmpbuf[10]; 4622ba8bfc8SStephen M. Cameron 4632ba8bfc8SStephen M. Cameron if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO)) 4642ba8bfc8SStephen M. Cameron return -EACCES; 4652ba8bfc8SStephen M. Cameron len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count; 4662ba8bfc8SStephen M. Cameron strncpy(tmpbuf, buf, len); 4672ba8bfc8SStephen M. Cameron tmpbuf[len] = '\0'; 4682ba8bfc8SStephen M. Cameron if (sscanf(tmpbuf, "%d", &debug_level) != 1) 4692ba8bfc8SStephen M. Cameron return -EINVAL; 4702ba8bfc8SStephen M. Cameron if (debug_level < 0) 4712ba8bfc8SStephen M. Cameron debug_level = 0; 4722ba8bfc8SStephen M. Cameron h = shost_to_hba(shost); 4732ba8bfc8SStephen M. Cameron h->raid_offload_debug = debug_level; 4742ba8bfc8SStephen M. Cameron dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n", 4752ba8bfc8SStephen M. Cameron h->raid_offload_debug); 4762ba8bfc8SStephen M. Cameron return count; 4772ba8bfc8SStephen M. Cameron } 4782ba8bfc8SStephen M. Cameron 479edd16368SStephen M. Cameron static ssize_t host_store_rescan(struct device *dev, 480edd16368SStephen M. Cameron struct device_attribute *attr, 481edd16368SStephen M. Cameron const char *buf, size_t count) 482edd16368SStephen M. Cameron { 483edd16368SStephen M. Cameron struct ctlr_info *h; 484edd16368SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 485a23513e8SStephen M. Cameron h = shost_to_hba(shost); 48631468401SMike Miller hpsa_scan_start(h->scsi_host); 487edd16368SStephen M. Cameron return count; 488edd16368SStephen M. Cameron } 489edd16368SStephen M. Cameron 490d28ce020SStephen M. Cameron static ssize_t host_show_firmware_revision(struct device *dev, 491d28ce020SStephen M. Cameron struct device_attribute *attr, char *buf) 492d28ce020SStephen M. Cameron { 493d28ce020SStephen M. Cameron struct ctlr_info *h; 494d28ce020SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 495d28ce020SStephen M. Cameron unsigned char *fwrev; 496d28ce020SStephen M. Cameron 497d28ce020SStephen M. Cameron h = shost_to_hba(shost); 498d28ce020SStephen M. Cameron if (!h->hba_inquiry_data) 499d28ce020SStephen M. Cameron return 0; 500d28ce020SStephen M. Cameron fwrev = &h->hba_inquiry_data[32]; 501d28ce020SStephen M. Cameron return snprintf(buf, 20, "%c%c%c%c\n", 502d28ce020SStephen M. Cameron fwrev[0], fwrev[1], fwrev[2], fwrev[3]); 503d28ce020SStephen M. Cameron } 504d28ce020SStephen M. Cameron 50594a13649SStephen M. Cameron static ssize_t host_show_commands_outstanding(struct device *dev, 50694a13649SStephen M. Cameron struct device_attribute *attr, char *buf) 50794a13649SStephen M. Cameron { 50894a13649SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 50994a13649SStephen M. Cameron struct ctlr_info *h = shost_to_hba(shost); 51094a13649SStephen M. Cameron 5110cbf768eSStephen M. Cameron return snprintf(buf, 20, "%d\n", 5120cbf768eSStephen M. Cameron atomic_read(&h->commands_outstanding)); 51394a13649SStephen M. Cameron } 51494a13649SStephen M. Cameron 515745a7a25SStephen M. Cameron static ssize_t host_show_transport_mode(struct device *dev, 516745a7a25SStephen M. Cameron struct device_attribute *attr, char *buf) 517745a7a25SStephen M. Cameron { 518745a7a25SStephen M. Cameron struct ctlr_info *h; 519745a7a25SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 520745a7a25SStephen M. Cameron 521745a7a25SStephen M. Cameron h = shost_to_hba(shost); 522745a7a25SStephen M. Cameron return snprintf(buf, 20, "%s\n", 523960a30e7SStephen M. Cameron h->transMethod & CFGTBL_Trans_Performant ? 524745a7a25SStephen M. Cameron "performant" : "simple"); 525745a7a25SStephen M. Cameron } 526745a7a25SStephen M. Cameron 527da0697bdSScott Teel static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev, 528da0697bdSScott Teel struct device_attribute *attr, char *buf) 529da0697bdSScott Teel { 530da0697bdSScott Teel struct ctlr_info *h; 531da0697bdSScott Teel struct Scsi_Host *shost = class_to_shost(dev); 532da0697bdSScott Teel 533da0697bdSScott Teel h = shost_to_hba(shost); 534da0697bdSScott Teel return snprintf(buf, 30, "HP SSD Smart Path %s\n", 535da0697bdSScott Teel (h->acciopath_status == 1) ? "enabled" : "disabled"); 536da0697bdSScott Teel } 537da0697bdSScott Teel 53846380786SStephen M. Cameron /* List of controllers which cannot be hard reset on kexec with reset_devices */ 539941b1cdaSStephen M. Cameron static u32 unresettable_controller[] = { 540941b1cdaSStephen M. Cameron 0x324a103C, /* Smart Array P712m */ 541941b1cdaSStephen M. Cameron 0x324b103C, /* Smart Array P711m */ 542941b1cdaSStephen M. Cameron 0x3223103C, /* Smart Array P800 */ 543941b1cdaSStephen M. Cameron 0x3234103C, /* Smart Array P400 */ 544941b1cdaSStephen M. Cameron 0x3235103C, /* Smart Array P400i */ 545941b1cdaSStephen M. Cameron 0x3211103C, /* Smart Array E200i */ 546941b1cdaSStephen M. Cameron 0x3212103C, /* Smart Array E200 */ 547941b1cdaSStephen M. Cameron 0x3213103C, /* Smart Array E200i */ 548941b1cdaSStephen M. Cameron 0x3214103C, /* Smart Array E200i */ 549941b1cdaSStephen M. Cameron 0x3215103C, /* Smart Array E200i */ 550941b1cdaSStephen M. Cameron 0x3237103C, /* Smart Array E500 */ 551941b1cdaSStephen M. Cameron 0x323D103C, /* Smart Array P700m */ 5527af0abbcSTomas Henzl 0x40800E11, /* Smart Array 5i */ 553941b1cdaSStephen M. Cameron 0x409C0E11, /* Smart Array 6400 */ 554941b1cdaSStephen M. Cameron 0x409D0E11, /* Smart Array 6400 EM */ 5555a4f934eSTomas Henzl 0x40700E11, /* Smart Array 5300 */ 5565a4f934eSTomas Henzl 0x40820E11, /* Smart Array 532 */ 5575a4f934eSTomas Henzl 0x40830E11, /* Smart Array 5312 */ 5585a4f934eSTomas Henzl 0x409A0E11, /* Smart Array 641 */ 5595a4f934eSTomas Henzl 0x409B0E11, /* Smart Array 642 */ 5605a4f934eSTomas Henzl 0x40910E11, /* Smart Array 6i */ 561941b1cdaSStephen M. Cameron }; 562941b1cdaSStephen M. Cameron 56346380786SStephen M. Cameron /* List of controllers which cannot even be soft reset */ 56446380786SStephen M. Cameron static u32 soft_unresettable_controller[] = { 5657af0abbcSTomas Henzl 0x40800E11, /* Smart Array 5i */ 5665a4f934eSTomas Henzl 0x40700E11, /* Smart Array 5300 */ 5675a4f934eSTomas Henzl 0x40820E11, /* Smart Array 532 */ 5685a4f934eSTomas Henzl 0x40830E11, /* Smart Array 5312 */ 5695a4f934eSTomas Henzl 0x409A0E11, /* Smart Array 641 */ 5705a4f934eSTomas Henzl 0x409B0E11, /* Smart Array 642 */ 5715a4f934eSTomas Henzl 0x40910E11, /* Smart Array 6i */ 57246380786SStephen M. Cameron /* Exclude 640x boards. These are two pci devices in one slot 57346380786SStephen M. Cameron * which share a battery backed cache module. One controls the 57446380786SStephen M. Cameron * cache, the other accesses the cache through the one that controls 57546380786SStephen M. Cameron * it. If we reset the one controlling the cache, the other will 57646380786SStephen M. Cameron * likely not be happy. Just forbid resetting this conjoined mess. 57746380786SStephen M. Cameron * The 640x isn't really supported by hpsa anyway. 57846380786SStephen M. Cameron */ 57946380786SStephen M. Cameron 0x409C0E11, /* Smart Array 6400 */ 58046380786SStephen M. Cameron 0x409D0E11, /* Smart Array 6400 EM */ 58146380786SStephen M. Cameron }; 58246380786SStephen M. Cameron 5839b5c48c2SStephen Cameron static int board_id_in_array(u32 a[], int nelems, u32 board_id) 584941b1cdaSStephen M. Cameron { 585941b1cdaSStephen M. Cameron int i; 586941b1cdaSStephen M. Cameron 5879b5c48c2SStephen Cameron for (i = 0; i < nelems; i++) 5889b5c48c2SStephen Cameron if (a[i] == board_id) 589941b1cdaSStephen M. Cameron return 1; 5909b5c48c2SStephen Cameron return 0; 5919b5c48c2SStephen Cameron } 5929b5c48c2SStephen Cameron 5939b5c48c2SStephen Cameron static int ctlr_is_hard_resettable(u32 board_id) 5949b5c48c2SStephen Cameron { 5959b5c48c2SStephen Cameron return !board_id_in_array(unresettable_controller, 5969b5c48c2SStephen Cameron ARRAY_SIZE(unresettable_controller), board_id); 597941b1cdaSStephen M. Cameron } 598941b1cdaSStephen M. Cameron 59946380786SStephen M. Cameron static int ctlr_is_soft_resettable(u32 board_id) 60046380786SStephen M. Cameron { 6019b5c48c2SStephen Cameron return !board_id_in_array(soft_unresettable_controller, 6029b5c48c2SStephen Cameron ARRAY_SIZE(soft_unresettable_controller), board_id); 60346380786SStephen M. Cameron } 60446380786SStephen M. Cameron 60546380786SStephen M. Cameron static int ctlr_is_resettable(u32 board_id) 60646380786SStephen M. Cameron { 60746380786SStephen M. Cameron return ctlr_is_hard_resettable(board_id) || 60846380786SStephen M. Cameron ctlr_is_soft_resettable(board_id); 60946380786SStephen M. Cameron } 61046380786SStephen M. Cameron 611941b1cdaSStephen M. Cameron static ssize_t host_show_resettable(struct device *dev, 612941b1cdaSStephen M. Cameron struct device_attribute *attr, char *buf) 613941b1cdaSStephen M. Cameron { 614941b1cdaSStephen M. Cameron struct ctlr_info *h; 615941b1cdaSStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 616941b1cdaSStephen M. Cameron 617941b1cdaSStephen M. Cameron h = shost_to_hba(shost); 61846380786SStephen M. Cameron return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id)); 619941b1cdaSStephen M. Cameron } 620941b1cdaSStephen M. Cameron 621edd16368SStephen M. Cameron static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[]) 622edd16368SStephen M. Cameron { 623edd16368SStephen M. Cameron return (scsi3addr[3] & 0xC0) == 0x40; 624edd16368SStephen M. Cameron } 625edd16368SStephen M. Cameron 626f2ef0ce7SRobert Elliott static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6", 6277c59a0d4SDon Brace "1(+0)ADM", "UNKNOWN", "PHYS DRV" 628edd16368SStephen M. Cameron }; 6296b80b18fSScott Teel #define HPSA_RAID_0 0 6306b80b18fSScott Teel #define HPSA_RAID_4 1 6316b80b18fSScott Teel #define HPSA_RAID_1 2 /* also used for RAID 10 */ 6326b80b18fSScott Teel #define HPSA_RAID_5 3 /* also used for RAID 50 */ 6336b80b18fSScott Teel #define HPSA_RAID_51 4 6346b80b18fSScott Teel #define HPSA_RAID_6 5 /* also used for RAID 60 */ 6356b80b18fSScott Teel #define HPSA_RAID_ADM 6 /* also used for RAID 1+0 ADM */ 6367c59a0d4SDon Brace #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 2) 6377c59a0d4SDon Brace #define PHYSICAL_DRIVE (ARRAY_SIZE(raid_label) - 1) 638edd16368SStephen M. Cameron 639f3f01730SKevin Barnett static inline bool is_logical_device(struct hpsa_scsi_dev_t *device) 640f3f01730SKevin Barnett { 641f3f01730SKevin Barnett return !device->physical_device; 642f3f01730SKevin Barnett } 643edd16368SStephen M. Cameron 644edd16368SStephen M. Cameron static ssize_t raid_level_show(struct device *dev, 645edd16368SStephen M. Cameron struct device_attribute *attr, char *buf) 646edd16368SStephen M. Cameron { 647edd16368SStephen M. Cameron ssize_t l = 0; 64882a72c0aSStephen M. Cameron unsigned char rlevel; 649edd16368SStephen M. Cameron struct ctlr_info *h; 650edd16368SStephen M. Cameron struct scsi_device *sdev; 651edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *hdev; 652edd16368SStephen M. Cameron unsigned long flags; 653edd16368SStephen M. Cameron 654edd16368SStephen M. Cameron sdev = to_scsi_device(dev); 655edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 656edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 657edd16368SStephen M. Cameron hdev = sdev->hostdata; 658edd16368SStephen M. Cameron if (!hdev) { 659edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 660edd16368SStephen M. Cameron return -ENODEV; 661edd16368SStephen M. Cameron } 662edd16368SStephen M. Cameron 663edd16368SStephen M. Cameron /* Is this even a logical drive? */ 664f3f01730SKevin Barnett if (!is_logical_device(hdev)) { 665edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 666edd16368SStephen M. Cameron l = snprintf(buf, PAGE_SIZE, "N/A\n"); 667edd16368SStephen M. Cameron return l; 668edd16368SStephen M. Cameron } 669edd16368SStephen M. Cameron 670edd16368SStephen M. Cameron rlevel = hdev->raid_level; 671edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 67282a72c0aSStephen M. Cameron if (rlevel > RAID_UNKNOWN) 673edd16368SStephen M. Cameron rlevel = RAID_UNKNOWN; 674edd16368SStephen M. Cameron l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]); 675edd16368SStephen M. Cameron return l; 676edd16368SStephen M. Cameron } 677edd16368SStephen M. Cameron 678edd16368SStephen M. Cameron static ssize_t lunid_show(struct device *dev, 679edd16368SStephen M. Cameron struct device_attribute *attr, char *buf) 680edd16368SStephen M. Cameron { 681edd16368SStephen M. Cameron struct ctlr_info *h; 682edd16368SStephen M. Cameron struct scsi_device *sdev; 683edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *hdev; 684edd16368SStephen M. Cameron unsigned long flags; 685edd16368SStephen M. Cameron unsigned char lunid[8]; 686edd16368SStephen M. Cameron 687edd16368SStephen M. Cameron sdev = to_scsi_device(dev); 688edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 689edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 690edd16368SStephen M. Cameron hdev = sdev->hostdata; 691edd16368SStephen M. Cameron if (!hdev) { 692edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 693edd16368SStephen M. Cameron return -ENODEV; 694edd16368SStephen M. Cameron } 695edd16368SStephen M. Cameron memcpy(lunid, hdev->scsi3addr, sizeof(lunid)); 696edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 697609a70dfSRasmus Villemoes return snprintf(buf, 20, "0x%8phN\n", lunid); 698edd16368SStephen M. Cameron } 699edd16368SStephen M. Cameron 700edd16368SStephen M. Cameron static ssize_t unique_id_show(struct device *dev, 701edd16368SStephen M. Cameron struct device_attribute *attr, char *buf) 702edd16368SStephen M. Cameron { 703edd16368SStephen M. Cameron struct ctlr_info *h; 704edd16368SStephen M. Cameron struct scsi_device *sdev; 705edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *hdev; 706edd16368SStephen M. Cameron unsigned long flags; 707edd16368SStephen M. Cameron unsigned char sn[16]; 708edd16368SStephen M. Cameron 709edd16368SStephen M. Cameron sdev = to_scsi_device(dev); 710edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 711edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 712edd16368SStephen M. Cameron hdev = sdev->hostdata; 713edd16368SStephen M. Cameron if (!hdev) { 714edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 715edd16368SStephen M. Cameron return -ENODEV; 716edd16368SStephen M. Cameron } 717edd16368SStephen M. Cameron memcpy(sn, hdev->device_id, sizeof(sn)); 718edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 719edd16368SStephen M. Cameron return snprintf(buf, 16 * 2 + 2, 720edd16368SStephen M. Cameron "%02X%02X%02X%02X%02X%02X%02X%02X" 721edd16368SStephen M. Cameron "%02X%02X%02X%02X%02X%02X%02X%02X\n", 722edd16368SStephen M. Cameron sn[0], sn[1], sn[2], sn[3], 723edd16368SStephen M. Cameron sn[4], sn[5], sn[6], sn[7], 724edd16368SStephen M. Cameron sn[8], sn[9], sn[10], sn[11], 725edd16368SStephen M. Cameron sn[12], sn[13], sn[14], sn[15]); 726edd16368SStephen M. Cameron } 727edd16368SStephen M. Cameron 728ded1be4aSJoseph T Handzik static ssize_t sas_address_show(struct device *dev, 729ded1be4aSJoseph T Handzik struct device_attribute *attr, char *buf) 730ded1be4aSJoseph T Handzik { 731ded1be4aSJoseph T Handzik struct ctlr_info *h; 732ded1be4aSJoseph T Handzik struct scsi_device *sdev; 733ded1be4aSJoseph T Handzik struct hpsa_scsi_dev_t *hdev; 734ded1be4aSJoseph T Handzik unsigned long flags; 735ded1be4aSJoseph T Handzik u64 sas_address; 736ded1be4aSJoseph T Handzik 737ded1be4aSJoseph T Handzik sdev = to_scsi_device(dev); 738ded1be4aSJoseph T Handzik h = sdev_to_hba(sdev); 739ded1be4aSJoseph T Handzik spin_lock_irqsave(&h->lock, flags); 740ded1be4aSJoseph T Handzik hdev = sdev->hostdata; 741ded1be4aSJoseph T Handzik if (!hdev || is_logical_device(hdev) || !hdev->expose_device) { 742ded1be4aSJoseph T Handzik spin_unlock_irqrestore(&h->lock, flags); 743ded1be4aSJoseph T Handzik return -ENODEV; 744ded1be4aSJoseph T Handzik } 745ded1be4aSJoseph T Handzik sas_address = hdev->sas_address; 746ded1be4aSJoseph T Handzik spin_unlock_irqrestore(&h->lock, flags); 747ded1be4aSJoseph T Handzik 748ded1be4aSJoseph T Handzik return snprintf(buf, PAGE_SIZE, "0x%016llx\n", sas_address); 749ded1be4aSJoseph T Handzik } 750ded1be4aSJoseph T Handzik 751c1988684SScott Teel static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev, 752c1988684SScott Teel struct device_attribute *attr, char *buf) 753c1988684SScott Teel { 754c1988684SScott Teel struct ctlr_info *h; 755c1988684SScott Teel struct scsi_device *sdev; 756c1988684SScott Teel struct hpsa_scsi_dev_t *hdev; 757c1988684SScott Teel unsigned long flags; 758c1988684SScott Teel int offload_enabled; 759c1988684SScott Teel 760c1988684SScott Teel sdev = to_scsi_device(dev); 761c1988684SScott Teel h = sdev_to_hba(sdev); 762c1988684SScott Teel spin_lock_irqsave(&h->lock, flags); 763c1988684SScott Teel hdev = sdev->hostdata; 764c1988684SScott Teel if (!hdev) { 765c1988684SScott Teel spin_unlock_irqrestore(&h->lock, flags); 766c1988684SScott Teel return -ENODEV; 767c1988684SScott Teel } 768c1988684SScott Teel offload_enabled = hdev->offload_enabled; 769c1988684SScott Teel spin_unlock_irqrestore(&h->lock, flags); 770c1988684SScott Teel return snprintf(buf, 20, "%d\n", offload_enabled); 771c1988684SScott Teel } 772c1988684SScott Teel 7738270b862SJoe Handzik #define MAX_PATHS 8 7748270b862SJoe Handzik static ssize_t path_info_show(struct device *dev, 7758270b862SJoe Handzik struct device_attribute *attr, char *buf) 7768270b862SJoe Handzik { 7778270b862SJoe Handzik struct ctlr_info *h; 7788270b862SJoe Handzik struct scsi_device *sdev; 7798270b862SJoe Handzik struct hpsa_scsi_dev_t *hdev; 7808270b862SJoe Handzik unsigned long flags; 7818270b862SJoe Handzik int i; 7828270b862SJoe Handzik int output_len = 0; 7838270b862SJoe Handzik u8 box; 7848270b862SJoe Handzik u8 bay; 7858270b862SJoe Handzik u8 path_map_index = 0; 7868270b862SJoe Handzik char *active; 7878270b862SJoe Handzik unsigned char phys_connector[2]; 7888270b862SJoe Handzik 7898270b862SJoe Handzik sdev = to_scsi_device(dev); 7908270b862SJoe Handzik h = sdev_to_hba(sdev); 7918270b862SJoe Handzik spin_lock_irqsave(&h->devlock, flags); 7928270b862SJoe Handzik hdev = sdev->hostdata; 7938270b862SJoe Handzik if (!hdev) { 7948270b862SJoe Handzik spin_unlock_irqrestore(&h->devlock, flags); 7958270b862SJoe Handzik return -ENODEV; 7968270b862SJoe Handzik } 7978270b862SJoe Handzik 7988270b862SJoe Handzik bay = hdev->bay; 7998270b862SJoe Handzik for (i = 0; i < MAX_PATHS; i++) { 8008270b862SJoe Handzik path_map_index = 1<<i; 8018270b862SJoe Handzik if (i == hdev->active_path_index) 8028270b862SJoe Handzik active = "Active"; 8038270b862SJoe Handzik else if (hdev->path_map & path_map_index) 8048270b862SJoe Handzik active = "Inactive"; 8058270b862SJoe Handzik else 8068270b862SJoe Handzik continue; 8078270b862SJoe Handzik 8081faf072cSRasmus Villemoes output_len += scnprintf(buf + output_len, 8091faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8101faf072cSRasmus Villemoes "[%d:%d:%d:%d] %20.20s ", 8118270b862SJoe Handzik h->scsi_host->host_no, 8128270b862SJoe Handzik hdev->bus, hdev->target, hdev->lun, 8138270b862SJoe Handzik scsi_device_type(hdev->devtype)); 8148270b862SJoe Handzik 815cca8f13bSDon Brace if (hdev->devtype == TYPE_RAID || is_logical_device(hdev)) { 8162708f295SDon Brace output_len += scnprintf(buf + output_len, 8171faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8181faf072cSRasmus Villemoes "%s\n", active); 8198270b862SJoe Handzik continue; 8208270b862SJoe Handzik } 8218270b862SJoe Handzik 8228270b862SJoe Handzik box = hdev->box[i]; 8238270b862SJoe Handzik memcpy(&phys_connector, &hdev->phys_connector[i], 8248270b862SJoe Handzik sizeof(phys_connector)); 8258270b862SJoe Handzik if (phys_connector[0] < '0') 8268270b862SJoe Handzik phys_connector[0] = '0'; 8278270b862SJoe Handzik if (phys_connector[1] < '0') 8288270b862SJoe Handzik phys_connector[1] = '0'; 8292708f295SDon Brace output_len += scnprintf(buf + output_len, 8301faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8318270b862SJoe Handzik "PORT: %.2s ", 8328270b862SJoe Handzik phys_connector); 833af15ed36SDon Brace if ((hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC) && 834af15ed36SDon Brace hdev->expose_device) { 8358270b862SJoe Handzik if (box == 0 || box == 0xFF) { 8362708f295SDon Brace output_len += scnprintf(buf + output_len, 8371faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8388270b862SJoe Handzik "BAY: %hhu %s\n", 8398270b862SJoe Handzik bay, active); 8408270b862SJoe Handzik } else { 8412708f295SDon Brace output_len += scnprintf(buf + output_len, 8421faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8438270b862SJoe Handzik "BOX: %hhu BAY: %hhu %s\n", 8448270b862SJoe Handzik box, bay, active); 8458270b862SJoe Handzik } 8468270b862SJoe Handzik } else if (box != 0 && box != 0xFF) { 8472708f295SDon Brace output_len += scnprintf(buf + output_len, 8481faf072cSRasmus Villemoes PAGE_SIZE - output_len, "BOX: %hhu %s\n", 8498270b862SJoe Handzik box, active); 8508270b862SJoe Handzik } else 8512708f295SDon Brace output_len += scnprintf(buf + output_len, 8521faf072cSRasmus Villemoes PAGE_SIZE - output_len, "%s\n", active); 8538270b862SJoe Handzik } 8548270b862SJoe Handzik 8558270b862SJoe Handzik spin_unlock_irqrestore(&h->devlock, flags); 8561faf072cSRasmus Villemoes return output_len; 8578270b862SJoe Handzik } 8588270b862SJoe Handzik 85916961204SHannes Reinecke static ssize_t host_show_ctlr_num(struct device *dev, 86016961204SHannes Reinecke struct device_attribute *attr, char *buf) 86116961204SHannes Reinecke { 86216961204SHannes Reinecke struct ctlr_info *h; 86316961204SHannes Reinecke struct Scsi_Host *shost = class_to_shost(dev); 86416961204SHannes Reinecke 86516961204SHannes Reinecke h = shost_to_hba(shost); 86616961204SHannes Reinecke return snprintf(buf, 20, "%d\n", h->ctlr); 86716961204SHannes Reinecke } 86816961204SHannes Reinecke 8693f5eac3aSStephen M. Cameron static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL); 8703f5eac3aSStephen M. Cameron static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL); 8713f5eac3aSStephen M. Cameron static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL); 8723f5eac3aSStephen M. Cameron static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan); 873ded1be4aSJoseph T Handzik static DEVICE_ATTR(sas_address, S_IRUGO, sas_address_show, NULL); 874c1988684SScott Teel static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO, 875c1988684SScott Teel host_show_hp_ssd_smart_path_enabled, NULL); 8768270b862SJoe Handzik static DEVICE_ATTR(path_info, S_IRUGO, path_info_show, NULL); 877da0697bdSScott Teel static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH, 878da0697bdSScott Teel host_show_hp_ssd_smart_path_status, 879da0697bdSScott Teel host_store_hp_ssd_smart_path_status); 8802ba8bfc8SStephen M. Cameron static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL, 8812ba8bfc8SStephen M. Cameron host_store_raid_offload_debug); 8823f5eac3aSStephen M. Cameron static DEVICE_ATTR(firmware_revision, S_IRUGO, 8833f5eac3aSStephen M. Cameron host_show_firmware_revision, NULL); 8843f5eac3aSStephen M. Cameron static DEVICE_ATTR(commands_outstanding, S_IRUGO, 8853f5eac3aSStephen M. Cameron host_show_commands_outstanding, NULL); 8863f5eac3aSStephen M. Cameron static DEVICE_ATTR(transport_mode, S_IRUGO, 8873f5eac3aSStephen M. Cameron host_show_transport_mode, NULL); 888941b1cdaSStephen M. Cameron static DEVICE_ATTR(resettable, S_IRUGO, 889941b1cdaSStephen M. Cameron host_show_resettable, NULL); 890e985c58fSStephen Cameron static DEVICE_ATTR(lockup_detected, S_IRUGO, 891e985c58fSStephen Cameron host_show_lockup_detected, NULL); 89216961204SHannes Reinecke static DEVICE_ATTR(ctlr_num, S_IRUGO, 89316961204SHannes Reinecke host_show_ctlr_num, NULL); 8943f5eac3aSStephen M. Cameron 8953f5eac3aSStephen M. Cameron static struct device_attribute *hpsa_sdev_attrs[] = { 8963f5eac3aSStephen M. Cameron &dev_attr_raid_level, 8973f5eac3aSStephen M. Cameron &dev_attr_lunid, 8983f5eac3aSStephen M. Cameron &dev_attr_unique_id, 899c1988684SScott Teel &dev_attr_hp_ssd_smart_path_enabled, 9008270b862SJoe Handzik &dev_attr_path_info, 901ded1be4aSJoseph T Handzik &dev_attr_sas_address, 9023f5eac3aSStephen M. Cameron NULL, 9033f5eac3aSStephen M. Cameron }; 9043f5eac3aSStephen M. Cameron 9053f5eac3aSStephen M. Cameron static struct device_attribute *hpsa_shost_attrs[] = { 9063f5eac3aSStephen M. Cameron &dev_attr_rescan, 9073f5eac3aSStephen M. Cameron &dev_attr_firmware_revision, 9083f5eac3aSStephen M. Cameron &dev_attr_commands_outstanding, 9093f5eac3aSStephen M. Cameron &dev_attr_transport_mode, 910941b1cdaSStephen M. Cameron &dev_attr_resettable, 911da0697bdSScott Teel &dev_attr_hp_ssd_smart_path_status, 9122ba8bfc8SStephen M. Cameron &dev_attr_raid_offload_debug, 913fb53c439STomas Henzl &dev_attr_lockup_detected, 91416961204SHannes Reinecke &dev_attr_ctlr_num, 9153f5eac3aSStephen M. Cameron NULL, 9163f5eac3aSStephen M. Cameron }; 9173f5eac3aSStephen M. Cameron 91808ec46f6SDon Brace #define HPSA_NRESERVED_CMDS (HPSA_CMDS_RESERVED_FOR_DRIVER +\ 91908ec46f6SDon Brace HPSA_MAX_CONCURRENT_PASSTHRUS) 92041ce4c35SStephen Cameron 9213f5eac3aSStephen M. Cameron static struct scsi_host_template hpsa_driver_template = { 9223f5eac3aSStephen M. Cameron .module = THIS_MODULE, 923f79cfec6SStephen M. Cameron .name = HPSA, 924f79cfec6SStephen M. Cameron .proc_name = HPSA, 9253f5eac3aSStephen M. Cameron .queuecommand = hpsa_scsi_queue_command, 9263f5eac3aSStephen M. Cameron .scan_start = hpsa_scan_start, 9273f5eac3aSStephen M. Cameron .scan_finished = hpsa_scan_finished, 9287c0a0229SDon Brace .change_queue_depth = hpsa_change_queue_depth, 9293f5eac3aSStephen M. Cameron .this_id = -1, 9303f5eac3aSStephen M. Cameron .use_clustering = ENABLE_CLUSTERING, 9313f5eac3aSStephen M. Cameron .eh_device_reset_handler = hpsa_eh_device_reset_handler, 9323f5eac3aSStephen M. Cameron .ioctl = hpsa_ioctl, 9333f5eac3aSStephen M. Cameron .slave_alloc = hpsa_slave_alloc, 93441ce4c35SStephen Cameron .slave_configure = hpsa_slave_configure, 9353f5eac3aSStephen M. Cameron .slave_destroy = hpsa_slave_destroy, 9363f5eac3aSStephen M. Cameron #ifdef CONFIG_COMPAT 9373f5eac3aSStephen M. Cameron .compat_ioctl = hpsa_compat_ioctl, 9383f5eac3aSStephen M. Cameron #endif 9393f5eac3aSStephen M. Cameron .sdev_attrs = hpsa_sdev_attrs, 9403f5eac3aSStephen M. Cameron .shost_attrs = hpsa_shost_attrs, 941*e2c7b433SYadan Fan .max_sectors = 1024, 94254b2b50cSMartin K. Petersen .no_write_same = 1, 9433f5eac3aSStephen M. Cameron }; 9443f5eac3aSStephen M. Cameron 945254f796bSMatt Gates static inline u32 next_command(struct ctlr_info *h, u8 q) 9463f5eac3aSStephen M. Cameron { 9473f5eac3aSStephen M. Cameron u32 a; 948072b0518SStephen M. Cameron struct reply_queue_buffer *rq = &h->reply_queue[q]; 9493f5eac3aSStephen M. Cameron 950e1f7de0cSMatt Gates if (h->transMethod & CFGTBL_Trans_io_accel1) 951e1f7de0cSMatt Gates return h->access.command_completed(h, q); 952e1f7de0cSMatt Gates 9533f5eac3aSStephen M. Cameron if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant))) 954254f796bSMatt Gates return h->access.command_completed(h, q); 9553f5eac3aSStephen M. Cameron 956254f796bSMatt Gates if ((rq->head[rq->current_entry] & 1) == rq->wraparound) { 957254f796bSMatt Gates a = rq->head[rq->current_entry]; 958254f796bSMatt Gates rq->current_entry++; 9590cbf768eSStephen M. Cameron atomic_dec(&h->commands_outstanding); 9603f5eac3aSStephen M. Cameron } else { 9613f5eac3aSStephen M. Cameron a = FIFO_EMPTY; 9623f5eac3aSStephen M. Cameron } 9633f5eac3aSStephen M. Cameron /* Check for wraparound */ 964254f796bSMatt Gates if (rq->current_entry == h->max_commands) { 965254f796bSMatt Gates rq->current_entry = 0; 966254f796bSMatt Gates rq->wraparound ^= 1; 9673f5eac3aSStephen M. Cameron } 9683f5eac3aSStephen M. Cameron return a; 9693f5eac3aSStephen M. Cameron } 9703f5eac3aSStephen M. Cameron 971c349775eSScott Teel /* 972c349775eSScott Teel * There are some special bits in the bus address of the 973c349775eSScott Teel * command that we have to set for the controller to know 974c349775eSScott Teel * how to process the command: 975c349775eSScott Teel * 976c349775eSScott Teel * Normal performant mode: 977c349775eSScott Teel * bit 0: 1 means performant mode, 0 means simple mode. 978c349775eSScott Teel * bits 1-3 = block fetch table entry 979c349775eSScott Teel * bits 4-6 = command type (== 0) 980c349775eSScott Teel * 981c349775eSScott Teel * ioaccel1 mode: 982c349775eSScott Teel * bit 0 = "performant mode" bit. 983c349775eSScott Teel * bits 1-3 = block fetch table entry 984c349775eSScott Teel * bits 4-6 = command type (== 110) 985c349775eSScott Teel * (command type is needed because ioaccel1 mode 986c349775eSScott Teel * commands are submitted through the same register as normal 987c349775eSScott Teel * mode commands, so this is how the controller knows whether 988c349775eSScott Teel * the command is normal mode or ioaccel1 mode.) 989c349775eSScott Teel * 990c349775eSScott Teel * ioaccel2 mode: 991c349775eSScott Teel * bit 0 = "performant mode" bit. 992c349775eSScott Teel * bits 1-4 = block fetch table entry (note extra bit) 993c349775eSScott Teel * bits 4-6 = not needed, because ioaccel2 mode has 994c349775eSScott Teel * a separate special register for submitting commands. 995c349775eSScott Teel */ 996c349775eSScott Teel 99725163bd5SWebb Scales /* 99825163bd5SWebb Scales * set_performant_mode: Modify the tag for cciss performant 9993f5eac3aSStephen M. Cameron * set bit 0 for pull model, bits 3-1 for block fetch 10003f5eac3aSStephen M. Cameron * register number 10013f5eac3aSStephen M. Cameron */ 100225163bd5SWebb Scales #define DEFAULT_REPLY_QUEUE (-1) 100325163bd5SWebb Scales static void set_performant_mode(struct ctlr_info *h, struct CommandList *c, 100425163bd5SWebb Scales int reply_queue) 10053f5eac3aSStephen M. Cameron { 1006254f796bSMatt Gates if (likely(h->transMethod & CFGTBL_Trans_Performant)) { 10073f5eac3aSStephen M. Cameron c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1); 1008bc2bb154SChristoph Hellwig if (unlikely(!h->msix_vectors)) 100925163bd5SWebb Scales return; 101025163bd5SWebb Scales if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1011254f796bSMatt Gates c->Header.ReplyQueue = 1012804a5cb5SJohn Kacur raw_smp_processor_id() % h->nreply_queues; 101325163bd5SWebb Scales else 101425163bd5SWebb Scales c->Header.ReplyQueue = reply_queue % h->nreply_queues; 1015254f796bSMatt Gates } 10163f5eac3aSStephen M. Cameron } 10173f5eac3aSStephen M. Cameron 1018c349775eSScott Teel static void set_ioaccel1_performant_mode(struct ctlr_info *h, 101925163bd5SWebb Scales struct CommandList *c, 102025163bd5SWebb Scales int reply_queue) 1021c349775eSScott Teel { 1022c349775eSScott Teel struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex]; 1023c349775eSScott Teel 102425163bd5SWebb Scales /* 102525163bd5SWebb Scales * Tell the controller to post the reply to the queue for this 1026c349775eSScott Teel * processor. This seems to give the best I/O throughput. 1027c349775eSScott Teel */ 102825163bd5SWebb Scales if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1029c349775eSScott Teel cp->ReplyQueue = smp_processor_id() % h->nreply_queues; 103025163bd5SWebb Scales else 103125163bd5SWebb Scales cp->ReplyQueue = reply_queue % h->nreply_queues; 103225163bd5SWebb Scales /* 103325163bd5SWebb Scales * Set the bits in the address sent down to include: 1034c349775eSScott Teel * - performant mode bit (bit 0) 1035c349775eSScott Teel * - pull count (bits 1-3) 1036c349775eSScott Teel * - command type (bits 4-6) 1037c349775eSScott Teel */ 1038c349775eSScott Teel c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) | 1039c349775eSScott Teel IOACCEL1_BUSADDR_CMDTYPE; 1040c349775eSScott Teel } 1041c349775eSScott Teel 10428be986ccSStephen Cameron static void set_ioaccel2_tmf_performant_mode(struct ctlr_info *h, 10438be986ccSStephen Cameron struct CommandList *c, 10448be986ccSStephen Cameron int reply_queue) 10458be986ccSStephen Cameron { 10468be986ccSStephen Cameron struct hpsa_tmf_struct *cp = (struct hpsa_tmf_struct *) 10478be986ccSStephen Cameron &h->ioaccel2_cmd_pool[c->cmdindex]; 10488be986ccSStephen Cameron 10498be986ccSStephen Cameron /* Tell the controller to post the reply to the queue for this 10508be986ccSStephen Cameron * processor. This seems to give the best I/O throughput. 10518be986ccSStephen Cameron */ 10528be986ccSStephen Cameron if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 10538be986ccSStephen Cameron cp->reply_queue = smp_processor_id() % h->nreply_queues; 10548be986ccSStephen Cameron else 10558be986ccSStephen Cameron cp->reply_queue = reply_queue % h->nreply_queues; 10568be986ccSStephen Cameron /* Set the bits in the address sent down to include: 10578be986ccSStephen Cameron * - performant mode bit not used in ioaccel mode 2 10588be986ccSStephen Cameron * - pull count (bits 0-3) 10598be986ccSStephen Cameron * - command type isn't needed for ioaccel2 10608be986ccSStephen Cameron */ 10618be986ccSStephen Cameron c->busaddr |= h->ioaccel2_blockFetchTable[0]; 10628be986ccSStephen Cameron } 10638be986ccSStephen Cameron 1064c349775eSScott Teel static void set_ioaccel2_performant_mode(struct ctlr_info *h, 106525163bd5SWebb Scales struct CommandList *c, 106625163bd5SWebb Scales int reply_queue) 1067c349775eSScott Teel { 1068c349775eSScott Teel struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex]; 1069c349775eSScott Teel 107025163bd5SWebb Scales /* 107125163bd5SWebb Scales * Tell the controller to post the reply to the queue for this 1072c349775eSScott Teel * processor. This seems to give the best I/O throughput. 1073c349775eSScott Teel */ 107425163bd5SWebb Scales if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1075c349775eSScott Teel cp->reply_queue = smp_processor_id() % h->nreply_queues; 107625163bd5SWebb Scales else 107725163bd5SWebb Scales cp->reply_queue = reply_queue % h->nreply_queues; 107825163bd5SWebb Scales /* 107925163bd5SWebb Scales * Set the bits in the address sent down to include: 1080c349775eSScott Teel * - performant mode bit not used in ioaccel mode 2 1081c349775eSScott Teel * - pull count (bits 0-3) 1082c349775eSScott Teel * - command type isn't needed for ioaccel2 1083c349775eSScott Teel */ 1084c349775eSScott Teel c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]); 1085c349775eSScott Teel } 1086c349775eSScott Teel 1087e85c5974SStephen M. Cameron static int is_firmware_flash_cmd(u8 *cdb) 1088e85c5974SStephen M. Cameron { 1089e85c5974SStephen M. Cameron return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE; 1090e85c5974SStephen M. Cameron } 1091e85c5974SStephen M. Cameron 1092e85c5974SStephen M. Cameron /* 1093e85c5974SStephen M. Cameron * During firmware flash, the heartbeat register may not update as frequently 1094e85c5974SStephen M. Cameron * as it should. So we dial down lockup detection during firmware flash. and 1095e85c5974SStephen M. Cameron * dial it back up when firmware flash completes. 1096e85c5974SStephen M. Cameron */ 1097e85c5974SStephen M. Cameron #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ) 1098e85c5974SStephen M. Cameron #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ) 10993d38f00cSScott Teel #define HPSA_EVENT_MONITOR_INTERVAL (15 * HZ) 1100e85c5974SStephen M. Cameron static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h, 1101e85c5974SStephen M. Cameron struct CommandList *c) 1102e85c5974SStephen M. Cameron { 1103e85c5974SStephen M. Cameron if (!is_firmware_flash_cmd(c->Request.CDB)) 1104e85c5974SStephen M. Cameron return; 1105e85c5974SStephen M. Cameron atomic_inc(&h->firmware_flash_in_progress); 1106e85c5974SStephen M. Cameron h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH; 1107e85c5974SStephen M. Cameron } 1108e85c5974SStephen M. Cameron 1109e85c5974SStephen M. Cameron static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h, 1110e85c5974SStephen M. Cameron struct CommandList *c) 1111e85c5974SStephen M. Cameron { 1112e85c5974SStephen M. Cameron if (is_firmware_flash_cmd(c->Request.CDB) && 1113e85c5974SStephen M. Cameron atomic_dec_and_test(&h->firmware_flash_in_progress)) 1114e85c5974SStephen M. Cameron h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 1115e85c5974SStephen M. Cameron } 1116e85c5974SStephen M. Cameron 111725163bd5SWebb Scales static void __enqueue_cmd_and_start_io(struct ctlr_info *h, 111825163bd5SWebb Scales struct CommandList *c, int reply_queue) 11193f5eac3aSStephen M. Cameron { 1120c05e8866SStephen Cameron dial_down_lockup_detection_during_fw_flash(h, c); 1121c05e8866SStephen Cameron atomic_inc(&h->commands_outstanding); 1122c349775eSScott Teel switch (c->cmd_type) { 1123c349775eSScott Teel case CMD_IOACCEL1: 112425163bd5SWebb Scales set_ioaccel1_performant_mode(h, c, reply_queue); 1125c05e8866SStephen Cameron writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET); 1126c349775eSScott Teel break; 1127c349775eSScott Teel case CMD_IOACCEL2: 112825163bd5SWebb Scales set_ioaccel2_performant_mode(h, c, reply_queue); 1129c05e8866SStephen Cameron writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32); 1130c349775eSScott Teel break; 11318be986ccSStephen Cameron case IOACCEL2_TMF: 11328be986ccSStephen Cameron set_ioaccel2_tmf_performant_mode(h, c, reply_queue); 11338be986ccSStephen Cameron writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32); 11348be986ccSStephen Cameron break; 1135c349775eSScott Teel default: 113625163bd5SWebb Scales set_performant_mode(h, c, reply_queue); 1137f2405db8SDon Brace h->access.submit_command(h, c); 11383f5eac3aSStephen M. Cameron } 1139c05e8866SStephen Cameron } 11403f5eac3aSStephen M. Cameron 1141a58e7e53SWebb Scales static void enqueue_cmd_and_start_io(struct ctlr_info *h, struct CommandList *c) 114225163bd5SWebb Scales { 1143d604f533SWebb Scales if (unlikely(hpsa_is_pending_event(c))) 1144a58e7e53SWebb Scales return finish_cmd(c); 1145a58e7e53SWebb Scales 114625163bd5SWebb Scales __enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE); 114725163bd5SWebb Scales } 114825163bd5SWebb Scales 11493f5eac3aSStephen M. Cameron static inline int is_hba_lunid(unsigned char scsi3addr[]) 11503f5eac3aSStephen M. Cameron { 11513f5eac3aSStephen M. Cameron return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0; 11523f5eac3aSStephen M. Cameron } 11533f5eac3aSStephen M. Cameron 11543f5eac3aSStephen M. Cameron static inline int is_scsi_rev_5(struct ctlr_info *h) 11553f5eac3aSStephen M. Cameron { 11563f5eac3aSStephen M. Cameron if (!h->hba_inquiry_data) 11573f5eac3aSStephen M. Cameron return 0; 11583f5eac3aSStephen M. Cameron if ((h->hba_inquiry_data[2] & 0x07) == 5) 11593f5eac3aSStephen M. Cameron return 1; 11603f5eac3aSStephen M. Cameron return 0; 11613f5eac3aSStephen M. Cameron } 11623f5eac3aSStephen M. Cameron 1163edd16368SStephen M. Cameron static int hpsa_find_target_lun(struct ctlr_info *h, 1164edd16368SStephen M. Cameron unsigned char scsi3addr[], int bus, int *target, int *lun) 1165edd16368SStephen M. Cameron { 1166edd16368SStephen M. Cameron /* finds an unused bus, target, lun for a new physical device 1167edd16368SStephen M. Cameron * assumes h->devlock is held 1168edd16368SStephen M. Cameron */ 1169edd16368SStephen M. Cameron int i, found = 0; 1170cfe5badcSScott Teel DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES); 1171edd16368SStephen M. Cameron 1172263d9401SAkinobu Mita bitmap_zero(lun_taken, HPSA_MAX_DEVICES); 1173edd16368SStephen M. Cameron 1174edd16368SStephen M. Cameron for (i = 0; i < h->ndevices; i++) { 1175edd16368SStephen M. Cameron if (h->dev[i]->bus == bus && h->dev[i]->target != -1) 1176263d9401SAkinobu Mita __set_bit(h->dev[i]->target, lun_taken); 1177edd16368SStephen M. Cameron } 1178edd16368SStephen M. Cameron 1179263d9401SAkinobu Mita i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES); 1180263d9401SAkinobu Mita if (i < HPSA_MAX_DEVICES) { 1181edd16368SStephen M. Cameron /* *bus = 1; */ 1182edd16368SStephen M. Cameron *target = i; 1183edd16368SStephen M. Cameron *lun = 0; 1184edd16368SStephen M. Cameron found = 1; 1185edd16368SStephen M. Cameron } 1186edd16368SStephen M. Cameron return !found; 1187edd16368SStephen M. Cameron } 1188edd16368SStephen M. Cameron 11891d33d85dSDon Brace static void hpsa_show_dev_msg(const char *level, struct ctlr_info *h, 11900d96ef5fSWebb Scales struct hpsa_scsi_dev_t *dev, char *description) 11910d96ef5fSWebb Scales { 11927c59a0d4SDon Brace #define LABEL_SIZE 25 11937c59a0d4SDon Brace char label[LABEL_SIZE]; 11947c59a0d4SDon Brace 11959975ec9dSDon Brace if (h == NULL || h->pdev == NULL || h->scsi_host == NULL) 11969975ec9dSDon Brace return; 11979975ec9dSDon Brace 11987c59a0d4SDon Brace switch (dev->devtype) { 11997c59a0d4SDon Brace case TYPE_RAID: 12007c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "controller"); 12017c59a0d4SDon Brace break; 12027c59a0d4SDon Brace case TYPE_ENCLOSURE: 12037c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "enclosure"); 12047c59a0d4SDon Brace break; 12057c59a0d4SDon Brace case TYPE_DISK: 1206af15ed36SDon Brace case TYPE_ZBC: 12077c59a0d4SDon Brace if (dev->external) 12087c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "external"); 12097c59a0d4SDon Brace else if (!is_logical_dev_addr_mode(dev->scsi3addr)) 12107c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "%s", 12117c59a0d4SDon Brace raid_label[PHYSICAL_DRIVE]); 12127c59a0d4SDon Brace else 12137c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "RAID-%s", 12147c59a0d4SDon Brace dev->raid_level > RAID_UNKNOWN ? "?" : 12157c59a0d4SDon Brace raid_label[dev->raid_level]); 12167c59a0d4SDon Brace break; 12177c59a0d4SDon Brace case TYPE_ROM: 12187c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "rom"); 12197c59a0d4SDon Brace break; 12207c59a0d4SDon Brace case TYPE_TAPE: 12217c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "tape"); 12227c59a0d4SDon Brace break; 12237c59a0d4SDon Brace case TYPE_MEDIUM_CHANGER: 12247c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "changer"); 12257c59a0d4SDon Brace break; 12267c59a0d4SDon Brace default: 12277c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "UNKNOWN"); 12287c59a0d4SDon Brace break; 12297c59a0d4SDon Brace } 12307c59a0d4SDon Brace 12310d96ef5fSWebb Scales dev_printk(level, &h->pdev->dev, 12327c59a0d4SDon Brace "scsi %d:%d:%d:%d: %s %s %.8s %.16s %s SSDSmartPathCap%c En%c Exp=%d\n", 12330d96ef5fSWebb Scales h->scsi_host->host_no, dev->bus, dev->target, dev->lun, 12340d96ef5fSWebb Scales description, 12350d96ef5fSWebb Scales scsi_device_type(dev->devtype), 12360d96ef5fSWebb Scales dev->vendor, 12370d96ef5fSWebb Scales dev->model, 12387c59a0d4SDon Brace label, 12390d96ef5fSWebb Scales dev->offload_config ? '+' : '-', 12400d96ef5fSWebb Scales dev->offload_enabled ? '+' : '-', 12412a168208SKevin Barnett dev->expose_device); 12420d96ef5fSWebb Scales } 12430d96ef5fSWebb Scales 1244edd16368SStephen M. Cameron /* Add an entry into h->dev[] array. */ 12458aa60681SDon Brace static int hpsa_scsi_add_entry(struct ctlr_info *h, 1246edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *device, 1247edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *added[], int *nadded) 1248edd16368SStephen M. Cameron { 1249edd16368SStephen M. Cameron /* assumes h->devlock is held */ 1250edd16368SStephen M. Cameron int n = h->ndevices; 1251edd16368SStephen M. Cameron int i; 1252edd16368SStephen M. Cameron unsigned char addr1[8], addr2[8]; 1253edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd; 1254edd16368SStephen M. Cameron 1255cfe5badcSScott Teel if (n >= HPSA_MAX_DEVICES) { 1256edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "too many devices, some will be " 1257edd16368SStephen M. Cameron "inaccessible.\n"); 1258edd16368SStephen M. Cameron return -1; 1259edd16368SStephen M. Cameron } 1260edd16368SStephen M. Cameron 1261edd16368SStephen M. Cameron /* physical devices do not have lun or target assigned until now. */ 1262edd16368SStephen M. Cameron if (device->lun != -1) 1263edd16368SStephen M. Cameron /* Logical device, lun is already assigned. */ 1264edd16368SStephen M. Cameron goto lun_assigned; 1265edd16368SStephen M. Cameron 1266edd16368SStephen M. Cameron /* If this device a non-zero lun of a multi-lun device 1267edd16368SStephen M. Cameron * byte 4 of the 8-byte LUN addr will contain the logical 12682b08b3e9SDon Brace * unit no, zero otherwise. 1269edd16368SStephen M. Cameron */ 1270edd16368SStephen M. Cameron if (device->scsi3addr[4] == 0) { 1271edd16368SStephen M. Cameron /* This is not a non-zero lun of a multi-lun device */ 1272edd16368SStephen M. Cameron if (hpsa_find_target_lun(h, device->scsi3addr, 1273edd16368SStephen M. Cameron device->bus, &device->target, &device->lun) != 0) 1274edd16368SStephen M. Cameron return -1; 1275edd16368SStephen M. Cameron goto lun_assigned; 1276edd16368SStephen M. Cameron } 1277edd16368SStephen M. Cameron 1278edd16368SStephen M. Cameron /* This is a non-zero lun of a multi-lun device. 1279edd16368SStephen M. Cameron * Search through our list and find the device which 12809a4178b7Sshane.seymour * has the same 8 byte LUN address, excepting byte 4 and 5. 1281edd16368SStephen M. Cameron * Assign the same bus and target for this new LUN. 1282edd16368SStephen M. Cameron * Use the logical unit number from the firmware. 1283edd16368SStephen M. Cameron */ 1284edd16368SStephen M. Cameron memcpy(addr1, device->scsi3addr, 8); 1285edd16368SStephen M. Cameron addr1[4] = 0; 12869a4178b7Sshane.seymour addr1[5] = 0; 1287edd16368SStephen M. Cameron for (i = 0; i < n; i++) { 1288edd16368SStephen M. Cameron sd = h->dev[i]; 1289edd16368SStephen M. Cameron memcpy(addr2, sd->scsi3addr, 8); 1290edd16368SStephen M. Cameron addr2[4] = 0; 12919a4178b7Sshane.seymour addr2[5] = 0; 12929a4178b7Sshane.seymour /* differ only in byte 4 and 5? */ 1293edd16368SStephen M. Cameron if (memcmp(addr1, addr2, 8) == 0) { 1294edd16368SStephen M. Cameron device->bus = sd->bus; 1295edd16368SStephen M. Cameron device->target = sd->target; 1296edd16368SStephen M. Cameron device->lun = device->scsi3addr[4]; 1297edd16368SStephen M. Cameron break; 1298edd16368SStephen M. Cameron } 1299edd16368SStephen M. Cameron } 1300edd16368SStephen M. Cameron if (device->lun == -1) { 1301edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "physical device with no LUN=0," 1302edd16368SStephen M. Cameron " suspect firmware bug or unsupported hardware " 1303edd16368SStephen M. Cameron "configuration.\n"); 1304edd16368SStephen M. Cameron return -1; 1305edd16368SStephen M. Cameron } 1306edd16368SStephen M. Cameron 1307edd16368SStephen M. Cameron lun_assigned: 1308edd16368SStephen M. Cameron 1309edd16368SStephen M. Cameron h->dev[n] = device; 1310edd16368SStephen M. Cameron h->ndevices++; 1311edd16368SStephen M. Cameron added[*nadded] = device; 1312edd16368SStephen M. Cameron (*nadded)++; 13130d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, device, 13142a168208SKevin Barnett device->expose_device ? "added" : "masked"); 1315a473d86cSRobert Elliott device->offload_to_be_enabled = device->offload_enabled; 1316a473d86cSRobert Elliott device->offload_enabled = 0; 1317edd16368SStephen M. Cameron return 0; 1318edd16368SStephen M. Cameron } 1319edd16368SStephen M. Cameron 1320bd9244f7SScott Teel /* Update an entry in h->dev[] array. */ 13218aa60681SDon Brace static void hpsa_scsi_update_entry(struct ctlr_info *h, 1322bd9244f7SScott Teel int entry, struct hpsa_scsi_dev_t *new_entry) 1323bd9244f7SScott Teel { 1324a473d86cSRobert Elliott int offload_enabled; 1325bd9244f7SScott Teel /* assumes h->devlock is held */ 1326bd9244f7SScott Teel BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1327bd9244f7SScott Teel 1328bd9244f7SScott Teel /* Raid level changed. */ 1329bd9244f7SScott Teel h->dev[entry]->raid_level = new_entry->raid_level; 1330250fb125SStephen M. Cameron 133103383736SDon Brace /* Raid offload parameters changed. Careful about the ordering. */ 133203383736SDon Brace if (new_entry->offload_config && new_entry->offload_enabled) { 133303383736SDon Brace /* 133403383736SDon Brace * if drive is newly offload_enabled, we want to copy the 133503383736SDon Brace * raid map data first. If previously offload_enabled and 133603383736SDon Brace * offload_config were set, raid map data had better be 133703383736SDon Brace * the same as it was before. if raid map data is changed 133803383736SDon Brace * then it had better be the case that 133903383736SDon Brace * h->dev[entry]->offload_enabled is currently 0. 134003383736SDon Brace */ 13419fb0de2dSStephen M. Cameron h->dev[entry]->raid_map = new_entry->raid_map; 134203383736SDon Brace h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 134303383736SDon Brace } 1344a3144e0bSJoe Handzik if (new_entry->hba_ioaccel_enabled) { 1345a3144e0bSJoe Handzik h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 1346a3144e0bSJoe Handzik wmb(); /* set ioaccel_handle *before* hba_ioaccel_enabled */ 1347a3144e0bSJoe Handzik } 1348a3144e0bSJoe Handzik h->dev[entry]->hba_ioaccel_enabled = new_entry->hba_ioaccel_enabled; 134903383736SDon Brace h->dev[entry]->offload_config = new_entry->offload_config; 135003383736SDon Brace h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror; 135103383736SDon Brace h->dev[entry]->queue_depth = new_entry->queue_depth; 1352250fb125SStephen M. Cameron 135341ce4c35SStephen Cameron /* 135441ce4c35SStephen Cameron * We can turn off ioaccel offload now, but need to delay turning 135541ce4c35SStephen Cameron * it on until we can update h->dev[entry]->phys_disk[], but we 135641ce4c35SStephen Cameron * can't do that until all the devices are updated. 135741ce4c35SStephen Cameron */ 135841ce4c35SStephen Cameron h->dev[entry]->offload_to_be_enabled = new_entry->offload_enabled; 135941ce4c35SStephen Cameron if (!new_entry->offload_enabled) 136041ce4c35SStephen Cameron h->dev[entry]->offload_enabled = 0; 136141ce4c35SStephen Cameron 1362a473d86cSRobert Elliott offload_enabled = h->dev[entry]->offload_enabled; 1363a473d86cSRobert Elliott h->dev[entry]->offload_enabled = h->dev[entry]->offload_to_be_enabled; 13640d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated"); 1365a473d86cSRobert Elliott h->dev[entry]->offload_enabled = offload_enabled; 1366bd9244f7SScott Teel } 1367bd9244f7SScott Teel 13682a8ccf31SStephen M. Cameron /* Replace an entry from h->dev[] array. */ 13698aa60681SDon Brace static void hpsa_scsi_replace_entry(struct ctlr_info *h, 13702a8ccf31SStephen M. Cameron int entry, struct hpsa_scsi_dev_t *new_entry, 13712a8ccf31SStephen M. Cameron struct hpsa_scsi_dev_t *added[], int *nadded, 13722a8ccf31SStephen M. Cameron struct hpsa_scsi_dev_t *removed[], int *nremoved) 13732a8ccf31SStephen M. Cameron { 13742a8ccf31SStephen M. Cameron /* assumes h->devlock is held */ 1375cfe5badcSScott Teel BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 13762a8ccf31SStephen M. Cameron removed[*nremoved] = h->dev[entry]; 13772a8ccf31SStephen M. Cameron (*nremoved)++; 137801350d05SStephen M. Cameron 137901350d05SStephen M. Cameron /* 138001350d05SStephen M. Cameron * New physical devices won't have target/lun assigned yet 138101350d05SStephen M. Cameron * so we need to preserve the values in the slot we are replacing. 138201350d05SStephen M. Cameron */ 138301350d05SStephen M. Cameron if (new_entry->target == -1) { 138401350d05SStephen M. Cameron new_entry->target = h->dev[entry]->target; 138501350d05SStephen M. Cameron new_entry->lun = h->dev[entry]->lun; 138601350d05SStephen M. Cameron } 138701350d05SStephen M. Cameron 13882a8ccf31SStephen M. Cameron h->dev[entry] = new_entry; 13892a8ccf31SStephen M. Cameron added[*nadded] = new_entry; 13902a8ccf31SStephen M. Cameron (*nadded)++; 13910d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced"); 1392a473d86cSRobert Elliott new_entry->offload_to_be_enabled = new_entry->offload_enabled; 1393a473d86cSRobert Elliott new_entry->offload_enabled = 0; 13942a8ccf31SStephen M. Cameron } 13952a8ccf31SStephen M. Cameron 1396edd16368SStephen M. Cameron /* Remove an entry from h->dev[] array. */ 13978aa60681SDon Brace static void hpsa_scsi_remove_entry(struct ctlr_info *h, int entry, 1398edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *removed[], int *nremoved) 1399edd16368SStephen M. Cameron { 1400edd16368SStephen M. Cameron /* assumes h->devlock is held */ 1401edd16368SStephen M. Cameron int i; 1402edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd; 1403edd16368SStephen M. Cameron 1404cfe5badcSScott Teel BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1405edd16368SStephen M. Cameron 1406edd16368SStephen M. Cameron sd = h->dev[entry]; 1407edd16368SStephen M. Cameron removed[*nremoved] = h->dev[entry]; 1408edd16368SStephen M. Cameron (*nremoved)++; 1409edd16368SStephen M. Cameron 1410edd16368SStephen M. Cameron for (i = entry; i < h->ndevices-1; i++) 1411edd16368SStephen M. Cameron h->dev[i] = h->dev[i+1]; 1412edd16368SStephen M. Cameron h->ndevices--; 14130d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, sd, "removed"); 1414edd16368SStephen M. Cameron } 1415edd16368SStephen M. Cameron 1416edd16368SStephen M. Cameron #define SCSI3ADDR_EQ(a, b) ( \ 1417edd16368SStephen M. Cameron (a)[7] == (b)[7] && \ 1418edd16368SStephen M. Cameron (a)[6] == (b)[6] && \ 1419edd16368SStephen M. Cameron (a)[5] == (b)[5] && \ 1420edd16368SStephen M. Cameron (a)[4] == (b)[4] && \ 1421edd16368SStephen M. Cameron (a)[3] == (b)[3] && \ 1422edd16368SStephen M. Cameron (a)[2] == (b)[2] && \ 1423edd16368SStephen M. Cameron (a)[1] == (b)[1] && \ 1424edd16368SStephen M. Cameron (a)[0] == (b)[0]) 1425edd16368SStephen M. Cameron 1426edd16368SStephen M. Cameron static void fixup_botched_add(struct ctlr_info *h, 1427edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *added) 1428edd16368SStephen M. Cameron { 1429edd16368SStephen M. Cameron /* called when scsi_add_device fails in order to re-adjust 1430edd16368SStephen M. Cameron * h->dev[] to match the mid layer's view. 1431edd16368SStephen M. Cameron */ 1432edd16368SStephen M. Cameron unsigned long flags; 1433edd16368SStephen M. Cameron int i, j; 1434edd16368SStephen M. Cameron 1435edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 1436edd16368SStephen M. Cameron for (i = 0; i < h->ndevices; i++) { 1437edd16368SStephen M. Cameron if (h->dev[i] == added) { 1438edd16368SStephen M. Cameron for (j = i; j < h->ndevices-1; j++) 1439edd16368SStephen M. Cameron h->dev[j] = h->dev[j+1]; 1440edd16368SStephen M. Cameron h->ndevices--; 1441edd16368SStephen M. Cameron break; 1442edd16368SStephen M. Cameron } 1443edd16368SStephen M. Cameron } 1444edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 1445edd16368SStephen M. Cameron kfree(added); 1446edd16368SStephen M. Cameron } 1447edd16368SStephen M. Cameron 1448edd16368SStephen M. Cameron static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1, 1449edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *dev2) 1450edd16368SStephen M. Cameron { 1451edd16368SStephen M. Cameron /* we compare everything except lun and target as these 1452edd16368SStephen M. Cameron * are not yet assigned. Compare parts likely 1453edd16368SStephen M. Cameron * to differ first 1454edd16368SStephen M. Cameron */ 1455edd16368SStephen M. Cameron if (memcmp(dev1->scsi3addr, dev2->scsi3addr, 1456edd16368SStephen M. Cameron sizeof(dev1->scsi3addr)) != 0) 1457edd16368SStephen M. Cameron return 0; 1458edd16368SStephen M. Cameron if (memcmp(dev1->device_id, dev2->device_id, 1459edd16368SStephen M. Cameron sizeof(dev1->device_id)) != 0) 1460edd16368SStephen M. Cameron return 0; 1461edd16368SStephen M. Cameron if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0) 1462edd16368SStephen M. Cameron return 0; 1463edd16368SStephen M. Cameron if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0) 1464edd16368SStephen M. Cameron return 0; 1465edd16368SStephen M. Cameron if (dev1->devtype != dev2->devtype) 1466edd16368SStephen M. Cameron return 0; 1467edd16368SStephen M. Cameron if (dev1->bus != dev2->bus) 1468edd16368SStephen M. Cameron return 0; 1469edd16368SStephen M. Cameron return 1; 1470edd16368SStephen M. Cameron } 1471edd16368SStephen M. Cameron 1472bd9244f7SScott Teel static inline int device_updated(struct hpsa_scsi_dev_t *dev1, 1473bd9244f7SScott Teel struct hpsa_scsi_dev_t *dev2) 1474bd9244f7SScott Teel { 1475bd9244f7SScott Teel /* Device attributes that can change, but don't mean 1476bd9244f7SScott Teel * that the device is a different device, nor that the OS 1477bd9244f7SScott Teel * needs to be told anything about the change. 1478bd9244f7SScott Teel */ 1479bd9244f7SScott Teel if (dev1->raid_level != dev2->raid_level) 1480bd9244f7SScott Teel return 1; 1481250fb125SStephen M. Cameron if (dev1->offload_config != dev2->offload_config) 1482250fb125SStephen M. Cameron return 1; 1483250fb125SStephen M. Cameron if (dev1->offload_enabled != dev2->offload_enabled) 1484250fb125SStephen M. Cameron return 1; 148593849508SDon Brace if (!is_logical_dev_addr_mode(dev1->scsi3addr)) 148603383736SDon Brace if (dev1->queue_depth != dev2->queue_depth) 148703383736SDon Brace return 1; 1488bd9244f7SScott Teel return 0; 1489bd9244f7SScott Teel } 1490bd9244f7SScott Teel 1491edd16368SStephen M. Cameron /* Find needle in haystack. If exact match found, return DEVICE_SAME, 1492edd16368SStephen M. Cameron * and return needle location in *index. If scsi3addr matches, but not 1493edd16368SStephen M. Cameron * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle 1494bd9244f7SScott Teel * location in *index. 1495bd9244f7SScott Teel * In the case of a minor device attribute change, such as RAID level, just 1496bd9244f7SScott Teel * return DEVICE_UPDATED, along with the updated device's location in index. 1497bd9244f7SScott Teel * If needle not found, return DEVICE_NOT_FOUND. 1498edd16368SStephen M. Cameron */ 1499edd16368SStephen M. Cameron static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle, 1500edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *haystack[], int haystack_size, 1501edd16368SStephen M. Cameron int *index) 1502edd16368SStephen M. Cameron { 1503edd16368SStephen M. Cameron int i; 1504edd16368SStephen M. Cameron #define DEVICE_NOT_FOUND 0 1505edd16368SStephen M. Cameron #define DEVICE_CHANGED 1 1506edd16368SStephen M. Cameron #define DEVICE_SAME 2 1507bd9244f7SScott Teel #define DEVICE_UPDATED 3 15081d33d85dSDon Brace if (needle == NULL) 15091d33d85dSDon Brace return DEVICE_NOT_FOUND; 15101d33d85dSDon Brace 1511edd16368SStephen M. Cameron for (i = 0; i < haystack_size; i++) { 151223231048SStephen M. Cameron if (haystack[i] == NULL) /* previously removed. */ 151323231048SStephen M. Cameron continue; 1514edd16368SStephen M. Cameron if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) { 1515edd16368SStephen M. Cameron *index = i; 1516bd9244f7SScott Teel if (device_is_the_same(needle, haystack[i])) { 1517bd9244f7SScott Teel if (device_updated(needle, haystack[i])) 1518bd9244f7SScott Teel return DEVICE_UPDATED; 1519edd16368SStephen M. Cameron return DEVICE_SAME; 1520bd9244f7SScott Teel } else { 15219846590eSStephen M. Cameron /* Keep offline devices offline */ 15229846590eSStephen M. Cameron if (needle->volume_offline) 15239846590eSStephen M. Cameron return DEVICE_NOT_FOUND; 1524edd16368SStephen M. Cameron return DEVICE_CHANGED; 1525edd16368SStephen M. Cameron } 1526edd16368SStephen M. Cameron } 1527bd9244f7SScott Teel } 1528edd16368SStephen M. Cameron *index = -1; 1529edd16368SStephen M. Cameron return DEVICE_NOT_FOUND; 1530edd16368SStephen M. Cameron } 1531edd16368SStephen M. Cameron 15329846590eSStephen M. Cameron static void hpsa_monitor_offline_device(struct ctlr_info *h, 15339846590eSStephen M. Cameron unsigned char scsi3addr[]) 15349846590eSStephen M. Cameron { 15359846590eSStephen M. Cameron struct offline_device_entry *device; 15369846590eSStephen M. Cameron unsigned long flags; 15379846590eSStephen M. Cameron 15389846590eSStephen M. Cameron /* Check to see if device is already on the list */ 15399846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 15409846590eSStephen M. Cameron list_for_each_entry(device, &h->offline_device_list, offline_list) { 15419846590eSStephen M. Cameron if (memcmp(device->scsi3addr, scsi3addr, 15429846590eSStephen M. Cameron sizeof(device->scsi3addr)) == 0) { 15439846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 15449846590eSStephen M. Cameron return; 15459846590eSStephen M. Cameron } 15469846590eSStephen M. Cameron } 15479846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 15489846590eSStephen M. Cameron 15499846590eSStephen M. Cameron /* Device is not on the list, add it. */ 15509846590eSStephen M. Cameron device = kmalloc(sizeof(*device), GFP_KERNEL); 15517e8a9486SAmit Kushwaha if (!device) 15529846590eSStephen M. Cameron return; 15537e8a9486SAmit Kushwaha 15549846590eSStephen M. Cameron memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr)); 15559846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 15569846590eSStephen M. Cameron list_add_tail(&device->offline_list, &h->offline_device_list); 15579846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 15589846590eSStephen M. Cameron } 15599846590eSStephen M. Cameron 15609846590eSStephen M. Cameron /* Print a message explaining various offline volume states */ 15619846590eSStephen M. Cameron static void hpsa_show_volume_status(struct ctlr_info *h, 15629846590eSStephen M. Cameron struct hpsa_scsi_dev_t *sd) 15639846590eSStephen M. Cameron { 15649846590eSStephen M. Cameron if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED) 15659846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15669846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n", 15679846590eSStephen M. Cameron h->scsi_host->host_no, 15689846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15699846590eSStephen M. Cameron switch (sd->volume_offline) { 15709846590eSStephen M. Cameron case HPSA_LV_OK: 15719846590eSStephen M. Cameron break; 15729846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ERASE: 15739846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15749846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n", 15759846590eSStephen M. Cameron h->scsi_host->host_no, 15769846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15779846590eSStephen M. Cameron break; 15785ca01204SScott Benesh case HPSA_LV_NOT_AVAILABLE: 15795ca01204SScott Benesh dev_info(&h->pdev->dev, 15805ca01204SScott Benesh "C%d:B%d:T%d:L%d Volume is waiting for transforming volume.\n", 15815ca01204SScott Benesh h->scsi_host->host_no, 15825ca01204SScott Benesh sd->bus, sd->target, sd->lun); 15835ca01204SScott Benesh break; 15849846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_RPI: 15859846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15865ca01204SScott Benesh "C%d:B%d:T%d:L%d Volume is undergoing rapid parity init.\n", 15879846590eSStephen M. Cameron h->scsi_host->host_no, 15889846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15899846590eSStephen M. Cameron break; 15909846590eSStephen M. Cameron case HPSA_LV_PENDING_RPI: 15919846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15929846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n", 15939846590eSStephen M. Cameron h->scsi_host->host_no, 15949846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15959846590eSStephen M. Cameron break; 15969846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_NO_KEY: 15979846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15989846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n", 15999846590eSStephen M. Cameron h->scsi_host->host_no, 16009846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16019846590eSStephen M. Cameron break; 16029846590eSStephen M. Cameron case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER: 16039846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16049846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n", 16059846590eSStephen M. Cameron h->scsi_host->host_no, 16069846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16079846590eSStephen M. Cameron break; 16089846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION: 16099846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16109846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n", 16119846590eSStephen M. Cameron h->scsi_host->host_no, 16129846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16139846590eSStephen M. Cameron break; 16149846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING: 16159846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16169846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n", 16179846590eSStephen M. Cameron h->scsi_host->host_no, 16189846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16199846590eSStephen M. Cameron break; 16209846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 16219846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16229846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n", 16239846590eSStephen M. Cameron h->scsi_host->host_no, 16249846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16259846590eSStephen M. Cameron break; 16269846590eSStephen M. Cameron case HPSA_LV_PENDING_ENCRYPTION: 16279846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16289846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n", 16299846590eSStephen M. Cameron h->scsi_host->host_no, 16309846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16319846590eSStephen M. Cameron break; 16329846590eSStephen M. Cameron case HPSA_LV_PENDING_ENCRYPTION_REKEYING: 16339846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16349846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n", 16359846590eSStephen M. Cameron h->scsi_host->host_no, 16369846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16379846590eSStephen M. Cameron break; 16389846590eSStephen M. Cameron } 16399846590eSStephen M. Cameron } 16409846590eSStephen M. Cameron 164103383736SDon Brace /* 164203383736SDon Brace * Figure the list of physical drive pointers for a logical drive with 164303383736SDon Brace * raid offload configured. 164403383736SDon Brace */ 164503383736SDon Brace static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h, 164603383736SDon Brace struct hpsa_scsi_dev_t *dev[], int ndevices, 164703383736SDon Brace struct hpsa_scsi_dev_t *logical_drive) 164803383736SDon Brace { 164903383736SDon Brace struct raid_map_data *map = &logical_drive->raid_map; 165003383736SDon Brace struct raid_map_disk_data *dd = &map->data[0]; 165103383736SDon Brace int i, j; 165203383736SDon Brace int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) + 165303383736SDon Brace le16_to_cpu(map->metadata_disks_per_row); 165403383736SDon Brace int nraid_map_entries = le16_to_cpu(map->row_cnt) * 165503383736SDon Brace le16_to_cpu(map->layout_map_count) * 165603383736SDon Brace total_disks_per_row; 165703383736SDon Brace int nphys_disk = le16_to_cpu(map->layout_map_count) * 165803383736SDon Brace total_disks_per_row; 165903383736SDon Brace int qdepth; 166003383736SDon Brace 166103383736SDon Brace if (nraid_map_entries > RAID_MAP_MAX_ENTRIES) 166203383736SDon Brace nraid_map_entries = RAID_MAP_MAX_ENTRIES; 166303383736SDon Brace 1664d604f533SWebb Scales logical_drive->nphysical_disks = nraid_map_entries; 1665d604f533SWebb Scales 166603383736SDon Brace qdepth = 0; 166703383736SDon Brace for (i = 0; i < nraid_map_entries; i++) { 166803383736SDon Brace logical_drive->phys_disk[i] = NULL; 166903383736SDon Brace if (!logical_drive->offload_config) 167003383736SDon Brace continue; 167103383736SDon Brace for (j = 0; j < ndevices; j++) { 16721d33d85dSDon Brace if (dev[j] == NULL) 16731d33d85dSDon Brace continue; 1674ff615f06SPetros Koutoupis if (dev[j]->devtype != TYPE_DISK && 1675ff615f06SPetros Koutoupis dev[j]->devtype != TYPE_ZBC) 1676af15ed36SDon Brace continue; 1677f3f01730SKevin Barnett if (is_logical_device(dev[j])) 167803383736SDon Brace continue; 167903383736SDon Brace if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle) 168003383736SDon Brace continue; 168103383736SDon Brace 168203383736SDon Brace logical_drive->phys_disk[i] = dev[j]; 168303383736SDon Brace if (i < nphys_disk) 168403383736SDon Brace qdepth = min(h->nr_cmds, qdepth + 168503383736SDon Brace logical_drive->phys_disk[i]->queue_depth); 168603383736SDon Brace break; 168703383736SDon Brace } 168803383736SDon Brace 168903383736SDon Brace /* 169003383736SDon Brace * This can happen if a physical drive is removed and 169103383736SDon Brace * the logical drive is degraded. In that case, the RAID 169203383736SDon Brace * map data will refer to a physical disk which isn't actually 169303383736SDon Brace * present. And in that case offload_enabled should already 169403383736SDon Brace * be 0, but we'll turn it off here just in case 169503383736SDon Brace */ 169603383736SDon Brace if (!logical_drive->phys_disk[i]) { 169703383736SDon Brace logical_drive->offload_enabled = 0; 169841ce4c35SStephen Cameron logical_drive->offload_to_be_enabled = 0; 169941ce4c35SStephen Cameron logical_drive->queue_depth = 8; 170003383736SDon Brace } 170103383736SDon Brace } 170203383736SDon Brace if (nraid_map_entries) 170303383736SDon Brace /* 170403383736SDon Brace * This is correct for reads, too high for full stripe writes, 170503383736SDon Brace * way too high for partial stripe writes 170603383736SDon Brace */ 170703383736SDon Brace logical_drive->queue_depth = qdepth; 170803383736SDon Brace else 170903383736SDon Brace logical_drive->queue_depth = h->nr_cmds; 171003383736SDon Brace } 171103383736SDon Brace 171203383736SDon Brace static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h, 171303383736SDon Brace struct hpsa_scsi_dev_t *dev[], int ndevices) 171403383736SDon Brace { 171503383736SDon Brace int i; 171603383736SDon Brace 171703383736SDon Brace for (i = 0; i < ndevices; i++) { 17181d33d85dSDon Brace if (dev[i] == NULL) 17191d33d85dSDon Brace continue; 1720ff615f06SPetros Koutoupis if (dev[i]->devtype != TYPE_DISK && 1721ff615f06SPetros Koutoupis dev[i]->devtype != TYPE_ZBC) 1722af15ed36SDon Brace continue; 1723f3f01730SKevin Barnett if (!is_logical_device(dev[i])) 172403383736SDon Brace continue; 172541ce4c35SStephen Cameron 172641ce4c35SStephen Cameron /* 172741ce4c35SStephen Cameron * If offload is currently enabled, the RAID map and 172841ce4c35SStephen Cameron * phys_disk[] assignment *better* not be changing 172941ce4c35SStephen Cameron * and since it isn't changing, we do not need to 173041ce4c35SStephen Cameron * update it. 173141ce4c35SStephen Cameron */ 173241ce4c35SStephen Cameron if (dev[i]->offload_enabled) 173341ce4c35SStephen Cameron continue; 173441ce4c35SStephen Cameron 173503383736SDon Brace hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]); 173603383736SDon Brace } 173703383736SDon Brace } 173803383736SDon Brace 1739096ccff4SKevin Barnett static int hpsa_add_device(struct ctlr_info *h, struct hpsa_scsi_dev_t *device) 1740096ccff4SKevin Barnett { 1741096ccff4SKevin Barnett int rc = 0; 1742096ccff4SKevin Barnett 1743096ccff4SKevin Barnett if (!h->scsi_host) 1744096ccff4SKevin Barnett return 1; 1745096ccff4SKevin Barnett 1746d04e62b9SKevin Barnett if (is_logical_device(device)) /* RAID */ 1747096ccff4SKevin Barnett rc = scsi_add_device(h->scsi_host, device->bus, 1748096ccff4SKevin Barnett device->target, device->lun); 1749d04e62b9SKevin Barnett else /* HBA */ 1750d04e62b9SKevin Barnett rc = hpsa_add_sas_device(h->sas_host, device); 1751d04e62b9SKevin Barnett 1752096ccff4SKevin Barnett return rc; 1753096ccff4SKevin Barnett } 1754096ccff4SKevin Barnett 1755ba74fdc4SDon Brace static int hpsa_find_outstanding_commands_for_dev(struct ctlr_info *h, 1756ba74fdc4SDon Brace struct hpsa_scsi_dev_t *dev) 1757ba74fdc4SDon Brace { 1758ba74fdc4SDon Brace int i; 1759ba74fdc4SDon Brace int count = 0; 1760ba74fdc4SDon Brace 1761ba74fdc4SDon Brace for (i = 0; i < h->nr_cmds; i++) { 1762ba74fdc4SDon Brace struct CommandList *c = h->cmd_pool + i; 1763ba74fdc4SDon Brace int refcount = atomic_inc_return(&c->refcount); 1764ba74fdc4SDon Brace 1765ba74fdc4SDon Brace if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, 1766ba74fdc4SDon Brace dev->scsi3addr)) { 1767ba74fdc4SDon Brace unsigned long flags; 1768ba74fdc4SDon Brace 1769ba74fdc4SDon Brace spin_lock_irqsave(&h->lock, flags); /* Implied MB */ 1770ba74fdc4SDon Brace if (!hpsa_is_cmd_idle(c)) 1771ba74fdc4SDon Brace ++count; 1772ba74fdc4SDon Brace spin_unlock_irqrestore(&h->lock, flags); 1773ba74fdc4SDon Brace } 1774ba74fdc4SDon Brace 1775ba74fdc4SDon Brace cmd_free(h, c); 1776ba74fdc4SDon Brace } 1777ba74fdc4SDon Brace 1778ba74fdc4SDon Brace return count; 1779ba74fdc4SDon Brace } 1780ba74fdc4SDon Brace 1781ba74fdc4SDon Brace static void hpsa_wait_for_outstanding_commands_for_dev(struct ctlr_info *h, 1782ba74fdc4SDon Brace struct hpsa_scsi_dev_t *device) 1783ba74fdc4SDon Brace { 1784ba74fdc4SDon Brace int cmds = 0; 1785ba74fdc4SDon Brace int waits = 0; 1786ba74fdc4SDon Brace 1787ba74fdc4SDon Brace while (1) { 1788ba74fdc4SDon Brace cmds = hpsa_find_outstanding_commands_for_dev(h, device); 1789ba74fdc4SDon Brace if (cmds == 0) 1790ba74fdc4SDon Brace break; 1791ba74fdc4SDon Brace if (++waits > 20) 1792ba74fdc4SDon Brace break; 1793ba74fdc4SDon Brace dev_warn(&h->pdev->dev, 1794ba74fdc4SDon Brace "%s: removing device with %d outstanding commands!\n", 1795ba74fdc4SDon Brace __func__, cmds); 1796ba74fdc4SDon Brace msleep(1000); 1797ba74fdc4SDon Brace } 1798ba74fdc4SDon Brace } 1799ba74fdc4SDon Brace 1800096ccff4SKevin Barnett static void hpsa_remove_device(struct ctlr_info *h, 1801096ccff4SKevin Barnett struct hpsa_scsi_dev_t *device) 1802096ccff4SKevin Barnett { 1803096ccff4SKevin Barnett struct scsi_device *sdev = NULL; 1804096ccff4SKevin Barnett 1805096ccff4SKevin Barnett if (!h->scsi_host) 1806096ccff4SKevin Barnett return; 1807096ccff4SKevin Barnett 1808d04e62b9SKevin Barnett if (is_logical_device(device)) { /* RAID */ 1809096ccff4SKevin Barnett sdev = scsi_device_lookup(h->scsi_host, device->bus, 1810096ccff4SKevin Barnett device->target, device->lun); 1811096ccff4SKevin Barnett if (sdev) { 1812096ccff4SKevin Barnett scsi_remove_device(sdev); 1813096ccff4SKevin Barnett scsi_device_put(sdev); 1814096ccff4SKevin Barnett } else { 1815096ccff4SKevin Barnett /* 1816096ccff4SKevin Barnett * We don't expect to get here. Future commands 1817096ccff4SKevin Barnett * to this device will get a selection timeout as 1818096ccff4SKevin Barnett * if the device were gone. 1819096ccff4SKevin Barnett */ 1820096ccff4SKevin Barnett hpsa_show_dev_msg(KERN_WARNING, h, device, 1821096ccff4SKevin Barnett "didn't find device for removal."); 1822096ccff4SKevin Barnett } 1823ba74fdc4SDon Brace } else { /* HBA */ 1824ba74fdc4SDon Brace 1825ba74fdc4SDon Brace device->removed = 1; 1826ba74fdc4SDon Brace hpsa_wait_for_outstanding_commands_for_dev(h, device); 1827ba74fdc4SDon Brace 1828d04e62b9SKevin Barnett hpsa_remove_sas_device(device); 1829096ccff4SKevin Barnett } 1830ba74fdc4SDon Brace } 1831096ccff4SKevin Barnett 18328aa60681SDon Brace static void adjust_hpsa_scsi_table(struct ctlr_info *h, 1833edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd[], int nsds) 1834edd16368SStephen M. Cameron { 1835edd16368SStephen M. Cameron /* sd contains scsi3 addresses and devtypes, and inquiry 1836edd16368SStephen M. Cameron * data. This function takes what's in sd to be the current 1837edd16368SStephen M. Cameron * reality and updates h->dev[] to reflect that reality. 1838edd16368SStephen M. Cameron */ 1839edd16368SStephen M. Cameron int i, entry, device_change, changes = 0; 1840edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *csd; 1841edd16368SStephen M. Cameron unsigned long flags; 1842edd16368SStephen M. Cameron struct hpsa_scsi_dev_t **added, **removed; 1843edd16368SStephen M. Cameron int nadded, nremoved; 1844edd16368SStephen M. Cameron 1845da03ded0SDon Brace /* 1846da03ded0SDon Brace * A reset can cause a device status to change 1847da03ded0SDon Brace * re-schedule the scan to see what happened. 1848da03ded0SDon Brace */ 1849c59d04f3SDon Brace spin_lock_irqsave(&h->reset_lock, flags); 1850da03ded0SDon Brace if (h->reset_in_progress) { 1851da03ded0SDon Brace h->drv_req_rescan = 1; 1852c59d04f3SDon Brace spin_unlock_irqrestore(&h->reset_lock, flags); 1853da03ded0SDon Brace return; 1854da03ded0SDon Brace } 1855c59d04f3SDon Brace spin_unlock_irqrestore(&h->reset_lock, flags); 1856edd16368SStephen M. Cameron 1857cfe5badcSScott Teel added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL); 1858cfe5badcSScott Teel removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL); 1859edd16368SStephen M. Cameron 1860edd16368SStephen M. Cameron if (!added || !removed) { 1861edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "out of memory in " 1862edd16368SStephen M. Cameron "adjust_hpsa_scsi_table\n"); 1863edd16368SStephen M. Cameron goto free_and_out; 1864edd16368SStephen M. Cameron } 1865edd16368SStephen M. Cameron 1866edd16368SStephen M. Cameron spin_lock_irqsave(&h->devlock, flags); 1867edd16368SStephen M. Cameron 1868edd16368SStephen M. Cameron /* find any devices in h->dev[] that are not in 1869edd16368SStephen M. Cameron * sd[] and remove them from h->dev[], and for any 1870edd16368SStephen M. Cameron * devices which have changed, remove the old device 1871edd16368SStephen M. Cameron * info and add the new device info. 1872bd9244f7SScott Teel * If minor device attributes change, just update 1873bd9244f7SScott Teel * the existing device structure. 1874edd16368SStephen M. Cameron */ 1875edd16368SStephen M. Cameron i = 0; 1876edd16368SStephen M. Cameron nremoved = 0; 1877edd16368SStephen M. Cameron nadded = 0; 1878edd16368SStephen M. Cameron while (i < h->ndevices) { 1879edd16368SStephen M. Cameron csd = h->dev[i]; 1880edd16368SStephen M. Cameron device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry); 1881edd16368SStephen M. Cameron if (device_change == DEVICE_NOT_FOUND) { 1882edd16368SStephen M. Cameron changes++; 18838aa60681SDon Brace hpsa_scsi_remove_entry(h, i, removed, &nremoved); 1884edd16368SStephen M. Cameron continue; /* remove ^^^, hence i not incremented */ 1885edd16368SStephen M. Cameron } else if (device_change == DEVICE_CHANGED) { 1886edd16368SStephen M. Cameron changes++; 18878aa60681SDon Brace hpsa_scsi_replace_entry(h, i, sd[entry], 18882a8ccf31SStephen M. Cameron added, &nadded, removed, &nremoved); 1889c7f172dcSStephen M. Cameron /* Set it to NULL to prevent it from being freed 1890c7f172dcSStephen M. Cameron * at the bottom of hpsa_update_scsi_devices() 1891c7f172dcSStephen M. Cameron */ 1892c7f172dcSStephen M. Cameron sd[entry] = NULL; 1893bd9244f7SScott Teel } else if (device_change == DEVICE_UPDATED) { 18948aa60681SDon Brace hpsa_scsi_update_entry(h, i, sd[entry]); 1895edd16368SStephen M. Cameron } 1896edd16368SStephen M. Cameron i++; 1897edd16368SStephen M. Cameron } 1898edd16368SStephen M. Cameron 1899edd16368SStephen M. Cameron /* Now, make sure every device listed in sd[] is also 1900edd16368SStephen M. Cameron * listed in h->dev[], adding them if they aren't found 1901edd16368SStephen M. Cameron */ 1902edd16368SStephen M. Cameron 1903edd16368SStephen M. Cameron for (i = 0; i < nsds; i++) { 1904edd16368SStephen M. Cameron if (!sd[i]) /* if already added above. */ 1905edd16368SStephen M. Cameron continue; 19069846590eSStephen M. Cameron 19079846590eSStephen M. Cameron /* Don't add devices which are NOT READY, FORMAT IN PROGRESS 19089846590eSStephen M. Cameron * as the SCSI mid-layer does not handle such devices well. 19099846590eSStephen M. Cameron * It relentlessly loops sending TUR at 3Hz, then READ(10) 19109846590eSStephen M. Cameron * at 160Hz, and prevents the system from coming up. 19119846590eSStephen M. Cameron */ 19129846590eSStephen M. Cameron if (sd[i]->volume_offline) { 19139846590eSStephen M. Cameron hpsa_show_volume_status(h, sd[i]); 19140d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline"); 19159846590eSStephen M. Cameron continue; 19169846590eSStephen M. Cameron } 19179846590eSStephen M. Cameron 1918edd16368SStephen M. Cameron device_change = hpsa_scsi_find_entry(sd[i], h->dev, 1919edd16368SStephen M. Cameron h->ndevices, &entry); 1920edd16368SStephen M. Cameron if (device_change == DEVICE_NOT_FOUND) { 1921edd16368SStephen M. Cameron changes++; 19228aa60681SDon Brace if (hpsa_scsi_add_entry(h, sd[i], added, &nadded) != 0) 1923edd16368SStephen M. Cameron break; 1924edd16368SStephen M. Cameron sd[i] = NULL; /* prevent from being freed later. */ 1925edd16368SStephen M. Cameron } else if (device_change == DEVICE_CHANGED) { 1926edd16368SStephen M. Cameron /* should never happen... */ 1927edd16368SStephen M. Cameron changes++; 1928edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 1929edd16368SStephen M. Cameron "device unexpectedly changed.\n"); 1930edd16368SStephen M. Cameron /* but if it does happen, we just ignore that device */ 1931edd16368SStephen M. Cameron } 1932edd16368SStephen M. Cameron } 193341ce4c35SStephen Cameron hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices); 193441ce4c35SStephen Cameron 193541ce4c35SStephen Cameron /* Now that h->dev[]->phys_disk[] is coherent, we can enable 193641ce4c35SStephen Cameron * any logical drives that need it enabled. 193741ce4c35SStephen Cameron */ 19381d33d85dSDon Brace for (i = 0; i < h->ndevices; i++) { 19391d33d85dSDon Brace if (h->dev[i] == NULL) 19401d33d85dSDon Brace continue; 194141ce4c35SStephen Cameron h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled; 19421d33d85dSDon Brace } 194341ce4c35SStephen Cameron 1944edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->devlock, flags); 1945edd16368SStephen M. Cameron 19469846590eSStephen M. Cameron /* Monitor devices which are in one of several NOT READY states to be 19479846590eSStephen M. Cameron * brought online later. This must be done without holding h->devlock, 19489846590eSStephen M. Cameron * so don't touch h->dev[] 19499846590eSStephen M. Cameron */ 19509846590eSStephen M. Cameron for (i = 0; i < nsds; i++) { 19519846590eSStephen M. Cameron if (!sd[i]) /* if already added above. */ 19529846590eSStephen M. Cameron continue; 19539846590eSStephen M. Cameron if (sd[i]->volume_offline) 19549846590eSStephen M. Cameron hpsa_monitor_offline_device(h, sd[i]->scsi3addr); 19559846590eSStephen M. Cameron } 19569846590eSStephen M. Cameron 1957edd16368SStephen M. Cameron /* Don't notify scsi mid layer of any changes the first time through 1958edd16368SStephen M. Cameron * (or if there are no changes) scsi_scan_host will do it later the 1959edd16368SStephen M. Cameron * first time through. 1960edd16368SStephen M. Cameron */ 19618aa60681SDon Brace if (!changes) 1962edd16368SStephen M. Cameron goto free_and_out; 1963edd16368SStephen M. Cameron 1964edd16368SStephen M. Cameron /* Notify scsi mid layer of any removed devices */ 1965edd16368SStephen M. Cameron for (i = 0; i < nremoved; i++) { 19661d33d85dSDon Brace if (removed[i] == NULL) 19671d33d85dSDon Brace continue; 1968096ccff4SKevin Barnett if (removed[i]->expose_device) 1969096ccff4SKevin Barnett hpsa_remove_device(h, removed[i]); 1970edd16368SStephen M. Cameron kfree(removed[i]); 1971edd16368SStephen M. Cameron removed[i] = NULL; 1972edd16368SStephen M. Cameron } 1973edd16368SStephen M. Cameron 1974edd16368SStephen M. Cameron /* Notify scsi mid layer of any added devices */ 1975edd16368SStephen M. Cameron for (i = 0; i < nadded; i++) { 1976096ccff4SKevin Barnett int rc = 0; 1977096ccff4SKevin Barnett 19781d33d85dSDon Brace if (added[i] == NULL) 197941ce4c35SStephen Cameron continue; 19802a168208SKevin Barnett if (!(added[i]->expose_device)) 1981edd16368SStephen M. Cameron continue; 1982096ccff4SKevin Barnett rc = hpsa_add_device(h, added[i]); 1983096ccff4SKevin Barnett if (!rc) 1984edd16368SStephen M. Cameron continue; 1985096ccff4SKevin Barnett dev_warn(&h->pdev->dev, 1986096ccff4SKevin Barnett "addition failed %d, device not added.", rc); 1987edd16368SStephen M. Cameron /* now we have to remove it from h->dev, 1988edd16368SStephen M. Cameron * since it didn't get added to scsi mid layer 1989edd16368SStephen M. Cameron */ 1990edd16368SStephen M. Cameron fixup_botched_add(h, added[i]); 1991853633e8SDon Brace h->drv_req_rescan = 1; 1992edd16368SStephen M. Cameron } 1993edd16368SStephen M. Cameron 1994edd16368SStephen M. Cameron free_and_out: 1995edd16368SStephen M. Cameron kfree(added); 1996edd16368SStephen M. Cameron kfree(removed); 1997edd16368SStephen M. Cameron } 1998edd16368SStephen M. Cameron 1999edd16368SStephen M. Cameron /* 20009e03aa2fSJoe Perches * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t * 2001edd16368SStephen M. Cameron * Assume's h->devlock is held. 2002edd16368SStephen M. Cameron */ 2003edd16368SStephen M. Cameron static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h, 2004edd16368SStephen M. Cameron int bus, int target, int lun) 2005edd16368SStephen M. Cameron { 2006edd16368SStephen M. Cameron int i; 2007edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd; 2008edd16368SStephen M. Cameron 2009edd16368SStephen M. Cameron for (i = 0; i < h->ndevices; i++) { 2010edd16368SStephen M. Cameron sd = h->dev[i]; 2011edd16368SStephen M. Cameron if (sd->bus == bus && sd->target == target && sd->lun == lun) 2012edd16368SStephen M. Cameron return sd; 2013edd16368SStephen M. Cameron } 2014edd16368SStephen M. Cameron return NULL; 2015edd16368SStephen M. Cameron } 2016edd16368SStephen M. Cameron 2017edd16368SStephen M. Cameron static int hpsa_slave_alloc(struct scsi_device *sdev) 2018edd16368SStephen M. Cameron { 20197630b3a5SHannes Reinecke struct hpsa_scsi_dev_t *sd = NULL; 2020edd16368SStephen M. Cameron unsigned long flags; 2021edd16368SStephen M. Cameron struct ctlr_info *h; 2022edd16368SStephen M. Cameron 2023edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 2024edd16368SStephen M. Cameron spin_lock_irqsave(&h->devlock, flags); 2025d04e62b9SKevin Barnett if (sdev_channel(sdev) == HPSA_PHYSICAL_DEVICE_BUS) { 2026d04e62b9SKevin Barnett struct scsi_target *starget; 2027d04e62b9SKevin Barnett struct sas_rphy *rphy; 2028d04e62b9SKevin Barnett 2029d04e62b9SKevin Barnett starget = scsi_target(sdev); 2030d04e62b9SKevin Barnett rphy = target_to_rphy(starget); 2031d04e62b9SKevin Barnett sd = hpsa_find_device_by_sas_rphy(h, rphy); 2032d04e62b9SKevin Barnett if (sd) { 2033d04e62b9SKevin Barnett sd->target = sdev_id(sdev); 2034d04e62b9SKevin Barnett sd->lun = sdev->lun; 2035d04e62b9SKevin Barnett } 20367630b3a5SHannes Reinecke } 20377630b3a5SHannes Reinecke if (!sd) 2038edd16368SStephen M. Cameron sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev), 2039edd16368SStephen M. Cameron sdev_id(sdev), sdev->lun); 2040d04e62b9SKevin Barnett 2041d04e62b9SKevin Barnett if (sd && sd->expose_device) { 204203383736SDon Brace atomic_set(&sd->ioaccel_cmds_out, 0); 2043d04e62b9SKevin Barnett sdev->hostdata = sd; 204441ce4c35SStephen Cameron } else 204541ce4c35SStephen Cameron sdev->hostdata = NULL; 2046edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->devlock, flags); 2047edd16368SStephen M. Cameron return 0; 2048edd16368SStephen M. Cameron } 2049edd16368SStephen M. Cameron 205041ce4c35SStephen Cameron /* configure scsi device based on internal per-device structure */ 205141ce4c35SStephen Cameron static int hpsa_slave_configure(struct scsi_device *sdev) 205241ce4c35SStephen Cameron { 205341ce4c35SStephen Cameron struct hpsa_scsi_dev_t *sd; 205441ce4c35SStephen Cameron int queue_depth; 205541ce4c35SStephen Cameron 205641ce4c35SStephen Cameron sd = sdev->hostdata; 20572a168208SKevin Barnett sdev->no_uld_attach = !sd || !sd->expose_device; 205841ce4c35SStephen Cameron 20595086435eSDon Brace if (sd) { 20605086435eSDon Brace if (sd->external) 20615086435eSDon Brace queue_depth = EXTERNAL_QD; 20625086435eSDon Brace else 206341ce4c35SStephen Cameron queue_depth = sd->queue_depth != 0 ? 206441ce4c35SStephen Cameron sd->queue_depth : sdev->host->can_queue; 20655086435eSDon Brace } else 206641ce4c35SStephen Cameron queue_depth = sdev->host->can_queue; 206741ce4c35SStephen Cameron 206841ce4c35SStephen Cameron scsi_change_queue_depth(sdev, queue_depth); 206941ce4c35SStephen Cameron 207041ce4c35SStephen Cameron return 0; 207141ce4c35SStephen Cameron } 207241ce4c35SStephen Cameron 2073edd16368SStephen M. Cameron static void hpsa_slave_destroy(struct scsi_device *sdev) 2074edd16368SStephen M. Cameron { 2075bcc44255SStephen M. Cameron /* nothing to do. */ 2076edd16368SStephen M. Cameron } 2077edd16368SStephen M. Cameron 2078d9a729f3SWebb Scales static void hpsa_free_ioaccel2_sg_chain_blocks(struct ctlr_info *h) 2079d9a729f3SWebb Scales { 2080d9a729f3SWebb Scales int i; 2081d9a729f3SWebb Scales 2082d9a729f3SWebb Scales if (!h->ioaccel2_cmd_sg_list) 2083d9a729f3SWebb Scales return; 2084d9a729f3SWebb Scales for (i = 0; i < h->nr_cmds; i++) { 2085d9a729f3SWebb Scales kfree(h->ioaccel2_cmd_sg_list[i]); 2086d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list[i] = NULL; 2087d9a729f3SWebb Scales } 2088d9a729f3SWebb Scales kfree(h->ioaccel2_cmd_sg_list); 2089d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list = NULL; 2090d9a729f3SWebb Scales } 2091d9a729f3SWebb Scales 2092d9a729f3SWebb Scales static int hpsa_allocate_ioaccel2_sg_chain_blocks(struct ctlr_info *h) 2093d9a729f3SWebb Scales { 2094d9a729f3SWebb Scales int i; 2095d9a729f3SWebb Scales 2096d9a729f3SWebb Scales if (h->chainsize <= 0) 2097d9a729f3SWebb Scales return 0; 2098d9a729f3SWebb Scales 2099d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list = 2100d9a729f3SWebb Scales kzalloc(sizeof(*h->ioaccel2_cmd_sg_list) * h->nr_cmds, 2101d9a729f3SWebb Scales GFP_KERNEL); 2102d9a729f3SWebb Scales if (!h->ioaccel2_cmd_sg_list) 2103d9a729f3SWebb Scales return -ENOMEM; 2104d9a729f3SWebb Scales for (i = 0; i < h->nr_cmds; i++) { 2105d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list[i] = 2106d9a729f3SWebb Scales kmalloc(sizeof(*h->ioaccel2_cmd_sg_list[i]) * 2107d9a729f3SWebb Scales h->maxsgentries, GFP_KERNEL); 2108d9a729f3SWebb Scales if (!h->ioaccel2_cmd_sg_list[i]) 2109d9a729f3SWebb Scales goto clean; 2110d9a729f3SWebb Scales } 2111d9a729f3SWebb Scales return 0; 2112d9a729f3SWebb Scales 2113d9a729f3SWebb Scales clean: 2114d9a729f3SWebb Scales hpsa_free_ioaccel2_sg_chain_blocks(h); 2115d9a729f3SWebb Scales return -ENOMEM; 2116d9a729f3SWebb Scales } 2117d9a729f3SWebb Scales 211833a2ffceSStephen M. Cameron static void hpsa_free_sg_chain_blocks(struct ctlr_info *h) 211933a2ffceSStephen M. Cameron { 212033a2ffceSStephen M. Cameron int i; 212133a2ffceSStephen M. Cameron 212233a2ffceSStephen M. Cameron if (!h->cmd_sg_list) 212333a2ffceSStephen M. Cameron return; 212433a2ffceSStephen M. Cameron for (i = 0; i < h->nr_cmds; i++) { 212533a2ffceSStephen M. Cameron kfree(h->cmd_sg_list[i]); 212633a2ffceSStephen M. Cameron h->cmd_sg_list[i] = NULL; 212733a2ffceSStephen M. Cameron } 212833a2ffceSStephen M. Cameron kfree(h->cmd_sg_list); 212933a2ffceSStephen M. Cameron h->cmd_sg_list = NULL; 213033a2ffceSStephen M. Cameron } 213133a2ffceSStephen M. Cameron 2132105a3dbcSRobert Elliott static int hpsa_alloc_sg_chain_blocks(struct ctlr_info *h) 213333a2ffceSStephen M. Cameron { 213433a2ffceSStephen M. Cameron int i; 213533a2ffceSStephen M. Cameron 213633a2ffceSStephen M. Cameron if (h->chainsize <= 0) 213733a2ffceSStephen M. Cameron return 0; 213833a2ffceSStephen M. Cameron 213933a2ffceSStephen M. Cameron h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds, 214033a2ffceSStephen M. Cameron GFP_KERNEL); 21417e8a9486SAmit Kushwaha if (!h->cmd_sg_list) 214233a2ffceSStephen M. Cameron return -ENOMEM; 21437e8a9486SAmit Kushwaha 214433a2ffceSStephen M. Cameron for (i = 0; i < h->nr_cmds; i++) { 214533a2ffceSStephen M. Cameron h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) * 214633a2ffceSStephen M. Cameron h->chainsize, GFP_KERNEL); 21477e8a9486SAmit Kushwaha if (!h->cmd_sg_list[i]) 214833a2ffceSStephen M. Cameron goto clean; 21497e8a9486SAmit Kushwaha 21503d4e6af8SRobert Elliott } 215133a2ffceSStephen M. Cameron return 0; 215233a2ffceSStephen M. Cameron 215333a2ffceSStephen M. Cameron clean: 215433a2ffceSStephen M. Cameron hpsa_free_sg_chain_blocks(h); 215533a2ffceSStephen M. Cameron return -ENOMEM; 215633a2ffceSStephen M. Cameron } 215733a2ffceSStephen M. Cameron 2158d9a729f3SWebb Scales static int hpsa_map_ioaccel2_sg_chain_block(struct ctlr_info *h, 2159d9a729f3SWebb Scales struct io_accel2_cmd *cp, struct CommandList *c) 2160d9a729f3SWebb Scales { 2161d9a729f3SWebb Scales struct ioaccel2_sg_element *chain_block; 2162d9a729f3SWebb Scales u64 temp64; 2163d9a729f3SWebb Scales u32 chain_size; 2164d9a729f3SWebb Scales 2165d9a729f3SWebb Scales chain_block = h->ioaccel2_cmd_sg_list[c->cmdindex]; 2166a736e9b6SDon Brace chain_size = le32_to_cpu(cp->sg[0].length); 2167d9a729f3SWebb Scales temp64 = pci_map_single(h->pdev, chain_block, chain_size, 2168d9a729f3SWebb Scales PCI_DMA_TODEVICE); 2169d9a729f3SWebb Scales if (dma_mapping_error(&h->pdev->dev, temp64)) { 2170d9a729f3SWebb Scales /* prevent subsequent unmapping */ 2171d9a729f3SWebb Scales cp->sg->address = 0; 2172d9a729f3SWebb Scales return -1; 2173d9a729f3SWebb Scales } 2174d9a729f3SWebb Scales cp->sg->address = cpu_to_le64(temp64); 2175d9a729f3SWebb Scales return 0; 2176d9a729f3SWebb Scales } 2177d9a729f3SWebb Scales 2178d9a729f3SWebb Scales static void hpsa_unmap_ioaccel2_sg_chain_block(struct ctlr_info *h, 2179d9a729f3SWebb Scales struct io_accel2_cmd *cp) 2180d9a729f3SWebb Scales { 2181d9a729f3SWebb Scales struct ioaccel2_sg_element *chain_sg; 2182d9a729f3SWebb Scales u64 temp64; 2183d9a729f3SWebb Scales u32 chain_size; 2184d9a729f3SWebb Scales 2185d9a729f3SWebb Scales chain_sg = cp->sg; 2186d9a729f3SWebb Scales temp64 = le64_to_cpu(chain_sg->address); 2187a736e9b6SDon Brace chain_size = le32_to_cpu(cp->sg[0].length); 2188d9a729f3SWebb Scales pci_unmap_single(h->pdev, temp64, chain_size, PCI_DMA_TODEVICE); 2189d9a729f3SWebb Scales } 2190d9a729f3SWebb Scales 2191e2bea6dfSStephen M. Cameron static int hpsa_map_sg_chain_block(struct ctlr_info *h, 219233a2ffceSStephen M. Cameron struct CommandList *c) 219333a2ffceSStephen M. Cameron { 219433a2ffceSStephen M. Cameron struct SGDescriptor *chain_sg, *chain_block; 219533a2ffceSStephen M. Cameron u64 temp64; 219650a0decfSStephen M. Cameron u32 chain_len; 219733a2ffceSStephen M. Cameron 219833a2ffceSStephen M. Cameron chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 219933a2ffceSStephen M. Cameron chain_block = h->cmd_sg_list[c->cmdindex]; 220050a0decfSStephen M. Cameron chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN); 220150a0decfSStephen M. Cameron chain_len = sizeof(*chain_sg) * 22022b08b3e9SDon Brace (le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries); 220350a0decfSStephen M. Cameron chain_sg->Len = cpu_to_le32(chain_len); 220450a0decfSStephen M. Cameron temp64 = pci_map_single(h->pdev, chain_block, chain_len, 220533a2ffceSStephen M. Cameron PCI_DMA_TODEVICE); 2206e2bea6dfSStephen M. Cameron if (dma_mapping_error(&h->pdev->dev, temp64)) { 2207e2bea6dfSStephen M. Cameron /* prevent subsequent unmapping */ 220850a0decfSStephen M. Cameron chain_sg->Addr = cpu_to_le64(0); 2209e2bea6dfSStephen M. Cameron return -1; 2210e2bea6dfSStephen M. Cameron } 221150a0decfSStephen M. Cameron chain_sg->Addr = cpu_to_le64(temp64); 2212e2bea6dfSStephen M. Cameron return 0; 221333a2ffceSStephen M. Cameron } 221433a2ffceSStephen M. Cameron 221533a2ffceSStephen M. Cameron static void hpsa_unmap_sg_chain_block(struct ctlr_info *h, 221633a2ffceSStephen M. Cameron struct CommandList *c) 221733a2ffceSStephen M. Cameron { 221833a2ffceSStephen M. Cameron struct SGDescriptor *chain_sg; 221933a2ffceSStephen M. Cameron 222050a0decfSStephen M. Cameron if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries) 222133a2ffceSStephen M. Cameron return; 222233a2ffceSStephen M. Cameron 222333a2ffceSStephen M. Cameron chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 222450a0decfSStephen M. Cameron pci_unmap_single(h->pdev, le64_to_cpu(chain_sg->Addr), 222550a0decfSStephen M. Cameron le32_to_cpu(chain_sg->Len), PCI_DMA_TODEVICE); 222633a2ffceSStephen M. Cameron } 222733a2ffceSStephen M. Cameron 2228a09c1441SScott Teel 2229a09c1441SScott Teel /* Decode the various types of errors on ioaccel2 path. 2230a09c1441SScott Teel * Return 1 for any error that should generate a RAID path retry. 2231a09c1441SScott Teel * Return 0 for errors that don't require a RAID path retry. 2232a09c1441SScott Teel */ 2233a09c1441SScott Teel static int handle_ioaccel_mode2_error(struct ctlr_info *h, 2234c349775eSScott Teel struct CommandList *c, 2235c349775eSScott Teel struct scsi_cmnd *cmd, 2236ba74fdc4SDon Brace struct io_accel2_cmd *c2, 2237ba74fdc4SDon Brace struct hpsa_scsi_dev_t *dev) 2238c349775eSScott Teel { 2239c349775eSScott Teel int data_len; 2240a09c1441SScott Teel int retry = 0; 2241c40820d5SJoe Handzik u32 ioaccel2_resid = 0; 2242c349775eSScott Teel 2243c349775eSScott Teel switch (c2->error_data.serv_response) { 2244c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_COMPLETE: 2245c349775eSScott Teel switch (c2->error_data.status) { 2246c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_GOOD: 2247c349775eSScott Teel break; 2248c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND: 2249ee6b1889SStephen M. Cameron cmd->result |= SAM_STAT_CHECK_CONDITION; 2250c349775eSScott Teel if (c2->error_data.data_present != 2251ee6b1889SStephen M. Cameron IOACCEL2_SENSE_DATA_PRESENT) { 2252ee6b1889SStephen M. Cameron memset(cmd->sense_buffer, 0, 2253ee6b1889SStephen M. Cameron SCSI_SENSE_BUFFERSIZE); 2254c349775eSScott Teel break; 2255ee6b1889SStephen M. Cameron } 2256c349775eSScott Teel /* copy the sense data */ 2257c349775eSScott Teel data_len = c2->error_data.sense_data_len; 2258c349775eSScott Teel if (data_len > SCSI_SENSE_BUFFERSIZE) 2259c349775eSScott Teel data_len = SCSI_SENSE_BUFFERSIZE; 2260c349775eSScott Teel if (data_len > sizeof(c2->error_data.sense_data_buff)) 2261c349775eSScott Teel data_len = 2262c349775eSScott Teel sizeof(c2->error_data.sense_data_buff); 2263c349775eSScott Teel memcpy(cmd->sense_buffer, 2264c349775eSScott Teel c2->error_data.sense_data_buff, data_len); 2265a09c1441SScott Teel retry = 1; 2266c349775eSScott Teel break; 2267c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_BUSY: 2268a09c1441SScott Teel retry = 1; 2269c349775eSScott Teel break; 2270c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON: 2271a09c1441SScott Teel retry = 1; 2272c349775eSScott Teel break; 2273c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL: 22744a8da22bSStephen Cameron retry = 1; 2275c349775eSScott Teel break; 2276c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED: 2277a09c1441SScott Teel retry = 1; 2278c349775eSScott Teel break; 2279c349775eSScott Teel default: 2280a09c1441SScott Teel retry = 1; 2281c349775eSScott Teel break; 2282c349775eSScott Teel } 2283c349775eSScott Teel break; 2284c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_FAILURE: 2285c40820d5SJoe Handzik switch (c2->error_data.status) { 2286c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_IO_ERROR: 2287c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_IO_ABORTED: 2288c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_OVERRUN: 2289c40820d5SJoe Handzik retry = 1; 2290c40820d5SJoe Handzik break; 2291c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_UNDERRUN: 2292c40820d5SJoe Handzik cmd->result = (DID_OK << 16); /* host byte */ 2293c40820d5SJoe Handzik cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 2294c40820d5SJoe Handzik ioaccel2_resid = get_unaligned_le32( 2295c40820d5SJoe Handzik &c2->error_data.resid_cnt[0]); 2296c40820d5SJoe Handzik scsi_set_resid(cmd, ioaccel2_resid); 2297c40820d5SJoe Handzik break; 2298c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_NO_PATH_TO_DEVICE: 2299c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_INVALID_DEVICE: 2300c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_IOACCEL_DISABLED: 2301ba74fdc4SDon Brace /* 2302ba74fdc4SDon Brace * Did an HBA disk disappear? We will eventually 2303ba74fdc4SDon Brace * get a state change event from the controller but 2304ba74fdc4SDon Brace * in the meantime, we need to tell the OS that the 2305ba74fdc4SDon Brace * HBA disk is no longer there and stop I/O 2306ba74fdc4SDon Brace * from going down. This allows the potential re-insert 2307ba74fdc4SDon Brace * of the disk to get the same device node. 2308ba74fdc4SDon Brace */ 2309ba74fdc4SDon Brace if (dev->physical_device && dev->expose_device) { 2310ba74fdc4SDon Brace cmd->result = DID_NO_CONNECT << 16; 2311ba74fdc4SDon Brace dev->removed = 1; 2312ba74fdc4SDon Brace h->drv_req_rescan = 1; 2313ba74fdc4SDon Brace dev_warn(&h->pdev->dev, 2314ba74fdc4SDon Brace "%s: device is gone!\n", __func__); 2315ba74fdc4SDon Brace } else 2316ba74fdc4SDon Brace /* 2317ba74fdc4SDon Brace * Retry by sending down the RAID path. 2318ba74fdc4SDon Brace * We will get an event from ctlr to 2319ba74fdc4SDon Brace * trigger rescan regardless. 2320ba74fdc4SDon Brace */ 2321c40820d5SJoe Handzik retry = 1; 2322c40820d5SJoe Handzik break; 2323c40820d5SJoe Handzik default: 2324c40820d5SJoe Handzik retry = 1; 2325c40820d5SJoe Handzik } 2326c349775eSScott Teel break; 2327c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE: 2328c349775eSScott Teel break; 2329c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS: 2330c349775eSScott Teel break; 2331c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_REJECTED: 2332a09c1441SScott Teel retry = 1; 2333c349775eSScott Teel break; 2334c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN: 2335c349775eSScott Teel break; 2336c349775eSScott Teel default: 2337a09c1441SScott Teel retry = 1; 2338c349775eSScott Teel break; 2339c349775eSScott Teel } 2340a09c1441SScott Teel 2341a09c1441SScott Teel return retry; /* retry on raid path? */ 2342c349775eSScott Teel } 2343c349775eSScott Teel 2344a58e7e53SWebb Scales static void hpsa_cmd_resolve_events(struct ctlr_info *h, 2345a58e7e53SWebb Scales struct CommandList *c) 2346a58e7e53SWebb Scales { 2347d604f533SWebb Scales bool do_wake = false; 2348d604f533SWebb Scales 2349a58e7e53SWebb Scales /* 235008ec46f6SDon Brace * Reset c->scsi_cmd here so that the reset handler will know 2351d604f533SWebb Scales * this command has completed. Then, check to see if the handler is 2352a58e7e53SWebb Scales * waiting for this command, and, if so, wake it. 2353a58e7e53SWebb Scales */ 2354a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_IDLE; 2355d604f533SWebb Scales mb(); /* Declare command idle before checking for pending events. */ 2356d604f533SWebb Scales if (c->reset_pending) { 2357d604f533SWebb Scales unsigned long flags; 2358d604f533SWebb Scales struct hpsa_scsi_dev_t *dev; 2359d604f533SWebb Scales 2360d604f533SWebb Scales /* 2361d604f533SWebb Scales * There appears to be a reset pending; lock the lock and 2362d604f533SWebb Scales * reconfirm. If so, then decrement the count of outstanding 2363d604f533SWebb Scales * commands and wake the reset command if this is the last one. 2364d604f533SWebb Scales */ 2365d604f533SWebb Scales spin_lock_irqsave(&h->lock, flags); 2366d604f533SWebb Scales dev = c->reset_pending; /* Re-fetch under the lock. */ 2367d604f533SWebb Scales if (dev && atomic_dec_and_test(&dev->reset_cmds_out)) 2368d604f533SWebb Scales do_wake = true; 2369d604f533SWebb Scales c->reset_pending = NULL; 2370d604f533SWebb Scales spin_unlock_irqrestore(&h->lock, flags); 2371d604f533SWebb Scales } 2372d604f533SWebb Scales 2373d604f533SWebb Scales if (do_wake) 2374d604f533SWebb Scales wake_up_all(&h->event_sync_wait_queue); 2375a58e7e53SWebb Scales } 2376a58e7e53SWebb Scales 237773153fe5SWebb Scales static void hpsa_cmd_resolve_and_free(struct ctlr_info *h, 237873153fe5SWebb Scales struct CommandList *c) 237973153fe5SWebb Scales { 238073153fe5SWebb Scales hpsa_cmd_resolve_events(h, c); 238173153fe5SWebb Scales cmd_tagged_free(h, c); 238273153fe5SWebb Scales } 238373153fe5SWebb Scales 23848a0ff92cSWebb Scales static void hpsa_cmd_free_and_done(struct ctlr_info *h, 23858a0ff92cSWebb Scales struct CommandList *c, struct scsi_cmnd *cmd) 23868a0ff92cSWebb Scales { 238773153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 2388d49c2077SDon Brace if (cmd && cmd->scsi_done) 23898a0ff92cSWebb Scales cmd->scsi_done(cmd); 23908a0ff92cSWebb Scales } 23918a0ff92cSWebb Scales 23928a0ff92cSWebb Scales static void hpsa_retry_cmd(struct ctlr_info *h, struct CommandList *c) 23938a0ff92cSWebb Scales { 23948a0ff92cSWebb Scales INIT_WORK(&c->work, hpsa_command_resubmit_worker); 23958a0ff92cSWebb Scales queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work); 23968a0ff92cSWebb Scales } 23978a0ff92cSWebb Scales 2398c349775eSScott Teel static void process_ioaccel2_completion(struct ctlr_info *h, 2399c349775eSScott Teel struct CommandList *c, struct scsi_cmnd *cmd, 2400c349775eSScott Teel struct hpsa_scsi_dev_t *dev) 2401c349775eSScott Teel { 2402c349775eSScott Teel struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 2403c349775eSScott Teel 2404c349775eSScott Teel /* check for good status */ 2405c349775eSScott Teel if (likely(c2->error_data.serv_response == 0 && 24068a0ff92cSWebb Scales c2->error_data.status == 0)) 24078a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, c, cmd); 2408c349775eSScott Teel 24098a0ff92cSWebb Scales /* 24108a0ff92cSWebb Scales * Any RAID offload error results in retry which will use 2411c349775eSScott Teel * the normal I/O path so the controller can handle whatever's 2412c349775eSScott Teel * wrong. 2413c349775eSScott Teel */ 2414f3f01730SKevin Barnett if (is_logical_device(dev) && 2415c349775eSScott Teel c2->error_data.serv_response == 2416c349775eSScott Teel IOACCEL2_SERV_RESPONSE_FAILURE) { 2417080ef1ccSDon Brace if (c2->error_data.status == 2418064d1b1dSDon Brace IOACCEL2_STATUS_SR_IOACCEL_DISABLED) { 2419c349775eSScott Teel dev->offload_enabled = 0; 2420064d1b1dSDon Brace dev->offload_to_be_enabled = 0; 2421064d1b1dSDon Brace } 24228a0ff92cSWebb Scales 24238a0ff92cSWebb Scales return hpsa_retry_cmd(h, c); 2424080ef1ccSDon Brace } 2425080ef1ccSDon Brace 2426ba74fdc4SDon Brace if (handle_ioaccel_mode2_error(h, c, cmd, c2, dev)) 24278a0ff92cSWebb Scales return hpsa_retry_cmd(h, c); 2428080ef1ccSDon Brace 24298a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, c, cmd); 2430c349775eSScott Teel } 2431c349775eSScott Teel 24329437ac43SStephen Cameron /* Returns 0 on success, < 0 otherwise. */ 24339437ac43SStephen Cameron static int hpsa_evaluate_tmf_status(struct ctlr_info *h, 24349437ac43SStephen Cameron struct CommandList *cp) 24359437ac43SStephen Cameron { 24369437ac43SStephen Cameron u8 tmf_status = cp->err_info->ScsiStatus; 24379437ac43SStephen Cameron 24389437ac43SStephen Cameron switch (tmf_status) { 24399437ac43SStephen Cameron case CISS_TMF_COMPLETE: 24409437ac43SStephen Cameron /* 24419437ac43SStephen Cameron * CISS_TMF_COMPLETE never happens, instead, 24429437ac43SStephen Cameron * ei->CommandStatus == 0 for this case. 24439437ac43SStephen Cameron */ 24449437ac43SStephen Cameron case CISS_TMF_SUCCESS: 24459437ac43SStephen Cameron return 0; 24469437ac43SStephen Cameron case CISS_TMF_INVALID_FRAME: 24479437ac43SStephen Cameron case CISS_TMF_NOT_SUPPORTED: 24489437ac43SStephen Cameron case CISS_TMF_FAILED: 24499437ac43SStephen Cameron case CISS_TMF_WRONG_LUN: 24509437ac43SStephen Cameron case CISS_TMF_OVERLAPPED_TAG: 24519437ac43SStephen Cameron break; 24529437ac43SStephen Cameron default: 24539437ac43SStephen Cameron dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n", 24549437ac43SStephen Cameron tmf_status); 24559437ac43SStephen Cameron break; 24569437ac43SStephen Cameron } 24579437ac43SStephen Cameron return -tmf_status; 24589437ac43SStephen Cameron } 24599437ac43SStephen Cameron 24601fb011fbSStephen M. Cameron static void complete_scsi_command(struct CommandList *cp) 2461edd16368SStephen M. Cameron { 2462edd16368SStephen M. Cameron struct scsi_cmnd *cmd; 2463edd16368SStephen M. Cameron struct ctlr_info *h; 2464edd16368SStephen M. Cameron struct ErrorInfo *ei; 2465283b4a9bSStephen M. Cameron struct hpsa_scsi_dev_t *dev; 2466d9a729f3SWebb Scales struct io_accel2_cmd *c2; 2467edd16368SStephen M. Cameron 24689437ac43SStephen Cameron u8 sense_key; 24699437ac43SStephen Cameron u8 asc; /* additional sense code */ 24709437ac43SStephen Cameron u8 ascq; /* additional sense code qualifier */ 2471db111e18SStephen M. Cameron unsigned long sense_data_size; 2472edd16368SStephen M. Cameron 2473edd16368SStephen M. Cameron ei = cp->err_info; 24747fa3030cSStephen Cameron cmd = cp->scsi_cmd; 2475edd16368SStephen M. Cameron h = cp->h; 2476d49c2077SDon Brace 2477d49c2077SDon Brace if (!cmd->device) { 2478d49c2077SDon Brace cmd->result = DID_NO_CONNECT << 16; 2479d49c2077SDon Brace return hpsa_cmd_free_and_done(h, cp, cmd); 2480d49c2077SDon Brace } 2481d49c2077SDon Brace 2482283b4a9bSStephen M. Cameron dev = cmd->device->hostdata; 248345e596cdSDon Brace if (!dev) { 248445e596cdSDon Brace cmd->result = DID_NO_CONNECT << 16; 248545e596cdSDon Brace return hpsa_cmd_free_and_done(h, cp, cmd); 248645e596cdSDon Brace } 2487d9a729f3SWebb Scales c2 = &h->ioaccel2_cmd_pool[cp->cmdindex]; 2488edd16368SStephen M. Cameron 2489edd16368SStephen M. Cameron scsi_dma_unmap(cmd); /* undo the DMA mappings */ 2490e1f7de0cSMatt Gates if ((cp->cmd_type == CMD_SCSI) && 24912b08b3e9SDon Brace (le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries)) 249233a2ffceSStephen M. Cameron hpsa_unmap_sg_chain_block(h, cp); 2493edd16368SStephen M. Cameron 2494d9a729f3SWebb Scales if ((cp->cmd_type == CMD_IOACCEL2) && 2495d9a729f3SWebb Scales (c2->sg[0].chain_indicator == IOACCEL2_CHAIN)) 2496d9a729f3SWebb Scales hpsa_unmap_ioaccel2_sg_chain_block(h, c2); 2497d9a729f3SWebb Scales 2498edd16368SStephen M. Cameron cmd->result = (DID_OK << 16); /* host byte */ 2499edd16368SStephen M. Cameron cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 2500c349775eSScott Teel 2501d49c2077SDon Brace if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1) { 2502d49c2077SDon Brace if (dev->physical_device && dev->expose_device && 2503d49c2077SDon Brace dev->removed) { 2504d49c2077SDon Brace cmd->result = DID_NO_CONNECT << 16; 2505d49c2077SDon Brace return hpsa_cmd_free_and_done(h, cp, cmd); 2506d49c2077SDon Brace } 2507d49c2077SDon Brace if (likely(cp->phys_disk != NULL)) 250803383736SDon Brace atomic_dec(&cp->phys_disk->ioaccel_cmds_out); 2509d49c2077SDon Brace } 251003383736SDon Brace 251125163bd5SWebb Scales /* 251225163bd5SWebb Scales * We check for lockup status here as it may be set for 251325163bd5SWebb Scales * CMD_SCSI, CMD_IOACCEL1 and CMD_IOACCEL2 commands by 251425163bd5SWebb Scales * fail_all_oustanding_cmds() 251525163bd5SWebb Scales */ 251625163bd5SWebb Scales if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) { 251725163bd5SWebb Scales /* DID_NO_CONNECT will prevent a retry */ 251825163bd5SWebb Scales cmd->result = DID_NO_CONNECT << 16; 25198a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, cp, cmd); 252025163bd5SWebb Scales } 252125163bd5SWebb Scales 252208ec46f6SDon Brace if ((unlikely(hpsa_is_pending_event(cp)))) 2523d604f533SWebb Scales if (cp->reset_pending) 2524bfd7546cSDon Brace return hpsa_cmd_free_and_done(h, cp, cmd); 2525d604f533SWebb Scales 2526c349775eSScott Teel if (cp->cmd_type == CMD_IOACCEL2) 2527c349775eSScott Teel return process_ioaccel2_completion(h, cp, cmd, dev); 2528c349775eSScott Teel 25296aa4c361SRobert Elliott scsi_set_resid(cmd, ei->ResidualCnt); 25308a0ff92cSWebb Scales if (ei->CommandStatus == 0) 25318a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, cp, cmd); 25326aa4c361SRobert Elliott 2533e1f7de0cSMatt Gates /* For I/O accelerator commands, copy over some fields to the normal 2534e1f7de0cSMatt Gates * CISS header used below for error handling. 2535e1f7de0cSMatt Gates */ 2536e1f7de0cSMatt Gates if (cp->cmd_type == CMD_IOACCEL1) { 2537e1f7de0cSMatt Gates struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex]; 25382b08b3e9SDon Brace cp->Header.SGList = scsi_sg_count(cmd); 25392b08b3e9SDon Brace cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList); 25402b08b3e9SDon Brace cp->Request.CDBLen = le16_to_cpu(c->io_flags) & 25412b08b3e9SDon Brace IOACCEL1_IOFLAGS_CDBLEN_MASK; 254250a0decfSStephen M. Cameron cp->Header.tag = c->tag; 2543e1f7de0cSMatt Gates memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8); 2544e1f7de0cSMatt Gates memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen); 2545283b4a9bSStephen M. Cameron 2546283b4a9bSStephen M. Cameron /* Any RAID offload error results in retry which will use 2547283b4a9bSStephen M. Cameron * the normal I/O path so the controller can handle whatever's 2548283b4a9bSStephen M. Cameron * wrong. 2549283b4a9bSStephen M. Cameron */ 2550f3f01730SKevin Barnett if (is_logical_device(dev)) { 2551283b4a9bSStephen M. Cameron if (ei->CommandStatus == CMD_IOACCEL_DISABLED) 2552283b4a9bSStephen M. Cameron dev->offload_enabled = 0; 25538a0ff92cSWebb Scales return hpsa_retry_cmd(h, cp); 2554283b4a9bSStephen M. Cameron } 2555e1f7de0cSMatt Gates } 2556e1f7de0cSMatt Gates 2557edd16368SStephen M. Cameron /* an error has occurred */ 2558edd16368SStephen M. Cameron switch (ei->CommandStatus) { 2559edd16368SStephen M. Cameron 2560edd16368SStephen M. Cameron case CMD_TARGET_STATUS: 25619437ac43SStephen Cameron cmd->result |= ei->ScsiStatus; 25629437ac43SStephen Cameron /* copy the sense data */ 25639437ac43SStephen Cameron if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo)) 25649437ac43SStephen Cameron sense_data_size = SCSI_SENSE_BUFFERSIZE; 25659437ac43SStephen Cameron else 25669437ac43SStephen Cameron sense_data_size = sizeof(ei->SenseInfo); 25679437ac43SStephen Cameron if (ei->SenseLen < sense_data_size) 25689437ac43SStephen Cameron sense_data_size = ei->SenseLen; 25699437ac43SStephen Cameron memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size); 25709437ac43SStephen Cameron if (ei->ScsiStatus) 25719437ac43SStephen Cameron decode_sense_data(ei->SenseInfo, sense_data_size, 25729437ac43SStephen Cameron &sense_key, &asc, &ascq); 2573edd16368SStephen M. Cameron if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) { 25741d3b3609SMatt Gates if (sense_key == ABORTED_COMMAND) { 25752e311fbaSStephen M. Cameron cmd->result |= DID_SOFT_ERROR << 16; 25761d3b3609SMatt Gates break; 25771d3b3609SMatt Gates } 2578edd16368SStephen M. Cameron break; 2579edd16368SStephen M. Cameron } 2580edd16368SStephen M. Cameron /* Problem was not a check condition 2581edd16368SStephen M. Cameron * Pass it up to the upper layers... 2582edd16368SStephen M. Cameron */ 2583edd16368SStephen M. Cameron if (ei->ScsiStatus) { 2584edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "cp %p has status 0x%x " 2585edd16368SStephen M. Cameron "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, " 2586edd16368SStephen M. Cameron "Returning result: 0x%x\n", 2587edd16368SStephen M. Cameron cp, ei->ScsiStatus, 2588edd16368SStephen M. Cameron sense_key, asc, ascq, 2589edd16368SStephen M. Cameron cmd->result); 2590edd16368SStephen M. Cameron } else { /* scsi status is zero??? How??? */ 2591edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. " 2592edd16368SStephen M. Cameron "Returning no connection.\n", cp), 2593edd16368SStephen M. Cameron 2594edd16368SStephen M. Cameron /* Ordinarily, this case should never happen, 2595edd16368SStephen M. Cameron * but there is a bug in some released firmware 2596edd16368SStephen M. Cameron * revisions that allows it to happen if, for 2597edd16368SStephen M. Cameron * example, a 4100 backplane loses power and 2598edd16368SStephen M. Cameron * the tape drive is in it. We assume that 2599edd16368SStephen M. Cameron * it's a fatal error of some kind because we 2600edd16368SStephen M. Cameron * can't show that it wasn't. We will make it 2601edd16368SStephen M. Cameron * look like selection timeout since that is 2602edd16368SStephen M. Cameron * the most common reason for this to occur, 2603edd16368SStephen M. Cameron * and it's severe enough. 2604edd16368SStephen M. Cameron */ 2605edd16368SStephen M. Cameron 2606edd16368SStephen M. Cameron cmd->result = DID_NO_CONNECT << 16; 2607edd16368SStephen M. Cameron } 2608edd16368SStephen M. Cameron break; 2609edd16368SStephen M. Cameron 2610edd16368SStephen M. Cameron case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 2611edd16368SStephen M. Cameron break; 2612edd16368SStephen M. Cameron case CMD_DATA_OVERRUN: 2613f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, 2614f42e81e1SStephen Cameron "CDB %16phN data overrun\n", cp->Request.CDB); 2615edd16368SStephen M. Cameron break; 2616edd16368SStephen M. Cameron case CMD_INVALID: { 2617edd16368SStephen M. Cameron /* print_bytes(cp, sizeof(*cp), 1, 0); 2618edd16368SStephen M. Cameron print_cmd(cp); */ 2619edd16368SStephen M. Cameron /* We get CMD_INVALID if you address a non-existent device 2620edd16368SStephen M. Cameron * instead of a selection timeout (no response). You will 2621edd16368SStephen M. Cameron * see this if you yank out a drive, then try to access it. 2622edd16368SStephen M. Cameron * This is kind of a shame because it means that any other 2623edd16368SStephen M. Cameron * CMD_INVALID (e.g. driver bug) will get interpreted as a 2624edd16368SStephen M. Cameron * missing target. */ 2625edd16368SStephen M. Cameron cmd->result = DID_NO_CONNECT << 16; 2626edd16368SStephen M. Cameron } 2627edd16368SStephen M. Cameron break; 2628edd16368SStephen M. Cameron case CMD_PROTOCOL_ERR: 2629256d0eaaSStephen M. Cameron cmd->result = DID_ERROR << 16; 2630f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n", 2631f42e81e1SStephen Cameron cp->Request.CDB); 2632edd16368SStephen M. Cameron break; 2633edd16368SStephen M. Cameron case CMD_HARDWARE_ERR: 2634edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2635f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n", 2636f42e81e1SStephen Cameron cp->Request.CDB); 2637edd16368SStephen M. Cameron break; 2638edd16368SStephen M. Cameron case CMD_CONNECTION_LOST: 2639edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2640f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n", 2641f42e81e1SStephen Cameron cp->Request.CDB); 2642edd16368SStephen M. Cameron break; 2643edd16368SStephen M. Cameron case CMD_ABORTED: 264408ec46f6SDon Brace cmd->result = DID_ABORT << 16; 264508ec46f6SDon Brace break; 2646edd16368SStephen M. Cameron case CMD_ABORT_FAILED: 2647edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2648f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n", 2649f42e81e1SStephen Cameron cp->Request.CDB); 2650edd16368SStephen M. Cameron break; 2651edd16368SStephen M. Cameron case CMD_UNSOLICITED_ABORT: 2652f6e76055SStephen M. Cameron cmd->result = DID_SOFT_ERROR << 16; /* retry the command */ 2653f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n", 2654f42e81e1SStephen Cameron cp->Request.CDB); 2655edd16368SStephen M. Cameron break; 2656edd16368SStephen M. Cameron case CMD_TIMEOUT: 2657edd16368SStephen M. Cameron cmd->result = DID_TIME_OUT << 16; 2658f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN timed out\n", 2659f42e81e1SStephen Cameron cp->Request.CDB); 2660edd16368SStephen M. Cameron break; 26611d5e2ed0SStephen M. Cameron case CMD_UNABORTABLE: 26621d5e2ed0SStephen M. Cameron cmd->result = DID_ERROR << 16; 26631d5e2ed0SStephen M. Cameron dev_warn(&h->pdev->dev, "Command unabortable\n"); 26641d5e2ed0SStephen M. Cameron break; 26659437ac43SStephen Cameron case CMD_TMF_STATUS: 26669437ac43SStephen Cameron if (hpsa_evaluate_tmf_status(h, cp)) /* TMF failed? */ 26679437ac43SStephen Cameron cmd->result = DID_ERROR << 16; 26689437ac43SStephen Cameron break; 2669283b4a9bSStephen M. Cameron case CMD_IOACCEL_DISABLED: 2670283b4a9bSStephen M. Cameron /* This only handles the direct pass-through case since RAID 2671283b4a9bSStephen M. Cameron * offload is handled above. Just attempt a retry. 2672283b4a9bSStephen M. Cameron */ 2673283b4a9bSStephen M. Cameron cmd->result = DID_SOFT_ERROR << 16; 2674283b4a9bSStephen M. Cameron dev_warn(&h->pdev->dev, 2675283b4a9bSStephen M. Cameron "cp %p had HP SSD Smart Path error\n", cp); 2676283b4a9bSStephen M. Cameron break; 2677edd16368SStephen M. Cameron default: 2678edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2679edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n", 2680edd16368SStephen M. Cameron cp, ei->CommandStatus); 2681edd16368SStephen M. Cameron } 26828a0ff92cSWebb Scales 26838a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, cp, cmd); 2684edd16368SStephen M. Cameron } 2685edd16368SStephen M. Cameron 2686edd16368SStephen M. Cameron static void hpsa_pci_unmap(struct pci_dev *pdev, 2687edd16368SStephen M. Cameron struct CommandList *c, int sg_used, int data_direction) 2688edd16368SStephen M. Cameron { 2689edd16368SStephen M. Cameron int i; 2690edd16368SStephen M. Cameron 269150a0decfSStephen M. Cameron for (i = 0; i < sg_used; i++) 269250a0decfSStephen M. Cameron pci_unmap_single(pdev, (dma_addr_t) le64_to_cpu(c->SG[i].Addr), 269350a0decfSStephen M. Cameron le32_to_cpu(c->SG[i].Len), 2694edd16368SStephen M. Cameron data_direction); 2695edd16368SStephen M. Cameron } 2696edd16368SStephen M. Cameron 2697a2dac136SStephen M. Cameron static int hpsa_map_one(struct pci_dev *pdev, 2698edd16368SStephen M. Cameron struct CommandList *cp, 2699edd16368SStephen M. Cameron unsigned char *buf, 2700edd16368SStephen M. Cameron size_t buflen, 2701edd16368SStephen M. Cameron int data_direction) 2702edd16368SStephen M. Cameron { 270301a02ffcSStephen M. Cameron u64 addr64; 2704edd16368SStephen M. Cameron 2705edd16368SStephen M. Cameron if (buflen == 0 || data_direction == PCI_DMA_NONE) { 2706edd16368SStephen M. Cameron cp->Header.SGList = 0; 270750a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(0); 2708a2dac136SStephen M. Cameron return 0; 2709edd16368SStephen M. Cameron } 2710edd16368SStephen M. Cameron 271150a0decfSStephen M. Cameron addr64 = pci_map_single(pdev, buf, buflen, data_direction); 2712eceaae18SShuah Khan if (dma_mapping_error(&pdev->dev, addr64)) { 2713a2dac136SStephen M. Cameron /* Prevent subsequent unmap of something never mapped */ 2714eceaae18SShuah Khan cp->Header.SGList = 0; 271550a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(0); 2716a2dac136SStephen M. Cameron return -1; 2717eceaae18SShuah Khan } 271850a0decfSStephen M. Cameron cp->SG[0].Addr = cpu_to_le64(addr64); 271950a0decfSStephen M. Cameron cp->SG[0].Len = cpu_to_le32(buflen); 272050a0decfSStephen M. Cameron cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */ 272150a0decfSStephen M. Cameron cp->Header.SGList = 1; /* no. SGs contig in this cmd */ 272250a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */ 2723a2dac136SStephen M. Cameron return 0; 2724edd16368SStephen M. Cameron } 2725edd16368SStephen M. Cameron 272625163bd5SWebb Scales #define NO_TIMEOUT ((unsigned long) -1) 272725163bd5SWebb Scales #define DEFAULT_TIMEOUT 30000 /* milliseconds */ 272825163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h, 272925163bd5SWebb Scales struct CommandList *c, int reply_queue, unsigned long timeout_msecs) 2730edd16368SStephen M. Cameron { 2731edd16368SStephen M. Cameron DECLARE_COMPLETION_ONSTACK(wait); 2732edd16368SStephen M. Cameron 2733edd16368SStephen M. Cameron c->waiting = &wait; 273425163bd5SWebb Scales __enqueue_cmd_and_start_io(h, c, reply_queue); 273525163bd5SWebb Scales if (timeout_msecs == NO_TIMEOUT) { 273625163bd5SWebb Scales /* TODO: get rid of this no-timeout thing */ 273725163bd5SWebb Scales wait_for_completion_io(&wait); 273825163bd5SWebb Scales return IO_OK; 273925163bd5SWebb Scales } 274025163bd5SWebb Scales if (!wait_for_completion_io_timeout(&wait, 274125163bd5SWebb Scales msecs_to_jiffies(timeout_msecs))) { 274225163bd5SWebb Scales dev_warn(&h->pdev->dev, "Command timed out.\n"); 274325163bd5SWebb Scales return -ETIMEDOUT; 274425163bd5SWebb Scales } 274525163bd5SWebb Scales return IO_OK; 274625163bd5SWebb Scales } 274725163bd5SWebb Scales 274825163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c, 274925163bd5SWebb Scales int reply_queue, unsigned long timeout_msecs) 275025163bd5SWebb Scales { 275125163bd5SWebb Scales if (unlikely(lockup_detected(h))) { 275225163bd5SWebb Scales c->err_info->CommandStatus = CMD_CTLR_LOCKUP; 275325163bd5SWebb Scales return IO_OK; 275425163bd5SWebb Scales } 275525163bd5SWebb Scales return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs); 2756edd16368SStephen M. Cameron } 2757edd16368SStephen M. Cameron 2758094963daSStephen M. Cameron static u32 lockup_detected(struct ctlr_info *h) 2759094963daSStephen M. Cameron { 2760094963daSStephen M. Cameron int cpu; 2761094963daSStephen M. Cameron u32 rc, *lockup_detected; 2762094963daSStephen M. Cameron 2763094963daSStephen M. Cameron cpu = get_cpu(); 2764094963daSStephen M. Cameron lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 2765094963daSStephen M. Cameron rc = *lockup_detected; 2766094963daSStephen M. Cameron put_cpu(); 2767094963daSStephen M. Cameron return rc; 2768094963daSStephen M. Cameron } 2769094963daSStephen M. Cameron 27709c2fc160SStephen M. Cameron #define MAX_DRIVER_CMD_RETRIES 25 277125163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h, 277225163bd5SWebb Scales struct CommandList *c, int data_direction, unsigned long timeout_msecs) 2773edd16368SStephen M. Cameron { 27749c2fc160SStephen M. Cameron int backoff_time = 10, retry_count = 0; 277525163bd5SWebb Scales int rc; 2776edd16368SStephen M. Cameron 2777edd16368SStephen M. Cameron do { 27787630abd0SJoe Perches memset(c->err_info, 0, sizeof(*c->err_info)); 277925163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 278025163bd5SWebb Scales timeout_msecs); 278125163bd5SWebb Scales if (rc) 278225163bd5SWebb Scales break; 2783edd16368SStephen M. Cameron retry_count++; 27849c2fc160SStephen M. Cameron if (retry_count > 3) { 27859c2fc160SStephen M. Cameron msleep(backoff_time); 27869c2fc160SStephen M. Cameron if (backoff_time < 1000) 27879c2fc160SStephen M. Cameron backoff_time *= 2; 27889c2fc160SStephen M. Cameron } 2789852af20aSMatt Bondurant } while ((check_for_unit_attention(h, c) || 27909c2fc160SStephen M. Cameron check_for_busy(h, c)) && 27919c2fc160SStephen M. Cameron retry_count <= MAX_DRIVER_CMD_RETRIES); 2792edd16368SStephen M. Cameron hpsa_pci_unmap(h->pdev, c, 1, data_direction); 279325163bd5SWebb Scales if (retry_count > MAX_DRIVER_CMD_RETRIES) 279425163bd5SWebb Scales rc = -EIO; 279525163bd5SWebb Scales return rc; 2796edd16368SStephen M. Cameron } 2797edd16368SStephen M. Cameron 2798d1e8beacSStephen M. Cameron static void hpsa_print_cmd(struct ctlr_info *h, char *txt, 2799d1e8beacSStephen M. Cameron struct CommandList *c) 2800edd16368SStephen M. Cameron { 2801d1e8beacSStephen M. Cameron const u8 *cdb = c->Request.CDB; 2802d1e8beacSStephen M. Cameron const u8 *lun = c->Header.LUN.LunAddrBytes; 2803edd16368SStephen M. Cameron 2804609a70dfSRasmus Villemoes dev_warn(&h->pdev->dev, "%s: LUN:%8phN CDB:%16phN\n", 2805609a70dfSRasmus Villemoes txt, lun, cdb); 2806d1e8beacSStephen M. Cameron } 2807d1e8beacSStephen M. Cameron 2808d1e8beacSStephen M. Cameron static void hpsa_scsi_interpret_error(struct ctlr_info *h, 2809d1e8beacSStephen M. Cameron struct CommandList *cp) 2810d1e8beacSStephen M. Cameron { 2811d1e8beacSStephen M. Cameron const struct ErrorInfo *ei = cp->err_info; 2812d1e8beacSStephen M. Cameron struct device *d = &cp->h->pdev->dev; 28139437ac43SStephen Cameron u8 sense_key, asc, ascq; 28149437ac43SStephen Cameron int sense_len; 2815d1e8beacSStephen M. Cameron 2816edd16368SStephen M. Cameron switch (ei->CommandStatus) { 2817edd16368SStephen M. Cameron case CMD_TARGET_STATUS: 28189437ac43SStephen Cameron if (ei->SenseLen > sizeof(ei->SenseInfo)) 28199437ac43SStephen Cameron sense_len = sizeof(ei->SenseInfo); 28209437ac43SStephen Cameron else 28219437ac43SStephen Cameron sense_len = ei->SenseLen; 28229437ac43SStephen Cameron decode_sense_data(ei->SenseInfo, sense_len, 28239437ac43SStephen Cameron &sense_key, &asc, &ascq); 2824d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "SCSI status", cp); 2825d1e8beacSStephen M. Cameron if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) 28269437ac43SStephen Cameron dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n", 28279437ac43SStephen Cameron sense_key, asc, ascq); 2828d1e8beacSStephen M. Cameron else 28299437ac43SStephen Cameron dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus); 2830edd16368SStephen M. Cameron if (ei->ScsiStatus == 0) 2831edd16368SStephen M. Cameron dev_warn(d, "SCSI status is abnormally zero. " 2832edd16368SStephen M. Cameron "(probably indicates selection timeout " 2833edd16368SStephen M. Cameron "reported incorrectly due to a known " 2834edd16368SStephen M. Cameron "firmware bug, circa July, 2001.)\n"); 2835edd16368SStephen M. Cameron break; 2836edd16368SStephen M. Cameron case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 2837edd16368SStephen M. Cameron break; 2838edd16368SStephen M. Cameron case CMD_DATA_OVERRUN: 2839d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "overrun condition", cp); 2840edd16368SStephen M. Cameron break; 2841edd16368SStephen M. Cameron case CMD_INVALID: { 2842edd16368SStephen M. Cameron /* controller unfortunately reports SCSI passthru's 2843edd16368SStephen M. Cameron * to non-existent targets as invalid commands. 2844edd16368SStephen M. Cameron */ 2845d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "invalid command", cp); 2846d1e8beacSStephen M. Cameron dev_warn(d, "probably means device no longer present\n"); 2847edd16368SStephen M. Cameron } 2848edd16368SStephen M. Cameron break; 2849edd16368SStephen M. Cameron case CMD_PROTOCOL_ERR: 2850d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "protocol error", cp); 2851edd16368SStephen M. Cameron break; 2852edd16368SStephen M. Cameron case CMD_HARDWARE_ERR: 2853d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "hardware error", cp); 2854edd16368SStephen M. Cameron break; 2855edd16368SStephen M. Cameron case CMD_CONNECTION_LOST: 2856d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "connection lost", cp); 2857edd16368SStephen M. Cameron break; 2858edd16368SStephen M. Cameron case CMD_ABORTED: 2859d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "aborted", cp); 2860edd16368SStephen M. Cameron break; 2861edd16368SStephen M. Cameron case CMD_ABORT_FAILED: 2862d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "abort failed", cp); 2863edd16368SStephen M. Cameron break; 2864edd16368SStephen M. Cameron case CMD_UNSOLICITED_ABORT: 2865d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "unsolicited abort", cp); 2866edd16368SStephen M. Cameron break; 2867edd16368SStephen M. Cameron case CMD_TIMEOUT: 2868d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "timed out", cp); 2869edd16368SStephen M. Cameron break; 28701d5e2ed0SStephen M. Cameron case CMD_UNABORTABLE: 2871d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "unabortable", cp); 28721d5e2ed0SStephen M. Cameron break; 287325163bd5SWebb Scales case CMD_CTLR_LOCKUP: 287425163bd5SWebb Scales hpsa_print_cmd(h, "controller lockup detected", cp); 287525163bd5SWebb Scales break; 2876edd16368SStephen M. Cameron default: 2877d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "unknown status", cp); 2878d1e8beacSStephen M. Cameron dev_warn(d, "Unknown command status %x\n", 2879edd16368SStephen M. Cameron ei->CommandStatus); 2880edd16368SStephen M. Cameron } 2881edd16368SStephen M. Cameron } 2882edd16368SStephen M. Cameron 2883edd16368SStephen M. Cameron static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr, 2884b7bb24ebSStephen M. Cameron u16 page, unsigned char *buf, 2885edd16368SStephen M. Cameron unsigned char bufsize) 2886edd16368SStephen M. Cameron { 2887edd16368SStephen M. Cameron int rc = IO_OK; 2888edd16368SStephen M. Cameron struct CommandList *c; 2889edd16368SStephen M. Cameron struct ErrorInfo *ei; 2890edd16368SStephen M. Cameron 289145fcb86eSStephen Cameron c = cmd_alloc(h); 2892edd16368SStephen M. Cameron 2893a2dac136SStephen M. Cameron if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, 2894a2dac136SStephen M. Cameron page, scsi3addr, TYPE_CMD)) { 2895a2dac136SStephen M. Cameron rc = -1; 2896a2dac136SStephen M. Cameron goto out; 2897a2dac136SStephen M. Cameron } 289825163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 2899c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 290025163bd5SWebb Scales if (rc) 290125163bd5SWebb Scales goto out; 2902edd16368SStephen M. Cameron ei = c->err_info; 2903edd16368SStephen M. Cameron if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 2904d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 2905edd16368SStephen M. Cameron rc = -1; 2906edd16368SStephen M. Cameron } 2907a2dac136SStephen M. Cameron out: 290845fcb86eSStephen Cameron cmd_free(h, c); 2909edd16368SStephen M. Cameron return rc; 2910edd16368SStephen M. Cameron } 2911edd16368SStephen M. Cameron 2912bf711ac6SScott Teel static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr, 291325163bd5SWebb Scales u8 reset_type, int reply_queue) 2914edd16368SStephen M. Cameron { 2915edd16368SStephen M. Cameron int rc = IO_OK; 2916edd16368SStephen M. Cameron struct CommandList *c; 2917edd16368SStephen M. Cameron struct ErrorInfo *ei; 2918edd16368SStephen M. Cameron 291945fcb86eSStephen Cameron c = cmd_alloc(h); 2920edd16368SStephen M. Cameron 2921edd16368SStephen M. Cameron 2922a2dac136SStephen M. Cameron /* fill_cmd can't fail here, no data buffer to map. */ 29230b9b7b6eSScott Teel (void) fill_cmd(c, reset_type, h, NULL, 0, 0, 2924bf711ac6SScott Teel scsi3addr, TYPE_MSG); 29252ef28849SDon Brace rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT); 292625163bd5SWebb Scales if (rc) { 292725163bd5SWebb Scales dev_warn(&h->pdev->dev, "Failed to send reset command\n"); 292825163bd5SWebb Scales goto out; 292925163bd5SWebb Scales } 2930edd16368SStephen M. Cameron /* no unmap needed here because no data xfer. */ 2931edd16368SStephen M. Cameron 2932edd16368SStephen M. Cameron ei = c->err_info; 2933edd16368SStephen M. Cameron if (ei->CommandStatus != 0) { 2934d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 2935edd16368SStephen M. Cameron rc = -1; 2936edd16368SStephen M. Cameron } 293725163bd5SWebb Scales out: 293845fcb86eSStephen Cameron cmd_free(h, c); 2939edd16368SStephen M. Cameron return rc; 2940edd16368SStephen M. Cameron } 2941edd16368SStephen M. Cameron 2942d604f533SWebb Scales static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c, 2943d604f533SWebb Scales struct hpsa_scsi_dev_t *dev, 2944d604f533SWebb Scales unsigned char *scsi3addr) 2945d604f533SWebb Scales { 2946d604f533SWebb Scales int i; 2947d604f533SWebb Scales bool match = false; 2948d604f533SWebb Scales struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 2949d604f533SWebb Scales struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2; 2950d604f533SWebb Scales 2951d604f533SWebb Scales if (hpsa_is_cmd_idle(c)) 2952d604f533SWebb Scales return false; 2953d604f533SWebb Scales 2954d604f533SWebb Scales switch (c->cmd_type) { 2955d604f533SWebb Scales case CMD_SCSI: 2956d604f533SWebb Scales case CMD_IOCTL_PEND: 2957d604f533SWebb Scales match = !memcmp(scsi3addr, &c->Header.LUN.LunAddrBytes, 2958d604f533SWebb Scales sizeof(c->Header.LUN.LunAddrBytes)); 2959d604f533SWebb Scales break; 2960d604f533SWebb Scales 2961d604f533SWebb Scales case CMD_IOACCEL1: 2962d604f533SWebb Scales case CMD_IOACCEL2: 2963d604f533SWebb Scales if (c->phys_disk == dev) { 2964d604f533SWebb Scales /* HBA mode match */ 2965d604f533SWebb Scales match = true; 2966d604f533SWebb Scales } else { 2967d604f533SWebb Scales /* Possible RAID mode -- check each phys dev. */ 2968d604f533SWebb Scales /* FIXME: Do we need to take out a lock here? If 2969d604f533SWebb Scales * so, we could just call hpsa_get_pdisk_of_ioaccel2() 2970d604f533SWebb Scales * instead. */ 2971d604f533SWebb Scales for (i = 0; i < dev->nphysical_disks && !match; i++) { 2972d604f533SWebb Scales /* FIXME: an alternate test might be 2973d604f533SWebb Scales * 2974d604f533SWebb Scales * match = dev->phys_disk[i]->ioaccel_handle 2975d604f533SWebb Scales * == c2->scsi_nexus; */ 2976d604f533SWebb Scales match = dev->phys_disk[i] == c->phys_disk; 2977d604f533SWebb Scales } 2978d604f533SWebb Scales } 2979d604f533SWebb Scales break; 2980d604f533SWebb Scales 2981d604f533SWebb Scales case IOACCEL2_TMF: 2982d604f533SWebb Scales for (i = 0; i < dev->nphysical_disks && !match; i++) { 2983d604f533SWebb Scales match = dev->phys_disk[i]->ioaccel_handle == 2984d604f533SWebb Scales le32_to_cpu(ac->it_nexus); 2985d604f533SWebb Scales } 2986d604f533SWebb Scales break; 2987d604f533SWebb Scales 2988d604f533SWebb Scales case 0: /* The command is in the middle of being initialized. */ 2989d604f533SWebb Scales match = false; 2990d604f533SWebb Scales break; 2991d604f533SWebb Scales 2992d604f533SWebb Scales default: 2993d604f533SWebb Scales dev_err(&h->pdev->dev, "unexpected cmd_type: %d\n", 2994d604f533SWebb Scales c->cmd_type); 2995d604f533SWebb Scales BUG(); 2996d604f533SWebb Scales } 2997d604f533SWebb Scales 2998d604f533SWebb Scales return match; 2999d604f533SWebb Scales } 3000d604f533SWebb Scales 3001d604f533SWebb Scales static int hpsa_do_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev, 3002d604f533SWebb Scales unsigned char *scsi3addr, u8 reset_type, int reply_queue) 3003d604f533SWebb Scales { 3004d604f533SWebb Scales int i; 3005d604f533SWebb Scales int rc = 0; 3006d604f533SWebb Scales 3007d604f533SWebb Scales /* We can really only handle one reset at a time */ 3008d604f533SWebb Scales if (mutex_lock_interruptible(&h->reset_mutex) == -EINTR) { 3009d604f533SWebb Scales dev_warn(&h->pdev->dev, "concurrent reset wait interrupted.\n"); 3010d604f533SWebb Scales return -EINTR; 3011d604f533SWebb Scales } 3012d604f533SWebb Scales 3013d604f533SWebb Scales BUG_ON(atomic_read(&dev->reset_cmds_out) != 0); 3014d604f533SWebb Scales 3015d604f533SWebb Scales for (i = 0; i < h->nr_cmds; i++) { 3016d604f533SWebb Scales struct CommandList *c = h->cmd_pool + i; 3017d604f533SWebb Scales int refcount = atomic_inc_return(&c->refcount); 3018d604f533SWebb Scales 3019d604f533SWebb Scales if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, scsi3addr)) { 3020d604f533SWebb Scales unsigned long flags; 3021d604f533SWebb Scales 3022d604f533SWebb Scales /* 3023d604f533SWebb Scales * Mark the target command as having a reset pending, 3024d604f533SWebb Scales * then lock a lock so that the command cannot complete 3025d604f533SWebb Scales * while we're considering it. If the command is not 3026d604f533SWebb Scales * idle then count it; otherwise revoke the event. 3027d604f533SWebb Scales */ 3028d604f533SWebb Scales c->reset_pending = dev; 3029d604f533SWebb Scales spin_lock_irqsave(&h->lock, flags); /* Implied MB */ 3030d604f533SWebb Scales if (!hpsa_is_cmd_idle(c)) 3031d604f533SWebb Scales atomic_inc(&dev->reset_cmds_out); 3032d604f533SWebb Scales else 3033d604f533SWebb Scales c->reset_pending = NULL; 3034d604f533SWebb Scales spin_unlock_irqrestore(&h->lock, flags); 3035d604f533SWebb Scales } 3036d604f533SWebb Scales 3037d604f533SWebb Scales cmd_free(h, c); 3038d604f533SWebb Scales } 3039d604f533SWebb Scales 3040d604f533SWebb Scales rc = hpsa_send_reset(h, scsi3addr, reset_type, reply_queue); 3041d604f533SWebb Scales if (!rc) 3042d604f533SWebb Scales wait_event(h->event_sync_wait_queue, 3043d604f533SWebb Scales atomic_read(&dev->reset_cmds_out) == 0 || 3044d604f533SWebb Scales lockup_detected(h)); 3045d604f533SWebb Scales 3046d604f533SWebb Scales if (unlikely(lockup_detected(h))) { 3047d604f533SWebb Scales dev_warn(&h->pdev->dev, 3048d604f533SWebb Scales "Controller lockup detected during reset wait\n"); 3049d604f533SWebb Scales rc = -ENODEV; 3050d604f533SWebb Scales } 3051d604f533SWebb Scales 3052d604f533SWebb Scales if (unlikely(rc)) 3053d604f533SWebb Scales atomic_set(&dev->reset_cmds_out, 0); 3054bfd7546cSDon Brace else 30558516a2dbSDon Brace rc = wait_for_device_to_become_ready(h, scsi3addr, 0); 3056d604f533SWebb Scales 3057d604f533SWebb Scales mutex_unlock(&h->reset_mutex); 3058d604f533SWebb Scales return rc; 3059d604f533SWebb Scales } 3060d604f533SWebb Scales 3061edd16368SStephen M. Cameron static void hpsa_get_raid_level(struct ctlr_info *h, 3062edd16368SStephen M. Cameron unsigned char *scsi3addr, unsigned char *raid_level) 3063edd16368SStephen M. Cameron { 3064edd16368SStephen M. Cameron int rc; 3065edd16368SStephen M. Cameron unsigned char *buf; 3066edd16368SStephen M. Cameron 3067edd16368SStephen M. Cameron *raid_level = RAID_UNKNOWN; 3068edd16368SStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 3069edd16368SStephen M. Cameron if (!buf) 3070edd16368SStephen M. Cameron return; 30718383278dSScott Teel 30728383278dSScott Teel if (!hpsa_vpd_page_supported(h, scsi3addr, 30738383278dSScott Teel HPSA_VPD_LV_DEVICE_GEOMETRY)) 30748383278dSScott Teel goto exit; 30758383278dSScott Teel 30768383278dSScott Teel rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 30778383278dSScott Teel HPSA_VPD_LV_DEVICE_GEOMETRY, buf, 64); 30788383278dSScott Teel 3079edd16368SStephen M. Cameron if (rc == 0) 3080edd16368SStephen M. Cameron *raid_level = buf[8]; 3081edd16368SStephen M. Cameron if (*raid_level > RAID_UNKNOWN) 3082edd16368SStephen M. Cameron *raid_level = RAID_UNKNOWN; 30838383278dSScott Teel exit: 3084edd16368SStephen M. Cameron kfree(buf); 3085edd16368SStephen M. Cameron return; 3086edd16368SStephen M. Cameron } 3087edd16368SStephen M. Cameron 3088283b4a9bSStephen M. Cameron #define HPSA_MAP_DEBUG 3089283b4a9bSStephen M. Cameron #ifdef HPSA_MAP_DEBUG 3090283b4a9bSStephen M. Cameron static void hpsa_debug_map_buff(struct ctlr_info *h, int rc, 3091283b4a9bSStephen M. Cameron struct raid_map_data *map_buff) 3092283b4a9bSStephen M. Cameron { 3093283b4a9bSStephen M. Cameron struct raid_map_disk_data *dd = &map_buff->data[0]; 3094283b4a9bSStephen M. Cameron int map, row, col; 3095283b4a9bSStephen M. Cameron u16 map_cnt, row_cnt, disks_per_row; 3096283b4a9bSStephen M. Cameron 3097283b4a9bSStephen M. Cameron if (rc != 0) 3098283b4a9bSStephen M. Cameron return; 3099283b4a9bSStephen M. Cameron 31002ba8bfc8SStephen M. Cameron /* Show details only if debugging has been activated. */ 31012ba8bfc8SStephen M. Cameron if (h->raid_offload_debug < 2) 31022ba8bfc8SStephen M. Cameron return; 31032ba8bfc8SStephen M. Cameron 3104283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "structure_size = %u\n", 3105283b4a9bSStephen M. Cameron le32_to_cpu(map_buff->structure_size)); 3106283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "volume_blk_size = %u\n", 3107283b4a9bSStephen M. Cameron le32_to_cpu(map_buff->volume_blk_size)); 3108283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n", 3109283b4a9bSStephen M. Cameron le64_to_cpu(map_buff->volume_blk_cnt)); 3110283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "physicalBlockShift = %u\n", 3111283b4a9bSStephen M. Cameron map_buff->phys_blk_shift); 3112283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n", 3113283b4a9bSStephen M. Cameron map_buff->parity_rotation_shift); 3114283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "strip_size = %u\n", 3115283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->strip_size)); 3116283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n", 3117283b4a9bSStephen M. Cameron le64_to_cpu(map_buff->disk_starting_blk)); 3118283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n", 3119283b4a9bSStephen M. Cameron le64_to_cpu(map_buff->disk_blk_cnt)); 3120283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "data_disks_per_row = %u\n", 3121283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->data_disks_per_row)); 3122283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n", 3123283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->metadata_disks_per_row)); 3124283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "row_cnt = %u\n", 3125283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->row_cnt)); 3126283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "layout_map_count = %u\n", 3127283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->layout_map_count)); 31282b08b3e9SDon Brace dev_info(&h->pdev->dev, "flags = 0x%x\n", 3129dd0e19f3SScott Teel le16_to_cpu(map_buff->flags)); 3130ba82d91bSColin Ian King dev_info(&h->pdev->dev, "encryption = %s\n", 31312b08b3e9SDon Brace le16_to_cpu(map_buff->flags) & 31322b08b3e9SDon Brace RAID_MAP_FLAG_ENCRYPT_ON ? "ON" : "OFF"); 3133dd0e19f3SScott Teel dev_info(&h->pdev->dev, "dekindex = %u\n", 3134dd0e19f3SScott Teel le16_to_cpu(map_buff->dekindex)); 3135283b4a9bSStephen M. Cameron map_cnt = le16_to_cpu(map_buff->layout_map_count); 3136283b4a9bSStephen M. Cameron for (map = 0; map < map_cnt; map++) { 3137283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "Map%u:\n", map); 3138283b4a9bSStephen M. Cameron row_cnt = le16_to_cpu(map_buff->row_cnt); 3139283b4a9bSStephen M. Cameron for (row = 0; row < row_cnt; row++) { 3140283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, " Row%u:\n", row); 3141283b4a9bSStephen M. Cameron disks_per_row = 3142283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->data_disks_per_row); 3143283b4a9bSStephen M. Cameron for (col = 0; col < disks_per_row; col++, dd++) 3144283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, 3145283b4a9bSStephen M. Cameron " D%02u: h=0x%04x xor=%u,%u\n", 3146283b4a9bSStephen M. Cameron col, dd->ioaccel_handle, 3147283b4a9bSStephen M. Cameron dd->xor_mult[0], dd->xor_mult[1]); 3148283b4a9bSStephen M. Cameron disks_per_row = 3149283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->metadata_disks_per_row); 3150283b4a9bSStephen M. Cameron for (col = 0; col < disks_per_row; col++, dd++) 3151283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, 3152283b4a9bSStephen M. Cameron " M%02u: h=0x%04x xor=%u,%u\n", 3153283b4a9bSStephen M. Cameron col, dd->ioaccel_handle, 3154283b4a9bSStephen M. Cameron dd->xor_mult[0], dd->xor_mult[1]); 3155283b4a9bSStephen M. Cameron } 3156283b4a9bSStephen M. Cameron } 3157283b4a9bSStephen M. Cameron } 3158283b4a9bSStephen M. Cameron #else 3159283b4a9bSStephen M. Cameron static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h, 3160283b4a9bSStephen M. Cameron __attribute__((unused)) int rc, 3161283b4a9bSStephen M. Cameron __attribute__((unused)) struct raid_map_data *map_buff) 3162283b4a9bSStephen M. Cameron { 3163283b4a9bSStephen M. Cameron } 3164283b4a9bSStephen M. Cameron #endif 3165283b4a9bSStephen M. Cameron 3166283b4a9bSStephen M. Cameron static int hpsa_get_raid_map(struct ctlr_info *h, 3167283b4a9bSStephen M. Cameron unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device) 3168283b4a9bSStephen M. Cameron { 3169283b4a9bSStephen M. Cameron int rc = 0; 3170283b4a9bSStephen M. Cameron struct CommandList *c; 3171283b4a9bSStephen M. Cameron struct ErrorInfo *ei; 3172283b4a9bSStephen M. Cameron 317345fcb86eSStephen Cameron c = cmd_alloc(h); 3174bf43caf3SRobert Elliott 3175283b4a9bSStephen M. Cameron if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map, 3176283b4a9bSStephen M. Cameron sizeof(this_device->raid_map), 0, 3177283b4a9bSStephen M. Cameron scsi3addr, TYPE_CMD)) { 31782dd02d74SRobert Elliott dev_warn(&h->pdev->dev, "hpsa_get_raid_map fill_cmd failed\n"); 31792dd02d74SRobert Elliott cmd_free(h, c); 31802dd02d74SRobert Elliott return -1; 3181283b4a9bSStephen M. Cameron } 318225163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3183c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 318425163bd5SWebb Scales if (rc) 318525163bd5SWebb Scales goto out; 3186283b4a9bSStephen M. Cameron ei = c->err_info; 3187283b4a9bSStephen M. Cameron if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3188d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 318925163bd5SWebb Scales rc = -1; 319025163bd5SWebb Scales goto out; 3191283b4a9bSStephen M. Cameron } 319245fcb86eSStephen Cameron cmd_free(h, c); 3193283b4a9bSStephen M. Cameron 3194283b4a9bSStephen M. Cameron /* @todo in the future, dynamically allocate RAID map memory */ 3195283b4a9bSStephen M. Cameron if (le32_to_cpu(this_device->raid_map.structure_size) > 3196283b4a9bSStephen M. Cameron sizeof(this_device->raid_map)) { 3197283b4a9bSStephen M. Cameron dev_warn(&h->pdev->dev, "RAID map size is too large!\n"); 3198283b4a9bSStephen M. Cameron rc = -1; 3199283b4a9bSStephen M. Cameron } 3200283b4a9bSStephen M. Cameron hpsa_debug_map_buff(h, rc, &this_device->raid_map); 3201283b4a9bSStephen M. Cameron return rc; 320225163bd5SWebb Scales out: 320325163bd5SWebb Scales cmd_free(h, c); 320425163bd5SWebb Scales return rc; 3205283b4a9bSStephen M. Cameron } 3206283b4a9bSStephen M. Cameron 3207d04e62b9SKevin Barnett static int hpsa_bmic_sense_subsystem_information(struct ctlr_info *h, 3208d04e62b9SKevin Barnett unsigned char scsi3addr[], u16 bmic_device_index, 3209d04e62b9SKevin Barnett struct bmic_sense_subsystem_info *buf, size_t bufsize) 3210d04e62b9SKevin Barnett { 3211d04e62b9SKevin Barnett int rc = IO_OK; 3212d04e62b9SKevin Barnett struct CommandList *c; 3213d04e62b9SKevin Barnett struct ErrorInfo *ei; 3214d04e62b9SKevin Barnett 3215d04e62b9SKevin Barnett c = cmd_alloc(h); 3216d04e62b9SKevin Barnett 3217d04e62b9SKevin Barnett rc = fill_cmd(c, BMIC_SENSE_SUBSYSTEM_INFORMATION, h, buf, bufsize, 3218d04e62b9SKevin Barnett 0, RAID_CTLR_LUNID, TYPE_CMD); 3219d04e62b9SKevin Barnett if (rc) 3220d04e62b9SKevin Barnett goto out; 3221d04e62b9SKevin Barnett 3222d04e62b9SKevin Barnett c->Request.CDB[2] = bmic_device_index & 0xff; 3223d04e62b9SKevin Barnett c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff; 3224d04e62b9SKevin Barnett 3225d04e62b9SKevin Barnett rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3226c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 3227d04e62b9SKevin Barnett if (rc) 3228d04e62b9SKevin Barnett goto out; 3229d04e62b9SKevin Barnett ei = c->err_info; 3230d04e62b9SKevin Barnett if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3231d04e62b9SKevin Barnett hpsa_scsi_interpret_error(h, c); 3232d04e62b9SKevin Barnett rc = -1; 3233d04e62b9SKevin Barnett } 3234d04e62b9SKevin Barnett out: 3235d04e62b9SKevin Barnett cmd_free(h, c); 3236d04e62b9SKevin Barnett return rc; 3237d04e62b9SKevin Barnett } 3238d04e62b9SKevin Barnett 323966749d0dSScott Teel static int hpsa_bmic_id_controller(struct ctlr_info *h, 324066749d0dSScott Teel struct bmic_identify_controller *buf, size_t bufsize) 324166749d0dSScott Teel { 324266749d0dSScott Teel int rc = IO_OK; 324366749d0dSScott Teel struct CommandList *c; 324466749d0dSScott Teel struct ErrorInfo *ei; 324566749d0dSScott Teel 324666749d0dSScott Teel c = cmd_alloc(h); 324766749d0dSScott Teel 324866749d0dSScott Teel rc = fill_cmd(c, BMIC_IDENTIFY_CONTROLLER, h, buf, bufsize, 324966749d0dSScott Teel 0, RAID_CTLR_LUNID, TYPE_CMD); 325066749d0dSScott Teel if (rc) 325166749d0dSScott Teel goto out; 325266749d0dSScott Teel 325366749d0dSScott Teel rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3254c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 325566749d0dSScott Teel if (rc) 325666749d0dSScott Teel goto out; 325766749d0dSScott Teel ei = c->err_info; 325866749d0dSScott Teel if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 325966749d0dSScott Teel hpsa_scsi_interpret_error(h, c); 326066749d0dSScott Teel rc = -1; 326166749d0dSScott Teel } 326266749d0dSScott Teel out: 326366749d0dSScott Teel cmd_free(h, c); 326466749d0dSScott Teel return rc; 326566749d0dSScott Teel } 326666749d0dSScott Teel 326703383736SDon Brace static int hpsa_bmic_id_physical_device(struct ctlr_info *h, 326803383736SDon Brace unsigned char scsi3addr[], u16 bmic_device_index, 326903383736SDon Brace struct bmic_identify_physical_device *buf, size_t bufsize) 327003383736SDon Brace { 327103383736SDon Brace int rc = IO_OK; 327203383736SDon Brace struct CommandList *c; 327303383736SDon Brace struct ErrorInfo *ei; 327403383736SDon Brace 327503383736SDon Brace c = cmd_alloc(h); 327603383736SDon Brace rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize, 327703383736SDon Brace 0, RAID_CTLR_LUNID, TYPE_CMD); 327803383736SDon Brace if (rc) 327903383736SDon Brace goto out; 328003383736SDon Brace 328103383736SDon Brace c->Request.CDB[2] = bmic_device_index & 0xff; 328203383736SDon Brace c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff; 328303383736SDon Brace 328425163bd5SWebb Scales hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE, 3285c448ecfaSDon Brace DEFAULT_TIMEOUT); 328603383736SDon Brace ei = c->err_info; 328703383736SDon Brace if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 328803383736SDon Brace hpsa_scsi_interpret_error(h, c); 328903383736SDon Brace rc = -1; 329003383736SDon Brace } 329103383736SDon Brace out: 329203383736SDon Brace cmd_free(h, c); 3293d04e62b9SKevin Barnett 329403383736SDon Brace return rc; 329503383736SDon Brace } 329603383736SDon Brace 3297cca8f13bSDon Brace /* 3298cca8f13bSDon Brace * get enclosure information 3299cca8f13bSDon Brace * struct ReportExtendedLUNdata *rlep - Used for BMIC drive number 3300cca8f13bSDon Brace * struct hpsa_scsi_dev_t *encl_dev - device entry for enclosure 3301cca8f13bSDon Brace * Uses id_physical_device to determine the box_index. 3302cca8f13bSDon Brace */ 3303cca8f13bSDon Brace static void hpsa_get_enclosure_info(struct ctlr_info *h, 3304cca8f13bSDon Brace unsigned char *scsi3addr, 3305cca8f13bSDon Brace struct ReportExtendedLUNdata *rlep, int rle_index, 3306cca8f13bSDon Brace struct hpsa_scsi_dev_t *encl_dev) 3307cca8f13bSDon Brace { 3308cca8f13bSDon Brace int rc = -1; 3309cca8f13bSDon Brace struct CommandList *c = NULL; 3310cca8f13bSDon Brace struct ErrorInfo *ei = NULL; 3311cca8f13bSDon Brace struct bmic_sense_storage_box_params *bssbp = NULL; 3312cca8f13bSDon Brace struct bmic_identify_physical_device *id_phys = NULL; 3313cca8f13bSDon Brace struct ext_report_lun_entry *rle = &rlep->LUN[rle_index]; 3314cca8f13bSDon Brace u16 bmic_device_index = 0; 3315cca8f13bSDon Brace 3316cca8f13bSDon Brace bmic_device_index = GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]); 3317cca8f13bSDon Brace 33185ac517b8SDon Brace if (encl_dev->target == -1 || encl_dev->lun == -1) { 33195ac517b8SDon Brace rc = IO_OK; 33205ac517b8SDon Brace goto out; 33215ac517b8SDon Brace } 33225ac517b8SDon Brace 332317a9e54aSDon Brace if (bmic_device_index == 0xFF00 || MASKED_DEVICE(&rle->lunid[0])) { 332417a9e54aSDon Brace rc = IO_OK; 3325cca8f13bSDon Brace goto out; 332617a9e54aSDon Brace } 3327cca8f13bSDon Brace 3328cca8f13bSDon Brace bssbp = kzalloc(sizeof(*bssbp), GFP_KERNEL); 3329cca8f13bSDon Brace if (!bssbp) 3330cca8f13bSDon Brace goto out; 3331cca8f13bSDon Brace 3332cca8f13bSDon Brace id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 3333cca8f13bSDon Brace if (!id_phys) 3334cca8f13bSDon Brace goto out; 3335cca8f13bSDon Brace 3336cca8f13bSDon Brace rc = hpsa_bmic_id_physical_device(h, scsi3addr, bmic_device_index, 3337cca8f13bSDon Brace id_phys, sizeof(*id_phys)); 3338cca8f13bSDon Brace if (rc) { 3339cca8f13bSDon Brace dev_warn(&h->pdev->dev, "%s: id_phys failed %d bdi[0x%x]\n", 3340cca8f13bSDon Brace __func__, encl_dev->external, bmic_device_index); 3341cca8f13bSDon Brace goto out; 3342cca8f13bSDon Brace } 3343cca8f13bSDon Brace 3344cca8f13bSDon Brace c = cmd_alloc(h); 3345cca8f13bSDon Brace 3346cca8f13bSDon Brace rc = fill_cmd(c, BMIC_SENSE_STORAGE_BOX_PARAMS, h, bssbp, 3347cca8f13bSDon Brace sizeof(*bssbp), 0, RAID_CTLR_LUNID, TYPE_CMD); 3348cca8f13bSDon Brace 3349cca8f13bSDon Brace if (rc) 3350cca8f13bSDon Brace goto out; 3351cca8f13bSDon Brace 3352cca8f13bSDon Brace if (id_phys->phys_connector[1] == 'E') 3353cca8f13bSDon Brace c->Request.CDB[5] = id_phys->box_index; 3354cca8f13bSDon Brace else 3355cca8f13bSDon Brace c->Request.CDB[5] = 0; 3356cca8f13bSDon Brace 3357cca8f13bSDon Brace rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE, 3358c448ecfaSDon Brace DEFAULT_TIMEOUT); 3359cca8f13bSDon Brace if (rc) 3360cca8f13bSDon Brace goto out; 3361cca8f13bSDon Brace 3362cca8f13bSDon Brace ei = c->err_info; 3363cca8f13bSDon Brace if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3364cca8f13bSDon Brace rc = -1; 3365cca8f13bSDon Brace goto out; 3366cca8f13bSDon Brace } 3367cca8f13bSDon Brace 3368cca8f13bSDon Brace encl_dev->box[id_phys->active_path_number] = bssbp->phys_box_on_port; 3369cca8f13bSDon Brace memcpy(&encl_dev->phys_connector[id_phys->active_path_number], 3370cca8f13bSDon Brace bssbp->phys_connector, sizeof(bssbp->phys_connector)); 3371cca8f13bSDon Brace 3372cca8f13bSDon Brace rc = IO_OK; 3373cca8f13bSDon Brace out: 3374cca8f13bSDon Brace kfree(bssbp); 3375cca8f13bSDon Brace kfree(id_phys); 3376cca8f13bSDon Brace 3377cca8f13bSDon Brace if (c) 3378cca8f13bSDon Brace cmd_free(h, c); 3379cca8f13bSDon Brace 3380cca8f13bSDon Brace if (rc != IO_OK) 3381cca8f13bSDon Brace hpsa_show_dev_msg(KERN_INFO, h, encl_dev, 3382cca8f13bSDon Brace "Error, could not get enclosure information\n"); 3383cca8f13bSDon Brace } 3384cca8f13bSDon Brace 3385d04e62b9SKevin Barnett static u64 hpsa_get_sas_address_from_report_physical(struct ctlr_info *h, 3386d04e62b9SKevin Barnett unsigned char *scsi3addr) 3387d04e62b9SKevin Barnett { 3388d04e62b9SKevin Barnett struct ReportExtendedLUNdata *physdev; 3389d04e62b9SKevin Barnett u32 nphysicals; 3390d04e62b9SKevin Barnett u64 sa = 0; 3391d04e62b9SKevin Barnett int i; 3392d04e62b9SKevin Barnett 3393d04e62b9SKevin Barnett physdev = kzalloc(sizeof(*physdev), GFP_KERNEL); 3394d04e62b9SKevin Barnett if (!physdev) 3395d04e62b9SKevin Barnett return 0; 3396d04e62b9SKevin Barnett 3397d04e62b9SKevin Barnett if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) { 3398d04e62b9SKevin Barnett dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 3399d04e62b9SKevin Barnett kfree(physdev); 3400d04e62b9SKevin Barnett return 0; 3401d04e62b9SKevin Barnett } 3402d04e62b9SKevin Barnett nphysicals = get_unaligned_be32(physdev->LUNListLength) / 24; 3403d04e62b9SKevin Barnett 3404d04e62b9SKevin Barnett for (i = 0; i < nphysicals; i++) 3405d04e62b9SKevin Barnett if (!memcmp(&physdev->LUN[i].lunid[0], scsi3addr, 8)) { 3406d04e62b9SKevin Barnett sa = get_unaligned_be64(&physdev->LUN[i].wwid[0]); 3407d04e62b9SKevin Barnett break; 3408d04e62b9SKevin Barnett } 3409d04e62b9SKevin Barnett 3410d04e62b9SKevin Barnett kfree(physdev); 3411d04e62b9SKevin Barnett 3412d04e62b9SKevin Barnett return sa; 3413d04e62b9SKevin Barnett } 3414d04e62b9SKevin Barnett 3415d04e62b9SKevin Barnett static void hpsa_get_sas_address(struct ctlr_info *h, unsigned char *scsi3addr, 3416d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *dev) 3417d04e62b9SKevin Barnett { 3418d04e62b9SKevin Barnett int rc; 3419d04e62b9SKevin Barnett u64 sa = 0; 3420d04e62b9SKevin Barnett 3421d04e62b9SKevin Barnett if (is_hba_lunid(scsi3addr)) { 3422d04e62b9SKevin Barnett struct bmic_sense_subsystem_info *ssi; 3423d04e62b9SKevin Barnett 3424d04e62b9SKevin Barnett ssi = kzalloc(sizeof(*ssi), GFP_KERNEL); 34257e8a9486SAmit Kushwaha if (!ssi) 3426d04e62b9SKevin Barnett return; 3427d04e62b9SKevin Barnett 3428d04e62b9SKevin Barnett rc = hpsa_bmic_sense_subsystem_information(h, 3429d04e62b9SKevin Barnett scsi3addr, 0, ssi, sizeof(*ssi)); 3430d04e62b9SKevin Barnett if (rc == 0) { 3431d04e62b9SKevin Barnett sa = get_unaligned_be64(ssi->primary_world_wide_id); 3432d04e62b9SKevin Barnett h->sas_address = sa; 3433d04e62b9SKevin Barnett } 3434d04e62b9SKevin Barnett 3435d04e62b9SKevin Barnett kfree(ssi); 3436d04e62b9SKevin Barnett } else 3437d04e62b9SKevin Barnett sa = hpsa_get_sas_address_from_report_physical(h, scsi3addr); 3438d04e62b9SKevin Barnett 3439d04e62b9SKevin Barnett dev->sas_address = sa; 3440d04e62b9SKevin Barnett } 3441d04e62b9SKevin Barnett 3442d04e62b9SKevin Barnett /* Get a device id from inquiry page 0x83 */ 34438383278dSScott Teel static bool hpsa_vpd_page_supported(struct ctlr_info *h, 34441b70150aSStephen M. Cameron unsigned char scsi3addr[], u8 page) 34451b70150aSStephen M. Cameron { 34461b70150aSStephen M. Cameron int rc; 34471b70150aSStephen M. Cameron int i; 34481b70150aSStephen M. Cameron int pages; 34491b70150aSStephen M. Cameron unsigned char *buf, bufsize; 34501b70150aSStephen M. Cameron 34511b70150aSStephen M. Cameron buf = kzalloc(256, GFP_KERNEL); 34521b70150aSStephen M. Cameron if (!buf) 34538383278dSScott Teel return false; 34541b70150aSStephen M. Cameron 34551b70150aSStephen M. Cameron /* Get the size of the page list first */ 34561b70150aSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, 34571b70150aSStephen M. Cameron VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES, 34581b70150aSStephen M. Cameron buf, HPSA_VPD_HEADER_SZ); 34591b70150aSStephen M. Cameron if (rc != 0) 34601b70150aSStephen M. Cameron goto exit_unsupported; 34611b70150aSStephen M. Cameron pages = buf[3]; 34621b70150aSStephen M. Cameron if ((pages + HPSA_VPD_HEADER_SZ) <= 255) 34631b70150aSStephen M. Cameron bufsize = pages + HPSA_VPD_HEADER_SZ; 34641b70150aSStephen M. Cameron else 34651b70150aSStephen M. Cameron bufsize = 255; 34661b70150aSStephen M. Cameron 34671b70150aSStephen M. Cameron /* Get the whole VPD page list */ 34681b70150aSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, 34691b70150aSStephen M. Cameron VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES, 34701b70150aSStephen M. Cameron buf, bufsize); 34711b70150aSStephen M. Cameron if (rc != 0) 34721b70150aSStephen M. Cameron goto exit_unsupported; 34731b70150aSStephen M. Cameron 34741b70150aSStephen M. Cameron pages = buf[3]; 34751b70150aSStephen M. Cameron for (i = 1; i <= pages; i++) 34761b70150aSStephen M. Cameron if (buf[3 + i] == page) 34771b70150aSStephen M. Cameron goto exit_supported; 34781b70150aSStephen M. Cameron exit_unsupported: 34791b70150aSStephen M. Cameron kfree(buf); 34808383278dSScott Teel return false; 34811b70150aSStephen M. Cameron exit_supported: 34821b70150aSStephen M. Cameron kfree(buf); 34838383278dSScott Teel return true; 34841b70150aSStephen M. Cameron } 34851b70150aSStephen M. Cameron 3486283b4a9bSStephen M. Cameron static void hpsa_get_ioaccel_status(struct ctlr_info *h, 3487283b4a9bSStephen M. Cameron unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device) 3488283b4a9bSStephen M. Cameron { 3489283b4a9bSStephen M. Cameron int rc; 3490283b4a9bSStephen M. Cameron unsigned char *buf; 3491283b4a9bSStephen M. Cameron u8 ioaccel_status; 3492283b4a9bSStephen M. Cameron 3493283b4a9bSStephen M. Cameron this_device->offload_config = 0; 3494283b4a9bSStephen M. Cameron this_device->offload_enabled = 0; 349541ce4c35SStephen Cameron this_device->offload_to_be_enabled = 0; 3496283b4a9bSStephen M. Cameron 3497283b4a9bSStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 3498283b4a9bSStephen M. Cameron if (!buf) 3499283b4a9bSStephen M. Cameron return; 35001b70150aSStephen M. Cameron if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS)) 35011b70150aSStephen M. Cameron goto out; 3502283b4a9bSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, 3503b7bb24ebSStephen M. Cameron VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64); 3504283b4a9bSStephen M. Cameron if (rc != 0) 3505283b4a9bSStephen M. Cameron goto out; 3506283b4a9bSStephen M. Cameron 3507283b4a9bSStephen M. Cameron #define IOACCEL_STATUS_BYTE 4 3508283b4a9bSStephen M. Cameron #define OFFLOAD_CONFIGURED_BIT 0x01 3509283b4a9bSStephen M. Cameron #define OFFLOAD_ENABLED_BIT 0x02 3510283b4a9bSStephen M. Cameron ioaccel_status = buf[IOACCEL_STATUS_BYTE]; 3511283b4a9bSStephen M. Cameron this_device->offload_config = 3512283b4a9bSStephen M. Cameron !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT); 3513283b4a9bSStephen M. Cameron if (this_device->offload_config) { 3514283b4a9bSStephen M. Cameron this_device->offload_enabled = 3515283b4a9bSStephen M. Cameron !!(ioaccel_status & OFFLOAD_ENABLED_BIT); 3516283b4a9bSStephen M. Cameron if (hpsa_get_raid_map(h, scsi3addr, this_device)) 3517283b4a9bSStephen M. Cameron this_device->offload_enabled = 0; 3518283b4a9bSStephen M. Cameron } 351941ce4c35SStephen Cameron this_device->offload_to_be_enabled = this_device->offload_enabled; 3520283b4a9bSStephen M. Cameron out: 3521283b4a9bSStephen M. Cameron kfree(buf); 3522283b4a9bSStephen M. Cameron return; 3523283b4a9bSStephen M. Cameron } 3524283b4a9bSStephen M. Cameron 3525edd16368SStephen M. Cameron /* Get the device id from inquiry page 0x83 */ 3526edd16368SStephen M. Cameron static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr, 352775d23d89SDon Brace unsigned char *device_id, int index, int buflen) 3528edd16368SStephen M. Cameron { 3529edd16368SStephen M. Cameron int rc; 3530edd16368SStephen M. Cameron unsigned char *buf; 3531edd16368SStephen M. Cameron 35328383278dSScott Teel /* Does controller have VPD for device id? */ 35338383278dSScott Teel if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_DEVICE_ID)) 35348383278dSScott Teel return 1; /* not supported */ 35358383278dSScott Teel 3536edd16368SStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 3537edd16368SStephen M. Cameron if (!buf) 3538a84d794dSStephen M. Cameron return -ENOMEM; 35398383278dSScott Teel 35408383278dSScott Teel rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 35418383278dSScott Teel HPSA_VPD_LV_DEVICE_ID, buf, 64); 35428383278dSScott Teel if (rc == 0) { 35438383278dSScott Teel if (buflen > 16) 35448383278dSScott Teel buflen = 16; 35458383278dSScott Teel memcpy(device_id, &buf[8], buflen); 35468383278dSScott Teel } 354775d23d89SDon Brace 3548edd16368SStephen M. Cameron kfree(buf); 354975d23d89SDon Brace 35508383278dSScott Teel return rc; /*0 - got id, otherwise, didn't */ 3551edd16368SStephen M. Cameron } 3552edd16368SStephen M. Cameron 3553edd16368SStephen M. Cameron static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical, 355403383736SDon Brace void *buf, int bufsize, 3555edd16368SStephen M. Cameron int extended_response) 3556edd16368SStephen M. Cameron { 3557edd16368SStephen M. Cameron int rc = IO_OK; 3558edd16368SStephen M. Cameron struct CommandList *c; 3559edd16368SStephen M. Cameron unsigned char scsi3addr[8]; 3560edd16368SStephen M. Cameron struct ErrorInfo *ei; 3561edd16368SStephen M. Cameron 356245fcb86eSStephen Cameron c = cmd_alloc(h); 3563bf43caf3SRobert Elliott 3564e89c0ae7SStephen M. Cameron /* address the controller */ 3565e89c0ae7SStephen M. Cameron memset(scsi3addr, 0, sizeof(scsi3addr)); 3566a2dac136SStephen M. Cameron if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h, 3567a2dac136SStephen M. Cameron buf, bufsize, 0, scsi3addr, TYPE_CMD)) { 3568a2dac136SStephen M. Cameron rc = -1; 3569a2dac136SStephen M. Cameron goto out; 3570a2dac136SStephen M. Cameron } 3571edd16368SStephen M. Cameron if (extended_response) 3572edd16368SStephen M. Cameron c->Request.CDB[1] = extended_response; 357325163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3574c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 357525163bd5SWebb Scales if (rc) 357625163bd5SWebb Scales goto out; 3577edd16368SStephen M. Cameron ei = c->err_info; 3578edd16368SStephen M. Cameron if (ei->CommandStatus != 0 && 3579edd16368SStephen M. Cameron ei->CommandStatus != CMD_DATA_UNDERRUN) { 3580d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 3581edd16368SStephen M. Cameron rc = -1; 3582283b4a9bSStephen M. Cameron } else { 358303383736SDon Brace struct ReportLUNdata *rld = buf; 358403383736SDon Brace 358503383736SDon Brace if (rld->extended_response_flag != extended_response) { 3586283b4a9bSStephen M. Cameron dev_err(&h->pdev->dev, 3587283b4a9bSStephen M. Cameron "report luns requested format %u, got %u\n", 3588283b4a9bSStephen M. Cameron extended_response, 358903383736SDon Brace rld->extended_response_flag); 3590283b4a9bSStephen M. Cameron rc = -1; 3591283b4a9bSStephen M. Cameron } 3592edd16368SStephen M. Cameron } 3593a2dac136SStephen M. Cameron out: 359445fcb86eSStephen Cameron cmd_free(h, c); 3595edd16368SStephen M. Cameron return rc; 3596edd16368SStephen M. Cameron } 3597edd16368SStephen M. Cameron 3598edd16368SStephen M. Cameron static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 359903383736SDon Brace struct ReportExtendedLUNdata *buf, int bufsize) 3600edd16368SStephen M. Cameron { 36012a80d545SHannes Reinecke int rc; 36022a80d545SHannes Reinecke struct ReportLUNdata *lbuf; 36032a80d545SHannes Reinecke 36042a80d545SHannes Reinecke rc = hpsa_scsi_do_report_luns(h, 0, buf, bufsize, 360503383736SDon Brace HPSA_REPORT_PHYS_EXTENDED); 36062a80d545SHannes Reinecke if (!rc || !hpsa_allow_any) 36072a80d545SHannes Reinecke return rc; 36082a80d545SHannes Reinecke 36092a80d545SHannes Reinecke /* REPORT PHYS EXTENDED is not supported */ 36102a80d545SHannes Reinecke lbuf = kzalloc(sizeof(*lbuf), GFP_KERNEL); 36112a80d545SHannes Reinecke if (!lbuf) 36122a80d545SHannes Reinecke return -ENOMEM; 36132a80d545SHannes Reinecke 36142a80d545SHannes Reinecke rc = hpsa_scsi_do_report_luns(h, 0, lbuf, sizeof(*lbuf), 0); 36152a80d545SHannes Reinecke if (!rc) { 36162a80d545SHannes Reinecke int i; 36172a80d545SHannes Reinecke u32 nphys; 36182a80d545SHannes Reinecke 36192a80d545SHannes Reinecke /* Copy ReportLUNdata header */ 36202a80d545SHannes Reinecke memcpy(buf, lbuf, 8); 36212a80d545SHannes Reinecke nphys = be32_to_cpu(*((__be32 *)lbuf->LUNListLength)) / 8; 36222a80d545SHannes Reinecke for (i = 0; i < nphys; i++) 36232a80d545SHannes Reinecke memcpy(buf->LUN[i].lunid, lbuf->LUN[i], 8); 36242a80d545SHannes Reinecke } 36252a80d545SHannes Reinecke kfree(lbuf); 36262a80d545SHannes Reinecke return rc; 3627edd16368SStephen M. Cameron } 3628edd16368SStephen M. Cameron 3629edd16368SStephen M. Cameron static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h, 3630edd16368SStephen M. Cameron struct ReportLUNdata *buf, int bufsize) 3631edd16368SStephen M. Cameron { 3632edd16368SStephen M. Cameron return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0); 3633edd16368SStephen M. Cameron } 3634edd16368SStephen M. Cameron 3635edd16368SStephen M. Cameron static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device, 3636edd16368SStephen M. Cameron int bus, int target, int lun) 3637edd16368SStephen M. Cameron { 3638edd16368SStephen M. Cameron device->bus = bus; 3639edd16368SStephen M. Cameron device->target = target; 3640edd16368SStephen M. Cameron device->lun = lun; 3641edd16368SStephen M. Cameron } 3642edd16368SStephen M. Cameron 36439846590eSStephen M. Cameron /* Use VPD inquiry to get details of volume status */ 36449846590eSStephen M. Cameron static int hpsa_get_volume_status(struct ctlr_info *h, 36459846590eSStephen M. Cameron unsigned char scsi3addr[]) 36469846590eSStephen M. Cameron { 36479846590eSStephen M. Cameron int rc; 36489846590eSStephen M. Cameron int status; 36499846590eSStephen M. Cameron int size; 36509846590eSStephen M. Cameron unsigned char *buf; 36519846590eSStephen M. Cameron 36529846590eSStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 36539846590eSStephen M. Cameron if (!buf) 36549846590eSStephen M. Cameron return HPSA_VPD_LV_STATUS_UNSUPPORTED; 36559846590eSStephen M. Cameron 36569846590eSStephen M. Cameron /* Does controller have VPD for logical volume status? */ 365724a4b078SStephen M. Cameron if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS)) 36589846590eSStephen M. Cameron goto exit_failed; 36599846590eSStephen M. Cameron 36609846590eSStephen M. Cameron /* Get the size of the VPD return buffer */ 36619846590eSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS, 36629846590eSStephen M. Cameron buf, HPSA_VPD_HEADER_SZ); 366324a4b078SStephen M. Cameron if (rc != 0) 36649846590eSStephen M. Cameron goto exit_failed; 36659846590eSStephen M. Cameron size = buf[3]; 36669846590eSStephen M. Cameron 36679846590eSStephen M. Cameron /* Now get the whole VPD buffer */ 36689846590eSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS, 36699846590eSStephen M. Cameron buf, size + HPSA_VPD_HEADER_SZ); 367024a4b078SStephen M. Cameron if (rc != 0) 36719846590eSStephen M. Cameron goto exit_failed; 36729846590eSStephen M. Cameron status = buf[4]; /* status byte */ 36739846590eSStephen M. Cameron 36749846590eSStephen M. Cameron kfree(buf); 36759846590eSStephen M. Cameron return status; 36769846590eSStephen M. Cameron exit_failed: 36779846590eSStephen M. Cameron kfree(buf); 36789846590eSStephen M. Cameron return HPSA_VPD_LV_STATUS_UNSUPPORTED; 36799846590eSStephen M. Cameron } 36809846590eSStephen M. Cameron 36819846590eSStephen M. Cameron /* Determine offline status of a volume. 36829846590eSStephen M. Cameron * Return either: 36839846590eSStephen M. Cameron * 0 (not offline) 368467955ba3SStephen M. Cameron * 0xff (offline for unknown reasons) 36859846590eSStephen M. Cameron * # (integer code indicating one of several NOT READY states 36869846590eSStephen M. Cameron * describing why a volume is to be kept offline) 36879846590eSStephen M. Cameron */ 368885b29008SDon Brace static unsigned char hpsa_volume_offline(struct ctlr_info *h, 36899846590eSStephen M. Cameron unsigned char scsi3addr[]) 36909846590eSStephen M. Cameron { 36919846590eSStephen M. Cameron struct CommandList *c; 36929437ac43SStephen Cameron unsigned char *sense; 36939437ac43SStephen Cameron u8 sense_key, asc, ascq; 36949437ac43SStephen Cameron int sense_len; 369525163bd5SWebb Scales int rc, ldstat = 0; 36969846590eSStephen M. Cameron u16 cmd_status; 36979846590eSStephen M. Cameron u8 scsi_status; 36989846590eSStephen M. Cameron #define ASC_LUN_NOT_READY 0x04 36999846590eSStephen M. Cameron #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04 37009846590eSStephen M. Cameron #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02 37019846590eSStephen M. Cameron 37029846590eSStephen M. Cameron c = cmd_alloc(h); 3703bf43caf3SRobert Elliott 37049846590eSStephen M. Cameron (void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD); 3705c448ecfaSDon Brace rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 3706c448ecfaSDon Brace DEFAULT_TIMEOUT); 370725163bd5SWebb Scales if (rc) { 370825163bd5SWebb Scales cmd_free(h, c); 370985b29008SDon Brace return HPSA_VPD_LV_STATUS_UNSUPPORTED; 371025163bd5SWebb Scales } 37119846590eSStephen M. Cameron sense = c->err_info->SenseInfo; 37129437ac43SStephen Cameron if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo)) 37139437ac43SStephen Cameron sense_len = sizeof(c->err_info->SenseInfo); 37149437ac43SStephen Cameron else 37159437ac43SStephen Cameron sense_len = c->err_info->SenseLen; 37169437ac43SStephen Cameron decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq); 37179846590eSStephen M. Cameron cmd_status = c->err_info->CommandStatus; 37189846590eSStephen M. Cameron scsi_status = c->err_info->ScsiStatus; 37199846590eSStephen M. Cameron cmd_free(h, c); 37209846590eSStephen M. Cameron 37219846590eSStephen M. Cameron /* Determine the reason for not ready state */ 37229846590eSStephen M. Cameron ldstat = hpsa_get_volume_status(h, scsi3addr); 37239846590eSStephen M. Cameron 37249846590eSStephen M. Cameron /* Keep volume offline in certain cases: */ 37259846590eSStephen M. Cameron switch (ldstat) { 372685b29008SDon Brace case HPSA_LV_FAILED: 37279846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ERASE: 37285ca01204SScott Benesh case HPSA_LV_NOT_AVAILABLE: 37299846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_RPI: 37309846590eSStephen M. Cameron case HPSA_LV_PENDING_RPI: 37319846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_NO_KEY: 37329846590eSStephen M. Cameron case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER: 37339846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION: 37349846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING: 37359846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 37369846590eSStephen M. Cameron return ldstat; 37379846590eSStephen M. Cameron case HPSA_VPD_LV_STATUS_UNSUPPORTED: 37389846590eSStephen M. Cameron /* If VPD status page isn't available, 37399846590eSStephen M. Cameron * use ASC/ASCQ to determine state 37409846590eSStephen M. Cameron */ 37419846590eSStephen M. Cameron if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) || 37429846590eSStephen M. Cameron (ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ)) 37439846590eSStephen M. Cameron return ldstat; 37449846590eSStephen M. Cameron break; 37459846590eSStephen M. Cameron default: 37469846590eSStephen M. Cameron break; 37479846590eSStephen M. Cameron } 374885b29008SDon Brace return HPSA_LV_OK; 37499846590eSStephen M. Cameron } 37509846590eSStephen M. Cameron 3751edd16368SStephen M. Cameron static int hpsa_update_device_info(struct ctlr_info *h, 37520b0e1d6cSStephen M. Cameron unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device, 37530b0e1d6cSStephen M. Cameron unsigned char *is_OBDR_device) 3754edd16368SStephen M. Cameron { 37550b0e1d6cSStephen M. Cameron 37560b0e1d6cSStephen M. Cameron #define OBDR_SIG_OFFSET 43 37570b0e1d6cSStephen M. Cameron #define OBDR_TAPE_SIG "$DR-10" 37580b0e1d6cSStephen M. Cameron #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1) 37590b0e1d6cSStephen M. Cameron #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN) 37600b0e1d6cSStephen M. Cameron 3761ea6d3bc3SStephen M. Cameron unsigned char *inq_buff; 37620b0e1d6cSStephen M. Cameron unsigned char *obdr_sig; 3763683fc444SDon Brace int rc = 0; 3764edd16368SStephen M. Cameron 3765ea6d3bc3SStephen M. Cameron inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL); 3766683fc444SDon Brace if (!inq_buff) { 3767683fc444SDon Brace rc = -ENOMEM; 3768edd16368SStephen M. Cameron goto bail_out; 3769683fc444SDon Brace } 3770edd16368SStephen M. Cameron 3771edd16368SStephen M. Cameron /* Do an inquiry to the device to see what it is. */ 3772edd16368SStephen M. Cameron if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff, 3773edd16368SStephen M. Cameron (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) { 3774edd16368SStephen M. Cameron dev_err(&h->pdev->dev, 377585b29008SDon Brace "%s: inquiry failed, device will be skipped.\n", 377685b29008SDon Brace __func__); 377785b29008SDon Brace rc = HPSA_INQUIRY_FAILED; 3778edd16368SStephen M. Cameron goto bail_out; 3779edd16368SStephen M. Cameron } 3780edd16368SStephen M. Cameron 37814af61e4fSDon Brace scsi_sanitize_inquiry_string(&inq_buff[8], 8); 37824af61e4fSDon Brace scsi_sanitize_inquiry_string(&inq_buff[16], 16); 378375d23d89SDon Brace 3784edd16368SStephen M. Cameron this_device->devtype = (inq_buff[0] & 0x1f); 3785edd16368SStephen M. Cameron memcpy(this_device->scsi3addr, scsi3addr, 8); 3786edd16368SStephen M. Cameron memcpy(this_device->vendor, &inq_buff[8], 3787edd16368SStephen M. Cameron sizeof(this_device->vendor)); 3788edd16368SStephen M. Cameron memcpy(this_device->model, &inq_buff[16], 3789edd16368SStephen M. Cameron sizeof(this_device->model)); 37907630b3a5SHannes Reinecke this_device->rev = inq_buff[2]; 3791edd16368SStephen M. Cameron memset(this_device->device_id, 0, 3792edd16368SStephen M. Cameron sizeof(this_device->device_id)); 37938383278dSScott Teel if (hpsa_get_device_id(h, scsi3addr, this_device->device_id, 8, 37948383278dSScott Teel sizeof(this_device->device_id))) 37958383278dSScott Teel dev_err(&h->pdev->dev, 37968383278dSScott Teel "hpsa%d: %s: can't get device id for host %d:C0:T%d:L%d\t%s\t%.16s\n", 37978383278dSScott Teel h->ctlr, __func__, 37988383278dSScott Teel h->scsi_host->host_no, 37998383278dSScott Teel this_device->target, this_device->lun, 38008383278dSScott Teel scsi_device_type(this_device->devtype), 38018383278dSScott Teel this_device->model); 3802edd16368SStephen M. Cameron 3803af15ed36SDon Brace if ((this_device->devtype == TYPE_DISK || 3804af15ed36SDon Brace this_device->devtype == TYPE_ZBC) && 3805283b4a9bSStephen M. Cameron is_logical_dev_addr_mode(scsi3addr)) { 380685b29008SDon Brace unsigned char volume_offline; 380767955ba3SStephen M. Cameron 3808edd16368SStephen M. Cameron hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level); 3809283b4a9bSStephen M. Cameron if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC) 3810283b4a9bSStephen M. Cameron hpsa_get_ioaccel_status(h, scsi3addr, this_device); 381167955ba3SStephen M. Cameron volume_offline = hpsa_volume_offline(h, scsi3addr); 3812eb94588dSTomas Henzl this_device->volume_offline = volume_offline; 381385b29008SDon Brace if (volume_offline == HPSA_LV_FAILED) { 381485b29008SDon Brace rc = HPSA_LV_FAILED; 381585b29008SDon Brace dev_err(&h->pdev->dev, 381685b29008SDon Brace "%s: LV failed, device will be skipped.\n", 381785b29008SDon Brace __func__); 381885b29008SDon Brace goto bail_out; 381985b29008SDon Brace } 3820283b4a9bSStephen M. Cameron } else { 3821edd16368SStephen M. Cameron this_device->raid_level = RAID_UNKNOWN; 3822283b4a9bSStephen M. Cameron this_device->offload_config = 0; 3823283b4a9bSStephen M. Cameron this_device->offload_enabled = 0; 382441ce4c35SStephen Cameron this_device->offload_to_be_enabled = 0; 3825a3144e0bSJoe Handzik this_device->hba_ioaccel_enabled = 0; 38269846590eSStephen M. Cameron this_device->volume_offline = 0; 382703383736SDon Brace this_device->queue_depth = h->nr_cmds; 3828283b4a9bSStephen M. Cameron } 3829edd16368SStephen M. Cameron 38305086435eSDon Brace if (this_device->external) 38315086435eSDon Brace this_device->queue_depth = EXTERNAL_QD; 38325086435eSDon Brace 38330b0e1d6cSStephen M. Cameron if (is_OBDR_device) { 38340b0e1d6cSStephen M. Cameron /* See if this is a One-Button-Disaster-Recovery device 38350b0e1d6cSStephen M. Cameron * by looking for "$DR-10" at offset 43 in inquiry data. 38360b0e1d6cSStephen M. Cameron */ 38370b0e1d6cSStephen M. Cameron obdr_sig = &inq_buff[OBDR_SIG_OFFSET]; 38380b0e1d6cSStephen M. Cameron *is_OBDR_device = (this_device->devtype == TYPE_ROM && 38390b0e1d6cSStephen M. Cameron strncmp(obdr_sig, OBDR_TAPE_SIG, 38400b0e1d6cSStephen M. Cameron OBDR_SIG_LEN) == 0); 38410b0e1d6cSStephen M. Cameron } 3842edd16368SStephen M. Cameron kfree(inq_buff); 3843edd16368SStephen M. Cameron return 0; 3844edd16368SStephen M. Cameron 3845edd16368SStephen M. Cameron bail_out: 3846edd16368SStephen M. Cameron kfree(inq_buff); 3847683fc444SDon Brace return rc; 3848edd16368SStephen M. Cameron } 3849edd16368SStephen M. Cameron 3850c795505aSKevin Barnett /* 3851c795505aSKevin Barnett * Helper function to assign bus, target, lun mapping of devices. 3852edd16368SStephen M. Cameron * Logical drive target and lun are assigned at this time, but 3853edd16368SStephen M. Cameron * physical device lun and target assignment are deferred (assigned 3854edd16368SStephen M. Cameron * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.) 3855edd16368SStephen M. Cameron */ 3856edd16368SStephen M. Cameron static void figure_bus_target_lun(struct ctlr_info *h, 38571f310bdeSStephen M. Cameron u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device) 3858edd16368SStephen M. Cameron { 3859c795505aSKevin Barnett u32 lunid = get_unaligned_le32(lunaddrbytes); 3860edd16368SStephen M. Cameron 38611f310bdeSStephen M. Cameron if (!is_logical_dev_addr_mode(lunaddrbytes)) { 38621f310bdeSStephen M. Cameron /* physical device, target and lun filled in later */ 38637630b3a5SHannes Reinecke if (is_hba_lunid(lunaddrbytes)) { 38647630b3a5SHannes Reinecke int bus = HPSA_HBA_BUS; 38657630b3a5SHannes Reinecke 38667630b3a5SHannes Reinecke if (!device->rev) 38677630b3a5SHannes Reinecke bus = HPSA_LEGACY_HBA_BUS; 3868c795505aSKevin Barnett hpsa_set_bus_target_lun(device, 38697630b3a5SHannes Reinecke bus, 0, lunid & 0x3fff); 38707630b3a5SHannes Reinecke } else 38711f310bdeSStephen M. Cameron /* defer target, lun assignment for physical devices */ 3872c795505aSKevin Barnett hpsa_set_bus_target_lun(device, 3873c795505aSKevin Barnett HPSA_PHYSICAL_DEVICE_BUS, -1, -1); 38741f310bdeSStephen M. Cameron return; 38751f310bdeSStephen M. Cameron } 38761f310bdeSStephen M. Cameron /* It's a logical device */ 387766749d0dSScott Teel if (device->external) { 38781f310bdeSStephen M. Cameron hpsa_set_bus_target_lun(device, 3879c795505aSKevin Barnett HPSA_EXTERNAL_RAID_VOLUME_BUS, (lunid >> 16) & 0x3fff, 3880c795505aSKevin Barnett lunid & 0x00ff); 38811f310bdeSStephen M. Cameron return; 3882339b2b14SStephen M. Cameron } 3883c795505aSKevin Barnett hpsa_set_bus_target_lun(device, HPSA_RAID_VOLUME_BUS, 3884c795505aSKevin Barnett 0, lunid & 0x3fff); 3885edd16368SStephen M. Cameron } 3886edd16368SStephen M. Cameron 388766749d0dSScott Teel static int figure_external_status(struct ctlr_info *h, int raid_ctlr_position, 388866749d0dSScott Teel int i, int nphysicals, int nlocal_logicals) 388966749d0dSScott Teel { 389066749d0dSScott Teel /* In report logicals, local logicals are listed first, 389166749d0dSScott Teel * then any externals. 389266749d0dSScott Teel */ 389366749d0dSScott Teel int logicals_start = nphysicals + (raid_ctlr_position == 0); 389466749d0dSScott Teel 389566749d0dSScott Teel if (i == raid_ctlr_position) 389666749d0dSScott Teel return 0; 389766749d0dSScott Teel 389866749d0dSScott Teel if (i < logicals_start) 389966749d0dSScott Teel return 0; 390066749d0dSScott Teel 390166749d0dSScott Teel /* i is in logicals range, but still within local logicals */ 390266749d0dSScott Teel if ((i - nphysicals - (raid_ctlr_position == 0)) < nlocal_logicals) 390366749d0dSScott Teel return 0; 390466749d0dSScott Teel 390566749d0dSScott Teel return 1; /* it's an external lun */ 390666749d0dSScott Teel } 390766749d0dSScott Teel 390854b6e9e9SScott Teel /* 3909edd16368SStephen M. Cameron * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev, 3910edd16368SStephen M. Cameron * logdev. The number of luns in physdev and logdev are returned in 3911edd16368SStephen M. Cameron * *nphysicals and *nlogicals, respectively. 3912edd16368SStephen M. Cameron * Returns 0 on success, -1 otherwise. 3913edd16368SStephen M. Cameron */ 3914edd16368SStephen M. Cameron static int hpsa_gather_lun_info(struct ctlr_info *h, 391503383736SDon Brace struct ReportExtendedLUNdata *physdev, u32 *nphysicals, 391601a02ffcSStephen M. Cameron struct ReportLUNdata *logdev, u32 *nlogicals) 3917edd16368SStephen M. Cameron { 391803383736SDon Brace if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) { 3919edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 3920edd16368SStephen M. Cameron return -1; 3921edd16368SStephen M. Cameron } 392203383736SDon Brace *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24; 3923edd16368SStephen M. Cameron if (*nphysicals > HPSA_MAX_PHYS_LUN) { 392403383736SDon Brace dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n", 392503383736SDon Brace HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN); 3926edd16368SStephen M. Cameron *nphysicals = HPSA_MAX_PHYS_LUN; 3927edd16368SStephen M. Cameron } 392803383736SDon Brace if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) { 3929edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "report logical LUNs failed.\n"); 3930edd16368SStephen M. Cameron return -1; 3931edd16368SStephen M. Cameron } 39326df1e954SStephen M. Cameron *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8; 3933edd16368SStephen M. Cameron /* Reject Logicals in excess of our max capability. */ 3934edd16368SStephen M. Cameron if (*nlogicals > HPSA_MAX_LUN) { 3935edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 3936edd16368SStephen M. Cameron "maximum logical LUNs (%d) exceeded. " 3937edd16368SStephen M. Cameron "%d LUNs ignored.\n", HPSA_MAX_LUN, 3938edd16368SStephen M. Cameron *nlogicals - HPSA_MAX_LUN); 3939edd16368SStephen M. Cameron *nlogicals = HPSA_MAX_LUN; 3940edd16368SStephen M. Cameron } 3941edd16368SStephen M. Cameron if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) { 3942edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 3943edd16368SStephen M. Cameron "maximum logical + physical LUNs (%d) exceeded. " 3944edd16368SStephen M. Cameron "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN, 3945edd16368SStephen M. Cameron *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN); 3946edd16368SStephen M. Cameron *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals; 3947edd16368SStephen M. Cameron } 3948edd16368SStephen M. Cameron return 0; 3949edd16368SStephen M. Cameron } 3950edd16368SStephen M. Cameron 395142a91641SDon Brace static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, 395242a91641SDon Brace int i, int nphysicals, int nlogicals, 3953a93aa1feSMatt Gates struct ReportExtendedLUNdata *physdev_list, 3954339b2b14SStephen M. Cameron struct ReportLUNdata *logdev_list) 3955339b2b14SStephen M. Cameron { 3956339b2b14SStephen M. Cameron /* Helper function, figure out where the LUN ID info is coming from 3957339b2b14SStephen M. Cameron * given index i, lists of physical and logical devices, where in 3958339b2b14SStephen M. Cameron * the list the raid controller is supposed to appear (first or last) 3959339b2b14SStephen M. Cameron */ 3960339b2b14SStephen M. Cameron 3961339b2b14SStephen M. Cameron int logicals_start = nphysicals + (raid_ctlr_position == 0); 3962339b2b14SStephen M. Cameron int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0); 3963339b2b14SStephen M. Cameron 3964339b2b14SStephen M. Cameron if (i == raid_ctlr_position) 3965339b2b14SStephen M. Cameron return RAID_CTLR_LUNID; 3966339b2b14SStephen M. Cameron 3967339b2b14SStephen M. Cameron if (i < logicals_start) 3968d5b5d964SStephen M. Cameron return &physdev_list->LUN[i - 3969d5b5d964SStephen M. Cameron (raid_ctlr_position == 0)].lunid[0]; 3970339b2b14SStephen M. Cameron 3971339b2b14SStephen M. Cameron if (i < last_device) 3972339b2b14SStephen M. Cameron return &logdev_list->LUN[i - nphysicals - 3973339b2b14SStephen M. Cameron (raid_ctlr_position == 0)][0]; 3974339b2b14SStephen M. Cameron BUG(); 3975339b2b14SStephen M. Cameron return NULL; 3976339b2b14SStephen M. Cameron } 3977339b2b14SStephen M. Cameron 397803383736SDon Brace /* get physical drive ioaccel handle and queue depth */ 397903383736SDon Brace static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h, 398003383736SDon Brace struct hpsa_scsi_dev_t *dev, 3981f2039b03SDon Brace struct ReportExtendedLUNdata *rlep, int rle_index, 398203383736SDon Brace struct bmic_identify_physical_device *id_phys) 398303383736SDon Brace { 398403383736SDon Brace int rc; 39854b6e5597SScott Teel struct ext_report_lun_entry *rle; 39864b6e5597SScott Teel 39874b6e5597SScott Teel rle = &rlep->LUN[rle_index]; 398803383736SDon Brace 398903383736SDon Brace dev->ioaccel_handle = rle->ioaccel_handle; 3990f2039b03SDon Brace if ((rle->device_flags & 0x08) && dev->ioaccel_handle) 3991a3144e0bSJoe Handzik dev->hba_ioaccel_enabled = 1; 399203383736SDon Brace memset(id_phys, 0, sizeof(*id_phys)); 3993f2039b03SDon Brace rc = hpsa_bmic_id_physical_device(h, &rle->lunid[0], 3994f2039b03SDon Brace GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]), id_phys, 399503383736SDon Brace sizeof(*id_phys)); 399603383736SDon Brace if (!rc) 399703383736SDon Brace /* Reserve space for FW operations */ 399803383736SDon Brace #define DRIVE_CMDS_RESERVED_FOR_FW 2 399903383736SDon Brace #define DRIVE_QUEUE_DEPTH 7 400003383736SDon Brace dev->queue_depth = 400103383736SDon Brace le16_to_cpu(id_phys->current_queue_depth_limit) - 400203383736SDon Brace DRIVE_CMDS_RESERVED_FOR_FW; 400303383736SDon Brace else 400403383736SDon Brace dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */ 400503383736SDon Brace } 400603383736SDon Brace 40078270b862SJoe Handzik static void hpsa_get_path_info(struct hpsa_scsi_dev_t *this_device, 4008f2039b03SDon Brace struct ReportExtendedLUNdata *rlep, int rle_index, 40098270b862SJoe Handzik struct bmic_identify_physical_device *id_phys) 40108270b862SJoe Handzik { 4011f2039b03SDon Brace struct ext_report_lun_entry *rle = &rlep->LUN[rle_index]; 4012f2039b03SDon Brace 4013f2039b03SDon Brace if ((rle->device_flags & 0x08) && this_device->ioaccel_handle) 40148270b862SJoe Handzik this_device->hba_ioaccel_enabled = 1; 40158270b862SJoe Handzik 40168270b862SJoe Handzik memcpy(&this_device->active_path_index, 40178270b862SJoe Handzik &id_phys->active_path_number, 40188270b862SJoe Handzik sizeof(this_device->active_path_index)); 40198270b862SJoe Handzik memcpy(&this_device->path_map, 40208270b862SJoe Handzik &id_phys->redundant_path_present_map, 40218270b862SJoe Handzik sizeof(this_device->path_map)); 40228270b862SJoe Handzik memcpy(&this_device->box, 40238270b862SJoe Handzik &id_phys->alternate_paths_phys_box_on_port, 40248270b862SJoe Handzik sizeof(this_device->box)); 40258270b862SJoe Handzik memcpy(&this_device->phys_connector, 40268270b862SJoe Handzik &id_phys->alternate_paths_phys_connector, 40278270b862SJoe Handzik sizeof(this_device->phys_connector)); 40288270b862SJoe Handzik memcpy(&this_device->bay, 40298270b862SJoe Handzik &id_phys->phys_bay_in_box, 40308270b862SJoe Handzik sizeof(this_device->bay)); 40318270b862SJoe Handzik } 40328270b862SJoe Handzik 403366749d0dSScott Teel /* get number of local logical disks. */ 403466749d0dSScott Teel static int hpsa_set_local_logical_count(struct ctlr_info *h, 403566749d0dSScott Teel struct bmic_identify_controller *id_ctlr, 403666749d0dSScott Teel u32 *nlocals) 403766749d0dSScott Teel { 403866749d0dSScott Teel int rc; 403966749d0dSScott Teel 404066749d0dSScott Teel if (!id_ctlr) { 404166749d0dSScott Teel dev_warn(&h->pdev->dev, "%s: id_ctlr buffer is NULL.\n", 404266749d0dSScott Teel __func__); 404366749d0dSScott Teel return -ENOMEM; 404466749d0dSScott Teel } 404566749d0dSScott Teel memset(id_ctlr, 0, sizeof(*id_ctlr)); 404666749d0dSScott Teel rc = hpsa_bmic_id_controller(h, id_ctlr, sizeof(*id_ctlr)); 404766749d0dSScott Teel if (!rc) 404866749d0dSScott Teel if (id_ctlr->configured_logical_drive_count < 256) 404966749d0dSScott Teel *nlocals = id_ctlr->configured_logical_drive_count; 405066749d0dSScott Teel else 405166749d0dSScott Teel *nlocals = le16_to_cpu( 405266749d0dSScott Teel id_ctlr->extended_logical_unit_count); 405366749d0dSScott Teel else 405466749d0dSScott Teel *nlocals = -1; 405566749d0dSScott Teel return rc; 405666749d0dSScott Teel } 405766749d0dSScott Teel 405864ce60caSDon Brace static bool hpsa_is_disk_spare(struct ctlr_info *h, u8 *lunaddrbytes) 405964ce60caSDon Brace { 406064ce60caSDon Brace struct bmic_identify_physical_device *id_phys; 406164ce60caSDon Brace bool is_spare = false; 406264ce60caSDon Brace int rc; 406364ce60caSDon Brace 406464ce60caSDon Brace id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 406564ce60caSDon Brace if (!id_phys) 406664ce60caSDon Brace return false; 406764ce60caSDon Brace 406864ce60caSDon Brace rc = hpsa_bmic_id_physical_device(h, 406964ce60caSDon Brace lunaddrbytes, 407064ce60caSDon Brace GET_BMIC_DRIVE_NUMBER(lunaddrbytes), 407164ce60caSDon Brace id_phys, sizeof(*id_phys)); 407264ce60caSDon Brace if (rc == 0) 407364ce60caSDon Brace is_spare = (id_phys->more_flags >> 6) & 0x01; 407464ce60caSDon Brace 407564ce60caSDon Brace kfree(id_phys); 407664ce60caSDon Brace return is_spare; 407764ce60caSDon Brace } 407864ce60caSDon Brace 407964ce60caSDon Brace #define RPL_DEV_FLAG_NON_DISK 0x1 408064ce60caSDon Brace #define RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED 0x2 408164ce60caSDon Brace #define RPL_DEV_FLAG_UNCONFIG_DISK 0x4 408264ce60caSDon Brace 408364ce60caSDon Brace #define BMIC_DEVICE_TYPE_ENCLOSURE 6 408464ce60caSDon Brace 408564ce60caSDon Brace static bool hpsa_skip_device(struct ctlr_info *h, u8 *lunaddrbytes, 408664ce60caSDon Brace struct ext_report_lun_entry *rle) 408764ce60caSDon Brace { 408864ce60caSDon Brace u8 device_flags; 408964ce60caSDon Brace u8 device_type; 409064ce60caSDon Brace 409164ce60caSDon Brace if (!MASKED_DEVICE(lunaddrbytes)) 409264ce60caSDon Brace return false; 409364ce60caSDon Brace 409464ce60caSDon Brace device_flags = rle->device_flags; 409564ce60caSDon Brace device_type = rle->device_type; 409664ce60caSDon Brace 409764ce60caSDon Brace if (device_flags & RPL_DEV_FLAG_NON_DISK) { 409864ce60caSDon Brace if (device_type == BMIC_DEVICE_TYPE_ENCLOSURE) 409964ce60caSDon Brace return false; 410064ce60caSDon Brace return true; 410164ce60caSDon Brace } 410264ce60caSDon Brace 410364ce60caSDon Brace if (!(device_flags & RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED)) 410464ce60caSDon Brace return false; 410564ce60caSDon Brace 410664ce60caSDon Brace if (device_flags & RPL_DEV_FLAG_UNCONFIG_DISK) 410764ce60caSDon Brace return false; 410864ce60caSDon Brace 410964ce60caSDon Brace /* 411064ce60caSDon Brace * Spares may be spun down, we do not want to 411164ce60caSDon Brace * do an Inquiry to a RAID set spare drive as 411264ce60caSDon Brace * that would have them spun up, that is a 411364ce60caSDon Brace * performance hit because I/O to the RAID device 411464ce60caSDon Brace * stops while the spin up occurs which can take 411564ce60caSDon Brace * over 50 seconds. 411664ce60caSDon Brace */ 411764ce60caSDon Brace if (hpsa_is_disk_spare(h, lunaddrbytes)) 411864ce60caSDon Brace return true; 411964ce60caSDon Brace 412064ce60caSDon Brace return false; 412164ce60caSDon Brace } 412266749d0dSScott Teel 41238aa60681SDon Brace static void hpsa_update_scsi_devices(struct ctlr_info *h) 4124edd16368SStephen M. Cameron { 4125edd16368SStephen M. Cameron /* the idea here is we could get notified 4126edd16368SStephen M. Cameron * that some devices have changed, so we do a report 4127edd16368SStephen M. Cameron * physical luns and report logical luns cmd, and adjust 4128edd16368SStephen M. Cameron * our list of devices accordingly. 4129edd16368SStephen M. Cameron * 4130edd16368SStephen M. Cameron * The scsi3addr's of devices won't change so long as the 4131edd16368SStephen M. Cameron * adapter is not reset. That means we can rescan and 4132edd16368SStephen M. Cameron * tell which devices we already know about, vs. new 4133edd16368SStephen M. Cameron * devices, vs. disappearing devices. 4134edd16368SStephen M. Cameron */ 4135a93aa1feSMatt Gates struct ReportExtendedLUNdata *physdev_list = NULL; 4136edd16368SStephen M. Cameron struct ReportLUNdata *logdev_list = NULL; 413703383736SDon Brace struct bmic_identify_physical_device *id_phys = NULL; 413866749d0dSScott Teel struct bmic_identify_controller *id_ctlr = NULL; 413901a02ffcSStephen M. Cameron u32 nphysicals = 0; 414001a02ffcSStephen M. Cameron u32 nlogicals = 0; 414166749d0dSScott Teel u32 nlocal_logicals = 0; 414201a02ffcSStephen M. Cameron u32 ndev_allocated = 0; 4143edd16368SStephen M. Cameron struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice; 4144edd16368SStephen M. Cameron int ncurrent = 0; 41454f4eb9f1SScott Teel int i, n_ext_target_devs, ndevs_to_allocate; 4146339b2b14SStephen M. Cameron int raid_ctlr_position; 414704fa2f44SKevin Barnett bool physical_device; 4148aca4a520SScott Teel DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS); 4149edd16368SStephen M. Cameron 4150cfe5badcSScott Teel currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL); 415192084715SStephen M. Cameron physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL); 415292084715SStephen M. Cameron logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL); 4153edd16368SStephen M. Cameron tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL); 415403383736SDon Brace id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 415566749d0dSScott Teel id_ctlr = kzalloc(sizeof(*id_ctlr), GFP_KERNEL); 4156edd16368SStephen M. Cameron 415703383736SDon Brace if (!currentsd || !physdev_list || !logdev_list || 415866749d0dSScott Teel !tmpdevice || !id_phys || !id_ctlr) { 4159edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "out of memory\n"); 4160edd16368SStephen M. Cameron goto out; 4161edd16368SStephen M. Cameron } 4162edd16368SStephen M. Cameron memset(lunzerobits, 0, sizeof(lunzerobits)); 4163edd16368SStephen M. Cameron 4164853633e8SDon Brace h->drv_req_rescan = 0; /* cancel scheduled rescan - we're doing it. */ 4165853633e8SDon Brace 416603383736SDon Brace if (hpsa_gather_lun_info(h, physdev_list, &nphysicals, 4167853633e8SDon Brace logdev_list, &nlogicals)) { 4168853633e8SDon Brace h->drv_req_rescan = 1; 4169edd16368SStephen M. Cameron goto out; 4170853633e8SDon Brace } 4171edd16368SStephen M. Cameron 417266749d0dSScott Teel /* Set number of local logicals (non PTRAID) */ 417366749d0dSScott Teel if (hpsa_set_local_logical_count(h, id_ctlr, &nlocal_logicals)) { 417466749d0dSScott Teel dev_warn(&h->pdev->dev, 417566749d0dSScott Teel "%s: Can't determine number of local logical devices.\n", 417666749d0dSScott Teel __func__); 417766749d0dSScott Teel } 4178edd16368SStephen M. Cameron 4179aca4a520SScott Teel /* We might see up to the maximum number of logical and physical disks 4180aca4a520SScott Teel * plus external target devices, and a device for the local RAID 4181aca4a520SScott Teel * controller. 4182edd16368SStephen M. Cameron */ 4183aca4a520SScott Teel ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1; 4184edd16368SStephen M. Cameron 4185edd16368SStephen M. Cameron /* Allocate the per device structures */ 4186edd16368SStephen M. Cameron for (i = 0; i < ndevs_to_allocate; i++) { 4187b7ec021fSScott Teel if (i >= HPSA_MAX_DEVICES) { 4188b7ec021fSScott Teel dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded." 4189b7ec021fSScott Teel " %d devices ignored.\n", HPSA_MAX_DEVICES, 4190b7ec021fSScott Teel ndevs_to_allocate - HPSA_MAX_DEVICES); 4191b7ec021fSScott Teel break; 4192b7ec021fSScott Teel } 4193b7ec021fSScott Teel 4194edd16368SStephen M. Cameron currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL); 4195edd16368SStephen M. Cameron if (!currentsd[i]) { 4196853633e8SDon Brace h->drv_req_rescan = 1; 4197edd16368SStephen M. Cameron goto out; 4198edd16368SStephen M. Cameron } 4199edd16368SStephen M. Cameron ndev_allocated++; 4200edd16368SStephen M. Cameron } 4201edd16368SStephen M. Cameron 42028645291bSStephen M. Cameron if (is_scsi_rev_5(h)) 4203339b2b14SStephen M. Cameron raid_ctlr_position = 0; 4204339b2b14SStephen M. Cameron else 4205339b2b14SStephen M. Cameron raid_ctlr_position = nphysicals + nlogicals; 4206339b2b14SStephen M. Cameron 4207edd16368SStephen M. Cameron /* adjust our table of devices */ 42084f4eb9f1SScott Teel n_ext_target_devs = 0; 4209edd16368SStephen M. Cameron for (i = 0; i < nphysicals + nlogicals + 1; i++) { 42100b0e1d6cSStephen M. Cameron u8 *lunaddrbytes, is_OBDR = 0; 4211683fc444SDon Brace int rc = 0; 4212f2039b03SDon Brace int phys_dev_index = i - (raid_ctlr_position == 0); 421364ce60caSDon Brace bool skip_device = false; 4214edd16368SStephen M. Cameron 421504fa2f44SKevin Barnett physical_device = i < nphysicals + (raid_ctlr_position == 0); 4216edd16368SStephen M. Cameron 4217edd16368SStephen M. Cameron /* Figure out where the LUN ID info is coming from */ 4218339b2b14SStephen M. Cameron lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position, 4219339b2b14SStephen M. Cameron i, nphysicals, nlogicals, physdev_list, logdev_list); 422041ce4c35SStephen Cameron 422186cf7130SDon Brace /* Determine if this is a lun from an external target array */ 422286cf7130SDon Brace tmpdevice->external = 422386cf7130SDon Brace figure_external_status(h, raid_ctlr_position, i, 422486cf7130SDon Brace nphysicals, nlocal_logicals); 422586cf7130SDon Brace 422664ce60caSDon Brace /* 422764ce60caSDon Brace * Skip over some devices such as a spare. 422864ce60caSDon Brace */ 422964ce60caSDon Brace if (!tmpdevice->external && physical_device) { 423064ce60caSDon Brace skip_device = hpsa_skip_device(h, lunaddrbytes, 423164ce60caSDon Brace &physdev_list->LUN[phys_dev_index]); 423264ce60caSDon Brace if (skip_device) 4233edd16368SStephen M. Cameron continue; 423464ce60caSDon Brace } 4235edd16368SStephen M. Cameron 4236edd16368SStephen M. Cameron /* Get device type, vendor, model, device id */ 4237683fc444SDon Brace rc = hpsa_update_device_info(h, lunaddrbytes, tmpdevice, 4238683fc444SDon Brace &is_OBDR); 4239683fc444SDon Brace if (rc == -ENOMEM) { 4240683fc444SDon Brace dev_warn(&h->pdev->dev, 4241683fc444SDon Brace "Out of memory, rescan deferred.\n"); 4242853633e8SDon Brace h->drv_req_rescan = 1; 4243683fc444SDon Brace goto out; 4244853633e8SDon Brace } 4245683fc444SDon Brace if (rc) { 424685b29008SDon Brace h->drv_req_rescan = 1; 4247683fc444SDon Brace continue; 4248683fc444SDon Brace } 4249683fc444SDon Brace 42501f310bdeSStephen M. Cameron figure_bus_target_lun(h, lunaddrbytes, tmpdevice); 4251edd16368SStephen M. Cameron this_device = currentsd[ncurrent]; 4252edd16368SStephen M. Cameron 425334592254SScott Teel /* Turn on discovery_polling if there are ext target devices. 425434592254SScott Teel * Event-based change notification is unreliable for those. 4255edd16368SStephen M. Cameron */ 425634592254SScott Teel if (!h->discovery_polling) { 425734592254SScott Teel if (tmpdevice->external) { 425834592254SScott Teel h->discovery_polling = 1; 425934592254SScott Teel dev_info(&h->pdev->dev, 426034592254SScott Teel "External target, activate discovery polling.\n"); 4261edd16368SStephen M. Cameron } 426234592254SScott Teel } 426334592254SScott Teel 4264edd16368SStephen M. Cameron 4265edd16368SStephen M. Cameron *this_device = *tmpdevice; 426604fa2f44SKevin Barnett this_device->physical_device = physical_device; 4267edd16368SStephen M. Cameron 426804fa2f44SKevin Barnett /* 426904fa2f44SKevin Barnett * Expose all devices except for physical devices that 427004fa2f44SKevin Barnett * are masked. 427104fa2f44SKevin Barnett */ 427204fa2f44SKevin Barnett if (MASKED_DEVICE(lunaddrbytes) && this_device->physical_device) 42732a168208SKevin Barnett this_device->expose_device = 0; 42742a168208SKevin Barnett else 42752a168208SKevin Barnett this_device->expose_device = 1; 427641ce4c35SStephen Cameron 4277d04e62b9SKevin Barnett 4278d04e62b9SKevin Barnett /* 4279d04e62b9SKevin Barnett * Get the SAS address for physical devices that are exposed. 4280d04e62b9SKevin Barnett */ 4281d04e62b9SKevin Barnett if (this_device->physical_device && this_device->expose_device) 4282d04e62b9SKevin Barnett hpsa_get_sas_address(h, lunaddrbytes, this_device); 4283edd16368SStephen M. Cameron 4284edd16368SStephen M. Cameron switch (this_device->devtype) { 42850b0e1d6cSStephen M. Cameron case TYPE_ROM: 4286edd16368SStephen M. Cameron /* We don't *really* support actual CD-ROM devices, 4287edd16368SStephen M. Cameron * just "One Button Disaster Recovery" tape drive 4288edd16368SStephen M. Cameron * which temporarily pretends to be a CD-ROM drive. 4289edd16368SStephen M. Cameron * So we check that the device is really an OBDR tape 4290edd16368SStephen M. Cameron * device by checking for "$DR-10" in bytes 43-48 of 4291edd16368SStephen M. Cameron * the inquiry data. 4292edd16368SStephen M. Cameron */ 42930b0e1d6cSStephen M. Cameron if (is_OBDR) 4294edd16368SStephen M. Cameron ncurrent++; 4295edd16368SStephen M. Cameron break; 4296edd16368SStephen M. Cameron case TYPE_DISK: 4297af15ed36SDon Brace case TYPE_ZBC: 429804fa2f44SKevin Barnett if (this_device->physical_device) { 4299b9092b79SKevin Barnett /* The disk is in HBA mode. */ 4300b9092b79SKevin Barnett /* Never use RAID mapper in HBA mode. */ 4301ecf418d1SJoe Handzik this_device->offload_enabled = 0; 430203383736SDon Brace hpsa_get_ioaccel_drive_info(h, this_device, 4303f2039b03SDon Brace physdev_list, phys_dev_index, id_phys); 4304f2039b03SDon Brace hpsa_get_path_info(this_device, 4305f2039b03SDon Brace physdev_list, phys_dev_index, id_phys); 4306b9092b79SKevin Barnett } 4307edd16368SStephen M. Cameron ncurrent++; 4308edd16368SStephen M. Cameron break; 4309edd16368SStephen M. Cameron case TYPE_TAPE: 4310edd16368SStephen M. Cameron case TYPE_MEDIUM_CHANGER: 4311cca8f13bSDon Brace ncurrent++; 4312cca8f13bSDon Brace break; 431341ce4c35SStephen Cameron case TYPE_ENCLOSURE: 431417a9e54aSDon Brace if (!this_device->external) 4315cca8f13bSDon Brace hpsa_get_enclosure_info(h, lunaddrbytes, 4316cca8f13bSDon Brace physdev_list, phys_dev_index, 4317cca8f13bSDon Brace this_device); 431841ce4c35SStephen Cameron ncurrent++; 431941ce4c35SStephen Cameron break; 4320edd16368SStephen M. Cameron case TYPE_RAID: 4321edd16368SStephen M. Cameron /* Only present the Smartarray HBA as a RAID controller. 4322edd16368SStephen M. Cameron * If it's a RAID controller other than the HBA itself 4323edd16368SStephen M. Cameron * (an external RAID controller, MSA500 or similar) 4324edd16368SStephen M. Cameron * don't present it. 4325edd16368SStephen M. Cameron */ 4326edd16368SStephen M. Cameron if (!is_hba_lunid(lunaddrbytes)) 4327edd16368SStephen M. Cameron break; 4328edd16368SStephen M. Cameron ncurrent++; 4329edd16368SStephen M. Cameron break; 4330edd16368SStephen M. Cameron default: 4331edd16368SStephen M. Cameron break; 4332edd16368SStephen M. Cameron } 4333cfe5badcSScott Teel if (ncurrent >= HPSA_MAX_DEVICES) 4334edd16368SStephen M. Cameron break; 4335edd16368SStephen M. Cameron } 4336d04e62b9SKevin Barnett 4337d04e62b9SKevin Barnett if (h->sas_host == NULL) { 4338d04e62b9SKevin Barnett int rc = 0; 4339d04e62b9SKevin Barnett 4340d04e62b9SKevin Barnett rc = hpsa_add_sas_host(h); 4341d04e62b9SKevin Barnett if (rc) { 4342d04e62b9SKevin Barnett dev_warn(&h->pdev->dev, 4343d04e62b9SKevin Barnett "Could not add sas host %d\n", rc); 4344d04e62b9SKevin Barnett goto out; 4345d04e62b9SKevin Barnett } 4346d04e62b9SKevin Barnett } 4347d04e62b9SKevin Barnett 43488aa60681SDon Brace adjust_hpsa_scsi_table(h, currentsd, ncurrent); 4349edd16368SStephen M. Cameron out: 4350edd16368SStephen M. Cameron kfree(tmpdevice); 4351edd16368SStephen M. Cameron for (i = 0; i < ndev_allocated; i++) 4352edd16368SStephen M. Cameron kfree(currentsd[i]); 4353edd16368SStephen M. Cameron kfree(currentsd); 4354edd16368SStephen M. Cameron kfree(physdev_list); 4355edd16368SStephen M. Cameron kfree(logdev_list); 435666749d0dSScott Teel kfree(id_ctlr); 435703383736SDon Brace kfree(id_phys); 4358edd16368SStephen M. Cameron } 4359edd16368SStephen M. Cameron 4360ec5cbf04SWebb Scales static void hpsa_set_sg_descriptor(struct SGDescriptor *desc, 4361ec5cbf04SWebb Scales struct scatterlist *sg) 4362ec5cbf04SWebb Scales { 4363ec5cbf04SWebb Scales u64 addr64 = (u64) sg_dma_address(sg); 4364ec5cbf04SWebb Scales unsigned int len = sg_dma_len(sg); 4365ec5cbf04SWebb Scales 4366ec5cbf04SWebb Scales desc->Addr = cpu_to_le64(addr64); 4367ec5cbf04SWebb Scales desc->Len = cpu_to_le32(len); 4368ec5cbf04SWebb Scales desc->Ext = 0; 4369ec5cbf04SWebb Scales } 4370ec5cbf04SWebb Scales 4371c7ee65b3SWebb Scales /* 4372c7ee65b3SWebb Scales * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci 4373edd16368SStephen M. Cameron * dma mapping and fills in the scatter gather entries of the 4374edd16368SStephen M. Cameron * hpsa command, cp. 4375edd16368SStephen M. Cameron */ 437633a2ffceSStephen M. Cameron static int hpsa_scatter_gather(struct ctlr_info *h, 4377edd16368SStephen M. Cameron struct CommandList *cp, 4378edd16368SStephen M. Cameron struct scsi_cmnd *cmd) 4379edd16368SStephen M. Cameron { 4380edd16368SStephen M. Cameron struct scatterlist *sg; 4381b3a7ba7cSWebb Scales int use_sg, i, sg_limit, chained, last_sg; 438233a2ffceSStephen M. Cameron struct SGDescriptor *curr_sg; 4383edd16368SStephen M. Cameron 438433a2ffceSStephen M. Cameron BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 4385edd16368SStephen M. Cameron 4386edd16368SStephen M. Cameron use_sg = scsi_dma_map(cmd); 4387edd16368SStephen M. Cameron if (use_sg < 0) 4388edd16368SStephen M. Cameron return use_sg; 4389edd16368SStephen M. Cameron 4390edd16368SStephen M. Cameron if (!use_sg) 4391edd16368SStephen M. Cameron goto sglist_finished; 4392edd16368SStephen M. Cameron 4393b3a7ba7cSWebb Scales /* 4394b3a7ba7cSWebb Scales * If the number of entries is greater than the max for a single list, 4395b3a7ba7cSWebb Scales * then we have a chained list; we will set up all but one entry in the 4396b3a7ba7cSWebb Scales * first list (the last entry is saved for link information); 4397b3a7ba7cSWebb Scales * otherwise, we don't have a chained list and we'll set up at each of 4398b3a7ba7cSWebb Scales * the entries in the one list. 4399b3a7ba7cSWebb Scales */ 440033a2ffceSStephen M. Cameron curr_sg = cp->SG; 4401b3a7ba7cSWebb Scales chained = use_sg > h->max_cmd_sg_entries; 4402b3a7ba7cSWebb Scales sg_limit = chained ? h->max_cmd_sg_entries - 1 : use_sg; 4403b3a7ba7cSWebb Scales last_sg = scsi_sg_count(cmd) - 1; 4404b3a7ba7cSWebb Scales scsi_for_each_sg(cmd, sg, sg_limit, i) { 4405ec5cbf04SWebb Scales hpsa_set_sg_descriptor(curr_sg, sg); 440633a2ffceSStephen M. Cameron curr_sg++; 440733a2ffceSStephen M. Cameron } 4408ec5cbf04SWebb Scales 4409b3a7ba7cSWebb Scales if (chained) { 4410b3a7ba7cSWebb Scales /* 4411b3a7ba7cSWebb Scales * Continue with the chained list. Set curr_sg to the chained 4412b3a7ba7cSWebb Scales * list. Modify the limit to the total count less the entries 4413b3a7ba7cSWebb Scales * we've already set up. Resume the scan at the list entry 4414b3a7ba7cSWebb Scales * where the previous loop left off. 4415b3a7ba7cSWebb Scales */ 4416b3a7ba7cSWebb Scales curr_sg = h->cmd_sg_list[cp->cmdindex]; 4417b3a7ba7cSWebb Scales sg_limit = use_sg - sg_limit; 4418b3a7ba7cSWebb Scales for_each_sg(sg, sg, sg_limit, i) { 4419b3a7ba7cSWebb Scales hpsa_set_sg_descriptor(curr_sg, sg); 4420b3a7ba7cSWebb Scales curr_sg++; 4421b3a7ba7cSWebb Scales } 4422b3a7ba7cSWebb Scales } 4423b3a7ba7cSWebb Scales 4424ec5cbf04SWebb Scales /* Back the pointer up to the last entry and mark it as "last". */ 4425b3a7ba7cSWebb Scales (curr_sg - 1)->Ext = cpu_to_le32(HPSA_SG_LAST); 442633a2ffceSStephen M. Cameron 442733a2ffceSStephen M. Cameron if (use_sg + chained > h->maxSG) 442833a2ffceSStephen M. Cameron h->maxSG = use_sg + chained; 442933a2ffceSStephen M. Cameron 443033a2ffceSStephen M. Cameron if (chained) { 443133a2ffceSStephen M. Cameron cp->Header.SGList = h->max_cmd_sg_entries; 443250a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(use_sg + 1); 4433e2bea6dfSStephen M. Cameron if (hpsa_map_sg_chain_block(h, cp)) { 4434e2bea6dfSStephen M. Cameron scsi_dma_unmap(cmd); 4435e2bea6dfSStephen M. Cameron return -1; 4436e2bea6dfSStephen M. Cameron } 443733a2ffceSStephen M. Cameron return 0; 4438edd16368SStephen M. Cameron } 4439edd16368SStephen M. Cameron 4440edd16368SStephen M. Cameron sglist_finished: 4441edd16368SStephen M. Cameron 444201a02ffcSStephen M. Cameron cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */ 4443c7ee65b3SWebb Scales cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */ 4444edd16368SStephen M. Cameron return 0; 4445edd16368SStephen M. Cameron } 4446edd16368SStephen M. Cameron 4447b63c64acSDon Brace #define BUFLEN 128 4448b63c64acSDon Brace static inline void warn_zero_length_transfer(struct ctlr_info *h, 4449b63c64acSDon Brace u8 *cdb, int cdb_len, 4450b63c64acSDon Brace const char *func) 4451b63c64acSDon Brace { 4452b63c64acSDon Brace char buf[BUFLEN]; 4453b63c64acSDon Brace int outlen; 4454b63c64acSDon Brace int i; 4455b63c64acSDon Brace 4456b63c64acSDon Brace outlen = scnprintf(buf, BUFLEN, 4457b63c64acSDon Brace "%s: Blocking zero-length request: CDB:", func); 4458b63c64acSDon Brace for (i = 0; i < cdb_len; i++) 4459b63c64acSDon Brace outlen += scnprintf(buf+outlen, BUFLEN - outlen, 4460b63c64acSDon Brace "%02hhx", cdb[i]); 4461b63c64acSDon Brace dev_warn(&h->pdev->dev, "%s\n", buf); 4462b63c64acSDon Brace } 4463b63c64acSDon Brace 4464b63c64acSDon Brace #define IO_ACCEL_INELIGIBLE 1 4465b63c64acSDon Brace /* zero-length transfers trigger hardware errors. */ 4466b63c64acSDon Brace static bool is_zero_length_transfer(u8 *cdb) 4467b63c64acSDon Brace { 4468b63c64acSDon Brace u32 block_cnt; 4469b63c64acSDon Brace 4470b63c64acSDon Brace /* Block zero-length transfer sizes on certain commands. */ 4471b63c64acSDon Brace switch (cdb[0]) { 4472b63c64acSDon Brace case READ_10: 4473b63c64acSDon Brace case WRITE_10: 4474b63c64acSDon Brace case VERIFY: /* 0x2F */ 4475b63c64acSDon Brace case WRITE_VERIFY: /* 0x2E */ 4476b63c64acSDon Brace block_cnt = get_unaligned_be16(&cdb[7]); 4477b63c64acSDon Brace break; 4478b63c64acSDon Brace case READ_12: 4479b63c64acSDon Brace case WRITE_12: 4480b63c64acSDon Brace case VERIFY_12: /* 0xAF */ 4481b63c64acSDon Brace case WRITE_VERIFY_12: /* 0xAE */ 4482b63c64acSDon Brace block_cnt = get_unaligned_be32(&cdb[6]); 4483b63c64acSDon Brace break; 4484b63c64acSDon Brace case READ_16: 4485b63c64acSDon Brace case WRITE_16: 4486b63c64acSDon Brace case VERIFY_16: /* 0x8F */ 4487b63c64acSDon Brace block_cnt = get_unaligned_be32(&cdb[10]); 4488b63c64acSDon Brace break; 4489b63c64acSDon Brace default: 4490b63c64acSDon Brace return false; 4491b63c64acSDon Brace } 4492b63c64acSDon Brace 4493b63c64acSDon Brace return block_cnt == 0; 4494b63c64acSDon Brace } 4495b63c64acSDon Brace 4496283b4a9bSStephen M. Cameron static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len) 4497283b4a9bSStephen M. Cameron { 4498283b4a9bSStephen M. Cameron int is_write = 0; 4499283b4a9bSStephen M. Cameron u32 block; 4500283b4a9bSStephen M. Cameron u32 block_cnt; 4501283b4a9bSStephen M. Cameron 4502283b4a9bSStephen M. Cameron /* Perform some CDB fixups if needed using 10 byte reads/writes only */ 4503283b4a9bSStephen M. Cameron switch (cdb[0]) { 4504283b4a9bSStephen M. Cameron case WRITE_6: 4505283b4a9bSStephen M. Cameron case WRITE_12: 4506283b4a9bSStephen M. Cameron is_write = 1; 4507283b4a9bSStephen M. Cameron case READ_6: 4508283b4a9bSStephen M. Cameron case READ_12: 4509283b4a9bSStephen M. Cameron if (*cdb_len == 6) { 4510abbada71SMahesh Rajashekhara block = (((cdb[1] & 0x1F) << 16) | 4511abbada71SMahesh Rajashekhara (cdb[2] << 8) | 4512abbada71SMahesh Rajashekhara cdb[3]); 4513283b4a9bSStephen M. Cameron block_cnt = cdb[4]; 4514c8a6c9a6SDon Brace if (block_cnt == 0) 4515c8a6c9a6SDon Brace block_cnt = 256; 4516283b4a9bSStephen M. Cameron } else { 4517283b4a9bSStephen M. Cameron BUG_ON(*cdb_len != 12); 4518c8a6c9a6SDon Brace block = get_unaligned_be32(&cdb[2]); 4519c8a6c9a6SDon Brace block_cnt = get_unaligned_be32(&cdb[6]); 4520283b4a9bSStephen M. Cameron } 4521283b4a9bSStephen M. Cameron if (block_cnt > 0xffff) 4522283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 4523283b4a9bSStephen M. Cameron 4524283b4a9bSStephen M. Cameron cdb[0] = is_write ? WRITE_10 : READ_10; 4525283b4a9bSStephen M. Cameron cdb[1] = 0; 4526283b4a9bSStephen M. Cameron cdb[2] = (u8) (block >> 24); 4527283b4a9bSStephen M. Cameron cdb[3] = (u8) (block >> 16); 4528283b4a9bSStephen M. Cameron cdb[4] = (u8) (block >> 8); 4529283b4a9bSStephen M. Cameron cdb[5] = (u8) (block); 4530283b4a9bSStephen M. Cameron cdb[6] = 0; 4531283b4a9bSStephen M. Cameron cdb[7] = (u8) (block_cnt >> 8); 4532283b4a9bSStephen M. Cameron cdb[8] = (u8) (block_cnt); 4533283b4a9bSStephen M. Cameron cdb[9] = 0; 4534283b4a9bSStephen M. Cameron *cdb_len = 10; 4535283b4a9bSStephen M. Cameron break; 4536283b4a9bSStephen M. Cameron } 4537283b4a9bSStephen M. Cameron return 0; 4538283b4a9bSStephen M. Cameron } 4539283b4a9bSStephen M. Cameron 4540c349775eSScott Teel static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h, 4541283b4a9bSStephen M. Cameron struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 454203383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4543e1f7de0cSMatt Gates { 4544e1f7de0cSMatt Gates struct scsi_cmnd *cmd = c->scsi_cmd; 4545e1f7de0cSMatt Gates struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex]; 4546e1f7de0cSMatt Gates unsigned int len; 4547e1f7de0cSMatt Gates unsigned int total_len = 0; 4548e1f7de0cSMatt Gates struct scatterlist *sg; 4549e1f7de0cSMatt Gates u64 addr64; 4550e1f7de0cSMatt Gates int use_sg, i; 4551e1f7de0cSMatt Gates struct SGDescriptor *curr_sg; 4552e1f7de0cSMatt Gates u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE; 4553e1f7de0cSMatt Gates 4554283b4a9bSStephen M. Cameron /* TODO: implement chaining support */ 455503383736SDon Brace if (scsi_sg_count(cmd) > h->ioaccel_maxsg) { 455603383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4557283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 455803383736SDon Brace } 4559283b4a9bSStephen M. Cameron 4560e1f7de0cSMatt Gates BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX); 4561e1f7de0cSMatt Gates 4562b63c64acSDon Brace if (is_zero_length_transfer(cdb)) { 4563b63c64acSDon Brace warn_zero_length_transfer(h, cdb, cdb_len, __func__); 4564b63c64acSDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4565b63c64acSDon Brace return IO_ACCEL_INELIGIBLE; 4566b63c64acSDon Brace } 4567b63c64acSDon Brace 456803383736SDon Brace if (fixup_ioaccel_cdb(cdb, &cdb_len)) { 456903383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4570283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 457103383736SDon Brace } 4572283b4a9bSStephen M. Cameron 4573e1f7de0cSMatt Gates c->cmd_type = CMD_IOACCEL1; 4574e1f7de0cSMatt Gates 4575e1f7de0cSMatt Gates /* Adjust the DMA address to point to the accelerated command buffer */ 4576e1f7de0cSMatt Gates c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle + 4577e1f7de0cSMatt Gates (c->cmdindex * sizeof(*cp)); 4578e1f7de0cSMatt Gates BUG_ON(c->busaddr & 0x0000007F); 4579e1f7de0cSMatt Gates 4580e1f7de0cSMatt Gates use_sg = scsi_dma_map(cmd); 458103383736SDon Brace if (use_sg < 0) { 458203383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4583e1f7de0cSMatt Gates return use_sg; 458403383736SDon Brace } 4585e1f7de0cSMatt Gates 4586e1f7de0cSMatt Gates if (use_sg) { 4587e1f7de0cSMatt Gates curr_sg = cp->SG; 4588e1f7de0cSMatt Gates scsi_for_each_sg(cmd, sg, use_sg, i) { 4589e1f7de0cSMatt Gates addr64 = (u64) sg_dma_address(sg); 4590e1f7de0cSMatt Gates len = sg_dma_len(sg); 4591e1f7de0cSMatt Gates total_len += len; 459250a0decfSStephen M. Cameron curr_sg->Addr = cpu_to_le64(addr64); 459350a0decfSStephen M. Cameron curr_sg->Len = cpu_to_le32(len); 459450a0decfSStephen M. Cameron curr_sg->Ext = cpu_to_le32(0); 4595e1f7de0cSMatt Gates curr_sg++; 4596e1f7de0cSMatt Gates } 459750a0decfSStephen M. Cameron (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST); 4598e1f7de0cSMatt Gates 4599e1f7de0cSMatt Gates switch (cmd->sc_data_direction) { 4600e1f7de0cSMatt Gates case DMA_TO_DEVICE: 4601e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_DATA_OUT; 4602e1f7de0cSMatt Gates break; 4603e1f7de0cSMatt Gates case DMA_FROM_DEVICE: 4604e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_DATA_IN; 4605e1f7de0cSMatt Gates break; 4606e1f7de0cSMatt Gates case DMA_NONE: 4607e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_NODATAXFER; 4608e1f7de0cSMatt Gates break; 4609e1f7de0cSMatt Gates default: 4610e1f7de0cSMatt Gates dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4611e1f7de0cSMatt Gates cmd->sc_data_direction); 4612e1f7de0cSMatt Gates BUG(); 4613e1f7de0cSMatt Gates break; 4614e1f7de0cSMatt Gates } 4615e1f7de0cSMatt Gates } else { 4616e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_NODATAXFER; 4617e1f7de0cSMatt Gates } 4618e1f7de0cSMatt Gates 4619c349775eSScott Teel c->Header.SGList = use_sg; 4620e1f7de0cSMatt Gates /* Fill out the command structure to submit */ 46212b08b3e9SDon Brace cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF); 46222b08b3e9SDon Brace cp->transfer_len = cpu_to_le32(total_len); 46232b08b3e9SDon Brace cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ | 46242b08b3e9SDon Brace (cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK)); 46252b08b3e9SDon Brace cp->control = cpu_to_le32(control); 4626283b4a9bSStephen M. Cameron memcpy(cp->CDB, cdb, cdb_len); 4627283b4a9bSStephen M. Cameron memcpy(cp->CISS_LUN, scsi3addr, 8); 4628c349775eSScott Teel /* Tag was already set at init time. */ 4629e1f7de0cSMatt Gates enqueue_cmd_and_start_io(h, c); 4630e1f7de0cSMatt Gates return 0; 4631e1f7de0cSMatt Gates } 4632edd16368SStephen M. Cameron 4633283b4a9bSStephen M. Cameron /* 4634283b4a9bSStephen M. Cameron * Queue a command directly to a device behind the controller using the 4635283b4a9bSStephen M. Cameron * I/O accelerator path. 4636283b4a9bSStephen M. Cameron */ 4637283b4a9bSStephen M. Cameron static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h, 4638283b4a9bSStephen M. Cameron struct CommandList *c) 4639283b4a9bSStephen M. Cameron { 4640283b4a9bSStephen M. Cameron struct scsi_cmnd *cmd = c->scsi_cmd; 4641283b4a9bSStephen M. Cameron struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4642283b4a9bSStephen M. Cameron 464345e596cdSDon Brace if (!dev) 464445e596cdSDon Brace return -1; 464545e596cdSDon Brace 464603383736SDon Brace c->phys_disk = dev; 464703383736SDon Brace 4648283b4a9bSStephen M. Cameron return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle, 464903383736SDon Brace cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev); 4650283b4a9bSStephen M. Cameron } 4651283b4a9bSStephen M. Cameron 4652dd0e19f3SScott Teel /* 4653dd0e19f3SScott Teel * Set encryption parameters for the ioaccel2 request 4654dd0e19f3SScott Teel */ 4655dd0e19f3SScott Teel static void set_encrypt_ioaccel2(struct ctlr_info *h, 4656dd0e19f3SScott Teel struct CommandList *c, struct io_accel2_cmd *cp) 4657dd0e19f3SScott Teel { 4658dd0e19f3SScott Teel struct scsi_cmnd *cmd = c->scsi_cmd; 4659dd0e19f3SScott Teel struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4660dd0e19f3SScott Teel struct raid_map_data *map = &dev->raid_map; 4661dd0e19f3SScott Teel u64 first_block; 4662dd0e19f3SScott Teel 4663dd0e19f3SScott Teel /* Are we doing encryption on this device */ 46642b08b3e9SDon Brace if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON)) 4665dd0e19f3SScott Teel return; 4666dd0e19f3SScott Teel /* Set the data encryption key index. */ 4667dd0e19f3SScott Teel cp->dekindex = map->dekindex; 4668dd0e19f3SScott Teel 4669dd0e19f3SScott Teel /* Set the encryption enable flag, encoded into direction field. */ 4670dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK; 4671dd0e19f3SScott Teel 4672dd0e19f3SScott Teel /* Set encryption tweak values based on logical block address 4673dd0e19f3SScott Teel * If block size is 512, tweak value is LBA. 4674dd0e19f3SScott Teel * For other block sizes, tweak is (LBA * block size)/ 512) 4675dd0e19f3SScott Teel */ 4676dd0e19f3SScott Teel switch (cmd->cmnd[0]) { 4677dd0e19f3SScott Teel /* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */ 4678dd0e19f3SScott Teel case READ_6: 4679abbada71SMahesh Rajashekhara case WRITE_6: 4680abbada71SMahesh Rajashekhara first_block = (((cmd->cmnd[1] & 0x1F) << 16) | 4681abbada71SMahesh Rajashekhara (cmd->cmnd[2] << 8) | 4682abbada71SMahesh Rajashekhara cmd->cmnd[3]); 4683dd0e19f3SScott Teel break; 4684dd0e19f3SScott Teel case WRITE_10: 4685dd0e19f3SScott Teel case READ_10: 4686dd0e19f3SScott Teel /* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */ 4687dd0e19f3SScott Teel case WRITE_12: 4688dd0e19f3SScott Teel case READ_12: 46892b08b3e9SDon Brace first_block = get_unaligned_be32(&cmd->cmnd[2]); 4690dd0e19f3SScott Teel break; 4691dd0e19f3SScott Teel case WRITE_16: 4692dd0e19f3SScott Teel case READ_16: 46932b08b3e9SDon Brace first_block = get_unaligned_be64(&cmd->cmnd[2]); 4694dd0e19f3SScott Teel break; 4695dd0e19f3SScott Teel default: 4696dd0e19f3SScott Teel dev_err(&h->pdev->dev, 46972b08b3e9SDon Brace "ERROR: %s: size (0x%x) not supported for encryption\n", 46982b08b3e9SDon Brace __func__, cmd->cmnd[0]); 4699dd0e19f3SScott Teel BUG(); 4700dd0e19f3SScott Teel break; 4701dd0e19f3SScott Teel } 47022b08b3e9SDon Brace 47032b08b3e9SDon Brace if (le32_to_cpu(map->volume_blk_size) != 512) 47042b08b3e9SDon Brace first_block = first_block * 47052b08b3e9SDon Brace le32_to_cpu(map->volume_blk_size)/512; 47062b08b3e9SDon Brace 47072b08b3e9SDon Brace cp->tweak_lower = cpu_to_le32(first_block); 47082b08b3e9SDon Brace cp->tweak_upper = cpu_to_le32(first_block >> 32); 4709dd0e19f3SScott Teel } 4710dd0e19f3SScott Teel 4711c349775eSScott Teel static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h, 4712c349775eSScott Teel struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 471303383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4714c349775eSScott Teel { 4715c349775eSScott Teel struct scsi_cmnd *cmd = c->scsi_cmd; 4716c349775eSScott Teel struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex]; 4717c349775eSScott Teel struct ioaccel2_sg_element *curr_sg; 4718c349775eSScott Teel int use_sg, i; 4719c349775eSScott Teel struct scatterlist *sg; 4720c349775eSScott Teel u64 addr64; 4721c349775eSScott Teel u32 len; 4722c349775eSScott Teel u32 total_len = 0; 4723c349775eSScott Teel 472445e596cdSDon Brace if (!cmd->device) 472545e596cdSDon Brace return -1; 472645e596cdSDon Brace 472745e596cdSDon Brace if (!cmd->device->hostdata) 472845e596cdSDon Brace return -1; 472945e596cdSDon Brace 4730d9a729f3SWebb Scales BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 4731c349775eSScott Teel 4732b63c64acSDon Brace if (is_zero_length_transfer(cdb)) { 4733b63c64acSDon Brace warn_zero_length_transfer(h, cdb, cdb_len, __func__); 4734b63c64acSDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4735b63c64acSDon Brace return IO_ACCEL_INELIGIBLE; 4736b63c64acSDon Brace } 4737b63c64acSDon Brace 473803383736SDon Brace if (fixup_ioaccel_cdb(cdb, &cdb_len)) { 473903383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4740c349775eSScott Teel return IO_ACCEL_INELIGIBLE; 474103383736SDon Brace } 474203383736SDon Brace 4743c349775eSScott Teel c->cmd_type = CMD_IOACCEL2; 4744c349775eSScott Teel /* Adjust the DMA address to point to the accelerated command buffer */ 4745c349775eSScott Teel c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle + 4746c349775eSScott Teel (c->cmdindex * sizeof(*cp)); 4747c349775eSScott Teel BUG_ON(c->busaddr & 0x0000007F); 4748c349775eSScott Teel 4749c349775eSScott Teel memset(cp, 0, sizeof(*cp)); 4750c349775eSScott Teel cp->IU_type = IOACCEL2_IU_TYPE; 4751c349775eSScott Teel 4752c349775eSScott Teel use_sg = scsi_dma_map(cmd); 475303383736SDon Brace if (use_sg < 0) { 475403383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4755c349775eSScott Teel return use_sg; 475603383736SDon Brace } 4757c349775eSScott Teel 4758c349775eSScott Teel if (use_sg) { 4759c349775eSScott Teel curr_sg = cp->sg; 4760d9a729f3SWebb Scales if (use_sg > h->ioaccel_maxsg) { 4761d9a729f3SWebb Scales addr64 = le64_to_cpu( 4762d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list[c->cmdindex]->address); 4763d9a729f3SWebb Scales curr_sg->address = cpu_to_le64(addr64); 4764d9a729f3SWebb Scales curr_sg->length = 0; 4765d9a729f3SWebb Scales curr_sg->reserved[0] = 0; 4766d9a729f3SWebb Scales curr_sg->reserved[1] = 0; 4767d9a729f3SWebb Scales curr_sg->reserved[2] = 0; 4768d9a729f3SWebb Scales curr_sg->chain_indicator = 0x80; 4769d9a729f3SWebb Scales 4770d9a729f3SWebb Scales curr_sg = h->ioaccel2_cmd_sg_list[c->cmdindex]; 4771d9a729f3SWebb Scales } 4772c349775eSScott Teel scsi_for_each_sg(cmd, sg, use_sg, i) { 4773c349775eSScott Teel addr64 = (u64) sg_dma_address(sg); 4774c349775eSScott Teel len = sg_dma_len(sg); 4775c349775eSScott Teel total_len += len; 4776c349775eSScott Teel curr_sg->address = cpu_to_le64(addr64); 4777c349775eSScott Teel curr_sg->length = cpu_to_le32(len); 4778c349775eSScott Teel curr_sg->reserved[0] = 0; 4779c349775eSScott Teel curr_sg->reserved[1] = 0; 4780c349775eSScott Teel curr_sg->reserved[2] = 0; 4781c349775eSScott Teel curr_sg->chain_indicator = 0; 4782c349775eSScott Teel curr_sg++; 4783c349775eSScott Teel } 4784c349775eSScott Teel 4785c349775eSScott Teel switch (cmd->sc_data_direction) { 4786c349775eSScott Teel case DMA_TO_DEVICE: 4787dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4788dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_DATA_OUT; 4789c349775eSScott Teel break; 4790c349775eSScott Teel case DMA_FROM_DEVICE: 4791dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4792dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_DATA_IN; 4793c349775eSScott Teel break; 4794c349775eSScott Teel case DMA_NONE: 4795dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4796dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_NO_DATA; 4797c349775eSScott Teel break; 4798c349775eSScott Teel default: 4799c349775eSScott Teel dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4800c349775eSScott Teel cmd->sc_data_direction); 4801c349775eSScott Teel BUG(); 4802c349775eSScott Teel break; 4803c349775eSScott Teel } 4804c349775eSScott Teel } else { 4805dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4806dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_NO_DATA; 4807c349775eSScott Teel } 4808dd0e19f3SScott Teel 4809dd0e19f3SScott Teel /* Set encryption parameters, if necessary */ 4810dd0e19f3SScott Teel set_encrypt_ioaccel2(h, c, cp); 4811dd0e19f3SScott Teel 48122b08b3e9SDon Brace cp->scsi_nexus = cpu_to_le32(ioaccel_handle); 4813f2405db8SDon Brace cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT); 4814c349775eSScott Teel memcpy(cp->cdb, cdb, sizeof(cp->cdb)); 4815c349775eSScott Teel 4816c349775eSScott Teel cp->data_len = cpu_to_le32(total_len); 4817c349775eSScott Teel cp->err_ptr = cpu_to_le64(c->busaddr + 4818c349775eSScott Teel offsetof(struct io_accel2_cmd, error_data)); 481950a0decfSStephen M. Cameron cp->err_len = cpu_to_le32(sizeof(cp->error_data)); 4820c349775eSScott Teel 4821d9a729f3SWebb Scales /* fill in sg elements */ 4822d9a729f3SWebb Scales if (use_sg > h->ioaccel_maxsg) { 4823d9a729f3SWebb Scales cp->sg_count = 1; 4824a736e9b6SDon Brace cp->sg[0].length = cpu_to_le32(use_sg * sizeof(cp->sg[0])); 4825d9a729f3SWebb Scales if (hpsa_map_ioaccel2_sg_chain_block(h, cp, c)) { 4826d9a729f3SWebb Scales atomic_dec(&phys_disk->ioaccel_cmds_out); 4827d9a729f3SWebb Scales scsi_dma_unmap(cmd); 4828d9a729f3SWebb Scales return -1; 4829d9a729f3SWebb Scales } 4830d9a729f3SWebb Scales } else 4831d9a729f3SWebb Scales cp->sg_count = (u8) use_sg; 4832d9a729f3SWebb Scales 4833c349775eSScott Teel enqueue_cmd_and_start_io(h, c); 4834c349775eSScott Teel return 0; 4835c349775eSScott Teel } 4836c349775eSScott Teel 4837c349775eSScott Teel /* 4838c349775eSScott Teel * Queue a command to the correct I/O accelerator path. 4839c349775eSScott Teel */ 4840c349775eSScott Teel static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h, 4841c349775eSScott Teel struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 484203383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4843c349775eSScott Teel { 484445e596cdSDon Brace if (!c->scsi_cmd->device) 484545e596cdSDon Brace return -1; 484645e596cdSDon Brace 484745e596cdSDon Brace if (!c->scsi_cmd->device->hostdata) 484845e596cdSDon Brace return -1; 484945e596cdSDon Brace 485003383736SDon Brace /* Try to honor the device's queue depth */ 485103383736SDon Brace if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) > 485203383736SDon Brace phys_disk->queue_depth) { 485303383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 485403383736SDon Brace return IO_ACCEL_INELIGIBLE; 485503383736SDon Brace } 4856c349775eSScott Teel if (h->transMethod & CFGTBL_Trans_io_accel1) 4857c349775eSScott Teel return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle, 485803383736SDon Brace cdb, cdb_len, scsi3addr, 485903383736SDon Brace phys_disk); 4860c349775eSScott Teel else 4861c349775eSScott Teel return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle, 486203383736SDon Brace cdb, cdb_len, scsi3addr, 486303383736SDon Brace phys_disk); 4864c349775eSScott Teel } 4865c349775eSScott Teel 48666b80b18fSScott Teel static void raid_map_helper(struct raid_map_data *map, 48676b80b18fSScott Teel int offload_to_mirror, u32 *map_index, u32 *current_group) 48686b80b18fSScott Teel { 48696b80b18fSScott Teel if (offload_to_mirror == 0) { 48706b80b18fSScott Teel /* use physical disk in the first mirrored group. */ 48712b08b3e9SDon Brace *map_index %= le16_to_cpu(map->data_disks_per_row); 48726b80b18fSScott Teel return; 48736b80b18fSScott Teel } 48746b80b18fSScott Teel do { 48756b80b18fSScott Teel /* determine mirror group that *map_index indicates */ 48762b08b3e9SDon Brace *current_group = *map_index / 48772b08b3e9SDon Brace le16_to_cpu(map->data_disks_per_row); 48786b80b18fSScott Teel if (offload_to_mirror == *current_group) 48796b80b18fSScott Teel continue; 48802b08b3e9SDon Brace if (*current_group < le16_to_cpu(map->layout_map_count) - 1) { 48816b80b18fSScott Teel /* select map index from next group */ 48822b08b3e9SDon Brace *map_index += le16_to_cpu(map->data_disks_per_row); 48836b80b18fSScott Teel (*current_group)++; 48846b80b18fSScott Teel } else { 48856b80b18fSScott Teel /* select map index from first group */ 48862b08b3e9SDon Brace *map_index %= le16_to_cpu(map->data_disks_per_row); 48876b80b18fSScott Teel *current_group = 0; 48886b80b18fSScott Teel } 48896b80b18fSScott Teel } while (offload_to_mirror != *current_group); 48906b80b18fSScott Teel } 48916b80b18fSScott Teel 4892283b4a9bSStephen M. Cameron /* 4893283b4a9bSStephen M. Cameron * Attempt to perform offload RAID mapping for a logical volume I/O. 4894283b4a9bSStephen M. Cameron */ 4895283b4a9bSStephen M. Cameron static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h, 4896283b4a9bSStephen M. Cameron struct CommandList *c) 4897283b4a9bSStephen M. Cameron { 4898283b4a9bSStephen M. Cameron struct scsi_cmnd *cmd = c->scsi_cmd; 4899283b4a9bSStephen M. Cameron struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4900283b4a9bSStephen M. Cameron struct raid_map_data *map = &dev->raid_map; 4901283b4a9bSStephen M. Cameron struct raid_map_disk_data *dd = &map->data[0]; 4902283b4a9bSStephen M. Cameron int is_write = 0; 4903283b4a9bSStephen M. Cameron u32 map_index; 4904283b4a9bSStephen M. Cameron u64 first_block, last_block; 4905283b4a9bSStephen M. Cameron u32 block_cnt; 4906283b4a9bSStephen M. Cameron u32 blocks_per_row; 4907283b4a9bSStephen M. Cameron u64 first_row, last_row; 4908283b4a9bSStephen M. Cameron u32 first_row_offset, last_row_offset; 4909283b4a9bSStephen M. Cameron u32 first_column, last_column; 49106b80b18fSScott Teel u64 r0_first_row, r0_last_row; 49116b80b18fSScott Teel u32 r5or6_blocks_per_row; 49126b80b18fSScott Teel u64 r5or6_first_row, r5or6_last_row; 49136b80b18fSScott Teel u32 r5or6_first_row_offset, r5or6_last_row_offset; 49146b80b18fSScott Teel u32 r5or6_first_column, r5or6_last_column; 49156b80b18fSScott Teel u32 total_disks_per_row; 49166b80b18fSScott Teel u32 stripesize; 49176b80b18fSScott Teel u32 first_group, last_group, current_group; 4918283b4a9bSStephen M. Cameron u32 map_row; 4919283b4a9bSStephen M. Cameron u32 disk_handle; 4920283b4a9bSStephen M. Cameron u64 disk_block; 4921283b4a9bSStephen M. Cameron u32 disk_block_cnt; 4922283b4a9bSStephen M. Cameron u8 cdb[16]; 4923283b4a9bSStephen M. Cameron u8 cdb_len; 49242b08b3e9SDon Brace u16 strip_size; 4925283b4a9bSStephen M. Cameron #if BITS_PER_LONG == 32 4926283b4a9bSStephen M. Cameron u64 tmpdiv; 4927283b4a9bSStephen M. Cameron #endif 49286b80b18fSScott Teel int offload_to_mirror; 4929283b4a9bSStephen M. Cameron 493045e596cdSDon Brace if (!dev) 493145e596cdSDon Brace return -1; 493245e596cdSDon Brace 4933283b4a9bSStephen M. Cameron /* check for valid opcode, get LBA and block count */ 4934283b4a9bSStephen M. Cameron switch (cmd->cmnd[0]) { 4935283b4a9bSStephen M. Cameron case WRITE_6: 4936283b4a9bSStephen M. Cameron is_write = 1; 4937283b4a9bSStephen M. Cameron case READ_6: 4938abbada71SMahesh Rajashekhara first_block = (((cmd->cmnd[1] & 0x1F) << 16) | 4939abbada71SMahesh Rajashekhara (cmd->cmnd[2] << 8) | 4940abbada71SMahesh Rajashekhara cmd->cmnd[3]); 4941283b4a9bSStephen M. Cameron block_cnt = cmd->cmnd[4]; 49423fa89a04SStephen M. Cameron if (block_cnt == 0) 49433fa89a04SStephen M. Cameron block_cnt = 256; 4944283b4a9bSStephen M. Cameron break; 4945283b4a9bSStephen M. Cameron case WRITE_10: 4946283b4a9bSStephen M. Cameron is_write = 1; 4947283b4a9bSStephen M. Cameron case READ_10: 4948283b4a9bSStephen M. Cameron first_block = 4949283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[2]) << 24) | 4950283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[3]) << 16) | 4951283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[4]) << 8) | 4952283b4a9bSStephen M. Cameron cmd->cmnd[5]; 4953283b4a9bSStephen M. Cameron block_cnt = 4954283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[7]) << 8) | 4955283b4a9bSStephen M. Cameron cmd->cmnd[8]; 4956283b4a9bSStephen M. Cameron break; 4957283b4a9bSStephen M. Cameron case WRITE_12: 4958283b4a9bSStephen M. Cameron is_write = 1; 4959283b4a9bSStephen M. Cameron case READ_12: 4960283b4a9bSStephen M. Cameron first_block = 4961283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[2]) << 24) | 4962283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[3]) << 16) | 4963283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[4]) << 8) | 4964283b4a9bSStephen M. Cameron cmd->cmnd[5]; 4965283b4a9bSStephen M. Cameron block_cnt = 4966283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[6]) << 24) | 4967283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[7]) << 16) | 4968283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[8]) << 8) | 4969283b4a9bSStephen M. Cameron cmd->cmnd[9]; 4970283b4a9bSStephen M. Cameron break; 4971283b4a9bSStephen M. Cameron case WRITE_16: 4972283b4a9bSStephen M. Cameron is_write = 1; 4973283b4a9bSStephen M. Cameron case READ_16: 4974283b4a9bSStephen M. Cameron first_block = 4975283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[2]) << 56) | 4976283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[3]) << 48) | 4977283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[4]) << 40) | 4978283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[5]) << 32) | 4979283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[6]) << 24) | 4980283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[7]) << 16) | 4981283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[8]) << 8) | 4982283b4a9bSStephen M. Cameron cmd->cmnd[9]; 4983283b4a9bSStephen M. Cameron block_cnt = 4984283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[10]) << 24) | 4985283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[11]) << 16) | 4986283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[12]) << 8) | 4987283b4a9bSStephen M. Cameron cmd->cmnd[13]; 4988283b4a9bSStephen M. Cameron break; 4989283b4a9bSStephen M. Cameron default: 4990283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */ 4991283b4a9bSStephen M. Cameron } 4992283b4a9bSStephen M. Cameron last_block = first_block + block_cnt - 1; 4993283b4a9bSStephen M. Cameron 4994283b4a9bSStephen M. Cameron /* check for write to non-RAID-0 */ 4995283b4a9bSStephen M. Cameron if (is_write && dev->raid_level != 0) 4996283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 4997283b4a9bSStephen M. Cameron 4998283b4a9bSStephen M. Cameron /* check for invalid block or wraparound */ 49992b08b3e9SDon Brace if (last_block >= le64_to_cpu(map->volume_blk_cnt) || 50002b08b3e9SDon Brace last_block < first_block) 5001283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 5002283b4a9bSStephen M. Cameron 5003283b4a9bSStephen M. Cameron /* calculate stripe information for the request */ 50042b08b3e9SDon Brace blocks_per_row = le16_to_cpu(map->data_disks_per_row) * 50052b08b3e9SDon Brace le16_to_cpu(map->strip_size); 50062b08b3e9SDon Brace strip_size = le16_to_cpu(map->strip_size); 5007283b4a9bSStephen M. Cameron #if BITS_PER_LONG == 32 5008283b4a9bSStephen M. Cameron tmpdiv = first_block; 5009283b4a9bSStephen M. Cameron (void) do_div(tmpdiv, blocks_per_row); 5010283b4a9bSStephen M. Cameron first_row = tmpdiv; 5011283b4a9bSStephen M. Cameron tmpdiv = last_block; 5012283b4a9bSStephen M. Cameron (void) do_div(tmpdiv, blocks_per_row); 5013283b4a9bSStephen M. Cameron last_row = tmpdiv; 5014283b4a9bSStephen M. Cameron first_row_offset = (u32) (first_block - (first_row * blocks_per_row)); 5015283b4a9bSStephen M. Cameron last_row_offset = (u32) (last_block - (last_row * blocks_per_row)); 5016283b4a9bSStephen M. Cameron tmpdiv = first_row_offset; 50172b08b3e9SDon Brace (void) do_div(tmpdiv, strip_size); 5018283b4a9bSStephen M. Cameron first_column = tmpdiv; 5019283b4a9bSStephen M. Cameron tmpdiv = last_row_offset; 50202b08b3e9SDon Brace (void) do_div(tmpdiv, strip_size); 5021283b4a9bSStephen M. Cameron last_column = tmpdiv; 5022283b4a9bSStephen M. Cameron #else 5023283b4a9bSStephen M. Cameron first_row = first_block / blocks_per_row; 5024283b4a9bSStephen M. Cameron last_row = last_block / blocks_per_row; 5025283b4a9bSStephen M. Cameron first_row_offset = (u32) (first_block - (first_row * blocks_per_row)); 5026283b4a9bSStephen M. Cameron last_row_offset = (u32) (last_block - (last_row * blocks_per_row)); 50272b08b3e9SDon Brace first_column = first_row_offset / strip_size; 50282b08b3e9SDon Brace last_column = last_row_offset / strip_size; 5029283b4a9bSStephen M. Cameron #endif 5030283b4a9bSStephen M. Cameron 5031283b4a9bSStephen M. Cameron /* if this isn't a single row/column then give to the controller */ 5032283b4a9bSStephen M. Cameron if ((first_row != last_row) || (first_column != last_column)) 5033283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 5034283b4a9bSStephen M. Cameron 5035283b4a9bSStephen M. Cameron /* proceeding with driver mapping */ 50362b08b3e9SDon Brace total_disks_per_row = le16_to_cpu(map->data_disks_per_row) + 50372b08b3e9SDon Brace le16_to_cpu(map->metadata_disks_per_row); 5038283b4a9bSStephen M. Cameron map_row = ((u32)(first_row >> map->parity_rotation_shift)) % 50392b08b3e9SDon Brace le16_to_cpu(map->row_cnt); 50406b80b18fSScott Teel map_index = (map_row * total_disks_per_row) + first_column; 50416b80b18fSScott Teel 50426b80b18fSScott Teel switch (dev->raid_level) { 50436b80b18fSScott Teel case HPSA_RAID_0: 50446b80b18fSScott Teel break; /* nothing special to do */ 50456b80b18fSScott Teel case HPSA_RAID_1: 50466b80b18fSScott Teel /* Handles load balance across RAID 1 members. 50476b80b18fSScott Teel * (2-drive R1 and R10 with even # of drives.) 50486b80b18fSScott Teel * Appropriate for SSDs, not optimal for HDDs 5049283b4a9bSStephen M. Cameron */ 50502b08b3e9SDon Brace BUG_ON(le16_to_cpu(map->layout_map_count) != 2); 5051283b4a9bSStephen M. Cameron if (dev->offload_to_mirror) 50522b08b3e9SDon Brace map_index += le16_to_cpu(map->data_disks_per_row); 5053283b4a9bSStephen M. Cameron dev->offload_to_mirror = !dev->offload_to_mirror; 50546b80b18fSScott Teel break; 50556b80b18fSScott Teel case HPSA_RAID_ADM: 50566b80b18fSScott Teel /* Handles N-way mirrors (R1-ADM) 50576b80b18fSScott Teel * and R10 with # of drives divisible by 3.) 50586b80b18fSScott Teel */ 50592b08b3e9SDon Brace BUG_ON(le16_to_cpu(map->layout_map_count) != 3); 50606b80b18fSScott Teel 50616b80b18fSScott Teel offload_to_mirror = dev->offload_to_mirror; 50626b80b18fSScott Teel raid_map_helper(map, offload_to_mirror, 50636b80b18fSScott Teel &map_index, ¤t_group); 50646b80b18fSScott Teel /* set mirror group to use next time */ 50656b80b18fSScott Teel offload_to_mirror = 50662b08b3e9SDon Brace (offload_to_mirror >= 50672b08b3e9SDon Brace le16_to_cpu(map->layout_map_count) - 1) 50686b80b18fSScott Teel ? 0 : offload_to_mirror + 1; 50696b80b18fSScott Teel dev->offload_to_mirror = offload_to_mirror; 50706b80b18fSScott Teel /* Avoid direct use of dev->offload_to_mirror within this 50716b80b18fSScott Teel * function since multiple threads might simultaneously 50726b80b18fSScott Teel * increment it beyond the range of dev->layout_map_count -1. 50736b80b18fSScott Teel */ 50746b80b18fSScott Teel break; 50756b80b18fSScott Teel case HPSA_RAID_5: 50766b80b18fSScott Teel case HPSA_RAID_6: 50772b08b3e9SDon Brace if (le16_to_cpu(map->layout_map_count) <= 1) 50786b80b18fSScott Teel break; 50796b80b18fSScott Teel 50806b80b18fSScott Teel /* Verify first and last block are in same RAID group */ 50816b80b18fSScott Teel r5or6_blocks_per_row = 50822b08b3e9SDon Brace le16_to_cpu(map->strip_size) * 50832b08b3e9SDon Brace le16_to_cpu(map->data_disks_per_row); 50846b80b18fSScott Teel BUG_ON(r5or6_blocks_per_row == 0); 50852b08b3e9SDon Brace stripesize = r5or6_blocks_per_row * 50862b08b3e9SDon Brace le16_to_cpu(map->layout_map_count); 50876b80b18fSScott Teel #if BITS_PER_LONG == 32 50886b80b18fSScott Teel tmpdiv = first_block; 50896b80b18fSScott Teel first_group = do_div(tmpdiv, stripesize); 50906b80b18fSScott Teel tmpdiv = first_group; 50916b80b18fSScott Teel (void) do_div(tmpdiv, r5or6_blocks_per_row); 50926b80b18fSScott Teel first_group = tmpdiv; 50936b80b18fSScott Teel tmpdiv = last_block; 50946b80b18fSScott Teel last_group = do_div(tmpdiv, stripesize); 50956b80b18fSScott Teel tmpdiv = last_group; 50966b80b18fSScott Teel (void) do_div(tmpdiv, r5or6_blocks_per_row); 50976b80b18fSScott Teel last_group = tmpdiv; 50986b80b18fSScott Teel #else 50996b80b18fSScott Teel first_group = (first_block % stripesize) / r5or6_blocks_per_row; 51006b80b18fSScott Teel last_group = (last_block % stripesize) / r5or6_blocks_per_row; 51016b80b18fSScott Teel #endif 5102000ff7c2SStephen M. Cameron if (first_group != last_group) 51036b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 51046b80b18fSScott Teel 51056b80b18fSScott Teel /* Verify request is in a single row of RAID 5/6 */ 51066b80b18fSScott Teel #if BITS_PER_LONG == 32 51076b80b18fSScott Teel tmpdiv = first_block; 51086b80b18fSScott Teel (void) do_div(tmpdiv, stripesize); 51096b80b18fSScott Teel first_row = r5or6_first_row = r0_first_row = tmpdiv; 51106b80b18fSScott Teel tmpdiv = last_block; 51116b80b18fSScott Teel (void) do_div(tmpdiv, stripesize); 51126b80b18fSScott Teel r5or6_last_row = r0_last_row = tmpdiv; 51136b80b18fSScott Teel #else 51146b80b18fSScott Teel first_row = r5or6_first_row = r0_first_row = 51156b80b18fSScott Teel first_block / stripesize; 51166b80b18fSScott Teel r5or6_last_row = r0_last_row = last_block / stripesize; 51176b80b18fSScott Teel #endif 51186b80b18fSScott Teel if (r5or6_first_row != r5or6_last_row) 51196b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 51206b80b18fSScott Teel 51216b80b18fSScott Teel 51226b80b18fSScott Teel /* Verify request is in a single column */ 51236b80b18fSScott Teel #if BITS_PER_LONG == 32 51246b80b18fSScott Teel tmpdiv = first_block; 51256b80b18fSScott Teel first_row_offset = do_div(tmpdiv, stripesize); 51266b80b18fSScott Teel tmpdiv = first_row_offset; 51276b80b18fSScott Teel first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row); 51286b80b18fSScott Teel r5or6_first_row_offset = first_row_offset; 51296b80b18fSScott Teel tmpdiv = last_block; 51306b80b18fSScott Teel r5or6_last_row_offset = do_div(tmpdiv, stripesize); 51316b80b18fSScott Teel tmpdiv = r5or6_last_row_offset; 51326b80b18fSScott Teel r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row); 51336b80b18fSScott Teel tmpdiv = r5or6_first_row_offset; 51346b80b18fSScott Teel (void) do_div(tmpdiv, map->strip_size); 51356b80b18fSScott Teel first_column = r5or6_first_column = tmpdiv; 51366b80b18fSScott Teel tmpdiv = r5or6_last_row_offset; 51376b80b18fSScott Teel (void) do_div(tmpdiv, map->strip_size); 51386b80b18fSScott Teel r5or6_last_column = tmpdiv; 51396b80b18fSScott Teel #else 51406b80b18fSScott Teel first_row_offset = r5or6_first_row_offset = 51416b80b18fSScott Teel (u32)((first_block % stripesize) % 51426b80b18fSScott Teel r5or6_blocks_per_row); 51436b80b18fSScott Teel 51446b80b18fSScott Teel r5or6_last_row_offset = 51456b80b18fSScott Teel (u32)((last_block % stripesize) % 51466b80b18fSScott Teel r5or6_blocks_per_row); 51476b80b18fSScott Teel 51486b80b18fSScott Teel first_column = r5or6_first_column = 51492b08b3e9SDon Brace r5or6_first_row_offset / le16_to_cpu(map->strip_size); 51506b80b18fSScott Teel r5or6_last_column = 51512b08b3e9SDon Brace r5or6_last_row_offset / le16_to_cpu(map->strip_size); 51526b80b18fSScott Teel #endif 51536b80b18fSScott Teel if (r5or6_first_column != r5or6_last_column) 51546b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 51556b80b18fSScott Teel 51566b80b18fSScott Teel /* Request is eligible */ 51576b80b18fSScott Teel map_row = ((u32)(first_row >> map->parity_rotation_shift)) % 51582b08b3e9SDon Brace le16_to_cpu(map->row_cnt); 51596b80b18fSScott Teel 51606b80b18fSScott Teel map_index = (first_group * 51612b08b3e9SDon Brace (le16_to_cpu(map->row_cnt) * total_disks_per_row)) + 51626b80b18fSScott Teel (map_row * total_disks_per_row) + first_column; 51636b80b18fSScott Teel break; 51646b80b18fSScott Teel default: 51656b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 5166283b4a9bSStephen M. Cameron } 51676b80b18fSScott Teel 516807543e0cSStephen Cameron if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES)) 516907543e0cSStephen Cameron return IO_ACCEL_INELIGIBLE; 517007543e0cSStephen Cameron 517103383736SDon Brace c->phys_disk = dev->phys_disk[map_index]; 5172c3390df4SDon Brace if (!c->phys_disk) 5173c3390df4SDon Brace return IO_ACCEL_INELIGIBLE; 517403383736SDon Brace 5175283b4a9bSStephen M. Cameron disk_handle = dd[map_index].ioaccel_handle; 51762b08b3e9SDon Brace disk_block = le64_to_cpu(map->disk_starting_blk) + 51772b08b3e9SDon Brace first_row * le16_to_cpu(map->strip_size) + 51782b08b3e9SDon Brace (first_row_offset - first_column * 51792b08b3e9SDon Brace le16_to_cpu(map->strip_size)); 5180283b4a9bSStephen M. Cameron disk_block_cnt = block_cnt; 5181283b4a9bSStephen M. Cameron 5182283b4a9bSStephen M. Cameron /* handle differing logical/physical block sizes */ 5183283b4a9bSStephen M. Cameron if (map->phys_blk_shift) { 5184283b4a9bSStephen M. Cameron disk_block <<= map->phys_blk_shift; 5185283b4a9bSStephen M. Cameron disk_block_cnt <<= map->phys_blk_shift; 5186283b4a9bSStephen M. Cameron } 5187283b4a9bSStephen M. Cameron BUG_ON(disk_block_cnt > 0xffff); 5188283b4a9bSStephen M. Cameron 5189283b4a9bSStephen M. Cameron /* build the new CDB for the physical disk I/O */ 5190283b4a9bSStephen M. Cameron if (disk_block > 0xffffffff) { 5191283b4a9bSStephen M. Cameron cdb[0] = is_write ? WRITE_16 : READ_16; 5192283b4a9bSStephen M. Cameron cdb[1] = 0; 5193283b4a9bSStephen M. Cameron cdb[2] = (u8) (disk_block >> 56); 5194283b4a9bSStephen M. Cameron cdb[3] = (u8) (disk_block >> 48); 5195283b4a9bSStephen M. Cameron cdb[4] = (u8) (disk_block >> 40); 5196283b4a9bSStephen M. Cameron cdb[5] = (u8) (disk_block >> 32); 5197283b4a9bSStephen M. Cameron cdb[6] = (u8) (disk_block >> 24); 5198283b4a9bSStephen M. Cameron cdb[7] = (u8) (disk_block >> 16); 5199283b4a9bSStephen M. Cameron cdb[8] = (u8) (disk_block >> 8); 5200283b4a9bSStephen M. Cameron cdb[9] = (u8) (disk_block); 5201283b4a9bSStephen M. Cameron cdb[10] = (u8) (disk_block_cnt >> 24); 5202283b4a9bSStephen M. Cameron cdb[11] = (u8) (disk_block_cnt >> 16); 5203283b4a9bSStephen M. Cameron cdb[12] = (u8) (disk_block_cnt >> 8); 5204283b4a9bSStephen M. Cameron cdb[13] = (u8) (disk_block_cnt); 5205283b4a9bSStephen M. Cameron cdb[14] = 0; 5206283b4a9bSStephen M. Cameron cdb[15] = 0; 5207283b4a9bSStephen M. Cameron cdb_len = 16; 5208283b4a9bSStephen M. Cameron } else { 5209283b4a9bSStephen M. Cameron cdb[0] = is_write ? WRITE_10 : READ_10; 5210283b4a9bSStephen M. Cameron cdb[1] = 0; 5211283b4a9bSStephen M. Cameron cdb[2] = (u8) (disk_block >> 24); 5212283b4a9bSStephen M. Cameron cdb[3] = (u8) (disk_block >> 16); 5213283b4a9bSStephen M. Cameron cdb[4] = (u8) (disk_block >> 8); 5214283b4a9bSStephen M. Cameron cdb[5] = (u8) (disk_block); 5215283b4a9bSStephen M. Cameron cdb[6] = 0; 5216283b4a9bSStephen M. Cameron cdb[7] = (u8) (disk_block_cnt >> 8); 5217283b4a9bSStephen M. Cameron cdb[8] = (u8) (disk_block_cnt); 5218283b4a9bSStephen M. Cameron cdb[9] = 0; 5219283b4a9bSStephen M. Cameron cdb_len = 10; 5220283b4a9bSStephen M. Cameron } 5221283b4a9bSStephen M. Cameron return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len, 522203383736SDon Brace dev->scsi3addr, 522303383736SDon Brace dev->phys_disk[map_index]); 5224283b4a9bSStephen M. Cameron } 5225283b4a9bSStephen M. Cameron 522625163bd5SWebb Scales /* 522725163bd5SWebb Scales * Submit commands down the "normal" RAID stack path 522825163bd5SWebb Scales * All callers to hpsa_ciss_submit must check lockup_detected 522925163bd5SWebb Scales * beforehand, before (opt.) and after calling cmd_alloc 523025163bd5SWebb Scales */ 5231574f05d3SStephen Cameron static int hpsa_ciss_submit(struct ctlr_info *h, 5232574f05d3SStephen Cameron struct CommandList *c, struct scsi_cmnd *cmd, 5233574f05d3SStephen Cameron unsigned char scsi3addr[]) 5234edd16368SStephen M. Cameron { 5235edd16368SStephen M. Cameron cmd->host_scribble = (unsigned char *) c; 5236edd16368SStephen M. Cameron c->cmd_type = CMD_SCSI; 5237edd16368SStephen M. Cameron c->scsi_cmd = cmd; 5238edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; /* unused in simple mode */ 5239edd16368SStephen M. Cameron memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8); 5240f2405db8SDon Brace c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT)); 5241edd16368SStephen M. Cameron 5242edd16368SStephen M. Cameron /* Fill in the request block... */ 5243edd16368SStephen M. Cameron 5244edd16368SStephen M. Cameron c->Request.Timeout = 0; 5245edd16368SStephen M. Cameron BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB)); 5246edd16368SStephen M. Cameron c->Request.CDBLen = cmd->cmd_len; 5247edd16368SStephen M. Cameron memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len); 5248edd16368SStephen M. Cameron switch (cmd->sc_data_direction) { 5249edd16368SStephen M. Cameron case DMA_TO_DEVICE: 5250a505b86fSStephen M. Cameron c->Request.type_attr_dir = 5251a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE); 5252edd16368SStephen M. Cameron break; 5253edd16368SStephen M. Cameron case DMA_FROM_DEVICE: 5254a505b86fSStephen M. Cameron c->Request.type_attr_dir = 5255a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ); 5256edd16368SStephen M. Cameron break; 5257edd16368SStephen M. Cameron case DMA_NONE: 5258a505b86fSStephen M. Cameron c->Request.type_attr_dir = 5259a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE); 5260edd16368SStephen M. Cameron break; 5261edd16368SStephen M. Cameron case DMA_BIDIRECTIONAL: 5262edd16368SStephen M. Cameron /* This can happen if a buggy application does a scsi passthru 5263edd16368SStephen M. Cameron * and sets both inlen and outlen to non-zero. ( see 5264edd16368SStephen M. Cameron * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() ) 5265edd16368SStephen M. Cameron */ 5266edd16368SStephen M. Cameron 5267a505b86fSStephen M. Cameron c->Request.type_attr_dir = 5268a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD); 5269edd16368SStephen M. Cameron /* This is technically wrong, and hpsa controllers should 5270edd16368SStephen M. Cameron * reject it with CMD_INVALID, which is the most correct 5271edd16368SStephen M. Cameron * response, but non-fibre backends appear to let it 5272edd16368SStephen M. Cameron * slide by, and give the same results as if this field 5273edd16368SStephen M. Cameron * were set correctly. Either way is acceptable for 5274edd16368SStephen M. Cameron * our purposes here. 5275edd16368SStephen M. Cameron */ 5276edd16368SStephen M. Cameron 5277edd16368SStephen M. Cameron break; 5278edd16368SStephen M. Cameron 5279edd16368SStephen M. Cameron default: 5280edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "unknown data direction: %d\n", 5281edd16368SStephen M. Cameron cmd->sc_data_direction); 5282edd16368SStephen M. Cameron BUG(); 5283edd16368SStephen M. Cameron break; 5284edd16368SStephen M. Cameron } 5285edd16368SStephen M. Cameron 528633a2ffceSStephen M. Cameron if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */ 528773153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 5288edd16368SStephen M. Cameron return SCSI_MLQUEUE_HOST_BUSY; 5289edd16368SStephen M. Cameron } 5290edd16368SStephen M. Cameron enqueue_cmd_and_start_io(h, c); 5291edd16368SStephen M. Cameron /* the cmd'll come back via intr handler in complete_scsi_command() */ 5292edd16368SStephen M. Cameron return 0; 5293edd16368SStephen M. Cameron } 5294edd16368SStephen M. Cameron 5295360c73bdSStephen Cameron static void hpsa_cmd_init(struct ctlr_info *h, int index, 5296360c73bdSStephen Cameron struct CommandList *c) 5297360c73bdSStephen Cameron { 5298360c73bdSStephen Cameron dma_addr_t cmd_dma_handle, err_dma_handle; 5299360c73bdSStephen Cameron 5300360c73bdSStephen Cameron /* Zero out all of commandlist except the last field, refcount */ 5301360c73bdSStephen Cameron memset(c, 0, offsetof(struct CommandList, refcount)); 5302360c73bdSStephen Cameron c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT)); 5303360c73bdSStephen Cameron cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c); 5304360c73bdSStephen Cameron c->err_info = h->errinfo_pool + index; 5305360c73bdSStephen Cameron memset(c->err_info, 0, sizeof(*c->err_info)); 5306360c73bdSStephen Cameron err_dma_handle = h->errinfo_pool_dhandle 5307360c73bdSStephen Cameron + index * sizeof(*c->err_info); 5308360c73bdSStephen Cameron c->cmdindex = index; 5309360c73bdSStephen Cameron c->busaddr = (u32) cmd_dma_handle; 5310360c73bdSStephen Cameron c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle); 5311360c73bdSStephen Cameron c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info)); 5312360c73bdSStephen Cameron c->h = h; 5313a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_IDLE; 5314360c73bdSStephen Cameron } 5315360c73bdSStephen Cameron 5316360c73bdSStephen Cameron static void hpsa_preinitialize_commands(struct ctlr_info *h) 5317360c73bdSStephen Cameron { 5318360c73bdSStephen Cameron int i; 5319360c73bdSStephen Cameron 5320360c73bdSStephen Cameron for (i = 0; i < h->nr_cmds; i++) { 5321360c73bdSStephen Cameron struct CommandList *c = h->cmd_pool + i; 5322360c73bdSStephen Cameron 5323360c73bdSStephen Cameron hpsa_cmd_init(h, i, c); 5324360c73bdSStephen Cameron atomic_set(&c->refcount, 0); 5325360c73bdSStephen Cameron } 5326360c73bdSStephen Cameron } 5327360c73bdSStephen Cameron 5328360c73bdSStephen Cameron static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index, 5329360c73bdSStephen Cameron struct CommandList *c) 5330360c73bdSStephen Cameron { 5331360c73bdSStephen Cameron dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c); 5332360c73bdSStephen Cameron 533373153fe5SWebb Scales BUG_ON(c->cmdindex != index); 533473153fe5SWebb Scales 5335360c73bdSStephen Cameron memset(c->Request.CDB, 0, sizeof(c->Request.CDB)); 5336360c73bdSStephen Cameron memset(c->err_info, 0, sizeof(*c->err_info)); 5337360c73bdSStephen Cameron c->busaddr = (u32) cmd_dma_handle; 5338360c73bdSStephen Cameron } 5339360c73bdSStephen Cameron 5340592a0ad5SWebb Scales static int hpsa_ioaccel_submit(struct ctlr_info *h, 5341592a0ad5SWebb Scales struct CommandList *c, struct scsi_cmnd *cmd, 5342592a0ad5SWebb Scales unsigned char *scsi3addr) 5343592a0ad5SWebb Scales { 5344592a0ad5SWebb Scales struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 5345592a0ad5SWebb Scales int rc = IO_ACCEL_INELIGIBLE; 5346592a0ad5SWebb Scales 534745e596cdSDon Brace if (!dev) 534845e596cdSDon Brace return SCSI_MLQUEUE_HOST_BUSY; 534945e596cdSDon Brace 5350592a0ad5SWebb Scales cmd->host_scribble = (unsigned char *) c; 5351592a0ad5SWebb Scales 5352592a0ad5SWebb Scales if (dev->offload_enabled) { 5353592a0ad5SWebb Scales hpsa_cmd_init(h, c->cmdindex, c); 5354592a0ad5SWebb Scales c->cmd_type = CMD_SCSI; 5355592a0ad5SWebb Scales c->scsi_cmd = cmd; 5356592a0ad5SWebb Scales rc = hpsa_scsi_ioaccel_raid_map(h, c); 5357592a0ad5SWebb Scales if (rc < 0) /* scsi_dma_map failed. */ 5358592a0ad5SWebb Scales rc = SCSI_MLQUEUE_HOST_BUSY; 5359a3144e0bSJoe Handzik } else if (dev->hba_ioaccel_enabled) { 5360592a0ad5SWebb Scales hpsa_cmd_init(h, c->cmdindex, c); 5361592a0ad5SWebb Scales c->cmd_type = CMD_SCSI; 5362592a0ad5SWebb Scales c->scsi_cmd = cmd; 5363592a0ad5SWebb Scales rc = hpsa_scsi_ioaccel_direct_map(h, c); 5364592a0ad5SWebb Scales if (rc < 0) /* scsi_dma_map failed. */ 5365592a0ad5SWebb Scales rc = SCSI_MLQUEUE_HOST_BUSY; 5366592a0ad5SWebb Scales } 5367592a0ad5SWebb Scales return rc; 5368592a0ad5SWebb Scales } 5369592a0ad5SWebb Scales 5370080ef1ccSDon Brace static void hpsa_command_resubmit_worker(struct work_struct *work) 5371080ef1ccSDon Brace { 5372080ef1ccSDon Brace struct scsi_cmnd *cmd; 5373080ef1ccSDon Brace struct hpsa_scsi_dev_t *dev; 53748a0ff92cSWebb Scales struct CommandList *c = container_of(work, struct CommandList, work); 5375080ef1ccSDon Brace 5376080ef1ccSDon Brace cmd = c->scsi_cmd; 5377080ef1ccSDon Brace dev = cmd->device->hostdata; 5378080ef1ccSDon Brace if (!dev) { 5379080ef1ccSDon Brace cmd->result = DID_NO_CONNECT << 16; 53808a0ff92cSWebb Scales return hpsa_cmd_free_and_done(c->h, c, cmd); 5381080ef1ccSDon Brace } 5382d604f533SWebb Scales if (c->reset_pending) 5383d2315ce6SDon Brace return hpsa_cmd_free_and_done(c->h, c, cmd); 5384592a0ad5SWebb Scales if (c->cmd_type == CMD_IOACCEL2) { 5385592a0ad5SWebb Scales struct ctlr_info *h = c->h; 5386592a0ad5SWebb Scales struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 5387592a0ad5SWebb Scales int rc; 5388592a0ad5SWebb Scales 5389592a0ad5SWebb Scales if (c2->error_data.serv_response == 5390592a0ad5SWebb Scales IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL) { 5391592a0ad5SWebb Scales rc = hpsa_ioaccel_submit(h, c, cmd, dev->scsi3addr); 5392592a0ad5SWebb Scales if (rc == 0) 5393592a0ad5SWebb Scales return; 5394592a0ad5SWebb Scales if (rc == SCSI_MLQUEUE_HOST_BUSY) { 5395592a0ad5SWebb Scales /* 5396592a0ad5SWebb Scales * If we get here, it means dma mapping failed. 5397592a0ad5SWebb Scales * Try again via scsi mid layer, which will 5398592a0ad5SWebb Scales * then get SCSI_MLQUEUE_HOST_BUSY. 5399592a0ad5SWebb Scales */ 5400592a0ad5SWebb Scales cmd->result = DID_IMM_RETRY << 16; 54018a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, c, cmd); 5402592a0ad5SWebb Scales } 5403592a0ad5SWebb Scales /* else, fall thru and resubmit down CISS path */ 5404592a0ad5SWebb Scales } 5405592a0ad5SWebb Scales } 5406360c73bdSStephen Cameron hpsa_cmd_partial_init(c->h, c->cmdindex, c); 5407080ef1ccSDon Brace if (hpsa_ciss_submit(c->h, c, cmd, dev->scsi3addr)) { 5408080ef1ccSDon Brace /* 5409080ef1ccSDon Brace * If we get here, it means dma mapping failed. Try 5410080ef1ccSDon Brace * again via scsi mid layer, which will then get 5411080ef1ccSDon Brace * SCSI_MLQUEUE_HOST_BUSY. 5412592a0ad5SWebb Scales * 5413592a0ad5SWebb Scales * hpsa_ciss_submit will have already freed c 5414592a0ad5SWebb Scales * if it encountered a dma mapping failure. 5415080ef1ccSDon Brace */ 5416080ef1ccSDon Brace cmd->result = DID_IMM_RETRY << 16; 5417080ef1ccSDon Brace cmd->scsi_done(cmd); 5418080ef1ccSDon Brace } 5419080ef1ccSDon Brace } 5420080ef1ccSDon Brace 5421574f05d3SStephen Cameron /* Running in struct Scsi_Host->host_lock less mode */ 5422574f05d3SStephen Cameron static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd) 5423574f05d3SStephen Cameron { 5424574f05d3SStephen Cameron struct ctlr_info *h; 5425574f05d3SStephen Cameron struct hpsa_scsi_dev_t *dev; 5426574f05d3SStephen Cameron unsigned char scsi3addr[8]; 5427574f05d3SStephen Cameron struct CommandList *c; 5428574f05d3SStephen Cameron int rc = 0; 5429574f05d3SStephen Cameron 5430574f05d3SStephen Cameron /* Get the ptr to our adapter structure out of cmd->host. */ 5431574f05d3SStephen Cameron h = sdev_to_hba(cmd->device); 543273153fe5SWebb Scales 543373153fe5SWebb Scales BUG_ON(cmd->request->tag < 0); 543473153fe5SWebb Scales 5435574f05d3SStephen Cameron dev = cmd->device->hostdata; 5436574f05d3SStephen Cameron if (!dev) { 54371ccde700SHannes Reinecke cmd->result = DID_NO_CONNECT << 16; 5438ba74fdc4SDon Brace cmd->scsi_done(cmd); 5439ba74fdc4SDon Brace return 0; 5440ba74fdc4SDon Brace } 5441ba74fdc4SDon Brace 5442ba74fdc4SDon Brace if (dev->removed) { 5443574f05d3SStephen Cameron cmd->result = DID_NO_CONNECT << 16; 5444574f05d3SStephen Cameron cmd->scsi_done(cmd); 5445574f05d3SStephen Cameron return 0; 5446574f05d3SStephen Cameron } 544773153fe5SWebb Scales 5448574f05d3SStephen Cameron memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr)); 5449574f05d3SStephen Cameron 5450574f05d3SStephen Cameron if (unlikely(lockup_detected(h))) { 545125163bd5SWebb Scales cmd->result = DID_NO_CONNECT << 16; 5452574f05d3SStephen Cameron cmd->scsi_done(cmd); 5453574f05d3SStephen Cameron return 0; 5454574f05d3SStephen Cameron } 545573153fe5SWebb Scales c = cmd_tagged_alloc(h, cmd); 5456574f05d3SStephen Cameron 5457407863cbSStephen Cameron /* 5458407863cbSStephen Cameron * Call alternate submit routine for I/O accelerated commands. 5459574f05d3SStephen Cameron * Retries always go down the normal I/O path. 5460574f05d3SStephen Cameron */ 5461574f05d3SStephen Cameron if (likely(cmd->retries == 0 && 546257292b58SChristoph Hellwig !blk_rq_is_passthrough(cmd->request) && 5463574f05d3SStephen Cameron h->acciopath_status)) { 5464592a0ad5SWebb Scales rc = hpsa_ioaccel_submit(h, c, cmd, scsi3addr); 5465574f05d3SStephen Cameron if (rc == 0) 5466592a0ad5SWebb Scales return 0; 5467592a0ad5SWebb Scales if (rc == SCSI_MLQUEUE_HOST_BUSY) { 546873153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 5469574f05d3SStephen Cameron return SCSI_MLQUEUE_HOST_BUSY; 5470574f05d3SStephen Cameron } 5471574f05d3SStephen Cameron } 5472574f05d3SStephen Cameron return hpsa_ciss_submit(h, c, cmd, scsi3addr); 5473574f05d3SStephen Cameron } 5474574f05d3SStephen Cameron 54758ebc9248SWebb Scales static void hpsa_scan_complete(struct ctlr_info *h) 54765f389360SStephen M. Cameron { 54775f389360SStephen M. Cameron unsigned long flags; 54785f389360SStephen M. Cameron 54795f389360SStephen M. Cameron spin_lock_irqsave(&h->scan_lock, flags); 54805f389360SStephen M. Cameron h->scan_finished = 1; 548187b9e6aaSDon Brace wake_up(&h->scan_wait_queue); 54825f389360SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 54835f389360SStephen M. Cameron } 54845f389360SStephen M. Cameron 5485a08a8471SStephen M. Cameron static void hpsa_scan_start(struct Scsi_Host *sh) 5486a08a8471SStephen M. Cameron { 5487a08a8471SStephen M. Cameron struct ctlr_info *h = shost_to_hba(sh); 5488a08a8471SStephen M. Cameron unsigned long flags; 5489a08a8471SStephen M. Cameron 54908ebc9248SWebb Scales /* 54918ebc9248SWebb Scales * Don't let rescans be initiated on a controller known to be locked 54928ebc9248SWebb Scales * up. If the controller locks up *during* a rescan, that thread is 54938ebc9248SWebb Scales * probably hosed, but at least we can prevent new rescan threads from 54948ebc9248SWebb Scales * piling up on a locked up controller. 54958ebc9248SWebb Scales */ 54968ebc9248SWebb Scales if (unlikely(lockup_detected(h))) 54978ebc9248SWebb Scales return hpsa_scan_complete(h); 54985f389360SStephen M. Cameron 549987b9e6aaSDon Brace /* 550087b9e6aaSDon Brace * If a scan is already waiting to run, no need to add another 550187b9e6aaSDon Brace */ 550287b9e6aaSDon Brace spin_lock_irqsave(&h->scan_lock, flags); 550387b9e6aaSDon Brace if (h->scan_waiting) { 550487b9e6aaSDon Brace spin_unlock_irqrestore(&h->scan_lock, flags); 550587b9e6aaSDon Brace return; 550687b9e6aaSDon Brace } 550787b9e6aaSDon Brace 550887b9e6aaSDon Brace spin_unlock_irqrestore(&h->scan_lock, flags); 550987b9e6aaSDon Brace 5510a08a8471SStephen M. Cameron /* wait until any scan already in progress is finished. */ 5511a08a8471SStephen M. Cameron while (1) { 5512a08a8471SStephen M. Cameron spin_lock_irqsave(&h->scan_lock, flags); 5513a08a8471SStephen M. Cameron if (h->scan_finished) 5514a08a8471SStephen M. Cameron break; 551587b9e6aaSDon Brace h->scan_waiting = 1; 5516a08a8471SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 5517a08a8471SStephen M. Cameron wait_event(h->scan_wait_queue, h->scan_finished); 5518a08a8471SStephen M. Cameron /* Note: We don't need to worry about a race between this 5519a08a8471SStephen M. Cameron * thread and driver unload because the midlayer will 5520a08a8471SStephen M. Cameron * have incremented the reference count, so unload won't 5521a08a8471SStephen M. Cameron * happen if we're in here. 5522a08a8471SStephen M. Cameron */ 5523a08a8471SStephen M. Cameron } 5524a08a8471SStephen M. Cameron h->scan_finished = 0; /* mark scan as in progress */ 552587b9e6aaSDon Brace h->scan_waiting = 0; 5526a08a8471SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 5527a08a8471SStephen M. Cameron 55288ebc9248SWebb Scales if (unlikely(lockup_detected(h))) 55298ebc9248SWebb Scales return hpsa_scan_complete(h); 55305f389360SStephen M. Cameron 5531bfd7546cSDon Brace /* 5532bfd7546cSDon Brace * Do the scan after a reset completion 5533bfd7546cSDon Brace */ 5534c59d04f3SDon Brace spin_lock_irqsave(&h->reset_lock, flags); 5535bfd7546cSDon Brace if (h->reset_in_progress) { 5536bfd7546cSDon Brace h->drv_req_rescan = 1; 5537c59d04f3SDon Brace spin_unlock_irqrestore(&h->reset_lock, flags); 55383b476aa2SDon Brace hpsa_scan_complete(h); 5539bfd7546cSDon Brace return; 5540bfd7546cSDon Brace } 5541c59d04f3SDon Brace spin_unlock_irqrestore(&h->reset_lock, flags); 5542bfd7546cSDon Brace 55438aa60681SDon Brace hpsa_update_scsi_devices(h); 5544a08a8471SStephen M. Cameron 55458ebc9248SWebb Scales hpsa_scan_complete(h); 5546a08a8471SStephen M. Cameron } 5547a08a8471SStephen M. Cameron 55487c0a0229SDon Brace static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth) 55497c0a0229SDon Brace { 555003383736SDon Brace struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata; 555103383736SDon Brace 555203383736SDon Brace if (!logical_drive) 555303383736SDon Brace return -ENODEV; 55547c0a0229SDon Brace 55557c0a0229SDon Brace if (qdepth < 1) 55567c0a0229SDon Brace qdepth = 1; 555703383736SDon Brace else if (qdepth > logical_drive->queue_depth) 555803383736SDon Brace qdepth = logical_drive->queue_depth; 555903383736SDon Brace 556003383736SDon Brace return scsi_change_queue_depth(sdev, qdepth); 55617c0a0229SDon Brace } 55627c0a0229SDon Brace 5563a08a8471SStephen M. Cameron static int hpsa_scan_finished(struct Scsi_Host *sh, 5564a08a8471SStephen M. Cameron unsigned long elapsed_time) 5565a08a8471SStephen M. Cameron { 5566a08a8471SStephen M. Cameron struct ctlr_info *h = shost_to_hba(sh); 5567a08a8471SStephen M. Cameron unsigned long flags; 5568a08a8471SStephen M. Cameron int finished; 5569a08a8471SStephen M. Cameron 5570a08a8471SStephen M. Cameron spin_lock_irqsave(&h->scan_lock, flags); 5571a08a8471SStephen M. Cameron finished = h->scan_finished; 5572a08a8471SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 5573a08a8471SStephen M. Cameron return finished; 5574a08a8471SStephen M. Cameron } 5575a08a8471SStephen M. Cameron 55762946e82bSRobert Elliott static int hpsa_scsi_host_alloc(struct ctlr_info *h) 5577edd16368SStephen M. Cameron { 5578b705690dSStephen M. Cameron struct Scsi_Host *sh; 5579edd16368SStephen M. Cameron 5580b705690dSStephen M. Cameron sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h)); 55812946e82bSRobert Elliott if (sh == NULL) { 55822946e82bSRobert Elliott dev_err(&h->pdev->dev, "scsi_host_alloc failed\n"); 55832946e82bSRobert Elliott return -ENOMEM; 55842946e82bSRobert Elliott } 5585b705690dSStephen M. Cameron 5586b705690dSStephen M. Cameron sh->io_port = 0; 5587b705690dSStephen M. Cameron sh->n_io_port = 0; 5588b705690dSStephen M. Cameron sh->this_id = -1; 5589b705690dSStephen M. Cameron sh->max_channel = 3; 5590b705690dSStephen M. Cameron sh->max_cmd_len = MAX_COMMAND_SIZE; 5591b705690dSStephen M. Cameron sh->max_lun = HPSA_MAX_LUN; 5592b705690dSStephen M. Cameron sh->max_id = HPSA_MAX_LUN; 559341ce4c35SStephen Cameron sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS; 5594d54c5c24SStephen Cameron sh->cmd_per_lun = sh->can_queue; 5595b705690dSStephen M. Cameron sh->sg_tablesize = h->maxsgentries; 5596d04e62b9SKevin Barnett sh->transportt = hpsa_sas_transport_template; 5597b705690dSStephen M. Cameron sh->hostdata[0] = (unsigned long) h; 5598bc2bb154SChristoph Hellwig sh->irq = pci_irq_vector(h->pdev, 0); 5599b705690dSStephen M. Cameron sh->unique_id = sh->irq; 560064d513acSChristoph Hellwig 56012946e82bSRobert Elliott h->scsi_host = sh; 56022946e82bSRobert Elliott return 0; 56032946e82bSRobert Elliott } 56042946e82bSRobert Elliott 56052946e82bSRobert Elliott static int hpsa_scsi_add_host(struct ctlr_info *h) 56062946e82bSRobert Elliott { 56072946e82bSRobert Elliott int rv; 56082946e82bSRobert Elliott 56092946e82bSRobert Elliott rv = scsi_add_host(h->scsi_host, &h->pdev->dev); 56102946e82bSRobert Elliott if (rv) { 56112946e82bSRobert Elliott dev_err(&h->pdev->dev, "scsi_add_host failed\n"); 56122946e82bSRobert Elliott return rv; 56132946e82bSRobert Elliott } 56142946e82bSRobert Elliott scsi_scan_host(h->scsi_host); 56152946e82bSRobert Elliott return 0; 5616edd16368SStephen M. Cameron } 5617edd16368SStephen M. Cameron 5618b69324ffSWebb Scales /* 561973153fe5SWebb Scales * The block layer has already gone to the trouble of picking out a unique, 562073153fe5SWebb Scales * small-integer tag for this request. We use an offset from that value as 562173153fe5SWebb Scales * an index to select our command block. (The offset allows us to reserve the 562273153fe5SWebb Scales * low-numbered entries for our own uses.) 562373153fe5SWebb Scales */ 562473153fe5SWebb Scales static int hpsa_get_cmd_index(struct scsi_cmnd *scmd) 562573153fe5SWebb Scales { 562673153fe5SWebb Scales int idx = scmd->request->tag; 562773153fe5SWebb Scales 562873153fe5SWebb Scales if (idx < 0) 562973153fe5SWebb Scales return idx; 563073153fe5SWebb Scales 563173153fe5SWebb Scales /* Offset to leave space for internal cmds. */ 563273153fe5SWebb Scales return idx += HPSA_NRESERVED_CMDS; 563373153fe5SWebb Scales } 563473153fe5SWebb Scales 563573153fe5SWebb Scales /* 5636b69324ffSWebb Scales * Send a TEST_UNIT_READY command to the specified LUN using the specified 5637b69324ffSWebb Scales * reply queue; returns zero if the unit is ready, and non-zero otherwise. 5638b69324ffSWebb Scales */ 5639b69324ffSWebb Scales static int hpsa_send_test_unit_ready(struct ctlr_info *h, 5640b69324ffSWebb Scales struct CommandList *c, unsigned char lunaddr[], 5641b69324ffSWebb Scales int reply_queue) 5642edd16368SStephen M. Cameron { 56438919358eSTomas Henzl int rc; 5644edd16368SStephen M. Cameron 5645a2dac136SStephen M. Cameron /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */ 5646a2dac136SStephen M. Cameron (void) fill_cmd(c, TEST_UNIT_READY, h, 5647a2dac136SStephen M. Cameron NULL, 0, 0, lunaddr, TYPE_CMD); 5648c448ecfaSDon Brace rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 564925163bd5SWebb Scales if (rc) 5650b69324ffSWebb Scales return rc; 5651edd16368SStephen M. Cameron /* no unmap needed here because no data xfer. */ 5652edd16368SStephen M. Cameron 5653b69324ffSWebb Scales /* Check if the unit is already ready. */ 5654edd16368SStephen M. Cameron if (c->err_info->CommandStatus == CMD_SUCCESS) 5655b69324ffSWebb Scales return 0; 5656edd16368SStephen M. Cameron 5657b69324ffSWebb Scales /* 5658b69324ffSWebb Scales * The first command sent after reset will receive "unit attention" to 5659b69324ffSWebb Scales * indicate that the LUN has been reset...this is actually what we're 5660b69324ffSWebb Scales * looking for (but, success is good too). 5661b69324ffSWebb Scales */ 5662edd16368SStephen M. Cameron if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 5663edd16368SStephen M. Cameron c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION && 5664edd16368SStephen M. Cameron (c->err_info->SenseInfo[2] == NO_SENSE || 5665edd16368SStephen M. Cameron c->err_info->SenseInfo[2] == UNIT_ATTENTION)) 5666b69324ffSWebb Scales return 0; 5667b69324ffSWebb Scales 5668b69324ffSWebb Scales return 1; 5669b69324ffSWebb Scales } 5670b69324ffSWebb Scales 5671b69324ffSWebb Scales /* 5672b69324ffSWebb Scales * Wait for a TEST_UNIT_READY command to complete, retrying as necessary; 5673b69324ffSWebb Scales * returns zero when the unit is ready, and non-zero when giving up. 5674b69324ffSWebb Scales */ 5675b69324ffSWebb Scales static int hpsa_wait_for_test_unit_ready(struct ctlr_info *h, 5676b69324ffSWebb Scales struct CommandList *c, 5677b69324ffSWebb Scales unsigned char lunaddr[], int reply_queue) 5678b69324ffSWebb Scales { 5679b69324ffSWebb Scales int rc; 5680b69324ffSWebb Scales int count = 0; 5681b69324ffSWebb Scales int waittime = 1; /* seconds */ 5682b69324ffSWebb Scales 5683b69324ffSWebb Scales /* Send test unit ready until device ready, or give up. */ 5684b69324ffSWebb Scales for (count = 0; count < HPSA_TUR_RETRY_LIMIT; count++) { 5685b69324ffSWebb Scales 5686b69324ffSWebb Scales /* 5687b69324ffSWebb Scales * Wait for a bit. do this first, because if we send 5688b69324ffSWebb Scales * the TUR right away, the reset will just abort it. 5689b69324ffSWebb Scales */ 5690b69324ffSWebb Scales msleep(1000 * waittime); 5691b69324ffSWebb Scales 5692b69324ffSWebb Scales rc = hpsa_send_test_unit_ready(h, c, lunaddr, reply_queue); 5693b69324ffSWebb Scales if (!rc) 5694edd16368SStephen M. Cameron break; 5695b69324ffSWebb Scales 5696b69324ffSWebb Scales /* Increase wait time with each try, up to a point. */ 5697b69324ffSWebb Scales if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS) 5698b69324ffSWebb Scales waittime *= 2; 5699b69324ffSWebb Scales 5700b69324ffSWebb Scales dev_warn(&h->pdev->dev, 5701b69324ffSWebb Scales "waiting %d secs for device to become ready.\n", 5702b69324ffSWebb Scales waittime); 5703b69324ffSWebb Scales } 5704b69324ffSWebb Scales 5705b69324ffSWebb Scales return rc; 5706b69324ffSWebb Scales } 5707b69324ffSWebb Scales 5708b69324ffSWebb Scales static int wait_for_device_to_become_ready(struct ctlr_info *h, 5709b69324ffSWebb Scales unsigned char lunaddr[], 5710b69324ffSWebb Scales int reply_queue) 5711b69324ffSWebb Scales { 5712b69324ffSWebb Scales int first_queue; 5713b69324ffSWebb Scales int last_queue; 5714b69324ffSWebb Scales int rq; 5715b69324ffSWebb Scales int rc = 0; 5716b69324ffSWebb Scales struct CommandList *c; 5717b69324ffSWebb Scales 5718b69324ffSWebb Scales c = cmd_alloc(h); 5719b69324ffSWebb Scales 5720b69324ffSWebb Scales /* 5721b69324ffSWebb Scales * If no specific reply queue was requested, then send the TUR 5722b69324ffSWebb Scales * repeatedly, requesting a reply on each reply queue; otherwise execute 5723b69324ffSWebb Scales * the loop exactly once using only the specified queue. 5724b69324ffSWebb Scales */ 5725b69324ffSWebb Scales if (reply_queue == DEFAULT_REPLY_QUEUE) { 5726b69324ffSWebb Scales first_queue = 0; 5727b69324ffSWebb Scales last_queue = h->nreply_queues - 1; 5728b69324ffSWebb Scales } else { 5729b69324ffSWebb Scales first_queue = reply_queue; 5730b69324ffSWebb Scales last_queue = reply_queue; 5731b69324ffSWebb Scales } 5732b69324ffSWebb Scales 5733b69324ffSWebb Scales for (rq = first_queue; rq <= last_queue; rq++) { 5734b69324ffSWebb Scales rc = hpsa_wait_for_test_unit_ready(h, c, lunaddr, rq); 5735b69324ffSWebb Scales if (rc) 5736b69324ffSWebb Scales break; 5737edd16368SStephen M. Cameron } 5738edd16368SStephen M. Cameron 5739edd16368SStephen M. Cameron if (rc) 5740edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "giving up on device.\n"); 5741edd16368SStephen M. Cameron else 5742edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "device is ready.\n"); 5743edd16368SStephen M. Cameron 574445fcb86eSStephen Cameron cmd_free(h, c); 5745edd16368SStephen M. Cameron return rc; 5746edd16368SStephen M. Cameron } 5747edd16368SStephen M. Cameron 5748edd16368SStephen M. Cameron /* Need at least one of these error handlers to keep ../scsi/hosts.c from 5749edd16368SStephen M. Cameron * complaining. Doing a host- or bus-reset can't do anything good here. 5750edd16368SStephen M. Cameron */ 5751edd16368SStephen M. Cameron static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd) 5752edd16368SStephen M. Cameron { 5753c59d04f3SDon Brace int rc = SUCCESS; 5754edd16368SStephen M. Cameron struct ctlr_info *h; 5755edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *dev; 57560b9b7b6eSScott Teel u8 reset_type; 57572dc127bbSDan Carpenter char msg[48]; 5758c59d04f3SDon Brace unsigned long flags; 5759edd16368SStephen M. Cameron 5760edd16368SStephen M. Cameron /* find the controller to which the command to be aborted was sent */ 5761edd16368SStephen M. Cameron h = sdev_to_hba(scsicmd->device); 5762edd16368SStephen M. Cameron if (h == NULL) /* paranoia */ 5763edd16368SStephen M. Cameron return FAILED; 5764e345893bSDon Brace 5765c59d04f3SDon Brace spin_lock_irqsave(&h->reset_lock, flags); 5766c59d04f3SDon Brace h->reset_in_progress = 1; 5767c59d04f3SDon Brace spin_unlock_irqrestore(&h->reset_lock, flags); 5768c59d04f3SDon Brace 5769c59d04f3SDon Brace if (lockup_detected(h)) { 5770c59d04f3SDon Brace rc = FAILED; 5771c59d04f3SDon Brace goto return_reset_status; 5772c59d04f3SDon Brace } 5773e345893bSDon Brace 5774edd16368SStephen M. Cameron dev = scsicmd->device->hostdata; 5775edd16368SStephen M. Cameron if (!dev) { 5776d604f533SWebb Scales dev_err(&h->pdev->dev, "%s: device lookup failed\n", __func__); 5777c59d04f3SDon Brace rc = FAILED; 5778c59d04f3SDon Brace goto return_reset_status; 5779edd16368SStephen M. Cameron } 578025163bd5SWebb Scales 5781c59d04f3SDon Brace if (dev->devtype == TYPE_ENCLOSURE) { 5782c59d04f3SDon Brace rc = SUCCESS; 5783c59d04f3SDon Brace goto return_reset_status; 5784c59d04f3SDon Brace } 5785ef8a5203SDon Brace 578625163bd5SWebb Scales /* if controller locked up, we can guarantee command won't complete */ 578725163bd5SWebb Scales if (lockup_detected(h)) { 57882dc127bbSDan Carpenter snprintf(msg, sizeof(msg), 57892dc127bbSDan Carpenter "cmd %d RESET FAILED, lockup detected", 579073153fe5SWebb Scales hpsa_get_cmd_index(scsicmd)); 579173153fe5SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 5792c59d04f3SDon Brace rc = FAILED; 5793c59d04f3SDon Brace goto return_reset_status; 579425163bd5SWebb Scales } 579525163bd5SWebb Scales 579625163bd5SWebb Scales /* this reset request might be the result of a lockup; check */ 579725163bd5SWebb Scales if (detect_controller_lockup(h)) { 57982dc127bbSDan Carpenter snprintf(msg, sizeof(msg), 57992dc127bbSDan Carpenter "cmd %d RESET FAILED, new lockup detected", 580073153fe5SWebb Scales hpsa_get_cmd_index(scsicmd)); 580173153fe5SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 5802c59d04f3SDon Brace rc = FAILED; 5803c59d04f3SDon Brace goto return_reset_status; 580425163bd5SWebb Scales } 580525163bd5SWebb Scales 5806d604f533SWebb Scales /* Do not attempt on controller */ 5807c59d04f3SDon Brace if (is_hba_lunid(dev->scsi3addr)) { 5808c59d04f3SDon Brace rc = SUCCESS; 5809c59d04f3SDon Brace goto return_reset_status; 5810c59d04f3SDon Brace } 5811d604f533SWebb Scales 58120b9b7b6eSScott Teel if (is_logical_dev_addr_mode(dev->scsi3addr)) 58130b9b7b6eSScott Teel reset_type = HPSA_DEVICE_RESET_MSG; 58140b9b7b6eSScott Teel else 58150b9b7b6eSScott Teel reset_type = HPSA_PHYS_TARGET_RESET; 58160b9b7b6eSScott Teel 58170b9b7b6eSScott Teel sprintf(msg, "resetting %s", 58180b9b7b6eSScott Teel reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical "); 58190b9b7b6eSScott Teel hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 582025163bd5SWebb Scales 5821edd16368SStephen M. Cameron /* send a reset to the SCSI LUN which the command was sent to */ 58220b9b7b6eSScott Teel rc = hpsa_do_reset(h, dev, dev->scsi3addr, reset_type, 582325163bd5SWebb Scales DEFAULT_REPLY_QUEUE); 5824c59d04f3SDon Brace if (rc == 0) 5825c59d04f3SDon Brace rc = SUCCESS; 5826c59d04f3SDon Brace else 5827c59d04f3SDon Brace rc = FAILED; 5828c59d04f3SDon Brace 58290b9b7b6eSScott Teel sprintf(msg, "reset %s %s", 58300b9b7b6eSScott Teel reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ", 5831c59d04f3SDon Brace rc == SUCCESS ? "completed successfully" : "failed"); 5832d604f533SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 5833c59d04f3SDon Brace 5834c59d04f3SDon Brace return_reset_status: 5835c59d04f3SDon Brace spin_lock_irqsave(&h->reset_lock, flags); 5836da03ded0SDon Brace h->reset_in_progress = 0; 5837c59d04f3SDon Brace spin_unlock_irqrestore(&h->reset_lock, flags); 5838c59d04f3SDon Brace return rc; 5839edd16368SStephen M. Cameron } 5840edd16368SStephen M. Cameron 5841edd16368SStephen M. Cameron /* 584273153fe5SWebb Scales * For operations with an associated SCSI command, a command block is allocated 584373153fe5SWebb Scales * at init, and managed by cmd_tagged_alloc() and cmd_tagged_free() using the 584473153fe5SWebb Scales * block request tag as an index into a table of entries. cmd_tagged_free() is 584573153fe5SWebb Scales * the complement, although cmd_free() may be called instead. 584673153fe5SWebb Scales */ 584773153fe5SWebb Scales static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h, 584873153fe5SWebb Scales struct scsi_cmnd *scmd) 584973153fe5SWebb Scales { 585073153fe5SWebb Scales int idx = hpsa_get_cmd_index(scmd); 585173153fe5SWebb Scales struct CommandList *c = h->cmd_pool + idx; 585273153fe5SWebb Scales 585373153fe5SWebb Scales if (idx < HPSA_NRESERVED_CMDS || idx >= h->nr_cmds) { 585473153fe5SWebb Scales dev_err(&h->pdev->dev, "Bad block tag: %d not in [%d..%d]\n", 585573153fe5SWebb Scales idx, HPSA_NRESERVED_CMDS, h->nr_cmds - 1); 585673153fe5SWebb Scales /* The index value comes from the block layer, so if it's out of 585773153fe5SWebb Scales * bounds, it's probably not our bug. 585873153fe5SWebb Scales */ 585973153fe5SWebb Scales BUG(); 586073153fe5SWebb Scales } 586173153fe5SWebb Scales 586273153fe5SWebb Scales atomic_inc(&c->refcount); 586373153fe5SWebb Scales if (unlikely(!hpsa_is_cmd_idle(c))) { 586473153fe5SWebb Scales /* 586573153fe5SWebb Scales * We expect that the SCSI layer will hand us a unique tag 586673153fe5SWebb Scales * value. Thus, there should never be a collision here between 586773153fe5SWebb Scales * two requests...because if the selected command isn't idle 586873153fe5SWebb Scales * then someone is going to be very disappointed. 586973153fe5SWebb Scales */ 587073153fe5SWebb Scales dev_err(&h->pdev->dev, 587173153fe5SWebb Scales "tag collision (tag=%d) in cmd_tagged_alloc().\n", 587273153fe5SWebb Scales idx); 587373153fe5SWebb Scales if (c->scsi_cmd != NULL) 587473153fe5SWebb Scales scsi_print_command(c->scsi_cmd); 587573153fe5SWebb Scales scsi_print_command(scmd); 587673153fe5SWebb Scales } 587773153fe5SWebb Scales 587873153fe5SWebb Scales hpsa_cmd_partial_init(h, idx, c); 587973153fe5SWebb Scales return c; 588073153fe5SWebb Scales } 588173153fe5SWebb Scales 588273153fe5SWebb Scales static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c) 588373153fe5SWebb Scales { 588473153fe5SWebb Scales /* 588573153fe5SWebb Scales * Release our reference to the block. We don't need to do anything 588608ec46f6SDon Brace * else to free it, because it is accessed by index. 588773153fe5SWebb Scales */ 588873153fe5SWebb Scales (void)atomic_dec(&c->refcount); 588973153fe5SWebb Scales } 589073153fe5SWebb Scales 589173153fe5SWebb Scales /* 5892edd16368SStephen M. Cameron * For operations that cannot sleep, a command block is allocated at init, 5893edd16368SStephen M. Cameron * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track 5894edd16368SStephen M. Cameron * which ones are free or in use. Lock must be held when calling this. 5895edd16368SStephen M. Cameron * cmd_free() is the complement. 5896bf43caf3SRobert Elliott * This function never gives up and returns NULL. If it hangs, 5897bf43caf3SRobert Elliott * another thread must call cmd_free() to free some tags. 5898edd16368SStephen M. Cameron */ 5899281a7fd0SWebb Scales 5900edd16368SStephen M. Cameron static struct CommandList *cmd_alloc(struct ctlr_info *h) 5901edd16368SStephen M. Cameron { 5902edd16368SStephen M. Cameron struct CommandList *c; 5903360c73bdSStephen Cameron int refcount, i; 590473153fe5SWebb Scales int offset = 0; 5905edd16368SStephen M. Cameron 590633811026SRobert Elliott /* 590733811026SRobert Elliott * There is some *extremely* small but non-zero chance that that 59084c413128SStephen M. Cameron * multiple threads could get in here, and one thread could 59094c413128SStephen M. Cameron * be scanning through the list of bits looking for a free 59104c413128SStephen M. Cameron * one, but the free ones are always behind him, and other 59114c413128SStephen M. Cameron * threads sneak in behind him and eat them before he can 59124c413128SStephen M. Cameron * get to them, so that while there is always a free one, a 59134c413128SStephen M. Cameron * very unlucky thread might be starved anyway, never able to 59144c413128SStephen M. Cameron * beat the other threads. In reality, this happens so 59154c413128SStephen M. Cameron * infrequently as to be indistinguishable from never. 591673153fe5SWebb Scales * 591773153fe5SWebb Scales * Note that we start allocating commands before the SCSI host structure 591873153fe5SWebb Scales * is initialized. Since the search starts at bit zero, this 591973153fe5SWebb Scales * all works, since we have at least one command structure available; 592073153fe5SWebb Scales * however, it means that the structures with the low indexes have to be 592173153fe5SWebb Scales * reserved for driver-initiated requests, while requests from the block 592273153fe5SWebb Scales * layer will use the higher indexes. 59234c413128SStephen M. Cameron */ 59244c413128SStephen M. Cameron 5925281a7fd0SWebb Scales for (;;) { 592673153fe5SWebb Scales i = find_next_zero_bit(h->cmd_pool_bits, 592773153fe5SWebb Scales HPSA_NRESERVED_CMDS, 592873153fe5SWebb Scales offset); 592973153fe5SWebb Scales if (unlikely(i >= HPSA_NRESERVED_CMDS)) { 5930281a7fd0SWebb Scales offset = 0; 5931281a7fd0SWebb Scales continue; 5932281a7fd0SWebb Scales } 5933edd16368SStephen M. Cameron c = h->cmd_pool + i; 5934281a7fd0SWebb Scales refcount = atomic_inc_return(&c->refcount); 5935281a7fd0SWebb Scales if (unlikely(refcount > 1)) { 5936281a7fd0SWebb Scales cmd_free(h, c); /* already in use */ 593773153fe5SWebb Scales offset = (i + 1) % HPSA_NRESERVED_CMDS; 5938281a7fd0SWebb Scales continue; 5939281a7fd0SWebb Scales } 5940281a7fd0SWebb Scales set_bit(i & (BITS_PER_LONG - 1), 5941281a7fd0SWebb Scales h->cmd_pool_bits + (i / BITS_PER_LONG)); 5942281a7fd0SWebb Scales break; /* it's ours now. */ 5943281a7fd0SWebb Scales } 5944360c73bdSStephen Cameron hpsa_cmd_partial_init(h, i, c); 5945edd16368SStephen M. Cameron return c; 5946edd16368SStephen M. Cameron } 5947edd16368SStephen M. Cameron 594873153fe5SWebb Scales /* 594973153fe5SWebb Scales * This is the complementary operation to cmd_alloc(). Note, however, in some 595073153fe5SWebb Scales * corner cases it may also be used to free blocks allocated by 595173153fe5SWebb Scales * cmd_tagged_alloc() in which case the ref-count decrement does the trick and 595273153fe5SWebb Scales * the clear-bit is harmless. 595373153fe5SWebb Scales */ 5954edd16368SStephen M. Cameron static void cmd_free(struct ctlr_info *h, struct CommandList *c) 5955edd16368SStephen M. Cameron { 5956281a7fd0SWebb Scales if (atomic_dec_and_test(&c->refcount)) { 5957edd16368SStephen M. Cameron int i; 5958edd16368SStephen M. Cameron 5959edd16368SStephen M. Cameron i = c - h->cmd_pool; 5960edd16368SStephen M. Cameron clear_bit(i & (BITS_PER_LONG - 1), 5961edd16368SStephen M. Cameron h->cmd_pool_bits + (i / BITS_PER_LONG)); 5962edd16368SStephen M. Cameron } 5963281a7fd0SWebb Scales } 5964edd16368SStephen M. Cameron 5965edd16368SStephen M. Cameron #ifdef CONFIG_COMPAT 5966edd16368SStephen M. Cameron 596742a91641SDon Brace static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, 596842a91641SDon Brace void __user *arg) 5969edd16368SStephen M. Cameron { 5970edd16368SStephen M. Cameron IOCTL32_Command_struct __user *arg32 = 5971edd16368SStephen M. Cameron (IOCTL32_Command_struct __user *) arg; 5972edd16368SStephen M. Cameron IOCTL_Command_struct arg64; 5973edd16368SStephen M. Cameron IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64)); 5974edd16368SStephen M. Cameron int err; 5975edd16368SStephen M. Cameron u32 cp; 5976edd16368SStephen M. Cameron 5977938abd84SVasiliy Kulikov memset(&arg64, 0, sizeof(arg64)); 5978edd16368SStephen M. Cameron err = 0; 5979edd16368SStephen M. Cameron err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 5980edd16368SStephen M. Cameron sizeof(arg64.LUN_info)); 5981edd16368SStephen M. Cameron err |= copy_from_user(&arg64.Request, &arg32->Request, 5982edd16368SStephen M. Cameron sizeof(arg64.Request)); 5983edd16368SStephen M. Cameron err |= copy_from_user(&arg64.error_info, &arg32->error_info, 5984edd16368SStephen M. Cameron sizeof(arg64.error_info)); 5985edd16368SStephen M. Cameron err |= get_user(arg64.buf_size, &arg32->buf_size); 5986edd16368SStephen M. Cameron err |= get_user(cp, &arg32->buf); 5987edd16368SStephen M. Cameron arg64.buf = compat_ptr(cp); 5988edd16368SStephen M. Cameron err |= copy_to_user(p, &arg64, sizeof(arg64)); 5989edd16368SStephen M. Cameron 5990edd16368SStephen M. Cameron if (err) 5991edd16368SStephen M. Cameron return -EFAULT; 5992edd16368SStephen M. Cameron 599342a91641SDon Brace err = hpsa_ioctl(dev, CCISS_PASSTHRU, p); 5994edd16368SStephen M. Cameron if (err) 5995edd16368SStephen M. Cameron return err; 5996edd16368SStephen M. Cameron err |= copy_in_user(&arg32->error_info, &p->error_info, 5997edd16368SStephen M. Cameron sizeof(arg32->error_info)); 5998edd16368SStephen M. Cameron if (err) 5999edd16368SStephen M. Cameron return -EFAULT; 6000edd16368SStephen M. Cameron return err; 6001edd16368SStephen M. Cameron } 6002edd16368SStephen M. Cameron 6003edd16368SStephen M. Cameron static int hpsa_ioctl32_big_passthru(struct scsi_device *dev, 600442a91641SDon Brace int cmd, void __user *arg) 6005edd16368SStephen M. Cameron { 6006edd16368SStephen M. Cameron BIG_IOCTL32_Command_struct __user *arg32 = 6007edd16368SStephen M. Cameron (BIG_IOCTL32_Command_struct __user *) arg; 6008edd16368SStephen M. Cameron BIG_IOCTL_Command_struct arg64; 6009edd16368SStephen M. Cameron BIG_IOCTL_Command_struct __user *p = 6010edd16368SStephen M. Cameron compat_alloc_user_space(sizeof(arg64)); 6011edd16368SStephen M. Cameron int err; 6012edd16368SStephen M. Cameron u32 cp; 6013edd16368SStephen M. Cameron 6014938abd84SVasiliy Kulikov memset(&arg64, 0, sizeof(arg64)); 6015edd16368SStephen M. Cameron err = 0; 6016edd16368SStephen M. Cameron err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 6017edd16368SStephen M. Cameron sizeof(arg64.LUN_info)); 6018edd16368SStephen M. Cameron err |= copy_from_user(&arg64.Request, &arg32->Request, 6019edd16368SStephen M. Cameron sizeof(arg64.Request)); 6020edd16368SStephen M. Cameron err |= copy_from_user(&arg64.error_info, &arg32->error_info, 6021edd16368SStephen M. Cameron sizeof(arg64.error_info)); 6022edd16368SStephen M. Cameron err |= get_user(arg64.buf_size, &arg32->buf_size); 6023edd16368SStephen M. Cameron err |= get_user(arg64.malloc_size, &arg32->malloc_size); 6024edd16368SStephen M. Cameron err |= get_user(cp, &arg32->buf); 6025edd16368SStephen M. Cameron arg64.buf = compat_ptr(cp); 6026edd16368SStephen M. Cameron err |= copy_to_user(p, &arg64, sizeof(arg64)); 6027edd16368SStephen M. Cameron 6028edd16368SStephen M. Cameron if (err) 6029edd16368SStephen M. Cameron return -EFAULT; 6030edd16368SStephen M. Cameron 603142a91641SDon Brace err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, p); 6032edd16368SStephen M. Cameron if (err) 6033edd16368SStephen M. Cameron return err; 6034edd16368SStephen M. Cameron err |= copy_in_user(&arg32->error_info, &p->error_info, 6035edd16368SStephen M. Cameron sizeof(arg32->error_info)); 6036edd16368SStephen M. Cameron if (err) 6037edd16368SStephen M. Cameron return -EFAULT; 6038edd16368SStephen M. Cameron return err; 6039edd16368SStephen M. Cameron } 604071fe75a7SStephen M. Cameron 604142a91641SDon Brace static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void __user *arg) 604271fe75a7SStephen M. Cameron { 604371fe75a7SStephen M. Cameron switch (cmd) { 604471fe75a7SStephen M. Cameron case CCISS_GETPCIINFO: 604571fe75a7SStephen M. Cameron case CCISS_GETINTINFO: 604671fe75a7SStephen M. Cameron case CCISS_SETINTINFO: 604771fe75a7SStephen M. Cameron case CCISS_GETNODENAME: 604871fe75a7SStephen M. Cameron case CCISS_SETNODENAME: 604971fe75a7SStephen M. Cameron case CCISS_GETHEARTBEAT: 605071fe75a7SStephen M. Cameron case CCISS_GETBUSTYPES: 605171fe75a7SStephen M. Cameron case CCISS_GETFIRMVER: 605271fe75a7SStephen M. Cameron case CCISS_GETDRIVVER: 605371fe75a7SStephen M. Cameron case CCISS_REVALIDVOLS: 605471fe75a7SStephen M. Cameron case CCISS_DEREGDISK: 605571fe75a7SStephen M. Cameron case CCISS_REGNEWDISK: 605671fe75a7SStephen M. Cameron case CCISS_REGNEWD: 605771fe75a7SStephen M. Cameron case CCISS_RESCANDISK: 605871fe75a7SStephen M. Cameron case CCISS_GETLUNINFO: 605971fe75a7SStephen M. Cameron return hpsa_ioctl(dev, cmd, arg); 606071fe75a7SStephen M. Cameron 606171fe75a7SStephen M. Cameron case CCISS_PASSTHRU32: 606271fe75a7SStephen M. Cameron return hpsa_ioctl32_passthru(dev, cmd, arg); 606371fe75a7SStephen M. Cameron case CCISS_BIG_PASSTHRU32: 606471fe75a7SStephen M. Cameron return hpsa_ioctl32_big_passthru(dev, cmd, arg); 606571fe75a7SStephen M. Cameron 606671fe75a7SStephen M. Cameron default: 606771fe75a7SStephen M. Cameron return -ENOIOCTLCMD; 606871fe75a7SStephen M. Cameron } 606971fe75a7SStephen M. Cameron } 6070edd16368SStephen M. Cameron #endif 6071edd16368SStephen M. Cameron 6072edd16368SStephen M. Cameron static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp) 6073edd16368SStephen M. Cameron { 6074edd16368SStephen M. Cameron struct hpsa_pci_info pciinfo; 6075edd16368SStephen M. Cameron 6076edd16368SStephen M. Cameron if (!argp) 6077edd16368SStephen M. Cameron return -EINVAL; 6078edd16368SStephen M. Cameron pciinfo.domain = pci_domain_nr(h->pdev->bus); 6079edd16368SStephen M. Cameron pciinfo.bus = h->pdev->bus->number; 6080edd16368SStephen M. Cameron pciinfo.dev_fn = h->pdev->devfn; 6081edd16368SStephen M. Cameron pciinfo.board_id = h->board_id; 6082edd16368SStephen M. Cameron if (copy_to_user(argp, &pciinfo, sizeof(pciinfo))) 6083edd16368SStephen M. Cameron return -EFAULT; 6084edd16368SStephen M. Cameron return 0; 6085edd16368SStephen M. Cameron } 6086edd16368SStephen M. Cameron 6087edd16368SStephen M. Cameron static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp) 6088edd16368SStephen M. Cameron { 6089edd16368SStephen M. Cameron DriverVer_type DriverVer; 6090edd16368SStephen M. Cameron unsigned char vmaj, vmin, vsubmin; 6091edd16368SStephen M. Cameron int rc; 6092edd16368SStephen M. Cameron 6093edd16368SStephen M. Cameron rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu", 6094edd16368SStephen M. Cameron &vmaj, &vmin, &vsubmin); 6095edd16368SStephen M. Cameron if (rc != 3) { 6096edd16368SStephen M. Cameron dev_info(&h->pdev->dev, "driver version string '%s' " 6097edd16368SStephen M. Cameron "unrecognized.", HPSA_DRIVER_VERSION); 6098edd16368SStephen M. Cameron vmaj = 0; 6099edd16368SStephen M. Cameron vmin = 0; 6100edd16368SStephen M. Cameron vsubmin = 0; 6101edd16368SStephen M. Cameron } 6102edd16368SStephen M. Cameron DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin; 6103edd16368SStephen M. Cameron if (!argp) 6104edd16368SStephen M. Cameron return -EINVAL; 6105edd16368SStephen M. Cameron if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type))) 6106edd16368SStephen M. Cameron return -EFAULT; 6107edd16368SStephen M. Cameron return 0; 6108edd16368SStephen M. Cameron } 6109edd16368SStephen M. Cameron 6110edd16368SStephen M. Cameron static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp) 6111edd16368SStephen M. Cameron { 6112edd16368SStephen M. Cameron IOCTL_Command_struct iocommand; 6113edd16368SStephen M. Cameron struct CommandList *c; 6114edd16368SStephen M. Cameron char *buff = NULL; 611550a0decfSStephen M. Cameron u64 temp64; 6116c1f63c8fSStephen M. Cameron int rc = 0; 6117edd16368SStephen M. Cameron 6118edd16368SStephen M. Cameron if (!argp) 6119edd16368SStephen M. Cameron return -EINVAL; 6120edd16368SStephen M. Cameron if (!capable(CAP_SYS_RAWIO)) 6121edd16368SStephen M. Cameron return -EPERM; 6122edd16368SStephen M. Cameron if (copy_from_user(&iocommand, argp, sizeof(iocommand))) 6123edd16368SStephen M. Cameron return -EFAULT; 6124edd16368SStephen M. Cameron if ((iocommand.buf_size < 1) && 6125edd16368SStephen M. Cameron (iocommand.Request.Type.Direction != XFER_NONE)) { 6126edd16368SStephen M. Cameron return -EINVAL; 6127edd16368SStephen M. Cameron } 6128edd16368SStephen M. Cameron if (iocommand.buf_size > 0) { 6129edd16368SStephen M. Cameron buff = kmalloc(iocommand.buf_size, GFP_KERNEL); 6130edd16368SStephen M. Cameron if (buff == NULL) 61312dd02d74SRobert Elliott return -ENOMEM; 61329233fb10SStephen M. Cameron if (iocommand.Request.Type.Direction & XFER_WRITE) { 6133edd16368SStephen M. Cameron /* Copy the data into the buffer we created */ 6134b03a7771SStephen M. Cameron if (copy_from_user(buff, iocommand.buf, 6135b03a7771SStephen M. Cameron iocommand.buf_size)) { 6136c1f63c8fSStephen M. Cameron rc = -EFAULT; 6137c1f63c8fSStephen M. Cameron goto out_kfree; 6138edd16368SStephen M. Cameron } 6139b03a7771SStephen M. Cameron } else { 6140edd16368SStephen M. Cameron memset(buff, 0, iocommand.buf_size); 6141b03a7771SStephen M. Cameron } 6142b03a7771SStephen M. Cameron } 614345fcb86eSStephen Cameron c = cmd_alloc(h); 6144bf43caf3SRobert Elliott 6145edd16368SStephen M. Cameron /* Fill in the command type */ 6146edd16368SStephen M. Cameron c->cmd_type = CMD_IOCTL_PEND; 6147a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 6148edd16368SStephen M. Cameron /* Fill in Command Header */ 6149edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; /* unused in simple mode */ 6150edd16368SStephen M. Cameron if (iocommand.buf_size > 0) { /* buffer to fill */ 6151edd16368SStephen M. Cameron c->Header.SGList = 1; 615250a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(1); 6153edd16368SStephen M. Cameron } else { /* no buffers to fill */ 6154edd16368SStephen M. Cameron c->Header.SGList = 0; 615550a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(0); 6156edd16368SStephen M. Cameron } 6157edd16368SStephen M. Cameron memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN)); 6158edd16368SStephen M. Cameron 6159edd16368SStephen M. Cameron /* Fill in Request block */ 6160edd16368SStephen M. Cameron memcpy(&c->Request, &iocommand.Request, 6161edd16368SStephen M. Cameron sizeof(c->Request)); 6162edd16368SStephen M. Cameron 6163edd16368SStephen M. Cameron /* Fill in the scatter gather information */ 6164edd16368SStephen M. Cameron if (iocommand.buf_size > 0) { 616550a0decfSStephen M. Cameron temp64 = pci_map_single(h->pdev, buff, 6166edd16368SStephen M. Cameron iocommand.buf_size, PCI_DMA_BIDIRECTIONAL); 616750a0decfSStephen M. Cameron if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) { 616850a0decfSStephen M. Cameron c->SG[0].Addr = cpu_to_le64(0); 616950a0decfSStephen M. Cameron c->SG[0].Len = cpu_to_le32(0); 6170bcc48ffaSStephen M. Cameron rc = -ENOMEM; 6171bcc48ffaSStephen M. Cameron goto out; 6172bcc48ffaSStephen M. Cameron } 617350a0decfSStephen M. Cameron c->SG[0].Addr = cpu_to_le64(temp64); 617450a0decfSStephen M. Cameron c->SG[0].Len = cpu_to_le32(iocommand.buf_size); 617550a0decfSStephen M. Cameron c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */ 6176edd16368SStephen M. Cameron } 6177c448ecfaSDon Brace rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 61783fb134cbSDon Brace NO_TIMEOUT); 6179c2dd32e0SStephen M. Cameron if (iocommand.buf_size > 0) 6180edd16368SStephen M. Cameron hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL); 6181edd16368SStephen M. Cameron check_ioctl_unit_attention(h, c); 618225163bd5SWebb Scales if (rc) { 618325163bd5SWebb Scales rc = -EIO; 618425163bd5SWebb Scales goto out; 618525163bd5SWebb Scales } 6186edd16368SStephen M. Cameron 6187edd16368SStephen M. Cameron /* Copy the error information out */ 6188edd16368SStephen M. Cameron memcpy(&iocommand.error_info, c->err_info, 6189edd16368SStephen M. Cameron sizeof(iocommand.error_info)); 6190edd16368SStephen M. Cameron if (copy_to_user(argp, &iocommand, sizeof(iocommand))) { 6191c1f63c8fSStephen M. Cameron rc = -EFAULT; 6192c1f63c8fSStephen M. Cameron goto out; 6193edd16368SStephen M. Cameron } 61949233fb10SStephen M. Cameron if ((iocommand.Request.Type.Direction & XFER_READ) && 6195b03a7771SStephen M. Cameron iocommand.buf_size > 0) { 6196edd16368SStephen M. Cameron /* Copy the data out of the buffer we created */ 6197edd16368SStephen M. Cameron if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) { 6198c1f63c8fSStephen M. Cameron rc = -EFAULT; 6199c1f63c8fSStephen M. Cameron goto out; 6200edd16368SStephen M. Cameron } 6201edd16368SStephen M. Cameron } 6202c1f63c8fSStephen M. Cameron out: 620345fcb86eSStephen Cameron cmd_free(h, c); 6204c1f63c8fSStephen M. Cameron out_kfree: 6205c1f63c8fSStephen M. Cameron kfree(buff); 6206c1f63c8fSStephen M. Cameron return rc; 6207edd16368SStephen M. Cameron } 6208edd16368SStephen M. Cameron 6209edd16368SStephen M. Cameron static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp) 6210edd16368SStephen M. Cameron { 6211edd16368SStephen M. Cameron BIG_IOCTL_Command_struct *ioc; 6212edd16368SStephen M. Cameron struct CommandList *c; 6213edd16368SStephen M. Cameron unsigned char **buff = NULL; 6214edd16368SStephen M. Cameron int *buff_size = NULL; 621550a0decfSStephen M. Cameron u64 temp64; 6216edd16368SStephen M. Cameron BYTE sg_used = 0; 6217edd16368SStephen M. Cameron int status = 0; 621801a02ffcSStephen M. Cameron u32 left; 621901a02ffcSStephen M. Cameron u32 sz; 6220edd16368SStephen M. Cameron BYTE __user *data_ptr; 6221edd16368SStephen M. Cameron 6222edd16368SStephen M. Cameron if (!argp) 6223edd16368SStephen M. Cameron return -EINVAL; 6224edd16368SStephen M. Cameron if (!capable(CAP_SYS_RAWIO)) 6225edd16368SStephen M. Cameron return -EPERM; 622619be606bSJavier Martinez Canillas ioc = kmalloc(sizeof(*ioc), GFP_KERNEL); 6227edd16368SStephen M. Cameron if (!ioc) { 6228edd16368SStephen M. Cameron status = -ENOMEM; 6229edd16368SStephen M. Cameron goto cleanup1; 6230edd16368SStephen M. Cameron } 6231edd16368SStephen M. Cameron if (copy_from_user(ioc, argp, sizeof(*ioc))) { 6232edd16368SStephen M. Cameron status = -EFAULT; 6233edd16368SStephen M. Cameron goto cleanup1; 6234edd16368SStephen M. Cameron } 6235edd16368SStephen M. Cameron if ((ioc->buf_size < 1) && 6236edd16368SStephen M. Cameron (ioc->Request.Type.Direction != XFER_NONE)) { 6237edd16368SStephen M. Cameron status = -EINVAL; 6238edd16368SStephen M. Cameron goto cleanup1; 6239edd16368SStephen M. Cameron } 6240edd16368SStephen M. Cameron /* Check kmalloc limits using all SGs */ 6241edd16368SStephen M. Cameron if (ioc->malloc_size > MAX_KMALLOC_SIZE) { 6242edd16368SStephen M. Cameron status = -EINVAL; 6243edd16368SStephen M. Cameron goto cleanup1; 6244edd16368SStephen M. Cameron } 6245d66ae08bSStephen M. Cameron if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) { 6246edd16368SStephen M. Cameron status = -EINVAL; 6247edd16368SStephen M. Cameron goto cleanup1; 6248edd16368SStephen M. Cameron } 6249d66ae08bSStephen M. Cameron buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL); 6250edd16368SStephen M. Cameron if (!buff) { 6251edd16368SStephen M. Cameron status = -ENOMEM; 6252edd16368SStephen M. Cameron goto cleanup1; 6253edd16368SStephen M. Cameron } 6254d66ae08bSStephen M. Cameron buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL); 6255edd16368SStephen M. Cameron if (!buff_size) { 6256edd16368SStephen M. Cameron status = -ENOMEM; 6257edd16368SStephen M. Cameron goto cleanup1; 6258edd16368SStephen M. Cameron } 6259edd16368SStephen M. Cameron left = ioc->buf_size; 6260edd16368SStephen M. Cameron data_ptr = ioc->buf; 6261edd16368SStephen M. Cameron while (left) { 6262edd16368SStephen M. Cameron sz = (left > ioc->malloc_size) ? ioc->malloc_size : left; 6263edd16368SStephen M. Cameron buff_size[sg_used] = sz; 6264edd16368SStephen M. Cameron buff[sg_used] = kmalloc(sz, GFP_KERNEL); 6265edd16368SStephen M. Cameron if (buff[sg_used] == NULL) { 6266edd16368SStephen M. Cameron status = -ENOMEM; 6267edd16368SStephen M. Cameron goto cleanup1; 6268edd16368SStephen M. Cameron } 62699233fb10SStephen M. Cameron if (ioc->Request.Type.Direction & XFER_WRITE) { 6270edd16368SStephen M. Cameron if (copy_from_user(buff[sg_used], data_ptr, sz)) { 62710758f4f7SStephen M. Cameron status = -EFAULT; 6272edd16368SStephen M. Cameron goto cleanup1; 6273edd16368SStephen M. Cameron } 6274edd16368SStephen M. Cameron } else 6275edd16368SStephen M. Cameron memset(buff[sg_used], 0, sz); 6276edd16368SStephen M. Cameron left -= sz; 6277edd16368SStephen M. Cameron data_ptr += sz; 6278edd16368SStephen M. Cameron sg_used++; 6279edd16368SStephen M. Cameron } 628045fcb86eSStephen Cameron c = cmd_alloc(h); 6281bf43caf3SRobert Elliott 6282edd16368SStephen M. Cameron c->cmd_type = CMD_IOCTL_PEND; 6283a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 6284edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; 628550a0decfSStephen M. Cameron c->Header.SGList = (u8) sg_used; 628650a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(sg_used); 6287edd16368SStephen M. Cameron memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN)); 6288edd16368SStephen M. Cameron memcpy(&c->Request, &ioc->Request, sizeof(c->Request)); 6289edd16368SStephen M. Cameron if (ioc->buf_size > 0) { 6290edd16368SStephen M. Cameron int i; 6291edd16368SStephen M. Cameron for (i = 0; i < sg_used; i++) { 629250a0decfSStephen M. Cameron temp64 = pci_map_single(h->pdev, buff[i], 6293edd16368SStephen M. Cameron buff_size[i], PCI_DMA_BIDIRECTIONAL); 629450a0decfSStephen M. Cameron if (dma_mapping_error(&h->pdev->dev, 629550a0decfSStephen M. Cameron (dma_addr_t) temp64)) { 629650a0decfSStephen M. Cameron c->SG[i].Addr = cpu_to_le64(0); 629750a0decfSStephen M. Cameron c->SG[i].Len = cpu_to_le32(0); 6298bcc48ffaSStephen M. Cameron hpsa_pci_unmap(h->pdev, c, i, 6299bcc48ffaSStephen M. Cameron PCI_DMA_BIDIRECTIONAL); 6300bcc48ffaSStephen M. Cameron status = -ENOMEM; 6301e2d4a1f6SStephen M. Cameron goto cleanup0; 6302bcc48ffaSStephen M. Cameron } 630350a0decfSStephen M. Cameron c->SG[i].Addr = cpu_to_le64(temp64); 630450a0decfSStephen M. Cameron c->SG[i].Len = cpu_to_le32(buff_size[i]); 630550a0decfSStephen M. Cameron c->SG[i].Ext = cpu_to_le32(0); 6306edd16368SStephen M. Cameron } 630750a0decfSStephen M. Cameron c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST); 6308edd16368SStephen M. Cameron } 6309c448ecfaSDon Brace status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 63103fb134cbSDon Brace NO_TIMEOUT); 6311b03a7771SStephen M. Cameron if (sg_used) 6312edd16368SStephen M. Cameron hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL); 6313edd16368SStephen M. Cameron check_ioctl_unit_attention(h, c); 631425163bd5SWebb Scales if (status) { 631525163bd5SWebb Scales status = -EIO; 631625163bd5SWebb Scales goto cleanup0; 631725163bd5SWebb Scales } 631825163bd5SWebb Scales 6319edd16368SStephen M. Cameron /* Copy the error information out */ 6320edd16368SStephen M. Cameron memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info)); 6321edd16368SStephen M. Cameron if (copy_to_user(argp, ioc, sizeof(*ioc))) { 6322edd16368SStephen M. Cameron status = -EFAULT; 6323e2d4a1f6SStephen M. Cameron goto cleanup0; 6324edd16368SStephen M. Cameron } 63259233fb10SStephen M. Cameron if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) { 63262b08b3e9SDon Brace int i; 63272b08b3e9SDon Brace 6328edd16368SStephen M. Cameron /* Copy the data out of the buffer we created */ 6329edd16368SStephen M. Cameron BYTE __user *ptr = ioc->buf; 6330edd16368SStephen M. Cameron for (i = 0; i < sg_used; i++) { 6331edd16368SStephen M. Cameron if (copy_to_user(ptr, buff[i], buff_size[i])) { 6332edd16368SStephen M. Cameron status = -EFAULT; 6333e2d4a1f6SStephen M. Cameron goto cleanup0; 6334edd16368SStephen M. Cameron } 6335edd16368SStephen M. Cameron ptr += buff_size[i]; 6336edd16368SStephen M. Cameron } 6337edd16368SStephen M. Cameron } 6338edd16368SStephen M. Cameron status = 0; 6339e2d4a1f6SStephen M. Cameron cleanup0: 634045fcb86eSStephen Cameron cmd_free(h, c); 6341edd16368SStephen M. Cameron cleanup1: 6342edd16368SStephen M. Cameron if (buff) { 63432b08b3e9SDon Brace int i; 63442b08b3e9SDon Brace 6345edd16368SStephen M. Cameron for (i = 0; i < sg_used; i++) 6346edd16368SStephen M. Cameron kfree(buff[i]); 6347edd16368SStephen M. Cameron kfree(buff); 6348edd16368SStephen M. Cameron } 6349edd16368SStephen M. Cameron kfree(buff_size); 6350edd16368SStephen M. Cameron kfree(ioc); 6351edd16368SStephen M. Cameron return status; 6352edd16368SStephen M. Cameron } 6353edd16368SStephen M. Cameron 6354edd16368SStephen M. Cameron static void check_ioctl_unit_attention(struct ctlr_info *h, 6355edd16368SStephen M. Cameron struct CommandList *c) 6356edd16368SStephen M. Cameron { 6357edd16368SStephen M. Cameron if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 6358edd16368SStephen M. Cameron c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) 6359edd16368SStephen M. Cameron (void) check_for_unit_attention(h, c); 6360edd16368SStephen M. Cameron } 63610390f0c0SStephen M. Cameron 6362edd16368SStephen M. Cameron /* 6363edd16368SStephen M. Cameron * ioctl 6364edd16368SStephen M. Cameron */ 636542a91641SDon Brace static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg) 6366edd16368SStephen M. Cameron { 6367edd16368SStephen M. Cameron struct ctlr_info *h; 6368edd16368SStephen M. Cameron void __user *argp = (void __user *)arg; 63690390f0c0SStephen M. Cameron int rc; 6370edd16368SStephen M. Cameron 6371edd16368SStephen M. Cameron h = sdev_to_hba(dev); 6372edd16368SStephen M. Cameron 6373edd16368SStephen M. Cameron switch (cmd) { 6374edd16368SStephen M. Cameron case CCISS_DEREGDISK: 6375edd16368SStephen M. Cameron case CCISS_REGNEWDISK: 6376edd16368SStephen M. Cameron case CCISS_REGNEWD: 6377a08a8471SStephen M. Cameron hpsa_scan_start(h->scsi_host); 6378edd16368SStephen M. Cameron return 0; 6379edd16368SStephen M. Cameron case CCISS_GETPCIINFO: 6380edd16368SStephen M. Cameron return hpsa_getpciinfo_ioctl(h, argp); 6381edd16368SStephen M. Cameron case CCISS_GETDRIVVER: 6382edd16368SStephen M. Cameron return hpsa_getdrivver_ioctl(h, argp); 6383edd16368SStephen M. Cameron case CCISS_PASSTHRU: 638434f0c627SDon Brace if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 63850390f0c0SStephen M. Cameron return -EAGAIN; 63860390f0c0SStephen M. Cameron rc = hpsa_passthru_ioctl(h, argp); 638734f0c627SDon Brace atomic_inc(&h->passthru_cmds_avail); 63880390f0c0SStephen M. Cameron return rc; 6389edd16368SStephen M. Cameron case CCISS_BIG_PASSTHRU: 639034f0c627SDon Brace if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 63910390f0c0SStephen M. Cameron return -EAGAIN; 63920390f0c0SStephen M. Cameron rc = hpsa_big_passthru_ioctl(h, argp); 639334f0c627SDon Brace atomic_inc(&h->passthru_cmds_avail); 63940390f0c0SStephen M. Cameron return rc; 6395edd16368SStephen M. Cameron default: 6396edd16368SStephen M. Cameron return -ENOTTY; 6397edd16368SStephen M. Cameron } 6398edd16368SStephen M. Cameron } 6399edd16368SStephen M. Cameron 6400bf43caf3SRobert Elliott static void hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr, 64016f039790SGreg Kroah-Hartman u8 reset_type) 640264670ac8SStephen M. Cameron { 640364670ac8SStephen M. Cameron struct CommandList *c; 640464670ac8SStephen M. Cameron 640564670ac8SStephen M. Cameron c = cmd_alloc(h); 6406bf43caf3SRobert Elliott 6407a2dac136SStephen M. Cameron /* fill_cmd can't fail here, no data buffer to map */ 6408a2dac136SStephen M. Cameron (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, 640964670ac8SStephen M. Cameron RAID_CTLR_LUNID, TYPE_MSG); 641064670ac8SStephen M. Cameron c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */ 641164670ac8SStephen M. Cameron c->waiting = NULL; 641264670ac8SStephen M. Cameron enqueue_cmd_and_start_io(h, c); 641364670ac8SStephen M. Cameron /* Don't wait for completion, the reset won't complete. Don't free 641464670ac8SStephen M. Cameron * the command either. This is the last command we will send before 641564670ac8SStephen M. Cameron * re-initializing everything, so it doesn't matter and won't leak. 641664670ac8SStephen M. Cameron */ 6417bf43caf3SRobert Elliott return; 641864670ac8SStephen M. Cameron } 641964670ac8SStephen M. Cameron 6420a2dac136SStephen M. Cameron static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 6421b7bb24ebSStephen M. Cameron void *buff, size_t size, u16 page_code, unsigned char *scsi3addr, 6422edd16368SStephen M. Cameron int cmd_type) 6423edd16368SStephen M. Cameron { 6424edd16368SStephen M. Cameron int pci_dir = XFER_NONE; 6425edd16368SStephen M. Cameron 6426edd16368SStephen M. Cameron c->cmd_type = CMD_IOCTL_PEND; 6427a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 6428edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; 6429edd16368SStephen M. Cameron if (buff != NULL && size > 0) { 6430edd16368SStephen M. Cameron c->Header.SGList = 1; 643150a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(1); 6432edd16368SStephen M. Cameron } else { 6433edd16368SStephen M. Cameron c->Header.SGList = 0; 643450a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(0); 6435edd16368SStephen M. Cameron } 6436edd16368SStephen M. Cameron memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8); 6437edd16368SStephen M. Cameron 6438edd16368SStephen M. Cameron if (cmd_type == TYPE_CMD) { 6439edd16368SStephen M. Cameron switch (cmd) { 6440edd16368SStephen M. Cameron case HPSA_INQUIRY: 6441edd16368SStephen M. Cameron /* are we trying to read a vital product page */ 6442b7bb24ebSStephen M. Cameron if (page_code & VPD_PAGE) { 6443edd16368SStephen M. Cameron c->Request.CDB[1] = 0x01; 6444b7bb24ebSStephen M. Cameron c->Request.CDB[2] = (page_code & 0xff); 6445edd16368SStephen M. Cameron } 6446edd16368SStephen M. Cameron c->Request.CDBLen = 6; 6447a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6448a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6449edd16368SStephen M. Cameron c->Request.Timeout = 0; 6450edd16368SStephen M. Cameron c->Request.CDB[0] = HPSA_INQUIRY; 6451edd16368SStephen M. Cameron c->Request.CDB[4] = size & 0xFF; 6452edd16368SStephen M. Cameron break; 6453edd16368SStephen M. Cameron case HPSA_REPORT_LOG: 6454edd16368SStephen M. Cameron case HPSA_REPORT_PHYS: 6455edd16368SStephen M. Cameron /* Talking to controller so It's a physical command 6456edd16368SStephen M. Cameron mode = 00 target = 0. Nothing to write. 6457edd16368SStephen M. Cameron */ 6458edd16368SStephen M. Cameron c->Request.CDBLen = 12; 6459a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6460a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6461edd16368SStephen M. Cameron c->Request.Timeout = 0; 6462edd16368SStephen M. Cameron c->Request.CDB[0] = cmd; 6463edd16368SStephen M. Cameron c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 6464edd16368SStephen M. Cameron c->Request.CDB[7] = (size >> 16) & 0xFF; 6465edd16368SStephen M. Cameron c->Request.CDB[8] = (size >> 8) & 0xFF; 6466edd16368SStephen M. Cameron c->Request.CDB[9] = size & 0xFF; 6467edd16368SStephen M. Cameron break; 6468c2adae44SScott Teel case BMIC_SENSE_DIAG_OPTIONS: 6469c2adae44SScott Teel c->Request.CDBLen = 16; 6470c2adae44SScott Teel c->Request.type_attr_dir = 6471c2adae44SScott Teel TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6472c2adae44SScott Teel c->Request.Timeout = 0; 6473c2adae44SScott Teel /* Spec says this should be BMIC_WRITE */ 6474c2adae44SScott Teel c->Request.CDB[0] = BMIC_READ; 6475c2adae44SScott Teel c->Request.CDB[6] = BMIC_SENSE_DIAG_OPTIONS; 6476c2adae44SScott Teel break; 6477c2adae44SScott Teel case BMIC_SET_DIAG_OPTIONS: 6478c2adae44SScott Teel c->Request.CDBLen = 16; 6479c2adae44SScott Teel c->Request.type_attr_dir = 6480c2adae44SScott Teel TYPE_ATTR_DIR(cmd_type, 6481c2adae44SScott Teel ATTR_SIMPLE, XFER_WRITE); 6482c2adae44SScott Teel c->Request.Timeout = 0; 6483c2adae44SScott Teel c->Request.CDB[0] = BMIC_WRITE; 6484c2adae44SScott Teel c->Request.CDB[6] = BMIC_SET_DIAG_OPTIONS; 6485c2adae44SScott Teel break; 6486edd16368SStephen M. Cameron case HPSA_CACHE_FLUSH: 6487edd16368SStephen M. Cameron c->Request.CDBLen = 12; 6488a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6489a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, 6490a505b86fSStephen M. Cameron ATTR_SIMPLE, XFER_WRITE); 6491edd16368SStephen M. Cameron c->Request.Timeout = 0; 6492edd16368SStephen M. Cameron c->Request.CDB[0] = BMIC_WRITE; 6493edd16368SStephen M. Cameron c->Request.CDB[6] = BMIC_CACHE_FLUSH; 6494bb158eabSStephen M. Cameron c->Request.CDB[7] = (size >> 8) & 0xFF; 6495bb158eabSStephen M. Cameron c->Request.CDB[8] = size & 0xFF; 6496edd16368SStephen M. Cameron break; 6497edd16368SStephen M. Cameron case TEST_UNIT_READY: 6498edd16368SStephen M. Cameron c->Request.CDBLen = 6; 6499a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6500a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 6501edd16368SStephen M. Cameron c->Request.Timeout = 0; 6502edd16368SStephen M. Cameron break; 6503283b4a9bSStephen M. Cameron case HPSA_GET_RAID_MAP: 6504283b4a9bSStephen M. Cameron c->Request.CDBLen = 12; 6505a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6506a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6507283b4a9bSStephen M. Cameron c->Request.Timeout = 0; 6508283b4a9bSStephen M. Cameron c->Request.CDB[0] = HPSA_CISS_READ; 6509283b4a9bSStephen M. Cameron c->Request.CDB[1] = cmd; 6510283b4a9bSStephen M. Cameron c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 6511283b4a9bSStephen M. Cameron c->Request.CDB[7] = (size >> 16) & 0xFF; 6512283b4a9bSStephen M. Cameron c->Request.CDB[8] = (size >> 8) & 0xFF; 6513283b4a9bSStephen M. Cameron c->Request.CDB[9] = size & 0xFF; 6514283b4a9bSStephen M. Cameron break; 6515316b221aSStephen M. Cameron case BMIC_SENSE_CONTROLLER_PARAMETERS: 6516316b221aSStephen M. Cameron c->Request.CDBLen = 10; 6517a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6518a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6519316b221aSStephen M. Cameron c->Request.Timeout = 0; 6520316b221aSStephen M. Cameron c->Request.CDB[0] = BMIC_READ; 6521316b221aSStephen M. Cameron c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS; 6522316b221aSStephen M. Cameron c->Request.CDB[7] = (size >> 16) & 0xFF; 6523316b221aSStephen M. Cameron c->Request.CDB[8] = (size >> 8) & 0xFF; 6524316b221aSStephen M. Cameron break; 652503383736SDon Brace case BMIC_IDENTIFY_PHYSICAL_DEVICE: 652603383736SDon Brace c->Request.CDBLen = 10; 652703383736SDon Brace c->Request.type_attr_dir = 652803383736SDon Brace TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 652903383736SDon Brace c->Request.Timeout = 0; 653003383736SDon Brace c->Request.CDB[0] = BMIC_READ; 653103383736SDon Brace c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE; 653203383736SDon Brace c->Request.CDB[7] = (size >> 16) & 0xFF; 653303383736SDon Brace c->Request.CDB[8] = (size >> 8) & 0XFF; 653403383736SDon Brace break; 6535d04e62b9SKevin Barnett case BMIC_SENSE_SUBSYSTEM_INFORMATION: 6536d04e62b9SKevin Barnett c->Request.CDBLen = 10; 6537d04e62b9SKevin Barnett c->Request.type_attr_dir = 6538d04e62b9SKevin Barnett TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6539d04e62b9SKevin Barnett c->Request.Timeout = 0; 6540d04e62b9SKevin Barnett c->Request.CDB[0] = BMIC_READ; 6541d04e62b9SKevin Barnett c->Request.CDB[6] = BMIC_SENSE_SUBSYSTEM_INFORMATION; 6542d04e62b9SKevin Barnett c->Request.CDB[7] = (size >> 16) & 0xFF; 6543d04e62b9SKevin Barnett c->Request.CDB[8] = (size >> 8) & 0XFF; 6544d04e62b9SKevin Barnett break; 6545cca8f13bSDon Brace case BMIC_SENSE_STORAGE_BOX_PARAMS: 6546cca8f13bSDon Brace c->Request.CDBLen = 10; 6547cca8f13bSDon Brace c->Request.type_attr_dir = 6548cca8f13bSDon Brace TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6549cca8f13bSDon Brace c->Request.Timeout = 0; 6550cca8f13bSDon Brace c->Request.CDB[0] = BMIC_READ; 6551cca8f13bSDon Brace c->Request.CDB[6] = BMIC_SENSE_STORAGE_BOX_PARAMS; 6552cca8f13bSDon Brace c->Request.CDB[7] = (size >> 16) & 0xFF; 6553cca8f13bSDon Brace c->Request.CDB[8] = (size >> 8) & 0XFF; 6554cca8f13bSDon Brace break; 655566749d0dSScott Teel case BMIC_IDENTIFY_CONTROLLER: 655666749d0dSScott Teel c->Request.CDBLen = 10; 655766749d0dSScott Teel c->Request.type_attr_dir = 655866749d0dSScott Teel TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 655966749d0dSScott Teel c->Request.Timeout = 0; 656066749d0dSScott Teel c->Request.CDB[0] = BMIC_READ; 656166749d0dSScott Teel c->Request.CDB[1] = 0; 656266749d0dSScott Teel c->Request.CDB[2] = 0; 656366749d0dSScott Teel c->Request.CDB[3] = 0; 656466749d0dSScott Teel c->Request.CDB[4] = 0; 656566749d0dSScott Teel c->Request.CDB[5] = 0; 656666749d0dSScott Teel c->Request.CDB[6] = BMIC_IDENTIFY_CONTROLLER; 656766749d0dSScott Teel c->Request.CDB[7] = (size >> 16) & 0xFF; 656866749d0dSScott Teel c->Request.CDB[8] = (size >> 8) & 0XFF; 656966749d0dSScott Teel c->Request.CDB[9] = 0; 657066749d0dSScott Teel break; 6571edd16368SStephen M. Cameron default: 6572edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd); 6573edd16368SStephen M. Cameron BUG(); 6574a2dac136SStephen M. Cameron return -1; 6575edd16368SStephen M. Cameron } 6576edd16368SStephen M. Cameron } else if (cmd_type == TYPE_MSG) { 6577edd16368SStephen M. Cameron switch (cmd) { 6578edd16368SStephen M. Cameron 65790b9b7b6eSScott Teel case HPSA_PHYS_TARGET_RESET: 65800b9b7b6eSScott Teel c->Request.CDBLen = 16; 65810b9b7b6eSScott Teel c->Request.type_attr_dir = 65820b9b7b6eSScott Teel TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 65830b9b7b6eSScott Teel c->Request.Timeout = 0; /* Don't time out */ 65840b9b7b6eSScott Teel memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 65850b9b7b6eSScott Teel c->Request.CDB[0] = HPSA_RESET; 65860b9b7b6eSScott Teel c->Request.CDB[1] = HPSA_TARGET_RESET_TYPE; 65870b9b7b6eSScott Teel /* Physical target reset needs no control bytes 4-7*/ 65880b9b7b6eSScott Teel c->Request.CDB[4] = 0x00; 65890b9b7b6eSScott Teel c->Request.CDB[5] = 0x00; 65900b9b7b6eSScott Teel c->Request.CDB[6] = 0x00; 65910b9b7b6eSScott Teel c->Request.CDB[7] = 0x00; 65920b9b7b6eSScott Teel break; 6593edd16368SStephen M. Cameron case HPSA_DEVICE_RESET_MSG: 6594edd16368SStephen M. Cameron c->Request.CDBLen = 16; 6595a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6596a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 6597edd16368SStephen M. Cameron c->Request.Timeout = 0; /* Don't time out */ 659864670ac8SStephen M. Cameron memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 659964670ac8SStephen M. Cameron c->Request.CDB[0] = cmd; 660021e89afdSStephen M. Cameron c->Request.CDB[1] = HPSA_RESET_TYPE_LUN; 6601edd16368SStephen M. Cameron /* If bytes 4-7 are zero, it means reset the */ 6602edd16368SStephen M. Cameron /* LunID device */ 6603edd16368SStephen M. Cameron c->Request.CDB[4] = 0x00; 6604edd16368SStephen M. Cameron c->Request.CDB[5] = 0x00; 6605edd16368SStephen M. Cameron c->Request.CDB[6] = 0x00; 6606edd16368SStephen M. Cameron c->Request.CDB[7] = 0x00; 6607edd16368SStephen M. Cameron break; 6608edd16368SStephen M. Cameron default: 6609edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "unknown message type %d\n", 6610edd16368SStephen M. Cameron cmd); 6611edd16368SStephen M. Cameron BUG(); 6612edd16368SStephen M. Cameron } 6613edd16368SStephen M. Cameron } else { 6614edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type); 6615edd16368SStephen M. Cameron BUG(); 6616edd16368SStephen M. Cameron } 6617edd16368SStephen M. Cameron 6618a505b86fSStephen M. Cameron switch (GET_DIR(c->Request.type_attr_dir)) { 6619edd16368SStephen M. Cameron case XFER_READ: 6620edd16368SStephen M. Cameron pci_dir = PCI_DMA_FROMDEVICE; 6621edd16368SStephen M. Cameron break; 6622edd16368SStephen M. Cameron case XFER_WRITE: 6623edd16368SStephen M. Cameron pci_dir = PCI_DMA_TODEVICE; 6624edd16368SStephen M. Cameron break; 6625edd16368SStephen M. Cameron case XFER_NONE: 6626edd16368SStephen M. Cameron pci_dir = PCI_DMA_NONE; 6627edd16368SStephen M. Cameron break; 6628edd16368SStephen M. Cameron default: 6629edd16368SStephen M. Cameron pci_dir = PCI_DMA_BIDIRECTIONAL; 6630edd16368SStephen M. Cameron } 6631a2dac136SStephen M. Cameron if (hpsa_map_one(h->pdev, c, buff, size, pci_dir)) 6632a2dac136SStephen M. Cameron return -1; 6633a2dac136SStephen M. Cameron return 0; 6634edd16368SStephen M. Cameron } 6635edd16368SStephen M. Cameron 6636edd16368SStephen M. Cameron /* 6637edd16368SStephen M. Cameron * Map (physical) PCI mem into (virtual) kernel space 6638edd16368SStephen M. Cameron */ 6639edd16368SStephen M. Cameron static void __iomem *remap_pci_mem(ulong base, ulong size) 6640edd16368SStephen M. Cameron { 6641edd16368SStephen M. Cameron ulong page_base = ((ulong) base) & PAGE_MASK; 6642edd16368SStephen M. Cameron ulong page_offs = ((ulong) base) - page_base; 6643088ba34cSStephen M. Cameron void __iomem *page_remapped = ioremap_nocache(page_base, 6644088ba34cSStephen M. Cameron page_offs + size); 6645edd16368SStephen M. Cameron 6646edd16368SStephen M. Cameron return page_remapped ? (page_remapped + page_offs) : NULL; 6647edd16368SStephen M. Cameron } 6648edd16368SStephen M. Cameron 6649254f796bSMatt Gates static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q) 6650edd16368SStephen M. Cameron { 6651254f796bSMatt Gates return h->access.command_completed(h, q); 6652edd16368SStephen M. Cameron } 6653edd16368SStephen M. Cameron 6654900c5440SStephen M. Cameron static inline bool interrupt_pending(struct ctlr_info *h) 6655edd16368SStephen M. Cameron { 6656edd16368SStephen M. Cameron return h->access.intr_pending(h); 6657edd16368SStephen M. Cameron } 6658edd16368SStephen M. Cameron 6659edd16368SStephen M. Cameron static inline long interrupt_not_for_us(struct ctlr_info *h) 6660edd16368SStephen M. Cameron { 666110f66018SStephen M. Cameron return (h->access.intr_pending(h) == 0) || 666210f66018SStephen M. Cameron (h->interrupts_enabled == 0); 6663edd16368SStephen M. Cameron } 6664edd16368SStephen M. Cameron 666501a02ffcSStephen M. Cameron static inline int bad_tag(struct ctlr_info *h, u32 tag_index, 666601a02ffcSStephen M. Cameron u32 raw_tag) 6667edd16368SStephen M. Cameron { 6668edd16368SStephen M. Cameron if (unlikely(tag_index >= h->nr_cmds)) { 6669edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag); 6670edd16368SStephen M. Cameron return 1; 6671edd16368SStephen M. Cameron } 6672edd16368SStephen M. Cameron return 0; 6673edd16368SStephen M. Cameron } 6674edd16368SStephen M. Cameron 66755a3d16f5SStephen M. Cameron static inline void finish_cmd(struct CommandList *c) 6676edd16368SStephen M. Cameron { 6677e85c5974SStephen M. Cameron dial_up_lockup_detection_on_fw_flash_complete(c->h, c); 6678c349775eSScott Teel if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI 6679c349775eSScott Teel || c->cmd_type == CMD_IOACCEL2)) 66801fb011fbSStephen M. Cameron complete_scsi_command(c); 66818be986ccSStephen Cameron else if (c->cmd_type == CMD_IOCTL_PEND || c->cmd_type == IOACCEL2_TMF) 6682edd16368SStephen M. Cameron complete(c->waiting); 6683a104c99fSStephen M. Cameron } 6684a104c99fSStephen M. Cameron 6685303932fdSDon Brace /* process completion of an indexed ("direct lookup") command */ 66861d94f94dSStephen M. Cameron static inline void process_indexed_cmd(struct ctlr_info *h, 6687303932fdSDon Brace u32 raw_tag) 6688303932fdSDon Brace { 6689303932fdSDon Brace u32 tag_index; 6690303932fdSDon Brace struct CommandList *c; 6691303932fdSDon Brace 6692f2405db8SDon Brace tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT; 66931d94f94dSStephen M. Cameron if (!bad_tag(h, tag_index, raw_tag)) { 6694303932fdSDon Brace c = h->cmd_pool + tag_index; 66955a3d16f5SStephen M. Cameron finish_cmd(c); 66961d94f94dSStephen M. Cameron } 6697303932fdSDon Brace } 6698303932fdSDon Brace 669964670ac8SStephen M. Cameron /* Some controllers, like p400, will give us one interrupt 670064670ac8SStephen M. Cameron * after a soft reset, even if we turned interrupts off. 670164670ac8SStephen M. Cameron * Only need to check for this in the hpsa_xxx_discard_completions 670264670ac8SStephen M. Cameron * functions. 670364670ac8SStephen M. Cameron */ 670464670ac8SStephen M. Cameron static int ignore_bogus_interrupt(struct ctlr_info *h) 670564670ac8SStephen M. Cameron { 670664670ac8SStephen M. Cameron if (likely(!reset_devices)) 670764670ac8SStephen M. Cameron return 0; 670864670ac8SStephen M. Cameron 670964670ac8SStephen M. Cameron if (likely(h->interrupts_enabled)) 671064670ac8SStephen M. Cameron return 0; 671164670ac8SStephen M. Cameron 671264670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled " 671364670ac8SStephen M. Cameron "(known firmware bug.) Ignoring.\n"); 671464670ac8SStephen M. Cameron 671564670ac8SStephen M. Cameron return 1; 671664670ac8SStephen M. Cameron } 671764670ac8SStephen M. Cameron 6718254f796bSMatt Gates /* 6719254f796bSMatt Gates * Convert &h->q[x] (passed to interrupt handlers) back to h. 6720254f796bSMatt Gates * Relies on (h-q[x] == x) being true for x such that 6721254f796bSMatt Gates * 0 <= x < MAX_REPLY_QUEUES. 6722254f796bSMatt Gates */ 6723254f796bSMatt Gates static struct ctlr_info *queue_to_hba(u8 *queue) 672464670ac8SStephen M. Cameron { 6725254f796bSMatt Gates return container_of((queue - *queue), struct ctlr_info, q[0]); 6726254f796bSMatt Gates } 6727254f796bSMatt Gates 6728254f796bSMatt Gates static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue) 6729254f796bSMatt Gates { 6730254f796bSMatt Gates struct ctlr_info *h = queue_to_hba(queue); 6731254f796bSMatt Gates u8 q = *(u8 *) queue; 673264670ac8SStephen M. Cameron u32 raw_tag; 673364670ac8SStephen M. Cameron 673464670ac8SStephen M. Cameron if (ignore_bogus_interrupt(h)) 673564670ac8SStephen M. Cameron return IRQ_NONE; 673664670ac8SStephen M. Cameron 673764670ac8SStephen M. Cameron if (interrupt_not_for_us(h)) 673864670ac8SStephen M. Cameron return IRQ_NONE; 6739a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 674064670ac8SStephen M. Cameron while (interrupt_pending(h)) { 6741254f796bSMatt Gates raw_tag = get_next_completion(h, q); 674264670ac8SStephen M. Cameron while (raw_tag != FIFO_EMPTY) 6743254f796bSMatt Gates raw_tag = next_command(h, q); 674464670ac8SStephen M. Cameron } 674564670ac8SStephen M. Cameron return IRQ_HANDLED; 674664670ac8SStephen M. Cameron } 674764670ac8SStephen M. Cameron 6748254f796bSMatt Gates static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue) 674964670ac8SStephen M. Cameron { 6750254f796bSMatt Gates struct ctlr_info *h = queue_to_hba(queue); 675164670ac8SStephen M. Cameron u32 raw_tag; 6752254f796bSMatt Gates u8 q = *(u8 *) queue; 675364670ac8SStephen M. Cameron 675464670ac8SStephen M. Cameron if (ignore_bogus_interrupt(h)) 675564670ac8SStephen M. Cameron return IRQ_NONE; 675664670ac8SStephen M. Cameron 6757a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 6758254f796bSMatt Gates raw_tag = get_next_completion(h, q); 675964670ac8SStephen M. Cameron while (raw_tag != FIFO_EMPTY) 6760254f796bSMatt Gates raw_tag = next_command(h, q); 676164670ac8SStephen M. Cameron return IRQ_HANDLED; 676264670ac8SStephen M. Cameron } 676364670ac8SStephen M. Cameron 6764254f796bSMatt Gates static irqreturn_t do_hpsa_intr_intx(int irq, void *queue) 6765edd16368SStephen M. Cameron { 6766254f796bSMatt Gates struct ctlr_info *h = queue_to_hba((u8 *) queue); 6767303932fdSDon Brace u32 raw_tag; 6768254f796bSMatt Gates u8 q = *(u8 *) queue; 6769edd16368SStephen M. Cameron 6770edd16368SStephen M. Cameron if (interrupt_not_for_us(h)) 6771edd16368SStephen M. Cameron return IRQ_NONE; 6772a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 677310f66018SStephen M. Cameron while (interrupt_pending(h)) { 6774254f796bSMatt Gates raw_tag = get_next_completion(h, q); 677510f66018SStephen M. Cameron while (raw_tag != FIFO_EMPTY) { 67761d94f94dSStephen M. Cameron process_indexed_cmd(h, raw_tag); 6777254f796bSMatt Gates raw_tag = next_command(h, q); 677810f66018SStephen M. Cameron } 677910f66018SStephen M. Cameron } 678010f66018SStephen M. Cameron return IRQ_HANDLED; 678110f66018SStephen M. Cameron } 678210f66018SStephen M. Cameron 6783254f796bSMatt Gates static irqreturn_t do_hpsa_intr_msi(int irq, void *queue) 678410f66018SStephen M. Cameron { 6785254f796bSMatt Gates struct ctlr_info *h = queue_to_hba(queue); 678610f66018SStephen M. Cameron u32 raw_tag; 6787254f796bSMatt Gates u8 q = *(u8 *) queue; 678810f66018SStephen M. Cameron 6789a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 6790254f796bSMatt Gates raw_tag = get_next_completion(h, q); 6791303932fdSDon Brace while (raw_tag != FIFO_EMPTY) { 67921d94f94dSStephen M. Cameron process_indexed_cmd(h, raw_tag); 6793254f796bSMatt Gates raw_tag = next_command(h, q); 6794edd16368SStephen M. Cameron } 6795edd16368SStephen M. Cameron return IRQ_HANDLED; 6796edd16368SStephen M. Cameron } 6797edd16368SStephen M. Cameron 6798a9a3a273SStephen M. Cameron /* Send a message CDB to the firmware. Careful, this only works 6799a9a3a273SStephen M. Cameron * in simple mode, not performant mode due to the tag lookup. 6800a9a3a273SStephen M. Cameron * We only ever use this immediately after a controller reset. 6801a9a3a273SStephen M. Cameron */ 68026f039790SGreg Kroah-Hartman static int hpsa_message(struct pci_dev *pdev, unsigned char opcode, 6803edd16368SStephen M. Cameron unsigned char type) 6804edd16368SStephen M. Cameron { 6805edd16368SStephen M. Cameron struct Command { 6806edd16368SStephen M. Cameron struct CommandListHeader CommandHeader; 6807edd16368SStephen M. Cameron struct RequestBlock Request; 6808edd16368SStephen M. Cameron struct ErrDescriptor ErrorDescriptor; 6809edd16368SStephen M. Cameron }; 6810edd16368SStephen M. Cameron struct Command *cmd; 6811edd16368SStephen M. Cameron static const size_t cmd_sz = sizeof(*cmd) + 6812edd16368SStephen M. Cameron sizeof(cmd->ErrorDescriptor); 6813edd16368SStephen M. Cameron dma_addr_t paddr64; 68142b08b3e9SDon Brace __le32 paddr32; 68152b08b3e9SDon Brace u32 tag; 6816edd16368SStephen M. Cameron void __iomem *vaddr; 6817edd16368SStephen M. Cameron int i, err; 6818edd16368SStephen M. Cameron 6819edd16368SStephen M. Cameron vaddr = pci_ioremap_bar(pdev, 0); 6820edd16368SStephen M. Cameron if (vaddr == NULL) 6821edd16368SStephen M. Cameron return -ENOMEM; 6822edd16368SStephen M. Cameron 6823edd16368SStephen M. Cameron /* The Inbound Post Queue only accepts 32-bit physical addresses for the 6824edd16368SStephen M. Cameron * CCISS commands, so they must be allocated from the lower 4GiB of 6825edd16368SStephen M. Cameron * memory. 6826edd16368SStephen M. Cameron */ 6827edd16368SStephen M. Cameron err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 6828edd16368SStephen M. Cameron if (err) { 6829edd16368SStephen M. Cameron iounmap(vaddr); 68301eaec8f3SRobert Elliott return err; 6831edd16368SStephen M. Cameron } 6832edd16368SStephen M. Cameron 6833edd16368SStephen M. Cameron cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64); 6834edd16368SStephen M. Cameron if (cmd == NULL) { 6835edd16368SStephen M. Cameron iounmap(vaddr); 6836edd16368SStephen M. Cameron return -ENOMEM; 6837edd16368SStephen M. Cameron } 6838edd16368SStephen M. Cameron 6839edd16368SStephen M. Cameron /* This must fit, because of the 32-bit consistent DMA mask. Also, 6840edd16368SStephen M. Cameron * although there's no guarantee, we assume that the address is at 6841edd16368SStephen M. Cameron * least 4-byte aligned (most likely, it's page-aligned). 6842edd16368SStephen M. Cameron */ 68432b08b3e9SDon Brace paddr32 = cpu_to_le32(paddr64); 6844edd16368SStephen M. Cameron 6845edd16368SStephen M. Cameron cmd->CommandHeader.ReplyQueue = 0; 6846edd16368SStephen M. Cameron cmd->CommandHeader.SGList = 0; 684750a0decfSStephen M. Cameron cmd->CommandHeader.SGTotal = cpu_to_le16(0); 68482b08b3e9SDon Brace cmd->CommandHeader.tag = cpu_to_le64(paddr64); 6849edd16368SStephen M. Cameron memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8); 6850edd16368SStephen M. Cameron 6851edd16368SStephen M. Cameron cmd->Request.CDBLen = 16; 6852a505b86fSStephen M. Cameron cmd->Request.type_attr_dir = 6853a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE); 6854edd16368SStephen M. Cameron cmd->Request.Timeout = 0; /* Don't time out */ 6855edd16368SStephen M. Cameron cmd->Request.CDB[0] = opcode; 6856edd16368SStephen M. Cameron cmd->Request.CDB[1] = type; 6857edd16368SStephen M. Cameron memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */ 685850a0decfSStephen M. Cameron cmd->ErrorDescriptor.Addr = 68592b08b3e9SDon Brace cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd))); 686050a0decfSStephen M. Cameron cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo)); 6861edd16368SStephen M. Cameron 68622b08b3e9SDon Brace writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET); 6863edd16368SStephen M. Cameron 6864edd16368SStephen M. Cameron for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) { 6865edd16368SStephen M. Cameron tag = readl(vaddr + SA5_REPLY_PORT_OFFSET); 68662b08b3e9SDon Brace if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64) 6867edd16368SStephen M. Cameron break; 6868edd16368SStephen M. Cameron msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS); 6869edd16368SStephen M. Cameron } 6870edd16368SStephen M. Cameron 6871edd16368SStephen M. Cameron iounmap(vaddr); 6872edd16368SStephen M. Cameron 6873edd16368SStephen M. Cameron /* we leak the DMA buffer here ... no choice since the controller could 6874edd16368SStephen M. Cameron * still complete the command. 6875edd16368SStephen M. Cameron */ 6876edd16368SStephen M. Cameron if (i == HPSA_MSG_SEND_RETRY_LIMIT) { 6877edd16368SStephen M. Cameron dev_err(&pdev->dev, "controller message %02x:%02x timed out\n", 6878edd16368SStephen M. Cameron opcode, type); 6879edd16368SStephen M. Cameron return -ETIMEDOUT; 6880edd16368SStephen M. Cameron } 6881edd16368SStephen M. Cameron 6882edd16368SStephen M. Cameron pci_free_consistent(pdev, cmd_sz, cmd, paddr64); 6883edd16368SStephen M. Cameron 6884edd16368SStephen M. Cameron if (tag & HPSA_ERROR_BIT) { 6885edd16368SStephen M. Cameron dev_err(&pdev->dev, "controller message %02x:%02x failed\n", 6886edd16368SStephen M. Cameron opcode, type); 6887edd16368SStephen M. Cameron return -EIO; 6888edd16368SStephen M. Cameron } 6889edd16368SStephen M. Cameron 6890edd16368SStephen M. Cameron dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n", 6891edd16368SStephen M. Cameron opcode, type); 6892edd16368SStephen M. Cameron return 0; 6893edd16368SStephen M. Cameron } 6894edd16368SStephen M. Cameron 6895edd16368SStephen M. Cameron #define hpsa_noop(p) hpsa_message(p, 3, 0) 6896edd16368SStephen M. Cameron 68971df8552aSStephen M. Cameron static int hpsa_controller_hard_reset(struct pci_dev *pdev, 689842a91641SDon Brace void __iomem *vaddr, u32 use_doorbell) 6899edd16368SStephen M. Cameron { 6900edd16368SStephen M. Cameron 69011df8552aSStephen M. Cameron if (use_doorbell) { 69021df8552aSStephen M. Cameron /* For everything after the P600, the PCI power state method 69031df8552aSStephen M. Cameron * of resetting the controller doesn't work, so we have this 69041df8552aSStephen M. Cameron * other way using the doorbell register. 6905edd16368SStephen M. Cameron */ 69061df8552aSStephen M. Cameron dev_info(&pdev->dev, "using doorbell to reset controller\n"); 6907cf0b08d0SStephen M. Cameron writel(use_doorbell, vaddr + SA5_DOORBELL); 690885009239SStephen M. Cameron 690900701a96SJustin Lindley /* PMC hardware guys tell us we need a 10 second delay after 691085009239SStephen M. Cameron * doorbell reset and before any attempt to talk to the board 691185009239SStephen M. Cameron * at all to ensure that this actually works and doesn't fall 691285009239SStephen M. Cameron * over in some weird corner cases. 691385009239SStephen M. Cameron */ 691400701a96SJustin Lindley msleep(10000); 69151df8552aSStephen M. Cameron } else { /* Try to do it the PCI power state way */ 6916edd16368SStephen M. Cameron 6917edd16368SStephen M. Cameron /* Quoting from the Open CISS Specification: "The Power 6918edd16368SStephen M. Cameron * Management Control/Status Register (CSR) controls the power 6919edd16368SStephen M. Cameron * state of the device. The normal operating state is D0, 6920edd16368SStephen M. Cameron * CSR=00h. The software off state is D3, CSR=03h. To reset 69211df8552aSStephen M. Cameron * the controller, place the interface device in D3 then to D0, 69221df8552aSStephen M. Cameron * this causes a secondary PCI reset which will reset the 69231df8552aSStephen M. Cameron * controller." */ 6924edd16368SStephen M. Cameron 69252662cab8SDon Brace int rc = 0; 69262662cab8SDon Brace 69271df8552aSStephen M. Cameron dev_info(&pdev->dev, "using PCI PM to reset controller\n"); 69282662cab8SDon Brace 6929edd16368SStephen M. Cameron /* enter the D3hot power management state */ 69302662cab8SDon Brace rc = pci_set_power_state(pdev, PCI_D3hot); 69312662cab8SDon Brace if (rc) 69322662cab8SDon Brace return rc; 6933edd16368SStephen M. Cameron 6934edd16368SStephen M. Cameron msleep(500); 6935edd16368SStephen M. Cameron 6936edd16368SStephen M. Cameron /* enter the D0 power management state */ 69372662cab8SDon Brace rc = pci_set_power_state(pdev, PCI_D0); 69382662cab8SDon Brace if (rc) 69392662cab8SDon Brace return rc; 6940c4853efeSMike Miller 6941c4853efeSMike Miller /* 6942c4853efeSMike Miller * The P600 requires a small delay when changing states. 6943c4853efeSMike Miller * Otherwise we may think the board did not reset and we bail. 6944c4853efeSMike Miller * This for kdump only and is particular to the P600. 6945c4853efeSMike Miller */ 6946c4853efeSMike Miller msleep(500); 69471df8552aSStephen M. Cameron } 69481df8552aSStephen M. Cameron return 0; 69491df8552aSStephen M. Cameron } 69501df8552aSStephen M. Cameron 69516f039790SGreg Kroah-Hartman static void init_driver_version(char *driver_version, int len) 6952580ada3cSStephen M. Cameron { 6953580ada3cSStephen M. Cameron memset(driver_version, 0, len); 6954f79cfec6SStephen M. Cameron strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1); 6955580ada3cSStephen M. Cameron } 6956580ada3cSStephen M. Cameron 69576f039790SGreg Kroah-Hartman static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable) 6958580ada3cSStephen M. Cameron { 6959580ada3cSStephen M. Cameron char *driver_version; 6960580ada3cSStephen M. Cameron int i, size = sizeof(cfgtable->driver_version); 6961580ada3cSStephen M. Cameron 6962580ada3cSStephen M. Cameron driver_version = kmalloc(size, GFP_KERNEL); 6963580ada3cSStephen M. Cameron if (!driver_version) 6964580ada3cSStephen M. Cameron return -ENOMEM; 6965580ada3cSStephen M. Cameron 6966580ada3cSStephen M. Cameron init_driver_version(driver_version, size); 6967580ada3cSStephen M. Cameron for (i = 0; i < size; i++) 6968580ada3cSStephen M. Cameron writeb(driver_version[i], &cfgtable->driver_version[i]); 6969580ada3cSStephen M. Cameron kfree(driver_version); 6970580ada3cSStephen M. Cameron return 0; 6971580ada3cSStephen M. Cameron } 6972580ada3cSStephen M. Cameron 69736f039790SGreg Kroah-Hartman static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable, 69746f039790SGreg Kroah-Hartman unsigned char *driver_ver) 6975580ada3cSStephen M. Cameron { 6976580ada3cSStephen M. Cameron int i; 6977580ada3cSStephen M. Cameron 6978580ada3cSStephen M. Cameron for (i = 0; i < sizeof(cfgtable->driver_version); i++) 6979580ada3cSStephen M. Cameron driver_ver[i] = readb(&cfgtable->driver_version[i]); 6980580ada3cSStephen M. Cameron } 6981580ada3cSStephen M. Cameron 69826f039790SGreg Kroah-Hartman static int controller_reset_failed(struct CfgTable __iomem *cfgtable) 6983580ada3cSStephen M. Cameron { 6984580ada3cSStephen M. Cameron 6985580ada3cSStephen M. Cameron char *driver_ver, *old_driver_ver; 6986580ada3cSStephen M. Cameron int rc, size = sizeof(cfgtable->driver_version); 6987580ada3cSStephen M. Cameron 6988580ada3cSStephen M. Cameron old_driver_ver = kmalloc(2 * size, GFP_KERNEL); 6989580ada3cSStephen M. Cameron if (!old_driver_ver) 6990580ada3cSStephen M. Cameron return -ENOMEM; 6991580ada3cSStephen M. Cameron driver_ver = old_driver_ver + size; 6992580ada3cSStephen M. Cameron 6993580ada3cSStephen M. Cameron /* After a reset, the 32 bytes of "driver version" in the cfgtable 6994580ada3cSStephen M. Cameron * should have been changed, otherwise we know the reset failed. 6995580ada3cSStephen M. Cameron */ 6996580ada3cSStephen M. Cameron init_driver_version(old_driver_ver, size); 6997580ada3cSStephen M. Cameron read_driver_ver_from_cfgtable(cfgtable, driver_ver); 6998580ada3cSStephen M. Cameron rc = !memcmp(driver_ver, old_driver_ver, size); 6999580ada3cSStephen M. Cameron kfree(old_driver_ver); 7000580ada3cSStephen M. Cameron return rc; 7001580ada3cSStephen M. Cameron } 70021df8552aSStephen M. Cameron /* This does a hard reset of the controller using PCI power management 70031df8552aSStephen M. Cameron * states or the using the doorbell register. 70041df8552aSStephen M. Cameron */ 70056b6c1cd7STomas Henzl static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id) 70061df8552aSStephen M. Cameron { 70071df8552aSStephen M. Cameron u64 cfg_offset; 70081df8552aSStephen M. Cameron u32 cfg_base_addr; 70091df8552aSStephen M. Cameron u64 cfg_base_addr_index; 70101df8552aSStephen M. Cameron void __iomem *vaddr; 70111df8552aSStephen M. Cameron unsigned long paddr; 7012580ada3cSStephen M. Cameron u32 misc_fw_support; 7013270d05deSStephen M. Cameron int rc; 70141df8552aSStephen M. Cameron struct CfgTable __iomem *cfgtable; 7015cf0b08d0SStephen M. Cameron u32 use_doorbell; 7016270d05deSStephen M. Cameron u16 command_register; 70171df8552aSStephen M. Cameron 70181df8552aSStephen M. Cameron /* For controllers as old as the P600, this is very nearly 70191df8552aSStephen M. Cameron * the same thing as 70201df8552aSStephen M. Cameron * 70211df8552aSStephen M. Cameron * pci_save_state(pci_dev); 70221df8552aSStephen M. Cameron * pci_set_power_state(pci_dev, PCI_D3hot); 70231df8552aSStephen M. Cameron * pci_set_power_state(pci_dev, PCI_D0); 70241df8552aSStephen M. Cameron * pci_restore_state(pci_dev); 70251df8552aSStephen M. Cameron * 70261df8552aSStephen M. Cameron * For controllers newer than the P600, the pci power state 70271df8552aSStephen M. Cameron * method of resetting doesn't work so we have another way 70281df8552aSStephen M. Cameron * using the doorbell register. 70291df8552aSStephen M. Cameron */ 703018867659SStephen M. Cameron 703160f923b9SRobert Elliott if (!ctlr_is_resettable(board_id)) { 703260f923b9SRobert Elliott dev_warn(&pdev->dev, "Controller not resettable\n"); 703325c1e56aSStephen M. Cameron return -ENODEV; 703425c1e56aSStephen M. Cameron } 703546380786SStephen M. Cameron 703646380786SStephen M. Cameron /* if controller is soft- but not hard resettable... */ 703746380786SStephen M. Cameron if (!ctlr_is_hard_resettable(board_id)) 703846380786SStephen M. Cameron return -ENOTSUPP; /* try soft reset later. */ 703918867659SStephen M. Cameron 7040270d05deSStephen M. Cameron /* Save the PCI command register */ 7041270d05deSStephen M. Cameron pci_read_config_word(pdev, 4, &command_register); 7042270d05deSStephen M. Cameron pci_save_state(pdev); 70431df8552aSStephen M. Cameron 70441df8552aSStephen M. Cameron /* find the first memory BAR, so we can find the cfg table */ 70451df8552aSStephen M. Cameron rc = hpsa_pci_find_memory_BAR(pdev, &paddr); 70461df8552aSStephen M. Cameron if (rc) 70471df8552aSStephen M. Cameron return rc; 70481df8552aSStephen M. Cameron vaddr = remap_pci_mem(paddr, 0x250); 70491df8552aSStephen M. Cameron if (!vaddr) 70501df8552aSStephen M. Cameron return -ENOMEM; 70511df8552aSStephen M. Cameron 70521df8552aSStephen M. Cameron /* find cfgtable in order to check if reset via doorbell is supported */ 70531df8552aSStephen M. Cameron rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr, 70541df8552aSStephen M. Cameron &cfg_base_addr_index, &cfg_offset); 70551df8552aSStephen M. Cameron if (rc) 70561df8552aSStephen M. Cameron goto unmap_vaddr; 70571df8552aSStephen M. Cameron cfgtable = remap_pci_mem(pci_resource_start(pdev, 70581df8552aSStephen M. Cameron cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable)); 70591df8552aSStephen M. Cameron if (!cfgtable) { 70601df8552aSStephen M. Cameron rc = -ENOMEM; 70611df8552aSStephen M. Cameron goto unmap_vaddr; 70621df8552aSStephen M. Cameron } 7063580ada3cSStephen M. Cameron rc = write_driver_ver_to_cfgtable(cfgtable); 7064580ada3cSStephen M. Cameron if (rc) 706503741d95STomas Henzl goto unmap_cfgtable; 70661df8552aSStephen M. Cameron 7067cf0b08d0SStephen M. Cameron /* If reset via doorbell register is supported, use that. 7068cf0b08d0SStephen M. Cameron * There are two such methods. Favor the newest method. 7069cf0b08d0SStephen M. Cameron */ 70701df8552aSStephen M. Cameron misc_fw_support = readl(&cfgtable->misc_fw_support); 7071cf0b08d0SStephen M. Cameron use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2; 7072cf0b08d0SStephen M. Cameron if (use_doorbell) { 7073cf0b08d0SStephen M. Cameron use_doorbell = DOORBELL_CTLR_RESET2; 7074cf0b08d0SStephen M. Cameron } else { 70751df8552aSStephen M. Cameron use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET; 7076cf0b08d0SStephen M. Cameron if (use_doorbell) { 7077050f7147SStephen Cameron dev_warn(&pdev->dev, 7078050f7147SStephen Cameron "Soft reset not supported. Firmware update is required.\n"); 707964670ac8SStephen M. Cameron rc = -ENOTSUPP; /* try soft reset */ 7080cf0b08d0SStephen M. Cameron goto unmap_cfgtable; 7081cf0b08d0SStephen M. Cameron } 7082cf0b08d0SStephen M. Cameron } 70831df8552aSStephen M. Cameron 70841df8552aSStephen M. Cameron rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell); 70851df8552aSStephen M. Cameron if (rc) 70861df8552aSStephen M. Cameron goto unmap_cfgtable; 7087edd16368SStephen M. Cameron 7088270d05deSStephen M. Cameron pci_restore_state(pdev); 7089270d05deSStephen M. Cameron pci_write_config_word(pdev, 4, command_register); 7090edd16368SStephen M. Cameron 70911df8552aSStephen M. Cameron /* Some devices (notably the HP Smart Array 5i Controller) 70921df8552aSStephen M. Cameron need a little pause here */ 70931df8552aSStephen M. Cameron msleep(HPSA_POST_RESET_PAUSE_MSECS); 70941df8552aSStephen M. Cameron 7095fe5389c8SStephen M. Cameron rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY); 7096fe5389c8SStephen M. Cameron if (rc) { 7097fe5389c8SStephen M. Cameron dev_warn(&pdev->dev, 7098050f7147SStephen Cameron "Failed waiting for board to become ready after hard reset\n"); 7099fe5389c8SStephen M. Cameron goto unmap_cfgtable; 7100fe5389c8SStephen M. Cameron } 7101fe5389c8SStephen M. Cameron 7102580ada3cSStephen M. Cameron rc = controller_reset_failed(vaddr); 7103580ada3cSStephen M. Cameron if (rc < 0) 7104580ada3cSStephen M. Cameron goto unmap_cfgtable; 7105580ada3cSStephen M. Cameron if (rc) { 710664670ac8SStephen M. Cameron dev_warn(&pdev->dev, "Unable to successfully reset " 710764670ac8SStephen M. Cameron "controller. Will try soft reset.\n"); 710864670ac8SStephen M. Cameron rc = -ENOTSUPP; 7109580ada3cSStephen M. Cameron } else { 711064670ac8SStephen M. Cameron dev_info(&pdev->dev, "board ready after hard reset.\n"); 71111df8552aSStephen M. Cameron } 71121df8552aSStephen M. Cameron 71131df8552aSStephen M. Cameron unmap_cfgtable: 71141df8552aSStephen M. Cameron iounmap(cfgtable); 71151df8552aSStephen M. Cameron 71161df8552aSStephen M. Cameron unmap_vaddr: 71171df8552aSStephen M. Cameron iounmap(vaddr); 71181df8552aSStephen M. Cameron return rc; 7119edd16368SStephen M. Cameron } 7120edd16368SStephen M. Cameron 7121edd16368SStephen M. Cameron /* 7122edd16368SStephen M. Cameron * We cannot read the structure directly, for portability we must use 7123edd16368SStephen M. Cameron * the io functions. 7124edd16368SStephen M. Cameron * This is for debug only. 7125edd16368SStephen M. Cameron */ 712642a91641SDon Brace static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb) 7127edd16368SStephen M. Cameron { 712858f8665cSStephen M. Cameron #ifdef HPSA_DEBUG 7129edd16368SStephen M. Cameron int i; 7130edd16368SStephen M. Cameron char temp_name[17]; 7131edd16368SStephen M. Cameron 7132edd16368SStephen M. Cameron dev_info(dev, "Controller Configuration information\n"); 7133edd16368SStephen M. Cameron dev_info(dev, "------------------------------------\n"); 7134edd16368SStephen M. Cameron for (i = 0; i < 4; i++) 7135edd16368SStephen M. Cameron temp_name[i] = readb(&(tb->Signature[i])); 7136edd16368SStephen M. Cameron temp_name[4] = '\0'; 7137edd16368SStephen M. Cameron dev_info(dev, " Signature = %s\n", temp_name); 7138edd16368SStephen M. Cameron dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence))); 7139edd16368SStephen M. Cameron dev_info(dev, " Transport methods supported = 0x%x\n", 7140edd16368SStephen M. Cameron readl(&(tb->TransportSupport))); 7141edd16368SStephen M. Cameron dev_info(dev, " Transport methods active = 0x%x\n", 7142edd16368SStephen M. Cameron readl(&(tb->TransportActive))); 7143edd16368SStephen M. Cameron dev_info(dev, " Requested transport Method = 0x%x\n", 7144edd16368SStephen M. Cameron readl(&(tb->HostWrite.TransportRequest))); 7145edd16368SStephen M. Cameron dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n", 7146edd16368SStephen M. Cameron readl(&(tb->HostWrite.CoalIntDelay))); 7147edd16368SStephen M. Cameron dev_info(dev, " Coalesce Interrupt Count = 0x%x\n", 7148edd16368SStephen M. Cameron readl(&(tb->HostWrite.CoalIntCount))); 714969d6e33dSRobert Elliott dev_info(dev, " Max outstanding commands = %d\n", 7150edd16368SStephen M. Cameron readl(&(tb->CmdsOutMax))); 7151edd16368SStephen M. Cameron dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes))); 7152edd16368SStephen M. Cameron for (i = 0; i < 16; i++) 7153edd16368SStephen M. Cameron temp_name[i] = readb(&(tb->ServerName[i])); 7154edd16368SStephen M. Cameron temp_name[16] = '\0'; 7155edd16368SStephen M. Cameron dev_info(dev, " Server Name = %s\n", temp_name); 7156edd16368SStephen M. Cameron dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n", 7157edd16368SStephen M. Cameron readl(&(tb->HeartBeat))); 7158edd16368SStephen M. Cameron #endif /* HPSA_DEBUG */ 715958f8665cSStephen M. Cameron } 7160edd16368SStephen M. Cameron 7161edd16368SStephen M. Cameron static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr) 7162edd16368SStephen M. Cameron { 7163edd16368SStephen M. Cameron int i, offset, mem_type, bar_type; 7164edd16368SStephen M. Cameron 7165edd16368SStephen M. Cameron if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */ 7166edd16368SStephen M. Cameron return 0; 7167edd16368SStephen M. Cameron offset = 0; 7168edd16368SStephen M. Cameron for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { 7169edd16368SStephen M. Cameron bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE; 7170edd16368SStephen M. Cameron if (bar_type == PCI_BASE_ADDRESS_SPACE_IO) 7171edd16368SStephen M. Cameron offset += 4; 7172edd16368SStephen M. Cameron else { 7173edd16368SStephen M. Cameron mem_type = pci_resource_flags(pdev, i) & 7174edd16368SStephen M. Cameron PCI_BASE_ADDRESS_MEM_TYPE_MASK; 7175edd16368SStephen M. Cameron switch (mem_type) { 7176edd16368SStephen M. Cameron case PCI_BASE_ADDRESS_MEM_TYPE_32: 7177edd16368SStephen M. Cameron case PCI_BASE_ADDRESS_MEM_TYPE_1M: 7178edd16368SStephen M. Cameron offset += 4; /* 32 bit */ 7179edd16368SStephen M. Cameron break; 7180edd16368SStephen M. Cameron case PCI_BASE_ADDRESS_MEM_TYPE_64: 7181edd16368SStephen M. Cameron offset += 8; 7182edd16368SStephen M. Cameron break; 7183edd16368SStephen M. Cameron default: /* reserved in PCI 2.2 */ 7184edd16368SStephen M. Cameron dev_warn(&pdev->dev, 7185edd16368SStephen M. Cameron "base address is invalid\n"); 7186edd16368SStephen M. Cameron return -1; 7187edd16368SStephen M. Cameron break; 7188edd16368SStephen M. Cameron } 7189edd16368SStephen M. Cameron } 7190edd16368SStephen M. Cameron if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0) 7191edd16368SStephen M. Cameron return i + 1; 7192edd16368SStephen M. Cameron } 7193edd16368SStephen M. Cameron return -1; 7194edd16368SStephen M. Cameron } 7195edd16368SStephen M. Cameron 7196cc64c817SRobert Elliott static void hpsa_disable_interrupt_mode(struct ctlr_info *h) 7197cc64c817SRobert Elliott { 7198bc2bb154SChristoph Hellwig pci_free_irq_vectors(h->pdev); 7199bc2bb154SChristoph Hellwig h->msix_vectors = 0; 7200cc64c817SRobert Elliott } 7201cc64c817SRobert Elliott 7202edd16368SStephen M. Cameron /* If MSI/MSI-X is supported by the kernel we will try to enable it on 7203050f7147SStephen Cameron * controllers that are capable. If not, we use legacy INTx mode. 7204edd16368SStephen M. Cameron */ 7205bc2bb154SChristoph Hellwig static int hpsa_interrupt_mode(struct ctlr_info *h) 7206edd16368SStephen M. Cameron { 7207bc2bb154SChristoph Hellwig unsigned int flags = PCI_IRQ_LEGACY; 7208bc2bb154SChristoph Hellwig int ret; 7209edd16368SStephen M. Cameron 7210edd16368SStephen M. Cameron /* Some boards advertise MSI but don't really support it */ 7211bc2bb154SChristoph Hellwig switch (h->board_id) { 7212bc2bb154SChristoph Hellwig case 0x40700E11: 7213bc2bb154SChristoph Hellwig case 0x40800E11: 7214bc2bb154SChristoph Hellwig case 0x40820E11: 7215bc2bb154SChristoph Hellwig case 0x40830E11: 7216bc2bb154SChristoph Hellwig break; 7217bc2bb154SChristoph Hellwig default: 7218bc2bb154SChristoph Hellwig ret = pci_alloc_irq_vectors(h->pdev, 1, MAX_REPLY_QUEUES, 7219bc2bb154SChristoph Hellwig PCI_IRQ_MSIX | PCI_IRQ_AFFINITY); 7220bc2bb154SChristoph Hellwig if (ret > 0) { 7221bc2bb154SChristoph Hellwig h->msix_vectors = ret; 7222bc2bb154SChristoph Hellwig return 0; 7223eee0f03aSHannes Reinecke } 7224bc2bb154SChristoph Hellwig 7225bc2bb154SChristoph Hellwig flags |= PCI_IRQ_MSI; 7226bc2bb154SChristoph Hellwig break; 7227edd16368SStephen M. Cameron } 7228bc2bb154SChristoph Hellwig 7229bc2bb154SChristoph Hellwig ret = pci_alloc_irq_vectors(h->pdev, 1, 1, flags); 7230bc2bb154SChristoph Hellwig if (ret < 0) 7231bc2bb154SChristoph Hellwig return ret; 7232bc2bb154SChristoph Hellwig return 0; 7233edd16368SStephen M. Cameron } 7234edd16368SStephen M. Cameron 72356f039790SGreg Kroah-Hartman static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id) 7236e5c880d1SStephen M. Cameron { 7237e5c880d1SStephen M. Cameron int i; 7238e5c880d1SStephen M. Cameron u32 subsystem_vendor_id, subsystem_device_id; 7239e5c880d1SStephen M. Cameron 7240e5c880d1SStephen M. Cameron subsystem_vendor_id = pdev->subsystem_vendor; 7241e5c880d1SStephen M. Cameron subsystem_device_id = pdev->subsystem_device; 7242e5c880d1SStephen M. Cameron *board_id = ((subsystem_device_id << 16) & 0xffff0000) | 7243e5c880d1SStephen M. Cameron subsystem_vendor_id; 7244e5c880d1SStephen M. Cameron 7245e5c880d1SStephen M. Cameron for (i = 0; i < ARRAY_SIZE(products); i++) 7246e5c880d1SStephen M. Cameron if (*board_id == products[i].board_id) 7247e5c880d1SStephen M. Cameron return i; 7248e5c880d1SStephen M. Cameron 72496798cc0aSStephen M. Cameron if ((subsystem_vendor_id != PCI_VENDOR_ID_HP && 72506798cc0aSStephen M. Cameron subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) || 72516798cc0aSStephen M. Cameron !hpsa_allow_any) { 7252e5c880d1SStephen M. Cameron dev_warn(&pdev->dev, "unrecognized board ID: " 7253e5c880d1SStephen M. Cameron "0x%08x, ignoring.\n", *board_id); 7254e5c880d1SStephen M. Cameron return -ENODEV; 7255e5c880d1SStephen M. Cameron } 7256e5c880d1SStephen M. Cameron return ARRAY_SIZE(products) - 1; /* generic unknown smart array */ 7257e5c880d1SStephen M. Cameron } 7258e5c880d1SStephen M. Cameron 72596f039790SGreg Kroah-Hartman static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 72603a7774ceSStephen M. Cameron unsigned long *memory_bar) 72613a7774ceSStephen M. Cameron { 72623a7774ceSStephen M. Cameron int i; 72633a7774ceSStephen M. Cameron 72643a7774ceSStephen M. Cameron for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) 726512d2cd47SStephen M. Cameron if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) { 72663a7774ceSStephen M. Cameron /* addressing mode bits already removed */ 726712d2cd47SStephen M. Cameron *memory_bar = pci_resource_start(pdev, i); 726812d2cd47SStephen M. Cameron dev_dbg(&pdev->dev, "memory BAR = %lx\n", 72693a7774ceSStephen M. Cameron *memory_bar); 72703a7774ceSStephen M. Cameron return 0; 72713a7774ceSStephen M. Cameron } 727212d2cd47SStephen M. Cameron dev_warn(&pdev->dev, "no memory BAR found\n"); 72733a7774ceSStephen M. Cameron return -ENODEV; 72743a7774ceSStephen M. Cameron } 72753a7774ceSStephen M. Cameron 72766f039790SGreg Kroah-Hartman static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 72776f039790SGreg Kroah-Hartman int wait_for_ready) 72782c4c8c8bSStephen M. Cameron { 7279fe5389c8SStephen M. Cameron int i, iterations; 72802c4c8c8bSStephen M. Cameron u32 scratchpad; 7281fe5389c8SStephen M. Cameron if (wait_for_ready) 7282fe5389c8SStephen M. Cameron iterations = HPSA_BOARD_READY_ITERATIONS; 7283fe5389c8SStephen M. Cameron else 7284fe5389c8SStephen M. Cameron iterations = HPSA_BOARD_NOT_READY_ITERATIONS; 72852c4c8c8bSStephen M. Cameron 7286fe5389c8SStephen M. Cameron for (i = 0; i < iterations; i++) { 7287fe5389c8SStephen M. Cameron scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET); 7288fe5389c8SStephen M. Cameron if (wait_for_ready) { 72892c4c8c8bSStephen M. Cameron if (scratchpad == HPSA_FIRMWARE_READY) 72902c4c8c8bSStephen M. Cameron return 0; 7291fe5389c8SStephen M. Cameron } else { 7292fe5389c8SStephen M. Cameron if (scratchpad != HPSA_FIRMWARE_READY) 7293fe5389c8SStephen M. Cameron return 0; 7294fe5389c8SStephen M. Cameron } 72952c4c8c8bSStephen M. Cameron msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS); 72962c4c8c8bSStephen M. Cameron } 7297fe5389c8SStephen M. Cameron dev_warn(&pdev->dev, "board not ready, timed out.\n"); 72982c4c8c8bSStephen M. Cameron return -ENODEV; 72992c4c8c8bSStephen M. Cameron } 73002c4c8c8bSStephen M. Cameron 73016f039790SGreg Kroah-Hartman static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 73026f039790SGreg Kroah-Hartman u32 *cfg_base_addr, u64 *cfg_base_addr_index, 7303a51fd47fSStephen M. Cameron u64 *cfg_offset) 7304a51fd47fSStephen M. Cameron { 7305a51fd47fSStephen M. Cameron *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET); 7306a51fd47fSStephen M. Cameron *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET); 7307a51fd47fSStephen M. Cameron *cfg_base_addr &= (u32) 0x0000ffff; 7308a51fd47fSStephen M. Cameron *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr); 7309a51fd47fSStephen M. Cameron if (*cfg_base_addr_index == -1) { 7310a51fd47fSStephen M. Cameron dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n"); 7311a51fd47fSStephen M. Cameron return -ENODEV; 7312a51fd47fSStephen M. Cameron } 7313a51fd47fSStephen M. Cameron return 0; 7314a51fd47fSStephen M. Cameron } 7315a51fd47fSStephen M. Cameron 7316195f2c65SRobert Elliott static void hpsa_free_cfgtables(struct ctlr_info *h) 7317195f2c65SRobert Elliott { 7318105a3dbcSRobert Elliott if (h->transtable) { 7319195f2c65SRobert Elliott iounmap(h->transtable); 7320105a3dbcSRobert Elliott h->transtable = NULL; 7321105a3dbcSRobert Elliott } 7322105a3dbcSRobert Elliott if (h->cfgtable) { 7323195f2c65SRobert Elliott iounmap(h->cfgtable); 7324105a3dbcSRobert Elliott h->cfgtable = NULL; 7325105a3dbcSRobert Elliott } 7326195f2c65SRobert Elliott } 7327195f2c65SRobert Elliott 7328195f2c65SRobert Elliott /* Find and map CISS config table and transfer table 7329195f2c65SRobert Elliott + * several items must be unmapped (freed) later 7330195f2c65SRobert Elliott + * */ 73316f039790SGreg Kroah-Hartman static int hpsa_find_cfgtables(struct ctlr_info *h) 7332edd16368SStephen M. Cameron { 733301a02ffcSStephen M. Cameron u64 cfg_offset; 733401a02ffcSStephen M. Cameron u32 cfg_base_addr; 733501a02ffcSStephen M. Cameron u64 cfg_base_addr_index; 7336303932fdSDon Brace u32 trans_offset; 7337a51fd47fSStephen M. Cameron int rc; 733877c4495cSStephen M. Cameron 7339a51fd47fSStephen M. Cameron rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 7340a51fd47fSStephen M. Cameron &cfg_base_addr_index, &cfg_offset); 7341a51fd47fSStephen M. Cameron if (rc) 7342a51fd47fSStephen M. Cameron return rc; 734377c4495cSStephen M. Cameron h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev, 7344a51fd47fSStephen M. Cameron cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable)); 7345cd3c81c4SRobert Elliott if (!h->cfgtable) { 7346cd3c81c4SRobert Elliott dev_err(&h->pdev->dev, "Failed mapping cfgtable\n"); 734777c4495cSStephen M. Cameron return -ENOMEM; 7348cd3c81c4SRobert Elliott } 7349580ada3cSStephen M. Cameron rc = write_driver_ver_to_cfgtable(h->cfgtable); 7350580ada3cSStephen M. Cameron if (rc) 7351580ada3cSStephen M. Cameron return rc; 735277c4495cSStephen M. Cameron /* Find performant mode table. */ 7353a51fd47fSStephen M. Cameron trans_offset = readl(&h->cfgtable->TransMethodOffset); 735477c4495cSStephen M. Cameron h->transtable = remap_pci_mem(pci_resource_start(h->pdev, 735577c4495cSStephen M. Cameron cfg_base_addr_index)+cfg_offset+trans_offset, 735677c4495cSStephen M. Cameron sizeof(*h->transtable)); 7357195f2c65SRobert Elliott if (!h->transtable) { 7358195f2c65SRobert Elliott dev_err(&h->pdev->dev, "Failed mapping transfer table\n"); 7359195f2c65SRobert Elliott hpsa_free_cfgtables(h); 736077c4495cSStephen M. Cameron return -ENOMEM; 7361195f2c65SRobert Elliott } 736277c4495cSStephen M. Cameron return 0; 736377c4495cSStephen M. Cameron } 736477c4495cSStephen M. Cameron 73656f039790SGreg Kroah-Hartman static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h) 7366cba3d38bSStephen M. Cameron { 736741ce4c35SStephen Cameron #define MIN_MAX_COMMANDS 16 736841ce4c35SStephen Cameron BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS); 736941ce4c35SStephen Cameron 737041ce4c35SStephen Cameron h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands); 737172ceeaecSStephen M. Cameron 737272ceeaecSStephen M. Cameron /* Limit commands in memory limited kdump scenario. */ 737372ceeaecSStephen M. Cameron if (reset_devices && h->max_commands > 32) 737472ceeaecSStephen M. Cameron h->max_commands = 32; 737572ceeaecSStephen M. Cameron 737641ce4c35SStephen Cameron if (h->max_commands < MIN_MAX_COMMANDS) { 737741ce4c35SStephen Cameron dev_warn(&h->pdev->dev, 737841ce4c35SStephen Cameron "Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n", 737941ce4c35SStephen Cameron h->max_commands, 738041ce4c35SStephen Cameron MIN_MAX_COMMANDS); 738141ce4c35SStephen Cameron h->max_commands = MIN_MAX_COMMANDS; 7382cba3d38bSStephen M. Cameron } 7383cba3d38bSStephen M. Cameron } 7384cba3d38bSStephen M. Cameron 7385c7ee65b3SWebb Scales /* If the controller reports that the total max sg entries is greater than 512, 7386c7ee65b3SWebb Scales * then we know that chained SG blocks work. (Original smart arrays did not 7387c7ee65b3SWebb Scales * support chained SG blocks and would return zero for max sg entries.) 7388c7ee65b3SWebb Scales */ 7389c7ee65b3SWebb Scales static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h) 7390c7ee65b3SWebb Scales { 7391c7ee65b3SWebb Scales return h->maxsgentries > 512; 7392c7ee65b3SWebb Scales } 7393c7ee65b3SWebb Scales 7394b93d7536SStephen M. Cameron /* Interrogate the hardware for some limits: 7395b93d7536SStephen M. Cameron * max commands, max SG elements without chaining, and with chaining, 7396b93d7536SStephen M. Cameron * SG chain block size, etc. 7397b93d7536SStephen M. Cameron */ 73986f039790SGreg Kroah-Hartman static void hpsa_find_board_params(struct ctlr_info *h) 7399b93d7536SStephen M. Cameron { 7400cba3d38bSStephen M. Cameron hpsa_get_max_perf_mode_cmds(h); 740145fcb86eSStephen Cameron h->nr_cmds = h->max_commands; 7402b93d7536SStephen M. Cameron h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements)); 7403283b4a9bSStephen M. Cameron h->fw_support = readl(&(h->cfgtable->misc_fw_support)); 7404c7ee65b3SWebb Scales if (hpsa_supports_chained_sg_blocks(h)) { 7405c7ee65b3SWebb Scales /* Limit in-command s/g elements to 32 save dma'able memory. */ 7406b93d7536SStephen M. Cameron h->max_cmd_sg_entries = 32; 74071a63ea6fSWebb Scales h->chainsize = h->maxsgentries - h->max_cmd_sg_entries; 7408b93d7536SStephen M. Cameron h->maxsgentries--; /* save one for chain pointer */ 7409b93d7536SStephen M. Cameron } else { 7410c7ee65b3SWebb Scales /* 7411c7ee65b3SWebb Scales * Original smart arrays supported at most 31 s/g entries 7412c7ee65b3SWebb Scales * embedded inline in the command (trying to use more 7413c7ee65b3SWebb Scales * would lock up the controller) 7414c7ee65b3SWebb Scales */ 7415c7ee65b3SWebb Scales h->max_cmd_sg_entries = 31; 74161a63ea6fSWebb Scales h->maxsgentries = 31; /* default to traditional values */ 7417c7ee65b3SWebb Scales h->chainsize = 0; 7418b93d7536SStephen M. Cameron } 741975167d2cSStephen M. Cameron 742075167d2cSStephen M. Cameron /* Find out what task management functions are supported and cache */ 742175167d2cSStephen M. Cameron h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags)); 74220e7a7fceSScott Teel if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags)) 74230e7a7fceSScott Teel dev_warn(&h->pdev->dev, "Physical aborts not supported\n"); 74240e7a7fceSScott Teel if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags)) 74250e7a7fceSScott Teel dev_warn(&h->pdev->dev, "Logical aborts not supported\n"); 74268be986ccSStephen Cameron if (!(HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags)) 74278be986ccSStephen Cameron dev_warn(&h->pdev->dev, "HP SSD Smart Path aborts not supported\n"); 7428b93d7536SStephen M. Cameron } 7429b93d7536SStephen M. Cameron 743076c46e49SStephen M. Cameron static inline bool hpsa_CISS_signature_present(struct ctlr_info *h) 743176c46e49SStephen M. Cameron { 74320fc9fd40SAkinobu Mita if (!check_signature(h->cfgtable->Signature, "CISS", 4)) { 7433050f7147SStephen Cameron dev_err(&h->pdev->dev, "not a valid CISS config table\n"); 743476c46e49SStephen M. Cameron return false; 743576c46e49SStephen M. Cameron } 743676c46e49SStephen M. Cameron return true; 743776c46e49SStephen M. Cameron } 743876c46e49SStephen M. Cameron 743997a5e98cSStephen M. Cameron static inline void hpsa_set_driver_support_bits(struct ctlr_info *h) 7440f7c39101SStephen M. Cameron { 744197a5e98cSStephen M. Cameron u32 driver_support; 7442f7c39101SStephen M. Cameron 744397a5e98cSStephen M. Cameron driver_support = readl(&(h->cfgtable->driver_support)); 74440b9e7b74SArnd Bergmann /* Need to enable prefetch in the SCSI core for 6400 in x86 */ 74450b9e7b74SArnd Bergmann #ifdef CONFIG_X86 744697a5e98cSStephen M. Cameron driver_support |= ENABLE_SCSI_PREFETCH; 7447f7c39101SStephen M. Cameron #endif 744828e13446SStephen M. Cameron driver_support |= ENABLE_UNIT_ATTN; 744928e13446SStephen M. Cameron writel(driver_support, &(h->cfgtable->driver_support)); 7450f7c39101SStephen M. Cameron } 7451f7c39101SStephen M. Cameron 74523d0eab67SStephen M. Cameron /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result 74533d0eab67SStephen M. Cameron * in a prefetch beyond physical memory. 74543d0eab67SStephen M. Cameron */ 74553d0eab67SStephen M. Cameron static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h) 74563d0eab67SStephen M. Cameron { 74573d0eab67SStephen M. Cameron u32 dma_prefetch; 74583d0eab67SStephen M. Cameron 74593d0eab67SStephen M. Cameron if (h->board_id != 0x3225103C) 74603d0eab67SStephen M. Cameron return; 74613d0eab67SStephen M. Cameron dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG); 74623d0eab67SStephen M. Cameron dma_prefetch |= 0x8000; 74633d0eab67SStephen M. Cameron writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG); 74643d0eab67SStephen M. Cameron } 74653d0eab67SStephen M. Cameron 7466c706a795SRobert Elliott static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h) 746776438d08SStephen M. Cameron { 746876438d08SStephen M. Cameron int i; 746976438d08SStephen M. Cameron u32 doorbell_value; 747076438d08SStephen M. Cameron unsigned long flags; 747176438d08SStephen M. Cameron /* wait until the clear_event_notify bit 6 is cleared by controller. */ 7472007e7aa9SRobert Elliott for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) { 747376438d08SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 747476438d08SStephen M. Cameron doorbell_value = readl(h->vaddr + SA5_DOORBELL); 747576438d08SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 747676438d08SStephen M. Cameron if (!(doorbell_value & DOORBELL_CLEAR_EVENTS)) 7477c706a795SRobert Elliott goto done; 747876438d08SStephen M. Cameron /* delay and try again */ 7479007e7aa9SRobert Elliott msleep(CLEAR_EVENT_WAIT_INTERVAL); 748076438d08SStephen M. Cameron } 7481c706a795SRobert Elliott return -ENODEV; 7482c706a795SRobert Elliott done: 7483c706a795SRobert Elliott return 0; 748476438d08SStephen M. Cameron } 748576438d08SStephen M. Cameron 7486c706a795SRobert Elliott static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h) 7487eb6b2ae9SStephen M. Cameron { 7488eb6b2ae9SStephen M. Cameron int i; 74896eaf46fdSStephen M. Cameron u32 doorbell_value; 74906eaf46fdSStephen M. Cameron unsigned long flags; 7491eb6b2ae9SStephen M. Cameron 7492eb6b2ae9SStephen M. Cameron /* under certain very rare conditions, this can take awhile. 7493eb6b2ae9SStephen M. Cameron * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right 7494eb6b2ae9SStephen M. Cameron * as we enter this code.) 7495eb6b2ae9SStephen M. Cameron */ 7496007e7aa9SRobert Elliott for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) { 749725163bd5SWebb Scales if (h->remove_in_progress) 749825163bd5SWebb Scales goto done; 74996eaf46fdSStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 75006eaf46fdSStephen M. Cameron doorbell_value = readl(h->vaddr + SA5_DOORBELL); 75016eaf46fdSStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 7502382be668SDan Carpenter if (!(doorbell_value & CFGTBL_ChangeReq)) 7503c706a795SRobert Elliott goto done; 7504eb6b2ae9SStephen M. Cameron /* delay and try again */ 7505007e7aa9SRobert Elliott msleep(MODE_CHANGE_WAIT_INTERVAL); 7506eb6b2ae9SStephen M. Cameron } 7507c706a795SRobert Elliott return -ENODEV; 7508c706a795SRobert Elliott done: 7509c706a795SRobert Elliott return 0; 75103f4336f3SStephen M. Cameron } 75113f4336f3SStephen M. Cameron 7512c706a795SRobert Elliott /* return -ENODEV or other reason on error, 0 on success */ 75136f039790SGreg Kroah-Hartman static int hpsa_enter_simple_mode(struct ctlr_info *h) 75143f4336f3SStephen M. Cameron { 75153f4336f3SStephen M. Cameron u32 trans_support; 75163f4336f3SStephen M. Cameron 75173f4336f3SStephen M. Cameron trans_support = readl(&(h->cfgtable->TransportSupport)); 75183f4336f3SStephen M. Cameron if (!(trans_support & SIMPLE_MODE)) 75193f4336f3SStephen M. Cameron return -ENOTSUPP; 75203f4336f3SStephen M. Cameron 75213f4336f3SStephen M. Cameron h->max_commands = readl(&(h->cfgtable->CmdsOutMax)); 7522283b4a9bSStephen M. Cameron 75233f4336f3SStephen M. Cameron /* Update the field, and then ring the doorbell */ 75243f4336f3SStephen M. Cameron writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest)); 7525b9af4937SStephen M. Cameron writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi); 75263f4336f3SStephen M. Cameron writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 7527c706a795SRobert Elliott if (hpsa_wait_for_mode_change_ack(h)) 7528c706a795SRobert Elliott goto error; 7529eb6b2ae9SStephen M. Cameron print_cfg_table(&h->pdev->dev, h->cfgtable); 7530283b4a9bSStephen M. Cameron if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) 7531283b4a9bSStephen M. Cameron goto error; 7532960a30e7SStephen M. Cameron h->transMethod = CFGTBL_Trans_Simple; 7533eb6b2ae9SStephen M. Cameron return 0; 7534283b4a9bSStephen M. Cameron error: 7535050f7147SStephen Cameron dev_err(&h->pdev->dev, "failed to enter simple mode\n"); 7536283b4a9bSStephen M. Cameron return -ENODEV; 7537eb6b2ae9SStephen M. Cameron } 7538eb6b2ae9SStephen M. Cameron 7539195f2c65SRobert Elliott /* free items allocated or mapped by hpsa_pci_init */ 7540195f2c65SRobert Elliott static void hpsa_free_pci_init(struct ctlr_info *h) 7541195f2c65SRobert Elliott { 7542195f2c65SRobert Elliott hpsa_free_cfgtables(h); /* pci_init 4 */ 7543195f2c65SRobert Elliott iounmap(h->vaddr); /* pci_init 3 */ 7544105a3dbcSRobert Elliott h->vaddr = NULL; 7545195f2c65SRobert Elliott hpsa_disable_interrupt_mode(h); /* pci_init 2 */ 7546943a7021SRobert Elliott /* 7547943a7021SRobert Elliott * call pci_disable_device before pci_release_regions per 7548943a7021SRobert Elliott * Documentation/PCI/pci.txt 7549943a7021SRobert Elliott */ 7550195f2c65SRobert Elliott pci_disable_device(h->pdev); /* pci_init 1 */ 7551943a7021SRobert Elliott pci_release_regions(h->pdev); /* pci_init 2 */ 7552195f2c65SRobert Elliott } 7553195f2c65SRobert Elliott 7554195f2c65SRobert Elliott /* several items must be freed later */ 75556f039790SGreg Kroah-Hartman static int hpsa_pci_init(struct ctlr_info *h) 755677c4495cSStephen M. Cameron { 7557eb6b2ae9SStephen M. Cameron int prod_index, err; 7558edd16368SStephen M. Cameron 7559e5c880d1SStephen M. Cameron prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id); 7560e5c880d1SStephen M. Cameron if (prod_index < 0) 756160f923b9SRobert Elliott return prod_index; 7562e5c880d1SStephen M. Cameron h->product_name = products[prod_index].product_name; 7563e5c880d1SStephen M. Cameron h->access = *(products[prod_index].access); 7564e5c880d1SStephen M. Cameron 7565e5a44df8SMatthew Garrett pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S | 7566e5a44df8SMatthew Garrett PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM); 7567e5a44df8SMatthew Garrett 756855c06c71SStephen M. Cameron err = pci_enable_device(h->pdev); 7569edd16368SStephen M. Cameron if (err) { 7570195f2c65SRobert Elliott dev_err(&h->pdev->dev, "failed to enable PCI device\n"); 7571943a7021SRobert Elliott pci_disable_device(h->pdev); 7572edd16368SStephen M. Cameron return err; 7573edd16368SStephen M. Cameron } 7574edd16368SStephen M. Cameron 7575f79cfec6SStephen M. Cameron err = pci_request_regions(h->pdev, HPSA); 7576edd16368SStephen M. Cameron if (err) { 757755c06c71SStephen M. Cameron dev_err(&h->pdev->dev, 7578195f2c65SRobert Elliott "failed to obtain PCI resources\n"); 7579943a7021SRobert Elliott pci_disable_device(h->pdev); 7580943a7021SRobert Elliott return err; 7581edd16368SStephen M. Cameron } 75824fa604e1SRobert Elliott 75834fa604e1SRobert Elliott pci_set_master(h->pdev); 75844fa604e1SRobert Elliott 7585bc2bb154SChristoph Hellwig err = hpsa_interrupt_mode(h); 7586bc2bb154SChristoph Hellwig if (err) 7587bc2bb154SChristoph Hellwig goto clean1; 758812d2cd47SStephen M. Cameron err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr); 75893a7774ceSStephen M. Cameron if (err) 7590195f2c65SRobert Elliott goto clean2; /* intmode+region, pci */ 7591edd16368SStephen M. Cameron h->vaddr = remap_pci_mem(h->paddr, 0x250); 7592204892e9SStephen M. Cameron if (!h->vaddr) { 7593195f2c65SRobert Elliott dev_err(&h->pdev->dev, "failed to remap PCI mem\n"); 7594204892e9SStephen M. Cameron err = -ENOMEM; 7595195f2c65SRobert Elliott goto clean2; /* intmode+region, pci */ 7596204892e9SStephen M. Cameron } 7597fe5389c8SStephen M. Cameron err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 75982c4c8c8bSStephen M. Cameron if (err) 7599195f2c65SRobert Elliott goto clean3; /* vaddr, intmode+region, pci */ 760077c4495cSStephen M. Cameron err = hpsa_find_cfgtables(h); 760177c4495cSStephen M. Cameron if (err) 7602195f2c65SRobert Elliott goto clean3; /* vaddr, intmode+region, pci */ 7603b93d7536SStephen M. Cameron hpsa_find_board_params(h); 7604edd16368SStephen M. Cameron 760576c46e49SStephen M. Cameron if (!hpsa_CISS_signature_present(h)) { 7606edd16368SStephen M. Cameron err = -ENODEV; 7607195f2c65SRobert Elliott goto clean4; /* cfgtables, vaddr, intmode+region, pci */ 7608edd16368SStephen M. Cameron } 760997a5e98cSStephen M. Cameron hpsa_set_driver_support_bits(h); 76103d0eab67SStephen M. Cameron hpsa_p600_dma_prefetch_quirk(h); 7611eb6b2ae9SStephen M. Cameron err = hpsa_enter_simple_mode(h); 7612eb6b2ae9SStephen M. Cameron if (err) 7613195f2c65SRobert Elliott goto clean4; /* cfgtables, vaddr, intmode+region, pci */ 7614edd16368SStephen M. Cameron return 0; 7615edd16368SStephen M. Cameron 7616195f2c65SRobert Elliott clean4: /* cfgtables, vaddr, intmode+region, pci */ 7617195f2c65SRobert Elliott hpsa_free_cfgtables(h); 7618195f2c65SRobert Elliott clean3: /* vaddr, intmode+region, pci */ 7619204892e9SStephen M. Cameron iounmap(h->vaddr); 7620105a3dbcSRobert Elliott h->vaddr = NULL; 7621195f2c65SRobert Elliott clean2: /* intmode+region, pci */ 7622195f2c65SRobert Elliott hpsa_disable_interrupt_mode(h); 7623bc2bb154SChristoph Hellwig clean1: 7624943a7021SRobert Elliott /* 7625943a7021SRobert Elliott * call pci_disable_device before pci_release_regions per 7626943a7021SRobert Elliott * Documentation/PCI/pci.txt 7627943a7021SRobert Elliott */ 7628195f2c65SRobert Elliott pci_disable_device(h->pdev); 7629943a7021SRobert Elliott pci_release_regions(h->pdev); 7630edd16368SStephen M. Cameron return err; 7631edd16368SStephen M. Cameron } 7632edd16368SStephen M. Cameron 76336f039790SGreg Kroah-Hartman static void hpsa_hba_inquiry(struct ctlr_info *h) 7634339b2b14SStephen M. Cameron { 7635339b2b14SStephen M. Cameron int rc; 7636339b2b14SStephen M. Cameron 7637339b2b14SStephen M. Cameron #define HBA_INQUIRY_BYTE_COUNT 64 7638339b2b14SStephen M. Cameron h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL); 7639339b2b14SStephen M. Cameron if (!h->hba_inquiry_data) 7640339b2b14SStephen M. Cameron return; 7641339b2b14SStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0, 7642339b2b14SStephen M. Cameron h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT); 7643339b2b14SStephen M. Cameron if (rc != 0) { 7644339b2b14SStephen M. Cameron kfree(h->hba_inquiry_data); 7645339b2b14SStephen M. Cameron h->hba_inquiry_data = NULL; 7646339b2b14SStephen M. Cameron } 7647339b2b14SStephen M. Cameron } 7648339b2b14SStephen M. Cameron 76496b6c1cd7STomas Henzl static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id) 7650edd16368SStephen M. Cameron { 76511df8552aSStephen M. Cameron int rc, i; 76523b747298STomas Henzl void __iomem *vaddr; 7653edd16368SStephen M. Cameron 76544c2a8c40SStephen M. Cameron if (!reset_devices) 76554c2a8c40SStephen M. Cameron return 0; 76564c2a8c40SStephen M. Cameron 7657132aa220STomas Henzl /* kdump kernel is loading, we don't know in which state is 7658132aa220STomas Henzl * the pci interface. The dev->enable_cnt is equal zero 7659132aa220STomas Henzl * so we call enable+disable, wait a while and switch it on. 7660132aa220STomas Henzl */ 7661132aa220STomas Henzl rc = pci_enable_device(pdev); 7662132aa220STomas Henzl if (rc) { 7663132aa220STomas Henzl dev_warn(&pdev->dev, "Failed to enable PCI device\n"); 7664132aa220STomas Henzl return -ENODEV; 7665132aa220STomas Henzl } 7666132aa220STomas Henzl pci_disable_device(pdev); 7667132aa220STomas Henzl msleep(260); /* a randomly chosen number */ 7668132aa220STomas Henzl rc = pci_enable_device(pdev); 7669132aa220STomas Henzl if (rc) { 7670132aa220STomas Henzl dev_warn(&pdev->dev, "failed to enable device.\n"); 7671132aa220STomas Henzl return -ENODEV; 7672132aa220STomas Henzl } 76734fa604e1SRobert Elliott 7674859c75abSTomas Henzl pci_set_master(pdev); 76754fa604e1SRobert Elliott 76763b747298STomas Henzl vaddr = pci_ioremap_bar(pdev, 0); 76773b747298STomas Henzl if (vaddr == NULL) { 76783b747298STomas Henzl rc = -ENOMEM; 76793b747298STomas Henzl goto out_disable; 76803b747298STomas Henzl } 76813b747298STomas Henzl writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET); 76823b747298STomas Henzl iounmap(vaddr); 76833b747298STomas Henzl 76841df8552aSStephen M. Cameron /* Reset the controller with a PCI power-cycle or via doorbell */ 76856b6c1cd7STomas Henzl rc = hpsa_kdump_hard_reset_controller(pdev, board_id); 7686edd16368SStephen M. Cameron 76871df8552aSStephen M. Cameron /* -ENOTSUPP here means we cannot reset the controller 76881df8552aSStephen M. Cameron * but it's already (and still) up and running in 768918867659SStephen M. Cameron * "performant mode". Or, it might be 640x, which can't reset 769018867659SStephen M. Cameron * due to concerns about shared bbwc between 6402/6404 pair. 76911df8552aSStephen M. Cameron */ 7692adf1b3a3SRobert Elliott if (rc) 7693132aa220STomas Henzl goto out_disable; 7694edd16368SStephen M. Cameron 7695edd16368SStephen M. Cameron /* Now try to get the controller to respond to a no-op */ 76961ba66c9cSRobert Elliott dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n"); 7697edd16368SStephen M. Cameron for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) { 7698edd16368SStephen M. Cameron if (hpsa_noop(pdev) == 0) 7699edd16368SStephen M. Cameron break; 7700edd16368SStephen M. Cameron else 7701edd16368SStephen M. Cameron dev_warn(&pdev->dev, "no-op failed%s\n", 7702edd16368SStephen M. Cameron (i < 11 ? "; re-trying" : "")); 7703edd16368SStephen M. Cameron } 7704132aa220STomas Henzl 7705132aa220STomas Henzl out_disable: 7706132aa220STomas Henzl 7707132aa220STomas Henzl pci_disable_device(pdev); 7708132aa220STomas Henzl return rc; 7709edd16368SStephen M. Cameron } 7710edd16368SStephen M. Cameron 77111fb7c98aSRobert Elliott static void hpsa_free_cmd_pool(struct ctlr_info *h) 77121fb7c98aSRobert Elliott { 77131fb7c98aSRobert Elliott kfree(h->cmd_pool_bits); 7714105a3dbcSRobert Elliott h->cmd_pool_bits = NULL; 7715105a3dbcSRobert Elliott if (h->cmd_pool) { 77161fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 77171fb7c98aSRobert Elliott h->nr_cmds * sizeof(struct CommandList), 77181fb7c98aSRobert Elliott h->cmd_pool, 77191fb7c98aSRobert Elliott h->cmd_pool_dhandle); 7720105a3dbcSRobert Elliott h->cmd_pool = NULL; 7721105a3dbcSRobert Elliott h->cmd_pool_dhandle = 0; 7722105a3dbcSRobert Elliott } 7723105a3dbcSRobert Elliott if (h->errinfo_pool) { 77241fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 77251fb7c98aSRobert Elliott h->nr_cmds * sizeof(struct ErrorInfo), 77261fb7c98aSRobert Elliott h->errinfo_pool, 77271fb7c98aSRobert Elliott h->errinfo_pool_dhandle); 7728105a3dbcSRobert Elliott h->errinfo_pool = NULL; 7729105a3dbcSRobert Elliott h->errinfo_pool_dhandle = 0; 7730105a3dbcSRobert Elliott } 77311fb7c98aSRobert Elliott } 77321fb7c98aSRobert Elliott 7733d37ffbe4SRobert Elliott static int hpsa_alloc_cmd_pool(struct ctlr_info *h) 77342e9d1b36SStephen M. Cameron { 77352e9d1b36SStephen M. Cameron h->cmd_pool_bits = kzalloc( 77362e9d1b36SStephen M. Cameron DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) * 77372e9d1b36SStephen M. Cameron sizeof(unsigned long), GFP_KERNEL); 77382e9d1b36SStephen M. Cameron h->cmd_pool = pci_alloc_consistent(h->pdev, 77392e9d1b36SStephen M. Cameron h->nr_cmds * sizeof(*h->cmd_pool), 77402e9d1b36SStephen M. Cameron &(h->cmd_pool_dhandle)); 77412e9d1b36SStephen M. Cameron h->errinfo_pool = pci_alloc_consistent(h->pdev, 77422e9d1b36SStephen M. Cameron h->nr_cmds * sizeof(*h->errinfo_pool), 77432e9d1b36SStephen M. Cameron &(h->errinfo_pool_dhandle)); 77442e9d1b36SStephen M. Cameron if ((h->cmd_pool_bits == NULL) 77452e9d1b36SStephen M. Cameron || (h->cmd_pool == NULL) 77462e9d1b36SStephen M. Cameron || (h->errinfo_pool == NULL)) { 77472e9d1b36SStephen M. Cameron dev_err(&h->pdev->dev, "out of memory in %s", __func__); 77482c143342SRobert Elliott goto clean_up; 77492e9d1b36SStephen M. Cameron } 7750360c73bdSStephen Cameron hpsa_preinitialize_commands(h); 77512e9d1b36SStephen M. Cameron return 0; 77522c143342SRobert Elliott clean_up: 77532c143342SRobert Elliott hpsa_free_cmd_pool(h); 77542c143342SRobert Elliott return -ENOMEM; 77552e9d1b36SStephen M. Cameron } 77562e9d1b36SStephen M. Cameron 7757ec501a18SRobert Elliott /* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */ 7758ec501a18SRobert Elliott static void hpsa_free_irqs(struct ctlr_info *h) 7759ec501a18SRobert Elliott { 7760ec501a18SRobert Elliott int i; 7761ec501a18SRobert Elliott 7762bc2bb154SChristoph Hellwig if (!h->msix_vectors || h->intr_mode != PERF_MODE_INT) { 7763ec501a18SRobert Elliott /* Single reply queue, only one irq to free */ 77647dc62d93SColin Ian King free_irq(pci_irq_vector(h->pdev, 0), &h->q[h->intr_mode]); 7765bc2bb154SChristoph Hellwig h->q[h->intr_mode] = 0; 7766ec501a18SRobert Elliott return; 7767ec501a18SRobert Elliott } 7768ec501a18SRobert Elliott 7769bc2bb154SChristoph Hellwig for (i = 0; i < h->msix_vectors; i++) { 7770bc2bb154SChristoph Hellwig free_irq(pci_irq_vector(h->pdev, i), &h->q[i]); 7771105a3dbcSRobert Elliott h->q[i] = 0; 7772ec501a18SRobert Elliott } 7773a4e17fc1SRobert Elliott for (; i < MAX_REPLY_QUEUES; i++) 7774a4e17fc1SRobert Elliott h->q[i] = 0; 7775ec501a18SRobert Elliott } 7776ec501a18SRobert Elliott 77779ee61794SRobert Elliott /* returns 0 on success; cleans up and returns -Enn on error */ 77789ee61794SRobert Elliott static int hpsa_request_irqs(struct ctlr_info *h, 77790ae01a32SStephen M. Cameron irqreturn_t (*msixhandler)(int, void *), 77800ae01a32SStephen M. Cameron irqreturn_t (*intxhandler)(int, void *)) 77810ae01a32SStephen M. Cameron { 7782254f796bSMatt Gates int rc, i; 77830ae01a32SStephen M. Cameron 7784254f796bSMatt Gates /* 7785254f796bSMatt Gates * initialize h->q[x] = x so that interrupt handlers know which 7786254f796bSMatt Gates * queue to process. 7787254f796bSMatt Gates */ 7788254f796bSMatt Gates for (i = 0; i < MAX_REPLY_QUEUES; i++) 7789254f796bSMatt Gates h->q[i] = (u8) i; 7790254f796bSMatt Gates 7791bc2bb154SChristoph Hellwig if (h->intr_mode == PERF_MODE_INT && h->msix_vectors > 0) { 7792254f796bSMatt Gates /* If performant mode and MSI-X, use multiple reply queues */ 7793bc2bb154SChristoph Hellwig for (i = 0; i < h->msix_vectors; i++) { 77948b47004aSRobert Elliott sprintf(h->intrname[i], "%s-msix%d", h->devname, i); 7795bc2bb154SChristoph Hellwig rc = request_irq(pci_irq_vector(h->pdev, i), msixhandler, 77968b47004aSRobert Elliott 0, h->intrname[i], 7797254f796bSMatt Gates &h->q[i]); 7798a4e17fc1SRobert Elliott if (rc) { 7799a4e17fc1SRobert Elliott int j; 7800a4e17fc1SRobert Elliott 7801a4e17fc1SRobert Elliott dev_err(&h->pdev->dev, 7802a4e17fc1SRobert Elliott "failed to get irq %d for %s\n", 7803bc2bb154SChristoph Hellwig pci_irq_vector(h->pdev, i), h->devname); 7804a4e17fc1SRobert Elliott for (j = 0; j < i; j++) { 7805bc2bb154SChristoph Hellwig free_irq(pci_irq_vector(h->pdev, j), &h->q[j]); 7806a4e17fc1SRobert Elliott h->q[j] = 0; 7807a4e17fc1SRobert Elliott } 7808a4e17fc1SRobert Elliott for (; j < MAX_REPLY_QUEUES; j++) 7809a4e17fc1SRobert Elliott h->q[j] = 0; 7810a4e17fc1SRobert Elliott return rc; 7811a4e17fc1SRobert Elliott } 7812a4e17fc1SRobert Elliott } 7813254f796bSMatt Gates } else { 7814254f796bSMatt Gates /* Use single reply pool */ 7815bc2bb154SChristoph Hellwig if (h->msix_vectors > 0 || h->pdev->msi_enabled) { 7816bc2bb154SChristoph Hellwig sprintf(h->intrname[0], "%s-msi%s", h->devname, 7817bc2bb154SChristoph Hellwig h->msix_vectors ? "x" : ""); 7818bc2bb154SChristoph Hellwig rc = request_irq(pci_irq_vector(h->pdev, 0), 78198b47004aSRobert Elliott msixhandler, 0, 7820bc2bb154SChristoph Hellwig h->intrname[0], 7821254f796bSMatt Gates &h->q[h->intr_mode]); 7822254f796bSMatt Gates } else { 78238b47004aSRobert Elliott sprintf(h->intrname[h->intr_mode], 78248b47004aSRobert Elliott "%s-intx", h->devname); 7825bc2bb154SChristoph Hellwig rc = request_irq(pci_irq_vector(h->pdev, 0), 78268b47004aSRobert Elliott intxhandler, IRQF_SHARED, 7827bc2bb154SChristoph Hellwig h->intrname[0], 7828254f796bSMatt Gates &h->q[h->intr_mode]); 7829254f796bSMatt Gates } 7830254f796bSMatt Gates } 78310ae01a32SStephen M. Cameron if (rc) { 7832195f2c65SRobert Elliott dev_err(&h->pdev->dev, "failed to get irq %d for %s\n", 7833bc2bb154SChristoph Hellwig pci_irq_vector(h->pdev, 0), h->devname); 7834195f2c65SRobert Elliott hpsa_free_irqs(h); 78350ae01a32SStephen M. Cameron return -ENODEV; 78360ae01a32SStephen M. Cameron } 78370ae01a32SStephen M. Cameron return 0; 78380ae01a32SStephen M. Cameron } 78390ae01a32SStephen M. Cameron 78406f039790SGreg Kroah-Hartman static int hpsa_kdump_soft_reset(struct ctlr_info *h) 784164670ac8SStephen M. Cameron { 784239c53f55SRobert Elliott int rc; 7843bf43caf3SRobert Elliott hpsa_send_host_reset(h, RAID_CTLR_LUNID, HPSA_RESET_TYPE_CONTROLLER); 784464670ac8SStephen M. Cameron 784564670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n"); 784639c53f55SRobert Elliott rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY); 784739c53f55SRobert Elliott if (rc) { 784864670ac8SStephen M. Cameron dev_warn(&h->pdev->dev, "Soft reset had no effect.\n"); 784939c53f55SRobert Elliott return rc; 785064670ac8SStephen M. Cameron } 785164670ac8SStephen M. Cameron 785264670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n"); 785339c53f55SRobert Elliott rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 785439c53f55SRobert Elliott if (rc) { 785564670ac8SStephen M. Cameron dev_warn(&h->pdev->dev, "Board failed to become ready " 785664670ac8SStephen M. Cameron "after soft reset.\n"); 785739c53f55SRobert Elliott return rc; 785864670ac8SStephen M. Cameron } 785964670ac8SStephen M. Cameron 786064670ac8SStephen M. Cameron return 0; 786164670ac8SStephen M. Cameron } 786264670ac8SStephen M. Cameron 7863072b0518SStephen M. Cameron static void hpsa_free_reply_queues(struct ctlr_info *h) 7864072b0518SStephen M. Cameron { 7865072b0518SStephen M. Cameron int i; 7866072b0518SStephen M. Cameron 7867072b0518SStephen M. Cameron for (i = 0; i < h->nreply_queues; i++) { 7868072b0518SStephen M. Cameron if (!h->reply_queue[i].head) 7869072b0518SStephen M. Cameron continue; 78701fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 78711fb7c98aSRobert Elliott h->reply_queue_size, 78721fb7c98aSRobert Elliott h->reply_queue[i].head, 78731fb7c98aSRobert Elliott h->reply_queue[i].busaddr); 7874072b0518SStephen M. Cameron h->reply_queue[i].head = NULL; 7875072b0518SStephen M. Cameron h->reply_queue[i].busaddr = 0; 7876072b0518SStephen M. Cameron } 7877105a3dbcSRobert Elliott h->reply_queue_size = 0; 7878072b0518SStephen M. Cameron } 7879072b0518SStephen M. Cameron 78800097f0f4SStephen M. Cameron static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h) 78810097f0f4SStephen M. Cameron { 7882105a3dbcSRobert Elliott hpsa_free_performant_mode(h); /* init_one 7 */ 7883105a3dbcSRobert Elliott hpsa_free_sg_chain_blocks(h); /* init_one 6 */ 7884105a3dbcSRobert Elliott hpsa_free_cmd_pool(h); /* init_one 5 */ 7885105a3dbcSRobert Elliott hpsa_free_irqs(h); /* init_one 4 */ 78862946e82bSRobert Elliott scsi_host_put(h->scsi_host); /* init_one 3 */ 78872946e82bSRobert Elliott h->scsi_host = NULL; /* init_one 3 */ 78882946e82bSRobert Elliott hpsa_free_pci_init(h); /* init_one 2_5 */ 78899ecd953aSRobert Elliott free_percpu(h->lockup_detected); /* init_one 2 */ 78909ecd953aSRobert Elliott h->lockup_detected = NULL; /* init_one 2 */ 78919ecd953aSRobert Elliott if (h->resubmit_wq) { 78929ecd953aSRobert Elliott destroy_workqueue(h->resubmit_wq); /* init_one 1 */ 78939ecd953aSRobert Elliott h->resubmit_wq = NULL; 78949ecd953aSRobert Elliott } 78959ecd953aSRobert Elliott if (h->rescan_ctlr_wq) { 78969ecd953aSRobert Elliott destroy_workqueue(h->rescan_ctlr_wq); 78979ecd953aSRobert Elliott h->rescan_ctlr_wq = NULL; 78989ecd953aSRobert Elliott } 7899105a3dbcSRobert Elliott kfree(h); /* init_one 1 */ 790064670ac8SStephen M. Cameron } 790164670ac8SStephen M. Cameron 7902a0c12413SStephen M. Cameron /* Called when controller lockup detected. */ 7903f2405db8SDon Brace static void fail_all_outstanding_cmds(struct ctlr_info *h) 7904a0c12413SStephen M. Cameron { 7905281a7fd0SWebb Scales int i, refcount; 7906281a7fd0SWebb Scales struct CommandList *c; 790725163bd5SWebb Scales int failcount = 0; 7908a0c12413SStephen M. Cameron 7909080ef1ccSDon Brace flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */ 7910f2405db8SDon Brace for (i = 0; i < h->nr_cmds; i++) { 7911f2405db8SDon Brace c = h->cmd_pool + i; 7912281a7fd0SWebb Scales refcount = atomic_inc_return(&c->refcount); 7913281a7fd0SWebb Scales if (refcount > 1) { 791425163bd5SWebb Scales c->err_info->CommandStatus = CMD_CTLR_LOCKUP; 79155a3d16f5SStephen M. Cameron finish_cmd(c); 7916433b5f4dSStephen Cameron atomic_dec(&h->commands_outstanding); 791725163bd5SWebb Scales failcount++; 7918a0c12413SStephen M. Cameron } 7919281a7fd0SWebb Scales cmd_free(h, c); 7920281a7fd0SWebb Scales } 792125163bd5SWebb Scales dev_warn(&h->pdev->dev, 792225163bd5SWebb Scales "failed %d commands in fail_all\n", failcount); 7923a0c12413SStephen M. Cameron } 7924a0c12413SStephen M. Cameron 7925094963daSStephen M. Cameron static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value) 7926094963daSStephen M. Cameron { 7927c8ed0010SRusty Russell int cpu; 7928094963daSStephen M. Cameron 7929c8ed0010SRusty Russell for_each_online_cpu(cpu) { 7930094963daSStephen M. Cameron u32 *lockup_detected; 7931094963daSStephen M. Cameron lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 7932094963daSStephen M. Cameron *lockup_detected = value; 7933094963daSStephen M. Cameron } 7934094963daSStephen M. Cameron wmb(); /* be sure the per-cpu variables are out to memory */ 7935094963daSStephen M. Cameron } 7936094963daSStephen M. Cameron 7937a0c12413SStephen M. Cameron static void controller_lockup_detected(struct ctlr_info *h) 7938a0c12413SStephen M. Cameron { 7939a0c12413SStephen M. Cameron unsigned long flags; 7940094963daSStephen M. Cameron u32 lockup_detected; 7941a0c12413SStephen M. Cameron 7942a0c12413SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 7943a0c12413SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 7944094963daSStephen M. Cameron lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET); 7945094963daSStephen M. Cameron if (!lockup_detected) { 7946094963daSStephen M. Cameron /* no heartbeat, but controller gave us a zero. */ 7947094963daSStephen M. Cameron dev_warn(&h->pdev->dev, 794825163bd5SWebb Scales "lockup detected after %d but scratchpad register is zero\n", 794925163bd5SWebb Scales h->heartbeat_sample_interval / HZ); 7950094963daSStephen M. Cameron lockup_detected = 0xffffffff; 7951094963daSStephen M. Cameron } 7952094963daSStephen M. Cameron set_lockup_detected_for_all_cpus(h, lockup_detected); 7953a0c12413SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 795425163bd5SWebb Scales dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n", 795525163bd5SWebb Scales lockup_detected, h->heartbeat_sample_interval / HZ); 7956a0c12413SStephen M. Cameron pci_disable_device(h->pdev); 7957f2405db8SDon Brace fail_all_outstanding_cmds(h); 7958a0c12413SStephen M. Cameron } 7959a0c12413SStephen M. Cameron 796025163bd5SWebb Scales static int detect_controller_lockup(struct ctlr_info *h) 7961a0c12413SStephen M. Cameron { 7962a0c12413SStephen M. Cameron u64 now; 7963a0c12413SStephen M. Cameron u32 heartbeat; 7964a0c12413SStephen M. Cameron unsigned long flags; 7965a0c12413SStephen M. Cameron 7966a0c12413SStephen M. Cameron now = get_jiffies_64(); 7967a0c12413SStephen M. Cameron /* If we've received an interrupt recently, we're ok. */ 7968a0c12413SStephen M. Cameron if (time_after64(h->last_intr_timestamp + 7969e85c5974SStephen M. Cameron (h->heartbeat_sample_interval), now)) 797025163bd5SWebb Scales return false; 7971a0c12413SStephen M. Cameron 7972a0c12413SStephen M. Cameron /* 7973a0c12413SStephen M. Cameron * If we've already checked the heartbeat recently, we're ok. 7974a0c12413SStephen M. Cameron * This could happen if someone sends us a signal. We 7975a0c12413SStephen M. Cameron * otherwise don't care about signals in this thread. 7976a0c12413SStephen M. Cameron */ 7977a0c12413SStephen M. Cameron if (time_after64(h->last_heartbeat_timestamp + 7978e85c5974SStephen M. Cameron (h->heartbeat_sample_interval), now)) 797925163bd5SWebb Scales return false; 7980a0c12413SStephen M. Cameron 7981a0c12413SStephen M. Cameron /* If heartbeat has not changed since we last looked, we're not ok. */ 7982a0c12413SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 7983a0c12413SStephen M. Cameron heartbeat = readl(&h->cfgtable->HeartBeat); 7984a0c12413SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 7985a0c12413SStephen M. Cameron if (h->last_heartbeat == heartbeat) { 7986a0c12413SStephen M. Cameron controller_lockup_detected(h); 798725163bd5SWebb Scales return true; 7988a0c12413SStephen M. Cameron } 7989a0c12413SStephen M. Cameron 7990a0c12413SStephen M. Cameron /* We're ok. */ 7991a0c12413SStephen M. Cameron h->last_heartbeat = heartbeat; 7992a0c12413SStephen M. Cameron h->last_heartbeat_timestamp = now; 799325163bd5SWebb Scales return false; 7994a0c12413SStephen M. Cameron } 7995a0c12413SStephen M. Cameron 79969846590eSStephen M. Cameron static void hpsa_ack_ctlr_events(struct ctlr_info *h) 799776438d08SStephen M. Cameron { 799876438d08SStephen M. Cameron int i; 799976438d08SStephen M. Cameron char *event_type; 800076438d08SStephen M. Cameron 8001e4aa3e6aSStephen Cameron if (!(h->fw_support & MISC_FW_EVENT_NOTIFY)) 8002e4aa3e6aSStephen Cameron return; 8003e4aa3e6aSStephen Cameron 800476438d08SStephen M. Cameron /* Ask the controller to clear the events we're handling. */ 80051f7cee8cSStephen M. Cameron if ((h->transMethod & (CFGTBL_Trans_io_accel1 80061f7cee8cSStephen M. Cameron | CFGTBL_Trans_io_accel2)) && 800776438d08SStephen M. Cameron (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE || 800876438d08SStephen M. Cameron h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) { 800976438d08SStephen M. Cameron 801076438d08SStephen M. Cameron if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE) 801176438d08SStephen M. Cameron event_type = "state change"; 801276438d08SStephen M. Cameron if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE) 801376438d08SStephen M. Cameron event_type = "configuration change"; 801476438d08SStephen M. Cameron /* Stop sending new RAID offload reqs via the IO accelerator */ 801576438d08SStephen M. Cameron scsi_block_requests(h->scsi_host); 80165323ed74SDon Brace for (i = 0; i < h->ndevices; i++) { 801776438d08SStephen M. Cameron h->dev[i]->offload_enabled = 0; 80185323ed74SDon Brace h->dev[i]->offload_to_be_enabled = 0; 80195323ed74SDon Brace } 802023100dd9SStephen M. Cameron hpsa_drain_accel_commands(h); 802176438d08SStephen M. Cameron /* Set 'accelerator path config change' bit */ 802276438d08SStephen M. Cameron dev_warn(&h->pdev->dev, 802376438d08SStephen M. Cameron "Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n", 802476438d08SStephen M. Cameron h->events, event_type); 802576438d08SStephen M. Cameron writel(h->events, &(h->cfgtable->clear_event_notify)); 802676438d08SStephen M. Cameron /* Set the "clear event notify field update" bit 6 */ 802776438d08SStephen M. Cameron writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL); 802876438d08SStephen M. Cameron /* Wait until ctlr clears 'clear event notify field', bit 6 */ 802976438d08SStephen M. Cameron hpsa_wait_for_clear_event_notify_ack(h); 803076438d08SStephen M. Cameron scsi_unblock_requests(h->scsi_host); 803176438d08SStephen M. Cameron } else { 803276438d08SStephen M. Cameron /* Acknowledge controller notification events. */ 803376438d08SStephen M. Cameron writel(h->events, &(h->cfgtable->clear_event_notify)); 803476438d08SStephen M. Cameron writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL); 803576438d08SStephen M. Cameron hpsa_wait_for_clear_event_notify_ack(h); 803676438d08SStephen M. Cameron #if 0 803776438d08SStephen M. Cameron writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 803876438d08SStephen M. Cameron hpsa_wait_for_mode_change_ack(h); 803976438d08SStephen M. Cameron #endif 804076438d08SStephen M. Cameron } 80419846590eSStephen M. Cameron return; 804276438d08SStephen M. Cameron } 804376438d08SStephen M. Cameron 804476438d08SStephen M. Cameron /* Check a register on the controller to see if there are configuration 804576438d08SStephen M. Cameron * changes (added/changed/removed logical drives, etc.) which mean that 8046e863d68eSScott Teel * we should rescan the controller for devices. 8047e863d68eSScott Teel * Also check flag for driver-initiated rescan. 804876438d08SStephen M. Cameron */ 80499846590eSStephen M. Cameron static int hpsa_ctlr_needs_rescan(struct ctlr_info *h) 805076438d08SStephen M. Cameron { 8051853633e8SDon Brace if (h->drv_req_rescan) { 8052853633e8SDon Brace h->drv_req_rescan = 0; 8053853633e8SDon Brace return 1; 8054853633e8SDon Brace } 8055853633e8SDon Brace 805676438d08SStephen M. Cameron if (!(h->fw_support & MISC_FW_EVENT_NOTIFY)) 80579846590eSStephen M. Cameron return 0; 805876438d08SStephen M. Cameron 805976438d08SStephen M. Cameron h->events = readl(&(h->cfgtable->event_notify)); 80609846590eSStephen M. Cameron return h->events & RESCAN_REQUIRED_EVENT_BITS; 80619846590eSStephen M. Cameron } 806276438d08SStephen M. Cameron 806376438d08SStephen M. Cameron /* 80649846590eSStephen M. Cameron * Check if any of the offline devices have become ready 806576438d08SStephen M. Cameron */ 80669846590eSStephen M. Cameron static int hpsa_offline_devices_ready(struct ctlr_info *h) 80679846590eSStephen M. Cameron { 80689846590eSStephen M. Cameron unsigned long flags; 80699846590eSStephen M. Cameron struct offline_device_entry *d; 80709846590eSStephen M. Cameron struct list_head *this, *tmp; 80719846590eSStephen M. Cameron 80729846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 80739846590eSStephen M. Cameron list_for_each_safe(this, tmp, &h->offline_device_list) { 80749846590eSStephen M. Cameron d = list_entry(this, struct offline_device_entry, 80759846590eSStephen M. Cameron offline_list); 80769846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 8077d1fea47cSStephen M. Cameron if (!hpsa_volume_offline(h, d->scsi3addr)) { 8078d1fea47cSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 8079d1fea47cSStephen M. Cameron list_del(&d->offline_list); 8080d1fea47cSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 80819846590eSStephen M. Cameron return 1; 8082d1fea47cSStephen M. Cameron } 80839846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 808476438d08SStephen M. Cameron } 80859846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 80869846590eSStephen M. Cameron return 0; 80879846590eSStephen M. Cameron } 80889846590eSStephen M. Cameron 808934592254SScott Teel static int hpsa_luns_changed(struct ctlr_info *h) 809034592254SScott Teel { 809134592254SScott Teel int rc = 1; /* assume there are changes */ 809234592254SScott Teel struct ReportLUNdata *logdev = NULL; 809334592254SScott Teel 809434592254SScott Teel /* if we can't find out if lun data has changed, 809534592254SScott Teel * assume that it has. 809634592254SScott Teel */ 809734592254SScott Teel 809834592254SScott Teel if (!h->lastlogicals) 80997e8a9486SAmit Kushwaha return rc; 810034592254SScott Teel 810134592254SScott Teel logdev = kzalloc(sizeof(*logdev), GFP_KERNEL); 81027e8a9486SAmit Kushwaha if (!logdev) 81037e8a9486SAmit Kushwaha return rc; 81047e8a9486SAmit Kushwaha 810534592254SScott Teel if (hpsa_scsi_do_report_luns(h, 1, logdev, sizeof(*logdev), 0)) { 810634592254SScott Teel dev_warn(&h->pdev->dev, 810734592254SScott Teel "report luns failed, can't track lun changes.\n"); 810834592254SScott Teel goto out; 810934592254SScott Teel } 811034592254SScott Teel if (memcmp(logdev, h->lastlogicals, sizeof(*logdev))) { 811134592254SScott Teel dev_info(&h->pdev->dev, 811234592254SScott Teel "Lun changes detected.\n"); 811334592254SScott Teel memcpy(h->lastlogicals, logdev, sizeof(*logdev)); 811434592254SScott Teel goto out; 811534592254SScott Teel } else 811634592254SScott Teel rc = 0; /* no changes detected. */ 811734592254SScott Teel out: 811834592254SScott Teel kfree(logdev); 811934592254SScott Teel return rc; 812034592254SScott Teel } 812134592254SScott Teel 81223d38f00cSScott Teel static void hpsa_perform_rescan(struct ctlr_info *h) 8123a0c12413SStephen M. Cameron { 81243d38f00cSScott Teel struct Scsi_Host *sh = NULL; 8125a0c12413SStephen M. Cameron unsigned long flags; 81269846590eSStephen M. Cameron 8127bfd7546cSDon Brace /* 8128bfd7546cSDon Brace * Do the scan after the reset 8129bfd7546cSDon Brace */ 8130c59d04f3SDon Brace spin_lock_irqsave(&h->reset_lock, flags); 8131bfd7546cSDon Brace if (h->reset_in_progress) { 8132bfd7546cSDon Brace h->drv_req_rescan = 1; 8133c59d04f3SDon Brace spin_unlock_irqrestore(&h->reset_lock, flags); 8134bfd7546cSDon Brace return; 8135bfd7546cSDon Brace } 8136c59d04f3SDon Brace spin_unlock_irqrestore(&h->reset_lock, flags); 8137bfd7546cSDon Brace 813834592254SScott Teel sh = scsi_host_get(h->scsi_host); 813934592254SScott Teel if (sh != NULL) { 814034592254SScott Teel hpsa_scan_start(sh); 814134592254SScott Teel scsi_host_put(sh); 81423d38f00cSScott Teel h->drv_req_rescan = 0; 814334592254SScott Teel } 814434592254SScott Teel } 81453d38f00cSScott Teel 81463d38f00cSScott Teel /* 81473d38f00cSScott Teel * watch for controller events 81483d38f00cSScott Teel */ 81493d38f00cSScott Teel static void hpsa_event_monitor_worker(struct work_struct *work) 81503d38f00cSScott Teel { 81513d38f00cSScott Teel struct ctlr_info *h = container_of(to_delayed_work(work), 81523d38f00cSScott Teel struct ctlr_info, event_monitor_work); 81533d38f00cSScott Teel unsigned long flags; 81543d38f00cSScott Teel 81553d38f00cSScott Teel spin_lock_irqsave(&h->lock, flags); 81563d38f00cSScott Teel if (h->remove_in_progress) { 81573d38f00cSScott Teel spin_unlock_irqrestore(&h->lock, flags); 81583d38f00cSScott Teel return; 81593d38f00cSScott Teel } 81603d38f00cSScott Teel spin_unlock_irqrestore(&h->lock, flags); 81613d38f00cSScott Teel 81623d38f00cSScott Teel if (hpsa_ctlr_needs_rescan(h)) { 81633d38f00cSScott Teel hpsa_ack_ctlr_events(h); 81643d38f00cSScott Teel hpsa_perform_rescan(h); 81653d38f00cSScott Teel } 81663d38f00cSScott Teel 81673d38f00cSScott Teel spin_lock_irqsave(&h->lock, flags); 81683d38f00cSScott Teel if (!h->remove_in_progress) 81693d38f00cSScott Teel schedule_delayed_work(&h->event_monitor_work, 81703d38f00cSScott Teel HPSA_EVENT_MONITOR_INTERVAL); 81713d38f00cSScott Teel spin_unlock_irqrestore(&h->lock, flags); 81723d38f00cSScott Teel } 81733d38f00cSScott Teel 81743d38f00cSScott Teel static void hpsa_rescan_ctlr_worker(struct work_struct *work) 81753d38f00cSScott Teel { 81763d38f00cSScott Teel unsigned long flags; 81773d38f00cSScott Teel struct ctlr_info *h = container_of(to_delayed_work(work), 81783d38f00cSScott Teel struct ctlr_info, rescan_ctlr_work); 81793d38f00cSScott Teel 81803d38f00cSScott Teel spin_lock_irqsave(&h->lock, flags); 81813d38f00cSScott Teel if (h->remove_in_progress) { 81823d38f00cSScott Teel spin_unlock_irqrestore(&h->lock, flags); 81833d38f00cSScott Teel return; 81843d38f00cSScott Teel } 81853d38f00cSScott Teel spin_unlock_irqrestore(&h->lock, flags); 81863d38f00cSScott Teel 81873d38f00cSScott Teel if (h->drv_req_rescan || hpsa_offline_devices_ready(h)) { 81883d38f00cSScott Teel hpsa_perform_rescan(h); 81893d38f00cSScott Teel } else if (h->discovery_polling) { 81903d38f00cSScott Teel hpsa_disable_rld_caching(h); 81913d38f00cSScott Teel if (hpsa_luns_changed(h)) { 81923d38f00cSScott Teel dev_info(&h->pdev->dev, 81933d38f00cSScott Teel "driver discovery polling rescan.\n"); 81943d38f00cSScott Teel hpsa_perform_rescan(h); 81953d38f00cSScott Teel } 81969846590eSStephen M. Cameron } 81976636e7f4SDon Brace spin_lock_irqsave(&h->lock, flags); 81986636e7f4SDon Brace if (!h->remove_in_progress) 81996636e7f4SDon Brace queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work, 82006636e7f4SDon Brace h->heartbeat_sample_interval); 82016636e7f4SDon Brace spin_unlock_irqrestore(&h->lock, flags); 82026636e7f4SDon Brace } 82036636e7f4SDon Brace 82046636e7f4SDon Brace static void hpsa_monitor_ctlr_worker(struct work_struct *work) 82056636e7f4SDon Brace { 82066636e7f4SDon Brace unsigned long flags; 82076636e7f4SDon Brace struct ctlr_info *h = container_of(to_delayed_work(work), 82086636e7f4SDon Brace struct ctlr_info, monitor_ctlr_work); 82096636e7f4SDon Brace 82106636e7f4SDon Brace detect_controller_lockup(h); 82116636e7f4SDon Brace if (lockup_detected(h)) 82126636e7f4SDon Brace return; 82139846590eSStephen M. Cameron 82148a98db73SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 82156636e7f4SDon Brace if (!h->remove_in_progress) 82168a98db73SStephen M. Cameron schedule_delayed_work(&h->monitor_ctlr_work, 82178a98db73SStephen M. Cameron h->heartbeat_sample_interval); 82188a98db73SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 8219a0c12413SStephen M. Cameron } 8220a0c12413SStephen M. Cameron 82216636e7f4SDon Brace static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h, 82226636e7f4SDon Brace char *name) 82236636e7f4SDon Brace { 82246636e7f4SDon Brace struct workqueue_struct *wq = NULL; 82256636e7f4SDon Brace 8226397ea9cbSDon Brace wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr); 82276636e7f4SDon Brace if (!wq) 82286636e7f4SDon Brace dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name); 82296636e7f4SDon Brace 82306636e7f4SDon Brace return wq; 82316636e7f4SDon Brace } 82326636e7f4SDon Brace 82336f039790SGreg Kroah-Hartman static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 82344c2a8c40SStephen M. Cameron { 82354c2a8c40SStephen M. Cameron int dac, rc; 82364c2a8c40SStephen M. Cameron struct ctlr_info *h; 823764670ac8SStephen M. Cameron int try_soft_reset = 0; 823864670ac8SStephen M. Cameron unsigned long flags; 82396b6c1cd7STomas Henzl u32 board_id; 82404c2a8c40SStephen M. Cameron 82414c2a8c40SStephen M. Cameron if (number_of_controllers == 0) 82424c2a8c40SStephen M. Cameron printk(KERN_INFO DRIVER_NAME "\n"); 82434c2a8c40SStephen M. Cameron 82446b6c1cd7STomas Henzl rc = hpsa_lookup_board_id(pdev, &board_id); 82456b6c1cd7STomas Henzl if (rc < 0) { 82466b6c1cd7STomas Henzl dev_warn(&pdev->dev, "Board ID not found\n"); 82476b6c1cd7STomas Henzl return rc; 82486b6c1cd7STomas Henzl } 82496b6c1cd7STomas Henzl 82506b6c1cd7STomas Henzl rc = hpsa_init_reset_devices(pdev, board_id); 825164670ac8SStephen M. Cameron if (rc) { 825264670ac8SStephen M. Cameron if (rc != -ENOTSUPP) 82534c2a8c40SStephen M. Cameron return rc; 825464670ac8SStephen M. Cameron /* If the reset fails in a particular way (it has no way to do 825564670ac8SStephen M. Cameron * a proper hard reset, so returns -ENOTSUPP) we can try to do 825664670ac8SStephen M. Cameron * a soft reset once we get the controller configured up to the 825764670ac8SStephen M. Cameron * point that it can accept a command. 825864670ac8SStephen M. Cameron */ 825964670ac8SStephen M. Cameron try_soft_reset = 1; 826064670ac8SStephen M. Cameron rc = 0; 826164670ac8SStephen M. Cameron } 826264670ac8SStephen M. Cameron 826364670ac8SStephen M. Cameron reinit_after_soft_reset: 82644c2a8c40SStephen M. Cameron 8265303932fdSDon Brace /* Command structures must be aligned on a 32-byte boundary because 8266303932fdSDon Brace * the 5 lower bits of the address are used by the hardware. and by 8267303932fdSDon Brace * the driver. See comments in hpsa.h for more info. 8268303932fdSDon Brace */ 8269303932fdSDon Brace BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT); 8270edd16368SStephen M. Cameron h = kzalloc(sizeof(*h), GFP_KERNEL); 8271105a3dbcSRobert Elliott if (!h) { 8272105a3dbcSRobert Elliott dev_err(&pdev->dev, "Failed to allocate controller head\n"); 8273ecd9aad4SStephen M. Cameron return -ENOMEM; 8274105a3dbcSRobert Elliott } 8275edd16368SStephen M. Cameron 827655c06c71SStephen M. Cameron h->pdev = pdev; 8277105a3dbcSRobert Elliott 8278a9a3a273SStephen M. Cameron h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT; 82799846590eSStephen M. Cameron INIT_LIST_HEAD(&h->offline_device_list); 82806eaf46fdSStephen M. Cameron spin_lock_init(&h->lock); 82819846590eSStephen M. Cameron spin_lock_init(&h->offline_device_lock); 82826eaf46fdSStephen M. Cameron spin_lock_init(&h->scan_lock); 8283c59d04f3SDon Brace spin_lock_init(&h->reset_lock); 828434f0c627SDon Brace atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS); 8285094963daSStephen M. Cameron 8286094963daSStephen M. Cameron /* Allocate and clear per-cpu variable lockup_detected */ 8287094963daSStephen M. Cameron h->lockup_detected = alloc_percpu(u32); 82882a5ac326SStephen M. Cameron if (!h->lockup_detected) { 8289105a3dbcSRobert Elliott dev_err(&h->pdev->dev, "Failed to allocate lockup detector\n"); 82902a5ac326SStephen M. Cameron rc = -ENOMEM; 82912efa5929SRobert Elliott goto clean1; /* aer/h */ 82922a5ac326SStephen M. Cameron } 8293094963daSStephen M. Cameron set_lockup_detected_for_all_cpus(h, 0); 8294094963daSStephen M. Cameron 829555c06c71SStephen M. Cameron rc = hpsa_pci_init(h); 8296105a3dbcSRobert Elliott if (rc) 82972946e82bSRobert Elliott goto clean2; /* lu, aer/h */ 8298edd16368SStephen M. Cameron 82992946e82bSRobert Elliott /* relies on h-> settings made by hpsa_pci_init, including 83002946e82bSRobert Elliott * interrupt_mode h->intr */ 83012946e82bSRobert Elliott rc = hpsa_scsi_host_alloc(h); 83022946e82bSRobert Elliott if (rc) 83032946e82bSRobert Elliott goto clean2_5; /* pci, lu, aer/h */ 83042946e82bSRobert Elliott 83052946e82bSRobert Elliott sprintf(h->devname, HPSA "%d", h->scsi_host->host_no); 8306edd16368SStephen M. Cameron h->ctlr = number_of_controllers; 8307edd16368SStephen M. Cameron number_of_controllers++; 8308edd16368SStephen M. Cameron 8309edd16368SStephen M. Cameron /* configure PCI DMA stuff */ 8310ecd9aad4SStephen M. Cameron rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 8311ecd9aad4SStephen M. Cameron if (rc == 0) { 8312edd16368SStephen M. Cameron dac = 1; 8313ecd9aad4SStephen M. Cameron } else { 8314ecd9aad4SStephen M. Cameron rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 8315ecd9aad4SStephen M. Cameron if (rc == 0) { 8316edd16368SStephen M. Cameron dac = 0; 8317ecd9aad4SStephen M. Cameron } else { 8318edd16368SStephen M. Cameron dev_err(&pdev->dev, "no suitable DMA available\n"); 83192946e82bSRobert Elliott goto clean3; /* shost, pci, lu, aer/h */ 8320edd16368SStephen M. Cameron } 8321ecd9aad4SStephen M. Cameron } 8322edd16368SStephen M. Cameron 8323edd16368SStephen M. Cameron /* make sure the board interrupts are off */ 8324edd16368SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 832510f66018SStephen M. Cameron 8326105a3dbcSRobert Elliott rc = hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx); 8327105a3dbcSRobert Elliott if (rc) 83282946e82bSRobert Elliott goto clean3; /* shost, pci, lu, aer/h */ 8329d37ffbe4SRobert Elliott rc = hpsa_alloc_cmd_pool(h); 83308947fd10SRobert Elliott if (rc) 83312946e82bSRobert Elliott goto clean4; /* irq, shost, pci, lu, aer/h */ 8332105a3dbcSRobert Elliott rc = hpsa_alloc_sg_chain_blocks(h); 8333105a3dbcSRobert Elliott if (rc) 83342946e82bSRobert Elliott goto clean5; /* cmd, irq, shost, pci, lu, aer/h */ 8335a08a8471SStephen M. Cameron init_waitqueue_head(&h->scan_wait_queue); 8336d604f533SWebb Scales init_waitqueue_head(&h->event_sync_wait_queue); 8337d604f533SWebb Scales mutex_init(&h->reset_mutex); 8338a08a8471SStephen M. Cameron h->scan_finished = 1; /* no scan currently in progress */ 833987b9e6aaSDon Brace h->scan_waiting = 0; 8340edd16368SStephen M. Cameron 8341edd16368SStephen M. Cameron pci_set_drvdata(pdev, h); 83429a41338eSStephen M. Cameron h->ndevices = 0; 83432946e82bSRobert Elliott 83449a41338eSStephen M. Cameron spin_lock_init(&h->devlock); 8345105a3dbcSRobert Elliott rc = hpsa_put_ctlr_into_performant_mode(h); 8346105a3dbcSRobert Elliott if (rc) 83472946e82bSRobert Elliott goto clean6; /* sg, cmd, irq, shost, pci, lu, aer/h */ 83482946e82bSRobert Elliott 83492efa5929SRobert Elliott /* create the resubmit workqueue */ 83502efa5929SRobert Elliott h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan"); 83512efa5929SRobert Elliott if (!h->rescan_ctlr_wq) { 83522efa5929SRobert Elliott rc = -ENOMEM; 83532efa5929SRobert Elliott goto clean7; 83542efa5929SRobert Elliott } 83552efa5929SRobert Elliott 83562efa5929SRobert Elliott h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit"); 83572efa5929SRobert Elliott if (!h->resubmit_wq) { 83582efa5929SRobert Elliott rc = -ENOMEM; 83592efa5929SRobert Elliott goto clean7; /* aer/h */ 83602efa5929SRobert Elliott } 836164670ac8SStephen M. Cameron 8362105a3dbcSRobert Elliott /* 8363105a3dbcSRobert Elliott * At this point, the controller is ready to take commands. 836464670ac8SStephen M. Cameron * Now, if reset_devices and the hard reset didn't work, try 836564670ac8SStephen M. Cameron * the soft reset and see if that works. 836664670ac8SStephen M. Cameron */ 836764670ac8SStephen M. Cameron if (try_soft_reset) { 836864670ac8SStephen M. Cameron 836964670ac8SStephen M. Cameron /* This is kind of gross. We may or may not get a completion 837064670ac8SStephen M. Cameron * from the soft reset command, and if we do, then the value 837164670ac8SStephen M. Cameron * from the fifo may or may not be valid. So, we wait 10 secs 837264670ac8SStephen M. Cameron * after the reset throwing away any completions we get during 837364670ac8SStephen M. Cameron * that time. Unregister the interrupt handler and register 837464670ac8SStephen M. Cameron * fake ones to scoop up any residual completions. 837564670ac8SStephen M. Cameron */ 837664670ac8SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 837764670ac8SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 837864670ac8SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 8379ec501a18SRobert Elliott hpsa_free_irqs(h); 83809ee61794SRobert Elliott rc = hpsa_request_irqs(h, hpsa_msix_discard_completions, 838164670ac8SStephen M. Cameron hpsa_intx_discard_completions); 838264670ac8SStephen M. Cameron if (rc) { 83839ee61794SRobert Elliott dev_warn(&h->pdev->dev, 83849ee61794SRobert Elliott "Failed to request_irq after soft reset.\n"); 8385d498757cSRobert Elliott /* 8386b2ef480cSRobert Elliott * cannot goto clean7 or free_irqs will be called 8387b2ef480cSRobert Elliott * again. Instead, do its work 8388b2ef480cSRobert Elliott */ 8389b2ef480cSRobert Elliott hpsa_free_performant_mode(h); /* clean7 */ 8390b2ef480cSRobert Elliott hpsa_free_sg_chain_blocks(h); /* clean6 */ 8391b2ef480cSRobert Elliott hpsa_free_cmd_pool(h); /* clean5 */ 8392b2ef480cSRobert Elliott /* 8393b2ef480cSRobert Elliott * skip hpsa_free_irqs(h) clean4 since that 8394b2ef480cSRobert Elliott * was just called before request_irqs failed 8395d498757cSRobert Elliott */ 8396d498757cSRobert Elliott goto clean3; 839764670ac8SStephen M. Cameron } 839864670ac8SStephen M. Cameron 839964670ac8SStephen M. Cameron rc = hpsa_kdump_soft_reset(h); 840064670ac8SStephen M. Cameron if (rc) 840164670ac8SStephen M. Cameron /* Neither hard nor soft reset worked, we're hosed. */ 84027ef7323fSDon Brace goto clean7; 840364670ac8SStephen M. Cameron 840464670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Board READY.\n"); 840564670ac8SStephen M. Cameron dev_info(&h->pdev->dev, 840664670ac8SStephen M. Cameron "Waiting for stale completions to drain.\n"); 840764670ac8SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_ON); 840864670ac8SStephen M. Cameron msleep(10000); 840964670ac8SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 841064670ac8SStephen M. Cameron 841164670ac8SStephen M. Cameron rc = controller_reset_failed(h->cfgtable); 841264670ac8SStephen M. Cameron if (rc) 841364670ac8SStephen M. Cameron dev_info(&h->pdev->dev, 841464670ac8SStephen M. Cameron "Soft reset appears to have failed.\n"); 841564670ac8SStephen M. Cameron 841664670ac8SStephen M. Cameron /* since the controller's reset, we have to go back and re-init 841764670ac8SStephen M. Cameron * everything. Easiest to just forget what we've done and do it 841864670ac8SStephen M. Cameron * all over again. 841964670ac8SStephen M. Cameron */ 842064670ac8SStephen M. Cameron hpsa_undo_allocations_after_kdump_soft_reset(h); 842164670ac8SStephen M. Cameron try_soft_reset = 0; 842264670ac8SStephen M. Cameron if (rc) 8423b2ef480cSRobert Elliott /* don't goto clean, we already unallocated */ 842464670ac8SStephen M. Cameron return -ENODEV; 842564670ac8SStephen M. Cameron 842664670ac8SStephen M. Cameron goto reinit_after_soft_reset; 842764670ac8SStephen M. Cameron } 8428edd16368SStephen M. Cameron 8429da0697bdSScott Teel /* Enable Accelerated IO path at driver layer */ 8430da0697bdSScott Teel h->acciopath_status = 1; 843134592254SScott Teel /* Disable discovery polling.*/ 843234592254SScott Teel h->discovery_polling = 0; 8433da0697bdSScott Teel 8434e863d68eSScott Teel 8435edd16368SStephen M. Cameron /* Turn the interrupts on so we can service requests */ 8436edd16368SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_ON); 8437edd16368SStephen M. Cameron 8438339b2b14SStephen M. Cameron hpsa_hba_inquiry(h); 84398a98db73SStephen M. Cameron 844034592254SScott Teel h->lastlogicals = kzalloc(sizeof(*(h->lastlogicals)), GFP_KERNEL); 844134592254SScott Teel if (!h->lastlogicals) 844234592254SScott Teel dev_info(&h->pdev->dev, 844334592254SScott Teel "Can't track change to report lun data\n"); 844434592254SScott Teel 8445cf477237SDon Brace /* hook into SCSI subsystem */ 8446cf477237SDon Brace rc = hpsa_scsi_add_host(h); 8447cf477237SDon Brace if (rc) 8448cf477237SDon Brace goto clean7; /* perf, sg, cmd, irq, shost, pci, lu, aer/h */ 8449cf477237SDon Brace 84508a98db73SStephen M. Cameron /* Monitor the controller for firmware lockups */ 84518a98db73SStephen M. Cameron h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 84528a98db73SStephen M. Cameron INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker); 84538a98db73SStephen M. Cameron schedule_delayed_work(&h->monitor_ctlr_work, 84548a98db73SStephen M. Cameron h->heartbeat_sample_interval); 84556636e7f4SDon Brace INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker); 84566636e7f4SDon Brace queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work, 84576636e7f4SDon Brace h->heartbeat_sample_interval); 84583d38f00cSScott Teel INIT_DELAYED_WORK(&h->event_monitor_work, hpsa_event_monitor_worker); 84593d38f00cSScott Teel schedule_delayed_work(&h->event_monitor_work, 84603d38f00cSScott Teel HPSA_EVENT_MONITOR_INTERVAL); 846188bf6d62SStephen M. Cameron return 0; 8462edd16368SStephen M. Cameron 84632946e82bSRobert Elliott clean7: /* perf, sg, cmd, irq, shost, pci, lu, aer/h */ 8464105a3dbcSRobert Elliott hpsa_free_performant_mode(h); 8465105a3dbcSRobert Elliott h->access.set_intr_mask(h, HPSA_INTR_OFF); 8466105a3dbcSRobert Elliott clean6: /* sg, cmd, irq, pci, lockup, wq/aer/h */ 846733a2ffceSStephen M. Cameron hpsa_free_sg_chain_blocks(h); 84682946e82bSRobert Elliott clean5: /* cmd, irq, shost, pci, lu, aer/h */ 84692e9d1b36SStephen M. Cameron hpsa_free_cmd_pool(h); 84702946e82bSRobert Elliott clean4: /* irq, shost, pci, lu, aer/h */ 8471ec501a18SRobert Elliott hpsa_free_irqs(h); 84722946e82bSRobert Elliott clean3: /* shost, pci, lu, aer/h */ 84732946e82bSRobert Elliott scsi_host_put(h->scsi_host); 84742946e82bSRobert Elliott h->scsi_host = NULL; 84752946e82bSRobert Elliott clean2_5: /* pci, lu, aer/h */ 8476195f2c65SRobert Elliott hpsa_free_pci_init(h); 84772946e82bSRobert Elliott clean2: /* lu, aer/h */ 8478105a3dbcSRobert Elliott if (h->lockup_detected) { 8479094963daSStephen M. Cameron free_percpu(h->lockup_detected); 8480105a3dbcSRobert Elliott h->lockup_detected = NULL; 8481105a3dbcSRobert Elliott } 8482105a3dbcSRobert Elliott clean1: /* wq/aer/h */ 8483105a3dbcSRobert Elliott if (h->resubmit_wq) { 8484105a3dbcSRobert Elliott destroy_workqueue(h->resubmit_wq); 8485105a3dbcSRobert Elliott h->resubmit_wq = NULL; 8486105a3dbcSRobert Elliott } 8487105a3dbcSRobert Elliott if (h->rescan_ctlr_wq) { 8488105a3dbcSRobert Elliott destroy_workqueue(h->rescan_ctlr_wq); 8489105a3dbcSRobert Elliott h->rescan_ctlr_wq = NULL; 8490105a3dbcSRobert Elliott } 8491edd16368SStephen M. Cameron kfree(h); 8492ecd9aad4SStephen M. Cameron return rc; 8493edd16368SStephen M. Cameron } 8494edd16368SStephen M. Cameron 8495edd16368SStephen M. Cameron static void hpsa_flush_cache(struct ctlr_info *h) 8496edd16368SStephen M. Cameron { 8497edd16368SStephen M. Cameron char *flush_buf; 8498edd16368SStephen M. Cameron struct CommandList *c; 849925163bd5SWebb Scales int rc; 8500702890e3SStephen M. Cameron 8501094963daSStephen M. Cameron if (unlikely(lockup_detected(h))) 8502702890e3SStephen M. Cameron return; 8503edd16368SStephen M. Cameron flush_buf = kzalloc(4, GFP_KERNEL); 8504edd16368SStephen M. Cameron if (!flush_buf) 8505edd16368SStephen M. Cameron return; 8506edd16368SStephen M. Cameron 850745fcb86eSStephen Cameron c = cmd_alloc(h); 8508bf43caf3SRobert Elliott 8509a2dac136SStephen M. Cameron if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0, 8510a2dac136SStephen M. Cameron RAID_CTLR_LUNID, TYPE_CMD)) { 8511a2dac136SStephen M. Cameron goto out; 8512a2dac136SStephen M. Cameron } 851325163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 8514c448ecfaSDon Brace PCI_DMA_TODEVICE, DEFAULT_TIMEOUT); 851525163bd5SWebb Scales if (rc) 851625163bd5SWebb Scales goto out; 8517edd16368SStephen M. Cameron if (c->err_info->CommandStatus != 0) 8518a2dac136SStephen M. Cameron out: 8519edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 8520edd16368SStephen M. Cameron "error flushing cache on controller\n"); 852145fcb86eSStephen Cameron cmd_free(h, c); 8522edd16368SStephen M. Cameron kfree(flush_buf); 8523edd16368SStephen M. Cameron } 8524edd16368SStephen M. Cameron 8525c2adae44SScott Teel /* Make controller gather fresh report lun data each time we 8526c2adae44SScott Teel * send down a report luns request 8527c2adae44SScott Teel */ 8528c2adae44SScott Teel static void hpsa_disable_rld_caching(struct ctlr_info *h) 8529c2adae44SScott Teel { 8530c2adae44SScott Teel u32 *options; 8531c2adae44SScott Teel struct CommandList *c; 8532c2adae44SScott Teel int rc; 8533c2adae44SScott Teel 8534c2adae44SScott Teel /* Don't bother trying to set diag options if locked up */ 8535c2adae44SScott Teel if (unlikely(h->lockup_detected)) 8536c2adae44SScott Teel return; 8537c2adae44SScott Teel 8538c2adae44SScott Teel options = kzalloc(sizeof(*options), GFP_KERNEL); 85397e8a9486SAmit Kushwaha if (!options) 8540c2adae44SScott Teel return; 8541c2adae44SScott Teel 8542c2adae44SScott Teel c = cmd_alloc(h); 8543c2adae44SScott Teel 8544c2adae44SScott Teel /* first, get the current diag options settings */ 8545c2adae44SScott Teel if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0, 8546c2adae44SScott Teel RAID_CTLR_LUNID, TYPE_CMD)) 8547c2adae44SScott Teel goto errout; 8548c2adae44SScott Teel 8549c2adae44SScott Teel rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 8550c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 8551c2adae44SScott Teel if ((rc != 0) || (c->err_info->CommandStatus != 0)) 8552c2adae44SScott Teel goto errout; 8553c2adae44SScott Teel 8554c2adae44SScott Teel /* Now, set the bit for disabling the RLD caching */ 8555c2adae44SScott Teel *options |= HPSA_DIAG_OPTS_DISABLE_RLD_CACHING; 8556c2adae44SScott Teel 8557c2adae44SScott Teel if (fill_cmd(c, BMIC_SET_DIAG_OPTIONS, h, options, 4, 0, 8558c2adae44SScott Teel RAID_CTLR_LUNID, TYPE_CMD)) 8559c2adae44SScott Teel goto errout; 8560c2adae44SScott Teel 8561c2adae44SScott Teel rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 8562c448ecfaSDon Brace PCI_DMA_TODEVICE, DEFAULT_TIMEOUT); 8563c2adae44SScott Teel if ((rc != 0) || (c->err_info->CommandStatus != 0)) 8564c2adae44SScott Teel goto errout; 8565c2adae44SScott Teel 8566c2adae44SScott Teel /* Now verify that it got set: */ 8567c2adae44SScott Teel if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0, 8568c2adae44SScott Teel RAID_CTLR_LUNID, TYPE_CMD)) 8569c2adae44SScott Teel goto errout; 8570c2adae44SScott Teel 8571c2adae44SScott Teel rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 8572c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 8573c2adae44SScott Teel if ((rc != 0) || (c->err_info->CommandStatus != 0)) 8574c2adae44SScott Teel goto errout; 8575c2adae44SScott Teel 8576d8a080c3SDan Carpenter if (*options & HPSA_DIAG_OPTS_DISABLE_RLD_CACHING) 8577c2adae44SScott Teel goto out; 8578c2adae44SScott Teel 8579c2adae44SScott Teel errout: 8580c2adae44SScott Teel dev_err(&h->pdev->dev, 8581c2adae44SScott Teel "Error: failed to disable report lun data caching.\n"); 8582c2adae44SScott Teel out: 8583c2adae44SScott Teel cmd_free(h, c); 8584c2adae44SScott Teel kfree(options); 8585c2adae44SScott Teel } 8586c2adae44SScott Teel 8587edd16368SStephen M. Cameron static void hpsa_shutdown(struct pci_dev *pdev) 8588edd16368SStephen M. Cameron { 8589edd16368SStephen M. Cameron struct ctlr_info *h; 8590edd16368SStephen M. Cameron 8591edd16368SStephen M. Cameron h = pci_get_drvdata(pdev); 8592edd16368SStephen M. Cameron /* Turn board interrupts off and send the flush cache command 8593edd16368SStephen M. Cameron * sendcmd will turn off interrupt, and send the flush... 8594edd16368SStephen M. Cameron * To write all data in the battery backed cache to disks 8595edd16368SStephen M. Cameron */ 8596edd16368SStephen M. Cameron hpsa_flush_cache(h); 8597edd16368SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 8598105a3dbcSRobert Elliott hpsa_free_irqs(h); /* init_one 4 */ 8599cc64c817SRobert Elliott hpsa_disable_interrupt_mode(h); /* pci_init 2 */ 8600edd16368SStephen M. Cameron } 8601edd16368SStephen M. Cameron 86026f039790SGreg Kroah-Hartman static void hpsa_free_device_info(struct ctlr_info *h) 860355e14e76SStephen M. Cameron { 860455e14e76SStephen M. Cameron int i; 860555e14e76SStephen M. Cameron 8606105a3dbcSRobert Elliott for (i = 0; i < h->ndevices; i++) { 860755e14e76SStephen M. Cameron kfree(h->dev[i]); 8608105a3dbcSRobert Elliott h->dev[i] = NULL; 8609105a3dbcSRobert Elliott } 861055e14e76SStephen M. Cameron } 861155e14e76SStephen M. Cameron 86126f039790SGreg Kroah-Hartman static void hpsa_remove_one(struct pci_dev *pdev) 8613edd16368SStephen M. Cameron { 8614edd16368SStephen M. Cameron struct ctlr_info *h; 86158a98db73SStephen M. Cameron unsigned long flags; 8616edd16368SStephen M. Cameron 8617edd16368SStephen M. Cameron if (pci_get_drvdata(pdev) == NULL) { 8618edd16368SStephen M. Cameron dev_err(&pdev->dev, "unable to remove device\n"); 8619edd16368SStephen M. Cameron return; 8620edd16368SStephen M. Cameron } 8621edd16368SStephen M. Cameron h = pci_get_drvdata(pdev); 86228a98db73SStephen M. Cameron 86238a98db73SStephen M. Cameron /* Get rid of any controller monitoring work items */ 86248a98db73SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 86258a98db73SStephen M. Cameron h->remove_in_progress = 1; 86268a98db73SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 86276636e7f4SDon Brace cancel_delayed_work_sync(&h->monitor_ctlr_work); 86286636e7f4SDon Brace cancel_delayed_work_sync(&h->rescan_ctlr_work); 86293d38f00cSScott Teel cancel_delayed_work_sync(&h->event_monitor_work); 86306636e7f4SDon Brace destroy_workqueue(h->rescan_ctlr_wq); 86316636e7f4SDon Brace destroy_workqueue(h->resubmit_wq); 8632cc64c817SRobert Elliott 86332d041306SDon Brace /* 86342d041306SDon Brace * Call before disabling interrupts. 86352d041306SDon Brace * scsi_remove_host can trigger I/O operations especially 86362d041306SDon Brace * when multipath is enabled. There can be SYNCHRONIZE CACHE 86372d041306SDon Brace * operations which cannot complete and will hang the system. 86382d041306SDon Brace */ 86392d041306SDon Brace if (h->scsi_host) 86402d041306SDon Brace scsi_remove_host(h->scsi_host); /* init_one 8 */ 8641105a3dbcSRobert Elliott /* includes hpsa_free_irqs - init_one 4 */ 8642195f2c65SRobert Elliott /* includes hpsa_disable_interrupt_mode - pci_init 2 */ 8643edd16368SStephen M. Cameron hpsa_shutdown(pdev); 8644cc64c817SRobert Elliott 8645105a3dbcSRobert Elliott hpsa_free_device_info(h); /* scan */ 8646105a3dbcSRobert Elliott 86472946e82bSRobert Elliott kfree(h->hba_inquiry_data); /* init_one 10 */ 86482946e82bSRobert Elliott h->hba_inquiry_data = NULL; /* init_one 10 */ 86492946e82bSRobert Elliott hpsa_free_ioaccel2_sg_chain_blocks(h); 8650105a3dbcSRobert Elliott hpsa_free_performant_mode(h); /* init_one 7 */ 8651105a3dbcSRobert Elliott hpsa_free_sg_chain_blocks(h); /* init_one 6 */ 86521fb7c98aSRobert Elliott hpsa_free_cmd_pool(h); /* init_one 5 */ 865334592254SScott Teel kfree(h->lastlogicals); 8654105a3dbcSRobert Elliott 8655105a3dbcSRobert Elliott /* hpsa_free_irqs already called via hpsa_shutdown init_one 4 */ 8656195f2c65SRobert Elliott 86572946e82bSRobert Elliott scsi_host_put(h->scsi_host); /* init_one 3 */ 86582946e82bSRobert Elliott h->scsi_host = NULL; /* init_one 3 */ 86592946e82bSRobert Elliott 8660195f2c65SRobert Elliott /* includes hpsa_disable_interrupt_mode - pci_init 2 */ 86612946e82bSRobert Elliott hpsa_free_pci_init(h); /* init_one 2.5 */ 8662195f2c65SRobert Elliott 8663105a3dbcSRobert Elliott free_percpu(h->lockup_detected); /* init_one 2 */ 8664105a3dbcSRobert Elliott h->lockup_detected = NULL; /* init_one 2 */ 8665105a3dbcSRobert Elliott /* (void) pci_disable_pcie_error_reporting(pdev); */ /* init_one 1 */ 8666d04e62b9SKevin Barnett 8667d04e62b9SKevin Barnett hpsa_delete_sas_host(h); 8668d04e62b9SKevin Barnett 8669105a3dbcSRobert Elliott kfree(h); /* init_one 1 */ 8670edd16368SStephen M. Cameron } 8671edd16368SStephen M. Cameron 8672edd16368SStephen M. Cameron static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev, 8673edd16368SStephen M. Cameron __attribute__((unused)) pm_message_t state) 8674edd16368SStephen M. Cameron { 8675edd16368SStephen M. Cameron return -ENOSYS; 8676edd16368SStephen M. Cameron } 8677edd16368SStephen M. Cameron 8678edd16368SStephen M. Cameron static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev) 8679edd16368SStephen M. Cameron { 8680edd16368SStephen M. Cameron return -ENOSYS; 8681edd16368SStephen M. Cameron } 8682edd16368SStephen M. Cameron 8683edd16368SStephen M. Cameron static struct pci_driver hpsa_pci_driver = { 8684f79cfec6SStephen M. Cameron .name = HPSA, 8685edd16368SStephen M. Cameron .probe = hpsa_init_one, 86866f039790SGreg Kroah-Hartman .remove = hpsa_remove_one, 8687edd16368SStephen M. Cameron .id_table = hpsa_pci_device_id, /* id_table */ 8688edd16368SStephen M. Cameron .shutdown = hpsa_shutdown, 8689edd16368SStephen M. Cameron .suspend = hpsa_suspend, 8690edd16368SStephen M. Cameron .resume = hpsa_resume, 8691edd16368SStephen M. Cameron }; 8692edd16368SStephen M. Cameron 8693303932fdSDon Brace /* Fill in bucket_map[], given nsgs (the max number of 8694303932fdSDon Brace * scatter gather elements supported) and bucket[], 8695303932fdSDon Brace * which is an array of 8 integers. The bucket[] array 8696303932fdSDon Brace * contains 8 different DMA transfer sizes (in 16 8697303932fdSDon Brace * byte increments) which the controller uses to fetch 8698303932fdSDon Brace * commands. This function fills in bucket_map[], which 8699303932fdSDon Brace * maps a given number of scatter gather elements to one of 8700303932fdSDon Brace * the 8 DMA transfer sizes. The point of it is to allow the 8701303932fdSDon Brace * controller to only do as much DMA as needed to fetch the 8702303932fdSDon Brace * command, with the DMA transfer size encoded in the lower 8703303932fdSDon Brace * bits of the command address. 8704303932fdSDon Brace */ 8705303932fdSDon Brace static void calc_bucket_map(int bucket[], int num_buckets, 87062b08b3e9SDon Brace int nsgs, int min_blocks, u32 *bucket_map) 8707303932fdSDon Brace { 8708303932fdSDon Brace int i, j, b, size; 8709303932fdSDon Brace 8710303932fdSDon Brace /* Note, bucket_map must have nsgs+1 entries. */ 8711303932fdSDon Brace for (i = 0; i <= nsgs; i++) { 8712303932fdSDon Brace /* Compute size of a command with i SG entries */ 8713e1f7de0cSMatt Gates size = i + min_blocks; 8714303932fdSDon Brace b = num_buckets; /* Assume the biggest bucket */ 8715303932fdSDon Brace /* Find the bucket that is just big enough */ 8716e1f7de0cSMatt Gates for (j = 0; j < num_buckets; j++) { 8717303932fdSDon Brace if (bucket[j] >= size) { 8718303932fdSDon Brace b = j; 8719303932fdSDon Brace break; 8720303932fdSDon Brace } 8721303932fdSDon Brace } 8722303932fdSDon Brace /* for a command with i SG entries, use bucket b. */ 8723303932fdSDon Brace bucket_map[i] = b; 8724303932fdSDon Brace } 8725303932fdSDon Brace } 8726303932fdSDon Brace 8727105a3dbcSRobert Elliott /* 8728105a3dbcSRobert Elliott * return -ENODEV on err, 0 on success (or no action) 8729105a3dbcSRobert Elliott * allocates numerous items that must be freed later 8730105a3dbcSRobert Elliott */ 8731c706a795SRobert Elliott static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support) 8732303932fdSDon Brace { 87336c311b57SStephen M. Cameron int i; 87346c311b57SStephen M. Cameron unsigned long register_value; 8735e1f7de0cSMatt Gates unsigned long transMethod = CFGTBL_Trans_Performant | 8736e1f7de0cSMatt Gates (trans_support & CFGTBL_Trans_use_short_tags) | 8737e1f7de0cSMatt Gates CFGTBL_Trans_enable_directed_msix | 8738b9af4937SStephen M. Cameron (trans_support & (CFGTBL_Trans_io_accel1 | 8739b9af4937SStephen M. Cameron CFGTBL_Trans_io_accel2)); 8740e1f7de0cSMatt Gates struct access_method access = SA5_performant_access; 8741def342bdSStephen M. Cameron 8742def342bdSStephen M. Cameron /* This is a bit complicated. There are 8 registers on 8743def342bdSStephen M. Cameron * the controller which we write to to tell it 8 different 8744def342bdSStephen M. Cameron * sizes of commands which there may be. It's a way of 8745def342bdSStephen M. Cameron * reducing the DMA done to fetch each command. Encoded into 8746def342bdSStephen M. Cameron * each command's tag are 3 bits which communicate to the controller 8747def342bdSStephen M. Cameron * which of the eight sizes that command fits within. The size of 8748def342bdSStephen M. Cameron * each command depends on how many scatter gather entries there are. 8749def342bdSStephen M. Cameron * Each SG entry requires 16 bytes. The eight registers are programmed 8750def342bdSStephen M. Cameron * with the number of 16-byte blocks a command of that size requires. 8751def342bdSStephen M. Cameron * The smallest command possible requires 5 such 16 byte blocks. 8752d66ae08bSStephen M. Cameron * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte 8753def342bdSStephen M. Cameron * blocks. Note, this only extends to the SG entries contained 8754def342bdSStephen M. Cameron * within the command block, and does not extend to chained blocks 8755def342bdSStephen M. Cameron * of SG elements. bft[] contains the eight values we write to 8756def342bdSStephen M. Cameron * the registers. They are not evenly distributed, but have more 8757def342bdSStephen M. Cameron * sizes for small commands, and fewer sizes for larger commands. 8758def342bdSStephen M. Cameron */ 8759d66ae08bSStephen M. Cameron int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4}; 8760b9af4937SStephen M. Cameron #define MIN_IOACCEL2_BFT_ENTRY 5 8761b9af4937SStephen M. Cameron #define HPSA_IOACCEL2_HEADER_SZ 4 8762b9af4937SStephen M. Cameron int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12, 8763b9af4937SStephen M. Cameron 13, 14, 15, 16, 17, 18, 19, 8764b9af4937SStephen M. Cameron HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES}; 8765b9af4937SStephen M. Cameron BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16); 8766b9af4937SStephen M. Cameron BUILD_BUG_ON(ARRAY_SIZE(bft) != 8); 8767b9af4937SStephen M. Cameron BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) > 8768b9af4937SStephen M. Cameron 16 * MIN_IOACCEL2_BFT_ENTRY); 8769b9af4937SStephen M. Cameron BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16); 8770d66ae08bSStephen M. Cameron BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4); 8771303932fdSDon Brace /* 5 = 1 s/g entry or 4k 8772303932fdSDon Brace * 6 = 2 s/g entry or 8k 8773303932fdSDon Brace * 8 = 4 s/g entry or 16k 8774303932fdSDon Brace * 10 = 6 s/g entry or 24k 8775303932fdSDon Brace */ 8776303932fdSDon Brace 8777b3a52e79SStephen M. Cameron /* If the controller supports either ioaccel method then 8778b3a52e79SStephen M. Cameron * we can also use the RAID stack submit path that does not 8779b3a52e79SStephen M. Cameron * perform the superfluous readl() after each command submission. 8780b3a52e79SStephen M. Cameron */ 8781b3a52e79SStephen M. Cameron if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2)) 8782b3a52e79SStephen M. Cameron access = SA5_performant_access_no_read; 8783b3a52e79SStephen M. Cameron 8784303932fdSDon Brace /* Controller spec: zero out this buffer. */ 8785072b0518SStephen M. Cameron for (i = 0; i < h->nreply_queues; i++) 8786072b0518SStephen M. Cameron memset(h->reply_queue[i].head, 0, h->reply_queue_size); 8787303932fdSDon Brace 8788d66ae08bSStephen M. Cameron bft[7] = SG_ENTRIES_IN_CMD + 4; 8789d66ae08bSStephen M. Cameron calc_bucket_map(bft, ARRAY_SIZE(bft), 8790e1f7de0cSMatt Gates SG_ENTRIES_IN_CMD, 4, h->blockFetchTable); 8791303932fdSDon Brace for (i = 0; i < 8; i++) 8792303932fdSDon Brace writel(bft[i], &h->transtable->BlockFetch[i]); 8793303932fdSDon Brace 8794303932fdSDon Brace /* size of controller ring buffer */ 8795303932fdSDon Brace writel(h->max_commands, &h->transtable->RepQSize); 8796254f796bSMatt Gates writel(h->nreply_queues, &h->transtable->RepQCount); 8797303932fdSDon Brace writel(0, &h->transtable->RepQCtrAddrLow32); 8798303932fdSDon Brace writel(0, &h->transtable->RepQCtrAddrHigh32); 8799254f796bSMatt Gates 8800254f796bSMatt Gates for (i = 0; i < h->nreply_queues; i++) { 8801254f796bSMatt Gates writel(0, &h->transtable->RepQAddr[i].upper); 8802072b0518SStephen M. Cameron writel(h->reply_queue[i].busaddr, 8803254f796bSMatt Gates &h->transtable->RepQAddr[i].lower); 8804254f796bSMatt Gates } 8805254f796bSMatt Gates 8806b9af4937SStephen M. Cameron writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi); 8807e1f7de0cSMatt Gates writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest)); 8808e1f7de0cSMatt Gates /* 8809e1f7de0cSMatt Gates * enable outbound interrupt coalescing in accelerator mode; 8810e1f7de0cSMatt Gates */ 8811e1f7de0cSMatt Gates if (trans_support & CFGTBL_Trans_io_accel1) { 8812e1f7de0cSMatt Gates access = SA5_ioaccel_mode1_access; 8813e1f7de0cSMatt Gates writel(10, &h->cfgtable->HostWrite.CoalIntDelay); 8814e1f7de0cSMatt Gates writel(4, &h->cfgtable->HostWrite.CoalIntCount); 881596b6ce4eSDon Brace } else 881696b6ce4eSDon Brace if (trans_support & CFGTBL_Trans_io_accel2) 8817c349775eSScott Teel access = SA5_ioaccel_mode2_access; 8818303932fdSDon Brace writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 8819c706a795SRobert Elliott if (hpsa_wait_for_mode_change_ack(h)) { 8820c706a795SRobert Elliott dev_err(&h->pdev->dev, 8821c706a795SRobert Elliott "performant mode problem - doorbell timeout\n"); 8822c706a795SRobert Elliott return -ENODEV; 8823c706a795SRobert Elliott } 8824303932fdSDon Brace register_value = readl(&(h->cfgtable->TransportActive)); 8825303932fdSDon Brace if (!(register_value & CFGTBL_Trans_Performant)) { 8826050f7147SStephen Cameron dev_err(&h->pdev->dev, 8827050f7147SStephen Cameron "performant mode problem - transport not active\n"); 8828c706a795SRobert Elliott return -ENODEV; 8829303932fdSDon Brace } 8830960a30e7SStephen M. Cameron /* Change the access methods to the performant access methods */ 8831e1f7de0cSMatt Gates h->access = access; 8832e1f7de0cSMatt Gates h->transMethod = transMethod; 8833e1f7de0cSMatt Gates 8834b9af4937SStephen M. Cameron if (!((trans_support & CFGTBL_Trans_io_accel1) || 8835b9af4937SStephen M. Cameron (trans_support & CFGTBL_Trans_io_accel2))) 8836c706a795SRobert Elliott return 0; 8837e1f7de0cSMatt Gates 8838b9af4937SStephen M. Cameron if (trans_support & CFGTBL_Trans_io_accel1) { 8839e1f7de0cSMatt Gates /* Set up I/O accelerator mode */ 8840e1f7de0cSMatt Gates for (i = 0; i < h->nreply_queues; i++) { 8841e1f7de0cSMatt Gates writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX); 8842e1f7de0cSMatt Gates h->reply_queue[i].current_entry = 8843e1f7de0cSMatt Gates readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX); 8844e1f7de0cSMatt Gates } 8845283b4a9bSStephen M. Cameron bft[7] = h->ioaccel_maxsg + 8; 8846283b4a9bSStephen M. Cameron calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8, 8847e1f7de0cSMatt Gates h->ioaccel1_blockFetchTable); 8848e1f7de0cSMatt Gates 8849e1f7de0cSMatt Gates /* initialize all reply queue entries to unused */ 8850072b0518SStephen M. Cameron for (i = 0; i < h->nreply_queues; i++) 8851072b0518SStephen M. Cameron memset(h->reply_queue[i].head, 8852072b0518SStephen M. Cameron (u8) IOACCEL_MODE1_REPLY_UNUSED, 8853072b0518SStephen M. Cameron h->reply_queue_size); 8854e1f7de0cSMatt Gates 8855e1f7de0cSMatt Gates /* set all the constant fields in the accelerator command 8856e1f7de0cSMatt Gates * frames once at init time to save CPU cycles later. 8857e1f7de0cSMatt Gates */ 8858e1f7de0cSMatt Gates for (i = 0; i < h->nr_cmds; i++) { 8859e1f7de0cSMatt Gates struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i]; 8860e1f7de0cSMatt Gates 8861e1f7de0cSMatt Gates cp->function = IOACCEL1_FUNCTION_SCSIIO; 8862e1f7de0cSMatt Gates cp->err_info = (u32) (h->errinfo_pool_dhandle + 8863e1f7de0cSMatt Gates (i * sizeof(struct ErrorInfo))); 8864e1f7de0cSMatt Gates cp->err_info_len = sizeof(struct ErrorInfo); 8865e1f7de0cSMatt Gates cp->sgl_offset = IOACCEL1_SGLOFFSET; 88662b08b3e9SDon Brace cp->host_context_flags = 88672b08b3e9SDon Brace cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT); 8868e1f7de0cSMatt Gates cp->timeout_sec = 0; 8869e1f7de0cSMatt Gates cp->ReplyQueue = 0; 887050a0decfSStephen M. Cameron cp->tag = 8871f2405db8SDon Brace cpu_to_le64((i << DIRECT_LOOKUP_SHIFT)); 887250a0decfSStephen M. Cameron cp->host_addr = 887350a0decfSStephen M. Cameron cpu_to_le64(h->ioaccel_cmd_pool_dhandle + 8874e1f7de0cSMatt Gates (i * sizeof(struct io_accel1_cmd))); 8875e1f7de0cSMatt Gates } 8876b9af4937SStephen M. Cameron } else if (trans_support & CFGTBL_Trans_io_accel2) { 8877b9af4937SStephen M. Cameron u64 cfg_offset, cfg_base_addr_index; 8878b9af4937SStephen M. Cameron u32 bft2_offset, cfg_base_addr; 8879b9af4937SStephen M. Cameron int rc; 8880b9af4937SStephen M. Cameron 8881b9af4937SStephen M. Cameron rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 8882b9af4937SStephen M. Cameron &cfg_base_addr_index, &cfg_offset); 8883b9af4937SStephen M. Cameron BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64); 8884b9af4937SStephen M. Cameron bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ; 8885b9af4937SStephen M. Cameron calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg, 8886b9af4937SStephen M. Cameron 4, h->ioaccel2_blockFetchTable); 8887b9af4937SStephen M. Cameron bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset); 8888b9af4937SStephen M. Cameron BUILD_BUG_ON(offsetof(struct CfgTable, 8889b9af4937SStephen M. Cameron io_accel_request_size_offset) != 0xb8); 8890b9af4937SStephen M. Cameron h->ioaccel2_bft2_regs = 8891b9af4937SStephen M. Cameron remap_pci_mem(pci_resource_start(h->pdev, 8892b9af4937SStephen M. Cameron cfg_base_addr_index) + 8893b9af4937SStephen M. Cameron cfg_offset + bft2_offset, 8894b9af4937SStephen M. Cameron ARRAY_SIZE(bft2) * 8895b9af4937SStephen M. Cameron sizeof(*h->ioaccel2_bft2_regs)); 8896b9af4937SStephen M. Cameron for (i = 0; i < ARRAY_SIZE(bft2); i++) 8897b9af4937SStephen M. Cameron writel(bft2[i], &h->ioaccel2_bft2_regs[i]); 8898b9af4937SStephen M. Cameron } 8899b9af4937SStephen M. Cameron writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 8900c706a795SRobert Elliott if (hpsa_wait_for_mode_change_ack(h)) { 8901c706a795SRobert Elliott dev_err(&h->pdev->dev, 8902c706a795SRobert Elliott "performant mode problem - enabling ioaccel mode\n"); 8903c706a795SRobert Elliott return -ENODEV; 8904c706a795SRobert Elliott } 8905c706a795SRobert Elliott return 0; 8906e1f7de0cSMatt Gates } 8907e1f7de0cSMatt Gates 89081fb7c98aSRobert Elliott /* Free ioaccel1 mode command blocks and block fetch table */ 89091fb7c98aSRobert Elliott static void hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info *h) 89101fb7c98aSRobert Elliott { 8911105a3dbcSRobert Elliott if (h->ioaccel_cmd_pool) { 89121fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 89131fb7c98aSRobert Elliott h->nr_cmds * sizeof(*h->ioaccel_cmd_pool), 89141fb7c98aSRobert Elliott h->ioaccel_cmd_pool, 89151fb7c98aSRobert Elliott h->ioaccel_cmd_pool_dhandle); 8916105a3dbcSRobert Elliott h->ioaccel_cmd_pool = NULL; 8917105a3dbcSRobert Elliott h->ioaccel_cmd_pool_dhandle = 0; 8918105a3dbcSRobert Elliott } 89191fb7c98aSRobert Elliott kfree(h->ioaccel1_blockFetchTable); 8920105a3dbcSRobert Elliott h->ioaccel1_blockFetchTable = NULL; 89211fb7c98aSRobert Elliott } 89221fb7c98aSRobert Elliott 8923d37ffbe4SRobert Elliott /* Allocate ioaccel1 mode command blocks and block fetch table */ 8924d37ffbe4SRobert Elliott static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h) 8925e1f7de0cSMatt Gates { 8926283b4a9bSStephen M. Cameron h->ioaccel_maxsg = 8927283b4a9bSStephen M. Cameron readl(&(h->cfgtable->io_accel_max_embedded_sg_count)); 8928283b4a9bSStephen M. Cameron if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES) 8929283b4a9bSStephen M. Cameron h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES; 8930283b4a9bSStephen M. Cameron 8931e1f7de0cSMatt Gates /* Command structures must be aligned on a 128-byte boundary 8932e1f7de0cSMatt Gates * because the 7 lower bits of the address are used by the 8933e1f7de0cSMatt Gates * hardware. 8934e1f7de0cSMatt Gates */ 8935e1f7de0cSMatt Gates BUILD_BUG_ON(sizeof(struct io_accel1_cmd) % 8936e1f7de0cSMatt Gates IOACCEL1_COMMANDLIST_ALIGNMENT); 8937e1f7de0cSMatt Gates h->ioaccel_cmd_pool = 8938e1f7de0cSMatt Gates pci_alloc_consistent(h->pdev, 8939e1f7de0cSMatt Gates h->nr_cmds * sizeof(*h->ioaccel_cmd_pool), 8940e1f7de0cSMatt Gates &(h->ioaccel_cmd_pool_dhandle)); 8941e1f7de0cSMatt Gates 8942e1f7de0cSMatt Gates h->ioaccel1_blockFetchTable = 8943283b4a9bSStephen M. Cameron kmalloc(((h->ioaccel_maxsg + 1) * 8944e1f7de0cSMatt Gates sizeof(u32)), GFP_KERNEL); 8945e1f7de0cSMatt Gates 8946e1f7de0cSMatt Gates if ((h->ioaccel_cmd_pool == NULL) || 8947e1f7de0cSMatt Gates (h->ioaccel1_blockFetchTable == NULL)) 8948e1f7de0cSMatt Gates goto clean_up; 8949e1f7de0cSMatt Gates 8950e1f7de0cSMatt Gates memset(h->ioaccel_cmd_pool, 0, 8951e1f7de0cSMatt Gates h->nr_cmds * sizeof(*h->ioaccel_cmd_pool)); 8952e1f7de0cSMatt Gates return 0; 8953e1f7de0cSMatt Gates 8954e1f7de0cSMatt Gates clean_up: 89551fb7c98aSRobert Elliott hpsa_free_ioaccel1_cmd_and_bft(h); 89562dd02d74SRobert Elliott return -ENOMEM; 89576c311b57SStephen M. Cameron } 89586c311b57SStephen M. Cameron 89591fb7c98aSRobert Elliott /* Free ioaccel2 mode command blocks and block fetch table */ 89601fb7c98aSRobert Elliott static void hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info *h) 89611fb7c98aSRobert Elliott { 8962d9a729f3SWebb Scales hpsa_free_ioaccel2_sg_chain_blocks(h); 8963d9a729f3SWebb Scales 8964105a3dbcSRobert Elliott if (h->ioaccel2_cmd_pool) { 89651fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 89661fb7c98aSRobert Elliott h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 89671fb7c98aSRobert Elliott h->ioaccel2_cmd_pool, 89681fb7c98aSRobert Elliott h->ioaccel2_cmd_pool_dhandle); 8969105a3dbcSRobert Elliott h->ioaccel2_cmd_pool = NULL; 8970105a3dbcSRobert Elliott h->ioaccel2_cmd_pool_dhandle = 0; 8971105a3dbcSRobert Elliott } 89721fb7c98aSRobert Elliott kfree(h->ioaccel2_blockFetchTable); 8973105a3dbcSRobert Elliott h->ioaccel2_blockFetchTable = NULL; 89741fb7c98aSRobert Elliott } 89751fb7c98aSRobert Elliott 8976d37ffbe4SRobert Elliott /* Allocate ioaccel2 mode command blocks and block fetch table */ 8977d37ffbe4SRobert Elliott static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h) 8978aca9012aSStephen M. Cameron { 8979d9a729f3SWebb Scales int rc; 8980d9a729f3SWebb Scales 8981aca9012aSStephen M. Cameron /* Allocate ioaccel2 mode command blocks and block fetch table */ 8982aca9012aSStephen M. Cameron 8983aca9012aSStephen M. Cameron h->ioaccel_maxsg = 8984aca9012aSStephen M. Cameron readl(&(h->cfgtable->io_accel_max_embedded_sg_count)); 8985aca9012aSStephen M. Cameron if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES) 8986aca9012aSStephen M. Cameron h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES; 8987aca9012aSStephen M. Cameron 8988aca9012aSStephen M. Cameron BUILD_BUG_ON(sizeof(struct io_accel2_cmd) % 8989aca9012aSStephen M. Cameron IOACCEL2_COMMANDLIST_ALIGNMENT); 8990aca9012aSStephen M. Cameron h->ioaccel2_cmd_pool = 8991aca9012aSStephen M. Cameron pci_alloc_consistent(h->pdev, 8992aca9012aSStephen M. Cameron h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 8993aca9012aSStephen M. Cameron &(h->ioaccel2_cmd_pool_dhandle)); 8994aca9012aSStephen M. Cameron 8995aca9012aSStephen M. Cameron h->ioaccel2_blockFetchTable = 8996aca9012aSStephen M. Cameron kmalloc(((h->ioaccel_maxsg + 1) * 8997aca9012aSStephen M. Cameron sizeof(u32)), GFP_KERNEL); 8998aca9012aSStephen M. Cameron 8999aca9012aSStephen M. Cameron if ((h->ioaccel2_cmd_pool == NULL) || 9000d9a729f3SWebb Scales (h->ioaccel2_blockFetchTable == NULL)) { 9001d9a729f3SWebb Scales rc = -ENOMEM; 9002d9a729f3SWebb Scales goto clean_up; 9003d9a729f3SWebb Scales } 9004d9a729f3SWebb Scales 9005d9a729f3SWebb Scales rc = hpsa_allocate_ioaccel2_sg_chain_blocks(h); 9006d9a729f3SWebb Scales if (rc) 9007aca9012aSStephen M. Cameron goto clean_up; 9008aca9012aSStephen M. Cameron 9009aca9012aSStephen M. Cameron memset(h->ioaccel2_cmd_pool, 0, 9010aca9012aSStephen M. Cameron h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool)); 9011aca9012aSStephen M. Cameron return 0; 9012aca9012aSStephen M. Cameron 9013aca9012aSStephen M. Cameron clean_up: 90141fb7c98aSRobert Elliott hpsa_free_ioaccel2_cmd_and_bft(h); 9015d9a729f3SWebb Scales return rc; 9016aca9012aSStephen M. Cameron } 9017aca9012aSStephen M. Cameron 9018105a3dbcSRobert Elliott /* Free items allocated by hpsa_put_ctlr_into_performant_mode */ 9019105a3dbcSRobert Elliott static void hpsa_free_performant_mode(struct ctlr_info *h) 9020105a3dbcSRobert Elliott { 9021105a3dbcSRobert Elliott kfree(h->blockFetchTable); 9022105a3dbcSRobert Elliott h->blockFetchTable = NULL; 9023105a3dbcSRobert Elliott hpsa_free_reply_queues(h); 9024105a3dbcSRobert Elliott hpsa_free_ioaccel1_cmd_and_bft(h); 9025105a3dbcSRobert Elliott hpsa_free_ioaccel2_cmd_and_bft(h); 9026105a3dbcSRobert Elliott } 9027105a3dbcSRobert Elliott 9028105a3dbcSRobert Elliott /* return -ENODEV on error, 0 on success (or no action) 9029105a3dbcSRobert Elliott * allocates numerous items that must be freed later 9030105a3dbcSRobert Elliott */ 9031105a3dbcSRobert Elliott static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h) 90326c311b57SStephen M. Cameron { 90336c311b57SStephen M. Cameron u32 trans_support; 9034e1f7de0cSMatt Gates unsigned long transMethod = CFGTBL_Trans_Performant | 9035e1f7de0cSMatt Gates CFGTBL_Trans_use_short_tags; 9036105a3dbcSRobert Elliott int i, rc; 90376c311b57SStephen M. Cameron 903802ec19c8SStephen M. Cameron if (hpsa_simple_mode) 9039105a3dbcSRobert Elliott return 0; 904002ec19c8SStephen M. Cameron 904167c99a72Sscameron@beardog.cce.hp.com trans_support = readl(&(h->cfgtable->TransportSupport)); 904267c99a72Sscameron@beardog.cce.hp.com if (!(trans_support & PERFORMANT_MODE)) 9043105a3dbcSRobert Elliott return 0; 904467c99a72Sscameron@beardog.cce.hp.com 9045e1f7de0cSMatt Gates /* Check for I/O accelerator mode support */ 9046e1f7de0cSMatt Gates if (trans_support & CFGTBL_Trans_io_accel1) { 9047e1f7de0cSMatt Gates transMethod |= CFGTBL_Trans_io_accel1 | 9048e1f7de0cSMatt Gates CFGTBL_Trans_enable_directed_msix; 9049105a3dbcSRobert Elliott rc = hpsa_alloc_ioaccel1_cmd_and_bft(h); 9050105a3dbcSRobert Elliott if (rc) 9051105a3dbcSRobert Elliott return rc; 9052105a3dbcSRobert Elliott } else if (trans_support & CFGTBL_Trans_io_accel2) { 9053aca9012aSStephen M. Cameron transMethod |= CFGTBL_Trans_io_accel2 | 9054aca9012aSStephen M. Cameron CFGTBL_Trans_enable_directed_msix; 9055105a3dbcSRobert Elliott rc = hpsa_alloc_ioaccel2_cmd_and_bft(h); 9056105a3dbcSRobert Elliott if (rc) 9057105a3dbcSRobert Elliott return rc; 9058e1f7de0cSMatt Gates } 9059e1f7de0cSMatt Gates 9060bc2bb154SChristoph Hellwig h->nreply_queues = h->msix_vectors > 0 ? h->msix_vectors : 1; 9061cba3d38bSStephen M. Cameron hpsa_get_max_perf_mode_cmds(h); 90626c311b57SStephen M. Cameron /* Performant mode ring buffer and supporting data structures */ 9063072b0518SStephen M. Cameron h->reply_queue_size = h->max_commands * sizeof(u64); 90646c311b57SStephen M. Cameron 9065254f796bSMatt Gates for (i = 0; i < h->nreply_queues; i++) { 9066072b0518SStephen M. Cameron h->reply_queue[i].head = pci_alloc_consistent(h->pdev, 9067072b0518SStephen M. Cameron h->reply_queue_size, 9068072b0518SStephen M. Cameron &(h->reply_queue[i].busaddr)); 9069105a3dbcSRobert Elliott if (!h->reply_queue[i].head) { 9070105a3dbcSRobert Elliott rc = -ENOMEM; 9071105a3dbcSRobert Elliott goto clean1; /* rq, ioaccel */ 9072105a3dbcSRobert Elliott } 9073254f796bSMatt Gates h->reply_queue[i].size = h->max_commands; 9074254f796bSMatt Gates h->reply_queue[i].wraparound = 1; /* spec: init to 1 */ 9075254f796bSMatt Gates h->reply_queue[i].current_entry = 0; 9076254f796bSMatt Gates } 9077254f796bSMatt Gates 90786c311b57SStephen M. Cameron /* Need a block fetch table for performant mode */ 9079d66ae08bSStephen M. Cameron h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) * 90806c311b57SStephen M. Cameron sizeof(u32)), GFP_KERNEL); 9081105a3dbcSRobert Elliott if (!h->blockFetchTable) { 9082105a3dbcSRobert Elliott rc = -ENOMEM; 9083105a3dbcSRobert Elliott goto clean1; /* rq, ioaccel */ 9084105a3dbcSRobert Elliott } 90856c311b57SStephen M. Cameron 9086105a3dbcSRobert Elliott rc = hpsa_enter_performant_mode(h, trans_support); 9087105a3dbcSRobert Elliott if (rc) 9088105a3dbcSRobert Elliott goto clean2; /* bft, rq, ioaccel */ 9089105a3dbcSRobert Elliott return 0; 9090303932fdSDon Brace 9091105a3dbcSRobert Elliott clean2: /* bft, rq, ioaccel */ 9092303932fdSDon Brace kfree(h->blockFetchTable); 9093105a3dbcSRobert Elliott h->blockFetchTable = NULL; 9094105a3dbcSRobert Elliott clean1: /* rq, ioaccel */ 9095105a3dbcSRobert Elliott hpsa_free_reply_queues(h); 9096105a3dbcSRobert Elliott hpsa_free_ioaccel1_cmd_and_bft(h); 9097105a3dbcSRobert Elliott hpsa_free_ioaccel2_cmd_and_bft(h); 9098105a3dbcSRobert Elliott return rc; 9099303932fdSDon Brace } 9100303932fdSDon Brace 910123100dd9SStephen M. Cameron static int is_accelerated_cmd(struct CommandList *c) 910276438d08SStephen M. Cameron { 910323100dd9SStephen M. Cameron return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2; 910423100dd9SStephen M. Cameron } 910523100dd9SStephen M. Cameron 910623100dd9SStephen M. Cameron static void hpsa_drain_accel_commands(struct ctlr_info *h) 910723100dd9SStephen M. Cameron { 910823100dd9SStephen M. Cameron struct CommandList *c = NULL; 9109f2405db8SDon Brace int i, accel_cmds_out; 9110281a7fd0SWebb Scales int refcount; 911176438d08SStephen M. Cameron 9112f2405db8SDon Brace do { /* wait for all outstanding ioaccel commands to drain out */ 911323100dd9SStephen M. Cameron accel_cmds_out = 0; 9114f2405db8SDon Brace for (i = 0; i < h->nr_cmds; i++) { 9115f2405db8SDon Brace c = h->cmd_pool + i; 9116281a7fd0SWebb Scales refcount = atomic_inc_return(&c->refcount); 9117281a7fd0SWebb Scales if (refcount > 1) /* Command is allocated */ 911823100dd9SStephen M. Cameron accel_cmds_out += is_accelerated_cmd(c); 9119281a7fd0SWebb Scales cmd_free(h, c); 9120f2405db8SDon Brace } 912123100dd9SStephen M. Cameron if (accel_cmds_out <= 0) 912276438d08SStephen M. Cameron break; 912376438d08SStephen M. Cameron msleep(100); 912476438d08SStephen M. Cameron } while (1); 912576438d08SStephen M. Cameron } 912676438d08SStephen M. Cameron 9127d04e62b9SKevin Barnett static struct hpsa_sas_phy *hpsa_alloc_sas_phy( 9128d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port) 9129d04e62b9SKevin Barnett { 9130d04e62b9SKevin Barnett struct hpsa_sas_phy *hpsa_sas_phy; 9131d04e62b9SKevin Barnett struct sas_phy *phy; 9132d04e62b9SKevin Barnett 9133d04e62b9SKevin Barnett hpsa_sas_phy = kzalloc(sizeof(*hpsa_sas_phy), GFP_KERNEL); 9134d04e62b9SKevin Barnett if (!hpsa_sas_phy) 9135d04e62b9SKevin Barnett return NULL; 9136d04e62b9SKevin Barnett 9137d04e62b9SKevin Barnett phy = sas_phy_alloc(hpsa_sas_port->parent_node->parent_dev, 9138d04e62b9SKevin Barnett hpsa_sas_port->next_phy_index); 9139d04e62b9SKevin Barnett if (!phy) { 9140d04e62b9SKevin Barnett kfree(hpsa_sas_phy); 9141d04e62b9SKevin Barnett return NULL; 9142d04e62b9SKevin Barnett } 9143d04e62b9SKevin Barnett 9144d04e62b9SKevin Barnett hpsa_sas_port->next_phy_index++; 9145d04e62b9SKevin Barnett hpsa_sas_phy->phy = phy; 9146d04e62b9SKevin Barnett hpsa_sas_phy->parent_port = hpsa_sas_port; 9147d04e62b9SKevin Barnett 9148d04e62b9SKevin Barnett return hpsa_sas_phy; 9149d04e62b9SKevin Barnett } 9150d04e62b9SKevin Barnett 9151d04e62b9SKevin Barnett static void hpsa_free_sas_phy(struct hpsa_sas_phy *hpsa_sas_phy) 9152d04e62b9SKevin Barnett { 9153d04e62b9SKevin Barnett struct sas_phy *phy = hpsa_sas_phy->phy; 9154d04e62b9SKevin Barnett 9155d04e62b9SKevin Barnett sas_port_delete_phy(hpsa_sas_phy->parent_port->port, phy); 9156d04e62b9SKevin Barnett sas_phy_free(phy); 9157d04e62b9SKevin Barnett if (hpsa_sas_phy->added_to_port) 9158d04e62b9SKevin Barnett list_del(&hpsa_sas_phy->phy_list_entry); 9159d04e62b9SKevin Barnett kfree(hpsa_sas_phy); 9160d04e62b9SKevin Barnett } 9161d04e62b9SKevin Barnett 9162d04e62b9SKevin Barnett static int hpsa_sas_port_add_phy(struct hpsa_sas_phy *hpsa_sas_phy) 9163d04e62b9SKevin Barnett { 9164d04e62b9SKevin Barnett int rc; 9165d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9166d04e62b9SKevin Barnett struct sas_phy *phy; 9167d04e62b9SKevin Barnett struct sas_identify *identify; 9168d04e62b9SKevin Barnett 9169d04e62b9SKevin Barnett hpsa_sas_port = hpsa_sas_phy->parent_port; 9170d04e62b9SKevin Barnett phy = hpsa_sas_phy->phy; 9171d04e62b9SKevin Barnett 9172d04e62b9SKevin Barnett identify = &phy->identify; 9173d04e62b9SKevin Barnett memset(identify, 0, sizeof(*identify)); 9174d04e62b9SKevin Barnett identify->sas_address = hpsa_sas_port->sas_address; 9175d04e62b9SKevin Barnett identify->device_type = SAS_END_DEVICE; 9176d04e62b9SKevin Barnett identify->initiator_port_protocols = SAS_PROTOCOL_STP; 9177d04e62b9SKevin Barnett identify->target_port_protocols = SAS_PROTOCOL_STP; 9178d04e62b9SKevin Barnett phy->minimum_linkrate_hw = SAS_LINK_RATE_UNKNOWN; 9179d04e62b9SKevin Barnett phy->maximum_linkrate_hw = SAS_LINK_RATE_UNKNOWN; 9180d04e62b9SKevin Barnett phy->minimum_linkrate = SAS_LINK_RATE_UNKNOWN; 9181d04e62b9SKevin Barnett phy->maximum_linkrate = SAS_LINK_RATE_UNKNOWN; 9182d04e62b9SKevin Barnett phy->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN; 9183d04e62b9SKevin Barnett 9184d04e62b9SKevin Barnett rc = sas_phy_add(hpsa_sas_phy->phy); 9185d04e62b9SKevin Barnett if (rc) 9186d04e62b9SKevin Barnett return rc; 9187d04e62b9SKevin Barnett 9188d04e62b9SKevin Barnett sas_port_add_phy(hpsa_sas_port->port, hpsa_sas_phy->phy); 9189d04e62b9SKevin Barnett list_add_tail(&hpsa_sas_phy->phy_list_entry, 9190d04e62b9SKevin Barnett &hpsa_sas_port->phy_list_head); 9191d04e62b9SKevin Barnett hpsa_sas_phy->added_to_port = true; 9192d04e62b9SKevin Barnett 9193d04e62b9SKevin Barnett return 0; 9194d04e62b9SKevin Barnett } 9195d04e62b9SKevin Barnett 9196d04e62b9SKevin Barnett static int 9197d04e62b9SKevin Barnett hpsa_sas_port_add_rphy(struct hpsa_sas_port *hpsa_sas_port, 9198d04e62b9SKevin Barnett struct sas_rphy *rphy) 9199d04e62b9SKevin Barnett { 9200d04e62b9SKevin Barnett struct sas_identify *identify; 9201d04e62b9SKevin Barnett 9202d04e62b9SKevin Barnett identify = &rphy->identify; 9203d04e62b9SKevin Barnett identify->sas_address = hpsa_sas_port->sas_address; 9204d04e62b9SKevin Barnett identify->initiator_port_protocols = SAS_PROTOCOL_STP; 9205d04e62b9SKevin Barnett identify->target_port_protocols = SAS_PROTOCOL_STP; 9206d04e62b9SKevin Barnett 9207d04e62b9SKevin Barnett return sas_rphy_add(rphy); 9208d04e62b9SKevin Barnett } 9209d04e62b9SKevin Barnett 9210d04e62b9SKevin Barnett static struct hpsa_sas_port 9211d04e62b9SKevin Barnett *hpsa_alloc_sas_port(struct hpsa_sas_node *hpsa_sas_node, 9212d04e62b9SKevin Barnett u64 sas_address) 9213d04e62b9SKevin Barnett { 9214d04e62b9SKevin Barnett int rc; 9215d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9216d04e62b9SKevin Barnett struct sas_port *port; 9217d04e62b9SKevin Barnett 9218d04e62b9SKevin Barnett hpsa_sas_port = kzalloc(sizeof(*hpsa_sas_port), GFP_KERNEL); 9219d04e62b9SKevin Barnett if (!hpsa_sas_port) 9220d04e62b9SKevin Barnett return NULL; 9221d04e62b9SKevin Barnett 9222d04e62b9SKevin Barnett INIT_LIST_HEAD(&hpsa_sas_port->phy_list_head); 9223d04e62b9SKevin Barnett hpsa_sas_port->parent_node = hpsa_sas_node; 9224d04e62b9SKevin Barnett 9225d04e62b9SKevin Barnett port = sas_port_alloc_num(hpsa_sas_node->parent_dev); 9226d04e62b9SKevin Barnett if (!port) 9227d04e62b9SKevin Barnett goto free_hpsa_port; 9228d04e62b9SKevin Barnett 9229d04e62b9SKevin Barnett rc = sas_port_add(port); 9230d04e62b9SKevin Barnett if (rc) 9231d04e62b9SKevin Barnett goto free_sas_port; 9232d04e62b9SKevin Barnett 9233d04e62b9SKevin Barnett hpsa_sas_port->port = port; 9234d04e62b9SKevin Barnett hpsa_sas_port->sas_address = sas_address; 9235d04e62b9SKevin Barnett list_add_tail(&hpsa_sas_port->port_list_entry, 9236d04e62b9SKevin Barnett &hpsa_sas_node->port_list_head); 9237d04e62b9SKevin Barnett 9238d04e62b9SKevin Barnett return hpsa_sas_port; 9239d04e62b9SKevin Barnett 9240d04e62b9SKevin Barnett free_sas_port: 9241d04e62b9SKevin Barnett sas_port_free(port); 9242d04e62b9SKevin Barnett free_hpsa_port: 9243d04e62b9SKevin Barnett kfree(hpsa_sas_port); 9244d04e62b9SKevin Barnett 9245d04e62b9SKevin Barnett return NULL; 9246d04e62b9SKevin Barnett } 9247d04e62b9SKevin Barnett 9248d04e62b9SKevin Barnett static void hpsa_free_sas_port(struct hpsa_sas_port *hpsa_sas_port) 9249d04e62b9SKevin Barnett { 9250d04e62b9SKevin Barnett struct hpsa_sas_phy *hpsa_sas_phy; 9251d04e62b9SKevin Barnett struct hpsa_sas_phy *next; 9252d04e62b9SKevin Barnett 9253d04e62b9SKevin Barnett list_for_each_entry_safe(hpsa_sas_phy, next, 9254d04e62b9SKevin Barnett &hpsa_sas_port->phy_list_head, phy_list_entry) 9255d04e62b9SKevin Barnett hpsa_free_sas_phy(hpsa_sas_phy); 9256d04e62b9SKevin Barnett 9257d04e62b9SKevin Barnett sas_port_delete(hpsa_sas_port->port); 9258d04e62b9SKevin Barnett list_del(&hpsa_sas_port->port_list_entry); 9259d04e62b9SKevin Barnett kfree(hpsa_sas_port); 9260d04e62b9SKevin Barnett } 9261d04e62b9SKevin Barnett 9262d04e62b9SKevin Barnett static struct hpsa_sas_node *hpsa_alloc_sas_node(struct device *parent_dev) 9263d04e62b9SKevin Barnett { 9264d04e62b9SKevin Barnett struct hpsa_sas_node *hpsa_sas_node; 9265d04e62b9SKevin Barnett 9266d04e62b9SKevin Barnett hpsa_sas_node = kzalloc(sizeof(*hpsa_sas_node), GFP_KERNEL); 9267d04e62b9SKevin Barnett if (hpsa_sas_node) { 9268d04e62b9SKevin Barnett hpsa_sas_node->parent_dev = parent_dev; 9269d04e62b9SKevin Barnett INIT_LIST_HEAD(&hpsa_sas_node->port_list_head); 9270d04e62b9SKevin Barnett } 9271d04e62b9SKevin Barnett 9272d04e62b9SKevin Barnett return hpsa_sas_node; 9273d04e62b9SKevin Barnett } 9274d04e62b9SKevin Barnett 9275d04e62b9SKevin Barnett static void hpsa_free_sas_node(struct hpsa_sas_node *hpsa_sas_node) 9276d04e62b9SKevin Barnett { 9277d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9278d04e62b9SKevin Barnett struct hpsa_sas_port *next; 9279d04e62b9SKevin Barnett 9280d04e62b9SKevin Barnett if (!hpsa_sas_node) 9281d04e62b9SKevin Barnett return; 9282d04e62b9SKevin Barnett 9283d04e62b9SKevin Barnett list_for_each_entry_safe(hpsa_sas_port, next, 9284d04e62b9SKevin Barnett &hpsa_sas_node->port_list_head, port_list_entry) 9285d04e62b9SKevin Barnett hpsa_free_sas_port(hpsa_sas_port); 9286d04e62b9SKevin Barnett 9287d04e62b9SKevin Barnett kfree(hpsa_sas_node); 9288d04e62b9SKevin Barnett } 9289d04e62b9SKevin Barnett 9290d04e62b9SKevin Barnett static struct hpsa_scsi_dev_t 9291d04e62b9SKevin Barnett *hpsa_find_device_by_sas_rphy(struct ctlr_info *h, 9292d04e62b9SKevin Barnett struct sas_rphy *rphy) 9293d04e62b9SKevin Barnett { 9294d04e62b9SKevin Barnett int i; 9295d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *device; 9296d04e62b9SKevin Barnett 9297d04e62b9SKevin Barnett for (i = 0; i < h->ndevices; i++) { 9298d04e62b9SKevin Barnett device = h->dev[i]; 9299d04e62b9SKevin Barnett if (!device->sas_port) 9300d04e62b9SKevin Barnett continue; 9301d04e62b9SKevin Barnett if (device->sas_port->rphy == rphy) 9302d04e62b9SKevin Barnett return device; 9303d04e62b9SKevin Barnett } 9304d04e62b9SKevin Barnett 9305d04e62b9SKevin Barnett return NULL; 9306d04e62b9SKevin Barnett } 9307d04e62b9SKevin Barnett 9308d04e62b9SKevin Barnett static int hpsa_add_sas_host(struct ctlr_info *h) 9309d04e62b9SKevin Barnett { 9310d04e62b9SKevin Barnett int rc; 9311d04e62b9SKevin Barnett struct device *parent_dev; 9312d04e62b9SKevin Barnett struct hpsa_sas_node *hpsa_sas_node; 9313d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9314d04e62b9SKevin Barnett struct hpsa_sas_phy *hpsa_sas_phy; 9315d04e62b9SKevin Barnett 9316d04e62b9SKevin Barnett parent_dev = &h->scsi_host->shost_gendev; 9317d04e62b9SKevin Barnett 9318d04e62b9SKevin Barnett hpsa_sas_node = hpsa_alloc_sas_node(parent_dev); 9319d04e62b9SKevin Barnett if (!hpsa_sas_node) 9320d04e62b9SKevin Barnett return -ENOMEM; 9321d04e62b9SKevin Barnett 9322d04e62b9SKevin Barnett hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, h->sas_address); 9323d04e62b9SKevin Barnett if (!hpsa_sas_port) { 9324d04e62b9SKevin Barnett rc = -ENODEV; 9325d04e62b9SKevin Barnett goto free_sas_node; 9326d04e62b9SKevin Barnett } 9327d04e62b9SKevin Barnett 9328d04e62b9SKevin Barnett hpsa_sas_phy = hpsa_alloc_sas_phy(hpsa_sas_port); 9329d04e62b9SKevin Barnett if (!hpsa_sas_phy) { 9330d04e62b9SKevin Barnett rc = -ENODEV; 9331d04e62b9SKevin Barnett goto free_sas_port; 9332d04e62b9SKevin Barnett } 9333d04e62b9SKevin Barnett 9334d04e62b9SKevin Barnett rc = hpsa_sas_port_add_phy(hpsa_sas_phy); 9335d04e62b9SKevin Barnett if (rc) 9336d04e62b9SKevin Barnett goto free_sas_phy; 9337d04e62b9SKevin Barnett 9338d04e62b9SKevin Barnett h->sas_host = hpsa_sas_node; 9339d04e62b9SKevin Barnett 9340d04e62b9SKevin Barnett return 0; 9341d04e62b9SKevin Barnett 9342d04e62b9SKevin Barnett free_sas_phy: 9343d04e62b9SKevin Barnett hpsa_free_sas_phy(hpsa_sas_phy); 9344d04e62b9SKevin Barnett free_sas_port: 9345d04e62b9SKevin Barnett hpsa_free_sas_port(hpsa_sas_port); 9346d04e62b9SKevin Barnett free_sas_node: 9347d04e62b9SKevin Barnett hpsa_free_sas_node(hpsa_sas_node); 9348d04e62b9SKevin Barnett 9349d04e62b9SKevin Barnett return rc; 9350d04e62b9SKevin Barnett } 9351d04e62b9SKevin Barnett 9352d04e62b9SKevin Barnett static void hpsa_delete_sas_host(struct ctlr_info *h) 9353d04e62b9SKevin Barnett { 9354d04e62b9SKevin Barnett hpsa_free_sas_node(h->sas_host); 9355d04e62b9SKevin Barnett } 9356d04e62b9SKevin Barnett 9357d04e62b9SKevin Barnett static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node, 9358d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *device) 9359d04e62b9SKevin Barnett { 9360d04e62b9SKevin Barnett int rc; 9361d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9362d04e62b9SKevin Barnett struct sas_rphy *rphy; 9363d04e62b9SKevin Barnett 9364d04e62b9SKevin Barnett hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, device->sas_address); 9365d04e62b9SKevin Barnett if (!hpsa_sas_port) 9366d04e62b9SKevin Barnett return -ENOMEM; 9367d04e62b9SKevin Barnett 9368d04e62b9SKevin Barnett rphy = sas_end_device_alloc(hpsa_sas_port->port); 9369d04e62b9SKevin Barnett if (!rphy) { 9370d04e62b9SKevin Barnett rc = -ENODEV; 9371d04e62b9SKevin Barnett goto free_sas_port; 9372d04e62b9SKevin Barnett } 9373d04e62b9SKevin Barnett 9374d04e62b9SKevin Barnett hpsa_sas_port->rphy = rphy; 9375d04e62b9SKevin Barnett device->sas_port = hpsa_sas_port; 9376d04e62b9SKevin Barnett 9377d04e62b9SKevin Barnett rc = hpsa_sas_port_add_rphy(hpsa_sas_port, rphy); 9378d04e62b9SKevin Barnett if (rc) 9379d04e62b9SKevin Barnett goto free_sas_port; 9380d04e62b9SKevin Barnett 9381d04e62b9SKevin Barnett return 0; 9382d04e62b9SKevin Barnett 9383d04e62b9SKevin Barnett free_sas_port: 9384d04e62b9SKevin Barnett hpsa_free_sas_port(hpsa_sas_port); 9385d04e62b9SKevin Barnett device->sas_port = NULL; 9386d04e62b9SKevin Barnett 9387d04e62b9SKevin Barnett return rc; 9388d04e62b9SKevin Barnett } 9389d04e62b9SKevin Barnett 9390d04e62b9SKevin Barnett static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device) 9391d04e62b9SKevin Barnett { 9392d04e62b9SKevin Barnett if (device->sas_port) { 9393d04e62b9SKevin Barnett hpsa_free_sas_port(device->sas_port); 9394d04e62b9SKevin Barnett device->sas_port = NULL; 9395d04e62b9SKevin Barnett } 9396d04e62b9SKevin Barnett } 9397d04e62b9SKevin Barnett 9398d04e62b9SKevin Barnett static int 9399d04e62b9SKevin Barnett hpsa_sas_get_linkerrors(struct sas_phy *phy) 9400d04e62b9SKevin Barnett { 9401d04e62b9SKevin Barnett return 0; 9402d04e62b9SKevin Barnett } 9403d04e62b9SKevin Barnett 9404d04e62b9SKevin Barnett static int 9405d04e62b9SKevin Barnett hpsa_sas_get_enclosure_identifier(struct sas_rphy *rphy, u64 *identifier) 9406d04e62b9SKevin Barnett { 9407aa105695SDan Carpenter *identifier = 0; 9408d04e62b9SKevin Barnett return 0; 9409d04e62b9SKevin Barnett } 9410d04e62b9SKevin Barnett 9411d04e62b9SKevin Barnett static int 9412d04e62b9SKevin Barnett hpsa_sas_get_bay_identifier(struct sas_rphy *rphy) 9413d04e62b9SKevin Barnett { 9414d04e62b9SKevin Barnett return -ENXIO; 9415d04e62b9SKevin Barnett } 9416d04e62b9SKevin Barnett 9417d04e62b9SKevin Barnett static int 9418d04e62b9SKevin Barnett hpsa_sas_phy_reset(struct sas_phy *phy, int hard_reset) 9419d04e62b9SKevin Barnett { 9420d04e62b9SKevin Barnett return 0; 9421d04e62b9SKevin Barnett } 9422d04e62b9SKevin Barnett 9423d04e62b9SKevin Barnett static int 9424d04e62b9SKevin Barnett hpsa_sas_phy_enable(struct sas_phy *phy, int enable) 9425d04e62b9SKevin Barnett { 9426d04e62b9SKevin Barnett return 0; 9427d04e62b9SKevin Barnett } 9428d04e62b9SKevin Barnett 9429d04e62b9SKevin Barnett static int 9430d04e62b9SKevin Barnett hpsa_sas_phy_setup(struct sas_phy *phy) 9431d04e62b9SKevin Barnett { 9432d04e62b9SKevin Barnett return 0; 9433d04e62b9SKevin Barnett } 9434d04e62b9SKevin Barnett 9435d04e62b9SKevin Barnett static void 9436d04e62b9SKevin Barnett hpsa_sas_phy_release(struct sas_phy *phy) 9437d04e62b9SKevin Barnett { 9438d04e62b9SKevin Barnett } 9439d04e62b9SKevin Barnett 9440d04e62b9SKevin Barnett static int 9441d04e62b9SKevin Barnett hpsa_sas_phy_speed(struct sas_phy *phy, struct sas_phy_linkrates *rates) 9442d04e62b9SKevin Barnett { 9443d04e62b9SKevin Barnett return -EINVAL; 9444d04e62b9SKevin Barnett } 9445d04e62b9SKevin Barnett 9446d04e62b9SKevin Barnett /* SMP = Serial Management Protocol */ 9447d04e62b9SKevin Barnett static int 9448d04e62b9SKevin Barnett hpsa_sas_smp_handler(struct Scsi_Host *shost, struct sas_rphy *rphy, 9449d04e62b9SKevin Barnett struct request *req) 9450d04e62b9SKevin Barnett { 9451d04e62b9SKevin Barnett return -EINVAL; 9452d04e62b9SKevin Barnett } 9453d04e62b9SKevin Barnett 9454d04e62b9SKevin Barnett static struct sas_function_template hpsa_sas_transport_functions = { 9455d04e62b9SKevin Barnett .get_linkerrors = hpsa_sas_get_linkerrors, 9456d04e62b9SKevin Barnett .get_enclosure_identifier = hpsa_sas_get_enclosure_identifier, 9457d04e62b9SKevin Barnett .get_bay_identifier = hpsa_sas_get_bay_identifier, 9458d04e62b9SKevin Barnett .phy_reset = hpsa_sas_phy_reset, 9459d04e62b9SKevin Barnett .phy_enable = hpsa_sas_phy_enable, 9460d04e62b9SKevin Barnett .phy_setup = hpsa_sas_phy_setup, 9461d04e62b9SKevin Barnett .phy_release = hpsa_sas_phy_release, 9462d04e62b9SKevin Barnett .set_phy_speed = hpsa_sas_phy_speed, 9463d04e62b9SKevin Barnett .smp_handler = hpsa_sas_smp_handler, 9464d04e62b9SKevin Barnett }; 9465d04e62b9SKevin Barnett 9466edd16368SStephen M. Cameron /* 9467edd16368SStephen M. Cameron * This is it. Register the PCI driver information for the cards we control 9468edd16368SStephen M. Cameron * the OS will call our registered routines when it finds one of our cards. 9469edd16368SStephen M. Cameron */ 9470edd16368SStephen M. Cameron static int __init hpsa_init(void) 9471edd16368SStephen M. Cameron { 9472d04e62b9SKevin Barnett int rc; 9473d04e62b9SKevin Barnett 9474d04e62b9SKevin Barnett hpsa_sas_transport_template = 9475d04e62b9SKevin Barnett sas_attach_transport(&hpsa_sas_transport_functions); 9476d04e62b9SKevin Barnett if (!hpsa_sas_transport_template) 9477d04e62b9SKevin Barnett return -ENODEV; 9478d04e62b9SKevin Barnett 9479d04e62b9SKevin Barnett rc = pci_register_driver(&hpsa_pci_driver); 9480d04e62b9SKevin Barnett 9481d04e62b9SKevin Barnett if (rc) 9482d04e62b9SKevin Barnett sas_release_transport(hpsa_sas_transport_template); 9483d04e62b9SKevin Barnett 9484d04e62b9SKevin Barnett return rc; 9485edd16368SStephen M. Cameron } 9486edd16368SStephen M. Cameron 9487edd16368SStephen M. Cameron static void __exit hpsa_cleanup(void) 9488edd16368SStephen M. Cameron { 9489edd16368SStephen M. Cameron pci_unregister_driver(&hpsa_pci_driver); 9490d04e62b9SKevin Barnett sas_release_transport(hpsa_sas_transport_template); 9491edd16368SStephen M. Cameron } 9492edd16368SStephen M. Cameron 9493e1f7de0cSMatt Gates static void __attribute__((unused)) verify_offsets(void) 9494e1f7de0cSMatt Gates { 9495e1f7de0cSMatt Gates #define VERIFY_OFFSET(member, offset) \ 9496dd0e19f3SScott Teel BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset) 9497dd0e19f3SScott Teel 9498dd0e19f3SScott Teel VERIFY_OFFSET(structure_size, 0); 9499dd0e19f3SScott Teel VERIFY_OFFSET(volume_blk_size, 4); 9500dd0e19f3SScott Teel VERIFY_OFFSET(volume_blk_cnt, 8); 9501dd0e19f3SScott Teel VERIFY_OFFSET(phys_blk_shift, 16); 9502dd0e19f3SScott Teel VERIFY_OFFSET(parity_rotation_shift, 17); 9503dd0e19f3SScott Teel VERIFY_OFFSET(strip_size, 18); 9504dd0e19f3SScott Teel VERIFY_OFFSET(disk_starting_blk, 20); 9505dd0e19f3SScott Teel VERIFY_OFFSET(disk_blk_cnt, 28); 9506dd0e19f3SScott Teel VERIFY_OFFSET(data_disks_per_row, 36); 9507dd0e19f3SScott Teel VERIFY_OFFSET(metadata_disks_per_row, 38); 9508dd0e19f3SScott Teel VERIFY_OFFSET(row_cnt, 40); 9509dd0e19f3SScott Teel VERIFY_OFFSET(layout_map_count, 42); 9510dd0e19f3SScott Teel VERIFY_OFFSET(flags, 44); 9511dd0e19f3SScott Teel VERIFY_OFFSET(dekindex, 46); 9512dd0e19f3SScott Teel /* VERIFY_OFFSET(reserved, 48 */ 9513dd0e19f3SScott Teel VERIFY_OFFSET(data, 64); 9514dd0e19f3SScott Teel 9515dd0e19f3SScott Teel #undef VERIFY_OFFSET 9516dd0e19f3SScott Teel 9517dd0e19f3SScott Teel #define VERIFY_OFFSET(member, offset) \ 9518b66cc250SMike Miller BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset) 9519b66cc250SMike Miller 9520b66cc250SMike Miller VERIFY_OFFSET(IU_type, 0); 9521b66cc250SMike Miller VERIFY_OFFSET(direction, 1); 9522b66cc250SMike Miller VERIFY_OFFSET(reply_queue, 2); 9523b66cc250SMike Miller /* VERIFY_OFFSET(reserved1, 3); */ 9524b66cc250SMike Miller VERIFY_OFFSET(scsi_nexus, 4); 9525b66cc250SMike Miller VERIFY_OFFSET(Tag, 8); 9526b66cc250SMike Miller VERIFY_OFFSET(cdb, 16); 9527b66cc250SMike Miller VERIFY_OFFSET(cciss_lun, 32); 9528b66cc250SMike Miller VERIFY_OFFSET(data_len, 40); 9529b66cc250SMike Miller VERIFY_OFFSET(cmd_priority_task_attr, 44); 9530b66cc250SMike Miller VERIFY_OFFSET(sg_count, 45); 9531b66cc250SMike Miller /* VERIFY_OFFSET(reserved3 */ 9532b66cc250SMike Miller VERIFY_OFFSET(err_ptr, 48); 9533b66cc250SMike Miller VERIFY_OFFSET(err_len, 56); 9534b66cc250SMike Miller /* VERIFY_OFFSET(reserved4 */ 9535b66cc250SMike Miller VERIFY_OFFSET(sg, 64); 9536b66cc250SMike Miller 9537b66cc250SMike Miller #undef VERIFY_OFFSET 9538b66cc250SMike Miller 9539b66cc250SMike Miller #define VERIFY_OFFSET(member, offset) \ 9540e1f7de0cSMatt Gates BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset) 9541e1f7de0cSMatt Gates 9542e1f7de0cSMatt Gates VERIFY_OFFSET(dev_handle, 0x00); 9543e1f7de0cSMatt Gates VERIFY_OFFSET(reserved1, 0x02); 9544e1f7de0cSMatt Gates VERIFY_OFFSET(function, 0x03); 9545e1f7de0cSMatt Gates VERIFY_OFFSET(reserved2, 0x04); 9546e1f7de0cSMatt Gates VERIFY_OFFSET(err_info, 0x0C); 9547e1f7de0cSMatt Gates VERIFY_OFFSET(reserved3, 0x10); 9548e1f7de0cSMatt Gates VERIFY_OFFSET(err_info_len, 0x12); 9549e1f7de0cSMatt Gates VERIFY_OFFSET(reserved4, 0x13); 9550e1f7de0cSMatt Gates VERIFY_OFFSET(sgl_offset, 0x14); 9551e1f7de0cSMatt Gates VERIFY_OFFSET(reserved5, 0x15); 9552e1f7de0cSMatt Gates VERIFY_OFFSET(transfer_len, 0x1C); 9553e1f7de0cSMatt Gates VERIFY_OFFSET(reserved6, 0x20); 9554e1f7de0cSMatt Gates VERIFY_OFFSET(io_flags, 0x24); 9555e1f7de0cSMatt Gates VERIFY_OFFSET(reserved7, 0x26); 9556e1f7de0cSMatt Gates VERIFY_OFFSET(LUN, 0x34); 9557e1f7de0cSMatt Gates VERIFY_OFFSET(control, 0x3C); 9558e1f7de0cSMatt Gates VERIFY_OFFSET(CDB, 0x40); 9559e1f7de0cSMatt Gates VERIFY_OFFSET(reserved8, 0x50); 9560e1f7de0cSMatt Gates VERIFY_OFFSET(host_context_flags, 0x60); 9561e1f7de0cSMatt Gates VERIFY_OFFSET(timeout_sec, 0x62); 9562e1f7de0cSMatt Gates VERIFY_OFFSET(ReplyQueue, 0x64); 9563e1f7de0cSMatt Gates VERIFY_OFFSET(reserved9, 0x65); 956450a0decfSStephen M. Cameron VERIFY_OFFSET(tag, 0x68); 9565e1f7de0cSMatt Gates VERIFY_OFFSET(host_addr, 0x70); 9566e1f7de0cSMatt Gates VERIFY_OFFSET(CISS_LUN, 0x78); 9567e1f7de0cSMatt Gates VERIFY_OFFSET(SG, 0x78 + 8); 9568e1f7de0cSMatt Gates #undef VERIFY_OFFSET 9569e1f7de0cSMatt Gates } 9570e1f7de0cSMatt Gates 9571edd16368SStephen M. Cameron module_init(hpsa_init); 9572edd16368SStephen M. Cameron module_exit(hpsa_cleanup); 9573