xref: /openbmc/linux/drivers/scsi/hpsa.c (revision d49c2077c03d70a59e3063c7d33f00172491ae31)
1edd16368SStephen M. Cameron /*
2edd16368SStephen M. Cameron  *    Disk Array driver for HP Smart Array SAS controllers
394c7bc31SDon Brace  *    Copyright 2016 Microsemi Corporation
41358f6dcSDon Brace  *    Copyright 2014-2015 PMC-Sierra, Inc.
51358f6dcSDon Brace  *    Copyright 2000,2009-2015 Hewlett-Packard Development Company, L.P.
6edd16368SStephen M. Cameron  *
7edd16368SStephen M. Cameron  *    This program is free software; you can redistribute it and/or modify
8edd16368SStephen M. Cameron  *    it under the terms of the GNU General Public License as published by
9edd16368SStephen M. Cameron  *    the Free Software Foundation; version 2 of the License.
10edd16368SStephen M. Cameron  *
11edd16368SStephen M. Cameron  *    This program is distributed in the hope that it will be useful,
12edd16368SStephen M. Cameron  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
13edd16368SStephen M. Cameron  *    MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
14edd16368SStephen M. Cameron  *    NON INFRINGEMENT.  See the GNU General Public License for more details.
15edd16368SStephen M. Cameron  *
1694c7bc31SDon Brace  *    Questions/Comments/Bugfixes to esc.storagedev@microsemi.com
17edd16368SStephen M. Cameron  *
18edd16368SStephen M. Cameron  */
19edd16368SStephen M. Cameron 
20edd16368SStephen M. Cameron #include <linux/module.h>
21edd16368SStephen M. Cameron #include <linux/interrupt.h>
22edd16368SStephen M. Cameron #include <linux/types.h>
23edd16368SStephen M. Cameron #include <linux/pci.h>
24e5a44df8SMatthew Garrett #include <linux/pci-aspm.h>
25edd16368SStephen M. Cameron #include <linux/kernel.h>
26edd16368SStephen M. Cameron #include <linux/slab.h>
27edd16368SStephen M. Cameron #include <linux/delay.h>
28edd16368SStephen M. Cameron #include <linux/fs.h>
29edd16368SStephen M. Cameron #include <linux/timer.h>
30edd16368SStephen M. Cameron #include <linux/init.h>
31edd16368SStephen M. Cameron #include <linux/spinlock.h>
32edd16368SStephen M. Cameron #include <linux/compat.h>
33edd16368SStephen M. Cameron #include <linux/blktrace_api.h>
34edd16368SStephen M. Cameron #include <linux/uaccess.h>
35edd16368SStephen M. Cameron #include <linux/io.h>
36edd16368SStephen M. Cameron #include <linux/dma-mapping.h>
37edd16368SStephen M. Cameron #include <linux/completion.h>
38edd16368SStephen M. Cameron #include <linux/moduleparam.h>
39edd16368SStephen M. Cameron #include <scsi/scsi.h>
40edd16368SStephen M. Cameron #include <scsi/scsi_cmnd.h>
41edd16368SStephen M. Cameron #include <scsi/scsi_device.h>
42edd16368SStephen M. Cameron #include <scsi/scsi_host.h>
43667e23d4SStephen M. Cameron #include <scsi/scsi_tcq.h>
449437ac43SStephen Cameron #include <scsi/scsi_eh.h>
45d04e62b9SKevin Barnett #include <scsi/scsi_transport_sas.h>
4673153fe5SWebb Scales #include <scsi/scsi_dbg.h>
47edd16368SStephen M. Cameron #include <linux/cciss_ioctl.h>
48edd16368SStephen M. Cameron #include <linux/string.h>
49edd16368SStephen M. Cameron #include <linux/bitmap.h>
5060063497SArun Sharma #include <linux/atomic.h>
51a0c12413SStephen M. Cameron #include <linux/jiffies.h>
5242a91641SDon Brace #include <linux/percpu-defs.h>
53094963daSStephen M. Cameron #include <linux/percpu.h>
542b08b3e9SDon Brace #include <asm/unaligned.h>
55283b4a9bSStephen M. Cameron #include <asm/div64.h>
56edd16368SStephen M. Cameron #include "hpsa_cmd.h"
57edd16368SStephen M. Cameron #include "hpsa.h"
58edd16368SStephen M. Cameron 
59ec2c3aa9SDon Brace /*
60ec2c3aa9SDon Brace  * HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.'
61ec2c3aa9SDon Brace  * with an optional trailing '-' followed by a byte value (0-255).
62ec2c3aa9SDon Brace  */
63ff54aee4SDon Brace #define HPSA_DRIVER_VERSION "3.4.16-0"
64edd16368SStephen M. Cameron #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
65f79cfec6SStephen M. Cameron #define HPSA "hpsa"
66edd16368SStephen M. Cameron 
67007e7aa9SRobert Elliott /* How long to wait for CISS doorbell communication */
68007e7aa9SRobert Elliott #define CLEAR_EVENT_WAIT_INTERVAL 20	/* ms for each msleep() call */
69007e7aa9SRobert Elliott #define MODE_CHANGE_WAIT_INTERVAL 10	/* ms for each msleep() call */
70007e7aa9SRobert Elliott #define MAX_CLEAR_EVENT_WAIT 30000	/* times 20 ms = 600 s */
71007e7aa9SRobert Elliott #define MAX_MODE_CHANGE_WAIT 2000	/* times 10 ms = 20 s */
72edd16368SStephen M. Cameron #define MAX_IOCTL_CONFIG_WAIT 1000
73edd16368SStephen M. Cameron 
74edd16368SStephen M. Cameron /*define how many times we will try a command because of bus resets */
75edd16368SStephen M. Cameron #define MAX_CMD_RETRIES 3
76edd16368SStephen M. Cameron 
77edd16368SStephen M. Cameron /* Embedded module documentation macros - see modules.h */
78edd16368SStephen M. Cameron MODULE_AUTHOR("Hewlett-Packard Company");
79edd16368SStephen M. Cameron MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
80edd16368SStephen M. Cameron 	HPSA_DRIVER_VERSION);
81edd16368SStephen M. Cameron MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
82edd16368SStephen M. Cameron MODULE_VERSION(HPSA_DRIVER_VERSION);
83edd16368SStephen M. Cameron MODULE_LICENSE("GPL");
84edd16368SStephen M. Cameron 
85edd16368SStephen M. Cameron static int hpsa_allow_any;
86edd16368SStephen M. Cameron module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
87edd16368SStephen M. Cameron MODULE_PARM_DESC(hpsa_allow_any,
88edd16368SStephen M. Cameron 		"Allow hpsa driver to access unknown HP Smart Array hardware");
8902ec19c8SStephen M. Cameron static int hpsa_simple_mode;
9002ec19c8SStephen M. Cameron module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
9102ec19c8SStephen M. Cameron MODULE_PARM_DESC(hpsa_simple_mode,
9202ec19c8SStephen M. Cameron 	"Use 'simple mode' rather than 'performant mode'");
93edd16368SStephen M. Cameron 
94edd16368SStephen M. Cameron /* define the PCI info for the cards we can control */
95edd16368SStephen M. Cameron static const struct pci_device_id hpsa_pci_device_id[] = {
96edd16368SStephen M. Cameron 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3241},
97edd16368SStephen M. Cameron 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3243},
98edd16368SStephen M. Cameron 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3245},
99edd16368SStephen M. Cameron 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3247},
100edd16368SStephen M. Cameron 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3249},
101163dbcd8SMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x324A},
102163dbcd8SMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x324B},
103f8b01eb9SMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3233},
1049143a961Sscameron@beardog.cce.hp.com 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3350},
1059143a961Sscameron@beardog.cce.hp.com 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3351},
1069143a961Sscameron@beardog.cce.hp.com 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3352},
1079143a961Sscameron@beardog.cce.hp.com 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3353},
1089143a961Sscameron@beardog.cce.hp.com 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3354},
1099143a961Sscameron@beardog.cce.hp.com 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3355},
1109143a961Sscameron@beardog.cce.hp.com 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3356},
111fe0c9610SMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1921},
112fe0c9610SMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1922},
113fe0c9610SMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1923},
114fe0c9610SMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1924},
115fe0c9610SMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1926},
116fe0c9610SMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1928},
11797b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1929},
11897b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BD},
11997b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BE},
12097b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BF},
12197b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C0},
12297b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C1},
12397b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C2},
12497b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C3},
12597b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C4},
12697b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C5},
1273b7a45e5SJoe Handzik 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C6},
12897b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C7},
12997b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C8},
13097b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C9},
1313b7a45e5SJoe Handzik 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CA},
1323b7a45e5SJoe Handzik 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CB},
1333b7a45e5SJoe Handzik 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CC},
1343b7a45e5SJoe Handzik 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CD},
1353b7a45e5SJoe Handzik 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CE},
136fdfa4b6dSDon Brace 	{PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0580},
137cbb47dcbSDon Brace 	{PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0581},
138cbb47dcbSDon Brace 	{PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0582},
139cbb47dcbSDon Brace 	{PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0583},
140cbb47dcbSDon Brace 	{PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0584},
141cbb47dcbSDon Brace 	{PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0585},
1428e616a5eSStephen M. Cameron 	{PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076},
1438e616a5eSStephen M. Cameron 	{PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087},
1448e616a5eSStephen M. Cameron 	{PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D},
1458e616a5eSStephen M. Cameron 	{PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088},
1468e616a5eSStephen M. Cameron 	{PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f},
147edd16368SStephen M. Cameron 	{PCI_VENDOR_ID_HP,     PCI_ANY_ID,	PCI_ANY_ID, PCI_ANY_ID,
148edd16368SStephen M. Cameron 		PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
149edd16368SStephen M. Cameron 	{0,}
150edd16368SStephen M. Cameron };
151edd16368SStephen M. Cameron 
152edd16368SStephen M. Cameron MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
153edd16368SStephen M. Cameron 
154edd16368SStephen M. Cameron /*  board_id = Subsystem Device ID & Vendor ID
155edd16368SStephen M. Cameron  *  product = Marketing Name for the board
156edd16368SStephen M. Cameron  *  access = Address of the struct of function pointers
157edd16368SStephen M. Cameron  */
158edd16368SStephen M. Cameron static struct board_type products[] = {
159edd16368SStephen M. Cameron 	{0x3241103C, "Smart Array P212", &SA5_access},
160edd16368SStephen M. Cameron 	{0x3243103C, "Smart Array P410", &SA5_access},
161edd16368SStephen M. Cameron 	{0x3245103C, "Smart Array P410i", &SA5_access},
162edd16368SStephen M. Cameron 	{0x3247103C, "Smart Array P411", &SA5_access},
163edd16368SStephen M. Cameron 	{0x3249103C, "Smart Array P812", &SA5_access},
164163dbcd8SMike Miller 	{0x324A103C, "Smart Array P712m", &SA5_access},
165163dbcd8SMike Miller 	{0x324B103C, "Smart Array P711m", &SA5_access},
1667d2cce58SStephen M. Cameron 	{0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */
167fe0c9610SMike Miller 	{0x3350103C, "Smart Array P222", &SA5_access},
168fe0c9610SMike Miller 	{0x3351103C, "Smart Array P420", &SA5_access},
169fe0c9610SMike Miller 	{0x3352103C, "Smart Array P421", &SA5_access},
170fe0c9610SMike Miller 	{0x3353103C, "Smart Array P822", &SA5_access},
171fe0c9610SMike Miller 	{0x3354103C, "Smart Array P420i", &SA5_access},
172fe0c9610SMike Miller 	{0x3355103C, "Smart Array P220i", &SA5_access},
173fe0c9610SMike Miller 	{0x3356103C, "Smart Array P721m", &SA5_access},
1741fd6c8e3SMike Miller 	{0x1921103C, "Smart Array P830i", &SA5_access},
1751fd6c8e3SMike Miller 	{0x1922103C, "Smart Array P430", &SA5_access},
1761fd6c8e3SMike Miller 	{0x1923103C, "Smart Array P431", &SA5_access},
1771fd6c8e3SMike Miller 	{0x1924103C, "Smart Array P830", &SA5_access},
1781fd6c8e3SMike Miller 	{0x1926103C, "Smart Array P731m", &SA5_access},
1791fd6c8e3SMike Miller 	{0x1928103C, "Smart Array P230i", &SA5_access},
1801fd6c8e3SMike Miller 	{0x1929103C, "Smart Array P530", &SA5_access},
18127fb8137SDon Brace 	{0x21BD103C, "Smart Array P244br", &SA5_access},
18227fb8137SDon Brace 	{0x21BE103C, "Smart Array P741m", &SA5_access},
18327fb8137SDon Brace 	{0x21BF103C, "Smart HBA H240ar", &SA5_access},
18427fb8137SDon Brace 	{0x21C0103C, "Smart Array P440ar", &SA5_access},
185c8ae0ab1SDon Brace 	{0x21C1103C, "Smart Array P840ar", &SA5_access},
18627fb8137SDon Brace 	{0x21C2103C, "Smart Array P440", &SA5_access},
18727fb8137SDon Brace 	{0x21C3103C, "Smart Array P441", &SA5_access},
18897b9f53dSMike Miller 	{0x21C4103C, "Smart Array", &SA5_access},
18927fb8137SDon Brace 	{0x21C5103C, "Smart Array P841", &SA5_access},
19027fb8137SDon Brace 	{0x21C6103C, "Smart HBA H244br", &SA5_access},
19127fb8137SDon Brace 	{0x21C7103C, "Smart HBA H240", &SA5_access},
19227fb8137SDon Brace 	{0x21C8103C, "Smart HBA H241", &SA5_access},
19397b9f53dSMike Miller 	{0x21C9103C, "Smart Array", &SA5_access},
19427fb8137SDon Brace 	{0x21CA103C, "Smart Array P246br", &SA5_access},
19527fb8137SDon Brace 	{0x21CB103C, "Smart Array P840", &SA5_access},
1963b7a45e5SJoe Handzik 	{0x21CC103C, "Smart Array", &SA5_access},
1973b7a45e5SJoe Handzik 	{0x21CD103C, "Smart Array", &SA5_access},
19827fb8137SDon Brace 	{0x21CE103C, "Smart HBA", &SA5_access},
199fdfa4b6dSDon Brace 	{0x05809005, "SmartHBA-SA", &SA5_access},
200cbb47dcbSDon Brace 	{0x05819005, "SmartHBA-SA 8i", &SA5_access},
201cbb47dcbSDon Brace 	{0x05829005, "SmartHBA-SA 8i8e", &SA5_access},
202cbb47dcbSDon Brace 	{0x05839005, "SmartHBA-SA 8e", &SA5_access},
203cbb47dcbSDon Brace 	{0x05849005, "SmartHBA-SA 16i", &SA5_access},
204cbb47dcbSDon Brace 	{0x05859005, "SmartHBA-SA 4i4e", &SA5_access},
2058e616a5eSStephen M. Cameron 	{0x00761590, "HP Storage P1224 Array Controller", &SA5_access},
2068e616a5eSStephen M. Cameron 	{0x00871590, "HP Storage P1224e Array Controller", &SA5_access},
2078e616a5eSStephen M. Cameron 	{0x007D1590, "HP Storage P1228 Array Controller", &SA5_access},
2088e616a5eSStephen M. Cameron 	{0x00881590, "HP Storage P1228e Array Controller", &SA5_access},
2098e616a5eSStephen M. Cameron 	{0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access},
210edd16368SStephen M. Cameron 	{0xFFFF103C, "Unknown Smart Array", &SA5_access},
211edd16368SStephen M. Cameron };
212edd16368SStephen M. Cameron 
213d04e62b9SKevin Barnett static struct scsi_transport_template *hpsa_sas_transport_template;
214d04e62b9SKevin Barnett static int hpsa_add_sas_host(struct ctlr_info *h);
215d04e62b9SKevin Barnett static void hpsa_delete_sas_host(struct ctlr_info *h);
216d04e62b9SKevin Barnett static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node,
217d04e62b9SKevin Barnett 			struct hpsa_scsi_dev_t *device);
218d04e62b9SKevin Barnett static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device);
219d04e62b9SKevin Barnett static struct hpsa_scsi_dev_t
220d04e62b9SKevin Barnett 	*hpsa_find_device_by_sas_rphy(struct ctlr_info *h,
221d04e62b9SKevin Barnett 		struct sas_rphy *rphy);
222d04e62b9SKevin Barnett 
223a58e7e53SWebb Scales #define SCSI_CMD_BUSY ((struct scsi_cmnd *)&hpsa_cmd_busy)
224a58e7e53SWebb Scales static const struct scsi_cmnd hpsa_cmd_busy;
225a58e7e53SWebb Scales #define SCSI_CMD_IDLE ((struct scsi_cmnd *)&hpsa_cmd_idle)
226a58e7e53SWebb Scales static const struct scsi_cmnd hpsa_cmd_idle;
227edd16368SStephen M. Cameron static int number_of_controllers;
228edd16368SStephen M. Cameron 
22910f66018SStephen M. Cameron static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
23010f66018SStephen M. Cameron static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
23142a91641SDon Brace static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg);
232edd16368SStephen M. Cameron 
233edd16368SStephen M. Cameron #ifdef CONFIG_COMPAT
23442a91641SDon Brace static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd,
23542a91641SDon Brace 	void __user *arg);
236edd16368SStephen M. Cameron #endif
237edd16368SStephen M. Cameron 
238edd16368SStephen M. Cameron static void cmd_free(struct ctlr_info *h, struct CommandList *c);
239edd16368SStephen M. Cameron static struct CommandList *cmd_alloc(struct ctlr_info *h);
24073153fe5SWebb Scales static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c);
24173153fe5SWebb Scales static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h,
24273153fe5SWebb Scales 					    struct scsi_cmnd *scmd);
243a2dac136SStephen M. Cameron static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
244b7bb24ebSStephen M. Cameron 	void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
245edd16368SStephen M. Cameron 	int cmd_type);
2462c143342SRobert Elliott static void hpsa_free_cmd_pool(struct ctlr_info *h);
247b7bb24ebSStephen M. Cameron #define VPD_PAGE (1 << 8)
248b48d9804SDon Brace #define HPSA_SIMPLE_ERROR_BITS 0x03
249edd16368SStephen M. Cameron 
250f281233dSJeff Garzik static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
251a08a8471SStephen M. Cameron static void hpsa_scan_start(struct Scsi_Host *);
252a08a8471SStephen M. Cameron static int hpsa_scan_finished(struct Scsi_Host *sh,
253a08a8471SStephen M. Cameron 	unsigned long elapsed_time);
2547c0a0229SDon Brace static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth);
255edd16368SStephen M. Cameron 
256edd16368SStephen M. Cameron static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
25775167d2cSStephen M. Cameron static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd);
258edd16368SStephen M. Cameron static int hpsa_slave_alloc(struct scsi_device *sdev);
25941ce4c35SStephen Cameron static int hpsa_slave_configure(struct scsi_device *sdev);
260edd16368SStephen M. Cameron static void hpsa_slave_destroy(struct scsi_device *sdev);
261edd16368SStephen M. Cameron 
2628aa60681SDon Brace static void hpsa_update_scsi_devices(struct ctlr_info *h);
263edd16368SStephen M. Cameron static int check_for_unit_attention(struct ctlr_info *h,
264edd16368SStephen M. Cameron 	struct CommandList *c);
265edd16368SStephen M. Cameron static void check_ioctl_unit_attention(struct ctlr_info *h,
266edd16368SStephen M. Cameron 	struct CommandList *c);
267303932fdSDon Brace /* performant mode helper functions */
268303932fdSDon Brace static void calc_bucket_map(int *bucket, int num_buckets,
2692b08b3e9SDon Brace 	int nsgs, int min_blocks, u32 *bucket_map);
270105a3dbcSRobert Elliott static void hpsa_free_performant_mode(struct ctlr_info *h);
271105a3dbcSRobert Elliott static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
272254f796bSMatt Gates static inline u32 next_command(struct ctlr_info *h, u8 q);
2736f039790SGreg Kroah-Hartman static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
2746f039790SGreg Kroah-Hartman 			       u32 *cfg_base_addr, u64 *cfg_base_addr_index,
2751df8552aSStephen M. Cameron 			       u64 *cfg_offset);
2766f039790SGreg Kroah-Hartman static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
2771df8552aSStephen M. Cameron 				    unsigned long *memory_bar);
2786f039790SGreg Kroah-Hartman static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
2796f039790SGreg Kroah-Hartman static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
2806f039790SGreg Kroah-Hartman 				     int wait_for_ready);
28175167d2cSStephen M. Cameron static inline void finish_cmd(struct CommandList *c);
282c706a795SRobert Elliott static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h);
283fe5389c8SStephen M. Cameron #define BOARD_NOT_READY 0
284fe5389c8SStephen M. Cameron #define BOARD_READY 1
28523100dd9SStephen M. Cameron static void hpsa_drain_accel_commands(struct ctlr_info *h);
28676438d08SStephen M. Cameron static void hpsa_flush_cache(struct ctlr_info *h);
287c349775eSScott Teel static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
288c349775eSScott Teel 	struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
28903383736SDon Brace 	u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk);
290080ef1ccSDon Brace static void hpsa_command_resubmit_worker(struct work_struct *work);
29125163bd5SWebb Scales static u32 lockup_detected(struct ctlr_info *h);
29225163bd5SWebb Scales static int detect_controller_lockup(struct ctlr_info *h);
293c2adae44SScott Teel static void hpsa_disable_rld_caching(struct ctlr_info *h);
294d04e62b9SKevin Barnett static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
295d04e62b9SKevin Barnett 	struct ReportExtendedLUNdata *buf, int bufsize);
29634592254SScott Teel static int hpsa_luns_changed(struct ctlr_info *h);
297ba74fdc4SDon Brace static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c,
298ba74fdc4SDon Brace 			       struct hpsa_scsi_dev_t *dev,
299ba74fdc4SDon Brace 			       unsigned char *scsi3addr);
300edd16368SStephen M. Cameron 
301edd16368SStephen M. Cameron static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
302edd16368SStephen M. Cameron {
303edd16368SStephen M. Cameron 	unsigned long *priv = shost_priv(sdev->host);
304edd16368SStephen M. Cameron 	return (struct ctlr_info *) *priv;
305edd16368SStephen M. Cameron }
306edd16368SStephen M. Cameron 
307a23513e8SStephen M. Cameron static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
308a23513e8SStephen M. Cameron {
309a23513e8SStephen M. Cameron 	unsigned long *priv = shost_priv(sh);
310a23513e8SStephen M. Cameron 	return (struct ctlr_info *) *priv;
311a23513e8SStephen M. Cameron }
312a23513e8SStephen M. Cameron 
313a58e7e53SWebb Scales static inline bool hpsa_is_cmd_idle(struct CommandList *c)
314a58e7e53SWebb Scales {
315a58e7e53SWebb Scales 	return c->scsi_cmd == SCSI_CMD_IDLE;
316a58e7e53SWebb Scales }
317a58e7e53SWebb Scales 
318d604f533SWebb Scales static inline bool hpsa_is_pending_event(struct CommandList *c)
319d604f533SWebb Scales {
320d604f533SWebb Scales 	return c->abort_pending || c->reset_pending;
321d604f533SWebb Scales }
322d604f533SWebb Scales 
3239437ac43SStephen Cameron /* extract sense key, asc, and ascq from sense data.  -1 means invalid. */
3249437ac43SStephen Cameron static void decode_sense_data(const u8 *sense_data, int sense_data_len,
3259437ac43SStephen Cameron 			u8 *sense_key, u8 *asc, u8 *ascq)
3269437ac43SStephen Cameron {
3279437ac43SStephen Cameron 	struct scsi_sense_hdr sshdr;
3289437ac43SStephen Cameron 	bool rc;
3299437ac43SStephen Cameron 
3309437ac43SStephen Cameron 	*sense_key = -1;
3319437ac43SStephen Cameron 	*asc = -1;
3329437ac43SStephen Cameron 	*ascq = -1;
3339437ac43SStephen Cameron 
3349437ac43SStephen Cameron 	if (sense_data_len < 1)
3359437ac43SStephen Cameron 		return;
3369437ac43SStephen Cameron 
3379437ac43SStephen Cameron 	rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr);
3389437ac43SStephen Cameron 	if (rc) {
3399437ac43SStephen Cameron 		*sense_key = sshdr.sense_key;
3409437ac43SStephen Cameron 		*asc = sshdr.asc;
3419437ac43SStephen Cameron 		*ascq = sshdr.ascq;
3429437ac43SStephen Cameron 	}
3439437ac43SStephen Cameron }
3449437ac43SStephen Cameron 
345edd16368SStephen M. Cameron static int check_for_unit_attention(struct ctlr_info *h,
346edd16368SStephen M. Cameron 	struct CommandList *c)
347edd16368SStephen M. Cameron {
3489437ac43SStephen Cameron 	u8 sense_key, asc, ascq;
3499437ac43SStephen Cameron 	int sense_len;
3509437ac43SStephen Cameron 
3519437ac43SStephen Cameron 	if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
3529437ac43SStephen Cameron 		sense_len = sizeof(c->err_info->SenseInfo);
3539437ac43SStephen Cameron 	else
3549437ac43SStephen Cameron 		sense_len = c->err_info->SenseLen;
3559437ac43SStephen Cameron 
3569437ac43SStephen Cameron 	decode_sense_data(c->err_info->SenseInfo, sense_len,
3579437ac43SStephen Cameron 				&sense_key, &asc, &ascq);
35881c27557SDon Brace 	if (sense_key != UNIT_ATTENTION || asc == 0xff)
359edd16368SStephen M. Cameron 		return 0;
360edd16368SStephen M. Cameron 
3619437ac43SStephen Cameron 	switch (asc) {
362edd16368SStephen M. Cameron 	case STATE_CHANGED:
3639437ac43SStephen Cameron 		dev_warn(&h->pdev->dev,
3642946e82bSRobert Elliott 			"%s: a state change detected, command retried\n",
3652946e82bSRobert Elliott 			h->devname);
366edd16368SStephen M. Cameron 		break;
367edd16368SStephen M. Cameron 	case LUN_FAILED:
3687f73695aSStephen M. Cameron 		dev_warn(&h->pdev->dev,
3692946e82bSRobert Elliott 			"%s: LUN failure detected\n", h->devname);
370edd16368SStephen M. Cameron 		break;
371edd16368SStephen M. Cameron 	case REPORT_LUNS_CHANGED:
3727f73695aSStephen M. Cameron 		dev_warn(&h->pdev->dev,
3732946e82bSRobert Elliott 			"%s: report LUN data changed\n", h->devname);
374edd16368SStephen M. Cameron 	/*
3754f4eb9f1SScott Teel 	 * Note: this REPORT_LUNS_CHANGED condition only occurs on the external
3764f4eb9f1SScott Teel 	 * target (array) devices.
377edd16368SStephen M. Cameron 	 */
378edd16368SStephen M. Cameron 		break;
379edd16368SStephen M. Cameron 	case POWER_OR_RESET:
3802946e82bSRobert Elliott 		dev_warn(&h->pdev->dev,
3812946e82bSRobert Elliott 			"%s: a power on or device reset detected\n",
3822946e82bSRobert Elliott 			h->devname);
383edd16368SStephen M. Cameron 		break;
384edd16368SStephen M. Cameron 	case UNIT_ATTENTION_CLEARED:
3852946e82bSRobert Elliott 		dev_warn(&h->pdev->dev,
3862946e82bSRobert Elliott 			"%s: unit attention cleared by another initiator\n",
3872946e82bSRobert Elliott 			h->devname);
388edd16368SStephen M. Cameron 		break;
389edd16368SStephen M. Cameron 	default:
3902946e82bSRobert Elliott 		dev_warn(&h->pdev->dev,
3912946e82bSRobert Elliott 			"%s: unknown unit attention detected\n",
3922946e82bSRobert Elliott 			h->devname);
393edd16368SStephen M. Cameron 		break;
394edd16368SStephen M. Cameron 	}
395edd16368SStephen M. Cameron 	return 1;
396edd16368SStephen M. Cameron }
397edd16368SStephen M. Cameron 
398852af20aSMatt Bondurant static int check_for_busy(struct ctlr_info *h, struct CommandList *c)
399852af20aSMatt Bondurant {
400852af20aSMatt Bondurant 	if (c->err_info->CommandStatus != CMD_TARGET_STATUS ||
401852af20aSMatt Bondurant 		(c->err_info->ScsiStatus != SAM_STAT_BUSY &&
402852af20aSMatt Bondurant 		 c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL))
403852af20aSMatt Bondurant 		return 0;
404852af20aSMatt Bondurant 	dev_warn(&h->pdev->dev, HPSA "device busy");
405852af20aSMatt Bondurant 	return 1;
406852af20aSMatt Bondurant }
407852af20aSMatt Bondurant 
408e985c58fSStephen Cameron static u32 lockup_detected(struct ctlr_info *h);
409e985c58fSStephen Cameron static ssize_t host_show_lockup_detected(struct device *dev,
410e985c58fSStephen Cameron 		struct device_attribute *attr, char *buf)
411e985c58fSStephen Cameron {
412e985c58fSStephen Cameron 	int ld;
413e985c58fSStephen Cameron 	struct ctlr_info *h;
414e985c58fSStephen Cameron 	struct Scsi_Host *shost = class_to_shost(dev);
415e985c58fSStephen Cameron 
416e985c58fSStephen Cameron 	h = shost_to_hba(shost);
417e985c58fSStephen Cameron 	ld = lockup_detected(h);
418e985c58fSStephen Cameron 
419e985c58fSStephen Cameron 	return sprintf(buf, "ld=%d\n", ld);
420e985c58fSStephen Cameron }
421e985c58fSStephen Cameron 
422da0697bdSScott Teel static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev,
423da0697bdSScott Teel 					 struct device_attribute *attr,
424da0697bdSScott Teel 					 const char *buf, size_t count)
425da0697bdSScott Teel {
426da0697bdSScott Teel 	int status, len;
427da0697bdSScott Teel 	struct ctlr_info *h;
428da0697bdSScott Teel 	struct Scsi_Host *shost = class_to_shost(dev);
429da0697bdSScott Teel 	char tmpbuf[10];
430da0697bdSScott Teel 
431da0697bdSScott Teel 	if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
432da0697bdSScott Teel 		return -EACCES;
433da0697bdSScott Teel 	len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
434da0697bdSScott Teel 	strncpy(tmpbuf, buf, len);
435da0697bdSScott Teel 	tmpbuf[len] = '\0';
436da0697bdSScott Teel 	if (sscanf(tmpbuf, "%d", &status) != 1)
437da0697bdSScott Teel 		return -EINVAL;
438da0697bdSScott Teel 	h = shost_to_hba(shost);
439da0697bdSScott Teel 	h->acciopath_status = !!status;
440da0697bdSScott Teel 	dev_warn(&h->pdev->dev,
441da0697bdSScott Teel 		"hpsa: HP SSD Smart Path %s via sysfs update.\n",
442da0697bdSScott Teel 		h->acciopath_status ? "enabled" : "disabled");
443da0697bdSScott Teel 	return count;
444da0697bdSScott Teel }
445da0697bdSScott Teel 
4462ba8bfc8SStephen M. Cameron static ssize_t host_store_raid_offload_debug(struct device *dev,
4472ba8bfc8SStephen M. Cameron 					 struct device_attribute *attr,
4482ba8bfc8SStephen M. Cameron 					 const char *buf, size_t count)
4492ba8bfc8SStephen M. Cameron {
4502ba8bfc8SStephen M. Cameron 	int debug_level, len;
4512ba8bfc8SStephen M. Cameron 	struct ctlr_info *h;
4522ba8bfc8SStephen M. Cameron 	struct Scsi_Host *shost = class_to_shost(dev);
4532ba8bfc8SStephen M. Cameron 	char tmpbuf[10];
4542ba8bfc8SStephen M. Cameron 
4552ba8bfc8SStephen M. Cameron 	if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
4562ba8bfc8SStephen M. Cameron 		return -EACCES;
4572ba8bfc8SStephen M. Cameron 	len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
4582ba8bfc8SStephen M. Cameron 	strncpy(tmpbuf, buf, len);
4592ba8bfc8SStephen M. Cameron 	tmpbuf[len] = '\0';
4602ba8bfc8SStephen M. Cameron 	if (sscanf(tmpbuf, "%d", &debug_level) != 1)
4612ba8bfc8SStephen M. Cameron 		return -EINVAL;
4622ba8bfc8SStephen M. Cameron 	if (debug_level < 0)
4632ba8bfc8SStephen M. Cameron 		debug_level = 0;
4642ba8bfc8SStephen M. Cameron 	h = shost_to_hba(shost);
4652ba8bfc8SStephen M. Cameron 	h->raid_offload_debug = debug_level;
4662ba8bfc8SStephen M. Cameron 	dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n",
4672ba8bfc8SStephen M. Cameron 		h->raid_offload_debug);
4682ba8bfc8SStephen M. Cameron 	return count;
4692ba8bfc8SStephen M. Cameron }
4702ba8bfc8SStephen M. Cameron 
471edd16368SStephen M. Cameron static ssize_t host_store_rescan(struct device *dev,
472edd16368SStephen M. Cameron 				 struct device_attribute *attr,
473edd16368SStephen M. Cameron 				 const char *buf, size_t count)
474edd16368SStephen M. Cameron {
475edd16368SStephen M. Cameron 	struct ctlr_info *h;
476edd16368SStephen M. Cameron 	struct Scsi_Host *shost = class_to_shost(dev);
477a23513e8SStephen M. Cameron 	h = shost_to_hba(shost);
47831468401SMike Miller 	hpsa_scan_start(h->scsi_host);
479edd16368SStephen M. Cameron 	return count;
480edd16368SStephen M. Cameron }
481edd16368SStephen M. Cameron 
482d28ce020SStephen M. Cameron static ssize_t host_show_firmware_revision(struct device *dev,
483d28ce020SStephen M. Cameron 	     struct device_attribute *attr, char *buf)
484d28ce020SStephen M. Cameron {
485d28ce020SStephen M. Cameron 	struct ctlr_info *h;
486d28ce020SStephen M. Cameron 	struct Scsi_Host *shost = class_to_shost(dev);
487d28ce020SStephen M. Cameron 	unsigned char *fwrev;
488d28ce020SStephen M. Cameron 
489d28ce020SStephen M. Cameron 	h = shost_to_hba(shost);
490d28ce020SStephen M. Cameron 	if (!h->hba_inquiry_data)
491d28ce020SStephen M. Cameron 		return 0;
492d28ce020SStephen M. Cameron 	fwrev = &h->hba_inquiry_data[32];
493d28ce020SStephen M. Cameron 	return snprintf(buf, 20, "%c%c%c%c\n",
494d28ce020SStephen M. Cameron 		fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
495d28ce020SStephen M. Cameron }
496d28ce020SStephen M. Cameron 
49794a13649SStephen M. Cameron static ssize_t host_show_commands_outstanding(struct device *dev,
49894a13649SStephen M. Cameron 	     struct device_attribute *attr, char *buf)
49994a13649SStephen M. Cameron {
50094a13649SStephen M. Cameron 	struct Scsi_Host *shost = class_to_shost(dev);
50194a13649SStephen M. Cameron 	struct ctlr_info *h = shost_to_hba(shost);
50294a13649SStephen M. Cameron 
5030cbf768eSStephen M. Cameron 	return snprintf(buf, 20, "%d\n",
5040cbf768eSStephen M. Cameron 			atomic_read(&h->commands_outstanding));
50594a13649SStephen M. Cameron }
50694a13649SStephen M. Cameron 
507745a7a25SStephen M. Cameron static ssize_t host_show_transport_mode(struct device *dev,
508745a7a25SStephen M. Cameron 	struct device_attribute *attr, char *buf)
509745a7a25SStephen M. Cameron {
510745a7a25SStephen M. Cameron 	struct ctlr_info *h;
511745a7a25SStephen M. Cameron 	struct Scsi_Host *shost = class_to_shost(dev);
512745a7a25SStephen M. Cameron 
513745a7a25SStephen M. Cameron 	h = shost_to_hba(shost);
514745a7a25SStephen M. Cameron 	return snprintf(buf, 20, "%s\n",
515960a30e7SStephen M. Cameron 		h->transMethod & CFGTBL_Trans_Performant ?
516745a7a25SStephen M. Cameron 			"performant" : "simple");
517745a7a25SStephen M. Cameron }
518745a7a25SStephen M. Cameron 
519da0697bdSScott Teel static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev,
520da0697bdSScott Teel 	struct device_attribute *attr, char *buf)
521da0697bdSScott Teel {
522da0697bdSScott Teel 	struct ctlr_info *h;
523da0697bdSScott Teel 	struct Scsi_Host *shost = class_to_shost(dev);
524da0697bdSScott Teel 
525da0697bdSScott Teel 	h = shost_to_hba(shost);
526da0697bdSScott Teel 	return snprintf(buf, 30, "HP SSD Smart Path %s\n",
527da0697bdSScott Teel 		(h->acciopath_status == 1) ?  "enabled" : "disabled");
528da0697bdSScott Teel }
529da0697bdSScott Teel 
53046380786SStephen M. Cameron /* List of controllers which cannot be hard reset on kexec with reset_devices */
531941b1cdaSStephen M. Cameron static u32 unresettable_controller[] = {
532941b1cdaSStephen M. Cameron 	0x324a103C, /* Smart Array P712m */
533941b1cdaSStephen M. Cameron 	0x324b103C, /* Smart Array P711m */
534941b1cdaSStephen M. Cameron 	0x3223103C, /* Smart Array P800 */
535941b1cdaSStephen M. Cameron 	0x3234103C, /* Smart Array P400 */
536941b1cdaSStephen M. Cameron 	0x3235103C, /* Smart Array P400i */
537941b1cdaSStephen M. Cameron 	0x3211103C, /* Smart Array E200i */
538941b1cdaSStephen M. Cameron 	0x3212103C, /* Smart Array E200 */
539941b1cdaSStephen M. Cameron 	0x3213103C, /* Smart Array E200i */
540941b1cdaSStephen M. Cameron 	0x3214103C, /* Smart Array E200i */
541941b1cdaSStephen M. Cameron 	0x3215103C, /* Smart Array E200i */
542941b1cdaSStephen M. Cameron 	0x3237103C, /* Smart Array E500 */
543941b1cdaSStephen M. Cameron 	0x323D103C, /* Smart Array P700m */
5447af0abbcSTomas Henzl 	0x40800E11, /* Smart Array 5i */
545941b1cdaSStephen M. Cameron 	0x409C0E11, /* Smart Array 6400 */
546941b1cdaSStephen M. Cameron 	0x409D0E11, /* Smart Array 6400 EM */
5475a4f934eSTomas Henzl 	0x40700E11, /* Smart Array 5300 */
5485a4f934eSTomas Henzl 	0x40820E11, /* Smart Array 532 */
5495a4f934eSTomas Henzl 	0x40830E11, /* Smart Array 5312 */
5505a4f934eSTomas Henzl 	0x409A0E11, /* Smart Array 641 */
5515a4f934eSTomas Henzl 	0x409B0E11, /* Smart Array 642 */
5525a4f934eSTomas Henzl 	0x40910E11, /* Smart Array 6i */
553941b1cdaSStephen M. Cameron };
554941b1cdaSStephen M. Cameron 
55546380786SStephen M. Cameron /* List of controllers which cannot even be soft reset */
55646380786SStephen M. Cameron static u32 soft_unresettable_controller[] = {
5577af0abbcSTomas Henzl 	0x40800E11, /* Smart Array 5i */
5585a4f934eSTomas Henzl 	0x40700E11, /* Smart Array 5300 */
5595a4f934eSTomas Henzl 	0x40820E11, /* Smart Array 532 */
5605a4f934eSTomas Henzl 	0x40830E11, /* Smart Array 5312 */
5615a4f934eSTomas Henzl 	0x409A0E11, /* Smart Array 641 */
5625a4f934eSTomas Henzl 	0x409B0E11, /* Smart Array 642 */
5635a4f934eSTomas Henzl 	0x40910E11, /* Smart Array 6i */
56446380786SStephen M. Cameron 	/* Exclude 640x boards.  These are two pci devices in one slot
56546380786SStephen M. Cameron 	 * which share a battery backed cache module.  One controls the
56646380786SStephen M. Cameron 	 * cache, the other accesses the cache through the one that controls
56746380786SStephen M. Cameron 	 * it.  If we reset the one controlling the cache, the other will
56846380786SStephen M. Cameron 	 * likely not be happy.  Just forbid resetting this conjoined mess.
56946380786SStephen M. Cameron 	 * The 640x isn't really supported by hpsa anyway.
57046380786SStephen M. Cameron 	 */
57146380786SStephen M. Cameron 	0x409C0E11, /* Smart Array 6400 */
57246380786SStephen M. Cameron 	0x409D0E11, /* Smart Array 6400 EM */
57346380786SStephen M. Cameron };
57446380786SStephen M. Cameron 
5759b5c48c2SStephen Cameron static u32 needs_abort_tags_swizzled[] = {
5769b5c48c2SStephen Cameron 	0x323D103C, /* Smart Array P700m */
5779b5c48c2SStephen Cameron 	0x324a103C, /* Smart Array P712m */
5789b5c48c2SStephen Cameron 	0x324b103C, /* SmartArray P711m */
5799b5c48c2SStephen Cameron };
5809b5c48c2SStephen Cameron 
5819b5c48c2SStephen Cameron static int board_id_in_array(u32 a[], int nelems, u32 board_id)
582941b1cdaSStephen M. Cameron {
583941b1cdaSStephen M. Cameron 	int i;
584941b1cdaSStephen M. Cameron 
5859b5c48c2SStephen Cameron 	for (i = 0; i < nelems; i++)
5869b5c48c2SStephen Cameron 		if (a[i] == board_id)
587941b1cdaSStephen M. Cameron 			return 1;
5889b5c48c2SStephen Cameron 	return 0;
5899b5c48c2SStephen Cameron }
5909b5c48c2SStephen Cameron 
5919b5c48c2SStephen Cameron static int ctlr_is_hard_resettable(u32 board_id)
5929b5c48c2SStephen Cameron {
5939b5c48c2SStephen Cameron 	return !board_id_in_array(unresettable_controller,
5949b5c48c2SStephen Cameron 			ARRAY_SIZE(unresettable_controller), board_id);
595941b1cdaSStephen M. Cameron }
596941b1cdaSStephen M. Cameron 
59746380786SStephen M. Cameron static int ctlr_is_soft_resettable(u32 board_id)
59846380786SStephen M. Cameron {
5999b5c48c2SStephen Cameron 	return !board_id_in_array(soft_unresettable_controller,
6009b5c48c2SStephen Cameron 			ARRAY_SIZE(soft_unresettable_controller), board_id);
60146380786SStephen M. Cameron }
60246380786SStephen M. Cameron 
60346380786SStephen M. Cameron static int ctlr_is_resettable(u32 board_id)
60446380786SStephen M. Cameron {
60546380786SStephen M. Cameron 	return ctlr_is_hard_resettable(board_id) ||
60646380786SStephen M. Cameron 		ctlr_is_soft_resettable(board_id);
60746380786SStephen M. Cameron }
60846380786SStephen M. Cameron 
6099b5c48c2SStephen Cameron static int ctlr_needs_abort_tags_swizzled(u32 board_id)
6109b5c48c2SStephen Cameron {
6119b5c48c2SStephen Cameron 	return board_id_in_array(needs_abort_tags_swizzled,
6129b5c48c2SStephen Cameron 			ARRAY_SIZE(needs_abort_tags_swizzled), board_id);
6139b5c48c2SStephen Cameron }
6149b5c48c2SStephen Cameron 
615941b1cdaSStephen M. Cameron static ssize_t host_show_resettable(struct device *dev,
616941b1cdaSStephen M. Cameron 	struct device_attribute *attr, char *buf)
617941b1cdaSStephen M. Cameron {
618941b1cdaSStephen M. Cameron 	struct ctlr_info *h;
619941b1cdaSStephen M. Cameron 	struct Scsi_Host *shost = class_to_shost(dev);
620941b1cdaSStephen M. Cameron 
621941b1cdaSStephen M. Cameron 	h = shost_to_hba(shost);
62246380786SStephen M. Cameron 	return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
623941b1cdaSStephen M. Cameron }
624941b1cdaSStephen M. Cameron 
625edd16368SStephen M. Cameron static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
626edd16368SStephen M. Cameron {
627edd16368SStephen M. Cameron 	return (scsi3addr[3] & 0xC0) == 0x40;
628edd16368SStephen M. Cameron }
629edd16368SStephen M. Cameron 
630f2ef0ce7SRobert Elliott static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6",
6317c59a0d4SDon Brace 	"1(+0)ADM", "UNKNOWN", "PHYS DRV"
632edd16368SStephen M. Cameron };
6336b80b18fSScott Teel #define HPSA_RAID_0	0
6346b80b18fSScott Teel #define HPSA_RAID_4	1
6356b80b18fSScott Teel #define HPSA_RAID_1	2	/* also used for RAID 10 */
6366b80b18fSScott Teel #define HPSA_RAID_5	3	/* also used for RAID 50 */
6376b80b18fSScott Teel #define HPSA_RAID_51	4
6386b80b18fSScott Teel #define HPSA_RAID_6	5	/* also used for RAID 60 */
6396b80b18fSScott Teel #define HPSA_RAID_ADM	6	/* also used for RAID 1+0 ADM */
6407c59a0d4SDon Brace #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 2)
6417c59a0d4SDon Brace #define PHYSICAL_DRIVE (ARRAY_SIZE(raid_label) - 1)
642edd16368SStephen M. Cameron 
643f3f01730SKevin Barnett static inline bool is_logical_device(struct hpsa_scsi_dev_t *device)
644f3f01730SKevin Barnett {
645f3f01730SKevin Barnett 	return !device->physical_device;
646f3f01730SKevin Barnett }
647edd16368SStephen M. Cameron 
648edd16368SStephen M. Cameron static ssize_t raid_level_show(struct device *dev,
649edd16368SStephen M. Cameron 	     struct device_attribute *attr, char *buf)
650edd16368SStephen M. Cameron {
651edd16368SStephen M. Cameron 	ssize_t l = 0;
65282a72c0aSStephen M. Cameron 	unsigned char rlevel;
653edd16368SStephen M. Cameron 	struct ctlr_info *h;
654edd16368SStephen M. Cameron 	struct scsi_device *sdev;
655edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *hdev;
656edd16368SStephen M. Cameron 	unsigned long flags;
657edd16368SStephen M. Cameron 
658edd16368SStephen M. Cameron 	sdev = to_scsi_device(dev);
659edd16368SStephen M. Cameron 	h = sdev_to_hba(sdev);
660edd16368SStephen M. Cameron 	spin_lock_irqsave(&h->lock, flags);
661edd16368SStephen M. Cameron 	hdev = sdev->hostdata;
662edd16368SStephen M. Cameron 	if (!hdev) {
663edd16368SStephen M. Cameron 		spin_unlock_irqrestore(&h->lock, flags);
664edd16368SStephen M. Cameron 		return -ENODEV;
665edd16368SStephen M. Cameron 	}
666edd16368SStephen M. Cameron 
667edd16368SStephen M. Cameron 	/* Is this even a logical drive? */
668f3f01730SKevin Barnett 	if (!is_logical_device(hdev)) {
669edd16368SStephen M. Cameron 		spin_unlock_irqrestore(&h->lock, flags);
670edd16368SStephen M. Cameron 		l = snprintf(buf, PAGE_SIZE, "N/A\n");
671edd16368SStephen M. Cameron 		return l;
672edd16368SStephen M. Cameron 	}
673edd16368SStephen M. Cameron 
674edd16368SStephen M. Cameron 	rlevel = hdev->raid_level;
675edd16368SStephen M. Cameron 	spin_unlock_irqrestore(&h->lock, flags);
67682a72c0aSStephen M. Cameron 	if (rlevel > RAID_UNKNOWN)
677edd16368SStephen M. Cameron 		rlevel = RAID_UNKNOWN;
678edd16368SStephen M. Cameron 	l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
679edd16368SStephen M. Cameron 	return l;
680edd16368SStephen M. Cameron }
681edd16368SStephen M. Cameron 
682edd16368SStephen M. Cameron static ssize_t lunid_show(struct device *dev,
683edd16368SStephen M. Cameron 	     struct device_attribute *attr, char *buf)
684edd16368SStephen M. Cameron {
685edd16368SStephen M. Cameron 	struct ctlr_info *h;
686edd16368SStephen M. Cameron 	struct scsi_device *sdev;
687edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *hdev;
688edd16368SStephen M. Cameron 	unsigned long flags;
689edd16368SStephen M. Cameron 	unsigned char lunid[8];
690edd16368SStephen M. Cameron 
691edd16368SStephen M. Cameron 	sdev = to_scsi_device(dev);
692edd16368SStephen M. Cameron 	h = sdev_to_hba(sdev);
693edd16368SStephen M. Cameron 	spin_lock_irqsave(&h->lock, flags);
694edd16368SStephen M. Cameron 	hdev = sdev->hostdata;
695edd16368SStephen M. Cameron 	if (!hdev) {
696edd16368SStephen M. Cameron 		spin_unlock_irqrestore(&h->lock, flags);
697edd16368SStephen M. Cameron 		return -ENODEV;
698edd16368SStephen M. Cameron 	}
699edd16368SStephen M. Cameron 	memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
700edd16368SStephen M. Cameron 	spin_unlock_irqrestore(&h->lock, flags);
701edd16368SStephen M. Cameron 	return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
702edd16368SStephen M. Cameron 		lunid[0], lunid[1], lunid[2], lunid[3],
703edd16368SStephen M. Cameron 		lunid[4], lunid[5], lunid[6], lunid[7]);
704edd16368SStephen M. Cameron }
705edd16368SStephen M. Cameron 
706edd16368SStephen M. Cameron static ssize_t unique_id_show(struct device *dev,
707edd16368SStephen M. Cameron 	     struct device_attribute *attr, char *buf)
708edd16368SStephen M. Cameron {
709edd16368SStephen M. Cameron 	struct ctlr_info *h;
710edd16368SStephen M. Cameron 	struct scsi_device *sdev;
711edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *hdev;
712edd16368SStephen M. Cameron 	unsigned long flags;
713edd16368SStephen M. Cameron 	unsigned char sn[16];
714edd16368SStephen M. Cameron 
715edd16368SStephen M. Cameron 	sdev = to_scsi_device(dev);
716edd16368SStephen M. Cameron 	h = sdev_to_hba(sdev);
717edd16368SStephen M. Cameron 	spin_lock_irqsave(&h->lock, flags);
718edd16368SStephen M. Cameron 	hdev = sdev->hostdata;
719edd16368SStephen M. Cameron 	if (!hdev) {
720edd16368SStephen M. Cameron 		spin_unlock_irqrestore(&h->lock, flags);
721edd16368SStephen M. Cameron 		return -ENODEV;
722edd16368SStephen M. Cameron 	}
723edd16368SStephen M. Cameron 	memcpy(sn, hdev->device_id, sizeof(sn));
724edd16368SStephen M. Cameron 	spin_unlock_irqrestore(&h->lock, flags);
725edd16368SStephen M. Cameron 	return snprintf(buf, 16 * 2 + 2,
726edd16368SStephen M. Cameron 			"%02X%02X%02X%02X%02X%02X%02X%02X"
727edd16368SStephen M. Cameron 			"%02X%02X%02X%02X%02X%02X%02X%02X\n",
728edd16368SStephen M. Cameron 			sn[0], sn[1], sn[2], sn[3],
729edd16368SStephen M. Cameron 			sn[4], sn[5], sn[6], sn[7],
730edd16368SStephen M. Cameron 			sn[8], sn[9], sn[10], sn[11],
731edd16368SStephen M. Cameron 			sn[12], sn[13], sn[14], sn[15]);
732edd16368SStephen M. Cameron }
733edd16368SStephen M. Cameron 
734ded1be4aSJoseph T Handzik static ssize_t sas_address_show(struct device *dev,
735ded1be4aSJoseph T Handzik 	      struct device_attribute *attr, char *buf)
736ded1be4aSJoseph T Handzik {
737ded1be4aSJoseph T Handzik 	struct ctlr_info *h;
738ded1be4aSJoseph T Handzik 	struct scsi_device *sdev;
739ded1be4aSJoseph T Handzik 	struct hpsa_scsi_dev_t *hdev;
740ded1be4aSJoseph T Handzik 	unsigned long flags;
741ded1be4aSJoseph T Handzik 	u64 sas_address;
742ded1be4aSJoseph T Handzik 
743ded1be4aSJoseph T Handzik 	sdev = to_scsi_device(dev);
744ded1be4aSJoseph T Handzik 	h = sdev_to_hba(sdev);
745ded1be4aSJoseph T Handzik 	spin_lock_irqsave(&h->lock, flags);
746ded1be4aSJoseph T Handzik 	hdev = sdev->hostdata;
747ded1be4aSJoseph T Handzik 	if (!hdev || is_logical_device(hdev) || !hdev->expose_device) {
748ded1be4aSJoseph T Handzik 		spin_unlock_irqrestore(&h->lock, flags);
749ded1be4aSJoseph T Handzik 		return -ENODEV;
750ded1be4aSJoseph T Handzik 	}
751ded1be4aSJoseph T Handzik 	sas_address = hdev->sas_address;
752ded1be4aSJoseph T Handzik 	spin_unlock_irqrestore(&h->lock, flags);
753ded1be4aSJoseph T Handzik 
754ded1be4aSJoseph T Handzik 	return snprintf(buf, PAGE_SIZE, "0x%016llx\n", sas_address);
755ded1be4aSJoseph T Handzik }
756ded1be4aSJoseph T Handzik 
757c1988684SScott Teel static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev,
758c1988684SScott Teel 	     struct device_attribute *attr, char *buf)
759c1988684SScott Teel {
760c1988684SScott Teel 	struct ctlr_info *h;
761c1988684SScott Teel 	struct scsi_device *sdev;
762c1988684SScott Teel 	struct hpsa_scsi_dev_t *hdev;
763c1988684SScott Teel 	unsigned long flags;
764c1988684SScott Teel 	int offload_enabled;
765c1988684SScott Teel 
766c1988684SScott Teel 	sdev = to_scsi_device(dev);
767c1988684SScott Teel 	h = sdev_to_hba(sdev);
768c1988684SScott Teel 	spin_lock_irqsave(&h->lock, flags);
769c1988684SScott Teel 	hdev = sdev->hostdata;
770c1988684SScott Teel 	if (!hdev) {
771c1988684SScott Teel 		spin_unlock_irqrestore(&h->lock, flags);
772c1988684SScott Teel 		return -ENODEV;
773c1988684SScott Teel 	}
774c1988684SScott Teel 	offload_enabled = hdev->offload_enabled;
775c1988684SScott Teel 	spin_unlock_irqrestore(&h->lock, flags);
776c1988684SScott Teel 	return snprintf(buf, 20, "%d\n", offload_enabled);
777c1988684SScott Teel }
778c1988684SScott Teel 
7798270b862SJoe Handzik #define MAX_PATHS 8
7808270b862SJoe Handzik static ssize_t path_info_show(struct device *dev,
7818270b862SJoe Handzik 	     struct device_attribute *attr, char *buf)
7828270b862SJoe Handzik {
7838270b862SJoe Handzik 	struct ctlr_info *h;
7848270b862SJoe Handzik 	struct scsi_device *sdev;
7858270b862SJoe Handzik 	struct hpsa_scsi_dev_t *hdev;
7868270b862SJoe Handzik 	unsigned long flags;
7878270b862SJoe Handzik 	int i;
7888270b862SJoe Handzik 	int output_len = 0;
7898270b862SJoe Handzik 	u8 box;
7908270b862SJoe Handzik 	u8 bay;
7918270b862SJoe Handzik 	u8 path_map_index = 0;
7928270b862SJoe Handzik 	char *active;
7938270b862SJoe Handzik 	unsigned char phys_connector[2];
7948270b862SJoe Handzik 
7958270b862SJoe Handzik 	sdev = to_scsi_device(dev);
7968270b862SJoe Handzik 	h = sdev_to_hba(sdev);
7978270b862SJoe Handzik 	spin_lock_irqsave(&h->devlock, flags);
7988270b862SJoe Handzik 	hdev = sdev->hostdata;
7998270b862SJoe Handzik 	if (!hdev) {
8008270b862SJoe Handzik 		spin_unlock_irqrestore(&h->devlock, flags);
8018270b862SJoe Handzik 		return -ENODEV;
8028270b862SJoe Handzik 	}
8038270b862SJoe Handzik 
8048270b862SJoe Handzik 	bay = hdev->bay;
8058270b862SJoe Handzik 	for (i = 0; i < MAX_PATHS; i++) {
8068270b862SJoe Handzik 		path_map_index = 1<<i;
8078270b862SJoe Handzik 		if (i == hdev->active_path_index)
8088270b862SJoe Handzik 			active = "Active";
8098270b862SJoe Handzik 		else if (hdev->path_map & path_map_index)
8108270b862SJoe Handzik 			active = "Inactive";
8118270b862SJoe Handzik 		else
8128270b862SJoe Handzik 			continue;
8138270b862SJoe Handzik 
8141faf072cSRasmus Villemoes 		output_len += scnprintf(buf + output_len,
8151faf072cSRasmus Villemoes 				PAGE_SIZE - output_len,
8161faf072cSRasmus Villemoes 				"[%d:%d:%d:%d] %20.20s ",
8178270b862SJoe Handzik 				h->scsi_host->host_no,
8188270b862SJoe Handzik 				hdev->bus, hdev->target, hdev->lun,
8198270b862SJoe Handzik 				scsi_device_type(hdev->devtype));
8208270b862SJoe Handzik 
821cca8f13bSDon Brace 		if (hdev->devtype == TYPE_RAID || is_logical_device(hdev)) {
8222708f295SDon Brace 			output_len += scnprintf(buf + output_len,
8231faf072cSRasmus Villemoes 						PAGE_SIZE - output_len,
8241faf072cSRasmus Villemoes 						"%s\n", active);
8258270b862SJoe Handzik 			continue;
8268270b862SJoe Handzik 		}
8278270b862SJoe Handzik 
8288270b862SJoe Handzik 		box = hdev->box[i];
8298270b862SJoe Handzik 		memcpy(&phys_connector, &hdev->phys_connector[i],
8308270b862SJoe Handzik 			sizeof(phys_connector));
8318270b862SJoe Handzik 		if (phys_connector[0] < '0')
8328270b862SJoe Handzik 			phys_connector[0] = '0';
8338270b862SJoe Handzik 		if (phys_connector[1] < '0')
8348270b862SJoe Handzik 			phys_connector[1] = '0';
8352708f295SDon Brace 		output_len += scnprintf(buf + output_len,
8361faf072cSRasmus Villemoes 				PAGE_SIZE - output_len,
8378270b862SJoe Handzik 				"PORT: %.2s ",
8388270b862SJoe Handzik 				phys_connector);
839af15ed36SDon Brace 		if ((hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC) &&
840af15ed36SDon Brace 			hdev->expose_device) {
8418270b862SJoe Handzik 			if (box == 0 || box == 0xFF) {
8422708f295SDon Brace 				output_len += scnprintf(buf + output_len,
8431faf072cSRasmus Villemoes 					PAGE_SIZE - output_len,
8448270b862SJoe Handzik 					"BAY: %hhu %s\n",
8458270b862SJoe Handzik 					bay, active);
8468270b862SJoe Handzik 			} else {
8472708f295SDon Brace 				output_len += scnprintf(buf + output_len,
8481faf072cSRasmus Villemoes 					PAGE_SIZE - output_len,
8498270b862SJoe Handzik 					"BOX: %hhu BAY: %hhu %s\n",
8508270b862SJoe Handzik 					box, bay, active);
8518270b862SJoe Handzik 			}
8528270b862SJoe Handzik 		} else if (box != 0 && box != 0xFF) {
8532708f295SDon Brace 			output_len += scnprintf(buf + output_len,
8541faf072cSRasmus Villemoes 				PAGE_SIZE - output_len, "BOX: %hhu %s\n",
8558270b862SJoe Handzik 				box, active);
8568270b862SJoe Handzik 		} else
8572708f295SDon Brace 			output_len += scnprintf(buf + output_len,
8581faf072cSRasmus Villemoes 				PAGE_SIZE - output_len, "%s\n", active);
8598270b862SJoe Handzik 	}
8608270b862SJoe Handzik 
8618270b862SJoe Handzik 	spin_unlock_irqrestore(&h->devlock, flags);
8621faf072cSRasmus Villemoes 	return output_len;
8638270b862SJoe Handzik }
8648270b862SJoe Handzik 
8653f5eac3aSStephen M. Cameron static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
8663f5eac3aSStephen M. Cameron static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
8673f5eac3aSStephen M. Cameron static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
8683f5eac3aSStephen M. Cameron static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
869ded1be4aSJoseph T Handzik static DEVICE_ATTR(sas_address, S_IRUGO, sas_address_show, NULL);
870c1988684SScott Teel static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO,
871c1988684SScott Teel 			host_show_hp_ssd_smart_path_enabled, NULL);
8728270b862SJoe Handzik static DEVICE_ATTR(path_info, S_IRUGO, path_info_show, NULL);
873da0697bdSScott Teel static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH,
874da0697bdSScott Teel 		host_show_hp_ssd_smart_path_status,
875da0697bdSScott Teel 		host_store_hp_ssd_smart_path_status);
8762ba8bfc8SStephen M. Cameron static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL,
8772ba8bfc8SStephen M. Cameron 			host_store_raid_offload_debug);
8783f5eac3aSStephen M. Cameron static DEVICE_ATTR(firmware_revision, S_IRUGO,
8793f5eac3aSStephen M. Cameron 	host_show_firmware_revision, NULL);
8803f5eac3aSStephen M. Cameron static DEVICE_ATTR(commands_outstanding, S_IRUGO,
8813f5eac3aSStephen M. Cameron 	host_show_commands_outstanding, NULL);
8823f5eac3aSStephen M. Cameron static DEVICE_ATTR(transport_mode, S_IRUGO,
8833f5eac3aSStephen M. Cameron 	host_show_transport_mode, NULL);
884941b1cdaSStephen M. Cameron static DEVICE_ATTR(resettable, S_IRUGO,
885941b1cdaSStephen M. Cameron 	host_show_resettable, NULL);
886e985c58fSStephen Cameron static DEVICE_ATTR(lockup_detected, S_IRUGO,
887e985c58fSStephen Cameron 	host_show_lockup_detected, NULL);
8883f5eac3aSStephen M. Cameron 
8893f5eac3aSStephen M. Cameron static struct device_attribute *hpsa_sdev_attrs[] = {
8903f5eac3aSStephen M. Cameron 	&dev_attr_raid_level,
8913f5eac3aSStephen M. Cameron 	&dev_attr_lunid,
8923f5eac3aSStephen M. Cameron 	&dev_attr_unique_id,
893c1988684SScott Teel 	&dev_attr_hp_ssd_smart_path_enabled,
8948270b862SJoe Handzik 	&dev_attr_path_info,
895ded1be4aSJoseph T Handzik 	&dev_attr_sas_address,
8963f5eac3aSStephen M. Cameron 	NULL,
8973f5eac3aSStephen M. Cameron };
8983f5eac3aSStephen M. Cameron 
8993f5eac3aSStephen M. Cameron static struct device_attribute *hpsa_shost_attrs[] = {
9003f5eac3aSStephen M. Cameron 	&dev_attr_rescan,
9013f5eac3aSStephen M. Cameron 	&dev_attr_firmware_revision,
9023f5eac3aSStephen M. Cameron 	&dev_attr_commands_outstanding,
9033f5eac3aSStephen M. Cameron 	&dev_attr_transport_mode,
904941b1cdaSStephen M. Cameron 	&dev_attr_resettable,
905da0697bdSScott Teel 	&dev_attr_hp_ssd_smart_path_status,
9062ba8bfc8SStephen M. Cameron 	&dev_attr_raid_offload_debug,
907fb53c439STomas Henzl 	&dev_attr_lockup_detected,
9083f5eac3aSStephen M. Cameron 	NULL,
9093f5eac3aSStephen M. Cameron };
9103f5eac3aSStephen M. Cameron 
91141ce4c35SStephen Cameron #define HPSA_NRESERVED_CMDS	(HPSA_CMDS_RESERVED_FOR_ABORTS + \
91241ce4c35SStephen Cameron 		HPSA_CMDS_RESERVED_FOR_DRIVER + HPSA_MAX_CONCURRENT_PASSTHRUS)
91341ce4c35SStephen Cameron 
9143f5eac3aSStephen M. Cameron static struct scsi_host_template hpsa_driver_template = {
9153f5eac3aSStephen M. Cameron 	.module			= THIS_MODULE,
916f79cfec6SStephen M. Cameron 	.name			= HPSA,
917f79cfec6SStephen M. Cameron 	.proc_name		= HPSA,
9183f5eac3aSStephen M. Cameron 	.queuecommand		= hpsa_scsi_queue_command,
9193f5eac3aSStephen M. Cameron 	.scan_start		= hpsa_scan_start,
9203f5eac3aSStephen M. Cameron 	.scan_finished		= hpsa_scan_finished,
9217c0a0229SDon Brace 	.change_queue_depth	= hpsa_change_queue_depth,
9223f5eac3aSStephen M. Cameron 	.this_id		= -1,
9233f5eac3aSStephen M. Cameron 	.use_clustering		= ENABLE_CLUSTERING,
92475167d2cSStephen M. Cameron 	.eh_abort_handler	= hpsa_eh_abort_handler,
9253f5eac3aSStephen M. Cameron 	.eh_device_reset_handler = hpsa_eh_device_reset_handler,
9263f5eac3aSStephen M. Cameron 	.ioctl			= hpsa_ioctl,
9273f5eac3aSStephen M. Cameron 	.slave_alloc		= hpsa_slave_alloc,
92841ce4c35SStephen Cameron 	.slave_configure	= hpsa_slave_configure,
9293f5eac3aSStephen M. Cameron 	.slave_destroy		= hpsa_slave_destroy,
9303f5eac3aSStephen M. Cameron #ifdef CONFIG_COMPAT
9313f5eac3aSStephen M. Cameron 	.compat_ioctl		= hpsa_compat_ioctl,
9323f5eac3aSStephen M. Cameron #endif
9333f5eac3aSStephen M. Cameron 	.sdev_attrs = hpsa_sdev_attrs,
9343f5eac3aSStephen M. Cameron 	.shost_attrs = hpsa_shost_attrs,
935c0d6a4d1SStephen M. Cameron 	.max_sectors = 8192,
93654b2b50cSMartin K. Petersen 	.no_write_same = 1,
9373f5eac3aSStephen M. Cameron };
9383f5eac3aSStephen M. Cameron 
939254f796bSMatt Gates static inline u32 next_command(struct ctlr_info *h, u8 q)
9403f5eac3aSStephen M. Cameron {
9413f5eac3aSStephen M. Cameron 	u32 a;
942072b0518SStephen M. Cameron 	struct reply_queue_buffer *rq = &h->reply_queue[q];
9433f5eac3aSStephen M. Cameron 
944e1f7de0cSMatt Gates 	if (h->transMethod & CFGTBL_Trans_io_accel1)
945e1f7de0cSMatt Gates 		return h->access.command_completed(h, q);
946e1f7de0cSMatt Gates 
9473f5eac3aSStephen M. Cameron 	if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
948254f796bSMatt Gates 		return h->access.command_completed(h, q);
9493f5eac3aSStephen M. Cameron 
950254f796bSMatt Gates 	if ((rq->head[rq->current_entry] & 1) == rq->wraparound) {
951254f796bSMatt Gates 		a = rq->head[rq->current_entry];
952254f796bSMatt Gates 		rq->current_entry++;
9530cbf768eSStephen M. Cameron 		atomic_dec(&h->commands_outstanding);
9543f5eac3aSStephen M. Cameron 	} else {
9553f5eac3aSStephen M. Cameron 		a = FIFO_EMPTY;
9563f5eac3aSStephen M. Cameron 	}
9573f5eac3aSStephen M. Cameron 	/* Check for wraparound */
958254f796bSMatt Gates 	if (rq->current_entry == h->max_commands) {
959254f796bSMatt Gates 		rq->current_entry = 0;
960254f796bSMatt Gates 		rq->wraparound ^= 1;
9613f5eac3aSStephen M. Cameron 	}
9623f5eac3aSStephen M. Cameron 	return a;
9633f5eac3aSStephen M. Cameron }
9643f5eac3aSStephen M. Cameron 
965c349775eSScott Teel /*
966c349775eSScott Teel  * There are some special bits in the bus address of the
967c349775eSScott Teel  * command that we have to set for the controller to know
968c349775eSScott Teel  * how to process the command:
969c349775eSScott Teel  *
970c349775eSScott Teel  * Normal performant mode:
971c349775eSScott Teel  * bit 0: 1 means performant mode, 0 means simple mode.
972c349775eSScott Teel  * bits 1-3 = block fetch table entry
973c349775eSScott Teel  * bits 4-6 = command type (== 0)
974c349775eSScott Teel  *
975c349775eSScott Teel  * ioaccel1 mode:
976c349775eSScott Teel  * bit 0 = "performant mode" bit.
977c349775eSScott Teel  * bits 1-3 = block fetch table entry
978c349775eSScott Teel  * bits 4-6 = command type (== 110)
979c349775eSScott Teel  * (command type is needed because ioaccel1 mode
980c349775eSScott Teel  * commands are submitted through the same register as normal
981c349775eSScott Teel  * mode commands, so this is how the controller knows whether
982c349775eSScott Teel  * the command is normal mode or ioaccel1 mode.)
983c349775eSScott Teel  *
984c349775eSScott Teel  * ioaccel2 mode:
985c349775eSScott Teel  * bit 0 = "performant mode" bit.
986c349775eSScott Teel  * bits 1-4 = block fetch table entry (note extra bit)
987c349775eSScott Teel  * bits 4-6 = not needed, because ioaccel2 mode has
988c349775eSScott Teel  * a separate special register for submitting commands.
989c349775eSScott Teel  */
990c349775eSScott Teel 
99125163bd5SWebb Scales /*
99225163bd5SWebb Scales  * set_performant_mode: Modify the tag for cciss performant
9933f5eac3aSStephen M. Cameron  * set bit 0 for pull model, bits 3-1 for block fetch
9943f5eac3aSStephen M. Cameron  * register number
9953f5eac3aSStephen M. Cameron  */
99625163bd5SWebb Scales #define DEFAULT_REPLY_QUEUE (-1)
99725163bd5SWebb Scales static void set_performant_mode(struct ctlr_info *h, struct CommandList *c,
99825163bd5SWebb Scales 					int reply_queue)
9993f5eac3aSStephen M. Cameron {
1000254f796bSMatt Gates 	if (likely(h->transMethod & CFGTBL_Trans_Performant)) {
10013f5eac3aSStephen M. Cameron 		c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
100225163bd5SWebb Scales 		if (unlikely(!h->msix_vector))
100325163bd5SWebb Scales 			return;
100425163bd5SWebb Scales 		if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
1005254f796bSMatt Gates 			c->Header.ReplyQueue =
1006804a5cb5SJohn Kacur 				raw_smp_processor_id() % h->nreply_queues;
100725163bd5SWebb Scales 		else
100825163bd5SWebb Scales 			c->Header.ReplyQueue = reply_queue % h->nreply_queues;
1009254f796bSMatt Gates 	}
10103f5eac3aSStephen M. Cameron }
10113f5eac3aSStephen M. Cameron 
1012c349775eSScott Teel static void set_ioaccel1_performant_mode(struct ctlr_info *h,
101325163bd5SWebb Scales 						struct CommandList *c,
101425163bd5SWebb Scales 						int reply_queue)
1015c349775eSScott Teel {
1016c349775eSScott Teel 	struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
1017c349775eSScott Teel 
101825163bd5SWebb Scales 	/*
101925163bd5SWebb Scales 	 * Tell the controller to post the reply to the queue for this
1020c349775eSScott Teel 	 * processor.  This seems to give the best I/O throughput.
1021c349775eSScott Teel 	 */
102225163bd5SWebb Scales 	if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
1023c349775eSScott Teel 		cp->ReplyQueue = smp_processor_id() % h->nreply_queues;
102425163bd5SWebb Scales 	else
102525163bd5SWebb Scales 		cp->ReplyQueue = reply_queue % h->nreply_queues;
102625163bd5SWebb Scales 	/*
102725163bd5SWebb Scales 	 * Set the bits in the address sent down to include:
1028c349775eSScott Teel 	 *  - performant mode bit (bit 0)
1029c349775eSScott Teel 	 *  - pull count (bits 1-3)
1030c349775eSScott Teel 	 *  - command type (bits 4-6)
1031c349775eSScott Teel 	 */
1032c349775eSScott Teel 	c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) |
1033c349775eSScott Teel 					IOACCEL1_BUSADDR_CMDTYPE;
1034c349775eSScott Teel }
1035c349775eSScott Teel 
10368be986ccSStephen Cameron static void set_ioaccel2_tmf_performant_mode(struct ctlr_info *h,
10378be986ccSStephen Cameron 						struct CommandList *c,
10388be986ccSStephen Cameron 						int reply_queue)
10398be986ccSStephen Cameron {
10408be986ccSStephen Cameron 	struct hpsa_tmf_struct *cp = (struct hpsa_tmf_struct *)
10418be986ccSStephen Cameron 		&h->ioaccel2_cmd_pool[c->cmdindex];
10428be986ccSStephen Cameron 
10438be986ccSStephen Cameron 	/* Tell the controller to post the reply to the queue for this
10448be986ccSStephen Cameron 	 * processor.  This seems to give the best I/O throughput.
10458be986ccSStephen Cameron 	 */
10468be986ccSStephen Cameron 	if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
10478be986ccSStephen Cameron 		cp->reply_queue = smp_processor_id() % h->nreply_queues;
10488be986ccSStephen Cameron 	else
10498be986ccSStephen Cameron 		cp->reply_queue = reply_queue % h->nreply_queues;
10508be986ccSStephen Cameron 	/* Set the bits in the address sent down to include:
10518be986ccSStephen Cameron 	 *  - performant mode bit not used in ioaccel mode 2
10528be986ccSStephen Cameron 	 *  - pull count (bits 0-3)
10538be986ccSStephen Cameron 	 *  - command type isn't needed for ioaccel2
10548be986ccSStephen Cameron 	 */
10558be986ccSStephen Cameron 	c->busaddr |= h->ioaccel2_blockFetchTable[0];
10568be986ccSStephen Cameron }
10578be986ccSStephen Cameron 
1058c349775eSScott Teel static void set_ioaccel2_performant_mode(struct ctlr_info *h,
105925163bd5SWebb Scales 						struct CommandList *c,
106025163bd5SWebb Scales 						int reply_queue)
1061c349775eSScott Teel {
1062c349775eSScott Teel 	struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
1063c349775eSScott Teel 
106425163bd5SWebb Scales 	/*
106525163bd5SWebb Scales 	 * Tell the controller to post the reply to the queue for this
1066c349775eSScott Teel 	 * processor.  This seems to give the best I/O throughput.
1067c349775eSScott Teel 	 */
106825163bd5SWebb Scales 	if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
1069c349775eSScott Teel 		cp->reply_queue = smp_processor_id() % h->nreply_queues;
107025163bd5SWebb Scales 	else
107125163bd5SWebb Scales 		cp->reply_queue = reply_queue % h->nreply_queues;
107225163bd5SWebb Scales 	/*
107325163bd5SWebb Scales 	 * Set the bits in the address sent down to include:
1074c349775eSScott Teel 	 *  - performant mode bit not used in ioaccel mode 2
1075c349775eSScott Teel 	 *  - pull count (bits 0-3)
1076c349775eSScott Teel 	 *  - command type isn't needed for ioaccel2
1077c349775eSScott Teel 	 */
1078c349775eSScott Teel 	c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]);
1079c349775eSScott Teel }
1080c349775eSScott Teel 
1081e85c5974SStephen M. Cameron static int is_firmware_flash_cmd(u8 *cdb)
1082e85c5974SStephen M. Cameron {
1083e85c5974SStephen M. Cameron 	return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE;
1084e85c5974SStephen M. Cameron }
1085e85c5974SStephen M. Cameron 
1086e85c5974SStephen M. Cameron /*
1087e85c5974SStephen M. Cameron  * During firmware flash, the heartbeat register may not update as frequently
1088e85c5974SStephen M. Cameron  * as it should.  So we dial down lockup detection during firmware flash. and
1089e85c5974SStephen M. Cameron  * dial it back up when firmware flash completes.
1090e85c5974SStephen M. Cameron  */
1091e85c5974SStephen M. Cameron #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ)
1092e85c5974SStephen M. Cameron #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ)
1093e85c5974SStephen M. Cameron static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h,
1094e85c5974SStephen M. Cameron 		struct CommandList *c)
1095e85c5974SStephen M. Cameron {
1096e85c5974SStephen M. Cameron 	if (!is_firmware_flash_cmd(c->Request.CDB))
1097e85c5974SStephen M. Cameron 		return;
1098e85c5974SStephen M. Cameron 	atomic_inc(&h->firmware_flash_in_progress);
1099e85c5974SStephen M. Cameron 	h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH;
1100e85c5974SStephen M. Cameron }
1101e85c5974SStephen M. Cameron 
1102e85c5974SStephen M. Cameron static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h,
1103e85c5974SStephen M. Cameron 		struct CommandList *c)
1104e85c5974SStephen M. Cameron {
1105e85c5974SStephen M. Cameron 	if (is_firmware_flash_cmd(c->Request.CDB) &&
1106e85c5974SStephen M. Cameron 		atomic_dec_and_test(&h->firmware_flash_in_progress))
1107e85c5974SStephen M. Cameron 		h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
1108e85c5974SStephen M. Cameron }
1109e85c5974SStephen M. Cameron 
111025163bd5SWebb Scales static void __enqueue_cmd_and_start_io(struct ctlr_info *h,
111125163bd5SWebb Scales 	struct CommandList *c, int reply_queue)
11123f5eac3aSStephen M. Cameron {
1113c05e8866SStephen Cameron 	dial_down_lockup_detection_during_fw_flash(h, c);
1114c05e8866SStephen Cameron 	atomic_inc(&h->commands_outstanding);
1115c349775eSScott Teel 	switch (c->cmd_type) {
1116c349775eSScott Teel 	case CMD_IOACCEL1:
111725163bd5SWebb Scales 		set_ioaccel1_performant_mode(h, c, reply_queue);
1118c05e8866SStephen Cameron 		writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);
1119c349775eSScott Teel 		break;
1120c349775eSScott Teel 	case CMD_IOACCEL2:
112125163bd5SWebb Scales 		set_ioaccel2_performant_mode(h, c, reply_queue);
1122c05e8866SStephen Cameron 		writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
1123c349775eSScott Teel 		break;
11248be986ccSStephen Cameron 	case IOACCEL2_TMF:
11258be986ccSStephen Cameron 		set_ioaccel2_tmf_performant_mode(h, c, reply_queue);
11268be986ccSStephen Cameron 		writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
11278be986ccSStephen Cameron 		break;
1128c349775eSScott Teel 	default:
112925163bd5SWebb Scales 		set_performant_mode(h, c, reply_queue);
1130f2405db8SDon Brace 		h->access.submit_command(h, c);
11313f5eac3aSStephen M. Cameron 	}
1132c05e8866SStephen Cameron }
11333f5eac3aSStephen M. Cameron 
1134a58e7e53SWebb Scales static void enqueue_cmd_and_start_io(struct ctlr_info *h, struct CommandList *c)
113525163bd5SWebb Scales {
1136d604f533SWebb Scales 	if (unlikely(hpsa_is_pending_event(c)))
1137a58e7e53SWebb Scales 		return finish_cmd(c);
1138a58e7e53SWebb Scales 
113925163bd5SWebb Scales 	__enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE);
114025163bd5SWebb Scales }
114125163bd5SWebb Scales 
11423f5eac3aSStephen M. Cameron static inline int is_hba_lunid(unsigned char scsi3addr[])
11433f5eac3aSStephen M. Cameron {
11443f5eac3aSStephen M. Cameron 	return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
11453f5eac3aSStephen M. Cameron }
11463f5eac3aSStephen M. Cameron 
11473f5eac3aSStephen M. Cameron static inline int is_scsi_rev_5(struct ctlr_info *h)
11483f5eac3aSStephen M. Cameron {
11493f5eac3aSStephen M. Cameron 	if (!h->hba_inquiry_data)
11503f5eac3aSStephen M. Cameron 		return 0;
11513f5eac3aSStephen M. Cameron 	if ((h->hba_inquiry_data[2] & 0x07) == 5)
11523f5eac3aSStephen M. Cameron 		return 1;
11533f5eac3aSStephen M. Cameron 	return 0;
11543f5eac3aSStephen M. Cameron }
11553f5eac3aSStephen M. Cameron 
1156edd16368SStephen M. Cameron static int hpsa_find_target_lun(struct ctlr_info *h,
1157edd16368SStephen M. Cameron 	unsigned char scsi3addr[], int bus, int *target, int *lun)
1158edd16368SStephen M. Cameron {
1159edd16368SStephen M. Cameron 	/* finds an unused bus, target, lun for a new physical device
1160edd16368SStephen M. Cameron 	 * assumes h->devlock is held
1161edd16368SStephen M. Cameron 	 */
1162edd16368SStephen M. Cameron 	int i, found = 0;
1163cfe5badcSScott Teel 	DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
1164edd16368SStephen M. Cameron 
1165263d9401SAkinobu Mita 	bitmap_zero(lun_taken, HPSA_MAX_DEVICES);
1166edd16368SStephen M. Cameron 
1167edd16368SStephen M. Cameron 	for (i = 0; i < h->ndevices; i++) {
1168edd16368SStephen M. Cameron 		if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
1169263d9401SAkinobu Mita 			__set_bit(h->dev[i]->target, lun_taken);
1170edd16368SStephen M. Cameron 	}
1171edd16368SStephen M. Cameron 
1172263d9401SAkinobu Mita 	i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES);
1173263d9401SAkinobu Mita 	if (i < HPSA_MAX_DEVICES) {
1174edd16368SStephen M. Cameron 		/* *bus = 1; */
1175edd16368SStephen M. Cameron 		*target = i;
1176edd16368SStephen M. Cameron 		*lun = 0;
1177edd16368SStephen M. Cameron 		found = 1;
1178edd16368SStephen M. Cameron 	}
1179edd16368SStephen M. Cameron 	return !found;
1180edd16368SStephen M. Cameron }
1181edd16368SStephen M. Cameron 
11821d33d85dSDon Brace static void hpsa_show_dev_msg(const char *level, struct ctlr_info *h,
11830d96ef5fSWebb Scales 	struct hpsa_scsi_dev_t *dev, char *description)
11840d96ef5fSWebb Scales {
11857c59a0d4SDon Brace #define LABEL_SIZE 25
11867c59a0d4SDon Brace 	char label[LABEL_SIZE];
11877c59a0d4SDon Brace 
11889975ec9dSDon Brace 	if (h == NULL || h->pdev == NULL || h->scsi_host == NULL)
11899975ec9dSDon Brace 		return;
11909975ec9dSDon Brace 
11917c59a0d4SDon Brace 	switch (dev->devtype) {
11927c59a0d4SDon Brace 	case TYPE_RAID:
11937c59a0d4SDon Brace 		snprintf(label, LABEL_SIZE, "controller");
11947c59a0d4SDon Brace 		break;
11957c59a0d4SDon Brace 	case TYPE_ENCLOSURE:
11967c59a0d4SDon Brace 		snprintf(label, LABEL_SIZE, "enclosure");
11977c59a0d4SDon Brace 		break;
11987c59a0d4SDon Brace 	case TYPE_DISK:
1199af15ed36SDon Brace 	case TYPE_ZBC:
12007c59a0d4SDon Brace 		if (dev->external)
12017c59a0d4SDon Brace 			snprintf(label, LABEL_SIZE, "external");
12027c59a0d4SDon Brace 		else if (!is_logical_dev_addr_mode(dev->scsi3addr))
12037c59a0d4SDon Brace 			snprintf(label, LABEL_SIZE, "%s",
12047c59a0d4SDon Brace 				raid_label[PHYSICAL_DRIVE]);
12057c59a0d4SDon Brace 		else
12067c59a0d4SDon Brace 			snprintf(label, LABEL_SIZE, "RAID-%s",
12077c59a0d4SDon Brace 				dev->raid_level > RAID_UNKNOWN ? "?" :
12087c59a0d4SDon Brace 				raid_label[dev->raid_level]);
12097c59a0d4SDon Brace 		break;
12107c59a0d4SDon Brace 	case TYPE_ROM:
12117c59a0d4SDon Brace 		snprintf(label, LABEL_SIZE, "rom");
12127c59a0d4SDon Brace 		break;
12137c59a0d4SDon Brace 	case TYPE_TAPE:
12147c59a0d4SDon Brace 		snprintf(label, LABEL_SIZE, "tape");
12157c59a0d4SDon Brace 		break;
12167c59a0d4SDon Brace 	case TYPE_MEDIUM_CHANGER:
12177c59a0d4SDon Brace 		snprintf(label, LABEL_SIZE, "changer");
12187c59a0d4SDon Brace 		break;
12197c59a0d4SDon Brace 	default:
12207c59a0d4SDon Brace 		snprintf(label, LABEL_SIZE, "UNKNOWN");
12217c59a0d4SDon Brace 		break;
12227c59a0d4SDon Brace 	}
12237c59a0d4SDon Brace 
12240d96ef5fSWebb Scales 	dev_printk(level, &h->pdev->dev,
12257c59a0d4SDon Brace 			"scsi %d:%d:%d:%d: %s %s %.8s %.16s %s SSDSmartPathCap%c En%c Exp=%d\n",
12260d96ef5fSWebb Scales 			h->scsi_host->host_no, dev->bus, dev->target, dev->lun,
12270d96ef5fSWebb Scales 			description,
12280d96ef5fSWebb Scales 			scsi_device_type(dev->devtype),
12290d96ef5fSWebb Scales 			dev->vendor,
12300d96ef5fSWebb Scales 			dev->model,
12317c59a0d4SDon Brace 			label,
12320d96ef5fSWebb Scales 			dev->offload_config ? '+' : '-',
12330d96ef5fSWebb Scales 			dev->offload_enabled ? '+' : '-',
12342a168208SKevin Barnett 			dev->expose_device);
12350d96ef5fSWebb Scales }
12360d96ef5fSWebb Scales 
1237edd16368SStephen M. Cameron /* Add an entry into h->dev[] array. */
12388aa60681SDon Brace static int hpsa_scsi_add_entry(struct ctlr_info *h,
1239edd16368SStephen M. Cameron 		struct hpsa_scsi_dev_t *device,
1240edd16368SStephen M. Cameron 		struct hpsa_scsi_dev_t *added[], int *nadded)
1241edd16368SStephen M. Cameron {
1242edd16368SStephen M. Cameron 	/* assumes h->devlock is held */
1243edd16368SStephen M. Cameron 	int n = h->ndevices;
1244edd16368SStephen M. Cameron 	int i;
1245edd16368SStephen M. Cameron 	unsigned char addr1[8], addr2[8];
1246edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *sd;
1247edd16368SStephen M. Cameron 
1248cfe5badcSScott Teel 	if (n >= HPSA_MAX_DEVICES) {
1249edd16368SStephen M. Cameron 		dev_err(&h->pdev->dev, "too many devices, some will be "
1250edd16368SStephen M. Cameron 			"inaccessible.\n");
1251edd16368SStephen M. Cameron 		return -1;
1252edd16368SStephen M. Cameron 	}
1253edd16368SStephen M. Cameron 
1254edd16368SStephen M. Cameron 	/* physical devices do not have lun or target assigned until now. */
1255edd16368SStephen M. Cameron 	if (device->lun != -1)
1256edd16368SStephen M. Cameron 		/* Logical device, lun is already assigned. */
1257edd16368SStephen M. Cameron 		goto lun_assigned;
1258edd16368SStephen M. Cameron 
1259edd16368SStephen M. Cameron 	/* If this device a non-zero lun of a multi-lun device
1260edd16368SStephen M. Cameron 	 * byte 4 of the 8-byte LUN addr will contain the logical
12612b08b3e9SDon Brace 	 * unit no, zero otherwise.
1262edd16368SStephen M. Cameron 	 */
1263edd16368SStephen M. Cameron 	if (device->scsi3addr[4] == 0) {
1264edd16368SStephen M. Cameron 		/* This is not a non-zero lun of a multi-lun device */
1265edd16368SStephen M. Cameron 		if (hpsa_find_target_lun(h, device->scsi3addr,
1266edd16368SStephen M. Cameron 			device->bus, &device->target, &device->lun) != 0)
1267edd16368SStephen M. Cameron 			return -1;
1268edd16368SStephen M. Cameron 		goto lun_assigned;
1269edd16368SStephen M. Cameron 	}
1270edd16368SStephen M. Cameron 
1271edd16368SStephen M. Cameron 	/* This is a non-zero lun of a multi-lun device.
1272edd16368SStephen M. Cameron 	 * Search through our list and find the device which
12739a4178b7Sshane.seymour 	 * has the same 8 byte LUN address, excepting byte 4 and 5.
1274edd16368SStephen M. Cameron 	 * Assign the same bus and target for this new LUN.
1275edd16368SStephen M. Cameron 	 * Use the logical unit number from the firmware.
1276edd16368SStephen M. Cameron 	 */
1277edd16368SStephen M. Cameron 	memcpy(addr1, device->scsi3addr, 8);
1278edd16368SStephen M. Cameron 	addr1[4] = 0;
12799a4178b7Sshane.seymour 	addr1[5] = 0;
1280edd16368SStephen M. Cameron 	for (i = 0; i < n; i++) {
1281edd16368SStephen M. Cameron 		sd = h->dev[i];
1282edd16368SStephen M. Cameron 		memcpy(addr2, sd->scsi3addr, 8);
1283edd16368SStephen M. Cameron 		addr2[4] = 0;
12849a4178b7Sshane.seymour 		addr2[5] = 0;
12859a4178b7Sshane.seymour 		/* differ only in byte 4 and 5? */
1286edd16368SStephen M. Cameron 		if (memcmp(addr1, addr2, 8) == 0) {
1287edd16368SStephen M. Cameron 			device->bus = sd->bus;
1288edd16368SStephen M. Cameron 			device->target = sd->target;
1289edd16368SStephen M. Cameron 			device->lun = device->scsi3addr[4];
1290edd16368SStephen M. Cameron 			break;
1291edd16368SStephen M. Cameron 		}
1292edd16368SStephen M. Cameron 	}
1293edd16368SStephen M. Cameron 	if (device->lun == -1) {
1294edd16368SStephen M. Cameron 		dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
1295edd16368SStephen M. Cameron 			" suspect firmware bug or unsupported hardware "
1296edd16368SStephen M. Cameron 			"configuration.\n");
1297edd16368SStephen M. Cameron 			return -1;
1298edd16368SStephen M. Cameron 	}
1299edd16368SStephen M. Cameron 
1300edd16368SStephen M. Cameron lun_assigned:
1301edd16368SStephen M. Cameron 
1302edd16368SStephen M. Cameron 	h->dev[n] = device;
1303edd16368SStephen M. Cameron 	h->ndevices++;
1304edd16368SStephen M. Cameron 	added[*nadded] = device;
1305edd16368SStephen M. Cameron 	(*nadded)++;
13060d96ef5fSWebb Scales 	hpsa_show_dev_msg(KERN_INFO, h, device,
13072a168208SKevin Barnett 		device->expose_device ? "added" : "masked");
1308a473d86cSRobert Elliott 	device->offload_to_be_enabled = device->offload_enabled;
1309a473d86cSRobert Elliott 	device->offload_enabled = 0;
1310edd16368SStephen M. Cameron 	return 0;
1311edd16368SStephen M. Cameron }
1312edd16368SStephen M. Cameron 
1313bd9244f7SScott Teel /* Update an entry in h->dev[] array. */
13148aa60681SDon Brace static void hpsa_scsi_update_entry(struct ctlr_info *h,
1315bd9244f7SScott Teel 	int entry, struct hpsa_scsi_dev_t *new_entry)
1316bd9244f7SScott Teel {
1317a473d86cSRobert Elliott 	int offload_enabled;
1318bd9244f7SScott Teel 	/* assumes h->devlock is held */
1319bd9244f7SScott Teel 	BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1320bd9244f7SScott Teel 
1321bd9244f7SScott Teel 	/* Raid level changed. */
1322bd9244f7SScott Teel 	h->dev[entry]->raid_level = new_entry->raid_level;
1323250fb125SStephen M. Cameron 
132403383736SDon Brace 	/* Raid offload parameters changed.  Careful about the ordering. */
132503383736SDon Brace 	if (new_entry->offload_config && new_entry->offload_enabled) {
132603383736SDon Brace 		/*
132703383736SDon Brace 		 * if drive is newly offload_enabled, we want to copy the
132803383736SDon Brace 		 * raid map data first.  If previously offload_enabled and
132903383736SDon Brace 		 * offload_config were set, raid map data had better be
133003383736SDon Brace 		 * the same as it was before.  if raid map data is changed
133103383736SDon Brace 		 * then it had better be the case that
133203383736SDon Brace 		 * h->dev[entry]->offload_enabled is currently 0.
133303383736SDon Brace 		 */
13349fb0de2dSStephen M. Cameron 		h->dev[entry]->raid_map = new_entry->raid_map;
133503383736SDon Brace 		h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
133603383736SDon Brace 	}
1337a3144e0bSJoe Handzik 	if (new_entry->hba_ioaccel_enabled) {
1338a3144e0bSJoe Handzik 		h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1339a3144e0bSJoe Handzik 		wmb(); /* set ioaccel_handle *before* hba_ioaccel_enabled */
1340a3144e0bSJoe Handzik 	}
1341a3144e0bSJoe Handzik 	h->dev[entry]->hba_ioaccel_enabled = new_entry->hba_ioaccel_enabled;
134203383736SDon Brace 	h->dev[entry]->offload_config = new_entry->offload_config;
134303383736SDon Brace 	h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror;
134403383736SDon Brace 	h->dev[entry]->queue_depth = new_entry->queue_depth;
1345250fb125SStephen M. Cameron 
134641ce4c35SStephen Cameron 	/*
134741ce4c35SStephen Cameron 	 * We can turn off ioaccel offload now, but need to delay turning
134841ce4c35SStephen Cameron 	 * it on until we can update h->dev[entry]->phys_disk[], but we
134941ce4c35SStephen Cameron 	 * can't do that until all the devices are updated.
135041ce4c35SStephen Cameron 	 */
135141ce4c35SStephen Cameron 	h->dev[entry]->offload_to_be_enabled = new_entry->offload_enabled;
135241ce4c35SStephen Cameron 	if (!new_entry->offload_enabled)
135341ce4c35SStephen Cameron 		h->dev[entry]->offload_enabled = 0;
135441ce4c35SStephen Cameron 
1355a473d86cSRobert Elliott 	offload_enabled = h->dev[entry]->offload_enabled;
1356a473d86cSRobert Elliott 	h->dev[entry]->offload_enabled = h->dev[entry]->offload_to_be_enabled;
13570d96ef5fSWebb Scales 	hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated");
1358a473d86cSRobert Elliott 	h->dev[entry]->offload_enabled = offload_enabled;
1359bd9244f7SScott Teel }
1360bd9244f7SScott Teel 
13612a8ccf31SStephen M. Cameron /* Replace an entry from h->dev[] array. */
13628aa60681SDon Brace static void hpsa_scsi_replace_entry(struct ctlr_info *h,
13632a8ccf31SStephen M. Cameron 	int entry, struct hpsa_scsi_dev_t *new_entry,
13642a8ccf31SStephen M. Cameron 	struct hpsa_scsi_dev_t *added[], int *nadded,
13652a8ccf31SStephen M. Cameron 	struct hpsa_scsi_dev_t *removed[], int *nremoved)
13662a8ccf31SStephen M. Cameron {
13672a8ccf31SStephen M. Cameron 	/* assumes h->devlock is held */
1368cfe5badcSScott Teel 	BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
13692a8ccf31SStephen M. Cameron 	removed[*nremoved] = h->dev[entry];
13702a8ccf31SStephen M. Cameron 	(*nremoved)++;
137101350d05SStephen M. Cameron 
137201350d05SStephen M. Cameron 	/*
137301350d05SStephen M. Cameron 	 * New physical devices won't have target/lun assigned yet
137401350d05SStephen M. Cameron 	 * so we need to preserve the values in the slot we are replacing.
137501350d05SStephen M. Cameron 	 */
137601350d05SStephen M. Cameron 	if (new_entry->target == -1) {
137701350d05SStephen M. Cameron 		new_entry->target = h->dev[entry]->target;
137801350d05SStephen M. Cameron 		new_entry->lun = h->dev[entry]->lun;
137901350d05SStephen M. Cameron 	}
138001350d05SStephen M. Cameron 
13812a8ccf31SStephen M. Cameron 	h->dev[entry] = new_entry;
13822a8ccf31SStephen M. Cameron 	added[*nadded] = new_entry;
13832a8ccf31SStephen M. Cameron 	(*nadded)++;
13840d96ef5fSWebb Scales 	hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced");
1385a473d86cSRobert Elliott 	new_entry->offload_to_be_enabled = new_entry->offload_enabled;
1386a473d86cSRobert Elliott 	new_entry->offload_enabled = 0;
13872a8ccf31SStephen M. Cameron }
13882a8ccf31SStephen M. Cameron 
1389edd16368SStephen M. Cameron /* Remove an entry from h->dev[] array. */
13908aa60681SDon Brace static void hpsa_scsi_remove_entry(struct ctlr_info *h, int entry,
1391edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *removed[], int *nremoved)
1392edd16368SStephen M. Cameron {
1393edd16368SStephen M. Cameron 	/* assumes h->devlock is held */
1394edd16368SStephen M. Cameron 	int i;
1395edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *sd;
1396edd16368SStephen M. Cameron 
1397cfe5badcSScott Teel 	BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1398edd16368SStephen M. Cameron 
1399edd16368SStephen M. Cameron 	sd = h->dev[entry];
1400edd16368SStephen M. Cameron 	removed[*nremoved] = h->dev[entry];
1401edd16368SStephen M. Cameron 	(*nremoved)++;
1402edd16368SStephen M. Cameron 
1403edd16368SStephen M. Cameron 	for (i = entry; i < h->ndevices-1; i++)
1404edd16368SStephen M. Cameron 		h->dev[i] = h->dev[i+1];
1405edd16368SStephen M. Cameron 	h->ndevices--;
14060d96ef5fSWebb Scales 	hpsa_show_dev_msg(KERN_INFO, h, sd, "removed");
1407edd16368SStephen M. Cameron }
1408edd16368SStephen M. Cameron 
1409edd16368SStephen M. Cameron #define SCSI3ADDR_EQ(a, b) ( \
1410edd16368SStephen M. Cameron 	(a)[7] == (b)[7] && \
1411edd16368SStephen M. Cameron 	(a)[6] == (b)[6] && \
1412edd16368SStephen M. Cameron 	(a)[5] == (b)[5] && \
1413edd16368SStephen M. Cameron 	(a)[4] == (b)[4] && \
1414edd16368SStephen M. Cameron 	(a)[3] == (b)[3] && \
1415edd16368SStephen M. Cameron 	(a)[2] == (b)[2] && \
1416edd16368SStephen M. Cameron 	(a)[1] == (b)[1] && \
1417edd16368SStephen M. Cameron 	(a)[0] == (b)[0])
1418edd16368SStephen M. Cameron 
1419edd16368SStephen M. Cameron static void fixup_botched_add(struct ctlr_info *h,
1420edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *added)
1421edd16368SStephen M. Cameron {
1422edd16368SStephen M. Cameron 	/* called when scsi_add_device fails in order to re-adjust
1423edd16368SStephen M. Cameron 	 * h->dev[] to match the mid layer's view.
1424edd16368SStephen M. Cameron 	 */
1425edd16368SStephen M. Cameron 	unsigned long flags;
1426edd16368SStephen M. Cameron 	int i, j;
1427edd16368SStephen M. Cameron 
1428edd16368SStephen M. Cameron 	spin_lock_irqsave(&h->lock, flags);
1429edd16368SStephen M. Cameron 	for (i = 0; i < h->ndevices; i++) {
1430edd16368SStephen M. Cameron 		if (h->dev[i] == added) {
1431edd16368SStephen M. Cameron 			for (j = i; j < h->ndevices-1; j++)
1432edd16368SStephen M. Cameron 				h->dev[j] = h->dev[j+1];
1433edd16368SStephen M. Cameron 			h->ndevices--;
1434edd16368SStephen M. Cameron 			break;
1435edd16368SStephen M. Cameron 		}
1436edd16368SStephen M. Cameron 	}
1437edd16368SStephen M. Cameron 	spin_unlock_irqrestore(&h->lock, flags);
1438edd16368SStephen M. Cameron 	kfree(added);
1439edd16368SStephen M. Cameron }
1440edd16368SStephen M. Cameron 
1441edd16368SStephen M. Cameron static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
1442edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *dev2)
1443edd16368SStephen M. Cameron {
1444edd16368SStephen M. Cameron 	/* we compare everything except lun and target as these
1445edd16368SStephen M. Cameron 	 * are not yet assigned.  Compare parts likely
1446edd16368SStephen M. Cameron 	 * to differ first
1447edd16368SStephen M. Cameron 	 */
1448edd16368SStephen M. Cameron 	if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
1449edd16368SStephen M. Cameron 		sizeof(dev1->scsi3addr)) != 0)
1450edd16368SStephen M. Cameron 		return 0;
1451edd16368SStephen M. Cameron 	if (memcmp(dev1->device_id, dev2->device_id,
1452edd16368SStephen M. Cameron 		sizeof(dev1->device_id)) != 0)
1453edd16368SStephen M. Cameron 		return 0;
1454edd16368SStephen M. Cameron 	if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
1455edd16368SStephen M. Cameron 		return 0;
1456edd16368SStephen M. Cameron 	if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
1457edd16368SStephen M. Cameron 		return 0;
1458edd16368SStephen M. Cameron 	if (dev1->devtype != dev2->devtype)
1459edd16368SStephen M. Cameron 		return 0;
1460edd16368SStephen M. Cameron 	if (dev1->bus != dev2->bus)
1461edd16368SStephen M. Cameron 		return 0;
1462edd16368SStephen M. Cameron 	return 1;
1463edd16368SStephen M. Cameron }
1464edd16368SStephen M. Cameron 
1465bd9244f7SScott Teel static inline int device_updated(struct hpsa_scsi_dev_t *dev1,
1466bd9244f7SScott Teel 	struct hpsa_scsi_dev_t *dev2)
1467bd9244f7SScott Teel {
1468bd9244f7SScott Teel 	/* Device attributes that can change, but don't mean
1469bd9244f7SScott Teel 	 * that the device is a different device, nor that the OS
1470bd9244f7SScott Teel 	 * needs to be told anything about the change.
1471bd9244f7SScott Teel 	 */
1472bd9244f7SScott Teel 	if (dev1->raid_level != dev2->raid_level)
1473bd9244f7SScott Teel 		return 1;
1474250fb125SStephen M. Cameron 	if (dev1->offload_config != dev2->offload_config)
1475250fb125SStephen M. Cameron 		return 1;
1476250fb125SStephen M. Cameron 	if (dev1->offload_enabled != dev2->offload_enabled)
1477250fb125SStephen M. Cameron 		return 1;
147893849508SDon Brace 	if (!is_logical_dev_addr_mode(dev1->scsi3addr))
147903383736SDon Brace 		if (dev1->queue_depth != dev2->queue_depth)
148003383736SDon Brace 			return 1;
1481bd9244f7SScott Teel 	return 0;
1482bd9244f7SScott Teel }
1483bd9244f7SScott Teel 
1484edd16368SStephen M. Cameron /* Find needle in haystack.  If exact match found, return DEVICE_SAME,
1485edd16368SStephen M. Cameron  * and return needle location in *index.  If scsi3addr matches, but not
1486edd16368SStephen M. Cameron  * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
1487bd9244f7SScott Teel  * location in *index.
1488bd9244f7SScott Teel  * In the case of a minor device attribute change, such as RAID level, just
1489bd9244f7SScott Teel  * return DEVICE_UPDATED, along with the updated device's location in index.
1490bd9244f7SScott Teel  * If needle not found, return DEVICE_NOT_FOUND.
1491edd16368SStephen M. Cameron  */
1492edd16368SStephen M. Cameron static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
1493edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *haystack[], int haystack_size,
1494edd16368SStephen M. Cameron 	int *index)
1495edd16368SStephen M. Cameron {
1496edd16368SStephen M. Cameron 	int i;
1497edd16368SStephen M. Cameron #define DEVICE_NOT_FOUND 0
1498edd16368SStephen M. Cameron #define DEVICE_CHANGED 1
1499edd16368SStephen M. Cameron #define DEVICE_SAME 2
1500bd9244f7SScott Teel #define DEVICE_UPDATED 3
15011d33d85dSDon Brace 	if (needle == NULL)
15021d33d85dSDon Brace 		return DEVICE_NOT_FOUND;
15031d33d85dSDon Brace 
1504edd16368SStephen M. Cameron 	for (i = 0; i < haystack_size; i++) {
150523231048SStephen M. Cameron 		if (haystack[i] == NULL) /* previously removed. */
150623231048SStephen M. Cameron 			continue;
1507edd16368SStephen M. Cameron 		if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
1508edd16368SStephen M. Cameron 			*index = i;
1509bd9244f7SScott Teel 			if (device_is_the_same(needle, haystack[i])) {
1510bd9244f7SScott Teel 				if (device_updated(needle, haystack[i]))
1511bd9244f7SScott Teel 					return DEVICE_UPDATED;
1512edd16368SStephen M. Cameron 				return DEVICE_SAME;
1513bd9244f7SScott Teel 			} else {
15149846590eSStephen M. Cameron 				/* Keep offline devices offline */
15159846590eSStephen M. Cameron 				if (needle->volume_offline)
15169846590eSStephen M. Cameron 					return DEVICE_NOT_FOUND;
1517edd16368SStephen M. Cameron 				return DEVICE_CHANGED;
1518edd16368SStephen M. Cameron 			}
1519edd16368SStephen M. Cameron 		}
1520bd9244f7SScott Teel 	}
1521edd16368SStephen M. Cameron 	*index = -1;
1522edd16368SStephen M. Cameron 	return DEVICE_NOT_FOUND;
1523edd16368SStephen M. Cameron }
1524edd16368SStephen M. Cameron 
15259846590eSStephen M. Cameron static void hpsa_monitor_offline_device(struct ctlr_info *h,
15269846590eSStephen M. Cameron 					unsigned char scsi3addr[])
15279846590eSStephen M. Cameron {
15289846590eSStephen M. Cameron 	struct offline_device_entry *device;
15299846590eSStephen M. Cameron 	unsigned long flags;
15309846590eSStephen M. Cameron 
15319846590eSStephen M. Cameron 	/* Check to see if device is already on the list */
15329846590eSStephen M. Cameron 	spin_lock_irqsave(&h->offline_device_lock, flags);
15339846590eSStephen M. Cameron 	list_for_each_entry(device, &h->offline_device_list, offline_list) {
15349846590eSStephen M. Cameron 		if (memcmp(device->scsi3addr, scsi3addr,
15359846590eSStephen M. Cameron 			sizeof(device->scsi3addr)) == 0) {
15369846590eSStephen M. Cameron 			spin_unlock_irqrestore(&h->offline_device_lock, flags);
15379846590eSStephen M. Cameron 			return;
15389846590eSStephen M. Cameron 		}
15399846590eSStephen M. Cameron 	}
15409846590eSStephen M. Cameron 	spin_unlock_irqrestore(&h->offline_device_lock, flags);
15419846590eSStephen M. Cameron 
15429846590eSStephen M. Cameron 	/* Device is not on the list, add it. */
15439846590eSStephen M. Cameron 	device = kmalloc(sizeof(*device), GFP_KERNEL);
15449846590eSStephen M. Cameron 	if (!device) {
15459846590eSStephen M. Cameron 		dev_warn(&h->pdev->dev, "out of memory in %s\n", __func__);
15469846590eSStephen M. Cameron 		return;
15479846590eSStephen M. Cameron 	}
15489846590eSStephen M. Cameron 	memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr));
15499846590eSStephen M. Cameron 	spin_lock_irqsave(&h->offline_device_lock, flags);
15509846590eSStephen M. Cameron 	list_add_tail(&device->offline_list, &h->offline_device_list);
15519846590eSStephen M. Cameron 	spin_unlock_irqrestore(&h->offline_device_lock, flags);
15529846590eSStephen M. Cameron }
15539846590eSStephen M. Cameron 
15549846590eSStephen M. Cameron /* Print a message explaining various offline volume states */
15559846590eSStephen M. Cameron static void hpsa_show_volume_status(struct ctlr_info *h,
15569846590eSStephen M. Cameron 	struct hpsa_scsi_dev_t *sd)
15579846590eSStephen M. Cameron {
15589846590eSStephen M. Cameron 	if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED)
15599846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
15609846590eSStephen M. Cameron 			"C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n",
15619846590eSStephen M. Cameron 			h->scsi_host->host_no,
15629846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
15639846590eSStephen M. Cameron 	switch (sd->volume_offline) {
15649846590eSStephen M. Cameron 	case HPSA_LV_OK:
15659846590eSStephen M. Cameron 		break;
15669846590eSStephen M. Cameron 	case HPSA_LV_UNDERGOING_ERASE:
15679846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
15689846590eSStephen M. Cameron 			"C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n",
15699846590eSStephen M. Cameron 			h->scsi_host->host_no,
15709846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
15719846590eSStephen M. Cameron 		break;
15725ca01204SScott Benesh 	case HPSA_LV_NOT_AVAILABLE:
15735ca01204SScott Benesh 		dev_info(&h->pdev->dev,
15745ca01204SScott Benesh 			"C%d:B%d:T%d:L%d Volume is waiting for transforming volume.\n",
15755ca01204SScott Benesh 			h->scsi_host->host_no,
15765ca01204SScott Benesh 			sd->bus, sd->target, sd->lun);
15775ca01204SScott Benesh 		break;
15789846590eSStephen M. Cameron 	case HPSA_LV_UNDERGOING_RPI:
15799846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
15805ca01204SScott Benesh 			"C%d:B%d:T%d:L%d Volume is undergoing rapid parity init.\n",
15819846590eSStephen M. Cameron 			h->scsi_host->host_no,
15829846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
15839846590eSStephen M. Cameron 		break;
15849846590eSStephen M. Cameron 	case HPSA_LV_PENDING_RPI:
15859846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
15869846590eSStephen M. Cameron 			"C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n",
15879846590eSStephen M. Cameron 			h->scsi_host->host_no,
15889846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
15899846590eSStephen M. Cameron 		break;
15909846590eSStephen M. Cameron 	case HPSA_LV_ENCRYPTED_NO_KEY:
15919846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
15929846590eSStephen M. Cameron 			"C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n",
15939846590eSStephen M. Cameron 			h->scsi_host->host_no,
15949846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
15959846590eSStephen M. Cameron 		break;
15969846590eSStephen M. Cameron 	case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
15979846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
15989846590eSStephen M. Cameron 			"C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n",
15999846590eSStephen M. Cameron 			h->scsi_host->host_no,
16009846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
16019846590eSStephen M. Cameron 		break;
16029846590eSStephen M. Cameron 	case HPSA_LV_UNDERGOING_ENCRYPTION:
16039846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
16049846590eSStephen M. Cameron 			"C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n",
16059846590eSStephen M. Cameron 			h->scsi_host->host_no,
16069846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
16079846590eSStephen M. Cameron 		break;
16089846590eSStephen M. Cameron 	case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
16099846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
16109846590eSStephen M. Cameron 			"C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n",
16119846590eSStephen M. Cameron 			h->scsi_host->host_no,
16129846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
16139846590eSStephen M. Cameron 		break;
16149846590eSStephen M. Cameron 	case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
16159846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
16169846590eSStephen M. Cameron 			"C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n",
16179846590eSStephen M. Cameron 			h->scsi_host->host_no,
16189846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
16199846590eSStephen M. Cameron 		break;
16209846590eSStephen M. Cameron 	case HPSA_LV_PENDING_ENCRYPTION:
16219846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
16229846590eSStephen M. Cameron 			"C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n",
16239846590eSStephen M. Cameron 			h->scsi_host->host_no,
16249846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
16259846590eSStephen M. Cameron 		break;
16269846590eSStephen M. Cameron 	case HPSA_LV_PENDING_ENCRYPTION_REKEYING:
16279846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
16289846590eSStephen M. Cameron 			"C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n",
16299846590eSStephen M. Cameron 			h->scsi_host->host_no,
16309846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
16319846590eSStephen M. Cameron 		break;
16329846590eSStephen M. Cameron 	}
16339846590eSStephen M. Cameron }
16349846590eSStephen M. Cameron 
163503383736SDon Brace /*
163603383736SDon Brace  * Figure the list of physical drive pointers for a logical drive with
163703383736SDon Brace  * raid offload configured.
163803383736SDon Brace  */
163903383736SDon Brace static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h,
164003383736SDon Brace 				struct hpsa_scsi_dev_t *dev[], int ndevices,
164103383736SDon Brace 				struct hpsa_scsi_dev_t *logical_drive)
164203383736SDon Brace {
164303383736SDon Brace 	struct raid_map_data *map = &logical_drive->raid_map;
164403383736SDon Brace 	struct raid_map_disk_data *dd = &map->data[0];
164503383736SDon Brace 	int i, j;
164603383736SDon Brace 	int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
164703383736SDon Brace 				le16_to_cpu(map->metadata_disks_per_row);
164803383736SDon Brace 	int nraid_map_entries = le16_to_cpu(map->row_cnt) *
164903383736SDon Brace 				le16_to_cpu(map->layout_map_count) *
165003383736SDon Brace 				total_disks_per_row;
165103383736SDon Brace 	int nphys_disk = le16_to_cpu(map->layout_map_count) *
165203383736SDon Brace 				total_disks_per_row;
165303383736SDon Brace 	int qdepth;
165403383736SDon Brace 
165503383736SDon Brace 	if (nraid_map_entries > RAID_MAP_MAX_ENTRIES)
165603383736SDon Brace 		nraid_map_entries = RAID_MAP_MAX_ENTRIES;
165703383736SDon Brace 
1658d604f533SWebb Scales 	logical_drive->nphysical_disks = nraid_map_entries;
1659d604f533SWebb Scales 
166003383736SDon Brace 	qdepth = 0;
166103383736SDon Brace 	for (i = 0; i < nraid_map_entries; i++) {
166203383736SDon Brace 		logical_drive->phys_disk[i] = NULL;
166303383736SDon Brace 		if (!logical_drive->offload_config)
166403383736SDon Brace 			continue;
166503383736SDon Brace 		for (j = 0; j < ndevices; j++) {
16661d33d85dSDon Brace 			if (dev[j] == NULL)
16671d33d85dSDon Brace 				continue;
1668ff615f06SPetros Koutoupis 			if (dev[j]->devtype != TYPE_DISK &&
1669ff615f06SPetros Koutoupis 			    dev[j]->devtype != TYPE_ZBC)
1670af15ed36SDon Brace 				continue;
1671f3f01730SKevin Barnett 			if (is_logical_device(dev[j]))
167203383736SDon Brace 				continue;
167303383736SDon Brace 			if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle)
167403383736SDon Brace 				continue;
167503383736SDon Brace 
167603383736SDon Brace 			logical_drive->phys_disk[i] = dev[j];
167703383736SDon Brace 			if (i < nphys_disk)
167803383736SDon Brace 				qdepth = min(h->nr_cmds, qdepth +
167903383736SDon Brace 				    logical_drive->phys_disk[i]->queue_depth);
168003383736SDon Brace 			break;
168103383736SDon Brace 		}
168203383736SDon Brace 
168303383736SDon Brace 		/*
168403383736SDon Brace 		 * This can happen if a physical drive is removed and
168503383736SDon Brace 		 * the logical drive is degraded.  In that case, the RAID
168603383736SDon Brace 		 * map data will refer to a physical disk which isn't actually
168703383736SDon Brace 		 * present.  And in that case offload_enabled should already
168803383736SDon Brace 		 * be 0, but we'll turn it off here just in case
168903383736SDon Brace 		 */
169003383736SDon Brace 		if (!logical_drive->phys_disk[i]) {
169103383736SDon Brace 			logical_drive->offload_enabled = 0;
169241ce4c35SStephen Cameron 			logical_drive->offload_to_be_enabled = 0;
169341ce4c35SStephen Cameron 			logical_drive->queue_depth = 8;
169403383736SDon Brace 		}
169503383736SDon Brace 	}
169603383736SDon Brace 	if (nraid_map_entries)
169703383736SDon Brace 		/*
169803383736SDon Brace 		 * This is correct for reads, too high for full stripe writes,
169903383736SDon Brace 		 * way too high for partial stripe writes
170003383736SDon Brace 		 */
170103383736SDon Brace 		logical_drive->queue_depth = qdepth;
170203383736SDon Brace 	else
170303383736SDon Brace 		logical_drive->queue_depth = h->nr_cmds;
170403383736SDon Brace }
170503383736SDon Brace 
170603383736SDon Brace static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h,
170703383736SDon Brace 				struct hpsa_scsi_dev_t *dev[], int ndevices)
170803383736SDon Brace {
170903383736SDon Brace 	int i;
171003383736SDon Brace 
171103383736SDon Brace 	for (i = 0; i < ndevices; i++) {
17121d33d85dSDon Brace 		if (dev[i] == NULL)
17131d33d85dSDon Brace 			continue;
1714ff615f06SPetros Koutoupis 		if (dev[i]->devtype != TYPE_DISK &&
1715ff615f06SPetros Koutoupis 		    dev[i]->devtype != TYPE_ZBC)
1716af15ed36SDon Brace 			continue;
1717f3f01730SKevin Barnett 		if (!is_logical_device(dev[i]))
171803383736SDon Brace 			continue;
171941ce4c35SStephen Cameron 
172041ce4c35SStephen Cameron 		/*
172141ce4c35SStephen Cameron 		 * If offload is currently enabled, the RAID map and
172241ce4c35SStephen Cameron 		 * phys_disk[] assignment *better* not be changing
172341ce4c35SStephen Cameron 		 * and since it isn't changing, we do not need to
172441ce4c35SStephen Cameron 		 * update it.
172541ce4c35SStephen Cameron 		 */
172641ce4c35SStephen Cameron 		if (dev[i]->offload_enabled)
172741ce4c35SStephen Cameron 			continue;
172841ce4c35SStephen Cameron 
172903383736SDon Brace 		hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]);
173003383736SDon Brace 	}
173103383736SDon Brace }
173203383736SDon Brace 
1733096ccff4SKevin Barnett static int hpsa_add_device(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
1734096ccff4SKevin Barnett {
1735096ccff4SKevin Barnett 	int rc = 0;
1736096ccff4SKevin Barnett 
1737096ccff4SKevin Barnett 	if (!h->scsi_host)
1738096ccff4SKevin Barnett 		return 1;
1739096ccff4SKevin Barnett 
1740d04e62b9SKevin Barnett 	if (is_logical_device(device)) /* RAID */
1741096ccff4SKevin Barnett 		rc = scsi_add_device(h->scsi_host, device->bus,
1742096ccff4SKevin Barnett 					device->target, device->lun);
1743d04e62b9SKevin Barnett 	else /* HBA */
1744d04e62b9SKevin Barnett 		rc = hpsa_add_sas_device(h->sas_host, device);
1745d04e62b9SKevin Barnett 
1746096ccff4SKevin Barnett 	return rc;
1747096ccff4SKevin Barnett }
1748096ccff4SKevin Barnett 
1749ba74fdc4SDon Brace static int hpsa_find_outstanding_commands_for_dev(struct ctlr_info *h,
1750ba74fdc4SDon Brace 						struct hpsa_scsi_dev_t *dev)
1751ba74fdc4SDon Brace {
1752ba74fdc4SDon Brace 	int i;
1753ba74fdc4SDon Brace 	int count = 0;
1754ba74fdc4SDon Brace 
1755ba74fdc4SDon Brace 	for (i = 0; i < h->nr_cmds; i++) {
1756ba74fdc4SDon Brace 		struct CommandList *c = h->cmd_pool + i;
1757ba74fdc4SDon Brace 		int refcount = atomic_inc_return(&c->refcount);
1758ba74fdc4SDon Brace 
1759ba74fdc4SDon Brace 		if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev,
1760ba74fdc4SDon Brace 				dev->scsi3addr)) {
1761ba74fdc4SDon Brace 			unsigned long flags;
1762ba74fdc4SDon Brace 
1763ba74fdc4SDon Brace 			spin_lock_irqsave(&h->lock, flags);	/* Implied MB */
1764ba74fdc4SDon Brace 			if (!hpsa_is_cmd_idle(c))
1765ba74fdc4SDon Brace 				++count;
1766ba74fdc4SDon Brace 			spin_unlock_irqrestore(&h->lock, flags);
1767ba74fdc4SDon Brace 		}
1768ba74fdc4SDon Brace 
1769ba74fdc4SDon Brace 		cmd_free(h, c);
1770ba74fdc4SDon Brace 	}
1771ba74fdc4SDon Brace 
1772ba74fdc4SDon Brace 	return count;
1773ba74fdc4SDon Brace }
1774ba74fdc4SDon Brace 
1775ba74fdc4SDon Brace static void hpsa_wait_for_outstanding_commands_for_dev(struct ctlr_info *h,
1776ba74fdc4SDon Brace 						struct hpsa_scsi_dev_t *device)
1777ba74fdc4SDon Brace {
1778ba74fdc4SDon Brace 	int cmds = 0;
1779ba74fdc4SDon Brace 	int waits = 0;
1780ba74fdc4SDon Brace 
1781ba74fdc4SDon Brace 	while (1) {
1782ba74fdc4SDon Brace 		cmds = hpsa_find_outstanding_commands_for_dev(h, device);
1783ba74fdc4SDon Brace 		if (cmds == 0)
1784ba74fdc4SDon Brace 			break;
1785ba74fdc4SDon Brace 		if (++waits > 20)
1786ba74fdc4SDon Brace 			break;
1787ba74fdc4SDon Brace 		dev_warn(&h->pdev->dev,
1788ba74fdc4SDon Brace 			"%s: removing device with %d outstanding commands!\n",
1789ba74fdc4SDon Brace 			__func__, cmds);
1790ba74fdc4SDon Brace 		msleep(1000);
1791ba74fdc4SDon Brace 	}
1792ba74fdc4SDon Brace }
1793ba74fdc4SDon Brace 
1794096ccff4SKevin Barnett static void hpsa_remove_device(struct ctlr_info *h,
1795096ccff4SKevin Barnett 			struct hpsa_scsi_dev_t *device)
1796096ccff4SKevin Barnett {
1797096ccff4SKevin Barnett 	struct scsi_device *sdev = NULL;
1798096ccff4SKevin Barnett 
1799096ccff4SKevin Barnett 	if (!h->scsi_host)
1800096ccff4SKevin Barnett 		return;
1801096ccff4SKevin Barnett 
1802d04e62b9SKevin Barnett 	if (is_logical_device(device)) { /* RAID */
1803096ccff4SKevin Barnett 		sdev = scsi_device_lookup(h->scsi_host, device->bus,
1804096ccff4SKevin Barnett 						device->target, device->lun);
1805096ccff4SKevin Barnett 		if (sdev) {
1806096ccff4SKevin Barnett 			scsi_remove_device(sdev);
1807096ccff4SKevin Barnett 			scsi_device_put(sdev);
1808096ccff4SKevin Barnett 		} else {
1809096ccff4SKevin Barnett 			/*
1810096ccff4SKevin Barnett 			 * We don't expect to get here.  Future commands
1811096ccff4SKevin Barnett 			 * to this device will get a selection timeout as
1812096ccff4SKevin Barnett 			 * if the device were gone.
1813096ccff4SKevin Barnett 			 */
1814096ccff4SKevin Barnett 			hpsa_show_dev_msg(KERN_WARNING, h, device,
1815096ccff4SKevin Barnett 					"didn't find device for removal.");
1816096ccff4SKevin Barnett 		}
1817ba74fdc4SDon Brace 	} else { /* HBA */
1818ba74fdc4SDon Brace 
1819ba74fdc4SDon Brace 		device->removed = 1;
1820ba74fdc4SDon Brace 		hpsa_wait_for_outstanding_commands_for_dev(h, device);
1821ba74fdc4SDon Brace 
1822d04e62b9SKevin Barnett 		hpsa_remove_sas_device(device);
1823096ccff4SKevin Barnett 	}
1824ba74fdc4SDon Brace }
1825096ccff4SKevin Barnett 
18268aa60681SDon Brace static void adjust_hpsa_scsi_table(struct ctlr_info *h,
1827edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *sd[], int nsds)
1828edd16368SStephen M. Cameron {
1829edd16368SStephen M. Cameron 	/* sd contains scsi3 addresses and devtypes, and inquiry
1830edd16368SStephen M. Cameron 	 * data.  This function takes what's in sd to be the current
1831edd16368SStephen M. Cameron 	 * reality and updates h->dev[] to reflect that reality.
1832edd16368SStephen M. Cameron 	 */
1833edd16368SStephen M. Cameron 	int i, entry, device_change, changes = 0;
1834edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *csd;
1835edd16368SStephen M. Cameron 	unsigned long flags;
1836edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t **added, **removed;
1837edd16368SStephen M. Cameron 	int nadded, nremoved;
1838edd16368SStephen M. Cameron 
1839da03ded0SDon Brace 	/*
1840da03ded0SDon Brace 	 * A reset can cause a device status to change
1841da03ded0SDon Brace 	 * re-schedule the scan to see what happened.
1842da03ded0SDon Brace 	 */
1843da03ded0SDon Brace 	if (h->reset_in_progress) {
1844da03ded0SDon Brace 		h->drv_req_rescan = 1;
1845da03ded0SDon Brace 		return;
1846da03ded0SDon Brace 	}
1847edd16368SStephen M. Cameron 
1848cfe5badcSScott Teel 	added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL);
1849cfe5badcSScott Teel 	removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL);
1850edd16368SStephen M. Cameron 
1851edd16368SStephen M. Cameron 	if (!added || !removed) {
1852edd16368SStephen M. Cameron 		dev_warn(&h->pdev->dev, "out of memory in "
1853edd16368SStephen M. Cameron 			"adjust_hpsa_scsi_table\n");
1854edd16368SStephen M. Cameron 		goto free_and_out;
1855edd16368SStephen M. Cameron 	}
1856edd16368SStephen M. Cameron 
1857edd16368SStephen M. Cameron 	spin_lock_irqsave(&h->devlock, flags);
1858edd16368SStephen M. Cameron 
1859edd16368SStephen M. Cameron 	/* find any devices in h->dev[] that are not in
1860edd16368SStephen M. Cameron 	 * sd[] and remove them from h->dev[], and for any
1861edd16368SStephen M. Cameron 	 * devices which have changed, remove the old device
1862edd16368SStephen M. Cameron 	 * info and add the new device info.
1863bd9244f7SScott Teel 	 * If minor device attributes change, just update
1864bd9244f7SScott Teel 	 * the existing device structure.
1865edd16368SStephen M. Cameron 	 */
1866edd16368SStephen M. Cameron 	i = 0;
1867edd16368SStephen M. Cameron 	nremoved = 0;
1868edd16368SStephen M. Cameron 	nadded = 0;
1869edd16368SStephen M. Cameron 	while (i < h->ndevices) {
1870edd16368SStephen M. Cameron 		csd = h->dev[i];
1871edd16368SStephen M. Cameron 		device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
1872edd16368SStephen M. Cameron 		if (device_change == DEVICE_NOT_FOUND) {
1873edd16368SStephen M. Cameron 			changes++;
18748aa60681SDon Brace 			hpsa_scsi_remove_entry(h, i, removed, &nremoved);
1875edd16368SStephen M. Cameron 			continue; /* remove ^^^, hence i not incremented */
1876edd16368SStephen M. Cameron 		} else if (device_change == DEVICE_CHANGED) {
1877edd16368SStephen M. Cameron 			changes++;
18788aa60681SDon Brace 			hpsa_scsi_replace_entry(h, i, sd[entry],
18792a8ccf31SStephen M. Cameron 				added, &nadded, removed, &nremoved);
1880c7f172dcSStephen M. Cameron 			/* Set it to NULL to prevent it from being freed
1881c7f172dcSStephen M. Cameron 			 * at the bottom of hpsa_update_scsi_devices()
1882c7f172dcSStephen M. Cameron 			 */
1883c7f172dcSStephen M. Cameron 			sd[entry] = NULL;
1884bd9244f7SScott Teel 		} else if (device_change == DEVICE_UPDATED) {
18858aa60681SDon Brace 			hpsa_scsi_update_entry(h, i, sd[entry]);
1886edd16368SStephen M. Cameron 		}
1887edd16368SStephen M. Cameron 		i++;
1888edd16368SStephen M. Cameron 	}
1889edd16368SStephen M. Cameron 
1890edd16368SStephen M. Cameron 	/* Now, make sure every device listed in sd[] is also
1891edd16368SStephen M. Cameron 	 * listed in h->dev[], adding them if they aren't found
1892edd16368SStephen M. Cameron 	 */
1893edd16368SStephen M. Cameron 
1894edd16368SStephen M. Cameron 	for (i = 0; i < nsds; i++) {
1895edd16368SStephen M. Cameron 		if (!sd[i]) /* if already added above. */
1896edd16368SStephen M. Cameron 			continue;
18979846590eSStephen M. Cameron 
18989846590eSStephen M. Cameron 		/* Don't add devices which are NOT READY, FORMAT IN PROGRESS
18999846590eSStephen M. Cameron 		 * as the SCSI mid-layer does not handle such devices well.
19009846590eSStephen M. Cameron 		 * It relentlessly loops sending TUR at 3Hz, then READ(10)
19019846590eSStephen M. Cameron 		 * at 160Hz, and prevents the system from coming up.
19029846590eSStephen M. Cameron 		 */
19039846590eSStephen M. Cameron 		if (sd[i]->volume_offline) {
19049846590eSStephen M. Cameron 			hpsa_show_volume_status(h, sd[i]);
19050d96ef5fSWebb Scales 			hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline");
19069846590eSStephen M. Cameron 			continue;
19079846590eSStephen M. Cameron 		}
19089846590eSStephen M. Cameron 
1909edd16368SStephen M. Cameron 		device_change = hpsa_scsi_find_entry(sd[i], h->dev,
1910edd16368SStephen M. Cameron 					h->ndevices, &entry);
1911edd16368SStephen M. Cameron 		if (device_change == DEVICE_NOT_FOUND) {
1912edd16368SStephen M. Cameron 			changes++;
19138aa60681SDon Brace 			if (hpsa_scsi_add_entry(h, sd[i], added, &nadded) != 0)
1914edd16368SStephen M. Cameron 				break;
1915edd16368SStephen M. Cameron 			sd[i] = NULL; /* prevent from being freed later. */
1916edd16368SStephen M. Cameron 		} else if (device_change == DEVICE_CHANGED) {
1917edd16368SStephen M. Cameron 			/* should never happen... */
1918edd16368SStephen M. Cameron 			changes++;
1919edd16368SStephen M. Cameron 			dev_warn(&h->pdev->dev,
1920edd16368SStephen M. Cameron 				"device unexpectedly changed.\n");
1921edd16368SStephen M. Cameron 			/* but if it does happen, we just ignore that device */
1922edd16368SStephen M. Cameron 		}
1923edd16368SStephen M. Cameron 	}
192441ce4c35SStephen Cameron 	hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices);
192541ce4c35SStephen Cameron 
192641ce4c35SStephen Cameron 	/* Now that h->dev[]->phys_disk[] is coherent, we can enable
192741ce4c35SStephen Cameron 	 * any logical drives that need it enabled.
192841ce4c35SStephen Cameron 	 */
19291d33d85dSDon Brace 	for (i = 0; i < h->ndevices; i++) {
19301d33d85dSDon Brace 		if (h->dev[i] == NULL)
19311d33d85dSDon Brace 			continue;
193241ce4c35SStephen Cameron 		h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled;
19331d33d85dSDon Brace 	}
193441ce4c35SStephen Cameron 
1935edd16368SStephen M. Cameron 	spin_unlock_irqrestore(&h->devlock, flags);
1936edd16368SStephen M. Cameron 
19379846590eSStephen M. Cameron 	/* Monitor devices which are in one of several NOT READY states to be
19389846590eSStephen M. Cameron 	 * brought online later. This must be done without holding h->devlock,
19399846590eSStephen M. Cameron 	 * so don't touch h->dev[]
19409846590eSStephen M. Cameron 	 */
19419846590eSStephen M. Cameron 	for (i = 0; i < nsds; i++) {
19429846590eSStephen M. Cameron 		if (!sd[i]) /* if already added above. */
19439846590eSStephen M. Cameron 			continue;
19449846590eSStephen M. Cameron 		if (sd[i]->volume_offline)
19459846590eSStephen M. Cameron 			hpsa_monitor_offline_device(h, sd[i]->scsi3addr);
19469846590eSStephen M. Cameron 	}
19479846590eSStephen M. Cameron 
1948edd16368SStephen M. Cameron 	/* Don't notify scsi mid layer of any changes the first time through
1949edd16368SStephen M. Cameron 	 * (or if there are no changes) scsi_scan_host will do it later the
1950edd16368SStephen M. Cameron 	 * first time through.
1951edd16368SStephen M. Cameron 	 */
19528aa60681SDon Brace 	if (!changes)
1953edd16368SStephen M. Cameron 		goto free_and_out;
1954edd16368SStephen M. Cameron 
1955edd16368SStephen M. Cameron 	/* Notify scsi mid layer of any removed devices */
1956edd16368SStephen M. Cameron 	for (i = 0; i < nremoved; i++) {
19571d33d85dSDon Brace 		if (removed[i] == NULL)
19581d33d85dSDon Brace 			continue;
1959096ccff4SKevin Barnett 		if (removed[i]->expose_device)
1960096ccff4SKevin Barnett 			hpsa_remove_device(h, removed[i]);
1961edd16368SStephen M. Cameron 		kfree(removed[i]);
1962edd16368SStephen M. Cameron 		removed[i] = NULL;
1963edd16368SStephen M. Cameron 	}
1964edd16368SStephen M. Cameron 
1965edd16368SStephen M. Cameron 	/* Notify scsi mid layer of any added devices */
1966edd16368SStephen M. Cameron 	for (i = 0; i < nadded; i++) {
1967096ccff4SKevin Barnett 		int rc = 0;
1968096ccff4SKevin Barnett 
19691d33d85dSDon Brace 		if (added[i] == NULL)
197041ce4c35SStephen Cameron 			continue;
19712a168208SKevin Barnett 		if (!(added[i]->expose_device))
1972edd16368SStephen M. Cameron 			continue;
1973096ccff4SKevin Barnett 		rc = hpsa_add_device(h, added[i]);
1974096ccff4SKevin Barnett 		if (!rc)
1975edd16368SStephen M. Cameron 			continue;
1976096ccff4SKevin Barnett 		dev_warn(&h->pdev->dev,
1977096ccff4SKevin Barnett 			"addition failed %d, device not added.", rc);
1978edd16368SStephen M. Cameron 		/* now we have to remove it from h->dev,
1979edd16368SStephen M. Cameron 		 * since it didn't get added to scsi mid layer
1980edd16368SStephen M. Cameron 		 */
1981edd16368SStephen M. Cameron 		fixup_botched_add(h, added[i]);
1982853633e8SDon Brace 		h->drv_req_rescan = 1;
1983edd16368SStephen M. Cameron 	}
1984edd16368SStephen M. Cameron 
1985edd16368SStephen M. Cameron free_and_out:
1986edd16368SStephen M. Cameron 	kfree(added);
1987edd16368SStephen M. Cameron 	kfree(removed);
1988edd16368SStephen M. Cameron }
1989edd16368SStephen M. Cameron 
1990edd16368SStephen M. Cameron /*
19919e03aa2fSJoe Perches  * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t *
1992edd16368SStephen M. Cameron  * Assume's h->devlock is held.
1993edd16368SStephen M. Cameron  */
1994edd16368SStephen M. Cameron static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
1995edd16368SStephen M. Cameron 	int bus, int target, int lun)
1996edd16368SStephen M. Cameron {
1997edd16368SStephen M. Cameron 	int i;
1998edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *sd;
1999edd16368SStephen M. Cameron 
2000edd16368SStephen M. Cameron 	for (i = 0; i < h->ndevices; i++) {
2001edd16368SStephen M. Cameron 		sd = h->dev[i];
2002edd16368SStephen M. Cameron 		if (sd->bus == bus && sd->target == target && sd->lun == lun)
2003edd16368SStephen M. Cameron 			return sd;
2004edd16368SStephen M. Cameron 	}
2005edd16368SStephen M. Cameron 	return NULL;
2006edd16368SStephen M. Cameron }
2007edd16368SStephen M. Cameron 
2008edd16368SStephen M. Cameron static int hpsa_slave_alloc(struct scsi_device *sdev)
2009edd16368SStephen M. Cameron {
2010edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *sd;
2011edd16368SStephen M. Cameron 	unsigned long flags;
2012edd16368SStephen M. Cameron 	struct ctlr_info *h;
2013edd16368SStephen M. Cameron 
2014edd16368SStephen M. Cameron 	h = sdev_to_hba(sdev);
2015edd16368SStephen M. Cameron 	spin_lock_irqsave(&h->devlock, flags);
2016d04e62b9SKevin Barnett 	if (sdev_channel(sdev) == HPSA_PHYSICAL_DEVICE_BUS) {
2017d04e62b9SKevin Barnett 		struct scsi_target *starget;
2018d04e62b9SKevin Barnett 		struct sas_rphy *rphy;
2019d04e62b9SKevin Barnett 
2020d04e62b9SKevin Barnett 		starget = scsi_target(sdev);
2021d04e62b9SKevin Barnett 		rphy = target_to_rphy(starget);
2022d04e62b9SKevin Barnett 		sd = hpsa_find_device_by_sas_rphy(h, rphy);
2023d04e62b9SKevin Barnett 		if (sd) {
2024d04e62b9SKevin Barnett 			sd->target = sdev_id(sdev);
2025d04e62b9SKevin Barnett 			sd->lun = sdev->lun;
2026d04e62b9SKevin Barnett 		}
2027d04e62b9SKevin Barnett 	} else
2028edd16368SStephen M. Cameron 		sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
2029edd16368SStephen M. Cameron 					sdev_id(sdev), sdev->lun);
2030d04e62b9SKevin Barnett 
2031d04e62b9SKevin Barnett 	if (sd && sd->expose_device) {
203203383736SDon Brace 		atomic_set(&sd->ioaccel_cmds_out, 0);
2033d04e62b9SKevin Barnett 		sdev->hostdata = sd;
203441ce4c35SStephen Cameron 	} else
203541ce4c35SStephen Cameron 		sdev->hostdata = NULL;
2036edd16368SStephen M. Cameron 	spin_unlock_irqrestore(&h->devlock, flags);
2037edd16368SStephen M. Cameron 	return 0;
2038edd16368SStephen M. Cameron }
2039edd16368SStephen M. Cameron 
204041ce4c35SStephen Cameron /* configure scsi device based on internal per-device structure */
204141ce4c35SStephen Cameron static int hpsa_slave_configure(struct scsi_device *sdev)
204241ce4c35SStephen Cameron {
204341ce4c35SStephen Cameron 	struct hpsa_scsi_dev_t *sd;
204441ce4c35SStephen Cameron 	int queue_depth;
204541ce4c35SStephen Cameron 
204641ce4c35SStephen Cameron 	sd = sdev->hostdata;
20472a168208SKevin Barnett 	sdev->no_uld_attach = !sd || !sd->expose_device;
204841ce4c35SStephen Cameron 
204941ce4c35SStephen Cameron 	if (sd)
205041ce4c35SStephen Cameron 		queue_depth = sd->queue_depth != 0 ?
205141ce4c35SStephen Cameron 			sd->queue_depth : sdev->host->can_queue;
205241ce4c35SStephen Cameron 	else
205341ce4c35SStephen Cameron 		queue_depth = sdev->host->can_queue;
205441ce4c35SStephen Cameron 
205541ce4c35SStephen Cameron 	scsi_change_queue_depth(sdev, queue_depth);
205641ce4c35SStephen Cameron 
205741ce4c35SStephen Cameron 	return 0;
205841ce4c35SStephen Cameron }
205941ce4c35SStephen Cameron 
2060edd16368SStephen M. Cameron static void hpsa_slave_destroy(struct scsi_device *sdev)
2061edd16368SStephen M. Cameron {
2062bcc44255SStephen M. Cameron 	/* nothing to do. */
2063edd16368SStephen M. Cameron }
2064edd16368SStephen M. Cameron 
2065d9a729f3SWebb Scales static void hpsa_free_ioaccel2_sg_chain_blocks(struct ctlr_info *h)
2066d9a729f3SWebb Scales {
2067d9a729f3SWebb Scales 	int i;
2068d9a729f3SWebb Scales 
2069d9a729f3SWebb Scales 	if (!h->ioaccel2_cmd_sg_list)
2070d9a729f3SWebb Scales 		return;
2071d9a729f3SWebb Scales 	for (i = 0; i < h->nr_cmds; i++) {
2072d9a729f3SWebb Scales 		kfree(h->ioaccel2_cmd_sg_list[i]);
2073d9a729f3SWebb Scales 		h->ioaccel2_cmd_sg_list[i] = NULL;
2074d9a729f3SWebb Scales 	}
2075d9a729f3SWebb Scales 	kfree(h->ioaccel2_cmd_sg_list);
2076d9a729f3SWebb Scales 	h->ioaccel2_cmd_sg_list = NULL;
2077d9a729f3SWebb Scales }
2078d9a729f3SWebb Scales 
2079d9a729f3SWebb Scales static int hpsa_allocate_ioaccel2_sg_chain_blocks(struct ctlr_info *h)
2080d9a729f3SWebb Scales {
2081d9a729f3SWebb Scales 	int i;
2082d9a729f3SWebb Scales 
2083d9a729f3SWebb Scales 	if (h->chainsize <= 0)
2084d9a729f3SWebb Scales 		return 0;
2085d9a729f3SWebb Scales 
2086d9a729f3SWebb Scales 	h->ioaccel2_cmd_sg_list =
2087d9a729f3SWebb Scales 		kzalloc(sizeof(*h->ioaccel2_cmd_sg_list) * h->nr_cmds,
2088d9a729f3SWebb Scales 					GFP_KERNEL);
2089d9a729f3SWebb Scales 	if (!h->ioaccel2_cmd_sg_list)
2090d9a729f3SWebb Scales 		return -ENOMEM;
2091d9a729f3SWebb Scales 	for (i = 0; i < h->nr_cmds; i++) {
2092d9a729f3SWebb Scales 		h->ioaccel2_cmd_sg_list[i] =
2093d9a729f3SWebb Scales 			kmalloc(sizeof(*h->ioaccel2_cmd_sg_list[i]) *
2094d9a729f3SWebb Scales 					h->maxsgentries, GFP_KERNEL);
2095d9a729f3SWebb Scales 		if (!h->ioaccel2_cmd_sg_list[i])
2096d9a729f3SWebb Scales 			goto clean;
2097d9a729f3SWebb Scales 	}
2098d9a729f3SWebb Scales 	return 0;
2099d9a729f3SWebb Scales 
2100d9a729f3SWebb Scales clean:
2101d9a729f3SWebb Scales 	hpsa_free_ioaccel2_sg_chain_blocks(h);
2102d9a729f3SWebb Scales 	return -ENOMEM;
2103d9a729f3SWebb Scales }
2104d9a729f3SWebb Scales 
210533a2ffceSStephen M. Cameron static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
210633a2ffceSStephen M. Cameron {
210733a2ffceSStephen M. Cameron 	int i;
210833a2ffceSStephen M. Cameron 
210933a2ffceSStephen M. Cameron 	if (!h->cmd_sg_list)
211033a2ffceSStephen M. Cameron 		return;
211133a2ffceSStephen M. Cameron 	for (i = 0; i < h->nr_cmds; i++) {
211233a2ffceSStephen M. Cameron 		kfree(h->cmd_sg_list[i]);
211333a2ffceSStephen M. Cameron 		h->cmd_sg_list[i] = NULL;
211433a2ffceSStephen M. Cameron 	}
211533a2ffceSStephen M. Cameron 	kfree(h->cmd_sg_list);
211633a2ffceSStephen M. Cameron 	h->cmd_sg_list = NULL;
211733a2ffceSStephen M. Cameron }
211833a2ffceSStephen M. Cameron 
2119105a3dbcSRobert Elliott static int hpsa_alloc_sg_chain_blocks(struct ctlr_info *h)
212033a2ffceSStephen M. Cameron {
212133a2ffceSStephen M. Cameron 	int i;
212233a2ffceSStephen M. Cameron 
212333a2ffceSStephen M. Cameron 	if (h->chainsize <= 0)
212433a2ffceSStephen M. Cameron 		return 0;
212533a2ffceSStephen M. Cameron 
212633a2ffceSStephen M. Cameron 	h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
212733a2ffceSStephen M. Cameron 				GFP_KERNEL);
21283d4e6af8SRobert Elliott 	if (!h->cmd_sg_list) {
21293d4e6af8SRobert Elliott 		dev_err(&h->pdev->dev, "Failed to allocate SG list\n");
213033a2ffceSStephen M. Cameron 		return -ENOMEM;
21313d4e6af8SRobert Elliott 	}
213233a2ffceSStephen M. Cameron 	for (i = 0; i < h->nr_cmds; i++) {
213333a2ffceSStephen M. Cameron 		h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
213433a2ffceSStephen M. Cameron 						h->chainsize, GFP_KERNEL);
21353d4e6af8SRobert Elliott 		if (!h->cmd_sg_list[i]) {
21363d4e6af8SRobert Elliott 			dev_err(&h->pdev->dev, "Failed to allocate cmd SG\n");
213733a2ffceSStephen M. Cameron 			goto clean;
213833a2ffceSStephen M. Cameron 		}
21393d4e6af8SRobert Elliott 	}
214033a2ffceSStephen M. Cameron 	return 0;
214133a2ffceSStephen M. Cameron 
214233a2ffceSStephen M. Cameron clean:
214333a2ffceSStephen M. Cameron 	hpsa_free_sg_chain_blocks(h);
214433a2ffceSStephen M. Cameron 	return -ENOMEM;
214533a2ffceSStephen M. Cameron }
214633a2ffceSStephen M. Cameron 
2147d9a729f3SWebb Scales static int hpsa_map_ioaccel2_sg_chain_block(struct ctlr_info *h,
2148d9a729f3SWebb Scales 	struct io_accel2_cmd *cp, struct CommandList *c)
2149d9a729f3SWebb Scales {
2150d9a729f3SWebb Scales 	struct ioaccel2_sg_element *chain_block;
2151d9a729f3SWebb Scales 	u64 temp64;
2152d9a729f3SWebb Scales 	u32 chain_size;
2153d9a729f3SWebb Scales 
2154d9a729f3SWebb Scales 	chain_block = h->ioaccel2_cmd_sg_list[c->cmdindex];
2155a736e9b6SDon Brace 	chain_size = le32_to_cpu(cp->sg[0].length);
2156d9a729f3SWebb Scales 	temp64 = pci_map_single(h->pdev, chain_block, chain_size,
2157d9a729f3SWebb Scales 				PCI_DMA_TODEVICE);
2158d9a729f3SWebb Scales 	if (dma_mapping_error(&h->pdev->dev, temp64)) {
2159d9a729f3SWebb Scales 		/* prevent subsequent unmapping */
2160d9a729f3SWebb Scales 		cp->sg->address = 0;
2161d9a729f3SWebb Scales 		return -1;
2162d9a729f3SWebb Scales 	}
2163d9a729f3SWebb Scales 	cp->sg->address = cpu_to_le64(temp64);
2164d9a729f3SWebb Scales 	return 0;
2165d9a729f3SWebb Scales }
2166d9a729f3SWebb Scales 
2167d9a729f3SWebb Scales static void hpsa_unmap_ioaccel2_sg_chain_block(struct ctlr_info *h,
2168d9a729f3SWebb Scales 	struct io_accel2_cmd *cp)
2169d9a729f3SWebb Scales {
2170d9a729f3SWebb Scales 	struct ioaccel2_sg_element *chain_sg;
2171d9a729f3SWebb Scales 	u64 temp64;
2172d9a729f3SWebb Scales 	u32 chain_size;
2173d9a729f3SWebb Scales 
2174d9a729f3SWebb Scales 	chain_sg = cp->sg;
2175d9a729f3SWebb Scales 	temp64 = le64_to_cpu(chain_sg->address);
2176a736e9b6SDon Brace 	chain_size = le32_to_cpu(cp->sg[0].length);
2177d9a729f3SWebb Scales 	pci_unmap_single(h->pdev, temp64, chain_size, PCI_DMA_TODEVICE);
2178d9a729f3SWebb Scales }
2179d9a729f3SWebb Scales 
2180e2bea6dfSStephen M. Cameron static int hpsa_map_sg_chain_block(struct ctlr_info *h,
218133a2ffceSStephen M. Cameron 	struct CommandList *c)
218233a2ffceSStephen M. Cameron {
218333a2ffceSStephen M. Cameron 	struct SGDescriptor *chain_sg, *chain_block;
218433a2ffceSStephen M. Cameron 	u64 temp64;
218550a0decfSStephen M. Cameron 	u32 chain_len;
218633a2ffceSStephen M. Cameron 
218733a2ffceSStephen M. Cameron 	chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
218833a2ffceSStephen M. Cameron 	chain_block = h->cmd_sg_list[c->cmdindex];
218950a0decfSStephen M. Cameron 	chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN);
219050a0decfSStephen M. Cameron 	chain_len = sizeof(*chain_sg) *
21912b08b3e9SDon Brace 		(le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries);
219250a0decfSStephen M. Cameron 	chain_sg->Len = cpu_to_le32(chain_len);
219350a0decfSStephen M. Cameron 	temp64 = pci_map_single(h->pdev, chain_block, chain_len,
219433a2ffceSStephen M. Cameron 				PCI_DMA_TODEVICE);
2195e2bea6dfSStephen M. Cameron 	if (dma_mapping_error(&h->pdev->dev, temp64)) {
2196e2bea6dfSStephen M. Cameron 		/* prevent subsequent unmapping */
219750a0decfSStephen M. Cameron 		chain_sg->Addr = cpu_to_le64(0);
2198e2bea6dfSStephen M. Cameron 		return -1;
2199e2bea6dfSStephen M. Cameron 	}
220050a0decfSStephen M. Cameron 	chain_sg->Addr = cpu_to_le64(temp64);
2201e2bea6dfSStephen M. Cameron 	return 0;
220233a2ffceSStephen M. Cameron }
220333a2ffceSStephen M. Cameron 
220433a2ffceSStephen M. Cameron static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
220533a2ffceSStephen M. Cameron 	struct CommandList *c)
220633a2ffceSStephen M. Cameron {
220733a2ffceSStephen M. Cameron 	struct SGDescriptor *chain_sg;
220833a2ffceSStephen M. Cameron 
220950a0decfSStephen M. Cameron 	if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries)
221033a2ffceSStephen M. Cameron 		return;
221133a2ffceSStephen M. Cameron 
221233a2ffceSStephen M. Cameron 	chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
221350a0decfSStephen M. Cameron 	pci_unmap_single(h->pdev, le64_to_cpu(chain_sg->Addr),
221450a0decfSStephen M. Cameron 			le32_to_cpu(chain_sg->Len), PCI_DMA_TODEVICE);
221533a2ffceSStephen M. Cameron }
221633a2ffceSStephen M. Cameron 
2217a09c1441SScott Teel 
2218a09c1441SScott Teel /* Decode the various types of errors on ioaccel2 path.
2219a09c1441SScott Teel  * Return 1 for any error that should generate a RAID path retry.
2220a09c1441SScott Teel  * Return 0 for errors that don't require a RAID path retry.
2221a09c1441SScott Teel  */
2222a09c1441SScott Teel static int handle_ioaccel_mode2_error(struct ctlr_info *h,
2223c349775eSScott Teel 					struct CommandList *c,
2224c349775eSScott Teel 					struct scsi_cmnd *cmd,
2225ba74fdc4SDon Brace 					struct io_accel2_cmd *c2,
2226ba74fdc4SDon Brace 					struct hpsa_scsi_dev_t *dev)
2227c349775eSScott Teel {
2228c349775eSScott Teel 	int data_len;
2229a09c1441SScott Teel 	int retry = 0;
2230c40820d5SJoe Handzik 	u32 ioaccel2_resid = 0;
2231c349775eSScott Teel 
2232c349775eSScott Teel 	switch (c2->error_data.serv_response) {
2233c349775eSScott Teel 	case IOACCEL2_SERV_RESPONSE_COMPLETE:
2234c349775eSScott Teel 		switch (c2->error_data.status) {
2235c349775eSScott Teel 		case IOACCEL2_STATUS_SR_TASK_COMP_GOOD:
2236c349775eSScott Teel 			break;
2237c349775eSScott Teel 		case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND:
2238ee6b1889SStephen M. Cameron 			cmd->result |= SAM_STAT_CHECK_CONDITION;
2239c349775eSScott Teel 			if (c2->error_data.data_present !=
2240ee6b1889SStephen M. Cameron 					IOACCEL2_SENSE_DATA_PRESENT) {
2241ee6b1889SStephen M. Cameron 				memset(cmd->sense_buffer, 0,
2242ee6b1889SStephen M. Cameron 					SCSI_SENSE_BUFFERSIZE);
2243c349775eSScott Teel 				break;
2244ee6b1889SStephen M. Cameron 			}
2245c349775eSScott Teel 			/* copy the sense data */
2246c349775eSScott Teel 			data_len = c2->error_data.sense_data_len;
2247c349775eSScott Teel 			if (data_len > SCSI_SENSE_BUFFERSIZE)
2248c349775eSScott Teel 				data_len = SCSI_SENSE_BUFFERSIZE;
2249c349775eSScott Teel 			if (data_len > sizeof(c2->error_data.sense_data_buff))
2250c349775eSScott Teel 				data_len =
2251c349775eSScott Teel 					sizeof(c2->error_data.sense_data_buff);
2252c349775eSScott Teel 			memcpy(cmd->sense_buffer,
2253c349775eSScott Teel 				c2->error_data.sense_data_buff, data_len);
2254a09c1441SScott Teel 			retry = 1;
2255c349775eSScott Teel 			break;
2256c349775eSScott Teel 		case IOACCEL2_STATUS_SR_TASK_COMP_BUSY:
2257a09c1441SScott Teel 			retry = 1;
2258c349775eSScott Teel 			break;
2259c349775eSScott Teel 		case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON:
2260a09c1441SScott Teel 			retry = 1;
2261c349775eSScott Teel 			break;
2262c349775eSScott Teel 		case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL:
22634a8da22bSStephen Cameron 			retry = 1;
2264c349775eSScott Teel 			break;
2265c349775eSScott Teel 		case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED:
2266a09c1441SScott Teel 			retry = 1;
2267c349775eSScott Teel 			break;
2268c349775eSScott Teel 		default:
2269a09c1441SScott Teel 			retry = 1;
2270c349775eSScott Teel 			break;
2271c349775eSScott Teel 		}
2272c349775eSScott Teel 		break;
2273c349775eSScott Teel 	case IOACCEL2_SERV_RESPONSE_FAILURE:
2274c40820d5SJoe Handzik 		switch (c2->error_data.status) {
2275c40820d5SJoe Handzik 		case IOACCEL2_STATUS_SR_IO_ERROR:
2276c40820d5SJoe Handzik 		case IOACCEL2_STATUS_SR_IO_ABORTED:
2277c40820d5SJoe Handzik 		case IOACCEL2_STATUS_SR_OVERRUN:
2278c40820d5SJoe Handzik 			retry = 1;
2279c40820d5SJoe Handzik 			break;
2280c40820d5SJoe Handzik 		case IOACCEL2_STATUS_SR_UNDERRUN:
2281c40820d5SJoe Handzik 			cmd->result = (DID_OK << 16);		/* host byte */
2282c40820d5SJoe Handzik 			cmd->result |= (COMMAND_COMPLETE << 8);	/* msg byte */
2283c40820d5SJoe Handzik 			ioaccel2_resid = get_unaligned_le32(
2284c40820d5SJoe Handzik 						&c2->error_data.resid_cnt[0]);
2285c40820d5SJoe Handzik 			scsi_set_resid(cmd, ioaccel2_resid);
2286c40820d5SJoe Handzik 			break;
2287c40820d5SJoe Handzik 		case IOACCEL2_STATUS_SR_NO_PATH_TO_DEVICE:
2288c40820d5SJoe Handzik 		case IOACCEL2_STATUS_SR_INVALID_DEVICE:
2289c40820d5SJoe Handzik 		case IOACCEL2_STATUS_SR_IOACCEL_DISABLED:
2290ba74fdc4SDon Brace 			/*
2291ba74fdc4SDon Brace 			 * Did an HBA disk disappear? We will eventually
2292ba74fdc4SDon Brace 			 * get a state change event from the controller but
2293ba74fdc4SDon Brace 			 * in the meantime, we need to tell the OS that the
2294ba74fdc4SDon Brace 			 * HBA disk is no longer there and stop I/O
2295ba74fdc4SDon Brace 			 * from going down. This allows the potential re-insert
2296ba74fdc4SDon Brace 			 * of the disk to get the same device node.
2297ba74fdc4SDon Brace 			 */
2298ba74fdc4SDon Brace 			if (dev->physical_device && dev->expose_device) {
2299ba74fdc4SDon Brace 				cmd->result = DID_NO_CONNECT << 16;
2300ba74fdc4SDon Brace 				dev->removed = 1;
2301ba74fdc4SDon Brace 				h->drv_req_rescan = 1;
2302ba74fdc4SDon Brace 				dev_warn(&h->pdev->dev,
2303ba74fdc4SDon Brace 					"%s: device is gone!\n", __func__);
2304ba74fdc4SDon Brace 			} else
2305ba74fdc4SDon Brace 				/*
2306ba74fdc4SDon Brace 				 * Retry by sending down the RAID path.
2307ba74fdc4SDon Brace 				 * We will get an event from ctlr to
2308ba74fdc4SDon Brace 				 * trigger rescan regardless.
2309ba74fdc4SDon Brace 				 */
2310c40820d5SJoe Handzik 				retry = 1;
2311c40820d5SJoe Handzik 			break;
2312c40820d5SJoe Handzik 		default:
2313c40820d5SJoe Handzik 			retry = 1;
2314c40820d5SJoe Handzik 		}
2315c349775eSScott Teel 		break;
2316c349775eSScott Teel 	case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE:
2317c349775eSScott Teel 		break;
2318c349775eSScott Teel 	case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS:
2319c349775eSScott Teel 		break;
2320c349775eSScott Teel 	case IOACCEL2_SERV_RESPONSE_TMF_REJECTED:
2321a09c1441SScott Teel 		retry = 1;
2322c349775eSScott Teel 		break;
2323c349775eSScott Teel 	case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN:
2324c349775eSScott Teel 		break;
2325c349775eSScott Teel 	default:
2326a09c1441SScott Teel 		retry = 1;
2327c349775eSScott Teel 		break;
2328c349775eSScott Teel 	}
2329a09c1441SScott Teel 
2330a09c1441SScott Teel 	return retry;	/* retry on raid path? */
2331c349775eSScott Teel }
2332c349775eSScott Teel 
2333a58e7e53SWebb Scales static void hpsa_cmd_resolve_events(struct ctlr_info *h,
2334a58e7e53SWebb Scales 		struct CommandList *c)
2335a58e7e53SWebb Scales {
2336d604f533SWebb Scales 	bool do_wake = false;
2337d604f533SWebb Scales 
2338a58e7e53SWebb Scales 	/*
2339a58e7e53SWebb Scales 	 * Prevent the following race in the abort handler:
2340a58e7e53SWebb Scales 	 *
2341a58e7e53SWebb Scales 	 * 1. LLD is requested to abort a SCSI command
2342a58e7e53SWebb Scales 	 * 2. The SCSI command completes
2343a58e7e53SWebb Scales 	 * 3. The struct CommandList associated with step 2 is made available
2344a58e7e53SWebb Scales 	 * 4. New I/O request to LLD to another LUN re-uses struct CommandList
2345a58e7e53SWebb Scales 	 * 5. Abort handler follows scsi_cmnd->host_scribble and
2346a58e7e53SWebb Scales 	 *    finds struct CommandList and tries to aborts it
2347a58e7e53SWebb Scales 	 * Now we have aborted the wrong command.
2348a58e7e53SWebb Scales 	 *
2349d604f533SWebb Scales 	 * Reset c->scsi_cmd here so that the abort or reset handler will know
2350d604f533SWebb Scales 	 * this command has completed.  Then, check to see if the handler is
2351a58e7e53SWebb Scales 	 * waiting for this command, and, if so, wake it.
2352a58e7e53SWebb Scales 	 */
2353a58e7e53SWebb Scales 	c->scsi_cmd = SCSI_CMD_IDLE;
2354d604f533SWebb Scales 	mb();	/* Declare command idle before checking for pending events. */
2355a58e7e53SWebb Scales 	if (c->abort_pending) {
2356d604f533SWebb Scales 		do_wake = true;
2357a58e7e53SWebb Scales 		c->abort_pending = false;
2358a58e7e53SWebb Scales 	}
2359d604f533SWebb Scales 	if (c->reset_pending) {
2360d604f533SWebb Scales 		unsigned long flags;
2361d604f533SWebb Scales 		struct hpsa_scsi_dev_t *dev;
2362d604f533SWebb Scales 
2363d604f533SWebb Scales 		/*
2364d604f533SWebb Scales 		 * There appears to be a reset pending; lock the lock and
2365d604f533SWebb Scales 		 * reconfirm.  If so, then decrement the count of outstanding
2366d604f533SWebb Scales 		 * commands and wake the reset command if this is the last one.
2367d604f533SWebb Scales 		 */
2368d604f533SWebb Scales 		spin_lock_irqsave(&h->lock, flags);
2369d604f533SWebb Scales 		dev = c->reset_pending;		/* Re-fetch under the lock. */
2370d604f533SWebb Scales 		if (dev && atomic_dec_and_test(&dev->reset_cmds_out))
2371d604f533SWebb Scales 			do_wake = true;
2372d604f533SWebb Scales 		c->reset_pending = NULL;
2373d604f533SWebb Scales 		spin_unlock_irqrestore(&h->lock, flags);
2374d604f533SWebb Scales 	}
2375d604f533SWebb Scales 
2376d604f533SWebb Scales 	if (do_wake)
2377d604f533SWebb Scales 		wake_up_all(&h->event_sync_wait_queue);
2378a58e7e53SWebb Scales }
2379a58e7e53SWebb Scales 
238073153fe5SWebb Scales static void hpsa_cmd_resolve_and_free(struct ctlr_info *h,
238173153fe5SWebb Scales 				      struct CommandList *c)
238273153fe5SWebb Scales {
238373153fe5SWebb Scales 	hpsa_cmd_resolve_events(h, c);
238473153fe5SWebb Scales 	cmd_tagged_free(h, c);
238573153fe5SWebb Scales }
238673153fe5SWebb Scales 
23878a0ff92cSWebb Scales static void hpsa_cmd_free_and_done(struct ctlr_info *h,
23888a0ff92cSWebb Scales 		struct CommandList *c, struct scsi_cmnd *cmd)
23898a0ff92cSWebb Scales {
239073153fe5SWebb Scales 	hpsa_cmd_resolve_and_free(h, c);
2391*d49c2077SDon Brace 	if (cmd && cmd->scsi_done)
23928a0ff92cSWebb Scales 		cmd->scsi_done(cmd);
23938a0ff92cSWebb Scales }
23948a0ff92cSWebb Scales 
23958a0ff92cSWebb Scales static void hpsa_retry_cmd(struct ctlr_info *h, struct CommandList *c)
23968a0ff92cSWebb Scales {
23978a0ff92cSWebb Scales 	INIT_WORK(&c->work, hpsa_command_resubmit_worker);
23988a0ff92cSWebb Scales 	queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work);
23998a0ff92cSWebb Scales }
24008a0ff92cSWebb Scales 
2401a58e7e53SWebb Scales static void hpsa_set_scsi_cmd_aborted(struct scsi_cmnd *cmd)
2402a58e7e53SWebb Scales {
2403a58e7e53SWebb Scales 	cmd->result = DID_ABORT << 16;
2404a58e7e53SWebb Scales }
2405a58e7e53SWebb Scales 
2406a58e7e53SWebb Scales static void hpsa_cmd_abort_and_free(struct ctlr_info *h, struct CommandList *c,
2407a58e7e53SWebb Scales 				    struct scsi_cmnd *cmd)
2408a58e7e53SWebb Scales {
2409a58e7e53SWebb Scales 	hpsa_set_scsi_cmd_aborted(cmd);
2410a58e7e53SWebb Scales 	dev_warn(&h->pdev->dev, "CDB %16phN was aborted with status 0x%x\n",
2411a58e7e53SWebb Scales 			 c->Request.CDB, c->err_info->ScsiStatus);
241273153fe5SWebb Scales 	hpsa_cmd_resolve_and_free(h, c);
2413a58e7e53SWebb Scales }
2414a58e7e53SWebb Scales 
2415c349775eSScott Teel static void process_ioaccel2_completion(struct ctlr_info *h,
2416c349775eSScott Teel 		struct CommandList *c, struct scsi_cmnd *cmd,
2417c349775eSScott Teel 		struct hpsa_scsi_dev_t *dev)
2418c349775eSScott Teel {
2419c349775eSScott Teel 	struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
2420c349775eSScott Teel 
2421c349775eSScott Teel 	/* check for good status */
2422c349775eSScott Teel 	if (likely(c2->error_data.serv_response == 0 &&
24238a0ff92cSWebb Scales 			c2->error_data.status == 0))
24248a0ff92cSWebb Scales 		return hpsa_cmd_free_and_done(h, c, cmd);
2425c349775eSScott Teel 
24268a0ff92cSWebb Scales 	/*
24278a0ff92cSWebb Scales 	 * Any RAID offload error results in retry which will use
2428c349775eSScott Teel 	 * the normal I/O path so the controller can handle whatever's
2429c349775eSScott Teel 	 * wrong.
2430c349775eSScott Teel 	 */
2431f3f01730SKevin Barnett 	if (is_logical_device(dev) &&
2432c349775eSScott Teel 		c2->error_data.serv_response ==
2433c349775eSScott Teel 			IOACCEL2_SERV_RESPONSE_FAILURE) {
2434080ef1ccSDon Brace 		if (c2->error_data.status ==
2435064d1b1dSDon Brace 			IOACCEL2_STATUS_SR_IOACCEL_DISABLED) {
2436c349775eSScott Teel 			dev->offload_enabled = 0;
2437064d1b1dSDon Brace 			dev->offload_to_be_enabled = 0;
2438064d1b1dSDon Brace 		}
24398a0ff92cSWebb Scales 
24408a0ff92cSWebb Scales 		return hpsa_retry_cmd(h, c);
2441080ef1ccSDon Brace 	}
2442080ef1ccSDon Brace 
2443ba74fdc4SDon Brace 	if (handle_ioaccel_mode2_error(h, c, cmd, c2, dev))
24448a0ff92cSWebb Scales 		return hpsa_retry_cmd(h, c);
2445080ef1ccSDon Brace 
24468a0ff92cSWebb Scales 	return hpsa_cmd_free_and_done(h, c, cmd);
2447c349775eSScott Teel }
2448c349775eSScott Teel 
24499437ac43SStephen Cameron /* Returns 0 on success, < 0 otherwise. */
24509437ac43SStephen Cameron static int hpsa_evaluate_tmf_status(struct ctlr_info *h,
24519437ac43SStephen Cameron 					struct CommandList *cp)
24529437ac43SStephen Cameron {
24539437ac43SStephen Cameron 	u8 tmf_status = cp->err_info->ScsiStatus;
24549437ac43SStephen Cameron 
24559437ac43SStephen Cameron 	switch (tmf_status) {
24569437ac43SStephen Cameron 	case CISS_TMF_COMPLETE:
24579437ac43SStephen Cameron 		/*
24589437ac43SStephen Cameron 		 * CISS_TMF_COMPLETE never happens, instead,
24599437ac43SStephen Cameron 		 * ei->CommandStatus == 0 for this case.
24609437ac43SStephen Cameron 		 */
24619437ac43SStephen Cameron 	case CISS_TMF_SUCCESS:
24629437ac43SStephen Cameron 		return 0;
24639437ac43SStephen Cameron 	case CISS_TMF_INVALID_FRAME:
24649437ac43SStephen Cameron 	case CISS_TMF_NOT_SUPPORTED:
24659437ac43SStephen Cameron 	case CISS_TMF_FAILED:
24669437ac43SStephen Cameron 	case CISS_TMF_WRONG_LUN:
24679437ac43SStephen Cameron 	case CISS_TMF_OVERLAPPED_TAG:
24689437ac43SStephen Cameron 		break;
24699437ac43SStephen Cameron 	default:
24709437ac43SStephen Cameron 		dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n",
24719437ac43SStephen Cameron 				tmf_status);
24729437ac43SStephen Cameron 		break;
24739437ac43SStephen Cameron 	}
24749437ac43SStephen Cameron 	return -tmf_status;
24759437ac43SStephen Cameron }
24769437ac43SStephen Cameron 
24771fb011fbSStephen M. Cameron static void complete_scsi_command(struct CommandList *cp)
2478edd16368SStephen M. Cameron {
2479edd16368SStephen M. Cameron 	struct scsi_cmnd *cmd;
2480edd16368SStephen M. Cameron 	struct ctlr_info *h;
2481edd16368SStephen M. Cameron 	struct ErrorInfo *ei;
2482283b4a9bSStephen M. Cameron 	struct hpsa_scsi_dev_t *dev;
2483d9a729f3SWebb Scales 	struct io_accel2_cmd *c2;
2484edd16368SStephen M. Cameron 
24859437ac43SStephen Cameron 	u8 sense_key;
24869437ac43SStephen Cameron 	u8 asc;      /* additional sense code */
24879437ac43SStephen Cameron 	u8 ascq;     /* additional sense code qualifier */
2488db111e18SStephen M. Cameron 	unsigned long sense_data_size;
2489edd16368SStephen M. Cameron 
2490edd16368SStephen M. Cameron 	ei = cp->err_info;
24917fa3030cSStephen Cameron 	cmd = cp->scsi_cmd;
2492edd16368SStephen M. Cameron 	h = cp->h;
2493*d49c2077SDon Brace 
2494*d49c2077SDon Brace 	if (!cmd->device) {
2495*d49c2077SDon Brace 		cmd->result = DID_NO_CONNECT << 16;
2496*d49c2077SDon Brace 		return hpsa_cmd_free_and_done(h, cp, cmd);
2497*d49c2077SDon Brace 	}
2498*d49c2077SDon Brace 
2499283b4a9bSStephen M. Cameron 	dev = cmd->device->hostdata;
2500d9a729f3SWebb Scales 	c2 = &h->ioaccel2_cmd_pool[cp->cmdindex];
2501edd16368SStephen M. Cameron 
2502edd16368SStephen M. Cameron 	scsi_dma_unmap(cmd); /* undo the DMA mappings */
2503e1f7de0cSMatt Gates 	if ((cp->cmd_type == CMD_SCSI) &&
25042b08b3e9SDon Brace 		(le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries))
250533a2ffceSStephen M. Cameron 		hpsa_unmap_sg_chain_block(h, cp);
2506edd16368SStephen M. Cameron 
2507d9a729f3SWebb Scales 	if ((cp->cmd_type == CMD_IOACCEL2) &&
2508d9a729f3SWebb Scales 		(c2->sg[0].chain_indicator == IOACCEL2_CHAIN))
2509d9a729f3SWebb Scales 		hpsa_unmap_ioaccel2_sg_chain_block(h, c2);
2510d9a729f3SWebb Scales 
2511edd16368SStephen M. Cameron 	cmd->result = (DID_OK << 16); 		/* host byte */
2512edd16368SStephen M. Cameron 	cmd->result |= (COMMAND_COMPLETE << 8);	/* msg byte */
2513c349775eSScott Teel 
2514*d49c2077SDon Brace 	if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1) {
2515*d49c2077SDon Brace 		if (dev->physical_device && dev->expose_device &&
2516*d49c2077SDon Brace 			dev->removed) {
2517*d49c2077SDon Brace 			cmd->result = DID_NO_CONNECT << 16;
2518*d49c2077SDon Brace 			return hpsa_cmd_free_and_done(h, cp, cmd);
2519*d49c2077SDon Brace 		}
2520*d49c2077SDon Brace 		if (likely(cp->phys_disk != NULL))
252103383736SDon Brace 			atomic_dec(&cp->phys_disk->ioaccel_cmds_out);
2522*d49c2077SDon Brace 	}
252303383736SDon Brace 
252425163bd5SWebb Scales 	/*
252525163bd5SWebb Scales 	 * We check for lockup status here as it may be set for
252625163bd5SWebb Scales 	 * CMD_SCSI, CMD_IOACCEL1 and CMD_IOACCEL2 commands by
252725163bd5SWebb Scales 	 * fail_all_oustanding_cmds()
252825163bd5SWebb Scales 	 */
252925163bd5SWebb Scales 	if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) {
253025163bd5SWebb Scales 		/* DID_NO_CONNECT will prevent a retry */
253125163bd5SWebb Scales 		cmd->result = DID_NO_CONNECT << 16;
25328a0ff92cSWebb Scales 		return hpsa_cmd_free_and_done(h, cp, cmd);
253325163bd5SWebb Scales 	}
253425163bd5SWebb Scales 
2535d604f533SWebb Scales 	if ((unlikely(hpsa_is_pending_event(cp)))) {
2536d604f533SWebb Scales 		if (cp->reset_pending)
2537d604f533SWebb Scales 			return hpsa_cmd_resolve_and_free(h, cp);
2538d604f533SWebb Scales 		if (cp->abort_pending)
2539d604f533SWebb Scales 			return hpsa_cmd_abort_and_free(h, cp, cmd);
2540d604f533SWebb Scales 	}
2541d604f533SWebb Scales 
2542c349775eSScott Teel 	if (cp->cmd_type == CMD_IOACCEL2)
2543c349775eSScott Teel 		return process_ioaccel2_completion(h, cp, cmd, dev);
2544c349775eSScott Teel 
25456aa4c361SRobert Elliott 	scsi_set_resid(cmd, ei->ResidualCnt);
25468a0ff92cSWebb Scales 	if (ei->CommandStatus == 0)
25478a0ff92cSWebb Scales 		return hpsa_cmd_free_and_done(h, cp, cmd);
25486aa4c361SRobert Elliott 
2549e1f7de0cSMatt Gates 	/* For I/O accelerator commands, copy over some fields to the normal
2550e1f7de0cSMatt Gates 	 * CISS header used below for error handling.
2551e1f7de0cSMatt Gates 	 */
2552e1f7de0cSMatt Gates 	if (cp->cmd_type == CMD_IOACCEL1) {
2553e1f7de0cSMatt Gates 		struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex];
25542b08b3e9SDon Brace 		cp->Header.SGList = scsi_sg_count(cmd);
25552b08b3e9SDon Brace 		cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList);
25562b08b3e9SDon Brace 		cp->Request.CDBLen = le16_to_cpu(c->io_flags) &
25572b08b3e9SDon Brace 			IOACCEL1_IOFLAGS_CDBLEN_MASK;
255850a0decfSStephen M. Cameron 		cp->Header.tag = c->tag;
2559e1f7de0cSMatt Gates 		memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8);
2560e1f7de0cSMatt Gates 		memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen);
2561283b4a9bSStephen M. Cameron 
2562283b4a9bSStephen M. Cameron 		/* Any RAID offload error results in retry which will use
2563283b4a9bSStephen M. Cameron 		 * the normal I/O path so the controller can handle whatever's
2564283b4a9bSStephen M. Cameron 		 * wrong.
2565283b4a9bSStephen M. Cameron 		 */
2566f3f01730SKevin Barnett 		if (is_logical_device(dev)) {
2567283b4a9bSStephen M. Cameron 			if (ei->CommandStatus == CMD_IOACCEL_DISABLED)
2568283b4a9bSStephen M. Cameron 				dev->offload_enabled = 0;
25698a0ff92cSWebb Scales 			return hpsa_retry_cmd(h, cp);
2570283b4a9bSStephen M. Cameron 		}
2571e1f7de0cSMatt Gates 	}
2572e1f7de0cSMatt Gates 
2573edd16368SStephen M. Cameron 	/* an error has occurred */
2574edd16368SStephen M. Cameron 	switch (ei->CommandStatus) {
2575edd16368SStephen M. Cameron 
2576edd16368SStephen M. Cameron 	case CMD_TARGET_STATUS:
25779437ac43SStephen Cameron 		cmd->result |= ei->ScsiStatus;
25789437ac43SStephen Cameron 		/* copy the sense data */
25799437ac43SStephen Cameron 		if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
25809437ac43SStephen Cameron 			sense_data_size = SCSI_SENSE_BUFFERSIZE;
25819437ac43SStephen Cameron 		else
25829437ac43SStephen Cameron 			sense_data_size = sizeof(ei->SenseInfo);
25839437ac43SStephen Cameron 		if (ei->SenseLen < sense_data_size)
25849437ac43SStephen Cameron 			sense_data_size = ei->SenseLen;
25859437ac43SStephen Cameron 		memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
25869437ac43SStephen Cameron 		if (ei->ScsiStatus)
25879437ac43SStephen Cameron 			decode_sense_data(ei->SenseInfo, sense_data_size,
25889437ac43SStephen Cameron 				&sense_key, &asc, &ascq);
2589edd16368SStephen M. Cameron 		if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
25901d3b3609SMatt Gates 			if (sense_key == ABORTED_COMMAND) {
25912e311fbaSStephen M. Cameron 				cmd->result |= DID_SOFT_ERROR << 16;
25921d3b3609SMatt Gates 				break;
25931d3b3609SMatt Gates 			}
2594edd16368SStephen M. Cameron 			break;
2595edd16368SStephen M. Cameron 		}
2596edd16368SStephen M. Cameron 		/* Problem was not a check condition
2597edd16368SStephen M. Cameron 		 * Pass it up to the upper layers...
2598edd16368SStephen M. Cameron 		 */
2599edd16368SStephen M. Cameron 		if (ei->ScsiStatus) {
2600edd16368SStephen M. Cameron 			dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
2601edd16368SStephen M. Cameron 				"Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
2602edd16368SStephen M. Cameron 				"Returning result: 0x%x\n",
2603edd16368SStephen M. Cameron 				cp, ei->ScsiStatus,
2604edd16368SStephen M. Cameron 				sense_key, asc, ascq,
2605edd16368SStephen M. Cameron 				cmd->result);
2606edd16368SStephen M. Cameron 		} else {  /* scsi status is zero??? How??? */
2607edd16368SStephen M. Cameron 			dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
2608edd16368SStephen M. Cameron 				"Returning no connection.\n", cp),
2609edd16368SStephen M. Cameron 
2610edd16368SStephen M. Cameron 			/* Ordinarily, this case should never happen,
2611edd16368SStephen M. Cameron 			 * but there is a bug in some released firmware
2612edd16368SStephen M. Cameron 			 * revisions that allows it to happen if, for
2613edd16368SStephen M. Cameron 			 * example, a 4100 backplane loses power and
2614edd16368SStephen M. Cameron 			 * the tape drive is in it.  We assume that
2615edd16368SStephen M. Cameron 			 * it's a fatal error of some kind because we
2616edd16368SStephen M. Cameron 			 * can't show that it wasn't. We will make it
2617edd16368SStephen M. Cameron 			 * look like selection timeout since that is
2618edd16368SStephen M. Cameron 			 * the most common reason for this to occur,
2619edd16368SStephen M. Cameron 			 * and it's severe enough.
2620edd16368SStephen M. Cameron 			 */
2621edd16368SStephen M. Cameron 
2622edd16368SStephen M. Cameron 			cmd->result = DID_NO_CONNECT << 16;
2623edd16368SStephen M. Cameron 		}
2624edd16368SStephen M. Cameron 		break;
2625edd16368SStephen M. Cameron 
2626edd16368SStephen M. Cameron 	case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2627edd16368SStephen M. Cameron 		break;
2628edd16368SStephen M. Cameron 	case CMD_DATA_OVERRUN:
2629f42e81e1SStephen Cameron 		dev_warn(&h->pdev->dev,
2630f42e81e1SStephen Cameron 			"CDB %16phN data overrun\n", cp->Request.CDB);
2631edd16368SStephen M. Cameron 		break;
2632edd16368SStephen M. Cameron 	case CMD_INVALID: {
2633edd16368SStephen M. Cameron 		/* print_bytes(cp, sizeof(*cp), 1, 0);
2634edd16368SStephen M. Cameron 		print_cmd(cp); */
2635edd16368SStephen M. Cameron 		/* We get CMD_INVALID if you address a non-existent device
2636edd16368SStephen M. Cameron 		 * instead of a selection timeout (no response).  You will
2637edd16368SStephen M. Cameron 		 * see this if you yank out a drive, then try to access it.
2638edd16368SStephen M. Cameron 		 * This is kind of a shame because it means that any other
2639edd16368SStephen M. Cameron 		 * CMD_INVALID (e.g. driver bug) will get interpreted as a
2640edd16368SStephen M. Cameron 		 * missing target. */
2641edd16368SStephen M. Cameron 		cmd->result = DID_NO_CONNECT << 16;
2642edd16368SStephen M. Cameron 	}
2643edd16368SStephen M. Cameron 		break;
2644edd16368SStephen M. Cameron 	case CMD_PROTOCOL_ERR:
2645256d0eaaSStephen M. Cameron 		cmd->result = DID_ERROR << 16;
2646f42e81e1SStephen Cameron 		dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n",
2647f42e81e1SStephen Cameron 				cp->Request.CDB);
2648edd16368SStephen M. Cameron 		break;
2649edd16368SStephen M. Cameron 	case CMD_HARDWARE_ERR:
2650edd16368SStephen M. Cameron 		cmd->result = DID_ERROR << 16;
2651f42e81e1SStephen Cameron 		dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n",
2652f42e81e1SStephen Cameron 			cp->Request.CDB);
2653edd16368SStephen M. Cameron 		break;
2654edd16368SStephen M. Cameron 	case CMD_CONNECTION_LOST:
2655edd16368SStephen M. Cameron 		cmd->result = DID_ERROR << 16;
2656f42e81e1SStephen Cameron 		dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n",
2657f42e81e1SStephen Cameron 			cp->Request.CDB);
2658edd16368SStephen M. Cameron 		break;
2659edd16368SStephen M. Cameron 	case CMD_ABORTED:
2660a58e7e53SWebb Scales 		/* Return now to avoid calling scsi_done(). */
2661a58e7e53SWebb Scales 		return hpsa_cmd_abort_and_free(h, cp, cmd);
2662edd16368SStephen M. Cameron 	case CMD_ABORT_FAILED:
2663edd16368SStephen M. Cameron 		cmd->result = DID_ERROR << 16;
2664f42e81e1SStephen Cameron 		dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n",
2665f42e81e1SStephen Cameron 			cp->Request.CDB);
2666edd16368SStephen M. Cameron 		break;
2667edd16368SStephen M. Cameron 	case CMD_UNSOLICITED_ABORT:
2668f6e76055SStephen M. Cameron 		cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
2669f42e81e1SStephen Cameron 		dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n",
2670f42e81e1SStephen Cameron 			cp->Request.CDB);
2671edd16368SStephen M. Cameron 		break;
2672edd16368SStephen M. Cameron 	case CMD_TIMEOUT:
2673edd16368SStephen M. Cameron 		cmd->result = DID_TIME_OUT << 16;
2674f42e81e1SStephen Cameron 		dev_warn(&h->pdev->dev, "CDB %16phN timed out\n",
2675f42e81e1SStephen Cameron 			cp->Request.CDB);
2676edd16368SStephen M. Cameron 		break;
26771d5e2ed0SStephen M. Cameron 	case CMD_UNABORTABLE:
26781d5e2ed0SStephen M. Cameron 		cmd->result = DID_ERROR << 16;
26791d5e2ed0SStephen M. Cameron 		dev_warn(&h->pdev->dev, "Command unabortable\n");
26801d5e2ed0SStephen M. Cameron 		break;
26819437ac43SStephen Cameron 	case CMD_TMF_STATUS:
26829437ac43SStephen Cameron 		if (hpsa_evaluate_tmf_status(h, cp)) /* TMF failed? */
26839437ac43SStephen Cameron 			cmd->result = DID_ERROR << 16;
26849437ac43SStephen Cameron 		break;
2685283b4a9bSStephen M. Cameron 	case CMD_IOACCEL_DISABLED:
2686283b4a9bSStephen M. Cameron 		/* This only handles the direct pass-through case since RAID
2687283b4a9bSStephen M. Cameron 		 * offload is handled above.  Just attempt a retry.
2688283b4a9bSStephen M. Cameron 		 */
2689283b4a9bSStephen M. Cameron 		cmd->result = DID_SOFT_ERROR << 16;
2690283b4a9bSStephen M. Cameron 		dev_warn(&h->pdev->dev,
2691283b4a9bSStephen M. Cameron 				"cp %p had HP SSD Smart Path error\n", cp);
2692283b4a9bSStephen M. Cameron 		break;
2693edd16368SStephen M. Cameron 	default:
2694edd16368SStephen M. Cameron 		cmd->result = DID_ERROR << 16;
2695edd16368SStephen M. Cameron 		dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
2696edd16368SStephen M. Cameron 				cp, ei->CommandStatus);
2697edd16368SStephen M. Cameron 	}
26988a0ff92cSWebb Scales 
26998a0ff92cSWebb Scales 	return hpsa_cmd_free_and_done(h, cp, cmd);
2700edd16368SStephen M. Cameron }
2701edd16368SStephen M. Cameron 
2702edd16368SStephen M. Cameron static void hpsa_pci_unmap(struct pci_dev *pdev,
2703edd16368SStephen M. Cameron 	struct CommandList *c, int sg_used, int data_direction)
2704edd16368SStephen M. Cameron {
2705edd16368SStephen M. Cameron 	int i;
2706edd16368SStephen M. Cameron 
270750a0decfSStephen M. Cameron 	for (i = 0; i < sg_used; i++)
270850a0decfSStephen M. Cameron 		pci_unmap_single(pdev, (dma_addr_t) le64_to_cpu(c->SG[i].Addr),
270950a0decfSStephen M. Cameron 				le32_to_cpu(c->SG[i].Len),
2710edd16368SStephen M. Cameron 				data_direction);
2711edd16368SStephen M. Cameron }
2712edd16368SStephen M. Cameron 
2713a2dac136SStephen M. Cameron static int hpsa_map_one(struct pci_dev *pdev,
2714edd16368SStephen M. Cameron 		struct CommandList *cp,
2715edd16368SStephen M. Cameron 		unsigned char *buf,
2716edd16368SStephen M. Cameron 		size_t buflen,
2717edd16368SStephen M. Cameron 		int data_direction)
2718edd16368SStephen M. Cameron {
271901a02ffcSStephen M. Cameron 	u64 addr64;
2720edd16368SStephen M. Cameron 
2721edd16368SStephen M. Cameron 	if (buflen == 0 || data_direction == PCI_DMA_NONE) {
2722edd16368SStephen M. Cameron 		cp->Header.SGList = 0;
272350a0decfSStephen M. Cameron 		cp->Header.SGTotal = cpu_to_le16(0);
2724a2dac136SStephen M. Cameron 		return 0;
2725edd16368SStephen M. Cameron 	}
2726edd16368SStephen M. Cameron 
272750a0decfSStephen M. Cameron 	addr64 = pci_map_single(pdev, buf, buflen, data_direction);
2728eceaae18SShuah Khan 	if (dma_mapping_error(&pdev->dev, addr64)) {
2729a2dac136SStephen M. Cameron 		/* Prevent subsequent unmap of something never mapped */
2730eceaae18SShuah Khan 		cp->Header.SGList = 0;
273150a0decfSStephen M. Cameron 		cp->Header.SGTotal = cpu_to_le16(0);
2732a2dac136SStephen M. Cameron 		return -1;
2733eceaae18SShuah Khan 	}
273450a0decfSStephen M. Cameron 	cp->SG[0].Addr = cpu_to_le64(addr64);
273550a0decfSStephen M. Cameron 	cp->SG[0].Len = cpu_to_le32(buflen);
273650a0decfSStephen M. Cameron 	cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */
273750a0decfSStephen M. Cameron 	cp->Header.SGList = 1;   /* no. SGs contig in this cmd */
273850a0decfSStephen M. Cameron 	cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */
2739a2dac136SStephen M. Cameron 	return 0;
2740edd16368SStephen M. Cameron }
2741edd16368SStephen M. Cameron 
274225163bd5SWebb Scales #define NO_TIMEOUT ((unsigned long) -1)
274325163bd5SWebb Scales #define DEFAULT_TIMEOUT 30000 /* milliseconds */
274425163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
274525163bd5SWebb Scales 	struct CommandList *c, int reply_queue, unsigned long timeout_msecs)
2746edd16368SStephen M. Cameron {
2747edd16368SStephen M. Cameron 	DECLARE_COMPLETION_ONSTACK(wait);
2748edd16368SStephen M. Cameron 
2749edd16368SStephen M. Cameron 	c->waiting = &wait;
275025163bd5SWebb Scales 	__enqueue_cmd_and_start_io(h, c, reply_queue);
275125163bd5SWebb Scales 	if (timeout_msecs == NO_TIMEOUT) {
275225163bd5SWebb Scales 		/* TODO: get rid of this no-timeout thing */
275325163bd5SWebb Scales 		wait_for_completion_io(&wait);
275425163bd5SWebb Scales 		return IO_OK;
275525163bd5SWebb Scales 	}
275625163bd5SWebb Scales 	if (!wait_for_completion_io_timeout(&wait,
275725163bd5SWebb Scales 					msecs_to_jiffies(timeout_msecs))) {
275825163bd5SWebb Scales 		dev_warn(&h->pdev->dev, "Command timed out.\n");
275925163bd5SWebb Scales 		return -ETIMEDOUT;
276025163bd5SWebb Scales 	}
276125163bd5SWebb Scales 	return IO_OK;
276225163bd5SWebb Scales }
276325163bd5SWebb Scales 
276425163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c,
276525163bd5SWebb Scales 				   int reply_queue, unsigned long timeout_msecs)
276625163bd5SWebb Scales {
276725163bd5SWebb Scales 	if (unlikely(lockup_detected(h))) {
276825163bd5SWebb Scales 		c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
276925163bd5SWebb Scales 		return IO_OK;
277025163bd5SWebb Scales 	}
277125163bd5SWebb Scales 	return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs);
2772edd16368SStephen M. Cameron }
2773edd16368SStephen M. Cameron 
2774094963daSStephen M. Cameron static u32 lockup_detected(struct ctlr_info *h)
2775094963daSStephen M. Cameron {
2776094963daSStephen M. Cameron 	int cpu;
2777094963daSStephen M. Cameron 	u32 rc, *lockup_detected;
2778094963daSStephen M. Cameron 
2779094963daSStephen M. Cameron 	cpu = get_cpu();
2780094963daSStephen M. Cameron 	lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
2781094963daSStephen M. Cameron 	rc = *lockup_detected;
2782094963daSStephen M. Cameron 	put_cpu();
2783094963daSStephen M. Cameron 	return rc;
2784094963daSStephen M. Cameron }
2785094963daSStephen M. Cameron 
27869c2fc160SStephen M. Cameron #define MAX_DRIVER_CMD_RETRIES 25
278725163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
278825163bd5SWebb Scales 	struct CommandList *c, int data_direction, unsigned long timeout_msecs)
2789edd16368SStephen M. Cameron {
27909c2fc160SStephen M. Cameron 	int backoff_time = 10, retry_count = 0;
279125163bd5SWebb Scales 	int rc;
2792edd16368SStephen M. Cameron 
2793edd16368SStephen M. Cameron 	do {
27947630abd0SJoe Perches 		memset(c->err_info, 0, sizeof(*c->err_info));
279525163bd5SWebb Scales 		rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
279625163bd5SWebb Scales 						  timeout_msecs);
279725163bd5SWebb Scales 		if (rc)
279825163bd5SWebb Scales 			break;
2799edd16368SStephen M. Cameron 		retry_count++;
28009c2fc160SStephen M. Cameron 		if (retry_count > 3) {
28019c2fc160SStephen M. Cameron 			msleep(backoff_time);
28029c2fc160SStephen M. Cameron 			if (backoff_time < 1000)
28039c2fc160SStephen M. Cameron 				backoff_time *= 2;
28049c2fc160SStephen M. Cameron 		}
2805852af20aSMatt Bondurant 	} while ((check_for_unit_attention(h, c) ||
28069c2fc160SStephen M. Cameron 			check_for_busy(h, c)) &&
28079c2fc160SStephen M. Cameron 			retry_count <= MAX_DRIVER_CMD_RETRIES);
2808edd16368SStephen M. Cameron 	hpsa_pci_unmap(h->pdev, c, 1, data_direction);
280925163bd5SWebb Scales 	if (retry_count > MAX_DRIVER_CMD_RETRIES)
281025163bd5SWebb Scales 		rc = -EIO;
281125163bd5SWebb Scales 	return rc;
2812edd16368SStephen M. Cameron }
2813edd16368SStephen M. Cameron 
2814d1e8beacSStephen M. Cameron static void hpsa_print_cmd(struct ctlr_info *h, char *txt,
2815d1e8beacSStephen M. Cameron 				struct CommandList *c)
2816edd16368SStephen M. Cameron {
2817d1e8beacSStephen M. Cameron 	const u8 *cdb = c->Request.CDB;
2818d1e8beacSStephen M. Cameron 	const u8 *lun = c->Header.LUN.LunAddrBytes;
2819edd16368SStephen M. Cameron 
2820d1e8beacSStephen M. Cameron 	dev_warn(&h->pdev->dev, "%s: LUN:%02x%02x%02x%02x%02x%02x%02x%02x"
2821d1e8beacSStephen M. Cameron 	" CDB:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x\n",
2822d1e8beacSStephen M. Cameron 		txt, lun[0], lun[1], lun[2], lun[3],
2823d1e8beacSStephen M. Cameron 		lun[4], lun[5], lun[6], lun[7],
2824d1e8beacSStephen M. Cameron 		cdb[0], cdb[1], cdb[2], cdb[3],
2825d1e8beacSStephen M. Cameron 		cdb[4], cdb[5], cdb[6], cdb[7],
2826d1e8beacSStephen M. Cameron 		cdb[8], cdb[9], cdb[10], cdb[11],
2827d1e8beacSStephen M. Cameron 		cdb[12], cdb[13], cdb[14], cdb[15]);
2828d1e8beacSStephen M. Cameron }
2829d1e8beacSStephen M. Cameron 
2830d1e8beacSStephen M. Cameron static void hpsa_scsi_interpret_error(struct ctlr_info *h,
2831d1e8beacSStephen M. Cameron 			struct CommandList *cp)
2832d1e8beacSStephen M. Cameron {
2833d1e8beacSStephen M. Cameron 	const struct ErrorInfo *ei = cp->err_info;
2834d1e8beacSStephen M. Cameron 	struct device *d = &cp->h->pdev->dev;
28359437ac43SStephen Cameron 	u8 sense_key, asc, ascq;
28369437ac43SStephen Cameron 	int sense_len;
2837d1e8beacSStephen M. Cameron 
2838edd16368SStephen M. Cameron 	switch (ei->CommandStatus) {
2839edd16368SStephen M. Cameron 	case CMD_TARGET_STATUS:
28409437ac43SStephen Cameron 		if (ei->SenseLen > sizeof(ei->SenseInfo))
28419437ac43SStephen Cameron 			sense_len = sizeof(ei->SenseInfo);
28429437ac43SStephen Cameron 		else
28439437ac43SStephen Cameron 			sense_len = ei->SenseLen;
28449437ac43SStephen Cameron 		decode_sense_data(ei->SenseInfo, sense_len,
28459437ac43SStephen Cameron 					&sense_key, &asc, &ascq);
2846d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "SCSI status", cp);
2847d1e8beacSStephen M. Cameron 		if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION)
28489437ac43SStephen Cameron 			dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n",
28499437ac43SStephen Cameron 				sense_key, asc, ascq);
2850d1e8beacSStephen M. Cameron 		else
28519437ac43SStephen Cameron 			dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus);
2852edd16368SStephen M. Cameron 		if (ei->ScsiStatus == 0)
2853edd16368SStephen M. Cameron 			dev_warn(d, "SCSI status is abnormally zero.  "
2854edd16368SStephen M. Cameron 			"(probably indicates selection timeout "
2855edd16368SStephen M. Cameron 			"reported incorrectly due to a known "
2856edd16368SStephen M. Cameron 			"firmware bug, circa July, 2001.)\n");
2857edd16368SStephen M. Cameron 		break;
2858edd16368SStephen M. Cameron 	case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2859edd16368SStephen M. Cameron 		break;
2860edd16368SStephen M. Cameron 	case CMD_DATA_OVERRUN:
2861d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "overrun condition", cp);
2862edd16368SStephen M. Cameron 		break;
2863edd16368SStephen M. Cameron 	case CMD_INVALID: {
2864edd16368SStephen M. Cameron 		/* controller unfortunately reports SCSI passthru's
2865edd16368SStephen M. Cameron 		 * to non-existent targets as invalid commands.
2866edd16368SStephen M. Cameron 		 */
2867d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "invalid command", cp);
2868d1e8beacSStephen M. Cameron 		dev_warn(d, "probably means device no longer present\n");
2869edd16368SStephen M. Cameron 		}
2870edd16368SStephen M. Cameron 		break;
2871edd16368SStephen M. Cameron 	case CMD_PROTOCOL_ERR:
2872d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "protocol error", cp);
2873edd16368SStephen M. Cameron 		break;
2874edd16368SStephen M. Cameron 	case CMD_HARDWARE_ERR:
2875d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "hardware error", cp);
2876edd16368SStephen M. Cameron 		break;
2877edd16368SStephen M. Cameron 	case CMD_CONNECTION_LOST:
2878d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "connection lost", cp);
2879edd16368SStephen M. Cameron 		break;
2880edd16368SStephen M. Cameron 	case CMD_ABORTED:
2881d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "aborted", cp);
2882edd16368SStephen M. Cameron 		break;
2883edd16368SStephen M. Cameron 	case CMD_ABORT_FAILED:
2884d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "abort failed", cp);
2885edd16368SStephen M. Cameron 		break;
2886edd16368SStephen M. Cameron 	case CMD_UNSOLICITED_ABORT:
2887d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "unsolicited abort", cp);
2888edd16368SStephen M. Cameron 		break;
2889edd16368SStephen M. Cameron 	case CMD_TIMEOUT:
2890d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "timed out", cp);
2891edd16368SStephen M. Cameron 		break;
28921d5e2ed0SStephen M. Cameron 	case CMD_UNABORTABLE:
2893d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "unabortable", cp);
28941d5e2ed0SStephen M. Cameron 		break;
289525163bd5SWebb Scales 	case CMD_CTLR_LOCKUP:
289625163bd5SWebb Scales 		hpsa_print_cmd(h, "controller lockup detected", cp);
289725163bd5SWebb Scales 		break;
2898edd16368SStephen M. Cameron 	default:
2899d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "unknown status", cp);
2900d1e8beacSStephen M. Cameron 		dev_warn(d, "Unknown command status %x\n",
2901edd16368SStephen M. Cameron 				ei->CommandStatus);
2902edd16368SStephen M. Cameron 	}
2903edd16368SStephen M. Cameron }
2904edd16368SStephen M. Cameron 
2905edd16368SStephen M. Cameron static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
2906b7bb24ebSStephen M. Cameron 			u16 page, unsigned char *buf,
2907edd16368SStephen M. Cameron 			unsigned char bufsize)
2908edd16368SStephen M. Cameron {
2909edd16368SStephen M. Cameron 	int rc = IO_OK;
2910edd16368SStephen M. Cameron 	struct CommandList *c;
2911edd16368SStephen M. Cameron 	struct ErrorInfo *ei;
2912edd16368SStephen M. Cameron 
291345fcb86eSStephen Cameron 	c = cmd_alloc(h);
2914edd16368SStephen M. Cameron 
2915a2dac136SStephen M. Cameron 	if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize,
2916a2dac136SStephen M. Cameron 			page, scsi3addr, TYPE_CMD)) {
2917a2dac136SStephen M. Cameron 		rc = -1;
2918a2dac136SStephen M. Cameron 		goto out;
2919a2dac136SStephen M. Cameron 	}
292025163bd5SWebb Scales 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
2921c448ecfaSDon Brace 					PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT);
292225163bd5SWebb Scales 	if (rc)
292325163bd5SWebb Scales 		goto out;
2924edd16368SStephen M. Cameron 	ei = c->err_info;
2925edd16368SStephen M. Cameron 	if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
2926d1e8beacSStephen M. Cameron 		hpsa_scsi_interpret_error(h, c);
2927edd16368SStephen M. Cameron 		rc = -1;
2928edd16368SStephen M. Cameron 	}
2929a2dac136SStephen M. Cameron out:
293045fcb86eSStephen Cameron 	cmd_free(h, c);
2931edd16368SStephen M. Cameron 	return rc;
2932edd16368SStephen M. Cameron }
2933edd16368SStephen M. Cameron 
2934bf711ac6SScott Teel static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr,
293525163bd5SWebb Scales 	u8 reset_type, int reply_queue)
2936edd16368SStephen M. Cameron {
2937edd16368SStephen M. Cameron 	int rc = IO_OK;
2938edd16368SStephen M. Cameron 	struct CommandList *c;
2939edd16368SStephen M. Cameron 	struct ErrorInfo *ei;
2940edd16368SStephen M. Cameron 
294145fcb86eSStephen Cameron 	c = cmd_alloc(h);
2942edd16368SStephen M. Cameron 
2943edd16368SStephen M. Cameron 
2944a2dac136SStephen M. Cameron 	/* fill_cmd can't fail here, no data buffer to map. */
29450b9b7b6eSScott Teel 	(void) fill_cmd(c, reset_type, h, NULL, 0, 0,
2946bf711ac6SScott Teel 			scsi3addr, TYPE_MSG);
2947c448ecfaSDon Brace 	rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT);
294825163bd5SWebb Scales 	if (rc) {
294925163bd5SWebb Scales 		dev_warn(&h->pdev->dev, "Failed to send reset command\n");
295025163bd5SWebb Scales 		goto out;
295125163bd5SWebb Scales 	}
2952edd16368SStephen M. Cameron 	/* no unmap needed here because no data xfer. */
2953edd16368SStephen M. Cameron 
2954edd16368SStephen M. Cameron 	ei = c->err_info;
2955edd16368SStephen M. Cameron 	if (ei->CommandStatus != 0) {
2956d1e8beacSStephen M. Cameron 		hpsa_scsi_interpret_error(h, c);
2957edd16368SStephen M. Cameron 		rc = -1;
2958edd16368SStephen M. Cameron 	}
295925163bd5SWebb Scales out:
296045fcb86eSStephen Cameron 	cmd_free(h, c);
2961edd16368SStephen M. Cameron 	return rc;
2962edd16368SStephen M. Cameron }
2963edd16368SStephen M. Cameron 
2964d604f533SWebb Scales static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c,
2965d604f533SWebb Scales 			       struct hpsa_scsi_dev_t *dev,
2966d604f533SWebb Scales 			       unsigned char *scsi3addr)
2967d604f533SWebb Scales {
2968d604f533SWebb Scales 	int i;
2969d604f533SWebb Scales 	bool match = false;
2970d604f533SWebb Scales 	struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
2971d604f533SWebb Scales 	struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2;
2972d604f533SWebb Scales 
2973d604f533SWebb Scales 	if (hpsa_is_cmd_idle(c))
2974d604f533SWebb Scales 		return false;
2975d604f533SWebb Scales 
2976d604f533SWebb Scales 	switch (c->cmd_type) {
2977d604f533SWebb Scales 	case CMD_SCSI:
2978d604f533SWebb Scales 	case CMD_IOCTL_PEND:
2979d604f533SWebb Scales 		match = !memcmp(scsi3addr, &c->Header.LUN.LunAddrBytes,
2980d604f533SWebb Scales 				sizeof(c->Header.LUN.LunAddrBytes));
2981d604f533SWebb Scales 		break;
2982d604f533SWebb Scales 
2983d604f533SWebb Scales 	case CMD_IOACCEL1:
2984d604f533SWebb Scales 	case CMD_IOACCEL2:
2985d604f533SWebb Scales 		if (c->phys_disk == dev) {
2986d604f533SWebb Scales 			/* HBA mode match */
2987d604f533SWebb Scales 			match = true;
2988d604f533SWebb Scales 		} else {
2989d604f533SWebb Scales 			/* Possible RAID mode -- check each phys dev. */
2990d604f533SWebb Scales 			/* FIXME:  Do we need to take out a lock here?  If
2991d604f533SWebb Scales 			 * so, we could just call hpsa_get_pdisk_of_ioaccel2()
2992d604f533SWebb Scales 			 * instead. */
2993d604f533SWebb Scales 			for (i = 0; i < dev->nphysical_disks && !match; i++) {
2994d604f533SWebb Scales 				/* FIXME: an alternate test might be
2995d604f533SWebb Scales 				 *
2996d604f533SWebb Scales 				 * match = dev->phys_disk[i]->ioaccel_handle
2997d604f533SWebb Scales 				 *              == c2->scsi_nexus;      */
2998d604f533SWebb Scales 				match = dev->phys_disk[i] == c->phys_disk;
2999d604f533SWebb Scales 			}
3000d604f533SWebb Scales 		}
3001d604f533SWebb Scales 		break;
3002d604f533SWebb Scales 
3003d604f533SWebb Scales 	case IOACCEL2_TMF:
3004d604f533SWebb Scales 		for (i = 0; i < dev->nphysical_disks && !match; i++) {
3005d604f533SWebb Scales 			match = dev->phys_disk[i]->ioaccel_handle ==
3006d604f533SWebb Scales 					le32_to_cpu(ac->it_nexus);
3007d604f533SWebb Scales 		}
3008d604f533SWebb Scales 		break;
3009d604f533SWebb Scales 
3010d604f533SWebb Scales 	case 0:		/* The command is in the middle of being initialized. */
3011d604f533SWebb Scales 		match = false;
3012d604f533SWebb Scales 		break;
3013d604f533SWebb Scales 
3014d604f533SWebb Scales 	default:
3015d604f533SWebb Scales 		dev_err(&h->pdev->dev, "unexpected cmd_type: %d\n",
3016d604f533SWebb Scales 			c->cmd_type);
3017d604f533SWebb Scales 		BUG();
3018d604f533SWebb Scales 	}
3019d604f533SWebb Scales 
3020d604f533SWebb Scales 	return match;
3021d604f533SWebb Scales }
3022d604f533SWebb Scales 
3023d604f533SWebb Scales static int hpsa_do_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev,
3024d604f533SWebb Scales 	unsigned char *scsi3addr, u8 reset_type, int reply_queue)
3025d604f533SWebb Scales {
3026d604f533SWebb Scales 	int i;
3027d604f533SWebb Scales 	int rc = 0;
3028d604f533SWebb Scales 
3029d604f533SWebb Scales 	/* We can really only handle one reset at a time */
3030d604f533SWebb Scales 	if (mutex_lock_interruptible(&h->reset_mutex) == -EINTR) {
3031d604f533SWebb Scales 		dev_warn(&h->pdev->dev, "concurrent reset wait interrupted.\n");
3032d604f533SWebb Scales 		return -EINTR;
3033d604f533SWebb Scales 	}
3034d604f533SWebb Scales 
3035d604f533SWebb Scales 	BUG_ON(atomic_read(&dev->reset_cmds_out) != 0);
3036d604f533SWebb Scales 
3037d604f533SWebb Scales 	for (i = 0; i < h->nr_cmds; i++) {
3038d604f533SWebb Scales 		struct CommandList *c = h->cmd_pool + i;
3039d604f533SWebb Scales 		int refcount = atomic_inc_return(&c->refcount);
3040d604f533SWebb Scales 
3041d604f533SWebb Scales 		if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, scsi3addr)) {
3042d604f533SWebb Scales 			unsigned long flags;
3043d604f533SWebb Scales 
3044d604f533SWebb Scales 			/*
3045d604f533SWebb Scales 			 * Mark the target command as having a reset pending,
3046d604f533SWebb Scales 			 * then lock a lock so that the command cannot complete
3047d604f533SWebb Scales 			 * while we're considering it.  If the command is not
3048d604f533SWebb Scales 			 * idle then count it; otherwise revoke the event.
3049d604f533SWebb Scales 			 */
3050d604f533SWebb Scales 			c->reset_pending = dev;
3051d604f533SWebb Scales 			spin_lock_irqsave(&h->lock, flags);	/* Implied MB */
3052d604f533SWebb Scales 			if (!hpsa_is_cmd_idle(c))
3053d604f533SWebb Scales 				atomic_inc(&dev->reset_cmds_out);
3054d604f533SWebb Scales 			else
3055d604f533SWebb Scales 				c->reset_pending = NULL;
3056d604f533SWebb Scales 			spin_unlock_irqrestore(&h->lock, flags);
3057d604f533SWebb Scales 		}
3058d604f533SWebb Scales 
3059d604f533SWebb Scales 		cmd_free(h, c);
3060d604f533SWebb Scales 	}
3061d604f533SWebb Scales 
3062d604f533SWebb Scales 	rc = hpsa_send_reset(h, scsi3addr, reset_type, reply_queue);
3063d604f533SWebb Scales 	if (!rc)
3064d604f533SWebb Scales 		wait_event(h->event_sync_wait_queue,
3065d604f533SWebb Scales 			atomic_read(&dev->reset_cmds_out) == 0 ||
3066d604f533SWebb Scales 			lockup_detected(h));
3067d604f533SWebb Scales 
3068d604f533SWebb Scales 	if (unlikely(lockup_detected(h))) {
3069d604f533SWebb Scales 		dev_warn(&h->pdev->dev,
3070d604f533SWebb Scales 			 "Controller lockup detected during reset wait\n");
3071d604f533SWebb Scales 		rc = -ENODEV;
3072d604f533SWebb Scales 	}
3073d604f533SWebb Scales 
3074d604f533SWebb Scales 	if (unlikely(rc))
3075d604f533SWebb Scales 		atomic_set(&dev->reset_cmds_out, 0);
3076d604f533SWebb Scales 
3077d604f533SWebb Scales 	mutex_unlock(&h->reset_mutex);
3078d604f533SWebb Scales 	return rc;
3079d604f533SWebb Scales }
3080d604f533SWebb Scales 
3081edd16368SStephen M. Cameron static void hpsa_get_raid_level(struct ctlr_info *h,
3082edd16368SStephen M. Cameron 	unsigned char *scsi3addr, unsigned char *raid_level)
3083edd16368SStephen M. Cameron {
3084edd16368SStephen M. Cameron 	int rc;
3085edd16368SStephen M. Cameron 	unsigned char *buf;
3086edd16368SStephen M. Cameron 
3087edd16368SStephen M. Cameron 	*raid_level = RAID_UNKNOWN;
3088edd16368SStephen M. Cameron 	buf = kzalloc(64, GFP_KERNEL);
3089edd16368SStephen M. Cameron 	if (!buf)
3090edd16368SStephen M. Cameron 		return;
3091b7bb24ebSStephen M. Cameron 	rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 0xC1, buf, 64);
3092edd16368SStephen M. Cameron 	if (rc == 0)
3093edd16368SStephen M. Cameron 		*raid_level = buf[8];
3094edd16368SStephen M. Cameron 	if (*raid_level > RAID_UNKNOWN)
3095edd16368SStephen M. Cameron 		*raid_level = RAID_UNKNOWN;
3096edd16368SStephen M. Cameron 	kfree(buf);
3097edd16368SStephen M. Cameron 	return;
3098edd16368SStephen M. Cameron }
3099edd16368SStephen M. Cameron 
3100283b4a9bSStephen M. Cameron #define HPSA_MAP_DEBUG
3101283b4a9bSStephen M. Cameron #ifdef HPSA_MAP_DEBUG
3102283b4a9bSStephen M. Cameron static void hpsa_debug_map_buff(struct ctlr_info *h, int rc,
3103283b4a9bSStephen M. Cameron 				struct raid_map_data *map_buff)
3104283b4a9bSStephen M. Cameron {
3105283b4a9bSStephen M. Cameron 	struct raid_map_disk_data *dd = &map_buff->data[0];
3106283b4a9bSStephen M. Cameron 	int map, row, col;
3107283b4a9bSStephen M. Cameron 	u16 map_cnt, row_cnt, disks_per_row;
3108283b4a9bSStephen M. Cameron 
3109283b4a9bSStephen M. Cameron 	if (rc != 0)
3110283b4a9bSStephen M. Cameron 		return;
3111283b4a9bSStephen M. Cameron 
31122ba8bfc8SStephen M. Cameron 	/* Show details only if debugging has been activated. */
31132ba8bfc8SStephen M. Cameron 	if (h->raid_offload_debug < 2)
31142ba8bfc8SStephen M. Cameron 		return;
31152ba8bfc8SStephen M. Cameron 
3116283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "structure_size = %u\n",
3117283b4a9bSStephen M. Cameron 				le32_to_cpu(map_buff->structure_size));
3118283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "volume_blk_size = %u\n",
3119283b4a9bSStephen M. Cameron 			le32_to_cpu(map_buff->volume_blk_size));
3120283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n",
3121283b4a9bSStephen M. Cameron 			le64_to_cpu(map_buff->volume_blk_cnt));
3122283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "physicalBlockShift = %u\n",
3123283b4a9bSStephen M. Cameron 			map_buff->phys_blk_shift);
3124283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n",
3125283b4a9bSStephen M. Cameron 			map_buff->parity_rotation_shift);
3126283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "strip_size = %u\n",
3127283b4a9bSStephen M. Cameron 			le16_to_cpu(map_buff->strip_size));
3128283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n",
3129283b4a9bSStephen M. Cameron 			le64_to_cpu(map_buff->disk_starting_blk));
3130283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n",
3131283b4a9bSStephen M. Cameron 			le64_to_cpu(map_buff->disk_blk_cnt));
3132283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "data_disks_per_row = %u\n",
3133283b4a9bSStephen M. Cameron 			le16_to_cpu(map_buff->data_disks_per_row));
3134283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n",
3135283b4a9bSStephen M. Cameron 			le16_to_cpu(map_buff->metadata_disks_per_row));
3136283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "row_cnt = %u\n",
3137283b4a9bSStephen M. Cameron 			le16_to_cpu(map_buff->row_cnt));
3138283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "layout_map_count = %u\n",
3139283b4a9bSStephen M. Cameron 			le16_to_cpu(map_buff->layout_map_count));
31402b08b3e9SDon Brace 	dev_info(&h->pdev->dev, "flags = 0x%x\n",
3141dd0e19f3SScott Teel 			le16_to_cpu(map_buff->flags));
31422b08b3e9SDon Brace 	dev_info(&h->pdev->dev, "encrypytion = %s\n",
31432b08b3e9SDon Brace 			le16_to_cpu(map_buff->flags) &
31442b08b3e9SDon Brace 			RAID_MAP_FLAG_ENCRYPT_ON ?  "ON" : "OFF");
3145dd0e19f3SScott Teel 	dev_info(&h->pdev->dev, "dekindex = %u\n",
3146dd0e19f3SScott Teel 			le16_to_cpu(map_buff->dekindex));
3147283b4a9bSStephen M. Cameron 	map_cnt = le16_to_cpu(map_buff->layout_map_count);
3148283b4a9bSStephen M. Cameron 	for (map = 0; map < map_cnt; map++) {
3149283b4a9bSStephen M. Cameron 		dev_info(&h->pdev->dev, "Map%u:\n", map);
3150283b4a9bSStephen M. Cameron 		row_cnt = le16_to_cpu(map_buff->row_cnt);
3151283b4a9bSStephen M. Cameron 		for (row = 0; row < row_cnt; row++) {
3152283b4a9bSStephen M. Cameron 			dev_info(&h->pdev->dev, "  Row%u:\n", row);
3153283b4a9bSStephen M. Cameron 			disks_per_row =
3154283b4a9bSStephen M. Cameron 				le16_to_cpu(map_buff->data_disks_per_row);
3155283b4a9bSStephen M. Cameron 			for (col = 0; col < disks_per_row; col++, dd++)
3156283b4a9bSStephen M. Cameron 				dev_info(&h->pdev->dev,
3157283b4a9bSStephen M. Cameron 					"    D%02u: h=0x%04x xor=%u,%u\n",
3158283b4a9bSStephen M. Cameron 					col, dd->ioaccel_handle,
3159283b4a9bSStephen M. Cameron 					dd->xor_mult[0], dd->xor_mult[1]);
3160283b4a9bSStephen M. Cameron 			disks_per_row =
3161283b4a9bSStephen M. Cameron 				le16_to_cpu(map_buff->metadata_disks_per_row);
3162283b4a9bSStephen M. Cameron 			for (col = 0; col < disks_per_row; col++, dd++)
3163283b4a9bSStephen M. Cameron 				dev_info(&h->pdev->dev,
3164283b4a9bSStephen M. Cameron 					"    M%02u: h=0x%04x xor=%u,%u\n",
3165283b4a9bSStephen M. Cameron 					col, dd->ioaccel_handle,
3166283b4a9bSStephen M. Cameron 					dd->xor_mult[0], dd->xor_mult[1]);
3167283b4a9bSStephen M. Cameron 		}
3168283b4a9bSStephen M. Cameron 	}
3169283b4a9bSStephen M. Cameron }
3170283b4a9bSStephen M. Cameron #else
3171283b4a9bSStephen M. Cameron static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h,
3172283b4a9bSStephen M. Cameron 			__attribute__((unused)) int rc,
3173283b4a9bSStephen M. Cameron 			__attribute__((unused)) struct raid_map_data *map_buff)
3174283b4a9bSStephen M. Cameron {
3175283b4a9bSStephen M. Cameron }
3176283b4a9bSStephen M. Cameron #endif
3177283b4a9bSStephen M. Cameron 
3178283b4a9bSStephen M. Cameron static int hpsa_get_raid_map(struct ctlr_info *h,
3179283b4a9bSStephen M. Cameron 	unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
3180283b4a9bSStephen M. Cameron {
3181283b4a9bSStephen M. Cameron 	int rc = 0;
3182283b4a9bSStephen M. Cameron 	struct CommandList *c;
3183283b4a9bSStephen M. Cameron 	struct ErrorInfo *ei;
3184283b4a9bSStephen M. Cameron 
318545fcb86eSStephen Cameron 	c = cmd_alloc(h);
3186bf43caf3SRobert Elliott 
3187283b4a9bSStephen M. Cameron 	if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map,
3188283b4a9bSStephen M. Cameron 			sizeof(this_device->raid_map), 0,
3189283b4a9bSStephen M. Cameron 			scsi3addr, TYPE_CMD)) {
31902dd02d74SRobert Elliott 		dev_warn(&h->pdev->dev, "hpsa_get_raid_map fill_cmd failed\n");
31912dd02d74SRobert Elliott 		cmd_free(h, c);
31922dd02d74SRobert Elliott 		return -1;
3193283b4a9bSStephen M. Cameron 	}
319425163bd5SWebb Scales 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
3195c448ecfaSDon Brace 					PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT);
319625163bd5SWebb Scales 	if (rc)
319725163bd5SWebb Scales 		goto out;
3198283b4a9bSStephen M. Cameron 	ei = c->err_info;
3199283b4a9bSStephen M. Cameron 	if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3200d1e8beacSStephen M. Cameron 		hpsa_scsi_interpret_error(h, c);
320125163bd5SWebb Scales 		rc = -1;
320225163bd5SWebb Scales 		goto out;
3203283b4a9bSStephen M. Cameron 	}
320445fcb86eSStephen Cameron 	cmd_free(h, c);
3205283b4a9bSStephen M. Cameron 
3206283b4a9bSStephen M. Cameron 	/* @todo in the future, dynamically allocate RAID map memory */
3207283b4a9bSStephen M. Cameron 	if (le32_to_cpu(this_device->raid_map.structure_size) >
3208283b4a9bSStephen M. Cameron 				sizeof(this_device->raid_map)) {
3209283b4a9bSStephen M. Cameron 		dev_warn(&h->pdev->dev, "RAID map size is too large!\n");
3210283b4a9bSStephen M. Cameron 		rc = -1;
3211283b4a9bSStephen M. Cameron 	}
3212283b4a9bSStephen M. Cameron 	hpsa_debug_map_buff(h, rc, &this_device->raid_map);
3213283b4a9bSStephen M. Cameron 	return rc;
321425163bd5SWebb Scales out:
321525163bd5SWebb Scales 	cmd_free(h, c);
321625163bd5SWebb Scales 	return rc;
3217283b4a9bSStephen M. Cameron }
3218283b4a9bSStephen M. Cameron 
3219d04e62b9SKevin Barnett static int hpsa_bmic_sense_subsystem_information(struct ctlr_info *h,
3220d04e62b9SKevin Barnett 		unsigned char scsi3addr[], u16 bmic_device_index,
3221d04e62b9SKevin Barnett 		struct bmic_sense_subsystem_info *buf, size_t bufsize)
3222d04e62b9SKevin Barnett {
3223d04e62b9SKevin Barnett 	int rc = IO_OK;
3224d04e62b9SKevin Barnett 	struct CommandList *c;
3225d04e62b9SKevin Barnett 	struct ErrorInfo *ei;
3226d04e62b9SKevin Barnett 
3227d04e62b9SKevin Barnett 	c = cmd_alloc(h);
3228d04e62b9SKevin Barnett 
3229d04e62b9SKevin Barnett 	rc = fill_cmd(c, BMIC_SENSE_SUBSYSTEM_INFORMATION, h, buf, bufsize,
3230d04e62b9SKevin Barnett 		0, RAID_CTLR_LUNID, TYPE_CMD);
3231d04e62b9SKevin Barnett 	if (rc)
3232d04e62b9SKevin Barnett 		goto out;
3233d04e62b9SKevin Barnett 
3234d04e62b9SKevin Barnett 	c->Request.CDB[2] = bmic_device_index & 0xff;
3235d04e62b9SKevin Barnett 	c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff;
3236d04e62b9SKevin Barnett 
3237d04e62b9SKevin Barnett 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
3238c448ecfaSDon Brace 				PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT);
3239d04e62b9SKevin Barnett 	if (rc)
3240d04e62b9SKevin Barnett 		goto out;
3241d04e62b9SKevin Barnett 	ei = c->err_info;
3242d04e62b9SKevin Barnett 	if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3243d04e62b9SKevin Barnett 		hpsa_scsi_interpret_error(h, c);
3244d04e62b9SKevin Barnett 		rc = -1;
3245d04e62b9SKevin Barnett 	}
3246d04e62b9SKevin Barnett out:
3247d04e62b9SKevin Barnett 	cmd_free(h, c);
3248d04e62b9SKevin Barnett 	return rc;
3249d04e62b9SKevin Barnett }
3250d04e62b9SKevin Barnett 
325166749d0dSScott Teel static int hpsa_bmic_id_controller(struct ctlr_info *h,
325266749d0dSScott Teel 	struct bmic_identify_controller *buf, size_t bufsize)
325366749d0dSScott Teel {
325466749d0dSScott Teel 	int rc = IO_OK;
325566749d0dSScott Teel 	struct CommandList *c;
325666749d0dSScott Teel 	struct ErrorInfo *ei;
325766749d0dSScott Teel 
325866749d0dSScott Teel 	c = cmd_alloc(h);
325966749d0dSScott Teel 
326066749d0dSScott Teel 	rc = fill_cmd(c, BMIC_IDENTIFY_CONTROLLER, h, buf, bufsize,
326166749d0dSScott Teel 		0, RAID_CTLR_LUNID, TYPE_CMD);
326266749d0dSScott Teel 	if (rc)
326366749d0dSScott Teel 		goto out;
326466749d0dSScott Teel 
326566749d0dSScott Teel 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
3266c448ecfaSDon Brace 		PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT);
326766749d0dSScott Teel 	if (rc)
326866749d0dSScott Teel 		goto out;
326966749d0dSScott Teel 	ei = c->err_info;
327066749d0dSScott Teel 	if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
327166749d0dSScott Teel 		hpsa_scsi_interpret_error(h, c);
327266749d0dSScott Teel 		rc = -1;
327366749d0dSScott Teel 	}
327466749d0dSScott Teel out:
327566749d0dSScott Teel 	cmd_free(h, c);
327666749d0dSScott Teel 	return rc;
327766749d0dSScott Teel }
327866749d0dSScott Teel 
327903383736SDon Brace static int hpsa_bmic_id_physical_device(struct ctlr_info *h,
328003383736SDon Brace 		unsigned char scsi3addr[], u16 bmic_device_index,
328103383736SDon Brace 		struct bmic_identify_physical_device *buf, size_t bufsize)
328203383736SDon Brace {
328303383736SDon Brace 	int rc = IO_OK;
328403383736SDon Brace 	struct CommandList *c;
328503383736SDon Brace 	struct ErrorInfo *ei;
328603383736SDon Brace 
328703383736SDon Brace 	c = cmd_alloc(h);
328803383736SDon Brace 	rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize,
328903383736SDon Brace 		0, RAID_CTLR_LUNID, TYPE_CMD);
329003383736SDon Brace 	if (rc)
329103383736SDon Brace 		goto out;
329203383736SDon Brace 
329303383736SDon Brace 	c->Request.CDB[2] = bmic_device_index & 0xff;
329403383736SDon Brace 	c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff;
329503383736SDon Brace 
329625163bd5SWebb Scales 	hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE,
3297c448ecfaSDon Brace 						DEFAULT_TIMEOUT);
329803383736SDon Brace 	ei = c->err_info;
329903383736SDon Brace 	if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
330003383736SDon Brace 		hpsa_scsi_interpret_error(h, c);
330103383736SDon Brace 		rc = -1;
330203383736SDon Brace 	}
330303383736SDon Brace out:
330403383736SDon Brace 	cmd_free(h, c);
3305d04e62b9SKevin Barnett 
330603383736SDon Brace 	return rc;
330703383736SDon Brace }
330803383736SDon Brace 
3309cca8f13bSDon Brace /*
3310cca8f13bSDon Brace  * get enclosure information
3311cca8f13bSDon Brace  * struct ReportExtendedLUNdata *rlep - Used for BMIC drive number
3312cca8f13bSDon Brace  * struct hpsa_scsi_dev_t *encl_dev - device entry for enclosure
3313cca8f13bSDon Brace  * Uses id_physical_device to determine the box_index.
3314cca8f13bSDon Brace  */
3315cca8f13bSDon Brace static void hpsa_get_enclosure_info(struct ctlr_info *h,
3316cca8f13bSDon Brace 			unsigned char *scsi3addr,
3317cca8f13bSDon Brace 			struct ReportExtendedLUNdata *rlep, int rle_index,
3318cca8f13bSDon Brace 			struct hpsa_scsi_dev_t *encl_dev)
3319cca8f13bSDon Brace {
3320cca8f13bSDon Brace 	int rc = -1;
3321cca8f13bSDon Brace 	struct CommandList *c = NULL;
3322cca8f13bSDon Brace 	struct ErrorInfo *ei = NULL;
3323cca8f13bSDon Brace 	struct bmic_sense_storage_box_params *bssbp = NULL;
3324cca8f13bSDon Brace 	struct bmic_identify_physical_device *id_phys = NULL;
3325cca8f13bSDon Brace 	struct ext_report_lun_entry *rle = &rlep->LUN[rle_index];
3326cca8f13bSDon Brace 	u16 bmic_device_index = 0;
3327cca8f13bSDon Brace 
3328cca8f13bSDon Brace 	bmic_device_index = GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]);
3329cca8f13bSDon Brace 
333017a9e54aSDon Brace 	if (bmic_device_index == 0xFF00 || MASKED_DEVICE(&rle->lunid[0])) {
333117a9e54aSDon Brace 		rc = IO_OK;
3332cca8f13bSDon Brace 		goto out;
333317a9e54aSDon Brace 	}
3334cca8f13bSDon Brace 
3335cca8f13bSDon Brace 	bssbp = kzalloc(sizeof(*bssbp), GFP_KERNEL);
3336cca8f13bSDon Brace 	if (!bssbp)
3337cca8f13bSDon Brace 		goto out;
3338cca8f13bSDon Brace 
3339cca8f13bSDon Brace 	id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
3340cca8f13bSDon Brace 	if (!id_phys)
3341cca8f13bSDon Brace 		goto out;
3342cca8f13bSDon Brace 
3343cca8f13bSDon Brace 	rc = hpsa_bmic_id_physical_device(h, scsi3addr, bmic_device_index,
3344cca8f13bSDon Brace 						id_phys, sizeof(*id_phys));
3345cca8f13bSDon Brace 	if (rc) {
3346cca8f13bSDon Brace 		dev_warn(&h->pdev->dev, "%s: id_phys failed %d bdi[0x%x]\n",
3347cca8f13bSDon Brace 			__func__, encl_dev->external, bmic_device_index);
3348cca8f13bSDon Brace 		goto out;
3349cca8f13bSDon Brace 	}
3350cca8f13bSDon Brace 
3351cca8f13bSDon Brace 	c = cmd_alloc(h);
3352cca8f13bSDon Brace 
3353cca8f13bSDon Brace 	rc = fill_cmd(c, BMIC_SENSE_STORAGE_BOX_PARAMS, h, bssbp,
3354cca8f13bSDon Brace 			sizeof(*bssbp), 0, RAID_CTLR_LUNID, TYPE_CMD);
3355cca8f13bSDon Brace 
3356cca8f13bSDon Brace 	if (rc)
3357cca8f13bSDon Brace 		goto out;
3358cca8f13bSDon Brace 
3359cca8f13bSDon Brace 	if (id_phys->phys_connector[1] == 'E')
3360cca8f13bSDon Brace 		c->Request.CDB[5] = id_phys->box_index;
3361cca8f13bSDon Brace 	else
3362cca8f13bSDon Brace 		c->Request.CDB[5] = 0;
3363cca8f13bSDon Brace 
3364cca8f13bSDon Brace 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE,
3365c448ecfaSDon Brace 						DEFAULT_TIMEOUT);
3366cca8f13bSDon Brace 	if (rc)
3367cca8f13bSDon Brace 		goto out;
3368cca8f13bSDon Brace 
3369cca8f13bSDon Brace 	ei = c->err_info;
3370cca8f13bSDon Brace 	if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3371cca8f13bSDon Brace 		rc = -1;
3372cca8f13bSDon Brace 		goto out;
3373cca8f13bSDon Brace 	}
3374cca8f13bSDon Brace 
3375cca8f13bSDon Brace 	encl_dev->box[id_phys->active_path_number] = bssbp->phys_box_on_port;
3376cca8f13bSDon Brace 	memcpy(&encl_dev->phys_connector[id_phys->active_path_number],
3377cca8f13bSDon Brace 		bssbp->phys_connector, sizeof(bssbp->phys_connector));
3378cca8f13bSDon Brace 
3379cca8f13bSDon Brace 	rc = IO_OK;
3380cca8f13bSDon Brace out:
3381cca8f13bSDon Brace 	kfree(bssbp);
3382cca8f13bSDon Brace 	kfree(id_phys);
3383cca8f13bSDon Brace 
3384cca8f13bSDon Brace 	if (c)
3385cca8f13bSDon Brace 		cmd_free(h, c);
3386cca8f13bSDon Brace 
3387cca8f13bSDon Brace 	if (rc != IO_OK)
3388cca8f13bSDon Brace 		hpsa_show_dev_msg(KERN_INFO, h, encl_dev,
3389cca8f13bSDon Brace 			"Error, could not get enclosure information\n");
3390cca8f13bSDon Brace }
3391cca8f13bSDon Brace 
3392d04e62b9SKevin Barnett static u64 hpsa_get_sas_address_from_report_physical(struct ctlr_info *h,
3393d04e62b9SKevin Barnett 						unsigned char *scsi3addr)
3394d04e62b9SKevin Barnett {
3395d04e62b9SKevin Barnett 	struct ReportExtendedLUNdata *physdev;
3396d04e62b9SKevin Barnett 	u32 nphysicals;
3397d04e62b9SKevin Barnett 	u64 sa = 0;
3398d04e62b9SKevin Barnett 	int i;
3399d04e62b9SKevin Barnett 
3400d04e62b9SKevin Barnett 	physdev = kzalloc(sizeof(*physdev), GFP_KERNEL);
3401d04e62b9SKevin Barnett 	if (!physdev)
3402d04e62b9SKevin Barnett 		return 0;
3403d04e62b9SKevin Barnett 
3404d04e62b9SKevin Barnett 	if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) {
3405d04e62b9SKevin Barnett 		dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
3406d04e62b9SKevin Barnett 		kfree(physdev);
3407d04e62b9SKevin Barnett 		return 0;
3408d04e62b9SKevin Barnett 	}
3409d04e62b9SKevin Barnett 	nphysicals = get_unaligned_be32(physdev->LUNListLength) / 24;
3410d04e62b9SKevin Barnett 
3411d04e62b9SKevin Barnett 	for (i = 0; i < nphysicals; i++)
3412d04e62b9SKevin Barnett 		if (!memcmp(&physdev->LUN[i].lunid[0], scsi3addr, 8)) {
3413d04e62b9SKevin Barnett 			sa = get_unaligned_be64(&physdev->LUN[i].wwid[0]);
3414d04e62b9SKevin Barnett 			break;
3415d04e62b9SKevin Barnett 		}
3416d04e62b9SKevin Barnett 
3417d04e62b9SKevin Barnett 	kfree(physdev);
3418d04e62b9SKevin Barnett 
3419d04e62b9SKevin Barnett 	return sa;
3420d04e62b9SKevin Barnett }
3421d04e62b9SKevin Barnett 
3422d04e62b9SKevin Barnett static void hpsa_get_sas_address(struct ctlr_info *h, unsigned char *scsi3addr,
3423d04e62b9SKevin Barnett 					struct hpsa_scsi_dev_t *dev)
3424d04e62b9SKevin Barnett {
3425d04e62b9SKevin Barnett 	int rc;
3426d04e62b9SKevin Barnett 	u64 sa = 0;
3427d04e62b9SKevin Barnett 
3428d04e62b9SKevin Barnett 	if (is_hba_lunid(scsi3addr)) {
3429d04e62b9SKevin Barnett 		struct bmic_sense_subsystem_info *ssi;
3430d04e62b9SKevin Barnett 
3431d04e62b9SKevin Barnett 		ssi = kzalloc(sizeof(*ssi), GFP_KERNEL);
3432d04e62b9SKevin Barnett 		if (ssi == NULL) {
3433d04e62b9SKevin Barnett 			dev_warn(&h->pdev->dev,
3434d04e62b9SKevin Barnett 				"%s: out of memory\n", __func__);
3435d04e62b9SKevin Barnett 			return;
3436d04e62b9SKevin Barnett 		}
3437d04e62b9SKevin Barnett 
3438d04e62b9SKevin Barnett 		rc = hpsa_bmic_sense_subsystem_information(h,
3439d04e62b9SKevin Barnett 					scsi3addr, 0, ssi, sizeof(*ssi));
3440d04e62b9SKevin Barnett 		if (rc == 0) {
3441d04e62b9SKevin Barnett 			sa = get_unaligned_be64(ssi->primary_world_wide_id);
3442d04e62b9SKevin Barnett 			h->sas_address = sa;
3443d04e62b9SKevin Barnett 		}
3444d04e62b9SKevin Barnett 
3445d04e62b9SKevin Barnett 		kfree(ssi);
3446d04e62b9SKevin Barnett 	} else
3447d04e62b9SKevin Barnett 		sa = hpsa_get_sas_address_from_report_physical(h, scsi3addr);
3448d04e62b9SKevin Barnett 
3449d04e62b9SKevin Barnett 	dev->sas_address = sa;
3450d04e62b9SKevin Barnett }
3451d04e62b9SKevin Barnett 
3452d04e62b9SKevin Barnett /* Get a device id from inquiry page 0x83 */
34531b70150aSStephen M. Cameron static int hpsa_vpd_page_supported(struct ctlr_info *h,
34541b70150aSStephen M. Cameron 	unsigned char scsi3addr[], u8 page)
34551b70150aSStephen M. Cameron {
34561b70150aSStephen M. Cameron 	int rc;
34571b70150aSStephen M. Cameron 	int i;
34581b70150aSStephen M. Cameron 	int pages;
34591b70150aSStephen M. Cameron 	unsigned char *buf, bufsize;
34601b70150aSStephen M. Cameron 
34611b70150aSStephen M. Cameron 	buf = kzalloc(256, GFP_KERNEL);
34621b70150aSStephen M. Cameron 	if (!buf)
34631b70150aSStephen M. Cameron 		return 0;
34641b70150aSStephen M. Cameron 
34651b70150aSStephen M. Cameron 	/* Get the size of the page list first */
34661b70150aSStephen M. Cameron 	rc = hpsa_scsi_do_inquiry(h, scsi3addr,
34671b70150aSStephen M. Cameron 				VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
34681b70150aSStephen M. Cameron 				buf, HPSA_VPD_HEADER_SZ);
34691b70150aSStephen M. Cameron 	if (rc != 0)
34701b70150aSStephen M. Cameron 		goto exit_unsupported;
34711b70150aSStephen M. Cameron 	pages = buf[3];
34721b70150aSStephen M. Cameron 	if ((pages + HPSA_VPD_HEADER_SZ) <= 255)
34731b70150aSStephen M. Cameron 		bufsize = pages + HPSA_VPD_HEADER_SZ;
34741b70150aSStephen M. Cameron 	else
34751b70150aSStephen M. Cameron 		bufsize = 255;
34761b70150aSStephen M. Cameron 
34771b70150aSStephen M. Cameron 	/* Get the whole VPD page list */
34781b70150aSStephen M. Cameron 	rc = hpsa_scsi_do_inquiry(h, scsi3addr,
34791b70150aSStephen M. Cameron 				VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
34801b70150aSStephen M. Cameron 				buf, bufsize);
34811b70150aSStephen M. Cameron 	if (rc != 0)
34821b70150aSStephen M. Cameron 		goto exit_unsupported;
34831b70150aSStephen M. Cameron 
34841b70150aSStephen M. Cameron 	pages = buf[3];
34851b70150aSStephen M. Cameron 	for (i = 1; i <= pages; i++)
34861b70150aSStephen M. Cameron 		if (buf[3 + i] == page)
34871b70150aSStephen M. Cameron 			goto exit_supported;
34881b70150aSStephen M. Cameron exit_unsupported:
34891b70150aSStephen M. Cameron 	kfree(buf);
34901b70150aSStephen M. Cameron 	return 0;
34911b70150aSStephen M. Cameron exit_supported:
34921b70150aSStephen M. Cameron 	kfree(buf);
34931b70150aSStephen M. Cameron 	return 1;
34941b70150aSStephen M. Cameron }
34951b70150aSStephen M. Cameron 
3496283b4a9bSStephen M. Cameron static void hpsa_get_ioaccel_status(struct ctlr_info *h,
3497283b4a9bSStephen M. Cameron 	unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
3498283b4a9bSStephen M. Cameron {
3499283b4a9bSStephen M. Cameron 	int rc;
3500283b4a9bSStephen M. Cameron 	unsigned char *buf;
3501283b4a9bSStephen M. Cameron 	u8 ioaccel_status;
3502283b4a9bSStephen M. Cameron 
3503283b4a9bSStephen M. Cameron 	this_device->offload_config = 0;
3504283b4a9bSStephen M. Cameron 	this_device->offload_enabled = 0;
350541ce4c35SStephen Cameron 	this_device->offload_to_be_enabled = 0;
3506283b4a9bSStephen M. Cameron 
3507283b4a9bSStephen M. Cameron 	buf = kzalloc(64, GFP_KERNEL);
3508283b4a9bSStephen M. Cameron 	if (!buf)
3509283b4a9bSStephen M. Cameron 		return;
35101b70150aSStephen M. Cameron 	if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS))
35111b70150aSStephen M. Cameron 		goto out;
3512283b4a9bSStephen M. Cameron 	rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3513b7bb24ebSStephen M. Cameron 			VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64);
3514283b4a9bSStephen M. Cameron 	if (rc != 0)
3515283b4a9bSStephen M. Cameron 		goto out;
3516283b4a9bSStephen M. Cameron 
3517283b4a9bSStephen M. Cameron #define IOACCEL_STATUS_BYTE 4
3518283b4a9bSStephen M. Cameron #define OFFLOAD_CONFIGURED_BIT 0x01
3519283b4a9bSStephen M. Cameron #define OFFLOAD_ENABLED_BIT 0x02
3520283b4a9bSStephen M. Cameron 	ioaccel_status = buf[IOACCEL_STATUS_BYTE];
3521283b4a9bSStephen M. Cameron 	this_device->offload_config =
3522283b4a9bSStephen M. Cameron 		!!(ioaccel_status & OFFLOAD_CONFIGURED_BIT);
3523283b4a9bSStephen M. Cameron 	if (this_device->offload_config) {
3524283b4a9bSStephen M. Cameron 		this_device->offload_enabled =
3525283b4a9bSStephen M. Cameron 			!!(ioaccel_status & OFFLOAD_ENABLED_BIT);
3526283b4a9bSStephen M. Cameron 		if (hpsa_get_raid_map(h, scsi3addr, this_device))
3527283b4a9bSStephen M. Cameron 			this_device->offload_enabled = 0;
3528283b4a9bSStephen M. Cameron 	}
352941ce4c35SStephen Cameron 	this_device->offload_to_be_enabled = this_device->offload_enabled;
3530283b4a9bSStephen M. Cameron out:
3531283b4a9bSStephen M. Cameron 	kfree(buf);
3532283b4a9bSStephen M. Cameron 	return;
3533283b4a9bSStephen M. Cameron }
3534283b4a9bSStephen M. Cameron 
3535edd16368SStephen M. Cameron /* Get the device id from inquiry page 0x83 */
3536edd16368SStephen M. Cameron static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
353775d23d89SDon Brace 	unsigned char *device_id, int index, int buflen)
3538edd16368SStephen M. Cameron {
3539edd16368SStephen M. Cameron 	int rc;
3540edd16368SStephen M. Cameron 	unsigned char *buf;
3541edd16368SStephen M. Cameron 
3542edd16368SStephen M. Cameron 	if (buflen > 16)
3543edd16368SStephen M. Cameron 		buflen = 16;
3544edd16368SStephen M. Cameron 	buf = kzalloc(64, GFP_KERNEL);
3545edd16368SStephen M. Cameron 	if (!buf)
3546a84d794dSStephen M. Cameron 		return -ENOMEM;
3547b7bb24ebSStephen M. Cameron 	rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 0x83, buf, 64);
3548edd16368SStephen M. Cameron 	if (rc == 0)
354975d23d89SDon Brace 		memcpy(device_id, &buf[index], buflen);
355075d23d89SDon Brace 
3551edd16368SStephen M. Cameron 	kfree(buf);
355275d23d89SDon Brace 
3553edd16368SStephen M. Cameron 	return rc != 0;
3554edd16368SStephen M. Cameron }
3555edd16368SStephen M. Cameron 
3556edd16368SStephen M. Cameron static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
355703383736SDon Brace 		void *buf, int bufsize,
3558edd16368SStephen M. Cameron 		int extended_response)
3559edd16368SStephen M. Cameron {
3560edd16368SStephen M. Cameron 	int rc = IO_OK;
3561edd16368SStephen M. Cameron 	struct CommandList *c;
3562edd16368SStephen M. Cameron 	unsigned char scsi3addr[8];
3563edd16368SStephen M. Cameron 	struct ErrorInfo *ei;
3564edd16368SStephen M. Cameron 
356545fcb86eSStephen Cameron 	c = cmd_alloc(h);
3566bf43caf3SRobert Elliott 
3567e89c0ae7SStephen M. Cameron 	/* address the controller */
3568e89c0ae7SStephen M. Cameron 	memset(scsi3addr, 0, sizeof(scsi3addr));
3569a2dac136SStephen M. Cameron 	if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
3570a2dac136SStephen M. Cameron 		buf, bufsize, 0, scsi3addr, TYPE_CMD)) {
3571a2dac136SStephen M. Cameron 		rc = -1;
3572a2dac136SStephen M. Cameron 		goto out;
3573a2dac136SStephen M. Cameron 	}
3574edd16368SStephen M. Cameron 	if (extended_response)
3575edd16368SStephen M. Cameron 		c->Request.CDB[1] = extended_response;
357625163bd5SWebb Scales 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
3577c448ecfaSDon Brace 					PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT);
357825163bd5SWebb Scales 	if (rc)
357925163bd5SWebb Scales 		goto out;
3580edd16368SStephen M. Cameron 	ei = c->err_info;
3581edd16368SStephen M. Cameron 	if (ei->CommandStatus != 0 &&
3582edd16368SStephen M. Cameron 	    ei->CommandStatus != CMD_DATA_UNDERRUN) {
3583d1e8beacSStephen M. Cameron 		hpsa_scsi_interpret_error(h, c);
3584edd16368SStephen M. Cameron 		rc = -1;
3585283b4a9bSStephen M. Cameron 	} else {
358603383736SDon Brace 		struct ReportLUNdata *rld = buf;
358703383736SDon Brace 
358803383736SDon Brace 		if (rld->extended_response_flag != extended_response) {
3589283b4a9bSStephen M. Cameron 			dev_err(&h->pdev->dev,
3590283b4a9bSStephen M. Cameron 				"report luns requested format %u, got %u\n",
3591283b4a9bSStephen M. Cameron 				extended_response,
359203383736SDon Brace 				rld->extended_response_flag);
3593283b4a9bSStephen M. Cameron 			rc = -1;
3594283b4a9bSStephen M. Cameron 		}
3595edd16368SStephen M. Cameron 	}
3596a2dac136SStephen M. Cameron out:
359745fcb86eSStephen Cameron 	cmd_free(h, c);
3598edd16368SStephen M. Cameron 	return rc;
3599edd16368SStephen M. Cameron }
3600edd16368SStephen M. Cameron 
3601edd16368SStephen M. Cameron static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
360203383736SDon Brace 		struct ReportExtendedLUNdata *buf, int bufsize)
3603edd16368SStephen M. Cameron {
360403383736SDon Brace 	return hpsa_scsi_do_report_luns(h, 0, buf, bufsize,
360503383736SDon Brace 						HPSA_REPORT_PHYS_EXTENDED);
3606edd16368SStephen M. Cameron }
3607edd16368SStephen M. Cameron 
3608edd16368SStephen M. Cameron static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
3609edd16368SStephen M. Cameron 		struct ReportLUNdata *buf, int bufsize)
3610edd16368SStephen M. Cameron {
3611edd16368SStephen M. Cameron 	return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
3612edd16368SStephen M. Cameron }
3613edd16368SStephen M. Cameron 
3614edd16368SStephen M. Cameron static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
3615edd16368SStephen M. Cameron 	int bus, int target, int lun)
3616edd16368SStephen M. Cameron {
3617edd16368SStephen M. Cameron 	device->bus = bus;
3618edd16368SStephen M. Cameron 	device->target = target;
3619edd16368SStephen M. Cameron 	device->lun = lun;
3620edd16368SStephen M. Cameron }
3621edd16368SStephen M. Cameron 
36229846590eSStephen M. Cameron /* Use VPD inquiry to get details of volume status */
36239846590eSStephen M. Cameron static int hpsa_get_volume_status(struct ctlr_info *h,
36249846590eSStephen M. Cameron 					unsigned char scsi3addr[])
36259846590eSStephen M. Cameron {
36269846590eSStephen M. Cameron 	int rc;
36279846590eSStephen M. Cameron 	int status;
36289846590eSStephen M. Cameron 	int size;
36299846590eSStephen M. Cameron 	unsigned char *buf;
36309846590eSStephen M. Cameron 
36319846590eSStephen M. Cameron 	buf = kzalloc(64, GFP_KERNEL);
36329846590eSStephen M. Cameron 	if (!buf)
36339846590eSStephen M. Cameron 		return HPSA_VPD_LV_STATUS_UNSUPPORTED;
36349846590eSStephen M. Cameron 
36359846590eSStephen M. Cameron 	/* Does controller have VPD for logical volume status? */
363624a4b078SStephen M. Cameron 	if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS))
36379846590eSStephen M. Cameron 		goto exit_failed;
36389846590eSStephen M. Cameron 
36399846590eSStephen M. Cameron 	/* Get the size of the VPD return buffer */
36409846590eSStephen M. Cameron 	rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
36419846590eSStephen M. Cameron 					buf, HPSA_VPD_HEADER_SZ);
364224a4b078SStephen M. Cameron 	if (rc != 0)
36439846590eSStephen M. Cameron 		goto exit_failed;
36449846590eSStephen M. Cameron 	size = buf[3];
36459846590eSStephen M. Cameron 
36469846590eSStephen M. Cameron 	/* Now get the whole VPD buffer */
36479846590eSStephen M. Cameron 	rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
36489846590eSStephen M. Cameron 					buf, size + HPSA_VPD_HEADER_SZ);
364924a4b078SStephen M. Cameron 	if (rc != 0)
36509846590eSStephen M. Cameron 		goto exit_failed;
36519846590eSStephen M. Cameron 	status = buf[4]; /* status byte */
36529846590eSStephen M. Cameron 
36539846590eSStephen M. Cameron 	kfree(buf);
36549846590eSStephen M. Cameron 	return status;
36559846590eSStephen M. Cameron exit_failed:
36569846590eSStephen M. Cameron 	kfree(buf);
36579846590eSStephen M. Cameron 	return HPSA_VPD_LV_STATUS_UNSUPPORTED;
36589846590eSStephen M. Cameron }
36599846590eSStephen M. Cameron 
36609846590eSStephen M. Cameron /* Determine offline status of a volume.
36619846590eSStephen M. Cameron  * Return either:
36629846590eSStephen M. Cameron  *  0 (not offline)
366367955ba3SStephen M. Cameron  *  0xff (offline for unknown reasons)
36649846590eSStephen M. Cameron  *  # (integer code indicating one of several NOT READY states
36659846590eSStephen M. Cameron  *     describing why a volume is to be kept offline)
36669846590eSStephen M. Cameron  */
366767955ba3SStephen M. Cameron static int hpsa_volume_offline(struct ctlr_info *h,
36689846590eSStephen M. Cameron 					unsigned char scsi3addr[])
36699846590eSStephen M. Cameron {
36709846590eSStephen M. Cameron 	struct CommandList *c;
36719437ac43SStephen Cameron 	unsigned char *sense;
36729437ac43SStephen Cameron 	u8 sense_key, asc, ascq;
36739437ac43SStephen Cameron 	int sense_len;
367425163bd5SWebb Scales 	int rc, ldstat = 0;
36759846590eSStephen M. Cameron 	u16 cmd_status;
36769846590eSStephen M. Cameron 	u8 scsi_status;
36779846590eSStephen M. Cameron #define ASC_LUN_NOT_READY 0x04
36789846590eSStephen M. Cameron #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04
36799846590eSStephen M. Cameron #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02
36809846590eSStephen M. Cameron 
36819846590eSStephen M. Cameron 	c = cmd_alloc(h);
3682bf43caf3SRobert Elliott 
36839846590eSStephen M. Cameron 	(void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD);
3684c448ecfaSDon Brace 	rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
3685c448ecfaSDon Brace 					DEFAULT_TIMEOUT);
368625163bd5SWebb Scales 	if (rc) {
368725163bd5SWebb Scales 		cmd_free(h, c);
368825163bd5SWebb Scales 		return 0;
368925163bd5SWebb Scales 	}
36909846590eSStephen M. Cameron 	sense = c->err_info->SenseInfo;
36919437ac43SStephen Cameron 	if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
36929437ac43SStephen Cameron 		sense_len = sizeof(c->err_info->SenseInfo);
36939437ac43SStephen Cameron 	else
36949437ac43SStephen Cameron 		sense_len = c->err_info->SenseLen;
36959437ac43SStephen Cameron 	decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq);
36969846590eSStephen M. Cameron 	cmd_status = c->err_info->CommandStatus;
36979846590eSStephen M. Cameron 	scsi_status = c->err_info->ScsiStatus;
36989846590eSStephen M. Cameron 	cmd_free(h, c);
36999846590eSStephen M. Cameron 	/* Is the volume 'not ready'? */
37009846590eSStephen M. Cameron 	if (cmd_status != CMD_TARGET_STATUS ||
37019846590eSStephen M. Cameron 		scsi_status != SAM_STAT_CHECK_CONDITION ||
37029846590eSStephen M. Cameron 		sense_key != NOT_READY ||
37039846590eSStephen M. Cameron 		asc != ASC_LUN_NOT_READY)  {
37049846590eSStephen M. Cameron 		return 0;
37059846590eSStephen M. Cameron 	}
37069846590eSStephen M. Cameron 
37079846590eSStephen M. Cameron 	/* Determine the reason for not ready state */
37089846590eSStephen M. Cameron 	ldstat = hpsa_get_volume_status(h, scsi3addr);
37099846590eSStephen M. Cameron 
37109846590eSStephen M. Cameron 	/* Keep volume offline in certain cases: */
37119846590eSStephen M. Cameron 	switch (ldstat) {
37129846590eSStephen M. Cameron 	case HPSA_LV_UNDERGOING_ERASE:
37135ca01204SScott Benesh 	case HPSA_LV_NOT_AVAILABLE:
37149846590eSStephen M. Cameron 	case HPSA_LV_UNDERGOING_RPI:
37159846590eSStephen M. Cameron 	case HPSA_LV_PENDING_RPI:
37169846590eSStephen M. Cameron 	case HPSA_LV_ENCRYPTED_NO_KEY:
37179846590eSStephen M. Cameron 	case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
37189846590eSStephen M. Cameron 	case HPSA_LV_UNDERGOING_ENCRYPTION:
37199846590eSStephen M. Cameron 	case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
37209846590eSStephen M. Cameron 	case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
37219846590eSStephen M. Cameron 		return ldstat;
37229846590eSStephen M. Cameron 	case HPSA_VPD_LV_STATUS_UNSUPPORTED:
37239846590eSStephen M. Cameron 		/* If VPD status page isn't available,
37249846590eSStephen M. Cameron 		 * use ASC/ASCQ to determine state
37259846590eSStephen M. Cameron 		 */
37269846590eSStephen M. Cameron 		if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) ||
37279846590eSStephen M. Cameron 			(ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ))
37289846590eSStephen M. Cameron 			return ldstat;
37299846590eSStephen M. Cameron 		break;
37309846590eSStephen M. Cameron 	default:
37319846590eSStephen M. Cameron 		break;
37329846590eSStephen M. Cameron 	}
37339846590eSStephen M. Cameron 	return 0;
37349846590eSStephen M. Cameron }
37359846590eSStephen M. Cameron 
37369b5c48c2SStephen Cameron /*
37379b5c48c2SStephen Cameron  * Find out if a logical device supports aborts by simply trying one.
37389b5c48c2SStephen Cameron  * Smart Array may claim not to support aborts on logical drives, but
37399b5c48c2SStephen Cameron  * if a MSA2000 * is connected, the drives on that will be presented
37409b5c48c2SStephen Cameron  * by the Smart Array as logical drives, and aborts may be sent to
37419b5c48c2SStephen Cameron  * those devices successfully.  So the simplest way to find out is
37429b5c48c2SStephen Cameron  * to simply try an abort and see how the device responds.
37439b5c48c2SStephen Cameron  */
37449b5c48c2SStephen Cameron static int hpsa_device_supports_aborts(struct ctlr_info *h,
37459b5c48c2SStephen Cameron 					unsigned char *scsi3addr)
37469b5c48c2SStephen Cameron {
37479b5c48c2SStephen Cameron 	struct CommandList *c;
37489b5c48c2SStephen Cameron 	struct ErrorInfo *ei;
37499b5c48c2SStephen Cameron 	int rc = 0;
37509b5c48c2SStephen Cameron 
37519b5c48c2SStephen Cameron 	u64 tag = (u64) -1; /* bogus tag */
37529b5c48c2SStephen Cameron 
37539b5c48c2SStephen Cameron 	/* Assume that physical devices support aborts */
37549b5c48c2SStephen Cameron 	if (!is_logical_dev_addr_mode(scsi3addr))
37559b5c48c2SStephen Cameron 		return 1;
37569b5c48c2SStephen Cameron 
37579b5c48c2SStephen Cameron 	c = cmd_alloc(h);
3758bf43caf3SRobert Elliott 
37599b5c48c2SStephen Cameron 	(void) fill_cmd(c, HPSA_ABORT_MSG, h, &tag, 0, 0, scsi3addr, TYPE_MSG);
3760c448ecfaSDon Brace 	(void) hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
3761c448ecfaSDon Brace 					DEFAULT_TIMEOUT);
37629b5c48c2SStephen Cameron 	/* no unmap needed here because no data xfer. */
37639b5c48c2SStephen Cameron 	ei = c->err_info;
37649b5c48c2SStephen Cameron 	switch (ei->CommandStatus) {
37659b5c48c2SStephen Cameron 	case CMD_INVALID:
37669b5c48c2SStephen Cameron 		rc = 0;
37679b5c48c2SStephen Cameron 		break;
37689b5c48c2SStephen Cameron 	case CMD_UNABORTABLE:
37699b5c48c2SStephen Cameron 	case CMD_ABORT_FAILED:
37709b5c48c2SStephen Cameron 		rc = 1;
37719b5c48c2SStephen Cameron 		break;
37729437ac43SStephen Cameron 	case CMD_TMF_STATUS:
37739437ac43SStephen Cameron 		rc = hpsa_evaluate_tmf_status(h, c);
37749437ac43SStephen Cameron 		break;
37759b5c48c2SStephen Cameron 	default:
37769b5c48c2SStephen Cameron 		rc = 0;
37779b5c48c2SStephen Cameron 		break;
37789b5c48c2SStephen Cameron 	}
37799b5c48c2SStephen Cameron 	cmd_free(h, c);
37809b5c48c2SStephen Cameron 	return rc;
37819b5c48c2SStephen Cameron }
37829b5c48c2SStephen Cameron 
3783edd16368SStephen M. Cameron static int hpsa_update_device_info(struct ctlr_info *h,
37840b0e1d6cSStephen M. Cameron 	unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
37850b0e1d6cSStephen M. Cameron 	unsigned char *is_OBDR_device)
3786edd16368SStephen M. Cameron {
37870b0e1d6cSStephen M. Cameron 
37880b0e1d6cSStephen M. Cameron #define OBDR_SIG_OFFSET 43
37890b0e1d6cSStephen M. Cameron #define OBDR_TAPE_SIG "$DR-10"
37900b0e1d6cSStephen M. Cameron #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
37910b0e1d6cSStephen M. Cameron #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
37920b0e1d6cSStephen M. Cameron 
3793ea6d3bc3SStephen M. Cameron 	unsigned char *inq_buff;
37940b0e1d6cSStephen M. Cameron 	unsigned char *obdr_sig;
3795683fc444SDon Brace 	int rc = 0;
3796edd16368SStephen M. Cameron 
3797ea6d3bc3SStephen M. Cameron 	inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
3798683fc444SDon Brace 	if (!inq_buff) {
3799683fc444SDon Brace 		rc = -ENOMEM;
3800edd16368SStephen M. Cameron 		goto bail_out;
3801683fc444SDon Brace 	}
3802edd16368SStephen M. Cameron 
3803edd16368SStephen M. Cameron 	/* Do an inquiry to the device to see what it is. */
3804edd16368SStephen M. Cameron 	if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
3805edd16368SStephen M. Cameron 		(unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
3806edd16368SStephen M. Cameron 		/* Inquiry failed (msg printed already) */
3807edd16368SStephen M. Cameron 		dev_err(&h->pdev->dev,
3808edd16368SStephen M. Cameron 			"hpsa_update_device_info: inquiry failed\n");
3809683fc444SDon Brace 		rc = -EIO;
3810edd16368SStephen M. Cameron 		goto bail_out;
3811edd16368SStephen M. Cameron 	}
3812edd16368SStephen M. Cameron 
38134af61e4fSDon Brace 	scsi_sanitize_inquiry_string(&inq_buff[8], 8);
38144af61e4fSDon Brace 	scsi_sanitize_inquiry_string(&inq_buff[16], 16);
381575d23d89SDon Brace 
3816edd16368SStephen M. Cameron 	this_device->devtype = (inq_buff[0] & 0x1f);
3817edd16368SStephen M. Cameron 	memcpy(this_device->scsi3addr, scsi3addr, 8);
3818edd16368SStephen M. Cameron 	memcpy(this_device->vendor, &inq_buff[8],
3819edd16368SStephen M. Cameron 		sizeof(this_device->vendor));
3820edd16368SStephen M. Cameron 	memcpy(this_device->model, &inq_buff[16],
3821edd16368SStephen M. Cameron 		sizeof(this_device->model));
3822edd16368SStephen M. Cameron 	memset(this_device->device_id, 0,
3823edd16368SStephen M. Cameron 		sizeof(this_device->device_id));
382475d23d89SDon Brace 	hpsa_get_device_id(h, scsi3addr, this_device->device_id, 8,
3825edd16368SStephen M. Cameron 		sizeof(this_device->device_id));
3826edd16368SStephen M. Cameron 
3827af15ed36SDon Brace 	if ((this_device->devtype == TYPE_DISK ||
3828af15ed36SDon Brace 		this_device->devtype == TYPE_ZBC) &&
3829283b4a9bSStephen M. Cameron 		is_logical_dev_addr_mode(scsi3addr)) {
383067955ba3SStephen M. Cameron 		int volume_offline;
383167955ba3SStephen M. Cameron 
3832edd16368SStephen M. Cameron 		hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
3833283b4a9bSStephen M. Cameron 		if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC)
3834283b4a9bSStephen M. Cameron 			hpsa_get_ioaccel_status(h, scsi3addr, this_device);
383567955ba3SStephen M. Cameron 		volume_offline = hpsa_volume_offline(h, scsi3addr);
383667955ba3SStephen M. Cameron 		if (volume_offline < 0 || volume_offline > 0xff)
383767955ba3SStephen M. Cameron 			volume_offline = HPSA_VPD_LV_STATUS_UNSUPPORTED;
383867955ba3SStephen M. Cameron 		this_device->volume_offline = volume_offline & 0xff;
3839283b4a9bSStephen M. Cameron 	} else {
3840edd16368SStephen M. Cameron 		this_device->raid_level = RAID_UNKNOWN;
3841283b4a9bSStephen M. Cameron 		this_device->offload_config = 0;
3842283b4a9bSStephen M. Cameron 		this_device->offload_enabled = 0;
384341ce4c35SStephen Cameron 		this_device->offload_to_be_enabled = 0;
3844a3144e0bSJoe Handzik 		this_device->hba_ioaccel_enabled = 0;
38459846590eSStephen M. Cameron 		this_device->volume_offline = 0;
384603383736SDon Brace 		this_device->queue_depth = h->nr_cmds;
3847283b4a9bSStephen M. Cameron 	}
3848edd16368SStephen M. Cameron 
38490b0e1d6cSStephen M. Cameron 	if (is_OBDR_device) {
38500b0e1d6cSStephen M. Cameron 		/* See if this is a One-Button-Disaster-Recovery device
38510b0e1d6cSStephen M. Cameron 		 * by looking for "$DR-10" at offset 43 in inquiry data.
38520b0e1d6cSStephen M. Cameron 		 */
38530b0e1d6cSStephen M. Cameron 		obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
38540b0e1d6cSStephen M. Cameron 		*is_OBDR_device = (this_device->devtype == TYPE_ROM &&
38550b0e1d6cSStephen M. Cameron 					strncmp(obdr_sig, OBDR_TAPE_SIG,
38560b0e1d6cSStephen M. Cameron 						OBDR_SIG_LEN) == 0);
38570b0e1d6cSStephen M. Cameron 	}
3858edd16368SStephen M. Cameron 	kfree(inq_buff);
3859edd16368SStephen M. Cameron 	return 0;
3860edd16368SStephen M. Cameron 
3861edd16368SStephen M. Cameron bail_out:
3862edd16368SStephen M. Cameron 	kfree(inq_buff);
3863683fc444SDon Brace 	return rc;
3864edd16368SStephen M. Cameron }
3865edd16368SStephen M. Cameron 
38669b5c48c2SStephen Cameron static void hpsa_update_device_supports_aborts(struct ctlr_info *h,
38679b5c48c2SStephen Cameron 			struct hpsa_scsi_dev_t *dev, u8 *scsi3addr)
38689b5c48c2SStephen Cameron {
38699b5c48c2SStephen Cameron 	unsigned long flags;
38709b5c48c2SStephen Cameron 	int rc, entry;
38719b5c48c2SStephen Cameron 	/*
38729b5c48c2SStephen Cameron 	 * See if this device supports aborts.  If we already know
38739b5c48c2SStephen Cameron 	 * the device, we already know if it supports aborts, otherwise
38749b5c48c2SStephen Cameron 	 * we have to find out if it supports aborts by trying one.
38759b5c48c2SStephen Cameron 	 */
38769b5c48c2SStephen Cameron 	spin_lock_irqsave(&h->devlock, flags);
38779b5c48c2SStephen Cameron 	rc = hpsa_scsi_find_entry(dev, h->dev, h->ndevices, &entry);
38789b5c48c2SStephen Cameron 	if ((rc == DEVICE_SAME || rc == DEVICE_UPDATED) &&
38799b5c48c2SStephen Cameron 		entry >= 0 && entry < h->ndevices) {
38809b5c48c2SStephen Cameron 		dev->supports_aborts = h->dev[entry]->supports_aborts;
38819b5c48c2SStephen Cameron 		spin_unlock_irqrestore(&h->devlock, flags);
38829b5c48c2SStephen Cameron 	} else {
38839b5c48c2SStephen Cameron 		spin_unlock_irqrestore(&h->devlock, flags);
38849b5c48c2SStephen Cameron 		dev->supports_aborts =
38859b5c48c2SStephen Cameron 				hpsa_device_supports_aborts(h, scsi3addr);
38869b5c48c2SStephen Cameron 		if (dev->supports_aborts < 0)
38879b5c48c2SStephen Cameron 			dev->supports_aborts = 0;
38889b5c48c2SStephen Cameron 	}
38899b5c48c2SStephen Cameron }
38909b5c48c2SStephen Cameron 
3891c795505aSKevin Barnett /*
3892c795505aSKevin Barnett  * Helper function to assign bus, target, lun mapping of devices.
3893edd16368SStephen M. Cameron  * Logical drive target and lun are assigned at this time, but
3894edd16368SStephen M. Cameron  * physical device lun and target assignment are deferred (assigned
3895edd16368SStephen M. Cameron  * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
3896edd16368SStephen M. Cameron */
3897edd16368SStephen M. Cameron static void figure_bus_target_lun(struct ctlr_info *h,
38981f310bdeSStephen M. Cameron 	u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device)
3899edd16368SStephen M. Cameron {
3900c795505aSKevin Barnett 	u32 lunid = get_unaligned_le32(lunaddrbytes);
3901edd16368SStephen M. Cameron 
39021f310bdeSStephen M. Cameron 	if (!is_logical_dev_addr_mode(lunaddrbytes)) {
39031f310bdeSStephen M. Cameron 		/* physical device, target and lun filled in later */
39041f310bdeSStephen M. Cameron 		if (is_hba_lunid(lunaddrbytes))
3905c795505aSKevin Barnett 			hpsa_set_bus_target_lun(device,
3906c795505aSKevin Barnett 					HPSA_HBA_BUS, 0, lunid & 0x3fff);
39071f310bdeSStephen M. Cameron 		else
39081f310bdeSStephen M. Cameron 			/* defer target, lun assignment for physical devices */
3909c795505aSKevin Barnett 			hpsa_set_bus_target_lun(device,
3910c795505aSKevin Barnett 					HPSA_PHYSICAL_DEVICE_BUS, -1, -1);
39111f310bdeSStephen M. Cameron 		return;
39121f310bdeSStephen M. Cameron 	}
39131f310bdeSStephen M. Cameron 	/* It's a logical device */
391466749d0dSScott Teel 	if (device->external) {
39151f310bdeSStephen M. Cameron 		hpsa_set_bus_target_lun(device,
3916c795505aSKevin Barnett 			HPSA_EXTERNAL_RAID_VOLUME_BUS, (lunid >> 16) & 0x3fff,
3917c795505aSKevin Barnett 			lunid & 0x00ff);
39181f310bdeSStephen M. Cameron 		return;
3919339b2b14SStephen M. Cameron 	}
3920c795505aSKevin Barnett 	hpsa_set_bus_target_lun(device, HPSA_RAID_VOLUME_BUS,
3921c795505aSKevin Barnett 				0, lunid & 0x3fff);
3922edd16368SStephen M. Cameron }
3923edd16368SStephen M. Cameron 
3924edd16368SStephen M. Cameron 
3925edd16368SStephen M. Cameron /*
392654b6e9e9SScott Teel  * Get address of physical disk used for an ioaccel2 mode command:
392754b6e9e9SScott Teel  *	1. Extract ioaccel2 handle from the command.
392854b6e9e9SScott Teel  *	2. Find a matching ioaccel2 handle from list of physical disks.
392954b6e9e9SScott Teel  *	3. Return:
393054b6e9e9SScott Teel  *		1 and set scsi3addr to address of matching physical
393154b6e9e9SScott Teel  *		0 if no matching physical disk was found.
393254b6e9e9SScott Teel  */
393354b6e9e9SScott Teel static int hpsa_get_pdisk_of_ioaccel2(struct ctlr_info *h,
393454b6e9e9SScott Teel 	struct CommandList *ioaccel2_cmd_to_abort, unsigned char *scsi3addr)
393554b6e9e9SScott Teel {
393641ce4c35SStephen Cameron 	struct io_accel2_cmd *c2 =
393741ce4c35SStephen Cameron 			&h->ioaccel2_cmd_pool[ioaccel2_cmd_to_abort->cmdindex];
393841ce4c35SStephen Cameron 	unsigned long flags;
393954b6e9e9SScott Teel 	int i;
394054b6e9e9SScott Teel 
394141ce4c35SStephen Cameron 	spin_lock_irqsave(&h->devlock, flags);
394241ce4c35SStephen Cameron 	for (i = 0; i < h->ndevices; i++)
394341ce4c35SStephen Cameron 		if (h->dev[i]->ioaccel_handle == le32_to_cpu(c2->scsi_nexus)) {
394441ce4c35SStephen Cameron 			memcpy(scsi3addr, h->dev[i]->scsi3addr,
394541ce4c35SStephen Cameron 				sizeof(h->dev[i]->scsi3addr));
394641ce4c35SStephen Cameron 			spin_unlock_irqrestore(&h->devlock, flags);
394754b6e9e9SScott Teel 			return 1;
394854b6e9e9SScott Teel 		}
394941ce4c35SStephen Cameron 	spin_unlock_irqrestore(&h->devlock, flags);
395041ce4c35SStephen Cameron 	return 0;
395141ce4c35SStephen Cameron }
395241ce4c35SStephen Cameron 
395366749d0dSScott Teel static int  figure_external_status(struct ctlr_info *h, int raid_ctlr_position,
395466749d0dSScott Teel 	int i, int nphysicals, int nlocal_logicals)
395566749d0dSScott Teel {
395666749d0dSScott Teel 	/* In report logicals, local logicals are listed first,
395766749d0dSScott Teel 	* then any externals.
395866749d0dSScott Teel 	*/
395966749d0dSScott Teel 	int logicals_start = nphysicals + (raid_ctlr_position == 0);
396066749d0dSScott Teel 
396166749d0dSScott Teel 	if (i == raid_ctlr_position)
396266749d0dSScott Teel 		return 0;
396366749d0dSScott Teel 
396466749d0dSScott Teel 	if (i < logicals_start)
396566749d0dSScott Teel 		return 0;
396666749d0dSScott Teel 
396766749d0dSScott Teel 	/* i is in logicals range, but still within local logicals */
396866749d0dSScott Teel 	if ((i - nphysicals - (raid_ctlr_position == 0)) < nlocal_logicals)
396966749d0dSScott Teel 		return 0;
397066749d0dSScott Teel 
397166749d0dSScott Teel 	return 1; /* it's an external lun */
397266749d0dSScott Teel }
397366749d0dSScott Teel 
397454b6e9e9SScott Teel /*
3975edd16368SStephen M. Cameron  * Do CISS_REPORT_PHYS and CISS_REPORT_LOG.  Data is returned in physdev,
3976edd16368SStephen M. Cameron  * logdev.  The number of luns in physdev and logdev are returned in
3977edd16368SStephen M. Cameron  * *nphysicals and *nlogicals, respectively.
3978edd16368SStephen M. Cameron  * Returns 0 on success, -1 otherwise.
3979edd16368SStephen M. Cameron  */
3980edd16368SStephen M. Cameron static int hpsa_gather_lun_info(struct ctlr_info *h,
398103383736SDon Brace 	struct ReportExtendedLUNdata *physdev, u32 *nphysicals,
398201a02ffcSStephen M. Cameron 	struct ReportLUNdata *logdev, u32 *nlogicals)
3983edd16368SStephen M. Cameron {
398403383736SDon Brace 	if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) {
3985edd16368SStephen M. Cameron 		dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
3986edd16368SStephen M. Cameron 		return -1;
3987edd16368SStephen M. Cameron 	}
398803383736SDon Brace 	*nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24;
3989edd16368SStephen M. Cameron 	if (*nphysicals > HPSA_MAX_PHYS_LUN) {
399003383736SDon Brace 		dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n",
399103383736SDon Brace 			HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN);
3992edd16368SStephen M. Cameron 		*nphysicals = HPSA_MAX_PHYS_LUN;
3993edd16368SStephen M. Cameron 	}
399403383736SDon Brace 	if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) {
3995edd16368SStephen M. Cameron 		dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
3996edd16368SStephen M. Cameron 		return -1;
3997edd16368SStephen M. Cameron 	}
39986df1e954SStephen M. Cameron 	*nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
3999edd16368SStephen M. Cameron 	/* Reject Logicals in excess of our max capability. */
4000edd16368SStephen M. Cameron 	if (*nlogicals > HPSA_MAX_LUN) {
4001edd16368SStephen M. Cameron 		dev_warn(&h->pdev->dev,
4002edd16368SStephen M. Cameron 			"maximum logical LUNs (%d) exceeded.  "
4003edd16368SStephen M. Cameron 			"%d LUNs ignored.\n", HPSA_MAX_LUN,
4004edd16368SStephen M. Cameron 			*nlogicals - HPSA_MAX_LUN);
4005edd16368SStephen M. Cameron 			*nlogicals = HPSA_MAX_LUN;
4006edd16368SStephen M. Cameron 	}
4007edd16368SStephen M. Cameron 	if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
4008edd16368SStephen M. Cameron 		dev_warn(&h->pdev->dev,
4009edd16368SStephen M. Cameron 			"maximum logical + physical LUNs (%d) exceeded. "
4010edd16368SStephen M. Cameron 			"%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
4011edd16368SStephen M. Cameron 			*nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
4012edd16368SStephen M. Cameron 		*nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
4013edd16368SStephen M. Cameron 	}
4014edd16368SStephen M. Cameron 	return 0;
4015edd16368SStephen M. Cameron }
4016edd16368SStephen M. Cameron 
401742a91641SDon Brace static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position,
401842a91641SDon Brace 	int i, int nphysicals, int nlogicals,
4019a93aa1feSMatt Gates 	struct ReportExtendedLUNdata *physdev_list,
4020339b2b14SStephen M. Cameron 	struct ReportLUNdata *logdev_list)
4021339b2b14SStephen M. Cameron {
4022339b2b14SStephen M. Cameron 	/* Helper function, figure out where the LUN ID info is coming from
4023339b2b14SStephen M. Cameron 	 * given index i, lists of physical and logical devices, where in
4024339b2b14SStephen M. Cameron 	 * the list the raid controller is supposed to appear (first or last)
4025339b2b14SStephen M. Cameron 	 */
4026339b2b14SStephen M. Cameron 
4027339b2b14SStephen M. Cameron 	int logicals_start = nphysicals + (raid_ctlr_position == 0);
4028339b2b14SStephen M. Cameron 	int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
4029339b2b14SStephen M. Cameron 
4030339b2b14SStephen M. Cameron 	if (i == raid_ctlr_position)
4031339b2b14SStephen M. Cameron 		return RAID_CTLR_LUNID;
4032339b2b14SStephen M. Cameron 
4033339b2b14SStephen M. Cameron 	if (i < logicals_start)
4034d5b5d964SStephen M. Cameron 		return &physdev_list->LUN[i -
4035d5b5d964SStephen M. Cameron 				(raid_ctlr_position == 0)].lunid[0];
4036339b2b14SStephen M. Cameron 
4037339b2b14SStephen M. Cameron 	if (i < last_device)
4038339b2b14SStephen M. Cameron 		return &logdev_list->LUN[i - nphysicals -
4039339b2b14SStephen M. Cameron 			(raid_ctlr_position == 0)][0];
4040339b2b14SStephen M. Cameron 	BUG();
4041339b2b14SStephen M. Cameron 	return NULL;
4042339b2b14SStephen M. Cameron }
4043339b2b14SStephen M. Cameron 
404403383736SDon Brace /* get physical drive ioaccel handle and queue depth */
404503383736SDon Brace static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h,
404603383736SDon Brace 		struct hpsa_scsi_dev_t *dev,
4047f2039b03SDon Brace 		struct ReportExtendedLUNdata *rlep, int rle_index,
404803383736SDon Brace 		struct bmic_identify_physical_device *id_phys)
404903383736SDon Brace {
405003383736SDon Brace 	int rc;
4051f2039b03SDon Brace 	struct ext_report_lun_entry *rle = &rlep->LUN[rle_index];
405203383736SDon Brace 
405303383736SDon Brace 	dev->ioaccel_handle = rle->ioaccel_handle;
4054f2039b03SDon Brace 	if ((rle->device_flags & 0x08) && dev->ioaccel_handle)
4055a3144e0bSJoe Handzik 		dev->hba_ioaccel_enabled = 1;
405603383736SDon Brace 	memset(id_phys, 0, sizeof(*id_phys));
4057f2039b03SDon Brace 	rc = hpsa_bmic_id_physical_device(h, &rle->lunid[0],
4058f2039b03SDon Brace 			GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]), id_phys,
405903383736SDon Brace 			sizeof(*id_phys));
406003383736SDon Brace 	if (!rc)
406103383736SDon Brace 		/* Reserve space for FW operations */
406203383736SDon Brace #define DRIVE_CMDS_RESERVED_FOR_FW 2
406303383736SDon Brace #define DRIVE_QUEUE_DEPTH 7
406403383736SDon Brace 		dev->queue_depth =
406503383736SDon Brace 			le16_to_cpu(id_phys->current_queue_depth_limit) -
406603383736SDon Brace 				DRIVE_CMDS_RESERVED_FOR_FW;
406703383736SDon Brace 	else
406803383736SDon Brace 		dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */
406903383736SDon Brace }
407003383736SDon Brace 
40718270b862SJoe Handzik static void hpsa_get_path_info(struct hpsa_scsi_dev_t *this_device,
4072f2039b03SDon Brace 	struct ReportExtendedLUNdata *rlep, int rle_index,
40738270b862SJoe Handzik 	struct bmic_identify_physical_device *id_phys)
40748270b862SJoe Handzik {
4075f2039b03SDon Brace 	struct ext_report_lun_entry *rle = &rlep->LUN[rle_index];
4076f2039b03SDon Brace 
4077f2039b03SDon Brace 	if ((rle->device_flags & 0x08) && this_device->ioaccel_handle)
40788270b862SJoe Handzik 		this_device->hba_ioaccel_enabled = 1;
40798270b862SJoe Handzik 
40808270b862SJoe Handzik 	memcpy(&this_device->active_path_index,
40818270b862SJoe Handzik 		&id_phys->active_path_number,
40828270b862SJoe Handzik 		sizeof(this_device->active_path_index));
40838270b862SJoe Handzik 	memcpy(&this_device->path_map,
40848270b862SJoe Handzik 		&id_phys->redundant_path_present_map,
40858270b862SJoe Handzik 		sizeof(this_device->path_map));
40868270b862SJoe Handzik 	memcpy(&this_device->box,
40878270b862SJoe Handzik 		&id_phys->alternate_paths_phys_box_on_port,
40888270b862SJoe Handzik 		sizeof(this_device->box));
40898270b862SJoe Handzik 	memcpy(&this_device->phys_connector,
40908270b862SJoe Handzik 		&id_phys->alternate_paths_phys_connector,
40918270b862SJoe Handzik 		sizeof(this_device->phys_connector));
40928270b862SJoe Handzik 	memcpy(&this_device->bay,
40938270b862SJoe Handzik 		&id_phys->phys_bay_in_box,
40948270b862SJoe Handzik 		sizeof(this_device->bay));
40958270b862SJoe Handzik }
40968270b862SJoe Handzik 
409766749d0dSScott Teel /* get number of local logical disks. */
409866749d0dSScott Teel static int hpsa_set_local_logical_count(struct ctlr_info *h,
409966749d0dSScott Teel 	struct bmic_identify_controller *id_ctlr,
410066749d0dSScott Teel 	u32 *nlocals)
410166749d0dSScott Teel {
410266749d0dSScott Teel 	int rc;
410366749d0dSScott Teel 
410466749d0dSScott Teel 	if (!id_ctlr) {
410566749d0dSScott Teel 		dev_warn(&h->pdev->dev, "%s: id_ctlr buffer is NULL.\n",
410666749d0dSScott Teel 			__func__);
410766749d0dSScott Teel 		return -ENOMEM;
410866749d0dSScott Teel 	}
410966749d0dSScott Teel 	memset(id_ctlr, 0, sizeof(*id_ctlr));
411066749d0dSScott Teel 	rc = hpsa_bmic_id_controller(h, id_ctlr, sizeof(*id_ctlr));
411166749d0dSScott Teel 	if (!rc)
411266749d0dSScott Teel 		if (id_ctlr->configured_logical_drive_count < 256)
411366749d0dSScott Teel 			*nlocals = id_ctlr->configured_logical_drive_count;
411466749d0dSScott Teel 		else
411566749d0dSScott Teel 			*nlocals = le16_to_cpu(
411666749d0dSScott Teel 					id_ctlr->extended_logical_unit_count);
411766749d0dSScott Teel 	else
411866749d0dSScott Teel 		*nlocals = -1;
411966749d0dSScott Teel 	return rc;
412066749d0dSScott Teel }
412166749d0dSScott Teel 
412264ce60caSDon Brace static bool hpsa_is_disk_spare(struct ctlr_info *h, u8 *lunaddrbytes)
412364ce60caSDon Brace {
412464ce60caSDon Brace 	struct bmic_identify_physical_device *id_phys;
412564ce60caSDon Brace 	bool is_spare = false;
412664ce60caSDon Brace 	int rc;
412764ce60caSDon Brace 
412864ce60caSDon Brace 	id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
412964ce60caSDon Brace 	if (!id_phys)
413064ce60caSDon Brace 		return false;
413164ce60caSDon Brace 
413264ce60caSDon Brace 	rc = hpsa_bmic_id_physical_device(h,
413364ce60caSDon Brace 					lunaddrbytes,
413464ce60caSDon Brace 					GET_BMIC_DRIVE_NUMBER(lunaddrbytes),
413564ce60caSDon Brace 					id_phys, sizeof(*id_phys));
413664ce60caSDon Brace 	if (rc == 0)
413764ce60caSDon Brace 		is_spare = (id_phys->more_flags >> 6) & 0x01;
413864ce60caSDon Brace 
413964ce60caSDon Brace 	kfree(id_phys);
414064ce60caSDon Brace 	return is_spare;
414164ce60caSDon Brace }
414264ce60caSDon Brace 
414364ce60caSDon Brace #define RPL_DEV_FLAG_NON_DISK                           0x1
414464ce60caSDon Brace #define RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED  0x2
414564ce60caSDon Brace #define RPL_DEV_FLAG_UNCONFIG_DISK                      0x4
414664ce60caSDon Brace 
414764ce60caSDon Brace #define BMIC_DEVICE_TYPE_ENCLOSURE  6
414864ce60caSDon Brace 
414964ce60caSDon Brace static bool hpsa_skip_device(struct ctlr_info *h, u8 *lunaddrbytes,
415064ce60caSDon Brace 				struct ext_report_lun_entry *rle)
415164ce60caSDon Brace {
415264ce60caSDon Brace 	u8 device_flags;
415364ce60caSDon Brace 	u8 device_type;
415464ce60caSDon Brace 
415564ce60caSDon Brace 	if (!MASKED_DEVICE(lunaddrbytes))
415664ce60caSDon Brace 		return false;
415764ce60caSDon Brace 
415864ce60caSDon Brace 	device_flags = rle->device_flags;
415964ce60caSDon Brace 	device_type = rle->device_type;
416064ce60caSDon Brace 
416164ce60caSDon Brace 	if (device_flags & RPL_DEV_FLAG_NON_DISK) {
416264ce60caSDon Brace 		if (device_type == BMIC_DEVICE_TYPE_ENCLOSURE)
416364ce60caSDon Brace 			return false;
416464ce60caSDon Brace 		return true;
416564ce60caSDon Brace 	}
416664ce60caSDon Brace 
416764ce60caSDon Brace 	if (!(device_flags & RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED))
416864ce60caSDon Brace 		return false;
416964ce60caSDon Brace 
417064ce60caSDon Brace 	if (device_flags & RPL_DEV_FLAG_UNCONFIG_DISK)
417164ce60caSDon Brace 		return false;
417264ce60caSDon Brace 
417364ce60caSDon Brace 	/*
417464ce60caSDon Brace 	 * Spares may be spun down, we do not want to
417564ce60caSDon Brace 	 * do an Inquiry to a RAID set spare drive as
417664ce60caSDon Brace 	 * that would have them spun up, that is a
417764ce60caSDon Brace 	 * performance hit because I/O to the RAID device
417864ce60caSDon Brace 	 * stops while the spin up occurs which can take
417964ce60caSDon Brace 	 * over 50 seconds.
418064ce60caSDon Brace 	 */
418164ce60caSDon Brace 	if (hpsa_is_disk_spare(h, lunaddrbytes))
418264ce60caSDon Brace 		return true;
418364ce60caSDon Brace 
418464ce60caSDon Brace 	return false;
418564ce60caSDon Brace }
418666749d0dSScott Teel 
41878aa60681SDon Brace static void hpsa_update_scsi_devices(struct ctlr_info *h)
4188edd16368SStephen M. Cameron {
4189edd16368SStephen M. Cameron 	/* the idea here is we could get notified
4190edd16368SStephen M. Cameron 	 * that some devices have changed, so we do a report
4191edd16368SStephen M. Cameron 	 * physical luns and report logical luns cmd, and adjust
4192edd16368SStephen M. Cameron 	 * our list of devices accordingly.
4193edd16368SStephen M. Cameron 	 *
4194edd16368SStephen M. Cameron 	 * The scsi3addr's of devices won't change so long as the
4195edd16368SStephen M. Cameron 	 * adapter is not reset.  That means we can rescan and
4196edd16368SStephen M. Cameron 	 * tell which devices we already know about, vs. new
4197edd16368SStephen M. Cameron 	 * devices, vs.  disappearing devices.
4198edd16368SStephen M. Cameron 	 */
4199a93aa1feSMatt Gates 	struct ReportExtendedLUNdata *physdev_list = NULL;
4200edd16368SStephen M. Cameron 	struct ReportLUNdata *logdev_list = NULL;
420103383736SDon Brace 	struct bmic_identify_physical_device *id_phys = NULL;
420266749d0dSScott Teel 	struct bmic_identify_controller *id_ctlr = NULL;
420301a02ffcSStephen M. Cameron 	u32 nphysicals = 0;
420401a02ffcSStephen M. Cameron 	u32 nlogicals = 0;
420566749d0dSScott Teel 	u32 nlocal_logicals = 0;
420601a02ffcSStephen M. Cameron 	u32 ndev_allocated = 0;
4207edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
4208edd16368SStephen M. Cameron 	int ncurrent = 0;
42094f4eb9f1SScott Teel 	int i, n_ext_target_devs, ndevs_to_allocate;
4210339b2b14SStephen M. Cameron 	int raid_ctlr_position;
421104fa2f44SKevin Barnett 	bool physical_device;
4212aca4a520SScott Teel 	DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS);
4213edd16368SStephen M. Cameron 
4214cfe5badcSScott Teel 	currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL);
421592084715SStephen M. Cameron 	physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL);
421692084715SStephen M. Cameron 	logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL);
4217edd16368SStephen M. Cameron 	tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
421803383736SDon Brace 	id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
421966749d0dSScott Teel 	id_ctlr = kzalloc(sizeof(*id_ctlr), GFP_KERNEL);
4220edd16368SStephen M. Cameron 
422103383736SDon Brace 	if (!currentsd || !physdev_list || !logdev_list ||
422266749d0dSScott Teel 		!tmpdevice || !id_phys || !id_ctlr) {
4223edd16368SStephen M. Cameron 		dev_err(&h->pdev->dev, "out of memory\n");
4224edd16368SStephen M. Cameron 		goto out;
4225edd16368SStephen M. Cameron 	}
4226edd16368SStephen M. Cameron 	memset(lunzerobits, 0, sizeof(lunzerobits));
4227edd16368SStephen M. Cameron 
4228853633e8SDon Brace 	h->drv_req_rescan = 0; /* cancel scheduled rescan - we're doing it. */
4229853633e8SDon Brace 
423003383736SDon Brace 	if (hpsa_gather_lun_info(h, physdev_list, &nphysicals,
4231853633e8SDon Brace 			logdev_list, &nlogicals)) {
4232853633e8SDon Brace 		h->drv_req_rescan = 1;
4233edd16368SStephen M. Cameron 		goto out;
4234853633e8SDon Brace 	}
4235edd16368SStephen M. Cameron 
423666749d0dSScott Teel 	/* Set number of local logicals (non PTRAID) */
423766749d0dSScott Teel 	if (hpsa_set_local_logical_count(h, id_ctlr, &nlocal_logicals)) {
423866749d0dSScott Teel 		dev_warn(&h->pdev->dev,
423966749d0dSScott Teel 			"%s: Can't determine number of local logical devices.\n",
424066749d0dSScott Teel 			__func__);
424166749d0dSScott Teel 	}
4242edd16368SStephen M. Cameron 
4243aca4a520SScott Teel 	/* We might see up to the maximum number of logical and physical disks
4244aca4a520SScott Teel 	 * plus external target devices, and a device for the local RAID
4245aca4a520SScott Teel 	 * controller.
4246edd16368SStephen M. Cameron 	 */
4247aca4a520SScott Teel 	ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1;
4248edd16368SStephen M. Cameron 
4249edd16368SStephen M. Cameron 	/* Allocate the per device structures */
4250edd16368SStephen M. Cameron 	for (i = 0; i < ndevs_to_allocate; i++) {
4251b7ec021fSScott Teel 		if (i >= HPSA_MAX_DEVICES) {
4252b7ec021fSScott Teel 			dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
4253b7ec021fSScott Teel 				"  %d devices ignored.\n", HPSA_MAX_DEVICES,
4254b7ec021fSScott Teel 				ndevs_to_allocate - HPSA_MAX_DEVICES);
4255b7ec021fSScott Teel 			break;
4256b7ec021fSScott Teel 		}
4257b7ec021fSScott Teel 
4258edd16368SStephen M. Cameron 		currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
4259edd16368SStephen M. Cameron 		if (!currentsd[i]) {
4260edd16368SStephen M. Cameron 			dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
4261edd16368SStephen M. Cameron 				__FILE__, __LINE__);
4262853633e8SDon Brace 			h->drv_req_rescan = 1;
4263edd16368SStephen M. Cameron 			goto out;
4264edd16368SStephen M. Cameron 		}
4265edd16368SStephen M. Cameron 		ndev_allocated++;
4266edd16368SStephen M. Cameron 	}
4267edd16368SStephen M. Cameron 
42688645291bSStephen M. Cameron 	if (is_scsi_rev_5(h))
4269339b2b14SStephen M. Cameron 		raid_ctlr_position = 0;
4270339b2b14SStephen M. Cameron 	else
4271339b2b14SStephen M. Cameron 		raid_ctlr_position = nphysicals + nlogicals;
4272339b2b14SStephen M. Cameron 
4273edd16368SStephen M. Cameron 	/* adjust our table of devices */
42744f4eb9f1SScott Teel 	n_ext_target_devs = 0;
4275edd16368SStephen M. Cameron 	for (i = 0; i < nphysicals + nlogicals + 1; i++) {
42760b0e1d6cSStephen M. Cameron 		u8 *lunaddrbytes, is_OBDR = 0;
4277683fc444SDon Brace 		int rc = 0;
4278f2039b03SDon Brace 		int phys_dev_index = i - (raid_ctlr_position == 0);
427964ce60caSDon Brace 		bool skip_device = false;
4280edd16368SStephen M. Cameron 
428104fa2f44SKevin Barnett 		physical_device = i < nphysicals + (raid_ctlr_position == 0);
4282edd16368SStephen M. Cameron 
4283edd16368SStephen M. Cameron 		/* Figure out where the LUN ID info is coming from */
4284339b2b14SStephen M. Cameron 		lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
4285339b2b14SStephen M. Cameron 			i, nphysicals, nlogicals, physdev_list, logdev_list);
428641ce4c35SStephen Cameron 
428786cf7130SDon Brace 		/* Determine if this is a lun from an external target array */
428886cf7130SDon Brace 		tmpdevice->external =
428986cf7130SDon Brace 			figure_external_status(h, raid_ctlr_position, i,
429086cf7130SDon Brace 						nphysicals, nlocal_logicals);
429186cf7130SDon Brace 
429264ce60caSDon Brace 		/*
429364ce60caSDon Brace 		 * Skip over some devices such as a spare.
429464ce60caSDon Brace 		 */
429564ce60caSDon Brace 		if (!tmpdevice->external && physical_device) {
429664ce60caSDon Brace 			skip_device = hpsa_skip_device(h, lunaddrbytes,
429764ce60caSDon Brace 					&physdev_list->LUN[phys_dev_index]);
429864ce60caSDon Brace 			if (skip_device)
4299edd16368SStephen M. Cameron 				continue;
430064ce60caSDon Brace 		}
4301edd16368SStephen M. Cameron 
4302edd16368SStephen M. Cameron 		/* Get device type, vendor, model, device id */
4303683fc444SDon Brace 		rc = hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
4304683fc444SDon Brace 							&is_OBDR);
4305683fc444SDon Brace 		if (rc == -ENOMEM) {
4306683fc444SDon Brace 			dev_warn(&h->pdev->dev,
4307683fc444SDon Brace 				"Out of memory, rescan deferred.\n");
4308853633e8SDon Brace 			h->drv_req_rescan = 1;
4309683fc444SDon Brace 			goto out;
4310853633e8SDon Brace 		}
4311683fc444SDon Brace 		if (rc) {
4312683fc444SDon Brace 			dev_warn(&h->pdev->dev,
4313683fc444SDon Brace 				"Inquiry failed, skipping device.\n");
4314683fc444SDon Brace 			continue;
4315683fc444SDon Brace 		}
4316683fc444SDon Brace 
43171f310bdeSStephen M. Cameron 		figure_bus_target_lun(h, lunaddrbytes, tmpdevice);
43189b5c48c2SStephen Cameron 		hpsa_update_device_supports_aborts(h, tmpdevice, lunaddrbytes);
4319edd16368SStephen M. Cameron 		this_device = currentsd[ncurrent];
4320edd16368SStephen M. Cameron 
432134592254SScott Teel 		/* Turn on discovery_polling if there are ext target devices.
432234592254SScott Teel 		 * Event-based change notification is unreliable for those.
4323edd16368SStephen M. Cameron 		 */
432434592254SScott Teel 		if (!h->discovery_polling) {
432534592254SScott Teel 			if (tmpdevice->external) {
432634592254SScott Teel 				h->discovery_polling = 1;
432734592254SScott Teel 				dev_info(&h->pdev->dev,
432834592254SScott Teel 					"External target, activate discovery polling.\n");
4329edd16368SStephen M. Cameron 			}
433034592254SScott Teel 		}
433134592254SScott Teel 
4332edd16368SStephen M. Cameron 
4333edd16368SStephen M. Cameron 		*this_device = *tmpdevice;
433404fa2f44SKevin Barnett 		this_device->physical_device = physical_device;
4335edd16368SStephen M. Cameron 
433604fa2f44SKevin Barnett 		/*
433704fa2f44SKevin Barnett 		 * Expose all devices except for physical devices that
433804fa2f44SKevin Barnett 		 * are masked.
433904fa2f44SKevin Barnett 		 */
434004fa2f44SKevin Barnett 		if (MASKED_DEVICE(lunaddrbytes) && this_device->physical_device)
43412a168208SKevin Barnett 			this_device->expose_device = 0;
43422a168208SKevin Barnett 		else
43432a168208SKevin Barnett 			this_device->expose_device = 1;
434441ce4c35SStephen Cameron 
4345d04e62b9SKevin Barnett 
4346d04e62b9SKevin Barnett 		/*
4347d04e62b9SKevin Barnett 		 * Get the SAS address for physical devices that are exposed.
4348d04e62b9SKevin Barnett 		 */
4349d04e62b9SKevin Barnett 		if (this_device->physical_device && this_device->expose_device)
4350d04e62b9SKevin Barnett 			hpsa_get_sas_address(h, lunaddrbytes, this_device);
4351edd16368SStephen M. Cameron 
4352edd16368SStephen M. Cameron 		switch (this_device->devtype) {
43530b0e1d6cSStephen M. Cameron 		case TYPE_ROM:
4354edd16368SStephen M. Cameron 			/* We don't *really* support actual CD-ROM devices,
4355edd16368SStephen M. Cameron 			 * just "One Button Disaster Recovery" tape drive
4356edd16368SStephen M. Cameron 			 * which temporarily pretends to be a CD-ROM drive.
4357edd16368SStephen M. Cameron 			 * So we check that the device is really an OBDR tape
4358edd16368SStephen M. Cameron 			 * device by checking for "$DR-10" in bytes 43-48 of
4359edd16368SStephen M. Cameron 			 * the inquiry data.
4360edd16368SStephen M. Cameron 			 */
43610b0e1d6cSStephen M. Cameron 			if (is_OBDR)
4362edd16368SStephen M. Cameron 				ncurrent++;
4363edd16368SStephen M. Cameron 			break;
4364edd16368SStephen M. Cameron 		case TYPE_DISK:
4365af15ed36SDon Brace 		case TYPE_ZBC:
436604fa2f44SKevin Barnett 			if (this_device->physical_device) {
4367b9092b79SKevin Barnett 				/* The disk is in HBA mode. */
4368b9092b79SKevin Barnett 				/* Never use RAID mapper in HBA mode. */
4369ecf418d1SJoe Handzik 				this_device->offload_enabled = 0;
437003383736SDon Brace 				hpsa_get_ioaccel_drive_info(h, this_device,
4371f2039b03SDon Brace 					physdev_list, phys_dev_index, id_phys);
4372f2039b03SDon Brace 				hpsa_get_path_info(this_device,
4373f2039b03SDon Brace 					physdev_list, phys_dev_index, id_phys);
4374b9092b79SKevin Barnett 			}
4375edd16368SStephen M. Cameron 			ncurrent++;
4376edd16368SStephen M. Cameron 			break;
4377edd16368SStephen M. Cameron 		case TYPE_TAPE:
4378edd16368SStephen M. Cameron 		case TYPE_MEDIUM_CHANGER:
4379cca8f13bSDon Brace 			ncurrent++;
4380cca8f13bSDon Brace 			break;
438141ce4c35SStephen Cameron 		case TYPE_ENCLOSURE:
438217a9e54aSDon Brace 			if (!this_device->external)
4383cca8f13bSDon Brace 				hpsa_get_enclosure_info(h, lunaddrbytes,
4384cca8f13bSDon Brace 						physdev_list, phys_dev_index,
4385cca8f13bSDon Brace 						this_device);
438641ce4c35SStephen Cameron 			ncurrent++;
438741ce4c35SStephen Cameron 			break;
4388edd16368SStephen M. Cameron 		case TYPE_RAID:
4389edd16368SStephen M. Cameron 			/* Only present the Smartarray HBA as a RAID controller.
4390edd16368SStephen M. Cameron 			 * If it's a RAID controller other than the HBA itself
4391edd16368SStephen M. Cameron 			 * (an external RAID controller, MSA500 or similar)
4392edd16368SStephen M. Cameron 			 * don't present it.
4393edd16368SStephen M. Cameron 			 */
4394edd16368SStephen M. Cameron 			if (!is_hba_lunid(lunaddrbytes))
4395edd16368SStephen M. Cameron 				break;
4396edd16368SStephen M. Cameron 			ncurrent++;
4397edd16368SStephen M. Cameron 			break;
4398edd16368SStephen M. Cameron 		default:
4399edd16368SStephen M. Cameron 			break;
4400edd16368SStephen M. Cameron 		}
4401cfe5badcSScott Teel 		if (ncurrent >= HPSA_MAX_DEVICES)
4402edd16368SStephen M. Cameron 			break;
4403edd16368SStephen M. Cameron 	}
4404d04e62b9SKevin Barnett 
4405d04e62b9SKevin Barnett 	if (h->sas_host == NULL) {
4406d04e62b9SKevin Barnett 		int rc = 0;
4407d04e62b9SKevin Barnett 
4408d04e62b9SKevin Barnett 		rc = hpsa_add_sas_host(h);
4409d04e62b9SKevin Barnett 		if (rc) {
4410d04e62b9SKevin Barnett 			dev_warn(&h->pdev->dev,
4411d04e62b9SKevin Barnett 				"Could not add sas host %d\n", rc);
4412d04e62b9SKevin Barnett 			goto out;
4413d04e62b9SKevin Barnett 		}
4414d04e62b9SKevin Barnett 	}
4415d04e62b9SKevin Barnett 
44168aa60681SDon Brace 	adjust_hpsa_scsi_table(h, currentsd, ncurrent);
4417edd16368SStephen M. Cameron out:
4418edd16368SStephen M. Cameron 	kfree(tmpdevice);
4419edd16368SStephen M. Cameron 	for (i = 0; i < ndev_allocated; i++)
4420edd16368SStephen M. Cameron 		kfree(currentsd[i]);
4421edd16368SStephen M. Cameron 	kfree(currentsd);
4422edd16368SStephen M. Cameron 	kfree(physdev_list);
4423edd16368SStephen M. Cameron 	kfree(logdev_list);
442466749d0dSScott Teel 	kfree(id_ctlr);
442503383736SDon Brace 	kfree(id_phys);
4426edd16368SStephen M. Cameron }
4427edd16368SStephen M. Cameron 
4428ec5cbf04SWebb Scales static void hpsa_set_sg_descriptor(struct SGDescriptor *desc,
4429ec5cbf04SWebb Scales 				   struct scatterlist *sg)
4430ec5cbf04SWebb Scales {
4431ec5cbf04SWebb Scales 	u64 addr64 = (u64) sg_dma_address(sg);
4432ec5cbf04SWebb Scales 	unsigned int len = sg_dma_len(sg);
4433ec5cbf04SWebb Scales 
4434ec5cbf04SWebb Scales 	desc->Addr = cpu_to_le64(addr64);
4435ec5cbf04SWebb Scales 	desc->Len = cpu_to_le32(len);
4436ec5cbf04SWebb Scales 	desc->Ext = 0;
4437ec5cbf04SWebb Scales }
4438ec5cbf04SWebb Scales 
4439c7ee65b3SWebb Scales /*
4440c7ee65b3SWebb Scales  * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
4441edd16368SStephen M. Cameron  * dma mapping  and fills in the scatter gather entries of the
4442edd16368SStephen M. Cameron  * hpsa command, cp.
4443edd16368SStephen M. Cameron  */
444433a2ffceSStephen M. Cameron static int hpsa_scatter_gather(struct ctlr_info *h,
4445edd16368SStephen M. Cameron 		struct CommandList *cp,
4446edd16368SStephen M. Cameron 		struct scsi_cmnd *cmd)
4447edd16368SStephen M. Cameron {
4448edd16368SStephen M. Cameron 	struct scatterlist *sg;
4449b3a7ba7cSWebb Scales 	int use_sg, i, sg_limit, chained, last_sg;
445033a2ffceSStephen M. Cameron 	struct SGDescriptor *curr_sg;
4451edd16368SStephen M. Cameron 
445233a2ffceSStephen M. Cameron 	BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
4453edd16368SStephen M. Cameron 
4454edd16368SStephen M. Cameron 	use_sg = scsi_dma_map(cmd);
4455edd16368SStephen M. Cameron 	if (use_sg < 0)
4456edd16368SStephen M. Cameron 		return use_sg;
4457edd16368SStephen M. Cameron 
4458edd16368SStephen M. Cameron 	if (!use_sg)
4459edd16368SStephen M. Cameron 		goto sglist_finished;
4460edd16368SStephen M. Cameron 
4461b3a7ba7cSWebb Scales 	/*
4462b3a7ba7cSWebb Scales 	 * If the number of entries is greater than the max for a single list,
4463b3a7ba7cSWebb Scales 	 * then we have a chained list; we will set up all but one entry in the
4464b3a7ba7cSWebb Scales 	 * first list (the last entry is saved for link information);
4465b3a7ba7cSWebb Scales 	 * otherwise, we don't have a chained list and we'll set up at each of
4466b3a7ba7cSWebb Scales 	 * the entries in the one list.
4467b3a7ba7cSWebb Scales 	 */
446833a2ffceSStephen M. Cameron 	curr_sg = cp->SG;
4469b3a7ba7cSWebb Scales 	chained = use_sg > h->max_cmd_sg_entries;
4470b3a7ba7cSWebb Scales 	sg_limit = chained ? h->max_cmd_sg_entries - 1 : use_sg;
4471b3a7ba7cSWebb Scales 	last_sg = scsi_sg_count(cmd) - 1;
4472b3a7ba7cSWebb Scales 	scsi_for_each_sg(cmd, sg, sg_limit, i) {
4473ec5cbf04SWebb Scales 		hpsa_set_sg_descriptor(curr_sg, sg);
447433a2ffceSStephen M. Cameron 		curr_sg++;
447533a2ffceSStephen M. Cameron 	}
4476ec5cbf04SWebb Scales 
4477b3a7ba7cSWebb Scales 	if (chained) {
4478b3a7ba7cSWebb Scales 		/*
4479b3a7ba7cSWebb Scales 		 * Continue with the chained list.  Set curr_sg to the chained
4480b3a7ba7cSWebb Scales 		 * list.  Modify the limit to the total count less the entries
4481b3a7ba7cSWebb Scales 		 * we've already set up.  Resume the scan at the list entry
4482b3a7ba7cSWebb Scales 		 * where the previous loop left off.
4483b3a7ba7cSWebb Scales 		 */
4484b3a7ba7cSWebb Scales 		curr_sg = h->cmd_sg_list[cp->cmdindex];
4485b3a7ba7cSWebb Scales 		sg_limit = use_sg - sg_limit;
4486b3a7ba7cSWebb Scales 		for_each_sg(sg, sg, sg_limit, i) {
4487b3a7ba7cSWebb Scales 			hpsa_set_sg_descriptor(curr_sg, sg);
4488b3a7ba7cSWebb Scales 			curr_sg++;
4489b3a7ba7cSWebb Scales 		}
4490b3a7ba7cSWebb Scales 	}
4491b3a7ba7cSWebb Scales 
4492ec5cbf04SWebb Scales 	/* Back the pointer up to the last entry and mark it as "last". */
4493b3a7ba7cSWebb Scales 	(curr_sg - 1)->Ext = cpu_to_le32(HPSA_SG_LAST);
449433a2ffceSStephen M. Cameron 
449533a2ffceSStephen M. Cameron 	if (use_sg + chained > h->maxSG)
449633a2ffceSStephen M. Cameron 		h->maxSG = use_sg + chained;
449733a2ffceSStephen M. Cameron 
449833a2ffceSStephen M. Cameron 	if (chained) {
449933a2ffceSStephen M. Cameron 		cp->Header.SGList = h->max_cmd_sg_entries;
450050a0decfSStephen M. Cameron 		cp->Header.SGTotal = cpu_to_le16(use_sg + 1);
4501e2bea6dfSStephen M. Cameron 		if (hpsa_map_sg_chain_block(h, cp)) {
4502e2bea6dfSStephen M. Cameron 			scsi_dma_unmap(cmd);
4503e2bea6dfSStephen M. Cameron 			return -1;
4504e2bea6dfSStephen M. Cameron 		}
450533a2ffceSStephen M. Cameron 		return 0;
4506edd16368SStephen M. Cameron 	}
4507edd16368SStephen M. Cameron 
4508edd16368SStephen M. Cameron sglist_finished:
4509edd16368SStephen M. Cameron 
451001a02ffcSStephen M. Cameron 	cp->Header.SGList = (u8) use_sg;   /* no. SGs contig in this cmd */
4511c7ee65b3SWebb Scales 	cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */
4512edd16368SStephen M. Cameron 	return 0;
4513edd16368SStephen M. Cameron }
4514edd16368SStephen M. Cameron 
4515283b4a9bSStephen M. Cameron #define IO_ACCEL_INELIGIBLE (1)
4516283b4a9bSStephen M. Cameron static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len)
4517283b4a9bSStephen M. Cameron {
4518283b4a9bSStephen M. Cameron 	int is_write = 0;
4519283b4a9bSStephen M. Cameron 	u32 block;
4520283b4a9bSStephen M. Cameron 	u32 block_cnt;
4521283b4a9bSStephen M. Cameron 
4522283b4a9bSStephen M. Cameron 	/* Perform some CDB fixups if needed using 10 byte reads/writes only */
4523283b4a9bSStephen M. Cameron 	switch (cdb[0]) {
4524283b4a9bSStephen M. Cameron 	case WRITE_6:
4525283b4a9bSStephen M. Cameron 	case WRITE_12:
4526283b4a9bSStephen M. Cameron 		is_write = 1;
4527283b4a9bSStephen M. Cameron 	case READ_6:
4528283b4a9bSStephen M. Cameron 	case READ_12:
4529283b4a9bSStephen M. Cameron 		if (*cdb_len == 6) {
4530c8a6c9a6SDon Brace 			block = get_unaligned_be16(&cdb[2]);
4531283b4a9bSStephen M. Cameron 			block_cnt = cdb[4];
4532c8a6c9a6SDon Brace 			if (block_cnt == 0)
4533c8a6c9a6SDon Brace 				block_cnt = 256;
4534283b4a9bSStephen M. Cameron 		} else {
4535283b4a9bSStephen M. Cameron 			BUG_ON(*cdb_len != 12);
4536c8a6c9a6SDon Brace 			block = get_unaligned_be32(&cdb[2]);
4537c8a6c9a6SDon Brace 			block_cnt = get_unaligned_be32(&cdb[6]);
4538283b4a9bSStephen M. Cameron 		}
4539283b4a9bSStephen M. Cameron 		if (block_cnt > 0xffff)
4540283b4a9bSStephen M. Cameron 			return IO_ACCEL_INELIGIBLE;
4541283b4a9bSStephen M. Cameron 
4542283b4a9bSStephen M. Cameron 		cdb[0] = is_write ? WRITE_10 : READ_10;
4543283b4a9bSStephen M. Cameron 		cdb[1] = 0;
4544283b4a9bSStephen M. Cameron 		cdb[2] = (u8) (block >> 24);
4545283b4a9bSStephen M. Cameron 		cdb[3] = (u8) (block >> 16);
4546283b4a9bSStephen M. Cameron 		cdb[4] = (u8) (block >> 8);
4547283b4a9bSStephen M. Cameron 		cdb[5] = (u8) (block);
4548283b4a9bSStephen M. Cameron 		cdb[6] = 0;
4549283b4a9bSStephen M. Cameron 		cdb[7] = (u8) (block_cnt >> 8);
4550283b4a9bSStephen M. Cameron 		cdb[8] = (u8) (block_cnt);
4551283b4a9bSStephen M. Cameron 		cdb[9] = 0;
4552283b4a9bSStephen M. Cameron 		*cdb_len = 10;
4553283b4a9bSStephen M. Cameron 		break;
4554283b4a9bSStephen M. Cameron 	}
4555283b4a9bSStephen M. Cameron 	return 0;
4556283b4a9bSStephen M. Cameron }
4557283b4a9bSStephen M. Cameron 
4558c349775eSScott Teel static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h,
4559283b4a9bSStephen M. Cameron 	struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
456003383736SDon Brace 	u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4561e1f7de0cSMatt Gates {
4562e1f7de0cSMatt Gates 	struct scsi_cmnd *cmd = c->scsi_cmd;
4563e1f7de0cSMatt Gates 	struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
4564e1f7de0cSMatt Gates 	unsigned int len;
4565e1f7de0cSMatt Gates 	unsigned int total_len = 0;
4566e1f7de0cSMatt Gates 	struct scatterlist *sg;
4567e1f7de0cSMatt Gates 	u64 addr64;
4568e1f7de0cSMatt Gates 	int use_sg, i;
4569e1f7de0cSMatt Gates 	struct SGDescriptor *curr_sg;
4570e1f7de0cSMatt Gates 	u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE;
4571e1f7de0cSMatt Gates 
4572283b4a9bSStephen M. Cameron 	/* TODO: implement chaining support */
457303383736SDon Brace 	if (scsi_sg_count(cmd) > h->ioaccel_maxsg) {
457403383736SDon Brace 		atomic_dec(&phys_disk->ioaccel_cmds_out);
4575283b4a9bSStephen M. Cameron 		return IO_ACCEL_INELIGIBLE;
457603383736SDon Brace 	}
4577283b4a9bSStephen M. Cameron 
4578e1f7de0cSMatt Gates 	BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX);
4579e1f7de0cSMatt Gates 
458003383736SDon Brace 	if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
458103383736SDon Brace 		atomic_dec(&phys_disk->ioaccel_cmds_out);
4582283b4a9bSStephen M. Cameron 		return IO_ACCEL_INELIGIBLE;
458303383736SDon Brace 	}
4584283b4a9bSStephen M. Cameron 
4585e1f7de0cSMatt Gates 	c->cmd_type = CMD_IOACCEL1;
4586e1f7de0cSMatt Gates 
4587e1f7de0cSMatt Gates 	/* Adjust the DMA address to point to the accelerated command buffer */
4588e1f7de0cSMatt Gates 	c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle +
4589e1f7de0cSMatt Gates 				(c->cmdindex * sizeof(*cp));
4590e1f7de0cSMatt Gates 	BUG_ON(c->busaddr & 0x0000007F);
4591e1f7de0cSMatt Gates 
4592e1f7de0cSMatt Gates 	use_sg = scsi_dma_map(cmd);
459303383736SDon Brace 	if (use_sg < 0) {
459403383736SDon Brace 		atomic_dec(&phys_disk->ioaccel_cmds_out);
4595e1f7de0cSMatt Gates 		return use_sg;
459603383736SDon Brace 	}
4597e1f7de0cSMatt Gates 
4598e1f7de0cSMatt Gates 	if (use_sg) {
4599e1f7de0cSMatt Gates 		curr_sg = cp->SG;
4600e1f7de0cSMatt Gates 		scsi_for_each_sg(cmd, sg, use_sg, i) {
4601e1f7de0cSMatt Gates 			addr64 = (u64) sg_dma_address(sg);
4602e1f7de0cSMatt Gates 			len  = sg_dma_len(sg);
4603e1f7de0cSMatt Gates 			total_len += len;
460450a0decfSStephen M. Cameron 			curr_sg->Addr = cpu_to_le64(addr64);
460550a0decfSStephen M. Cameron 			curr_sg->Len = cpu_to_le32(len);
460650a0decfSStephen M. Cameron 			curr_sg->Ext = cpu_to_le32(0);
4607e1f7de0cSMatt Gates 			curr_sg++;
4608e1f7de0cSMatt Gates 		}
460950a0decfSStephen M. Cameron 		(--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST);
4610e1f7de0cSMatt Gates 
4611e1f7de0cSMatt Gates 		switch (cmd->sc_data_direction) {
4612e1f7de0cSMatt Gates 		case DMA_TO_DEVICE:
4613e1f7de0cSMatt Gates 			control |= IOACCEL1_CONTROL_DATA_OUT;
4614e1f7de0cSMatt Gates 			break;
4615e1f7de0cSMatt Gates 		case DMA_FROM_DEVICE:
4616e1f7de0cSMatt Gates 			control |= IOACCEL1_CONTROL_DATA_IN;
4617e1f7de0cSMatt Gates 			break;
4618e1f7de0cSMatt Gates 		case DMA_NONE:
4619e1f7de0cSMatt Gates 			control |= IOACCEL1_CONTROL_NODATAXFER;
4620e1f7de0cSMatt Gates 			break;
4621e1f7de0cSMatt Gates 		default:
4622e1f7de0cSMatt Gates 			dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4623e1f7de0cSMatt Gates 			cmd->sc_data_direction);
4624e1f7de0cSMatt Gates 			BUG();
4625e1f7de0cSMatt Gates 			break;
4626e1f7de0cSMatt Gates 		}
4627e1f7de0cSMatt Gates 	} else {
4628e1f7de0cSMatt Gates 		control |= IOACCEL1_CONTROL_NODATAXFER;
4629e1f7de0cSMatt Gates 	}
4630e1f7de0cSMatt Gates 
4631c349775eSScott Teel 	c->Header.SGList = use_sg;
4632e1f7de0cSMatt Gates 	/* Fill out the command structure to submit */
46332b08b3e9SDon Brace 	cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF);
46342b08b3e9SDon Brace 	cp->transfer_len = cpu_to_le32(total_len);
46352b08b3e9SDon Brace 	cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ |
46362b08b3e9SDon Brace 			(cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK));
46372b08b3e9SDon Brace 	cp->control = cpu_to_le32(control);
4638283b4a9bSStephen M. Cameron 	memcpy(cp->CDB, cdb, cdb_len);
4639283b4a9bSStephen M. Cameron 	memcpy(cp->CISS_LUN, scsi3addr, 8);
4640c349775eSScott Teel 	/* Tag was already set at init time. */
4641e1f7de0cSMatt Gates 	enqueue_cmd_and_start_io(h, c);
4642e1f7de0cSMatt Gates 	return 0;
4643e1f7de0cSMatt Gates }
4644edd16368SStephen M. Cameron 
4645283b4a9bSStephen M. Cameron /*
4646283b4a9bSStephen M. Cameron  * Queue a command directly to a device behind the controller using the
4647283b4a9bSStephen M. Cameron  * I/O accelerator path.
4648283b4a9bSStephen M. Cameron  */
4649283b4a9bSStephen M. Cameron static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h,
4650283b4a9bSStephen M. Cameron 	struct CommandList *c)
4651283b4a9bSStephen M. Cameron {
4652283b4a9bSStephen M. Cameron 	struct scsi_cmnd *cmd = c->scsi_cmd;
4653283b4a9bSStephen M. Cameron 	struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4654283b4a9bSStephen M. Cameron 
465503383736SDon Brace 	c->phys_disk = dev;
465603383736SDon Brace 
4657283b4a9bSStephen M. Cameron 	return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle,
465803383736SDon Brace 		cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev);
4659283b4a9bSStephen M. Cameron }
4660283b4a9bSStephen M. Cameron 
4661dd0e19f3SScott Teel /*
4662dd0e19f3SScott Teel  * Set encryption parameters for the ioaccel2 request
4663dd0e19f3SScott Teel  */
4664dd0e19f3SScott Teel static void set_encrypt_ioaccel2(struct ctlr_info *h,
4665dd0e19f3SScott Teel 	struct CommandList *c, struct io_accel2_cmd *cp)
4666dd0e19f3SScott Teel {
4667dd0e19f3SScott Teel 	struct scsi_cmnd *cmd = c->scsi_cmd;
4668dd0e19f3SScott Teel 	struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4669dd0e19f3SScott Teel 	struct raid_map_data *map = &dev->raid_map;
4670dd0e19f3SScott Teel 	u64 first_block;
4671dd0e19f3SScott Teel 
4672dd0e19f3SScott Teel 	/* Are we doing encryption on this device */
46732b08b3e9SDon Brace 	if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON))
4674dd0e19f3SScott Teel 		return;
4675dd0e19f3SScott Teel 	/* Set the data encryption key index. */
4676dd0e19f3SScott Teel 	cp->dekindex = map->dekindex;
4677dd0e19f3SScott Teel 
4678dd0e19f3SScott Teel 	/* Set the encryption enable flag, encoded into direction field. */
4679dd0e19f3SScott Teel 	cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK;
4680dd0e19f3SScott Teel 
4681dd0e19f3SScott Teel 	/* Set encryption tweak values based on logical block address
4682dd0e19f3SScott Teel 	 * If block size is 512, tweak value is LBA.
4683dd0e19f3SScott Teel 	 * For other block sizes, tweak is (LBA * block size)/ 512)
4684dd0e19f3SScott Teel 	 */
4685dd0e19f3SScott Teel 	switch (cmd->cmnd[0]) {
4686dd0e19f3SScott Teel 	/* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */
4687dd0e19f3SScott Teel 	case WRITE_6:
4688dd0e19f3SScott Teel 	case READ_6:
46892b08b3e9SDon Brace 		first_block = get_unaligned_be16(&cmd->cmnd[2]);
4690dd0e19f3SScott Teel 		break;
4691dd0e19f3SScott Teel 	case WRITE_10:
4692dd0e19f3SScott Teel 	case READ_10:
4693dd0e19f3SScott Teel 	/* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */
4694dd0e19f3SScott Teel 	case WRITE_12:
4695dd0e19f3SScott Teel 	case READ_12:
46962b08b3e9SDon Brace 		first_block = get_unaligned_be32(&cmd->cmnd[2]);
4697dd0e19f3SScott Teel 		break;
4698dd0e19f3SScott Teel 	case WRITE_16:
4699dd0e19f3SScott Teel 	case READ_16:
47002b08b3e9SDon Brace 		first_block = get_unaligned_be64(&cmd->cmnd[2]);
4701dd0e19f3SScott Teel 		break;
4702dd0e19f3SScott Teel 	default:
4703dd0e19f3SScott Teel 		dev_err(&h->pdev->dev,
47042b08b3e9SDon Brace 			"ERROR: %s: size (0x%x) not supported for encryption\n",
47052b08b3e9SDon Brace 			__func__, cmd->cmnd[0]);
4706dd0e19f3SScott Teel 		BUG();
4707dd0e19f3SScott Teel 		break;
4708dd0e19f3SScott Teel 	}
47092b08b3e9SDon Brace 
47102b08b3e9SDon Brace 	if (le32_to_cpu(map->volume_blk_size) != 512)
47112b08b3e9SDon Brace 		first_block = first_block *
47122b08b3e9SDon Brace 				le32_to_cpu(map->volume_blk_size)/512;
47132b08b3e9SDon Brace 
47142b08b3e9SDon Brace 	cp->tweak_lower = cpu_to_le32(first_block);
47152b08b3e9SDon Brace 	cp->tweak_upper = cpu_to_le32(first_block >> 32);
4716dd0e19f3SScott Teel }
4717dd0e19f3SScott Teel 
4718c349775eSScott Teel static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h,
4719c349775eSScott Teel 	struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
472003383736SDon Brace 	u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4721c349775eSScott Teel {
4722c349775eSScott Teel 	struct scsi_cmnd *cmd = c->scsi_cmd;
4723c349775eSScott Teel 	struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
4724c349775eSScott Teel 	struct ioaccel2_sg_element *curr_sg;
4725c349775eSScott Teel 	int use_sg, i;
4726c349775eSScott Teel 	struct scatterlist *sg;
4727c349775eSScott Teel 	u64 addr64;
4728c349775eSScott Teel 	u32 len;
4729c349775eSScott Teel 	u32 total_len = 0;
4730c349775eSScott Teel 
4731d9a729f3SWebb Scales 	BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
4732c349775eSScott Teel 
473303383736SDon Brace 	if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
473403383736SDon Brace 		atomic_dec(&phys_disk->ioaccel_cmds_out);
4735c349775eSScott Teel 		return IO_ACCEL_INELIGIBLE;
473603383736SDon Brace 	}
473703383736SDon Brace 
4738c349775eSScott Teel 	c->cmd_type = CMD_IOACCEL2;
4739c349775eSScott Teel 	/* Adjust the DMA address to point to the accelerated command buffer */
4740c349775eSScott Teel 	c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle +
4741c349775eSScott Teel 				(c->cmdindex * sizeof(*cp));
4742c349775eSScott Teel 	BUG_ON(c->busaddr & 0x0000007F);
4743c349775eSScott Teel 
4744c349775eSScott Teel 	memset(cp, 0, sizeof(*cp));
4745c349775eSScott Teel 	cp->IU_type = IOACCEL2_IU_TYPE;
4746c349775eSScott Teel 
4747c349775eSScott Teel 	use_sg = scsi_dma_map(cmd);
474803383736SDon Brace 	if (use_sg < 0) {
474903383736SDon Brace 		atomic_dec(&phys_disk->ioaccel_cmds_out);
4750c349775eSScott Teel 		return use_sg;
475103383736SDon Brace 	}
4752c349775eSScott Teel 
4753c349775eSScott Teel 	if (use_sg) {
4754c349775eSScott Teel 		curr_sg = cp->sg;
4755d9a729f3SWebb Scales 		if (use_sg > h->ioaccel_maxsg) {
4756d9a729f3SWebb Scales 			addr64 = le64_to_cpu(
4757d9a729f3SWebb Scales 				h->ioaccel2_cmd_sg_list[c->cmdindex]->address);
4758d9a729f3SWebb Scales 			curr_sg->address = cpu_to_le64(addr64);
4759d9a729f3SWebb Scales 			curr_sg->length = 0;
4760d9a729f3SWebb Scales 			curr_sg->reserved[0] = 0;
4761d9a729f3SWebb Scales 			curr_sg->reserved[1] = 0;
4762d9a729f3SWebb Scales 			curr_sg->reserved[2] = 0;
4763d9a729f3SWebb Scales 			curr_sg->chain_indicator = 0x80;
4764d9a729f3SWebb Scales 
4765d9a729f3SWebb Scales 			curr_sg = h->ioaccel2_cmd_sg_list[c->cmdindex];
4766d9a729f3SWebb Scales 		}
4767c349775eSScott Teel 		scsi_for_each_sg(cmd, sg, use_sg, i) {
4768c349775eSScott Teel 			addr64 = (u64) sg_dma_address(sg);
4769c349775eSScott Teel 			len  = sg_dma_len(sg);
4770c349775eSScott Teel 			total_len += len;
4771c349775eSScott Teel 			curr_sg->address = cpu_to_le64(addr64);
4772c349775eSScott Teel 			curr_sg->length = cpu_to_le32(len);
4773c349775eSScott Teel 			curr_sg->reserved[0] = 0;
4774c349775eSScott Teel 			curr_sg->reserved[1] = 0;
4775c349775eSScott Teel 			curr_sg->reserved[2] = 0;
4776c349775eSScott Teel 			curr_sg->chain_indicator = 0;
4777c349775eSScott Teel 			curr_sg++;
4778c349775eSScott Teel 		}
4779c349775eSScott Teel 
4780c349775eSScott Teel 		switch (cmd->sc_data_direction) {
4781c349775eSScott Teel 		case DMA_TO_DEVICE:
4782dd0e19f3SScott Teel 			cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4783dd0e19f3SScott Teel 			cp->direction |= IOACCEL2_DIR_DATA_OUT;
4784c349775eSScott Teel 			break;
4785c349775eSScott Teel 		case DMA_FROM_DEVICE:
4786dd0e19f3SScott Teel 			cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4787dd0e19f3SScott Teel 			cp->direction |= IOACCEL2_DIR_DATA_IN;
4788c349775eSScott Teel 			break;
4789c349775eSScott Teel 		case DMA_NONE:
4790dd0e19f3SScott Teel 			cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4791dd0e19f3SScott Teel 			cp->direction |= IOACCEL2_DIR_NO_DATA;
4792c349775eSScott Teel 			break;
4793c349775eSScott Teel 		default:
4794c349775eSScott Teel 			dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4795c349775eSScott Teel 				cmd->sc_data_direction);
4796c349775eSScott Teel 			BUG();
4797c349775eSScott Teel 			break;
4798c349775eSScott Teel 		}
4799c349775eSScott Teel 	} else {
4800dd0e19f3SScott Teel 		cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4801dd0e19f3SScott Teel 		cp->direction |= IOACCEL2_DIR_NO_DATA;
4802c349775eSScott Teel 	}
4803dd0e19f3SScott Teel 
4804dd0e19f3SScott Teel 	/* Set encryption parameters, if necessary */
4805dd0e19f3SScott Teel 	set_encrypt_ioaccel2(h, c, cp);
4806dd0e19f3SScott Teel 
48072b08b3e9SDon Brace 	cp->scsi_nexus = cpu_to_le32(ioaccel_handle);
4808f2405db8SDon Brace 	cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT);
4809c349775eSScott Teel 	memcpy(cp->cdb, cdb, sizeof(cp->cdb));
4810c349775eSScott Teel 
4811c349775eSScott Teel 	cp->data_len = cpu_to_le32(total_len);
4812c349775eSScott Teel 	cp->err_ptr = cpu_to_le64(c->busaddr +
4813c349775eSScott Teel 			offsetof(struct io_accel2_cmd, error_data));
481450a0decfSStephen M. Cameron 	cp->err_len = cpu_to_le32(sizeof(cp->error_data));
4815c349775eSScott Teel 
4816d9a729f3SWebb Scales 	/* fill in sg elements */
4817d9a729f3SWebb Scales 	if (use_sg > h->ioaccel_maxsg) {
4818d9a729f3SWebb Scales 		cp->sg_count = 1;
4819a736e9b6SDon Brace 		cp->sg[0].length = cpu_to_le32(use_sg * sizeof(cp->sg[0]));
4820d9a729f3SWebb Scales 		if (hpsa_map_ioaccel2_sg_chain_block(h, cp, c)) {
4821d9a729f3SWebb Scales 			atomic_dec(&phys_disk->ioaccel_cmds_out);
4822d9a729f3SWebb Scales 			scsi_dma_unmap(cmd);
4823d9a729f3SWebb Scales 			return -1;
4824d9a729f3SWebb Scales 		}
4825d9a729f3SWebb Scales 	} else
4826d9a729f3SWebb Scales 		cp->sg_count = (u8) use_sg;
4827d9a729f3SWebb Scales 
4828c349775eSScott Teel 	enqueue_cmd_and_start_io(h, c);
4829c349775eSScott Teel 	return 0;
4830c349775eSScott Teel }
4831c349775eSScott Teel 
4832c349775eSScott Teel /*
4833c349775eSScott Teel  * Queue a command to the correct I/O accelerator path.
4834c349775eSScott Teel  */
4835c349775eSScott Teel static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
4836c349775eSScott Teel 	struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
483703383736SDon Brace 	u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4838c349775eSScott Teel {
483903383736SDon Brace 	/* Try to honor the device's queue depth */
484003383736SDon Brace 	if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) >
484103383736SDon Brace 					phys_disk->queue_depth) {
484203383736SDon Brace 		atomic_dec(&phys_disk->ioaccel_cmds_out);
484303383736SDon Brace 		return IO_ACCEL_INELIGIBLE;
484403383736SDon Brace 	}
4845c349775eSScott Teel 	if (h->transMethod & CFGTBL_Trans_io_accel1)
4846c349775eSScott Teel 		return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle,
484703383736SDon Brace 						cdb, cdb_len, scsi3addr,
484803383736SDon Brace 						phys_disk);
4849c349775eSScott Teel 	else
4850c349775eSScott Teel 		return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle,
485103383736SDon Brace 						cdb, cdb_len, scsi3addr,
485203383736SDon Brace 						phys_disk);
4853c349775eSScott Teel }
4854c349775eSScott Teel 
48556b80b18fSScott Teel static void raid_map_helper(struct raid_map_data *map,
48566b80b18fSScott Teel 		int offload_to_mirror, u32 *map_index, u32 *current_group)
48576b80b18fSScott Teel {
48586b80b18fSScott Teel 	if (offload_to_mirror == 0)  {
48596b80b18fSScott Teel 		/* use physical disk in the first mirrored group. */
48602b08b3e9SDon Brace 		*map_index %= le16_to_cpu(map->data_disks_per_row);
48616b80b18fSScott Teel 		return;
48626b80b18fSScott Teel 	}
48636b80b18fSScott Teel 	do {
48646b80b18fSScott Teel 		/* determine mirror group that *map_index indicates */
48652b08b3e9SDon Brace 		*current_group = *map_index /
48662b08b3e9SDon Brace 			le16_to_cpu(map->data_disks_per_row);
48676b80b18fSScott Teel 		if (offload_to_mirror == *current_group)
48686b80b18fSScott Teel 			continue;
48692b08b3e9SDon Brace 		if (*current_group < le16_to_cpu(map->layout_map_count) - 1) {
48706b80b18fSScott Teel 			/* select map index from next group */
48712b08b3e9SDon Brace 			*map_index += le16_to_cpu(map->data_disks_per_row);
48726b80b18fSScott Teel 			(*current_group)++;
48736b80b18fSScott Teel 		} else {
48746b80b18fSScott Teel 			/* select map index from first group */
48752b08b3e9SDon Brace 			*map_index %= le16_to_cpu(map->data_disks_per_row);
48766b80b18fSScott Teel 			*current_group = 0;
48776b80b18fSScott Teel 		}
48786b80b18fSScott Teel 	} while (offload_to_mirror != *current_group);
48796b80b18fSScott Teel }
48806b80b18fSScott Teel 
4881283b4a9bSStephen M. Cameron /*
4882283b4a9bSStephen M. Cameron  * Attempt to perform offload RAID mapping for a logical volume I/O.
4883283b4a9bSStephen M. Cameron  */
4884283b4a9bSStephen M. Cameron static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h,
4885283b4a9bSStephen M. Cameron 	struct CommandList *c)
4886283b4a9bSStephen M. Cameron {
4887283b4a9bSStephen M. Cameron 	struct scsi_cmnd *cmd = c->scsi_cmd;
4888283b4a9bSStephen M. Cameron 	struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4889283b4a9bSStephen M. Cameron 	struct raid_map_data *map = &dev->raid_map;
4890283b4a9bSStephen M. Cameron 	struct raid_map_disk_data *dd = &map->data[0];
4891283b4a9bSStephen M. Cameron 	int is_write = 0;
4892283b4a9bSStephen M. Cameron 	u32 map_index;
4893283b4a9bSStephen M. Cameron 	u64 first_block, last_block;
4894283b4a9bSStephen M. Cameron 	u32 block_cnt;
4895283b4a9bSStephen M. Cameron 	u32 blocks_per_row;
4896283b4a9bSStephen M. Cameron 	u64 first_row, last_row;
4897283b4a9bSStephen M. Cameron 	u32 first_row_offset, last_row_offset;
4898283b4a9bSStephen M. Cameron 	u32 first_column, last_column;
48996b80b18fSScott Teel 	u64 r0_first_row, r0_last_row;
49006b80b18fSScott Teel 	u32 r5or6_blocks_per_row;
49016b80b18fSScott Teel 	u64 r5or6_first_row, r5or6_last_row;
49026b80b18fSScott Teel 	u32 r5or6_first_row_offset, r5or6_last_row_offset;
49036b80b18fSScott Teel 	u32 r5or6_first_column, r5or6_last_column;
49046b80b18fSScott Teel 	u32 total_disks_per_row;
49056b80b18fSScott Teel 	u32 stripesize;
49066b80b18fSScott Teel 	u32 first_group, last_group, current_group;
4907283b4a9bSStephen M. Cameron 	u32 map_row;
4908283b4a9bSStephen M. Cameron 	u32 disk_handle;
4909283b4a9bSStephen M. Cameron 	u64 disk_block;
4910283b4a9bSStephen M. Cameron 	u32 disk_block_cnt;
4911283b4a9bSStephen M. Cameron 	u8 cdb[16];
4912283b4a9bSStephen M. Cameron 	u8 cdb_len;
49132b08b3e9SDon Brace 	u16 strip_size;
4914283b4a9bSStephen M. Cameron #if BITS_PER_LONG == 32
4915283b4a9bSStephen M. Cameron 	u64 tmpdiv;
4916283b4a9bSStephen M. Cameron #endif
49176b80b18fSScott Teel 	int offload_to_mirror;
4918283b4a9bSStephen M. Cameron 
4919283b4a9bSStephen M. Cameron 	/* check for valid opcode, get LBA and block count */
4920283b4a9bSStephen M. Cameron 	switch (cmd->cmnd[0]) {
4921283b4a9bSStephen M. Cameron 	case WRITE_6:
4922283b4a9bSStephen M. Cameron 		is_write = 1;
4923283b4a9bSStephen M. Cameron 	case READ_6:
4924c8a6c9a6SDon Brace 		first_block = get_unaligned_be16(&cmd->cmnd[2]);
4925283b4a9bSStephen M. Cameron 		block_cnt = cmd->cmnd[4];
49263fa89a04SStephen M. Cameron 		if (block_cnt == 0)
49273fa89a04SStephen M. Cameron 			block_cnt = 256;
4928283b4a9bSStephen M. Cameron 		break;
4929283b4a9bSStephen M. Cameron 	case WRITE_10:
4930283b4a9bSStephen M. Cameron 		is_write = 1;
4931283b4a9bSStephen M. Cameron 	case READ_10:
4932283b4a9bSStephen M. Cameron 		first_block =
4933283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[2]) << 24) |
4934283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[3]) << 16) |
4935283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[4]) << 8) |
4936283b4a9bSStephen M. Cameron 			cmd->cmnd[5];
4937283b4a9bSStephen M. Cameron 		block_cnt =
4938283b4a9bSStephen M. Cameron 			(((u32) cmd->cmnd[7]) << 8) |
4939283b4a9bSStephen M. Cameron 			cmd->cmnd[8];
4940283b4a9bSStephen M. Cameron 		break;
4941283b4a9bSStephen M. Cameron 	case WRITE_12:
4942283b4a9bSStephen M. Cameron 		is_write = 1;
4943283b4a9bSStephen M. Cameron 	case READ_12:
4944283b4a9bSStephen M. Cameron 		first_block =
4945283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[2]) << 24) |
4946283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[3]) << 16) |
4947283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[4]) << 8) |
4948283b4a9bSStephen M. Cameron 			cmd->cmnd[5];
4949283b4a9bSStephen M. Cameron 		block_cnt =
4950283b4a9bSStephen M. Cameron 			(((u32) cmd->cmnd[6]) << 24) |
4951283b4a9bSStephen M. Cameron 			(((u32) cmd->cmnd[7]) << 16) |
4952283b4a9bSStephen M. Cameron 			(((u32) cmd->cmnd[8]) << 8) |
4953283b4a9bSStephen M. Cameron 		cmd->cmnd[9];
4954283b4a9bSStephen M. Cameron 		break;
4955283b4a9bSStephen M. Cameron 	case WRITE_16:
4956283b4a9bSStephen M. Cameron 		is_write = 1;
4957283b4a9bSStephen M. Cameron 	case READ_16:
4958283b4a9bSStephen M. Cameron 		first_block =
4959283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[2]) << 56) |
4960283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[3]) << 48) |
4961283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[4]) << 40) |
4962283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[5]) << 32) |
4963283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[6]) << 24) |
4964283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[7]) << 16) |
4965283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[8]) << 8) |
4966283b4a9bSStephen M. Cameron 			cmd->cmnd[9];
4967283b4a9bSStephen M. Cameron 		block_cnt =
4968283b4a9bSStephen M. Cameron 			(((u32) cmd->cmnd[10]) << 24) |
4969283b4a9bSStephen M. Cameron 			(((u32) cmd->cmnd[11]) << 16) |
4970283b4a9bSStephen M. Cameron 			(((u32) cmd->cmnd[12]) << 8) |
4971283b4a9bSStephen M. Cameron 			cmd->cmnd[13];
4972283b4a9bSStephen M. Cameron 		break;
4973283b4a9bSStephen M. Cameron 	default:
4974283b4a9bSStephen M. Cameron 		return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */
4975283b4a9bSStephen M. Cameron 	}
4976283b4a9bSStephen M. Cameron 	last_block = first_block + block_cnt - 1;
4977283b4a9bSStephen M. Cameron 
4978283b4a9bSStephen M. Cameron 	/* check for write to non-RAID-0 */
4979283b4a9bSStephen M. Cameron 	if (is_write && dev->raid_level != 0)
4980283b4a9bSStephen M. Cameron 		return IO_ACCEL_INELIGIBLE;
4981283b4a9bSStephen M. Cameron 
4982283b4a9bSStephen M. Cameron 	/* check for invalid block or wraparound */
49832b08b3e9SDon Brace 	if (last_block >= le64_to_cpu(map->volume_blk_cnt) ||
49842b08b3e9SDon Brace 		last_block < first_block)
4985283b4a9bSStephen M. Cameron 		return IO_ACCEL_INELIGIBLE;
4986283b4a9bSStephen M. Cameron 
4987283b4a9bSStephen M. Cameron 	/* calculate stripe information for the request */
49882b08b3e9SDon Brace 	blocks_per_row = le16_to_cpu(map->data_disks_per_row) *
49892b08b3e9SDon Brace 				le16_to_cpu(map->strip_size);
49902b08b3e9SDon Brace 	strip_size = le16_to_cpu(map->strip_size);
4991283b4a9bSStephen M. Cameron #if BITS_PER_LONG == 32
4992283b4a9bSStephen M. Cameron 	tmpdiv = first_block;
4993283b4a9bSStephen M. Cameron 	(void) do_div(tmpdiv, blocks_per_row);
4994283b4a9bSStephen M. Cameron 	first_row = tmpdiv;
4995283b4a9bSStephen M. Cameron 	tmpdiv = last_block;
4996283b4a9bSStephen M. Cameron 	(void) do_div(tmpdiv, blocks_per_row);
4997283b4a9bSStephen M. Cameron 	last_row = tmpdiv;
4998283b4a9bSStephen M. Cameron 	first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
4999283b4a9bSStephen M. Cameron 	last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
5000283b4a9bSStephen M. Cameron 	tmpdiv = first_row_offset;
50012b08b3e9SDon Brace 	(void) do_div(tmpdiv, strip_size);
5002283b4a9bSStephen M. Cameron 	first_column = tmpdiv;
5003283b4a9bSStephen M. Cameron 	tmpdiv = last_row_offset;
50042b08b3e9SDon Brace 	(void) do_div(tmpdiv, strip_size);
5005283b4a9bSStephen M. Cameron 	last_column = tmpdiv;
5006283b4a9bSStephen M. Cameron #else
5007283b4a9bSStephen M. Cameron 	first_row = first_block / blocks_per_row;
5008283b4a9bSStephen M. Cameron 	last_row = last_block / blocks_per_row;
5009283b4a9bSStephen M. Cameron 	first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
5010283b4a9bSStephen M. Cameron 	last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
50112b08b3e9SDon Brace 	first_column = first_row_offset / strip_size;
50122b08b3e9SDon Brace 	last_column = last_row_offset / strip_size;
5013283b4a9bSStephen M. Cameron #endif
5014283b4a9bSStephen M. Cameron 
5015283b4a9bSStephen M. Cameron 	/* if this isn't a single row/column then give to the controller */
5016283b4a9bSStephen M. Cameron 	if ((first_row != last_row) || (first_column != last_column))
5017283b4a9bSStephen M. Cameron 		return IO_ACCEL_INELIGIBLE;
5018283b4a9bSStephen M. Cameron 
5019283b4a9bSStephen M. Cameron 	/* proceeding with driver mapping */
50202b08b3e9SDon Brace 	total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
50212b08b3e9SDon Brace 				le16_to_cpu(map->metadata_disks_per_row);
5022283b4a9bSStephen M. Cameron 	map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
50232b08b3e9SDon Brace 				le16_to_cpu(map->row_cnt);
50246b80b18fSScott Teel 	map_index = (map_row * total_disks_per_row) + first_column;
50256b80b18fSScott Teel 
50266b80b18fSScott Teel 	switch (dev->raid_level) {
50276b80b18fSScott Teel 	case HPSA_RAID_0:
50286b80b18fSScott Teel 		break; /* nothing special to do */
50296b80b18fSScott Teel 	case HPSA_RAID_1:
50306b80b18fSScott Teel 		/* Handles load balance across RAID 1 members.
50316b80b18fSScott Teel 		 * (2-drive R1 and R10 with even # of drives.)
50326b80b18fSScott Teel 		 * Appropriate for SSDs, not optimal for HDDs
5033283b4a9bSStephen M. Cameron 		 */
50342b08b3e9SDon Brace 		BUG_ON(le16_to_cpu(map->layout_map_count) != 2);
5035283b4a9bSStephen M. Cameron 		if (dev->offload_to_mirror)
50362b08b3e9SDon Brace 			map_index += le16_to_cpu(map->data_disks_per_row);
5037283b4a9bSStephen M. Cameron 		dev->offload_to_mirror = !dev->offload_to_mirror;
50386b80b18fSScott Teel 		break;
50396b80b18fSScott Teel 	case HPSA_RAID_ADM:
50406b80b18fSScott Teel 		/* Handles N-way mirrors  (R1-ADM)
50416b80b18fSScott Teel 		 * and R10 with # of drives divisible by 3.)
50426b80b18fSScott Teel 		 */
50432b08b3e9SDon Brace 		BUG_ON(le16_to_cpu(map->layout_map_count) != 3);
50446b80b18fSScott Teel 
50456b80b18fSScott Teel 		offload_to_mirror = dev->offload_to_mirror;
50466b80b18fSScott Teel 		raid_map_helper(map, offload_to_mirror,
50476b80b18fSScott Teel 				&map_index, &current_group);
50486b80b18fSScott Teel 		/* set mirror group to use next time */
50496b80b18fSScott Teel 		offload_to_mirror =
50502b08b3e9SDon Brace 			(offload_to_mirror >=
50512b08b3e9SDon Brace 			le16_to_cpu(map->layout_map_count) - 1)
50526b80b18fSScott Teel 			? 0 : offload_to_mirror + 1;
50536b80b18fSScott Teel 		dev->offload_to_mirror = offload_to_mirror;
50546b80b18fSScott Teel 		/* Avoid direct use of dev->offload_to_mirror within this
50556b80b18fSScott Teel 		 * function since multiple threads might simultaneously
50566b80b18fSScott Teel 		 * increment it beyond the range of dev->layout_map_count -1.
50576b80b18fSScott Teel 		 */
50586b80b18fSScott Teel 		break;
50596b80b18fSScott Teel 	case HPSA_RAID_5:
50606b80b18fSScott Teel 	case HPSA_RAID_6:
50612b08b3e9SDon Brace 		if (le16_to_cpu(map->layout_map_count) <= 1)
50626b80b18fSScott Teel 			break;
50636b80b18fSScott Teel 
50646b80b18fSScott Teel 		/* Verify first and last block are in same RAID group */
50656b80b18fSScott Teel 		r5or6_blocks_per_row =
50662b08b3e9SDon Brace 			le16_to_cpu(map->strip_size) *
50672b08b3e9SDon Brace 			le16_to_cpu(map->data_disks_per_row);
50686b80b18fSScott Teel 		BUG_ON(r5or6_blocks_per_row == 0);
50692b08b3e9SDon Brace 		stripesize = r5or6_blocks_per_row *
50702b08b3e9SDon Brace 			le16_to_cpu(map->layout_map_count);
50716b80b18fSScott Teel #if BITS_PER_LONG == 32
50726b80b18fSScott Teel 		tmpdiv = first_block;
50736b80b18fSScott Teel 		first_group = do_div(tmpdiv, stripesize);
50746b80b18fSScott Teel 		tmpdiv = first_group;
50756b80b18fSScott Teel 		(void) do_div(tmpdiv, r5or6_blocks_per_row);
50766b80b18fSScott Teel 		first_group = tmpdiv;
50776b80b18fSScott Teel 		tmpdiv = last_block;
50786b80b18fSScott Teel 		last_group = do_div(tmpdiv, stripesize);
50796b80b18fSScott Teel 		tmpdiv = last_group;
50806b80b18fSScott Teel 		(void) do_div(tmpdiv, r5or6_blocks_per_row);
50816b80b18fSScott Teel 		last_group = tmpdiv;
50826b80b18fSScott Teel #else
50836b80b18fSScott Teel 		first_group = (first_block % stripesize) / r5or6_blocks_per_row;
50846b80b18fSScott Teel 		last_group = (last_block % stripesize) / r5or6_blocks_per_row;
50856b80b18fSScott Teel #endif
5086000ff7c2SStephen M. Cameron 		if (first_group != last_group)
50876b80b18fSScott Teel 			return IO_ACCEL_INELIGIBLE;
50886b80b18fSScott Teel 
50896b80b18fSScott Teel 		/* Verify request is in a single row of RAID 5/6 */
50906b80b18fSScott Teel #if BITS_PER_LONG == 32
50916b80b18fSScott Teel 		tmpdiv = first_block;
50926b80b18fSScott Teel 		(void) do_div(tmpdiv, stripesize);
50936b80b18fSScott Teel 		first_row = r5or6_first_row = r0_first_row = tmpdiv;
50946b80b18fSScott Teel 		tmpdiv = last_block;
50956b80b18fSScott Teel 		(void) do_div(tmpdiv, stripesize);
50966b80b18fSScott Teel 		r5or6_last_row = r0_last_row = tmpdiv;
50976b80b18fSScott Teel #else
50986b80b18fSScott Teel 		first_row = r5or6_first_row = r0_first_row =
50996b80b18fSScott Teel 						first_block / stripesize;
51006b80b18fSScott Teel 		r5or6_last_row = r0_last_row = last_block / stripesize;
51016b80b18fSScott Teel #endif
51026b80b18fSScott Teel 		if (r5or6_first_row != r5or6_last_row)
51036b80b18fSScott Teel 			return IO_ACCEL_INELIGIBLE;
51046b80b18fSScott Teel 
51056b80b18fSScott Teel 
51066b80b18fSScott Teel 		/* Verify request is in a single column */
51076b80b18fSScott Teel #if BITS_PER_LONG == 32
51086b80b18fSScott Teel 		tmpdiv = first_block;
51096b80b18fSScott Teel 		first_row_offset = do_div(tmpdiv, stripesize);
51106b80b18fSScott Teel 		tmpdiv = first_row_offset;
51116b80b18fSScott Teel 		first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row);
51126b80b18fSScott Teel 		r5or6_first_row_offset = first_row_offset;
51136b80b18fSScott Teel 		tmpdiv = last_block;
51146b80b18fSScott Teel 		r5or6_last_row_offset = do_div(tmpdiv, stripesize);
51156b80b18fSScott Teel 		tmpdiv = r5or6_last_row_offset;
51166b80b18fSScott Teel 		r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row);
51176b80b18fSScott Teel 		tmpdiv = r5or6_first_row_offset;
51186b80b18fSScott Teel 		(void) do_div(tmpdiv, map->strip_size);
51196b80b18fSScott Teel 		first_column = r5or6_first_column = tmpdiv;
51206b80b18fSScott Teel 		tmpdiv = r5or6_last_row_offset;
51216b80b18fSScott Teel 		(void) do_div(tmpdiv, map->strip_size);
51226b80b18fSScott Teel 		r5or6_last_column = tmpdiv;
51236b80b18fSScott Teel #else
51246b80b18fSScott Teel 		first_row_offset = r5or6_first_row_offset =
51256b80b18fSScott Teel 			(u32)((first_block % stripesize) %
51266b80b18fSScott Teel 						r5or6_blocks_per_row);
51276b80b18fSScott Teel 
51286b80b18fSScott Teel 		r5or6_last_row_offset =
51296b80b18fSScott Teel 			(u32)((last_block % stripesize) %
51306b80b18fSScott Teel 						r5or6_blocks_per_row);
51316b80b18fSScott Teel 
51326b80b18fSScott Teel 		first_column = r5or6_first_column =
51332b08b3e9SDon Brace 			r5or6_first_row_offset / le16_to_cpu(map->strip_size);
51346b80b18fSScott Teel 		r5or6_last_column =
51352b08b3e9SDon Brace 			r5or6_last_row_offset / le16_to_cpu(map->strip_size);
51366b80b18fSScott Teel #endif
51376b80b18fSScott Teel 		if (r5or6_first_column != r5or6_last_column)
51386b80b18fSScott Teel 			return IO_ACCEL_INELIGIBLE;
51396b80b18fSScott Teel 
51406b80b18fSScott Teel 		/* Request is eligible */
51416b80b18fSScott Teel 		map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
51422b08b3e9SDon Brace 			le16_to_cpu(map->row_cnt);
51436b80b18fSScott Teel 
51446b80b18fSScott Teel 		map_index = (first_group *
51452b08b3e9SDon Brace 			(le16_to_cpu(map->row_cnt) * total_disks_per_row)) +
51466b80b18fSScott Teel 			(map_row * total_disks_per_row) + first_column;
51476b80b18fSScott Teel 		break;
51486b80b18fSScott Teel 	default:
51496b80b18fSScott Teel 		return IO_ACCEL_INELIGIBLE;
5150283b4a9bSStephen M. Cameron 	}
51516b80b18fSScott Teel 
515207543e0cSStephen Cameron 	if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES))
515307543e0cSStephen Cameron 		return IO_ACCEL_INELIGIBLE;
515407543e0cSStephen Cameron 
515503383736SDon Brace 	c->phys_disk = dev->phys_disk[map_index];
5156c3390df4SDon Brace 	if (!c->phys_disk)
5157c3390df4SDon Brace 		return IO_ACCEL_INELIGIBLE;
515803383736SDon Brace 
5159283b4a9bSStephen M. Cameron 	disk_handle = dd[map_index].ioaccel_handle;
51602b08b3e9SDon Brace 	disk_block = le64_to_cpu(map->disk_starting_blk) +
51612b08b3e9SDon Brace 			first_row * le16_to_cpu(map->strip_size) +
51622b08b3e9SDon Brace 			(first_row_offset - first_column *
51632b08b3e9SDon Brace 			le16_to_cpu(map->strip_size));
5164283b4a9bSStephen M. Cameron 	disk_block_cnt = block_cnt;
5165283b4a9bSStephen M. Cameron 
5166283b4a9bSStephen M. Cameron 	/* handle differing logical/physical block sizes */
5167283b4a9bSStephen M. Cameron 	if (map->phys_blk_shift) {
5168283b4a9bSStephen M. Cameron 		disk_block <<= map->phys_blk_shift;
5169283b4a9bSStephen M. Cameron 		disk_block_cnt <<= map->phys_blk_shift;
5170283b4a9bSStephen M. Cameron 	}
5171283b4a9bSStephen M. Cameron 	BUG_ON(disk_block_cnt > 0xffff);
5172283b4a9bSStephen M. Cameron 
5173283b4a9bSStephen M. Cameron 	/* build the new CDB for the physical disk I/O */
5174283b4a9bSStephen M. Cameron 	if (disk_block > 0xffffffff) {
5175283b4a9bSStephen M. Cameron 		cdb[0] = is_write ? WRITE_16 : READ_16;
5176283b4a9bSStephen M. Cameron 		cdb[1] = 0;
5177283b4a9bSStephen M. Cameron 		cdb[2] = (u8) (disk_block >> 56);
5178283b4a9bSStephen M. Cameron 		cdb[3] = (u8) (disk_block >> 48);
5179283b4a9bSStephen M. Cameron 		cdb[4] = (u8) (disk_block >> 40);
5180283b4a9bSStephen M. Cameron 		cdb[5] = (u8) (disk_block >> 32);
5181283b4a9bSStephen M. Cameron 		cdb[6] = (u8) (disk_block >> 24);
5182283b4a9bSStephen M. Cameron 		cdb[7] = (u8) (disk_block >> 16);
5183283b4a9bSStephen M. Cameron 		cdb[8] = (u8) (disk_block >> 8);
5184283b4a9bSStephen M. Cameron 		cdb[9] = (u8) (disk_block);
5185283b4a9bSStephen M. Cameron 		cdb[10] = (u8) (disk_block_cnt >> 24);
5186283b4a9bSStephen M. Cameron 		cdb[11] = (u8) (disk_block_cnt >> 16);
5187283b4a9bSStephen M. Cameron 		cdb[12] = (u8) (disk_block_cnt >> 8);
5188283b4a9bSStephen M. Cameron 		cdb[13] = (u8) (disk_block_cnt);
5189283b4a9bSStephen M. Cameron 		cdb[14] = 0;
5190283b4a9bSStephen M. Cameron 		cdb[15] = 0;
5191283b4a9bSStephen M. Cameron 		cdb_len = 16;
5192283b4a9bSStephen M. Cameron 	} else {
5193283b4a9bSStephen M. Cameron 		cdb[0] = is_write ? WRITE_10 : READ_10;
5194283b4a9bSStephen M. Cameron 		cdb[1] = 0;
5195283b4a9bSStephen M. Cameron 		cdb[2] = (u8) (disk_block >> 24);
5196283b4a9bSStephen M. Cameron 		cdb[3] = (u8) (disk_block >> 16);
5197283b4a9bSStephen M. Cameron 		cdb[4] = (u8) (disk_block >> 8);
5198283b4a9bSStephen M. Cameron 		cdb[5] = (u8) (disk_block);
5199283b4a9bSStephen M. Cameron 		cdb[6] = 0;
5200283b4a9bSStephen M. Cameron 		cdb[7] = (u8) (disk_block_cnt >> 8);
5201283b4a9bSStephen M. Cameron 		cdb[8] = (u8) (disk_block_cnt);
5202283b4a9bSStephen M. Cameron 		cdb[9] = 0;
5203283b4a9bSStephen M. Cameron 		cdb_len = 10;
5204283b4a9bSStephen M. Cameron 	}
5205283b4a9bSStephen M. Cameron 	return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len,
520603383736SDon Brace 						dev->scsi3addr,
520703383736SDon Brace 						dev->phys_disk[map_index]);
5208283b4a9bSStephen M. Cameron }
5209283b4a9bSStephen M. Cameron 
521025163bd5SWebb Scales /*
521125163bd5SWebb Scales  * Submit commands down the "normal" RAID stack path
521225163bd5SWebb Scales  * All callers to hpsa_ciss_submit must check lockup_detected
521325163bd5SWebb Scales  * beforehand, before (opt.) and after calling cmd_alloc
521425163bd5SWebb Scales  */
5215574f05d3SStephen Cameron static int hpsa_ciss_submit(struct ctlr_info *h,
5216574f05d3SStephen Cameron 	struct CommandList *c, struct scsi_cmnd *cmd,
5217574f05d3SStephen Cameron 	unsigned char scsi3addr[])
5218edd16368SStephen M. Cameron {
5219edd16368SStephen M. Cameron 	cmd->host_scribble = (unsigned char *) c;
5220edd16368SStephen M. Cameron 	c->cmd_type = CMD_SCSI;
5221edd16368SStephen M. Cameron 	c->scsi_cmd = cmd;
5222edd16368SStephen M. Cameron 	c->Header.ReplyQueue = 0;  /* unused in simple mode */
5223edd16368SStephen M. Cameron 	memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
5224f2405db8SDon Brace 	c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT));
5225edd16368SStephen M. Cameron 
5226edd16368SStephen M. Cameron 	/* Fill in the request block... */
5227edd16368SStephen M. Cameron 
5228edd16368SStephen M. Cameron 	c->Request.Timeout = 0;
5229edd16368SStephen M. Cameron 	BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
5230edd16368SStephen M. Cameron 	c->Request.CDBLen = cmd->cmd_len;
5231edd16368SStephen M. Cameron 	memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
5232edd16368SStephen M. Cameron 	switch (cmd->sc_data_direction) {
5233edd16368SStephen M. Cameron 	case DMA_TO_DEVICE:
5234a505b86fSStephen M. Cameron 		c->Request.type_attr_dir =
5235a505b86fSStephen M. Cameron 			TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE);
5236edd16368SStephen M. Cameron 		break;
5237edd16368SStephen M. Cameron 	case DMA_FROM_DEVICE:
5238a505b86fSStephen M. Cameron 		c->Request.type_attr_dir =
5239a505b86fSStephen M. Cameron 			TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ);
5240edd16368SStephen M. Cameron 		break;
5241edd16368SStephen M. Cameron 	case DMA_NONE:
5242a505b86fSStephen M. Cameron 		c->Request.type_attr_dir =
5243a505b86fSStephen M. Cameron 			TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE);
5244edd16368SStephen M. Cameron 		break;
5245edd16368SStephen M. Cameron 	case DMA_BIDIRECTIONAL:
5246edd16368SStephen M. Cameron 		/* This can happen if a buggy application does a scsi passthru
5247edd16368SStephen M. Cameron 		 * and sets both inlen and outlen to non-zero. ( see
5248edd16368SStephen M. Cameron 		 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
5249edd16368SStephen M. Cameron 		 */
5250edd16368SStephen M. Cameron 
5251a505b86fSStephen M. Cameron 		c->Request.type_attr_dir =
5252a505b86fSStephen M. Cameron 			TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD);
5253edd16368SStephen M. Cameron 		/* This is technically wrong, and hpsa controllers should
5254edd16368SStephen M. Cameron 		 * reject it with CMD_INVALID, which is the most correct
5255edd16368SStephen M. Cameron 		 * response, but non-fibre backends appear to let it
5256edd16368SStephen M. Cameron 		 * slide by, and give the same results as if this field
5257edd16368SStephen M. Cameron 		 * were set correctly.  Either way is acceptable for
5258edd16368SStephen M. Cameron 		 * our purposes here.
5259edd16368SStephen M. Cameron 		 */
5260edd16368SStephen M. Cameron 
5261edd16368SStephen M. Cameron 		break;
5262edd16368SStephen M. Cameron 
5263edd16368SStephen M. Cameron 	default:
5264edd16368SStephen M. Cameron 		dev_err(&h->pdev->dev, "unknown data direction: %d\n",
5265edd16368SStephen M. Cameron 			cmd->sc_data_direction);
5266edd16368SStephen M. Cameron 		BUG();
5267edd16368SStephen M. Cameron 		break;
5268edd16368SStephen M. Cameron 	}
5269edd16368SStephen M. Cameron 
527033a2ffceSStephen M. Cameron 	if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
527173153fe5SWebb Scales 		hpsa_cmd_resolve_and_free(h, c);
5272edd16368SStephen M. Cameron 		return SCSI_MLQUEUE_HOST_BUSY;
5273edd16368SStephen M. Cameron 	}
5274edd16368SStephen M. Cameron 	enqueue_cmd_and_start_io(h, c);
5275edd16368SStephen M. Cameron 	/* the cmd'll come back via intr handler in complete_scsi_command()  */
5276edd16368SStephen M. Cameron 	return 0;
5277edd16368SStephen M. Cameron }
5278edd16368SStephen M. Cameron 
5279360c73bdSStephen Cameron static void hpsa_cmd_init(struct ctlr_info *h, int index,
5280360c73bdSStephen Cameron 				struct CommandList *c)
5281360c73bdSStephen Cameron {
5282360c73bdSStephen Cameron 	dma_addr_t cmd_dma_handle, err_dma_handle;
5283360c73bdSStephen Cameron 
5284360c73bdSStephen Cameron 	/* Zero out all of commandlist except the last field, refcount */
5285360c73bdSStephen Cameron 	memset(c, 0, offsetof(struct CommandList, refcount));
5286360c73bdSStephen Cameron 	c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT));
5287360c73bdSStephen Cameron 	cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
5288360c73bdSStephen Cameron 	c->err_info = h->errinfo_pool + index;
5289360c73bdSStephen Cameron 	memset(c->err_info, 0, sizeof(*c->err_info));
5290360c73bdSStephen Cameron 	err_dma_handle = h->errinfo_pool_dhandle
5291360c73bdSStephen Cameron 	    + index * sizeof(*c->err_info);
5292360c73bdSStephen Cameron 	c->cmdindex = index;
5293360c73bdSStephen Cameron 	c->busaddr = (u32) cmd_dma_handle;
5294360c73bdSStephen Cameron 	c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle);
5295360c73bdSStephen Cameron 	c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info));
5296360c73bdSStephen Cameron 	c->h = h;
5297a58e7e53SWebb Scales 	c->scsi_cmd = SCSI_CMD_IDLE;
5298360c73bdSStephen Cameron }
5299360c73bdSStephen Cameron 
5300360c73bdSStephen Cameron static void hpsa_preinitialize_commands(struct ctlr_info *h)
5301360c73bdSStephen Cameron {
5302360c73bdSStephen Cameron 	int i;
5303360c73bdSStephen Cameron 
5304360c73bdSStephen Cameron 	for (i = 0; i < h->nr_cmds; i++) {
5305360c73bdSStephen Cameron 		struct CommandList *c = h->cmd_pool + i;
5306360c73bdSStephen Cameron 
5307360c73bdSStephen Cameron 		hpsa_cmd_init(h, i, c);
5308360c73bdSStephen Cameron 		atomic_set(&c->refcount, 0);
5309360c73bdSStephen Cameron 	}
5310360c73bdSStephen Cameron }
5311360c73bdSStephen Cameron 
5312360c73bdSStephen Cameron static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index,
5313360c73bdSStephen Cameron 				struct CommandList *c)
5314360c73bdSStephen Cameron {
5315360c73bdSStephen Cameron 	dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
5316360c73bdSStephen Cameron 
531773153fe5SWebb Scales 	BUG_ON(c->cmdindex != index);
531873153fe5SWebb Scales 
5319360c73bdSStephen Cameron 	memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
5320360c73bdSStephen Cameron 	memset(c->err_info, 0, sizeof(*c->err_info));
5321360c73bdSStephen Cameron 	c->busaddr = (u32) cmd_dma_handle;
5322360c73bdSStephen Cameron }
5323360c73bdSStephen Cameron 
5324592a0ad5SWebb Scales static int hpsa_ioaccel_submit(struct ctlr_info *h,
5325592a0ad5SWebb Scales 		struct CommandList *c, struct scsi_cmnd *cmd,
5326592a0ad5SWebb Scales 		unsigned char *scsi3addr)
5327592a0ad5SWebb Scales {
5328592a0ad5SWebb Scales 	struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
5329592a0ad5SWebb Scales 	int rc = IO_ACCEL_INELIGIBLE;
5330592a0ad5SWebb Scales 
5331592a0ad5SWebb Scales 	cmd->host_scribble = (unsigned char *) c;
5332592a0ad5SWebb Scales 
5333592a0ad5SWebb Scales 	if (dev->offload_enabled) {
5334592a0ad5SWebb Scales 		hpsa_cmd_init(h, c->cmdindex, c);
5335592a0ad5SWebb Scales 		c->cmd_type = CMD_SCSI;
5336592a0ad5SWebb Scales 		c->scsi_cmd = cmd;
5337592a0ad5SWebb Scales 		rc = hpsa_scsi_ioaccel_raid_map(h, c);
5338592a0ad5SWebb Scales 		if (rc < 0)     /* scsi_dma_map failed. */
5339592a0ad5SWebb Scales 			rc = SCSI_MLQUEUE_HOST_BUSY;
5340a3144e0bSJoe Handzik 	} else if (dev->hba_ioaccel_enabled) {
5341592a0ad5SWebb Scales 		hpsa_cmd_init(h, c->cmdindex, c);
5342592a0ad5SWebb Scales 		c->cmd_type = CMD_SCSI;
5343592a0ad5SWebb Scales 		c->scsi_cmd = cmd;
5344592a0ad5SWebb Scales 		rc = hpsa_scsi_ioaccel_direct_map(h, c);
5345592a0ad5SWebb Scales 		if (rc < 0)     /* scsi_dma_map failed. */
5346592a0ad5SWebb Scales 			rc = SCSI_MLQUEUE_HOST_BUSY;
5347592a0ad5SWebb Scales 	}
5348592a0ad5SWebb Scales 	return rc;
5349592a0ad5SWebb Scales }
5350592a0ad5SWebb Scales 
5351080ef1ccSDon Brace static void hpsa_command_resubmit_worker(struct work_struct *work)
5352080ef1ccSDon Brace {
5353080ef1ccSDon Brace 	struct scsi_cmnd *cmd;
5354080ef1ccSDon Brace 	struct hpsa_scsi_dev_t *dev;
53558a0ff92cSWebb Scales 	struct CommandList *c = container_of(work, struct CommandList, work);
5356080ef1ccSDon Brace 
5357080ef1ccSDon Brace 	cmd = c->scsi_cmd;
5358080ef1ccSDon Brace 	dev = cmd->device->hostdata;
5359080ef1ccSDon Brace 	if (!dev) {
5360080ef1ccSDon Brace 		cmd->result = DID_NO_CONNECT << 16;
53618a0ff92cSWebb Scales 		return hpsa_cmd_free_and_done(c->h, c, cmd);
5362080ef1ccSDon Brace 	}
5363d604f533SWebb Scales 	if (c->reset_pending)
5364d604f533SWebb Scales 		return hpsa_cmd_resolve_and_free(c->h, c);
5365a58e7e53SWebb Scales 	if (c->abort_pending)
5366a58e7e53SWebb Scales 		return hpsa_cmd_abort_and_free(c->h, c, cmd);
5367592a0ad5SWebb Scales 	if (c->cmd_type == CMD_IOACCEL2) {
5368592a0ad5SWebb Scales 		struct ctlr_info *h = c->h;
5369592a0ad5SWebb Scales 		struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
5370592a0ad5SWebb Scales 		int rc;
5371592a0ad5SWebb Scales 
5372592a0ad5SWebb Scales 		if (c2->error_data.serv_response ==
5373592a0ad5SWebb Scales 				IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL) {
5374592a0ad5SWebb Scales 			rc = hpsa_ioaccel_submit(h, c, cmd, dev->scsi3addr);
5375592a0ad5SWebb Scales 			if (rc == 0)
5376592a0ad5SWebb Scales 				return;
5377592a0ad5SWebb Scales 			if (rc == SCSI_MLQUEUE_HOST_BUSY) {
5378592a0ad5SWebb Scales 				/*
5379592a0ad5SWebb Scales 				 * If we get here, it means dma mapping failed.
5380592a0ad5SWebb Scales 				 * Try again via scsi mid layer, which will
5381592a0ad5SWebb Scales 				 * then get SCSI_MLQUEUE_HOST_BUSY.
5382592a0ad5SWebb Scales 				 */
5383592a0ad5SWebb Scales 				cmd->result = DID_IMM_RETRY << 16;
53848a0ff92cSWebb Scales 				return hpsa_cmd_free_and_done(h, c, cmd);
5385592a0ad5SWebb Scales 			}
5386592a0ad5SWebb Scales 			/* else, fall thru and resubmit down CISS path */
5387592a0ad5SWebb Scales 		}
5388592a0ad5SWebb Scales 	}
5389360c73bdSStephen Cameron 	hpsa_cmd_partial_init(c->h, c->cmdindex, c);
5390080ef1ccSDon Brace 	if (hpsa_ciss_submit(c->h, c, cmd, dev->scsi3addr)) {
5391080ef1ccSDon Brace 		/*
5392080ef1ccSDon Brace 		 * If we get here, it means dma mapping failed. Try
5393080ef1ccSDon Brace 		 * again via scsi mid layer, which will then get
5394080ef1ccSDon Brace 		 * SCSI_MLQUEUE_HOST_BUSY.
5395592a0ad5SWebb Scales 		 *
5396592a0ad5SWebb Scales 		 * hpsa_ciss_submit will have already freed c
5397592a0ad5SWebb Scales 		 * if it encountered a dma mapping failure.
5398080ef1ccSDon Brace 		 */
5399080ef1ccSDon Brace 		cmd->result = DID_IMM_RETRY << 16;
5400080ef1ccSDon Brace 		cmd->scsi_done(cmd);
5401080ef1ccSDon Brace 	}
5402080ef1ccSDon Brace }
5403080ef1ccSDon Brace 
5404574f05d3SStephen Cameron /* Running in struct Scsi_Host->host_lock less mode */
5405574f05d3SStephen Cameron static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd)
5406574f05d3SStephen Cameron {
5407574f05d3SStephen Cameron 	struct ctlr_info *h;
5408574f05d3SStephen Cameron 	struct hpsa_scsi_dev_t *dev;
5409574f05d3SStephen Cameron 	unsigned char scsi3addr[8];
5410574f05d3SStephen Cameron 	struct CommandList *c;
5411574f05d3SStephen Cameron 	int rc = 0;
5412574f05d3SStephen Cameron 
5413574f05d3SStephen Cameron 	/* Get the ptr to our adapter structure out of cmd->host. */
5414574f05d3SStephen Cameron 	h = sdev_to_hba(cmd->device);
541573153fe5SWebb Scales 
541673153fe5SWebb Scales 	BUG_ON(cmd->request->tag < 0);
541773153fe5SWebb Scales 
5418574f05d3SStephen Cameron 	dev = cmd->device->hostdata;
5419574f05d3SStephen Cameron 	if (!dev) {
5420ba74fdc4SDon Brace 		cmd->result = NOT_READY << 16; /* host byte */
5421ba74fdc4SDon Brace 		cmd->scsi_done(cmd);
5422ba74fdc4SDon Brace 		return 0;
5423ba74fdc4SDon Brace 	}
5424ba74fdc4SDon Brace 
5425ba74fdc4SDon Brace 	if (dev->removed) {
5426574f05d3SStephen Cameron 		cmd->result = DID_NO_CONNECT << 16;
5427574f05d3SStephen Cameron 		cmd->scsi_done(cmd);
5428574f05d3SStephen Cameron 		return 0;
5429574f05d3SStephen Cameron 	}
543073153fe5SWebb Scales 
5431574f05d3SStephen Cameron 	memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
5432574f05d3SStephen Cameron 
5433574f05d3SStephen Cameron 	if (unlikely(lockup_detected(h))) {
543425163bd5SWebb Scales 		cmd->result = DID_NO_CONNECT << 16;
5435574f05d3SStephen Cameron 		cmd->scsi_done(cmd);
5436574f05d3SStephen Cameron 		return 0;
5437574f05d3SStephen Cameron 	}
543873153fe5SWebb Scales 	c = cmd_tagged_alloc(h, cmd);
5439574f05d3SStephen Cameron 
5440407863cbSStephen Cameron 	/*
5441407863cbSStephen Cameron 	 * Call alternate submit routine for I/O accelerated commands.
5442574f05d3SStephen Cameron 	 * Retries always go down the normal I/O path.
5443574f05d3SStephen Cameron 	 */
5444574f05d3SStephen Cameron 	if (likely(cmd->retries == 0 &&
5445574f05d3SStephen Cameron 		cmd->request->cmd_type == REQ_TYPE_FS &&
5446574f05d3SStephen Cameron 		h->acciopath_status)) {
5447592a0ad5SWebb Scales 		rc = hpsa_ioaccel_submit(h, c, cmd, scsi3addr);
5448574f05d3SStephen Cameron 		if (rc == 0)
5449592a0ad5SWebb Scales 			return 0;
5450592a0ad5SWebb Scales 		if (rc == SCSI_MLQUEUE_HOST_BUSY) {
545173153fe5SWebb Scales 			hpsa_cmd_resolve_and_free(h, c);
5452574f05d3SStephen Cameron 			return SCSI_MLQUEUE_HOST_BUSY;
5453574f05d3SStephen Cameron 		}
5454574f05d3SStephen Cameron 	}
5455574f05d3SStephen Cameron 	return hpsa_ciss_submit(h, c, cmd, scsi3addr);
5456574f05d3SStephen Cameron }
5457574f05d3SStephen Cameron 
54588ebc9248SWebb Scales static void hpsa_scan_complete(struct ctlr_info *h)
54595f389360SStephen M. Cameron {
54605f389360SStephen M. Cameron 	unsigned long flags;
54615f389360SStephen M. Cameron 
54625f389360SStephen M. Cameron 	spin_lock_irqsave(&h->scan_lock, flags);
54635f389360SStephen M. Cameron 	h->scan_finished = 1;
54645f389360SStephen M. Cameron 	wake_up_all(&h->scan_wait_queue);
54655f389360SStephen M. Cameron 	spin_unlock_irqrestore(&h->scan_lock, flags);
54665f389360SStephen M. Cameron }
54675f389360SStephen M. Cameron 
5468a08a8471SStephen M. Cameron static void hpsa_scan_start(struct Scsi_Host *sh)
5469a08a8471SStephen M. Cameron {
5470a08a8471SStephen M. Cameron 	struct ctlr_info *h = shost_to_hba(sh);
5471a08a8471SStephen M. Cameron 	unsigned long flags;
5472a08a8471SStephen M. Cameron 
54738ebc9248SWebb Scales 	/*
54748ebc9248SWebb Scales 	 * Don't let rescans be initiated on a controller known to be locked
54758ebc9248SWebb Scales 	 * up.  If the controller locks up *during* a rescan, that thread is
54768ebc9248SWebb Scales 	 * probably hosed, but at least we can prevent new rescan threads from
54778ebc9248SWebb Scales 	 * piling up on a locked up controller.
54788ebc9248SWebb Scales 	 */
54798ebc9248SWebb Scales 	if (unlikely(lockup_detected(h)))
54808ebc9248SWebb Scales 		return hpsa_scan_complete(h);
54815f389360SStephen M. Cameron 
5482a08a8471SStephen M. Cameron 	/* wait until any scan already in progress is finished. */
5483a08a8471SStephen M. Cameron 	while (1) {
5484a08a8471SStephen M. Cameron 		spin_lock_irqsave(&h->scan_lock, flags);
5485a08a8471SStephen M. Cameron 		if (h->scan_finished)
5486a08a8471SStephen M. Cameron 			break;
5487a08a8471SStephen M. Cameron 		spin_unlock_irqrestore(&h->scan_lock, flags);
5488a08a8471SStephen M. Cameron 		wait_event(h->scan_wait_queue, h->scan_finished);
5489a08a8471SStephen M. Cameron 		/* Note: We don't need to worry about a race between this
5490a08a8471SStephen M. Cameron 		 * thread and driver unload because the midlayer will
5491a08a8471SStephen M. Cameron 		 * have incremented the reference count, so unload won't
5492a08a8471SStephen M. Cameron 		 * happen if we're in here.
5493a08a8471SStephen M. Cameron 		 */
5494a08a8471SStephen M. Cameron 	}
5495a08a8471SStephen M. Cameron 	h->scan_finished = 0; /* mark scan as in progress */
5496a08a8471SStephen M. Cameron 	spin_unlock_irqrestore(&h->scan_lock, flags);
5497a08a8471SStephen M. Cameron 
54988ebc9248SWebb Scales 	if (unlikely(lockup_detected(h)))
54998ebc9248SWebb Scales 		return hpsa_scan_complete(h);
55005f389360SStephen M. Cameron 
55018aa60681SDon Brace 	hpsa_update_scsi_devices(h);
5502a08a8471SStephen M. Cameron 
55038ebc9248SWebb Scales 	hpsa_scan_complete(h);
5504a08a8471SStephen M. Cameron }
5505a08a8471SStephen M. Cameron 
55067c0a0229SDon Brace static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth)
55077c0a0229SDon Brace {
550803383736SDon Brace 	struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata;
550903383736SDon Brace 
551003383736SDon Brace 	if (!logical_drive)
551103383736SDon Brace 		return -ENODEV;
55127c0a0229SDon Brace 
55137c0a0229SDon Brace 	if (qdepth < 1)
55147c0a0229SDon Brace 		qdepth = 1;
551503383736SDon Brace 	else if (qdepth > logical_drive->queue_depth)
551603383736SDon Brace 		qdepth = logical_drive->queue_depth;
551703383736SDon Brace 
551803383736SDon Brace 	return scsi_change_queue_depth(sdev, qdepth);
55197c0a0229SDon Brace }
55207c0a0229SDon Brace 
5521a08a8471SStephen M. Cameron static int hpsa_scan_finished(struct Scsi_Host *sh,
5522a08a8471SStephen M. Cameron 	unsigned long elapsed_time)
5523a08a8471SStephen M. Cameron {
5524a08a8471SStephen M. Cameron 	struct ctlr_info *h = shost_to_hba(sh);
5525a08a8471SStephen M. Cameron 	unsigned long flags;
5526a08a8471SStephen M. Cameron 	int finished;
5527a08a8471SStephen M. Cameron 
5528a08a8471SStephen M. Cameron 	spin_lock_irqsave(&h->scan_lock, flags);
5529a08a8471SStephen M. Cameron 	finished = h->scan_finished;
5530a08a8471SStephen M. Cameron 	spin_unlock_irqrestore(&h->scan_lock, flags);
5531a08a8471SStephen M. Cameron 	return finished;
5532a08a8471SStephen M. Cameron }
5533a08a8471SStephen M. Cameron 
55342946e82bSRobert Elliott static int hpsa_scsi_host_alloc(struct ctlr_info *h)
5535edd16368SStephen M. Cameron {
5536b705690dSStephen M. Cameron 	struct Scsi_Host *sh;
5537edd16368SStephen M. Cameron 
5538b705690dSStephen M. Cameron 	sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
55392946e82bSRobert Elliott 	if (sh == NULL) {
55402946e82bSRobert Elliott 		dev_err(&h->pdev->dev, "scsi_host_alloc failed\n");
55412946e82bSRobert Elliott 		return -ENOMEM;
55422946e82bSRobert Elliott 	}
5543b705690dSStephen M. Cameron 
5544b705690dSStephen M. Cameron 	sh->io_port = 0;
5545b705690dSStephen M. Cameron 	sh->n_io_port = 0;
5546b705690dSStephen M. Cameron 	sh->this_id = -1;
5547b705690dSStephen M. Cameron 	sh->max_channel = 3;
5548b705690dSStephen M. Cameron 	sh->max_cmd_len = MAX_COMMAND_SIZE;
5549b705690dSStephen M. Cameron 	sh->max_lun = HPSA_MAX_LUN;
5550b705690dSStephen M. Cameron 	sh->max_id = HPSA_MAX_LUN;
555141ce4c35SStephen Cameron 	sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS;
5552d54c5c24SStephen Cameron 	sh->cmd_per_lun = sh->can_queue;
5553b705690dSStephen M. Cameron 	sh->sg_tablesize = h->maxsgentries;
5554d04e62b9SKevin Barnett 	sh->transportt = hpsa_sas_transport_template;
5555b705690dSStephen M. Cameron 	sh->hostdata[0] = (unsigned long) h;
5556b705690dSStephen M. Cameron 	sh->irq = h->intr[h->intr_mode];
5557b705690dSStephen M. Cameron 	sh->unique_id = sh->irq;
555864d513acSChristoph Hellwig 
55592946e82bSRobert Elliott 	h->scsi_host = sh;
55602946e82bSRobert Elliott 	return 0;
55612946e82bSRobert Elliott }
55622946e82bSRobert Elliott 
55632946e82bSRobert Elliott static int hpsa_scsi_add_host(struct ctlr_info *h)
55642946e82bSRobert Elliott {
55652946e82bSRobert Elliott 	int rv;
55662946e82bSRobert Elliott 
55672946e82bSRobert Elliott 	rv = scsi_add_host(h->scsi_host, &h->pdev->dev);
55682946e82bSRobert Elliott 	if (rv) {
55692946e82bSRobert Elliott 		dev_err(&h->pdev->dev, "scsi_add_host failed\n");
55702946e82bSRobert Elliott 		return rv;
55712946e82bSRobert Elliott 	}
55722946e82bSRobert Elliott 	scsi_scan_host(h->scsi_host);
55732946e82bSRobert Elliott 	return 0;
5574edd16368SStephen M. Cameron }
5575edd16368SStephen M. Cameron 
5576b69324ffSWebb Scales /*
557773153fe5SWebb Scales  * The block layer has already gone to the trouble of picking out a unique,
557873153fe5SWebb Scales  * small-integer tag for this request.  We use an offset from that value as
557973153fe5SWebb Scales  * an index to select our command block.  (The offset allows us to reserve the
558073153fe5SWebb Scales  * low-numbered entries for our own uses.)
558173153fe5SWebb Scales  */
558273153fe5SWebb Scales static int hpsa_get_cmd_index(struct scsi_cmnd *scmd)
558373153fe5SWebb Scales {
558473153fe5SWebb Scales 	int idx = scmd->request->tag;
558573153fe5SWebb Scales 
558673153fe5SWebb Scales 	if (idx < 0)
558773153fe5SWebb Scales 		return idx;
558873153fe5SWebb Scales 
558973153fe5SWebb Scales 	/* Offset to leave space for internal cmds. */
559073153fe5SWebb Scales 	return idx += HPSA_NRESERVED_CMDS;
559173153fe5SWebb Scales }
559273153fe5SWebb Scales 
559373153fe5SWebb Scales /*
5594b69324ffSWebb Scales  * Send a TEST_UNIT_READY command to the specified LUN using the specified
5595b69324ffSWebb Scales  * reply queue; returns zero if the unit is ready, and non-zero otherwise.
5596b69324ffSWebb Scales  */
5597b69324ffSWebb Scales static int hpsa_send_test_unit_ready(struct ctlr_info *h,
5598b69324ffSWebb Scales 				struct CommandList *c, unsigned char lunaddr[],
5599b69324ffSWebb Scales 				int reply_queue)
5600edd16368SStephen M. Cameron {
56018919358eSTomas Henzl 	int rc;
5602edd16368SStephen M. Cameron 
5603a2dac136SStephen M. Cameron 	/* Send the Test Unit Ready, fill_cmd can't fail, no mapping */
5604a2dac136SStephen M. Cameron 	(void) fill_cmd(c, TEST_UNIT_READY, h,
5605a2dac136SStephen M. Cameron 			NULL, 0, 0, lunaddr, TYPE_CMD);
5606c448ecfaSDon Brace 	rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT);
560725163bd5SWebb Scales 	if (rc)
5608b69324ffSWebb Scales 		return rc;
5609edd16368SStephen M. Cameron 	/* no unmap needed here because no data xfer. */
5610edd16368SStephen M. Cameron 
5611b69324ffSWebb Scales 	/* Check if the unit is already ready. */
5612edd16368SStephen M. Cameron 	if (c->err_info->CommandStatus == CMD_SUCCESS)
5613b69324ffSWebb Scales 		return 0;
5614edd16368SStephen M. Cameron 
5615b69324ffSWebb Scales 	/*
5616b69324ffSWebb Scales 	 * The first command sent after reset will receive "unit attention" to
5617b69324ffSWebb Scales 	 * indicate that the LUN has been reset...this is actually what we're
5618b69324ffSWebb Scales 	 * looking for (but, success is good too).
5619b69324ffSWebb Scales 	 */
5620edd16368SStephen M. Cameron 	if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
5621edd16368SStephen M. Cameron 		c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
5622edd16368SStephen M. Cameron 			(c->err_info->SenseInfo[2] == NO_SENSE ||
5623edd16368SStephen M. Cameron 			 c->err_info->SenseInfo[2] == UNIT_ATTENTION))
5624b69324ffSWebb Scales 		return 0;
5625b69324ffSWebb Scales 
5626b69324ffSWebb Scales 	return 1;
5627b69324ffSWebb Scales }
5628b69324ffSWebb Scales 
5629b69324ffSWebb Scales /*
5630b69324ffSWebb Scales  * Wait for a TEST_UNIT_READY command to complete, retrying as necessary;
5631b69324ffSWebb Scales  * returns zero when the unit is ready, and non-zero when giving up.
5632b69324ffSWebb Scales  */
5633b69324ffSWebb Scales static int hpsa_wait_for_test_unit_ready(struct ctlr_info *h,
5634b69324ffSWebb Scales 				struct CommandList *c,
5635b69324ffSWebb Scales 				unsigned char lunaddr[], int reply_queue)
5636b69324ffSWebb Scales {
5637b69324ffSWebb Scales 	int rc;
5638b69324ffSWebb Scales 	int count = 0;
5639b69324ffSWebb Scales 	int waittime = 1; /* seconds */
5640b69324ffSWebb Scales 
5641b69324ffSWebb Scales 	/* Send test unit ready until device ready, or give up. */
5642b69324ffSWebb Scales 	for (count = 0; count < HPSA_TUR_RETRY_LIMIT; count++) {
5643b69324ffSWebb Scales 
5644b69324ffSWebb Scales 		/*
5645b69324ffSWebb Scales 		 * Wait for a bit.  do this first, because if we send
5646b69324ffSWebb Scales 		 * the TUR right away, the reset will just abort it.
5647b69324ffSWebb Scales 		 */
5648b69324ffSWebb Scales 		msleep(1000 * waittime);
5649b69324ffSWebb Scales 
5650b69324ffSWebb Scales 		rc = hpsa_send_test_unit_ready(h, c, lunaddr, reply_queue);
5651b69324ffSWebb Scales 		if (!rc)
5652edd16368SStephen M. Cameron 			break;
5653b69324ffSWebb Scales 
5654b69324ffSWebb Scales 		/* Increase wait time with each try, up to a point. */
5655b69324ffSWebb Scales 		if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
5656b69324ffSWebb Scales 			waittime *= 2;
5657b69324ffSWebb Scales 
5658b69324ffSWebb Scales 		dev_warn(&h->pdev->dev,
5659b69324ffSWebb Scales 			 "waiting %d secs for device to become ready.\n",
5660b69324ffSWebb Scales 			 waittime);
5661b69324ffSWebb Scales 	}
5662b69324ffSWebb Scales 
5663b69324ffSWebb Scales 	return rc;
5664b69324ffSWebb Scales }
5665b69324ffSWebb Scales 
5666b69324ffSWebb Scales static int wait_for_device_to_become_ready(struct ctlr_info *h,
5667b69324ffSWebb Scales 					   unsigned char lunaddr[],
5668b69324ffSWebb Scales 					   int reply_queue)
5669b69324ffSWebb Scales {
5670b69324ffSWebb Scales 	int first_queue;
5671b69324ffSWebb Scales 	int last_queue;
5672b69324ffSWebb Scales 	int rq;
5673b69324ffSWebb Scales 	int rc = 0;
5674b69324ffSWebb Scales 	struct CommandList *c;
5675b69324ffSWebb Scales 
5676b69324ffSWebb Scales 	c = cmd_alloc(h);
5677b69324ffSWebb Scales 
5678b69324ffSWebb Scales 	/*
5679b69324ffSWebb Scales 	 * If no specific reply queue was requested, then send the TUR
5680b69324ffSWebb Scales 	 * repeatedly, requesting a reply on each reply queue; otherwise execute
5681b69324ffSWebb Scales 	 * the loop exactly once using only the specified queue.
5682b69324ffSWebb Scales 	 */
5683b69324ffSWebb Scales 	if (reply_queue == DEFAULT_REPLY_QUEUE) {
5684b69324ffSWebb Scales 		first_queue = 0;
5685b69324ffSWebb Scales 		last_queue = h->nreply_queues - 1;
5686b69324ffSWebb Scales 	} else {
5687b69324ffSWebb Scales 		first_queue = reply_queue;
5688b69324ffSWebb Scales 		last_queue = reply_queue;
5689b69324ffSWebb Scales 	}
5690b69324ffSWebb Scales 
5691b69324ffSWebb Scales 	for (rq = first_queue; rq <= last_queue; rq++) {
5692b69324ffSWebb Scales 		rc = hpsa_wait_for_test_unit_ready(h, c, lunaddr, rq);
5693b69324ffSWebb Scales 		if (rc)
5694b69324ffSWebb Scales 			break;
5695edd16368SStephen M. Cameron 	}
5696edd16368SStephen M. Cameron 
5697edd16368SStephen M. Cameron 	if (rc)
5698edd16368SStephen M. Cameron 		dev_warn(&h->pdev->dev, "giving up on device.\n");
5699edd16368SStephen M. Cameron 	else
5700edd16368SStephen M. Cameron 		dev_warn(&h->pdev->dev, "device is ready.\n");
5701edd16368SStephen M. Cameron 
570245fcb86eSStephen Cameron 	cmd_free(h, c);
5703edd16368SStephen M. Cameron 	return rc;
5704edd16368SStephen M. Cameron }
5705edd16368SStephen M. Cameron 
5706edd16368SStephen M. Cameron /* Need at least one of these error handlers to keep ../scsi/hosts.c from
5707edd16368SStephen M. Cameron  * complaining.  Doing a host- or bus-reset can't do anything good here.
5708edd16368SStephen M. Cameron  */
5709edd16368SStephen M. Cameron static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
5710edd16368SStephen M. Cameron {
5711edd16368SStephen M. Cameron 	int rc;
5712edd16368SStephen M. Cameron 	struct ctlr_info *h;
5713edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *dev;
57140b9b7b6eSScott Teel 	u8 reset_type;
57152dc127bbSDan Carpenter 	char msg[48];
5716edd16368SStephen M. Cameron 
5717edd16368SStephen M. Cameron 	/* find the controller to which the command to be aborted was sent */
5718edd16368SStephen M. Cameron 	h = sdev_to_hba(scsicmd->device);
5719edd16368SStephen M. Cameron 	if (h == NULL) /* paranoia */
5720edd16368SStephen M. Cameron 		return FAILED;
5721e345893bSDon Brace 
5722e345893bSDon Brace 	if (lockup_detected(h))
5723e345893bSDon Brace 		return FAILED;
5724e345893bSDon Brace 
5725edd16368SStephen M. Cameron 	dev = scsicmd->device->hostdata;
5726edd16368SStephen M. Cameron 	if (!dev) {
5727d604f533SWebb Scales 		dev_err(&h->pdev->dev, "%s: device lookup failed\n", __func__);
5728edd16368SStephen M. Cameron 		return FAILED;
5729edd16368SStephen M. Cameron 	}
573025163bd5SWebb Scales 
573125163bd5SWebb Scales 	/* if controller locked up, we can guarantee command won't complete */
573225163bd5SWebb Scales 	if (lockup_detected(h)) {
57332dc127bbSDan Carpenter 		snprintf(msg, sizeof(msg),
57342dc127bbSDan Carpenter 			 "cmd %d RESET FAILED, lockup detected",
573573153fe5SWebb Scales 			 hpsa_get_cmd_index(scsicmd));
573673153fe5SWebb Scales 		hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
573725163bd5SWebb Scales 		return FAILED;
573825163bd5SWebb Scales 	}
573925163bd5SWebb Scales 
574025163bd5SWebb Scales 	/* this reset request might be the result of a lockup; check */
574125163bd5SWebb Scales 	if (detect_controller_lockup(h)) {
57422dc127bbSDan Carpenter 		snprintf(msg, sizeof(msg),
57432dc127bbSDan Carpenter 			 "cmd %d RESET FAILED, new lockup detected",
574473153fe5SWebb Scales 			 hpsa_get_cmd_index(scsicmd));
574573153fe5SWebb Scales 		hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
574625163bd5SWebb Scales 		return FAILED;
574725163bd5SWebb Scales 	}
574825163bd5SWebb Scales 
5749d604f533SWebb Scales 	/* Do not attempt on controller */
5750d604f533SWebb Scales 	if (is_hba_lunid(dev->scsi3addr))
5751d604f533SWebb Scales 		return SUCCESS;
5752d604f533SWebb Scales 
57530b9b7b6eSScott Teel 	if (is_logical_dev_addr_mode(dev->scsi3addr))
57540b9b7b6eSScott Teel 		reset_type = HPSA_DEVICE_RESET_MSG;
57550b9b7b6eSScott Teel 	else
57560b9b7b6eSScott Teel 		reset_type = HPSA_PHYS_TARGET_RESET;
57570b9b7b6eSScott Teel 
57580b9b7b6eSScott Teel 	sprintf(msg, "resetting %s",
57590b9b7b6eSScott Teel 		reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ");
57600b9b7b6eSScott Teel 	hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
576125163bd5SWebb Scales 
5762da03ded0SDon Brace 	h->reset_in_progress = 1;
5763d416b0c7SStephen M. Cameron 
5764edd16368SStephen M. Cameron 	/* send a reset to the SCSI LUN which the command was sent to */
57650b9b7b6eSScott Teel 	rc = hpsa_do_reset(h, dev, dev->scsi3addr, reset_type,
576625163bd5SWebb Scales 			   DEFAULT_REPLY_QUEUE);
57670b9b7b6eSScott Teel 	sprintf(msg, "reset %s %s",
57680b9b7b6eSScott Teel 		reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ",
57692dc127bbSDan Carpenter 		rc == 0 ? "completed successfully" : "failed");
5770d604f533SWebb Scales 	hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
5771da03ded0SDon Brace 	h->reset_in_progress = 0;
5772d604f533SWebb Scales 	return rc == 0 ? SUCCESS : FAILED;
5773edd16368SStephen M. Cameron }
5774edd16368SStephen M. Cameron 
57756cba3f19SStephen M. Cameron static void swizzle_abort_tag(u8 *tag)
57766cba3f19SStephen M. Cameron {
57776cba3f19SStephen M. Cameron 	u8 original_tag[8];
57786cba3f19SStephen M. Cameron 
57796cba3f19SStephen M. Cameron 	memcpy(original_tag, tag, 8);
57806cba3f19SStephen M. Cameron 	tag[0] = original_tag[3];
57816cba3f19SStephen M. Cameron 	tag[1] = original_tag[2];
57826cba3f19SStephen M. Cameron 	tag[2] = original_tag[1];
57836cba3f19SStephen M. Cameron 	tag[3] = original_tag[0];
57846cba3f19SStephen M. Cameron 	tag[4] = original_tag[7];
57856cba3f19SStephen M. Cameron 	tag[5] = original_tag[6];
57866cba3f19SStephen M. Cameron 	tag[6] = original_tag[5];
57876cba3f19SStephen M. Cameron 	tag[7] = original_tag[4];
57886cba3f19SStephen M. Cameron }
57896cba3f19SStephen M. Cameron 
579017eb87d2SScott Teel static void hpsa_get_tag(struct ctlr_info *h,
57912b08b3e9SDon Brace 	struct CommandList *c, __le32 *taglower, __le32 *tagupper)
579217eb87d2SScott Teel {
57932b08b3e9SDon Brace 	u64 tag;
579417eb87d2SScott Teel 	if (c->cmd_type == CMD_IOACCEL1) {
579517eb87d2SScott Teel 		struct io_accel1_cmd *cm1 = (struct io_accel1_cmd *)
579617eb87d2SScott Teel 			&h->ioaccel_cmd_pool[c->cmdindex];
57972b08b3e9SDon Brace 		tag = le64_to_cpu(cm1->tag);
57982b08b3e9SDon Brace 		*tagupper = cpu_to_le32(tag >> 32);
57992b08b3e9SDon Brace 		*taglower = cpu_to_le32(tag);
580054b6e9e9SScott Teel 		return;
580154b6e9e9SScott Teel 	}
580254b6e9e9SScott Teel 	if (c->cmd_type == CMD_IOACCEL2) {
580354b6e9e9SScott Teel 		struct io_accel2_cmd *cm2 = (struct io_accel2_cmd *)
580454b6e9e9SScott Teel 			&h->ioaccel2_cmd_pool[c->cmdindex];
5805dd0e19f3SScott Teel 		/* upper tag not used in ioaccel2 mode */
5806dd0e19f3SScott Teel 		memset(tagupper, 0, sizeof(*tagupper));
5807dd0e19f3SScott Teel 		*taglower = cm2->Tag;
580854b6e9e9SScott Teel 		return;
580954b6e9e9SScott Teel 	}
58102b08b3e9SDon Brace 	tag = le64_to_cpu(c->Header.tag);
58112b08b3e9SDon Brace 	*tagupper = cpu_to_le32(tag >> 32);
58122b08b3e9SDon Brace 	*taglower = cpu_to_le32(tag);
581317eb87d2SScott Teel }
581454b6e9e9SScott Teel 
581575167d2cSStephen M. Cameron static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr,
58169b5c48c2SStephen Cameron 	struct CommandList *abort, int reply_queue)
581775167d2cSStephen M. Cameron {
581875167d2cSStephen M. Cameron 	int rc = IO_OK;
581975167d2cSStephen M. Cameron 	struct CommandList *c;
582075167d2cSStephen M. Cameron 	struct ErrorInfo *ei;
58212b08b3e9SDon Brace 	__le32 tagupper, taglower;
582275167d2cSStephen M. Cameron 
582345fcb86eSStephen Cameron 	c = cmd_alloc(h);
582475167d2cSStephen M. Cameron 
5825a2dac136SStephen M. Cameron 	/* fill_cmd can't fail here, no buffer to map */
58269b5c48c2SStephen Cameron 	(void) fill_cmd(c, HPSA_ABORT_MSG, h, &abort->Header.tag,
5827a2dac136SStephen M. Cameron 		0, 0, scsi3addr, TYPE_MSG);
58289b5c48c2SStephen Cameron 	if (h->needs_abort_tags_swizzled)
58296cba3f19SStephen M. Cameron 		swizzle_abort_tag(&c->Request.CDB[4]);
5830c448ecfaSDon Brace 	(void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT);
583117eb87d2SScott Teel 	hpsa_get_tag(h, abort, &taglower, &tagupper);
583225163bd5SWebb Scales 	dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd(abort) completed.\n",
583317eb87d2SScott Teel 		__func__, tagupper, taglower);
583475167d2cSStephen M. Cameron 	/* no unmap needed here because no data xfer. */
583575167d2cSStephen M. Cameron 
583675167d2cSStephen M. Cameron 	ei = c->err_info;
583775167d2cSStephen M. Cameron 	switch (ei->CommandStatus) {
583875167d2cSStephen M. Cameron 	case CMD_SUCCESS:
583975167d2cSStephen M. Cameron 		break;
58409437ac43SStephen Cameron 	case CMD_TMF_STATUS:
58419437ac43SStephen Cameron 		rc = hpsa_evaluate_tmf_status(h, c);
58429437ac43SStephen Cameron 		break;
584375167d2cSStephen M. Cameron 	case CMD_UNABORTABLE: /* Very common, don't make noise. */
584475167d2cSStephen M. Cameron 		rc = -1;
584575167d2cSStephen M. Cameron 		break;
584675167d2cSStephen M. Cameron 	default:
584775167d2cSStephen M. Cameron 		dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n",
584817eb87d2SScott Teel 			__func__, tagupper, taglower);
5849d1e8beacSStephen M. Cameron 		hpsa_scsi_interpret_error(h, c);
585075167d2cSStephen M. Cameron 		rc = -1;
585175167d2cSStephen M. Cameron 		break;
585275167d2cSStephen M. Cameron 	}
585345fcb86eSStephen Cameron 	cmd_free(h, c);
5854dd0e19f3SScott Teel 	dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n",
5855dd0e19f3SScott Teel 		__func__, tagupper, taglower);
585675167d2cSStephen M. Cameron 	return rc;
585775167d2cSStephen M. Cameron }
585875167d2cSStephen M. Cameron 
58598be986ccSStephen Cameron static void setup_ioaccel2_abort_cmd(struct CommandList *c, struct ctlr_info *h,
58608be986ccSStephen Cameron 	struct CommandList *command_to_abort, int reply_queue)
58618be986ccSStephen Cameron {
58628be986ccSStephen Cameron 	struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
58638be986ccSStephen Cameron 	struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2;
58648be986ccSStephen Cameron 	struct io_accel2_cmd *c2a =
58658be986ccSStephen Cameron 		&h->ioaccel2_cmd_pool[command_to_abort->cmdindex];
5866a58e7e53SWebb Scales 	struct scsi_cmnd *scmd = command_to_abort->scsi_cmd;
58678be986ccSStephen Cameron 	struct hpsa_scsi_dev_t *dev = scmd->device->hostdata;
58688be986ccSStephen Cameron 
58698be986ccSStephen Cameron 	/*
58708be986ccSStephen Cameron 	 * We're overlaying struct hpsa_tmf_struct on top of something which
58718be986ccSStephen Cameron 	 * was allocated as a struct io_accel2_cmd, so we better be sure it
58728be986ccSStephen Cameron 	 * actually fits, and doesn't overrun the error info space.
58738be986ccSStephen Cameron 	 */
58748be986ccSStephen Cameron 	BUILD_BUG_ON(sizeof(struct hpsa_tmf_struct) >
58758be986ccSStephen Cameron 			sizeof(struct io_accel2_cmd));
58768be986ccSStephen Cameron 	BUG_ON(offsetof(struct io_accel2_cmd, error_data) <
58778be986ccSStephen Cameron 			offsetof(struct hpsa_tmf_struct, error_len) +
58788be986ccSStephen Cameron 				sizeof(ac->error_len));
58798be986ccSStephen Cameron 
58808be986ccSStephen Cameron 	c->cmd_type = IOACCEL2_TMF;
5881a58e7e53SWebb Scales 	c->scsi_cmd = SCSI_CMD_BUSY;
5882a58e7e53SWebb Scales 
58838be986ccSStephen Cameron 	/* Adjust the DMA address to point to the accelerated command buffer */
58848be986ccSStephen Cameron 	c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle +
58858be986ccSStephen Cameron 				(c->cmdindex * sizeof(struct io_accel2_cmd));
58868be986ccSStephen Cameron 	BUG_ON(c->busaddr & 0x0000007F);
58878be986ccSStephen Cameron 
58888be986ccSStephen Cameron 	memset(ac, 0, sizeof(*c2)); /* yes this is correct */
58898be986ccSStephen Cameron 	ac->iu_type = IOACCEL2_IU_TMF_TYPE;
58908be986ccSStephen Cameron 	ac->reply_queue = reply_queue;
58918be986ccSStephen Cameron 	ac->tmf = IOACCEL2_TMF_ABORT;
58928be986ccSStephen Cameron 	ac->it_nexus = cpu_to_le32(dev->ioaccel_handle);
58938be986ccSStephen Cameron 	memset(ac->lun_id, 0, sizeof(ac->lun_id));
58948be986ccSStephen Cameron 	ac->tag = cpu_to_le64(c->cmdindex << DIRECT_LOOKUP_SHIFT);
58958be986ccSStephen Cameron 	ac->abort_tag = cpu_to_le64(le32_to_cpu(c2a->Tag));
58968be986ccSStephen Cameron 	ac->error_ptr = cpu_to_le64(c->busaddr +
58978be986ccSStephen Cameron 			offsetof(struct io_accel2_cmd, error_data));
58988be986ccSStephen Cameron 	ac->error_len = cpu_to_le32(sizeof(c2->error_data));
58998be986ccSStephen Cameron }
59008be986ccSStephen Cameron 
590154b6e9e9SScott Teel /* ioaccel2 path firmware cannot handle abort task requests.
590254b6e9e9SScott Teel  * Change abort requests to physical target reset, and send to the
590354b6e9e9SScott Teel  * address of the physical disk used for the ioaccel 2 command.
590454b6e9e9SScott Teel  * Return 0 on success (IO_OK)
590554b6e9e9SScott Teel  *	 -1 on failure
590654b6e9e9SScott Teel  */
590754b6e9e9SScott Teel 
590854b6e9e9SScott Teel static int hpsa_send_reset_as_abort_ioaccel2(struct ctlr_info *h,
590925163bd5SWebb Scales 	unsigned char *scsi3addr, struct CommandList *abort, int reply_queue)
591054b6e9e9SScott Teel {
591154b6e9e9SScott Teel 	int rc = IO_OK;
591254b6e9e9SScott Teel 	struct scsi_cmnd *scmd; /* scsi command within request being aborted */
591354b6e9e9SScott Teel 	struct hpsa_scsi_dev_t *dev; /* device to which scsi cmd was sent */
591454b6e9e9SScott Teel 	unsigned char phys_scsi3addr[8]; /* addr of phys disk with volume */
591554b6e9e9SScott Teel 	unsigned char *psa = &phys_scsi3addr[0];
591654b6e9e9SScott Teel 
591754b6e9e9SScott Teel 	/* Get a pointer to the hpsa logical device. */
59187fa3030cSStephen Cameron 	scmd = abort->scsi_cmd;
591954b6e9e9SScott Teel 	dev = (struct hpsa_scsi_dev_t *)(scmd->device->hostdata);
592054b6e9e9SScott Teel 	if (dev == NULL) {
592154b6e9e9SScott Teel 		dev_warn(&h->pdev->dev,
592254b6e9e9SScott Teel 			"Cannot abort: no device pointer for command.\n");
592354b6e9e9SScott Teel 			return -1; /* not abortable */
592454b6e9e9SScott Teel 	}
592554b6e9e9SScott Teel 
59262ba8bfc8SStephen M. Cameron 	if (h->raid_offload_debug > 0)
59272ba8bfc8SStephen M. Cameron 		dev_info(&h->pdev->dev,
59280d96ef5fSWebb Scales 			"scsi %d:%d:%d:%d %s scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
59292ba8bfc8SStephen M. Cameron 			h->scsi_host->host_no, dev->bus, dev->target, dev->lun,
59300d96ef5fSWebb Scales 			"Reset as abort",
59312ba8bfc8SStephen M. Cameron 			scsi3addr[0], scsi3addr[1], scsi3addr[2], scsi3addr[3],
59322ba8bfc8SStephen M. Cameron 			scsi3addr[4], scsi3addr[5], scsi3addr[6], scsi3addr[7]);
59332ba8bfc8SStephen M. Cameron 
593454b6e9e9SScott Teel 	if (!dev->offload_enabled) {
593554b6e9e9SScott Teel 		dev_warn(&h->pdev->dev,
593654b6e9e9SScott Teel 			"Can't abort: device is not operating in HP SSD Smart Path mode.\n");
593754b6e9e9SScott Teel 		return -1; /* not abortable */
593854b6e9e9SScott Teel 	}
593954b6e9e9SScott Teel 
594054b6e9e9SScott Teel 	/* Incoming scsi3addr is logical addr. We need physical disk addr. */
594154b6e9e9SScott Teel 	if (!hpsa_get_pdisk_of_ioaccel2(h, abort, psa)) {
594254b6e9e9SScott Teel 		dev_warn(&h->pdev->dev, "Can't abort: Failed lookup of physical address.\n");
594354b6e9e9SScott Teel 		return -1; /* not abortable */
594454b6e9e9SScott Teel 	}
594554b6e9e9SScott Teel 
594654b6e9e9SScott Teel 	/* send the reset */
59472ba8bfc8SStephen M. Cameron 	if (h->raid_offload_debug > 0)
59482ba8bfc8SStephen M. Cameron 		dev_info(&h->pdev->dev,
59492ba8bfc8SStephen M. Cameron 			"Reset as abort: Resetting physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
59502ba8bfc8SStephen M. Cameron 			psa[0], psa[1], psa[2], psa[3],
59512ba8bfc8SStephen M. Cameron 			psa[4], psa[5], psa[6], psa[7]);
5952d604f533SWebb Scales 	rc = hpsa_do_reset(h, dev, psa, HPSA_RESET_TYPE_TARGET, reply_queue);
595354b6e9e9SScott Teel 	if (rc != 0) {
595454b6e9e9SScott Teel 		dev_warn(&h->pdev->dev,
595554b6e9e9SScott Teel 			"Reset as abort: Failed on physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
595654b6e9e9SScott Teel 			psa[0], psa[1], psa[2], psa[3],
595754b6e9e9SScott Teel 			psa[4], psa[5], psa[6], psa[7]);
595854b6e9e9SScott Teel 		return rc; /* failed to reset */
595954b6e9e9SScott Teel 	}
596054b6e9e9SScott Teel 
596154b6e9e9SScott Teel 	/* wait for device to recover */
5962b69324ffSWebb Scales 	if (wait_for_device_to_become_ready(h, psa, reply_queue) != 0) {
596354b6e9e9SScott Teel 		dev_warn(&h->pdev->dev,
596454b6e9e9SScott Teel 			"Reset as abort: Failed: Device never recovered from reset: 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
596554b6e9e9SScott Teel 			psa[0], psa[1], psa[2], psa[3],
596654b6e9e9SScott Teel 			psa[4], psa[5], psa[6], psa[7]);
596754b6e9e9SScott Teel 		return -1;  /* failed to recover */
596854b6e9e9SScott Teel 	}
596954b6e9e9SScott Teel 
597054b6e9e9SScott Teel 	/* device recovered */
597154b6e9e9SScott Teel 	dev_info(&h->pdev->dev,
597254b6e9e9SScott Teel 		"Reset as abort: Device recovered from reset: scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
597354b6e9e9SScott Teel 		psa[0], psa[1], psa[2], psa[3],
597454b6e9e9SScott Teel 		psa[4], psa[5], psa[6], psa[7]);
597554b6e9e9SScott Teel 
597654b6e9e9SScott Teel 	return rc; /* success */
597754b6e9e9SScott Teel }
597854b6e9e9SScott Teel 
59798be986ccSStephen Cameron static int hpsa_send_abort_ioaccel2(struct ctlr_info *h,
59808be986ccSStephen Cameron 	struct CommandList *abort, int reply_queue)
59818be986ccSStephen Cameron {
59828be986ccSStephen Cameron 	int rc = IO_OK;
59838be986ccSStephen Cameron 	struct CommandList *c;
59848be986ccSStephen Cameron 	__le32 taglower, tagupper;
59858be986ccSStephen Cameron 	struct hpsa_scsi_dev_t *dev;
59868be986ccSStephen Cameron 	struct io_accel2_cmd *c2;
59878be986ccSStephen Cameron 
59888be986ccSStephen Cameron 	dev = abort->scsi_cmd->device->hostdata;
59898be986ccSStephen Cameron 	if (!dev->offload_enabled && !dev->hba_ioaccel_enabled)
59908be986ccSStephen Cameron 		return -1;
59918be986ccSStephen Cameron 
59928be986ccSStephen Cameron 	c = cmd_alloc(h);
59938be986ccSStephen Cameron 	setup_ioaccel2_abort_cmd(c, h, abort, reply_queue);
59948be986ccSStephen Cameron 	c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
5995c448ecfaSDon Brace 	(void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT);
59968be986ccSStephen Cameron 	hpsa_get_tag(h, abort, &taglower, &tagupper);
59978be986ccSStephen Cameron 	dev_dbg(&h->pdev->dev,
59988be986ccSStephen Cameron 		"%s: Tag:0x%08x:%08x: do_simple_cmd(ioaccel2 abort) completed.\n",
59998be986ccSStephen Cameron 		__func__, tagupper, taglower);
60008be986ccSStephen Cameron 	/* no unmap needed here because no data xfer. */
60018be986ccSStephen Cameron 
60028be986ccSStephen Cameron 	dev_dbg(&h->pdev->dev,
60038be986ccSStephen Cameron 		"%s: Tag:0x%08x:%08x: abort service response = 0x%02x.\n",
60048be986ccSStephen Cameron 		__func__, tagupper, taglower, c2->error_data.serv_response);
60058be986ccSStephen Cameron 	switch (c2->error_data.serv_response) {
60068be986ccSStephen Cameron 	case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE:
60078be986ccSStephen Cameron 	case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS:
60088be986ccSStephen Cameron 		rc = 0;
60098be986ccSStephen Cameron 		break;
60108be986ccSStephen Cameron 	case IOACCEL2_SERV_RESPONSE_TMF_REJECTED:
60118be986ccSStephen Cameron 	case IOACCEL2_SERV_RESPONSE_FAILURE:
60128be986ccSStephen Cameron 	case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN:
60138be986ccSStephen Cameron 		rc = -1;
60148be986ccSStephen Cameron 		break;
60158be986ccSStephen Cameron 	default:
60168be986ccSStephen Cameron 		dev_warn(&h->pdev->dev,
60178be986ccSStephen Cameron 			"%s: Tag:0x%08x:%08x: unknown abort service response 0x%02x\n",
60188be986ccSStephen Cameron 			__func__, tagupper, taglower,
60198be986ccSStephen Cameron 			c2->error_data.serv_response);
60208be986ccSStephen Cameron 		rc = -1;
60218be986ccSStephen Cameron 	}
60228be986ccSStephen Cameron 	cmd_free(h, c);
60238be986ccSStephen Cameron 	dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", __func__,
60248be986ccSStephen Cameron 		tagupper, taglower);
60258be986ccSStephen Cameron 	return rc;
60268be986ccSStephen Cameron }
60278be986ccSStephen Cameron 
60286cba3f19SStephen M. Cameron static int hpsa_send_abort_both_ways(struct ctlr_info *h,
602939f3deb2SDon Brace 	struct hpsa_scsi_dev_t *dev, struct CommandList *abort, int reply_queue)
60306cba3f19SStephen M. Cameron {
60318be986ccSStephen Cameron 	/*
60328be986ccSStephen Cameron 	 * ioccelerator mode 2 commands should be aborted via the
603354b6e9e9SScott Teel 	 * accelerated path, since RAID path is unaware of these commands,
60348be986ccSStephen Cameron 	 * but not all underlying firmware can handle abort TMF.
60358be986ccSStephen Cameron 	 * Change abort to physical device reset when abort TMF is unsupported.
603654b6e9e9SScott Teel 	 */
60378be986ccSStephen Cameron 	if (abort->cmd_type == CMD_IOACCEL2) {
603839f3deb2SDon Brace 		if ((HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags) ||
603939f3deb2SDon Brace 			dev->physical_device)
60408be986ccSStephen Cameron 			return hpsa_send_abort_ioaccel2(h, abort,
60418be986ccSStephen Cameron 						reply_queue);
60428be986ccSStephen Cameron 		else
604339f3deb2SDon Brace 			return hpsa_send_reset_as_abort_ioaccel2(h,
604439f3deb2SDon Brace 							dev->scsi3addr,
604525163bd5SWebb Scales 							abort, reply_queue);
60468be986ccSStephen Cameron 	}
604739f3deb2SDon Brace 	return hpsa_send_abort(h, dev->scsi3addr, abort, reply_queue);
604825163bd5SWebb Scales }
604925163bd5SWebb Scales 
605025163bd5SWebb Scales /* Find out which reply queue a command was meant to return on */
605125163bd5SWebb Scales static int hpsa_extract_reply_queue(struct ctlr_info *h,
605225163bd5SWebb Scales 					struct CommandList *c)
605325163bd5SWebb Scales {
605425163bd5SWebb Scales 	if (c->cmd_type == CMD_IOACCEL2)
605525163bd5SWebb Scales 		return h->ioaccel2_cmd_pool[c->cmdindex].reply_queue;
605625163bd5SWebb Scales 	return c->Header.ReplyQueue;
60576cba3f19SStephen M. Cameron }
60586cba3f19SStephen M. Cameron 
60599b5c48c2SStephen Cameron /*
60609b5c48c2SStephen Cameron  * Limit concurrency of abort commands to prevent
60619b5c48c2SStephen Cameron  * over-subscription of commands
60629b5c48c2SStephen Cameron  */
60639b5c48c2SStephen Cameron static inline int wait_for_available_abort_cmd(struct ctlr_info *h)
60649b5c48c2SStephen Cameron {
60659b5c48c2SStephen Cameron #define ABORT_CMD_WAIT_MSECS 5000
60669b5c48c2SStephen Cameron 	return !wait_event_timeout(h->abort_cmd_wait_queue,
60679b5c48c2SStephen Cameron 			atomic_dec_if_positive(&h->abort_cmds_available) >= 0,
60689b5c48c2SStephen Cameron 			msecs_to_jiffies(ABORT_CMD_WAIT_MSECS));
60699b5c48c2SStephen Cameron }
60709b5c48c2SStephen Cameron 
607175167d2cSStephen M. Cameron /* Send an abort for the specified command.
607275167d2cSStephen M. Cameron  *	If the device and controller support it,
607375167d2cSStephen M. Cameron  *		send a task abort request.
607475167d2cSStephen M. Cameron  */
607575167d2cSStephen M. Cameron static int hpsa_eh_abort_handler(struct scsi_cmnd *sc)
607675167d2cSStephen M. Cameron {
607775167d2cSStephen M. Cameron 
6078a58e7e53SWebb Scales 	int rc;
607975167d2cSStephen M. Cameron 	struct ctlr_info *h;
608075167d2cSStephen M. Cameron 	struct hpsa_scsi_dev_t *dev;
608175167d2cSStephen M. Cameron 	struct CommandList *abort; /* pointer to command to be aborted */
608275167d2cSStephen M. Cameron 	struct scsi_cmnd *as;	/* ptr to scsi cmd inside aborted command. */
608375167d2cSStephen M. Cameron 	char msg[256];		/* For debug messaging. */
608475167d2cSStephen M. Cameron 	int ml = 0;
60852b08b3e9SDon Brace 	__le32 tagupper, taglower;
608625163bd5SWebb Scales 	int refcount, reply_queue;
608725163bd5SWebb Scales 
608825163bd5SWebb Scales 	if (sc == NULL)
608925163bd5SWebb Scales 		return FAILED;
609075167d2cSStephen M. Cameron 
60919b5c48c2SStephen Cameron 	if (sc->device == NULL)
60929b5c48c2SStephen Cameron 		return FAILED;
60939b5c48c2SStephen Cameron 
609475167d2cSStephen M. Cameron 	/* Find the controller of the command to be aborted */
609575167d2cSStephen M. Cameron 	h = sdev_to_hba(sc->device);
60969b5c48c2SStephen Cameron 	if (h == NULL)
609775167d2cSStephen M. Cameron 		return FAILED;
609875167d2cSStephen M. Cameron 
609925163bd5SWebb Scales 	/* Find the device of the command to be aborted */
610025163bd5SWebb Scales 	dev = sc->device->hostdata;
610125163bd5SWebb Scales 	if (!dev) {
610225163bd5SWebb Scales 		dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n",
610325163bd5SWebb Scales 				msg);
6104e345893bSDon Brace 		return FAILED;
610525163bd5SWebb Scales 	}
610625163bd5SWebb Scales 
610725163bd5SWebb Scales 	/* If controller locked up, we can guarantee command won't complete */
610825163bd5SWebb Scales 	if (lockup_detected(h)) {
610925163bd5SWebb Scales 		hpsa_show_dev_msg(KERN_WARNING, h, dev,
611025163bd5SWebb Scales 					"ABORT FAILED, lockup detected");
611125163bd5SWebb Scales 		return FAILED;
611225163bd5SWebb Scales 	}
611325163bd5SWebb Scales 
611425163bd5SWebb Scales 	/* This is a good time to check if controller lockup has occurred */
611525163bd5SWebb Scales 	if (detect_controller_lockup(h)) {
611625163bd5SWebb Scales 		hpsa_show_dev_msg(KERN_WARNING, h, dev,
611725163bd5SWebb Scales 					"ABORT FAILED, new lockup detected");
611825163bd5SWebb Scales 		return FAILED;
611925163bd5SWebb Scales 	}
6120e345893bSDon Brace 
612175167d2cSStephen M. Cameron 	/* Check that controller supports some kind of task abort */
612275167d2cSStephen M. Cameron 	if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) &&
612375167d2cSStephen M. Cameron 		!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
612475167d2cSStephen M. Cameron 		return FAILED;
612575167d2cSStephen M. Cameron 
612675167d2cSStephen M. Cameron 	memset(msg, 0, sizeof(msg));
61274b761557SRobert Elliott 	ml += sprintf(msg+ml, "scsi %d:%d:%d:%llu %s %p",
612875167d2cSStephen M. Cameron 		h->scsi_host->host_no, sc->device->channel,
61290d96ef5fSWebb Scales 		sc->device->id, sc->device->lun,
61304b761557SRobert Elliott 		"Aborting command", sc);
613175167d2cSStephen M. Cameron 
613275167d2cSStephen M. Cameron 	/* Get SCSI command to be aborted */
613375167d2cSStephen M. Cameron 	abort = (struct CommandList *) sc->host_scribble;
613475167d2cSStephen M. Cameron 	if (abort == NULL) {
6135281a7fd0SWebb Scales 		/* This can happen if the command already completed. */
6136281a7fd0SWebb Scales 		return SUCCESS;
6137281a7fd0SWebb Scales 	}
6138281a7fd0SWebb Scales 	refcount = atomic_inc_return(&abort->refcount);
6139281a7fd0SWebb Scales 	if (refcount == 1) { /* Command is done already. */
6140281a7fd0SWebb Scales 		cmd_free(h, abort);
6141281a7fd0SWebb Scales 		return SUCCESS;
614275167d2cSStephen M. Cameron 	}
61439b5c48c2SStephen Cameron 
61449b5c48c2SStephen Cameron 	/* Don't bother trying the abort if we know it won't work. */
61459b5c48c2SStephen Cameron 	if (abort->cmd_type != CMD_IOACCEL2 &&
61469b5c48c2SStephen Cameron 		abort->cmd_type != CMD_IOACCEL1 && !dev->supports_aborts) {
61479b5c48c2SStephen Cameron 		cmd_free(h, abort);
61489b5c48c2SStephen Cameron 		return FAILED;
61499b5c48c2SStephen Cameron 	}
61509b5c48c2SStephen Cameron 
6151a58e7e53SWebb Scales 	/*
6152a58e7e53SWebb Scales 	 * Check that we're aborting the right command.
6153a58e7e53SWebb Scales 	 * It's possible the CommandList already completed and got re-used.
6154a58e7e53SWebb Scales 	 */
6155a58e7e53SWebb Scales 	if (abort->scsi_cmd != sc) {
6156a58e7e53SWebb Scales 		cmd_free(h, abort);
6157a58e7e53SWebb Scales 		return SUCCESS;
6158a58e7e53SWebb Scales 	}
6159a58e7e53SWebb Scales 
6160a58e7e53SWebb Scales 	abort->abort_pending = true;
616117eb87d2SScott Teel 	hpsa_get_tag(h, abort, &taglower, &tagupper);
616225163bd5SWebb Scales 	reply_queue = hpsa_extract_reply_queue(h, abort);
616317eb87d2SScott Teel 	ml += sprintf(msg+ml, "Tag:0x%08x:%08x ", tagupper, taglower);
61647fa3030cSStephen Cameron 	as  = abort->scsi_cmd;
616575167d2cSStephen M. Cameron 	if (as != NULL)
61664b761557SRobert Elliott 		ml += sprintf(msg+ml,
61674b761557SRobert Elliott 			"CDBLen: %d CDB: 0x%02x%02x... SN: 0x%lx ",
61684b761557SRobert Elliott 			as->cmd_len, as->cmnd[0], as->cmnd[1],
61694b761557SRobert Elliott 			as->serial_number);
61704b761557SRobert Elliott 	dev_warn(&h->pdev->dev, "%s BEING SENT\n", msg);
61710d96ef5fSWebb Scales 	hpsa_show_dev_msg(KERN_WARNING, h, dev, "Aborting command");
61724b761557SRobert Elliott 
617375167d2cSStephen M. Cameron 	/*
617475167d2cSStephen M. Cameron 	 * Command is in flight, or possibly already completed
617575167d2cSStephen M. Cameron 	 * by the firmware (but not to the scsi mid layer) but we can't
617675167d2cSStephen M. Cameron 	 * distinguish which.  Send the abort down.
617775167d2cSStephen M. Cameron 	 */
61789b5c48c2SStephen Cameron 	if (wait_for_available_abort_cmd(h)) {
61799b5c48c2SStephen Cameron 		dev_warn(&h->pdev->dev,
61804b761557SRobert Elliott 			"%s FAILED, timeout waiting for an abort command to become available.\n",
61814b761557SRobert Elliott 			msg);
61829b5c48c2SStephen Cameron 		cmd_free(h, abort);
61839b5c48c2SStephen Cameron 		return FAILED;
61849b5c48c2SStephen Cameron 	}
618539f3deb2SDon Brace 	rc = hpsa_send_abort_both_ways(h, dev, abort, reply_queue);
61869b5c48c2SStephen Cameron 	atomic_inc(&h->abort_cmds_available);
61879b5c48c2SStephen Cameron 	wake_up_all(&h->abort_cmd_wait_queue);
618875167d2cSStephen M. Cameron 	if (rc != 0) {
61894b761557SRobert Elliott 		dev_warn(&h->pdev->dev, "%s SENT, FAILED\n", msg);
61900d96ef5fSWebb Scales 		hpsa_show_dev_msg(KERN_WARNING, h, dev,
61910d96ef5fSWebb Scales 				"FAILED to abort command");
6192281a7fd0SWebb Scales 		cmd_free(h, abort);
619375167d2cSStephen M. Cameron 		return FAILED;
619475167d2cSStephen M. Cameron 	}
61954b761557SRobert Elliott 	dev_info(&h->pdev->dev, "%s SENT, SUCCESS\n", msg);
6196d604f533SWebb Scales 	wait_event(h->event_sync_wait_queue,
6197a58e7e53SWebb Scales 		   abort->scsi_cmd != sc || lockup_detected(h));
6198281a7fd0SWebb Scales 	cmd_free(h, abort);
6199a58e7e53SWebb Scales 	return !lockup_detected(h) ? SUCCESS : FAILED;
620075167d2cSStephen M. Cameron }
620175167d2cSStephen M. Cameron 
6202edd16368SStephen M. Cameron /*
620373153fe5SWebb Scales  * For operations with an associated SCSI command, a command block is allocated
620473153fe5SWebb Scales  * at init, and managed by cmd_tagged_alloc() and cmd_tagged_free() using the
620573153fe5SWebb Scales  * block request tag as an index into a table of entries.  cmd_tagged_free() is
620673153fe5SWebb Scales  * the complement, although cmd_free() may be called instead.
620773153fe5SWebb Scales  */
620873153fe5SWebb Scales static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h,
620973153fe5SWebb Scales 					    struct scsi_cmnd *scmd)
621073153fe5SWebb Scales {
621173153fe5SWebb Scales 	int idx = hpsa_get_cmd_index(scmd);
621273153fe5SWebb Scales 	struct CommandList *c = h->cmd_pool + idx;
621373153fe5SWebb Scales 
621473153fe5SWebb Scales 	if (idx < HPSA_NRESERVED_CMDS || idx >= h->nr_cmds) {
621573153fe5SWebb Scales 		dev_err(&h->pdev->dev, "Bad block tag: %d not in [%d..%d]\n",
621673153fe5SWebb Scales 			idx, HPSA_NRESERVED_CMDS, h->nr_cmds - 1);
621773153fe5SWebb Scales 		/* The index value comes from the block layer, so if it's out of
621873153fe5SWebb Scales 		 * bounds, it's probably not our bug.
621973153fe5SWebb Scales 		 */
622073153fe5SWebb Scales 		BUG();
622173153fe5SWebb Scales 	}
622273153fe5SWebb Scales 
622373153fe5SWebb Scales 	atomic_inc(&c->refcount);
622473153fe5SWebb Scales 	if (unlikely(!hpsa_is_cmd_idle(c))) {
622573153fe5SWebb Scales 		/*
622673153fe5SWebb Scales 		 * We expect that the SCSI layer will hand us a unique tag
622773153fe5SWebb Scales 		 * value.  Thus, there should never be a collision here between
622873153fe5SWebb Scales 		 * two requests...because if the selected command isn't idle
622973153fe5SWebb Scales 		 * then someone is going to be very disappointed.
623073153fe5SWebb Scales 		 */
623173153fe5SWebb Scales 		dev_err(&h->pdev->dev,
623273153fe5SWebb Scales 			"tag collision (tag=%d) in cmd_tagged_alloc().\n",
623373153fe5SWebb Scales 			idx);
623473153fe5SWebb Scales 		if (c->scsi_cmd != NULL)
623573153fe5SWebb Scales 			scsi_print_command(c->scsi_cmd);
623673153fe5SWebb Scales 		scsi_print_command(scmd);
623773153fe5SWebb Scales 	}
623873153fe5SWebb Scales 
623973153fe5SWebb Scales 	hpsa_cmd_partial_init(h, idx, c);
624073153fe5SWebb Scales 	return c;
624173153fe5SWebb Scales }
624273153fe5SWebb Scales 
624373153fe5SWebb Scales static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c)
624473153fe5SWebb Scales {
624573153fe5SWebb Scales 	/*
624673153fe5SWebb Scales 	 * Release our reference to the block.  We don't need to do anything
624773153fe5SWebb Scales 	 * else to free it, because it is accessed by index.  (There's no point
624873153fe5SWebb Scales 	 * in checking the result of the decrement, since we cannot guarantee
624973153fe5SWebb Scales 	 * that there isn't a concurrent abort which is also accessing it.)
625073153fe5SWebb Scales 	 */
625173153fe5SWebb Scales 	(void)atomic_dec(&c->refcount);
625273153fe5SWebb Scales }
625373153fe5SWebb Scales 
625473153fe5SWebb Scales /*
6255edd16368SStephen M. Cameron  * For operations that cannot sleep, a command block is allocated at init,
6256edd16368SStephen M. Cameron  * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
6257edd16368SStephen M. Cameron  * which ones are free or in use.  Lock must be held when calling this.
6258edd16368SStephen M. Cameron  * cmd_free() is the complement.
6259bf43caf3SRobert Elliott  * This function never gives up and returns NULL.  If it hangs,
6260bf43caf3SRobert Elliott  * another thread must call cmd_free() to free some tags.
6261edd16368SStephen M. Cameron  */
6262281a7fd0SWebb Scales 
6263edd16368SStephen M. Cameron static struct CommandList *cmd_alloc(struct ctlr_info *h)
6264edd16368SStephen M. Cameron {
6265edd16368SStephen M. Cameron 	struct CommandList *c;
6266360c73bdSStephen Cameron 	int refcount, i;
626773153fe5SWebb Scales 	int offset = 0;
6268edd16368SStephen M. Cameron 
626933811026SRobert Elliott 	/*
627033811026SRobert Elliott 	 * There is some *extremely* small but non-zero chance that that
62714c413128SStephen M. Cameron 	 * multiple threads could get in here, and one thread could
62724c413128SStephen M. Cameron 	 * be scanning through the list of bits looking for a free
62734c413128SStephen M. Cameron 	 * one, but the free ones are always behind him, and other
62744c413128SStephen M. Cameron 	 * threads sneak in behind him and eat them before he can
62754c413128SStephen M. Cameron 	 * get to them, so that while there is always a free one, a
62764c413128SStephen M. Cameron 	 * very unlucky thread might be starved anyway, never able to
62774c413128SStephen M. Cameron 	 * beat the other threads.  In reality, this happens so
62784c413128SStephen M. Cameron 	 * infrequently as to be indistinguishable from never.
627973153fe5SWebb Scales 	 *
628073153fe5SWebb Scales 	 * Note that we start allocating commands before the SCSI host structure
628173153fe5SWebb Scales 	 * is initialized.  Since the search starts at bit zero, this
628273153fe5SWebb Scales 	 * all works, since we have at least one command structure available;
628373153fe5SWebb Scales 	 * however, it means that the structures with the low indexes have to be
628473153fe5SWebb Scales 	 * reserved for driver-initiated requests, while requests from the block
628573153fe5SWebb Scales 	 * layer will use the higher indexes.
62864c413128SStephen M. Cameron 	 */
62874c413128SStephen M. Cameron 
6288281a7fd0SWebb Scales 	for (;;) {
628973153fe5SWebb Scales 		i = find_next_zero_bit(h->cmd_pool_bits,
629073153fe5SWebb Scales 					HPSA_NRESERVED_CMDS,
629173153fe5SWebb Scales 					offset);
629273153fe5SWebb Scales 		if (unlikely(i >= HPSA_NRESERVED_CMDS)) {
6293281a7fd0SWebb Scales 			offset = 0;
6294281a7fd0SWebb Scales 			continue;
6295281a7fd0SWebb Scales 		}
6296edd16368SStephen M. Cameron 		c = h->cmd_pool + i;
6297281a7fd0SWebb Scales 		refcount = atomic_inc_return(&c->refcount);
6298281a7fd0SWebb Scales 		if (unlikely(refcount > 1)) {
6299281a7fd0SWebb Scales 			cmd_free(h, c); /* already in use */
630073153fe5SWebb Scales 			offset = (i + 1) % HPSA_NRESERVED_CMDS;
6301281a7fd0SWebb Scales 			continue;
6302281a7fd0SWebb Scales 		}
6303281a7fd0SWebb Scales 		set_bit(i & (BITS_PER_LONG - 1),
6304281a7fd0SWebb Scales 			h->cmd_pool_bits + (i / BITS_PER_LONG));
6305281a7fd0SWebb Scales 		break; /* it's ours now. */
6306281a7fd0SWebb Scales 	}
6307360c73bdSStephen Cameron 	hpsa_cmd_partial_init(h, i, c);
6308edd16368SStephen M. Cameron 	return c;
6309edd16368SStephen M. Cameron }
6310edd16368SStephen M. Cameron 
631173153fe5SWebb Scales /*
631273153fe5SWebb Scales  * This is the complementary operation to cmd_alloc().  Note, however, in some
631373153fe5SWebb Scales  * corner cases it may also be used to free blocks allocated by
631473153fe5SWebb Scales  * cmd_tagged_alloc() in which case the ref-count decrement does the trick and
631573153fe5SWebb Scales  * the clear-bit is harmless.
631673153fe5SWebb Scales  */
6317edd16368SStephen M. Cameron static void cmd_free(struct ctlr_info *h, struct CommandList *c)
6318edd16368SStephen M. Cameron {
6319281a7fd0SWebb Scales 	if (atomic_dec_and_test(&c->refcount)) {
6320edd16368SStephen M. Cameron 		int i;
6321edd16368SStephen M. Cameron 
6322edd16368SStephen M. Cameron 		i = c - h->cmd_pool;
6323edd16368SStephen M. Cameron 		clear_bit(i & (BITS_PER_LONG - 1),
6324edd16368SStephen M. Cameron 			  h->cmd_pool_bits + (i / BITS_PER_LONG));
6325edd16368SStephen M. Cameron 	}
6326281a7fd0SWebb Scales }
6327edd16368SStephen M. Cameron 
6328edd16368SStephen M. Cameron #ifdef CONFIG_COMPAT
6329edd16368SStephen M. Cameron 
633042a91641SDon Brace static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd,
633142a91641SDon Brace 	void __user *arg)
6332edd16368SStephen M. Cameron {
6333edd16368SStephen M. Cameron 	IOCTL32_Command_struct __user *arg32 =
6334edd16368SStephen M. Cameron 	    (IOCTL32_Command_struct __user *) arg;
6335edd16368SStephen M. Cameron 	IOCTL_Command_struct arg64;
6336edd16368SStephen M. Cameron 	IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
6337edd16368SStephen M. Cameron 	int err;
6338edd16368SStephen M. Cameron 	u32 cp;
6339edd16368SStephen M. Cameron 
6340938abd84SVasiliy Kulikov 	memset(&arg64, 0, sizeof(arg64));
6341edd16368SStephen M. Cameron 	err = 0;
6342edd16368SStephen M. Cameron 	err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
6343edd16368SStephen M. Cameron 			   sizeof(arg64.LUN_info));
6344edd16368SStephen M. Cameron 	err |= copy_from_user(&arg64.Request, &arg32->Request,
6345edd16368SStephen M. Cameron 			   sizeof(arg64.Request));
6346edd16368SStephen M. Cameron 	err |= copy_from_user(&arg64.error_info, &arg32->error_info,
6347edd16368SStephen M. Cameron 			   sizeof(arg64.error_info));
6348edd16368SStephen M. Cameron 	err |= get_user(arg64.buf_size, &arg32->buf_size);
6349edd16368SStephen M. Cameron 	err |= get_user(cp, &arg32->buf);
6350edd16368SStephen M. Cameron 	arg64.buf = compat_ptr(cp);
6351edd16368SStephen M. Cameron 	err |= copy_to_user(p, &arg64, sizeof(arg64));
6352edd16368SStephen M. Cameron 
6353edd16368SStephen M. Cameron 	if (err)
6354edd16368SStephen M. Cameron 		return -EFAULT;
6355edd16368SStephen M. Cameron 
635642a91641SDon Brace 	err = hpsa_ioctl(dev, CCISS_PASSTHRU, p);
6357edd16368SStephen M. Cameron 	if (err)
6358edd16368SStephen M. Cameron 		return err;
6359edd16368SStephen M. Cameron 	err |= copy_in_user(&arg32->error_info, &p->error_info,
6360edd16368SStephen M. Cameron 			 sizeof(arg32->error_info));
6361edd16368SStephen M. Cameron 	if (err)
6362edd16368SStephen M. Cameron 		return -EFAULT;
6363edd16368SStephen M. Cameron 	return err;
6364edd16368SStephen M. Cameron }
6365edd16368SStephen M. Cameron 
6366edd16368SStephen M. Cameron static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
636742a91641SDon Brace 	int cmd, void __user *arg)
6368edd16368SStephen M. Cameron {
6369edd16368SStephen M. Cameron 	BIG_IOCTL32_Command_struct __user *arg32 =
6370edd16368SStephen M. Cameron 	    (BIG_IOCTL32_Command_struct __user *) arg;
6371edd16368SStephen M. Cameron 	BIG_IOCTL_Command_struct arg64;
6372edd16368SStephen M. Cameron 	BIG_IOCTL_Command_struct __user *p =
6373edd16368SStephen M. Cameron 	    compat_alloc_user_space(sizeof(arg64));
6374edd16368SStephen M. Cameron 	int err;
6375edd16368SStephen M. Cameron 	u32 cp;
6376edd16368SStephen M. Cameron 
6377938abd84SVasiliy Kulikov 	memset(&arg64, 0, sizeof(arg64));
6378edd16368SStephen M. Cameron 	err = 0;
6379edd16368SStephen M. Cameron 	err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
6380edd16368SStephen M. Cameron 			   sizeof(arg64.LUN_info));
6381edd16368SStephen M. Cameron 	err |= copy_from_user(&arg64.Request, &arg32->Request,
6382edd16368SStephen M. Cameron 			   sizeof(arg64.Request));
6383edd16368SStephen M. Cameron 	err |= copy_from_user(&arg64.error_info, &arg32->error_info,
6384edd16368SStephen M. Cameron 			   sizeof(arg64.error_info));
6385edd16368SStephen M. Cameron 	err |= get_user(arg64.buf_size, &arg32->buf_size);
6386edd16368SStephen M. Cameron 	err |= get_user(arg64.malloc_size, &arg32->malloc_size);
6387edd16368SStephen M. Cameron 	err |= get_user(cp, &arg32->buf);
6388edd16368SStephen M. Cameron 	arg64.buf = compat_ptr(cp);
6389edd16368SStephen M. Cameron 	err |= copy_to_user(p, &arg64, sizeof(arg64));
6390edd16368SStephen M. Cameron 
6391edd16368SStephen M. Cameron 	if (err)
6392edd16368SStephen M. Cameron 		return -EFAULT;
6393edd16368SStephen M. Cameron 
639442a91641SDon Brace 	err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, p);
6395edd16368SStephen M. Cameron 	if (err)
6396edd16368SStephen M. Cameron 		return err;
6397edd16368SStephen M. Cameron 	err |= copy_in_user(&arg32->error_info, &p->error_info,
6398edd16368SStephen M. Cameron 			 sizeof(arg32->error_info));
6399edd16368SStephen M. Cameron 	if (err)
6400edd16368SStephen M. Cameron 		return -EFAULT;
6401edd16368SStephen M. Cameron 	return err;
6402edd16368SStephen M. Cameron }
640371fe75a7SStephen M. Cameron 
640442a91641SDon Brace static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void __user *arg)
640571fe75a7SStephen M. Cameron {
640671fe75a7SStephen M. Cameron 	switch (cmd) {
640771fe75a7SStephen M. Cameron 	case CCISS_GETPCIINFO:
640871fe75a7SStephen M. Cameron 	case CCISS_GETINTINFO:
640971fe75a7SStephen M. Cameron 	case CCISS_SETINTINFO:
641071fe75a7SStephen M. Cameron 	case CCISS_GETNODENAME:
641171fe75a7SStephen M. Cameron 	case CCISS_SETNODENAME:
641271fe75a7SStephen M. Cameron 	case CCISS_GETHEARTBEAT:
641371fe75a7SStephen M. Cameron 	case CCISS_GETBUSTYPES:
641471fe75a7SStephen M. Cameron 	case CCISS_GETFIRMVER:
641571fe75a7SStephen M. Cameron 	case CCISS_GETDRIVVER:
641671fe75a7SStephen M. Cameron 	case CCISS_REVALIDVOLS:
641771fe75a7SStephen M. Cameron 	case CCISS_DEREGDISK:
641871fe75a7SStephen M. Cameron 	case CCISS_REGNEWDISK:
641971fe75a7SStephen M. Cameron 	case CCISS_REGNEWD:
642071fe75a7SStephen M. Cameron 	case CCISS_RESCANDISK:
642171fe75a7SStephen M. Cameron 	case CCISS_GETLUNINFO:
642271fe75a7SStephen M. Cameron 		return hpsa_ioctl(dev, cmd, arg);
642371fe75a7SStephen M. Cameron 
642471fe75a7SStephen M. Cameron 	case CCISS_PASSTHRU32:
642571fe75a7SStephen M. Cameron 		return hpsa_ioctl32_passthru(dev, cmd, arg);
642671fe75a7SStephen M. Cameron 	case CCISS_BIG_PASSTHRU32:
642771fe75a7SStephen M. Cameron 		return hpsa_ioctl32_big_passthru(dev, cmd, arg);
642871fe75a7SStephen M. Cameron 
642971fe75a7SStephen M. Cameron 	default:
643071fe75a7SStephen M. Cameron 		return -ENOIOCTLCMD;
643171fe75a7SStephen M. Cameron 	}
643271fe75a7SStephen M. Cameron }
6433edd16368SStephen M. Cameron #endif
6434edd16368SStephen M. Cameron 
6435edd16368SStephen M. Cameron static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
6436edd16368SStephen M. Cameron {
6437edd16368SStephen M. Cameron 	struct hpsa_pci_info pciinfo;
6438edd16368SStephen M. Cameron 
6439edd16368SStephen M. Cameron 	if (!argp)
6440edd16368SStephen M. Cameron 		return -EINVAL;
6441edd16368SStephen M. Cameron 	pciinfo.domain = pci_domain_nr(h->pdev->bus);
6442edd16368SStephen M. Cameron 	pciinfo.bus = h->pdev->bus->number;
6443edd16368SStephen M. Cameron 	pciinfo.dev_fn = h->pdev->devfn;
6444edd16368SStephen M. Cameron 	pciinfo.board_id = h->board_id;
6445edd16368SStephen M. Cameron 	if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
6446edd16368SStephen M. Cameron 		return -EFAULT;
6447edd16368SStephen M. Cameron 	return 0;
6448edd16368SStephen M. Cameron }
6449edd16368SStephen M. Cameron 
6450edd16368SStephen M. Cameron static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
6451edd16368SStephen M. Cameron {
6452edd16368SStephen M. Cameron 	DriverVer_type DriverVer;
6453edd16368SStephen M. Cameron 	unsigned char vmaj, vmin, vsubmin;
6454edd16368SStephen M. Cameron 	int rc;
6455edd16368SStephen M. Cameron 
6456edd16368SStephen M. Cameron 	rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
6457edd16368SStephen M. Cameron 		&vmaj, &vmin, &vsubmin);
6458edd16368SStephen M. Cameron 	if (rc != 3) {
6459edd16368SStephen M. Cameron 		dev_info(&h->pdev->dev, "driver version string '%s' "
6460edd16368SStephen M. Cameron 			"unrecognized.", HPSA_DRIVER_VERSION);
6461edd16368SStephen M. Cameron 		vmaj = 0;
6462edd16368SStephen M. Cameron 		vmin = 0;
6463edd16368SStephen M. Cameron 		vsubmin = 0;
6464edd16368SStephen M. Cameron 	}
6465edd16368SStephen M. Cameron 	DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
6466edd16368SStephen M. Cameron 	if (!argp)
6467edd16368SStephen M. Cameron 		return -EINVAL;
6468edd16368SStephen M. Cameron 	if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
6469edd16368SStephen M. Cameron 		return -EFAULT;
6470edd16368SStephen M. Cameron 	return 0;
6471edd16368SStephen M. Cameron }
6472edd16368SStephen M. Cameron 
6473edd16368SStephen M. Cameron static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
6474edd16368SStephen M. Cameron {
6475edd16368SStephen M. Cameron 	IOCTL_Command_struct iocommand;
6476edd16368SStephen M. Cameron 	struct CommandList *c;
6477edd16368SStephen M. Cameron 	char *buff = NULL;
647850a0decfSStephen M. Cameron 	u64 temp64;
6479c1f63c8fSStephen M. Cameron 	int rc = 0;
6480edd16368SStephen M. Cameron 
6481edd16368SStephen M. Cameron 	if (!argp)
6482edd16368SStephen M. Cameron 		return -EINVAL;
6483edd16368SStephen M. Cameron 	if (!capable(CAP_SYS_RAWIO))
6484edd16368SStephen M. Cameron 		return -EPERM;
6485edd16368SStephen M. Cameron 	if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
6486edd16368SStephen M. Cameron 		return -EFAULT;
6487edd16368SStephen M. Cameron 	if ((iocommand.buf_size < 1) &&
6488edd16368SStephen M. Cameron 	    (iocommand.Request.Type.Direction != XFER_NONE)) {
6489edd16368SStephen M. Cameron 		return -EINVAL;
6490edd16368SStephen M. Cameron 	}
6491edd16368SStephen M. Cameron 	if (iocommand.buf_size > 0) {
6492edd16368SStephen M. Cameron 		buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
6493edd16368SStephen M. Cameron 		if (buff == NULL)
64942dd02d74SRobert Elliott 			return -ENOMEM;
64959233fb10SStephen M. Cameron 		if (iocommand.Request.Type.Direction & XFER_WRITE) {
6496edd16368SStephen M. Cameron 			/* Copy the data into the buffer we created */
6497b03a7771SStephen M. Cameron 			if (copy_from_user(buff, iocommand.buf,
6498b03a7771SStephen M. Cameron 				iocommand.buf_size)) {
6499c1f63c8fSStephen M. Cameron 				rc = -EFAULT;
6500c1f63c8fSStephen M. Cameron 				goto out_kfree;
6501edd16368SStephen M. Cameron 			}
6502b03a7771SStephen M. Cameron 		} else {
6503edd16368SStephen M. Cameron 			memset(buff, 0, iocommand.buf_size);
6504b03a7771SStephen M. Cameron 		}
6505b03a7771SStephen M. Cameron 	}
650645fcb86eSStephen Cameron 	c = cmd_alloc(h);
6507bf43caf3SRobert Elliott 
6508edd16368SStephen M. Cameron 	/* Fill in the command type */
6509edd16368SStephen M. Cameron 	c->cmd_type = CMD_IOCTL_PEND;
6510a58e7e53SWebb Scales 	c->scsi_cmd = SCSI_CMD_BUSY;
6511edd16368SStephen M. Cameron 	/* Fill in Command Header */
6512edd16368SStephen M. Cameron 	c->Header.ReplyQueue = 0; /* unused in simple mode */
6513edd16368SStephen M. Cameron 	if (iocommand.buf_size > 0) {	/* buffer to fill */
6514edd16368SStephen M. Cameron 		c->Header.SGList = 1;
651550a0decfSStephen M. Cameron 		c->Header.SGTotal = cpu_to_le16(1);
6516edd16368SStephen M. Cameron 	} else	{ /* no buffers to fill */
6517edd16368SStephen M. Cameron 		c->Header.SGList = 0;
651850a0decfSStephen M. Cameron 		c->Header.SGTotal = cpu_to_le16(0);
6519edd16368SStephen M. Cameron 	}
6520edd16368SStephen M. Cameron 	memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
6521edd16368SStephen M. Cameron 
6522edd16368SStephen M. Cameron 	/* Fill in Request block */
6523edd16368SStephen M. Cameron 	memcpy(&c->Request, &iocommand.Request,
6524edd16368SStephen M. Cameron 		sizeof(c->Request));
6525edd16368SStephen M. Cameron 
6526edd16368SStephen M. Cameron 	/* Fill in the scatter gather information */
6527edd16368SStephen M. Cameron 	if (iocommand.buf_size > 0) {
652850a0decfSStephen M. Cameron 		temp64 = pci_map_single(h->pdev, buff,
6529edd16368SStephen M. Cameron 			iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
653050a0decfSStephen M. Cameron 		if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) {
653150a0decfSStephen M. Cameron 			c->SG[0].Addr = cpu_to_le64(0);
653250a0decfSStephen M. Cameron 			c->SG[0].Len = cpu_to_le32(0);
6533bcc48ffaSStephen M. Cameron 			rc = -ENOMEM;
6534bcc48ffaSStephen M. Cameron 			goto out;
6535bcc48ffaSStephen M. Cameron 		}
653650a0decfSStephen M. Cameron 		c->SG[0].Addr = cpu_to_le64(temp64);
653750a0decfSStephen M. Cameron 		c->SG[0].Len = cpu_to_le32(iocommand.buf_size);
653850a0decfSStephen M. Cameron 		c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */
6539edd16368SStephen M. Cameron 	}
6540c448ecfaSDon Brace 	rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
65413fb134cbSDon Brace 					NO_TIMEOUT);
6542c2dd32e0SStephen M. Cameron 	if (iocommand.buf_size > 0)
6543edd16368SStephen M. Cameron 		hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
6544edd16368SStephen M. Cameron 	check_ioctl_unit_attention(h, c);
654525163bd5SWebb Scales 	if (rc) {
654625163bd5SWebb Scales 		rc = -EIO;
654725163bd5SWebb Scales 		goto out;
654825163bd5SWebb Scales 	}
6549edd16368SStephen M. Cameron 
6550edd16368SStephen M. Cameron 	/* Copy the error information out */
6551edd16368SStephen M. Cameron 	memcpy(&iocommand.error_info, c->err_info,
6552edd16368SStephen M. Cameron 		sizeof(iocommand.error_info));
6553edd16368SStephen M. Cameron 	if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
6554c1f63c8fSStephen M. Cameron 		rc = -EFAULT;
6555c1f63c8fSStephen M. Cameron 		goto out;
6556edd16368SStephen M. Cameron 	}
65579233fb10SStephen M. Cameron 	if ((iocommand.Request.Type.Direction & XFER_READ) &&
6558b03a7771SStephen M. Cameron 		iocommand.buf_size > 0) {
6559edd16368SStephen M. Cameron 		/* Copy the data out of the buffer we created */
6560edd16368SStephen M. Cameron 		if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
6561c1f63c8fSStephen M. Cameron 			rc = -EFAULT;
6562c1f63c8fSStephen M. Cameron 			goto out;
6563edd16368SStephen M. Cameron 		}
6564edd16368SStephen M. Cameron 	}
6565c1f63c8fSStephen M. Cameron out:
656645fcb86eSStephen Cameron 	cmd_free(h, c);
6567c1f63c8fSStephen M. Cameron out_kfree:
6568c1f63c8fSStephen M. Cameron 	kfree(buff);
6569c1f63c8fSStephen M. Cameron 	return rc;
6570edd16368SStephen M. Cameron }
6571edd16368SStephen M. Cameron 
6572edd16368SStephen M. Cameron static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
6573edd16368SStephen M. Cameron {
6574edd16368SStephen M. Cameron 	BIG_IOCTL_Command_struct *ioc;
6575edd16368SStephen M. Cameron 	struct CommandList *c;
6576edd16368SStephen M. Cameron 	unsigned char **buff = NULL;
6577edd16368SStephen M. Cameron 	int *buff_size = NULL;
657850a0decfSStephen M. Cameron 	u64 temp64;
6579edd16368SStephen M. Cameron 	BYTE sg_used = 0;
6580edd16368SStephen M. Cameron 	int status = 0;
658101a02ffcSStephen M. Cameron 	u32 left;
658201a02ffcSStephen M. Cameron 	u32 sz;
6583edd16368SStephen M. Cameron 	BYTE __user *data_ptr;
6584edd16368SStephen M. Cameron 
6585edd16368SStephen M. Cameron 	if (!argp)
6586edd16368SStephen M. Cameron 		return -EINVAL;
6587edd16368SStephen M. Cameron 	if (!capable(CAP_SYS_RAWIO))
6588edd16368SStephen M. Cameron 		return -EPERM;
6589edd16368SStephen M. Cameron 	ioc = (BIG_IOCTL_Command_struct *)
6590edd16368SStephen M. Cameron 	    kmalloc(sizeof(*ioc), GFP_KERNEL);
6591edd16368SStephen M. Cameron 	if (!ioc) {
6592edd16368SStephen M. Cameron 		status = -ENOMEM;
6593edd16368SStephen M. Cameron 		goto cleanup1;
6594edd16368SStephen M. Cameron 	}
6595edd16368SStephen M. Cameron 	if (copy_from_user(ioc, argp, sizeof(*ioc))) {
6596edd16368SStephen M. Cameron 		status = -EFAULT;
6597edd16368SStephen M. Cameron 		goto cleanup1;
6598edd16368SStephen M. Cameron 	}
6599edd16368SStephen M. Cameron 	if ((ioc->buf_size < 1) &&
6600edd16368SStephen M. Cameron 	    (ioc->Request.Type.Direction != XFER_NONE)) {
6601edd16368SStephen M. Cameron 		status = -EINVAL;
6602edd16368SStephen M. Cameron 		goto cleanup1;
6603edd16368SStephen M. Cameron 	}
6604edd16368SStephen M. Cameron 	/* Check kmalloc limits  using all SGs */
6605edd16368SStephen M. Cameron 	if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
6606edd16368SStephen M. Cameron 		status = -EINVAL;
6607edd16368SStephen M. Cameron 		goto cleanup1;
6608edd16368SStephen M. Cameron 	}
6609d66ae08bSStephen M. Cameron 	if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) {
6610edd16368SStephen M. Cameron 		status = -EINVAL;
6611edd16368SStephen M. Cameron 		goto cleanup1;
6612edd16368SStephen M. Cameron 	}
6613d66ae08bSStephen M. Cameron 	buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL);
6614edd16368SStephen M. Cameron 	if (!buff) {
6615edd16368SStephen M. Cameron 		status = -ENOMEM;
6616edd16368SStephen M. Cameron 		goto cleanup1;
6617edd16368SStephen M. Cameron 	}
6618d66ae08bSStephen M. Cameron 	buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL);
6619edd16368SStephen M. Cameron 	if (!buff_size) {
6620edd16368SStephen M. Cameron 		status = -ENOMEM;
6621edd16368SStephen M. Cameron 		goto cleanup1;
6622edd16368SStephen M. Cameron 	}
6623edd16368SStephen M. Cameron 	left = ioc->buf_size;
6624edd16368SStephen M. Cameron 	data_ptr = ioc->buf;
6625edd16368SStephen M. Cameron 	while (left) {
6626edd16368SStephen M. Cameron 		sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
6627edd16368SStephen M. Cameron 		buff_size[sg_used] = sz;
6628edd16368SStephen M. Cameron 		buff[sg_used] = kmalloc(sz, GFP_KERNEL);
6629edd16368SStephen M. Cameron 		if (buff[sg_used] == NULL) {
6630edd16368SStephen M. Cameron 			status = -ENOMEM;
6631edd16368SStephen M. Cameron 			goto cleanup1;
6632edd16368SStephen M. Cameron 		}
66339233fb10SStephen M. Cameron 		if (ioc->Request.Type.Direction & XFER_WRITE) {
6634edd16368SStephen M. Cameron 			if (copy_from_user(buff[sg_used], data_ptr, sz)) {
66350758f4f7SStephen M. Cameron 				status = -EFAULT;
6636edd16368SStephen M. Cameron 				goto cleanup1;
6637edd16368SStephen M. Cameron 			}
6638edd16368SStephen M. Cameron 		} else
6639edd16368SStephen M. Cameron 			memset(buff[sg_used], 0, sz);
6640edd16368SStephen M. Cameron 		left -= sz;
6641edd16368SStephen M. Cameron 		data_ptr += sz;
6642edd16368SStephen M. Cameron 		sg_used++;
6643edd16368SStephen M. Cameron 	}
664445fcb86eSStephen Cameron 	c = cmd_alloc(h);
6645bf43caf3SRobert Elliott 
6646edd16368SStephen M. Cameron 	c->cmd_type = CMD_IOCTL_PEND;
6647a58e7e53SWebb Scales 	c->scsi_cmd = SCSI_CMD_BUSY;
6648edd16368SStephen M. Cameron 	c->Header.ReplyQueue = 0;
664950a0decfSStephen M. Cameron 	c->Header.SGList = (u8) sg_used;
665050a0decfSStephen M. Cameron 	c->Header.SGTotal = cpu_to_le16(sg_used);
6651edd16368SStephen M. Cameron 	memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
6652edd16368SStephen M. Cameron 	memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
6653edd16368SStephen M. Cameron 	if (ioc->buf_size > 0) {
6654edd16368SStephen M. Cameron 		int i;
6655edd16368SStephen M. Cameron 		for (i = 0; i < sg_used; i++) {
665650a0decfSStephen M. Cameron 			temp64 = pci_map_single(h->pdev, buff[i],
6657edd16368SStephen M. Cameron 				    buff_size[i], PCI_DMA_BIDIRECTIONAL);
665850a0decfSStephen M. Cameron 			if (dma_mapping_error(&h->pdev->dev,
665950a0decfSStephen M. Cameron 							(dma_addr_t) temp64)) {
666050a0decfSStephen M. Cameron 				c->SG[i].Addr = cpu_to_le64(0);
666150a0decfSStephen M. Cameron 				c->SG[i].Len = cpu_to_le32(0);
6662bcc48ffaSStephen M. Cameron 				hpsa_pci_unmap(h->pdev, c, i,
6663bcc48ffaSStephen M. Cameron 					PCI_DMA_BIDIRECTIONAL);
6664bcc48ffaSStephen M. Cameron 				status = -ENOMEM;
6665e2d4a1f6SStephen M. Cameron 				goto cleanup0;
6666bcc48ffaSStephen M. Cameron 			}
666750a0decfSStephen M. Cameron 			c->SG[i].Addr = cpu_to_le64(temp64);
666850a0decfSStephen M. Cameron 			c->SG[i].Len = cpu_to_le32(buff_size[i]);
666950a0decfSStephen M. Cameron 			c->SG[i].Ext = cpu_to_le32(0);
6670edd16368SStephen M. Cameron 		}
667150a0decfSStephen M. Cameron 		c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST);
6672edd16368SStephen M. Cameron 	}
6673c448ecfaSDon Brace 	status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
66743fb134cbSDon Brace 						NO_TIMEOUT);
6675b03a7771SStephen M. Cameron 	if (sg_used)
6676edd16368SStephen M. Cameron 		hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
6677edd16368SStephen M. Cameron 	check_ioctl_unit_attention(h, c);
667825163bd5SWebb Scales 	if (status) {
667925163bd5SWebb Scales 		status = -EIO;
668025163bd5SWebb Scales 		goto cleanup0;
668125163bd5SWebb Scales 	}
668225163bd5SWebb Scales 
6683edd16368SStephen M. Cameron 	/* Copy the error information out */
6684edd16368SStephen M. Cameron 	memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
6685edd16368SStephen M. Cameron 	if (copy_to_user(argp, ioc, sizeof(*ioc))) {
6686edd16368SStephen M. Cameron 		status = -EFAULT;
6687e2d4a1f6SStephen M. Cameron 		goto cleanup0;
6688edd16368SStephen M. Cameron 	}
66899233fb10SStephen M. Cameron 	if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) {
66902b08b3e9SDon Brace 		int i;
66912b08b3e9SDon Brace 
6692edd16368SStephen M. Cameron 		/* Copy the data out of the buffer we created */
6693edd16368SStephen M. Cameron 		BYTE __user *ptr = ioc->buf;
6694edd16368SStephen M. Cameron 		for (i = 0; i < sg_used; i++) {
6695edd16368SStephen M. Cameron 			if (copy_to_user(ptr, buff[i], buff_size[i])) {
6696edd16368SStephen M. Cameron 				status = -EFAULT;
6697e2d4a1f6SStephen M. Cameron 				goto cleanup0;
6698edd16368SStephen M. Cameron 			}
6699edd16368SStephen M. Cameron 			ptr += buff_size[i];
6700edd16368SStephen M. Cameron 		}
6701edd16368SStephen M. Cameron 	}
6702edd16368SStephen M. Cameron 	status = 0;
6703e2d4a1f6SStephen M. Cameron cleanup0:
670445fcb86eSStephen Cameron 	cmd_free(h, c);
6705edd16368SStephen M. Cameron cleanup1:
6706edd16368SStephen M. Cameron 	if (buff) {
67072b08b3e9SDon Brace 		int i;
67082b08b3e9SDon Brace 
6709edd16368SStephen M. Cameron 		for (i = 0; i < sg_used; i++)
6710edd16368SStephen M. Cameron 			kfree(buff[i]);
6711edd16368SStephen M. Cameron 		kfree(buff);
6712edd16368SStephen M. Cameron 	}
6713edd16368SStephen M. Cameron 	kfree(buff_size);
6714edd16368SStephen M. Cameron 	kfree(ioc);
6715edd16368SStephen M. Cameron 	return status;
6716edd16368SStephen M. Cameron }
6717edd16368SStephen M. Cameron 
6718edd16368SStephen M. Cameron static void check_ioctl_unit_attention(struct ctlr_info *h,
6719edd16368SStephen M. Cameron 	struct CommandList *c)
6720edd16368SStephen M. Cameron {
6721edd16368SStephen M. Cameron 	if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
6722edd16368SStephen M. Cameron 			c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
6723edd16368SStephen M. Cameron 		(void) check_for_unit_attention(h, c);
6724edd16368SStephen M. Cameron }
67250390f0c0SStephen M. Cameron 
6726edd16368SStephen M. Cameron /*
6727edd16368SStephen M. Cameron  * ioctl
6728edd16368SStephen M. Cameron  */
672942a91641SDon Brace static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg)
6730edd16368SStephen M. Cameron {
6731edd16368SStephen M. Cameron 	struct ctlr_info *h;
6732edd16368SStephen M. Cameron 	void __user *argp = (void __user *)arg;
67330390f0c0SStephen M. Cameron 	int rc;
6734edd16368SStephen M. Cameron 
6735edd16368SStephen M. Cameron 	h = sdev_to_hba(dev);
6736edd16368SStephen M. Cameron 
6737edd16368SStephen M. Cameron 	switch (cmd) {
6738edd16368SStephen M. Cameron 	case CCISS_DEREGDISK:
6739edd16368SStephen M. Cameron 	case CCISS_REGNEWDISK:
6740edd16368SStephen M. Cameron 	case CCISS_REGNEWD:
6741a08a8471SStephen M. Cameron 		hpsa_scan_start(h->scsi_host);
6742edd16368SStephen M. Cameron 		return 0;
6743edd16368SStephen M. Cameron 	case CCISS_GETPCIINFO:
6744edd16368SStephen M. Cameron 		return hpsa_getpciinfo_ioctl(h, argp);
6745edd16368SStephen M. Cameron 	case CCISS_GETDRIVVER:
6746edd16368SStephen M. Cameron 		return hpsa_getdrivver_ioctl(h, argp);
6747edd16368SStephen M. Cameron 	case CCISS_PASSTHRU:
674834f0c627SDon Brace 		if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
67490390f0c0SStephen M. Cameron 			return -EAGAIN;
67500390f0c0SStephen M. Cameron 		rc = hpsa_passthru_ioctl(h, argp);
675134f0c627SDon Brace 		atomic_inc(&h->passthru_cmds_avail);
67520390f0c0SStephen M. Cameron 		return rc;
6753edd16368SStephen M. Cameron 	case CCISS_BIG_PASSTHRU:
675434f0c627SDon Brace 		if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
67550390f0c0SStephen M. Cameron 			return -EAGAIN;
67560390f0c0SStephen M. Cameron 		rc = hpsa_big_passthru_ioctl(h, argp);
675734f0c627SDon Brace 		atomic_inc(&h->passthru_cmds_avail);
67580390f0c0SStephen M. Cameron 		return rc;
6759edd16368SStephen M. Cameron 	default:
6760edd16368SStephen M. Cameron 		return -ENOTTY;
6761edd16368SStephen M. Cameron 	}
6762edd16368SStephen M. Cameron }
6763edd16368SStephen M. Cameron 
6764bf43caf3SRobert Elliott static void hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr,
67656f039790SGreg Kroah-Hartman 				u8 reset_type)
676664670ac8SStephen M. Cameron {
676764670ac8SStephen M. Cameron 	struct CommandList *c;
676864670ac8SStephen M. Cameron 
676964670ac8SStephen M. Cameron 	c = cmd_alloc(h);
6770bf43caf3SRobert Elliott 
6771a2dac136SStephen M. Cameron 	/* fill_cmd can't fail here, no data buffer to map */
6772a2dac136SStephen M. Cameron 	(void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
677364670ac8SStephen M. Cameron 		RAID_CTLR_LUNID, TYPE_MSG);
677464670ac8SStephen M. Cameron 	c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
677564670ac8SStephen M. Cameron 	c->waiting = NULL;
677664670ac8SStephen M. Cameron 	enqueue_cmd_and_start_io(h, c);
677764670ac8SStephen M. Cameron 	/* Don't wait for completion, the reset won't complete.  Don't free
677864670ac8SStephen M. Cameron 	 * the command either.  This is the last command we will send before
677964670ac8SStephen M. Cameron 	 * re-initializing everything, so it doesn't matter and won't leak.
678064670ac8SStephen M. Cameron 	 */
6781bf43caf3SRobert Elliott 	return;
678264670ac8SStephen M. Cameron }
678364670ac8SStephen M. Cameron 
6784a2dac136SStephen M. Cameron static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
6785b7bb24ebSStephen M. Cameron 	void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
6786edd16368SStephen M. Cameron 	int cmd_type)
6787edd16368SStephen M. Cameron {
6788edd16368SStephen M. Cameron 	int pci_dir = XFER_NONE;
67899b5c48c2SStephen Cameron 	u64 tag; /* for commands to be aborted */
6790edd16368SStephen M. Cameron 
6791edd16368SStephen M. Cameron 	c->cmd_type = CMD_IOCTL_PEND;
6792a58e7e53SWebb Scales 	c->scsi_cmd = SCSI_CMD_BUSY;
6793edd16368SStephen M. Cameron 	c->Header.ReplyQueue = 0;
6794edd16368SStephen M. Cameron 	if (buff != NULL && size > 0) {
6795edd16368SStephen M. Cameron 		c->Header.SGList = 1;
679650a0decfSStephen M. Cameron 		c->Header.SGTotal = cpu_to_le16(1);
6797edd16368SStephen M. Cameron 	} else {
6798edd16368SStephen M. Cameron 		c->Header.SGList = 0;
679950a0decfSStephen M. Cameron 		c->Header.SGTotal = cpu_to_le16(0);
6800edd16368SStephen M. Cameron 	}
6801edd16368SStephen M. Cameron 	memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
6802edd16368SStephen M. Cameron 
6803edd16368SStephen M. Cameron 	if (cmd_type == TYPE_CMD) {
6804edd16368SStephen M. Cameron 		switch (cmd) {
6805edd16368SStephen M. Cameron 		case HPSA_INQUIRY:
6806edd16368SStephen M. Cameron 			/* are we trying to read a vital product page */
6807b7bb24ebSStephen M. Cameron 			if (page_code & VPD_PAGE) {
6808edd16368SStephen M. Cameron 				c->Request.CDB[1] = 0x01;
6809b7bb24ebSStephen M. Cameron 				c->Request.CDB[2] = (page_code & 0xff);
6810edd16368SStephen M. Cameron 			}
6811edd16368SStephen M. Cameron 			c->Request.CDBLen = 6;
6812a505b86fSStephen M. Cameron 			c->Request.type_attr_dir =
6813a505b86fSStephen M. Cameron 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6814edd16368SStephen M. Cameron 			c->Request.Timeout = 0;
6815edd16368SStephen M. Cameron 			c->Request.CDB[0] = HPSA_INQUIRY;
6816edd16368SStephen M. Cameron 			c->Request.CDB[4] = size & 0xFF;
6817edd16368SStephen M. Cameron 			break;
6818edd16368SStephen M. Cameron 		case HPSA_REPORT_LOG:
6819edd16368SStephen M. Cameron 		case HPSA_REPORT_PHYS:
6820edd16368SStephen M. Cameron 			/* Talking to controller so It's a physical command
6821edd16368SStephen M. Cameron 			   mode = 00 target = 0.  Nothing to write.
6822edd16368SStephen M. Cameron 			 */
6823edd16368SStephen M. Cameron 			c->Request.CDBLen = 12;
6824a505b86fSStephen M. Cameron 			c->Request.type_attr_dir =
6825a505b86fSStephen M. Cameron 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6826edd16368SStephen M. Cameron 			c->Request.Timeout = 0;
6827edd16368SStephen M. Cameron 			c->Request.CDB[0] = cmd;
6828edd16368SStephen M. Cameron 			c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
6829edd16368SStephen M. Cameron 			c->Request.CDB[7] = (size >> 16) & 0xFF;
6830edd16368SStephen M. Cameron 			c->Request.CDB[8] = (size >> 8) & 0xFF;
6831edd16368SStephen M. Cameron 			c->Request.CDB[9] = size & 0xFF;
6832edd16368SStephen M. Cameron 			break;
6833c2adae44SScott Teel 		case BMIC_SENSE_DIAG_OPTIONS:
6834c2adae44SScott Teel 			c->Request.CDBLen = 16;
6835c2adae44SScott Teel 			c->Request.type_attr_dir =
6836c2adae44SScott Teel 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6837c2adae44SScott Teel 			c->Request.Timeout = 0;
6838c2adae44SScott Teel 			/* Spec says this should be BMIC_WRITE */
6839c2adae44SScott Teel 			c->Request.CDB[0] = BMIC_READ;
6840c2adae44SScott Teel 			c->Request.CDB[6] = BMIC_SENSE_DIAG_OPTIONS;
6841c2adae44SScott Teel 			break;
6842c2adae44SScott Teel 		case BMIC_SET_DIAG_OPTIONS:
6843c2adae44SScott Teel 			c->Request.CDBLen = 16;
6844c2adae44SScott Teel 			c->Request.type_attr_dir =
6845c2adae44SScott Teel 					TYPE_ATTR_DIR(cmd_type,
6846c2adae44SScott Teel 						ATTR_SIMPLE, XFER_WRITE);
6847c2adae44SScott Teel 			c->Request.Timeout = 0;
6848c2adae44SScott Teel 			c->Request.CDB[0] = BMIC_WRITE;
6849c2adae44SScott Teel 			c->Request.CDB[6] = BMIC_SET_DIAG_OPTIONS;
6850c2adae44SScott Teel 			break;
6851edd16368SStephen M. Cameron 		case HPSA_CACHE_FLUSH:
6852edd16368SStephen M. Cameron 			c->Request.CDBLen = 12;
6853a505b86fSStephen M. Cameron 			c->Request.type_attr_dir =
6854a505b86fSStephen M. Cameron 					TYPE_ATTR_DIR(cmd_type,
6855a505b86fSStephen M. Cameron 						ATTR_SIMPLE, XFER_WRITE);
6856edd16368SStephen M. Cameron 			c->Request.Timeout = 0;
6857edd16368SStephen M. Cameron 			c->Request.CDB[0] = BMIC_WRITE;
6858edd16368SStephen M. Cameron 			c->Request.CDB[6] = BMIC_CACHE_FLUSH;
6859bb158eabSStephen M. Cameron 			c->Request.CDB[7] = (size >> 8) & 0xFF;
6860bb158eabSStephen M. Cameron 			c->Request.CDB[8] = size & 0xFF;
6861edd16368SStephen M. Cameron 			break;
6862edd16368SStephen M. Cameron 		case TEST_UNIT_READY:
6863edd16368SStephen M. Cameron 			c->Request.CDBLen = 6;
6864a505b86fSStephen M. Cameron 			c->Request.type_attr_dir =
6865a505b86fSStephen M. Cameron 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6866edd16368SStephen M. Cameron 			c->Request.Timeout = 0;
6867edd16368SStephen M. Cameron 			break;
6868283b4a9bSStephen M. Cameron 		case HPSA_GET_RAID_MAP:
6869283b4a9bSStephen M. Cameron 			c->Request.CDBLen = 12;
6870a505b86fSStephen M. Cameron 			c->Request.type_attr_dir =
6871a505b86fSStephen M. Cameron 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6872283b4a9bSStephen M. Cameron 			c->Request.Timeout = 0;
6873283b4a9bSStephen M. Cameron 			c->Request.CDB[0] = HPSA_CISS_READ;
6874283b4a9bSStephen M. Cameron 			c->Request.CDB[1] = cmd;
6875283b4a9bSStephen M. Cameron 			c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
6876283b4a9bSStephen M. Cameron 			c->Request.CDB[7] = (size >> 16) & 0xFF;
6877283b4a9bSStephen M. Cameron 			c->Request.CDB[8] = (size >> 8) & 0xFF;
6878283b4a9bSStephen M. Cameron 			c->Request.CDB[9] = size & 0xFF;
6879283b4a9bSStephen M. Cameron 			break;
6880316b221aSStephen M. Cameron 		case BMIC_SENSE_CONTROLLER_PARAMETERS:
6881316b221aSStephen M. Cameron 			c->Request.CDBLen = 10;
6882a505b86fSStephen M. Cameron 			c->Request.type_attr_dir =
6883a505b86fSStephen M. Cameron 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6884316b221aSStephen M. Cameron 			c->Request.Timeout = 0;
6885316b221aSStephen M. Cameron 			c->Request.CDB[0] = BMIC_READ;
6886316b221aSStephen M. Cameron 			c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS;
6887316b221aSStephen M. Cameron 			c->Request.CDB[7] = (size >> 16) & 0xFF;
6888316b221aSStephen M. Cameron 			c->Request.CDB[8] = (size >> 8) & 0xFF;
6889316b221aSStephen M. Cameron 			break;
689003383736SDon Brace 		case BMIC_IDENTIFY_PHYSICAL_DEVICE:
689103383736SDon Brace 			c->Request.CDBLen = 10;
689203383736SDon Brace 			c->Request.type_attr_dir =
689303383736SDon Brace 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
689403383736SDon Brace 			c->Request.Timeout = 0;
689503383736SDon Brace 			c->Request.CDB[0] = BMIC_READ;
689603383736SDon Brace 			c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE;
689703383736SDon Brace 			c->Request.CDB[7] = (size >> 16) & 0xFF;
689803383736SDon Brace 			c->Request.CDB[8] = (size >> 8) & 0XFF;
689903383736SDon Brace 			break;
6900d04e62b9SKevin Barnett 		case BMIC_SENSE_SUBSYSTEM_INFORMATION:
6901d04e62b9SKevin Barnett 			c->Request.CDBLen = 10;
6902d04e62b9SKevin Barnett 			c->Request.type_attr_dir =
6903d04e62b9SKevin Barnett 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6904d04e62b9SKevin Barnett 			c->Request.Timeout = 0;
6905d04e62b9SKevin Barnett 			c->Request.CDB[0] = BMIC_READ;
6906d04e62b9SKevin Barnett 			c->Request.CDB[6] = BMIC_SENSE_SUBSYSTEM_INFORMATION;
6907d04e62b9SKevin Barnett 			c->Request.CDB[7] = (size >> 16) & 0xFF;
6908d04e62b9SKevin Barnett 			c->Request.CDB[8] = (size >> 8) & 0XFF;
6909d04e62b9SKevin Barnett 			break;
6910cca8f13bSDon Brace 		case BMIC_SENSE_STORAGE_BOX_PARAMS:
6911cca8f13bSDon Brace 			c->Request.CDBLen = 10;
6912cca8f13bSDon Brace 			c->Request.type_attr_dir =
6913cca8f13bSDon Brace 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6914cca8f13bSDon Brace 			c->Request.Timeout = 0;
6915cca8f13bSDon Brace 			c->Request.CDB[0] = BMIC_READ;
6916cca8f13bSDon Brace 			c->Request.CDB[6] = BMIC_SENSE_STORAGE_BOX_PARAMS;
6917cca8f13bSDon Brace 			c->Request.CDB[7] = (size >> 16) & 0xFF;
6918cca8f13bSDon Brace 			c->Request.CDB[8] = (size >> 8) & 0XFF;
6919cca8f13bSDon Brace 			break;
692066749d0dSScott Teel 		case BMIC_IDENTIFY_CONTROLLER:
692166749d0dSScott Teel 			c->Request.CDBLen = 10;
692266749d0dSScott Teel 			c->Request.type_attr_dir =
692366749d0dSScott Teel 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
692466749d0dSScott Teel 			c->Request.Timeout = 0;
692566749d0dSScott Teel 			c->Request.CDB[0] = BMIC_READ;
692666749d0dSScott Teel 			c->Request.CDB[1] = 0;
692766749d0dSScott Teel 			c->Request.CDB[2] = 0;
692866749d0dSScott Teel 			c->Request.CDB[3] = 0;
692966749d0dSScott Teel 			c->Request.CDB[4] = 0;
693066749d0dSScott Teel 			c->Request.CDB[5] = 0;
693166749d0dSScott Teel 			c->Request.CDB[6] = BMIC_IDENTIFY_CONTROLLER;
693266749d0dSScott Teel 			c->Request.CDB[7] = (size >> 16) & 0xFF;
693366749d0dSScott Teel 			c->Request.CDB[8] = (size >> 8) & 0XFF;
693466749d0dSScott Teel 			c->Request.CDB[9] = 0;
693566749d0dSScott Teel 			break;
6936edd16368SStephen M. Cameron 		default:
6937edd16368SStephen M. Cameron 			dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
6938edd16368SStephen M. Cameron 			BUG();
6939a2dac136SStephen M. Cameron 			return -1;
6940edd16368SStephen M. Cameron 		}
6941edd16368SStephen M. Cameron 	} else if (cmd_type == TYPE_MSG) {
6942edd16368SStephen M. Cameron 		switch (cmd) {
6943edd16368SStephen M. Cameron 
69440b9b7b6eSScott Teel 		case  HPSA_PHYS_TARGET_RESET:
69450b9b7b6eSScott Teel 			c->Request.CDBLen = 16;
69460b9b7b6eSScott Teel 			c->Request.type_attr_dir =
69470b9b7b6eSScott Teel 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
69480b9b7b6eSScott Teel 			c->Request.Timeout = 0; /* Don't time out */
69490b9b7b6eSScott Teel 			memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
69500b9b7b6eSScott Teel 			c->Request.CDB[0] = HPSA_RESET;
69510b9b7b6eSScott Teel 			c->Request.CDB[1] = HPSA_TARGET_RESET_TYPE;
69520b9b7b6eSScott Teel 			/* Physical target reset needs no control bytes 4-7*/
69530b9b7b6eSScott Teel 			c->Request.CDB[4] = 0x00;
69540b9b7b6eSScott Teel 			c->Request.CDB[5] = 0x00;
69550b9b7b6eSScott Teel 			c->Request.CDB[6] = 0x00;
69560b9b7b6eSScott Teel 			c->Request.CDB[7] = 0x00;
69570b9b7b6eSScott Teel 			break;
6958edd16368SStephen M. Cameron 		case  HPSA_DEVICE_RESET_MSG:
6959edd16368SStephen M. Cameron 			c->Request.CDBLen = 16;
6960a505b86fSStephen M. Cameron 			c->Request.type_attr_dir =
6961a505b86fSStephen M. Cameron 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6962edd16368SStephen M. Cameron 			c->Request.Timeout = 0; /* Don't time out */
696364670ac8SStephen M. Cameron 			memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
696464670ac8SStephen M. Cameron 			c->Request.CDB[0] =  cmd;
696521e89afdSStephen M. Cameron 			c->Request.CDB[1] = HPSA_RESET_TYPE_LUN;
6966edd16368SStephen M. Cameron 			/* If bytes 4-7 are zero, it means reset the */
6967edd16368SStephen M. Cameron 			/* LunID device */
6968edd16368SStephen M. Cameron 			c->Request.CDB[4] = 0x00;
6969edd16368SStephen M. Cameron 			c->Request.CDB[5] = 0x00;
6970edd16368SStephen M. Cameron 			c->Request.CDB[6] = 0x00;
6971edd16368SStephen M. Cameron 			c->Request.CDB[7] = 0x00;
6972edd16368SStephen M. Cameron 			break;
697375167d2cSStephen M. Cameron 		case  HPSA_ABORT_MSG:
69749b5c48c2SStephen Cameron 			memcpy(&tag, buff, sizeof(tag));
69752b08b3e9SDon Brace 			dev_dbg(&h->pdev->dev,
69769b5c48c2SStephen Cameron 				"Abort Tag:0x%016llx using rqst Tag:0x%016llx",
69779b5c48c2SStephen Cameron 				tag, c->Header.tag);
697875167d2cSStephen M. Cameron 			c->Request.CDBLen = 16;
6979a505b86fSStephen M. Cameron 			c->Request.type_attr_dir =
6980a505b86fSStephen M. Cameron 					TYPE_ATTR_DIR(cmd_type,
6981a505b86fSStephen M. Cameron 						ATTR_SIMPLE, XFER_WRITE);
698275167d2cSStephen M. Cameron 			c->Request.Timeout = 0; /* Don't time out */
698375167d2cSStephen M. Cameron 			c->Request.CDB[0] = HPSA_TASK_MANAGEMENT;
698475167d2cSStephen M. Cameron 			c->Request.CDB[1] = HPSA_TMF_ABORT_TASK;
698575167d2cSStephen M. Cameron 			c->Request.CDB[2] = 0x00; /* reserved */
698675167d2cSStephen M. Cameron 			c->Request.CDB[3] = 0x00; /* reserved */
698775167d2cSStephen M. Cameron 			/* Tag to abort goes in CDB[4]-CDB[11] */
69889b5c48c2SStephen Cameron 			memcpy(&c->Request.CDB[4], &tag, sizeof(tag));
698975167d2cSStephen M. Cameron 			c->Request.CDB[12] = 0x00; /* reserved */
699075167d2cSStephen M. Cameron 			c->Request.CDB[13] = 0x00; /* reserved */
699175167d2cSStephen M. Cameron 			c->Request.CDB[14] = 0x00; /* reserved */
699275167d2cSStephen M. Cameron 			c->Request.CDB[15] = 0x00; /* reserved */
699375167d2cSStephen M. Cameron 		break;
6994edd16368SStephen M. Cameron 		default:
6995edd16368SStephen M. Cameron 			dev_warn(&h->pdev->dev, "unknown message type %d\n",
6996edd16368SStephen M. Cameron 				cmd);
6997edd16368SStephen M. Cameron 			BUG();
6998edd16368SStephen M. Cameron 		}
6999edd16368SStephen M. Cameron 	} else {
7000edd16368SStephen M. Cameron 		dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
7001edd16368SStephen M. Cameron 		BUG();
7002edd16368SStephen M. Cameron 	}
7003edd16368SStephen M. Cameron 
7004a505b86fSStephen M. Cameron 	switch (GET_DIR(c->Request.type_attr_dir)) {
7005edd16368SStephen M. Cameron 	case XFER_READ:
7006edd16368SStephen M. Cameron 		pci_dir = PCI_DMA_FROMDEVICE;
7007edd16368SStephen M. Cameron 		break;
7008edd16368SStephen M. Cameron 	case XFER_WRITE:
7009edd16368SStephen M. Cameron 		pci_dir = PCI_DMA_TODEVICE;
7010edd16368SStephen M. Cameron 		break;
7011edd16368SStephen M. Cameron 	case XFER_NONE:
7012edd16368SStephen M. Cameron 		pci_dir = PCI_DMA_NONE;
7013edd16368SStephen M. Cameron 		break;
7014edd16368SStephen M. Cameron 	default:
7015edd16368SStephen M. Cameron 		pci_dir = PCI_DMA_BIDIRECTIONAL;
7016edd16368SStephen M. Cameron 	}
7017a2dac136SStephen M. Cameron 	if (hpsa_map_one(h->pdev, c, buff, size, pci_dir))
7018a2dac136SStephen M. Cameron 		return -1;
7019a2dac136SStephen M. Cameron 	return 0;
7020edd16368SStephen M. Cameron }
7021edd16368SStephen M. Cameron 
7022edd16368SStephen M. Cameron /*
7023edd16368SStephen M. Cameron  * Map (physical) PCI mem into (virtual) kernel space
7024edd16368SStephen M. Cameron  */
7025edd16368SStephen M. Cameron static void __iomem *remap_pci_mem(ulong base, ulong size)
7026edd16368SStephen M. Cameron {
7027edd16368SStephen M. Cameron 	ulong page_base = ((ulong) base) & PAGE_MASK;
7028edd16368SStephen M. Cameron 	ulong page_offs = ((ulong) base) - page_base;
7029088ba34cSStephen M. Cameron 	void __iomem *page_remapped = ioremap_nocache(page_base,
7030088ba34cSStephen M. Cameron 		page_offs + size);
7031edd16368SStephen M. Cameron 
7032edd16368SStephen M. Cameron 	return page_remapped ? (page_remapped + page_offs) : NULL;
7033edd16368SStephen M. Cameron }
7034edd16368SStephen M. Cameron 
7035254f796bSMatt Gates static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q)
7036edd16368SStephen M. Cameron {
7037254f796bSMatt Gates 	return h->access.command_completed(h, q);
7038edd16368SStephen M. Cameron }
7039edd16368SStephen M. Cameron 
7040900c5440SStephen M. Cameron static inline bool interrupt_pending(struct ctlr_info *h)
7041edd16368SStephen M. Cameron {
7042edd16368SStephen M. Cameron 	return h->access.intr_pending(h);
7043edd16368SStephen M. Cameron }
7044edd16368SStephen M. Cameron 
7045edd16368SStephen M. Cameron static inline long interrupt_not_for_us(struct ctlr_info *h)
7046edd16368SStephen M. Cameron {
704710f66018SStephen M. Cameron 	return (h->access.intr_pending(h) == 0) ||
704810f66018SStephen M. Cameron 		(h->interrupts_enabled == 0);
7049edd16368SStephen M. Cameron }
7050edd16368SStephen M. Cameron 
705101a02ffcSStephen M. Cameron static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
705201a02ffcSStephen M. Cameron 	u32 raw_tag)
7053edd16368SStephen M. Cameron {
7054edd16368SStephen M. Cameron 	if (unlikely(tag_index >= h->nr_cmds)) {
7055edd16368SStephen M. Cameron 		dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
7056edd16368SStephen M. Cameron 		return 1;
7057edd16368SStephen M. Cameron 	}
7058edd16368SStephen M. Cameron 	return 0;
7059edd16368SStephen M. Cameron }
7060edd16368SStephen M. Cameron 
70615a3d16f5SStephen M. Cameron static inline void finish_cmd(struct CommandList *c)
7062edd16368SStephen M. Cameron {
7063e85c5974SStephen M. Cameron 	dial_up_lockup_detection_on_fw_flash_complete(c->h, c);
7064c349775eSScott Teel 	if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI
7065c349775eSScott Teel 			|| c->cmd_type == CMD_IOACCEL2))
70661fb011fbSStephen M. Cameron 		complete_scsi_command(c);
70678be986ccSStephen Cameron 	else if (c->cmd_type == CMD_IOCTL_PEND || c->cmd_type == IOACCEL2_TMF)
7068edd16368SStephen M. Cameron 		complete(c->waiting);
7069a104c99fSStephen M. Cameron }
7070a104c99fSStephen M. Cameron 
7071303932fdSDon Brace /* process completion of an indexed ("direct lookup") command */
70721d94f94dSStephen M. Cameron static inline void process_indexed_cmd(struct ctlr_info *h,
7073303932fdSDon Brace 	u32 raw_tag)
7074303932fdSDon Brace {
7075303932fdSDon Brace 	u32 tag_index;
7076303932fdSDon Brace 	struct CommandList *c;
7077303932fdSDon Brace 
7078f2405db8SDon Brace 	tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT;
70791d94f94dSStephen M. Cameron 	if (!bad_tag(h, tag_index, raw_tag)) {
7080303932fdSDon Brace 		c = h->cmd_pool + tag_index;
70815a3d16f5SStephen M. Cameron 		finish_cmd(c);
70821d94f94dSStephen M. Cameron 	}
7083303932fdSDon Brace }
7084303932fdSDon Brace 
708564670ac8SStephen M. Cameron /* Some controllers, like p400, will give us one interrupt
708664670ac8SStephen M. Cameron  * after a soft reset, even if we turned interrupts off.
708764670ac8SStephen M. Cameron  * Only need to check for this in the hpsa_xxx_discard_completions
708864670ac8SStephen M. Cameron  * functions.
708964670ac8SStephen M. Cameron  */
709064670ac8SStephen M. Cameron static int ignore_bogus_interrupt(struct ctlr_info *h)
709164670ac8SStephen M. Cameron {
709264670ac8SStephen M. Cameron 	if (likely(!reset_devices))
709364670ac8SStephen M. Cameron 		return 0;
709464670ac8SStephen M. Cameron 
709564670ac8SStephen M. Cameron 	if (likely(h->interrupts_enabled))
709664670ac8SStephen M. Cameron 		return 0;
709764670ac8SStephen M. Cameron 
709864670ac8SStephen M. Cameron 	dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
709964670ac8SStephen M. Cameron 		"(known firmware bug.)  Ignoring.\n");
710064670ac8SStephen M. Cameron 
710164670ac8SStephen M. Cameron 	return 1;
710264670ac8SStephen M. Cameron }
710364670ac8SStephen M. Cameron 
7104254f796bSMatt Gates /*
7105254f796bSMatt Gates  * Convert &h->q[x] (passed to interrupt handlers) back to h.
7106254f796bSMatt Gates  * Relies on (h-q[x] == x) being true for x such that
7107254f796bSMatt Gates  * 0 <= x < MAX_REPLY_QUEUES.
7108254f796bSMatt Gates  */
7109254f796bSMatt Gates static struct ctlr_info *queue_to_hba(u8 *queue)
711064670ac8SStephen M. Cameron {
7111254f796bSMatt Gates 	return container_of((queue - *queue), struct ctlr_info, q[0]);
7112254f796bSMatt Gates }
7113254f796bSMatt Gates 
7114254f796bSMatt Gates static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue)
7115254f796bSMatt Gates {
7116254f796bSMatt Gates 	struct ctlr_info *h = queue_to_hba(queue);
7117254f796bSMatt Gates 	u8 q = *(u8 *) queue;
711864670ac8SStephen M. Cameron 	u32 raw_tag;
711964670ac8SStephen M. Cameron 
712064670ac8SStephen M. Cameron 	if (ignore_bogus_interrupt(h))
712164670ac8SStephen M. Cameron 		return IRQ_NONE;
712264670ac8SStephen M. Cameron 
712364670ac8SStephen M. Cameron 	if (interrupt_not_for_us(h))
712464670ac8SStephen M. Cameron 		return IRQ_NONE;
7125a0c12413SStephen M. Cameron 	h->last_intr_timestamp = get_jiffies_64();
712664670ac8SStephen M. Cameron 	while (interrupt_pending(h)) {
7127254f796bSMatt Gates 		raw_tag = get_next_completion(h, q);
712864670ac8SStephen M. Cameron 		while (raw_tag != FIFO_EMPTY)
7129254f796bSMatt Gates 			raw_tag = next_command(h, q);
713064670ac8SStephen M. Cameron 	}
713164670ac8SStephen M. Cameron 	return IRQ_HANDLED;
713264670ac8SStephen M. Cameron }
713364670ac8SStephen M. Cameron 
7134254f796bSMatt Gates static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue)
713564670ac8SStephen M. Cameron {
7136254f796bSMatt Gates 	struct ctlr_info *h = queue_to_hba(queue);
713764670ac8SStephen M. Cameron 	u32 raw_tag;
7138254f796bSMatt Gates 	u8 q = *(u8 *) queue;
713964670ac8SStephen M. Cameron 
714064670ac8SStephen M. Cameron 	if (ignore_bogus_interrupt(h))
714164670ac8SStephen M. Cameron 		return IRQ_NONE;
714264670ac8SStephen M. Cameron 
7143a0c12413SStephen M. Cameron 	h->last_intr_timestamp = get_jiffies_64();
7144254f796bSMatt Gates 	raw_tag = get_next_completion(h, q);
714564670ac8SStephen M. Cameron 	while (raw_tag != FIFO_EMPTY)
7146254f796bSMatt Gates 		raw_tag = next_command(h, q);
714764670ac8SStephen M. Cameron 	return IRQ_HANDLED;
714864670ac8SStephen M. Cameron }
714964670ac8SStephen M. Cameron 
7150254f796bSMatt Gates static irqreturn_t do_hpsa_intr_intx(int irq, void *queue)
7151edd16368SStephen M. Cameron {
7152254f796bSMatt Gates 	struct ctlr_info *h = queue_to_hba((u8 *) queue);
7153303932fdSDon Brace 	u32 raw_tag;
7154254f796bSMatt Gates 	u8 q = *(u8 *) queue;
7155edd16368SStephen M. Cameron 
7156edd16368SStephen M. Cameron 	if (interrupt_not_for_us(h))
7157edd16368SStephen M. Cameron 		return IRQ_NONE;
7158a0c12413SStephen M. Cameron 	h->last_intr_timestamp = get_jiffies_64();
715910f66018SStephen M. Cameron 	while (interrupt_pending(h)) {
7160254f796bSMatt Gates 		raw_tag = get_next_completion(h, q);
716110f66018SStephen M. Cameron 		while (raw_tag != FIFO_EMPTY) {
71621d94f94dSStephen M. Cameron 			process_indexed_cmd(h, raw_tag);
7163254f796bSMatt Gates 			raw_tag = next_command(h, q);
716410f66018SStephen M. Cameron 		}
716510f66018SStephen M. Cameron 	}
716610f66018SStephen M. Cameron 	return IRQ_HANDLED;
716710f66018SStephen M. Cameron }
716810f66018SStephen M. Cameron 
7169254f796bSMatt Gates static irqreturn_t do_hpsa_intr_msi(int irq, void *queue)
717010f66018SStephen M. Cameron {
7171254f796bSMatt Gates 	struct ctlr_info *h = queue_to_hba(queue);
717210f66018SStephen M. Cameron 	u32 raw_tag;
7173254f796bSMatt Gates 	u8 q = *(u8 *) queue;
717410f66018SStephen M. Cameron 
7175a0c12413SStephen M. Cameron 	h->last_intr_timestamp = get_jiffies_64();
7176254f796bSMatt Gates 	raw_tag = get_next_completion(h, q);
7177303932fdSDon Brace 	while (raw_tag != FIFO_EMPTY) {
71781d94f94dSStephen M. Cameron 		process_indexed_cmd(h, raw_tag);
7179254f796bSMatt Gates 		raw_tag = next_command(h, q);
7180edd16368SStephen M. Cameron 	}
7181edd16368SStephen M. Cameron 	return IRQ_HANDLED;
7182edd16368SStephen M. Cameron }
7183edd16368SStephen M. Cameron 
7184a9a3a273SStephen M. Cameron /* Send a message CDB to the firmware. Careful, this only works
7185a9a3a273SStephen M. Cameron  * in simple mode, not performant mode due to the tag lookup.
7186a9a3a273SStephen M. Cameron  * We only ever use this immediately after a controller reset.
7187a9a3a273SStephen M. Cameron  */
71886f039790SGreg Kroah-Hartman static int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
7189edd16368SStephen M. Cameron 			unsigned char type)
7190edd16368SStephen M. Cameron {
7191edd16368SStephen M. Cameron 	struct Command {
7192edd16368SStephen M. Cameron 		struct CommandListHeader CommandHeader;
7193edd16368SStephen M. Cameron 		struct RequestBlock Request;
7194edd16368SStephen M. Cameron 		struct ErrDescriptor ErrorDescriptor;
7195edd16368SStephen M. Cameron 	};
7196edd16368SStephen M. Cameron 	struct Command *cmd;
7197edd16368SStephen M. Cameron 	static const size_t cmd_sz = sizeof(*cmd) +
7198edd16368SStephen M. Cameron 					sizeof(cmd->ErrorDescriptor);
7199edd16368SStephen M. Cameron 	dma_addr_t paddr64;
72002b08b3e9SDon Brace 	__le32 paddr32;
72012b08b3e9SDon Brace 	u32 tag;
7202edd16368SStephen M. Cameron 	void __iomem *vaddr;
7203edd16368SStephen M. Cameron 	int i, err;
7204edd16368SStephen M. Cameron 
7205edd16368SStephen M. Cameron 	vaddr = pci_ioremap_bar(pdev, 0);
7206edd16368SStephen M. Cameron 	if (vaddr == NULL)
7207edd16368SStephen M. Cameron 		return -ENOMEM;
7208edd16368SStephen M. Cameron 
7209edd16368SStephen M. Cameron 	/* The Inbound Post Queue only accepts 32-bit physical addresses for the
7210edd16368SStephen M. Cameron 	 * CCISS commands, so they must be allocated from the lower 4GiB of
7211edd16368SStephen M. Cameron 	 * memory.
7212edd16368SStephen M. Cameron 	 */
7213edd16368SStephen M. Cameron 	err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
7214edd16368SStephen M. Cameron 	if (err) {
7215edd16368SStephen M. Cameron 		iounmap(vaddr);
72161eaec8f3SRobert Elliott 		return err;
7217edd16368SStephen M. Cameron 	}
7218edd16368SStephen M. Cameron 
7219edd16368SStephen M. Cameron 	cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
7220edd16368SStephen M. Cameron 	if (cmd == NULL) {
7221edd16368SStephen M. Cameron 		iounmap(vaddr);
7222edd16368SStephen M. Cameron 		return -ENOMEM;
7223edd16368SStephen M. Cameron 	}
7224edd16368SStephen M. Cameron 
7225edd16368SStephen M. Cameron 	/* This must fit, because of the 32-bit consistent DMA mask.  Also,
7226edd16368SStephen M. Cameron 	 * although there's no guarantee, we assume that the address is at
7227edd16368SStephen M. Cameron 	 * least 4-byte aligned (most likely, it's page-aligned).
7228edd16368SStephen M. Cameron 	 */
72292b08b3e9SDon Brace 	paddr32 = cpu_to_le32(paddr64);
7230edd16368SStephen M. Cameron 
7231edd16368SStephen M. Cameron 	cmd->CommandHeader.ReplyQueue = 0;
7232edd16368SStephen M. Cameron 	cmd->CommandHeader.SGList = 0;
723350a0decfSStephen M. Cameron 	cmd->CommandHeader.SGTotal = cpu_to_le16(0);
72342b08b3e9SDon Brace 	cmd->CommandHeader.tag = cpu_to_le64(paddr64);
7235edd16368SStephen M. Cameron 	memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
7236edd16368SStephen M. Cameron 
7237edd16368SStephen M. Cameron 	cmd->Request.CDBLen = 16;
7238a505b86fSStephen M. Cameron 	cmd->Request.type_attr_dir =
7239a505b86fSStephen M. Cameron 			TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE);
7240edd16368SStephen M. Cameron 	cmd->Request.Timeout = 0; /* Don't time out */
7241edd16368SStephen M. Cameron 	cmd->Request.CDB[0] = opcode;
7242edd16368SStephen M. Cameron 	cmd->Request.CDB[1] = type;
7243edd16368SStephen M. Cameron 	memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
724450a0decfSStephen M. Cameron 	cmd->ErrorDescriptor.Addr =
72452b08b3e9SDon Brace 			cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd)));
724650a0decfSStephen M. Cameron 	cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo));
7247edd16368SStephen M. Cameron 
72482b08b3e9SDon Brace 	writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET);
7249edd16368SStephen M. Cameron 
7250edd16368SStephen M. Cameron 	for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
7251edd16368SStephen M. Cameron 		tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
72522b08b3e9SDon Brace 		if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64)
7253edd16368SStephen M. Cameron 			break;
7254edd16368SStephen M. Cameron 		msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
7255edd16368SStephen M. Cameron 	}
7256edd16368SStephen M. Cameron 
7257edd16368SStephen M. Cameron 	iounmap(vaddr);
7258edd16368SStephen M. Cameron 
7259edd16368SStephen M. Cameron 	/* we leak the DMA buffer here ... no choice since the controller could
7260edd16368SStephen M. Cameron 	 *  still complete the command.
7261edd16368SStephen M. Cameron 	 */
7262edd16368SStephen M. Cameron 	if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
7263edd16368SStephen M. Cameron 		dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
7264edd16368SStephen M. Cameron 			opcode, type);
7265edd16368SStephen M. Cameron 		return -ETIMEDOUT;
7266edd16368SStephen M. Cameron 	}
7267edd16368SStephen M. Cameron 
7268edd16368SStephen M. Cameron 	pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
7269edd16368SStephen M. Cameron 
7270edd16368SStephen M. Cameron 	if (tag & HPSA_ERROR_BIT) {
7271edd16368SStephen M. Cameron 		dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
7272edd16368SStephen M. Cameron 			opcode, type);
7273edd16368SStephen M. Cameron 		return -EIO;
7274edd16368SStephen M. Cameron 	}
7275edd16368SStephen M. Cameron 
7276edd16368SStephen M. Cameron 	dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
7277edd16368SStephen M. Cameron 		opcode, type);
7278edd16368SStephen M. Cameron 	return 0;
7279edd16368SStephen M. Cameron }
7280edd16368SStephen M. Cameron 
7281edd16368SStephen M. Cameron #define hpsa_noop(p) hpsa_message(p, 3, 0)
7282edd16368SStephen M. Cameron 
72831df8552aSStephen M. Cameron static int hpsa_controller_hard_reset(struct pci_dev *pdev,
728442a91641SDon Brace 	void __iomem *vaddr, u32 use_doorbell)
7285edd16368SStephen M. Cameron {
7286edd16368SStephen M. Cameron 
72871df8552aSStephen M. Cameron 	if (use_doorbell) {
72881df8552aSStephen M. Cameron 		/* For everything after the P600, the PCI power state method
72891df8552aSStephen M. Cameron 		 * of resetting the controller doesn't work, so we have this
72901df8552aSStephen M. Cameron 		 * other way using the doorbell register.
7291edd16368SStephen M. Cameron 		 */
72921df8552aSStephen M. Cameron 		dev_info(&pdev->dev, "using doorbell to reset controller\n");
7293cf0b08d0SStephen M. Cameron 		writel(use_doorbell, vaddr + SA5_DOORBELL);
729485009239SStephen M. Cameron 
729500701a96SJustin Lindley 		/* PMC hardware guys tell us we need a 10 second delay after
729685009239SStephen M. Cameron 		 * doorbell reset and before any attempt to talk to the board
729785009239SStephen M. Cameron 		 * at all to ensure that this actually works and doesn't fall
729885009239SStephen M. Cameron 		 * over in some weird corner cases.
729985009239SStephen M. Cameron 		 */
730000701a96SJustin Lindley 		msleep(10000);
73011df8552aSStephen M. Cameron 	} else { /* Try to do it the PCI power state way */
7302edd16368SStephen M. Cameron 
7303edd16368SStephen M. Cameron 		/* Quoting from the Open CISS Specification: "The Power
7304edd16368SStephen M. Cameron 		 * Management Control/Status Register (CSR) controls the power
7305edd16368SStephen M. Cameron 		 * state of the device.  The normal operating state is D0,
7306edd16368SStephen M. Cameron 		 * CSR=00h.  The software off state is D3, CSR=03h.  To reset
73071df8552aSStephen M. Cameron 		 * the controller, place the interface device in D3 then to D0,
73081df8552aSStephen M. Cameron 		 * this causes a secondary PCI reset which will reset the
73091df8552aSStephen M. Cameron 		 * controller." */
7310edd16368SStephen M. Cameron 
73112662cab8SDon Brace 		int rc = 0;
73122662cab8SDon Brace 
73131df8552aSStephen M. Cameron 		dev_info(&pdev->dev, "using PCI PM to reset controller\n");
73142662cab8SDon Brace 
7315edd16368SStephen M. Cameron 		/* enter the D3hot power management state */
73162662cab8SDon Brace 		rc = pci_set_power_state(pdev, PCI_D3hot);
73172662cab8SDon Brace 		if (rc)
73182662cab8SDon Brace 			return rc;
7319edd16368SStephen M. Cameron 
7320edd16368SStephen M. Cameron 		msleep(500);
7321edd16368SStephen M. Cameron 
7322edd16368SStephen M. Cameron 		/* enter the D0 power management state */
73232662cab8SDon Brace 		rc = pci_set_power_state(pdev, PCI_D0);
73242662cab8SDon Brace 		if (rc)
73252662cab8SDon Brace 			return rc;
7326c4853efeSMike Miller 
7327c4853efeSMike Miller 		/*
7328c4853efeSMike Miller 		 * The P600 requires a small delay when changing states.
7329c4853efeSMike Miller 		 * Otherwise we may think the board did not reset and we bail.
7330c4853efeSMike Miller 		 * This for kdump only and is particular to the P600.
7331c4853efeSMike Miller 		 */
7332c4853efeSMike Miller 		msleep(500);
73331df8552aSStephen M. Cameron 	}
73341df8552aSStephen M. Cameron 	return 0;
73351df8552aSStephen M. Cameron }
73361df8552aSStephen M. Cameron 
73376f039790SGreg Kroah-Hartman static void init_driver_version(char *driver_version, int len)
7338580ada3cSStephen M. Cameron {
7339580ada3cSStephen M. Cameron 	memset(driver_version, 0, len);
7340f79cfec6SStephen M. Cameron 	strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1);
7341580ada3cSStephen M. Cameron }
7342580ada3cSStephen M. Cameron 
73436f039790SGreg Kroah-Hartman static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable)
7344580ada3cSStephen M. Cameron {
7345580ada3cSStephen M. Cameron 	char *driver_version;
7346580ada3cSStephen M. Cameron 	int i, size = sizeof(cfgtable->driver_version);
7347580ada3cSStephen M. Cameron 
7348580ada3cSStephen M. Cameron 	driver_version = kmalloc(size, GFP_KERNEL);
7349580ada3cSStephen M. Cameron 	if (!driver_version)
7350580ada3cSStephen M. Cameron 		return -ENOMEM;
7351580ada3cSStephen M. Cameron 
7352580ada3cSStephen M. Cameron 	init_driver_version(driver_version, size);
7353580ada3cSStephen M. Cameron 	for (i = 0; i < size; i++)
7354580ada3cSStephen M. Cameron 		writeb(driver_version[i], &cfgtable->driver_version[i]);
7355580ada3cSStephen M. Cameron 	kfree(driver_version);
7356580ada3cSStephen M. Cameron 	return 0;
7357580ada3cSStephen M. Cameron }
7358580ada3cSStephen M. Cameron 
73596f039790SGreg Kroah-Hartman static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable,
73606f039790SGreg Kroah-Hartman 					  unsigned char *driver_ver)
7361580ada3cSStephen M. Cameron {
7362580ada3cSStephen M. Cameron 	int i;
7363580ada3cSStephen M. Cameron 
7364580ada3cSStephen M. Cameron 	for (i = 0; i < sizeof(cfgtable->driver_version); i++)
7365580ada3cSStephen M. Cameron 		driver_ver[i] = readb(&cfgtable->driver_version[i]);
7366580ada3cSStephen M. Cameron }
7367580ada3cSStephen M. Cameron 
73686f039790SGreg Kroah-Hartman static int controller_reset_failed(struct CfgTable __iomem *cfgtable)
7369580ada3cSStephen M. Cameron {
7370580ada3cSStephen M. Cameron 
7371580ada3cSStephen M. Cameron 	char *driver_ver, *old_driver_ver;
7372580ada3cSStephen M. Cameron 	int rc, size = sizeof(cfgtable->driver_version);
7373580ada3cSStephen M. Cameron 
7374580ada3cSStephen M. Cameron 	old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
7375580ada3cSStephen M. Cameron 	if (!old_driver_ver)
7376580ada3cSStephen M. Cameron 		return -ENOMEM;
7377580ada3cSStephen M. Cameron 	driver_ver = old_driver_ver + size;
7378580ada3cSStephen M. Cameron 
7379580ada3cSStephen M. Cameron 	/* After a reset, the 32 bytes of "driver version" in the cfgtable
7380580ada3cSStephen M. Cameron 	 * should have been changed, otherwise we know the reset failed.
7381580ada3cSStephen M. Cameron 	 */
7382580ada3cSStephen M. Cameron 	init_driver_version(old_driver_ver, size);
7383580ada3cSStephen M. Cameron 	read_driver_ver_from_cfgtable(cfgtable, driver_ver);
7384580ada3cSStephen M. Cameron 	rc = !memcmp(driver_ver, old_driver_ver, size);
7385580ada3cSStephen M. Cameron 	kfree(old_driver_ver);
7386580ada3cSStephen M. Cameron 	return rc;
7387580ada3cSStephen M. Cameron }
73881df8552aSStephen M. Cameron /* This does a hard reset of the controller using PCI power management
73891df8552aSStephen M. Cameron  * states or the using the doorbell register.
73901df8552aSStephen M. Cameron  */
73916b6c1cd7STomas Henzl static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id)
73921df8552aSStephen M. Cameron {
73931df8552aSStephen M. Cameron 	u64 cfg_offset;
73941df8552aSStephen M. Cameron 	u32 cfg_base_addr;
73951df8552aSStephen M. Cameron 	u64 cfg_base_addr_index;
73961df8552aSStephen M. Cameron 	void __iomem *vaddr;
73971df8552aSStephen M. Cameron 	unsigned long paddr;
7398580ada3cSStephen M. Cameron 	u32 misc_fw_support;
7399270d05deSStephen M. Cameron 	int rc;
74001df8552aSStephen M. Cameron 	struct CfgTable __iomem *cfgtable;
7401cf0b08d0SStephen M. Cameron 	u32 use_doorbell;
7402270d05deSStephen M. Cameron 	u16 command_register;
74031df8552aSStephen M. Cameron 
74041df8552aSStephen M. Cameron 	/* For controllers as old as the P600, this is very nearly
74051df8552aSStephen M. Cameron 	 * the same thing as
74061df8552aSStephen M. Cameron 	 *
74071df8552aSStephen M. Cameron 	 * pci_save_state(pci_dev);
74081df8552aSStephen M. Cameron 	 * pci_set_power_state(pci_dev, PCI_D3hot);
74091df8552aSStephen M. Cameron 	 * pci_set_power_state(pci_dev, PCI_D0);
74101df8552aSStephen M. Cameron 	 * pci_restore_state(pci_dev);
74111df8552aSStephen M. Cameron 	 *
74121df8552aSStephen M. Cameron 	 * For controllers newer than the P600, the pci power state
74131df8552aSStephen M. Cameron 	 * method of resetting doesn't work so we have another way
74141df8552aSStephen M. Cameron 	 * using the doorbell register.
74151df8552aSStephen M. Cameron 	 */
741618867659SStephen M. Cameron 
741760f923b9SRobert Elliott 	if (!ctlr_is_resettable(board_id)) {
741860f923b9SRobert Elliott 		dev_warn(&pdev->dev, "Controller not resettable\n");
741925c1e56aSStephen M. Cameron 		return -ENODEV;
742025c1e56aSStephen M. Cameron 	}
742146380786SStephen M. Cameron 
742246380786SStephen M. Cameron 	/* if controller is soft- but not hard resettable... */
742346380786SStephen M. Cameron 	if (!ctlr_is_hard_resettable(board_id))
742446380786SStephen M. Cameron 		return -ENOTSUPP; /* try soft reset later. */
742518867659SStephen M. Cameron 
7426270d05deSStephen M. Cameron 	/* Save the PCI command register */
7427270d05deSStephen M. Cameron 	pci_read_config_word(pdev, 4, &command_register);
7428270d05deSStephen M. Cameron 	pci_save_state(pdev);
74291df8552aSStephen M. Cameron 
74301df8552aSStephen M. Cameron 	/* find the first memory BAR, so we can find the cfg table */
74311df8552aSStephen M. Cameron 	rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
74321df8552aSStephen M. Cameron 	if (rc)
74331df8552aSStephen M. Cameron 		return rc;
74341df8552aSStephen M. Cameron 	vaddr = remap_pci_mem(paddr, 0x250);
74351df8552aSStephen M. Cameron 	if (!vaddr)
74361df8552aSStephen M. Cameron 		return -ENOMEM;
74371df8552aSStephen M. Cameron 
74381df8552aSStephen M. Cameron 	/* find cfgtable in order to check if reset via doorbell is supported */
74391df8552aSStephen M. Cameron 	rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
74401df8552aSStephen M. Cameron 					&cfg_base_addr_index, &cfg_offset);
74411df8552aSStephen M. Cameron 	if (rc)
74421df8552aSStephen M. Cameron 		goto unmap_vaddr;
74431df8552aSStephen M. Cameron 	cfgtable = remap_pci_mem(pci_resource_start(pdev,
74441df8552aSStephen M. Cameron 		       cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
74451df8552aSStephen M. Cameron 	if (!cfgtable) {
74461df8552aSStephen M. Cameron 		rc = -ENOMEM;
74471df8552aSStephen M. Cameron 		goto unmap_vaddr;
74481df8552aSStephen M. Cameron 	}
7449580ada3cSStephen M. Cameron 	rc = write_driver_ver_to_cfgtable(cfgtable);
7450580ada3cSStephen M. Cameron 	if (rc)
745103741d95STomas Henzl 		goto unmap_cfgtable;
74521df8552aSStephen M. Cameron 
7453cf0b08d0SStephen M. Cameron 	/* If reset via doorbell register is supported, use that.
7454cf0b08d0SStephen M. Cameron 	 * There are two such methods.  Favor the newest method.
7455cf0b08d0SStephen M. Cameron 	 */
74561df8552aSStephen M. Cameron 	misc_fw_support = readl(&cfgtable->misc_fw_support);
7457cf0b08d0SStephen M. Cameron 	use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
7458cf0b08d0SStephen M. Cameron 	if (use_doorbell) {
7459cf0b08d0SStephen M. Cameron 		use_doorbell = DOORBELL_CTLR_RESET2;
7460cf0b08d0SStephen M. Cameron 	} else {
74611df8552aSStephen M. Cameron 		use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
7462cf0b08d0SStephen M. Cameron 		if (use_doorbell) {
7463050f7147SStephen Cameron 			dev_warn(&pdev->dev,
7464050f7147SStephen Cameron 				"Soft reset not supported. Firmware update is required.\n");
746564670ac8SStephen M. Cameron 			rc = -ENOTSUPP; /* try soft reset */
7466cf0b08d0SStephen M. Cameron 			goto unmap_cfgtable;
7467cf0b08d0SStephen M. Cameron 		}
7468cf0b08d0SStephen M. Cameron 	}
74691df8552aSStephen M. Cameron 
74701df8552aSStephen M. Cameron 	rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
74711df8552aSStephen M. Cameron 	if (rc)
74721df8552aSStephen M. Cameron 		goto unmap_cfgtable;
7473edd16368SStephen M. Cameron 
7474270d05deSStephen M. Cameron 	pci_restore_state(pdev);
7475270d05deSStephen M. Cameron 	pci_write_config_word(pdev, 4, command_register);
7476edd16368SStephen M. Cameron 
74771df8552aSStephen M. Cameron 	/* Some devices (notably the HP Smart Array 5i Controller)
74781df8552aSStephen M. Cameron 	   need a little pause here */
74791df8552aSStephen M. Cameron 	msleep(HPSA_POST_RESET_PAUSE_MSECS);
74801df8552aSStephen M. Cameron 
7481fe5389c8SStephen M. Cameron 	rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
7482fe5389c8SStephen M. Cameron 	if (rc) {
7483fe5389c8SStephen M. Cameron 		dev_warn(&pdev->dev,
7484050f7147SStephen Cameron 			"Failed waiting for board to become ready after hard reset\n");
7485fe5389c8SStephen M. Cameron 		goto unmap_cfgtable;
7486fe5389c8SStephen M. Cameron 	}
7487fe5389c8SStephen M. Cameron 
7488580ada3cSStephen M. Cameron 	rc = controller_reset_failed(vaddr);
7489580ada3cSStephen M. Cameron 	if (rc < 0)
7490580ada3cSStephen M. Cameron 		goto unmap_cfgtable;
7491580ada3cSStephen M. Cameron 	if (rc) {
749264670ac8SStephen M. Cameron 		dev_warn(&pdev->dev, "Unable to successfully reset "
749364670ac8SStephen M. Cameron 			"controller. Will try soft reset.\n");
749464670ac8SStephen M. Cameron 		rc = -ENOTSUPP;
7495580ada3cSStephen M. Cameron 	} else {
749664670ac8SStephen M. Cameron 		dev_info(&pdev->dev, "board ready after hard reset.\n");
74971df8552aSStephen M. Cameron 	}
74981df8552aSStephen M. Cameron 
74991df8552aSStephen M. Cameron unmap_cfgtable:
75001df8552aSStephen M. Cameron 	iounmap(cfgtable);
75011df8552aSStephen M. Cameron 
75021df8552aSStephen M. Cameron unmap_vaddr:
75031df8552aSStephen M. Cameron 	iounmap(vaddr);
75041df8552aSStephen M. Cameron 	return rc;
7505edd16368SStephen M. Cameron }
7506edd16368SStephen M. Cameron 
7507edd16368SStephen M. Cameron /*
7508edd16368SStephen M. Cameron  *  We cannot read the structure directly, for portability we must use
7509edd16368SStephen M. Cameron  *   the io functions.
7510edd16368SStephen M. Cameron  *   This is for debug only.
7511edd16368SStephen M. Cameron  */
751242a91641SDon Brace static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb)
7513edd16368SStephen M. Cameron {
751458f8665cSStephen M. Cameron #ifdef HPSA_DEBUG
7515edd16368SStephen M. Cameron 	int i;
7516edd16368SStephen M. Cameron 	char temp_name[17];
7517edd16368SStephen M. Cameron 
7518edd16368SStephen M. Cameron 	dev_info(dev, "Controller Configuration information\n");
7519edd16368SStephen M. Cameron 	dev_info(dev, "------------------------------------\n");
7520edd16368SStephen M. Cameron 	for (i = 0; i < 4; i++)
7521edd16368SStephen M. Cameron 		temp_name[i] = readb(&(tb->Signature[i]));
7522edd16368SStephen M. Cameron 	temp_name[4] = '\0';
7523edd16368SStephen M. Cameron 	dev_info(dev, "   Signature = %s\n", temp_name);
7524edd16368SStephen M. Cameron 	dev_info(dev, "   Spec Number = %d\n", readl(&(tb->SpecValence)));
7525edd16368SStephen M. Cameron 	dev_info(dev, "   Transport methods supported = 0x%x\n",
7526edd16368SStephen M. Cameron 	       readl(&(tb->TransportSupport)));
7527edd16368SStephen M. Cameron 	dev_info(dev, "   Transport methods active = 0x%x\n",
7528edd16368SStephen M. Cameron 	       readl(&(tb->TransportActive)));
7529edd16368SStephen M. Cameron 	dev_info(dev, "   Requested transport Method = 0x%x\n",
7530edd16368SStephen M. Cameron 	       readl(&(tb->HostWrite.TransportRequest)));
7531edd16368SStephen M. Cameron 	dev_info(dev, "   Coalesce Interrupt Delay = 0x%x\n",
7532edd16368SStephen M. Cameron 	       readl(&(tb->HostWrite.CoalIntDelay)));
7533edd16368SStephen M. Cameron 	dev_info(dev, "   Coalesce Interrupt Count = 0x%x\n",
7534edd16368SStephen M. Cameron 	       readl(&(tb->HostWrite.CoalIntCount)));
753569d6e33dSRobert Elliott 	dev_info(dev, "   Max outstanding commands = %d\n",
7536edd16368SStephen M. Cameron 	       readl(&(tb->CmdsOutMax)));
7537edd16368SStephen M. Cameron 	dev_info(dev, "   Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
7538edd16368SStephen M. Cameron 	for (i = 0; i < 16; i++)
7539edd16368SStephen M. Cameron 		temp_name[i] = readb(&(tb->ServerName[i]));
7540edd16368SStephen M. Cameron 	temp_name[16] = '\0';
7541edd16368SStephen M. Cameron 	dev_info(dev, "   Server Name = %s\n", temp_name);
7542edd16368SStephen M. Cameron 	dev_info(dev, "   Heartbeat Counter = 0x%x\n\n\n",
7543edd16368SStephen M. Cameron 		readl(&(tb->HeartBeat)));
7544edd16368SStephen M. Cameron #endif				/* HPSA_DEBUG */
754558f8665cSStephen M. Cameron }
7546edd16368SStephen M. Cameron 
7547edd16368SStephen M. Cameron static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
7548edd16368SStephen M. Cameron {
7549edd16368SStephen M. Cameron 	int i, offset, mem_type, bar_type;
7550edd16368SStephen M. Cameron 
7551edd16368SStephen M. Cameron 	if (pci_bar_addr == PCI_BASE_ADDRESS_0)	/* looking for BAR zero? */
7552edd16368SStephen M. Cameron 		return 0;
7553edd16368SStephen M. Cameron 	offset = 0;
7554edd16368SStephen M. Cameron 	for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
7555edd16368SStephen M. Cameron 		bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
7556edd16368SStephen M. Cameron 		if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
7557edd16368SStephen M. Cameron 			offset += 4;
7558edd16368SStephen M. Cameron 		else {
7559edd16368SStephen M. Cameron 			mem_type = pci_resource_flags(pdev, i) &
7560edd16368SStephen M. Cameron 			    PCI_BASE_ADDRESS_MEM_TYPE_MASK;
7561edd16368SStephen M. Cameron 			switch (mem_type) {
7562edd16368SStephen M. Cameron 			case PCI_BASE_ADDRESS_MEM_TYPE_32:
7563edd16368SStephen M. Cameron 			case PCI_BASE_ADDRESS_MEM_TYPE_1M:
7564edd16368SStephen M. Cameron 				offset += 4;	/* 32 bit */
7565edd16368SStephen M. Cameron 				break;
7566edd16368SStephen M. Cameron 			case PCI_BASE_ADDRESS_MEM_TYPE_64:
7567edd16368SStephen M. Cameron 				offset += 8;
7568edd16368SStephen M. Cameron 				break;
7569edd16368SStephen M. Cameron 			default:	/* reserved in PCI 2.2 */
7570edd16368SStephen M. Cameron 				dev_warn(&pdev->dev,
7571edd16368SStephen M. Cameron 				       "base address is invalid\n");
7572edd16368SStephen M. Cameron 				return -1;
7573edd16368SStephen M. Cameron 				break;
7574edd16368SStephen M. Cameron 			}
7575edd16368SStephen M. Cameron 		}
7576edd16368SStephen M. Cameron 		if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
7577edd16368SStephen M. Cameron 			return i + 1;
7578edd16368SStephen M. Cameron 	}
7579edd16368SStephen M. Cameron 	return -1;
7580edd16368SStephen M. Cameron }
7581edd16368SStephen M. Cameron 
7582cc64c817SRobert Elliott static void hpsa_disable_interrupt_mode(struct ctlr_info *h)
7583cc64c817SRobert Elliott {
7584cc64c817SRobert Elliott 	if (h->msix_vector) {
7585cc64c817SRobert Elliott 		if (h->pdev->msix_enabled)
7586cc64c817SRobert Elliott 			pci_disable_msix(h->pdev);
7587105a3dbcSRobert Elliott 		h->msix_vector = 0;
7588cc64c817SRobert Elliott 	} else if (h->msi_vector) {
7589cc64c817SRobert Elliott 		if (h->pdev->msi_enabled)
7590cc64c817SRobert Elliott 			pci_disable_msi(h->pdev);
7591105a3dbcSRobert Elliott 		h->msi_vector = 0;
7592cc64c817SRobert Elliott 	}
7593cc64c817SRobert Elliott }
7594cc64c817SRobert Elliott 
7595edd16368SStephen M. Cameron /* If MSI/MSI-X is supported by the kernel we will try to enable it on
7596050f7147SStephen Cameron  * controllers that are capable. If not, we use legacy INTx mode.
7597edd16368SStephen M. Cameron  */
75986f039790SGreg Kroah-Hartman static void hpsa_interrupt_mode(struct ctlr_info *h)
7599edd16368SStephen M. Cameron {
7600edd16368SStephen M. Cameron #ifdef CONFIG_PCI_MSI
7601254f796bSMatt Gates 	int err, i;
7602254f796bSMatt Gates 	struct msix_entry hpsa_msix_entries[MAX_REPLY_QUEUES];
7603254f796bSMatt Gates 
7604254f796bSMatt Gates 	for (i = 0; i < MAX_REPLY_QUEUES; i++) {
7605254f796bSMatt Gates 		hpsa_msix_entries[i].vector = 0;
7606254f796bSMatt Gates 		hpsa_msix_entries[i].entry = i;
7607254f796bSMatt Gates 	}
7608edd16368SStephen M. Cameron 
7609edd16368SStephen M. Cameron 	/* Some boards advertise MSI but don't really support it */
76106b3f4c52SStephen M. Cameron 	if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
76116b3f4c52SStephen M. Cameron 	    (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
7612edd16368SStephen M. Cameron 		goto default_int_mode;
761355c06c71SStephen M. Cameron 	if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
7614050f7147SStephen Cameron 		dev_info(&h->pdev->dev, "MSI-X capable controller\n");
7615eee0f03aSHannes Reinecke 		h->msix_vector = MAX_REPLY_QUEUES;
7616f89439bcSStephen M. Cameron 		if (h->msix_vector > num_online_cpus())
7617f89439bcSStephen M. Cameron 			h->msix_vector = num_online_cpus();
761818fce3c4SAlexander Gordeev 		err = pci_enable_msix_range(h->pdev, hpsa_msix_entries,
761918fce3c4SAlexander Gordeev 					    1, h->msix_vector);
762018fce3c4SAlexander Gordeev 		if (err < 0) {
762118fce3c4SAlexander Gordeev 			dev_warn(&h->pdev->dev, "MSI-X init failed %d\n", err);
762218fce3c4SAlexander Gordeev 			h->msix_vector = 0;
762318fce3c4SAlexander Gordeev 			goto single_msi_mode;
762418fce3c4SAlexander Gordeev 		} else if (err < h->msix_vector) {
762555c06c71SStephen M. Cameron 			dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
7626edd16368SStephen M. Cameron 			       "available\n", err);
7627eee0f03aSHannes Reinecke 		}
762818fce3c4SAlexander Gordeev 		h->msix_vector = err;
7629eee0f03aSHannes Reinecke 		for (i = 0; i < h->msix_vector; i++)
7630eee0f03aSHannes Reinecke 			h->intr[i] = hpsa_msix_entries[i].vector;
7631eee0f03aSHannes Reinecke 		return;
7632edd16368SStephen M. Cameron 	}
763318fce3c4SAlexander Gordeev single_msi_mode:
763455c06c71SStephen M. Cameron 	if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
7635050f7147SStephen Cameron 		dev_info(&h->pdev->dev, "MSI capable controller\n");
763655c06c71SStephen M. Cameron 		if (!pci_enable_msi(h->pdev))
7637edd16368SStephen M. Cameron 			h->msi_vector = 1;
7638edd16368SStephen M. Cameron 		else
763955c06c71SStephen M. Cameron 			dev_warn(&h->pdev->dev, "MSI init failed\n");
7640edd16368SStephen M. Cameron 	}
7641edd16368SStephen M. Cameron default_int_mode:
7642edd16368SStephen M. Cameron #endif				/* CONFIG_PCI_MSI */
7643edd16368SStephen M. Cameron 	/* if we get here we're going to use the default interrupt mode */
7644a9a3a273SStephen M. Cameron 	h->intr[h->intr_mode] = h->pdev->irq;
7645edd16368SStephen M. Cameron }
7646edd16368SStephen M. Cameron 
76476f039790SGreg Kroah-Hartman static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
7648e5c880d1SStephen M. Cameron {
7649e5c880d1SStephen M. Cameron 	int i;
7650e5c880d1SStephen M. Cameron 	u32 subsystem_vendor_id, subsystem_device_id;
7651e5c880d1SStephen M. Cameron 
7652e5c880d1SStephen M. Cameron 	subsystem_vendor_id = pdev->subsystem_vendor;
7653e5c880d1SStephen M. Cameron 	subsystem_device_id = pdev->subsystem_device;
7654e5c880d1SStephen M. Cameron 	*board_id = ((subsystem_device_id << 16) & 0xffff0000) |
7655e5c880d1SStephen M. Cameron 		    subsystem_vendor_id;
7656e5c880d1SStephen M. Cameron 
7657e5c880d1SStephen M. Cameron 	for (i = 0; i < ARRAY_SIZE(products); i++)
7658e5c880d1SStephen M. Cameron 		if (*board_id == products[i].board_id)
7659e5c880d1SStephen M. Cameron 			return i;
7660e5c880d1SStephen M. Cameron 
76616798cc0aSStephen M. Cameron 	if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
76626798cc0aSStephen M. Cameron 		subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
76636798cc0aSStephen M. Cameron 		!hpsa_allow_any) {
7664e5c880d1SStephen M. Cameron 		dev_warn(&pdev->dev, "unrecognized board ID: "
7665e5c880d1SStephen M. Cameron 			"0x%08x, ignoring.\n", *board_id);
7666e5c880d1SStephen M. Cameron 			return -ENODEV;
7667e5c880d1SStephen M. Cameron 	}
7668e5c880d1SStephen M. Cameron 	return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
7669e5c880d1SStephen M. Cameron }
7670e5c880d1SStephen M. Cameron 
76716f039790SGreg Kroah-Hartman static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
76723a7774ceSStephen M. Cameron 				    unsigned long *memory_bar)
76733a7774ceSStephen M. Cameron {
76743a7774ceSStephen M. Cameron 	int i;
76753a7774ceSStephen M. Cameron 
76763a7774ceSStephen M. Cameron 	for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
767712d2cd47SStephen M. Cameron 		if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
76783a7774ceSStephen M. Cameron 			/* addressing mode bits already removed */
767912d2cd47SStephen M. Cameron 			*memory_bar = pci_resource_start(pdev, i);
768012d2cd47SStephen M. Cameron 			dev_dbg(&pdev->dev, "memory BAR = %lx\n",
76813a7774ceSStephen M. Cameron 				*memory_bar);
76823a7774ceSStephen M. Cameron 			return 0;
76833a7774ceSStephen M. Cameron 		}
768412d2cd47SStephen M. Cameron 	dev_warn(&pdev->dev, "no memory BAR found\n");
76853a7774ceSStephen M. Cameron 	return -ENODEV;
76863a7774ceSStephen M. Cameron }
76873a7774ceSStephen M. Cameron 
76886f039790SGreg Kroah-Hartman static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
76896f039790SGreg Kroah-Hartman 				     int wait_for_ready)
76902c4c8c8bSStephen M. Cameron {
7691fe5389c8SStephen M. Cameron 	int i, iterations;
76922c4c8c8bSStephen M. Cameron 	u32 scratchpad;
7693fe5389c8SStephen M. Cameron 	if (wait_for_ready)
7694fe5389c8SStephen M. Cameron 		iterations = HPSA_BOARD_READY_ITERATIONS;
7695fe5389c8SStephen M. Cameron 	else
7696fe5389c8SStephen M. Cameron 		iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
76972c4c8c8bSStephen M. Cameron 
7698fe5389c8SStephen M. Cameron 	for (i = 0; i < iterations; i++) {
7699fe5389c8SStephen M. Cameron 		scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
7700fe5389c8SStephen M. Cameron 		if (wait_for_ready) {
77012c4c8c8bSStephen M. Cameron 			if (scratchpad == HPSA_FIRMWARE_READY)
77022c4c8c8bSStephen M. Cameron 				return 0;
7703fe5389c8SStephen M. Cameron 		} else {
7704fe5389c8SStephen M. Cameron 			if (scratchpad != HPSA_FIRMWARE_READY)
7705fe5389c8SStephen M. Cameron 				return 0;
7706fe5389c8SStephen M. Cameron 		}
77072c4c8c8bSStephen M. Cameron 		msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
77082c4c8c8bSStephen M. Cameron 	}
7709fe5389c8SStephen M. Cameron 	dev_warn(&pdev->dev, "board not ready, timed out.\n");
77102c4c8c8bSStephen M. Cameron 	return -ENODEV;
77112c4c8c8bSStephen M. Cameron }
77122c4c8c8bSStephen M. Cameron 
77136f039790SGreg Kroah-Hartman static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
77146f039790SGreg Kroah-Hartman 			       u32 *cfg_base_addr, u64 *cfg_base_addr_index,
7715a51fd47fSStephen M. Cameron 			       u64 *cfg_offset)
7716a51fd47fSStephen M. Cameron {
7717a51fd47fSStephen M. Cameron 	*cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
7718a51fd47fSStephen M. Cameron 	*cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
7719a51fd47fSStephen M. Cameron 	*cfg_base_addr &= (u32) 0x0000ffff;
7720a51fd47fSStephen M. Cameron 	*cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
7721a51fd47fSStephen M. Cameron 	if (*cfg_base_addr_index == -1) {
7722a51fd47fSStephen M. Cameron 		dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
7723a51fd47fSStephen M. Cameron 		return -ENODEV;
7724a51fd47fSStephen M. Cameron 	}
7725a51fd47fSStephen M. Cameron 	return 0;
7726a51fd47fSStephen M. Cameron }
7727a51fd47fSStephen M. Cameron 
7728195f2c65SRobert Elliott static void hpsa_free_cfgtables(struct ctlr_info *h)
7729195f2c65SRobert Elliott {
7730105a3dbcSRobert Elliott 	if (h->transtable) {
7731195f2c65SRobert Elliott 		iounmap(h->transtable);
7732105a3dbcSRobert Elliott 		h->transtable = NULL;
7733105a3dbcSRobert Elliott 	}
7734105a3dbcSRobert Elliott 	if (h->cfgtable) {
7735195f2c65SRobert Elliott 		iounmap(h->cfgtable);
7736105a3dbcSRobert Elliott 		h->cfgtable = NULL;
7737105a3dbcSRobert Elliott 	}
7738195f2c65SRobert Elliott }
7739195f2c65SRobert Elliott 
7740195f2c65SRobert Elliott /* Find and map CISS config table and transfer table
7741195f2c65SRobert Elliott + * several items must be unmapped (freed) later
7742195f2c65SRobert Elliott + * */
77436f039790SGreg Kroah-Hartman static int hpsa_find_cfgtables(struct ctlr_info *h)
7744edd16368SStephen M. Cameron {
774501a02ffcSStephen M. Cameron 	u64 cfg_offset;
774601a02ffcSStephen M. Cameron 	u32 cfg_base_addr;
774701a02ffcSStephen M. Cameron 	u64 cfg_base_addr_index;
7748303932fdSDon Brace 	u32 trans_offset;
7749a51fd47fSStephen M. Cameron 	int rc;
775077c4495cSStephen M. Cameron 
7751a51fd47fSStephen M. Cameron 	rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
7752a51fd47fSStephen M. Cameron 		&cfg_base_addr_index, &cfg_offset);
7753a51fd47fSStephen M. Cameron 	if (rc)
7754a51fd47fSStephen M. Cameron 		return rc;
775577c4495cSStephen M. Cameron 	h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
7756a51fd47fSStephen M. Cameron 		       cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
7757cd3c81c4SRobert Elliott 	if (!h->cfgtable) {
7758cd3c81c4SRobert Elliott 		dev_err(&h->pdev->dev, "Failed mapping cfgtable\n");
775977c4495cSStephen M. Cameron 		return -ENOMEM;
7760cd3c81c4SRobert Elliott 	}
7761580ada3cSStephen M. Cameron 	rc = write_driver_ver_to_cfgtable(h->cfgtable);
7762580ada3cSStephen M. Cameron 	if (rc)
7763580ada3cSStephen M. Cameron 		return rc;
776477c4495cSStephen M. Cameron 	/* Find performant mode table. */
7765a51fd47fSStephen M. Cameron 	trans_offset = readl(&h->cfgtable->TransMethodOffset);
776677c4495cSStephen M. Cameron 	h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
776777c4495cSStephen M. Cameron 				cfg_base_addr_index)+cfg_offset+trans_offset,
776877c4495cSStephen M. Cameron 				sizeof(*h->transtable));
7769195f2c65SRobert Elliott 	if (!h->transtable) {
7770195f2c65SRobert Elliott 		dev_err(&h->pdev->dev, "Failed mapping transfer table\n");
7771195f2c65SRobert Elliott 		hpsa_free_cfgtables(h);
777277c4495cSStephen M. Cameron 		return -ENOMEM;
7773195f2c65SRobert Elliott 	}
777477c4495cSStephen M. Cameron 	return 0;
777577c4495cSStephen M. Cameron }
777677c4495cSStephen M. Cameron 
77776f039790SGreg Kroah-Hartman static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
7778cba3d38bSStephen M. Cameron {
777941ce4c35SStephen Cameron #define MIN_MAX_COMMANDS 16
778041ce4c35SStephen Cameron 	BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS);
778141ce4c35SStephen Cameron 
778241ce4c35SStephen Cameron 	h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands);
778372ceeaecSStephen M. Cameron 
778472ceeaecSStephen M. Cameron 	/* Limit commands in memory limited kdump scenario. */
778572ceeaecSStephen M. Cameron 	if (reset_devices && h->max_commands > 32)
778672ceeaecSStephen M. Cameron 		h->max_commands = 32;
778772ceeaecSStephen M. Cameron 
778841ce4c35SStephen Cameron 	if (h->max_commands < MIN_MAX_COMMANDS) {
778941ce4c35SStephen Cameron 		dev_warn(&h->pdev->dev,
779041ce4c35SStephen Cameron 			"Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n",
779141ce4c35SStephen Cameron 			h->max_commands,
779241ce4c35SStephen Cameron 			MIN_MAX_COMMANDS);
779341ce4c35SStephen Cameron 		h->max_commands = MIN_MAX_COMMANDS;
7794cba3d38bSStephen M. Cameron 	}
7795cba3d38bSStephen M. Cameron }
7796cba3d38bSStephen M. Cameron 
7797c7ee65b3SWebb Scales /* If the controller reports that the total max sg entries is greater than 512,
7798c7ee65b3SWebb Scales  * then we know that chained SG blocks work.  (Original smart arrays did not
7799c7ee65b3SWebb Scales  * support chained SG blocks and would return zero for max sg entries.)
7800c7ee65b3SWebb Scales  */
7801c7ee65b3SWebb Scales static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h)
7802c7ee65b3SWebb Scales {
7803c7ee65b3SWebb Scales 	return h->maxsgentries > 512;
7804c7ee65b3SWebb Scales }
7805c7ee65b3SWebb Scales 
7806b93d7536SStephen M. Cameron /* Interrogate the hardware for some limits:
7807b93d7536SStephen M. Cameron  * max commands, max SG elements without chaining, and with chaining,
7808b93d7536SStephen M. Cameron  * SG chain block size, etc.
7809b93d7536SStephen M. Cameron  */
78106f039790SGreg Kroah-Hartman static void hpsa_find_board_params(struct ctlr_info *h)
7811b93d7536SStephen M. Cameron {
7812cba3d38bSStephen M. Cameron 	hpsa_get_max_perf_mode_cmds(h);
781345fcb86eSStephen Cameron 	h->nr_cmds = h->max_commands;
7814b93d7536SStephen M. Cameron 	h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
7815283b4a9bSStephen M. Cameron 	h->fw_support = readl(&(h->cfgtable->misc_fw_support));
7816c7ee65b3SWebb Scales 	if (hpsa_supports_chained_sg_blocks(h)) {
7817c7ee65b3SWebb Scales 		/* Limit in-command s/g elements to 32 save dma'able memory. */
7818b93d7536SStephen M. Cameron 		h->max_cmd_sg_entries = 32;
78191a63ea6fSWebb Scales 		h->chainsize = h->maxsgentries - h->max_cmd_sg_entries;
7820b93d7536SStephen M. Cameron 		h->maxsgentries--; /* save one for chain pointer */
7821b93d7536SStephen M. Cameron 	} else {
7822c7ee65b3SWebb Scales 		/*
7823c7ee65b3SWebb Scales 		 * Original smart arrays supported at most 31 s/g entries
7824c7ee65b3SWebb Scales 		 * embedded inline in the command (trying to use more
7825c7ee65b3SWebb Scales 		 * would lock up the controller)
7826c7ee65b3SWebb Scales 		 */
7827c7ee65b3SWebb Scales 		h->max_cmd_sg_entries = 31;
78281a63ea6fSWebb Scales 		h->maxsgentries = 31; /* default to traditional values */
7829c7ee65b3SWebb Scales 		h->chainsize = 0;
7830b93d7536SStephen M. Cameron 	}
783175167d2cSStephen M. Cameron 
783275167d2cSStephen M. Cameron 	/* Find out what task management functions are supported and cache */
783375167d2cSStephen M. Cameron 	h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags));
78340e7a7fceSScott Teel 	if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags))
78350e7a7fceSScott Teel 		dev_warn(&h->pdev->dev, "Physical aborts not supported\n");
78360e7a7fceSScott Teel 	if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
78370e7a7fceSScott Teel 		dev_warn(&h->pdev->dev, "Logical aborts not supported\n");
78388be986ccSStephen Cameron 	if (!(HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags))
78398be986ccSStephen Cameron 		dev_warn(&h->pdev->dev, "HP SSD Smart Path aborts not supported\n");
7840b93d7536SStephen M. Cameron }
7841b93d7536SStephen M. Cameron 
784276c46e49SStephen M. Cameron static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
784376c46e49SStephen M. Cameron {
78440fc9fd40SAkinobu Mita 	if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
7845050f7147SStephen Cameron 		dev_err(&h->pdev->dev, "not a valid CISS config table\n");
784676c46e49SStephen M. Cameron 		return false;
784776c46e49SStephen M. Cameron 	}
784876c46e49SStephen M. Cameron 	return true;
784976c46e49SStephen M. Cameron }
785076c46e49SStephen M. Cameron 
785197a5e98cSStephen M. Cameron static inline void hpsa_set_driver_support_bits(struct ctlr_info *h)
7852f7c39101SStephen M. Cameron {
785397a5e98cSStephen M. Cameron 	u32 driver_support;
7854f7c39101SStephen M. Cameron 
785597a5e98cSStephen M. Cameron 	driver_support = readl(&(h->cfgtable->driver_support));
78560b9e7b74SArnd Bergmann 	/* Need to enable prefetch in the SCSI core for 6400 in x86 */
78570b9e7b74SArnd Bergmann #ifdef CONFIG_X86
785897a5e98cSStephen M. Cameron 	driver_support |= ENABLE_SCSI_PREFETCH;
7859f7c39101SStephen M. Cameron #endif
786028e13446SStephen M. Cameron 	driver_support |= ENABLE_UNIT_ATTN;
786128e13446SStephen M. Cameron 	writel(driver_support, &(h->cfgtable->driver_support));
7862f7c39101SStephen M. Cameron }
7863f7c39101SStephen M. Cameron 
78643d0eab67SStephen M. Cameron /* Disable DMA prefetch for the P600.  Otherwise an ASIC bug may result
78653d0eab67SStephen M. Cameron  * in a prefetch beyond physical memory.
78663d0eab67SStephen M. Cameron  */
78673d0eab67SStephen M. Cameron static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
78683d0eab67SStephen M. Cameron {
78693d0eab67SStephen M. Cameron 	u32 dma_prefetch;
78703d0eab67SStephen M. Cameron 
78713d0eab67SStephen M. Cameron 	if (h->board_id != 0x3225103C)
78723d0eab67SStephen M. Cameron 		return;
78733d0eab67SStephen M. Cameron 	dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
78743d0eab67SStephen M. Cameron 	dma_prefetch |= 0x8000;
78753d0eab67SStephen M. Cameron 	writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
78763d0eab67SStephen M. Cameron }
78773d0eab67SStephen M. Cameron 
7878c706a795SRobert Elliott static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h)
787976438d08SStephen M. Cameron {
788076438d08SStephen M. Cameron 	int i;
788176438d08SStephen M. Cameron 	u32 doorbell_value;
788276438d08SStephen M. Cameron 	unsigned long flags;
788376438d08SStephen M. Cameron 	/* wait until the clear_event_notify bit 6 is cleared by controller. */
7884007e7aa9SRobert Elliott 	for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) {
788576438d08SStephen M. Cameron 		spin_lock_irqsave(&h->lock, flags);
788676438d08SStephen M. Cameron 		doorbell_value = readl(h->vaddr + SA5_DOORBELL);
788776438d08SStephen M. Cameron 		spin_unlock_irqrestore(&h->lock, flags);
788876438d08SStephen M. Cameron 		if (!(doorbell_value & DOORBELL_CLEAR_EVENTS))
7889c706a795SRobert Elliott 			goto done;
789076438d08SStephen M. Cameron 		/* delay and try again */
7891007e7aa9SRobert Elliott 		msleep(CLEAR_EVENT_WAIT_INTERVAL);
789276438d08SStephen M. Cameron 	}
7893c706a795SRobert Elliott 	return -ENODEV;
7894c706a795SRobert Elliott done:
7895c706a795SRobert Elliott 	return 0;
789676438d08SStephen M. Cameron }
789776438d08SStephen M. Cameron 
7898c706a795SRobert Elliott static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
7899eb6b2ae9SStephen M. Cameron {
7900eb6b2ae9SStephen M. Cameron 	int i;
79016eaf46fdSStephen M. Cameron 	u32 doorbell_value;
79026eaf46fdSStephen M. Cameron 	unsigned long flags;
7903eb6b2ae9SStephen M. Cameron 
7904eb6b2ae9SStephen M. Cameron 	/* under certain very rare conditions, this can take awhile.
7905eb6b2ae9SStephen M. Cameron 	 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
7906eb6b2ae9SStephen M. Cameron 	 * as we enter this code.)
7907eb6b2ae9SStephen M. Cameron 	 */
7908007e7aa9SRobert Elliott 	for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) {
790925163bd5SWebb Scales 		if (h->remove_in_progress)
791025163bd5SWebb Scales 			goto done;
79116eaf46fdSStephen M. Cameron 		spin_lock_irqsave(&h->lock, flags);
79126eaf46fdSStephen M. Cameron 		doorbell_value = readl(h->vaddr + SA5_DOORBELL);
79136eaf46fdSStephen M. Cameron 		spin_unlock_irqrestore(&h->lock, flags);
7914382be668SDan Carpenter 		if (!(doorbell_value & CFGTBL_ChangeReq))
7915c706a795SRobert Elliott 			goto done;
7916eb6b2ae9SStephen M. Cameron 		/* delay and try again */
7917007e7aa9SRobert Elliott 		msleep(MODE_CHANGE_WAIT_INTERVAL);
7918eb6b2ae9SStephen M. Cameron 	}
7919c706a795SRobert Elliott 	return -ENODEV;
7920c706a795SRobert Elliott done:
7921c706a795SRobert Elliott 	return 0;
79223f4336f3SStephen M. Cameron }
79233f4336f3SStephen M. Cameron 
7924c706a795SRobert Elliott /* return -ENODEV or other reason on error, 0 on success */
79256f039790SGreg Kroah-Hartman static int hpsa_enter_simple_mode(struct ctlr_info *h)
79263f4336f3SStephen M. Cameron {
79273f4336f3SStephen M. Cameron 	u32 trans_support;
79283f4336f3SStephen M. Cameron 
79293f4336f3SStephen M. Cameron 	trans_support = readl(&(h->cfgtable->TransportSupport));
79303f4336f3SStephen M. Cameron 	if (!(trans_support & SIMPLE_MODE))
79313f4336f3SStephen M. Cameron 		return -ENOTSUPP;
79323f4336f3SStephen M. Cameron 
79333f4336f3SStephen M. Cameron 	h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
7934283b4a9bSStephen M. Cameron 
79353f4336f3SStephen M. Cameron 	/* Update the field, and then ring the doorbell */
79363f4336f3SStephen M. Cameron 	writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
7937b9af4937SStephen M. Cameron 	writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
79383f4336f3SStephen M. Cameron 	writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
7939c706a795SRobert Elliott 	if (hpsa_wait_for_mode_change_ack(h))
7940c706a795SRobert Elliott 		goto error;
7941eb6b2ae9SStephen M. Cameron 	print_cfg_table(&h->pdev->dev, h->cfgtable);
7942283b4a9bSStephen M. Cameron 	if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple))
7943283b4a9bSStephen M. Cameron 		goto error;
7944960a30e7SStephen M. Cameron 	h->transMethod = CFGTBL_Trans_Simple;
7945eb6b2ae9SStephen M. Cameron 	return 0;
7946283b4a9bSStephen M. Cameron error:
7947050f7147SStephen Cameron 	dev_err(&h->pdev->dev, "failed to enter simple mode\n");
7948283b4a9bSStephen M. Cameron 	return -ENODEV;
7949eb6b2ae9SStephen M. Cameron }
7950eb6b2ae9SStephen M. Cameron 
7951195f2c65SRobert Elliott /* free items allocated or mapped by hpsa_pci_init */
7952195f2c65SRobert Elliott static void hpsa_free_pci_init(struct ctlr_info *h)
7953195f2c65SRobert Elliott {
7954195f2c65SRobert Elliott 	hpsa_free_cfgtables(h);			/* pci_init 4 */
7955195f2c65SRobert Elliott 	iounmap(h->vaddr);			/* pci_init 3 */
7956105a3dbcSRobert Elliott 	h->vaddr = NULL;
7957195f2c65SRobert Elliott 	hpsa_disable_interrupt_mode(h);		/* pci_init 2 */
7958943a7021SRobert Elliott 	/*
7959943a7021SRobert Elliott 	 * call pci_disable_device before pci_release_regions per
7960943a7021SRobert Elliott 	 * Documentation/PCI/pci.txt
7961943a7021SRobert Elliott 	 */
7962195f2c65SRobert Elliott 	pci_disable_device(h->pdev);		/* pci_init 1 */
7963943a7021SRobert Elliott 	pci_release_regions(h->pdev);		/* pci_init 2 */
7964195f2c65SRobert Elliott }
7965195f2c65SRobert Elliott 
7966195f2c65SRobert Elliott /* several items must be freed later */
79676f039790SGreg Kroah-Hartman static int hpsa_pci_init(struct ctlr_info *h)
796877c4495cSStephen M. Cameron {
7969eb6b2ae9SStephen M. Cameron 	int prod_index, err;
7970edd16368SStephen M. Cameron 
7971e5c880d1SStephen M. Cameron 	prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
7972e5c880d1SStephen M. Cameron 	if (prod_index < 0)
797360f923b9SRobert Elliott 		return prod_index;
7974e5c880d1SStephen M. Cameron 	h->product_name = products[prod_index].product_name;
7975e5c880d1SStephen M. Cameron 	h->access = *(products[prod_index].access);
7976e5c880d1SStephen M. Cameron 
79779b5c48c2SStephen Cameron 	h->needs_abort_tags_swizzled =
79789b5c48c2SStephen Cameron 		ctlr_needs_abort_tags_swizzled(h->board_id);
79799b5c48c2SStephen Cameron 
7980e5a44df8SMatthew Garrett 	pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
7981e5a44df8SMatthew Garrett 			       PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
7982e5a44df8SMatthew Garrett 
798355c06c71SStephen M. Cameron 	err = pci_enable_device(h->pdev);
7984edd16368SStephen M. Cameron 	if (err) {
7985195f2c65SRobert Elliott 		dev_err(&h->pdev->dev, "failed to enable PCI device\n");
7986943a7021SRobert Elliott 		pci_disable_device(h->pdev);
7987edd16368SStephen M. Cameron 		return err;
7988edd16368SStephen M. Cameron 	}
7989edd16368SStephen M. Cameron 
7990f79cfec6SStephen M. Cameron 	err = pci_request_regions(h->pdev, HPSA);
7991edd16368SStephen M. Cameron 	if (err) {
799255c06c71SStephen M. Cameron 		dev_err(&h->pdev->dev,
7993195f2c65SRobert Elliott 			"failed to obtain PCI resources\n");
7994943a7021SRobert Elliott 		pci_disable_device(h->pdev);
7995943a7021SRobert Elliott 		return err;
7996edd16368SStephen M. Cameron 	}
79974fa604e1SRobert Elliott 
79984fa604e1SRobert Elliott 	pci_set_master(h->pdev);
79994fa604e1SRobert Elliott 
80006b3f4c52SStephen M. Cameron 	hpsa_interrupt_mode(h);
800112d2cd47SStephen M. Cameron 	err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
80023a7774ceSStephen M. Cameron 	if (err)
8003195f2c65SRobert Elliott 		goto clean2;	/* intmode+region, pci */
8004edd16368SStephen M. Cameron 	h->vaddr = remap_pci_mem(h->paddr, 0x250);
8005204892e9SStephen M. Cameron 	if (!h->vaddr) {
8006195f2c65SRobert Elliott 		dev_err(&h->pdev->dev, "failed to remap PCI mem\n");
8007204892e9SStephen M. Cameron 		err = -ENOMEM;
8008195f2c65SRobert Elliott 		goto clean2;	/* intmode+region, pci */
8009204892e9SStephen M. Cameron 	}
8010fe5389c8SStephen M. Cameron 	err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
80112c4c8c8bSStephen M. Cameron 	if (err)
8012195f2c65SRobert Elliott 		goto clean3;	/* vaddr, intmode+region, pci */
801377c4495cSStephen M. Cameron 	err = hpsa_find_cfgtables(h);
801477c4495cSStephen M. Cameron 	if (err)
8015195f2c65SRobert Elliott 		goto clean3;	/* vaddr, intmode+region, pci */
8016b93d7536SStephen M. Cameron 	hpsa_find_board_params(h);
8017edd16368SStephen M. Cameron 
801876c46e49SStephen M. Cameron 	if (!hpsa_CISS_signature_present(h)) {
8019edd16368SStephen M. Cameron 		err = -ENODEV;
8020195f2c65SRobert Elliott 		goto clean4;	/* cfgtables, vaddr, intmode+region, pci */
8021edd16368SStephen M. Cameron 	}
802297a5e98cSStephen M. Cameron 	hpsa_set_driver_support_bits(h);
80233d0eab67SStephen M. Cameron 	hpsa_p600_dma_prefetch_quirk(h);
8024eb6b2ae9SStephen M. Cameron 	err = hpsa_enter_simple_mode(h);
8025eb6b2ae9SStephen M. Cameron 	if (err)
8026195f2c65SRobert Elliott 		goto clean4;	/* cfgtables, vaddr, intmode+region, pci */
8027edd16368SStephen M. Cameron 	return 0;
8028edd16368SStephen M. Cameron 
8029195f2c65SRobert Elliott clean4:	/* cfgtables, vaddr, intmode+region, pci */
8030195f2c65SRobert Elliott 	hpsa_free_cfgtables(h);
8031195f2c65SRobert Elliott clean3:	/* vaddr, intmode+region, pci */
8032204892e9SStephen M. Cameron 	iounmap(h->vaddr);
8033105a3dbcSRobert Elliott 	h->vaddr = NULL;
8034195f2c65SRobert Elliott clean2:	/* intmode+region, pci */
8035195f2c65SRobert Elliott 	hpsa_disable_interrupt_mode(h);
8036943a7021SRobert Elliott 	/*
8037943a7021SRobert Elliott 	 * call pci_disable_device before pci_release_regions per
8038943a7021SRobert Elliott 	 * Documentation/PCI/pci.txt
8039943a7021SRobert Elliott 	 */
8040195f2c65SRobert Elliott 	pci_disable_device(h->pdev);
8041943a7021SRobert Elliott 	pci_release_regions(h->pdev);
8042edd16368SStephen M. Cameron 	return err;
8043edd16368SStephen M. Cameron }
8044edd16368SStephen M. Cameron 
80456f039790SGreg Kroah-Hartman static void hpsa_hba_inquiry(struct ctlr_info *h)
8046339b2b14SStephen M. Cameron {
8047339b2b14SStephen M. Cameron 	int rc;
8048339b2b14SStephen M. Cameron 
8049339b2b14SStephen M. Cameron #define HBA_INQUIRY_BYTE_COUNT 64
8050339b2b14SStephen M. Cameron 	h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
8051339b2b14SStephen M. Cameron 	if (!h->hba_inquiry_data)
8052339b2b14SStephen M. Cameron 		return;
8053339b2b14SStephen M. Cameron 	rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
8054339b2b14SStephen M. Cameron 		h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
8055339b2b14SStephen M. Cameron 	if (rc != 0) {
8056339b2b14SStephen M. Cameron 		kfree(h->hba_inquiry_data);
8057339b2b14SStephen M. Cameron 		h->hba_inquiry_data = NULL;
8058339b2b14SStephen M. Cameron 	}
8059339b2b14SStephen M. Cameron }
8060339b2b14SStephen M. Cameron 
80616b6c1cd7STomas Henzl static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id)
8062edd16368SStephen M. Cameron {
80631df8552aSStephen M. Cameron 	int rc, i;
80643b747298STomas Henzl 	void __iomem *vaddr;
8065edd16368SStephen M. Cameron 
80664c2a8c40SStephen M. Cameron 	if (!reset_devices)
80674c2a8c40SStephen M. Cameron 		return 0;
80684c2a8c40SStephen M. Cameron 
8069132aa220STomas Henzl 	/* kdump kernel is loading, we don't know in which state is
8070132aa220STomas Henzl 	 * the pci interface. The dev->enable_cnt is equal zero
8071132aa220STomas Henzl 	 * so we call enable+disable, wait a while and switch it on.
8072132aa220STomas Henzl 	 */
8073132aa220STomas Henzl 	rc = pci_enable_device(pdev);
8074132aa220STomas Henzl 	if (rc) {
8075132aa220STomas Henzl 		dev_warn(&pdev->dev, "Failed to enable PCI device\n");
8076132aa220STomas Henzl 		return -ENODEV;
8077132aa220STomas Henzl 	}
8078132aa220STomas Henzl 	pci_disable_device(pdev);
8079132aa220STomas Henzl 	msleep(260);			/* a randomly chosen number */
8080132aa220STomas Henzl 	rc = pci_enable_device(pdev);
8081132aa220STomas Henzl 	if (rc) {
8082132aa220STomas Henzl 		dev_warn(&pdev->dev, "failed to enable device.\n");
8083132aa220STomas Henzl 		return -ENODEV;
8084132aa220STomas Henzl 	}
80854fa604e1SRobert Elliott 
8086859c75abSTomas Henzl 	pci_set_master(pdev);
80874fa604e1SRobert Elliott 
80883b747298STomas Henzl 	vaddr = pci_ioremap_bar(pdev, 0);
80893b747298STomas Henzl 	if (vaddr == NULL) {
80903b747298STomas Henzl 		rc = -ENOMEM;
80913b747298STomas Henzl 		goto out_disable;
80923b747298STomas Henzl 	}
80933b747298STomas Henzl 	writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET);
80943b747298STomas Henzl 	iounmap(vaddr);
80953b747298STomas Henzl 
80961df8552aSStephen M. Cameron 	/* Reset the controller with a PCI power-cycle or via doorbell */
80976b6c1cd7STomas Henzl 	rc = hpsa_kdump_hard_reset_controller(pdev, board_id);
8098edd16368SStephen M. Cameron 
80991df8552aSStephen M. Cameron 	/* -ENOTSUPP here means we cannot reset the controller
81001df8552aSStephen M. Cameron 	 * but it's already (and still) up and running in
810118867659SStephen M. Cameron 	 * "performant mode".  Or, it might be 640x, which can't reset
810218867659SStephen M. Cameron 	 * due to concerns about shared bbwc between 6402/6404 pair.
81031df8552aSStephen M. Cameron 	 */
8104adf1b3a3SRobert Elliott 	if (rc)
8105132aa220STomas Henzl 		goto out_disable;
8106edd16368SStephen M. Cameron 
8107edd16368SStephen M. Cameron 	/* Now try to get the controller to respond to a no-op */
81081ba66c9cSRobert Elliott 	dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n");
8109edd16368SStephen M. Cameron 	for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
8110edd16368SStephen M. Cameron 		if (hpsa_noop(pdev) == 0)
8111edd16368SStephen M. Cameron 			break;
8112edd16368SStephen M. Cameron 		else
8113edd16368SStephen M. Cameron 			dev_warn(&pdev->dev, "no-op failed%s\n",
8114edd16368SStephen M. Cameron 					(i < 11 ? "; re-trying" : ""));
8115edd16368SStephen M. Cameron 	}
8116132aa220STomas Henzl 
8117132aa220STomas Henzl out_disable:
8118132aa220STomas Henzl 
8119132aa220STomas Henzl 	pci_disable_device(pdev);
8120132aa220STomas Henzl 	return rc;
8121edd16368SStephen M. Cameron }
8122edd16368SStephen M. Cameron 
81231fb7c98aSRobert Elliott static void hpsa_free_cmd_pool(struct ctlr_info *h)
81241fb7c98aSRobert Elliott {
81251fb7c98aSRobert Elliott 	kfree(h->cmd_pool_bits);
8126105a3dbcSRobert Elliott 	h->cmd_pool_bits = NULL;
8127105a3dbcSRobert Elliott 	if (h->cmd_pool) {
81281fb7c98aSRobert Elliott 		pci_free_consistent(h->pdev,
81291fb7c98aSRobert Elliott 				h->nr_cmds * sizeof(struct CommandList),
81301fb7c98aSRobert Elliott 				h->cmd_pool,
81311fb7c98aSRobert Elliott 				h->cmd_pool_dhandle);
8132105a3dbcSRobert Elliott 		h->cmd_pool = NULL;
8133105a3dbcSRobert Elliott 		h->cmd_pool_dhandle = 0;
8134105a3dbcSRobert Elliott 	}
8135105a3dbcSRobert Elliott 	if (h->errinfo_pool) {
81361fb7c98aSRobert Elliott 		pci_free_consistent(h->pdev,
81371fb7c98aSRobert Elliott 				h->nr_cmds * sizeof(struct ErrorInfo),
81381fb7c98aSRobert Elliott 				h->errinfo_pool,
81391fb7c98aSRobert Elliott 				h->errinfo_pool_dhandle);
8140105a3dbcSRobert Elliott 		h->errinfo_pool = NULL;
8141105a3dbcSRobert Elliott 		h->errinfo_pool_dhandle = 0;
8142105a3dbcSRobert Elliott 	}
81431fb7c98aSRobert Elliott }
81441fb7c98aSRobert Elliott 
8145d37ffbe4SRobert Elliott static int hpsa_alloc_cmd_pool(struct ctlr_info *h)
81462e9d1b36SStephen M. Cameron {
81472e9d1b36SStephen M. Cameron 	h->cmd_pool_bits = kzalloc(
81482e9d1b36SStephen M. Cameron 		DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
81492e9d1b36SStephen M. Cameron 		sizeof(unsigned long), GFP_KERNEL);
81502e9d1b36SStephen M. Cameron 	h->cmd_pool = pci_alloc_consistent(h->pdev,
81512e9d1b36SStephen M. Cameron 		    h->nr_cmds * sizeof(*h->cmd_pool),
81522e9d1b36SStephen M. Cameron 		    &(h->cmd_pool_dhandle));
81532e9d1b36SStephen M. Cameron 	h->errinfo_pool = pci_alloc_consistent(h->pdev,
81542e9d1b36SStephen M. Cameron 		    h->nr_cmds * sizeof(*h->errinfo_pool),
81552e9d1b36SStephen M. Cameron 		    &(h->errinfo_pool_dhandle));
81562e9d1b36SStephen M. Cameron 	if ((h->cmd_pool_bits == NULL)
81572e9d1b36SStephen M. Cameron 	    || (h->cmd_pool == NULL)
81582e9d1b36SStephen M. Cameron 	    || (h->errinfo_pool == NULL)) {
81592e9d1b36SStephen M. Cameron 		dev_err(&h->pdev->dev, "out of memory in %s", __func__);
81602c143342SRobert Elliott 		goto clean_up;
81612e9d1b36SStephen M. Cameron 	}
8162360c73bdSStephen Cameron 	hpsa_preinitialize_commands(h);
81632e9d1b36SStephen M. Cameron 	return 0;
81642c143342SRobert Elliott clean_up:
81652c143342SRobert Elliott 	hpsa_free_cmd_pool(h);
81662c143342SRobert Elliott 	return -ENOMEM;
81672e9d1b36SStephen M. Cameron }
81682e9d1b36SStephen M. Cameron 
816941b3cf08SStephen M. Cameron static void hpsa_irq_affinity_hints(struct ctlr_info *h)
817041b3cf08SStephen M. Cameron {
8171ec429952SFabian Frederick 	int i, cpu;
817241b3cf08SStephen M. Cameron 
817341b3cf08SStephen M. Cameron 	cpu = cpumask_first(cpu_online_mask);
817441b3cf08SStephen M. Cameron 	for (i = 0; i < h->msix_vector; i++) {
8175ec429952SFabian Frederick 		irq_set_affinity_hint(h->intr[i], get_cpu_mask(cpu));
817641b3cf08SStephen M. Cameron 		cpu = cpumask_next(cpu, cpu_online_mask);
817741b3cf08SStephen M. Cameron 	}
817841b3cf08SStephen M. Cameron }
817941b3cf08SStephen M. Cameron 
8180ec501a18SRobert Elliott /* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */
8181ec501a18SRobert Elliott static void hpsa_free_irqs(struct ctlr_info *h)
8182ec501a18SRobert Elliott {
8183ec501a18SRobert Elliott 	int i;
8184ec501a18SRobert Elliott 
8185ec501a18SRobert Elliott 	if (!h->msix_vector || h->intr_mode != PERF_MODE_INT) {
8186ec501a18SRobert Elliott 		/* Single reply queue, only one irq to free */
8187ec501a18SRobert Elliott 		i = h->intr_mode;
8188ec501a18SRobert Elliott 		irq_set_affinity_hint(h->intr[i], NULL);
8189ec501a18SRobert Elliott 		free_irq(h->intr[i], &h->q[i]);
8190105a3dbcSRobert Elliott 		h->q[i] = 0;
8191ec501a18SRobert Elliott 		return;
8192ec501a18SRobert Elliott 	}
8193ec501a18SRobert Elliott 
8194ec501a18SRobert Elliott 	for (i = 0; i < h->msix_vector; i++) {
8195ec501a18SRobert Elliott 		irq_set_affinity_hint(h->intr[i], NULL);
8196ec501a18SRobert Elliott 		free_irq(h->intr[i], &h->q[i]);
8197105a3dbcSRobert Elliott 		h->q[i] = 0;
8198ec501a18SRobert Elliott 	}
8199a4e17fc1SRobert Elliott 	for (; i < MAX_REPLY_QUEUES; i++)
8200a4e17fc1SRobert Elliott 		h->q[i] = 0;
8201ec501a18SRobert Elliott }
8202ec501a18SRobert Elliott 
82039ee61794SRobert Elliott /* returns 0 on success; cleans up and returns -Enn on error */
82049ee61794SRobert Elliott static int hpsa_request_irqs(struct ctlr_info *h,
82050ae01a32SStephen M. Cameron 	irqreturn_t (*msixhandler)(int, void *),
82060ae01a32SStephen M. Cameron 	irqreturn_t (*intxhandler)(int, void *))
82070ae01a32SStephen M. Cameron {
8208254f796bSMatt Gates 	int rc, i;
82090ae01a32SStephen M. Cameron 
8210254f796bSMatt Gates 	/*
8211254f796bSMatt Gates 	 * initialize h->q[x] = x so that interrupt handlers know which
8212254f796bSMatt Gates 	 * queue to process.
8213254f796bSMatt Gates 	 */
8214254f796bSMatt Gates 	for (i = 0; i < MAX_REPLY_QUEUES; i++)
8215254f796bSMatt Gates 		h->q[i] = (u8) i;
8216254f796bSMatt Gates 
8217eee0f03aSHannes Reinecke 	if (h->intr_mode == PERF_MODE_INT && h->msix_vector > 0) {
8218254f796bSMatt Gates 		/* If performant mode and MSI-X, use multiple reply queues */
8219a4e17fc1SRobert Elliott 		for (i = 0; i < h->msix_vector; i++) {
82208b47004aSRobert Elliott 			sprintf(h->intrname[i], "%s-msix%d", h->devname, i);
8221254f796bSMatt Gates 			rc = request_irq(h->intr[i], msixhandler,
82228b47004aSRobert Elliott 					0, h->intrname[i],
8223254f796bSMatt Gates 					&h->q[i]);
8224a4e17fc1SRobert Elliott 			if (rc) {
8225a4e17fc1SRobert Elliott 				int j;
8226a4e17fc1SRobert Elliott 
8227a4e17fc1SRobert Elliott 				dev_err(&h->pdev->dev,
8228a4e17fc1SRobert Elliott 					"failed to get irq %d for %s\n",
8229a4e17fc1SRobert Elliott 				       h->intr[i], h->devname);
8230a4e17fc1SRobert Elliott 				for (j = 0; j < i; j++) {
8231a4e17fc1SRobert Elliott 					free_irq(h->intr[j], &h->q[j]);
8232a4e17fc1SRobert Elliott 					h->q[j] = 0;
8233a4e17fc1SRobert Elliott 				}
8234a4e17fc1SRobert Elliott 				for (; j < MAX_REPLY_QUEUES; j++)
8235a4e17fc1SRobert Elliott 					h->q[j] = 0;
8236a4e17fc1SRobert Elliott 				return rc;
8237a4e17fc1SRobert Elliott 			}
8238a4e17fc1SRobert Elliott 		}
823941b3cf08SStephen M. Cameron 		hpsa_irq_affinity_hints(h);
8240254f796bSMatt Gates 	} else {
8241254f796bSMatt Gates 		/* Use single reply pool */
8242eee0f03aSHannes Reinecke 		if (h->msix_vector > 0 || h->msi_vector) {
82438b47004aSRobert Elliott 			if (h->msix_vector)
82448b47004aSRobert Elliott 				sprintf(h->intrname[h->intr_mode],
82458b47004aSRobert Elliott 					"%s-msix", h->devname);
82468b47004aSRobert Elliott 			else
82478b47004aSRobert Elliott 				sprintf(h->intrname[h->intr_mode],
82488b47004aSRobert Elliott 					"%s-msi", h->devname);
8249254f796bSMatt Gates 			rc = request_irq(h->intr[h->intr_mode],
82508b47004aSRobert Elliott 				msixhandler, 0,
82518b47004aSRobert Elliott 				h->intrname[h->intr_mode],
8252254f796bSMatt Gates 				&h->q[h->intr_mode]);
8253254f796bSMatt Gates 		} else {
82548b47004aSRobert Elliott 			sprintf(h->intrname[h->intr_mode],
82558b47004aSRobert Elliott 				"%s-intx", h->devname);
8256254f796bSMatt Gates 			rc = request_irq(h->intr[h->intr_mode],
82578b47004aSRobert Elliott 				intxhandler, IRQF_SHARED,
82588b47004aSRobert Elliott 				h->intrname[h->intr_mode],
8259254f796bSMatt Gates 				&h->q[h->intr_mode]);
8260254f796bSMatt Gates 		}
8261105a3dbcSRobert Elliott 		irq_set_affinity_hint(h->intr[h->intr_mode], NULL);
8262254f796bSMatt Gates 	}
82630ae01a32SStephen M. Cameron 	if (rc) {
8264195f2c65SRobert Elliott 		dev_err(&h->pdev->dev, "failed to get irq %d for %s\n",
82650ae01a32SStephen M. Cameron 		       h->intr[h->intr_mode], h->devname);
8266195f2c65SRobert Elliott 		hpsa_free_irqs(h);
82670ae01a32SStephen M. Cameron 		return -ENODEV;
82680ae01a32SStephen M. Cameron 	}
82690ae01a32SStephen M. Cameron 	return 0;
82700ae01a32SStephen M. Cameron }
82710ae01a32SStephen M. Cameron 
82726f039790SGreg Kroah-Hartman static int hpsa_kdump_soft_reset(struct ctlr_info *h)
827364670ac8SStephen M. Cameron {
827439c53f55SRobert Elliott 	int rc;
8275bf43caf3SRobert Elliott 	hpsa_send_host_reset(h, RAID_CTLR_LUNID, HPSA_RESET_TYPE_CONTROLLER);
827664670ac8SStephen M. Cameron 
827764670ac8SStephen M. Cameron 	dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
827839c53f55SRobert Elliott 	rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY);
827939c53f55SRobert Elliott 	if (rc) {
828064670ac8SStephen M. Cameron 		dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
828139c53f55SRobert Elliott 		return rc;
828264670ac8SStephen M. Cameron 	}
828364670ac8SStephen M. Cameron 
828464670ac8SStephen M. Cameron 	dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
828539c53f55SRobert Elliott 	rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
828639c53f55SRobert Elliott 	if (rc) {
828764670ac8SStephen M. Cameron 		dev_warn(&h->pdev->dev, "Board failed to become ready "
828864670ac8SStephen M. Cameron 			"after soft reset.\n");
828939c53f55SRobert Elliott 		return rc;
829064670ac8SStephen M. Cameron 	}
829164670ac8SStephen M. Cameron 
829264670ac8SStephen M. Cameron 	return 0;
829364670ac8SStephen M. Cameron }
829464670ac8SStephen M. Cameron 
8295072b0518SStephen M. Cameron static void hpsa_free_reply_queues(struct ctlr_info *h)
8296072b0518SStephen M. Cameron {
8297072b0518SStephen M. Cameron 	int i;
8298072b0518SStephen M. Cameron 
8299072b0518SStephen M. Cameron 	for (i = 0; i < h->nreply_queues; i++) {
8300072b0518SStephen M. Cameron 		if (!h->reply_queue[i].head)
8301072b0518SStephen M. Cameron 			continue;
83021fb7c98aSRobert Elliott 		pci_free_consistent(h->pdev,
83031fb7c98aSRobert Elliott 					h->reply_queue_size,
83041fb7c98aSRobert Elliott 					h->reply_queue[i].head,
83051fb7c98aSRobert Elliott 					h->reply_queue[i].busaddr);
8306072b0518SStephen M. Cameron 		h->reply_queue[i].head = NULL;
8307072b0518SStephen M. Cameron 		h->reply_queue[i].busaddr = 0;
8308072b0518SStephen M. Cameron 	}
8309105a3dbcSRobert Elliott 	h->reply_queue_size = 0;
8310072b0518SStephen M. Cameron }
8311072b0518SStephen M. Cameron 
83120097f0f4SStephen M. Cameron static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
83130097f0f4SStephen M. Cameron {
8314105a3dbcSRobert Elliott 	hpsa_free_performant_mode(h);		/* init_one 7 */
8315105a3dbcSRobert Elliott 	hpsa_free_sg_chain_blocks(h);		/* init_one 6 */
8316105a3dbcSRobert Elliott 	hpsa_free_cmd_pool(h);			/* init_one 5 */
8317105a3dbcSRobert Elliott 	hpsa_free_irqs(h);			/* init_one 4 */
83182946e82bSRobert Elliott 	scsi_host_put(h->scsi_host);		/* init_one 3 */
83192946e82bSRobert Elliott 	h->scsi_host = NULL;			/* init_one 3 */
83202946e82bSRobert Elliott 	hpsa_free_pci_init(h);			/* init_one 2_5 */
83219ecd953aSRobert Elliott 	free_percpu(h->lockup_detected);	/* init_one 2 */
83229ecd953aSRobert Elliott 	h->lockup_detected = NULL;		/* init_one 2 */
83239ecd953aSRobert Elliott 	if (h->resubmit_wq) {
83249ecd953aSRobert Elliott 		destroy_workqueue(h->resubmit_wq);	/* init_one 1 */
83259ecd953aSRobert Elliott 		h->resubmit_wq = NULL;
83269ecd953aSRobert Elliott 	}
83279ecd953aSRobert Elliott 	if (h->rescan_ctlr_wq) {
83289ecd953aSRobert Elliott 		destroy_workqueue(h->rescan_ctlr_wq);
83299ecd953aSRobert Elliott 		h->rescan_ctlr_wq = NULL;
83309ecd953aSRobert Elliott 	}
8331105a3dbcSRobert Elliott 	kfree(h);				/* init_one 1 */
833264670ac8SStephen M. Cameron }
833364670ac8SStephen M. Cameron 
8334a0c12413SStephen M. Cameron /* Called when controller lockup detected. */
8335f2405db8SDon Brace static void fail_all_outstanding_cmds(struct ctlr_info *h)
8336a0c12413SStephen M. Cameron {
8337281a7fd0SWebb Scales 	int i, refcount;
8338281a7fd0SWebb Scales 	struct CommandList *c;
833925163bd5SWebb Scales 	int failcount = 0;
8340a0c12413SStephen M. Cameron 
8341080ef1ccSDon Brace 	flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */
8342f2405db8SDon Brace 	for (i = 0; i < h->nr_cmds; i++) {
8343f2405db8SDon Brace 		c = h->cmd_pool + i;
8344281a7fd0SWebb Scales 		refcount = atomic_inc_return(&c->refcount);
8345281a7fd0SWebb Scales 		if (refcount > 1) {
834625163bd5SWebb Scales 			c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
83475a3d16f5SStephen M. Cameron 			finish_cmd(c);
8348433b5f4dSStephen Cameron 			atomic_dec(&h->commands_outstanding);
834925163bd5SWebb Scales 			failcount++;
8350a0c12413SStephen M. Cameron 		}
8351281a7fd0SWebb Scales 		cmd_free(h, c);
8352281a7fd0SWebb Scales 	}
835325163bd5SWebb Scales 	dev_warn(&h->pdev->dev,
835425163bd5SWebb Scales 		"failed %d commands in fail_all\n", failcount);
8355a0c12413SStephen M. Cameron }
8356a0c12413SStephen M. Cameron 
8357094963daSStephen M. Cameron static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value)
8358094963daSStephen M. Cameron {
8359c8ed0010SRusty Russell 	int cpu;
8360094963daSStephen M. Cameron 
8361c8ed0010SRusty Russell 	for_each_online_cpu(cpu) {
8362094963daSStephen M. Cameron 		u32 *lockup_detected;
8363094963daSStephen M. Cameron 		lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
8364094963daSStephen M. Cameron 		*lockup_detected = value;
8365094963daSStephen M. Cameron 	}
8366094963daSStephen M. Cameron 	wmb(); /* be sure the per-cpu variables are out to memory */
8367094963daSStephen M. Cameron }
8368094963daSStephen M. Cameron 
8369a0c12413SStephen M. Cameron static void controller_lockup_detected(struct ctlr_info *h)
8370a0c12413SStephen M. Cameron {
8371a0c12413SStephen M. Cameron 	unsigned long flags;
8372094963daSStephen M. Cameron 	u32 lockup_detected;
8373a0c12413SStephen M. Cameron 
8374a0c12413SStephen M. Cameron 	h->access.set_intr_mask(h, HPSA_INTR_OFF);
8375a0c12413SStephen M. Cameron 	spin_lock_irqsave(&h->lock, flags);
8376094963daSStephen M. Cameron 	lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
8377094963daSStephen M. Cameron 	if (!lockup_detected) {
8378094963daSStephen M. Cameron 		/* no heartbeat, but controller gave us a zero. */
8379094963daSStephen M. Cameron 		dev_warn(&h->pdev->dev,
838025163bd5SWebb Scales 			"lockup detected after %d but scratchpad register is zero\n",
838125163bd5SWebb Scales 			h->heartbeat_sample_interval / HZ);
8382094963daSStephen M. Cameron 		lockup_detected = 0xffffffff;
8383094963daSStephen M. Cameron 	}
8384094963daSStephen M. Cameron 	set_lockup_detected_for_all_cpus(h, lockup_detected);
8385a0c12413SStephen M. Cameron 	spin_unlock_irqrestore(&h->lock, flags);
838625163bd5SWebb Scales 	dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n",
838725163bd5SWebb Scales 			lockup_detected, h->heartbeat_sample_interval / HZ);
8388a0c12413SStephen M. Cameron 	pci_disable_device(h->pdev);
8389f2405db8SDon Brace 	fail_all_outstanding_cmds(h);
8390a0c12413SStephen M. Cameron }
8391a0c12413SStephen M. Cameron 
839225163bd5SWebb Scales static int detect_controller_lockup(struct ctlr_info *h)
8393a0c12413SStephen M. Cameron {
8394a0c12413SStephen M. Cameron 	u64 now;
8395a0c12413SStephen M. Cameron 	u32 heartbeat;
8396a0c12413SStephen M. Cameron 	unsigned long flags;
8397a0c12413SStephen M. Cameron 
8398a0c12413SStephen M. Cameron 	now = get_jiffies_64();
8399a0c12413SStephen M. Cameron 	/* If we've received an interrupt recently, we're ok. */
8400a0c12413SStephen M. Cameron 	if (time_after64(h->last_intr_timestamp +
8401e85c5974SStephen M. Cameron 				(h->heartbeat_sample_interval), now))
840225163bd5SWebb Scales 		return false;
8403a0c12413SStephen M. Cameron 
8404a0c12413SStephen M. Cameron 	/*
8405a0c12413SStephen M. Cameron 	 * If we've already checked the heartbeat recently, we're ok.
8406a0c12413SStephen M. Cameron 	 * This could happen if someone sends us a signal. We
8407a0c12413SStephen M. Cameron 	 * otherwise don't care about signals in this thread.
8408a0c12413SStephen M. Cameron 	 */
8409a0c12413SStephen M. Cameron 	if (time_after64(h->last_heartbeat_timestamp +
8410e85c5974SStephen M. Cameron 				(h->heartbeat_sample_interval), now))
841125163bd5SWebb Scales 		return false;
8412a0c12413SStephen M. Cameron 
8413a0c12413SStephen M. Cameron 	/* If heartbeat has not changed since we last looked, we're not ok. */
8414a0c12413SStephen M. Cameron 	spin_lock_irqsave(&h->lock, flags);
8415a0c12413SStephen M. Cameron 	heartbeat = readl(&h->cfgtable->HeartBeat);
8416a0c12413SStephen M. Cameron 	spin_unlock_irqrestore(&h->lock, flags);
8417a0c12413SStephen M. Cameron 	if (h->last_heartbeat == heartbeat) {
8418a0c12413SStephen M. Cameron 		controller_lockup_detected(h);
841925163bd5SWebb Scales 		return true;
8420a0c12413SStephen M. Cameron 	}
8421a0c12413SStephen M. Cameron 
8422a0c12413SStephen M. Cameron 	/* We're ok. */
8423a0c12413SStephen M. Cameron 	h->last_heartbeat = heartbeat;
8424a0c12413SStephen M. Cameron 	h->last_heartbeat_timestamp = now;
842525163bd5SWebb Scales 	return false;
8426a0c12413SStephen M. Cameron }
8427a0c12413SStephen M. Cameron 
84289846590eSStephen M. Cameron static void hpsa_ack_ctlr_events(struct ctlr_info *h)
842976438d08SStephen M. Cameron {
843076438d08SStephen M. Cameron 	int i;
843176438d08SStephen M. Cameron 	char *event_type;
843276438d08SStephen M. Cameron 
8433e4aa3e6aSStephen Cameron 	if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
8434e4aa3e6aSStephen Cameron 		return;
8435e4aa3e6aSStephen Cameron 
843676438d08SStephen M. Cameron 	/* Ask the controller to clear the events we're handling. */
84371f7cee8cSStephen M. Cameron 	if ((h->transMethod & (CFGTBL_Trans_io_accel1
84381f7cee8cSStephen M. Cameron 			| CFGTBL_Trans_io_accel2)) &&
843976438d08SStephen M. Cameron 		(h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE ||
844076438d08SStephen M. Cameron 		 h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) {
844176438d08SStephen M. Cameron 
844276438d08SStephen M. Cameron 		if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE)
844376438d08SStephen M. Cameron 			event_type = "state change";
844476438d08SStephen M. Cameron 		if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)
844576438d08SStephen M. Cameron 			event_type = "configuration change";
844676438d08SStephen M. Cameron 		/* Stop sending new RAID offload reqs via the IO accelerator */
844776438d08SStephen M. Cameron 		scsi_block_requests(h->scsi_host);
84485323ed74SDon Brace 		for (i = 0; i < h->ndevices; i++) {
844976438d08SStephen M. Cameron 			h->dev[i]->offload_enabled = 0;
84505323ed74SDon Brace 			h->dev[i]->offload_to_be_enabled = 0;
84515323ed74SDon Brace 		}
845223100dd9SStephen M. Cameron 		hpsa_drain_accel_commands(h);
845376438d08SStephen M. Cameron 		/* Set 'accelerator path config change' bit */
845476438d08SStephen M. Cameron 		dev_warn(&h->pdev->dev,
845576438d08SStephen M. Cameron 			"Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n",
845676438d08SStephen M. Cameron 			h->events, event_type);
845776438d08SStephen M. Cameron 		writel(h->events, &(h->cfgtable->clear_event_notify));
845876438d08SStephen M. Cameron 		/* Set the "clear event notify field update" bit 6 */
845976438d08SStephen M. Cameron 		writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
846076438d08SStephen M. Cameron 		/* Wait until ctlr clears 'clear event notify field', bit 6 */
846176438d08SStephen M. Cameron 		hpsa_wait_for_clear_event_notify_ack(h);
846276438d08SStephen M. Cameron 		scsi_unblock_requests(h->scsi_host);
846376438d08SStephen M. Cameron 	} else {
846476438d08SStephen M. Cameron 		/* Acknowledge controller notification events. */
846576438d08SStephen M. Cameron 		writel(h->events, &(h->cfgtable->clear_event_notify));
846676438d08SStephen M. Cameron 		writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
846776438d08SStephen M. Cameron 		hpsa_wait_for_clear_event_notify_ack(h);
846876438d08SStephen M. Cameron #if 0
846976438d08SStephen M. Cameron 		writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
847076438d08SStephen M. Cameron 		hpsa_wait_for_mode_change_ack(h);
847176438d08SStephen M. Cameron #endif
847276438d08SStephen M. Cameron 	}
84739846590eSStephen M. Cameron 	return;
847476438d08SStephen M. Cameron }
847576438d08SStephen M. Cameron 
847676438d08SStephen M. Cameron /* Check a register on the controller to see if there are configuration
847776438d08SStephen M. Cameron  * changes (added/changed/removed logical drives, etc.) which mean that
8478e863d68eSScott Teel  * we should rescan the controller for devices.
8479e863d68eSScott Teel  * Also check flag for driver-initiated rescan.
848076438d08SStephen M. Cameron  */
84819846590eSStephen M. Cameron static int hpsa_ctlr_needs_rescan(struct ctlr_info *h)
848276438d08SStephen M. Cameron {
8483853633e8SDon Brace 	if (h->drv_req_rescan) {
8484853633e8SDon Brace 		h->drv_req_rescan = 0;
8485853633e8SDon Brace 		return 1;
8486853633e8SDon Brace 	}
8487853633e8SDon Brace 
848876438d08SStephen M. Cameron 	if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
84899846590eSStephen M. Cameron 		return 0;
849076438d08SStephen M. Cameron 
849176438d08SStephen M. Cameron 	h->events = readl(&(h->cfgtable->event_notify));
84929846590eSStephen M. Cameron 	return h->events & RESCAN_REQUIRED_EVENT_BITS;
84939846590eSStephen M. Cameron }
849476438d08SStephen M. Cameron 
849576438d08SStephen M. Cameron /*
84969846590eSStephen M. Cameron  * Check if any of the offline devices have become ready
849776438d08SStephen M. Cameron  */
84989846590eSStephen M. Cameron static int hpsa_offline_devices_ready(struct ctlr_info *h)
84999846590eSStephen M. Cameron {
85009846590eSStephen M. Cameron 	unsigned long flags;
85019846590eSStephen M. Cameron 	struct offline_device_entry *d;
85029846590eSStephen M. Cameron 	struct list_head *this, *tmp;
85039846590eSStephen M. Cameron 
85049846590eSStephen M. Cameron 	spin_lock_irqsave(&h->offline_device_lock, flags);
85059846590eSStephen M. Cameron 	list_for_each_safe(this, tmp, &h->offline_device_list) {
85069846590eSStephen M. Cameron 		d = list_entry(this, struct offline_device_entry,
85079846590eSStephen M. Cameron 				offline_list);
85089846590eSStephen M. Cameron 		spin_unlock_irqrestore(&h->offline_device_lock, flags);
8509d1fea47cSStephen M. Cameron 		if (!hpsa_volume_offline(h, d->scsi3addr)) {
8510d1fea47cSStephen M. Cameron 			spin_lock_irqsave(&h->offline_device_lock, flags);
8511d1fea47cSStephen M. Cameron 			list_del(&d->offline_list);
8512d1fea47cSStephen M. Cameron 			spin_unlock_irqrestore(&h->offline_device_lock, flags);
85139846590eSStephen M. Cameron 			return 1;
8514d1fea47cSStephen M. Cameron 		}
85159846590eSStephen M. Cameron 		spin_lock_irqsave(&h->offline_device_lock, flags);
851676438d08SStephen M. Cameron 	}
85179846590eSStephen M. Cameron 	spin_unlock_irqrestore(&h->offline_device_lock, flags);
85189846590eSStephen M. Cameron 	return 0;
85199846590eSStephen M. Cameron }
85209846590eSStephen M. Cameron 
852134592254SScott Teel static int hpsa_luns_changed(struct ctlr_info *h)
852234592254SScott Teel {
852334592254SScott Teel 	int rc = 1; /* assume there are changes */
852434592254SScott Teel 	struct ReportLUNdata *logdev = NULL;
852534592254SScott Teel 
852634592254SScott Teel 	/* if we can't find out if lun data has changed,
852734592254SScott Teel 	 * assume that it has.
852834592254SScott Teel 	 */
852934592254SScott Teel 
853034592254SScott Teel 	if (!h->lastlogicals)
853134592254SScott Teel 		goto out;
853234592254SScott Teel 
853334592254SScott Teel 	logdev = kzalloc(sizeof(*logdev), GFP_KERNEL);
853434592254SScott Teel 	if (!logdev) {
853534592254SScott Teel 		dev_warn(&h->pdev->dev,
853634592254SScott Teel 			"Out of memory, can't track lun changes.\n");
853734592254SScott Teel 		goto out;
853834592254SScott Teel 	}
853934592254SScott Teel 	if (hpsa_scsi_do_report_luns(h, 1, logdev, sizeof(*logdev), 0)) {
854034592254SScott Teel 		dev_warn(&h->pdev->dev,
854134592254SScott Teel 			"report luns failed, can't track lun changes.\n");
854234592254SScott Teel 		goto out;
854334592254SScott Teel 	}
854434592254SScott Teel 	if (memcmp(logdev, h->lastlogicals, sizeof(*logdev))) {
854534592254SScott Teel 		dev_info(&h->pdev->dev,
854634592254SScott Teel 			"Lun changes detected.\n");
854734592254SScott Teel 		memcpy(h->lastlogicals, logdev, sizeof(*logdev));
854834592254SScott Teel 		goto out;
854934592254SScott Teel 	} else
855034592254SScott Teel 		rc = 0; /* no changes detected. */
855134592254SScott Teel out:
855234592254SScott Teel 	kfree(logdev);
855334592254SScott Teel 	return rc;
855434592254SScott Teel }
855534592254SScott Teel 
85566636e7f4SDon Brace static void hpsa_rescan_ctlr_worker(struct work_struct *work)
8557a0c12413SStephen M. Cameron {
8558a0c12413SStephen M. Cameron 	unsigned long flags;
85598a98db73SStephen M. Cameron 	struct ctlr_info *h = container_of(to_delayed_work(work),
85606636e7f4SDon Brace 					struct ctlr_info, rescan_ctlr_work);
85616636e7f4SDon Brace 
85626636e7f4SDon Brace 
85636636e7f4SDon Brace 	if (h->remove_in_progress)
85648a98db73SStephen M. Cameron 		return;
85659846590eSStephen M. Cameron 
85669846590eSStephen M. Cameron 	if (hpsa_ctlr_needs_rescan(h) || hpsa_offline_devices_ready(h)) {
85679846590eSStephen M. Cameron 		scsi_host_get(h->scsi_host);
85689846590eSStephen M. Cameron 		hpsa_ack_ctlr_events(h);
85699846590eSStephen M. Cameron 		hpsa_scan_start(h->scsi_host);
85709846590eSStephen M. Cameron 		scsi_host_put(h->scsi_host);
857134592254SScott Teel 	} else if (h->discovery_polling) {
8572c2adae44SScott Teel 		hpsa_disable_rld_caching(h);
857334592254SScott Teel 		if (hpsa_luns_changed(h)) {
857434592254SScott Teel 			struct Scsi_Host *sh = NULL;
857534592254SScott Teel 
857634592254SScott Teel 			dev_info(&h->pdev->dev,
857734592254SScott Teel 				"driver discovery polling rescan.\n");
857834592254SScott Teel 			sh = scsi_host_get(h->scsi_host);
857934592254SScott Teel 			if (sh != NULL) {
858034592254SScott Teel 				hpsa_scan_start(sh);
858134592254SScott Teel 				scsi_host_put(sh);
858234592254SScott Teel 			}
858334592254SScott Teel 		}
85849846590eSStephen M. Cameron 	}
85856636e7f4SDon Brace 	spin_lock_irqsave(&h->lock, flags);
85866636e7f4SDon Brace 	if (!h->remove_in_progress)
85876636e7f4SDon Brace 		queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
85886636e7f4SDon Brace 				h->heartbeat_sample_interval);
85896636e7f4SDon Brace 	spin_unlock_irqrestore(&h->lock, flags);
85906636e7f4SDon Brace }
85916636e7f4SDon Brace 
85926636e7f4SDon Brace static void hpsa_monitor_ctlr_worker(struct work_struct *work)
85936636e7f4SDon Brace {
85946636e7f4SDon Brace 	unsigned long flags;
85956636e7f4SDon Brace 	struct ctlr_info *h = container_of(to_delayed_work(work),
85966636e7f4SDon Brace 					struct ctlr_info, monitor_ctlr_work);
85976636e7f4SDon Brace 
85986636e7f4SDon Brace 	detect_controller_lockup(h);
85996636e7f4SDon Brace 	if (lockup_detected(h))
86006636e7f4SDon Brace 		return;
86019846590eSStephen M. Cameron 
86028a98db73SStephen M. Cameron 	spin_lock_irqsave(&h->lock, flags);
86036636e7f4SDon Brace 	if (!h->remove_in_progress)
86048a98db73SStephen M. Cameron 		schedule_delayed_work(&h->monitor_ctlr_work,
86058a98db73SStephen M. Cameron 				h->heartbeat_sample_interval);
86068a98db73SStephen M. Cameron 	spin_unlock_irqrestore(&h->lock, flags);
8607a0c12413SStephen M. Cameron }
8608a0c12413SStephen M. Cameron 
86096636e7f4SDon Brace static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h,
86106636e7f4SDon Brace 						char *name)
86116636e7f4SDon Brace {
86126636e7f4SDon Brace 	struct workqueue_struct *wq = NULL;
86136636e7f4SDon Brace 
8614397ea9cbSDon Brace 	wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr);
86156636e7f4SDon Brace 	if (!wq)
86166636e7f4SDon Brace 		dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name);
86176636e7f4SDon Brace 
86186636e7f4SDon Brace 	return wq;
86196636e7f4SDon Brace }
86206636e7f4SDon Brace 
86216f039790SGreg Kroah-Hartman static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
86224c2a8c40SStephen M. Cameron {
86234c2a8c40SStephen M. Cameron 	int dac, rc;
86244c2a8c40SStephen M. Cameron 	struct ctlr_info *h;
862564670ac8SStephen M. Cameron 	int try_soft_reset = 0;
862664670ac8SStephen M. Cameron 	unsigned long flags;
86276b6c1cd7STomas Henzl 	u32 board_id;
86284c2a8c40SStephen M. Cameron 
86294c2a8c40SStephen M. Cameron 	if (number_of_controllers == 0)
86304c2a8c40SStephen M. Cameron 		printk(KERN_INFO DRIVER_NAME "\n");
86314c2a8c40SStephen M. Cameron 
86326b6c1cd7STomas Henzl 	rc = hpsa_lookup_board_id(pdev, &board_id);
86336b6c1cd7STomas Henzl 	if (rc < 0) {
86346b6c1cd7STomas Henzl 		dev_warn(&pdev->dev, "Board ID not found\n");
86356b6c1cd7STomas Henzl 		return rc;
86366b6c1cd7STomas Henzl 	}
86376b6c1cd7STomas Henzl 
86386b6c1cd7STomas Henzl 	rc = hpsa_init_reset_devices(pdev, board_id);
863964670ac8SStephen M. Cameron 	if (rc) {
864064670ac8SStephen M. Cameron 		if (rc != -ENOTSUPP)
86414c2a8c40SStephen M. Cameron 			return rc;
864264670ac8SStephen M. Cameron 		/* If the reset fails in a particular way (it has no way to do
864364670ac8SStephen M. Cameron 		 * a proper hard reset, so returns -ENOTSUPP) we can try to do
864464670ac8SStephen M. Cameron 		 * a soft reset once we get the controller configured up to the
864564670ac8SStephen M. Cameron 		 * point that it can accept a command.
864664670ac8SStephen M. Cameron 		 */
864764670ac8SStephen M. Cameron 		try_soft_reset = 1;
864864670ac8SStephen M. Cameron 		rc = 0;
864964670ac8SStephen M. Cameron 	}
865064670ac8SStephen M. Cameron 
865164670ac8SStephen M. Cameron reinit_after_soft_reset:
86524c2a8c40SStephen M. Cameron 
8653303932fdSDon Brace 	/* Command structures must be aligned on a 32-byte boundary because
8654303932fdSDon Brace 	 * the 5 lower bits of the address are used by the hardware. and by
8655303932fdSDon Brace 	 * the driver.  See comments in hpsa.h for more info.
8656303932fdSDon Brace 	 */
8657303932fdSDon Brace 	BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
8658edd16368SStephen M. Cameron 	h = kzalloc(sizeof(*h), GFP_KERNEL);
8659105a3dbcSRobert Elliott 	if (!h) {
8660105a3dbcSRobert Elliott 		dev_err(&pdev->dev, "Failed to allocate controller head\n");
8661ecd9aad4SStephen M. Cameron 		return -ENOMEM;
8662105a3dbcSRobert Elliott 	}
8663edd16368SStephen M. Cameron 
866455c06c71SStephen M. Cameron 	h->pdev = pdev;
8665105a3dbcSRobert Elliott 
8666a9a3a273SStephen M. Cameron 	h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
86679846590eSStephen M. Cameron 	INIT_LIST_HEAD(&h->offline_device_list);
86686eaf46fdSStephen M. Cameron 	spin_lock_init(&h->lock);
86699846590eSStephen M. Cameron 	spin_lock_init(&h->offline_device_lock);
86706eaf46fdSStephen M. Cameron 	spin_lock_init(&h->scan_lock);
867134f0c627SDon Brace 	atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS);
86729b5c48c2SStephen Cameron 	atomic_set(&h->abort_cmds_available, HPSA_CMDS_RESERVED_FOR_ABORTS);
8673094963daSStephen M. Cameron 
8674094963daSStephen M. Cameron 	/* Allocate and clear per-cpu variable lockup_detected */
8675094963daSStephen M. Cameron 	h->lockup_detected = alloc_percpu(u32);
86762a5ac326SStephen M. Cameron 	if (!h->lockup_detected) {
8677105a3dbcSRobert Elliott 		dev_err(&h->pdev->dev, "Failed to allocate lockup detector\n");
86782a5ac326SStephen M. Cameron 		rc = -ENOMEM;
86792efa5929SRobert Elliott 		goto clean1;	/* aer/h */
86802a5ac326SStephen M. Cameron 	}
8681094963daSStephen M. Cameron 	set_lockup_detected_for_all_cpus(h, 0);
8682094963daSStephen M. Cameron 
868355c06c71SStephen M. Cameron 	rc = hpsa_pci_init(h);
8684105a3dbcSRobert Elliott 	if (rc)
86852946e82bSRobert Elliott 		goto clean2;	/* lu, aer/h */
8686edd16368SStephen M. Cameron 
86872946e82bSRobert Elliott 	/* relies on h-> settings made by hpsa_pci_init, including
86882946e82bSRobert Elliott 	 * interrupt_mode h->intr */
86892946e82bSRobert Elliott 	rc = hpsa_scsi_host_alloc(h);
86902946e82bSRobert Elliott 	if (rc)
86912946e82bSRobert Elliott 		goto clean2_5;	/* pci, lu, aer/h */
86922946e82bSRobert Elliott 
86932946e82bSRobert Elliott 	sprintf(h->devname, HPSA "%d", h->scsi_host->host_no);
8694edd16368SStephen M. Cameron 	h->ctlr = number_of_controllers;
8695edd16368SStephen M. Cameron 	number_of_controllers++;
8696edd16368SStephen M. Cameron 
8697edd16368SStephen M. Cameron 	/* configure PCI DMA stuff */
8698ecd9aad4SStephen M. Cameron 	rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
8699ecd9aad4SStephen M. Cameron 	if (rc == 0) {
8700edd16368SStephen M. Cameron 		dac = 1;
8701ecd9aad4SStephen M. Cameron 	} else {
8702ecd9aad4SStephen M. Cameron 		rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
8703ecd9aad4SStephen M. Cameron 		if (rc == 0) {
8704edd16368SStephen M. Cameron 			dac = 0;
8705ecd9aad4SStephen M. Cameron 		} else {
8706edd16368SStephen M. Cameron 			dev_err(&pdev->dev, "no suitable DMA available\n");
87072946e82bSRobert Elliott 			goto clean3;	/* shost, pci, lu, aer/h */
8708edd16368SStephen M. Cameron 		}
8709ecd9aad4SStephen M. Cameron 	}
8710edd16368SStephen M. Cameron 
8711edd16368SStephen M. Cameron 	/* make sure the board interrupts are off */
8712edd16368SStephen M. Cameron 	h->access.set_intr_mask(h, HPSA_INTR_OFF);
871310f66018SStephen M. Cameron 
8714105a3dbcSRobert Elliott 	rc = hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx);
8715105a3dbcSRobert Elliott 	if (rc)
87162946e82bSRobert Elliott 		goto clean3;	/* shost, pci, lu, aer/h */
8717d37ffbe4SRobert Elliott 	rc = hpsa_alloc_cmd_pool(h);
87188947fd10SRobert Elliott 	if (rc)
87192946e82bSRobert Elliott 		goto clean4;	/* irq, shost, pci, lu, aer/h */
8720105a3dbcSRobert Elliott 	rc = hpsa_alloc_sg_chain_blocks(h);
8721105a3dbcSRobert Elliott 	if (rc)
87222946e82bSRobert Elliott 		goto clean5;	/* cmd, irq, shost, pci, lu, aer/h */
8723a08a8471SStephen M. Cameron 	init_waitqueue_head(&h->scan_wait_queue);
87249b5c48c2SStephen Cameron 	init_waitqueue_head(&h->abort_cmd_wait_queue);
8725d604f533SWebb Scales 	init_waitqueue_head(&h->event_sync_wait_queue);
8726d604f533SWebb Scales 	mutex_init(&h->reset_mutex);
8727a08a8471SStephen M. Cameron 	h->scan_finished = 1; /* no scan currently in progress */
8728edd16368SStephen M. Cameron 
8729edd16368SStephen M. Cameron 	pci_set_drvdata(pdev, h);
87309a41338eSStephen M. Cameron 	h->ndevices = 0;
87312946e82bSRobert Elliott 
87329a41338eSStephen M. Cameron 	spin_lock_init(&h->devlock);
8733105a3dbcSRobert Elliott 	rc = hpsa_put_ctlr_into_performant_mode(h);
8734105a3dbcSRobert Elliott 	if (rc)
87352946e82bSRobert Elliott 		goto clean6; /* sg, cmd, irq, shost, pci, lu, aer/h */
87362946e82bSRobert Elliott 
87372efa5929SRobert Elliott 	/* create the resubmit workqueue */
87382efa5929SRobert Elliott 	h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan");
87392efa5929SRobert Elliott 	if (!h->rescan_ctlr_wq) {
87402efa5929SRobert Elliott 		rc = -ENOMEM;
87412efa5929SRobert Elliott 		goto clean7;
87422efa5929SRobert Elliott 	}
87432efa5929SRobert Elliott 
87442efa5929SRobert Elliott 	h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit");
87452efa5929SRobert Elliott 	if (!h->resubmit_wq) {
87462efa5929SRobert Elliott 		rc = -ENOMEM;
87472efa5929SRobert Elliott 		goto clean7;	/* aer/h */
87482efa5929SRobert Elliott 	}
874964670ac8SStephen M. Cameron 
8750105a3dbcSRobert Elliott 	/*
8751105a3dbcSRobert Elliott 	 * At this point, the controller is ready to take commands.
875264670ac8SStephen M. Cameron 	 * Now, if reset_devices and the hard reset didn't work, try
875364670ac8SStephen M. Cameron 	 * the soft reset and see if that works.
875464670ac8SStephen M. Cameron 	 */
875564670ac8SStephen M. Cameron 	if (try_soft_reset) {
875664670ac8SStephen M. Cameron 
875764670ac8SStephen M. Cameron 		/* This is kind of gross.  We may or may not get a completion
875864670ac8SStephen M. Cameron 		 * from the soft reset command, and if we do, then the value
875964670ac8SStephen M. Cameron 		 * from the fifo may or may not be valid.  So, we wait 10 secs
876064670ac8SStephen M. Cameron 		 * after the reset throwing away any completions we get during
876164670ac8SStephen M. Cameron 		 * that time.  Unregister the interrupt handler and register
876264670ac8SStephen M. Cameron 		 * fake ones to scoop up any residual completions.
876364670ac8SStephen M. Cameron 		 */
876464670ac8SStephen M. Cameron 		spin_lock_irqsave(&h->lock, flags);
876564670ac8SStephen M. Cameron 		h->access.set_intr_mask(h, HPSA_INTR_OFF);
876664670ac8SStephen M. Cameron 		spin_unlock_irqrestore(&h->lock, flags);
8767ec501a18SRobert Elliott 		hpsa_free_irqs(h);
87689ee61794SRobert Elliott 		rc = hpsa_request_irqs(h, hpsa_msix_discard_completions,
876964670ac8SStephen M. Cameron 					hpsa_intx_discard_completions);
877064670ac8SStephen M. Cameron 		if (rc) {
87719ee61794SRobert Elliott 			dev_warn(&h->pdev->dev,
87729ee61794SRobert Elliott 				"Failed to request_irq after soft reset.\n");
8773d498757cSRobert Elliott 			/*
8774b2ef480cSRobert Elliott 			 * cannot goto clean7 or free_irqs will be called
8775b2ef480cSRobert Elliott 			 * again. Instead, do its work
8776b2ef480cSRobert Elliott 			 */
8777b2ef480cSRobert Elliott 			hpsa_free_performant_mode(h);	/* clean7 */
8778b2ef480cSRobert Elliott 			hpsa_free_sg_chain_blocks(h);	/* clean6 */
8779b2ef480cSRobert Elliott 			hpsa_free_cmd_pool(h);		/* clean5 */
8780b2ef480cSRobert Elliott 			/*
8781b2ef480cSRobert Elliott 			 * skip hpsa_free_irqs(h) clean4 since that
8782b2ef480cSRobert Elliott 			 * was just called before request_irqs failed
8783d498757cSRobert Elliott 			 */
8784d498757cSRobert Elliott 			goto clean3;
878564670ac8SStephen M. Cameron 		}
878664670ac8SStephen M. Cameron 
878764670ac8SStephen M. Cameron 		rc = hpsa_kdump_soft_reset(h);
878864670ac8SStephen M. Cameron 		if (rc)
878964670ac8SStephen M. Cameron 			/* Neither hard nor soft reset worked, we're hosed. */
87907ef7323fSDon Brace 			goto clean7;
879164670ac8SStephen M. Cameron 
879264670ac8SStephen M. Cameron 		dev_info(&h->pdev->dev, "Board READY.\n");
879364670ac8SStephen M. Cameron 		dev_info(&h->pdev->dev,
879464670ac8SStephen M. Cameron 			"Waiting for stale completions to drain.\n");
879564670ac8SStephen M. Cameron 		h->access.set_intr_mask(h, HPSA_INTR_ON);
879664670ac8SStephen M. Cameron 		msleep(10000);
879764670ac8SStephen M. Cameron 		h->access.set_intr_mask(h, HPSA_INTR_OFF);
879864670ac8SStephen M. Cameron 
879964670ac8SStephen M. Cameron 		rc = controller_reset_failed(h->cfgtable);
880064670ac8SStephen M. Cameron 		if (rc)
880164670ac8SStephen M. Cameron 			dev_info(&h->pdev->dev,
880264670ac8SStephen M. Cameron 				"Soft reset appears to have failed.\n");
880364670ac8SStephen M. Cameron 
880464670ac8SStephen M. Cameron 		/* since the controller's reset, we have to go back and re-init
880564670ac8SStephen M. Cameron 		 * everything.  Easiest to just forget what we've done and do it
880664670ac8SStephen M. Cameron 		 * all over again.
880764670ac8SStephen M. Cameron 		 */
880864670ac8SStephen M. Cameron 		hpsa_undo_allocations_after_kdump_soft_reset(h);
880964670ac8SStephen M. Cameron 		try_soft_reset = 0;
881064670ac8SStephen M. Cameron 		if (rc)
8811b2ef480cSRobert Elliott 			/* don't goto clean, we already unallocated */
881264670ac8SStephen M. Cameron 			return -ENODEV;
881364670ac8SStephen M. Cameron 
881464670ac8SStephen M. Cameron 		goto reinit_after_soft_reset;
881564670ac8SStephen M. Cameron 	}
8816edd16368SStephen M. Cameron 
8817da0697bdSScott Teel 	/* Enable Accelerated IO path at driver layer */
8818da0697bdSScott Teel 	h->acciopath_status = 1;
881934592254SScott Teel 	/* Disable discovery polling.*/
882034592254SScott Teel 	h->discovery_polling = 0;
8821da0697bdSScott Teel 
8822e863d68eSScott Teel 
8823edd16368SStephen M. Cameron 	/* Turn the interrupts on so we can service requests */
8824edd16368SStephen M. Cameron 	h->access.set_intr_mask(h, HPSA_INTR_ON);
8825edd16368SStephen M. Cameron 
8826339b2b14SStephen M. Cameron 	hpsa_hba_inquiry(h);
88278a98db73SStephen M. Cameron 
882834592254SScott Teel 	h->lastlogicals = kzalloc(sizeof(*(h->lastlogicals)), GFP_KERNEL);
882934592254SScott Teel 	if (!h->lastlogicals)
883034592254SScott Teel 		dev_info(&h->pdev->dev,
883134592254SScott Teel 			"Can't track change to report lun data\n");
883234592254SScott Teel 
8833cf477237SDon Brace 	/* hook into SCSI subsystem */
8834cf477237SDon Brace 	rc = hpsa_scsi_add_host(h);
8835cf477237SDon Brace 	if (rc)
8836cf477237SDon Brace 		goto clean7; /* perf, sg, cmd, irq, shost, pci, lu, aer/h */
8837cf477237SDon Brace 
88388a98db73SStephen M. Cameron 	/* Monitor the controller for firmware lockups */
88398a98db73SStephen M. Cameron 	h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
88408a98db73SStephen M. Cameron 	INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker);
88418a98db73SStephen M. Cameron 	schedule_delayed_work(&h->monitor_ctlr_work,
88428a98db73SStephen M. Cameron 				h->heartbeat_sample_interval);
88436636e7f4SDon Brace 	INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker);
88446636e7f4SDon Brace 	queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
88456636e7f4SDon Brace 				h->heartbeat_sample_interval);
884688bf6d62SStephen M. Cameron 	return 0;
8847edd16368SStephen M. Cameron 
88482946e82bSRobert Elliott clean7: /* perf, sg, cmd, irq, shost, pci, lu, aer/h */
8849105a3dbcSRobert Elliott 	hpsa_free_performant_mode(h);
8850105a3dbcSRobert Elliott 	h->access.set_intr_mask(h, HPSA_INTR_OFF);
8851105a3dbcSRobert Elliott clean6: /* sg, cmd, irq, pci, lockup, wq/aer/h */
885233a2ffceSStephen M. Cameron 	hpsa_free_sg_chain_blocks(h);
88532946e82bSRobert Elliott clean5: /* cmd, irq, shost, pci, lu, aer/h */
88542e9d1b36SStephen M. Cameron 	hpsa_free_cmd_pool(h);
88552946e82bSRobert Elliott clean4: /* irq, shost, pci, lu, aer/h */
8856ec501a18SRobert Elliott 	hpsa_free_irqs(h);
88572946e82bSRobert Elliott clean3: /* shost, pci, lu, aer/h */
88582946e82bSRobert Elliott 	scsi_host_put(h->scsi_host);
88592946e82bSRobert Elliott 	h->scsi_host = NULL;
88602946e82bSRobert Elliott clean2_5: /* pci, lu, aer/h */
8861195f2c65SRobert Elliott 	hpsa_free_pci_init(h);
88622946e82bSRobert Elliott clean2: /* lu, aer/h */
8863105a3dbcSRobert Elliott 	if (h->lockup_detected) {
8864094963daSStephen M. Cameron 		free_percpu(h->lockup_detected);
8865105a3dbcSRobert Elliott 		h->lockup_detected = NULL;
8866105a3dbcSRobert Elliott 	}
8867105a3dbcSRobert Elliott clean1:	/* wq/aer/h */
8868105a3dbcSRobert Elliott 	if (h->resubmit_wq) {
8869105a3dbcSRobert Elliott 		destroy_workqueue(h->resubmit_wq);
8870105a3dbcSRobert Elliott 		h->resubmit_wq = NULL;
8871105a3dbcSRobert Elliott 	}
8872105a3dbcSRobert Elliott 	if (h->rescan_ctlr_wq) {
8873105a3dbcSRobert Elliott 		destroy_workqueue(h->rescan_ctlr_wq);
8874105a3dbcSRobert Elliott 		h->rescan_ctlr_wq = NULL;
8875105a3dbcSRobert Elliott 	}
8876edd16368SStephen M. Cameron 	kfree(h);
8877ecd9aad4SStephen M. Cameron 	return rc;
8878edd16368SStephen M. Cameron }
8879edd16368SStephen M. Cameron 
8880edd16368SStephen M. Cameron static void hpsa_flush_cache(struct ctlr_info *h)
8881edd16368SStephen M. Cameron {
8882edd16368SStephen M. Cameron 	char *flush_buf;
8883edd16368SStephen M. Cameron 	struct CommandList *c;
888425163bd5SWebb Scales 	int rc;
8885702890e3SStephen M. Cameron 
8886094963daSStephen M. Cameron 	if (unlikely(lockup_detected(h)))
8887702890e3SStephen M. Cameron 		return;
8888edd16368SStephen M. Cameron 	flush_buf = kzalloc(4, GFP_KERNEL);
8889edd16368SStephen M. Cameron 	if (!flush_buf)
8890edd16368SStephen M. Cameron 		return;
8891edd16368SStephen M. Cameron 
889245fcb86eSStephen Cameron 	c = cmd_alloc(h);
8893bf43caf3SRobert Elliott 
8894a2dac136SStephen M. Cameron 	if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
8895a2dac136SStephen M. Cameron 		RAID_CTLR_LUNID, TYPE_CMD)) {
8896a2dac136SStephen M. Cameron 		goto out;
8897a2dac136SStephen M. Cameron 	}
889825163bd5SWebb Scales 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
8899c448ecfaSDon Brace 					PCI_DMA_TODEVICE, DEFAULT_TIMEOUT);
890025163bd5SWebb Scales 	if (rc)
890125163bd5SWebb Scales 		goto out;
8902edd16368SStephen M. Cameron 	if (c->err_info->CommandStatus != 0)
8903a2dac136SStephen M. Cameron out:
8904edd16368SStephen M. Cameron 		dev_warn(&h->pdev->dev,
8905edd16368SStephen M. Cameron 			"error flushing cache on controller\n");
890645fcb86eSStephen Cameron 	cmd_free(h, c);
8907edd16368SStephen M. Cameron 	kfree(flush_buf);
8908edd16368SStephen M. Cameron }
8909edd16368SStephen M. Cameron 
8910c2adae44SScott Teel /* Make controller gather fresh report lun data each time we
8911c2adae44SScott Teel  * send down a report luns request
8912c2adae44SScott Teel  */
8913c2adae44SScott Teel static void hpsa_disable_rld_caching(struct ctlr_info *h)
8914c2adae44SScott Teel {
8915c2adae44SScott Teel 	u32 *options;
8916c2adae44SScott Teel 	struct CommandList *c;
8917c2adae44SScott Teel 	int rc;
8918c2adae44SScott Teel 
8919c2adae44SScott Teel 	/* Don't bother trying to set diag options if locked up */
8920c2adae44SScott Teel 	if (unlikely(h->lockup_detected))
8921c2adae44SScott Teel 		return;
8922c2adae44SScott Teel 
8923c2adae44SScott Teel 	options = kzalloc(sizeof(*options), GFP_KERNEL);
8924c2adae44SScott Teel 	if (!options) {
8925c2adae44SScott Teel 		dev_err(&h->pdev->dev,
8926c2adae44SScott Teel 			"Error: failed to disable rld caching, during alloc.\n");
8927c2adae44SScott Teel 		return;
8928c2adae44SScott Teel 	}
8929c2adae44SScott Teel 
8930c2adae44SScott Teel 	c = cmd_alloc(h);
8931c2adae44SScott Teel 
8932c2adae44SScott Teel 	/* first, get the current diag options settings */
8933c2adae44SScott Teel 	if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0,
8934c2adae44SScott Teel 		RAID_CTLR_LUNID, TYPE_CMD))
8935c2adae44SScott Teel 		goto errout;
8936c2adae44SScott Teel 
8937c2adae44SScott Teel 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
8938c448ecfaSDon Brace 		PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT);
8939c2adae44SScott Teel 	if ((rc != 0) || (c->err_info->CommandStatus != 0))
8940c2adae44SScott Teel 		goto errout;
8941c2adae44SScott Teel 
8942c2adae44SScott Teel 	/* Now, set the bit for disabling the RLD caching */
8943c2adae44SScott Teel 	*options |= HPSA_DIAG_OPTS_DISABLE_RLD_CACHING;
8944c2adae44SScott Teel 
8945c2adae44SScott Teel 	if (fill_cmd(c, BMIC_SET_DIAG_OPTIONS, h, options, 4, 0,
8946c2adae44SScott Teel 		RAID_CTLR_LUNID, TYPE_CMD))
8947c2adae44SScott Teel 		goto errout;
8948c2adae44SScott Teel 
8949c2adae44SScott Teel 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
8950c448ecfaSDon Brace 		PCI_DMA_TODEVICE, DEFAULT_TIMEOUT);
8951c2adae44SScott Teel 	if ((rc != 0)  || (c->err_info->CommandStatus != 0))
8952c2adae44SScott Teel 		goto errout;
8953c2adae44SScott Teel 
8954c2adae44SScott Teel 	/* Now verify that it got set: */
8955c2adae44SScott Teel 	if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0,
8956c2adae44SScott Teel 		RAID_CTLR_LUNID, TYPE_CMD))
8957c2adae44SScott Teel 		goto errout;
8958c2adae44SScott Teel 
8959c2adae44SScott Teel 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
8960c448ecfaSDon Brace 		PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT);
8961c2adae44SScott Teel 	if ((rc != 0)  || (c->err_info->CommandStatus != 0))
8962c2adae44SScott Teel 		goto errout;
8963c2adae44SScott Teel 
8964d8a080c3SDan Carpenter 	if (*options & HPSA_DIAG_OPTS_DISABLE_RLD_CACHING)
8965c2adae44SScott Teel 		goto out;
8966c2adae44SScott Teel 
8967c2adae44SScott Teel errout:
8968c2adae44SScott Teel 	dev_err(&h->pdev->dev,
8969c2adae44SScott Teel 			"Error: failed to disable report lun data caching.\n");
8970c2adae44SScott Teel out:
8971c2adae44SScott Teel 	cmd_free(h, c);
8972c2adae44SScott Teel 	kfree(options);
8973c2adae44SScott Teel }
8974c2adae44SScott Teel 
8975edd16368SStephen M. Cameron static void hpsa_shutdown(struct pci_dev *pdev)
8976edd16368SStephen M. Cameron {
8977edd16368SStephen M. Cameron 	struct ctlr_info *h;
8978edd16368SStephen M. Cameron 
8979edd16368SStephen M. Cameron 	h = pci_get_drvdata(pdev);
8980edd16368SStephen M. Cameron 	/* Turn board interrupts off  and send the flush cache command
8981edd16368SStephen M. Cameron 	 * sendcmd will turn off interrupt, and send the flush...
8982edd16368SStephen M. Cameron 	 * To write all data in the battery backed cache to disks
8983edd16368SStephen M. Cameron 	 */
8984edd16368SStephen M. Cameron 	hpsa_flush_cache(h);
8985edd16368SStephen M. Cameron 	h->access.set_intr_mask(h, HPSA_INTR_OFF);
8986105a3dbcSRobert Elliott 	hpsa_free_irqs(h);			/* init_one 4 */
8987cc64c817SRobert Elliott 	hpsa_disable_interrupt_mode(h);		/* pci_init 2 */
8988edd16368SStephen M. Cameron }
8989edd16368SStephen M. Cameron 
89906f039790SGreg Kroah-Hartman static void hpsa_free_device_info(struct ctlr_info *h)
899155e14e76SStephen M. Cameron {
899255e14e76SStephen M. Cameron 	int i;
899355e14e76SStephen M. Cameron 
8994105a3dbcSRobert Elliott 	for (i = 0; i < h->ndevices; i++) {
899555e14e76SStephen M. Cameron 		kfree(h->dev[i]);
8996105a3dbcSRobert Elliott 		h->dev[i] = NULL;
8997105a3dbcSRobert Elliott 	}
899855e14e76SStephen M. Cameron }
899955e14e76SStephen M. Cameron 
90006f039790SGreg Kroah-Hartman static void hpsa_remove_one(struct pci_dev *pdev)
9001edd16368SStephen M. Cameron {
9002edd16368SStephen M. Cameron 	struct ctlr_info *h;
90038a98db73SStephen M. Cameron 	unsigned long flags;
9004edd16368SStephen M. Cameron 
9005edd16368SStephen M. Cameron 	if (pci_get_drvdata(pdev) == NULL) {
9006edd16368SStephen M. Cameron 		dev_err(&pdev->dev, "unable to remove device\n");
9007edd16368SStephen M. Cameron 		return;
9008edd16368SStephen M. Cameron 	}
9009edd16368SStephen M. Cameron 	h = pci_get_drvdata(pdev);
90108a98db73SStephen M. Cameron 
90118a98db73SStephen M. Cameron 	/* Get rid of any controller monitoring work items */
90128a98db73SStephen M. Cameron 	spin_lock_irqsave(&h->lock, flags);
90138a98db73SStephen M. Cameron 	h->remove_in_progress = 1;
90148a98db73SStephen M. Cameron 	spin_unlock_irqrestore(&h->lock, flags);
90156636e7f4SDon Brace 	cancel_delayed_work_sync(&h->monitor_ctlr_work);
90166636e7f4SDon Brace 	cancel_delayed_work_sync(&h->rescan_ctlr_work);
90176636e7f4SDon Brace 	destroy_workqueue(h->rescan_ctlr_wq);
90186636e7f4SDon Brace 	destroy_workqueue(h->resubmit_wq);
9019cc64c817SRobert Elliott 
90202d041306SDon Brace 	/*
90212d041306SDon Brace 	 * Call before disabling interrupts.
90222d041306SDon Brace 	 * scsi_remove_host can trigger I/O operations especially
90232d041306SDon Brace 	 * when multipath is enabled. There can be SYNCHRONIZE CACHE
90242d041306SDon Brace 	 * operations which cannot complete and will hang the system.
90252d041306SDon Brace 	 */
90262d041306SDon Brace 	if (h->scsi_host)
90272d041306SDon Brace 		scsi_remove_host(h->scsi_host);		/* init_one 8 */
9028105a3dbcSRobert Elliott 	/* includes hpsa_free_irqs - init_one 4 */
9029195f2c65SRobert Elliott 	/* includes hpsa_disable_interrupt_mode - pci_init 2 */
9030edd16368SStephen M. Cameron 	hpsa_shutdown(pdev);
9031cc64c817SRobert Elliott 
9032105a3dbcSRobert Elliott 	hpsa_free_device_info(h);		/* scan */
9033105a3dbcSRobert Elliott 
90342946e82bSRobert Elliott 	kfree(h->hba_inquiry_data);			/* init_one 10 */
90352946e82bSRobert Elliott 	h->hba_inquiry_data = NULL;			/* init_one 10 */
90362946e82bSRobert Elliott 	hpsa_free_ioaccel2_sg_chain_blocks(h);
9037105a3dbcSRobert Elliott 	hpsa_free_performant_mode(h);			/* init_one 7 */
9038105a3dbcSRobert Elliott 	hpsa_free_sg_chain_blocks(h);			/* init_one 6 */
90391fb7c98aSRobert Elliott 	hpsa_free_cmd_pool(h);				/* init_one 5 */
904034592254SScott Teel 	kfree(h->lastlogicals);
9041105a3dbcSRobert Elliott 
9042105a3dbcSRobert Elliott 	/* hpsa_free_irqs already called via hpsa_shutdown init_one 4 */
9043195f2c65SRobert Elliott 
90442946e82bSRobert Elliott 	scsi_host_put(h->scsi_host);			/* init_one 3 */
90452946e82bSRobert Elliott 	h->scsi_host = NULL;				/* init_one 3 */
90462946e82bSRobert Elliott 
9047195f2c65SRobert Elliott 	/* includes hpsa_disable_interrupt_mode - pci_init 2 */
90482946e82bSRobert Elliott 	hpsa_free_pci_init(h);				/* init_one 2.5 */
9049195f2c65SRobert Elliott 
9050105a3dbcSRobert Elliott 	free_percpu(h->lockup_detected);		/* init_one 2 */
9051105a3dbcSRobert Elliott 	h->lockup_detected = NULL;			/* init_one 2 */
9052105a3dbcSRobert Elliott 	/* (void) pci_disable_pcie_error_reporting(pdev); */	/* init_one 1 */
9053d04e62b9SKevin Barnett 
9054d04e62b9SKevin Barnett 	hpsa_delete_sas_host(h);
9055d04e62b9SKevin Barnett 
9056105a3dbcSRobert Elliott 	kfree(h);					/* init_one 1 */
9057edd16368SStephen M. Cameron }
9058edd16368SStephen M. Cameron 
9059edd16368SStephen M. Cameron static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
9060edd16368SStephen M. Cameron 	__attribute__((unused)) pm_message_t state)
9061edd16368SStephen M. Cameron {
9062edd16368SStephen M. Cameron 	return -ENOSYS;
9063edd16368SStephen M. Cameron }
9064edd16368SStephen M. Cameron 
9065edd16368SStephen M. Cameron static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
9066edd16368SStephen M. Cameron {
9067edd16368SStephen M. Cameron 	return -ENOSYS;
9068edd16368SStephen M. Cameron }
9069edd16368SStephen M. Cameron 
9070edd16368SStephen M. Cameron static struct pci_driver hpsa_pci_driver = {
9071f79cfec6SStephen M. Cameron 	.name = HPSA,
9072edd16368SStephen M. Cameron 	.probe = hpsa_init_one,
90736f039790SGreg Kroah-Hartman 	.remove = hpsa_remove_one,
9074edd16368SStephen M. Cameron 	.id_table = hpsa_pci_device_id,	/* id_table */
9075edd16368SStephen M. Cameron 	.shutdown = hpsa_shutdown,
9076edd16368SStephen M. Cameron 	.suspend = hpsa_suspend,
9077edd16368SStephen M. Cameron 	.resume = hpsa_resume,
9078edd16368SStephen M. Cameron };
9079edd16368SStephen M. Cameron 
9080303932fdSDon Brace /* Fill in bucket_map[], given nsgs (the max number of
9081303932fdSDon Brace  * scatter gather elements supported) and bucket[],
9082303932fdSDon Brace  * which is an array of 8 integers.  The bucket[] array
9083303932fdSDon Brace  * contains 8 different DMA transfer sizes (in 16
9084303932fdSDon Brace  * byte increments) which the controller uses to fetch
9085303932fdSDon Brace  * commands.  This function fills in bucket_map[], which
9086303932fdSDon Brace  * maps a given number of scatter gather elements to one of
9087303932fdSDon Brace  * the 8 DMA transfer sizes.  The point of it is to allow the
9088303932fdSDon Brace  * controller to only do as much DMA as needed to fetch the
9089303932fdSDon Brace  * command, with the DMA transfer size encoded in the lower
9090303932fdSDon Brace  * bits of the command address.
9091303932fdSDon Brace  */
9092303932fdSDon Brace static void  calc_bucket_map(int bucket[], int num_buckets,
90932b08b3e9SDon Brace 	int nsgs, int min_blocks, u32 *bucket_map)
9094303932fdSDon Brace {
9095303932fdSDon Brace 	int i, j, b, size;
9096303932fdSDon Brace 
9097303932fdSDon Brace 	/* Note, bucket_map must have nsgs+1 entries. */
9098303932fdSDon Brace 	for (i = 0; i <= nsgs; i++) {
9099303932fdSDon Brace 		/* Compute size of a command with i SG entries */
9100e1f7de0cSMatt Gates 		size = i + min_blocks;
9101303932fdSDon Brace 		b = num_buckets; /* Assume the biggest bucket */
9102303932fdSDon Brace 		/* Find the bucket that is just big enough */
9103e1f7de0cSMatt Gates 		for (j = 0; j < num_buckets; j++) {
9104303932fdSDon Brace 			if (bucket[j] >= size) {
9105303932fdSDon Brace 				b = j;
9106303932fdSDon Brace 				break;
9107303932fdSDon Brace 			}
9108303932fdSDon Brace 		}
9109303932fdSDon Brace 		/* for a command with i SG entries, use bucket b. */
9110303932fdSDon Brace 		bucket_map[i] = b;
9111303932fdSDon Brace 	}
9112303932fdSDon Brace }
9113303932fdSDon Brace 
9114105a3dbcSRobert Elliott /*
9115105a3dbcSRobert Elliott  * return -ENODEV on err, 0 on success (or no action)
9116105a3dbcSRobert Elliott  * allocates numerous items that must be freed later
9117105a3dbcSRobert Elliott  */
9118c706a795SRobert Elliott static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support)
9119303932fdSDon Brace {
91206c311b57SStephen M. Cameron 	int i;
91216c311b57SStephen M. Cameron 	unsigned long register_value;
9122e1f7de0cSMatt Gates 	unsigned long transMethod = CFGTBL_Trans_Performant |
9123e1f7de0cSMatt Gates 			(trans_support & CFGTBL_Trans_use_short_tags) |
9124e1f7de0cSMatt Gates 				CFGTBL_Trans_enable_directed_msix |
9125b9af4937SStephen M. Cameron 			(trans_support & (CFGTBL_Trans_io_accel1 |
9126b9af4937SStephen M. Cameron 				CFGTBL_Trans_io_accel2));
9127e1f7de0cSMatt Gates 	struct access_method access = SA5_performant_access;
9128def342bdSStephen M. Cameron 
9129def342bdSStephen M. Cameron 	/* This is a bit complicated.  There are 8 registers on
9130def342bdSStephen M. Cameron 	 * the controller which we write to to tell it 8 different
9131def342bdSStephen M. Cameron 	 * sizes of commands which there may be.  It's a way of
9132def342bdSStephen M. Cameron 	 * reducing the DMA done to fetch each command.  Encoded into
9133def342bdSStephen M. Cameron 	 * each command's tag are 3 bits which communicate to the controller
9134def342bdSStephen M. Cameron 	 * which of the eight sizes that command fits within.  The size of
9135def342bdSStephen M. Cameron 	 * each command depends on how many scatter gather entries there are.
9136def342bdSStephen M. Cameron 	 * Each SG entry requires 16 bytes.  The eight registers are programmed
9137def342bdSStephen M. Cameron 	 * with the number of 16-byte blocks a command of that size requires.
9138def342bdSStephen M. Cameron 	 * The smallest command possible requires 5 such 16 byte blocks.
9139d66ae08bSStephen M. Cameron 	 * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte
9140def342bdSStephen M. Cameron 	 * blocks.  Note, this only extends to the SG entries contained
9141def342bdSStephen M. Cameron 	 * within the command block, and does not extend to chained blocks
9142def342bdSStephen M. Cameron 	 * of SG elements.   bft[] contains the eight values we write to
9143def342bdSStephen M. Cameron 	 * the registers.  They are not evenly distributed, but have more
9144def342bdSStephen M. Cameron 	 * sizes for small commands, and fewer sizes for larger commands.
9145def342bdSStephen M. Cameron 	 */
9146d66ae08bSStephen M. Cameron 	int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
9147b9af4937SStephen M. Cameron #define MIN_IOACCEL2_BFT_ENTRY 5
9148b9af4937SStephen M. Cameron #define HPSA_IOACCEL2_HEADER_SZ 4
9149b9af4937SStephen M. Cameron 	int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12,
9150b9af4937SStephen M. Cameron 			13, 14, 15, 16, 17, 18, 19,
9151b9af4937SStephen M. Cameron 			HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES};
9152b9af4937SStephen M. Cameron 	BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16);
9153b9af4937SStephen M. Cameron 	BUILD_BUG_ON(ARRAY_SIZE(bft) != 8);
9154b9af4937SStephen M. Cameron 	BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) >
9155b9af4937SStephen M. Cameron 				 16 * MIN_IOACCEL2_BFT_ENTRY);
9156b9af4937SStephen M. Cameron 	BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16);
9157d66ae08bSStephen M. Cameron 	BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
9158303932fdSDon Brace 	/*  5 = 1 s/g entry or 4k
9159303932fdSDon Brace 	 *  6 = 2 s/g entry or 8k
9160303932fdSDon Brace 	 *  8 = 4 s/g entry or 16k
9161303932fdSDon Brace 	 * 10 = 6 s/g entry or 24k
9162303932fdSDon Brace 	 */
9163303932fdSDon Brace 
9164b3a52e79SStephen M. Cameron 	/* If the controller supports either ioaccel method then
9165b3a52e79SStephen M. Cameron 	 * we can also use the RAID stack submit path that does not
9166b3a52e79SStephen M. Cameron 	 * perform the superfluous readl() after each command submission.
9167b3a52e79SStephen M. Cameron 	 */
9168b3a52e79SStephen M. Cameron 	if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2))
9169b3a52e79SStephen M. Cameron 		access = SA5_performant_access_no_read;
9170b3a52e79SStephen M. Cameron 
9171303932fdSDon Brace 	/* Controller spec: zero out this buffer. */
9172072b0518SStephen M. Cameron 	for (i = 0; i < h->nreply_queues; i++)
9173072b0518SStephen M. Cameron 		memset(h->reply_queue[i].head, 0, h->reply_queue_size);
9174303932fdSDon Brace 
9175d66ae08bSStephen M. Cameron 	bft[7] = SG_ENTRIES_IN_CMD + 4;
9176d66ae08bSStephen M. Cameron 	calc_bucket_map(bft, ARRAY_SIZE(bft),
9177e1f7de0cSMatt Gates 				SG_ENTRIES_IN_CMD, 4, h->blockFetchTable);
9178303932fdSDon Brace 	for (i = 0; i < 8; i++)
9179303932fdSDon Brace 		writel(bft[i], &h->transtable->BlockFetch[i]);
9180303932fdSDon Brace 
9181303932fdSDon Brace 	/* size of controller ring buffer */
9182303932fdSDon Brace 	writel(h->max_commands, &h->transtable->RepQSize);
9183254f796bSMatt Gates 	writel(h->nreply_queues, &h->transtable->RepQCount);
9184303932fdSDon Brace 	writel(0, &h->transtable->RepQCtrAddrLow32);
9185303932fdSDon Brace 	writel(0, &h->transtable->RepQCtrAddrHigh32);
9186254f796bSMatt Gates 
9187254f796bSMatt Gates 	for (i = 0; i < h->nreply_queues; i++) {
9188254f796bSMatt Gates 		writel(0, &h->transtable->RepQAddr[i].upper);
9189072b0518SStephen M. Cameron 		writel(h->reply_queue[i].busaddr,
9190254f796bSMatt Gates 			&h->transtable->RepQAddr[i].lower);
9191254f796bSMatt Gates 	}
9192254f796bSMatt Gates 
9193b9af4937SStephen M. Cameron 	writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
9194e1f7de0cSMatt Gates 	writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest));
9195e1f7de0cSMatt Gates 	/*
9196e1f7de0cSMatt Gates 	 * enable outbound interrupt coalescing in accelerator mode;
9197e1f7de0cSMatt Gates 	 */
9198e1f7de0cSMatt Gates 	if (trans_support & CFGTBL_Trans_io_accel1) {
9199e1f7de0cSMatt Gates 		access = SA5_ioaccel_mode1_access;
9200e1f7de0cSMatt Gates 		writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
9201e1f7de0cSMatt Gates 		writel(4, &h->cfgtable->HostWrite.CoalIntCount);
9202c349775eSScott Teel 	} else {
9203c349775eSScott Teel 		if (trans_support & CFGTBL_Trans_io_accel2) {
9204c349775eSScott Teel 			access = SA5_ioaccel_mode2_access;
9205c349775eSScott Teel 			writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
9206c349775eSScott Teel 			writel(4, &h->cfgtable->HostWrite.CoalIntCount);
9207c349775eSScott Teel 		}
9208e1f7de0cSMatt Gates 	}
9209303932fdSDon Brace 	writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
9210c706a795SRobert Elliott 	if (hpsa_wait_for_mode_change_ack(h)) {
9211c706a795SRobert Elliott 		dev_err(&h->pdev->dev,
9212c706a795SRobert Elliott 			"performant mode problem - doorbell timeout\n");
9213c706a795SRobert Elliott 		return -ENODEV;
9214c706a795SRobert Elliott 	}
9215303932fdSDon Brace 	register_value = readl(&(h->cfgtable->TransportActive));
9216303932fdSDon Brace 	if (!(register_value & CFGTBL_Trans_Performant)) {
9217050f7147SStephen Cameron 		dev_err(&h->pdev->dev,
9218050f7147SStephen Cameron 			"performant mode problem - transport not active\n");
9219c706a795SRobert Elliott 		return -ENODEV;
9220303932fdSDon Brace 	}
9221960a30e7SStephen M. Cameron 	/* Change the access methods to the performant access methods */
9222e1f7de0cSMatt Gates 	h->access = access;
9223e1f7de0cSMatt Gates 	h->transMethod = transMethod;
9224e1f7de0cSMatt Gates 
9225b9af4937SStephen M. Cameron 	if (!((trans_support & CFGTBL_Trans_io_accel1) ||
9226b9af4937SStephen M. Cameron 		(trans_support & CFGTBL_Trans_io_accel2)))
9227c706a795SRobert Elliott 		return 0;
9228e1f7de0cSMatt Gates 
9229b9af4937SStephen M. Cameron 	if (trans_support & CFGTBL_Trans_io_accel1) {
9230e1f7de0cSMatt Gates 		/* Set up I/O accelerator mode */
9231e1f7de0cSMatt Gates 		for (i = 0; i < h->nreply_queues; i++) {
9232e1f7de0cSMatt Gates 			writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX);
9233e1f7de0cSMatt Gates 			h->reply_queue[i].current_entry =
9234e1f7de0cSMatt Gates 				readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX);
9235e1f7de0cSMatt Gates 		}
9236283b4a9bSStephen M. Cameron 		bft[7] = h->ioaccel_maxsg + 8;
9237283b4a9bSStephen M. Cameron 		calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8,
9238e1f7de0cSMatt Gates 				h->ioaccel1_blockFetchTable);
9239e1f7de0cSMatt Gates 
9240e1f7de0cSMatt Gates 		/* initialize all reply queue entries to unused */
9241072b0518SStephen M. Cameron 		for (i = 0; i < h->nreply_queues; i++)
9242072b0518SStephen M. Cameron 			memset(h->reply_queue[i].head,
9243072b0518SStephen M. Cameron 				(u8) IOACCEL_MODE1_REPLY_UNUSED,
9244072b0518SStephen M. Cameron 				h->reply_queue_size);
9245e1f7de0cSMatt Gates 
9246e1f7de0cSMatt Gates 		/* set all the constant fields in the accelerator command
9247e1f7de0cSMatt Gates 		 * frames once at init time to save CPU cycles later.
9248e1f7de0cSMatt Gates 		 */
9249e1f7de0cSMatt Gates 		for (i = 0; i < h->nr_cmds; i++) {
9250e1f7de0cSMatt Gates 			struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i];
9251e1f7de0cSMatt Gates 
9252e1f7de0cSMatt Gates 			cp->function = IOACCEL1_FUNCTION_SCSIIO;
9253e1f7de0cSMatt Gates 			cp->err_info = (u32) (h->errinfo_pool_dhandle +
9254e1f7de0cSMatt Gates 					(i * sizeof(struct ErrorInfo)));
9255e1f7de0cSMatt Gates 			cp->err_info_len = sizeof(struct ErrorInfo);
9256e1f7de0cSMatt Gates 			cp->sgl_offset = IOACCEL1_SGLOFFSET;
92572b08b3e9SDon Brace 			cp->host_context_flags =
92582b08b3e9SDon Brace 				cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT);
9259e1f7de0cSMatt Gates 			cp->timeout_sec = 0;
9260e1f7de0cSMatt Gates 			cp->ReplyQueue = 0;
926150a0decfSStephen M. Cameron 			cp->tag =
9262f2405db8SDon Brace 				cpu_to_le64((i << DIRECT_LOOKUP_SHIFT));
926350a0decfSStephen M. Cameron 			cp->host_addr =
926450a0decfSStephen M. Cameron 				cpu_to_le64(h->ioaccel_cmd_pool_dhandle +
9265e1f7de0cSMatt Gates 					(i * sizeof(struct io_accel1_cmd)));
9266e1f7de0cSMatt Gates 		}
9267b9af4937SStephen M. Cameron 	} else if (trans_support & CFGTBL_Trans_io_accel2) {
9268b9af4937SStephen M. Cameron 		u64 cfg_offset, cfg_base_addr_index;
9269b9af4937SStephen M. Cameron 		u32 bft2_offset, cfg_base_addr;
9270b9af4937SStephen M. Cameron 		int rc;
9271b9af4937SStephen M. Cameron 
9272b9af4937SStephen M. Cameron 		rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
9273b9af4937SStephen M. Cameron 			&cfg_base_addr_index, &cfg_offset);
9274b9af4937SStephen M. Cameron 		BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64);
9275b9af4937SStephen M. Cameron 		bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ;
9276b9af4937SStephen M. Cameron 		calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg,
9277b9af4937SStephen M. Cameron 				4, h->ioaccel2_blockFetchTable);
9278b9af4937SStephen M. Cameron 		bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset);
9279b9af4937SStephen M. Cameron 		BUILD_BUG_ON(offsetof(struct CfgTable,
9280b9af4937SStephen M. Cameron 				io_accel_request_size_offset) != 0xb8);
9281b9af4937SStephen M. Cameron 		h->ioaccel2_bft2_regs =
9282b9af4937SStephen M. Cameron 			remap_pci_mem(pci_resource_start(h->pdev,
9283b9af4937SStephen M. Cameron 					cfg_base_addr_index) +
9284b9af4937SStephen M. Cameron 					cfg_offset + bft2_offset,
9285b9af4937SStephen M. Cameron 					ARRAY_SIZE(bft2) *
9286b9af4937SStephen M. Cameron 					sizeof(*h->ioaccel2_bft2_regs));
9287b9af4937SStephen M. Cameron 		for (i = 0; i < ARRAY_SIZE(bft2); i++)
9288b9af4937SStephen M. Cameron 			writel(bft2[i], &h->ioaccel2_bft2_regs[i]);
9289b9af4937SStephen M. Cameron 	}
9290b9af4937SStephen M. Cameron 	writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
9291c706a795SRobert Elliott 	if (hpsa_wait_for_mode_change_ack(h)) {
9292c706a795SRobert Elliott 		dev_err(&h->pdev->dev,
9293c706a795SRobert Elliott 			"performant mode problem - enabling ioaccel mode\n");
9294c706a795SRobert Elliott 		return -ENODEV;
9295c706a795SRobert Elliott 	}
9296c706a795SRobert Elliott 	return 0;
9297e1f7de0cSMatt Gates }
9298e1f7de0cSMatt Gates 
92991fb7c98aSRobert Elliott /* Free ioaccel1 mode command blocks and block fetch table */
93001fb7c98aSRobert Elliott static void hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info *h)
93011fb7c98aSRobert Elliott {
9302105a3dbcSRobert Elliott 	if (h->ioaccel_cmd_pool) {
93031fb7c98aSRobert Elliott 		pci_free_consistent(h->pdev,
93041fb7c98aSRobert Elliott 			h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
93051fb7c98aSRobert Elliott 			h->ioaccel_cmd_pool,
93061fb7c98aSRobert Elliott 			h->ioaccel_cmd_pool_dhandle);
9307105a3dbcSRobert Elliott 		h->ioaccel_cmd_pool = NULL;
9308105a3dbcSRobert Elliott 		h->ioaccel_cmd_pool_dhandle = 0;
9309105a3dbcSRobert Elliott 	}
93101fb7c98aSRobert Elliott 	kfree(h->ioaccel1_blockFetchTable);
9311105a3dbcSRobert Elliott 	h->ioaccel1_blockFetchTable = NULL;
93121fb7c98aSRobert Elliott }
93131fb7c98aSRobert Elliott 
9314d37ffbe4SRobert Elliott /* Allocate ioaccel1 mode command blocks and block fetch table */
9315d37ffbe4SRobert Elliott static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h)
9316e1f7de0cSMatt Gates {
9317283b4a9bSStephen M. Cameron 	h->ioaccel_maxsg =
9318283b4a9bSStephen M. Cameron 		readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
9319283b4a9bSStephen M. Cameron 	if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES)
9320283b4a9bSStephen M. Cameron 		h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES;
9321283b4a9bSStephen M. Cameron 
9322e1f7de0cSMatt Gates 	/* Command structures must be aligned on a 128-byte boundary
9323e1f7de0cSMatt Gates 	 * because the 7 lower bits of the address are used by the
9324e1f7de0cSMatt Gates 	 * hardware.
9325e1f7de0cSMatt Gates 	 */
9326e1f7de0cSMatt Gates 	BUILD_BUG_ON(sizeof(struct io_accel1_cmd) %
9327e1f7de0cSMatt Gates 			IOACCEL1_COMMANDLIST_ALIGNMENT);
9328e1f7de0cSMatt Gates 	h->ioaccel_cmd_pool =
9329e1f7de0cSMatt Gates 		pci_alloc_consistent(h->pdev,
9330e1f7de0cSMatt Gates 			h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
9331e1f7de0cSMatt Gates 			&(h->ioaccel_cmd_pool_dhandle));
9332e1f7de0cSMatt Gates 
9333e1f7de0cSMatt Gates 	h->ioaccel1_blockFetchTable =
9334283b4a9bSStephen M. Cameron 		kmalloc(((h->ioaccel_maxsg + 1) *
9335e1f7de0cSMatt Gates 				sizeof(u32)), GFP_KERNEL);
9336e1f7de0cSMatt Gates 
9337e1f7de0cSMatt Gates 	if ((h->ioaccel_cmd_pool == NULL) ||
9338e1f7de0cSMatt Gates 		(h->ioaccel1_blockFetchTable == NULL))
9339e1f7de0cSMatt Gates 		goto clean_up;
9340e1f7de0cSMatt Gates 
9341e1f7de0cSMatt Gates 	memset(h->ioaccel_cmd_pool, 0,
9342e1f7de0cSMatt Gates 		h->nr_cmds * sizeof(*h->ioaccel_cmd_pool));
9343e1f7de0cSMatt Gates 	return 0;
9344e1f7de0cSMatt Gates 
9345e1f7de0cSMatt Gates clean_up:
93461fb7c98aSRobert Elliott 	hpsa_free_ioaccel1_cmd_and_bft(h);
93472dd02d74SRobert Elliott 	return -ENOMEM;
93486c311b57SStephen M. Cameron }
93496c311b57SStephen M. Cameron 
93501fb7c98aSRobert Elliott /* Free ioaccel2 mode command blocks and block fetch table */
93511fb7c98aSRobert Elliott static void hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info *h)
93521fb7c98aSRobert Elliott {
9353d9a729f3SWebb Scales 	hpsa_free_ioaccel2_sg_chain_blocks(h);
9354d9a729f3SWebb Scales 
9355105a3dbcSRobert Elliott 	if (h->ioaccel2_cmd_pool) {
93561fb7c98aSRobert Elliott 		pci_free_consistent(h->pdev,
93571fb7c98aSRobert Elliott 			h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
93581fb7c98aSRobert Elliott 			h->ioaccel2_cmd_pool,
93591fb7c98aSRobert Elliott 			h->ioaccel2_cmd_pool_dhandle);
9360105a3dbcSRobert Elliott 		h->ioaccel2_cmd_pool = NULL;
9361105a3dbcSRobert Elliott 		h->ioaccel2_cmd_pool_dhandle = 0;
9362105a3dbcSRobert Elliott 	}
93631fb7c98aSRobert Elliott 	kfree(h->ioaccel2_blockFetchTable);
9364105a3dbcSRobert Elliott 	h->ioaccel2_blockFetchTable = NULL;
93651fb7c98aSRobert Elliott }
93661fb7c98aSRobert Elliott 
9367d37ffbe4SRobert Elliott /* Allocate ioaccel2 mode command blocks and block fetch table */
9368d37ffbe4SRobert Elliott static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h)
9369aca9012aSStephen M. Cameron {
9370d9a729f3SWebb Scales 	int rc;
9371d9a729f3SWebb Scales 
9372aca9012aSStephen M. Cameron 	/* Allocate ioaccel2 mode command blocks and block fetch table */
9373aca9012aSStephen M. Cameron 
9374aca9012aSStephen M. Cameron 	h->ioaccel_maxsg =
9375aca9012aSStephen M. Cameron 		readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
9376aca9012aSStephen M. Cameron 	if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES)
9377aca9012aSStephen M. Cameron 		h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES;
9378aca9012aSStephen M. Cameron 
9379aca9012aSStephen M. Cameron 	BUILD_BUG_ON(sizeof(struct io_accel2_cmd) %
9380aca9012aSStephen M. Cameron 			IOACCEL2_COMMANDLIST_ALIGNMENT);
9381aca9012aSStephen M. Cameron 	h->ioaccel2_cmd_pool =
9382aca9012aSStephen M. Cameron 		pci_alloc_consistent(h->pdev,
9383aca9012aSStephen M. Cameron 			h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
9384aca9012aSStephen M. Cameron 			&(h->ioaccel2_cmd_pool_dhandle));
9385aca9012aSStephen M. Cameron 
9386aca9012aSStephen M. Cameron 	h->ioaccel2_blockFetchTable =
9387aca9012aSStephen M. Cameron 		kmalloc(((h->ioaccel_maxsg + 1) *
9388aca9012aSStephen M. Cameron 				sizeof(u32)), GFP_KERNEL);
9389aca9012aSStephen M. Cameron 
9390aca9012aSStephen M. Cameron 	if ((h->ioaccel2_cmd_pool == NULL) ||
9391d9a729f3SWebb Scales 		(h->ioaccel2_blockFetchTable == NULL)) {
9392d9a729f3SWebb Scales 		rc = -ENOMEM;
9393d9a729f3SWebb Scales 		goto clean_up;
9394d9a729f3SWebb Scales 	}
9395d9a729f3SWebb Scales 
9396d9a729f3SWebb Scales 	rc = hpsa_allocate_ioaccel2_sg_chain_blocks(h);
9397d9a729f3SWebb Scales 	if (rc)
9398aca9012aSStephen M. Cameron 		goto clean_up;
9399aca9012aSStephen M. Cameron 
9400aca9012aSStephen M. Cameron 	memset(h->ioaccel2_cmd_pool, 0,
9401aca9012aSStephen M. Cameron 		h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool));
9402aca9012aSStephen M. Cameron 	return 0;
9403aca9012aSStephen M. Cameron 
9404aca9012aSStephen M. Cameron clean_up:
94051fb7c98aSRobert Elliott 	hpsa_free_ioaccel2_cmd_and_bft(h);
9406d9a729f3SWebb Scales 	return rc;
9407aca9012aSStephen M. Cameron }
9408aca9012aSStephen M. Cameron 
9409105a3dbcSRobert Elliott /* Free items allocated by hpsa_put_ctlr_into_performant_mode */
9410105a3dbcSRobert Elliott static void hpsa_free_performant_mode(struct ctlr_info *h)
9411105a3dbcSRobert Elliott {
9412105a3dbcSRobert Elliott 	kfree(h->blockFetchTable);
9413105a3dbcSRobert Elliott 	h->blockFetchTable = NULL;
9414105a3dbcSRobert Elliott 	hpsa_free_reply_queues(h);
9415105a3dbcSRobert Elliott 	hpsa_free_ioaccel1_cmd_and_bft(h);
9416105a3dbcSRobert Elliott 	hpsa_free_ioaccel2_cmd_and_bft(h);
9417105a3dbcSRobert Elliott }
9418105a3dbcSRobert Elliott 
9419105a3dbcSRobert Elliott /* return -ENODEV on error, 0 on success (or no action)
9420105a3dbcSRobert Elliott  * allocates numerous items that must be freed later
9421105a3dbcSRobert Elliott  */
9422105a3dbcSRobert Elliott static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
94236c311b57SStephen M. Cameron {
94246c311b57SStephen M. Cameron 	u32 trans_support;
9425e1f7de0cSMatt Gates 	unsigned long transMethod = CFGTBL_Trans_Performant |
9426e1f7de0cSMatt Gates 					CFGTBL_Trans_use_short_tags;
9427105a3dbcSRobert Elliott 	int i, rc;
94286c311b57SStephen M. Cameron 
942902ec19c8SStephen M. Cameron 	if (hpsa_simple_mode)
9430105a3dbcSRobert Elliott 		return 0;
943102ec19c8SStephen M. Cameron 
943267c99a72Sscameron@beardog.cce.hp.com 	trans_support = readl(&(h->cfgtable->TransportSupport));
943367c99a72Sscameron@beardog.cce.hp.com 	if (!(trans_support & PERFORMANT_MODE))
9434105a3dbcSRobert Elliott 		return 0;
943567c99a72Sscameron@beardog.cce.hp.com 
9436e1f7de0cSMatt Gates 	/* Check for I/O accelerator mode support */
9437e1f7de0cSMatt Gates 	if (trans_support & CFGTBL_Trans_io_accel1) {
9438e1f7de0cSMatt Gates 		transMethod |= CFGTBL_Trans_io_accel1 |
9439e1f7de0cSMatt Gates 				CFGTBL_Trans_enable_directed_msix;
9440105a3dbcSRobert Elliott 		rc = hpsa_alloc_ioaccel1_cmd_and_bft(h);
9441105a3dbcSRobert Elliott 		if (rc)
9442105a3dbcSRobert Elliott 			return rc;
9443105a3dbcSRobert Elliott 	} else if (trans_support & CFGTBL_Trans_io_accel2) {
9444aca9012aSStephen M. Cameron 		transMethod |= CFGTBL_Trans_io_accel2 |
9445aca9012aSStephen M. Cameron 				CFGTBL_Trans_enable_directed_msix;
9446105a3dbcSRobert Elliott 		rc = hpsa_alloc_ioaccel2_cmd_and_bft(h);
9447105a3dbcSRobert Elliott 		if (rc)
9448105a3dbcSRobert Elliott 			return rc;
9449e1f7de0cSMatt Gates 	}
9450e1f7de0cSMatt Gates 
9451eee0f03aSHannes Reinecke 	h->nreply_queues = h->msix_vector > 0 ? h->msix_vector : 1;
9452cba3d38bSStephen M. Cameron 	hpsa_get_max_perf_mode_cmds(h);
94536c311b57SStephen M. Cameron 	/* Performant mode ring buffer and supporting data structures */
9454072b0518SStephen M. Cameron 	h->reply_queue_size = h->max_commands * sizeof(u64);
94556c311b57SStephen M. Cameron 
9456254f796bSMatt Gates 	for (i = 0; i < h->nreply_queues; i++) {
9457072b0518SStephen M. Cameron 		h->reply_queue[i].head = pci_alloc_consistent(h->pdev,
9458072b0518SStephen M. Cameron 						h->reply_queue_size,
9459072b0518SStephen M. Cameron 						&(h->reply_queue[i].busaddr));
9460105a3dbcSRobert Elliott 		if (!h->reply_queue[i].head) {
9461105a3dbcSRobert Elliott 			rc = -ENOMEM;
9462105a3dbcSRobert Elliott 			goto clean1;	/* rq, ioaccel */
9463105a3dbcSRobert Elliott 		}
9464254f796bSMatt Gates 		h->reply_queue[i].size = h->max_commands;
9465254f796bSMatt Gates 		h->reply_queue[i].wraparound = 1;  /* spec: init to 1 */
9466254f796bSMatt Gates 		h->reply_queue[i].current_entry = 0;
9467254f796bSMatt Gates 	}
9468254f796bSMatt Gates 
94696c311b57SStephen M. Cameron 	/* Need a block fetch table for performant mode */
9470d66ae08bSStephen M. Cameron 	h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
94716c311b57SStephen M. Cameron 				sizeof(u32)), GFP_KERNEL);
9472105a3dbcSRobert Elliott 	if (!h->blockFetchTable) {
9473105a3dbcSRobert Elliott 		rc = -ENOMEM;
9474105a3dbcSRobert Elliott 		goto clean1;	/* rq, ioaccel */
9475105a3dbcSRobert Elliott 	}
94766c311b57SStephen M. Cameron 
9477105a3dbcSRobert Elliott 	rc = hpsa_enter_performant_mode(h, trans_support);
9478105a3dbcSRobert Elliott 	if (rc)
9479105a3dbcSRobert Elliott 		goto clean2;	/* bft, rq, ioaccel */
9480105a3dbcSRobert Elliott 	return 0;
9481303932fdSDon Brace 
9482105a3dbcSRobert Elliott clean2:	/* bft, rq, ioaccel */
9483303932fdSDon Brace 	kfree(h->blockFetchTable);
9484105a3dbcSRobert Elliott 	h->blockFetchTable = NULL;
9485105a3dbcSRobert Elliott clean1:	/* rq, ioaccel */
9486105a3dbcSRobert Elliott 	hpsa_free_reply_queues(h);
9487105a3dbcSRobert Elliott 	hpsa_free_ioaccel1_cmd_and_bft(h);
9488105a3dbcSRobert Elliott 	hpsa_free_ioaccel2_cmd_and_bft(h);
9489105a3dbcSRobert Elliott 	return rc;
9490303932fdSDon Brace }
9491303932fdSDon Brace 
949223100dd9SStephen M. Cameron static int is_accelerated_cmd(struct CommandList *c)
949376438d08SStephen M. Cameron {
949423100dd9SStephen M. Cameron 	return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2;
949523100dd9SStephen M. Cameron }
949623100dd9SStephen M. Cameron 
949723100dd9SStephen M. Cameron static void hpsa_drain_accel_commands(struct ctlr_info *h)
949823100dd9SStephen M. Cameron {
949923100dd9SStephen M. Cameron 	struct CommandList *c = NULL;
9500f2405db8SDon Brace 	int i, accel_cmds_out;
9501281a7fd0SWebb Scales 	int refcount;
950276438d08SStephen M. Cameron 
9503f2405db8SDon Brace 	do { /* wait for all outstanding ioaccel commands to drain out */
950423100dd9SStephen M. Cameron 		accel_cmds_out = 0;
9505f2405db8SDon Brace 		for (i = 0; i < h->nr_cmds; i++) {
9506f2405db8SDon Brace 			c = h->cmd_pool + i;
9507281a7fd0SWebb Scales 			refcount = atomic_inc_return(&c->refcount);
9508281a7fd0SWebb Scales 			if (refcount > 1) /* Command is allocated */
950923100dd9SStephen M. Cameron 				accel_cmds_out += is_accelerated_cmd(c);
9510281a7fd0SWebb Scales 			cmd_free(h, c);
9511f2405db8SDon Brace 		}
951223100dd9SStephen M. Cameron 		if (accel_cmds_out <= 0)
951376438d08SStephen M. Cameron 			break;
951476438d08SStephen M. Cameron 		msleep(100);
951576438d08SStephen M. Cameron 	} while (1);
951676438d08SStephen M. Cameron }
951776438d08SStephen M. Cameron 
9518d04e62b9SKevin Barnett static struct hpsa_sas_phy *hpsa_alloc_sas_phy(
9519d04e62b9SKevin Barnett 				struct hpsa_sas_port *hpsa_sas_port)
9520d04e62b9SKevin Barnett {
9521d04e62b9SKevin Barnett 	struct hpsa_sas_phy *hpsa_sas_phy;
9522d04e62b9SKevin Barnett 	struct sas_phy *phy;
9523d04e62b9SKevin Barnett 
9524d04e62b9SKevin Barnett 	hpsa_sas_phy = kzalloc(sizeof(*hpsa_sas_phy), GFP_KERNEL);
9525d04e62b9SKevin Barnett 	if (!hpsa_sas_phy)
9526d04e62b9SKevin Barnett 		return NULL;
9527d04e62b9SKevin Barnett 
9528d04e62b9SKevin Barnett 	phy = sas_phy_alloc(hpsa_sas_port->parent_node->parent_dev,
9529d04e62b9SKevin Barnett 		hpsa_sas_port->next_phy_index);
9530d04e62b9SKevin Barnett 	if (!phy) {
9531d04e62b9SKevin Barnett 		kfree(hpsa_sas_phy);
9532d04e62b9SKevin Barnett 		return NULL;
9533d04e62b9SKevin Barnett 	}
9534d04e62b9SKevin Barnett 
9535d04e62b9SKevin Barnett 	hpsa_sas_port->next_phy_index++;
9536d04e62b9SKevin Barnett 	hpsa_sas_phy->phy = phy;
9537d04e62b9SKevin Barnett 	hpsa_sas_phy->parent_port = hpsa_sas_port;
9538d04e62b9SKevin Barnett 
9539d04e62b9SKevin Barnett 	return hpsa_sas_phy;
9540d04e62b9SKevin Barnett }
9541d04e62b9SKevin Barnett 
9542d04e62b9SKevin Barnett static void hpsa_free_sas_phy(struct hpsa_sas_phy *hpsa_sas_phy)
9543d04e62b9SKevin Barnett {
9544d04e62b9SKevin Barnett 	struct sas_phy *phy = hpsa_sas_phy->phy;
9545d04e62b9SKevin Barnett 
9546d04e62b9SKevin Barnett 	sas_port_delete_phy(hpsa_sas_phy->parent_port->port, phy);
9547d04e62b9SKevin Barnett 	sas_phy_free(phy);
9548d04e62b9SKevin Barnett 	if (hpsa_sas_phy->added_to_port)
9549d04e62b9SKevin Barnett 		list_del(&hpsa_sas_phy->phy_list_entry);
9550d04e62b9SKevin Barnett 	kfree(hpsa_sas_phy);
9551d04e62b9SKevin Barnett }
9552d04e62b9SKevin Barnett 
9553d04e62b9SKevin Barnett static int hpsa_sas_port_add_phy(struct hpsa_sas_phy *hpsa_sas_phy)
9554d04e62b9SKevin Barnett {
9555d04e62b9SKevin Barnett 	int rc;
9556d04e62b9SKevin Barnett 	struct hpsa_sas_port *hpsa_sas_port;
9557d04e62b9SKevin Barnett 	struct sas_phy *phy;
9558d04e62b9SKevin Barnett 	struct sas_identify *identify;
9559d04e62b9SKevin Barnett 
9560d04e62b9SKevin Barnett 	hpsa_sas_port = hpsa_sas_phy->parent_port;
9561d04e62b9SKevin Barnett 	phy = hpsa_sas_phy->phy;
9562d04e62b9SKevin Barnett 
9563d04e62b9SKevin Barnett 	identify = &phy->identify;
9564d04e62b9SKevin Barnett 	memset(identify, 0, sizeof(*identify));
9565d04e62b9SKevin Barnett 	identify->sas_address = hpsa_sas_port->sas_address;
9566d04e62b9SKevin Barnett 	identify->device_type = SAS_END_DEVICE;
9567d04e62b9SKevin Barnett 	identify->initiator_port_protocols = SAS_PROTOCOL_STP;
9568d04e62b9SKevin Barnett 	identify->target_port_protocols = SAS_PROTOCOL_STP;
9569d04e62b9SKevin Barnett 	phy->minimum_linkrate_hw = SAS_LINK_RATE_UNKNOWN;
9570d04e62b9SKevin Barnett 	phy->maximum_linkrate_hw = SAS_LINK_RATE_UNKNOWN;
9571d04e62b9SKevin Barnett 	phy->minimum_linkrate = SAS_LINK_RATE_UNKNOWN;
9572d04e62b9SKevin Barnett 	phy->maximum_linkrate = SAS_LINK_RATE_UNKNOWN;
9573d04e62b9SKevin Barnett 	phy->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN;
9574d04e62b9SKevin Barnett 
9575d04e62b9SKevin Barnett 	rc = sas_phy_add(hpsa_sas_phy->phy);
9576d04e62b9SKevin Barnett 	if (rc)
9577d04e62b9SKevin Barnett 		return rc;
9578d04e62b9SKevin Barnett 
9579d04e62b9SKevin Barnett 	sas_port_add_phy(hpsa_sas_port->port, hpsa_sas_phy->phy);
9580d04e62b9SKevin Barnett 	list_add_tail(&hpsa_sas_phy->phy_list_entry,
9581d04e62b9SKevin Barnett 			&hpsa_sas_port->phy_list_head);
9582d04e62b9SKevin Barnett 	hpsa_sas_phy->added_to_port = true;
9583d04e62b9SKevin Barnett 
9584d04e62b9SKevin Barnett 	return 0;
9585d04e62b9SKevin Barnett }
9586d04e62b9SKevin Barnett 
9587d04e62b9SKevin Barnett static int
9588d04e62b9SKevin Barnett 	hpsa_sas_port_add_rphy(struct hpsa_sas_port *hpsa_sas_port,
9589d04e62b9SKevin Barnett 				struct sas_rphy *rphy)
9590d04e62b9SKevin Barnett {
9591d04e62b9SKevin Barnett 	struct sas_identify *identify;
9592d04e62b9SKevin Barnett 
9593d04e62b9SKevin Barnett 	identify = &rphy->identify;
9594d04e62b9SKevin Barnett 	identify->sas_address = hpsa_sas_port->sas_address;
9595d04e62b9SKevin Barnett 	identify->initiator_port_protocols = SAS_PROTOCOL_STP;
9596d04e62b9SKevin Barnett 	identify->target_port_protocols = SAS_PROTOCOL_STP;
9597d04e62b9SKevin Barnett 
9598d04e62b9SKevin Barnett 	return sas_rphy_add(rphy);
9599d04e62b9SKevin Barnett }
9600d04e62b9SKevin Barnett 
9601d04e62b9SKevin Barnett static struct hpsa_sas_port
9602d04e62b9SKevin Barnett 	*hpsa_alloc_sas_port(struct hpsa_sas_node *hpsa_sas_node,
9603d04e62b9SKevin Barnett 				u64 sas_address)
9604d04e62b9SKevin Barnett {
9605d04e62b9SKevin Barnett 	int rc;
9606d04e62b9SKevin Barnett 	struct hpsa_sas_port *hpsa_sas_port;
9607d04e62b9SKevin Barnett 	struct sas_port *port;
9608d04e62b9SKevin Barnett 
9609d04e62b9SKevin Barnett 	hpsa_sas_port = kzalloc(sizeof(*hpsa_sas_port), GFP_KERNEL);
9610d04e62b9SKevin Barnett 	if (!hpsa_sas_port)
9611d04e62b9SKevin Barnett 		return NULL;
9612d04e62b9SKevin Barnett 
9613d04e62b9SKevin Barnett 	INIT_LIST_HEAD(&hpsa_sas_port->phy_list_head);
9614d04e62b9SKevin Barnett 	hpsa_sas_port->parent_node = hpsa_sas_node;
9615d04e62b9SKevin Barnett 
9616d04e62b9SKevin Barnett 	port = sas_port_alloc_num(hpsa_sas_node->parent_dev);
9617d04e62b9SKevin Barnett 	if (!port)
9618d04e62b9SKevin Barnett 		goto free_hpsa_port;
9619d04e62b9SKevin Barnett 
9620d04e62b9SKevin Barnett 	rc = sas_port_add(port);
9621d04e62b9SKevin Barnett 	if (rc)
9622d04e62b9SKevin Barnett 		goto free_sas_port;
9623d04e62b9SKevin Barnett 
9624d04e62b9SKevin Barnett 	hpsa_sas_port->port = port;
9625d04e62b9SKevin Barnett 	hpsa_sas_port->sas_address = sas_address;
9626d04e62b9SKevin Barnett 	list_add_tail(&hpsa_sas_port->port_list_entry,
9627d04e62b9SKevin Barnett 			&hpsa_sas_node->port_list_head);
9628d04e62b9SKevin Barnett 
9629d04e62b9SKevin Barnett 	return hpsa_sas_port;
9630d04e62b9SKevin Barnett 
9631d04e62b9SKevin Barnett free_sas_port:
9632d04e62b9SKevin Barnett 	sas_port_free(port);
9633d04e62b9SKevin Barnett free_hpsa_port:
9634d04e62b9SKevin Barnett 	kfree(hpsa_sas_port);
9635d04e62b9SKevin Barnett 
9636d04e62b9SKevin Barnett 	return NULL;
9637d04e62b9SKevin Barnett }
9638d04e62b9SKevin Barnett 
9639d04e62b9SKevin Barnett static void hpsa_free_sas_port(struct hpsa_sas_port *hpsa_sas_port)
9640d04e62b9SKevin Barnett {
9641d04e62b9SKevin Barnett 	struct hpsa_sas_phy *hpsa_sas_phy;
9642d04e62b9SKevin Barnett 	struct hpsa_sas_phy *next;
9643d04e62b9SKevin Barnett 
9644d04e62b9SKevin Barnett 	list_for_each_entry_safe(hpsa_sas_phy, next,
9645d04e62b9SKevin Barnett 			&hpsa_sas_port->phy_list_head, phy_list_entry)
9646d04e62b9SKevin Barnett 		hpsa_free_sas_phy(hpsa_sas_phy);
9647d04e62b9SKevin Barnett 
9648d04e62b9SKevin Barnett 	sas_port_delete(hpsa_sas_port->port);
9649d04e62b9SKevin Barnett 	list_del(&hpsa_sas_port->port_list_entry);
9650d04e62b9SKevin Barnett 	kfree(hpsa_sas_port);
9651d04e62b9SKevin Barnett }
9652d04e62b9SKevin Barnett 
9653d04e62b9SKevin Barnett static struct hpsa_sas_node *hpsa_alloc_sas_node(struct device *parent_dev)
9654d04e62b9SKevin Barnett {
9655d04e62b9SKevin Barnett 	struct hpsa_sas_node *hpsa_sas_node;
9656d04e62b9SKevin Barnett 
9657d04e62b9SKevin Barnett 	hpsa_sas_node = kzalloc(sizeof(*hpsa_sas_node), GFP_KERNEL);
9658d04e62b9SKevin Barnett 	if (hpsa_sas_node) {
9659d04e62b9SKevin Barnett 		hpsa_sas_node->parent_dev = parent_dev;
9660d04e62b9SKevin Barnett 		INIT_LIST_HEAD(&hpsa_sas_node->port_list_head);
9661d04e62b9SKevin Barnett 	}
9662d04e62b9SKevin Barnett 
9663d04e62b9SKevin Barnett 	return hpsa_sas_node;
9664d04e62b9SKevin Barnett }
9665d04e62b9SKevin Barnett 
9666d04e62b9SKevin Barnett static void hpsa_free_sas_node(struct hpsa_sas_node *hpsa_sas_node)
9667d04e62b9SKevin Barnett {
9668d04e62b9SKevin Barnett 	struct hpsa_sas_port *hpsa_sas_port;
9669d04e62b9SKevin Barnett 	struct hpsa_sas_port *next;
9670d04e62b9SKevin Barnett 
9671d04e62b9SKevin Barnett 	if (!hpsa_sas_node)
9672d04e62b9SKevin Barnett 		return;
9673d04e62b9SKevin Barnett 
9674d04e62b9SKevin Barnett 	list_for_each_entry_safe(hpsa_sas_port, next,
9675d04e62b9SKevin Barnett 			&hpsa_sas_node->port_list_head, port_list_entry)
9676d04e62b9SKevin Barnett 		hpsa_free_sas_port(hpsa_sas_port);
9677d04e62b9SKevin Barnett 
9678d04e62b9SKevin Barnett 	kfree(hpsa_sas_node);
9679d04e62b9SKevin Barnett }
9680d04e62b9SKevin Barnett 
9681d04e62b9SKevin Barnett static struct hpsa_scsi_dev_t
9682d04e62b9SKevin Barnett 	*hpsa_find_device_by_sas_rphy(struct ctlr_info *h,
9683d04e62b9SKevin Barnett 					struct sas_rphy *rphy)
9684d04e62b9SKevin Barnett {
9685d04e62b9SKevin Barnett 	int i;
9686d04e62b9SKevin Barnett 	struct hpsa_scsi_dev_t *device;
9687d04e62b9SKevin Barnett 
9688d04e62b9SKevin Barnett 	for (i = 0; i < h->ndevices; i++) {
9689d04e62b9SKevin Barnett 		device = h->dev[i];
9690d04e62b9SKevin Barnett 		if (!device->sas_port)
9691d04e62b9SKevin Barnett 			continue;
9692d04e62b9SKevin Barnett 		if (device->sas_port->rphy == rphy)
9693d04e62b9SKevin Barnett 			return device;
9694d04e62b9SKevin Barnett 	}
9695d04e62b9SKevin Barnett 
9696d04e62b9SKevin Barnett 	return NULL;
9697d04e62b9SKevin Barnett }
9698d04e62b9SKevin Barnett 
9699d04e62b9SKevin Barnett static int hpsa_add_sas_host(struct ctlr_info *h)
9700d04e62b9SKevin Barnett {
9701d04e62b9SKevin Barnett 	int rc;
9702d04e62b9SKevin Barnett 	struct device *parent_dev;
9703d04e62b9SKevin Barnett 	struct hpsa_sas_node *hpsa_sas_node;
9704d04e62b9SKevin Barnett 	struct hpsa_sas_port *hpsa_sas_port;
9705d04e62b9SKevin Barnett 	struct hpsa_sas_phy *hpsa_sas_phy;
9706d04e62b9SKevin Barnett 
9707d04e62b9SKevin Barnett 	parent_dev = &h->scsi_host->shost_gendev;
9708d04e62b9SKevin Barnett 
9709d04e62b9SKevin Barnett 	hpsa_sas_node = hpsa_alloc_sas_node(parent_dev);
9710d04e62b9SKevin Barnett 	if (!hpsa_sas_node)
9711d04e62b9SKevin Barnett 		return -ENOMEM;
9712d04e62b9SKevin Barnett 
9713d04e62b9SKevin Barnett 	hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, h->sas_address);
9714d04e62b9SKevin Barnett 	if (!hpsa_sas_port) {
9715d04e62b9SKevin Barnett 		rc = -ENODEV;
9716d04e62b9SKevin Barnett 		goto free_sas_node;
9717d04e62b9SKevin Barnett 	}
9718d04e62b9SKevin Barnett 
9719d04e62b9SKevin Barnett 	hpsa_sas_phy = hpsa_alloc_sas_phy(hpsa_sas_port);
9720d04e62b9SKevin Barnett 	if (!hpsa_sas_phy) {
9721d04e62b9SKevin Barnett 		rc = -ENODEV;
9722d04e62b9SKevin Barnett 		goto free_sas_port;
9723d04e62b9SKevin Barnett 	}
9724d04e62b9SKevin Barnett 
9725d04e62b9SKevin Barnett 	rc = hpsa_sas_port_add_phy(hpsa_sas_phy);
9726d04e62b9SKevin Barnett 	if (rc)
9727d04e62b9SKevin Barnett 		goto free_sas_phy;
9728d04e62b9SKevin Barnett 
9729d04e62b9SKevin Barnett 	h->sas_host = hpsa_sas_node;
9730d04e62b9SKevin Barnett 
9731d04e62b9SKevin Barnett 	return 0;
9732d04e62b9SKevin Barnett 
9733d04e62b9SKevin Barnett free_sas_phy:
9734d04e62b9SKevin Barnett 	hpsa_free_sas_phy(hpsa_sas_phy);
9735d04e62b9SKevin Barnett free_sas_port:
9736d04e62b9SKevin Barnett 	hpsa_free_sas_port(hpsa_sas_port);
9737d04e62b9SKevin Barnett free_sas_node:
9738d04e62b9SKevin Barnett 	hpsa_free_sas_node(hpsa_sas_node);
9739d04e62b9SKevin Barnett 
9740d04e62b9SKevin Barnett 	return rc;
9741d04e62b9SKevin Barnett }
9742d04e62b9SKevin Barnett 
9743d04e62b9SKevin Barnett static void hpsa_delete_sas_host(struct ctlr_info *h)
9744d04e62b9SKevin Barnett {
9745d04e62b9SKevin Barnett 	hpsa_free_sas_node(h->sas_host);
9746d04e62b9SKevin Barnett }
9747d04e62b9SKevin Barnett 
9748d04e62b9SKevin Barnett static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node,
9749d04e62b9SKevin Barnett 				struct hpsa_scsi_dev_t *device)
9750d04e62b9SKevin Barnett {
9751d04e62b9SKevin Barnett 	int rc;
9752d04e62b9SKevin Barnett 	struct hpsa_sas_port *hpsa_sas_port;
9753d04e62b9SKevin Barnett 	struct sas_rphy *rphy;
9754d04e62b9SKevin Barnett 
9755d04e62b9SKevin Barnett 	hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, device->sas_address);
9756d04e62b9SKevin Barnett 	if (!hpsa_sas_port)
9757d04e62b9SKevin Barnett 		return -ENOMEM;
9758d04e62b9SKevin Barnett 
9759d04e62b9SKevin Barnett 	rphy = sas_end_device_alloc(hpsa_sas_port->port);
9760d04e62b9SKevin Barnett 	if (!rphy) {
9761d04e62b9SKevin Barnett 		rc = -ENODEV;
9762d04e62b9SKevin Barnett 		goto free_sas_port;
9763d04e62b9SKevin Barnett 	}
9764d04e62b9SKevin Barnett 
9765d04e62b9SKevin Barnett 	hpsa_sas_port->rphy = rphy;
9766d04e62b9SKevin Barnett 	device->sas_port = hpsa_sas_port;
9767d04e62b9SKevin Barnett 
9768d04e62b9SKevin Barnett 	rc = hpsa_sas_port_add_rphy(hpsa_sas_port, rphy);
9769d04e62b9SKevin Barnett 	if (rc)
9770d04e62b9SKevin Barnett 		goto free_sas_port;
9771d04e62b9SKevin Barnett 
9772d04e62b9SKevin Barnett 	return 0;
9773d04e62b9SKevin Barnett 
9774d04e62b9SKevin Barnett free_sas_port:
9775d04e62b9SKevin Barnett 	hpsa_free_sas_port(hpsa_sas_port);
9776d04e62b9SKevin Barnett 	device->sas_port = NULL;
9777d04e62b9SKevin Barnett 
9778d04e62b9SKevin Barnett 	return rc;
9779d04e62b9SKevin Barnett }
9780d04e62b9SKevin Barnett 
9781d04e62b9SKevin Barnett static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device)
9782d04e62b9SKevin Barnett {
9783d04e62b9SKevin Barnett 	if (device->sas_port) {
9784d04e62b9SKevin Barnett 		hpsa_free_sas_port(device->sas_port);
9785d04e62b9SKevin Barnett 		device->sas_port = NULL;
9786d04e62b9SKevin Barnett 	}
9787d04e62b9SKevin Barnett }
9788d04e62b9SKevin Barnett 
9789d04e62b9SKevin Barnett static int
9790d04e62b9SKevin Barnett hpsa_sas_get_linkerrors(struct sas_phy *phy)
9791d04e62b9SKevin Barnett {
9792d04e62b9SKevin Barnett 	return 0;
9793d04e62b9SKevin Barnett }
9794d04e62b9SKevin Barnett 
9795d04e62b9SKevin Barnett static int
9796d04e62b9SKevin Barnett hpsa_sas_get_enclosure_identifier(struct sas_rphy *rphy, u64 *identifier)
9797d04e62b9SKevin Barnett {
9798aa105695SDan Carpenter 	*identifier = 0;
9799d04e62b9SKevin Barnett 	return 0;
9800d04e62b9SKevin Barnett }
9801d04e62b9SKevin Barnett 
9802d04e62b9SKevin Barnett static int
9803d04e62b9SKevin Barnett hpsa_sas_get_bay_identifier(struct sas_rphy *rphy)
9804d04e62b9SKevin Barnett {
9805d04e62b9SKevin Barnett 	return -ENXIO;
9806d04e62b9SKevin Barnett }
9807d04e62b9SKevin Barnett 
9808d04e62b9SKevin Barnett static int
9809d04e62b9SKevin Barnett hpsa_sas_phy_reset(struct sas_phy *phy, int hard_reset)
9810d04e62b9SKevin Barnett {
9811d04e62b9SKevin Barnett 	return 0;
9812d04e62b9SKevin Barnett }
9813d04e62b9SKevin Barnett 
9814d04e62b9SKevin Barnett static int
9815d04e62b9SKevin Barnett hpsa_sas_phy_enable(struct sas_phy *phy, int enable)
9816d04e62b9SKevin Barnett {
9817d04e62b9SKevin Barnett 	return 0;
9818d04e62b9SKevin Barnett }
9819d04e62b9SKevin Barnett 
9820d04e62b9SKevin Barnett static int
9821d04e62b9SKevin Barnett hpsa_sas_phy_setup(struct sas_phy *phy)
9822d04e62b9SKevin Barnett {
9823d04e62b9SKevin Barnett 	return 0;
9824d04e62b9SKevin Barnett }
9825d04e62b9SKevin Barnett 
9826d04e62b9SKevin Barnett static void
9827d04e62b9SKevin Barnett hpsa_sas_phy_release(struct sas_phy *phy)
9828d04e62b9SKevin Barnett {
9829d04e62b9SKevin Barnett }
9830d04e62b9SKevin Barnett 
9831d04e62b9SKevin Barnett static int
9832d04e62b9SKevin Barnett hpsa_sas_phy_speed(struct sas_phy *phy, struct sas_phy_linkrates *rates)
9833d04e62b9SKevin Barnett {
9834d04e62b9SKevin Barnett 	return -EINVAL;
9835d04e62b9SKevin Barnett }
9836d04e62b9SKevin Barnett 
9837d04e62b9SKevin Barnett /* SMP = Serial Management Protocol */
9838d04e62b9SKevin Barnett static int
9839d04e62b9SKevin Barnett hpsa_sas_smp_handler(struct Scsi_Host *shost, struct sas_rphy *rphy,
9840d04e62b9SKevin Barnett struct request *req)
9841d04e62b9SKevin Barnett {
9842d04e62b9SKevin Barnett 	return -EINVAL;
9843d04e62b9SKevin Barnett }
9844d04e62b9SKevin Barnett 
9845d04e62b9SKevin Barnett static struct sas_function_template hpsa_sas_transport_functions = {
9846d04e62b9SKevin Barnett 	.get_linkerrors = hpsa_sas_get_linkerrors,
9847d04e62b9SKevin Barnett 	.get_enclosure_identifier = hpsa_sas_get_enclosure_identifier,
9848d04e62b9SKevin Barnett 	.get_bay_identifier = hpsa_sas_get_bay_identifier,
9849d04e62b9SKevin Barnett 	.phy_reset = hpsa_sas_phy_reset,
9850d04e62b9SKevin Barnett 	.phy_enable = hpsa_sas_phy_enable,
9851d04e62b9SKevin Barnett 	.phy_setup = hpsa_sas_phy_setup,
9852d04e62b9SKevin Barnett 	.phy_release = hpsa_sas_phy_release,
9853d04e62b9SKevin Barnett 	.set_phy_speed = hpsa_sas_phy_speed,
9854d04e62b9SKevin Barnett 	.smp_handler = hpsa_sas_smp_handler,
9855d04e62b9SKevin Barnett };
9856d04e62b9SKevin Barnett 
9857edd16368SStephen M. Cameron /*
9858edd16368SStephen M. Cameron  *  This is it.  Register the PCI driver information for the cards we control
9859edd16368SStephen M. Cameron  *  the OS will call our registered routines when it finds one of our cards.
9860edd16368SStephen M. Cameron  */
9861edd16368SStephen M. Cameron static int __init hpsa_init(void)
9862edd16368SStephen M. Cameron {
9863d04e62b9SKevin Barnett 	int rc;
9864d04e62b9SKevin Barnett 
9865d04e62b9SKevin Barnett 	hpsa_sas_transport_template =
9866d04e62b9SKevin Barnett 		sas_attach_transport(&hpsa_sas_transport_functions);
9867d04e62b9SKevin Barnett 	if (!hpsa_sas_transport_template)
9868d04e62b9SKevin Barnett 		return -ENODEV;
9869d04e62b9SKevin Barnett 
9870d04e62b9SKevin Barnett 	rc = pci_register_driver(&hpsa_pci_driver);
9871d04e62b9SKevin Barnett 
9872d04e62b9SKevin Barnett 	if (rc)
9873d04e62b9SKevin Barnett 		sas_release_transport(hpsa_sas_transport_template);
9874d04e62b9SKevin Barnett 
9875d04e62b9SKevin Barnett 	return rc;
9876edd16368SStephen M. Cameron }
9877edd16368SStephen M. Cameron 
9878edd16368SStephen M. Cameron static void __exit hpsa_cleanup(void)
9879edd16368SStephen M. Cameron {
9880edd16368SStephen M. Cameron 	pci_unregister_driver(&hpsa_pci_driver);
9881d04e62b9SKevin Barnett 	sas_release_transport(hpsa_sas_transport_template);
9882edd16368SStephen M. Cameron }
9883edd16368SStephen M. Cameron 
9884e1f7de0cSMatt Gates static void __attribute__((unused)) verify_offsets(void)
9885e1f7de0cSMatt Gates {
9886e1f7de0cSMatt Gates #define VERIFY_OFFSET(member, offset) \
9887dd0e19f3SScott Teel 	BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset)
9888dd0e19f3SScott Teel 
9889dd0e19f3SScott Teel 	VERIFY_OFFSET(structure_size, 0);
9890dd0e19f3SScott Teel 	VERIFY_OFFSET(volume_blk_size, 4);
9891dd0e19f3SScott Teel 	VERIFY_OFFSET(volume_blk_cnt, 8);
9892dd0e19f3SScott Teel 	VERIFY_OFFSET(phys_blk_shift, 16);
9893dd0e19f3SScott Teel 	VERIFY_OFFSET(parity_rotation_shift, 17);
9894dd0e19f3SScott Teel 	VERIFY_OFFSET(strip_size, 18);
9895dd0e19f3SScott Teel 	VERIFY_OFFSET(disk_starting_blk, 20);
9896dd0e19f3SScott Teel 	VERIFY_OFFSET(disk_blk_cnt, 28);
9897dd0e19f3SScott Teel 	VERIFY_OFFSET(data_disks_per_row, 36);
9898dd0e19f3SScott Teel 	VERIFY_OFFSET(metadata_disks_per_row, 38);
9899dd0e19f3SScott Teel 	VERIFY_OFFSET(row_cnt, 40);
9900dd0e19f3SScott Teel 	VERIFY_OFFSET(layout_map_count, 42);
9901dd0e19f3SScott Teel 	VERIFY_OFFSET(flags, 44);
9902dd0e19f3SScott Teel 	VERIFY_OFFSET(dekindex, 46);
9903dd0e19f3SScott Teel 	/* VERIFY_OFFSET(reserved, 48 */
9904dd0e19f3SScott Teel 	VERIFY_OFFSET(data, 64);
9905dd0e19f3SScott Teel 
9906dd0e19f3SScott Teel #undef VERIFY_OFFSET
9907dd0e19f3SScott Teel 
9908dd0e19f3SScott Teel #define VERIFY_OFFSET(member, offset) \
9909b66cc250SMike Miller 	BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset)
9910b66cc250SMike Miller 
9911b66cc250SMike Miller 	VERIFY_OFFSET(IU_type, 0);
9912b66cc250SMike Miller 	VERIFY_OFFSET(direction, 1);
9913b66cc250SMike Miller 	VERIFY_OFFSET(reply_queue, 2);
9914b66cc250SMike Miller 	/* VERIFY_OFFSET(reserved1, 3);  */
9915b66cc250SMike Miller 	VERIFY_OFFSET(scsi_nexus, 4);
9916b66cc250SMike Miller 	VERIFY_OFFSET(Tag, 8);
9917b66cc250SMike Miller 	VERIFY_OFFSET(cdb, 16);
9918b66cc250SMike Miller 	VERIFY_OFFSET(cciss_lun, 32);
9919b66cc250SMike Miller 	VERIFY_OFFSET(data_len, 40);
9920b66cc250SMike Miller 	VERIFY_OFFSET(cmd_priority_task_attr, 44);
9921b66cc250SMike Miller 	VERIFY_OFFSET(sg_count, 45);
9922b66cc250SMike Miller 	/* VERIFY_OFFSET(reserved3 */
9923b66cc250SMike Miller 	VERIFY_OFFSET(err_ptr, 48);
9924b66cc250SMike Miller 	VERIFY_OFFSET(err_len, 56);
9925b66cc250SMike Miller 	/* VERIFY_OFFSET(reserved4  */
9926b66cc250SMike Miller 	VERIFY_OFFSET(sg, 64);
9927b66cc250SMike Miller 
9928b66cc250SMike Miller #undef VERIFY_OFFSET
9929b66cc250SMike Miller 
9930b66cc250SMike Miller #define VERIFY_OFFSET(member, offset) \
9931e1f7de0cSMatt Gates 	BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset)
9932e1f7de0cSMatt Gates 
9933e1f7de0cSMatt Gates 	VERIFY_OFFSET(dev_handle, 0x00);
9934e1f7de0cSMatt Gates 	VERIFY_OFFSET(reserved1, 0x02);
9935e1f7de0cSMatt Gates 	VERIFY_OFFSET(function, 0x03);
9936e1f7de0cSMatt Gates 	VERIFY_OFFSET(reserved2, 0x04);
9937e1f7de0cSMatt Gates 	VERIFY_OFFSET(err_info, 0x0C);
9938e1f7de0cSMatt Gates 	VERIFY_OFFSET(reserved3, 0x10);
9939e1f7de0cSMatt Gates 	VERIFY_OFFSET(err_info_len, 0x12);
9940e1f7de0cSMatt Gates 	VERIFY_OFFSET(reserved4, 0x13);
9941e1f7de0cSMatt Gates 	VERIFY_OFFSET(sgl_offset, 0x14);
9942e1f7de0cSMatt Gates 	VERIFY_OFFSET(reserved5, 0x15);
9943e1f7de0cSMatt Gates 	VERIFY_OFFSET(transfer_len, 0x1C);
9944e1f7de0cSMatt Gates 	VERIFY_OFFSET(reserved6, 0x20);
9945e1f7de0cSMatt Gates 	VERIFY_OFFSET(io_flags, 0x24);
9946e1f7de0cSMatt Gates 	VERIFY_OFFSET(reserved7, 0x26);
9947e1f7de0cSMatt Gates 	VERIFY_OFFSET(LUN, 0x34);
9948e1f7de0cSMatt Gates 	VERIFY_OFFSET(control, 0x3C);
9949e1f7de0cSMatt Gates 	VERIFY_OFFSET(CDB, 0x40);
9950e1f7de0cSMatt Gates 	VERIFY_OFFSET(reserved8, 0x50);
9951e1f7de0cSMatt Gates 	VERIFY_OFFSET(host_context_flags, 0x60);
9952e1f7de0cSMatt Gates 	VERIFY_OFFSET(timeout_sec, 0x62);
9953e1f7de0cSMatt Gates 	VERIFY_OFFSET(ReplyQueue, 0x64);
9954e1f7de0cSMatt Gates 	VERIFY_OFFSET(reserved9, 0x65);
995550a0decfSStephen M. Cameron 	VERIFY_OFFSET(tag, 0x68);
9956e1f7de0cSMatt Gates 	VERIFY_OFFSET(host_addr, 0x70);
9957e1f7de0cSMatt Gates 	VERIFY_OFFSET(CISS_LUN, 0x78);
9958e1f7de0cSMatt Gates 	VERIFY_OFFSET(SG, 0x78 + 8);
9959e1f7de0cSMatt Gates #undef VERIFY_OFFSET
9960e1f7de0cSMatt Gates }
9961e1f7de0cSMatt Gates 
9962edd16368SStephen M. Cameron module_init(hpsa_init);
9963edd16368SStephen M. Cameron module_exit(hpsa_cleanup);
9964