1edd16368SStephen M. Cameron /* 2edd16368SStephen M. Cameron * Disk Array driver for HP Smart Array SAS controllers 31358f6dcSDon Brace * Copyright 2014-2015 PMC-Sierra, Inc. 41358f6dcSDon Brace * Copyright 2000,2009-2015 Hewlett-Packard Development Company, L.P. 5edd16368SStephen M. Cameron * 6edd16368SStephen M. Cameron * This program is free software; you can redistribute it and/or modify 7edd16368SStephen M. Cameron * it under the terms of the GNU General Public License as published by 8edd16368SStephen M. Cameron * the Free Software Foundation; version 2 of the License. 9edd16368SStephen M. Cameron * 10edd16368SStephen M. Cameron * This program is distributed in the hope that it will be useful, 11edd16368SStephen M. Cameron * but WITHOUT ANY WARRANTY; without even the implied warranty of 12edd16368SStephen M. Cameron * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or 13edd16368SStephen M. Cameron * NON INFRINGEMENT. See the GNU General Public License for more details. 14edd16368SStephen M. Cameron * 151358f6dcSDon Brace * Questions/Comments/Bugfixes to storagedev@pmcs.com 16edd16368SStephen M. Cameron * 17edd16368SStephen M. Cameron */ 18edd16368SStephen M. Cameron 19edd16368SStephen M. Cameron #include <linux/module.h> 20edd16368SStephen M. Cameron #include <linux/interrupt.h> 21edd16368SStephen M. Cameron #include <linux/types.h> 22edd16368SStephen M. Cameron #include <linux/pci.h> 23e5a44df8SMatthew Garrett #include <linux/pci-aspm.h> 24edd16368SStephen M. Cameron #include <linux/kernel.h> 25edd16368SStephen M. Cameron #include <linux/slab.h> 26edd16368SStephen M. Cameron #include <linux/delay.h> 27edd16368SStephen M. Cameron #include <linux/fs.h> 28edd16368SStephen M. Cameron #include <linux/timer.h> 29edd16368SStephen M. Cameron #include <linux/init.h> 30edd16368SStephen M. Cameron #include <linux/spinlock.h> 31edd16368SStephen M. Cameron #include <linux/compat.h> 32edd16368SStephen M. Cameron #include <linux/blktrace_api.h> 33edd16368SStephen M. Cameron #include <linux/uaccess.h> 34edd16368SStephen M. Cameron #include <linux/io.h> 35edd16368SStephen M. Cameron #include <linux/dma-mapping.h> 36edd16368SStephen M. Cameron #include <linux/completion.h> 37edd16368SStephen M. Cameron #include <linux/moduleparam.h> 38edd16368SStephen M. Cameron #include <scsi/scsi.h> 39edd16368SStephen M. Cameron #include <scsi/scsi_cmnd.h> 40edd16368SStephen M. Cameron #include <scsi/scsi_device.h> 41edd16368SStephen M. Cameron #include <scsi/scsi_host.h> 42667e23d4SStephen M. Cameron #include <scsi/scsi_tcq.h> 439437ac43SStephen Cameron #include <scsi/scsi_eh.h> 44*d04e62b9SKevin Barnett #include <scsi/scsi_transport_sas.h> 4573153fe5SWebb Scales #include <scsi/scsi_dbg.h> 46edd16368SStephen M. Cameron #include <linux/cciss_ioctl.h> 47edd16368SStephen M. Cameron #include <linux/string.h> 48edd16368SStephen M. Cameron #include <linux/bitmap.h> 4960063497SArun Sharma #include <linux/atomic.h> 50a0c12413SStephen M. Cameron #include <linux/jiffies.h> 5142a91641SDon Brace #include <linux/percpu-defs.h> 52094963daSStephen M. Cameron #include <linux/percpu.h> 532b08b3e9SDon Brace #include <asm/unaligned.h> 54283b4a9bSStephen M. Cameron #include <asm/div64.h> 55edd16368SStephen M. Cameron #include "hpsa_cmd.h" 56edd16368SStephen M. Cameron #include "hpsa.h" 57edd16368SStephen M. Cameron 58edd16368SStephen M. Cameron /* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */ 59f532a3f9SDon Brace #define HPSA_DRIVER_VERSION "3.4.10-0" 60edd16368SStephen M. Cameron #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")" 61f79cfec6SStephen M. Cameron #define HPSA "hpsa" 62edd16368SStephen M. Cameron 63007e7aa9SRobert Elliott /* How long to wait for CISS doorbell communication */ 64007e7aa9SRobert Elliott #define CLEAR_EVENT_WAIT_INTERVAL 20 /* ms for each msleep() call */ 65007e7aa9SRobert Elliott #define MODE_CHANGE_WAIT_INTERVAL 10 /* ms for each msleep() call */ 66007e7aa9SRobert Elliott #define MAX_CLEAR_EVENT_WAIT 30000 /* times 20 ms = 600 s */ 67007e7aa9SRobert Elliott #define MAX_MODE_CHANGE_WAIT 2000 /* times 10 ms = 20 s */ 68edd16368SStephen M. Cameron #define MAX_IOCTL_CONFIG_WAIT 1000 69edd16368SStephen M. Cameron 70edd16368SStephen M. Cameron /*define how many times we will try a command because of bus resets */ 71edd16368SStephen M. Cameron #define MAX_CMD_RETRIES 3 72edd16368SStephen M. Cameron 73edd16368SStephen M. Cameron /* Embedded module documentation macros - see modules.h */ 74edd16368SStephen M. Cameron MODULE_AUTHOR("Hewlett-Packard Company"); 75edd16368SStephen M. Cameron MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \ 76edd16368SStephen M. Cameron HPSA_DRIVER_VERSION); 77edd16368SStephen M. Cameron MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers"); 78edd16368SStephen M. Cameron MODULE_VERSION(HPSA_DRIVER_VERSION); 79edd16368SStephen M. Cameron MODULE_LICENSE("GPL"); 80edd16368SStephen M. Cameron 81edd16368SStephen M. Cameron static int hpsa_allow_any; 82edd16368SStephen M. Cameron module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR); 83edd16368SStephen M. Cameron MODULE_PARM_DESC(hpsa_allow_any, 84edd16368SStephen M. Cameron "Allow hpsa driver to access unknown HP Smart Array hardware"); 8502ec19c8SStephen M. Cameron static int hpsa_simple_mode; 8602ec19c8SStephen M. Cameron module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR); 8702ec19c8SStephen M. Cameron MODULE_PARM_DESC(hpsa_simple_mode, 8802ec19c8SStephen M. Cameron "Use 'simple mode' rather than 'performant mode'"); 89edd16368SStephen M. Cameron 90edd16368SStephen M. Cameron /* define the PCI info for the cards we can control */ 91edd16368SStephen M. Cameron static const struct pci_device_id hpsa_pci_device_id[] = { 92edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241}, 93edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243}, 94edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245}, 95edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247}, 96edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249}, 97163dbcd8SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A}, 98163dbcd8SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B}, 99f8b01eb9SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233}, 1009143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350}, 1019143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351}, 1029143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352}, 1039143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353}, 1049143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354}, 1059143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355}, 1069143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356}, 107fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1921}, 108fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1922}, 109fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1923}, 110fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1924}, 111fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1926}, 112fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1928}, 11397b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1929}, 11497b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BD}, 11597b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BE}, 11697b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BF}, 11797b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C0}, 11897b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C1}, 11997b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C2}, 12097b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C3}, 12197b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C4}, 12297b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C5}, 1233b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C6}, 12497b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C7}, 12597b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C8}, 12697b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C9}, 1273b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CA}, 1283b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CB}, 1293b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CC}, 1303b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CD}, 1313b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CE}, 132fdfa4b6dSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0580}, 133cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0581}, 134cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0582}, 135cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0583}, 136cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0584}, 137cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0585}, 1388e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076}, 1398e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087}, 1408e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D}, 1418e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088}, 1428e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f}, 143edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 144edd16368SStephen M. Cameron PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0}, 145edd16368SStephen M. Cameron {0,} 146edd16368SStephen M. Cameron }; 147edd16368SStephen M. Cameron 148edd16368SStephen M. Cameron MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id); 149edd16368SStephen M. Cameron 150edd16368SStephen M. Cameron /* board_id = Subsystem Device ID & Vendor ID 151edd16368SStephen M. Cameron * product = Marketing Name for the board 152edd16368SStephen M. Cameron * access = Address of the struct of function pointers 153edd16368SStephen M. Cameron */ 154edd16368SStephen M. Cameron static struct board_type products[] = { 155edd16368SStephen M. Cameron {0x3241103C, "Smart Array P212", &SA5_access}, 156edd16368SStephen M. Cameron {0x3243103C, "Smart Array P410", &SA5_access}, 157edd16368SStephen M. Cameron {0x3245103C, "Smart Array P410i", &SA5_access}, 158edd16368SStephen M. Cameron {0x3247103C, "Smart Array P411", &SA5_access}, 159edd16368SStephen M. Cameron {0x3249103C, "Smart Array P812", &SA5_access}, 160163dbcd8SMike Miller {0x324A103C, "Smart Array P712m", &SA5_access}, 161163dbcd8SMike Miller {0x324B103C, "Smart Array P711m", &SA5_access}, 1627d2cce58SStephen M. Cameron {0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */ 163fe0c9610SMike Miller {0x3350103C, "Smart Array P222", &SA5_access}, 164fe0c9610SMike Miller {0x3351103C, "Smart Array P420", &SA5_access}, 165fe0c9610SMike Miller {0x3352103C, "Smart Array P421", &SA5_access}, 166fe0c9610SMike Miller {0x3353103C, "Smart Array P822", &SA5_access}, 167fe0c9610SMike Miller {0x3354103C, "Smart Array P420i", &SA5_access}, 168fe0c9610SMike Miller {0x3355103C, "Smart Array P220i", &SA5_access}, 169fe0c9610SMike Miller {0x3356103C, "Smart Array P721m", &SA5_access}, 1701fd6c8e3SMike Miller {0x1921103C, "Smart Array P830i", &SA5_access}, 1711fd6c8e3SMike Miller {0x1922103C, "Smart Array P430", &SA5_access}, 1721fd6c8e3SMike Miller {0x1923103C, "Smart Array P431", &SA5_access}, 1731fd6c8e3SMike Miller {0x1924103C, "Smart Array P830", &SA5_access}, 1741fd6c8e3SMike Miller {0x1926103C, "Smart Array P731m", &SA5_access}, 1751fd6c8e3SMike Miller {0x1928103C, "Smart Array P230i", &SA5_access}, 1761fd6c8e3SMike Miller {0x1929103C, "Smart Array P530", &SA5_access}, 17727fb8137SDon Brace {0x21BD103C, "Smart Array P244br", &SA5_access}, 17827fb8137SDon Brace {0x21BE103C, "Smart Array P741m", &SA5_access}, 17927fb8137SDon Brace {0x21BF103C, "Smart HBA H240ar", &SA5_access}, 18027fb8137SDon Brace {0x21C0103C, "Smart Array P440ar", &SA5_access}, 181c8ae0ab1SDon Brace {0x21C1103C, "Smart Array P840ar", &SA5_access}, 18227fb8137SDon Brace {0x21C2103C, "Smart Array P440", &SA5_access}, 18327fb8137SDon Brace {0x21C3103C, "Smart Array P441", &SA5_access}, 18497b9f53dSMike Miller {0x21C4103C, "Smart Array", &SA5_access}, 18527fb8137SDon Brace {0x21C5103C, "Smart Array P841", &SA5_access}, 18627fb8137SDon Brace {0x21C6103C, "Smart HBA H244br", &SA5_access}, 18727fb8137SDon Brace {0x21C7103C, "Smart HBA H240", &SA5_access}, 18827fb8137SDon Brace {0x21C8103C, "Smart HBA H241", &SA5_access}, 18997b9f53dSMike Miller {0x21C9103C, "Smart Array", &SA5_access}, 19027fb8137SDon Brace {0x21CA103C, "Smart Array P246br", &SA5_access}, 19127fb8137SDon Brace {0x21CB103C, "Smart Array P840", &SA5_access}, 1923b7a45e5SJoe Handzik {0x21CC103C, "Smart Array", &SA5_access}, 1933b7a45e5SJoe Handzik {0x21CD103C, "Smart Array", &SA5_access}, 19427fb8137SDon Brace {0x21CE103C, "Smart HBA", &SA5_access}, 195fdfa4b6dSDon Brace {0x05809005, "SmartHBA-SA", &SA5_access}, 196cbb47dcbSDon Brace {0x05819005, "SmartHBA-SA 8i", &SA5_access}, 197cbb47dcbSDon Brace {0x05829005, "SmartHBA-SA 8i8e", &SA5_access}, 198cbb47dcbSDon Brace {0x05839005, "SmartHBA-SA 8e", &SA5_access}, 199cbb47dcbSDon Brace {0x05849005, "SmartHBA-SA 16i", &SA5_access}, 200cbb47dcbSDon Brace {0x05859005, "SmartHBA-SA 4i4e", &SA5_access}, 2018e616a5eSStephen M. Cameron {0x00761590, "HP Storage P1224 Array Controller", &SA5_access}, 2028e616a5eSStephen M. Cameron {0x00871590, "HP Storage P1224e Array Controller", &SA5_access}, 2038e616a5eSStephen M. Cameron {0x007D1590, "HP Storage P1228 Array Controller", &SA5_access}, 2048e616a5eSStephen M. Cameron {0x00881590, "HP Storage P1228e Array Controller", &SA5_access}, 2058e616a5eSStephen M. Cameron {0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access}, 206edd16368SStephen M. Cameron {0xFFFF103C, "Unknown Smart Array", &SA5_access}, 207edd16368SStephen M. Cameron }; 208edd16368SStephen M. Cameron 209*d04e62b9SKevin Barnett static struct scsi_transport_template *hpsa_sas_transport_template; 210*d04e62b9SKevin Barnett static int hpsa_add_sas_host(struct ctlr_info *h); 211*d04e62b9SKevin Barnett static void hpsa_delete_sas_host(struct ctlr_info *h); 212*d04e62b9SKevin Barnett static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node, 213*d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *device); 214*d04e62b9SKevin Barnett static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device); 215*d04e62b9SKevin Barnett static struct hpsa_scsi_dev_t 216*d04e62b9SKevin Barnett *hpsa_find_device_by_sas_rphy(struct ctlr_info *h, 217*d04e62b9SKevin Barnett struct sas_rphy *rphy); 218*d04e62b9SKevin Barnett 219a58e7e53SWebb Scales #define SCSI_CMD_BUSY ((struct scsi_cmnd *)&hpsa_cmd_busy) 220a58e7e53SWebb Scales static const struct scsi_cmnd hpsa_cmd_busy; 221a58e7e53SWebb Scales #define SCSI_CMD_IDLE ((struct scsi_cmnd *)&hpsa_cmd_idle) 222a58e7e53SWebb Scales static const struct scsi_cmnd hpsa_cmd_idle; 223edd16368SStephen M. Cameron static int number_of_controllers; 224edd16368SStephen M. Cameron 22510f66018SStephen M. Cameron static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id); 22610f66018SStephen M. Cameron static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id); 22742a91641SDon Brace static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg); 228edd16368SStephen M. Cameron 229edd16368SStephen M. Cameron #ifdef CONFIG_COMPAT 23042a91641SDon Brace static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, 23142a91641SDon Brace void __user *arg); 232edd16368SStephen M. Cameron #endif 233edd16368SStephen M. Cameron 234edd16368SStephen M. Cameron static void cmd_free(struct ctlr_info *h, struct CommandList *c); 235edd16368SStephen M. Cameron static struct CommandList *cmd_alloc(struct ctlr_info *h); 23673153fe5SWebb Scales static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c); 23773153fe5SWebb Scales static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h, 23873153fe5SWebb Scales struct scsi_cmnd *scmd); 239a2dac136SStephen M. Cameron static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 240b7bb24ebSStephen M. Cameron void *buff, size_t size, u16 page_code, unsigned char *scsi3addr, 241edd16368SStephen M. Cameron int cmd_type); 2422c143342SRobert Elliott static void hpsa_free_cmd_pool(struct ctlr_info *h); 243b7bb24ebSStephen M. Cameron #define VPD_PAGE (1 << 8) 244b48d9804SDon Brace #define HPSA_SIMPLE_ERROR_BITS 0x03 245edd16368SStephen M. Cameron 246f281233dSJeff Garzik static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd); 247a08a8471SStephen M. Cameron static void hpsa_scan_start(struct Scsi_Host *); 248a08a8471SStephen M. Cameron static int hpsa_scan_finished(struct Scsi_Host *sh, 249a08a8471SStephen M. Cameron unsigned long elapsed_time); 2507c0a0229SDon Brace static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth); 251edd16368SStephen M. Cameron 252edd16368SStephen M. Cameron static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd); 25375167d2cSStephen M. Cameron static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd); 254edd16368SStephen M. Cameron static int hpsa_slave_alloc(struct scsi_device *sdev); 25541ce4c35SStephen Cameron static int hpsa_slave_configure(struct scsi_device *sdev); 256edd16368SStephen M. Cameron static void hpsa_slave_destroy(struct scsi_device *sdev); 257edd16368SStephen M. Cameron 2588aa60681SDon Brace static void hpsa_update_scsi_devices(struct ctlr_info *h); 259edd16368SStephen M. Cameron static int check_for_unit_attention(struct ctlr_info *h, 260edd16368SStephen M. Cameron struct CommandList *c); 261edd16368SStephen M. Cameron static void check_ioctl_unit_attention(struct ctlr_info *h, 262edd16368SStephen M. Cameron struct CommandList *c); 263303932fdSDon Brace /* performant mode helper functions */ 264303932fdSDon Brace static void calc_bucket_map(int *bucket, int num_buckets, 2652b08b3e9SDon Brace int nsgs, int min_blocks, u32 *bucket_map); 266105a3dbcSRobert Elliott static void hpsa_free_performant_mode(struct ctlr_info *h); 267105a3dbcSRobert Elliott static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h); 268254f796bSMatt Gates static inline u32 next_command(struct ctlr_info *h, u8 q); 2696f039790SGreg Kroah-Hartman static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 2706f039790SGreg Kroah-Hartman u32 *cfg_base_addr, u64 *cfg_base_addr_index, 2711df8552aSStephen M. Cameron u64 *cfg_offset); 2726f039790SGreg Kroah-Hartman static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 2731df8552aSStephen M. Cameron unsigned long *memory_bar); 2746f039790SGreg Kroah-Hartman static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id); 2756f039790SGreg Kroah-Hartman static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 2766f039790SGreg Kroah-Hartman int wait_for_ready); 27775167d2cSStephen M. Cameron static inline void finish_cmd(struct CommandList *c); 278c706a795SRobert Elliott static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h); 279fe5389c8SStephen M. Cameron #define BOARD_NOT_READY 0 280fe5389c8SStephen M. Cameron #define BOARD_READY 1 28123100dd9SStephen M. Cameron static void hpsa_drain_accel_commands(struct ctlr_info *h); 28276438d08SStephen M. Cameron static void hpsa_flush_cache(struct ctlr_info *h); 283c349775eSScott Teel static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h, 284c349775eSScott Teel struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 28503383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk); 286080ef1ccSDon Brace static void hpsa_command_resubmit_worker(struct work_struct *work); 28725163bd5SWebb Scales static u32 lockup_detected(struct ctlr_info *h); 28825163bd5SWebb Scales static int detect_controller_lockup(struct ctlr_info *h); 289c2adae44SScott Teel static void hpsa_disable_rld_caching(struct ctlr_info *h); 290*d04e62b9SKevin Barnett static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 291*d04e62b9SKevin Barnett struct ReportExtendedLUNdata *buf, int bufsize); 29234592254SScott Teel static int hpsa_luns_changed(struct ctlr_info *h); 293edd16368SStephen M. Cameron 294edd16368SStephen M. Cameron static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev) 295edd16368SStephen M. Cameron { 296edd16368SStephen M. Cameron unsigned long *priv = shost_priv(sdev->host); 297edd16368SStephen M. Cameron return (struct ctlr_info *) *priv; 298edd16368SStephen M. Cameron } 299edd16368SStephen M. Cameron 300a23513e8SStephen M. Cameron static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh) 301a23513e8SStephen M. Cameron { 302a23513e8SStephen M. Cameron unsigned long *priv = shost_priv(sh); 303a23513e8SStephen M. Cameron return (struct ctlr_info *) *priv; 304a23513e8SStephen M. Cameron } 305a23513e8SStephen M. Cameron 306a58e7e53SWebb Scales static inline bool hpsa_is_cmd_idle(struct CommandList *c) 307a58e7e53SWebb Scales { 308a58e7e53SWebb Scales return c->scsi_cmd == SCSI_CMD_IDLE; 309a58e7e53SWebb Scales } 310a58e7e53SWebb Scales 311d604f533SWebb Scales static inline bool hpsa_is_pending_event(struct CommandList *c) 312d604f533SWebb Scales { 313d604f533SWebb Scales return c->abort_pending || c->reset_pending; 314d604f533SWebb Scales } 315d604f533SWebb Scales 3169437ac43SStephen Cameron /* extract sense key, asc, and ascq from sense data. -1 means invalid. */ 3179437ac43SStephen Cameron static void decode_sense_data(const u8 *sense_data, int sense_data_len, 3189437ac43SStephen Cameron u8 *sense_key, u8 *asc, u8 *ascq) 3199437ac43SStephen Cameron { 3209437ac43SStephen Cameron struct scsi_sense_hdr sshdr; 3219437ac43SStephen Cameron bool rc; 3229437ac43SStephen Cameron 3239437ac43SStephen Cameron *sense_key = -1; 3249437ac43SStephen Cameron *asc = -1; 3259437ac43SStephen Cameron *ascq = -1; 3269437ac43SStephen Cameron 3279437ac43SStephen Cameron if (sense_data_len < 1) 3289437ac43SStephen Cameron return; 3299437ac43SStephen Cameron 3309437ac43SStephen Cameron rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr); 3319437ac43SStephen Cameron if (rc) { 3329437ac43SStephen Cameron *sense_key = sshdr.sense_key; 3339437ac43SStephen Cameron *asc = sshdr.asc; 3349437ac43SStephen Cameron *ascq = sshdr.ascq; 3359437ac43SStephen Cameron } 3369437ac43SStephen Cameron } 3379437ac43SStephen Cameron 338edd16368SStephen M. Cameron static int check_for_unit_attention(struct ctlr_info *h, 339edd16368SStephen M. Cameron struct CommandList *c) 340edd16368SStephen M. Cameron { 3419437ac43SStephen Cameron u8 sense_key, asc, ascq; 3429437ac43SStephen Cameron int sense_len; 3439437ac43SStephen Cameron 3449437ac43SStephen Cameron if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo)) 3459437ac43SStephen Cameron sense_len = sizeof(c->err_info->SenseInfo); 3469437ac43SStephen Cameron else 3479437ac43SStephen Cameron sense_len = c->err_info->SenseLen; 3489437ac43SStephen Cameron 3499437ac43SStephen Cameron decode_sense_data(c->err_info->SenseInfo, sense_len, 3509437ac43SStephen Cameron &sense_key, &asc, &ascq); 35181c27557SDon Brace if (sense_key != UNIT_ATTENTION || asc == 0xff) 352edd16368SStephen M. Cameron return 0; 353edd16368SStephen M. Cameron 3549437ac43SStephen Cameron switch (asc) { 355edd16368SStephen M. Cameron case STATE_CHANGED: 3569437ac43SStephen Cameron dev_warn(&h->pdev->dev, 3572946e82bSRobert Elliott "%s: a state change detected, command retried\n", 3582946e82bSRobert Elliott h->devname); 359edd16368SStephen M. Cameron break; 360edd16368SStephen M. Cameron case LUN_FAILED: 3617f73695aSStephen M. Cameron dev_warn(&h->pdev->dev, 3622946e82bSRobert Elliott "%s: LUN failure detected\n", h->devname); 363edd16368SStephen M. Cameron break; 364edd16368SStephen M. Cameron case REPORT_LUNS_CHANGED: 3657f73695aSStephen M. Cameron dev_warn(&h->pdev->dev, 3662946e82bSRobert Elliott "%s: report LUN data changed\n", h->devname); 367edd16368SStephen M. Cameron /* 3684f4eb9f1SScott Teel * Note: this REPORT_LUNS_CHANGED condition only occurs on the external 3694f4eb9f1SScott Teel * target (array) devices. 370edd16368SStephen M. Cameron */ 371edd16368SStephen M. Cameron break; 372edd16368SStephen M. Cameron case POWER_OR_RESET: 3732946e82bSRobert Elliott dev_warn(&h->pdev->dev, 3742946e82bSRobert Elliott "%s: a power on or device reset detected\n", 3752946e82bSRobert Elliott h->devname); 376edd16368SStephen M. Cameron break; 377edd16368SStephen M. Cameron case UNIT_ATTENTION_CLEARED: 3782946e82bSRobert Elliott dev_warn(&h->pdev->dev, 3792946e82bSRobert Elliott "%s: unit attention cleared by another initiator\n", 3802946e82bSRobert Elliott h->devname); 381edd16368SStephen M. Cameron break; 382edd16368SStephen M. Cameron default: 3832946e82bSRobert Elliott dev_warn(&h->pdev->dev, 3842946e82bSRobert Elliott "%s: unknown unit attention detected\n", 3852946e82bSRobert Elliott h->devname); 386edd16368SStephen M. Cameron break; 387edd16368SStephen M. Cameron } 388edd16368SStephen M. Cameron return 1; 389edd16368SStephen M. Cameron } 390edd16368SStephen M. Cameron 391852af20aSMatt Bondurant static int check_for_busy(struct ctlr_info *h, struct CommandList *c) 392852af20aSMatt Bondurant { 393852af20aSMatt Bondurant if (c->err_info->CommandStatus != CMD_TARGET_STATUS || 394852af20aSMatt Bondurant (c->err_info->ScsiStatus != SAM_STAT_BUSY && 395852af20aSMatt Bondurant c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL)) 396852af20aSMatt Bondurant return 0; 397852af20aSMatt Bondurant dev_warn(&h->pdev->dev, HPSA "device busy"); 398852af20aSMatt Bondurant return 1; 399852af20aSMatt Bondurant } 400852af20aSMatt Bondurant 401e985c58fSStephen Cameron static u32 lockup_detected(struct ctlr_info *h); 402e985c58fSStephen Cameron static ssize_t host_show_lockup_detected(struct device *dev, 403e985c58fSStephen Cameron struct device_attribute *attr, char *buf) 404e985c58fSStephen Cameron { 405e985c58fSStephen Cameron int ld; 406e985c58fSStephen Cameron struct ctlr_info *h; 407e985c58fSStephen Cameron struct Scsi_Host *shost = class_to_shost(dev); 408e985c58fSStephen Cameron 409e985c58fSStephen Cameron h = shost_to_hba(shost); 410e985c58fSStephen Cameron ld = lockup_detected(h); 411e985c58fSStephen Cameron 412e985c58fSStephen Cameron return sprintf(buf, "ld=%d\n", ld); 413e985c58fSStephen Cameron } 414e985c58fSStephen Cameron 415da0697bdSScott Teel static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev, 416da0697bdSScott Teel struct device_attribute *attr, 417da0697bdSScott Teel const char *buf, size_t count) 418da0697bdSScott Teel { 419da0697bdSScott Teel int status, len; 420da0697bdSScott Teel struct ctlr_info *h; 421da0697bdSScott Teel struct Scsi_Host *shost = class_to_shost(dev); 422da0697bdSScott Teel char tmpbuf[10]; 423da0697bdSScott Teel 424da0697bdSScott Teel if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO)) 425da0697bdSScott Teel return -EACCES; 426da0697bdSScott Teel len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count; 427da0697bdSScott Teel strncpy(tmpbuf, buf, len); 428da0697bdSScott Teel tmpbuf[len] = '\0'; 429da0697bdSScott Teel if (sscanf(tmpbuf, "%d", &status) != 1) 430da0697bdSScott Teel return -EINVAL; 431da0697bdSScott Teel h = shost_to_hba(shost); 432da0697bdSScott Teel h->acciopath_status = !!status; 433da0697bdSScott Teel dev_warn(&h->pdev->dev, 434da0697bdSScott Teel "hpsa: HP SSD Smart Path %s via sysfs update.\n", 435da0697bdSScott Teel h->acciopath_status ? "enabled" : "disabled"); 436da0697bdSScott Teel return count; 437da0697bdSScott Teel } 438da0697bdSScott Teel 4392ba8bfc8SStephen M. Cameron static ssize_t host_store_raid_offload_debug(struct device *dev, 4402ba8bfc8SStephen M. Cameron struct device_attribute *attr, 4412ba8bfc8SStephen M. Cameron const char *buf, size_t count) 4422ba8bfc8SStephen M. Cameron { 4432ba8bfc8SStephen M. Cameron int debug_level, len; 4442ba8bfc8SStephen M. Cameron struct ctlr_info *h; 4452ba8bfc8SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 4462ba8bfc8SStephen M. Cameron char tmpbuf[10]; 4472ba8bfc8SStephen M. Cameron 4482ba8bfc8SStephen M. Cameron if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO)) 4492ba8bfc8SStephen M. Cameron return -EACCES; 4502ba8bfc8SStephen M. Cameron len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count; 4512ba8bfc8SStephen M. Cameron strncpy(tmpbuf, buf, len); 4522ba8bfc8SStephen M. Cameron tmpbuf[len] = '\0'; 4532ba8bfc8SStephen M. Cameron if (sscanf(tmpbuf, "%d", &debug_level) != 1) 4542ba8bfc8SStephen M. Cameron return -EINVAL; 4552ba8bfc8SStephen M. Cameron if (debug_level < 0) 4562ba8bfc8SStephen M. Cameron debug_level = 0; 4572ba8bfc8SStephen M. Cameron h = shost_to_hba(shost); 4582ba8bfc8SStephen M. Cameron h->raid_offload_debug = debug_level; 4592ba8bfc8SStephen M. Cameron dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n", 4602ba8bfc8SStephen M. Cameron h->raid_offload_debug); 4612ba8bfc8SStephen M. Cameron return count; 4622ba8bfc8SStephen M. Cameron } 4632ba8bfc8SStephen M. Cameron 464edd16368SStephen M. Cameron static ssize_t host_store_rescan(struct device *dev, 465edd16368SStephen M. Cameron struct device_attribute *attr, 466edd16368SStephen M. Cameron const char *buf, size_t count) 467edd16368SStephen M. Cameron { 468edd16368SStephen M. Cameron struct ctlr_info *h; 469edd16368SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 470a23513e8SStephen M. Cameron h = shost_to_hba(shost); 47131468401SMike Miller hpsa_scan_start(h->scsi_host); 472edd16368SStephen M. Cameron return count; 473edd16368SStephen M. Cameron } 474edd16368SStephen M. Cameron 475d28ce020SStephen M. Cameron static ssize_t host_show_firmware_revision(struct device *dev, 476d28ce020SStephen M. Cameron struct device_attribute *attr, char *buf) 477d28ce020SStephen M. Cameron { 478d28ce020SStephen M. Cameron struct ctlr_info *h; 479d28ce020SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 480d28ce020SStephen M. Cameron unsigned char *fwrev; 481d28ce020SStephen M. Cameron 482d28ce020SStephen M. Cameron h = shost_to_hba(shost); 483d28ce020SStephen M. Cameron if (!h->hba_inquiry_data) 484d28ce020SStephen M. Cameron return 0; 485d28ce020SStephen M. Cameron fwrev = &h->hba_inquiry_data[32]; 486d28ce020SStephen M. Cameron return snprintf(buf, 20, "%c%c%c%c\n", 487d28ce020SStephen M. Cameron fwrev[0], fwrev[1], fwrev[2], fwrev[3]); 488d28ce020SStephen M. Cameron } 489d28ce020SStephen M. Cameron 49094a13649SStephen M. Cameron static ssize_t host_show_commands_outstanding(struct device *dev, 49194a13649SStephen M. Cameron struct device_attribute *attr, char *buf) 49294a13649SStephen M. Cameron { 49394a13649SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 49494a13649SStephen M. Cameron struct ctlr_info *h = shost_to_hba(shost); 49594a13649SStephen M. Cameron 4960cbf768eSStephen M. Cameron return snprintf(buf, 20, "%d\n", 4970cbf768eSStephen M. Cameron atomic_read(&h->commands_outstanding)); 49894a13649SStephen M. Cameron } 49994a13649SStephen M. Cameron 500745a7a25SStephen M. Cameron static ssize_t host_show_transport_mode(struct device *dev, 501745a7a25SStephen M. Cameron struct device_attribute *attr, char *buf) 502745a7a25SStephen M. Cameron { 503745a7a25SStephen M. Cameron struct ctlr_info *h; 504745a7a25SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 505745a7a25SStephen M. Cameron 506745a7a25SStephen M. Cameron h = shost_to_hba(shost); 507745a7a25SStephen M. Cameron return snprintf(buf, 20, "%s\n", 508960a30e7SStephen M. Cameron h->transMethod & CFGTBL_Trans_Performant ? 509745a7a25SStephen M. Cameron "performant" : "simple"); 510745a7a25SStephen M. Cameron } 511745a7a25SStephen M. Cameron 512da0697bdSScott Teel static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev, 513da0697bdSScott Teel struct device_attribute *attr, char *buf) 514da0697bdSScott Teel { 515da0697bdSScott Teel struct ctlr_info *h; 516da0697bdSScott Teel struct Scsi_Host *shost = class_to_shost(dev); 517da0697bdSScott Teel 518da0697bdSScott Teel h = shost_to_hba(shost); 519da0697bdSScott Teel return snprintf(buf, 30, "HP SSD Smart Path %s\n", 520da0697bdSScott Teel (h->acciopath_status == 1) ? "enabled" : "disabled"); 521da0697bdSScott Teel } 522da0697bdSScott Teel 52346380786SStephen M. Cameron /* List of controllers which cannot be hard reset on kexec with reset_devices */ 524941b1cdaSStephen M. Cameron static u32 unresettable_controller[] = { 525941b1cdaSStephen M. Cameron 0x324a103C, /* Smart Array P712m */ 526941b1cdaSStephen M. Cameron 0x324b103C, /* Smart Array P711m */ 527941b1cdaSStephen M. Cameron 0x3223103C, /* Smart Array P800 */ 528941b1cdaSStephen M. Cameron 0x3234103C, /* Smart Array P400 */ 529941b1cdaSStephen M. Cameron 0x3235103C, /* Smart Array P400i */ 530941b1cdaSStephen M. Cameron 0x3211103C, /* Smart Array E200i */ 531941b1cdaSStephen M. Cameron 0x3212103C, /* Smart Array E200 */ 532941b1cdaSStephen M. Cameron 0x3213103C, /* Smart Array E200i */ 533941b1cdaSStephen M. Cameron 0x3214103C, /* Smart Array E200i */ 534941b1cdaSStephen M. Cameron 0x3215103C, /* Smart Array E200i */ 535941b1cdaSStephen M. Cameron 0x3237103C, /* Smart Array E500 */ 536941b1cdaSStephen M. Cameron 0x323D103C, /* Smart Array P700m */ 5377af0abbcSTomas Henzl 0x40800E11, /* Smart Array 5i */ 538941b1cdaSStephen M. Cameron 0x409C0E11, /* Smart Array 6400 */ 539941b1cdaSStephen M. Cameron 0x409D0E11, /* Smart Array 6400 EM */ 5405a4f934eSTomas Henzl 0x40700E11, /* Smart Array 5300 */ 5415a4f934eSTomas Henzl 0x40820E11, /* Smart Array 532 */ 5425a4f934eSTomas Henzl 0x40830E11, /* Smart Array 5312 */ 5435a4f934eSTomas Henzl 0x409A0E11, /* Smart Array 641 */ 5445a4f934eSTomas Henzl 0x409B0E11, /* Smart Array 642 */ 5455a4f934eSTomas Henzl 0x40910E11, /* Smart Array 6i */ 546941b1cdaSStephen M. Cameron }; 547941b1cdaSStephen M. Cameron 54846380786SStephen M. Cameron /* List of controllers which cannot even be soft reset */ 54946380786SStephen M. Cameron static u32 soft_unresettable_controller[] = { 5507af0abbcSTomas Henzl 0x40800E11, /* Smart Array 5i */ 5515a4f934eSTomas Henzl 0x40700E11, /* Smart Array 5300 */ 5525a4f934eSTomas Henzl 0x40820E11, /* Smart Array 532 */ 5535a4f934eSTomas Henzl 0x40830E11, /* Smart Array 5312 */ 5545a4f934eSTomas Henzl 0x409A0E11, /* Smart Array 641 */ 5555a4f934eSTomas Henzl 0x409B0E11, /* Smart Array 642 */ 5565a4f934eSTomas Henzl 0x40910E11, /* Smart Array 6i */ 55746380786SStephen M. Cameron /* Exclude 640x boards. These are two pci devices in one slot 55846380786SStephen M. Cameron * which share a battery backed cache module. One controls the 55946380786SStephen M. Cameron * cache, the other accesses the cache through the one that controls 56046380786SStephen M. Cameron * it. If we reset the one controlling the cache, the other will 56146380786SStephen M. Cameron * likely not be happy. Just forbid resetting this conjoined mess. 56246380786SStephen M. Cameron * The 640x isn't really supported by hpsa anyway. 56346380786SStephen M. Cameron */ 56446380786SStephen M. Cameron 0x409C0E11, /* Smart Array 6400 */ 56546380786SStephen M. Cameron 0x409D0E11, /* Smart Array 6400 EM */ 56646380786SStephen M. Cameron }; 56746380786SStephen M. Cameron 5689b5c48c2SStephen Cameron static u32 needs_abort_tags_swizzled[] = { 5699b5c48c2SStephen Cameron 0x323D103C, /* Smart Array P700m */ 5709b5c48c2SStephen Cameron 0x324a103C, /* Smart Array P712m */ 5719b5c48c2SStephen Cameron 0x324b103C, /* SmartArray P711m */ 5729b5c48c2SStephen Cameron }; 5739b5c48c2SStephen Cameron 5749b5c48c2SStephen Cameron static int board_id_in_array(u32 a[], int nelems, u32 board_id) 575941b1cdaSStephen M. Cameron { 576941b1cdaSStephen M. Cameron int i; 577941b1cdaSStephen M. Cameron 5789b5c48c2SStephen Cameron for (i = 0; i < nelems; i++) 5799b5c48c2SStephen Cameron if (a[i] == board_id) 580941b1cdaSStephen M. Cameron return 1; 5819b5c48c2SStephen Cameron return 0; 5829b5c48c2SStephen Cameron } 5839b5c48c2SStephen Cameron 5849b5c48c2SStephen Cameron static int ctlr_is_hard_resettable(u32 board_id) 5859b5c48c2SStephen Cameron { 5869b5c48c2SStephen Cameron return !board_id_in_array(unresettable_controller, 5879b5c48c2SStephen Cameron ARRAY_SIZE(unresettable_controller), board_id); 588941b1cdaSStephen M. Cameron } 589941b1cdaSStephen M. Cameron 59046380786SStephen M. Cameron static int ctlr_is_soft_resettable(u32 board_id) 59146380786SStephen M. Cameron { 5929b5c48c2SStephen Cameron return !board_id_in_array(soft_unresettable_controller, 5939b5c48c2SStephen Cameron ARRAY_SIZE(soft_unresettable_controller), board_id); 59446380786SStephen M. Cameron } 59546380786SStephen M. Cameron 59646380786SStephen M. Cameron static int ctlr_is_resettable(u32 board_id) 59746380786SStephen M. Cameron { 59846380786SStephen M. Cameron return ctlr_is_hard_resettable(board_id) || 59946380786SStephen M. Cameron ctlr_is_soft_resettable(board_id); 60046380786SStephen M. Cameron } 60146380786SStephen M. Cameron 6029b5c48c2SStephen Cameron static int ctlr_needs_abort_tags_swizzled(u32 board_id) 6039b5c48c2SStephen Cameron { 6049b5c48c2SStephen Cameron return board_id_in_array(needs_abort_tags_swizzled, 6059b5c48c2SStephen Cameron ARRAY_SIZE(needs_abort_tags_swizzled), board_id); 6069b5c48c2SStephen Cameron } 6079b5c48c2SStephen Cameron 608941b1cdaSStephen M. Cameron static ssize_t host_show_resettable(struct device *dev, 609941b1cdaSStephen M. Cameron struct device_attribute *attr, char *buf) 610941b1cdaSStephen M. Cameron { 611941b1cdaSStephen M. Cameron struct ctlr_info *h; 612941b1cdaSStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 613941b1cdaSStephen M. Cameron 614941b1cdaSStephen M. Cameron h = shost_to_hba(shost); 61546380786SStephen M. Cameron return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id)); 616941b1cdaSStephen M. Cameron } 617941b1cdaSStephen M. Cameron 618edd16368SStephen M. Cameron static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[]) 619edd16368SStephen M. Cameron { 620edd16368SStephen M. Cameron return (scsi3addr[3] & 0xC0) == 0x40; 621edd16368SStephen M. Cameron } 622edd16368SStephen M. Cameron 623f2ef0ce7SRobert Elliott static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6", 6247c59a0d4SDon Brace "1(+0)ADM", "UNKNOWN", "PHYS DRV" 625edd16368SStephen M. Cameron }; 6266b80b18fSScott Teel #define HPSA_RAID_0 0 6276b80b18fSScott Teel #define HPSA_RAID_4 1 6286b80b18fSScott Teel #define HPSA_RAID_1 2 /* also used for RAID 10 */ 6296b80b18fSScott Teel #define HPSA_RAID_5 3 /* also used for RAID 50 */ 6306b80b18fSScott Teel #define HPSA_RAID_51 4 6316b80b18fSScott Teel #define HPSA_RAID_6 5 /* also used for RAID 60 */ 6326b80b18fSScott Teel #define HPSA_RAID_ADM 6 /* also used for RAID 1+0 ADM */ 6337c59a0d4SDon Brace #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 2) 6347c59a0d4SDon Brace #define PHYSICAL_DRIVE (ARRAY_SIZE(raid_label) - 1) 635edd16368SStephen M. Cameron 636f3f01730SKevin Barnett static inline bool is_logical_device(struct hpsa_scsi_dev_t *device) 637f3f01730SKevin Barnett { 638f3f01730SKevin Barnett return !device->physical_device; 639f3f01730SKevin Barnett } 640f3f01730SKevin Barnett 641edd16368SStephen M. Cameron static ssize_t raid_level_show(struct device *dev, 642edd16368SStephen M. Cameron struct device_attribute *attr, char *buf) 643edd16368SStephen M. Cameron { 644edd16368SStephen M. Cameron ssize_t l = 0; 64582a72c0aSStephen M. Cameron unsigned char rlevel; 646edd16368SStephen M. Cameron struct ctlr_info *h; 647edd16368SStephen M. Cameron struct scsi_device *sdev; 648edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *hdev; 649edd16368SStephen M. Cameron unsigned long flags; 650edd16368SStephen M. Cameron 651edd16368SStephen M. Cameron sdev = to_scsi_device(dev); 652edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 653edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 654edd16368SStephen M. Cameron hdev = sdev->hostdata; 655edd16368SStephen M. Cameron if (!hdev) { 656edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 657edd16368SStephen M. Cameron return -ENODEV; 658edd16368SStephen M. Cameron } 659edd16368SStephen M. Cameron 660edd16368SStephen M. Cameron /* Is this even a logical drive? */ 661f3f01730SKevin Barnett if (!is_logical_device(hdev)) { 662edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 663edd16368SStephen M. Cameron l = snprintf(buf, PAGE_SIZE, "N/A\n"); 664edd16368SStephen M. Cameron return l; 665edd16368SStephen M. Cameron } 666edd16368SStephen M. Cameron 667edd16368SStephen M. Cameron rlevel = hdev->raid_level; 668edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 66982a72c0aSStephen M. Cameron if (rlevel > RAID_UNKNOWN) 670edd16368SStephen M. Cameron rlevel = RAID_UNKNOWN; 671edd16368SStephen M. Cameron l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]); 672edd16368SStephen M. Cameron return l; 673edd16368SStephen M. Cameron } 674edd16368SStephen M. Cameron 675edd16368SStephen M. Cameron static ssize_t lunid_show(struct device *dev, 676edd16368SStephen M. Cameron struct device_attribute *attr, char *buf) 677edd16368SStephen M. Cameron { 678edd16368SStephen M. Cameron struct ctlr_info *h; 679edd16368SStephen M. Cameron struct scsi_device *sdev; 680edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *hdev; 681edd16368SStephen M. Cameron unsigned long flags; 682edd16368SStephen M. Cameron unsigned char lunid[8]; 683edd16368SStephen M. Cameron 684edd16368SStephen M. Cameron sdev = to_scsi_device(dev); 685edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 686edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 687edd16368SStephen M. Cameron hdev = sdev->hostdata; 688edd16368SStephen M. Cameron if (!hdev) { 689edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 690edd16368SStephen M. Cameron return -ENODEV; 691edd16368SStephen M. Cameron } 692edd16368SStephen M. Cameron memcpy(lunid, hdev->scsi3addr, sizeof(lunid)); 693edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 694edd16368SStephen M. Cameron return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 695edd16368SStephen M. Cameron lunid[0], lunid[1], lunid[2], lunid[3], 696edd16368SStephen M. Cameron lunid[4], lunid[5], lunid[6], lunid[7]); 697edd16368SStephen M. Cameron } 698edd16368SStephen M. Cameron 699edd16368SStephen M. Cameron static ssize_t unique_id_show(struct device *dev, 700edd16368SStephen M. Cameron struct device_attribute *attr, char *buf) 701edd16368SStephen M. Cameron { 702edd16368SStephen M. Cameron struct ctlr_info *h; 703edd16368SStephen M. Cameron struct scsi_device *sdev; 704edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *hdev; 705edd16368SStephen M. Cameron unsigned long flags; 706edd16368SStephen M. Cameron unsigned char sn[16]; 707edd16368SStephen M. Cameron 708edd16368SStephen M. Cameron sdev = to_scsi_device(dev); 709edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 710edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 711edd16368SStephen M. Cameron hdev = sdev->hostdata; 712edd16368SStephen M. Cameron if (!hdev) { 713edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 714edd16368SStephen M. Cameron return -ENODEV; 715edd16368SStephen M. Cameron } 716edd16368SStephen M. Cameron memcpy(sn, hdev->device_id, sizeof(sn)); 717edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 718edd16368SStephen M. Cameron return snprintf(buf, 16 * 2 + 2, 719edd16368SStephen M. Cameron "%02X%02X%02X%02X%02X%02X%02X%02X" 720edd16368SStephen M. Cameron "%02X%02X%02X%02X%02X%02X%02X%02X\n", 721edd16368SStephen M. Cameron sn[0], sn[1], sn[2], sn[3], 722edd16368SStephen M. Cameron sn[4], sn[5], sn[6], sn[7], 723edd16368SStephen M. Cameron sn[8], sn[9], sn[10], sn[11], 724edd16368SStephen M. Cameron sn[12], sn[13], sn[14], sn[15]); 725edd16368SStephen M. Cameron } 726edd16368SStephen M. Cameron 727c1988684SScott Teel static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev, 728c1988684SScott Teel struct device_attribute *attr, char *buf) 729c1988684SScott Teel { 730c1988684SScott Teel struct ctlr_info *h; 731c1988684SScott Teel struct scsi_device *sdev; 732c1988684SScott Teel struct hpsa_scsi_dev_t *hdev; 733c1988684SScott Teel unsigned long flags; 734c1988684SScott Teel int offload_enabled; 735c1988684SScott Teel 736c1988684SScott Teel sdev = to_scsi_device(dev); 737c1988684SScott Teel h = sdev_to_hba(sdev); 738c1988684SScott Teel spin_lock_irqsave(&h->lock, flags); 739c1988684SScott Teel hdev = sdev->hostdata; 740c1988684SScott Teel if (!hdev) { 741c1988684SScott Teel spin_unlock_irqrestore(&h->lock, flags); 742c1988684SScott Teel return -ENODEV; 743c1988684SScott Teel } 744c1988684SScott Teel offload_enabled = hdev->offload_enabled; 745c1988684SScott Teel spin_unlock_irqrestore(&h->lock, flags); 746c1988684SScott Teel return snprintf(buf, 20, "%d\n", offload_enabled); 747c1988684SScott Teel } 748c1988684SScott Teel 7498270b862SJoe Handzik #define MAX_PATHS 8 7508270b862SJoe Handzik 7518270b862SJoe Handzik static ssize_t path_info_show(struct device *dev, 7528270b862SJoe Handzik struct device_attribute *attr, char *buf) 7538270b862SJoe Handzik { 7548270b862SJoe Handzik struct ctlr_info *h; 7558270b862SJoe Handzik struct scsi_device *sdev; 7568270b862SJoe Handzik struct hpsa_scsi_dev_t *hdev; 7578270b862SJoe Handzik unsigned long flags; 7588270b862SJoe Handzik int i; 7598270b862SJoe Handzik int output_len = 0; 7608270b862SJoe Handzik u8 box; 7618270b862SJoe Handzik u8 bay; 7628270b862SJoe Handzik u8 path_map_index = 0; 7638270b862SJoe Handzik char *active; 7648270b862SJoe Handzik unsigned char phys_connector[2]; 7658270b862SJoe Handzik 7668270b862SJoe Handzik sdev = to_scsi_device(dev); 7678270b862SJoe Handzik h = sdev_to_hba(sdev); 7688270b862SJoe Handzik spin_lock_irqsave(&h->devlock, flags); 7698270b862SJoe Handzik hdev = sdev->hostdata; 7708270b862SJoe Handzik if (!hdev) { 7718270b862SJoe Handzik spin_unlock_irqrestore(&h->devlock, flags); 7728270b862SJoe Handzik return -ENODEV; 7738270b862SJoe Handzik } 7748270b862SJoe Handzik 7758270b862SJoe Handzik bay = hdev->bay; 7768270b862SJoe Handzik for (i = 0; i < MAX_PATHS; i++) { 7778270b862SJoe Handzik path_map_index = 1<<i; 7788270b862SJoe Handzik if (i == hdev->active_path_index) 7798270b862SJoe Handzik active = "Active"; 7808270b862SJoe Handzik else if (hdev->path_map & path_map_index) 7818270b862SJoe Handzik active = "Inactive"; 7828270b862SJoe Handzik else 7838270b862SJoe Handzik continue; 7848270b862SJoe Handzik 7851faf072cSRasmus Villemoes output_len += scnprintf(buf + output_len, 7861faf072cSRasmus Villemoes PAGE_SIZE - output_len, 7871faf072cSRasmus Villemoes "[%d:%d:%d:%d] %20.20s ", 7888270b862SJoe Handzik h->scsi_host->host_no, 7898270b862SJoe Handzik hdev->bus, hdev->target, hdev->lun, 7908270b862SJoe Handzik scsi_device_type(hdev->devtype)); 7918270b862SJoe Handzik 79266749d0dSScott Teel if (hdev->external || 793f3f01730SKevin Barnett hdev->devtype == TYPE_RAID || 794f3f01730SKevin Barnett is_logical_device(hdev)) { 7951faf072cSRasmus Villemoes output_len += snprintf(buf + output_len, 7961faf072cSRasmus Villemoes PAGE_SIZE - output_len, 7971faf072cSRasmus Villemoes "%s\n", active); 7988270b862SJoe Handzik continue; 7998270b862SJoe Handzik } 8008270b862SJoe Handzik 8018270b862SJoe Handzik box = hdev->box[i]; 8028270b862SJoe Handzik memcpy(&phys_connector, &hdev->phys_connector[i], 8038270b862SJoe Handzik sizeof(phys_connector)); 8048270b862SJoe Handzik if (phys_connector[0] < '0') 8058270b862SJoe Handzik phys_connector[0] = '0'; 8068270b862SJoe Handzik if (phys_connector[1] < '0') 8078270b862SJoe Handzik phys_connector[1] = '0'; 8088270b862SJoe Handzik if (hdev->phys_connector[i] > 0) 8091faf072cSRasmus Villemoes output_len += snprintf(buf + output_len, 8101faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8118270b862SJoe Handzik "PORT: %.2s ", 8128270b862SJoe Handzik phys_connector); 8132a168208SKevin Barnett if (hdev->devtype == TYPE_DISK && hdev->expose_device) { 8148270b862SJoe Handzik if (box == 0 || box == 0xFF) { 8151faf072cSRasmus Villemoes output_len += snprintf(buf + output_len, 8161faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8178270b862SJoe Handzik "BAY: %hhu %s\n", 8188270b862SJoe Handzik bay, active); 8198270b862SJoe Handzik } else { 8201faf072cSRasmus Villemoes output_len += snprintf(buf + output_len, 8211faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8228270b862SJoe Handzik "BOX: %hhu BAY: %hhu %s\n", 8238270b862SJoe Handzik box, bay, active); 8248270b862SJoe Handzik } 8258270b862SJoe Handzik } else if (box != 0 && box != 0xFF) { 8261faf072cSRasmus Villemoes output_len += snprintf(buf + output_len, 8271faf072cSRasmus Villemoes PAGE_SIZE - output_len, "BOX: %hhu %s\n", 8288270b862SJoe Handzik box, active); 8298270b862SJoe Handzik } else 8301faf072cSRasmus Villemoes output_len += snprintf(buf + output_len, 8311faf072cSRasmus Villemoes PAGE_SIZE - output_len, "%s\n", active); 8328270b862SJoe Handzik } 8338270b862SJoe Handzik 8348270b862SJoe Handzik spin_unlock_irqrestore(&h->devlock, flags); 8351faf072cSRasmus Villemoes return output_len; 8368270b862SJoe Handzik } 8378270b862SJoe Handzik 8383f5eac3aSStephen M. Cameron static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL); 8393f5eac3aSStephen M. Cameron static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL); 8403f5eac3aSStephen M. Cameron static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL); 8413f5eac3aSStephen M. Cameron static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan); 842c1988684SScott Teel static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO, 843c1988684SScott Teel host_show_hp_ssd_smart_path_enabled, NULL); 8448270b862SJoe Handzik static DEVICE_ATTR(path_info, S_IRUGO, path_info_show, NULL); 845da0697bdSScott Teel static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH, 846da0697bdSScott Teel host_show_hp_ssd_smart_path_status, 847da0697bdSScott Teel host_store_hp_ssd_smart_path_status); 8482ba8bfc8SStephen M. Cameron static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL, 8492ba8bfc8SStephen M. Cameron host_store_raid_offload_debug); 8503f5eac3aSStephen M. Cameron static DEVICE_ATTR(firmware_revision, S_IRUGO, 8513f5eac3aSStephen M. Cameron host_show_firmware_revision, NULL); 8523f5eac3aSStephen M. Cameron static DEVICE_ATTR(commands_outstanding, S_IRUGO, 8533f5eac3aSStephen M. Cameron host_show_commands_outstanding, NULL); 8543f5eac3aSStephen M. Cameron static DEVICE_ATTR(transport_mode, S_IRUGO, 8553f5eac3aSStephen M. Cameron host_show_transport_mode, NULL); 856941b1cdaSStephen M. Cameron static DEVICE_ATTR(resettable, S_IRUGO, 857941b1cdaSStephen M. Cameron host_show_resettable, NULL); 858e985c58fSStephen Cameron static DEVICE_ATTR(lockup_detected, S_IRUGO, 859e985c58fSStephen Cameron host_show_lockup_detected, NULL); 8603f5eac3aSStephen M. Cameron 8613f5eac3aSStephen M. Cameron static struct device_attribute *hpsa_sdev_attrs[] = { 8623f5eac3aSStephen M. Cameron &dev_attr_raid_level, 8633f5eac3aSStephen M. Cameron &dev_attr_lunid, 8643f5eac3aSStephen M. Cameron &dev_attr_unique_id, 865c1988684SScott Teel &dev_attr_hp_ssd_smart_path_enabled, 8668270b862SJoe Handzik &dev_attr_path_info, 867e985c58fSStephen Cameron &dev_attr_lockup_detected, 8683f5eac3aSStephen M. Cameron NULL, 8693f5eac3aSStephen M. Cameron }; 8703f5eac3aSStephen M. Cameron 8713f5eac3aSStephen M. Cameron static struct device_attribute *hpsa_shost_attrs[] = { 8723f5eac3aSStephen M. Cameron &dev_attr_rescan, 8733f5eac3aSStephen M. Cameron &dev_attr_firmware_revision, 8743f5eac3aSStephen M. Cameron &dev_attr_commands_outstanding, 8753f5eac3aSStephen M. Cameron &dev_attr_transport_mode, 876941b1cdaSStephen M. Cameron &dev_attr_resettable, 877da0697bdSScott Teel &dev_attr_hp_ssd_smart_path_status, 8782ba8bfc8SStephen M. Cameron &dev_attr_raid_offload_debug, 8793f5eac3aSStephen M. Cameron NULL, 8803f5eac3aSStephen M. Cameron }; 8813f5eac3aSStephen M. Cameron 88241ce4c35SStephen Cameron #define HPSA_NRESERVED_CMDS (HPSA_CMDS_RESERVED_FOR_ABORTS + \ 88341ce4c35SStephen Cameron HPSA_CMDS_RESERVED_FOR_DRIVER + HPSA_MAX_CONCURRENT_PASSTHRUS) 88441ce4c35SStephen Cameron 8853f5eac3aSStephen M. Cameron static struct scsi_host_template hpsa_driver_template = { 8863f5eac3aSStephen M. Cameron .module = THIS_MODULE, 887f79cfec6SStephen M. Cameron .name = HPSA, 888f79cfec6SStephen M. Cameron .proc_name = HPSA, 8893f5eac3aSStephen M. Cameron .queuecommand = hpsa_scsi_queue_command, 8903f5eac3aSStephen M. Cameron .scan_start = hpsa_scan_start, 8913f5eac3aSStephen M. Cameron .scan_finished = hpsa_scan_finished, 8927c0a0229SDon Brace .change_queue_depth = hpsa_change_queue_depth, 8933f5eac3aSStephen M. Cameron .this_id = -1, 8943f5eac3aSStephen M. Cameron .use_clustering = ENABLE_CLUSTERING, 89575167d2cSStephen M. Cameron .eh_abort_handler = hpsa_eh_abort_handler, 8963f5eac3aSStephen M. Cameron .eh_device_reset_handler = hpsa_eh_device_reset_handler, 8973f5eac3aSStephen M. Cameron .ioctl = hpsa_ioctl, 8983f5eac3aSStephen M. Cameron .slave_alloc = hpsa_slave_alloc, 89941ce4c35SStephen Cameron .slave_configure = hpsa_slave_configure, 9003f5eac3aSStephen M. Cameron .slave_destroy = hpsa_slave_destroy, 9013f5eac3aSStephen M. Cameron #ifdef CONFIG_COMPAT 9023f5eac3aSStephen M. Cameron .compat_ioctl = hpsa_compat_ioctl, 9033f5eac3aSStephen M. Cameron #endif 9043f5eac3aSStephen M. Cameron .sdev_attrs = hpsa_sdev_attrs, 9053f5eac3aSStephen M. Cameron .shost_attrs = hpsa_shost_attrs, 906c0d6a4d1SStephen M. Cameron .max_sectors = 8192, 90754b2b50cSMartin K. Petersen .no_write_same = 1, 9083f5eac3aSStephen M. Cameron }; 9093f5eac3aSStephen M. Cameron 910254f796bSMatt Gates static inline u32 next_command(struct ctlr_info *h, u8 q) 9113f5eac3aSStephen M. Cameron { 9123f5eac3aSStephen M. Cameron u32 a; 913072b0518SStephen M. Cameron struct reply_queue_buffer *rq = &h->reply_queue[q]; 9143f5eac3aSStephen M. Cameron 915e1f7de0cSMatt Gates if (h->transMethod & CFGTBL_Trans_io_accel1) 916e1f7de0cSMatt Gates return h->access.command_completed(h, q); 917e1f7de0cSMatt Gates 9183f5eac3aSStephen M. Cameron if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant))) 919254f796bSMatt Gates return h->access.command_completed(h, q); 9203f5eac3aSStephen M. Cameron 921254f796bSMatt Gates if ((rq->head[rq->current_entry] & 1) == rq->wraparound) { 922254f796bSMatt Gates a = rq->head[rq->current_entry]; 923254f796bSMatt Gates rq->current_entry++; 9240cbf768eSStephen M. Cameron atomic_dec(&h->commands_outstanding); 9253f5eac3aSStephen M. Cameron } else { 9263f5eac3aSStephen M. Cameron a = FIFO_EMPTY; 9273f5eac3aSStephen M. Cameron } 9283f5eac3aSStephen M. Cameron /* Check for wraparound */ 929254f796bSMatt Gates if (rq->current_entry == h->max_commands) { 930254f796bSMatt Gates rq->current_entry = 0; 931254f796bSMatt Gates rq->wraparound ^= 1; 9323f5eac3aSStephen M. Cameron } 9333f5eac3aSStephen M. Cameron return a; 9343f5eac3aSStephen M. Cameron } 9353f5eac3aSStephen M. Cameron 936c349775eSScott Teel /* 937c349775eSScott Teel * There are some special bits in the bus address of the 938c349775eSScott Teel * command that we have to set for the controller to know 939c349775eSScott Teel * how to process the command: 940c349775eSScott Teel * 941c349775eSScott Teel * Normal performant mode: 942c349775eSScott Teel * bit 0: 1 means performant mode, 0 means simple mode. 943c349775eSScott Teel * bits 1-3 = block fetch table entry 944c349775eSScott Teel * bits 4-6 = command type (== 0) 945c349775eSScott Teel * 946c349775eSScott Teel * ioaccel1 mode: 947c349775eSScott Teel * bit 0 = "performant mode" bit. 948c349775eSScott Teel * bits 1-3 = block fetch table entry 949c349775eSScott Teel * bits 4-6 = command type (== 110) 950c349775eSScott Teel * (command type is needed because ioaccel1 mode 951c349775eSScott Teel * commands are submitted through the same register as normal 952c349775eSScott Teel * mode commands, so this is how the controller knows whether 953c349775eSScott Teel * the command is normal mode or ioaccel1 mode.) 954c349775eSScott Teel * 955c349775eSScott Teel * ioaccel2 mode: 956c349775eSScott Teel * bit 0 = "performant mode" bit. 957c349775eSScott Teel * bits 1-4 = block fetch table entry (note extra bit) 958c349775eSScott Teel * bits 4-6 = not needed, because ioaccel2 mode has 959c349775eSScott Teel * a separate special register for submitting commands. 960c349775eSScott Teel */ 961c349775eSScott Teel 96225163bd5SWebb Scales /* 96325163bd5SWebb Scales * set_performant_mode: Modify the tag for cciss performant 9643f5eac3aSStephen M. Cameron * set bit 0 for pull model, bits 3-1 for block fetch 9653f5eac3aSStephen M. Cameron * register number 9663f5eac3aSStephen M. Cameron */ 96725163bd5SWebb Scales #define DEFAULT_REPLY_QUEUE (-1) 96825163bd5SWebb Scales static void set_performant_mode(struct ctlr_info *h, struct CommandList *c, 96925163bd5SWebb Scales int reply_queue) 9703f5eac3aSStephen M. Cameron { 971254f796bSMatt Gates if (likely(h->transMethod & CFGTBL_Trans_Performant)) { 9723f5eac3aSStephen M. Cameron c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1); 97325163bd5SWebb Scales if (unlikely(!h->msix_vector)) 97425163bd5SWebb Scales return; 97525163bd5SWebb Scales if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 976254f796bSMatt Gates c->Header.ReplyQueue = 977804a5cb5SJohn Kacur raw_smp_processor_id() % h->nreply_queues; 97825163bd5SWebb Scales else 97925163bd5SWebb Scales c->Header.ReplyQueue = reply_queue % h->nreply_queues; 980254f796bSMatt Gates } 9813f5eac3aSStephen M. Cameron } 9823f5eac3aSStephen M. Cameron 983c349775eSScott Teel static void set_ioaccel1_performant_mode(struct ctlr_info *h, 98425163bd5SWebb Scales struct CommandList *c, 98525163bd5SWebb Scales int reply_queue) 986c349775eSScott Teel { 987c349775eSScott Teel struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex]; 988c349775eSScott Teel 98925163bd5SWebb Scales /* 99025163bd5SWebb Scales * Tell the controller to post the reply to the queue for this 991c349775eSScott Teel * processor. This seems to give the best I/O throughput. 992c349775eSScott Teel */ 99325163bd5SWebb Scales if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 994c349775eSScott Teel cp->ReplyQueue = smp_processor_id() % h->nreply_queues; 99525163bd5SWebb Scales else 99625163bd5SWebb Scales cp->ReplyQueue = reply_queue % h->nreply_queues; 99725163bd5SWebb Scales /* 99825163bd5SWebb Scales * Set the bits in the address sent down to include: 999c349775eSScott Teel * - performant mode bit (bit 0) 1000c349775eSScott Teel * - pull count (bits 1-3) 1001c349775eSScott Teel * - command type (bits 4-6) 1002c349775eSScott Teel */ 1003c349775eSScott Teel c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) | 1004c349775eSScott Teel IOACCEL1_BUSADDR_CMDTYPE; 1005c349775eSScott Teel } 1006c349775eSScott Teel 10078be986ccSStephen Cameron static void set_ioaccel2_tmf_performant_mode(struct ctlr_info *h, 10088be986ccSStephen Cameron struct CommandList *c, 10098be986ccSStephen Cameron int reply_queue) 10108be986ccSStephen Cameron { 10118be986ccSStephen Cameron struct hpsa_tmf_struct *cp = (struct hpsa_tmf_struct *) 10128be986ccSStephen Cameron &h->ioaccel2_cmd_pool[c->cmdindex]; 10138be986ccSStephen Cameron 10148be986ccSStephen Cameron /* Tell the controller to post the reply to the queue for this 10158be986ccSStephen Cameron * processor. This seems to give the best I/O throughput. 10168be986ccSStephen Cameron */ 10178be986ccSStephen Cameron if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 10188be986ccSStephen Cameron cp->reply_queue = smp_processor_id() % h->nreply_queues; 10198be986ccSStephen Cameron else 10208be986ccSStephen Cameron cp->reply_queue = reply_queue % h->nreply_queues; 10218be986ccSStephen Cameron /* Set the bits in the address sent down to include: 10228be986ccSStephen Cameron * - performant mode bit not used in ioaccel mode 2 10238be986ccSStephen Cameron * - pull count (bits 0-3) 10248be986ccSStephen Cameron * - command type isn't needed for ioaccel2 10258be986ccSStephen Cameron */ 10268be986ccSStephen Cameron c->busaddr |= h->ioaccel2_blockFetchTable[0]; 10278be986ccSStephen Cameron } 10288be986ccSStephen Cameron 1029c349775eSScott Teel static void set_ioaccel2_performant_mode(struct ctlr_info *h, 103025163bd5SWebb Scales struct CommandList *c, 103125163bd5SWebb Scales int reply_queue) 1032c349775eSScott Teel { 1033c349775eSScott Teel struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex]; 1034c349775eSScott Teel 103525163bd5SWebb Scales /* 103625163bd5SWebb Scales * Tell the controller to post the reply to the queue for this 1037c349775eSScott Teel * processor. This seems to give the best I/O throughput. 1038c349775eSScott Teel */ 103925163bd5SWebb Scales if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1040c349775eSScott Teel cp->reply_queue = smp_processor_id() % h->nreply_queues; 104125163bd5SWebb Scales else 104225163bd5SWebb Scales cp->reply_queue = reply_queue % h->nreply_queues; 104325163bd5SWebb Scales /* 104425163bd5SWebb Scales * Set the bits in the address sent down to include: 1045c349775eSScott Teel * - performant mode bit not used in ioaccel mode 2 1046c349775eSScott Teel * - pull count (bits 0-3) 1047c349775eSScott Teel * - command type isn't needed for ioaccel2 1048c349775eSScott Teel */ 1049c349775eSScott Teel c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]); 1050c349775eSScott Teel } 1051c349775eSScott Teel 1052e85c5974SStephen M. Cameron static int is_firmware_flash_cmd(u8 *cdb) 1053e85c5974SStephen M. Cameron { 1054e85c5974SStephen M. Cameron return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE; 1055e85c5974SStephen M. Cameron } 1056e85c5974SStephen M. Cameron 1057e85c5974SStephen M. Cameron /* 1058e85c5974SStephen M. Cameron * During firmware flash, the heartbeat register may not update as frequently 1059e85c5974SStephen M. Cameron * as it should. So we dial down lockup detection during firmware flash. and 1060e85c5974SStephen M. Cameron * dial it back up when firmware flash completes. 1061e85c5974SStephen M. Cameron */ 1062e85c5974SStephen M. Cameron #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ) 1063e85c5974SStephen M. Cameron #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ) 1064e85c5974SStephen M. Cameron static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h, 1065e85c5974SStephen M. Cameron struct CommandList *c) 1066e85c5974SStephen M. Cameron { 1067e85c5974SStephen M. Cameron if (!is_firmware_flash_cmd(c->Request.CDB)) 1068e85c5974SStephen M. Cameron return; 1069e85c5974SStephen M. Cameron atomic_inc(&h->firmware_flash_in_progress); 1070e85c5974SStephen M. Cameron h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH; 1071e85c5974SStephen M. Cameron } 1072e85c5974SStephen M. Cameron 1073e85c5974SStephen M. Cameron static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h, 1074e85c5974SStephen M. Cameron struct CommandList *c) 1075e85c5974SStephen M. Cameron { 1076e85c5974SStephen M. Cameron if (is_firmware_flash_cmd(c->Request.CDB) && 1077e85c5974SStephen M. Cameron atomic_dec_and_test(&h->firmware_flash_in_progress)) 1078e85c5974SStephen M. Cameron h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 1079e85c5974SStephen M. Cameron } 1080e85c5974SStephen M. Cameron 108125163bd5SWebb Scales static void __enqueue_cmd_and_start_io(struct ctlr_info *h, 108225163bd5SWebb Scales struct CommandList *c, int reply_queue) 10833f5eac3aSStephen M. Cameron { 1084c05e8866SStephen Cameron dial_down_lockup_detection_during_fw_flash(h, c); 1085c05e8866SStephen Cameron atomic_inc(&h->commands_outstanding); 1086c349775eSScott Teel switch (c->cmd_type) { 1087c349775eSScott Teel case CMD_IOACCEL1: 108825163bd5SWebb Scales set_ioaccel1_performant_mode(h, c, reply_queue); 1089c05e8866SStephen Cameron writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET); 1090c349775eSScott Teel break; 1091c349775eSScott Teel case CMD_IOACCEL2: 109225163bd5SWebb Scales set_ioaccel2_performant_mode(h, c, reply_queue); 1093c05e8866SStephen Cameron writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32); 1094c349775eSScott Teel break; 10958be986ccSStephen Cameron case IOACCEL2_TMF: 10968be986ccSStephen Cameron set_ioaccel2_tmf_performant_mode(h, c, reply_queue); 10978be986ccSStephen Cameron writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32); 10988be986ccSStephen Cameron break; 1099c349775eSScott Teel default: 110025163bd5SWebb Scales set_performant_mode(h, c, reply_queue); 1101f2405db8SDon Brace h->access.submit_command(h, c); 11023f5eac3aSStephen M. Cameron } 1103c05e8866SStephen Cameron } 11043f5eac3aSStephen M. Cameron 1105a58e7e53SWebb Scales static void enqueue_cmd_and_start_io(struct ctlr_info *h, struct CommandList *c) 110625163bd5SWebb Scales { 1107d604f533SWebb Scales if (unlikely(hpsa_is_pending_event(c))) 1108a58e7e53SWebb Scales return finish_cmd(c); 1109a58e7e53SWebb Scales 111025163bd5SWebb Scales __enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE); 111125163bd5SWebb Scales } 111225163bd5SWebb Scales 11133f5eac3aSStephen M. Cameron static inline int is_hba_lunid(unsigned char scsi3addr[]) 11143f5eac3aSStephen M. Cameron { 11153f5eac3aSStephen M. Cameron return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0; 11163f5eac3aSStephen M. Cameron } 11173f5eac3aSStephen M. Cameron 11183f5eac3aSStephen M. Cameron static inline int is_scsi_rev_5(struct ctlr_info *h) 11193f5eac3aSStephen M. Cameron { 11203f5eac3aSStephen M. Cameron if (!h->hba_inquiry_data) 11213f5eac3aSStephen M. Cameron return 0; 11223f5eac3aSStephen M. Cameron if ((h->hba_inquiry_data[2] & 0x07) == 5) 11233f5eac3aSStephen M. Cameron return 1; 11243f5eac3aSStephen M. Cameron return 0; 11253f5eac3aSStephen M. Cameron } 11263f5eac3aSStephen M. Cameron 1127edd16368SStephen M. Cameron static int hpsa_find_target_lun(struct ctlr_info *h, 1128edd16368SStephen M. Cameron unsigned char scsi3addr[], int bus, int *target, int *lun) 1129edd16368SStephen M. Cameron { 1130edd16368SStephen M. Cameron /* finds an unused bus, target, lun for a new physical device 1131edd16368SStephen M. Cameron * assumes h->devlock is held 1132edd16368SStephen M. Cameron */ 1133edd16368SStephen M. Cameron int i, found = 0; 1134cfe5badcSScott Teel DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES); 1135edd16368SStephen M. Cameron 1136263d9401SAkinobu Mita bitmap_zero(lun_taken, HPSA_MAX_DEVICES); 1137edd16368SStephen M. Cameron 1138edd16368SStephen M. Cameron for (i = 0; i < h->ndevices; i++) { 1139edd16368SStephen M. Cameron if (h->dev[i]->bus == bus && h->dev[i]->target != -1) 1140263d9401SAkinobu Mita __set_bit(h->dev[i]->target, lun_taken); 1141edd16368SStephen M. Cameron } 1142edd16368SStephen M. Cameron 1143263d9401SAkinobu Mita i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES); 1144263d9401SAkinobu Mita if (i < HPSA_MAX_DEVICES) { 1145edd16368SStephen M. Cameron /* *bus = 1; */ 1146edd16368SStephen M. Cameron *target = i; 1147edd16368SStephen M. Cameron *lun = 0; 1148edd16368SStephen M. Cameron found = 1; 1149edd16368SStephen M. Cameron } 1150edd16368SStephen M. Cameron return !found; 1151edd16368SStephen M. Cameron } 1152edd16368SStephen M. Cameron 11531d33d85dSDon Brace static void hpsa_show_dev_msg(const char *level, struct ctlr_info *h, 11540d96ef5fSWebb Scales struct hpsa_scsi_dev_t *dev, char *description) 11550d96ef5fSWebb Scales { 11567c59a0d4SDon Brace #define LABEL_SIZE 25 11577c59a0d4SDon Brace char label[LABEL_SIZE]; 11587c59a0d4SDon Brace 11599975ec9dSDon Brace if (h == NULL || h->pdev == NULL || h->scsi_host == NULL) 11609975ec9dSDon Brace return; 11619975ec9dSDon Brace 11627c59a0d4SDon Brace switch (dev->devtype) { 11637c59a0d4SDon Brace case TYPE_RAID: 11647c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "controller"); 11657c59a0d4SDon Brace break; 11667c59a0d4SDon Brace case TYPE_ENCLOSURE: 11677c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "enclosure"); 11687c59a0d4SDon Brace break; 11697c59a0d4SDon Brace case TYPE_DISK: 11707c59a0d4SDon Brace if (dev->external) 11717c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "external"); 11727c59a0d4SDon Brace else if (!is_logical_dev_addr_mode(dev->scsi3addr)) 11737c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "%s", 11747c59a0d4SDon Brace raid_label[PHYSICAL_DRIVE]); 11757c59a0d4SDon Brace else 11767c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "RAID-%s", 11777c59a0d4SDon Brace dev->raid_level > RAID_UNKNOWN ? "?" : 11787c59a0d4SDon Brace raid_label[dev->raid_level]); 11797c59a0d4SDon Brace break; 11807c59a0d4SDon Brace case TYPE_ROM: 11817c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "rom"); 11827c59a0d4SDon Brace break; 11837c59a0d4SDon Brace case TYPE_TAPE: 11847c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "tape"); 11857c59a0d4SDon Brace break; 11867c59a0d4SDon Brace case TYPE_MEDIUM_CHANGER: 11877c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "changer"); 11887c59a0d4SDon Brace break; 11897c59a0d4SDon Brace default: 11907c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "UNKNOWN"); 11917c59a0d4SDon Brace break; 11927c59a0d4SDon Brace } 11937c59a0d4SDon Brace 11940d96ef5fSWebb Scales dev_printk(level, &h->pdev->dev, 11957c59a0d4SDon Brace "scsi %d:%d:%d:%d: %s %s %.8s %.16s %s SSDSmartPathCap%c En%c Exp=%d\n", 11960d96ef5fSWebb Scales h->scsi_host->host_no, dev->bus, dev->target, dev->lun, 11970d96ef5fSWebb Scales description, 11980d96ef5fSWebb Scales scsi_device_type(dev->devtype), 11990d96ef5fSWebb Scales dev->vendor, 12000d96ef5fSWebb Scales dev->model, 12017c59a0d4SDon Brace label, 12020d96ef5fSWebb Scales dev->offload_config ? '+' : '-', 12030d96ef5fSWebb Scales dev->offload_enabled ? '+' : '-', 12042a168208SKevin Barnett dev->expose_device); 12050d96ef5fSWebb Scales } 12060d96ef5fSWebb Scales 1207edd16368SStephen M. Cameron /* Add an entry into h->dev[] array. */ 12088aa60681SDon Brace static int hpsa_scsi_add_entry(struct ctlr_info *h, 1209edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *device, 1210edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *added[], int *nadded) 1211edd16368SStephen M. Cameron { 1212edd16368SStephen M. Cameron /* assumes h->devlock is held */ 1213edd16368SStephen M. Cameron int n = h->ndevices; 1214edd16368SStephen M. Cameron int i; 1215edd16368SStephen M. Cameron unsigned char addr1[8], addr2[8]; 1216edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd; 1217edd16368SStephen M. Cameron 1218cfe5badcSScott Teel if (n >= HPSA_MAX_DEVICES) { 1219edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "too many devices, some will be " 1220edd16368SStephen M. Cameron "inaccessible.\n"); 1221edd16368SStephen M. Cameron return -1; 1222edd16368SStephen M. Cameron } 1223edd16368SStephen M. Cameron 1224edd16368SStephen M. Cameron /* physical devices do not have lun or target assigned until now. */ 1225edd16368SStephen M. Cameron if (device->lun != -1) 1226edd16368SStephen M. Cameron /* Logical device, lun is already assigned. */ 1227edd16368SStephen M. Cameron goto lun_assigned; 1228edd16368SStephen M. Cameron 1229edd16368SStephen M. Cameron /* If this device a non-zero lun of a multi-lun device 1230edd16368SStephen M. Cameron * byte 4 of the 8-byte LUN addr will contain the logical 12312b08b3e9SDon Brace * unit no, zero otherwise. 1232edd16368SStephen M. Cameron */ 1233edd16368SStephen M. Cameron if (device->scsi3addr[4] == 0) { 1234edd16368SStephen M. Cameron /* This is not a non-zero lun of a multi-lun device */ 1235edd16368SStephen M. Cameron if (hpsa_find_target_lun(h, device->scsi3addr, 1236edd16368SStephen M. Cameron device->bus, &device->target, &device->lun) != 0) 1237edd16368SStephen M. Cameron return -1; 1238edd16368SStephen M. Cameron goto lun_assigned; 1239edd16368SStephen M. Cameron } 1240edd16368SStephen M. Cameron 1241edd16368SStephen M. Cameron /* This is a non-zero lun of a multi-lun device. 1242edd16368SStephen M. Cameron * Search through our list and find the device which 12439a4178b7Sshane.seymour * has the same 8 byte LUN address, excepting byte 4 and 5. 1244edd16368SStephen M. Cameron * Assign the same bus and target for this new LUN. 1245edd16368SStephen M. Cameron * Use the logical unit number from the firmware. 1246edd16368SStephen M. Cameron */ 1247edd16368SStephen M. Cameron memcpy(addr1, device->scsi3addr, 8); 1248edd16368SStephen M. Cameron addr1[4] = 0; 12499a4178b7Sshane.seymour addr1[5] = 0; 1250edd16368SStephen M. Cameron for (i = 0; i < n; i++) { 1251edd16368SStephen M. Cameron sd = h->dev[i]; 1252edd16368SStephen M. Cameron memcpy(addr2, sd->scsi3addr, 8); 1253edd16368SStephen M. Cameron addr2[4] = 0; 12549a4178b7Sshane.seymour addr2[5] = 0; 12559a4178b7Sshane.seymour /* differ only in byte 4 and 5? */ 1256edd16368SStephen M. Cameron if (memcmp(addr1, addr2, 8) == 0) { 1257edd16368SStephen M. Cameron device->bus = sd->bus; 1258edd16368SStephen M. Cameron device->target = sd->target; 1259edd16368SStephen M. Cameron device->lun = device->scsi3addr[4]; 1260edd16368SStephen M. Cameron break; 1261edd16368SStephen M. Cameron } 1262edd16368SStephen M. Cameron } 1263edd16368SStephen M. Cameron if (device->lun == -1) { 1264edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "physical device with no LUN=0," 1265edd16368SStephen M. Cameron " suspect firmware bug or unsupported hardware " 1266edd16368SStephen M. Cameron "configuration.\n"); 1267edd16368SStephen M. Cameron return -1; 1268edd16368SStephen M. Cameron } 1269edd16368SStephen M. Cameron 1270edd16368SStephen M. Cameron lun_assigned: 1271edd16368SStephen M. Cameron 1272edd16368SStephen M. Cameron h->dev[n] = device; 1273edd16368SStephen M. Cameron h->ndevices++; 1274edd16368SStephen M. Cameron added[*nadded] = device; 1275edd16368SStephen M. Cameron (*nadded)++; 12760d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, device, 12772a168208SKevin Barnett device->expose_device ? "added" : "masked"); 1278a473d86cSRobert Elliott device->offload_to_be_enabled = device->offload_enabled; 1279a473d86cSRobert Elliott device->offload_enabled = 0; 1280edd16368SStephen M. Cameron return 0; 1281edd16368SStephen M. Cameron } 1282edd16368SStephen M. Cameron 1283bd9244f7SScott Teel /* Update an entry in h->dev[] array. */ 12848aa60681SDon Brace static void hpsa_scsi_update_entry(struct ctlr_info *h, 1285bd9244f7SScott Teel int entry, struct hpsa_scsi_dev_t *new_entry) 1286bd9244f7SScott Teel { 1287a473d86cSRobert Elliott int offload_enabled; 1288bd9244f7SScott Teel /* assumes h->devlock is held */ 1289bd9244f7SScott Teel BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1290bd9244f7SScott Teel 1291bd9244f7SScott Teel /* Raid level changed. */ 1292bd9244f7SScott Teel h->dev[entry]->raid_level = new_entry->raid_level; 1293250fb125SStephen M. Cameron 129403383736SDon Brace /* Raid offload parameters changed. Careful about the ordering. */ 129503383736SDon Brace if (new_entry->offload_config && new_entry->offload_enabled) { 129603383736SDon Brace /* 129703383736SDon Brace * if drive is newly offload_enabled, we want to copy the 129803383736SDon Brace * raid map data first. If previously offload_enabled and 129903383736SDon Brace * offload_config were set, raid map data had better be 130003383736SDon Brace * the same as it was before. if raid map data is changed 130103383736SDon Brace * then it had better be the case that 130203383736SDon Brace * h->dev[entry]->offload_enabled is currently 0. 130303383736SDon Brace */ 13049fb0de2dSStephen M. Cameron h->dev[entry]->raid_map = new_entry->raid_map; 130503383736SDon Brace h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 130603383736SDon Brace } 1307a3144e0bSJoe Handzik if (new_entry->hba_ioaccel_enabled) { 1308a3144e0bSJoe Handzik h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 1309a3144e0bSJoe Handzik wmb(); /* set ioaccel_handle *before* hba_ioaccel_enabled */ 1310a3144e0bSJoe Handzik } 1311a3144e0bSJoe Handzik h->dev[entry]->hba_ioaccel_enabled = new_entry->hba_ioaccel_enabled; 131203383736SDon Brace h->dev[entry]->offload_config = new_entry->offload_config; 131303383736SDon Brace h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror; 131403383736SDon Brace h->dev[entry]->queue_depth = new_entry->queue_depth; 1315250fb125SStephen M. Cameron 131641ce4c35SStephen Cameron /* 131741ce4c35SStephen Cameron * We can turn off ioaccel offload now, but need to delay turning 131841ce4c35SStephen Cameron * it on until we can update h->dev[entry]->phys_disk[], but we 131941ce4c35SStephen Cameron * can't do that until all the devices are updated. 132041ce4c35SStephen Cameron */ 132141ce4c35SStephen Cameron h->dev[entry]->offload_to_be_enabled = new_entry->offload_enabled; 132241ce4c35SStephen Cameron if (!new_entry->offload_enabled) 132341ce4c35SStephen Cameron h->dev[entry]->offload_enabled = 0; 132441ce4c35SStephen Cameron 1325a473d86cSRobert Elliott offload_enabled = h->dev[entry]->offload_enabled; 1326a473d86cSRobert Elliott h->dev[entry]->offload_enabled = h->dev[entry]->offload_to_be_enabled; 13270d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated"); 1328a473d86cSRobert Elliott h->dev[entry]->offload_enabled = offload_enabled; 1329bd9244f7SScott Teel } 1330bd9244f7SScott Teel 13312a8ccf31SStephen M. Cameron /* Replace an entry from h->dev[] array. */ 13328aa60681SDon Brace static void hpsa_scsi_replace_entry(struct ctlr_info *h, 13332a8ccf31SStephen M. Cameron int entry, struct hpsa_scsi_dev_t *new_entry, 13342a8ccf31SStephen M. Cameron struct hpsa_scsi_dev_t *added[], int *nadded, 13352a8ccf31SStephen M. Cameron struct hpsa_scsi_dev_t *removed[], int *nremoved) 13362a8ccf31SStephen M. Cameron { 13372a8ccf31SStephen M. Cameron /* assumes h->devlock is held */ 1338cfe5badcSScott Teel BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 13392a8ccf31SStephen M. Cameron removed[*nremoved] = h->dev[entry]; 13402a8ccf31SStephen M. Cameron (*nremoved)++; 134101350d05SStephen M. Cameron 134201350d05SStephen M. Cameron /* 134301350d05SStephen M. Cameron * New physical devices won't have target/lun assigned yet 134401350d05SStephen M. Cameron * so we need to preserve the values in the slot we are replacing. 134501350d05SStephen M. Cameron */ 134601350d05SStephen M. Cameron if (new_entry->target == -1) { 134701350d05SStephen M. Cameron new_entry->target = h->dev[entry]->target; 134801350d05SStephen M. Cameron new_entry->lun = h->dev[entry]->lun; 134901350d05SStephen M. Cameron } 135001350d05SStephen M. Cameron 13512a8ccf31SStephen M. Cameron h->dev[entry] = new_entry; 13522a8ccf31SStephen M. Cameron added[*nadded] = new_entry; 13532a8ccf31SStephen M. Cameron (*nadded)++; 13540d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced"); 1355a473d86cSRobert Elliott new_entry->offload_to_be_enabled = new_entry->offload_enabled; 1356a473d86cSRobert Elliott new_entry->offload_enabled = 0; 13572a8ccf31SStephen M. Cameron } 13582a8ccf31SStephen M. Cameron 1359edd16368SStephen M. Cameron /* Remove an entry from h->dev[] array. */ 13608aa60681SDon Brace static void hpsa_scsi_remove_entry(struct ctlr_info *h, int entry, 1361edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *removed[], int *nremoved) 1362edd16368SStephen M. Cameron { 1363edd16368SStephen M. Cameron /* assumes h->devlock is held */ 1364edd16368SStephen M. Cameron int i; 1365edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd; 1366edd16368SStephen M. Cameron 1367cfe5badcSScott Teel BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1368edd16368SStephen M. Cameron 1369edd16368SStephen M. Cameron sd = h->dev[entry]; 1370edd16368SStephen M. Cameron removed[*nremoved] = h->dev[entry]; 1371edd16368SStephen M. Cameron (*nremoved)++; 1372edd16368SStephen M. Cameron 1373edd16368SStephen M. Cameron for (i = entry; i < h->ndevices-1; i++) 1374edd16368SStephen M. Cameron h->dev[i] = h->dev[i+1]; 1375edd16368SStephen M. Cameron h->ndevices--; 13760d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, sd, "removed"); 1377edd16368SStephen M. Cameron } 1378edd16368SStephen M. Cameron 1379edd16368SStephen M. Cameron #define SCSI3ADDR_EQ(a, b) ( \ 1380edd16368SStephen M. Cameron (a)[7] == (b)[7] && \ 1381edd16368SStephen M. Cameron (a)[6] == (b)[6] && \ 1382edd16368SStephen M. Cameron (a)[5] == (b)[5] && \ 1383edd16368SStephen M. Cameron (a)[4] == (b)[4] && \ 1384edd16368SStephen M. Cameron (a)[3] == (b)[3] && \ 1385edd16368SStephen M. Cameron (a)[2] == (b)[2] && \ 1386edd16368SStephen M. Cameron (a)[1] == (b)[1] && \ 1387edd16368SStephen M. Cameron (a)[0] == (b)[0]) 1388edd16368SStephen M. Cameron 1389edd16368SStephen M. Cameron static void fixup_botched_add(struct ctlr_info *h, 1390edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *added) 1391edd16368SStephen M. Cameron { 1392edd16368SStephen M. Cameron /* called when scsi_add_device fails in order to re-adjust 1393edd16368SStephen M. Cameron * h->dev[] to match the mid layer's view. 1394edd16368SStephen M. Cameron */ 1395edd16368SStephen M. Cameron unsigned long flags; 1396edd16368SStephen M. Cameron int i, j; 1397edd16368SStephen M. Cameron 1398edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 1399edd16368SStephen M. Cameron for (i = 0; i < h->ndevices; i++) { 1400edd16368SStephen M. Cameron if (h->dev[i] == added) { 1401edd16368SStephen M. Cameron for (j = i; j < h->ndevices-1; j++) 1402edd16368SStephen M. Cameron h->dev[j] = h->dev[j+1]; 1403edd16368SStephen M. Cameron h->ndevices--; 1404edd16368SStephen M. Cameron break; 1405edd16368SStephen M. Cameron } 1406edd16368SStephen M. Cameron } 1407edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 1408edd16368SStephen M. Cameron kfree(added); 1409edd16368SStephen M. Cameron } 1410edd16368SStephen M. Cameron 1411edd16368SStephen M. Cameron static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1, 1412edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *dev2) 1413edd16368SStephen M. Cameron { 1414edd16368SStephen M. Cameron /* we compare everything except lun and target as these 1415edd16368SStephen M. Cameron * are not yet assigned. Compare parts likely 1416edd16368SStephen M. Cameron * to differ first 1417edd16368SStephen M. Cameron */ 1418edd16368SStephen M. Cameron if (memcmp(dev1->scsi3addr, dev2->scsi3addr, 1419edd16368SStephen M. Cameron sizeof(dev1->scsi3addr)) != 0) 1420edd16368SStephen M. Cameron return 0; 1421edd16368SStephen M. Cameron if (memcmp(dev1->device_id, dev2->device_id, 1422edd16368SStephen M. Cameron sizeof(dev1->device_id)) != 0) 1423edd16368SStephen M. Cameron return 0; 1424edd16368SStephen M. Cameron if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0) 1425edd16368SStephen M. Cameron return 0; 1426edd16368SStephen M. Cameron if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0) 1427edd16368SStephen M. Cameron return 0; 1428edd16368SStephen M. Cameron if (dev1->devtype != dev2->devtype) 1429edd16368SStephen M. Cameron return 0; 1430edd16368SStephen M. Cameron if (dev1->bus != dev2->bus) 1431edd16368SStephen M. Cameron return 0; 1432edd16368SStephen M. Cameron return 1; 1433edd16368SStephen M. Cameron } 1434edd16368SStephen M. Cameron 1435bd9244f7SScott Teel static inline int device_updated(struct hpsa_scsi_dev_t *dev1, 1436bd9244f7SScott Teel struct hpsa_scsi_dev_t *dev2) 1437bd9244f7SScott Teel { 1438bd9244f7SScott Teel /* Device attributes that can change, but don't mean 1439bd9244f7SScott Teel * that the device is a different device, nor that the OS 1440bd9244f7SScott Teel * needs to be told anything about the change. 1441bd9244f7SScott Teel */ 1442bd9244f7SScott Teel if (dev1->raid_level != dev2->raid_level) 1443bd9244f7SScott Teel return 1; 1444250fb125SStephen M. Cameron if (dev1->offload_config != dev2->offload_config) 1445250fb125SStephen M. Cameron return 1; 1446250fb125SStephen M. Cameron if (dev1->offload_enabled != dev2->offload_enabled) 1447250fb125SStephen M. Cameron return 1; 144893849508SDon Brace if (!is_logical_dev_addr_mode(dev1->scsi3addr)) 144903383736SDon Brace if (dev1->queue_depth != dev2->queue_depth) 145003383736SDon Brace return 1; 1451bd9244f7SScott Teel return 0; 1452bd9244f7SScott Teel } 1453bd9244f7SScott Teel 1454edd16368SStephen M. Cameron /* Find needle in haystack. If exact match found, return DEVICE_SAME, 1455edd16368SStephen M. Cameron * and return needle location in *index. If scsi3addr matches, but not 1456edd16368SStephen M. Cameron * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle 1457bd9244f7SScott Teel * location in *index. 1458bd9244f7SScott Teel * In the case of a minor device attribute change, such as RAID level, just 1459bd9244f7SScott Teel * return DEVICE_UPDATED, along with the updated device's location in index. 1460bd9244f7SScott Teel * If needle not found, return DEVICE_NOT_FOUND. 1461edd16368SStephen M. Cameron */ 1462edd16368SStephen M. Cameron static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle, 1463edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *haystack[], int haystack_size, 1464edd16368SStephen M. Cameron int *index) 1465edd16368SStephen M. Cameron { 1466edd16368SStephen M. Cameron int i; 1467edd16368SStephen M. Cameron #define DEVICE_NOT_FOUND 0 1468edd16368SStephen M. Cameron #define DEVICE_CHANGED 1 1469edd16368SStephen M. Cameron #define DEVICE_SAME 2 1470bd9244f7SScott Teel #define DEVICE_UPDATED 3 14711d33d85dSDon Brace if (needle == NULL) 14721d33d85dSDon Brace return DEVICE_NOT_FOUND; 14731d33d85dSDon Brace 1474edd16368SStephen M. Cameron for (i = 0; i < haystack_size; i++) { 147523231048SStephen M. Cameron if (haystack[i] == NULL) /* previously removed. */ 147623231048SStephen M. Cameron continue; 1477edd16368SStephen M. Cameron if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) { 1478edd16368SStephen M. Cameron *index = i; 1479bd9244f7SScott Teel if (device_is_the_same(needle, haystack[i])) { 1480bd9244f7SScott Teel if (device_updated(needle, haystack[i])) 1481bd9244f7SScott Teel return DEVICE_UPDATED; 1482edd16368SStephen M. Cameron return DEVICE_SAME; 1483bd9244f7SScott Teel } else { 14849846590eSStephen M. Cameron /* Keep offline devices offline */ 14859846590eSStephen M. Cameron if (needle->volume_offline) 14869846590eSStephen M. Cameron return DEVICE_NOT_FOUND; 1487edd16368SStephen M. Cameron return DEVICE_CHANGED; 1488edd16368SStephen M. Cameron } 1489edd16368SStephen M. Cameron } 1490bd9244f7SScott Teel } 1491edd16368SStephen M. Cameron *index = -1; 1492edd16368SStephen M. Cameron return DEVICE_NOT_FOUND; 1493edd16368SStephen M. Cameron } 1494edd16368SStephen M. Cameron 14959846590eSStephen M. Cameron static void hpsa_monitor_offline_device(struct ctlr_info *h, 14969846590eSStephen M. Cameron unsigned char scsi3addr[]) 14979846590eSStephen M. Cameron { 14989846590eSStephen M. Cameron struct offline_device_entry *device; 14999846590eSStephen M. Cameron unsigned long flags; 15009846590eSStephen M. Cameron 15019846590eSStephen M. Cameron /* Check to see if device is already on the list */ 15029846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 15039846590eSStephen M. Cameron list_for_each_entry(device, &h->offline_device_list, offline_list) { 15049846590eSStephen M. Cameron if (memcmp(device->scsi3addr, scsi3addr, 15059846590eSStephen M. Cameron sizeof(device->scsi3addr)) == 0) { 15069846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 15079846590eSStephen M. Cameron return; 15089846590eSStephen M. Cameron } 15099846590eSStephen M. Cameron } 15109846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 15119846590eSStephen M. Cameron 15129846590eSStephen M. Cameron /* Device is not on the list, add it. */ 15139846590eSStephen M. Cameron device = kmalloc(sizeof(*device), GFP_KERNEL); 15149846590eSStephen M. Cameron if (!device) { 15159846590eSStephen M. Cameron dev_warn(&h->pdev->dev, "out of memory in %s\n", __func__); 15169846590eSStephen M. Cameron return; 15179846590eSStephen M. Cameron } 15189846590eSStephen M. Cameron memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr)); 15199846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 15209846590eSStephen M. Cameron list_add_tail(&device->offline_list, &h->offline_device_list); 15219846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 15229846590eSStephen M. Cameron } 15239846590eSStephen M. Cameron 15249846590eSStephen M. Cameron /* Print a message explaining various offline volume states */ 15259846590eSStephen M. Cameron static void hpsa_show_volume_status(struct ctlr_info *h, 15269846590eSStephen M. Cameron struct hpsa_scsi_dev_t *sd) 15279846590eSStephen M. Cameron { 15289846590eSStephen M. Cameron if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED) 15299846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15309846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n", 15319846590eSStephen M. Cameron h->scsi_host->host_no, 15329846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15339846590eSStephen M. Cameron switch (sd->volume_offline) { 15349846590eSStephen M. Cameron case HPSA_LV_OK: 15359846590eSStephen M. Cameron break; 15369846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ERASE: 15379846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15389846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n", 15399846590eSStephen M. Cameron h->scsi_host->host_no, 15409846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15419846590eSStephen M. Cameron break; 15425ca01204SScott Benesh case HPSA_LV_NOT_AVAILABLE: 15435ca01204SScott Benesh dev_info(&h->pdev->dev, 15445ca01204SScott Benesh "C%d:B%d:T%d:L%d Volume is waiting for transforming volume.\n", 15455ca01204SScott Benesh h->scsi_host->host_no, 15465ca01204SScott Benesh sd->bus, sd->target, sd->lun); 15475ca01204SScott Benesh break; 15489846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_RPI: 15499846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15505ca01204SScott Benesh "C%d:B%d:T%d:L%d Volume is undergoing rapid parity init.\n", 15519846590eSStephen M. Cameron h->scsi_host->host_no, 15529846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15539846590eSStephen M. Cameron break; 15549846590eSStephen M. Cameron case HPSA_LV_PENDING_RPI: 15559846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15569846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n", 15579846590eSStephen M. Cameron h->scsi_host->host_no, 15589846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15599846590eSStephen M. Cameron break; 15609846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_NO_KEY: 15619846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15629846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n", 15639846590eSStephen M. Cameron h->scsi_host->host_no, 15649846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15659846590eSStephen M. Cameron break; 15669846590eSStephen M. Cameron case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER: 15679846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15689846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n", 15699846590eSStephen M. Cameron h->scsi_host->host_no, 15709846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15719846590eSStephen M. Cameron break; 15729846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION: 15739846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15749846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n", 15759846590eSStephen M. Cameron h->scsi_host->host_no, 15769846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15779846590eSStephen M. Cameron break; 15789846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING: 15799846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15809846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n", 15819846590eSStephen M. Cameron h->scsi_host->host_no, 15829846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15839846590eSStephen M. Cameron break; 15849846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 15859846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15869846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n", 15879846590eSStephen M. Cameron h->scsi_host->host_no, 15889846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15899846590eSStephen M. Cameron break; 15909846590eSStephen M. Cameron case HPSA_LV_PENDING_ENCRYPTION: 15919846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15929846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n", 15939846590eSStephen M. Cameron h->scsi_host->host_no, 15949846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15959846590eSStephen M. Cameron break; 15969846590eSStephen M. Cameron case HPSA_LV_PENDING_ENCRYPTION_REKEYING: 15979846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15989846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n", 15999846590eSStephen M. Cameron h->scsi_host->host_no, 16009846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16019846590eSStephen M. Cameron break; 16029846590eSStephen M. Cameron } 16039846590eSStephen M. Cameron } 16049846590eSStephen M. Cameron 160503383736SDon Brace /* 160603383736SDon Brace * Figure the list of physical drive pointers for a logical drive with 160703383736SDon Brace * raid offload configured. 160803383736SDon Brace */ 160903383736SDon Brace static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h, 161003383736SDon Brace struct hpsa_scsi_dev_t *dev[], int ndevices, 161103383736SDon Brace struct hpsa_scsi_dev_t *logical_drive) 161203383736SDon Brace { 161303383736SDon Brace struct raid_map_data *map = &logical_drive->raid_map; 161403383736SDon Brace struct raid_map_disk_data *dd = &map->data[0]; 161503383736SDon Brace int i, j; 161603383736SDon Brace int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) + 161703383736SDon Brace le16_to_cpu(map->metadata_disks_per_row); 161803383736SDon Brace int nraid_map_entries = le16_to_cpu(map->row_cnt) * 161903383736SDon Brace le16_to_cpu(map->layout_map_count) * 162003383736SDon Brace total_disks_per_row; 162103383736SDon Brace int nphys_disk = le16_to_cpu(map->layout_map_count) * 162203383736SDon Brace total_disks_per_row; 162303383736SDon Brace int qdepth; 162403383736SDon Brace 162503383736SDon Brace if (nraid_map_entries > RAID_MAP_MAX_ENTRIES) 162603383736SDon Brace nraid_map_entries = RAID_MAP_MAX_ENTRIES; 162703383736SDon Brace 1628d604f533SWebb Scales logical_drive->nphysical_disks = nraid_map_entries; 1629d604f533SWebb Scales 163003383736SDon Brace qdepth = 0; 163103383736SDon Brace for (i = 0; i < nraid_map_entries; i++) { 163203383736SDon Brace logical_drive->phys_disk[i] = NULL; 163303383736SDon Brace if (!logical_drive->offload_config) 163403383736SDon Brace continue; 163503383736SDon Brace for (j = 0; j < ndevices; j++) { 16361d33d85dSDon Brace if (dev[j] == NULL) 16371d33d85dSDon Brace continue; 163803383736SDon Brace if (dev[j]->devtype != TYPE_DISK) 163903383736SDon Brace continue; 1640f3f01730SKevin Barnett if (is_logical_device(dev[j])) 164103383736SDon Brace continue; 164203383736SDon Brace if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle) 164303383736SDon Brace continue; 164403383736SDon Brace 164503383736SDon Brace logical_drive->phys_disk[i] = dev[j]; 164603383736SDon Brace if (i < nphys_disk) 164703383736SDon Brace qdepth = min(h->nr_cmds, qdepth + 164803383736SDon Brace logical_drive->phys_disk[i]->queue_depth); 164903383736SDon Brace break; 165003383736SDon Brace } 165103383736SDon Brace 165203383736SDon Brace /* 165303383736SDon Brace * This can happen if a physical drive is removed and 165403383736SDon Brace * the logical drive is degraded. In that case, the RAID 165503383736SDon Brace * map data will refer to a physical disk which isn't actually 165603383736SDon Brace * present. And in that case offload_enabled should already 165703383736SDon Brace * be 0, but we'll turn it off here just in case 165803383736SDon Brace */ 165903383736SDon Brace if (!logical_drive->phys_disk[i]) { 166003383736SDon Brace logical_drive->offload_enabled = 0; 166141ce4c35SStephen Cameron logical_drive->offload_to_be_enabled = 0; 166241ce4c35SStephen Cameron logical_drive->queue_depth = 8; 166303383736SDon Brace } 166403383736SDon Brace } 166503383736SDon Brace if (nraid_map_entries) 166603383736SDon Brace /* 166703383736SDon Brace * This is correct for reads, too high for full stripe writes, 166803383736SDon Brace * way too high for partial stripe writes 166903383736SDon Brace */ 167003383736SDon Brace logical_drive->queue_depth = qdepth; 167103383736SDon Brace else 167203383736SDon Brace logical_drive->queue_depth = h->nr_cmds; 167303383736SDon Brace } 167403383736SDon Brace 167503383736SDon Brace static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h, 167603383736SDon Brace struct hpsa_scsi_dev_t *dev[], int ndevices) 167703383736SDon Brace { 167803383736SDon Brace int i; 167903383736SDon Brace 168003383736SDon Brace for (i = 0; i < ndevices; i++) { 16811d33d85dSDon Brace if (dev[i] == NULL) 16821d33d85dSDon Brace continue; 168303383736SDon Brace if (dev[i]->devtype != TYPE_DISK) 168403383736SDon Brace continue; 1685f3f01730SKevin Barnett if (!is_logical_device(dev[i])) 168603383736SDon Brace continue; 168741ce4c35SStephen Cameron 168841ce4c35SStephen Cameron /* 168941ce4c35SStephen Cameron * If offload is currently enabled, the RAID map and 169041ce4c35SStephen Cameron * phys_disk[] assignment *better* not be changing 169141ce4c35SStephen Cameron * and since it isn't changing, we do not need to 169241ce4c35SStephen Cameron * update it. 169341ce4c35SStephen Cameron */ 169441ce4c35SStephen Cameron if (dev[i]->offload_enabled) 169541ce4c35SStephen Cameron continue; 169641ce4c35SStephen Cameron 169703383736SDon Brace hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]); 169803383736SDon Brace } 169903383736SDon Brace } 170003383736SDon Brace 1701096ccff4SKevin Barnett static int hpsa_add_device(struct ctlr_info *h, struct hpsa_scsi_dev_t *device) 1702096ccff4SKevin Barnett { 1703096ccff4SKevin Barnett int rc = 0; 1704096ccff4SKevin Barnett 1705096ccff4SKevin Barnett if (!h->scsi_host) 1706096ccff4SKevin Barnett return 1; 1707096ccff4SKevin Barnett 1708*d04e62b9SKevin Barnett if (is_logical_device(device)) /* RAID */ 1709096ccff4SKevin Barnett rc = scsi_add_device(h->scsi_host, device->bus, 1710096ccff4SKevin Barnett device->target, device->lun); 1711*d04e62b9SKevin Barnett else /* HBA */ 1712*d04e62b9SKevin Barnett rc = hpsa_add_sas_device(h->sas_host, device); 1713*d04e62b9SKevin Barnett 1714096ccff4SKevin Barnett return rc; 1715096ccff4SKevin Barnett } 1716096ccff4SKevin Barnett 1717096ccff4SKevin Barnett static void hpsa_remove_device(struct ctlr_info *h, 1718096ccff4SKevin Barnett struct hpsa_scsi_dev_t *device) 1719096ccff4SKevin Barnett { 1720096ccff4SKevin Barnett struct scsi_device *sdev = NULL; 1721096ccff4SKevin Barnett 1722096ccff4SKevin Barnett if (!h->scsi_host) 1723096ccff4SKevin Barnett return; 1724096ccff4SKevin Barnett 1725*d04e62b9SKevin Barnett if (is_logical_device(device)) { /* RAID */ 1726096ccff4SKevin Barnett sdev = scsi_device_lookup(h->scsi_host, device->bus, 1727096ccff4SKevin Barnett device->target, device->lun); 1728096ccff4SKevin Barnett if (sdev) { 1729096ccff4SKevin Barnett scsi_remove_device(sdev); 1730096ccff4SKevin Barnett scsi_device_put(sdev); 1731096ccff4SKevin Barnett } else { 1732096ccff4SKevin Barnett /* 1733096ccff4SKevin Barnett * We don't expect to get here. Future commands 1734096ccff4SKevin Barnett * to this device will get a selection timeout as 1735096ccff4SKevin Barnett * if the device were gone. 1736096ccff4SKevin Barnett */ 1737096ccff4SKevin Barnett hpsa_show_dev_msg(KERN_WARNING, h, device, 1738096ccff4SKevin Barnett "didn't find device for removal."); 1739096ccff4SKevin Barnett } 1740*d04e62b9SKevin Barnett } else /* HBA */ 1741*d04e62b9SKevin Barnett hpsa_remove_sas_device(device); 1742096ccff4SKevin Barnett } 1743096ccff4SKevin Barnett 17448aa60681SDon Brace static void adjust_hpsa_scsi_table(struct ctlr_info *h, 1745edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd[], int nsds) 1746edd16368SStephen M. Cameron { 1747edd16368SStephen M. Cameron /* sd contains scsi3 addresses and devtypes, and inquiry 1748edd16368SStephen M. Cameron * data. This function takes what's in sd to be the current 1749edd16368SStephen M. Cameron * reality and updates h->dev[] to reflect that reality. 1750edd16368SStephen M. Cameron */ 1751edd16368SStephen M. Cameron int i, entry, device_change, changes = 0; 1752edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *csd; 1753edd16368SStephen M. Cameron unsigned long flags; 1754edd16368SStephen M. Cameron struct hpsa_scsi_dev_t **added, **removed; 1755edd16368SStephen M. Cameron int nadded, nremoved; 1756edd16368SStephen M. Cameron 1757da03ded0SDon Brace /* 1758da03ded0SDon Brace * A reset can cause a device status to change 1759da03ded0SDon Brace * re-schedule the scan to see what happened. 1760da03ded0SDon Brace */ 1761da03ded0SDon Brace if (h->reset_in_progress) { 1762da03ded0SDon Brace h->drv_req_rescan = 1; 1763da03ded0SDon Brace return; 1764da03ded0SDon Brace } 1765da03ded0SDon Brace 1766cfe5badcSScott Teel added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL); 1767cfe5badcSScott Teel removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL); 1768edd16368SStephen M. Cameron 1769edd16368SStephen M. Cameron if (!added || !removed) { 1770edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "out of memory in " 1771edd16368SStephen M. Cameron "adjust_hpsa_scsi_table\n"); 1772edd16368SStephen M. Cameron goto free_and_out; 1773edd16368SStephen M. Cameron } 1774edd16368SStephen M. Cameron 1775edd16368SStephen M. Cameron spin_lock_irqsave(&h->devlock, flags); 1776edd16368SStephen M. Cameron 1777edd16368SStephen M. Cameron /* find any devices in h->dev[] that are not in 1778edd16368SStephen M. Cameron * sd[] and remove them from h->dev[], and for any 1779edd16368SStephen M. Cameron * devices which have changed, remove the old device 1780edd16368SStephen M. Cameron * info and add the new device info. 1781bd9244f7SScott Teel * If minor device attributes change, just update 1782bd9244f7SScott Teel * the existing device structure. 1783edd16368SStephen M. Cameron */ 1784edd16368SStephen M. Cameron i = 0; 1785edd16368SStephen M. Cameron nremoved = 0; 1786edd16368SStephen M. Cameron nadded = 0; 1787edd16368SStephen M. Cameron while (i < h->ndevices) { 1788edd16368SStephen M. Cameron csd = h->dev[i]; 1789edd16368SStephen M. Cameron device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry); 1790edd16368SStephen M. Cameron if (device_change == DEVICE_NOT_FOUND) { 1791edd16368SStephen M. Cameron changes++; 17928aa60681SDon Brace hpsa_scsi_remove_entry(h, i, removed, &nremoved); 1793edd16368SStephen M. Cameron continue; /* remove ^^^, hence i not incremented */ 1794edd16368SStephen M. Cameron } else if (device_change == DEVICE_CHANGED) { 1795edd16368SStephen M. Cameron changes++; 17968aa60681SDon Brace hpsa_scsi_replace_entry(h, i, sd[entry], 17972a8ccf31SStephen M. Cameron added, &nadded, removed, &nremoved); 1798c7f172dcSStephen M. Cameron /* Set it to NULL to prevent it from being freed 1799c7f172dcSStephen M. Cameron * at the bottom of hpsa_update_scsi_devices() 1800c7f172dcSStephen M. Cameron */ 1801c7f172dcSStephen M. Cameron sd[entry] = NULL; 1802bd9244f7SScott Teel } else if (device_change == DEVICE_UPDATED) { 18038aa60681SDon Brace hpsa_scsi_update_entry(h, i, sd[entry]); 1804edd16368SStephen M. Cameron } 1805edd16368SStephen M. Cameron i++; 1806edd16368SStephen M. Cameron } 1807edd16368SStephen M. Cameron 1808edd16368SStephen M. Cameron /* Now, make sure every device listed in sd[] is also 1809edd16368SStephen M. Cameron * listed in h->dev[], adding them if they aren't found 1810edd16368SStephen M. Cameron */ 1811edd16368SStephen M. Cameron 1812edd16368SStephen M. Cameron for (i = 0; i < nsds; i++) { 1813edd16368SStephen M. Cameron if (!sd[i]) /* if already added above. */ 1814edd16368SStephen M. Cameron continue; 18159846590eSStephen M. Cameron 18169846590eSStephen M. Cameron /* Don't add devices which are NOT READY, FORMAT IN PROGRESS 18179846590eSStephen M. Cameron * as the SCSI mid-layer does not handle such devices well. 18189846590eSStephen M. Cameron * It relentlessly loops sending TUR at 3Hz, then READ(10) 18199846590eSStephen M. Cameron * at 160Hz, and prevents the system from coming up. 18209846590eSStephen M. Cameron */ 18219846590eSStephen M. Cameron if (sd[i]->volume_offline) { 18229846590eSStephen M. Cameron hpsa_show_volume_status(h, sd[i]); 18230d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline"); 18249846590eSStephen M. Cameron continue; 18259846590eSStephen M. Cameron } 18269846590eSStephen M. Cameron 1827edd16368SStephen M. Cameron device_change = hpsa_scsi_find_entry(sd[i], h->dev, 1828edd16368SStephen M. Cameron h->ndevices, &entry); 1829edd16368SStephen M. Cameron if (device_change == DEVICE_NOT_FOUND) { 1830edd16368SStephen M. Cameron changes++; 18318aa60681SDon Brace if (hpsa_scsi_add_entry(h, sd[i], added, &nadded) != 0) 1832edd16368SStephen M. Cameron break; 1833edd16368SStephen M. Cameron sd[i] = NULL; /* prevent from being freed later. */ 1834edd16368SStephen M. Cameron } else if (device_change == DEVICE_CHANGED) { 1835edd16368SStephen M. Cameron /* should never happen... */ 1836edd16368SStephen M. Cameron changes++; 1837edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 1838edd16368SStephen M. Cameron "device unexpectedly changed.\n"); 1839edd16368SStephen M. Cameron /* but if it does happen, we just ignore that device */ 1840edd16368SStephen M. Cameron } 1841edd16368SStephen M. Cameron } 184241ce4c35SStephen Cameron hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices); 184341ce4c35SStephen Cameron 184441ce4c35SStephen Cameron /* Now that h->dev[]->phys_disk[] is coherent, we can enable 184541ce4c35SStephen Cameron * any logical drives that need it enabled. 184641ce4c35SStephen Cameron */ 18471d33d85dSDon Brace for (i = 0; i < h->ndevices; i++) { 18481d33d85dSDon Brace if (h->dev[i] == NULL) 18491d33d85dSDon Brace continue; 185041ce4c35SStephen Cameron h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled; 18511d33d85dSDon Brace } 185241ce4c35SStephen Cameron 1853edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->devlock, flags); 1854edd16368SStephen M. Cameron 18559846590eSStephen M. Cameron /* Monitor devices which are in one of several NOT READY states to be 18569846590eSStephen M. Cameron * brought online later. This must be done without holding h->devlock, 18579846590eSStephen M. Cameron * so don't touch h->dev[] 18589846590eSStephen M. Cameron */ 18599846590eSStephen M. Cameron for (i = 0; i < nsds; i++) { 18609846590eSStephen M. Cameron if (!sd[i]) /* if already added above. */ 18619846590eSStephen M. Cameron continue; 18629846590eSStephen M. Cameron if (sd[i]->volume_offline) 18639846590eSStephen M. Cameron hpsa_monitor_offline_device(h, sd[i]->scsi3addr); 18649846590eSStephen M. Cameron } 18659846590eSStephen M. Cameron 1866edd16368SStephen M. Cameron /* Don't notify scsi mid layer of any changes the first time through 1867edd16368SStephen M. Cameron * (or if there are no changes) scsi_scan_host will do it later the 1868edd16368SStephen M. Cameron * first time through. 1869edd16368SStephen M. Cameron */ 18708aa60681SDon Brace if (!changes) 1871edd16368SStephen M. Cameron goto free_and_out; 1872edd16368SStephen M. Cameron 1873edd16368SStephen M. Cameron /* Notify scsi mid layer of any removed devices */ 1874edd16368SStephen M. Cameron for (i = 0; i < nremoved; i++) { 18751d33d85dSDon Brace if (removed[i] == NULL) 18761d33d85dSDon Brace continue; 1877096ccff4SKevin Barnett if (removed[i]->expose_device) 1878096ccff4SKevin Barnett hpsa_remove_device(h, removed[i]); 1879edd16368SStephen M. Cameron kfree(removed[i]); 1880edd16368SStephen M. Cameron removed[i] = NULL; 1881edd16368SStephen M. Cameron } 1882edd16368SStephen M. Cameron 1883edd16368SStephen M. Cameron /* Notify scsi mid layer of any added devices */ 1884edd16368SStephen M. Cameron for (i = 0; i < nadded; i++) { 1885096ccff4SKevin Barnett int rc = 0; 1886096ccff4SKevin Barnett 18871d33d85dSDon Brace if (added[i] == NULL) 18881d33d85dSDon Brace continue; 18892a168208SKevin Barnett if (!(added[i]->expose_device)) 189041ce4c35SStephen Cameron continue; 1891096ccff4SKevin Barnett rc = hpsa_add_device(h, added[i]); 1892096ccff4SKevin Barnett if (!rc) 1893edd16368SStephen M. Cameron continue; 1894096ccff4SKevin Barnett dev_warn(&h->pdev->dev, 1895096ccff4SKevin Barnett "addition failed %d, device not added.", rc); 1896edd16368SStephen M. Cameron /* now we have to remove it from h->dev, 1897edd16368SStephen M. Cameron * since it didn't get added to scsi mid layer 1898edd16368SStephen M. Cameron */ 1899edd16368SStephen M. Cameron fixup_botched_add(h, added[i]); 1900853633e8SDon Brace h->drv_req_rescan = 1; 1901edd16368SStephen M. Cameron } 1902edd16368SStephen M. Cameron 1903edd16368SStephen M. Cameron free_and_out: 1904edd16368SStephen M. Cameron kfree(added); 1905edd16368SStephen M. Cameron kfree(removed); 1906edd16368SStephen M. Cameron } 1907edd16368SStephen M. Cameron 1908edd16368SStephen M. Cameron /* 19099e03aa2fSJoe Perches * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t * 1910edd16368SStephen M. Cameron * Assume's h->devlock is held. 1911edd16368SStephen M. Cameron */ 1912edd16368SStephen M. Cameron static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h, 1913edd16368SStephen M. Cameron int bus, int target, int lun) 1914edd16368SStephen M. Cameron { 1915edd16368SStephen M. Cameron int i; 1916edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd; 1917edd16368SStephen M. Cameron 1918edd16368SStephen M. Cameron for (i = 0; i < h->ndevices; i++) { 1919edd16368SStephen M. Cameron sd = h->dev[i]; 1920edd16368SStephen M. Cameron if (sd->bus == bus && sd->target == target && sd->lun == lun) 1921edd16368SStephen M. Cameron return sd; 1922edd16368SStephen M. Cameron } 1923edd16368SStephen M. Cameron return NULL; 1924edd16368SStephen M. Cameron } 1925edd16368SStephen M. Cameron 1926edd16368SStephen M. Cameron static int hpsa_slave_alloc(struct scsi_device *sdev) 1927edd16368SStephen M. Cameron { 1928edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd; 1929edd16368SStephen M. Cameron unsigned long flags; 1930edd16368SStephen M. Cameron struct ctlr_info *h; 1931edd16368SStephen M. Cameron 1932edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 1933edd16368SStephen M. Cameron spin_lock_irqsave(&h->devlock, flags); 1934*d04e62b9SKevin Barnett if (sdev_channel(sdev) == HPSA_PHYSICAL_DEVICE_BUS) { 1935*d04e62b9SKevin Barnett struct scsi_target *starget; 1936*d04e62b9SKevin Barnett struct sas_rphy *rphy; 1937*d04e62b9SKevin Barnett 1938*d04e62b9SKevin Barnett starget = scsi_target(sdev); 1939*d04e62b9SKevin Barnett rphy = target_to_rphy(starget); 1940*d04e62b9SKevin Barnett sd = hpsa_find_device_by_sas_rphy(h, rphy); 1941*d04e62b9SKevin Barnett if (sd) { 1942*d04e62b9SKevin Barnett sd->target = sdev_id(sdev); 1943*d04e62b9SKevin Barnett sd->lun = sdev->lun; 1944*d04e62b9SKevin Barnett } 1945*d04e62b9SKevin Barnett } else 1946edd16368SStephen M. Cameron sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev), 1947edd16368SStephen M. Cameron sdev_id(sdev), sdev->lun); 1948*d04e62b9SKevin Barnett 1949*d04e62b9SKevin Barnett if (sd && sd->expose_device) { 195003383736SDon Brace atomic_set(&sd->ioaccel_cmds_out, 0); 1951*d04e62b9SKevin Barnett sdev->hostdata = sd; 195241ce4c35SStephen Cameron } else 195341ce4c35SStephen Cameron sdev->hostdata = NULL; 1954edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->devlock, flags); 1955edd16368SStephen M. Cameron return 0; 1956edd16368SStephen M. Cameron } 1957edd16368SStephen M. Cameron 195841ce4c35SStephen Cameron /* configure scsi device based on internal per-device structure */ 195941ce4c35SStephen Cameron static int hpsa_slave_configure(struct scsi_device *sdev) 196041ce4c35SStephen Cameron { 196141ce4c35SStephen Cameron struct hpsa_scsi_dev_t *sd; 196241ce4c35SStephen Cameron int queue_depth; 196341ce4c35SStephen Cameron 196441ce4c35SStephen Cameron sd = sdev->hostdata; 19652a168208SKevin Barnett sdev->no_uld_attach = !sd || !sd->expose_device; 196641ce4c35SStephen Cameron 196741ce4c35SStephen Cameron if (sd) 196841ce4c35SStephen Cameron queue_depth = sd->queue_depth != 0 ? 196941ce4c35SStephen Cameron sd->queue_depth : sdev->host->can_queue; 197041ce4c35SStephen Cameron else 197141ce4c35SStephen Cameron queue_depth = sdev->host->can_queue; 197241ce4c35SStephen Cameron 197341ce4c35SStephen Cameron scsi_change_queue_depth(sdev, queue_depth); 197441ce4c35SStephen Cameron 197541ce4c35SStephen Cameron return 0; 197641ce4c35SStephen Cameron } 197741ce4c35SStephen Cameron 1978edd16368SStephen M. Cameron static void hpsa_slave_destroy(struct scsi_device *sdev) 1979edd16368SStephen M. Cameron { 1980bcc44255SStephen M. Cameron /* nothing to do. */ 1981edd16368SStephen M. Cameron } 1982edd16368SStephen M. Cameron 1983d9a729f3SWebb Scales static void hpsa_free_ioaccel2_sg_chain_blocks(struct ctlr_info *h) 1984d9a729f3SWebb Scales { 1985d9a729f3SWebb Scales int i; 1986d9a729f3SWebb Scales 1987d9a729f3SWebb Scales if (!h->ioaccel2_cmd_sg_list) 1988d9a729f3SWebb Scales return; 1989d9a729f3SWebb Scales for (i = 0; i < h->nr_cmds; i++) { 1990d9a729f3SWebb Scales kfree(h->ioaccel2_cmd_sg_list[i]); 1991d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list[i] = NULL; 1992d9a729f3SWebb Scales } 1993d9a729f3SWebb Scales kfree(h->ioaccel2_cmd_sg_list); 1994d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list = NULL; 1995d9a729f3SWebb Scales } 1996d9a729f3SWebb Scales 1997d9a729f3SWebb Scales static int hpsa_allocate_ioaccel2_sg_chain_blocks(struct ctlr_info *h) 1998d9a729f3SWebb Scales { 1999d9a729f3SWebb Scales int i; 2000d9a729f3SWebb Scales 2001d9a729f3SWebb Scales if (h->chainsize <= 0) 2002d9a729f3SWebb Scales return 0; 2003d9a729f3SWebb Scales 2004d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list = 2005d9a729f3SWebb Scales kzalloc(sizeof(*h->ioaccel2_cmd_sg_list) * h->nr_cmds, 2006d9a729f3SWebb Scales GFP_KERNEL); 2007d9a729f3SWebb Scales if (!h->ioaccel2_cmd_sg_list) 2008d9a729f3SWebb Scales return -ENOMEM; 2009d9a729f3SWebb Scales for (i = 0; i < h->nr_cmds; i++) { 2010d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list[i] = 2011d9a729f3SWebb Scales kmalloc(sizeof(*h->ioaccel2_cmd_sg_list[i]) * 2012d9a729f3SWebb Scales h->maxsgentries, GFP_KERNEL); 2013d9a729f3SWebb Scales if (!h->ioaccel2_cmd_sg_list[i]) 2014d9a729f3SWebb Scales goto clean; 2015d9a729f3SWebb Scales } 2016d9a729f3SWebb Scales return 0; 2017d9a729f3SWebb Scales 2018d9a729f3SWebb Scales clean: 2019d9a729f3SWebb Scales hpsa_free_ioaccel2_sg_chain_blocks(h); 2020d9a729f3SWebb Scales return -ENOMEM; 2021d9a729f3SWebb Scales } 2022d9a729f3SWebb Scales 202333a2ffceSStephen M. Cameron static void hpsa_free_sg_chain_blocks(struct ctlr_info *h) 202433a2ffceSStephen M. Cameron { 202533a2ffceSStephen M. Cameron int i; 202633a2ffceSStephen M. Cameron 202733a2ffceSStephen M. Cameron if (!h->cmd_sg_list) 202833a2ffceSStephen M. Cameron return; 202933a2ffceSStephen M. Cameron for (i = 0; i < h->nr_cmds; i++) { 203033a2ffceSStephen M. Cameron kfree(h->cmd_sg_list[i]); 203133a2ffceSStephen M. Cameron h->cmd_sg_list[i] = NULL; 203233a2ffceSStephen M. Cameron } 203333a2ffceSStephen M. Cameron kfree(h->cmd_sg_list); 203433a2ffceSStephen M. Cameron h->cmd_sg_list = NULL; 203533a2ffceSStephen M. Cameron } 203633a2ffceSStephen M. Cameron 2037105a3dbcSRobert Elliott static int hpsa_alloc_sg_chain_blocks(struct ctlr_info *h) 203833a2ffceSStephen M. Cameron { 203933a2ffceSStephen M. Cameron int i; 204033a2ffceSStephen M. Cameron 204133a2ffceSStephen M. Cameron if (h->chainsize <= 0) 204233a2ffceSStephen M. Cameron return 0; 204333a2ffceSStephen M. Cameron 204433a2ffceSStephen M. Cameron h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds, 204533a2ffceSStephen M. Cameron GFP_KERNEL); 20463d4e6af8SRobert Elliott if (!h->cmd_sg_list) { 20473d4e6af8SRobert Elliott dev_err(&h->pdev->dev, "Failed to allocate SG list\n"); 204833a2ffceSStephen M. Cameron return -ENOMEM; 20493d4e6af8SRobert Elliott } 205033a2ffceSStephen M. Cameron for (i = 0; i < h->nr_cmds; i++) { 205133a2ffceSStephen M. Cameron h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) * 205233a2ffceSStephen M. Cameron h->chainsize, GFP_KERNEL); 20533d4e6af8SRobert Elliott if (!h->cmd_sg_list[i]) { 20543d4e6af8SRobert Elliott dev_err(&h->pdev->dev, "Failed to allocate cmd SG\n"); 205533a2ffceSStephen M. Cameron goto clean; 205633a2ffceSStephen M. Cameron } 20573d4e6af8SRobert Elliott } 205833a2ffceSStephen M. Cameron return 0; 205933a2ffceSStephen M. Cameron 206033a2ffceSStephen M. Cameron clean: 206133a2ffceSStephen M. Cameron hpsa_free_sg_chain_blocks(h); 206233a2ffceSStephen M. Cameron return -ENOMEM; 206333a2ffceSStephen M. Cameron } 206433a2ffceSStephen M. Cameron 2065d9a729f3SWebb Scales static int hpsa_map_ioaccel2_sg_chain_block(struct ctlr_info *h, 2066d9a729f3SWebb Scales struct io_accel2_cmd *cp, struct CommandList *c) 2067d9a729f3SWebb Scales { 2068d9a729f3SWebb Scales struct ioaccel2_sg_element *chain_block; 2069d9a729f3SWebb Scales u64 temp64; 2070d9a729f3SWebb Scales u32 chain_size; 2071d9a729f3SWebb Scales 2072d9a729f3SWebb Scales chain_block = h->ioaccel2_cmd_sg_list[c->cmdindex]; 2073a736e9b6SDon Brace chain_size = le32_to_cpu(cp->sg[0].length); 2074d9a729f3SWebb Scales temp64 = pci_map_single(h->pdev, chain_block, chain_size, 2075d9a729f3SWebb Scales PCI_DMA_TODEVICE); 2076d9a729f3SWebb Scales if (dma_mapping_error(&h->pdev->dev, temp64)) { 2077d9a729f3SWebb Scales /* prevent subsequent unmapping */ 2078d9a729f3SWebb Scales cp->sg->address = 0; 2079d9a729f3SWebb Scales return -1; 2080d9a729f3SWebb Scales } 2081d9a729f3SWebb Scales cp->sg->address = cpu_to_le64(temp64); 2082d9a729f3SWebb Scales return 0; 2083d9a729f3SWebb Scales } 2084d9a729f3SWebb Scales 2085d9a729f3SWebb Scales static void hpsa_unmap_ioaccel2_sg_chain_block(struct ctlr_info *h, 2086d9a729f3SWebb Scales struct io_accel2_cmd *cp) 2087d9a729f3SWebb Scales { 2088d9a729f3SWebb Scales struct ioaccel2_sg_element *chain_sg; 2089d9a729f3SWebb Scales u64 temp64; 2090d9a729f3SWebb Scales u32 chain_size; 2091d9a729f3SWebb Scales 2092d9a729f3SWebb Scales chain_sg = cp->sg; 2093d9a729f3SWebb Scales temp64 = le64_to_cpu(chain_sg->address); 2094a736e9b6SDon Brace chain_size = le32_to_cpu(cp->sg[0].length); 2095d9a729f3SWebb Scales pci_unmap_single(h->pdev, temp64, chain_size, PCI_DMA_TODEVICE); 2096d9a729f3SWebb Scales } 2097d9a729f3SWebb Scales 2098e2bea6dfSStephen M. Cameron static int hpsa_map_sg_chain_block(struct ctlr_info *h, 209933a2ffceSStephen M. Cameron struct CommandList *c) 210033a2ffceSStephen M. Cameron { 210133a2ffceSStephen M. Cameron struct SGDescriptor *chain_sg, *chain_block; 210233a2ffceSStephen M. Cameron u64 temp64; 210350a0decfSStephen M. Cameron u32 chain_len; 210433a2ffceSStephen M. Cameron 210533a2ffceSStephen M. Cameron chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 210633a2ffceSStephen M. Cameron chain_block = h->cmd_sg_list[c->cmdindex]; 210750a0decfSStephen M. Cameron chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN); 210850a0decfSStephen M. Cameron chain_len = sizeof(*chain_sg) * 21092b08b3e9SDon Brace (le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries); 211050a0decfSStephen M. Cameron chain_sg->Len = cpu_to_le32(chain_len); 211150a0decfSStephen M. Cameron temp64 = pci_map_single(h->pdev, chain_block, chain_len, 211233a2ffceSStephen M. Cameron PCI_DMA_TODEVICE); 2113e2bea6dfSStephen M. Cameron if (dma_mapping_error(&h->pdev->dev, temp64)) { 2114e2bea6dfSStephen M. Cameron /* prevent subsequent unmapping */ 211550a0decfSStephen M. Cameron chain_sg->Addr = cpu_to_le64(0); 2116e2bea6dfSStephen M. Cameron return -1; 2117e2bea6dfSStephen M. Cameron } 211850a0decfSStephen M. Cameron chain_sg->Addr = cpu_to_le64(temp64); 2119e2bea6dfSStephen M. Cameron return 0; 212033a2ffceSStephen M. Cameron } 212133a2ffceSStephen M. Cameron 212233a2ffceSStephen M. Cameron static void hpsa_unmap_sg_chain_block(struct ctlr_info *h, 212333a2ffceSStephen M. Cameron struct CommandList *c) 212433a2ffceSStephen M. Cameron { 212533a2ffceSStephen M. Cameron struct SGDescriptor *chain_sg; 212633a2ffceSStephen M. Cameron 212750a0decfSStephen M. Cameron if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries) 212833a2ffceSStephen M. Cameron return; 212933a2ffceSStephen M. Cameron 213033a2ffceSStephen M. Cameron chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 213150a0decfSStephen M. Cameron pci_unmap_single(h->pdev, le64_to_cpu(chain_sg->Addr), 213250a0decfSStephen M. Cameron le32_to_cpu(chain_sg->Len), PCI_DMA_TODEVICE); 213333a2ffceSStephen M. Cameron } 213433a2ffceSStephen M. Cameron 2135a09c1441SScott Teel 2136a09c1441SScott Teel /* Decode the various types of errors on ioaccel2 path. 2137a09c1441SScott Teel * Return 1 for any error that should generate a RAID path retry. 2138a09c1441SScott Teel * Return 0 for errors that don't require a RAID path retry. 2139a09c1441SScott Teel */ 2140a09c1441SScott Teel static int handle_ioaccel_mode2_error(struct ctlr_info *h, 2141c349775eSScott Teel struct CommandList *c, 2142c349775eSScott Teel struct scsi_cmnd *cmd, 2143c349775eSScott Teel struct io_accel2_cmd *c2) 2144c349775eSScott Teel { 2145c349775eSScott Teel int data_len; 2146a09c1441SScott Teel int retry = 0; 2147c40820d5SJoe Handzik u32 ioaccel2_resid = 0; 2148c349775eSScott Teel 2149c349775eSScott Teel switch (c2->error_data.serv_response) { 2150c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_COMPLETE: 2151c349775eSScott Teel switch (c2->error_data.status) { 2152c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_GOOD: 2153c349775eSScott Teel break; 2154c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND: 2155ee6b1889SStephen M. Cameron cmd->result |= SAM_STAT_CHECK_CONDITION; 2156c349775eSScott Teel if (c2->error_data.data_present != 2157ee6b1889SStephen M. Cameron IOACCEL2_SENSE_DATA_PRESENT) { 2158ee6b1889SStephen M. Cameron memset(cmd->sense_buffer, 0, 2159ee6b1889SStephen M. Cameron SCSI_SENSE_BUFFERSIZE); 2160c349775eSScott Teel break; 2161ee6b1889SStephen M. Cameron } 2162c349775eSScott Teel /* copy the sense data */ 2163c349775eSScott Teel data_len = c2->error_data.sense_data_len; 2164c349775eSScott Teel if (data_len > SCSI_SENSE_BUFFERSIZE) 2165c349775eSScott Teel data_len = SCSI_SENSE_BUFFERSIZE; 2166c349775eSScott Teel if (data_len > sizeof(c2->error_data.sense_data_buff)) 2167c349775eSScott Teel data_len = 2168c349775eSScott Teel sizeof(c2->error_data.sense_data_buff); 2169c349775eSScott Teel memcpy(cmd->sense_buffer, 2170c349775eSScott Teel c2->error_data.sense_data_buff, data_len); 2171a09c1441SScott Teel retry = 1; 2172c349775eSScott Teel break; 2173c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_BUSY: 2174a09c1441SScott Teel retry = 1; 2175c349775eSScott Teel break; 2176c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON: 2177a09c1441SScott Teel retry = 1; 2178c349775eSScott Teel break; 2179c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL: 21804a8da22bSStephen Cameron retry = 1; 2181c349775eSScott Teel break; 2182c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED: 2183a09c1441SScott Teel retry = 1; 2184c349775eSScott Teel break; 2185c349775eSScott Teel default: 2186a09c1441SScott Teel retry = 1; 2187c349775eSScott Teel break; 2188c349775eSScott Teel } 2189c349775eSScott Teel break; 2190c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_FAILURE: 2191c40820d5SJoe Handzik switch (c2->error_data.status) { 2192c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_IO_ERROR: 2193c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_IO_ABORTED: 2194c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_OVERRUN: 2195c40820d5SJoe Handzik retry = 1; 2196c40820d5SJoe Handzik break; 2197c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_UNDERRUN: 2198c40820d5SJoe Handzik cmd->result = (DID_OK << 16); /* host byte */ 2199c40820d5SJoe Handzik cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 2200c40820d5SJoe Handzik ioaccel2_resid = get_unaligned_le32( 2201c40820d5SJoe Handzik &c2->error_data.resid_cnt[0]); 2202c40820d5SJoe Handzik scsi_set_resid(cmd, ioaccel2_resid); 2203c40820d5SJoe Handzik break; 2204c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_NO_PATH_TO_DEVICE: 2205c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_INVALID_DEVICE: 2206c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_IOACCEL_DISABLED: 2207c40820d5SJoe Handzik /* We will get an event from ctlr to trigger rescan */ 2208c40820d5SJoe Handzik retry = 1; 2209c40820d5SJoe Handzik break; 2210c40820d5SJoe Handzik default: 2211c40820d5SJoe Handzik retry = 1; 2212c40820d5SJoe Handzik } 2213c349775eSScott Teel break; 2214c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE: 2215c349775eSScott Teel break; 2216c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS: 2217c349775eSScott Teel break; 2218c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_REJECTED: 2219a09c1441SScott Teel retry = 1; 2220c349775eSScott Teel break; 2221c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN: 2222c349775eSScott Teel break; 2223c349775eSScott Teel default: 2224a09c1441SScott Teel retry = 1; 2225c349775eSScott Teel break; 2226c349775eSScott Teel } 2227a09c1441SScott Teel 2228a09c1441SScott Teel return retry; /* retry on raid path? */ 2229c349775eSScott Teel } 2230c349775eSScott Teel 2231a58e7e53SWebb Scales static void hpsa_cmd_resolve_events(struct ctlr_info *h, 2232a58e7e53SWebb Scales struct CommandList *c) 2233a58e7e53SWebb Scales { 2234d604f533SWebb Scales bool do_wake = false; 2235d604f533SWebb Scales 2236a58e7e53SWebb Scales /* 2237a58e7e53SWebb Scales * Prevent the following race in the abort handler: 2238a58e7e53SWebb Scales * 2239a58e7e53SWebb Scales * 1. LLD is requested to abort a SCSI command 2240a58e7e53SWebb Scales * 2. The SCSI command completes 2241a58e7e53SWebb Scales * 3. The struct CommandList associated with step 2 is made available 2242a58e7e53SWebb Scales * 4. New I/O request to LLD to another LUN re-uses struct CommandList 2243a58e7e53SWebb Scales * 5. Abort handler follows scsi_cmnd->host_scribble and 2244a58e7e53SWebb Scales * finds struct CommandList and tries to aborts it 2245a58e7e53SWebb Scales * Now we have aborted the wrong command. 2246a58e7e53SWebb Scales * 2247d604f533SWebb Scales * Reset c->scsi_cmd here so that the abort or reset handler will know 2248d604f533SWebb Scales * this command has completed. Then, check to see if the handler is 2249a58e7e53SWebb Scales * waiting for this command, and, if so, wake it. 2250a58e7e53SWebb Scales */ 2251a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_IDLE; 2252d604f533SWebb Scales mb(); /* Declare command idle before checking for pending events. */ 2253a58e7e53SWebb Scales if (c->abort_pending) { 2254d604f533SWebb Scales do_wake = true; 2255a58e7e53SWebb Scales c->abort_pending = false; 2256a58e7e53SWebb Scales } 2257d604f533SWebb Scales if (c->reset_pending) { 2258d604f533SWebb Scales unsigned long flags; 2259d604f533SWebb Scales struct hpsa_scsi_dev_t *dev; 2260d604f533SWebb Scales 2261d604f533SWebb Scales /* 2262d604f533SWebb Scales * There appears to be a reset pending; lock the lock and 2263d604f533SWebb Scales * reconfirm. If so, then decrement the count of outstanding 2264d604f533SWebb Scales * commands and wake the reset command if this is the last one. 2265d604f533SWebb Scales */ 2266d604f533SWebb Scales spin_lock_irqsave(&h->lock, flags); 2267d604f533SWebb Scales dev = c->reset_pending; /* Re-fetch under the lock. */ 2268d604f533SWebb Scales if (dev && atomic_dec_and_test(&dev->reset_cmds_out)) 2269d604f533SWebb Scales do_wake = true; 2270d604f533SWebb Scales c->reset_pending = NULL; 2271d604f533SWebb Scales spin_unlock_irqrestore(&h->lock, flags); 2272d604f533SWebb Scales } 2273d604f533SWebb Scales 2274d604f533SWebb Scales if (do_wake) 2275d604f533SWebb Scales wake_up_all(&h->event_sync_wait_queue); 2276a58e7e53SWebb Scales } 2277a58e7e53SWebb Scales 227873153fe5SWebb Scales static void hpsa_cmd_resolve_and_free(struct ctlr_info *h, 227973153fe5SWebb Scales struct CommandList *c) 228073153fe5SWebb Scales { 228173153fe5SWebb Scales hpsa_cmd_resolve_events(h, c); 228273153fe5SWebb Scales cmd_tagged_free(h, c); 228373153fe5SWebb Scales } 228473153fe5SWebb Scales 22858a0ff92cSWebb Scales static void hpsa_cmd_free_and_done(struct ctlr_info *h, 22868a0ff92cSWebb Scales struct CommandList *c, struct scsi_cmnd *cmd) 22878a0ff92cSWebb Scales { 228873153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 22898a0ff92cSWebb Scales cmd->scsi_done(cmd); 22908a0ff92cSWebb Scales } 22918a0ff92cSWebb Scales 22928a0ff92cSWebb Scales static void hpsa_retry_cmd(struct ctlr_info *h, struct CommandList *c) 22938a0ff92cSWebb Scales { 22948a0ff92cSWebb Scales INIT_WORK(&c->work, hpsa_command_resubmit_worker); 22958a0ff92cSWebb Scales queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work); 22968a0ff92cSWebb Scales } 22978a0ff92cSWebb Scales 2298a58e7e53SWebb Scales static void hpsa_set_scsi_cmd_aborted(struct scsi_cmnd *cmd) 2299a58e7e53SWebb Scales { 2300a58e7e53SWebb Scales cmd->result = DID_ABORT << 16; 2301a58e7e53SWebb Scales } 2302a58e7e53SWebb Scales 2303a58e7e53SWebb Scales static void hpsa_cmd_abort_and_free(struct ctlr_info *h, struct CommandList *c, 2304a58e7e53SWebb Scales struct scsi_cmnd *cmd) 2305a58e7e53SWebb Scales { 2306a58e7e53SWebb Scales hpsa_set_scsi_cmd_aborted(cmd); 2307a58e7e53SWebb Scales dev_warn(&h->pdev->dev, "CDB %16phN was aborted with status 0x%x\n", 2308a58e7e53SWebb Scales c->Request.CDB, c->err_info->ScsiStatus); 230973153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 2310a58e7e53SWebb Scales } 2311a58e7e53SWebb Scales 2312c349775eSScott Teel static void process_ioaccel2_completion(struct ctlr_info *h, 2313c349775eSScott Teel struct CommandList *c, struct scsi_cmnd *cmd, 2314c349775eSScott Teel struct hpsa_scsi_dev_t *dev) 2315c349775eSScott Teel { 2316c349775eSScott Teel struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 2317c349775eSScott Teel 2318c349775eSScott Teel /* check for good status */ 2319c349775eSScott Teel if (likely(c2->error_data.serv_response == 0 && 23208a0ff92cSWebb Scales c2->error_data.status == 0)) 23218a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, c, cmd); 2322c349775eSScott Teel 23238a0ff92cSWebb Scales /* 23248a0ff92cSWebb Scales * Any RAID offload error results in retry which will use 2325c349775eSScott Teel * the normal I/O path so the controller can handle whatever's 2326c349775eSScott Teel * wrong. 2327c349775eSScott Teel */ 2328f3f01730SKevin Barnett if (is_logical_device(dev) && 2329c349775eSScott Teel c2->error_data.serv_response == 2330c349775eSScott Teel IOACCEL2_SERV_RESPONSE_FAILURE) { 2331080ef1ccSDon Brace if (c2->error_data.status == 2332080ef1ccSDon Brace IOACCEL2_STATUS_SR_IOACCEL_DISABLED) 2333c349775eSScott Teel dev->offload_enabled = 0; 23348a0ff92cSWebb Scales 23358a0ff92cSWebb Scales return hpsa_retry_cmd(h, c); 2336080ef1ccSDon Brace } 2337080ef1ccSDon Brace 2338080ef1ccSDon Brace if (handle_ioaccel_mode2_error(h, c, cmd, c2)) 23398a0ff92cSWebb Scales return hpsa_retry_cmd(h, c); 2340080ef1ccSDon Brace 23418a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, c, cmd); 2342c349775eSScott Teel } 2343c349775eSScott Teel 23449437ac43SStephen Cameron /* Returns 0 on success, < 0 otherwise. */ 23459437ac43SStephen Cameron static int hpsa_evaluate_tmf_status(struct ctlr_info *h, 23469437ac43SStephen Cameron struct CommandList *cp) 23479437ac43SStephen Cameron { 23489437ac43SStephen Cameron u8 tmf_status = cp->err_info->ScsiStatus; 23499437ac43SStephen Cameron 23509437ac43SStephen Cameron switch (tmf_status) { 23519437ac43SStephen Cameron case CISS_TMF_COMPLETE: 23529437ac43SStephen Cameron /* 23539437ac43SStephen Cameron * CISS_TMF_COMPLETE never happens, instead, 23549437ac43SStephen Cameron * ei->CommandStatus == 0 for this case. 23559437ac43SStephen Cameron */ 23569437ac43SStephen Cameron case CISS_TMF_SUCCESS: 23579437ac43SStephen Cameron return 0; 23589437ac43SStephen Cameron case CISS_TMF_INVALID_FRAME: 23599437ac43SStephen Cameron case CISS_TMF_NOT_SUPPORTED: 23609437ac43SStephen Cameron case CISS_TMF_FAILED: 23619437ac43SStephen Cameron case CISS_TMF_WRONG_LUN: 23629437ac43SStephen Cameron case CISS_TMF_OVERLAPPED_TAG: 23639437ac43SStephen Cameron break; 23649437ac43SStephen Cameron default: 23659437ac43SStephen Cameron dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n", 23669437ac43SStephen Cameron tmf_status); 23679437ac43SStephen Cameron break; 23689437ac43SStephen Cameron } 23699437ac43SStephen Cameron return -tmf_status; 23709437ac43SStephen Cameron } 23719437ac43SStephen Cameron 23721fb011fbSStephen M. Cameron static void complete_scsi_command(struct CommandList *cp) 2373edd16368SStephen M. Cameron { 2374edd16368SStephen M. Cameron struct scsi_cmnd *cmd; 2375edd16368SStephen M. Cameron struct ctlr_info *h; 2376edd16368SStephen M. Cameron struct ErrorInfo *ei; 2377283b4a9bSStephen M. Cameron struct hpsa_scsi_dev_t *dev; 2378d9a729f3SWebb Scales struct io_accel2_cmd *c2; 2379edd16368SStephen M. Cameron 23809437ac43SStephen Cameron u8 sense_key; 23819437ac43SStephen Cameron u8 asc; /* additional sense code */ 23829437ac43SStephen Cameron u8 ascq; /* additional sense code qualifier */ 2383db111e18SStephen M. Cameron unsigned long sense_data_size; 2384edd16368SStephen M. Cameron 2385edd16368SStephen M. Cameron ei = cp->err_info; 23867fa3030cSStephen Cameron cmd = cp->scsi_cmd; 2387edd16368SStephen M. Cameron h = cp->h; 2388283b4a9bSStephen M. Cameron dev = cmd->device->hostdata; 2389d9a729f3SWebb Scales c2 = &h->ioaccel2_cmd_pool[cp->cmdindex]; 2390edd16368SStephen M. Cameron 2391edd16368SStephen M. Cameron scsi_dma_unmap(cmd); /* undo the DMA mappings */ 2392e1f7de0cSMatt Gates if ((cp->cmd_type == CMD_SCSI) && 23932b08b3e9SDon Brace (le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries)) 239433a2ffceSStephen M. Cameron hpsa_unmap_sg_chain_block(h, cp); 2395edd16368SStephen M. Cameron 2396d9a729f3SWebb Scales if ((cp->cmd_type == CMD_IOACCEL2) && 2397d9a729f3SWebb Scales (c2->sg[0].chain_indicator == IOACCEL2_CHAIN)) 2398d9a729f3SWebb Scales hpsa_unmap_ioaccel2_sg_chain_block(h, c2); 2399d9a729f3SWebb Scales 2400edd16368SStephen M. Cameron cmd->result = (DID_OK << 16); /* host byte */ 2401edd16368SStephen M. Cameron cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 2402c349775eSScott Teel 240303383736SDon Brace if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1) 240403383736SDon Brace atomic_dec(&cp->phys_disk->ioaccel_cmds_out); 240503383736SDon Brace 240625163bd5SWebb Scales /* 240725163bd5SWebb Scales * We check for lockup status here as it may be set for 240825163bd5SWebb Scales * CMD_SCSI, CMD_IOACCEL1 and CMD_IOACCEL2 commands by 240925163bd5SWebb Scales * fail_all_oustanding_cmds() 241025163bd5SWebb Scales */ 241125163bd5SWebb Scales if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) { 241225163bd5SWebb Scales /* DID_NO_CONNECT will prevent a retry */ 241325163bd5SWebb Scales cmd->result = DID_NO_CONNECT << 16; 24148a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, cp, cmd); 241525163bd5SWebb Scales } 241625163bd5SWebb Scales 2417d604f533SWebb Scales if ((unlikely(hpsa_is_pending_event(cp)))) { 2418d604f533SWebb Scales if (cp->reset_pending) 2419d604f533SWebb Scales return hpsa_cmd_resolve_and_free(h, cp); 2420d604f533SWebb Scales if (cp->abort_pending) 2421d604f533SWebb Scales return hpsa_cmd_abort_and_free(h, cp, cmd); 2422d604f533SWebb Scales } 2423d604f533SWebb Scales 2424c349775eSScott Teel if (cp->cmd_type == CMD_IOACCEL2) 2425c349775eSScott Teel return process_ioaccel2_completion(h, cp, cmd, dev); 2426c349775eSScott Teel 24276aa4c361SRobert Elliott scsi_set_resid(cmd, ei->ResidualCnt); 24288a0ff92cSWebb Scales if (ei->CommandStatus == 0) 24298a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, cp, cmd); 24306aa4c361SRobert Elliott 2431e1f7de0cSMatt Gates /* For I/O accelerator commands, copy over some fields to the normal 2432e1f7de0cSMatt Gates * CISS header used below for error handling. 2433e1f7de0cSMatt Gates */ 2434e1f7de0cSMatt Gates if (cp->cmd_type == CMD_IOACCEL1) { 2435e1f7de0cSMatt Gates struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex]; 24362b08b3e9SDon Brace cp->Header.SGList = scsi_sg_count(cmd); 24372b08b3e9SDon Brace cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList); 24382b08b3e9SDon Brace cp->Request.CDBLen = le16_to_cpu(c->io_flags) & 24392b08b3e9SDon Brace IOACCEL1_IOFLAGS_CDBLEN_MASK; 244050a0decfSStephen M. Cameron cp->Header.tag = c->tag; 2441e1f7de0cSMatt Gates memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8); 2442e1f7de0cSMatt Gates memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen); 2443283b4a9bSStephen M. Cameron 2444283b4a9bSStephen M. Cameron /* Any RAID offload error results in retry which will use 2445283b4a9bSStephen M. Cameron * the normal I/O path so the controller can handle whatever's 2446283b4a9bSStephen M. Cameron * wrong. 2447283b4a9bSStephen M. Cameron */ 2448f3f01730SKevin Barnett if (is_logical_device(dev)) { 2449283b4a9bSStephen M. Cameron if (ei->CommandStatus == CMD_IOACCEL_DISABLED) 2450283b4a9bSStephen M. Cameron dev->offload_enabled = 0; 24518a0ff92cSWebb Scales return hpsa_retry_cmd(h, cp); 2452283b4a9bSStephen M. Cameron } 2453e1f7de0cSMatt Gates } 2454e1f7de0cSMatt Gates 2455edd16368SStephen M. Cameron /* an error has occurred */ 2456edd16368SStephen M. Cameron switch (ei->CommandStatus) { 2457edd16368SStephen M. Cameron 2458edd16368SStephen M. Cameron case CMD_TARGET_STATUS: 24599437ac43SStephen Cameron cmd->result |= ei->ScsiStatus; 24609437ac43SStephen Cameron /* copy the sense data */ 24619437ac43SStephen Cameron if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo)) 24629437ac43SStephen Cameron sense_data_size = SCSI_SENSE_BUFFERSIZE; 24639437ac43SStephen Cameron else 24649437ac43SStephen Cameron sense_data_size = sizeof(ei->SenseInfo); 24659437ac43SStephen Cameron if (ei->SenseLen < sense_data_size) 24669437ac43SStephen Cameron sense_data_size = ei->SenseLen; 24679437ac43SStephen Cameron memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size); 24689437ac43SStephen Cameron if (ei->ScsiStatus) 24699437ac43SStephen Cameron decode_sense_data(ei->SenseInfo, sense_data_size, 24709437ac43SStephen Cameron &sense_key, &asc, &ascq); 2471edd16368SStephen M. Cameron if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) { 24721d3b3609SMatt Gates if (sense_key == ABORTED_COMMAND) { 24732e311fbaSStephen M. Cameron cmd->result |= DID_SOFT_ERROR << 16; 24741d3b3609SMatt Gates break; 24751d3b3609SMatt Gates } 2476edd16368SStephen M. Cameron break; 2477edd16368SStephen M. Cameron } 2478edd16368SStephen M. Cameron /* Problem was not a check condition 2479edd16368SStephen M. Cameron * Pass it up to the upper layers... 2480edd16368SStephen M. Cameron */ 2481edd16368SStephen M. Cameron if (ei->ScsiStatus) { 2482edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "cp %p has status 0x%x " 2483edd16368SStephen M. Cameron "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, " 2484edd16368SStephen M. Cameron "Returning result: 0x%x\n", 2485edd16368SStephen M. Cameron cp, ei->ScsiStatus, 2486edd16368SStephen M. Cameron sense_key, asc, ascq, 2487edd16368SStephen M. Cameron cmd->result); 2488edd16368SStephen M. Cameron } else { /* scsi status is zero??? How??? */ 2489edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. " 2490edd16368SStephen M. Cameron "Returning no connection.\n", cp), 2491edd16368SStephen M. Cameron 2492edd16368SStephen M. Cameron /* Ordinarily, this case should never happen, 2493edd16368SStephen M. Cameron * but there is a bug in some released firmware 2494edd16368SStephen M. Cameron * revisions that allows it to happen if, for 2495edd16368SStephen M. Cameron * example, a 4100 backplane loses power and 2496edd16368SStephen M. Cameron * the tape drive is in it. We assume that 2497edd16368SStephen M. Cameron * it's a fatal error of some kind because we 2498edd16368SStephen M. Cameron * can't show that it wasn't. We will make it 2499edd16368SStephen M. Cameron * look like selection timeout since that is 2500edd16368SStephen M. Cameron * the most common reason for this to occur, 2501edd16368SStephen M. Cameron * and it's severe enough. 2502edd16368SStephen M. Cameron */ 2503edd16368SStephen M. Cameron 2504edd16368SStephen M. Cameron cmd->result = DID_NO_CONNECT << 16; 2505edd16368SStephen M. Cameron } 2506edd16368SStephen M. Cameron break; 2507edd16368SStephen M. Cameron 2508edd16368SStephen M. Cameron case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 2509edd16368SStephen M. Cameron break; 2510edd16368SStephen M. Cameron case CMD_DATA_OVERRUN: 2511f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, 2512f42e81e1SStephen Cameron "CDB %16phN data overrun\n", cp->Request.CDB); 2513edd16368SStephen M. Cameron break; 2514edd16368SStephen M. Cameron case CMD_INVALID: { 2515edd16368SStephen M. Cameron /* print_bytes(cp, sizeof(*cp), 1, 0); 2516edd16368SStephen M. Cameron print_cmd(cp); */ 2517edd16368SStephen M. Cameron /* We get CMD_INVALID if you address a non-existent device 2518edd16368SStephen M. Cameron * instead of a selection timeout (no response). You will 2519edd16368SStephen M. Cameron * see this if you yank out a drive, then try to access it. 2520edd16368SStephen M. Cameron * This is kind of a shame because it means that any other 2521edd16368SStephen M. Cameron * CMD_INVALID (e.g. driver bug) will get interpreted as a 2522edd16368SStephen M. Cameron * missing target. */ 2523edd16368SStephen M. Cameron cmd->result = DID_NO_CONNECT << 16; 2524edd16368SStephen M. Cameron } 2525edd16368SStephen M. Cameron break; 2526edd16368SStephen M. Cameron case CMD_PROTOCOL_ERR: 2527256d0eaaSStephen M. Cameron cmd->result = DID_ERROR << 16; 2528f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n", 2529f42e81e1SStephen Cameron cp->Request.CDB); 2530edd16368SStephen M. Cameron break; 2531edd16368SStephen M. Cameron case CMD_HARDWARE_ERR: 2532edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2533f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n", 2534f42e81e1SStephen Cameron cp->Request.CDB); 2535edd16368SStephen M. Cameron break; 2536edd16368SStephen M. Cameron case CMD_CONNECTION_LOST: 2537edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2538f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n", 2539f42e81e1SStephen Cameron cp->Request.CDB); 2540edd16368SStephen M. Cameron break; 2541edd16368SStephen M. Cameron case CMD_ABORTED: 2542a58e7e53SWebb Scales /* Return now to avoid calling scsi_done(). */ 2543a58e7e53SWebb Scales return hpsa_cmd_abort_and_free(h, cp, cmd); 2544edd16368SStephen M. Cameron case CMD_ABORT_FAILED: 2545edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2546f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n", 2547f42e81e1SStephen Cameron cp->Request.CDB); 2548edd16368SStephen M. Cameron break; 2549edd16368SStephen M. Cameron case CMD_UNSOLICITED_ABORT: 2550f6e76055SStephen M. Cameron cmd->result = DID_SOFT_ERROR << 16; /* retry the command */ 2551f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n", 2552f42e81e1SStephen Cameron cp->Request.CDB); 2553edd16368SStephen M. Cameron break; 2554edd16368SStephen M. Cameron case CMD_TIMEOUT: 2555edd16368SStephen M. Cameron cmd->result = DID_TIME_OUT << 16; 2556f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN timed out\n", 2557f42e81e1SStephen Cameron cp->Request.CDB); 2558edd16368SStephen M. Cameron break; 25591d5e2ed0SStephen M. Cameron case CMD_UNABORTABLE: 25601d5e2ed0SStephen M. Cameron cmd->result = DID_ERROR << 16; 25611d5e2ed0SStephen M. Cameron dev_warn(&h->pdev->dev, "Command unabortable\n"); 25621d5e2ed0SStephen M. Cameron break; 25639437ac43SStephen Cameron case CMD_TMF_STATUS: 25649437ac43SStephen Cameron if (hpsa_evaluate_tmf_status(h, cp)) /* TMF failed? */ 25659437ac43SStephen Cameron cmd->result = DID_ERROR << 16; 25669437ac43SStephen Cameron break; 2567283b4a9bSStephen M. Cameron case CMD_IOACCEL_DISABLED: 2568283b4a9bSStephen M. Cameron /* This only handles the direct pass-through case since RAID 2569283b4a9bSStephen M. Cameron * offload is handled above. Just attempt a retry. 2570283b4a9bSStephen M. Cameron */ 2571283b4a9bSStephen M. Cameron cmd->result = DID_SOFT_ERROR << 16; 2572283b4a9bSStephen M. Cameron dev_warn(&h->pdev->dev, 2573283b4a9bSStephen M. Cameron "cp %p had HP SSD Smart Path error\n", cp); 2574283b4a9bSStephen M. Cameron break; 2575edd16368SStephen M. Cameron default: 2576edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2577edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n", 2578edd16368SStephen M. Cameron cp, ei->CommandStatus); 2579edd16368SStephen M. Cameron } 25808a0ff92cSWebb Scales 25818a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, cp, cmd); 2582edd16368SStephen M. Cameron } 2583edd16368SStephen M. Cameron 2584edd16368SStephen M. Cameron static void hpsa_pci_unmap(struct pci_dev *pdev, 2585edd16368SStephen M. Cameron struct CommandList *c, int sg_used, int data_direction) 2586edd16368SStephen M. Cameron { 2587edd16368SStephen M. Cameron int i; 2588edd16368SStephen M. Cameron 258950a0decfSStephen M. Cameron for (i = 0; i < sg_used; i++) 259050a0decfSStephen M. Cameron pci_unmap_single(pdev, (dma_addr_t) le64_to_cpu(c->SG[i].Addr), 259150a0decfSStephen M. Cameron le32_to_cpu(c->SG[i].Len), 2592edd16368SStephen M. Cameron data_direction); 2593edd16368SStephen M. Cameron } 2594edd16368SStephen M. Cameron 2595a2dac136SStephen M. Cameron static int hpsa_map_one(struct pci_dev *pdev, 2596edd16368SStephen M. Cameron struct CommandList *cp, 2597edd16368SStephen M. Cameron unsigned char *buf, 2598edd16368SStephen M. Cameron size_t buflen, 2599edd16368SStephen M. Cameron int data_direction) 2600edd16368SStephen M. Cameron { 260101a02ffcSStephen M. Cameron u64 addr64; 2602edd16368SStephen M. Cameron 2603edd16368SStephen M. Cameron if (buflen == 0 || data_direction == PCI_DMA_NONE) { 2604edd16368SStephen M. Cameron cp->Header.SGList = 0; 260550a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(0); 2606a2dac136SStephen M. Cameron return 0; 2607edd16368SStephen M. Cameron } 2608edd16368SStephen M. Cameron 260950a0decfSStephen M. Cameron addr64 = pci_map_single(pdev, buf, buflen, data_direction); 2610eceaae18SShuah Khan if (dma_mapping_error(&pdev->dev, addr64)) { 2611a2dac136SStephen M. Cameron /* Prevent subsequent unmap of something never mapped */ 2612eceaae18SShuah Khan cp->Header.SGList = 0; 261350a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(0); 2614a2dac136SStephen M. Cameron return -1; 2615eceaae18SShuah Khan } 261650a0decfSStephen M. Cameron cp->SG[0].Addr = cpu_to_le64(addr64); 261750a0decfSStephen M. Cameron cp->SG[0].Len = cpu_to_le32(buflen); 261850a0decfSStephen M. Cameron cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */ 261950a0decfSStephen M. Cameron cp->Header.SGList = 1; /* no. SGs contig in this cmd */ 262050a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */ 2621a2dac136SStephen M. Cameron return 0; 2622edd16368SStephen M. Cameron } 2623edd16368SStephen M. Cameron 262425163bd5SWebb Scales #define NO_TIMEOUT ((unsigned long) -1) 262525163bd5SWebb Scales #define DEFAULT_TIMEOUT 30000 /* milliseconds */ 262625163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h, 262725163bd5SWebb Scales struct CommandList *c, int reply_queue, unsigned long timeout_msecs) 2628edd16368SStephen M. Cameron { 2629edd16368SStephen M. Cameron DECLARE_COMPLETION_ONSTACK(wait); 2630edd16368SStephen M. Cameron 2631edd16368SStephen M. Cameron c->waiting = &wait; 263225163bd5SWebb Scales __enqueue_cmd_and_start_io(h, c, reply_queue); 263325163bd5SWebb Scales if (timeout_msecs == NO_TIMEOUT) { 263425163bd5SWebb Scales /* TODO: get rid of this no-timeout thing */ 263525163bd5SWebb Scales wait_for_completion_io(&wait); 263625163bd5SWebb Scales return IO_OK; 263725163bd5SWebb Scales } 263825163bd5SWebb Scales if (!wait_for_completion_io_timeout(&wait, 263925163bd5SWebb Scales msecs_to_jiffies(timeout_msecs))) { 264025163bd5SWebb Scales dev_warn(&h->pdev->dev, "Command timed out.\n"); 264125163bd5SWebb Scales return -ETIMEDOUT; 264225163bd5SWebb Scales } 264325163bd5SWebb Scales return IO_OK; 264425163bd5SWebb Scales } 264525163bd5SWebb Scales 264625163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c, 264725163bd5SWebb Scales int reply_queue, unsigned long timeout_msecs) 264825163bd5SWebb Scales { 264925163bd5SWebb Scales if (unlikely(lockup_detected(h))) { 265025163bd5SWebb Scales c->err_info->CommandStatus = CMD_CTLR_LOCKUP; 265125163bd5SWebb Scales return IO_OK; 265225163bd5SWebb Scales } 265325163bd5SWebb Scales return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs); 2654edd16368SStephen M. Cameron } 2655edd16368SStephen M. Cameron 2656094963daSStephen M. Cameron static u32 lockup_detected(struct ctlr_info *h) 2657094963daSStephen M. Cameron { 2658094963daSStephen M. Cameron int cpu; 2659094963daSStephen M. Cameron u32 rc, *lockup_detected; 2660094963daSStephen M. Cameron 2661094963daSStephen M. Cameron cpu = get_cpu(); 2662094963daSStephen M. Cameron lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 2663094963daSStephen M. Cameron rc = *lockup_detected; 2664094963daSStephen M. Cameron put_cpu(); 2665094963daSStephen M. Cameron return rc; 2666094963daSStephen M. Cameron } 2667094963daSStephen M. Cameron 26689c2fc160SStephen M. Cameron #define MAX_DRIVER_CMD_RETRIES 25 266925163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h, 267025163bd5SWebb Scales struct CommandList *c, int data_direction, unsigned long timeout_msecs) 2671edd16368SStephen M. Cameron { 26729c2fc160SStephen M. Cameron int backoff_time = 10, retry_count = 0; 267325163bd5SWebb Scales int rc; 2674edd16368SStephen M. Cameron 2675edd16368SStephen M. Cameron do { 26767630abd0SJoe Perches memset(c->err_info, 0, sizeof(*c->err_info)); 267725163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 267825163bd5SWebb Scales timeout_msecs); 267925163bd5SWebb Scales if (rc) 268025163bd5SWebb Scales break; 2681edd16368SStephen M. Cameron retry_count++; 26829c2fc160SStephen M. Cameron if (retry_count > 3) { 26839c2fc160SStephen M. Cameron msleep(backoff_time); 26849c2fc160SStephen M. Cameron if (backoff_time < 1000) 26859c2fc160SStephen M. Cameron backoff_time *= 2; 26869c2fc160SStephen M. Cameron } 2687852af20aSMatt Bondurant } while ((check_for_unit_attention(h, c) || 26889c2fc160SStephen M. Cameron check_for_busy(h, c)) && 26899c2fc160SStephen M. Cameron retry_count <= MAX_DRIVER_CMD_RETRIES); 2690edd16368SStephen M. Cameron hpsa_pci_unmap(h->pdev, c, 1, data_direction); 269125163bd5SWebb Scales if (retry_count > MAX_DRIVER_CMD_RETRIES) 269225163bd5SWebb Scales rc = -EIO; 269325163bd5SWebb Scales return rc; 2694edd16368SStephen M. Cameron } 2695edd16368SStephen M. Cameron 2696d1e8beacSStephen M. Cameron static void hpsa_print_cmd(struct ctlr_info *h, char *txt, 2697d1e8beacSStephen M. Cameron struct CommandList *c) 2698edd16368SStephen M. Cameron { 2699d1e8beacSStephen M. Cameron const u8 *cdb = c->Request.CDB; 2700d1e8beacSStephen M. Cameron const u8 *lun = c->Header.LUN.LunAddrBytes; 2701edd16368SStephen M. Cameron 2702d1e8beacSStephen M. Cameron dev_warn(&h->pdev->dev, "%s: LUN:%02x%02x%02x%02x%02x%02x%02x%02x" 2703d1e8beacSStephen M. Cameron " CDB:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x\n", 2704d1e8beacSStephen M. Cameron txt, lun[0], lun[1], lun[2], lun[3], 2705d1e8beacSStephen M. Cameron lun[4], lun[5], lun[6], lun[7], 2706d1e8beacSStephen M. Cameron cdb[0], cdb[1], cdb[2], cdb[3], 2707d1e8beacSStephen M. Cameron cdb[4], cdb[5], cdb[6], cdb[7], 2708d1e8beacSStephen M. Cameron cdb[8], cdb[9], cdb[10], cdb[11], 2709d1e8beacSStephen M. Cameron cdb[12], cdb[13], cdb[14], cdb[15]); 2710d1e8beacSStephen M. Cameron } 2711d1e8beacSStephen M. Cameron 2712d1e8beacSStephen M. Cameron static void hpsa_scsi_interpret_error(struct ctlr_info *h, 2713d1e8beacSStephen M. Cameron struct CommandList *cp) 2714d1e8beacSStephen M. Cameron { 2715d1e8beacSStephen M. Cameron const struct ErrorInfo *ei = cp->err_info; 2716d1e8beacSStephen M. Cameron struct device *d = &cp->h->pdev->dev; 27179437ac43SStephen Cameron u8 sense_key, asc, ascq; 27189437ac43SStephen Cameron int sense_len; 2719d1e8beacSStephen M. Cameron 2720edd16368SStephen M. Cameron switch (ei->CommandStatus) { 2721edd16368SStephen M. Cameron case CMD_TARGET_STATUS: 27229437ac43SStephen Cameron if (ei->SenseLen > sizeof(ei->SenseInfo)) 27239437ac43SStephen Cameron sense_len = sizeof(ei->SenseInfo); 27249437ac43SStephen Cameron else 27259437ac43SStephen Cameron sense_len = ei->SenseLen; 27269437ac43SStephen Cameron decode_sense_data(ei->SenseInfo, sense_len, 27279437ac43SStephen Cameron &sense_key, &asc, &ascq); 2728d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "SCSI status", cp); 2729d1e8beacSStephen M. Cameron if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) 27309437ac43SStephen Cameron dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n", 27319437ac43SStephen Cameron sense_key, asc, ascq); 2732d1e8beacSStephen M. Cameron else 27339437ac43SStephen Cameron dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus); 2734edd16368SStephen M. Cameron if (ei->ScsiStatus == 0) 2735edd16368SStephen M. Cameron dev_warn(d, "SCSI status is abnormally zero. " 2736edd16368SStephen M. Cameron "(probably indicates selection timeout " 2737edd16368SStephen M. Cameron "reported incorrectly due to a known " 2738edd16368SStephen M. Cameron "firmware bug, circa July, 2001.)\n"); 2739edd16368SStephen M. Cameron break; 2740edd16368SStephen M. Cameron case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 2741edd16368SStephen M. Cameron break; 2742edd16368SStephen M. Cameron case CMD_DATA_OVERRUN: 2743d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "overrun condition", cp); 2744edd16368SStephen M. Cameron break; 2745edd16368SStephen M. Cameron case CMD_INVALID: { 2746edd16368SStephen M. Cameron /* controller unfortunately reports SCSI passthru's 2747edd16368SStephen M. Cameron * to non-existent targets as invalid commands. 2748edd16368SStephen M. Cameron */ 2749d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "invalid command", cp); 2750d1e8beacSStephen M. Cameron dev_warn(d, "probably means device no longer present\n"); 2751edd16368SStephen M. Cameron } 2752edd16368SStephen M. Cameron break; 2753edd16368SStephen M. Cameron case CMD_PROTOCOL_ERR: 2754d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "protocol error", cp); 2755edd16368SStephen M. Cameron break; 2756edd16368SStephen M. Cameron case CMD_HARDWARE_ERR: 2757d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "hardware error", cp); 2758edd16368SStephen M. Cameron break; 2759edd16368SStephen M. Cameron case CMD_CONNECTION_LOST: 2760d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "connection lost", cp); 2761edd16368SStephen M. Cameron break; 2762edd16368SStephen M. Cameron case CMD_ABORTED: 2763d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "aborted", cp); 2764edd16368SStephen M. Cameron break; 2765edd16368SStephen M. Cameron case CMD_ABORT_FAILED: 2766d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "abort failed", cp); 2767edd16368SStephen M. Cameron break; 2768edd16368SStephen M. Cameron case CMD_UNSOLICITED_ABORT: 2769d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "unsolicited abort", cp); 2770edd16368SStephen M. Cameron break; 2771edd16368SStephen M. Cameron case CMD_TIMEOUT: 2772d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "timed out", cp); 2773edd16368SStephen M. Cameron break; 27741d5e2ed0SStephen M. Cameron case CMD_UNABORTABLE: 2775d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "unabortable", cp); 27761d5e2ed0SStephen M. Cameron break; 277725163bd5SWebb Scales case CMD_CTLR_LOCKUP: 277825163bd5SWebb Scales hpsa_print_cmd(h, "controller lockup detected", cp); 277925163bd5SWebb Scales break; 2780edd16368SStephen M. Cameron default: 2781d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "unknown status", cp); 2782d1e8beacSStephen M. Cameron dev_warn(d, "Unknown command status %x\n", 2783edd16368SStephen M. Cameron ei->CommandStatus); 2784edd16368SStephen M. Cameron } 2785edd16368SStephen M. Cameron } 2786edd16368SStephen M. Cameron 2787edd16368SStephen M. Cameron static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr, 2788b7bb24ebSStephen M. Cameron u16 page, unsigned char *buf, 2789edd16368SStephen M. Cameron unsigned char bufsize) 2790edd16368SStephen M. Cameron { 2791edd16368SStephen M. Cameron int rc = IO_OK; 2792edd16368SStephen M. Cameron struct CommandList *c; 2793edd16368SStephen M. Cameron struct ErrorInfo *ei; 2794edd16368SStephen M. Cameron 279545fcb86eSStephen Cameron c = cmd_alloc(h); 2796edd16368SStephen M. Cameron 2797a2dac136SStephen M. Cameron if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, 2798a2dac136SStephen M. Cameron page, scsi3addr, TYPE_CMD)) { 2799a2dac136SStephen M. Cameron rc = -1; 2800a2dac136SStephen M. Cameron goto out; 2801a2dac136SStephen M. Cameron } 280225163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 280325163bd5SWebb Scales PCI_DMA_FROMDEVICE, NO_TIMEOUT); 280425163bd5SWebb Scales if (rc) 280525163bd5SWebb Scales goto out; 2806edd16368SStephen M. Cameron ei = c->err_info; 2807edd16368SStephen M. Cameron if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 2808d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 2809edd16368SStephen M. Cameron rc = -1; 2810edd16368SStephen M. Cameron } 2811a2dac136SStephen M. Cameron out: 281245fcb86eSStephen Cameron cmd_free(h, c); 2813edd16368SStephen M. Cameron return rc; 2814edd16368SStephen M. Cameron } 2815edd16368SStephen M. Cameron 2816bf711ac6SScott Teel static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr, 281725163bd5SWebb Scales u8 reset_type, int reply_queue) 2818edd16368SStephen M. Cameron { 2819edd16368SStephen M. Cameron int rc = IO_OK; 2820edd16368SStephen M. Cameron struct CommandList *c; 2821edd16368SStephen M. Cameron struct ErrorInfo *ei; 2822edd16368SStephen M. Cameron 282345fcb86eSStephen Cameron c = cmd_alloc(h); 2824edd16368SStephen M. Cameron 2825edd16368SStephen M. Cameron 2826a2dac136SStephen M. Cameron /* fill_cmd can't fail here, no data buffer to map. */ 28270b9b7b6eSScott Teel (void) fill_cmd(c, reset_type, h, NULL, 0, 0, 2828bf711ac6SScott Teel scsi3addr, TYPE_MSG); 282925163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT); 283025163bd5SWebb Scales if (rc) { 283125163bd5SWebb Scales dev_warn(&h->pdev->dev, "Failed to send reset command\n"); 283225163bd5SWebb Scales goto out; 283325163bd5SWebb Scales } 2834edd16368SStephen M. Cameron /* no unmap needed here because no data xfer. */ 2835edd16368SStephen M. Cameron 2836edd16368SStephen M. Cameron ei = c->err_info; 2837edd16368SStephen M. Cameron if (ei->CommandStatus != 0) { 2838d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 2839edd16368SStephen M. Cameron rc = -1; 2840edd16368SStephen M. Cameron } 284125163bd5SWebb Scales out: 284245fcb86eSStephen Cameron cmd_free(h, c); 2843edd16368SStephen M. Cameron return rc; 2844edd16368SStephen M. Cameron } 2845edd16368SStephen M. Cameron 2846d604f533SWebb Scales static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c, 2847d604f533SWebb Scales struct hpsa_scsi_dev_t *dev, 2848d604f533SWebb Scales unsigned char *scsi3addr) 2849d604f533SWebb Scales { 2850d604f533SWebb Scales int i; 2851d604f533SWebb Scales bool match = false; 2852d604f533SWebb Scales struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 2853d604f533SWebb Scales struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2; 2854d604f533SWebb Scales 2855d604f533SWebb Scales if (hpsa_is_cmd_idle(c)) 2856d604f533SWebb Scales return false; 2857d604f533SWebb Scales 2858d604f533SWebb Scales switch (c->cmd_type) { 2859d604f533SWebb Scales case CMD_SCSI: 2860d604f533SWebb Scales case CMD_IOCTL_PEND: 2861d604f533SWebb Scales match = !memcmp(scsi3addr, &c->Header.LUN.LunAddrBytes, 2862d604f533SWebb Scales sizeof(c->Header.LUN.LunAddrBytes)); 2863d604f533SWebb Scales break; 2864d604f533SWebb Scales 2865d604f533SWebb Scales case CMD_IOACCEL1: 2866d604f533SWebb Scales case CMD_IOACCEL2: 2867d604f533SWebb Scales if (c->phys_disk == dev) { 2868d604f533SWebb Scales /* HBA mode match */ 2869d604f533SWebb Scales match = true; 2870d604f533SWebb Scales } else { 2871d604f533SWebb Scales /* Possible RAID mode -- check each phys dev. */ 2872d604f533SWebb Scales /* FIXME: Do we need to take out a lock here? If 2873d604f533SWebb Scales * so, we could just call hpsa_get_pdisk_of_ioaccel2() 2874d604f533SWebb Scales * instead. */ 2875d604f533SWebb Scales for (i = 0; i < dev->nphysical_disks && !match; i++) { 2876d604f533SWebb Scales /* FIXME: an alternate test might be 2877d604f533SWebb Scales * 2878d604f533SWebb Scales * match = dev->phys_disk[i]->ioaccel_handle 2879d604f533SWebb Scales * == c2->scsi_nexus; */ 2880d604f533SWebb Scales match = dev->phys_disk[i] == c->phys_disk; 2881d604f533SWebb Scales } 2882d604f533SWebb Scales } 2883d604f533SWebb Scales break; 2884d604f533SWebb Scales 2885d604f533SWebb Scales case IOACCEL2_TMF: 2886d604f533SWebb Scales for (i = 0; i < dev->nphysical_disks && !match; i++) { 2887d604f533SWebb Scales match = dev->phys_disk[i]->ioaccel_handle == 2888d604f533SWebb Scales le32_to_cpu(ac->it_nexus); 2889d604f533SWebb Scales } 2890d604f533SWebb Scales break; 2891d604f533SWebb Scales 2892d604f533SWebb Scales case 0: /* The command is in the middle of being initialized. */ 2893d604f533SWebb Scales match = false; 2894d604f533SWebb Scales break; 2895d604f533SWebb Scales 2896d604f533SWebb Scales default: 2897d604f533SWebb Scales dev_err(&h->pdev->dev, "unexpected cmd_type: %d\n", 2898d604f533SWebb Scales c->cmd_type); 2899d604f533SWebb Scales BUG(); 2900d604f533SWebb Scales } 2901d604f533SWebb Scales 2902d604f533SWebb Scales return match; 2903d604f533SWebb Scales } 2904d604f533SWebb Scales 2905d604f533SWebb Scales static int hpsa_do_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev, 2906d604f533SWebb Scales unsigned char *scsi3addr, u8 reset_type, int reply_queue) 2907d604f533SWebb Scales { 2908d604f533SWebb Scales int i; 2909d604f533SWebb Scales int rc = 0; 2910d604f533SWebb Scales 2911d604f533SWebb Scales /* We can really only handle one reset at a time */ 2912d604f533SWebb Scales if (mutex_lock_interruptible(&h->reset_mutex) == -EINTR) { 2913d604f533SWebb Scales dev_warn(&h->pdev->dev, "concurrent reset wait interrupted.\n"); 2914d604f533SWebb Scales return -EINTR; 2915d604f533SWebb Scales } 2916d604f533SWebb Scales 2917d604f533SWebb Scales BUG_ON(atomic_read(&dev->reset_cmds_out) != 0); 2918d604f533SWebb Scales 2919d604f533SWebb Scales for (i = 0; i < h->nr_cmds; i++) { 2920d604f533SWebb Scales struct CommandList *c = h->cmd_pool + i; 2921d604f533SWebb Scales int refcount = atomic_inc_return(&c->refcount); 2922d604f533SWebb Scales 2923d604f533SWebb Scales if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, scsi3addr)) { 2924d604f533SWebb Scales unsigned long flags; 2925d604f533SWebb Scales 2926d604f533SWebb Scales /* 2927d604f533SWebb Scales * Mark the target command as having a reset pending, 2928d604f533SWebb Scales * then lock a lock so that the command cannot complete 2929d604f533SWebb Scales * while we're considering it. If the command is not 2930d604f533SWebb Scales * idle then count it; otherwise revoke the event. 2931d604f533SWebb Scales */ 2932d604f533SWebb Scales c->reset_pending = dev; 2933d604f533SWebb Scales spin_lock_irqsave(&h->lock, flags); /* Implied MB */ 2934d604f533SWebb Scales if (!hpsa_is_cmd_idle(c)) 2935d604f533SWebb Scales atomic_inc(&dev->reset_cmds_out); 2936d604f533SWebb Scales else 2937d604f533SWebb Scales c->reset_pending = NULL; 2938d604f533SWebb Scales spin_unlock_irqrestore(&h->lock, flags); 2939d604f533SWebb Scales } 2940d604f533SWebb Scales 2941d604f533SWebb Scales cmd_free(h, c); 2942d604f533SWebb Scales } 2943d604f533SWebb Scales 2944d604f533SWebb Scales rc = hpsa_send_reset(h, scsi3addr, reset_type, reply_queue); 2945d604f533SWebb Scales if (!rc) 2946d604f533SWebb Scales wait_event(h->event_sync_wait_queue, 2947d604f533SWebb Scales atomic_read(&dev->reset_cmds_out) == 0 || 2948d604f533SWebb Scales lockup_detected(h)); 2949d604f533SWebb Scales 2950d604f533SWebb Scales if (unlikely(lockup_detected(h))) { 2951d604f533SWebb Scales dev_warn(&h->pdev->dev, 2952d604f533SWebb Scales "Controller lockup detected during reset wait\n"); 2953d604f533SWebb Scales rc = -ENODEV; 2954d604f533SWebb Scales } 2955d604f533SWebb Scales 2956d604f533SWebb Scales if (unlikely(rc)) 2957d604f533SWebb Scales atomic_set(&dev->reset_cmds_out, 0); 2958d604f533SWebb Scales 2959d604f533SWebb Scales mutex_unlock(&h->reset_mutex); 2960d604f533SWebb Scales return rc; 2961d604f533SWebb Scales } 2962d604f533SWebb Scales 2963edd16368SStephen M. Cameron static void hpsa_get_raid_level(struct ctlr_info *h, 2964edd16368SStephen M. Cameron unsigned char *scsi3addr, unsigned char *raid_level) 2965edd16368SStephen M. Cameron { 2966edd16368SStephen M. Cameron int rc; 2967edd16368SStephen M. Cameron unsigned char *buf; 2968edd16368SStephen M. Cameron 2969edd16368SStephen M. Cameron *raid_level = RAID_UNKNOWN; 2970edd16368SStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 2971edd16368SStephen M. Cameron if (!buf) 2972edd16368SStephen M. Cameron return; 2973b7bb24ebSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 0xC1, buf, 64); 2974edd16368SStephen M. Cameron if (rc == 0) 2975edd16368SStephen M. Cameron *raid_level = buf[8]; 2976edd16368SStephen M. Cameron if (*raid_level > RAID_UNKNOWN) 2977edd16368SStephen M. Cameron *raid_level = RAID_UNKNOWN; 2978edd16368SStephen M. Cameron kfree(buf); 2979edd16368SStephen M. Cameron return; 2980edd16368SStephen M. Cameron } 2981edd16368SStephen M. Cameron 2982283b4a9bSStephen M. Cameron #define HPSA_MAP_DEBUG 2983283b4a9bSStephen M. Cameron #ifdef HPSA_MAP_DEBUG 2984283b4a9bSStephen M. Cameron static void hpsa_debug_map_buff(struct ctlr_info *h, int rc, 2985283b4a9bSStephen M. Cameron struct raid_map_data *map_buff) 2986283b4a9bSStephen M. Cameron { 2987283b4a9bSStephen M. Cameron struct raid_map_disk_data *dd = &map_buff->data[0]; 2988283b4a9bSStephen M. Cameron int map, row, col; 2989283b4a9bSStephen M. Cameron u16 map_cnt, row_cnt, disks_per_row; 2990283b4a9bSStephen M. Cameron 2991283b4a9bSStephen M. Cameron if (rc != 0) 2992283b4a9bSStephen M. Cameron return; 2993283b4a9bSStephen M. Cameron 29942ba8bfc8SStephen M. Cameron /* Show details only if debugging has been activated. */ 29952ba8bfc8SStephen M. Cameron if (h->raid_offload_debug < 2) 29962ba8bfc8SStephen M. Cameron return; 29972ba8bfc8SStephen M. Cameron 2998283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "structure_size = %u\n", 2999283b4a9bSStephen M. Cameron le32_to_cpu(map_buff->structure_size)); 3000283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "volume_blk_size = %u\n", 3001283b4a9bSStephen M. Cameron le32_to_cpu(map_buff->volume_blk_size)); 3002283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n", 3003283b4a9bSStephen M. Cameron le64_to_cpu(map_buff->volume_blk_cnt)); 3004283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "physicalBlockShift = %u\n", 3005283b4a9bSStephen M. Cameron map_buff->phys_blk_shift); 3006283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n", 3007283b4a9bSStephen M. Cameron map_buff->parity_rotation_shift); 3008283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "strip_size = %u\n", 3009283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->strip_size)); 3010283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n", 3011283b4a9bSStephen M. Cameron le64_to_cpu(map_buff->disk_starting_blk)); 3012283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n", 3013283b4a9bSStephen M. Cameron le64_to_cpu(map_buff->disk_blk_cnt)); 3014283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "data_disks_per_row = %u\n", 3015283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->data_disks_per_row)); 3016283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n", 3017283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->metadata_disks_per_row)); 3018283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "row_cnt = %u\n", 3019283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->row_cnt)); 3020283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "layout_map_count = %u\n", 3021283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->layout_map_count)); 30222b08b3e9SDon Brace dev_info(&h->pdev->dev, "flags = 0x%x\n", 3023dd0e19f3SScott Teel le16_to_cpu(map_buff->flags)); 30242b08b3e9SDon Brace dev_info(&h->pdev->dev, "encrypytion = %s\n", 30252b08b3e9SDon Brace le16_to_cpu(map_buff->flags) & 30262b08b3e9SDon Brace RAID_MAP_FLAG_ENCRYPT_ON ? "ON" : "OFF"); 3027dd0e19f3SScott Teel dev_info(&h->pdev->dev, "dekindex = %u\n", 3028dd0e19f3SScott Teel le16_to_cpu(map_buff->dekindex)); 3029283b4a9bSStephen M. Cameron map_cnt = le16_to_cpu(map_buff->layout_map_count); 3030283b4a9bSStephen M. Cameron for (map = 0; map < map_cnt; map++) { 3031283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "Map%u:\n", map); 3032283b4a9bSStephen M. Cameron row_cnt = le16_to_cpu(map_buff->row_cnt); 3033283b4a9bSStephen M. Cameron for (row = 0; row < row_cnt; row++) { 3034283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, " Row%u:\n", row); 3035283b4a9bSStephen M. Cameron disks_per_row = 3036283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->data_disks_per_row); 3037283b4a9bSStephen M. Cameron for (col = 0; col < disks_per_row; col++, dd++) 3038283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, 3039283b4a9bSStephen M. Cameron " D%02u: h=0x%04x xor=%u,%u\n", 3040283b4a9bSStephen M. Cameron col, dd->ioaccel_handle, 3041283b4a9bSStephen M. Cameron dd->xor_mult[0], dd->xor_mult[1]); 3042283b4a9bSStephen M. Cameron disks_per_row = 3043283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->metadata_disks_per_row); 3044283b4a9bSStephen M. Cameron for (col = 0; col < disks_per_row; col++, dd++) 3045283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, 3046283b4a9bSStephen M. Cameron " M%02u: h=0x%04x xor=%u,%u\n", 3047283b4a9bSStephen M. Cameron col, dd->ioaccel_handle, 3048283b4a9bSStephen M. Cameron dd->xor_mult[0], dd->xor_mult[1]); 3049283b4a9bSStephen M. Cameron } 3050283b4a9bSStephen M. Cameron } 3051283b4a9bSStephen M. Cameron } 3052283b4a9bSStephen M. Cameron #else 3053283b4a9bSStephen M. Cameron static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h, 3054283b4a9bSStephen M. Cameron __attribute__((unused)) int rc, 3055283b4a9bSStephen M. Cameron __attribute__((unused)) struct raid_map_data *map_buff) 3056283b4a9bSStephen M. Cameron { 3057283b4a9bSStephen M. Cameron } 3058283b4a9bSStephen M. Cameron #endif 3059283b4a9bSStephen M. Cameron 3060283b4a9bSStephen M. Cameron static int hpsa_get_raid_map(struct ctlr_info *h, 3061283b4a9bSStephen M. Cameron unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device) 3062283b4a9bSStephen M. Cameron { 3063283b4a9bSStephen M. Cameron int rc = 0; 3064283b4a9bSStephen M. Cameron struct CommandList *c; 3065283b4a9bSStephen M. Cameron struct ErrorInfo *ei; 3066283b4a9bSStephen M. Cameron 306745fcb86eSStephen Cameron c = cmd_alloc(h); 3068bf43caf3SRobert Elliott 3069283b4a9bSStephen M. Cameron if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map, 3070283b4a9bSStephen M. Cameron sizeof(this_device->raid_map), 0, 3071283b4a9bSStephen M. Cameron scsi3addr, TYPE_CMD)) { 30722dd02d74SRobert Elliott dev_warn(&h->pdev->dev, "hpsa_get_raid_map fill_cmd failed\n"); 30732dd02d74SRobert Elliott cmd_free(h, c); 30742dd02d74SRobert Elliott return -1; 3075283b4a9bSStephen M. Cameron } 307625163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 307725163bd5SWebb Scales PCI_DMA_FROMDEVICE, NO_TIMEOUT); 307825163bd5SWebb Scales if (rc) 307925163bd5SWebb Scales goto out; 3080283b4a9bSStephen M. Cameron ei = c->err_info; 3081283b4a9bSStephen M. Cameron if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3082d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 308325163bd5SWebb Scales rc = -1; 308425163bd5SWebb Scales goto out; 3085283b4a9bSStephen M. Cameron } 308645fcb86eSStephen Cameron cmd_free(h, c); 3087283b4a9bSStephen M. Cameron 3088283b4a9bSStephen M. Cameron /* @todo in the future, dynamically allocate RAID map memory */ 3089283b4a9bSStephen M. Cameron if (le32_to_cpu(this_device->raid_map.structure_size) > 3090283b4a9bSStephen M. Cameron sizeof(this_device->raid_map)) { 3091283b4a9bSStephen M. Cameron dev_warn(&h->pdev->dev, "RAID map size is too large!\n"); 3092283b4a9bSStephen M. Cameron rc = -1; 3093283b4a9bSStephen M. Cameron } 3094283b4a9bSStephen M. Cameron hpsa_debug_map_buff(h, rc, &this_device->raid_map); 3095283b4a9bSStephen M. Cameron return rc; 309625163bd5SWebb Scales out: 309725163bd5SWebb Scales cmd_free(h, c); 309825163bd5SWebb Scales return rc; 3099283b4a9bSStephen M. Cameron } 3100283b4a9bSStephen M. Cameron 3101*d04e62b9SKevin Barnett static int hpsa_bmic_sense_subsystem_information(struct ctlr_info *h, 3102*d04e62b9SKevin Barnett unsigned char scsi3addr[], u16 bmic_device_index, 3103*d04e62b9SKevin Barnett struct bmic_sense_subsystem_info *buf, size_t bufsize) 3104*d04e62b9SKevin Barnett { 3105*d04e62b9SKevin Barnett int rc = IO_OK; 3106*d04e62b9SKevin Barnett struct CommandList *c; 3107*d04e62b9SKevin Barnett struct ErrorInfo *ei; 3108*d04e62b9SKevin Barnett 3109*d04e62b9SKevin Barnett c = cmd_alloc(h); 3110*d04e62b9SKevin Barnett 3111*d04e62b9SKevin Barnett rc = fill_cmd(c, BMIC_SENSE_SUBSYSTEM_INFORMATION, h, buf, bufsize, 3112*d04e62b9SKevin Barnett 0, RAID_CTLR_LUNID, TYPE_CMD); 3113*d04e62b9SKevin Barnett if (rc) 3114*d04e62b9SKevin Barnett goto out; 3115*d04e62b9SKevin Barnett 3116*d04e62b9SKevin Barnett c->Request.CDB[2] = bmic_device_index & 0xff; 3117*d04e62b9SKevin Barnett c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff; 3118*d04e62b9SKevin Barnett 3119*d04e62b9SKevin Barnett rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3120*d04e62b9SKevin Barnett PCI_DMA_FROMDEVICE, NO_TIMEOUT); 3121*d04e62b9SKevin Barnett if (rc) 3122*d04e62b9SKevin Barnett goto out; 3123*d04e62b9SKevin Barnett ei = c->err_info; 3124*d04e62b9SKevin Barnett if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3125*d04e62b9SKevin Barnett hpsa_scsi_interpret_error(h, c); 3126*d04e62b9SKevin Barnett rc = -1; 3127*d04e62b9SKevin Barnett } 3128*d04e62b9SKevin Barnett out: 3129*d04e62b9SKevin Barnett cmd_free(h, c); 3130*d04e62b9SKevin Barnett return rc; 3131*d04e62b9SKevin Barnett } 3132*d04e62b9SKevin Barnett 313366749d0dSScott Teel static int hpsa_bmic_id_controller(struct ctlr_info *h, 313466749d0dSScott Teel struct bmic_identify_controller *buf, size_t bufsize) 313566749d0dSScott Teel { 313666749d0dSScott Teel int rc = IO_OK; 313766749d0dSScott Teel struct CommandList *c; 313866749d0dSScott Teel struct ErrorInfo *ei; 313966749d0dSScott Teel 314066749d0dSScott Teel c = cmd_alloc(h); 314166749d0dSScott Teel 314266749d0dSScott Teel rc = fill_cmd(c, BMIC_IDENTIFY_CONTROLLER, h, buf, bufsize, 314366749d0dSScott Teel 0, RAID_CTLR_LUNID, TYPE_CMD); 314466749d0dSScott Teel if (rc) 314566749d0dSScott Teel goto out; 314666749d0dSScott Teel 314766749d0dSScott Teel rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 314866749d0dSScott Teel PCI_DMA_FROMDEVICE, NO_TIMEOUT); 314966749d0dSScott Teel if (rc) 315066749d0dSScott Teel goto out; 315166749d0dSScott Teel ei = c->err_info; 315266749d0dSScott Teel if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 315366749d0dSScott Teel hpsa_scsi_interpret_error(h, c); 315466749d0dSScott Teel rc = -1; 315566749d0dSScott Teel } 315666749d0dSScott Teel out: 315766749d0dSScott Teel cmd_free(h, c); 315866749d0dSScott Teel return rc; 315966749d0dSScott Teel } 316066749d0dSScott Teel 316103383736SDon Brace static int hpsa_bmic_id_physical_device(struct ctlr_info *h, 316203383736SDon Brace unsigned char scsi3addr[], u16 bmic_device_index, 316303383736SDon Brace struct bmic_identify_physical_device *buf, size_t bufsize) 316403383736SDon Brace { 316503383736SDon Brace int rc = IO_OK; 316603383736SDon Brace struct CommandList *c; 316703383736SDon Brace struct ErrorInfo *ei; 316803383736SDon Brace 316903383736SDon Brace c = cmd_alloc(h); 317003383736SDon Brace rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize, 317103383736SDon Brace 0, RAID_CTLR_LUNID, TYPE_CMD); 317203383736SDon Brace if (rc) 317303383736SDon Brace goto out; 317403383736SDon Brace 317503383736SDon Brace c->Request.CDB[2] = bmic_device_index & 0xff; 317603383736SDon Brace c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff; 317703383736SDon Brace 317825163bd5SWebb Scales hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE, 317925163bd5SWebb Scales NO_TIMEOUT); 318003383736SDon Brace ei = c->err_info; 318103383736SDon Brace if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 318203383736SDon Brace hpsa_scsi_interpret_error(h, c); 318303383736SDon Brace rc = -1; 318403383736SDon Brace } 318503383736SDon Brace out: 318603383736SDon Brace cmd_free(h, c); 3187*d04e62b9SKevin Barnett 318803383736SDon Brace return rc; 318903383736SDon Brace } 319003383736SDon Brace 3191*d04e62b9SKevin Barnett static u64 hpsa_get_sas_address_from_report_physical(struct ctlr_info *h, 3192*d04e62b9SKevin Barnett unsigned char *scsi3addr) 3193*d04e62b9SKevin Barnett { 3194*d04e62b9SKevin Barnett struct ReportExtendedLUNdata *physdev; 3195*d04e62b9SKevin Barnett u32 nphysicals; 3196*d04e62b9SKevin Barnett u64 sa = 0; 3197*d04e62b9SKevin Barnett int i; 3198*d04e62b9SKevin Barnett 3199*d04e62b9SKevin Barnett physdev = kzalloc(sizeof(*physdev), GFP_KERNEL); 3200*d04e62b9SKevin Barnett if (!physdev) 3201*d04e62b9SKevin Barnett return 0; 3202*d04e62b9SKevin Barnett 3203*d04e62b9SKevin Barnett if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) { 3204*d04e62b9SKevin Barnett dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 3205*d04e62b9SKevin Barnett kfree(physdev); 3206*d04e62b9SKevin Barnett return 0; 3207*d04e62b9SKevin Barnett } 3208*d04e62b9SKevin Barnett nphysicals = get_unaligned_be32(physdev->LUNListLength) / 24; 3209*d04e62b9SKevin Barnett 3210*d04e62b9SKevin Barnett for (i = 0; i < nphysicals; i++) 3211*d04e62b9SKevin Barnett if (!memcmp(&physdev->LUN[i].lunid[0], scsi3addr, 8)) { 3212*d04e62b9SKevin Barnett sa = get_unaligned_be64(&physdev->LUN[i].wwid[0]); 3213*d04e62b9SKevin Barnett break; 3214*d04e62b9SKevin Barnett } 3215*d04e62b9SKevin Barnett 3216*d04e62b9SKevin Barnett kfree(physdev); 3217*d04e62b9SKevin Barnett 3218*d04e62b9SKevin Barnett return sa; 3219*d04e62b9SKevin Barnett } 3220*d04e62b9SKevin Barnett 3221*d04e62b9SKevin Barnett static void hpsa_get_sas_address(struct ctlr_info *h, unsigned char *scsi3addr, 3222*d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *dev) 3223*d04e62b9SKevin Barnett { 3224*d04e62b9SKevin Barnett int rc; 3225*d04e62b9SKevin Barnett u64 sa = 0; 3226*d04e62b9SKevin Barnett 3227*d04e62b9SKevin Barnett if (is_hba_lunid(scsi3addr)) { 3228*d04e62b9SKevin Barnett struct bmic_sense_subsystem_info *ssi; 3229*d04e62b9SKevin Barnett 3230*d04e62b9SKevin Barnett ssi = kzalloc(sizeof(*ssi), GFP_KERNEL); 3231*d04e62b9SKevin Barnett if (ssi == NULL) { 3232*d04e62b9SKevin Barnett dev_warn(&h->pdev->dev, 3233*d04e62b9SKevin Barnett "%s: out of memory\n", __func__); 3234*d04e62b9SKevin Barnett return; 3235*d04e62b9SKevin Barnett } 3236*d04e62b9SKevin Barnett 3237*d04e62b9SKevin Barnett rc = hpsa_bmic_sense_subsystem_information(h, 3238*d04e62b9SKevin Barnett scsi3addr, 0, ssi, sizeof(*ssi)); 3239*d04e62b9SKevin Barnett if (rc == 0) { 3240*d04e62b9SKevin Barnett sa = get_unaligned_be64(ssi->primary_world_wide_id); 3241*d04e62b9SKevin Barnett h->sas_address = sa; 3242*d04e62b9SKevin Barnett } 3243*d04e62b9SKevin Barnett 3244*d04e62b9SKevin Barnett kfree(ssi); 3245*d04e62b9SKevin Barnett } else 3246*d04e62b9SKevin Barnett sa = hpsa_get_sas_address_from_report_physical(h, scsi3addr); 3247*d04e62b9SKevin Barnett 3248*d04e62b9SKevin Barnett dev->sas_address = sa; 3249*d04e62b9SKevin Barnett } 3250*d04e62b9SKevin Barnett 3251*d04e62b9SKevin Barnett /* Get a device id from inquiry page 0x83 */ 32521b70150aSStephen M. Cameron static int hpsa_vpd_page_supported(struct ctlr_info *h, 32531b70150aSStephen M. Cameron unsigned char scsi3addr[], u8 page) 32541b70150aSStephen M. Cameron { 32551b70150aSStephen M. Cameron int rc; 32561b70150aSStephen M. Cameron int i; 32571b70150aSStephen M. Cameron int pages; 32581b70150aSStephen M. Cameron unsigned char *buf, bufsize; 32591b70150aSStephen M. Cameron 32601b70150aSStephen M. Cameron buf = kzalloc(256, GFP_KERNEL); 32611b70150aSStephen M. Cameron if (!buf) 32621b70150aSStephen M. Cameron return 0; 32631b70150aSStephen M. Cameron 32641b70150aSStephen M. Cameron /* Get the size of the page list first */ 32651b70150aSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, 32661b70150aSStephen M. Cameron VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES, 32671b70150aSStephen M. Cameron buf, HPSA_VPD_HEADER_SZ); 32681b70150aSStephen M. Cameron if (rc != 0) 32691b70150aSStephen M. Cameron goto exit_unsupported; 32701b70150aSStephen M. Cameron pages = buf[3]; 32711b70150aSStephen M. Cameron if ((pages + HPSA_VPD_HEADER_SZ) <= 255) 32721b70150aSStephen M. Cameron bufsize = pages + HPSA_VPD_HEADER_SZ; 32731b70150aSStephen M. Cameron else 32741b70150aSStephen M. Cameron bufsize = 255; 32751b70150aSStephen M. Cameron 32761b70150aSStephen M. Cameron /* Get the whole VPD page list */ 32771b70150aSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, 32781b70150aSStephen M. Cameron VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES, 32791b70150aSStephen M. Cameron buf, bufsize); 32801b70150aSStephen M. Cameron if (rc != 0) 32811b70150aSStephen M. Cameron goto exit_unsupported; 32821b70150aSStephen M. Cameron 32831b70150aSStephen M. Cameron pages = buf[3]; 32841b70150aSStephen M. Cameron for (i = 1; i <= pages; i++) 32851b70150aSStephen M. Cameron if (buf[3 + i] == page) 32861b70150aSStephen M. Cameron goto exit_supported; 32871b70150aSStephen M. Cameron exit_unsupported: 32881b70150aSStephen M. Cameron kfree(buf); 32891b70150aSStephen M. Cameron return 0; 32901b70150aSStephen M. Cameron exit_supported: 32911b70150aSStephen M. Cameron kfree(buf); 32921b70150aSStephen M. Cameron return 1; 32931b70150aSStephen M. Cameron } 32941b70150aSStephen M. Cameron 3295283b4a9bSStephen M. Cameron static void hpsa_get_ioaccel_status(struct ctlr_info *h, 3296283b4a9bSStephen M. Cameron unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device) 3297283b4a9bSStephen M. Cameron { 3298283b4a9bSStephen M. Cameron int rc; 3299283b4a9bSStephen M. Cameron unsigned char *buf; 3300283b4a9bSStephen M. Cameron u8 ioaccel_status; 3301283b4a9bSStephen M. Cameron 3302283b4a9bSStephen M. Cameron this_device->offload_config = 0; 3303283b4a9bSStephen M. Cameron this_device->offload_enabled = 0; 330441ce4c35SStephen Cameron this_device->offload_to_be_enabled = 0; 3305283b4a9bSStephen M. Cameron 3306283b4a9bSStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 3307283b4a9bSStephen M. Cameron if (!buf) 3308283b4a9bSStephen M. Cameron return; 33091b70150aSStephen M. Cameron if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS)) 33101b70150aSStephen M. Cameron goto out; 3311283b4a9bSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, 3312b7bb24ebSStephen M. Cameron VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64); 3313283b4a9bSStephen M. Cameron if (rc != 0) 3314283b4a9bSStephen M. Cameron goto out; 3315283b4a9bSStephen M. Cameron 3316283b4a9bSStephen M. Cameron #define IOACCEL_STATUS_BYTE 4 3317283b4a9bSStephen M. Cameron #define OFFLOAD_CONFIGURED_BIT 0x01 3318283b4a9bSStephen M. Cameron #define OFFLOAD_ENABLED_BIT 0x02 3319283b4a9bSStephen M. Cameron ioaccel_status = buf[IOACCEL_STATUS_BYTE]; 3320283b4a9bSStephen M. Cameron this_device->offload_config = 3321283b4a9bSStephen M. Cameron !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT); 3322283b4a9bSStephen M. Cameron if (this_device->offload_config) { 3323283b4a9bSStephen M. Cameron this_device->offload_enabled = 3324283b4a9bSStephen M. Cameron !!(ioaccel_status & OFFLOAD_ENABLED_BIT); 3325283b4a9bSStephen M. Cameron if (hpsa_get_raid_map(h, scsi3addr, this_device)) 3326283b4a9bSStephen M. Cameron this_device->offload_enabled = 0; 3327283b4a9bSStephen M. Cameron } 332841ce4c35SStephen Cameron this_device->offload_to_be_enabled = this_device->offload_enabled; 3329283b4a9bSStephen M. Cameron out: 3330283b4a9bSStephen M. Cameron kfree(buf); 3331283b4a9bSStephen M. Cameron return; 3332283b4a9bSStephen M. Cameron } 3333283b4a9bSStephen M. Cameron 3334edd16368SStephen M. Cameron /* Get the device id from inquiry page 0x83 */ 3335edd16368SStephen M. Cameron static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr, 333675d23d89SDon Brace unsigned char *device_id, int index, int buflen) 3337edd16368SStephen M. Cameron { 3338edd16368SStephen M. Cameron int rc; 3339edd16368SStephen M. Cameron unsigned char *buf; 3340edd16368SStephen M. Cameron 3341edd16368SStephen M. Cameron if (buflen > 16) 3342edd16368SStephen M. Cameron buflen = 16; 3343edd16368SStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 3344edd16368SStephen M. Cameron if (!buf) 3345a84d794dSStephen M. Cameron return -ENOMEM; 3346b7bb24ebSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 0x83, buf, 64); 3347edd16368SStephen M. Cameron if (rc == 0) 334875d23d89SDon Brace memcpy(device_id, &buf[index], buflen); 334975d23d89SDon Brace 3350edd16368SStephen M. Cameron kfree(buf); 335175d23d89SDon Brace 3352edd16368SStephen M. Cameron return rc != 0; 3353edd16368SStephen M. Cameron } 3354edd16368SStephen M. Cameron 3355edd16368SStephen M. Cameron static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical, 335603383736SDon Brace void *buf, int bufsize, 3357edd16368SStephen M. Cameron int extended_response) 3358edd16368SStephen M. Cameron { 3359edd16368SStephen M. Cameron int rc = IO_OK; 3360edd16368SStephen M. Cameron struct CommandList *c; 3361edd16368SStephen M. Cameron unsigned char scsi3addr[8]; 3362edd16368SStephen M. Cameron struct ErrorInfo *ei; 3363edd16368SStephen M. Cameron 336445fcb86eSStephen Cameron c = cmd_alloc(h); 3365bf43caf3SRobert Elliott 3366e89c0ae7SStephen M. Cameron /* address the controller */ 3367e89c0ae7SStephen M. Cameron memset(scsi3addr, 0, sizeof(scsi3addr)); 3368a2dac136SStephen M. Cameron if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h, 3369a2dac136SStephen M. Cameron buf, bufsize, 0, scsi3addr, TYPE_CMD)) { 3370a2dac136SStephen M. Cameron rc = -1; 3371a2dac136SStephen M. Cameron goto out; 3372a2dac136SStephen M. Cameron } 3373edd16368SStephen M. Cameron if (extended_response) 3374edd16368SStephen M. Cameron c->Request.CDB[1] = extended_response; 337525163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 337625163bd5SWebb Scales PCI_DMA_FROMDEVICE, NO_TIMEOUT); 337725163bd5SWebb Scales if (rc) 337825163bd5SWebb Scales goto out; 3379edd16368SStephen M. Cameron ei = c->err_info; 3380edd16368SStephen M. Cameron if (ei->CommandStatus != 0 && 3381edd16368SStephen M. Cameron ei->CommandStatus != CMD_DATA_UNDERRUN) { 3382d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 3383edd16368SStephen M. Cameron rc = -1; 3384283b4a9bSStephen M. Cameron } else { 338503383736SDon Brace struct ReportLUNdata *rld = buf; 338603383736SDon Brace 338703383736SDon Brace if (rld->extended_response_flag != extended_response) { 3388283b4a9bSStephen M. Cameron dev_err(&h->pdev->dev, 3389283b4a9bSStephen M. Cameron "report luns requested format %u, got %u\n", 3390283b4a9bSStephen M. Cameron extended_response, 339103383736SDon Brace rld->extended_response_flag); 3392283b4a9bSStephen M. Cameron rc = -1; 3393283b4a9bSStephen M. Cameron } 3394edd16368SStephen M. Cameron } 3395a2dac136SStephen M. Cameron out: 339645fcb86eSStephen Cameron cmd_free(h, c); 3397edd16368SStephen M. Cameron return rc; 3398edd16368SStephen M. Cameron } 3399edd16368SStephen M. Cameron 3400edd16368SStephen M. Cameron static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 340103383736SDon Brace struct ReportExtendedLUNdata *buf, int bufsize) 3402edd16368SStephen M. Cameron { 340303383736SDon Brace return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, 340403383736SDon Brace HPSA_REPORT_PHYS_EXTENDED); 3405edd16368SStephen M. Cameron } 3406edd16368SStephen M. Cameron 3407edd16368SStephen M. Cameron static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h, 3408edd16368SStephen M. Cameron struct ReportLUNdata *buf, int bufsize) 3409edd16368SStephen M. Cameron { 3410edd16368SStephen M. Cameron return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0); 3411edd16368SStephen M. Cameron } 3412edd16368SStephen M. Cameron 3413edd16368SStephen M. Cameron static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device, 3414edd16368SStephen M. Cameron int bus, int target, int lun) 3415edd16368SStephen M. Cameron { 3416edd16368SStephen M. Cameron device->bus = bus; 3417edd16368SStephen M. Cameron device->target = target; 3418edd16368SStephen M. Cameron device->lun = lun; 3419edd16368SStephen M. Cameron } 3420edd16368SStephen M. Cameron 34219846590eSStephen M. Cameron /* Use VPD inquiry to get details of volume status */ 34229846590eSStephen M. Cameron static int hpsa_get_volume_status(struct ctlr_info *h, 34239846590eSStephen M. Cameron unsigned char scsi3addr[]) 34249846590eSStephen M. Cameron { 34259846590eSStephen M. Cameron int rc; 34269846590eSStephen M. Cameron int status; 34279846590eSStephen M. Cameron int size; 34289846590eSStephen M. Cameron unsigned char *buf; 34299846590eSStephen M. Cameron 34309846590eSStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 34319846590eSStephen M. Cameron if (!buf) 34329846590eSStephen M. Cameron return HPSA_VPD_LV_STATUS_UNSUPPORTED; 34339846590eSStephen M. Cameron 34349846590eSStephen M. Cameron /* Does controller have VPD for logical volume status? */ 343524a4b078SStephen M. Cameron if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS)) 34369846590eSStephen M. Cameron goto exit_failed; 34379846590eSStephen M. Cameron 34389846590eSStephen M. Cameron /* Get the size of the VPD return buffer */ 34399846590eSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS, 34409846590eSStephen M. Cameron buf, HPSA_VPD_HEADER_SZ); 344124a4b078SStephen M. Cameron if (rc != 0) 34429846590eSStephen M. Cameron goto exit_failed; 34439846590eSStephen M. Cameron size = buf[3]; 34449846590eSStephen M. Cameron 34459846590eSStephen M. Cameron /* Now get the whole VPD buffer */ 34469846590eSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS, 34479846590eSStephen M. Cameron buf, size + HPSA_VPD_HEADER_SZ); 344824a4b078SStephen M. Cameron if (rc != 0) 34499846590eSStephen M. Cameron goto exit_failed; 34509846590eSStephen M. Cameron status = buf[4]; /* status byte */ 34519846590eSStephen M. Cameron 34529846590eSStephen M. Cameron kfree(buf); 34539846590eSStephen M. Cameron return status; 34549846590eSStephen M. Cameron exit_failed: 34559846590eSStephen M. Cameron kfree(buf); 34569846590eSStephen M. Cameron return HPSA_VPD_LV_STATUS_UNSUPPORTED; 34579846590eSStephen M. Cameron } 34589846590eSStephen M. Cameron 34599846590eSStephen M. Cameron /* Determine offline status of a volume. 34609846590eSStephen M. Cameron * Return either: 34619846590eSStephen M. Cameron * 0 (not offline) 346267955ba3SStephen M. Cameron * 0xff (offline for unknown reasons) 34639846590eSStephen M. Cameron * # (integer code indicating one of several NOT READY states 34649846590eSStephen M. Cameron * describing why a volume is to be kept offline) 34659846590eSStephen M. Cameron */ 346667955ba3SStephen M. Cameron static int hpsa_volume_offline(struct ctlr_info *h, 34679846590eSStephen M. Cameron unsigned char scsi3addr[]) 34689846590eSStephen M. Cameron { 34699846590eSStephen M. Cameron struct CommandList *c; 34709437ac43SStephen Cameron unsigned char *sense; 34719437ac43SStephen Cameron u8 sense_key, asc, ascq; 34729437ac43SStephen Cameron int sense_len; 347325163bd5SWebb Scales int rc, ldstat = 0; 34749846590eSStephen M. Cameron u16 cmd_status; 34759846590eSStephen M. Cameron u8 scsi_status; 34769846590eSStephen M. Cameron #define ASC_LUN_NOT_READY 0x04 34779846590eSStephen M. Cameron #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04 34789846590eSStephen M. Cameron #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02 34799846590eSStephen M. Cameron 34809846590eSStephen M. Cameron c = cmd_alloc(h); 3481bf43caf3SRobert Elliott 34829846590eSStephen M. Cameron (void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD); 348325163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT); 348425163bd5SWebb Scales if (rc) { 348525163bd5SWebb Scales cmd_free(h, c); 348625163bd5SWebb Scales return 0; 348725163bd5SWebb Scales } 34889846590eSStephen M. Cameron sense = c->err_info->SenseInfo; 34899437ac43SStephen Cameron if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo)) 34909437ac43SStephen Cameron sense_len = sizeof(c->err_info->SenseInfo); 34919437ac43SStephen Cameron else 34929437ac43SStephen Cameron sense_len = c->err_info->SenseLen; 34939437ac43SStephen Cameron decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq); 34949846590eSStephen M. Cameron cmd_status = c->err_info->CommandStatus; 34959846590eSStephen M. Cameron scsi_status = c->err_info->ScsiStatus; 34969846590eSStephen M. Cameron cmd_free(h, c); 34979846590eSStephen M. Cameron /* Is the volume 'not ready'? */ 34989846590eSStephen M. Cameron if (cmd_status != CMD_TARGET_STATUS || 34999846590eSStephen M. Cameron scsi_status != SAM_STAT_CHECK_CONDITION || 35009846590eSStephen M. Cameron sense_key != NOT_READY || 35019846590eSStephen M. Cameron asc != ASC_LUN_NOT_READY) { 35029846590eSStephen M. Cameron return 0; 35039846590eSStephen M. Cameron } 35049846590eSStephen M. Cameron 35059846590eSStephen M. Cameron /* Determine the reason for not ready state */ 35069846590eSStephen M. Cameron ldstat = hpsa_get_volume_status(h, scsi3addr); 35079846590eSStephen M. Cameron 35089846590eSStephen M. Cameron /* Keep volume offline in certain cases: */ 35099846590eSStephen M. Cameron switch (ldstat) { 35109846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ERASE: 35115ca01204SScott Benesh case HPSA_LV_NOT_AVAILABLE: 35129846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_RPI: 35139846590eSStephen M. Cameron case HPSA_LV_PENDING_RPI: 35149846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_NO_KEY: 35159846590eSStephen M. Cameron case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER: 35169846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION: 35179846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING: 35189846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 35199846590eSStephen M. Cameron return ldstat; 35209846590eSStephen M. Cameron case HPSA_VPD_LV_STATUS_UNSUPPORTED: 35219846590eSStephen M. Cameron /* If VPD status page isn't available, 35229846590eSStephen M. Cameron * use ASC/ASCQ to determine state 35239846590eSStephen M. Cameron */ 35249846590eSStephen M. Cameron if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) || 35259846590eSStephen M. Cameron (ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ)) 35269846590eSStephen M. Cameron return ldstat; 35279846590eSStephen M. Cameron break; 35289846590eSStephen M. Cameron default: 35299846590eSStephen M. Cameron break; 35309846590eSStephen M. Cameron } 35319846590eSStephen M. Cameron return 0; 35329846590eSStephen M. Cameron } 35339846590eSStephen M. Cameron 35349b5c48c2SStephen Cameron /* 35359b5c48c2SStephen Cameron * Find out if a logical device supports aborts by simply trying one. 35369b5c48c2SStephen Cameron * Smart Array may claim not to support aborts on logical drives, but 35379b5c48c2SStephen Cameron * if a MSA2000 * is connected, the drives on that will be presented 35389b5c48c2SStephen Cameron * by the Smart Array as logical drives, and aborts may be sent to 35399b5c48c2SStephen Cameron * those devices successfully. So the simplest way to find out is 35409b5c48c2SStephen Cameron * to simply try an abort and see how the device responds. 35419b5c48c2SStephen Cameron */ 35429b5c48c2SStephen Cameron static int hpsa_device_supports_aborts(struct ctlr_info *h, 35439b5c48c2SStephen Cameron unsigned char *scsi3addr) 35449b5c48c2SStephen Cameron { 35459b5c48c2SStephen Cameron struct CommandList *c; 35469b5c48c2SStephen Cameron struct ErrorInfo *ei; 35479b5c48c2SStephen Cameron int rc = 0; 35489b5c48c2SStephen Cameron 35499b5c48c2SStephen Cameron u64 tag = (u64) -1; /* bogus tag */ 35509b5c48c2SStephen Cameron 35519b5c48c2SStephen Cameron /* Assume that physical devices support aborts */ 35529b5c48c2SStephen Cameron if (!is_logical_dev_addr_mode(scsi3addr)) 35539b5c48c2SStephen Cameron return 1; 35549b5c48c2SStephen Cameron 35559b5c48c2SStephen Cameron c = cmd_alloc(h); 3556bf43caf3SRobert Elliott 35579b5c48c2SStephen Cameron (void) fill_cmd(c, HPSA_ABORT_MSG, h, &tag, 0, 0, scsi3addr, TYPE_MSG); 35589b5c48c2SStephen Cameron (void) hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT); 35599b5c48c2SStephen Cameron /* no unmap needed here because no data xfer. */ 35609b5c48c2SStephen Cameron ei = c->err_info; 35619b5c48c2SStephen Cameron switch (ei->CommandStatus) { 35629b5c48c2SStephen Cameron case CMD_INVALID: 35639b5c48c2SStephen Cameron rc = 0; 35649b5c48c2SStephen Cameron break; 35659b5c48c2SStephen Cameron case CMD_UNABORTABLE: 35669b5c48c2SStephen Cameron case CMD_ABORT_FAILED: 35679b5c48c2SStephen Cameron rc = 1; 35689b5c48c2SStephen Cameron break; 35699437ac43SStephen Cameron case CMD_TMF_STATUS: 35709437ac43SStephen Cameron rc = hpsa_evaluate_tmf_status(h, c); 35719437ac43SStephen Cameron break; 35729b5c48c2SStephen Cameron default: 35739b5c48c2SStephen Cameron rc = 0; 35749b5c48c2SStephen Cameron break; 35759b5c48c2SStephen Cameron } 35769b5c48c2SStephen Cameron cmd_free(h, c); 35779b5c48c2SStephen Cameron return rc; 35789b5c48c2SStephen Cameron } 35799b5c48c2SStephen Cameron 358075d23d89SDon Brace static void sanitize_inquiry_string(unsigned char *s, int len) 358175d23d89SDon Brace { 358275d23d89SDon Brace bool terminated = false; 358375d23d89SDon Brace 358475d23d89SDon Brace for (; len > 0; (--len, ++s)) { 358575d23d89SDon Brace if (*s == 0) 358675d23d89SDon Brace terminated = true; 358775d23d89SDon Brace if (terminated || *s < 0x20 || *s > 0x7e) 358875d23d89SDon Brace *s = ' '; 358975d23d89SDon Brace } 359075d23d89SDon Brace } 359175d23d89SDon Brace 3592edd16368SStephen M. Cameron static int hpsa_update_device_info(struct ctlr_info *h, 35930b0e1d6cSStephen M. Cameron unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device, 35940b0e1d6cSStephen M. Cameron unsigned char *is_OBDR_device) 3595edd16368SStephen M. Cameron { 35960b0e1d6cSStephen M. Cameron 35970b0e1d6cSStephen M. Cameron #define OBDR_SIG_OFFSET 43 35980b0e1d6cSStephen M. Cameron #define OBDR_TAPE_SIG "$DR-10" 35990b0e1d6cSStephen M. Cameron #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1) 36000b0e1d6cSStephen M. Cameron #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN) 36010b0e1d6cSStephen M. Cameron 3602ea6d3bc3SStephen M. Cameron unsigned char *inq_buff; 36030b0e1d6cSStephen M. Cameron unsigned char *obdr_sig; 3604683fc444SDon Brace int rc = 0; 3605edd16368SStephen M. Cameron 3606ea6d3bc3SStephen M. Cameron inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL); 3607683fc444SDon Brace if (!inq_buff) { 3608683fc444SDon Brace rc = -ENOMEM; 3609edd16368SStephen M. Cameron goto bail_out; 3610683fc444SDon Brace } 3611edd16368SStephen M. Cameron 3612edd16368SStephen M. Cameron /* Do an inquiry to the device to see what it is. */ 3613edd16368SStephen M. Cameron if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff, 3614edd16368SStephen M. Cameron (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) { 3615edd16368SStephen M. Cameron /* Inquiry failed (msg printed already) */ 3616edd16368SStephen M. Cameron dev_err(&h->pdev->dev, 3617edd16368SStephen M. Cameron "hpsa_update_device_info: inquiry failed\n"); 3618683fc444SDon Brace rc = -EIO; 3619edd16368SStephen M. Cameron goto bail_out; 3620edd16368SStephen M. Cameron } 3621edd16368SStephen M. Cameron 362275d23d89SDon Brace sanitize_inquiry_string(&inq_buff[8], 8); 362375d23d89SDon Brace sanitize_inquiry_string(&inq_buff[16], 16); 362475d23d89SDon Brace 3625edd16368SStephen M. Cameron this_device->devtype = (inq_buff[0] & 0x1f); 3626edd16368SStephen M. Cameron memcpy(this_device->scsi3addr, scsi3addr, 8); 3627edd16368SStephen M. Cameron memcpy(this_device->vendor, &inq_buff[8], 3628edd16368SStephen M. Cameron sizeof(this_device->vendor)); 3629edd16368SStephen M. Cameron memcpy(this_device->model, &inq_buff[16], 3630edd16368SStephen M. Cameron sizeof(this_device->model)); 3631edd16368SStephen M. Cameron memset(this_device->device_id, 0, 3632edd16368SStephen M. Cameron sizeof(this_device->device_id)); 363375d23d89SDon Brace hpsa_get_device_id(h, scsi3addr, this_device->device_id, 8, 3634edd16368SStephen M. Cameron sizeof(this_device->device_id)); 3635edd16368SStephen M. Cameron 3636edd16368SStephen M. Cameron if (this_device->devtype == TYPE_DISK && 3637283b4a9bSStephen M. Cameron is_logical_dev_addr_mode(scsi3addr)) { 363867955ba3SStephen M. Cameron int volume_offline; 363967955ba3SStephen M. Cameron 3640edd16368SStephen M. Cameron hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level); 3641283b4a9bSStephen M. Cameron if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC) 3642283b4a9bSStephen M. Cameron hpsa_get_ioaccel_status(h, scsi3addr, this_device); 364367955ba3SStephen M. Cameron volume_offline = hpsa_volume_offline(h, scsi3addr); 364467955ba3SStephen M. Cameron if (volume_offline < 0 || volume_offline > 0xff) 364567955ba3SStephen M. Cameron volume_offline = HPSA_VPD_LV_STATUS_UNSUPPORTED; 364667955ba3SStephen M. Cameron this_device->volume_offline = volume_offline & 0xff; 3647283b4a9bSStephen M. Cameron } else { 3648edd16368SStephen M. Cameron this_device->raid_level = RAID_UNKNOWN; 3649283b4a9bSStephen M. Cameron this_device->offload_config = 0; 3650283b4a9bSStephen M. Cameron this_device->offload_enabled = 0; 365141ce4c35SStephen Cameron this_device->offload_to_be_enabled = 0; 3652a3144e0bSJoe Handzik this_device->hba_ioaccel_enabled = 0; 36539846590eSStephen M. Cameron this_device->volume_offline = 0; 365403383736SDon Brace this_device->queue_depth = h->nr_cmds; 3655283b4a9bSStephen M. Cameron } 3656edd16368SStephen M. Cameron 36570b0e1d6cSStephen M. Cameron if (is_OBDR_device) { 36580b0e1d6cSStephen M. Cameron /* See if this is a One-Button-Disaster-Recovery device 36590b0e1d6cSStephen M. Cameron * by looking for "$DR-10" at offset 43 in inquiry data. 36600b0e1d6cSStephen M. Cameron */ 36610b0e1d6cSStephen M. Cameron obdr_sig = &inq_buff[OBDR_SIG_OFFSET]; 36620b0e1d6cSStephen M. Cameron *is_OBDR_device = (this_device->devtype == TYPE_ROM && 36630b0e1d6cSStephen M. Cameron strncmp(obdr_sig, OBDR_TAPE_SIG, 36640b0e1d6cSStephen M. Cameron OBDR_SIG_LEN) == 0); 36650b0e1d6cSStephen M. Cameron } 3666edd16368SStephen M. Cameron kfree(inq_buff); 3667edd16368SStephen M. Cameron return 0; 3668edd16368SStephen M. Cameron 3669edd16368SStephen M. Cameron bail_out: 3670edd16368SStephen M. Cameron kfree(inq_buff); 3671683fc444SDon Brace return rc; 3672edd16368SStephen M. Cameron } 3673edd16368SStephen M. Cameron 36749b5c48c2SStephen Cameron static void hpsa_update_device_supports_aborts(struct ctlr_info *h, 36759b5c48c2SStephen Cameron struct hpsa_scsi_dev_t *dev, u8 *scsi3addr) 36769b5c48c2SStephen Cameron { 36779b5c48c2SStephen Cameron unsigned long flags; 36789b5c48c2SStephen Cameron int rc, entry; 36799b5c48c2SStephen Cameron /* 36809b5c48c2SStephen Cameron * See if this device supports aborts. If we already know 36819b5c48c2SStephen Cameron * the device, we already know if it supports aborts, otherwise 36829b5c48c2SStephen Cameron * we have to find out if it supports aborts by trying one. 36839b5c48c2SStephen Cameron */ 36849b5c48c2SStephen Cameron spin_lock_irqsave(&h->devlock, flags); 36859b5c48c2SStephen Cameron rc = hpsa_scsi_find_entry(dev, h->dev, h->ndevices, &entry); 36869b5c48c2SStephen Cameron if ((rc == DEVICE_SAME || rc == DEVICE_UPDATED) && 36879b5c48c2SStephen Cameron entry >= 0 && entry < h->ndevices) { 36889b5c48c2SStephen Cameron dev->supports_aborts = h->dev[entry]->supports_aborts; 36899b5c48c2SStephen Cameron spin_unlock_irqrestore(&h->devlock, flags); 36909b5c48c2SStephen Cameron } else { 36919b5c48c2SStephen Cameron spin_unlock_irqrestore(&h->devlock, flags); 36929b5c48c2SStephen Cameron dev->supports_aborts = 36939b5c48c2SStephen Cameron hpsa_device_supports_aborts(h, scsi3addr); 36949b5c48c2SStephen Cameron if (dev->supports_aborts < 0) 36959b5c48c2SStephen Cameron dev->supports_aborts = 0; 36969b5c48c2SStephen Cameron } 36979b5c48c2SStephen Cameron } 36989b5c48c2SStephen Cameron 3699c795505aSKevin Barnett /* 3700c795505aSKevin Barnett * Helper function to assign bus, target, lun mapping of devices. 3701edd16368SStephen M. Cameron * Logical drive target and lun are assigned at this time, but 3702edd16368SStephen M. Cameron * physical device lun and target assignment are deferred (assigned 3703edd16368SStephen M. Cameron * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.) 3704edd16368SStephen M. Cameron */ 3705edd16368SStephen M. Cameron static void figure_bus_target_lun(struct ctlr_info *h, 37061f310bdeSStephen M. Cameron u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device) 3707edd16368SStephen M. Cameron { 3708c795505aSKevin Barnett u32 lunid = get_unaligned_le32(lunaddrbytes); 3709edd16368SStephen M. Cameron 37101f310bdeSStephen M. Cameron if (!is_logical_dev_addr_mode(lunaddrbytes)) { 37111f310bdeSStephen M. Cameron /* physical device, target and lun filled in later */ 37121f310bdeSStephen M. Cameron if (is_hba_lunid(lunaddrbytes)) 3713c795505aSKevin Barnett hpsa_set_bus_target_lun(device, 3714c795505aSKevin Barnett HPSA_HBA_BUS, 0, lunid & 0x3fff); 37151f310bdeSStephen M. Cameron else 37161f310bdeSStephen M. Cameron /* defer target, lun assignment for physical devices */ 3717c795505aSKevin Barnett hpsa_set_bus_target_lun(device, 3718c795505aSKevin Barnett HPSA_PHYSICAL_DEVICE_BUS, -1, -1); 37191f310bdeSStephen M. Cameron return; 37201f310bdeSStephen M. Cameron } 37211f310bdeSStephen M. Cameron /* It's a logical device */ 372266749d0dSScott Teel if (device->external) { 37231f310bdeSStephen M. Cameron hpsa_set_bus_target_lun(device, 3724c795505aSKevin Barnett HPSA_EXTERNAL_RAID_VOLUME_BUS, (lunid >> 16) & 0x3fff, 3725c795505aSKevin Barnett lunid & 0x00ff); 37261f310bdeSStephen M. Cameron return; 3727339b2b14SStephen M. Cameron } 3728c795505aSKevin Barnett hpsa_set_bus_target_lun(device, HPSA_RAID_VOLUME_BUS, 3729c795505aSKevin Barnett 0, lunid & 0x3fff); 3730edd16368SStephen M. Cameron } 3731edd16368SStephen M. Cameron 3732edd16368SStephen M. Cameron 3733edd16368SStephen M. Cameron /* 373454b6e9e9SScott Teel * Get address of physical disk used for an ioaccel2 mode command: 373554b6e9e9SScott Teel * 1. Extract ioaccel2 handle from the command. 373654b6e9e9SScott Teel * 2. Find a matching ioaccel2 handle from list of physical disks. 373754b6e9e9SScott Teel * 3. Return: 373854b6e9e9SScott Teel * 1 and set scsi3addr to address of matching physical 373954b6e9e9SScott Teel * 0 if no matching physical disk was found. 374054b6e9e9SScott Teel */ 374154b6e9e9SScott Teel static int hpsa_get_pdisk_of_ioaccel2(struct ctlr_info *h, 374254b6e9e9SScott Teel struct CommandList *ioaccel2_cmd_to_abort, unsigned char *scsi3addr) 374354b6e9e9SScott Teel { 374441ce4c35SStephen Cameron struct io_accel2_cmd *c2 = 374541ce4c35SStephen Cameron &h->ioaccel2_cmd_pool[ioaccel2_cmd_to_abort->cmdindex]; 374641ce4c35SStephen Cameron unsigned long flags; 374754b6e9e9SScott Teel int i; 374854b6e9e9SScott Teel 374941ce4c35SStephen Cameron spin_lock_irqsave(&h->devlock, flags); 375041ce4c35SStephen Cameron for (i = 0; i < h->ndevices; i++) 375141ce4c35SStephen Cameron if (h->dev[i]->ioaccel_handle == le32_to_cpu(c2->scsi_nexus)) { 375241ce4c35SStephen Cameron memcpy(scsi3addr, h->dev[i]->scsi3addr, 375341ce4c35SStephen Cameron sizeof(h->dev[i]->scsi3addr)); 375441ce4c35SStephen Cameron spin_unlock_irqrestore(&h->devlock, flags); 375554b6e9e9SScott Teel return 1; 375654b6e9e9SScott Teel } 375741ce4c35SStephen Cameron spin_unlock_irqrestore(&h->devlock, flags); 375841ce4c35SStephen Cameron return 0; 375941ce4c35SStephen Cameron } 376041ce4c35SStephen Cameron 376166749d0dSScott Teel static int figure_external_status(struct ctlr_info *h, int raid_ctlr_position, 376266749d0dSScott Teel int i, int nphysicals, int nlocal_logicals) 376366749d0dSScott Teel { 376466749d0dSScott Teel /* In report logicals, local logicals are listed first, 376566749d0dSScott Teel * then any externals. 376666749d0dSScott Teel */ 376766749d0dSScott Teel int logicals_start = nphysicals + (raid_ctlr_position == 0); 376866749d0dSScott Teel 376966749d0dSScott Teel if (i == raid_ctlr_position) 377066749d0dSScott Teel return 0; 377166749d0dSScott Teel 377266749d0dSScott Teel if (i < logicals_start) 377366749d0dSScott Teel return 0; 377466749d0dSScott Teel 377566749d0dSScott Teel /* i is in logicals range, but still within local logicals */ 377666749d0dSScott Teel if ((i - nphysicals - (raid_ctlr_position == 0)) < nlocal_logicals) 377766749d0dSScott Teel return 0; 377866749d0dSScott Teel 377966749d0dSScott Teel return 1; /* it's an external lun */ 378066749d0dSScott Teel } 378166749d0dSScott Teel 378254b6e9e9SScott Teel /* 3783edd16368SStephen M. Cameron * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev, 3784edd16368SStephen M. Cameron * logdev. The number of luns in physdev and logdev are returned in 3785edd16368SStephen M. Cameron * *nphysicals and *nlogicals, respectively. 3786edd16368SStephen M. Cameron * Returns 0 on success, -1 otherwise. 3787edd16368SStephen M. Cameron */ 3788edd16368SStephen M. Cameron static int hpsa_gather_lun_info(struct ctlr_info *h, 378903383736SDon Brace struct ReportExtendedLUNdata *physdev, u32 *nphysicals, 379001a02ffcSStephen M. Cameron struct ReportLUNdata *logdev, u32 *nlogicals) 3791edd16368SStephen M. Cameron { 379203383736SDon Brace if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) { 3793edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 3794edd16368SStephen M. Cameron return -1; 3795edd16368SStephen M. Cameron } 379603383736SDon Brace *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24; 3797edd16368SStephen M. Cameron if (*nphysicals > HPSA_MAX_PHYS_LUN) { 379803383736SDon Brace dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n", 379903383736SDon Brace HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN); 3800edd16368SStephen M. Cameron *nphysicals = HPSA_MAX_PHYS_LUN; 3801edd16368SStephen M. Cameron } 380203383736SDon Brace if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) { 3803edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "report logical LUNs failed.\n"); 3804edd16368SStephen M. Cameron return -1; 3805edd16368SStephen M. Cameron } 38066df1e954SStephen M. Cameron *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8; 3807edd16368SStephen M. Cameron /* Reject Logicals in excess of our max capability. */ 3808edd16368SStephen M. Cameron if (*nlogicals > HPSA_MAX_LUN) { 3809edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 3810edd16368SStephen M. Cameron "maximum logical LUNs (%d) exceeded. " 3811edd16368SStephen M. Cameron "%d LUNs ignored.\n", HPSA_MAX_LUN, 3812edd16368SStephen M. Cameron *nlogicals - HPSA_MAX_LUN); 3813edd16368SStephen M. Cameron *nlogicals = HPSA_MAX_LUN; 3814edd16368SStephen M. Cameron } 3815edd16368SStephen M. Cameron if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) { 3816edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 3817edd16368SStephen M. Cameron "maximum logical + physical LUNs (%d) exceeded. " 3818edd16368SStephen M. Cameron "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN, 3819edd16368SStephen M. Cameron *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN); 3820edd16368SStephen M. Cameron *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals; 3821edd16368SStephen M. Cameron } 3822edd16368SStephen M. Cameron return 0; 3823edd16368SStephen M. Cameron } 3824edd16368SStephen M. Cameron 382542a91641SDon Brace static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, 382642a91641SDon Brace int i, int nphysicals, int nlogicals, 3827a93aa1feSMatt Gates struct ReportExtendedLUNdata *physdev_list, 3828339b2b14SStephen M. Cameron struct ReportLUNdata *logdev_list) 3829339b2b14SStephen M. Cameron { 3830339b2b14SStephen M. Cameron /* Helper function, figure out where the LUN ID info is coming from 3831339b2b14SStephen M. Cameron * given index i, lists of physical and logical devices, where in 3832339b2b14SStephen M. Cameron * the list the raid controller is supposed to appear (first or last) 3833339b2b14SStephen M. Cameron */ 3834339b2b14SStephen M. Cameron 3835339b2b14SStephen M. Cameron int logicals_start = nphysicals + (raid_ctlr_position == 0); 3836339b2b14SStephen M. Cameron int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0); 3837339b2b14SStephen M. Cameron 3838339b2b14SStephen M. Cameron if (i == raid_ctlr_position) 3839339b2b14SStephen M. Cameron return RAID_CTLR_LUNID; 3840339b2b14SStephen M. Cameron 3841339b2b14SStephen M. Cameron if (i < logicals_start) 3842d5b5d964SStephen M. Cameron return &physdev_list->LUN[i - 3843d5b5d964SStephen M. Cameron (raid_ctlr_position == 0)].lunid[0]; 3844339b2b14SStephen M. Cameron 3845339b2b14SStephen M. Cameron if (i < last_device) 3846339b2b14SStephen M. Cameron return &logdev_list->LUN[i - nphysicals - 3847339b2b14SStephen M. Cameron (raid_ctlr_position == 0)][0]; 3848339b2b14SStephen M. Cameron BUG(); 3849339b2b14SStephen M. Cameron return NULL; 3850339b2b14SStephen M. Cameron } 3851339b2b14SStephen M. Cameron 385203383736SDon Brace /* get physical drive ioaccel handle and queue depth */ 385303383736SDon Brace static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h, 385403383736SDon Brace struct hpsa_scsi_dev_t *dev, 3855f2039b03SDon Brace struct ReportExtendedLUNdata *rlep, int rle_index, 385603383736SDon Brace struct bmic_identify_physical_device *id_phys) 385703383736SDon Brace { 385803383736SDon Brace int rc; 3859f2039b03SDon Brace struct ext_report_lun_entry *rle = &rlep->LUN[rle_index]; 386003383736SDon Brace 386103383736SDon Brace dev->ioaccel_handle = rle->ioaccel_handle; 3862f2039b03SDon Brace if ((rle->device_flags & 0x08) && dev->ioaccel_handle) 3863a3144e0bSJoe Handzik dev->hba_ioaccel_enabled = 1; 386403383736SDon Brace memset(id_phys, 0, sizeof(*id_phys)); 3865f2039b03SDon Brace rc = hpsa_bmic_id_physical_device(h, &rle->lunid[0], 3866f2039b03SDon Brace GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]), id_phys, 386703383736SDon Brace sizeof(*id_phys)); 386803383736SDon Brace if (!rc) 386903383736SDon Brace /* Reserve space for FW operations */ 387003383736SDon Brace #define DRIVE_CMDS_RESERVED_FOR_FW 2 387103383736SDon Brace #define DRIVE_QUEUE_DEPTH 7 387203383736SDon Brace dev->queue_depth = 387303383736SDon Brace le16_to_cpu(id_phys->current_queue_depth_limit) - 387403383736SDon Brace DRIVE_CMDS_RESERVED_FOR_FW; 387503383736SDon Brace else 387603383736SDon Brace dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */ 387703383736SDon Brace } 387803383736SDon Brace 38798270b862SJoe Handzik static void hpsa_get_path_info(struct hpsa_scsi_dev_t *this_device, 3880f2039b03SDon Brace struct ReportExtendedLUNdata *rlep, int rle_index, 38818270b862SJoe Handzik struct bmic_identify_physical_device *id_phys) 38828270b862SJoe Handzik { 3883f2039b03SDon Brace struct ext_report_lun_entry *rle = &rlep->LUN[rle_index]; 3884f2039b03SDon Brace 3885f2039b03SDon Brace if ((rle->device_flags & 0x08) && this_device->ioaccel_handle) 38868270b862SJoe Handzik this_device->hba_ioaccel_enabled = 1; 38878270b862SJoe Handzik 38888270b862SJoe Handzik memcpy(&this_device->active_path_index, 38898270b862SJoe Handzik &id_phys->active_path_number, 38908270b862SJoe Handzik sizeof(this_device->active_path_index)); 38918270b862SJoe Handzik memcpy(&this_device->path_map, 38928270b862SJoe Handzik &id_phys->redundant_path_present_map, 38938270b862SJoe Handzik sizeof(this_device->path_map)); 38948270b862SJoe Handzik memcpy(&this_device->box, 38958270b862SJoe Handzik &id_phys->alternate_paths_phys_box_on_port, 38968270b862SJoe Handzik sizeof(this_device->box)); 38978270b862SJoe Handzik memcpy(&this_device->phys_connector, 38988270b862SJoe Handzik &id_phys->alternate_paths_phys_connector, 38998270b862SJoe Handzik sizeof(this_device->phys_connector)); 39008270b862SJoe Handzik memcpy(&this_device->bay, 39018270b862SJoe Handzik &id_phys->phys_bay_in_box, 39028270b862SJoe Handzik sizeof(this_device->bay)); 39038270b862SJoe Handzik } 39048270b862SJoe Handzik 390566749d0dSScott Teel /* get number of local logical disks. */ 390666749d0dSScott Teel static int hpsa_set_local_logical_count(struct ctlr_info *h, 390766749d0dSScott Teel struct bmic_identify_controller *id_ctlr, 390866749d0dSScott Teel u32 *nlocals) 390966749d0dSScott Teel { 391066749d0dSScott Teel int rc; 391166749d0dSScott Teel 391266749d0dSScott Teel if (!id_ctlr) { 391366749d0dSScott Teel dev_warn(&h->pdev->dev, "%s: id_ctlr buffer is NULL.\n", 391466749d0dSScott Teel __func__); 391566749d0dSScott Teel return -ENOMEM; 391666749d0dSScott Teel } 391766749d0dSScott Teel memset(id_ctlr, 0, sizeof(*id_ctlr)); 391866749d0dSScott Teel rc = hpsa_bmic_id_controller(h, id_ctlr, sizeof(*id_ctlr)); 391966749d0dSScott Teel if (!rc) 392066749d0dSScott Teel if (id_ctlr->configured_logical_drive_count < 256) 392166749d0dSScott Teel *nlocals = id_ctlr->configured_logical_drive_count; 392266749d0dSScott Teel else 392366749d0dSScott Teel *nlocals = le16_to_cpu( 392466749d0dSScott Teel id_ctlr->extended_logical_unit_count); 392566749d0dSScott Teel else 392666749d0dSScott Teel *nlocals = -1; 392766749d0dSScott Teel return rc; 392866749d0dSScott Teel } 392966749d0dSScott Teel 393066749d0dSScott Teel 39318aa60681SDon Brace static void hpsa_update_scsi_devices(struct ctlr_info *h) 3932edd16368SStephen M. Cameron { 3933edd16368SStephen M. Cameron /* the idea here is we could get notified 3934edd16368SStephen M. Cameron * that some devices have changed, so we do a report 3935edd16368SStephen M. Cameron * physical luns and report logical luns cmd, and adjust 3936edd16368SStephen M. Cameron * our list of devices accordingly. 3937edd16368SStephen M. Cameron * 3938edd16368SStephen M. Cameron * The scsi3addr's of devices won't change so long as the 3939edd16368SStephen M. Cameron * adapter is not reset. That means we can rescan and 3940edd16368SStephen M. Cameron * tell which devices we already know about, vs. new 3941edd16368SStephen M. Cameron * devices, vs. disappearing devices. 3942edd16368SStephen M. Cameron */ 3943a93aa1feSMatt Gates struct ReportExtendedLUNdata *physdev_list = NULL; 3944edd16368SStephen M. Cameron struct ReportLUNdata *logdev_list = NULL; 394503383736SDon Brace struct bmic_identify_physical_device *id_phys = NULL; 394666749d0dSScott Teel struct bmic_identify_controller *id_ctlr = NULL; 394701a02ffcSStephen M. Cameron u32 nphysicals = 0; 394801a02ffcSStephen M. Cameron u32 nlogicals = 0; 394966749d0dSScott Teel u32 nlocal_logicals = 0; 395001a02ffcSStephen M. Cameron u32 ndev_allocated = 0; 3951edd16368SStephen M. Cameron struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice; 3952edd16368SStephen M. Cameron int ncurrent = 0; 39534f4eb9f1SScott Teel int i, n_ext_target_devs, ndevs_to_allocate; 3954339b2b14SStephen M. Cameron int raid_ctlr_position; 395504fa2f44SKevin Barnett bool physical_device; 3956aca4a520SScott Teel DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS); 3957edd16368SStephen M. Cameron 3958cfe5badcSScott Teel currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL); 395992084715SStephen M. Cameron physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL); 396092084715SStephen M. Cameron logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL); 3961edd16368SStephen M. Cameron tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL); 396203383736SDon Brace id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 396366749d0dSScott Teel id_ctlr = kzalloc(sizeof(*id_ctlr), GFP_KERNEL); 3964edd16368SStephen M. Cameron 396503383736SDon Brace if (!currentsd || !physdev_list || !logdev_list || 396666749d0dSScott Teel !tmpdevice || !id_phys || !id_ctlr) { 3967edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "out of memory\n"); 3968edd16368SStephen M. Cameron goto out; 3969edd16368SStephen M. Cameron } 3970edd16368SStephen M. Cameron memset(lunzerobits, 0, sizeof(lunzerobits)); 3971edd16368SStephen M. Cameron 3972853633e8SDon Brace h->drv_req_rescan = 0; /* cancel scheduled rescan - we're doing it. */ 3973853633e8SDon Brace 397403383736SDon Brace if (hpsa_gather_lun_info(h, physdev_list, &nphysicals, 3975853633e8SDon Brace logdev_list, &nlogicals)) { 3976853633e8SDon Brace h->drv_req_rescan = 1; 3977edd16368SStephen M. Cameron goto out; 3978853633e8SDon Brace } 3979edd16368SStephen M. Cameron 398066749d0dSScott Teel /* Set number of local logicals (non PTRAID) */ 398166749d0dSScott Teel if (hpsa_set_local_logical_count(h, id_ctlr, &nlocal_logicals)) { 398266749d0dSScott Teel dev_warn(&h->pdev->dev, 398366749d0dSScott Teel "%s: Can't determine number of local logical devices.\n", 398466749d0dSScott Teel __func__); 398566749d0dSScott Teel } 398666749d0dSScott Teel 3987aca4a520SScott Teel /* We might see up to the maximum number of logical and physical disks 3988aca4a520SScott Teel * plus external target devices, and a device for the local RAID 3989aca4a520SScott Teel * controller. 3990edd16368SStephen M. Cameron */ 3991aca4a520SScott Teel ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1; 3992edd16368SStephen M. Cameron 3993edd16368SStephen M. Cameron /* Allocate the per device structures */ 3994edd16368SStephen M. Cameron for (i = 0; i < ndevs_to_allocate; i++) { 3995b7ec021fSScott Teel if (i >= HPSA_MAX_DEVICES) { 3996b7ec021fSScott Teel dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded." 3997b7ec021fSScott Teel " %d devices ignored.\n", HPSA_MAX_DEVICES, 3998b7ec021fSScott Teel ndevs_to_allocate - HPSA_MAX_DEVICES); 3999b7ec021fSScott Teel break; 4000b7ec021fSScott Teel } 4001b7ec021fSScott Teel 4002edd16368SStephen M. Cameron currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL); 4003edd16368SStephen M. Cameron if (!currentsd[i]) { 4004edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "out of memory at %s:%d\n", 4005edd16368SStephen M. Cameron __FILE__, __LINE__); 4006853633e8SDon Brace h->drv_req_rescan = 1; 4007edd16368SStephen M. Cameron goto out; 4008edd16368SStephen M. Cameron } 4009edd16368SStephen M. Cameron ndev_allocated++; 4010edd16368SStephen M. Cameron } 4011edd16368SStephen M. Cameron 40128645291bSStephen M. Cameron if (is_scsi_rev_5(h)) 4013339b2b14SStephen M. Cameron raid_ctlr_position = 0; 4014339b2b14SStephen M. Cameron else 4015339b2b14SStephen M. Cameron raid_ctlr_position = nphysicals + nlogicals; 4016339b2b14SStephen M. Cameron 4017edd16368SStephen M. Cameron /* adjust our table of devices */ 40184f4eb9f1SScott Teel n_ext_target_devs = 0; 4019edd16368SStephen M. Cameron for (i = 0; i < nphysicals + nlogicals + 1; i++) { 40200b0e1d6cSStephen M. Cameron u8 *lunaddrbytes, is_OBDR = 0; 4021683fc444SDon Brace int rc = 0; 4022f2039b03SDon Brace int phys_dev_index = i - (raid_ctlr_position == 0); 4023edd16368SStephen M. Cameron 402404fa2f44SKevin Barnett physical_device = i < nphysicals + (raid_ctlr_position == 0); 402504fa2f44SKevin Barnett 4026edd16368SStephen M. Cameron /* Figure out where the LUN ID info is coming from */ 4027339b2b14SStephen M. Cameron lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position, 4028339b2b14SStephen M. Cameron i, nphysicals, nlogicals, physdev_list, logdev_list); 402941ce4c35SStephen Cameron 403041ce4c35SStephen Cameron /* skip masked non-disk devices */ 403104fa2f44SKevin Barnett if (MASKED_DEVICE(lunaddrbytes) && physical_device && 403204fa2f44SKevin Barnett (physdev_list->LUN[phys_dev_index].device_flags & 0x01)) 4033edd16368SStephen M. Cameron continue; 4034edd16368SStephen M. Cameron 4035edd16368SStephen M. Cameron /* Get device type, vendor, model, device id */ 4036683fc444SDon Brace rc = hpsa_update_device_info(h, lunaddrbytes, tmpdevice, 4037683fc444SDon Brace &is_OBDR); 4038683fc444SDon Brace if (rc == -ENOMEM) { 4039683fc444SDon Brace dev_warn(&h->pdev->dev, 4040683fc444SDon Brace "Out of memory, rescan deferred.\n"); 4041853633e8SDon Brace h->drv_req_rescan = 1; 4042683fc444SDon Brace goto out; 4043853633e8SDon Brace } 4044683fc444SDon Brace if (rc) { 4045683fc444SDon Brace dev_warn(&h->pdev->dev, 4046683fc444SDon Brace "Inquiry failed, skipping device.\n"); 4047683fc444SDon Brace continue; 4048683fc444SDon Brace } 4049683fc444SDon Brace 405066749d0dSScott Teel /* Determine if this is a lun from an external target array */ 405166749d0dSScott Teel tmpdevice->external = 405266749d0dSScott Teel figure_external_status(h, raid_ctlr_position, i, 405366749d0dSScott Teel nphysicals, nlocal_logicals); 405466749d0dSScott Teel 40551f310bdeSStephen M. Cameron figure_bus_target_lun(h, lunaddrbytes, tmpdevice); 40569b5c48c2SStephen Cameron hpsa_update_device_supports_aborts(h, tmpdevice, lunaddrbytes); 4057edd16368SStephen M. Cameron this_device = currentsd[ncurrent]; 4058edd16368SStephen M. Cameron 405934592254SScott Teel /* Turn on discovery_polling if there are ext target devices. 406034592254SScott Teel * Event-based change notification is unreliable for those. 406134592254SScott Teel */ 406234592254SScott Teel if (!h->discovery_polling) { 406334592254SScott Teel if (tmpdevice->external) { 406434592254SScott Teel h->discovery_polling = 1; 406534592254SScott Teel dev_info(&h->pdev->dev, 406634592254SScott Teel "External target, activate discovery polling.\n"); 406734592254SScott Teel } 406834592254SScott Teel } 406934592254SScott Teel 407034592254SScott Teel 4071edd16368SStephen M. Cameron *this_device = *tmpdevice; 407204fa2f44SKevin Barnett this_device->physical_device = physical_device; 4073edd16368SStephen M. Cameron 407404fa2f44SKevin Barnett /* 407504fa2f44SKevin Barnett * Expose all devices except for physical devices that 407604fa2f44SKevin Barnett * are masked. 407704fa2f44SKevin Barnett */ 407804fa2f44SKevin Barnett if (MASKED_DEVICE(lunaddrbytes) && this_device->physical_device) 40792a168208SKevin Barnett this_device->expose_device = 0; 40802a168208SKevin Barnett else 40812a168208SKevin Barnett this_device->expose_device = 1; 408241ce4c35SStephen Cameron 4083*d04e62b9SKevin Barnett 4084*d04e62b9SKevin Barnett /* 4085*d04e62b9SKevin Barnett * Get the SAS address for physical devices that are exposed. 4086*d04e62b9SKevin Barnett */ 4087*d04e62b9SKevin Barnett if (this_device->physical_device && this_device->expose_device) 4088*d04e62b9SKevin Barnett hpsa_get_sas_address(h, lunaddrbytes, this_device); 4089*d04e62b9SKevin Barnett 4090edd16368SStephen M. Cameron switch (this_device->devtype) { 40910b0e1d6cSStephen M. Cameron case TYPE_ROM: 4092edd16368SStephen M. Cameron /* We don't *really* support actual CD-ROM devices, 4093edd16368SStephen M. Cameron * just "One Button Disaster Recovery" tape drive 4094edd16368SStephen M. Cameron * which temporarily pretends to be a CD-ROM drive. 4095edd16368SStephen M. Cameron * So we check that the device is really an OBDR tape 4096edd16368SStephen M. Cameron * device by checking for "$DR-10" in bytes 43-48 of 4097edd16368SStephen M. Cameron * the inquiry data. 4098edd16368SStephen M. Cameron */ 40990b0e1d6cSStephen M. Cameron if (is_OBDR) 4100edd16368SStephen M. Cameron ncurrent++; 4101edd16368SStephen M. Cameron break; 4102edd16368SStephen M. Cameron case TYPE_DISK: 410304fa2f44SKevin Barnett if (this_device->physical_device) { 4104b9092b79SKevin Barnett /* The disk is in HBA mode. */ 4105b9092b79SKevin Barnett /* Never use RAID mapper in HBA mode. */ 4106ecf418d1SJoe Handzik this_device->offload_enabled = 0; 410703383736SDon Brace hpsa_get_ioaccel_drive_info(h, this_device, 4108f2039b03SDon Brace physdev_list, phys_dev_index, id_phys); 4109f2039b03SDon Brace hpsa_get_path_info(this_device, 4110f2039b03SDon Brace physdev_list, phys_dev_index, id_phys); 4111b9092b79SKevin Barnett } 4112edd16368SStephen M. Cameron ncurrent++; 4113edd16368SStephen M. Cameron break; 4114edd16368SStephen M. Cameron case TYPE_TAPE: 4115edd16368SStephen M. Cameron case TYPE_MEDIUM_CHANGER: 411641ce4c35SStephen Cameron case TYPE_ENCLOSURE: 411741ce4c35SStephen Cameron ncurrent++; 411841ce4c35SStephen Cameron break; 4119edd16368SStephen M. Cameron case TYPE_RAID: 4120edd16368SStephen M. Cameron /* Only present the Smartarray HBA as a RAID controller. 4121edd16368SStephen M. Cameron * If it's a RAID controller other than the HBA itself 4122edd16368SStephen M. Cameron * (an external RAID controller, MSA500 or similar) 4123edd16368SStephen M. Cameron * don't present it. 4124edd16368SStephen M. Cameron */ 4125edd16368SStephen M. Cameron if (!is_hba_lunid(lunaddrbytes)) 4126edd16368SStephen M. Cameron break; 4127edd16368SStephen M. Cameron ncurrent++; 4128edd16368SStephen M. Cameron break; 4129edd16368SStephen M. Cameron default: 4130edd16368SStephen M. Cameron break; 4131edd16368SStephen M. Cameron } 4132cfe5badcSScott Teel if (ncurrent >= HPSA_MAX_DEVICES) 4133edd16368SStephen M. Cameron break; 4134edd16368SStephen M. Cameron } 4135*d04e62b9SKevin Barnett 4136*d04e62b9SKevin Barnett if (h->sas_host == NULL) { 4137*d04e62b9SKevin Barnett int rc = 0; 4138*d04e62b9SKevin Barnett 4139*d04e62b9SKevin Barnett rc = hpsa_add_sas_host(h); 4140*d04e62b9SKevin Barnett if (rc) { 4141*d04e62b9SKevin Barnett dev_warn(&h->pdev->dev, 4142*d04e62b9SKevin Barnett "Could not add sas host %d\n", rc); 4143*d04e62b9SKevin Barnett goto out; 4144*d04e62b9SKevin Barnett } 4145*d04e62b9SKevin Barnett } 4146*d04e62b9SKevin Barnett 41478aa60681SDon Brace adjust_hpsa_scsi_table(h, currentsd, ncurrent); 4148edd16368SStephen M. Cameron out: 4149edd16368SStephen M. Cameron kfree(tmpdevice); 4150edd16368SStephen M. Cameron for (i = 0; i < ndev_allocated; i++) 4151edd16368SStephen M. Cameron kfree(currentsd[i]); 4152edd16368SStephen M. Cameron kfree(currentsd); 4153edd16368SStephen M. Cameron kfree(physdev_list); 4154edd16368SStephen M. Cameron kfree(logdev_list); 415566749d0dSScott Teel kfree(id_ctlr); 415603383736SDon Brace kfree(id_phys); 4157edd16368SStephen M. Cameron } 4158edd16368SStephen M. Cameron 4159ec5cbf04SWebb Scales static void hpsa_set_sg_descriptor(struct SGDescriptor *desc, 4160ec5cbf04SWebb Scales struct scatterlist *sg) 4161ec5cbf04SWebb Scales { 4162ec5cbf04SWebb Scales u64 addr64 = (u64) sg_dma_address(sg); 4163ec5cbf04SWebb Scales unsigned int len = sg_dma_len(sg); 4164ec5cbf04SWebb Scales 4165ec5cbf04SWebb Scales desc->Addr = cpu_to_le64(addr64); 4166ec5cbf04SWebb Scales desc->Len = cpu_to_le32(len); 4167ec5cbf04SWebb Scales desc->Ext = 0; 4168ec5cbf04SWebb Scales } 4169ec5cbf04SWebb Scales 4170c7ee65b3SWebb Scales /* 4171c7ee65b3SWebb Scales * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci 4172edd16368SStephen M. Cameron * dma mapping and fills in the scatter gather entries of the 4173edd16368SStephen M. Cameron * hpsa command, cp. 4174edd16368SStephen M. Cameron */ 417533a2ffceSStephen M. Cameron static int hpsa_scatter_gather(struct ctlr_info *h, 4176edd16368SStephen M. Cameron struct CommandList *cp, 4177edd16368SStephen M. Cameron struct scsi_cmnd *cmd) 4178edd16368SStephen M. Cameron { 4179edd16368SStephen M. Cameron struct scatterlist *sg; 4180b3a7ba7cSWebb Scales int use_sg, i, sg_limit, chained, last_sg; 418133a2ffceSStephen M. Cameron struct SGDescriptor *curr_sg; 4182edd16368SStephen M. Cameron 418333a2ffceSStephen M. Cameron BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 4184edd16368SStephen M. Cameron 4185edd16368SStephen M. Cameron use_sg = scsi_dma_map(cmd); 4186edd16368SStephen M. Cameron if (use_sg < 0) 4187edd16368SStephen M. Cameron return use_sg; 4188edd16368SStephen M. Cameron 4189edd16368SStephen M. Cameron if (!use_sg) 4190edd16368SStephen M. Cameron goto sglist_finished; 4191edd16368SStephen M. Cameron 4192b3a7ba7cSWebb Scales /* 4193b3a7ba7cSWebb Scales * If the number of entries is greater than the max for a single list, 4194b3a7ba7cSWebb Scales * then we have a chained list; we will set up all but one entry in the 4195b3a7ba7cSWebb Scales * first list (the last entry is saved for link information); 4196b3a7ba7cSWebb Scales * otherwise, we don't have a chained list and we'll set up at each of 4197b3a7ba7cSWebb Scales * the entries in the one list. 4198b3a7ba7cSWebb Scales */ 419933a2ffceSStephen M. Cameron curr_sg = cp->SG; 4200b3a7ba7cSWebb Scales chained = use_sg > h->max_cmd_sg_entries; 4201b3a7ba7cSWebb Scales sg_limit = chained ? h->max_cmd_sg_entries - 1 : use_sg; 4202b3a7ba7cSWebb Scales last_sg = scsi_sg_count(cmd) - 1; 4203b3a7ba7cSWebb Scales scsi_for_each_sg(cmd, sg, sg_limit, i) { 4204ec5cbf04SWebb Scales hpsa_set_sg_descriptor(curr_sg, sg); 420533a2ffceSStephen M. Cameron curr_sg++; 420633a2ffceSStephen M. Cameron } 4207ec5cbf04SWebb Scales 4208b3a7ba7cSWebb Scales if (chained) { 4209b3a7ba7cSWebb Scales /* 4210b3a7ba7cSWebb Scales * Continue with the chained list. Set curr_sg to the chained 4211b3a7ba7cSWebb Scales * list. Modify the limit to the total count less the entries 4212b3a7ba7cSWebb Scales * we've already set up. Resume the scan at the list entry 4213b3a7ba7cSWebb Scales * where the previous loop left off. 4214b3a7ba7cSWebb Scales */ 4215b3a7ba7cSWebb Scales curr_sg = h->cmd_sg_list[cp->cmdindex]; 4216b3a7ba7cSWebb Scales sg_limit = use_sg - sg_limit; 4217b3a7ba7cSWebb Scales for_each_sg(sg, sg, sg_limit, i) { 4218b3a7ba7cSWebb Scales hpsa_set_sg_descriptor(curr_sg, sg); 4219b3a7ba7cSWebb Scales curr_sg++; 4220b3a7ba7cSWebb Scales } 4221b3a7ba7cSWebb Scales } 4222b3a7ba7cSWebb Scales 4223ec5cbf04SWebb Scales /* Back the pointer up to the last entry and mark it as "last". */ 4224b3a7ba7cSWebb Scales (curr_sg - 1)->Ext = cpu_to_le32(HPSA_SG_LAST); 422533a2ffceSStephen M. Cameron 422633a2ffceSStephen M. Cameron if (use_sg + chained > h->maxSG) 422733a2ffceSStephen M. Cameron h->maxSG = use_sg + chained; 422833a2ffceSStephen M. Cameron 422933a2ffceSStephen M. Cameron if (chained) { 423033a2ffceSStephen M. Cameron cp->Header.SGList = h->max_cmd_sg_entries; 423150a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(use_sg + 1); 4232e2bea6dfSStephen M. Cameron if (hpsa_map_sg_chain_block(h, cp)) { 4233e2bea6dfSStephen M. Cameron scsi_dma_unmap(cmd); 4234e2bea6dfSStephen M. Cameron return -1; 4235e2bea6dfSStephen M. Cameron } 423633a2ffceSStephen M. Cameron return 0; 4237edd16368SStephen M. Cameron } 4238edd16368SStephen M. Cameron 4239edd16368SStephen M. Cameron sglist_finished: 4240edd16368SStephen M. Cameron 424101a02ffcSStephen M. Cameron cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */ 4242c7ee65b3SWebb Scales cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */ 4243edd16368SStephen M. Cameron return 0; 4244edd16368SStephen M. Cameron } 4245edd16368SStephen M. Cameron 4246283b4a9bSStephen M. Cameron #define IO_ACCEL_INELIGIBLE (1) 4247283b4a9bSStephen M. Cameron static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len) 4248283b4a9bSStephen M. Cameron { 4249283b4a9bSStephen M. Cameron int is_write = 0; 4250283b4a9bSStephen M. Cameron u32 block; 4251283b4a9bSStephen M. Cameron u32 block_cnt; 4252283b4a9bSStephen M. Cameron 4253283b4a9bSStephen M. Cameron /* Perform some CDB fixups if needed using 10 byte reads/writes only */ 4254283b4a9bSStephen M. Cameron switch (cdb[0]) { 4255283b4a9bSStephen M. Cameron case WRITE_6: 4256283b4a9bSStephen M. Cameron case WRITE_12: 4257283b4a9bSStephen M. Cameron is_write = 1; 4258283b4a9bSStephen M. Cameron case READ_6: 4259283b4a9bSStephen M. Cameron case READ_12: 4260283b4a9bSStephen M. Cameron if (*cdb_len == 6) { 4261c8a6c9a6SDon Brace block = get_unaligned_be16(&cdb[2]); 4262283b4a9bSStephen M. Cameron block_cnt = cdb[4]; 4263c8a6c9a6SDon Brace if (block_cnt == 0) 4264c8a6c9a6SDon Brace block_cnt = 256; 4265283b4a9bSStephen M. Cameron } else { 4266283b4a9bSStephen M. Cameron BUG_ON(*cdb_len != 12); 4267c8a6c9a6SDon Brace block = get_unaligned_be32(&cdb[2]); 4268c8a6c9a6SDon Brace block_cnt = get_unaligned_be32(&cdb[6]); 4269283b4a9bSStephen M. Cameron } 4270283b4a9bSStephen M. Cameron if (block_cnt > 0xffff) 4271283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 4272283b4a9bSStephen M. Cameron 4273283b4a9bSStephen M. Cameron cdb[0] = is_write ? WRITE_10 : READ_10; 4274283b4a9bSStephen M. Cameron cdb[1] = 0; 4275283b4a9bSStephen M. Cameron cdb[2] = (u8) (block >> 24); 4276283b4a9bSStephen M. Cameron cdb[3] = (u8) (block >> 16); 4277283b4a9bSStephen M. Cameron cdb[4] = (u8) (block >> 8); 4278283b4a9bSStephen M. Cameron cdb[5] = (u8) (block); 4279283b4a9bSStephen M. Cameron cdb[6] = 0; 4280283b4a9bSStephen M. Cameron cdb[7] = (u8) (block_cnt >> 8); 4281283b4a9bSStephen M. Cameron cdb[8] = (u8) (block_cnt); 4282283b4a9bSStephen M. Cameron cdb[9] = 0; 4283283b4a9bSStephen M. Cameron *cdb_len = 10; 4284283b4a9bSStephen M. Cameron break; 4285283b4a9bSStephen M. Cameron } 4286283b4a9bSStephen M. Cameron return 0; 4287283b4a9bSStephen M. Cameron } 4288283b4a9bSStephen M. Cameron 4289c349775eSScott Teel static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h, 4290283b4a9bSStephen M. Cameron struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 429103383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4292e1f7de0cSMatt Gates { 4293e1f7de0cSMatt Gates struct scsi_cmnd *cmd = c->scsi_cmd; 4294e1f7de0cSMatt Gates struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex]; 4295e1f7de0cSMatt Gates unsigned int len; 4296e1f7de0cSMatt Gates unsigned int total_len = 0; 4297e1f7de0cSMatt Gates struct scatterlist *sg; 4298e1f7de0cSMatt Gates u64 addr64; 4299e1f7de0cSMatt Gates int use_sg, i; 4300e1f7de0cSMatt Gates struct SGDescriptor *curr_sg; 4301e1f7de0cSMatt Gates u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE; 4302e1f7de0cSMatt Gates 4303283b4a9bSStephen M. Cameron /* TODO: implement chaining support */ 430403383736SDon Brace if (scsi_sg_count(cmd) > h->ioaccel_maxsg) { 430503383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4306283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 430703383736SDon Brace } 4308283b4a9bSStephen M. Cameron 4309e1f7de0cSMatt Gates BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX); 4310e1f7de0cSMatt Gates 431103383736SDon Brace if (fixup_ioaccel_cdb(cdb, &cdb_len)) { 431203383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4313283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 431403383736SDon Brace } 4315283b4a9bSStephen M. Cameron 4316e1f7de0cSMatt Gates c->cmd_type = CMD_IOACCEL1; 4317e1f7de0cSMatt Gates 4318e1f7de0cSMatt Gates /* Adjust the DMA address to point to the accelerated command buffer */ 4319e1f7de0cSMatt Gates c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle + 4320e1f7de0cSMatt Gates (c->cmdindex * sizeof(*cp)); 4321e1f7de0cSMatt Gates BUG_ON(c->busaddr & 0x0000007F); 4322e1f7de0cSMatt Gates 4323e1f7de0cSMatt Gates use_sg = scsi_dma_map(cmd); 432403383736SDon Brace if (use_sg < 0) { 432503383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4326e1f7de0cSMatt Gates return use_sg; 432703383736SDon Brace } 4328e1f7de0cSMatt Gates 4329e1f7de0cSMatt Gates if (use_sg) { 4330e1f7de0cSMatt Gates curr_sg = cp->SG; 4331e1f7de0cSMatt Gates scsi_for_each_sg(cmd, sg, use_sg, i) { 4332e1f7de0cSMatt Gates addr64 = (u64) sg_dma_address(sg); 4333e1f7de0cSMatt Gates len = sg_dma_len(sg); 4334e1f7de0cSMatt Gates total_len += len; 433550a0decfSStephen M. Cameron curr_sg->Addr = cpu_to_le64(addr64); 433650a0decfSStephen M. Cameron curr_sg->Len = cpu_to_le32(len); 433750a0decfSStephen M. Cameron curr_sg->Ext = cpu_to_le32(0); 4338e1f7de0cSMatt Gates curr_sg++; 4339e1f7de0cSMatt Gates } 434050a0decfSStephen M. Cameron (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST); 4341e1f7de0cSMatt Gates 4342e1f7de0cSMatt Gates switch (cmd->sc_data_direction) { 4343e1f7de0cSMatt Gates case DMA_TO_DEVICE: 4344e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_DATA_OUT; 4345e1f7de0cSMatt Gates break; 4346e1f7de0cSMatt Gates case DMA_FROM_DEVICE: 4347e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_DATA_IN; 4348e1f7de0cSMatt Gates break; 4349e1f7de0cSMatt Gates case DMA_NONE: 4350e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_NODATAXFER; 4351e1f7de0cSMatt Gates break; 4352e1f7de0cSMatt Gates default: 4353e1f7de0cSMatt Gates dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4354e1f7de0cSMatt Gates cmd->sc_data_direction); 4355e1f7de0cSMatt Gates BUG(); 4356e1f7de0cSMatt Gates break; 4357e1f7de0cSMatt Gates } 4358e1f7de0cSMatt Gates } else { 4359e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_NODATAXFER; 4360e1f7de0cSMatt Gates } 4361e1f7de0cSMatt Gates 4362c349775eSScott Teel c->Header.SGList = use_sg; 4363e1f7de0cSMatt Gates /* Fill out the command structure to submit */ 43642b08b3e9SDon Brace cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF); 43652b08b3e9SDon Brace cp->transfer_len = cpu_to_le32(total_len); 43662b08b3e9SDon Brace cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ | 43672b08b3e9SDon Brace (cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK)); 43682b08b3e9SDon Brace cp->control = cpu_to_le32(control); 4369283b4a9bSStephen M. Cameron memcpy(cp->CDB, cdb, cdb_len); 4370283b4a9bSStephen M. Cameron memcpy(cp->CISS_LUN, scsi3addr, 8); 4371c349775eSScott Teel /* Tag was already set at init time. */ 4372e1f7de0cSMatt Gates enqueue_cmd_and_start_io(h, c); 4373e1f7de0cSMatt Gates return 0; 4374e1f7de0cSMatt Gates } 4375edd16368SStephen M. Cameron 4376283b4a9bSStephen M. Cameron /* 4377283b4a9bSStephen M. Cameron * Queue a command directly to a device behind the controller using the 4378283b4a9bSStephen M. Cameron * I/O accelerator path. 4379283b4a9bSStephen M. Cameron */ 4380283b4a9bSStephen M. Cameron static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h, 4381283b4a9bSStephen M. Cameron struct CommandList *c) 4382283b4a9bSStephen M. Cameron { 4383283b4a9bSStephen M. Cameron struct scsi_cmnd *cmd = c->scsi_cmd; 4384283b4a9bSStephen M. Cameron struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4385283b4a9bSStephen M. Cameron 438603383736SDon Brace c->phys_disk = dev; 438703383736SDon Brace 4388283b4a9bSStephen M. Cameron return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle, 438903383736SDon Brace cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev); 4390283b4a9bSStephen M. Cameron } 4391283b4a9bSStephen M. Cameron 4392dd0e19f3SScott Teel /* 4393dd0e19f3SScott Teel * Set encryption parameters for the ioaccel2 request 4394dd0e19f3SScott Teel */ 4395dd0e19f3SScott Teel static void set_encrypt_ioaccel2(struct ctlr_info *h, 4396dd0e19f3SScott Teel struct CommandList *c, struct io_accel2_cmd *cp) 4397dd0e19f3SScott Teel { 4398dd0e19f3SScott Teel struct scsi_cmnd *cmd = c->scsi_cmd; 4399dd0e19f3SScott Teel struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4400dd0e19f3SScott Teel struct raid_map_data *map = &dev->raid_map; 4401dd0e19f3SScott Teel u64 first_block; 4402dd0e19f3SScott Teel 4403dd0e19f3SScott Teel /* Are we doing encryption on this device */ 44042b08b3e9SDon Brace if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON)) 4405dd0e19f3SScott Teel return; 4406dd0e19f3SScott Teel /* Set the data encryption key index. */ 4407dd0e19f3SScott Teel cp->dekindex = map->dekindex; 4408dd0e19f3SScott Teel 4409dd0e19f3SScott Teel /* Set the encryption enable flag, encoded into direction field. */ 4410dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK; 4411dd0e19f3SScott Teel 4412dd0e19f3SScott Teel /* Set encryption tweak values based on logical block address 4413dd0e19f3SScott Teel * If block size is 512, tweak value is LBA. 4414dd0e19f3SScott Teel * For other block sizes, tweak is (LBA * block size)/ 512) 4415dd0e19f3SScott Teel */ 4416dd0e19f3SScott Teel switch (cmd->cmnd[0]) { 4417dd0e19f3SScott Teel /* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */ 4418dd0e19f3SScott Teel case WRITE_6: 4419dd0e19f3SScott Teel case READ_6: 44202b08b3e9SDon Brace first_block = get_unaligned_be16(&cmd->cmnd[2]); 4421dd0e19f3SScott Teel break; 4422dd0e19f3SScott Teel case WRITE_10: 4423dd0e19f3SScott Teel case READ_10: 4424dd0e19f3SScott Teel /* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */ 4425dd0e19f3SScott Teel case WRITE_12: 4426dd0e19f3SScott Teel case READ_12: 44272b08b3e9SDon Brace first_block = get_unaligned_be32(&cmd->cmnd[2]); 4428dd0e19f3SScott Teel break; 4429dd0e19f3SScott Teel case WRITE_16: 4430dd0e19f3SScott Teel case READ_16: 44312b08b3e9SDon Brace first_block = get_unaligned_be64(&cmd->cmnd[2]); 4432dd0e19f3SScott Teel break; 4433dd0e19f3SScott Teel default: 4434dd0e19f3SScott Teel dev_err(&h->pdev->dev, 44352b08b3e9SDon Brace "ERROR: %s: size (0x%x) not supported for encryption\n", 44362b08b3e9SDon Brace __func__, cmd->cmnd[0]); 4437dd0e19f3SScott Teel BUG(); 4438dd0e19f3SScott Teel break; 4439dd0e19f3SScott Teel } 44402b08b3e9SDon Brace 44412b08b3e9SDon Brace if (le32_to_cpu(map->volume_blk_size) != 512) 44422b08b3e9SDon Brace first_block = first_block * 44432b08b3e9SDon Brace le32_to_cpu(map->volume_blk_size)/512; 44442b08b3e9SDon Brace 44452b08b3e9SDon Brace cp->tweak_lower = cpu_to_le32(first_block); 44462b08b3e9SDon Brace cp->tweak_upper = cpu_to_le32(first_block >> 32); 4447dd0e19f3SScott Teel } 4448dd0e19f3SScott Teel 4449c349775eSScott Teel static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h, 4450c349775eSScott Teel struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 445103383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4452c349775eSScott Teel { 4453c349775eSScott Teel struct scsi_cmnd *cmd = c->scsi_cmd; 4454c349775eSScott Teel struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex]; 4455c349775eSScott Teel struct ioaccel2_sg_element *curr_sg; 4456c349775eSScott Teel int use_sg, i; 4457c349775eSScott Teel struct scatterlist *sg; 4458c349775eSScott Teel u64 addr64; 4459c349775eSScott Teel u32 len; 4460c349775eSScott Teel u32 total_len = 0; 4461c349775eSScott Teel 4462d9a729f3SWebb Scales BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 4463c349775eSScott Teel 446403383736SDon Brace if (fixup_ioaccel_cdb(cdb, &cdb_len)) { 446503383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4466c349775eSScott Teel return IO_ACCEL_INELIGIBLE; 446703383736SDon Brace } 446803383736SDon Brace 4469c349775eSScott Teel c->cmd_type = CMD_IOACCEL2; 4470c349775eSScott Teel /* Adjust the DMA address to point to the accelerated command buffer */ 4471c349775eSScott Teel c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle + 4472c349775eSScott Teel (c->cmdindex * sizeof(*cp)); 4473c349775eSScott Teel BUG_ON(c->busaddr & 0x0000007F); 4474c349775eSScott Teel 4475c349775eSScott Teel memset(cp, 0, sizeof(*cp)); 4476c349775eSScott Teel cp->IU_type = IOACCEL2_IU_TYPE; 4477c349775eSScott Teel 4478c349775eSScott Teel use_sg = scsi_dma_map(cmd); 447903383736SDon Brace if (use_sg < 0) { 448003383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4481c349775eSScott Teel return use_sg; 448203383736SDon Brace } 4483c349775eSScott Teel 4484c349775eSScott Teel if (use_sg) { 4485c349775eSScott Teel curr_sg = cp->sg; 4486d9a729f3SWebb Scales if (use_sg > h->ioaccel_maxsg) { 4487d9a729f3SWebb Scales addr64 = le64_to_cpu( 4488d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list[c->cmdindex]->address); 4489d9a729f3SWebb Scales curr_sg->address = cpu_to_le64(addr64); 4490d9a729f3SWebb Scales curr_sg->length = 0; 4491d9a729f3SWebb Scales curr_sg->reserved[0] = 0; 4492d9a729f3SWebb Scales curr_sg->reserved[1] = 0; 4493d9a729f3SWebb Scales curr_sg->reserved[2] = 0; 4494d9a729f3SWebb Scales curr_sg->chain_indicator = 0x80; 4495d9a729f3SWebb Scales 4496d9a729f3SWebb Scales curr_sg = h->ioaccel2_cmd_sg_list[c->cmdindex]; 4497d9a729f3SWebb Scales } 4498c349775eSScott Teel scsi_for_each_sg(cmd, sg, use_sg, i) { 4499c349775eSScott Teel addr64 = (u64) sg_dma_address(sg); 4500c349775eSScott Teel len = sg_dma_len(sg); 4501c349775eSScott Teel total_len += len; 4502c349775eSScott Teel curr_sg->address = cpu_to_le64(addr64); 4503c349775eSScott Teel curr_sg->length = cpu_to_le32(len); 4504c349775eSScott Teel curr_sg->reserved[0] = 0; 4505c349775eSScott Teel curr_sg->reserved[1] = 0; 4506c349775eSScott Teel curr_sg->reserved[2] = 0; 4507c349775eSScott Teel curr_sg->chain_indicator = 0; 4508c349775eSScott Teel curr_sg++; 4509c349775eSScott Teel } 4510c349775eSScott Teel 4511c349775eSScott Teel switch (cmd->sc_data_direction) { 4512c349775eSScott Teel case DMA_TO_DEVICE: 4513dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4514dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_DATA_OUT; 4515c349775eSScott Teel break; 4516c349775eSScott Teel case DMA_FROM_DEVICE: 4517dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4518dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_DATA_IN; 4519c349775eSScott Teel break; 4520c349775eSScott Teel case DMA_NONE: 4521dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4522dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_NO_DATA; 4523c349775eSScott Teel break; 4524c349775eSScott Teel default: 4525c349775eSScott Teel dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4526c349775eSScott Teel cmd->sc_data_direction); 4527c349775eSScott Teel BUG(); 4528c349775eSScott Teel break; 4529c349775eSScott Teel } 4530c349775eSScott Teel } else { 4531dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4532dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_NO_DATA; 4533c349775eSScott Teel } 4534dd0e19f3SScott Teel 4535dd0e19f3SScott Teel /* Set encryption parameters, if necessary */ 4536dd0e19f3SScott Teel set_encrypt_ioaccel2(h, c, cp); 4537dd0e19f3SScott Teel 45382b08b3e9SDon Brace cp->scsi_nexus = cpu_to_le32(ioaccel_handle); 4539f2405db8SDon Brace cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT); 4540c349775eSScott Teel memcpy(cp->cdb, cdb, sizeof(cp->cdb)); 4541c349775eSScott Teel 4542c349775eSScott Teel cp->data_len = cpu_to_le32(total_len); 4543c349775eSScott Teel cp->err_ptr = cpu_to_le64(c->busaddr + 4544c349775eSScott Teel offsetof(struct io_accel2_cmd, error_data)); 454550a0decfSStephen M. Cameron cp->err_len = cpu_to_le32(sizeof(cp->error_data)); 4546c349775eSScott Teel 4547d9a729f3SWebb Scales /* fill in sg elements */ 4548d9a729f3SWebb Scales if (use_sg > h->ioaccel_maxsg) { 4549d9a729f3SWebb Scales cp->sg_count = 1; 4550a736e9b6SDon Brace cp->sg[0].length = cpu_to_le32(use_sg * sizeof(cp->sg[0])); 4551d9a729f3SWebb Scales if (hpsa_map_ioaccel2_sg_chain_block(h, cp, c)) { 4552d9a729f3SWebb Scales atomic_dec(&phys_disk->ioaccel_cmds_out); 4553d9a729f3SWebb Scales scsi_dma_unmap(cmd); 4554d9a729f3SWebb Scales return -1; 4555d9a729f3SWebb Scales } 4556d9a729f3SWebb Scales } else 4557d9a729f3SWebb Scales cp->sg_count = (u8) use_sg; 4558d9a729f3SWebb Scales 4559c349775eSScott Teel enqueue_cmd_and_start_io(h, c); 4560c349775eSScott Teel return 0; 4561c349775eSScott Teel } 4562c349775eSScott Teel 4563c349775eSScott Teel /* 4564c349775eSScott Teel * Queue a command to the correct I/O accelerator path. 4565c349775eSScott Teel */ 4566c349775eSScott Teel static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h, 4567c349775eSScott Teel struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 456803383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4569c349775eSScott Teel { 457003383736SDon Brace /* Try to honor the device's queue depth */ 457103383736SDon Brace if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) > 457203383736SDon Brace phys_disk->queue_depth) { 457303383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 457403383736SDon Brace return IO_ACCEL_INELIGIBLE; 457503383736SDon Brace } 4576c349775eSScott Teel if (h->transMethod & CFGTBL_Trans_io_accel1) 4577c349775eSScott Teel return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle, 457803383736SDon Brace cdb, cdb_len, scsi3addr, 457903383736SDon Brace phys_disk); 4580c349775eSScott Teel else 4581c349775eSScott Teel return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle, 458203383736SDon Brace cdb, cdb_len, scsi3addr, 458303383736SDon Brace phys_disk); 4584c349775eSScott Teel } 4585c349775eSScott Teel 45866b80b18fSScott Teel static void raid_map_helper(struct raid_map_data *map, 45876b80b18fSScott Teel int offload_to_mirror, u32 *map_index, u32 *current_group) 45886b80b18fSScott Teel { 45896b80b18fSScott Teel if (offload_to_mirror == 0) { 45906b80b18fSScott Teel /* use physical disk in the first mirrored group. */ 45912b08b3e9SDon Brace *map_index %= le16_to_cpu(map->data_disks_per_row); 45926b80b18fSScott Teel return; 45936b80b18fSScott Teel } 45946b80b18fSScott Teel do { 45956b80b18fSScott Teel /* determine mirror group that *map_index indicates */ 45962b08b3e9SDon Brace *current_group = *map_index / 45972b08b3e9SDon Brace le16_to_cpu(map->data_disks_per_row); 45986b80b18fSScott Teel if (offload_to_mirror == *current_group) 45996b80b18fSScott Teel continue; 46002b08b3e9SDon Brace if (*current_group < le16_to_cpu(map->layout_map_count) - 1) { 46016b80b18fSScott Teel /* select map index from next group */ 46022b08b3e9SDon Brace *map_index += le16_to_cpu(map->data_disks_per_row); 46036b80b18fSScott Teel (*current_group)++; 46046b80b18fSScott Teel } else { 46056b80b18fSScott Teel /* select map index from first group */ 46062b08b3e9SDon Brace *map_index %= le16_to_cpu(map->data_disks_per_row); 46076b80b18fSScott Teel *current_group = 0; 46086b80b18fSScott Teel } 46096b80b18fSScott Teel } while (offload_to_mirror != *current_group); 46106b80b18fSScott Teel } 46116b80b18fSScott Teel 4612283b4a9bSStephen M. Cameron /* 4613283b4a9bSStephen M. Cameron * Attempt to perform offload RAID mapping for a logical volume I/O. 4614283b4a9bSStephen M. Cameron */ 4615283b4a9bSStephen M. Cameron static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h, 4616283b4a9bSStephen M. Cameron struct CommandList *c) 4617283b4a9bSStephen M. Cameron { 4618283b4a9bSStephen M. Cameron struct scsi_cmnd *cmd = c->scsi_cmd; 4619283b4a9bSStephen M. Cameron struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4620283b4a9bSStephen M. Cameron struct raid_map_data *map = &dev->raid_map; 4621283b4a9bSStephen M. Cameron struct raid_map_disk_data *dd = &map->data[0]; 4622283b4a9bSStephen M. Cameron int is_write = 0; 4623283b4a9bSStephen M. Cameron u32 map_index; 4624283b4a9bSStephen M. Cameron u64 first_block, last_block; 4625283b4a9bSStephen M. Cameron u32 block_cnt; 4626283b4a9bSStephen M. Cameron u32 blocks_per_row; 4627283b4a9bSStephen M. Cameron u64 first_row, last_row; 4628283b4a9bSStephen M. Cameron u32 first_row_offset, last_row_offset; 4629283b4a9bSStephen M. Cameron u32 first_column, last_column; 46306b80b18fSScott Teel u64 r0_first_row, r0_last_row; 46316b80b18fSScott Teel u32 r5or6_blocks_per_row; 46326b80b18fSScott Teel u64 r5or6_first_row, r5or6_last_row; 46336b80b18fSScott Teel u32 r5or6_first_row_offset, r5or6_last_row_offset; 46346b80b18fSScott Teel u32 r5or6_first_column, r5or6_last_column; 46356b80b18fSScott Teel u32 total_disks_per_row; 46366b80b18fSScott Teel u32 stripesize; 46376b80b18fSScott Teel u32 first_group, last_group, current_group; 4638283b4a9bSStephen M. Cameron u32 map_row; 4639283b4a9bSStephen M. Cameron u32 disk_handle; 4640283b4a9bSStephen M. Cameron u64 disk_block; 4641283b4a9bSStephen M. Cameron u32 disk_block_cnt; 4642283b4a9bSStephen M. Cameron u8 cdb[16]; 4643283b4a9bSStephen M. Cameron u8 cdb_len; 46442b08b3e9SDon Brace u16 strip_size; 4645283b4a9bSStephen M. Cameron #if BITS_PER_LONG == 32 4646283b4a9bSStephen M. Cameron u64 tmpdiv; 4647283b4a9bSStephen M. Cameron #endif 46486b80b18fSScott Teel int offload_to_mirror; 4649283b4a9bSStephen M. Cameron 4650283b4a9bSStephen M. Cameron /* check for valid opcode, get LBA and block count */ 4651283b4a9bSStephen M. Cameron switch (cmd->cmnd[0]) { 4652283b4a9bSStephen M. Cameron case WRITE_6: 4653283b4a9bSStephen M. Cameron is_write = 1; 4654283b4a9bSStephen M. Cameron case READ_6: 4655c8a6c9a6SDon Brace first_block = get_unaligned_be16(&cmd->cmnd[2]); 4656283b4a9bSStephen M. Cameron block_cnt = cmd->cmnd[4]; 46573fa89a04SStephen M. Cameron if (block_cnt == 0) 46583fa89a04SStephen M. Cameron block_cnt = 256; 4659283b4a9bSStephen M. Cameron break; 4660283b4a9bSStephen M. Cameron case WRITE_10: 4661283b4a9bSStephen M. Cameron is_write = 1; 4662283b4a9bSStephen M. Cameron case READ_10: 4663283b4a9bSStephen M. Cameron first_block = 4664283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[2]) << 24) | 4665283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[3]) << 16) | 4666283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[4]) << 8) | 4667283b4a9bSStephen M. Cameron cmd->cmnd[5]; 4668283b4a9bSStephen M. Cameron block_cnt = 4669283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[7]) << 8) | 4670283b4a9bSStephen M. Cameron cmd->cmnd[8]; 4671283b4a9bSStephen M. Cameron break; 4672283b4a9bSStephen M. Cameron case WRITE_12: 4673283b4a9bSStephen M. Cameron is_write = 1; 4674283b4a9bSStephen M. Cameron case READ_12: 4675283b4a9bSStephen M. Cameron first_block = 4676283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[2]) << 24) | 4677283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[3]) << 16) | 4678283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[4]) << 8) | 4679283b4a9bSStephen M. Cameron cmd->cmnd[5]; 4680283b4a9bSStephen M. Cameron block_cnt = 4681283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[6]) << 24) | 4682283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[7]) << 16) | 4683283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[8]) << 8) | 4684283b4a9bSStephen M. Cameron cmd->cmnd[9]; 4685283b4a9bSStephen M. Cameron break; 4686283b4a9bSStephen M. Cameron case WRITE_16: 4687283b4a9bSStephen M. Cameron is_write = 1; 4688283b4a9bSStephen M. Cameron case READ_16: 4689283b4a9bSStephen M. Cameron first_block = 4690283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[2]) << 56) | 4691283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[3]) << 48) | 4692283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[4]) << 40) | 4693283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[5]) << 32) | 4694283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[6]) << 24) | 4695283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[7]) << 16) | 4696283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[8]) << 8) | 4697283b4a9bSStephen M. Cameron cmd->cmnd[9]; 4698283b4a9bSStephen M. Cameron block_cnt = 4699283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[10]) << 24) | 4700283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[11]) << 16) | 4701283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[12]) << 8) | 4702283b4a9bSStephen M. Cameron cmd->cmnd[13]; 4703283b4a9bSStephen M. Cameron break; 4704283b4a9bSStephen M. Cameron default: 4705283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */ 4706283b4a9bSStephen M. Cameron } 4707283b4a9bSStephen M. Cameron last_block = first_block + block_cnt - 1; 4708283b4a9bSStephen M. Cameron 4709283b4a9bSStephen M. Cameron /* check for write to non-RAID-0 */ 4710283b4a9bSStephen M. Cameron if (is_write && dev->raid_level != 0) 4711283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 4712283b4a9bSStephen M. Cameron 4713283b4a9bSStephen M. Cameron /* check for invalid block or wraparound */ 47142b08b3e9SDon Brace if (last_block >= le64_to_cpu(map->volume_blk_cnt) || 47152b08b3e9SDon Brace last_block < first_block) 4716283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 4717283b4a9bSStephen M. Cameron 4718283b4a9bSStephen M. Cameron /* calculate stripe information for the request */ 47192b08b3e9SDon Brace blocks_per_row = le16_to_cpu(map->data_disks_per_row) * 47202b08b3e9SDon Brace le16_to_cpu(map->strip_size); 47212b08b3e9SDon Brace strip_size = le16_to_cpu(map->strip_size); 4722283b4a9bSStephen M. Cameron #if BITS_PER_LONG == 32 4723283b4a9bSStephen M. Cameron tmpdiv = first_block; 4724283b4a9bSStephen M. Cameron (void) do_div(tmpdiv, blocks_per_row); 4725283b4a9bSStephen M. Cameron first_row = tmpdiv; 4726283b4a9bSStephen M. Cameron tmpdiv = last_block; 4727283b4a9bSStephen M. Cameron (void) do_div(tmpdiv, blocks_per_row); 4728283b4a9bSStephen M. Cameron last_row = tmpdiv; 4729283b4a9bSStephen M. Cameron first_row_offset = (u32) (first_block - (first_row * blocks_per_row)); 4730283b4a9bSStephen M. Cameron last_row_offset = (u32) (last_block - (last_row * blocks_per_row)); 4731283b4a9bSStephen M. Cameron tmpdiv = first_row_offset; 47322b08b3e9SDon Brace (void) do_div(tmpdiv, strip_size); 4733283b4a9bSStephen M. Cameron first_column = tmpdiv; 4734283b4a9bSStephen M. Cameron tmpdiv = last_row_offset; 47352b08b3e9SDon Brace (void) do_div(tmpdiv, strip_size); 4736283b4a9bSStephen M. Cameron last_column = tmpdiv; 4737283b4a9bSStephen M. Cameron #else 4738283b4a9bSStephen M. Cameron first_row = first_block / blocks_per_row; 4739283b4a9bSStephen M. Cameron last_row = last_block / blocks_per_row; 4740283b4a9bSStephen M. Cameron first_row_offset = (u32) (first_block - (first_row * blocks_per_row)); 4741283b4a9bSStephen M. Cameron last_row_offset = (u32) (last_block - (last_row * blocks_per_row)); 47422b08b3e9SDon Brace first_column = first_row_offset / strip_size; 47432b08b3e9SDon Brace last_column = last_row_offset / strip_size; 4744283b4a9bSStephen M. Cameron #endif 4745283b4a9bSStephen M. Cameron 4746283b4a9bSStephen M. Cameron /* if this isn't a single row/column then give to the controller */ 4747283b4a9bSStephen M. Cameron if ((first_row != last_row) || (first_column != last_column)) 4748283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 4749283b4a9bSStephen M. Cameron 4750283b4a9bSStephen M. Cameron /* proceeding with driver mapping */ 47512b08b3e9SDon Brace total_disks_per_row = le16_to_cpu(map->data_disks_per_row) + 47522b08b3e9SDon Brace le16_to_cpu(map->metadata_disks_per_row); 4753283b4a9bSStephen M. Cameron map_row = ((u32)(first_row >> map->parity_rotation_shift)) % 47542b08b3e9SDon Brace le16_to_cpu(map->row_cnt); 47556b80b18fSScott Teel map_index = (map_row * total_disks_per_row) + first_column; 47566b80b18fSScott Teel 47576b80b18fSScott Teel switch (dev->raid_level) { 47586b80b18fSScott Teel case HPSA_RAID_0: 47596b80b18fSScott Teel break; /* nothing special to do */ 47606b80b18fSScott Teel case HPSA_RAID_1: 47616b80b18fSScott Teel /* Handles load balance across RAID 1 members. 47626b80b18fSScott Teel * (2-drive R1 and R10 with even # of drives.) 47636b80b18fSScott Teel * Appropriate for SSDs, not optimal for HDDs 4764283b4a9bSStephen M. Cameron */ 47652b08b3e9SDon Brace BUG_ON(le16_to_cpu(map->layout_map_count) != 2); 4766283b4a9bSStephen M. Cameron if (dev->offload_to_mirror) 47672b08b3e9SDon Brace map_index += le16_to_cpu(map->data_disks_per_row); 4768283b4a9bSStephen M. Cameron dev->offload_to_mirror = !dev->offload_to_mirror; 47696b80b18fSScott Teel break; 47706b80b18fSScott Teel case HPSA_RAID_ADM: 47716b80b18fSScott Teel /* Handles N-way mirrors (R1-ADM) 47726b80b18fSScott Teel * and R10 with # of drives divisible by 3.) 47736b80b18fSScott Teel */ 47742b08b3e9SDon Brace BUG_ON(le16_to_cpu(map->layout_map_count) != 3); 47756b80b18fSScott Teel 47766b80b18fSScott Teel offload_to_mirror = dev->offload_to_mirror; 47776b80b18fSScott Teel raid_map_helper(map, offload_to_mirror, 47786b80b18fSScott Teel &map_index, ¤t_group); 47796b80b18fSScott Teel /* set mirror group to use next time */ 47806b80b18fSScott Teel offload_to_mirror = 47812b08b3e9SDon Brace (offload_to_mirror >= 47822b08b3e9SDon Brace le16_to_cpu(map->layout_map_count) - 1) 47836b80b18fSScott Teel ? 0 : offload_to_mirror + 1; 47846b80b18fSScott Teel dev->offload_to_mirror = offload_to_mirror; 47856b80b18fSScott Teel /* Avoid direct use of dev->offload_to_mirror within this 47866b80b18fSScott Teel * function since multiple threads might simultaneously 47876b80b18fSScott Teel * increment it beyond the range of dev->layout_map_count -1. 47886b80b18fSScott Teel */ 47896b80b18fSScott Teel break; 47906b80b18fSScott Teel case HPSA_RAID_5: 47916b80b18fSScott Teel case HPSA_RAID_6: 47922b08b3e9SDon Brace if (le16_to_cpu(map->layout_map_count) <= 1) 47936b80b18fSScott Teel break; 47946b80b18fSScott Teel 47956b80b18fSScott Teel /* Verify first and last block are in same RAID group */ 47966b80b18fSScott Teel r5or6_blocks_per_row = 47972b08b3e9SDon Brace le16_to_cpu(map->strip_size) * 47982b08b3e9SDon Brace le16_to_cpu(map->data_disks_per_row); 47996b80b18fSScott Teel BUG_ON(r5or6_blocks_per_row == 0); 48002b08b3e9SDon Brace stripesize = r5or6_blocks_per_row * 48012b08b3e9SDon Brace le16_to_cpu(map->layout_map_count); 48026b80b18fSScott Teel #if BITS_PER_LONG == 32 48036b80b18fSScott Teel tmpdiv = first_block; 48046b80b18fSScott Teel first_group = do_div(tmpdiv, stripesize); 48056b80b18fSScott Teel tmpdiv = first_group; 48066b80b18fSScott Teel (void) do_div(tmpdiv, r5or6_blocks_per_row); 48076b80b18fSScott Teel first_group = tmpdiv; 48086b80b18fSScott Teel tmpdiv = last_block; 48096b80b18fSScott Teel last_group = do_div(tmpdiv, stripesize); 48106b80b18fSScott Teel tmpdiv = last_group; 48116b80b18fSScott Teel (void) do_div(tmpdiv, r5or6_blocks_per_row); 48126b80b18fSScott Teel last_group = tmpdiv; 48136b80b18fSScott Teel #else 48146b80b18fSScott Teel first_group = (first_block % stripesize) / r5or6_blocks_per_row; 48156b80b18fSScott Teel last_group = (last_block % stripesize) / r5or6_blocks_per_row; 48166b80b18fSScott Teel #endif 4817000ff7c2SStephen M. Cameron if (first_group != last_group) 48186b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 48196b80b18fSScott Teel 48206b80b18fSScott Teel /* Verify request is in a single row of RAID 5/6 */ 48216b80b18fSScott Teel #if BITS_PER_LONG == 32 48226b80b18fSScott Teel tmpdiv = first_block; 48236b80b18fSScott Teel (void) do_div(tmpdiv, stripesize); 48246b80b18fSScott Teel first_row = r5or6_first_row = r0_first_row = tmpdiv; 48256b80b18fSScott Teel tmpdiv = last_block; 48266b80b18fSScott Teel (void) do_div(tmpdiv, stripesize); 48276b80b18fSScott Teel r5or6_last_row = r0_last_row = tmpdiv; 48286b80b18fSScott Teel #else 48296b80b18fSScott Teel first_row = r5or6_first_row = r0_first_row = 48306b80b18fSScott Teel first_block / stripesize; 48316b80b18fSScott Teel r5or6_last_row = r0_last_row = last_block / stripesize; 48326b80b18fSScott Teel #endif 48336b80b18fSScott Teel if (r5or6_first_row != r5or6_last_row) 48346b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 48356b80b18fSScott Teel 48366b80b18fSScott Teel 48376b80b18fSScott Teel /* Verify request is in a single column */ 48386b80b18fSScott Teel #if BITS_PER_LONG == 32 48396b80b18fSScott Teel tmpdiv = first_block; 48406b80b18fSScott Teel first_row_offset = do_div(tmpdiv, stripesize); 48416b80b18fSScott Teel tmpdiv = first_row_offset; 48426b80b18fSScott Teel first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row); 48436b80b18fSScott Teel r5or6_first_row_offset = first_row_offset; 48446b80b18fSScott Teel tmpdiv = last_block; 48456b80b18fSScott Teel r5or6_last_row_offset = do_div(tmpdiv, stripesize); 48466b80b18fSScott Teel tmpdiv = r5or6_last_row_offset; 48476b80b18fSScott Teel r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row); 48486b80b18fSScott Teel tmpdiv = r5or6_first_row_offset; 48496b80b18fSScott Teel (void) do_div(tmpdiv, map->strip_size); 48506b80b18fSScott Teel first_column = r5or6_first_column = tmpdiv; 48516b80b18fSScott Teel tmpdiv = r5or6_last_row_offset; 48526b80b18fSScott Teel (void) do_div(tmpdiv, map->strip_size); 48536b80b18fSScott Teel r5or6_last_column = tmpdiv; 48546b80b18fSScott Teel #else 48556b80b18fSScott Teel first_row_offset = r5or6_first_row_offset = 48566b80b18fSScott Teel (u32)((first_block % stripesize) % 48576b80b18fSScott Teel r5or6_blocks_per_row); 48586b80b18fSScott Teel 48596b80b18fSScott Teel r5or6_last_row_offset = 48606b80b18fSScott Teel (u32)((last_block % stripesize) % 48616b80b18fSScott Teel r5or6_blocks_per_row); 48626b80b18fSScott Teel 48636b80b18fSScott Teel first_column = r5or6_first_column = 48642b08b3e9SDon Brace r5or6_first_row_offset / le16_to_cpu(map->strip_size); 48656b80b18fSScott Teel r5or6_last_column = 48662b08b3e9SDon Brace r5or6_last_row_offset / le16_to_cpu(map->strip_size); 48676b80b18fSScott Teel #endif 48686b80b18fSScott Teel if (r5or6_first_column != r5or6_last_column) 48696b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 48706b80b18fSScott Teel 48716b80b18fSScott Teel /* Request is eligible */ 48726b80b18fSScott Teel map_row = ((u32)(first_row >> map->parity_rotation_shift)) % 48732b08b3e9SDon Brace le16_to_cpu(map->row_cnt); 48746b80b18fSScott Teel 48756b80b18fSScott Teel map_index = (first_group * 48762b08b3e9SDon Brace (le16_to_cpu(map->row_cnt) * total_disks_per_row)) + 48776b80b18fSScott Teel (map_row * total_disks_per_row) + first_column; 48786b80b18fSScott Teel break; 48796b80b18fSScott Teel default: 48806b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 4881283b4a9bSStephen M. Cameron } 48826b80b18fSScott Teel 488307543e0cSStephen Cameron if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES)) 488407543e0cSStephen Cameron return IO_ACCEL_INELIGIBLE; 488507543e0cSStephen Cameron 488603383736SDon Brace c->phys_disk = dev->phys_disk[map_index]; 488703383736SDon Brace 4888283b4a9bSStephen M. Cameron disk_handle = dd[map_index].ioaccel_handle; 48892b08b3e9SDon Brace disk_block = le64_to_cpu(map->disk_starting_blk) + 48902b08b3e9SDon Brace first_row * le16_to_cpu(map->strip_size) + 48912b08b3e9SDon Brace (first_row_offset - first_column * 48922b08b3e9SDon Brace le16_to_cpu(map->strip_size)); 4893283b4a9bSStephen M. Cameron disk_block_cnt = block_cnt; 4894283b4a9bSStephen M. Cameron 4895283b4a9bSStephen M. Cameron /* handle differing logical/physical block sizes */ 4896283b4a9bSStephen M. Cameron if (map->phys_blk_shift) { 4897283b4a9bSStephen M. Cameron disk_block <<= map->phys_blk_shift; 4898283b4a9bSStephen M. Cameron disk_block_cnt <<= map->phys_blk_shift; 4899283b4a9bSStephen M. Cameron } 4900283b4a9bSStephen M. Cameron BUG_ON(disk_block_cnt > 0xffff); 4901283b4a9bSStephen M. Cameron 4902283b4a9bSStephen M. Cameron /* build the new CDB for the physical disk I/O */ 4903283b4a9bSStephen M. Cameron if (disk_block > 0xffffffff) { 4904283b4a9bSStephen M. Cameron cdb[0] = is_write ? WRITE_16 : READ_16; 4905283b4a9bSStephen M. Cameron cdb[1] = 0; 4906283b4a9bSStephen M. Cameron cdb[2] = (u8) (disk_block >> 56); 4907283b4a9bSStephen M. Cameron cdb[3] = (u8) (disk_block >> 48); 4908283b4a9bSStephen M. Cameron cdb[4] = (u8) (disk_block >> 40); 4909283b4a9bSStephen M. Cameron cdb[5] = (u8) (disk_block >> 32); 4910283b4a9bSStephen M. Cameron cdb[6] = (u8) (disk_block >> 24); 4911283b4a9bSStephen M. Cameron cdb[7] = (u8) (disk_block >> 16); 4912283b4a9bSStephen M. Cameron cdb[8] = (u8) (disk_block >> 8); 4913283b4a9bSStephen M. Cameron cdb[9] = (u8) (disk_block); 4914283b4a9bSStephen M. Cameron cdb[10] = (u8) (disk_block_cnt >> 24); 4915283b4a9bSStephen M. Cameron cdb[11] = (u8) (disk_block_cnt >> 16); 4916283b4a9bSStephen M. Cameron cdb[12] = (u8) (disk_block_cnt >> 8); 4917283b4a9bSStephen M. Cameron cdb[13] = (u8) (disk_block_cnt); 4918283b4a9bSStephen M. Cameron cdb[14] = 0; 4919283b4a9bSStephen M. Cameron cdb[15] = 0; 4920283b4a9bSStephen M. Cameron cdb_len = 16; 4921283b4a9bSStephen M. Cameron } else { 4922283b4a9bSStephen M. Cameron cdb[0] = is_write ? WRITE_10 : READ_10; 4923283b4a9bSStephen M. Cameron cdb[1] = 0; 4924283b4a9bSStephen M. Cameron cdb[2] = (u8) (disk_block >> 24); 4925283b4a9bSStephen M. Cameron cdb[3] = (u8) (disk_block >> 16); 4926283b4a9bSStephen M. Cameron cdb[4] = (u8) (disk_block >> 8); 4927283b4a9bSStephen M. Cameron cdb[5] = (u8) (disk_block); 4928283b4a9bSStephen M. Cameron cdb[6] = 0; 4929283b4a9bSStephen M. Cameron cdb[7] = (u8) (disk_block_cnt >> 8); 4930283b4a9bSStephen M. Cameron cdb[8] = (u8) (disk_block_cnt); 4931283b4a9bSStephen M. Cameron cdb[9] = 0; 4932283b4a9bSStephen M. Cameron cdb_len = 10; 4933283b4a9bSStephen M. Cameron } 4934283b4a9bSStephen M. Cameron return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len, 493503383736SDon Brace dev->scsi3addr, 493603383736SDon Brace dev->phys_disk[map_index]); 4937283b4a9bSStephen M. Cameron } 4938283b4a9bSStephen M. Cameron 493925163bd5SWebb Scales /* 494025163bd5SWebb Scales * Submit commands down the "normal" RAID stack path 494125163bd5SWebb Scales * All callers to hpsa_ciss_submit must check lockup_detected 494225163bd5SWebb Scales * beforehand, before (opt.) and after calling cmd_alloc 494325163bd5SWebb Scales */ 4944574f05d3SStephen Cameron static int hpsa_ciss_submit(struct ctlr_info *h, 4945574f05d3SStephen Cameron struct CommandList *c, struct scsi_cmnd *cmd, 4946574f05d3SStephen Cameron unsigned char scsi3addr[]) 4947edd16368SStephen M. Cameron { 4948edd16368SStephen M. Cameron cmd->host_scribble = (unsigned char *) c; 4949edd16368SStephen M. Cameron c->cmd_type = CMD_SCSI; 4950edd16368SStephen M. Cameron c->scsi_cmd = cmd; 4951edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; /* unused in simple mode */ 4952edd16368SStephen M. Cameron memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8); 4953f2405db8SDon Brace c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT)); 4954edd16368SStephen M. Cameron 4955edd16368SStephen M. Cameron /* Fill in the request block... */ 4956edd16368SStephen M. Cameron 4957edd16368SStephen M. Cameron c->Request.Timeout = 0; 4958edd16368SStephen M. Cameron BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB)); 4959edd16368SStephen M. Cameron c->Request.CDBLen = cmd->cmd_len; 4960edd16368SStephen M. Cameron memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len); 4961edd16368SStephen M. Cameron switch (cmd->sc_data_direction) { 4962edd16368SStephen M. Cameron case DMA_TO_DEVICE: 4963a505b86fSStephen M. Cameron c->Request.type_attr_dir = 4964a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE); 4965edd16368SStephen M. Cameron break; 4966edd16368SStephen M. Cameron case DMA_FROM_DEVICE: 4967a505b86fSStephen M. Cameron c->Request.type_attr_dir = 4968a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ); 4969edd16368SStephen M. Cameron break; 4970edd16368SStephen M. Cameron case DMA_NONE: 4971a505b86fSStephen M. Cameron c->Request.type_attr_dir = 4972a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE); 4973edd16368SStephen M. Cameron break; 4974edd16368SStephen M. Cameron case DMA_BIDIRECTIONAL: 4975edd16368SStephen M. Cameron /* This can happen if a buggy application does a scsi passthru 4976edd16368SStephen M. Cameron * and sets both inlen and outlen to non-zero. ( see 4977edd16368SStephen M. Cameron * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() ) 4978edd16368SStephen M. Cameron */ 4979edd16368SStephen M. Cameron 4980a505b86fSStephen M. Cameron c->Request.type_attr_dir = 4981a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD); 4982edd16368SStephen M. Cameron /* This is technically wrong, and hpsa controllers should 4983edd16368SStephen M. Cameron * reject it with CMD_INVALID, which is the most correct 4984edd16368SStephen M. Cameron * response, but non-fibre backends appear to let it 4985edd16368SStephen M. Cameron * slide by, and give the same results as if this field 4986edd16368SStephen M. Cameron * were set correctly. Either way is acceptable for 4987edd16368SStephen M. Cameron * our purposes here. 4988edd16368SStephen M. Cameron */ 4989edd16368SStephen M. Cameron 4990edd16368SStephen M. Cameron break; 4991edd16368SStephen M. Cameron 4992edd16368SStephen M. Cameron default: 4993edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4994edd16368SStephen M. Cameron cmd->sc_data_direction); 4995edd16368SStephen M. Cameron BUG(); 4996edd16368SStephen M. Cameron break; 4997edd16368SStephen M. Cameron } 4998edd16368SStephen M. Cameron 499933a2ffceSStephen M. Cameron if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */ 500073153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 5001edd16368SStephen M. Cameron return SCSI_MLQUEUE_HOST_BUSY; 5002edd16368SStephen M. Cameron } 5003edd16368SStephen M. Cameron enqueue_cmd_and_start_io(h, c); 5004edd16368SStephen M. Cameron /* the cmd'll come back via intr handler in complete_scsi_command() */ 5005edd16368SStephen M. Cameron return 0; 5006edd16368SStephen M. Cameron } 5007edd16368SStephen M. Cameron 5008360c73bdSStephen Cameron static void hpsa_cmd_init(struct ctlr_info *h, int index, 5009360c73bdSStephen Cameron struct CommandList *c) 5010360c73bdSStephen Cameron { 5011360c73bdSStephen Cameron dma_addr_t cmd_dma_handle, err_dma_handle; 5012360c73bdSStephen Cameron 5013360c73bdSStephen Cameron /* Zero out all of commandlist except the last field, refcount */ 5014360c73bdSStephen Cameron memset(c, 0, offsetof(struct CommandList, refcount)); 5015360c73bdSStephen Cameron c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT)); 5016360c73bdSStephen Cameron cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c); 5017360c73bdSStephen Cameron c->err_info = h->errinfo_pool + index; 5018360c73bdSStephen Cameron memset(c->err_info, 0, sizeof(*c->err_info)); 5019360c73bdSStephen Cameron err_dma_handle = h->errinfo_pool_dhandle 5020360c73bdSStephen Cameron + index * sizeof(*c->err_info); 5021360c73bdSStephen Cameron c->cmdindex = index; 5022360c73bdSStephen Cameron c->busaddr = (u32) cmd_dma_handle; 5023360c73bdSStephen Cameron c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle); 5024360c73bdSStephen Cameron c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info)); 5025360c73bdSStephen Cameron c->h = h; 5026a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_IDLE; 5027360c73bdSStephen Cameron } 5028360c73bdSStephen Cameron 5029360c73bdSStephen Cameron static void hpsa_preinitialize_commands(struct ctlr_info *h) 5030360c73bdSStephen Cameron { 5031360c73bdSStephen Cameron int i; 5032360c73bdSStephen Cameron 5033360c73bdSStephen Cameron for (i = 0; i < h->nr_cmds; i++) { 5034360c73bdSStephen Cameron struct CommandList *c = h->cmd_pool + i; 5035360c73bdSStephen Cameron 5036360c73bdSStephen Cameron hpsa_cmd_init(h, i, c); 5037360c73bdSStephen Cameron atomic_set(&c->refcount, 0); 5038360c73bdSStephen Cameron } 5039360c73bdSStephen Cameron } 5040360c73bdSStephen Cameron 5041360c73bdSStephen Cameron static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index, 5042360c73bdSStephen Cameron struct CommandList *c) 5043360c73bdSStephen Cameron { 5044360c73bdSStephen Cameron dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c); 5045360c73bdSStephen Cameron 504673153fe5SWebb Scales BUG_ON(c->cmdindex != index); 504773153fe5SWebb Scales 5048360c73bdSStephen Cameron memset(c->Request.CDB, 0, sizeof(c->Request.CDB)); 5049360c73bdSStephen Cameron memset(c->err_info, 0, sizeof(*c->err_info)); 5050360c73bdSStephen Cameron c->busaddr = (u32) cmd_dma_handle; 5051360c73bdSStephen Cameron } 5052360c73bdSStephen Cameron 5053592a0ad5SWebb Scales static int hpsa_ioaccel_submit(struct ctlr_info *h, 5054592a0ad5SWebb Scales struct CommandList *c, struct scsi_cmnd *cmd, 5055592a0ad5SWebb Scales unsigned char *scsi3addr) 5056592a0ad5SWebb Scales { 5057592a0ad5SWebb Scales struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 5058592a0ad5SWebb Scales int rc = IO_ACCEL_INELIGIBLE; 5059592a0ad5SWebb Scales 5060592a0ad5SWebb Scales cmd->host_scribble = (unsigned char *) c; 5061592a0ad5SWebb Scales 5062592a0ad5SWebb Scales if (dev->offload_enabled) { 5063592a0ad5SWebb Scales hpsa_cmd_init(h, c->cmdindex, c); 5064592a0ad5SWebb Scales c->cmd_type = CMD_SCSI; 5065592a0ad5SWebb Scales c->scsi_cmd = cmd; 5066592a0ad5SWebb Scales rc = hpsa_scsi_ioaccel_raid_map(h, c); 5067592a0ad5SWebb Scales if (rc < 0) /* scsi_dma_map failed. */ 5068592a0ad5SWebb Scales rc = SCSI_MLQUEUE_HOST_BUSY; 5069a3144e0bSJoe Handzik } else if (dev->hba_ioaccel_enabled) { 5070592a0ad5SWebb Scales hpsa_cmd_init(h, c->cmdindex, c); 5071592a0ad5SWebb Scales c->cmd_type = CMD_SCSI; 5072592a0ad5SWebb Scales c->scsi_cmd = cmd; 5073592a0ad5SWebb Scales rc = hpsa_scsi_ioaccel_direct_map(h, c); 5074592a0ad5SWebb Scales if (rc < 0) /* scsi_dma_map failed. */ 5075592a0ad5SWebb Scales rc = SCSI_MLQUEUE_HOST_BUSY; 5076592a0ad5SWebb Scales } 5077592a0ad5SWebb Scales return rc; 5078592a0ad5SWebb Scales } 5079592a0ad5SWebb Scales 5080080ef1ccSDon Brace static void hpsa_command_resubmit_worker(struct work_struct *work) 5081080ef1ccSDon Brace { 5082080ef1ccSDon Brace struct scsi_cmnd *cmd; 5083080ef1ccSDon Brace struct hpsa_scsi_dev_t *dev; 50848a0ff92cSWebb Scales struct CommandList *c = container_of(work, struct CommandList, work); 5085080ef1ccSDon Brace 5086080ef1ccSDon Brace cmd = c->scsi_cmd; 5087080ef1ccSDon Brace dev = cmd->device->hostdata; 5088080ef1ccSDon Brace if (!dev) { 5089080ef1ccSDon Brace cmd->result = DID_NO_CONNECT << 16; 50908a0ff92cSWebb Scales return hpsa_cmd_free_and_done(c->h, c, cmd); 5091080ef1ccSDon Brace } 5092d604f533SWebb Scales if (c->reset_pending) 5093d604f533SWebb Scales return hpsa_cmd_resolve_and_free(c->h, c); 5094a58e7e53SWebb Scales if (c->abort_pending) 5095a58e7e53SWebb Scales return hpsa_cmd_abort_and_free(c->h, c, cmd); 5096592a0ad5SWebb Scales if (c->cmd_type == CMD_IOACCEL2) { 5097592a0ad5SWebb Scales struct ctlr_info *h = c->h; 5098592a0ad5SWebb Scales struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 5099592a0ad5SWebb Scales int rc; 5100592a0ad5SWebb Scales 5101592a0ad5SWebb Scales if (c2->error_data.serv_response == 5102592a0ad5SWebb Scales IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL) { 5103592a0ad5SWebb Scales rc = hpsa_ioaccel_submit(h, c, cmd, dev->scsi3addr); 5104592a0ad5SWebb Scales if (rc == 0) 5105592a0ad5SWebb Scales return; 5106592a0ad5SWebb Scales if (rc == SCSI_MLQUEUE_HOST_BUSY) { 5107592a0ad5SWebb Scales /* 5108592a0ad5SWebb Scales * If we get here, it means dma mapping failed. 5109592a0ad5SWebb Scales * Try again via scsi mid layer, which will 5110592a0ad5SWebb Scales * then get SCSI_MLQUEUE_HOST_BUSY. 5111592a0ad5SWebb Scales */ 5112592a0ad5SWebb Scales cmd->result = DID_IMM_RETRY << 16; 51138a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, c, cmd); 5114592a0ad5SWebb Scales } 5115592a0ad5SWebb Scales /* else, fall thru and resubmit down CISS path */ 5116592a0ad5SWebb Scales } 5117592a0ad5SWebb Scales } 5118360c73bdSStephen Cameron hpsa_cmd_partial_init(c->h, c->cmdindex, c); 5119080ef1ccSDon Brace if (hpsa_ciss_submit(c->h, c, cmd, dev->scsi3addr)) { 5120080ef1ccSDon Brace /* 5121080ef1ccSDon Brace * If we get here, it means dma mapping failed. Try 5122080ef1ccSDon Brace * again via scsi mid layer, which will then get 5123080ef1ccSDon Brace * SCSI_MLQUEUE_HOST_BUSY. 5124592a0ad5SWebb Scales * 5125592a0ad5SWebb Scales * hpsa_ciss_submit will have already freed c 5126592a0ad5SWebb Scales * if it encountered a dma mapping failure. 5127080ef1ccSDon Brace */ 5128080ef1ccSDon Brace cmd->result = DID_IMM_RETRY << 16; 5129080ef1ccSDon Brace cmd->scsi_done(cmd); 5130080ef1ccSDon Brace } 5131080ef1ccSDon Brace } 5132080ef1ccSDon Brace 5133574f05d3SStephen Cameron /* Running in struct Scsi_Host->host_lock less mode */ 5134574f05d3SStephen Cameron static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd) 5135574f05d3SStephen Cameron { 5136574f05d3SStephen Cameron struct ctlr_info *h; 5137574f05d3SStephen Cameron struct hpsa_scsi_dev_t *dev; 5138574f05d3SStephen Cameron unsigned char scsi3addr[8]; 5139574f05d3SStephen Cameron struct CommandList *c; 5140574f05d3SStephen Cameron int rc = 0; 5141574f05d3SStephen Cameron 5142574f05d3SStephen Cameron /* Get the ptr to our adapter structure out of cmd->host. */ 5143574f05d3SStephen Cameron h = sdev_to_hba(cmd->device); 514473153fe5SWebb Scales 514573153fe5SWebb Scales BUG_ON(cmd->request->tag < 0); 514673153fe5SWebb Scales 5147574f05d3SStephen Cameron dev = cmd->device->hostdata; 5148574f05d3SStephen Cameron if (!dev) { 5149574f05d3SStephen Cameron cmd->result = DID_NO_CONNECT << 16; 5150574f05d3SStephen Cameron cmd->scsi_done(cmd); 5151574f05d3SStephen Cameron return 0; 5152574f05d3SStephen Cameron } 515373153fe5SWebb Scales 5154574f05d3SStephen Cameron memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr)); 5155574f05d3SStephen Cameron 5156574f05d3SStephen Cameron if (unlikely(lockup_detected(h))) { 515725163bd5SWebb Scales cmd->result = DID_NO_CONNECT << 16; 5158574f05d3SStephen Cameron cmd->scsi_done(cmd); 5159574f05d3SStephen Cameron return 0; 5160574f05d3SStephen Cameron } 516173153fe5SWebb Scales c = cmd_tagged_alloc(h, cmd); 5162574f05d3SStephen Cameron 5163407863cbSStephen Cameron /* 5164407863cbSStephen Cameron * Call alternate submit routine for I/O accelerated commands. 5165574f05d3SStephen Cameron * Retries always go down the normal I/O path. 5166574f05d3SStephen Cameron */ 5167574f05d3SStephen Cameron if (likely(cmd->retries == 0 && 5168574f05d3SStephen Cameron cmd->request->cmd_type == REQ_TYPE_FS && 5169574f05d3SStephen Cameron h->acciopath_status)) { 5170592a0ad5SWebb Scales rc = hpsa_ioaccel_submit(h, c, cmd, scsi3addr); 5171574f05d3SStephen Cameron if (rc == 0) 5172592a0ad5SWebb Scales return 0; 5173592a0ad5SWebb Scales if (rc == SCSI_MLQUEUE_HOST_BUSY) { 517473153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 5175574f05d3SStephen Cameron return SCSI_MLQUEUE_HOST_BUSY; 5176574f05d3SStephen Cameron } 5177574f05d3SStephen Cameron } 5178574f05d3SStephen Cameron return hpsa_ciss_submit(h, c, cmd, scsi3addr); 5179574f05d3SStephen Cameron } 5180574f05d3SStephen Cameron 51818ebc9248SWebb Scales static void hpsa_scan_complete(struct ctlr_info *h) 51825f389360SStephen M. Cameron { 51835f389360SStephen M. Cameron unsigned long flags; 51845f389360SStephen M. Cameron 51855f389360SStephen M. Cameron spin_lock_irqsave(&h->scan_lock, flags); 51865f389360SStephen M. Cameron h->scan_finished = 1; 51875f389360SStephen M. Cameron wake_up_all(&h->scan_wait_queue); 51885f389360SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 51895f389360SStephen M. Cameron } 51905f389360SStephen M. Cameron 5191a08a8471SStephen M. Cameron static void hpsa_scan_start(struct Scsi_Host *sh) 5192a08a8471SStephen M. Cameron { 5193a08a8471SStephen M. Cameron struct ctlr_info *h = shost_to_hba(sh); 5194a08a8471SStephen M. Cameron unsigned long flags; 5195a08a8471SStephen M. Cameron 51968ebc9248SWebb Scales /* 51978ebc9248SWebb Scales * Don't let rescans be initiated on a controller known to be locked 51988ebc9248SWebb Scales * up. If the controller locks up *during* a rescan, that thread is 51998ebc9248SWebb Scales * probably hosed, but at least we can prevent new rescan threads from 52008ebc9248SWebb Scales * piling up on a locked up controller. 52018ebc9248SWebb Scales */ 52028ebc9248SWebb Scales if (unlikely(lockup_detected(h))) 52038ebc9248SWebb Scales return hpsa_scan_complete(h); 52045f389360SStephen M. Cameron 5205a08a8471SStephen M. Cameron /* wait until any scan already in progress is finished. */ 5206a08a8471SStephen M. Cameron while (1) { 5207a08a8471SStephen M. Cameron spin_lock_irqsave(&h->scan_lock, flags); 5208a08a8471SStephen M. Cameron if (h->scan_finished) 5209a08a8471SStephen M. Cameron break; 5210a08a8471SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 5211a08a8471SStephen M. Cameron wait_event(h->scan_wait_queue, h->scan_finished); 5212a08a8471SStephen M. Cameron /* Note: We don't need to worry about a race between this 5213a08a8471SStephen M. Cameron * thread and driver unload because the midlayer will 5214a08a8471SStephen M. Cameron * have incremented the reference count, so unload won't 5215a08a8471SStephen M. Cameron * happen if we're in here. 5216a08a8471SStephen M. Cameron */ 5217a08a8471SStephen M. Cameron } 5218a08a8471SStephen M. Cameron h->scan_finished = 0; /* mark scan as in progress */ 5219a08a8471SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 5220a08a8471SStephen M. Cameron 52218ebc9248SWebb Scales if (unlikely(lockup_detected(h))) 52228ebc9248SWebb Scales return hpsa_scan_complete(h); 52235f389360SStephen M. Cameron 52248aa60681SDon Brace hpsa_update_scsi_devices(h); 5225a08a8471SStephen M. Cameron 52268ebc9248SWebb Scales hpsa_scan_complete(h); 5227a08a8471SStephen M. Cameron } 5228a08a8471SStephen M. Cameron 52297c0a0229SDon Brace static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth) 52307c0a0229SDon Brace { 523103383736SDon Brace struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata; 523203383736SDon Brace 523303383736SDon Brace if (!logical_drive) 523403383736SDon Brace return -ENODEV; 52357c0a0229SDon Brace 52367c0a0229SDon Brace if (qdepth < 1) 52377c0a0229SDon Brace qdepth = 1; 523803383736SDon Brace else if (qdepth > logical_drive->queue_depth) 523903383736SDon Brace qdepth = logical_drive->queue_depth; 524003383736SDon Brace 524103383736SDon Brace return scsi_change_queue_depth(sdev, qdepth); 52427c0a0229SDon Brace } 52437c0a0229SDon Brace 5244a08a8471SStephen M. Cameron static int hpsa_scan_finished(struct Scsi_Host *sh, 5245a08a8471SStephen M. Cameron unsigned long elapsed_time) 5246a08a8471SStephen M. Cameron { 5247a08a8471SStephen M. Cameron struct ctlr_info *h = shost_to_hba(sh); 5248a08a8471SStephen M. Cameron unsigned long flags; 5249a08a8471SStephen M. Cameron int finished; 5250a08a8471SStephen M. Cameron 5251a08a8471SStephen M. Cameron spin_lock_irqsave(&h->scan_lock, flags); 5252a08a8471SStephen M. Cameron finished = h->scan_finished; 5253a08a8471SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 5254a08a8471SStephen M. Cameron return finished; 5255a08a8471SStephen M. Cameron } 5256a08a8471SStephen M. Cameron 52572946e82bSRobert Elliott static int hpsa_scsi_host_alloc(struct ctlr_info *h) 5258edd16368SStephen M. Cameron { 5259b705690dSStephen M. Cameron struct Scsi_Host *sh; 5260b705690dSStephen M. Cameron int error; 5261edd16368SStephen M. Cameron 5262b705690dSStephen M. Cameron sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h)); 52632946e82bSRobert Elliott if (sh == NULL) { 52642946e82bSRobert Elliott dev_err(&h->pdev->dev, "scsi_host_alloc failed\n"); 52652946e82bSRobert Elliott return -ENOMEM; 52662946e82bSRobert Elliott } 5267b705690dSStephen M. Cameron 5268b705690dSStephen M. Cameron sh->io_port = 0; 5269b705690dSStephen M. Cameron sh->n_io_port = 0; 5270b705690dSStephen M. Cameron sh->this_id = -1; 5271b705690dSStephen M. Cameron sh->max_channel = 3; 5272b705690dSStephen M. Cameron sh->max_cmd_len = MAX_COMMAND_SIZE; 5273b705690dSStephen M. Cameron sh->max_lun = HPSA_MAX_LUN; 5274b705690dSStephen M. Cameron sh->max_id = HPSA_MAX_LUN; 527541ce4c35SStephen Cameron sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS; 5276d54c5c24SStephen Cameron sh->cmd_per_lun = sh->can_queue; 5277b705690dSStephen M. Cameron sh->sg_tablesize = h->maxsgentries; 5278*d04e62b9SKevin Barnett sh->transportt = hpsa_sas_transport_template; 5279b705690dSStephen M. Cameron sh->hostdata[0] = (unsigned long) h; 5280b705690dSStephen M. Cameron sh->irq = h->intr[h->intr_mode]; 5281b705690dSStephen M. Cameron sh->unique_id = sh->irq; 528273153fe5SWebb Scales error = scsi_init_shared_tag_map(sh, sh->can_queue); 528373153fe5SWebb Scales if (error) { 528473153fe5SWebb Scales dev_err(&h->pdev->dev, 528573153fe5SWebb Scales "%s: scsi_init_shared_tag_map failed for controller %d\n", 528673153fe5SWebb Scales __func__, h->ctlr); 5287b705690dSStephen M. Cameron scsi_host_put(sh); 5288b705690dSStephen M. Cameron return error; 52892946e82bSRobert Elliott } 52902946e82bSRobert Elliott h->scsi_host = sh; 52912946e82bSRobert Elliott return 0; 52922946e82bSRobert Elliott } 52932946e82bSRobert Elliott 52942946e82bSRobert Elliott static int hpsa_scsi_add_host(struct ctlr_info *h) 52952946e82bSRobert Elliott { 52962946e82bSRobert Elliott int rv; 52972946e82bSRobert Elliott 52982946e82bSRobert Elliott rv = scsi_add_host(h->scsi_host, &h->pdev->dev); 52992946e82bSRobert Elliott if (rv) { 53002946e82bSRobert Elliott dev_err(&h->pdev->dev, "scsi_add_host failed\n"); 53012946e82bSRobert Elliott return rv; 53022946e82bSRobert Elliott } 53032946e82bSRobert Elliott scsi_scan_host(h->scsi_host); 53042946e82bSRobert Elliott return 0; 5305edd16368SStephen M. Cameron } 5306edd16368SStephen M. Cameron 5307b69324ffSWebb Scales /* 530873153fe5SWebb Scales * The block layer has already gone to the trouble of picking out a unique, 530973153fe5SWebb Scales * small-integer tag for this request. We use an offset from that value as 531073153fe5SWebb Scales * an index to select our command block. (The offset allows us to reserve the 531173153fe5SWebb Scales * low-numbered entries for our own uses.) 531273153fe5SWebb Scales */ 531373153fe5SWebb Scales static int hpsa_get_cmd_index(struct scsi_cmnd *scmd) 531473153fe5SWebb Scales { 531573153fe5SWebb Scales int idx = scmd->request->tag; 531673153fe5SWebb Scales 531773153fe5SWebb Scales if (idx < 0) 531873153fe5SWebb Scales return idx; 531973153fe5SWebb Scales 532073153fe5SWebb Scales /* Offset to leave space for internal cmds. */ 532173153fe5SWebb Scales return idx += HPSA_NRESERVED_CMDS; 532273153fe5SWebb Scales } 532373153fe5SWebb Scales 532473153fe5SWebb Scales /* 5325b69324ffSWebb Scales * Send a TEST_UNIT_READY command to the specified LUN using the specified 5326b69324ffSWebb Scales * reply queue; returns zero if the unit is ready, and non-zero otherwise. 5327b69324ffSWebb Scales */ 5328b69324ffSWebb Scales static int hpsa_send_test_unit_ready(struct ctlr_info *h, 5329b69324ffSWebb Scales struct CommandList *c, unsigned char lunaddr[], 5330b69324ffSWebb Scales int reply_queue) 5331edd16368SStephen M. Cameron { 53328919358eSTomas Henzl int rc; 5333edd16368SStephen M. Cameron 5334a2dac136SStephen M. Cameron /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */ 5335a2dac136SStephen M. Cameron (void) fill_cmd(c, TEST_UNIT_READY, h, 5336a2dac136SStephen M. Cameron NULL, 0, 0, lunaddr, TYPE_CMD); 5337b69324ffSWebb Scales rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT); 533825163bd5SWebb Scales if (rc) 5339b69324ffSWebb Scales return rc; 5340edd16368SStephen M. Cameron /* no unmap needed here because no data xfer. */ 5341edd16368SStephen M. Cameron 5342b69324ffSWebb Scales /* Check if the unit is already ready. */ 5343edd16368SStephen M. Cameron if (c->err_info->CommandStatus == CMD_SUCCESS) 5344b69324ffSWebb Scales return 0; 5345edd16368SStephen M. Cameron 5346b69324ffSWebb Scales /* 5347b69324ffSWebb Scales * The first command sent after reset will receive "unit attention" to 5348b69324ffSWebb Scales * indicate that the LUN has been reset...this is actually what we're 5349b69324ffSWebb Scales * looking for (but, success is good too). 5350b69324ffSWebb Scales */ 5351edd16368SStephen M. Cameron if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 5352edd16368SStephen M. Cameron c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION && 5353edd16368SStephen M. Cameron (c->err_info->SenseInfo[2] == NO_SENSE || 5354edd16368SStephen M. Cameron c->err_info->SenseInfo[2] == UNIT_ATTENTION)) 5355b69324ffSWebb Scales return 0; 5356b69324ffSWebb Scales 5357b69324ffSWebb Scales return 1; 5358b69324ffSWebb Scales } 5359b69324ffSWebb Scales 5360b69324ffSWebb Scales /* 5361b69324ffSWebb Scales * Wait for a TEST_UNIT_READY command to complete, retrying as necessary; 5362b69324ffSWebb Scales * returns zero when the unit is ready, and non-zero when giving up. 5363b69324ffSWebb Scales */ 5364b69324ffSWebb Scales static int hpsa_wait_for_test_unit_ready(struct ctlr_info *h, 5365b69324ffSWebb Scales struct CommandList *c, 5366b69324ffSWebb Scales unsigned char lunaddr[], int reply_queue) 5367b69324ffSWebb Scales { 5368b69324ffSWebb Scales int rc; 5369b69324ffSWebb Scales int count = 0; 5370b69324ffSWebb Scales int waittime = 1; /* seconds */ 5371b69324ffSWebb Scales 5372b69324ffSWebb Scales /* Send test unit ready until device ready, or give up. */ 5373b69324ffSWebb Scales for (count = 0; count < HPSA_TUR_RETRY_LIMIT; count++) { 5374b69324ffSWebb Scales 5375b69324ffSWebb Scales /* 5376b69324ffSWebb Scales * Wait for a bit. do this first, because if we send 5377b69324ffSWebb Scales * the TUR right away, the reset will just abort it. 5378b69324ffSWebb Scales */ 5379b69324ffSWebb Scales msleep(1000 * waittime); 5380b69324ffSWebb Scales 5381b69324ffSWebb Scales rc = hpsa_send_test_unit_ready(h, c, lunaddr, reply_queue); 5382b69324ffSWebb Scales if (!rc) 5383edd16368SStephen M. Cameron break; 5384b69324ffSWebb Scales 5385b69324ffSWebb Scales /* Increase wait time with each try, up to a point. */ 5386b69324ffSWebb Scales if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS) 5387b69324ffSWebb Scales waittime *= 2; 5388b69324ffSWebb Scales 5389b69324ffSWebb Scales dev_warn(&h->pdev->dev, 5390b69324ffSWebb Scales "waiting %d secs for device to become ready.\n", 5391b69324ffSWebb Scales waittime); 5392b69324ffSWebb Scales } 5393b69324ffSWebb Scales 5394b69324ffSWebb Scales return rc; 5395b69324ffSWebb Scales } 5396b69324ffSWebb Scales 5397b69324ffSWebb Scales static int wait_for_device_to_become_ready(struct ctlr_info *h, 5398b69324ffSWebb Scales unsigned char lunaddr[], 5399b69324ffSWebb Scales int reply_queue) 5400b69324ffSWebb Scales { 5401b69324ffSWebb Scales int first_queue; 5402b69324ffSWebb Scales int last_queue; 5403b69324ffSWebb Scales int rq; 5404b69324ffSWebb Scales int rc = 0; 5405b69324ffSWebb Scales struct CommandList *c; 5406b69324ffSWebb Scales 5407b69324ffSWebb Scales c = cmd_alloc(h); 5408b69324ffSWebb Scales 5409b69324ffSWebb Scales /* 5410b69324ffSWebb Scales * If no specific reply queue was requested, then send the TUR 5411b69324ffSWebb Scales * repeatedly, requesting a reply on each reply queue; otherwise execute 5412b69324ffSWebb Scales * the loop exactly once using only the specified queue. 5413b69324ffSWebb Scales */ 5414b69324ffSWebb Scales if (reply_queue == DEFAULT_REPLY_QUEUE) { 5415b69324ffSWebb Scales first_queue = 0; 5416b69324ffSWebb Scales last_queue = h->nreply_queues - 1; 5417b69324ffSWebb Scales } else { 5418b69324ffSWebb Scales first_queue = reply_queue; 5419b69324ffSWebb Scales last_queue = reply_queue; 5420b69324ffSWebb Scales } 5421b69324ffSWebb Scales 5422b69324ffSWebb Scales for (rq = first_queue; rq <= last_queue; rq++) { 5423b69324ffSWebb Scales rc = hpsa_wait_for_test_unit_ready(h, c, lunaddr, rq); 5424b69324ffSWebb Scales if (rc) 5425b69324ffSWebb Scales break; 5426edd16368SStephen M. Cameron } 5427edd16368SStephen M. Cameron 5428edd16368SStephen M. Cameron if (rc) 5429edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "giving up on device.\n"); 5430edd16368SStephen M. Cameron else 5431edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "device is ready.\n"); 5432edd16368SStephen M. Cameron 543345fcb86eSStephen Cameron cmd_free(h, c); 5434edd16368SStephen M. Cameron return rc; 5435edd16368SStephen M. Cameron } 5436edd16368SStephen M. Cameron 5437edd16368SStephen M. Cameron /* Need at least one of these error handlers to keep ../scsi/hosts.c from 5438edd16368SStephen M. Cameron * complaining. Doing a host- or bus-reset can't do anything good here. 5439edd16368SStephen M. Cameron */ 5440edd16368SStephen M. Cameron static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd) 5441edd16368SStephen M. Cameron { 5442edd16368SStephen M. Cameron int rc; 5443edd16368SStephen M. Cameron struct ctlr_info *h; 5444edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *dev; 54450b9b7b6eSScott Teel u8 reset_type; 54462dc127bbSDan Carpenter char msg[48]; 5447edd16368SStephen M. Cameron 5448edd16368SStephen M. Cameron /* find the controller to which the command to be aborted was sent */ 5449edd16368SStephen M. Cameron h = sdev_to_hba(scsicmd->device); 5450edd16368SStephen M. Cameron if (h == NULL) /* paranoia */ 5451edd16368SStephen M. Cameron return FAILED; 5452e345893bSDon Brace 5453e345893bSDon Brace if (lockup_detected(h)) 5454e345893bSDon Brace return FAILED; 5455e345893bSDon Brace 5456edd16368SStephen M. Cameron dev = scsicmd->device->hostdata; 5457edd16368SStephen M. Cameron if (!dev) { 5458d604f533SWebb Scales dev_err(&h->pdev->dev, "%s: device lookup failed\n", __func__); 5459edd16368SStephen M. Cameron return FAILED; 5460edd16368SStephen M. Cameron } 546125163bd5SWebb Scales 546225163bd5SWebb Scales /* if controller locked up, we can guarantee command won't complete */ 546325163bd5SWebb Scales if (lockup_detected(h)) { 54642dc127bbSDan Carpenter snprintf(msg, sizeof(msg), 54652dc127bbSDan Carpenter "cmd %d RESET FAILED, lockup detected", 546673153fe5SWebb Scales hpsa_get_cmd_index(scsicmd)); 546773153fe5SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 546825163bd5SWebb Scales return FAILED; 546925163bd5SWebb Scales } 547025163bd5SWebb Scales 547125163bd5SWebb Scales /* this reset request might be the result of a lockup; check */ 547225163bd5SWebb Scales if (detect_controller_lockup(h)) { 54732dc127bbSDan Carpenter snprintf(msg, sizeof(msg), 54742dc127bbSDan Carpenter "cmd %d RESET FAILED, new lockup detected", 547573153fe5SWebb Scales hpsa_get_cmd_index(scsicmd)); 547673153fe5SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 547725163bd5SWebb Scales return FAILED; 547825163bd5SWebb Scales } 547925163bd5SWebb Scales 5480d604f533SWebb Scales /* Do not attempt on controller */ 5481d604f533SWebb Scales if (is_hba_lunid(dev->scsi3addr)) 5482d604f533SWebb Scales return SUCCESS; 5483d604f533SWebb Scales 54840b9b7b6eSScott Teel if (is_logical_dev_addr_mode(dev->scsi3addr)) 54850b9b7b6eSScott Teel reset_type = HPSA_DEVICE_RESET_MSG; 54860b9b7b6eSScott Teel else 54870b9b7b6eSScott Teel reset_type = HPSA_PHYS_TARGET_RESET; 54880b9b7b6eSScott Teel 54890b9b7b6eSScott Teel sprintf(msg, "resetting %s", 54900b9b7b6eSScott Teel reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical "); 54910b9b7b6eSScott Teel hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 549225163bd5SWebb Scales 5493da03ded0SDon Brace h->reset_in_progress = 1; 5494da03ded0SDon Brace 5495edd16368SStephen M. Cameron /* send a reset to the SCSI LUN which the command was sent to */ 54960b9b7b6eSScott Teel rc = hpsa_do_reset(h, dev, dev->scsi3addr, reset_type, 549725163bd5SWebb Scales DEFAULT_REPLY_QUEUE); 54980b9b7b6eSScott Teel sprintf(msg, "reset %s %s", 54990b9b7b6eSScott Teel reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ", 55002dc127bbSDan Carpenter rc == 0 ? "completed successfully" : "failed"); 5501d604f533SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 5502da03ded0SDon Brace h->reset_in_progress = 0; 5503d604f533SWebb Scales return rc == 0 ? SUCCESS : FAILED; 5504edd16368SStephen M. Cameron } 5505edd16368SStephen M. Cameron 55066cba3f19SStephen M. Cameron static void swizzle_abort_tag(u8 *tag) 55076cba3f19SStephen M. Cameron { 55086cba3f19SStephen M. Cameron u8 original_tag[8]; 55096cba3f19SStephen M. Cameron 55106cba3f19SStephen M. Cameron memcpy(original_tag, tag, 8); 55116cba3f19SStephen M. Cameron tag[0] = original_tag[3]; 55126cba3f19SStephen M. Cameron tag[1] = original_tag[2]; 55136cba3f19SStephen M. Cameron tag[2] = original_tag[1]; 55146cba3f19SStephen M. Cameron tag[3] = original_tag[0]; 55156cba3f19SStephen M. Cameron tag[4] = original_tag[7]; 55166cba3f19SStephen M. Cameron tag[5] = original_tag[6]; 55176cba3f19SStephen M. Cameron tag[6] = original_tag[5]; 55186cba3f19SStephen M. Cameron tag[7] = original_tag[4]; 55196cba3f19SStephen M. Cameron } 55206cba3f19SStephen M. Cameron 552117eb87d2SScott Teel static void hpsa_get_tag(struct ctlr_info *h, 55222b08b3e9SDon Brace struct CommandList *c, __le32 *taglower, __le32 *tagupper) 552317eb87d2SScott Teel { 55242b08b3e9SDon Brace u64 tag; 552517eb87d2SScott Teel if (c->cmd_type == CMD_IOACCEL1) { 552617eb87d2SScott Teel struct io_accel1_cmd *cm1 = (struct io_accel1_cmd *) 552717eb87d2SScott Teel &h->ioaccel_cmd_pool[c->cmdindex]; 55282b08b3e9SDon Brace tag = le64_to_cpu(cm1->tag); 55292b08b3e9SDon Brace *tagupper = cpu_to_le32(tag >> 32); 55302b08b3e9SDon Brace *taglower = cpu_to_le32(tag); 553154b6e9e9SScott Teel return; 553254b6e9e9SScott Teel } 553354b6e9e9SScott Teel if (c->cmd_type == CMD_IOACCEL2) { 553454b6e9e9SScott Teel struct io_accel2_cmd *cm2 = (struct io_accel2_cmd *) 553554b6e9e9SScott Teel &h->ioaccel2_cmd_pool[c->cmdindex]; 5536dd0e19f3SScott Teel /* upper tag not used in ioaccel2 mode */ 5537dd0e19f3SScott Teel memset(tagupper, 0, sizeof(*tagupper)); 5538dd0e19f3SScott Teel *taglower = cm2->Tag; 553954b6e9e9SScott Teel return; 554054b6e9e9SScott Teel } 55412b08b3e9SDon Brace tag = le64_to_cpu(c->Header.tag); 55422b08b3e9SDon Brace *tagupper = cpu_to_le32(tag >> 32); 55432b08b3e9SDon Brace *taglower = cpu_to_le32(tag); 554417eb87d2SScott Teel } 554554b6e9e9SScott Teel 554675167d2cSStephen M. Cameron static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr, 55479b5c48c2SStephen Cameron struct CommandList *abort, int reply_queue) 554875167d2cSStephen M. Cameron { 554975167d2cSStephen M. Cameron int rc = IO_OK; 555075167d2cSStephen M. Cameron struct CommandList *c; 555175167d2cSStephen M. Cameron struct ErrorInfo *ei; 55522b08b3e9SDon Brace __le32 tagupper, taglower; 555375167d2cSStephen M. Cameron 555445fcb86eSStephen Cameron c = cmd_alloc(h); 555575167d2cSStephen M. Cameron 5556a2dac136SStephen M. Cameron /* fill_cmd can't fail here, no buffer to map */ 55579b5c48c2SStephen Cameron (void) fill_cmd(c, HPSA_ABORT_MSG, h, &abort->Header.tag, 5558a2dac136SStephen M. Cameron 0, 0, scsi3addr, TYPE_MSG); 55599b5c48c2SStephen Cameron if (h->needs_abort_tags_swizzled) 55606cba3f19SStephen M. Cameron swizzle_abort_tag(&c->Request.CDB[4]); 556125163bd5SWebb Scales (void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT); 556217eb87d2SScott Teel hpsa_get_tag(h, abort, &taglower, &tagupper); 556325163bd5SWebb Scales dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd(abort) completed.\n", 556417eb87d2SScott Teel __func__, tagupper, taglower); 556575167d2cSStephen M. Cameron /* no unmap needed here because no data xfer. */ 556675167d2cSStephen M. Cameron 556775167d2cSStephen M. Cameron ei = c->err_info; 556875167d2cSStephen M. Cameron switch (ei->CommandStatus) { 556975167d2cSStephen M. Cameron case CMD_SUCCESS: 557075167d2cSStephen M. Cameron break; 55719437ac43SStephen Cameron case CMD_TMF_STATUS: 55729437ac43SStephen Cameron rc = hpsa_evaluate_tmf_status(h, c); 55739437ac43SStephen Cameron break; 557475167d2cSStephen M. Cameron case CMD_UNABORTABLE: /* Very common, don't make noise. */ 557575167d2cSStephen M. Cameron rc = -1; 557675167d2cSStephen M. Cameron break; 557775167d2cSStephen M. Cameron default: 557875167d2cSStephen M. Cameron dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n", 557917eb87d2SScott Teel __func__, tagupper, taglower); 5580d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 558175167d2cSStephen M. Cameron rc = -1; 558275167d2cSStephen M. Cameron break; 558375167d2cSStephen M. Cameron } 558445fcb86eSStephen Cameron cmd_free(h, c); 5585dd0e19f3SScott Teel dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", 5586dd0e19f3SScott Teel __func__, tagupper, taglower); 558775167d2cSStephen M. Cameron return rc; 558875167d2cSStephen M. Cameron } 558975167d2cSStephen M. Cameron 55908be986ccSStephen Cameron static void setup_ioaccel2_abort_cmd(struct CommandList *c, struct ctlr_info *h, 55918be986ccSStephen Cameron struct CommandList *command_to_abort, int reply_queue) 55928be986ccSStephen Cameron { 55938be986ccSStephen Cameron struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 55948be986ccSStephen Cameron struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2; 55958be986ccSStephen Cameron struct io_accel2_cmd *c2a = 55968be986ccSStephen Cameron &h->ioaccel2_cmd_pool[command_to_abort->cmdindex]; 5597a58e7e53SWebb Scales struct scsi_cmnd *scmd = command_to_abort->scsi_cmd; 55988be986ccSStephen Cameron struct hpsa_scsi_dev_t *dev = scmd->device->hostdata; 55998be986ccSStephen Cameron 56008be986ccSStephen Cameron /* 56018be986ccSStephen Cameron * We're overlaying struct hpsa_tmf_struct on top of something which 56028be986ccSStephen Cameron * was allocated as a struct io_accel2_cmd, so we better be sure it 56038be986ccSStephen Cameron * actually fits, and doesn't overrun the error info space. 56048be986ccSStephen Cameron */ 56058be986ccSStephen Cameron BUILD_BUG_ON(sizeof(struct hpsa_tmf_struct) > 56068be986ccSStephen Cameron sizeof(struct io_accel2_cmd)); 56078be986ccSStephen Cameron BUG_ON(offsetof(struct io_accel2_cmd, error_data) < 56088be986ccSStephen Cameron offsetof(struct hpsa_tmf_struct, error_len) + 56098be986ccSStephen Cameron sizeof(ac->error_len)); 56108be986ccSStephen Cameron 56118be986ccSStephen Cameron c->cmd_type = IOACCEL2_TMF; 5612a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 5613a58e7e53SWebb Scales 56148be986ccSStephen Cameron /* Adjust the DMA address to point to the accelerated command buffer */ 56158be986ccSStephen Cameron c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle + 56168be986ccSStephen Cameron (c->cmdindex * sizeof(struct io_accel2_cmd)); 56178be986ccSStephen Cameron BUG_ON(c->busaddr & 0x0000007F); 56188be986ccSStephen Cameron 56198be986ccSStephen Cameron memset(ac, 0, sizeof(*c2)); /* yes this is correct */ 56208be986ccSStephen Cameron ac->iu_type = IOACCEL2_IU_TMF_TYPE; 56218be986ccSStephen Cameron ac->reply_queue = reply_queue; 56228be986ccSStephen Cameron ac->tmf = IOACCEL2_TMF_ABORT; 56238be986ccSStephen Cameron ac->it_nexus = cpu_to_le32(dev->ioaccel_handle); 56248be986ccSStephen Cameron memset(ac->lun_id, 0, sizeof(ac->lun_id)); 56258be986ccSStephen Cameron ac->tag = cpu_to_le64(c->cmdindex << DIRECT_LOOKUP_SHIFT); 56268be986ccSStephen Cameron ac->abort_tag = cpu_to_le64(le32_to_cpu(c2a->Tag)); 56278be986ccSStephen Cameron ac->error_ptr = cpu_to_le64(c->busaddr + 56288be986ccSStephen Cameron offsetof(struct io_accel2_cmd, error_data)); 56298be986ccSStephen Cameron ac->error_len = cpu_to_le32(sizeof(c2->error_data)); 56308be986ccSStephen Cameron } 56318be986ccSStephen Cameron 563254b6e9e9SScott Teel /* ioaccel2 path firmware cannot handle abort task requests. 563354b6e9e9SScott Teel * Change abort requests to physical target reset, and send to the 563454b6e9e9SScott Teel * address of the physical disk used for the ioaccel 2 command. 563554b6e9e9SScott Teel * Return 0 on success (IO_OK) 563654b6e9e9SScott Teel * -1 on failure 563754b6e9e9SScott Teel */ 563854b6e9e9SScott Teel 563954b6e9e9SScott Teel static int hpsa_send_reset_as_abort_ioaccel2(struct ctlr_info *h, 564025163bd5SWebb Scales unsigned char *scsi3addr, struct CommandList *abort, int reply_queue) 564154b6e9e9SScott Teel { 564254b6e9e9SScott Teel int rc = IO_OK; 564354b6e9e9SScott Teel struct scsi_cmnd *scmd; /* scsi command within request being aborted */ 564454b6e9e9SScott Teel struct hpsa_scsi_dev_t *dev; /* device to which scsi cmd was sent */ 564554b6e9e9SScott Teel unsigned char phys_scsi3addr[8]; /* addr of phys disk with volume */ 564654b6e9e9SScott Teel unsigned char *psa = &phys_scsi3addr[0]; 564754b6e9e9SScott Teel 564854b6e9e9SScott Teel /* Get a pointer to the hpsa logical device. */ 56497fa3030cSStephen Cameron scmd = abort->scsi_cmd; 565054b6e9e9SScott Teel dev = (struct hpsa_scsi_dev_t *)(scmd->device->hostdata); 565154b6e9e9SScott Teel if (dev == NULL) { 565254b6e9e9SScott Teel dev_warn(&h->pdev->dev, 565354b6e9e9SScott Teel "Cannot abort: no device pointer for command.\n"); 565454b6e9e9SScott Teel return -1; /* not abortable */ 565554b6e9e9SScott Teel } 565654b6e9e9SScott Teel 56572ba8bfc8SStephen M. Cameron if (h->raid_offload_debug > 0) 56582ba8bfc8SStephen M. Cameron dev_info(&h->pdev->dev, 56590d96ef5fSWebb Scales "scsi %d:%d:%d:%d %s scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 56602ba8bfc8SStephen M. Cameron h->scsi_host->host_no, dev->bus, dev->target, dev->lun, 56610d96ef5fSWebb Scales "Reset as abort", 56622ba8bfc8SStephen M. Cameron scsi3addr[0], scsi3addr[1], scsi3addr[2], scsi3addr[3], 56632ba8bfc8SStephen M. Cameron scsi3addr[4], scsi3addr[5], scsi3addr[6], scsi3addr[7]); 56642ba8bfc8SStephen M. Cameron 566554b6e9e9SScott Teel if (!dev->offload_enabled) { 566654b6e9e9SScott Teel dev_warn(&h->pdev->dev, 566754b6e9e9SScott Teel "Can't abort: device is not operating in HP SSD Smart Path mode.\n"); 566854b6e9e9SScott Teel return -1; /* not abortable */ 566954b6e9e9SScott Teel } 567054b6e9e9SScott Teel 567154b6e9e9SScott Teel /* Incoming scsi3addr is logical addr. We need physical disk addr. */ 567254b6e9e9SScott Teel if (!hpsa_get_pdisk_of_ioaccel2(h, abort, psa)) { 567354b6e9e9SScott Teel dev_warn(&h->pdev->dev, "Can't abort: Failed lookup of physical address.\n"); 567454b6e9e9SScott Teel return -1; /* not abortable */ 567554b6e9e9SScott Teel } 567654b6e9e9SScott Teel 567754b6e9e9SScott Teel /* send the reset */ 56782ba8bfc8SStephen M. Cameron if (h->raid_offload_debug > 0) 56792ba8bfc8SStephen M. Cameron dev_info(&h->pdev->dev, 56802ba8bfc8SStephen M. Cameron "Reset as abort: Resetting physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 56812ba8bfc8SStephen M. Cameron psa[0], psa[1], psa[2], psa[3], 56822ba8bfc8SStephen M. Cameron psa[4], psa[5], psa[6], psa[7]); 5683d604f533SWebb Scales rc = hpsa_do_reset(h, dev, psa, HPSA_RESET_TYPE_TARGET, reply_queue); 568454b6e9e9SScott Teel if (rc != 0) { 568554b6e9e9SScott Teel dev_warn(&h->pdev->dev, 568654b6e9e9SScott Teel "Reset as abort: Failed on physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 568754b6e9e9SScott Teel psa[0], psa[1], psa[2], psa[3], 568854b6e9e9SScott Teel psa[4], psa[5], psa[6], psa[7]); 568954b6e9e9SScott Teel return rc; /* failed to reset */ 569054b6e9e9SScott Teel } 569154b6e9e9SScott Teel 569254b6e9e9SScott Teel /* wait for device to recover */ 5693b69324ffSWebb Scales if (wait_for_device_to_become_ready(h, psa, reply_queue) != 0) { 569454b6e9e9SScott Teel dev_warn(&h->pdev->dev, 569554b6e9e9SScott Teel "Reset as abort: Failed: Device never recovered from reset: 0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 569654b6e9e9SScott Teel psa[0], psa[1], psa[2], psa[3], 569754b6e9e9SScott Teel psa[4], psa[5], psa[6], psa[7]); 569854b6e9e9SScott Teel return -1; /* failed to recover */ 569954b6e9e9SScott Teel } 570054b6e9e9SScott Teel 570154b6e9e9SScott Teel /* device recovered */ 570254b6e9e9SScott Teel dev_info(&h->pdev->dev, 570354b6e9e9SScott Teel "Reset as abort: Device recovered from reset: scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 570454b6e9e9SScott Teel psa[0], psa[1], psa[2], psa[3], 570554b6e9e9SScott Teel psa[4], psa[5], psa[6], psa[7]); 570654b6e9e9SScott Teel 570754b6e9e9SScott Teel return rc; /* success */ 570854b6e9e9SScott Teel } 570954b6e9e9SScott Teel 57108be986ccSStephen Cameron static int hpsa_send_abort_ioaccel2(struct ctlr_info *h, 57118be986ccSStephen Cameron struct CommandList *abort, int reply_queue) 57128be986ccSStephen Cameron { 57138be986ccSStephen Cameron int rc = IO_OK; 57148be986ccSStephen Cameron struct CommandList *c; 57158be986ccSStephen Cameron __le32 taglower, tagupper; 57168be986ccSStephen Cameron struct hpsa_scsi_dev_t *dev; 57178be986ccSStephen Cameron struct io_accel2_cmd *c2; 57188be986ccSStephen Cameron 57198be986ccSStephen Cameron dev = abort->scsi_cmd->device->hostdata; 57208be986ccSStephen Cameron if (!dev->offload_enabled && !dev->hba_ioaccel_enabled) 57218be986ccSStephen Cameron return -1; 57228be986ccSStephen Cameron 57238be986ccSStephen Cameron c = cmd_alloc(h); 57248be986ccSStephen Cameron setup_ioaccel2_abort_cmd(c, h, abort, reply_queue); 57258be986ccSStephen Cameron c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 57268be986ccSStephen Cameron (void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT); 57278be986ccSStephen Cameron hpsa_get_tag(h, abort, &taglower, &tagupper); 57288be986ccSStephen Cameron dev_dbg(&h->pdev->dev, 57298be986ccSStephen Cameron "%s: Tag:0x%08x:%08x: do_simple_cmd(ioaccel2 abort) completed.\n", 57308be986ccSStephen Cameron __func__, tagupper, taglower); 57318be986ccSStephen Cameron /* no unmap needed here because no data xfer. */ 57328be986ccSStephen Cameron 57338be986ccSStephen Cameron dev_dbg(&h->pdev->dev, 57348be986ccSStephen Cameron "%s: Tag:0x%08x:%08x: abort service response = 0x%02x.\n", 57358be986ccSStephen Cameron __func__, tagupper, taglower, c2->error_data.serv_response); 57368be986ccSStephen Cameron switch (c2->error_data.serv_response) { 57378be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE: 57388be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS: 57398be986ccSStephen Cameron rc = 0; 57408be986ccSStephen Cameron break; 57418be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_TMF_REJECTED: 57428be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_FAILURE: 57438be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN: 57448be986ccSStephen Cameron rc = -1; 57458be986ccSStephen Cameron break; 57468be986ccSStephen Cameron default: 57478be986ccSStephen Cameron dev_warn(&h->pdev->dev, 57488be986ccSStephen Cameron "%s: Tag:0x%08x:%08x: unknown abort service response 0x%02x\n", 57498be986ccSStephen Cameron __func__, tagupper, taglower, 57508be986ccSStephen Cameron c2->error_data.serv_response); 57518be986ccSStephen Cameron rc = -1; 57528be986ccSStephen Cameron } 57538be986ccSStephen Cameron cmd_free(h, c); 57548be986ccSStephen Cameron dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", __func__, 57558be986ccSStephen Cameron tagupper, taglower); 57568be986ccSStephen Cameron return rc; 57578be986ccSStephen Cameron } 57588be986ccSStephen Cameron 57596cba3f19SStephen M. Cameron static int hpsa_send_abort_both_ways(struct ctlr_info *h, 576025163bd5SWebb Scales unsigned char *scsi3addr, struct CommandList *abort, int reply_queue) 57616cba3f19SStephen M. Cameron { 57628be986ccSStephen Cameron /* 57638be986ccSStephen Cameron * ioccelerator mode 2 commands should be aborted via the 576454b6e9e9SScott Teel * accelerated path, since RAID path is unaware of these commands, 57658be986ccSStephen Cameron * but not all underlying firmware can handle abort TMF. 57668be986ccSStephen Cameron * Change abort to physical device reset when abort TMF is unsupported. 576754b6e9e9SScott Teel */ 57688be986ccSStephen Cameron if (abort->cmd_type == CMD_IOACCEL2) { 57698be986ccSStephen Cameron if (HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags) 57708be986ccSStephen Cameron return hpsa_send_abort_ioaccel2(h, abort, 57718be986ccSStephen Cameron reply_queue); 57728be986ccSStephen Cameron else 577325163bd5SWebb Scales return hpsa_send_reset_as_abort_ioaccel2(h, scsi3addr, 577425163bd5SWebb Scales abort, reply_queue); 57758be986ccSStephen Cameron } 57769b5c48c2SStephen Cameron return hpsa_send_abort(h, scsi3addr, abort, reply_queue); 577725163bd5SWebb Scales } 577825163bd5SWebb Scales 577925163bd5SWebb Scales /* Find out which reply queue a command was meant to return on */ 578025163bd5SWebb Scales static int hpsa_extract_reply_queue(struct ctlr_info *h, 578125163bd5SWebb Scales struct CommandList *c) 578225163bd5SWebb Scales { 578325163bd5SWebb Scales if (c->cmd_type == CMD_IOACCEL2) 578425163bd5SWebb Scales return h->ioaccel2_cmd_pool[c->cmdindex].reply_queue; 578525163bd5SWebb Scales return c->Header.ReplyQueue; 57866cba3f19SStephen M. Cameron } 57876cba3f19SStephen M. Cameron 57889b5c48c2SStephen Cameron /* 57899b5c48c2SStephen Cameron * Limit concurrency of abort commands to prevent 57909b5c48c2SStephen Cameron * over-subscription of commands 57919b5c48c2SStephen Cameron */ 57929b5c48c2SStephen Cameron static inline int wait_for_available_abort_cmd(struct ctlr_info *h) 57939b5c48c2SStephen Cameron { 57949b5c48c2SStephen Cameron #define ABORT_CMD_WAIT_MSECS 5000 57959b5c48c2SStephen Cameron return !wait_event_timeout(h->abort_cmd_wait_queue, 57969b5c48c2SStephen Cameron atomic_dec_if_positive(&h->abort_cmds_available) >= 0, 57979b5c48c2SStephen Cameron msecs_to_jiffies(ABORT_CMD_WAIT_MSECS)); 57989b5c48c2SStephen Cameron } 57999b5c48c2SStephen Cameron 580075167d2cSStephen M. Cameron /* Send an abort for the specified command. 580175167d2cSStephen M. Cameron * If the device and controller support it, 580275167d2cSStephen M. Cameron * send a task abort request. 580375167d2cSStephen M. Cameron */ 580475167d2cSStephen M. Cameron static int hpsa_eh_abort_handler(struct scsi_cmnd *sc) 580575167d2cSStephen M. Cameron { 580675167d2cSStephen M. Cameron 5807a58e7e53SWebb Scales int rc; 580875167d2cSStephen M. Cameron struct ctlr_info *h; 580975167d2cSStephen M. Cameron struct hpsa_scsi_dev_t *dev; 581075167d2cSStephen M. Cameron struct CommandList *abort; /* pointer to command to be aborted */ 581175167d2cSStephen M. Cameron struct scsi_cmnd *as; /* ptr to scsi cmd inside aborted command. */ 581275167d2cSStephen M. Cameron char msg[256]; /* For debug messaging. */ 581375167d2cSStephen M. Cameron int ml = 0; 58142b08b3e9SDon Brace __le32 tagupper, taglower; 581525163bd5SWebb Scales int refcount, reply_queue; 581625163bd5SWebb Scales 581725163bd5SWebb Scales if (sc == NULL) 581825163bd5SWebb Scales return FAILED; 581975167d2cSStephen M. Cameron 58209b5c48c2SStephen Cameron if (sc->device == NULL) 58219b5c48c2SStephen Cameron return FAILED; 58229b5c48c2SStephen Cameron 582375167d2cSStephen M. Cameron /* Find the controller of the command to be aborted */ 582475167d2cSStephen M. Cameron h = sdev_to_hba(sc->device); 58259b5c48c2SStephen Cameron if (h == NULL) 582675167d2cSStephen M. Cameron return FAILED; 582775167d2cSStephen M. Cameron 582825163bd5SWebb Scales /* Find the device of the command to be aborted */ 582925163bd5SWebb Scales dev = sc->device->hostdata; 583025163bd5SWebb Scales if (!dev) { 583125163bd5SWebb Scales dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n", 583225163bd5SWebb Scales msg); 5833e345893bSDon Brace return FAILED; 583425163bd5SWebb Scales } 583525163bd5SWebb Scales 583625163bd5SWebb Scales /* If controller locked up, we can guarantee command won't complete */ 583725163bd5SWebb Scales if (lockup_detected(h)) { 583825163bd5SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, 583925163bd5SWebb Scales "ABORT FAILED, lockup detected"); 584025163bd5SWebb Scales return FAILED; 584125163bd5SWebb Scales } 584225163bd5SWebb Scales 584325163bd5SWebb Scales /* This is a good time to check if controller lockup has occurred */ 584425163bd5SWebb Scales if (detect_controller_lockup(h)) { 584525163bd5SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, 584625163bd5SWebb Scales "ABORT FAILED, new lockup detected"); 584725163bd5SWebb Scales return FAILED; 584825163bd5SWebb Scales } 5849e345893bSDon Brace 585075167d2cSStephen M. Cameron /* Check that controller supports some kind of task abort */ 585175167d2cSStephen M. Cameron if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) && 585275167d2cSStephen M. Cameron !(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags)) 585375167d2cSStephen M. Cameron return FAILED; 585475167d2cSStephen M. Cameron 585575167d2cSStephen M. Cameron memset(msg, 0, sizeof(msg)); 58564b761557SRobert Elliott ml += sprintf(msg+ml, "scsi %d:%d:%d:%llu %s %p", 585775167d2cSStephen M. Cameron h->scsi_host->host_no, sc->device->channel, 58580d96ef5fSWebb Scales sc->device->id, sc->device->lun, 58594b761557SRobert Elliott "Aborting command", sc); 586075167d2cSStephen M. Cameron 586175167d2cSStephen M. Cameron /* Get SCSI command to be aborted */ 586275167d2cSStephen M. Cameron abort = (struct CommandList *) sc->host_scribble; 586375167d2cSStephen M. Cameron if (abort == NULL) { 5864281a7fd0SWebb Scales /* This can happen if the command already completed. */ 5865281a7fd0SWebb Scales return SUCCESS; 5866281a7fd0SWebb Scales } 5867281a7fd0SWebb Scales refcount = atomic_inc_return(&abort->refcount); 5868281a7fd0SWebb Scales if (refcount == 1) { /* Command is done already. */ 5869281a7fd0SWebb Scales cmd_free(h, abort); 5870281a7fd0SWebb Scales return SUCCESS; 587175167d2cSStephen M. Cameron } 58729b5c48c2SStephen Cameron 58739b5c48c2SStephen Cameron /* Don't bother trying the abort if we know it won't work. */ 58749b5c48c2SStephen Cameron if (abort->cmd_type != CMD_IOACCEL2 && 58759b5c48c2SStephen Cameron abort->cmd_type != CMD_IOACCEL1 && !dev->supports_aborts) { 58769b5c48c2SStephen Cameron cmd_free(h, abort); 58779b5c48c2SStephen Cameron return FAILED; 58789b5c48c2SStephen Cameron } 58799b5c48c2SStephen Cameron 5880a58e7e53SWebb Scales /* 5881a58e7e53SWebb Scales * Check that we're aborting the right command. 5882a58e7e53SWebb Scales * It's possible the CommandList already completed and got re-used. 5883a58e7e53SWebb Scales */ 5884a58e7e53SWebb Scales if (abort->scsi_cmd != sc) { 5885a58e7e53SWebb Scales cmd_free(h, abort); 5886a58e7e53SWebb Scales return SUCCESS; 5887a58e7e53SWebb Scales } 5888a58e7e53SWebb Scales 5889a58e7e53SWebb Scales abort->abort_pending = true; 589017eb87d2SScott Teel hpsa_get_tag(h, abort, &taglower, &tagupper); 589125163bd5SWebb Scales reply_queue = hpsa_extract_reply_queue(h, abort); 589217eb87d2SScott Teel ml += sprintf(msg+ml, "Tag:0x%08x:%08x ", tagupper, taglower); 58937fa3030cSStephen Cameron as = abort->scsi_cmd; 589475167d2cSStephen M. Cameron if (as != NULL) 58954b761557SRobert Elliott ml += sprintf(msg+ml, 58964b761557SRobert Elliott "CDBLen: %d CDB: 0x%02x%02x... SN: 0x%lx ", 58974b761557SRobert Elliott as->cmd_len, as->cmnd[0], as->cmnd[1], 58984b761557SRobert Elliott as->serial_number); 58994b761557SRobert Elliott dev_warn(&h->pdev->dev, "%s BEING SENT\n", msg); 59000d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, "Aborting command"); 59014b761557SRobert Elliott 590275167d2cSStephen M. Cameron /* 590375167d2cSStephen M. Cameron * Command is in flight, or possibly already completed 590475167d2cSStephen M. Cameron * by the firmware (but not to the scsi mid layer) but we can't 590575167d2cSStephen M. Cameron * distinguish which. Send the abort down. 590675167d2cSStephen M. Cameron */ 59079b5c48c2SStephen Cameron if (wait_for_available_abort_cmd(h)) { 59089b5c48c2SStephen Cameron dev_warn(&h->pdev->dev, 59094b761557SRobert Elliott "%s FAILED, timeout waiting for an abort command to become available.\n", 59104b761557SRobert Elliott msg); 59119b5c48c2SStephen Cameron cmd_free(h, abort); 59129b5c48c2SStephen Cameron return FAILED; 59139b5c48c2SStephen Cameron } 591425163bd5SWebb Scales rc = hpsa_send_abort_both_ways(h, dev->scsi3addr, abort, reply_queue); 59159b5c48c2SStephen Cameron atomic_inc(&h->abort_cmds_available); 59169b5c48c2SStephen Cameron wake_up_all(&h->abort_cmd_wait_queue); 591775167d2cSStephen M. Cameron if (rc != 0) { 59184b761557SRobert Elliott dev_warn(&h->pdev->dev, "%s SENT, FAILED\n", msg); 59190d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, 59200d96ef5fSWebb Scales "FAILED to abort command"); 5921281a7fd0SWebb Scales cmd_free(h, abort); 592275167d2cSStephen M. Cameron return FAILED; 592375167d2cSStephen M. Cameron } 59244b761557SRobert Elliott dev_info(&h->pdev->dev, "%s SENT, SUCCESS\n", msg); 5925d604f533SWebb Scales wait_event(h->event_sync_wait_queue, 5926a58e7e53SWebb Scales abort->scsi_cmd != sc || lockup_detected(h)); 5927281a7fd0SWebb Scales cmd_free(h, abort); 5928a58e7e53SWebb Scales return !lockup_detected(h) ? SUCCESS : FAILED; 592975167d2cSStephen M. Cameron } 593075167d2cSStephen M. Cameron 5931edd16368SStephen M. Cameron /* 593273153fe5SWebb Scales * For operations with an associated SCSI command, a command block is allocated 593373153fe5SWebb Scales * at init, and managed by cmd_tagged_alloc() and cmd_tagged_free() using the 593473153fe5SWebb Scales * block request tag as an index into a table of entries. cmd_tagged_free() is 593573153fe5SWebb Scales * the complement, although cmd_free() may be called instead. 593673153fe5SWebb Scales */ 593773153fe5SWebb Scales static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h, 593873153fe5SWebb Scales struct scsi_cmnd *scmd) 593973153fe5SWebb Scales { 594073153fe5SWebb Scales int idx = hpsa_get_cmd_index(scmd); 594173153fe5SWebb Scales struct CommandList *c = h->cmd_pool + idx; 594273153fe5SWebb Scales 594373153fe5SWebb Scales if (idx < HPSA_NRESERVED_CMDS || idx >= h->nr_cmds) { 594473153fe5SWebb Scales dev_err(&h->pdev->dev, "Bad block tag: %d not in [%d..%d]\n", 594573153fe5SWebb Scales idx, HPSA_NRESERVED_CMDS, h->nr_cmds - 1); 594673153fe5SWebb Scales /* The index value comes from the block layer, so if it's out of 594773153fe5SWebb Scales * bounds, it's probably not our bug. 594873153fe5SWebb Scales */ 594973153fe5SWebb Scales BUG(); 595073153fe5SWebb Scales } 595173153fe5SWebb Scales 595273153fe5SWebb Scales atomic_inc(&c->refcount); 595373153fe5SWebb Scales if (unlikely(!hpsa_is_cmd_idle(c))) { 595473153fe5SWebb Scales /* 595573153fe5SWebb Scales * We expect that the SCSI layer will hand us a unique tag 595673153fe5SWebb Scales * value. Thus, there should never be a collision here between 595773153fe5SWebb Scales * two requests...because if the selected command isn't idle 595873153fe5SWebb Scales * then someone is going to be very disappointed. 595973153fe5SWebb Scales */ 596073153fe5SWebb Scales dev_err(&h->pdev->dev, 596173153fe5SWebb Scales "tag collision (tag=%d) in cmd_tagged_alloc().\n", 596273153fe5SWebb Scales idx); 596373153fe5SWebb Scales if (c->scsi_cmd != NULL) 596473153fe5SWebb Scales scsi_print_command(c->scsi_cmd); 596573153fe5SWebb Scales scsi_print_command(scmd); 596673153fe5SWebb Scales } 596773153fe5SWebb Scales 596873153fe5SWebb Scales hpsa_cmd_partial_init(h, idx, c); 596973153fe5SWebb Scales return c; 597073153fe5SWebb Scales } 597173153fe5SWebb Scales 597273153fe5SWebb Scales static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c) 597373153fe5SWebb Scales { 597473153fe5SWebb Scales /* 597573153fe5SWebb Scales * Release our reference to the block. We don't need to do anything 597673153fe5SWebb Scales * else to free it, because it is accessed by index. (There's no point 597773153fe5SWebb Scales * in checking the result of the decrement, since we cannot guarantee 597873153fe5SWebb Scales * that there isn't a concurrent abort which is also accessing it.) 597973153fe5SWebb Scales */ 598073153fe5SWebb Scales (void)atomic_dec(&c->refcount); 598173153fe5SWebb Scales } 598273153fe5SWebb Scales 598373153fe5SWebb Scales /* 5984edd16368SStephen M. Cameron * For operations that cannot sleep, a command block is allocated at init, 5985edd16368SStephen M. Cameron * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track 5986edd16368SStephen M. Cameron * which ones are free or in use. Lock must be held when calling this. 5987edd16368SStephen M. Cameron * cmd_free() is the complement. 5988bf43caf3SRobert Elliott * This function never gives up and returns NULL. If it hangs, 5989bf43caf3SRobert Elliott * another thread must call cmd_free() to free some tags. 5990edd16368SStephen M. Cameron */ 5991281a7fd0SWebb Scales 5992edd16368SStephen M. Cameron static struct CommandList *cmd_alloc(struct ctlr_info *h) 5993edd16368SStephen M. Cameron { 5994edd16368SStephen M. Cameron struct CommandList *c; 5995360c73bdSStephen Cameron int refcount, i; 599673153fe5SWebb Scales int offset = 0; 5997edd16368SStephen M. Cameron 599833811026SRobert Elliott /* 599933811026SRobert Elliott * There is some *extremely* small but non-zero chance that that 60004c413128SStephen M. Cameron * multiple threads could get in here, and one thread could 60014c413128SStephen M. Cameron * be scanning through the list of bits looking for a free 60024c413128SStephen M. Cameron * one, but the free ones are always behind him, and other 60034c413128SStephen M. Cameron * threads sneak in behind him and eat them before he can 60044c413128SStephen M. Cameron * get to them, so that while there is always a free one, a 60054c413128SStephen M. Cameron * very unlucky thread might be starved anyway, never able to 60064c413128SStephen M. Cameron * beat the other threads. In reality, this happens so 60074c413128SStephen M. Cameron * infrequently as to be indistinguishable from never. 600873153fe5SWebb Scales * 600973153fe5SWebb Scales * Note that we start allocating commands before the SCSI host structure 601073153fe5SWebb Scales * is initialized. Since the search starts at bit zero, this 601173153fe5SWebb Scales * all works, since we have at least one command structure available; 601273153fe5SWebb Scales * however, it means that the structures with the low indexes have to be 601373153fe5SWebb Scales * reserved for driver-initiated requests, while requests from the block 601473153fe5SWebb Scales * layer will use the higher indexes. 60154c413128SStephen M. Cameron */ 60164c413128SStephen M. Cameron 6017281a7fd0SWebb Scales for (;;) { 601873153fe5SWebb Scales i = find_next_zero_bit(h->cmd_pool_bits, 601973153fe5SWebb Scales HPSA_NRESERVED_CMDS, 602073153fe5SWebb Scales offset); 602173153fe5SWebb Scales if (unlikely(i >= HPSA_NRESERVED_CMDS)) { 6022281a7fd0SWebb Scales offset = 0; 6023281a7fd0SWebb Scales continue; 6024281a7fd0SWebb Scales } 6025edd16368SStephen M. Cameron c = h->cmd_pool + i; 6026281a7fd0SWebb Scales refcount = atomic_inc_return(&c->refcount); 6027281a7fd0SWebb Scales if (unlikely(refcount > 1)) { 6028281a7fd0SWebb Scales cmd_free(h, c); /* already in use */ 602973153fe5SWebb Scales offset = (i + 1) % HPSA_NRESERVED_CMDS; 6030281a7fd0SWebb Scales continue; 6031281a7fd0SWebb Scales } 6032281a7fd0SWebb Scales set_bit(i & (BITS_PER_LONG - 1), 6033281a7fd0SWebb Scales h->cmd_pool_bits + (i / BITS_PER_LONG)); 6034281a7fd0SWebb Scales break; /* it's ours now. */ 6035281a7fd0SWebb Scales } 6036360c73bdSStephen Cameron hpsa_cmd_partial_init(h, i, c); 6037edd16368SStephen M. Cameron return c; 6038edd16368SStephen M. Cameron } 6039edd16368SStephen M. Cameron 604073153fe5SWebb Scales /* 604173153fe5SWebb Scales * This is the complementary operation to cmd_alloc(). Note, however, in some 604273153fe5SWebb Scales * corner cases it may also be used to free blocks allocated by 604373153fe5SWebb Scales * cmd_tagged_alloc() in which case the ref-count decrement does the trick and 604473153fe5SWebb Scales * the clear-bit is harmless. 604573153fe5SWebb Scales */ 6046edd16368SStephen M. Cameron static void cmd_free(struct ctlr_info *h, struct CommandList *c) 6047edd16368SStephen M. Cameron { 6048281a7fd0SWebb Scales if (atomic_dec_and_test(&c->refcount)) { 6049edd16368SStephen M. Cameron int i; 6050edd16368SStephen M. Cameron 6051edd16368SStephen M. Cameron i = c - h->cmd_pool; 6052edd16368SStephen M. Cameron clear_bit(i & (BITS_PER_LONG - 1), 6053edd16368SStephen M. Cameron h->cmd_pool_bits + (i / BITS_PER_LONG)); 6054edd16368SStephen M. Cameron } 6055281a7fd0SWebb Scales } 6056edd16368SStephen M. Cameron 6057edd16368SStephen M. Cameron #ifdef CONFIG_COMPAT 6058edd16368SStephen M. Cameron 605942a91641SDon Brace static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, 606042a91641SDon Brace void __user *arg) 6061edd16368SStephen M. Cameron { 6062edd16368SStephen M. Cameron IOCTL32_Command_struct __user *arg32 = 6063edd16368SStephen M. Cameron (IOCTL32_Command_struct __user *) arg; 6064edd16368SStephen M. Cameron IOCTL_Command_struct arg64; 6065edd16368SStephen M. Cameron IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64)); 6066edd16368SStephen M. Cameron int err; 6067edd16368SStephen M. Cameron u32 cp; 6068edd16368SStephen M. Cameron 6069938abd84SVasiliy Kulikov memset(&arg64, 0, sizeof(arg64)); 6070edd16368SStephen M. Cameron err = 0; 6071edd16368SStephen M. Cameron err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 6072edd16368SStephen M. Cameron sizeof(arg64.LUN_info)); 6073edd16368SStephen M. Cameron err |= copy_from_user(&arg64.Request, &arg32->Request, 6074edd16368SStephen M. Cameron sizeof(arg64.Request)); 6075edd16368SStephen M. Cameron err |= copy_from_user(&arg64.error_info, &arg32->error_info, 6076edd16368SStephen M. Cameron sizeof(arg64.error_info)); 6077edd16368SStephen M. Cameron err |= get_user(arg64.buf_size, &arg32->buf_size); 6078edd16368SStephen M. Cameron err |= get_user(cp, &arg32->buf); 6079edd16368SStephen M. Cameron arg64.buf = compat_ptr(cp); 6080edd16368SStephen M. Cameron err |= copy_to_user(p, &arg64, sizeof(arg64)); 6081edd16368SStephen M. Cameron 6082edd16368SStephen M. Cameron if (err) 6083edd16368SStephen M. Cameron return -EFAULT; 6084edd16368SStephen M. Cameron 608542a91641SDon Brace err = hpsa_ioctl(dev, CCISS_PASSTHRU, p); 6086edd16368SStephen M. Cameron if (err) 6087edd16368SStephen M. Cameron return err; 6088edd16368SStephen M. Cameron err |= copy_in_user(&arg32->error_info, &p->error_info, 6089edd16368SStephen M. Cameron sizeof(arg32->error_info)); 6090edd16368SStephen M. Cameron if (err) 6091edd16368SStephen M. Cameron return -EFAULT; 6092edd16368SStephen M. Cameron return err; 6093edd16368SStephen M. Cameron } 6094edd16368SStephen M. Cameron 6095edd16368SStephen M. Cameron static int hpsa_ioctl32_big_passthru(struct scsi_device *dev, 609642a91641SDon Brace int cmd, void __user *arg) 6097edd16368SStephen M. Cameron { 6098edd16368SStephen M. Cameron BIG_IOCTL32_Command_struct __user *arg32 = 6099edd16368SStephen M. Cameron (BIG_IOCTL32_Command_struct __user *) arg; 6100edd16368SStephen M. Cameron BIG_IOCTL_Command_struct arg64; 6101edd16368SStephen M. Cameron BIG_IOCTL_Command_struct __user *p = 6102edd16368SStephen M. Cameron compat_alloc_user_space(sizeof(arg64)); 6103edd16368SStephen M. Cameron int err; 6104edd16368SStephen M. Cameron u32 cp; 6105edd16368SStephen M. Cameron 6106938abd84SVasiliy Kulikov memset(&arg64, 0, sizeof(arg64)); 6107edd16368SStephen M. Cameron err = 0; 6108edd16368SStephen M. Cameron err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 6109edd16368SStephen M. Cameron sizeof(arg64.LUN_info)); 6110edd16368SStephen M. Cameron err |= copy_from_user(&arg64.Request, &arg32->Request, 6111edd16368SStephen M. Cameron sizeof(arg64.Request)); 6112edd16368SStephen M. Cameron err |= copy_from_user(&arg64.error_info, &arg32->error_info, 6113edd16368SStephen M. Cameron sizeof(arg64.error_info)); 6114edd16368SStephen M. Cameron err |= get_user(arg64.buf_size, &arg32->buf_size); 6115edd16368SStephen M. Cameron err |= get_user(arg64.malloc_size, &arg32->malloc_size); 6116edd16368SStephen M. Cameron err |= get_user(cp, &arg32->buf); 6117edd16368SStephen M. Cameron arg64.buf = compat_ptr(cp); 6118edd16368SStephen M. Cameron err |= copy_to_user(p, &arg64, sizeof(arg64)); 6119edd16368SStephen M. Cameron 6120edd16368SStephen M. Cameron if (err) 6121edd16368SStephen M. Cameron return -EFAULT; 6122edd16368SStephen M. Cameron 612342a91641SDon Brace err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, p); 6124edd16368SStephen M. Cameron if (err) 6125edd16368SStephen M. Cameron return err; 6126edd16368SStephen M. Cameron err |= copy_in_user(&arg32->error_info, &p->error_info, 6127edd16368SStephen M. Cameron sizeof(arg32->error_info)); 6128edd16368SStephen M. Cameron if (err) 6129edd16368SStephen M. Cameron return -EFAULT; 6130edd16368SStephen M. Cameron return err; 6131edd16368SStephen M. Cameron } 613271fe75a7SStephen M. Cameron 613342a91641SDon Brace static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void __user *arg) 613471fe75a7SStephen M. Cameron { 613571fe75a7SStephen M. Cameron switch (cmd) { 613671fe75a7SStephen M. Cameron case CCISS_GETPCIINFO: 613771fe75a7SStephen M. Cameron case CCISS_GETINTINFO: 613871fe75a7SStephen M. Cameron case CCISS_SETINTINFO: 613971fe75a7SStephen M. Cameron case CCISS_GETNODENAME: 614071fe75a7SStephen M. Cameron case CCISS_SETNODENAME: 614171fe75a7SStephen M. Cameron case CCISS_GETHEARTBEAT: 614271fe75a7SStephen M. Cameron case CCISS_GETBUSTYPES: 614371fe75a7SStephen M. Cameron case CCISS_GETFIRMVER: 614471fe75a7SStephen M. Cameron case CCISS_GETDRIVVER: 614571fe75a7SStephen M. Cameron case CCISS_REVALIDVOLS: 614671fe75a7SStephen M. Cameron case CCISS_DEREGDISK: 614771fe75a7SStephen M. Cameron case CCISS_REGNEWDISK: 614871fe75a7SStephen M. Cameron case CCISS_REGNEWD: 614971fe75a7SStephen M. Cameron case CCISS_RESCANDISK: 615071fe75a7SStephen M. Cameron case CCISS_GETLUNINFO: 615171fe75a7SStephen M. Cameron return hpsa_ioctl(dev, cmd, arg); 615271fe75a7SStephen M. Cameron 615371fe75a7SStephen M. Cameron case CCISS_PASSTHRU32: 615471fe75a7SStephen M. Cameron return hpsa_ioctl32_passthru(dev, cmd, arg); 615571fe75a7SStephen M. Cameron case CCISS_BIG_PASSTHRU32: 615671fe75a7SStephen M. Cameron return hpsa_ioctl32_big_passthru(dev, cmd, arg); 615771fe75a7SStephen M. Cameron 615871fe75a7SStephen M. Cameron default: 615971fe75a7SStephen M. Cameron return -ENOIOCTLCMD; 616071fe75a7SStephen M. Cameron } 616171fe75a7SStephen M. Cameron } 6162edd16368SStephen M. Cameron #endif 6163edd16368SStephen M. Cameron 6164edd16368SStephen M. Cameron static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp) 6165edd16368SStephen M. Cameron { 6166edd16368SStephen M. Cameron struct hpsa_pci_info pciinfo; 6167edd16368SStephen M. Cameron 6168edd16368SStephen M. Cameron if (!argp) 6169edd16368SStephen M. Cameron return -EINVAL; 6170edd16368SStephen M. Cameron pciinfo.domain = pci_domain_nr(h->pdev->bus); 6171edd16368SStephen M. Cameron pciinfo.bus = h->pdev->bus->number; 6172edd16368SStephen M. Cameron pciinfo.dev_fn = h->pdev->devfn; 6173edd16368SStephen M. Cameron pciinfo.board_id = h->board_id; 6174edd16368SStephen M. Cameron if (copy_to_user(argp, &pciinfo, sizeof(pciinfo))) 6175edd16368SStephen M. Cameron return -EFAULT; 6176edd16368SStephen M. Cameron return 0; 6177edd16368SStephen M. Cameron } 6178edd16368SStephen M. Cameron 6179edd16368SStephen M. Cameron static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp) 6180edd16368SStephen M. Cameron { 6181edd16368SStephen M. Cameron DriverVer_type DriverVer; 6182edd16368SStephen M. Cameron unsigned char vmaj, vmin, vsubmin; 6183edd16368SStephen M. Cameron int rc; 6184edd16368SStephen M. Cameron 6185edd16368SStephen M. Cameron rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu", 6186edd16368SStephen M. Cameron &vmaj, &vmin, &vsubmin); 6187edd16368SStephen M. Cameron if (rc != 3) { 6188edd16368SStephen M. Cameron dev_info(&h->pdev->dev, "driver version string '%s' " 6189edd16368SStephen M. Cameron "unrecognized.", HPSA_DRIVER_VERSION); 6190edd16368SStephen M. Cameron vmaj = 0; 6191edd16368SStephen M. Cameron vmin = 0; 6192edd16368SStephen M. Cameron vsubmin = 0; 6193edd16368SStephen M. Cameron } 6194edd16368SStephen M. Cameron DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin; 6195edd16368SStephen M. Cameron if (!argp) 6196edd16368SStephen M. Cameron return -EINVAL; 6197edd16368SStephen M. Cameron if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type))) 6198edd16368SStephen M. Cameron return -EFAULT; 6199edd16368SStephen M. Cameron return 0; 6200edd16368SStephen M. Cameron } 6201edd16368SStephen M. Cameron 6202edd16368SStephen M. Cameron static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp) 6203edd16368SStephen M. Cameron { 6204edd16368SStephen M. Cameron IOCTL_Command_struct iocommand; 6205edd16368SStephen M. Cameron struct CommandList *c; 6206edd16368SStephen M. Cameron char *buff = NULL; 620750a0decfSStephen M. Cameron u64 temp64; 6208c1f63c8fSStephen M. Cameron int rc = 0; 6209edd16368SStephen M. Cameron 6210edd16368SStephen M. Cameron if (!argp) 6211edd16368SStephen M. Cameron return -EINVAL; 6212edd16368SStephen M. Cameron if (!capable(CAP_SYS_RAWIO)) 6213edd16368SStephen M. Cameron return -EPERM; 6214edd16368SStephen M. Cameron if (copy_from_user(&iocommand, argp, sizeof(iocommand))) 6215edd16368SStephen M. Cameron return -EFAULT; 6216edd16368SStephen M. Cameron if ((iocommand.buf_size < 1) && 6217edd16368SStephen M. Cameron (iocommand.Request.Type.Direction != XFER_NONE)) { 6218edd16368SStephen M. Cameron return -EINVAL; 6219edd16368SStephen M. Cameron } 6220edd16368SStephen M. Cameron if (iocommand.buf_size > 0) { 6221edd16368SStephen M. Cameron buff = kmalloc(iocommand.buf_size, GFP_KERNEL); 6222edd16368SStephen M. Cameron if (buff == NULL) 62232dd02d74SRobert Elliott return -ENOMEM; 62249233fb10SStephen M. Cameron if (iocommand.Request.Type.Direction & XFER_WRITE) { 6225edd16368SStephen M. Cameron /* Copy the data into the buffer we created */ 6226b03a7771SStephen M. Cameron if (copy_from_user(buff, iocommand.buf, 6227b03a7771SStephen M. Cameron iocommand.buf_size)) { 6228c1f63c8fSStephen M. Cameron rc = -EFAULT; 6229c1f63c8fSStephen M. Cameron goto out_kfree; 6230edd16368SStephen M. Cameron } 6231b03a7771SStephen M. Cameron } else { 6232edd16368SStephen M. Cameron memset(buff, 0, iocommand.buf_size); 6233b03a7771SStephen M. Cameron } 6234b03a7771SStephen M. Cameron } 623545fcb86eSStephen Cameron c = cmd_alloc(h); 6236bf43caf3SRobert Elliott 6237edd16368SStephen M. Cameron /* Fill in the command type */ 6238edd16368SStephen M. Cameron c->cmd_type = CMD_IOCTL_PEND; 6239a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 6240edd16368SStephen M. Cameron /* Fill in Command Header */ 6241edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; /* unused in simple mode */ 6242edd16368SStephen M. Cameron if (iocommand.buf_size > 0) { /* buffer to fill */ 6243edd16368SStephen M. Cameron c->Header.SGList = 1; 624450a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(1); 6245edd16368SStephen M. Cameron } else { /* no buffers to fill */ 6246edd16368SStephen M. Cameron c->Header.SGList = 0; 624750a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(0); 6248edd16368SStephen M. Cameron } 6249edd16368SStephen M. Cameron memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN)); 6250edd16368SStephen M. Cameron 6251edd16368SStephen M. Cameron /* Fill in Request block */ 6252edd16368SStephen M. Cameron memcpy(&c->Request, &iocommand.Request, 6253edd16368SStephen M. Cameron sizeof(c->Request)); 6254edd16368SStephen M. Cameron 6255edd16368SStephen M. Cameron /* Fill in the scatter gather information */ 6256edd16368SStephen M. Cameron if (iocommand.buf_size > 0) { 625750a0decfSStephen M. Cameron temp64 = pci_map_single(h->pdev, buff, 6258edd16368SStephen M. Cameron iocommand.buf_size, PCI_DMA_BIDIRECTIONAL); 625950a0decfSStephen M. Cameron if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) { 626050a0decfSStephen M. Cameron c->SG[0].Addr = cpu_to_le64(0); 626150a0decfSStephen M. Cameron c->SG[0].Len = cpu_to_le32(0); 6262bcc48ffaSStephen M. Cameron rc = -ENOMEM; 6263bcc48ffaSStephen M. Cameron goto out; 6264bcc48ffaSStephen M. Cameron } 626550a0decfSStephen M. Cameron c->SG[0].Addr = cpu_to_le64(temp64); 626650a0decfSStephen M. Cameron c->SG[0].Len = cpu_to_le32(iocommand.buf_size); 626750a0decfSStephen M. Cameron c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */ 6268edd16368SStephen M. Cameron } 626925163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT); 6270c2dd32e0SStephen M. Cameron if (iocommand.buf_size > 0) 6271edd16368SStephen M. Cameron hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL); 6272edd16368SStephen M. Cameron check_ioctl_unit_attention(h, c); 627325163bd5SWebb Scales if (rc) { 627425163bd5SWebb Scales rc = -EIO; 627525163bd5SWebb Scales goto out; 627625163bd5SWebb Scales } 6277edd16368SStephen M. Cameron 6278edd16368SStephen M. Cameron /* Copy the error information out */ 6279edd16368SStephen M. Cameron memcpy(&iocommand.error_info, c->err_info, 6280edd16368SStephen M. Cameron sizeof(iocommand.error_info)); 6281edd16368SStephen M. Cameron if (copy_to_user(argp, &iocommand, sizeof(iocommand))) { 6282c1f63c8fSStephen M. Cameron rc = -EFAULT; 6283c1f63c8fSStephen M. Cameron goto out; 6284edd16368SStephen M. Cameron } 62859233fb10SStephen M. Cameron if ((iocommand.Request.Type.Direction & XFER_READ) && 6286b03a7771SStephen M. Cameron iocommand.buf_size > 0) { 6287edd16368SStephen M. Cameron /* Copy the data out of the buffer we created */ 6288edd16368SStephen M. Cameron if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) { 6289c1f63c8fSStephen M. Cameron rc = -EFAULT; 6290c1f63c8fSStephen M. Cameron goto out; 6291edd16368SStephen M. Cameron } 6292edd16368SStephen M. Cameron } 6293c1f63c8fSStephen M. Cameron out: 629445fcb86eSStephen Cameron cmd_free(h, c); 6295c1f63c8fSStephen M. Cameron out_kfree: 6296c1f63c8fSStephen M. Cameron kfree(buff); 6297c1f63c8fSStephen M. Cameron return rc; 6298edd16368SStephen M. Cameron } 6299edd16368SStephen M. Cameron 6300edd16368SStephen M. Cameron static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp) 6301edd16368SStephen M. Cameron { 6302edd16368SStephen M. Cameron BIG_IOCTL_Command_struct *ioc; 6303edd16368SStephen M. Cameron struct CommandList *c; 6304edd16368SStephen M. Cameron unsigned char **buff = NULL; 6305edd16368SStephen M. Cameron int *buff_size = NULL; 630650a0decfSStephen M. Cameron u64 temp64; 6307edd16368SStephen M. Cameron BYTE sg_used = 0; 6308edd16368SStephen M. Cameron int status = 0; 630901a02ffcSStephen M. Cameron u32 left; 631001a02ffcSStephen M. Cameron u32 sz; 6311edd16368SStephen M. Cameron BYTE __user *data_ptr; 6312edd16368SStephen M. Cameron 6313edd16368SStephen M. Cameron if (!argp) 6314edd16368SStephen M. Cameron return -EINVAL; 6315edd16368SStephen M. Cameron if (!capable(CAP_SYS_RAWIO)) 6316edd16368SStephen M. Cameron return -EPERM; 6317edd16368SStephen M. Cameron ioc = (BIG_IOCTL_Command_struct *) 6318edd16368SStephen M. Cameron kmalloc(sizeof(*ioc), GFP_KERNEL); 6319edd16368SStephen M. Cameron if (!ioc) { 6320edd16368SStephen M. Cameron status = -ENOMEM; 6321edd16368SStephen M. Cameron goto cleanup1; 6322edd16368SStephen M. Cameron } 6323edd16368SStephen M. Cameron if (copy_from_user(ioc, argp, sizeof(*ioc))) { 6324edd16368SStephen M. Cameron status = -EFAULT; 6325edd16368SStephen M. Cameron goto cleanup1; 6326edd16368SStephen M. Cameron } 6327edd16368SStephen M. Cameron if ((ioc->buf_size < 1) && 6328edd16368SStephen M. Cameron (ioc->Request.Type.Direction != XFER_NONE)) { 6329edd16368SStephen M. Cameron status = -EINVAL; 6330edd16368SStephen M. Cameron goto cleanup1; 6331edd16368SStephen M. Cameron } 6332edd16368SStephen M. Cameron /* Check kmalloc limits using all SGs */ 6333edd16368SStephen M. Cameron if (ioc->malloc_size > MAX_KMALLOC_SIZE) { 6334edd16368SStephen M. Cameron status = -EINVAL; 6335edd16368SStephen M. Cameron goto cleanup1; 6336edd16368SStephen M. Cameron } 6337d66ae08bSStephen M. Cameron if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) { 6338edd16368SStephen M. Cameron status = -EINVAL; 6339edd16368SStephen M. Cameron goto cleanup1; 6340edd16368SStephen M. Cameron } 6341d66ae08bSStephen M. Cameron buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL); 6342edd16368SStephen M. Cameron if (!buff) { 6343edd16368SStephen M. Cameron status = -ENOMEM; 6344edd16368SStephen M. Cameron goto cleanup1; 6345edd16368SStephen M. Cameron } 6346d66ae08bSStephen M. Cameron buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL); 6347edd16368SStephen M. Cameron if (!buff_size) { 6348edd16368SStephen M. Cameron status = -ENOMEM; 6349edd16368SStephen M. Cameron goto cleanup1; 6350edd16368SStephen M. Cameron } 6351edd16368SStephen M. Cameron left = ioc->buf_size; 6352edd16368SStephen M. Cameron data_ptr = ioc->buf; 6353edd16368SStephen M. Cameron while (left) { 6354edd16368SStephen M. Cameron sz = (left > ioc->malloc_size) ? ioc->malloc_size : left; 6355edd16368SStephen M. Cameron buff_size[sg_used] = sz; 6356edd16368SStephen M. Cameron buff[sg_used] = kmalloc(sz, GFP_KERNEL); 6357edd16368SStephen M. Cameron if (buff[sg_used] == NULL) { 6358edd16368SStephen M. Cameron status = -ENOMEM; 6359edd16368SStephen M. Cameron goto cleanup1; 6360edd16368SStephen M. Cameron } 63619233fb10SStephen M. Cameron if (ioc->Request.Type.Direction & XFER_WRITE) { 6362edd16368SStephen M. Cameron if (copy_from_user(buff[sg_used], data_ptr, sz)) { 63630758f4f7SStephen M. Cameron status = -EFAULT; 6364edd16368SStephen M. Cameron goto cleanup1; 6365edd16368SStephen M. Cameron } 6366edd16368SStephen M. Cameron } else 6367edd16368SStephen M. Cameron memset(buff[sg_used], 0, sz); 6368edd16368SStephen M. Cameron left -= sz; 6369edd16368SStephen M. Cameron data_ptr += sz; 6370edd16368SStephen M. Cameron sg_used++; 6371edd16368SStephen M. Cameron } 637245fcb86eSStephen Cameron c = cmd_alloc(h); 6373bf43caf3SRobert Elliott 6374edd16368SStephen M. Cameron c->cmd_type = CMD_IOCTL_PEND; 6375a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 6376edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; 637750a0decfSStephen M. Cameron c->Header.SGList = (u8) sg_used; 637850a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(sg_used); 6379edd16368SStephen M. Cameron memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN)); 6380edd16368SStephen M. Cameron memcpy(&c->Request, &ioc->Request, sizeof(c->Request)); 6381edd16368SStephen M. Cameron if (ioc->buf_size > 0) { 6382edd16368SStephen M. Cameron int i; 6383edd16368SStephen M. Cameron for (i = 0; i < sg_used; i++) { 638450a0decfSStephen M. Cameron temp64 = pci_map_single(h->pdev, buff[i], 6385edd16368SStephen M. Cameron buff_size[i], PCI_DMA_BIDIRECTIONAL); 638650a0decfSStephen M. Cameron if (dma_mapping_error(&h->pdev->dev, 638750a0decfSStephen M. Cameron (dma_addr_t) temp64)) { 638850a0decfSStephen M. Cameron c->SG[i].Addr = cpu_to_le64(0); 638950a0decfSStephen M. Cameron c->SG[i].Len = cpu_to_le32(0); 6390bcc48ffaSStephen M. Cameron hpsa_pci_unmap(h->pdev, c, i, 6391bcc48ffaSStephen M. Cameron PCI_DMA_BIDIRECTIONAL); 6392bcc48ffaSStephen M. Cameron status = -ENOMEM; 6393e2d4a1f6SStephen M. Cameron goto cleanup0; 6394bcc48ffaSStephen M. Cameron } 639550a0decfSStephen M. Cameron c->SG[i].Addr = cpu_to_le64(temp64); 639650a0decfSStephen M. Cameron c->SG[i].Len = cpu_to_le32(buff_size[i]); 639750a0decfSStephen M. Cameron c->SG[i].Ext = cpu_to_le32(0); 6398edd16368SStephen M. Cameron } 639950a0decfSStephen M. Cameron c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST); 6400edd16368SStephen M. Cameron } 640125163bd5SWebb Scales status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT); 6402b03a7771SStephen M. Cameron if (sg_used) 6403edd16368SStephen M. Cameron hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL); 6404edd16368SStephen M. Cameron check_ioctl_unit_attention(h, c); 640525163bd5SWebb Scales if (status) { 640625163bd5SWebb Scales status = -EIO; 640725163bd5SWebb Scales goto cleanup0; 640825163bd5SWebb Scales } 640925163bd5SWebb Scales 6410edd16368SStephen M. Cameron /* Copy the error information out */ 6411edd16368SStephen M. Cameron memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info)); 6412edd16368SStephen M. Cameron if (copy_to_user(argp, ioc, sizeof(*ioc))) { 6413edd16368SStephen M. Cameron status = -EFAULT; 6414e2d4a1f6SStephen M. Cameron goto cleanup0; 6415edd16368SStephen M. Cameron } 64169233fb10SStephen M. Cameron if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) { 64172b08b3e9SDon Brace int i; 64182b08b3e9SDon Brace 6419edd16368SStephen M. Cameron /* Copy the data out of the buffer we created */ 6420edd16368SStephen M. Cameron BYTE __user *ptr = ioc->buf; 6421edd16368SStephen M. Cameron for (i = 0; i < sg_used; i++) { 6422edd16368SStephen M. Cameron if (copy_to_user(ptr, buff[i], buff_size[i])) { 6423edd16368SStephen M. Cameron status = -EFAULT; 6424e2d4a1f6SStephen M. Cameron goto cleanup0; 6425edd16368SStephen M. Cameron } 6426edd16368SStephen M. Cameron ptr += buff_size[i]; 6427edd16368SStephen M. Cameron } 6428edd16368SStephen M. Cameron } 6429edd16368SStephen M. Cameron status = 0; 6430e2d4a1f6SStephen M. Cameron cleanup0: 643145fcb86eSStephen Cameron cmd_free(h, c); 6432edd16368SStephen M. Cameron cleanup1: 6433edd16368SStephen M. Cameron if (buff) { 64342b08b3e9SDon Brace int i; 64352b08b3e9SDon Brace 6436edd16368SStephen M. Cameron for (i = 0; i < sg_used; i++) 6437edd16368SStephen M. Cameron kfree(buff[i]); 6438edd16368SStephen M. Cameron kfree(buff); 6439edd16368SStephen M. Cameron } 6440edd16368SStephen M. Cameron kfree(buff_size); 6441edd16368SStephen M. Cameron kfree(ioc); 6442edd16368SStephen M. Cameron return status; 6443edd16368SStephen M. Cameron } 6444edd16368SStephen M. Cameron 6445edd16368SStephen M. Cameron static void check_ioctl_unit_attention(struct ctlr_info *h, 6446edd16368SStephen M. Cameron struct CommandList *c) 6447edd16368SStephen M. Cameron { 6448edd16368SStephen M. Cameron if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 6449edd16368SStephen M. Cameron c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) 6450edd16368SStephen M. Cameron (void) check_for_unit_attention(h, c); 6451edd16368SStephen M. Cameron } 64520390f0c0SStephen M. Cameron 6453edd16368SStephen M. Cameron /* 6454edd16368SStephen M. Cameron * ioctl 6455edd16368SStephen M. Cameron */ 645642a91641SDon Brace static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg) 6457edd16368SStephen M. Cameron { 6458edd16368SStephen M. Cameron struct ctlr_info *h; 6459edd16368SStephen M. Cameron void __user *argp = (void __user *)arg; 64600390f0c0SStephen M. Cameron int rc; 6461edd16368SStephen M. Cameron 6462edd16368SStephen M. Cameron h = sdev_to_hba(dev); 6463edd16368SStephen M. Cameron 6464edd16368SStephen M. Cameron switch (cmd) { 6465edd16368SStephen M. Cameron case CCISS_DEREGDISK: 6466edd16368SStephen M. Cameron case CCISS_REGNEWDISK: 6467edd16368SStephen M. Cameron case CCISS_REGNEWD: 6468a08a8471SStephen M. Cameron hpsa_scan_start(h->scsi_host); 6469edd16368SStephen M. Cameron return 0; 6470edd16368SStephen M. Cameron case CCISS_GETPCIINFO: 6471edd16368SStephen M. Cameron return hpsa_getpciinfo_ioctl(h, argp); 6472edd16368SStephen M. Cameron case CCISS_GETDRIVVER: 6473edd16368SStephen M. Cameron return hpsa_getdrivver_ioctl(h, argp); 6474edd16368SStephen M. Cameron case CCISS_PASSTHRU: 647534f0c627SDon Brace if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 64760390f0c0SStephen M. Cameron return -EAGAIN; 64770390f0c0SStephen M. Cameron rc = hpsa_passthru_ioctl(h, argp); 647834f0c627SDon Brace atomic_inc(&h->passthru_cmds_avail); 64790390f0c0SStephen M. Cameron return rc; 6480edd16368SStephen M. Cameron case CCISS_BIG_PASSTHRU: 648134f0c627SDon Brace if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 64820390f0c0SStephen M. Cameron return -EAGAIN; 64830390f0c0SStephen M. Cameron rc = hpsa_big_passthru_ioctl(h, argp); 648434f0c627SDon Brace atomic_inc(&h->passthru_cmds_avail); 64850390f0c0SStephen M. Cameron return rc; 6486edd16368SStephen M. Cameron default: 6487edd16368SStephen M. Cameron return -ENOTTY; 6488edd16368SStephen M. Cameron } 6489edd16368SStephen M. Cameron } 6490edd16368SStephen M. Cameron 6491bf43caf3SRobert Elliott static void hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr, 64926f039790SGreg Kroah-Hartman u8 reset_type) 649364670ac8SStephen M. Cameron { 649464670ac8SStephen M. Cameron struct CommandList *c; 649564670ac8SStephen M. Cameron 649664670ac8SStephen M. Cameron c = cmd_alloc(h); 6497bf43caf3SRobert Elliott 6498a2dac136SStephen M. Cameron /* fill_cmd can't fail here, no data buffer to map */ 6499a2dac136SStephen M. Cameron (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, 650064670ac8SStephen M. Cameron RAID_CTLR_LUNID, TYPE_MSG); 650164670ac8SStephen M. Cameron c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */ 650264670ac8SStephen M. Cameron c->waiting = NULL; 650364670ac8SStephen M. Cameron enqueue_cmd_and_start_io(h, c); 650464670ac8SStephen M. Cameron /* Don't wait for completion, the reset won't complete. Don't free 650564670ac8SStephen M. Cameron * the command either. This is the last command we will send before 650664670ac8SStephen M. Cameron * re-initializing everything, so it doesn't matter and won't leak. 650764670ac8SStephen M. Cameron */ 6508bf43caf3SRobert Elliott return; 650964670ac8SStephen M. Cameron } 651064670ac8SStephen M. Cameron 6511a2dac136SStephen M. Cameron static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 6512b7bb24ebSStephen M. Cameron void *buff, size_t size, u16 page_code, unsigned char *scsi3addr, 6513edd16368SStephen M. Cameron int cmd_type) 6514edd16368SStephen M. Cameron { 6515edd16368SStephen M. Cameron int pci_dir = XFER_NONE; 65169b5c48c2SStephen Cameron u64 tag; /* for commands to be aborted */ 6517edd16368SStephen M. Cameron 6518edd16368SStephen M. Cameron c->cmd_type = CMD_IOCTL_PEND; 6519a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 6520edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; 6521edd16368SStephen M. Cameron if (buff != NULL && size > 0) { 6522edd16368SStephen M. Cameron c->Header.SGList = 1; 652350a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(1); 6524edd16368SStephen M. Cameron } else { 6525edd16368SStephen M. Cameron c->Header.SGList = 0; 652650a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(0); 6527edd16368SStephen M. Cameron } 6528edd16368SStephen M. Cameron memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8); 6529edd16368SStephen M. Cameron 6530edd16368SStephen M. Cameron if (cmd_type == TYPE_CMD) { 6531edd16368SStephen M. Cameron switch (cmd) { 6532edd16368SStephen M. Cameron case HPSA_INQUIRY: 6533edd16368SStephen M. Cameron /* are we trying to read a vital product page */ 6534b7bb24ebSStephen M. Cameron if (page_code & VPD_PAGE) { 6535edd16368SStephen M. Cameron c->Request.CDB[1] = 0x01; 6536b7bb24ebSStephen M. Cameron c->Request.CDB[2] = (page_code & 0xff); 6537edd16368SStephen M. Cameron } 6538edd16368SStephen M. Cameron c->Request.CDBLen = 6; 6539a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6540a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6541edd16368SStephen M. Cameron c->Request.Timeout = 0; 6542edd16368SStephen M. Cameron c->Request.CDB[0] = HPSA_INQUIRY; 6543edd16368SStephen M. Cameron c->Request.CDB[4] = size & 0xFF; 6544edd16368SStephen M. Cameron break; 6545edd16368SStephen M. Cameron case HPSA_REPORT_LOG: 6546edd16368SStephen M. Cameron case HPSA_REPORT_PHYS: 6547edd16368SStephen M. Cameron /* Talking to controller so It's a physical command 6548edd16368SStephen M. Cameron mode = 00 target = 0. Nothing to write. 6549edd16368SStephen M. Cameron */ 6550edd16368SStephen M. Cameron c->Request.CDBLen = 12; 6551a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6552a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6553edd16368SStephen M. Cameron c->Request.Timeout = 0; 6554edd16368SStephen M. Cameron c->Request.CDB[0] = cmd; 6555edd16368SStephen M. Cameron c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 6556edd16368SStephen M. Cameron c->Request.CDB[7] = (size >> 16) & 0xFF; 6557edd16368SStephen M. Cameron c->Request.CDB[8] = (size >> 8) & 0xFF; 6558edd16368SStephen M. Cameron c->Request.CDB[9] = size & 0xFF; 6559edd16368SStephen M. Cameron break; 6560c2adae44SScott Teel case BMIC_SENSE_DIAG_OPTIONS: 6561c2adae44SScott Teel c->Request.CDBLen = 16; 6562c2adae44SScott Teel c->Request.type_attr_dir = 6563c2adae44SScott Teel TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6564c2adae44SScott Teel c->Request.Timeout = 0; 6565c2adae44SScott Teel /* Spec says this should be BMIC_WRITE */ 6566c2adae44SScott Teel c->Request.CDB[0] = BMIC_READ; 6567c2adae44SScott Teel c->Request.CDB[6] = BMIC_SENSE_DIAG_OPTIONS; 6568c2adae44SScott Teel break; 6569c2adae44SScott Teel case BMIC_SET_DIAG_OPTIONS: 6570c2adae44SScott Teel c->Request.CDBLen = 16; 6571c2adae44SScott Teel c->Request.type_attr_dir = 6572c2adae44SScott Teel TYPE_ATTR_DIR(cmd_type, 6573c2adae44SScott Teel ATTR_SIMPLE, XFER_WRITE); 6574c2adae44SScott Teel c->Request.Timeout = 0; 6575c2adae44SScott Teel c->Request.CDB[0] = BMIC_WRITE; 6576c2adae44SScott Teel c->Request.CDB[6] = BMIC_SET_DIAG_OPTIONS; 6577c2adae44SScott Teel break; 6578edd16368SStephen M. Cameron case HPSA_CACHE_FLUSH: 6579edd16368SStephen M. Cameron c->Request.CDBLen = 12; 6580a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6581a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, 6582a505b86fSStephen M. Cameron ATTR_SIMPLE, XFER_WRITE); 6583edd16368SStephen M. Cameron c->Request.Timeout = 0; 6584edd16368SStephen M. Cameron c->Request.CDB[0] = BMIC_WRITE; 6585edd16368SStephen M. Cameron c->Request.CDB[6] = BMIC_CACHE_FLUSH; 6586bb158eabSStephen M. Cameron c->Request.CDB[7] = (size >> 8) & 0xFF; 6587bb158eabSStephen M. Cameron c->Request.CDB[8] = size & 0xFF; 6588edd16368SStephen M. Cameron break; 6589edd16368SStephen M. Cameron case TEST_UNIT_READY: 6590edd16368SStephen M. Cameron c->Request.CDBLen = 6; 6591a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6592a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 6593edd16368SStephen M. Cameron c->Request.Timeout = 0; 6594edd16368SStephen M. Cameron break; 6595283b4a9bSStephen M. Cameron case HPSA_GET_RAID_MAP: 6596283b4a9bSStephen M. Cameron c->Request.CDBLen = 12; 6597a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6598a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6599283b4a9bSStephen M. Cameron c->Request.Timeout = 0; 6600283b4a9bSStephen M. Cameron c->Request.CDB[0] = HPSA_CISS_READ; 6601283b4a9bSStephen M. Cameron c->Request.CDB[1] = cmd; 6602283b4a9bSStephen M. Cameron c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 6603283b4a9bSStephen M. Cameron c->Request.CDB[7] = (size >> 16) & 0xFF; 6604283b4a9bSStephen M. Cameron c->Request.CDB[8] = (size >> 8) & 0xFF; 6605283b4a9bSStephen M. Cameron c->Request.CDB[9] = size & 0xFF; 6606283b4a9bSStephen M. Cameron break; 6607316b221aSStephen M. Cameron case BMIC_SENSE_CONTROLLER_PARAMETERS: 6608316b221aSStephen M. Cameron c->Request.CDBLen = 10; 6609a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6610a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6611316b221aSStephen M. Cameron c->Request.Timeout = 0; 6612316b221aSStephen M. Cameron c->Request.CDB[0] = BMIC_READ; 6613316b221aSStephen M. Cameron c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS; 6614316b221aSStephen M. Cameron c->Request.CDB[7] = (size >> 16) & 0xFF; 6615316b221aSStephen M. Cameron c->Request.CDB[8] = (size >> 8) & 0xFF; 6616316b221aSStephen M. Cameron break; 661703383736SDon Brace case BMIC_IDENTIFY_PHYSICAL_DEVICE: 661803383736SDon Brace c->Request.CDBLen = 10; 661903383736SDon Brace c->Request.type_attr_dir = 662003383736SDon Brace TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 662103383736SDon Brace c->Request.Timeout = 0; 662203383736SDon Brace c->Request.CDB[0] = BMIC_READ; 662303383736SDon Brace c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE; 662403383736SDon Brace c->Request.CDB[7] = (size >> 16) & 0xFF; 662503383736SDon Brace c->Request.CDB[8] = (size >> 8) & 0XFF; 662603383736SDon Brace break; 6627*d04e62b9SKevin Barnett case BMIC_SENSE_SUBSYSTEM_INFORMATION: 6628*d04e62b9SKevin Barnett c->Request.CDBLen = 10; 6629*d04e62b9SKevin Barnett c->Request.type_attr_dir = 6630*d04e62b9SKevin Barnett TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6631*d04e62b9SKevin Barnett c->Request.Timeout = 0; 6632*d04e62b9SKevin Barnett c->Request.CDB[0] = BMIC_READ; 6633*d04e62b9SKevin Barnett c->Request.CDB[6] = BMIC_SENSE_SUBSYSTEM_INFORMATION; 6634*d04e62b9SKevin Barnett c->Request.CDB[7] = (size >> 16) & 0xFF; 6635*d04e62b9SKevin Barnett c->Request.CDB[8] = (size >> 8) & 0XFF; 6636*d04e62b9SKevin Barnett break; 663766749d0dSScott Teel case BMIC_IDENTIFY_CONTROLLER: 663866749d0dSScott Teel c->Request.CDBLen = 10; 663966749d0dSScott Teel c->Request.type_attr_dir = 664066749d0dSScott Teel TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 664166749d0dSScott Teel c->Request.Timeout = 0; 664266749d0dSScott Teel c->Request.CDB[0] = BMIC_READ; 664366749d0dSScott Teel c->Request.CDB[1] = 0; 664466749d0dSScott Teel c->Request.CDB[2] = 0; 664566749d0dSScott Teel c->Request.CDB[3] = 0; 664666749d0dSScott Teel c->Request.CDB[4] = 0; 664766749d0dSScott Teel c->Request.CDB[5] = 0; 664866749d0dSScott Teel c->Request.CDB[6] = BMIC_IDENTIFY_CONTROLLER; 664966749d0dSScott Teel c->Request.CDB[7] = (size >> 16) & 0xFF; 665066749d0dSScott Teel c->Request.CDB[8] = (size >> 8) & 0XFF; 665166749d0dSScott Teel c->Request.CDB[9] = 0; 665266749d0dSScott Teel break; 6653edd16368SStephen M. Cameron default: 6654edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd); 6655edd16368SStephen M. Cameron BUG(); 6656a2dac136SStephen M. Cameron return -1; 6657edd16368SStephen M. Cameron } 6658edd16368SStephen M. Cameron } else if (cmd_type == TYPE_MSG) { 6659edd16368SStephen M. Cameron switch (cmd) { 6660edd16368SStephen M. Cameron 66610b9b7b6eSScott Teel case HPSA_PHYS_TARGET_RESET: 66620b9b7b6eSScott Teel c->Request.CDBLen = 16; 66630b9b7b6eSScott Teel c->Request.type_attr_dir = 66640b9b7b6eSScott Teel TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 66650b9b7b6eSScott Teel c->Request.Timeout = 0; /* Don't time out */ 66660b9b7b6eSScott Teel memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 66670b9b7b6eSScott Teel c->Request.CDB[0] = HPSA_RESET; 66680b9b7b6eSScott Teel c->Request.CDB[1] = HPSA_TARGET_RESET_TYPE; 66690b9b7b6eSScott Teel /* Physical target reset needs no control bytes 4-7*/ 66700b9b7b6eSScott Teel c->Request.CDB[4] = 0x00; 66710b9b7b6eSScott Teel c->Request.CDB[5] = 0x00; 66720b9b7b6eSScott Teel c->Request.CDB[6] = 0x00; 66730b9b7b6eSScott Teel c->Request.CDB[7] = 0x00; 66740b9b7b6eSScott Teel break; 6675edd16368SStephen M. Cameron case HPSA_DEVICE_RESET_MSG: 6676edd16368SStephen M. Cameron c->Request.CDBLen = 16; 6677a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6678a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 6679edd16368SStephen M. Cameron c->Request.Timeout = 0; /* Don't time out */ 668064670ac8SStephen M. Cameron memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 668164670ac8SStephen M. Cameron c->Request.CDB[0] = cmd; 668221e89afdSStephen M. Cameron c->Request.CDB[1] = HPSA_RESET_TYPE_LUN; 6683edd16368SStephen M. Cameron /* If bytes 4-7 are zero, it means reset the */ 6684edd16368SStephen M. Cameron /* LunID device */ 6685edd16368SStephen M. Cameron c->Request.CDB[4] = 0x00; 6686edd16368SStephen M. Cameron c->Request.CDB[5] = 0x00; 6687edd16368SStephen M. Cameron c->Request.CDB[6] = 0x00; 6688edd16368SStephen M. Cameron c->Request.CDB[7] = 0x00; 6689edd16368SStephen M. Cameron break; 669075167d2cSStephen M. Cameron case HPSA_ABORT_MSG: 66919b5c48c2SStephen Cameron memcpy(&tag, buff, sizeof(tag)); 66922b08b3e9SDon Brace dev_dbg(&h->pdev->dev, 66939b5c48c2SStephen Cameron "Abort Tag:0x%016llx using rqst Tag:0x%016llx", 66949b5c48c2SStephen Cameron tag, c->Header.tag); 669575167d2cSStephen M. Cameron c->Request.CDBLen = 16; 6696a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6697a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, 6698a505b86fSStephen M. Cameron ATTR_SIMPLE, XFER_WRITE); 669975167d2cSStephen M. Cameron c->Request.Timeout = 0; /* Don't time out */ 670075167d2cSStephen M. Cameron c->Request.CDB[0] = HPSA_TASK_MANAGEMENT; 670175167d2cSStephen M. Cameron c->Request.CDB[1] = HPSA_TMF_ABORT_TASK; 670275167d2cSStephen M. Cameron c->Request.CDB[2] = 0x00; /* reserved */ 670375167d2cSStephen M. Cameron c->Request.CDB[3] = 0x00; /* reserved */ 670475167d2cSStephen M. Cameron /* Tag to abort goes in CDB[4]-CDB[11] */ 67059b5c48c2SStephen Cameron memcpy(&c->Request.CDB[4], &tag, sizeof(tag)); 670675167d2cSStephen M. Cameron c->Request.CDB[12] = 0x00; /* reserved */ 670775167d2cSStephen M. Cameron c->Request.CDB[13] = 0x00; /* reserved */ 670875167d2cSStephen M. Cameron c->Request.CDB[14] = 0x00; /* reserved */ 670975167d2cSStephen M. Cameron c->Request.CDB[15] = 0x00; /* reserved */ 671075167d2cSStephen M. Cameron break; 6711edd16368SStephen M. Cameron default: 6712edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "unknown message type %d\n", 6713edd16368SStephen M. Cameron cmd); 6714edd16368SStephen M. Cameron BUG(); 6715edd16368SStephen M. Cameron } 6716edd16368SStephen M. Cameron } else { 6717edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type); 6718edd16368SStephen M. Cameron BUG(); 6719edd16368SStephen M. Cameron } 6720edd16368SStephen M. Cameron 6721a505b86fSStephen M. Cameron switch (GET_DIR(c->Request.type_attr_dir)) { 6722edd16368SStephen M. Cameron case XFER_READ: 6723edd16368SStephen M. Cameron pci_dir = PCI_DMA_FROMDEVICE; 6724edd16368SStephen M. Cameron break; 6725edd16368SStephen M. Cameron case XFER_WRITE: 6726edd16368SStephen M. Cameron pci_dir = PCI_DMA_TODEVICE; 6727edd16368SStephen M. Cameron break; 6728edd16368SStephen M. Cameron case XFER_NONE: 6729edd16368SStephen M. Cameron pci_dir = PCI_DMA_NONE; 6730edd16368SStephen M. Cameron break; 6731edd16368SStephen M. Cameron default: 6732edd16368SStephen M. Cameron pci_dir = PCI_DMA_BIDIRECTIONAL; 6733edd16368SStephen M. Cameron } 6734a2dac136SStephen M. Cameron if (hpsa_map_one(h->pdev, c, buff, size, pci_dir)) 6735a2dac136SStephen M. Cameron return -1; 6736a2dac136SStephen M. Cameron return 0; 6737edd16368SStephen M. Cameron } 6738edd16368SStephen M. Cameron 6739edd16368SStephen M. Cameron /* 6740edd16368SStephen M. Cameron * Map (physical) PCI mem into (virtual) kernel space 6741edd16368SStephen M. Cameron */ 6742edd16368SStephen M. Cameron static void __iomem *remap_pci_mem(ulong base, ulong size) 6743edd16368SStephen M. Cameron { 6744edd16368SStephen M. Cameron ulong page_base = ((ulong) base) & PAGE_MASK; 6745edd16368SStephen M. Cameron ulong page_offs = ((ulong) base) - page_base; 6746088ba34cSStephen M. Cameron void __iomem *page_remapped = ioremap_nocache(page_base, 6747088ba34cSStephen M. Cameron page_offs + size); 6748edd16368SStephen M. Cameron 6749edd16368SStephen M. Cameron return page_remapped ? (page_remapped + page_offs) : NULL; 6750edd16368SStephen M. Cameron } 6751edd16368SStephen M. Cameron 6752254f796bSMatt Gates static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q) 6753edd16368SStephen M. Cameron { 6754254f796bSMatt Gates return h->access.command_completed(h, q); 6755edd16368SStephen M. Cameron } 6756edd16368SStephen M. Cameron 6757900c5440SStephen M. Cameron static inline bool interrupt_pending(struct ctlr_info *h) 6758edd16368SStephen M. Cameron { 6759edd16368SStephen M. Cameron return h->access.intr_pending(h); 6760edd16368SStephen M. Cameron } 6761edd16368SStephen M. Cameron 6762edd16368SStephen M. Cameron static inline long interrupt_not_for_us(struct ctlr_info *h) 6763edd16368SStephen M. Cameron { 676410f66018SStephen M. Cameron return (h->access.intr_pending(h) == 0) || 676510f66018SStephen M. Cameron (h->interrupts_enabled == 0); 6766edd16368SStephen M. Cameron } 6767edd16368SStephen M. Cameron 676801a02ffcSStephen M. Cameron static inline int bad_tag(struct ctlr_info *h, u32 tag_index, 676901a02ffcSStephen M. Cameron u32 raw_tag) 6770edd16368SStephen M. Cameron { 6771edd16368SStephen M. Cameron if (unlikely(tag_index >= h->nr_cmds)) { 6772edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag); 6773edd16368SStephen M. Cameron return 1; 6774edd16368SStephen M. Cameron } 6775edd16368SStephen M. Cameron return 0; 6776edd16368SStephen M. Cameron } 6777edd16368SStephen M. Cameron 67785a3d16f5SStephen M. Cameron static inline void finish_cmd(struct CommandList *c) 6779edd16368SStephen M. Cameron { 6780e85c5974SStephen M. Cameron dial_up_lockup_detection_on_fw_flash_complete(c->h, c); 6781c349775eSScott Teel if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI 6782c349775eSScott Teel || c->cmd_type == CMD_IOACCEL2)) 67831fb011fbSStephen M. Cameron complete_scsi_command(c); 67848be986ccSStephen Cameron else if (c->cmd_type == CMD_IOCTL_PEND || c->cmd_type == IOACCEL2_TMF) 6785edd16368SStephen M. Cameron complete(c->waiting); 6786a104c99fSStephen M. Cameron } 6787a104c99fSStephen M. Cameron 6788303932fdSDon Brace /* process completion of an indexed ("direct lookup") command */ 67891d94f94dSStephen M. Cameron static inline void process_indexed_cmd(struct ctlr_info *h, 6790303932fdSDon Brace u32 raw_tag) 6791303932fdSDon Brace { 6792303932fdSDon Brace u32 tag_index; 6793303932fdSDon Brace struct CommandList *c; 6794303932fdSDon Brace 6795f2405db8SDon Brace tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT; 67961d94f94dSStephen M. Cameron if (!bad_tag(h, tag_index, raw_tag)) { 6797303932fdSDon Brace c = h->cmd_pool + tag_index; 67985a3d16f5SStephen M. Cameron finish_cmd(c); 67991d94f94dSStephen M. Cameron } 6800303932fdSDon Brace } 6801303932fdSDon Brace 680264670ac8SStephen M. Cameron /* Some controllers, like p400, will give us one interrupt 680364670ac8SStephen M. Cameron * after a soft reset, even if we turned interrupts off. 680464670ac8SStephen M. Cameron * Only need to check for this in the hpsa_xxx_discard_completions 680564670ac8SStephen M. Cameron * functions. 680664670ac8SStephen M. Cameron */ 680764670ac8SStephen M. Cameron static int ignore_bogus_interrupt(struct ctlr_info *h) 680864670ac8SStephen M. Cameron { 680964670ac8SStephen M. Cameron if (likely(!reset_devices)) 681064670ac8SStephen M. Cameron return 0; 681164670ac8SStephen M. Cameron 681264670ac8SStephen M. Cameron if (likely(h->interrupts_enabled)) 681364670ac8SStephen M. Cameron return 0; 681464670ac8SStephen M. Cameron 681564670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled " 681664670ac8SStephen M. Cameron "(known firmware bug.) Ignoring.\n"); 681764670ac8SStephen M. Cameron 681864670ac8SStephen M. Cameron return 1; 681964670ac8SStephen M. Cameron } 682064670ac8SStephen M. Cameron 6821254f796bSMatt Gates /* 6822254f796bSMatt Gates * Convert &h->q[x] (passed to interrupt handlers) back to h. 6823254f796bSMatt Gates * Relies on (h-q[x] == x) being true for x such that 6824254f796bSMatt Gates * 0 <= x < MAX_REPLY_QUEUES. 6825254f796bSMatt Gates */ 6826254f796bSMatt Gates static struct ctlr_info *queue_to_hba(u8 *queue) 682764670ac8SStephen M. Cameron { 6828254f796bSMatt Gates return container_of((queue - *queue), struct ctlr_info, q[0]); 6829254f796bSMatt Gates } 6830254f796bSMatt Gates 6831254f796bSMatt Gates static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue) 6832254f796bSMatt Gates { 6833254f796bSMatt Gates struct ctlr_info *h = queue_to_hba(queue); 6834254f796bSMatt Gates u8 q = *(u8 *) queue; 683564670ac8SStephen M. Cameron u32 raw_tag; 683664670ac8SStephen M. Cameron 683764670ac8SStephen M. Cameron if (ignore_bogus_interrupt(h)) 683864670ac8SStephen M. Cameron return IRQ_NONE; 683964670ac8SStephen M. Cameron 684064670ac8SStephen M. Cameron if (interrupt_not_for_us(h)) 684164670ac8SStephen M. Cameron return IRQ_NONE; 6842a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 684364670ac8SStephen M. Cameron while (interrupt_pending(h)) { 6844254f796bSMatt Gates raw_tag = get_next_completion(h, q); 684564670ac8SStephen M. Cameron while (raw_tag != FIFO_EMPTY) 6846254f796bSMatt Gates raw_tag = next_command(h, q); 684764670ac8SStephen M. Cameron } 684864670ac8SStephen M. Cameron return IRQ_HANDLED; 684964670ac8SStephen M. Cameron } 685064670ac8SStephen M. Cameron 6851254f796bSMatt Gates static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue) 685264670ac8SStephen M. Cameron { 6853254f796bSMatt Gates struct ctlr_info *h = queue_to_hba(queue); 685464670ac8SStephen M. Cameron u32 raw_tag; 6855254f796bSMatt Gates u8 q = *(u8 *) queue; 685664670ac8SStephen M. Cameron 685764670ac8SStephen M. Cameron if (ignore_bogus_interrupt(h)) 685864670ac8SStephen M. Cameron return IRQ_NONE; 685964670ac8SStephen M. Cameron 6860a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 6861254f796bSMatt Gates raw_tag = get_next_completion(h, q); 686264670ac8SStephen M. Cameron while (raw_tag != FIFO_EMPTY) 6863254f796bSMatt Gates raw_tag = next_command(h, q); 686464670ac8SStephen M. Cameron return IRQ_HANDLED; 686564670ac8SStephen M. Cameron } 686664670ac8SStephen M. Cameron 6867254f796bSMatt Gates static irqreturn_t do_hpsa_intr_intx(int irq, void *queue) 6868edd16368SStephen M. Cameron { 6869254f796bSMatt Gates struct ctlr_info *h = queue_to_hba((u8 *) queue); 6870303932fdSDon Brace u32 raw_tag; 6871254f796bSMatt Gates u8 q = *(u8 *) queue; 6872edd16368SStephen M. Cameron 6873edd16368SStephen M. Cameron if (interrupt_not_for_us(h)) 6874edd16368SStephen M. Cameron return IRQ_NONE; 6875a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 687610f66018SStephen M. Cameron while (interrupt_pending(h)) { 6877254f796bSMatt Gates raw_tag = get_next_completion(h, q); 687810f66018SStephen M. Cameron while (raw_tag != FIFO_EMPTY) { 68791d94f94dSStephen M. Cameron process_indexed_cmd(h, raw_tag); 6880254f796bSMatt Gates raw_tag = next_command(h, q); 688110f66018SStephen M. Cameron } 688210f66018SStephen M. Cameron } 688310f66018SStephen M. Cameron return IRQ_HANDLED; 688410f66018SStephen M. Cameron } 688510f66018SStephen M. Cameron 6886254f796bSMatt Gates static irqreturn_t do_hpsa_intr_msi(int irq, void *queue) 688710f66018SStephen M. Cameron { 6888254f796bSMatt Gates struct ctlr_info *h = queue_to_hba(queue); 688910f66018SStephen M. Cameron u32 raw_tag; 6890254f796bSMatt Gates u8 q = *(u8 *) queue; 689110f66018SStephen M. Cameron 6892a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 6893254f796bSMatt Gates raw_tag = get_next_completion(h, q); 6894303932fdSDon Brace while (raw_tag != FIFO_EMPTY) { 68951d94f94dSStephen M. Cameron process_indexed_cmd(h, raw_tag); 6896254f796bSMatt Gates raw_tag = next_command(h, q); 6897edd16368SStephen M. Cameron } 6898edd16368SStephen M. Cameron return IRQ_HANDLED; 6899edd16368SStephen M. Cameron } 6900edd16368SStephen M. Cameron 6901a9a3a273SStephen M. Cameron /* Send a message CDB to the firmware. Careful, this only works 6902a9a3a273SStephen M. Cameron * in simple mode, not performant mode due to the tag lookup. 6903a9a3a273SStephen M. Cameron * We only ever use this immediately after a controller reset. 6904a9a3a273SStephen M. Cameron */ 69056f039790SGreg Kroah-Hartman static int hpsa_message(struct pci_dev *pdev, unsigned char opcode, 6906edd16368SStephen M. Cameron unsigned char type) 6907edd16368SStephen M. Cameron { 6908edd16368SStephen M. Cameron struct Command { 6909edd16368SStephen M. Cameron struct CommandListHeader CommandHeader; 6910edd16368SStephen M. Cameron struct RequestBlock Request; 6911edd16368SStephen M. Cameron struct ErrDescriptor ErrorDescriptor; 6912edd16368SStephen M. Cameron }; 6913edd16368SStephen M. Cameron struct Command *cmd; 6914edd16368SStephen M. Cameron static const size_t cmd_sz = sizeof(*cmd) + 6915edd16368SStephen M. Cameron sizeof(cmd->ErrorDescriptor); 6916edd16368SStephen M. Cameron dma_addr_t paddr64; 69172b08b3e9SDon Brace __le32 paddr32; 69182b08b3e9SDon Brace u32 tag; 6919edd16368SStephen M. Cameron void __iomem *vaddr; 6920edd16368SStephen M. Cameron int i, err; 6921edd16368SStephen M. Cameron 6922edd16368SStephen M. Cameron vaddr = pci_ioremap_bar(pdev, 0); 6923edd16368SStephen M. Cameron if (vaddr == NULL) 6924edd16368SStephen M. Cameron return -ENOMEM; 6925edd16368SStephen M. Cameron 6926edd16368SStephen M. Cameron /* The Inbound Post Queue only accepts 32-bit physical addresses for the 6927edd16368SStephen M. Cameron * CCISS commands, so they must be allocated from the lower 4GiB of 6928edd16368SStephen M. Cameron * memory. 6929edd16368SStephen M. Cameron */ 6930edd16368SStephen M. Cameron err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 6931edd16368SStephen M. Cameron if (err) { 6932edd16368SStephen M. Cameron iounmap(vaddr); 69331eaec8f3SRobert Elliott return err; 6934edd16368SStephen M. Cameron } 6935edd16368SStephen M. Cameron 6936edd16368SStephen M. Cameron cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64); 6937edd16368SStephen M. Cameron if (cmd == NULL) { 6938edd16368SStephen M. Cameron iounmap(vaddr); 6939edd16368SStephen M. Cameron return -ENOMEM; 6940edd16368SStephen M. Cameron } 6941edd16368SStephen M. Cameron 6942edd16368SStephen M. Cameron /* This must fit, because of the 32-bit consistent DMA mask. Also, 6943edd16368SStephen M. Cameron * although there's no guarantee, we assume that the address is at 6944edd16368SStephen M. Cameron * least 4-byte aligned (most likely, it's page-aligned). 6945edd16368SStephen M. Cameron */ 69462b08b3e9SDon Brace paddr32 = cpu_to_le32(paddr64); 6947edd16368SStephen M. Cameron 6948edd16368SStephen M. Cameron cmd->CommandHeader.ReplyQueue = 0; 6949edd16368SStephen M. Cameron cmd->CommandHeader.SGList = 0; 695050a0decfSStephen M. Cameron cmd->CommandHeader.SGTotal = cpu_to_le16(0); 69512b08b3e9SDon Brace cmd->CommandHeader.tag = cpu_to_le64(paddr64); 6952edd16368SStephen M. Cameron memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8); 6953edd16368SStephen M. Cameron 6954edd16368SStephen M. Cameron cmd->Request.CDBLen = 16; 6955a505b86fSStephen M. Cameron cmd->Request.type_attr_dir = 6956a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE); 6957edd16368SStephen M. Cameron cmd->Request.Timeout = 0; /* Don't time out */ 6958edd16368SStephen M. Cameron cmd->Request.CDB[0] = opcode; 6959edd16368SStephen M. Cameron cmd->Request.CDB[1] = type; 6960edd16368SStephen M. Cameron memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */ 696150a0decfSStephen M. Cameron cmd->ErrorDescriptor.Addr = 69622b08b3e9SDon Brace cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd))); 696350a0decfSStephen M. Cameron cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo)); 6964edd16368SStephen M. Cameron 69652b08b3e9SDon Brace writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET); 6966edd16368SStephen M. Cameron 6967edd16368SStephen M. Cameron for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) { 6968edd16368SStephen M. Cameron tag = readl(vaddr + SA5_REPLY_PORT_OFFSET); 69692b08b3e9SDon Brace if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64) 6970edd16368SStephen M. Cameron break; 6971edd16368SStephen M. Cameron msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS); 6972edd16368SStephen M. Cameron } 6973edd16368SStephen M. Cameron 6974edd16368SStephen M. Cameron iounmap(vaddr); 6975edd16368SStephen M. Cameron 6976edd16368SStephen M. Cameron /* we leak the DMA buffer here ... no choice since the controller could 6977edd16368SStephen M. Cameron * still complete the command. 6978edd16368SStephen M. Cameron */ 6979edd16368SStephen M. Cameron if (i == HPSA_MSG_SEND_RETRY_LIMIT) { 6980edd16368SStephen M. Cameron dev_err(&pdev->dev, "controller message %02x:%02x timed out\n", 6981edd16368SStephen M. Cameron opcode, type); 6982edd16368SStephen M. Cameron return -ETIMEDOUT; 6983edd16368SStephen M. Cameron } 6984edd16368SStephen M. Cameron 6985edd16368SStephen M. Cameron pci_free_consistent(pdev, cmd_sz, cmd, paddr64); 6986edd16368SStephen M. Cameron 6987edd16368SStephen M. Cameron if (tag & HPSA_ERROR_BIT) { 6988edd16368SStephen M. Cameron dev_err(&pdev->dev, "controller message %02x:%02x failed\n", 6989edd16368SStephen M. Cameron opcode, type); 6990edd16368SStephen M. Cameron return -EIO; 6991edd16368SStephen M. Cameron } 6992edd16368SStephen M. Cameron 6993edd16368SStephen M. Cameron dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n", 6994edd16368SStephen M. Cameron opcode, type); 6995edd16368SStephen M. Cameron return 0; 6996edd16368SStephen M. Cameron } 6997edd16368SStephen M. Cameron 6998edd16368SStephen M. Cameron #define hpsa_noop(p) hpsa_message(p, 3, 0) 6999edd16368SStephen M. Cameron 70001df8552aSStephen M. Cameron static int hpsa_controller_hard_reset(struct pci_dev *pdev, 700142a91641SDon Brace void __iomem *vaddr, u32 use_doorbell) 7002edd16368SStephen M. Cameron { 7003edd16368SStephen M. Cameron 70041df8552aSStephen M. Cameron if (use_doorbell) { 70051df8552aSStephen M. Cameron /* For everything after the P600, the PCI power state method 70061df8552aSStephen M. Cameron * of resetting the controller doesn't work, so we have this 70071df8552aSStephen M. Cameron * other way using the doorbell register. 7008edd16368SStephen M. Cameron */ 70091df8552aSStephen M. Cameron dev_info(&pdev->dev, "using doorbell to reset controller\n"); 7010cf0b08d0SStephen M. Cameron writel(use_doorbell, vaddr + SA5_DOORBELL); 701185009239SStephen M. Cameron 701200701a96SJustin Lindley /* PMC hardware guys tell us we need a 10 second delay after 701385009239SStephen M. Cameron * doorbell reset and before any attempt to talk to the board 701485009239SStephen M. Cameron * at all to ensure that this actually works and doesn't fall 701585009239SStephen M. Cameron * over in some weird corner cases. 701685009239SStephen M. Cameron */ 701700701a96SJustin Lindley msleep(10000); 70181df8552aSStephen M. Cameron } else { /* Try to do it the PCI power state way */ 7019edd16368SStephen M. Cameron 7020edd16368SStephen M. Cameron /* Quoting from the Open CISS Specification: "The Power 7021edd16368SStephen M. Cameron * Management Control/Status Register (CSR) controls the power 7022edd16368SStephen M. Cameron * state of the device. The normal operating state is D0, 7023edd16368SStephen M. Cameron * CSR=00h. The software off state is D3, CSR=03h. To reset 70241df8552aSStephen M. Cameron * the controller, place the interface device in D3 then to D0, 70251df8552aSStephen M. Cameron * this causes a secondary PCI reset which will reset the 70261df8552aSStephen M. Cameron * controller." */ 7027edd16368SStephen M. Cameron 70282662cab8SDon Brace int rc = 0; 70292662cab8SDon Brace 70301df8552aSStephen M. Cameron dev_info(&pdev->dev, "using PCI PM to reset controller\n"); 70312662cab8SDon Brace 7032edd16368SStephen M. Cameron /* enter the D3hot power management state */ 70332662cab8SDon Brace rc = pci_set_power_state(pdev, PCI_D3hot); 70342662cab8SDon Brace if (rc) 70352662cab8SDon Brace return rc; 7036edd16368SStephen M. Cameron 7037edd16368SStephen M. Cameron msleep(500); 7038edd16368SStephen M. Cameron 7039edd16368SStephen M. Cameron /* enter the D0 power management state */ 70402662cab8SDon Brace rc = pci_set_power_state(pdev, PCI_D0); 70412662cab8SDon Brace if (rc) 70422662cab8SDon Brace return rc; 7043c4853efeSMike Miller 7044c4853efeSMike Miller /* 7045c4853efeSMike Miller * The P600 requires a small delay when changing states. 7046c4853efeSMike Miller * Otherwise we may think the board did not reset and we bail. 7047c4853efeSMike Miller * This for kdump only and is particular to the P600. 7048c4853efeSMike Miller */ 7049c4853efeSMike Miller msleep(500); 70501df8552aSStephen M. Cameron } 70511df8552aSStephen M. Cameron return 0; 70521df8552aSStephen M. Cameron } 70531df8552aSStephen M. Cameron 70546f039790SGreg Kroah-Hartman static void init_driver_version(char *driver_version, int len) 7055580ada3cSStephen M. Cameron { 7056580ada3cSStephen M. Cameron memset(driver_version, 0, len); 7057f79cfec6SStephen M. Cameron strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1); 7058580ada3cSStephen M. Cameron } 7059580ada3cSStephen M. Cameron 70606f039790SGreg Kroah-Hartman static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable) 7061580ada3cSStephen M. Cameron { 7062580ada3cSStephen M. Cameron char *driver_version; 7063580ada3cSStephen M. Cameron int i, size = sizeof(cfgtable->driver_version); 7064580ada3cSStephen M. Cameron 7065580ada3cSStephen M. Cameron driver_version = kmalloc(size, GFP_KERNEL); 7066580ada3cSStephen M. Cameron if (!driver_version) 7067580ada3cSStephen M. Cameron return -ENOMEM; 7068580ada3cSStephen M. Cameron 7069580ada3cSStephen M. Cameron init_driver_version(driver_version, size); 7070580ada3cSStephen M. Cameron for (i = 0; i < size; i++) 7071580ada3cSStephen M. Cameron writeb(driver_version[i], &cfgtable->driver_version[i]); 7072580ada3cSStephen M. Cameron kfree(driver_version); 7073580ada3cSStephen M. Cameron return 0; 7074580ada3cSStephen M. Cameron } 7075580ada3cSStephen M. Cameron 70766f039790SGreg Kroah-Hartman static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable, 70776f039790SGreg Kroah-Hartman unsigned char *driver_ver) 7078580ada3cSStephen M. Cameron { 7079580ada3cSStephen M. Cameron int i; 7080580ada3cSStephen M. Cameron 7081580ada3cSStephen M. Cameron for (i = 0; i < sizeof(cfgtable->driver_version); i++) 7082580ada3cSStephen M. Cameron driver_ver[i] = readb(&cfgtable->driver_version[i]); 7083580ada3cSStephen M. Cameron } 7084580ada3cSStephen M. Cameron 70856f039790SGreg Kroah-Hartman static int controller_reset_failed(struct CfgTable __iomem *cfgtable) 7086580ada3cSStephen M. Cameron { 7087580ada3cSStephen M. Cameron 7088580ada3cSStephen M. Cameron char *driver_ver, *old_driver_ver; 7089580ada3cSStephen M. Cameron int rc, size = sizeof(cfgtable->driver_version); 7090580ada3cSStephen M. Cameron 7091580ada3cSStephen M. Cameron old_driver_ver = kmalloc(2 * size, GFP_KERNEL); 7092580ada3cSStephen M. Cameron if (!old_driver_ver) 7093580ada3cSStephen M. Cameron return -ENOMEM; 7094580ada3cSStephen M. Cameron driver_ver = old_driver_ver + size; 7095580ada3cSStephen M. Cameron 7096580ada3cSStephen M. Cameron /* After a reset, the 32 bytes of "driver version" in the cfgtable 7097580ada3cSStephen M. Cameron * should have been changed, otherwise we know the reset failed. 7098580ada3cSStephen M. Cameron */ 7099580ada3cSStephen M. Cameron init_driver_version(old_driver_ver, size); 7100580ada3cSStephen M. Cameron read_driver_ver_from_cfgtable(cfgtable, driver_ver); 7101580ada3cSStephen M. Cameron rc = !memcmp(driver_ver, old_driver_ver, size); 7102580ada3cSStephen M. Cameron kfree(old_driver_ver); 7103580ada3cSStephen M. Cameron return rc; 7104580ada3cSStephen M. Cameron } 71051df8552aSStephen M. Cameron /* This does a hard reset of the controller using PCI power management 71061df8552aSStephen M. Cameron * states or the using the doorbell register. 71071df8552aSStephen M. Cameron */ 71086b6c1cd7STomas Henzl static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id) 71091df8552aSStephen M. Cameron { 71101df8552aSStephen M. Cameron u64 cfg_offset; 71111df8552aSStephen M. Cameron u32 cfg_base_addr; 71121df8552aSStephen M. Cameron u64 cfg_base_addr_index; 71131df8552aSStephen M. Cameron void __iomem *vaddr; 71141df8552aSStephen M. Cameron unsigned long paddr; 7115580ada3cSStephen M. Cameron u32 misc_fw_support; 7116270d05deSStephen M. Cameron int rc; 71171df8552aSStephen M. Cameron struct CfgTable __iomem *cfgtable; 7118cf0b08d0SStephen M. Cameron u32 use_doorbell; 7119270d05deSStephen M. Cameron u16 command_register; 71201df8552aSStephen M. Cameron 71211df8552aSStephen M. Cameron /* For controllers as old as the P600, this is very nearly 71221df8552aSStephen M. Cameron * the same thing as 71231df8552aSStephen M. Cameron * 71241df8552aSStephen M. Cameron * pci_save_state(pci_dev); 71251df8552aSStephen M. Cameron * pci_set_power_state(pci_dev, PCI_D3hot); 71261df8552aSStephen M. Cameron * pci_set_power_state(pci_dev, PCI_D0); 71271df8552aSStephen M. Cameron * pci_restore_state(pci_dev); 71281df8552aSStephen M. Cameron * 71291df8552aSStephen M. Cameron * For controllers newer than the P600, the pci power state 71301df8552aSStephen M. Cameron * method of resetting doesn't work so we have another way 71311df8552aSStephen M. Cameron * using the doorbell register. 71321df8552aSStephen M. Cameron */ 713318867659SStephen M. Cameron 713460f923b9SRobert Elliott if (!ctlr_is_resettable(board_id)) { 713560f923b9SRobert Elliott dev_warn(&pdev->dev, "Controller not resettable\n"); 713625c1e56aSStephen M. Cameron return -ENODEV; 713725c1e56aSStephen M. Cameron } 713846380786SStephen M. Cameron 713946380786SStephen M. Cameron /* if controller is soft- but not hard resettable... */ 714046380786SStephen M. Cameron if (!ctlr_is_hard_resettable(board_id)) 714146380786SStephen M. Cameron return -ENOTSUPP; /* try soft reset later. */ 714218867659SStephen M. Cameron 7143270d05deSStephen M. Cameron /* Save the PCI command register */ 7144270d05deSStephen M. Cameron pci_read_config_word(pdev, 4, &command_register); 7145270d05deSStephen M. Cameron pci_save_state(pdev); 71461df8552aSStephen M. Cameron 71471df8552aSStephen M. Cameron /* find the first memory BAR, so we can find the cfg table */ 71481df8552aSStephen M. Cameron rc = hpsa_pci_find_memory_BAR(pdev, &paddr); 71491df8552aSStephen M. Cameron if (rc) 71501df8552aSStephen M. Cameron return rc; 71511df8552aSStephen M. Cameron vaddr = remap_pci_mem(paddr, 0x250); 71521df8552aSStephen M. Cameron if (!vaddr) 71531df8552aSStephen M. Cameron return -ENOMEM; 71541df8552aSStephen M. Cameron 71551df8552aSStephen M. Cameron /* find cfgtable in order to check if reset via doorbell is supported */ 71561df8552aSStephen M. Cameron rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr, 71571df8552aSStephen M. Cameron &cfg_base_addr_index, &cfg_offset); 71581df8552aSStephen M. Cameron if (rc) 71591df8552aSStephen M. Cameron goto unmap_vaddr; 71601df8552aSStephen M. Cameron cfgtable = remap_pci_mem(pci_resource_start(pdev, 71611df8552aSStephen M. Cameron cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable)); 71621df8552aSStephen M. Cameron if (!cfgtable) { 71631df8552aSStephen M. Cameron rc = -ENOMEM; 71641df8552aSStephen M. Cameron goto unmap_vaddr; 71651df8552aSStephen M. Cameron } 7166580ada3cSStephen M. Cameron rc = write_driver_ver_to_cfgtable(cfgtable); 7167580ada3cSStephen M. Cameron if (rc) 716803741d95STomas Henzl goto unmap_cfgtable; 71691df8552aSStephen M. Cameron 7170cf0b08d0SStephen M. Cameron /* If reset via doorbell register is supported, use that. 7171cf0b08d0SStephen M. Cameron * There are two such methods. Favor the newest method. 7172cf0b08d0SStephen M. Cameron */ 71731df8552aSStephen M. Cameron misc_fw_support = readl(&cfgtable->misc_fw_support); 7174cf0b08d0SStephen M. Cameron use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2; 7175cf0b08d0SStephen M. Cameron if (use_doorbell) { 7176cf0b08d0SStephen M. Cameron use_doorbell = DOORBELL_CTLR_RESET2; 7177cf0b08d0SStephen M. Cameron } else { 71781df8552aSStephen M. Cameron use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET; 7179cf0b08d0SStephen M. Cameron if (use_doorbell) { 7180050f7147SStephen Cameron dev_warn(&pdev->dev, 7181050f7147SStephen Cameron "Soft reset not supported. Firmware update is required.\n"); 718264670ac8SStephen M. Cameron rc = -ENOTSUPP; /* try soft reset */ 7183cf0b08d0SStephen M. Cameron goto unmap_cfgtable; 7184cf0b08d0SStephen M. Cameron } 7185cf0b08d0SStephen M. Cameron } 71861df8552aSStephen M. Cameron 71871df8552aSStephen M. Cameron rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell); 71881df8552aSStephen M. Cameron if (rc) 71891df8552aSStephen M. Cameron goto unmap_cfgtable; 7190edd16368SStephen M. Cameron 7191270d05deSStephen M. Cameron pci_restore_state(pdev); 7192270d05deSStephen M. Cameron pci_write_config_word(pdev, 4, command_register); 7193edd16368SStephen M. Cameron 71941df8552aSStephen M. Cameron /* Some devices (notably the HP Smart Array 5i Controller) 71951df8552aSStephen M. Cameron need a little pause here */ 71961df8552aSStephen M. Cameron msleep(HPSA_POST_RESET_PAUSE_MSECS); 71971df8552aSStephen M. Cameron 7198fe5389c8SStephen M. Cameron rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY); 7199fe5389c8SStephen M. Cameron if (rc) { 7200fe5389c8SStephen M. Cameron dev_warn(&pdev->dev, 7201050f7147SStephen Cameron "Failed waiting for board to become ready after hard reset\n"); 7202fe5389c8SStephen M. Cameron goto unmap_cfgtable; 7203fe5389c8SStephen M. Cameron } 7204fe5389c8SStephen M. Cameron 7205580ada3cSStephen M. Cameron rc = controller_reset_failed(vaddr); 7206580ada3cSStephen M. Cameron if (rc < 0) 7207580ada3cSStephen M. Cameron goto unmap_cfgtable; 7208580ada3cSStephen M. Cameron if (rc) { 720964670ac8SStephen M. Cameron dev_warn(&pdev->dev, "Unable to successfully reset " 721064670ac8SStephen M. Cameron "controller. Will try soft reset.\n"); 721164670ac8SStephen M. Cameron rc = -ENOTSUPP; 7212580ada3cSStephen M. Cameron } else { 721364670ac8SStephen M. Cameron dev_info(&pdev->dev, "board ready after hard reset.\n"); 72141df8552aSStephen M. Cameron } 72151df8552aSStephen M. Cameron 72161df8552aSStephen M. Cameron unmap_cfgtable: 72171df8552aSStephen M. Cameron iounmap(cfgtable); 72181df8552aSStephen M. Cameron 72191df8552aSStephen M. Cameron unmap_vaddr: 72201df8552aSStephen M. Cameron iounmap(vaddr); 72211df8552aSStephen M. Cameron return rc; 7222edd16368SStephen M. Cameron } 7223edd16368SStephen M. Cameron 7224edd16368SStephen M. Cameron /* 7225edd16368SStephen M. Cameron * We cannot read the structure directly, for portability we must use 7226edd16368SStephen M. Cameron * the io functions. 7227edd16368SStephen M. Cameron * This is for debug only. 7228edd16368SStephen M. Cameron */ 722942a91641SDon Brace static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb) 7230edd16368SStephen M. Cameron { 723158f8665cSStephen M. Cameron #ifdef HPSA_DEBUG 7232edd16368SStephen M. Cameron int i; 7233edd16368SStephen M. Cameron char temp_name[17]; 7234edd16368SStephen M. Cameron 7235edd16368SStephen M. Cameron dev_info(dev, "Controller Configuration information\n"); 7236edd16368SStephen M. Cameron dev_info(dev, "------------------------------------\n"); 7237edd16368SStephen M. Cameron for (i = 0; i < 4; i++) 7238edd16368SStephen M. Cameron temp_name[i] = readb(&(tb->Signature[i])); 7239edd16368SStephen M. Cameron temp_name[4] = '\0'; 7240edd16368SStephen M. Cameron dev_info(dev, " Signature = %s\n", temp_name); 7241edd16368SStephen M. Cameron dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence))); 7242edd16368SStephen M. Cameron dev_info(dev, " Transport methods supported = 0x%x\n", 7243edd16368SStephen M. Cameron readl(&(tb->TransportSupport))); 7244edd16368SStephen M. Cameron dev_info(dev, " Transport methods active = 0x%x\n", 7245edd16368SStephen M. Cameron readl(&(tb->TransportActive))); 7246edd16368SStephen M. Cameron dev_info(dev, " Requested transport Method = 0x%x\n", 7247edd16368SStephen M. Cameron readl(&(tb->HostWrite.TransportRequest))); 7248edd16368SStephen M. Cameron dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n", 7249edd16368SStephen M. Cameron readl(&(tb->HostWrite.CoalIntDelay))); 7250edd16368SStephen M. Cameron dev_info(dev, " Coalesce Interrupt Count = 0x%x\n", 7251edd16368SStephen M. Cameron readl(&(tb->HostWrite.CoalIntCount))); 725269d6e33dSRobert Elliott dev_info(dev, " Max outstanding commands = %d\n", 7253edd16368SStephen M. Cameron readl(&(tb->CmdsOutMax))); 7254edd16368SStephen M. Cameron dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes))); 7255edd16368SStephen M. Cameron for (i = 0; i < 16; i++) 7256edd16368SStephen M. Cameron temp_name[i] = readb(&(tb->ServerName[i])); 7257edd16368SStephen M. Cameron temp_name[16] = '\0'; 7258edd16368SStephen M. Cameron dev_info(dev, " Server Name = %s\n", temp_name); 7259edd16368SStephen M. Cameron dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n", 7260edd16368SStephen M. Cameron readl(&(tb->HeartBeat))); 7261edd16368SStephen M. Cameron #endif /* HPSA_DEBUG */ 726258f8665cSStephen M. Cameron } 7263edd16368SStephen M. Cameron 7264edd16368SStephen M. Cameron static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr) 7265edd16368SStephen M. Cameron { 7266edd16368SStephen M. Cameron int i, offset, mem_type, bar_type; 7267edd16368SStephen M. Cameron 7268edd16368SStephen M. Cameron if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */ 7269edd16368SStephen M. Cameron return 0; 7270edd16368SStephen M. Cameron offset = 0; 7271edd16368SStephen M. Cameron for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { 7272edd16368SStephen M. Cameron bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE; 7273edd16368SStephen M. Cameron if (bar_type == PCI_BASE_ADDRESS_SPACE_IO) 7274edd16368SStephen M. Cameron offset += 4; 7275edd16368SStephen M. Cameron else { 7276edd16368SStephen M. Cameron mem_type = pci_resource_flags(pdev, i) & 7277edd16368SStephen M. Cameron PCI_BASE_ADDRESS_MEM_TYPE_MASK; 7278edd16368SStephen M. Cameron switch (mem_type) { 7279edd16368SStephen M. Cameron case PCI_BASE_ADDRESS_MEM_TYPE_32: 7280edd16368SStephen M. Cameron case PCI_BASE_ADDRESS_MEM_TYPE_1M: 7281edd16368SStephen M. Cameron offset += 4; /* 32 bit */ 7282edd16368SStephen M. Cameron break; 7283edd16368SStephen M. Cameron case PCI_BASE_ADDRESS_MEM_TYPE_64: 7284edd16368SStephen M. Cameron offset += 8; 7285edd16368SStephen M. Cameron break; 7286edd16368SStephen M. Cameron default: /* reserved in PCI 2.2 */ 7287edd16368SStephen M. Cameron dev_warn(&pdev->dev, 7288edd16368SStephen M. Cameron "base address is invalid\n"); 7289edd16368SStephen M. Cameron return -1; 7290edd16368SStephen M. Cameron break; 7291edd16368SStephen M. Cameron } 7292edd16368SStephen M. Cameron } 7293edd16368SStephen M. Cameron if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0) 7294edd16368SStephen M. Cameron return i + 1; 7295edd16368SStephen M. Cameron } 7296edd16368SStephen M. Cameron return -1; 7297edd16368SStephen M. Cameron } 7298edd16368SStephen M. Cameron 7299cc64c817SRobert Elliott static void hpsa_disable_interrupt_mode(struct ctlr_info *h) 7300cc64c817SRobert Elliott { 7301cc64c817SRobert Elliott if (h->msix_vector) { 7302cc64c817SRobert Elliott if (h->pdev->msix_enabled) 7303cc64c817SRobert Elliott pci_disable_msix(h->pdev); 7304105a3dbcSRobert Elliott h->msix_vector = 0; 7305cc64c817SRobert Elliott } else if (h->msi_vector) { 7306cc64c817SRobert Elliott if (h->pdev->msi_enabled) 7307cc64c817SRobert Elliott pci_disable_msi(h->pdev); 7308105a3dbcSRobert Elliott h->msi_vector = 0; 7309cc64c817SRobert Elliott } 7310cc64c817SRobert Elliott } 7311cc64c817SRobert Elliott 7312edd16368SStephen M. Cameron /* If MSI/MSI-X is supported by the kernel we will try to enable it on 7313050f7147SStephen Cameron * controllers that are capable. If not, we use legacy INTx mode. 7314edd16368SStephen M. Cameron */ 73156f039790SGreg Kroah-Hartman static void hpsa_interrupt_mode(struct ctlr_info *h) 7316edd16368SStephen M. Cameron { 7317edd16368SStephen M. Cameron #ifdef CONFIG_PCI_MSI 7318254f796bSMatt Gates int err, i; 7319254f796bSMatt Gates struct msix_entry hpsa_msix_entries[MAX_REPLY_QUEUES]; 7320254f796bSMatt Gates 7321254f796bSMatt Gates for (i = 0; i < MAX_REPLY_QUEUES; i++) { 7322254f796bSMatt Gates hpsa_msix_entries[i].vector = 0; 7323254f796bSMatt Gates hpsa_msix_entries[i].entry = i; 7324254f796bSMatt Gates } 7325edd16368SStephen M. Cameron 7326edd16368SStephen M. Cameron /* Some boards advertise MSI but don't really support it */ 73276b3f4c52SStephen M. Cameron if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) || 73286b3f4c52SStephen M. Cameron (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11)) 7329edd16368SStephen M. Cameron goto default_int_mode; 733055c06c71SStephen M. Cameron if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) { 7331050f7147SStephen Cameron dev_info(&h->pdev->dev, "MSI-X capable controller\n"); 7332eee0f03aSHannes Reinecke h->msix_vector = MAX_REPLY_QUEUES; 7333f89439bcSStephen M. Cameron if (h->msix_vector > num_online_cpus()) 7334f89439bcSStephen M. Cameron h->msix_vector = num_online_cpus(); 733518fce3c4SAlexander Gordeev err = pci_enable_msix_range(h->pdev, hpsa_msix_entries, 733618fce3c4SAlexander Gordeev 1, h->msix_vector); 733718fce3c4SAlexander Gordeev if (err < 0) { 733818fce3c4SAlexander Gordeev dev_warn(&h->pdev->dev, "MSI-X init failed %d\n", err); 733918fce3c4SAlexander Gordeev h->msix_vector = 0; 734018fce3c4SAlexander Gordeev goto single_msi_mode; 734118fce3c4SAlexander Gordeev } else if (err < h->msix_vector) { 734255c06c71SStephen M. Cameron dev_warn(&h->pdev->dev, "only %d MSI-X vectors " 7343edd16368SStephen M. Cameron "available\n", err); 7344eee0f03aSHannes Reinecke } 734518fce3c4SAlexander Gordeev h->msix_vector = err; 7346eee0f03aSHannes Reinecke for (i = 0; i < h->msix_vector; i++) 7347eee0f03aSHannes Reinecke h->intr[i] = hpsa_msix_entries[i].vector; 7348eee0f03aSHannes Reinecke return; 7349edd16368SStephen M. Cameron } 735018fce3c4SAlexander Gordeev single_msi_mode: 735155c06c71SStephen M. Cameron if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) { 7352050f7147SStephen Cameron dev_info(&h->pdev->dev, "MSI capable controller\n"); 735355c06c71SStephen M. Cameron if (!pci_enable_msi(h->pdev)) 7354edd16368SStephen M. Cameron h->msi_vector = 1; 7355edd16368SStephen M. Cameron else 735655c06c71SStephen M. Cameron dev_warn(&h->pdev->dev, "MSI init failed\n"); 7357edd16368SStephen M. Cameron } 7358edd16368SStephen M. Cameron default_int_mode: 7359edd16368SStephen M. Cameron #endif /* CONFIG_PCI_MSI */ 7360edd16368SStephen M. Cameron /* if we get here we're going to use the default interrupt mode */ 7361a9a3a273SStephen M. Cameron h->intr[h->intr_mode] = h->pdev->irq; 7362edd16368SStephen M. Cameron } 7363edd16368SStephen M. Cameron 73646f039790SGreg Kroah-Hartman static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id) 7365e5c880d1SStephen M. Cameron { 7366e5c880d1SStephen M. Cameron int i; 7367e5c880d1SStephen M. Cameron u32 subsystem_vendor_id, subsystem_device_id; 7368e5c880d1SStephen M. Cameron 7369e5c880d1SStephen M. Cameron subsystem_vendor_id = pdev->subsystem_vendor; 7370e5c880d1SStephen M. Cameron subsystem_device_id = pdev->subsystem_device; 7371e5c880d1SStephen M. Cameron *board_id = ((subsystem_device_id << 16) & 0xffff0000) | 7372e5c880d1SStephen M. Cameron subsystem_vendor_id; 7373e5c880d1SStephen M. Cameron 7374e5c880d1SStephen M. Cameron for (i = 0; i < ARRAY_SIZE(products); i++) 7375e5c880d1SStephen M. Cameron if (*board_id == products[i].board_id) 7376e5c880d1SStephen M. Cameron return i; 7377e5c880d1SStephen M. Cameron 73786798cc0aSStephen M. Cameron if ((subsystem_vendor_id != PCI_VENDOR_ID_HP && 73796798cc0aSStephen M. Cameron subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) || 73806798cc0aSStephen M. Cameron !hpsa_allow_any) { 7381e5c880d1SStephen M. Cameron dev_warn(&pdev->dev, "unrecognized board ID: " 7382e5c880d1SStephen M. Cameron "0x%08x, ignoring.\n", *board_id); 7383e5c880d1SStephen M. Cameron return -ENODEV; 7384e5c880d1SStephen M. Cameron } 7385e5c880d1SStephen M. Cameron return ARRAY_SIZE(products) - 1; /* generic unknown smart array */ 7386e5c880d1SStephen M. Cameron } 7387e5c880d1SStephen M. Cameron 73886f039790SGreg Kroah-Hartman static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 73893a7774ceSStephen M. Cameron unsigned long *memory_bar) 73903a7774ceSStephen M. Cameron { 73913a7774ceSStephen M. Cameron int i; 73923a7774ceSStephen M. Cameron 73933a7774ceSStephen M. Cameron for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) 739412d2cd47SStephen M. Cameron if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) { 73953a7774ceSStephen M. Cameron /* addressing mode bits already removed */ 739612d2cd47SStephen M. Cameron *memory_bar = pci_resource_start(pdev, i); 739712d2cd47SStephen M. Cameron dev_dbg(&pdev->dev, "memory BAR = %lx\n", 73983a7774ceSStephen M. Cameron *memory_bar); 73993a7774ceSStephen M. Cameron return 0; 74003a7774ceSStephen M. Cameron } 740112d2cd47SStephen M. Cameron dev_warn(&pdev->dev, "no memory BAR found\n"); 74023a7774ceSStephen M. Cameron return -ENODEV; 74033a7774ceSStephen M. Cameron } 74043a7774ceSStephen M. Cameron 74056f039790SGreg Kroah-Hartman static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 74066f039790SGreg Kroah-Hartman int wait_for_ready) 74072c4c8c8bSStephen M. Cameron { 7408fe5389c8SStephen M. Cameron int i, iterations; 74092c4c8c8bSStephen M. Cameron u32 scratchpad; 7410fe5389c8SStephen M. Cameron if (wait_for_ready) 7411fe5389c8SStephen M. Cameron iterations = HPSA_BOARD_READY_ITERATIONS; 7412fe5389c8SStephen M. Cameron else 7413fe5389c8SStephen M. Cameron iterations = HPSA_BOARD_NOT_READY_ITERATIONS; 74142c4c8c8bSStephen M. Cameron 7415fe5389c8SStephen M. Cameron for (i = 0; i < iterations; i++) { 7416fe5389c8SStephen M. Cameron scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET); 7417fe5389c8SStephen M. Cameron if (wait_for_ready) { 74182c4c8c8bSStephen M. Cameron if (scratchpad == HPSA_FIRMWARE_READY) 74192c4c8c8bSStephen M. Cameron return 0; 7420fe5389c8SStephen M. Cameron } else { 7421fe5389c8SStephen M. Cameron if (scratchpad != HPSA_FIRMWARE_READY) 7422fe5389c8SStephen M. Cameron return 0; 7423fe5389c8SStephen M. Cameron } 74242c4c8c8bSStephen M. Cameron msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS); 74252c4c8c8bSStephen M. Cameron } 7426fe5389c8SStephen M. Cameron dev_warn(&pdev->dev, "board not ready, timed out.\n"); 74272c4c8c8bSStephen M. Cameron return -ENODEV; 74282c4c8c8bSStephen M. Cameron } 74292c4c8c8bSStephen M. Cameron 74306f039790SGreg Kroah-Hartman static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 74316f039790SGreg Kroah-Hartman u32 *cfg_base_addr, u64 *cfg_base_addr_index, 7432a51fd47fSStephen M. Cameron u64 *cfg_offset) 7433a51fd47fSStephen M. Cameron { 7434a51fd47fSStephen M. Cameron *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET); 7435a51fd47fSStephen M. Cameron *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET); 7436a51fd47fSStephen M. Cameron *cfg_base_addr &= (u32) 0x0000ffff; 7437a51fd47fSStephen M. Cameron *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr); 7438a51fd47fSStephen M. Cameron if (*cfg_base_addr_index == -1) { 7439a51fd47fSStephen M. Cameron dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n"); 7440a51fd47fSStephen M. Cameron return -ENODEV; 7441a51fd47fSStephen M. Cameron } 7442a51fd47fSStephen M. Cameron return 0; 7443a51fd47fSStephen M. Cameron } 7444a51fd47fSStephen M. Cameron 7445195f2c65SRobert Elliott static void hpsa_free_cfgtables(struct ctlr_info *h) 7446195f2c65SRobert Elliott { 7447105a3dbcSRobert Elliott if (h->transtable) { 7448195f2c65SRobert Elliott iounmap(h->transtable); 7449105a3dbcSRobert Elliott h->transtable = NULL; 7450105a3dbcSRobert Elliott } 7451105a3dbcSRobert Elliott if (h->cfgtable) { 7452195f2c65SRobert Elliott iounmap(h->cfgtable); 7453105a3dbcSRobert Elliott h->cfgtable = NULL; 7454105a3dbcSRobert Elliott } 7455195f2c65SRobert Elliott } 7456195f2c65SRobert Elliott 7457195f2c65SRobert Elliott /* Find and map CISS config table and transfer table 7458195f2c65SRobert Elliott + * several items must be unmapped (freed) later 7459195f2c65SRobert Elliott + * */ 74606f039790SGreg Kroah-Hartman static int hpsa_find_cfgtables(struct ctlr_info *h) 7461edd16368SStephen M. Cameron { 746201a02ffcSStephen M. Cameron u64 cfg_offset; 746301a02ffcSStephen M. Cameron u32 cfg_base_addr; 746401a02ffcSStephen M. Cameron u64 cfg_base_addr_index; 7465303932fdSDon Brace u32 trans_offset; 7466a51fd47fSStephen M. Cameron int rc; 746777c4495cSStephen M. Cameron 7468a51fd47fSStephen M. Cameron rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 7469a51fd47fSStephen M. Cameron &cfg_base_addr_index, &cfg_offset); 7470a51fd47fSStephen M. Cameron if (rc) 7471a51fd47fSStephen M. Cameron return rc; 747277c4495cSStephen M. Cameron h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev, 7473a51fd47fSStephen M. Cameron cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable)); 7474cd3c81c4SRobert Elliott if (!h->cfgtable) { 7475cd3c81c4SRobert Elliott dev_err(&h->pdev->dev, "Failed mapping cfgtable\n"); 747677c4495cSStephen M. Cameron return -ENOMEM; 7477cd3c81c4SRobert Elliott } 7478580ada3cSStephen M. Cameron rc = write_driver_ver_to_cfgtable(h->cfgtable); 7479580ada3cSStephen M. Cameron if (rc) 7480580ada3cSStephen M. Cameron return rc; 748177c4495cSStephen M. Cameron /* Find performant mode table. */ 7482a51fd47fSStephen M. Cameron trans_offset = readl(&h->cfgtable->TransMethodOffset); 748377c4495cSStephen M. Cameron h->transtable = remap_pci_mem(pci_resource_start(h->pdev, 748477c4495cSStephen M. Cameron cfg_base_addr_index)+cfg_offset+trans_offset, 748577c4495cSStephen M. Cameron sizeof(*h->transtable)); 7486195f2c65SRobert Elliott if (!h->transtable) { 7487195f2c65SRobert Elliott dev_err(&h->pdev->dev, "Failed mapping transfer table\n"); 7488195f2c65SRobert Elliott hpsa_free_cfgtables(h); 748977c4495cSStephen M. Cameron return -ENOMEM; 7490195f2c65SRobert Elliott } 749177c4495cSStephen M. Cameron return 0; 749277c4495cSStephen M. Cameron } 749377c4495cSStephen M. Cameron 74946f039790SGreg Kroah-Hartman static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h) 7495cba3d38bSStephen M. Cameron { 749641ce4c35SStephen Cameron #define MIN_MAX_COMMANDS 16 749741ce4c35SStephen Cameron BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS); 749841ce4c35SStephen Cameron 749941ce4c35SStephen Cameron h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands); 750072ceeaecSStephen M. Cameron 750172ceeaecSStephen M. Cameron /* Limit commands in memory limited kdump scenario. */ 750272ceeaecSStephen M. Cameron if (reset_devices && h->max_commands > 32) 750372ceeaecSStephen M. Cameron h->max_commands = 32; 750472ceeaecSStephen M. Cameron 750541ce4c35SStephen Cameron if (h->max_commands < MIN_MAX_COMMANDS) { 750641ce4c35SStephen Cameron dev_warn(&h->pdev->dev, 750741ce4c35SStephen Cameron "Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n", 750841ce4c35SStephen Cameron h->max_commands, 750941ce4c35SStephen Cameron MIN_MAX_COMMANDS); 751041ce4c35SStephen Cameron h->max_commands = MIN_MAX_COMMANDS; 7511cba3d38bSStephen M. Cameron } 7512cba3d38bSStephen M. Cameron } 7513cba3d38bSStephen M. Cameron 7514c7ee65b3SWebb Scales /* If the controller reports that the total max sg entries is greater than 512, 7515c7ee65b3SWebb Scales * then we know that chained SG blocks work. (Original smart arrays did not 7516c7ee65b3SWebb Scales * support chained SG blocks and would return zero for max sg entries.) 7517c7ee65b3SWebb Scales */ 7518c7ee65b3SWebb Scales static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h) 7519c7ee65b3SWebb Scales { 7520c7ee65b3SWebb Scales return h->maxsgentries > 512; 7521c7ee65b3SWebb Scales } 7522c7ee65b3SWebb Scales 7523b93d7536SStephen M. Cameron /* Interrogate the hardware for some limits: 7524b93d7536SStephen M. Cameron * max commands, max SG elements without chaining, and with chaining, 7525b93d7536SStephen M. Cameron * SG chain block size, etc. 7526b93d7536SStephen M. Cameron */ 75276f039790SGreg Kroah-Hartman static void hpsa_find_board_params(struct ctlr_info *h) 7528b93d7536SStephen M. Cameron { 7529cba3d38bSStephen M. Cameron hpsa_get_max_perf_mode_cmds(h); 753045fcb86eSStephen Cameron h->nr_cmds = h->max_commands; 7531b93d7536SStephen M. Cameron h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements)); 7532283b4a9bSStephen M. Cameron h->fw_support = readl(&(h->cfgtable->misc_fw_support)); 7533c7ee65b3SWebb Scales if (hpsa_supports_chained_sg_blocks(h)) { 7534c7ee65b3SWebb Scales /* Limit in-command s/g elements to 32 save dma'able memory. */ 7535b93d7536SStephen M. Cameron h->max_cmd_sg_entries = 32; 75361a63ea6fSWebb Scales h->chainsize = h->maxsgentries - h->max_cmd_sg_entries; 7537b93d7536SStephen M. Cameron h->maxsgentries--; /* save one for chain pointer */ 7538b93d7536SStephen M. Cameron } else { 7539c7ee65b3SWebb Scales /* 7540c7ee65b3SWebb Scales * Original smart arrays supported at most 31 s/g entries 7541c7ee65b3SWebb Scales * embedded inline in the command (trying to use more 7542c7ee65b3SWebb Scales * would lock up the controller) 7543c7ee65b3SWebb Scales */ 7544c7ee65b3SWebb Scales h->max_cmd_sg_entries = 31; 75451a63ea6fSWebb Scales h->maxsgentries = 31; /* default to traditional values */ 7546c7ee65b3SWebb Scales h->chainsize = 0; 7547b93d7536SStephen M. Cameron } 754875167d2cSStephen M. Cameron 754975167d2cSStephen M. Cameron /* Find out what task management functions are supported and cache */ 755075167d2cSStephen M. Cameron h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags)); 75510e7a7fceSScott Teel if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags)) 75520e7a7fceSScott Teel dev_warn(&h->pdev->dev, "Physical aborts not supported\n"); 75530e7a7fceSScott Teel if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags)) 75540e7a7fceSScott Teel dev_warn(&h->pdev->dev, "Logical aborts not supported\n"); 75558be986ccSStephen Cameron if (!(HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags)) 75568be986ccSStephen Cameron dev_warn(&h->pdev->dev, "HP SSD Smart Path aborts not supported\n"); 7557b93d7536SStephen M. Cameron } 7558b93d7536SStephen M. Cameron 755976c46e49SStephen M. Cameron static inline bool hpsa_CISS_signature_present(struct ctlr_info *h) 756076c46e49SStephen M. Cameron { 75610fc9fd40SAkinobu Mita if (!check_signature(h->cfgtable->Signature, "CISS", 4)) { 7562050f7147SStephen Cameron dev_err(&h->pdev->dev, "not a valid CISS config table\n"); 756376c46e49SStephen M. Cameron return false; 756476c46e49SStephen M. Cameron } 756576c46e49SStephen M. Cameron return true; 756676c46e49SStephen M. Cameron } 756776c46e49SStephen M. Cameron 756897a5e98cSStephen M. Cameron static inline void hpsa_set_driver_support_bits(struct ctlr_info *h) 7569f7c39101SStephen M. Cameron { 757097a5e98cSStephen M. Cameron u32 driver_support; 7571f7c39101SStephen M. Cameron 757297a5e98cSStephen M. Cameron driver_support = readl(&(h->cfgtable->driver_support)); 75730b9e7b74SArnd Bergmann /* Need to enable prefetch in the SCSI core for 6400 in x86 */ 75740b9e7b74SArnd Bergmann #ifdef CONFIG_X86 757597a5e98cSStephen M. Cameron driver_support |= ENABLE_SCSI_PREFETCH; 7576f7c39101SStephen M. Cameron #endif 757728e13446SStephen M. Cameron driver_support |= ENABLE_UNIT_ATTN; 757828e13446SStephen M. Cameron writel(driver_support, &(h->cfgtable->driver_support)); 7579f7c39101SStephen M. Cameron } 7580f7c39101SStephen M. Cameron 75813d0eab67SStephen M. Cameron /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result 75823d0eab67SStephen M. Cameron * in a prefetch beyond physical memory. 75833d0eab67SStephen M. Cameron */ 75843d0eab67SStephen M. Cameron static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h) 75853d0eab67SStephen M. Cameron { 75863d0eab67SStephen M. Cameron u32 dma_prefetch; 75873d0eab67SStephen M. Cameron 75883d0eab67SStephen M. Cameron if (h->board_id != 0x3225103C) 75893d0eab67SStephen M. Cameron return; 75903d0eab67SStephen M. Cameron dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG); 75913d0eab67SStephen M. Cameron dma_prefetch |= 0x8000; 75923d0eab67SStephen M. Cameron writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG); 75933d0eab67SStephen M. Cameron } 75943d0eab67SStephen M. Cameron 7595c706a795SRobert Elliott static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h) 759676438d08SStephen M. Cameron { 759776438d08SStephen M. Cameron int i; 759876438d08SStephen M. Cameron u32 doorbell_value; 759976438d08SStephen M. Cameron unsigned long flags; 760076438d08SStephen M. Cameron /* wait until the clear_event_notify bit 6 is cleared by controller. */ 7601007e7aa9SRobert Elliott for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) { 760276438d08SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 760376438d08SStephen M. Cameron doorbell_value = readl(h->vaddr + SA5_DOORBELL); 760476438d08SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 760576438d08SStephen M. Cameron if (!(doorbell_value & DOORBELL_CLEAR_EVENTS)) 7606c706a795SRobert Elliott goto done; 760776438d08SStephen M. Cameron /* delay and try again */ 7608007e7aa9SRobert Elliott msleep(CLEAR_EVENT_WAIT_INTERVAL); 760976438d08SStephen M. Cameron } 7610c706a795SRobert Elliott return -ENODEV; 7611c706a795SRobert Elliott done: 7612c706a795SRobert Elliott return 0; 761376438d08SStephen M. Cameron } 761476438d08SStephen M. Cameron 7615c706a795SRobert Elliott static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h) 7616eb6b2ae9SStephen M. Cameron { 7617eb6b2ae9SStephen M. Cameron int i; 76186eaf46fdSStephen M. Cameron u32 doorbell_value; 76196eaf46fdSStephen M. Cameron unsigned long flags; 7620eb6b2ae9SStephen M. Cameron 7621eb6b2ae9SStephen M. Cameron /* under certain very rare conditions, this can take awhile. 7622eb6b2ae9SStephen M. Cameron * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right 7623eb6b2ae9SStephen M. Cameron * as we enter this code.) 7624eb6b2ae9SStephen M. Cameron */ 7625007e7aa9SRobert Elliott for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) { 762625163bd5SWebb Scales if (h->remove_in_progress) 762725163bd5SWebb Scales goto done; 76286eaf46fdSStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 76296eaf46fdSStephen M. Cameron doorbell_value = readl(h->vaddr + SA5_DOORBELL); 76306eaf46fdSStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 7631382be668SDan Carpenter if (!(doorbell_value & CFGTBL_ChangeReq)) 7632c706a795SRobert Elliott goto done; 7633eb6b2ae9SStephen M. Cameron /* delay and try again */ 7634007e7aa9SRobert Elliott msleep(MODE_CHANGE_WAIT_INTERVAL); 7635eb6b2ae9SStephen M. Cameron } 7636c706a795SRobert Elliott return -ENODEV; 7637c706a795SRobert Elliott done: 7638c706a795SRobert Elliott return 0; 76393f4336f3SStephen M. Cameron } 76403f4336f3SStephen M. Cameron 7641c706a795SRobert Elliott /* return -ENODEV or other reason on error, 0 on success */ 76426f039790SGreg Kroah-Hartman static int hpsa_enter_simple_mode(struct ctlr_info *h) 76433f4336f3SStephen M. Cameron { 76443f4336f3SStephen M. Cameron u32 trans_support; 76453f4336f3SStephen M. Cameron 76463f4336f3SStephen M. Cameron trans_support = readl(&(h->cfgtable->TransportSupport)); 76473f4336f3SStephen M. Cameron if (!(trans_support & SIMPLE_MODE)) 76483f4336f3SStephen M. Cameron return -ENOTSUPP; 76493f4336f3SStephen M. Cameron 76503f4336f3SStephen M. Cameron h->max_commands = readl(&(h->cfgtable->CmdsOutMax)); 7651283b4a9bSStephen M. Cameron 76523f4336f3SStephen M. Cameron /* Update the field, and then ring the doorbell */ 76533f4336f3SStephen M. Cameron writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest)); 7654b9af4937SStephen M. Cameron writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi); 76553f4336f3SStephen M. Cameron writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 7656c706a795SRobert Elliott if (hpsa_wait_for_mode_change_ack(h)) 7657c706a795SRobert Elliott goto error; 7658eb6b2ae9SStephen M. Cameron print_cfg_table(&h->pdev->dev, h->cfgtable); 7659283b4a9bSStephen M. Cameron if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) 7660283b4a9bSStephen M. Cameron goto error; 7661960a30e7SStephen M. Cameron h->transMethod = CFGTBL_Trans_Simple; 7662eb6b2ae9SStephen M. Cameron return 0; 7663283b4a9bSStephen M. Cameron error: 7664050f7147SStephen Cameron dev_err(&h->pdev->dev, "failed to enter simple mode\n"); 7665283b4a9bSStephen M. Cameron return -ENODEV; 7666eb6b2ae9SStephen M. Cameron } 7667eb6b2ae9SStephen M. Cameron 7668195f2c65SRobert Elliott /* free items allocated or mapped by hpsa_pci_init */ 7669195f2c65SRobert Elliott static void hpsa_free_pci_init(struct ctlr_info *h) 7670195f2c65SRobert Elliott { 7671195f2c65SRobert Elliott hpsa_free_cfgtables(h); /* pci_init 4 */ 7672195f2c65SRobert Elliott iounmap(h->vaddr); /* pci_init 3 */ 7673105a3dbcSRobert Elliott h->vaddr = NULL; 7674195f2c65SRobert Elliott hpsa_disable_interrupt_mode(h); /* pci_init 2 */ 7675943a7021SRobert Elliott /* 7676943a7021SRobert Elliott * call pci_disable_device before pci_release_regions per 7677943a7021SRobert Elliott * Documentation/PCI/pci.txt 7678943a7021SRobert Elliott */ 7679195f2c65SRobert Elliott pci_disable_device(h->pdev); /* pci_init 1 */ 7680943a7021SRobert Elliott pci_release_regions(h->pdev); /* pci_init 2 */ 7681195f2c65SRobert Elliott } 7682195f2c65SRobert Elliott 7683195f2c65SRobert Elliott /* several items must be freed later */ 76846f039790SGreg Kroah-Hartman static int hpsa_pci_init(struct ctlr_info *h) 768577c4495cSStephen M. Cameron { 7686eb6b2ae9SStephen M. Cameron int prod_index, err; 7687edd16368SStephen M. Cameron 7688e5c880d1SStephen M. Cameron prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id); 7689e5c880d1SStephen M. Cameron if (prod_index < 0) 769060f923b9SRobert Elliott return prod_index; 7691e5c880d1SStephen M. Cameron h->product_name = products[prod_index].product_name; 7692e5c880d1SStephen M. Cameron h->access = *(products[prod_index].access); 7693e5c880d1SStephen M. Cameron 76949b5c48c2SStephen Cameron h->needs_abort_tags_swizzled = 76959b5c48c2SStephen Cameron ctlr_needs_abort_tags_swizzled(h->board_id); 76969b5c48c2SStephen Cameron 7697e5a44df8SMatthew Garrett pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S | 7698e5a44df8SMatthew Garrett PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM); 7699e5a44df8SMatthew Garrett 770055c06c71SStephen M. Cameron err = pci_enable_device(h->pdev); 7701edd16368SStephen M. Cameron if (err) { 7702195f2c65SRobert Elliott dev_err(&h->pdev->dev, "failed to enable PCI device\n"); 7703943a7021SRobert Elliott pci_disable_device(h->pdev); 7704edd16368SStephen M. Cameron return err; 7705edd16368SStephen M. Cameron } 7706edd16368SStephen M. Cameron 7707f79cfec6SStephen M. Cameron err = pci_request_regions(h->pdev, HPSA); 7708edd16368SStephen M. Cameron if (err) { 770955c06c71SStephen M. Cameron dev_err(&h->pdev->dev, 7710195f2c65SRobert Elliott "failed to obtain PCI resources\n"); 7711943a7021SRobert Elliott pci_disable_device(h->pdev); 7712943a7021SRobert Elliott return err; 7713edd16368SStephen M. Cameron } 77144fa604e1SRobert Elliott 77154fa604e1SRobert Elliott pci_set_master(h->pdev); 77164fa604e1SRobert Elliott 77176b3f4c52SStephen M. Cameron hpsa_interrupt_mode(h); 771812d2cd47SStephen M. Cameron err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr); 77193a7774ceSStephen M. Cameron if (err) 7720195f2c65SRobert Elliott goto clean2; /* intmode+region, pci */ 7721edd16368SStephen M. Cameron h->vaddr = remap_pci_mem(h->paddr, 0x250); 7722204892e9SStephen M. Cameron if (!h->vaddr) { 7723195f2c65SRobert Elliott dev_err(&h->pdev->dev, "failed to remap PCI mem\n"); 7724204892e9SStephen M. Cameron err = -ENOMEM; 7725195f2c65SRobert Elliott goto clean2; /* intmode+region, pci */ 7726204892e9SStephen M. Cameron } 7727fe5389c8SStephen M. Cameron err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 77282c4c8c8bSStephen M. Cameron if (err) 7729195f2c65SRobert Elliott goto clean3; /* vaddr, intmode+region, pci */ 773077c4495cSStephen M. Cameron err = hpsa_find_cfgtables(h); 773177c4495cSStephen M. Cameron if (err) 7732195f2c65SRobert Elliott goto clean3; /* vaddr, intmode+region, pci */ 7733b93d7536SStephen M. Cameron hpsa_find_board_params(h); 7734edd16368SStephen M. Cameron 773576c46e49SStephen M. Cameron if (!hpsa_CISS_signature_present(h)) { 7736edd16368SStephen M. Cameron err = -ENODEV; 7737195f2c65SRobert Elliott goto clean4; /* cfgtables, vaddr, intmode+region, pci */ 7738edd16368SStephen M. Cameron } 773997a5e98cSStephen M. Cameron hpsa_set_driver_support_bits(h); 77403d0eab67SStephen M. Cameron hpsa_p600_dma_prefetch_quirk(h); 7741eb6b2ae9SStephen M. Cameron err = hpsa_enter_simple_mode(h); 7742eb6b2ae9SStephen M. Cameron if (err) 7743195f2c65SRobert Elliott goto clean4; /* cfgtables, vaddr, intmode+region, pci */ 7744edd16368SStephen M. Cameron return 0; 7745edd16368SStephen M. Cameron 7746195f2c65SRobert Elliott clean4: /* cfgtables, vaddr, intmode+region, pci */ 7747195f2c65SRobert Elliott hpsa_free_cfgtables(h); 7748195f2c65SRobert Elliott clean3: /* vaddr, intmode+region, pci */ 7749204892e9SStephen M. Cameron iounmap(h->vaddr); 7750105a3dbcSRobert Elliott h->vaddr = NULL; 7751195f2c65SRobert Elliott clean2: /* intmode+region, pci */ 7752195f2c65SRobert Elliott hpsa_disable_interrupt_mode(h); 7753943a7021SRobert Elliott /* 7754943a7021SRobert Elliott * call pci_disable_device before pci_release_regions per 7755943a7021SRobert Elliott * Documentation/PCI/pci.txt 7756943a7021SRobert Elliott */ 7757195f2c65SRobert Elliott pci_disable_device(h->pdev); 7758943a7021SRobert Elliott pci_release_regions(h->pdev); 7759edd16368SStephen M. Cameron return err; 7760edd16368SStephen M. Cameron } 7761edd16368SStephen M. Cameron 77626f039790SGreg Kroah-Hartman static void hpsa_hba_inquiry(struct ctlr_info *h) 7763339b2b14SStephen M. Cameron { 7764339b2b14SStephen M. Cameron int rc; 7765339b2b14SStephen M. Cameron 7766339b2b14SStephen M. Cameron #define HBA_INQUIRY_BYTE_COUNT 64 7767339b2b14SStephen M. Cameron h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL); 7768339b2b14SStephen M. Cameron if (!h->hba_inquiry_data) 7769339b2b14SStephen M. Cameron return; 7770339b2b14SStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0, 7771339b2b14SStephen M. Cameron h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT); 7772339b2b14SStephen M. Cameron if (rc != 0) { 7773339b2b14SStephen M. Cameron kfree(h->hba_inquiry_data); 7774339b2b14SStephen M. Cameron h->hba_inquiry_data = NULL; 7775339b2b14SStephen M. Cameron } 7776339b2b14SStephen M. Cameron } 7777339b2b14SStephen M. Cameron 77786b6c1cd7STomas Henzl static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id) 7779edd16368SStephen M. Cameron { 77801df8552aSStephen M. Cameron int rc, i; 77813b747298STomas Henzl void __iomem *vaddr; 7782edd16368SStephen M. Cameron 77834c2a8c40SStephen M. Cameron if (!reset_devices) 77844c2a8c40SStephen M. Cameron return 0; 77854c2a8c40SStephen M. Cameron 7786132aa220STomas Henzl /* kdump kernel is loading, we don't know in which state is 7787132aa220STomas Henzl * the pci interface. The dev->enable_cnt is equal zero 7788132aa220STomas Henzl * so we call enable+disable, wait a while and switch it on. 7789132aa220STomas Henzl */ 7790132aa220STomas Henzl rc = pci_enable_device(pdev); 7791132aa220STomas Henzl if (rc) { 7792132aa220STomas Henzl dev_warn(&pdev->dev, "Failed to enable PCI device\n"); 7793132aa220STomas Henzl return -ENODEV; 7794132aa220STomas Henzl } 7795132aa220STomas Henzl pci_disable_device(pdev); 7796132aa220STomas Henzl msleep(260); /* a randomly chosen number */ 7797132aa220STomas Henzl rc = pci_enable_device(pdev); 7798132aa220STomas Henzl if (rc) { 7799132aa220STomas Henzl dev_warn(&pdev->dev, "failed to enable device.\n"); 7800132aa220STomas Henzl return -ENODEV; 7801132aa220STomas Henzl } 78024fa604e1SRobert Elliott 7803859c75abSTomas Henzl pci_set_master(pdev); 78044fa604e1SRobert Elliott 78053b747298STomas Henzl vaddr = pci_ioremap_bar(pdev, 0); 78063b747298STomas Henzl if (vaddr == NULL) { 78073b747298STomas Henzl rc = -ENOMEM; 78083b747298STomas Henzl goto out_disable; 78093b747298STomas Henzl } 78103b747298STomas Henzl writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET); 78113b747298STomas Henzl iounmap(vaddr); 78123b747298STomas Henzl 78131df8552aSStephen M. Cameron /* Reset the controller with a PCI power-cycle or via doorbell */ 78146b6c1cd7STomas Henzl rc = hpsa_kdump_hard_reset_controller(pdev, board_id); 7815edd16368SStephen M. Cameron 78161df8552aSStephen M. Cameron /* -ENOTSUPP here means we cannot reset the controller 78171df8552aSStephen M. Cameron * but it's already (and still) up and running in 781818867659SStephen M. Cameron * "performant mode". Or, it might be 640x, which can't reset 781918867659SStephen M. Cameron * due to concerns about shared bbwc between 6402/6404 pair. 78201df8552aSStephen M. Cameron */ 7821adf1b3a3SRobert Elliott if (rc) 7822132aa220STomas Henzl goto out_disable; 7823edd16368SStephen M. Cameron 7824edd16368SStephen M. Cameron /* Now try to get the controller to respond to a no-op */ 78251ba66c9cSRobert Elliott dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n"); 7826edd16368SStephen M. Cameron for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) { 7827edd16368SStephen M. Cameron if (hpsa_noop(pdev) == 0) 7828edd16368SStephen M. Cameron break; 7829edd16368SStephen M. Cameron else 7830edd16368SStephen M. Cameron dev_warn(&pdev->dev, "no-op failed%s\n", 7831edd16368SStephen M. Cameron (i < 11 ? "; re-trying" : "")); 7832edd16368SStephen M. Cameron } 7833132aa220STomas Henzl 7834132aa220STomas Henzl out_disable: 7835132aa220STomas Henzl 7836132aa220STomas Henzl pci_disable_device(pdev); 7837132aa220STomas Henzl return rc; 7838edd16368SStephen M. Cameron } 7839edd16368SStephen M. Cameron 78401fb7c98aSRobert Elliott static void hpsa_free_cmd_pool(struct ctlr_info *h) 78411fb7c98aSRobert Elliott { 78421fb7c98aSRobert Elliott kfree(h->cmd_pool_bits); 7843105a3dbcSRobert Elliott h->cmd_pool_bits = NULL; 7844105a3dbcSRobert Elliott if (h->cmd_pool) { 78451fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 78461fb7c98aSRobert Elliott h->nr_cmds * sizeof(struct CommandList), 78471fb7c98aSRobert Elliott h->cmd_pool, 78481fb7c98aSRobert Elliott h->cmd_pool_dhandle); 7849105a3dbcSRobert Elliott h->cmd_pool = NULL; 7850105a3dbcSRobert Elliott h->cmd_pool_dhandle = 0; 7851105a3dbcSRobert Elliott } 7852105a3dbcSRobert Elliott if (h->errinfo_pool) { 78531fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 78541fb7c98aSRobert Elliott h->nr_cmds * sizeof(struct ErrorInfo), 78551fb7c98aSRobert Elliott h->errinfo_pool, 78561fb7c98aSRobert Elliott h->errinfo_pool_dhandle); 7857105a3dbcSRobert Elliott h->errinfo_pool = NULL; 7858105a3dbcSRobert Elliott h->errinfo_pool_dhandle = 0; 7859105a3dbcSRobert Elliott } 78601fb7c98aSRobert Elliott } 78611fb7c98aSRobert Elliott 7862d37ffbe4SRobert Elliott static int hpsa_alloc_cmd_pool(struct ctlr_info *h) 78632e9d1b36SStephen M. Cameron { 78642e9d1b36SStephen M. Cameron h->cmd_pool_bits = kzalloc( 78652e9d1b36SStephen M. Cameron DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) * 78662e9d1b36SStephen M. Cameron sizeof(unsigned long), GFP_KERNEL); 78672e9d1b36SStephen M. Cameron h->cmd_pool = pci_alloc_consistent(h->pdev, 78682e9d1b36SStephen M. Cameron h->nr_cmds * sizeof(*h->cmd_pool), 78692e9d1b36SStephen M. Cameron &(h->cmd_pool_dhandle)); 78702e9d1b36SStephen M. Cameron h->errinfo_pool = pci_alloc_consistent(h->pdev, 78712e9d1b36SStephen M. Cameron h->nr_cmds * sizeof(*h->errinfo_pool), 78722e9d1b36SStephen M. Cameron &(h->errinfo_pool_dhandle)); 78732e9d1b36SStephen M. Cameron if ((h->cmd_pool_bits == NULL) 78742e9d1b36SStephen M. Cameron || (h->cmd_pool == NULL) 78752e9d1b36SStephen M. Cameron || (h->errinfo_pool == NULL)) { 78762e9d1b36SStephen M. Cameron dev_err(&h->pdev->dev, "out of memory in %s", __func__); 78772c143342SRobert Elliott goto clean_up; 78782e9d1b36SStephen M. Cameron } 7879360c73bdSStephen Cameron hpsa_preinitialize_commands(h); 78802e9d1b36SStephen M. Cameron return 0; 78812c143342SRobert Elliott clean_up: 78822c143342SRobert Elliott hpsa_free_cmd_pool(h); 78832c143342SRobert Elliott return -ENOMEM; 78842e9d1b36SStephen M. Cameron } 78852e9d1b36SStephen M. Cameron 788641b3cf08SStephen M. Cameron static void hpsa_irq_affinity_hints(struct ctlr_info *h) 788741b3cf08SStephen M. Cameron { 7888ec429952SFabian Frederick int i, cpu; 788941b3cf08SStephen M. Cameron 789041b3cf08SStephen M. Cameron cpu = cpumask_first(cpu_online_mask); 789141b3cf08SStephen M. Cameron for (i = 0; i < h->msix_vector; i++) { 7892ec429952SFabian Frederick irq_set_affinity_hint(h->intr[i], get_cpu_mask(cpu)); 789341b3cf08SStephen M. Cameron cpu = cpumask_next(cpu, cpu_online_mask); 789441b3cf08SStephen M. Cameron } 789541b3cf08SStephen M. Cameron } 789641b3cf08SStephen M. Cameron 7897ec501a18SRobert Elliott /* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */ 7898ec501a18SRobert Elliott static void hpsa_free_irqs(struct ctlr_info *h) 7899ec501a18SRobert Elliott { 7900ec501a18SRobert Elliott int i; 7901ec501a18SRobert Elliott 7902ec501a18SRobert Elliott if (!h->msix_vector || h->intr_mode != PERF_MODE_INT) { 7903ec501a18SRobert Elliott /* Single reply queue, only one irq to free */ 7904ec501a18SRobert Elliott i = h->intr_mode; 7905ec501a18SRobert Elliott irq_set_affinity_hint(h->intr[i], NULL); 7906ec501a18SRobert Elliott free_irq(h->intr[i], &h->q[i]); 7907105a3dbcSRobert Elliott h->q[i] = 0; 7908ec501a18SRobert Elliott return; 7909ec501a18SRobert Elliott } 7910ec501a18SRobert Elliott 7911ec501a18SRobert Elliott for (i = 0; i < h->msix_vector; i++) { 7912ec501a18SRobert Elliott irq_set_affinity_hint(h->intr[i], NULL); 7913ec501a18SRobert Elliott free_irq(h->intr[i], &h->q[i]); 7914105a3dbcSRobert Elliott h->q[i] = 0; 7915ec501a18SRobert Elliott } 7916a4e17fc1SRobert Elliott for (; i < MAX_REPLY_QUEUES; i++) 7917a4e17fc1SRobert Elliott h->q[i] = 0; 7918ec501a18SRobert Elliott } 7919ec501a18SRobert Elliott 79209ee61794SRobert Elliott /* returns 0 on success; cleans up and returns -Enn on error */ 79219ee61794SRobert Elliott static int hpsa_request_irqs(struct ctlr_info *h, 79220ae01a32SStephen M. Cameron irqreturn_t (*msixhandler)(int, void *), 79230ae01a32SStephen M. Cameron irqreturn_t (*intxhandler)(int, void *)) 79240ae01a32SStephen M. Cameron { 7925254f796bSMatt Gates int rc, i; 79260ae01a32SStephen M. Cameron 7927254f796bSMatt Gates /* 7928254f796bSMatt Gates * initialize h->q[x] = x so that interrupt handlers know which 7929254f796bSMatt Gates * queue to process. 7930254f796bSMatt Gates */ 7931254f796bSMatt Gates for (i = 0; i < MAX_REPLY_QUEUES; i++) 7932254f796bSMatt Gates h->q[i] = (u8) i; 7933254f796bSMatt Gates 7934eee0f03aSHannes Reinecke if (h->intr_mode == PERF_MODE_INT && h->msix_vector > 0) { 7935254f796bSMatt Gates /* If performant mode and MSI-X, use multiple reply queues */ 7936a4e17fc1SRobert Elliott for (i = 0; i < h->msix_vector; i++) { 79378b47004aSRobert Elliott sprintf(h->intrname[i], "%s-msix%d", h->devname, i); 7938254f796bSMatt Gates rc = request_irq(h->intr[i], msixhandler, 79398b47004aSRobert Elliott 0, h->intrname[i], 7940254f796bSMatt Gates &h->q[i]); 7941a4e17fc1SRobert Elliott if (rc) { 7942a4e17fc1SRobert Elliott int j; 7943a4e17fc1SRobert Elliott 7944a4e17fc1SRobert Elliott dev_err(&h->pdev->dev, 7945a4e17fc1SRobert Elliott "failed to get irq %d for %s\n", 7946a4e17fc1SRobert Elliott h->intr[i], h->devname); 7947a4e17fc1SRobert Elliott for (j = 0; j < i; j++) { 7948a4e17fc1SRobert Elliott free_irq(h->intr[j], &h->q[j]); 7949a4e17fc1SRobert Elliott h->q[j] = 0; 7950a4e17fc1SRobert Elliott } 7951a4e17fc1SRobert Elliott for (; j < MAX_REPLY_QUEUES; j++) 7952a4e17fc1SRobert Elliott h->q[j] = 0; 7953a4e17fc1SRobert Elliott return rc; 7954a4e17fc1SRobert Elliott } 7955a4e17fc1SRobert Elliott } 795641b3cf08SStephen M. Cameron hpsa_irq_affinity_hints(h); 7957254f796bSMatt Gates } else { 7958254f796bSMatt Gates /* Use single reply pool */ 7959eee0f03aSHannes Reinecke if (h->msix_vector > 0 || h->msi_vector) { 79608b47004aSRobert Elliott if (h->msix_vector) 79618b47004aSRobert Elliott sprintf(h->intrname[h->intr_mode], 79628b47004aSRobert Elliott "%s-msix", h->devname); 79638b47004aSRobert Elliott else 79648b47004aSRobert Elliott sprintf(h->intrname[h->intr_mode], 79658b47004aSRobert Elliott "%s-msi", h->devname); 7966254f796bSMatt Gates rc = request_irq(h->intr[h->intr_mode], 79678b47004aSRobert Elliott msixhandler, 0, 79688b47004aSRobert Elliott h->intrname[h->intr_mode], 7969254f796bSMatt Gates &h->q[h->intr_mode]); 7970254f796bSMatt Gates } else { 79718b47004aSRobert Elliott sprintf(h->intrname[h->intr_mode], 79728b47004aSRobert Elliott "%s-intx", h->devname); 7973254f796bSMatt Gates rc = request_irq(h->intr[h->intr_mode], 79748b47004aSRobert Elliott intxhandler, IRQF_SHARED, 79758b47004aSRobert Elliott h->intrname[h->intr_mode], 7976254f796bSMatt Gates &h->q[h->intr_mode]); 7977254f796bSMatt Gates } 7978105a3dbcSRobert Elliott irq_set_affinity_hint(h->intr[h->intr_mode], NULL); 7979254f796bSMatt Gates } 79800ae01a32SStephen M. Cameron if (rc) { 7981195f2c65SRobert Elliott dev_err(&h->pdev->dev, "failed to get irq %d for %s\n", 79820ae01a32SStephen M. Cameron h->intr[h->intr_mode], h->devname); 7983195f2c65SRobert Elliott hpsa_free_irqs(h); 79840ae01a32SStephen M. Cameron return -ENODEV; 79850ae01a32SStephen M. Cameron } 79860ae01a32SStephen M. Cameron return 0; 79870ae01a32SStephen M. Cameron } 79880ae01a32SStephen M. Cameron 79896f039790SGreg Kroah-Hartman static int hpsa_kdump_soft_reset(struct ctlr_info *h) 799064670ac8SStephen M. Cameron { 799139c53f55SRobert Elliott int rc; 7992bf43caf3SRobert Elliott hpsa_send_host_reset(h, RAID_CTLR_LUNID, HPSA_RESET_TYPE_CONTROLLER); 799364670ac8SStephen M. Cameron 799464670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n"); 799539c53f55SRobert Elliott rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY); 799639c53f55SRobert Elliott if (rc) { 799764670ac8SStephen M. Cameron dev_warn(&h->pdev->dev, "Soft reset had no effect.\n"); 799839c53f55SRobert Elliott return rc; 799964670ac8SStephen M. Cameron } 800064670ac8SStephen M. Cameron 800164670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n"); 800239c53f55SRobert Elliott rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 800339c53f55SRobert Elliott if (rc) { 800464670ac8SStephen M. Cameron dev_warn(&h->pdev->dev, "Board failed to become ready " 800564670ac8SStephen M. Cameron "after soft reset.\n"); 800639c53f55SRobert Elliott return rc; 800764670ac8SStephen M. Cameron } 800864670ac8SStephen M. Cameron 800964670ac8SStephen M. Cameron return 0; 801064670ac8SStephen M. Cameron } 801164670ac8SStephen M. Cameron 8012072b0518SStephen M. Cameron static void hpsa_free_reply_queues(struct ctlr_info *h) 8013072b0518SStephen M. Cameron { 8014072b0518SStephen M. Cameron int i; 8015072b0518SStephen M. Cameron 8016072b0518SStephen M. Cameron for (i = 0; i < h->nreply_queues; i++) { 8017072b0518SStephen M. Cameron if (!h->reply_queue[i].head) 8018072b0518SStephen M. Cameron continue; 80191fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 80201fb7c98aSRobert Elliott h->reply_queue_size, 80211fb7c98aSRobert Elliott h->reply_queue[i].head, 80221fb7c98aSRobert Elliott h->reply_queue[i].busaddr); 8023072b0518SStephen M. Cameron h->reply_queue[i].head = NULL; 8024072b0518SStephen M. Cameron h->reply_queue[i].busaddr = 0; 8025072b0518SStephen M. Cameron } 8026105a3dbcSRobert Elliott h->reply_queue_size = 0; 8027072b0518SStephen M. Cameron } 8028072b0518SStephen M. Cameron 80290097f0f4SStephen M. Cameron static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h) 80300097f0f4SStephen M. Cameron { 8031105a3dbcSRobert Elliott hpsa_free_performant_mode(h); /* init_one 7 */ 8032105a3dbcSRobert Elliott hpsa_free_sg_chain_blocks(h); /* init_one 6 */ 8033105a3dbcSRobert Elliott hpsa_free_cmd_pool(h); /* init_one 5 */ 8034105a3dbcSRobert Elliott hpsa_free_irqs(h); /* init_one 4 */ 80352946e82bSRobert Elliott scsi_host_put(h->scsi_host); /* init_one 3 */ 80362946e82bSRobert Elliott h->scsi_host = NULL; /* init_one 3 */ 80372946e82bSRobert Elliott hpsa_free_pci_init(h); /* init_one 2_5 */ 80389ecd953aSRobert Elliott free_percpu(h->lockup_detected); /* init_one 2 */ 80399ecd953aSRobert Elliott h->lockup_detected = NULL; /* init_one 2 */ 80409ecd953aSRobert Elliott if (h->resubmit_wq) { 80419ecd953aSRobert Elliott destroy_workqueue(h->resubmit_wq); /* init_one 1 */ 80429ecd953aSRobert Elliott h->resubmit_wq = NULL; 80439ecd953aSRobert Elliott } 80449ecd953aSRobert Elliott if (h->rescan_ctlr_wq) { 80459ecd953aSRobert Elliott destroy_workqueue(h->rescan_ctlr_wq); 80469ecd953aSRobert Elliott h->rescan_ctlr_wq = NULL; 80479ecd953aSRobert Elliott } 8048105a3dbcSRobert Elliott kfree(h); /* init_one 1 */ 804964670ac8SStephen M. Cameron } 805064670ac8SStephen M. Cameron 8051a0c12413SStephen M. Cameron /* Called when controller lockup detected. */ 8052f2405db8SDon Brace static void fail_all_outstanding_cmds(struct ctlr_info *h) 8053a0c12413SStephen M. Cameron { 8054281a7fd0SWebb Scales int i, refcount; 8055281a7fd0SWebb Scales struct CommandList *c; 805625163bd5SWebb Scales int failcount = 0; 8057a0c12413SStephen M. Cameron 8058080ef1ccSDon Brace flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */ 8059f2405db8SDon Brace for (i = 0; i < h->nr_cmds; i++) { 8060f2405db8SDon Brace c = h->cmd_pool + i; 8061281a7fd0SWebb Scales refcount = atomic_inc_return(&c->refcount); 8062281a7fd0SWebb Scales if (refcount > 1) { 806325163bd5SWebb Scales c->err_info->CommandStatus = CMD_CTLR_LOCKUP; 80645a3d16f5SStephen M. Cameron finish_cmd(c); 8065433b5f4dSStephen Cameron atomic_dec(&h->commands_outstanding); 806625163bd5SWebb Scales failcount++; 8067a0c12413SStephen M. Cameron } 8068281a7fd0SWebb Scales cmd_free(h, c); 8069281a7fd0SWebb Scales } 807025163bd5SWebb Scales dev_warn(&h->pdev->dev, 807125163bd5SWebb Scales "failed %d commands in fail_all\n", failcount); 8072a0c12413SStephen M. Cameron } 8073a0c12413SStephen M. Cameron 8074094963daSStephen M. Cameron static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value) 8075094963daSStephen M. Cameron { 8076c8ed0010SRusty Russell int cpu; 8077094963daSStephen M. Cameron 8078c8ed0010SRusty Russell for_each_online_cpu(cpu) { 8079094963daSStephen M. Cameron u32 *lockup_detected; 8080094963daSStephen M. Cameron lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 8081094963daSStephen M. Cameron *lockup_detected = value; 8082094963daSStephen M. Cameron } 8083094963daSStephen M. Cameron wmb(); /* be sure the per-cpu variables are out to memory */ 8084094963daSStephen M. Cameron } 8085094963daSStephen M. Cameron 8086a0c12413SStephen M. Cameron static void controller_lockup_detected(struct ctlr_info *h) 8087a0c12413SStephen M. Cameron { 8088a0c12413SStephen M. Cameron unsigned long flags; 8089094963daSStephen M. Cameron u32 lockup_detected; 8090a0c12413SStephen M. Cameron 8091a0c12413SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 8092a0c12413SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 8093094963daSStephen M. Cameron lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET); 8094094963daSStephen M. Cameron if (!lockup_detected) { 8095094963daSStephen M. Cameron /* no heartbeat, but controller gave us a zero. */ 8096094963daSStephen M. Cameron dev_warn(&h->pdev->dev, 809725163bd5SWebb Scales "lockup detected after %d but scratchpad register is zero\n", 809825163bd5SWebb Scales h->heartbeat_sample_interval / HZ); 8099094963daSStephen M. Cameron lockup_detected = 0xffffffff; 8100094963daSStephen M. Cameron } 8101094963daSStephen M. Cameron set_lockup_detected_for_all_cpus(h, lockup_detected); 8102a0c12413SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 810325163bd5SWebb Scales dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n", 810425163bd5SWebb Scales lockup_detected, h->heartbeat_sample_interval / HZ); 8105a0c12413SStephen M. Cameron pci_disable_device(h->pdev); 8106f2405db8SDon Brace fail_all_outstanding_cmds(h); 8107a0c12413SStephen M. Cameron } 8108a0c12413SStephen M. Cameron 810925163bd5SWebb Scales static int detect_controller_lockup(struct ctlr_info *h) 8110a0c12413SStephen M. Cameron { 8111a0c12413SStephen M. Cameron u64 now; 8112a0c12413SStephen M. Cameron u32 heartbeat; 8113a0c12413SStephen M. Cameron unsigned long flags; 8114a0c12413SStephen M. Cameron 8115a0c12413SStephen M. Cameron now = get_jiffies_64(); 8116a0c12413SStephen M. Cameron /* If we've received an interrupt recently, we're ok. */ 8117a0c12413SStephen M. Cameron if (time_after64(h->last_intr_timestamp + 8118e85c5974SStephen M. Cameron (h->heartbeat_sample_interval), now)) 811925163bd5SWebb Scales return false; 8120a0c12413SStephen M. Cameron 8121a0c12413SStephen M. Cameron /* 8122a0c12413SStephen M. Cameron * If we've already checked the heartbeat recently, we're ok. 8123a0c12413SStephen M. Cameron * This could happen if someone sends us a signal. We 8124a0c12413SStephen M. Cameron * otherwise don't care about signals in this thread. 8125a0c12413SStephen M. Cameron */ 8126a0c12413SStephen M. Cameron if (time_after64(h->last_heartbeat_timestamp + 8127e85c5974SStephen M. Cameron (h->heartbeat_sample_interval), now)) 812825163bd5SWebb Scales return false; 8129a0c12413SStephen M. Cameron 8130a0c12413SStephen M. Cameron /* If heartbeat has not changed since we last looked, we're not ok. */ 8131a0c12413SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 8132a0c12413SStephen M. Cameron heartbeat = readl(&h->cfgtable->HeartBeat); 8133a0c12413SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 8134a0c12413SStephen M. Cameron if (h->last_heartbeat == heartbeat) { 8135a0c12413SStephen M. Cameron controller_lockup_detected(h); 813625163bd5SWebb Scales return true; 8137a0c12413SStephen M. Cameron } 8138a0c12413SStephen M. Cameron 8139a0c12413SStephen M. Cameron /* We're ok. */ 8140a0c12413SStephen M. Cameron h->last_heartbeat = heartbeat; 8141a0c12413SStephen M. Cameron h->last_heartbeat_timestamp = now; 814225163bd5SWebb Scales return false; 8143a0c12413SStephen M. Cameron } 8144a0c12413SStephen M. Cameron 81459846590eSStephen M. Cameron static void hpsa_ack_ctlr_events(struct ctlr_info *h) 814676438d08SStephen M. Cameron { 814776438d08SStephen M. Cameron int i; 814876438d08SStephen M. Cameron char *event_type; 814976438d08SStephen M. Cameron 8150e4aa3e6aSStephen Cameron if (!(h->fw_support & MISC_FW_EVENT_NOTIFY)) 8151e4aa3e6aSStephen Cameron return; 8152e4aa3e6aSStephen Cameron 815376438d08SStephen M. Cameron /* Ask the controller to clear the events we're handling. */ 81541f7cee8cSStephen M. Cameron if ((h->transMethod & (CFGTBL_Trans_io_accel1 81551f7cee8cSStephen M. Cameron | CFGTBL_Trans_io_accel2)) && 815676438d08SStephen M. Cameron (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE || 815776438d08SStephen M. Cameron h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) { 815876438d08SStephen M. Cameron 815976438d08SStephen M. Cameron if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE) 816076438d08SStephen M. Cameron event_type = "state change"; 816176438d08SStephen M. Cameron if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE) 816276438d08SStephen M. Cameron event_type = "configuration change"; 816376438d08SStephen M. Cameron /* Stop sending new RAID offload reqs via the IO accelerator */ 816476438d08SStephen M. Cameron scsi_block_requests(h->scsi_host); 816576438d08SStephen M. Cameron for (i = 0; i < h->ndevices; i++) 816676438d08SStephen M. Cameron h->dev[i]->offload_enabled = 0; 816723100dd9SStephen M. Cameron hpsa_drain_accel_commands(h); 816876438d08SStephen M. Cameron /* Set 'accelerator path config change' bit */ 816976438d08SStephen M. Cameron dev_warn(&h->pdev->dev, 817076438d08SStephen M. Cameron "Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n", 817176438d08SStephen M. Cameron h->events, event_type); 817276438d08SStephen M. Cameron writel(h->events, &(h->cfgtable->clear_event_notify)); 817376438d08SStephen M. Cameron /* Set the "clear event notify field update" bit 6 */ 817476438d08SStephen M. Cameron writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL); 817576438d08SStephen M. Cameron /* Wait until ctlr clears 'clear event notify field', bit 6 */ 817676438d08SStephen M. Cameron hpsa_wait_for_clear_event_notify_ack(h); 817776438d08SStephen M. Cameron scsi_unblock_requests(h->scsi_host); 817876438d08SStephen M. Cameron } else { 817976438d08SStephen M. Cameron /* Acknowledge controller notification events. */ 818076438d08SStephen M. Cameron writel(h->events, &(h->cfgtable->clear_event_notify)); 818176438d08SStephen M. Cameron writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL); 818276438d08SStephen M. Cameron hpsa_wait_for_clear_event_notify_ack(h); 818376438d08SStephen M. Cameron #if 0 818476438d08SStephen M. Cameron writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 818576438d08SStephen M. Cameron hpsa_wait_for_mode_change_ack(h); 818676438d08SStephen M. Cameron #endif 818776438d08SStephen M. Cameron } 81889846590eSStephen M. Cameron return; 818976438d08SStephen M. Cameron } 819076438d08SStephen M. Cameron 819176438d08SStephen M. Cameron /* Check a register on the controller to see if there are configuration 819276438d08SStephen M. Cameron * changes (added/changed/removed logical drives, etc.) which mean that 8193e863d68eSScott Teel * we should rescan the controller for devices. 8194e863d68eSScott Teel * Also check flag for driver-initiated rescan. 819576438d08SStephen M. Cameron */ 81969846590eSStephen M. Cameron static int hpsa_ctlr_needs_rescan(struct ctlr_info *h) 819776438d08SStephen M. Cameron { 8198853633e8SDon Brace if (h->drv_req_rescan) { 8199853633e8SDon Brace h->drv_req_rescan = 0; 8200853633e8SDon Brace return 1; 8201853633e8SDon Brace } 8202853633e8SDon Brace 820376438d08SStephen M. Cameron if (!(h->fw_support & MISC_FW_EVENT_NOTIFY)) 82049846590eSStephen M. Cameron return 0; 820576438d08SStephen M. Cameron 820676438d08SStephen M. Cameron h->events = readl(&(h->cfgtable->event_notify)); 82079846590eSStephen M. Cameron return h->events & RESCAN_REQUIRED_EVENT_BITS; 82089846590eSStephen M. Cameron } 820976438d08SStephen M. Cameron 821076438d08SStephen M. Cameron /* 82119846590eSStephen M. Cameron * Check if any of the offline devices have become ready 821276438d08SStephen M. Cameron */ 82139846590eSStephen M. Cameron static int hpsa_offline_devices_ready(struct ctlr_info *h) 82149846590eSStephen M. Cameron { 82159846590eSStephen M. Cameron unsigned long flags; 82169846590eSStephen M. Cameron struct offline_device_entry *d; 82179846590eSStephen M. Cameron struct list_head *this, *tmp; 82189846590eSStephen M. Cameron 82199846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 82209846590eSStephen M. Cameron list_for_each_safe(this, tmp, &h->offline_device_list) { 82219846590eSStephen M. Cameron d = list_entry(this, struct offline_device_entry, 82229846590eSStephen M. Cameron offline_list); 82239846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 8224d1fea47cSStephen M. Cameron if (!hpsa_volume_offline(h, d->scsi3addr)) { 8225d1fea47cSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 8226d1fea47cSStephen M. Cameron list_del(&d->offline_list); 8227d1fea47cSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 82289846590eSStephen M. Cameron return 1; 8229d1fea47cSStephen M. Cameron } 82309846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 823176438d08SStephen M. Cameron } 82329846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 82339846590eSStephen M. Cameron return 0; 82349846590eSStephen M. Cameron } 82359846590eSStephen M. Cameron 823634592254SScott Teel static int hpsa_luns_changed(struct ctlr_info *h) 823734592254SScott Teel { 823834592254SScott Teel int rc = 1; /* assume there are changes */ 823934592254SScott Teel struct ReportLUNdata *logdev = NULL; 824034592254SScott Teel 824134592254SScott Teel /* if we can't find out if lun data has changed, 824234592254SScott Teel * assume that it has. 824334592254SScott Teel */ 824434592254SScott Teel 824534592254SScott Teel if (!h->lastlogicals) 824634592254SScott Teel goto out; 824734592254SScott Teel 824834592254SScott Teel logdev = kzalloc(sizeof(*logdev), GFP_KERNEL); 824934592254SScott Teel if (!logdev) { 825034592254SScott Teel dev_warn(&h->pdev->dev, 825134592254SScott Teel "Out of memory, can't track lun changes.\n"); 825234592254SScott Teel goto out; 825334592254SScott Teel } 825434592254SScott Teel if (hpsa_scsi_do_report_luns(h, 1, logdev, sizeof(*logdev), 0)) { 825534592254SScott Teel dev_warn(&h->pdev->dev, 825634592254SScott Teel "report luns failed, can't track lun changes.\n"); 825734592254SScott Teel goto out; 825834592254SScott Teel } 825934592254SScott Teel if (memcmp(logdev, h->lastlogicals, sizeof(*logdev))) { 826034592254SScott Teel dev_info(&h->pdev->dev, 826134592254SScott Teel "Lun changes detected.\n"); 826234592254SScott Teel memcpy(h->lastlogicals, logdev, sizeof(*logdev)); 826334592254SScott Teel goto out; 826434592254SScott Teel } else 826534592254SScott Teel rc = 0; /* no changes detected. */ 826634592254SScott Teel out: 826734592254SScott Teel kfree(logdev); 826834592254SScott Teel return rc; 826934592254SScott Teel } 827034592254SScott Teel 82716636e7f4SDon Brace static void hpsa_rescan_ctlr_worker(struct work_struct *work) 8272a0c12413SStephen M. Cameron { 8273a0c12413SStephen M. Cameron unsigned long flags; 82748a98db73SStephen M. Cameron struct ctlr_info *h = container_of(to_delayed_work(work), 82756636e7f4SDon Brace struct ctlr_info, rescan_ctlr_work); 82766636e7f4SDon Brace 82776636e7f4SDon Brace 82786636e7f4SDon Brace if (h->remove_in_progress) 82798a98db73SStephen M. Cameron return; 82809846590eSStephen M. Cameron 82819846590eSStephen M. Cameron if (hpsa_ctlr_needs_rescan(h) || hpsa_offline_devices_ready(h)) { 82829846590eSStephen M. Cameron scsi_host_get(h->scsi_host); 82839846590eSStephen M. Cameron hpsa_ack_ctlr_events(h); 82849846590eSStephen M. Cameron hpsa_scan_start(h->scsi_host); 82859846590eSStephen M. Cameron scsi_host_put(h->scsi_host); 828634592254SScott Teel } else if (h->discovery_polling) { 8287c2adae44SScott Teel hpsa_disable_rld_caching(h); 828834592254SScott Teel if (hpsa_luns_changed(h)) { 828934592254SScott Teel struct Scsi_Host *sh = NULL; 829034592254SScott Teel 829134592254SScott Teel dev_info(&h->pdev->dev, 829234592254SScott Teel "driver discovery polling rescan.\n"); 829334592254SScott Teel sh = scsi_host_get(h->scsi_host); 829434592254SScott Teel if (sh != NULL) { 829534592254SScott Teel hpsa_scan_start(sh); 829634592254SScott Teel scsi_host_put(sh); 829734592254SScott Teel } 829834592254SScott Teel } 82999846590eSStephen M. Cameron } 83006636e7f4SDon Brace spin_lock_irqsave(&h->lock, flags); 83016636e7f4SDon Brace if (!h->remove_in_progress) 83026636e7f4SDon Brace queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work, 83036636e7f4SDon Brace h->heartbeat_sample_interval); 83046636e7f4SDon Brace spin_unlock_irqrestore(&h->lock, flags); 83056636e7f4SDon Brace } 83066636e7f4SDon Brace 83076636e7f4SDon Brace static void hpsa_monitor_ctlr_worker(struct work_struct *work) 83086636e7f4SDon Brace { 83096636e7f4SDon Brace unsigned long flags; 83106636e7f4SDon Brace struct ctlr_info *h = container_of(to_delayed_work(work), 83116636e7f4SDon Brace struct ctlr_info, monitor_ctlr_work); 83126636e7f4SDon Brace 83136636e7f4SDon Brace detect_controller_lockup(h); 83146636e7f4SDon Brace if (lockup_detected(h)) 83156636e7f4SDon Brace return; 83169846590eSStephen M. Cameron 83178a98db73SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 83186636e7f4SDon Brace if (!h->remove_in_progress) 83198a98db73SStephen M. Cameron schedule_delayed_work(&h->monitor_ctlr_work, 83208a98db73SStephen M. Cameron h->heartbeat_sample_interval); 83218a98db73SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 8322a0c12413SStephen M. Cameron } 8323a0c12413SStephen M. Cameron 83246636e7f4SDon Brace static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h, 83256636e7f4SDon Brace char *name) 83266636e7f4SDon Brace { 83276636e7f4SDon Brace struct workqueue_struct *wq = NULL; 83286636e7f4SDon Brace 8329397ea9cbSDon Brace wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr); 83306636e7f4SDon Brace if (!wq) 83316636e7f4SDon Brace dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name); 83326636e7f4SDon Brace 83336636e7f4SDon Brace return wq; 83346636e7f4SDon Brace } 83356636e7f4SDon Brace 83366f039790SGreg Kroah-Hartman static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 83374c2a8c40SStephen M. Cameron { 83384c2a8c40SStephen M. Cameron int dac, rc; 83394c2a8c40SStephen M. Cameron struct ctlr_info *h; 834064670ac8SStephen M. Cameron int try_soft_reset = 0; 834164670ac8SStephen M. Cameron unsigned long flags; 83426b6c1cd7STomas Henzl u32 board_id; 83434c2a8c40SStephen M. Cameron 83444c2a8c40SStephen M. Cameron if (number_of_controllers == 0) 83454c2a8c40SStephen M. Cameron printk(KERN_INFO DRIVER_NAME "\n"); 83464c2a8c40SStephen M. Cameron 83476b6c1cd7STomas Henzl rc = hpsa_lookup_board_id(pdev, &board_id); 83486b6c1cd7STomas Henzl if (rc < 0) { 83496b6c1cd7STomas Henzl dev_warn(&pdev->dev, "Board ID not found\n"); 83506b6c1cd7STomas Henzl return rc; 83516b6c1cd7STomas Henzl } 83526b6c1cd7STomas Henzl 83536b6c1cd7STomas Henzl rc = hpsa_init_reset_devices(pdev, board_id); 835464670ac8SStephen M. Cameron if (rc) { 835564670ac8SStephen M. Cameron if (rc != -ENOTSUPP) 83564c2a8c40SStephen M. Cameron return rc; 835764670ac8SStephen M. Cameron /* If the reset fails in a particular way (it has no way to do 835864670ac8SStephen M. Cameron * a proper hard reset, so returns -ENOTSUPP) we can try to do 835964670ac8SStephen M. Cameron * a soft reset once we get the controller configured up to the 836064670ac8SStephen M. Cameron * point that it can accept a command. 836164670ac8SStephen M. Cameron */ 836264670ac8SStephen M. Cameron try_soft_reset = 1; 836364670ac8SStephen M. Cameron rc = 0; 836464670ac8SStephen M. Cameron } 836564670ac8SStephen M. Cameron 836664670ac8SStephen M. Cameron reinit_after_soft_reset: 83674c2a8c40SStephen M. Cameron 8368303932fdSDon Brace /* Command structures must be aligned on a 32-byte boundary because 8369303932fdSDon Brace * the 5 lower bits of the address are used by the hardware. and by 8370303932fdSDon Brace * the driver. See comments in hpsa.h for more info. 8371303932fdSDon Brace */ 8372303932fdSDon Brace BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT); 8373edd16368SStephen M. Cameron h = kzalloc(sizeof(*h), GFP_KERNEL); 8374105a3dbcSRobert Elliott if (!h) { 8375105a3dbcSRobert Elliott dev_err(&pdev->dev, "Failed to allocate controller head\n"); 8376ecd9aad4SStephen M. Cameron return -ENOMEM; 8377105a3dbcSRobert Elliott } 8378edd16368SStephen M. Cameron 837955c06c71SStephen M. Cameron h->pdev = pdev; 8380105a3dbcSRobert Elliott 8381a9a3a273SStephen M. Cameron h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT; 83829846590eSStephen M. Cameron INIT_LIST_HEAD(&h->offline_device_list); 83836eaf46fdSStephen M. Cameron spin_lock_init(&h->lock); 83849846590eSStephen M. Cameron spin_lock_init(&h->offline_device_lock); 83856eaf46fdSStephen M. Cameron spin_lock_init(&h->scan_lock); 838634f0c627SDon Brace atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS); 83879b5c48c2SStephen Cameron atomic_set(&h->abort_cmds_available, HPSA_CMDS_RESERVED_FOR_ABORTS); 8388094963daSStephen M. Cameron 8389094963daSStephen M. Cameron /* Allocate and clear per-cpu variable lockup_detected */ 8390094963daSStephen M. Cameron h->lockup_detected = alloc_percpu(u32); 83912a5ac326SStephen M. Cameron if (!h->lockup_detected) { 8392105a3dbcSRobert Elliott dev_err(&h->pdev->dev, "Failed to allocate lockup detector\n"); 83932a5ac326SStephen M. Cameron rc = -ENOMEM; 83942efa5929SRobert Elliott goto clean1; /* aer/h */ 83952a5ac326SStephen M. Cameron } 8396094963daSStephen M. Cameron set_lockup_detected_for_all_cpus(h, 0); 8397094963daSStephen M. Cameron 839855c06c71SStephen M. Cameron rc = hpsa_pci_init(h); 8399105a3dbcSRobert Elliott if (rc) 84002946e82bSRobert Elliott goto clean2; /* lu, aer/h */ 8401edd16368SStephen M. Cameron 84022946e82bSRobert Elliott /* relies on h-> settings made by hpsa_pci_init, including 84032946e82bSRobert Elliott * interrupt_mode h->intr */ 84042946e82bSRobert Elliott rc = hpsa_scsi_host_alloc(h); 84052946e82bSRobert Elliott if (rc) 84062946e82bSRobert Elliott goto clean2_5; /* pci, lu, aer/h */ 84072946e82bSRobert Elliott 84082946e82bSRobert Elliott sprintf(h->devname, HPSA "%d", h->scsi_host->host_no); 8409edd16368SStephen M. Cameron h->ctlr = number_of_controllers; 8410edd16368SStephen M. Cameron number_of_controllers++; 8411edd16368SStephen M. Cameron 8412edd16368SStephen M. Cameron /* configure PCI DMA stuff */ 8413ecd9aad4SStephen M. Cameron rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 8414ecd9aad4SStephen M. Cameron if (rc == 0) { 8415edd16368SStephen M. Cameron dac = 1; 8416ecd9aad4SStephen M. Cameron } else { 8417ecd9aad4SStephen M. Cameron rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 8418ecd9aad4SStephen M. Cameron if (rc == 0) { 8419edd16368SStephen M. Cameron dac = 0; 8420ecd9aad4SStephen M. Cameron } else { 8421edd16368SStephen M. Cameron dev_err(&pdev->dev, "no suitable DMA available\n"); 84222946e82bSRobert Elliott goto clean3; /* shost, pci, lu, aer/h */ 8423edd16368SStephen M. Cameron } 8424ecd9aad4SStephen M. Cameron } 8425edd16368SStephen M. Cameron 8426edd16368SStephen M. Cameron /* make sure the board interrupts are off */ 8427edd16368SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 842810f66018SStephen M. Cameron 8429105a3dbcSRobert Elliott rc = hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx); 8430105a3dbcSRobert Elliott if (rc) 84312946e82bSRobert Elliott goto clean3; /* shost, pci, lu, aer/h */ 8432d37ffbe4SRobert Elliott rc = hpsa_alloc_cmd_pool(h); 84338947fd10SRobert Elliott if (rc) 84342946e82bSRobert Elliott goto clean4; /* irq, shost, pci, lu, aer/h */ 8435105a3dbcSRobert Elliott rc = hpsa_alloc_sg_chain_blocks(h); 8436105a3dbcSRobert Elliott if (rc) 84372946e82bSRobert Elliott goto clean5; /* cmd, irq, shost, pci, lu, aer/h */ 8438a08a8471SStephen M. Cameron init_waitqueue_head(&h->scan_wait_queue); 84399b5c48c2SStephen Cameron init_waitqueue_head(&h->abort_cmd_wait_queue); 8440d604f533SWebb Scales init_waitqueue_head(&h->event_sync_wait_queue); 8441d604f533SWebb Scales mutex_init(&h->reset_mutex); 8442a08a8471SStephen M. Cameron h->scan_finished = 1; /* no scan currently in progress */ 8443edd16368SStephen M. Cameron 8444edd16368SStephen M. Cameron pci_set_drvdata(pdev, h); 84459a41338eSStephen M. Cameron h->ndevices = 0; 84462946e82bSRobert Elliott 84479a41338eSStephen M. Cameron spin_lock_init(&h->devlock); 8448105a3dbcSRobert Elliott rc = hpsa_put_ctlr_into_performant_mode(h); 8449105a3dbcSRobert Elliott if (rc) 84502946e82bSRobert Elliott goto clean6; /* sg, cmd, irq, shost, pci, lu, aer/h */ 84512946e82bSRobert Elliott 84522946e82bSRobert Elliott /* hook into SCSI subsystem */ 84532946e82bSRobert Elliott rc = hpsa_scsi_add_host(h); 84542946e82bSRobert Elliott if (rc) 84552946e82bSRobert Elliott goto clean7; /* perf, sg, cmd, irq, shost, pci, lu, aer/h */ 84562efa5929SRobert Elliott 84572efa5929SRobert Elliott /* create the resubmit workqueue */ 84582efa5929SRobert Elliott h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan"); 84592efa5929SRobert Elliott if (!h->rescan_ctlr_wq) { 84602efa5929SRobert Elliott rc = -ENOMEM; 84612efa5929SRobert Elliott goto clean7; 84622efa5929SRobert Elliott } 84632efa5929SRobert Elliott 84642efa5929SRobert Elliott h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit"); 84652efa5929SRobert Elliott if (!h->resubmit_wq) { 84662efa5929SRobert Elliott rc = -ENOMEM; 84672efa5929SRobert Elliott goto clean7; /* aer/h */ 84682efa5929SRobert Elliott } 846964670ac8SStephen M. Cameron 8470105a3dbcSRobert Elliott /* 8471105a3dbcSRobert Elliott * At this point, the controller is ready to take commands. 847264670ac8SStephen M. Cameron * Now, if reset_devices and the hard reset didn't work, try 847364670ac8SStephen M. Cameron * the soft reset and see if that works. 847464670ac8SStephen M. Cameron */ 847564670ac8SStephen M. Cameron if (try_soft_reset) { 847664670ac8SStephen M. Cameron 847764670ac8SStephen M. Cameron /* This is kind of gross. We may or may not get a completion 847864670ac8SStephen M. Cameron * from the soft reset command, and if we do, then the value 847964670ac8SStephen M. Cameron * from the fifo may or may not be valid. So, we wait 10 secs 848064670ac8SStephen M. Cameron * after the reset throwing away any completions we get during 848164670ac8SStephen M. Cameron * that time. Unregister the interrupt handler and register 848264670ac8SStephen M. Cameron * fake ones to scoop up any residual completions. 848364670ac8SStephen M. Cameron */ 848464670ac8SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 848564670ac8SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 848664670ac8SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 8487ec501a18SRobert Elliott hpsa_free_irqs(h); 84889ee61794SRobert Elliott rc = hpsa_request_irqs(h, hpsa_msix_discard_completions, 848964670ac8SStephen M. Cameron hpsa_intx_discard_completions); 849064670ac8SStephen M. Cameron if (rc) { 84919ee61794SRobert Elliott dev_warn(&h->pdev->dev, 84929ee61794SRobert Elliott "Failed to request_irq after soft reset.\n"); 8493d498757cSRobert Elliott /* 8494b2ef480cSRobert Elliott * cannot goto clean7 or free_irqs will be called 8495b2ef480cSRobert Elliott * again. Instead, do its work 8496b2ef480cSRobert Elliott */ 8497b2ef480cSRobert Elliott hpsa_free_performant_mode(h); /* clean7 */ 8498b2ef480cSRobert Elliott hpsa_free_sg_chain_blocks(h); /* clean6 */ 8499b2ef480cSRobert Elliott hpsa_free_cmd_pool(h); /* clean5 */ 8500b2ef480cSRobert Elliott /* 8501b2ef480cSRobert Elliott * skip hpsa_free_irqs(h) clean4 since that 8502b2ef480cSRobert Elliott * was just called before request_irqs failed 8503d498757cSRobert Elliott */ 8504d498757cSRobert Elliott goto clean3; 850564670ac8SStephen M. Cameron } 850664670ac8SStephen M. Cameron 850764670ac8SStephen M. Cameron rc = hpsa_kdump_soft_reset(h); 850864670ac8SStephen M. Cameron if (rc) 850964670ac8SStephen M. Cameron /* Neither hard nor soft reset worked, we're hosed. */ 85107ef7323fSDon Brace goto clean7; 851164670ac8SStephen M. Cameron 851264670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Board READY.\n"); 851364670ac8SStephen M. Cameron dev_info(&h->pdev->dev, 851464670ac8SStephen M. Cameron "Waiting for stale completions to drain.\n"); 851564670ac8SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_ON); 851664670ac8SStephen M. Cameron msleep(10000); 851764670ac8SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 851864670ac8SStephen M. Cameron 851964670ac8SStephen M. Cameron rc = controller_reset_failed(h->cfgtable); 852064670ac8SStephen M. Cameron if (rc) 852164670ac8SStephen M. Cameron dev_info(&h->pdev->dev, 852264670ac8SStephen M. Cameron "Soft reset appears to have failed.\n"); 852364670ac8SStephen M. Cameron 852464670ac8SStephen M. Cameron /* since the controller's reset, we have to go back and re-init 852564670ac8SStephen M. Cameron * everything. Easiest to just forget what we've done and do it 852664670ac8SStephen M. Cameron * all over again. 852764670ac8SStephen M. Cameron */ 852864670ac8SStephen M. Cameron hpsa_undo_allocations_after_kdump_soft_reset(h); 852964670ac8SStephen M. Cameron try_soft_reset = 0; 853064670ac8SStephen M. Cameron if (rc) 8531b2ef480cSRobert Elliott /* don't goto clean, we already unallocated */ 853264670ac8SStephen M. Cameron return -ENODEV; 853364670ac8SStephen M. Cameron 853464670ac8SStephen M. Cameron goto reinit_after_soft_reset; 853564670ac8SStephen M. Cameron } 8536edd16368SStephen M. Cameron 8537da0697bdSScott Teel /* Enable Accelerated IO path at driver layer */ 8538da0697bdSScott Teel h->acciopath_status = 1; 853934592254SScott Teel /* Disable discovery polling.*/ 854034592254SScott Teel h->discovery_polling = 0; 8541da0697bdSScott Teel 8542e863d68eSScott Teel 8543edd16368SStephen M. Cameron /* Turn the interrupts on so we can service requests */ 8544edd16368SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_ON); 8545edd16368SStephen M. Cameron 8546339b2b14SStephen M. Cameron hpsa_hba_inquiry(h); 85478a98db73SStephen M. Cameron 854834592254SScott Teel h->lastlogicals = kzalloc(sizeof(*(h->lastlogicals)), GFP_KERNEL); 854934592254SScott Teel if (!h->lastlogicals) 855034592254SScott Teel dev_info(&h->pdev->dev, 855134592254SScott Teel "Can't track change to report lun data\n"); 855234592254SScott Teel 85538a98db73SStephen M. Cameron /* Monitor the controller for firmware lockups */ 85548a98db73SStephen M. Cameron h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 85558a98db73SStephen M. Cameron INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker); 85568a98db73SStephen M. Cameron schedule_delayed_work(&h->monitor_ctlr_work, 85578a98db73SStephen M. Cameron h->heartbeat_sample_interval); 85586636e7f4SDon Brace INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker); 85596636e7f4SDon Brace queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work, 85606636e7f4SDon Brace h->heartbeat_sample_interval); 856188bf6d62SStephen M. Cameron return 0; 8562edd16368SStephen M. Cameron 85632946e82bSRobert Elliott clean7: /* perf, sg, cmd, irq, shost, pci, lu, aer/h */ 8564105a3dbcSRobert Elliott hpsa_free_performant_mode(h); 8565105a3dbcSRobert Elliott h->access.set_intr_mask(h, HPSA_INTR_OFF); 8566105a3dbcSRobert Elliott clean6: /* sg, cmd, irq, pci, lockup, wq/aer/h */ 856733a2ffceSStephen M. Cameron hpsa_free_sg_chain_blocks(h); 85682946e82bSRobert Elliott clean5: /* cmd, irq, shost, pci, lu, aer/h */ 85692e9d1b36SStephen M. Cameron hpsa_free_cmd_pool(h); 85702946e82bSRobert Elliott clean4: /* irq, shost, pci, lu, aer/h */ 8571ec501a18SRobert Elliott hpsa_free_irqs(h); 85722946e82bSRobert Elliott clean3: /* shost, pci, lu, aer/h */ 85732946e82bSRobert Elliott scsi_host_put(h->scsi_host); 85742946e82bSRobert Elliott h->scsi_host = NULL; 85752946e82bSRobert Elliott clean2_5: /* pci, lu, aer/h */ 8576195f2c65SRobert Elliott hpsa_free_pci_init(h); 85772946e82bSRobert Elliott clean2: /* lu, aer/h */ 8578105a3dbcSRobert Elliott if (h->lockup_detected) { 8579094963daSStephen M. Cameron free_percpu(h->lockup_detected); 8580105a3dbcSRobert Elliott h->lockup_detected = NULL; 8581105a3dbcSRobert Elliott } 8582105a3dbcSRobert Elliott clean1: /* wq/aer/h */ 8583105a3dbcSRobert Elliott if (h->resubmit_wq) { 8584105a3dbcSRobert Elliott destroy_workqueue(h->resubmit_wq); 8585105a3dbcSRobert Elliott h->resubmit_wq = NULL; 8586105a3dbcSRobert Elliott } 8587105a3dbcSRobert Elliott if (h->rescan_ctlr_wq) { 8588105a3dbcSRobert Elliott destroy_workqueue(h->rescan_ctlr_wq); 8589105a3dbcSRobert Elliott h->rescan_ctlr_wq = NULL; 8590105a3dbcSRobert Elliott } 8591edd16368SStephen M. Cameron kfree(h); 8592ecd9aad4SStephen M. Cameron return rc; 8593edd16368SStephen M. Cameron } 8594edd16368SStephen M. Cameron 8595edd16368SStephen M. Cameron static void hpsa_flush_cache(struct ctlr_info *h) 8596edd16368SStephen M. Cameron { 8597edd16368SStephen M. Cameron char *flush_buf; 8598edd16368SStephen M. Cameron struct CommandList *c; 859925163bd5SWebb Scales int rc; 8600702890e3SStephen M. Cameron 8601094963daSStephen M. Cameron if (unlikely(lockup_detected(h))) 8602702890e3SStephen M. Cameron return; 8603edd16368SStephen M. Cameron flush_buf = kzalloc(4, GFP_KERNEL); 8604edd16368SStephen M. Cameron if (!flush_buf) 8605edd16368SStephen M. Cameron return; 8606edd16368SStephen M. Cameron 860745fcb86eSStephen Cameron c = cmd_alloc(h); 8608bf43caf3SRobert Elliott 8609a2dac136SStephen M. Cameron if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0, 8610a2dac136SStephen M. Cameron RAID_CTLR_LUNID, TYPE_CMD)) { 8611a2dac136SStephen M. Cameron goto out; 8612a2dac136SStephen M. Cameron } 861325163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 861425163bd5SWebb Scales PCI_DMA_TODEVICE, NO_TIMEOUT); 861525163bd5SWebb Scales if (rc) 861625163bd5SWebb Scales goto out; 8617edd16368SStephen M. Cameron if (c->err_info->CommandStatus != 0) 8618a2dac136SStephen M. Cameron out: 8619edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 8620edd16368SStephen M. Cameron "error flushing cache on controller\n"); 862145fcb86eSStephen Cameron cmd_free(h, c); 8622edd16368SStephen M. Cameron kfree(flush_buf); 8623edd16368SStephen M. Cameron } 8624edd16368SStephen M. Cameron 8625c2adae44SScott Teel /* Make controller gather fresh report lun data each time we 8626c2adae44SScott Teel * send down a report luns request 8627c2adae44SScott Teel */ 8628c2adae44SScott Teel static void hpsa_disable_rld_caching(struct ctlr_info *h) 8629c2adae44SScott Teel { 8630c2adae44SScott Teel u32 *options; 8631c2adae44SScott Teel struct CommandList *c; 8632c2adae44SScott Teel int rc; 8633c2adae44SScott Teel 8634c2adae44SScott Teel /* Don't bother trying to set diag options if locked up */ 8635c2adae44SScott Teel if (unlikely(h->lockup_detected)) 8636c2adae44SScott Teel return; 8637c2adae44SScott Teel 8638c2adae44SScott Teel options = kzalloc(sizeof(*options), GFP_KERNEL); 8639c2adae44SScott Teel if (!options) { 8640c2adae44SScott Teel dev_err(&h->pdev->dev, 8641c2adae44SScott Teel "Error: failed to disable rld caching, during alloc.\n"); 8642c2adae44SScott Teel return; 8643c2adae44SScott Teel } 8644c2adae44SScott Teel 8645c2adae44SScott Teel c = cmd_alloc(h); 8646c2adae44SScott Teel 8647c2adae44SScott Teel /* first, get the current diag options settings */ 8648c2adae44SScott Teel if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0, 8649c2adae44SScott Teel RAID_CTLR_LUNID, TYPE_CMD)) 8650c2adae44SScott Teel goto errout; 8651c2adae44SScott Teel 8652c2adae44SScott Teel rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 8653c2adae44SScott Teel PCI_DMA_FROMDEVICE, NO_TIMEOUT); 8654c2adae44SScott Teel if ((rc != 0) || (c->err_info->CommandStatus != 0)) 8655c2adae44SScott Teel goto errout; 8656c2adae44SScott Teel 8657c2adae44SScott Teel /* Now, set the bit for disabling the RLD caching */ 8658c2adae44SScott Teel *options |= HPSA_DIAG_OPTS_DISABLE_RLD_CACHING; 8659c2adae44SScott Teel 8660c2adae44SScott Teel if (fill_cmd(c, BMIC_SET_DIAG_OPTIONS, h, options, 4, 0, 8661c2adae44SScott Teel RAID_CTLR_LUNID, TYPE_CMD)) 8662c2adae44SScott Teel goto errout; 8663c2adae44SScott Teel 8664c2adae44SScott Teel rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 8665c2adae44SScott Teel PCI_DMA_TODEVICE, NO_TIMEOUT); 8666c2adae44SScott Teel if ((rc != 0) || (c->err_info->CommandStatus != 0)) 8667c2adae44SScott Teel goto errout; 8668c2adae44SScott Teel 8669c2adae44SScott Teel /* Now verify that it got set: */ 8670c2adae44SScott Teel if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0, 8671c2adae44SScott Teel RAID_CTLR_LUNID, TYPE_CMD)) 8672c2adae44SScott Teel goto errout; 8673c2adae44SScott Teel 8674c2adae44SScott Teel rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 8675c2adae44SScott Teel PCI_DMA_FROMDEVICE, NO_TIMEOUT); 8676c2adae44SScott Teel if ((rc != 0) || (c->err_info->CommandStatus != 0)) 8677c2adae44SScott Teel goto errout; 8678c2adae44SScott Teel 8679c2adae44SScott Teel if (*options && HPSA_DIAG_OPTS_DISABLE_RLD_CACHING) 8680c2adae44SScott Teel goto out; 8681c2adae44SScott Teel 8682c2adae44SScott Teel errout: 8683c2adae44SScott Teel dev_err(&h->pdev->dev, 8684c2adae44SScott Teel "Error: failed to disable report lun data caching.\n"); 8685c2adae44SScott Teel out: 8686c2adae44SScott Teel cmd_free(h, c); 8687c2adae44SScott Teel kfree(options); 8688c2adae44SScott Teel } 8689c2adae44SScott Teel 8690edd16368SStephen M. Cameron static void hpsa_shutdown(struct pci_dev *pdev) 8691edd16368SStephen M. Cameron { 8692edd16368SStephen M. Cameron struct ctlr_info *h; 8693edd16368SStephen M. Cameron 8694edd16368SStephen M. Cameron h = pci_get_drvdata(pdev); 8695edd16368SStephen M. Cameron /* Turn board interrupts off and send the flush cache command 8696edd16368SStephen M. Cameron * sendcmd will turn off interrupt, and send the flush... 8697edd16368SStephen M. Cameron * To write all data in the battery backed cache to disks 8698edd16368SStephen M. Cameron */ 8699edd16368SStephen M. Cameron hpsa_flush_cache(h); 8700edd16368SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 8701105a3dbcSRobert Elliott hpsa_free_irqs(h); /* init_one 4 */ 8702cc64c817SRobert Elliott hpsa_disable_interrupt_mode(h); /* pci_init 2 */ 8703edd16368SStephen M. Cameron } 8704edd16368SStephen M. Cameron 87056f039790SGreg Kroah-Hartman static void hpsa_free_device_info(struct ctlr_info *h) 870655e14e76SStephen M. Cameron { 870755e14e76SStephen M. Cameron int i; 870855e14e76SStephen M. Cameron 8709105a3dbcSRobert Elliott for (i = 0; i < h->ndevices; i++) { 871055e14e76SStephen M. Cameron kfree(h->dev[i]); 8711105a3dbcSRobert Elliott h->dev[i] = NULL; 8712105a3dbcSRobert Elliott } 871355e14e76SStephen M. Cameron } 871455e14e76SStephen M. Cameron 87156f039790SGreg Kroah-Hartman static void hpsa_remove_one(struct pci_dev *pdev) 8716edd16368SStephen M. Cameron { 8717edd16368SStephen M. Cameron struct ctlr_info *h; 87188a98db73SStephen M. Cameron unsigned long flags; 8719edd16368SStephen M. Cameron 8720edd16368SStephen M. Cameron if (pci_get_drvdata(pdev) == NULL) { 8721edd16368SStephen M. Cameron dev_err(&pdev->dev, "unable to remove device\n"); 8722edd16368SStephen M. Cameron return; 8723edd16368SStephen M. Cameron } 8724edd16368SStephen M. Cameron h = pci_get_drvdata(pdev); 87258a98db73SStephen M. Cameron 87268a98db73SStephen M. Cameron /* Get rid of any controller monitoring work items */ 87278a98db73SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 87288a98db73SStephen M. Cameron h->remove_in_progress = 1; 87298a98db73SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 87306636e7f4SDon Brace cancel_delayed_work_sync(&h->monitor_ctlr_work); 87316636e7f4SDon Brace cancel_delayed_work_sync(&h->rescan_ctlr_work); 87326636e7f4SDon Brace destroy_workqueue(h->rescan_ctlr_wq); 87336636e7f4SDon Brace destroy_workqueue(h->resubmit_wq); 8734cc64c817SRobert Elliott 87352d041306SDon Brace /* 87362d041306SDon Brace * Call before disabling interrupts. 87372d041306SDon Brace * scsi_remove_host can trigger I/O operations especially 87382d041306SDon Brace * when multipath is enabled. There can be SYNCHRONIZE CACHE 87392d041306SDon Brace * operations which cannot complete and will hang the system. 87402d041306SDon Brace */ 87412d041306SDon Brace if (h->scsi_host) 87422d041306SDon Brace scsi_remove_host(h->scsi_host); /* init_one 8 */ 8743105a3dbcSRobert Elliott /* includes hpsa_free_irqs - init_one 4 */ 8744195f2c65SRobert Elliott /* includes hpsa_disable_interrupt_mode - pci_init 2 */ 8745edd16368SStephen M. Cameron hpsa_shutdown(pdev); 8746cc64c817SRobert Elliott 8747105a3dbcSRobert Elliott hpsa_free_device_info(h); /* scan */ 8748105a3dbcSRobert Elliott 87492946e82bSRobert Elliott kfree(h->hba_inquiry_data); /* init_one 10 */ 87502946e82bSRobert Elliott h->hba_inquiry_data = NULL; /* init_one 10 */ 87512946e82bSRobert Elliott hpsa_free_ioaccel2_sg_chain_blocks(h); 8752105a3dbcSRobert Elliott hpsa_free_performant_mode(h); /* init_one 7 */ 8753105a3dbcSRobert Elliott hpsa_free_sg_chain_blocks(h); /* init_one 6 */ 87541fb7c98aSRobert Elliott hpsa_free_cmd_pool(h); /* init_one 5 */ 875534592254SScott Teel kfree(h->lastlogicals); 8756105a3dbcSRobert Elliott 8757105a3dbcSRobert Elliott /* hpsa_free_irqs already called via hpsa_shutdown init_one 4 */ 8758195f2c65SRobert Elliott 87592946e82bSRobert Elliott scsi_host_put(h->scsi_host); /* init_one 3 */ 87602946e82bSRobert Elliott h->scsi_host = NULL; /* init_one 3 */ 87612946e82bSRobert Elliott 8762195f2c65SRobert Elliott /* includes hpsa_disable_interrupt_mode - pci_init 2 */ 87632946e82bSRobert Elliott hpsa_free_pci_init(h); /* init_one 2.5 */ 8764195f2c65SRobert Elliott 8765105a3dbcSRobert Elliott free_percpu(h->lockup_detected); /* init_one 2 */ 8766105a3dbcSRobert Elliott h->lockup_detected = NULL; /* init_one 2 */ 8767105a3dbcSRobert Elliott /* (void) pci_disable_pcie_error_reporting(pdev); */ /* init_one 1 */ 8768*d04e62b9SKevin Barnett 8769*d04e62b9SKevin Barnett hpsa_delete_sas_host(h); 8770*d04e62b9SKevin Barnett 8771105a3dbcSRobert Elliott kfree(h); /* init_one 1 */ 8772edd16368SStephen M. Cameron } 8773edd16368SStephen M. Cameron 8774edd16368SStephen M. Cameron static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev, 8775edd16368SStephen M. Cameron __attribute__((unused)) pm_message_t state) 8776edd16368SStephen M. Cameron { 8777edd16368SStephen M. Cameron return -ENOSYS; 8778edd16368SStephen M. Cameron } 8779edd16368SStephen M. Cameron 8780edd16368SStephen M. Cameron static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev) 8781edd16368SStephen M. Cameron { 8782edd16368SStephen M. Cameron return -ENOSYS; 8783edd16368SStephen M. Cameron } 8784edd16368SStephen M. Cameron 8785edd16368SStephen M. Cameron static struct pci_driver hpsa_pci_driver = { 8786f79cfec6SStephen M. Cameron .name = HPSA, 8787edd16368SStephen M. Cameron .probe = hpsa_init_one, 87886f039790SGreg Kroah-Hartman .remove = hpsa_remove_one, 8789edd16368SStephen M. Cameron .id_table = hpsa_pci_device_id, /* id_table */ 8790edd16368SStephen M. Cameron .shutdown = hpsa_shutdown, 8791edd16368SStephen M. Cameron .suspend = hpsa_suspend, 8792edd16368SStephen M. Cameron .resume = hpsa_resume, 8793edd16368SStephen M. Cameron }; 8794edd16368SStephen M. Cameron 8795303932fdSDon Brace /* Fill in bucket_map[], given nsgs (the max number of 8796303932fdSDon Brace * scatter gather elements supported) and bucket[], 8797303932fdSDon Brace * which is an array of 8 integers. The bucket[] array 8798303932fdSDon Brace * contains 8 different DMA transfer sizes (in 16 8799303932fdSDon Brace * byte increments) which the controller uses to fetch 8800303932fdSDon Brace * commands. This function fills in bucket_map[], which 8801303932fdSDon Brace * maps a given number of scatter gather elements to one of 8802303932fdSDon Brace * the 8 DMA transfer sizes. The point of it is to allow the 8803303932fdSDon Brace * controller to only do as much DMA as needed to fetch the 8804303932fdSDon Brace * command, with the DMA transfer size encoded in the lower 8805303932fdSDon Brace * bits of the command address. 8806303932fdSDon Brace */ 8807303932fdSDon Brace static void calc_bucket_map(int bucket[], int num_buckets, 88082b08b3e9SDon Brace int nsgs, int min_blocks, u32 *bucket_map) 8809303932fdSDon Brace { 8810303932fdSDon Brace int i, j, b, size; 8811303932fdSDon Brace 8812303932fdSDon Brace /* Note, bucket_map must have nsgs+1 entries. */ 8813303932fdSDon Brace for (i = 0; i <= nsgs; i++) { 8814303932fdSDon Brace /* Compute size of a command with i SG entries */ 8815e1f7de0cSMatt Gates size = i + min_blocks; 8816303932fdSDon Brace b = num_buckets; /* Assume the biggest bucket */ 8817303932fdSDon Brace /* Find the bucket that is just big enough */ 8818e1f7de0cSMatt Gates for (j = 0; j < num_buckets; j++) { 8819303932fdSDon Brace if (bucket[j] >= size) { 8820303932fdSDon Brace b = j; 8821303932fdSDon Brace break; 8822303932fdSDon Brace } 8823303932fdSDon Brace } 8824303932fdSDon Brace /* for a command with i SG entries, use bucket b. */ 8825303932fdSDon Brace bucket_map[i] = b; 8826303932fdSDon Brace } 8827303932fdSDon Brace } 8828303932fdSDon Brace 8829105a3dbcSRobert Elliott /* 8830105a3dbcSRobert Elliott * return -ENODEV on err, 0 on success (or no action) 8831105a3dbcSRobert Elliott * allocates numerous items that must be freed later 8832105a3dbcSRobert Elliott */ 8833c706a795SRobert Elliott static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support) 8834303932fdSDon Brace { 88356c311b57SStephen M. Cameron int i; 88366c311b57SStephen M. Cameron unsigned long register_value; 8837e1f7de0cSMatt Gates unsigned long transMethod = CFGTBL_Trans_Performant | 8838e1f7de0cSMatt Gates (trans_support & CFGTBL_Trans_use_short_tags) | 8839e1f7de0cSMatt Gates CFGTBL_Trans_enable_directed_msix | 8840b9af4937SStephen M. Cameron (trans_support & (CFGTBL_Trans_io_accel1 | 8841b9af4937SStephen M. Cameron CFGTBL_Trans_io_accel2)); 8842e1f7de0cSMatt Gates struct access_method access = SA5_performant_access; 8843def342bdSStephen M. Cameron 8844def342bdSStephen M. Cameron /* This is a bit complicated. There are 8 registers on 8845def342bdSStephen M. Cameron * the controller which we write to to tell it 8 different 8846def342bdSStephen M. Cameron * sizes of commands which there may be. It's a way of 8847def342bdSStephen M. Cameron * reducing the DMA done to fetch each command. Encoded into 8848def342bdSStephen M. Cameron * each command's tag are 3 bits which communicate to the controller 8849def342bdSStephen M. Cameron * which of the eight sizes that command fits within. The size of 8850def342bdSStephen M. Cameron * each command depends on how many scatter gather entries there are. 8851def342bdSStephen M. Cameron * Each SG entry requires 16 bytes. The eight registers are programmed 8852def342bdSStephen M. Cameron * with the number of 16-byte blocks a command of that size requires. 8853def342bdSStephen M. Cameron * The smallest command possible requires 5 such 16 byte blocks. 8854d66ae08bSStephen M. Cameron * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte 8855def342bdSStephen M. Cameron * blocks. Note, this only extends to the SG entries contained 8856def342bdSStephen M. Cameron * within the command block, and does not extend to chained blocks 8857def342bdSStephen M. Cameron * of SG elements. bft[] contains the eight values we write to 8858def342bdSStephen M. Cameron * the registers. They are not evenly distributed, but have more 8859def342bdSStephen M. Cameron * sizes for small commands, and fewer sizes for larger commands. 8860def342bdSStephen M. Cameron */ 8861d66ae08bSStephen M. Cameron int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4}; 8862b9af4937SStephen M. Cameron #define MIN_IOACCEL2_BFT_ENTRY 5 8863b9af4937SStephen M. Cameron #define HPSA_IOACCEL2_HEADER_SZ 4 8864b9af4937SStephen M. Cameron int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12, 8865b9af4937SStephen M. Cameron 13, 14, 15, 16, 17, 18, 19, 8866b9af4937SStephen M. Cameron HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES}; 8867b9af4937SStephen M. Cameron BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16); 8868b9af4937SStephen M. Cameron BUILD_BUG_ON(ARRAY_SIZE(bft) != 8); 8869b9af4937SStephen M. Cameron BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) > 8870b9af4937SStephen M. Cameron 16 * MIN_IOACCEL2_BFT_ENTRY); 8871b9af4937SStephen M. Cameron BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16); 8872d66ae08bSStephen M. Cameron BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4); 8873303932fdSDon Brace /* 5 = 1 s/g entry or 4k 8874303932fdSDon Brace * 6 = 2 s/g entry or 8k 8875303932fdSDon Brace * 8 = 4 s/g entry or 16k 8876303932fdSDon Brace * 10 = 6 s/g entry or 24k 8877303932fdSDon Brace */ 8878303932fdSDon Brace 8879b3a52e79SStephen M. Cameron /* If the controller supports either ioaccel method then 8880b3a52e79SStephen M. Cameron * we can also use the RAID stack submit path that does not 8881b3a52e79SStephen M. Cameron * perform the superfluous readl() after each command submission. 8882b3a52e79SStephen M. Cameron */ 8883b3a52e79SStephen M. Cameron if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2)) 8884b3a52e79SStephen M. Cameron access = SA5_performant_access_no_read; 8885b3a52e79SStephen M. Cameron 8886303932fdSDon Brace /* Controller spec: zero out this buffer. */ 8887072b0518SStephen M. Cameron for (i = 0; i < h->nreply_queues; i++) 8888072b0518SStephen M. Cameron memset(h->reply_queue[i].head, 0, h->reply_queue_size); 8889303932fdSDon Brace 8890d66ae08bSStephen M. Cameron bft[7] = SG_ENTRIES_IN_CMD + 4; 8891d66ae08bSStephen M. Cameron calc_bucket_map(bft, ARRAY_SIZE(bft), 8892e1f7de0cSMatt Gates SG_ENTRIES_IN_CMD, 4, h->blockFetchTable); 8893303932fdSDon Brace for (i = 0; i < 8; i++) 8894303932fdSDon Brace writel(bft[i], &h->transtable->BlockFetch[i]); 8895303932fdSDon Brace 8896303932fdSDon Brace /* size of controller ring buffer */ 8897303932fdSDon Brace writel(h->max_commands, &h->transtable->RepQSize); 8898254f796bSMatt Gates writel(h->nreply_queues, &h->transtable->RepQCount); 8899303932fdSDon Brace writel(0, &h->transtable->RepQCtrAddrLow32); 8900303932fdSDon Brace writel(0, &h->transtable->RepQCtrAddrHigh32); 8901254f796bSMatt Gates 8902254f796bSMatt Gates for (i = 0; i < h->nreply_queues; i++) { 8903254f796bSMatt Gates writel(0, &h->transtable->RepQAddr[i].upper); 8904072b0518SStephen M. Cameron writel(h->reply_queue[i].busaddr, 8905254f796bSMatt Gates &h->transtable->RepQAddr[i].lower); 8906254f796bSMatt Gates } 8907254f796bSMatt Gates 8908b9af4937SStephen M. Cameron writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi); 8909e1f7de0cSMatt Gates writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest)); 8910e1f7de0cSMatt Gates /* 8911e1f7de0cSMatt Gates * enable outbound interrupt coalescing in accelerator mode; 8912e1f7de0cSMatt Gates */ 8913e1f7de0cSMatt Gates if (trans_support & CFGTBL_Trans_io_accel1) { 8914e1f7de0cSMatt Gates access = SA5_ioaccel_mode1_access; 8915e1f7de0cSMatt Gates writel(10, &h->cfgtable->HostWrite.CoalIntDelay); 8916e1f7de0cSMatt Gates writel(4, &h->cfgtable->HostWrite.CoalIntCount); 8917c349775eSScott Teel } else { 8918c349775eSScott Teel if (trans_support & CFGTBL_Trans_io_accel2) { 8919c349775eSScott Teel access = SA5_ioaccel_mode2_access; 8920c349775eSScott Teel writel(10, &h->cfgtable->HostWrite.CoalIntDelay); 8921c349775eSScott Teel writel(4, &h->cfgtable->HostWrite.CoalIntCount); 8922c349775eSScott Teel } 8923e1f7de0cSMatt Gates } 8924303932fdSDon Brace writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 8925c706a795SRobert Elliott if (hpsa_wait_for_mode_change_ack(h)) { 8926c706a795SRobert Elliott dev_err(&h->pdev->dev, 8927c706a795SRobert Elliott "performant mode problem - doorbell timeout\n"); 8928c706a795SRobert Elliott return -ENODEV; 8929c706a795SRobert Elliott } 8930303932fdSDon Brace register_value = readl(&(h->cfgtable->TransportActive)); 8931303932fdSDon Brace if (!(register_value & CFGTBL_Trans_Performant)) { 8932050f7147SStephen Cameron dev_err(&h->pdev->dev, 8933050f7147SStephen Cameron "performant mode problem - transport not active\n"); 8934c706a795SRobert Elliott return -ENODEV; 8935303932fdSDon Brace } 8936960a30e7SStephen M. Cameron /* Change the access methods to the performant access methods */ 8937e1f7de0cSMatt Gates h->access = access; 8938e1f7de0cSMatt Gates h->transMethod = transMethod; 8939e1f7de0cSMatt Gates 8940b9af4937SStephen M. Cameron if (!((trans_support & CFGTBL_Trans_io_accel1) || 8941b9af4937SStephen M. Cameron (trans_support & CFGTBL_Trans_io_accel2))) 8942c706a795SRobert Elliott return 0; 8943e1f7de0cSMatt Gates 8944b9af4937SStephen M. Cameron if (trans_support & CFGTBL_Trans_io_accel1) { 8945e1f7de0cSMatt Gates /* Set up I/O accelerator mode */ 8946e1f7de0cSMatt Gates for (i = 0; i < h->nreply_queues; i++) { 8947e1f7de0cSMatt Gates writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX); 8948e1f7de0cSMatt Gates h->reply_queue[i].current_entry = 8949e1f7de0cSMatt Gates readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX); 8950e1f7de0cSMatt Gates } 8951283b4a9bSStephen M. Cameron bft[7] = h->ioaccel_maxsg + 8; 8952283b4a9bSStephen M. Cameron calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8, 8953e1f7de0cSMatt Gates h->ioaccel1_blockFetchTable); 8954e1f7de0cSMatt Gates 8955e1f7de0cSMatt Gates /* initialize all reply queue entries to unused */ 8956072b0518SStephen M. Cameron for (i = 0; i < h->nreply_queues; i++) 8957072b0518SStephen M. Cameron memset(h->reply_queue[i].head, 8958072b0518SStephen M. Cameron (u8) IOACCEL_MODE1_REPLY_UNUSED, 8959072b0518SStephen M. Cameron h->reply_queue_size); 8960e1f7de0cSMatt Gates 8961e1f7de0cSMatt Gates /* set all the constant fields in the accelerator command 8962e1f7de0cSMatt Gates * frames once at init time to save CPU cycles later. 8963e1f7de0cSMatt Gates */ 8964e1f7de0cSMatt Gates for (i = 0; i < h->nr_cmds; i++) { 8965e1f7de0cSMatt Gates struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i]; 8966e1f7de0cSMatt Gates 8967e1f7de0cSMatt Gates cp->function = IOACCEL1_FUNCTION_SCSIIO; 8968e1f7de0cSMatt Gates cp->err_info = (u32) (h->errinfo_pool_dhandle + 8969e1f7de0cSMatt Gates (i * sizeof(struct ErrorInfo))); 8970e1f7de0cSMatt Gates cp->err_info_len = sizeof(struct ErrorInfo); 8971e1f7de0cSMatt Gates cp->sgl_offset = IOACCEL1_SGLOFFSET; 89722b08b3e9SDon Brace cp->host_context_flags = 89732b08b3e9SDon Brace cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT); 8974e1f7de0cSMatt Gates cp->timeout_sec = 0; 8975e1f7de0cSMatt Gates cp->ReplyQueue = 0; 897650a0decfSStephen M. Cameron cp->tag = 8977f2405db8SDon Brace cpu_to_le64((i << DIRECT_LOOKUP_SHIFT)); 897850a0decfSStephen M. Cameron cp->host_addr = 897950a0decfSStephen M. Cameron cpu_to_le64(h->ioaccel_cmd_pool_dhandle + 8980e1f7de0cSMatt Gates (i * sizeof(struct io_accel1_cmd))); 8981e1f7de0cSMatt Gates } 8982b9af4937SStephen M. Cameron } else if (trans_support & CFGTBL_Trans_io_accel2) { 8983b9af4937SStephen M. Cameron u64 cfg_offset, cfg_base_addr_index; 8984b9af4937SStephen M. Cameron u32 bft2_offset, cfg_base_addr; 8985b9af4937SStephen M. Cameron int rc; 8986b9af4937SStephen M. Cameron 8987b9af4937SStephen M. Cameron rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 8988b9af4937SStephen M. Cameron &cfg_base_addr_index, &cfg_offset); 8989b9af4937SStephen M. Cameron BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64); 8990b9af4937SStephen M. Cameron bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ; 8991b9af4937SStephen M. Cameron calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg, 8992b9af4937SStephen M. Cameron 4, h->ioaccel2_blockFetchTable); 8993b9af4937SStephen M. Cameron bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset); 8994b9af4937SStephen M. Cameron BUILD_BUG_ON(offsetof(struct CfgTable, 8995b9af4937SStephen M. Cameron io_accel_request_size_offset) != 0xb8); 8996b9af4937SStephen M. Cameron h->ioaccel2_bft2_regs = 8997b9af4937SStephen M. Cameron remap_pci_mem(pci_resource_start(h->pdev, 8998b9af4937SStephen M. Cameron cfg_base_addr_index) + 8999b9af4937SStephen M. Cameron cfg_offset + bft2_offset, 9000b9af4937SStephen M. Cameron ARRAY_SIZE(bft2) * 9001b9af4937SStephen M. Cameron sizeof(*h->ioaccel2_bft2_regs)); 9002b9af4937SStephen M. Cameron for (i = 0; i < ARRAY_SIZE(bft2); i++) 9003b9af4937SStephen M. Cameron writel(bft2[i], &h->ioaccel2_bft2_regs[i]); 9004b9af4937SStephen M. Cameron } 9005b9af4937SStephen M. Cameron writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 9006c706a795SRobert Elliott if (hpsa_wait_for_mode_change_ack(h)) { 9007c706a795SRobert Elliott dev_err(&h->pdev->dev, 9008c706a795SRobert Elliott "performant mode problem - enabling ioaccel mode\n"); 9009c706a795SRobert Elliott return -ENODEV; 9010c706a795SRobert Elliott } 9011c706a795SRobert Elliott return 0; 9012e1f7de0cSMatt Gates } 9013e1f7de0cSMatt Gates 90141fb7c98aSRobert Elliott /* Free ioaccel1 mode command blocks and block fetch table */ 90151fb7c98aSRobert Elliott static void hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info *h) 90161fb7c98aSRobert Elliott { 9017105a3dbcSRobert Elliott if (h->ioaccel_cmd_pool) { 90181fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 90191fb7c98aSRobert Elliott h->nr_cmds * sizeof(*h->ioaccel_cmd_pool), 90201fb7c98aSRobert Elliott h->ioaccel_cmd_pool, 90211fb7c98aSRobert Elliott h->ioaccel_cmd_pool_dhandle); 9022105a3dbcSRobert Elliott h->ioaccel_cmd_pool = NULL; 9023105a3dbcSRobert Elliott h->ioaccel_cmd_pool_dhandle = 0; 9024105a3dbcSRobert Elliott } 90251fb7c98aSRobert Elliott kfree(h->ioaccel1_blockFetchTable); 9026105a3dbcSRobert Elliott h->ioaccel1_blockFetchTable = NULL; 90271fb7c98aSRobert Elliott } 90281fb7c98aSRobert Elliott 9029d37ffbe4SRobert Elliott /* Allocate ioaccel1 mode command blocks and block fetch table */ 9030d37ffbe4SRobert Elliott static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h) 9031e1f7de0cSMatt Gates { 9032283b4a9bSStephen M. Cameron h->ioaccel_maxsg = 9033283b4a9bSStephen M. Cameron readl(&(h->cfgtable->io_accel_max_embedded_sg_count)); 9034283b4a9bSStephen M. Cameron if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES) 9035283b4a9bSStephen M. Cameron h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES; 9036283b4a9bSStephen M. Cameron 9037e1f7de0cSMatt Gates /* Command structures must be aligned on a 128-byte boundary 9038e1f7de0cSMatt Gates * because the 7 lower bits of the address are used by the 9039e1f7de0cSMatt Gates * hardware. 9040e1f7de0cSMatt Gates */ 9041e1f7de0cSMatt Gates BUILD_BUG_ON(sizeof(struct io_accel1_cmd) % 9042e1f7de0cSMatt Gates IOACCEL1_COMMANDLIST_ALIGNMENT); 9043e1f7de0cSMatt Gates h->ioaccel_cmd_pool = 9044e1f7de0cSMatt Gates pci_alloc_consistent(h->pdev, 9045e1f7de0cSMatt Gates h->nr_cmds * sizeof(*h->ioaccel_cmd_pool), 9046e1f7de0cSMatt Gates &(h->ioaccel_cmd_pool_dhandle)); 9047e1f7de0cSMatt Gates 9048e1f7de0cSMatt Gates h->ioaccel1_blockFetchTable = 9049283b4a9bSStephen M. Cameron kmalloc(((h->ioaccel_maxsg + 1) * 9050e1f7de0cSMatt Gates sizeof(u32)), GFP_KERNEL); 9051e1f7de0cSMatt Gates 9052e1f7de0cSMatt Gates if ((h->ioaccel_cmd_pool == NULL) || 9053e1f7de0cSMatt Gates (h->ioaccel1_blockFetchTable == NULL)) 9054e1f7de0cSMatt Gates goto clean_up; 9055e1f7de0cSMatt Gates 9056e1f7de0cSMatt Gates memset(h->ioaccel_cmd_pool, 0, 9057e1f7de0cSMatt Gates h->nr_cmds * sizeof(*h->ioaccel_cmd_pool)); 9058e1f7de0cSMatt Gates return 0; 9059e1f7de0cSMatt Gates 9060e1f7de0cSMatt Gates clean_up: 90611fb7c98aSRobert Elliott hpsa_free_ioaccel1_cmd_and_bft(h); 90622dd02d74SRobert Elliott return -ENOMEM; 90636c311b57SStephen M. Cameron } 90646c311b57SStephen M. Cameron 90651fb7c98aSRobert Elliott /* Free ioaccel2 mode command blocks and block fetch table */ 90661fb7c98aSRobert Elliott static void hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info *h) 90671fb7c98aSRobert Elliott { 9068d9a729f3SWebb Scales hpsa_free_ioaccel2_sg_chain_blocks(h); 9069d9a729f3SWebb Scales 9070105a3dbcSRobert Elliott if (h->ioaccel2_cmd_pool) { 90711fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 90721fb7c98aSRobert Elliott h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 90731fb7c98aSRobert Elliott h->ioaccel2_cmd_pool, 90741fb7c98aSRobert Elliott h->ioaccel2_cmd_pool_dhandle); 9075105a3dbcSRobert Elliott h->ioaccel2_cmd_pool = NULL; 9076105a3dbcSRobert Elliott h->ioaccel2_cmd_pool_dhandle = 0; 9077105a3dbcSRobert Elliott } 90781fb7c98aSRobert Elliott kfree(h->ioaccel2_blockFetchTable); 9079105a3dbcSRobert Elliott h->ioaccel2_blockFetchTable = NULL; 90801fb7c98aSRobert Elliott } 90811fb7c98aSRobert Elliott 9082d37ffbe4SRobert Elliott /* Allocate ioaccel2 mode command blocks and block fetch table */ 9083d37ffbe4SRobert Elliott static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h) 9084aca9012aSStephen M. Cameron { 9085d9a729f3SWebb Scales int rc; 9086d9a729f3SWebb Scales 9087aca9012aSStephen M. Cameron /* Allocate ioaccel2 mode command blocks and block fetch table */ 9088aca9012aSStephen M. Cameron 9089aca9012aSStephen M. Cameron h->ioaccel_maxsg = 9090aca9012aSStephen M. Cameron readl(&(h->cfgtable->io_accel_max_embedded_sg_count)); 9091aca9012aSStephen M. Cameron if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES) 9092aca9012aSStephen M. Cameron h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES; 9093aca9012aSStephen M. Cameron 9094aca9012aSStephen M. Cameron BUILD_BUG_ON(sizeof(struct io_accel2_cmd) % 9095aca9012aSStephen M. Cameron IOACCEL2_COMMANDLIST_ALIGNMENT); 9096aca9012aSStephen M. Cameron h->ioaccel2_cmd_pool = 9097aca9012aSStephen M. Cameron pci_alloc_consistent(h->pdev, 9098aca9012aSStephen M. Cameron h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 9099aca9012aSStephen M. Cameron &(h->ioaccel2_cmd_pool_dhandle)); 9100aca9012aSStephen M. Cameron 9101aca9012aSStephen M. Cameron h->ioaccel2_blockFetchTable = 9102aca9012aSStephen M. Cameron kmalloc(((h->ioaccel_maxsg + 1) * 9103aca9012aSStephen M. Cameron sizeof(u32)), GFP_KERNEL); 9104aca9012aSStephen M. Cameron 9105aca9012aSStephen M. Cameron if ((h->ioaccel2_cmd_pool == NULL) || 9106d9a729f3SWebb Scales (h->ioaccel2_blockFetchTable == NULL)) { 9107d9a729f3SWebb Scales rc = -ENOMEM; 9108d9a729f3SWebb Scales goto clean_up; 9109d9a729f3SWebb Scales } 9110d9a729f3SWebb Scales 9111d9a729f3SWebb Scales rc = hpsa_allocate_ioaccel2_sg_chain_blocks(h); 9112d9a729f3SWebb Scales if (rc) 9113aca9012aSStephen M. Cameron goto clean_up; 9114aca9012aSStephen M. Cameron 9115aca9012aSStephen M. Cameron memset(h->ioaccel2_cmd_pool, 0, 9116aca9012aSStephen M. Cameron h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool)); 9117aca9012aSStephen M. Cameron return 0; 9118aca9012aSStephen M. Cameron 9119aca9012aSStephen M. Cameron clean_up: 91201fb7c98aSRobert Elliott hpsa_free_ioaccel2_cmd_and_bft(h); 9121d9a729f3SWebb Scales return rc; 9122aca9012aSStephen M. Cameron } 9123aca9012aSStephen M. Cameron 9124105a3dbcSRobert Elliott /* Free items allocated by hpsa_put_ctlr_into_performant_mode */ 9125105a3dbcSRobert Elliott static void hpsa_free_performant_mode(struct ctlr_info *h) 9126105a3dbcSRobert Elliott { 9127105a3dbcSRobert Elliott kfree(h->blockFetchTable); 9128105a3dbcSRobert Elliott h->blockFetchTable = NULL; 9129105a3dbcSRobert Elliott hpsa_free_reply_queues(h); 9130105a3dbcSRobert Elliott hpsa_free_ioaccel1_cmd_and_bft(h); 9131105a3dbcSRobert Elliott hpsa_free_ioaccel2_cmd_and_bft(h); 9132105a3dbcSRobert Elliott } 9133105a3dbcSRobert Elliott 9134105a3dbcSRobert Elliott /* return -ENODEV on error, 0 on success (or no action) 9135105a3dbcSRobert Elliott * allocates numerous items that must be freed later 9136105a3dbcSRobert Elliott */ 9137105a3dbcSRobert Elliott static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h) 91386c311b57SStephen M. Cameron { 91396c311b57SStephen M. Cameron u32 trans_support; 9140e1f7de0cSMatt Gates unsigned long transMethod = CFGTBL_Trans_Performant | 9141e1f7de0cSMatt Gates CFGTBL_Trans_use_short_tags; 9142105a3dbcSRobert Elliott int i, rc; 91436c311b57SStephen M. Cameron 914402ec19c8SStephen M. Cameron if (hpsa_simple_mode) 9145105a3dbcSRobert Elliott return 0; 914602ec19c8SStephen M. Cameron 914767c99a72Sscameron@beardog.cce.hp.com trans_support = readl(&(h->cfgtable->TransportSupport)); 914867c99a72Sscameron@beardog.cce.hp.com if (!(trans_support & PERFORMANT_MODE)) 9149105a3dbcSRobert Elliott return 0; 915067c99a72Sscameron@beardog.cce.hp.com 9151e1f7de0cSMatt Gates /* Check for I/O accelerator mode support */ 9152e1f7de0cSMatt Gates if (trans_support & CFGTBL_Trans_io_accel1) { 9153e1f7de0cSMatt Gates transMethod |= CFGTBL_Trans_io_accel1 | 9154e1f7de0cSMatt Gates CFGTBL_Trans_enable_directed_msix; 9155105a3dbcSRobert Elliott rc = hpsa_alloc_ioaccel1_cmd_and_bft(h); 9156105a3dbcSRobert Elliott if (rc) 9157105a3dbcSRobert Elliott return rc; 9158105a3dbcSRobert Elliott } else if (trans_support & CFGTBL_Trans_io_accel2) { 9159aca9012aSStephen M. Cameron transMethod |= CFGTBL_Trans_io_accel2 | 9160aca9012aSStephen M. Cameron CFGTBL_Trans_enable_directed_msix; 9161105a3dbcSRobert Elliott rc = hpsa_alloc_ioaccel2_cmd_and_bft(h); 9162105a3dbcSRobert Elliott if (rc) 9163105a3dbcSRobert Elliott return rc; 9164e1f7de0cSMatt Gates } 9165e1f7de0cSMatt Gates 9166eee0f03aSHannes Reinecke h->nreply_queues = h->msix_vector > 0 ? h->msix_vector : 1; 9167cba3d38bSStephen M. Cameron hpsa_get_max_perf_mode_cmds(h); 91686c311b57SStephen M. Cameron /* Performant mode ring buffer and supporting data structures */ 9169072b0518SStephen M. Cameron h->reply_queue_size = h->max_commands * sizeof(u64); 91706c311b57SStephen M. Cameron 9171254f796bSMatt Gates for (i = 0; i < h->nreply_queues; i++) { 9172072b0518SStephen M. Cameron h->reply_queue[i].head = pci_alloc_consistent(h->pdev, 9173072b0518SStephen M. Cameron h->reply_queue_size, 9174072b0518SStephen M. Cameron &(h->reply_queue[i].busaddr)); 9175105a3dbcSRobert Elliott if (!h->reply_queue[i].head) { 9176105a3dbcSRobert Elliott rc = -ENOMEM; 9177105a3dbcSRobert Elliott goto clean1; /* rq, ioaccel */ 9178105a3dbcSRobert Elliott } 9179254f796bSMatt Gates h->reply_queue[i].size = h->max_commands; 9180254f796bSMatt Gates h->reply_queue[i].wraparound = 1; /* spec: init to 1 */ 9181254f796bSMatt Gates h->reply_queue[i].current_entry = 0; 9182254f796bSMatt Gates } 9183254f796bSMatt Gates 91846c311b57SStephen M. Cameron /* Need a block fetch table for performant mode */ 9185d66ae08bSStephen M. Cameron h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) * 91866c311b57SStephen M. Cameron sizeof(u32)), GFP_KERNEL); 9187105a3dbcSRobert Elliott if (!h->blockFetchTable) { 9188105a3dbcSRobert Elliott rc = -ENOMEM; 9189105a3dbcSRobert Elliott goto clean1; /* rq, ioaccel */ 9190105a3dbcSRobert Elliott } 91916c311b57SStephen M. Cameron 9192105a3dbcSRobert Elliott rc = hpsa_enter_performant_mode(h, trans_support); 9193105a3dbcSRobert Elliott if (rc) 9194105a3dbcSRobert Elliott goto clean2; /* bft, rq, ioaccel */ 9195105a3dbcSRobert Elliott return 0; 9196303932fdSDon Brace 9197105a3dbcSRobert Elliott clean2: /* bft, rq, ioaccel */ 9198303932fdSDon Brace kfree(h->blockFetchTable); 9199105a3dbcSRobert Elliott h->blockFetchTable = NULL; 9200105a3dbcSRobert Elliott clean1: /* rq, ioaccel */ 9201105a3dbcSRobert Elliott hpsa_free_reply_queues(h); 9202105a3dbcSRobert Elliott hpsa_free_ioaccel1_cmd_and_bft(h); 9203105a3dbcSRobert Elliott hpsa_free_ioaccel2_cmd_and_bft(h); 9204105a3dbcSRobert Elliott return rc; 9205303932fdSDon Brace } 9206303932fdSDon Brace 920723100dd9SStephen M. Cameron static int is_accelerated_cmd(struct CommandList *c) 920876438d08SStephen M. Cameron { 920923100dd9SStephen M. Cameron return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2; 921023100dd9SStephen M. Cameron } 921123100dd9SStephen M. Cameron 921223100dd9SStephen M. Cameron static void hpsa_drain_accel_commands(struct ctlr_info *h) 921323100dd9SStephen M. Cameron { 921423100dd9SStephen M. Cameron struct CommandList *c = NULL; 9215f2405db8SDon Brace int i, accel_cmds_out; 9216281a7fd0SWebb Scales int refcount; 921776438d08SStephen M. Cameron 9218f2405db8SDon Brace do { /* wait for all outstanding ioaccel commands to drain out */ 921923100dd9SStephen M. Cameron accel_cmds_out = 0; 9220f2405db8SDon Brace for (i = 0; i < h->nr_cmds; i++) { 9221f2405db8SDon Brace c = h->cmd_pool + i; 9222281a7fd0SWebb Scales refcount = atomic_inc_return(&c->refcount); 9223281a7fd0SWebb Scales if (refcount > 1) /* Command is allocated */ 922423100dd9SStephen M. Cameron accel_cmds_out += is_accelerated_cmd(c); 9225281a7fd0SWebb Scales cmd_free(h, c); 9226f2405db8SDon Brace } 922723100dd9SStephen M. Cameron if (accel_cmds_out <= 0) 922876438d08SStephen M. Cameron break; 922976438d08SStephen M. Cameron msleep(100); 923076438d08SStephen M. Cameron } while (1); 923176438d08SStephen M. Cameron } 923276438d08SStephen M. Cameron 9233*d04e62b9SKevin Barnett static struct hpsa_sas_phy *hpsa_alloc_sas_phy( 9234*d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port) 9235*d04e62b9SKevin Barnett { 9236*d04e62b9SKevin Barnett struct hpsa_sas_phy *hpsa_sas_phy; 9237*d04e62b9SKevin Barnett struct sas_phy *phy; 9238*d04e62b9SKevin Barnett 9239*d04e62b9SKevin Barnett hpsa_sas_phy = kzalloc(sizeof(*hpsa_sas_phy), GFP_KERNEL); 9240*d04e62b9SKevin Barnett if (!hpsa_sas_phy) 9241*d04e62b9SKevin Barnett return NULL; 9242*d04e62b9SKevin Barnett 9243*d04e62b9SKevin Barnett phy = sas_phy_alloc(hpsa_sas_port->parent_node->parent_dev, 9244*d04e62b9SKevin Barnett hpsa_sas_port->next_phy_index); 9245*d04e62b9SKevin Barnett if (!phy) { 9246*d04e62b9SKevin Barnett kfree(hpsa_sas_phy); 9247*d04e62b9SKevin Barnett return NULL; 9248*d04e62b9SKevin Barnett } 9249*d04e62b9SKevin Barnett 9250*d04e62b9SKevin Barnett hpsa_sas_port->next_phy_index++; 9251*d04e62b9SKevin Barnett hpsa_sas_phy->phy = phy; 9252*d04e62b9SKevin Barnett hpsa_sas_phy->parent_port = hpsa_sas_port; 9253*d04e62b9SKevin Barnett 9254*d04e62b9SKevin Barnett return hpsa_sas_phy; 9255*d04e62b9SKevin Barnett } 9256*d04e62b9SKevin Barnett 9257*d04e62b9SKevin Barnett static void hpsa_free_sas_phy(struct hpsa_sas_phy *hpsa_sas_phy) 9258*d04e62b9SKevin Barnett { 9259*d04e62b9SKevin Barnett struct sas_phy *phy = hpsa_sas_phy->phy; 9260*d04e62b9SKevin Barnett 9261*d04e62b9SKevin Barnett sas_port_delete_phy(hpsa_sas_phy->parent_port->port, phy); 9262*d04e62b9SKevin Barnett sas_phy_free(phy); 9263*d04e62b9SKevin Barnett if (hpsa_sas_phy->added_to_port) 9264*d04e62b9SKevin Barnett list_del(&hpsa_sas_phy->phy_list_entry); 9265*d04e62b9SKevin Barnett kfree(hpsa_sas_phy); 9266*d04e62b9SKevin Barnett } 9267*d04e62b9SKevin Barnett 9268*d04e62b9SKevin Barnett static int hpsa_sas_port_add_phy(struct hpsa_sas_phy *hpsa_sas_phy) 9269*d04e62b9SKevin Barnett { 9270*d04e62b9SKevin Barnett int rc; 9271*d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9272*d04e62b9SKevin Barnett struct sas_phy *phy; 9273*d04e62b9SKevin Barnett struct sas_identify *identify; 9274*d04e62b9SKevin Barnett 9275*d04e62b9SKevin Barnett hpsa_sas_port = hpsa_sas_phy->parent_port; 9276*d04e62b9SKevin Barnett phy = hpsa_sas_phy->phy; 9277*d04e62b9SKevin Barnett 9278*d04e62b9SKevin Barnett identify = &phy->identify; 9279*d04e62b9SKevin Barnett memset(identify, 0, sizeof(*identify)); 9280*d04e62b9SKevin Barnett identify->sas_address = hpsa_sas_port->sas_address; 9281*d04e62b9SKevin Barnett identify->device_type = SAS_END_DEVICE; 9282*d04e62b9SKevin Barnett identify->initiator_port_protocols = SAS_PROTOCOL_STP; 9283*d04e62b9SKevin Barnett identify->target_port_protocols = SAS_PROTOCOL_STP; 9284*d04e62b9SKevin Barnett phy->minimum_linkrate_hw = SAS_LINK_RATE_UNKNOWN; 9285*d04e62b9SKevin Barnett phy->maximum_linkrate_hw = SAS_LINK_RATE_UNKNOWN; 9286*d04e62b9SKevin Barnett phy->minimum_linkrate = SAS_LINK_RATE_UNKNOWN; 9287*d04e62b9SKevin Barnett phy->maximum_linkrate = SAS_LINK_RATE_UNKNOWN; 9288*d04e62b9SKevin Barnett phy->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN; 9289*d04e62b9SKevin Barnett 9290*d04e62b9SKevin Barnett rc = sas_phy_add(hpsa_sas_phy->phy); 9291*d04e62b9SKevin Barnett if (rc) 9292*d04e62b9SKevin Barnett return rc; 9293*d04e62b9SKevin Barnett 9294*d04e62b9SKevin Barnett sas_port_add_phy(hpsa_sas_port->port, hpsa_sas_phy->phy); 9295*d04e62b9SKevin Barnett list_add_tail(&hpsa_sas_phy->phy_list_entry, 9296*d04e62b9SKevin Barnett &hpsa_sas_port->phy_list_head); 9297*d04e62b9SKevin Barnett hpsa_sas_phy->added_to_port = true; 9298*d04e62b9SKevin Barnett 9299*d04e62b9SKevin Barnett return 0; 9300*d04e62b9SKevin Barnett } 9301*d04e62b9SKevin Barnett 9302*d04e62b9SKevin Barnett static int 9303*d04e62b9SKevin Barnett hpsa_sas_port_add_rphy(struct hpsa_sas_port *hpsa_sas_port, 9304*d04e62b9SKevin Barnett struct sas_rphy *rphy) 9305*d04e62b9SKevin Barnett { 9306*d04e62b9SKevin Barnett struct sas_identify *identify; 9307*d04e62b9SKevin Barnett 9308*d04e62b9SKevin Barnett identify = &rphy->identify; 9309*d04e62b9SKevin Barnett identify->sas_address = hpsa_sas_port->sas_address; 9310*d04e62b9SKevin Barnett identify->initiator_port_protocols = SAS_PROTOCOL_STP; 9311*d04e62b9SKevin Barnett identify->target_port_protocols = SAS_PROTOCOL_STP; 9312*d04e62b9SKevin Barnett 9313*d04e62b9SKevin Barnett return sas_rphy_add(rphy); 9314*d04e62b9SKevin Barnett } 9315*d04e62b9SKevin Barnett 9316*d04e62b9SKevin Barnett static struct hpsa_sas_port 9317*d04e62b9SKevin Barnett *hpsa_alloc_sas_port(struct hpsa_sas_node *hpsa_sas_node, 9318*d04e62b9SKevin Barnett u64 sas_address) 9319*d04e62b9SKevin Barnett { 9320*d04e62b9SKevin Barnett int rc; 9321*d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9322*d04e62b9SKevin Barnett struct sas_port *port; 9323*d04e62b9SKevin Barnett 9324*d04e62b9SKevin Barnett hpsa_sas_port = kzalloc(sizeof(*hpsa_sas_port), GFP_KERNEL); 9325*d04e62b9SKevin Barnett if (!hpsa_sas_port) 9326*d04e62b9SKevin Barnett return NULL; 9327*d04e62b9SKevin Barnett 9328*d04e62b9SKevin Barnett INIT_LIST_HEAD(&hpsa_sas_port->phy_list_head); 9329*d04e62b9SKevin Barnett hpsa_sas_port->parent_node = hpsa_sas_node; 9330*d04e62b9SKevin Barnett 9331*d04e62b9SKevin Barnett port = sas_port_alloc_num(hpsa_sas_node->parent_dev); 9332*d04e62b9SKevin Barnett if (!port) 9333*d04e62b9SKevin Barnett goto free_hpsa_port; 9334*d04e62b9SKevin Barnett 9335*d04e62b9SKevin Barnett rc = sas_port_add(port); 9336*d04e62b9SKevin Barnett if (rc) 9337*d04e62b9SKevin Barnett goto free_sas_port; 9338*d04e62b9SKevin Barnett 9339*d04e62b9SKevin Barnett hpsa_sas_port->port = port; 9340*d04e62b9SKevin Barnett hpsa_sas_port->sas_address = sas_address; 9341*d04e62b9SKevin Barnett list_add_tail(&hpsa_sas_port->port_list_entry, 9342*d04e62b9SKevin Barnett &hpsa_sas_node->port_list_head); 9343*d04e62b9SKevin Barnett 9344*d04e62b9SKevin Barnett return hpsa_sas_port; 9345*d04e62b9SKevin Barnett 9346*d04e62b9SKevin Barnett free_sas_port: 9347*d04e62b9SKevin Barnett sas_port_free(port); 9348*d04e62b9SKevin Barnett free_hpsa_port: 9349*d04e62b9SKevin Barnett kfree(hpsa_sas_port); 9350*d04e62b9SKevin Barnett 9351*d04e62b9SKevin Barnett return NULL; 9352*d04e62b9SKevin Barnett } 9353*d04e62b9SKevin Barnett 9354*d04e62b9SKevin Barnett static void hpsa_free_sas_port(struct hpsa_sas_port *hpsa_sas_port) 9355*d04e62b9SKevin Barnett { 9356*d04e62b9SKevin Barnett struct hpsa_sas_phy *hpsa_sas_phy; 9357*d04e62b9SKevin Barnett struct hpsa_sas_phy *next; 9358*d04e62b9SKevin Barnett 9359*d04e62b9SKevin Barnett list_for_each_entry_safe(hpsa_sas_phy, next, 9360*d04e62b9SKevin Barnett &hpsa_sas_port->phy_list_head, phy_list_entry) 9361*d04e62b9SKevin Barnett hpsa_free_sas_phy(hpsa_sas_phy); 9362*d04e62b9SKevin Barnett 9363*d04e62b9SKevin Barnett sas_port_delete(hpsa_sas_port->port); 9364*d04e62b9SKevin Barnett list_del(&hpsa_sas_port->port_list_entry); 9365*d04e62b9SKevin Barnett kfree(hpsa_sas_port); 9366*d04e62b9SKevin Barnett } 9367*d04e62b9SKevin Barnett 9368*d04e62b9SKevin Barnett static struct hpsa_sas_node *hpsa_alloc_sas_node(struct device *parent_dev) 9369*d04e62b9SKevin Barnett { 9370*d04e62b9SKevin Barnett struct hpsa_sas_node *hpsa_sas_node; 9371*d04e62b9SKevin Barnett 9372*d04e62b9SKevin Barnett hpsa_sas_node = kzalloc(sizeof(*hpsa_sas_node), GFP_KERNEL); 9373*d04e62b9SKevin Barnett if (hpsa_sas_node) { 9374*d04e62b9SKevin Barnett hpsa_sas_node->parent_dev = parent_dev; 9375*d04e62b9SKevin Barnett INIT_LIST_HEAD(&hpsa_sas_node->port_list_head); 9376*d04e62b9SKevin Barnett } 9377*d04e62b9SKevin Barnett 9378*d04e62b9SKevin Barnett return hpsa_sas_node; 9379*d04e62b9SKevin Barnett } 9380*d04e62b9SKevin Barnett 9381*d04e62b9SKevin Barnett static void hpsa_free_sas_node(struct hpsa_sas_node *hpsa_sas_node) 9382*d04e62b9SKevin Barnett { 9383*d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9384*d04e62b9SKevin Barnett struct hpsa_sas_port *next; 9385*d04e62b9SKevin Barnett 9386*d04e62b9SKevin Barnett if (!hpsa_sas_node) 9387*d04e62b9SKevin Barnett return; 9388*d04e62b9SKevin Barnett 9389*d04e62b9SKevin Barnett list_for_each_entry_safe(hpsa_sas_port, next, 9390*d04e62b9SKevin Barnett &hpsa_sas_node->port_list_head, port_list_entry) 9391*d04e62b9SKevin Barnett hpsa_free_sas_port(hpsa_sas_port); 9392*d04e62b9SKevin Barnett 9393*d04e62b9SKevin Barnett kfree(hpsa_sas_node); 9394*d04e62b9SKevin Barnett } 9395*d04e62b9SKevin Barnett 9396*d04e62b9SKevin Barnett static struct hpsa_scsi_dev_t 9397*d04e62b9SKevin Barnett *hpsa_find_device_by_sas_rphy(struct ctlr_info *h, 9398*d04e62b9SKevin Barnett struct sas_rphy *rphy) 9399*d04e62b9SKevin Barnett { 9400*d04e62b9SKevin Barnett int i; 9401*d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *device; 9402*d04e62b9SKevin Barnett 9403*d04e62b9SKevin Barnett for (i = 0; i < h->ndevices; i++) { 9404*d04e62b9SKevin Barnett device = h->dev[i]; 9405*d04e62b9SKevin Barnett if (!device->sas_port) 9406*d04e62b9SKevin Barnett continue; 9407*d04e62b9SKevin Barnett if (device->sas_port->rphy == rphy) 9408*d04e62b9SKevin Barnett return device; 9409*d04e62b9SKevin Barnett } 9410*d04e62b9SKevin Barnett 9411*d04e62b9SKevin Barnett return NULL; 9412*d04e62b9SKevin Barnett } 9413*d04e62b9SKevin Barnett 9414*d04e62b9SKevin Barnett static int hpsa_add_sas_host(struct ctlr_info *h) 9415*d04e62b9SKevin Barnett { 9416*d04e62b9SKevin Barnett int rc; 9417*d04e62b9SKevin Barnett struct device *parent_dev; 9418*d04e62b9SKevin Barnett struct hpsa_sas_node *hpsa_sas_node; 9419*d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9420*d04e62b9SKevin Barnett struct hpsa_sas_phy *hpsa_sas_phy; 9421*d04e62b9SKevin Barnett 9422*d04e62b9SKevin Barnett parent_dev = &h->scsi_host->shost_gendev; 9423*d04e62b9SKevin Barnett 9424*d04e62b9SKevin Barnett hpsa_sas_node = hpsa_alloc_sas_node(parent_dev); 9425*d04e62b9SKevin Barnett if (!hpsa_sas_node) 9426*d04e62b9SKevin Barnett return -ENOMEM; 9427*d04e62b9SKevin Barnett 9428*d04e62b9SKevin Barnett hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, h->sas_address); 9429*d04e62b9SKevin Barnett if (!hpsa_sas_port) { 9430*d04e62b9SKevin Barnett rc = -ENODEV; 9431*d04e62b9SKevin Barnett goto free_sas_node; 9432*d04e62b9SKevin Barnett } 9433*d04e62b9SKevin Barnett 9434*d04e62b9SKevin Barnett hpsa_sas_phy = hpsa_alloc_sas_phy(hpsa_sas_port); 9435*d04e62b9SKevin Barnett if (!hpsa_sas_phy) { 9436*d04e62b9SKevin Barnett rc = -ENODEV; 9437*d04e62b9SKevin Barnett goto free_sas_port; 9438*d04e62b9SKevin Barnett } 9439*d04e62b9SKevin Barnett 9440*d04e62b9SKevin Barnett rc = hpsa_sas_port_add_phy(hpsa_sas_phy); 9441*d04e62b9SKevin Barnett if (rc) 9442*d04e62b9SKevin Barnett goto free_sas_phy; 9443*d04e62b9SKevin Barnett 9444*d04e62b9SKevin Barnett h->sas_host = hpsa_sas_node; 9445*d04e62b9SKevin Barnett 9446*d04e62b9SKevin Barnett return 0; 9447*d04e62b9SKevin Barnett 9448*d04e62b9SKevin Barnett free_sas_phy: 9449*d04e62b9SKevin Barnett hpsa_free_sas_phy(hpsa_sas_phy); 9450*d04e62b9SKevin Barnett free_sas_port: 9451*d04e62b9SKevin Barnett hpsa_free_sas_port(hpsa_sas_port); 9452*d04e62b9SKevin Barnett free_sas_node: 9453*d04e62b9SKevin Barnett hpsa_free_sas_node(hpsa_sas_node); 9454*d04e62b9SKevin Barnett 9455*d04e62b9SKevin Barnett return rc; 9456*d04e62b9SKevin Barnett } 9457*d04e62b9SKevin Barnett 9458*d04e62b9SKevin Barnett static void hpsa_delete_sas_host(struct ctlr_info *h) 9459*d04e62b9SKevin Barnett { 9460*d04e62b9SKevin Barnett hpsa_free_sas_node(h->sas_host); 9461*d04e62b9SKevin Barnett } 9462*d04e62b9SKevin Barnett 9463*d04e62b9SKevin Barnett static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node, 9464*d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *device) 9465*d04e62b9SKevin Barnett { 9466*d04e62b9SKevin Barnett int rc; 9467*d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9468*d04e62b9SKevin Barnett struct sas_rphy *rphy; 9469*d04e62b9SKevin Barnett 9470*d04e62b9SKevin Barnett hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, device->sas_address); 9471*d04e62b9SKevin Barnett if (!hpsa_sas_port) 9472*d04e62b9SKevin Barnett return -ENOMEM; 9473*d04e62b9SKevin Barnett 9474*d04e62b9SKevin Barnett rphy = sas_end_device_alloc(hpsa_sas_port->port); 9475*d04e62b9SKevin Barnett if (!rphy) { 9476*d04e62b9SKevin Barnett rc = -ENODEV; 9477*d04e62b9SKevin Barnett goto free_sas_port; 9478*d04e62b9SKevin Barnett } 9479*d04e62b9SKevin Barnett 9480*d04e62b9SKevin Barnett hpsa_sas_port->rphy = rphy; 9481*d04e62b9SKevin Barnett device->sas_port = hpsa_sas_port; 9482*d04e62b9SKevin Barnett 9483*d04e62b9SKevin Barnett rc = hpsa_sas_port_add_rphy(hpsa_sas_port, rphy); 9484*d04e62b9SKevin Barnett if (rc) 9485*d04e62b9SKevin Barnett goto free_sas_port; 9486*d04e62b9SKevin Barnett 9487*d04e62b9SKevin Barnett return 0; 9488*d04e62b9SKevin Barnett 9489*d04e62b9SKevin Barnett free_sas_port: 9490*d04e62b9SKevin Barnett hpsa_free_sas_port(hpsa_sas_port); 9491*d04e62b9SKevin Barnett device->sas_port = NULL; 9492*d04e62b9SKevin Barnett 9493*d04e62b9SKevin Barnett return rc; 9494*d04e62b9SKevin Barnett } 9495*d04e62b9SKevin Barnett 9496*d04e62b9SKevin Barnett static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device) 9497*d04e62b9SKevin Barnett { 9498*d04e62b9SKevin Barnett if (device->sas_port) { 9499*d04e62b9SKevin Barnett hpsa_free_sas_port(device->sas_port); 9500*d04e62b9SKevin Barnett device->sas_port = NULL; 9501*d04e62b9SKevin Barnett } 9502*d04e62b9SKevin Barnett } 9503*d04e62b9SKevin Barnett 9504*d04e62b9SKevin Barnett static int 9505*d04e62b9SKevin Barnett hpsa_sas_get_linkerrors(struct sas_phy *phy) 9506*d04e62b9SKevin Barnett { 9507*d04e62b9SKevin Barnett return 0; 9508*d04e62b9SKevin Barnett } 9509*d04e62b9SKevin Barnett 9510*d04e62b9SKevin Barnett static int 9511*d04e62b9SKevin Barnett hpsa_sas_get_enclosure_identifier(struct sas_rphy *rphy, u64 *identifier) 9512*d04e62b9SKevin Barnett { 9513*d04e62b9SKevin Barnett return 0; 9514*d04e62b9SKevin Barnett } 9515*d04e62b9SKevin Barnett 9516*d04e62b9SKevin Barnett static int 9517*d04e62b9SKevin Barnett hpsa_sas_get_bay_identifier(struct sas_rphy *rphy) 9518*d04e62b9SKevin Barnett { 9519*d04e62b9SKevin Barnett return -ENXIO; 9520*d04e62b9SKevin Barnett } 9521*d04e62b9SKevin Barnett 9522*d04e62b9SKevin Barnett static int 9523*d04e62b9SKevin Barnett hpsa_sas_phy_reset(struct sas_phy *phy, int hard_reset) 9524*d04e62b9SKevin Barnett { 9525*d04e62b9SKevin Barnett return 0; 9526*d04e62b9SKevin Barnett } 9527*d04e62b9SKevin Barnett 9528*d04e62b9SKevin Barnett static int 9529*d04e62b9SKevin Barnett hpsa_sas_phy_enable(struct sas_phy *phy, int enable) 9530*d04e62b9SKevin Barnett { 9531*d04e62b9SKevin Barnett return 0; 9532*d04e62b9SKevin Barnett } 9533*d04e62b9SKevin Barnett 9534*d04e62b9SKevin Barnett static int 9535*d04e62b9SKevin Barnett hpsa_sas_phy_setup(struct sas_phy *phy) 9536*d04e62b9SKevin Barnett { 9537*d04e62b9SKevin Barnett return 0; 9538*d04e62b9SKevin Barnett } 9539*d04e62b9SKevin Barnett 9540*d04e62b9SKevin Barnett static void 9541*d04e62b9SKevin Barnett hpsa_sas_phy_release(struct sas_phy *phy) 9542*d04e62b9SKevin Barnett { 9543*d04e62b9SKevin Barnett } 9544*d04e62b9SKevin Barnett 9545*d04e62b9SKevin Barnett static int 9546*d04e62b9SKevin Barnett hpsa_sas_phy_speed(struct sas_phy *phy, struct sas_phy_linkrates *rates) 9547*d04e62b9SKevin Barnett { 9548*d04e62b9SKevin Barnett return -EINVAL; 9549*d04e62b9SKevin Barnett } 9550*d04e62b9SKevin Barnett 9551*d04e62b9SKevin Barnett /* SMP = Serial Management Protocol */ 9552*d04e62b9SKevin Barnett static int 9553*d04e62b9SKevin Barnett hpsa_sas_smp_handler(struct Scsi_Host *shost, struct sas_rphy *rphy, 9554*d04e62b9SKevin Barnett struct request *req) 9555*d04e62b9SKevin Barnett { 9556*d04e62b9SKevin Barnett return -EINVAL; 9557*d04e62b9SKevin Barnett } 9558*d04e62b9SKevin Barnett 9559*d04e62b9SKevin Barnett static struct sas_function_template hpsa_sas_transport_functions = { 9560*d04e62b9SKevin Barnett .get_linkerrors = hpsa_sas_get_linkerrors, 9561*d04e62b9SKevin Barnett .get_enclosure_identifier = hpsa_sas_get_enclosure_identifier, 9562*d04e62b9SKevin Barnett .get_bay_identifier = hpsa_sas_get_bay_identifier, 9563*d04e62b9SKevin Barnett .phy_reset = hpsa_sas_phy_reset, 9564*d04e62b9SKevin Barnett .phy_enable = hpsa_sas_phy_enable, 9565*d04e62b9SKevin Barnett .phy_setup = hpsa_sas_phy_setup, 9566*d04e62b9SKevin Barnett .phy_release = hpsa_sas_phy_release, 9567*d04e62b9SKevin Barnett .set_phy_speed = hpsa_sas_phy_speed, 9568*d04e62b9SKevin Barnett .smp_handler = hpsa_sas_smp_handler, 9569*d04e62b9SKevin Barnett }; 9570*d04e62b9SKevin Barnett 9571edd16368SStephen M. Cameron /* 9572edd16368SStephen M. Cameron * This is it. Register the PCI driver information for the cards we control 9573edd16368SStephen M. Cameron * the OS will call our registered routines when it finds one of our cards. 9574edd16368SStephen M. Cameron */ 9575edd16368SStephen M. Cameron static int __init hpsa_init(void) 9576edd16368SStephen M. Cameron { 9577*d04e62b9SKevin Barnett int rc; 9578*d04e62b9SKevin Barnett 9579*d04e62b9SKevin Barnett hpsa_sas_transport_template = 9580*d04e62b9SKevin Barnett sas_attach_transport(&hpsa_sas_transport_functions); 9581*d04e62b9SKevin Barnett if (!hpsa_sas_transport_template) 9582*d04e62b9SKevin Barnett return -ENODEV; 9583*d04e62b9SKevin Barnett 9584*d04e62b9SKevin Barnett rc = pci_register_driver(&hpsa_pci_driver); 9585*d04e62b9SKevin Barnett 9586*d04e62b9SKevin Barnett if (rc) 9587*d04e62b9SKevin Barnett sas_release_transport(hpsa_sas_transport_template); 9588*d04e62b9SKevin Barnett 9589*d04e62b9SKevin Barnett return rc; 9590edd16368SStephen M. Cameron } 9591edd16368SStephen M. Cameron 9592edd16368SStephen M. Cameron static void __exit hpsa_cleanup(void) 9593edd16368SStephen M. Cameron { 9594edd16368SStephen M. Cameron pci_unregister_driver(&hpsa_pci_driver); 9595*d04e62b9SKevin Barnett sas_release_transport(hpsa_sas_transport_template); 9596edd16368SStephen M. Cameron } 9597edd16368SStephen M. Cameron 9598e1f7de0cSMatt Gates static void __attribute__((unused)) verify_offsets(void) 9599e1f7de0cSMatt Gates { 9600e1f7de0cSMatt Gates #define VERIFY_OFFSET(member, offset) \ 9601dd0e19f3SScott Teel BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset) 9602dd0e19f3SScott Teel 9603dd0e19f3SScott Teel VERIFY_OFFSET(structure_size, 0); 9604dd0e19f3SScott Teel VERIFY_OFFSET(volume_blk_size, 4); 9605dd0e19f3SScott Teel VERIFY_OFFSET(volume_blk_cnt, 8); 9606dd0e19f3SScott Teel VERIFY_OFFSET(phys_blk_shift, 16); 9607dd0e19f3SScott Teel VERIFY_OFFSET(parity_rotation_shift, 17); 9608dd0e19f3SScott Teel VERIFY_OFFSET(strip_size, 18); 9609dd0e19f3SScott Teel VERIFY_OFFSET(disk_starting_blk, 20); 9610dd0e19f3SScott Teel VERIFY_OFFSET(disk_blk_cnt, 28); 9611dd0e19f3SScott Teel VERIFY_OFFSET(data_disks_per_row, 36); 9612dd0e19f3SScott Teel VERIFY_OFFSET(metadata_disks_per_row, 38); 9613dd0e19f3SScott Teel VERIFY_OFFSET(row_cnt, 40); 9614dd0e19f3SScott Teel VERIFY_OFFSET(layout_map_count, 42); 9615dd0e19f3SScott Teel VERIFY_OFFSET(flags, 44); 9616dd0e19f3SScott Teel VERIFY_OFFSET(dekindex, 46); 9617dd0e19f3SScott Teel /* VERIFY_OFFSET(reserved, 48 */ 9618dd0e19f3SScott Teel VERIFY_OFFSET(data, 64); 9619dd0e19f3SScott Teel 9620dd0e19f3SScott Teel #undef VERIFY_OFFSET 9621dd0e19f3SScott Teel 9622dd0e19f3SScott Teel #define VERIFY_OFFSET(member, offset) \ 9623b66cc250SMike Miller BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset) 9624b66cc250SMike Miller 9625b66cc250SMike Miller VERIFY_OFFSET(IU_type, 0); 9626b66cc250SMike Miller VERIFY_OFFSET(direction, 1); 9627b66cc250SMike Miller VERIFY_OFFSET(reply_queue, 2); 9628b66cc250SMike Miller /* VERIFY_OFFSET(reserved1, 3); */ 9629b66cc250SMike Miller VERIFY_OFFSET(scsi_nexus, 4); 9630b66cc250SMike Miller VERIFY_OFFSET(Tag, 8); 9631b66cc250SMike Miller VERIFY_OFFSET(cdb, 16); 9632b66cc250SMike Miller VERIFY_OFFSET(cciss_lun, 32); 9633b66cc250SMike Miller VERIFY_OFFSET(data_len, 40); 9634b66cc250SMike Miller VERIFY_OFFSET(cmd_priority_task_attr, 44); 9635b66cc250SMike Miller VERIFY_OFFSET(sg_count, 45); 9636b66cc250SMike Miller /* VERIFY_OFFSET(reserved3 */ 9637b66cc250SMike Miller VERIFY_OFFSET(err_ptr, 48); 9638b66cc250SMike Miller VERIFY_OFFSET(err_len, 56); 9639b66cc250SMike Miller /* VERIFY_OFFSET(reserved4 */ 9640b66cc250SMike Miller VERIFY_OFFSET(sg, 64); 9641b66cc250SMike Miller 9642b66cc250SMike Miller #undef VERIFY_OFFSET 9643b66cc250SMike Miller 9644b66cc250SMike Miller #define VERIFY_OFFSET(member, offset) \ 9645e1f7de0cSMatt Gates BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset) 9646e1f7de0cSMatt Gates 9647e1f7de0cSMatt Gates VERIFY_OFFSET(dev_handle, 0x00); 9648e1f7de0cSMatt Gates VERIFY_OFFSET(reserved1, 0x02); 9649e1f7de0cSMatt Gates VERIFY_OFFSET(function, 0x03); 9650e1f7de0cSMatt Gates VERIFY_OFFSET(reserved2, 0x04); 9651e1f7de0cSMatt Gates VERIFY_OFFSET(err_info, 0x0C); 9652e1f7de0cSMatt Gates VERIFY_OFFSET(reserved3, 0x10); 9653e1f7de0cSMatt Gates VERIFY_OFFSET(err_info_len, 0x12); 9654e1f7de0cSMatt Gates VERIFY_OFFSET(reserved4, 0x13); 9655e1f7de0cSMatt Gates VERIFY_OFFSET(sgl_offset, 0x14); 9656e1f7de0cSMatt Gates VERIFY_OFFSET(reserved5, 0x15); 9657e1f7de0cSMatt Gates VERIFY_OFFSET(transfer_len, 0x1C); 9658e1f7de0cSMatt Gates VERIFY_OFFSET(reserved6, 0x20); 9659e1f7de0cSMatt Gates VERIFY_OFFSET(io_flags, 0x24); 9660e1f7de0cSMatt Gates VERIFY_OFFSET(reserved7, 0x26); 9661e1f7de0cSMatt Gates VERIFY_OFFSET(LUN, 0x34); 9662e1f7de0cSMatt Gates VERIFY_OFFSET(control, 0x3C); 9663e1f7de0cSMatt Gates VERIFY_OFFSET(CDB, 0x40); 9664e1f7de0cSMatt Gates VERIFY_OFFSET(reserved8, 0x50); 9665e1f7de0cSMatt Gates VERIFY_OFFSET(host_context_flags, 0x60); 9666e1f7de0cSMatt Gates VERIFY_OFFSET(timeout_sec, 0x62); 9667e1f7de0cSMatt Gates VERIFY_OFFSET(ReplyQueue, 0x64); 9668e1f7de0cSMatt Gates VERIFY_OFFSET(reserved9, 0x65); 966950a0decfSStephen M. Cameron VERIFY_OFFSET(tag, 0x68); 9670e1f7de0cSMatt Gates VERIFY_OFFSET(host_addr, 0x70); 9671e1f7de0cSMatt Gates VERIFY_OFFSET(CISS_LUN, 0x78); 9672e1f7de0cSMatt Gates VERIFY_OFFSET(SG, 0x78 + 8); 9673e1f7de0cSMatt Gates #undef VERIFY_OFFSET 9674e1f7de0cSMatt Gates } 9675e1f7de0cSMatt Gates 9676edd16368SStephen M. Cameron module_init(hpsa_init); 9677edd16368SStephen M. Cameron module_exit(hpsa_cleanup); 9678