1edd16368SStephen M. Cameron /* 2edd16368SStephen M. Cameron * Disk Array driver for HP Smart Array SAS controllers 394c7bc31SDon Brace * Copyright 2016 Microsemi Corporation 41358f6dcSDon Brace * Copyright 2014-2015 PMC-Sierra, Inc. 51358f6dcSDon Brace * Copyright 2000,2009-2015 Hewlett-Packard Development Company, L.P. 6edd16368SStephen M. Cameron * 7edd16368SStephen M. Cameron * This program is free software; you can redistribute it and/or modify 8edd16368SStephen M. Cameron * it under the terms of the GNU General Public License as published by 9edd16368SStephen M. Cameron * the Free Software Foundation; version 2 of the License. 10edd16368SStephen M. Cameron * 11edd16368SStephen M. Cameron * This program is distributed in the hope that it will be useful, 12edd16368SStephen M. Cameron * but WITHOUT ANY WARRANTY; without even the implied warranty of 13edd16368SStephen M. Cameron * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or 14edd16368SStephen M. Cameron * NON INFRINGEMENT. See the GNU General Public License for more details. 15edd16368SStephen M. Cameron * 1694c7bc31SDon Brace * Questions/Comments/Bugfixes to esc.storagedev@microsemi.com 17edd16368SStephen M. Cameron * 18edd16368SStephen M. Cameron */ 19edd16368SStephen M. Cameron 20edd16368SStephen M. Cameron #include <linux/module.h> 21edd16368SStephen M. Cameron #include <linux/interrupt.h> 22edd16368SStephen M. Cameron #include <linux/types.h> 23edd16368SStephen M. Cameron #include <linux/pci.h> 24e5a44df8SMatthew Garrett #include <linux/pci-aspm.h> 25edd16368SStephen M. Cameron #include <linux/kernel.h> 26edd16368SStephen M. Cameron #include <linux/slab.h> 27edd16368SStephen M. Cameron #include <linux/delay.h> 28edd16368SStephen M. Cameron #include <linux/fs.h> 29edd16368SStephen M. Cameron #include <linux/timer.h> 30edd16368SStephen M. Cameron #include <linux/init.h> 31edd16368SStephen M. Cameron #include <linux/spinlock.h> 32edd16368SStephen M. Cameron #include <linux/compat.h> 33edd16368SStephen M. Cameron #include <linux/blktrace_api.h> 34edd16368SStephen M. Cameron #include <linux/uaccess.h> 35edd16368SStephen M. Cameron #include <linux/io.h> 36edd16368SStephen M. Cameron #include <linux/dma-mapping.h> 37edd16368SStephen M. Cameron #include <linux/completion.h> 38edd16368SStephen M. Cameron #include <linux/moduleparam.h> 39edd16368SStephen M. Cameron #include <scsi/scsi.h> 40edd16368SStephen M. Cameron #include <scsi/scsi_cmnd.h> 41edd16368SStephen M. Cameron #include <scsi/scsi_device.h> 42edd16368SStephen M. Cameron #include <scsi/scsi_host.h> 43667e23d4SStephen M. Cameron #include <scsi/scsi_tcq.h> 449437ac43SStephen Cameron #include <scsi/scsi_eh.h> 45d04e62b9SKevin Barnett #include <scsi/scsi_transport_sas.h> 4673153fe5SWebb Scales #include <scsi/scsi_dbg.h> 47edd16368SStephen M. Cameron #include <linux/cciss_ioctl.h> 48edd16368SStephen M. Cameron #include <linux/string.h> 49edd16368SStephen M. Cameron #include <linux/bitmap.h> 5060063497SArun Sharma #include <linux/atomic.h> 51a0c12413SStephen M. Cameron #include <linux/jiffies.h> 5242a91641SDon Brace #include <linux/percpu-defs.h> 53094963daSStephen M. Cameron #include <linux/percpu.h> 542b08b3e9SDon Brace #include <asm/unaligned.h> 55283b4a9bSStephen M. Cameron #include <asm/div64.h> 56edd16368SStephen M. Cameron #include "hpsa_cmd.h" 57edd16368SStephen M. Cameron #include "hpsa.h" 58edd16368SStephen M. Cameron 59ec2c3aa9SDon Brace /* 60ec2c3aa9SDon Brace * HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' 61ec2c3aa9SDon Brace * with an optional trailing '-' followed by a byte value (0-255). 62ec2c3aa9SDon Brace */ 63ec2c3aa9SDon Brace #define HPSA_DRIVER_VERSION "3.4.14-0" 64edd16368SStephen M. Cameron #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")" 65f79cfec6SStephen M. Cameron #define HPSA "hpsa" 66edd16368SStephen M. Cameron 67007e7aa9SRobert Elliott /* How long to wait for CISS doorbell communication */ 68007e7aa9SRobert Elliott #define CLEAR_EVENT_WAIT_INTERVAL 20 /* ms for each msleep() call */ 69007e7aa9SRobert Elliott #define MODE_CHANGE_WAIT_INTERVAL 10 /* ms for each msleep() call */ 70007e7aa9SRobert Elliott #define MAX_CLEAR_EVENT_WAIT 30000 /* times 20 ms = 600 s */ 71007e7aa9SRobert Elliott #define MAX_MODE_CHANGE_WAIT 2000 /* times 10 ms = 20 s */ 72edd16368SStephen M. Cameron #define MAX_IOCTL_CONFIG_WAIT 1000 73edd16368SStephen M. Cameron 74edd16368SStephen M. Cameron /*define how many times we will try a command because of bus resets */ 75edd16368SStephen M. Cameron #define MAX_CMD_RETRIES 3 76edd16368SStephen M. Cameron 77edd16368SStephen M. Cameron /* Embedded module documentation macros - see modules.h */ 78edd16368SStephen M. Cameron MODULE_AUTHOR("Hewlett-Packard Company"); 79edd16368SStephen M. Cameron MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \ 80edd16368SStephen M. Cameron HPSA_DRIVER_VERSION); 81edd16368SStephen M. Cameron MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers"); 82edd16368SStephen M. Cameron MODULE_VERSION(HPSA_DRIVER_VERSION); 83edd16368SStephen M. Cameron MODULE_LICENSE("GPL"); 84edd16368SStephen M. Cameron 85edd16368SStephen M. Cameron static int hpsa_allow_any; 86edd16368SStephen M. Cameron module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR); 87edd16368SStephen M. Cameron MODULE_PARM_DESC(hpsa_allow_any, 88edd16368SStephen M. Cameron "Allow hpsa driver to access unknown HP Smart Array hardware"); 8902ec19c8SStephen M. Cameron static int hpsa_simple_mode; 9002ec19c8SStephen M. Cameron module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR); 9102ec19c8SStephen M. Cameron MODULE_PARM_DESC(hpsa_simple_mode, 9202ec19c8SStephen M. Cameron "Use 'simple mode' rather than 'performant mode'"); 93edd16368SStephen M. Cameron 94edd16368SStephen M. Cameron /* define the PCI info for the cards we can control */ 95edd16368SStephen M. Cameron static const struct pci_device_id hpsa_pci_device_id[] = { 96edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241}, 97edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243}, 98edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245}, 99edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247}, 100edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249}, 101163dbcd8SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A}, 102163dbcd8SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B}, 103f8b01eb9SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233}, 1049143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350}, 1059143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351}, 1069143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352}, 1079143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353}, 1089143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354}, 1099143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355}, 1109143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356}, 111fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1921}, 112fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1922}, 113fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1923}, 114fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1924}, 115fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1926}, 116fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1928}, 11797b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1929}, 11897b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BD}, 11997b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BE}, 12097b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BF}, 12197b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C0}, 12297b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C1}, 12397b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C2}, 12497b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C3}, 12597b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C4}, 12697b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C5}, 1273b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C6}, 12897b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C7}, 12997b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C8}, 13097b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C9}, 1313b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CA}, 1323b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CB}, 1333b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CC}, 1343b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CD}, 1353b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CE}, 136fdfa4b6dSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0580}, 137cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0581}, 138cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0582}, 139cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0583}, 140cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0584}, 141cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0585}, 1428e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076}, 1438e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087}, 1448e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D}, 1458e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088}, 1468e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f}, 147edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 148edd16368SStephen M. Cameron PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0}, 149edd16368SStephen M. Cameron {0,} 150edd16368SStephen M. Cameron }; 151edd16368SStephen M. Cameron 152edd16368SStephen M. Cameron MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id); 153edd16368SStephen M. Cameron 154edd16368SStephen M. Cameron /* board_id = Subsystem Device ID & Vendor ID 155edd16368SStephen M. Cameron * product = Marketing Name for the board 156edd16368SStephen M. Cameron * access = Address of the struct of function pointers 157edd16368SStephen M. Cameron */ 158edd16368SStephen M. Cameron static struct board_type products[] = { 159edd16368SStephen M. Cameron {0x3241103C, "Smart Array P212", &SA5_access}, 160edd16368SStephen M. Cameron {0x3243103C, "Smart Array P410", &SA5_access}, 161edd16368SStephen M. Cameron {0x3245103C, "Smart Array P410i", &SA5_access}, 162edd16368SStephen M. Cameron {0x3247103C, "Smart Array P411", &SA5_access}, 163edd16368SStephen M. Cameron {0x3249103C, "Smart Array P812", &SA5_access}, 164163dbcd8SMike Miller {0x324A103C, "Smart Array P712m", &SA5_access}, 165163dbcd8SMike Miller {0x324B103C, "Smart Array P711m", &SA5_access}, 1667d2cce58SStephen M. Cameron {0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */ 167fe0c9610SMike Miller {0x3350103C, "Smart Array P222", &SA5_access}, 168fe0c9610SMike Miller {0x3351103C, "Smart Array P420", &SA5_access}, 169fe0c9610SMike Miller {0x3352103C, "Smart Array P421", &SA5_access}, 170fe0c9610SMike Miller {0x3353103C, "Smart Array P822", &SA5_access}, 171fe0c9610SMike Miller {0x3354103C, "Smart Array P420i", &SA5_access}, 172fe0c9610SMike Miller {0x3355103C, "Smart Array P220i", &SA5_access}, 173fe0c9610SMike Miller {0x3356103C, "Smart Array P721m", &SA5_access}, 1741fd6c8e3SMike Miller {0x1921103C, "Smart Array P830i", &SA5_access}, 1751fd6c8e3SMike Miller {0x1922103C, "Smart Array P430", &SA5_access}, 1761fd6c8e3SMike Miller {0x1923103C, "Smart Array P431", &SA5_access}, 1771fd6c8e3SMike Miller {0x1924103C, "Smart Array P830", &SA5_access}, 1781fd6c8e3SMike Miller {0x1926103C, "Smart Array P731m", &SA5_access}, 1791fd6c8e3SMike Miller {0x1928103C, "Smart Array P230i", &SA5_access}, 1801fd6c8e3SMike Miller {0x1929103C, "Smart Array P530", &SA5_access}, 18127fb8137SDon Brace {0x21BD103C, "Smart Array P244br", &SA5_access}, 18227fb8137SDon Brace {0x21BE103C, "Smart Array P741m", &SA5_access}, 18327fb8137SDon Brace {0x21BF103C, "Smart HBA H240ar", &SA5_access}, 18427fb8137SDon Brace {0x21C0103C, "Smart Array P440ar", &SA5_access}, 185c8ae0ab1SDon Brace {0x21C1103C, "Smart Array P840ar", &SA5_access}, 18627fb8137SDon Brace {0x21C2103C, "Smart Array P440", &SA5_access}, 18727fb8137SDon Brace {0x21C3103C, "Smart Array P441", &SA5_access}, 18897b9f53dSMike Miller {0x21C4103C, "Smart Array", &SA5_access}, 18927fb8137SDon Brace {0x21C5103C, "Smart Array P841", &SA5_access}, 19027fb8137SDon Brace {0x21C6103C, "Smart HBA H244br", &SA5_access}, 19127fb8137SDon Brace {0x21C7103C, "Smart HBA H240", &SA5_access}, 19227fb8137SDon Brace {0x21C8103C, "Smart HBA H241", &SA5_access}, 19397b9f53dSMike Miller {0x21C9103C, "Smart Array", &SA5_access}, 19427fb8137SDon Brace {0x21CA103C, "Smart Array P246br", &SA5_access}, 19527fb8137SDon Brace {0x21CB103C, "Smart Array P840", &SA5_access}, 1963b7a45e5SJoe Handzik {0x21CC103C, "Smart Array", &SA5_access}, 1973b7a45e5SJoe Handzik {0x21CD103C, "Smart Array", &SA5_access}, 19827fb8137SDon Brace {0x21CE103C, "Smart HBA", &SA5_access}, 199fdfa4b6dSDon Brace {0x05809005, "SmartHBA-SA", &SA5_access}, 200cbb47dcbSDon Brace {0x05819005, "SmartHBA-SA 8i", &SA5_access}, 201cbb47dcbSDon Brace {0x05829005, "SmartHBA-SA 8i8e", &SA5_access}, 202cbb47dcbSDon Brace {0x05839005, "SmartHBA-SA 8e", &SA5_access}, 203cbb47dcbSDon Brace {0x05849005, "SmartHBA-SA 16i", &SA5_access}, 204cbb47dcbSDon Brace {0x05859005, "SmartHBA-SA 4i4e", &SA5_access}, 2058e616a5eSStephen M. Cameron {0x00761590, "HP Storage P1224 Array Controller", &SA5_access}, 2068e616a5eSStephen M. Cameron {0x00871590, "HP Storage P1224e Array Controller", &SA5_access}, 2078e616a5eSStephen M. Cameron {0x007D1590, "HP Storage P1228 Array Controller", &SA5_access}, 2088e616a5eSStephen M. Cameron {0x00881590, "HP Storage P1228e Array Controller", &SA5_access}, 2098e616a5eSStephen M. Cameron {0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access}, 210edd16368SStephen M. Cameron {0xFFFF103C, "Unknown Smart Array", &SA5_access}, 211edd16368SStephen M. Cameron }; 212edd16368SStephen M. Cameron 213d04e62b9SKevin Barnett static struct scsi_transport_template *hpsa_sas_transport_template; 214d04e62b9SKevin Barnett static int hpsa_add_sas_host(struct ctlr_info *h); 215d04e62b9SKevin Barnett static void hpsa_delete_sas_host(struct ctlr_info *h); 216d04e62b9SKevin Barnett static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node, 217d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *device); 218d04e62b9SKevin Barnett static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device); 219d04e62b9SKevin Barnett static struct hpsa_scsi_dev_t 220d04e62b9SKevin Barnett *hpsa_find_device_by_sas_rphy(struct ctlr_info *h, 221d04e62b9SKevin Barnett struct sas_rphy *rphy); 222d04e62b9SKevin Barnett 223a58e7e53SWebb Scales #define SCSI_CMD_BUSY ((struct scsi_cmnd *)&hpsa_cmd_busy) 224a58e7e53SWebb Scales static const struct scsi_cmnd hpsa_cmd_busy; 225a58e7e53SWebb Scales #define SCSI_CMD_IDLE ((struct scsi_cmnd *)&hpsa_cmd_idle) 226a58e7e53SWebb Scales static const struct scsi_cmnd hpsa_cmd_idle; 227edd16368SStephen M. Cameron static int number_of_controllers; 228edd16368SStephen M. Cameron 22910f66018SStephen M. Cameron static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id); 23010f66018SStephen M. Cameron static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id); 23142a91641SDon Brace static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg); 232edd16368SStephen M. Cameron 233edd16368SStephen M. Cameron #ifdef CONFIG_COMPAT 23442a91641SDon Brace static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, 23542a91641SDon Brace void __user *arg); 236edd16368SStephen M. Cameron #endif 237edd16368SStephen M. Cameron 238edd16368SStephen M. Cameron static void cmd_free(struct ctlr_info *h, struct CommandList *c); 239edd16368SStephen M. Cameron static struct CommandList *cmd_alloc(struct ctlr_info *h); 24073153fe5SWebb Scales static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c); 24173153fe5SWebb Scales static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h, 24273153fe5SWebb Scales struct scsi_cmnd *scmd); 243a2dac136SStephen M. Cameron static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 244b7bb24ebSStephen M. Cameron void *buff, size_t size, u16 page_code, unsigned char *scsi3addr, 245edd16368SStephen M. Cameron int cmd_type); 2462c143342SRobert Elliott static void hpsa_free_cmd_pool(struct ctlr_info *h); 247b7bb24ebSStephen M. Cameron #define VPD_PAGE (1 << 8) 248b48d9804SDon Brace #define HPSA_SIMPLE_ERROR_BITS 0x03 249edd16368SStephen M. Cameron 250f281233dSJeff Garzik static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd); 251a08a8471SStephen M. Cameron static void hpsa_scan_start(struct Scsi_Host *); 252a08a8471SStephen M. Cameron static int hpsa_scan_finished(struct Scsi_Host *sh, 253a08a8471SStephen M. Cameron unsigned long elapsed_time); 2547c0a0229SDon Brace static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth); 255edd16368SStephen M. Cameron 256edd16368SStephen M. Cameron static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd); 25775167d2cSStephen M. Cameron static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd); 258edd16368SStephen M. Cameron static int hpsa_slave_alloc(struct scsi_device *sdev); 25941ce4c35SStephen Cameron static int hpsa_slave_configure(struct scsi_device *sdev); 260edd16368SStephen M. Cameron static void hpsa_slave_destroy(struct scsi_device *sdev); 261edd16368SStephen M. Cameron 2628aa60681SDon Brace static void hpsa_update_scsi_devices(struct ctlr_info *h); 263edd16368SStephen M. Cameron static int check_for_unit_attention(struct ctlr_info *h, 264edd16368SStephen M. Cameron struct CommandList *c); 265edd16368SStephen M. Cameron static void check_ioctl_unit_attention(struct ctlr_info *h, 266edd16368SStephen M. Cameron struct CommandList *c); 267303932fdSDon Brace /* performant mode helper functions */ 268303932fdSDon Brace static void calc_bucket_map(int *bucket, int num_buckets, 2692b08b3e9SDon Brace int nsgs, int min_blocks, u32 *bucket_map); 270105a3dbcSRobert Elliott static void hpsa_free_performant_mode(struct ctlr_info *h); 271105a3dbcSRobert Elliott static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h); 272254f796bSMatt Gates static inline u32 next_command(struct ctlr_info *h, u8 q); 2736f039790SGreg Kroah-Hartman static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 2746f039790SGreg Kroah-Hartman u32 *cfg_base_addr, u64 *cfg_base_addr_index, 2751df8552aSStephen M. Cameron u64 *cfg_offset); 2766f039790SGreg Kroah-Hartman static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 2771df8552aSStephen M. Cameron unsigned long *memory_bar); 2786f039790SGreg Kroah-Hartman static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id); 2796f039790SGreg Kroah-Hartman static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 2806f039790SGreg Kroah-Hartman int wait_for_ready); 28175167d2cSStephen M. Cameron static inline void finish_cmd(struct CommandList *c); 282c706a795SRobert Elliott static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h); 283fe5389c8SStephen M. Cameron #define BOARD_NOT_READY 0 284fe5389c8SStephen M. Cameron #define BOARD_READY 1 28523100dd9SStephen M. Cameron static void hpsa_drain_accel_commands(struct ctlr_info *h); 28676438d08SStephen M. Cameron static void hpsa_flush_cache(struct ctlr_info *h); 287c349775eSScott Teel static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h, 288c349775eSScott Teel struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 28903383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk); 290080ef1ccSDon Brace static void hpsa_command_resubmit_worker(struct work_struct *work); 29125163bd5SWebb Scales static u32 lockup_detected(struct ctlr_info *h); 29225163bd5SWebb Scales static int detect_controller_lockup(struct ctlr_info *h); 293c2adae44SScott Teel static void hpsa_disable_rld_caching(struct ctlr_info *h); 294d04e62b9SKevin Barnett static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 295d04e62b9SKevin Barnett struct ReportExtendedLUNdata *buf, int bufsize); 29634592254SScott Teel static int hpsa_luns_changed(struct ctlr_info *h); 297edd16368SStephen M. Cameron 298edd16368SStephen M. Cameron static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev) 299edd16368SStephen M. Cameron { 300edd16368SStephen M. Cameron unsigned long *priv = shost_priv(sdev->host); 301edd16368SStephen M. Cameron return (struct ctlr_info *) *priv; 302edd16368SStephen M. Cameron } 303edd16368SStephen M. Cameron 304a23513e8SStephen M. Cameron static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh) 305a23513e8SStephen M. Cameron { 306a23513e8SStephen M. Cameron unsigned long *priv = shost_priv(sh); 307a23513e8SStephen M. Cameron return (struct ctlr_info *) *priv; 308a23513e8SStephen M. Cameron } 309a23513e8SStephen M. Cameron 310a58e7e53SWebb Scales static inline bool hpsa_is_cmd_idle(struct CommandList *c) 311a58e7e53SWebb Scales { 312a58e7e53SWebb Scales return c->scsi_cmd == SCSI_CMD_IDLE; 313a58e7e53SWebb Scales } 314a58e7e53SWebb Scales 315d604f533SWebb Scales static inline bool hpsa_is_pending_event(struct CommandList *c) 316d604f533SWebb Scales { 317d604f533SWebb Scales return c->abort_pending || c->reset_pending; 318d604f533SWebb Scales } 319d604f533SWebb Scales 3209437ac43SStephen Cameron /* extract sense key, asc, and ascq from sense data. -1 means invalid. */ 3219437ac43SStephen Cameron static void decode_sense_data(const u8 *sense_data, int sense_data_len, 3229437ac43SStephen Cameron u8 *sense_key, u8 *asc, u8 *ascq) 3239437ac43SStephen Cameron { 3249437ac43SStephen Cameron struct scsi_sense_hdr sshdr; 3259437ac43SStephen Cameron bool rc; 3269437ac43SStephen Cameron 3279437ac43SStephen Cameron *sense_key = -1; 3289437ac43SStephen Cameron *asc = -1; 3299437ac43SStephen Cameron *ascq = -1; 3309437ac43SStephen Cameron 3319437ac43SStephen Cameron if (sense_data_len < 1) 3329437ac43SStephen Cameron return; 3339437ac43SStephen Cameron 3349437ac43SStephen Cameron rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr); 3359437ac43SStephen Cameron if (rc) { 3369437ac43SStephen Cameron *sense_key = sshdr.sense_key; 3379437ac43SStephen Cameron *asc = sshdr.asc; 3389437ac43SStephen Cameron *ascq = sshdr.ascq; 3399437ac43SStephen Cameron } 3409437ac43SStephen Cameron } 3419437ac43SStephen Cameron 342edd16368SStephen M. Cameron static int check_for_unit_attention(struct ctlr_info *h, 343edd16368SStephen M. Cameron struct CommandList *c) 344edd16368SStephen M. Cameron { 3459437ac43SStephen Cameron u8 sense_key, asc, ascq; 3469437ac43SStephen Cameron int sense_len; 3479437ac43SStephen Cameron 3489437ac43SStephen Cameron if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo)) 3499437ac43SStephen Cameron sense_len = sizeof(c->err_info->SenseInfo); 3509437ac43SStephen Cameron else 3519437ac43SStephen Cameron sense_len = c->err_info->SenseLen; 3529437ac43SStephen Cameron 3539437ac43SStephen Cameron decode_sense_data(c->err_info->SenseInfo, sense_len, 3549437ac43SStephen Cameron &sense_key, &asc, &ascq); 35581c27557SDon Brace if (sense_key != UNIT_ATTENTION || asc == 0xff) 356edd16368SStephen M. Cameron return 0; 357edd16368SStephen M. Cameron 3589437ac43SStephen Cameron switch (asc) { 359edd16368SStephen M. Cameron case STATE_CHANGED: 3609437ac43SStephen Cameron dev_warn(&h->pdev->dev, 3612946e82bSRobert Elliott "%s: a state change detected, command retried\n", 3622946e82bSRobert Elliott h->devname); 363edd16368SStephen M. Cameron break; 364edd16368SStephen M. Cameron case LUN_FAILED: 3657f73695aSStephen M. Cameron dev_warn(&h->pdev->dev, 3662946e82bSRobert Elliott "%s: LUN failure detected\n", h->devname); 367edd16368SStephen M. Cameron break; 368edd16368SStephen M. Cameron case REPORT_LUNS_CHANGED: 3697f73695aSStephen M. Cameron dev_warn(&h->pdev->dev, 3702946e82bSRobert Elliott "%s: report LUN data changed\n", h->devname); 371edd16368SStephen M. Cameron /* 3724f4eb9f1SScott Teel * Note: this REPORT_LUNS_CHANGED condition only occurs on the external 3734f4eb9f1SScott Teel * target (array) devices. 374edd16368SStephen M. Cameron */ 375edd16368SStephen M. Cameron break; 376edd16368SStephen M. Cameron case POWER_OR_RESET: 3772946e82bSRobert Elliott dev_warn(&h->pdev->dev, 3782946e82bSRobert Elliott "%s: a power on or device reset detected\n", 3792946e82bSRobert Elliott h->devname); 380edd16368SStephen M. Cameron break; 381edd16368SStephen M. Cameron case UNIT_ATTENTION_CLEARED: 3822946e82bSRobert Elliott dev_warn(&h->pdev->dev, 3832946e82bSRobert Elliott "%s: unit attention cleared by another initiator\n", 3842946e82bSRobert Elliott h->devname); 385edd16368SStephen M. Cameron break; 386edd16368SStephen M. Cameron default: 3872946e82bSRobert Elliott dev_warn(&h->pdev->dev, 3882946e82bSRobert Elliott "%s: unknown unit attention detected\n", 3892946e82bSRobert Elliott h->devname); 390edd16368SStephen M. Cameron break; 391edd16368SStephen M. Cameron } 392edd16368SStephen M. Cameron return 1; 393edd16368SStephen M. Cameron } 394edd16368SStephen M. Cameron 395852af20aSMatt Bondurant static int check_for_busy(struct ctlr_info *h, struct CommandList *c) 396852af20aSMatt Bondurant { 397852af20aSMatt Bondurant if (c->err_info->CommandStatus != CMD_TARGET_STATUS || 398852af20aSMatt Bondurant (c->err_info->ScsiStatus != SAM_STAT_BUSY && 399852af20aSMatt Bondurant c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL)) 400852af20aSMatt Bondurant return 0; 401852af20aSMatt Bondurant dev_warn(&h->pdev->dev, HPSA "device busy"); 402852af20aSMatt Bondurant return 1; 403852af20aSMatt Bondurant } 404852af20aSMatt Bondurant 405e985c58fSStephen Cameron static u32 lockup_detected(struct ctlr_info *h); 406e985c58fSStephen Cameron static ssize_t host_show_lockup_detected(struct device *dev, 407e985c58fSStephen Cameron struct device_attribute *attr, char *buf) 408e985c58fSStephen Cameron { 409e985c58fSStephen Cameron int ld; 410e985c58fSStephen Cameron struct ctlr_info *h; 411e985c58fSStephen Cameron struct Scsi_Host *shost = class_to_shost(dev); 412e985c58fSStephen Cameron 413e985c58fSStephen Cameron h = shost_to_hba(shost); 414e985c58fSStephen Cameron ld = lockup_detected(h); 415e985c58fSStephen Cameron 416e985c58fSStephen Cameron return sprintf(buf, "ld=%d\n", ld); 417e985c58fSStephen Cameron } 418e985c58fSStephen Cameron 419da0697bdSScott Teel static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev, 420da0697bdSScott Teel struct device_attribute *attr, 421da0697bdSScott Teel const char *buf, size_t count) 422da0697bdSScott Teel { 423da0697bdSScott Teel int status, len; 424da0697bdSScott Teel struct ctlr_info *h; 425da0697bdSScott Teel struct Scsi_Host *shost = class_to_shost(dev); 426da0697bdSScott Teel char tmpbuf[10]; 427da0697bdSScott Teel 428da0697bdSScott Teel if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO)) 429da0697bdSScott Teel return -EACCES; 430da0697bdSScott Teel len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count; 431da0697bdSScott Teel strncpy(tmpbuf, buf, len); 432da0697bdSScott Teel tmpbuf[len] = '\0'; 433da0697bdSScott Teel if (sscanf(tmpbuf, "%d", &status) != 1) 434da0697bdSScott Teel return -EINVAL; 435da0697bdSScott Teel h = shost_to_hba(shost); 436da0697bdSScott Teel h->acciopath_status = !!status; 437da0697bdSScott Teel dev_warn(&h->pdev->dev, 438da0697bdSScott Teel "hpsa: HP SSD Smart Path %s via sysfs update.\n", 439da0697bdSScott Teel h->acciopath_status ? "enabled" : "disabled"); 440da0697bdSScott Teel return count; 441da0697bdSScott Teel } 442da0697bdSScott Teel 4432ba8bfc8SStephen M. Cameron static ssize_t host_store_raid_offload_debug(struct device *dev, 4442ba8bfc8SStephen M. Cameron struct device_attribute *attr, 4452ba8bfc8SStephen M. Cameron const char *buf, size_t count) 4462ba8bfc8SStephen M. Cameron { 4472ba8bfc8SStephen M. Cameron int debug_level, len; 4482ba8bfc8SStephen M. Cameron struct ctlr_info *h; 4492ba8bfc8SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 4502ba8bfc8SStephen M. Cameron char tmpbuf[10]; 4512ba8bfc8SStephen M. Cameron 4522ba8bfc8SStephen M. Cameron if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO)) 4532ba8bfc8SStephen M. Cameron return -EACCES; 4542ba8bfc8SStephen M. Cameron len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count; 4552ba8bfc8SStephen M. Cameron strncpy(tmpbuf, buf, len); 4562ba8bfc8SStephen M. Cameron tmpbuf[len] = '\0'; 4572ba8bfc8SStephen M. Cameron if (sscanf(tmpbuf, "%d", &debug_level) != 1) 4582ba8bfc8SStephen M. Cameron return -EINVAL; 4592ba8bfc8SStephen M. Cameron if (debug_level < 0) 4602ba8bfc8SStephen M. Cameron debug_level = 0; 4612ba8bfc8SStephen M. Cameron h = shost_to_hba(shost); 4622ba8bfc8SStephen M. Cameron h->raid_offload_debug = debug_level; 4632ba8bfc8SStephen M. Cameron dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n", 4642ba8bfc8SStephen M. Cameron h->raid_offload_debug); 4652ba8bfc8SStephen M. Cameron return count; 4662ba8bfc8SStephen M. Cameron } 4672ba8bfc8SStephen M. Cameron 468edd16368SStephen M. Cameron static ssize_t host_store_rescan(struct device *dev, 469edd16368SStephen M. Cameron struct device_attribute *attr, 470edd16368SStephen M. Cameron const char *buf, size_t count) 471edd16368SStephen M. Cameron { 472edd16368SStephen M. Cameron struct ctlr_info *h; 473edd16368SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 474a23513e8SStephen M. Cameron h = shost_to_hba(shost); 47531468401SMike Miller hpsa_scan_start(h->scsi_host); 476edd16368SStephen M. Cameron return count; 477edd16368SStephen M. Cameron } 478edd16368SStephen M. Cameron 479d28ce020SStephen M. Cameron static ssize_t host_show_firmware_revision(struct device *dev, 480d28ce020SStephen M. Cameron struct device_attribute *attr, char *buf) 481d28ce020SStephen M. Cameron { 482d28ce020SStephen M. Cameron struct ctlr_info *h; 483d28ce020SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 484d28ce020SStephen M. Cameron unsigned char *fwrev; 485d28ce020SStephen M. Cameron 486d28ce020SStephen M. Cameron h = shost_to_hba(shost); 487d28ce020SStephen M. Cameron if (!h->hba_inquiry_data) 488d28ce020SStephen M. Cameron return 0; 489d28ce020SStephen M. Cameron fwrev = &h->hba_inquiry_data[32]; 490d28ce020SStephen M. Cameron return snprintf(buf, 20, "%c%c%c%c\n", 491d28ce020SStephen M. Cameron fwrev[0], fwrev[1], fwrev[2], fwrev[3]); 492d28ce020SStephen M. Cameron } 493d28ce020SStephen M. Cameron 49494a13649SStephen M. Cameron static ssize_t host_show_commands_outstanding(struct device *dev, 49594a13649SStephen M. Cameron struct device_attribute *attr, char *buf) 49694a13649SStephen M. Cameron { 49794a13649SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 49894a13649SStephen M. Cameron struct ctlr_info *h = shost_to_hba(shost); 49994a13649SStephen M. Cameron 5000cbf768eSStephen M. Cameron return snprintf(buf, 20, "%d\n", 5010cbf768eSStephen M. Cameron atomic_read(&h->commands_outstanding)); 50294a13649SStephen M. Cameron } 50394a13649SStephen M. Cameron 504745a7a25SStephen M. Cameron static ssize_t host_show_transport_mode(struct device *dev, 505745a7a25SStephen M. Cameron struct device_attribute *attr, char *buf) 506745a7a25SStephen M. Cameron { 507745a7a25SStephen M. Cameron struct ctlr_info *h; 508745a7a25SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 509745a7a25SStephen M. Cameron 510745a7a25SStephen M. Cameron h = shost_to_hba(shost); 511745a7a25SStephen M. Cameron return snprintf(buf, 20, "%s\n", 512960a30e7SStephen M. Cameron h->transMethod & CFGTBL_Trans_Performant ? 513745a7a25SStephen M. Cameron "performant" : "simple"); 514745a7a25SStephen M. Cameron } 515745a7a25SStephen M. Cameron 516da0697bdSScott Teel static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev, 517da0697bdSScott Teel struct device_attribute *attr, char *buf) 518da0697bdSScott Teel { 519da0697bdSScott Teel struct ctlr_info *h; 520da0697bdSScott Teel struct Scsi_Host *shost = class_to_shost(dev); 521da0697bdSScott Teel 522da0697bdSScott Teel h = shost_to_hba(shost); 523da0697bdSScott Teel return snprintf(buf, 30, "HP SSD Smart Path %s\n", 524da0697bdSScott Teel (h->acciopath_status == 1) ? "enabled" : "disabled"); 525da0697bdSScott Teel } 526da0697bdSScott Teel 52746380786SStephen M. Cameron /* List of controllers which cannot be hard reset on kexec with reset_devices */ 528941b1cdaSStephen M. Cameron static u32 unresettable_controller[] = { 529941b1cdaSStephen M. Cameron 0x324a103C, /* Smart Array P712m */ 530941b1cdaSStephen M. Cameron 0x324b103C, /* Smart Array P711m */ 531941b1cdaSStephen M. Cameron 0x3223103C, /* Smart Array P800 */ 532941b1cdaSStephen M. Cameron 0x3234103C, /* Smart Array P400 */ 533941b1cdaSStephen M. Cameron 0x3235103C, /* Smart Array P400i */ 534941b1cdaSStephen M. Cameron 0x3211103C, /* Smart Array E200i */ 535941b1cdaSStephen M. Cameron 0x3212103C, /* Smart Array E200 */ 536941b1cdaSStephen M. Cameron 0x3213103C, /* Smart Array E200i */ 537941b1cdaSStephen M. Cameron 0x3214103C, /* Smart Array E200i */ 538941b1cdaSStephen M. Cameron 0x3215103C, /* Smart Array E200i */ 539941b1cdaSStephen M. Cameron 0x3237103C, /* Smart Array E500 */ 540941b1cdaSStephen M. Cameron 0x323D103C, /* Smart Array P700m */ 5417af0abbcSTomas Henzl 0x40800E11, /* Smart Array 5i */ 542941b1cdaSStephen M. Cameron 0x409C0E11, /* Smart Array 6400 */ 543941b1cdaSStephen M. Cameron 0x409D0E11, /* Smart Array 6400 EM */ 5445a4f934eSTomas Henzl 0x40700E11, /* Smart Array 5300 */ 5455a4f934eSTomas Henzl 0x40820E11, /* Smart Array 532 */ 5465a4f934eSTomas Henzl 0x40830E11, /* Smart Array 5312 */ 5475a4f934eSTomas Henzl 0x409A0E11, /* Smart Array 641 */ 5485a4f934eSTomas Henzl 0x409B0E11, /* Smart Array 642 */ 5495a4f934eSTomas Henzl 0x40910E11, /* Smart Array 6i */ 550941b1cdaSStephen M. Cameron }; 551941b1cdaSStephen M. Cameron 55246380786SStephen M. Cameron /* List of controllers which cannot even be soft reset */ 55346380786SStephen M. Cameron static u32 soft_unresettable_controller[] = { 5547af0abbcSTomas Henzl 0x40800E11, /* Smart Array 5i */ 5555a4f934eSTomas Henzl 0x40700E11, /* Smart Array 5300 */ 5565a4f934eSTomas Henzl 0x40820E11, /* Smart Array 532 */ 5575a4f934eSTomas Henzl 0x40830E11, /* Smart Array 5312 */ 5585a4f934eSTomas Henzl 0x409A0E11, /* Smart Array 641 */ 5595a4f934eSTomas Henzl 0x409B0E11, /* Smart Array 642 */ 5605a4f934eSTomas Henzl 0x40910E11, /* Smart Array 6i */ 56146380786SStephen M. Cameron /* Exclude 640x boards. These are two pci devices in one slot 56246380786SStephen M. Cameron * which share a battery backed cache module. One controls the 56346380786SStephen M. Cameron * cache, the other accesses the cache through the one that controls 56446380786SStephen M. Cameron * it. If we reset the one controlling the cache, the other will 56546380786SStephen M. Cameron * likely not be happy. Just forbid resetting this conjoined mess. 56646380786SStephen M. Cameron * The 640x isn't really supported by hpsa anyway. 56746380786SStephen M. Cameron */ 56846380786SStephen M. Cameron 0x409C0E11, /* Smart Array 6400 */ 56946380786SStephen M. Cameron 0x409D0E11, /* Smart Array 6400 EM */ 57046380786SStephen M. Cameron }; 57146380786SStephen M. Cameron 5729b5c48c2SStephen Cameron static u32 needs_abort_tags_swizzled[] = { 5739b5c48c2SStephen Cameron 0x323D103C, /* Smart Array P700m */ 5749b5c48c2SStephen Cameron 0x324a103C, /* Smart Array P712m */ 5759b5c48c2SStephen Cameron 0x324b103C, /* SmartArray P711m */ 5769b5c48c2SStephen Cameron }; 5779b5c48c2SStephen Cameron 5789b5c48c2SStephen Cameron static int board_id_in_array(u32 a[], int nelems, u32 board_id) 579941b1cdaSStephen M. Cameron { 580941b1cdaSStephen M. Cameron int i; 581941b1cdaSStephen M. Cameron 5829b5c48c2SStephen Cameron for (i = 0; i < nelems; i++) 5839b5c48c2SStephen Cameron if (a[i] == board_id) 584941b1cdaSStephen M. Cameron return 1; 5859b5c48c2SStephen Cameron return 0; 5869b5c48c2SStephen Cameron } 5879b5c48c2SStephen Cameron 5889b5c48c2SStephen Cameron static int ctlr_is_hard_resettable(u32 board_id) 5899b5c48c2SStephen Cameron { 5909b5c48c2SStephen Cameron return !board_id_in_array(unresettable_controller, 5919b5c48c2SStephen Cameron ARRAY_SIZE(unresettable_controller), board_id); 592941b1cdaSStephen M. Cameron } 593941b1cdaSStephen M. Cameron 59446380786SStephen M. Cameron static int ctlr_is_soft_resettable(u32 board_id) 59546380786SStephen M. Cameron { 5969b5c48c2SStephen Cameron return !board_id_in_array(soft_unresettable_controller, 5979b5c48c2SStephen Cameron ARRAY_SIZE(soft_unresettable_controller), board_id); 59846380786SStephen M. Cameron } 59946380786SStephen M. Cameron 60046380786SStephen M. Cameron static int ctlr_is_resettable(u32 board_id) 60146380786SStephen M. Cameron { 60246380786SStephen M. Cameron return ctlr_is_hard_resettable(board_id) || 60346380786SStephen M. Cameron ctlr_is_soft_resettable(board_id); 60446380786SStephen M. Cameron } 60546380786SStephen M. Cameron 6069b5c48c2SStephen Cameron static int ctlr_needs_abort_tags_swizzled(u32 board_id) 6079b5c48c2SStephen Cameron { 6089b5c48c2SStephen Cameron return board_id_in_array(needs_abort_tags_swizzled, 6099b5c48c2SStephen Cameron ARRAY_SIZE(needs_abort_tags_swizzled), board_id); 6109b5c48c2SStephen Cameron } 6119b5c48c2SStephen Cameron 612941b1cdaSStephen M. Cameron static ssize_t host_show_resettable(struct device *dev, 613941b1cdaSStephen M. Cameron struct device_attribute *attr, char *buf) 614941b1cdaSStephen M. Cameron { 615941b1cdaSStephen M. Cameron struct ctlr_info *h; 616941b1cdaSStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 617941b1cdaSStephen M. Cameron 618941b1cdaSStephen M. Cameron h = shost_to_hba(shost); 61946380786SStephen M. Cameron return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id)); 620941b1cdaSStephen M. Cameron } 621941b1cdaSStephen M. Cameron 622edd16368SStephen M. Cameron static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[]) 623edd16368SStephen M. Cameron { 624edd16368SStephen M. Cameron return (scsi3addr[3] & 0xC0) == 0x40; 625edd16368SStephen M. Cameron } 626edd16368SStephen M. Cameron 627f2ef0ce7SRobert Elliott static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6", 6287c59a0d4SDon Brace "1(+0)ADM", "UNKNOWN", "PHYS DRV" 629edd16368SStephen M. Cameron }; 6306b80b18fSScott Teel #define HPSA_RAID_0 0 6316b80b18fSScott Teel #define HPSA_RAID_4 1 6326b80b18fSScott Teel #define HPSA_RAID_1 2 /* also used for RAID 10 */ 6336b80b18fSScott Teel #define HPSA_RAID_5 3 /* also used for RAID 50 */ 6346b80b18fSScott Teel #define HPSA_RAID_51 4 6356b80b18fSScott Teel #define HPSA_RAID_6 5 /* also used for RAID 60 */ 6366b80b18fSScott Teel #define HPSA_RAID_ADM 6 /* also used for RAID 1+0 ADM */ 6377c59a0d4SDon Brace #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 2) 6387c59a0d4SDon Brace #define PHYSICAL_DRIVE (ARRAY_SIZE(raid_label) - 1) 639edd16368SStephen M. Cameron 640f3f01730SKevin Barnett static inline bool is_logical_device(struct hpsa_scsi_dev_t *device) 641f3f01730SKevin Barnett { 642f3f01730SKevin Barnett return !device->physical_device; 643f3f01730SKevin Barnett } 644edd16368SStephen M. Cameron 645edd16368SStephen M. Cameron static ssize_t raid_level_show(struct device *dev, 646edd16368SStephen M. Cameron struct device_attribute *attr, char *buf) 647edd16368SStephen M. Cameron { 648edd16368SStephen M. Cameron ssize_t l = 0; 64982a72c0aSStephen M. Cameron unsigned char rlevel; 650edd16368SStephen M. Cameron struct ctlr_info *h; 651edd16368SStephen M. Cameron struct scsi_device *sdev; 652edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *hdev; 653edd16368SStephen M. Cameron unsigned long flags; 654edd16368SStephen M. Cameron 655edd16368SStephen M. Cameron sdev = to_scsi_device(dev); 656edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 657edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 658edd16368SStephen M. Cameron hdev = sdev->hostdata; 659edd16368SStephen M. Cameron if (!hdev) { 660edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 661edd16368SStephen M. Cameron return -ENODEV; 662edd16368SStephen M. Cameron } 663edd16368SStephen M. Cameron 664edd16368SStephen M. Cameron /* Is this even a logical drive? */ 665f3f01730SKevin Barnett if (!is_logical_device(hdev)) { 666edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 667edd16368SStephen M. Cameron l = snprintf(buf, PAGE_SIZE, "N/A\n"); 668edd16368SStephen M. Cameron return l; 669edd16368SStephen M. Cameron } 670edd16368SStephen M. Cameron 671edd16368SStephen M. Cameron rlevel = hdev->raid_level; 672edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 67382a72c0aSStephen M. Cameron if (rlevel > RAID_UNKNOWN) 674edd16368SStephen M. Cameron rlevel = RAID_UNKNOWN; 675edd16368SStephen M. Cameron l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]); 676edd16368SStephen M. Cameron return l; 677edd16368SStephen M. Cameron } 678edd16368SStephen M. Cameron 679edd16368SStephen M. Cameron static ssize_t lunid_show(struct device *dev, 680edd16368SStephen M. Cameron struct device_attribute *attr, char *buf) 681edd16368SStephen M. Cameron { 682edd16368SStephen M. Cameron struct ctlr_info *h; 683edd16368SStephen M. Cameron struct scsi_device *sdev; 684edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *hdev; 685edd16368SStephen M. Cameron unsigned long flags; 686edd16368SStephen M. Cameron unsigned char lunid[8]; 687edd16368SStephen M. Cameron 688edd16368SStephen M. Cameron sdev = to_scsi_device(dev); 689edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 690edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 691edd16368SStephen M. Cameron hdev = sdev->hostdata; 692edd16368SStephen M. Cameron if (!hdev) { 693edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 694edd16368SStephen M. Cameron return -ENODEV; 695edd16368SStephen M. Cameron } 696edd16368SStephen M. Cameron memcpy(lunid, hdev->scsi3addr, sizeof(lunid)); 697edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 698edd16368SStephen M. Cameron return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 699edd16368SStephen M. Cameron lunid[0], lunid[1], lunid[2], lunid[3], 700edd16368SStephen M. Cameron lunid[4], lunid[5], lunid[6], lunid[7]); 701edd16368SStephen M. Cameron } 702edd16368SStephen M. Cameron 703edd16368SStephen M. Cameron static ssize_t unique_id_show(struct device *dev, 704edd16368SStephen M. Cameron struct device_attribute *attr, char *buf) 705edd16368SStephen M. Cameron { 706edd16368SStephen M. Cameron struct ctlr_info *h; 707edd16368SStephen M. Cameron struct scsi_device *sdev; 708edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *hdev; 709edd16368SStephen M. Cameron unsigned long flags; 710edd16368SStephen M. Cameron unsigned char sn[16]; 711edd16368SStephen M. Cameron 712edd16368SStephen M. Cameron sdev = to_scsi_device(dev); 713edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 714edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 715edd16368SStephen M. Cameron hdev = sdev->hostdata; 716edd16368SStephen M. Cameron if (!hdev) { 717edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 718edd16368SStephen M. Cameron return -ENODEV; 719edd16368SStephen M. Cameron } 720edd16368SStephen M. Cameron memcpy(sn, hdev->device_id, sizeof(sn)); 721edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 722edd16368SStephen M. Cameron return snprintf(buf, 16 * 2 + 2, 723edd16368SStephen M. Cameron "%02X%02X%02X%02X%02X%02X%02X%02X" 724edd16368SStephen M. Cameron "%02X%02X%02X%02X%02X%02X%02X%02X\n", 725edd16368SStephen M. Cameron sn[0], sn[1], sn[2], sn[3], 726edd16368SStephen M. Cameron sn[4], sn[5], sn[6], sn[7], 727edd16368SStephen M. Cameron sn[8], sn[9], sn[10], sn[11], 728edd16368SStephen M. Cameron sn[12], sn[13], sn[14], sn[15]); 729edd16368SStephen M. Cameron } 730edd16368SStephen M. Cameron 731c1988684SScott Teel static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev, 732c1988684SScott Teel struct device_attribute *attr, char *buf) 733c1988684SScott Teel { 734c1988684SScott Teel struct ctlr_info *h; 735c1988684SScott Teel struct scsi_device *sdev; 736c1988684SScott Teel struct hpsa_scsi_dev_t *hdev; 737c1988684SScott Teel unsigned long flags; 738c1988684SScott Teel int offload_enabled; 739c1988684SScott Teel 740c1988684SScott Teel sdev = to_scsi_device(dev); 741c1988684SScott Teel h = sdev_to_hba(sdev); 742c1988684SScott Teel spin_lock_irqsave(&h->lock, flags); 743c1988684SScott Teel hdev = sdev->hostdata; 744c1988684SScott Teel if (!hdev) { 745c1988684SScott Teel spin_unlock_irqrestore(&h->lock, flags); 746c1988684SScott Teel return -ENODEV; 747c1988684SScott Teel } 748c1988684SScott Teel offload_enabled = hdev->offload_enabled; 749c1988684SScott Teel spin_unlock_irqrestore(&h->lock, flags); 750c1988684SScott Teel return snprintf(buf, 20, "%d\n", offload_enabled); 751c1988684SScott Teel } 752c1988684SScott Teel 7538270b862SJoe Handzik #define MAX_PATHS 8 7548270b862SJoe Handzik static ssize_t path_info_show(struct device *dev, 7558270b862SJoe Handzik struct device_attribute *attr, char *buf) 7568270b862SJoe Handzik { 7578270b862SJoe Handzik struct ctlr_info *h; 7588270b862SJoe Handzik struct scsi_device *sdev; 7598270b862SJoe Handzik struct hpsa_scsi_dev_t *hdev; 7608270b862SJoe Handzik unsigned long flags; 7618270b862SJoe Handzik int i; 7628270b862SJoe Handzik int output_len = 0; 7638270b862SJoe Handzik u8 box; 7648270b862SJoe Handzik u8 bay; 7658270b862SJoe Handzik u8 path_map_index = 0; 7668270b862SJoe Handzik char *active; 7678270b862SJoe Handzik unsigned char phys_connector[2]; 7688270b862SJoe Handzik 7698270b862SJoe Handzik sdev = to_scsi_device(dev); 7708270b862SJoe Handzik h = sdev_to_hba(sdev); 7718270b862SJoe Handzik spin_lock_irqsave(&h->devlock, flags); 7728270b862SJoe Handzik hdev = sdev->hostdata; 7738270b862SJoe Handzik if (!hdev) { 7748270b862SJoe Handzik spin_unlock_irqrestore(&h->devlock, flags); 7758270b862SJoe Handzik return -ENODEV; 7768270b862SJoe Handzik } 7778270b862SJoe Handzik 7788270b862SJoe Handzik bay = hdev->bay; 7798270b862SJoe Handzik for (i = 0; i < MAX_PATHS; i++) { 7808270b862SJoe Handzik path_map_index = 1<<i; 7818270b862SJoe Handzik if (i == hdev->active_path_index) 7828270b862SJoe Handzik active = "Active"; 7838270b862SJoe Handzik else if (hdev->path_map & path_map_index) 7848270b862SJoe Handzik active = "Inactive"; 7858270b862SJoe Handzik else 7868270b862SJoe Handzik continue; 7878270b862SJoe Handzik 7881faf072cSRasmus Villemoes output_len += scnprintf(buf + output_len, 7891faf072cSRasmus Villemoes PAGE_SIZE - output_len, 7901faf072cSRasmus Villemoes "[%d:%d:%d:%d] %20.20s ", 7918270b862SJoe Handzik h->scsi_host->host_no, 7928270b862SJoe Handzik hdev->bus, hdev->target, hdev->lun, 7938270b862SJoe Handzik scsi_device_type(hdev->devtype)); 7948270b862SJoe Handzik 795cca8f13bSDon Brace if (hdev->devtype == TYPE_RAID || is_logical_device(hdev)) { 7962708f295SDon Brace output_len += scnprintf(buf + output_len, 7971faf072cSRasmus Villemoes PAGE_SIZE - output_len, 7981faf072cSRasmus Villemoes "%s\n", active); 7998270b862SJoe Handzik continue; 8008270b862SJoe Handzik } 8018270b862SJoe Handzik 8028270b862SJoe Handzik box = hdev->box[i]; 8038270b862SJoe Handzik memcpy(&phys_connector, &hdev->phys_connector[i], 8048270b862SJoe Handzik sizeof(phys_connector)); 8058270b862SJoe Handzik if (phys_connector[0] < '0') 8068270b862SJoe Handzik phys_connector[0] = '0'; 8078270b862SJoe Handzik if (phys_connector[1] < '0') 8088270b862SJoe Handzik phys_connector[1] = '0'; 8092708f295SDon Brace output_len += scnprintf(buf + output_len, 8101faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8118270b862SJoe Handzik "PORT: %.2s ", 8128270b862SJoe Handzik phys_connector); 813af15ed36SDon Brace if ((hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC) && 814af15ed36SDon Brace hdev->expose_device) { 8158270b862SJoe Handzik if (box == 0 || box == 0xFF) { 8162708f295SDon Brace output_len += scnprintf(buf + output_len, 8171faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8188270b862SJoe Handzik "BAY: %hhu %s\n", 8198270b862SJoe Handzik bay, active); 8208270b862SJoe Handzik } else { 8212708f295SDon Brace output_len += scnprintf(buf + output_len, 8221faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8238270b862SJoe Handzik "BOX: %hhu BAY: %hhu %s\n", 8248270b862SJoe Handzik box, bay, active); 8258270b862SJoe Handzik } 8268270b862SJoe Handzik } else if (box != 0 && box != 0xFF) { 8272708f295SDon Brace output_len += scnprintf(buf + output_len, 8281faf072cSRasmus Villemoes PAGE_SIZE - output_len, "BOX: %hhu %s\n", 8298270b862SJoe Handzik box, active); 8308270b862SJoe Handzik } else 8312708f295SDon Brace output_len += scnprintf(buf + output_len, 8321faf072cSRasmus Villemoes PAGE_SIZE - output_len, "%s\n", active); 8338270b862SJoe Handzik } 8348270b862SJoe Handzik 8358270b862SJoe Handzik spin_unlock_irqrestore(&h->devlock, flags); 8361faf072cSRasmus Villemoes return output_len; 8378270b862SJoe Handzik } 8388270b862SJoe Handzik 8393f5eac3aSStephen M. Cameron static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL); 8403f5eac3aSStephen M. Cameron static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL); 8413f5eac3aSStephen M. Cameron static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL); 8423f5eac3aSStephen M. Cameron static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan); 843c1988684SScott Teel static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO, 844c1988684SScott Teel host_show_hp_ssd_smart_path_enabled, NULL); 8458270b862SJoe Handzik static DEVICE_ATTR(path_info, S_IRUGO, path_info_show, NULL); 846da0697bdSScott Teel static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH, 847da0697bdSScott Teel host_show_hp_ssd_smart_path_status, 848da0697bdSScott Teel host_store_hp_ssd_smart_path_status); 8492ba8bfc8SStephen M. Cameron static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL, 8502ba8bfc8SStephen M. Cameron host_store_raid_offload_debug); 8513f5eac3aSStephen M. Cameron static DEVICE_ATTR(firmware_revision, S_IRUGO, 8523f5eac3aSStephen M. Cameron host_show_firmware_revision, NULL); 8533f5eac3aSStephen M. Cameron static DEVICE_ATTR(commands_outstanding, S_IRUGO, 8543f5eac3aSStephen M. Cameron host_show_commands_outstanding, NULL); 8553f5eac3aSStephen M. Cameron static DEVICE_ATTR(transport_mode, S_IRUGO, 8563f5eac3aSStephen M. Cameron host_show_transport_mode, NULL); 857941b1cdaSStephen M. Cameron static DEVICE_ATTR(resettable, S_IRUGO, 858941b1cdaSStephen M. Cameron host_show_resettable, NULL); 859e985c58fSStephen Cameron static DEVICE_ATTR(lockup_detected, S_IRUGO, 860e985c58fSStephen Cameron host_show_lockup_detected, NULL); 8613f5eac3aSStephen M. Cameron 8623f5eac3aSStephen M. Cameron static struct device_attribute *hpsa_sdev_attrs[] = { 8633f5eac3aSStephen M. Cameron &dev_attr_raid_level, 8643f5eac3aSStephen M. Cameron &dev_attr_lunid, 8653f5eac3aSStephen M. Cameron &dev_attr_unique_id, 866c1988684SScott Teel &dev_attr_hp_ssd_smart_path_enabled, 8678270b862SJoe Handzik &dev_attr_path_info, 8683f5eac3aSStephen M. Cameron NULL, 8693f5eac3aSStephen M. Cameron }; 8703f5eac3aSStephen M. Cameron 8713f5eac3aSStephen M. Cameron static struct device_attribute *hpsa_shost_attrs[] = { 8723f5eac3aSStephen M. Cameron &dev_attr_rescan, 8733f5eac3aSStephen M. Cameron &dev_attr_firmware_revision, 8743f5eac3aSStephen M. Cameron &dev_attr_commands_outstanding, 8753f5eac3aSStephen M. Cameron &dev_attr_transport_mode, 876941b1cdaSStephen M. Cameron &dev_attr_resettable, 877da0697bdSScott Teel &dev_attr_hp_ssd_smart_path_status, 8782ba8bfc8SStephen M. Cameron &dev_attr_raid_offload_debug, 879fb53c439STomas Henzl &dev_attr_lockup_detected, 8803f5eac3aSStephen M. Cameron NULL, 8813f5eac3aSStephen M. Cameron }; 8823f5eac3aSStephen M. Cameron 88341ce4c35SStephen Cameron #define HPSA_NRESERVED_CMDS (HPSA_CMDS_RESERVED_FOR_ABORTS + \ 88441ce4c35SStephen Cameron HPSA_CMDS_RESERVED_FOR_DRIVER + HPSA_MAX_CONCURRENT_PASSTHRUS) 88541ce4c35SStephen Cameron 8863f5eac3aSStephen M. Cameron static struct scsi_host_template hpsa_driver_template = { 8873f5eac3aSStephen M. Cameron .module = THIS_MODULE, 888f79cfec6SStephen M. Cameron .name = HPSA, 889f79cfec6SStephen M. Cameron .proc_name = HPSA, 8903f5eac3aSStephen M. Cameron .queuecommand = hpsa_scsi_queue_command, 8913f5eac3aSStephen M. Cameron .scan_start = hpsa_scan_start, 8923f5eac3aSStephen M. Cameron .scan_finished = hpsa_scan_finished, 8937c0a0229SDon Brace .change_queue_depth = hpsa_change_queue_depth, 8943f5eac3aSStephen M. Cameron .this_id = -1, 8953f5eac3aSStephen M. Cameron .use_clustering = ENABLE_CLUSTERING, 89675167d2cSStephen M. Cameron .eh_abort_handler = hpsa_eh_abort_handler, 8973f5eac3aSStephen M. Cameron .eh_device_reset_handler = hpsa_eh_device_reset_handler, 8983f5eac3aSStephen M. Cameron .ioctl = hpsa_ioctl, 8993f5eac3aSStephen M. Cameron .slave_alloc = hpsa_slave_alloc, 90041ce4c35SStephen Cameron .slave_configure = hpsa_slave_configure, 9013f5eac3aSStephen M. Cameron .slave_destroy = hpsa_slave_destroy, 9023f5eac3aSStephen M. Cameron #ifdef CONFIG_COMPAT 9033f5eac3aSStephen M. Cameron .compat_ioctl = hpsa_compat_ioctl, 9043f5eac3aSStephen M. Cameron #endif 9053f5eac3aSStephen M. Cameron .sdev_attrs = hpsa_sdev_attrs, 9063f5eac3aSStephen M. Cameron .shost_attrs = hpsa_shost_attrs, 907c0d6a4d1SStephen M. Cameron .max_sectors = 8192, 90854b2b50cSMartin K. Petersen .no_write_same = 1, 9093f5eac3aSStephen M. Cameron }; 9103f5eac3aSStephen M. Cameron 911254f796bSMatt Gates static inline u32 next_command(struct ctlr_info *h, u8 q) 9123f5eac3aSStephen M. Cameron { 9133f5eac3aSStephen M. Cameron u32 a; 914072b0518SStephen M. Cameron struct reply_queue_buffer *rq = &h->reply_queue[q]; 9153f5eac3aSStephen M. Cameron 916e1f7de0cSMatt Gates if (h->transMethod & CFGTBL_Trans_io_accel1) 917e1f7de0cSMatt Gates return h->access.command_completed(h, q); 918e1f7de0cSMatt Gates 9193f5eac3aSStephen M. Cameron if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant))) 920254f796bSMatt Gates return h->access.command_completed(h, q); 9213f5eac3aSStephen M. Cameron 922254f796bSMatt Gates if ((rq->head[rq->current_entry] & 1) == rq->wraparound) { 923254f796bSMatt Gates a = rq->head[rq->current_entry]; 924254f796bSMatt Gates rq->current_entry++; 9250cbf768eSStephen M. Cameron atomic_dec(&h->commands_outstanding); 9263f5eac3aSStephen M. Cameron } else { 9273f5eac3aSStephen M. Cameron a = FIFO_EMPTY; 9283f5eac3aSStephen M. Cameron } 9293f5eac3aSStephen M. Cameron /* Check for wraparound */ 930254f796bSMatt Gates if (rq->current_entry == h->max_commands) { 931254f796bSMatt Gates rq->current_entry = 0; 932254f796bSMatt Gates rq->wraparound ^= 1; 9333f5eac3aSStephen M. Cameron } 9343f5eac3aSStephen M. Cameron return a; 9353f5eac3aSStephen M. Cameron } 9363f5eac3aSStephen M. Cameron 937c349775eSScott Teel /* 938c349775eSScott Teel * There are some special bits in the bus address of the 939c349775eSScott Teel * command that we have to set for the controller to know 940c349775eSScott Teel * how to process the command: 941c349775eSScott Teel * 942c349775eSScott Teel * Normal performant mode: 943c349775eSScott Teel * bit 0: 1 means performant mode, 0 means simple mode. 944c349775eSScott Teel * bits 1-3 = block fetch table entry 945c349775eSScott Teel * bits 4-6 = command type (== 0) 946c349775eSScott Teel * 947c349775eSScott Teel * ioaccel1 mode: 948c349775eSScott Teel * bit 0 = "performant mode" bit. 949c349775eSScott Teel * bits 1-3 = block fetch table entry 950c349775eSScott Teel * bits 4-6 = command type (== 110) 951c349775eSScott Teel * (command type is needed because ioaccel1 mode 952c349775eSScott Teel * commands are submitted through the same register as normal 953c349775eSScott Teel * mode commands, so this is how the controller knows whether 954c349775eSScott Teel * the command is normal mode or ioaccel1 mode.) 955c349775eSScott Teel * 956c349775eSScott Teel * ioaccel2 mode: 957c349775eSScott Teel * bit 0 = "performant mode" bit. 958c349775eSScott Teel * bits 1-4 = block fetch table entry (note extra bit) 959c349775eSScott Teel * bits 4-6 = not needed, because ioaccel2 mode has 960c349775eSScott Teel * a separate special register for submitting commands. 961c349775eSScott Teel */ 962c349775eSScott Teel 96325163bd5SWebb Scales /* 96425163bd5SWebb Scales * set_performant_mode: Modify the tag for cciss performant 9653f5eac3aSStephen M. Cameron * set bit 0 for pull model, bits 3-1 for block fetch 9663f5eac3aSStephen M. Cameron * register number 9673f5eac3aSStephen M. Cameron */ 96825163bd5SWebb Scales #define DEFAULT_REPLY_QUEUE (-1) 96925163bd5SWebb Scales static void set_performant_mode(struct ctlr_info *h, struct CommandList *c, 97025163bd5SWebb Scales int reply_queue) 9713f5eac3aSStephen M. Cameron { 972254f796bSMatt Gates if (likely(h->transMethod & CFGTBL_Trans_Performant)) { 9733f5eac3aSStephen M. Cameron c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1); 97425163bd5SWebb Scales if (unlikely(!h->msix_vector)) 97525163bd5SWebb Scales return; 97625163bd5SWebb Scales if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 977254f796bSMatt Gates c->Header.ReplyQueue = 978804a5cb5SJohn Kacur raw_smp_processor_id() % h->nreply_queues; 97925163bd5SWebb Scales else 98025163bd5SWebb Scales c->Header.ReplyQueue = reply_queue % h->nreply_queues; 981254f796bSMatt Gates } 9823f5eac3aSStephen M. Cameron } 9833f5eac3aSStephen M. Cameron 984c349775eSScott Teel static void set_ioaccel1_performant_mode(struct ctlr_info *h, 98525163bd5SWebb Scales struct CommandList *c, 98625163bd5SWebb Scales int reply_queue) 987c349775eSScott Teel { 988c349775eSScott Teel struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex]; 989c349775eSScott Teel 99025163bd5SWebb Scales /* 99125163bd5SWebb Scales * Tell the controller to post the reply to the queue for this 992c349775eSScott Teel * processor. This seems to give the best I/O throughput. 993c349775eSScott Teel */ 99425163bd5SWebb Scales if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 995c349775eSScott Teel cp->ReplyQueue = smp_processor_id() % h->nreply_queues; 99625163bd5SWebb Scales else 99725163bd5SWebb Scales cp->ReplyQueue = reply_queue % h->nreply_queues; 99825163bd5SWebb Scales /* 99925163bd5SWebb Scales * Set the bits in the address sent down to include: 1000c349775eSScott Teel * - performant mode bit (bit 0) 1001c349775eSScott Teel * - pull count (bits 1-3) 1002c349775eSScott Teel * - command type (bits 4-6) 1003c349775eSScott Teel */ 1004c349775eSScott Teel c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) | 1005c349775eSScott Teel IOACCEL1_BUSADDR_CMDTYPE; 1006c349775eSScott Teel } 1007c349775eSScott Teel 10088be986ccSStephen Cameron static void set_ioaccel2_tmf_performant_mode(struct ctlr_info *h, 10098be986ccSStephen Cameron struct CommandList *c, 10108be986ccSStephen Cameron int reply_queue) 10118be986ccSStephen Cameron { 10128be986ccSStephen Cameron struct hpsa_tmf_struct *cp = (struct hpsa_tmf_struct *) 10138be986ccSStephen Cameron &h->ioaccel2_cmd_pool[c->cmdindex]; 10148be986ccSStephen Cameron 10158be986ccSStephen Cameron /* Tell the controller to post the reply to the queue for this 10168be986ccSStephen Cameron * processor. This seems to give the best I/O throughput. 10178be986ccSStephen Cameron */ 10188be986ccSStephen Cameron if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 10198be986ccSStephen Cameron cp->reply_queue = smp_processor_id() % h->nreply_queues; 10208be986ccSStephen Cameron else 10218be986ccSStephen Cameron cp->reply_queue = reply_queue % h->nreply_queues; 10228be986ccSStephen Cameron /* Set the bits in the address sent down to include: 10238be986ccSStephen Cameron * - performant mode bit not used in ioaccel mode 2 10248be986ccSStephen Cameron * - pull count (bits 0-3) 10258be986ccSStephen Cameron * - command type isn't needed for ioaccel2 10268be986ccSStephen Cameron */ 10278be986ccSStephen Cameron c->busaddr |= h->ioaccel2_blockFetchTable[0]; 10288be986ccSStephen Cameron } 10298be986ccSStephen Cameron 1030c349775eSScott Teel static void set_ioaccel2_performant_mode(struct ctlr_info *h, 103125163bd5SWebb Scales struct CommandList *c, 103225163bd5SWebb Scales int reply_queue) 1033c349775eSScott Teel { 1034c349775eSScott Teel struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex]; 1035c349775eSScott Teel 103625163bd5SWebb Scales /* 103725163bd5SWebb Scales * Tell the controller to post the reply to the queue for this 1038c349775eSScott Teel * processor. This seems to give the best I/O throughput. 1039c349775eSScott Teel */ 104025163bd5SWebb Scales if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1041c349775eSScott Teel cp->reply_queue = smp_processor_id() % h->nreply_queues; 104225163bd5SWebb Scales else 104325163bd5SWebb Scales cp->reply_queue = reply_queue % h->nreply_queues; 104425163bd5SWebb Scales /* 104525163bd5SWebb Scales * Set the bits in the address sent down to include: 1046c349775eSScott Teel * - performant mode bit not used in ioaccel mode 2 1047c349775eSScott Teel * - pull count (bits 0-3) 1048c349775eSScott Teel * - command type isn't needed for ioaccel2 1049c349775eSScott Teel */ 1050c349775eSScott Teel c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]); 1051c349775eSScott Teel } 1052c349775eSScott Teel 1053e85c5974SStephen M. Cameron static int is_firmware_flash_cmd(u8 *cdb) 1054e85c5974SStephen M. Cameron { 1055e85c5974SStephen M. Cameron return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE; 1056e85c5974SStephen M. Cameron } 1057e85c5974SStephen M. Cameron 1058e85c5974SStephen M. Cameron /* 1059e85c5974SStephen M. Cameron * During firmware flash, the heartbeat register may not update as frequently 1060e85c5974SStephen M. Cameron * as it should. So we dial down lockup detection during firmware flash. and 1061e85c5974SStephen M. Cameron * dial it back up when firmware flash completes. 1062e85c5974SStephen M. Cameron */ 1063e85c5974SStephen M. Cameron #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ) 1064e85c5974SStephen M. Cameron #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ) 1065e85c5974SStephen M. Cameron static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h, 1066e85c5974SStephen M. Cameron struct CommandList *c) 1067e85c5974SStephen M. Cameron { 1068e85c5974SStephen M. Cameron if (!is_firmware_flash_cmd(c->Request.CDB)) 1069e85c5974SStephen M. Cameron return; 1070e85c5974SStephen M. Cameron atomic_inc(&h->firmware_flash_in_progress); 1071e85c5974SStephen M. Cameron h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH; 1072e85c5974SStephen M. Cameron } 1073e85c5974SStephen M. Cameron 1074e85c5974SStephen M. Cameron static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h, 1075e85c5974SStephen M. Cameron struct CommandList *c) 1076e85c5974SStephen M. Cameron { 1077e85c5974SStephen M. Cameron if (is_firmware_flash_cmd(c->Request.CDB) && 1078e85c5974SStephen M. Cameron atomic_dec_and_test(&h->firmware_flash_in_progress)) 1079e85c5974SStephen M. Cameron h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 1080e85c5974SStephen M. Cameron } 1081e85c5974SStephen M. Cameron 108225163bd5SWebb Scales static void __enqueue_cmd_and_start_io(struct ctlr_info *h, 108325163bd5SWebb Scales struct CommandList *c, int reply_queue) 10843f5eac3aSStephen M. Cameron { 1085c05e8866SStephen Cameron dial_down_lockup_detection_during_fw_flash(h, c); 1086c05e8866SStephen Cameron atomic_inc(&h->commands_outstanding); 1087c349775eSScott Teel switch (c->cmd_type) { 1088c349775eSScott Teel case CMD_IOACCEL1: 108925163bd5SWebb Scales set_ioaccel1_performant_mode(h, c, reply_queue); 1090c05e8866SStephen Cameron writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET); 1091c349775eSScott Teel break; 1092c349775eSScott Teel case CMD_IOACCEL2: 109325163bd5SWebb Scales set_ioaccel2_performant_mode(h, c, reply_queue); 1094c05e8866SStephen Cameron writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32); 1095c349775eSScott Teel break; 10968be986ccSStephen Cameron case IOACCEL2_TMF: 10978be986ccSStephen Cameron set_ioaccel2_tmf_performant_mode(h, c, reply_queue); 10988be986ccSStephen Cameron writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32); 10998be986ccSStephen Cameron break; 1100c349775eSScott Teel default: 110125163bd5SWebb Scales set_performant_mode(h, c, reply_queue); 1102f2405db8SDon Brace h->access.submit_command(h, c); 11033f5eac3aSStephen M. Cameron } 1104c05e8866SStephen Cameron } 11053f5eac3aSStephen M. Cameron 1106a58e7e53SWebb Scales static void enqueue_cmd_and_start_io(struct ctlr_info *h, struct CommandList *c) 110725163bd5SWebb Scales { 1108d604f533SWebb Scales if (unlikely(hpsa_is_pending_event(c))) 1109a58e7e53SWebb Scales return finish_cmd(c); 1110a58e7e53SWebb Scales 111125163bd5SWebb Scales __enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE); 111225163bd5SWebb Scales } 111325163bd5SWebb Scales 11143f5eac3aSStephen M. Cameron static inline int is_hba_lunid(unsigned char scsi3addr[]) 11153f5eac3aSStephen M. Cameron { 11163f5eac3aSStephen M. Cameron return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0; 11173f5eac3aSStephen M. Cameron } 11183f5eac3aSStephen M. Cameron 11193f5eac3aSStephen M. Cameron static inline int is_scsi_rev_5(struct ctlr_info *h) 11203f5eac3aSStephen M. Cameron { 11213f5eac3aSStephen M. Cameron if (!h->hba_inquiry_data) 11223f5eac3aSStephen M. Cameron return 0; 11233f5eac3aSStephen M. Cameron if ((h->hba_inquiry_data[2] & 0x07) == 5) 11243f5eac3aSStephen M. Cameron return 1; 11253f5eac3aSStephen M. Cameron return 0; 11263f5eac3aSStephen M. Cameron } 11273f5eac3aSStephen M. Cameron 1128edd16368SStephen M. Cameron static int hpsa_find_target_lun(struct ctlr_info *h, 1129edd16368SStephen M. Cameron unsigned char scsi3addr[], int bus, int *target, int *lun) 1130edd16368SStephen M. Cameron { 1131edd16368SStephen M. Cameron /* finds an unused bus, target, lun for a new physical device 1132edd16368SStephen M. Cameron * assumes h->devlock is held 1133edd16368SStephen M. Cameron */ 1134edd16368SStephen M. Cameron int i, found = 0; 1135cfe5badcSScott Teel DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES); 1136edd16368SStephen M. Cameron 1137263d9401SAkinobu Mita bitmap_zero(lun_taken, HPSA_MAX_DEVICES); 1138edd16368SStephen M. Cameron 1139edd16368SStephen M. Cameron for (i = 0; i < h->ndevices; i++) { 1140edd16368SStephen M. Cameron if (h->dev[i]->bus == bus && h->dev[i]->target != -1) 1141263d9401SAkinobu Mita __set_bit(h->dev[i]->target, lun_taken); 1142edd16368SStephen M. Cameron } 1143edd16368SStephen M. Cameron 1144263d9401SAkinobu Mita i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES); 1145263d9401SAkinobu Mita if (i < HPSA_MAX_DEVICES) { 1146edd16368SStephen M. Cameron /* *bus = 1; */ 1147edd16368SStephen M. Cameron *target = i; 1148edd16368SStephen M. Cameron *lun = 0; 1149edd16368SStephen M. Cameron found = 1; 1150edd16368SStephen M. Cameron } 1151edd16368SStephen M. Cameron return !found; 1152edd16368SStephen M. Cameron } 1153edd16368SStephen M. Cameron 11541d33d85dSDon Brace static void hpsa_show_dev_msg(const char *level, struct ctlr_info *h, 11550d96ef5fSWebb Scales struct hpsa_scsi_dev_t *dev, char *description) 11560d96ef5fSWebb Scales { 11577c59a0d4SDon Brace #define LABEL_SIZE 25 11587c59a0d4SDon Brace char label[LABEL_SIZE]; 11597c59a0d4SDon Brace 11609975ec9dSDon Brace if (h == NULL || h->pdev == NULL || h->scsi_host == NULL) 11619975ec9dSDon Brace return; 11629975ec9dSDon Brace 11637c59a0d4SDon Brace switch (dev->devtype) { 11647c59a0d4SDon Brace case TYPE_RAID: 11657c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "controller"); 11667c59a0d4SDon Brace break; 11677c59a0d4SDon Brace case TYPE_ENCLOSURE: 11687c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "enclosure"); 11697c59a0d4SDon Brace break; 11707c59a0d4SDon Brace case TYPE_DISK: 1171af15ed36SDon Brace case TYPE_ZBC: 11727c59a0d4SDon Brace if (dev->external) 11737c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "external"); 11747c59a0d4SDon Brace else if (!is_logical_dev_addr_mode(dev->scsi3addr)) 11757c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "%s", 11767c59a0d4SDon Brace raid_label[PHYSICAL_DRIVE]); 11777c59a0d4SDon Brace else 11787c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "RAID-%s", 11797c59a0d4SDon Brace dev->raid_level > RAID_UNKNOWN ? "?" : 11807c59a0d4SDon Brace raid_label[dev->raid_level]); 11817c59a0d4SDon Brace break; 11827c59a0d4SDon Brace case TYPE_ROM: 11837c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "rom"); 11847c59a0d4SDon Brace break; 11857c59a0d4SDon Brace case TYPE_TAPE: 11867c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "tape"); 11877c59a0d4SDon Brace break; 11887c59a0d4SDon Brace case TYPE_MEDIUM_CHANGER: 11897c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "changer"); 11907c59a0d4SDon Brace break; 11917c59a0d4SDon Brace default: 11927c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "UNKNOWN"); 11937c59a0d4SDon Brace break; 11947c59a0d4SDon Brace } 11957c59a0d4SDon Brace 11960d96ef5fSWebb Scales dev_printk(level, &h->pdev->dev, 11977c59a0d4SDon Brace "scsi %d:%d:%d:%d: %s %s %.8s %.16s %s SSDSmartPathCap%c En%c Exp=%d\n", 11980d96ef5fSWebb Scales h->scsi_host->host_no, dev->bus, dev->target, dev->lun, 11990d96ef5fSWebb Scales description, 12000d96ef5fSWebb Scales scsi_device_type(dev->devtype), 12010d96ef5fSWebb Scales dev->vendor, 12020d96ef5fSWebb Scales dev->model, 12037c59a0d4SDon Brace label, 12040d96ef5fSWebb Scales dev->offload_config ? '+' : '-', 12050d96ef5fSWebb Scales dev->offload_enabled ? '+' : '-', 12062a168208SKevin Barnett dev->expose_device); 12070d96ef5fSWebb Scales } 12080d96ef5fSWebb Scales 1209edd16368SStephen M. Cameron /* Add an entry into h->dev[] array. */ 12108aa60681SDon Brace static int hpsa_scsi_add_entry(struct ctlr_info *h, 1211edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *device, 1212edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *added[], int *nadded) 1213edd16368SStephen M. Cameron { 1214edd16368SStephen M. Cameron /* assumes h->devlock is held */ 1215edd16368SStephen M. Cameron int n = h->ndevices; 1216edd16368SStephen M. Cameron int i; 1217edd16368SStephen M. Cameron unsigned char addr1[8], addr2[8]; 1218edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd; 1219edd16368SStephen M. Cameron 1220cfe5badcSScott Teel if (n >= HPSA_MAX_DEVICES) { 1221edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "too many devices, some will be " 1222edd16368SStephen M. Cameron "inaccessible.\n"); 1223edd16368SStephen M. Cameron return -1; 1224edd16368SStephen M. Cameron } 1225edd16368SStephen M. Cameron 1226edd16368SStephen M. Cameron /* physical devices do not have lun or target assigned until now. */ 1227edd16368SStephen M. Cameron if (device->lun != -1) 1228edd16368SStephen M. Cameron /* Logical device, lun is already assigned. */ 1229edd16368SStephen M. Cameron goto lun_assigned; 1230edd16368SStephen M. Cameron 1231edd16368SStephen M. Cameron /* If this device a non-zero lun of a multi-lun device 1232edd16368SStephen M. Cameron * byte 4 of the 8-byte LUN addr will contain the logical 12332b08b3e9SDon Brace * unit no, zero otherwise. 1234edd16368SStephen M. Cameron */ 1235edd16368SStephen M. Cameron if (device->scsi3addr[4] == 0) { 1236edd16368SStephen M. Cameron /* This is not a non-zero lun of a multi-lun device */ 1237edd16368SStephen M. Cameron if (hpsa_find_target_lun(h, device->scsi3addr, 1238edd16368SStephen M. Cameron device->bus, &device->target, &device->lun) != 0) 1239edd16368SStephen M. Cameron return -1; 1240edd16368SStephen M. Cameron goto lun_assigned; 1241edd16368SStephen M. Cameron } 1242edd16368SStephen M. Cameron 1243edd16368SStephen M. Cameron /* This is a non-zero lun of a multi-lun device. 1244edd16368SStephen M. Cameron * Search through our list and find the device which 12459a4178b7Sshane.seymour * has the same 8 byte LUN address, excepting byte 4 and 5. 1246edd16368SStephen M. Cameron * Assign the same bus and target for this new LUN. 1247edd16368SStephen M. Cameron * Use the logical unit number from the firmware. 1248edd16368SStephen M. Cameron */ 1249edd16368SStephen M. Cameron memcpy(addr1, device->scsi3addr, 8); 1250edd16368SStephen M. Cameron addr1[4] = 0; 12519a4178b7Sshane.seymour addr1[5] = 0; 1252edd16368SStephen M. Cameron for (i = 0; i < n; i++) { 1253edd16368SStephen M. Cameron sd = h->dev[i]; 1254edd16368SStephen M. Cameron memcpy(addr2, sd->scsi3addr, 8); 1255edd16368SStephen M. Cameron addr2[4] = 0; 12569a4178b7Sshane.seymour addr2[5] = 0; 12579a4178b7Sshane.seymour /* differ only in byte 4 and 5? */ 1258edd16368SStephen M. Cameron if (memcmp(addr1, addr2, 8) == 0) { 1259edd16368SStephen M. Cameron device->bus = sd->bus; 1260edd16368SStephen M. Cameron device->target = sd->target; 1261edd16368SStephen M. Cameron device->lun = device->scsi3addr[4]; 1262edd16368SStephen M. Cameron break; 1263edd16368SStephen M. Cameron } 1264edd16368SStephen M. Cameron } 1265edd16368SStephen M. Cameron if (device->lun == -1) { 1266edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "physical device with no LUN=0," 1267edd16368SStephen M. Cameron " suspect firmware bug or unsupported hardware " 1268edd16368SStephen M. Cameron "configuration.\n"); 1269edd16368SStephen M. Cameron return -1; 1270edd16368SStephen M. Cameron } 1271edd16368SStephen M. Cameron 1272edd16368SStephen M. Cameron lun_assigned: 1273edd16368SStephen M. Cameron 1274edd16368SStephen M. Cameron h->dev[n] = device; 1275edd16368SStephen M. Cameron h->ndevices++; 1276edd16368SStephen M. Cameron added[*nadded] = device; 1277edd16368SStephen M. Cameron (*nadded)++; 12780d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, device, 12792a168208SKevin Barnett device->expose_device ? "added" : "masked"); 1280a473d86cSRobert Elliott device->offload_to_be_enabled = device->offload_enabled; 1281a473d86cSRobert Elliott device->offload_enabled = 0; 1282edd16368SStephen M. Cameron return 0; 1283edd16368SStephen M. Cameron } 1284edd16368SStephen M. Cameron 1285bd9244f7SScott Teel /* Update an entry in h->dev[] array. */ 12868aa60681SDon Brace static void hpsa_scsi_update_entry(struct ctlr_info *h, 1287bd9244f7SScott Teel int entry, struct hpsa_scsi_dev_t *new_entry) 1288bd9244f7SScott Teel { 1289a473d86cSRobert Elliott int offload_enabled; 1290bd9244f7SScott Teel /* assumes h->devlock is held */ 1291bd9244f7SScott Teel BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1292bd9244f7SScott Teel 1293bd9244f7SScott Teel /* Raid level changed. */ 1294bd9244f7SScott Teel h->dev[entry]->raid_level = new_entry->raid_level; 1295250fb125SStephen M. Cameron 129603383736SDon Brace /* Raid offload parameters changed. Careful about the ordering. */ 129703383736SDon Brace if (new_entry->offload_config && new_entry->offload_enabled) { 129803383736SDon Brace /* 129903383736SDon Brace * if drive is newly offload_enabled, we want to copy the 130003383736SDon Brace * raid map data first. If previously offload_enabled and 130103383736SDon Brace * offload_config were set, raid map data had better be 130203383736SDon Brace * the same as it was before. if raid map data is changed 130303383736SDon Brace * then it had better be the case that 130403383736SDon Brace * h->dev[entry]->offload_enabled is currently 0. 130503383736SDon Brace */ 13069fb0de2dSStephen M. Cameron h->dev[entry]->raid_map = new_entry->raid_map; 130703383736SDon Brace h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 130803383736SDon Brace } 1309a3144e0bSJoe Handzik if (new_entry->hba_ioaccel_enabled) { 1310a3144e0bSJoe Handzik h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 1311a3144e0bSJoe Handzik wmb(); /* set ioaccel_handle *before* hba_ioaccel_enabled */ 1312a3144e0bSJoe Handzik } 1313a3144e0bSJoe Handzik h->dev[entry]->hba_ioaccel_enabled = new_entry->hba_ioaccel_enabled; 131403383736SDon Brace h->dev[entry]->offload_config = new_entry->offload_config; 131503383736SDon Brace h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror; 131603383736SDon Brace h->dev[entry]->queue_depth = new_entry->queue_depth; 1317250fb125SStephen M. Cameron 131841ce4c35SStephen Cameron /* 131941ce4c35SStephen Cameron * We can turn off ioaccel offload now, but need to delay turning 132041ce4c35SStephen Cameron * it on until we can update h->dev[entry]->phys_disk[], but we 132141ce4c35SStephen Cameron * can't do that until all the devices are updated. 132241ce4c35SStephen Cameron */ 132341ce4c35SStephen Cameron h->dev[entry]->offload_to_be_enabled = new_entry->offload_enabled; 132441ce4c35SStephen Cameron if (!new_entry->offload_enabled) 132541ce4c35SStephen Cameron h->dev[entry]->offload_enabled = 0; 132641ce4c35SStephen Cameron 1327a473d86cSRobert Elliott offload_enabled = h->dev[entry]->offload_enabled; 1328a473d86cSRobert Elliott h->dev[entry]->offload_enabled = h->dev[entry]->offload_to_be_enabled; 13290d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated"); 1330a473d86cSRobert Elliott h->dev[entry]->offload_enabled = offload_enabled; 1331bd9244f7SScott Teel } 1332bd9244f7SScott Teel 13332a8ccf31SStephen M. Cameron /* Replace an entry from h->dev[] array. */ 13348aa60681SDon Brace static void hpsa_scsi_replace_entry(struct ctlr_info *h, 13352a8ccf31SStephen M. Cameron int entry, struct hpsa_scsi_dev_t *new_entry, 13362a8ccf31SStephen M. Cameron struct hpsa_scsi_dev_t *added[], int *nadded, 13372a8ccf31SStephen M. Cameron struct hpsa_scsi_dev_t *removed[], int *nremoved) 13382a8ccf31SStephen M. Cameron { 13392a8ccf31SStephen M. Cameron /* assumes h->devlock is held */ 1340cfe5badcSScott Teel BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 13412a8ccf31SStephen M. Cameron removed[*nremoved] = h->dev[entry]; 13422a8ccf31SStephen M. Cameron (*nremoved)++; 134301350d05SStephen M. Cameron 134401350d05SStephen M. Cameron /* 134501350d05SStephen M. Cameron * New physical devices won't have target/lun assigned yet 134601350d05SStephen M. Cameron * so we need to preserve the values in the slot we are replacing. 134701350d05SStephen M. Cameron */ 134801350d05SStephen M. Cameron if (new_entry->target == -1) { 134901350d05SStephen M. Cameron new_entry->target = h->dev[entry]->target; 135001350d05SStephen M. Cameron new_entry->lun = h->dev[entry]->lun; 135101350d05SStephen M. Cameron } 135201350d05SStephen M. Cameron 13532a8ccf31SStephen M. Cameron h->dev[entry] = new_entry; 13542a8ccf31SStephen M. Cameron added[*nadded] = new_entry; 13552a8ccf31SStephen M. Cameron (*nadded)++; 13560d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced"); 1357a473d86cSRobert Elliott new_entry->offload_to_be_enabled = new_entry->offload_enabled; 1358a473d86cSRobert Elliott new_entry->offload_enabled = 0; 13592a8ccf31SStephen M. Cameron } 13602a8ccf31SStephen M. Cameron 1361edd16368SStephen M. Cameron /* Remove an entry from h->dev[] array. */ 13628aa60681SDon Brace static void hpsa_scsi_remove_entry(struct ctlr_info *h, int entry, 1363edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *removed[], int *nremoved) 1364edd16368SStephen M. Cameron { 1365edd16368SStephen M. Cameron /* assumes h->devlock is held */ 1366edd16368SStephen M. Cameron int i; 1367edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd; 1368edd16368SStephen M. Cameron 1369cfe5badcSScott Teel BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1370edd16368SStephen M. Cameron 1371edd16368SStephen M. Cameron sd = h->dev[entry]; 1372edd16368SStephen M. Cameron removed[*nremoved] = h->dev[entry]; 1373edd16368SStephen M. Cameron (*nremoved)++; 1374edd16368SStephen M. Cameron 1375edd16368SStephen M. Cameron for (i = entry; i < h->ndevices-1; i++) 1376edd16368SStephen M. Cameron h->dev[i] = h->dev[i+1]; 1377edd16368SStephen M. Cameron h->ndevices--; 13780d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, sd, "removed"); 1379edd16368SStephen M. Cameron } 1380edd16368SStephen M. Cameron 1381edd16368SStephen M. Cameron #define SCSI3ADDR_EQ(a, b) ( \ 1382edd16368SStephen M. Cameron (a)[7] == (b)[7] && \ 1383edd16368SStephen M. Cameron (a)[6] == (b)[6] && \ 1384edd16368SStephen M. Cameron (a)[5] == (b)[5] && \ 1385edd16368SStephen M. Cameron (a)[4] == (b)[4] && \ 1386edd16368SStephen M. Cameron (a)[3] == (b)[3] && \ 1387edd16368SStephen M. Cameron (a)[2] == (b)[2] && \ 1388edd16368SStephen M. Cameron (a)[1] == (b)[1] && \ 1389edd16368SStephen M. Cameron (a)[0] == (b)[0]) 1390edd16368SStephen M. Cameron 1391edd16368SStephen M. Cameron static void fixup_botched_add(struct ctlr_info *h, 1392edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *added) 1393edd16368SStephen M. Cameron { 1394edd16368SStephen M. Cameron /* called when scsi_add_device fails in order to re-adjust 1395edd16368SStephen M. Cameron * h->dev[] to match the mid layer's view. 1396edd16368SStephen M. Cameron */ 1397edd16368SStephen M. Cameron unsigned long flags; 1398edd16368SStephen M. Cameron int i, j; 1399edd16368SStephen M. Cameron 1400edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 1401edd16368SStephen M. Cameron for (i = 0; i < h->ndevices; i++) { 1402edd16368SStephen M. Cameron if (h->dev[i] == added) { 1403edd16368SStephen M. Cameron for (j = i; j < h->ndevices-1; j++) 1404edd16368SStephen M. Cameron h->dev[j] = h->dev[j+1]; 1405edd16368SStephen M. Cameron h->ndevices--; 1406edd16368SStephen M. Cameron break; 1407edd16368SStephen M. Cameron } 1408edd16368SStephen M. Cameron } 1409edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 1410edd16368SStephen M. Cameron kfree(added); 1411edd16368SStephen M. Cameron } 1412edd16368SStephen M. Cameron 1413edd16368SStephen M. Cameron static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1, 1414edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *dev2) 1415edd16368SStephen M. Cameron { 1416edd16368SStephen M. Cameron /* we compare everything except lun and target as these 1417edd16368SStephen M. Cameron * are not yet assigned. Compare parts likely 1418edd16368SStephen M. Cameron * to differ first 1419edd16368SStephen M. Cameron */ 1420edd16368SStephen M. Cameron if (memcmp(dev1->scsi3addr, dev2->scsi3addr, 1421edd16368SStephen M. Cameron sizeof(dev1->scsi3addr)) != 0) 1422edd16368SStephen M. Cameron return 0; 1423edd16368SStephen M. Cameron if (memcmp(dev1->device_id, dev2->device_id, 1424edd16368SStephen M. Cameron sizeof(dev1->device_id)) != 0) 1425edd16368SStephen M. Cameron return 0; 1426edd16368SStephen M. Cameron if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0) 1427edd16368SStephen M. Cameron return 0; 1428edd16368SStephen M. Cameron if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0) 1429edd16368SStephen M. Cameron return 0; 1430edd16368SStephen M. Cameron if (dev1->devtype != dev2->devtype) 1431edd16368SStephen M. Cameron return 0; 1432edd16368SStephen M. Cameron if (dev1->bus != dev2->bus) 1433edd16368SStephen M. Cameron return 0; 1434edd16368SStephen M. Cameron return 1; 1435edd16368SStephen M. Cameron } 1436edd16368SStephen M. Cameron 1437bd9244f7SScott Teel static inline int device_updated(struct hpsa_scsi_dev_t *dev1, 1438bd9244f7SScott Teel struct hpsa_scsi_dev_t *dev2) 1439bd9244f7SScott Teel { 1440bd9244f7SScott Teel /* Device attributes that can change, but don't mean 1441bd9244f7SScott Teel * that the device is a different device, nor that the OS 1442bd9244f7SScott Teel * needs to be told anything about the change. 1443bd9244f7SScott Teel */ 1444bd9244f7SScott Teel if (dev1->raid_level != dev2->raid_level) 1445bd9244f7SScott Teel return 1; 1446250fb125SStephen M. Cameron if (dev1->offload_config != dev2->offload_config) 1447250fb125SStephen M. Cameron return 1; 1448250fb125SStephen M. Cameron if (dev1->offload_enabled != dev2->offload_enabled) 1449250fb125SStephen M. Cameron return 1; 145093849508SDon Brace if (!is_logical_dev_addr_mode(dev1->scsi3addr)) 145103383736SDon Brace if (dev1->queue_depth != dev2->queue_depth) 145203383736SDon Brace return 1; 1453bd9244f7SScott Teel return 0; 1454bd9244f7SScott Teel } 1455bd9244f7SScott Teel 1456edd16368SStephen M. Cameron /* Find needle in haystack. If exact match found, return DEVICE_SAME, 1457edd16368SStephen M. Cameron * and return needle location in *index. If scsi3addr matches, but not 1458edd16368SStephen M. Cameron * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle 1459bd9244f7SScott Teel * location in *index. 1460bd9244f7SScott Teel * In the case of a minor device attribute change, such as RAID level, just 1461bd9244f7SScott Teel * return DEVICE_UPDATED, along with the updated device's location in index. 1462bd9244f7SScott Teel * If needle not found, return DEVICE_NOT_FOUND. 1463edd16368SStephen M. Cameron */ 1464edd16368SStephen M. Cameron static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle, 1465edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *haystack[], int haystack_size, 1466edd16368SStephen M. Cameron int *index) 1467edd16368SStephen M. Cameron { 1468edd16368SStephen M. Cameron int i; 1469edd16368SStephen M. Cameron #define DEVICE_NOT_FOUND 0 1470edd16368SStephen M. Cameron #define DEVICE_CHANGED 1 1471edd16368SStephen M. Cameron #define DEVICE_SAME 2 1472bd9244f7SScott Teel #define DEVICE_UPDATED 3 14731d33d85dSDon Brace if (needle == NULL) 14741d33d85dSDon Brace return DEVICE_NOT_FOUND; 14751d33d85dSDon Brace 1476edd16368SStephen M. Cameron for (i = 0; i < haystack_size; i++) { 147723231048SStephen M. Cameron if (haystack[i] == NULL) /* previously removed. */ 147823231048SStephen M. Cameron continue; 1479edd16368SStephen M. Cameron if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) { 1480edd16368SStephen M. Cameron *index = i; 1481bd9244f7SScott Teel if (device_is_the_same(needle, haystack[i])) { 1482bd9244f7SScott Teel if (device_updated(needle, haystack[i])) 1483bd9244f7SScott Teel return DEVICE_UPDATED; 1484edd16368SStephen M. Cameron return DEVICE_SAME; 1485bd9244f7SScott Teel } else { 14869846590eSStephen M. Cameron /* Keep offline devices offline */ 14879846590eSStephen M. Cameron if (needle->volume_offline) 14889846590eSStephen M. Cameron return DEVICE_NOT_FOUND; 1489edd16368SStephen M. Cameron return DEVICE_CHANGED; 1490edd16368SStephen M. Cameron } 1491edd16368SStephen M. Cameron } 1492bd9244f7SScott Teel } 1493edd16368SStephen M. Cameron *index = -1; 1494edd16368SStephen M. Cameron return DEVICE_NOT_FOUND; 1495edd16368SStephen M. Cameron } 1496edd16368SStephen M. Cameron 14979846590eSStephen M. Cameron static void hpsa_monitor_offline_device(struct ctlr_info *h, 14989846590eSStephen M. Cameron unsigned char scsi3addr[]) 14999846590eSStephen M. Cameron { 15009846590eSStephen M. Cameron struct offline_device_entry *device; 15019846590eSStephen M. Cameron unsigned long flags; 15029846590eSStephen M. Cameron 15039846590eSStephen M. Cameron /* Check to see if device is already on the list */ 15049846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 15059846590eSStephen M. Cameron list_for_each_entry(device, &h->offline_device_list, offline_list) { 15069846590eSStephen M. Cameron if (memcmp(device->scsi3addr, scsi3addr, 15079846590eSStephen M. Cameron sizeof(device->scsi3addr)) == 0) { 15089846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 15099846590eSStephen M. Cameron return; 15109846590eSStephen M. Cameron } 15119846590eSStephen M. Cameron } 15129846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 15139846590eSStephen M. Cameron 15149846590eSStephen M. Cameron /* Device is not on the list, add it. */ 15159846590eSStephen M. Cameron device = kmalloc(sizeof(*device), GFP_KERNEL); 15169846590eSStephen M. Cameron if (!device) { 15179846590eSStephen M. Cameron dev_warn(&h->pdev->dev, "out of memory in %s\n", __func__); 15189846590eSStephen M. Cameron return; 15199846590eSStephen M. Cameron } 15209846590eSStephen M. Cameron memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr)); 15219846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 15229846590eSStephen M. Cameron list_add_tail(&device->offline_list, &h->offline_device_list); 15239846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 15249846590eSStephen M. Cameron } 15259846590eSStephen M. Cameron 15269846590eSStephen M. Cameron /* Print a message explaining various offline volume states */ 15279846590eSStephen M. Cameron static void hpsa_show_volume_status(struct ctlr_info *h, 15289846590eSStephen M. Cameron struct hpsa_scsi_dev_t *sd) 15299846590eSStephen M. Cameron { 15309846590eSStephen M. Cameron if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED) 15319846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15329846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n", 15339846590eSStephen M. Cameron h->scsi_host->host_no, 15349846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15359846590eSStephen M. Cameron switch (sd->volume_offline) { 15369846590eSStephen M. Cameron case HPSA_LV_OK: 15379846590eSStephen M. Cameron break; 15389846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ERASE: 15399846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15409846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n", 15419846590eSStephen M. Cameron h->scsi_host->host_no, 15429846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15439846590eSStephen M. Cameron break; 15445ca01204SScott Benesh case HPSA_LV_NOT_AVAILABLE: 15455ca01204SScott Benesh dev_info(&h->pdev->dev, 15465ca01204SScott Benesh "C%d:B%d:T%d:L%d Volume is waiting for transforming volume.\n", 15475ca01204SScott Benesh h->scsi_host->host_no, 15485ca01204SScott Benesh sd->bus, sd->target, sd->lun); 15495ca01204SScott Benesh break; 15509846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_RPI: 15519846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15525ca01204SScott Benesh "C%d:B%d:T%d:L%d Volume is undergoing rapid parity init.\n", 15539846590eSStephen M. Cameron h->scsi_host->host_no, 15549846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15559846590eSStephen M. Cameron break; 15569846590eSStephen M. Cameron case HPSA_LV_PENDING_RPI: 15579846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15589846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n", 15599846590eSStephen M. Cameron h->scsi_host->host_no, 15609846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15619846590eSStephen M. Cameron break; 15629846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_NO_KEY: 15639846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15649846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n", 15659846590eSStephen M. Cameron h->scsi_host->host_no, 15669846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15679846590eSStephen M. Cameron break; 15689846590eSStephen M. Cameron case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER: 15699846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15709846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n", 15719846590eSStephen M. Cameron h->scsi_host->host_no, 15729846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15739846590eSStephen M. Cameron break; 15749846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION: 15759846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15769846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n", 15779846590eSStephen M. Cameron h->scsi_host->host_no, 15789846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15799846590eSStephen M. Cameron break; 15809846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING: 15819846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15829846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n", 15839846590eSStephen M. Cameron h->scsi_host->host_no, 15849846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15859846590eSStephen M. Cameron break; 15869846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 15879846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15889846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n", 15899846590eSStephen M. Cameron h->scsi_host->host_no, 15909846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15919846590eSStephen M. Cameron break; 15929846590eSStephen M. Cameron case HPSA_LV_PENDING_ENCRYPTION: 15939846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15949846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n", 15959846590eSStephen M. Cameron h->scsi_host->host_no, 15969846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15979846590eSStephen M. Cameron break; 15989846590eSStephen M. Cameron case HPSA_LV_PENDING_ENCRYPTION_REKEYING: 15999846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16009846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n", 16019846590eSStephen M. Cameron h->scsi_host->host_no, 16029846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16039846590eSStephen M. Cameron break; 16049846590eSStephen M. Cameron } 16059846590eSStephen M. Cameron } 16069846590eSStephen M. Cameron 160703383736SDon Brace /* 160803383736SDon Brace * Figure the list of physical drive pointers for a logical drive with 160903383736SDon Brace * raid offload configured. 161003383736SDon Brace */ 161103383736SDon Brace static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h, 161203383736SDon Brace struct hpsa_scsi_dev_t *dev[], int ndevices, 161303383736SDon Brace struct hpsa_scsi_dev_t *logical_drive) 161403383736SDon Brace { 161503383736SDon Brace struct raid_map_data *map = &logical_drive->raid_map; 161603383736SDon Brace struct raid_map_disk_data *dd = &map->data[0]; 161703383736SDon Brace int i, j; 161803383736SDon Brace int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) + 161903383736SDon Brace le16_to_cpu(map->metadata_disks_per_row); 162003383736SDon Brace int nraid_map_entries = le16_to_cpu(map->row_cnt) * 162103383736SDon Brace le16_to_cpu(map->layout_map_count) * 162203383736SDon Brace total_disks_per_row; 162303383736SDon Brace int nphys_disk = le16_to_cpu(map->layout_map_count) * 162403383736SDon Brace total_disks_per_row; 162503383736SDon Brace int qdepth; 162603383736SDon Brace 162703383736SDon Brace if (nraid_map_entries > RAID_MAP_MAX_ENTRIES) 162803383736SDon Brace nraid_map_entries = RAID_MAP_MAX_ENTRIES; 162903383736SDon Brace 1630d604f533SWebb Scales logical_drive->nphysical_disks = nraid_map_entries; 1631d604f533SWebb Scales 163203383736SDon Brace qdepth = 0; 163303383736SDon Brace for (i = 0; i < nraid_map_entries; i++) { 163403383736SDon Brace logical_drive->phys_disk[i] = NULL; 163503383736SDon Brace if (!logical_drive->offload_config) 163603383736SDon Brace continue; 163703383736SDon Brace for (j = 0; j < ndevices; j++) { 16381d33d85dSDon Brace if (dev[j] == NULL) 16391d33d85dSDon Brace continue; 164003383736SDon Brace if (dev[j]->devtype != TYPE_DISK) 164103383736SDon Brace continue; 1642af15ed36SDon Brace if (dev[j]->devtype != TYPE_ZBC) 1643af15ed36SDon Brace continue; 1644f3f01730SKevin Barnett if (is_logical_device(dev[j])) 164503383736SDon Brace continue; 164603383736SDon Brace if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle) 164703383736SDon Brace continue; 164803383736SDon Brace 164903383736SDon Brace logical_drive->phys_disk[i] = dev[j]; 165003383736SDon Brace if (i < nphys_disk) 165103383736SDon Brace qdepth = min(h->nr_cmds, qdepth + 165203383736SDon Brace logical_drive->phys_disk[i]->queue_depth); 165303383736SDon Brace break; 165403383736SDon Brace } 165503383736SDon Brace 165603383736SDon Brace /* 165703383736SDon Brace * This can happen if a physical drive is removed and 165803383736SDon Brace * the logical drive is degraded. In that case, the RAID 165903383736SDon Brace * map data will refer to a physical disk which isn't actually 166003383736SDon Brace * present. And in that case offload_enabled should already 166103383736SDon Brace * be 0, but we'll turn it off here just in case 166203383736SDon Brace */ 166303383736SDon Brace if (!logical_drive->phys_disk[i]) { 166403383736SDon Brace logical_drive->offload_enabled = 0; 166541ce4c35SStephen Cameron logical_drive->offload_to_be_enabled = 0; 166641ce4c35SStephen Cameron logical_drive->queue_depth = 8; 166703383736SDon Brace } 166803383736SDon Brace } 166903383736SDon Brace if (nraid_map_entries) 167003383736SDon Brace /* 167103383736SDon Brace * This is correct for reads, too high for full stripe writes, 167203383736SDon Brace * way too high for partial stripe writes 167303383736SDon Brace */ 167403383736SDon Brace logical_drive->queue_depth = qdepth; 167503383736SDon Brace else 167603383736SDon Brace logical_drive->queue_depth = h->nr_cmds; 167703383736SDon Brace } 167803383736SDon Brace 167903383736SDon Brace static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h, 168003383736SDon Brace struct hpsa_scsi_dev_t *dev[], int ndevices) 168103383736SDon Brace { 168203383736SDon Brace int i; 168303383736SDon Brace 168403383736SDon Brace for (i = 0; i < ndevices; i++) { 16851d33d85dSDon Brace if (dev[i] == NULL) 16861d33d85dSDon Brace continue; 168703383736SDon Brace if (dev[i]->devtype != TYPE_DISK) 168803383736SDon Brace continue; 1689af15ed36SDon Brace if (dev[i]->devtype != TYPE_ZBC) 1690af15ed36SDon Brace continue; 1691f3f01730SKevin Barnett if (!is_logical_device(dev[i])) 169203383736SDon Brace continue; 169341ce4c35SStephen Cameron 169441ce4c35SStephen Cameron /* 169541ce4c35SStephen Cameron * If offload is currently enabled, the RAID map and 169641ce4c35SStephen Cameron * phys_disk[] assignment *better* not be changing 169741ce4c35SStephen Cameron * and since it isn't changing, we do not need to 169841ce4c35SStephen Cameron * update it. 169941ce4c35SStephen Cameron */ 170041ce4c35SStephen Cameron if (dev[i]->offload_enabled) 170141ce4c35SStephen Cameron continue; 170241ce4c35SStephen Cameron 170303383736SDon Brace hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]); 170403383736SDon Brace } 170503383736SDon Brace } 170603383736SDon Brace 1707096ccff4SKevin Barnett static int hpsa_add_device(struct ctlr_info *h, struct hpsa_scsi_dev_t *device) 1708096ccff4SKevin Barnett { 1709096ccff4SKevin Barnett int rc = 0; 1710096ccff4SKevin Barnett 1711096ccff4SKevin Barnett if (!h->scsi_host) 1712096ccff4SKevin Barnett return 1; 1713096ccff4SKevin Barnett 1714d04e62b9SKevin Barnett if (is_logical_device(device)) /* RAID */ 1715096ccff4SKevin Barnett rc = scsi_add_device(h->scsi_host, device->bus, 1716096ccff4SKevin Barnett device->target, device->lun); 1717d04e62b9SKevin Barnett else /* HBA */ 1718d04e62b9SKevin Barnett rc = hpsa_add_sas_device(h->sas_host, device); 1719d04e62b9SKevin Barnett 1720096ccff4SKevin Barnett return rc; 1721096ccff4SKevin Barnett } 1722096ccff4SKevin Barnett 1723096ccff4SKevin Barnett static void hpsa_remove_device(struct ctlr_info *h, 1724096ccff4SKevin Barnett struct hpsa_scsi_dev_t *device) 1725096ccff4SKevin Barnett { 1726096ccff4SKevin Barnett struct scsi_device *sdev = NULL; 1727096ccff4SKevin Barnett 1728096ccff4SKevin Barnett if (!h->scsi_host) 1729096ccff4SKevin Barnett return; 1730096ccff4SKevin Barnett 1731d04e62b9SKevin Barnett if (is_logical_device(device)) { /* RAID */ 1732096ccff4SKevin Barnett sdev = scsi_device_lookup(h->scsi_host, device->bus, 1733096ccff4SKevin Barnett device->target, device->lun); 1734096ccff4SKevin Barnett if (sdev) { 1735096ccff4SKevin Barnett scsi_remove_device(sdev); 1736096ccff4SKevin Barnett scsi_device_put(sdev); 1737096ccff4SKevin Barnett } else { 1738096ccff4SKevin Barnett /* 1739096ccff4SKevin Barnett * We don't expect to get here. Future commands 1740096ccff4SKevin Barnett * to this device will get a selection timeout as 1741096ccff4SKevin Barnett * if the device were gone. 1742096ccff4SKevin Barnett */ 1743096ccff4SKevin Barnett hpsa_show_dev_msg(KERN_WARNING, h, device, 1744096ccff4SKevin Barnett "didn't find device for removal."); 1745096ccff4SKevin Barnett } 1746d04e62b9SKevin Barnett } else /* HBA */ 1747d04e62b9SKevin Barnett hpsa_remove_sas_device(device); 1748096ccff4SKevin Barnett } 1749096ccff4SKevin Barnett 17508aa60681SDon Brace static void adjust_hpsa_scsi_table(struct ctlr_info *h, 1751edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd[], int nsds) 1752edd16368SStephen M. Cameron { 1753edd16368SStephen M. Cameron /* sd contains scsi3 addresses and devtypes, and inquiry 1754edd16368SStephen M. Cameron * data. This function takes what's in sd to be the current 1755edd16368SStephen M. Cameron * reality and updates h->dev[] to reflect that reality. 1756edd16368SStephen M. Cameron */ 1757edd16368SStephen M. Cameron int i, entry, device_change, changes = 0; 1758edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *csd; 1759edd16368SStephen M. Cameron unsigned long flags; 1760edd16368SStephen M. Cameron struct hpsa_scsi_dev_t **added, **removed; 1761edd16368SStephen M. Cameron int nadded, nremoved; 1762edd16368SStephen M. Cameron 1763da03ded0SDon Brace /* 1764da03ded0SDon Brace * A reset can cause a device status to change 1765da03ded0SDon Brace * re-schedule the scan to see what happened. 1766da03ded0SDon Brace */ 1767da03ded0SDon Brace if (h->reset_in_progress) { 1768da03ded0SDon Brace h->drv_req_rescan = 1; 1769da03ded0SDon Brace return; 1770da03ded0SDon Brace } 1771edd16368SStephen M. Cameron 1772cfe5badcSScott Teel added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL); 1773cfe5badcSScott Teel removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL); 1774edd16368SStephen M. Cameron 1775edd16368SStephen M. Cameron if (!added || !removed) { 1776edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "out of memory in " 1777edd16368SStephen M. Cameron "adjust_hpsa_scsi_table\n"); 1778edd16368SStephen M. Cameron goto free_and_out; 1779edd16368SStephen M. Cameron } 1780edd16368SStephen M. Cameron 1781edd16368SStephen M. Cameron spin_lock_irqsave(&h->devlock, flags); 1782edd16368SStephen M. Cameron 1783edd16368SStephen M. Cameron /* find any devices in h->dev[] that are not in 1784edd16368SStephen M. Cameron * sd[] and remove them from h->dev[], and for any 1785edd16368SStephen M. Cameron * devices which have changed, remove the old device 1786edd16368SStephen M. Cameron * info and add the new device info. 1787bd9244f7SScott Teel * If minor device attributes change, just update 1788bd9244f7SScott Teel * the existing device structure. 1789edd16368SStephen M. Cameron */ 1790edd16368SStephen M. Cameron i = 0; 1791edd16368SStephen M. Cameron nremoved = 0; 1792edd16368SStephen M. Cameron nadded = 0; 1793edd16368SStephen M. Cameron while (i < h->ndevices) { 1794edd16368SStephen M. Cameron csd = h->dev[i]; 1795edd16368SStephen M. Cameron device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry); 1796edd16368SStephen M. Cameron if (device_change == DEVICE_NOT_FOUND) { 1797edd16368SStephen M. Cameron changes++; 17988aa60681SDon Brace hpsa_scsi_remove_entry(h, i, removed, &nremoved); 1799edd16368SStephen M. Cameron continue; /* remove ^^^, hence i not incremented */ 1800edd16368SStephen M. Cameron } else if (device_change == DEVICE_CHANGED) { 1801edd16368SStephen M. Cameron changes++; 18028aa60681SDon Brace hpsa_scsi_replace_entry(h, i, sd[entry], 18032a8ccf31SStephen M. Cameron added, &nadded, removed, &nremoved); 1804c7f172dcSStephen M. Cameron /* Set it to NULL to prevent it from being freed 1805c7f172dcSStephen M. Cameron * at the bottom of hpsa_update_scsi_devices() 1806c7f172dcSStephen M. Cameron */ 1807c7f172dcSStephen M. Cameron sd[entry] = NULL; 1808bd9244f7SScott Teel } else if (device_change == DEVICE_UPDATED) { 18098aa60681SDon Brace hpsa_scsi_update_entry(h, i, sd[entry]); 1810edd16368SStephen M. Cameron } 1811edd16368SStephen M. Cameron i++; 1812edd16368SStephen M. Cameron } 1813edd16368SStephen M. Cameron 1814edd16368SStephen M. Cameron /* Now, make sure every device listed in sd[] is also 1815edd16368SStephen M. Cameron * listed in h->dev[], adding them if they aren't found 1816edd16368SStephen M. Cameron */ 1817edd16368SStephen M. Cameron 1818edd16368SStephen M. Cameron for (i = 0; i < nsds; i++) { 1819edd16368SStephen M. Cameron if (!sd[i]) /* if already added above. */ 1820edd16368SStephen M. Cameron continue; 18219846590eSStephen M. Cameron 18229846590eSStephen M. Cameron /* Don't add devices which are NOT READY, FORMAT IN PROGRESS 18239846590eSStephen M. Cameron * as the SCSI mid-layer does not handle such devices well. 18249846590eSStephen M. Cameron * It relentlessly loops sending TUR at 3Hz, then READ(10) 18259846590eSStephen M. Cameron * at 160Hz, and prevents the system from coming up. 18269846590eSStephen M. Cameron */ 18279846590eSStephen M. Cameron if (sd[i]->volume_offline) { 18289846590eSStephen M. Cameron hpsa_show_volume_status(h, sd[i]); 18290d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline"); 18309846590eSStephen M. Cameron continue; 18319846590eSStephen M. Cameron } 18329846590eSStephen M. Cameron 1833edd16368SStephen M. Cameron device_change = hpsa_scsi_find_entry(sd[i], h->dev, 1834edd16368SStephen M. Cameron h->ndevices, &entry); 1835edd16368SStephen M. Cameron if (device_change == DEVICE_NOT_FOUND) { 1836edd16368SStephen M. Cameron changes++; 18378aa60681SDon Brace if (hpsa_scsi_add_entry(h, sd[i], added, &nadded) != 0) 1838edd16368SStephen M. Cameron break; 1839edd16368SStephen M. Cameron sd[i] = NULL; /* prevent from being freed later. */ 1840edd16368SStephen M. Cameron } else if (device_change == DEVICE_CHANGED) { 1841edd16368SStephen M. Cameron /* should never happen... */ 1842edd16368SStephen M. Cameron changes++; 1843edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 1844edd16368SStephen M. Cameron "device unexpectedly changed.\n"); 1845edd16368SStephen M. Cameron /* but if it does happen, we just ignore that device */ 1846edd16368SStephen M. Cameron } 1847edd16368SStephen M. Cameron } 184841ce4c35SStephen Cameron hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices); 184941ce4c35SStephen Cameron 185041ce4c35SStephen Cameron /* Now that h->dev[]->phys_disk[] is coherent, we can enable 185141ce4c35SStephen Cameron * any logical drives that need it enabled. 185241ce4c35SStephen Cameron */ 18531d33d85dSDon Brace for (i = 0; i < h->ndevices; i++) { 18541d33d85dSDon Brace if (h->dev[i] == NULL) 18551d33d85dSDon Brace continue; 185641ce4c35SStephen Cameron h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled; 18571d33d85dSDon Brace } 185841ce4c35SStephen Cameron 1859edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->devlock, flags); 1860edd16368SStephen M. Cameron 18619846590eSStephen M. Cameron /* Monitor devices which are in one of several NOT READY states to be 18629846590eSStephen M. Cameron * brought online later. This must be done without holding h->devlock, 18639846590eSStephen M. Cameron * so don't touch h->dev[] 18649846590eSStephen M. Cameron */ 18659846590eSStephen M. Cameron for (i = 0; i < nsds; i++) { 18669846590eSStephen M. Cameron if (!sd[i]) /* if already added above. */ 18679846590eSStephen M. Cameron continue; 18689846590eSStephen M. Cameron if (sd[i]->volume_offline) 18699846590eSStephen M. Cameron hpsa_monitor_offline_device(h, sd[i]->scsi3addr); 18709846590eSStephen M. Cameron } 18719846590eSStephen M. Cameron 1872edd16368SStephen M. Cameron /* Don't notify scsi mid layer of any changes the first time through 1873edd16368SStephen M. Cameron * (or if there are no changes) scsi_scan_host will do it later the 1874edd16368SStephen M. Cameron * first time through. 1875edd16368SStephen M. Cameron */ 18768aa60681SDon Brace if (!changes) 1877edd16368SStephen M. Cameron goto free_and_out; 1878edd16368SStephen M. Cameron 1879edd16368SStephen M. Cameron /* Notify scsi mid layer of any removed devices */ 1880edd16368SStephen M. Cameron for (i = 0; i < nremoved; i++) { 18811d33d85dSDon Brace if (removed[i] == NULL) 18821d33d85dSDon Brace continue; 1883096ccff4SKevin Barnett if (removed[i]->expose_device) 1884096ccff4SKevin Barnett hpsa_remove_device(h, removed[i]); 1885edd16368SStephen M. Cameron kfree(removed[i]); 1886edd16368SStephen M. Cameron removed[i] = NULL; 1887edd16368SStephen M. Cameron } 1888edd16368SStephen M. Cameron 1889edd16368SStephen M. Cameron /* Notify scsi mid layer of any added devices */ 1890edd16368SStephen M. Cameron for (i = 0; i < nadded; i++) { 1891096ccff4SKevin Barnett int rc = 0; 1892096ccff4SKevin Barnett 18931d33d85dSDon Brace if (added[i] == NULL) 189441ce4c35SStephen Cameron continue; 18952a168208SKevin Barnett if (!(added[i]->expose_device)) 1896edd16368SStephen M. Cameron continue; 1897096ccff4SKevin Barnett rc = hpsa_add_device(h, added[i]); 1898096ccff4SKevin Barnett if (!rc) 1899edd16368SStephen M. Cameron continue; 1900096ccff4SKevin Barnett dev_warn(&h->pdev->dev, 1901096ccff4SKevin Barnett "addition failed %d, device not added.", rc); 1902edd16368SStephen M. Cameron /* now we have to remove it from h->dev, 1903edd16368SStephen M. Cameron * since it didn't get added to scsi mid layer 1904edd16368SStephen M. Cameron */ 1905edd16368SStephen M. Cameron fixup_botched_add(h, added[i]); 1906853633e8SDon Brace h->drv_req_rescan = 1; 1907edd16368SStephen M. Cameron } 1908edd16368SStephen M. Cameron 1909edd16368SStephen M. Cameron free_and_out: 1910edd16368SStephen M. Cameron kfree(added); 1911edd16368SStephen M. Cameron kfree(removed); 1912edd16368SStephen M. Cameron } 1913edd16368SStephen M. Cameron 1914edd16368SStephen M. Cameron /* 19159e03aa2fSJoe Perches * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t * 1916edd16368SStephen M. Cameron * Assume's h->devlock is held. 1917edd16368SStephen M. Cameron */ 1918edd16368SStephen M. Cameron static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h, 1919edd16368SStephen M. Cameron int bus, int target, int lun) 1920edd16368SStephen M. Cameron { 1921edd16368SStephen M. Cameron int i; 1922edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd; 1923edd16368SStephen M. Cameron 1924edd16368SStephen M. Cameron for (i = 0; i < h->ndevices; i++) { 1925edd16368SStephen M. Cameron sd = h->dev[i]; 1926edd16368SStephen M. Cameron if (sd->bus == bus && sd->target == target && sd->lun == lun) 1927edd16368SStephen M. Cameron return sd; 1928edd16368SStephen M. Cameron } 1929edd16368SStephen M. Cameron return NULL; 1930edd16368SStephen M. Cameron } 1931edd16368SStephen M. Cameron 1932edd16368SStephen M. Cameron static int hpsa_slave_alloc(struct scsi_device *sdev) 1933edd16368SStephen M. Cameron { 1934edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd; 1935edd16368SStephen M. Cameron unsigned long flags; 1936edd16368SStephen M. Cameron struct ctlr_info *h; 1937edd16368SStephen M. Cameron 1938edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 1939edd16368SStephen M. Cameron spin_lock_irqsave(&h->devlock, flags); 1940d04e62b9SKevin Barnett if (sdev_channel(sdev) == HPSA_PHYSICAL_DEVICE_BUS) { 1941d04e62b9SKevin Barnett struct scsi_target *starget; 1942d04e62b9SKevin Barnett struct sas_rphy *rphy; 1943d04e62b9SKevin Barnett 1944d04e62b9SKevin Barnett starget = scsi_target(sdev); 1945d04e62b9SKevin Barnett rphy = target_to_rphy(starget); 1946d04e62b9SKevin Barnett sd = hpsa_find_device_by_sas_rphy(h, rphy); 1947d04e62b9SKevin Barnett if (sd) { 1948d04e62b9SKevin Barnett sd->target = sdev_id(sdev); 1949d04e62b9SKevin Barnett sd->lun = sdev->lun; 1950d04e62b9SKevin Barnett } 1951d04e62b9SKevin Barnett } else 1952edd16368SStephen M. Cameron sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev), 1953edd16368SStephen M. Cameron sdev_id(sdev), sdev->lun); 1954d04e62b9SKevin Barnett 1955d04e62b9SKevin Barnett if (sd && sd->expose_device) { 195603383736SDon Brace atomic_set(&sd->ioaccel_cmds_out, 0); 1957d04e62b9SKevin Barnett sdev->hostdata = sd; 195841ce4c35SStephen Cameron } else 195941ce4c35SStephen Cameron sdev->hostdata = NULL; 1960edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->devlock, flags); 1961edd16368SStephen M. Cameron return 0; 1962edd16368SStephen M. Cameron } 1963edd16368SStephen M. Cameron 196441ce4c35SStephen Cameron /* configure scsi device based on internal per-device structure */ 196541ce4c35SStephen Cameron static int hpsa_slave_configure(struct scsi_device *sdev) 196641ce4c35SStephen Cameron { 196741ce4c35SStephen Cameron struct hpsa_scsi_dev_t *sd; 196841ce4c35SStephen Cameron int queue_depth; 196941ce4c35SStephen Cameron 197041ce4c35SStephen Cameron sd = sdev->hostdata; 19712a168208SKevin Barnett sdev->no_uld_attach = !sd || !sd->expose_device; 197241ce4c35SStephen Cameron 197341ce4c35SStephen Cameron if (sd) 197441ce4c35SStephen Cameron queue_depth = sd->queue_depth != 0 ? 197541ce4c35SStephen Cameron sd->queue_depth : sdev->host->can_queue; 197641ce4c35SStephen Cameron else 197741ce4c35SStephen Cameron queue_depth = sdev->host->can_queue; 197841ce4c35SStephen Cameron 197941ce4c35SStephen Cameron scsi_change_queue_depth(sdev, queue_depth); 198041ce4c35SStephen Cameron 198141ce4c35SStephen Cameron return 0; 198241ce4c35SStephen Cameron } 198341ce4c35SStephen Cameron 1984edd16368SStephen M. Cameron static void hpsa_slave_destroy(struct scsi_device *sdev) 1985edd16368SStephen M. Cameron { 1986bcc44255SStephen M. Cameron /* nothing to do. */ 1987edd16368SStephen M. Cameron } 1988edd16368SStephen M. Cameron 1989d9a729f3SWebb Scales static void hpsa_free_ioaccel2_sg_chain_blocks(struct ctlr_info *h) 1990d9a729f3SWebb Scales { 1991d9a729f3SWebb Scales int i; 1992d9a729f3SWebb Scales 1993d9a729f3SWebb Scales if (!h->ioaccel2_cmd_sg_list) 1994d9a729f3SWebb Scales return; 1995d9a729f3SWebb Scales for (i = 0; i < h->nr_cmds; i++) { 1996d9a729f3SWebb Scales kfree(h->ioaccel2_cmd_sg_list[i]); 1997d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list[i] = NULL; 1998d9a729f3SWebb Scales } 1999d9a729f3SWebb Scales kfree(h->ioaccel2_cmd_sg_list); 2000d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list = NULL; 2001d9a729f3SWebb Scales } 2002d9a729f3SWebb Scales 2003d9a729f3SWebb Scales static int hpsa_allocate_ioaccel2_sg_chain_blocks(struct ctlr_info *h) 2004d9a729f3SWebb Scales { 2005d9a729f3SWebb Scales int i; 2006d9a729f3SWebb Scales 2007d9a729f3SWebb Scales if (h->chainsize <= 0) 2008d9a729f3SWebb Scales return 0; 2009d9a729f3SWebb Scales 2010d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list = 2011d9a729f3SWebb Scales kzalloc(sizeof(*h->ioaccel2_cmd_sg_list) * h->nr_cmds, 2012d9a729f3SWebb Scales GFP_KERNEL); 2013d9a729f3SWebb Scales if (!h->ioaccel2_cmd_sg_list) 2014d9a729f3SWebb Scales return -ENOMEM; 2015d9a729f3SWebb Scales for (i = 0; i < h->nr_cmds; i++) { 2016d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list[i] = 2017d9a729f3SWebb Scales kmalloc(sizeof(*h->ioaccel2_cmd_sg_list[i]) * 2018d9a729f3SWebb Scales h->maxsgentries, GFP_KERNEL); 2019d9a729f3SWebb Scales if (!h->ioaccel2_cmd_sg_list[i]) 2020d9a729f3SWebb Scales goto clean; 2021d9a729f3SWebb Scales } 2022d9a729f3SWebb Scales return 0; 2023d9a729f3SWebb Scales 2024d9a729f3SWebb Scales clean: 2025d9a729f3SWebb Scales hpsa_free_ioaccel2_sg_chain_blocks(h); 2026d9a729f3SWebb Scales return -ENOMEM; 2027d9a729f3SWebb Scales } 2028d9a729f3SWebb Scales 202933a2ffceSStephen M. Cameron static void hpsa_free_sg_chain_blocks(struct ctlr_info *h) 203033a2ffceSStephen M. Cameron { 203133a2ffceSStephen M. Cameron int i; 203233a2ffceSStephen M. Cameron 203333a2ffceSStephen M. Cameron if (!h->cmd_sg_list) 203433a2ffceSStephen M. Cameron return; 203533a2ffceSStephen M. Cameron for (i = 0; i < h->nr_cmds; i++) { 203633a2ffceSStephen M. Cameron kfree(h->cmd_sg_list[i]); 203733a2ffceSStephen M. Cameron h->cmd_sg_list[i] = NULL; 203833a2ffceSStephen M. Cameron } 203933a2ffceSStephen M. Cameron kfree(h->cmd_sg_list); 204033a2ffceSStephen M. Cameron h->cmd_sg_list = NULL; 204133a2ffceSStephen M. Cameron } 204233a2ffceSStephen M. Cameron 2043105a3dbcSRobert Elliott static int hpsa_alloc_sg_chain_blocks(struct ctlr_info *h) 204433a2ffceSStephen M. Cameron { 204533a2ffceSStephen M. Cameron int i; 204633a2ffceSStephen M. Cameron 204733a2ffceSStephen M. Cameron if (h->chainsize <= 0) 204833a2ffceSStephen M. Cameron return 0; 204933a2ffceSStephen M. Cameron 205033a2ffceSStephen M. Cameron h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds, 205133a2ffceSStephen M. Cameron GFP_KERNEL); 20523d4e6af8SRobert Elliott if (!h->cmd_sg_list) { 20533d4e6af8SRobert Elliott dev_err(&h->pdev->dev, "Failed to allocate SG list\n"); 205433a2ffceSStephen M. Cameron return -ENOMEM; 20553d4e6af8SRobert Elliott } 205633a2ffceSStephen M. Cameron for (i = 0; i < h->nr_cmds; i++) { 205733a2ffceSStephen M. Cameron h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) * 205833a2ffceSStephen M. Cameron h->chainsize, GFP_KERNEL); 20593d4e6af8SRobert Elliott if (!h->cmd_sg_list[i]) { 20603d4e6af8SRobert Elliott dev_err(&h->pdev->dev, "Failed to allocate cmd SG\n"); 206133a2ffceSStephen M. Cameron goto clean; 206233a2ffceSStephen M. Cameron } 20633d4e6af8SRobert Elliott } 206433a2ffceSStephen M. Cameron return 0; 206533a2ffceSStephen M. Cameron 206633a2ffceSStephen M. Cameron clean: 206733a2ffceSStephen M. Cameron hpsa_free_sg_chain_blocks(h); 206833a2ffceSStephen M. Cameron return -ENOMEM; 206933a2ffceSStephen M. Cameron } 207033a2ffceSStephen M. Cameron 2071d9a729f3SWebb Scales static int hpsa_map_ioaccel2_sg_chain_block(struct ctlr_info *h, 2072d9a729f3SWebb Scales struct io_accel2_cmd *cp, struct CommandList *c) 2073d9a729f3SWebb Scales { 2074d9a729f3SWebb Scales struct ioaccel2_sg_element *chain_block; 2075d9a729f3SWebb Scales u64 temp64; 2076d9a729f3SWebb Scales u32 chain_size; 2077d9a729f3SWebb Scales 2078d9a729f3SWebb Scales chain_block = h->ioaccel2_cmd_sg_list[c->cmdindex]; 2079a736e9b6SDon Brace chain_size = le32_to_cpu(cp->sg[0].length); 2080d9a729f3SWebb Scales temp64 = pci_map_single(h->pdev, chain_block, chain_size, 2081d9a729f3SWebb Scales PCI_DMA_TODEVICE); 2082d9a729f3SWebb Scales if (dma_mapping_error(&h->pdev->dev, temp64)) { 2083d9a729f3SWebb Scales /* prevent subsequent unmapping */ 2084d9a729f3SWebb Scales cp->sg->address = 0; 2085d9a729f3SWebb Scales return -1; 2086d9a729f3SWebb Scales } 2087d9a729f3SWebb Scales cp->sg->address = cpu_to_le64(temp64); 2088d9a729f3SWebb Scales return 0; 2089d9a729f3SWebb Scales } 2090d9a729f3SWebb Scales 2091d9a729f3SWebb Scales static void hpsa_unmap_ioaccel2_sg_chain_block(struct ctlr_info *h, 2092d9a729f3SWebb Scales struct io_accel2_cmd *cp) 2093d9a729f3SWebb Scales { 2094d9a729f3SWebb Scales struct ioaccel2_sg_element *chain_sg; 2095d9a729f3SWebb Scales u64 temp64; 2096d9a729f3SWebb Scales u32 chain_size; 2097d9a729f3SWebb Scales 2098d9a729f3SWebb Scales chain_sg = cp->sg; 2099d9a729f3SWebb Scales temp64 = le64_to_cpu(chain_sg->address); 2100a736e9b6SDon Brace chain_size = le32_to_cpu(cp->sg[0].length); 2101d9a729f3SWebb Scales pci_unmap_single(h->pdev, temp64, chain_size, PCI_DMA_TODEVICE); 2102d9a729f3SWebb Scales } 2103d9a729f3SWebb Scales 2104e2bea6dfSStephen M. Cameron static int hpsa_map_sg_chain_block(struct ctlr_info *h, 210533a2ffceSStephen M. Cameron struct CommandList *c) 210633a2ffceSStephen M. Cameron { 210733a2ffceSStephen M. Cameron struct SGDescriptor *chain_sg, *chain_block; 210833a2ffceSStephen M. Cameron u64 temp64; 210950a0decfSStephen M. Cameron u32 chain_len; 211033a2ffceSStephen M. Cameron 211133a2ffceSStephen M. Cameron chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 211233a2ffceSStephen M. Cameron chain_block = h->cmd_sg_list[c->cmdindex]; 211350a0decfSStephen M. Cameron chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN); 211450a0decfSStephen M. Cameron chain_len = sizeof(*chain_sg) * 21152b08b3e9SDon Brace (le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries); 211650a0decfSStephen M. Cameron chain_sg->Len = cpu_to_le32(chain_len); 211750a0decfSStephen M. Cameron temp64 = pci_map_single(h->pdev, chain_block, chain_len, 211833a2ffceSStephen M. Cameron PCI_DMA_TODEVICE); 2119e2bea6dfSStephen M. Cameron if (dma_mapping_error(&h->pdev->dev, temp64)) { 2120e2bea6dfSStephen M. Cameron /* prevent subsequent unmapping */ 212150a0decfSStephen M. Cameron chain_sg->Addr = cpu_to_le64(0); 2122e2bea6dfSStephen M. Cameron return -1; 2123e2bea6dfSStephen M. Cameron } 212450a0decfSStephen M. Cameron chain_sg->Addr = cpu_to_le64(temp64); 2125e2bea6dfSStephen M. Cameron return 0; 212633a2ffceSStephen M. Cameron } 212733a2ffceSStephen M. Cameron 212833a2ffceSStephen M. Cameron static void hpsa_unmap_sg_chain_block(struct ctlr_info *h, 212933a2ffceSStephen M. Cameron struct CommandList *c) 213033a2ffceSStephen M. Cameron { 213133a2ffceSStephen M. Cameron struct SGDescriptor *chain_sg; 213233a2ffceSStephen M. Cameron 213350a0decfSStephen M. Cameron if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries) 213433a2ffceSStephen M. Cameron return; 213533a2ffceSStephen M. Cameron 213633a2ffceSStephen M. Cameron chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 213750a0decfSStephen M. Cameron pci_unmap_single(h->pdev, le64_to_cpu(chain_sg->Addr), 213850a0decfSStephen M. Cameron le32_to_cpu(chain_sg->Len), PCI_DMA_TODEVICE); 213933a2ffceSStephen M. Cameron } 214033a2ffceSStephen M. Cameron 2141a09c1441SScott Teel 2142a09c1441SScott Teel /* Decode the various types of errors on ioaccel2 path. 2143a09c1441SScott Teel * Return 1 for any error that should generate a RAID path retry. 2144a09c1441SScott Teel * Return 0 for errors that don't require a RAID path retry. 2145a09c1441SScott Teel */ 2146a09c1441SScott Teel static int handle_ioaccel_mode2_error(struct ctlr_info *h, 2147c349775eSScott Teel struct CommandList *c, 2148c349775eSScott Teel struct scsi_cmnd *cmd, 2149c349775eSScott Teel struct io_accel2_cmd *c2) 2150c349775eSScott Teel { 2151c349775eSScott Teel int data_len; 2152a09c1441SScott Teel int retry = 0; 2153c40820d5SJoe Handzik u32 ioaccel2_resid = 0; 2154c349775eSScott Teel 2155c349775eSScott Teel switch (c2->error_data.serv_response) { 2156c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_COMPLETE: 2157c349775eSScott Teel switch (c2->error_data.status) { 2158c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_GOOD: 2159c349775eSScott Teel break; 2160c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND: 2161ee6b1889SStephen M. Cameron cmd->result |= SAM_STAT_CHECK_CONDITION; 2162c349775eSScott Teel if (c2->error_data.data_present != 2163ee6b1889SStephen M. Cameron IOACCEL2_SENSE_DATA_PRESENT) { 2164ee6b1889SStephen M. Cameron memset(cmd->sense_buffer, 0, 2165ee6b1889SStephen M. Cameron SCSI_SENSE_BUFFERSIZE); 2166c349775eSScott Teel break; 2167ee6b1889SStephen M. Cameron } 2168c349775eSScott Teel /* copy the sense data */ 2169c349775eSScott Teel data_len = c2->error_data.sense_data_len; 2170c349775eSScott Teel if (data_len > SCSI_SENSE_BUFFERSIZE) 2171c349775eSScott Teel data_len = SCSI_SENSE_BUFFERSIZE; 2172c349775eSScott Teel if (data_len > sizeof(c2->error_data.sense_data_buff)) 2173c349775eSScott Teel data_len = 2174c349775eSScott Teel sizeof(c2->error_data.sense_data_buff); 2175c349775eSScott Teel memcpy(cmd->sense_buffer, 2176c349775eSScott Teel c2->error_data.sense_data_buff, data_len); 2177a09c1441SScott Teel retry = 1; 2178c349775eSScott Teel break; 2179c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_BUSY: 2180a09c1441SScott Teel retry = 1; 2181c349775eSScott Teel break; 2182c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON: 2183a09c1441SScott Teel retry = 1; 2184c349775eSScott Teel break; 2185c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL: 21864a8da22bSStephen Cameron retry = 1; 2187c349775eSScott Teel break; 2188c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED: 2189a09c1441SScott Teel retry = 1; 2190c349775eSScott Teel break; 2191c349775eSScott Teel default: 2192a09c1441SScott Teel retry = 1; 2193c349775eSScott Teel break; 2194c349775eSScott Teel } 2195c349775eSScott Teel break; 2196c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_FAILURE: 2197c40820d5SJoe Handzik switch (c2->error_data.status) { 2198c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_IO_ERROR: 2199c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_IO_ABORTED: 2200c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_OVERRUN: 2201c40820d5SJoe Handzik retry = 1; 2202c40820d5SJoe Handzik break; 2203c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_UNDERRUN: 2204c40820d5SJoe Handzik cmd->result = (DID_OK << 16); /* host byte */ 2205c40820d5SJoe Handzik cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 2206c40820d5SJoe Handzik ioaccel2_resid = get_unaligned_le32( 2207c40820d5SJoe Handzik &c2->error_data.resid_cnt[0]); 2208c40820d5SJoe Handzik scsi_set_resid(cmd, ioaccel2_resid); 2209c40820d5SJoe Handzik break; 2210c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_NO_PATH_TO_DEVICE: 2211c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_INVALID_DEVICE: 2212c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_IOACCEL_DISABLED: 2213c40820d5SJoe Handzik /* We will get an event from ctlr to trigger rescan */ 2214c40820d5SJoe Handzik retry = 1; 2215c40820d5SJoe Handzik break; 2216c40820d5SJoe Handzik default: 2217c40820d5SJoe Handzik retry = 1; 2218c40820d5SJoe Handzik } 2219c349775eSScott Teel break; 2220c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE: 2221c349775eSScott Teel break; 2222c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS: 2223c349775eSScott Teel break; 2224c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_REJECTED: 2225a09c1441SScott Teel retry = 1; 2226c349775eSScott Teel break; 2227c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN: 2228c349775eSScott Teel break; 2229c349775eSScott Teel default: 2230a09c1441SScott Teel retry = 1; 2231c349775eSScott Teel break; 2232c349775eSScott Teel } 2233a09c1441SScott Teel 2234a09c1441SScott Teel return retry; /* retry on raid path? */ 2235c349775eSScott Teel } 2236c349775eSScott Teel 2237a58e7e53SWebb Scales static void hpsa_cmd_resolve_events(struct ctlr_info *h, 2238a58e7e53SWebb Scales struct CommandList *c) 2239a58e7e53SWebb Scales { 2240d604f533SWebb Scales bool do_wake = false; 2241d604f533SWebb Scales 2242a58e7e53SWebb Scales /* 2243a58e7e53SWebb Scales * Prevent the following race in the abort handler: 2244a58e7e53SWebb Scales * 2245a58e7e53SWebb Scales * 1. LLD is requested to abort a SCSI command 2246a58e7e53SWebb Scales * 2. The SCSI command completes 2247a58e7e53SWebb Scales * 3. The struct CommandList associated with step 2 is made available 2248a58e7e53SWebb Scales * 4. New I/O request to LLD to another LUN re-uses struct CommandList 2249a58e7e53SWebb Scales * 5. Abort handler follows scsi_cmnd->host_scribble and 2250a58e7e53SWebb Scales * finds struct CommandList and tries to aborts it 2251a58e7e53SWebb Scales * Now we have aborted the wrong command. 2252a58e7e53SWebb Scales * 2253d604f533SWebb Scales * Reset c->scsi_cmd here so that the abort or reset handler will know 2254d604f533SWebb Scales * this command has completed. Then, check to see if the handler is 2255a58e7e53SWebb Scales * waiting for this command, and, if so, wake it. 2256a58e7e53SWebb Scales */ 2257a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_IDLE; 2258d604f533SWebb Scales mb(); /* Declare command idle before checking for pending events. */ 2259a58e7e53SWebb Scales if (c->abort_pending) { 2260d604f533SWebb Scales do_wake = true; 2261a58e7e53SWebb Scales c->abort_pending = false; 2262a58e7e53SWebb Scales } 2263d604f533SWebb Scales if (c->reset_pending) { 2264d604f533SWebb Scales unsigned long flags; 2265d604f533SWebb Scales struct hpsa_scsi_dev_t *dev; 2266d604f533SWebb Scales 2267d604f533SWebb Scales /* 2268d604f533SWebb Scales * There appears to be a reset pending; lock the lock and 2269d604f533SWebb Scales * reconfirm. If so, then decrement the count of outstanding 2270d604f533SWebb Scales * commands and wake the reset command if this is the last one. 2271d604f533SWebb Scales */ 2272d604f533SWebb Scales spin_lock_irqsave(&h->lock, flags); 2273d604f533SWebb Scales dev = c->reset_pending; /* Re-fetch under the lock. */ 2274d604f533SWebb Scales if (dev && atomic_dec_and_test(&dev->reset_cmds_out)) 2275d604f533SWebb Scales do_wake = true; 2276d604f533SWebb Scales c->reset_pending = NULL; 2277d604f533SWebb Scales spin_unlock_irqrestore(&h->lock, flags); 2278d604f533SWebb Scales } 2279d604f533SWebb Scales 2280d604f533SWebb Scales if (do_wake) 2281d604f533SWebb Scales wake_up_all(&h->event_sync_wait_queue); 2282a58e7e53SWebb Scales } 2283a58e7e53SWebb Scales 228473153fe5SWebb Scales static void hpsa_cmd_resolve_and_free(struct ctlr_info *h, 228573153fe5SWebb Scales struct CommandList *c) 228673153fe5SWebb Scales { 228773153fe5SWebb Scales hpsa_cmd_resolve_events(h, c); 228873153fe5SWebb Scales cmd_tagged_free(h, c); 228973153fe5SWebb Scales } 229073153fe5SWebb Scales 22918a0ff92cSWebb Scales static void hpsa_cmd_free_and_done(struct ctlr_info *h, 22928a0ff92cSWebb Scales struct CommandList *c, struct scsi_cmnd *cmd) 22938a0ff92cSWebb Scales { 229473153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 22958a0ff92cSWebb Scales cmd->scsi_done(cmd); 22968a0ff92cSWebb Scales } 22978a0ff92cSWebb Scales 22988a0ff92cSWebb Scales static void hpsa_retry_cmd(struct ctlr_info *h, struct CommandList *c) 22998a0ff92cSWebb Scales { 23008a0ff92cSWebb Scales INIT_WORK(&c->work, hpsa_command_resubmit_worker); 23018a0ff92cSWebb Scales queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work); 23028a0ff92cSWebb Scales } 23038a0ff92cSWebb Scales 2304a58e7e53SWebb Scales static void hpsa_set_scsi_cmd_aborted(struct scsi_cmnd *cmd) 2305a58e7e53SWebb Scales { 2306a58e7e53SWebb Scales cmd->result = DID_ABORT << 16; 2307a58e7e53SWebb Scales } 2308a58e7e53SWebb Scales 2309a58e7e53SWebb Scales static void hpsa_cmd_abort_and_free(struct ctlr_info *h, struct CommandList *c, 2310a58e7e53SWebb Scales struct scsi_cmnd *cmd) 2311a58e7e53SWebb Scales { 2312a58e7e53SWebb Scales hpsa_set_scsi_cmd_aborted(cmd); 2313a58e7e53SWebb Scales dev_warn(&h->pdev->dev, "CDB %16phN was aborted with status 0x%x\n", 2314a58e7e53SWebb Scales c->Request.CDB, c->err_info->ScsiStatus); 231573153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 2316a58e7e53SWebb Scales } 2317a58e7e53SWebb Scales 2318c349775eSScott Teel static void process_ioaccel2_completion(struct ctlr_info *h, 2319c349775eSScott Teel struct CommandList *c, struct scsi_cmnd *cmd, 2320c349775eSScott Teel struct hpsa_scsi_dev_t *dev) 2321c349775eSScott Teel { 2322c349775eSScott Teel struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 2323c349775eSScott Teel 2324c349775eSScott Teel /* check for good status */ 2325c349775eSScott Teel if (likely(c2->error_data.serv_response == 0 && 23268a0ff92cSWebb Scales c2->error_data.status == 0)) 23278a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, c, cmd); 2328c349775eSScott Teel 23298a0ff92cSWebb Scales /* 23308a0ff92cSWebb Scales * Any RAID offload error results in retry which will use 2331c349775eSScott Teel * the normal I/O path so the controller can handle whatever's 2332c349775eSScott Teel * wrong. 2333c349775eSScott Teel */ 2334f3f01730SKevin Barnett if (is_logical_device(dev) && 2335c349775eSScott Teel c2->error_data.serv_response == 2336c349775eSScott Teel IOACCEL2_SERV_RESPONSE_FAILURE) { 2337080ef1ccSDon Brace if (c2->error_data.status == 2338080ef1ccSDon Brace IOACCEL2_STATUS_SR_IOACCEL_DISABLED) 2339c349775eSScott Teel dev->offload_enabled = 0; 23408a0ff92cSWebb Scales 23418a0ff92cSWebb Scales return hpsa_retry_cmd(h, c); 2342080ef1ccSDon Brace } 2343080ef1ccSDon Brace 2344080ef1ccSDon Brace if (handle_ioaccel_mode2_error(h, c, cmd, c2)) 23458a0ff92cSWebb Scales return hpsa_retry_cmd(h, c); 2346080ef1ccSDon Brace 23478a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, c, cmd); 2348c349775eSScott Teel } 2349c349775eSScott Teel 23509437ac43SStephen Cameron /* Returns 0 on success, < 0 otherwise. */ 23519437ac43SStephen Cameron static int hpsa_evaluate_tmf_status(struct ctlr_info *h, 23529437ac43SStephen Cameron struct CommandList *cp) 23539437ac43SStephen Cameron { 23549437ac43SStephen Cameron u8 tmf_status = cp->err_info->ScsiStatus; 23559437ac43SStephen Cameron 23569437ac43SStephen Cameron switch (tmf_status) { 23579437ac43SStephen Cameron case CISS_TMF_COMPLETE: 23589437ac43SStephen Cameron /* 23599437ac43SStephen Cameron * CISS_TMF_COMPLETE never happens, instead, 23609437ac43SStephen Cameron * ei->CommandStatus == 0 for this case. 23619437ac43SStephen Cameron */ 23629437ac43SStephen Cameron case CISS_TMF_SUCCESS: 23639437ac43SStephen Cameron return 0; 23649437ac43SStephen Cameron case CISS_TMF_INVALID_FRAME: 23659437ac43SStephen Cameron case CISS_TMF_NOT_SUPPORTED: 23669437ac43SStephen Cameron case CISS_TMF_FAILED: 23679437ac43SStephen Cameron case CISS_TMF_WRONG_LUN: 23689437ac43SStephen Cameron case CISS_TMF_OVERLAPPED_TAG: 23699437ac43SStephen Cameron break; 23709437ac43SStephen Cameron default: 23719437ac43SStephen Cameron dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n", 23729437ac43SStephen Cameron tmf_status); 23739437ac43SStephen Cameron break; 23749437ac43SStephen Cameron } 23759437ac43SStephen Cameron return -tmf_status; 23769437ac43SStephen Cameron } 23779437ac43SStephen Cameron 23781fb011fbSStephen M. Cameron static void complete_scsi_command(struct CommandList *cp) 2379edd16368SStephen M. Cameron { 2380edd16368SStephen M. Cameron struct scsi_cmnd *cmd; 2381edd16368SStephen M. Cameron struct ctlr_info *h; 2382edd16368SStephen M. Cameron struct ErrorInfo *ei; 2383283b4a9bSStephen M. Cameron struct hpsa_scsi_dev_t *dev; 2384d9a729f3SWebb Scales struct io_accel2_cmd *c2; 2385edd16368SStephen M. Cameron 23869437ac43SStephen Cameron u8 sense_key; 23879437ac43SStephen Cameron u8 asc; /* additional sense code */ 23889437ac43SStephen Cameron u8 ascq; /* additional sense code qualifier */ 2389db111e18SStephen M. Cameron unsigned long sense_data_size; 2390edd16368SStephen M. Cameron 2391edd16368SStephen M. Cameron ei = cp->err_info; 23927fa3030cSStephen Cameron cmd = cp->scsi_cmd; 2393edd16368SStephen M. Cameron h = cp->h; 2394283b4a9bSStephen M. Cameron dev = cmd->device->hostdata; 2395d9a729f3SWebb Scales c2 = &h->ioaccel2_cmd_pool[cp->cmdindex]; 2396edd16368SStephen M. Cameron 2397edd16368SStephen M. Cameron scsi_dma_unmap(cmd); /* undo the DMA mappings */ 2398e1f7de0cSMatt Gates if ((cp->cmd_type == CMD_SCSI) && 23992b08b3e9SDon Brace (le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries)) 240033a2ffceSStephen M. Cameron hpsa_unmap_sg_chain_block(h, cp); 2401edd16368SStephen M. Cameron 2402d9a729f3SWebb Scales if ((cp->cmd_type == CMD_IOACCEL2) && 2403d9a729f3SWebb Scales (c2->sg[0].chain_indicator == IOACCEL2_CHAIN)) 2404d9a729f3SWebb Scales hpsa_unmap_ioaccel2_sg_chain_block(h, c2); 2405d9a729f3SWebb Scales 2406edd16368SStephen M. Cameron cmd->result = (DID_OK << 16); /* host byte */ 2407edd16368SStephen M. Cameron cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 2408c349775eSScott Teel 240903383736SDon Brace if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1) 241003383736SDon Brace atomic_dec(&cp->phys_disk->ioaccel_cmds_out); 241103383736SDon Brace 241225163bd5SWebb Scales /* 241325163bd5SWebb Scales * We check for lockup status here as it may be set for 241425163bd5SWebb Scales * CMD_SCSI, CMD_IOACCEL1 and CMD_IOACCEL2 commands by 241525163bd5SWebb Scales * fail_all_oustanding_cmds() 241625163bd5SWebb Scales */ 241725163bd5SWebb Scales if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) { 241825163bd5SWebb Scales /* DID_NO_CONNECT will prevent a retry */ 241925163bd5SWebb Scales cmd->result = DID_NO_CONNECT << 16; 24208a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, cp, cmd); 242125163bd5SWebb Scales } 242225163bd5SWebb Scales 2423d604f533SWebb Scales if ((unlikely(hpsa_is_pending_event(cp)))) { 2424d604f533SWebb Scales if (cp->reset_pending) 2425d604f533SWebb Scales return hpsa_cmd_resolve_and_free(h, cp); 2426d604f533SWebb Scales if (cp->abort_pending) 2427d604f533SWebb Scales return hpsa_cmd_abort_and_free(h, cp, cmd); 2428d604f533SWebb Scales } 2429d604f533SWebb Scales 2430c349775eSScott Teel if (cp->cmd_type == CMD_IOACCEL2) 2431c349775eSScott Teel return process_ioaccel2_completion(h, cp, cmd, dev); 2432c349775eSScott Teel 24336aa4c361SRobert Elliott scsi_set_resid(cmd, ei->ResidualCnt); 24348a0ff92cSWebb Scales if (ei->CommandStatus == 0) 24358a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, cp, cmd); 24366aa4c361SRobert Elliott 2437e1f7de0cSMatt Gates /* For I/O accelerator commands, copy over some fields to the normal 2438e1f7de0cSMatt Gates * CISS header used below for error handling. 2439e1f7de0cSMatt Gates */ 2440e1f7de0cSMatt Gates if (cp->cmd_type == CMD_IOACCEL1) { 2441e1f7de0cSMatt Gates struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex]; 24422b08b3e9SDon Brace cp->Header.SGList = scsi_sg_count(cmd); 24432b08b3e9SDon Brace cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList); 24442b08b3e9SDon Brace cp->Request.CDBLen = le16_to_cpu(c->io_flags) & 24452b08b3e9SDon Brace IOACCEL1_IOFLAGS_CDBLEN_MASK; 244650a0decfSStephen M. Cameron cp->Header.tag = c->tag; 2447e1f7de0cSMatt Gates memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8); 2448e1f7de0cSMatt Gates memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen); 2449283b4a9bSStephen M. Cameron 2450283b4a9bSStephen M. Cameron /* Any RAID offload error results in retry which will use 2451283b4a9bSStephen M. Cameron * the normal I/O path so the controller can handle whatever's 2452283b4a9bSStephen M. Cameron * wrong. 2453283b4a9bSStephen M. Cameron */ 2454f3f01730SKevin Barnett if (is_logical_device(dev)) { 2455283b4a9bSStephen M. Cameron if (ei->CommandStatus == CMD_IOACCEL_DISABLED) 2456283b4a9bSStephen M. Cameron dev->offload_enabled = 0; 24578a0ff92cSWebb Scales return hpsa_retry_cmd(h, cp); 2458283b4a9bSStephen M. Cameron } 2459e1f7de0cSMatt Gates } 2460e1f7de0cSMatt Gates 2461edd16368SStephen M. Cameron /* an error has occurred */ 2462edd16368SStephen M. Cameron switch (ei->CommandStatus) { 2463edd16368SStephen M. Cameron 2464edd16368SStephen M. Cameron case CMD_TARGET_STATUS: 24659437ac43SStephen Cameron cmd->result |= ei->ScsiStatus; 24669437ac43SStephen Cameron /* copy the sense data */ 24679437ac43SStephen Cameron if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo)) 24689437ac43SStephen Cameron sense_data_size = SCSI_SENSE_BUFFERSIZE; 24699437ac43SStephen Cameron else 24709437ac43SStephen Cameron sense_data_size = sizeof(ei->SenseInfo); 24719437ac43SStephen Cameron if (ei->SenseLen < sense_data_size) 24729437ac43SStephen Cameron sense_data_size = ei->SenseLen; 24739437ac43SStephen Cameron memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size); 24749437ac43SStephen Cameron if (ei->ScsiStatus) 24759437ac43SStephen Cameron decode_sense_data(ei->SenseInfo, sense_data_size, 24769437ac43SStephen Cameron &sense_key, &asc, &ascq); 2477edd16368SStephen M. Cameron if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) { 24781d3b3609SMatt Gates if (sense_key == ABORTED_COMMAND) { 24792e311fbaSStephen M. Cameron cmd->result |= DID_SOFT_ERROR << 16; 24801d3b3609SMatt Gates break; 24811d3b3609SMatt Gates } 2482edd16368SStephen M. Cameron break; 2483edd16368SStephen M. Cameron } 2484edd16368SStephen M. Cameron /* Problem was not a check condition 2485edd16368SStephen M. Cameron * Pass it up to the upper layers... 2486edd16368SStephen M. Cameron */ 2487edd16368SStephen M. Cameron if (ei->ScsiStatus) { 2488edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "cp %p has status 0x%x " 2489edd16368SStephen M. Cameron "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, " 2490edd16368SStephen M. Cameron "Returning result: 0x%x\n", 2491edd16368SStephen M. Cameron cp, ei->ScsiStatus, 2492edd16368SStephen M. Cameron sense_key, asc, ascq, 2493edd16368SStephen M. Cameron cmd->result); 2494edd16368SStephen M. Cameron } else { /* scsi status is zero??? How??? */ 2495edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. " 2496edd16368SStephen M. Cameron "Returning no connection.\n", cp), 2497edd16368SStephen M. Cameron 2498edd16368SStephen M. Cameron /* Ordinarily, this case should never happen, 2499edd16368SStephen M. Cameron * but there is a bug in some released firmware 2500edd16368SStephen M. Cameron * revisions that allows it to happen if, for 2501edd16368SStephen M. Cameron * example, a 4100 backplane loses power and 2502edd16368SStephen M. Cameron * the tape drive is in it. We assume that 2503edd16368SStephen M. Cameron * it's a fatal error of some kind because we 2504edd16368SStephen M. Cameron * can't show that it wasn't. We will make it 2505edd16368SStephen M. Cameron * look like selection timeout since that is 2506edd16368SStephen M. Cameron * the most common reason for this to occur, 2507edd16368SStephen M. Cameron * and it's severe enough. 2508edd16368SStephen M. Cameron */ 2509edd16368SStephen M. Cameron 2510edd16368SStephen M. Cameron cmd->result = DID_NO_CONNECT << 16; 2511edd16368SStephen M. Cameron } 2512edd16368SStephen M. Cameron break; 2513edd16368SStephen M. Cameron 2514edd16368SStephen M. Cameron case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 2515edd16368SStephen M. Cameron break; 2516edd16368SStephen M. Cameron case CMD_DATA_OVERRUN: 2517f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, 2518f42e81e1SStephen Cameron "CDB %16phN data overrun\n", cp->Request.CDB); 2519edd16368SStephen M. Cameron break; 2520edd16368SStephen M. Cameron case CMD_INVALID: { 2521edd16368SStephen M. Cameron /* print_bytes(cp, sizeof(*cp), 1, 0); 2522edd16368SStephen M. Cameron print_cmd(cp); */ 2523edd16368SStephen M. Cameron /* We get CMD_INVALID if you address a non-existent device 2524edd16368SStephen M. Cameron * instead of a selection timeout (no response). You will 2525edd16368SStephen M. Cameron * see this if you yank out a drive, then try to access it. 2526edd16368SStephen M. Cameron * This is kind of a shame because it means that any other 2527edd16368SStephen M. Cameron * CMD_INVALID (e.g. driver bug) will get interpreted as a 2528edd16368SStephen M. Cameron * missing target. */ 2529edd16368SStephen M. Cameron cmd->result = DID_NO_CONNECT << 16; 2530edd16368SStephen M. Cameron } 2531edd16368SStephen M. Cameron break; 2532edd16368SStephen M. Cameron case CMD_PROTOCOL_ERR: 2533256d0eaaSStephen M. Cameron cmd->result = DID_ERROR << 16; 2534f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n", 2535f42e81e1SStephen Cameron cp->Request.CDB); 2536edd16368SStephen M. Cameron break; 2537edd16368SStephen M. Cameron case CMD_HARDWARE_ERR: 2538edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2539f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n", 2540f42e81e1SStephen Cameron cp->Request.CDB); 2541edd16368SStephen M. Cameron break; 2542edd16368SStephen M. Cameron case CMD_CONNECTION_LOST: 2543edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2544f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n", 2545f42e81e1SStephen Cameron cp->Request.CDB); 2546edd16368SStephen M. Cameron break; 2547edd16368SStephen M. Cameron case CMD_ABORTED: 2548a58e7e53SWebb Scales /* Return now to avoid calling scsi_done(). */ 2549a58e7e53SWebb Scales return hpsa_cmd_abort_and_free(h, cp, cmd); 2550edd16368SStephen M. Cameron case CMD_ABORT_FAILED: 2551edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2552f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n", 2553f42e81e1SStephen Cameron cp->Request.CDB); 2554edd16368SStephen M. Cameron break; 2555edd16368SStephen M. Cameron case CMD_UNSOLICITED_ABORT: 2556f6e76055SStephen M. Cameron cmd->result = DID_SOFT_ERROR << 16; /* retry the command */ 2557f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n", 2558f42e81e1SStephen Cameron cp->Request.CDB); 2559edd16368SStephen M. Cameron break; 2560edd16368SStephen M. Cameron case CMD_TIMEOUT: 2561edd16368SStephen M. Cameron cmd->result = DID_TIME_OUT << 16; 2562f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN timed out\n", 2563f42e81e1SStephen Cameron cp->Request.CDB); 2564edd16368SStephen M. Cameron break; 25651d5e2ed0SStephen M. Cameron case CMD_UNABORTABLE: 25661d5e2ed0SStephen M. Cameron cmd->result = DID_ERROR << 16; 25671d5e2ed0SStephen M. Cameron dev_warn(&h->pdev->dev, "Command unabortable\n"); 25681d5e2ed0SStephen M. Cameron break; 25699437ac43SStephen Cameron case CMD_TMF_STATUS: 25709437ac43SStephen Cameron if (hpsa_evaluate_tmf_status(h, cp)) /* TMF failed? */ 25719437ac43SStephen Cameron cmd->result = DID_ERROR << 16; 25729437ac43SStephen Cameron break; 2573283b4a9bSStephen M. Cameron case CMD_IOACCEL_DISABLED: 2574283b4a9bSStephen M. Cameron /* This only handles the direct pass-through case since RAID 2575283b4a9bSStephen M. Cameron * offload is handled above. Just attempt a retry. 2576283b4a9bSStephen M. Cameron */ 2577283b4a9bSStephen M. Cameron cmd->result = DID_SOFT_ERROR << 16; 2578283b4a9bSStephen M. Cameron dev_warn(&h->pdev->dev, 2579283b4a9bSStephen M. Cameron "cp %p had HP SSD Smart Path error\n", cp); 2580283b4a9bSStephen M. Cameron break; 2581edd16368SStephen M. Cameron default: 2582edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2583edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n", 2584edd16368SStephen M. Cameron cp, ei->CommandStatus); 2585edd16368SStephen M. Cameron } 25868a0ff92cSWebb Scales 25878a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, cp, cmd); 2588edd16368SStephen M. Cameron } 2589edd16368SStephen M. Cameron 2590edd16368SStephen M. Cameron static void hpsa_pci_unmap(struct pci_dev *pdev, 2591edd16368SStephen M. Cameron struct CommandList *c, int sg_used, int data_direction) 2592edd16368SStephen M. Cameron { 2593edd16368SStephen M. Cameron int i; 2594edd16368SStephen M. Cameron 259550a0decfSStephen M. Cameron for (i = 0; i < sg_used; i++) 259650a0decfSStephen M. Cameron pci_unmap_single(pdev, (dma_addr_t) le64_to_cpu(c->SG[i].Addr), 259750a0decfSStephen M. Cameron le32_to_cpu(c->SG[i].Len), 2598edd16368SStephen M. Cameron data_direction); 2599edd16368SStephen M. Cameron } 2600edd16368SStephen M. Cameron 2601a2dac136SStephen M. Cameron static int hpsa_map_one(struct pci_dev *pdev, 2602edd16368SStephen M. Cameron struct CommandList *cp, 2603edd16368SStephen M. Cameron unsigned char *buf, 2604edd16368SStephen M. Cameron size_t buflen, 2605edd16368SStephen M. Cameron int data_direction) 2606edd16368SStephen M. Cameron { 260701a02ffcSStephen M. Cameron u64 addr64; 2608edd16368SStephen M. Cameron 2609edd16368SStephen M. Cameron if (buflen == 0 || data_direction == PCI_DMA_NONE) { 2610edd16368SStephen M. Cameron cp->Header.SGList = 0; 261150a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(0); 2612a2dac136SStephen M. Cameron return 0; 2613edd16368SStephen M. Cameron } 2614edd16368SStephen M. Cameron 261550a0decfSStephen M. Cameron addr64 = pci_map_single(pdev, buf, buflen, data_direction); 2616eceaae18SShuah Khan if (dma_mapping_error(&pdev->dev, addr64)) { 2617a2dac136SStephen M. Cameron /* Prevent subsequent unmap of something never mapped */ 2618eceaae18SShuah Khan cp->Header.SGList = 0; 261950a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(0); 2620a2dac136SStephen M. Cameron return -1; 2621eceaae18SShuah Khan } 262250a0decfSStephen M. Cameron cp->SG[0].Addr = cpu_to_le64(addr64); 262350a0decfSStephen M. Cameron cp->SG[0].Len = cpu_to_le32(buflen); 262450a0decfSStephen M. Cameron cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */ 262550a0decfSStephen M. Cameron cp->Header.SGList = 1; /* no. SGs contig in this cmd */ 262650a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */ 2627a2dac136SStephen M. Cameron return 0; 2628edd16368SStephen M. Cameron } 2629edd16368SStephen M. Cameron 263025163bd5SWebb Scales #define NO_TIMEOUT ((unsigned long) -1) 263125163bd5SWebb Scales #define DEFAULT_TIMEOUT 30000 /* milliseconds */ 263225163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h, 263325163bd5SWebb Scales struct CommandList *c, int reply_queue, unsigned long timeout_msecs) 2634edd16368SStephen M. Cameron { 2635edd16368SStephen M. Cameron DECLARE_COMPLETION_ONSTACK(wait); 2636edd16368SStephen M. Cameron 2637edd16368SStephen M. Cameron c->waiting = &wait; 263825163bd5SWebb Scales __enqueue_cmd_and_start_io(h, c, reply_queue); 263925163bd5SWebb Scales if (timeout_msecs == NO_TIMEOUT) { 264025163bd5SWebb Scales /* TODO: get rid of this no-timeout thing */ 264125163bd5SWebb Scales wait_for_completion_io(&wait); 264225163bd5SWebb Scales return IO_OK; 264325163bd5SWebb Scales } 264425163bd5SWebb Scales if (!wait_for_completion_io_timeout(&wait, 264525163bd5SWebb Scales msecs_to_jiffies(timeout_msecs))) { 264625163bd5SWebb Scales dev_warn(&h->pdev->dev, "Command timed out.\n"); 264725163bd5SWebb Scales return -ETIMEDOUT; 264825163bd5SWebb Scales } 264925163bd5SWebb Scales return IO_OK; 265025163bd5SWebb Scales } 265125163bd5SWebb Scales 265225163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c, 265325163bd5SWebb Scales int reply_queue, unsigned long timeout_msecs) 265425163bd5SWebb Scales { 265525163bd5SWebb Scales if (unlikely(lockup_detected(h))) { 265625163bd5SWebb Scales c->err_info->CommandStatus = CMD_CTLR_LOCKUP; 265725163bd5SWebb Scales return IO_OK; 265825163bd5SWebb Scales } 265925163bd5SWebb Scales return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs); 2660edd16368SStephen M. Cameron } 2661edd16368SStephen M. Cameron 2662094963daSStephen M. Cameron static u32 lockup_detected(struct ctlr_info *h) 2663094963daSStephen M. Cameron { 2664094963daSStephen M. Cameron int cpu; 2665094963daSStephen M. Cameron u32 rc, *lockup_detected; 2666094963daSStephen M. Cameron 2667094963daSStephen M. Cameron cpu = get_cpu(); 2668094963daSStephen M. Cameron lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 2669094963daSStephen M. Cameron rc = *lockup_detected; 2670094963daSStephen M. Cameron put_cpu(); 2671094963daSStephen M. Cameron return rc; 2672094963daSStephen M. Cameron } 2673094963daSStephen M. Cameron 26749c2fc160SStephen M. Cameron #define MAX_DRIVER_CMD_RETRIES 25 267525163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h, 267625163bd5SWebb Scales struct CommandList *c, int data_direction, unsigned long timeout_msecs) 2677edd16368SStephen M. Cameron { 26789c2fc160SStephen M. Cameron int backoff_time = 10, retry_count = 0; 267925163bd5SWebb Scales int rc; 2680edd16368SStephen M. Cameron 2681edd16368SStephen M. Cameron do { 26827630abd0SJoe Perches memset(c->err_info, 0, sizeof(*c->err_info)); 268325163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 268425163bd5SWebb Scales timeout_msecs); 268525163bd5SWebb Scales if (rc) 268625163bd5SWebb Scales break; 2687edd16368SStephen M. Cameron retry_count++; 26889c2fc160SStephen M. Cameron if (retry_count > 3) { 26899c2fc160SStephen M. Cameron msleep(backoff_time); 26909c2fc160SStephen M. Cameron if (backoff_time < 1000) 26919c2fc160SStephen M. Cameron backoff_time *= 2; 26929c2fc160SStephen M. Cameron } 2693852af20aSMatt Bondurant } while ((check_for_unit_attention(h, c) || 26949c2fc160SStephen M. Cameron check_for_busy(h, c)) && 26959c2fc160SStephen M. Cameron retry_count <= MAX_DRIVER_CMD_RETRIES); 2696edd16368SStephen M. Cameron hpsa_pci_unmap(h->pdev, c, 1, data_direction); 269725163bd5SWebb Scales if (retry_count > MAX_DRIVER_CMD_RETRIES) 269825163bd5SWebb Scales rc = -EIO; 269925163bd5SWebb Scales return rc; 2700edd16368SStephen M. Cameron } 2701edd16368SStephen M. Cameron 2702d1e8beacSStephen M. Cameron static void hpsa_print_cmd(struct ctlr_info *h, char *txt, 2703d1e8beacSStephen M. Cameron struct CommandList *c) 2704edd16368SStephen M. Cameron { 2705d1e8beacSStephen M. Cameron const u8 *cdb = c->Request.CDB; 2706d1e8beacSStephen M. Cameron const u8 *lun = c->Header.LUN.LunAddrBytes; 2707edd16368SStephen M. Cameron 2708d1e8beacSStephen M. Cameron dev_warn(&h->pdev->dev, "%s: LUN:%02x%02x%02x%02x%02x%02x%02x%02x" 2709d1e8beacSStephen M. Cameron " CDB:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x\n", 2710d1e8beacSStephen M. Cameron txt, lun[0], lun[1], lun[2], lun[3], 2711d1e8beacSStephen M. Cameron lun[4], lun[5], lun[6], lun[7], 2712d1e8beacSStephen M. Cameron cdb[0], cdb[1], cdb[2], cdb[3], 2713d1e8beacSStephen M. Cameron cdb[4], cdb[5], cdb[6], cdb[7], 2714d1e8beacSStephen M. Cameron cdb[8], cdb[9], cdb[10], cdb[11], 2715d1e8beacSStephen M. Cameron cdb[12], cdb[13], cdb[14], cdb[15]); 2716d1e8beacSStephen M. Cameron } 2717d1e8beacSStephen M. Cameron 2718d1e8beacSStephen M. Cameron static void hpsa_scsi_interpret_error(struct ctlr_info *h, 2719d1e8beacSStephen M. Cameron struct CommandList *cp) 2720d1e8beacSStephen M. Cameron { 2721d1e8beacSStephen M. Cameron const struct ErrorInfo *ei = cp->err_info; 2722d1e8beacSStephen M. Cameron struct device *d = &cp->h->pdev->dev; 27239437ac43SStephen Cameron u8 sense_key, asc, ascq; 27249437ac43SStephen Cameron int sense_len; 2725d1e8beacSStephen M. Cameron 2726edd16368SStephen M. Cameron switch (ei->CommandStatus) { 2727edd16368SStephen M. Cameron case CMD_TARGET_STATUS: 27289437ac43SStephen Cameron if (ei->SenseLen > sizeof(ei->SenseInfo)) 27299437ac43SStephen Cameron sense_len = sizeof(ei->SenseInfo); 27309437ac43SStephen Cameron else 27319437ac43SStephen Cameron sense_len = ei->SenseLen; 27329437ac43SStephen Cameron decode_sense_data(ei->SenseInfo, sense_len, 27339437ac43SStephen Cameron &sense_key, &asc, &ascq); 2734d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "SCSI status", cp); 2735d1e8beacSStephen M. Cameron if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) 27369437ac43SStephen Cameron dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n", 27379437ac43SStephen Cameron sense_key, asc, ascq); 2738d1e8beacSStephen M. Cameron else 27399437ac43SStephen Cameron dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus); 2740edd16368SStephen M. Cameron if (ei->ScsiStatus == 0) 2741edd16368SStephen M. Cameron dev_warn(d, "SCSI status is abnormally zero. " 2742edd16368SStephen M. Cameron "(probably indicates selection timeout " 2743edd16368SStephen M. Cameron "reported incorrectly due to a known " 2744edd16368SStephen M. Cameron "firmware bug, circa July, 2001.)\n"); 2745edd16368SStephen M. Cameron break; 2746edd16368SStephen M. Cameron case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 2747edd16368SStephen M. Cameron break; 2748edd16368SStephen M. Cameron case CMD_DATA_OVERRUN: 2749d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "overrun condition", cp); 2750edd16368SStephen M. Cameron break; 2751edd16368SStephen M. Cameron case CMD_INVALID: { 2752edd16368SStephen M. Cameron /* controller unfortunately reports SCSI passthru's 2753edd16368SStephen M. Cameron * to non-existent targets as invalid commands. 2754edd16368SStephen M. Cameron */ 2755d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "invalid command", cp); 2756d1e8beacSStephen M. Cameron dev_warn(d, "probably means device no longer present\n"); 2757edd16368SStephen M. Cameron } 2758edd16368SStephen M. Cameron break; 2759edd16368SStephen M. Cameron case CMD_PROTOCOL_ERR: 2760d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "protocol error", cp); 2761edd16368SStephen M. Cameron break; 2762edd16368SStephen M. Cameron case CMD_HARDWARE_ERR: 2763d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "hardware error", cp); 2764edd16368SStephen M. Cameron break; 2765edd16368SStephen M. Cameron case CMD_CONNECTION_LOST: 2766d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "connection lost", cp); 2767edd16368SStephen M. Cameron break; 2768edd16368SStephen M. Cameron case CMD_ABORTED: 2769d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "aborted", cp); 2770edd16368SStephen M. Cameron break; 2771edd16368SStephen M. Cameron case CMD_ABORT_FAILED: 2772d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "abort failed", cp); 2773edd16368SStephen M. Cameron break; 2774edd16368SStephen M. Cameron case CMD_UNSOLICITED_ABORT: 2775d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "unsolicited abort", cp); 2776edd16368SStephen M. Cameron break; 2777edd16368SStephen M. Cameron case CMD_TIMEOUT: 2778d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "timed out", cp); 2779edd16368SStephen M. Cameron break; 27801d5e2ed0SStephen M. Cameron case CMD_UNABORTABLE: 2781d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "unabortable", cp); 27821d5e2ed0SStephen M. Cameron break; 278325163bd5SWebb Scales case CMD_CTLR_LOCKUP: 278425163bd5SWebb Scales hpsa_print_cmd(h, "controller lockup detected", cp); 278525163bd5SWebb Scales break; 2786edd16368SStephen M. Cameron default: 2787d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "unknown status", cp); 2788d1e8beacSStephen M. Cameron dev_warn(d, "Unknown command status %x\n", 2789edd16368SStephen M. Cameron ei->CommandStatus); 2790edd16368SStephen M. Cameron } 2791edd16368SStephen M. Cameron } 2792edd16368SStephen M. Cameron 2793edd16368SStephen M. Cameron static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr, 2794b7bb24ebSStephen M. Cameron u16 page, unsigned char *buf, 2795edd16368SStephen M. Cameron unsigned char bufsize) 2796edd16368SStephen M. Cameron { 2797edd16368SStephen M. Cameron int rc = IO_OK; 2798edd16368SStephen M. Cameron struct CommandList *c; 2799edd16368SStephen M. Cameron struct ErrorInfo *ei; 2800edd16368SStephen M. Cameron 280145fcb86eSStephen Cameron c = cmd_alloc(h); 2802edd16368SStephen M. Cameron 2803a2dac136SStephen M. Cameron if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, 2804a2dac136SStephen M. Cameron page, scsi3addr, TYPE_CMD)) { 2805a2dac136SStephen M. Cameron rc = -1; 2806a2dac136SStephen M. Cameron goto out; 2807a2dac136SStephen M. Cameron } 280825163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 280925163bd5SWebb Scales PCI_DMA_FROMDEVICE, NO_TIMEOUT); 281025163bd5SWebb Scales if (rc) 281125163bd5SWebb Scales goto out; 2812edd16368SStephen M. Cameron ei = c->err_info; 2813edd16368SStephen M. Cameron if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 2814d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 2815edd16368SStephen M. Cameron rc = -1; 2816edd16368SStephen M. Cameron } 2817a2dac136SStephen M. Cameron out: 281845fcb86eSStephen Cameron cmd_free(h, c); 2819edd16368SStephen M. Cameron return rc; 2820edd16368SStephen M. Cameron } 2821edd16368SStephen M. Cameron 2822bf711ac6SScott Teel static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr, 282325163bd5SWebb Scales u8 reset_type, int reply_queue) 2824edd16368SStephen M. Cameron { 2825edd16368SStephen M. Cameron int rc = IO_OK; 2826edd16368SStephen M. Cameron struct CommandList *c; 2827edd16368SStephen M. Cameron struct ErrorInfo *ei; 2828edd16368SStephen M. Cameron 282945fcb86eSStephen Cameron c = cmd_alloc(h); 2830edd16368SStephen M. Cameron 2831edd16368SStephen M. Cameron 2832a2dac136SStephen M. Cameron /* fill_cmd can't fail here, no data buffer to map. */ 28330b9b7b6eSScott Teel (void) fill_cmd(c, reset_type, h, NULL, 0, 0, 2834bf711ac6SScott Teel scsi3addr, TYPE_MSG); 283525163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT); 283625163bd5SWebb Scales if (rc) { 283725163bd5SWebb Scales dev_warn(&h->pdev->dev, "Failed to send reset command\n"); 283825163bd5SWebb Scales goto out; 283925163bd5SWebb Scales } 2840edd16368SStephen M. Cameron /* no unmap needed here because no data xfer. */ 2841edd16368SStephen M. Cameron 2842edd16368SStephen M. Cameron ei = c->err_info; 2843edd16368SStephen M. Cameron if (ei->CommandStatus != 0) { 2844d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 2845edd16368SStephen M. Cameron rc = -1; 2846edd16368SStephen M. Cameron } 284725163bd5SWebb Scales out: 284845fcb86eSStephen Cameron cmd_free(h, c); 2849edd16368SStephen M. Cameron return rc; 2850edd16368SStephen M. Cameron } 2851edd16368SStephen M. Cameron 2852d604f533SWebb Scales static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c, 2853d604f533SWebb Scales struct hpsa_scsi_dev_t *dev, 2854d604f533SWebb Scales unsigned char *scsi3addr) 2855d604f533SWebb Scales { 2856d604f533SWebb Scales int i; 2857d604f533SWebb Scales bool match = false; 2858d604f533SWebb Scales struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 2859d604f533SWebb Scales struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2; 2860d604f533SWebb Scales 2861d604f533SWebb Scales if (hpsa_is_cmd_idle(c)) 2862d604f533SWebb Scales return false; 2863d604f533SWebb Scales 2864d604f533SWebb Scales switch (c->cmd_type) { 2865d604f533SWebb Scales case CMD_SCSI: 2866d604f533SWebb Scales case CMD_IOCTL_PEND: 2867d604f533SWebb Scales match = !memcmp(scsi3addr, &c->Header.LUN.LunAddrBytes, 2868d604f533SWebb Scales sizeof(c->Header.LUN.LunAddrBytes)); 2869d604f533SWebb Scales break; 2870d604f533SWebb Scales 2871d604f533SWebb Scales case CMD_IOACCEL1: 2872d604f533SWebb Scales case CMD_IOACCEL2: 2873d604f533SWebb Scales if (c->phys_disk == dev) { 2874d604f533SWebb Scales /* HBA mode match */ 2875d604f533SWebb Scales match = true; 2876d604f533SWebb Scales } else { 2877d604f533SWebb Scales /* Possible RAID mode -- check each phys dev. */ 2878d604f533SWebb Scales /* FIXME: Do we need to take out a lock here? If 2879d604f533SWebb Scales * so, we could just call hpsa_get_pdisk_of_ioaccel2() 2880d604f533SWebb Scales * instead. */ 2881d604f533SWebb Scales for (i = 0; i < dev->nphysical_disks && !match; i++) { 2882d604f533SWebb Scales /* FIXME: an alternate test might be 2883d604f533SWebb Scales * 2884d604f533SWebb Scales * match = dev->phys_disk[i]->ioaccel_handle 2885d604f533SWebb Scales * == c2->scsi_nexus; */ 2886d604f533SWebb Scales match = dev->phys_disk[i] == c->phys_disk; 2887d604f533SWebb Scales } 2888d604f533SWebb Scales } 2889d604f533SWebb Scales break; 2890d604f533SWebb Scales 2891d604f533SWebb Scales case IOACCEL2_TMF: 2892d604f533SWebb Scales for (i = 0; i < dev->nphysical_disks && !match; i++) { 2893d604f533SWebb Scales match = dev->phys_disk[i]->ioaccel_handle == 2894d604f533SWebb Scales le32_to_cpu(ac->it_nexus); 2895d604f533SWebb Scales } 2896d604f533SWebb Scales break; 2897d604f533SWebb Scales 2898d604f533SWebb Scales case 0: /* The command is in the middle of being initialized. */ 2899d604f533SWebb Scales match = false; 2900d604f533SWebb Scales break; 2901d604f533SWebb Scales 2902d604f533SWebb Scales default: 2903d604f533SWebb Scales dev_err(&h->pdev->dev, "unexpected cmd_type: %d\n", 2904d604f533SWebb Scales c->cmd_type); 2905d604f533SWebb Scales BUG(); 2906d604f533SWebb Scales } 2907d604f533SWebb Scales 2908d604f533SWebb Scales return match; 2909d604f533SWebb Scales } 2910d604f533SWebb Scales 2911d604f533SWebb Scales static int hpsa_do_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev, 2912d604f533SWebb Scales unsigned char *scsi3addr, u8 reset_type, int reply_queue) 2913d604f533SWebb Scales { 2914d604f533SWebb Scales int i; 2915d604f533SWebb Scales int rc = 0; 2916d604f533SWebb Scales 2917d604f533SWebb Scales /* We can really only handle one reset at a time */ 2918d604f533SWebb Scales if (mutex_lock_interruptible(&h->reset_mutex) == -EINTR) { 2919d604f533SWebb Scales dev_warn(&h->pdev->dev, "concurrent reset wait interrupted.\n"); 2920d604f533SWebb Scales return -EINTR; 2921d604f533SWebb Scales } 2922d604f533SWebb Scales 2923d604f533SWebb Scales BUG_ON(atomic_read(&dev->reset_cmds_out) != 0); 2924d604f533SWebb Scales 2925d604f533SWebb Scales for (i = 0; i < h->nr_cmds; i++) { 2926d604f533SWebb Scales struct CommandList *c = h->cmd_pool + i; 2927d604f533SWebb Scales int refcount = atomic_inc_return(&c->refcount); 2928d604f533SWebb Scales 2929d604f533SWebb Scales if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, scsi3addr)) { 2930d604f533SWebb Scales unsigned long flags; 2931d604f533SWebb Scales 2932d604f533SWebb Scales /* 2933d604f533SWebb Scales * Mark the target command as having a reset pending, 2934d604f533SWebb Scales * then lock a lock so that the command cannot complete 2935d604f533SWebb Scales * while we're considering it. If the command is not 2936d604f533SWebb Scales * idle then count it; otherwise revoke the event. 2937d604f533SWebb Scales */ 2938d604f533SWebb Scales c->reset_pending = dev; 2939d604f533SWebb Scales spin_lock_irqsave(&h->lock, flags); /* Implied MB */ 2940d604f533SWebb Scales if (!hpsa_is_cmd_idle(c)) 2941d604f533SWebb Scales atomic_inc(&dev->reset_cmds_out); 2942d604f533SWebb Scales else 2943d604f533SWebb Scales c->reset_pending = NULL; 2944d604f533SWebb Scales spin_unlock_irqrestore(&h->lock, flags); 2945d604f533SWebb Scales } 2946d604f533SWebb Scales 2947d604f533SWebb Scales cmd_free(h, c); 2948d604f533SWebb Scales } 2949d604f533SWebb Scales 2950d604f533SWebb Scales rc = hpsa_send_reset(h, scsi3addr, reset_type, reply_queue); 2951d604f533SWebb Scales if (!rc) 2952d604f533SWebb Scales wait_event(h->event_sync_wait_queue, 2953d604f533SWebb Scales atomic_read(&dev->reset_cmds_out) == 0 || 2954d604f533SWebb Scales lockup_detected(h)); 2955d604f533SWebb Scales 2956d604f533SWebb Scales if (unlikely(lockup_detected(h))) { 2957d604f533SWebb Scales dev_warn(&h->pdev->dev, 2958d604f533SWebb Scales "Controller lockup detected during reset wait\n"); 2959d604f533SWebb Scales rc = -ENODEV; 2960d604f533SWebb Scales } 2961d604f533SWebb Scales 2962d604f533SWebb Scales if (unlikely(rc)) 2963d604f533SWebb Scales atomic_set(&dev->reset_cmds_out, 0); 2964d604f533SWebb Scales 2965d604f533SWebb Scales mutex_unlock(&h->reset_mutex); 2966d604f533SWebb Scales return rc; 2967d604f533SWebb Scales } 2968d604f533SWebb Scales 2969edd16368SStephen M. Cameron static void hpsa_get_raid_level(struct ctlr_info *h, 2970edd16368SStephen M. Cameron unsigned char *scsi3addr, unsigned char *raid_level) 2971edd16368SStephen M. Cameron { 2972edd16368SStephen M. Cameron int rc; 2973edd16368SStephen M. Cameron unsigned char *buf; 2974edd16368SStephen M. Cameron 2975edd16368SStephen M. Cameron *raid_level = RAID_UNKNOWN; 2976edd16368SStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 2977edd16368SStephen M. Cameron if (!buf) 2978edd16368SStephen M. Cameron return; 2979b7bb24ebSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 0xC1, buf, 64); 2980edd16368SStephen M. Cameron if (rc == 0) 2981edd16368SStephen M. Cameron *raid_level = buf[8]; 2982edd16368SStephen M. Cameron if (*raid_level > RAID_UNKNOWN) 2983edd16368SStephen M. Cameron *raid_level = RAID_UNKNOWN; 2984edd16368SStephen M. Cameron kfree(buf); 2985edd16368SStephen M. Cameron return; 2986edd16368SStephen M. Cameron } 2987edd16368SStephen M. Cameron 2988283b4a9bSStephen M. Cameron #define HPSA_MAP_DEBUG 2989283b4a9bSStephen M. Cameron #ifdef HPSA_MAP_DEBUG 2990283b4a9bSStephen M. Cameron static void hpsa_debug_map_buff(struct ctlr_info *h, int rc, 2991283b4a9bSStephen M. Cameron struct raid_map_data *map_buff) 2992283b4a9bSStephen M. Cameron { 2993283b4a9bSStephen M. Cameron struct raid_map_disk_data *dd = &map_buff->data[0]; 2994283b4a9bSStephen M. Cameron int map, row, col; 2995283b4a9bSStephen M. Cameron u16 map_cnt, row_cnt, disks_per_row; 2996283b4a9bSStephen M. Cameron 2997283b4a9bSStephen M. Cameron if (rc != 0) 2998283b4a9bSStephen M. Cameron return; 2999283b4a9bSStephen M. Cameron 30002ba8bfc8SStephen M. Cameron /* Show details only if debugging has been activated. */ 30012ba8bfc8SStephen M. Cameron if (h->raid_offload_debug < 2) 30022ba8bfc8SStephen M. Cameron return; 30032ba8bfc8SStephen M. Cameron 3004283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "structure_size = %u\n", 3005283b4a9bSStephen M. Cameron le32_to_cpu(map_buff->structure_size)); 3006283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "volume_blk_size = %u\n", 3007283b4a9bSStephen M. Cameron le32_to_cpu(map_buff->volume_blk_size)); 3008283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n", 3009283b4a9bSStephen M. Cameron le64_to_cpu(map_buff->volume_blk_cnt)); 3010283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "physicalBlockShift = %u\n", 3011283b4a9bSStephen M. Cameron map_buff->phys_blk_shift); 3012283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n", 3013283b4a9bSStephen M. Cameron map_buff->parity_rotation_shift); 3014283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "strip_size = %u\n", 3015283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->strip_size)); 3016283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n", 3017283b4a9bSStephen M. Cameron le64_to_cpu(map_buff->disk_starting_blk)); 3018283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n", 3019283b4a9bSStephen M. Cameron le64_to_cpu(map_buff->disk_blk_cnt)); 3020283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "data_disks_per_row = %u\n", 3021283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->data_disks_per_row)); 3022283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n", 3023283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->metadata_disks_per_row)); 3024283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "row_cnt = %u\n", 3025283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->row_cnt)); 3026283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "layout_map_count = %u\n", 3027283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->layout_map_count)); 30282b08b3e9SDon Brace dev_info(&h->pdev->dev, "flags = 0x%x\n", 3029dd0e19f3SScott Teel le16_to_cpu(map_buff->flags)); 30302b08b3e9SDon Brace dev_info(&h->pdev->dev, "encrypytion = %s\n", 30312b08b3e9SDon Brace le16_to_cpu(map_buff->flags) & 30322b08b3e9SDon Brace RAID_MAP_FLAG_ENCRYPT_ON ? "ON" : "OFF"); 3033dd0e19f3SScott Teel dev_info(&h->pdev->dev, "dekindex = %u\n", 3034dd0e19f3SScott Teel le16_to_cpu(map_buff->dekindex)); 3035283b4a9bSStephen M. Cameron map_cnt = le16_to_cpu(map_buff->layout_map_count); 3036283b4a9bSStephen M. Cameron for (map = 0; map < map_cnt; map++) { 3037283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "Map%u:\n", map); 3038283b4a9bSStephen M. Cameron row_cnt = le16_to_cpu(map_buff->row_cnt); 3039283b4a9bSStephen M. Cameron for (row = 0; row < row_cnt; row++) { 3040283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, " Row%u:\n", row); 3041283b4a9bSStephen M. Cameron disks_per_row = 3042283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->data_disks_per_row); 3043283b4a9bSStephen M. Cameron for (col = 0; col < disks_per_row; col++, dd++) 3044283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, 3045283b4a9bSStephen M. Cameron " D%02u: h=0x%04x xor=%u,%u\n", 3046283b4a9bSStephen M. Cameron col, dd->ioaccel_handle, 3047283b4a9bSStephen M. Cameron dd->xor_mult[0], dd->xor_mult[1]); 3048283b4a9bSStephen M. Cameron disks_per_row = 3049283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->metadata_disks_per_row); 3050283b4a9bSStephen M. Cameron for (col = 0; col < disks_per_row; col++, dd++) 3051283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, 3052283b4a9bSStephen M. Cameron " M%02u: h=0x%04x xor=%u,%u\n", 3053283b4a9bSStephen M. Cameron col, dd->ioaccel_handle, 3054283b4a9bSStephen M. Cameron dd->xor_mult[0], dd->xor_mult[1]); 3055283b4a9bSStephen M. Cameron } 3056283b4a9bSStephen M. Cameron } 3057283b4a9bSStephen M. Cameron } 3058283b4a9bSStephen M. Cameron #else 3059283b4a9bSStephen M. Cameron static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h, 3060283b4a9bSStephen M. Cameron __attribute__((unused)) int rc, 3061283b4a9bSStephen M. Cameron __attribute__((unused)) struct raid_map_data *map_buff) 3062283b4a9bSStephen M. Cameron { 3063283b4a9bSStephen M. Cameron } 3064283b4a9bSStephen M. Cameron #endif 3065283b4a9bSStephen M. Cameron 3066283b4a9bSStephen M. Cameron static int hpsa_get_raid_map(struct ctlr_info *h, 3067283b4a9bSStephen M. Cameron unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device) 3068283b4a9bSStephen M. Cameron { 3069283b4a9bSStephen M. Cameron int rc = 0; 3070283b4a9bSStephen M. Cameron struct CommandList *c; 3071283b4a9bSStephen M. Cameron struct ErrorInfo *ei; 3072283b4a9bSStephen M. Cameron 307345fcb86eSStephen Cameron c = cmd_alloc(h); 3074bf43caf3SRobert Elliott 3075283b4a9bSStephen M. Cameron if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map, 3076283b4a9bSStephen M. Cameron sizeof(this_device->raid_map), 0, 3077283b4a9bSStephen M. Cameron scsi3addr, TYPE_CMD)) { 30782dd02d74SRobert Elliott dev_warn(&h->pdev->dev, "hpsa_get_raid_map fill_cmd failed\n"); 30792dd02d74SRobert Elliott cmd_free(h, c); 30802dd02d74SRobert Elliott return -1; 3081283b4a9bSStephen M. Cameron } 308225163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 308325163bd5SWebb Scales PCI_DMA_FROMDEVICE, NO_TIMEOUT); 308425163bd5SWebb Scales if (rc) 308525163bd5SWebb Scales goto out; 3086283b4a9bSStephen M. Cameron ei = c->err_info; 3087283b4a9bSStephen M. Cameron if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3088d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 308925163bd5SWebb Scales rc = -1; 309025163bd5SWebb Scales goto out; 3091283b4a9bSStephen M. Cameron } 309245fcb86eSStephen Cameron cmd_free(h, c); 3093283b4a9bSStephen M. Cameron 3094283b4a9bSStephen M. Cameron /* @todo in the future, dynamically allocate RAID map memory */ 3095283b4a9bSStephen M. Cameron if (le32_to_cpu(this_device->raid_map.structure_size) > 3096283b4a9bSStephen M. Cameron sizeof(this_device->raid_map)) { 3097283b4a9bSStephen M. Cameron dev_warn(&h->pdev->dev, "RAID map size is too large!\n"); 3098283b4a9bSStephen M. Cameron rc = -1; 3099283b4a9bSStephen M. Cameron } 3100283b4a9bSStephen M. Cameron hpsa_debug_map_buff(h, rc, &this_device->raid_map); 3101283b4a9bSStephen M. Cameron return rc; 310225163bd5SWebb Scales out: 310325163bd5SWebb Scales cmd_free(h, c); 310425163bd5SWebb Scales return rc; 3105283b4a9bSStephen M. Cameron } 3106283b4a9bSStephen M. Cameron 3107d04e62b9SKevin Barnett static int hpsa_bmic_sense_subsystem_information(struct ctlr_info *h, 3108d04e62b9SKevin Barnett unsigned char scsi3addr[], u16 bmic_device_index, 3109d04e62b9SKevin Barnett struct bmic_sense_subsystem_info *buf, size_t bufsize) 3110d04e62b9SKevin Barnett { 3111d04e62b9SKevin Barnett int rc = IO_OK; 3112d04e62b9SKevin Barnett struct CommandList *c; 3113d04e62b9SKevin Barnett struct ErrorInfo *ei; 3114d04e62b9SKevin Barnett 3115d04e62b9SKevin Barnett c = cmd_alloc(h); 3116d04e62b9SKevin Barnett 3117d04e62b9SKevin Barnett rc = fill_cmd(c, BMIC_SENSE_SUBSYSTEM_INFORMATION, h, buf, bufsize, 3118d04e62b9SKevin Barnett 0, RAID_CTLR_LUNID, TYPE_CMD); 3119d04e62b9SKevin Barnett if (rc) 3120d04e62b9SKevin Barnett goto out; 3121d04e62b9SKevin Barnett 3122d04e62b9SKevin Barnett c->Request.CDB[2] = bmic_device_index & 0xff; 3123d04e62b9SKevin Barnett c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff; 3124d04e62b9SKevin Barnett 3125d04e62b9SKevin Barnett rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3126d04e62b9SKevin Barnett PCI_DMA_FROMDEVICE, NO_TIMEOUT); 3127d04e62b9SKevin Barnett if (rc) 3128d04e62b9SKevin Barnett goto out; 3129d04e62b9SKevin Barnett ei = c->err_info; 3130d04e62b9SKevin Barnett if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3131d04e62b9SKevin Barnett hpsa_scsi_interpret_error(h, c); 3132d04e62b9SKevin Barnett rc = -1; 3133d04e62b9SKevin Barnett } 3134d04e62b9SKevin Barnett out: 3135d04e62b9SKevin Barnett cmd_free(h, c); 3136d04e62b9SKevin Barnett return rc; 3137d04e62b9SKevin Barnett } 3138d04e62b9SKevin Barnett 313966749d0dSScott Teel static int hpsa_bmic_id_controller(struct ctlr_info *h, 314066749d0dSScott Teel struct bmic_identify_controller *buf, size_t bufsize) 314166749d0dSScott Teel { 314266749d0dSScott Teel int rc = IO_OK; 314366749d0dSScott Teel struct CommandList *c; 314466749d0dSScott Teel struct ErrorInfo *ei; 314566749d0dSScott Teel 314666749d0dSScott Teel c = cmd_alloc(h); 314766749d0dSScott Teel 314866749d0dSScott Teel rc = fill_cmd(c, BMIC_IDENTIFY_CONTROLLER, h, buf, bufsize, 314966749d0dSScott Teel 0, RAID_CTLR_LUNID, TYPE_CMD); 315066749d0dSScott Teel if (rc) 315166749d0dSScott Teel goto out; 315266749d0dSScott Teel 315366749d0dSScott Teel rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 315466749d0dSScott Teel PCI_DMA_FROMDEVICE, NO_TIMEOUT); 315566749d0dSScott Teel if (rc) 315666749d0dSScott Teel goto out; 315766749d0dSScott Teel ei = c->err_info; 315866749d0dSScott Teel if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 315966749d0dSScott Teel hpsa_scsi_interpret_error(h, c); 316066749d0dSScott Teel rc = -1; 316166749d0dSScott Teel } 316266749d0dSScott Teel out: 316366749d0dSScott Teel cmd_free(h, c); 316466749d0dSScott Teel return rc; 316566749d0dSScott Teel } 316666749d0dSScott Teel 316703383736SDon Brace static int hpsa_bmic_id_physical_device(struct ctlr_info *h, 316803383736SDon Brace unsigned char scsi3addr[], u16 bmic_device_index, 316903383736SDon Brace struct bmic_identify_physical_device *buf, size_t bufsize) 317003383736SDon Brace { 317103383736SDon Brace int rc = IO_OK; 317203383736SDon Brace struct CommandList *c; 317303383736SDon Brace struct ErrorInfo *ei; 317403383736SDon Brace 317503383736SDon Brace c = cmd_alloc(h); 317603383736SDon Brace rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize, 317703383736SDon Brace 0, RAID_CTLR_LUNID, TYPE_CMD); 317803383736SDon Brace if (rc) 317903383736SDon Brace goto out; 318003383736SDon Brace 318103383736SDon Brace c->Request.CDB[2] = bmic_device_index & 0xff; 318203383736SDon Brace c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff; 318303383736SDon Brace 318425163bd5SWebb Scales hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE, 318525163bd5SWebb Scales NO_TIMEOUT); 318603383736SDon Brace ei = c->err_info; 318703383736SDon Brace if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 318803383736SDon Brace hpsa_scsi_interpret_error(h, c); 318903383736SDon Brace rc = -1; 319003383736SDon Brace } 319103383736SDon Brace out: 319203383736SDon Brace cmd_free(h, c); 3193d04e62b9SKevin Barnett 319403383736SDon Brace return rc; 319503383736SDon Brace } 319603383736SDon Brace 3197cca8f13bSDon Brace /* 3198cca8f13bSDon Brace * get enclosure information 3199cca8f13bSDon Brace * struct ReportExtendedLUNdata *rlep - Used for BMIC drive number 3200cca8f13bSDon Brace * struct hpsa_scsi_dev_t *encl_dev - device entry for enclosure 3201cca8f13bSDon Brace * Uses id_physical_device to determine the box_index. 3202cca8f13bSDon Brace */ 3203cca8f13bSDon Brace static void hpsa_get_enclosure_info(struct ctlr_info *h, 3204cca8f13bSDon Brace unsigned char *scsi3addr, 3205cca8f13bSDon Brace struct ReportExtendedLUNdata *rlep, int rle_index, 3206cca8f13bSDon Brace struct hpsa_scsi_dev_t *encl_dev) 3207cca8f13bSDon Brace { 3208cca8f13bSDon Brace int rc = -1; 3209cca8f13bSDon Brace struct CommandList *c = NULL; 3210cca8f13bSDon Brace struct ErrorInfo *ei = NULL; 3211cca8f13bSDon Brace struct bmic_sense_storage_box_params *bssbp = NULL; 3212cca8f13bSDon Brace struct bmic_identify_physical_device *id_phys = NULL; 3213cca8f13bSDon Brace struct ext_report_lun_entry *rle = &rlep->LUN[rle_index]; 3214cca8f13bSDon Brace u16 bmic_device_index = 0; 3215cca8f13bSDon Brace 3216cca8f13bSDon Brace bmic_device_index = GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]); 3217cca8f13bSDon Brace 321817a9e54aSDon Brace if (bmic_device_index == 0xFF00 || MASKED_DEVICE(&rle->lunid[0])) { 321917a9e54aSDon Brace rc = IO_OK; 3220cca8f13bSDon Brace goto out; 322117a9e54aSDon Brace } 3222cca8f13bSDon Brace 3223cca8f13bSDon Brace bssbp = kzalloc(sizeof(*bssbp), GFP_KERNEL); 3224cca8f13bSDon Brace if (!bssbp) 3225cca8f13bSDon Brace goto out; 3226cca8f13bSDon Brace 3227cca8f13bSDon Brace id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 3228cca8f13bSDon Brace if (!id_phys) 3229cca8f13bSDon Brace goto out; 3230cca8f13bSDon Brace 3231cca8f13bSDon Brace rc = hpsa_bmic_id_physical_device(h, scsi3addr, bmic_device_index, 3232cca8f13bSDon Brace id_phys, sizeof(*id_phys)); 3233cca8f13bSDon Brace if (rc) { 3234cca8f13bSDon Brace dev_warn(&h->pdev->dev, "%s: id_phys failed %d bdi[0x%x]\n", 3235cca8f13bSDon Brace __func__, encl_dev->external, bmic_device_index); 3236cca8f13bSDon Brace goto out; 3237cca8f13bSDon Brace } 3238cca8f13bSDon Brace 3239cca8f13bSDon Brace c = cmd_alloc(h); 3240cca8f13bSDon Brace 3241cca8f13bSDon Brace rc = fill_cmd(c, BMIC_SENSE_STORAGE_BOX_PARAMS, h, bssbp, 3242cca8f13bSDon Brace sizeof(*bssbp), 0, RAID_CTLR_LUNID, TYPE_CMD); 3243cca8f13bSDon Brace 3244cca8f13bSDon Brace if (rc) 3245cca8f13bSDon Brace goto out; 3246cca8f13bSDon Brace 3247cca8f13bSDon Brace if (id_phys->phys_connector[1] == 'E') 3248cca8f13bSDon Brace c->Request.CDB[5] = id_phys->box_index; 3249cca8f13bSDon Brace else 3250cca8f13bSDon Brace c->Request.CDB[5] = 0; 3251cca8f13bSDon Brace 3252cca8f13bSDon Brace rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE, 3253cca8f13bSDon Brace NO_TIMEOUT); 3254cca8f13bSDon Brace if (rc) 3255cca8f13bSDon Brace goto out; 3256cca8f13bSDon Brace 3257cca8f13bSDon Brace ei = c->err_info; 3258cca8f13bSDon Brace if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3259cca8f13bSDon Brace rc = -1; 3260cca8f13bSDon Brace goto out; 3261cca8f13bSDon Brace } 3262cca8f13bSDon Brace 3263cca8f13bSDon Brace encl_dev->box[id_phys->active_path_number] = bssbp->phys_box_on_port; 3264cca8f13bSDon Brace memcpy(&encl_dev->phys_connector[id_phys->active_path_number], 3265cca8f13bSDon Brace bssbp->phys_connector, sizeof(bssbp->phys_connector)); 3266cca8f13bSDon Brace 3267cca8f13bSDon Brace rc = IO_OK; 3268cca8f13bSDon Brace out: 3269cca8f13bSDon Brace kfree(bssbp); 3270cca8f13bSDon Brace kfree(id_phys); 3271cca8f13bSDon Brace 3272cca8f13bSDon Brace if (c) 3273cca8f13bSDon Brace cmd_free(h, c); 3274cca8f13bSDon Brace 3275cca8f13bSDon Brace if (rc != IO_OK) 3276cca8f13bSDon Brace hpsa_show_dev_msg(KERN_INFO, h, encl_dev, 3277cca8f13bSDon Brace "Error, could not get enclosure information\n"); 3278cca8f13bSDon Brace } 3279cca8f13bSDon Brace 3280d04e62b9SKevin Barnett static u64 hpsa_get_sas_address_from_report_physical(struct ctlr_info *h, 3281d04e62b9SKevin Barnett unsigned char *scsi3addr) 3282d04e62b9SKevin Barnett { 3283d04e62b9SKevin Barnett struct ReportExtendedLUNdata *physdev; 3284d04e62b9SKevin Barnett u32 nphysicals; 3285d04e62b9SKevin Barnett u64 sa = 0; 3286d04e62b9SKevin Barnett int i; 3287d04e62b9SKevin Barnett 3288d04e62b9SKevin Barnett physdev = kzalloc(sizeof(*physdev), GFP_KERNEL); 3289d04e62b9SKevin Barnett if (!physdev) 3290d04e62b9SKevin Barnett return 0; 3291d04e62b9SKevin Barnett 3292d04e62b9SKevin Barnett if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) { 3293d04e62b9SKevin Barnett dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 3294d04e62b9SKevin Barnett kfree(physdev); 3295d04e62b9SKevin Barnett return 0; 3296d04e62b9SKevin Barnett } 3297d04e62b9SKevin Barnett nphysicals = get_unaligned_be32(physdev->LUNListLength) / 24; 3298d04e62b9SKevin Barnett 3299d04e62b9SKevin Barnett for (i = 0; i < nphysicals; i++) 3300d04e62b9SKevin Barnett if (!memcmp(&physdev->LUN[i].lunid[0], scsi3addr, 8)) { 3301d04e62b9SKevin Barnett sa = get_unaligned_be64(&physdev->LUN[i].wwid[0]); 3302d04e62b9SKevin Barnett break; 3303d04e62b9SKevin Barnett } 3304d04e62b9SKevin Barnett 3305d04e62b9SKevin Barnett kfree(physdev); 3306d04e62b9SKevin Barnett 3307d04e62b9SKevin Barnett return sa; 3308d04e62b9SKevin Barnett } 3309d04e62b9SKevin Barnett 3310d04e62b9SKevin Barnett static void hpsa_get_sas_address(struct ctlr_info *h, unsigned char *scsi3addr, 3311d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *dev) 3312d04e62b9SKevin Barnett { 3313d04e62b9SKevin Barnett int rc; 3314d04e62b9SKevin Barnett u64 sa = 0; 3315d04e62b9SKevin Barnett 3316d04e62b9SKevin Barnett if (is_hba_lunid(scsi3addr)) { 3317d04e62b9SKevin Barnett struct bmic_sense_subsystem_info *ssi; 3318d04e62b9SKevin Barnett 3319d04e62b9SKevin Barnett ssi = kzalloc(sizeof(*ssi), GFP_KERNEL); 3320d04e62b9SKevin Barnett if (ssi == NULL) { 3321d04e62b9SKevin Barnett dev_warn(&h->pdev->dev, 3322d04e62b9SKevin Barnett "%s: out of memory\n", __func__); 3323d04e62b9SKevin Barnett return; 3324d04e62b9SKevin Barnett } 3325d04e62b9SKevin Barnett 3326d04e62b9SKevin Barnett rc = hpsa_bmic_sense_subsystem_information(h, 3327d04e62b9SKevin Barnett scsi3addr, 0, ssi, sizeof(*ssi)); 3328d04e62b9SKevin Barnett if (rc == 0) { 3329d04e62b9SKevin Barnett sa = get_unaligned_be64(ssi->primary_world_wide_id); 3330d04e62b9SKevin Barnett h->sas_address = sa; 3331d04e62b9SKevin Barnett } 3332d04e62b9SKevin Barnett 3333d04e62b9SKevin Barnett kfree(ssi); 3334d04e62b9SKevin Barnett } else 3335d04e62b9SKevin Barnett sa = hpsa_get_sas_address_from_report_physical(h, scsi3addr); 3336d04e62b9SKevin Barnett 3337d04e62b9SKevin Barnett dev->sas_address = sa; 3338d04e62b9SKevin Barnett } 3339d04e62b9SKevin Barnett 3340d04e62b9SKevin Barnett /* Get a device id from inquiry page 0x83 */ 33411b70150aSStephen M. Cameron static int hpsa_vpd_page_supported(struct ctlr_info *h, 33421b70150aSStephen M. Cameron unsigned char scsi3addr[], u8 page) 33431b70150aSStephen M. Cameron { 33441b70150aSStephen M. Cameron int rc; 33451b70150aSStephen M. Cameron int i; 33461b70150aSStephen M. Cameron int pages; 33471b70150aSStephen M. Cameron unsigned char *buf, bufsize; 33481b70150aSStephen M. Cameron 33491b70150aSStephen M. Cameron buf = kzalloc(256, GFP_KERNEL); 33501b70150aSStephen M. Cameron if (!buf) 33511b70150aSStephen M. Cameron return 0; 33521b70150aSStephen M. Cameron 33531b70150aSStephen M. Cameron /* Get the size of the page list first */ 33541b70150aSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, 33551b70150aSStephen M. Cameron VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES, 33561b70150aSStephen M. Cameron buf, HPSA_VPD_HEADER_SZ); 33571b70150aSStephen M. Cameron if (rc != 0) 33581b70150aSStephen M. Cameron goto exit_unsupported; 33591b70150aSStephen M. Cameron pages = buf[3]; 33601b70150aSStephen M. Cameron if ((pages + HPSA_VPD_HEADER_SZ) <= 255) 33611b70150aSStephen M. Cameron bufsize = pages + HPSA_VPD_HEADER_SZ; 33621b70150aSStephen M. Cameron else 33631b70150aSStephen M. Cameron bufsize = 255; 33641b70150aSStephen M. Cameron 33651b70150aSStephen M. Cameron /* Get the whole VPD page list */ 33661b70150aSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, 33671b70150aSStephen M. Cameron VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES, 33681b70150aSStephen M. Cameron buf, bufsize); 33691b70150aSStephen M. Cameron if (rc != 0) 33701b70150aSStephen M. Cameron goto exit_unsupported; 33711b70150aSStephen M. Cameron 33721b70150aSStephen M. Cameron pages = buf[3]; 33731b70150aSStephen M. Cameron for (i = 1; i <= pages; i++) 33741b70150aSStephen M. Cameron if (buf[3 + i] == page) 33751b70150aSStephen M. Cameron goto exit_supported; 33761b70150aSStephen M. Cameron exit_unsupported: 33771b70150aSStephen M. Cameron kfree(buf); 33781b70150aSStephen M. Cameron return 0; 33791b70150aSStephen M. Cameron exit_supported: 33801b70150aSStephen M. Cameron kfree(buf); 33811b70150aSStephen M. Cameron return 1; 33821b70150aSStephen M. Cameron } 33831b70150aSStephen M. Cameron 3384283b4a9bSStephen M. Cameron static void hpsa_get_ioaccel_status(struct ctlr_info *h, 3385283b4a9bSStephen M. Cameron unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device) 3386283b4a9bSStephen M. Cameron { 3387283b4a9bSStephen M. Cameron int rc; 3388283b4a9bSStephen M. Cameron unsigned char *buf; 3389283b4a9bSStephen M. Cameron u8 ioaccel_status; 3390283b4a9bSStephen M. Cameron 3391283b4a9bSStephen M. Cameron this_device->offload_config = 0; 3392283b4a9bSStephen M. Cameron this_device->offload_enabled = 0; 339341ce4c35SStephen Cameron this_device->offload_to_be_enabled = 0; 3394283b4a9bSStephen M. Cameron 3395283b4a9bSStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 3396283b4a9bSStephen M. Cameron if (!buf) 3397283b4a9bSStephen M. Cameron return; 33981b70150aSStephen M. Cameron if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS)) 33991b70150aSStephen M. Cameron goto out; 3400283b4a9bSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, 3401b7bb24ebSStephen M. Cameron VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64); 3402283b4a9bSStephen M. Cameron if (rc != 0) 3403283b4a9bSStephen M. Cameron goto out; 3404283b4a9bSStephen M. Cameron 3405283b4a9bSStephen M. Cameron #define IOACCEL_STATUS_BYTE 4 3406283b4a9bSStephen M. Cameron #define OFFLOAD_CONFIGURED_BIT 0x01 3407283b4a9bSStephen M. Cameron #define OFFLOAD_ENABLED_BIT 0x02 3408283b4a9bSStephen M. Cameron ioaccel_status = buf[IOACCEL_STATUS_BYTE]; 3409283b4a9bSStephen M. Cameron this_device->offload_config = 3410283b4a9bSStephen M. Cameron !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT); 3411283b4a9bSStephen M. Cameron if (this_device->offload_config) { 3412283b4a9bSStephen M. Cameron this_device->offload_enabled = 3413283b4a9bSStephen M. Cameron !!(ioaccel_status & OFFLOAD_ENABLED_BIT); 3414283b4a9bSStephen M. Cameron if (hpsa_get_raid_map(h, scsi3addr, this_device)) 3415283b4a9bSStephen M. Cameron this_device->offload_enabled = 0; 3416283b4a9bSStephen M. Cameron } 341741ce4c35SStephen Cameron this_device->offload_to_be_enabled = this_device->offload_enabled; 3418283b4a9bSStephen M. Cameron out: 3419283b4a9bSStephen M. Cameron kfree(buf); 3420283b4a9bSStephen M. Cameron return; 3421283b4a9bSStephen M. Cameron } 3422283b4a9bSStephen M. Cameron 3423edd16368SStephen M. Cameron /* Get the device id from inquiry page 0x83 */ 3424edd16368SStephen M. Cameron static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr, 342575d23d89SDon Brace unsigned char *device_id, int index, int buflen) 3426edd16368SStephen M. Cameron { 3427edd16368SStephen M. Cameron int rc; 3428edd16368SStephen M. Cameron unsigned char *buf; 3429edd16368SStephen M. Cameron 3430edd16368SStephen M. Cameron if (buflen > 16) 3431edd16368SStephen M. Cameron buflen = 16; 3432edd16368SStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 3433edd16368SStephen M. Cameron if (!buf) 3434a84d794dSStephen M. Cameron return -ENOMEM; 3435b7bb24ebSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 0x83, buf, 64); 3436edd16368SStephen M. Cameron if (rc == 0) 343775d23d89SDon Brace memcpy(device_id, &buf[index], buflen); 343875d23d89SDon Brace 3439edd16368SStephen M. Cameron kfree(buf); 344075d23d89SDon Brace 3441edd16368SStephen M. Cameron return rc != 0; 3442edd16368SStephen M. Cameron } 3443edd16368SStephen M. Cameron 3444edd16368SStephen M. Cameron static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical, 344503383736SDon Brace void *buf, int bufsize, 3446edd16368SStephen M. Cameron int extended_response) 3447edd16368SStephen M. Cameron { 3448edd16368SStephen M. Cameron int rc = IO_OK; 3449edd16368SStephen M. Cameron struct CommandList *c; 3450edd16368SStephen M. Cameron unsigned char scsi3addr[8]; 3451edd16368SStephen M. Cameron struct ErrorInfo *ei; 3452edd16368SStephen M. Cameron 345345fcb86eSStephen Cameron c = cmd_alloc(h); 3454bf43caf3SRobert Elliott 3455e89c0ae7SStephen M. Cameron /* address the controller */ 3456e89c0ae7SStephen M. Cameron memset(scsi3addr, 0, sizeof(scsi3addr)); 3457a2dac136SStephen M. Cameron if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h, 3458a2dac136SStephen M. Cameron buf, bufsize, 0, scsi3addr, TYPE_CMD)) { 3459a2dac136SStephen M. Cameron rc = -1; 3460a2dac136SStephen M. Cameron goto out; 3461a2dac136SStephen M. Cameron } 3462edd16368SStephen M. Cameron if (extended_response) 3463edd16368SStephen M. Cameron c->Request.CDB[1] = extended_response; 346425163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 346525163bd5SWebb Scales PCI_DMA_FROMDEVICE, NO_TIMEOUT); 346625163bd5SWebb Scales if (rc) 346725163bd5SWebb Scales goto out; 3468edd16368SStephen M. Cameron ei = c->err_info; 3469edd16368SStephen M. Cameron if (ei->CommandStatus != 0 && 3470edd16368SStephen M. Cameron ei->CommandStatus != CMD_DATA_UNDERRUN) { 3471d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 3472edd16368SStephen M. Cameron rc = -1; 3473283b4a9bSStephen M. Cameron } else { 347403383736SDon Brace struct ReportLUNdata *rld = buf; 347503383736SDon Brace 347603383736SDon Brace if (rld->extended_response_flag != extended_response) { 3477283b4a9bSStephen M. Cameron dev_err(&h->pdev->dev, 3478283b4a9bSStephen M. Cameron "report luns requested format %u, got %u\n", 3479283b4a9bSStephen M. Cameron extended_response, 348003383736SDon Brace rld->extended_response_flag); 3481283b4a9bSStephen M. Cameron rc = -1; 3482283b4a9bSStephen M. Cameron } 3483edd16368SStephen M. Cameron } 3484a2dac136SStephen M. Cameron out: 348545fcb86eSStephen Cameron cmd_free(h, c); 3486edd16368SStephen M. Cameron return rc; 3487edd16368SStephen M. Cameron } 3488edd16368SStephen M. Cameron 3489edd16368SStephen M. Cameron static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 349003383736SDon Brace struct ReportExtendedLUNdata *buf, int bufsize) 3491edd16368SStephen M. Cameron { 349203383736SDon Brace return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, 349303383736SDon Brace HPSA_REPORT_PHYS_EXTENDED); 3494edd16368SStephen M. Cameron } 3495edd16368SStephen M. Cameron 3496edd16368SStephen M. Cameron static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h, 3497edd16368SStephen M. Cameron struct ReportLUNdata *buf, int bufsize) 3498edd16368SStephen M. Cameron { 3499edd16368SStephen M. Cameron return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0); 3500edd16368SStephen M. Cameron } 3501edd16368SStephen M. Cameron 3502edd16368SStephen M. Cameron static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device, 3503edd16368SStephen M. Cameron int bus, int target, int lun) 3504edd16368SStephen M. Cameron { 3505edd16368SStephen M. Cameron device->bus = bus; 3506edd16368SStephen M. Cameron device->target = target; 3507edd16368SStephen M. Cameron device->lun = lun; 3508edd16368SStephen M. Cameron } 3509edd16368SStephen M. Cameron 35109846590eSStephen M. Cameron /* Use VPD inquiry to get details of volume status */ 35119846590eSStephen M. Cameron static int hpsa_get_volume_status(struct ctlr_info *h, 35129846590eSStephen M. Cameron unsigned char scsi3addr[]) 35139846590eSStephen M. Cameron { 35149846590eSStephen M. Cameron int rc; 35159846590eSStephen M. Cameron int status; 35169846590eSStephen M. Cameron int size; 35179846590eSStephen M. Cameron unsigned char *buf; 35189846590eSStephen M. Cameron 35199846590eSStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 35209846590eSStephen M. Cameron if (!buf) 35219846590eSStephen M. Cameron return HPSA_VPD_LV_STATUS_UNSUPPORTED; 35229846590eSStephen M. Cameron 35239846590eSStephen M. Cameron /* Does controller have VPD for logical volume status? */ 352424a4b078SStephen M. Cameron if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS)) 35259846590eSStephen M. Cameron goto exit_failed; 35269846590eSStephen M. Cameron 35279846590eSStephen M. Cameron /* Get the size of the VPD return buffer */ 35289846590eSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS, 35299846590eSStephen M. Cameron buf, HPSA_VPD_HEADER_SZ); 353024a4b078SStephen M. Cameron if (rc != 0) 35319846590eSStephen M. Cameron goto exit_failed; 35329846590eSStephen M. Cameron size = buf[3]; 35339846590eSStephen M. Cameron 35349846590eSStephen M. Cameron /* Now get the whole VPD buffer */ 35359846590eSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS, 35369846590eSStephen M. Cameron buf, size + HPSA_VPD_HEADER_SZ); 353724a4b078SStephen M. Cameron if (rc != 0) 35389846590eSStephen M. Cameron goto exit_failed; 35399846590eSStephen M. Cameron status = buf[4]; /* status byte */ 35409846590eSStephen M. Cameron 35419846590eSStephen M. Cameron kfree(buf); 35429846590eSStephen M. Cameron return status; 35439846590eSStephen M. Cameron exit_failed: 35449846590eSStephen M. Cameron kfree(buf); 35459846590eSStephen M. Cameron return HPSA_VPD_LV_STATUS_UNSUPPORTED; 35469846590eSStephen M. Cameron } 35479846590eSStephen M. Cameron 35489846590eSStephen M. Cameron /* Determine offline status of a volume. 35499846590eSStephen M. Cameron * Return either: 35509846590eSStephen M. Cameron * 0 (not offline) 355167955ba3SStephen M. Cameron * 0xff (offline for unknown reasons) 35529846590eSStephen M. Cameron * # (integer code indicating one of several NOT READY states 35539846590eSStephen M. Cameron * describing why a volume is to be kept offline) 35549846590eSStephen M. Cameron */ 355567955ba3SStephen M. Cameron static int hpsa_volume_offline(struct ctlr_info *h, 35569846590eSStephen M. Cameron unsigned char scsi3addr[]) 35579846590eSStephen M. Cameron { 35589846590eSStephen M. Cameron struct CommandList *c; 35599437ac43SStephen Cameron unsigned char *sense; 35609437ac43SStephen Cameron u8 sense_key, asc, ascq; 35619437ac43SStephen Cameron int sense_len; 356225163bd5SWebb Scales int rc, ldstat = 0; 35639846590eSStephen M. Cameron u16 cmd_status; 35649846590eSStephen M. Cameron u8 scsi_status; 35659846590eSStephen M. Cameron #define ASC_LUN_NOT_READY 0x04 35669846590eSStephen M. Cameron #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04 35679846590eSStephen M. Cameron #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02 35689846590eSStephen M. Cameron 35699846590eSStephen M. Cameron c = cmd_alloc(h); 3570bf43caf3SRobert Elliott 35719846590eSStephen M. Cameron (void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD); 357225163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT); 357325163bd5SWebb Scales if (rc) { 357425163bd5SWebb Scales cmd_free(h, c); 357525163bd5SWebb Scales return 0; 357625163bd5SWebb Scales } 35779846590eSStephen M. Cameron sense = c->err_info->SenseInfo; 35789437ac43SStephen Cameron if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo)) 35799437ac43SStephen Cameron sense_len = sizeof(c->err_info->SenseInfo); 35809437ac43SStephen Cameron else 35819437ac43SStephen Cameron sense_len = c->err_info->SenseLen; 35829437ac43SStephen Cameron decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq); 35839846590eSStephen M. Cameron cmd_status = c->err_info->CommandStatus; 35849846590eSStephen M. Cameron scsi_status = c->err_info->ScsiStatus; 35859846590eSStephen M. Cameron cmd_free(h, c); 35869846590eSStephen M. Cameron /* Is the volume 'not ready'? */ 35879846590eSStephen M. Cameron if (cmd_status != CMD_TARGET_STATUS || 35889846590eSStephen M. Cameron scsi_status != SAM_STAT_CHECK_CONDITION || 35899846590eSStephen M. Cameron sense_key != NOT_READY || 35909846590eSStephen M. Cameron asc != ASC_LUN_NOT_READY) { 35919846590eSStephen M. Cameron return 0; 35929846590eSStephen M. Cameron } 35939846590eSStephen M. Cameron 35949846590eSStephen M. Cameron /* Determine the reason for not ready state */ 35959846590eSStephen M. Cameron ldstat = hpsa_get_volume_status(h, scsi3addr); 35969846590eSStephen M. Cameron 35979846590eSStephen M. Cameron /* Keep volume offline in certain cases: */ 35989846590eSStephen M. Cameron switch (ldstat) { 35999846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ERASE: 36005ca01204SScott Benesh case HPSA_LV_NOT_AVAILABLE: 36019846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_RPI: 36029846590eSStephen M. Cameron case HPSA_LV_PENDING_RPI: 36039846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_NO_KEY: 36049846590eSStephen M. Cameron case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER: 36059846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION: 36069846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING: 36079846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 36089846590eSStephen M. Cameron return ldstat; 36099846590eSStephen M. Cameron case HPSA_VPD_LV_STATUS_UNSUPPORTED: 36109846590eSStephen M. Cameron /* If VPD status page isn't available, 36119846590eSStephen M. Cameron * use ASC/ASCQ to determine state 36129846590eSStephen M. Cameron */ 36139846590eSStephen M. Cameron if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) || 36149846590eSStephen M. Cameron (ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ)) 36159846590eSStephen M. Cameron return ldstat; 36169846590eSStephen M. Cameron break; 36179846590eSStephen M. Cameron default: 36189846590eSStephen M. Cameron break; 36199846590eSStephen M. Cameron } 36209846590eSStephen M. Cameron return 0; 36219846590eSStephen M. Cameron } 36229846590eSStephen M. Cameron 36239b5c48c2SStephen Cameron /* 36249b5c48c2SStephen Cameron * Find out if a logical device supports aborts by simply trying one. 36259b5c48c2SStephen Cameron * Smart Array may claim not to support aborts on logical drives, but 36269b5c48c2SStephen Cameron * if a MSA2000 * is connected, the drives on that will be presented 36279b5c48c2SStephen Cameron * by the Smart Array as logical drives, and aborts may be sent to 36289b5c48c2SStephen Cameron * those devices successfully. So the simplest way to find out is 36299b5c48c2SStephen Cameron * to simply try an abort and see how the device responds. 36309b5c48c2SStephen Cameron */ 36319b5c48c2SStephen Cameron static int hpsa_device_supports_aborts(struct ctlr_info *h, 36329b5c48c2SStephen Cameron unsigned char *scsi3addr) 36339b5c48c2SStephen Cameron { 36349b5c48c2SStephen Cameron struct CommandList *c; 36359b5c48c2SStephen Cameron struct ErrorInfo *ei; 36369b5c48c2SStephen Cameron int rc = 0; 36379b5c48c2SStephen Cameron 36389b5c48c2SStephen Cameron u64 tag = (u64) -1; /* bogus tag */ 36399b5c48c2SStephen Cameron 36409b5c48c2SStephen Cameron /* Assume that physical devices support aborts */ 36419b5c48c2SStephen Cameron if (!is_logical_dev_addr_mode(scsi3addr)) 36429b5c48c2SStephen Cameron return 1; 36439b5c48c2SStephen Cameron 36449b5c48c2SStephen Cameron c = cmd_alloc(h); 3645bf43caf3SRobert Elliott 36469b5c48c2SStephen Cameron (void) fill_cmd(c, HPSA_ABORT_MSG, h, &tag, 0, 0, scsi3addr, TYPE_MSG); 36479b5c48c2SStephen Cameron (void) hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT); 36489b5c48c2SStephen Cameron /* no unmap needed here because no data xfer. */ 36499b5c48c2SStephen Cameron ei = c->err_info; 36509b5c48c2SStephen Cameron switch (ei->CommandStatus) { 36519b5c48c2SStephen Cameron case CMD_INVALID: 36529b5c48c2SStephen Cameron rc = 0; 36539b5c48c2SStephen Cameron break; 36549b5c48c2SStephen Cameron case CMD_UNABORTABLE: 36559b5c48c2SStephen Cameron case CMD_ABORT_FAILED: 36569b5c48c2SStephen Cameron rc = 1; 36579b5c48c2SStephen Cameron break; 36589437ac43SStephen Cameron case CMD_TMF_STATUS: 36599437ac43SStephen Cameron rc = hpsa_evaluate_tmf_status(h, c); 36609437ac43SStephen Cameron break; 36619b5c48c2SStephen Cameron default: 36629b5c48c2SStephen Cameron rc = 0; 36639b5c48c2SStephen Cameron break; 36649b5c48c2SStephen Cameron } 36659b5c48c2SStephen Cameron cmd_free(h, c); 36669b5c48c2SStephen Cameron return rc; 36679b5c48c2SStephen Cameron } 36689b5c48c2SStephen Cameron 3669edd16368SStephen M. Cameron static int hpsa_update_device_info(struct ctlr_info *h, 36700b0e1d6cSStephen M. Cameron unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device, 36710b0e1d6cSStephen M. Cameron unsigned char *is_OBDR_device) 3672edd16368SStephen M. Cameron { 36730b0e1d6cSStephen M. Cameron 36740b0e1d6cSStephen M. Cameron #define OBDR_SIG_OFFSET 43 36750b0e1d6cSStephen M. Cameron #define OBDR_TAPE_SIG "$DR-10" 36760b0e1d6cSStephen M. Cameron #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1) 36770b0e1d6cSStephen M. Cameron #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN) 36780b0e1d6cSStephen M. Cameron 3679ea6d3bc3SStephen M. Cameron unsigned char *inq_buff; 36800b0e1d6cSStephen M. Cameron unsigned char *obdr_sig; 3681683fc444SDon Brace int rc = 0; 3682edd16368SStephen M. Cameron 3683ea6d3bc3SStephen M. Cameron inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL); 3684683fc444SDon Brace if (!inq_buff) { 3685683fc444SDon Brace rc = -ENOMEM; 3686edd16368SStephen M. Cameron goto bail_out; 3687683fc444SDon Brace } 3688edd16368SStephen M. Cameron 3689edd16368SStephen M. Cameron /* Do an inquiry to the device to see what it is. */ 3690edd16368SStephen M. Cameron if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff, 3691edd16368SStephen M. Cameron (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) { 3692edd16368SStephen M. Cameron /* Inquiry failed (msg printed already) */ 3693edd16368SStephen M. Cameron dev_err(&h->pdev->dev, 3694edd16368SStephen M. Cameron "hpsa_update_device_info: inquiry failed\n"); 3695683fc444SDon Brace rc = -EIO; 3696edd16368SStephen M. Cameron goto bail_out; 3697edd16368SStephen M. Cameron } 3698edd16368SStephen M. Cameron 36994af61e4fSDon Brace scsi_sanitize_inquiry_string(&inq_buff[8], 8); 37004af61e4fSDon Brace scsi_sanitize_inquiry_string(&inq_buff[16], 16); 370175d23d89SDon Brace 3702edd16368SStephen M. Cameron this_device->devtype = (inq_buff[0] & 0x1f); 3703edd16368SStephen M. Cameron memcpy(this_device->scsi3addr, scsi3addr, 8); 3704edd16368SStephen M. Cameron memcpy(this_device->vendor, &inq_buff[8], 3705edd16368SStephen M. Cameron sizeof(this_device->vendor)); 3706edd16368SStephen M. Cameron memcpy(this_device->model, &inq_buff[16], 3707edd16368SStephen M. Cameron sizeof(this_device->model)); 3708edd16368SStephen M. Cameron memset(this_device->device_id, 0, 3709edd16368SStephen M. Cameron sizeof(this_device->device_id)); 371075d23d89SDon Brace hpsa_get_device_id(h, scsi3addr, this_device->device_id, 8, 3711edd16368SStephen M. Cameron sizeof(this_device->device_id)); 3712edd16368SStephen M. Cameron 3713af15ed36SDon Brace if ((this_device->devtype == TYPE_DISK || 3714af15ed36SDon Brace this_device->devtype == TYPE_ZBC) && 3715283b4a9bSStephen M. Cameron is_logical_dev_addr_mode(scsi3addr)) { 371667955ba3SStephen M. Cameron int volume_offline; 371767955ba3SStephen M. Cameron 3718edd16368SStephen M. Cameron hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level); 3719283b4a9bSStephen M. Cameron if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC) 3720283b4a9bSStephen M. Cameron hpsa_get_ioaccel_status(h, scsi3addr, this_device); 372167955ba3SStephen M. Cameron volume_offline = hpsa_volume_offline(h, scsi3addr); 372267955ba3SStephen M. Cameron if (volume_offline < 0 || volume_offline > 0xff) 372367955ba3SStephen M. Cameron volume_offline = HPSA_VPD_LV_STATUS_UNSUPPORTED; 372467955ba3SStephen M. Cameron this_device->volume_offline = volume_offline & 0xff; 3725283b4a9bSStephen M. Cameron } else { 3726edd16368SStephen M. Cameron this_device->raid_level = RAID_UNKNOWN; 3727283b4a9bSStephen M. Cameron this_device->offload_config = 0; 3728283b4a9bSStephen M. Cameron this_device->offload_enabled = 0; 372941ce4c35SStephen Cameron this_device->offload_to_be_enabled = 0; 3730a3144e0bSJoe Handzik this_device->hba_ioaccel_enabled = 0; 37319846590eSStephen M. Cameron this_device->volume_offline = 0; 373203383736SDon Brace this_device->queue_depth = h->nr_cmds; 3733283b4a9bSStephen M. Cameron } 3734edd16368SStephen M. Cameron 37350b0e1d6cSStephen M. Cameron if (is_OBDR_device) { 37360b0e1d6cSStephen M. Cameron /* See if this is a One-Button-Disaster-Recovery device 37370b0e1d6cSStephen M. Cameron * by looking for "$DR-10" at offset 43 in inquiry data. 37380b0e1d6cSStephen M. Cameron */ 37390b0e1d6cSStephen M. Cameron obdr_sig = &inq_buff[OBDR_SIG_OFFSET]; 37400b0e1d6cSStephen M. Cameron *is_OBDR_device = (this_device->devtype == TYPE_ROM && 37410b0e1d6cSStephen M. Cameron strncmp(obdr_sig, OBDR_TAPE_SIG, 37420b0e1d6cSStephen M. Cameron OBDR_SIG_LEN) == 0); 37430b0e1d6cSStephen M. Cameron } 3744edd16368SStephen M. Cameron kfree(inq_buff); 3745edd16368SStephen M. Cameron return 0; 3746edd16368SStephen M. Cameron 3747edd16368SStephen M. Cameron bail_out: 3748edd16368SStephen M. Cameron kfree(inq_buff); 3749683fc444SDon Brace return rc; 3750edd16368SStephen M. Cameron } 3751edd16368SStephen M. Cameron 37529b5c48c2SStephen Cameron static void hpsa_update_device_supports_aborts(struct ctlr_info *h, 37539b5c48c2SStephen Cameron struct hpsa_scsi_dev_t *dev, u8 *scsi3addr) 37549b5c48c2SStephen Cameron { 37559b5c48c2SStephen Cameron unsigned long flags; 37569b5c48c2SStephen Cameron int rc, entry; 37579b5c48c2SStephen Cameron /* 37589b5c48c2SStephen Cameron * See if this device supports aborts. If we already know 37599b5c48c2SStephen Cameron * the device, we already know if it supports aborts, otherwise 37609b5c48c2SStephen Cameron * we have to find out if it supports aborts by trying one. 37619b5c48c2SStephen Cameron */ 37629b5c48c2SStephen Cameron spin_lock_irqsave(&h->devlock, flags); 37639b5c48c2SStephen Cameron rc = hpsa_scsi_find_entry(dev, h->dev, h->ndevices, &entry); 37649b5c48c2SStephen Cameron if ((rc == DEVICE_SAME || rc == DEVICE_UPDATED) && 37659b5c48c2SStephen Cameron entry >= 0 && entry < h->ndevices) { 37669b5c48c2SStephen Cameron dev->supports_aborts = h->dev[entry]->supports_aborts; 37679b5c48c2SStephen Cameron spin_unlock_irqrestore(&h->devlock, flags); 37689b5c48c2SStephen Cameron } else { 37699b5c48c2SStephen Cameron spin_unlock_irqrestore(&h->devlock, flags); 37709b5c48c2SStephen Cameron dev->supports_aborts = 37719b5c48c2SStephen Cameron hpsa_device_supports_aborts(h, scsi3addr); 37729b5c48c2SStephen Cameron if (dev->supports_aborts < 0) 37739b5c48c2SStephen Cameron dev->supports_aborts = 0; 37749b5c48c2SStephen Cameron } 37759b5c48c2SStephen Cameron } 37769b5c48c2SStephen Cameron 3777c795505aSKevin Barnett /* 3778c795505aSKevin Barnett * Helper function to assign bus, target, lun mapping of devices. 3779edd16368SStephen M. Cameron * Logical drive target and lun are assigned at this time, but 3780edd16368SStephen M. Cameron * physical device lun and target assignment are deferred (assigned 3781edd16368SStephen M. Cameron * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.) 3782edd16368SStephen M. Cameron */ 3783edd16368SStephen M. Cameron static void figure_bus_target_lun(struct ctlr_info *h, 37841f310bdeSStephen M. Cameron u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device) 3785edd16368SStephen M. Cameron { 3786c795505aSKevin Barnett u32 lunid = get_unaligned_le32(lunaddrbytes); 3787edd16368SStephen M. Cameron 37881f310bdeSStephen M. Cameron if (!is_logical_dev_addr_mode(lunaddrbytes)) { 37891f310bdeSStephen M. Cameron /* physical device, target and lun filled in later */ 37901f310bdeSStephen M. Cameron if (is_hba_lunid(lunaddrbytes)) 3791c795505aSKevin Barnett hpsa_set_bus_target_lun(device, 3792c795505aSKevin Barnett HPSA_HBA_BUS, 0, lunid & 0x3fff); 37931f310bdeSStephen M. Cameron else 37941f310bdeSStephen M. Cameron /* defer target, lun assignment for physical devices */ 3795c795505aSKevin Barnett hpsa_set_bus_target_lun(device, 3796c795505aSKevin Barnett HPSA_PHYSICAL_DEVICE_BUS, -1, -1); 37971f310bdeSStephen M. Cameron return; 37981f310bdeSStephen M. Cameron } 37991f310bdeSStephen M. Cameron /* It's a logical device */ 380066749d0dSScott Teel if (device->external) { 38011f310bdeSStephen M. Cameron hpsa_set_bus_target_lun(device, 3802c795505aSKevin Barnett HPSA_EXTERNAL_RAID_VOLUME_BUS, (lunid >> 16) & 0x3fff, 3803c795505aSKevin Barnett lunid & 0x00ff); 38041f310bdeSStephen M. Cameron return; 3805339b2b14SStephen M. Cameron } 3806c795505aSKevin Barnett hpsa_set_bus_target_lun(device, HPSA_RAID_VOLUME_BUS, 3807c795505aSKevin Barnett 0, lunid & 0x3fff); 3808edd16368SStephen M. Cameron } 3809edd16368SStephen M. Cameron 3810edd16368SStephen M. Cameron 3811edd16368SStephen M. Cameron /* 381254b6e9e9SScott Teel * Get address of physical disk used for an ioaccel2 mode command: 381354b6e9e9SScott Teel * 1. Extract ioaccel2 handle from the command. 381454b6e9e9SScott Teel * 2. Find a matching ioaccel2 handle from list of physical disks. 381554b6e9e9SScott Teel * 3. Return: 381654b6e9e9SScott Teel * 1 and set scsi3addr to address of matching physical 381754b6e9e9SScott Teel * 0 if no matching physical disk was found. 381854b6e9e9SScott Teel */ 381954b6e9e9SScott Teel static int hpsa_get_pdisk_of_ioaccel2(struct ctlr_info *h, 382054b6e9e9SScott Teel struct CommandList *ioaccel2_cmd_to_abort, unsigned char *scsi3addr) 382154b6e9e9SScott Teel { 382241ce4c35SStephen Cameron struct io_accel2_cmd *c2 = 382341ce4c35SStephen Cameron &h->ioaccel2_cmd_pool[ioaccel2_cmd_to_abort->cmdindex]; 382441ce4c35SStephen Cameron unsigned long flags; 382554b6e9e9SScott Teel int i; 382654b6e9e9SScott Teel 382741ce4c35SStephen Cameron spin_lock_irqsave(&h->devlock, flags); 382841ce4c35SStephen Cameron for (i = 0; i < h->ndevices; i++) 382941ce4c35SStephen Cameron if (h->dev[i]->ioaccel_handle == le32_to_cpu(c2->scsi_nexus)) { 383041ce4c35SStephen Cameron memcpy(scsi3addr, h->dev[i]->scsi3addr, 383141ce4c35SStephen Cameron sizeof(h->dev[i]->scsi3addr)); 383241ce4c35SStephen Cameron spin_unlock_irqrestore(&h->devlock, flags); 383354b6e9e9SScott Teel return 1; 383454b6e9e9SScott Teel } 383541ce4c35SStephen Cameron spin_unlock_irqrestore(&h->devlock, flags); 383641ce4c35SStephen Cameron return 0; 383741ce4c35SStephen Cameron } 383841ce4c35SStephen Cameron 383966749d0dSScott Teel static int figure_external_status(struct ctlr_info *h, int raid_ctlr_position, 384066749d0dSScott Teel int i, int nphysicals, int nlocal_logicals) 384166749d0dSScott Teel { 384266749d0dSScott Teel /* In report logicals, local logicals are listed first, 384366749d0dSScott Teel * then any externals. 384466749d0dSScott Teel */ 384566749d0dSScott Teel int logicals_start = nphysicals + (raid_ctlr_position == 0); 384666749d0dSScott Teel 384766749d0dSScott Teel if (i == raid_ctlr_position) 384866749d0dSScott Teel return 0; 384966749d0dSScott Teel 385066749d0dSScott Teel if (i < logicals_start) 385166749d0dSScott Teel return 0; 385266749d0dSScott Teel 385366749d0dSScott Teel /* i is in logicals range, but still within local logicals */ 385466749d0dSScott Teel if ((i - nphysicals - (raid_ctlr_position == 0)) < nlocal_logicals) 385566749d0dSScott Teel return 0; 385666749d0dSScott Teel 385766749d0dSScott Teel return 1; /* it's an external lun */ 385866749d0dSScott Teel } 385966749d0dSScott Teel 386054b6e9e9SScott Teel /* 3861edd16368SStephen M. Cameron * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev, 3862edd16368SStephen M. Cameron * logdev. The number of luns in physdev and logdev are returned in 3863edd16368SStephen M. Cameron * *nphysicals and *nlogicals, respectively. 3864edd16368SStephen M. Cameron * Returns 0 on success, -1 otherwise. 3865edd16368SStephen M. Cameron */ 3866edd16368SStephen M. Cameron static int hpsa_gather_lun_info(struct ctlr_info *h, 386703383736SDon Brace struct ReportExtendedLUNdata *physdev, u32 *nphysicals, 386801a02ffcSStephen M. Cameron struct ReportLUNdata *logdev, u32 *nlogicals) 3869edd16368SStephen M. Cameron { 387003383736SDon Brace if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) { 3871edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 3872edd16368SStephen M. Cameron return -1; 3873edd16368SStephen M. Cameron } 387403383736SDon Brace *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24; 3875edd16368SStephen M. Cameron if (*nphysicals > HPSA_MAX_PHYS_LUN) { 387603383736SDon Brace dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n", 387703383736SDon Brace HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN); 3878edd16368SStephen M. Cameron *nphysicals = HPSA_MAX_PHYS_LUN; 3879edd16368SStephen M. Cameron } 388003383736SDon Brace if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) { 3881edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "report logical LUNs failed.\n"); 3882edd16368SStephen M. Cameron return -1; 3883edd16368SStephen M. Cameron } 38846df1e954SStephen M. Cameron *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8; 3885edd16368SStephen M. Cameron /* Reject Logicals in excess of our max capability. */ 3886edd16368SStephen M. Cameron if (*nlogicals > HPSA_MAX_LUN) { 3887edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 3888edd16368SStephen M. Cameron "maximum logical LUNs (%d) exceeded. " 3889edd16368SStephen M. Cameron "%d LUNs ignored.\n", HPSA_MAX_LUN, 3890edd16368SStephen M. Cameron *nlogicals - HPSA_MAX_LUN); 3891edd16368SStephen M. Cameron *nlogicals = HPSA_MAX_LUN; 3892edd16368SStephen M. Cameron } 3893edd16368SStephen M. Cameron if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) { 3894edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 3895edd16368SStephen M. Cameron "maximum logical + physical LUNs (%d) exceeded. " 3896edd16368SStephen M. Cameron "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN, 3897edd16368SStephen M. Cameron *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN); 3898edd16368SStephen M. Cameron *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals; 3899edd16368SStephen M. Cameron } 3900edd16368SStephen M. Cameron return 0; 3901edd16368SStephen M. Cameron } 3902edd16368SStephen M. Cameron 390342a91641SDon Brace static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, 390442a91641SDon Brace int i, int nphysicals, int nlogicals, 3905a93aa1feSMatt Gates struct ReportExtendedLUNdata *physdev_list, 3906339b2b14SStephen M. Cameron struct ReportLUNdata *logdev_list) 3907339b2b14SStephen M. Cameron { 3908339b2b14SStephen M. Cameron /* Helper function, figure out where the LUN ID info is coming from 3909339b2b14SStephen M. Cameron * given index i, lists of physical and logical devices, where in 3910339b2b14SStephen M. Cameron * the list the raid controller is supposed to appear (first or last) 3911339b2b14SStephen M. Cameron */ 3912339b2b14SStephen M. Cameron 3913339b2b14SStephen M. Cameron int logicals_start = nphysicals + (raid_ctlr_position == 0); 3914339b2b14SStephen M. Cameron int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0); 3915339b2b14SStephen M. Cameron 3916339b2b14SStephen M. Cameron if (i == raid_ctlr_position) 3917339b2b14SStephen M. Cameron return RAID_CTLR_LUNID; 3918339b2b14SStephen M. Cameron 3919339b2b14SStephen M. Cameron if (i < logicals_start) 3920d5b5d964SStephen M. Cameron return &physdev_list->LUN[i - 3921d5b5d964SStephen M. Cameron (raid_ctlr_position == 0)].lunid[0]; 3922339b2b14SStephen M. Cameron 3923339b2b14SStephen M. Cameron if (i < last_device) 3924339b2b14SStephen M. Cameron return &logdev_list->LUN[i - nphysicals - 3925339b2b14SStephen M. Cameron (raid_ctlr_position == 0)][0]; 3926339b2b14SStephen M. Cameron BUG(); 3927339b2b14SStephen M. Cameron return NULL; 3928339b2b14SStephen M. Cameron } 3929339b2b14SStephen M. Cameron 393003383736SDon Brace /* get physical drive ioaccel handle and queue depth */ 393103383736SDon Brace static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h, 393203383736SDon Brace struct hpsa_scsi_dev_t *dev, 3933f2039b03SDon Brace struct ReportExtendedLUNdata *rlep, int rle_index, 393403383736SDon Brace struct bmic_identify_physical_device *id_phys) 393503383736SDon Brace { 393603383736SDon Brace int rc; 3937f2039b03SDon Brace struct ext_report_lun_entry *rle = &rlep->LUN[rle_index]; 393803383736SDon Brace 393903383736SDon Brace dev->ioaccel_handle = rle->ioaccel_handle; 3940f2039b03SDon Brace if ((rle->device_flags & 0x08) && dev->ioaccel_handle) 3941a3144e0bSJoe Handzik dev->hba_ioaccel_enabled = 1; 394203383736SDon Brace memset(id_phys, 0, sizeof(*id_phys)); 3943f2039b03SDon Brace rc = hpsa_bmic_id_physical_device(h, &rle->lunid[0], 3944f2039b03SDon Brace GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]), id_phys, 394503383736SDon Brace sizeof(*id_phys)); 394603383736SDon Brace if (!rc) 394703383736SDon Brace /* Reserve space for FW operations */ 394803383736SDon Brace #define DRIVE_CMDS_RESERVED_FOR_FW 2 394903383736SDon Brace #define DRIVE_QUEUE_DEPTH 7 395003383736SDon Brace dev->queue_depth = 395103383736SDon Brace le16_to_cpu(id_phys->current_queue_depth_limit) - 395203383736SDon Brace DRIVE_CMDS_RESERVED_FOR_FW; 395303383736SDon Brace else 395403383736SDon Brace dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */ 395503383736SDon Brace } 395603383736SDon Brace 39578270b862SJoe Handzik static void hpsa_get_path_info(struct hpsa_scsi_dev_t *this_device, 3958f2039b03SDon Brace struct ReportExtendedLUNdata *rlep, int rle_index, 39598270b862SJoe Handzik struct bmic_identify_physical_device *id_phys) 39608270b862SJoe Handzik { 3961f2039b03SDon Brace struct ext_report_lun_entry *rle = &rlep->LUN[rle_index]; 3962f2039b03SDon Brace 3963f2039b03SDon Brace if ((rle->device_flags & 0x08) && this_device->ioaccel_handle) 39648270b862SJoe Handzik this_device->hba_ioaccel_enabled = 1; 39658270b862SJoe Handzik 39668270b862SJoe Handzik memcpy(&this_device->active_path_index, 39678270b862SJoe Handzik &id_phys->active_path_number, 39688270b862SJoe Handzik sizeof(this_device->active_path_index)); 39698270b862SJoe Handzik memcpy(&this_device->path_map, 39708270b862SJoe Handzik &id_phys->redundant_path_present_map, 39718270b862SJoe Handzik sizeof(this_device->path_map)); 39728270b862SJoe Handzik memcpy(&this_device->box, 39738270b862SJoe Handzik &id_phys->alternate_paths_phys_box_on_port, 39748270b862SJoe Handzik sizeof(this_device->box)); 39758270b862SJoe Handzik memcpy(&this_device->phys_connector, 39768270b862SJoe Handzik &id_phys->alternate_paths_phys_connector, 39778270b862SJoe Handzik sizeof(this_device->phys_connector)); 39788270b862SJoe Handzik memcpy(&this_device->bay, 39798270b862SJoe Handzik &id_phys->phys_bay_in_box, 39808270b862SJoe Handzik sizeof(this_device->bay)); 39818270b862SJoe Handzik } 39828270b862SJoe Handzik 398366749d0dSScott Teel /* get number of local logical disks. */ 398466749d0dSScott Teel static int hpsa_set_local_logical_count(struct ctlr_info *h, 398566749d0dSScott Teel struct bmic_identify_controller *id_ctlr, 398666749d0dSScott Teel u32 *nlocals) 398766749d0dSScott Teel { 398866749d0dSScott Teel int rc; 398966749d0dSScott Teel 399066749d0dSScott Teel if (!id_ctlr) { 399166749d0dSScott Teel dev_warn(&h->pdev->dev, "%s: id_ctlr buffer is NULL.\n", 399266749d0dSScott Teel __func__); 399366749d0dSScott Teel return -ENOMEM; 399466749d0dSScott Teel } 399566749d0dSScott Teel memset(id_ctlr, 0, sizeof(*id_ctlr)); 399666749d0dSScott Teel rc = hpsa_bmic_id_controller(h, id_ctlr, sizeof(*id_ctlr)); 399766749d0dSScott Teel if (!rc) 399866749d0dSScott Teel if (id_ctlr->configured_logical_drive_count < 256) 399966749d0dSScott Teel *nlocals = id_ctlr->configured_logical_drive_count; 400066749d0dSScott Teel else 400166749d0dSScott Teel *nlocals = le16_to_cpu( 400266749d0dSScott Teel id_ctlr->extended_logical_unit_count); 400366749d0dSScott Teel else 400466749d0dSScott Teel *nlocals = -1; 400566749d0dSScott Teel return rc; 400666749d0dSScott Teel } 400766749d0dSScott Teel 400866749d0dSScott Teel 40098aa60681SDon Brace static void hpsa_update_scsi_devices(struct ctlr_info *h) 4010edd16368SStephen M. Cameron { 4011edd16368SStephen M. Cameron /* the idea here is we could get notified 4012edd16368SStephen M. Cameron * that some devices have changed, so we do a report 4013edd16368SStephen M. Cameron * physical luns and report logical luns cmd, and adjust 4014edd16368SStephen M. Cameron * our list of devices accordingly. 4015edd16368SStephen M. Cameron * 4016edd16368SStephen M. Cameron * The scsi3addr's of devices won't change so long as the 4017edd16368SStephen M. Cameron * adapter is not reset. That means we can rescan and 4018edd16368SStephen M. Cameron * tell which devices we already know about, vs. new 4019edd16368SStephen M. Cameron * devices, vs. disappearing devices. 4020edd16368SStephen M. Cameron */ 4021a93aa1feSMatt Gates struct ReportExtendedLUNdata *physdev_list = NULL; 4022edd16368SStephen M. Cameron struct ReportLUNdata *logdev_list = NULL; 402303383736SDon Brace struct bmic_identify_physical_device *id_phys = NULL; 402466749d0dSScott Teel struct bmic_identify_controller *id_ctlr = NULL; 402501a02ffcSStephen M. Cameron u32 nphysicals = 0; 402601a02ffcSStephen M. Cameron u32 nlogicals = 0; 402766749d0dSScott Teel u32 nlocal_logicals = 0; 402801a02ffcSStephen M. Cameron u32 ndev_allocated = 0; 4029edd16368SStephen M. Cameron struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice; 4030edd16368SStephen M. Cameron int ncurrent = 0; 40314f4eb9f1SScott Teel int i, n_ext_target_devs, ndevs_to_allocate; 4032339b2b14SStephen M. Cameron int raid_ctlr_position; 403304fa2f44SKevin Barnett bool physical_device; 4034aca4a520SScott Teel DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS); 4035edd16368SStephen M. Cameron 4036cfe5badcSScott Teel currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL); 403792084715SStephen M. Cameron physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL); 403892084715SStephen M. Cameron logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL); 4039edd16368SStephen M. Cameron tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL); 404003383736SDon Brace id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 404166749d0dSScott Teel id_ctlr = kzalloc(sizeof(*id_ctlr), GFP_KERNEL); 4042edd16368SStephen M. Cameron 404303383736SDon Brace if (!currentsd || !physdev_list || !logdev_list || 404466749d0dSScott Teel !tmpdevice || !id_phys || !id_ctlr) { 4045edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "out of memory\n"); 4046edd16368SStephen M. Cameron goto out; 4047edd16368SStephen M. Cameron } 4048edd16368SStephen M. Cameron memset(lunzerobits, 0, sizeof(lunzerobits)); 4049edd16368SStephen M. Cameron 4050853633e8SDon Brace h->drv_req_rescan = 0; /* cancel scheduled rescan - we're doing it. */ 4051853633e8SDon Brace 405203383736SDon Brace if (hpsa_gather_lun_info(h, physdev_list, &nphysicals, 4053853633e8SDon Brace logdev_list, &nlogicals)) { 4054853633e8SDon Brace h->drv_req_rescan = 1; 4055edd16368SStephen M. Cameron goto out; 4056853633e8SDon Brace } 4057edd16368SStephen M. Cameron 405866749d0dSScott Teel /* Set number of local logicals (non PTRAID) */ 405966749d0dSScott Teel if (hpsa_set_local_logical_count(h, id_ctlr, &nlocal_logicals)) { 406066749d0dSScott Teel dev_warn(&h->pdev->dev, 406166749d0dSScott Teel "%s: Can't determine number of local logical devices.\n", 406266749d0dSScott Teel __func__); 406366749d0dSScott Teel } 4064edd16368SStephen M. Cameron 4065aca4a520SScott Teel /* We might see up to the maximum number of logical and physical disks 4066aca4a520SScott Teel * plus external target devices, and a device for the local RAID 4067aca4a520SScott Teel * controller. 4068edd16368SStephen M. Cameron */ 4069aca4a520SScott Teel ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1; 4070edd16368SStephen M. Cameron 4071edd16368SStephen M. Cameron /* Allocate the per device structures */ 4072edd16368SStephen M. Cameron for (i = 0; i < ndevs_to_allocate; i++) { 4073b7ec021fSScott Teel if (i >= HPSA_MAX_DEVICES) { 4074b7ec021fSScott Teel dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded." 4075b7ec021fSScott Teel " %d devices ignored.\n", HPSA_MAX_DEVICES, 4076b7ec021fSScott Teel ndevs_to_allocate - HPSA_MAX_DEVICES); 4077b7ec021fSScott Teel break; 4078b7ec021fSScott Teel } 4079b7ec021fSScott Teel 4080edd16368SStephen M. Cameron currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL); 4081edd16368SStephen M. Cameron if (!currentsd[i]) { 4082edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "out of memory at %s:%d\n", 4083edd16368SStephen M. Cameron __FILE__, __LINE__); 4084853633e8SDon Brace h->drv_req_rescan = 1; 4085edd16368SStephen M. Cameron goto out; 4086edd16368SStephen M. Cameron } 4087edd16368SStephen M. Cameron ndev_allocated++; 4088edd16368SStephen M. Cameron } 4089edd16368SStephen M. Cameron 40908645291bSStephen M. Cameron if (is_scsi_rev_5(h)) 4091339b2b14SStephen M. Cameron raid_ctlr_position = 0; 4092339b2b14SStephen M. Cameron else 4093339b2b14SStephen M. Cameron raid_ctlr_position = nphysicals + nlogicals; 4094339b2b14SStephen M. Cameron 4095edd16368SStephen M. Cameron /* adjust our table of devices */ 40964f4eb9f1SScott Teel n_ext_target_devs = 0; 4097edd16368SStephen M. Cameron for (i = 0; i < nphysicals + nlogicals + 1; i++) { 40980b0e1d6cSStephen M. Cameron u8 *lunaddrbytes, is_OBDR = 0; 4099683fc444SDon Brace int rc = 0; 4100f2039b03SDon Brace int phys_dev_index = i - (raid_ctlr_position == 0); 4101edd16368SStephen M. Cameron 410204fa2f44SKevin Barnett physical_device = i < nphysicals + (raid_ctlr_position == 0); 4103edd16368SStephen M. Cameron 4104edd16368SStephen M. Cameron /* Figure out where the LUN ID info is coming from */ 4105339b2b14SStephen M. Cameron lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position, 4106339b2b14SStephen M. Cameron i, nphysicals, nlogicals, physdev_list, logdev_list); 410741ce4c35SStephen Cameron 410841ce4c35SStephen Cameron /* skip masked non-disk devices */ 410904fa2f44SKevin Barnett if (MASKED_DEVICE(lunaddrbytes) && physical_device && 4110cca8f13bSDon Brace (physdev_list->LUN[phys_dev_index].device_type != 0x06) && 411104fa2f44SKevin Barnett (physdev_list->LUN[phys_dev_index].device_flags & 0x01)) 4112edd16368SStephen M. Cameron continue; 4113edd16368SStephen M. Cameron 4114edd16368SStephen M. Cameron /* Get device type, vendor, model, device id */ 4115683fc444SDon Brace rc = hpsa_update_device_info(h, lunaddrbytes, tmpdevice, 4116683fc444SDon Brace &is_OBDR); 4117683fc444SDon Brace if (rc == -ENOMEM) { 4118683fc444SDon Brace dev_warn(&h->pdev->dev, 4119683fc444SDon Brace "Out of memory, rescan deferred.\n"); 4120853633e8SDon Brace h->drv_req_rescan = 1; 4121683fc444SDon Brace goto out; 4122853633e8SDon Brace } 4123683fc444SDon Brace if (rc) { 4124683fc444SDon Brace dev_warn(&h->pdev->dev, 4125683fc444SDon Brace "Inquiry failed, skipping device.\n"); 4126683fc444SDon Brace continue; 4127683fc444SDon Brace } 4128683fc444SDon Brace 412966749d0dSScott Teel /* Determine if this is a lun from an external target array */ 413066749d0dSScott Teel tmpdevice->external = 413166749d0dSScott Teel figure_external_status(h, raid_ctlr_position, i, 413266749d0dSScott Teel nphysicals, nlocal_logicals); 413366749d0dSScott Teel 41341f310bdeSStephen M. Cameron figure_bus_target_lun(h, lunaddrbytes, tmpdevice); 41359b5c48c2SStephen Cameron hpsa_update_device_supports_aborts(h, tmpdevice, lunaddrbytes); 4136edd16368SStephen M. Cameron this_device = currentsd[ncurrent]; 4137edd16368SStephen M. Cameron 413834592254SScott Teel /* Turn on discovery_polling if there are ext target devices. 413934592254SScott Teel * Event-based change notification is unreliable for those. 4140edd16368SStephen M. Cameron */ 414134592254SScott Teel if (!h->discovery_polling) { 414234592254SScott Teel if (tmpdevice->external) { 414334592254SScott Teel h->discovery_polling = 1; 414434592254SScott Teel dev_info(&h->pdev->dev, 414534592254SScott Teel "External target, activate discovery polling.\n"); 4146edd16368SStephen M. Cameron } 414734592254SScott Teel } 414834592254SScott Teel 4149edd16368SStephen M. Cameron 4150edd16368SStephen M. Cameron *this_device = *tmpdevice; 415104fa2f44SKevin Barnett this_device->physical_device = physical_device; 4152edd16368SStephen M. Cameron 415304fa2f44SKevin Barnett /* 415404fa2f44SKevin Barnett * Expose all devices except for physical devices that 415504fa2f44SKevin Barnett * are masked. 415604fa2f44SKevin Barnett */ 415704fa2f44SKevin Barnett if (MASKED_DEVICE(lunaddrbytes) && this_device->physical_device) 41582a168208SKevin Barnett this_device->expose_device = 0; 41592a168208SKevin Barnett else 41602a168208SKevin Barnett this_device->expose_device = 1; 416141ce4c35SStephen Cameron 4162d04e62b9SKevin Barnett 4163d04e62b9SKevin Barnett /* 4164d04e62b9SKevin Barnett * Get the SAS address for physical devices that are exposed. 4165d04e62b9SKevin Barnett */ 4166d04e62b9SKevin Barnett if (this_device->physical_device && this_device->expose_device) 4167d04e62b9SKevin Barnett hpsa_get_sas_address(h, lunaddrbytes, this_device); 4168edd16368SStephen M. Cameron 4169edd16368SStephen M. Cameron switch (this_device->devtype) { 41700b0e1d6cSStephen M. Cameron case TYPE_ROM: 4171edd16368SStephen M. Cameron /* We don't *really* support actual CD-ROM devices, 4172edd16368SStephen M. Cameron * just "One Button Disaster Recovery" tape drive 4173edd16368SStephen M. Cameron * which temporarily pretends to be a CD-ROM drive. 4174edd16368SStephen M. Cameron * So we check that the device is really an OBDR tape 4175edd16368SStephen M. Cameron * device by checking for "$DR-10" in bytes 43-48 of 4176edd16368SStephen M. Cameron * the inquiry data. 4177edd16368SStephen M. Cameron */ 41780b0e1d6cSStephen M. Cameron if (is_OBDR) 4179edd16368SStephen M. Cameron ncurrent++; 4180edd16368SStephen M. Cameron break; 4181edd16368SStephen M. Cameron case TYPE_DISK: 4182af15ed36SDon Brace case TYPE_ZBC: 418304fa2f44SKevin Barnett if (this_device->physical_device) { 4184b9092b79SKevin Barnett /* The disk is in HBA mode. */ 4185b9092b79SKevin Barnett /* Never use RAID mapper in HBA mode. */ 4186ecf418d1SJoe Handzik this_device->offload_enabled = 0; 418703383736SDon Brace hpsa_get_ioaccel_drive_info(h, this_device, 4188f2039b03SDon Brace physdev_list, phys_dev_index, id_phys); 4189f2039b03SDon Brace hpsa_get_path_info(this_device, 4190f2039b03SDon Brace physdev_list, phys_dev_index, id_phys); 4191b9092b79SKevin Barnett } 4192edd16368SStephen M. Cameron ncurrent++; 4193edd16368SStephen M. Cameron break; 4194edd16368SStephen M. Cameron case TYPE_TAPE: 4195edd16368SStephen M. Cameron case TYPE_MEDIUM_CHANGER: 4196cca8f13bSDon Brace ncurrent++; 4197cca8f13bSDon Brace break; 419841ce4c35SStephen Cameron case TYPE_ENCLOSURE: 419917a9e54aSDon Brace if (!this_device->external) 4200cca8f13bSDon Brace hpsa_get_enclosure_info(h, lunaddrbytes, 4201cca8f13bSDon Brace physdev_list, phys_dev_index, 4202cca8f13bSDon Brace this_device); 420341ce4c35SStephen Cameron ncurrent++; 420441ce4c35SStephen Cameron break; 4205edd16368SStephen M. Cameron case TYPE_RAID: 4206edd16368SStephen M. Cameron /* Only present the Smartarray HBA as a RAID controller. 4207edd16368SStephen M. Cameron * If it's a RAID controller other than the HBA itself 4208edd16368SStephen M. Cameron * (an external RAID controller, MSA500 or similar) 4209edd16368SStephen M. Cameron * don't present it. 4210edd16368SStephen M. Cameron */ 4211edd16368SStephen M. Cameron if (!is_hba_lunid(lunaddrbytes)) 4212edd16368SStephen M. Cameron break; 4213edd16368SStephen M. Cameron ncurrent++; 4214edd16368SStephen M. Cameron break; 4215edd16368SStephen M. Cameron default: 4216edd16368SStephen M. Cameron break; 4217edd16368SStephen M. Cameron } 4218cfe5badcSScott Teel if (ncurrent >= HPSA_MAX_DEVICES) 4219edd16368SStephen M. Cameron break; 4220edd16368SStephen M. Cameron } 4221d04e62b9SKevin Barnett 4222d04e62b9SKevin Barnett if (h->sas_host == NULL) { 4223d04e62b9SKevin Barnett int rc = 0; 4224d04e62b9SKevin Barnett 4225d04e62b9SKevin Barnett rc = hpsa_add_sas_host(h); 4226d04e62b9SKevin Barnett if (rc) { 4227d04e62b9SKevin Barnett dev_warn(&h->pdev->dev, 4228d04e62b9SKevin Barnett "Could not add sas host %d\n", rc); 4229d04e62b9SKevin Barnett goto out; 4230d04e62b9SKevin Barnett } 4231d04e62b9SKevin Barnett } 4232d04e62b9SKevin Barnett 42338aa60681SDon Brace adjust_hpsa_scsi_table(h, currentsd, ncurrent); 4234edd16368SStephen M. Cameron out: 4235edd16368SStephen M. Cameron kfree(tmpdevice); 4236edd16368SStephen M. Cameron for (i = 0; i < ndev_allocated; i++) 4237edd16368SStephen M. Cameron kfree(currentsd[i]); 4238edd16368SStephen M. Cameron kfree(currentsd); 4239edd16368SStephen M. Cameron kfree(physdev_list); 4240edd16368SStephen M. Cameron kfree(logdev_list); 424166749d0dSScott Teel kfree(id_ctlr); 424203383736SDon Brace kfree(id_phys); 4243edd16368SStephen M. Cameron } 4244edd16368SStephen M. Cameron 4245ec5cbf04SWebb Scales static void hpsa_set_sg_descriptor(struct SGDescriptor *desc, 4246ec5cbf04SWebb Scales struct scatterlist *sg) 4247ec5cbf04SWebb Scales { 4248ec5cbf04SWebb Scales u64 addr64 = (u64) sg_dma_address(sg); 4249ec5cbf04SWebb Scales unsigned int len = sg_dma_len(sg); 4250ec5cbf04SWebb Scales 4251ec5cbf04SWebb Scales desc->Addr = cpu_to_le64(addr64); 4252ec5cbf04SWebb Scales desc->Len = cpu_to_le32(len); 4253ec5cbf04SWebb Scales desc->Ext = 0; 4254ec5cbf04SWebb Scales } 4255ec5cbf04SWebb Scales 4256c7ee65b3SWebb Scales /* 4257c7ee65b3SWebb Scales * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci 4258edd16368SStephen M. Cameron * dma mapping and fills in the scatter gather entries of the 4259edd16368SStephen M. Cameron * hpsa command, cp. 4260edd16368SStephen M. Cameron */ 426133a2ffceSStephen M. Cameron static int hpsa_scatter_gather(struct ctlr_info *h, 4262edd16368SStephen M. Cameron struct CommandList *cp, 4263edd16368SStephen M. Cameron struct scsi_cmnd *cmd) 4264edd16368SStephen M. Cameron { 4265edd16368SStephen M. Cameron struct scatterlist *sg; 4266b3a7ba7cSWebb Scales int use_sg, i, sg_limit, chained, last_sg; 426733a2ffceSStephen M. Cameron struct SGDescriptor *curr_sg; 4268edd16368SStephen M. Cameron 426933a2ffceSStephen M. Cameron BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 4270edd16368SStephen M. Cameron 4271edd16368SStephen M. Cameron use_sg = scsi_dma_map(cmd); 4272edd16368SStephen M. Cameron if (use_sg < 0) 4273edd16368SStephen M. Cameron return use_sg; 4274edd16368SStephen M. Cameron 4275edd16368SStephen M. Cameron if (!use_sg) 4276edd16368SStephen M. Cameron goto sglist_finished; 4277edd16368SStephen M. Cameron 4278b3a7ba7cSWebb Scales /* 4279b3a7ba7cSWebb Scales * If the number of entries is greater than the max for a single list, 4280b3a7ba7cSWebb Scales * then we have a chained list; we will set up all but one entry in the 4281b3a7ba7cSWebb Scales * first list (the last entry is saved for link information); 4282b3a7ba7cSWebb Scales * otherwise, we don't have a chained list and we'll set up at each of 4283b3a7ba7cSWebb Scales * the entries in the one list. 4284b3a7ba7cSWebb Scales */ 428533a2ffceSStephen M. Cameron curr_sg = cp->SG; 4286b3a7ba7cSWebb Scales chained = use_sg > h->max_cmd_sg_entries; 4287b3a7ba7cSWebb Scales sg_limit = chained ? h->max_cmd_sg_entries - 1 : use_sg; 4288b3a7ba7cSWebb Scales last_sg = scsi_sg_count(cmd) - 1; 4289b3a7ba7cSWebb Scales scsi_for_each_sg(cmd, sg, sg_limit, i) { 4290ec5cbf04SWebb Scales hpsa_set_sg_descriptor(curr_sg, sg); 429133a2ffceSStephen M. Cameron curr_sg++; 429233a2ffceSStephen M. Cameron } 4293ec5cbf04SWebb Scales 4294b3a7ba7cSWebb Scales if (chained) { 4295b3a7ba7cSWebb Scales /* 4296b3a7ba7cSWebb Scales * Continue with the chained list. Set curr_sg to the chained 4297b3a7ba7cSWebb Scales * list. Modify the limit to the total count less the entries 4298b3a7ba7cSWebb Scales * we've already set up. Resume the scan at the list entry 4299b3a7ba7cSWebb Scales * where the previous loop left off. 4300b3a7ba7cSWebb Scales */ 4301b3a7ba7cSWebb Scales curr_sg = h->cmd_sg_list[cp->cmdindex]; 4302b3a7ba7cSWebb Scales sg_limit = use_sg - sg_limit; 4303b3a7ba7cSWebb Scales for_each_sg(sg, sg, sg_limit, i) { 4304b3a7ba7cSWebb Scales hpsa_set_sg_descriptor(curr_sg, sg); 4305b3a7ba7cSWebb Scales curr_sg++; 4306b3a7ba7cSWebb Scales } 4307b3a7ba7cSWebb Scales } 4308b3a7ba7cSWebb Scales 4309ec5cbf04SWebb Scales /* Back the pointer up to the last entry and mark it as "last". */ 4310b3a7ba7cSWebb Scales (curr_sg - 1)->Ext = cpu_to_le32(HPSA_SG_LAST); 431133a2ffceSStephen M. Cameron 431233a2ffceSStephen M. Cameron if (use_sg + chained > h->maxSG) 431333a2ffceSStephen M. Cameron h->maxSG = use_sg + chained; 431433a2ffceSStephen M. Cameron 431533a2ffceSStephen M. Cameron if (chained) { 431633a2ffceSStephen M. Cameron cp->Header.SGList = h->max_cmd_sg_entries; 431750a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(use_sg + 1); 4318e2bea6dfSStephen M. Cameron if (hpsa_map_sg_chain_block(h, cp)) { 4319e2bea6dfSStephen M. Cameron scsi_dma_unmap(cmd); 4320e2bea6dfSStephen M. Cameron return -1; 4321e2bea6dfSStephen M. Cameron } 432233a2ffceSStephen M. Cameron return 0; 4323edd16368SStephen M. Cameron } 4324edd16368SStephen M. Cameron 4325edd16368SStephen M. Cameron sglist_finished: 4326edd16368SStephen M. Cameron 432701a02ffcSStephen M. Cameron cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */ 4328c7ee65b3SWebb Scales cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */ 4329edd16368SStephen M. Cameron return 0; 4330edd16368SStephen M. Cameron } 4331edd16368SStephen M. Cameron 4332283b4a9bSStephen M. Cameron #define IO_ACCEL_INELIGIBLE (1) 4333283b4a9bSStephen M. Cameron static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len) 4334283b4a9bSStephen M. Cameron { 4335283b4a9bSStephen M. Cameron int is_write = 0; 4336283b4a9bSStephen M. Cameron u32 block; 4337283b4a9bSStephen M. Cameron u32 block_cnt; 4338283b4a9bSStephen M. Cameron 4339283b4a9bSStephen M. Cameron /* Perform some CDB fixups if needed using 10 byte reads/writes only */ 4340283b4a9bSStephen M. Cameron switch (cdb[0]) { 4341283b4a9bSStephen M. Cameron case WRITE_6: 4342283b4a9bSStephen M. Cameron case WRITE_12: 4343283b4a9bSStephen M. Cameron is_write = 1; 4344283b4a9bSStephen M. Cameron case READ_6: 4345283b4a9bSStephen M. Cameron case READ_12: 4346283b4a9bSStephen M. Cameron if (*cdb_len == 6) { 4347c8a6c9a6SDon Brace block = get_unaligned_be16(&cdb[2]); 4348283b4a9bSStephen M. Cameron block_cnt = cdb[4]; 4349c8a6c9a6SDon Brace if (block_cnt == 0) 4350c8a6c9a6SDon Brace block_cnt = 256; 4351283b4a9bSStephen M. Cameron } else { 4352283b4a9bSStephen M. Cameron BUG_ON(*cdb_len != 12); 4353c8a6c9a6SDon Brace block = get_unaligned_be32(&cdb[2]); 4354c8a6c9a6SDon Brace block_cnt = get_unaligned_be32(&cdb[6]); 4355283b4a9bSStephen M. Cameron } 4356283b4a9bSStephen M. Cameron if (block_cnt > 0xffff) 4357283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 4358283b4a9bSStephen M. Cameron 4359283b4a9bSStephen M. Cameron cdb[0] = is_write ? WRITE_10 : READ_10; 4360283b4a9bSStephen M. Cameron cdb[1] = 0; 4361283b4a9bSStephen M. Cameron cdb[2] = (u8) (block >> 24); 4362283b4a9bSStephen M. Cameron cdb[3] = (u8) (block >> 16); 4363283b4a9bSStephen M. Cameron cdb[4] = (u8) (block >> 8); 4364283b4a9bSStephen M. Cameron cdb[5] = (u8) (block); 4365283b4a9bSStephen M. Cameron cdb[6] = 0; 4366283b4a9bSStephen M. Cameron cdb[7] = (u8) (block_cnt >> 8); 4367283b4a9bSStephen M. Cameron cdb[8] = (u8) (block_cnt); 4368283b4a9bSStephen M. Cameron cdb[9] = 0; 4369283b4a9bSStephen M. Cameron *cdb_len = 10; 4370283b4a9bSStephen M. Cameron break; 4371283b4a9bSStephen M. Cameron } 4372283b4a9bSStephen M. Cameron return 0; 4373283b4a9bSStephen M. Cameron } 4374283b4a9bSStephen M. Cameron 4375c349775eSScott Teel static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h, 4376283b4a9bSStephen M. Cameron struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 437703383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4378e1f7de0cSMatt Gates { 4379e1f7de0cSMatt Gates struct scsi_cmnd *cmd = c->scsi_cmd; 4380e1f7de0cSMatt Gates struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex]; 4381e1f7de0cSMatt Gates unsigned int len; 4382e1f7de0cSMatt Gates unsigned int total_len = 0; 4383e1f7de0cSMatt Gates struct scatterlist *sg; 4384e1f7de0cSMatt Gates u64 addr64; 4385e1f7de0cSMatt Gates int use_sg, i; 4386e1f7de0cSMatt Gates struct SGDescriptor *curr_sg; 4387e1f7de0cSMatt Gates u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE; 4388e1f7de0cSMatt Gates 4389283b4a9bSStephen M. Cameron /* TODO: implement chaining support */ 439003383736SDon Brace if (scsi_sg_count(cmd) > h->ioaccel_maxsg) { 439103383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4392283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 439303383736SDon Brace } 4394283b4a9bSStephen M. Cameron 4395e1f7de0cSMatt Gates BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX); 4396e1f7de0cSMatt Gates 439703383736SDon Brace if (fixup_ioaccel_cdb(cdb, &cdb_len)) { 439803383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4399283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 440003383736SDon Brace } 4401283b4a9bSStephen M. Cameron 4402e1f7de0cSMatt Gates c->cmd_type = CMD_IOACCEL1; 4403e1f7de0cSMatt Gates 4404e1f7de0cSMatt Gates /* Adjust the DMA address to point to the accelerated command buffer */ 4405e1f7de0cSMatt Gates c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle + 4406e1f7de0cSMatt Gates (c->cmdindex * sizeof(*cp)); 4407e1f7de0cSMatt Gates BUG_ON(c->busaddr & 0x0000007F); 4408e1f7de0cSMatt Gates 4409e1f7de0cSMatt Gates use_sg = scsi_dma_map(cmd); 441003383736SDon Brace if (use_sg < 0) { 441103383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4412e1f7de0cSMatt Gates return use_sg; 441303383736SDon Brace } 4414e1f7de0cSMatt Gates 4415e1f7de0cSMatt Gates if (use_sg) { 4416e1f7de0cSMatt Gates curr_sg = cp->SG; 4417e1f7de0cSMatt Gates scsi_for_each_sg(cmd, sg, use_sg, i) { 4418e1f7de0cSMatt Gates addr64 = (u64) sg_dma_address(sg); 4419e1f7de0cSMatt Gates len = sg_dma_len(sg); 4420e1f7de0cSMatt Gates total_len += len; 442150a0decfSStephen M. Cameron curr_sg->Addr = cpu_to_le64(addr64); 442250a0decfSStephen M. Cameron curr_sg->Len = cpu_to_le32(len); 442350a0decfSStephen M. Cameron curr_sg->Ext = cpu_to_le32(0); 4424e1f7de0cSMatt Gates curr_sg++; 4425e1f7de0cSMatt Gates } 442650a0decfSStephen M. Cameron (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST); 4427e1f7de0cSMatt Gates 4428e1f7de0cSMatt Gates switch (cmd->sc_data_direction) { 4429e1f7de0cSMatt Gates case DMA_TO_DEVICE: 4430e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_DATA_OUT; 4431e1f7de0cSMatt Gates break; 4432e1f7de0cSMatt Gates case DMA_FROM_DEVICE: 4433e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_DATA_IN; 4434e1f7de0cSMatt Gates break; 4435e1f7de0cSMatt Gates case DMA_NONE: 4436e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_NODATAXFER; 4437e1f7de0cSMatt Gates break; 4438e1f7de0cSMatt Gates default: 4439e1f7de0cSMatt Gates dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4440e1f7de0cSMatt Gates cmd->sc_data_direction); 4441e1f7de0cSMatt Gates BUG(); 4442e1f7de0cSMatt Gates break; 4443e1f7de0cSMatt Gates } 4444e1f7de0cSMatt Gates } else { 4445e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_NODATAXFER; 4446e1f7de0cSMatt Gates } 4447e1f7de0cSMatt Gates 4448c349775eSScott Teel c->Header.SGList = use_sg; 4449e1f7de0cSMatt Gates /* Fill out the command structure to submit */ 44502b08b3e9SDon Brace cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF); 44512b08b3e9SDon Brace cp->transfer_len = cpu_to_le32(total_len); 44522b08b3e9SDon Brace cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ | 44532b08b3e9SDon Brace (cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK)); 44542b08b3e9SDon Brace cp->control = cpu_to_le32(control); 4455283b4a9bSStephen M. Cameron memcpy(cp->CDB, cdb, cdb_len); 4456283b4a9bSStephen M. Cameron memcpy(cp->CISS_LUN, scsi3addr, 8); 4457c349775eSScott Teel /* Tag was already set at init time. */ 4458e1f7de0cSMatt Gates enqueue_cmd_and_start_io(h, c); 4459e1f7de0cSMatt Gates return 0; 4460e1f7de0cSMatt Gates } 4461edd16368SStephen M. Cameron 4462283b4a9bSStephen M. Cameron /* 4463283b4a9bSStephen M. Cameron * Queue a command directly to a device behind the controller using the 4464283b4a9bSStephen M. Cameron * I/O accelerator path. 4465283b4a9bSStephen M. Cameron */ 4466283b4a9bSStephen M. Cameron static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h, 4467283b4a9bSStephen M. Cameron struct CommandList *c) 4468283b4a9bSStephen M. Cameron { 4469283b4a9bSStephen M. Cameron struct scsi_cmnd *cmd = c->scsi_cmd; 4470283b4a9bSStephen M. Cameron struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4471283b4a9bSStephen M. Cameron 447203383736SDon Brace c->phys_disk = dev; 447303383736SDon Brace 4474283b4a9bSStephen M. Cameron return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle, 447503383736SDon Brace cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev); 4476283b4a9bSStephen M. Cameron } 4477283b4a9bSStephen M. Cameron 4478dd0e19f3SScott Teel /* 4479dd0e19f3SScott Teel * Set encryption parameters for the ioaccel2 request 4480dd0e19f3SScott Teel */ 4481dd0e19f3SScott Teel static void set_encrypt_ioaccel2(struct ctlr_info *h, 4482dd0e19f3SScott Teel struct CommandList *c, struct io_accel2_cmd *cp) 4483dd0e19f3SScott Teel { 4484dd0e19f3SScott Teel struct scsi_cmnd *cmd = c->scsi_cmd; 4485dd0e19f3SScott Teel struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4486dd0e19f3SScott Teel struct raid_map_data *map = &dev->raid_map; 4487dd0e19f3SScott Teel u64 first_block; 4488dd0e19f3SScott Teel 4489dd0e19f3SScott Teel /* Are we doing encryption on this device */ 44902b08b3e9SDon Brace if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON)) 4491dd0e19f3SScott Teel return; 4492dd0e19f3SScott Teel /* Set the data encryption key index. */ 4493dd0e19f3SScott Teel cp->dekindex = map->dekindex; 4494dd0e19f3SScott Teel 4495dd0e19f3SScott Teel /* Set the encryption enable flag, encoded into direction field. */ 4496dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK; 4497dd0e19f3SScott Teel 4498dd0e19f3SScott Teel /* Set encryption tweak values based on logical block address 4499dd0e19f3SScott Teel * If block size is 512, tweak value is LBA. 4500dd0e19f3SScott Teel * For other block sizes, tweak is (LBA * block size)/ 512) 4501dd0e19f3SScott Teel */ 4502dd0e19f3SScott Teel switch (cmd->cmnd[0]) { 4503dd0e19f3SScott Teel /* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */ 4504dd0e19f3SScott Teel case WRITE_6: 4505dd0e19f3SScott Teel case READ_6: 45062b08b3e9SDon Brace first_block = get_unaligned_be16(&cmd->cmnd[2]); 4507dd0e19f3SScott Teel break; 4508dd0e19f3SScott Teel case WRITE_10: 4509dd0e19f3SScott Teel case READ_10: 4510dd0e19f3SScott Teel /* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */ 4511dd0e19f3SScott Teel case WRITE_12: 4512dd0e19f3SScott Teel case READ_12: 45132b08b3e9SDon Brace first_block = get_unaligned_be32(&cmd->cmnd[2]); 4514dd0e19f3SScott Teel break; 4515dd0e19f3SScott Teel case WRITE_16: 4516dd0e19f3SScott Teel case READ_16: 45172b08b3e9SDon Brace first_block = get_unaligned_be64(&cmd->cmnd[2]); 4518dd0e19f3SScott Teel break; 4519dd0e19f3SScott Teel default: 4520dd0e19f3SScott Teel dev_err(&h->pdev->dev, 45212b08b3e9SDon Brace "ERROR: %s: size (0x%x) not supported for encryption\n", 45222b08b3e9SDon Brace __func__, cmd->cmnd[0]); 4523dd0e19f3SScott Teel BUG(); 4524dd0e19f3SScott Teel break; 4525dd0e19f3SScott Teel } 45262b08b3e9SDon Brace 45272b08b3e9SDon Brace if (le32_to_cpu(map->volume_blk_size) != 512) 45282b08b3e9SDon Brace first_block = first_block * 45292b08b3e9SDon Brace le32_to_cpu(map->volume_blk_size)/512; 45302b08b3e9SDon Brace 45312b08b3e9SDon Brace cp->tweak_lower = cpu_to_le32(first_block); 45322b08b3e9SDon Brace cp->tweak_upper = cpu_to_le32(first_block >> 32); 4533dd0e19f3SScott Teel } 4534dd0e19f3SScott Teel 4535c349775eSScott Teel static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h, 4536c349775eSScott Teel struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 453703383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4538c349775eSScott Teel { 4539c349775eSScott Teel struct scsi_cmnd *cmd = c->scsi_cmd; 4540c349775eSScott Teel struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex]; 4541c349775eSScott Teel struct ioaccel2_sg_element *curr_sg; 4542c349775eSScott Teel int use_sg, i; 4543c349775eSScott Teel struct scatterlist *sg; 4544c349775eSScott Teel u64 addr64; 4545c349775eSScott Teel u32 len; 4546c349775eSScott Teel u32 total_len = 0; 4547c349775eSScott Teel 4548d9a729f3SWebb Scales BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 4549c349775eSScott Teel 455003383736SDon Brace if (fixup_ioaccel_cdb(cdb, &cdb_len)) { 455103383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4552c349775eSScott Teel return IO_ACCEL_INELIGIBLE; 455303383736SDon Brace } 455403383736SDon Brace 4555c349775eSScott Teel c->cmd_type = CMD_IOACCEL2; 4556c349775eSScott Teel /* Adjust the DMA address to point to the accelerated command buffer */ 4557c349775eSScott Teel c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle + 4558c349775eSScott Teel (c->cmdindex * sizeof(*cp)); 4559c349775eSScott Teel BUG_ON(c->busaddr & 0x0000007F); 4560c349775eSScott Teel 4561c349775eSScott Teel memset(cp, 0, sizeof(*cp)); 4562c349775eSScott Teel cp->IU_type = IOACCEL2_IU_TYPE; 4563c349775eSScott Teel 4564c349775eSScott Teel use_sg = scsi_dma_map(cmd); 456503383736SDon Brace if (use_sg < 0) { 456603383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4567c349775eSScott Teel return use_sg; 456803383736SDon Brace } 4569c349775eSScott Teel 4570c349775eSScott Teel if (use_sg) { 4571c349775eSScott Teel curr_sg = cp->sg; 4572d9a729f3SWebb Scales if (use_sg > h->ioaccel_maxsg) { 4573d9a729f3SWebb Scales addr64 = le64_to_cpu( 4574d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list[c->cmdindex]->address); 4575d9a729f3SWebb Scales curr_sg->address = cpu_to_le64(addr64); 4576d9a729f3SWebb Scales curr_sg->length = 0; 4577d9a729f3SWebb Scales curr_sg->reserved[0] = 0; 4578d9a729f3SWebb Scales curr_sg->reserved[1] = 0; 4579d9a729f3SWebb Scales curr_sg->reserved[2] = 0; 4580d9a729f3SWebb Scales curr_sg->chain_indicator = 0x80; 4581d9a729f3SWebb Scales 4582d9a729f3SWebb Scales curr_sg = h->ioaccel2_cmd_sg_list[c->cmdindex]; 4583d9a729f3SWebb Scales } 4584c349775eSScott Teel scsi_for_each_sg(cmd, sg, use_sg, i) { 4585c349775eSScott Teel addr64 = (u64) sg_dma_address(sg); 4586c349775eSScott Teel len = sg_dma_len(sg); 4587c349775eSScott Teel total_len += len; 4588c349775eSScott Teel curr_sg->address = cpu_to_le64(addr64); 4589c349775eSScott Teel curr_sg->length = cpu_to_le32(len); 4590c349775eSScott Teel curr_sg->reserved[0] = 0; 4591c349775eSScott Teel curr_sg->reserved[1] = 0; 4592c349775eSScott Teel curr_sg->reserved[2] = 0; 4593c349775eSScott Teel curr_sg->chain_indicator = 0; 4594c349775eSScott Teel curr_sg++; 4595c349775eSScott Teel } 4596c349775eSScott Teel 4597c349775eSScott Teel switch (cmd->sc_data_direction) { 4598c349775eSScott Teel case DMA_TO_DEVICE: 4599dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4600dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_DATA_OUT; 4601c349775eSScott Teel break; 4602c349775eSScott Teel case DMA_FROM_DEVICE: 4603dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4604dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_DATA_IN; 4605c349775eSScott Teel break; 4606c349775eSScott Teel case DMA_NONE: 4607dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4608dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_NO_DATA; 4609c349775eSScott Teel break; 4610c349775eSScott Teel default: 4611c349775eSScott Teel dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4612c349775eSScott Teel cmd->sc_data_direction); 4613c349775eSScott Teel BUG(); 4614c349775eSScott Teel break; 4615c349775eSScott Teel } 4616c349775eSScott Teel } else { 4617dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4618dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_NO_DATA; 4619c349775eSScott Teel } 4620dd0e19f3SScott Teel 4621dd0e19f3SScott Teel /* Set encryption parameters, if necessary */ 4622dd0e19f3SScott Teel set_encrypt_ioaccel2(h, c, cp); 4623dd0e19f3SScott Teel 46242b08b3e9SDon Brace cp->scsi_nexus = cpu_to_le32(ioaccel_handle); 4625f2405db8SDon Brace cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT); 4626c349775eSScott Teel memcpy(cp->cdb, cdb, sizeof(cp->cdb)); 4627c349775eSScott Teel 4628c349775eSScott Teel cp->data_len = cpu_to_le32(total_len); 4629c349775eSScott Teel cp->err_ptr = cpu_to_le64(c->busaddr + 4630c349775eSScott Teel offsetof(struct io_accel2_cmd, error_data)); 463150a0decfSStephen M. Cameron cp->err_len = cpu_to_le32(sizeof(cp->error_data)); 4632c349775eSScott Teel 4633d9a729f3SWebb Scales /* fill in sg elements */ 4634d9a729f3SWebb Scales if (use_sg > h->ioaccel_maxsg) { 4635d9a729f3SWebb Scales cp->sg_count = 1; 4636a736e9b6SDon Brace cp->sg[0].length = cpu_to_le32(use_sg * sizeof(cp->sg[0])); 4637d9a729f3SWebb Scales if (hpsa_map_ioaccel2_sg_chain_block(h, cp, c)) { 4638d9a729f3SWebb Scales atomic_dec(&phys_disk->ioaccel_cmds_out); 4639d9a729f3SWebb Scales scsi_dma_unmap(cmd); 4640d9a729f3SWebb Scales return -1; 4641d9a729f3SWebb Scales } 4642d9a729f3SWebb Scales } else 4643d9a729f3SWebb Scales cp->sg_count = (u8) use_sg; 4644d9a729f3SWebb Scales 4645c349775eSScott Teel enqueue_cmd_and_start_io(h, c); 4646c349775eSScott Teel return 0; 4647c349775eSScott Teel } 4648c349775eSScott Teel 4649c349775eSScott Teel /* 4650c349775eSScott Teel * Queue a command to the correct I/O accelerator path. 4651c349775eSScott Teel */ 4652c349775eSScott Teel static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h, 4653c349775eSScott Teel struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 465403383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4655c349775eSScott Teel { 465603383736SDon Brace /* Try to honor the device's queue depth */ 465703383736SDon Brace if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) > 465803383736SDon Brace phys_disk->queue_depth) { 465903383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 466003383736SDon Brace return IO_ACCEL_INELIGIBLE; 466103383736SDon Brace } 4662c349775eSScott Teel if (h->transMethod & CFGTBL_Trans_io_accel1) 4663c349775eSScott Teel return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle, 466403383736SDon Brace cdb, cdb_len, scsi3addr, 466503383736SDon Brace phys_disk); 4666c349775eSScott Teel else 4667c349775eSScott Teel return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle, 466803383736SDon Brace cdb, cdb_len, scsi3addr, 466903383736SDon Brace phys_disk); 4670c349775eSScott Teel } 4671c349775eSScott Teel 46726b80b18fSScott Teel static void raid_map_helper(struct raid_map_data *map, 46736b80b18fSScott Teel int offload_to_mirror, u32 *map_index, u32 *current_group) 46746b80b18fSScott Teel { 46756b80b18fSScott Teel if (offload_to_mirror == 0) { 46766b80b18fSScott Teel /* use physical disk in the first mirrored group. */ 46772b08b3e9SDon Brace *map_index %= le16_to_cpu(map->data_disks_per_row); 46786b80b18fSScott Teel return; 46796b80b18fSScott Teel } 46806b80b18fSScott Teel do { 46816b80b18fSScott Teel /* determine mirror group that *map_index indicates */ 46822b08b3e9SDon Brace *current_group = *map_index / 46832b08b3e9SDon Brace le16_to_cpu(map->data_disks_per_row); 46846b80b18fSScott Teel if (offload_to_mirror == *current_group) 46856b80b18fSScott Teel continue; 46862b08b3e9SDon Brace if (*current_group < le16_to_cpu(map->layout_map_count) - 1) { 46876b80b18fSScott Teel /* select map index from next group */ 46882b08b3e9SDon Brace *map_index += le16_to_cpu(map->data_disks_per_row); 46896b80b18fSScott Teel (*current_group)++; 46906b80b18fSScott Teel } else { 46916b80b18fSScott Teel /* select map index from first group */ 46922b08b3e9SDon Brace *map_index %= le16_to_cpu(map->data_disks_per_row); 46936b80b18fSScott Teel *current_group = 0; 46946b80b18fSScott Teel } 46956b80b18fSScott Teel } while (offload_to_mirror != *current_group); 46966b80b18fSScott Teel } 46976b80b18fSScott Teel 4698283b4a9bSStephen M. Cameron /* 4699283b4a9bSStephen M. Cameron * Attempt to perform offload RAID mapping for a logical volume I/O. 4700283b4a9bSStephen M. Cameron */ 4701283b4a9bSStephen M. Cameron static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h, 4702283b4a9bSStephen M. Cameron struct CommandList *c) 4703283b4a9bSStephen M. Cameron { 4704283b4a9bSStephen M. Cameron struct scsi_cmnd *cmd = c->scsi_cmd; 4705283b4a9bSStephen M. Cameron struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4706283b4a9bSStephen M. Cameron struct raid_map_data *map = &dev->raid_map; 4707283b4a9bSStephen M. Cameron struct raid_map_disk_data *dd = &map->data[0]; 4708283b4a9bSStephen M. Cameron int is_write = 0; 4709283b4a9bSStephen M. Cameron u32 map_index; 4710283b4a9bSStephen M. Cameron u64 first_block, last_block; 4711283b4a9bSStephen M. Cameron u32 block_cnt; 4712283b4a9bSStephen M. Cameron u32 blocks_per_row; 4713283b4a9bSStephen M. Cameron u64 first_row, last_row; 4714283b4a9bSStephen M. Cameron u32 first_row_offset, last_row_offset; 4715283b4a9bSStephen M. Cameron u32 first_column, last_column; 47166b80b18fSScott Teel u64 r0_first_row, r0_last_row; 47176b80b18fSScott Teel u32 r5or6_blocks_per_row; 47186b80b18fSScott Teel u64 r5or6_first_row, r5or6_last_row; 47196b80b18fSScott Teel u32 r5or6_first_row_offset, r5or6_last_row_offset; 47206b80b18fSScott Teel u32 r5or6_first_column, r5or6_last_column; 47216b80b18fSScott Teel u32 total_disks_per_row; 47226b80b18fSScott Teel u32 stripesize; 47236b80b18fSScott Teel u32 first_group, last_group, current_group; 4724283b4a9bSStephen M. Cameron u32 map_row; 4725283b4a9bSStephen M. Cameron u32 disk_handle; 4726283b4a9bSStephen M. Cameron u64 disk_block; 4727283b4a9bSStephen M. Cameron u32 disk_block_cnt; 4728283b4a9bSStephen M. Cameron u8 cdb[16]; 4729283b4a9bSStephen M. Cameron u8 cdb_len; 47302b08b3e9SDon Brace u16 strip_size; 4731283b4a9bSStephen M. Cameron #if BITS_PER_LONG == 32 4732283b4a9bSStephen M. Cameron u64 tmpdiv; 4733283b4a9bSStephen M. Cameron #endif 47346b80b18fSScott Teel int offload_to_mirror; 4735283b4a9bSStephen M. Cameron 4736283b4a9bSStephen M. Cameron /* check for valid opcode, get LBA and block count */ 4737283b4a9bSStephen M. Cameron switch (cmd->cmnd[0]) { 4738283b4a9bSStephen M. Cameron case WRITE_6: 4739283b4a9bSStephen M. Cameron is_write = 1; 4740283b4a9bSStephen M. Cameron case READ_6: 4741c8a6c9a6SDon Brace first_block = get_unaligned_be16(&cmd->cmnd[2]); 4742283b4a9bSStephen M. Cameron block_cnt = cmd->cmnd[4]; 47433fa89a04SStephen M. Cameron if (block_cnt == 0) 47443fa89a04SStephen M. Cameron block_cnt = 256; 4745283b4a9bSStephen M. Cameron break; 4746283b4a9bSStephen M. Cameron case WRITE_10: 4747283b4a9bSStephen M. Cameron is_write = 1; 4748283b4a9bSStephen M. Cameron case READ_10: 4749283b4a9bSStephen M. Cameron first_block = 4750283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[2]) << 24) | 4751283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[3]) << 16) | 4752283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[4]) << 8) | 4753283b4a9bSStephen M. Cameron cmd->cmnd[5]; 4754283b4a9bSStephen M. Cameron block_cnt = 4755283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[7]) << 8) | 4756283b4a9bSStephen M. Cameron cmd->cmnd[8]; 4757283b4a9bSStephen M. Cameron break; 4758283b4a9bSStephen M. Cameron case WRITE_12: 4759283b4a9bSStephen M. Cameron is_write = 1; 4760283b4a9bSStephen M. Cameron case READ_12: 4761283b4a9bSStephen M. Cameron first_block = 4762283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[2]) << 24) | 4763283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[3]) << 16) | 4764283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[4]) << 8) | 4765283b4a9bSStephen M. Cameron cmd->cmnd[5]; 4766283b4a9bSStephen M. Cameron block_cnt = 4767283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[6]) << 24) | 4768283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[7]) << 16) | 4769283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[8]) << 8) | 4770283b4a9bSStephen M. Cameron cmd->cmnd[9]; 4771283b4a9bSStephen M. Cameron break; 4772283b4a9bSStephen M. Cameron case WRITE_16: 4773283b4a9bSStephen M. Cameron is_write = 1; 4774283b4a9bSStephen M. Cameron case READ_16: 4775283b4a9bSStephen M. Cameron first_block = 4776283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[2]) << 56) | 4777283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[3]) << 48) | 4778283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[4]) << 40) | 4779283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[5]) << 32) | 4780283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[6]) << 24) | 4781283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[7]) << 16) | 4782283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[8]) << 8) | 4783283b4a9bSStephen M. Cameron cmd->cmnd[9]; 4784283b4a9bSStephen M. Cameron block_cnt = 4785283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[10]) << 24) | 4786283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[11]) << 16) | 4787283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[12]) << 8) | 4788283b4a9bSStephen M. Cameron cmd->cmnd[13]; 4789283b4a9bSStephen M. Cameron break; 4790283b4a9bSStephen M. Cameron default: 4791283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */ 4792283b4a9bSStephen M. Cameron } 4793283b4a9bSStephen M. Cameron last_block = first_block + block_cnt - 1; 4794283b4a9bSStephen M. Cameron 4795283b4a9bSStephen M. Cameron /* check for write to non-RAID-0 */ 4796283b4a9bSStephen M. Cameron if (is_write && dev->raid_level != 0) 4797283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 4798283b4a9bSStephen M. Cameron 4799283b4a9bSStephen M. Cameron /* check for invalid block or wraparound */ 48002b08b3e9SDon Brace if (last_block >= le64_to_cpu(map->volume_blk_cnt) || 48012b08b3e9SDon Brace last_block < first_block) 4802283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 4803283b4a9bSStephen M. Cameron 4804283b4a9bSStephen M. Cameron /* calculate stripe information for the request */ 48052b08b3e9SDon Brace blocks_per_row = le16_to_cpu(map->data_disks_per_row) * 48062b08b3e9SDon Brace le16_to_cpu(map->strip_size); 48072b08b3e9SDon Brace strip_size = le16_to_cpu(map->strip_size); 4808283b4a9bSStephen M. Cameron #if BITS_PER_LONG == 32 4809283b4a9bSStephen M. Cameron tmpdiv = first_block; 4810283b4a9bSStephen M. Cameron (void) do_div(tmpdiv, blocks_per_row); 4811283b4a9bSStephen M. Cameron first_row = tmpdiv; 4812283b4a9bSStephen M. Cameron tmpdiv = last_block; 4813283b4a9bSStephen M. Cameron (void) do_div(tmpdiv, blocks_per_row); 4814283b4a9bSStephen M. Cameron last_row = tmpdiv; 4815283b4a9bSStephen M. Cameron first_row_offset = (u32) (first_block - (first_row * blocks_per_row)); 4816283b4a9bSStephen M. Cameron last_row_offset = (u32) (last_block - (last_row * blocks_per_row)); 4817283b4a9bSStephen M. Cameron tmpdiv = first_row_offset; 48182b08b3e9SDon Brace (void) do_div(tmpdiv, strip_size); 4819283b4a9bSStephen M. Cameron first_column = tmpdiv; 4820283b4a9bSStephen M. Cameron tmpdiv = last_row_offset; 48212b08b3e9SDon Brace (void) do_div(tmpdiv, strip_size); 4822283b4a9bSStephen M. Cameron last_column = tmpdiv; 4823283b4a9bSStephen M. Cameron #else 4824283b4a9bSStephen M. Cameron first_row = first_block / blocks_per_row; 4825283b4a9bSStephen M. Cameron last_row = last_block / blocks_per_row; 4826283b4a9bSStephen M. Cameron first_row_offset = (u32) (first_block - (first_row * blocks_per_row)); 4827283b4a9bSStephen M. Cameron last_row_offset = (u32) (last_block - (last_row * blocks_per_row)); 48282b08b3e9SDon Brace first_column = first_row_offset / strip_size; 48292b08b3e9SDon Brace last_column = last_row_offset / strip_size; 4830283b4a9bSStephen M. Cameron #endif 4831283b4a9bSStephen M. Cameron 4832283b4a9bSStephen M. Cameron /* if this isn't a single row/column then give to the controller */ 4833283b4a9bSStephen M. Cameron if ((first_row != last_row) || (first_column != last_column)) 4834283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 4835283b4a9bSStephen M. Cameron 4836283b4a9bSStephen M. Cameron /* proceeding with driver mapping */ 48372b08b3e9SDon Brace total_disks_per_row = le16_to_cpu(map->data_disks_per_row) + 48382b08b3e9SDon Brace le16_to_cpu(map->metadata_disks_per_row); 4839283b4a9bSStephen M. Cameron map_row = ((u32)(first_row >> map->parity_rotation_shift)) % 48402b08b3e9SDon Brace le16_to_cpu(map->row_cnt); 48416b80b18fSScott Teel map_index = (map_row * total_disks_per_row) + first_column; 48426b80b18fSScott Teel 48436b80b18fSScott Teel switch (dev->raid_level) { 48446b80b18fSScott Teel case HPSA_RAID_0: 48456b80b18fSScott Teel break; /* nothing special to do */ 48466b80b18fSScott Teel case HPSA_RAID_1: 48476b80b18fSScott Teel /* Handles load balance across RAID 1 members. 48486b80b18fSScott Teel * (2-drive R1 and R10 with even # of drives.) 48496b80b18fSScott Teel * Appropriate for SSDs, not optimal for HDDs 4850283b4a9bSStephen M. Cameron */ 48512b08b3e9SDon Brace BUG_ON(le16_to_cpu(map->layout_map_count) != 2); 4852283b4a9bSStephen M. Cameron if (dev->offload_to_mirror) 48532b08b3e9SDon Brace map_index += le16_to_cpu(map->data_disks_per_row); 4854283b4a9bSStephen M. Cameron dev->offload_to_mirror = !dev->offload_to_mirror; 48556b80b18fSScott Teel break; 48566b80b18fSScott Teel case HPSA_RAID_ADM: 48576b80b18fSScott Teel /* Handles N-way mirrors (R1-ADM) 48586b80b18fSScott Teel * and R10 with # of drives divisible by 3.) 48596b80b18fSScott Teel */ 48602b08b3e9SDon Brace BUG_ON(le16_to_cpu(map->layout_map_count) != 3); 48616b80b18fSScott Teel 48626b80b18fSScott Teel offload_to_mirror = dev->offload_to_mirror; 48636b80b18fSScott Teel raid_map_helper(map, offload_to_mirror, 48646b80b18fSScott Teel &map_index, ¤t_group); 48656b80b18fSScott Teel /* set mirror group to use next time */ 48666b80b18fSScott Teel offload_to_mirror = 48672b08b3e9SDon Brace (offload_to_mirror >= 48682b08b3e9SDon Brace le16_to_cpu(map->layout_map_count) - 1) 48696b80b18fSScott Teel ? 0 : offload_to_mirror + 1; 48706b80b18fSScott Teel dev->offload_to_mirror = offload_to_mirror; 48716b80b18fSScott Teel /* Avoid direct use of dev->offload_to_mirror within this 48726b80b18fSScott Teel * function since multiple threads might simultaneously 48736b80b18fSScott Teel * increment it beyond the range of dev->layout_map_count -1. 48746b80b18fSScott Teel */ 48756b80b18fSScott Teel break; 48766b80b18fSScott Teel case HPSA_RAID_5: 48776b80b18fSScott Teel case HPSA_RAID_6: 48782b08b3e9SDon Brace if (le16_to_cpu(map->layout_map_count) <= 1) 48796b80b18fSScott Teel break; 48806b80b18fSScott Teel 48816b80b18fSScott Teel /* Verify first and last block are in same RAID group */ 48826b80b18fSScott Teel r5or6_blocks_per_row = 48832b08b3e9SDon Brace le16_to_cpu(map->strip_size) * 48842b08b3e9SDon Brace le16_to_cpu(map->data_disks_per_row); 48856b80b18fSScott Teel BUG_ON(r5or6_blocks_per_row == 0); 48862b08b3e9SDon Brace stripesize = r5or6_blocks_per_row * 48872b08b3e9SDon Brace le16_to_cpu(map->layout_map_count); 48886b80b18fSScott Teel #if BITS_PER_LONG == 32 48896b80b18fSScott Teel tmpdiv = first_block; 48906b80b18fSScott Teel first_group = do_div(tmpdiv, stripesize); 48916b80b18fSScott Teel tmpdiv = first_group; 48926b80b18fSScott Teel (void) do_div(tmpdiv, r5or6_blocks_per_row); 48936b80b18fSScott Teel first_group = tmpdiv; 48946b80b18fSScott Teel tmpdiv = last_block; 48956b80b18fSScott Teel last_group = do_div(tmpdiv, stripesize); 48966b80b18fSScott Teel tmpdiv = last_group; 48976b80b18fSScott Teel (void) do_div(tmpdiv, r5or6_blocks_per_row); 48986b80b18fSScott Teel last_group = tmpdiv; 48996b80b18fSScott Teel #else 49006b80b18fSScott Teel first_group = (first_block % stripesize) / r5or6_blocks_per_row; 49016b80b18fSScott Teel last_group = (last_block % stripesize) / r5or6_blocks_per_row; 49026b80b18fSScott Teel #endif 4903000ff7c2SStephen M. Cameron if (first_group != last_group) 49046b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 49056b80b18fSScott Teel 49066b80b18fSScott Teel /* Verify request is in a single row of RAID 5/6 */ 49076b80b18fSScott Teel #if BITS_PER_LONG == 32 49086b80b18fSScott Teel tmpdiv = first_block; 49096b80b18fSScott Teel (void) do_div(tmpdiv, stripesize); 49106b80b18fSScott Teel first_row = r5or6_first_row = r0_first_row = tmpdiv; 49116b80b18fSScott Teel tmpdiv = last_block; 49126b80b18fSScott Teel (void) do_div(tmpdiv, stripesize); 49136b80b18fSScott Teel r5or6_last_row = r0_last_row = tmpdiv; 49146b80b18fSScott Teel #else 49156b80b18fSScott Teel first_row = r5or6_first_row = r0_first_row = 49166b80b18fSScott Teel first_block / stripesize; 49176b80b18fSScott Teel r5or6_last_row = r0_last_row = last_block / stripesize; 49186b80b18fSScott Teel #endif 49196b80b18fSScott Teel if (r5or6_first_row != r5or6_last_row) 49206b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 49216b80b18fSScott Teel 49226b80b18fSScott Teel 49236b80b18fSScott Teel /* Verify request is in a single column */ 49246b80b18fSScott Teel #if BITS_PER_LONG == 32 49256b80b18fSScott Teel tmpdiv = first_block; 49266b80b18fSScott Teel first_row_offset = do_div(tmpdiv, stripesize); 49276b80b18fSScott Teel tmpdiv = first_row_offset; 49286b80b18fSScott Teel first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row); 49296b80b18fSScott Teel r5or6_first_row_offset = first_row_offset; 49306b80b18fSScott Teel tmpdiv = last_block; 49316b80b18fSScott Teel r5or6_last_row_offset = do_div(tmpdiv, stripesize); 49326b80b18fSScott Teel tmpdiv = r5or6_last_row_offset; 49336b80b18fSScott Teel r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row); 49346b80b18fSScott Teel tmpdiv = r5or6_first_row_offset; 49356b80b18fSScott Teel (void) do_div(tmpdiv, map->strip_size); 49366b80b18fSScott Teel first_column = r5or6_first_column = tmpdiv; 49376b80b18fSScott Teel tmpdiv = r5or6_last_row_offset; 49386b80b18fSScott Teel (void) do_div(tmpdiv, map->strip_size); 49396b80b18fSScott Teel r5or6_last_column = tmpdiv; 49406b80b18fSScott Teel #else 49416b80b18fSScott Teel first_row_offset = r5or6_first_row_offset = 49426b80b18fSScott Teel (u32)((first_block % stripesize) % 49436b80b18fSScott Teel r5or6_blocks_per_row); 49446b80b18fSScott Teel 49456b80b18fSScott Teel r5or6_last_row_offset = 49466b80b18fSScott Teel (u32)((last_block % stripesize) % 49476b80b18fSScott Teel r5or6_blocks_per_row); 49486b80b18fSScott Teel 49496b80b18fSScott Teel first_column = r5or6_first_column = 49502b08b3e9SDon Brace r5or6_first_row_offset / le16_to_cpu(map->strip_size); 49516b80b18fSScott Teel r5or6_last_column = 49522b08b3e9SDon Brace r5or6_last_row_offset / le16_to_cpu(map->strip_size); 49536b80b18fSScott Teel #endif 49546b80b18fSScott Teel if (r5or6_first_column != r5or6_last_column) 49556b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 49566b80b18fSScott Teel 49576b80b18fSScott Teel /* Request is eligible */ 49586b80b18fSScott Teel map_row = ((u32)(first_row >> map->parity_rotation_shift)) % 49592b08b3e9SDon Brace le16_to_cpu(map->row_cnt); 49606b80b18fSScott Teel 49616b80b18fSScott Teel map_index = (first_group * 49622b08b3e9SDon Brace (le16_to_cpu(map->row_cnt) * total_disks_per_row)) + 49636b80b18fSScott Teel (map_row * total_disks_per_row) + first_column; 49646b80b18fSScott Teel break; 49656b80b18fSScott Teel default: 49666b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 4967283b4a9bSStephen M. Cameron } 49686b80b18fSScott Teel 496907543e0cSStephen Cameron if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES)) 497007543e0cSStephen Cameron return IO_ACCEL_INELIGIBLE; 497107543e0cSStephen Cameron 497203383736SDon Brace c->phys_disk = dev->phys_disk[map_index]; 4973c3390df4SDon Brace if (!c->phys_disk) 4974c3390df4SDon Brace return IO_ACCEL_INELIGIBLE; 497503383736SDon Brace 4976283b4a9bSStephen M. Cameron disk_handle = dd[map_index].ioaccel_handle; 49772b08b3e9SDon Brace disk_block = le64_to_cpu(map->disk_starting_blk) + 49782b08b3e9SDon Brace first_row * le16_to_cpu(map->strip_size) + 49792b08b3e9SDon Brace (first_row_offset - first_column * 49802b08b3e9SDon Brace le16_to_cpu(map->strip_size)); 4981283b4a9bSStephen M. Cameron disk_block_cnt = block_cnt; 4982283b4a9bSStephen M. Cameron 4983283b4a9bSStephen M. Cameron /* handle differing logical/physical block sizes */ 4984283b4a9bSStephen M. Cameron if (map->phys_blk_shift) { 4985283b4a9bSStephen M. Cameron disk_block <<= map->phys_blk_shift; 4986283b4a9bSStephen M. Cameron disk_block_cnt <<= map->phys_blk_shift; 4987283b4a9bSStephen M. Cameron } 4988283b4a9bSStephen M. Cameron BUG_ON(disk_block_cnt > 0xffff); 4989283b4a9bSStephen M. Cameron 4990283b4a9bSStephen M. Cameron /* build the new CDB for the physical disk I/O */ 4991283b4a9bSStephen M. Cameron if (disk_block > 0xffffffff) { 4992283b4a9bSStephen M. Cameron cdb[0] = is_write ? WRITE_16 : READ_16; 4993283b4a9bSStephen M. Cameron cdb[1] = 0; 4994283b4a9bSStephen M. Cameron cdb[2] = (u8) (disk_block >> 56); 4995283b4a9bSStephen M. Cameron cdb[3] = (u8) (disk_block >> 48); 4996283b4a9bSStephen M. Cameron cdb[4] = (u8) (disk_block >> 40); 4997283b4a9bSStephen M. Cameron cdb[5] = (u8) (disk_block >> 32); 4998283b4a9bSStephen M. Cameron cdb[6] = (u8) (disk_block >> 24); 4999283b4a9bSStephen M. Cameron cdb[7] = (u8) (disk_block >> 16); 5000283b4a9bSStephen M. Cameron cdb[8] = (u8) (disk_block >> 8); 5001283b4a9bSStephen M. Cameron cdb[9] = (u8) (disk_block); 5002283b4a9bSStephen M. Cameron cdb[10] = (u8) (disk_block_cnt >> 24); 5003283b4a9bSStephen M. Cameron cdb[11] = (u8) (disk_block_cnt >> 16); 5004283b4a9bSStephen M. Cameron cdb[12] = (u8) (disk_block_cnt >> 8); 5005283b4a9bSStephen M. Cameron cdb[13] = (u8) (disk_block_cnt); 5006283b4a9bSStephen M. Cameron cdb[14] = 0; 5007283b4a9bSStephen M. Cameron cdb[15] = 0; 5008283b4a9bSStephen M. Cameron cdb_len = 16; 5009283b4a9bSStephen M. Cameron } else { 5010283b4a9bSStephen M. Cameron cdb[0] = is_write ? WRITE_10 : READ_10; 5011283b4a9bSStephen M. Cameron cdb[1] = 0; 5012283b4a9bSStephen M. Cameron cdb[2] = (u8) (disk_block >> 24); 5013283b4a9bSStephen M. Cameron cdb[3] = (u8) (disk_block >> 16); 5014283b4a9bSStephen M. Cameron cdb[4] = (u8) (disk_block >> 8); 5015283b4a9bSStephen M. Cameron cdb[5] = (u8) (disk_block); 5016283b4a9bSStephen M. Cameron cdb[6] = 0; 5017283b4a9bSStephen M. Cameron cdb[7] = (u8) (disk_block_cnt >> 8); 5018283b4a9bSStephen M. Cameron cdb[8] = (u8) (disk_block_cnt); 5019283b4a9bSStephen M. Cameron cdb[9] = 0; 5020283b4a9bSStephen M. Cameron cdb_len = 10; 5021283b4a9bSStephen M. Cameron } 5022283b4a9bSStephen M. Cameron return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len, 502303383736SDon Brace dev->scsi3addr, 502403383736SDon Brace dev->phys_disk[map_index]); 5025283b4a9bSStephen M. Cameron } 5026283b4a9bSStephen M. Cameron 502725163bd5SWebb Scales /* 502825163bd5SWebb Scales * Submit commands down the "normal" RAID stack path 502925163bd5SWebb Scales * All callers to hpsa_ciss_submit must check lockup_detected 503025163bd5SWebb Scales * beforehand, before (opt.) and after calling cmd_alloc 503125163bd5SWebb Scales */ 5032574f05d3SStephen Cameron static int hpsa_ciss_submit(struct ctlr_info *h, 5033574f05d3SStephen Cameron struct CommandList *c, struct scsi_cmnd *cmd, 5034574f05d3SStephen Cameron unsigned char scsi3addr[]) 5035edd16368SStephen M. Cameron { 5036edd16368SStephen M. Cameron cmd->host_scribble = (unsigned char *) c; 5037edd16368SStephen M. Cameron c->cmd_type = CMD_SCSI; 5038edd16368SStephen M. Cameron c->scsi_cmd = cmd; 5039edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; /* unused in simple mode */ 5040edd16368SStephen M. Cameron memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8); 5041f2405db8SDon Brace c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT)); 5042edd16368SStephen M. Cameron 5043edd16368SStephen M. Cameron /* Fill in the request block... */ 5044edd16368SStephen M. Cameron 5045edd16368SStephen M. Cameron c->Request.Timeout = 0; 5046edd16368SStephen M. Cameron BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB)); 5047edd16368SStephen M. Cameron c->Request.CDBLen = cmd->cmd_len; 5048edd16368SStephen M. Cameron memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len); 5049edd16368SStephen M. Cameron switch (cmd->sc_data_direction) { 5050edd16368SStephen M. Cameron case DMA_TO_DEVICE: 5051a505b86fSStephen M. Cameron c->Request.type_attr_dir = 5052a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE); 5053edd16368SStephen M. Cameron break; 5054edd16368SStephen M. Cameron case DMA_FROM_DEVICE: 5055a505b86fSStephen M. Cameron c->Request.type_attr_dir = 5056a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ); 5057edd16368SStephen M. Cameron break; 5058edd16368SStephen M. Cameron case DMA_NONE: 5059a505b86fSStephen M. Cameron c->Request.type_attr_dir = 5060a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE); 5061edd16368SStephen M. Cameron break; 5062edd16368SStephen M. Cameron case DMA_BIDIRECTIONAL: 5063edd16368SStephen M. Cameron /* This can happen if a buggy application does a scsi passthru 5064edd16368SStephen M. Cameron * and sets both inlen and outlen to non-zero. ( see 5065edd16368SStephen M. Cameron * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() ) 5066edd16368SStephen M. Cameron */ 5067edd16368SStephen M. Cameron 5068a505b86fSStephen M. Cameron c->Request.type_attr_dir = 5069a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD); 5070edd16368SStephen M. Cameron /* This is technically wrong, and hpsa controllers should 5071edd16368SStephen M. Cameron * reject it with CMD_INVALID, which is the most correct 5072edd16368SStephen M. Cameron * response, but non-fibre backends appear to let it 5073edd16368SStephen M. Cameron * slide by, and give the same results as if this field 5074edd16368SStephen M. Cameron * were set correctly. Either way is acceptable for 5075edd16368SStephen M. Cameron * our purposes here. 5076edd16368SStephen M. Cameron */ 5077edd16368SStephen M. Cameron 5078edd16368SStephen M. Cameron break; 5079edd16368SStephen M. Cameron 5080edd16368SStephen M. Cameron default: 5081edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "unknown data direction: %d\n", 5082edd16368SStephen M. Cameron cmd->sc_data_direction); 5083edd16368SStephen M. Cameron BUG(); 5084edd16368SStephen M. Cameron break; 5085edd16368SStephen M. Cameron } 5086edd16368SStephen M. Cameron 508733a2ffceSStephen M. Cameron if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */ 508873153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 5089edd16368SStephen M. Cameron return SCSI_MLQUEUE_HOST_BUSY; 5090edd16368SStephen M. Cameron } 5091edd16368SStephen M. Cameron enqueue_cmd_and_start_io(h, c); 5092edd16368SStephen M. Cameron /* the cmd'll come back via intr handler in complete_scsi_command() */ 5093edd16368SStephen M. Cameron return 0; 5094edd16368SStephen M. Cameron } 5095edd16368SStephen M. Cameron 5096360c73bdSStephen Cameron static void hpsa_cmd_init(struct ctlr_info *h, int index, 5097360c73bdSStephen Cameron struct CommandList *c) 5098360c73bdSStephen Cameron { 5099360c73bdSStephen Cameron dma_addr_t cmd_dma_handle, err_dma_handle; 5100360c73bdSStephen Cameron 5101360c73bdSStephen Cameron /* Zero out all of commandlist except the last field, refcount */ 5102360c73bdSStephen Cameron memset(c, 0, offsetof(struct CommandList, refcount)); 5103360c73bdSStephen Cameron c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT)); 5104360c73bdSStephen Cameron cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c); 5105360c73bdSStephen Cameron c->err_info = h->errinfo_pool + index; 5106360c73bdSStephen Cameron memset(c->err_info, 0, sizeof(*c->err_info)); 5107360c73bdSStephen Cameron err_dma_handle = h->errinfo_pool_dhandle 5108360c73bdSStephen Cameron + index * sizeof(*c->err_info); 5109360c73bdSStephen Cameron c->cmdindex = index; 5110360c73bdSStephen Cameron c->busaddr = (u32) cmd_dma_handle; 5111360c73bdSStephen Cameron c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle); 5112360c73bdSStephen Cameron c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info)); 5113360c73bdSStephen Cameron c->h = h; 5114a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_IDLE; 5115360c73bdSStephen Cameron } 5116360c73bdSStephen Cameron 5117360c73bdSStephen Cameron static void hpsa_preinitialize_commands(struct ctlr_info *h) 5118360c73bdSStephen Cameron { 5119360c73bdSStephen Cameron int i; 5120360c73bdSStephen Cameron 5121360c73bdSStephen Cameron for (i = 0; i < h->nr_cmds; i++) { 5122360c73bdSStephen Cameron struct CommandList *c = h->cmd_pool + i; 5123360c73bdSStephen Cameron 5124360c73bdSStephen Cameron hpsa_cmd_init(h, i, c); 5125360c73bdSStephen Cameron atomic_set(&c->refcount, 0); 5126360c73bdSStephen Cameron } 5127360c73bdSStephen Cameron } 5128360c73bdSStephen Cameron 5129360c73bdSStephen Cameron static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index, 5130360c73bdSStephen Cameron struct CommandList *c) 5131360c73bdSStephen Cameron { 5132360c73bdSStephen Cameron dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c); 5133360c73bdSStephen Cameron 513473153fe5SWebb Scales BUG_ON(c->cmdindex != index); 513573153fe5SWebb Scales 5136360c73bdSStephen Cameron memset(c->Request.CDB, 0, sizeof(c->Request.CDB)); 5137360c73bdSStephen Cameron memset(c->err_info, 0, sizeof(*c->err_info)); 5138360c73bdSStephen Cameron c->busaddr = (u32) cmd_dma_handle; 5139360c73bdSStephen Cameron } 5140360c73bdSStephen Cameron 5141592a0ad5SWebb Scales static int hpsa_ioaccel_submit(struct ctlr_info *h, 5142592a0ad5SWebb Scales struct CommandList *c, struct scsi_cmnd *cmd, 5143592a0ad5SWebb Scales unsigned char *scsi3addr) 5144592a0ad5SWebb Scales { 5145592a0ad5SWebb Scales struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 5146592a0ad5SWebb Scales int rc = IO_ACCEL_INELIGIBLE; 5147592a0ad5SWebb Scales 5148592a0ad5SWebb Scales cmd->host_scribble = (unsigned char *) c; 5149592a0ad5SWebb Scales 5150592a0ad5SWebb Scales if (dev->offload_enabled) { 5151592a0ad5SWebb Scales hpsa_cmd_init(h, c->cmdindex, c); 5152592a0ad5SWebb Scales c->cmd_type = CMD_SCSI; 5153592a0ad5SWebb Scales c->scsi_cmd = cmd; 5154592a0ad5SWebb Scales rc = hpsa_scsi_ioaccel_raid_map(h, c); 5155592a0ad5SWebb Scales if (rc < 0) /* scsi_dma_map failed. */ 5156592a0ad5SWebb Scales rc = SCSI_MLQUEUE_HOST_BUSY; 5157a3144e0bSJoe Handzik } else if (dev->hba_ioaccel_enabled) { 5158592a0ad5SWebb Scales hpsa_cmd_init(h, c->cmdindex, c); 5159592a0ad5SWebb Scales c->cmd_type = CMD_SCSI; 5160592a0ad5SWebb Scales c->scsi_cmd = cmd; 5161592a0ad5SWebb Scales rc = hpsa_scsi_ioaccel_direct_map(h, c); 5162592a0ad5SWebb Scales if (rc < 0) /* scsi_dma_map failed. */ 5163592a0ad5SWebb Scales rc = SCSI_MLQUEUE_HOST_BUSY; 5164592a0ad5SWebb Scales } 5165592a0ad5SWebb Scales return rc; 5166592a0ad5SWebb Scales } 5167592a0ad5SWebb Scales 5168080ef1ccSDon Brace static void hpsa_command_resubmit_worker(struct work_struct *work) 5169080ef1ccSDon Brace { 5170080ef1ccSDon Brace struct scsi_cmnd *cmd; 5171080ef1ccSDon Brace struct hpsa_scsi_dev_t *dev; 51728a0ff92cSWebb Scales struct CommandList *c = container_of(work, struct CommandList, work); 5173080ef1ccSDon Brace 5174080ef1ccSDon Brace cmd = c->scsi_cmd; 5175080ef1ccSDon Brace dev = cmd->device->hostdata; 5176080ef1ccSDon Brace if (!dev) { 5177080ef1ccSDon Brace cmd->result = DID_NO_CONNECT << 16; 51788a0ff92cSWebb Scales return hpsa_cmd_free_and_done(c->h, c, cmd); 5179080ef1ccSDon Brace } 5180d604f533SWebb Scales if (c->reset_pending) 5181d604f533SWebb Scales return hpsa_cmd_resolve_and_free(c->h, c); 5182a58e7e53SWebb Scales if (c->abort_pending) 5183a58e7e53SWebb Scales return hpsa_cmd_abort_and_free(c->h, c, cmd); 5184592a0ad5SWebb Scales if (c->cmd_type == CMD_IOACCEL2) { 5185592a0ad5SWebb Scales struct ctlr_info *h = c->h; 5186592a0ad5SWebb Scales struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 5187592a0ad5SWebb Scales int rc; 5188592a0ad5SWebb Scales 5189592a0ad5SWebb Scales if (c2->error_data.serv_response == 5190592a0ad5SWebb Scales IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL) { 5191592a0ad5SWebb Scales rc = hpsa_ioaccel_submit(h, c, cmd, dev->scsi3addr); 5192592a0ad5SWebb Scales if (rc == 0) 5193592a0ad5SWebb Scales return; 5194592a0ad5SWebb Scales if (rc == SCSI_MLQUEUE_HOST_BUSY) { 5195592a0ad5SWebb Scales /* 5196592a0ad5SWebb Scales * If we get here, it means dma mapping failed. 5197592a0ad5SWebb Scales * Try again via scsi mid layer, which will 5198592a0ad5SWebb Scales * then get SCSI_MLQUEUE_HOST_BUSY. 5199592a0ad5SWebb Scales */ 5200592a0ad5SWebb Scales cmd->result = DID_IMM_RETRY << 16; 52018a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, c, cmd); 5202592a0ad5SWebb Scales } 5203592a0ad5SWebb Scales /* else, fall thru and resubmit down CISS path */ 5204592a0ad5SWebb Scales } 5205592a0ad5SWebb Scales } 5206360c73bdSStephen Cameron hpsa_cmd_partial_init(c->h, c->cmdindex, c); 5207080ef1ccSDon Brace if (hpsa_ciss_submit(c->h, c, cmd, dev->scsi3addr)) { 5208080ef1ccSDon Brace /* 5209080ef1ccSDon Brace * If we get here, it means dma mapping failed. Try 5210080ef1ccSDon Brace * again via scsi mid layer, which will then get 5211080ef1ccSDon Brace * SCSI_MLQUEUE_HOST_BUSY. 5212592a0ad5SWebb Scales * 5213592a0ad5SWebb Scales * hpsa_ciss_submit will have already freed c 5214592a0ad5SWebb Scales * if it encountered a dma mapping failure. 5215080ef1ccSDon Brace */ 5216080ef1ccSDon Brace cmd->result = DID_IMM_RETRY << 16; 5217080ef1ccSDon Brace cmd->scsi_done(cmd); 5218080ef1ccSDon Brace } 5219080ef1ccSDon Brace } 5220080ef1ccSDon Brace 5221574f05d3SStephen Cameron /* Running in struct Scsi_Host->host_lock less mode */ 5222574f05d3SStephen Cameron static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd) 5223574f05d3SStephen Cameron { 5224574f05d3SStephen Cameron struct ctlr_info *h; 5225574f05d3SStephen Cameron struct hpsa_scsi_dev_t *dev; 5226574f05d3SStephen Cameron unsigned char scsi3addr[8]; 5227574f05d3SStephen Cameron struct CommandList *c; 5228574f05d3SStephen Cameron int rc = 0; 5229574f05d3SStephen Cameron 5230574f05d3SStephen Cameron /* Get the ptr to our adapter structure out of cmd->host. */ 5231574f05d3SStephen Cameron h = sdev_to_hba(cmd->device); 523273153fe5SWebb Scales 523373153fe5SWebb Scales BUG_ON(cmd->request->tag < 0); 523473153fe5SWebb Scales 5235574f05d3SStephen Cameron dev = cmd->device->hostdata; 5236574f05d3SStephen Cameron if (!dev) { 5237574f05d3SStephen Cameron cmd->result = DID_NO_CONNECT << 16; 5238574f05d3SStephen Cameron cmd->scsi_done(cmd); 5239574f05d3SStephen Cameron return 0; 5240574f05d3SStephen Cameron } 524173153fe5SWebb Scales 5242574f05d3SStephen Cameron memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr)); 5243574f05d3SStephen Cameron 5244574f05d3SStephen Cameron if (unlikely(lockup_detected(h))) { 524525163bd5SWebb Scales cmd->result = DID_NO_CONNECT << 16; 5246574f05d3SStephen Cameron cmd->scsi_done(cmd); 5247574f05d3SStephen Cameron return 0; 5248574f05d3SStephen Cameron } 524973153fe5SWebb Scales c = cmd_tagged_alloc(h, cmd); 5250574f05d3SStephen Cameron 5251407863cbSStephen Cameron /* 5252407863cbSStephen Cameron * Call alternate submit routine for I/O accelerated commands. 5253574f05d3SStephen Cameron * Retries always go down the normal I/O path. 5254574f05d3SStephen Cameron */ 5255574f05d3SStephen Cameron if (likely(cmd->retries == 0 && 5256574f05d3SStephen Cameron cmd->request->cmd_type == REQ_TYPE_FS && 5257574f05d3SStephen Cameron h->acciopath_status)) { 5258592a0ad5SWebb Scales rc = hpsa_ioaccel_submit(h, c, cmd, scsi3addr); 5259574f05d3SStephen Cameron if (rc == 0) 5260592a0ad5SWebb Scales return 0; 5261592a0ad5SWebb Scales if (rc == SCSI_MLQUEUE_HOST_BUSY) { 526273153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 5263574f05d3SStephen Cameron return SCSI_MLQUEUE_HOST_BUSY; 5264574f05d3SStephen Cameron } 5265574f05d3SStephen Cameron } 5266574f05d3SStephen Cameron return hpsa_ciss_submit(h, c, cmd, scsi3addr); 5267574f05d3SStephen Cameron } 5268574f05d3SStephen Cameron 52698ebc9248SWebb Scales static void hpsa_scan_complete(struct ctlr_info *h) 52705f389360SStephen M. Cameron { 52715f389360SStephen M. Cameron unsigned long flags; 52725f389360SStephen M. Cameron 52735f389360SStephen M. Cameron spin_lock_irqsave(&h->scan_lock, flags); 52745f389360SStephen M. Cameron h->scan_finished = 1; 52755f389360SStephen M. Cameron wake_up_all(&h->scan_wait_queue); 52765f389360SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 52775f389360SStephen M. Cameron } 52785f389360SStephen M. Cameron 5279a08a8471SStephen M. Cameron static void hpsa_scan_start(struct Scsi_Host *sh) 5280a08a8471SStephen M. Cameron { 5281a08a8471SStephen M. Cameron struct ctlr_info *h = shost_to_hba(sh); 5282a08a8471SStephen M. Cameron unsigned long flags; 5283a08a8471SStephen M. Cameron 52848ebc9248SWebb Scales /* 52858ebc9248SWebb Scales * Don't let rescans be initiated on a controller known to be locked 52868ebc9248SWebb Scales * up. If the controller locks up *during* a rescan, that thread is 52878ebc9248SWebb Scales * probably hosed, but at least we can prevent new rescan threads from 52888ebc9248SWebb Scales * piling up on a locked up controller. 52898ebc9248SWebb Scales */ 52908ebc9248SWebb Scales if (unlikely(lockup_detected(h))) 52918ebc9248SWebb Scales return hpsa_scan_complete(h); 52925f389360SStephen M. Cameron 5293a08a8471SStephen M. Cameron /* wait until any scan already in progress is finished. */ 5294a08a8471SStephen M. Cameron while (1) { 5295a08a8471SStephen M. Cameron spin_lock_irqsave(&h->scan_lock, flags); 5296a08a8471SStephen M. Cameron if (h->scan_finished) 5297a08a8471SStephen M. Cameron break; 5298a08a8471SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 5299a08a8471SStephen M. Cameron wait_event(h->scan_wait_queue, h->scan_finished); 5300a08a8471SStephen M. Cameron /* Note: We don't need to worry about a race between this 5301a08a8471SStephen M. Cameron * thread and driver unload because the midlayer will 5302a08a8471SStephen M. Cameron * have incremented the reference count, so unload won't 5303a08a8471SStephen M. Cameron * happen if we're in here. 5304a08a8471SStephen M. Cameron */ 5305a08a8471SStephen M. Cameron } 5306a08a8471SStephen M. Cameron h->scan_finished = 0; /* mark scan as in progress */ 5307a08a8471SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 5308a08a8471SStephen M. Cameron 53098ebc9248SWebb Scales if (unlikely(lockup_detected(h))) 53108ebc9248SWebb Scales return hpsa_scan_complete(h); 53115f389360SStephen M. Cameron 53128aa60681SDon Brace hpsa_update_scsi_devices(h); 5313a08a8471SStephen M. Cameron 53148ebc9248SWebb Scales hpsa_scan_complete(h); 5315a08a8471SStephen M. Cameron } 5316a08a8471SStephen M. Cameron 53177c0a0229SDon Brace static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth) 53187c0a0229SDon Brace { 531903383736SDon Brace struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata; 532003383736SDon Brace 532103383736SDon Brace if (!logical_drive) 532203383736SDon Brace return -ENODEV; 53237c0a0229SDon Brace 53247c0a0229SDon Brace if (qdepth < 1) 53257c0a0229SDon Brace qdepth = 1; 532603383736SDon Brace else if (qdepth > logical_drive->queue_depth) 532703383736SDon Brace qdepth = logical_drive->queue_depth; 532803383736SDon Brace 532903383736SDon Brace return scsi_change_queue_depth(sdev, qdepth); 53307c0a0229SDon Brace } 53317c0a0229SDon Brace 5332a08a8471SStephen M. Cameron static int hpsa_scan_finished(struct Scsi_Host *sh, 5333a08a8471SStephen M. Cameron unsigned long elapsed_time) 5334a08a8471SStephen M. Cameron { 5335a08a8471SStephen M. Cameron struct ctlr_info *h = shost_to_hba(sh); 5336a08a8471SStephen M. Cameron unsigned long flags; 5337a08a8471SStephen M. Cameron int finished; 5338a08a8471SStephen M. Cameron 5339a08a8471SStephen M. Cameron spin_lock_irqsave(&h->scan_lock, flags); 5340a08a8471SStephen M. Cameron finished = h->scan_finished; 5341a08a8471SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 5342a08a8471SStephen M. Cameron return finished; 5343a08a8471SStephen M. Cameron } 5344a08a8471SStephen M. Cameron 53452946e82bSRobert Elliott static int hpsa_scsi_host_alloc(struct ctlr_info *h) 5346edd16368SStephen M. Cameron { 5347b705690dSStephen M. Cameron struct Scsi_Host *sh; 5348edd16368SStephen M. Cameron 5349b705690dSStephen M. Cameron sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h)); 53502946e82bSRobert Elliott if (sh == NULL) { 53512946e82bSRobert Elliott dev_err(&h->pdev->dev, "scsi_host_alloc failed\n"); 53522946e82bSRobert Elliott return -ENOMEM; 53532946e82bSRobert Elliott } 5354b705690dSStephen M. Cameron 5355b705690dSStephen M. Cameron sh->io_port = 0; 5356b705690dSStephen M. Cameron sh->n_io_port = 0; 5357b705690dSStephen M. Cameron sh->this_id = -1; 5358b705690dSStephen M. Cameron sh->max_channel = 3; 5359b705690dSStephen M. Cameron sh->max_cmd_len = MAX_COMMAND_SIZE; 5360b705690dSStephen M. Cameron sh->max_lun = HPSA_MAX_LUN; 5361b705690dSStephen M. Cameron sh->max_id = HPSA_MAX_LUN; 536241ce4c35SStephen Cameron sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS; 5363d54c5c24SStephen Cameron sh->cmd_per_lun = sh->can_queue; 5364b705690dSStephen M. Cameron sh->sg_tablesize = h->maxsgentries; 5365d04e62b9SKevin Barnett sh->transportt = hpsa_sas_transport_template; 5366b705690dSStephen M. Cameron sh->hostdata[0] = (unsigned long) h; 5367b705690dSStephen M. Cameron sh->irq = h->intr[h->intr_mode]; 5368b705690dSStephen M. Cameron sh->unique_id = sh->irq; 536964d513acSChristoph Hellwig 53702946e82bSRobert Elliott h->scsi_host = sh; 53712946e82bSRobert Elliott return 0; 53722946e82bSRobert Elliott } 53732946e82bSRobert Elliott 53742946e82bSRobert Elliott static int hpsa_scsi_add_host(struct ctlr_info *h) 53752946e82bSRobert Elliott { 53762946e82bSRobert Elliott int rv; 53772946e82bSRobert Elliott 53782946e82bSRobert Elliott rv = scsi_add_host(h->scsi_host, &h->pdev->dev); 53792946e82bSRobert Elliott if (rv) { 53802946e82bSRobert Elliott dev_err(&h->pdev->dev, "scsi_add_host failed\n"); 53812946e82bSRobert Elliott return rv; 53822946e82bSRobert Elliott } 53832946e82bSRobert Elliott scsi_scan_host(h->scsi_host); 53842946e82bSRobert Elliott return 0; 5385edd16368SStephen M. Cameron } 5386edd16368SStephen M. Cameron 5387b69324ffSWebb Scales /* 538873153fe5SWebb Scales * The block layer has already gone to the trouble of picking out a unique, 538973153fe5SWebb Scales * small-integer tag for this request. We use an offset from that value as 539073153fe5SWebb Scales * an index to select our command block. (The offset allows us to reserve the 539173153fe5SWebb Scales * low-numbered entries for our own uses.) 539273153fe5SWebb Scales */ 539373153fe5SWebb Scales static int hpsa_get_cmd_index(struct scsi_cmnd *scmd) 539473153fe5SWebb Scales { 539573153fe5SWebb Scales int idx = scmd->request->tag; 539673153fe5SWebb Scales 539773153fe5SWebb Scales if (idx < 0) 539873153fe5SWebb Scales return idx; 539973153fe5SWebb Scales 540073153fe5SWebb Scales /* Offset to leave space for internal cmds. */ 540173153fe5SWebb Scales return idx += HPSA_NRESERVED_CMDS; 540273153fe5SWebb Scales } 540373153fe5SWebb Scales 540473153fe5SWebb Scales /* 5405b69324ffSWebb Scales * Send a TEST_UNIT_READY command to the specified LUN using the specified 5406b69324ffSWebb Scales * reply queue; returns zero if the unit is ready, and non-zero otherwise. 5407b69324ffSWebb Scales */ 5408b69324ffSWebb Scales static int hpsa_send_test_unit_ready(struct ctlr_info *h, 5409b69324ffSWebb Scales struct CommandList *c, unsigned char lunaddr[], 5410b69324ffSWebb Scales int reply_queue) 5411edd16368SStephen M. Cameron { 54128919358eSTomas Henzl int rc; 5413edd16368SStephen M. Cameron 5414a2dac136SStephen M. Cameron /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */ 5415a2dac136SStephen M. Cameron (void) fill_cmd(c, TEST_UNIT_READY, h, 5416a2dac136SStephen M. Cameron NULL, 0, 0, lunaddr, TYPE_CMD); 5417b69324ffSWebb Scales rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT); 541825163bd5SWebb Scales if (rc) 5419b69324ffSWebb Scales return rc; 5420edd16368SStephen M. Cameron /* no unmap needed here because no data xfer. */ 5421edd16368SStephen M. Cameron 5422b69324ffSWebb Scales /* Check if the unit is already ready. */ 5423edd16368SStephen M. Cameron if (c->err_info->CommandStatus == CMD_SUCCESS) 5424b69324ffSWebb Scales return 0; 5425edd16368SStephen M. Cameron 5426b69324ffSWebb Scales /* 5427b69324ffSWebb Scales * The first command sent after reset will receive "unit attention" to 5428b69324ffSWebb Scales * indicate that the LUN has been reset...this is actually what we're 5429b69324ffSWebb Scales * looking for (but, success is good too). 5430b69324ffSWebb Scales */ 5431edd16368SStephen M. Cameron if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 5432edd16368SStephen M. Cameron c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION && 5433edd16368SStephen M. Cameron (c->err_info->SenseInfo[2] == NO_SENSE || 5434edd16368SStephen M. Cameron c->err_info->SenseInfo[2] == UNIT_ATTENTION)) 5435b69324ffSWebb Scales return 0; 5436b69324ffSWebb Scales 5437b69324ffSWebb Scales return 1; 5438b69324ffSWebb Scales } 5439b69324ffSWebb Scales 5440b69324ffSWebb Scales /* 5441b69324ffSWebb Scales * Wait for a TEST_UNIT_READY command to complete, retrying as necessary; 5442b69324ffSWebb Scales * returns zero when the unit is ready, and non-zero when giving up. 5443b69324ffSWebb Scales */ 5444b69324ffSWebb Scales static int hpsa_wait_for_test_unit_ready(struct ctlr_info *h, 5445b69324ffSWebb Scales struct CommandList *c, 5446b69324ffSWebb Scales unsigned char lunaddr[], int reply_queue) 5447b69324ffSWebb Scales { 5448b69324ffSWebb Scales int rc; 5449b69324ffSWebb Scales int count = 0; 5450b69324ffSWebb Scales int waittime = 1; /* seconds */ 5451b69324ffSWebb Scales 5452b69324ffSWebb Scales /* Send test unit ready until device ready, or give up. */ 5453b69324ffSWebb Scales for (count = 0; count < HPSA_TUR_RETRY_LIMIT; count++) { 5454b69324ffSWebb Scales 5455b69324ffSWebb Scales /* 5456b69324ffSWebb Scales * Wait for a bit. do this first, because if we send 5457b69324ffSWebb Scales * the TUR right away, the reset will just abort it. 5458b69324ffSWebb Scales */ 5459b69324ffSWebb Scales msleep(1000 * waittime); 5460b69324ffSWebb Scales 5461b69324ffSWebb Scales rc = hpsa_send_test_unit_ready(h, c, lunaddr, reply_queue); 5462b69324ffSWebb Scales if (!rc) 5463edd16368SStephen M. Cameron break; 5464b69324ffSWebb Scales 5465b69324ffSWebb Scales /* Increase wait time with each try, up to a point. */ 5466b69324ffSWebb Scales if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS) 5467b69324ffSWebb Scales waittime *= 2; 5468b69324ffSWebb Scales 5469b69324ffSWebb Scales dev_warn(&h->pdev->dev, 5470b69324ffSWebb Scales "waiting %d secs for device to become ready.\n", 5471b69324ffSWebb Scales waittime); 5472b69324ffSWebb Scales } 5473b69324ffSWebb Scales 5474b69324ffSWebb Scales return rc; 5475b69324ffSWebb Scales } 5476b69324ffSWebb Scales 5477b69324ffSWebb Scales static int wait_for_device_to_become_ready(struct ctlr_info *h, 5478b69324ffSWebb Scales unsigned char lunaddr[], 5479b69324ffSWebb Scales int reply_queue) 5480b69324ffSWebb Scales { 5481b69324ffSWebb Scales int first_queue; 5482b69324ffSWebb Scales int last_queue; 5483b69324ffSWebb Scales int rq; 5484b69324ffSWebb Scales int rc = 0; 5485b69324ffSWebb Scales struct CommandList *c; 5486b69324ffSWebb Scales 5487b69324ffSWebb Scales c = cmd_alloc(h); 5488b69324ffSWebb Scales 5489b69324ffSWebb Scales /* 5490b69324ffSWebb Scales * If no specific reply queue was requested, then send the TUR 5491b69324ffSWebb Scales * repeatedly, requesting a reply on each reply queue; otherwise execute 5492b69324ffSWebb Scales * the loop exactly once using only the specified queue. 5493b69324ffSWebb Scales */ 5494b69324ffSWebb Scales if (reply_queue == DEFAULT_REPLY_QUEUE) { 5495b69324ffSWebb Scales first_queue = 0; 5496b69324ffSWebb Scales last_queue = h->nreply_queues - 1; 5497b69324ffSWebb Scales } else { 5498b69324ffSWebb Scales first_queue = reply_queue; 5499b69324ffSWebb Scales last_queue = reply_queue; 5500b69324ffSWebb Scales } 5501b69324ffSWebb Scales 5502b69324ffSWebb Scales for (rq = first_queue; rq <= last_queue; rq++) { 5503b69324ffSWebb Scales rc = hpsa_wait_for_test_unit_ready(h, c, lunaddr, rq); 5504b69324ffSWebb Scales if (rc) 5505b69324ffSWebb Scales break; 5506edd16368SStephen M. Cameron } 5507edd16368SStephen M. Cameron 5508edd16368SStephen M. Cameron if (rc) 5509edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "giving up on device.\n"); 5510edd16368SStephen M. Cameron else 5511edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "device is ready.\n"); 5512edd16368SStephen M. Cameron 551345fcb86eSStephen Cameron cmd_free(h, c); 5514edd16368SStephen M. Cameron return rc; 5515edd16368SStephen M. Cameron } 5516edd16368SStephen M. Cameron 5517edd16368SStephen M. Cameron /* Need at least one of these error handlers to keep ../scsi/hosts.c from 5518edd16368SStephen M. Cameron * complaining. Doing a host- or bus-reset can't do anything good here. 5519edd16368SStephen M. Cameron */ 5520edd16368SStephen M. Cameron static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd) 5521edd16368SStephen M. Cameron { 5522edd16368SStephen M. Cameron int rc; 5523edd16368SStephen M. Cameron struct ctlr_info *h; 5524edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *dev; 55250b9b7b6eSScott Teel u8 reset_type; 55262dc127bbSDan Carpenter char msg[48]; 5527edd16368SStephen M. Cameron 5528edd16368SStephen M. Cameron /* find the controller to which the command to be aborted was sent */ 5529edd16368SStephen M. Cameron h = sdev_to_hba(scsicmd->device); 5530edd16368SStephen M. Cameron if (h == NULL) /* paranoia */ 5531edd16368SStephen M. Cameron return FAILED; 5532e345893bSDon Brace 5533e345893bSDon Brace if (lockup_detected(h)) 5534e345893bSDon Brace return FAILED; 5535e345893bSDon Brace 5536edd16368SStephen M. Cameron dev = scsicmd->device->hostdata; 5537edd16368SStephen M. Cameron if (!dev) { 5538d604f533SWebb Scales dev_err(&h->pdev->dev, "%s: device lookup failed\n", __func__); 5539edd16368SStephen M. Cameron return FAILED; 5540edd16368SStephen M. Cameron } 554125163bd5SWebb Scales 554225163bd5SWebb Scales /* if controller locked up, we can guarantee command won't complete */ 554325163bd5SWebb Scales if (lockup_detected(h)) { 55442dc127bbSDan Carpenter snprintf(msg, sizeof(msg), 55452dc127bbSDan Carpenter "cmd %d RESET FAILED, lockup detected", 554673153fe5SWebb Scales hpsa_get_cmd_index(scsicmd)); 554773153fe5SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 554825163bd5SWebb Scales return FAILED; 554925163bd5SWebb Scales } 555025163bd5SWebb Scales 555125163bd5SWebb Scales /* this reset request might be the result of a lockup; check */ 555225163bd5SWebb Scales if (detect_controller_lockup(h)) { 55532dc127bbSDan Carpenter snprintf(msg, sizeof(msg), 55542dc127bbSDan Carpenter "cmd %d RESET FAILED, new lockup detected", 555573153fe5SWebb Scales hpsa_get_cmd_index(scsicmd)); 555673153fe5SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 555725163bd5SWebb Scales return FAILED; 555825163bd5SWebb Scales } 555925163bd5SWebb Scales 5560d604f533SWebb Scales /* Do not attempt on controller */ 5561d604f533SWebb Scales if (is_hba_lunid(dev->scsi3addr)) 5562d604f533SWebb Scales return SUCCESS; 5563d604f533SWebb Scales 55640b9b7b6eSScott Teel if (is_logical_dev_addr_mode(dev->scsi3addr)) 55650b9b7b6eSScott Teel reset_type = HPSA_DEVICE_RESET_MSG; 55660b9b7b6eSScott Teel else 55670b9b7b6eSScott Teel reset_type = HPSA_PHYS_TARGET_RESET; 55680b9b7b6eSScott Teel 55690b9b7b6eSScott Teel sprintf(msg, "resetting %s", 55700b9b7b6eSScott Teel reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical "); 55710b9b7b6eSScott Teel hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 557225163bd5SWebb Scales 5573da03ded0SDon Brace h->reset_in_progress = 1; 5574d416b0c7SStephen M. Cameron 5575edd16368SStephen M. Cameron /* send a reset to the SCSI LUN which the command was sent to */ 55760b9b7b6eSScott Teel rc = hpsa_do_reset(h, dev, dev->scsi3addr, reset_type, 557725163bd5SWebb Scales DEFAULT_REPLY_QUEUE); 55780b9b7b6eSScott Teel sprintf(msg, "reset %s %s", 55790b9b7b6eSScott Teel reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ", 55802dc127bbSDan Carpenter rc == 0 ? "completed successfully" : "failed"); 5581d604f533SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 5582da03ded0SDon Brace h->reset_in_progress = 0; 5583d604f533SWebb Scales return rc == 0 ? SUCCESS : FAILED; 5584edd16368SStephen M. Cameron } 5585edd16368SStephen M. Cameron 55866cba3f19SStephen M. Cameron static void swizzle_abort_tag(u8 *tag) 55876cba3f19SStephen M. Cameron { 55886cba3f19SStephen M. Cameron u8 original_tag[8]; 55896cba3f19SStephen M. Cameron 55906cba3f19SStephen M. Cameron memcpy(original_tag, tag, 8); 55916cba3f19SStephen M. Cameron tag[0] = original_tag[3]; 55926cba3f19SStephen M. Cameron tag[1] = original_tag[2]; 55936cba3f19SStephen M. Cameron tag[2] = original_tag[1]; 55946cba3f19SStephen M. Cameron tag[3] = original_tag[0]; 55956cba3f19SStephen M. Cameron tag[4] = original_tag[7]; 55966cba3f19SStephen M. Cameron tag[5] = original_tag[6]; 55976cba3f19SStephen M. Cameron tag[6] = original_tag[5]; 55986cba3f19SStephen M. Cameron tag[7] = original_tag[4]; 55996cba3f19SStephen M. Cameron } 56006cba3f19SStephen M. Cameron 560117eb87d2SScott Teel static void hpsa_get_tag(struct ctlr_info *h, 56022b08b3e9SDon Brace struct CommandList *c, __le32 *taglower, __le32 *tagupper) 560317eb87d2SScott Teel { 56042b08b3e9SDon Brace u64 tag; 560517eb87d2SScott Teel if (c->cmd_type == CMD_IOACCEL1) { 560617eb87d2SScott Teel struct io_accel1_cmd *cm1 = (struct io_accel1_cmd *) 560717eb87d2SScott Teel &h->ioaccel_cmd_pool[c->cmdindex]; 56082b08b3e9SDon Brace tag = le64_to_cpu(cm1->tag); 56092b08b3e9SDon Brace *tagupper = cpu_to_le32(tag >> 32); 56102b08b3e9SDon Brace *taglower = cpu_to_le32(tag); 561154b6e9e9SScott Teel return; 561254b6e9e9SScott Teel } 561354b6e9e9SScott Teel if (c->cmd_type == CMD_IOACCEL2) { 561454b6e9e9SScott Teel struct io_accel2_cmd *cm2 = (struct io_accel2_cmd *) 561554b6e9e9SScott Teel &h->ioaccel2_cmd_pool[c->cmdindex]; 5616dd0e19f3SScott Teel /* upper tag not used in ioaccel2 mode */ 5617dd0e19f3SScott Teel memset(tagupper, 0, sizeof(*tagupper)); 5618dd0e19f3SScott Teel *taglower = cm2->Tag; 561954b6e9e9SScott Teel return; 562054b6e9e9SScott Teel } 56212b08b3e9SDon Brace tag = le64_to_cpu(c->Header.tag); 56222b08b3e9SDon Brace *tagupper = cpu_to_le32(tag >> 32); 56232b08b3e9SDon Brace *taglower = cpu_to_le32(tag); 562417eb87d2SScott Teel } 562554b6e9e9SScott Teel 562675167d2cSStephen M. Cameron static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr, 56279b5c48c2SStephen Cameron struct CommandList *abort, int reply_queue) 562875167d2cSStephen M. Cameron { 562975167d2cSStephen M. Cameron int rc = IO_OK; 563075167d2cSStephen M. Cameron struct CommandList *c; 563175167d2cSStephen M. Cameron struct ErrorInfo *ei; 56322b08b3e9SDon Brace __le32 tagupper, taglower; 563375167d2cSStephen M. Cameron 563445fcb86eSStephen Cameron c = cmd_alloc(h); 563575167d2cSStephen M. Cameron 5636a2dac136SStephen M. Cameron /* fill_cmd can't fail here, no buffer to map */ 56379b5c48c2SStephen Cameron (void) fill_cmd(c, HPSA_ABORT_MSG, h, &abort->Header.tag, 5638a2dac136SStephen M. Cameron 0, 0, scsi3addr, TYPE_MSG); 56399b5c48c2SStephen Cameron if (h->needs_abort_tags_swizzled) 56406cba3f19SStephen M. Cameron swizzle_abort_tag(&c->Request.CDB[4]); 564125163bd5SWebb Scales (void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT); 564217eb87d2SScott Teel hpsa_get_tag(h, abort, &taglower, &tagupper); 564325163bd5SWebb Scales dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd(abort) completed.\n", 564417eb87d2SScott Teel __func__, tagupper, taglower); 564575167d2cSStephen M. Cameron /* no unmap needed here because no data xfer. */ 564675167d2cSStephen M. Cameron 564775167d2cSStephen M. Cameron ei = c->err_info; 564875167d2cSStephen M. Cameron switch (ei->CommandStatus) { 564975167d2cSStephen M. Cameron case CMD_SUCCESS: 565075167d2cSStephen M. Cameron break; 56519437ac43SStephen Cameron case CMD_TMF_STATUS: 56529437ac43SStephen Cameron rc = hpsa_evaluate_tmf_status(h, c); 56539437ac43SStephen Cameron break; 565475167d2cSStephen M. Cameron case CMD_UNABORTABLE: /* Very common, don't make noise. */ 565575167d2cSStephen M. Cameron rc = -1; 565675167d2cSStephen M. Cameron break; 565775167d2cSStephen M. Cameron default: 565875167d2cSStephen M. Cameron dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n", 565917eb87d2SScott Teel __func__, tagupper, taglower); 5660d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 566175167d2cSStephen M. Cameron rc = -1; 566275167d2cSStephen M. Cameron break; 566375167d2cSStephen M. Cameron } 566445fcb86eSStephen Cameron cmd_free(h, c); 5665dd0e19f3SScott Teel dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", 5666dd0e19f3SScott Teel __func__, tagupper, taglower); 566775167d2cSStephen M. Cameron return rc; 566875167d2cSStephen M. Cameron } 566975167d2cSStephen M. Cameron 56708be986ccSStephen Cameron static void setup_ioaccel2_abort_cmd(struct CommandList *c, struct ctlr_info *h, 56718be986ccSStephen Cameron struct CommandList *command_to_abort, int reply_queue) 56728be986ccSStephen Cameron { 56738be986ccSStephen Cameron struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 56748be986ccSStephen Cameron struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2; 56758be986ccSStephen Cameron struct io_accel2_cmd *c2a = 56768be986ccSStephen Cameron &h->ioaccel2_cmd_pool[command_to_abort->cmdindex]; 5677a58e7e53SWebb Scales struct scsi_cmnd *scmd = command_to_abort->scsi_cmd; 56788be986ccSStephen Cameron struct hpsa_scsi_dev_t *dev = scmd->device->hostdata; 56798be986ccSStephen Cameron 56808be986ccSStephen Cameron /* 56818be986ccSStephen Cameron * We're overlaying struct hpsa_tmf_struct on top of something which 56828be986ccSStephen Cameron * was allocated as a struct io_accel2_cmd, so we better be sure it 56838be986ccSStephen Cameron * actually fits, and doesn't overrun the error info space. 56848be986ccSStephen Cameron */ 56858be986ccSStephen Cameron BUILD_BUG_ON(sizeof(struct hpsa_tmf_struct) > 56868be986ccSStephen Cameron sizeof(struct io_accel2_cmd)); 56878be986ccSStephen Cameron BUG_ON(offsetof(struct io_accel2_cmd, error_data) < 56888be986ccSStephen Cameron offsetof(struct hpsa_tmf_struct, error_len) + 56898be986ccSStephen Cameron sizeof(ac->error_len)); 56908be986ccSStephen Cameron 56918be986ccSStephen Cameron c->cmd_type = IOACCEL2_TMF; 5692a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 5693a58e7e53SWebb Scales 56948be986ccSStephen Cameron /* Adjust the DMA address to point to the accelerated command buffer */ 56958be986ccSStephen Cameron c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle + 56968be986ccSStephen Cameron (c->cmdindex * sizeof(struct io_accel2_cmd)); 56978be986ccSStephen Cameron BUG_ON(c->busaddr & 0x0000007F); 56988be986ccSStephen Cameron 56998be986ccSStephen Cameron memset(ac, 0, sizeof(*c2)); /* yes this is correct */ 57008be986ccSStephen Cameron ac->iu_type = IOACCEL2_IU_TMF_TYPE; 57018be986ccSStephen Cameron ac->reply_queue = reply_queue; 57028be986ccSStephen Cameron ac->tmf = IOACCEL2_TMF_ABORT; 57038be986ccSStephen Cameron ac->it_nexus = cpu_to_le32(dev->ioaccel_handle); 57048be986ccSStephen Cameron memset(ac->lun_id, 0, sizeof(ac->lun_id)); 57058be986ccSStephen Cameron ac->tag = cpu_to_le64(c->cmdindex << DIRECT_LOOKUP_SHIFT); 57068be986ccSStephen Cameron ac->abort_tag = cpu_to_le64(le32_to_cpu(c2a->Tag)); 57078be986ccSStephen Cameron ac->error_ptr = cpu_to_le64(c->busaddr + 57088be986ccSStephen Cameron offsetof(struct io_accel2_cmd, error_data)); 57098be986ccSStephen Cameron ac->error_len = cpu_to_le32(sizeof(c2->error_data)); 57108be986ccSStephen Cameron } 57118be986ccSStephen Cameron 571254b6e9e9SScott Teel /* ioaccel2 path firmware cannot handle abort task requests. 571354b6e9e9SScott Teel * Change abort requests to physical target reset, and send to the 571454b6e9e9SScott Teel * address of the physical disk used for the ioaccel 2 command. 571554b6e9e9SScott Teel * Return 0 on success (IO_OK) 571654b6e9e9SScott Teel * -1 on failure 571754b6e9e9SScott Teel */ 571854b6e9e9SScott Teel 571954b6e9e9SScott Teel static int hpsa_send_reset_as_abort_ioaccel2(struct ctlr_info *h, 572025163bd5SWebb Scales unsigned char *scsi3addr, struct CommandList *abort, int reply_queue) 572154b6e9e9SScott Teel { 572254b6e9e9SScott Teel int rc = IO_OK; 572354b6e9e9SScott Teel struct scsi_cmnd *scmd; /* scsi command within request being aborted */ 572454b6e9e9SScott Teel struct hpsa_scsi_dev_t *dev; /* device to which scsi cmd was sent */ 572554b6e9e9SScott Teel unsigned char phys_scsi3addr[8]; /* addr of phys disk with volume */ 572654b6e9e9SScott Teel unsigned char *psa = &phys_scsi3addr[0]; 572754b6e9e9SScott Teel 572854b6e9e9SScott Teel /* Get a pointer to the hpsa logical device. */ 57297fa3030cSStephen Cameron scmd = abort->scsi_cmd; 573054b6e9e9SScott Teel dev = (struct hpsa_scsi_dev_t *)(scmd->device->hostdata); 573154b6e9e9SScott Teel if (dev == NULL) { 573254b6e9e9SScott Teel dev_warn(&h->pdev->dev, 573354b6e9e9SScott Teel "Cannot abort: no device pointer for command.\n"); 573454b6e9e9SScott Teel return -1; /* not abortable */ 573554b6e9e9SScott Teel } 573654b6e9e9SScott Teel 57372ba8bfc8SStephen M. Cameron if (h->raid_offload_debug > 0) 57382ba8bfc8SStephen M. Cameron dev_info(&h->pdev->dev, 57390d96ef5fSWebb Scales "scsi %d:%d:%d:%d %s scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 57402ba8bfc8SStephen M. Cameron h->scsi_host->host_no, dev->bus, dev->target, dev->lun, 57410d96ef5fSWebb Scales "Reset as abort", 57422ba8bfc8SStephen M. Cameron scsi3addr[0], scsi3addr[1], scsi3addr[2], scsi3addr[3], 57432ba8bfc8SStephen M. Cameron scsi3addr[4], scsi3addr[5], scsi3addr[6], scsi3addr[7]); 57442ba8bfc8SStephen M. Cameron 574554b6e9e9SScott Teel if (!dev->offload_enabled) { 574654b6e9e9SScott Teel dev_warn(&h->pdev->dev, 574754b6e9e9SScott Teel "Can't abort: device is not operating in HP SSD Smart Path mode.\n"); 574854b6e9e9SScott Teel return -1; /* not abortable */ 574954b6e9e9SScott Teel } 575054b6e9e9SScott Teel 575154b6e9e9SScott Teel /* Incoming scsi3addr is logical addr. We need physical disk addr. */ 575254b6e9e9SScott Teel if (!hpsa_get_pdisk_of_ioaccel2(h, abort, psa)) { 575354b6e9e9SScott Teel dev_warn(&h->pdev->dev, "Can't abort: Failed lookup of physical address.\n"); 575454b6e9e9SScott Teel return -1; /* not abortable */ 575554b6e9e9SScott Teel } 575654b6e9e9SScott Teel 575754b6e9e9SScott Teel /* send the reset */ 57582ba8bfc8SStephen M. Cameron if (h->raid_offload_debug > 0) 57592ba8bfc8SStephen M. Cameron dev_info(&h->pdev->dev, 57602ba8bfc8SStephen M. Cameron "Reset as abort: Resetting physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 57612ba8bfc8SStephen M. Cameron psa[0], psa[1], psa[2], psa[3], 57622ba8bfc8SStephen M. Cameron psa[4], psa[5], psa[6], psa[7]); 5763d604f533SWebb Scales rc = hpsa_do_reset(h, dev, psa, HPSA_RESET_TYPE_TARGET, reply_queue); 576454b6e9e9SScott Teel if (rc != 0) { 576554b6e9e9SScott Teel dev_warn(&h->pdev->dev, 576654b6e9e9SScott Teel "Reset as abort: Failed on physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 576754b6e9e9SScott Teel psa[0], psa[1], psa[2], psa[3], 576854b6e9e9SScott Teel psa[4], psa[5], psa[6], psa[7]); 576954b6e9e9SScott Teel return rc; /* failed to reset */ 577054b6e9e9SScott Teel } 577154b6e9e9SScott Teel 577254b6e9e9SScott Teel /* wait for device to recover */ 5773b69324ffSWebb Scales if (wait_for_device_to_become_ready(h, psa, reply_queue) != 0) { 577454b6e9e9SScott Teel dev_warn(&h->pdev->dev, 577554b6e9e9SScott Teel "Reset as abort: Failed: Device never recovered from reset: 0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 577654b6e9e9SScott Teel psa[0], psa[1], psa[2], psa[3], 577754b6e9e9SScott Teel psa[4], psa[5], psa[6], psa[7]); 577854b6e9e9SScott Teel return -1; /* failed to recover */ 577954b6e9e9SScott Teel } 578054b6e9e9SScott Teel 578154b6e9e9SScott Teel /* device recovered */ 578254b6e9e9SScott Teel dev_info(&h->pdev->dev, 578354b6e9e9SScott Teel "Reset as abort: Device recovered from reset: scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 578454b6e9e9SScott Teel psa[0], psa[1], psa[2], psa[3], 578554b6e9e9SScott Teel psa[4], psa[5], psa[6], psa[7]); 578654b6e9e9SScott Teel 578754b6e9e9SScott Teel return rc; /* success */ 578854b6e9e9SScott Teel } 578954b6e9e9SScott Teel 57908be986ccSStephen Cameron static int hpsa_send_abort_ioaccel2(struct ctlr_info *h, 57918be986ccSStephen Cameron struct CommandList *abort, int reply_queue) 57928be986ccSStephen Cameron { 57938be986ccSStephen Cameron int rc = IO_OK; 57948be986ccSStephen Cameron struct CommandList *c; 57958be986ccSStephen Cameron __le32 taglower, tagupper; 57968be986ccSStephen Cameron struct hpsa_scsi_dev_t *dev; 57978be986ccSStephen Cameron struct io_accel2_cmd *c2; 57988be986ccSStephen Cameron 57998be986ccSStephen Cameron dev = abort->scsi_cmd->device->hostdata; 58008be986ccSStephen Cameron if (!dev->offload_enabled && !dev->hba_ioaccel_enabled) 58018be986ccSStephen Cameron return -1; 58028be986ccSStephen Cameron 58038be986ccSStephen Cameron c = cmd_alloc(h); 58048be986ccSStephen Cameron setup_ioaccel2_abort_cmd(c, h, abort, reply_queue); 58058be986ccSStephen Cameron c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 58068be986ccSStephen Cameron (void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT); 58078be986ccSStephen Cameron hpsa_get_tag(h, abort, &taglower, &tagupper); 58088be986ccSStephen Cameron dev_dbg(&h->pdev->dev, 58098be986ccSStephen Cameron "%s: Tag:0x%08x:%08x: do_simple_cmd(ioaccel2 abort) completed.\n", 58108be986ccSStephen Cameron __func__, tagupper, taglower); 58118be986ccSStephen Cameron /* no unmap needed here because no data xfer. */ 58128be986ccSStephen Cameron 58138be986ccSStephen Cameron dev_dbg(&h->pdev->dev, 58148be986ccSStephen Cameron "%s: Tag:0x%08x:%08x: abort service response = 0x%02x.\n", 58158be986ccSStephen Cameron __func__, tagupper, taglower, c2->error_data.serv_response); 58168be986ccSStephen Cameron switch (c2->error_data.serv_response) { 58178be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE: 58188be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS: 58198be986ccSStephen Cameron rc = 0; 58208be986ccSStephen Cameron break; 58218be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_TMF_REJECTED: 58228be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_FAILURE: 58238be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN: 58248be986ccSStephen Cameron rc = -1; 58258be986ccSStephen Cameron break; 58268be986ccSStephen Cameron default: 58278be986ccSStephen Cameron dev_warn(&h->pdev->dev, 58288be986ccSStephen Cameron "%s: Tag:0x%08x:%08x: unknown abort service response 0x%02x\n", 58298be986ccSStephen Cameron __func__, tagupper, taglower, 58308be986ccSStephen Cameron c2->error_data.serv_response); 58318be986ccSStephen Cameron rc = -1; 58328be986ccSStephen Cameron } 58338be986ccSStephen Cameron cmd_free(h, c); 58348be986ccSStephen Cameron dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", __func__, 58358be986ccSStephen Cameron tagupper, taglower); 58368be986ccSStephen Cameron return rc; 58378be986ccSStephen Cameron } 58388be986ccSStephen Cameron 58396cba3f19SStephen M. Cameron static int hpsa_send_abort_both_ways(struct ctlr_info *h, 584039f3deb2SDon Brace struct hpsa_scsi_dev_t *dev, struct CommandList *abort, int reply_queue) 58416cba3f19SStephen M. Cameron { 58428be986ccSStephen Cameron /* 58438be986ccSStephen Cameron * ioccelerator mode 2 commands should be aborted via the 584454b6e9e9SScott Teel * accelerated path, since RAID path is unaware of these commands, 58458be986ccSStephen Cameron * but not all underlying firmware can handle abort TMF. 58468be986ccSStephen Cameron * Change abort to physical device reset when abort TMF is unsupported. 584754b6e9e9SScott Teel */ 58488be986ccSStephen Cameron if (abort->cmd_type == CMD_IOACCEL2) { 584939f3deb2SDon Brace if ((HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags) || 585039f3deb2SDon Brace dev->physical_device) 58518be986ccSStephen Cameron return hpsa_send_abort_ioaccel2(h, abort, 58528be986ccSStephen Cameron reply_queue); 58538be986ccSStephen Cameron else 585439f3deb2SDon Brace return hpsa_send_reset_as_abort_ioaccel2(h, 585539f3deb2SDon Brace dev->scsi3addr, 585625163bd5SWebb Scales abort, reply_queue); 58578be986ccSStephen Cameron } 585839f3deb2SDon Brace return hpsa_send_abort(h, dev->scsi3addr, abort, reply_queue); 585925163bd5SWebb Scales } 586025163bd5SWebb Scales 586125163bd5SWebb Scales /* Find out which reply queue a command was meant to return on */ 586225163bd5SWebb Scales static int hpsa_extract_reply_queue(struct ctlr_info *h, 586325163bd5SWebb Scales struct CommandList *c) 586425163bd5SWebb Scales { 586525163bd5SWebb Scales if (c->cmd_type == CMD_IOACCEL2) 586625163bd5SWebb Scales return h->ioaccel2_cmd_pool[c->cmdindex].reply_queue; 586725163bd5SWebb Scales return c->Header.ReplyQueue; 58686cba3f19SStephen M. Cameron } 58696cba3f19SStephen M. Cameron 58709b5c48c2SStephen Cameron /* 58719b5c48c2SStephen Cameron * Limit concurrency of abort commands to prevent 58729b5c48c2SStephen Cameron * over-subscription of commands 58739b5c48c2SStephen Cameron */ 58749b5c48c2SStephen Cameron static inline int wait_for_available_abort_cmd(struct ctlr_info *h) 58759b5c48c2SStephen Cameron { 58769b5c48c2SStephen Cameron #define ABORT_CMD_WAIT_MSECS 5000 58779b5c48c2SStephen Cameron return !wait_event_timeout(h->abort_cmd_wait_queue, 58789b5c48c2SStephen Cameron atomic_dec_if_positive(&h->abort_cmds_available) >= 0, 58799b5c48c2SStephen Cameron msecs_to_jiffies(ABORT_CMD_WAIT_MSECS)); 58809b5c48c2SStephen Cameron } 58819b5c48c2SStephen Cameron 588275167d2cSStephen M. Cameron /* Send an abort for the specified command. 588375167d2cSStephen M. Cameron * If the device and controller support it, 588475167d2cSStephen M. Cameron * send a task abort request. 588575167d2cSStephen M. Cameron */ 588675167d2cSStephen M. Cameron static int hpsa_eh_abort_handler(struct scsi_cmnd *sc) 588775167d2cSStephen M. Cameron { 588875167d2cSStephen M. Cameron 5889a58e7e53SWebb Scales int rc; 589075167d2cSStephen M. Cameron struct ctlr_info *h; 589175167d2cSStephen M. Cameron struct hpsa_scsi_dev_t *dev; 589275167d2cSStephen M. Cameron struct CommandList *abort; /* pointer to command to be aborted */ 589375167d2cSStephen M. Cameron struct scsi_cmnd *as; /* ptr to scsi cmd inside aborted command. */ 589475167d2cSStephen M. Cameron char msg[256]; /* For debug messaging. */ 589575167d2cSStephen M. Cameron int ml = 0; 58962b08b3e9SDon Brace __le32 tagupper, taglower; 589725163bd5SWebb Scales int refcount, reply_queue; 589825163bd5SWebb Scales 589925163bd5SWebb Scales if (sc == NULL) 590025163bd5SWebb Scales return FAILED; 590175167d2cSStephen M. Cameron 59029b5c48c2SStephen Cameron if (sc->device == NULL) 59039b5c48c2SStephen Cameron return FAILED; 59049b5c48c2SStephen Cameron 590575167d2cSStephen M. Cameron /* Find the controller of the command to be aborted */ 590675167d2cSStephen M. Cameron h = sdev_to_hba(sc->device); 59079b5c48c2SStephen Cameron if (h == NULL) 590875167d2cSStephen M. Cameron return FAILED; 590975167d2cSStephen M. Cameron 591025163bd5SWebb Scales /* Find the device of the command to be aborted */ 591125163bd5SWebb Scales dev = sc->device->hostdata; 591225163bd5SWebb Scales if (!dev) { 591325163bd5SWebb Scales dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n", 591425163bd5SWebb Scales msg); 5915e345893bSDon Brace return FAILED; 591625163bd5SWebb Scales } 591725163bd5SWebb Scales 591825163bd5SWebb Scales /* If controller locked up, we can guarantee command won't complete */ 591925163bd5SWebb Scales if (lockup_detected(h)) { 592025163bd5SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, 592125163bd5SWebb Scales "ABORT FAILED, lockup detected"); 592225163bd5SWebb Scales return FAILED; 592325163bd5SWebb Scales } 592425163bd5SWebb Scales 592525163bd5SWebb Scales /* This is a good time to check if controller lockup has occurred */ 592625163bd5SWebb Scales if (detect_controller_lockup(h)) { 592725163bd5SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, 592825163bd5SWebb Scales "ABORT FAILED, new lockup detected"); 592925163bd5SWebb Scales return FAILED; 593025163bd5SWebb Scales } 5931e345893bSDon Brace 593275167d2cSStephen M. Cameron /* Check that controller supports some kind of task abort */ 593375167d2cSStephen M. Cameron if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) && 593475167d2cSStephen M. Cameron !(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags)) 593575167d2cSStephen M. Cameron return FAILED; 593675167d2cSStephen M. Cameron 593775167d2cSStephen M. Cameron memset(msg, 0, sizeof(msg)); 59384b761557SRobert Elliott ml += sprintf(msg+ml, "scsi %d:%d:%d:%llu %s %p", 593975167d2cSStephen M. Cameron h->scsi_host->host_no, sc->device->channel, 59400d96ef5fSWebb Scales sc->device->id, sc->device->lun, 59414b761557SRobert Elliott "Aborting command", sc); 594275167d2cSStephen M. Cameron 594375167d2cSStephen M. Cameron /* Get SCSI command to be aborted */ 594475167d2cSStephen M. Cameron abort = (struct CommandList *) sc->host_scribble; 594575167d2cSStephen M. Cameron if (abort == NULL) { 5946281a7fd0SWebb Scales /* This can happen if the command already completed. */ 5947281a7fd0SWebb Scales return SUCCESS; 5948281a7fd0SWebb Scales } 5949281a7fd0SWebb Scales refcount = atomic_inc_return(&abort->refcount); 5950281a7fd0SWebb Scales if (refcount == 1) { /* Command is done already. */ 5951281a7fd0SWebb Scales cmd_free(h, abort); 5952281a7fd0SWebb Scales return SUCCESS; 595375167d2cSStephen M. Cameron } 59549b5c48c2SStephen Cameron 59559b5c48c2SStephen Cameron /* Don't bother trying the abort if we know it won't work. */ 59569b5c48c2SStephen Cameron if (abort->cmd_type != CMD_IOACCEL2 && 59579b5c48c2SStephen Cameron abort->cmd_type != CMD_IOACCEL1 && !dev->supports_aborts) { 59589b5c48c2SStephen Cameron cmd_free(h, abort); 59599b5c48c2SStephen Cameron return FAILED; 59609b5c48c2SStephen Cameron } 59619b5c48c2SStephen Cameron 5962a58e7e53SWebb Scales /* 5963a58e7e53SWebb Scales * Check that we're aborting the right command. 5964a58e7e53SWebb Scales * It's possible the CommandList already completed and got re-used. 5965a58e7e53SWebb Scales */ 5966a58e7e53SWebb Scales if (abort->scsi_cmd != sc) { 5967a58e7e53SWebb Scales cmd_free(h, abort); 5968a58e7e53SWebb Scales return SUCCESS; 5969a58e7e53SWebb Scales } 5970a58e7e53SWebb Scales 5971a58e7e53SWebb Scales abort->abort_pending = true; 597217eb87d2SScott Teel hpsa_get_tag(h, abort, &taglower, &tagupper); 597325163bd5SWebb Scales reply_queue = hpsa_extract_reply_queue(h, abort); 597417eb87d2SScott Teel ml += sprintf(msg+ml, "Tag:0x%08x:%08x ", tagupper, taglower); 59757fa3030cSStephen Cameron as = abort->scsi_cmd; 597675167d2cSStephen M. Cameron if (as != NULL) 59774b761557SRobert Elliott ml += sprintf(msg+ml, 59784b761557SRobert Elliott "CDBLen: %d CDB: 0x%02x%02x... SN: 0x%lx ", 59794b761557SRobert Elliott as->cmd_len, as->cmnd[0], as->cmnd[1], 59804b761557SRobert Elliott as->serial_number); 59814b761557SRobert Elliott dev_warn(&h->pdev->dev, "%s BEING SENT\n", msg); 59820d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, "Aborting command"); 59834b761557SRobert Elliott 598475167d2cSStephen M. Cameron /* 598575167d2cSStephen M. Cameron * Command is in flight, or possibly already completed 598675167d2cSStephen M. Cameron * by the firmware (but not to the scsi mid layer) but we can't 598775167d2cSStephen M. Cameron * distinguish which. Send the abort down. 598875167d2cSStephen M. Cameron */ 59899b5c48c2SStephen Cameron if (wait_for_available_abort_cmd(h)) { 59909b5c48c2SStephen Cameron dev_warn(&h->pdev->dev, 59914b761557SRobert Elliott "%s FAILED, timeout waiting for an abort command to become available.\n", 59924b761557SRobert Elliott msg); 59939b5c48c2SStephen Cameron cmd_free(h, abort); 59949b5c48c2SStephen Cameron return FAILED; 59959b5c48c2SStephen Cameron } 599639f3deb2SDon Brace rc = hpsa_send_abort_both_ways(h, dev, abort, reply_queue); 59979b5c48c2SStephen Cameron atomic_inc(&h->abort_cmds_available); 59989b5c48c2SStephen Cameron wake_up_all(&h->abort_cmd_wait_queue); 599975167d2cSStephen M. Cameron if (rc != 0) { 60004b761557SRobert Elliott dev_warn(&h->pdev->dev, "%s SENT, FAILED\n", msg); 60010d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, 60020d96ef5fSWebb Scales "FAILED to abort command"); 6003281a7fd0SWebb Scales cmd_free(h, abort); 600475167d2cSStephen M. Cameron return FAILED; 600575167d2cSStephen M. Cameron } 60064b761557SRobert Elliott dev_info(&h->pdev->dev, "%s SENT, SUCCESS\n", msg); 6007d604f533SWebb Scales wait_event(h->event_sync_wait_queue, 6008a58e7e53SWebb Scales abort->scsi_cmd != sc || lockup_detected(h)); 6009281a7fd0SWebb Scales cmd_free(h, abort); 6010a58e7e53SWebb Scales return !lockup_detected(h) ? SUCCESS : FAILED; 601175167d2cSStephen M. Cameron } 601275167d2cSStephen M. Cameron 6013edd16368SStephen M. Cameron /* 601473153fe5SWebb Scales * For operations with an associated SCSI command, a command block is allocated 601573153fe5SWebb Scales * at init, and managed by cmd_tagged_alloc() and cmd_tagged_free() using the 601673153fe5SWebb Scales * block request tag as an index into a table of entries. cmd_tagged_free() is 601773153fe5SWebb Scales * the complement, although cmd_free() may be called instead. 601873153fe5SWebb Scales */ 601973153fe5SWebb Scales static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h, 602073153fe5SWebb Scales struct scsi_cmnd *scmd) 602173153fe5SWebb Scales { 602273153fe5SWebb Scales int idx = hpsa_get_cmd_index(scmd); 602373153fe5SWebb Scales struct CommandList *c = h->cmd_pool + idx; 602473153fe5SWebb Scales 602573153fe5SWebb Scales if (idx < HPSA_NRESERVED_CMDS || idx >= h->nr_cmds) { 602673153fe5SWebb Scales dev_err(&h->pdev->dev, "Bad block tag: %d not in [%d..%d]\n", 602773153fe5SWebb Scales idx, HPSA_NRESERVED_CMDS, h->nr_cmds - 1); 602873153fe5SWebb Scales /* The index value comes from the block layer, so if it's out of 602973153fe5SWebb Scales * bounds, it's probably not our bug. 603073153fe5SWebb Scales */ 603173153fe5SWebb Scales BUG(); 603273153fe5SWebb Scales } 603373153fe5SWebb Scales 603473153fe5SWebb Scales atomic_inc(&c->refcount); 603573153fe5SWebb Scales if (unlikely(!hpsa_is_cmd_idle(c))) { 603673153fe5SWebb Scales /* 603773153fe5SWebb Scales * We expect that the SCSI layer will hand us a unique tag 603873153fe5SWebb Scales * value. Thus, there should never be a collision here between 603973153fe5SWebb Scales * two requests...because if the selected command isn't idle 604073153fe5SWebb Scales * then someone is going to be very disappointed. 604173153fe5SWebb Scales */ 604273153fe5SWebb Scales dev_err(&h->pdev->dev, 604373153fe5SWebb Scales "tag collision (tag=%d) in cmd_tagged_alloc().\n", 604473153fe5SWebb Scales idx); 604573153fe5SWebb Scales if (c->scsi_cmd != NULL) 604673153fe5SWebb Scales scsi_print_command(c->scsi_cmd); 604773153fe5SWebb Scales scsi_print_command(scmd); 604873153fe5SWebb Scales } 604973153fe5SWebb Scales 605073153fe5SWebb Scales hpsa_cmd_partial_init(h, idx, c); 605173153fe5SWebb Scales return c; 605273153fe5SWebb Scales } 605373153fe5SWebb Scales 605473153fe5SWebb Scales static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c) 605573153fe5SWebb Scales { 605673153fe5SWebb Scales /* 605773153fe5SWebb Scales * Release our reference to the block. We don't need to do anything 605873153fe5SWebb Scales * else to free it, because it is accessed by index. (There's no point 605973153fe5SWebb Scales * in checking the result of the decrement, since we cannot guarantee 606073153fe5SWebb Scales * that there isn't a concurrent abort which is also accessing it.) 606173153fe5SWebb Scales */ 606273153fe5SWebb Scales (void)atomic_dec(&c->refcount); 606373153fe5SWebb Scales } 606473153fe5SWebb Scales 606573153fe5SWebb Scales /* 6066edd16368SStephen M. Cameron * For operations that cannot sleep, a command block is allocated at init, 6067edd16368SStephen M. Cameron * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track 6068edd16368SStephen M. Cameron * which ones are free or in use. Lock must be held when calling this. 6069edd16368SStephen M. Cameron * cmd_free() is the complement. 6070bf43caf3SRobert Elliott * This function never gives up and returns NULL. If it hangs, 6071bf43caf3SRobert Elliott * another thread must call cmd_free() to free some tags. 6072edd16368SStephen M. Cameron */ 6073281a7fd0SWebb Scales 6074edd16368SStephen M. Cameron static struct CommandList *cmd_alloc(struct ctlr_info *h) 6075edd16368SStephen M. Cameron { 6076edd16368SStephen M. Cameron struct CommandList *c; 6077360c73bdSStephen Cameron int refcount, i; 607873153fe5SWebb Scales int offset = 0; 6079edd16368SStephen M. Cameron 608033811026SRobert Elliott /* 608133811026SRobert Elliott * There is some *extremely* small but non-zero chance that that 60824c413128SStephen M. Cameron * multiple threads could get in here, and one thread could 60834c413128SStephen M. Cameron * be scanning through the list of bits looking for a free 60844c413128SStephen M. Cameron * one, but the free ones are always behind him, and other 60854c413128SStephen M. Cameron * threads sneak in behind him and eat them before he can 60864c413128SStephen M. Cameron * get to them, so that while there is always a free one, a 60874c413128SStephen M. Cameron * very unlucky thread might be starved anyway, never able to 60884c413128SStephen M. Cameron * beat the other threads. In reality, this happens so 60894c413128SStephen M. Cameron * infrequently as to be indistinguishable from never. 609073153fe5SWebb Scales * 609173153fe5SWebb Scales * Note that we start allocating commands before the SCSI host structure 609273153fe5SWebb Scales * is initialized. Since the search starts at bit zero, this 609373153fe5SWebb Scales * all works, since we have at least one command structure available; 609473153fe5SWebb Scales * however, it means that the structures with the low indexes have to be 609573153fe5SWebb Scales * reserved for driver-initiated requests, while requests from the block 609673153fe5SWebb Scales * layer will use the higher indexes. 60974c413128SStephen M. Cameron */ 60984c413128SStephen M. Cameron 6099281a7fd0SWebb Scales for (;;) { 610073153fe5SWebb Scales i = find_next_zero_bit(h->cmd_pool_bits, 610173153fe5SWebb Scales HPSA_NRESERVED_CMDS, 610273153fe5SWebb Scales offset); 610373153fe5SWebb Scales if (unlikely(i >= HPSA_NRESERVED_CMDS)) { 6104281a7fd0SWebb Scales offset = 0; 6105281a7fd0SWebb Scales continue; 6106281a7fd0SWebb Scales } 6107edd16368SStephen M. Cameron c = h->cmd_pool + i; 6108281a7fd0SWebb Scales refcount = atomic_inc_return(&c->refcount); 6109281a7fd0SWebb Scales if (unlikely(refcount > 1)) { 6110281a7fd0SWebb Scales cmd_free(h, c); /* already in use */ 611173153fe5SWebb Scales offset = (i + 1) % HPSA_NRESERVED_CMDS; 6112281a7fd0SWebb Scales continue; 6113281a7fd0SWebb Scales } 6114281a7fd0SWebb Scales set_bit(i & (BITS_PER_LONG - 1), 6115281a7fd0SWebb Scales h->cmd_pool_bits + (i / BITS_PER_LONG)); 6116281a7fd0SWebb Scales break; /* it's ours now. */ 6117281a7fd0SWebb Scales } 6118360c73bdSStephen Cameron hpsa_cmd_partial_init(h, i, c); 6119edd16368SStephen M. Cameron return c; 6120edd16368SStephen M. Cameron } 6121edd16368SStephen M. Cameron 612273153fe5SWebb Scales /* 612373153fe5SWebb Scales * This is the complementary operation to cmd_alloc(). Note, however, in some 612473153fe5SWebb Scales * corner cases it may also be used to free blocks allocated by 612573153fe5SWebb Scales * cmd_tagged_alloc() in which case the ref-count decrement does the trick and 612673153fe5SWebb Scales * the clear-bit is harmless. 612773153fe5SWebb Scales */ 6128edd16368SStephen M. Cameron static void cmd_free(struct ctlr_info *h, struct CommandList *c) 6129edd16368SStephen M. Cameron { 6130281a7fd0SWebb Scales if (atomic_dec_and_test(&c->refcount)) { 6131edd16368SStephen M. Cameron int i; 6132edd16368SStephen M. Cameron 6133edd16368SStephen M. Cameron i = c - h->cmd_pool; 6134edd16368SStephen M. Cameron clear_bit(i & (BITS_PER_LONG - 1), 6135edd16368SStephen M. Cameron h->cmd_pool_bits + (i / BITS_PER_LONG)); 6136edd16368SStephen M. Cameron } 6137281a7fd0SWebb Scales } 6138edd16368SStephen M. Cameron 6139edd16368SStephen M. Cameron #ifdef CONFIG_COMPAT 6140edd16368SStephen M. Cameron 614142a91641SDon Brace static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, 614242a91641SDon Brace void __user *arg) 6143edd16368SStephen M. Cameron { 6144edd16368SStephen M. Cameron IOCTL32_Command_struct __user *arg32 = 6145edd16368SStephen M. Cameron (IOCTL32_Command_struct __user *) arg; 6146edd16368SStephen M. Cameron IOCTL_Command_struct arg64; 6147edd16368SStephen M. Cameron IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64)); 6148edd16368SStephen M. Cameron int err; 6149edd16368SStephen M. Cameron u32 cp; 6150edd16368SStephen M. Cameron 6151938abd84SVasiliy Kulikov memset(&arg64, 0, sizeof(arg64)); 6152edd16368SStephen M. Cameron err = 0; 6153edd16368SStephen M. Cameron err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 6154edd16368SStephen M. Cameron sizeof(arg64.LUN_info)); 6155edd16368SStephen M. Cameron err |= copy_from_user(&arg64.Request, &arg32->Request, 6156edd16368SStephen M. Cameron sizeof(arg64.Request)); 6157edd16368SStephen M. Cameron err |= copy_from_user(&arg64.error_info, &arg32->error_info, 6158edd16368SStephen M. Cameron sizeof(arg64.error_info)); 6159edd16368SStephen M. Cameron err |= get_user(arg64.buf_size, &arg32->buf_size); 6160edd16368SStephen M. Cameron err |= get_user(cp, &arg32->buf); 6161edd16368SStephen M. Cameron arg64.buf = compat_ptr(cp); 6162edd16368SStephen M. Cameron err |= copy_to_user(p, &arg64, sizeof(arg64)); 6163edd16368SStephen M. Cameron 6164edd16368SStephen M. Cameron if (err) 6165edd16368SStephen M. Cameron return -EFAULT; 6166edd16368SStephen M. Cameron 616742a91641SDon Brace err = hpsa_ioctl(dev, CCISS_PASSTHRU, p); 6168edd16368SStephen M. Cameron if (err) 6169edd16368SStephen M. Cameron return err; 6170edd16368SStephen M. Cameron err |= copy_in_user(&arg32->error_info, &p->error_info, 6171edd16368SStephen M. Cameron sizeof(arg32->error_info)); 6172edd16368SStephen M. Cameron if (err) 6173edd16368SStephen M. Cameron return -EFAULT; 6174edd16368SStephen M. Cameron return err; 6175edd16368SStephen M. Cameron } 6176edd16368SStephen M. Cameron 6177edd16368SStephen M. Cameron static int hpsa_ioctl32_big_passthru(struct scsi_device *dev, 617842a91641SDon Brace int cmd, void __user *arg) 6179edd16368SStephen M. Cameron { 6180edd16368SStephen M. Cameron BIG_IOCTL32_Command_struct __user *arg32 = 6181edd16368SStephen M. Cameron (BIG_IOCTL32_Command_struct __user *) arg; 6182edd16368SStephen M. Cameron BIG_IOCTL_Command_struct arg64; 6183edd16368SStephen M. Cameron BIG_IOCTL_Command_struct __user *p = 6184edd16368SStephen M. Cameron compat_alloc_user_space(sizeof(arg64)); 6185edd16368SStephen M. Cameron int err; 6186edd16368SStephen M. Cameron u32 cp; 6187edd16368SStephen M. Cameron 6188938abd84SVasiliy Kulikov memset(&arg64, 0, sizeof(arg64)); 6189edd16368SStephen M. Cameron err = 0; 6190edd16368SStephen M. Cameron err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 6191edd16368SStephen M. Cameron sizeof(arg64.LUN_info)); 6192edd16368SStephen M. Cameron err |= copy_from_user(&arg64.Request, &arg32->Request, 6193edd16368SStephen M. Cameron sizeof(arg64.Request)); 6194edd16368SStephen M. Cameron err |= copy_from_user(&arg64.error_info, &arg32->error_info, 6195edd16368SStephen M. Cameron sizeof(arg64.error_info)); 6196edd16368SStephen M. Cameron err |= get_user(arg64.buf_size, &arg32->buf_size); 6197edd16368SStephen M. Cameron err |= get_user(arg64.malloc_size, &arg32->malloc_size); 6198edd16368SStephen M. Cameron err |= get_user(cp, &arg32->buf); 6199edd16368SStephen M. Cameron arg64.buf = compat_ptr(cp); 6200edd16368SStephen M. Cameron err |= copy_to_user(p, &arg64, sizeof(arg64)); 6201edd16368SStephen M. Cameron 6202edd16368SStephen M. Cameron if (err) 6203edd16368SStephen M. Cameron return -EFAULT; 6204edd16368SStephen M. Cameron 620542a91641SDon Brace err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, p); 6206edd16368SStephen M. Cameron if (err) 6207edd16368SStephen M. Cameron return err; 6208edd16368SStephen M. Cameron err |= copy_in_user(&arg32->error_info, &p->error_info, 6209edd16368SStephen M. Cameron sizeof(arg32->error_info)); 6210edd16368SStephen M. Cameron if (err) 6211edd16368SStephen M. Cameron return -EFAULT; 6212edd16368SStephen M. Cameron return err; 6213edd16368SStephen M. Cameron } 621471fe75a7SStephen M. Cameron 621542a91641SDon Brace static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void __user *arg) 621671fe75a7SStephen M. Cameron { 621771fe75a7SStephen M. Cameron switch (cmd) { 621871fe75a7SStephen M. Cameron case CCISS_GETPCIINFO: 621971fe75a7SStephen M. Cameron case CCISS_GETINTINFO: 622071fe75a7SStephen M. Cameron case CCISS_SETINTINFO: 622171fe75a7SStephen M. Cameron case CCISS_GETNODENAME: 622271fe75a7SStephen M. Cameron case CCISS_SETNODENAME: 622371fe75a7SStephen M. Cameron case CCISS_GETHEARTBEAT: 622471fe75a7SStephen M. Cameron case CCISS_GETBUSTYPES: 622571fe75a7SStephen M. Cameron case CCISS_GETFIRMVER: 622671fe75a7SStephen M. Cameron case CCISS_GETDRIVVER: 622771fe75a7SStephen M. Cameron case CCISS_REVALIDVOLS: 622871fe75a7SStephen M. Cameron case CCISS_DEREGDISK: 622971fe75a7SStephen M. Cameron case CCISS_REGNEWDISK: 623071fe75a7SStephen M. Cameron case CCISS_REGNEWD: 623171fe75a7SStephen M. Cameron case CCISS_RESCANDISK: 623271fe75a7SStephen M. Cameron case CCISS_GETLUNINFO: 623371fe75a7SStephen M. Cameron return hpsa_ioctl(dev, cmd, arg); 623471fe75a7SStephen M. Cameron 623571fe75a7SStephen M. Cameron case CCISS_PASSTHRU32: 623671fe75a7SStephen M. Cameron return hpsa_ioctl32_passthru(dev, cmd, arg); 623771fe75a7SStephen M. Cameron case CCISS_BIG_PASSTHRU32: 623871fe75a7SStephen M. Cameron return hpsa_ioctl32_big_passthru(dev, cmd, arg); 623971fe75a7SStephen M. Cameron 624071fe75a7SStephen M. Cameron default: 624171fe75a7SStephen M. Cameron return -ENOIOCTLCMD; 624271fe75a7SStephen M. Cameron } 624371fe75a7SStephen M. Cameron } 6244edd16368SStephen M. Cameron #endif 6245edd16368SStephen M. Cameron 6246edd16368SStephen M. Cameron static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp) 6247edd16368SStephen M. Cameron { 6248edd16368SStephen M. Cameron struct hpsa_pci_info pciinfo; 6249edd16368SStephen M. Cameron 6250edd16368SStephen M. Cameron if (!argp) 6251edd16368SStephen M. Cameron return -EINVAL; 6252edd16368SStephen M. Cameron pciinfo.domain = pci_domain_nr(h->pdev->bus); 6253edd16368SStephen M. Cameron pciinfo.bus = h->pdev->bus->number; 6254edd16368SStephen M. Cameron pciinfo.dev_fn = h->pdev->devfn; 6255edd16368SStephen M. Cameron pciinfo.board_id = h->board_id; 6256edd16368SStephen M. Cameron if (copy_to_user(argp, &pciinfo, sizeof(pciinfo))) 6257edd16368SStephen M. Cameron return -EFAULT; 6258edd16368SStephen M. Cameron return 0; 6259edd16368SStephen M. Cameron } 6260edd16368SStephen M. Cameron 6261edd16368SStephen M. Cameron static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp) 6262edd16368SStephen M. Cameron { 6263edd16368SStephen M. Cameron DriverVer_type DriverVer; 6264edd16368SStephen M. Cameron unsigned char vmaj, vmin, vsubmin; 6265edd16368SStephen M. Cameron int rc; 6266edd16368SStephen M. Cameron 6267edd16368SStephen M. Cameron rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu", 6268edd16368SStephen M. Cameron &vmaj, &vmin, &vsubmin); 6269edd16368SStephen M. Cameron if (rc != 3) { 6270edd16368SStephen M. Cameron dev_info(&h->pdev->dev, "driver version string '%s' " 6271edd16368SStephen M. Cameron "unrecognized.", HPSA_DRIVER_VERSION); 6272edd16368SStephen M. Cameron vmaj = 0; 6273edd16368SStephen M. Cameron vmin = 0; 6274edd16368SStephen M. Cameron vsubmin = 0; 6275edd16368SStephen M. Cameron } 6276edd16368SStephen M. Cameron DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin; 6277edd16368SStephen M. Cameron if (!argp) 6278edd16368SStephen M. Cameron return -EINVAL; 6279edd16368SStephen M. Cameron if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type))) 6280edd16368SStephen M. Cameron return -EFAULT; 6281edd16368SStephen M. Cameron return 0; 6282edd16368SStephen M. Cameron } 6283edd16368SStephen M. Cameron 6284edd16368SStephen M. Cameron static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp) 6285edd16368SStephen M. Cameron { 6286edd16368SStephen M. Cameron IOCTL_Command_struct iocommand; 6287edd16368SStephen M. Cameron struct CommandList *c; 6288edd16368SStephen M. Cameron char *buff = NULL; 628950a0decfSStephen M. Cameron u64 temp64; 6290c1f63c8fSStephen M. Cameron int rc = 0; 6291edd16368SStephen M. Cameron 6292edd16368SStephen M. Cameron if (!argp) 6293edd16368SStephen M. Cameron return -EINVAL; 6294edd16368SStephen M. Cameron if (!capable(CAP_SYS_RAWIO)) 6295edd16368SStephen M. Cameron return -EPERM; 6296edd16368SStephen M. Cameron if (copy_from_user(&iocommand, argp, sizeof(iocommand))) 6297edd16368SStephen M. Cameron return -EFAULT; 6298edd16368SStephen M. Cameron if ((iocommand.buf_size < 1) && 6299edd16368SStephen M. Cameron (iocommand.Request.Type.Direction != XFER_NONE)) { 6300edd16368SStephen M. Cameron return -EINVAL; 6301edd16368SStephen M. Cameron } 6302edd16368SStephen M. Cameron if (iocommand.buf_size > 0) { 6303edd16368SStephen M. Cameron buff = kmalloc(iocommand.buf_size, GFP_KERNEL); 6304edd16368SStephen M. Cameron if (buff == NULL) 63052dd02d74SRobert Elliott return -ENOMEM; 63069233fb10SStephen M. Cameron if (iocommand.Request.Type.Direction & XFER_WRITE) { 6307edd16368SStephen M. Cameron /* Copy the data into the buffer we created */ 6308b03a7771SStephen M. Cameron if (copy_from_user(buff, iocommand.buf, 6309b03a7771SStephen M. Cameron iocommand.buf_size)) { 6310c1f63c8fSStephen M. Cameron rc = -EFAULT; 6311c1f63c8fSStephen M. Cameron goto out_kfree; 6312edd16368SStephen M. Cameron } 6313b03a7771SStephen M. Cameron } else { 6314edd16368SStephen M. Cameron memset(buff, 0, iocommand.buf_size); 6315b03a7771SStephen M. Cameron } 6316b03a7771SStephen M. Cameron } 631745fcb86eSStephen Cameron c = cmd_alloc(h); 6318bf43caf3SRobert Elliott 6319edd16368SStephen M. Cameron /* Fill in the command type */ 6320edd16368SStephen M. Cameron c->cmd_type = CMD_IOCTL_PEND; 6321a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 6322edd16368SStephen M. Cameron /* Fill in Command Header */ 6323edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; /* unused in simple mode */ 6324edd16368SStephen M. Cameron if (iocommand.buf_size > 0) { /* buffer to fill */ 6325edd16368SStephen M. Cameron c->Header.SGList = 1; 632650a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(1); 6327edd16368SStephen M. Cameron } else { /* no buffers to fill */ 6328edd16368SStephen M. Cameron c->Header.SGList = 0; 632950a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(0); 6330edd16368SStephen M. Cameron } 6331edd16368SStephen M. Cameron memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN)); 6332edd16368SStephen M. Cameron 6333edd16368SStephen M. Cameron /* Fill in Request block */ 6334edd16368SStephen M. Cameron memcpy(&c->Request, &iocommand.Request, 6335edd16368SStephen M. Cameron sizeof(c->Request)); 6336edd16368SStephen M. Cameron 6337edd16368SStephen M. Cameron /* Fill in the scatter gather information */ 6338edd16368SStephen M. Cameron if (iocommand.buf_size > 0) { 633950a0decfSStephen M. Cameron temp64 = pci_map_single(h->pdev, buff, 6340edd16368SStephen M. Cameron iocommand.buf_size, PCI_DMA_BIDIRECTIONAL); 634150a0decfSStephen M. Cameron if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) { 634250a0decfSStephen M. Cameron c->SG[0].Addr = cpu_to_le64(0); 634350a0decfSStephen M. Cameron c->SG[0].Len = cpu_to_le32(0); 6344bcc48ffaSStephen M. Cameron rc = -ENOMEM; 6345bcc48ffaSStephen M. Cameron goto out; 6346bcc48ffaSStephen M. Cameron } 634750a0decfSStephen M. Cameron c->SG[0].Addr = cpu_to_le64(temp64); 634850a0decfSStephen M. Cameron c->SG[0].Len = cpu_to_le32(iocommand.buf_size); 634950a0decfSStephen M. Cameron c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */ 6350edd16368SStephen M. Cameron } 635125163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT); 6352c2dd32e0SStephen M. Cameron if (iocommand.buf_size > 0) 6353edd16368SStephen M. Cameron hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL); 6354edd16368SStephen M. Cameron check_ioctl_unit_attention(h, c); 635525163bd5SWebb Scales if (rc) { 635625163bd5SWebb Scales rc = -EIO; 635725163bd5SWebb Scales goto out; 635825163bd5SWebb Scales } 6359edd16368SStephen M. Cameron 6360edd16368SStephen M. Cameron /* Copy the error information out */ 6361edd16368SStephen M. Cameron memcpy(&iocommand.error_info, c->err_info, 6362edd16368SStephen M. Cameron sizeof(iocommand.error_info)); 6363edd16368SStephen M. Cameron if (copy_to_user(argp, &iocommand, sizeof(iocommand))) { 6364c1f63c8fSStephen M. Cameron rc = -EFAULT; 6365c1f63c8fSStephen M. Cameron goto out; 6366edd16368SStephen M. Cameron } 63679233fb10SStephen M. Cameron if ((iocommand.Request.Type.Direction & XFER_READ) && 6368b03a7771SStephen M. Cameron iocommand.buf_size > 0) { 6369edd16368SStephen M. Cameron /* Copy the data out of the buffer we created */ 6370edd16368SStephen M. Cameron if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) { 6371c1f63c8fSStephen M. Cameron rc = -EFAULT; 6372c1f63c8fSStephen M. Cameron goto out; 6373edd16368SStephen M. Cameron } 6374edd16368SStephen M. Cameron } 6375c1f63c8fSStephen M. Cameron out: 637645fcb86eSStephen Cameron cmd_free(h, c); 6377c1f63c8fSStephen M. Cameron out_kfree: 6378c1f63c8fSStephen M. Cameron kfree(buff); 6379c1f63c8fSStephen M. Cameron return rc; 6380edd16368SStephen M. Cameron } 6381edd16368SStephen M. Cameron 6382edd16368SStephen M. Cameron static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp) 6383edd16368SStephen M. Cameron { 6384edd16368SStephen M. Cameron BIG_IOCTL_Command_struct *ioc; 6385edd16368SStephen M. Cameron struct CommandList *c; 6386edd16368SStephen M. Cameron unsigned char **buff = NULL; 6387edd16368SStephen M. Cameron int *buff_size = NULL; 638850a0decfSStephen M. Cameron u64 temp64; 6389edd16368SStephen M. Cameron BYTE sg_used = 0; 6390edd16368SStephen M. Cameron int status = 0; 639101a02ffcSStephen M. Cameron u32 left; 639201a02ffcSStephen M. Cameron u32 sz; 6393edd16368SStephen M. Cameron BYTE __user *data_ptr; 6394edd16368SStephen M. Cameron 6395edd16368SStephen M. Cameron if (!argp) 6396edd16368SStephen M. Cameron return -EINVAL; 6397edd16368SStephen M. Cameron if (!capable(CAP_SYS_RAWIO)) 6398edd16368SStephen M. Cameron return -EPERM; 6399edd16368SStephen M. Cameron ioc = (BIG_IOCTL_Command_struct *) 6400edd16368SStephen M. Cameron kmalloc(sizeof(*ioc), GFP_KERNEL); 6401edd16368SStephen M. Cameron if (!ioc) { 6402edd16368SStephen M. Cameron status = -ENOMEM; 6403edd16368SStephen M. Cameron goto cleanup1; 6404edd16368SStephen M. Cameron } 6405edd16368SStephen M. Cameron if (copy_from_user(ioc, argp, sizeof(*ioc))) { 6406edd16368SStephen M. Cameron status = -EFAULT; 6407edd16368SStephen M. Cameron goto cleanup1; 6408edd16368SStephen M. Cameron } 6409edd16368SStephen M. Cameron if ((ioc->buf_size < 1) && 6410edd16368SStephen M. Cameron (ioc->Request.Type.Direction != XFER_NONE)) { 6411edd16368SStephen M. Cameron status = -EINVAL; 6412edd16368SStephen M. Cameron goto cleanup1; 6413edd16368SStephen M. Cameron } 6414edd16368SStephen M. Cameron /* Check kmalloc limits using all SGs */ 6415edd16368SStephen M. Cameron if (ioc->malloc_size > MAX_KMALLOC_SIZE) { 6416edd16368SStephen M. Cameron status = -EINVAL; 6417edd16368SStephen M. Cameron goto cleanup1; 6418edd16368SStephen M. Cameron } 6419d66ae08bSStephen M. Cameron if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) { 6420edd16368SStephen M. Cameron status = -EINVAL; 6421edd16368SStephen M. Cameron goto cleanup1; 6422edd16368SStephen M. Cameron } 6423d66ae08bSStephen M. Cameron buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL); 6424edd16368SStephen M. Cameron if (!buff) { 6425edd16368SStephen M. Cameron status = -ENOMEM; 6426edd16368SStephen M. Cameron goto cleanup1; 6427edd16368SStephen M. Cameron } 6428d66ae08bSStephen M. Cameron buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL); 6429edd16368SStephen M. Cameron if (!buff_size) { 6430edd16368SStephen M. Cameron status = -ENOMEM; 6431edd16368SStephen M. Cameron goto cleanup1; 6432edd16368SStephen M. Cameron } 6433edd16368SStephen M. Cameron left = ioc->buf_size; 6434edd16368SStephen M. Cameron data_ptr = ioc->buf; 6435edd16368SStephen M. Cameron while (left) { 6436edd16368SStephen M. Cameron sz = (left > ioc->malloc_size) ? ioc->malloc_size : left; 6437edd16368SStephen M. Cameron buff_size[sg_used] = sz; 6438edd16368SStephen M. Cameron buff[sg_used] = kmalloc(sz, GFP_KERNEL); 6439edd16368SStephen M. Cameron if (buff[sg_used] == NULL) { 6440edd16368SStephen M. Cameron status = -ENOMEM; 6441edd16368SStephen M. Cameron goto cleanup1; 6442edd16368SStephen M. Cameron } 64439233fb10SStephen M. Cameron if (ioc->Request.Type.Direction & XFER_WRITE) { 6444edd16368SStephen M. Cameron if (copy_from_user(buff[sg_used], data_ptr, sz)) { 64450758f4f7SStephen M. Cameron status = -EFAULT; 6446edd16368SStephen M. Cameron goto cleanup1; 6447edd16368SStephen M. Cameron } 6448edd16368SStephen M. Cameron } else 6449edd16368SStephen M. Cameron memset(buff[sg_used], 0, sz); 6450edd16368SStephen M. Cameron left -= sz; 6451edd16368SStephen M. Cameron data_ptr += sz; 6452edd16368SStephen M. Cameron sg_used++; 6453edd16368SStephen M. Cameron } 645445fcb86eSStephen Cameron c = cmd_alloc(h); 6455bf43caf3SRobert Elliott 6456edd16368SStephen M. Cameron c->cmd_type = CMD_IOCTL_PEND; 6457a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 6458edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; 645950a0decfSStephen M. Cameron c->Header.SGList = (u8) sg_used; 646050a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(sg_used); 6461edd16368SStephen M. Cameron memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN)); 6462edd16368SStephen M. Cameron memcpy(&c->Request, &ioc->Request, sizeof(c->Request)); 6463edd16368SStephen M. Cameron if (ioc->buf_size > 0) { 6464edd16368SStephen M. Cameron int i; 6465edd16368SStephen M. Cameron for (i = 0; i < sg_used; i++) { 646650a0decfSStephen M. Cameron temp64 = pci_map_single(h->pdev, buff[i], 6467edd16368SStephen M. Cameron buff_size[i], PCI_DMA_BIDIRECTIONAL); 646850a0decfSStephen M. Cameron if (dma_mapping_error(&h->pdev->dev, 646950a0decfSStephen M. Cameron (dma_addr_t) temp64)) { 647050a0decfSStephen M. Cameron c->SG[i].Addr = cpu_to_le64(0); 647150a0decfSStephen M. Cameron c->SG[i].Len = cpu_to_le32(0); 6472bcc48ffaSStephen M. Cameron hpsa_pci_unmap(h->pdev, c, i, 6473bcc48ffaSStephen M. Cameron PCI_DMA_BIDIRECTIONAL); 6474bcc48ffaSStephen M. Cameron status = -ENOMEM; 6475e2d4a1f6SStephen M. Cameron goto cleanup0; 6476bcc48ffaSStephen M. Cameron } 647750a0decfSStephen M. Cameron c->SG[i].Addr = cpu_to_le64(temp64); 647850a0decfSStephen M. Cameron c->SG[i].Len = cpu_to_le32(buff_size[i]); 647950a0decfSStephen M. Cameron c->SG[i].Ext = cpu_to_le32(0); 6480edd16368SStephen M. Cameron } 648150a0decfSStephen M. Cameron c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST); 6482edd16368SStephen M. Cameron } 648325163bd5SWebb Scales status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT); 6484b03a7771SStephen M. Cameron if (sg_used) 6485edd16368SStephen M. Cameron hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL); 6486edd16368SStephen M. Cameron check_ioctl_unit_attention(h, c); 648725163bd5SWebb Scales if (status) { 648825163bd5SWebb Scales status = -EIO; 648925163bd5SWebb Scales goto cleanup0; 649025163bd5SWebb Scales } 649125163bd5SWebb Scales 6492edd16368SStephen M. Cameron /* Copy the error information out */ 6493edd16368SStephen M. Cameron memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info)); 6494edd16368SStephen M. Cameron if (copy_to_user(argp, ioc, sizeof(*ioc))) { 6495edd16368SStephen M. Cameron status = -EFAULT; 6496e2d4a1f6SStephen M. Cameron goto cleanup0; 6497edd16368SStephen M. Cameron } 64989233fb10SStephen M. Cameron if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) { 64992b08b3e9SDon Brace int i; 65002b08b3e9SDon Brace 6501edd16368SStephen M. Cameron /* Copy the data out of the buffer we created */ 6502edd16368SStephen M. Cameron BYTE __user *ptr = ioc->buf; 6503edd16368SStephen M. Cameron for (i = 0; i < sg_used; i++) { 6504edd16368SStephen M. Cameron if (copy_to_user(ptr, buff[i], buff_size[i])) { 6505edd16368SStephen M. Cameron status = -EFAULT; 6506e2d4a1f6SStephen M. Cameron goto cleanup0; 6507edd16368SStephen M. Cameron } 6508edd16368SStephen M. Cameron ptr += buff_size[i]; 6509edd16368SStephen M. Cameron } 6510edd16368SStephen M. Cameron } 6511edd16368SStephen M. Cameron status = 0; 6512e2d4a1f6SStephen M. Cameron cleanup0: 651345fcb86eSStephen Cameron cmd_free(h, c); 6514edd16368SStephen M. Cameron cleanup1: 6515edd16368SStephen M. Cameron if (buff) { 65162b08b3e9SDon Brace int i; 65172b08b3e9SDon Brace 6518edd16368SStephen M. Cameron for (i = 0; i < sg_used; i++) 6519edd16368SStephen M. Cameron kfree(buff[i]); 6520edd16368SStephen M. Cameron kfree(buff); 6521edd16368SStephen M. Cameron } 6522edd16368SStephen M. Cameron kfree(buff_size); 6523edd16368SStephen M. Cameron kfree(ioc); 6524edd16368SStephen M. Cameron return status; 6525edd16368SStephen M. Cameron } 6526edd16368SStephen M. Cameron 6527edd16368SStephen M. Cameron static void check_ioctl_unit_attention(struct ctlr_info *h, 6528edd16368SStephen M. Cameron struct CommandList *c) 6529edd16368SStephen M. Cameron { 6530edd16368SStephen M. Cameron if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 6531edd16368SStephen M. Cameron c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) 6532edd16368SStephen M. Cameron (void) check_for_unit_attention(h, c); 6533edd16368SStephen M. Cameron } 65340390f0c0SStephen M. Cameron 6535edd16368SStephen M. Cameron /* 6536edd16368SStephen M. Cameron * ioctl 6537edd16368SStephen M. Cameron */ 653842a91641SDon Brace static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg) 6539edd16368SStephen M. Cameron { 6540edd16368SStephen M. Cameron struct ctlr_info *h; 6541edd16368SStephen M. Cameron void __user *argp = (void __user *)arg; 65420390f0c0SStephen M. Cameron int rc; 6543edd16368SStephen M. Cameron 6544edd16368SStephen M. Cameron h = sdev_to_hba(dev); 6545edd16368SStephen M. Cameron 6546edd16368SStephen M. Cameron switch (cmd) { 6547edd16368SStephen M. Cameron case CCISS_DEREGDISK: 6548edd16368SStephen M. Cameron case CCISS_REGNEWDISK: 6549edd16368SStephen M. Cameron case CCISS_REGNEWD: 6550a08a8471SStephen M. Cameron hpsa_scan_start(h->scsi_host); 6551edd16368SStephen M. Cameron return 0; 6552edd16368SStephen M. Cameron case CCISS_GETPCIINFO: 6553edd16368SStephen M. Cameron return hpsa_getpciinfo_ioctl(h, argp); 6554edd16368SStephen M. Cameron case CCISS_GETDRIVVER: 6555edd16368SStephen M. Cameron return hpsa_getdrivver_ioctl(h, argp); 6556edd16368SStephen M. Cameron case CCISS_PASSTHRU: 655734f0c627SDon Brace if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 65580390f0c0SStephen M. Cameron return -EAGAIN; 65590390f0c0SStephen M. Cameron rc = hpsa_passthru_ioctl(h, argp); 656034f0c627SDon Brace atomic_inc(&h->passthru_cmds_avail); 65610390f0c0SStephen M. Cameron return rc; 6562edd16368SStephen M. Cameron case CCISS_BIG_PASSTHRU: 656334f0c627SDon Brace if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 65640390f0c0SStephen M. Cameron return -EAGAIN; 65650390f0c0SStephen M. Cameron rc = hpsa_big_passthru_ioctl(h, argp); 656634f0c627SDon Brace atomic_inc(&h->passthru_cmds_avail); 65670390f0c0SStephen M. Cameron return rc; 6568edd16368SStephen M. Cameron default: 6569edd16368SStephen M. Cameron return -ENOTTY; 6570edd16368SStephen M. Cameron } 6571edd16368SStephen M. Cameron } 6572edd16368SStephen M. Cameron 6573bf43caf3SRobert Elliott static void hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr, 65746f039790SGreg Kroah-Hartman u8 reset_type) 657564670ac8SStephen M. Cameron { 657664670ac8SStephen M. Cameron struct CommandList *c; 657764670ac8SStephen M. Cameron 657864670ac8SStephen M. Cameron c = cmd_alloc(h); 6579bf43caf3SRobert Elliott 6580a2dac136SStephen M. Cameron /* fill_cmd can't fail here, no data buffer to map */ 6581a2dac136SStephen M. Cameron (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, 658264670ac8SStephen M. Cameron RAID_CTLR_LUNID, TYPE_MSG); 658364670ac8SStephen M. Cameron c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */ 658464670ac8SStephen M. Cameron c->waiting = NULL; 658564670ac8SStephen M. Cameron enqueue_cmd_and_start_io(h, c); 658664670ac8SStephen M. Cameron /* Don't wait for completion, the reset won't complete. Don't free 658764670ac8SStephen M. Cameron * the command either. This is the last command we will send before 658864670ac8SStephen M. Cameron * re-initializing everything, so it doesn't matter and won't leak. 658964670ac8SStephen M. Cameron */ 6590bf43caf3SRobert Elliott return; 659164670ac8SStephen M. Cameron } 659264670ac8SStephen M. Cameron 6593a2dac136SStephen M. Cameron static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 6594b7bb24ebSStephen M. Cameron void *buff, size_t size, u16 page_code, unsigned char *scsi3addr, 6595edd16368SStephen M. Cameron int cmd_type) 6596edd16368SStephen M. Cameron { 6597edd16368SStephen M. Cameron int pci_dir = XFER_NONE; 65989b5c48c2SStephen Cameron u64 tag; /* for commands to be aborted */ 6599edd16368SStephen M. Cameron 6600edd16368SStephen M. Cameron c->cmd_type = CMD_IOCTL_PEND; 6601a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 6602edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; 6603edd16368SStephen M. Cameron if (buff != NULL && size > 0) { 6604edd16368SStephen M. Cameron c->Header.SGList = 1; 660550a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(1); 6606edd16368SStephen M. Cameron } else { 6607edd16368SStephen M. Cameron c->Header.SGList = 0; 660850a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(0); 6609edd16368SStephen M. Cameron } 6610edd16368SStephen M. Cameron memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8); 6611edd16368SStephen M. Cameron 6612edd16368SStephen M. Cameron if (cmd_type == TYPE_CMD) { 6613edd16368SStephen M. Cameron switch (cmd) { 6614edd16368SStephen M. Cameron case HPSA_INQUIRY: 6615edd16368SStephen M. Cameron /* are we trying to read a vital product page */ 6616b7bb24ebSStephen M. Cameron if (page_code & VPD_PAGE) { 6617edd16368SStephen M. Cameron c->Request.CDB[1] = 0x01; 6618b7bb24ebSStephen M. Cameron c->Request.CDB[2] = (page_code & 0xff); 6619edd16368SStephen M. Cameron } 6620edd16368SStephen M. Cameron c->Request.CDBLen = 6; 6621a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6622a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6623edd16368SStephen M. Cameron c->Request.Timeout = 0; 6624edd16368SStephen M. Cameron c->Request.CDB[0] = HPSA_INQUIRY; 6625edd16368SStephen M. Cameron c->Request.CDB[4] = size & 0xFF; 6626edd16368SStephen M. Cameron break; 6627edd16368SStephen M. Cameron case HPSA_REPORT_LOG: 6628edd16368SStephen M. Cameron case HPSA_REPORT_PHYS: 6629edd16368SStephen M. Cameron /* Talking to controller so It's a physical command 6630edd16368SStephen M. Cameron mode = 00 target = 0. Nothing to write. 6631edd16368SStephen M. Cameron */ 6632edd16368SStephen M. Cameron c->Request.CDBLen = 12; 6633a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6634a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6635edd16368SStephen M. Cameron c->Request.Timeout = 0; 6636edd16368SStephen M. Cameron c->Request.CDB[0] = cmd; 6637edd16368SStephen M. Cameron c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 6638edd16368SStephen M. Cameron c->Request.CDB[7] = (size >> 16) & 0xFF; 6639edd16368SStephen M. Cameron c->Request.CDB[8] = (size >> 8) & 0xFF; 6640edd16368SStephen M. Cameron c->Request.CDB[9] = size & 0xFF; 6641edd16368SStephen M. Cameron break; 6642c2adae44SScott Teel case BMIC_SENSE_DIAG_OPTIONS: 6643c2adae44SScott Teel c->Request.CDBLen = 16; 6644c2adae44SScott Teel c->Request.type_attr_dir = 6645c2adae44SScott Teel TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6646c2adae44SScott Teel c->Request.Timeout = 0; 6647c2adae44SScott Teel /* Spec says this should be BMIC_WRITE */ 6648c2adae44SScott Teel c->Request.CDB[0] = BMIC_READ; 6649c2adae44SScott Teel c->Request.CDB[6] = BMIC_SENSE_DIAG_OPTIONS; 6650c2adae44SScott Teel break; 6651c2adae44SScott Teel case BMIC_SET_DIAG_OPTIONS: 6652c2adae44SScott Teel c->Request.CDBLen = 16; 6653c2adae44SScott Teel c->Request.type_attr_dir = 6654c2adae44SScott Teel TYPE_ATTR_DIR(cmd_type, 6655c2adae44SScott Teel ATTR_SIMPLE, XFER_WRITE); 6656c2adae44SScott Teel c->Request.Timeout = 0; 6657c2adae44SScott Teel c->Request.CDB[0] = BMIC_WRITE; 6658c2adae44SScott Teel c->Request.CDB[6] = BMIC_SET_DIAG_OPTIONS; 6659c2adae44SScott Teel break; 6660edd16368SStephen M. Cameron case HPSA_CACHE_FLUSH: 6661edd16368SStephen M. Cameron c->Request.CDBLen = 12; 6662a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6663a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, 6664a505b86fSStephen M. Cameron ATTR_SIMPLE, XFER_WRITE); 6665edd16368SStephen M. Cameron c->Request.Timeout = 0; 6666edd16368SStephen M. Cameron c->Request.CDB[0] = BMIC_WRITE; 6667edd16368SStephen M. Cameron c->Request.CDB[6] = BMIC_CACHE_FLUSH; 6668bb158eabSStephen M. Cameron c->Request.CDB[7] = (size >> 8) & 0xFF; 6669bb158eabSStephen M. Cameron c->Request.CDB[8] = size & 0xFF; 6670edd16368SStephen M. Cameron break; 6671edd16368SStephen M. Cameron case TEST_UNIT_READY: 6672edd16368SStephen M. Cameron c->Request.CDBLen = 6; 6673a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6674a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 6675edd16368SStephen M. Cameron c->Request.Timeout = 0; 6676edd16368SStephen M. Cameron break; 6677283b4a9bSStephen M. Cameron case HPSA_GET_RAID_MAP: 6678283b4a9bSStephen M. Cameron c->Request.CDBLen = 12; 6679a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6680a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6681283b4a9bSStephen M. Cameron c->Request.Timeout = 0; 6682283b4a9bSStephen M. Cameron c->Request.CDB[0] = HPSA_CISS_READ; 6683283b4a9bSStephen M. Cameron c->Request.CDB[1] = cmd; 6684283b4a9bSStephen M. Cameron c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 6685283b4a9bSStephen M. Cameron c->Request.CDB[7] = (size >> 16) & 0xFF; 6686283b4a9bSStephen M. Cameron c->Request.CDB[8] = (size >> 8) & 0xFF; 6687283b4a9bSStephen M. Cameron c->Request.CDB[9] = size & 0xFF; 6688283b4a9bSStephen M. Cameron break; 6689316b221aSStephen M. Cameron case BMIC_SENSE_CONTROLLER_PARAMETERS: 6690316b221aSStephen M. Cameron c->Request.CDBLen = 10; 6691a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6692a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6693316b221aSStephen M. Cameron c->Request.Timeout = 0; 6694316b221aSStephen M. Cameron c->Request.CDB[0] = BMIC_READ; 6695316b221aSStephen M. Cameron c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS; 6696316b221aSStephen M. Cameron c->Request.CDB[7] = (size >> 16) & 0xFF; 6697316b221aSStephen M. Cameron c->Request.CDB[8] = (size >> 8) & 0xFF; 6698316b221aSStephen M. Cameron break; 669903383736SDon Brace case BMIC_IDENTIFY_PHYSICAL_DEVICE: 670003383736SDon Brace c->Request.CDBLen = 10; 670103383736SDon Brace c->Request.type_attr_dir = 670203383736SDon Brace TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 670303383736SDon Brace c->Request.Timeout = 0; 670403383736SDon Brace c->Request.CDB[0] = BMIC_READ; 670503383736SDon Brace c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE; 670603383736SDon Brace c->Request.CDB[7] = (size >> 16) & 0xFF; 670703383736SDon Brace c->Request.CDB[8] = (size >> 8) & 0XFF; 670803383736SDon Brace break; 6709d04e62b9SKevin Barnett case BMIC_SENSE_SUBSYSTEM_INFORMATION: 6710d04e62b9SKevin Barnett c->Request.CDBLen = 10; 6711d04e62b9SKevin Barnett c->Request.type_attr_dir = 6712d04e62b9SKevin Barnett TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6713d04e62b9SKevin Barnett c->Request.Timeout = 0; 6714d04e62b9SKevin Barnett c->Request.CDB[0] = BMIC_READ; 6715d04e62b9SKevin Barnett c->Request.CDB[6] = BMIC_SENSE_SUBSYSTEM_INFORMATION; 6716d04e62b9SKevin Barnett c->Request.CDB[7] = (size >> 16) & 0xFF; 6717d04e62b9SKevin Barnett c->Request.CDB[8] = (size >> 8) & 0XFF; 6718d04e62b9SKevin Barnett break; 6719cca8f13bSDon Brace case BMIC_SENSE_STORAGE_BOX_PARAMS: 6720cca8f13bSDon Brace c->Request.CDBLen = 10; 6721cca8f13bSDon Brace c->Request.type_attr_dir = 6722cca8f13bSDon Brace TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6723cca8f13bSDon Brace c->Request.Timeout = 0; 6724cca8f13bSDon Brace c->Request.CDB[0] = BMIC_READ; 6725cca8f13bSDon Brace c->Request.CDB[6] = BMIC_SENSE_STORAGE_BOX_PARAMS; 6726cca8f13bSDon Brace c->Request.CDB[7] = (size >> 16) & 0xFF; 6727cca8f13bSDon Brace c->Request.CDB[8] = (size >> 8) & 0XFF; 6728cca8f13bSDon Brace break; 672966749d0dSScott Teel case BMIC_IDENTIFY_CONTROLLER: 673066749d0dSScott Teel c->Request.CDBLen = 10; 673166749d0dSScott Teel c->Request.type_attr_dir = 673266749d0dSScott Teel TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 673366749d0dSScott Teel c->Request.Timeout = 0; 673466749d0dSScott Teel c->Request.CDB[0] = BMIC_READ; 673566749d0dSScott Teel c->Request.CDB[1] = 0; 673666749d0dSScott Teel c->Request.CDB[2] = 0; 673766749d0dSScott Teel c->Request.CDB[3] = 0; 673866749d0dSScott Teel c->Request.CDB[4] = 0; 673966749d0dSScott Teel c->Request.CDB[5] = 0; 674066749d0dSScott Teel c->Request.CDB[6] = BMIC_IDENTIFY_CONTROLLER; 674166749d0dSScott Teel c->Request.CDB[7] = (size >> 16) & 0xFF; 674266749d0dSScott Teel c->Request.CDB[8] = (size >> 8) & 0XFF; 674366749d0dSScott Teel c->Request.CDB[9] = 0; 674466749d0dSScott Teel break; 6745edd16368SStephen M. Cameron default: 6746edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd); 6747edd16368SStephen M. Cameron BUG(); 6748a2dac136SStephen M. Cameron return -1; 6749edd16368SStephen M. Cameron } 6750edd16368SStephen M. Cameron } else if (cmd_type == TYPE_MSG) { 6751edd16368SStephen M. Cameron switch (cmd) { 6752edd16368SStephen M. Cameron 67530b9b7b6eSScott Teel case HPSA_PHYS_TARGET_RESET: 67540b9b7b6eSScott Teel c->Request.CDBLen = 16; 67550b9b7b6eSScott Teel c->Request.type_attr_dir = 67560b9b7b6eSScott Teel TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 67570b9b7b6eSScott Teel c->Request.Timeout = 0; /* Don't time out */ 67580b9b7b6eSScott Teel memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 67590b9b7b6eSScott Teel c->Request.CDB[0] = HPSA_RESET; 67600b9b7b6eSScott Teel c->Request.CDB[1] = HPSA_TARGET_RESET_TYPE; 67610b9b7b6eSScott Teel /* Physical target reset needs no control bytes 4-7*/ 67620b9b7b6eSScott Teel c->Request.CDB[4] = 0x00; 67630b9b7b6eSScott Teel c->Request.CDB[5] = 0x00; 67640b9b7b6eSScott Teel c->Request.CDB[6] = 0x00; 67650b9b7b6eSScott Teel c->Request.CDB[7] = 0x00; 67660b9b7b6eSScott Teel break; 6767edd16368SStephen M. Cameron case HPSA_DEVICE_RESET_MSG: 6768edd16368SStephen M. Cameron c->Request.CDBLen = 16; 6769a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6770a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 6771edd16368SStephen M. Cameron c->Request.Timeout = 0; /* Don't time out */ 677264670ac8SStephen M. Cameron memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 677364670ac8SStephen M. Cameron c->Request.CDB[0] = cmd; 677421e89afdSStephen M. Cameron c->Request.CDB[1] = HPSA_RESET_TYPE_LUN; 6775edd16368SStephen M. Cameron /* If bytes 4-7 are zero, it means reset the */ 6776edd16368SStephen M. Cameron /* LunID device */ 6777edd16368SStephen M. Cameron c->Request.CDB[4] = 0x00; 6778edd16368SStephen M. Cameron c->Request.CDB[5] = 0x00; 6779edd16368SStephen M. Cameron c->Request.CDB[6] = 0x00; 6780edd16368SStephen M. Cameron c->Request.CDB[7] = 0x00; 6781edd16368SStephen M. Cameron break; 678275167d2cSStephen M. Cameron case HPSA_ABORT_MSG: 67839b5c48c2SStephen Cameron memcpy(&tag, buff, sizeof(tag)); 67842b08b3e9SDon Brace dev_dbg(&h->pdev->dev, 67859b5c48c2SStephen Cameron "Abort Tag:0x%016llx using rqst Tag:0x%016llx", 67869b5c48c2SStephen Cameron tag, c->Header.tag); 678775167d2cSStephen M. Cameron c->Request.CDBLen = 16; 6788a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6789a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, 6790a505b86fSStephen M. Cameron ATTR_SIMPLE, XFER_WRITE); 679175167d2cSStephen M. Cameron c->Request.Timeout = 0; /* Don't time out */ 679275167d2cSStephen M. Cameron c->Request.CDB[0] = HPSA_TASK_MANAGEMENT; 679375167d2cSStephen M. Cameron c->Request.CDB[1] = HPSA_TMF_ABORT_TASK; 679475167d2cSStephen M. Cameron c->Request.CDB[2] = 0x00; /* reserved */ 679575167d2cSStephen M. Cameron c->Request.CDB[3] = 0x00; /* reserved */ 679675167d2cSStephen M. Cameron /* Tag to abort goes in CDB[4]-CDB[11] */ 67979b5c48c2SStephen Cameron memcpy(&c->Request.CDB[4], &tag, sizeof(tag)); 679875167d2cSStephen M. Cameron c->Request.CDB[12] = 0x00; /* reserved */ 679975167d2cSStephen M. Cameron c->Request.CDB[13] = 0x00; /* reserved */ 680075167d2cSStephen M. Cameron c->Request.CDB[14] = 0x00; /* reserved */ 680175167d2cSStephen M. Cameron c->Request.CDB[15] = 0x00; /* reserved */ 680275167d2cSStephen M. Cameron break; 6803edd16368SStephen M. Cameron default: 6804edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "unknown message type %d\n", 6805edd16368SStephen M. Cameron cmd); 6806edd16368SStephen M. Cameron BUG(); 6807edd16368SStephen M. Cameron } 6808edd16368SStephen M. Cameron } else { 6809edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type); 6810edd16368SStephen M. Cameron BUG(); 6811edd16368SStephen M. Cameron } 6812edd16368SStephen M. Cameron 6813a505b86fSStephen M. Cameron switch (GET_DIR(c->Request.type_attr_dir)) { 6814edd16368SStephen M. Cameron case XFER_READ: 6815edd16368SStephen M. Cameron pci_dir = PCI_DMA_FROMDEVICE; 6816edd16368SStephen M. Cameron break; 6817edd16368SStephen M. Cameron case XFER_WRITE: 6818edd16368SStephen M. Cameron pci_dir = PCI_DMA_TODEVICE; 6819edd16368SStephen M. Cameron break; 6820edd16368SStephen M. Cameron case XFER_NONE: 6821edd16368SStephen M. Cameron pci_dir = PCI_DMA_NONE; 6822edd16368SStephen M. Cameron break; 6823edd16368SStephen M. Cameron default: 6824edd16368SStephen M. Cameron pci_dir = PCI_DMA_BIDIRECTIONAL; 6825edd16368SStephen M. Cameron } 6826a2dac136SStephen M. Cameron if (hpsa_map_one(h->pdev, c, buff, size, pci_dir)) 6827a2dac136SStephen M. Cameron return -1; 6828a2dac136SStephen M. Cameron return 0; 6829edd16368SStephen M. Cameron } 6830edd16368SStephen M. Cameron 6831edd16368SStephen M. Cameron /* 6832edd16368SStephen M. Cameron * Map (physical) PCI mem into (virtual) kernel space 6833edd16368SStephen M. Cameron */ 6834edd16368SStephen M. Cameron static void __iomem *remap_pci_mem(ulong base, ulong size) 6835edd16368SStephen M. Cameron { 6836edd16368SStephen M. Cameron ulong page_base = ((ulong) base) & PAGE_MASK; 6837edd16368SStephen M. Cameron ulong page_offs = ((ulong) base) - page_base; 6838088ba34cSStephen M. Cameron void __iomem *page_remapped = ioremap_nocache(page_base, 6839088ba34cSStephen M. Cameron page_offs + size); 6840edd16368SStephen M. Cameron 6841edd16368SStephen M. Cameron return page_remapped ? (page_remapped + page_offs) : NULL; 6842edd16368SStephen M. Cameron } 6843edd16368SStephen M. Cameron 6844254f796bSMatt Gates static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q) 6845edd16368SStephen M. Cameron { 6846254f796bSMatt Gates return h->access.command_completed(h, q); 6847edd16368SStephen M. Cameron } 6848edd16368SStephen M. Cameron 6849900c5440SStephen M. Cameron static inline bool interrupt_pending(struct ctlr_info *h) 6850edd16368SStephen M. Cameron { 6851edd16368SStephen M. Cameron return h->access.intr_pending(h); 6852edd16368SStephen M. Cameron } 6853edd16368SStephen M. Cameron 6854edd16368SStephen M. Cameron static inline long interrupt_not_for_us(struct ctlr_info *h) 6855edd16368SStephen M. Cameron { 685610f66018SStephen M. Cameron return (h->access.intr_pending(h) == 0) || 685710f66018SStephen M. Cameron (h->interrupts_enabled == 0); 6858edd16368SStephen M. Cameron } 6859edd16368SStephen M. Cameron 686001a02ffcSStephen M. Cameron static inline int bad_tag(struct ctlr_info *h, u32 tag_index, 686101a02ffcSStephen M. Cameron u32 raw_tag) 6862edd16368SStephen M. Cameron { 6863edd16368SStephen M. Cameron if (unlikely(tag_index >= h->nr_cmds)) { 6864edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag); 6865edd16368SStephen M. Cameron return 1; 6866edd16368SStephen M. Cameron } 6867edd16368SStephen M. Cameron return 0; 6868edd16368SStephen M. Cameron } 6869edd16368SStephen M. Cameron 68705a3d16f5SStephen M. Cameron static inline void finish_cmd(struct CommandList *c) 6871edd16368SStephen M. Cameron { 6872e85c5974SStephen M. Cameron dial_up_lockup_detection_on_fw_flash_complete(c->h, c); 6873c349775eSScott Teel if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI 6874c349775eSScott Teel || c->cmd_type == CMD_IOACCEL2)) 68751fb011fbSStephen M. Cameron complete_scsi_command(c); 68768be986ccSStephen Cameron else if (c->cmd_type == CMD_IOCTL_PEND || c->cmd_type == IOACCEL2_TMF) 6877edd16368SStephen M. Cameron complete(c->waiting); 6878a104c99fSStephen M. Cameron } 6879a104c99fSStephen M. Cameron 6880303932fdSDon Brace /* process completion of an indexed ("direct lookup") command */ 68811d94f94dSStephen M. Cameron static inline void process_indexed_cmd(struct ctlr_info *h, 6882303932fdSDon Brace u32 raw_tag) 6883303932fdSDon Brace { 6884303932fdSDon Brace u32 tag_index; 6885303932fdSDon Brace struct CommandList *c; 6886303932fdSDon Brace 6887f2405db8SDon Brace tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT; 68881d94f94dSStephen M. Cameron if (!bad_tag(h, tag_index, raw_tag)) { 6889303932fdSDon Brace c = h->cmd_pool + tag_index; 68905a3d16f5SStephen M. Cameron finish_cmd(c); 68911d94f94dSStephen M. Cameron } 6892303932fdSDon Brace } 6893303932fdSDon Brace 689464670ac8SStephen M. Cameron /* Some controllers, like p400, will give us one interrupt 689564670ac8SStephen M. Cameron * after a soft reset, even if we turned interrupts off. 689664670ac8SStephen M. Cameron * Only need to check for this in the hpsa_xxx_discard_completions 689764670ac8SStephen M. Cameron * functions. 689864670ac8SStephen M. Cameron */ 689964670ac8SStephen M. Cameron static int ignore_bogus_interrupt(struct ctlr_info *h) 690064670ac8SStephen M. Cameron { 690164670ac8SStephen M. Cameron if (likely(!reset_devices)) 690264670ac8SStephen M. Cameron return 0; 690364670ac8SStephen M. Cameron 690464670ac8SStephen M. Cameron if (likely(h->interrupts_enabled)) 690564670ac8SStephen M. Cameron return 0; 690664670ac8SStephen M. Cameron 690764670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled " 690864670ac8SStephen M. Cameron "(known firmware bug.) Ignoring.\n"); 690964670ac8SStephen M. Cameron 691064670ac8SStephen M. Cameron return 1; 691164670ac8SStephen M. Cameron } 691264670ac8SStephen M. Cameron 6913254f796bSMatt Gates /* 6914254f796bSMatt Gates * Convert &h->q[x] (passed to interrupt handlers) back to h. 6915254f796bSMatt Gates * Relies on (h-q[x] == x) being true for x such that 6916254f796bSMatt Gates * 0 <= x < MAX_REPLY_QUEUES. 6917254f796bSMatt Gates */ 6918254f796bSMatt Gates static struct ctlr_info *queue_to_hba(u8 *queue) 691964670ac8SStephen M. Cameron { 6920254f796bSMatt Gates return container_of((queue - *queue), struct ctlr_info, q[0]); 6921254f796bSMatt Gates } 6922254f796bSMatt Gates 6923254f796bSMatt Gates static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue) 6924254f796bSMatt Gates { 6925254f796bSMatt Gates struct ctlr_info *h = queue_to_hba(queue); 6926254f796bSMatt Gates u8 q = *(u8 *) queue; 692764670ac8SStephen M. Cameron u32 raw_tag; 692864670ac8SStephen M. Cameron 692964670ac8SStephen M. Cameron if (ignore_bogus_interrupt(h)) 693064670ac8SStephen M. Cameron return IRQ_NONE; 693164670ac8SStephen M. Cameron 693264670ac8SStephen M. Cameron if (interrupt_not_for_us(h)) 693364670ac8SStephen M. Cameron return IRQ_NONE; 6934a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 693564670ac8SStephen M. Cameron while (interrupt_pending(h)) { 6936254f796bSMatt Gates raw_tag = get_next_completion(h, q); 693764670ac8SStephen M. Cameron while (raw_tag != FIFO_EMPTY) 6938254f796bSMatt Gates raw_tag = next_command(h, q); 693964670ac8SStephen M. Cameron } 694064670ac8SStephen M. Cameron return IRQ_HANDLED; 694164670ac8SStephen M. Cameron } 694264670ac8SStephen M. Cameron 6943254f796bSMatt Gates static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue) 694464670ac8SStephen M. Cameron { 6945254f796bSMatt Gates struct ctlr_info *h = queue_to_hba(queue); 694664670ac8SStephen M. Cameron u32 raw_tag; 6947254f796bSMatt Gates u8 q = *(u8 *) queue; 694864670ac8SStephen M. Cameron 694964670ac8SStephen M. Cameron if (ignore_bogus_interrupt(h)) 695064670ac8SStephen M. Cameron return IRQ_NONE; 695164670ac8SStephen M. Cameron 6952a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 6953254f796bSMatt Gates raw_tag = get_next_completion(h, q); 695464670ac8SStephen M. Cameron while (raw_tag != FIFO_EMPTY) 6955254f796bSMatt Gates raw_tag = next_command(h, q); 695664670ac8SStephen M. Cameron return IRQ_HANDLED; 695764670ac8SStephen M. Cameron } 695864670ac8SStephen M. Cameron 6959254f796bSMatt Gates static irqreturn_t do_hpsa_intr_intx(int irq, void *queue) 6960edd16368SStephen M. Cameron { 6961254f796bSMatt Gates struct ctlr_info *h = queue_to_hba((u8 *) queue); 6962303932fdSDon Brace u32 raw_tag; 6963254f796bSMatt Gates u8 q = *(u8 *) queue; 6964edd16368SStephen M. Cameron 6965edd16368SStephen M. Cameron if (interrupt_not_for_us(h)) 6966edd16368SStephen M. Cameron return IRQ_NONE; 6967a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 696810f66018SStephen M. Cameron while (interrupt_pending(h)) { 6969254f796bSMatt Gates raw_tag = get_next_completion(h, q); 697010f66018SStephen M. Cameron while (raw_tag != FIFO_EMPTY) { 69711d94f94dSStephen M. Cameron process_indexed_cmd(h, raw_tag); 6972254f796bSMatt Gates raw_tag = next_command(h, q); 697310f66018SStephen M. Cameron } 697410f66018SStephen M. Cameron } 697510f66018SStephen M. Cameron return IRQ_HANDLED; 697610f66018SStephen M. Cameron } 697710f66018SStephen M. Cameron 6978254f796bSMatt Gates static irqreturn_t do_hpsa_intr_msi(int irq, void *queue) 697910f66018SStephen M. Cameron { 6980254f796bSMatt Gates struct ctlr_info *h = queue_to_hba(queue); 698110f66018SStephen M. Cameron u32 raw_tag; 6982254f796bSMatt Gates u8 q = *(u8 *) queue; 698310f66018SStephen M. Cameron 6984a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 6985254f796bSMatt Gates raw_tag = get_next_completion(h, q); 6986303932fdSDon Brace while (raw_tag != FIFO_EMPTY) { 69871d94f94dSStephen M. Cameron process_indexed_cmd(h, raw_tag); 6988254f796bSMatt Gates raw_tag = next_command(h, q); 6989edd16368SStephen M. Cameron } 6990edd16368SStephen M. Cameron return IRQ_HANDLED; 6991edd16368SStephen M. Cameron } 6992edd16368SStephen M. Cameron 6993a9a3a273SStephen M. Cameron /* Send a message CDB to the firmware. Careful, this only works 6994a9a3a273SStephen M. Cameron * in simple mode, not performant mode due to the tag lookup. 6995a9a3a273SStephen M. Cameron * We only ever use this immediately after a controller reset. 6996a9a3a273SStephen M. Cameron */ 69976f039790SGreg Kroah-Hartman static int hpsa_message(struct pci_dev *pdev, unsigned char opcode, 6998edd16368SStephen M. Cameron unsigned char type) 6999edd16368SStephen M. Cameron { 7000edd16368SStephen M. Cameron struct Command { 7001edd16368SStephen M. Cameron struct CommandListHeader CommandHeader; 7002edd16368SStephen M. Cameron struct RequestBlock Request; 7003edd16368SStephen M. Cameron struct ErrDescriptor ErrorDescriptor; 7004edd16368SStephen M. Cameron }; 7005edd16368SStephen M. Cameron struct Command *cmd; 7006edd16368SStephen M. Cameron static const size_t cmd_sz = sizeof(*cmd) + 7007edd16368SStephen M. Cameron sizeof(cmd->ErrorDescriptor); 7008edd16368SStephen M. Cameron dma_addr_t paddr64; 70092b08b3e9SDon Brace __le32 paddr32; 70102b08b3e9SDon Brace u32 tag; 7011edd16368SStephen M. Cameron void __iomem *vaddr; 7012edd16368SStephen M. Cameron int i, err; 7013edd16368SStephen M. Cameron 7014edd16368SStephen M. Cameron vaddr = pci_ioremap_bar(pdev, 0); 7015edd16368SStephen M. Cameron if (vaddr == NULL) 7016edd16368SStephen M. Cameron return -ENOMEM; 7017edd16368SStephen M. Cameron 7018edd16368SStephen M. Cameron /* The Inbound Post Queue only accepts 32-bit physical addresses for the 7019edd16368SStephen M. Cameron * CCISS commands, so they must be allocated from the lower 4GiB of 7020edd16368SStephen M. Cameron * memory. 7021edd16368SStephen M. Cameron */ 7022edd16368SStephen M. Cameron err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 7023edd16368SStephen M. Cameron if (err) { 7024edd16368SStephen M. Cameron iounmap(vaddr); 70251eaec8f3SRobert Elliott return err; 7026edd16368SStephen M. Cameron } 7027edd16368SStephen M. Cameron 7028edd16368SStephen M. Cameron cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64); 7029edd16368SStephen M. Cameron if (cmd == NULL) { 7030edd16368SStephen M. Cameron iounmap(vaddr); 7031edd16368SStephen M. Cameron return -ENOMEM; 7032edd16368SStephen M. Cameron } 7033edd16368SStephen M. Cameron 7034edd16368SStephen M. Cameron /* This must fit, because of the 32-bit consistent DMA mask. Also, 7035edd16368SStephen M. Cameron * although there's no guarantee, we assume that the address is at 7036edd16368SStephen M. Cameron * least 4-byte aligned (most likely, it's page-aligned). 7037edd16368SStephen M. Cameron */ 70382b08b3e9SDon Brace paddr32 = cpu_to_le32(paddr64); 7039edd16368SStephen M. Cameron 7040edd16368SStephen M. Cameron cmd->CommandHeader.ReplyQueue = 0; 7041edd16368SStephen M. Cameron cmd->CommandHeader.SGList = 0; 704250a0decfSStephen M. Cameron cmd->CommandHeader.SGTotal = cpu_to_le16(0); 70432b08b3e9SDon Brace cmd->CommandHeader.tag = cpu_to_le64(paddr64); 7044edd16368SStephen M. Cameron memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8); 7045edd16368SStephen M. Cameron 7046edd16368SStephen M. Cameron cmd->Request.CDBLen = 16; 7047a505b86fSStephen M. Cameron cmd->Request.type_attr_dir = 7048a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE); 7049edd16368SStephen M. Cameron cmd->Request.Timeout = 0; /* Don't time out */ 7050edd16368SStephen M. Cameron cmd->Request.CDB[0] = opcode; 7051edd16368SStephen M. Cameron cmd->Request.CDB[1] = type; 7052edd16368SStephen M. Cameron memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */ 705350a0decfSStephen M. Cameron cmd->ErrorDescriptor.Addr = 70542b08b3e9SDon Brace cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd))); 705550a0decfSStephen M. Cameron cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo)); 7056edd16368SStephen M. Cameron 70572b08b3e9SDon Brace writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET); 7058edd16368SStephen M. Cameron 7059edd16368SStephen M. Cameron for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) { 7060edd16368SStephen M. Cameron tag = readl(vaddr + SA5_REPLY_PORT_OFFSET); 70612b08b3e9SDon Brace if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64) 7062edd16368SStephen M. Cameron break; 7063edd16368SStephen M. Cameron msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS); 7064edd16368SStephen M. Cameron } 7065edd16368SStephen M. Cameron 7066edd16368SStephen M. Cameron iounmap(vaddr); 7067edd16368SStephen M. Cameron 7068edd16368SStephen M. Cameron /* we leak the DMA buffer here ... no choice since the controller could 7069edd16368SStephen M. Cameron * still complete the command. 7070edd16368SStephen M. Cameron */ 7071edd16368SStephen M. Cameron if (i == HPSA_MSG_SEND_RETRY_LIMIT) { 7072edd16368SStephen M. Cameron dev_err(&pdev->dev, "controller message %02x:%02x timed out\n", 7073edd16368SStephen M. Cameron opcode, type); 7074edd16368SStephen M. Cameron return -ETIMEDOUT; 7075edd16368SStephen M. Cameron } 7076edd16368SStephen M. Cameron 7077edd16368SStephen M. Cameron pci_free_consistent(pdev, cmd_sz, cmd, paddr64); 7078edd16368SStephen M. Cameron 7079edd16368SStephen M. Cameron if (tag & HPSA_ERROR_BIT) { 7080edd16368SStephen M. Cameron dev_err(&pdev->dev, "controller message %02x:%02x failed\n", 7081edd16368SStephen M. Cameron opcode, type); 7082edd16368SStephen M. Cameron return -EIO; 7083edd16368SStephen M. Cameron } 7084edd16368SStephen M. Cameron 7085edd16368SStephen M. Cameron dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n", 7086edd16368SStephen M. Cameron opcode, type); 7087edd16368SStephen M. Cameron return 0; 7088edd16368SStephen M. Cameron } 7089edd16368SStephen M. Cameron 7090edd16368SStephen M. Cameron #define hpsa_noop(p) hpsa_message(p, 3, 0) 7091edd16368SStephen M. Cameron 70921df8552aSStephen M. Cameron static int hpsa_controller_hard_reset(struct pci_dev *pdev, 709342a91641SDon Brace void __iomem *vaddr, u32 use_doorbell) 7094edd16368SStephen M. Cameron { 7095edd16368SStephen M. Cameron 70961df8552aSStephen M. Cameron if (use_doorbell) { 70971df8552aSStephen M. Cameron /* For everything after the P600, the PCI power state method 70981df8552aSStephen M. Cameron * of resetting the controller doesn't work, so we have this 70991df8552aSStephen M. Cameron * other way using the doorbell register. 7100edd16368SStephen M. Cameron */ 71011df8552aSStephen M. Cameron dev_info(&pdev->dev, "using doorbell to reset controller\n"); 7102cf0b08d0SStephen M. Cameron writel(use_doorbell, vaddr + SA5_DOORBELL); 710385009239SStephen M. Cameron 710400701a96SJustin Lindley /* PMC hardware guys tell us we need a 10 second delay after 710585009239SStephen M. Cameron * doorbell reset and before any attempt to talk to the board 710685009239SStephen M. Cameron * at all to ensure that this actually works and doesn't fall 710785009239SStephen M. Cameron * over in some weird corner cases. 710885009239SStephen M. Cameron */ 710900701a96SJustin Lindley msleep(10000); 71101df8552aSStephen M. Cameron } else { /* Try to do it the PCI power state way */ 7111edd16368SStephen M. Cameron 7112edd16368SStephen M. Cameron /* Quoting from the Open CISS Specification: "The Power 7113edd16368SStephen M. Cameron * Management Control/Status Register (CSR) controls the power 7114edd16368SStephen M. Cameron * state of the device. The normal operating state is D0, 7115edd16368SStephen M. Cameron * CSR=00h. The software off state is D3, CSR=03h. To reset 71161df8552aSStephen M. Cameron * the controller, place the interface device in D3 then to D0, 71171df8552aSStephen M. Cameron * this causes a secondary PCI reset which will reset the 71181df8552aSStephen M. Cameron * controller." */ 7119edd16368SStephen M. Cameron 71202662cab8SDon Brace int rc = 0; 71212662cab8SDon Brace 71221df8552aSStephen M. Cameron dev_info(&pdev->dev, "using PCI PM to reset controller\n"); 71232662cab8SDon Brace 7124edd16368SStephen M. Cameron /* enter the D3hot power management state */ 71252662cab8SDon Brace rc = pci_set_power_state(pdev, PCI_D3hot); 71262662cab8SDon Brace if (rc) 71272662cab8SDon Brace return rc; 7128edd16368SStephen M. Cameron 7129edd16368SStephen M. Cameron msleep(500); 7130edd16368SStephen M. Cameron 7131edd16368SStephen M. Cameron /* enter the D0 power management state */ 71322662cab8SDon Brace rc = pci_set_power_state(pdev, PCI_D0); 71332662cab8SDon Brace if (rc) 71342662cab8SDon Brace return rc; 7135c4853efeSMike Miller 7136c4853efeSMike Miller /* 7137c4853efeSMike Miller * The P600 requires a small delay when changing states. 7138c4853efeSMike Miller * Otherwise we may think the board did not reset and we bail. 7139c4853efeSMike Miller * This for kdump only and is particular to the P600. 7140c4853efeSMike Miller */ 7141c4853efeSMike Miller msleep(500); 71421df8552aSStephen M. Cameron } 71431df8552aSStephen M. Cameron return 0; 71441df8552aSStephen M. Cameron } 71451df8552aSStephen M. Cameron 71466f039790SGreg Kroah-Hartman static void init_driver_version(char *driver_version, int len) 7147580ada3cSStephen M. Cameron { 7148580ada3cSStephen M. Cameron memset(driver_version, 0, len); 7149f79cfec6SStephen M. Cameron strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1); 7150580ada3cSStephen M. Cameron } 7151580ada3cSStephen M. Cameron 71526f039790SGreg Kroah-Hartman static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable) 7153580ada3cSStephen M. Cameron { 7154580ada3cSStephen M. Cameron char *driver_version; 7155580ada3cSStephen M. Cameron int i, size = sizeof(cfgtable->driver_version); 7156580ada3cSStephen M. Cameron 7157580ada3cSStephen M. Cameron driver_version = kmalloc(size, GFP_KERNEL); 7158580ada3cSStephen M. Cameron if (!driver_version) 7159580ada3cSStephen M. Cameron return -ENOMEM; 7160580ada3cSStephen M. Cameron 7161580ada3cSStephen M. Cameron init_driver_version(driver_version, size); 7162580ada3cSStephen M. Cameron for (i = 0; i < size; i++) 7163580ada3cSStephen M. Cameron writeb(driver_version[i], &cfgtable->driver_version[i]); 7164580ada3cSStephen M. Cameron kfree(driver_version); 7165580ada3cSStephen M. Cameron return 0; 7166580ada3cSStephen M. Cameron } 7167580ada3cSStephen M. Cameron 71686f039790SGreg Kroah-Hartman static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable, 71696f039790SGreg Kroah-Hartman unsigned char *driver_ver) 7170580ada3cSStephen M. Cameron { 7171580ada3cSStephen M. Cameron int i; 7172580ada3cSStephen M. Cameron 7173580ada3cSStephen M. Cameron for (i = 0; i < sizeof(cfgtable->driver_version); i++) 7174580ada3cSStephen M. Cameron driver_ver[i] = readb(&cfgtable->driver_version[i]); 7175580ada3cSStephen M. Cameron } 7176580ada3cSStephen M. Cameron 71776f039790SGreg Kroah-Hartman static int controller_reset_failed(struct CfgTable __iomem *cfgtable) 7178580ada3cSStephen M. Cameron { 7179580ada3cSStephen M. Cameron 7180580ada3cSStephen M. Cameron char *driver_ver, *old_driver_ver; 7181580ada3cSStephen M. Cameron int rc, size = sizeof(cfgtable->driver_version); 7182580ada3cSStephen M. Cameron 7183580ada3cSStephen M. Cameron old_driver_ver = kmalloc(2 * size, GFP_KERNEL); 7184580ada3cSStephen M. Cameron if (!old_driver_ver) 7185580ada3cSStephen M. Cameron return -ENOMEM; 7186580ada3cSStephen M. Cameron driver_ver = old_driver_ver + size; 7187580ada3cSStephen M. Cameron 7188580ada3cSStephen M. Cameron /* After a reset, the 32 bytes of "driver version" in the cfgtable 7189580ada3cSStephen M. Cameron * should have been changed, otherwise we know the reset failed. 7190580ada3cSStephen M. Cameron */ 7191580ada3cSStephen M. Cameron init_driver_version(old_driver_ver, size); 7192580ada3cSStephen M. Cameron read_driver_ver_from_cfgtable(cfgtable, driver_ver); 7193580ada3cSStephen M. Cameron rc = !memcmp(driver_ver, old_driver_ver, size); 7194580ada3cSStephen M. Cameron kfree(old_driver_ver); 7195580ada3cSStephen M. Cameron return rc; 7196580ada3cSStephen M. Cameron } 71971df8552aSStephen M. Cameron /* This does a hard reset of the controller using PCI power management 71981df8552aSStephen M. Cameron * states or the using the doorbell register. 71991df8552aSStephen M. Cameron */ 72006b6c1cd7STomas Henzl static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id) 72011df8552aSStephen M. Cameron { 72021df8552aSStephen M. Cameron u64 cfg_offset; 72031df8552aSStephen M. Cameron u32 cfg_base_addr; 72041df8552aSStephen M. Cameron u64 cfg_base_addr_index; 72051df8552aSStephen M. Cameron void __iomem *vaddr; 72061df8552aSStephen M. Cameron unsigned long paddr; 7207580ada3cSStephen M. Cameron u32 misc_fw_support; 7208270d05deSStephen M. Cameron int rc; 72091df8552aSStephen M. Cameron struct CfgTable __iomem *cfgtable; 7210cf0b08d0SStephen M. Cameron u32 use_doorbell; 7211270d05deSStephen M. Cameron u16 command_register; 72121df8552aSStephen M. Cameron 72131df8552aSStephen M. Cameron /* For controllers as old as the P600, this is very nearly 72141df8552aSStephen M. Cameron * the same thing as 72151df8552aSStephen M. Cameron * 72161df8552aSStephen M. Cameron * pci_save_state(pci_dev); 72171df8552aSStephen M. Cameron * pci_set_power_state(pci_dev, PCI_D3hot); 72181df8552aSStephen M. Cameron * pci_set_power_state(pci_dev, PCI_D0); 72191df8552aSStephen M. Cameron * pci_restore_state(pci_dev); 72201df8552aSStephen M. Cameron * 72211df8552aSStephen M. Cameron * For controllers newer than the P600, the pci power state 72221df8552aSStephen M. Cameron * method of resetting doesn't work so we have another way 72231df8552aSStephen M. Cameron * using the doorbell register. 72241df8552aSStephen M. Cameron */ 722518867659SStephen M. Cameron 722660f923b9SRobert Elliott if (!ctlr_is_resettable(board_id)) { 722760f923b9SRobert Elliott dev_warn(&pdev->dev, "Controller not resettable\n"); 722825c1e56aSStephen M. Cameron return -ENODEV; 722925c1e56aSStephen M. Cameron } 723046380786SStephen M. Cameron 723146380786SStephen M. Cameron /* if controller is soft- but not hard resettable... */ 723246380786SStephen M. Cameron if (!ctlr_is_hard_resettable(board_id)) 723346380786SStephen M. Cameron return -ENOTSUPP; /* try soft reset later. */ 723418867659SStephen M. Cameron 7235270d05deSStephen M. Cameron /* Save the PCI command register */ 7236270d05deSStephen M. Cameron pci_read_config_word(pdev, 4, &command_register); 7237270d05deSStephen M. Cameron pci_save_state(pdev); 72381df8552aSStephen M. Cameron 72391df8552aSStephen M. Cameron /* find the first memory BAR, so we can find the cfg table */ 72401df8552aSStephen M. Cameron rc = hpsa_pci_find_memory_BAR(pdev, &paddr); 72411df8552aSStephen M. Cameron if (rc) 72421df8552aSStephen M. Cameron return rc; 72431df8552aSStephen M. Cameron vaddr = remap_pci_mem(paddr, 0x250); 72441df8552aSStephen M. Cameron if (!vaddr) 72451df8552aSStephen M. Cameron return -ENOMEM; 72461df8552aSStephen M. Cameron 72471df8552aSStephen M. Cameron /* find cfgtable in order to check if reset via doorbell is supported */ 72481df8552aSStephen M. Cameron rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr, 72491df8552aSStephen M. Cameron &cfg_base_addr_index, &cfg_offset); 72501df8552aSStephen M. Cameron if (rc) 72511df8552aSStephen M. Cameron goto unmap_vaddr; 72521df8552aSStephen M. Cameron cfgtable = remap_pci_mem(pci_resource_start(pdev, 72531df8552aSStephen M. Cameron cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable)); 72541df8552aSStephen M. Cameron if (!cfgtable) { 72551df8552aSStephen M. Cameron rc = -ENOMEM; 72561df8552aSStephen M. Cameron goto unmap_vaddr; 72571df8552aSStephen M. Cameron } 7258580ada3cSStephen M. Cameron rc = write_driver_ver_to_cfgtable(cfgtable); 7259580ada3cSStephen M. Cameron if (rc) 726003741d95STomas Henzl goto unmap_cfgtable; 72611df8552aSStephen M. Cameron 7262cf0b08d0SStephen M. Cameron /* If reset via doorbell register is supported, use that. 7263cf0b08d0SStephen M. Cameron * There are two such methods. Favor the newest method. 7264cf0b08d0SStephen M. Cameron */ 72651df8552aSStephen M. Cameron misc_fw_support = readl(&cfgtable->misc_fw_support); 7266cf0b08d0SStephen M. Cameron use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2; 7267cf0b08d0SStephen M. Cameron if (use_doorbell) { 7268cf0b08d0SStephen M. Cameron use_doorbell = DOORBELL_CTLR_RESET2; 7269cf0b08d0SStephen M. Cameron } else { 72701df8552aSStephen M. Cameron use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET; 7271cf0b08d0SStephen M. Cameron if (use_doorbell) { 7272050f7147SStephen Cameron dev_warn(&pdev->dev, 7273050f7147SStephen Cameron "Soft reset not supported. Firmware update is required.\n"); 727464670ac8SStephen M. Cameron rc = -ENOTSUPP; /* try soft reset */ 7275cf0b08d0SStephen M. Cameron goto unmap_cfgtable; 7276cf0b08d0SStephen M. Cameron } 7277cf0b08d0SStephen M. Cameron } 72781df8552aSStephen M. Cameron 72791df8552aSStephen M. Cameron rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell); 72801df8552aSStephen M. Cameron if (rc) 72811df8552aSStephen M. Cameron goto unmap_cfgtable; 7282edd16368SStephen M. Cameron 7283270d05deSStephen M. Cameron pci_restore_state(pdev); 7284270d05deSStephen M. Cameron pci_write_config_word(pdev, 4, command_register); 7285edd16368SStephen M. Cameron 72861df8552aSStephen M. Cameron /* Some devices (notably the HP Smart Array 5i Controller) 72871df8552aSStephen M. Cameron need a little pause here */ 72881df8552aSStephen M. Cameron msleep(HPSA_POST_RESET_PAUSE_MSECS); 72891df8552aSStephen M. Cameron 7290fe5389c8SStephen M. Cameron rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY); 7291fe5389c8SStephen M. Cameron if (rc) { 7292fe5389c8SStephen M. Cameron dev_warn(&pdev->dev, 7293050f7147SStephen Cameron "Failed waiting for board to become ready after hard reset\n"); 7294fe5389c8SStephen M. Cameron goto unmap_cfgtable; 7295fe5389c8SStephen M. Cameron } 7296fe5389c8SStephen M. Cameron 7297580ada3cSStephen M. Cameron rc = controller_reset_failed(vaddr); 7298580ada3cSStephen M. Cameron if (rc < 0) 7299580ada3cSStephen M. Cameron goto unmap_cfgtable; 7300580ada3cSStephen M. Cameron if (rc) { 730164670ac8SStephen M. Cameron dev_warn(&pdev->dev, "Unable to successfully reset " 730264670ac8SStephen M. Cameron "controller. Will try soft reset.\n"); 730364670ac8SStephen M. Cameron rc = -ENOTSUPP; 7304580ada3cSStephen M. Cameron } else { 730564670ac8SStephen M. Cameron dev_info(&pdev->dev, "board ready after hard reset.\n"); 73061df8552aSStephen M. Cameron } 73071df8552aSStephen M. Cameron 73081df8552aSStephen M. Cameron unmap_cfgtable: 73091df8552aSStephen M. Cameron iounmap(cfgtable); 73101df8552aSStephen M. Cameron 73111df8552aSStephen M. Cameron unmap_vaddr: 73121df8552aSStephen M. Cameron iounmap(vaddr); 73131df8552aSStephen M. Cameron return rc; 7314edd16368SStephen M. Cameron } 7315edd16368SStephen M. Cameron 7316edd16368SStephen M. Cameron /* 7317edd16368SStephen M. Cameron * We cannot read the structure directly, for portability we must use 7318edd16368SStephen M. Cameron * the io functions. 7319edd16368SStephen M. Cameron * This is for debug only. 7320edd16368SStephen M. Cameron */ 732142a91641SDon Brace static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb) 7322edd16368SStephen M. Cameron { 732358f8665cSStephen M. Cameron #ifdef HPSA_DEBUG 7324edd16368SStephen M. Cameron int i; 7325edd16368SStephen M. Cameron char temp_name[17]; 7326edd16368SStephen M. Cameron 7327edd16368SStephen M. Cameron dev_info(dev, "Controller Configuration information\n"); 7328edd16368SStephen M. Cameron dev_info(dev, "------------------------------------\n"); 7329edd16368SStephen M. Cameron for (i = 0; i < 4; i++) 7330edd16368SStephen M. Cameron temp_name[i] = readb(&(tb->Signature[i])); 7331edd16368SStephen M. Cameron temp_name[4] = '\0'; 7332edd16368SStephen M. Cameron dev_info(dev, " Signature = %s\n", temp_name); 7333edd16368SStephen M. Cameron dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence))); 7334edd16368SStephen M. Cameron dev_info(dev, " Transport methods supported = 0x%x\n", 7335edd16368SStephen M. Cameron readl(&(tb->TransportSupport))); 7336edd16368SStephen M. Cameron dev_info(dev, " Transport methods active = 0x%x\n", 7337edd16368SStephen M. Cameron readl(&(tb->TransportActive))); 7338edd16368SStephen M. Cameron dev_info(dev, " Requested transport Method = 0x%x\n", 7339edd16368SStephen M. Cameron readl(&(tb->HostWrite.TransportRequest))); 7340edd16368SStephen M. Cameron dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n", 7341edd16368SStephen M. Cameron readl(&(tb->HostWrite.CoalIntDelay))); 7342edd16368SStephen M. Cameron dev_info(dev, " Coalesce Interrupt Count = 0x%x\n", 7343edd16368SStephen M. Cameron readl(&(tb->HostWrite.CoalIntCount))); 734469d6e33dSRobert Elliott dev_info(dev, " Max outstanding commands = %d\n", 7345edd16368SStephen M. Cameron readl(&(tb->CmdsOutMax))); 7346edd16368SStephen M. Cameron dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes))); 7347edd16368SStephen M. Cameron for (i = 0; i < 16; i++) 7348edd16368SStephen M. Cameron temp_name[i] = readb(&(tb->ServerName[i])); 7349edd16368SStephen M. Cameron temp_name[16] = '\0'; 7350edd16368SStephen M. Cameron dev_info(dev, " Server Name = %s\n", temp_name); 7351edd16368SStephen M. Cameron dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n", 7352edd16368SStephen M. Cameron readl(&(tb->HeartBeat))); 7353edd16368SStephen M. Cameron #endif /* HPSA_DEBUG */ 735458f8665cSStephen M. Cameron } 7355edd16368SStephen M. Cameron 7356edd16368SStephen M. Cameron static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr) 7357edd16368SStephen M. Cameron { 7358edd16368SStephen M. Cameron int i, offset, mem_type, bar_type; 7359edd16368SStephen M. Cameron 7360edd16368SStephen M. Cameron if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */ 7361edd16368SStephen M. Cameron return 0; 7362edd16368SStephen M. Cameron offset = 0; 7363edd16368SStephen M. Cameron for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { 7364edd16368SStephen M. Cameron bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE; 7365edd16368SStephen M. Cameron if (bar_type == PCI_BASE_ADDRESS_SPACE_IO) 7366edd16368SStephen M. Cameron offset += 4; 7367edd16368SStephen M. Cameron else { 7368edd16368SStephen M. Cameron mem_type = pci_resource_flags(pdev, i) & 7369edd16368SStephen M. Cameron PCI_BASE_ADDRESS_MEM_TYPE_MASK; 7370edd16368SStephen M. Cameron switch (mem_type) { 7371edd16368SStephen M. Cameron case PCI_BASE_ADDRESS_MEM_TYPE_32: 7372edd16368SStephen M. Cameron case PCI_BASE_ADDRESS_MEM_TYPE_1M: 7373edd16368SStephen M. Cameron offset += 4; /* 32 bit */ 7374edd16368SStephen M. Cameron break; 7375edd16368SStephen M. Cameron case PCI_BASE_ADDRESS_MEM_TYPE_64: 7376edd16368SStephen M. Cameron offset += 8; 7377edd16368SStephen M. Cameron break; 7378edd16368SStephen M. Cameron default: /* reserved in PCI 2.2 */ 7379edd16368SStephen M. Cameron dev_warn(&pdev->dev, 7380edd16368SStephen M. Cameron "base address is invalid\n"); 7381edd16368SStephen M. Cameron return -1; 7382edd16368SStephen M. Cameron break; 7383edd16368SStephen M. Cameron } 7384edd16368SStephen M. Cameron } 7385edd16368SStephen M. Cameron if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0) 7386edd16368SStephen M. Cameron return i + 1; 7387edd16368SStephen M. Cameron } 7388edd16368SStephen M. Cameron return -1; 7389edd16368SStephen M. Cameron } 7390edd16368SStephen M. Cameron 7391cc64c817SRobert Elliott static void hpsa_disable_interrupt_mode(struct ctlr_info *h) 7392cc64c817SRobert Elliott { 7393cc64c817SRobert Elliott if (h->msix_vector) { 7394cc64c817SRobert Elliott if (h->pdev->msix_enabled) 7395cc64c817SRobert Elliott pci_disable_msix(h->pdev); 7396105a3dbcSRobert Elliott h->msix_vector = 0; 7397cc64c817SRobert Elliott } else if (h->msi_vector) { 7398cc64c817SRobert Elliott if (h->pdev->msi_enabled) 7399cc64c817SRobert Elliott pci_disable_msi(h->pdev); 7400105a3dbcSRobert Elliott h->msi_vector = 0; 7401cc64c817SRobert Elliott } 7402cc64c817SRobert Elliott } 7403cc64c817SRobert Elliott 7404edd16368SStephen M. Cameron /* If MSI/MSI-X is supported by the kernel we will try to enable it on 7405050f7147SStephen Cameron * controllers that are capable. If not, we use legacy INTx mode. 7406edd16368SStephen M. Cameron */ 74076f039790SGreg Kroah-Hartman static void hpsa_interrupt_mode(struct ctlr_info *h) 7408edd16368SStephen M. Cameron { 7409edd16368SStephen M. Cameron #ifdef CONFIG_PCI_MSI 7410254f796bSMatt Gates int err, i; 7411254f796bSMatt Gates struct msix_entry hpsa_msix_entries[MAX_REPLY_QUEUES]; 7412254f796bSMatt Gates 7413254f796bSMatt Gates for (i = 0; i < MAX_REPLY_QUEUES; i++) { 7414254f796bSMatt Gates hpsa_msix_entries[i].vector = 0; 7415254f796bSMatt Gates hpsa_msix_entries[i].entry = i; 7416254f796bSMatt Gates } 7417edd16368SStephen M. Cameron 7418edd16368SStephen M. Cameron /* Some boards advertise MSI but don't really support it */ 74196b3f4c52SStephen M. Cameron if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) || 74206b3f4c52SStephen M. Cameron (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11)) 7421edd16368SStephen M. Cameron goto default_int_mode; 742255c06c71SStephen M. Cameron if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) { 7423050f7147SStephen Cameron dev_info(&h->pdev->dev, "MSI-X capable controller\n"); 7424eee0f03aSHannes Reinecke h->msix_vector = MAX_REPLY_QUEUES; 7425f89439bcSStephen M. Cameron if (h->msix_vector > num_online_cpus()) 7426f89439bcSStephen M. Cameron h->msix_vector = num_online_cpus(); 742718fce3c4SAlexander Gordeev err = pci_enable_msix_range(h->pdev, hpsa_msix_entries, 742818fce3c4SAlexander Gordeev 1, h->msix_vector); 742918fce3c4SAlexander Gordeev if (err < 0) { 743018fce3c4SAlexander Gordeev dev_warn(&h->pdev->dev, "MSI-X init failed %d\n", err); 743118fce3c4SAlexander Gordeev h->msix_vector = 0; 743218fce3c4SAlexander Gordeev goto single_msi_mode; 743318fce3c4SAlexander Gordeev } else if (err < h->msix_vector) { 743455c06c71SStephen M. Cameron dev_warn(&h->pdev->dev, "only %d MSI-X vectors " 7435edd16368SStephen M. Cameron "available\n", err); 7436eee0f03aSHannes Reinecke } 743718fce3c4SAlexander Gordeev h->msix_vector = err; 7438eee0f03aSHannes Reinecke for (i = 0; i < h->msix_vector; i++) 7439eee0f03aSHannes Reinecke h->intr[i] = hpsa_msix_entries[i].vector; 7440eee0f03aSHannes Reinecke return; 7441edd16368SStephen M. Cameron } 744218fce3c4SAlexander Gordeev single_msi_mode: 744355c06c71SStephen M. Cameron if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) { 7444050f7147SStephen Cameron dev_info(&h->pdev->dev, "MSI capable controller\n"); 744555c06c71SStephen M. Cameron if (!pci_enable_msi(h->pdev)) 7446edd16368SStephen M. Cameron h->msi_vector = 1; 7447edd16368SStephen M. Cameron else 744855c06c71SStephen M. Cameron dev_warn(&h->pdev->dev, "MSI init failed\n"); 7449edd16368SStephen M. Cameron } 7450edd16368SStephen M. Cameron default_int_mode: 7451edd16368SStephen M. Cameron #endif /* CONFIG_PCI_MSI */ 7452edd16368SStephen M. Cameron /* if we get here we're going to use the default interrupt mode */ 7453a9a3a273SStephen M. Cameron h->intr[h->intr_mode] = h->pdev->irq; 7454edd16368SStephen M. Cameron } 7455edd16368SStephen M. Cameron 74566f039790SGreg Kroah-Hartman static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id) 7457e5c880d1SStephen M. Cameron { 7458e5c880d1SStephen M. Cameron int i; 7459e5c880d1SStephen M. Cameron u32 subsystem_vendor_id, subsystem_device_id; 7460e5c880d1SStephen M. Cameron 7461e5c880d1SStephen M. Cameron subsystem_vendor_id = pdev->subsystem_vendor; 7462e5c880d1SStephen M. Cameron subsystem_device_id = pdev->subsystem_device; 7463e5c880d1SStephen M. Cameron *board_id = ((subsystem_device_id << 16) & 0xffff0000) | 7464e5c880d1SStephen M. Cameron subsystem_vendor_id; 7465e5c880d1SStephen M. Cameron 7466e5c880d1SStephen M. Cameron for (i = 0; i < ARRAY_SIZE(products); i++) 7467e5c880d1SStephen M. Cameron if (*board_id == products[i].board_id) 7468e5c880d1SStephen M. Cameron return i; 7469e5c880d1SStephen M. Cameron 74706798cc0aSStephen M. Cameron if ((subsystem_vendor_id != PCI_VENDOR_ID_HP && 74716798cc0aSStephen M. Cameron subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) || 74726798cc0aSStephen M. Cameron !hpsa_allow_any) { 7473e5c880d1SStephen M. Cameron dev_warn(&pdev->dev, "unrecognized board ID: " 7474e5c880d1SStephen M. Cameron "0x%08x, ignoring.\n", *board_id); 7475e5c880d1SStephen M. Cameron return -ENODEV; 7476e5c880d1SStephen M. Cameron } 7477e5c880d1SStephen M. Cameron return ARRAY_SIZE(products) - 1; /* generic unknown smart array */ 7478e5c880d1SStephen M. Cameron } 7479e5c880d1SStephen M. Cameron 74806f039790SGreg Kroah-Hartman static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 74813a7774ceSStephen M. Cameron unsigned long *memory_bar) 74823a7774ceSStephen M. Cameron { 74833a7774ceSStephen M. Cameron int i; 74843a7774ceSStephen M. Cameron 74853a7774ceSStephen M. Cameron for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) 748612d2cd47SStephen M. Cameron if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) { 74873a7774ceSStephen M. Cameron /* addressing mode bits already removed */ 748812d2cd47SStephen M. Cameron *memory_bar = pci_resource_start(pdev, i); 748912d2cd47SStephen M. Cameron dev_dbg(&pdev->dev, "memory BAR = %lx\n", 74903a7774ceSStephen M. Cameron *memory_bar); 74913a7774ceSStephen M. Cameron return 0; 74923a7774ceSStephen M. Cameron } 749312d2cd47SStephen M. Cameron dev_warn(&pdev->dev, "no memory BAR found\n"); 74943a7774ceSStephen M. Cameron return -ENODEV; 74953a7774ceSStephen M. Cameron } 74963a7774ceSStephen M. Cameron 74976f039790SGreg Kroah-Hartman static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 74986f039790SGreg Kroah-Hartman int wait_for_ready) 74992c4c8c8bSStephen M. Cameron { 7500fe5389c8SStephen M. Cameron int i, iterations; 75012c4c8c8bSStephen M. Cameron u32 scratchpad; 7502fe5389c8SStephen M. Cameron if (wait_for_ready) 7503fe5389c8SStephen M. Cameron iterations = HPSA_BOARD_READY_ITERATIONS; 7504fe5389c8SStephen M. Cameron else 7505fe5389c8SStephen M. Cameron iterations = HPSA_BOARD_NOT_READY_ITERATIONS; 75062c4c8c8bSStephen M. Cameron 7507fe5389c8SStephen M. Cameron for (i = 0; i < iterations; i++) { 7508fe5389c8SStephen M. Cameron scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET); 7509fe5389c8SStephen M. Cameron if (wait_for_ready) { 75102c4c8c8bSStephen M. Cameron if (scratchpad == HPSA_FIRMWARE_READY) 75112c4c8c8bSStephen M. Cameron return 0; 7512fe5389c8SStephen M. Cameron } else { 7513fe5389c8SStephen M. Cameron if (scratchpad != HPSA_FIRMWARE_READY) 7514fe5389c8SStephen M. Cameron return 0; 7515fe5389c8SStephen M. Cameron } 75162c4c8c8bSStephen M. Cameron msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS); 75172c4c8c8bSStephen M. Cameron } 7518fe5389c8SStephen M. Cameron dev_warn(&pdev->dev, "board not ready, timed out.\n"); 75192c4c8c8bSStephen M. Cameron return -ENODEV; 75202c4c8c8bSStephen M. Cameron } 75212c4c8c8bSStephen M. Cameron 75226f039790SGreg Kroah-Hartman static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 75236f039790SGreg Kroah-Hartman u32 *cfg_base_addr, u64 *cfg_base_addr_index, 7524a51fd47fSStephen M. Cameron u64 *cfg_offset) 7525a51fd47fSStephen M. Cameron { 7526a51fd47fSStephen M. Cameron *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET); 7527a51fd47fSStephen M. Cameron *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET); 7528a51fd47fSStephen M. Cameron *cfg_base_addr &= (u32) 0x0000ffff; 7529a51fd47fSStephen M. Cameron *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr); 7530a51fd47fSStephen M. Cameron if (*cfg_base_addr_index == -1) { 7531a51fd47fSStephen M. Cameron dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n"); 7532a51fd47fSStephen M. Cameron return -ENODEV; 7533a51fd47fSStephen M. Cameron } 7534a51fd47fSStephen M. Cameron return 0; 7535a51fd47fSStephen M. Cameron } 7536a51fd47fSStephen M. Cameron 7537195f2c65SRobert Elliott static void hpsa_free_cfgtables(struct ctlr_info *h) 7538195f2c65SRobert Elliott { 7539105a3dbcSRobert Elliott if (h->transtable) { 7540195f2c65SRobert Elliott iounmap(h->transtable); 7541105a3dbcSRobert Elliott h->transtable = NULL; 7542105a3dbcSRobert Elliott } 7543105a3dbcSRobert Elliott if (h->cfgtable) { 7544195f2c65SRobert Elliott iounmap(h->cfgtable); 7545105a3dbcSRobert Elliott h->cfgtable = NULL; 7546105a3dbcSRobert Elliott } 7547195f2c65SRobert Elliott } 7548195f2c65SRobert Elliott 7549195f2c65SRobert Elliott /* Find and map CISS config table and transfer table 7550195f2c65SRobert Elliott + * several items must be unmapped (freed) later 7551195f2c65SRobert Elliott + * */ 75526f039790SGreg Kroah-Hartman static int hpsa_find_cfgtables(struct ctlr_info *h) 7553edd16368SStephen M. Cameron { 755401a02ffcSStephen M. Cameron u64 cfg_offset; 755501a02ffcSStephen M. Cameron u32 cfg_base_addr; 755601a02ffcSStephen M. Cameron u64 cfg_base_addr_index; 7557303932fdSDon Brace u32 trans_offset; 7558a51fd47fSStephen M. Cameron int rc; 755977c4495cSStephen M. Cameron 7560a51fd47fSStephen M. Cameron rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 7561a51fd47fSStephen M. Cameron &cfg_base_addr_index, &cfg_offset); 7562a51fd47fSStephen M. Cameron if (rc) 7563a51fd47fSStephen M. Cameron return rc; 756477c4495cSStephen M. Cameron h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev, 7565a51fd47fSStephen M. Cameron cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable)); 7566cd3c81c4SRobert Elliott if (!h->cfgtable) { 7567cd3c81c4SRobert Elliott dev_err(&h->pdev->dev, "Failed mapping cfgtable\n"); 756877c4495cSStephen M. Cameron return -ENOMEM; 7569cd3c81c4SRobert Elliott } 7570580ada3cSStephen M. Cameron rc = write_driver_ver_to_cfgtable(h->cfgtable); 7571580ada3cSStephen M. Cameron if (rc) 7572580ada3cSStephen M. Cameron return rc; 757377c4495cSStephen M. Cameron /* Find performant mode table. */ 7574a51fd47fSStephen M. Cameron trans_offset = readl(&h->cfgtable->TransMethodOffset); 757577c4495cSStephen M. Cameron h->transtable = remap_pci_mem(pci_resource_start(h->pdev, 757677c4495cSStephen M. Cameron cfg_base_addr_index)+cfg_offset+trans_offset, 757777c4495cSStephen M. Cameron sizeof(*h->transtable)); 7578195f2c65SRobert Elliott if (!h->transtable) { 7579195f2c65SRobert Elliott dev_err(&h->pdev->dev, "Failed mapping transfer table\n"); 7580195f2c65SRobert Elliott hpsa_free_cfgtables(h); 758177c4495cSStephen M. Cameron return -ENOMEM; 7582195f2c65SRobert Elliott } 758377c4495cSStephen M. Cameron return 0; 758477c4495cSStephen M. Cameron } 758577c4495cSStephen M. Cameron 75866f039790SGreg Kroah-Hartman static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h) 7587cba3d38bSStephen M. Cameron { 758841ce4c35SStephen Cameron #define MIN_MAX_COMMANDS 16 758941ce4c35SStephen Cameron BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS); 759041ce4c35SStephen Cameron 759141ce4c35SStephen Cameron h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands); 759272ceeaecSStephen M. Cameron 759372ceeaecSStephen M. Cameron /* Limit commands in memory limited kdump scenario. */ 759472ceeaecSStephen M. Cameron if (reset_devices && h->max_commands > 32) 759572ceeaecSStephen M. Cameron h->max_commands = 32; 759672ceeaecSStephen M. Cameron 759741ce4c35SStephen Cameron if (h->max_commands < MIN_MAX_COMMANDS) { 759841ce4c35SStephen Cameron dev_warn(&h->pdev->dev, 759941ce4c35SStephen Cameron "Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n", 760041ce4c35SStephen Cameron h->max_commands, 760141ce4c35SStephen Cameron MIN_MAX_COMMANDS); 760241ce4c35SStephen Cameron h->max_commands = MIN_MAX_COMMANDS; 7603cba3d38bSStephen M. Cameron } 7604cba3d38bSStephen M. Cameron } 7605cba3d38bSStephen M. Cameron 7606c7ee65b3SWebb Scales /* If the controller reports that the total max sg entries is greater than 512, 7607c7ee65b3SWebb Scales * then we know that chained SG blocks work. (Original smart arrays did not 7608c7ee65b3SWebb Scales * support chained SG blocks and would return zero for max sg entries.) 7609c7ee65b3SWebb Scales */ 7610c7ee65b3SWebb Scales static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h) 7611c7ee65b3SWebb Scales { 7612c7ee65b3SWebb Scales return h->maxsgentries > 512; 7613c7ee65b3SWebb Scales } 7614c7ee65b3SWebb Scales 7615b93d7536SStephen M. Cameron /* Interrogate the hardware for some limits: 7616b93d7536SStephen M. Cameron * max commands, max SG elements without chaining, and with chaining, 7617b93d7536SStephen M. Cameron * SG chain block size, etc. 7618b93d7536SStephen M. Cameron */ 76196f039790SGreg Kroah-Hartman static void hpsa_find_board_params(struct ctlr_info *h) 7620b93d7536SStephen M. Cameron { 7621cba3d38bSStephen M. Cameron hpsa_get_max_perf_mode_cmds(h); 762245fcb86eSStephen Cameron h->nr_cmds = h->max_commands; 7623b93d7536SStephen M. Cameron h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements)); 7624283b4a9bSStephen M. Cameron h->fw_support = readl(&(h->cfgtable->misc_fw_support)); 7625c7ee65b3SWebb Scales if (hpsa_supports_chained_sg_blocks(h)) { 7626c7ee65b3SWebb Scales /* Limit in-command s/g elements to 32 save dma'able memory. */ 7627b93d7536SStephen M. Cameron h->max_cmd_sg_entries = 32; 76281a63ea6fSWebb Scales h->chainsize = h->maxsgentries - h->max_cmd_sg_entries; 7629b93d7536SStephen M. Cameron h->maxsgentries--; /* save one for chain pointer */ 7630b93d7536SStephen M. Cameron } else { 7631c7ee65b3SWebb Scales /* 7632c7ee65b3SWebb Scales * Original smart arrays supported at most 31 s/g entries 7633c7ee65b3SWebb Scales * embedded inline in the command (trying to use more 7634c7ee65b3SWebb Scales * would lock up the controller) 7635c7ee65b3SWebb Scales */ 7636c7ee65b3SWebb Scales h->max_cmd_sg_entries = 31; 76371a63ea6fSWebb Scales h->maxsgentries = 31; /* default to traditional values */ 7638c7ee65b3SWebb Scales h->chainsize = 0; 7639b93d7536SStephen M. Cameron } 764075167d2cSStephen M. Cameron 764175167d2cSStephen M. Cameron /* Find out what task management functions are supported and cache */ 764275167d2cSStephen M. Cameron h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags)); 76430e7a7fceSScott Teel if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags)) 76440e7a7fceSScott Teel dev_warn(&h->pdev->dev, "Physical aborts not supported\n"); 76450e7a7fceSScott Teel if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags)) 76460e7a7fceSScott Teel dev_warn(&h->pdev->dev, "Logical aborts not supported\n"); 76478be986ccSStephen Cameron if (!(HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags)) 76488be986ccSStephen Cameron dev_warn(&h->pdev->dev, "HP SSD Smart Path aborts not supported\n"); 7649b93d7536SStephen M. Cameron } 7650b93d7536SStephen M. Cameron 765176c46e49SStephen M. Cameron static inline bool hpsa_CISS_signature_present(struct ctlr_info *h) 765276c46e49SStephen M. Cameron { 76530fc9fd40SAkinobu Mita if (!check_signature(h->cfgtable->Signature, "CISS", 4)) { 7654050f7147SStephen Cameron dev_err(&h->pdev->dev, "not a valid CISS config table\n"); 765576c46e49SStephen M. Cameron return false; 765676c46e49SStephen M. Cameron } 765776c46e49SStephen M. Cameron return true; 765876c46e49SStephen M. Cameron } 765976c46e49SStephen M. Cameron 766097a5e98cSStephen M. Cameron static inline void hpsa_set_driver_support_bits(struct ctlr_info *h) 7661f7c39101SStephen M. Cameron { 766297a5e98cSStephen M. Cameron u32 driver_support; 7663f7c39101SStephen M. Cameron 766497a5e98cSStephen M. Cameron driver_support = readl(&(h->cfgtable->driver_support)); 76650b9e7b74SArnd Bergmann /* Need to enable prefetch in the SCSI core for 6400 in x86 */ 76660b9e7b74SArnd Bergmann #ifdef CONFIG_X86 766797a5e98cSStephen M. Cameron driver_support |= ENABLE_SCSI_PREFETCH; 7668f7c39101SStephen M. Cameron #endif 766928e13446SStephen M. Cameron driver_support |= ENABLE_UNIT_ATTN; 767028e13446SStephen M. Cameron writel(driver_support, &(h->cfgtable->driver_support)); 7671f7c39101SStephen M. Cameron } 7672f7c39101SStephen M. Cameron 76733d0eab67SStephen M. Cameron /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result 76743d0eab67SStephen M. Cameron * in a prefetch beyond physical memory. 76753d0eab67SStephen M. Cameron */ 76763d0eab67SStephen M. Cameron static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h) 76773d0eab67SStephen M. Cameron { 76783d0eab67SStephen M. Cameron u32 dma_prefetch; 76793d0eab67SStephen M. Cameron 76803d0eab67SStephen M. Cameron if (h->board_id != 0x3225103C) 76813d0eab67SStephen M. Cameron return; 76823d0eab67SStephen M. Cameron dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG); 76833d0eab67SStephen M. Cameron dma_prefetch |= 0x8000; 76843d0eab67SStephen M. Cameron writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG); 76853d0eab67SStephen M. Cameron } 76863d0eab67SStephen M. Cameron 7687c706a795SRobert Elliott static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h) 768876438d08SStephen M. Cameron { 768976438d08SStephen M. Cameron int i; 769076438d08SStephen M. Cameron u32 doorbell_value; 769176438d08SStephen M. Cameron unsigned long flags; 769276438d08SStephen M. Cameron /* wait until the clear_event_notify bit 6 is cleared by controller. */ 7693007e7aa9SRobert Elliott for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) { 769476438d08SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 769576438d08SStephen M. Cameron doorbell_value = readl(h->vaddr + SA5_DOORBELL); 769676438d08SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 769776438d08SStephen M. Cameron if (!(doorbell_value & DOORBELL_CLEAR_EVENTS)) 7698c706a795SRobert Elliott goto done; 769976438d08SStephen M. Cameron /* delay and try again */ 7700007e7aa9SRobert Elliott msleep(CLEAR_EVENT_WAIT_INTERVAL); 770176438d08SStephen M. Cameron } 7702c706a795SRobert Elliott return -ENODEV; 7703c706a795SRobert Elliott done: 7704c706a795SRobert Elliott return 0; 770576438d08SStephen M. Cameron } 770676438d08SStephen M. Cameron 7707c706a795SRobert Elliott static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h) 7708eb6b2ae9SStephen M. Cameron { 7709eb6b2ae9SStephen M. Cameron int i; 77106eaf46fdSStephen M. Cameron u32 doorbell_value; 77116eaf46fdSStephen M. Cameron unsigned long flags; 7712eb6b2ae9SStephen M. Cameron 7713eb6b2ae9SStephen M. Cameron /* under certain very rare conditions, this can take awhile. 7714eb6b2ae9SStephen M. Cameron * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right 7715eb6b2ae9SStephen M. Cameron * as we enter this code.) 7716eb6b2ae9SStephen M. Cameron */ 7717007e7aa9SRobert Elliott for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) { 771825163bd5SWebb Scales if (h->remove_in_progress) 771925163bd5SWebb Scales goto done; 77206eaf46fdSStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 77216eaf46fdSStephen M. Cameron doorbell_value = readl(h->vaddr + SA5_DOORBELL); 77226eaf46fdSStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 7723382be668SDan Carpenter if (!(doorbell_value & CFGTBL_ChangeReq)) 7724c706a795SRobert Elliott goto done; 7725eb6b2ae9SStephen M. Cameron /* delay and try again */ 7726007e7aa9SRobert Elliott msleep(MODE_CHANGE_WAIT_INTERVAL); 7727eb6b2ae9SStephen M. Cameron } 7728c706a795SRobert Elliott return -ENODEV; 7729c706a795SRobert Elliott done: 7730c706a795SRobert Elliott return 0; 77313f4336f3SStephen M. Cameron } 77323f4336f3SStephen M. Cameron 7733c706a795SRobert Elliott /* return -ENODEV or other reason on error, 0 on success */ 77346f039790SGreg Kroah-Hartman static int hpsa_enter_simple_mode(struct ctlr_info *h) 77353f4336f3SStephen M. Cameron { 77363f4336f3SStephen M. Cameron u32 trans_support; 77373f4336f3SStephen M. Cameron 77383f4336f3SStephen M. Cameron trans_support = readl(&(h->cfgtable->TransportSupport)); 77393f4336f3SStephen M. Cameron if (!(trans_support & SIMPLE_MODE)) 77403f4336f3SStephen M. Cameron return -ENOTSUPP; 77413f4336f3SStephen M. Cameron 77423f4336f3SStephen M. Cameron h->max_commands = readl(&(h->cfgtable->CmdsOutMax)); 7743283b4a9bSStephen M. Cameron 77443f4336f3SStephen M. Cameron /* Update the field, and then ring the doorbell */ 77453f4336f3SStephen M. Cameron writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest)); 7746b9af4937SStephen M. Cameron writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi); 77473f4336f3SStephen M. Cameron writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 7748c706a795SRobert Elliott if (hpsa_wait_for_mode_change_ack(h)) 7749c706a795SRobert Elliott goto error; 7750eb6b2ae9SStephen M. Cameron print_cfg_table(&h->pdev->dev, h->cfgtable); 7751283b4a9bSStephen M. Cameron if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) 7752283b4a9bSStephen M. Cameron goto error; 7753960a30e7SStephen M. Cameron h->transMethod = CFGTBL_Trans_Simple; 7754eb6b2ae9SStephen M. Cameron return 0; 7755283b4a9bSStephen M. Cameron error: 7756050f7147SStephen Cameron dev_err(&h->pdev->dev, "failed to enter simple mode\n"); 7757283b4a9bSStephen M. Cameron return -ENODEV; 7758eb6b2ae9SStephen M. Cameron } 7759eb6b2ae9SStephen M. Cameron 7760195f2c65SRobert Elliott /* free items allocated or mapped by hpsa_pci_init */ 7761195f2c65SRobert Elliott static void hpsa_free_pci_init(struct ctlr_info *h) 7762195f2c65SRobert Elliott { 7763195f2c65SRobert Elliott hpsa_free_cfgtables(h); /* pci_init 4 */ 7764195f2c65SRobert Elliott iounmap(h->vaddr); /* pci_init 3 */ 7765105a3dbcSRobert Elliott h->vaddr = NULL; 7766195f2c65SRobert Elliott hpsa_disable_interrupt_mode(h); /* pci_init 2 */ 7767943a7021SRobert Elliott /* 7768943a7021SRobert Elliott * call pci_disable_device before pci_release_regions per 7769943a7021SRobert Elliott * Documentation/PCI/pci.txt 7770943a7021SRobert Elliott */ 7771195f2c65SRobert Elliott pci_disable_device(h->pdev); /* pci_init 1 */ 7772943a7021SRobert Elliott pci_release_regions(h->pdev); /* pci_init 2 */ 7773195f2c65SRobert Elliott } 7774195f2c65SRobert Elliott 7775195f2c65SRobert Elliott /* several items must be freed later */ 77766f039790SGreg Kroah-Hartman static int hpsa_pci_init(struct ctlr_info *h) 777777c4495cSStephen M. Cameron { 7778eb6b2ae9SStephen M. Cameron int prod_index, err; 7779edd16368SStephen M. Cameron 7780e5c880d1SStephen M. Cameron prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id); 7781e5c880d1SStephen M. Cameron if (prod_index < 0) 778260f923b9SRobert Elliott return prod_index; 7783e5c880d1SStephen M. Cameron h->product_name = products[prod_index].product_name; 7784e5c880d1SStephen M. Cameron h->access = *(products[prod_index].access); 7785e5c880d1SStephen M. Cameron 77869b5c48c2SStephen Cameron h->needs_abort_tags_swizzled = 77879b5c48c2SStephen Cameron ctlr_needs_abort_tags_swizzled(h->board_id); 77889b5c48c2SStephen Cameron 7789e5a44df8SMatthew Garrett pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S | 7790e5a44df8SMatthew Garrett PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM); 7791e5a44df8SMatthew Garrett 779255c06c71SStephen M. Cameron err = pci_enable_device(h->pdev); 7793edd16368SStephen M. Cameron if (err) { 7794195f2c65SRobert Elliott dev_err(&h->pdev->dev, "failed to enable PCI device\n"); 7795943a7021SRobert Elliott pci_disable_device(h->pdev); 7796edd16368SStephen M. Cameron return err; 7797edd16368SStephen M. Cameron } 7798edd16368SStephen M. Cameron 7799f79cfec6SStephen M. Cameron err = pci_request_regions(h->pdev, HPSA); 7800edd16368SStephen M. Cameron if (err) { 780155c06c71SStephen M. Cameron dev_err(&h->pdev->dev, 7802195f2c65SRobert Elliott "failed to obtain PCI resources\n"); 7803943a7021SRobert Elliott pci_disable_device(h->pdev); 7804943a7021SRobert Elliott return err; 7805edd16368SStephen M. Cameron } 78064fa604e1SRobert Elliott 78074fa604e1SRobert Elliott pci_set_master(h->pdev); 78084fa604e1SRobert Elliott 78096b3f4c52SStephen M. Cameron hpsa_interrupt_mode(h); 781012d2cd47SStephen M. Cameron err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr); 78113a7774ceSStephen M. Cameron if (err) 7812195f2c65SRobert Elliott goto clean2; /* intmode+region, pci */ 7813edd16368SStephen M. Cameron h->vaddr = remap_pci_mem(h->paddr, 0x250); 7814204892e9SStephen M. Cameron if (!h->vaddr) { 7815195f2c65SRobert Elliott dev_err(&h->pdev->dev, "failed to remap PCI mem\n"); 7816204892e9SStephen M. Cameron err = -ENOMEM; 7817195f2c65SRobert Elliott goto clean2; /* intmode+region, pci */ 7818204892e9SStephen M. Cameron } 7819fe5389c8SStephen M. Cameron err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 78202c4c8c8bSStephen M. Cameron if (err) 7821195f2c65SRobert Elliott goto clean3; /* vaddr, intmode+region, pci */ 782277c4495cSStephen M. Cameron err = hpsa_find_cfgtables(h); 782377c4495cSStephen M. Cameron if (err) 7824195f2c65SRobert Elliott goto clean3; /* vaddr, intmode+region, pci */ 7825b93d7536SStephen M. Cameron hpsa_find_board_params(h); 7826edd16368SStephen M. Cameron 782776c46e49SStephen M. Cameron if (!hpsa_CISS_signature_present(h)) { 7828edd16368SStephen M. Cameron err = -ENODEV; 7829195f2c65SRobert Elliott goto clean4; /* cfgtables, vaddr, intmode+region, pci */ 7830edd16368SStephen M. Cameron } 783197a5e98cSStephen M. Cameron hpsa_set_driver_support_bits(h); 78323d0eab67SStephen M. Cameron hpsa_p600_dma_prefetch_quirk(h); 7833eb6b2ae9SStephen M. Cameron err = hpsa_enter_simple_mode(h); 7834eb6b2ae9SStephen M. Cameron if (err) 7835195f2c65SRobert Elliott goto clean4; /* cfgtables, vaddr, intmode+region, pci */ 7836edd16368SStephen M. Cameron return 0; 7837edd16368SStephen M. Cameron 7838195f2c65SRobert Elliott clean4: /* cfgtables, vaddr, intmode+region, pci */ 7839195f2c65SRobert Elliott hpsa_free_cfgtables(h); 7840195f2c65SRobert Elliott clean3: /* vaddr, intmode+region, pci */ 7841204892e9SStephen M. Cameron iounmap(h->vaddr); 7842105a3dbcSRobert Elliott h->vaddr = NULL; 7843195f2c65SRobert Elliott clean2: /* intmode+region, pci */ 7844195f2c65SRobert Elliott hpsa_disable_interrupt_mode(h); 7845943a7021SRobert Elliott /* 7846943a7021SRobert Elliott * call pci_disable_device before pci_release_regions per 7847943a7021SRobert Elliott * Documentation/PCI/pci.txt 7848943a7021SRobert Elliott */ 7849195f2c65SRobert Elliott pci_disable_device(h->pdev); 7850943a7021SRobert Elliott pci_release_regions(h->pdev); 7851edd16368SStephen M. Cameron return err; 7852edd16368SStephen M. Cameron } 7853edd16368SStephen M. Cameron 78546f039790SGreg Kroah-Hartman static void hpsa_hba_inquiry(struct ctlr_info *h) 7855339b2b14SStephen M. Cameron { 7856339b2b14SStephen M. Cameron int rc; 7857339b2b14SStephen M. Cameron 7858339b2b14SStephen M. Cameron #define HBA_INQUIRY_BYTE_COUNT 64 7859339b2b14SStephen M. Cameron h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL); 7860339b2b14SStephen M. Cameron if (!h->hba_inquiry_data) 7861339b2b14SStephen M. Cameron return; 7862339b2b14SStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0, 7863339b2b14SStephen M. Cameron h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT); 7864339b2b14SStephen M. Cameron if (rc != 0) { 7865339b2b14SStephen M. Cameron kfree(h->hba_inquiry_data); 7866339b2b14SStephen M. Cameron h->hba_inquiry_data = NULL; 7867339b2b14SStephen M. Cameron } 7868339b2b14SStephen M. Cameron } 7869339b2b14SStephen M. Cameron 78706b6c1cd7STomas Henzl static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id) 7871edd16368SStephen M. Cameron { 78721df8552aSStephen M. Cameron int rc, i; 78733b747298STomas Henzl void __iomem *vaddr; 7874edd16368SStephen M. Cameron 78754c2a8c40SStephen M. Cameron if (!reset_devices) 78764c2a8c40SStephen M. Cameron return 0; 78774c2a8c40SStephen M. Cameron 7878132aa220STomas Henzl /* kdump kernel is loading, we don't know in which state is 7879132aa220STomas Henzl * the pci interface. The dev->enable_cnt is equal zero 7880132aa220STomas Henzl * so we call enable+disable, wait a while and switch it on. 7881132aa220STomas Henzl */ 7882132aa220STomas Henzl rc = pci_enable_device(pdev); 7883132aa220STomas Henzl if (rc) { 7884132aa220STomas Henzl dev_warn(&pdev->dev, "Failed to enable PCI device\n"); 7885132aa220STomas Henzl return -ENODEV; 7886132aa220STomas Henzl } 7887132aa220STomas Henzl pci_disable_device(pdev); 7888132aa220STomas Henzl msleep(260); /* a randomly chosen number */ 7889132aa220STomas Henzl rc = pci_enable_device(pdev); 7890132aa220STomas Henzl if (rc) { 7891132aa220STomas Henzl dev_warn(&pdev->dev, "failed to enable device.\n"); 7892132aa220STomas Henzl return -ENODEV; 7893132aa220STomas Henzl } 78944fa604e1SRobert Elliott 7895859c75abSTomas Henzl pci_set_master(pdev); 78964fa604e1SRobert Elliott 78973b747298STomas Henzl vaddr = pci_ioremap_bar(pdev, 0); 78983b747298STomas Henzl if (vaddr == NULL) { 78993b747298STomas Henzl rc = -ENOMEM; 79003b747298STomas Henzl goto out_disable; 79013b747298STomas Henzl } 79023b747298STomas Henzl writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET); 79033b747298STomas Henzl iounmap(vaddr); 79043b747298STomas Henzl 79051df8552aSStephen M. Cameron /* Reset the controller with a PCI power-cycle or via doorbell */ 79066b6c1cd7STomas Henzl rc = hpsa_kdump_hard_reset_controller(pdev, board_id); 7907edd16368SStephen M. Cameron 79081df8552aSStephen M. Cameron /* -ENOTSUPP here means we cannot reset the controller 79091df8552aSStephen M. Cameron * but it's already (and still) up and running in 791018867659SStephen M. Cameron * "performant mode". Or, it might be 640x, which can't reset 791118867659SStephen M. Cameron * due to concerns about shared bbwc between 6402/6404 pair. 79121df8552aSStephen M. Cameron */ 7913adf1b3a3SRobert Elliott if (rc) 7914132aa220STomas Henzl goto out_disable; 7915edd16368SStephen M. Cameron 7916edd16368SStephen M. Cameron /* Now try to get the controller to respond to a no-op */ 79171ba66c9cSRobert Elliott dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n"); 7918edd16368SStephen M. Cameron for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) { 7919edd16368SStephen M. Cameron if (hpsa_noop(pdev) == 0) 7920edd16368SStephen M. Cameron break; 7921edd16368SStephen M. Cameron else 7922edd16368SStephen M. Cameron dev_warn(&pdev->dev, "no-op failed%s\n", 7923edd16368SStephen M. Cameron (i < 11 ? "; re-trying" : "")); 7924edd16368SStephen M. Cameron } 7925132aa220STomas Henzl 7926132aa220STomas Henzl out_disable: 7927132aa220STomas Henzl 7928132aa220STomas Henzl pci_disable_device(pdev); 7929132aa220STomas Henzl return rc; 7930edd16368SStephen M. Cameron } 7931edd16368SStephen M. Cameron 79321fb7c98aSRobert Elliott static void hpsa_free_cmd_pool(struct ctlr_info *h) 79331fb7c98aSRobert Elliott { 79341fb7c98aSRobert Elliott kfree(h->cmd_pool_bits); 7935105a3dbcSRobert Elliott h->cmd_pool_bits = NULL; 7936105a3dbcSRobert Elliott if (h->cmd_pool) { 79371fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 79381fb7c98aSRobert Elliott h->nr_cmds * sizeof(struct CommandList), 79391fb7c98aSRobert Elliott h->cmd_pool, 79401fb7c98aSRobert Elliott h->cmd_pool_dhandle); 7941105a3dbcSRobert Elliott h->cmd_pool = NULL; 7942105a3dbcSRobert Elliott h->cmd_pool_dhandle = 0; 7943105a3dbcSRobert Elliott } 7944105a3dbcSRobert Elliott if (h->errinfo_pool) { 79451fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 79461fb7c98aSRobert Elliott h->nr_cmds * sizeof(struct ErrorInfo), 79471fb7c98aSRobert Elliott h->errinfo_pool, 79481fb7c98aSRobert Elliott h->errinfo_pool_dhandle); 7949105a3dbcSRobert Elliott h->errinfo_pool = NULL; 7950105a3dbcSRobert Elliott h->errinfo_pool_dhandle = 0; 7951105a3dbcSRobert Elliott } 79521fb7c98aSRobert Elliott } 79531fb7c98aSRobert Elliott 7954d37ffbe4SRobert Elliott static int hpsa_alloc_cmd_pool(struct ctlr_info *h) 79552e9d1b36SStephen M. Cameron { 79562e9d1b36SStephen M. Cameron h->cmd_pool_bits = kzalloc( 79572e9d1b36SStephen M. Cameron DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) * 79582e9d1b36SStephen M. Cameron sizeof(unsigned long), GFP_KERNEL); 79592e9d1b36SStephen M. Cameron h->cmd_pool = pci_alloc_consistent(h->pdev, 79602e9d1b36SStephen M. Cameron h->nr_cmds * sizeof(*h->cmd_pool), 79612e9d1b36SStephen M. Cameron &(h->cmd_pool_dhandle)); 79622e9d1b36SStephen M. Cameron h->errinfo_pool = pci_alloc_consistent(h->pdev, 79632e9d1b36SStephen M. Cameron h->nr_cmds * sizeof(*h->errinfo_pool), 79642e9d1b36SStephen M. Cameron &(h->errinfo_pool_dhandle)); 79652e9d1b36SStephen M. Cameron if ((h->cmd_pool_bits == NULL) 79662e9d1b36SStephen M. Cameron || (h->cmd_pool == NULL) 79672e9d1b36SStephen M. Cameron || (h->errinfo_pool == NULL)) { 79682e9d1b36SStephen M. Cameron dev_err(&h->pdev->dev, "out of memory in %s", __func__); 79692c143342SRobert Elliott goto clean_up; 79702e9d1b36SStephen M. Cameron } 7971360c73bdSStephen Cameron hpsa_preinitialize_commands(h); 79722e9d1b36SStephen M. Cameron return 0; 79732c143342SRobert Elliott clean_up: 79742c143342SRobert Elliott hpsa_free_cmd_pool(h); 79752c143342SRobert Elliott return -ENOMEM; 79762e9d1b36SStephen M. Cameron } 79772e9d1b36SStephen M. Cameron 797841b3cf08SStephen M. Cameron static void hpsa_irq_affinity_hints(struct ctlr_info *h) 797941b3cf08SStephen M. Cameron { 7980ec429952SFabian Frederick int i, cpu; 798141b3cf08SStephen M. Cameron 798241b3cf08SStephen M. Cameron cpu = cpumask_first(cpu_online_mask); 798341b3cf08SStephen M. Cameron for (i = 0; i < h->msix_vector; i++) { 7984ec429952SFabian Frederick irq_set_affinity_hint(h->intr[i], get_cpu_mask(cpu)); 798541b3cf08SStephen M. Cameron cpu = cpumask_next(cpu, cpu_online_mask); 798641b3cf08SStephen M. Cameron } 798741b3cf08SStephen M. Cameron } 798841b3cf08SStephen M. Cameron 7989ec501a18SRobert Elliott /* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */ 7990ec501a18SRobert Elliott static void hpsa_free_irqs(struct ctlr_info *h) 7991ec501a18SRobert Elliott { 7992ec501a18SRobert Elliott int i; 7993ec501a18SRobert Elliott 7994ec501a18SRobert Elliott if (!h->msix_vector || h->intr_mode != PERF_MODE_INT) { 7995ec501a18SRobert Elliott /* Single reply queue, only one irq to free */ 7996ec501a18SRobert Elliott i = h->intr_mode; 7997ec501a18SRobert Elliott irq_set_affinity_hint(h->intr[i], NULL); 7998ec501a18SRobert Elliott free_irq(h->intr[i], &h->q[i]); 7999105a3dbcSRobert Elliott h->q[i] = 0; 8000ec501a18SRobert Elliott return; 8001ec501a18SRobert Elliott } 8002ec501a18SRobert Elliott 8003ec501a18SRobert Elliott for (i = 0; i < h->msix_vector; i++) { 8004ec501a18SRobert Elliott irq_set_affinity_hint(h->intr[i], NULL); 8005ec501a18SRobert Elliott free_irq(h->intr[i], &h->q[i]); 8006105a3dbcSRobert Elliott h->q[i] = 0; 8007ec501a18SRobert Elliott } 8008a4e17fc1SRobert Elliott for (; i < MAX_REPLY_QUEUES; i++) 8009a4e17fc1SRobert Elliott h->q[i] = 0; 8010ec501a18SRobert Elliott } 8011ec501a18SRobert Elliott 80129ee61794SRobert Elliott /* returns 0 on success; cleans up and returns -Enn on error */ 80139ee61794SRobert Elliott static int hpsa_request_irqs(struct ctlr_info *h, 80140ae01a32SStephen M. Cameron irqreturn_t (*msixhandler)(int, void *), 80150ae01a32SStephen M. Cameron irqreturn_t (*intxhandler)(int, void *)) 80160ae01a32SStephen M. Cameron { 8017254f796bSMatt Gates int rc, i; 80180ae01a32SStephen M. Cameron 8019254f796bSMatt Gates /* 8020254f796bSMatt Gates * initialize h->q[x] = x so that interrupt handlers know which 8021254f796bSMatt Gates * queue to process. 8022254f796bSMatt Gates */ 8023254f796bSMatt Gates for (i = 0; i < MAX_REPLY_QUEUES; i++) 8024254f796bSMatt Gates h->q[i] = (u8) i; 8025254f796bSMatt Gates 8026eee0f03aSHannes Reinecke if (h->intr_mode == PERF_MODE_INT && h->msix_vector > 0) { 8027254f796bSMatt Gates /* If performant mode and MSI-X, use multiple reply queues */ 8028a4e17fc1SRobert Elliott for (i = 0; i < h->msix_vector; i++) { 80298b47004aSRobert Elliott sprintf(h->intrname[i], "%s-msix%d", h->devname, i); 8030254f796bSMatt Gates rc = request_irq(h->intr[i], msixhandler, 80318b47004aSRobert Elliott 0, h->intrname[i], 8032254f796bSMatt Gates &h->q[i]); 8033a4e17fc1SRobert Elliott if (rc) { 8034a4e17fc1SRobert Elliott int j; 8035a4e17fc1SRobert Elliott 8036a4e17fc1SRobert Elliott dev_err(&h->pdev->dev, 8037a4e17fc1SRobert Elliott "failed to get irq %d for %s\n", 8038a4e17fc1SRobert Elliott h->intr[i], h->devname); 8039a4e17fc1SRobert Elliott for (j = 0; j < i; j++) { 8040a4e17fc1SRobert Elliott free_irq(h->intr[j], &h->q[j]); 8041a4e17fc1SRobert Elliott h->q[j] = 0; 8042a4e17fc1SRobert Elliott } 8043a4e17fc1SRobert Elliott for (; j < MAX_REPLY_QUEUES; j++) 8044a4e17fc1SRobert Elliott h->q[j] = 0; 8045a4e17fc1SRobert Elliott return rc; 8046a4e17fc1SRobert Elliott } 8047a4e17fc1SRobert Elliott } 804841b3cf08SStephen M. Cameron hpsa_irq_affinity_hints(h); 8049254f796bSMatt Gates } else { 8050254f796bSMatt Gates /* Use single reply pool */ 8051eee0f03aSHannes Reinecke if (h->msix_vector > 0 || h->msi_vector) { 80528b47004aSRobert Elliott if (h->msix_vector) 80538b47004aSRobert Elliott sprintf(h->intrname[h->intr_mode], 80548b47004aSRobert Elliott "%s-msix", h->devname); 80558b47004aSRobert Elliott else 80568b47004aSRobert Elliott sprintf(h->intrname[h->intr_mode], 80578b47004aSRobert Elliott "%s-msi", h->devname); 8058254f796bSMatt Gates rc = request_irq(h->intr[h->intr_mode], 80598b47004aSRobert Elliott msixhandler, 0, 80608b47004aSRobert Elliott h->intrname[h->intr_mode], 8061254f796bSMatt Gates &h->q[h->intr_mode]); 8062254f796bSMatt Gates } else { 80638b47004aSRobert Elliott sprintf(h->intrname[h->intr_mode], 80648b47004aSRobert Elliott "%s-intx", h->devname); 8065254f796bSMatt Gates rc = request_irq(h->intr[h->intr_mode], 80668b47004aSRobert Elliott intxhandler, IRQF_SHARED, 80678b47004aSRobert Elliott h->intrname[h->intr_mode], 8068254f796bSMatt Gates &h->q[h->intr_mode]); 8069254f796bSMatt Gates } 8070105a3dbcSRobert Elliott irq_set_affinity_hint(h->intr[h->intr_mode], NULL); 8071254f796bSMatt Gates } 80720ae01a32SStephen M. Cameron if (rc) { 8073195f2c65SRobert Elliott dev_err(&h->pdev->dev, "failed to get irq %d for %s\n", 80740ae01a32SStephen M. Cameron h->intr[h->intr_mode], h->devname); 8075195f2c65SRobert Elliott hpsa_free_irqs(h); 80760ae01a32SStephen M. Cameron return -ENODEV; 80770ae01a32SStephen M. Cameron } 80780ae01a32SStephen M. Cameron return 0; 80790ae01a32SStephen M. Cameron } 80800ae01a32SStephen M. Cameron 80816f039790SGreg Kroah-Hartman static int hpsa_kdump_soft_reset(struct ctlr_info *h) 808264670ac8SStephen M. Cameron { 808339c53f55SRobert Elliott int rc; 8084bf43caf3SRobert Elliott hpsa_send_host_reset(h, RAID_CTLR_LUNID, HPSA_RESET_TYPE_CONTROLLER); 808564670ac8SStephen M. Cameron 808664670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n"); 808739c53f55SRobert Elliott rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY); 808839c53f55SRobert Elliott if (rc) { 808964670ac8SStephen M. Cameron dev_warn(&h->pdev->dev, "Soft reset had no effect.\n"); 809039c53f55SRobert Elliott return rc; 809164670ac8SStephen M. Cameron } 809264670ac8SStephen M. Cameron 809364670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n"); 809439c53f55SRobert Elliott rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 809539c53f55SRobert Elliott if (rc) { 809664670ac8SStephen M. Cameron dev_warn(&h->pdev->dev, "Board failed to become ready " 809764670ac8SStephen M. Cameron "after soft reset.\n"); 809839c53f55SRobert Elliott return rc; 809964670ac8SStephen M. Cameron } 810064670ac8SStephen M. Cameron 810164670ac8SStephen M. Cameron return 0; 810264670ac8SStephen M. Cameron } 810364670ac8SStephen M. Cameron 8104072b0518SStephen M. Cameron static void hpsa_free_reply_queues(struct ctlr_info *h) 8105072b0518SStephen M. Cameron { 8106072b0518SStephen M. Cameron int i; 8107072b0518SStephen M. Cameron 8108072b0518SStephen M. Cameron for (i = 0; i < h->nreply_queues; i++) { 8109072b0518SStephen M. Cameron if (!h->reply_queue[i].head) 8110072b0518SStephen M. Cameron continue; 81111fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 81121fb7c98aSRobert Elliott h->reply_queue_size, 81131fb7c98aSRobert Elliott h->reply_queue[i].head, 81141fb7c98aSRobert Elliott h->reply_queue[i].busaddr); 8115072b0518SStephen M. Cameron h->reply_queue[i].head = NULL; 8116072b0518SStephen M. Cameron h->reply_queue[i].busaddr = 0; 8117072b0518SStephen M. Cameron } 8118105a3dbcSRobert Elliott h->reply_queue_size = 0; 8119072b0518SStephen M. Cameron } 8120072b0518SStephen M. Cameron 81210097f0f4SStephen M. Cameron static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h) 81220097f0f4SStephen M. Cameron { 8123105a3dbcSRobert Elliott hpsa_free_performant_mode(h); /* init_one 7 */ 8124105a3dbcSRobert Elliott hpsa_free_sg_chain_blocks(h); /* init_one 6 */ 8125105a3dbcSRobert Elliott hpsa_free_cmd_pool(h); /* init_one 5 */ 8126105a3dbcSRobert Elliott hpsa_free_irqs(h); /* init_one 4 */ 81272946e82bSRobert Elliott scsi_host_put(h->scsi_host); /* init_one 3 */ 81282946e82bSRobert Elliott h->scsi_host = NULL; /* init_one 3 */ 81292946e82bSRobert Elliott hpsa_free_pci_init(h); /* init_one 2_5 */ 81309ecd953aSRobert Elliott free_percpu(h->lockup_detected); /* init_one 2 */ 81319ecd953aSRobert Elliott h->lockup_detected = NULL; /* init_one 2 */ 81329ecd953aSRobert Elliott if (h->resubmit_wq) { 81339ecd953aSRobert Elliott destroy_workqueue(h->resubmit_wq); /* init_one 1 */ 81349ecd953aSRobert Elliott h->resubmit_wq = NULL; 81359ecd953aSRobert Elliott } 81369ecd953aSRobert Elliott if (h->rescan_ctlr_wq) { 81379ecd953aSRobert Elliott destroy_workqueue(h->rescan_ctlr_wq); 81389ecd953aSRobert Elliott h->rescan_ctlr_wq = NULL; 81399ecd953aSRobert Elliott } 8140105a3dbcSRobert Elliott kfree(h); /* init_one 1 */ 814164670ac8SStephen M. Cameron } 814264670ac8SStephen M. Cameron 8143a0c12413SStephen M. Cameron /* Called when controller lockup detected. */ 8144f2405db8SDon Brace static void fail_all_outstanding_cmds(struct ctlr_info *h) 8145a0c12413SStephen M. Cameron { 8146281a7fd0SWebb Scales int i, refcount; 8147281a7fd0SWebb Scales struct CommandList *c; 814825163bd5SWebb Scales int failcount = 0; 8149a0c12413SStephen M. Cameron 8150080ef1ccSDon Brace flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */ 8151f2405db8SDon Brace for (i = 0; i < h->nr_cmds; i++) { 8152f2405db8SDon Brace c = h->cmd_pool + i; 8153281a7fd0SWebb Scales refcount = atomic_inc_return(&c->refcount); 8154281a7fd0SWebb Scales if (refcount > 1) { 815525163bd5SWebb Scales c->err_info->CommandStatus = CMD_CTLR_LOCKUP; 81565a3d16f5SStephen M. Cameron finish_cmd(c); 8157433b5f4dSStephen Cameron atomic_dec(&h->commands_outstanding); 815825163bd5SWebb Scales failcount++; 8159a0c12413SStephen M. Cameron } 8160281a7fd0SWebb Scales cmd_free(h, c); 8161281a7fd0SWebb Scales } 816225163bd5SWebb Scales dev_warn(&h->pdev->dev, 816325163bd5SWebb Scales "failed %d commands in fail_all\n", failcount); 8164a0c12413SStephen M. Cameron } 8165a0c12413SStephen M. Cameron 8166094963daSStephen M. Cameron static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value) 8167094963daSStephen M. Cameron { 8168c8ed0010SRusty Russell int cpu; 8169094963daSStephen M. Cameron 8170c8ed0010SRusty Russell for_each_online_cpu(cpu) { 8171094963daSStephen M. Cameron u32 *lockup_detected; 8172094963daSStephen M. Cameron lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 8173094963daSStephen M. Cameron *lockup_detected = value; 8174094963daSStephen M. Cameron } 8175094963daSStephen M. Cameron wmb(); /* be sure the per-cpu variables are out to memory */ 8176094963daSStephen M. Cameron } 8177094963daSStephen M. Cameron 8178a0c12413SStephen M. Cameron static void controller_lockup_detected(struct ctlr_info *h) 8179a0c12413SStephen M. Cameron { 8180a0c12413SStephen M. Cameron unsigned long flags; 8181094963daSStephen M. Cameron u32 lockup_detected; 8182a0c12413SStephen M. Cameron 8183a0c12413SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 8184a0c12413SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 8185094963daSStephen M. Cameron lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET); 8186094963daSStephen M. Cameron if (!lockup_detected) { 8187094963daSStephen M. Cameron /* no heartbeat, but controller gave us a zero. */ 8188094963daSStephen M. Cameron dev_warn(&h->pdev->dev, 818925163bd5SWebb Scales "lockup detected after %d but scratchpad register is zero\n", 819025163bd5SWebb Scales h->heartbeat_sample_interval / HZ); 8191094963daSStephen M. Cameron lockup_detected = 0xffffffff; 8192094963daSStephen M. Cameron } 8193094963daSStephen M. Cameron set_lockup_detected_for_all_cpus(h, lockup_detected); 8194a0c12413SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 819525163bd5SWebb Scales dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n", 819625163bd5SWebb Scales lockup_detected, h->heartbeat_sample_interval / HZ); 8197a0c12413SStephen M. Cameron pci_disable_device(h->pdev); 8198f2405db8SDon Brace fail_all_outstanding_cmds(h); 8199a0c12413SStephen M. Cameron } 8200a0c12413SStephen M. Cameron 820125163bd5SWebb Scales static int detect_controller_lockup(struct ctlr_info *h) 8202a0c12413SStephen M. Cameron { 8203a0c12413SStephen M. Cameron u64 now; 8204a0c12413SStephen M. Cameron u32 heartbeat; 8205a0c12413SStephen M. Cameron unsigned long flags; 8206a0c12413SStephen M. Cameron 8207a0c12413SStephen M. Cameron now = get_jiffies_64(); 8208a0c12413SStephen M. Cameron /* If we've received an interrupt recently, we're ok. */ 8209a0c12413SStephen M. Cameron if (time_after64(h->last_intr_timestamp + 8210e85c5974SStephen M. Cameron (h->heartbeat_sample_interval), now)) 821125163bd5SWebb Scales return false; 8212a0c12413SStephen M. Cameron 8213a0c12413SStephen M. Cameron /* 8214a0c12413SStephen M. Cameron * If we've already checked the heartbeat recently, we're ok. 8215a0c12413SStephen M. Cameron * This could happen if someone sends us a signal. We 8216a0c12413SStephen M. Cameron * otherwise don't care about signals in this thread. 8217a0c12413SStephen M. Cameron */ 8218a0c12413SStephen M. Cameron if (time_after64(h->last_heartbeat_timestamp + 8219e85c5974SStephen M. Cameron (h->heartbeat_sample_interval), now)) 822025163bd5SWebb Scales return false; 8221a0c12413SStephen M. Cameron 8222a0c12413SStephen M. Cameron /* If heartbeat has not changed since we last looked, we're not ok. */ 8223a0c12413SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 8224a0c12413SStephen M. Cameron heartbeat = readl(&h->cfgtable->HeartBeat); 8225a0c12413SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 8226a0c12413SStephen M. Cameron if (h->last_heartbeat == heartbeat) { 8227a0c12413SStephen M. Cameron controller_lockup_detected(h); 822825163bd5SWebb Scales return true; 8229a0c12413SStephen M. Cameron } 8230a0c12413SStephen M. Cameron 8231a0c12413SStephen M. Cameron /* We're ok. */ 8232a0c12413SStephen M. Cameron h->last_heartbeat = heartbeat; 8233a0c12413SStephen M. Cameron h->last_heartbeat_timestamp = now; 823425163bd5SWebb Scales return false; 8235a0c12413SStephen M. Cameron } 8236a0c12413SStephen M. Cameron 82379846590eSStephen M. Cameron static void hpsa_ack_ctlr_events(struct ctlr_info *h) 823876438d08SStephen M. Cameron { 823976438d08SStephen M. Cameron int i; 824076438d08SStephen M. Cameron char *event_type; 824176438d08SStephen M. Cameron 8242e4aa3e6aSStephen Cameron if (!(h->fw_support & MISC_FW_EVENT_NOTIFY)) 8243e4aa3e6aSStephen Cameron return; 8244e4aa3e6aSStephen Cameron 824576438d08SStephen M. Cameron /* Ask the controller to clear the events we're handling. */ 82461f7cee8cSStephen M. Cameron if ((h->transMethod & (CFGTBL_Trans_io_accel1 82471f7cee8cSStephen M. Cameron | CFGTBL_Trans_io_accel2)) && 824876438d08SStephen M. Cameron (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE || 824976438d08SStephen M. Cameron h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) { 825076438d08SStephen M. Cameron 825176438d08SStephen M. Cameron if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE) 825276438d08SStephen M. Cameron event_type = "state change"; 825376438d08SStephen M. Cameron if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE) 825476438d08SStephen M. Cameron event_type = "configuration change"; 825576438d08SStephen M. Cameron /* Stop sending new RAID offload reqs via the IO accelerator */ 825676438d08SStephen M. Cameron scsi_block_requests(h->scsi_host); 825776438d08SStephen M. Cameron for (i = 0; i < h->ndevices; i++) 825876438d08SStephen M. Cameron h->dev[i]->offload_enabled = 0; 825923100dd9SStephen M. Cameron hpsa_drain_accel_commands(h); 826076438d08SStephen M. Cameron /* Set 'accelerator path config change' bit */ 826176438d08SStephen M. Cameron dev_warn(&h->pdev->dev, 826276438d08SStephen M. Cameron "Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n", 826376438d08SStephen M. Cameron h->events, event_type); 826476438d08SStephen M. Cameron writel(h->events, &(h->cfgtable->clear_event_notify)); 826576438d08SStephen M. Cameron /* Set the "clear event notify field update" bit 6 */ 826676438d08SStephen M. Cameron writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL); 826776438d08SStephen M. Cameron /* Wait until ctlr clears 'clear event notify field', bit 6 */ 826876438d08SStephen M. Cameron hpsa_wait_for_clear_event_notify_ack(h); 826976438d08SStephen M. Cameron scsi_unblock_requests(h->scsi_host); 827076438d08SStephen M. Cameron } else { 827176438d08SStephen M. Cameron /* Acknowledge controller notification events. */ 827276438d08SStephen M. Cameron writel(h->events, &(h->cfgtable->clear_event_notify)); 827376438d08SStephen M. Cameron writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL); 827476438d08SStephen M. Cameron hpsa_wait_for_clear_event_notify_ack(h); 827576438d08SStephen M. Cameron #if 0 827676438d08SStephen M. Cameron writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 827776438d08SStephen M. Cameron hpsa_wait_for_mode_change_ack(h); 827876438d08SStephen M. Cameron #endif 827976438d08SStephen M. Cameron } 82809846590eSStephen M. Cameron return; 828176438d08SStephen M. Cameron } 828276438d08SStephen M. Cameron 828376438d08SStephen M. Cameron /* Check a register on the controller to see if there are configuration 828476438d08SStephen M. Cameron * changes (added/changed/removed logical drives, etc.) which mean that 8285e863d68eSScott Teel * we should rescan the controller for devices. 8286e863d68eSScott Teel * Also check flag for driver-initiated rescan. 828776438d08SStephen M. Cameron */ 82889846590eSStephen M. Cameron static int hpsa_ctlr_needs_rescan(struct ctlr_info *h) 828976438d08SStephen M. Cameron { 8290853633e8SDon Brace if (h->drv_req_rescan) { 8291853633e8SDon Brace h->drv_req_rescan = 0; 8292853633e8SDon Brace return 1; 8293853633e8SDon Brace } 8294853633e8SDon Brace 829576438d08SStephen M. Cameron if (!(h->fw_support & MISC_FW_EVENT_NOTIFY)) 82969846590eSStephen M. Cameron return 0; 829776438d08SStephen M. Cameron 829876438d08SStephen M. Cameron h->events = readl(&(h->cfgtable->event_notify)); 82999846590eSStephen M. Cameron return h->events & RESCAN_REQUIRED_EVENT_BITS; 83009846590eSStephen M. Cameron } 830176438d08SStephen M. Cameron 830276438d08SStephen M. Cameron /* 83039846590eSStephen M. Cameron * Check if any of the offline devices have become ready 830476438d08SStephen M. Cameron */ 83059846590eSStephen M. Cameron static int hpsa_offline_devices_ready(struct ctlr_info *h) 83069846590eSStephen M. Cameron { 83079846590eSStephen M. Cameron unsigned long flags; 83089846590eSStephen M. Cameron struct offline_device_entry *d; 83099846590eSStephen M. Cameron struct list_head *this, *tmp; 83109846590eSStephen M. Cameron 83119846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 83129846590eSStephen M. Cameron list_for_each_safe(this, tmp, &h->offline_device_list) { 83139846590eSStephen M. Cameron d = list_entry(this, struct offline_device_entry, 83149846590eSStephen M. Cameron offline_list); 83159846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 8316d1fea47cSStephen M. Cameron if (!hpsa_volume_offline(h, d->scsi3addr)) { 8317d1fea47cSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 8318d1fea47cSStephen M. Cameron list_del(&d->offline_list); 8319d1fea47cSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 83209846590eSStephen M. Cameron return 1; 8321d1fea47cSStephen M. Cameron } 83229846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 832376438d08SStephen M. Cameron } 83249846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 83259846590eSStephen M. Cameron return 0; 83269846590eSStephen M. Cameron } 83279846590eSStephen M. Cameron 832834592254SScott Teel static int hpsa_luns_changed(struct ctlr_info *h) 832934592254SScott Teel { 833034592254SScott Teel int rc = 1; /* assume there are changes */ 833134592254SScott Teel struct ReportLUNdata *logdev = NULL; 833234592254SScott Teel 833334592254SScott Teel /* if we can't find out if lun data has changed, 833434592254SScott Teel * assume that it has. 833534592254SScott Teel */ 833634592254SScott Teel 833734592254SScott Teel if (!h->lastlogicals) 833834592254SScott Teel goto out; 833934592254SScott Teel 834034592254SScott Teel logdev = kzalloc(sizeof(*logdev), GFP_KERNEL); 834134592254SScott Teel if (!logdev) { 834234592254SScott Teel dev_warn(&h->pdev->dev, 834334592254SScott Teel "Out of memory, can't track lun changes.\n"); 834434592254SScott Teel goto out; 834534592254SScott Teel } 834634592254SScott Teel if (hpsa_scsi_do_report_luns(h, 1, logdev, sizeof(*logdev), 0)) { 834734592254SScott Teel dev_warn(&h->pdev->dev, 834834592254SScott Teel "report luns failed, can't track lun changes.\n"); 834934592254SScott Teel goto out; 835034592254SScott Teel } 835134592254SScott Teel if (memcmp(logdev, h->lastlogicals, sizeof(*logdev))) { 835234592254SScott Teel dev_info(&h->pdev->dev, 835334592254SScott Teel "Lun changes detected.\n"); 835434592254SScott Teel memcpy(h->lastlogicals, logdev, sizeof(*logdev)); 835534592254SScott Teel goto out; 835634592254SScott Teel } else 835734592254SScott Teel rc = 0; /* no changes detected. */ 835834592254SScott Teel out: 835934592254SScott Teel kfree(logdev); 836034592254SScott Teel return rc; 836134592254SScott Teel } 836234592254SScott Teel 83636636e7f4SDon Brace static void hpsa_rescan_ctlr_worker(struct work_struct *work) 8364a0c12413SStephen M. Cameron { 8365a0c12413SStephen M. Cameron unsigned long flags; 83668a98db73SStephen M. Cameron struct ctlr_info *h = container_of(to_delayed_work(work), 83676636e7f4SDon Brace struct ctlr_info, rescan_ctlr_work); 83686636e7f4SDon Brace 83696636e7f4SDon Brace 83706636e7f4SDon Brace if (h->remove_in_progress) 83718a98db73SStephen M. Cameron return; 83729846590eSStephen M. Cameron 83739846590eSStephen M. Cameron if (hpsa_ctlr_needs_rescan(h) || hpsa_offline_devices_ready(h)) { 83749846590eSStephen M. Cameron scsi_host_get(h->scsi_host); 83759846590eSStephen M. Cameron hpsa_ack_ctlr_events(h); 83769846590eSStephen M. Cameron hpsa_scan_start(h->scsi_host); 83779846590eSStephen M. Cameron scsi_host_put(h->scsi_host); 837834592254SScott Teel } else if (h->discovery_polling) { 8379c2adae44SScott Teel hpsa_disable_rld_caching(h); 838034592254SScott Teel if (hpsa_luns_changed(h)) { 838134592254SScott Teel struct Scsi_Host *sh = NULL; 838234592254SScott Teel 838334592254SScott Teel dev_info(&h->pdev->dev, 838434592254SScott Teel "driver discovery polling rescan.\n"); 838534592254SScott Teel sh = scsi_host_get(h->scsi_host); 838634592254SScott Teel if (sh != NULL) { 838734592254SScott Teel hpsa_scan_start(sh); 838834592254SScott Teel scsi_host_put(sh); 838934592254SScott Teel } 839034592254SScott Teel } 83919846590eSStephen M. Cameron } 83926636e7f4SDon Brace spin_lock_irqsave(&h->lock, flags); 83936636e7f4SDon Brace if (!h->remove_in_progress) 83946636e7f4SDon Brace queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work, 83956636e7f4SDon Brace h->heartbeat_sample_interval); 83966636e7f4SDon Brace spin_unlock_irqrestore(&h->lock, flags); 83976636e7f4SDon Brace } 83986636e7f4SDon Brace 83996636e7f4SDon Brace static void hpsa_monitor_ctlr_worker(struct work_struct *work) 84006636e7f4SDon Brace { 84016636e7f4SDon Brace unsigned long flags; 84026636e7f4SDon Brace struct ctlr_info *h = container_of(to_delayed_work(work), 84036636e7f4SDon Brace struct ctlr_info, monitor_ctlr_work); 84046636e7f4SDon Brace 84056636e7f4SDon Brace detect_controller_lockup(h); 84066636e7f4SDon Brace if (lockup_detected(h)) 84076636e7f4SDon Brace return; 84089846590eSStephen M. Cameron 84098a98db73SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 84106636e7f4SDon Brace if (!h->remove_in_progress) 84118a98db73SStephen M. Cameron schedule_delayed_work(&h->monitor_ctlr_work, 84128a98db73SStephen M. Cameron h->heartbeat_sample_interval); 84138a98db73SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 8414a0c12413SStephen M. Cameron } 8415a0c12413SStephen M. Cameron 84166636e7f4SDon Brace static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h, 84176636e7f4SDon Brace char *name) 84186636e7f4SDon Brace { 84196636e7f4SDon Brace struct workqueue_struct *wq = NULL; 84206636e7f4SDon Brace 8421397ea9cbSDon Brace wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr); 84226636e7f4SDon Brace if (!wq) 84236636e7f4SDon Brace dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name); 84246636e7f4SDon Brace 84256636e7f4SDon Brace return wq; 84266636e7f4SDon Brace } 84276636e7f4SDon Brace 84286f039790SGreg Kroah-Hartman static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 84294c2a8c40SStephen M. Cameron { 84304c2a8c40SStephen M. Cameron int dac, rc; 84314c2a8c40SStephen M. Cameron struct ctlr_info *h; 843264670ac8SStephen M. Cameron int try_soft_reset = 0; 843364670ac8SStephen M. Cameron unsigned long flags; 84346b6c1cd7STomas Henzl u32 board_id; 84354c2a8c40SStephen M. Cameron 84364c2a8c40SStephen M. Cameron if (number_of_controllers == 0) 84374c2a8c40SStephen M. Cameron printk(KERN_INFO DRIVER_NAME "\n"); 84384c2a8c40SStephen M. Cameron 84396b6c1cd7STomas Henzl rc = hpsa_lookup_board_id(pdev, &board_id); 84406b6c1cd7STomas Henzl if (rc < 0) { 84416b6c1cd7STomas Henzl dev_warn(&pdev->dev, "Board ID not found\n"); 84426b6c1cd7STomas Henzl return rc; 84436b6c1cd7STomas Henzl } 84446b6c1cd7STomas Henzl 84456b6c1cd7STomas Henzl rc = hpsa_init_reset_devices(pdev, board_id); 844664670ac8SStephen M. Cameron if (rc) { 844764670ac8SStephen M. Cameron if (rc != -ENOTSUPP) 84484c2a8c40SStephen M. Cameron return rc; 844964670ac8SStephen M. Cameron /* If the reset fails in a particular way (it has no way to do 845064670ac8SStephen M. Cameron * a proper hard reset, so returns -ENOTSUPP) we can try to do 845164670ac8SStephen M. Cameron * a soft reset once we get the controller configured up to the 845264670ac8SStephen M. Cameron * point that it can accept a command. 845364670ac8SStephen M. Cameron */ 845464670ac8SStephen M. Cameron try_soft_reset = 1; 845564670ac8SStephen M. Cameron rc = 0; 845664670ac8SStephen M. Cameron } 845764670ac8SStephen M. Cameron 845864670ac8SStephen M. Cameron reinit_after_soft_reset: 84594c2a8c40SStephen M. Cameron 8460303932fdSDon Brace /* Command structures must be aligned on a 32-byte boundary because 8461303932fdSDon Brace * the 5 lower bits of the address are used by the hardware. and by 8462303932fdSDon Brace * the driver. See comments in hpsa.h for more info. 8463303932fdSDon Brace */ 8464303932fdSDon Brace BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT); 8465edd16368SStephen M. Cameron h = kzalloc(sizeof(*h), GFP_KERNEL); 8466105a3dbcSRobert Elliott if (!h) { 8467105a3dbcSRobert Elliott dev_err(&pdev->dev, "Failed to allocate controller head\n"); 8468ecd9aad4SStephen M. Cameron return -ENOMEM; 8469105a3dbcSRobert Elliott } 8470edd16368SStephen M. Cameron 847155c06c71SStephen M. Cameron h->pdev = pdev; 8472105a3dbcSRobert Elliott 8473a9a3a273SStephen M. Cameron h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT; 84749846590eSStephen M. Cameron INIT_LIST_HEAD(&h->offline_device_list); 84756eaf46fdSStephen M. Cameron spin_lock_init(&h->lock); 84769846590eSStephen M. Cameron spin_lock_init(&h->offline_device_lock); 84776eaf46fdSStephen M. Cameron spin_lock_init(&h->scan_lock); 847834f0c627SDon Brace atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS); 84799b5c48c2SStephen Cameron atomic_set(&h->abort_cmds_available, HPSA_CMDS_RESERVED_FOR_ABORTS); 8480094963daSStephen M. Cameron 8481094963daSStephen M. Cameron /* Allocate and clear per-cpu variable lockup_detected */ 8482094963daSStephen M. Cameron h->lockup_detected = alloc_percpu(u32); 84832a5ac326SStephen M. Cameron if (!h->lockup_detected) { 8484105a3dbcSRobert Elliott dev_err(&h->pdev->dev, "Failed to allocate lockup detector\n"); 84852a5ac326SStephen M. Cameron rc = -ENOMEM; 84862efa5929SRobert Elliott goto clean1; /* aer/h */ 84872a5ac326SStephen M. Cameron } 8488094963daSStephen M. Cameron set_lockup_detected_for_all_cpus(h, 0); 8489094963daSStephen M. Cameron 849055c06c71SStephen M. Cameron rc = hpsa_pci_init(h); 8491105a3dbcSRobert Elliott if (rc) 84922946e82bSRobert Elliott goto clean2; /* lu, aer/h */ 8493edd16368SStephen M. Cameron 84942946e82bSRobert Elliott /* relies on h-> settings made by hpsa_pci_init, including 84952946e82bSRobert Elliott * interrupt_mode h->intr */ 84962946e82bSRobert Elliott rc = hpsa_scsi_host_alloc(h); 84972946e82bSRobert Elliott if (rc) 84982946e82bSRobert Elliott goto clean2_5; /* pci, lu, aer/h */ 84992946e82bSRobert Elliott 85002946e82bSRobert Elliott sprintf(h->devname, HPSA "%d", h->scsi_host->host_no); 8501edd16368SStephen M. Cameron h->ctlr = number_of_controllers; 8502edd16368SStephen M. Cameron number_of_controllers++; 8503edd16368SStephen M. Cameron 8504edd16368SStephen M. Cameron /* configure PCI DMA stuff */ 8505ecd9aad4SStephen M. Cameron rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 8506ecd9aad4SStephen M. Cameron if (rc == 0) { 8507edd16368SStephen M. Cameron dac = 1; 8508ecd9aad4SStephen M. Cameron } else { 8509ecd9aad4SStephen M. Cameron rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 8510ecd9aad4SStephen M. Cameron if (rc == 0) { 8511edd16368SStephen M. Cameron dac = 0; 8512ecd9aad4SStephen M. Cameron } else { 8513edd16368SStephen M. Cameron dev_err(&pdev->dev, "no suitable DMA available\n"); 85142946e82bSRobert Elliott goto clean3; /* shost, pci, lu, aer/h */ 8515edd16368SStephen M. Cameron } 8516ecd9aad4SStephen M. Cameron } 8517edd16368SStephen M. Cameron 8518edd16368SStephen M. Cameron /* make sure the board interrupts are off */ 8519edd16368SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 852010f66018SStephen M. Cameron 8521105a3dbcSRobert Elliott rc = hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx); 8522105a3dbcSRobert Elliott if (rc) 85232946e82bSRobert Elliott goto clean3; /* shost, pci, lu, aer/h */ 8524d37ffbe4SRobert Elliott rc = hpsa_alloc_cmd_pool(h); 85258947fd10SRobert Elliott if (rc) 85262946e82bSRobert Elliott goto clean4; /* irq, shost, pci, lu, aer/h */ 8527105a3dbcSRobert Elliott rc = hpsa_alloc_sg_chain_blocks(h); 8528105a3dbcSRobert Elliott if (rc) 85292946e82bSRobert Elliott goto clean5; /* cmd, irq, shost, pci, lu, aer/h */ 8530a08a8471SStephen M. Cameron init_waitqueue_head(&h->scan_wait_queue); 85319b5c48c2SStephen Cameron init_waitqueue_head(&h->abort_cmd_wait_queue); 8532d604f533SWebb Scales init_waitqueue_head(&h->event_sync_wait_queue); 8533d604f533SWebb Scales mutex_init(&h->reset_mutex); 8534a08a8471SStephen M. Cameron h->scan_finished = 1; /* no scan currently in progress */ 8535edd16368SStephen M. Cameron 8536edd16368SStephen M. Cameron pci_set_drvdata(pdev, h); 85379a41338eSStephen M. Cameron h->ndevices = 0; 85382946e82bSRobert Elliott 85399a41338eSStephen M. Cameron spin_lock_init(&h->devlock); 8540105a3dbcSRobert Elliott rc = hpsa_put_ctlr_into_performant_mode(h); 8541105a3dbcSRobert Elliott if (rc) 85422946e82bSRobert Elliott goto clean6; /* sg, cmd, irq, shost, pci, lu, aer/h */ 85432946e82bSRobert Elliott 85442efa5929SRobert Elliott /* create the resubmit workqueue */ 85452efa5929SRobert Elliott h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan"); 85462efa5929SRobert Elliott if (!h->rescan_ctlr_wq) { 85472efa5929SRobert Elliott rc = -ENOMEM; 85482efa5929SRobert Elliott goto clean7; 85492efa5929SRobert Elliott } 85502efa5929SRobert Elliott 85512efa5929SRobert Elliott h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit"); 85522efa5929SRobert Elliott if (!h->resubmit_wq) { 85532efa5929SRobert Elliott rc = -ENOMEM; 85542efa5929SRobert Elliott goto clean7; /* aer/h */ 85552efa5929SRobert Elliott } 855664670ac8SStephen M. Cameron 8557105a3dbcSRobert Elliott /* 8558105a3dbcSRobert Elliott * At this point, the controller is ready to take commands. 855964670ac8SStephen M. Cameron * Now, if reset_devices and the hard reset didn't work, try 856064670ac8SStephen M. Cameron * the soft reset and see if that works. 856164670ac8SStephen M. Cameron */ 856264670ac8SStephen M. Cameron if (try_soft_reset) { 856364670ac8SStephen M. Cameron 856464670ac8SStephen M. Cameron /* This is kind of gross. We may or may not get a completion 856564670ac8SStephen M. Cameron * from the soft reset command, and if we do, then the value 856664670ac8SStephen M. Cameron * from the fifo may or may not be valid. So, we wait 10 secs 856764670ac8SStephen M. Cameron * after the reset throwing away any completions we get during 856864670ac8SStephen M. Cameron * that time. Unregister the interrupt handler and register 856964670ac8SStephen M. Cameron * fake ones to scoop up any residual completions. 857064670ac8SStephen M. Cameron */ 857164670ac8SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 857264670ac8SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 857364670ac8SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 8574ec501a18SRobert Elliott hpsa_free_irqs(h); 85759ee61794SRobert Elliott rc = hpsa_request_irqs(h, hpsa_msix_discard_completions, 857664670ac8SStephen M. Cameron hpsa_intx_discard_completions); 857764670ac8SStephen M. Cameron if (rc) { 85789ee61794SRobert Elliott dev_warn(&h->pdev->dev, 85799ee61794SRobert Elliott "Failed to request_irq after soft reset.\n"); 8580d498757cSRobert Elliott /* 8581b2ef480cSRobert Elliott * cannot goto clean7 or free_irqs will be called 8582b2ef480cSRobert Elliott * again. Instead, do its work 8583b2ef480cSRobert Elliott */ 8584b2ef480cSRobert Elliott hpsa_free_performant_mode(h); /* clean7 */ 8585b2ef480cSRobert Elliott hpsa_free_sg_chain_blocks(h); /* clean6 */ 8586b2ef480cSRobert Elliott hpsa_free_cmd_pool(h); /* clean5 */ 8587b2ef480cSRobert Elliott /* 8588b2ef480cSRobert Elliott * skip hpsa_free_irqs(h) clean4 since that 8589b2ef480cSRobert Elliott * was just called before request_irqs failed 8590d498757cSRobert Elliott */ 8591d498757cSRobert Elliott goto clean3; 859264670ac8SStephen M. Cameron } 859364670ac8SStephen M. Cameron 859464670ac8SStephen M. Cameron rc = hpsa_kdump_soft_reset(h); 859564670ac8SStephen M. Cameron if (rc) 859664670ac8SStephen M. Cameron /* Neither hard nor soft reset worked, we're hosed. */ 85977ef7323fSDon Brace goto clean7; 859864670ac8SStephen M. Cameron 859964670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Board READY.\n"); 860064670ac8SStephen M. Cameron dev_info(&h->pdev->dev, 860164670ac8SStephen M. Cameron "Waiting for stale completions to drain.\n"); 860264670ac8SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_ON); 860364670ac8SStephen M. Cameron msleep(10000); 860464670ac8SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 860564670ac8SStephen M. Cameron 860664670ac8SStephen M. Cameron rc = controller_reset_failed(h->cfgtable); 860764670ac8SStephen M. Cameron if (rc) 860864670ac8SStephen M. Cameron dev_info(&h->pdev->dev, 860964670ac8SStephen M. Cameron "Soft reset appears to have failed.\n"); 861064670ac8SStephen M. Cameron 861164670ac8SStephen M. Cameron /* since the controller's reset, we have to go back and re-init 861264670ac8SStephen M. Cameron * everything. Easiest to just forget what we've done and do it 861364670ac8SStephen M. Cameron * all over again. 861464670ac8SStephen M. Cameron */ 861564670ac8SStephen M. Cameron hpsa_undo_allocations_after_kdump_soft_reset(h); 861664670ac8SStephen M. Cameron try_soft_reset = 0; 861764670ac8SStephen M. Cameron if (rc) 8618b2ef480cSRobert Elliott /* don't goto clean, we already unallocated */ 861964670ac8SStephen M. Cameron return -ENODEV; 862064670ac8SStephen M. Cameron 862164670ac8SStephen M. Cameron goto reinit_after_soft_reset; 862264670ac8SStephen M. Cameron } 8623edd16368SStephen M. Cameron 8624da0697bdSScott Teel /* Enable Accelerated IO path at driver layer */ 8625da0697bdSScott Teel h->acciopath_status = 1; 862634592254SScott Teel /* Disable discovery polling.*/ 862734592254SScott Teel h->discovery_polling = 0; 8628da0697bdSScott Teel 8629e863d68eSScott Teel 8630edd16368SStephen M. Cameron /* Turn the interrupts on so we can service requests */ 8631edd16368SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_ON); 8632edd16368SStephen M. Cameron 8633339b2b14SStephen M. Cameron hpsa_hba_inquiry(h); 86348a98db73SStephen M. Cameron 863534592254SScott Teel h->lastlogicals = kzalloc(sizeof(*(h->lastlogicals)), GFP_KERNEL); 863634592254SScott Teel if (!h->lastlogicals) 863734592254SScott Teel dev_info(&h->pdev->dev, 863834592254SScott Teel "Can't track change to report lun data\n"); 863934592254SScott Teel 8640*cf477237SDon Brace /* hook into SCSI subsystem */ 8641*cf477237SDon Brace rc = hpsa_scsi_add_host(h); 8642*cf477237SDon Brace if (rc) 8643*cf477237SDon Brace goto clean7; /* perf, sg, cmd, irq, shost, pci, lu, aer/h */ 8644*cf477237SDon Brace 86458a98db73SStephen M. Cameron /* Monitor the controller for firmware lockups */ 86468a98db73SStephen M. Cameron h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 86478a98db73SStephen M. Cameron INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker); 86488a98db73SStephen M. Cameron schedule_delayed_work(&h->monitor_ctlr_work, 86498a98db73SStephen M. Cameron h->heartbeat_sample_interval); 86506636e7f4SDon Brace INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker); 86516636e7f4SDon Brace queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work, 86526636e7f4SDon Brace h->heartbeat_sample_interval); 865388bf6d62SStephen M. Cameron return 0; 8654edd16368SStephen M. Cameron 86552946e82bSRobert Elliott clean7: /* perf, sg, cmd, irq, shost, pci, lu, aer/h */ 8656105a3dbcSRobert Elliott hpsa_free_performant_mode(h); 8657105a3dbcSRobert Elliott h->access.set_intr_mask(h, HPSA_INTR_OFF); 8658105a3dbcSRobert Elliott clean6: /* sg, cmd, irq, pci, lockup, wq/aer/h */ 865933a2ffceSStephen M. Cameron hpsa_free_sg_chain_blocks(h); 86602946e82bSRobert Elliott clean5: /* cmd, irq, shost, pci, lu, aer/h */ 86612e9d1b36SStephen M. Cameron hpsa_free_cmd_pool(h); 86622946e82bSRobert Elliott clean4: /* irq, shost, pci, lu, aer/h */ 8663ec501a18SRobert Elliott hpsa_free_irqs(h); 86642946e82bSRobert Elliott clean3: /* shost, pci, lu, aer/h */ 86652946e82bSRobert Elliott scsi_host_put(h->scsi_host); 86662946e82bSRobert Elliott h->scsi_host = NULL; 86672946e82bSRobert Elliott clean2_5: /* pci, lu, aer/h */ 8668195f2c65SRobert Elliott hpsa_free_pci_init(h); 86692946e82bSRobert Elliott clean2: /* lu, aer/h */ 8670105a3dbcSRobert Elliott if (h->lockup_detected) { 8671094963daSStephen M. Cameron free_percpu(h->lockup_detected); 8672105a3dbcSRobert Elliott h->lockup_detected = NULL; 8673105a3dbcSRobert Elliott } 8674105a3dbcSRobert Elliott clean1: /* wq/aer/h */ 8675105a3dbcSRobert Elliott if (h->resubmit_wq) { 8676105a3dbcSRobert Elliott destroy_workqueue(h->resubmit_wq); 8677105a3dbcSRobert Elliott h->resubmit_wq = NULL; 8678105a3dbcSRobert Elliott } 8679105a3dbcSRobert Elliott if (h->rescan_ctlr_wq) { 8680105a3dbcSRobert Elliott destroy_workqueue(h->rescan_ctlr_wq); 8681105a3dbcSRobert Elliott h->rescan_ctlr_wq = NULL; 8682105a3dbcSRobert Elliott } 8683edd16368SStephen M. Cameron kfree(h); 8684ecd9aad4SStephen M. Cameron return rc; 8685edd16368SStephen M. Cameron } 8686edd16368SStephen M. Cameron 8687edd16368SStephen M. Cameron static void hpsa_flush_cache(struct ctlr_info *h) 8688edd16368SStephen M. Cameron { 8689edd16368SStephen M. Cameron char *flush_buf; 8690edd16368SStephen M. Cameron struct CommandList *c; 869125163bd5SWebb Scales int rc; 8692702890e3SStephen M. Cameron 8693094963daSStephen M. Cameron if (unlikely(lockup_detected(h))) 8694702890e3SStephen M. Cameron return; 8695edd16368SStephen M. Cameron flush_buf = kzalloc(4, GFP_KERNEL); 8696edd16368SStephen M. Cameron if (!flush_buf) 8697edd16368SStephen M. Cameron return; 8698edd16368SStephen M. Cameron 869945fcb86eSStephen Cameron c = cmd_alloc(h); 8700bf43caf3SRobert Elliott 8701a2dac136SStephen M. Cameron if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0, 8702a2dac136SStephen M. Cameron RAID_CTLR_LUNID, TYPE_CMD)) { 8703a2dac136SStephen M. Cameron goto out; 8704a2dac136SStephen M. Cameron } 870525163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 870625163bd5SWebb Scales PCI_DMA_TODEVICE, NO_TIMEOUT); 870725163bd5SWebb Scales if (rc) 870825163bd5SWebb Scales goto out; 8709edd16368SStephen M. Cameron if (c->err_info->CommandStatus != 0) 8710a2dac136SStephen M. Cameron out: 8711edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 8712edd16368SStephen M. Cameron "error flushing cache on controller\n"); 871345fcb86eSStephen Cameron cmd_free(h, c); 8714edd16368SStephen M. Cameron kfree(flush_buf); 8715edd16368SStephen M. Cameron } 8716edd16368SStephen M. Cameron 8717c2adae44SScott Teel /* Make controller gather fresh report lun data each time we 8718c2adae44SScott Teel * send down a report luns request 8719c2adae44SScott Teel */ 8720c2adae44SScott Teel static void hpsa_disable_rld_caching(struct ctlr_info *h) 8721c2adae44SScott Teel { 8722c2adae44SScott Teel u32 *options; 8723c2adae44SScott Teel struct CommandList *c; 8724c2adae44SScott Teel int rc; 8725c2adae44SScott Teel 8726c2adae44SScott Teel /* Don't bother trying to set diag options if locked up */ 8727c2adae44SScott Teel if (unlikely(h->lockup_detected)) 8728c2adae44SScott Teel return; 8729c2adae44SScott Teel 8730c2adae44SScott Teel options = kzalloc(sizeof(*options), GFP_KERNEL); 8731c2adae44SScott Teel if (!options) { 8732c2adae44SScott Teel dev_err(&h->pdev->dev, 8733c2adae44SScott Teel "Error: failed to disable rld caching, during alloc.\n"); 8734c2adae44SScott Teel return; 8735c2adae44SScott Teel } 8736c2adae44SScott Teel 8737c2adae44SScott Teel c = cmd_alloc(h); 8738c2adae44SScott Teel 8739c2adae44SScott Teel /* first, get the current diag options settings */ 8740c2adae44SScott Teel if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0, 8741c2adae44SScott Teel RAID_CTLR_LUNID, TYPE_CMD)) 8742c2adae44SScott Teel goto errout; 8743c2adae44SScott Teel 8744c2adae44SScott Teel rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 8745c2adae44SScott Teel PCI_DMA_FROMDEVICE, NO_TIMEOUT); 8746c2adae44SScott Teel if ((rc != 0) || (c->err_info->CommandStatus != 0)) 8747c2adae44SScott Teel goto errout; 8748c2adae44SScott Teel 8749c2adae44SScott Teel /* Now, set the bit for disabling the RLD caching */ 8750c2adae44SScott Teel *options |= HPSA_DIAG_OPTS_DISABLE_RLD_CACHING; 8751c2adae44SScott Teel 8752c2adae44SScott Teel if (fill_cmd(c, BMIC_SET_DIAG_OPTIONS, h, options, 4, 0, 8753c2adae44SScott Teel RAID_CTLR_LUNID, TYPE_CMD)) 8754c2adae44SScott Teel goto errout; 8755c2adae44SScott Teel 8756c2adae44SScott Teel rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 8757c2adae44SScott Teel PCI_DMA_TODEVICE, NO_TIMEOUT); 8758c2adae44SScott Teel if ((rc != 0) || (c->err_info->CommandStatus != 0)) 8759c2adae44SScott Teel goto errout; 8760c2adae44SScott Teel 8761c2adae44SScott Teel /* Now verify that it got set: */ 8762c2adae44SScott Teel if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0, 8763c2adae44SScott Teel RAID_CTLR_LUNID, TYPE_CMD)) 8764c2adae44SScott Teel goto errout; 8765c2adae44SScott Teel 8766c2adae44SScott Teel rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 8767c2adae44SScott Teel PCI_DMA_FROMDEVICE, NO_TIMEOUT); 8768c2adae44SScott Teel if ((rc != 0) || (c->err_info->CommandStatus != 0)) 8769c2adae44SScott Teel goto errout; 8770c2adae44SScott Teel 8771d8a080c3SDan Carpenter if (*options & HPSA_DIAG_OPTS_DISABLE_RLD_CACHING) 8772c2adae44SScott Teel goto out; 8773c2adae44SScott Teel 8774c2adae44SScott Teel errout: 8775c2adae44SScott Teel dev_err(&h->pdev->dev, 8776c2adae44SScott Teel "Error: failed to disable report lun data caching.\n"); 8777c2adae44SScott Teel out: 8778c2adae44SScott Teel cmd_free(h, c); 8779c2adae44SScott Teel kfree(options); 8780c2adae44SScott Teel } 8781c2adae44SScott Teel 8782edd16368SStephen M. Cameron static void hpsa_shutdown(struct pci_dev *pdev) 8783edd16368SStephen M. Cameron { 8784edd16368SStephen M. Cameron struct ctlr_info *h; 8785edd16368SStephen M. Cameron 8786edd16368SStephen M. Cameron h = pci_get_drvdata(pdev); 8787edd16368SStephen M. Cameron /* Turn board interrupts off and send the flush cache command 8788edd16368SStephen M. Cameron * sendcmd will turn off interrupt, and send the flush... 8789edd16368SStephen M. Cameron * To write all data in the battery backed cache to disks 8790edd16368SStephen M. Cameron */ 8791edd16368SStephen M. Cameron hpsa_flush_cache(h); 8792edd16368SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 8793105a3dbcSRobert Elliott hpsa_free_irqs(h); /* init_one 4 */ 8794cc64c817SRobert Elliott hpsa_disable_interrupt_mode(h); /* pci_init 2 */ 8795edd16368SStephen M. Cameron } 8796edd16368SStephen M. Cameron 87976f039790SGreg Kroah-Hartman static void hpsa_free_device_info(struct ctlr_info *h) 879855e14e76SStephen M. Cameron { 879955e14e76SStephen M. Cameron int i; 880055e14e76SStephen M. Cameron 8801105a3dbcSRobert Elliott for (i = 0; i < h->ndevices; i++) { 880255e14e76SStephen M. Cameron kfree(h->dev[i]); 8803105a3dbcSRobert Elliott h->dev[i] = NULL; 8804105a3dbcSRobert Elliott } 880555e14e76SStephen M. Cameron } 880655e14e76SStephen M. Cameron 88076f039790SGreg Kroah-Hartman static void hpsa_remove_one(struct pci_dev *pdev) 8808edd16368SStephen M. Cameron { 8809edd16368SStephen M. Cameron struct ctlr_info *h; 88108a98db73SStephen M. Cameron unsigned long flags; 8811edd16368SStephen M. Cameron 8812edd16368SStephen M. Cameron if (pci_get_drvdata(pdev) == NULL) { 8813edd16368SStephen M. Cameron dev_err(&pdev->dev, "unable to remove device\n"); 8814edd16368SStephen M. Cameron return; 8815edd16368SStephen M. Cameron } 8816edd16368SStephen M. Cameron h = pci_get_drvdata(pdev); 88178a98db73SStephen M. Cameron 88188a98db73SStephen M. Cameron /* Get rid of any controller monitoring work items */ 88198a98db73SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 88208a98db73SStephen M. Cameron h->remove_in_progress = 1; 88218a98db73SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 88226636e7f4SDon Brace cancel_delayed_work_sync(&h->monitor_ctlr_work); 88236636e7f4SDon Brace cancel_delayed_work_sync(&h->rescan_ctlr_work); 88246636e7f4SDon Brace destroy_workqueue(h->rescan_ctlr_wq); 88256636e7f4SDon Brace destroy_workqueue(h->resubmit_wq); 8826cc64c817SRobert Elliott 88272d041306SDon Brace /* 88282d041306SDon Brace * Call before disabling interrupts. 88292d041306SDon Brace * scsi_remove_host can trigger I/O operations especially 88302d041306SDon Brace * when multipath is enabled. There can be SYNCHRONIZE CACHE 88312d041306SDon Brace * operations which cannot complete and will hang the system. 88322d041306SDon Brace */ 88332d041306SDon Brace if (h->scsi_host) 88342d041306SDon Brace scsi_remove_host(h->scsi_host); /* init_one 8 */ 8835105a3dbcSRobert Elliott /* includes hpsa_free_irqs - init_one 4 */ 8836195f2c65SRobert Elliott /* includes hpsa_disable_interrupt_mode - pci_init 2 */ 8837edd16368SStephen M. Cameron hpsa_shutdown(pdev); 8838cc64c817SRobert Elliott 8839105a3dbcSRobert Elliott hpsa_free_device_info(h); /* scan */ 8840105a3dbcSRobert Elliott 88412946e82bSRobert Elliott kfree(h->hba_inquiry_data); /* init_one 10 */ 88422946e82bSRobert Elliott h->hba_inquiry_data = NULL; /* init_one 10 */ 88432946e82bSRobert Elliott hpsa_free_ioaccel2_sg_chain_blocks(h); 8844105a3dbcSRobert Elliott hpsa_free_performant_mode(h); /* init_one 7 */ 8845105a3dbcSRobert Elliott hpsa_free_sg_chain_blocks(h); /* init_one 6 */ 88461fb7c98aSRobert Elliott hpsa_free_cmd_pool(h); /* init_one 5 */ 884734592254SScott Teel kfree(h->lastlogicals); 8848105a3dbcSRobert Elliott 8849105a3dbcSRobert Elliott /* hpsa_free_irqs already called via hpsa_shutdown init_one 4 */ 8850195f2c65SRobert Elliott 88512946e82bSRobert Elliott scsi_host_put(h->scsi_host); /* init_one 3 */ 88522946e82bSRobert Elliott h->scsi_host = NULL; /* init_one 3 */ 88532946e82bSRobert Elliott 8854195f2c65SRobert Elliott /* includes hpsa_disable_interrupt_mode - pci_init 2 */ 88552946e82bSRobert Elliott hpsa_free_pci_init(h); /* init_one 2.5 */ 8856195f2c65SRobert Elliott 8857105a3dbcSRobert Elliott free_percpu(h->lockup_detected); /* init_one 2 */ 8858105a3dbcSRobert Elliott h->lockup_detected = NULL; /* init_one 2 */ 8859105a3dbcSRobert Elliott /* (void) pci_disable_pcie_error_reporting(pdev); */ /* init_one 1 */ 8860d04e62b9SKevin Barnett 8861d04e62b9SKevin Barnett hpsa_delete_sas_host(h); 8862d04e62b9SKevin Barnett 8863105a3dbcSRobert Elliott kfree(h); /* init_one 1 */ 8864edd16368SStephen M. Cameron } 8865edd16368SStephen M. Cameron 8866edd16368SStephen M. Cameron static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev, 8867edd16368SStephen M. Cameron __attribute__((unused)) pm_message_t state) 8868edd16368SStephen M. Cameron { 8869edd16368SStephen M. Cameron return -ENOSYS; 8870edd16368SStephen M. Cameron } 8871edd16368SStephen M. Cameron 8872edd16368SStephen M. Cameron static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev) 8873edd16368SStephen M. Cameron { 8874edd16368SStephen M. Cameron return -ENOSYS; 8875edd16368SStephen M. Cameron } 8876edd16368SStephen M. Cameron 8877edd16368SStephen M. Cameron static struct pci_driver hpsa_pci_driver = { 8878f79cfec6SStephen M. Cameron .name = HPSA, 8879edd16368SStephen M. Cameron .probe = hpsa_init_one, 88806f039790SGreg Kroah-Hartman .remove = hpsa_remove_one, 8881edd16368SStephen M. Cameron .id_table = hpsa_pci_device_id, /* id_table */ 8882edd16368SStephen M. Cameron .shutdown = hpsa_shutdown, 8883edd16368SStephen M. Cameron .suspend = hpsa_suspend, 8884edd16368SStephen M. Cameron .resume = hpsa_resume, 8885edd16368SStephen M. Cameron }; 8886edd16368SStephen M. Cameron 8887303932fdSDon Brace /* Fill in bucket_map[], given nsgs (the max number of 8888303932fdSDon Brace * scatter gather elements supported) and bucket[], 8889303932fdSDon Brace * which is an array of 8 integers. The bucket[] array 8890303932fdSDon Brace * contains 8 different DMA transfer sizes (in 16 8891303932fdSDon Brace * byte increments) which the controller uses to fetch 8892303932fdSDon Brace * commands. This function fills in bucket_map[], which 8893303932fdSDon Brace * maps a given number of scatter gather elements to one of 8894303932fdSDon Brace * the 8 DMA transfer sizes. The point of it is to allow the 8895303932fdSDon Brace * controller to only do as much DMA as needed to fetch the 8896303932fdSDon Brace * command, with the DMA transfer size encoded in the lower 8897303932fdSDon Brace * bits of the command address. 8898303932fdSDon Brace */ 8899303932fdSDon Brace static void calc_bucket_map(int bucket[], int num_buckets, 89002b08b3e9SDon Brace int nsgs, int min_blocks, u32 *bucket_map) 8901303932fdSDon Brace { 8902303932fdSDon Brace int i, j, b, size; 8903303932fdSDon Brace 8904303932fdSDon Brace /* Note, bucket_map must have nsgs+1 entries. */ 8905303932fdSDon Brace for (i = 0; i <= nsgs; i++) { 8906303932fdSDon Brace /* Compute size of a command with i SG entries */ 8907e1f7de0cSMatt Gates size = i + min_blocks; 8908303932fdSDon Brace b = num_buckets; /* Assume the biggest bucket */ 8909303932fdSDon Brace /* Find the bucket that is just big enough */ 8910e1f7de0cSMatt Gates for (j = 0; j < num_buckets; j++) { 8911303932fdSDon Brace if (bucket[j] >= size) { 8912303932fdSDon Brace b = j; 8913303932fdSDon Brace break; 8914303932fdSDon Brace } 8915303932fdSDon Brace } 8916303932fdSDon Brace /* for a command with i SG entries, use bucket b. */ 8917303932fdSDon Brace bucket_map[i] = b; 8918303932fdSDon Brace } 8919303932fdSDon Brace } 8920303932fdSDon Brace 8921105a3dbcSRobert Elliott /* 8922105a3dbcSRobert Elliott * return -ENODEV on err, 0 on success (or no action) 8923105a3dbcSRobert Elliott * allocates numerous items that must be freed later 8924105a3dbcSRobert Elliott */ 8925c706a795SRobert Elliott static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support) 8926303932fdSDon Brace { 89276c311b57SStephen M. Cameron int i; 89286c311b57SStephen M. Cameron unsigned long register_value; 8929e1f7de0cSMatt Gates unsigned long transMethod = CFGTBL_Trans_Performant | 8930e1f7de0cSMatt Gates (trans_support & CFGTBL_Trans_use_short_tags) | 8931e1f7de0cSMatt Gates CFGTBL_Trans_enable_directed_msix | 8932b9af4937SStephen M. Cameron (trans_support & (CFGTBL_Trans_io_accel1 | 8933b9af4937SStephen M. Cameron CFGTBL_Trans_io_accel2)); 8934e1f7de0cSMatt Gates struct access_method access = SA5_performant_access; 8935def342bdSStephen M. Cameron 8936def342bdSStephen M. Cameron /* This is a bit complicated. There are 8 registers on 8937def342bdSStephen M. Cameron * the controller which we write to to tell it 8 different 8938def342bdSStephen M. Cameron * sizes of commands which there may be. It's a way of 8939def342bdSStephen M. Cameron * reducing the DMA done to fetch each command. Encoded into 8940def342bdSStephen M. Cameron * each command's tag are 3 bits which communicate to the controller 8941def342bdSStephen M. Cameron * which of the eight sizes that command fits within. The size of 8942def342bdSStephen M. Cameron * each command depends on how many scatter gather entries there are. 8943def342bdSStephen M. Cameron * Each SG entry requires 16 bytes. The eight registers are programmed 8944def342bdSStephen M. Cameron * with the number of 16-byte blocks a command of that size requires. 8945def342bdSStephen M. Cameron * The smallest command possible requires 5 such 16 byte blocks. 8946d66ae08bSStephen M. Cameron * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte 8947def342bdSStephen M. Cameron * blocks. Note, this only extends to the SG entries contained 8948def342bdSStephen M. Cameron * within the command block, and does not extend to chained blocks 8949def342bdSStephen M. Cameron * of SG elements. bft[] contains the eight values we write to 8950def342bdSStephen M. Cameron * the registers. They are not evenly distributed, but have more 8951def342bdSStephen M. Cameron * sizes for small commands, and fewer sizes for larger commands. 8952def342bdSStephen M. Cameron */ 8953d66ae08bSStephen M. Cameron int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4}; 8954b9af4937SStephen M. Cameron #define MIN_IOACCEL2_BFT_ENTRY 5 8955b9af4937SStephen M. Cameron #define HPSA_IOACCEL2_HEADER_SZ 4 8956b9af4937SStephen M. Cameron int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12, 8957b9af4937SStephen M. Cameron 13, 14, 15, 16, 17, 18, 19, 8958b9af4937SStephen M. Cameron HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES}; 8959b9af4937SStephen M. Cameron BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16); 8960b9af4937SStephen M. Cameron BUILD_BUG_ON(ARRAY_SIZE(bft) != 8); 8961b9af4937SStephen M. Cameron BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) > 8962b9af4937SStephen M. Cameron 16 * MIN_IOACCEL2_BFT_ENTRY); 8963b9af4937SStephen M. Cameron BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16); 8964d66ae08bSStephen M. Cameron BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4); 8965303932fdSDon Brace /* 5 = 1 s/g entry or 4k 8966303932fdSDon Brace * 6 = 2 s/g entry or 8k 8967303932fdSDon Brace * 8 = 4 s/g entry or 16k 8968303932fdSDon Brace * 10 = 6 s/g entry or 24k 8969303932fdSDon Brace */ 8970303932fdSDon Brace 8971b3a52e79SStephen M. Cameron /* If the controller supports either ioaccel method then 8972b3a52e79SStephen M. Cameron * we can also use the RAID stack submit path that does not 8973b3a52e79SStephen M. Cameron * perform the superfluous readl() after each command submission. 8974b3a52e79SStephen M. Cameron */ 8975b3a52e79SStephen M. Cameron if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2)) 8976b3a52e79SStephen M. Cameron access = SA5_performant_access_no_read; 8977b3a52e79SStephen M. Cameron 8978303932fdSDon Brace /* Controller spec: zero out this buffer. */ 8979072b0518SStephen M. Cameron for (i = 0; i < h->nreply_queues; i++) 8980072b0518SStephen M. Cameron memset(h->reply_queue[i].head, 0, h->reply_queue_size); 8981303932fdSDon Brace 8982d66ae08bSStephen M. Cameron bft[7] = SG_ENTRIES_IN_CMD + 4; 8983d66ae08bSStephen M. Cameron calc_bucket_map(bft, ARRAY_SIZE(bft), 8984e1f7de0cSMatt Gates SG_ENTRIES_IN_CMD, 4, h->blockFetchTable); 8985303932fdSDon Brace for (i = 0; i < 8; i++) 8986303932fdSDon Brace writel(bft[i], &h->transtable->BlockFetch[i]); 8987303932fdSDon Brace 8988303932fdSDon Brace /* size of controller ring buffer */ 8989303932fdSDon Brace writel(h->max_commands, &h->transtable->RepQSize); 8990254f796bSMatt Gates writel(h->nreply_queues, &h->transtable->RepQCount); 8991303932fdSDon Brace writel(0, &h->transtable->RepQCtrAddrLow32); 8992303932fdSDon Brace writel(0, &h->transtable->RepQCtrAddrHigh32); 8993254f796bSMatt Gates 8994254f796bSMatt Gates for (i = 0; i < h->nreply_queues; i++) { 8995254f796bSMatt Gates writel(0, &h->transtable->RepQAddr[i].upper); 8996072b0518SStephen M. Cameron writel(h->reply_queue[i].busaddr, 8997254f796bSMatt Gates &h->transtable->RepQAddr[i].lower); 8998254f796bSMatt Gates } 8999254f796bSMatt Gates 9000b9af4937SStephen M. Cameron writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi); 9001e1f7de0cSMatt Gates writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest)); 9002e1f7de0cSMatt Gates /* 9003e1f7de0cSMatt Gates * enable outbound interrupt coalescing in accelerator mode; 9004e1f7de0cSMatt Gates */ 9005e1f7de0cSMatt Gates if (trans_support & CFGTBL_Trans_io_accel1) { 9006e1f7de0cSMatt Gates access = SA5_ioaccel_mode1_access; 9007e1f7de0cSMatt Gates writel(10, &h->cfgtable->HostWrite.CoalIntDelay); 9008e1f7de0cSMatt Gates writel(4, &h->cfgtable->HostWrite.CoalIntCount); 9009c349775eSScott Teel } else { 9010c349775eSScott Teel if (trans_support & CFGTBL_Trans_io_accel2) { 9011c349775eSScott Teel access = SA5_ioaccel_mode2_access; 9012c349775eSScott Teel writel(10, &h->cfgtable->HostWrite.CoalIntDelay); 9013c349775eSScott Teel writel(4, &h->cfgtable->HostWrite.CoalIntCount); 9014c349775eSScott Teel } 9015e1f7de0cSMatt Gates } 9016303932fdSDon Brace writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 9017c706a795SRobert Elliott if (hpsa_wait_for_mode_change_ack(h)) { 9018c706a795SRobert Elliott dev_err(&h->pdev->dev, 9019c706a795SRobert Elliott "performant mode problem - doorbell timeout\n"); 9020c706a795SRobert Elliott return -ENODEV; 9021c706a795SRobert Elliott } 9022303932fdSDon Brace register_value = readl(&(h->cfgtable->TransportActive)); 9023303932fdSDon Brace if (!(register_value & CFGTBL_Trans_Performant)) { 9024050f7147SStephen Cameron dev_err(&h->pdev->dev, 9025050f7147SStephen Cameron "performant mode problem - transport not active\n"); 9026c706a795SRobert Elliott return -ENODEV; 9027303932fdSDon Brace } 9028960a30e7SStephen M. Cameron /* Change the access methods to the performant access methods */ 9029e1f7de0cSMatt Gates h->access = access; 9030e1f7de0cSMatt Gates h->transMethod = transMethod; 9031e1f7de0cSMatt Gates 9032b9af4937SStephen M. Cameron if (!((trans_support & CFGTBL_Trans_io_accel1) || 9033b9af4937SStephen M. Cameron (trans_support & CFGTBL_Trans_io_accel2))) 9034c706a795SRobert Elliott return 0; 9035e1f7de0cSMatt Gates 9036b9af4937SStephen M. Cameron if (trans_support & CFGTBL_Trans_io_accel1) { 9037e1f7de0cSMatt Gates /* Set up I/O accelerator mode */ 9038e1f7de0cSMatt Gates for (i = 0; i < h->nreply_queues; i++) { 9039e1f7de0cSMatt Gates writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX); 9040e1f7de0cSMatt Gates h->reply_queue[i].current_entry = 9041e1f7de0cSMatt Gates readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX); 9042e1f7de0cSMatt Gates } 9043283b4a9bSStephen M. Cameron bft[7] = h->ioaccel_maxsg + 8; 9044283b4a9bSStephen M. Cameron calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8, 9045e1f7de0cSMatt Gates h->ioaccel1_blockFetchTable); 9046e1f7de0cSMatt Gates 9047e1f7de0cSMatt Gates /* initialize all reply queue entries to unused */ 9048072b0518SStephen M. Cameron for (i = 0; i < h->nreply_queues; i++) 9049072b0518SStephen M. Cameron memset(h->reply_queue[i].head, 9050072b0518SStephen M. Cameron (u8) IOACCEL_MODE1_REPLY_UNUSED, 9051072b0518SStephen M. Cameron h->reply_queue_size); 9052e1f7de0cSMatt Gates 9053e1f7de0cSMatt Gates /* set all the constant fields in the accelerator command 9054e1f7de0cSMatt Gates * frames once at init time to save CPU cycles later. 9055e1f7de0cSMatt Gates */ 9056e1f7de0cSMatt Gates for (i = 0; i < h->nr_cmds; i++) { 9057e1f7de0cSMatt Gates struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i]; 9058e1f7de0cSMatt Gates 9059e1f7de0cSMatt Gates cp->function = IOACCEL1_FUNCTION_SCSIIO; 9060e1f7de0cSMatt Gates cp->err_info = (u32) (h->errinfo_pool_dhandle + 9061e1f7de0cSMatt Gates (i * sizeof(struct ErrorInfo))); 9062e1f7de0cSMatt Gates cp->err_info_len = sizeof(struct ErrorInfo); 9063e1f7de0cSMatt Gates cp->sgl_offset = IOACCEL1_SGLOFFSET; 90642b08b3e9SDon Brace cp->host_context_flags = 90652b08b3e9SDon Brace cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT); 9066e1f7de0cSMatt Gates cp->timeout_sec = 0; 9067e1f7de0cSMatt Gates cp->ReplyQueue = 0; 906850a0decfSStephen M. Cameron cp->tag = 9069f2405db8SDon Brace cpu_to_le64((i << DIRECT_LOOKUP_SHIFT)); 907050a0decfSStephen M. Cameron cp->host_addr = 907150a0decfSStephen M. Cameron cpu_to_le64(h->ioaccel_cmd_pool_dhandle + 9072e1f7de0cSMatt Gates (i * sizeof(struct io_accel1_cmd))); 9073e1f7de0cSMatt Gates } 9074b9af4937SStephen M. Cameron } else if (trans_support & CFGTBL_Trans_io_accel2) { 9075b9af4937SStephen M. Cameron u64 cfg_offset, cfg_base_addr_index; 9076b9af4937SStephen M. Cameron u32 bft2_offset, cfg_base_addr; 9077b9af4937SStephen M. Cameron int rc; 9078b9af4937SStephen M. Cameron 9079b9af4937SStephen M. Cameron rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 9080b9af4937SStephen M. Cameron &cfg_base_addr_index, &cfg_offset); 9081b9af4937SStephen M. Cameron BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64); 9082b9af4937SStephen M. Cameron bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ; 9083b9af4937SStephen M. Cameron calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg, 9084b9af4937SStephen M. Cameron 4, h->ioaccel2_blockFetchTable); 9085b9af4937SStephen M. Cameron bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset); 9086b9af4937SStephen M. Cameron BUILD_BUG_ON(offsetof(struct CfgTable, 9087b9af4937SStephen M. Cameron io_accel_request_size_offset) != 0xb8); 9088b9af4937SStephen M. Cameron h->ioaccel2_bft2_regs = 9089b9af4937SStephen M. Cameron remap_pci_mem(pci_resource_start(h->pdev, 9090b9af4937SStephen M. Cameron cfg_base_addr_index) + 9091b9af4937SStephen M. Cameron cfg_offset + bft2_offset, 9092b9af4937SStephen M. Cameron ARRAY_SIZE(bft2) * 9093b9af4937SStephen M. Cameron sizeof(*h->ioaccel2_bft2_regs)); 9094b9af4937SStephen M. Cameron for (i = 0; i < ARRAY_SIZE(bft2); i++) 9095b9af4937SStephen M. Cameron writel(bft2[i], &h->ioaccel2_bft2_regs[i]); 9096b9af4937SStephen M. Cameron } 9097b9af4937SStephen M. Cameron writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 9098c706a795SRobert Elliott if (hpsa_wait_for_mode_change_ack(h)) { 9099c706a795SRobert Elliott dev_err(&h->pdev->dev, 9100c706a795SRobert Elliott "performant mode problem - enabling ioaccel mode\n"); 9101c706a795SRobert Elliott return -ENODEV; 9102c706a795SRobert Elliott } 9103c706a795SRobert Elliott return 0; 9104e1f7de0cSMatt Gates } 9105e1f7de0cSMatt Gates 91061fb7c98aSRobert Elliott /* Free ioaccel1 mode command blocks and block fetch table */ 91071fb7c98aSRobert Elliott static void hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info *h) 91081fb7c98aSRobert Elliott { 9109105a3dbcSRobert Elliott if (h->ioaccel_cmd_pool) { 91101fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 91111fb7c98aSRobert Elliott h->nr_cmds * sizeof(*h->ioaccel_cmd_pool), 91121fb7c98aSRobert Elliott h->ioaccel_cmd_pool, 91131fb7c98aSRobert Elliott h->ioaccel_cmd_pool_dhandle); 9114105a3dbcSRobert Elliott h->ioaccel_cmd_pool = NULL; 9115105a3dbcSRobert Elliott h->ioaccel_cmd_pool_dhandle = 0; 9116105a3dbcSRobert Elliott } 91171fb7c98aSRobert Elliott kfree(h->ioaccel1_blockFetchTable); 9118105a3dbcSRobert Elliott h->ioaccel1_blockFetchTable = NULL; 91191fb7c98aSRobert Elliott } 91201fb7c98aSRobert Elliott 9121d37ffbe4SRobert Elliott /* Allocate ioaccel1 mode command blocks and block fetch table */ 9122d37ffbe4SRobert Elliott static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h) 9123e1f7de0cSMatt Gates { 9124283b4a9bSStephen M. Cameron h->ioaccel_maxsg = 9125283b4a9bSStephen M. Cameron readl(&(h->cfgtable->io_accel_max_embedded_sg_count)); 9126283b4a9bSStephen M. Cameron if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES) 9127283b4a9bSStephen M. Cameron h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES; 9128283b4a9bSStephen M. Cameron 9129e1f7de0cSMatt Gates /* Command structures must be aligned on a 128-byte boundary 9130e1f7de0cSMatt Gates * because the 7 lower bits of the address are used by the 9131e1f7de0cSMatt Gates * hardware. 9132e1f7de0cSMatt Gates */ 9133e1f7de0cSMatt Gates BUILD_BUG_ON(sizeof(struct io_accel1_cmd) % 9134e1f7de0cSMatt Gates IOACCEL1_COMMANDLIST_ALIGNMENT); 9135e1f7de0cSMatt Gates h->ioaccel_cmd_pool = 9136e1f7de0cSMatt Gates pci_alloc_consistent(h->pdev, 9137e1f7de0cSMatt Gates h->nr_cmds * sizeof(*h->ioaccel_cmd_pool), 9138e1f7de0cSMatt Gates &(h->ioaccel_cmd_pool_dhandle)); 9139e1f7de0cSMatt Gates 9140e1f7de0cSMatt Gates h->ioaccel1_blockFetchTable = 9141283b4a9bSStephen M. Cameron kmalloc(((h->ioaccel_maxsg + 1) * 9142e1f7de0cSMatt Gates sizeof(u32)), GFP_KERNEL); 9143e1f7de0cSMatt Gates 9144e1f7de0cSMatt Gates if ((h->ioaccel_cmd_pool == NULL) || 9145e1f7de0cSMatt Gates (h->ioaccel1_blockFetchTable == NULL)) 9146e1f7de0cSMatt Gates goto clean_up; 9147e1f7de0cSMatt Gates 9148e1f7de0cSMatt Gates memset(h->ioaccel_cmd_pool, 0, 9149e1f7de0cSMatt Gates h->nr_cmds * sizeof(*h->ioaccel_cmd_pool)); 9150e1f7de0cSMatt Gates return 0; 9151e1f7de0cSMatt Gates 9152e1f7de0cSMatt Gates clean_up: 91531fb7c98aSRobert Elliott hpsa_free_ioaccel1_cmd_and_bft(h); 91542dd02d74SRobert Elliott return -ENOMEM; 91556c311b57SStephen M. Cameron } 91566c311b57SStephen M. Cameron 91571fb7c98aSRobert Elliott /* Free ioaccel2 mode command blocks and block fetch table */ 91581fb7c98aSRobert Elliott static void hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info *h) 91591fb7c98aSRobert Elliott { 9160d9a729f3SWebb Scales hpsa_free_ioaccel2_sg_chain_blocks(h); 9161d9a729f3SWebb Scales 9162105a3dbcSRobert Elliott if (h->ioaccel2_cmd_pool) { 91631fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 91641fb7c98aSRobert Elliott h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 91651fb7c98aSRobert Elliott h->ioaccel2_cmd_pool, 91661fb7c98aSRobert Elliott h->ioaccel2_cmd_pool_dhandle); 9167105a3dbcSRobert Elliott h->ioaccel2_cmd_pool = NULL; 9168105a3dbcSRobert Elliott h->ioaccel2_cmd_pool_dhandle = 0; 9169105a3dbcSRobert Elliott } 91701fb7c98aSRobert Elliott kfree(h->ioaccel2_blockFetchTable); 9171105a3dbcSRobert Elliott h->ioaccel2_blockFetchTable = NULL; 91721fb7c98aSRobert Elliott } 91731fb7c98aSRobert Elliott 9174d37ffbe4SRobert Elliott /* Allocate ioaccel2 mode command blocks and block fetch table */ 9175d37ffbe4SRobert Elliott static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h) 9176aca9012aSStephen M. Cameron { 9177d9a729f3SWebb Scales int rc; 9178d9a729f3SWebb Scales 9179aca9012aSStephen M. Cameron /* Allocate ioaccel2 mode command blocks and block fetch table */ 9180aca9012aSStephen M. Cameron 9181aca9012aSStephen M. Cameron h->ioaccel_maxsg = 9182aca9012aSStephen M. Cameron readl(&(h->cfgtable->io_accel_max_embedded_sg_count)); 9183aca9012aSStephen M. Cameron if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES) 9184aca9012aSStephen M. Cameron h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES; 9185aca9012aSStephen M. Cameron 9186aca9012aSStephen M. Cameron BUILD_BUG_ON(sizeof(struct io_accel2_cmd) % 9187aca9012aSStephen M. Cameron IOACCEL2_COMMANDLIST_ALIGNMENT); 9188aca9012aSStephen M. Cameron h->ioaccel2_cmd_pool = 9189aca9012aSStephen M. Cameron pci_alloc_consistent(h->pdev, 9190aca9012aSStephen M. Cameron h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 9191aca9012aSStephen M. Cameron &(h->ioaccel2_cmd_pool_dhandle)); 9192aca9012aSStephen M. Cameron 9193aca9012aSStephen M. Cameron h->ioaccel2_blockFetchTable = 9194aca9012aSStephen M. Cameron kmalloc(((h->ioaccel_maxsg + 1) * 9195aca9012aSStephen M. Cameron sizeof(u32)), GFP_KERNEL); 9196aca9012aSStephen M. Cameron 9197aca9012aSStephen M. Cameron if ((h->ioaccel2_cmd_pool == NULL) || 9198d9a729f3SWebb Scales (h->ioaccel2_blockFetchTable == NULL)) { 9199d9a729f3SWebb Scales rc = -ENOMEM; 9200d9a729f3SWebb Scales goto clean_up; 9201d9a729f3SWebb Scales } 9202d9a729f3SWebb Scales 9203d9a729f3SWebb Scales rc = hpsa_allocate_ioaccel2_sg_chain_blocks(h); 9204d9a729f3SWebb Scales if (rc) 9205aca9012aSStephen M. Cameron goto clean_up; 9206aca9012aSStephen M. Cameron 9207aca9012aSStephen M. Cameron memset(h->ioaccel2_cmd_pool, 0, 9208aca9012aSStephen M. Cameron h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool)); 9209aca9012aSStephen M. Cameron return 0; 9210aca9012aSStephen M. Cameron 9211aca9012aSStephen M. Cameron clean_up: 92121fb7c98aSRobert Elliott hpsa_free_ioaccel2_cmd_and_bft(h); 9213d9a729f3SWebb Scales return rc; 9214aca9012aSStephen M. Cameron } 9215aca9012aSStephen M. Cameron 9216105a3dbcSRobert Elliott /* Free items allocated by hpsa_put_ctlr_into_performant_mode */ 9217105a3dbcSRobert Elliott static void hpsa_free_performant_mode(struct ctlr_info *h) 9218105a3dbcSRobert Elliott { 9219105a3dbcSRobert Elliott kfree(h->blockFetchTable); 9220105a3dbcSRobert Elliott h->blockFetchTable = NULL; 9221105a3dbcSRobert Elliott hpsa_free_reply_queues(h); 9222105a3dbcSRobert Elliott hpsa_free_ioaccel1_cmd_and_bft(h); 9223105a3dbcSRobert Elliott hpsa_free_ioaccel2_cmd_and_bft(h); 9224105a3dbcSRobert Elliott } 9225105a3dbcSRobert Elliott 9226105a3dbcSRobert Elliott /* return -ENODEV on error, 0 on success (or no action) 9227105a3dbcSRobert Elliott * allocates numerous items that must be freed later 9228105a3dbcSRobert Elliott */ 9229105a3dbcSRobert Elliott static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h) 92306c311b57SStephen M. Cameron { 92316c311b57SStephen M. Cameron u32 trans_support; 9232e1f7de0cSMatt Gates unsigned long transMethod = CFGTBL_Trans_Performant | 9233e1f7de0cSMatt Gates CFGTBL_Trans_use_short_tags; 9234105a3dbcSRobert Elliott int i, rc; 92356c311b57SStephen M. Cameron 923602ec19c8SStephen M. Cameron if (hpsa_simple_mode) 9237105a3dbcSRobert Elliott return 0; 923802ec19c8SStephen M. Cameron 923967c99a72Sscameron@beardog.cce.hp.com trans_support = readl(&(h->cfgtable->TransportSupport)); 924067c99a72Sscameron@beardog.cce.hp.com if (!(trans_support & PERFORMANT_MODE)) 9241105a3dbcSRobert Elliott return 0; 924267c99a72Sscameron@beardog.cce.hp.com 9243e1f7de0cSMatt Gates /* Check for I/O accelerator mode support */ 9244e1f7de0cSMatt Gates if (trans_support & CFGTBL_Trans_io_accel1) { 9245e1f7de0cSMatt Gates transMethod |= CFGTBL_Trans_io_accel1 | 9246e1f7de0cSMatt Gates CFGTBL_Trans_enable_directed_msix; 9247105a3dbcSRobert Elliott rc = hpsa_alloc_ioaccel1_cmd_and_bft(h); 9248105a3dbcSRobert Elliott if (rc) 9249105a3dbcSRobert Elliott return rc; 9250105a3dbcSRobert Elliott } else if (trans_support & CFGTBL_Trans_io_accel2) { 9251aca9012aSStephen M. Cameron transMethod |= CFGTBL_Trans_io_accel2 | 9252aca9012aSStephen M. Cameron CFGTBL_Trans_enable_directed_msix; 9253105a3dbcSRobert Elliott rc = hpsa_alloc_ioaccel2_cmd_and_bft(h); 9254105a3dbcSRobert Elliott if (rc) 9255105a3dbcSRobert Elliott return rc; 9256e1f7de0cSMatt Gates } 9257e1f7de0cSMatt Gates 9258eee0f03aSHannes Reinecke h->nreply_queues = h->msix_vector > 0 ? h->msix_vector : 1; 9259cba3d38bSStephen M. Cameron hpsa_get_max_perf_mode_cmds(h); 92606c311b57SStephen M. Cameron /* Performant mode ring buffer and supporting data structures */ 9261072b0518SStephen M. Cameron h->reply_queue_size = h->max_commands * sizeof(u64); 92626c311b57SStephen M. Cameron 9263254f796bSMatt Gates for (i = 0; i < h->nreply_queues; i++) { 9264072b0518SStephen M. Cameron h->reply_queue[i].head = pci_alloc_consistent(h->pdev, 9265072b0518SStephen M. Cameron h->reply_queue_size, 9266072b0518SStephen M. Cameron &(h->reply_queue[i].busaddr)); 9267105a3dbcSRobert Elliott if (!h->reply_queue[i].head) { 9268105a3dbcSRobert Elliott rc = -ENOMEM; 9269105a3dbcSRobert Elliott goto clean1; /* rq, ioaccel */ 9270105a3dbcSRobert Elliott } 9271254f796bSMatt Gates h->reply_queue[i].size = h->max_commands; 9272254f796bSMatt Gates h->reply_queue[i].wraparound = 1; /* spec: init to 1 */ 9273254f796bSMatt Gates h->reply_queue[i].current_entry = 0; 9274254f796bSMatt Gates } 9275254f796bSMatt Gates 92766c311b57SStephen M. Cameron /* Need a block fetch table for performant mode */ 9277d66ae08bSStephen M. Cameron h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) * 92786c311b57SStephen M. Cameron sizeof(u32)), GFP_KERNEL); 9279105a3dbcSRobert Elliott if (!h->blockFetchTable) { 9280105a3dbcSRobert Elliott rc = -ENOMEM; 9281105a3dbcSRobert Elliott goto clean1; /* rq, ioaccel */ 9282105a3dbcSRobert Elliott } 92836c311b57SStephen M. Cameron 9284105a3dbcSRobert Elliott rc = hpsa_enter_performant_mode(h, trans_support); 9285105a3dbcSRobert Elliott if (rc) 9286105a3dbcSRobert Elliott goto clean2; /* bft, rq, ioaccel */ 9287105a3dbcSRobert Elliott return 0; 9288303932fdSDon Brace 9289105a3dbcSRobert Elliott clean2: /* bft, rq, ioaccel */ 9290303932fdSDon Brace kfree(h->blockFetchTable); 9291105a3dbcSRobert Elliott h->blockFetchTable = NULL; 9292105a3dbcSRobert Elliott clean1: /* rq, ioaccel */ 9293105a3dbcSRobert Elliott hpsa_free_reply_queues(h); 9294105a3dbcSRobert Elliott hpsa_free_ioaccel1_cmd_and_bft(h); 9295105a3dbcSRobert Elliott hpsa_free_ioaccel2_cmd_and_bft(h); 9296105a3dbcSRobert Elliott return rc; 9297303932fdSDon Brace } 9298303932fdSDon Brace 929923100dd9SStephen M. Cameron static int is_accelerated_cmd(struct CommandList *c) 930076438d08SStephen M. Cameron { 930123100dd9SStephen M. Cameron return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2; 930223100dd9SStephen M. Cameron } 930323100dd9SStephen M. Cameron 930423100dd9SStephen M. Cameron static void hpsa_drain_accel_commands(struct ctlr_info *h) 930523100dd9SStephen M. Cameron { 930623100dd9SStephen M. Cameron struct CommandList *c = NULL; 9307f2405db8SDon Brace int i, accel_cmds_out; 9308281a7fd0SWebb Scales int refcount; 930976438d08SStephen M. Cameron 9310f2405db8SDon Brace do { /* wait for all outstanding ioaccel commands to drain out */ 931123100dd9SStephen M. Cameron accel_cmds_out = 0; 9312f2405db8SDon Brace for (i = 0; i < h->nr_cmds; i++) { 9313f2405db8SDon Brace c = h->cmd_pool + i; 9314281a7fd0SWebb Scales refcount = atomic_inc_return(&c->refcount); 9315281a7fd0SWebb Scales if (refcount > 1) /* Command is allocated */ 931623100dd9SStephen M. Cameron accel_cmds_out += is_accelerated_cmd(c); 9317281a7fd0SWebb Scales cmd_free(h, c); 9318f2405db8SDon Brace } 931923100dd9SStephen M. Cameron if (accel_cmds_out <= 0) 932076438d08SStephen M. Cameron break; 932176438d08SStephen M. Cameron msleep(100); 932276438d08SStephen M. Cameron } while (1); 932376438d08SStephen M. Cameron } 932476438d08SStephen M. Cameron 9325d04e62b9SKevin Barnett static struct hpsa_sas_phy *hpsa_alloc_sas_phy( 9326d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port) 9327d04e62b9SKevin Barnett { 9328d04e62b9SKevin Barnett struct hpsa_sas_phy *hpsa_sas_phy; 9329d04e62b9SKevin Barnett struct sas_phy *phy; 9330d04e62b9SKevin Barnett 9331d04e62b9SKevin Barnett hpsa_sas_phy = kzalloc(sizeof(*hpsa_sas_phy), GFP_KERNEL); 9332d04e62b9SKevin Barnett if (!hpsa_sas_phy) 9333d04e62b9SKevin Barnett return NULL; 9334d04e62b9SKevin Barnett 9335d04e62b9SKevin Barnett phy = sas_phy_alloc(hpsa_sas_port->parent_node->parent_dev, 9336d04e62b9SKevin Barnett hpsa_sas_port->next_phy_index); 9337d04e62b9SKevin Barnett if (!phy) { 9338d04e62b9SKevin Barnett kfree(hpsa_sas_phy); 9339d04e62b9SKevin Barnett return NULL; 9340d04e62b9SKevin Barnett } 9341d04e62b9SKevin Barnett 9342d04e62b9SKevin Barnett hpsa_sas_port->next_phy_index++; 9343d04e62b9SKevin Barnett hpsa_sas_phy->phy = phy; 9344d04e62b9SKevin Barnett hpsa_sas_phy->parent_port = hpsa_sas_port; 9345d04e62b9SKevin Barnett 9346d04e62b9SKevin Barnett return hpsa_sas_phy; 9347d04e62b9SKevin Barnett } 9348d04e62b9SKevin Barnett 9349d04e62b9SKevin Barnett static void hpsa_free_sas_phy(struct hpsa_sas_phy *hpsa_sas_phy) 9350d04e62b9SKevin Barnett { 9351d04e62b9SKevin Barnett struct sas_phy *phy = hpsa_sas_phy->phy; 9352d04e62b9SKevin Barnett 9353d04e62b9SKevin Barnett sas_port_delete_phy(hpsa_sas_phy->parent_port->port, phy); 9354d04e62b9SKevin Barnett sas_phy_free(phy); 9355d04e62b9SKevin Barnett if (hpsa_sas_phy->added_to_port) 9356d04e62b9SKevin Barnett list_del(&hpsa_sas_phy->phy_list_entry); 9357d04e62b9SKevin Barnett kfree(hpsa_sas_phy); 9358d04e62b9SKevin Barnett } 9359d04e62b9SKevin Barnett 9360d04e62b9SKevin Barnett static int hpsa_sas_port_add_phy(struct hpsa_sas_phy *hpsa_sas_phy) 9361d04e62b9SKevin Barnett { 9362d04e62b9SKevin Barnett int rc; 9363d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9364d04e62b9SKevin Barnett struct sas_phy *phy; 9365d04e62b9SKevin Barnett struct sas_identify *identify; 9366d04e62b9SKevin Barnett 9367d04e62b9SKevin Barnett hpsa_sas_port = hpsa_sas_phy->parent_port; 9368d04e62b9SKevin Barnett phy = hpsa_sas_phy->phy; 9369d04e62b9SKevin Barnett 9370d04e62b9SKevin Barnett identify = &phy->identify; 9371d04e62b9SKevin Barnett memset(identify, 0, sizeof(*identify)); 9372d04e62b9SKevin Barnett identify->sas_address = hpsa_sas_port->sas_address; 9373d04e62b9SKevin Barnett identify->device_type = SAS_END_DEVICE; 9374d04e62b9SKevin Barnett identify->initiator_port_protocols = SAS_PROTOCOL_STP; 9375d04e62b9SKevin Barnett identify->target_port_protocols = SAS_PROTOCOL_STP; 9376d04e62b9SKevin Barnett phy->minimum_linkrate_hw = SAS_LINK_RATE_UNKNOWN; 9377d04e62b9SKevin Barnett phy->maximum_linkrate_hw = SAS_LINK_RATE_UNKNOWN; 9378d04e62b9SKevin Barnett phy->minimum_linkrate = SAS_LINK_RATE_UNKNOWN; 9379d04e62b9SKevin Barnett phy->maximum_linkrate = SAS_LINK_RATE_UNKNOWN; 9380d04e62b9SKevin Barnett phy->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN; 9381d04e62b9SKevin Barnett 9382d04e62b9SKevin Barnett rc = sas_phy_add(hpsa_sas_phy->phy); 9383d04e62b9SKevin Barnett if (rc) 9384d04e62b9SKevin Barnett return rc; 9385d04e62b9SKevin Barnett 9386d04e62b9SKevin Barnett sas_port_add_phy(hpsa_sas_port->port, hpsa_sas_phy->phy); 9387d04e62b9SKevin Barnett list_add_tail(&hpsa_sas_phy->phy_list_entry, 9388d04e62b9SKevin Barnett &hpsa_sas_port->phy_list_head); 9389d04e62b9SKevin Barnett hpsa_sas_phy->added_to_port = true; 9390d04e62b9SKevin Barnett 9391d04e62b9SKevin Barnett return 0; 9392d04e62b9SKevin Barnett } 9393d04e62b9SKevin Barnett 9394d04e62b9SKevin Barnett static int 9395d04e62b9SKevin Barnett hpsa_sas_port_add_rphy(struct hpsa_sas_port *hpsa_sas_port, 9396d04e62b9SKevin Barnett struct sas_rphy *rphy) 9397d04e62b9SKevin Barnett { 9398d04e62b9SKevin Barnett struct sas_identify *identify; 9399d04e62b9SKevin Barnett 9400d04e62b9SKevin Barnett identify = &rphy->identify; 9401d04e62b9SKevin Barnett identify->sas_address = hpsa_sas_port->sas_address; 9402d04e62b9SKevin Barnett identify->initiator_port_protocols = SAS_PROTOCOL_STP; 9403d04e62b9SKevin Barnett identify->target_port_protocols = SAS_PROTOCOL_STP; 9404d04e62b9SKevin Barnett 9405d04e62b9SKevin Barnett return sas_rphy_add(rphy); 9406d04e62b9SKevin Barnett } 9407d04e62b9SKevin Barnett 9408d04e62b9SKevin Barnett static struct hpsa_sas_port 9409d04e62b9SKevin Barnett *hpsa_alloc_sas_port(struct hpsa_sas_node *hpsa_sas_node, 9410d04e62b9SKevin Barnett u64 sas_address) 9411d04e62b9SKevin Barnett { 9412d04e62b9SKevin Barnett int rc; 9413d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9414d04e62b9SKevin Barnett struct sas_port *port; 9415d04e62b9SKevin Barnett 9416d04e62b9SKevin Barnett hpsa_sas_port = kzalloc(sizeof(*hpsa_sas_port), GFP_KERNEL); 9417d04e62b9SKevin Barnett if (!hpsa_sas_port) 9418d04e62b9SKevin Barnett return NULL; 9419d04e62b9SKevin Barnett 9420d04e62b9SKevin Barnett INIT_LIST_HEAD(&hpsa_sas_port->phy_list_head); 9421d04e62b9SKevin Barnett hpsa_sas_port->parent_node = hpsa_sas_node; 9422d04e62b9SKevin Barnett 9423d04e62b9SKevin Barnett port = sas_port_alloc_num(hpsa_sas_node->parent_dev); 9424d04e62b9SKevin Barnett if (!port) 9425d04e62b9SKevin Barnett goto free_hpsa_port; 9426d04e62b9SKevin Barnett 9427d04e62b9SKevin Barnett rc = sas_port_add(port); 9428d04e62b9SKevin Barnett if (rc) 9429d04e62b9SKevin Barnett goto free_sas_port; 9430d04e62b9SKevin Barnett 9431d04e62b9SKevin Barnett hpsa_sas_port->port = port; 9432d04e62b9SKevin Barnett hpsa_sas_port->sas_address = sas_address; 9433d04e62b9SKevin Barnett list_add_tail(&hpsa_sas_port->port_list_entry, 9434d04e62b9SKevin Barnett &hpsa_sas_node->port_list_head); 9435d04e62b9SKevin Barnett 9436d04e62b9SKevin Barnett return hpsa_sas_port; 9437d04e62b9SKevin Barnett 9438d04e62b9SKevin Barnett free_sas_port: 9439d04e62b9SKevin Barnett sas_port_free(port); 9440d04e62b9SKevin Barnett free_hpsa_port: 9441d04e62b9SKevin Barnett kfree(hpsa_sas_port); 9442d04e62b9SKevin Barnett 9443d04e62b9SKevin Barnett return NULL; 9444d04e62b9SKevin Barnett } 9445d04e62b9SKevin Barnett 9446d04e62b9SKevin Barnett static void hpsa_free_sas_port(struct hpsa_sas_port *hpsa_sas_port) 9447d04e62b9SKevin Barnett { 9448d04e62b9SKevin Barnett struct hpsa_sas_phy *hpsa_sas_phy; 9449d04e62b9SKevin Barnett struct hpsa_sas_phy *next; 9450d04e62b9SKevin Barnett 9451d04e62b9SKevin Barnett list_for_each_entry_safe(hpsa_sas_phy, next, 9452d04e62b9SKevin Barnett &hpsa_sas_port->phy_list_head, phy_list_entry) 9453d04e62b9SKevin Barnett hpsa_free_sas_phy(hpsa_sas_phy); 9454d04e62b9SKevin Barnett 9455d04e62b9SKevin Barnett sas_port_delete(hpsa_sas_port->port); 9456d04e62b9SKevin Barnett list_del(&hpsa_sas_port->port_list_entry); 9457d04e62b9SKevin Barnett kfree(hpsa_sas_port); 9458d04e62b9SKevin Barnett } 9459d04e62b9SKevin Barnett 9460d04e62b9SKevin Barnett static struct hpsa_sas_node *hpsa_alloc_sas_node(struct device *parent_dev) 9461d04e62b9SKevin Barnett { 9462d04e62b9SKevin Barnett struct hpsa_sas_node *hpsa_sas_node; 9463d04e62b9SKevin Barnett 9464d04e62b9SKevin Barnett hpsa_sas_node = kzalloc(sizeof(*hpsa_sas_node), GFP_KERNEL); 9465d04e62b9SKevin Barnett if (hpsa_sas_node) { 9466d04e62b9SKevin Barnett hpsa_sas_node->parent_dev = parent_dev; 9467d04e62b9SKevin Barnett INIT_LIST_HEAD(&hpsa_sas_node->port_list_head); 9468d04e62b9SKevin Barnett } 9469d04e62b9SKevin Barnett 9470d04e62b9SKevin Barnett return hpsa_sas_node; 9471d04e62b9SKevin Barnett } 9472d04e62b9SKevin Barnett 9473d04e62b9SKevin Barnett static void hpsa_free_sas_node(struct hpsa_sas_node *hpsa_sas_node) 9474d04e62b9SKevin Barnett { 9475d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9476d04e62b9SKevin Barnett struct hpsa_sas_port *next; 9477d04e62b9SKevin Barnett 9478d04e62b9SKevin Barnett if (!hpsa_sas_node) 9479d04e62b9SKevin Barnett return; 9480d04e62b9SKevin Barnett 9481d04e62b9SKevin Barnett list_for_each_entry_safe(hpsa_sas_port, next, 9482d04e62b9SKevin Barnett &hpsa_sas_node->port_list_head, port_list_entry) 9483d04e62b9SKevin Barnett hpsa_free_sas_port(hpsa_sas_port); 9484d04e62b9SKevin Barnett 9485d04e62b9SKevin Barnett kfree(hpsa_sas_node); 9486d04e62b9SKevin Barnett } 9487d04e62b9SKevin Barnett 9488d04e62b9SKevin Barnett static struct hpsa_scsi_dev_t 9489d04e62b9SKevin Barnett *hpsa_find_device_by_sas_rphy(struct ctlr_info *h, 9490d04e62b9SKevin Barnett struct sas_rphy *rphy) 9491d04e62b9SKevin Barnett { 9492d04e62b9SKevin Barnett int i; 9493d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *device; 9494d04e62b9SKevin Barnett 9495d04e62b9SKevin Barnett for (i = 0; i < h->ndevices; i++) { 9496d04e62b9SKevin Barnett device = h->dev[i]; 9497d04e62b9SKevin Barnett if (!device->sas_port) 9498d04e62b9SKevin Barnett continue; 9499d04e62b9SKevin Barnett if (device->sas_port->rphy == rphy) 9500d04e62b9SKevin Barnett return device; 9501d04e62b9SKevin Barnett } 9502d04e62b9SKevin Barnett 9503d04e62b9SKevin Barnett return NULL; 9504d04e62b9SKevin Barnett } 9505d04e62b9SKevin Barnett 9506d04e62b9SKevin Barnett static int hpsa_add_sas_host(struct ctlr_info *h) 9507d04e62b9SKevin Barnett { 9508d04e62b9SKevin Barnett int rc; 9509d04e62b9SKevin Barnett struct device *parent_dev; 9510d04e62b9SKevin Barnett struct hpsa_sas_node *hpsa_sas_node; 9511d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9512d04e62b9SKevin Barnett struct hpsa_sas_phy *hpsa_sas_phy; 9513d04e62b9SKevin Barnett 9514d04e62b9SKevin Barnett parent_dev = &h->scsi_host->shost_gendev; 9515d04e62b9SKevin Barnett 9516d04e62b9SKevin Barnett hpsa_sas_node = hpsa_alloc_sas_node(parent_dev); 9517d04e62b9SKevin Barnett if (!hpsa_sas_node) 9518d04e62b9SKevin Barnett return -ENOMEM; 9519d04e62b9SKevin Barnett 9520d04e62b9SKevin Barnett hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, h->sas_address); 9521d04e62b9SKevin Barnett if (!hpsa_sas_port) { 9522d04e62b9SKevin Barnett rc = -ENODEV; 9523d04e62b9SKevin Barnett goto free_sas_node; 9524d04e62b9SKevin Barnett } 9525d04e62b9SKevin Barnett 9526d04e62b9SKevin Barnett hpsa_sas_phy = hpsa_alloc_sas_phy(hpsa_sas_port); 9527d04e62b9SKevin Barnett if (!hpsa_sas_phy) { 9528d04e62b9SKevin Barnett rc = -ENODEV; 9529d04e62b9SKevin Barnett goto free_sas_port; 9530d04e62b9SKevin Barnett } 9531d04e62b9SKevin Barnett 9532d04e62b9SKevin Barnett rc = hpsa_sas_port_add_phy(hpsa_sas_phy); 9533d04e62b9SKevin Barnett if (rc) 9534d04e62b9SKevin Barnett goto free_sas_phy; 9535d04e62b9SKevin Barnett 9536d04e62b9SKevin Barnett h->sas_host = hpsa_sas_node; 9537d04e62b9SKevin Barnett 9538d04e62b9SKevin Barnett return 0; 9539d04e62b9SKevin Barnett 9540d04e62b9SKevin Barnett free_sas_phy: 9541d04e62b9SKevin Barnett hpsa_free_sas_phy(hpsa_sas_phy); 9542d04e62b9SKevin Barnett free_sas_port: 9543d04e62b9SKevin Barnett hpsa_free_sas_port(hpsa_sas_port); 9544d04e62b9SKevin Barnett free_sas_node: 9545d04e62b9SKevin Barnett hpsa_free_sas_node(hpsa_sas_node); 9546d04e62b9SKevin Barnett 9547d04e62b9SKevin Barnett return rc; 9548d04e62b9SKevin Barnett } 9549d04e62b9SKevin Barnett 9550d04e62b9SKevin Barnett static void hpsa_delete_sas_host(struct ctlr_info *h) 9551d04e62b9SKevin Barnett { 9552d04e62b9SKevin Barnett hpsa_free_sas_node(h->sas_host); 9553d04e62b9SKevin Barnett } 9554d04e62b9SKevin Barnett 9555d04e62b9SKevin Barnett static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node, 9556d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *device) 9557d04e62b9SKevin Barnett { 9558d04e62b9SKevin Barnett int rc; 9559d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9560d04e62b9SKevin Barnett struct sas_rphy *rphy; 9561d04e62b9SKevin Barnett 9562d04e62b9SKevin Barnett hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, device->sas_address); 9563d04e62b9SKevin Barnett if (!hpsa_sas_port) 9564d04e62b9SKevin Barnett return -ENOMEM; 9565d04e62b9SKevin Barnett 9566d04e62b9SKevin Barnett rphy = sas_end_device_alloc(hpsa_sas_port->port); 9567d04e62b9SKevin Barnett if (!rphy) { 9568d04e62b9SKevin Barnett rc = -ENODEV; 9569d04e62b9SKevin Barnett goto free_sas_port; 9570d04e62b9SKevin Barnett } 9571d04e62b9SKevin Barnett 9572d04e62b9SKevin Barnett hpsa_sas_port->rphy = rphy; 9573d04e62b9SKevin Barnett device->sas_port = hpsa_sas_port; 9574d04e62b9SKevin Barnett 9575d04e62b9SKevin Barnett rc = hpsa_sas_port_add_rphy(hpsa_sas_port, rphy); 9576d04e62b9SKevin Barnett if (rc) 9577d04e62b9SKevin Barnett goto free_sas_port; 9578d04e62b9SKevin Barnett 9579d04e62b9SKevin Barnett return 0; 9580d04e62b9SKevin Barnett 9581d04e62b9SKevin Barnett free_sas_port: 9582d04e62b9SKevin Barnett hpsa_free_sas_port(hpsa_sas_port); 9583d04e62b9SKevin Barnett device->sas_port = NULL; 9584d04e62b9SKevin Barnett 9585d04e62b9SKevin Barnett return rc; 9586d04e62b9SKevin Barnett } 9587d04e62b9SKevin Barnett 9588d04e62b9SKevin Barnett static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device) 9589d04e62b9SKevin Barnett { 9590d04e62b9SKevin Barnett if (device->sas_port) { 9591d04e62b9SKevin Barnett hpsa_free_sas_port(device->sas_port); 9592d04e62b9SKevin Barnett device->sas_port = NULL; 9593d04e62b9SKevin Barnett } 9594d04e62b9SKevin Barnett } 9595d04e62b9SKevin Barnett 9596d04e62b9SKevin Barnett static int 9597d04e62b9SKevin Barnett hpsa_sas_get_linkerrors(struct sas_phy *phy) 9598d04e62b9SKevin Barnett { 9599d04e62b9SKevin Barnett return 0; 9600d04e62b9SKevin Barnett } 9601d04e62b9SKevin Barnett 9602d04e62b9SKevin Barnett static int 9603d04e62b9SKevin Barnett hpsa_sas_get_enclosure_identifier(struct sas_rphy *rphy, u64 *identifier) 9604d04e62b9SKevin Barnett { 9605aa105695SDan Carpenter *identifier = 0; 9606d04e62b9SKevin Barnett return 0; 9607d04e62b9SKevin Barnett } 9608d04e62b9SKevin Barnett 9609d04e62b9SKevin Barnett static int 9610d04e62b9SKevin Barnett hpsa_sas_get_bay_identifier(struct sas_rphy *rphy) 9611d04e62b9SKevin Barnett { 9612d04e62b9SKevin Barnett return -ENXIO; 9613d04e62b9SKevin Barnett } 9614d04e62b9SKevin Barnett 9615d04e62b9SKevin Barnett static int 9616d04e62b9SKevin Barnett hpsa_sas_phy_reset(struct sas_phy *phy, int hard_reset) 9617d04e62b9SKevin Barnett { 9618d04e62b9SKevin Barnett return 0; 9619d04e62b9SKevin Barnett } 9620d04e62b9SKevin Barnett 9621d04e62b9SKevin Barnett static int 9622d04e62b9SKevin Barnett hpsa_sas_phy_enable(struct sas_phy *phy, int enable) 9623d04e62b9SKevin Barnett { 9624d04e62b9SKevin Barnett return 0; 9625d04e62b9SKevin Barnett } 9626d04e62b9SKevin Barnett 9627d04e62b9SKevin Barnett static int 9628d04e62b9SKevin Barnett hpsa_sas_phy_setup(struct sas_phy *phy) 9629d04e62b9SKevin Barnett { 9630d04e62b9SKevin Barnett return 0; 9631d04e62b9SKevin Barnett } 9632d04e62b9SKevin Barnett 9633d04e62b9SKevin Barnett static void 9634d04e62b9SKevin Barnett hpsa_sas_phy_release(struct sas_phy *phy) 9635d04e62b9SKevin Barnett { 9636d04e62b9SKevin Barnett } 9637d04e62b9SKevin Barnett 9638d04e62b9SKevin Barnett static int 9639d04e62b9SKevin Barnett hpsa_sas_phy_speed(struct sas_phy *phy, struct sas_phy_linkrates *rates) 9640d04e62b9SKevin Barnett { 9641d04e62b9SKevin Barnett return -EINVAL; 9642d04e62b9SKevin Barnett } 9643d04e62b9SKevin Barnett 9644d04e62b9SKevin Barnett /* SMP = Serial Management Protocol */ 9645d04e62b9SKevin Barnett static int 9646d04e62b9SKevin Barnett hpsa_sas_smp_handler(struct Scsi_Host *shost, struct sas_rphy *rphy, 9647d04e62b9SKevin Barnett struct request *req) 9648d04e62b9SKevin Barnett { 9649d04e62b9SKevin Barnett return -EINVAL; 9650d04e62b9SKevin Barnett } 9651d04e62b9SKevin Barnett 9652d04e62b9SKevin Barnett static struct sas_function_template hpsa_sas_transport_functions = { 9653d04e62b9SKevin Barnett .get_linkerrors = hpsa_sas_get_linkerrors, 9654d04e62b9SKevin Barnett .get_enclosure_identifier = hpsa_sas_get_enclosure_identifier, 9655d04e62b9SKevin Barnett .get_bay_identifier = hpsa_sas_get_bay_identifier, 9656d04e62b9SKevin Barnett .phy_reset = hpsa_sas_phy_reset, 9657d04e62b9SKevin Barnett .phy_enable = hpsa_sas_phy_enable, 9658d04e62b9SKevin Barnett .phy_setup = hpsa_sas_phy_setup, 9659d04e62b9SKevin Barnett .phy_release = hpsa_sas_phy_release, 9660d04e62b9SKevin Barnett .set_phy_speed = hpsa_sas_phy_speed, 9661d04e62b9SKevin Barnett .smp_handler = hpsa_sas_smp_handler, 9662d04e62b9SKevin Barnett }; 9663d04e62b9SKevin Barnett 9664edd16368SStephen M. Cameron /* 9665edd16368SStephen M. Cameron * This is it. Register the PCI driver information for the cards we control 9666edd16368SStephen M. Cameron * the OS will call our registered routines when it finds one of our cards. 9667edd16368SStephen M. Cameron */ 9668edd16368SStephen M. Cameron static int __init hpsa_init(void) 9669edd16368SStephen M. Cameron { 9670d04e62b9SKevin Barnett int rc; 9671d04e62b9SKevin Barnett 9672d04e62b9SKevin Barnett hpsa_sas_transport_template = 9673d04e62b9SKevin Barnett sas_attach_transport(&hpsa_sas_transport_functions); 9674d04e62b9SKevin Barnett if (!hpsa_sas_transport_template) 9675d04e62b9SKevin Barnett return -ENODEV; 9676d04e62b9SKevin Barnett 9677d04e62b9SKevin Barnett rc = pci_register_driver(&hpsa_pci_driver); 9678d04e62b9SKevin Barnett 9679d04e62b9SKevin Barnett if (rc) 9680d04e62b9SKevin Barnett sas_release_transport(hpsa_sas_transport_template); 9681d04e62b9SKevin Barnett 9682d04e62b9SKevin Barnett return rc; 9683edd16368SStephen M. Cameron } 9684edd16368SStephen M. Cameron 9685edd16368SStephen M. Cameron static void __exit hpsa_cleanup(void) 9686edd16368SStephen M. Cameron { 9687edd16368SStephen M. Cameron pci_unregister_driver(&hpsa_pci_driver); 9688d04e62b9SKevin Barnett sas_release_transport(hpsa_sas_transport_template); 9689edd16368SStephen M. Cameron } 9690edd16368SStephen M. Cameron 9691e1f7de0cSMatt Gates static void __attribute__((unused)) verify_offsets(void) 9692e1f7de0cSMatt Gates { 9693e1f7de0cSMatt Gates #define VERIFY_OFFSET(member, offset) \ 9694dd0e19f3SScott Teel BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset) 9695dd0e19f3SScott Teel 9696dd0e19f3SScott Teel VERIFY_OFFSET(structure_size, 0); 9697dd0e19f3SScott Teel VERIFY_OFFSET(volume_blk_size, 4); 9698dd0e19f3SScott Teel VERIFY_OFFSET(volume_blk_cnt, 8); 9699dd0e19f3SScott Teel VERIFY_OFFSET(phys_blk_shift, 16); 9700dd0e19f3SScott Teel VERIFY_OFFSET(parity_rotation_shift, 17); 9701dd0e19f3SScott Teel VERIFY_OFFSET(strip_size, 18); 9702dd0e19f3SScott Teel VERIFY_OFFSET(disk_starting_blk, 20); 9703dd0e19f3SScott Teel VERIFY_OFFSET(disk_blk_cnt, 28); 9704dd0e19f3SScott Teel VERIFY_OFFSET(data_disks_per_row, 36); 9705dd0e19f3SScott Teel VERIFY_OFFSET(metadata_disks_per_row, 38); 9706dd0e19f3SScott Teel VERIFY_OFFSET(row_cnt, 40); 9707dd0e19f3SScott Teel VERIFY_OFFSET(layout_map_count, 42); 9708dd0e19f3SScott Teel VERIFY_OFFSET(flags, 44); 9709dd0e19f3SScott Teel VERIFY_OFFSET(dekindex, 46); 9710dd0e19f3SScott Teel /* VERIFY_OFFSET(reserved, 48 */ 9711dd0e19f3SScott Teel VERIFY_OFFSET(data, 64); 9712dd0e19f3SScott Teel 9713dd0e19f3SScott Teel #undef VERIFY_OFFSET 9714dd0e19f3SScott Teel 9715dd0e19f3SScott Teel #define VERIFY_OFFSET(member, offset) \ 9716b66cc250SMike Miller BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset) 9717b66cc250SMike Miller 9718b66cc250SMike Miller VERIFY_OFFSET(IU_type, 0); 9719b66cc250SMike Miller VERIFY_OFFSET(direction, 1); 9720b66cc250SMike Miller VERIFY_OFFSET(reply_queue, 2); 9721b66cc250SMike Miller /* VERIFY_OFFSET(reserved1, 3); */ 9722b66cc250SMike Miller VERIFY_OFFSET(scsi_nexus, 4); 9723b66cc250SMike Miller VERIFY_OFFSET(Tag, 8); 9724b66cc250SMike Miller VERIFY_OFFSET(cdb, 16); 9725b66cc250SMike Miller VERIFY_OFFSET(cciss_lun, 32); 9726b66cc250SMike Miller VERIFY_OFFSET(data_len, 40); 9727b66cc250SMike Miller VERIFY_OFFSET(cmd_priority_task_attr, 44); 9728b66cc250SMike Miller VERIFY_OFFSET(sg_count, 45); 9729b66cc250SMike Miller /* VERIFY_OFFSET(reserved3 */ 9730b66cc250SMike Miller VERIFY_OFFSET(err_ptr, 48); 9731b66cc250SMike Miller VERIFY_OFFSET(err_len, 56); 9732b66cc250SMike Miller /* VERIFY_OFFSET(reserved4 */ 9733b66cc250SMike Miller VERIFY_OFFSET(sg, 64); 9734b66cc250SMike Miller 9735b66cc250SMike Miller #undef VERIFY_OFFSET 9736b66cc250SMike Miller 9737b66cc250SMike Miller #define VERIFY_OFFSET(member, offset) \ 9738e1f7de0cSMatt Gates BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset) 9739e1f7de0cSMatt Gates 9740e1f7de0cSMatt Gates VERIFY_OFFSET(dev_handle, 0x00); 9741e1f7de0cSMatt Gates VERIFY_OFFSET(reserved1, 0x02); 9742e1f7de0cSMatt Gates VERIFY_OFFSET(function, 0x03); 9743e1f7de0cSMatt Gates VERIFY_OFFSET(reserved2, 0x04); 9744e1f7de0cSMatt Gates VERIFY_OFFSET(err_info, 0x0C); 9745e1f7de0cSMatt Gates VERIFY_OFFSET(reserved3, 0x10); 9746e1f7de0cSMatt Gates VERIFY_OFFSET(err_info_len, 0x12); 9747e1f7de0cSMatt Gates VERIFY_OFFSET(reserved4, 0x13); 9748e1f7de0cSMatt Gates VERIFY_OFFSET(sgl_offset, 0x14); 9749e1f7de0cSMatt Gates VERIFY_OFFSET(reserved5, 0x15); 9750e1f7de0cSMatt Gates VERIFY_OFFSET(transfer_len, 0x1C); 9751e1f7de0cSMatt Gates VERIFY_OFFSET(reserved6, 0x20); 9752e1f7de0cSMatt Gates VERIFY_OFFSET(io_flags, 0x24); 9753e1f7de0cSMatt Gates VERIFY_OFFSET(reserved7, 0x26); 9754e1f7de0cSMatt Gates VERIFY_OFFSET(LUN, 0x34); 9755e1f7de0cSMatt Gates VERIFY_OFFSET(control, 0x3C); 9756e1f7de0cSMatt Gates VERIFY_OFFSET(CDB, 0x40); 9757e1f7de0cSMatt Gates VERIFY_OFFSET(reserved8, 0x50); 9758e1f7de0cSMatt Gates VERIFY_OFFSET(host_context_flags, 0x60); 9759e1f7de0cSMatt Gates VERIFY_OFFSET(timeout_sec, 0x62); 9760e1f7de0cSMatt Gates VERIFY_OFFSET(ReplyQueue, 0x64); 9761e1f7de0cSMatt Gates VERIFY_OFFSET(reserved9, 0x65); 976250a0decfSStephen M. Cameron VERIFY_OFFSET(tag, 0x68); 9763e1f7de0cSMatt Gates VERIFY_OFFSET(host_addr, 0x70); 9764e1f7de0cSMatt Gates VERIFY_OFFSET(CISS_LUN, 0x78); 9765e1f7de0cSMatt Gates VERIFY_OFFSET(SG, 0x78 + 8); 9766e1f7de0cSMatt Gates #undef VERIFY_OFFSET 9767e1f7de0cSMatt Gates } 9768e1f7de0cSMatt Gates 9769edd16368SStephen M. Cameron module_init(hpsa_init); 9770edd16368SStephen M. Cameron module_exit(hpsa_cleanup); 9771