xref: /openbmc/linux/drivers/scsi/hpsa.c (revision c3390df4751177191b1691df2eba5e71af382d0b)
1edd16368SStephen M. Cameron /*
2edd16368SStephen M. Cameron  *    Disk Array driver for HP Smart Array SAS controllers
31358f6dcSDon Brace  *    Copyright 2014-2015 PMC-Sierra, Inc.
41358f6dcSDon Brace  *    Copyright 2000,2009-2015 Hewlett-Packard Development Company, L.P.
5edd16368SStephen M. Cameron  *
6edd16368SStephen M. Cameron  *    This program is free software; you can redistribute it and/or modify
7edd16368SStephen M. Cameron  *    it under the terms of the GNU General Public License as published by
8edd16368SStephen M. Cameron  *    the Free Software Foundation; version 2 of the License.
9edd16368SStephen M. Cameron  *
10edd16368SStephen M. Cameron  *    This program is distributed in the hope that it will be useful,
11edd16368SStephen M. Cameron  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
12edd16368SStephen M. Cameron  *    MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
13edd16368SStephen M. Cameron  *    NON INFRINGEMENT.  See the GNU General Public License for more details.
14edd16368SStephen M. Cameron  *
151358f6dcSDon Brace  *    Questions/Comments/Bugfixes to storagedev@pmcs.com
16edd16368SStephen M. Cameron  *
17edd16368SStephen M. Cameron  */
18edd16368SStephen M. Cameron 
19edd16368SStephen M. Cameron #include <linux/module.h>
20edd16368SStephen M. Cameron #include <linux/interrupt.h>
21edd16368SStephen M. Cameron #include <linux/types.h>
22edd16368SStephen M. Cameron #include <linux/pci.h>
23e5a44df8SMatthew Garrett #include <linux/pci-aspm.h>
24edd16368SStephen M. Cameron #include <linux/kernel.h>
25edd16368SStephen M. Cameron #include <linux/slab.h>
26edd16368SStephen M. Cameron #include <linux/delay.h>
27edd16368SStephen M. Cameron #include <linux/fs.h>
28edd16368SStephen M. Cameron #include <linux/timer.h>
29edd16368SStephen M. Cameron #include <linux/init.h>
30edd16368SStephen M. Cameron #include <linux/spinlock.h>
31edd16368SStephen M. Cameron #include <linux/compat.h>
32edd16368SStephen M. Cameron #include <linux/blktrace_api.h>
33edd16368SStephen M. Cameron #include <linux/uaccess.h>
34edd16368SStephen M. Cameron #include <linux/io.h>
35edd16368SStephen M. Cameron #include <linux/dma-mapping.h>
36edd16368SStephen M. Cameron #include <linux/completion.h>
37edd16368SStephen M. Cameron #include <linux/moduleparam.h>
38edd16368SStephen M. Cameron #include <scsi/scsi.h>
39edd16368SStephen M. Cameron #include <scsi/scsi_cmnd.h>
40edd16368SStephen M. Cameron #include <scsi/scsi_device.h>
41edd16368SStephen M. Cameron #include <scsi/scsi_host.h>
42667e23d4SStephen M. Cameron #include <scsi/scsi_tcq.h>
439437ac43SStephen Cameron #include <scsi/scsi_eh.h>
44d04e62b9SKevin Barnett #include <scsi/scsi_transport_sas.h>
4573153fe5SWebb Scales #include <scsi/scsi_dbg.h>
46edd16368SStephen M. Cameron #include <linux/cciss_ioctl.h>
47edd16368SStephen M. Cameron #include <linux/string.h>
48edd16368SStephen M. Cameron #include <linux/bitmap.h>
4960063497SArun Sharma #include <linux/atomic.h>
50a0c12413SStephen M. Cameron #include <linux/jiffies.h>
5142a91641SDon Brace #include <linux/percpu-defs.h>
52094963daSStephen M. Cameron #include <linux/percpu.h>
532b08b3e9SDon Brace #include <asm/unaligned.h>
54283b4a9bSStephen M. Cameron #include <asm/div64.h>
55edd16368SStephen M. Cameron #include "hpsa_cmd.h"
56edd16368SStephen M. Cameron #include "hpsa.h"
57edd16368SStephen M. Cameron 
58ec2c3aa9SDon Brace /*
59ec2c3aa9SDon Brace  * HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.'
60ec2c3aa9SDon Brace  * with an optional trailing '-' followed by a byte value (0-255).
61ec2c3aa9SDon Brace  */
62ec2c3aa9SDon Brace #define HPSA_DRIVER_VERSION "3.4.14-0"
63edd16368SStephen M. Cameron #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
64f79cfec6SStephen M. Cameron #define HPSA "hpsa"
65edd16368SStephen M. Cameron 
66007e7aa9SRobert Elliott /* How long to wait for CISS doorbell communication */
67007e7aa9SRobert Elliott #define CLEAR_EVENT_WAIT_INTERVAL 20	/* ms for each msleep() call */
68007e7aa9SRobert Elliott #define MODE_CHANGE_WAIT_INTERVAL 10	/* ms for each msleep() call */
69007e7aa9SRobert Elliott #define MAX_CLEAR_EVENT_WAIT 30000	/* times 20 ms = 600 s */
70007e7aa9SRobert Elliott #define MAX_MODE_CHANGE_WAIT 2000	/* times 10 ms = 20 s */
71edd16368SStephen M. Cameron #define MAX_IOCTL_CONFIG_WAIT 1000
72edd16368SStephen M. Cameron 
73edd16368SStephen M. Cameron /*define how many times we will try a command because of bus resets */
74edd16368SStephen M. Cameron #define MAX_CMD_RETRIES 3
75edd16368SStephen M. Cameron 
76edd16368SStephen M. Cameron /* Embedded module documentation macros - see modules.h */
77edd16368SStephen M. Cameron MODULE_AUTHOR("Hewlett-Packard Company");
78edd16368SStephen M. Cameron MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
79edd16368SStephen M. Cameron 	HPSA_DRIVER_VERSION);
80edd16368SStephen M. Cameron MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
81edd16368SStephen M. Cameron MODULE_VERSION(HPSA_DRIVER_VERSION);
82edd16368SStephen M. Cameron MODULE_LICENSE("GPL");
83edd16368SStephen M. Cameron 
84edd16368SStephen M. Cameron static int hpsa_allow_any;
85edd16368SStephen M. Cameron module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
86edd16368SStephen M. Cameron MODULE_PARM_DESC(hpsa_allow_any,
87edd16368SStephen M. Cameron 		"Allow hpsa driver to access unknown HP Smart Array hardware");
8802ec19c8SStephen M. Cameron static int hpsa_simple_mode;
8902ec19c8SStephen M. Cameron module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
9002ec19c8SStephen M. Cameron MODULE_PARM_DESC(hpsa_simple_mode,
9102ec19c8SStephen M. Cameron 	"Use 'simple mode' rather than 'performant mode'");
92edd16368SStephen M. Cameron 
93edd16368SStephen M. Cameron /* define the PCI info for the cards we can control */
94edd16368SStephen M. Cameron static const struct pci_device_id hpsa_pci_device_id[] = {
95edd16368SStephen M. Cameron 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3241},
96edd16368SStephen M. Cameron 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3243},
97edd16368SStephen M. Cameron 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3245},
98edd16368SStephen M. Cameron 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3247},
99edd16368SStephen M. Cameron 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3249},
100163dbcd8SMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x324A},
101163dbcd8SMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x324B},
102f8b01eb9SMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3233},
1039143a961Sscameron@beardog.cce.hp.com 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3350},
1049143a961Sscameron@beardog.cce.hp.com 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3351},
1059143a961Sscameron@beardog.cce.hp.com 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3352},
1069143a961Sscameron@beardog.cce.hp.com 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3353},
1079143a961Sscameron@beardog.cce.hp.com 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3354},
1089143a961Sscameron@beardog.cce.hp.com 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3355},
1099143a961Sscameron@beardog.cce.hp.com 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3356},
110fe0c9610SMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1921},
111fe0c9610SMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1922},
112fe0c9610SMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1923},
113fe0c9610SMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1924},
114fe0c9610SMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1926},
115fe0c9610SMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1928},
11697b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1929},
11797b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BD},
11897b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BE},
11997b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BF},
12097b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C0},
12197b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C1},
12297b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C2},
12397b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C3},
12497b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C4},
12597b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C5},
1263b7a45e5SJoe Handzik 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C6},
12797b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C7},
12897b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C8},
12997b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C9},
1303b7a45e5SJoe Handzik 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CA},
1313b7a45e5SJoe Handzik 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CB},
1323b7a45e5SJoe Handzik 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CC},
1333b7a45e5SJoe Handzik 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CD},
1343b7a45e5SJoe Handzik 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CE},
135fdfa4b6dSDon Brace 	{PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0580},
136cbb47dcbSDon Brace 	{PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0581},
137cbb47dcbSDon Brace 	{PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0582},
138cbb47dcbSDon Brace 	{PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0583},
139cbb47dcbSDon Brace 	{PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0584},
140cbb47dcbSDon Brace 	{PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0585},
1418e616a5eSStephen M. Cameron 	{PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076},
1428e616a5eSStephen M. Cameron 	{PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087},
1438e616a5eSStephen M. Cameron 	{PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D},
1448e616a5eSStephen M. Cameron 	{PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088},
1458e616a5eSStephen M. Cameron 	{PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f},
146edd16368SStephen M. Cameron 	{PCI_VENDOR_ID_HP,     PCI_ANY_ID,	PCI_ANY_ID, PCI_ANY_ID,
147edd16368SStephen M. Cameron 		PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
148edd16368SStephen M. Cameron 	{0,}
149edd16368SStephen M. Cameron };
150edd16368SStephen M. Cameron 
151edd16368SStephen M. Cameron MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
152edd16368SStephen M. Cameron 
153edd16368SStephen M. Cameron /*  board_id = Subsystem Device ID & Vendor ID
154edd16368SStephen M. Cameron  *  product = Marketing Name for the board
155edd16368SStephen M. Cameron  *  access = Address of the struct of function pointers
156edd16368SStephen M. Cameron  */
157edd16368SStephen M. Cameron static struct board_type products[] = {
158edd16368SStephen M. Cameron 	{0x3241103C, "Smart Array P212", &SA5_access},
159edd16368SStephen M. Cameron 	{0x3243103C, "Smart Array P410", &SA5_access},
160edd16368SStephen M. Cameron 	{0x3245103C, "Smart Array P410i", &SA5_access},
161edd16368SStephen M. Cameron 	{0x3247103C, "Smart Array P411", &SA5_access},
162edd16368SStephen M. Cameron 	{0x3249103C, "Smart Array P812", &SA5_access},
163163dbcd8SMike Miller 	{0x324A103C, "Smart Array P712m", &SA5_access},
164163dbcd8SMike Miller 	{0x324B103C, "Smart Array P711m", &SA5_access},
1657d2cce58SStephen M. Cameron 	{0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */
166fe0c9610SMike Miller 	{0x3350103C, "Smart Array P222", &SA5_access},
167fe0c9610SMike Miller 	{0x3351103C, "Smart Array P420", &SA5_access},
168fe0c9610SMike Miller 	{0x3352103C, "Smart Array P421", &SA5_access},
169fe0c9610SMike Miller 	{0x3353103C, "Smart Array P822", &SA5_access},
170fe0c9610SMike Miller 	{0x3354103C, "Smart Array P420i", &SA5_access},
171fe0c9610SMike Miller 	{0x3355103C, "Smart Array P220i", &SA5_access},
172fe0c9610SMike Miller 	{0x3356103C, "Smart Array P721m", &SA5_access},
1731fd6c8e3SMike Miller 	{0x1921103C, "Smart Array P830i", &SA5_access},
1741fd6c8e3SMike Miller 	{0x1922103C, "Smart Array P430", &SA5_access},
1751fd6c8e3SMike Miller 	{0x1923103C, "Smart Array P431", &SA5_access},
1761fd6c8e3SMike Miller 	{0x1924103C, "Smart Array P830", &SA5_access},
1771fd6c8e3SMike Miller 	{0x1926103C, "Smart Array P731m", &SA5_access},
1781fd6c8e3SMike Miller 	{0x1928103C, "Smart Array P230i", &SA5_access},
1791fd6c8e3SMike Miller 	{0x1929103C, "Smart Array P530", &SA5_access},
18027fb8137SDon Brace 	{0x21BD103C, "Smart Array P244br", &SA5_access},
18127fb8137SDon Brace 	{0x21BE103C, "Smart Array P741m", &SA5_access},
18227fb8137SDon Brace 	{0x21BF103C, "Smart HBA H240ar", &SA5_access},
18327fb8137SDon Brace 	{0x21C0103C, "Smart Array P440ar", &SA5_access},
184c8ae0ab1SDon Brace 	{0x21C1103C, "Smart Array P840ar", &SA5_access},
18527fb8137SDon Brace 	{0x21C2103C, "Smart Array P440", &SA5_access},
18627fb8137SDon Brace 	{0x21C3103C, "Smart Array P441", &SA5_access},
18797b9f53dSMike Miller 	{0x21C4103C, "Smart Array", &SA5_access},
18827fb8137SDon Brace 	{0x21C5103C, "Smart Array P841", &SA5_access},
18927fb8137SDon Brace 	{0x21C6103C, "Smart HBA H244br", &SA5_access},
19027fb8137SDon Brace 	{0x21C7103C, "Smart HBA H240", &SA5_access},
19127fb8137SDon Brace 	{0x21C8103C, "Smart HBA H241", &SA5_access},
19297b9f53dSMike Miller 	{0x21C9103C, "Smart Array", &SA5_access},
19327fb8137SDon Brace 	{0x21CA103C, "Smart Array P246br", &SA5_access},
19427fb8137SDon Brace 	{0x21CB103C, "Smart Array P840", &SA5_access},
1953b7a45e5SJoe Handzik 	{0x21CC103C, "Smart Array", &SA5_access},
1963b7a45e5SJoe Handzik 	{0x21CD103C, "Smart Array", &SA5_access},
19727fb8137SDon Brace 	{0x21CE103C, "Smart HBA", &SA5_access},
198fdfa4b6dSDon Brace 	{0x05809005, "SmartHBA-SA", &SA5_access},
199cbb47dcbSDon Brace 	{0x05819005, "SmartHBA-SA 8i", &SA5_access},
200cbb47dcbSDon Brace 	{0x05829005, "SmartHBA-SA 8i8e", &SA5_access},
201cbb47dcbSDon Brace 	{0x05839005, "SmartHBA-SA 8e", &SA5_access},
202cbb47dcbSDon Brace 	{0x05849005, "SmartHBA-SA 16i", &SA5_access},
203cbb47dcbSDon Brace 	{0x05859005, "SmartHBA-SA 4i4e", &SA5_access},
2048e616a5eSStephen M. Cameron 	{0x00761590, "HP Storage P1224 Array Controller", &SA5_access},
2058e616a5eSStephen M. Cameron 	{0x00871590, "HP Storage P1224e Array Controller", &SA5_access},
2068e616a5eSStephen M. Cameron 	{0x007D1590, "HP Storage P1228 Array Controller", &SA5_access},
2078e616a5eSStephen M. Cameron 	{0x00881590, "HP Storage P1228e Array Controller", &SA5_access},
2088e616a5eSStephen M. Cameron 	{0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access},
209edd16368SStephen M. Cameron 	{0xFFFF103C, "Unknown Smart Array", &SA5_access},
210edd16368SStephen M. Cameron };
211edd16368SStephen M. Cameron 
212d04e62b9SKevin Barnett static struct scsi_transport_template *hpsa_sas_transport_template;
213d04e62b9SKevin Barnett static int hpsa_add_sas_host(struct ctlr_info *h);
214d04e62b9SKevin Barnett static void hpsa_delete_sas_host(struct ctlr_info *h);
215d04e62b9SKevin Barnett static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node,
216d04e62b9SKevin Barnett 			struct hpsa_scsi_dev_t *device);
217d04e62b9SKevin Barnett static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device);
218d04e62b9SKevin Barnett static struct hpsa_scsi_dev_t
219d04e62b9SKevin Barnett 	*hpsa_find_device_by_sas_rphy(struct ctlr_info *h,
220d04e62b9SKevin Barnett 		struct sas_rphy *rphy);
221d04e62b9SKevin Barnett 
222a58e7e53SWebb Scales #define SCSI_CMD_BUSY ((struct scsi_cmnd *)&hpsa_cmd_busy)
223a58e7e53SWebb Scales static const struct scsi_cmnd hpsa_cmd_busy;
224a58e7e53SWebb Scales #define SCSI_CMD_IDLE ((struct scsi_cmnd *)&hpsa_cmd_idle)
225a58e7e53SWebb Scales static const struct scsi_cmnd hpsa_cmd_idle;
226edd16368SStephen M. Cameron static int number_of_controllers;
227edd16368SStephen M. Cameron 
22810f66018SStephen M. Cameron static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
22910f66018SStephen M. Cameron static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
23042a91641SDon Brace static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg);
231edd16368SStephen M. Cameron 
232edd16368SStephen M. Cameron #ifdef CONFIG_COMPAT
23342a91641SDon Brace static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd,
23442a91641SDon Brace 	void __user *arg);
235edd16368SStephen M. Cameron #endif
236edd16368SStephen M. Cameron 
237edd16368SStephen M. Cameron static void cmd_free(struct ctlr_info *h, struct CommandList *c);
238edd16368SStephen M. Cameron static struct CommandList *cmd_alloc(struct ctlr_info *h);
23973153fe5SWebb Scales static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c);
24073153fe5SWebb Scales static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h,
24173153fe5SWebb Scales 					    struct scsi_cmnd *scmd);
242a2dac136SStephen M. Cameron static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
243b7bb24ebSStephen M. Cameron 	void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
244edd16368SStephen M. Cameron 	int cmd_type);
2452c143342SRobert Elliott static void hpsa_free_cmd_pool(struct ctlr_info *h);
246b7bb24ebSStephen M. Cameron #define VPD_PAGE (1 << 8)
247b48d9804SDon Brace #define HPSA_SIMPLE_ERROR_BITS 0x03
248edd16368SStephen M. Cameron 
249f281233dSJeff Garzik static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
250a08a8471SStephen M. Cameron static void hpsa_scan_start(struct Scsi_Host *);
251a08a8471SStephen M. Cameron static int hpsa_scan_finished(struct Scsi_Host *sh,
252a08a8471SStephen M. Cameron 	unsigned long elapsed_time);
2537c0a0229SDon Brace static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth);
254edd16368SStephen M. Cameron 
255edd16368SStephen M. Cameron static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
25675167d2cSStephen M. Cameron static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd);
257edd16368SStephen M. Cameron static int hpsa_slave_alloc(struct scsi_device *sdev);
25841ce4c35SStephen Cameron static int hpsa_slave_configure(struct scsi_device *sdev);
259edd16368SStephen M. Cameron static void hpsa_slave_destroy(struct scsi_device *sdev);
260edd16368SStephen M. Cameron 
2618aa60681SDon Brace static void hpsa_update_scsi_devices(struct ctlr_info *h);
262edd16368SStephen M. Cameron static int check_for_unit_attention(struct ctlr_info *h,
263edd16368SStephen M. Cameron 	struct CommandList *c);
264edd16368SStephen M. Cameron static void check_ioctl_unit_attention(struct ctlr_info *h,
265edd16368SStephen M. Cameron 	struct CommandList *c);
266303932fdSDon Brace /* performant mode helper functions */
267303932fdSDon Brace static void calc_bucket_map(int *bucket, int num_buckets,
2682b08b3e9SDon Brace 	int nsgs, int min_blocks, u32 *bucket_map);
269105a3dbcSRobert Elliott static void hpsa_free_performant_mode(struct ctlr_info *h);
270105a3dbcSRobert Elliott static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
271254f796bSMatt Gates static inline u32 next_command(struct ctlr_info *h, u8 q);
2726f039790SGreg Kroah-Hartman static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
2736f039790SGreg Kroah-Hartman 			       u32 *cfg_base_addr, u64 *cfg_base_addr_index,
2741df8552aSStephen M. Cameron 			       u64 *cfg_offset);
2756f039790SGreg Kroah-Hartman static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
2761df8552aSStephen M. Cameron 				    unsigned long *memory_bar);
2776f039790SGreg Kroah-Hartman static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
2786f039790SGreg Kroah-Hartman static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
2796f039790SGreg Kroah-Hartman 				     int wait_for_ready);
28075167d2cSStephen M. Cameron static inline void finish_cmd(struct CommandList *c);
281c706a795SRobert Elliott static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h);
282fe5389c8SStephen M. Cameron #define BOARD_NOT_READY 0
283fe5389c8SStephen M. Cameron #define BOARD_READY 1
28423100dd9SStephen M. Cameron static void hpsa_drain_accel_commands(struct ctlr_info *h);
28576438d08SStephen M. Cameron static void hpsa_flush_cache(struct ctlr_info *h);
286c349775eSScott Teel static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
287c349775eSScott Teel 	struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
28803383736SDon Brace 	u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk);
289080ef1ccSDon Brace static void hpsa_command_resubmit_worker(struct work_struct *work);
29025163bd5SWebb Scales static u32 lockup_detected(struct ctlr_info *h);
29125163bd5SWebb Scales static int detect_controller_lockup(struct ctlr_info *h);
292c2adae44SScott Teel static void hpsa_disable_rld_caching(struct ctlr_info *h);
293d04e62b9SKevin Barnett static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
294d04e62b9SKevin Barnett 	struct ReportExtendedLUNdata *buf, int bufsize);
29534592254SScott Teel static int hpsa_luns_changed(struct ctlr_info *h);
296edd16368SStephen M. Cameron 
297edd16368SStephen M. Cameron static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
298edd16368SStephen M. Cameron {
299edd16368SStephen M. Cameron 	unsigned long *priv = shost_priv(sdev->host);
300edd16368SStephen M. Cameron 	return (struct ctlr_info *) *priv;
301edd16368SStephen M. Cameron }
302edd16368SStephen M. Cameron 
303a23513e8SStephen M. Cameron static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
304a23513e8SStephen M. Cameron {
305a23513e8SStephen M. Cameron 	unsigned long *priv = shost_priv(sh);
306a23513e8SStephen M. Cameron 	return (struct ctlr_info *) *priv;
307a23513e8SStephen M. Cameron }
308a23513e8SStephen M. Cameron 
309a58e7e53SWebb Scales static inline bool hpsa_is_cmd_idle(struct CommandList *c)
310a58e7e53SWebb Scales {
311a58e7e53SWebb Scales 	return c->scsi_cmd == SCSI_CMD_IDLE;
312a58e7e53SWebb Scales }
313a58e7e53SWebb Scales 
314d604f533SWebb Scales static inline bool hpsa_is_pending_event(struct CommandList *c)
315d604f533SWebb Scales {
316d604f533SWebb Scales 	return c->abort_pending || c->reset_pending;
317d604f533SWebb Scales }
318d604f533SWebb Scales 
3199437ac43SStephen Cameron /* extract sense key, asc, and ascq from sense data.  -1 means invalid. */
3209437ac43SStephen Cameron static void decode_sense_data(const u8 *sense_data, int sense_data_len,
3219437ac43SStephen Cameron 			u8 *sense_key, u8 *asc, u8 *ascq)
3229437ac43SStephen Cameron {
3239437ac43SStephen Cameron 	struct scsi_sense_hdr sshdr;
3249437ac43SStephen Cameron 	bool rc;
3259437ac43SStephen Cameron 
3269437ac43SStephen Cameron 	*sense_key = -1;
3279437ac43SStephen Cameron 	*asc = -1;
3289437ac43SStephen Cameron 	*ascq = -1;
3299437ac43SStephen Cameron 
3309437ac43SStephen Cameron 	if (sense_data_len < 1)
3319437ac43SStephen Cameron 		return;
3329437ac43SStephen Cameron 
3339437ac43SStephen Cameron 	rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr);
3349437ac43SStephen Cameron 	if (rc) {
3359437ac43SStephen Cameron 		*sense_key = sshdr.sense_key;
3369437ac43SStephen Cameron 		*asc = sshdr.asc;
3379437ac43SStephen Cameron 		*ascq = sshdr.ascq;
3389437ac43SStephen Cameron 	}
3399437ac43SStephen Cameron }
3409437ac43SStephen Cameron 
341edd16368SStephen M. Cameron static int check_for_unit_attention(struct ctlr_info *h,
342edd16368SStephen M. Cameron 	struct CommandList *c)
343edd16368SStephen M. Cameron {
3449437ac43SStephen Cameron 	u8 sense_key, asc, ascq;
3459437ac43SStephen Cameron 	int sense_len;
3469437ac43SStephen Cameron 
3479437ac43SStephen Cameron 	if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
3489437ac43SStephen Cameron 		sense_len = sizeof(c->err_info->SenseInfo);
3499437ac43SStephen Cameron 	else
3509437ac43SStephen Cameron 		sense_len = c->err_info->SenseLen;
3519437ac43SStephen Cameron 
3529437ac43SStephen Cameron 	decode_sense_data(c->err_info->SenseInfo, sense_len,
3539437ac43SStephen Cameron 				&sense_key, &asc, &ascq);
35481c27557SDon Brace 	if (sense_key != UNIT_ATTENTION || asc == 0xff)
355edd16368SStephen M. Cameron 		return 0;
356edd16368SStephen M. Cameron 
3579437ac43SStephen Cameron 	switch (asc) {
358edd16368SStephen M. Cameron 	case STATE_CHANGED:
3599437ac43SStephen Cameron 		dev_warn(&h->pdev->dev,
3602946e82bSRobert Elliott 			"%s: a state change detected, command retried\n",
3612946e82bSRobert Elliott 			h->devname);
362edd16368SStephen M. Cameron 		break;
363edd16368SStephen M. Cameron 	case LUN_FAILED:
3647f73695aSStephen M. Cameron 		dev_warn(&h->pdev->dev,
3652946e82bSRobert Elliott 			"%s: LUN failure detected\n", h->devname);
366edd16368SStephen M. Cameron 		break;
367edd16368SStephen M. Cameron 	case REPORT_LUNS_CHANGED:
3687f73695aSStephen M. Cameron 		dev_warn(&h->pdev->dev,
3692946e82bSRobert Elliott 			"%s: report LUN data changed\n", h->devname);
370edd16368SStephen M. Cameron 	/*
3714f4eb9f1SScott Teel 	 * Note: this REPORT_LUNS_CHANGED condition only occurs on the external
3724f4eb9f1SScott Teel 	 * target (array) devices.
373edd16368SStephen M. Cameron 	 */
374edd16368SStephen M. Cameron 		break;
375edd16368SStephen M. Cameron 	case POWER_OR_RESET:
3762946e82bSRobert Elliott 		dev_warn(&h->pdev->dev,
3772946e82bSRobert Elliott 			"%s: a power on or device reset detected\n",
3782946e82bSRobert Elliott 			h->devname);
379edd16368SStephen M. Cameron 		break;
380edd16368SStephen M. Cameron 	case UNIT_ATTENTION_CLEARED:
3812946e82bSRobert Elliott 		dev_warn(&h->pdev->dev,
3822946e82bSRobert Elliott 			"%s: unit attention cleared by another initiator\n",
3832946e82bSRobert Elliott 			h->devname);
384edd16368SStephen M. Cameron 		break;
385edd16368SStephen M. Cameron 	default:
3862946e82bSRobert Elliott 		dev_warn(&h->pdev->dev,
3872946e82bSRobert Elliott 			"%s: unknown unit attention detected\n",
3882946e82bSRobert Elliott 			h->devname);
389edd16368SStephen M. Cameron 		break;
390edd16368SStephen M. Cameron 	}
391edd16368SStephen M. Cameron 	return 1;
392edd16368SStephen M. Cameron }
393edd16368SStephen M. Cameron 
394852af20aSMatt Bondurant static int check_for_busy(struct ctlr_info *h, struct CommandList *c)
395852af20aSMatt Bondurant {
396852af20aSMatt Bondurant 	if (c->err_info->CommandStatus != CMD_TARGET_STATUS ||
397852af20aSMatt Bondurant 		(c->err_info->ScsiStatus != SAM_STAT_BUSY &&
398852af20aSMatt Bondurant 		 c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL))
399852af20aSMatt Bondurant 		return 0;
400852af20aSMatt Bondurant 	dev_warn(&h->pdev->dev, HPSA "device busy");
401852af20aSMatt Bondurant 	return 1;
402852af20aSMatt Bondurant }
403852af20aSMatt Bondurant 
404e985c58fSStephen Cameron static u32 lockup_detected(struct ctlr_info *h);
405e985c58fSStephen Cameron static ssize_t host_show_lockup_detected(struct device *dev,
406e985c58fSStephen Cameron 		struct device_attribute *attr, char *buf)
407e985c58fSStephen Cameron {
408e985c58fSStephen Cameron 	int ld;
409e985c58fSStephen Cameron 	struct ctlr_info *h;
410e985c58fSStephen Cameron 	struct Scsi_Host *shost = class_to_shost(dev);
411e985c58fSStephen Cameron 
412e985c58fSStephen Cameron 	h = shost_to_hba(shost);
413e985c58fSStephen Cameron 	ld = lockup_detected(h);
414e985c58fSStephen Cameron 
415e985c58fSStephen Cameron 	return sprintf(buf, "ld=%d\n", ld);
416e985c58fSStephen Cameron }
417e985c58fSStephen Cameron 
418da0697bdSScott Teel static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev,
419da0697bdSScott Teel 					 struct device_attribute *attr,
420da0697bdSScott Teel 					 const char *buf, size_t count)
421da0697bdSScott Teel {
422da0697bdSScott Teel 	int status, len;
423da0697bdSScott Teel 	struct ctlr_info *h;
424da0697bdSScott Teel 	struct Scsi_Host *shost = class_to_shost(dev);
425da0697bdSScott Teel 	char tmpbuf[10];
426da0697bdSScott Teel 
427da0697bdSScott Teel 	if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
428da0697bdSScott Teel 		return -EACCES;
429da0697bdSScott Teel 	len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
430da0697bdSScott Teel 	strncpy(tmpbuf, buf, len);
431da0697bdSScott Teel 	tmpbuf[len] = '\0';
432da0697bdSScott Teel 	if (sscanf(tmpbuf, "%d", &status) != 1)
433da0697bdSScott Teel 		return -EINVAL;
434da0697bdSScott Teel 	h = shost_to_hba(shost);
435da0697bdSScott Teel 	h->acciopath_status = !!status;
436da0697bdSScott Teel 	dev_warn(&h->pdev->dev,
437da0697bdSScott Teel 		"hpsa: HP SSD Smart Path %s via sysfs update.\n",
438da0697bdSScott Teel 		h->acciopath_status ? "enabled" : "disabled");
439da0697bdSScott Teel 	return count;
440da0697bdSScott Teel }
441da0697bdSScott Teel 
4422ba8bfc8SStephen M. Cameron static ssize_t host_store_raid_offload_debug(struct device *dev,
4432ba8bfc8SStephen M. Cameron 					 struct device_attribute *attr,
4442ba8bfc8SStephen M. Cameron 					 const char *buf, size_t count)
4452ba8bfc8SStephen M. Cameron {
4462ba8bfc8SStephen M. Cameron 	int debug_level, len;
4472ba8bfc8SStephen M. Cameron 	struct ctlr_info *h;
4482ba8bfc8SStephen M. Cameron 	struct Scsi_Host *shost = class_to_shost(dev);
4492ba8bfc8SStephen M. Cameron 	char tmpbuf[10];
4502ba8bfc8SStephen M. Cameron 
4512ba8bfc8SStephen M. Cameron 	if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
4522ba8bfc8SStephen M. Cameron 		return -EACCES;
4532ba8bfc8SStephen M. Cameron 	len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
4542ba8bfc8SStephen M. Cameron 	strncpy(tmpbuf, buf, len);
4552ba8bfc8SStephen M. Cameron 	tmpbuf[len] = '\0';
4562ba8bfc8SStephen M. Cameron 	if (sscanf(tmpbuf, "%d", &debug_level) != 1)
4572ba8bfc8SStephen M. Cameron 		return -EINVAL;
4582ba8bfc8SStephen M. Cameron 	if (debug_level < 0)
4592ba8bfc8SStephen M. Cameron 		debug_level = 0;
4602ba8bfc8SStephen M. Cameron 	h = shost_to_hba(shost);
4612ba8bfc8SStephen M. Cameron 	h->raid_offload_debug = debug_level;
4622ba8bfc8SStephen M. Cameron 	dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n",
4632ba8bfc8SStephen M. Cameron 		h->raid_offload_debug);
4642ba8bfc8SStephen M. Cameron 	return count;
4652ba8bfc8SStephen M. Cameron }
4662ba8bfc8SStephen M. Cameron 
467edd16368SStephen M. Cameron static ssize_t host_store_rescan(struct device *dev,
468edd16368SStephen M. Cameron 				 struct device_attribute *attr,
469edd16368SStephen M. Cameron 				 const char *buf, size_t count)
470edd16368SStephen M. Cameron {
471edd16368SStephen M. Cameron 	struct ctlr_info *h;
472edd16368SStephen M. Cameron 	struct Scsi_Host *shost = class_to_shost(dev);
473a23513e8SStephen M. Cameron 	h = shost_to_hba(shost);
47431468401SMike Miller 	hpsa_scan_start(h->scsi_host);
475edd16368SStephen M. Cameron 	return count;
476edd16368SStephen M. Cameron }
477edd16368SStephen M. Cameron 
478d28ce020SStephen M. Cameron static ssize_t host_show_firmware_revision(struct device *dev,
479d28ce020SStephen M. Cameron 	     struct device_attribute *attr, char *buf)
480d28ce020SStephen M. Cameron {
481d28ce020SStephen M. Cameron 	struct ctlr_info *h;
482d28ce020SStephen M. Cameron 	struct Scsi_Host *shost = class_to_shost(dev);
483d28ce020SStephen M. Cameron 	unsigned char *fwrev;
484d28ce020SStephen M. Cameron 
485d28ce020SStephen M. Cameron 	h = shost_to_hba(shost);
486d28ce020SStephen M. Cameron 	if (!h->hba_inquiry_data)
487d28ce020SStephen M. Cameron 		return 0;
488d28ce020SStephen M. Cameron 	fwrev = &h->hba_inquiry_data[32];
489d28ce020SStephen M. Cameron 	return snprintf(buf, 20, "%c%c%c%c\n",
490d28ce020SStephen M. Cameron 		fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
491d28ce020SStephen M. Cameron }
492d28ce020SStephen M. Cameron 
49394a13649SStephen M. Cameron static ssize_t host_show_commands_outstanding(struct device *dev,
49494a13649SStephen M. Cameron 	     struct device_attribute *attr, char *buf)
49594a13649SStephen M. Cameron {
49694a13649SStephen M. Cameron 	struct Scsi_Host *shost = class_to_shost(dev);
49794a13649SStephen M. Cameron 	struct ctlr_info *h = shost_to_hba(shost);
49894a13649SStephen M. Cameron 
4990cbf768eSStephen M. Cameron 	return snprintf(buf, 20, "%d\n",
5000cbf768eSStephen M. Cameron 			atomic_read(&h->commands_outstanding));
50194a13649SStephen M. Cameron }
50294a13649SStephen M. Cameron 
503745a7a25SStephen M. Cameron static ssize_t host_show_transport_mode(struct device *dev,
504745a7a25SStephen M. Cameron 	struct device_attribute *attr, char *buf)
505745a7a25SStephen M. Cameron {
506745a7a25SStephen M. Cameron 	struct ctlr_info *h;
507745a7a25SStephen M. Cameron 	struct Scsi_Host *shost = class_to_shost(dev);
508745a7a25SStephen M. Cameron 
509745a7a25SStephen M. Cameron 	h = shost_to_hba(shost);
510745a7a25SStephen M. Cameron 	return snprintf(buf, 20, "%s\n",
511960a30e7SStephen M. Cameron 		h->transMethod & CFGTBL_Trans_Performant ?
512745a7a25SStephen M. Cameron 			"performant" : "simple");
513745a7a25SStephen M. Cameron }
514745a7a25SStephen M. Cameron 
515da0697bdSScott Teel static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev,
516da0697bdSScott Teel 	struct device_attribute *attr, char *buf)
517da0697bdSScott Teel {
518da0697bdSScott Teel 	struct ctlr_info *h;
519da0697bdSScott Teel 	struct Scsi_Host *shost = class_to_shost(dev);
520da0697bdSScott Teel 
521da0697bdSScott Teel 	h = shost_to_hba(shost);
522da0697bdSScott Teel 	return snprintf(buf, 30, "HP SSD Smart Path %s\n",
523da0697bdSScott Teel 		(h->acciopath_status == 1) ?  "enabled" : "disabled");
524da0697bdSScott Teel }
525da0697bdSScott Teel 
52646380786SStephen M. Cameron /* List of controllers which cannot be hard reset on kexec with reset_devices */
527941b1cdaSStephen M. Cameron static u32 unresettable_controller[] = {
528941b1cdaSStephen M. Cameron 	0x324a103C, /* Smart Array P712m */
529941b1cdaSStephen M. Cameron 	0x324b103C, /* Smart Array P711m */
530941b1cdaSStephen M. Cameron 	0x3223103C, /* Smart Array P800 */
531941b1cdaSStephen M. Cameron 	0x3234103C, /* Smart Array P400 */
532941b1cdaSStephen M. Cameron 	0x3235103C, /* Smart Array P400i */
533941b1cdaSStephen M. Cameron 	0x3211103C, /* Smart Array E200i */
534941b1cdaSStephen M. Cameron 	0x3212103C, /* Smart Array E200 */
535941b1cdaSStephen M. Cameron 	0x3213103C, /* Smart Array E200i */
536941b1cdaSStephen M. Cameron 	0x3214103C, /* Smart Array E200i */
537941b1cdaSStephen M. Cameron 	0x3215103C, /* Smart Array E200i */
538941b1cdaSStephen M. Cameron 	0x3237103C, /* Smart Array E500 */
539941b1cdaSStephen M. Cameron 	0x323D103C, /* Smart Array P700m */
5407af0abbcSTomas Henzl 	0x40800E11, /* Smart Array 5i */
541941b1cdaSStephen M. Cameron 	0x409C0E11, /* Smart Array 6400 */
542941b1cdaSStephen M. Cameron 	0x409D0E11, /* Smart Array 6400 EM */
5435a4f934eSTomas Henzl 	0x40700E11, /* Smart Array 5300 */
5445a4f934eSTomas Henzl 	0x40820E11, /* Smart Array 532 */
5455a4f934eSTomas Henzl 	0x40830E11, /* Smart Array 5312 */
5465a4f934eSTomas Henzl 	0x409A0E11, /* Smart Array 641 */
5475a4f934eSTomas Henzl 	0x409B0E11, /* Smart Array 642 */
5485a4f934eSTomas Henzl 	0x40910E11, /* Smart Array 6i */
549941b1cdaSStephen M. Cameron };
550941b1cdaSStephen M. Cameron 
55146380786SStephen M. Cameron /* List of controllers which cannot even be soft reset */
55246380786SStephen M. Cameron static u32 soft_unresettable_controller[] = {
5537af0abbcSTomas Henzl 	0x40800E11, /* Smart Array 5i */
5545a4f934eSTomas Henzl 	0x40700E11, /* Smart Array 5300 */
5555a4f934eSTomas Henzl 	0x40820E11, /* Smart Array 532 */
5565a4f934eSTomas Henzl 	0x40830E11, /* Smart Array 5312 */
5575a4f934eSTomas Henzl 	0x409A0E11, /* Smart Array 641 */
5585a4f934eSTomas Henzl 	0x409B0E11, /* Smart Array 642 */
5595a4f934eSTomas Henzl 	0x40910E11, /* Smart Array 6i */
56046380786SStephen M. Cameron 	/* Exclude 640x boards.  These are two pci devices in one slot
56146380786SStephen M. Cameron 	 * which share a battery backed cache module.  One controls the
56246380786SStephen M. Cameron 	 * cache, the other accesses the cache through the one that controls
56346380786SStephen M. Cameron 	 * it.  If we reset the one controlling the cache, the other will
56446380786SStephen M. Cameron 	 * likely not be happy.  Just forbid resetting this conjoined mess.
56546380786SStephen M. Cameron 	 * The 640x isn't really supported by hpsa anyway.
56646380786SStephen M. Cameron 	 */
56746380786SStephen M. Cameron 	0x409C0E11, /* Smart Array 6400 */
56846380786SStephen M. Cameron 	0x409D0E11, /* Smart Array 6400 EM */
56946380786SStephen M. Cameron };
57046380786SStephen M. Cameron 
5719b5c48c2SStephen Cameron static u32 needs_abort_tags_swizzled[] = {
5729b5c48c2SStephen Cameron 	0x323D103C, /* Smart Array P700m */
5739b5c48c2SStephen Cameron 	0x324a103C, /* Smart Array P712m */
5749b5c48c2SStephen Cameron 	0x324b103C, /* SmartArray P711m */
5759b5c48c2SStephen Cameron };
5769b5c48c2SStephen Cameron 
5779b5c48c2SStephen Cameron static int board_id_in_array(u32 a[], int nelems, u32 board_id)
578941b1cdaSStephen M. Cameron {
579941b1cdaSStephen M. Cameron 	int i;
580941b1cdaSStephen M. Cameron 
5819b5c48c2SStephen Cameron 	for (i = 0; i < nelems; i++)
5829b5c48c2SStephen Cameron 		if (a[i] == board_id)
583941b1cdaSStephen M. Cameron 			return 1;
5849b5c48c2SStephen Cameron 	return 0;
5859b5c48c2SStephen Cameron }
5869b5c48c2SStephen Cameron 
5879b5c48c2SStephen Cameron static int ctlr_is_hard_resettable(u32 board_id)
5889b5c48c2SStephen Cameron {
5899b5c48c2SStephen Cameron 	return !board_id_in_array(unresettable_controller,
5909b5c48c2SStephen Cameron 			ARRAY_SIZE(unresettable_controller), board_id);
591941b1cdaSStephen M. Cameron }
592941b1cdaSStephen M. Cameron 
59346380786SStephen M. Cameron static int ctlr_is_soft_resettable(u32 board_id)
59446380786SStephen M. Cameron {
5959b5c48c2SStephen Cameron 	return !board_id_in_array(soft_unresettable_controller,
5969b5c48c2SStephen Cameron 			ARRAY_SIZE(soft_unresettable_controller), board_id);
59746380786SStephen M. Cameron }
59846380786SStephen M. Cameron 
59946380786SStephen M. Cameron static int ctlr_is_resettable(u32 board_id)
60046380786SStephen M. Cameron {
60146380786SStephen M. Cameron 	return ctlr_is_hard_resettable(board_id) ||
60246380786SStephen M. Cameron 		ctlr_is_soft_resettable(board_id);
60346380786SStephen M. Cameron }
60446380786SStephen M. Cameron 
6059b5c48c2SStephen Cameron static int ctlr_needs_abort_tags_swizzled(u32 board_id)
6069b5c48c2SStephen Cameron {
6079b5c48c2SStephen Cameron 	return board_id_in_array(needs_abort_tags_swizzled,
6089b5c48c2SStephen Cameron 			ARRAY_SIZE(needs_abort_tags_swizzled), board_id);
6099b5c48c2SStephen Cameron }
6109b5c48c2SStephen Cameron 
611941b1cdaSStephen M. Cameron static ssize_t host_show_resettable(struct device *dev,
612941b1cdaSStephen M. Cameron 	struct device_attribute *attr, char *buf)
613941b1cdaSStephen M. Cameron {
614941b1cdaSStephen M. Cameron 	struct ctlr_info *h;
615941b1cdaSStephen M. Cameron 	struct Scsi_Host *shost = class_to_shost(dev);
616941b1cdaSStephen M. Cameron 
617941b1cdaSStephen M. Cameron 	h = shost_to_hba(shost);
61846380786SStephen M. Cameron 	return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
619941b1cdaSStephen M. Cameron }
620941b1cdaSStephen M. Cameron 
621edd16368SStephen M. Cameron static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
622edd16368SStephen M. Cameron {
623edd16368SStephen M. Cameron 	return (scsi3addr[3] & 0xC0) == 0x40;
624edd16368SStephen M. Cameron }
625edd16368SStephen M. Cameron 
626f2ef0ce7SRobert Elliott static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6",
6277c59a0d4SDon Brace 	"1(+0)ADM", "UNKNOWN", "PHYS DRV"
628edd16368SStephen M. Cameron };
6296b80b18fSScott Teel #define HPSA_RAID_0	0
6306b80b18fSScott Teel #define HPSA_RAID_4	1
6316b80b18fSScott Teel #define HPSA_RAID_1	2	/* also used for RAID 10 */
6326b80b18fSScott Teel #define HPSA_RAID_5	3	/* also used for RAID 50 */
6336b80b18fSScott Teel #define HPSA_RAID_51	4
6346b80b18fSScott Teel #define HPSA_RAID_6	5	/* also used for RAID 60 */
6356b80b18fSScott Teel #define HPSA_RAID_ADM	6	/* also used for RAID 1+0 ADM */
6367c59a0d4SDon Brace #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 2)
6377c59a0d4SDon Brace #define PHYSICAL_DRIVE (ARRAY_SIZE(raid_label) - 1)
638edd16368SStephen M. Cameron 
639f3f01730SKevin Barnett static inline bool is_logical_device(struct hpsa_scsi_dev_t *device)
640f3f01730SKevin Barnett {
641f3f01730SKevin Barnett 	return !device->physical_device;
642f3f01730SKevin Barnett }
643edd16368SStephen M. Cameron 
644edd16368SStephen M. Cameron static ssize_t raid_level_show(struct device *dev,
645edd16368SStephen M. Cameron 	     struct device_attribute *attr, char *buf)
646edd16368SStephen M. Cameron {
647edd16368SStephen M. Cameron 	ssize_t l = 0;
64882a72c0aSStephen M. Cameron 	unsigned char rlevel;
649edd16368SStephen M. Cameron 	struct ctlr_info *h;
650edd16368SStephen M. Cameron 	struct scsi_device *sdev;
651edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *hdev;
652edd16368SStephen M. Cameron 	unsigned long flags;
653edd16368SStephen M. Cameron 
654edd16368SStephen M. Cameron 	sdev = to_scsi_device(dev);
655edd16368SStephen M. Cameron 	h = sdev_to_hba(sdev);
656edd16368SStephen M. Cameron 	spin_lock_irqsave(&h->lock, flags);
657edd16368SStephen M. Cameron 	hdev = sdev->hostdata;
658edd16368SStephen M. Cameron 	if (!hdev) {
659edd16368SStephen M. Cameron 		spin_unlock_irqrestore(&h->lock, flags);
660edd16368SStephen M. Cameron 		return -ENODEV;
661edd16368SStephen M. Cameron 	}
662edd16368SStephen M. Cameron 
663edd16368SStephen M. Cameron 	/* Is this even a logical drive? */
664f3f01730SKevin Barnett 	if (!is_logical_device(hdev)) {
665edd16368SStephen M. Cameron 		spin_unlock_irqrestore(&h->lock, flags);
666edd16368SStephen M. Cameron 		l = snprintf(buf, PAGE_SIZE, "N/A\n");
667edd16368SStephen M. Cameron 		return l;
668edd16368SStephen M. Cameron 	}
669edd16368SStephen M. Cameron 
670edd16368SStephen M. Cameron 	rlevel = hdev->raid_level;
671edd16368SStephen M. Cameron 	spin_unlock_irqrestore(&h->lock, flags);
67282a72c0aSStephen M. Cameron 	if (rlevel > RAID_UNKNOWN)
673edd16368SStephen M. Cameron 		rlevel = RAID_UNKNOWN;
674edd16368SStephen M. Cameron 	l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
675edd16368SStephen M. Cameron 	return l;
676edd16368SStephen M. Cameron }
677edd16368SStephen M. Cameron 
678edd16368SStephen M. Cameron static ssize_t lunid_show(struct device *dev,
679edd16368SStephen M. Cameron 	     struct device_attribute *attr, char *buf)
680edd16368SStephen M. Cameron {
681edd16368SStephen M. Cameron 	struct ctlr_info *h;
682edd16368SStephen M. Cameron 	struct scsi_device *sdev;
683edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *hdev;
684edd16368SStephen M. Cameron 	unsigned long flags;
685edd16368SStephen M. Cameron 	unsigned char lunid[8];
686edd16368SStephen M. Cameron 
687edd16368SStephen M. Cameron 	sdev = to_scsi_device(dev);
688edd16368SStephen M. Cameron 	h = sdev_to_hba(sdev);
689edd16368SStephen M. Cameron 	spin_lock_irqsave(&h->lock, flags);
690edd16368SStephen M. Cameron 	hdev = sdev->hostdata;
691edd16368SStephen M. Cameron 	if (!hdev) {
692edd16368SStephen M. Cameron 		spin_unlock_irqrestore(&h->lock, flags);
693edd16368SStephen M. Cameron 		return -ENODEV;
694edd16368SStephen M. Cameron 	}
695edd16368SStephen M. Cameron 	memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
696edd16368SStephen M. Cameron 	spin_unlock_irqrestore(&h->lock, flags);
697edd16368SStephen M. Cameron 	return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
698edd16368SStephen M. Cameron 		lunid[0], lunid[1], lunid[2], lunid[3],
699edd16368SStephen M. Cameron 		lunid[4], lunid[5], lunid[6], lunid[7]);
700edd16368SStephen M. Cameron }
701edd16368SStephen M. Cameron 
702edd16368SStephen M. Cameron static ssize_t unique_id_show(struct device *dev,
703edd16368SStephen M. Cameron 	     struct device_attribute *attr, char *buf)
704edd16368SStephen M. Cameron {
705edd16368SStephen M. Cameron 	struct ctlr_info *h;
706edd16368SStephen M. Cameron 	struct scsi_device *sdev;
707edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *hdev;
708edd16368SStephen M. Cameron 	unsigned long flags;
709edd16368SStephen M. Cameron 	unsigned char sn[16];
710edd16368SStephen M. Cameron 
711edd16368SStephen M. Cameron 	sdev = to_scsi_device(dev);
712edd16368SStephen M. Cameron 	h = sdev_to_hba(sdev);
713edd16368SStephen M. Cameron 	spin_lock_irqsave(&h->lock, flags);
714edd16368SStephen M. Cameron 	hdev = sdev->hostdata;
715edd16368SStephen M. Cameron 	if (!hdev) {
716edd16368SStephen M. Cameron 		spin_unlock_irqrestore(&h->lock, flags);
717edd16368SStephen M. Cameron 		return -ENODEV;
718edd16368SStephen M. Cameron 	}
719edd16368SStephen M. Cameron 	memcpy(sn, hdev->device_id, sizeof(sn));
720edd16368SStephen M. Cameron 	spin_unlock_irqrestore(&h->lock, flags);
721edd16368SStephen M. Cameron 	return snprintf(buf, 16 * 2 + 2,
722edd16368SStephen M. Cameron 			"%02X%02X%02X%02X%02X%02X%02X%02X"
723edd16368SStephen M. Cameron 			"%02X%02X%02X%02X%02X%02X%02X%02X\n",
724edd16368SStephen M. Cameron 			sn[0], sn[1], sn[2], sn[3],
725edd16368SStephen M. Cameron 			sn[4], sn[5], sn[6], sn[7],
726edd16368SStephen M. Cameron 			sn[8], sn[9], sn[10], sn[11],
727edd16368SStephen M. Cameron 			sn[12], sn[13], sn[14], sn[15]);
728edd16368SStephen M. Cameron }
729edd16368SStephen M. Cameron 
730c1988684SScott Teel static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev,
731c1988684SScott Teel 	     struct device_attribute *attr, char *buf)
732c1988684SScott Teel {
733c1988684SScott Teel 	struct ctlr_info *h;
734c1988684SScott Teel 	struct scsi_device *sdev;
735c1988684SScott Teel 	struct hpsa_scsi_dev_t *hdev;
736c1988684SScott Teel 	unsigned long flags;
737c1988684SScott Teel 	int offload_enabled;
738c1988684SScott Teel 
739c1988684SScott Teel 	sdev = to_scsi_device(dev);
740c1988684SScott Teel 	h = sdev_to_hba(sdev);
741c1988684SScott Teel 	spin_lock_irqsave(&h->lock, flags);
742c1988684SScott Teel 	hdev = sdev->hostdata;
743c1988684SScott Teel 	if (!hdev) {
744c1988684SScott Teel 		spin_unlock_irqrestore(&h->lock, flags);
745c1988684SScott Teel 		return -ENODEV;
746c1988684SScott Teel 	}
747c1988684SScott Teel 	offload_enabled = hdev->offload_enabled;
748c1988684SScott Teel 	spin_unlock_irqrestore(&h->lock, flags);
749c1988684SScott Teel 	return snprintf(buf, 20, "%d\n", offload_enabled);
750c1988684SScott Teel }
751c1988684SScott Teel 
7528270b862SJoe Handzik #define MAX_PATHS 8
7538270b862SJoe Handzik static ssize_t path_info_show(struct device *dev,
7548270b862SJoe Handzik 	     struct device_attribute *attr, char *buf)
7558270b862SJoe Handzik {
7568270b862SJoe Handzik 	struct ctlr_info *h;
7578270b862SJoe Handzik 	struct scsi_device *sdev;
7588270b862SJoe Handzik 	struct hpsa_scsi_dev_t *hdev;
7598270b862SJoe Handzik 	unsigned long flags;
7608270b862SJoe Handzik 	int i;
7618270b862SJoe Handzik 	int output_len = 0;
7628270b862SJoe Handzik 	u8 box;
7638270b862SJoe Handzik 	u8 bay;
7648270b862SJoe Handzik 	u8 path_map_index = 0;
7658270b862SJoe Handzik 	char *active;
7668270b862SJoe Handzik 	unsigned char phys_connector[2];
7678270b862SJoe Handzik 
7688270b862SJoe Handzik 	sdev = to_scsi_device(dev);
7698270b862SJoe Handzik 	h = sdev_to_hba(sdev);
7708270b862SJoe Handzik 	spin_lock_irqsave(&h->devlock, flags);
7718270b862SJoe Handzik 	hdev = sdev->hostdata;
7728270b862SJoe Handzik 	if (!hdev) {
7738270b862SJoe Handzik 		spin_unlock_irqrestore(&h->devlock, flags);
7748270b862SJoe Handzik 		return -ENODEV;
7758270b862SJoe Handzik 	}
7768270b862SJoe Handzik 
7778270b862SJoe Handzik 	bay = hdev->bay;
7788270b862SJoe Handzik 	for (i = 0; i < MAX_PATHS; i++) {
7798270b862SJoe Handzik 		path_map_index = 1<<i;
7808270b862SJoe Handzik 		if (i == hdev->active_path_index)
7818270b862SJoe Handzik 			active = "Active";
7828270b862SJoe Handzik 		else if (hdev->path_map & path_map_index)
7838270b862SJoe Handzik 			active = "Inactive";
7848270b862SJoe Handzik 		else
7858270b862SJoe Handzik 			continue;
7868270b862SJoe Handzik 
7871faf072cSRasmus Villemoes 		output_len += scnprintf(buf + output_len,
7881faf072cSRasmus Villemoes 				PAGE_SIZE - output_len,
7891faf072cSRasmus Villemoes 				"[%d:%d:%d:%d] %20.20s ",
7908270b862SJoe Handzik 				h->scsi_host->host_no,
7918270b862SJoe Handzik 				hdev->bus, hdev->target, hdev->lun,
7928270b862SJoe Handzik 				scsi_device_type(hdev->devtype));
7938270b862SJoe Handzik 
794cca8f13bSDon Brace 		if (hdev->devtype == TYPE_RAID || is_logical_device(hdev)) {
7952708f295SDon Brace 			output_len += scnprintf(buf + output_len,
7961faf072cSRasmus Villemoes 						PAGE_SIZE - output_len,
7971faf072cSRasmus Villemoes 						"%s\n", active);
7988270b862SJoe Handzik 			continue;
7998270b862SJoe Handzik 		}
8008270b862SJoe Handzik 
8018270b862SJoe Handzik 		box = hdev->box[i];
8028270b862SJoe Handzik 		memcpy(&phys_connector, &hdev->phys_connector[i],
8038270b862SJoe Handzik 			sizeof(phys_connector));
8048270b862SJoe Handzik 		if (phys_connector[0] < '0')
8058270b862SJoe Handzik 			phys_connector[0] = '0';
8068270b862SJoe Handzik 		if (phys_connector[1] < '0')
8078270b862SJoe Handzik 			phys_connector[1] = '0';
8082708f295SDon Brace 		output_len += scnprintf(buf + output_len,
8091faf072cSRasmus Villemoes 				PAGE_SIZE - output_len,
8108270b862SJoe Handzik 				"PORT: %.2s ",
8118270b862SJoe Handzik 				phys_connector);
812af15ed36SDon Brace 		if ((hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC) &&
813af15ed36SDon Brace 			hdev->expose_device) {
8148270b862SJoe Handzik 			if (box == 0 || box == 0xFF) {
8152708f295SDon Brace 				output_len += scnprintf(buf + output_len,
8161faf072cSRasmus Villemoes 					PAGE_SIZE - output_len,
8178270b862SJoe Handzik 					"BAY: %hhu %s\n",
8188270b862SJoe Handzik 					bay, active);
8198270b862SJoe Handzik 			} else {
8202708f295SDon Brace 				output_len += scnprintf(buf + output_len,
8211faf072cSRasmus Villemoes 					PAGE_SIZE - output_len,
8228270b862SJoe Handzik 					"BOX: %hhu BAY: %hhu %s\n",
8238270b862SJoe Handzik 					box, bay, active);
8248270b862SJoe Handzik 			}
8258270b862SJoe Handzik 		} else if (box != 0 && box != 0xFF) {
8262708f295SDon Brace 			output_len += scnprintf(buf + output_len,
8271faf072cSRasmus Villemoes 				PAGE_SIZE - output_len, "BOX: %hhu %s\n",
8288270b862SJoe Handzik 				box, active);
8298270b862SJoe Handzik 		} else
8302708f295SDon Brace 			output_len += scnprintf(buf + output_len,
8311faf072cSRasmus Villemoes 				PAGE_SIZE - output_len, "%s\n", active);
8328270b862SJoe Handzik 	}
8338270b862SJoe Handzik 
8348270b862SJoe Handzik 	spin_unlock_irqrestore(&h->devlock, flags);
8351faf072cSRasmus Villemoes 	return output_len;
8368270b862SJoe Handzik }
8378270b862SJoe Handzik 
8383f5eac3aSStephen M. Cameron static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
8393f5eac3aSStephen M. Cameron static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
8403f5eac3aSStephen M. Cameron static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
8413f5eac3aSStephen M. Cameron static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
842c1988684SScott Teel static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO,
843c1988684SScott Teel 			host_show_hp_ssd_smart_path_enabled, NULL);
8448270b862SJoe Handzik static DEVICE_ATTR(path_info, S_IRUGO, path_info_show, NULL);
845da0697bdSScott Teel static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH,
846da0697bdSScott Teel 		host_show_hp_ssd_smart_path_status,
847da0697bdSScott Teel 		host_store_hp_ssd_smart_path_status);
8482ba8bfc8SStephen M. Cameron static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL,
8492ba8bfc8SStephen M. Cameron 			host_store_raid_offload_debug);
8503f5eac3aSStephen M. Cameron static DEVICE_ATTR(firmware_revision, S_IRUGO,
8513f5eac3aSStephen M. Cameron 	host_show_firmware_revision, NULL);
8523f5eac3aSStephen M. Cameron static DEVICE_ATTR(commands_outstanding, S_IRUGO,
8533f5eac3aSStephen M. Cameron 	host_show_commands_outstanding, NULL);
8543f5eac3aSStephen M. Cameron static DEVICE_ATTR(transport_mode, S_IRUGO,
8553f5eac3aSStephen M. Cameron 	host_show_transport_mode, NULL);
856941b1cdaSStephen M. Cameron static DEVICE_ATTR(resettable, S_IRUGO,
857941b1cdaSStephen M. Cameron 	host_show_resettable, NULL);
858e985c58fSStephen Cameron static DEVICE_ATTR(lockup_detected, S_IRUGO,
859e985c58fSStephen Cameron 	host_show_lockup_detected, NULL);
8603f5eac3aSStephen M. Cameron 
8613f5eac3aSStephen M. Cameron static struct device_attribute *hpsa_sdev_attrs[] = {
8623f5eac3aSStephen M. Cameron 	&dev_attr_raid_level,
8633f5eac3aSStephen M. Cameron 	&dev_attr_lunid,
8643f5eac3aSStephen M. Cameron 	&dev_attr_unique_id,
865c1988684SScott Teel 	&dev_attr_hp_ssd_smart_path_enabled,
8668270b862SJoe Handzik 	&dev_attr_path_info,
8673f5eac3aSStephen M. Cameron 	NULL,
8683f5eac3aSStephen M. Cameron };
8693f5eac3aSStephen M. Cameron 
8703f5eac3aSStephen M. Cameron static struct device_attribute *hpsa_shost_attrs[] = {
8713f5eac3aSStephen M. Cameron 	&dev_attr_rescan,
8723f5eac3aSStephen M. Cameron 	&dev_attr_firmware_revision,
8733f5eac3aSStephen M. Cameron 	&dev_attr_commands_outstanding,
8743f5eac3aSStephen M. Cameron 	&dev_attr_transport_mode,
875941b1cdaSStephen M. Cameron 	&dev_attr_resettable,
876da0697bdSScott Teel 	&dev_attr_hp_ssd_smart_path_status,
8772ba8bfc8SStephen M. Cameron 	&dev_attr_raid_offload_debug,
878fb53c439STomas Henzl 	&dev_attr_lockup_detected,
8793f5eac3aSStephen M. Cameron 	NULL,
8803f5eac3aSStephen M. Cameron };
8813f5eac3aSStephen M. Cameron 
88241ce4c35SStephen Cameron #define HPSA_NRESERVED_CMDS	(HPSA_CMDS_RESERVED_FOR_ABORTS + \
88341ce4c35SStephen Cameron 		HPSA_CMDS_RESERVED_FOR_DRIVER + HPSA_MAX_CONCURRENT_PASSTHRUS)
88441ce4c35SStephen Cameron 
8853f5eac3aSStephen M. Cameron static struct scsi_host_template hpsa_driver_template = {
8863f5eac3aSStephen M. Cameron 	.module			= THIS_MODULE,
887f79cfec6SStephen M. Cameron 	.name			= HPSA,
888f79cfec6SStephen M. Cameron 	.proc_name		= HPSA,
8893f5eac3aSStephen M. Cameron 	.queuecommand		= hpsa_scsi_queue_command,
8903f5eac3aSStephen M. Cameron 	.scan_start		= hpsa_scan_start,
8913f5eac3aSStephen M. Cameron 	.scan_finished		= hpsa_scan_finished,
8927c0a0229SDon Brace 	.change_queue_depth	= hpsa_change_queue_depth,
8933f5eac3aSStephen M. Cameron 	.this_id		= -1,
8943f5eac3aSStephen M. Cameron 	.use_clustering		= ENABLE_CLUSTERING,
89575167d2cSStephen M. Cameron 	.eh_abort_handler	= hpsa_eh_abort_handler,
8963f5eac3aSStephen M. Cameron 	.eh_device_reset_handler = hpsa_eh_device_reset_handler,
8973f5eac3aSStephen M. Cameron 	.ioctl			= hpsa_ioctl,
8983f5eac3aSStephen M. Cameron 	.slave_alloc		= hpsa_slave_alloc,
89941ce4c35SStephen Cameron 	.slave_configure	= hpsa_slave_configure,
9003f5eac3aSStephen M. Cameron 	.slave_destroy		= hpsa_slave_destroy,
9013f5eac3aSStephen M. Cameron #ifdef CONFIG_COMPAT
9023f5eac3aSStephen M. Cameron 	.compat_ioctl		= hpsa_compat_ioctl,
9033f5eac3aSStephen M. Cameron #endif
9043f5eac3aSStephen M. Cameron 	.sdev_attrs = hpsa_sdev_attrs,
9053f5eac3aSStephen M. Cameron 	.shost_attrs = hpsa_shost_attrs,
906c0d6a4d1SStephen M. Cameron 	.max_sectors = 8192,
90754b2b50cSMartin K. Petersen 	.no_write_same = 1,
9083f5eac3aSStephen M. Cameron };
9093f5eac3aSStephen M. Cameron 
910254f796bSMatt Gates static inline u32 next_command(struct ctlr_info *h, u8 q)
9113f5eac3aSStephen M. Cameron {
9123f5eac3aSStephen M. Cameron 	u32 a;
913072b0518SStephen M. Cameron 	struct reply_queue_buffer *rq = &h->reply_queue[q];
9143f5eac3aSStephen M. Cameron 
915e1f7de0cSMatt Gates 	if (h->transMethod & CFGTBL_Trans_io_accel1)
916e1f7de0cSMatt Gates 		return h->access.command_completed(h, q);
917e1f7de0cSMatt Gates 
9183f5eac3aSStephen M. Cameron 	if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
919254f796bSMatt Gates 		return h->access.command_completed(h, q);
9203f5eac3aSStephen M. Cameron 
921254f796bSMatt Gates 	if ((rq->head[rq->current_entry] & 1) == rq->wraparound) {
922254f796bSMatt Gates 		a = rq->head[rq->current_entry];
923254f796bSMatt Gates 		rq->current_entry++;
9240cbf768eSStephen M. Cameron 		atomic_dec(&h->commands_outstanding);
9253f5eac3aSStephen M. Cameron 	} else {
9263f5eac3aSStephen M. Cameron 		a = FIFO_EMPTY;
9273f5eac3aSStephen M. Cameron 	}
9283f5eac3aSStephen M. Cameron 	/* Check for wraparound */
929254f796bSMatt Gates 	if (rq->current_entry == h->max_commands) {
930254f796bSMatt Gates 		rq->current_entry = 0;
931254f796bSMatt Gates 		rq->wraparound ^= 1;
9323f5eac3aSStephen M. Cameron 	}
9333f5eac3aSStephen M. Cameron 	return a;
9343f5eac3aSStephen M. Cameron }
9353f5eac3aSStephen M. Cameron 
936c349775eSScott Teel /*
937c349775eSScott Teel  * There are some special bits in the bus address of the
938c349775eSScott Teel  * command that we have to set for the controller to know
939c349775eSScott Teel  * how to process the command:
940c349775eSScott Teel  *
941c349775eSScott Teel  * Normal performant mode:
942c349775eSScott Teel  * bit 0: 1 means performant mode, 0 means simple mode.
943c349775eSScott Teel  * bits 1-3 = block fetch table entry
944c349775eSScott Teel  * bits 4-6 = command type (== 0)
945c349775eSScott Teel  *
946c349775eSScott Teel  * ioaccel1 mode:
947c349775eSScott Teel  * bit 0 = "performant mode" bit.
948c349775eSScott Teel  * bits 1-3 = block fetch table entry
949c349775eSScott Teel  * bits 4-6 = command type (== 110)
950c349775eSScott Teel  * (command type is needed because ioaccel1 mode
951c349775eSScott Teel  * commands are submitted through the same register as normal
952c349775eSScott Teel  * mode commands, so this is how the controller knows whether
953c349775eSScott Teel  * the command is normal mode or ioaccel1 mode.)
954c349775eSScott Teel  *
955c349775eSScott Teel  * ioaccel2 mode:
956c349775eSScott Teel  * bit 0 = "performant mode" bit.
957c349775eSScott Teel  * bits 1-4 = block fetch table entry (note extra bit)
958c349775eSScott Teel  * bits 4-6 = not needed, because ioaccel2 mode has
959c349775eSScott Teel  * a separate special register for submitting commands.
960c349775eSScott Teel  */
961c349775eSScott Teel 
96225163bd5SWebb Scales /*
96325163bd5SWebb Scales  * set_performant_mode: Modify the tag for cciss performant
9643f5eac3aSStephen M. Cameron  * set bit 0 for pull model, bits 3-1 for block fetch
9653f5eac3aSStephen M. Cameron  * register number
9663f5eac3aSStephen M. Cameron  */
96725163bd5SWebb Scales #define DEFAULT_REPLY_QUEUE (-1)
96825163bd5SWebb Scales static void set_performant_mode(struct ctlr_info *h, struct CommandList *c,
96925163bd5SWebb Scales 					int reply_queue)
9703f5eac3aSStephen M. Cameron {
971254f796bSMatt Gates 	if (likely(h->transMethod & CFGTBL_Trans_Performant)) {
9723f5eac3aSStephen M. Cameron 		c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
97325163bd5SWebb Scales 		if (unlikely(!h->msix_vector))
97425163bd5SWebb Scales 			return;
97525163bd5SWebb Scales 		if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
976254f796bSMatt Gates 			c->Header.ReplyQueue =
977804a5cb5SJohn Kacur 				raw_smp_processor_id() % h->nreply_queues;
97825163bd5SWebb Scales 		else
97925163bd5SWebb Scales 			c->Header.ReplyQueue = reply_queue % h->nreply_queues;
980254f796bSMatt Gates 	}
9813f5eac3aSStephen M. Cameron }
9823f5eac3aSStephen M. Cameron 
983c349775eSScott Teel static void set_ioaccel1_performant_mode(struct ctlr_info *h,
98425163bd5SWebb Scales 						struct CommandList *c,
98525163bd5SWebb Scales 						int reply_queue)
986c349775eSScott Teel {
987c349775eSScott Teel 	struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
988c349775eSScott Teel 
98925163bd5SWebb Scales 	/*
99025163bd5SWebb Scales 	 * Tell the controller to post the reply to the queue for this
991c349775eSScott Teel 	 * processor.  This seems to give the best I/O throughput.
992c349775eSScott Teel 	 */
99325163bd5SWebb Scales 	if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
994c349775eSScott Teel 		cp->ReplyQueue = smp_processor_id() % h->nreply_queues;
99525163bd5SWebb Scales 	else
99625163bd5SWebb Scales 		cp->ReplyQueue = reply_queue % h->nreply_queues;
99725163bd5SWebb Scales 	/*
99825163bd5SWebb Scales 	 * Set the bits in the address sent down to include:
999c349775eSScott Teel 	 *  - performant mode bit (bit 0)
1000c349775eSScott Teel 	 *  - pull count (bits 1-3)
1001c349775eSScott Teel 	 *  - command type (bits 4-6)
1002c349775eSScott Teel 	 */
1003c349775eSScott Teel 	c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) |
1004c349775eSScott Teel 					IOACCEL1_BUSADDR_CMDTYPE;
1005c349775eSScott Teel }
1006c349775eSScott Teel 
10078be986ccSStephen Cameron static void set_ioaccel2_tmf_performant_mode(struct ctlr_info *h,
10088be986ccSStephen Cameron 						struct CommandList *c,
10098be986ccSStephen Cameron 						int reply_queue)
10108be986ccSStephen Cameron {
10118be986ccSStephen Cameron 	struct hpsa_tmf_struct *cp = (struct hpsa_tmf_struct *)
10128be986ccSStephen Cameron 		&h->ioaccel2_cmd_pool[c->cmdindex];
10138be986ccSStephen Cameron 
10148be986ccSStephen Cameron 	/* Tell the controller to post the reply to the queue for this
10158be986ccSStephen Cameron 	 * processor.  This seems to give the best I/O throughput.
10168be986ccSStephen Cameron 	 */
10178be986ccSStephen Cameron 	if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
10188be986ccSStephen Cameron 		cp->reply_queue = smp_processor_id() % h->nreply_queues;
10198be986ccSStephen Cameron 	else
10208be986ccSStephen Cameron 		cp->reply_queue = reply_queue % h->nreply_queues;
10218be986ccSStephen Cameron 	/* Set the bits in the address sent down to include:
10228be986ccSStephen Cameron 	 *  - performant mode bit not used in ioaccel mode 2
10238be986ccSStephen Cameron 	 *  - pull count (bits 0-3)
10248be986ccSStephen Cameron 	 *  - command type isn't needed for ioaccel2
10258be986ccSStephen Cameron 	 */
10268be986ccSStephen Cameron 	c->busaddr |= h->ioaccel2_blockFetchTable[0];
10278be986ccSStephen Cameron }
10288be986ccSStephen Cameron 
1029c349775eSScott Teel static void set_ioaccel2_performant_mode(struct ctlr_info *h,
103025163bd5SWebb Scales 						struct CommandList *c,
103125163bd5SWebb Scales 						int reply_queue)
1032c349775eSScott Teel {
1033c349775eSScott Teel 	struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
1034c349775eSScott Teel 
103525163bd5SWebb Scales 	/*
103625163bd5SWebb Scales 	 * Tell the controller to post the reply to the queue for this
1037c349775eSScott Teel 	 * processor.  This seems to give the best I/O throughput.
1038c349775eSScott Teel 	 */
103925163bd5SWebb Scales 	if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
1040c349775eSScott Teel 		cp->reply_queue = smp_processor_id() % h->nreply_queues;
104125163bd5SWebb Scales 	else
104225163bd5SWebb Scales 		cp->reply_queue = reply_queue % h->nreply_queues;
104325163bd5SWebb Scales 	/*
104425163bd5SWebb Scales 	 * Set the bits in the address sent down to include:
1045c349775eSScott Teel 	 *  - performant mode bit not used in ioaccel mode 2
1046c349775eSScott Teel 	 *  - pull count (bits 0-3)
1047c349775eSScott Teel 	 *  - command type isn't needed for ioaccel2
1048c349775eSScott Teel 	 */
1049c349775eSScott Teel 	c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]);
1050c349775eSScott Teel }
1051c349775eSScott Teel 
1052e85c5974SStephen M. Cameron static int is_firmware_flash_cmd(u8 *cdb)
1053e85c5974SStephen M. Cameron {
1054e85c5974SStephen M. Cameron 	return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE;
1055e85c5974SStephen M. Cameron }
1056e85c5974SStephen M. Cameron 
1057e85c5974SStephen M. Cameron /*
1058e85c5974SStephen M. Cameron  * During firmware flash, the heartbeat register may not update as frequently
1059e85c5974SStephen M. Cameron  * as it should.  So we dial down lockup detection during firmware flash. and
1060e85c5974SStephen M. Cameron  * dial it back up when firmware flash completes.
1061e85c5974SStephen M. Cameron  */
1062e85c5974SStephen M. Cameron #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ)
1063e85c5974SStephen M. Cameron #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ)
1064e85c5974SStephen M. Cameron static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h,
1065e85c5974SStephen M. Cameron 		struct CommandList *c)
1066e85c5974SStephen M. Cameron {
1067e85c5974SStephen M. Cameron 	if (!is_firmware_flash_cmd(c->Request.CDB))
1068e85c5974SStephen M. Cameron 		return;
1069e85c5974SStephen M. Cameron 	atomic_inc(&h->firmware_flash_in_progress);
1070e85c5974SStephen M. Cameron 	h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH;
1071e85c5974SStephen M. Cameron }
1072e85c5974SStephen M. Cameron 
1073e85c5974SStephen M. Cameron static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h,
1074e85c5974SStephen M. Cameron 		struct CommandList *c)
1075e85c5974SStephen M. Cameron {
1076e85c5974SStephen M. Cameron 	if (is_firmware_flash_cmd(c->Request.CDB) &&
1077e85c5974SStephen M. Cameron 		atomic_dec_and_test(&h->firmware_flash_in_progress))
1078e85c5974SStephen M. Cameron 		h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
1079e85c5974SStephen M. Cameron }
1080e85c5974SStephen M. Cameron 
108125163bd5SWebb Scales static void __enqueue_cmd_and_start_io(struct ctlr_info *h,
108225163bd5SWebb Scales 	struct CommandList *c, int reply_queue)
10833f5eac3aSStephen M. Cameron {
1084c05e8866SStephen Cameron 	dial_down_lockup_detection_during_fw_flash(h, c);
1085c05e8866SStephen Cameron 	atomic_inc(&h->commands_outstanding);
1086c349775eSScott Teel 	switch (c->cmd_type) {
1087c349775eSScott Teel 	case CMD_IOACCEL1:
108825163bd5SWebb Scales 		set_ioaccel1_performant_mode(h, c, reply_queue);
1089c05e8866SStephen Cameron 		writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);
1090c349775eSScott Teel 		break;
1091c349775eSScott Teel 	case CMD_IOACCEL2:
109225163bd5SWebb Scales 		set_ioaccel2_performant_mode(h, c, reply_queue);
1093c05e8866SStephen Cameron 		writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
1094c349775eSScott Teel 		break;
10958be986ccSStephen Cameron 	case IOACCEL2_TMF:
10968be986ccSStephen Cameron 		set_ioaccel2_tmf_performant_mode(h, c, reply_queue);
10978be986ccSStephen Cameron 		writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
10988be986ccSStephen Cameron 		break;
1099c349775eSScott Teel 	default:
110025163bd5SWebb Scales 		set_performant_mode(h, c, reply_queue);
1101f2405db8SDon Brace 		h->access.submit_command(h, c);
11023f5eac3aSStephen M. Cameron 	}
1103c05e8866SStephen Cameron }
11043f5eac3aSStephen M. Cameron 
1105a58e7e53SWebb Scales static void enqueue_cmd_and_start_io(struct ctlr_info *h, struct CommandList *c)
110625163bd5SWebb Scales {
1107d604f533SWebb Scales 	if (unlikely(hpsa_is_pending_event(c)))
1108a58e7e53SWebb Scales 		return finish_cmd(c);
1109a58e7e53SWebb Scales 
111025163bd5SWebb Scales 	__enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE);
111125163bd5SWebb Scales }
111225163bd5SWebb Scales 
11133f5eac3aSStephen M. Cameron static inline int is_hba_lunid(unsigned char scsi3addr[])
11143f5eac3aSStephen M. Cameron {
11153f5eac3aSStephen M. Cameron 	return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
11163f5eac3aSStephen M. Cameron }
11173f5eac3aSStephen M. Cameron 
11183f5eac3aSStephen M. Cameron static inline int is_scsi_rev_5(struct ctlr_info *h)
11193f5eac3aSStephen M. Cameron {
11203f5eac3aSStephen M. Cameron 	if (!h->hba_inquiry_data)
11213f5eac3aSStephen M. Cameron 		return 0;
11223f5eac3aSStephen M. Cameron 	if ((h->hba_inquiry_data[2] & 0x07) == 5)
11233f5eac3aSStephen M. Cameron 		return 1;
11243f5eac3aSStephen M. Cameron 	return 0;
11253f5eac3aSStephen M. Cameron }
11263f5eac3aSStephen M. Cameron 
1127edd16368SStephen M. Cameron static int hpsa_find_target_lun(struct ctlr_info *h,
1128edd16368SStephen M. Cameron 	unsigned char scsi3addr[], int bus, int *target, int *lun)
1129edd16368SStephen M. Cameron {
1130edd16368SStephen M. Cameron 	/* finds an unused bus, target, lun for a new physical device
1131edd16368SStephen M. Cameron 	 * assumes h->devlock is held
1132edd16368SStephen M. Cameron 	 */
1133edd16368SStephen M. Cameron 	int i, found = 0;
1134cfe5badcSScott Teel 	DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
1135edd16368SStephen M. Cameron 
1136263d9401SAkinobu Mita 	bitmap_zero(lun_taken, HPSA_MAX_DEVICES);
1137edd16368SStephen M. Cameron 
1138edd16368SStephen M. Cameron 	for (i = 0; i < h->ndevices; i++) {
1139edd16368SStephen M. Cameron 		if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
1140263d9401SAkinobu Mita 			__set_bit(h->dev[i]->target, lun_taken);
1141edd16368SStephen M. Cameron 	}
1142edd16368SStephen M. Cameron 
1143263d9401SAkinobu Mita 	i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES);
1144263d9401SAkinobu Mita 	if (i < HPSA_MAX_DEVICES) {
1145edd16368SStephen M. Cameron 		/* *bus = 1; */
1146edd16368SStephen M. Cameron 		*target = i;
1147edd16368SStephen M. Cameron 		*lun = 0;
1148edd16368SStephen M. Cameron 		found = 1;
1149edd16368SStephen M. Cameron 	}
1150edd16368SStephen M. Cameron 	return !found;
1151edd16368SStephen M. Cameron }
1152edd16368SStephen M. Cameron 
11531d33d85dSDon Brace static void hpsa_show_dev_msg(const char *level, struct ctlr_info *h,
11540d96ef5fSWebb Scales 	struct hpsa_scsi_dev_t *dev, char *description)
11550d96ef5fSWebb Scales {
11567c59a0d4SDon Brace #define LABEL_SIZE 25
11577c59a0d4SDon Brace 	char label[LABEL_SIZE];
11587c59a0d4SDon Brace 
11599975ec9dSDon Brace 	if (h == NULL || h->pdev == NULL || h->scsi_host == NULL)
11609975ec9dSDon Brace 		return;
11619975ec9dSDon Brace 
11627c59a0d4SDon Brace 	switch (dev->devtype) {
11637c59a0d4SDon Brace 	case TYPE_RAID:
11647c59a0d4SDon Brace 		snprintf(label, LABEL_SIZE, "controller");
11657c59a0d4SDon Brace 		break;
11667c59a0d4SDon Brace 	case TYPE_ENCLOSURE:
11677c59a0d4SDon Brace 		snprintf(label, LABEL_SIZE, "enclosure");
11687c59a0d4SDon Brace 		break;
11697c59a0d4SDon Brace 	case TYPE_DISK:
1170af15ed36SDon Brace 	case TYPE_ZBC:
11717c59a0d4SDon Brace 		if (dev->external)
11727c59a0d4SDon Brace 			snprintf(label, LABEL_SIZE, "external");
11737c59a0d4SDon Brace 		else if (!is_logical_dev_addr_mode(dev->scsi3addr))
11747c59a0d4SDon Brace 			snprintf(label, LABEL_SIZE, "%s",
11757c59a0d4SDon Brace 				raid_label[PHYSICAL_DRIVE]);
11767c59a0d4SDon Brace 		else
11777c59a0d4SDon Brace 			snprintf(label, LABEL_SIZE, "RAID-%s",
11787c59a0d4SDon Brace 				dev->raid_level > RAID_UNKNOWN ? "?" :
11797c59a0d4SDon Brace 				raid_label[dev->raid_level]);
11807c59a0d4SDon Brace 		break;
11817c59a0d4SDon Brace 	case TYPE_ROM:
11827c59a0d4SDon Brace 		snprintf(label, LABEL_SIZE, "rom");
11837c59a0d4SDon Brace 		break;
11847c59a0d4SDon Brace 	case TYPE_TAPE:
11857c59a0d4SDon Brace 		snprintf(label, LABEL_SIZE, "tape");
11867c59a0d4SDon Brace 		break;
11877c59a0d4SDon Brace 	case TYPE_MEDIUM_CHANGER:
11887c59a0d4SDon Brace 		snprintf(label, LABEL_SIZE, "changer");
11897c59a0d4SDon Brace 		break;
11907c59a0d4SDon Brace 	default:
11917c59a0d4SDon Brace 		snprintf(label, LABEL_SIZE, "UNKNOWN");
11927c59a0d4SDon Brace 		break;
11937c59a0d4SDon Brace 	}
11947c59a0d4SDon Brace 
11950d96ef5fSWebb Scales 	dev_printk(level, &h->pdev->dev,
11967c59a0d4SDon Brace 			"scsi %d:%d:%d:%d: %s %s %.8s %.16s %s SSDSmartPathCap%c En%c Exp=%d\n",
11970d96ef5fSWebb Scales 			h->scsi_host->host_no, dev->bus, dev->target, dev->lun,
11980d96ef5fSWebb Scales 			description,
11990d96ef5fSWebb Scales 			scsi_device_type(dev->devtype),
12000d96ef5fSWebb Scales 			dev->vendor,
12010d96ef5fSWebb Scales 			dev->model,
12027c59a0d4SDon Brace 			label,
12030d96ef5fSWebb Scales 			dev->offload_config ? '+' : '-',
12040d96ef5fSWebb Scales 			dev->offload_enabled ? '+' : '-',
12052a168208SKevin Barnett 			dev->expose_device);
12060d96ef5fSWebb Scales }
12070d96ef5fSWebb Scales 
1208edd16368SStephen M. Cameron /* Add an entry into h->dev[] array. */
12098aa60681SDon Brace static int hpsa_scsi_add_entry(struct ctlr_info *h,
1210edd16368SStephen M. Cameron 		struct hpsa_scsi_dev_t *device,
1211edd16368SStephen M. Cameron 		struct hpsa_scsi_dev_t *added[], int *nadded)
1212edd16368SStephen M. Cameron {
1213edd16368SStephen M. Cameron 	/* assumes h->devlock is held */
1214edd16368SStephen M. Cameron 	int n = h->ndevices;
1215edd16368SStephen M. Cameron 	int i;
1216edd16368SStephen M. Cameron 	unsigned char addr1[8], addr2[8];
1217edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *sd;
1218edd16368SStephen M. Cameron 
1219cfe5badcSScott Teel 	if (n >= HPSA_MAX_DEVICES) {
1220edd16368SStephen M. Cameron 		dev_err(&h->pdev->dev, "too many devices, some will be "
1221edd16368SStephen M. Cameron 			"inaccessible.\n");
1222edd16368SStephen M. Cameron 		return -1;
1223edd16368SStephen M. Cameron 	}
1224edd16368SStephen M. Cameron 
1225edd16368SStephen M. Cameron 	/* physical devices do not have lun or target assigned until now. */
1226edd16368SStephen M. Cameron 	if (device->lun != -1)
1227edd16368SStephen M. Cameron 		/* Logical device, lun is already assigned. */
1228edd16368SStephen M. Cameron 		goto lun_assigned;
1229edd16368SStephen M. Cameron 
1230edd16368SStephen M. Cameron 	/* If this device a non-zero lun of a multi-lun device
1231edd16368SStephen M. Cameron 	 * byte 4 of the 8-byte LUN addr will contain the logical
12322b08b3e9SDon Brace 	 * unit no, zero otherwise.
1233edd16368SStephen M. Cameron 	 */
1234edd16368SStephen M. Cameron 	if (device->scsi3addr[4] == 0) {
1235edd16368SStephen M. Cameron 		/* This is not a non-zero lun of a multi-lun device */
1236edd16368SStephen M. Cameron 		if (hpsa_find_target_lun(h, device->scsi3addr,
1237edd16368SStephen M. Cameron 			device->bus, &device->target, &device->lun) != 0)
1238edd16368SStephen M. Cameron 			return -1;
1239edd16368SStephen M. Cameron 		goto lun_assigned;
1240edd16368SStephen M. Cameron 	}
1241edd16368SStephen M. Cameron 
1242edd16368SStephen M. Cameron 	/* This is a non-zero lun of a multi-lun device.
1243edd16368SStephen M. Cameron 	 * Search through our list and find the device which
12449a4178b7Sshane.seymour 	 * has the same 8 byte LUN address, excepting byte 4 and 5.
1245edd16368SStephen M. Cameron 	 * Assign the same bus and target for this new LUN.
1246edd16368SStephen M. Cameron 	 * Use the logical unit number from the firmware.
1247edd16368SStephen M. Cameron 	 */
1248edd16368SStephen M. Cameron 	memcpy(addr1, device->scsi3addr, 8);
1249edd16368SStephen M. Cameron 	addr1[4] = 0;
12509a4178b7Sshane.seymour 	addr1[5] = 0;
1251edd16368SStephen M. Cameron 	for (i = 0; i < n; i++) {
1252edd16368SStephen M. Cameron 		sd = h->dev[i];
1253edd16368SStephen M. Cameron 		memcpy(addr2, sd->scsi3addr, 8);
1254edd16368SStephen M. Cameron 		addr2[4] = 0;
12559a4178b7Sshane.seymour 		addr2[5] = 0;
12569a4178b7Sshane.seymour 		/* differ only in byte 4 and 5? */
1257edd16368SStephen M. Cameron 		if (memcmp(addr1, addr2, 8) == 0) {
1258edd16368SStephen M. Cameron 			device->bus = sd->bus;
1259edd16368SStephen M. Cameron 			device->target = sd->target;
1260edd16368SStephen M. Cameron 			device->lun = device->scsi3addr[4];
1261edd16368SStephen M. Cameron 			break;
1262edd16368SStephen M. Cameron 		}
1263edd16368SStephen M. Cameron 	}
1264edd16368SStephen M. Cameron 	if (device->lun == -1) {
1265edd16368SStephen M. Cameron 		dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
1266edd16368SStephen M. Cameron 			" suspect firmware bug or unsupported hardware "
1267edd16368SStephen M. Cameron 			"configuration.\n");
1268edd16368SStephen M. Cameron 			return -1;
1269edd16368SStephen M. Cameron 	}
1270edd16368SStephen M. Cameron 
1271edd16368SStephen M. Cameron lun_assigned:
1272edd16368SStephen M. Cameron 
1273edd16368SStephen M. Cameron 	h->dev[n] = device;
1274edd16368SStephen M. Cameron 	h->ndevices++;
1275edd16368SStephen M. Cameron 	added[*nadded] = device;
1276edd16368SStephen M. Cameron 	(*nadded)++;
12770d96ef5fSWebb Scales 	hpsa_show_dev_msg(KERN_INFO, h, device,
12782a168208SKevin Barnett 		device->expose_device ? "added" : "masked");
1279a473d86cSRobert Elliott 	device->offload_to_be_enabled = device->offload_enabled;
1280a473d86cSRobert Elliott 	device->offload_enabled = 0;
1281edd16368SStephen M. Cameron 	return 0;
1282edd16368SStephen M. Cameron }
1283edd16368SStephen M. Cameron 
1284bd9244f7SScott Teel /* Update an entry in h->dev[] array. */
12858aa60681SDon Brace static void hpsa_scsi_update_entry(struct ctlr_info *h,
1286bd9244f7SScott Teel 	int entry, struct hpsa_scsi_dev_t *new_entry)
1287bd9244f7SScott Teel {
1288a473d86cSRobert Elliott 	int offload_enabled;
1289bd9244f7SScott Teel 	/* assumes h->devlock is held */
1290bd9244f7SScott Teel 	BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1291bd9244f7SScott Teel 
1292bd9244f7SScott Teel 	/* Raid level changed. */
1293bd9244f7SScott Teel 	h->dev[entry]->raid_level = new_entry->raid_level;
1294250fb125SStephen M. Cameron 
129503383736SDon Brace 	/* Raid offload parameters changed.  Careful about the ordering. */
129603383736SDon Brace 	if (new_entry->offload_config && new_entry->offload_enabled) {
129703383736SDon Brace 		/*
129803383736SDon Brace 		 * if drive is newly offload_enabled, we want to copy the
129903383736SDon Brace 		 * raid map data first.  If previously offload_enabled and
130003383736SDon Brace 		 * offload_config were set, raid map data had better be
130103383736SDon Brace 		 * the same as it was before.  if raid map data is changed
130203383736SDon Brace 		 * then it had better be the case that
130303383736SDon Brace 		 * h->dev[entry]->offload_enabled is currently 0.
130403383736SDon Brace 		 */
13059fb0de2dSStephen M. Cameron 		h->dev[entry]->raid_map = new_entry->raid_map;
130603383736SDon Brace 		h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
130703383736SDon Brace 	}
1308a3144e0bSJoe Handzik 	if (new_entry->hba_ioaccel_enabled) {
1309a3144e0bSJoe Handzik 		h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1310a3144e0bSJoe Handzik 		wmb(); /* set ioaccel_handle *before* hba_ioaccel_enabled */
1311a3144e0bSJoe Handzik 	}
1312a3144e0bSJoe Handzik 	h->dev[entry]->hba_ioaccel_enabled = new_entry->hba_ioaccel_enabled;
131303383736SDon Brace 	h->dev[entry]->offload_config = new_entry->offload_config;
131403383736SDon Brace 	h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror;
131503383736SDon Brace 	h->dev[entry]->queue_depth = new_entry->queue_depth;
1316250fb125SStephen M. Cameron 
131741ce4c35SStephen Cameron 	/*
131841ce4c35SStephen Cameron 	 * We can turn off ioaccel offload now, but need to delay turning
131941ce4c35SStephen Cameron 	 * it on until we can update h->dev[entry]->phys_disk[], but we
132041ce4c35SStephen Cameron 	 * can't do that until all the devices are updated.
132141ce4c35SStephen Cameron 	 */
132241ce4c35SStephen Cameron 	h->dev[entry]->offload_to_be_enabled = new_entry->offload_enabled;
132341ce4c35SStephen Cameron 	if (!new_entry->offload_enabled)
132441ce4c35SStephen Cameron 		h->dev[entry]->offload_enabled = 0;
132541ce4c35SStephen Cameron 
1326a473d86cSRobert Elliott 	offload_enabled = h->dev[entry]->offload_enabled;
1327a473d86cSRobert Elliott 	h->dev[entry]->offload_enabled = h->dev[entry]->offload_to_be_enabled;
13280d96ef5fSWebb Scales 	hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated");
1329a473d86cSRobert Elliott 	h->dev[entry]->offload_enabled = offload_enabled;
1330bd9244f7SScott Teel }
1331bd9244f7SScott Teel 
13322a8ccf31SStephen M. Cameron /* Replace an entry from h->dev[] array. */
13338aa60681SDon Brace static void hpsa_scsi_replace_entry(struct ctlr_info *h,
13342a8ccf31SStephen M. Cameron 	int entry, struct hpsa_scsi_dev_t *new_entry,
13352a8ccf31SStephen M. Cameron 	struct hpsa_scsi_dev_t *added[], int *nadded,
13362a8ccf31SStephen M. Cameron 	struct hpsa_scsi_dev_t *removed[], int *nremoved)
13372a8ccf31SStephen M. Cameron {
13382a8ccf31SStephen M. Cameron 	/* assumes h->devlock is held */
1339cfe5badcSScott Teel 	BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
13402a8ccf31SStephen M. Cameron 	removed[*nremoved] = h->dev[entry];
13412a8ccf31SStephen M. Cameron 	(*nremoved)++;
134201350d05SStephen M. Cameron 
134301350d05SStephen M. Cameron 	/*
134401350d05SStephen M. Cameron 	 * New physical devices won't have target/lun assigned yet
134501350d05SStephen M. Cameron 	 * so we need to preserve the values in the slot we are replacing.
134601350d05SStephen M. Cameron 	 */
134701350d05SStephen M. Cameron 	if (new_entry->target == -1) {
134801350d05SStephen M. Cameron 		new_entry->target = h->dev[entry]->target;
134901350d05SStephen M. Cameron 		new_entry->lun = h->dev[entry]->lun;
135001350d05SStephen M. Cameron 	}
135101350d05SStephen M. Cameron 
13522a8ccf31SStephen M. Cameron 	h->dev[entry] = new_entry;
13532a8ccf31SStephen M. Cameron 	added[*nadded] = new_entry;
13542a8ccf31SStephen M. Cameron 	(*nadded)++;
13550d96ef5fSWebb Scales 	hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced");
1356a473d86cSRobert Elliott 	new_entry->offload_to_be_enabled = new_entry->offload_enabled;
1357a473d86cSRobert Elliott 	new_entry->offload_enabled = 0;
13582a8ccf31SStephen M. Cameron }
13592a8ccf31SStephen M. Cameron 
1360edd16368SStephen M. Cameron /* Remove an entry from h->dev[] array. */
13618aa60681SDon Brace static void hpsa_scsi_remove_entry(struct ctlr_info *h, int entry,
1362edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *removed[], int *nremoved)
1363edd16368SStephen M. Cameron {
1364edd16368SStephen M. Cameron 	/* assumes h->devlock is held */
1365edd16368SStephen M. Cameron 	int i;
1366edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *sd;
1367edd16368SStephen M. Cameron 
1368cfe5badcSScott Teel 	BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1369edd16368SStephen M. Cameron 
1370edd16368SStephen M. Cameron 	sd = h->dev[entry];
1371edd16368SStephen M. Cameron 	removed[*nremoved] = h->dev[entry];
1372edd16368SStephen M. Cameron 	(*nremoved)++;
1373edd16368SStephen M. Cameron 
1374edd16368SStephen M. Cameron 	for (i = entry; i < h->ndevices-1; i++)
1375edd16368SStephen M. Cameron 		h->dev[i] = h->dev[i+1];
1376edd16368SStephen M. Cameron 	h->ndevices--;
13770d96ef5fSWebb Scales 	hpsa_show_dev_msg(KERN_INFO, h, sd, "removed");
1378edd16368SStephen M. Cameron }
1379edd16368SStephen M. Cameron 
1380edd16368SStephen M. Cameron #define SCSI3ADDR_EQ(a, b) ( \
1381edd16368SStephen M. Cameron 	(a)[7] == (b)[7] && \
1382edd16368SStephen M. Cameron 	(a)[6] == (b)[6] && \
1383edd16368SStephen M. Cameron 	(a)[5] == (b)[5] && \
1384edd16368SStephen M. Cameron 	(a)[4] == (b)[4] && \
1385edd16368SStephen M. Cameron 	(a)[3] == (b)[3] && \
1386edd16368SStephen M. Cameron 	(a)[2] == (b)[2] && \
1387edd16368SStephen M. Cameron 	(a)[1] == (b)[1] && \
1388edd16368SStephen M. Cameron 	(a)[0] == (b)[0])
1389edd16368SStephen M. Cameron 
1390edd16368SStephen M. Cameron static void fixup_botched_add(struct ctlr_info *h,
1391edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *added)
1392edd16368SStephen M. Cameron {
1393edd16368SStephen M. Cameron 	/* called when scsi_add_device fails in order to re-adjust
1394edd16368SStephen M. Cameron 	 * h->dev[] to match the mid layer's view.
1395edd16368SStephen M. Cameron 	 */
1396edd16368SStephen M. Cameron 	unsigned long flags;
1397edd16368SStephen M. Cameron 	int i, j;
1398edd16368SStephen M. Cameron 
1399edd16368SStephen M. Cameron 	spin_lock_irqsave(&h->lock, flags);
1400edd16368SStephen M. Cameron 	for (i = 0; i < h->ndevices; i++) {
1401edd16368SStephen M. Cameron 		if (h->dev[i] == added) {
1402edd16368SStephen M. Cameron 			for (j = i; j < h->ndevices-1; j++)
1403edd16368SStephen M. Cameron 				h->dev[j] = h->dev[j+1];
1404edd16368SStephen M. Cameron 			h->ndevices--;
1405edd16368SStephen M. Cameron 			break;
1406edd16368SStephen M. Cameron 		}
1407edd16368SStephen M. Cameron 	}
1408edd16368SStephen M. Cameron 	spin_unlock_irqrestore(&h->lock, flags);
1409edd16368SStephen M. Cameron 	kfree(added);
1410edd16368SStephen M. Cameron }
1411edd16368SStephen M. Cameron 
1412edd16368SStephen M. Cameron static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
1413edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *dev2)
1414edd16368SStephen M. Cameron {
1415edd16368SStephen M. Cameron 	/* we compare everything except lun and target as these
1416edd16368SStephen M. Cameron 	 * are not yet assigned.  Compare parts likely
1417edd16368SStephen M. Cameron 	 * to differ first
1418edd16368SStephen M. Cameron 	 */
1419edd16368SStephen M. Cameron 	if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
1420edd16368SStephen M. Cameron 		sizeof(dev1->scsi3addr)) != 0)
1421edd16368SStephen M. Cameron 		return 0;
1422edd16368SStephen M. Cameron 	if (memcmp(dev1->device_id, dev2->device_id,
1423edd16368SStephen M. Cameron 		sizeof(dev1->device_id)) != 0)
1424edd16368SStephen M. Cameron 		return 0;
1425edd16368SStephen M. Cameron 	if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
1426edd16368SStephen M. Cameron 		return 0;
1427edd16368SStephen M. Cameron 	if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
1428edd16368SStephen M. Cameron 		return 0;
1429edd16368SStephen M. Cameron 	if (dev1->devtype != dev2->devtype)
1430edd16368SStephen M. Cameron 		return 0;
1431edd16368SStephen M. Cameron 	if (dev1->bus != dev2->bus)
1432edd16368SStephen M. Cameron 		return 0;
1433edd16368SStephen M. Cameron 	return 1;
1434edd16368SStephen M. Cameron }
1435edd16368SStephen M. Cameron 
1436bd9244f7SScott Teel static inline int device_updated(struct hpsa_scsi_dev_t *dev1,
1437bd9244f7SScott Teel 	struct hpsa_scsi_dev_t *dev2)
1438bd9244f7SScott Teel {
1439bd9244f7SScott Teel 	/* Device attributes that can change, but don't mean
1440bd9244f7SScott Teel 	 * that the device is a different device, nor that the OS
1441bd9244f7SScott Teel 	 * needs to be told anything about the change.
1442bd9244f7SScott Teel 	 */
1443bd9244f7SScott Teel 	if (dev1->raid_level != dev2->raid_level)
1444bd9244f7SScott Teel 		return 1;
1445250fb125SStephen M. Cameron 	if (dev1->offload_config != dev2->offload_config)
1446250fb125SStephen M. Cameron 		return 1;
1447250fb125SStephen M. Cameron 	if (dev1->offload_enabled != dev2->offload_enabled)
1448250fb125SStephen M. Cameron 		return 1;
144993849508SDon Brace 	if (!is_logical_dev_addr_mode(dev1->scsi3addr))
145003383736SDon Brace 		if (dev1->queue_depth != dev2->queue_depth)
145103383736SDon Brace 			return 1;
1452bd9244f7SScott Teel 	return 0;
1453bd9244f7SScott Teel }
1454bd9244f7SScott Teel 
1455edd16368SStephen M. Cameron /* Find needle in haystack.  If exact match found, return DEVICE_SAME,
1456edd16368SStephen M. Cameron  * and return needle location in *index.  If scsi3addr matches, but not
1457edd16368SStephen M. Cameron  * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
1458bd9244f7SScott Teel  * location in *index.
1459bd9244f7SScott Teel  * In the case of a minor device attribute change, such as RAID level, just
1460bd9244f7SScott Teel  * return DEVICE_UPDATED, along with the updated device's location in index.
1461bd9244f7SScott Teel  * If needle not found, return DEVICE_NOT_FOUND.
1462edd16368SStephen M. Cameron  */
1463edd16368SStephen M. Cameron static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
1464edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *haystack[], int haystack_size,
1465edd16368SStephen M. Cameron 	int *index)
1466edd16368SStephen M. Cameron {
1467edd16368SStephen M. Cameron 	int i;
1468edd16368SStephen M. Cameron #define DEVICE_NOT_FOUND 0
1469edd16368SStephen M. Cameron #define DEVICE_CHANGED 1
1470edd16368SStephen M. Cameron #define DEVICE_SAME 2
1471bd9244f7SScott Teel #define DEVICE_UPDATED 3
14721d33d85dSDon Brace 	if (needle == NULL)
14731d33d85dSDon Brace 		return DEVICE_NOT_FOUND;
14741d33d85dSDon Brace 
1475edd16368SStephen M. Cameron 	for (i = 0; i < haystack_size; i++) {
147623231048SStephen M. Cameron 		if (haystack[i] == NULL) /* previously removed. */
147723231048SStephen M. Cameron 			continue;
1478edd16368SStephen M. Cameron 		if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
1479edd16368SStephen M. Cameron 			*index = i;
1480bd9244f7SScott Teel 			if (device_is_the_same(needle, haystack[i])) {
1481bd9244f7SScott Teel 				if (device_updated(needle, haystack[i]))
1482bd9244f7SScott Teel 					return DEVICE_UPDATED;
1483edd16368SStephen M. Cameron 				return DEVICE_SAME;
1484bd9244f7SScott Teel 			} else {
14859846590eSStephen M. Cameron 				/* Keep offline devices offline */
14869846590eSStephen M. Cameron 				if (needle->volume_offline)
14879846590eSStephen M. Cameron 					return DEVICE_NOT_FOUND;
1488edd16368SStephen M. Cameron 				return DEVICE_CHANGED;
1489edd16368SStephen M. Cameron 			}
1490edd16368SStephen M. Cameron 		}
1491bd9244f7SScott Teel 	}
1492edd16368SStephen M. Cameron 	*index = -1;
1493edd16368SStephen M. Cameron 	return DEVICE_NOT_FOUND;
1494edd16368SStephen M. Cameron }
1495edd16368SStephen M. Cameron 
14969846590eSStephen M. Cameron static void hpsa_monitor_offline_device(struct ctlr_info *h,
14979846590eSStephen M. Cameron 					unsigned char scsi3addr[])
14989846590eSStephen M. Cameron {
14999846590eSStephen M. Cameron 	struct offline_device_entry *device;
15009846590eSStephen M. Cameron 	unsigned long flags;
15019846590eSStephen M. Cameron 
15029846590eSStephen M. Cameron 	/* Check to see if device is already on the list */
15039846590eSStephen M. Cameron 	spin_lock_irqsave(&h->offline_device_lock, flags);
15049846590eSStephen M. Cameron 	list_for_each_entry(device, &h->offline_device_list, offline_list) {
15059846590eSStephen M. Cameron 		if (memcmp(device->scsi3addr, scsi3addr,
15069846590eSStephen M. Cameron 			sizeof(device->scsi3addr)) == 0) {
15079846590eSStephen M. Cameron 			spin_unlock_irqrestore(&h->offline_device_lock, flags);
15089846590eSStephen M. Cameron 			return;
15099846590eSStephen M. Cameron 		}
15109846590eSStephen M. Cameron 	}
15119846590eSStephen M. Cameron 	spin_unlock_irqrestore(&h->offline_device_lock, flags);
15129846590eSStephen M. Cameron 
15139846590eSStephen M. Cameron 	/* Device is not on the list, add it. */
15149846590eSStephen M. Cameron 	device = kmalloc(sizeof(*device), GFP_KERNEL);
15159846590eSStephen M. Cameron 	if (!device) {
15169846590eSStephen M. Cameron 		dev_warn(&h->pdev->dev, "out of memory in %s\n", __func__);
15179846590eSStephen M. Cameron 		return;
15189846590eSStephen M. Cameron 	}
15199846590eSStephen M. Cameron 	memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr));
15209846590eSStephen M. Cameron 	spin_lock_irqsave(&h->offline_device_lock, flags);
15219846590eSStephen M. Cameron 	list_add_tail(&device->offline_list, &h->offline_device_list);
15229846590eSStephen M. Cameron 	spin_unlock_irqrestore(&h->offline_device_lock, flags);
15239846590eSStephen M. Cameron }
15249846590eSStephen M. Cameron 
15259846590eSStephen M. Cameron /* Print a message explaining various offline volume states */
15269846590eSStephen M. Cameron static void hpsa_show_volume_status(struct ctlr_info *h,
15279846590eSStephen M. Cameron 	struct hpsa_scsi_dev_t *sd)
15289846590eSStephen M. Cameron {
15299846590eSStephen M. Cameron 	if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED)
15309846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
15319846590eSStephen M. Cameron 			"C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n",
15329846590eSStephen M. Cameron 			h->scsi_host->host_no,
15339846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
15349846590eSStephen M. Cameron 	switch (sd->volume_offline) {
15359846590eSStephen M. Cameron 	case HPSA_LV_OK:
15369846590eSStephen M. Cameron 		break;
15379846590eSStephen M. Cameron 	case HPSA_LV_UNDERGOING_ERASE:
15389846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
15399846590eSStephen M. Cameron 			"C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n",
15409846590eSStephen M. Cameron 			h->scsi_host->host_no,
15419846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
15429846590eSStephen M. Cameron 		break;
15435ca01204SScott Benesh 	case HPSA_LV_NOT_AVAILABLE:
15445ca01204SScott Benesh 		dev_info(&h->pdev->dev,
15455ca01204SScott Benesh 			"C%d:B%d:T%d:L%d Volume is waiting for transforming volume.\n",
15465ca01204SScott Benesh 			h->scsi_host->host_no,
15475ca01204SScott Benesh 			sd->bus, sd->target, sd->lun);
15485ca01204SScott Benesh 		break;
15499846590eSStephen M. Cameron 	case HPSA_LV_UNDERGOING_RPI:
15509846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
15515ca01204SScott Benesh 			"C%d:B%d:T%d:L%d Volume is undergoing rapid parity init.\n",
15529846590eSStephen M. Cameron 			h->scsi_host->host_no,
15539846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
15549846590eSStephen M. Cameron 		break;
15559846590eSStephen M. Cameron 	case HPSA_LV_PENDING_RPI:
15569846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
15579846590eSStephen M. Cameron 			"C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n",
15589846590eSStephen M. Cameron 			h->scsi_host->host_no,
15599846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
15609846590eSStephen M. Cameron 		break;
15619846590eSStephen M. Cameron 	case HPSA_LV_ENCRYPTED_NO_KEY:
15629846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
15639846590eSStephen M. Cameron 			"C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n",
15649846590eSStephen M. Cameron 			h->scsi_host->host_no,
15659846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
15669846590eSStephen M. Cameron 		break;
15679846590eSStephen M. Cameron 	case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
15689846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
15699846590eSStephen M. Cameron 			"C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n",
15709846590eSStephen M. Cameron 			h->scsi_host->host_no,
15719846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
15729846590eSStephen M. Cameron 		break;
15739846590eSStephen M. Cameron 	case HPSA_LV_UNDERGOING_ENCRYPTION:
15749846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
15759846590eSStephen M. Cameron 			"C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n",
15769846590eSStephen M. Cameron 			h->scsi_host->host_no,
15779846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
15789846590eSStephen M. Cameron 		break;
15799846590eSStephen M. Cameron 	case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
15809846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
15819846590eSStephen M. Cameron 			"C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n",
15829846590eSStephen M. Cameron 			h->scsi_host->host_no,
15839846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
15849846590eSStephen M. Cameron 		break;
15859846590eSStephen M. Cameron 	case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
15869846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
15879846590eSStephen M. Cameron 			"C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n",
15889846590eSStephen M. Cameron 			h->scsi_host->host_no,
15899846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
15909846590eSStephen M. Cameron 		break;
15919846590eSStephen M. Cameron 	case HPSA_LV_PENDING_ENCRYPTION:
15929846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
15939846590eSStephen M. Cameron 			"C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n",
15949846590eSStephen M. Cameron 			h->scsi_host->host_no,
15959846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
15969846590eSStephen M. Cameron 		break;
15979846590eSStephen M. Cameron 	case HPSA_LV_PENDING_ENCRYPTION_REKEYING:
15989846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
15999846590eSStephen M. Cameron 			"C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n",
16009846590eSStephen M. Cameron 			h->scsi_host->host_no,
16019846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
16029846590eSStephen M. Cameron 		break;
16039846590eSStephen M. Cameron 	}
16049846590eSStephen M. Cameron }
16059846590eSStephen M. Cameron 
160603383736SDon Brace /*
160703383736SDon Brace  * Figure the list of physical drive pointers for a logical drive with
160803383736SDon Brace  * raid offload configured.
160903383736SDon Brace  */
161003383736SDon Brace static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h,
161103383736SDon Brace 				struct hpsa_scsi_dev_t *dev[], int ndevices,
161203383736SDon Brace 				struct hpsa_scsi_dev_t *logical_drive)
161303383736SDon Brace {
161403383736SDon Brace 	struct raid_map_data *map = &logical_drive->raid_map;
161503383736SDon Brace 	struct raid_map_disk_data *dd = &map->data[0];
161603383736SDon Brace 	int i, j;
161703383736SDon Brace 	int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
161803383736SDon Brace 				le16_to_cpu(map->metadata_disks_per_row);
161903383736SDon Brace 	int nraid_map_entries = le16_to_cpu(map->row_cnt) *
162003383736SDon Brace 				le16_to_cpu(map->layout_map_count) *
162103383736SDon Brace 				total_disks_per_row;
162203383736SDon Brace 	int nphys_disk = le16_to_cpu(map->layout_map_count) *
162303383736SDon Brace 				total_disks_per_row;
162403383736SDon Brace 	int qdepth;
162503383736SDon Brace 
162603383736SDon Brace 	if (nraid_map_entries > RAID_MAP_MAX_ENTRIES)
162703383736SDon Brace 		nraid_map_entries = RAID_MAP_MAX_ENTRIES;
162803383736SDon Brace 
1629d604f533SWebb Scales 	logical_drive->nphysical_disks = nraid_map_entries;
1630d604f533SWebb Scales 
163103383736SDon Brace 	qdepth = 0;
163203383736SDon Brace 	for (i = 0; i < nraid_map_entries; i++) {
163303383736SDon Brace 		logical_drive->phys_disk[i] = NULL;
163403383736SDon Brace 		if (!logical_drive->offload_config)
163503383736SDon Brace 			continue;
163603383736SDon Brace 		for (j = 0; j < ndevices; j++) {
16371d33d85dSDon Brace 			if (dev[j] == NULL)
16381d33d85dSDon Brace 				continue;
163903383736SDon Brace 			if (dev[j]->devtype != TYPE_DISK)
164003383736SDon Brace 				continue;
1641af15ed36SDon Brace 			if (dev[j]->devtype != TYPE_ZBC)
1642af15ed36SDon Brace 				continue;
1643f3f01730SKevin Barnett 			if (is_logical_device(dev[j]))
164403383736SDon Brace 				continue;
164503383736SDon Brace 			if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle)
164603383736SDon Brace 				continue;
164703383736SDon Brace 
164803383736SDon Brace 			logical_drive->phys_disk[i] = dev[j];
164903383736SDon Brace 			if (i < nphys_disk)
165003383736SDon Brace 				qdepth = min(h->nr_cmds, qdepth +
165103383736SDon Brace 				    logical_drive->phys_disk[i]->queue_depth);
165203383736SDon Brace 			break;
165303383736SDon Brace 		}
165403383736SDon Brace 
165503383736SDon Brace 		/*
165603383736SDon Brace 		 * This can happen if a physical drive is removed and
165703383736SDon Brace 		 * the logical drive is degraded.  In that case, the RAID
165803383736SDon Brace 		 * map data will refer to a physical disk which isn't actually
165903383736SDon Brace 		 * present.  And in that case offload_enabled should already
166003383736SDon Brace 		 * be 0, but we'll turn it off here just in case
166103383736SDon Brace 		 */
166203383736SDon Brace 		if (!logical_drive->phys_disk[i]) {
166303383736SDon Brace 			logical_drive->offload_enabled = 0;
166441ce4c35SStephen Cameron 			logical_drive->offload_to_be_enabled = 0;
166541ce4c35SStephen Cameron 			logical_drive->queue_depth = 8;
166603383736SDon Brace 		}
166703383736SDon Brace 	}
166803383736SDon Brace 	if (nraid_map_entries)
166903383736SDon Brace 		/*
167003383736SDon Brace 		 * This is correct for reads, too high for full stripe writes,
167103383736SDon Brace 		 * way too high for partial stripe writes
167203383736SDon Brace 		 */
167303383736SDon Brace 		logical_drive->queue_depth = qdepth;
167403383736SDon Brace 	else
167503383736SDon Brace 		logical_drive->queue_depth = h->nr_cmds;
167603383736SDon Brace }
167703383736SDon Brace 
167803383736SDon Brace static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h,
167903383736SDon Brace 				struct hpsa_scsi_dev_t *dev[], int ndevices)
168003383736SDon Brace {
168103383736SDon Brace 	int i;
168203383736SDon Brace 
168303383736SDon Brace 	for (i = 0; i < ndevices; i++) {
16841d33d85dSDon Brace 		if (dev[i] == NULL)
16851d33d85dSDon Brace 			continue;
168603383736SDon Brace 		if (dev[i]->devtype != TYPE_DISK)
168703383736SDon Brace 			continue;
1688af15ed36SDon Brace 		if (dev[i]->devtype != TYPE_ZBC)
1689af15ed36SDon Brace 			continue;
1690f3f01730SKevin Barnett 		if (!is_logical_device(dev[i]))
169103383736SDon Brace 			continue;
169241ce4c35SStephen Cameron 
169341ce4c35SStephen Cameron 		/*
169441ce4c35SStephen Cameron 		 * If offload is currently enabled, the RAID map and
169541ce4c35SStephen Cameron 		 * phys_disk[] assignment *better* not be changing
169641ce4c35SStephen Cameron 		 * and since it isn't changing, we do not need to
169741ce4c35SStephen Cameron 		 * update it.
169841ce4c35SStephen Cameron 		 */
169941ce4c35SStephen Cameron 		if (dev[i]->offload_enabled)
170041ce4c35SStephen Cameron 			continue;
170141ce4c35SStephen Cameron 
170203383736SDon Brace 		hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]);
170303383736SDon Brace 	}
170403383736SDon Brace }
170503383736SDon Brace 
1706096ccff4SKevin Barnett static int hpsa_add_device(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
1707096ccff4SKevin Barnett {
1708096ccff4SKevin Barnett 	int rc = 0;
1709096ccff4SKevin Barnett 
1710096ccff4SKevin Barnett 	if (!h->scsi_host)
1711096ccff4SKevin Barnett 		return 1;
1712096ccff4SKevin Barnett 
1713d04e62b9SKevin Barnett 	if (is_logical_device(device)) /* RAID */
1714096ccff4SKevin Barnett 		rc = scsi_add_device(h->scsi_host, device->bus,
1715096ccff4SKevin Barnett 					device->target, device->lun);
1716d04e62b9SKevin Barnett 	else /* HBA */
1717d04e62b9SKevin Barnett 		rc = hpsa_add_sas_device(h->sas_host, device);
1718d04e62b9SKevin Barnett 
1719096ccff4SKevin Barnett 	return rc;
1720096ccff4SKevin Barnett }
1721096ccff4SKevin Barnett 
1722096ccff4SKevin Barnett static void hpsa_remove_device(struct ctlr_info *h,
1723096ccff4SKevin Barnett 			struct hpsa_scsi_dev_t *device)
1724096ccff4SKevin Barnett {
1725096ccff4SKevin Barnett 	struct scsi_device *sdev = NULL;
1726096ccff4SKevin Barnett 
1727096ccff4SKevin Barnett 	if (!h->scsi_host)
1728096ccff4SKevin Barnett 		return;
1729096ccff4SKevin Barnett 
1730d04e62b9SKevin Barnett 	if (is_logical_device(device)) { /* RAID */
1731096ccff4SKevin Barnett 		sdev = scsi_device_lookup(h->scsi_host, device->bus,
1732096ccff4SKevin Barnett 						device->target, device->lun);
1733096ccff4SKevin Barnett 		if (sdev) {
1734096ccff4SKevin Barnett 			scsi_remove_device(sdev);
1735096ccff4SKevin Barnett 			scsi_device_put(sdev);
1736096ccff4SKevin Barnett 		} else {
1737096ccff4SKevin Barnett 			/*
1738096ccff4SKevin Barnett 			 * We don't expect to get here.  Future commands
1739096ccff4SKevin Barnett 			 * to this device will get a selection timeout as
1740096ccff4SKevin Barnett 			 * if the device were gone.
1741096ccff4SKevin Barnett 			 */
1742096ccff4SKevin Barnett 			hpsa_show_dev_msg(KERN_WARNING, h, device,
1743096ccff4SKevin Barnett 					"didn't find device for removal.");
1744096ccff4SKevin Barnett 		}
1745d04e62b9SKevin Barnett 	} else /* HBA */
1746d04e62b9SKevin Barnett 		hpsa_remove_sas_device(device);
1747096ccff4SKevin Barnett }
1748096ccff4SKevin Barnett 
17498aa60681SDon Brace static void adjust_hpsa_scsi_table(struct ctlr_info *h,
1750edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *sd[], int nsds)
1751edd16368SStephen M. Cameron {
1752edd16368SStephen M. Cameron 	/* sd contains scsi3 addresses and devtypes, and inquiry
1753edd16368SStephen M. Cameron 	 * data.  This function takes what's in sd to be the current
1754edd16368SStephen M. Cameron 	 * reality and updates h->dev[] to reflect that reality.
1755edd16368SStephen M. Cameron 	 */
1756edd16368SStephen M. Cameron 	int i, entry, device_change, changes = 0;
1757edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *csd;
1758edd16368SStephen M. Cameron 	unsigned long flags;
1759edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t **added, **removed;
1760edd16368SStephen M. Cameron 	int nadded, nremoved;
1761edd16368SStephen M. Cameron 
1762da03ded0SDon Brace 	/*
1763da03ded0SDon Brace 	 * A reset can cause a device status to change
1764da03ded0SDon Brace 	 * re-schedule the scan to see what happened.
1765da03ded0SDon Brace 	 */
1766da03ded0SDon Brace 	if (h->reset_in_progress) {
1767da03ded0SDon Brace 		h->drv_req_rescan = 1;
1768da03ded0SDon Brace 		return;
1769da03ded0SDon Brace 	}
1770edd16368SStephen M. Cameron 
1771cfe5badcSScott Teel 	added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL);
1772cfe5badcSScott Teel 	removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL);
1773edd16368SStephen M. Cameron 
1774edd16368SStephen M. Cameron 	if (!added || !removed) {
1775edd16368SStephen M. Cameron 		dev_warn(&h->pdev->dev, "out of memory in "
1776edd16368SStephen M. Cameron 			"adjust_hpsa_scsi_table\n");
1777edd16368SStephen M. Cameron 		goto free_and_out;
1778edd16368SStephen M. Cameron 	}
1779edd16368SStephen M. Cameron 
1780edd16368SStephen M. Cameron 	spin_lock_irqsave(&h->devlock, flags);
1781edd16368SStephen M. Cameron 
1782edd16368SStephen M. Cameron 	/* find any devices in h->dev[] that are not in
1783edd16368SStephen M. Cameron 	 * sd[] and remove them from h->dev[], and for any
1784edd16368SStephen M. Cameron 	 * devices which have changed, remove the old device
1785edd16368SStephen M. Cameron 	 * info and add the new device info.
1786bd9244f7SScott Teel 	 * If minor device attributes change, just update
1787bd9244f7SScott Teel 	 * the existing device structure.
1788edd16368SStephen M. Cameron 	 */
1789edd16368SStephen M. Cameron 	i = 0;
1790edd16368SStephen M. Cameron 	nremoved = 0;
1791edd16368SStephen M. Cameron 	nadded = 0;
1792edd16368SStephen M. Cameron 	while (i < h->ndevices) {
1793edd16368SStephen M. Cameron 		csd = h->dev[i];
1794edd16368SStephen M. Cameron 		device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
1795edd16368SStephen M. Cameron 		if (device_change == DEVICE_NOT_FOUND) {
1796edd16368SStephen M. Cameron 			changes++;
17978aa60681SDon Brace 			hpsa_scsi_remove_entry(h, i, removed, &nremoved);
1798edd16368SStephen M. Cameron 			continue; /* remove ^^^, hence i not incremented */
1799edd16368SStephen M. Cameron 		} else if (device_change == DEVICE_CHANGED) {
1800edd16368SStephen M. Cameron 			changes++;
18018aa60681SDon Brace 			hpsa_scsi_replace_entry(h, i, sd[entry],
18022a8ccf31SStephen M. Cameron 				added, &nadded, removed, &nremoved);
1803c7f172dcSStephen M. Cameron 			/* Set it to NULL to prevent it from being freed
1804c7f172dcSStephen M. Cameron 			 * at the bottom of hpsa_update_scsi_devices()
1805c7f172dcSStephen M. Cameron 			 */
1806c7f172dcSStephen M. Cameron 			sd[entry] = NULL;
1807bd9244f7SScott Teel 		} else if (device_change == DEVICE_UPDATED) {
18088aa60681SDon Brace 			hpsa_scsi_update_entry(h, i, sd[entry]);
1809edd16368SStephen M. Cameron 		}
1810edd16368SStephen M. Cameron 		i++;
1811edd16368SStephen M. Cameron 	}
1812edd16368SStephen M. Cameron 
1813edd16368SStephen M. Cameron 	/* Now, make sure every device listed in sd[] is also
1814edd16368SStephen M. Cameron 	 * listed in h->dev[], adding them if they aren't found
1815edd16368SStephen M. Cameron 	 */
1816edd16368SStephen M. Cameron 
1817edd16368SStephen M. Cameron 	for (i = 0; i < nsds; i++) {
1818edd16368SStephen M. Cameron 		if (!sd[i]) /* if already added above. */
1819edd16368SStephen M. Cameron 			continue;
18209846590eSStephen M. Cameron 
18219846590eSStephen M. Cameron 		/* Don't add devices which are NOT READY, FORMAT IN PROGRESS
18229846590eSStephen M. Cameron 		 * as the SCSI mid-layer does not handle such devices well.
18239846590eSStephen M. Cameron 		 * It relentlessly loops sending TUR at 3Hz, then READ(10)
18249846590eSStephen M. Cameron 		 * at 160Hz, and prevents the system from coming up.
18259846590eSStephen M. Cameron 		 */
18269846590eSStephen M. Cameron 		if (sd[i]->volume_offline) {
18279846590eSStephen M. Cameron 			hpsa_show_volume_status(h, sd[i]);
18280d96ef5fSWebb Scales 			hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline");
18299846590eSStephen M. Cameron 			continue;
18309846590eSStephen M. Cameron 		}
18319846590eSStephen M. Cameron 
1832edd16368SStephen M. Cameron 		device_change = hpsa_scsi_find_entry(sd[i], h->dev,
1833edd16368SStephen M. Cameron 					h->ndevices, &entry);
1834edd16368SStephen M. Cameron 		if (device_change == DEVICE_NOT_FOUND) {
1835edd16368SStephen M. Cameron 			changes++;
18368aa60681SDon Brace 			if (hpsa_scsi_add_entry(h, sd[i], added, &nadded) != 0)
1837edd16368SStephen M. Cameron 				break;
1838edd16368SStephen M. Cameron 			sd[i] = NULL; /* prevent from being freed later. */
1839edd16368SStephen M. Cameron 		} else if (device_change == DEVICE_CHANGED) {
1840edd16368SStephen M. Cameron 			/* should never happen... */
1841edd16368SStephen M. Cameron 			changes++;
1842edd16368SStephen M. Cameron 			dev_warn(&h->pdev->dev,
1843edd16368SStephen M. Cameron 				"device unexpectedly changed.\n");
1844edd16368SStephen M. Cameron 			/* but if it does happen, we just ignore that device */
1845edd16368SStephen M. Cameron 		}
1846edd16368SStephen M. Cameron 	}
184741ce4c35SStephen Cameron 	hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices);
184841ce4c35SStephen Cameron 
184941ce4c35SStephen Cameron 	/* Now that h->dev[]->phys_disk[] is coherent, we can enable
185041ce4c35SStephen Cameron 	 * any logical drives that need it enabled.
185141ce4c35SStephen Cameron 	 */
18521d33d85dSDon Brace 	for (i = 0; i < h->ndevices; i++) {
18531d33d85dSDon Brace 		if (h->dev[i] == NULL)
18541d33d85dSDon Brace 			continue;
185541ce4c35SStephen Cameron 		h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled;
18561d33d85dSDon Brace 	}
185741ce4c35SStephen Cameron 
1858edd16368SStephen M. Cameron 	spin_unlock_irqrestore(&h->devlock, flags);
1859edd16368SStephen M. Cameron 
18609846590eSStephen M. Cameron 	/* Monitor devices which are in one of several NOT READY states to be
18619846590eSStephen M. Cameron 	 * brought online later. This must be done without holding h->devlock,
18629846590eSStephen M. Cameron 	 * so don't touch h->dev[]
18639846590eSStephen M. Cameron 	 */
18649846590eSStephen M. Cameron 	for (i = 0; i < nsds; i++) {
18659846590eSStephen M. Cameron 		if (!sd[i]) /* if already added above. */
18669846590eSStephen M. Cameron 			continue;
18679846590eSStephen M. Cameron 		if (sd[i]->volume_offline)
18689846590eSStephen M. Cameron 			hpsa_monitor_offline_device(h, sd[i]->scsi3addr);
18699846590eSStephen M. Cameron 	}
18709846590eSStephen M. Cameron 
1871edd16368SStephen M. Cameron 	/* Don't notify scsi mid layer of any changes the first time through
1872edd16368SStephen M. Cameron 	 * (or if there are no changes) scsi_scan_host will do it later the
1873edd16368SStephen M. Cameron 	 * first time through.
1874edd16368SStephen M. Cameron 	 */
18758aa60681SDon Brace 	if (!changes)
1876edd16368SStephen M. Cameron 		goto free_and_out;
1877edd16368SStephen M. Cameron 
1878edd16368SStephen M. Cameron 	/* Notify scsi mid layer of any removed devices */
1879edd16368SStephen M. Cameron 	for (i = 0; i < nremoved; i++) {
18801d33d85dSDon Brace 		if (removed[i] == NULL)
18811d33d85dSDon Brace 			continue;
1882096ccff4SKevin Barnett 		if (removed[i]->expose_device)
1883096ccff4SKevin Barnett 			hpsa_remove_device(h, removed[i]);
1884edd16368SStephen M. Cameron 		kfree(removed[i]);
1885edd16368SStephen M. Cameron 		removed[i] = NULL;
1886edd16368SStephen M. Cameron 	}
1887edd16368SStephen M. Cameron 
1888edd16368SStephen M. Cameron 	/* Notify scsi mid layer of any added devices */
1889edd16368SStephen M. Cameron 	for (i = 0; i < nadded; i++) {
1890096ccff4SKevin Barnett 		int rc = 0;
1891096ccff4SKevin Barnett 
18921d33d85dSDon Brace 		if (added[i] == NULL)
189341ce4c35SStephen Cameron 			continue;
18942a168208SKevin Barnett 		if (!(added[i]->expose_device))
1895edd16368SStephen M. Cameron 			continue;
1896096ccff4SKevin Barnett 		rc = hpsa_add_device(h, added[i]);
1897096ccff4SKevin Barnett 		if (!rc)
1898edd16368SStephen M. Cameron 			continue;
1899096ccff4SKevin Barnett 		dev_warn(&h->pdev->dev,
1900096ccff4SKevin Barnett 			"addition failed %d, device not added.", rc);
1901edd16368SStephen M. Cameron 		/* now we have to remove it from h->dev,
1902edd16368SStephen M. Cameron 		 * since it didn't get added to scsi mid layer
1903edd16368SStephen M. Cameron 		 */
1904edd16368SStephen M. Cameron 		fixup_botched_add(h, added[i]);
1905853633e8SDon Brace 		h->drv_req_rescan = 1;
1906edd16368SStephen M. Cameron 	}
1907edd16368SStephen M. Cameron 
1908edd16368SStephen M. Cameron free_and_out:
1909edd16368SStephen M. Cameron 	kfree(added);
1910edd16368SStephen M. Cameron 	kfree(removed);
1911edd16368SStephen M. Cameron }
1912edd16368SStephen M. Cameron 
1913edd16368SStephen M. Cameron /*
19149e03aa2fSJoe Perches  * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t *
1915edd16368SStephen M. Cameron  * Assume's h->devlock is held.
1916edd16368SStephen M. Cameron  */
1917edd16368SStephen M. Cameron static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
1918edd16368SStephen M. Cameron 	int bus, int target, int lun)
1919edd16368SStephen M. Cameron {
1920edd16368SStephen M. Cameron 	int i;
1921edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *sd;
1922edd16368SStephen M. Cameron 
1923edd16368SStephen M. Cameron 	for (i = 0; i < h->ndevices; i++) {
1924edd16368SStephen M. Cameron 		sd = h->dev[i];
1925edd16368SStephen M. Cameron 		if (sd->bus == bus && sd->target == target && sd->lun == lun)
1926edd16368SStephen M. Cameron 			return sd;
1927edd16368SStephen M. Cameron 	}
1928edd16368SStephen M. Cameron 	return NULL;
1929edd16368SStephen M. Cameron }
1930edd16368SStephen M. Cameron 
1931edd16368SStephen M. Cameron static int hpsa_slave_alloc(struct scsi_device *sdev)
1932edd16368SStephen M. Cameron {
1933edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *sd;
1934edd16368SStephen M. Cameron 	unsigned long flags;
1935edd16368SStephen M. Cameron 	struct ctlr_info *h;
1936edd16368SStephen M. Cameron 
1937edd16368SStephen M. Cameron 	h = sdev_to_hba(sdev);
1938edd16368SStephen M. Cameron 	spin_lock_irqsave(&h->devlock, flags);
1939d04e62b9SKevin Barnett 	if (sdev_channel(sdev) == HPSA_PHYSICAL_DEVICE_BUS) {
1940d04e62b9SKevin Barnett 		struct scsi_target *starget;
1941d04e62b9SKevin Barnett 		struct sas_rphy *rphy;
1942d04e62b9SKevin Barnett 
1943d04e62b9SKevin Barnett 		starget = scsi_target(sdev);
1944d04e62b9SKevin Barnett 		rphy = target_to_rphy(starget);
1945d04e62b9SKevin Barnett 		sd = hpsa_find_device_by_sas_rphy(h, rphy);
1946d04e62b9SKevin Barnett 		if (sd) {
1947d04e62b9SKevin Barnett 			sd->target = sdev_id(sdev);
1948d04e62b9SKevin Barnett 			sd->lun = sdev->lun;
1949d04e62b9SKevin Barnett 		}
1950d04e62b9SKevin Barnett 	} else
1951edd16368SStephen M. Cameron 		sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
1952edd16368SStephen M. Cameron 					sdev_id(sdev), sdev->lun);
1953d04e62b9SKevin Barnett 
1954d04e62b9SKevin Barnett 	if (sd && sd->expose_device) {
195503383736SDon Brace 		atomic_set(&sd->ioaccel_cmds_out, 0);
1956d04e62b9SKevin Barnett 		sdev->hostdata = sd;
195741ce4c35SStephen Cameron 	} else
195841ce4c35SStephen Cameron 		sdev->hostdata = NULL;
1959edd16368SStephen M. Cameron 	spin_unlock_irqrestore(&h->devlock, flags);
1960edd16368SStephen M. Cameron 	return 0;
1961edd16368SStephen M. Cameron }
1962edd16368SStephen M. Cameron 
196341ce4c35SStephen Cameron /* configure scsi device based on internal per-device structure */
196441ce4c35SStephen Cameron static int hpsa_slave_configure(struct scsi_device *sdev)
196541ce4c35SStephen Cameron {
196641ce4c35SStephen Cameron 	struct hpsa_scsi_dev_t *sd;
196741ce4c35SStephen Cameron 	int queue_depth;
196841ce4c35SStephen Cameron 
196941ce4c35SStephen Cameron 	sd = sdev->hostdata;
19702a168208SKevin Barnett 	sdev->no_uld_attach = !sd || !sd->expose_device;
197141ce4c35SStephen Cameron 
197241ce4c35SStephen Cameron 	if (sd)
197341ce4c35SStephen Cameron 		queue_depth = sd->queue_depth != 0 ?
197441ce4c35SStephen Cameron 			sd->queue_depth : sdev->host->can_queue;
197541ce4c35SStephen Cameron 	else
197641ce4c35SStephen Cameron 		queue_depth = sdev->host->can_queue;
197741ce4c35SStephen Cameron 
197841ce4c35SStephen Cameron 	scsi_change_queue_depth(sdev, queue_depth);
197941ce4c35SStephen Cameron 
198041ce4c35SStephen Cameron 	return 0;
198141ce4c35SStephen Cameron }
198241ce4c35SStephen Cameron 
1983edd16368SStephen M. Cameron static void hpsa_slave_destroy(struct scsi_device *sdev)
1984edd16368SStephen M. Cameron {
1985bcc44255SStephen M. Cameron 	/* nothing to do. */
1986edd16368SStephen M. Cameron }
1987edd16368SStephen M. Cameron 
1988d9a729f3SWebb Scales static void hpsa_free_ioaccel2_sg_chain_blocks(struct ctlr_info *h)
1989d9a729f3SWebb Scales {
1990d9a729f3SWebb Scales 	int i;
1991d9a729f3SWebb Scales 
1992d9a729f3SWebb Scales 	if (!h->ioaccel2_cmd_sg_list)
1993d9a729f3SWebb Scales 		return;
1994d9a729f3SWebb Scales 	for (i = 0; i < h->nr_cmds; i++) {
1995d9a729f3SWebb Scales 		kfree(h->ioaccel2_cmd_sg_list[i]);
1996d9a729f3SWebb Scales 		h->ioaccel2_cmd_sg_list[i] = NULL;
1997d9a729f3SWebb Scales 	}
1998d9a729f3SWebb Scales 	kfree(h->ioaccel2_cmd_sg_list);
1999d9a729f3SWebb Scales 	h->ioaccel2_cmd_sg_list = NULL;
2000d9a729f3SWebb Scales }
2001d9a729f3SWebb Scales 
2002d9a729f3SWebb Scales static int hpsa_allocate_ioaccel2_sg_chain_blocks(struct ctlr_info *h)
2003d9a729f3SWebb Scales {
2004d9a729f3SWebb Scales 	int i;
2005d9a729f3SWebb Scales 
2006d9a729f3SWebb Scales 	if (h->chainsize <= 0)
2007d9a729f3SWebb Scales 		return 0;
2008d9a729f3SWebb Scales 
2009d9a729f3SWebb Scales 	h->ioaccel2_cmd_sg_list =
2010d9a729f3SWebb Scales 		kzalloc(sizeof(*h->ioaccel2_cmd_sg_list) * h->nr_cmds,
2011d9a729f3SWebb Scales 					GFP_KERNEL);
2012d9a729f3SWebb Scales 	if (!h->ioaccel2_cmd_sg_list)
2013d9a729f3SWebb Scales 		return -ENOMEM;
2014d9a729f3SWebb Scales 	for (i = 0; i < h->nr_cmds; i++) {
2015d9a729f3SWebb Scales 		h->ioaccel2_cmd_sg_list[i] =
2016d9a729f3SWebb Scales 			kmalloc(sizeof(*h->ioaccel2_cmd_sg_list[i]) *
2017d9a729f3SWebb Scales 					h->maxsgentries, GFP_KERNEL);
2018d9a729f3SWebb Scales 		if (!h->ioaccel2_cmd_sg_list[i])
2019d9a729f3SWebb Scales 			goto clean;
2020d9a729f3SWebb Scales 	}
2021d9a729f3SWebb Scales 	return 0;
2022d9a729f3SWebb Scales 
2023d9a729f3SWebb Scales clean:
2024d9a729f3SWebb Scales 	hpsa_free_ioaccel2_sg_chain_blocks(h);
2025d9a729f3SWebb Scales 	return -ENOMEM;
2026d9a729f3SWebb Scales }
2027d9a729f3SWebb Scales 
202833a2ffceSStephen M. Cameron static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
202933a2ffceSStephen M. Cameron {
203033a2ffceSStephen M. Cameron 	int i;
203133a2ffceSStephen M. Cameron 
203233a2ffceSStephen M. Cameron 	if (!h->cmd_sg_list)
203333a2ffceSStephen M. Cameron 		return;
203433a2ffceSStephen M. Cameron 	for (i = 0; i < h->nr_cmds; i++) {
203533a2ffceSStephen M. Cameron 		kfree(h->cmd_sg_list[i]);
203633a2ffceSStephen M. Cameron 		h->cmd_sg_list[i] = NULL;
203733a2ffceSStephen M. Cameron 	}
203833a2ffceSStephen M. Cameron 	kfree(h->cmd_sg_list);
203933a2ffceSStephen M. Cameron 	h->cmd_sg_list = NULL;
204033a2ffceSStephen M. Cameron }
204133a2ffceSStephen M. Cameron 
2042105a3dbcSRobert Elliott static int hpsa_alloc_sg_chain_blocks(struct ctlr_info *h)
204333a2ffceSStephen M. Cameron {
204433a2ffceSStephen M. Cameron 	int i;
204533a2ffceSStephen M. Cameron 
204633a2ffceSStephen M. Cameron 	if (h->chainsize <= 0)
204733a2ffceSStephen M. Cameron 		return 0;
204833a2ffceSStephen M. Cameron 
204933a2ffceSStephen M. Cameron 	h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
205033a2ffceSStephen M. Cameron 				GFP_KERNEL);
20513d4e6af8SRobert Elliott 	if (!h->cmd_sg_list) {
20523d4e6af8SRobert Elliott 		dev_err(&h->pdev->dev, "Failed to allocate SG list\n");
205333a2ffceSStephen M. Cameron 		return -ENOMEM;
20543d4e6af8SRobert Elliott 	}
205533a2ffceSStephen M. Cameron 	for (i = 0; i < h->nr_cmds; i++) {
205633a2ffceSStephen M. Cameron 		h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
205733a2ffceSStephen M. Cameron 						h->chainsize, GFP_KERNEL);
20583d4e6af8SRobert Elliott 		if (!h->cmd_sg_list[i]) {
20593d4e6af8SRobert Elliott 			dev_err(&h->pdev->dev, "Failed to allocate cmd SG\n");
206033a2ffceSStephen M. Cameron 			goto clean;
206133a2ffceSStephen M. Cameron 		}
20623d4e6af8SRobert Elliott 	}
206333a2ffceSStephen M. Cameron 	return 0;
206433a2ffceSStephen M. Cameron 
206533a2ffceSStephen M. Cameron clean:
206633a2ffceSStephen M. Cameron 	hpsa_free_sg_chain_blocks(h);
206733a2ffceSStephen M. Cameron 	return -ENOMEM;
206833a2ffceSStephen M. Cameron }
206933a2ffceSStephen M. Cameron 
2070d9a729f3SWebb Scales static int hpsa_map_ioaccel2_sg_chain_block(struct ctlr_info *h,
2071d9a729f3SWebb Scales 	struct io_accel2_cmd *cp, struct CommandList *c)
2072d9a729f3SWebb Scales {
2073d9a729f3SWebb Scales 	struct ioaccel2_sg_element *chain_block;
2074d9a729f3SWebb Scales 	u64 temp64;
2075d9a729f3SWebb Scales 	u32 chain_size;
2076d9a729f3SWebb Scales 
2077d9a729f3SWebb Scales 	chain_block = h->ioaccel2_cmd_sg_list[c->cmdindex];
2078a736e9b6SDon Brace 	chain_size = le32_to_cpu(cp->sg[0].length);
2079d9a729f3SWebb Scales 	temp64 = pci_map_single(h->pdev, chain_block, chain_size,
2080d9a729f3SWebb Scales 				PCI_DMA_TODEVICE);
2081d9a729f3SWebb Scales 	if (dma_mapping_error(&h->pdev->dev, temp64)) {
2082d9a729f3SWebb Scales 		/* prevent subsequent unmapping */
2083d9a729f3SWebb Scales 		cp->sg->address = 0;
2084d9a729f3SWebb Scales 		return -1;
2085d9a729f3SWebb Scales 	}
2086d9a729f3SWebb Scales 	cp->sg->address = cpu_to_le64(temp64);
2087d9a729f3SWebb Scales 	return 0;
2088d9a729f3SWebb Scales }
2089d9a729f3SWebb Scales 
2090d9a729f3SWebb Scales static void hpsa_unmap_ioaccel2_sg_chain_block(struct ctlr_info *h,
2091d9a729f3SWebb Scales 	struct io_accel2_cmd *cp)
2092d9a729f3SWebb Scales {
2093d9a729f3SWebb Scales 	struct ioaccel2_sg_element *chain_sg;
2094d9a729f3SWebb Scales 	u64 temp64;
2095d9a729f3SWebb Scales 	u32 chain_size;
2096d9a729f3SWebb Scales 
2097d9a729f3SWebb Scales 	chain_sg = cp->sg;
2098d9a729f3SWebb Scales 	temp64 = le64_to_cpu(chain_sg->address);
2099a736e9b6SDon Brace 	chain_size = le32_to_cpu(cp->sg[0].length);
2100d9a729f3SWebb Scales 	pci_unmap_single(h->pdev, temp64, chain_size, PCI_DMA_TODEVICE);
2101d9a729f3SWebb Scales }
2102d9a729f3SWebb Scales 
2103e2bea6dfSStephen M. Cameron static int hpsa_map_sg_chain_block(struct ctlr_info *h,
210433a2ffceSStephen M. Cameron 	struct CommandList *c)
210533a2ffceSStephen M. Cameron {
210633a2ffceSStephen M. Cameron 	struct SGDescriptor *chain_sg, *chain_block;
210733a2ffceSStephen M. Cameron 	u64 temp64;
210850a0decfSStephen M. Cameron 	u32 chain_len;
210933a2ffceSStephen M. Cameron 
211033a2ffceSStephen M. Cameron 	chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
211133a2ffceSStephen M. Cameron 	chain_block = h->cmd_sg_list[c->cmdindex];
211250a0decfSStephen M. Cameron 	chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN);
211350a0decfSStephen M. Cameron 	chain_len = sizeof(*chain_sg) *
21142b08b3e9SDon Brace 		(le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries);
211550a0decfSStephen M. Cameron 	chain_sg->Len = cpu_to_le32(chain_len);
211650a0decfSStephen M. Cameron 	temp64 = pci_map_single(h->pdev, chain_block, chain_len,
211733a2ffceSStephen M. Cameron 				PCI_DMA_TODEVICE);
2118e2bea6dfSStephen M. Cameron 	if (dma_mapping_error(&h->pdev->dev, temp64)) {
2119e2bea6dfSStephen M. Cameron 		/* prevent subsequent unmapping */
212050a0decfSStephen M. Cameron 		chain_sg->Addr = cpu_to_le64(0);
2121e2bea6dfSStephen M. Cameron 		return -1;
2122e2bea6dfSStephen M. Cameron 	}
212350a0decfSStephen M. Cameron 	chain_sg->Addr = cpu_to_le64(temp64);
2124e2bea6dfSStephen M. Cameron 	return 0;
212533a2ffceSStephen M. Cameron }
212633a2ffceSStephen M. Cameron 
212733a2ffceSStephen M. Cameron static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
212833a2ffceSStephen M. Cameron 	struct CommandList *c)
212933a2ffceSStephen M. Cameron {
213033a2ffceSStephen M. Cameron 	struct SGDescriptor *chain_sg;
213133a2ffceSStephen M. Cameron 
213250a0decfSStephen M. Cameron 	if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries)
213333a2ffceSStephen M. Cameron 		return;
213433a2ffceSStephen M. Cameron 
213533a2ffceSStephen M. Cameron 	chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
213650a0decfSStephen M. Cameron 	pci_unmap_single(h->pdev, le64_to_cpu(chain_sg->Addr),
213750a0decfSStephen M. Cameron 			le32_to_cpu(chain_sg->Len), PCI_DMA_TODEVICE);
213833a2ffceSStephen M. Cameron }
213933a2ffceSStephen M. Cameron 
2140a09c1441SScott Teel 
2141a09c1441SScott Teel /* Decode the various types of errors on ioaccel2 path.
2142a09c1441SScott Teel  * Return 1 for any error that should generate a RAID path retry.
2143a09c1441SScott Teel  * Return 0 for errors that don't require a RAID path retry.
2144a09c1441SScott Teel  */
2145a09c1441SScott Teel static int handle_ioaccel_mode2_error(struct ctlr_info *h,
2146c349775eSScott Teel 					struct CommandList *c,
2147c349775eSScott Teel 					struct scsi_cmnd *cmd,
2148c349775eSScott Teel 					struct io_accel2_cmd *c2)
2149c349775eSScott Teel {
2150c349775eSScott Teel 	int data_len;
2151a09c1441SScott Teel 	int retry = 0;
2152c40820d5SJoe Handzik 	u32 ioaccel2_resid = 0;
2153c349775eSScott Teel 
2154c349775eSScott Teel 	switch (c2->error_data.serv_response) {
2155c349775eSScott Teel 	case IOACCEL2_SERV_RESPONSE_COMPLETE:
2156c349775eSScott Teel 		switch (c2->error_data.status) {
2157c349775eSScott Teel 		case IOACCEL2_STATUS_SR_TASK_COMP_GOOD:
2158c349775eSScott Teel 			break;
2159c349775eSScott Teel 		case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND:
2160ee6b1889SStephen M. Cameron 			cmd->result |= SAM_STAT_CHECK_CONDITION;
2161c349775eSScott Teel 			if (c2->error_data.data_present !=
2162ee6b1889SStephen M. Cameron 					IOACCEL2_SENSE_DATA_PRESENT) {
2163ee6b1889SStephen M. Cameron 				memset(cmd->sense_buffer, 0,
2164ee6b1889SStephen M. Cameron 					SCSI_SENSE_BUFFERSIZE);
2165c349775eSScott Teel 				break;
2166ee6b1889SStephen M. Cameron 			}
2167c349775eSScott Teel 			/* copy the sense data */
2168c349775eSScott Teel 			data_len = c2->error_data.sense_data_len;
2169c349775eSScott Teel 			if (data_len > SCSI_SENSE_BUFFERSIZE)
2170c349775eSScott Teel 				data_len = SCSI_SENSE_BUFFERSIZE;
2171c349775eSScott Teel 			if (data_len > sizeof(c2->error_data.sense_data_buff))
2172c349775eSScott Teel 				data_len =
2173c349775eSScott Teel 					sizeof(c2->error_data.sense_data_buff);
2174c349775eSScott Teel 			memcpy(cmd->sense_buffer,
2175c349775eSScott Teel 				c2->error_data.sense_data_buff, data_len);
2176a09c1441SScott Teel 			retry = 1;
2177c349775eSScott Teel 			break;
2178c349775eSScott Teel 		case IOACCEL2_STATUS_SR_TASK_COMP_BUSY:
2179a09c1441SScott Teel 			retry = 1;
2180c349775eSScott Teel 			break;
2181c349775eSScott Teel 		case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON:
2182a09c1441SScott Teel 			retry = 1;
2183c349775eSScott Teel 			break;
2184c349775eSScott Teel 		case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL:
21854a8da22bSStephen Cameron 			retry = 1;
2186c349775eSScott Teel 			break;
2187c349775eSScott Teel 		case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED:
2188a09c1441SScott Teel 			retry = 1;
2189c349775eSScott Teel 			break;
2190c349775eSScott Teel 		default:
2191a09c1441SScott Teel 			retry = 1;
2192c349775eSScott Teel 			break;
2193c349775eSScott Teel 		}
2194c349775eSScott Teel 		break;
2195c349775eSScott Teel 	case IOACCEL2_SERV_RESPONSE_FAILURE:
2196c40820d5SJoe Handzik 		switch (c2->error_data.status) {
2197c40820d5SJoe Handzik 		case IOACCEL2_STATUS_SR_IO_ERROR:
2198c40820d5SJoe Handzik 		case IOACCEL2_STATUS_SR_IO_ABORTED:
2199c40820d5SJoe Handzik 		case IOACCEL2_STATUS_SR_OVERRUN:
2200c40820d5SJoe Handzik 			retry = 1;
2201c40820d5SJoe Handzik 			break;
2202c40820d5SJoe Handzik 		case IOACCEL2_STATUS_SR_UNDERRUN:
2203c40820d5SJoe Handzik 			cmd->result = (DID_OK << 16);		/* host byte */
2204c40820d5SJoe Handzik 			cmd->result |= (COMMAND_COMPLETE << 8);	/* msg byte */
2205c40820d5SJoe Handzik 			ioaccel2_resid = get_unaligned_le32(
2206c40820d5SJoe Handzik 						&c2->error_data.resid_cnt[0]);
2207c40820d5SJoe Handzik 			scsi_set_resid(cmd, ioaccel2_resid);
2208c40820d5SJoe Handzik 			break;
2209c40820d5SJoe Handzik 		case IOACCEL2_STATUS_SR_NO_PATH_TO_DEVICE:
2210c40820d5SJoe Handzik 		case IOACCEL2_STATUS_SR_INVALID_DEVICE:
2211c40820d5SJoe Handzik 		case IOACCEL2_STATUS_SR_IOACCEL_DISABLED:
2212c40820d5SJoe Handzik 			/* We will get an event from ctlr to trigger rescan */
2213c40820d5SJoe Handzik 			retry = 1;
2214c40820d5SJoe Handzik 			break;
2215c40820d5SJoe Handzik 		default:
2216c40820d5SJoe Handzik 			retry = 1;
2217c40820d5SJoe Handzik 		}
2218c349775eSScott Teel 		break;
2219c349775eSScott Teel 	case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE:
2220c349775eSScott Teel 		break;
2221c349775eSScott Teel 	case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS:
2222c349775eSScott Teel 		break;
2223c349775eSScott Teel 	case IOACCEL2_SERV_RESPONSE_TMF_REJECTED:
2224a09c1441SScott Teel 		retry = 1;
2225c349775eSScott Teel 		break;
2226c349775eSScott Teel 	case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN:
2227c349775eSScott Teel 		break;
2228c349775eSScott Teel 	default:
2229a09c1441SScott Teel 		retry = 1;
2230c349775eSScott Teel 		break;
2231c349775eSScott Teel 	}
2232a09c1441SScott Teel 
2233a09c1441SScott Teel 	return retry;	/* retry on raid path? */
2234c349775eSScott Teel }
2235c349775eSScott Teel 
2236a58e7e53SWebb Scales static void hpsa_cmd_resolve_events(struct ctlr_info *h,
2237a58e7e53SWebb Scales 		struct CommandList *c)
2238a58e7e53SWebb Scales {
2239d604f533SWebb Scales 	bool do_wake = false;
2240d604f533SWebb Scales 
2241a58e7e53SWebb Scales 	/*
2242a58e7e53SWebb Scales 	 * Prevent the following race in the abort handler:
2243a58e7e53SWebb Scales 	 *
2244a58e7e53SWebb Scales 	 * 1. LLD is requested to abort a SCSI command
2245a58e7e53SWebb Scales 	 * 2. The SCSI command completes
2246a58e7e53SWebb Scales 	 * 3. The struct CommandList associated with step 2 is made available
2247a58e7e53SWebb Scales 	 * 4. New I/O request to LLD to another LUN re-uses struct CommandList
2248a58e7e53SWebb Scales 	 * 5. Abort handler follows scsi_cmnd->host_scribble and
2249a58e7e53SWebb Scales 	 *    finds struct CommandList and tries to aborts it
2250a58e7e53SWebb Scales 	 * Now we have aborted the wrong command.
2251a58e7e53SWebb Scales 	 *
2252d604f533SWebb Scales 	 * Reset c->scsi_cmd here so that the abort or reset handler will know
2253d604f533SWebb Scales 	 * this command has completed.  Then, check to see if the handler is
2254a58e7e53SWebb Scales 	 * waiting for this command, and, if so, wake it.
2255a58e7e53SWebb Scales 	 */
2256a58e7e53SWebb Scales 	c->scsi_cmd = SCSI_CMD_IDLE;
2257d604f533SWebb Scales 	mb();	/* Declare command idle before checking for pending events. */
2258a58e7e53SWebb Scales 	if (c->abort_pending) {
2259d604f533SWebb Scales 		do_wake = true;
2260a58e7e53SWebb Scales 		c->abort_pending = false;
2261a58e7e53SWebb Scales 	}
2262d604f533SWebb Scales 	if (c->reset_pending) {
2263d604f533SWebb Scales 		unsigned long flags;
2264d604f533SWebb Scales 		struct hpsa_scsi_dev_t *dev;
2265d604f533SWebb Scales 
2266d604f533SWebb Scales 		/*
2267d604f533SWebb Scales 		 * There appears to be a reset pending; lock the lock and
2268d604f533SWebb Scales 		 * reconfirm.  If so, then decrement the count of outstanding
2269d604f533SWebb Scales 		 * commands and wake the reset command if this is the last one.
2270d604f533SWebb Scales 		 */
2271d604f533SWebb Scales 		spin_lock_irqsave(&h->lock, flags);
2272d604f533SWebb Scales 		dev = c->reset_pending;		/* Re-fetch under the lock. */
2273d604f533SWebb Scales 		if (dev && atomic_dec_and_test(&dev->reset_cmds_out))
2274d604f533SWebb Scales 			do_wake = true;
2275d604f533SWebb Scales 		c->reset_pending = NULL;
2276d604f533SWebb Scales 		spin_unlock_irqrestore(&h->lock, flags);
2277d604f533SWebb Scales 	}
2278d604f533SWebb Scales 
2279d604f533SWebb Scales 	if (do_wake)
2280d604f533SWebb Scales 		wake_up_all(&h->event_sync_wait_queue);
2281a58e7e53SWebb Scales }
2282a58e7e53SWebb Scales 
228373153fe5SWebb Scales static void hpsa_cmd_resolve_and_free(struct ctlr_info *h,
228473153fe5SWebb Scales 				      struct CommandList *c)
228573153fe5SWebb Scales {
228673153fe5SWebb Scales 	hpsa_cmd_resolve_events(h, c);
228773153fe5SWebb Scales 	cmd_tagged_free(h, c);
228873153fe5SWebb Scales }
228973153fe5SWebb Scales 
22908a0ff92cSWebb Scales static void hpsa_cmd_free_and_done(struct ctlr_info *h,
22918a0ff92cSWebb Scales 		struct CommandList *c, struct scsi_cmnd *cmd)
22928a0ff92cSWebb Scales {
229373153fe5SWebb Scales 	hpsa_cmd_resolve_and_free(h, c);
22948a0ff92cSWebb Scales 	cmd->scsi_done(cmd);
22958a0ff92cSWebb Scales }
22968a0ff92cSWebb Scales 
22978a0ff92cSWebb Scales static void hpsa_retry_cmd(struct ctlr_info *h, struct CommandList *c)
22988a0ff92cSWebb Scales {
22998a0ff92cSWebb Scales 	INIT_WORK(&c->work, hpsa_command_resubmit_worker);
23008a0ff92cSWebb Scales 	queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work);
23018a0ff92cSWebb Scales }
23028a0ff92cSWebb Scales 
2303a58e7e53SWebb Scales static void hpsa_set_scsi_cmd_aborted(struct scsi_cmnd *cmd)
2304a58e7e53SWebb Scales {
2305a58e7e53SWebb Scales 	cmd->result = DID_ABORT << 16;
2306a58e7e53SWebb Scales }
2307a58e7e53SWebb Scales 
2308a58e7e53SWebb Scales static void hpsa_cmd_abort_and_free(struct ctlr_info *h, struct CommandList *c,
2309a58e7e53SWebb Scales 				    struct scsi_cmnd *cmd)
2310a58e7e53SWebb Scales {
2311a58e7e53SWebb Scales 	hpsa_set_scsi_cmd_aborted(cmd);
2312a58e7e53SWebb Scales 	dev_warn(&h->pdev->dev, "CDB %16phN was aborted with status 0x%x\n",
2313a58e7e53SWebb Scales 			 c->Request.CDB, c->err_info->ScsiStatus);
231473153fe5SWebb Scales 	hpsa_cmd_resolve_and_free(h, c);
2315a58e7e53SWebb Scales }
2316a58e7e53SWebb Scales 
2317c349775eSScott Teel static void process_ioaccel2_completion(struct ctlr_info *h,
2318c349775eSScott Teel 		struct CommandList *c, struct scsi_cmnd *cmd,
2319c349775eSScott Teel 		struct hpsa_scsi_dev_t *dev)
2320c349775eSScott Teel {
2321c349775eSScott Teel 	struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
2322c349775eSScott Teel 
2323c349775eSScott Teel 	/* check for good status */
2324c349775eSScott Teel 	if (likely(c2->error_data.serv_response == 0 &&
23258a0ff92cSWebb Scales 			c2->error_data.status == 0))
23268a0ff92cSWebb Scales 		return hpsa_cmd_free_and_done(h, c, cmd);
2327c349775eSScott Teel 
23288a0ff92cSWebb Scales 	/*
23298a0ff92cSWebb Scales 	 * Any RAID offload error results in retry which will use
2330c349775eSScott Teel 	 * the normal I/O path so the controller can handle whatever's
2331c349775eSScott Teel 	 * wrong.
2332c349775eSScott Teel 	 */
2333f3f01730SKevin Barnett 	if (is_logical_device(dev) &&
2334c349775eSScott Teel 		c2->error_data.serv_response ==
2335c349775eSScott Teel 			IOACCEL2_SERV_RESPONSE_FAILURE) {
2336080ef1ccSDon Brace 		if (c2->error_data.status ==
2337080ef1ccSDon Brace 			IOACCEL2_STATUS_SR_IOACCEL_DISABLED)
2338c349775eSScott Teel 			dev->offload_enabled = 0;
23398a0ff92cSWebb Scales 
23408a0ff92cSWebb Scales 		return hpsa_retry_cmd(h, c);
2341080ef1ccSDon Brace 	}
2342080ef1ccSDon Brace 
2343080ef1ccSDon Brace 	if (handle_ioaccel_mode2_error(h, c, cmd, c2))
23448a0ff92cSWebb Scales 		return hpsa_retry_cmd(h, c);
2345080ef1ccSDon Brace 
23468a0ff92cSWebb Scales 	return hpsa_cmd_free_and_done(h, c, cmd);
2347c349775eSScott Teel }
2348c349775eSScott Teel 
23499437ac43SStephen Cameron /* Returns 0 on success, < 0 otherwise. */
23509437ac43SStephen Cameron static int hpsa_evaluate_tmf_status(struct ctlr_info *h,
23519437ac43SStephen Cameron 					struct CommandList *cp)
23529437ac43SStephen Cameron {
23539437ac43SStephen Cameron 	u8 tmf_status = cp->err_info->ScsiStatus;
23549437ac43SStephen Cameron 
23559437ac43SStephen Cameron 	switch (tmf_status) {
23569437ac43SStephen Cameron 	case CISS_TMF_COMPLETE:
23579437ac43SStephen Cameron 		/*
23589437ac43SStephen Cameron 		 * CISS_TMF_COMPLETE never happens, instead,
23599437ac43SStephen Cameron 		 * ei->CommandStatus == 0 for this case.
23609437ac43SStephen Cameron 		 */
23619437ac43SStephen Cameron 	case CISS_TMF_SUCCESS:
23629437ac43SStephen Cameron 		return 0;
23639437ac43SStephen Cameron 	case CISS_TMF_INVALID_FRAME:
23649437ac43SStephen Cameron 	case CISS_TMF_NOT_SUPPORTED:
23659437ac43SStephen Cameron 	case CISS_TMF_FAILED:
23669437ac43SStephen Cameron 	case CISS_TMF_WRONG_LUN:
23679437ac43SStephen Cameron 	case CISS_TMF_OVERLAPPED_TAG:
23689437ac43SStephen Cameron 		break;
23699437ac43SStephen Cameron 	default:
23709437ac43SStephen Cameron 		dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n",
23719437ac43SStephen Cameron 				tmf_status);
23729437ac43SStephen Cameron 		break;
23739437ac43SStephen Cameron 	}
23749437ac43SStephen Cameron 	return -tmf_status;
23759437ac43SStephen Cameron }
23769437ac43SStephen Cameron 
23771fb011fbSStephen M. Cameron static void complete_scsi_command(struct CommandList *cp)
2378edd16368SStephen M. Cameron {
2379edd16368SStephen M. Cameron 	struct scsi_cmnd *cmd;
2380edd16368SStephen M. Cameron 	struct ctlr_info *h;
2381edd16368SStephen M. Cameron 	struct ErrorInfo *ei;
2382283b4a9bSStephen M. Cameron 	struct hpsa_scsi_dev_t *dev;
2383d9a729f3SWebb Scales 	struct io_accel2_cmd *c2;
2384edd16368SStephen M. Cameron 
23859437ac43SStephen Cameron 	u8 sense_key;
23869437ac43SStephen Cameron 	u8 asc;      /* additional sense code */
23879437ac43SStephen Cameron 	u8 ascq;     /* additional sense code qualifier */
2388db111e18SStephen M. Cameron 	unsigned long sense_data_size;
2389edd16368SStephen M. Cameron 
2390edd16368SStephen M. Cameron 	ei = cp->err_info;
23917fa3030cSStephen Cameron 	cmd = cp->scsi_cmd;
2392edd16368SStephen M. Cameron 	h = cp->h;
2393283b4a9bSStephen M. Cameron 	dev = cmd->device->hostdata;
2394d9a729f3SWebb Scales 	c2 = &h->ioaccel2_cmd_pool[cp->cmdindex];
2395edd16368SStephen M. Cameron 
2396edd16368SStephen M. Cameron 	scsi_dma_unmap(cmd); /* undo the DMA mappings */
2397e1f7de0cSMatt Gates 	if ((cp->cmd_type == CMD_SCSI) &&
23982b08b3e9SDon Brace 		(le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries))
239933a2ffceSStephen M. Cameron 		hpsa_unmap_sg_chain_block(h, cp);
2400edd16368SStephen M. Cameron 
2401d9a729f3SWebb Scales 	if ((cp->cmd_type == CMD_IOACCEL2) &&
2402d9a729f3SWebb Scales 		(c2->sg[0].chain_indicator == IOACCEL2_CHAIN))
2403d9a729f3SWebb Scales 		hpsa_unmap_ioaccel2_sg_chain_block(h, c2);
2404d9a729f3SWebb Scales 
2405edd16368SStephen M. Cameron 	cmd->result = (DID_OK << 16); 		/* host byte */
2406edd16368SStephen M. Cameron 	cmd->result |= (COMMAND_COMPLETE << 8);	/* msg byte */
2407c349775eSScott Teel 
240803383736SDon Brace 	if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1)
240903383736SDon Brace 		atomic_dec(&cp->phys_disk->ioaccel_cmds_out);
241003383736SDon Brace 
241125163bd5SWebb Scales 	/*
241225163bd5SWebb Scales 	 * We check for lockup status here as it may be set for
241325163bd5SWebb Scales 	 * CMD_SCSI, CMD_IOACCEL1 and CMD_IOACCEL2 commands by
241425163bd5SWebb Scales 	 * fail_all_oustanding_cmds()
241525163bd5SWebb Scales 	 */
241625163bd5SWebb Scales 	if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) {
241725163bd5SWebb Scales 		/* DID_NO_CONNECT will prevent a retry */
241825163bd5SWebb Scales 		cmd->result = DID_NO_CONNECT << 16;
24198a0ff92cSWebb Scales 		return hpsa_cmd_free_and_done(h, cp, cmd);
242025163bd5SWebb Scales 	}
242125163bd5SWebb Scales 
2422d604f533SWebb Scales 	if ((unlikely(hpsa_is_pending_event(cp)))) {
2423d604f533SWebb Scales 		if (cp->reset_pending)
2424d604f533SWebb Scales 			return hpsa_cmd_resolve_and_free(h, cp);
2425d604f533SWebb Scales 		if (cp->abort_pending)
2426d604f533SWebb Scales 			return hpsa_cmd_abort_and_free(h, cp, cmd);
2427d604f533SWebb Scales 	}
2428d604f533SWebb Scales 
2429c349775eSScott Teel 	if (cp->cmd_type == CMD_IOACCEL2)
2430c349775eSScott Teel 		return process_ioaccel2_completion(h, cp, cmd, dev);
2431c349775eSScott Teel 
24326aa4c361SRobert Elliott 	scsi_set_resid(cmd, ei->ResidualCnt);
24338a0ff92cSWebb Scales 	if (ei->CommandStatus == 0)
24348a0ff92cSWebb Scales 		return hpsa_cmd_free_and_done(h, cp, cmd);
24356aa4c361SRobert Elliott 
2436e1f7de0cSMatt Gates 	/* For I/O accelerator commands, copy over some fields to the normal
2437e1f7de0cSMatt Gates 	 * CISS header used below for error handling.
2438e1f7de0cSMatt Gates 	 */
2439e1f7de0cSMatt Gates 	if (cp->cmd_type == CMD_IOACCEL1) {
2440e1f7de0cSMatt Gates 		struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex];
24412b08b3e9SDon Brace 		cp->Header.SGList = scsi_sg_count(cmd);
24422b08b3e9SDon Brace 		cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList);
24432b08b3e9SDon Brace 		cp->Request.CDBLen = le16_to_cpu(c->io_flags) &
24442b08b3e9SDon Brace 			IOACCEL1_IOFLAGS_CDBLEN_MASK;
244550a0decfSStephen M. Cameron 		cp->Header.tag = c->tag;
2446e1f7de0cSMatt Gates 		memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8);
2447e1f7de0cSMatt Gates 		memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen);
2448283b4a9bSStephen M. Cameron 
2449283b4a9bSStephen M. Cameron 		/* Any RAID offload error results in retry which will use
2450283b4a9bSStephen M. Cameron 		 * the normal I/O path so the controller can handle whatever's
2451283b4a9bSStephen M. Cameron 		 * wrong.
2452283b4a9bSStephen M. Cameron 		 */
2453f3f01730SKevin Barnett 		if (is_logical_device(dev)) {
2454283b4a9bSStephen M. Cameron 			if (ei->CommandStatus == CMD_IOACCEL_DISABLED)
2455283b4a9bSStephen M. Cameron 				dev->offload_enabled = 0;
24568a0ff92cSWebb Scales 			return hpsa_retry_cmd(h, cp);
2457283b4a9bSStephen M. Cameron 		}
2458e1f7de0cSMatt Gates 	}
2459e1f7de0cSMatt Gates 
2460edd16368SStephen M. Cameron 	/* an error has occurred */
2461edd16368SStephen M. Cameron 	switch (ei->CommandStatus) {
2462edd16368SStephen M. Cameron 
2463edd16368SStephen M. Cameron 	case CMD_TARGET_STATUS:
24649437ac43SStephen Cameron 		cmd->result |= ei->ScsiStatus;
24659437ac43SStephen Cameron 		/* copy the sense data */
24669437ac43SStephen Cameron 		if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
24679437ac43SStephen Cameron 			sense_data_size = SCSI_SENSE_BUFFERSIZE;
24689437ac43SStephen Cameron 		else
24699437ac43SStephen Cameron 			sense_data_size = sizeof(ei->SenseInfo);
24709437ac43SStephen Cameron 		if (ei->SenseLen < sense_data_size)
24719437ac43SStephen Cameron 			sense_data_size = ei->SenseLen;
24729437ac43SStephen Cameron 		memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
24739437ac43SStephen Cameron 		if (ei->ScsiStatus)
24749437ac43SStephen Cameron 			decode_sense_data(ei->SenseInfo, sense_data_size,
24759437ac43SStephen Cameron 				&sense_key, &asc, &ascq);
2476edd16368SStephen M. Cameron 		if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
24771d3b3609SMatt Gates 			if (sense_key == ABORTED_COMMAND) {
24782e311fbaSStephen M. Cameron 				cmd->result |= DID_SOFT_ERROR << 16;
24791d3b3609SMatt Gates 				break;
24801d3b3609SMatt Gates 			}
2481edd16368SStephen M. Cameron 			break;
2482edd16368SStephen M. Cameron 		}
2483edd16368SStephen M. Cameron 		/* Problem was not a check condition
2484edd16368SStephen M. Cameron 		 * Pass it up to the upper layers...
2485edd16368SStephen M. Cameron 		 */
2486edd16368SStephen M. Cameron 		if (ei->ScsiStatus) {
2487edd16368SStephen M. Cameron 			dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
2488edd16368SStephen M. Cameron 				"Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
2489edd16368SStephen M. Cameron 				"Returning result: 0x%x\n",
2490edd16368SStephen M. Cameron 				cp, ei->ScsiStatus,
2491edd16368SStephen M. Cameron 				sense_key, asc, ascq,
2492edd16368SStephen M. Cameron 				cmd->result);
2493edd16368SStephen M. Cameron 		} else {  /* scsi status is zero??? How??? */
2494edd16368SStephen M. Cameron 			dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
2495edd16368SStephen M. Cameron 				"Returning no connection.\n", cp),
2496edd16368SStephen M. Cameron 
2497edd16368SStephen M. Cameron 			/* Ordinarily, this case should never happen,
2498edd16368SStephen M. Cameron 			 * but there is a bug in some released firmware
2499edd16368SStephen M. Cameron 			 * revisions that allows it to happen if, for
2500edd16368SStephen M. Cameron 			 * example, a 4100 backplane loses power and
2501edd16368SStephen M. Cameron 			 * the tape drive is in it.  We assume that
2502edd16368SStephen M. Cameron 			 * it's a fatal error of some kind because we
2503edd16368SStephen M. Cameron 			 * can't show that it wasn't. We will make it
2504edd16368SStephen M. Cameron 			 * look like selection timeout since that is
2505edd16368SStephen M. Cameron 			 * the most common reason for this to occur,
2506edd16368SStephen M. Cameron 			 * and it's severe enough.
2507edd16368SStephen M. Cameron 			 */
2508edd16368SStephen M. Cameron 
2509edd16368SStephen M. Cameron 			cmd->result = DID_NO_CONNECT << 16;
2510edd16368SStephen M. Cameron 		}
2511edd16368SStephen M. Cameron 		break;
2512edd16368SStephen M. Cameron 
2513edd16368SStephen M. Cameron 	case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2514edd16368SStephen M. Cameron 		break;
2515edd16368SStephen M. Cameron 	case CMD_DATA_OVERRUN:
2516f42e81e1SStephen Cameron 		dev_warn(&h->pdev->dev,
2517f42e81e1SStephen Cameron 			"CDB %16phN data overrun\n", cp->Request.CDB);
2518edd16368SStephen M. Cameron 		break;
2519edd16368SStephen M. Cameron 	case CMD_INVALID: {
2520edd16368SStephen M. Cameron 		/* print_bytes(cp, sizeof(*cp), 1, 0);
2521edd16368SStephen M. Cameron 		print_cmd(cp); */
2522edd16368SStephen M. Cameron 		/* We get CMD_INVALID if you address a non-existent device
2523edd16368SStephen M. Cameron 		 * instead of a selection timeout (no response).  You will
2524edd16368SStephen M. Cameron 		 * see this if you yank out a drive, then try to access it.
2525edd16368SStephen M. Cameron 		 * This is kind of a shame because it means that any other
2526edd16368SStephen M. Cameron 		 * CMD_INVALID (e.g. driver bug) will get interpreted as a
2527edd16368SStephen M. Cameron 		 * missing target. */
2528edd16368SStephen M. Cameron 		cmd->result = DID_NO_CONNECT << 16;
2529edd16368SStephen M. Cameron 	}
2530edd16368SStephen M. Cameron 		break;
2531edd16368SStephen M. Cameron 	case CMD_PROTOCOL_ERR:
2532256d0eaaSStephen M. Cameron 		cmd->result = DID_ERROR << 16;
2533f42e81e1SStephen Cameron 		dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n",
2534f42e81e1SStephen Cameron 				cp->Request.CDB);
2535edd16368SStephen M. Cameron 		break;
2536edd16368SStephen M. Cameron 	case CMD_HARDWARE_ERR:
2537edd16368SStephen M. Cameron 		cmd->result = DID_ERROR << 16;
2538f42e81e1SStephen Cameron 		dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n",
2539f42e81e1SStephen Cameron 			cp->Request.CDB);
2540edd16368SStephen M. Cameron 		break;
2541edd16368SStephen M. Cameron 	case CMD_CONNECTION_LOST:
2542edd16368SStephen M. Cameron 		cmd->result = DID_ERROR << 16;
2543f42e81e1SStephen Cameron 		dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n",
2544f42e81e1SStephen Cameron 			cp->Request.CDB);
2545edd16368SStephen M. Cameron 		break;
2546edd16368SStephen M. Cameron 	case CMD_ABORTED:
2547a58e7e53SWebb Scales 		/* Return now to avoid calling scsi_done(). */
2548a58e7e53SWebb Scales 		return hpsa_cmd_abort_and_free(h, cp, cmd);
2549edd16368SStephen M. Cameron 	case CMD_ABORT_FAILED:
2550edd16368SStephen M. Cameron 		cmd->result = DID_ERROR << 16;
2551f42e81e1SStephen Cameron 		dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n",
2552f42e81e1SStephen Cameron 			cp->Request.CDB);
2553edd16368SStephen M. Cameron 		break;
2554edd16368SStephen M. Cameron 	case CMD_UNSOLICITED_ABORT:
2555f6e76055SStephen M. Cameron 		cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
2556f42e81e1SStephen Cameron 		dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n",
2557f42e81e1SStephen Cameron 			cp->Request.CDB);
2558edd16368SStephen M. Cameron 		break;
2559edd16368SStephen M. Cameron 	case CMD_TIMEOUT:
2560edd16368SStephen M. Cameron 		cmd->result = DID_TIME_OUT << 16;
2561f42e81e1SStephen Cameron 		dev_warn(&h->pdev->dev, "CDB %16phN timed out\n",
2562f42e81e1SStephen Cameron 			cp->Request.CDB);
2563edd16368SStephen M. Cameron 		break;
25641d5e2ed0SStephen M. Cameron 	case CMD_UNABORTABLE:
25651d5e2ed0SStephen M. Cameron 		cmd->result = DID_ERROR << 16;
25661d5e2ed0SStephen M. Cameron 		dev_warn(&h->pdev->dev, "Command unabortable\n");
25671d5e2ed0SStephen M. Cameron 		break;
25689437ac43SStephen Cameron 	case CMD_TMF_STATUS:
25699437ac43SStephen Cameron 		if (hpsa_evaluate_tmf_status(h, cp)) /* TMF failed? */
25709437ac43SStephen Cameron 			cmd->result = DID_ERROR << 16;
25719437ac43SStephen Cameron 		break;
2572283b4a9bSStephen M. Cameron 	case CMD_IOACCEL_DISABLED:
2573283b4a9bSStephen M. Cameron 		/* This only handles the direct pass-through case since RAID
2574283b4a9bSStephen M. Cameron 		 * offload is handled above.  Just attempt a retry.
2575283b4a9bSStephen M. Cameron 		 */
2576283b4a9bSStephen M. Cameron 		cmd->result = DID_SOFT_ERROR << 16;
2577283b4a9bSStephen M. Cameron 		dev_warn(&h->pdev->dev,
2578283b4a9bSStephen M. Cameron 				"cp %p had HP SSD Smart Path error\n", cp);
2579283b4a9bSStephen M. Cameron 		break;
2580edd16368SStephen M. Cameron 	default:
2581edd16368SStephen M. Cameron 		cmd->result = DID_ERROR << 16;
2582edd16368SStephen M. Cameron 		dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
2583edd16368SStephen M. Cameron 				cp, ei->CommandStatus);
2584edd16368SStephen M. Cameron 	}
25858a0ff92cSWebb Scales 
25868a0ff92cSWebb Scales 	return hpsa_cmd_free_and_done(h, cp, cmd);
2587edd16368SStephen M. Cameron }
2588edd16368SStephen M. Cameron 
2589edd16368SStephen M. Cameron static void hpsa_pci_unmap(struct pci_dev *pdev,
2590edd16368SStephen M. Cameron 	struct CommandList *c, int sg_used, int data_direction)
2591edd16368SStephen M. Cameron {
2592edd16368SStephen M. Cameron 	int i;
2593edd16368SStephen M. Cameron 
259450a0decfSStephen M. Cameron 	for (i = 0; i < sg_used; i++)
259550a0decfSStephen M. Cameron 		pci_unmap_single(pdev, (dma_addr_t) le64_to_cpu(c->SG[i].Addr),
259650a0decfSStephen M. Cameron 				le32_to_cpu(c->SG[i].Len),
2597edd16368SStephen M. Cameron 				data_direction);
2598edd16368SStephen M. Cameron }
2599edd16368SStephen M. Cameron 
2600a2dac136SStephen M. Cameron static int hpsa_map_one(struct pci_dev *pdev,
2601edd16368SStephen M. Cameron 		struct CommandList *cp,
2602edd16368SStephen M. Cameron 		unsigned char *buf,
2603edd16368SStephen M. Cameron 		size_t buflen,
2604edd16368SStephen M. Cameron 		int data_direction)
2605edd16368SStephen M. Cameron {
260601a02ffcSStephen M. Cameron 	u64 addr64;
2607edd16368SStephen M. Cameron 
2608edd16368SStephen M. Cameron 	if (buflen == 0 || data_direction == PCI_DMA_NONE) {
2609edd16368SStephen M. Cameron 		cp->Header.SGList = 0;
261050a0decfSStephen M. Cameron 		cp->Header.SGTotal = cpu_to_le16(0);
2611a2dac136SStephen M. Cameron 		return 0;
2612edd16368SStephen M. Cameron 	}
2613edd16368SStephen M. Cameron 
261450a0decfSStephen M. Cameron 	addr64 = pci_map_single(pdev, buf, buflen, data_direction);
2615eceaae18SShuah Khan 	if (dma_mapping_error(&pdev->dev, addr64)) {
2616a2dac136SStephen M. Cameron 		/* Prevent subsequent unmap of something never mapped */
2617eceaae18SShuah Khan 		cp->Header.SGList = 0;
261850a0decfSStephen M. Cameron 		cp->Header.SGTotal = cpu_to_le16(0);
2619a2dac136SStephen M. Cameron 		return -1;
2620eceaae18SShuah Khan 	}
262150a0decfSStephen M. Cameron 	cp->SG[0].Addr = cpu_to_le64(addr64);
262250a0decfSStephen M. Cameron 	cp->SG[0].Len = cpu_to_le32(buflen);
262350a0decfSStephen M. Cameron 	cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */
262450a0decfSStephen M. Cameron 	cp->Header.SGList = 1;   /* no. SGs contig in this cmd */
262550a0decfSStephen M. Cameron 	cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */
2626a2dac136SStephen M. Cameron 	return 0;
2627edd16368SStephen M. Cameron }
2628edd16368SStephen M. Cameron 
262925163bd5SWebb Scales #define NO_TIMEOUT ((unsigned long) -1)
263025163bd5SWebb Scales #define DEFAULT_TIMEOUT 30000 /* milliseconds */
263125163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
263225163bd5SWebb Scales 	struct CommandList *c, int reply_queue, unsigned long timeout_msecs)
2633edd16368SStephen M. Cameron {
2634edd16368SStephen M. Cameron 	DECLARE_COMPLETION_ONSTACK(wait);
2635edd16368SStephen M. Cameron 
2636edd16368SStephen M. Cameron 	c->waiting = &wait;
263725163bd5SWebb Scales 	__enqueue_cmd_and_start_io(h, c, reply_queue);
263825163bd5SWebb Scales 	if (timeout_msecs == NO_TIMEOUT) {
263925163bd5SWebb Scales 		/* TODO: get rid of this no-timeout thing */
264025163bd5SWebb Scales 		wait_for_completion_io(&wait);
264125163bd5SWebb Scales 		return IO_OK;
264225163bd5SWebb Scales 	}
264325163bd5SWebb Scales 	if (!wait_for_completion_io_timeout(&wait,
264425163bd5SWebb Scales 					msecs_to_jiffies(timeout_msecs))) {
264525163bd5SWebb Scales 		dev_warn(&h->pdev->dev, "Command timed out.\n");
264625163bd5SWebb Scales 		return -ETIMEDOUT;
264725163bd5SWebb Scales 	}
264825163bd5SWebb Scales 	return IO_OK;
264925163bd5SWebb Scales }
265025163bd5SWebb Scales 
265125163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c,
265225163bd5SWebb Scales 				   int reply_queue, unsigned long timeout_msecs)
265325163bd5SWebb Scales {
265425163bd5SWebb Scales 	if (unlikely(lockup_detected(h))) {
265525163bd5SWebb Scales 		c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
265625163bd5SWebb Scales 		return IO_OK;
265725163bd5SWebb Scales 	}
265825163bd5SWebb Scales 	return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs);
2659edd16368SStephen M. Cameron }
2660edd16368SStephen M. Cameron 
2661094963daSStephen M. Cameron static u32 lockup_detected(struct ctlr_info *h)
2662094963daSStephen M. Cameron {
2663094963daSStephen M. Cameron 	int cpu;
2664094963daSStephen M. Cameron 	u32 rc, *lockup_detected;
2665094963daSStephen M. Cameron 
2666094963daSStephen M. Cameron 	cpu = get_cpu();
2667094963daSStephen M. Cameron 	lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
2668094963daSStephen M. Cameron 	rc = *lockup_detected;
2669094963daSStephen M. Cameron 	put_cpu();
2670094963daSStephen M. Cameron 	return rc;
2671094963daSStephen M. Cameron }
2672094963daSStephen M. Cameron 
26739c2fc160SStephen M. Cameron #define MAX_DRIVER_CMD_RETRIES 25
267425163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
267525163bd5SWebb Scales 	struct CommandList *c, int data_direction, unsigned long timeout_msecs)
2676edd16368SStephen M. Cameron {
26779c2fc160SStephen M. Cameron 	int backoff_time = 10, retry_count = 0;
267825163bd5SWebb Scales 	int rc;
2679edd16368SStephen M. Cameron 
2680edd16368SStephen M. Cameron 	do {
26817630abd0SJoe Perches 		memset(c->err_info, 0, sizeof(*c->err_info));
268225163bd5SWebb Scales 		rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
268325163bd5SWebb Scales 						  timeout_msecs);
268425163bd5SWebb Scales 		if (rc)
268525163bd5SWebb Scales 			break;
2686edd16368SStephen M. Cameron 		retry_count++;
26879c2fc160SStephen M. Cameron 		if (retry_count > 3) {
26889c2fc160SStephen M. Cameron 			msleep(backoff_time);
26899c2fc160SStephen M. Cameron 			if (backoff_time < 1000)
26909c2fc160SStephen M. Cameron 				backoff_time *= 2;
26919c2fc160SStephen M. Cameron 		}
2692852af20aSMatt Bondurant 	} while ((check_for_unit_attention(h, c) ||
26939c2fc160SStephen M. Cameron 			check_for_busy(h, c)) &&
26949c2fc160SStephen M. Cameron 			retry_count <= MAX_DRIVER_CMD_RETRIES);
2695edd16368SStephen M. Cameron 	hpsa_pci_unmap(h->pdev, c, 1, data_direction);
269625163bd5SWebb Scales 	if (retry_count > MAX_DRIVER_CMD_RETRIES)
269725163bd5SWebb Scales 		rc = -EIO;
269825163bd5SWebb Scales 	return rc;
2699edd16368SStephen M. Cameron }
2700edd16368SStephen M. Cameron 
2701d1e8beacSStephen M. Cameron static void hpsa_print_cmd(struct ctlr_info *h, char *txt,
2702d1e8beacSStephen M. Cameron 				struct CommandList *c)
2703edd16368SStephen M. Cameron {
2704d1e8beacSStephen M. Cameron 	const u8 *cdb = c->Request.CDB;
2705d1e8beacSStephen M. Cameron 	const u8 *lun = c->Header.LUN.LunAddrBytes;
2706edd16368SStephen M. Cameron 
2707d1e8beacSStephen M. Cameron 	dev_warn(&h->pdev->dev, "%s: LUN:%02x%02x%02x%02x%02x%02x%02x%02x"
2708d1e8beacSStephen M. Cameron 	" CDB:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x\n",
2709d1e8beacSStephen M. Cameron 		txt, lun[0], lun[1], lun[2], lun[3],
2710d1e8beacSStephen M. Cameron 		lun[4], lun[5], lun[6], lun[7],
2711d1e8beacSStephen M. Cameron 		cdb[0], cdb[1], cdb[2], cdb[3],
2712d1e8beacSStephen M. Cameron 		cdb[4], cdb[5], cdb[6], cdb[7],
2713d1e8beacSStephen M. Cameron 		cdb[8], cdb[9], cdb[10], cdb[11],
2714d1e8beacSStephen M. Cameron 		cdb[12], cdb[13], cdb[14], cdb[15]);
2715d1e8beacSStephen M. Cameron }
2716d1e8beacSStephen M. Cameron 
2717d1e8beacSStephen M. Cameron static void hpsa_scsi_interpret_error(struct ctlr_info *h,
2718d1e8beacSStephen M. Cameron 			struct CommandList *cp)
2719d1e8beacSStephen M. Cameron {
2720d1e8beacSStephen M. Cameron 	const struct ErrorInfo *ei = cp->err_info;
2721d1e8beacSStephen M. Cameron 	struct device *d = &cp->h->pdev->dev;
27229437ac43SStephen Cameron 	u8 sense_key, asc, ascq;
27239437ac43SStephen Cameron 	int sense_len;
2724d1e8beacSStephen M. Cameron 
2725edd16368SStephen M. Cameron 	switch (ei->CommandStatus) {
2726edd16368SStephen M. Cameron 	case CMD_TARGET_STATUS:
27279437ac43SStephen Cameron 		if (ei->SenseLen > sizeof(ei->SenseInfo))
27289437ac43SStephen Cameron 			sense_len = sizeof(ei->SenseInfo);
27299437ac43SStephen Cameron 		else
27309437ac43SStephen Cameron 			sense_len = ei->SenseLen;
27319437ac43SStephen Cameron 		decode_sense_data(ei->SenseInfo, sense_len,
27329437ac43SStephen Cameron 					&sense_key, &asc, &ascq);
2733d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "SCSI status", cp);
2734d1e8beacSStephen M. Cameron 		if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION)
27359437ac43SStephen Cameron 			dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n",
27369437ac43SStephen Cameron 				sense_key, asc, ascq);
2737d1e8beacSStephen M. Cameron 		else
27389437ac43SStephen Cameron 			dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus);
2739edd16368SStephen M. Cameron 		if (ei->ScsiStatus == 0)
2740edd16368SStephen M. Cameron 			dev_warn(d, "SCSI status is abnormally zero.  "
2741edd16368SStephen M. Cameron 			"(probably indicates selection timeout "
2742edd16368SStephen M. Cameron 			"reported incorrectly due to a known "
2743edd16368SStephen M. Cameron 			"firmware bug, circa July, 2001.)\n");
2744edd16368SStephen M. Cameron 		break;
2745edd16368SStephen M. Cameron 	case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2746edd16368SStephen M. Cameron 		break;
2747edd16368SStephen M. Cameron 	case CMD_DATA_OVERRUN:
2748d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "overrun condition", cp);
2749edd16368SStephen M. Cameron 		break;
2750edd16368SStephen M. Cameron 	case CMD_INVALID: {
2751edd16368SStephen M. Cameron 		/* controller unfortunately reports SCSI passthru's
2752edd16368SStephen M. Cameron 		 * to non-existent targets as invalid commands.
2753edd16368SStephen M. Cameron 		 */
2754d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "invalid command", cp);
2755d1e8beacSStephen M. Cameron 		dev_warn(d, "probably means device no longer present\n");
2756edd16368SStephen M. Cameron 		}
2757edd16368SStephen M. Cameron 		break;
2758edd16368SStephen M. Cameron 	case CMD_PROTOCOL_ERR:
2759d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "protocol error", cp);
2760edd16368SStephen M. Cameron 		break;
2761edd16368SStephen M. Cameron 	case CMD_HARDWARE_ERR:
2762d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "hardware error", cp);
2763edd16368SStephen M. Cameron 		break;
2764edd16368SStephen M. Cameron 	case CMD_CONNECTION_LOST:
2765d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "connection lost", cp);
2766edd16368SStephen M. Cameron 		break;
2767edd16368SStephen M. Cameron 	case CMD_ABORTED:
2768d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "aborted", cp);
2769edd16368SStephen M. Cameron 		break;
2770edd16368SStephen M. Cameron 	case CMD_ABORT_FAILED:
2771d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "abort failed", cp);
2772edd16368SStephen M. Cameron 		break;
2773edd16368SStephen M. Cameron 	case CMD_UNSOLICITED_ABORT:
2774d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "unsolicited abort", cp);
2775edd16368SStephen M. Cameron 		break;
2776edd16368SStephen M. Cameron 	case CMD_TIMEOUT:
2777d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "timed out", cp);
2778edd16368SStephen M. Cameron 		break;
27791d5e2ed0SStephen M. Cameron 	case CMD_UNABORTABLE:
2780d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "unabortable", cp);
27811d5e2ed0SStephen M. Cameron 		break;
278225163bd5SWebb Scales 	case CMD_CTLR_LOCKUP:
278325163bd5SWebb Scales 		hpsa_print_cmd(h, "controller lockup detected", cp);
278425163bd5SWebb Scales 		break;
2785edd16368SStephen M. Cameron 	default:
2786d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "unknown status", cp);
2787d1e8beacSStephen M. Cameron 		dev_warn(d, "Unknown command status %x\n",
2788edd16368SStephen M. Cameron 				ei->CommandStatus);
2789edd16368SStephen M. Cameron 	}
2790edd16368SStephen M. Cameron }
2791edd16368SStephen M. Cameron 
2792edd16368SStephen M. Cameron static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
2793b7bb24ebSStephen M. Cameron 			u16 page, unsigned char *buf,
2794edd16368SStephen M. Cameron 			unsigned char bufsize)
2795edd16368SStephen M. Cameron {
2796edd16368SStephen M. Cameron 	int rc = IO_OK;
2797edd16368SStephen M. Cameron 	struct CommandList *c;
2798edd16368SStephen M. Cameron 	struct ErrorInfo *ei;
2799edd16368SStephen M. Cameron 
280045fcb86eSStephen Cameron 	c = cmd_alloc(h);
2801edd16368SStephen M. Cameron 
2802a2dac136SStephen M. Cameron 	if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize,
2803a2dac136SStephen M. Cameron 			page, scsi3addr, TYPE_CMD)) {
2804a2dac136SStephen M. Cameron 		rc = -1;
2805a2dac136SStephen M. Cameron 		goto out;
2806a2dac136SStephen M. Cameron 	}
280725163bd5SWebb Scales 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
280825163bd5SWebb Scales 					PCI_DMA_FROMDEVICE, NO_TIMEOUT);
280925163bd5SWebb Scales 	if (rc)
281025163bd5SWebb Scales 		goto out;
2811edd16368SStephen M. Cameron 	ei = c->err_info;
2812edd16368SStephen M. Cameron 	if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
2813d1e8beacSStephen M. Cameron 		hpsa_scsi_interpret_error(h, c);
2814edd16368SStephen M. Cameron 		rc = -1;
2815edd16368SStephen M. Cameron 	}
2816a2dac136SStephen M. Cameron out:
281745fcb86eSStephen Cameron 	cmd_free(h, c);
2818edd16368SStephen M. Cameron 	return rc;
2819edd16368SStephen M. Cameron }
2820edd16368SStephen M. Cameron 
2821bf711ac6SScott Teel static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr,
282225163bd5SWebb Scales 	u8 reset_type, int reply_queue)
2823edd16368SStephen M. Cameron {
2824edd16368SStephen M. Cameron 	int rc = IO_OK;
2825edd16368SStephen M. Cameron 	struct CommandList *c;
2826edd16368SStephen M. Cameron 	struct ErrorInfo *ei;
2827edd16368SStephen M. Cameron 
282845fcb86eSStephen Cameron 	c = cmd_alloc(h);
2829edd16368SStephen M. Cameron 
2830edd16368SStephen M. Cameron 
2831a2dac136SStephen M. Cameron 	/* fill_cmd can't fail here, no data buffer to map. */
28320b9b7b6eSScott Teel 	(void) fill_cmd(c, reset_type, h, NULL, 0, 0,
2833bf711ac6SScott Teel 			scsi3addr, TYPE_MSG);
283425163bd5SWebb Scales 	rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
283525163bd5SWebb Scales 	if (rc) {
283625163bd5SWebb Scales 		dev_warn(&h->pdev->dev, "Failed to send reset command\n");
283725163bd5SWebb Scales 		goto out;
283825163bd5SWebb Scales 	}
2839edd16368SStephen M. Cameron 	/* no unmap needed here because no data xfer. */
2840edd16368SStephen M. Cameron 
2841edd16368SStephen M. Cameron 	ei = c->err_info;
2842edd16368SStephen M. Cameron 	if (ei->CommandStatus != 0) {
2843d1e8beacSStephen M. Cameron 		hpsa_scsi_interpret_error(h, c);
2844edd16368SStephen M. Cameron 		rc = -1;
2845edd16368SStephen M. Cameron 	}
284625163bd5SWebb Scales out:
284745fcb86eSStephen Cameron 	cmd_free(h, c);
2848edd16368SStephen M. Cameron 	return rc;
2849edd16368SStephen M. Cameron }
2850edd16368SStephen M. Cameron 
2851d604f533SWebb Scales static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c,
2852d604f533SWebb Scales 			       struct hpsa_scsi_dev_t *dev,
2853d604f533SWebb Scales 			       unsigned char *scsi3addr)
2854d604f533SWebb Scales {
2855d604f533SWebb Scales 	int i;
2856d604f533SWebb Scales 	bool match = false;
2857d604f533SWebb Scales 	struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
2858d604f533SWebb Scales 	struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2;
2859d604f533SWebb Scales 
2860d604f533SWebb Scales 	if (hpsa_is_cmd_idle(c))
2861d604f533SWebb Scales 		return false;
2862d604f533SWebb Scales 
2863d604f533SWebb Scales 	switch (c->cmd_type) {
2864d604f533SWebb Scales 	case CMD_SCSI:
2865d604f533SWebb Scales 	case CMD_IOCTL_PEND:
2866d604f533SWebb Scales 		match = !memcmp(scsi3addr, &c->Header.LUN.LunAddrBytes,
2867d604f533SWebb Scales 				sizeof(c->Header.LUN.LunAddrBytes));
2868d604f533SWebb Scales 		break;
2869d604f533SWebb Scales 
2870d604f533SWebb Scales 	case CMD_IOACCEL1:
2871d604f533SWebb Scales 	case CMD_IOACCEL2:
2872d604f533SWebb Scales 		if (c->phys_disk == dev) {
2873d604f533SWebb Scales 			/* HBA mode match */
2874d604f533SWebb Scales 			match = true;
2875d604f533SWebb Scales 		} else {
2876d604f533SWebb Scales 			/* Possible RAID mode -- check each phys dev. */
2877d604f533SWebb Scales 			/* FIXME:  Do we need to take out a lock here?  If
2878d604f533SWebb Scales 			 * so, we could just call hpsa_get_pdisk_of_ioaccel2()
2879d604f533SWebb Scales 			 * instead. */
2880d604f533SWebb Scales 			for (i = 0; i < dev->nphysical_disks && !match; i++) {
2881d604f533SWebb Scales 				/* FIXME: an alternate test might be
2882d604f533SWebb Scales 				 *
2883d604f533SWebb Scales 				 * match = dev->phys_disk[i]->ioaccel_handle
2884d604f533SWebb Scales 				 *              == c2->scsi_nexus;      */
2885d604f533SWebb Scales 				match = dev->phys_disk[i] == c->phys_disk;
2886d604f533SWebb Scales 			}
2887d604f533SWebb Scales 		}
2888d604f533SWebb Scales 		break;
2889d604f533SWebb Scales 
2890d604f533SWebb Scales 	case IOACCEL2_TMF:
2891d604f533SWebb Scales 		for (i = 0; i < dev->nphysical_disks && !match; i++) {
2892d604f533SWebb Scales 			match = dev->phys_disk[i]->ioaccel_handle ==
2893d604f533SWebb Scales 					le32_to_cpu(ac->it_nexus);
2894d604f533SWebb Scales 		}
2895d604f533SWebb Scales 		break;
2896d604f533SWebb Scales 
2897d604f533SWebb Scales 	case 0:		/* The command is in the middle of being initialized. */
2898d604f533SWebb Scales 		match = false;
2899d604f533SWebb Scales 		break;
2900d604f533SWebb Scales 
2901d604f533SWebb Scales 	default:
2902d604f533SWebb Scales 		dev_err(&h->pdev->dev, "unexpected cmd_type: %d\n",
2903d604f533SWebb Scales 			c->cmd_type);
2904d604f533SWebb Scales 		BUG();
2905d604f533SWebb Scales 	}
2906d604f533SWebb Scales 
2907d604f533SWebb Scales 	return match;
2908d604f533SWebb Scales }
2909d604f533SWebb Scales 
2910d604f533SWebb Scales static int hpsa_do_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev,
2911d604f533SWebb Scales 	unsigned char *scsi3addr, u8 reset_type, int reply_queue)
2912d604f533SWebb Scales {
2913d604f533SWebb Scales 	int i;
2914d604f533SWebb Scales 	int rc = 0;
2915d604f533SWebb Scales 
2916d604f533SWebb Scales 	/* We can really only handle one reset at a time */
2917d604f533SWebb Scales 	if (mutex_lock_interruptible(&h->reset_mutex) == -EINTR) {
2918d604f533SWebb Scales 		dev_warn(&h->pdev->dev, "concurrent reset wait interrupted.\n");
2919d604f533SWebb Scales 		return -EINTR;
2920d604f533SWebb Scales 	}
2921d604f533SWebb Scales 
2922d604f533SWebb Scales 	BUG_ON(atomic_read(&dev->reset_cmds_out) != 0);
2923d604f533SWebb Scales 
2924d604f533SWebb Scales 	for (i = 0; i < h->nr_cmds; i++) {
2925d604f533SWebb Scales 		struct CommandList *c = h->cmd_pool + i;
2926d604f533SWebb Scales 		int refcount = atomic_inc_return(&c->refcount);
2927d604f533SWebb Scales 
2928d604f533SWebb Scales 		if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, scsi3addr)) {
2929d604f533SWebb Scales 			unsigned long flags;
2930d604f533SWebb Scales 
2931d604f533SWebb Scales 			/*
2932d604f533SWebb Scales 			 * Mark the target command as having a reset pending,
2933d604f533SWebb Scales 			 * then lock a lock so that the command cannot complete
2934d604f533SWebb Scales 			 * while we're considering it.  If the command is not
2935d604f533SWebb Scales 			 * idle then count it; otherwise revoke the event.
2936d604f533SWebb Scales 			 */
2937d604f533SWebb Scales 			c->reset_pending = dev;
2938d604f533SWebb Scales 			spin_lock_irqsave(&h->lock, flags);	/* Implied MB */
2939d604f533SWebb Scales 			if (!hpsa_is_cmd_idle(c))
2940d604f533SWebb Scales 				atomic_inc(&dev->reset_cmds_out);
2941d604f533SWebb Scales 			else
2942d604f533SWebb Scales 				c->reset_pending = NULL;
2943d604f533SWebb Scales 			spin_unlock_irqrestore(&h->lock, flags);
2944d604f533SWebb Scales 		}
2945d604f533SWebb Scales 
2946d604f533SWebb Scales 		cmd_free(h, c);
2947d604f533SWebb Scales 	}
2948d604f533SWebb Scales 
2949d604f533SWebb Scales 	rc = hpsa_send_reset(h, scsi3addr, reset_type, reply_queue);
2950d604f533SWebb Scales 	if (!rc)
2951d604f533SWebb Scales 		wait_event(h->event_sync_wait_queue,
2952d604f533SWebb Scales 			atomic_read(&dev->reset_cmds_out) == 0 ||
2953d604f533SWebb Scales 			lockup_detected(h));
2954d604f533SWebb Scales 
2955d604f533SWebb Scales 	if (unlikely(lockup_detected(h))) {
2956d604f533SWebb Scales 		dev_warn(&h->pdev->dev,
2957d604f533SWebb Scales 			 "Controller lockup detected during reset wait\n");
2958d604f533SWebb Scales 		rc = -ENODEV;
2959d604f533SWebb Scales 	}
2960d604f533SWebb Scales 
2961d604f533SWebb Scales 	if (unlikely(rc))
2962d604f533SWebb Scales 		atomic_set(&dev->reset_cmds_out, 0);
2963d604f533SWebb Scales 
2964d604f533SWebb Scales 	mutex_unlock(&h->reset_mutex);
2965d604f533SWebb Scales 	return rc;
2966d604f533SWebb Scales }
2967d604f533SWebb Scales 
2968edd16368SStephen M. Cameron static void hpsa_get_raid_level(struct ctlr_info *h,
2969edd16368SStephen M. Cameron 	unsigned char *scsi3addr, unsigned char *raid_level)
2970edd16368SStephen M. Cameron {
2971edd16368SStephen M. Cameron 	int rc;
2972edd16368SStephen M. Cameron 	unsigned char *buf;
2973edd16368SStephen M. Cameron 
2974edd16368SStephen M. Cameron 	*raid_level = RAID_UNKNOWN;
2975edd16368SStephen M. Cameron 	buf = kzalloc(64, GFP_KERNEL);
2976edd16368SStephen M. Cameron 	if (!buf)
2977edd16368SStephen M. Cameron 		return;
2978b7bb24ebSStephen M. Cameron 	rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 0xC1, buf, 64);
2979edd16368SStephen M. Cameron 	if (rc == 0)
2980edd16368SStephen M. Cameron 		*raid_level = buf[8];
2981edd16368SStephen M. Cameron 	if (*raid_level > RAID_UNKNOWN)
2982edd16368SStephen M. Cameron 		*raid_level = RAID_UNKNOWN;
2983edd16368SStephen M. Cameron 	kfree(buf);
2984edd16368SStephen M. Cameron 	return;
2985edd16368SStephen M. Cameron }
2986edd16368SStephen M. Cameron 
2987283b4a9bSStephen M. Cameron #define HPSA_MAP_DEBUG
2988283b4a9bSStephen M. Cameron #ifdef HPSA_MAP_DEBUG
2989283b4a9bSStephen M. Cameron static void hpsa_debug_map_buff(struct ctlr_info *h, int rc,
2990283b4a9bSStephen M. Cameron 				struct raid_map_data *map_buff)
2991283b4a9bSStephen M. Cameron {
2992283b4a9bSStephen M. Cameron 	struct raid_map_disk_data *dd = &map_buff->data[0];
2993283b4a9bSStephen M. Cameron 	int map, row, col;
2994283b4a9bSStephen M. Cameron 	u16 map_cnt, row_cnt, disks_per_row;
2995283b4a9bSStephen M. Cameron 
2996283b4a9bSStephen M. Cameron 	if (rc != 0)
2997283b4a9bSStephen M. Cameron 		return;
2998283b4a9bSStephen M. Cameron 
29992ba8bfc8SStephen M. Cameron 	/* Show details only if debugging has been activated. */
30002ba8bfc8SStephen M. Cameron 	if (h->raid_offload_debug < 2)
30012ba8bfc8SStephen M. Cameron 		return;
30022ba8bfc8SStephen M. Cameron 
3003283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "structure_size = %u\n",
3004283b4a9bSStephen M. Cameron 				le32_to_cpu(map_buff->structure_size));
3005283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "volume_blk_size = %u\n",
3006283b4a9bSStephen M. Cameron 			le32_to_cpu(map_buff->volume_blk_size));
3007283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n",
3008283b4a9bSStephen M. Cameron 			le64_to_cpu(map_buff->volume_blk_cnt));
3009283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "physicalBlockShift = %u\n",
3010283b4a9bSStephen M. Cameron 			map_buff->phys_blk_shift);
3011283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n",
3012283b4a9bSStephen M. Cameron 			map_buff->parity_rotation_shift);
3013283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "strip_size = %u\n",
3014283b4a9bSStephen M. Cameron 			le16_to_cpu(map_buff->strip_size));
3015283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n",
3016283b4a9bSStephen M. Cameron 			le64_to_cpu(map_buff->disk_starting_blk));
3017283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n",
3018283b4a9bSStephen M. Cameron 			le64_to_cpu(map_buff->disk_blk_cnt));
3019283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "data_disks_per_row = %u\n",
3020283b4a9bSStephen M. Cameron 			le16_to_cpu(map_buff->data_disks_per_row));
3021283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n",
3022283b4a9bSStephen M. Cameron 			le16_to_cpu(map_buff->metadata_disks_per_row));
3023283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "row_cnt = %u\n",
3024283b4a9bSStephen M. Cameron 			le16_to_cpu(map_buff->row_cnt));
3025283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "layout_map_count = %u\n",
3026283b4a9bSStephen M. Cameron 			le16_to_cpu(map_buff->layout_map_count));
30272b08b3e9SDon Brace 	dev_info(&h->pdev->dev, "flags = 0x%x\n",
3028dd0e19f3SScott Teel 			le16_to_cpu(map_buff->flags));
30292b08b3e9SDon Brace 	dev_info(&h->pdev->dev, "encrypytion = %s\n",
30302b08b3e9SDon Brace 			le16_to_cpu(map_buff->flags) &
30312b08b3e9SDon Brace 			RAID_MAP_FLAG_ENCRYPT_ON ?  "ON" : "OFF");
3032dd0e19f3SScott Teel 	dev_info(&h->pdev->dev, "dekindex = %u\n",
3033dd0e19f3SScott Teel 			le16_to_cpu(map_buff->dekindex));
3034283b4a9bSStephen M. Cameron 	map_cnt = le16_to_cpu(map_buff->layout_map_count);
3035283b4a9bSStephen M. Cameron 	for (map = 0; map < map_cnt; map++) {
3036283b4a9bSStephen M. Cameron 		dev_info(&h->pdev->dev, "Map%u:\n", map);
3037283b4a9bSStephen M. Cameron 		row_cnt = le16_to_cpu(map_buff->row_cnt);
3038283b4a9bSStephen M. Cameron 		for (row = 0; row < row_cnt; row++) {
3039283b4a9bSStephen M. Cameron 			dev_info(&h->pdev->dev, "  Row%u:\n", row);
3040283b4a9bSStephen M. Cameron 			disks_per_row =
3041283b4a9bSStephen M. Cameron 				le16_to_cpu(map_buff->data_disks_per_row);
3042283b4a9bSStephen M. Cameron 			for (col = 0; col < disks_per_row; col++, dd++)
3043283b4a9bSStephen M. Cameron 				dev_info(&h->pdev->dev,
3044283b4a9bSStephen M. Cameron 					"    D%02u: h=0x%04x xor=%u,%u\n",
3045283b4a9bSStephen M. Cameron 					col, dd->ioaccel_handle,
3046283b4a9bSStephen M. Cameron 					dd->xor_mult[0], dd->xor_mult[1]);
3047283b4a9bSStephen M. Cameron 			disks_per_row =
3048283b4a9bSStephen M. Cameron 				le16_to_cpu(map_buff->metadata_disks_per_row);
3049283b4a9bSStephen M. Cameron 			for (col = 0; col < disks_per_row; col++, dd++)
3050283b4a9bSStephen M. Cameron 				dev_info(&h->pdev->dev,
3051283b4a9bSStephen M. Cameron 					"    M%02u: h=0x%04x xor=%u,%u\n",
3052283b4a9bSStephen M. Cameron 					col, dd->ioaccel_handle,
3053283b4a9bSStephen M. Cameron 					dd->xor_mult[0], dd->xor_mult[1]);
3054283b4a9bSStephen M. Cameron 		}
3055283b4a9bSStephen M. Cameron 	}
3056283b4a9bSStephen M. Cameron }
3057283b4a9bSStephen M. Cameron #else
3058283b4a9bSStephen M. Cameron static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h,
3059283b4a9bSStephen M. Cameron 			__attribute__((unused)) int rc,
3060283b4a9bSStephen M. Cameron 			__attribute__((unused)) struct raid_map_data *map_buff)
3061283b4a9bSStephen M. Cameron {
3062283b4a9bSStephen M. Cameron }
3063283b4a9bSStephen M. Cameron #endif
3064283b4a9bSStephen M. Cameron 
3065283b4a9bSStephen M. Cameron static int hpsa_get_raid_map(struct ctlr_info *h,
3066283b4a9bSStephen M. Cameron 	unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
3067283b4a9bSStephen M. Cameron {
3068283b4a9bSStephen M. Cameron 	int rc = 0;
3069283b4a9bSStephen M. Cameron 	struct CommandList *c;
3070283b4a9bSStephen M. Cameron 	struct ErrorInfo *ei;
3071283b4a9bSStephen M. Cameron 
307245fcb86eSStephen Cameron 	c = cmd_alloc(h);
3073bf43caf3SRobert Elliott 
3074283b4a9bSStephen M. Cameron 	if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map,
3075283b4a9bSStephen M. Cameron 			sizeof(this_device->raid_map), 0,
3076283b4a9bSStephen M. Cameron 			scsi3addr, TYPE_CMD)) {
30772dd02d74SRobert Elliott 		dev_warn(&h->pdev->dev, "hpsa_get_raid_map fill_cmd failed\n");
30782dd02d74SRobert Elliott 		cmd_free(h, c);
30792dd02d74SRobert Elliott 		return -1;
3080283b4a9bSStephen M. Cameron 	}
308125163bd5SWebb Scales 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
308225163bd5SWebb Scales 					PCI_DMA_FROMDEVICE, NO_TIMEOUT);
308325163bd5SWebb Scales 	if (rc)
308425163bd5SWebb Scales 		goto out;
3085283b4a9bSStephen M. Cameron 	ei = c->err_info;
3086283b4a9bSStephen M. Cameron 	if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3087d1e8beacSStephen M. Cameron 		hpsa_scsi_interpret_error(h, c);
308825163bd5SWebb Scales 		rc = -1;
308925163bd5SWebb Scales 		goto out;
3090283b4a9bSStephen M. Cameron 	}
309145fcb86eSStephen Cameron 	cmd_free(h, c);
3092283b4a9bSStephen M. Cameron 
3093283b4a9bSStephen M. Cameron 	/* @todo in the future, dynamically allocate RAID map memory */
3094283b4a9bSStephen M. Cameron 	if (le32_to_cpu(this_device->raid_map.structure_size) >
3095283b4a9bSStephen M. Cameron 				sizeof(this_device->raid_map)) {
3096283b4a9bSStephen M. Cameron 		dev_warn(&h->pdev->dev, "RAID map size is too large!\n");
3097283b4a9bSStephen M. Cameron 		rc = -1;
3098283b4a9bSStephen M. Cameron 	}
3099283b4a9bSStephen M. Cameron 	hpsa_debug_map_buff(h, rc, &this_device->raid_map);
3100283b4a9bSStephen M. Cameron 	return rc;
310125163bd5SWebb Scales out:
310225163bd5SWebb Scales 	cmd_free(h, c);
310325163bd5SWebb Scales 	return rc;
3104283b4a9bSStephen M. Cameron }
3105283b4a9bSStephen M. Cameron 
3106d04e62b9SKevin Barnett static int hpsa_bmic_sense_subsystem_information(struct ctlr_info *h,
3107d04e62b9SKevin Barnett 		unsigned char scsi3addr[], u16 bmic_device_index,
3108d04e62b9SKevin Barnett 		struct bmic_sense_subsystem_info *buf, size_t bufsize)
3109d04e62b9SKevin Barnett {
3110d04e62b9SKevin Barnett 	int rc = IO_OK;
3111d04e62b9SKevin Barnett 	struct CommandList *c;
3112d04e62b9SKevin Barnett 	struct ErrorInfo *ei;
3113d04e62b9SKevin Barnett 
3114d04e62b9SKevin Barnett 	c = cmd_alloc(h);
3115d04e62b9SKevin Barnett 
3116d04e62b9SKevin Barnett 	rc = fill_cmd(c, BMIC_SENSE_SUBSYSTEM_INFORMATION, h, buf, bufsize,
3117d04e62b9SKevin Barnett 		0, RAID_CTLR_LUNID, TYPE_CMD);
3118d04e62b9SKevin Barnett 	if (rc)
3119d04e62b9SKevin Barnett 		goto out;
3120d04e62b9SKevin Barnett 
3121d04e62b9SKevin Barnett 	c->Request.CDB[2] = bmic_device_index & 0xff;
3122d04e62b9SKevin Barnett 	c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff;
3123d04e62b9SKevin Barnett 
3124d04e62b9SKevin Barnett 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
3125d04e62b9SKevin Barnett 				PCI_DMA_FROMDEVICE, NO_TIMEOUT);
3126d04e62b9SKevin Barnett 	if (rc)
3127d04e62b9SKevin Barnett 		goto out;
3128d04e62b9SKevin Barnett 	ei = c->err_info;
3129d04e62b9SKevin Barnett 	if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3130d04e62b9SKevin Barnett 		hpsa_scsi_interpret_error(h, c);
3131d04e62b9SKevin Barnett 		rc = -1;
3132d04e62b9SKevin Barnett 	}
3133d04e62b9SKevin Barnett out:
3134d04e62b9SKevin Barnett 	cmd_free(h, c);
3135d04e62b9SKevin Barnett 	return rc;
3136d04e62b9SKevin Barnett }
3137d04e62b9SKevin Barnett 
313866749d0dSScott Teel static int hpsa_bmic_id_controller(struct ctlr_info *h,
313966749d0dSScott Teel 	struct bmic_identify_controller *buf, size_t bufsize)
314066749d0dSScott Teel {
314166749d0dSScott Teel 	int rc = IO_OK;
314266749d0dSScott Teel 	struct CommandList *c;
314366749d0dSScott Teel 	struct ErrorInfo *ei;
314466749d0dSScott Teel 
314566749d0dSScott Teel 	c = cmd_alloc(h);
314666749d0dSScott Teel 
314766749d0dSScott Teel 	rc = fill_cmd(c, BMIC_IDENTIFY_CONTROLLER, h, buf, bufsize,
314866749d0dSScott Teel 		0, RAID_CTLR_LUNID, TYPE_CMD);
314966749d0dSScott Teel 	if (rc)
315066749d0dSScott Teel 		goto out;
315166749d0dSScott Teel 
315266749d0dSScott Teel 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
315366749d0dSScott Teel 		PCI_DMA_FROMDEVICE, NO_TIMEOUT);
315466749d0dSScott Teel 	if (rc)
315566749d0dSScott Teel 		goto out;
315666749d0dSScott Teel 	ei = c->err_info;
315766749d0dSScott Teel 	if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
315866749d0dSScott Teel 		hpsa_scsi_interpret_error(h, c);
315966749d0dSScott Teel 		rc = -1;
316066749d0dSScott Teel 	}
316166749d0dSScott Teel out:
316266749d0dSScott Teel 	cmd_free(h, c);
316366749d0dSScott Teel 	return rc;
316466749d0dSScott Teel }
316566749d0dSScott Teel 
316603383736SDon Brace static int hpsa_bmic_id_physical_device(struct ctlr_info *h,
316703383736SDon Brace 		unsigned char scsi3addr[], u16 bmic_device_index,
316803383736SDon Brace 		struct bmic_identify_physical_device *buf, size_t bufsize)
316903383736SDon Brace {
317003383736SDon Brace 	int rc = IO_OK;
317103383736SDon Brace 	struct CommandList *c;
317203383736SDon Brace 	struct ErrorInfo *ei;
317303383736SDon Brace 
317403383736SDon Brace 	c = cmd_alloc(h);
317503383736SDon Brace 	rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize,
317603383736SDon Brace 		0, RAID_CTLR_LUNID, TYPE_CMD);
317703383736SDon Brace 	if (rc)
317803383736SDon Brace 		goto out;
317903383736SDon Brace 
318003383736SDon Brace 	c->Request.CDB[2] = bmic_device_index & 0xff;
318103383736SDon Brace 	c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff;
318203383736SDon Brace 
318325163bd5SWebb Scales 	hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE,
318425163bd5SWebb Scales 						NO_TIMEOUT);
318503383736SDon Brace 	ei = c->err_info;
318603383736SDon Brace 	if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
318703383736SDon Brace 		hpsa_scsi_interpret_error(h, c);
318803383736SDon Brace 		rc = -1;
318903383736SDon Brace 	}
319003383736SDon Brace out:
319103383736SDon Brace 	cmd_free(h, c);
3192d04e62b9SKevin Barnett 
319303383736SDon Brace 	return rc;
319403383736SDon Brace }
319503383736SDon Brace 
3196cca8f13bSDon Brace /*
3197cca8f13bSDon Brace  * get enclosure information
3198cca8f13bSDon Brace  * struct ReportExtendedLUNdata *rlep - Used for BMIC drive number
3199cca8f13bSDon Brace  * struct hpsa_scsi_dev_t *encl_dev - device entry for enclosure
3200cca8f13bSDon Brace  * Uses id_physical_device to determine the box_index.
3201cca8f13bSDon Brace  */
3202cca8f13bSDon Brace static void hpsa_get_enclosure_info(struct ctlr_info *h,
3203cca8f13bSDon Brace 			unsigned char *scsi3addr,
3204cca8f13bSDon Brace 			struct ReportExtendedLUNdata *rlep, int rle_index,
3205cca8f13bSDon Brace 			struct hpsa_scsi_dev_t *encl_dev)
3206cca8f13bSDon Brace {
3207cca8f13bSDon Brace 	int rc = -1;
3208cca8f13bSDon Brace 	struct CommandList *c = NULL;
3209cca8f13bSDon Brace 	struct ErrorInfo *ei = NULL;
3210cca8f13bSDon Brace 	struct bmic_sense_storage_box_params *bssbp = NULL;
3211cca8f13bSDon Brace 	struct bmic_identify_physical_device *id_phys = NULL;
3212cca8f13bSDon Brace 	struct ext_report_lun_entry *rle = &rlep->LUN[rle_index];
3213cca8f13bSDon Brace 	u16 bmic_device_index = 0;
3214cca8f13bSDon Brace 
3215cca8f13bSDon Brace 	bmic_device_index = GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]);
3216cca8f13bSDon Brace 
321717a9e54aSDon Brace 	if (bmic_device_index == 0xFF00 || MASKED_DEVICE(&rle->lunid[0])) {
321817a9e54aSDon Brace 		rc = IO_OK;
3219cca8f13bSDon Brace 		goto out;
322017a9e54aSDon Brace 	}
3221cca8f13bSDon Brace 
3222cca8f13bSDon Brace 	bssbp = kzalloc(sizeof(*bssbp), GFP_KERNEL);
3223cca8f13bSDon Brace 	if (!bssbp)
3224cca8f13bSDon Brace 		goto out;
3225cca8f13bSDon Brace 
3226cca8f13bSDon Brace 	id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
3227cca8f13bSDon Brace 	if (!id_phys)
3228cca8f13bSDon Brace 		goto out;
3229cca8f13bSDon Brace 
3230cca8f13bSDon Brace 	rc = hpsa_bmic_id_physical_device(h, scsi3addr, bmic_device_index,
3231cca8f13bSDon Brace 						id_phys, sizeof(*id_phys));
3232cca8f13bSDon Brace 	if (rc) {
3233cca8f13bSDon Brace 		dev_warn(&h->pdev->dev, "%s: id_phys failed %d bdi[0x%x]\n",
3234cca8f13bSDon Brace 			__func__, encl_dev->external, bmic_device_index);
3235cca8f13bSDon Brace 		goto out;
3236cca8f13bSDon Brace 	}
3237cca8f13bSDon Brace 
3238cca8f13bSDon Brace 	c = cmd_alloc(h);
3239cca8f13bSDon Brace 
3240cca8f13bSDon Brace 	rc = fill_cmd(c, BMIC_SENSE_STORAGE_BOX_PARAMS, h, bssbp,
3241cca8f13bSDon Brace 			sizeof(*bssbp), 0, RAID_CTLR_LUNID, TYPE_CMD);
3242cca8f13bSDon Brace 
3243cca8f13bSDon Brace 	if (rc)
3244cca8f13bSDon Brace 		goto out;
3245cca8f13bSDon Brace 
3246cca8f13bSDon Brace 	if (id_phys->phys_connector[1] == 'E')
3247cca8f13bSDon Brace 		c->Request.CDB[5] = id_phys->box_index;
3248cca8f13bSDon Brace 	else
3249cca8f13bSDon Brace 		c->Request.CDB[5] = 0;
3250cca8f13bSDon Brace 
3251cca8f13bSDon Brace 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE,
3252cca8f13bSDon Brace 						NO_TIMEOUT);
3253cca8f13bSDon Brace 	if (rc)
3254cca8f13bSDon Brace 		goto out;
3255cca8f13bSDon Brace 
3256cca8f13bSDon Brace 	ei = c->err_info;
3257cca8f13bSDon Brace 	if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3258cca8f13bSDon Brace 		rc = -1;
3259cca8f13bSDon Brace 		goto out;
3260cca8f13bSDon Brace 	}
3261cca8f13bSDon Brace 
3262cca8f13bSDon Brace 	encl_dev->box[id_phys->active_path_number] = bssbp->phys_box_on_port;
3263cca8f13bSDon Brace 	memcpy(&encl_dev->phys_connector[id_phys->active_path_number],
3264cca8f13bSDon Brace 		bssbp->phys_connector, sizeof(bssbp->phys_connector));
3265cca8f13bSDon Brace 
3266cca8f13bSDon Brace 	rc = IO_OK;
3267cca8f13bSDon Brace out:
3268cca8f13bSDon Brace 	kfree(bssbp);
3269cca8f13bSDon Brace 	kfree(id_phys);
3270cca8f13bSDon Brace 
3271cca8f13bSDon Brace 	if (c)
3272cca8f13bSDon Brace 		cmd_free(h, c);
3273cca8f13bSDon Brace 
3274cca8f13bSDon Brace 	if (rc != IO_OK)
3275cca8f13bSDon Brace 		hpsa_show_dev_msg(KERN_INFO, h, encl_dev,
3276cca8f13bSDon Brace 			"Error, could not get enclosure information\n");
3277cca8f13bSDon Brace }
3278cca8f13bSDon Brace 
3279d04e62b9SKevin Barnett static u64 hpsa_get_sas_address_from_report_physical(struct ctlr_info *h,
3280d04e62b9SKevin Barnett 						unsigned char *scsi3addr)
3281d04e62b9SKevin Barnett {
3282d04e62b9SKevin Barnett 	struct ReportExtendedLUNdata *physdev;
3283d04e62b9SKevin Barnett 	u32 nphysicals;
3284d04e62b9SKevin Barnett 	u64 sa = 0;
3285d04e62b9SKevin Barnett 	int i;
3286d04e62b9SKevin Barnett 
3287d04e62b9SKevin Barnett 	physdev = kzalloc(sizeof(*physdev), GFP_KERNEL);
3288d04e62b9SKevin Barnett 	if (!physdev)
3289d04e62b9SKevin Barnett 		return 0;
3290d04e62b9SKevin Barnett 
3291d04e62b9SKevin Barnett 	if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) {
3292d04e62b9SKevin Barnett 		dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
3293d04e62b9SKevin Barnett 		kfree(physdev);
3294d04e62b9SKevin Barnett 		return 0;
3295d04e62b9SKevin Barnett 	}
3296d04e62b9SKevin Barnett 	nphysicals = get_unaligned_be32(physdev->LUNListLength) / 24;
3297d04e62b9SKevin Barnett 
3298d04e62b9SKevin Barnett 	for (i = 0; i < nphysicals; i++)
3299d04e62b9SKevin Barnett 		if (!memcmp(&physdev->LUN[i].lunid[0], scsi3addr, 8)) {
3300d04e62b9SKevin Barnett 			sa = get_unaligned_be64(&physdev->LUN[i].wwid[0]);
3301d04e62b9SKevin Barnett 			break;
3302d04e62b9SKevin Barnett 		}
3303d04e62b9SKevin Barnett 
3304d04e62b9SKevin Barnett 	kfree(physdev);
3305d04e62b9SKevin Barnett 
3306d04e62b9SKevin Barnett 	return sa;
3307d04e62b9SKevin Barnett }
3308d04e62b9SKevin Barnett 
3309d04e62b9SKevin Barnett static void hpsa_get_sas_address(struct ctlr_info *h, unsigned char *scsi3addr,
3310d04e62b9SKevin Barnett 					struct hpsa_scsi_dev_t *dev)
3311d04e62b9SKevin Barnett {
3312d04e62b9SKevin Barnett 	int rc;
3313d04e62b9SKevin Barnett 	u64 sa = 0;
3314d04e62b9SKevin Barnett 
3315d04e62b9SKevin Barnett 	if (is_hba_lunid(scsi3addr)) {
3316d04e62b9SKevin Barnett 		struct bmic_sense_subsystem_info *ssi;
3317d04e62b9SKevin Barnett 
3318d04e62b9SKevin Barnett 		ssi = kzalloc(sizeof(*ssi), GFP_KERNEL);
3319d04e62b9SKevin Barnett 		if (ssi == NULL) {
3320d04e62b9SKevin Barnett 			dev_warn(&h->pdev->dev,
3321d04e62b9SKevin Barnett 				"%s: out of memory\n", __func__);
3322d04e62b9SKevin Barnett 			return;
3323d04e62b9SKevin Barnett 		}
3324d04e62b9SKevin Barnett 
3325d04e62b9SKevin Barnett 		rc = hpsa_bmic_sense_subsystem_information(h,
3326d04e62b9SKevin Barnett 					scsi3addr, 0, ssi, sizeof(*ssi));
3327d04e62b9SKevin Barnett 		if (rc == 0) {
3328d04e62b9SKevin Barnett 			sa = get_unaligned_be64(ssi->primary_world_wide_id);
3329d04e62b9SKevin Barnett 			h->sas_address = sa;
3330d04e62b9SKevin Barnett 		}
3331d04e62b9SKevin Barnett 
3332d04e62b9SKevin Barnett 		kfree(ssi);
3333d04e62b9SKevin Barnett 	} else
3334d04e62b9SKevin Barnett 		sa = hpsa_get_sas_address_from_report_physical(h, scsi3addr);
3335d04e62b9SKevin Barnett 
3336d04e62b9SKevin Barnett 	dev->sas_address = sa;
3337d04e62b9SKevin Barnett }
3338d04e62b9SKevin Barnett 
3339d04e62b9SKevin Barnett /* Get a device id from inquiry page 0x83 */
33401b70150aSStephen M. Cameron static int hpsa_vpd_page_supported(struct ctlr_info *h,
33411b70150aSStephen M. Cameron 	unsigned char scsi3addr[], u8 page)
33421b70150aSStephen M. Cameron {
33431b70150aSStephen M. Cameron 	int rc;
33441b70150aSStephen M. Cameron 	int i;
33451b70150aSStephen M. Cameron 	int pages;
33461b70150aSStephen M. Cameron 	unsigned char *buf, bufsize;
33471b70150aSStephen M. Cameron 
33481b70150aSStephen M. Cameron 	buf = kzalloc(256, GFP_KERNEL);
33491b70150aSStephen M. Cameron 	if (!buf)
33501b70150aSStephen M. Cameron 		return 0;
33511b70150aSStephen M. Cameron 
33521b70150aSStephen M. Cameron 	/* Get the size of the page list first */
33531b70150aSStephen M. Cameron 	rc = hpsa_scsi_do_inquiry(h, scsi3addr,
33541b70150aSStephen M. Cameron 				VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
33551b70150aSStephen M. Cameron 				buf, HPSA_VPD_HEADER_SZ);
33561b70150aSStephen M. Cameron 	if (rc != 0)
33571b70150aSStephen M. Cameron 		goto exit_unsupported;
33581b70150aSStephen M. Cameron 	pages = buf[3];
33591b70150aSStephen M. Cameron 	if ((pages + HPSA_VPD_HEADER_SZ) <= 255)
33601b70150aSStephen M. Cameron 		bufsize = pages + HPSA_VPD_HEADER_SZ;
33611b70150aSStephen M. Cameron 	else
33621b70150aSStephen M. Cameron 		bufsize = 255;
33631b70150aSStephen M. Cameron 
33641b70150aSStephen M. Cameron 	/* Get the whole VPD page list */
33651b70150aSStephen M. Cameron 	rc = hpsa_scsi_do_inquiry(h, scsi3addr,
33661b70150aSStephen M. Cameron 				VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
33671b70150aSStephen M. Cameron 				buf, bufsize);
33681b70150aSStephen M. Cameron 	if (rc != 0)
33691b70150aSStephen M. Cameron 		goto exit_unsupported;
33701b70150aSStephen M. Cameron 
33711b70150aSStephen M. Cameron 	pages = buf[3];
33721b70150aSStephen M. Cameron 	for (i = 1; i <= pages; i++)
33731b70150aSStephen M. Cameron 		if (buf[3 + i] == page)
33741b70150aSStephen M. Cameron 			goto exit_supported;
33751b70150aSStephen M. Cameron exit_unsupported:
33761b70150aSStephen M. Cameron 	kfree(buf);
33771b70150aSStephen M. Cameron 	return 0;
33781b70150aSStephen M. Cameron exit_supported:
33791b70150aSStephen M. Cameron 	kfree(buf);
33801b70150aSStephen M. Cameron 	return 1;
33811b70150aSStephen M. Cameron }
33821b70150aSStephen M. Cameron 
3383283b4a9bSStephen M. Cameron static void hpsa_get_ioaccel_status(struct ctlr_info *h,
3384283b4a9bSStephen M. Cameron 	unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
3385283b4a9bSStephen M. Cameron {
3386283b4a9bSStephen M. Cameron 	int rc;
3387283b4a9bSStephen M. Cameron 	unsigned char *buf;
3388283b4a9bSStephen M. Cameron 	u8 ioaccel_status;
3389283b4a9bSStephen M. Cameron 
3390283b4a9bSStephen M. Cameron 	this_device->offload_config = 0;
3391283b4a9bSStephen M. Cameron 	this_device->offload_enabled = 0;
339241ce4c35SStephen Cameron 	this_device->offload_to_be_enabled = 0;
3393283b4a9bSStephen M. Cameron 
3394283b4a9bSStephen M. Cameron 	buf = kzalloc(64, GFP_KERNEL);
3395283b4a9bSStephen M. Cameron 	if (!buf)
3396283b4a9bSStephen M. Cameron 		return;
33971b70150aSStephen M. Cameron 	if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS))
33981b70150aSStephen M. Cameron 		goto out;
3399283b4a9bSStephen M. Cameron 	rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3400b7bb24ebSStephen M. Cameron 			VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64);
3401283b4a9bSStephen M. Cameron 	if (rc != 0)
3402283b4a9bSStephen M. Cameron 		goto out;
3403283b4a9bSStephen M. Cameron 
3404283b4a9bSStephen M. Cameron #define IOACCEL_STATUS_BYTE 4
3405283b4a9bSStephen M. Cameron #define OFFLOAD_CONFIGURED_BIT 0x01
3406283b4a9bSStephen M. Cameron #define OFFLOAD_ENABLED_BIT 0x02
3407283b4a9bSStephen M. Cameron 	ioaccel_status = buf[IOACCEL_STATUS_BYTE];
3408283b4a9bSStephen M. Cameron 	this_device->offload_config =
3409283b4a9bSStephen M. Cameron 		!!(ioaccel_status & OFFLOAD_CONFIGURED_BIT);
3410283b4a9bSStephen M. Cameron 	if (this_device->offload_config) {
3411283b4a9bSStephen M. Cameron 		this_device->offload_enabled =
3412283b4a9bSStephen M. Cameron 			!!(ioaccel_status & OFFLOAD_ENABLED_BIT);
3413283b4a9bSStephen M. Cameron 		if (hpsa_get_raid_map(h, scsi3addr, this_device))
3414283b4a9bSStephen M. Cameron 			this_device->offload_enabled = 0;
3415283b4a9bSStephen M. Cameron 	}
341641ce4c35SStephen Cameron 	this_device->offload_to_be_enabled = this_device->offload_enabled;
3417283b4a9bSStephen M. Cameron out:
3418283b4a9bSStephen M. Cameron 	kfree(buf);
3419283b4a9bSStephen M. Cameron 	return;
3420283b4a9bSStephen M. Cameron }
3421283b4a9bSStephen M. Cameron 
3422edd16368SStephen M. Cameron /* Get the device id from inquiry page 0x83 */
3423edd16368SStephen M. Cameron static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
342475d23d89SDon Brace 	unsigned char *device_id, int index, int buflen)
3425edd16368SStephen M. Cameron {
3426edd16368SStephen M. Cameron 	int rc;
3427edd16368SStephen M. Cameron 	unsigned char *buf;
3428edd16368SStephen M. Cameron 
3429edd16368SStephen M. Cameron 	if (buflen > 16)
3430edd16368SStephen M. Cameron 		buflen = 16;
3431edd16368SStephen M. Cameron 	buf = kzalloc(64, GFP_KERNEL);
3432edd16368SStephen M. Cameron 	if (!buf)
3433a84d794dSStephen M. Cameron 		return -ENOMEM;
3434b7bb24ebSStephen M. Cameron 	rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 0x83, buf, 64);
3435edd16368SStephen M. Cameron 	if (rc == 0)
343675d23d89SDon Brace 		memcpy(device_id, &buf[index], buflen);
343775d23d89SDon Brace 
3438edd16368SStephen M. Cameron 	kfree(buf);
343975d23d89SDon Brace 
3440edd16368SStephen M. Cameron 	return rc != 0;
3441edd16368SStephen M. Cameron }
3442edd16368SStephen M. Cameron 
3443edd16368SStephen M. Cameron static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
344403383736SDon Brace 		void *buf, int bufsize,
3445edd16368SStephen M. Cameron 		int extended_response)
3446edd16368SStephen M. Cameron {
3447edd16368SStephen M. Cameron 	int rc = IO_OK;
3448edd16368SStephen M. Cameron 	struct CommandList *c;
3449edd16368SStephen M. Cameron 	unsigned char scsi3addr[8];
3450edd16368SStephen M. Cameron 	struct ErrorInfo *ei;
3451edd16368SStephen M. Cameron 
345245fcb86eSStephen Cameron 	c = cmd_alloc(h);
3453bf43caf3SRobert Elliott 
3454e89c0ae7SStephen M. Cameron 	/* address the controller */
3455e89c0ae7SStephen M. Cameron 	memset(scsi3addr, 0, sizeof(scsi3addr));
3456a2dac136SStephen M. Cameron 	if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
3457a2dac136SStephen M. Cameron 		buf, bufsize, 0, scsi3addr, TYPE_CMD)) {
3458a2dac136SStephen M. Cameron 		rc = -1;
3459a2dac136SStephen M. Cameron 		goto out;
3460a2dac136SStephen M. Cameron 	}
3461edd16368SStephen M. Cameron 	if (extended_response)
3462edd16368SStephen M. Cameron 		c->Request.CDB[1] = extended_response;
346325163bd5SWebb Scales 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
346425163bd5SWebb Scales 					PCI_DMA_FROMDEVICE, NO_TIMEOUT);
346525163bd5SWebb Scales 	if (rc)
346625163bd5SWebb Scales 		goto out;
3467edd16368SStephen M. Cameron 	ei = c->err_info;
3468edd16368SStephen M. Cameron 	if (ei->CommandStatus != 0 &&
3469edd16368SStephen M. Cameron 	    ei->CommandStatus != CMD_DATA_UNDERRUN) {
3470d1e8beacSStephen M. Cameron 		hpsa_scsi_interpret_error(h, c);
3471edd16368SStephen M. Cameron 		rc = -1;
3472283b4a9bSStephen M. Cameron 	} else {
347303383736SDon Brace 		struct ReportLUNdata *rld = buf;
347403383736SDon Brace 
347503383736SDon Brace 		if (rld->extended_response_flag != extended_response) {
3476283b4a9bSStephen M. Cameron 			dev_err(&h->pdev->dev,
3477283b4a9bSStephen M. Cameron 				"report luns requested format %u, got %u\n",
3478283b4a9bSStephen M. Cameron 				extended_response,
347903383736SDon Brace 				rld->extended_response_flag);
3480283b4a9bSStephen M. Cameron 			rc = -1;
3481283b4a9bSStephen M. Cameron 		}
3482edd16368SStephen M. Cameron 	}
3483a2dac136SStephen M. Cameron out:
348445fcb86eSStephen Cameron 	cmd_free(h, c);
3485edd16368SStephen M. Cameron 	return rc;
3486edd16368SStephen M. Cameron }
3487edd16368SStephen M. Cameron 
3488edd16368SStephen M. Cameron static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
348903383736SDon Brace 		struct ReportExtendedLUNdata *buf, int bufsize)
3490edd16368SStephen M. Cameron {
349103383736SDon Brace 	return hpsa_scsi_do_report_luns(h, 0, buf, bufsize,
349203383736SDon Brace 						HPSA_REPORT_PHYS_EXTENDED);
3493edd16368SStephen M. Cameron }
3494edd16368SStephen M. Cameron 
3495edd16368SStephen M. Cameron static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
3496edd16368SStephen M. Cameron 		struct ReportLUNdata *buf, int bufsize)
3497edd16368SStephen M. Cameron {
3498edd16368SStephen M. Cameron 	return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
3499edd16368SStephen M. Cameron }
3500edd16368SStephen M. Cameron 
3501edd16368SStephen M. Cameron static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
3502edd16368SStephen M. Cameron 	int bus, int target, int lun)
3503edd16368SStephen M. Cameron {
3504edd16368SStephen M. Cameron 	device->bus = bus;
3505edd16368SStephen M. Cameron 	device->target = target;
3506edd16368SStephen M. Cameron 	device->lun = lun;
3507edd16368SStephen M. Cameron }
3508edd16368SStephen M. Cameron 
35099846590eSStephen M. Cameron /* Use VPD inquiry to get details of volume status */
35109846590eSStephen M. Cameron static int hpsa_get_volume_status(struct ctlr_info *h,
35119846590eSStephen M. Cameron 					unsigned char scsi3addr[])
35129846590eSStephen M. Cameron {
35139846590eSStephen M. Cameron 	int rc;
35149846590eSStephen M. Cameron 	int status;
35159846590eSStephen M. Cameron 	int size;
35169846590eSStephen M. Cameron 	unsigned char *buf;
35179846590eSStephen M. Cameron 
35189846590eSStephen M. Cameron 	buf = kzalloc(64, GFP_KERNEL);
35199846590eSStephen M. Cameron 	if (!buf)
35209846590eSStephen M. Cameron 		return HPSA_VPD_LV_STATUS_UNSUPPORTED;
35219846590eSStephen M. Cameron 
35229846590eSStephen M. Cameron 	/* Does controller have VPD for logical volume status? */
352324a4b078SStephen M. Cameron 	if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS))
35249846590eSStephen M. Cameron 		goto exit_failed;
35259846590eSStephen M. Cameron 
35269846590eSStephen M. Cameron 	/* Get the size of the VPD return buffer */
35279846590eSStephen M. Cameron 	rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
35289846590eSStephen M. Cameron 					buf, HPSA_VPD_HEADER_SZ);
352924a4b078SStephen M. Cameron 	if (rc != 0)
35309846590eSStephen M. Cameron 		goto exit_failed;
35319846590eSStephen M. Cameron 	size = buf[3];
35329846590eSStephen M. Cameron 
35339846590eSStephen M. Cameron 	/* Now get the whole VPD buffer */
35349846590eSStephen M. Cameron 	rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
35359846590eSStephen M. Cameron 					buf, size + HPSA_VPD_HEADER_SZ);
353624a4b078SStephen M. Cameron 	if (rc != 0)
35379846590eSStephen M. Cameron 		goto exit_failed;
35389846590eSStephen M. Cameron 	status = buf[4]; /* status byte */
35399846590eSStephen M. Cameron 
35409846590eSStephen M. Cameron 	kfree(buf);
35419846590eSStephen M. Cameron 	return status;
35429846590eSStephen M. Cameron exit_failed:
35439846590eSStephen M. Cameron 	kfree(buf);
35449846590eSStephen M. Cameron 	return HPSA_VPD_LV_STATUS_UNSUPPORTED;
35459846590eSStephen M. Cameron }
35469846590eSStephen M. Cameron 
35479846590eSStephen M. Cameron /* Determine offline status of a volume.
35489846590eSStephen M. Cameron  * Return either:
35499846590eSStephen M. Cameron  *  0 (not offline)
355067955ba3SStephen M. Cameron  *  0xff (offline for unknown reasons)
35519846590eSStephen M. Cameron  *  # (integer code indicating one of several NOT READY states
35529846590eSStephen M. Cameron  *     describing why a volume is to be kept offline)
35539846590eSStephen M. Cameron  */
355467955ba3SStephen M. Cameron static int hpsa_volume_offline(struct ctlr_info *h,
35559846590eSStephen M. Cameron 					unsigned char scsi3addr[])
35569846590eSStephen M. Cameron {
35579846590eSStephen M. Cameron 	struct CommandList *c;
35589437ac43SStephen Cameron 	unsigned char *sense;
35599437ac43SStephen Cameron 	u8 sense_key, asc, ascq;
35609437ac43SStephen Cameron 	int sense_len;
356125163bd5SWebb Scales 	int rc, ldstat = 0;
35629846590eSStephen M. Cameron 	u16 cmd_status;
35639846590eSStephen M. Cameron 	u8 scsi_status;
35649846590eSStephen M. Cameron #define ASC_LUN_NOT_READY 0x04
35659846590eSStephen M. Cameron #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04
35669846590eSStephen M. Cameron #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02
35679846590eSStephen M. Cameron 
35689846590eSStephen M. Cameron 	c = cmd_alloc(h);
3569bf43caf3SRobert Elliott 
35709846590eSStephen M. Cameron 	(void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD);
357125163bd5SWebb Scales 	rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT);
357225163bd5SWebb Scales 	if (rc) {
357325163bd5SWebb Scales 		cmd_free(h, c);
357425163bd5SWebb Scales 		return 0;
357525163bd5SWebb Scales 	}
35769846590eSStephen M. Cameron 	sense = c->err_info->SenseInfo;
35779437ac43SStephen Cameron 	if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
35789437ac43SStephen Cameron 		sense_len = sizeof(c->err_info->SenseInfo);
35799437ac43SStephen Cameron 	else
35809437ac43SStephen Cameron 		sense_len = c->err_info->SenseLen;
35819437ac43SStephen Cameron 	decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq);
35829846590eSStephen M. Cameron 	cmd_status = c->err_info->CommandStatus;
35839846590eSStephen M. Cameron 	scsi_status = c->err_info->ScsiStatus;
35849846590eSStephen M. Cameron 	cmd_free(h, c);
35859846590eSStephen M. Cameron 	/* Is the volume 'not ready'? */
35869846590eSStephen M. Cameron 	if (cmd_status != CMD_TARGET_STATUS ||
35879846590eSStephen M. Cameron 		scsi_status != SAM_STAT_CHECK_CONDITION ||
35889846590eSStephen M. Cameron 		sense_key != NOT_READY ||
35899846590eSStephen M. Cameron 		asc != ASC_LUN_NOT_READY)  {
35909846590eSStephen M. Cameron 		return 0;
35919846590eSStephen M. Cameron 	}
35929846590eSStephen M. Cameron 
35939846590eSStephen M. Cameron 	/* Determine the reason for not ready state */
35949846590eSStephen M. Cameron 	ldstat = hpsa_get_volume_status(h, scsi3addr);
35959846590eSStephen M. Cameron 
35969846590eSStephen M. Cameron 	/* Keep volume offline in certain cases: */
35979846590eSStephen M. Cameron 	switch (ldstat) {
35989846590eSStephen M. Cameron 	case HPSA_LV_UNDERGOING_ERASE:
35995ca01204SScott Benesh 	case HPSA_LV_NOT_AVAILABLE:
36009846590eSStephen M. Cameron 	case HPSA_LV_UNDERGOING_RPI:
36019846590eSStephen M. Cameron 	case HPSA_LV_PENDING_RPI:
36029846590eSStephen M. Cameron 	case HPSA_LV_ENCRYPTED_NO_KEY:
36039846590eSStephen M. Cameron 	case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
36049846590eSStephen M. Cameron 	case HPSA_LV_UNDERGOING_ENCRYPTION:
36059846590eSStephen M. Cameron 	case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
36069846590eSStephen M. Cameron 	case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
36079846590eSStephen M. Cameron 		return ldstat;
36089846590eSStephen M. Cameron 	case HPSA_VPD_LV_STATUS_UNSUPPORTED:
36099846590eSStephen M. Cameron 		/* If VPD status page isn't available,
36109846590eSStephen M. Cameron 		 * use ASC/ASCQ to determine state
36119846590eSStephen M. Cameron 		 */
36129846590eSStephen M. Cameron 		if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) ||
36139846590eSStephen M. Cameron 			(ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ))
36149846590eSStephen M. Cameron 			return ldstat;
36159846590eSStephen M. Cameron 		break;
36169846590eSStephen M. Cameron 	default:
36179846590eSStephen M. Cameron 		break;
36189846590eSStephen M. Cameron 	}
36199846590eSStephen M. Cameron 	return 0;
36209846590eSStephen M. Cameron }
36219846590eSStephen M. Cameron 
36229b5c48c2SStephen Cameron /*
36239b5c48c2SStephen Cameron  * Find out if a logical device supports aborts by simply trying one.
36249b5c48c2SStephen Cameron  * Smart Array may claim not to support aborts on logical drives, but
36259b5c48c2SStephen Cameron  * if a MSA2000 * is connected, the drives on that will be presented
36269b5c48c2SStephen Cameron  * by the Smart Array as logical drives, and aborts may be sent to
36279b5c48c2SStephen Cameron  * those devices successfully.  So the simplest way to find out is
36289b5c48c2SStephen Cameron  * to simply try an abort and see how the device responds.
36299b5c48c2SStephen Cameron  */
36309b5c48c2SStephen Cameron static int hpsa_device_supports_aborts(struct ctlr_info *h,
36319b5c48c2SStephen Cameron 					unsigned char *scsi3addr)
36329b5c48c2SStephen Cameron {
36339b5c48c2SStephen Cameron 	struct CommandList *c;
36349b5c48c2SStephen Cameron 	struct ErrorInfo *ei;
36359b5c48c2SStephen Cameron 	int rc = 0;
36369b5c48c2SStephen Cameron 
36379b5c48c2SStephen Cameron 	u64 tag = (u64) -1; /* bogus tag */
36389b5c48c2SStephen Cameron 
36399b5c48c2SStephen Cameron 	/* Assume that physical devices support aborts */
36409b5c48c2SStephen Cameron 	if (!is_logical_dev_addr_mode(scsi3addr))
36419b5c48c2SStephen Cameron 		return 1;
36429b5c48c2SStephen Cameron 
36439b5c48c2SStephen Cameron 	c = cmd_alloc(h);
3644bf43caf3SRobert Elliott 
36459b5c48c2SStephen Cameron 	(void) fill_cmd(c, HPSA_ABORT_MSG, h, &tag, 0, 0, scsi3addr, TYPE_MSG);
36469b5c48c2SStephen Cameron 	(void) hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT);
36479b5c48c2SStephen Cameron 	/* no unmap needed here because no data xfer. */
36489b5c48c2SStephen Cameron 	ei = c->err_info;
36499b5c48c2SStephen Cameron 	switch (ei->CommandStatus) {
36509b5c48c2SStephen Cameron 	case CMD_INVALID:
36519b5c48c2SStephen Cameron 		rc = 0;
36529b5c48c2SStephen Cameron 		break;
36539b5c48c2SStephen Cameron 	case CMD_UNABORTABLE:
36549b5c48c2SStephen Cameron 	case CMD_ABORT_FAILED:
36559b5c48c2SStephen Cameron 		rc = 1;
36569b5c48c2SStephen Cameron 		break;
36579437ac43SStephen Cameron 	case CMD_TMF_STATUS:
36589437ac43SStephen Cameron 		rc = hpsa_evaluate_tmf_status(h, c);
36599437ac43SStephen Cameron 		break;
36609b5c48c2SStephen Cameron 	default:
36619b5c48c2SStephen Cameron 		rc = 0;
36629b5c48c2SStephen Cameron 		break;
36639b5c48c2SStephen Cameron 	}
36649b5c48c2SStephen Cameron 	cmd_free(h, c);
36659b5c48c2SStephen Cameron 	return rc;
36669b5c48c2SStephen Cameron }
36679b5c48c2SStephen Cameron 
366875d23d89SDon Brace static void sanitize_inquiry_string(unsigned char *s, int len)
366975d23d89SDon Brace {
367075d23d89SDon Brace 	bool terminated = false;
367175d23d89SDon Brace 
367275d23d89SDon Brace 	for (; len > 0; (--len, ++s)) {
367375d23d89SDon Brace 		if (*s == 0)
367475d23d89SDon Brace 			terminated = true;
367575d23d89SDon Brace 		if (terminated || *s < 0x20 || *s > 0x7e)
367675d23d89SDon Brace 			*s = ' ';
367775d23d89SDon Brace 	}
367875d23d89SDon Brace }
367975d23d89SDon Brace 
3680edd16368SStephen M. Cameron static int hpsa_update_device_info(struct ctlr_info *h,
36810b0e1d6cSStephen M. Cameron 	unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
36820b0e1d6cSStephen M. Cameron 	unsigned char *is_OBDR_device)
3683edd16368SStephen M. Cameron {
36840b0e1d6cSStephen M. Cameron 
36850b0e1d6cSStephen M. Cameron #define OBDR_SIG_OFFSET 43
36860b0e1d6cSStephen M. Cameron #define OBDR_TAPE_SIG "$DR-10"
36870b0e1d6cSStephen M. Cameron #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
36880b0e1d6cSStephen M. Cameron #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
36890b0e1d6cSStephen M. Cameron 
3690ea6d3bc3SStephen M. Cameron 	unsigned char *inq_buff;
36910b0e1d6cSStephen M. Cameron 	unsigned char *obdr_sig;
3692683fc444SDon Brace 	int rc = 0;
3693edd16368SStephen M. Cameron 
3694ea6d3bc3SStephen M. Cameron 	inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
3695683fc444SDon Brace 	if (!inq_buff) {
3696683fc444SDon Brace 		rc = -ENOMEM;
3697edd16368SStephen M. Cameron 		goto bail_out;
3698683fc444SDon Brace 	}
3699edd16368SStephen M. Cameron 
3700edd16368SStephen M. Cameron 	/* Do an inquiry to the device to see what it is. */
3701edd16368SStephen M. Cameron 	if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
3702edd16368SStephen M. Cameron 		(unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
3703edd16368SStephen M. Cameron 		/* Inquiry failed (msg printed already) */
3704edd16368SStephen M. Cameron 		dev_err(&h->pdev->dev,
3705edd16368SStephen M. Cameron 			"hpsa_update_device_info: inquiry failed\n");
3706683fc444SDon Brace 		rc = -EIO;
3707edd16368SStephen M. Cameron 		goto bail_out;
3708edd16368SStephen M. Cameron 	}
3709edd16368SStephen M. Cameron 
371075d23d89SDon Brace 	sanitize_inquiry_string(&inq_buff[8], 8);
371175d23d89SDon Brace 	sanitize_inquiry_string(&inq_buff[16], 16);
371275d23d89SDon Brace 
3713edd16368SStephen M. Cameron 	this_device->devtype = (inq_buff[0] & 0x1f);
3714edd16368SStephen M. Cameron 	memcpy(this_device->scsi3addr, scsi3addr, 8);
3715edd16368SStephen M. Cameron 	memcpy(this_device->vendor, &inq_buff[8],
3716edd16368SStephen M. Cameron 		sizeof(this_device->vendor));
3717edd16368SStephen M. Cameron 	memcpy(this_device->model, &inq_buff[16],
3718edd16368SStephen M. Cameron 		sizeof(this_device->model));
3719edd16368SStephen M. Cameron 	memset(this_device->device_id, 0,
3720edd16368SStephen M. Cameron 		sizeof(this_device->device_id));
372175d23d89SDon Brace 	hpsa_get_device_id(h, scsi3addr, this_device->device_id, 8,
3722edd16368SStephen M. Cameron 		sizeof(this_device->device_id));
3723edd16368SStephen M. Cameron 
3724af15ed36SDon Brace 	if ((this_device->devtype == TYPE_DISK ||
3725af15ed36SDon Brace 		this_device->devtype == TYPE_ZBC) &&
3726283b4a9bSStephen M. Cameron 		is_logical_dev_addr_mode(scsi3addr)) {
372767955ba3SStephen M. Cameron 		int volume_offline;
372867955ba3SStephen M. Cameron 
3729edd16368SStephen M. Cameron 		hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
3730283b4a9bSStephen M. Cameron 		if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC)
3731283b4a9bSStephen M. Cameron 			hpsa_get_ioaccel_status(h, scsi3addr, this_device);
373267955ba3SStephen M. Cameron 		volume_offline = hpsa_volume_offline(h, scsi3addr);
373367955ba3SStephen M. Cameron 		if (volume_offline < 0 || volume_offline > 0xff)
373467955ba3SStephen M. Cameron 			volume_offline = HPSA_VPD_LV_STATUS_UNSUPPORTED;
373567955ba3SStephen M. Cameron 		this_device->volume_offline = volume_offline & 0xff;
3736283b4a9bSStephen M. Cameron 	} else {
3737edd16368SStephen M. Cameron 		this_device->raid_level = RAID_UNKNOWN;
3738283b4a9bSStephen M. Cameron 		this_device->offload_config = 0;
3739283b4a9bSStephen M. Cameron 		this_device->offload_enabled = 0;
374041ce4c35SStephen Cameron 		this_device->offload_to_be_enabled = 0;
3741a3144e0bSJoe Handzik 		this_device->hba_ioaccel_enabled = 0;
37429846590eSStephen M. Cameron 		this_device->volume_offline = 0;
374303383736SDon Brace 		this_device->queue_depth = h->nr_cmds;
3744283b4a9bSStephen M. Cameron 	}
3745edd16368SStephen M. Cameron 
37460b0e1d6cSStephen M. Cameron 	if (is_OBDR_device) {
37470b0e1d6cSStephen M. Cameron 		/* See if this is a One-Button-Disaster-Recovery device
37480b0e1d6cSStephen M. Cameron 		 * by looking for "$DR-10" at offset 43 in inquiry data.
37490b0e1d6cSStephen M. Cameron 		 */
37500b0e1d6cSStephen M. Cameron 		obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
37510b0e1d6cSStephen M. Cameron 		*is_OBDR_device = (this_device->devtype == TYPE_ROM &&
37520b0e1d6cSStephen M. Cameron 					strncmp(obdr_sig, OBDR_TAPE_SIG,
37530b0e1d6cSStephen M. Cameron 						OBDR_SIG_LEN) == 0);
37540b0e1d6cSStephen M. Cameron 	}
3755edd16368SStephen M. Cameron 	kfree(inq_buff);
3756edd16368SStephen M. Cameron 	return 0;
3757edd16368SStephen M. Cameron 
3758edd16368SStephen M. Cameron bail_out:
3759edd16368SStephen M. Cameron 	kfree(inq_buff);
3760683fc444SDon Brace 	return rc;
3761edd16368SStephen M. Cameron }
3762edd16368SStephen M. Cameron 
37639b5c48c2SStephen Cameron static void hpsa_update_device_supports_aborts(struct ctlr_info *h,
37649b5c48c2SStephen Cameron 			struct hpsa_scsi_dev_t *dev, u8 *scsi3addr)
37659b5c48c2SStephen Cameron {
37669b5c48c2SStephen Cameron 	unsigned long flags;
37679b5c48c2SStephen Cameron 	int rc, entry;
37689b5c48c2SStephen Cameron 	/*
37699b5c48c2SStephen Cameron 	 * See if this device supports aborts.  If we already know
37709b5c48c2SStephen Cameron 	 * the device, we already know if it supports aborts, otherwise
37719b5c48c2SStephen Cameron 	 * we have to find out if it supports aborts by trying one.
37729b5c48c2SStephen Cameron 	 */
37739b5c48c2SStephen Cameron 	spin_lock_irqsave(&h->devlock, flags);
37749b5c48c2SStephen Cameron 	rc = hpsa_scsi_find_entry(dev, h->dev, h->ndevices, &entry);
37759b5c48c2SStephen Cameron 	if ((rc == DEVICE_SAME || rc == DEVICE_UPDATED) &&
37769b5c48c2SStephen Cameron 		entry >= 0 && entry < h->ndevices) {
37779b5c48c2SStephen Cameron 		dev->supports_aborts = h->dev[entry]->supports_aborts;
37789b5c48c2SStephen Cameron 		spin_unlock_irqrestore(&h->devlock, flags);
37799b5c48c2SStephen Cameron 	} else {
37809b5c48c2SStephen Cameron 		spin_unlock_irqrestore(&h->devlock, flags);
37819b5c48c2SStephen Cameron 		dev->supports_aborts =
37829b5c48c2SStephen Cameron 				hpsa_device_supports_aborts(h, scsi3addr);
37839b5c48c2SStephen Cameron 		if (dev->supports_aborts < 0)
37849b5c48c2SStephen Cameron 			dev->supports_aborts = 0;
37859b5c48c2SStephen Cameron 	}
37869b5c48c2SStephen Cameron }
37879b5c48c2SStephen Cameron 
3788c795505aSKevin Barnett /*
3789c795505aSKevin Barnett  * Helper function to assign bus, target, lun mapping of devices.
3790edd16368SStephen M. Cameron  * Logical drive target and lun are assigned at this time, but
3791edd16368SStephen M. Cameron  * physical device lun and target assignment are deferred (assigned
3792edd16368SStephen M. Cameron  * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
3793edd16368SStephen M. Cameron */
3794edd16368SStephen M. Cameron static void figure_bus_target_lun(struct ctlr_info *h,
37951f310bdeSStephen M. Cameron 	u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device)
3796edd16368SStephen M. Cameron {
3797c795505aSKevin Barnett 	u32 lunid = get_unaligned_le32(lunaddrbytes);
3798edd16368SStephen M. Cameron 
37991f310bdeSStephen M. Cameron 	if (!is_logical_dev_addr_mode(lunaddrbytes)) {
38001f310bdeSStephen M. Cameron 		/* physical device, target and lun filled in later */
38011f310bdeSStephen M. Cameron 		if (is_hba_lunid(lunaddrbytes))
3802c795505aSKevin Barnett 			hpsa_set_bus_target_lun(device,
3803c795505aSKevin Barnett 					HPSA_HBA_BUS, 0, lunid & 0x3fff);
38041f310bdeSStephen M. Cameron 		else
38051f310bdeSStephen M. Cameron 			/* defer target, lun assignment for physical devices */
3806c795505aSKevin Barnett 			hpsa_set_bus_target_lun(device,
3807c795505aSKevin Barnett 					HPSA_PHYSICAL_DEVICE_BUS, -1, -1);
38081f310bdeSStephen M. Cameron 		return;
38091f310bdeSStephen M. Cameron 	}
38101f310bdeSStephen M. Cameron 	/* It's a logical device */
381166749d0dSScott Teel 	if (device->external) {
38121f310bdeSStephen M. Cameron 		hpsa_set_bus_target_lun(device,
3813c795505aSKevin Barnett 			HPSA_EXTERNAL_RAID_VOLUME_BUS, (lunid >> 16) & 0x3fff,
3814c795505aSKevin Barnett 			lunid & 0x00ff);
38151f310bdeSStephen M. Cameron 		return;
3816339b2b14SStephen M. Cameron 	}
3817c795505aSKevin Barnett 	hpsa_set_bus_target_lun(device, HPSA_RAID_VOLUME_BUS,
3818c795505aSKevin Barnett 				0, lunid & 0x3fff);
3819edd16368SStephen M. Cameron }
3820edd16368SStephen M. Cameron 
3821edd16368SStephen M. Cameron 
3822edd16368SStephen M. Cameron /*
382354b6e9e9SScott Teel  * Get address of physical disk used for an ioaccel2 mode command:
382454b6e9e9SScott Teel  *	1. Extract ioaccel2 handle from the command.
382554b6e9e9SScott Teel  *	2. Find a matching ioaccel2 handle from list of physical disks.
382654b6e9e9SScott Teel  *	3. Return:
382754b6e9e9SScott Teel  *		1 and set scsi3addr to address of matching physical
382854b6e9e9SScott Teel  *		0 if no matching physical disk was found.
382954b6e9e9SScott Teel  */
383054b6e9e9SScott Teel static int hpsa_get_pdisk_of_ioaccel2(struct ctlr_info *h,
383154b6e9e9SScott Teel 	struct CommandList *ioaccel2_cmd_to_abort, unsigned char *scsi3addr)
383254b6e9e9SScott Teel {
383341ce4c35SStephen Cameron 	struct io_accel2_cmd *c2 =
383441ce4c35SStephen Cameron 			&h->ioaccel2_cmd_pool[ioaccel2_cmd_to_abort->cmdindex];
383541ce4c35SStephen Cameron 	unsigned long flags;
383654b6e9e9SScott Teel 	int i;
383754b6e9e9SScott Teel 
383841ce4c35SStephen Cameron 	spin_lock_irqsave(&h->devlock, flags);
383941ce4c35SStephen Cameron 	for (i = 0; i < h->ndevices; i++)
384041ce4c35SStephen Cameron 		if (h->dev[i]->ioaccel_handle == le32_to_cpu(c2->scsi_nexus)) {
384141ce4c35SStephen Cameron 			memcpy(scsi3addr, h->dev[i]->scsi3addr,
384241ce4c35SStephen Cameron 				sizeof(h->dev[i]->scsi3addr));
384341ce4c35SStephen Cameron 			spin_unlock_irqrestore(&h->devlock, flags);
384454b6e9e9SScott Teel 			return 1;
384554b6e9e9SScott Teel 		}
384641ce4c35SStephen Cameron 	spin_unlock_irqrestore(&h->devlock, flags);
384741ce4c35SStephen Cameron 	return 0;
384841ce4c35SStephen Cameron }
384941ce4c35SStephen Cameron 
385066749d0dSScott Teel static int  figure_external_status(struct ctlr_info *h, int raid_ctlr_position,
385166749d0dSScott Teel 	int i, int nphysicals, int nlocal_logicals)
385266749d0dSScott Teel {
385366749d0dSScott Teel 	/* In report logicals, local logicals are listed first,
385466749d0dSScott Teel 	* then any externals.
385566749d0dSScott Teel 	*/
385666749d0dSScott Teel 	int logicals_start = nphysicals + (raid_ctlr_position == 0);
385766749d0dSScott Teel 
385866749d0dSScott Teel 	if (i == raid_ctlr_position)
385966749d0dSScott Teel 		return 0;
386066749d0dSScott Teel 
386166749d0dSScott Teel 	if (i < logicals_start)
386266749d0dSScott Teel 		return 0;
386366749d0dSScott Teel 
386466749d0dSScott Teel 	/* i is in logicals range, but still within local logicals */
386566749d0dSScott Teel 	if ((i - nphysicals - (raid_ctlr_position == 0)) < nlocal_logicals)
386666749d0dSScott Teel 		return 0;
386766749d0dSScott Teel 
386866749d0dSScott Teel 	return 1; /* it's an external lun */
386966749d0dSScott Teel }
387066749d0dSScott Teel 
387154b6e9e9SScott Teel /*
3872edd16368SStephen M. Cameron  * Do CISS_REPORT_PHYS and CISS_REPORT_LOG.  Data is returned in physdev,
3873edd16368SStephen M. Cameron  * logdev.  The number of luns in physdev and logdev are returned in
3874edd16368SStephen M. Cameron  * *nphysicals and *nlogicals, respectively.
3875edd16368SStephen M. Cameron  * Returns 0 on success, -1 otherwise.
3876edd16368SStephen M. Cameron  */
3877edd16368SStephen M. Cameron static int hpsa_gather_lun_info(struct ctlr_info *h,
387803383736SDon Brace 	struct ReportExtendedLUNdata *physdev, u32 *nphysicals,
387901a02ffcSStephen M. Cameron 	struct ReportLUNdata *logdev, u32 *nlogicals)
3880edd16368SStephen M. Cameron {
388103383736SDon Brace 	if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) {
3882edd16368SStephen M. Cameron 		dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
3883edd16368SStephen M. Cameron 		return -1;
3884edd16368SStephen M. Cameron 	}
388503383736SDon Brace 	*nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24;
3886edd16368SStephen M. Cameron 	if (*nphysicals > HPSA_MAX_PHYS_LUN) {
388703383736SDon Brace 		dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n",
388803383736SDon Brace 			HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN);
3889edd16368SStephen M. Cameron 		*nphysicals = HPSA_MAX_PHYS_LUN;
3890edd16368SStephen M. Cameron 	}
389103383736SDon Brace 	if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) {
3892edd16368SStephen M. Cameron 		dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
3893edd16368SStephen M. Cameron 		return -1;
3894edd16368SStephen M. Cameron 	}
38956df1e954SStephen M. Cameron 	*nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
3896edd16368SStephen M. Cameron 	/* Reject Logicals in excess of our max capability. */
3897edd16368SStephen M. Cameron 	if (*nlogicals > HPSA_MAX_LUN) {
3898edd16368SStephen M. Cameron 		dev_warn(&h->pdev->dev,
3899edd16368SStephen M. Cameron 			"maximum logical LUNs (%d) exceeded.  "
3900edd16368SStephen M. Cameron 			"%d LUNs ignored.\n", HPSA_MAX_LUN,
3901edd16368SStephen M. Cameron 			*nlogicals - HPSA_MAX_LUN);
3902edd16368SStephen M. Cameron 			*nlogicals = HPSA_MAX_LUN;
3903edd16368SStephen M. Cameron 	}
3904edd16368SStephen M. Cameron 	if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
3905edd16368SStephen M. Cameron 		dev_warn(&h->pdev->dev,
3906edd16368SStephen M. Cameron 			"maximum logical + physical LUNs (%d) exceeded. "
3907edd16368SStephen M. Cameron 			"%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
3908edd16368SStephen M. Cameron 			*nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
3909edd16368SStephen M. Cameron 		*nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
3910edd16368SStephen M. Cameron 	}
3911edd16368SStephen M. Cameron 	return 0;
3912edd16368SStephen M. Cameron }
3913edd16368SStephen M. Cameron 
391442a91641SDon Brace static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position,
391542a91641SDon Brace 	int i, int nphysicals, int nlogicals,
3916a93aa1feSMatt Gates 	struct ReportExtendedLUNdata *physdev_list,
3917339b2b14SStephen M. Cameron 	struct ReportLUNdata *logdev_list)
3918339b2b14SStephen M. Cameron {
3919339b2b14SStephen M. Cameron 	/* Helper function, figure out where the LUN ID info is coming from
3920339b2b14SStephen M. Cameron 	 * given index i, lists of physical and logical devices, where in
3921339b2b14SStephen M. Cameron 	 * the list the raid controller is supposed to appear (first or last)
3922339b2b14SStephen M. Cameron 	 */
3923339b2b14SStephen M. Cameron 
3924339b2b14SStephen M. Cameron 	int logicals_start = nphysicals + (raid_ctlr_position == 0);
3925339b2b14SStephen M. Cameron 	int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
3926339b2b14SStephen M. Cameron 
3927339b2b14SStephen M. Cameron 	if (i == raid_ctlr_position)
3928339b2b14SStephen M. Cameron 		return RAID_CTLR_LUNID;
3929339b2b14SStephen M. Cameron 
3930339b2b14SStephen M. Cameron 	if (i < logicals_start)
3931d5b5d964SStephen M. Cameron 		return &physdev_list->LUN[i -
3932d5b5d964SStephen M. Cameron 				(raid_ctlr_position == 0)].lunid[0];
3933339b2b14SStephen M. Cameron 
3934339b2b14SStephen M. Cameron 	if (i < last_device)
3935339b2b14SStephen M. Cameron 		return &logdev_list->LUN[i - nphysicals -
3936339b2b14SStephen M. Cameron 			(raid_ctlr_position == 0)][0];
3937339b2b14SStephen M. Cameron 	BUG();
3938339b2b14SStephen M. Cameron 	return NULL;
3939339b2b14SStephen M. Cameron }
3940339b2b14SStephen M. Cameron 
394103383736SDon Brace /* get physical drive ioaccel handle and queue depth */
394203383736SDon Brace static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h,
394303383736SDon Brace 		struct hpsa_scsi_dev_t *dev,
3944f2039b03SDon Brace 		struct ReportExtendedLUNdata *rlep, int rle_index,
394503383736SDon Brace 		struct bmic_identify_physical_device *id_phys)
394603383736SDon Brace {
394703383736SDon Brace 	int rc;
3948f2039b03SDon Brace 	struct ext_report_lun_entry *rle = &rlep->LUN[rle_index];
394903383736SDon Brace 
395003383736SDon Brace 	dev->ioaccel_handle = rle->ioaccel_handle;
3951f2039b03SDon Brace 	if ((rle->device_flags & 0x08) && dev->ioaccel_handle)
3952a3144e0bSJoe Handzik 		dev->hba_ioaccel_enabled = 1;
395303383736SDon Brace 	memset(id_phys, 0, sizeof(*id_phys));
3954f2039b03SDon Brace 	rc = hpsa_bmic_id_physical_device(h, &rle->lunid[0],
3955f2039b03SDon Brace 			GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]), id_phys,
395603383736SDon Brace 			sizeof(*id_phys));
395703383736SDon Brace 	if (!rc)
395803383736SDon Brace 		/* Reserve space for FW operations */
395903383736SDon Brace #define DRIVE_CMDS_RESERVED_FOR_FW 2
396003383736SDon Brace #define DRIVE_QUEUE_DEPTH 7
396103383736SDon Brace 		dev->queue_depth =
396203383736SDon Brace 			le16_to_cpu(id_phys->current_queue_depth_limit) -
396303383736SDon Brace 				DRIVE_CMDS_RESERVED_FOR_FW;
396403383736SDon Brace 	else
396503383736SDon Brace 		dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */
396603383736SDon Brace }
396703383736SDon Brace 
39688270b862SJoe Handzik static void hpsa_get_path_info(struct hpsa_scsi_dev_t *this_device,
3969f2039b03SDon Brace 	struct ReportExtendedLUNdata *rlep, int rle_index,
39708270b862SJoe Handzik 	struct bmic_identify_physical_device *id_phys)
39718270b862SJoe Handzik {
3972f2039b03SDon Brace 	struct ext_report_lun_entry *rle = &rlep->LUN[rle_index];
3973f2039b03SDon Brace 
3974f2039b03SDon Brace 	if ((rle->device_flags & 0x08) && this_device->ioaccel_handle)
39758270b862SJoe Handzik 		this_device->hba_ioaccel_enabled = 1;
39768270b862SJoe Handzik 
39778270b862SJoe Handzik 	memcpy(&this_device->active_path_index,
39788270b862SJoe Handzik 		&id_phys->active_path_number,
39798270b862SJoe Handzik 		sizeof(this_device->active_path_index));
39808270b862SJoe Handzik 	memcpy(&this_device->path_map,
39818270b862SJoe Handzik 		&id_phys->redundant_path_present_map,
39828270b862SJoe Handzik 		sizeof(this_device->path_map));
39838270b862SJoe Handzik 	memcpy(&this_device->box,
39848270b862SJoe Handzik 		&id_phys->alternate_paths_phys_box_on_port,
39858270b862SJoe Handzik 		sizeof(this_device->box));
39868270b862SJoe Handzik 	memcpy(&this_device->phys_connector,
39878270b862SJoe Handzik 		&id_phys->alternate_paths_phys_connector,
39888270b862SJoe Handzik 		sizeof(this_device->phys_connector));
39898270b862SJoe Handzik 	memcpy(&this_device->bay,
39908270b862SJoe Handzik 		&id_phys->phys_bay_in_box,
39918270b862SJoe Handzik 		sizeof(this_device->bay));
39928270b862SJoe Handzik }
39938270b862SJoe Handzik 
399466749d0dSScott Teel /* get number of local logical disks. */
399566749d0dSScott Teel static int hpsa_set_local_logical_count(struct ctlr_info *h,
399666749d0dSScott Teel 	struct bmic_identify_controller *id_ctlr,
399766749d0dSScott Teel 	u32 *nlocals)
399866749d0dSScott Teel {
399966749d0dSScott Teel 	int rc;
400066749d0dSScott Teel 
400166749d0dSScott Teel 	if (!id_ctlr) {
400266749d0dSScott Teel 		dev_warn(&h->pdev->dev, "%s: id_ctlr buffer is NULL.\n",
400366749d0dSScott Teel 			__func__);
400466749d0dSScott Teel 		return -ENOMEM;
400566749d0dSScott Teel 	}
400666749d0dSScott Teel 	memset(id_ctlr, 0, sizeof(*id_ctlr));
400766749d0dSScott Teel 	rc = hpsa_bmic_id_controller(h, id_ctlr, sizeof(*id_ctlr));
400866749d0dSScott Teel 	if (!rc)
400966749d0dSScott Teel 		if (id_ctlr->configured_logical_drive_count < 256)
401066749d0dSScott Teel 			*nlocals = id_ctlr->configured_logical_drive_count;
401166749d0dSScott Teel 		else
401266749d0dSScott Teel 			*nlocals = le16_to_cpu(
401366749d0dSScott Teel 					id_ctlr->extended_logical_unit_count);
401466749d0dSScott Teel 	else
401566749d0dSScott Teel 		*nlocals = -1;
401666749d0dSScott Teel 	return rc;
401766749d0dSScott Teel }
401866749d0dSScott Teel 
401966749d0dSScott Teel 
40208aa60681SDon Brace static void hpsa_update_scsi_devices(struct ctlr_info *h)
4021edd16368SStephen M. Cameron {
4022edd16368SStephen M. Cameron 	/* the idea here is we could get notified
4023edd16368SStephen M. Cameron 	 * that some devices have changed, so we do a report
4024edd16368SStephen M. Cameron 	 * physical luns and report logical luns cmd, and adjust
4025edd16368SStephen M. Cameron 	 * our list of devices accordingly.
4026edd16368SStephen M. Cameron 	 *
4027edd16368SStephen M. Cameron 	 * The scsi3addr's of devices won't change so long as the
4028edd16368SStephen M. Cameron 	 * adapter is not reset.  That means we can rescan and
4029edd16368SStephen M. Cameron 	 * tell which devices we already know about, vs. new
4030edd16368SStephen M. Cameron 	 * devices, vs.  disappearing devices.
4031edd16368SStephen M. Cameron 	 */
4032a93aa1feSMatt Gates 	struct ReportExtendedLUNdata *physdev_list = NULL;
4033edd16368SStephen M. Cameron 	struct ReportLUNdata *logdev_list = NULL;
403403383736SDon Brace 	struct bmic_identify_physical_device *id_phys = NULL;
403566749d0dSScott Teel 	struct bmic_identify_controller *id_ctlr = NULL;
403601a02ffcSStephen M. Cameron 	u32 nphysicals = 0;
403701a02ffcSStephen M. Cameron 	u32 nlogicals = 0;
403866749d0dSScott Teel 	u32 nlocal_logicals = 0;
403901a02ffcSStephen M. Cameron 	u32 ndev_allocated = 0;
4040edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
4041edd16368SStephen M. Cameron 	int ncurrent = 0;
40424f4eb9f1SScott Teel 	int i, n_ext_target_devs, ndevs_to_allocate;
4043339b2b14SStephen M. Cameron 	int raid_ctlr_position;
404404fa2f44SKevin Barnett 	bool physical_device;
4045aca4a520SScott Teel 	DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS);
4046edd16368SStephen M. Cameron 
4047cfe5badcSScott Teel 	currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL);
404892084715SStephen M. Cameron 	physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL);
404992084715SStephen M. Cameron 	logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL);
4050edd16368SStephen M. Cameron 	tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
405103383736SDon Brace 	id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
405266749d0dSScott Teel 	id_ctlr = kzalloc(sizeof(*id_ctlr), GFP_KERNEL);
4053edd16368SStephen M. Cameron 
405403383736SDon Brace 	if (!currentsd || !physdev_list || !logdev_list ||
405566749d0dSScott Teel 		!tmpdevice || !id_phys || !id_ctlr) {
4056edd16368SStephen M. Cameron 		dev_err(&h->pdev->dev, "out of memory\n");
4057edd16368SStephen M. Cameron 		goto out;
4058edd16368SStephen M. Cameron 	}
4059edd16368SStephen M. Cameron 	memset(lunzerobits, 0, sizeof(lunzerobits));
4060edd16368SStephen M. Cameron 
4061853633e8SDon Brace 	h->drv_req_rescan = 0; /* cancel scheduled rescan - we're doing it. */
4062853633e8SDon Brace 
406303383736SDon Brace 	if (hpsa_gather_lun_info(h, physdev_list, &nphysicals,
4064853633e8SDon Brace 			logdev_list, &nlogicals)) {
4065853633e8SDon Brace 		h->drv_req_rescan = 1;
4066edd16368SStephen M. Cameron 		goto out;
4067853633e8SDon Brace 	}
4068edd16368SStephen M. Cameron 
406966749d0dSScott Teel 	/* Set number of local logicals (non PTRAID) */
407066749d0dSScott Teel 	if (hpsa_set_local_logical_count(h, id_ctlr, &nlocal_logicals)) {
407166749d0dSScott Teel 		dev_warn(&h->pdev->dev,
407266749d0dSScott Teel 			"%s: Can't determine number of local logical devices.\n",
407366749d0dSScott Teel 			__func__);
407466749d0dSScott Teel 	}
4075edd16368SStephen M. Cameron 
4076aca4a520SScott Teel 	/* We might see up to the maximum number of logical and physical disks
4077aca4a520SScott Teel 	 * plus external target devices, and a device for the local RAID
4078aca4a520SScott Teel 	 * controller.
4079edd16368SStephen M. Cameron 	 */
4080aca4a520SScott Teel 	ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1;
4081edd16368SStephen M. Cameron 
4082edd16368SStephen M. Cameron 	/* Allocate the per device structures */
4083edd16368SStephen M. Cameron 	for (i = 0; i < ndevs_to_allocate; i++) {
4084b7ec021fSScott Teel 		if (i >= HPSA_MAX_DEVICES) {
4085b7ec021fSScott Teel 			dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
4086b7ec021fSScott Teel 				"  %d devices ignored.\n", HPSA_MAX_DEVICES,
4087b7ec021fSScott Teel 				ndevs_to_allocate - HPSA_MAX_DEVICES);
4088b7ec021fSScott Teel 			break;
4089b7ec021fSScott Teel 		}
4090b7ec021fSScott Teel 
4091edd16368SStephen M. Cameron 		currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
4092edd16368SStephen M. Cameron 		if (!currentsd[i]) {
4093edd16368SStephen M. Cameron 			dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
4094edd16368SStephen M. Cameron 				__FILE__, __LINE__);
4095853633e8SDon Brace 			h->drv_req_rescan = 1;
4096edd16368SStephen M. Cameron 			goto out;
4097edd16368SStephen M. Cameron 		}
4098edd16368SStephen M. Cameron 		ndev_allocated++;
4099edd16368SStephen M. Cameron 	}
4100edd16368SStephen M. Cameron 
41018645291bSStephen M. Cameron 	if (is_scsi_rev_5(h))
4102339b2b14SStephen M. Cameron 		raid_ctlr_position = 0;
4103339b2b14SStephen M. Cameron 	else
4104339b2b14SStephen M. Cameron 		raid_ctlr_position = nphysicals + nlogicals;
4105339b2b14SStephen M. Cameron 
4106edd16368SStephen M. Cameron 	/* adjust our table of devices */
41074f4eb9f1SScott Teel 	n_ext_target_devs = 0;
4108edd16368SStephen M. Cameron 	for (i = 0; i < nphysicals + nlogicals + 1; i++) {
41090b0e1d6cSStephen M. Cameron 		u8 *lunaddrbytes, is_OBDR = 0;
4110683fc444SDon Brace 		int rc = 0;
4111f2039b03SDon Brace 		int phys_dev_index = i - (raid_ctlr_position == 0);
4112edd16368SStephen M. Cameron 
411304fa2f44SKevin Barnett 		physical_device = i < nphysicals + (raid_ctlr_position == 0);
4114edd16368SStephen M. Cameron 
4115edd16368SStephen M. Cameron 		/* Figure out where the LUN ID info is coming from */
4116339b2b14SStephen M. Cameron 		lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
4117339b2b14SStephen M. Cameron 			i, nphysicals, nlogicals, physdev_list, logdev_list);
411841ce4c35SStephen Cameron 
411941ce4c35SStephen Cameron 		/* skip masked non-disk devices */
412004fa2f44SKevin Barnett 		if (MASKED_DEVICE(lunaddrbytes) && physical_device &&
4121cca8f13bSDon Brace 		   (physdev_list->LUN[phys_dev_index].device_type != 0x06) &&
412204fa2f44SKevin Barnett 		   (physdev_list->LUN[phys_dev_index].device_flags & 0x01))
4123edd16368SStephen M. Cameron 			continue;
4124edd16368SStephen M. Cameron 
4125edd16368SStephen M. Cameron 		/* Get device type, vendor, model, device id */
4126683fc444SDon Brace 		rc = hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
4127683fc444SDon Brace 							&is_OBDR);
4128683fc444SDon Brace 		if (rc == -ENOMEM) {
4129683fc444SDon Brace 			dev_warn(&h->pdev->dev,
4130683fc444SDon Brace 				"Out of memory, rescan deferred.\n");
4131853633e8SDon Brace 			h->drv_req_rescan = 1;
4132683fc444SDon Brace 			goto out;
4133853633e8SDon Brace 		}
4134683fc444SDon Brace 		if (rc) {
4135683fc444SDon Brace 			dev_warn(&h->pdev->dev,
4136683fc444SDon Brace 				"Inquiry failed, skipping device.\n");
4137683fc444SDon Brace 			continue;
4138683fc444SDon Brace 		}
4139683fc444SDon Brace 
414066749d0dSScott Teel 		/* Determine if this is a lun from an external target array */
414166749d0dSScott Teel 		tmpdevice->external =
414266749d0dSScott Teel 			figure_external_status(h, raid_ctlr_position, i,
414366749d0dSScott Teel 						nphysicals, nlocal_logicals);
414466749d0dSScott Teel 
41451f310bdeSStephen M. Cameron 		figure_bus_target_lun(h, lunaddrbytes, tmpdevice);
41469b5c48c2SStephen Cameron 		hpsa_update_device_supports_aborts(h, tmpdevice, lunaddrbytes);
4147edd16368SStephen M. Cameron 		this_device = currentsd[ncurrent];
4148edd16368SStephen M. Cameron 
414934592254SScott Teel 		/* Turn on discovery_polling if there are ext target devices.
415034592254SScott Teel 		 * Event-based change notification is unreliable for those.
4151edd16368SStephen M. Cameron 		 */
415234592254SScott Teel 		if (!h->discovery_polling) {
415334592254SScott Teel 			if (tmpdevice->external) {
415434592254SScott Teel 				h->discovery_polling = 1;
415534592254SScott Teel 				dev_info(&h->pdev->dev,
415634592254SScott Teel 					"External target, activate discovery polling.\n");
4157edd16368SStephen M. Cameron 			}
415834592254SScott Teel 		}
415934592254SScott Teel 
4160edd16368SStephen M. Cameron 
4161edd16368SStephen M. Cameron 		*this_device = *tmpdevice;
416204fa2f44SKevin Barnett 		this_device->physical_device = physical_device;
4163edd16368SStephen M. Cameron 
416404fa2f44SKevin Barnett 		/*
416504fa2f44SKevin Barnett 		 * Expose all devices except for physical devices that
416604fa2f44SKevin Barnett 		 * are masked.
416704fa2f44SKevin Barnett 		 */
416804fa2f44SKevin Barnett 		if (MASKED_DEVICE(lunaddrbytes) && this_device->physical_device)
41692a168208SKevin Barnett 			this_device->expose_device = 0;
41702a168208SKevin Barnett 		else
41712a168208SKevin Barnett 			this_device->expose_device = 1;
417241ce4c35SStephen Cameron 
4173d04e62b9SKevin Barnett 
4174d04e62b9SKevin Barnett 		/*
4175d04e62b9SKevin Barnett 		 * Get the SAS address for physical devices that are exposed.
4176d04e62b9SKevin Barnett 		 */
4177d04e62b9SKevin Barnett 		if (this_device->physical_device && this_device->expose_device)
4178d04e62b9SKevin Barnett 			hpsa_get_sas_address(h, lunaddrbytes, this_device);
4179edd16368SStephen M. Cameron 
4180edd16368SStephen M. Cameron 		switch (this_device->devtype) {
41810b0e1d6cSStephen M. Cameron 		case TYPE_ROM:
4182edd16368SStephen M. Cameron 			/* We don't *really* support actual CD-ROM devices,
4183edd16368SStephen M. Cameron 			 * just "One Button Disaster Recovery" tape drive
4184edd16368SStephen M. Cameron 			 * which temporarily pretends to be a CD-ROM drive.
4185edd16368SStephen M. Cameron 			 * So we check that the device is really an OBDR tape
4186edd16368SStephen M. Cameron 			 * device by checking for "$DR-10" in bytes 43-48 of
4187edd16368SStephen M. Cameron 			 * the inquiry data.
4188edd16368SStephen M. Cameron 			 */
41890b0e1d6cSStephen M. Cameron 			if (is_OBDR)
4190edd16368SStephen M. Cameron 				ncurrent++;
4191edd16368SStephen M. Cameron 			break;
4192edd16368SStephen M. Cameron 		case TYPE_DISK:
4193af15ed36SDon Brace 		case TYPE_ZBC:
419404fa2f44SKevin Barnett 			if (this_device->physical_device) {
4195b9092b79SKevin Barnett 				/* The disk is in HBA mode. */
4196b9092b79SKevin Barnett 				/* Never use RAID mapper in HBA mode. */
4197ecf418d1SJoe Handzik 				this_device->offload_enabled = 0;
419803383736SDon Brace 				hpsa_get_ioaccel_drive_info(h, this_device,
4199f2039b03SDon Brace 					physdev_list, phys_dev_index, id_phys);
4200f2039b03SDon Brace 				hpsa_get_path_info(this_device,
4201f2039b03SDon Brace 					physdev_list, phys_dev_index, id_phys);
4202b9092b79SKevin Barnett 			}
4203edd16368SStephen M. Cameron 			ncurrent++;
4204edd16368SStephen M. Cameron 			break;
4205edd16368SStephen M. Cameron 		case TYPE_TAPE:
4206edd16368SStephen M. Cameron 		case TYPE_MEDIUM_CHANGER:
4207cca8f13bSDon Brace 			ncurrent++;
4208cca8f13bSDon Brace 			break;
420941ce4c35SStephen Cameron 		case TYPE_ENCLOSURE:
421017a9e54aSDon Brace 			if (!this_device->external)
4211cca8f13bSDon Brace 				hpsa_get_enclosure_info(h, lunaddrbytes,
4212cca8f13bSDon Brace 						physdev_list, phys_dev_index,
4213cca8f13bSDon Brace 						this_device);
421441ce4c35SStephen Cameron 			ncurrent++;
421541ce4c35SStephen Cameron 			break;
4216edd16368SStephen M. Cameron 		case TYPE_RAID:
4217edd16368SStephen M. Cameron 			/* Only present the Smartarray HBA as a RAID controller.
4218edd16368SStephen M. Cameron 			 * If it's a RAID controller other than the HBA itself
4219edd16368SStephen M. Cameron 			 * (an external RAID controller, MSA500 or similar)
4220edd16368SStephen M. Cameron 			 * don't present it.
4221edd16368SStephen M. Cameron 			 */
4222edd16368SStephen M. Cameron 			if (!is_hba_lunid(lunaddrbytes))
4223edd16368SStephen M. Cameron 				break;
4224edd16368SStephen M. Cameron 			ncurrent++;
4225edd16368SStephen M. Cameron 			break;
4226edd16368SStephen M. Cameron 		default:
4227edd16368SStephen M. Cameron 			break;
4228edd16368SStephen M. Cameron 		}
4229cfe5badcSScott Teel 		if (ncurrent >= HPSA_MAX_DEVICES)
4230edd16368SStephen M. Cameron 			break;
4231edd16368SStephen M. Cameron 	}
4232d04e62b9SKevin Barnett 
4233d04e62b9SKevin Barnett 	if (h->sas_host == NULL) {
4234d04e62b9SKevin Barnett 		int rc = 0;
4235d04e62b9SKevin Barnett 
4236d04e62b9SKevin Barnett 		rc = hpsa_add_sas_host(h);
4237d04e62b9SKevin Barnett 		if (rc) {
4238d04e62b9SKevin Barnett 			dev_warn(&h->pdev->dev,
4239d04e62b9SKevin Barnett 				"Could not add sas host %d\n", rc);
4240d04e62b9SKevin Barnett 			goto out;
4241d04e62b9SKevin Barnett 		}
4242d04e62b9SKevin Barnett 	}
4243d04e62b9SKevin Barnett 
42448aa60681SDon Brace 	adjust_hpsa_scsi_table(h, currentsd, ncurrent);
4245edd16368SStephen M. Cameron out:
4246edd16368SStephen M. Cameron 	kfree(tmpdevice);
4247edd16368SStephen M. Cameron 	for (i = 0; i < ndev_allocated; i++)
4248edd16368SStephen M. Cameron 		kfree(currentsd[i]);
4249edd16368SStephen M. Cameron 	kfree(currentsd);
4250edd16368SStephen M. Cameron 	kfree(physdev_list);
4251edd16368SStephen M. Cameron 	kfree(logdev_list);
425266749d0dSScott Teel 	kfree(id_ctlr);
425303383736SDon Brace 	kfree(id_phys);
4254edd16368SStephen M. Cameron }
4255edd16368SStephen M. Cameron 
4256ec5cbf04SWebb Scales static void hpsa_set_sg_descriptor(struct SGDescriptor *desc,
4257ec5cbf04SWebb Scales 				   struct scatterlist *sg)
4258ec5cbf04SWebb Scales {
4259ec5cbf04SWebb Scales 	u64 addr64 = (u64) sg_dma_address(sg);
4260ec5cbf04SWebb Scales 	unsigned int len = sg_dma_len(sg);
4261ec5cbf04SWebb Scales 
4262ec5cbf04SWebb Scales 	desc->Addr = cpu_to_le64(addr64);
4263ec5cbf04SWebb Scales 	desc->Len = cpu_to_le32(len);
4264ec5cbf04SWebb Scales 	desc->Ext = 0;
4265ec5cbf04SWebb Scales }
4266ec5cbf04SWebb Scales 
4267c7ee65b3SWebb Scales /*
4268c7ee65b3SWebb Scales  * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
4269edd16368SStephen M. Cameron  * dma mapping  and fills in the scatter gather entries of the
4270edd16368SStephen M. Cameron  * hpsa command, cp.
4271edd16368SStephen M. Cameron  */
427233a2ffceSStephen M. Cameron static int hpsa_scatter_gather(struct ctlr_info *h,
4273edd16368SStephen M. Cameron 		struct CommandList *cp,
4274edd16368SStephen M. Cameron 		struct scsi_cmnd *cmd)
4275edd16368SStephen M. Cameron {
4276edd16368SStephen M. Cameron 	struct scatterlist *sg;
4277b3a7ba7cSWebb Scales 	int use_sg, i, sg_limit, chained, last_sg;
427833a2ffceSStephen M. Cameron 	struct SGDescriptor *curr_sg;
4279edd16368SStephen M. Cameron 
428033a2ffceSStephen M. Cameron 	BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
4281edd16368SStephen M. Cameron 
4282edd16368SStephen M. Cameron 	use_sg = scsi_dma_map(cmd);
4283edd16368SStephen M. Cameron 	if (use_sg < 0)
4284edd16368SStephen M. Cameron 		return use_sg;
4285edd16368SStephen M. Cameron 
4286edd16368SStephen M. Cameron 	if (!use_sg)
4287edd16368SStephen M. Cameron 		goto sglist_finished;
4288edd16368SStephen M. Cameron 
4289b3a7ba7cSWebb Scales 	/*
4290b3a7ba7cSWebb Scales 	 * If the number of entries is greater than the max for a single list,
4291b3a7ba7cSWebb Scales 	 * then we have a chained list; we will set up all but one entry in the
4292b3a7ba7cSWebb Scales 	 * first list (the last entry is saved for link information);
4293b3a7ba7cSWebb Scales 	 * otherwise, we don't have a chained list and we'll set up at each of
4294b3a7ba7cSWebb Scales 	 * the entries in the one list.
4295b3a7ba7cSWebb Scales 	 */
429633a2ffceSStephen M. Cameron 	curr_sg = cp->SG;
4297b3a7ba7cSWebb Scales 	chained = use_sg > h->max_cmd_sg_entries;
4298b3a7ba7cSWebb Scales 	sg_limit = chained ? h->max_cmd_sg_entries - 1 : use_sg;
4299b3a7ba7cSWebb Scales 	last_sg = scsi_sg_count(cmd) - 1;
4300b3a7ba7cSWebb Scales 	scsi_for_each_sg(cmd, sg, sg_limit, i) {
4301ec5cbf04SWebb Scales 		hpsa_set_sg_descriptor(curr_sg, sg);
430233a2ffceSStephen M. Cameron 		curr_sg++;
430333a2ffceSStephen M. Cameron 	}
4304ec5cbf04SWebb Scales 
4305b3a7ba7cSWebb Scales 	if (chained) {
4306b3a7ba7cSWebb Scales 		/*
4307b3a7ba7cSWebb Scales 		 * Continue with the chained list.  Set curr_sg to the chained
4308b3a7ba7cSWebb Scales 		 * list.  Modify the limit to the total count less the entries
4309b3a7ba7cSWebb Scales 		 * we've already set up.  Resume the scan at the list entry
4310b3a7ba7cSWebb Scales 		 * where the previous loop left off.
4311b3a7ba7cSWebb Scales 		 */
4312b3a7ba7cSWebb Scales 		curr_sg = h->cmd_sg_list[cp->cmdindex];
4313b3a7ba7cSWebb Scales 		sg_limit = use_sg - sg_limit;
4314b3a7ba7cSWebb Scales 		for_each_sg(sg, sg, sg_limit, i) {
4315b3a7ba7cSWebb Scales 			hpsa_set_sg_descriptor(curr_sg, sg);
4316b3a7ba7cSWebb Scales 			curr_sg++;
4317b3a7ba7cSWebb Scales 		}
4318b3a7ba7cSWebb Scales 	}
4319b3a7ba7cSWebb Scales 
4320ec5cbf04SWebb Scales 	/* Back the pointer up to the last entry and mark it as "last". */
4321b3a7ba7cSWebb Scales 	(curr_sg - 1)->Ext = cpu_to_le32(HPSA_SG_LAST);
432233a2ffceSStephen M. Cameron 
432333a2ffceSStephen M. Cameron 	if (use_sg + chained > h->maxSG)
432433a2ffceSStephen M. Cameron 		h->maxSG = use_sg + chained;
432533a2ffceSStephen M. Cameron 
432633a2ffceSStephen M. Cameron 	if (chained) {
432733a2ffceSStephen M. Cameron 		cp->Header.SGList = h->max_cmd_sg_entries;
432850a0decfSStephen M. Cameron 		cp->Header.SGTotal = cpu_to_le16(use_sg + 1);
4329e2bea6dfSStephen M. Cameron 		if (hpsa_map_sg_chain_block(h, cp)) {
4330e2bea6dfSStephen M. Cameron 			scsi_dma_unmap(cmd);
4331e2bea6dfSStephen M. Cameron 			return -1;
4332e2bea6dfSStephen M. Cameron 		}
433333a2ffceSStephen M. Cameron 		return 0;
4334edd16368SStephen M. Cameron 	}
4335edd16368SStephen M. Cameron 
4336edd16368SStephen M. Cameron sglist_finished:
4337edd16368SStephen M. Cameron 
433801a02ffcSStephen M. Cameron 	cp->Header.SGList = (u8) use_sg;   /* no. SGs contig in this cmd */
4339c7ee65b3SWebb Scales 	cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */
4340edd16368SStephen M. Cameron 	return 0;
4341edd16368SStephen M. Cameron }
4342edd16368SStephen M. Cameron 
4343283b4a9bSStephen M. Cameron #define IO_ACCEL_INELIGIBLE (1)
4344283b4a9bSStephen M. Cameron static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len)
4345283b4a9bSStephen M. Cameron {
4346283b4a9bSStephen M. Cameron 	int is_write = 0;
4347283b4a9bSStephen M. Cameron 	u32 block;
4348283b4a9bSStephen M. Cameron 	u32 block_cnt;
4349283b4a9bSStephen M. Cameron 
4350283b4a9bSStephen M. Cameron 	/* Perform some CDB fixups if needed using 10 byte reads/writes only */
4351283b4a9bSStephen M. Cameron 	switch (cdb[0]) {
4352283b4a9bSStephen M. Cameron 	case WRITE_6:
4353283b4a9bSStephen M. Cameron 	case WRITE_12:
4354283b4a9bSStephen M. Cameron 		is_write = 1;
4355283b4a9bSStephen M. Cameron 	case READ_6:
4356283b4a9bSStephen M. Cameron 	case READ_12:
4357283b4a9bSStephen M. Cameron 		if (*cdb_len == 6) {
4358c8a6c9a6SDon Brace 			block = get_unaligned_be16(&cdb[2]);
4359283b4a9bSStephen M. Cameron 			block_cnt = cdb[4];
4360c8a6c9a6SDon Brace 			if (block_cnt == 0)
4361c8a6c9a6SDon Brace 				block_cnt = 256;
4362283b4a9bSStephen M. Cameron 		} else {
4363283b4a9bSStephen M. Cameron 			BUG_ON(*cdb_len != 12);
4364c8a6c9a6SDon Brace 			block = get_unaligned_be32(&cdb[2]);
4365c8a6c9a6SDon Brace 			block_cnt = get_unaligned_be32(&cdb[6]);
4366283b4a9bSStephen M. Cameron 		}
4367283b4a9bSStephen M. Cameron 		if (block_cnt > 0xffff)
4368283b4a9bSStephen M. Cameron 			return IO_ACCEL_INELIGIBLE;
4369283b4a9bSStephen M. Cameron 
4370283b4a9bSStephen M. Cameron 		cdb[0] = is_write ? WRITE_10 : READ_10;
4371283b4a9bSStephen M. Cameron 		cdb[1] = 0;
4372283b4a9bSStephen M. Cameron 		cdb[2] = (u8) (block >> 24);
4373283b4a9bSStephen M. Cameron 		cdb[3] = (u8) (block >> 16);
4374283b4a9bSStephen M. Cameron 		cdb[4] = (u8) (block >> 8);
4375283b4a9bSStephen M. Cameron 		cdb[5] = (u8) (block);
4376283b4a9bSStephen M. Cameron 		cdb[6] = 0;
4377283b4a9bSStephen M. Cameron 		cdb[7] = (u8) (block_cnt >> 8);
4378283b4a9bSStephen M. Cameron 		cdb[8] = (u8) (block_cnt);
4379283b4a9bSStephen M. Cameron 		cdb[9] = 0;
4380283b4a9bSStephen M. Cameron 		*cdb_len = 10;
4381283b4a9bSStephen M. Cameron 		break;
4382283b4a9bSStephen M. Cameron 	}
4383283b4a9bSStephen M. Cameron 	return 0;
4384283b4a9bSStephen M. Cameron }
4385283b4a9bSStephen M. Cameron 
4386c349775eSScott Teel static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h,
4387283b4a9bSStephen M. Cameron 	struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
438803383736SDon Brace 	u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4389e1f7de0cSMatt Gates {
4390e1f7de0cSMatt Gates 	struct scsi_cmnd *cmd = c->scsi_cmd;
4391e1f7de0cSMatt Gates 	struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
4392e1f7de0cSMatt Gates 	unsigned int len;
4393e1f7de0cSMatt Gates 	unsigned int total_len = 0;
4394e1f7de0cSMatt Gates 	struct scatterlist *sg;
4395e1f7de0cSMatt Gates 	u64 addr64;
4396e1f7de0cSMatt Gates 	int use_sg, i;
4397e1f7de0cSMatt Gates 	struct SGDescriptor *curr_sg;
4398e1f7de0cSMatt Gates 	u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE;
4399e1f7de0cSMatt Gates 
4400283b4a9bSStephen M. Cameron 	/* TODO: implement chaining support */
440103383736SDon Brace 	if (scsi_sg_count(cmd) > h->ioaccel_maxsg) {
440203383736SDon Brace 		atomic_dec(&phys_disk->ioaccel_cmds_out);
4403283b4a9bSStephen M. Cameron 		return IO_ACCEL_INELIGIBLE;
440403383736SDon Brace 	}
4405283b4a9bSStephen M. Cameron 
4406e1f7de0cSMatt Gates 	BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX);
4407e1f7de0cSMatt Gates 
440803383736SDon Brace 	if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
440903383736SDon Brace 		atomic_dec(&phys_disk->ioaccel_cmds_out);
4410283b4a9bSStephen M. Cameron 		return IO_ACCEL_INELIGIBLE;
441103383736SDon Brace 	}
4412283b4a9bSStephen M. Cameron 
4413e1f7de0cSMatt Gates 	c->cmd_type = CMD_IOACCEL1;
4414e1f7de0cSMatt Gates 
4415e1f7de0cSMatt Gates 	/* Adjust the DMA address to point to the accelerated command buffer */
4416e1f7de0cSMatt Gates 	c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle +
4417e1f7de0cSMatt Gates 				(c->cmdindex * sizeof(*cp));
4418e1f7de0cSMatt Gates 	BUG_ON(c->busaddr & 0x0000007F);
4419e1f7de0cSMatt Gates 
4420e1f7de0cSMatt Gates 	use_sg = scsi_dma_map(cmd);
442103383736SDon Brace 	if (use_sg < 0) {
442203383736SDon Brace 		atomic_dec(&phys_disk->ioaccel_cmds_out);
4423e1f7de0cSMatt Gates 		return use_sg;
442403383736SDon Brace 	}
4425e1f7de0cSMatt Gates 
4426e1f7de0cSMatt Gates 	if (use_sg) {
4427e1f7de0cSMatt Gates 		curr_sg = cp->SG;
4428e1f7de0cSMatt Gates 		scsi_for_each_sg(cmd, sg, use_sg, i) {
4429e1f7de0cSMatt Gates 			addr64 = (u64) sg_dma_address(sg);
4430e1f7de0cSMatt Gates 			len  = sg_dma_len(sg);
4431e1f7de0cSMatt Gates 			total_len += len;
443250a0decfSStephen M. Cameron 			curr_sg->Addr = cpu_to_le64(addr64);
443350a0decfSStephen M. Cameron 			curr_sg->Len = cpu_to_le32(len);
443450a0decfSStephen M. Cameron 			curr_sg->Ext = cpu_to_le32(0);
4435e1f7de0cSMatt Gates 			curr_sg++;
4436e1f7de0cSMatt Gates 		}
443750a0decfSStephen M. Cameron 		(--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST);
4438e1f7de0cSMatt Gates 
4439e1f7de0cSMatt Gates 		switch (cmd->sc_data_direction) {
4440e1f7de0cSMatt Gates 		case DMA_TO_DEVICE:
4441e1f7de0cSMatt Gates 			control |= IOACCEL1_CONTROL_DATA_OUT;
4442e1f7de0cSMatt Gates 			break;
4443e1f7de0cSMatt Gates 		case DMA_FROM_DEVICE:
4444e1f7de0cSMatt Gates 			control |= IOACCEL1_CONTROL_DATA_IN;
4445e1f7de0cSMatt Gates 			break;
4446e1f7de0cSMatt Gates 		case DMA_NONE:
4447e1f7de0cSMatt Gates 			control |= IOACCEL1_CONTROL_NODATAXFER;
4448e1f7de0cSMatt Gates 			break;
4449e1f7de0cSMatt Gates 		default:
4450e1f7de0cSMatt Gates 			dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4451e1f7de0cSMatt Gates 			cmd->sc_data_direction);
4452e1f7de0cSMatt Gates 			BUG();
4453e1f7de0cSMatt Gates 			break;
4454e1f7de0cSMatt Gates 		}
4455e1f7de0cSMatt Gates 	} else {
4456e1f7de0cSMatt Gates 		control |= IOACCEL1_CONTROL_NODATAXFER;
4457e1f7de0cSMatt Gates 	}
4458e1f7de0cSMatt Gates 
4459c349775eSScott Teel 	c->Header.SGList = use_sg;
4460e1f7de0cSMatt Gates 	/* Fill out the command structure to submit */
44612b08b3e9SDon Brace 	cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF);
44622b08b3e9SDon Brace 	cp->transfer_len = cpu_to_le32(total_len);
44632b08b3e9SDon Brace 	cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ |
44642b08b3e9SDon Brace 			(cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK));
44652b08b3e9SDon Brace 	cp->control = cpu_to_le32(control);
4466283b4a9bSStephen M. Cameron 	memcpy(cp->CDB, cdb, cdb_len);
4467283b4a9bSStephen M. Cameron 	memcpy(cp->CISS_LUN, scsi3addr, 8);
4468c349775eSScott Teel 	/* Tag was already set at init time. */
4469e1f7de0cSMatt Gates 	enqueue_cmd_and_start_io(h, c);
4470e1f7de0cSMatt Gates 	return 0;
4471e1f7de0cSMatt Gates }
4472edd16368SStephen M. Cameron 
4473283b4a9bSStephen M. Cameron /*
4474283b4a9bSStephen M. Cameron  * Queue a command directly to a device behind the controller using the
4475283b4a9bSStephen M. Cameron  * I/O accelerator path.
4476283b4a9bSStephen M. Cameron  */
4477283b4a9bSStephen M. Cameron static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h,
4478283b4a9bSStephen M. Cameron 	struct CommandList *c)
4479283b4a9bSStephen M. Cameron {
4480283b4a9bSStephen M. Cameron 	struct scsi_cmnd *cmd = c->scsi_cmd;
4481283b4a9bSStephen M. Cameron 	struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4482283b4a9bSStephen M. Cameron 
448303383736SDon Brace 	c->phys_disk = dev;
448403383736SDon Brace 
4485283b4a9bSStephen M. Cameron 	return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle,
448603383736SDon Brace 		cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev);
4487283b4a9bSStephen M. Cameron }
4488283b4a9bSStephen M. Cameron 
4489dd0e19f3SScott Teel /*
4490dd0e19f3SScott Teel  * Set encryption parameters for the ioaccel2 request
4491dd0e19f3SScott Teel  */
4492dd0e19f3SScott Teel static void set_encrypt_ioaccel2(struct ctlr_info *h,
4493dd0e19f3SScott Teel 	struct CommandList *c, struct io_accel2_cmd *cp)
4494dd0e19f3SScott Teel {
4495dd0e19f3SScott Teel 	struct scsi_cmnd *cmd = c->scsi_cmd;
4496dd0e19f3SScott Teel 	struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4497dd0e19f3SScott Teel 	struct raid_map_data *map = &dev->raid_map;
4498dd0e19f3SScott Teel 	u64 first_block;
4499dd0e19f3SScott Teel 
4500dd0e19f3SScott Teel 	/* Are we doing encryption on this device */
45012b08b3e9SDon Brace 	if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON))
4502dd0e19f3SScott Teel 		return;
4503dd0e19f3SScott Teel 	/* Set the data encryption key index. */
4504dd0e19f3SScott Teel 	cp->dekindex = map->dekindex;
4505dd0e19f3SScott Teel 
4506dd0e19f3SScott Teel 	/* Set the encryption enable flag, encoded into direction field. */
4507dd0e19f3SScott Teel 	cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK;
4508dd0e19f3SScott Teel 
4509dd0e19f3SScott Teel 	/* Set encryption tweak values based on logical block address
4510dd0e19f3SScott Teel 	 * If block size is 512, tweak value is LBA.
4511dd0e19f3SScott Teel 	 * For other block sizes, tweak is (LBA * block size)/ 512)
4512dd0e19f3SScott Teel 	 */
4513dd0e19f3SScott Teel 	switch (cmd->cmnd[0]) {
4514dd0e19f3SScott Teel 	/* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */
4515dd0e19f3SScott Teel 	case WRITE_6:
4516dd0e19f3SScott Teel 	case READ_6:
45172b08b3e9SDon Brace 		first_block = get_unaligned_be16(&cmd->cmnd[2]);
4518dd0e19f3SScott Teel 		break;
4519dd0e19f3SScott Teel 	case WRITE_10:
4520dd0e19f3SScott Teel 	case READ_10:
4521dd0e19f3SScott Teel 	/* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */
4522dd0e19f3SScott Teel 	case WRITE_12:
4523dd0e19f3SScott Teel 	case READ_12:
45242b08b3e9SDon Brace 		first_block = get_unaligned_be32(&cmd->cmnd[2]);
4525dd0e19f3SScott Teel 		break;
4526dd0e19f3SScott Teel 	case WRITE_16:
4527dd0e19f3SScott Teel 	case READ_16:
45282b08b3e9SDon Brace 		first_block = get_unaligned_be64(&cmd->cmnd[2]);
4529dd0e19f3SScott Teel 		break;
4530dd0e19f3SScott Teel 	default:
4531dd0e19f3SScott Teel 		dev_err(&h->pdev->dev,
45322b08b3e9SDon Brace 			"ERROR: %s: size (0x%x) not supported for encryption\n",
45332b08b3e9SDon Brace 			__func__, cmd->cmnd[0]);
4534dd0e19f3SScott Teel 		BUG();
4535dd0e19f3SScott Teel 		break;
4536dd0e19f3SScott Teel 	}
45372b08b3e9SDon Brace 
45382b08b3e9SDon Brace 	if (le32_to_cpu(map->volume_blk_size) != 512)
45392b08b3e9SDon Brace 		first_block = first_block *
45402b08b3e9SDon Brace 				le32_to_cpu(map->volume_blk_size)/512;
45412b08b3e9SDon Brace 
45422b08b3e9SDon Brace 	cp->tweak_lower = cpu_to_le32(first_block);
45432b08b3e9SDon Brace 	cp->tweak_upper = cpu_to_le32(first_block >> 32);
4544dd0e19f3SScott Teel }
4545dd0e19f3SScott Teel 
4546c349775eSScott Teel static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h,
4547c349775eSScott Teel 	struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
454803383736SDon Brace 	u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4549c349775eSScott Teel {
4550c349775eSScott Teel 	struct scsi_cmnd *cmd = c->scsi_cmd;
4551c349775eSScott Teel 	struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
4552c349775eSScott Teel 	struct ioaccel2_sg_element *curr_sg;
4553c349775eSScott Teel 	int use_sg, i;
4554c349775eSScott Teel 	struct scatterlist *sg;
4555c349775eSScott Teel 	u64 addr64;
4556c349775eSScott Teel 	u32 len;
4557c349775eSScott Teel 	u32 total_len = 0;
4558c349775eSScott Teel 
4559d9a729f3SWebb Scales 	BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
4560c349775eSScott Teel 
456103383736SDon Brace 	if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
456203383736SDon Brace 		atomic_dec(&phys_disk->ioaccel_cmds_out);
4563c349775eSScott Teel 		return IO_ACCEL_INELIGIBLE;
456403383736SDon Brace 	}
456503383736SDon Brace 
4566c349775eSScott Teel 	c->cmd_type = CMD_IOACCEL2;
4567c349775eSScott Teel 	/* Adjust the DMA address to point to the accelerated command buffer */
4568c349775eSScott Teel 	c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle +
4569c349775eSScott Teel 				(c->cmdindex * sizeof(*cp));
4570c349775eSScott Teel 	BUG_ON(c->busaddr & 0x0000007F);
4571c349775eSScott Teel 
4572c349775eSScott Teel 	memset(cp, 0, sizeof(*cp));
4573c349775eSScott Teel 	cp->IU_type = IOACCEL2_IU_TYPE;
4574c349775eSScott Teel 
4575c349775eSScott Teel 	use_sg = scsi_dma_map(cmd);
457603383736SDon Brace 	if (use_sg < 0) {
457703383736SDon Brace 		atomic_dec(&phys_disk->ioaccel_cmds_out);
4578c349775eSScott Teel 		return use_sg;
457903383736SDon Brace 	}
4580c349775eSScott Teel 
4581c349775eSScott Teel 	if (use_sg) {
4582c349775eSScott Teel 		curr_sg = cp->sg;
4583d9a729f3SWebb Scales 		if (use_sg > h->ioaccel_maxsg) {
4584d9a729f3SWebb Scales 			addr64 = le64_to_cpu(
4585d9a729f3SWebb Scales 				h->ioaccel2_cmd_sg_list[c->cmdindex]->address);
4586d9a729f3SWebb Scales 			curr_sg->address = cpu_to_le64(addr64);
4587d9a729f3SWebb Scales 			curr_sg->length = 0;
4588d9a729f3SWebb Scales 			curr_sg->reserved[0] = 0;
4589d9a729f3SWebb Scales 			curr_sg->reserved[1] = 0;
4590d9a729f3SWebb Scales 			curr_sg->reserved[2] = 0;
4591d9a729f3SWebb Scales 			curr_sg->chain_indicator = 0x80;
4592d9a729f3SWebb Scales 
4593d9a729f3SWebb Scales 			curr_sg = h->ioaccel2_cmd_sg_list[c->cmdindex];
4594d9a729f3SWebb Scales 		}
4595c349775eSScott Teel 		scsi_for_each_sg(cmd, sg, use_sg, i) {
4596c349775eSScott Teel 			addr64 = (u64) sg_dma_address(sg);
4597c349775eSScott Teel 			len  = sg_dma_len(sg);
4598c349775eSScott Teel 			total_len += len;
4599c349775eSScott Teel 			curr_sg->address = cpu_to_le64(addr64);
4600c349775eSScott Teel 			curr_sg->length = cpu_to_le32(len);
4601c349775eSScott Teel 			curr_sg->reserved[0] = 0;
4602c349775eSScott Teel 			curr_sg->reserved[1] = 0;
4603c349775eSScott Teel 			curr_sg->reserved[2] = 0;
4604c349775eSScott Teel 			curr_sg->chain_indicator = 0;
4605c349775eSScott Teel 			curr_sg++;
4606c349775eSScott Teel 		}
4607c349775eSScott Teel 
4608c349775eSScott Teel 		switch (cmd->sc_data_direction) {
4609c349775eSScott Teel 		case DMA_TO_DEVICE:
4610dd0e19f3SScott Teel 			cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4611dd0e19f3SScott Teel 			cp->direction |= IOACCEL2_DIR_DATA_OUT;
4612c349775eSScott Teel 			break;
4613c349775eSScott Teel 		case DMA_FROM_DEVICE:
4614dd0e19f3SScott Teel 			cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4615dd0e19f3SScott Teel 			cp->direction |= IOACCEL2_DIR_DATA_IN;
4616c349775eSScott Teel 			break;
4617c349775eSScott Teel 		case DMA_NONE:
4618dd0e19f3SScott Teel 			cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4619dd0e19f3SScott Teel 			cp->direction |= IOACCEL2_DIR_NO_DATA;
4620c349775eSScott Teel 			break;
4621c349775eSScott Teel 		default:
4622c349775eSScott Teel 			dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4623c349775eSScott Teel 				cmd->sc_data_direction);
4624c349775eSScott Teel 			BUG();
4625c349775eSScott Teel 			break;
4626c349775eSScott Teel 		}
4627c349775eSScott Teel 	} else {
4628dd0e19f3SScott Teel 		cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4629dd0e19f3SScott Teel 		cp->direction |= IOACCEL2_DIR_NO_DATA;
4630c349775eSScott Teel 	}
4631dd0e19f3SScott Teel 
4632dd0e19f3SScott Teel 	/* Set encryption parameters, if necessary */
4633dd0e19f3SScott Teel 	set_encrypt_ioaccel2(h, c, cp);
4634dd0e19f3SScott Teel 
46352b08b3e9SDon Brace 	cp->scsi_nexus = cpu_to_le32(ioaccel_handle);
4636f2405db8SDon Brace 	cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT);
4637c349775eSScott Teel 	memcpy(cp->cdb, cdb, sizeof(cp->cdb));
4638c349775eSScott Teel 
4639c349775eSScott Teel 	cp->data_len = cpu_to_le32(total_len);
4640c349775eSScott Teel 	cp->err_ptr = cpu_to_le64(c->busaddr +
4641c349775eSScott Teel 			offsetof(struct io_accel2_cmd, error_data));
464250a0decfSStephen M. Cameron 	cp->err_len = cpu_to_le32(sizeof(cp->error_data));
4643c349775eSScott Teel 
4644d9a729f3SWebb Scales 	/* fill in sg elements */
4645d9a729f3SWebb Scales 	if (use_sg > h->ioaccel_maxsg) {
4646d9a729f3SWebb Scales 		cp->sg_count = 1;
4647a736e9b6SDon Brace 		cp->sg[0].length = cpu_to_le32(use_sg * sizeof(cp->sg[0]));
4648d9a729f3SWebb Scales 		if (hpsa_map_ioaccel2_sg_chain_block(h, cp, c)) {
4649d9a729f3SWebb Scales 			atomic_dec(&phys_disk->ioaccel_cmds_out);
4650d9a729f3SWebb Scales 			scsi_dma_unmap(cmd);
4651d9a729f3SWebb Scales 			return -1;
4652d9a729f3SWebb Scales 		}
4653d9a729f3SWebb Scales 	} else
4654d9a729f3SWebb Scales 		cp->sg_count = (u8) use_sg;
4655d9a729f3SWebb Scales 
4656c349775eSScott Teel 	enqueue_cmd_and_start_io(h, c);
4657c349775eSScott Teel 	return 0;
4658c349775eSScott Teel }
4659c349775eSScott Teel 
4660c349775eSScott Teel /*
4661c349775eSScott Teel  * Queue a command to the correct I/O accelerator path.
4662c349775eSScott Teel  */
4663c349775eSScott Teel static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
4664c349775eSScott Teel 	struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
466503383736SDon Brace 	u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4666c349775eSScott Teel {
466703383736SDon Brace 	/* Try to honor the device's queue depth */
466803383736SDon Brace 	if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) >
466903383736SDon Brace 					phys_disk->queue_depth) {
467003383736SDon Brace 		atomic_dec(&phys_disk->ioaccel_cmds_out);
467103383736SDon Brace 		return IO_ACCEL_INELIGIBLE;
467203383736SDon Brace 	}
4673c349775eSScott Teel 	if (h->transMethod & CFGTBL_Trans_io_accel1)
4674c349775eSScott Teel 		return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle,
467503383736SDon Brace 						cdb, cdb_len, scsi3addr,
467603383736SDon Brace 						phys_disk);
4677c349775eSScott Teel 	else
4678c349775eSScott Teel 		return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle,
467903383736SDon Brace 						cdb, cdb_len, scsi3addr,
468003383736SDon Brace 						phys_disk);
4681c349775eSScott Teel }
4682c349775eSScott Teel 
46836b80b18fSScott Teel static void raid_map_helper(struct raid_map_data *map,
46846b80b18fSScott Teel 		int offload_to_mirror, u32 *map_index, u32 *current_group)
46856b80b18fSScott Teel {
46866b80b18fSScott Teel 	if (offload_to_mirror == 0)  {
46876b80b18fSScott Teel 		/* use physical disk in the first mirrored group. */
46882b08b3e9SDon Brace 		*map_index %= le16_to_cpu(map->data_disks_per_row);
46896b80b18fSScott Teel 		return;
46906b80b18fSScott Teel 	}
46916b80b18fSScott Teel 	do {
46926b80b18fSScott Teel 		/* determine mirror group that *map_index indicates */
46932b08b3e9SDon Brace 		*current_group = *map_index /
46942b08b3e9SDon Brace 			le16_to_cpu(map->data_disks_per_row);
46956b80b18fSScott Teel 		if (offload_to_mirror == *current_group)
46966b80b18fSScott Teel 			continue;
46972b08b3e9SDon Brace 		if (*current_group < le16_to_cpu(map->layout_map_count) - 1) {
46986b80b18fSScott Teel 			/* select map index from next group */
46992b08b3e9SDon Brace 			*map_index += le16_to_cpu(map->data_disks_per_row);
47006b80b18fSScott Teel 			(*current_group)++;
47016b80b18fSScott Teel 		} else {
47026b80b18fSScott Teel 			/* select map index from first group */
47032b08b3e9SDon Brace 			*map_index %= le16_to_cpu(map->data_disks_per_row);
47046b80b18fSScott Teel 			*current_group = 0;
47056b80b18fSScott Teel 		}
47066b80b18fSScott Teel 	} while (offload_to_mirror != *current_group);
47076b80b18fSScott Teel }
47086b80b18fSScott Teel 
4709283b4a9bSStephen M. Cameron /*
4710283b4a9bSStephen M. Cameron  * Attempt to perform offload RAID mapping for a logical volume I/O.
4711283b4a9bSStephen M. Cameron  */
4712283b4a9bSStephen M. Cameron static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h,
4713283b4a9bSStephen M. Cameron 	struct CommandList *c)
4714283b4a9bSStephen M. Cameron {
4715283b4a9bSStephen M. Cameron 	struct scsi_cmnd *cmd = c->scsi_cmd;
4716283b4a9bSStephen M. Cameron 	struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4717283b4a9bSStephen M. Cameron 	struct raid_map_data *map = &dev->raid_map;
4718283b4a9bSStephen M. Cameron 	struct raid_map_disk_data *dd = &map->data[0];
4719283b4a9bSStephen M. Cameron 	int is_write = 0;
4720283b4a9bSStephen M. Cameron 	u32 map_index;
4721283b4a9bSStephen M. Cameron 	u64 first_block, last_block;
4722283b4a9bSStephen M. Cameron 	u32 block_cnt;
4723283b4a9bSStephen M. Cameron 	u32 blocks_per_row;
4724283b4a9bSStephen M. Cameron 	u64 first_row, last_row;
4725283b4a9bSStephen M. Cameron 	u32 first_row_offset, last_row_offset;
4726283b4a9bSStephen M. Cameron 	u32 first_column, last_column;
47276b80b18fSScott Teel 	u64 r0_first_row, r0_last_row;
47286b80b18fSScott Teel 	u32 r5or6_blocks_per_row;
47296b80b18fSScott Teel 	u64 r5or6_first_row, r5or6_last_row;
47306b80b18fSScott Teel 	u32 r5or6_first_row_offset, r5or6_last_row_offset;
47316b80b18fSScott Teel 	u32 r5or6_first_column, r5or6_last_column;
47326b80b18fSScott Teel 	u32 total_disks_per_row;
47336b80b18fSScott Teel 	u32 stripesize;
47346b80b18fSScott Teel 	u32 first_group, last_group, current_group;
4735283b4a9bSStephen M. Cameron 	u32 map_row;
4736283b4a9bSStephen M. Cameron 	u32 disk_handle;
4737283b4a9bSStephen M. Cameron 	u64 disk_block;
4738283b4a9bSStephen M. Cameron 	u32 disk_block_cnt;
4739283b4a9bSStephen M. Cameron 	u8 cdb[16];
4740283b4a9bSStephen M. Cameron 	u8 cdb_len;
47412b08b3e9SDon Brace 	u16 strip_size;
4742283b4a9bSStephen M. Cameron #if BITS_PER_LONG == 32
4743283b4a9bSStephen M. Cameron 	u64 tmpdiv;
4744283b4a9bSStephen M. Cameron #endif
47456b80b18fSScott Teel 	int offload_to_mirror;
4746283b4a9bSStephen M. Cameron 
4747283b4a9bSStephen M. Cameron 	/* check for valid opcode, get LBA and block count */
4748283b4a9bSStephen M. Cameron 	switch (cmd->cmnd[0]) {
4749283b4a9bSStephen M. Cameron 	case WRITE_6:
4750283b4a9bSStephen M. Cameron 		is_write = 1;
4751283b4a9bSStephen M. Cameron 	case READ_6:
4752c8a6c9a6SDon Brace 		first_block = get_unaligned_be16(&cmd->cmnd[2]);
4753283b4a9bSStephen M. Cameron 		block_cnt = cmd->cmnd[4];
47543fa89a04SStephen M. Cameron 		if (block_cnt == 0)
47553fa89a04SStephen M. Cameron 			block_cnt = 256;
4756283b4a9bSStephen M. Cameron 		break;
4757283b4a9bSStephen M. Cameron 	case WRITE_10:
4758283b4a9bSStephen M. Cameron 		is_write = 1;
4759283b4a9bSStephen M. Cameron 	case READ_10:
4760283b4a9bSStephen M. Cameron 		first_block =
4761283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[2]) << 24) |
4762283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[3]) << 16) |
4763283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[4]) << 8) |
4764283b4a9bSStephen M. Cameron 			cmd->cmnd[5];
4765283b4a9bSStephen M. Cameron 		block_cnt =
4766283b4a9bSStephen M. Cameron 			(((u32) cmd->cmnd[7]) << 8) |
4767283b4a9bSStephen M. Cameron 			cmd->cmnd[8];
4768283b4a9bSStephen M. Cameron 		break;
4769283b4a9bSStephen M. Cameron 	case WRITE_12:
4770283b4a9bSStephen M. Cameron 		is_write = 1;
4771283b4a9bSStephen M. Cameron 	case READ_12:
4772283b4a9bSStephen M. Cameron 		first_block =
4773283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[2]) << 24) |
4774283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[3]) << 16) |
4775283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[4]) << 8) |
4776283b4a9bSStephen M. Cameron 			cmd->cmnd[5];
4777283b4a9bSStephen M. Cameron 		block_cnt =
4778283b4a9bSStephen M. Cameron 			(((u32) cmd->cmnd[6]) << 24) |
4779283b4a9bSStephen M. Cameron 			(((u32) cmd->cmnd[7]) << 16) |
4780283b4a9bSStephen M. Cameron 			(((u32) cmd->cmnd[8]) << 8) |
4781283b4a9bSStephen M. Cameron 		cmd->cmnd[9];
4782283b4a9bSStephen M. Cameron 		break;
4783283b4a9bSStephen M. Cameron 	case WRITE_16:
4784283b4a9bSStephen M. Cameron 		is_write = 1;
4785283b4a9bSStephen M. Cameron 	case READ_16:
4786283b4a9bSStephen M. Cameron 		first_block =
4787283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[2]) << 56) |
4788283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[3]) << 48) |
4789283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[4]) << 40) |
4790283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[5]) << 32) |
4791283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[6]) << 24) |
4792283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[7]) << 16) |
4793283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[8]) << 8) |
4794283b4a9bSStephen M. Cameron 			cmd->cmnd[9];
4795283b4a9bSStephen M. Cameron 		block_cnt =
4796283b4a9bSStephen M. Cameron 			(((u32) cmd->cmnd[10]) << 24) |
4797283b4a9bSStephen M. Cameron 			(((u32) cmd->cmnd[11]) << 16) |
4798283b4a9bSStephen M. Cameron 			(((u32) cmd->cmnd[12]) << 8) |
4799283b4a9bSStephen M. Cameron 			cmd->cmnd[13];
4800283b4a9bSStephen M. Cameron 		break;
4801283b4a9bSStephen M. Cameron 	default:
4802283b4a9bSStephen M. Cameron 		return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */
4803283b4a9bSStephen M. Cameron 	}
4804283b4a9bSStephen M. Cameron 	last_block = first_block + block_cnt - 1;
4805283b4a9bSStephen M. Cameron 
4806283b4a9bSStephen M. Cameron 	/* check for write to non-RAID-0 */
4807283b4a9bSStephen M. Cameron 	if (is_write && dev->raid_level != 0)
4808283b4a9bSStephen M. Cameron 		return IO_ACCEL_INELIGIBLE;
4809283b4a9bSStephen M. Cameron 
4810283b4a9bSStephen M. Cameron 	/* check for invalid block or wraparound */
48112b08b3e9SDon Brace 	if (last_block >= le64_to_cpu(map->volume_blk_cnt) ||
48122b08b3e9SDon Brace 		last_block < first_block)
4813283b4a9bSStephen M. Cameron 		return IO_ACCEL_INELIGIBLE;
4814283b4a9bSStephen M. Cameron 
4815283b4a9bSStephen M. Cameron 	/* calculate stripe information for the request */
48162b08b3e9SDon Brace 	blocks_per_row = le16_to_cpu(map->data_disks_per_row) *
48172b08b3e9SDon Brace 				le16_to_cpu(map->strip_size);
48182b08b3e9SDon Brace 	strip_size = le16_to_cpu(map->strip_size);
4819283b4a9bSStephen M. Cameron #if BITS_PER_LONG == 32
4820283b4a9bSStephen M. Cameron 	tmpdiv = first_block;
4821283b4a9bSStephen M. Cameron 	(void) do_div(tmpdiv, blocks_per_row);
4822283b4a9bSStephen M. Cameron 	first_row = tmpdiv;
4823283b4a9bSStephen M. Cameron 	tmpdiv = last_block;
4824283b4a9bSStephen M. Cameron 	(void) do_div(tmpdiv, blocks_per_row);
4825283b4a9bSStephen M. Cameron 	last_row = tmpdiv;
4826283b4a9bSStephen M. Cameron 	first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
4827283b4a9bSStephen M. Cameron 	last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
4828283b4a9bSStephen M. Cameron 	tmpdiv = first_row_offset;
48292b08b3e9SDon Brace 	(void) do_div(tmpdiv, strip_size);
4830283b4a9bSStephen M. Cameron 	first_column = tmpdiv;
4831283b4a9bSStephen M. Cameron 	tmpdiv = last_row_offset;
48322b08b3e9SDon Brace 	(void) do_div(tmpdiv, strip_size);
4833283b4a9bSStephen M. Cameron 	last_column = tmpdiv;
4834283b4a9bSStephen M. Cameron #else
4835283b4a9bSStephen M. Cameron 	first_row = first_block / blocks_per_row;
4836283b4a9bSStephen M. Cameron 	last_row = last_block / blocks_per_row;
4837283b4a9bSStephen M. Cameron 	first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
4838283b4a9bSStephen M. Cameron 	last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
48392b08b3e9SDon Brace 	first_column = first_row_offset / strip_size;
48402b08b3e9SDon Brace 	last_column = last_row_offset / strip_size;
4841283b4a9bSStephen M. Cameron #endif
4842283b4a9bSStephen M. Cameron 
4843283b4a9bSStephen M. Cameron 	/* if this isn't a single row/column then give to the controller */
4844283b4a9bSStephen M. Cameron 	if ((first_row != last_row) || (first_column != last_column))
4845283b4a9bSStephen M. Cameron 		return IO_ACCEL_INELIGIBLE;
4846283b4a9bSStephen M. Cameron 
4847283b4a9bSStephen M. Cameron 	/* proceeding with driver mapping */
48482b08b3e9SDon Brace 	total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
48492b08b3e9SDon Brace 				le16_to_cpu(map->metadata_disks_per_row);
4850283b4a9bSStephen M. Cameron 	map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
48512b08b3e9SDon Brace 				le16_to_cpu(map->row_cnt);
48526b80b18fSScott Teel 	map_index = (map_row * total_disks_per_row) + first_column;
48536b80b18fSScott Teel 
48546b80b18fSScott Teel 	switch (dev->raid_level) {
48556b80b18fSScott Teel 	case HPSA_RAID_0:
48566b80b18fSScott Teel 		break; /* nothing special to do */
48576b80b18fSScott Teel 	case HPSA_RAID_1:
48586b80b18fSScott Teel 		/* Handles load balance across RAID 1 members.
48596b80b18fSScott Teel 		 * (2-drive R1 and R10 with even # of drives.)
48606b80b18fSScott Teel 		 * Appropriate for SSDs, not optimal for HDDs
4861283b4a9bSStephen M. Cameron 		 */
48622b08b3e9SDon Brace 		BUG_ON(le16_to_cpu(map->layout_map_count) != 2);
4863283b4a9bSStephen M. Cameron 		if (dev->offload_to_mirror)
48642b08b3e9SDon Brace 			map_index += le16_to_cpu(map->data_disks_per_row);
4865283b4a9bSStephen M. Cameron 		dev->offload_to_mirror = !dev->offload_to_mirror;
48666b80b18fSScott Teel 		break;
48676b80b18fSScott Teel 	case HPSA_RAID_ADM:
48686b80b18fSScott Teel 		/* Handles N-way mirrors  (R1-ADM)
48696b80b18fSScott Teel 		 * and R10 with # of drives divisible by 3.)
48706b80b18fSScott Teel 		 */
48712b08b3e9SDon Brace 		BUG_ON(le16_to_cpu(map->layout_map_count) != 3);
48726b80b18fSScott Teel 
48736b80b18fSScott Teel 		offload_to_mirror = dev->offload_to_mirror;
48746b80b18fSScott Teel 		raid_map_helper(map, offload_to_mirror,
48756b80b18fSScott Teel 				&map_index, &current_group);
48766b80b18fSScott Teel 		/* set mirror group to use next time */
48776b80b18fSScott Teel 		offload_to_mirror =
48782b08b3e9SDon Brace 			(offload_to_mirror >=
48792b08b3e9SDon Brace 			le16_to_cpu(map->layout_map_count) - 1)
48806b80b18fSScott Teel 			? 0 : offload_to_mirror + 1;
48816b80b18fSScott Teel 		dev->offload_to_mirror = offload_to_mirror;
48826b80b18fSScott Teel 		/* Avoid direct use of dev->offload_to_mirror within this
48836b80b18fSScott Teel 		 * function since multiple threads might simultaneously
48846b80b18fSScott Teel 		 * increment it beyond the range of dev->layout_map_count -1.
48856b80b18fSScott Teel 		 */
48866b80b18fSScott Teel 		break;
48876b80b18fSScott Teel 	case HPSA_RAID_5:
48886b80b18fSScott Teel 	case HPSA_RAID_6:
48892b08b3e9SDon Brace 		if (le16_to_cpu(map->layout_map_count) <= 1)
48906b80b18fSScott Teel 			break;
48916b80b18fSScott Teel 
48926b80b18fSScott Teel 		/* Verify first and last block are in same RAID group */
48936b80b18fSScott Teel 		r5or6_blocks_per_row =
48942b08b3e9SDon Brace 			le16_to_cpu(map->strip_size) *
48952b08b3e9SDon Brace 			le16_to_cpu(map->data_disks_per_row);
48966b80b18fSScott Teel 		BUG_ON(r5or6_blocks_per_row == 0);
48972b08b3e9SDon Brace 		stripesize = r5or6_blocks_per_row *
48982b08b3e9SDon Brace 			le16_to_cpu(map->layout_map_count);
48996b80b18fSScott Teel #if BITS_PER_LONG == 32
49006b80b18fSScott Teel 		tmpdiv = first_block;
49016b80b18fSScott Teel 		first_group = do_div(tmpdiv, stripesize);
49026b80b18fSScott Teel 		tmpdiv = first_group;
49036b80b18fSScott Teel 		(void) do_div(tmpdiv, r5or6_blocks_per_row);
49046b80b18fSScott Teel 		first_group = tmpdiv;
49056b80b18fSScott Teel 		tmpdiv = last_block;
49066b80b18fSScott Teel 		last_group = do_div(tmpdiv, stripesize);
49076b80b18fSScott Teel 		tmpdiv = last_group;
49086b80b18fSScott Teel 		(void) do_div(tmpdiv, r5or6_blocks_per_row);
49096b80b18fSScott Teel 		last_group = tmpdiv;
49106b80b18fSScott Teel #else
49116b80b18fSScott Teel 		first_group = (first_block % stripesize) / r5or6_blocks_per_row;
49126b80b18fSScott Teel 		last_group = (last_block % stripesize) / r5or6_blocks_per_row;
49136b80b18fSScott Teel #endif
4914000ff7c2SStephen M. Cameron 		if (first_group != last_group)
49156b80b18fSScott Teel 			return IO_ACCEL_INELIGIBLE;
49166b80b18fSScott Teel 
49176b80b18fSScott Teel 		/* Verify request is in a single row of RAID 5/6 */
49186b80b18fSScott Teel #if BITS_PER_LONG == 32
49196b80b18fSScott Teel 		tmpdiv = first_block;
49206b80b18fSScott Teel 		(void) do_div(tmpdiv, stripesize);
49216b80b18fSScott Teel 		first_row = r5or6_first_row = r0_first_row = tmpdiv;
49226b80b18fSScott Teel 		tmpdiv = last_block;
49236b80b18fSScott Teel 		(void) do_div(tmpdiv, stripesize);
49246b80b18fSScott Teel 		r5or6_last_row = r0_last_row = tmpdiv;
49256b80b18fSScott Teel #else
49266b80b18fSScott Teel 		first_row = r5or6_first_row = r0_first_row =
49276b80b18fSScott Teel 						first_block / stripesize;
49286b80b18fSScott Teel 		r5or6_last_row = r0_last_row = last_block / stripesize;
49296b80b18fSScott Teel #endif
49306b80b18fSScott Teel 		if (r5or6_first_row != r5or6_last_row)
49316b80b18fSScott Teel 			return IO_ACCEL_INELIGIBLE;
49326b80b18fSScott Teel 
49336b80b18fSScott Teel 
49346b80b18fSScott Teel 		/* Verify request is in a single column */
49356b80b18fSScott Teel #if BITS_PER_LONG == 32
49366b80b18fSScott Teel 		tmpdiv = first_block;
49376b80b18fSScott Teel 		first_row_offset = do_div(tmpdiv, stripesize);
49386b80b18fSScott Teel 		tmpdiv = first_row_offset;
49396b80b18fSScott Teel 		first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row);
49406b80b18fSScott Teel 		r5or6_first_row_offset = first_row_offset;
49416b80b18fSScott Teel 		tmpdiv = last_block;
49426b80b18fSScott Teel 		r5or6_last_row_offset = do_div(tmpdiv, stripesize);
49436b80b18fSScott Teel 		tmpdiv = r5or6_last_row_offset;
49446b80b18fSScott Teel 		r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row);
49456b80b18fSScott Teel 		tmpdiv = r5or6_first_row_offset;
49466b80b18fSScott Teel 		(void) do_div(tmpdiv, map->strip_size);
49476b80b18fSScott Teel 		first_column = r5or6_first_column = tmpdiv;
49486b80b18fSScott Teel 		tmpdiv = r5or6_last_row_offset;
49496b80b18fSScott Teel 		(void) do_div(tmpdiv, map->strip_size);
49506b80b18fSScott Teel 		r5or6_last_column = tmpdiv;
49516b80b18fSScott Teel #else
49526b80b18fSScott Teel 		first_row_offset = r5or6_first_row_offset =
49536b80b18fSScott Teel 			(u32)((first_block % stripesize) %
49546b80b18fSScott Teel 						r5or6_blocks_per_row);
49556b80b18fSScott Teel 
49566b80b18fSScott Teel 		r5or6_last_row_offset =
49576b80b18fSScott Teel 			(u32)((last_block % stripesize) %
49586b80b18fSScott Teel 						r5or6_blocks_per_row);
49596b80b18fSScott Teel 
49606b80b18fSScott Teel 		first_column = r5or6_first_column =
49612b08b3e9SDon Brace 			r5or6_first_row_offset / le16_to_cpu(map->strip_size);
49626b80b18fSScott Teel 		r5or6_last_column =
49632b08b3e9SDon Brace 			r5or6_last_row_offset / le16_to_cpu(map->strip_size);
49646b80b18fSScott Teel #endif
49656b80b18fSScott Teel 		if (r5or6_first_column != r5or6_last_column)
49666b80b18fSScott Teel 			return IO_ACCEL_INELIGIBLE;
49676b80b18fSScott Teel 
49686b80b18fSScott Teel 		/* Request is eligible */
49696b80b18fSScott Teel 		map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
49702b08b3e9SDon Brace 			le16_to_cpu(map->row_cnt);
49716b80b18fSScott Teel 
49726b80b18fSScott Teel 		map_index = (first_group *
49732b08b3e9SDon Brace 			(le16_to_cpu(map->row_cnt) * total_disks_per_row)) +
49746b80b18fSScott Teel 			(map_row * total_disks_per_row) + first_column;
49756b80b18fSScott Teel 		break;
49766b80b18fSScott Teel 	default:
49776b80b18fSScott Teel 		return IO_ACCEL_INELIGIBLE;
4978283b4a9bSStephen M. Cameron 	}
49796b80b18fSScott Teel 
498007543e0cSStephen Cameron 	if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES))
498107543e0cSStephen Cameron 		return IO_ACCEL_INELIGIBLE;
498207543e0cSStephen Cameron 
498303383736SDon Brace 	c->phys_disk = dev->phys_disk[map_index];
4984*c3390df4SDon Brace 	if (!c->phys_disk)
4985*c3390df4SDon Brace 		return IO_ACCEL_INELIGIBLE;
498603383736SDon Brace 
4987283b4a9bSStephen M. Cameron 	disk_handle = dd[map_index].ioaccel_handle;
49882b08b3e9SDon Brace 	disk_block = le64_to_cpu(map->disk_starting_blk) +
49892b08b3e9SDon Brace 			first_row * le16_to_cpu(map->strip_size) +
49902b08b3e9SDon Brace 			(first_row_offset - first_column *
49912b08b3e9SDon Brace 			le16_to_cpu(map->strip_size));
4992283b4a9bSStephen M. Cameron 	disk_block_cnt = block_cnt;
4993283b4a9bSStephen M. Cameron 
4994283b4a9bSStephen M. Cameron 	/* handle differing logical/physical block sizes */
4995283b4a9bSStephen M. Cameron 	if (map->phys_blk_shift) {
4996283b4a9bSStephen M. Cameron 		disk_block <<= map->phys_blk_shift;
4997283b4a9bSStephen M. Cameron 		disk_block_cnt <<= map->phys_blk_shift;
4998283b4a9bSStephen M. Cameron 	}
4999283b4a9bSStephen M. Cameron 	BUG_ON(disk_block_cnt > 0xffff);
5000283b4a9bSStephen M. Cameron 
5001283b4a9bSStephen M. Cameron 	/* build the new CDB for the physical disk I/O */
5002283b4a9bSStephen M. Cameron 	if (disk_block > 0xffffffff) {
5003283b4a9bSStephen M. Cameron 		cdb[0] = is_write ? WRITE_16 : READ_16;
5004283b4a9bSStephen M. Cameron 		cdb[1] = 0;
5005283b4a9bSStephen M. Cameron 		cdb[2] = (u8) (disk_block >> 56);
5006283b4a9bSStephen M. Cameron 		cdb[3] = (u8) (disk_block >> 48);
5007283b4a9bSStephen M. Cameron 		cdb[4] = (u8) (disk_block >> 40);
5008283b4a9bSStephen M. Cameron 		cdb[5] = (u8) (disk_block >> 32);
5009283b4a9bSStephen M. Cameron 		cdb[6] = (u8) (disk_block >> 24);
5010283b4a9bSStephen M. Cameron 		cdb[7] = (u8) (disk_block >> 16);
5011283b4a9bSStephen M. Cameron 		cdb[8] = (u8) (disk_block >> 8);
5012283b4a9bSStephen M. Cameron 		cdb[9] = (u8) (disk_block);
5013283b4a9bSStephen M. Cameron 		cdb[10] = (u8) (disk_block_cnt >> 24);
5014283b4a9bSStephen M. Cameron 		cdb[11] = (u8) (disk_block_cnt >> 16);
5015283b4a9bSStephen M. Cameron 		cdb[12] = (u8) (disk_block_cnt >> 8);
5016283b4a9bSStephen M. Cameron 		cdb[13] = (u8) (disk_block_cnt);
5017283b4a9bSStephen M. Cameron 		cdb[14] = 0;
5018283b4a9bSStephen M. Cameron 		cdb[15] = 0;
5019283b4a9bSStephen M. Cameron 		cdb_len = 16;
5020283b4a9bSStephen M. Cameron 	} else {
5021283b4a9bSStephen M. Cameron 		cdb[0] = is_write ? WRITE_10 : READ_10;
5022283b4a9bSStephen M. Cameron 		cdb[1] = 0;
5023283b4a9bSStephen M. Cameron 		cdb[2] = (u8) (disk_block >> 24);
5024283b4a9bSStephen M. Cameron 		cdb[3] = (u8) (disk_block >> 16);
5025283b4a9bSStephen M. Cameron 		cdb[4] = (u8) (disk_block >> 8);
5026283b4a9bSStephen M. Cameron 		cdb[5] = (u8) (disk_block);
5027283b4a9bSStephen M. Cameron 		cdb[6] = 0;
5028283b4a9bSStephen M. Cameron 		cdb[7] = (u8) (disk_block_cnt >> 8);
5029283b4a9bSStephen M. Cameron 		cdb[8] = (u8) (disk_block_cnt);
5030283b4a9bSStephen M. Cameron 		cdb[9] = 0;
5031283b4a9bSStephen M. Cameron 		cdb_len = 10;
5032283b4a9bSStephen M. Cameron 	}
5033283b4a9bSStephen M. Cameron 	return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len,
503403383736SDon Brace 						dev->scsi3addr,
503503383736SDon Brace 						dev->phys_disk[map_index]);
5036283b4a9bSStephen M. Cameron }
5037283b4a9bSStephen M. Cameron 
503825163bd5SWebb Scales /*
503925163bd5SWebb Scales  * Submit commands down the "normal" RAID stack path
504025163bd5SWebb Scales  * All callers to hpsa_ciss_submit must check lockup_detected
504125163bd5SWebb Scales  * beforehand, before (opt.) and after calling cmd_alloc
504225163bd5SWebb Scales  */
5043574f05d3SStephen Cameron static int hpsa_ciss_submit(struct ctlr_info *h,
5044574f05d3SStephen Cameron 	struct CommandList *c, struct scsi_cmnd *cmd,
5045574f05d3SStephen Cameron 	unsigned char scsi3addr[])
5046edd16368SStephen M. Cameron {
5047edd16368SStephen M. Cameron 	cmd->host_scribble = (unsigned char *) c;
5048edd16368SStephen M. Cameron 	c->cmd_type = CMD_SCSI;
5049edd16368SStephen M. Cameron 	c->scsi_cmd = cmd;
5050edd16368SStephen M. Cameron 	c->Header.ReplyQueue = 0;  /* unused in simple mode */
5051edd16368SStephen M. Cameron 	memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
5052f2405db8SDon Brace 	c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT));
5053edd16368SStephen M. Cameron 
5054edd16368SStephen M. Cameron 	/* Fill in the request block... */
5055edd16368SStephen M. Cameron 
5056edd16368SStephen M. Cameron 	c->Request.Timeout = 0;
5057edd16368SStephen M. Cameron 	BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
5058edd16368SStephen M. Cameron 	c->Request.CDBLen = cmd->cmd_len;
5059edd16368SStephen M. Cameron 	memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
5060edd16368SStephen M. Cameron 	switch (cmd->sc_data_direction) {
5061edd16368SStephen M. Cameron 	case DMA_TO_DEVICE:
5062a505b86fSStephen M. Cameron 		c->Request.type_attr_dir =
5063a505b86fSStephen M. Cameron 			TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE);
5064edd16368SStephen M. Cameron 		break;
5065edd16368SStephen M. Cameron 	case DMA_FROM_DEVICE:
5066a505b86fSStephen M. Cameron 		c->Request.type_attr_dir =
5067a505b86fSStephen M. Cameron 			TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ);
5068edd16368SStephen M. Cameron 		break;
5069edd16368SStephen M. Cameron 	case DMA_NONE:
5070a505b86fSStephen M. Cameron 		c->Request.type_attr_dir =
5071a505b86fSStephen M. Cameron 			TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE);
5072edd16368SStephen M. Cameron 		break;
5073edd16368SStephen M. Cameron 	case DMA_BIDIRECTIONAL:
5074edd16368SStephen M. Cameron 		/* This can happen if a buggy application does a scsi passthru
5075edd16368SStephen M. Cameron 		 * and sets both inlen and outlen to non-zero. ( see
5076edd16368SStephen M. Cameron 		 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
5077edd16368SStephen M. Cameron 		 */
5078edd16368SStephen M. Cameron 
5079a505b86fSStephen M. Cameron 		c->Request.type_attr_dir =
5080a505b86fSStephen M. Cameron 			TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD);
5081edd16368SStephen M. Cameron 		/* This is technically wrong, and hpsa controllers should
5082edd16368SStephen M. Cameron 		 * reject it with CMD_INVALID, which is the most correct
5083edd16368SStephen M. Cameron 		 * response, but non-fibre backends appear to let it
5084edd16368SStephen M. Cameron 		 * slide by, and give the same results as if this field
5085edd16368SStephen M. Cameron 		 * were set correctly.  Either way is acceptable for
5086edd16368SStephen M. Cameron 		 * our purposes here.
5087edd16368SStephen M. Cameron 		 */
5088edd16368SStephen M. Cameron 
5089edd16368SStephen M. Cameron 		break;
5090edd16368SStephen M. Cameron 
5091edd16368SStephen M. Cameron 	default:
5092edd16368SStephen M. Cameron 		dev_err(&h->pdev->dev, "unknown data direction: %d\n",
5093edd16368SStephen M. Cameron 			cmd->sc_data_direction);
5094edd16368SStephen M. Cameron 		BUG();
5095edd16368SStephen M. Cameron 		break;
5096edd16368SStephen M. Cameron 	}
5097edd16368SStephen M. Cameron 
509833a2ffceSStephen M. Cameron 	if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
509973153fe5SWebb Scales 		hpsa_cmd_resolve_and_free(h, c);
5100edd16368SStephen M. Cameron 		return SCSI_MLQUEUE_HOST_BUSY;
5101edd16368SStephen M. Cameron 	}
5102edd16368SStephen M. Cameron 	enqueue_cmd_and_start_io(h, c);
5103edd16368SStephen M. Cameron 	/* the cmd'll come back via intr handler in complete_scsi_command()  */
5104edd16368SStephen M. Cameron 	return 0;
5105edd16368SStephen M. Cameron }
5106edd16368SStephen M. Cameron 
5107360c73bdSStephen Cameron static void hpsa_cmd_init(struct ctlr_info *h, int index,
5108360c73bdSStephen Cameron 				struct CommandList *c)
5109360c73bdSStephen Cameron {
5110360c73bdSStephen Cameron 	dma_addr_t cmd_dma_handle, err_dma_handle;
5111360c73bdSStephen Cameron 
5112360c73bdSStephen Cameron 	/* Zero out all of commandlist except the last field, refcount */
5113360c73bdSStephen Cameron 	memset(c, 0, offsetof(struct CommandList, refcount));
5114360c73bdSStephen Cameron 	c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT));
5115360c73bdSStephen Cameron 	cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
5116360c73bdSStephen Cameron 	c->err_info = h->errinfo_pool + index;
5117360c73bdSStephen Cameron 	memset(c->err_info, 0, sizeof(*c->err_info));
5118360c73bdSStephen Cameron 	err_dma_handle = h->errinfo_pool_dhandle
5119360c73bdSStephen Cameron 	    + index * sizeof(*c->err_info);
5120360c73bdSStephen Cameron 	c->cmdindex = index;
5121360c73bdSStephen Cameron 	c->busaddr = (u32) cmd_dma_handle;
5122360c73bdSStephen Cameron 	c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle);
5123360c73bdSStephen Cameron 	c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info));
5124360c73bdSStephen Cameron 	c->h = h;
5125a58e7e53SWebb Scales 	c->scsi_cmd = SCSI_CMD_IDLE;
5126360c73bdSStephen Cameron }
5127360c73bdSStephen Cameron 
5128360c73bdSStephen Cameron static void hpsa_preinitialize_commands(struct ctlr_info *h)
5129360c73bdSStephen Cameron {
5130360c73bdSStephen Cameron 	int i;
5131360c73bdSStephen Cameron 
5132360c73bdSStephen Cameron 	for (i = 0; i < h->nr_cmds; i++) {
5133360c73bdSStephen Cameron 		struct CommandList *c = h->cmd_pool + i;
5134360c73bdSStephen Cameron 
5135360c73bdSStephen Cameron 		hpsa_cmd_init(h, i, c);
5136360c73bdSStephen Cameron 		atomic_set(&c->refcount, 0);
5137360c73bdSStephen Cameron 	}
5138360c73bdSStephen Cameron }
5139360c73bdSStephen Cameron 
5140360c73bdSStephen Cameron static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index,
5141360c73bdSStephen Cameron 				struct CommandList *c)
5142360c73bdSStephen Cameron {
5143360c73bdSStephen Cameron 	dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
5144360c73bdSStephen Cameron 
514573153fe5SWebb Scales 	BUG_ON(c->cmdindex != index);
514673153fe5SWebb Scales 
5147360c73bdSStephen Cameron 	memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
5148360c73bdSStephen Cameron 	memset(c->err_info, 0, sizeof(*c->err_info));
5149360c73bdSStephen Cameron 	c->busaddr = (u32) cmd_dma_handle;
5150360c73bdSStephen Cameron }
5151360c73bdSStephen Cameron 
5152592a0ad5SWebb Scales static int hpsa_ioaccel_submit(struct ctlr_info *h,
5153592a0ad5SWebb Scales 		struct CommandList *c, struct scsi_cmnd *cmd,
5154592a0ad5SWebb Scales 		unsigned char *scsi3addr)
5155592a0ad5SWebb Scales {
5156592a0ad5SWebb Scales 	struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
5157592a0ad5SWebb Scales 	int rc = IO_ACCEL_INELIGIBLE;
5158592a0ad5SWebb Scales 
5159592a0ad5SWebb Scales 	cmd->host_scribble = (unsigned char *) c;
5160592a0ad5SWebb Scales 
5161592a0ad5SWebb Scales 	if (dev->offload_enabled) {
5162592a0ad5SWebb Scales 		hpsa_cmd_init(h, c->cmdindex, c);
5163592a0ad5SWebb Scales 		c->cmd_type = CMD_SCSI;
5164592a0ad5SWebb Scales 		c->scsi_cmd = cmd;
5165592a0ad5SWebb Scales 		rc = hpsa_scsi_ioaccel_raid_map(h, c);
5166592a0ad5SWebb Scales 		if (rc < 0)     /* scsi_dma_map failed. */
5167592a0ad5SWebb Scales 			rc = SCSI_MLQUEUE_HOST_BUSY;
5168a3144e0bSJoe Handzik 	} else if (dev->hba_ioaccel_enabled) {
5169592a0ad5SWebb Scales 		hpsa_cmd_init(h, c->cmdindex, c);
5170592a0ad5SWebb Scales 		c->cmd_type = CMD_SCSI;
5171592a0ad5SWebb Scales 		c->scsi_cmd = cmd;
5172592a0ad5SWebb Scales 		rc = hpsa_scsi_ioaccel_direct_map(h, c);
5173592a0ad5SWebb Scales 		if (rc < 0)     /* scsi_dma_map failed. */
5174592a0ad5SWebb Scales 			rc = SCSI_MLQUEUE_HOST_BUSY;
5175592a0ad5SWebb Scales 	}
5176592a0ad5SWebb Scales 	return rc;
5177592a0ad5SWebb Scales }
5178592a0ad5SWebb Scales 
5179080ef1ccSDon Brace static void hpsa_command_resubmit_worker(struct work_struct *work)
5180080ef1ccSDon Brace {
5181080ef1ccSDon Brace 	struct scsi_cmnd *cmd;
5182080ef1ccSDon Brace 	struct hpsa_scsi_dev_t *dev;
51838a0ff92cSWebb Scales 	struct CommandList *c = container_of(work, struct CommandList, work);
5184080ef1ccSDon Brace 
5185080ef1ccSDon Brace 	cmd = c->scsi_cmd;
5186080ef1ccSDon Brace 	dev = cmd->device->hostdata;
5187080ef1ccSDon Brace 	if (!dev) {
5188080ef1ccSDon Brace 		cmd->result = DID_NO_CONNECT << 16;
51898a0ff92cSWebb Scales 		return hpsa_cmd_free_and_done(c->h, c, cmd);
5190080ef1ccSDon Brace 	}
5191d604f533SWebb Scales 	if (c->reset_pending)
5192d604f533SWebb Scales 		return hpsa_cmd_resolve_and_free(c->h, c);
5193a58e7e53SWebb Scales 	if (c->abort_pending)
5194a58e7e53SWebb Scales 		return hpsa_cmd_abort_and_free(c->h, c, cmd);
5195592a0ad5SWebb Scales 	if (c->cmd_type == CMD_IOACCEL2) {
5196592a0ad5SWebb Scales 		struct ctlr_info *h = c->h;
5197592a0ad5SWebb Scales 		struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
5198592a0ad5SWebb Scales 		int rc;
5199592a0ad5SWebb Scales 
5200592a0ad5SWebb Scales 		if (c2->error_data.serv_response ==
5201592a0ad5SWebb Scales 				IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL) {
5202592a0ad5SWebb Scales 			rc = hpsa_ioaccel_submit(h, c, cmd, dev->scsi3addr);
5203592a0ad5SWebb Scales 			if (rc == 0)
5204592a0ad5SWebb Scales 				return;
5205592a0ad5SWebb Scales 			if (rc == SCSI_MLQUEUE_HOST_BUSY) {
5206592a0ad5SWebb Scales 				/*
5207592a0ad5SWebb Scales 				 * If we get here, it means dma mapping failed.
5208592a0ad5SWebb Scales 				 * Try again via scsi mid layer, which will
5209592a0ad5SWebb Scales 				 * then get SCSI_MLQUEUE_HOST_BUSY.
5210592a0ad5SWebb Scales 				 */
5211592a0ad5SWebb Scales 				cmd->result = DID_IMM_RETRY << 16;
52128a0ff92cSWebb Scales 				return hpsa_cmd_free_and_done(h, c, cmd);
5213592a0ad5SWebb Scales 			}
5214592a0ad5SWebb Scales 			/* else, fall thru and resubmit down CISS path */
5215592a0ad5SWebb Scales 		}
5216592a0ad5SWebb Scales 	}
5217360c73bdSStephen Cameron 	hpsa_cmd_partial_init(c->h, c->cmdindex, c);
5218080ef1ccSDon Brace 	if (hpsa_ciss_submit(c->h, c, cmd, dev->scsi3addr)) {
5219080ef1ccSDon Brace 		/*
5220080ef1ccSDon Brace 		 * If we get here, it means dma mapping failed. Try
5221080ef1ccSDon Brace 		 * again via scsi mid layer, which will then get
5222080ef1ccSDon Brace 		 * SCSI_MLQUEUE_HOST_BUSY.
5223592a0ad5SWebb Scales 		 *
5224592a0ad5SWebb Scales 		 * hpsa_ciss_submit will have already freed c
5225592a0ad5SWebb Scales 		 * if it encountered a dma mapping failure.
5226080ef1ccSDon Brace 		 */
5227080ef1ccSDon Brace 		cmd->result = DID_IMM_RETRY << 16;
5228080ef1ccSDon Brace 		cmd->scsi_done(cmd);
5229080ef1ccSDon Brace 	}
5230080ef1ccSDon Brace }
5231080ef1ccSDon Brace 
5232574f05d3SStephen Cameron /* Running in struct Scsi_Host->host_lock less mode */
5233574f05d3SStephen Cameron static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd)
5234574f05d3SStephen Cameron {
5235574f05d3SStephen Cameron 	struct ctlr_info *h;
5236574f05d3SStephen Cameron 	struct hpsa_scsi_dev_t *dev;
5237574f05d3SStephen Cameron 	unsigned char scsi3addr[8];
5238574f05d3SStephen Cameron 	struct CommandList *c;
5239574f05d3SStephen Cameron 	int rc = 0;
5240574f05d3SStephen Cameron 
5241574f05d3SStephen Cameron 	/* Get the ptr to our adapter structure out of cmd->host. */
5242574f05d3SStephen Cameron 	h = sdev_to_hba(cmd->device);
524373153fe5SWebb Scales 
524473153fe5SWebb Scales 	BUG_ON(cmd->request->tag < 0);
524573153fe5SWebb Scales 
5246574f05d3SStephen Cameron 	dev = cmd->device->hostdata;
5247574f05d3SStephen Cameron 	if (!dev) {
5248574f05d3SStephen Cameron 		cmd->result = DID_NO_CONNECT << 16;
5249574f05d3SStephen Cameron 		cmd->scsi_done(cmd);
5250574f05d3SStephen Cameron 		return 0;
5251574f05d3SStephen Cameron 	}
525273153fe5SWebb Scales 
5253574f05d3SStephen Cameron 	memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
5254574f05d3SStephen Cameron 
5255574f05d3SStephen Cameron 	if (unlikely(lockup_detected(h))) {
525625163bd5SWebb Scales 		cmd->result = DID_NO_CONNECT << 16;
5257574f05d3SStephen Cameron 		cmd->scsi_done(cmd);
5258574f05d3SStephen Cameron 		return 0;
5259574f05d3SStephen Cameron 	}
526073153fe5SWebb Scales 	c = cmd_tagged_alloc(h, cmd);
5261574f05d3SStephen Cameron 
5262407863cbSStephen Cameron 	/*
5263407863cbSStephen Cameron 	 * Call alternate submit routine for I/O accelerated commands.
5264574f05d3SStephen Cameron 	 * Retries always go down the normal I/O path.
5265574f05d3SStephen Cameron 	 */
5266574f05d3SStephen Cameron 	if (likely(cmd->retries == 0 &&
5267574f05d3SStephen Cameron 		cmd->request->cmd_type == REQ_TYPE_FS &&
5268574f05d3SStephen Cameron 		h->acciopath_status)) {
5269592a0ad5SWebb Scales 		rc = hpsa_ioaccel_submit(h, c, cmd, scsi3addr);
5270574f05d3SStephen Cameron 		if (rc == 0)
5271592a0ad5SWebb Scales 			return 0;
5272592a0ad5SWebb Scales 		if (rc == SCSI_MLQUEUE_HOST_BUSY) {
527373153fe5SWebb Scales 			hpsa_cmd_resolve_and_free(h, c);
5274574f05d3SStephen Cameron 			return SCSI_MLQUEUE_HOST_BUSY;
5275574f05d3SStephen Cameron 		}
5276574f05d3SStephen Cameron 	}
5277574f05d3SStephen Cameron 	return hpsa_ciss_submit(h, c, cmd, scsi3addr);
5278574f05d3SStephen Cameron }
5279574f05d3SStephen Cameron 
52808ebc9248SWebb Scales static void hpsa_scan_complete(struct ctlr_info *h)
52815f389360SStephen M. Cameron {
52825f389360SStephen M. Cameron 	unsigned long flags;
52835f389360SStephen M. Cameron 
52845f389360SStephen M. Cameron 	spin_lock_irqsave(&h->scan_lock, flags);
52855f389360SStephen M. Cameron 	h->scan_finished = 1;
52865f389360SStephen M. Cameron 	wake_up_all(&h->scan_wait_queue);
52875f389360SStephen M. Cameron 	spin_unlock_irqrestore(&h->scan_lock, flags);
52885f389360SStephen M. Cameron }
52895f389360SStephen M. Cameron 
5290a08a8471SStephen M. Cameron static void hpsa_scan_start(struct Scsi_Host *sh)
5291a08a8471SStephen M. Cameron {
5292a08a8471SStephen M. Cameron 	struct ctlr_info *h = shost_to_hba(sh);
5293a08a8471SStephen M. Cameron 	unsigned long flags;
5294a08a8471SStephen M. Cameron 
52958ebc9248SWebb Scales 	/*
52968ebc9248SWebb Scales 	 * Don't let rescans be initiated on a controller known to be locked
52978ebc9248SWebb Scales 	 * up.  If the controller locks up *during* a rescan, that thread is
52988ebc9248SWebb Scales 	 * probably hosed, but at least we can prevent new rescan threads from
52998ebc9248SWebb Scales 	 * piling up on a locked up controller.
53008ebc9248SWebb Scales 	 */
53018ebc9248SWebb Scales 	if (unlikely(lockup_detected(h)))
53028ebc9248SWebb Scales 		return hpsa_scan_complete(h);
53035f389360SStephen M. Cameron 
5304a08a8471SStephen M. Cameron 	/* wait until any scan already in progress is finished. */
5305a08a8471SStephen M. Cameron 	while (1) {
5306a08a8471SStephen M. Cameron 		spin_lock_irqsave(&h->scan_lock, flags);
5307a08a8471SStephen M. Cameron 		if (h->scan_finished)
5308a08a8471SStephen M. Cameron 			break;
5309a08a8471SStephen M. Cameron 		spin_unlock_irqrestore(&h->scan_lock, flags);
5310a08a8471SStephen M. Cameron 		wait_event(h->scan_wait_queue, h->scan_finished);
5311a08a8471SStephen M. Cameron 		/* Note: We don't need to worry about a race between this
5312a08a8471SStephen M. Cameron 		 * thread and driver unload because the midlayer will
5313a08a8471SStephen M. Cameron 		 * have incremented the reference count, so unload won't
5314a08a8471SStephen M. Cameron 		 * happen if we're in here.
5315a08a8471SStephen M. Cameron 		 */
5316a08a8471SStephen M. Cameron 	}
5317a08a8471SStephen M. Cameron 	h->scan_finished = 0; /* mark scan as in progress */
5318a08a8471SStephen M. Cameron 	spin_unlock_irqrestore(&h->scan_lock, flags);
5319a08a8471SStephen M. Cameron 
53208ebc9248SWebb Scales 	if (unlikely(lockup_detected(h)))
53218ebc9248SWebb Scales 		return hpsa_scan_complete(h);
53225f389360SStephen M. Cameron 
53238aa60681SDon Brace 	hpsa_update_scsi_devices(h);
5324a08a8471SStephen M. Cameron 
53258ebc9248SWebb Scales 	hpsa_scan_complete(h);
5326a08a8471SStephen M. Cameron }
5327a08a8471SStephen M. Cameron 
53287c0a0229SDon Brace static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth)
53297c0a0229SDon Brace {
533003383736SDon Brace 	struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata;
533103383736SDon Brace 
533203383736SDon Brace 	if (!logical_drive)
533303383736SDon Brace 		return -ENODEV;
53347c0a0229SDon Brace 
53357c0a0229SDon Brace 	if (qdepth < 1)
53367c0a0229SDon Brace 		qdepth = 1;
533703383736SDon Brace 	else if (qdepth > logical_drive->queue_depth)
533803383736SDon Brace 		qdepth = logical_drive->queue_depth;
533903383736SDon Brace 
534003383736SDon Brace 	return scsi_change_queue_depth(sdev, qdepth);
53417c0a0229SDon Brace }
53427c0a0229SDon Brace 
5343a08a8471SStephen M. Cameron static int hpsa_scan_finished(struct Scsi_Host *sh,
5344a08a8471SStephen M. Cameron 	unsigned long elapsed_time)
5345a08a8471SStephen M. Cameron {
5346a08a8471SStephen M. Cameron 	struct ctlr_info *h = shost_to_hba(sh);
5347a08a8471SStephen M. Cameron 	unsigned long flags;
5348a08a8471SStephen M. Cameron 	int finished;
5349a08a8471SStephen M. Cameron 
5350a08a8471SStephen M. Cameron 	spin_lock_irqsave(&h->scan_lock, flags);
5351a08a8471SStephen M. Cameron 	finished = h->scan_finished;
5352a08a8471SStephen M. Cameron 	spin_unlock_irqrestore(&h->scan_lock, flags);
5353a08a8471SStephen M. Cameron 	return finished;
5354a08a8471SStephen M. Cameron }
5355a08a8471SStephen M. Cameron 
53562946e82bSRobert Elliott static int hpsa_scsi_host_alloc(struct ctlr_info *h)
5357edd16368SStephen M. Cameron {
5358b705690dSStephen M. Cameron 	struct Scsi_Host *sh;
5359edd16368SStephen M. Cameron 
5360b705690dSStephen M. Cameron 	sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
53612946e82bSRobert Elliott 	if (sh == NULL) {
53622946e82bSRobert Elliott 		dev_err(&h->pdev->dev, "scsi_host_alloc failed\n");
53632946e82bSRobert Elliott 		return -ENOMEM;
53642946e82bSRobert Elliott 	}
5365b705690dSStephen M. Cameron 
5366b705690dSStephen M. Cameron 	sh->io_port = 0;
5367b705690dSStephen M. Cameron 	sh->n_io_port = 0;
5368b705690dSStephen M. Cameron 	sh->this_id = -1;
5369b705690dSStephen M. Cameron 	sh->max_channel = 3;
5370b705690dSStephen M. Cameron 	sh->max_cmd_len = MAX_COMMAND_SIZE;
5371b705690dSStephen M. Cameron 	sh->max_lun = HPSA_MAX_LUN;
5372b705690dSStephen M. Cameron 	sh->max_id = HPSA_MAX_LUN;
537341ce4c35SStephen Cameron 	sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS;
5374d54c5c24SStephen Cameron 	sh->cmd_per_lun = sh->can_queue;
5375b705690dSStephen M. Cameron 	sh->sg_tablesize = h->maxsgentries;
5376d04e62b9SKevin Barnett 	sh->transportt = hpsa_sas_transport_template;
5377b705690dSStephen M. Cameron 	sh->hostdata[0] = (unsigned long) h;
5378b705690dSStephen M. Cameron 	sh->irq = h->intr[h->intr_mode];
5379b705690dSStephen M. Cameron 	sh->unique_id = sh->irq;
538064d513acSChristoph Hellwig 
53812946e82bSRobert Elliott 	h->scsi_host = sh;
53822946e82bSRobert Elliott 	return 0;
53832946e82bSRobert Elliott }
53842946e82bSRobert Elliott 
53852946e82bSRobert Elliott static int hpsa_scsi_add_host(struct ctlr_info *h)
53862946e82bSRobert Elliott {
53872946e82bSRobert Elliott 	int rv;
53882946e82bSRobert Elliott 
53892946e82bSRobert Elliott 	rv = scsi_add_host(h->scsi_host, &h->pdev->dev);
53902946e82bSRobert Elliott 	if (rv) {
53912946e82bSRobert Elliott 		dev_err(&h->pdev->dev, "scsi_add_host failed\n");
53922946e82bSRobert Elliott 		return rv;
53932946e82bSRobert Elliott 	}
53942946e82bSRobert Elliott 	scsi_scan_host(h->scsi_host);
53952946e82bSRobert Elliott 	return 0;
5396edd16368SStephen M. Cameron }
5397edd16368SStephen M. Cameron 
5398b69324ffSWebb Scales /*
539973153fe5SWebb Scales  * The block layer has already gone to the trouble of picking out a unique,
540073153fe5SWebb Scales  * small-integer tag for this request.  We use an offset from that value as
540173153fe5SWebb Scales  * an index to select our command block.  (The offset allows us to reserve the
540273153fe5SWebb Scales  * low-numbered entries for our own uses.)
540373153fe5SWebb Scales  */
540473153fe5SWebb Scales static int hpsa_get_cmd_index(struct scsi_cmnd *scmd)
540573153fe5SWebb Scales {
540673153fe5SWebb Scales 	int idx = scmd->request->tag;
540773153fe5SWebb Scales 
540873153fe5SWebb Scales 	if (idx < 0)
540973153fe5SWebb Scales 		return idx;
541073153fe5SWebb Scales 
541173153fe5SWebb Scales 	/* Offset to leave space for internal cmds. */
541273153fe5SWebb Scales 	return idx += HPSA_NRESERVED_CMDS;
541373153fe5SWebb Scales }
541473153fe5SWebb Scales 
541573153fe5SWebb Scales /*
5416b69324ffSWebb Scales  * Send a TEST_UNIT_READY command to the specified LUN using the specified
5417b69324ffSWebb Scales  * reply queue; returns zero if the unit is ready, and non-zero otherwise.
5418b69324ffSWebb Scales  */
5419b69324ffSWebb Scales static int hpsa_send_test_unit_ready(struct ctlr_info *h,
5420b69324ffSWebb Scales 				struct CommandList *c, unsigned char lunaddr[],
5421b69324ffSWebb Scales 				int reply_queue)
5422edd16368SStephen M. Cameron {
54238919358eSTomas Henzl 	int rc;
5424edd16368SStephen M. Cameron 
5425a2dac136SStephen M. Cameron 	/* Send the Test Unit Ready, fill_cmd can't fail, no mapping */
5426a2dac136SStephen M. Cameron 	(void) fill_cmd(c, TEST_UNIT_READY, h,
5427a2dac136SStephen M. Cameron 			NULL, 0, 0, lunaddr, TYPE_CMD);
5428b69324ffSWebb Scales 	rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
542925163bd5SWebb Scales 	if (rc)
5430b69324ffSWebb Scales 		return rc;
5431edd16368SStephen M. Cameron 	/* no unmap needed here because no data xfer. */
5432edd16368SStephen M. Cameron 
5433b69324ffSWebb Scales 	/* Check if the unit is already ready. */
5434edd16368SStephen M. Cameron 	if (c->err_info->CommandStatus == CMD_SUCCESS)
5435b69324ffSWebb Scales 		return 0;
5436edd16368SStephen M. Cameron 
5437b69324ffSWebb Scales 	/*
5438b69324ffSWebb Scales 	 * The first command sent after reset will receive "unit attention" to
5439b69324ffSWebb Scales 	 * indicate that the LUN has been reset...this is actually what we're
5440b69324ffSWebb Scales 	 * looking for (but, success is good too).
5441b69324ffSWebb Scales 	 */
5442edd16368SStephen M. Cameron 	if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
5443edd16368SStephen M. Cameron 		c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
5444edd16368SStephen M. Cameron 			(c->err_info->SenseInfo[2] == NO_SENSE ||
5445edd16368SStephen M. Cameron 			 c->err_info->SenseInfo[2] == UNIT_ATTENTION))
5446b69324ffSWebb Scales 		return 0;
5447b69324ffSWebb Scales 
5448b69324ffSWebb Scales 	return 1;
5449b69324ffSWebb Scales }
5450b69324ffSWebb Scales 
5451b69324ffSWebb Scales /*
5452b69324ffSWebb Scales  * Wait for a TEST_UNIT_READY command to complete, retrying as necessary;
5453b69324ffSWebb Scales  * returns zero when the unit is ready, and non-zero when giving up.
5454b69324ffSWebb Scales  */
5455b69324ffSWebb Scales static int hpsa_wait_for_test_unit_ready(struct ctlr_info *h,
5456b69324ffSWebb Scales 				struct CommandList *c,
5457b69324ffSWebb Scales 				unsigned char lunaddr[], int reply_queue)
5458b69324ffSWebb Scales {
5459b69324ffSWebb Scales 	int rc;
5460b69324ffSWebb Scales 	int count = 0;
5461b69324ffSWebb Scales 	int waittime = 1; /* seconds */
5462b69324ffSWebb Scales 
5463b69324ffSWebb Scales 	/* Send test unit ready until device ready, or give up. */
5464b69324ffSWebb Scales 	for (count = 0; count < HPSA_TUR_RETRY_LIMIT; count++) {
5465b69324ffSWebb Scales 
5466b69324ffSWebb Scales 		/*
5467b69324ffSWebb Scales 		 * Wait for a bit.  do this first, because if we send
5468b69324ffSWebb Scales 		 * the TUR right away, the reset will just abort it.
5469b69324ffSWebb Scales 		 */
5470b69324ffSWebb Scales 		msleep(1000 * waittime);
5471b69324ffSWebb Scales 
5472b69324ffSWebb Scales 		rc = hpsa_send_test_unit_ready(h, c, lunaddr, reply_queue);
5473b69324ffSWebb Scales 		if (!rc)
5474edd16368SStephen M. Cameron 			break;
5475b69324ffSWebb Scales 
5476b69324ffSWebb Scales 		/* Increase wait time with each try, up to a point. */
5477b69324ffSWebb Scales 		if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
5478b69324ffSWebb Scales 			waittime *= 2;
5479b69324ffSWebb Scales 
5480b69324ffSWebb Scales 		dev_warn(&h->pdev->dev,
5481b69324ffSWebb Scales 			 "waiting %d secs for device to become ready.\n",
5482b69324ffSWebb Scales 			 waittime);
5483b69324ffSWebb Scales 	}
5484b69324ffSWebb Scales 
5485b69324ffSWebb Scales 	return rc;
5486b69324ffSWebb Scales }
5487b69324ffSWebb Scales 
5488b69324ffSWebb Scales static int wait_for_device_to_become_ready(struct ctlr_info *h,
5489b69324ffSWebb Scales 					   unsigned char lunaddr[],
5490b69324ffSWebb Scales 					   int reply_queue)
5491b69324ffSWebb Scales {
5492b69324ffSWebb Scales 	int first_queue;
5493b69324ffSWebb Scales 	int last_queue;
5494b69324ffSWebb Scales 	int rq;
5495b69324ffSWebb Scales 	int rc = 0;
5496b69324ffSWebb Scales 	struct CommandList *c;
5497b69324ffSWebb Scales 
5498b69324ffSWebb Scales 	c = cmd_alloc(h);
5499b69324ffSWebb Scales 
5500b69324ffSWebb Scales 	/*
5501b69324ffSWebb Scales 	 * If no specific reply queue was requested, then send the TUR
5502b69324ffSWebb Scales 	 * repeatedly, requesting a reply on each reply queue; otherwise execute
5503b69324ffSWebb Scales 	 * the loop exactly once using only the specified queue.
5504b69324ffSWebb Scales 	 */
5505b69324ffSWebb Scales 	if (reply_queue == DEFAULT_REPLY_QUEUE) {
5506b69324ffSWebb Scales 		first_queue = 0;
5507b69324ffSWebb Scales 		last_queue = h->nreply_queues - 1;
5508b69324ffSWebb Scales 	} else {
5509b69324ffSWebb Scales 		first_queue = reply_queue;
5510b69324ffSWebb Scales 		last_queue = reply_queue;
5511b69324ffSWebb Scales 	}
5512b69324ffSWebb Scales 
5513b69324ffSWebb Scales 	for (rq = first_queue; rq <= last_queue; rq++) {
5514b69324ffSWebb Scales 		rc = hpsa_wait_for_test_unit_ready(h, c, lunaddr, rq);
5515b69324ffSWebb Scales 		if (rc)
5516b69324ffSWebb Scales 			break;
5517edd16368SStephen M. Cameron 	}
5518edd16368SStephen M. Cameron 
5519edd16368SStephen M. Cameron 	if (rc)
5520edd16368SStephen M. Cameron 		dev_warn(&h->pdev->dev, "giving up on device.\n");
5521edd16368SStephen M. Cameron 	else
5522edd16368SStephen M. Cameron 		dev_warn(&h->pdev->dev, "device is ready.\n");
5523edd16368SStephen M. Cameron 
552445fcb86eSStephen Cameron 	cmd_free(h, c);
5525edd16368SStephen M. Cameron 	return rc;
5526edd16368SStephen M. Cameron }
5527edd16368SStephen M. Cameron 
5528edd16368SStephen M. Cameron /* Need at least one of these error handlers to keep ../scsi/hosts.c from
5529edd16368SStephen M. Cameron  * complaining.  Doing a host- or bus-reset can't do anything good here.
5530edd16368SStephen M. Cameron  */
5531edd16368SStephen M. Cameron static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
5532edd16368SStephen M. Cameron {
5533edd16368SStephen M. Cameron 	int rc;
5534edd16368SStephen M. Cameron 	struct ctlr_info *h;
5535edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *dev;
55360b9b7b6eSScott Teel 	u8 reset_type;
55372dc127bbSDan Carpenter 	char msg[48];
5538edd16368SStephen M. Cameron 
5539edd16368SStephen M. Cameron 	/* find the controller to which the command to be aborted was sent */
5540edd16368SStephen M. Cameron 	h = sdev_to_hba(scsicmd->device);
5541edd16368SStephen M. Cameron 	if (h == NULL) /* paranoia */
5542edd16368SStephen M. Cameron 		return FAILED;
5543e345893bSDon Brace 
5544e345893bSDon Brace 	if (lockup_detected(h))
5545e345893bSDon Brace 		return FAILED;
5546e345893bSDon Brace 
5547edd16368SStephen M. Cameron 	dev = scsicmd->device->hostdata;
5548edd16368SStephen M. Cameron 	if (!dev) {
5549d604f533SWebb Scales 		dev_err(&h->pdev->dev, "%s: device lookup failed\n", __func__);
5550edd16368SStephen M. Cameron 		return FAILED;
5551edd16368SStephen M. Cameron 	}
555225163bd5SWebb Scales 
555325163bd5SWebb Scales 	/* if controller locked up, we can guarantee command won't complete */
555425163bd5SWebb Scales 	if (lockup_detected(h)) {
55552dc127bbSDan Carpenter 		snprintf(msg, sizeof(msg),
55562dc127bbSDan Carpenter 			 "cmd %d RESET FAILED, lockup detected",
555773153fe5SWebb Scales 			 hpsa_get_cmd_index(scsicmd));
555873153fe5SWebb Scales 		hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
555925163bd5SWebb Scales 		return FAILED;
556025163bd5SWebb Scales 	}
556125163bd5SWebb Scales 
556225163bd5SWebb Scales 	/* this reset request might be the result of a lockup; check */
556325163bd5SWebb Scales 	if (detect_controller_lockup(h)) {
55642dc127bbSDan Carpenter 		snprintf(msg, sizeof(msg),
55652dc127bbSDan Carpenter 			 "cmd %d RESET FAILED, new lockup detected",
556673153fe5SWebb Scales 			 hpsa_get_cmd_index(scsicmd));
556773153fe5SWebb Scales 		hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
556825163bd5SWebb Scales 		return FAILED;
556925163bd5SWebb Scales 	}
557025163bd5SWebb Scales 
5571d604f533SWebb Scales 	/* Do not attempt on controller */
5572d604f533SWebb Scales 	if (is_hba_lunid(dev->scsi3addr))
5573d604f533SWebb Scales 		return SUCCESS;
5574d604f533SWebb Scales 
55750b9b7b6eSScott Teel 	if (is_logical_dev_addr_mode(dev->scsi3addr))
55760b9b7b6eSScott Teel 		reset_type = HPSA_DEVICE_RESET_MSG;
55770b9b7b6eSScott Teel 	else
55780b9b7b6eSScott Teel 		reset_type = HPSA_PHYS_TARGET_RESET;
55790b9b7b6eSScott Teel 
55800b9b7b6eSScott Teel 	sprintf(msg, "resetting %s",
55810b9b7b6eSScott Teel 		reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ");
55820b9b7b6eSScott Teel 	hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
558325163bd5SWebb Scales 
5584da03ded0SDon Brace 	h->reset_in_progress = 1;
5585d416b0c7SStephen M. Cameron 
5586edd16368SStephen M. Cameron 	/* send a reset to the SCSI LUN which the command was sent to */
55870b9b7b6eSScott Teel 	rc = hpsa_do_reset(h, dev, dev->scsi3addr, reset_type,
558825163bd5SWebb Scales 			   DEFAULT_REPLY_QUEUE);
55890b9b7b6eSScott Teel 	sprintf(msg, "reset %s %s",
55900b9b7b6eSScott Teel 		reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ",
55912dc127bbSDan Carpenter 		rc == 0 ? "completed successfully" : "failed");
5592d604f533SWebb Scales 	hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
5593da03ded0SDon Brace 	h->reset_in_progress = 0;
5594d604f533SWebb Scales 	return rc == 0 ? SUCCESS : FAILED;
5595edd16368SStephen M. Cameron }
5596edd16368SStephen M. Cameron 
55976cba3f19SStephen M. Cameron static void swizzle_abort_tag(u8 *tag)
55986cba3f19SStephen M. Cameron {
55996cba3f19SStephen M. Cameron 	u8 original_tag[8];
56006cba3f19SStephen M. Cameron 
56016cba3f19SStephen M. Cameron 	memcpy(original_tag, tag, 8);
56026cba3f19SStephen M. Cameron 	tag[0] = original_tag[3];
56036cba3f19SStephen M. Cameron 	tag[1] = original_tag[2];
56046cba3f19SStephen M. Cameron 	tag[2] = original_tag[1];
56056cba3f19SStephen M. Cameron 	tag[3] = original_tag[0];
56066cba3f19SStephen M. Cameron 	tag[4] = original_tag[7];
56076cba3f19SStephen M. Cameron 	tag[5] = original_tag[6];
56086cba3f19SStephen M. Cameron 	tag[6] = original_tag[5];
56096cba3f19SStephen M. Cameron 	tag[7] = original_tag[4];
56106cba3f19SStephen M. Cameron }
56116cba3f19SStephen M. Cameron 
561217eb87d2SScott Teel static void hpsa_get_tag(struct ctlr_info *h,
56132b08b3e9SDon Brace 	struct CommandList *c, __le32 *taglower, __le32 *tagupper)
561417eb87d2SScott Teel {
56152b08b3e9SDon Brace 	u64 tag;
561617eb87d2SScott Teel 	if (c->cmd_type == CMD_IOACCEL1) {
561717eb87d2SScott Teel 		struct io_accel1_cmd *cm1 = (struct io_accel1_cmd *)
561817eb87d2SScott Teel 			&h->ioaccel_cmd_pool[c->cmdindex];
56192b08b3e9SDon Brace 		tag = le64_to_cpu(cm1->tag);
56202b08b3e9SDon Brace 		*tagupper = cpu_to_le32(tag >> 32);
56212b08b3e9SDon Brace 		*taglower = cpu_to_le32(tag);
562254b6e9e9SScott Teel 		return;
562354b6e9e9SScott Teel 	}
562454b6e9e9SScott Teel 	if (c->cmd_type == CMD_IOACCEL2) {
562554b6e9e9SScott Teel 		struct io_accel2_cmd *cm2 = (struct io_accel2_cmd *)
562654b6e9e9SScott Teel 			&h->ioaccel2_cmd_pool[c->cmdindex];
5627dd0e19f3SScott Teel 		/* upper tag not used in ioaccel2 mode */
5628dd0e19f3SScott Teel 		memset(tagupper, 0, sizeof(*tagupper));
5629dd0e19f3SScott Teel 		*taglower = cm2->Tag;
563054b6e9e9SScott Teel 		return;
563154b6e9e9SScott Teel 	}
56322b08b3e9SDon Brace 	tag = le64_to_cpu(c->Header.tag);
56332b08b3e9SDon Brace 	*tagupper = cpu_to_le32(tag >> 32);
56342b08b3e9SDon Brace 	*taglower = cpu_to_le32(tag);
563517eb87d2SScott Teel }
563654b6e9e9SScott Teel 
563775167d2cSStephen M. Cameron static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr,
56389b5c48c2SStephen Cameron 	struct CommandList *abort, int reply_queue)
563975167d2cSStephen M. Cameron {
564075167d2cSStephen M. Cameron 	int rc = IO_OK;
564175167d2cSStephen M. Cameron 	struct CommandList *c;
564275167d2cSStephen M. Cameron 	struct ErrorInfo *ei;
56432b08b3e9SDon Brace 	__le32 tagupper, taglower;
564475167d2cSStephen M. Cameron 
564545fcb86eSStephen Cameron 	c = cmd_alloc(h);
564675167d2cSStephen M. Cameron 
5647a2dac136SStephen M. Cameron 	/* fill_cmd can't fail here, no buffer to map */
56489b5c48c2SStephen Cameron 	(void) fill_cmd(c, HPSA_ABORT_MSG, h, &abort->Header.tag,
5649a2dac136SStephen M. Cameron 		0, 0, scsi3addr, TYPE_MSG);
56509b5c48c2SStephen Cameron 	if (h->needs_abort_tags_swizzled)
56516cba3f19SStephen M. Cameron 		swizzle_abort_tag(&c->Request.CDB[4]);
565225163bd5SWebb Scales 	(void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
565317eb87d2SScott Teel 	hpsa_get_tag(h, abort, &taglower, &tagupper);
565425163bd5SWebb Scales 	dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd(abort) completed.\n",
565517eb87d2SScott Teel 		__func__, tagupper, taglower);
565675167d2cSStephen M. Cameron 	/* no unmap needed here because no data xfer. */
565775167d2cSStephen M. Cameron 
565875167d2cSStephen M. Cameron 	ei = c->err_info;
565975167d2cSStephen M. Cameron 	switch (ei->CommandStatus) {
566075167d2cSStephen M. Cameron 	case CMD_SUCCESS:
566175167d2cSStephen M. Cameron 		break;
56629437ac43SStephen Cameron 	case CMD_TMF_STATUS:
56639437ac43SStephen Cameron 		rc = hpsa_evaluate_tmf_status(h, c);
56649437ac43SStephen Cameron 		break;
566575167d2cSStephen M. Cameron 	case CMD_UNABORTABLE: /* Very common, don't make noise. */
566675167d2cSStephen M. Cameron 		rc = -1;
566775167d2cSStephen M. Cameron 		break;
566875167d2cSStephen M. Cameron 	default:
566975167d2cSStephen M. Cameron 		dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n",
567017eb87d2SScott Teel 			__func__, tagupper, taglower);
5671d1e8beacSStephen M. Cameron 		hpsa_scsi_interpret_error(h, c);
567275167d2cSStephen M. Cameron 		rc = -1;
567375167d2cSStephen M. Cameron 		break;
567475167d2cSStephen M. Cameron 	}
567545fcb86eSStephen Cameron 	cmd_free(h, c);
5676dd0e19f3SScott Teel 	dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n",
5677dd0e19f3SScott Teel 		__func__, tagupper, taglower);
567875167d2cSStephen M. Cameron 	return rc;
567975167d2cSStephen M. Cameron }
568075167d2cSStephen M. Cameron 
56818be986ccSStephen Cameron static void setup_ioaccel2_abort_cmd(struct CommandList *c, struct ctlr_info *h,
56828be986ccSStephen Cameron 	struct CommandList *command_to_abort, int reply_queue)
56838be986ccSStephen Cameron {
56848be986ccSStephen Cameron 	struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
56858be986ccSStephen Cameron 	struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2;
56868be986ccSStephen Cameron 	struct io_accel2_cmd *c2a =
56878be986ccSStephen Cameron 		&h->ioaccel2_cmd_pool[command_to_abort->cmdindex];
5688a58e7e53SWebb Scales 	struct scsi_cmnd *scmd = command_to_abort->scsi_cmd;
56898be986ccSStephen Cameron 	struct hpsa_scsi_dev_t *dev = scmd->device->hostdata;
56908be986ccSStephen Cameron 
56918be986ccSStephen Cameron 	/*
56928be986ccSStephen Cameron 	 * We're overlaying struct hpsa_tmf_struct on top of something which
56938be986ccSStephen Cameron 	 * was allocated as a struct io_accel2_cmd, so we better be sure it
56948be986ccSStephen Cameron 	 * actually fits, and doesn't overrun the error info space.
56958be986ccSStephen Cameron 	 */
56968be986ccSStephen Cameron 	BUILD_BUG_ON(sizeof(struct hpsa_tmf_struct) >
56978be986ccSStephen Cameron 			sizeof(struct io_accel2_cmd));
56988be986ccSStephen Cameron 	BUG_ON(offsetof(struct io_accel2_cmd, error_data) <
56998be986ccSStephen Cameron 			offsetof(struct hpsa_tmf_struct, error_len) +
57008be986ccSStephen Cameron 				sizeof(ac->error_len));
57018be986ccSStephen Cameron 
57028be986ccSStephen Cameron 	c->cmd_type = IOACCEL2_TMF;
5703a58e7e53SWebb Scales 	c->scsi_cmd = SCSI_CMD_BUSY;
5704a58e7e53SWebb Scales 
57058be986ccSStephen Cameron 	/* Adjust the DMA address to point to the accelerated command buffer */
57068be986ccSStephen Cameron 	c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle +
57078be986ccSStephen Cameron 				(c->cmdindex * sizeof(struct io_accel2_cmd));
57088be986ccSStephen Cameron 	BUG_ON(c->busaddr & 0x0000007F);
57098be986ccSStephen Cameron 
57108be986ccSStephen Cameron 	memset(ac, 0, sizeof(*c2)); /* yes this is correct */
57118be986ccSStephen Cameron 	ac->iu_type = IOACCEL2_IU_TMF_TYPE;
57128be986ccSStephen Cameron 	ac->reply_queue = reply_queue;
57138be986ccSStephen Cameron 	ac->tmf = IOACCEL2_TMF_ABORT;
57148be986ccSStephen Cameron 	ac->it_nexus = cpu_to_le32(dev->ioaccel_handle);
57158be986ccSStephen Cameron 	memset(ac->lun_id, 0, sizeof(ac->lun_id));
57168be986ccSStephen Cameron 	ac->tag = cpu_to_le64(c->cmdindex << DIRECT_LOOKUP_SHIFT);
57178be986ccSStephen Cameron 	ac->abort_tag = cpu_to_le64(le32_to_cpu(c2a->Tag));
57188be986ccSStephen Cameron 	ac->error_ptr = cpu_to_le64(c->busaddr +
57198be986ccSStephen Cameron 			offsetof(struct io_accel2_cmd, error_data));
57208be986ccSStephen Cameron 	ac->error_len = cpu_to_le32(sizeof(c2->error_data));
57218be986ccSStephen Cameron }
57228be986ccSStephen Cameron 
572354b6e9e9SScott Teel /* ioaccel2 path firmware cannot handle abort task requests.
572454b6e9e9SScott Teel  * Change abort requests to physical target reset, and send to the
572554b6e9e9SScott Teel  * address of the physical disk used for the ioaccel 2 command.
572654b6e9e9SScott Teel  * Return 0 on success (IO_OK)
572754b6e9e9SScott Teel  *	 -1 on failure
572854b6e9e9SScott Teel  */
572954b6e9e9SScott Teel 
573054b6e9e9SScott Teel static int hpsa_send_reset_as_abort_ioaccel2(struct ctlr_info *h,
573125163bd5SWebb Scales 	unsigned char *scsi3addr, struct CommandList *abort, int reply_queue)
573254b6e9e9SScott Teel {
573354b6e9e9SScott Teel 	int rc = IO_OK;
573454b6e9e9SScott Teel 	struct scsi_cmnd *scmd; /* scsi command within request being aborted */
573554b6e9e9SScott Teel 	struct hpsa_scsi_dev_t *dev; /* device to which scsi cmd was sent */
573654b6e9e9SScott Teel 	unsigned char phys_scsi3addr[8]; /* addr of phys disk with volume */
573754b6e9e9SScott Teel 	unsigned char *psa = &phys_scsi3addr[0];
573854b6e9e9SScott Teel 
573954b6e9e9SScott Teel 	/* Get a pointer to the hpsa logical device. */
57407fa3030cSStephen Cameron 	scmd = abort->scsi_cmd;
574154b6e9e9SScott Teel 	dev = (struct hpsa_scsi_dev_t *)(scmd->device->hostdata);
574254b6e9e9SScott Teel 	if (dev == NULL) {
574354b6e9e9SScott Teel 		dev_warn(&h->pdev->dev,
574454b6e9e9SScott Teel 			"Cannot abort: no device pointer for command.\n");
574554b6e9e9SScott Teel 			return -1; /* not abortable */
574654b6e9e9SScott Teel 	}
574754b6e9e9SScott Teel 
57482ba8bfc8SStephen M. Cameron 	if (h->raid_offload_debug > 0)
57492ba8bfc8SStephen M. Cameron 		dev_info(&h->pdev->dev,
57500d96ef5fSWebb Scales 			"scsi %d:%d:%d:%d %s scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
57512ba8bfc8SStephen M. Cameron 			h->scsi_host->host_no, dev->bus, dev->target, dev->lun,
57520d96ef5fSWebb Scales 			"Reset as abort",
57532ba8bfc8SStephen M. Cameron 			scsi3addr[0], scsi3addr[1], scsi3addr[2], scsi3addr[3],
57542ba8bfc8SStephen M. Cameron 			scsi3addr[4], scsi3addr[5], scsi3addr[6], scsi3addr[7]);
57552ba8bfc8SStephen M. Cameron 
575654b6e9e9SScott Teel 	if (!dev->offload_enabled) {
575754b6e9e9SScott Teel 		dev_warn(&h->pdev->dev,
575854b6e9e9SScott Teel 			"Can't abort: device is not operating in HP SSD Smart Path mode.\n");
575954b6e9e9SScott Teel 		return -1; /* not abortable */
576054b6e9e9SScott Teel 	}
576154b6e9e9SScott Teel 
576254b6e9e9SScott Teel 	/* Incoming scsi3addr is logical addr. We need physical disk addr. */
576354b6e9e9SScott Teel 	if (!hpsa_get_pdisk_of_ioaccel2(h, abort, psa)) {
576454b6e9e9SScott Teel 		dev_warn(&h->pdev->dev, "Can't abort: Failed lookup of physical address.\n");
576554b6e9e9SScott Teel 		return -1; /* not abortable */
576654b6e9e9SScott Teel 	}
576754b6e9e9SScott Teel 
576854b6e9e9SScott Teel 	/* send the reset */
57692ba8bfc8SStephen M. Cameron 	if (h->raid_offload_debug > 0)
57702ba8bfc8SStephen M. Cameron 		dev_info(&h->pdev->dev,
57712ba8bfc8SStephen M. Cameron 			"Reset as abort: Resetting physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
57722ba8bfc8SStephen M. Cameron 			psa[0], psa[1], psa[2], psa[3],
57732ba8bfc8SStephen M. Cameron 			psa[4], psa[5], psa[6], psa[7]);
5774d604f533SWebb Scales 	rc = hpsa_do_reset(h, dev, psa, HPSA_RESET_TYPE_TARGET, reply_queue);
577554b6e9e9SScott Teel 	if (rc != 0) {
577654b6e9e9SScott Teel 		dev_warn(&h->pdev->dev,
577754b6e9e9SScott Teel 			"Reset as abort: Failed on physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
577854b6e9e9SScott Teel 			psa[0], psa[1], psa[2], psa[3],
577954b6e9e9SScott Teel 			psa[4], psa[5], psa[6], psa[7]);
578054b6e9e9SScott Teel 		return rc; /* failed to reset */
578154b6e9e9SScott Teel 	}
578254b6e9e9SScott Teel 
578354b6e9e9SScott Teel 	/* wait for device to recover */
5784b69324ffSWebb Scales 	if (wait_for_device_to_become_ready(h, psa, reply_queue) != 0) {
578554b6e9e9SScott Teel 		dev_warn(&h->pdev->dev,
578654b6e9e9SScott Teel 			"Reset as abort: Failed: Device never recovered from reset: 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
578754b6e9e9SScott Teel 			psa[0], psa[1], psa[2], psa[3],
578854b6e9e9SScott Teel 			psa[4], psa[5], psa[6], psa[7]);
578954b6e9e9SScott Teel 		return -1;  /* failed to recover */
579054b6e9e9SScott Teel 	}
579154b6e9e9SScott Teel 
579254b6e9e9SScott Teel 	/* device recovered */
579354b6e9e9SScott Teel 	dev_info(&h->pdev->dev,
579454b6e9e9SScott Teel 		"Reset as abort: Device recovered from reset: scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
579554b6e9e9SScott Teel 		psa[0], psa[1], psa[2], psa[3],
579654b6e9e9SScott Teel 		psa[4], psa[5], psa[6], psa[7]);
579754b6e9e9SScott Teel 
579854b6e9e9SScott Teel 	return rc; /* success */
579954b6e9e9SScott Teel }
580054b6e9e9SScott Teel 
58018be986ccSStephen Cameron static int hpsa_send_abort_ioaccel2(struct ctlr_info *h,
58028be986ccSStephen Cameron 	struct CommandList *abort, int reply_queue)
58038be986ccSStephen Cameron {
58048be986ccSStephen Cameron 	int rc = IO_OK;
58058be986ccSStephen Cameron 	struct CommandList *c;
58068be986ccSStephen Cameron 	__le32 taglower, tagupper;
58078be986ccSStephen Cameron 	struct hpsa_scsi_dev_t *dev;
58088be986ccSStephen Cameron 	struct io_accel2_cmd *c2;
58098be986ccSStephen Cameron 
58108be986ccSStephen Cameron 	dev = abort->scsi_cmd->device->hostdata;
58118be986ccSStephen Cameron 	if (!dev->offload_enabled && !dev->hba_ioaccel_enabled)
58128be986ccSStephen Cameron 		return -1;
58138be986ccSStephen Cameron 
58148be986ccSStephen Cameron 	c = cmd_alloc(h);
58158be986ccSStephen Cameron 	setup_ioaccel2_abort_cmd(c, h, abort, reply_queue);
58168be986ccSStephen Cameron 	c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
58178be986ccSStephen Cameron 	(void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
58188be986ccSStephen Cameron 	hpsa_get_tag(h, abort, &taglower, &tagupper);
58198be986ccSStephen Cameron 	dev_dbg(&h->pdev->dev,
58208be986ccSStephen Cameron 		"%s: Tag:0x%08x:%08x: do_simple_cmd(ioaccel2 abort) completed.\n",
58218be986ccSStephen Cameron 		__func__, tagupper, taglower);
58228be986ccSStephen Cameron 	/* no unmap needed here because no data xfer. */
58238be986ccSStephen Cameron 
58248be986ccSStephen Cameron 	dev_dbg(&h->pdev->dev,
58258be986ccSStephen Cameron 		"%s: Tag:0x%08x:%08x: abort service response = 0x%02x.\n",
58268be986ccSStephen Cameron 		__func__, tagupper, taglower, c2->error_data.serv_response);
58278be986ccSStephen Cameron 	switch (c2->error_data.serv_response) {
58288be986ccSStephen Cameron 	case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE:
58298be986ccSStephen Cameron 	case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS:
58308be986ccSStephen Cameron 		rc = 0;
58318be986ccSStephen Cameron 		break;
58328be986ccSStephen Cameron 	case IOACCEL2_SERV_RESPONSE_TMF_REJECTED:
58338be986ccSStephen Cameron 	case IOACCEL2_SERV_RESPONSE_FAILURE:
58348be986ccSStephen Cameron 	case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN:
58358be986ccSStephen Cameron 		rc = -1;
58368be986ccSStephen Cameron 		break;
58378be986ccSStephen Cameron 	default:
58388be986ccSStephen Cameron 		dev_warn(&h->pdev->dev,
58398be986ccSStephen Cameron 			"%s: Tag:0x%08x:%08x: unknown abort service response 0x%02x\n",
58408be986ccSStephen Cameron 			__func__, tagupper, taglower,
58418be986ccSStephen Cameron 			c2->error_data.serv_response);
58428be986ccSStephen Cameron 		rc = -1;
58438be986ccSStephen Cameron 	}
58448be986ccSStephen Cameron 	cmd_free(h, c);
58458be986ccSStephen Cameron 	dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", __func__,
58468be986ccSStephen Cameron 		tagupper, taglower);
58478be986ccSStephen Cameron 	return rc;
58488be986ccSStephen Cameron }
58498be986ccSStephen Cameron 
58506cba3f19SStephen M. Cameron static int hpsa_send_abort_both_ways(struct ctlr_info *h,
585139f3deb2SDon Brace 	struct hpsa_scsi_dev_t *dev, struct CommandList *abort, int reply_queue)
58526cba3f19SStephen M. Cameron {
58538be986ccSStephen Cameron 	/*
58548be986ccSStephen Cameron 	 * ioccelerator mode 2 commands should be aborted via the
585554b6e9e9SScott Teel 	 * accelerated path, since RAID path is unaware of these commands,
58568be986ccSStephen Cameron 	 * but not all underlying firmware can handle abort TMF.
58578be986ccSStephen Cameron 	 * Change abort to physical device reset when abort TMF is unsupported.
585854b6e9e9SScott Teel 	 */
58598be986ccSStephen Cameron 	if (abort->cmd_type == CMD_IOACCEL2) {
586039f3deb2SDon Brace 		if ((HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags) ||
586139f3deb2SDon Brace 			dev->physical_device)
58628be986ccSStephen Cameron 			return hpsa_send_abort_ioaccel2(h, abort,
58638be986ccSStephen Cameron 						reply_queue);
58648be986ccSStephen Cameron 		else
586539f3deb2SDon Brace 			return hpsa_send_reset_as_abort_ioaccel2(h,
586639f3deb2SDon Brace 							dev->scsi3addr,
586725163bd5SWebb Scales 							abort, reply_queue);
58688be986ccSStephen Cameron 	}
586939f3deb2SDon Brace 	return hpsa_send_abort(h, dev->scsi3addr, abort, reply_queue);
587025163bd5SWebb Scales }
587125163bd5SWebb Scales 
587225163bd5SWebb Scales /* Find out which reply queue a command was meant to return on */
587325163bd5SWebb Scales static int hpsa_extract_reply_queue(struct ctlr_info *h,
587425163bd5SWebb Scales 					struct CommandList *c)
587525163bd5SWebb Scales {
587625163bd5SWebb Scales 	if (c->cmd_type == CMD_IOACCEL2)
587725163bd5SWebb Scales 		return h->ioaccel2_cmd_pool[c->cmdindex].reply_queue;
587825163bd5SWebb Scales 	return c->Header.ReplyQueue;
58796cba3f19SStephen M. Cameron }
58806cba3f19SStephen M. Cameron 
58819b5c48c2SStephen Cameron /*
58829b5c48c2SStephen Cameron  * Limit concurrency of abort commands to prevent
58839b5c48c2SStephen Cameron  * over-subscription of commands
58849b5c48c2SStephen Cameron  */
58859b5c48c2SStephen Cameron static inline int wait_for_available_abort_cmd(struct ctlr_info *h)
58869b5c48c2SStephen Cameron {
58879b5c48c2SStephen Cameron #define ABORT_CMD_WAIT_MSECS 5000
58889b5c48c2SStephen Cameron 	return !wait_event_timeout(h->abort_cmd_wait_queue,
58899b5c48c2SStephen Cameron 			atomic_dec_if_positive(&h->abort_cmds_available) >= 0,
58909b5c48c2SStephen Cameron 			msecs_to_jiffies(ABORT_CMD_WAIT_MSECS));
58919b5c48c2SStephen Cameron }
58929b5c48c2SStephen Cameron 
589375167d2cSStephen M. Cameron /* Send an abort for the specified command.
589475167d2cSStephen M. Cameron  *	If the device and controller support it,
589575167d2cSStephen M. Cameron  *		send a task abort request.
589675167d2cSStephen M. Cameron  */
589775167d2cSStephen M. Cameron static int hpsa_eh_abort_handler(struct scsi_cmnd *sc)
589875167d2cSStephen M. Cameron {
589975167d2cSStephen M. Cameron 
5900a58e7e53SWebb Scales 	int rc;
590175167d2cSStephen M. Cameron 	struct ctlr_info *h;
590275167d2cSStephen M. Cameron 	struct hpsa_scsi_dev_t *dev;
590375167d2cSStephen M. Cameron 	struct CommandList *abort; /* pointer to command to be aborted */
590475167d2cSStephen M. Cameron 	struct scsi_cmnd *as;	/* ptr to scsi cmd inside aborted command. */
590575167d2cSStephen M. Cameron 	char msg[256];		/* For debug messaging. */
590675167d2cSStephen M. Cameron 	int ml = 0;
59072b08b3e9SDon Brace 	__le32 tagupper, taglower;
590825163bd5SWebb Scales 	int refcount, reply_queue;
590925163bd5SWebb Scales 
591025163bd5SWebb Scales 	if (sc == NULL)
591125163bd5SWebb Scales 		return FAILED;
591275167d2cSStephen M. Cameron 
59139b5c48c2SStephen Cameron 	if (sc->device == NULL)
59149b5c48c2SStephen Cameron 		return FAILED;
59159b5c48c2SStephen Cameron 
591675167d2cSStephen M. Cameron 	/* Find the controller of the command to be aborted */
591775167d2cSStephen M. Cameron 	h = sdev_to_hba(sc->device);
59189b5c48c2SStephen Cameron 	if (h == NULL)
591975167d2cSStephen M. Cameron 		return FAILED;
592075167d2cSStephen M. Cameron 
592125163bd5SWebb Scales 	/* Find the device of the command to be aborted */
592225163bd5SWebb Scales 	dev = sc->device->hostdata;
592325163bd5SWebb Scales 	if (!dev) {
592425163bd5SWebb Scales 		dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n",
592525163bd5SWebb Scales 				msg);
5926e345893bSDon Brace 		return FAILED;
592725163bd5SWebb Scales 	}
592825163bd5SWebb Scales 
592925163bd5SWebb Scales 	/* If controller locked up, we can guarantee command won't complete */
593025163bd5SWebb Scales 	if (lockup_detected(h)) {
593125163bd5SWebb Scales 		hpsa_show_dev_msg(KERN_WARNING, h, dev,
593225163bd5SWebb Scales 					"ABORT FAILED, lockup detected");
593325163bd5SWebb Scales 		return FAILED;
593425163bd5SWebb Scales 	}
593525163bd5SWebb Scales 
593625163bd5SWebb Scales 	/* This is a good time to check if controller lockup has occurred */
593725163bd5SWebb Scales 	if (detect_controller_lockup(h)) {
593825163bd5SWebb Scales 		hpsa_show_dev_msg(KERN_WARNING, h, dev,
593925163bd5SWebb Scales 					"ABORT FAILED, new lockup detected");
594025163bd5SWebb Scales 		return FAILED;
594125163bd5SWebb Scales 	}
5942e345893bSDon Brace 
594375167d2cSStephen M. Cameron 	/* Check that controller supports some kind of task abort */
594475167d2cSStephen M. Cameron 	if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) &&
594575167d2cSStephen M. Cameron 		!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
594675167d2cSStephen M. Cameron 		return FAILED;
594775167d2cSStephen M. Cameron 
594875167d2cSStephen M. Cameron 	memset(msg, 0, sizeof(msg));
59494b761557SRobert Elliott 	ml += sprintf(msg+ml, "scsi %d:%d:%d:%llu %s %p",
595075167d2cSStephen M. Cameron 		h->scsi_host->host_no, sc->device->channel,
59510d96ef5fSWebb Scales 		sc->device->id, sc->device->lun,
59524b761557SRobert Elliott 		"Aborting command", sc);
595375167d2cSStephen M. Cameron 
595475167d2cSStephen M. Cameron 	/* Get SCSI command to be aborted */
595575167d2cSStephen M. Cameron 	abort = (struct CommandList *) sc->host_scribble;
595675167d2cSStephen M. Cameron 	if (abort == NULL) {
5957281a7fd0SWebb Scales 		/* This can happen if the command already completed. */
5958281a7fd0SWebb Scales 		return SUCCESS;
5959281a7fd0SWebb Scales 	}
5960281a7fd0SWebb Scales 	refcount = atomic_inc_return(&abort->refcount);
5961281a7fd0SWebb Scales 	if (refcount == 1) { /* Command is done already. */
5962281a7fd0SWebb Scales 		cmd_free(h, abort);
5963281a7fd0SWebb Scales 		return SUCCESS;
596475167d2cSStephen M. Cameron 	}
59659b5c48c2SStephen Cameron 
59669b5c48c2SStephen Cameron 	/* Don't bother trying the abort if we know it won't work. */
59679b5c48c2SStephen Cameron 	if (abort->cmd_type != CMD_IOACCEL2 &&
59689b5c48c2SStephen Cameron 		abort->cmd_type != CMD_IOACCEL1 && !dev->supports_aborts) {
59699b5c48c2SStephen Cameron 		cmd_free(h, abort);
59709b5c48c2SStephen Cameron 		return FAILED;
59719b5c48c2SStephen Cameron 	}
59729b5c48c2SStephen Cameron 
5973a58e7e53SWebb Scales 	/*
5974a58e7e53SWebb Scales 	 * Check that we're aborting the right command.
5975a58e7e53SWebb Scales 	 * It's possible the CommandList already completed and got re-used.
5976a58e7e53SWebb Scales 	 */
5977a58e7e53SWebb Scales 	if (abort->scsi_cmd != sc) {
5978a58e7e53SWebb Scales 		cmd_free(h, abort);
5979a58e7e53SWebb Scales 		return SUCCESS;
5980a58e7e53SWebb Scales 	}
5981a58e7e53SWebb Scales 
5982a58e7e53SWebb Scales 	abort->abort_pending = true;
598317eb87d2SScott Teel 	hpsa_get_tag(h, abort, &taglower, &tagupper);
598425163bd5SWebb Scales 	reply_queue = hpsa_extract_reply_queue(h, abort);
598517eb87d2SScott Teel 	ml += sprintf(msg+ml, "Tag:0x%08x:%08x ", tagupper, taglower);
59867fa3030cSStephen Cameron 	as  = abort->scsi_cmd;
598775167d2cSStephen M. Cameron 	if (as != NULL)
59884b761557SRobert Elliott 		ml += sprintf(msg+ml,
59894b761557SRobert Elliott 			"CDBLen: %d CDB: 0x%02x%02x... SN: 0x%lx ",
59904b761557SRobert Elliott 			as->cmd_len, as->cmnd[0], as->cmnd[1],
59914b761557SRobert Elliott 			as->serial_number);
59924b761557SRobert Elliott 	dev_warn(&h->pdev->dev, "%s BEING SENT\n", msg);
59930d96ef5fSWebb Scales 	hpsa_show_dev_msg(KERN_WARNING, h, dev, "Aborting command");
59944b761557SRobert Elliott 
599575167d2cSStephen M. Cameron 	/*
599675167d2cSStephen M. Cameron 	 * Command is in flight, or possibly already completed
599775167d2cSStephen M. Cameron 	 * by the firmware (but not to the scsi mid layer) but we can't
599875167d2cSStephen M. Cameron 	 * distinguish which.  Send the abort down.
599975167d2cSStephen M. Cameron 	 */
60009b5c48c2SStephen Cameron 	if (wait_for_available_abort_cmd(h)) {
60019b5c48c2SStephen Cameron 		dev_warn(&h->pdev->dev,
60024b761557SRobert Elliott 			"%s FAILED, timeout waiting for an abort command to become available.\n",
60034b761557SRobert Elliott 			msg);
60049b5c48c2SStephen Cameron 		cmd_free(h, abort);
60059b5c48c2SStephen Cameron 		return FAILED;
60069b5c48c2SStephen Cameron 	}
600739f3deb2SDon Brace 	rc = hpsa_send_abort_both_ways(h, dev, abort, reply_queue);
60089b5c48c2SStephen Cameron 	atomic_inc(&h->abort_cmds_available);
60099b5c48c2SStephen Cameron 	wake_up_all(&h->abort_cmd_wait_queue);
601075167d2cSStephen M. Cameron 	if (rc != 0) {
60114b761557SRobert Elliott 		dev_warn(&h->pdev->dev, "%s SENT, FAILED\n", msg);
60120d96ef5fSWebb Scales 		hpsa_show_dev_msg(KERN_WARNING, h, dev,
60130d96ef5fSWebb Scales 				"FAILED to abort command");
6014281a7fd0SWebb Scales 		cmd_free(h, abort);
601575167d2cSStephen M. Cameron 		return FAILED;
601675167d2cSStephen M. Cameron 	}
60174b761557SRobert Elliott 	dev_info(&h->pdev->dev, "%s SENT, SUCCESS\n", msg);
6018d604f533SWebb Scales 	wait_event(h->event_sync_wait_queue,
6019a58e7e53SWebb Scales 		   abort->scsi_cmd != sc || lockup_detected(h));
6020281a7fd0SWebb Scales 	cmd_free(h, abort);
6021a58e7e53SWebb Scales 	return !lockup_detected(h) ? SUCCESS : FAILED;
602275167d2cSStephen M. Cameron }
602375167d2cSStephen M. Cameron 
6024edd16368SStephen M. Cameron /*
602573153fe5SWebb Scales  * For operations with an associated SCSI command, a command block is allocated
602673153fe5SWebb Scales  * at init, and managed by cmd_tagged_alloc() and cmd_tagged_free() using the
602773153fe5SWebb Scales  * block request tag as an index into a table of entries.  cmd_tagged_free() is
602873153fe5SWebb Scales  * the complement, although cmd_free() may be called instead.
602973153fe5SWebb Scales  */
603073153fe5SWebb Scales static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h,
603173153fe5SWebb Scales 					    struct scsi_cmnd *scmd)
603273153fe5SWebb Scales {
603373153fe5SWebb Scales 	int idx = hpsa_get_cmd_index(scmd);
603473153fe5SWebb Scales 	struct CommandList *c = h->cmd_pool + idx;
603573153fe5SWebb Scales 
603673153fe5SWebb Scales 	if (idx < HPSA_NRESERVED_CMDS || idx >= h->nr_cmds) {
603773153fe5SWebb Scales 		dev_err(&h->pdev->dev, "Bad block tag: %d not in [%d..%d]\n",
603873153fe5SWebb Scales 			idx, HPSA_NRESERVED_CMDS, h->nr_cmds - 1);
603973153fe5SWebb Scales 		/* The index value comes from the block layer, so if it's out of
604073153fe5SWebb Scales 		 * bounds, it's probably not our bug.
604173153fe5SWebb Scales 		 */
604273153fe5SWebb Scales 		BUG();
604373153fe5SWebb Scales 	}
604473153fe5SWebb Scales 
604573153fe5SWebb Scales 	atomic_inc(&c->refcount);
604673153fe5SWebb Scales 	if (unlikely(!hpsa_is_cmd_idle(c))) {
604773153fe5SWebb Scales 		/*
604873153fe5SWebb Scales 		 * We expect that the SCSI layer will hand us a unique tag
604973153fe5SWebb Scales 		 * value.  Thus, there should never be a collision here between
605073153fe5SWebb Scales 		 * two requests...because if the selected command isn't idle
605173153fe5SWebb Scales 		 * then someone is going to be very disappointed.
605273153fe5SWebb Scales 		 */
605373153fe5SWebb Scales 		dev_err(&h->pdev->dev,
605473153fe5SWebb Scales 			"tag collision (tag=%d) in cmd_tagged_alloc().\n",
605573153fe5SWebb Scales 			idx);
605673153fe5SWebb Scales 		if (c->scsi_cmd != NULL)
605773153fe5SWebb Scales 			scsi_print_command(c->scsi_cmd);
605873153fe5SWebb Scales 		scsi_print_command(scmd);
605973153fe5SWebb Scales 	}
606073153fe5SWebb Scales 
606173153fe5SWebb Scales 	hpsa_cmd_partial_init(h, idx, c);
606273153fe5SWebb Scales 	return c;
606373153fe5SWebb Scales }
606473153fe5SWebb Scales 
606573153fe5SWebb Scales static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c)
606673153fe5SWebb Scales {
606773153fe5SWebb Scales 	/*
606873153fe5SWebb Scales 	 * Release our reference to the block.  We don't need to do anything
606973153fe5SWebb Scales 	 * else to free it, because it is accessed by index.  (There's no point
607073153fe5SWebb Scales 	 * in checking the result of the decrement, since we cannot guarantee
607173153fe5SWebb Scales 	 * that there isn't a concurrent abort which is also accessing it.)
607273153fe5SWebb Scales 	 */
607373153fe5SWebb Scales 	(void)atomic_dec(&c->refcount);
607473153fe5SWebb Scales }
607573153fe5SWebb Scales 
607673153fe5SWebb Scales /*
6077edd16368SStephen M. Cameron  * For operations that cannot sleep, a command block is allocated at init,
6078edd16368SStephen M. Cameron  * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
6079edd16368SStephen M. Cameron  * which ones are free or in use.  Lock must be held when calling this.
6080edd16368SStephen M. Cameron  * cmd_free() is the complement.
6081bf43caf3SRobert Elliott  * This function never gives up and returns NULL.  If it hangs,
6082bf43caf3SRobert Elliott  * another thread must call cmd_free() to free some tags.
6083edd16368SStephen M. Cameron  */
6084281a7fd0SWebb Scales 
6085edd16368SStephen M. Cameron static struct CommandList *cmd_alloc(struct ctlr_info *h)
6086edd16368SStephen M. Cameron {
6087edd16368SStephen M. Cameron 	struct CommandList *c;
6088360c73bdSStephen Cameron 	int refcount, i;
608973153fe5SWebb Scales 	int offset = 0;
6090edd16368SStephen M. Cameron 
609133811026SRobert Elliott 	/*
609233811026SRobert Elliott 	 * There is some *extremely* small but non-zero chance that that
60934c413128SStephen M. Cameron 	 * multiple threads could get in here, and one thread could
60944c413128SStephen M. Cameron 	 * be scanning through the list of bits looking for a free
60954c413128SStephen M. Cameron 	 * one, but the free ones are always behind him, and other
60964c413128SStephen M. Cameron 	 * threads sneak in behind him and eat them before he can
60974c413128SStephen M. Cameron 	 * get to them, so that while there is always a free one, a
60984c413128SStephen M. Cameron 	 * very unlucky thread might be starved anyway, never able to
60994c413128SStephen M. Cameron 	 * beat the other threads.  In reality, this happens so
61004c413128SStephen M. Cameron 	 * infrequently as to be indistinguishable from never.
610173153fe5SWebb Scales 	 *
610273153fe5SWebb Scales 	 * Note that we start allocating commands before the SCSI host structure
610373153fe5SWebb Scales 	 * is initialized.  Since the search starts at bit zero, this
610473153fe5SWebb Scales 	 * all works, since we have at least one command structure available;
610573153fe5SWebb Scales 	 * however, it means that the structures with the low indexes have to be
610673153fe5SWebb Scales 	 * reserved for driver-initiated requests, while requests from the block
610773153fe5SWebb Scales 	 * layer will use the higher indexes.
61084c413128SStephen M. Cameron 	 */
61094c413128SStephen M. Cameron 
6110281a7fd0SWebb Scales 	for (;;) {
611173153fe5SWebb Scales 		i = find_next_zero_bit(h->cmd_pool_bits,
611273153fe5SWebb Scales 					HPSA_NRESERVED_CMDS,
611373153fe5SWebb Scales 					offset);
611473153fe5SWebb Scales 		if (unlikely(i >= HPSA_NRESERVED_CMDS)) {
6115281a7fd0SWebb Scales 			offset = 0;
6116281a7fd0SWebb Scales 			continue;
6117281a7fd0SWebb Scales 		}
6118edd16368SStephen M. Cameron 		c = h->cmd_pool + i;
6119281a7fd0SWebb Scales 		refcount = atomic_inc_return(&c->refcount);
6120281a7fd0SWebb Scales 		if (unlikely(refcount > 1)) {
6121281a7fd0SWebb Scales 			cmd_free(h, c); /* already in use */
612273153fe5SWebb Scales 			offset = (i + 1) % HPSA_NRESERVED_CMDS;
6123281a7fd0SWebb Scales 			continue;
6124281a7fd0SWebb Scales 		}
6125281a7fd0SWebb Scales 		set_bit(i & (BITS_PER_LONG - 1),
6126281a7fd0SWebb Scales 			h->cmd_pool_bits + (i / BITS_PER_LONG));
6127281a7fd0SWebb Scales 		break; /* it's ours now. */
6128281a7fd0SWebb Scales 	}
6129360c73bdSStephen Cameron 	hpsa_cmd_partial_init(h, i, c);
6130edd16368SStephen M. Cameron 	return c;
6131edd16368SStephen M. Cameron }
6132edd16368SStephen M. Cameron 
613373153fe5SWebb Scales /*
613473153fe5SWebb Scales  * This is the complementary operation to cmd_alloc().  Note, however, in some
613573153fe5SWebb Scales  * corner cases it may also be used to free blocks allocated by
613673153fe5SWebb Scales  * cmd_tagged_alloc() in which case the ref-count decrement does the trick and
613773153fe5SWebb Scales  * the clear-bit is harmless.
613873153fe5SWebb Scales  */
6139edd16368SStephen M. Cameron static void cmd_free(struct ctlr_info *h, struct CommandList *c)
6140edd16368SStephen M. Cameron {
6141281a7fd0SWebb Scales 	if (atomic_dec_and_test(&c->refcount)) {
6142edd16368SStephen M. Cameron 		int i;
6143edd16368SStephen M. Cameron 
6144edd16368SStephen M. Cameron 		i = c - h->cmd_pool;
6145edd16368SStephen M. Cameron 		clear_bit(i & (BITS_PER_LONG - 1),
6146edd16368SStephen M. Cameron 			  h->cmd_pool_bits + (i / BITS_PER_LONG));
6147edd16368SStephen M. Cameron 	}
6148281a7fd0SWebb Scales }
6149edd16368SStephen M. Cameron 
6150edd16368SStephen M. Cameron #ifdef CONFIG_COMPAT
6151edd16368SStephen M. Cameron 
615242a91641SDon Brace static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd,
615342a91641SDon Brace 	void __user *arg)
6154edd16368SStephen M. Cameron {
6155edd16368SStephen M. Cameron 	IOCTL32_Command_struct __user *arg32 =
6156edd16368SStephen M. Cameron 	    (IOCTL32_Command_struct __user *) arg;
6157edd16368SStephen M. Cameron 	IOCTL_Command_struct arg64;
6158edd16368SStephen M. Cameron 	IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
6159edd16368SStephen M. Cameron 	int err;
6160edd16368SStephen M. Cameron 	u32 cp;
6161edd16368SStephen M. Cameron 
6162938abd84SVasiliy Kulikov 	memset(&arg64, 0, sizeof(arg64));
6163edd16368SStephen M. Cameron 	err = 0;
6164edd16368SStephen M. Cameron 	err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
6165edd16368SStephen M. Cameron 			   sizeof(arg64.LUN_info));
6166edd16368SStephen M. Cameron 	err |= copy_from_user(&arg64.Request, &arg32->Request,
6167edd16368SStephen M. Cameron 			   sizeof(arg64.Request));
6168edd16368SStephen M. Cameron 	err |= copy_from_user(&arg64.error_info, &arg32->error_info,
6169edd16368SStephen M. Cameron 			   sizeof(arg64.error_info));
6170edd16368SStephen M. Cameron 	err |= get_user(arg64.buf_size, &arg32->buf_size);
6171edd16368SStephen M. Cameron 	err |= get_user(cp, &arg32->buf);
6172edd16368SStephen M. Cameron 	arg64.buf = compat_ptr(cp);
6173edd16368SStephen M. Cameron 	err |= copy_to_user(p, &arg64, sizeof(arg64));
6174edd16368SStephen M. Cameron 
6175edd16368SStephen M. Cameron 	if (err)
6176edd16368SStephen M. Cameron 		return -EFAULT;
6177edd16368SStephen M. Cameron 
617842a91641SDon Brace 	err = hpsa_ioctl(dev, CCISS_PASSTHRU, p);
6179edd16368SStephen M. Cameron 	if (err)
6180edd16368SStephen M. Cameron 		return err;
6181edd16368SStephen M. Cameron 	err |= copy_in_user(&arg32->error_info, &p->error_info,
6182edd16368SStephen M. Cameron 			 sizeof(arg32->error_info));
6183edd16368SStephen M. Cameron 	if (err)
6184edd16368SStephen M. Cameron 		return -EFAULT;
6185edd16368SStephen M. Cameron 	return err;
6186edd16368SStephen M. Cameron }
6187edd16368SStephen M. Cameron 
6188edd16368SStephen M. Cameron static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
618942a91641SDon Brace 	int cmd, void __user *arg)
6190edd16368SStephen M. Cameron {
6191edd16368SStephen M. Cameron 	BIG_IOCTL32_Command_struct __user *arg32 =
6192edd16368SStephen M. Cameron 	    (BIG_IOCTL32_Command_struct __user *) arg;
6193edd16368SStephen M. Cameron 	BIG_IOCTL_Command_struct arg64;
6194edd16368SStephen M. Cameron 	BIG_IOCTL_Command_struct __user *p =
6195edd16368SStephen M. Cameron 	    compat_alloc_user_space(sizeof(arg64));
6196edd16368SStephen M. Cameron 	int err;
6197edd16368SStephen M. Cameron 	u32 cp;
6198edd16368SStephen M. Cameron 
6199938abd84SVasiliy Kulikov 	memset(&arg64, 0, sizeof(arg64));
6200edd16368SStephen M. Cameron 	err = 0;
6201edd16368SStephen M. Cameron 	err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
6202edd16368SStephen M. Cameron 			   sizeof(arg64.LUN_info));
6203edd16368SStephen M. Cameron 	err |= copy_from_user(&arg64.Request, &arg32->Request,
6204edd16368SStephen M. Cameron 			   sizeof(arg64.Request));
6205edd16368SStephen M. Cameron 	err |= copy_from_user(&arg64.error_info, &arg32->error_info,
6206edd16368SStephen M. Cameron 			   sizeof(arg64.error_info));
6207edd16368SStephen M. Cameron 	err |= get_user(arg64.buf_size, &arg32->buf_size);
6208edd16368SStephen M. Cameron 	err |= get_user(arg64.malloc_size, &arg32->malloc_size);
6209edd16368SStephen M. Cameron 	err |= get_user(cp, &arg32->buf);
6210edd16368SStephen M. Cameron 	arg64.buf = compat_ptr(cp);
6211edd16368SStephen M. Cameron 	err |= copy_to_user(p, &arg64, sizeof(arg64));
6212edd16368SStephen M. Cameron 
6213edd16368SStephen M. Cameron 	if (err)
6214edd16368SStephen M. Cameron 		return -EFAULT;
6215edd16368SStephen M. Cameron 
621642a91641SDon Brace 	err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, p);
6217edd16368SStephen M. Cameron 	if (err)
6218edd16368SStephen M. Cameron 		return err;
6219edd16368SStephen M. Cameron 	err |= copy_in_user(&arg32->error_info, &p->error_info,
6220edd16368SStephen M. Cameron 			 sizeof(arg32->error_info));
6221edd16368SStephen M. Cameron 	if (err)
6222edd16368SStephen M. Cameron 		return -EFAULT;
6223edd16368SStephen M. Cameron 	return err;
6224edd16368SStephen M. Cameron }
622571fe75a7SStephen M. Cameron 
622642a91641SDon Brace static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void __user *arg)
622771fe75a7SStephen M. Cameron {
622871fe75a7SStephen M. Cameron 	switch (cmd) {
622971fe75a7SStephen M. Cameron 	case CCISS_GETPCIINFO:
623071fe75a7SStephen M. Cameron 	case CCISS_GETINTINFO:
623171fe75a7SStephen M. Cameron 	case CCISS_SETINTINFO:
623271fe75a7SStephen M. Cameron 	case CCISS_GETNODENAME:
623371fe75a7SStephen M. Cameron 	case CCISS_SETNODENAME:
623471fe75a7SStephen M. Cameron 	case CCISS_GETHEARTBEAT:
623571fe75a7SStephen M. Cameron 	case CCISS_GETBUSTYPES:
623671fe75a7SStephen M. Cameron 	case CCISS_GETFIRMVER:
623771fe75a7SStephen M. Cameron 	case CCISS_GETDRIVVER:
623871fe75a7SStephen M. Cameron 	case CCISS_REVALIDVOLS:
623971fe75a7SStephen M. Cameron 	case CCISS_DEREGDISK:
624071fe75a7SStephen M. Cameron 	case CCISS_REGNEWDISK:
624171fe75a7SStephen M. Cameron 	case CCISS_REGNEWD:
624271fe75a7SStephen M. Cameron 	case CCISS_RESCANDISK:
624371fe75a7SStephen M. Cameron 	case CCISS_GETLUNINFO:
624471fe75a7SStephen M. Cameron 		return hpsa_ioctl(dev, cmd, arg);
624571fe75a7SStephen M. Cameron 
624671fe75a7SStephen M. Cameron 	case CCISS_PASSTHRU32:
624771fe75a7SStephen M. Cameron 		return hpsa_ioctl32_passthru(dev, cmd, arg);
624871fe75a7SStephen M. Cameron 	case CCISS_BIG_PASSTHRU32:
624971fe75a7SStephen M. Cameron 		return hpsa_ioctl32_big_passthru(dev, cmd, arg);
625071fe75a7SStephen M. Cameron 
625171fe75a7SStephen M. Cameron 	default:
625271fe75a7SStephen M. Cameron 		return -ENOIOCTLCMD;
625371fe75a7SStephen M. Cameron 	}
625471fe75a7SStephen M. Cameron }
6255edd16368SStephen M. Cameron #endif
6256edd16368SStephen M. Cameron 
6257edd16368SStephen M. Cameron static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
6258edd16368SStephen M. Cameron {
6259edd16368SStephen M. Cameron 	struct hpsa_pci_info pciinfo;
6260edd16368SStephen M. Cameron 
6261edd16368SStephen M. Cameron 	if (!argp)
6262edd16368SStephen M. Cameron 		return -EINVAL;
6263edd16368SStephen M. Cameron 	pciinfo.domain = pci_domain_nr(h->pdev->bus);
6264edd16368SStephen M. Cameron 	pciinfo.bus = h->pdev->bus->number;
6265edd16368SStephen M. Cameron 	pciinfo.dev_fn = h->pdev->devfn;
6266edd16368SStephen M. Cameron 	pciinfo.board_id = h->board_id;
6267edd16368SStephen M. Cameron 	if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
6268edd16368SStephen M. Cameron 		return -EFAULT;
6269edd16368SStephen M. Cameron 	return 0;
6270edd16368SStephen M. Cameron }
6271edd16368SStephen M. Cameron 
6272edd16368SStephen M. Cameron static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
6273edd16368SStephen M. Cameron {
6274edd16368SStephen M. Cameron 	DriverVer_type DriverVer;
6275edd16368SStephen M. Cameron 	unsigned char vmaj, vmin, vsubmin;
6276edd16368SStephen M. Cameron 	int rc;
6277edd16368SStephen M. Cameron 
6278edd16368SStephen M. Cameron 	rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
6279edd16368SStephen M. Cameron 		&vmaj, &vmin, &vsubmin);
6280edd16368SStephen M. Cameron 	if (rc != 3) {
6281edd16368SStephen M. Cameron 		dev_info(&h->pdev->dev, "driver version string '%s' "
6282edd16368SStephen M. Cameron 			"unrecognized.", HPSA_DRIVER_VERSION);
6283edd16368SStephen M. Cameron 		vmaj = 0;
6284edd16368SStephen M. Cameron 		vmin = 0;
6285edd16368SStephen M. Cameron 		vsubmin = 0;
6286edd16368SStephen M. Cameron 	}
6287edd16368SStephen M. Cameron 	DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
6288edd16368SStephen M. Cameron 	if (!argp)
6289edd16368SStephen M. Cameron 		return -EINVAL;
6290edd16368SStephen M. Cameron 	if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
6291edd16368SStephen M. Cameron 		return -EFAULT;
6292edd16368SStephen M. Cameron 	return 0;
6293edd16368SStephen M. Cameron }
6294edd16368SStephen M. Cameron 
6295edd16368SStephen M. Cameron static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
6296edd16368SStephen M. Cameron {
6297edd16368SStephen M. Cameron 	IOCTL_Command_struct iocommand;
6298edd16368SStephen M. Cameron 	struct CommandList *c;
6299edd16368SStephen M. Cameron 	char *buff = NULL;
630050a0decfSStephen M. Cameron 	u64 temp64;
6301c1f63c8fSStephen M. Cameron 	int rc = 0;
6302edd16368SStephen M. Cameron 
6303edd16368SStephen M. Cameron 	if (!argp)
6304edd16368SStephen M. Cameron 		return -EINVAL;
6305edd16368SStephen M. Cameron 	if (!capable(CAP_SYS_RAWIO))
6306edd16368SStephen M. Cameron 		return -EPERM;
6307edd16368SStephen M. Cameron 	if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
6308edd16368SStephen M. Cameron 		return -EFAULT;
6309edd16368SStephen M. Cameron 	if ((iocommand.buf_size < 1) &&
6310edd16368SStephen M. Cameron 	    (iocommand.Request.Type.Direction != XFER_NONE)) {
6311edd16368SStephen M. Cameron 		return -EINVAL;
6312edd16368SStephen M. Cameron 	}
6313edd16368SStephen M. Cameron 	if (iocommand.buf_size > 0) {
6314edd16368SStephen M. Cameron 		buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
6315edd16368SStephen M. Cameron 		if (buff == NULL)
63162dd02d74SRobert Elliott 			return -ENOMEM;
63179233fb10SStephen M. Cameron 		if (iocommand.Request.Type.Direction & XFER_WRITE) {
6318edd16368SStephen M. Cameron 			/* Copy the data into the buffer we created */
6319b03a7771SStephen M. Cameron 			if (copy_from_user(buff, iocommand.buf,
6320b03a7771SStephen M. Cameron 				iocommand.buf_size)) {
6321c1f63c8fSStephen M. Cameron 				rc = -EFAULT;
6322c1f63c8fSStephen M. Cameron 				goto out_kfree;
6323edd16368SStephen M. Cameron 			}
6324b03a7771SStephen M. Cameron 		} else {
6325edd16368SStephen M. Cameron 			memset(buff, 0, iocommand.buf_size);
6326b03a7771SStephen M. Cameron 		}
6327b03a7771SStephen M. Cameron 	}
632845fcb86eSStephen Cameron 	c = cmd_alloc(h);
6329bf43caf3SRobert Elliott 
6330edd16368SStephen M. Cameron 	/* Fill in the command type */
6331edd16368SStephen M. Cameron 	c->cmd_type = CMD_IOCTL_PEND;
6332a58e7e53SWebb Scales 	c->scsi_cmd = SCSI_CMD_BUSY;
6333edd16368SStephen M. Cameron 	/* Fill in Command Header */
6334edd16368SStephen M. Cameron 	c->Header.ReplyQueue = 0; /* unused in simple mode */
6335edd16368SStephen M. Cameron 	if (iocommand.buf_size > 0) {	/* buffer to fill */
6336edd16368SStephen M. Cameron 		c->Header.SGList = 1;
633750a0decfSStephen M. Cameron 		c->Header.SGTotal = cpu_to_le16(1);
6338edd16368SStephen M. Cameron 	} else	{ /* no buffers to fill */
6339edd16368SStephen M. Cameron 		c->Header.SGList = 0;
634050a0decfSStephen M. Cameron 		c->Header.SGTotal = cpu_to_le16(0);
6341edd16368SStephen M. Cameron 	}
6342edd16368SStephen M. Cameron 	memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
6343edd16368SStephen M. Cameron 
6344edd16368SStephen M. Cameron 	/* Fill in Request block */
6345edd16368SStephen M. Cameron 	memcpy(&c->Request, &iocommand.Request,
6346edd16368SStephen M. Cameron 		sizeof(c->Request));
6347edd16368SStephen M. Cameron 
6348edd16368SStephen M. Cameron 	/* Fill in the scatter gather information */
6349edd16368SStephen M. Cameron 	if (iocommand.buf_size > 0) {
635050a0decfSStephen M. Cameron 		temp64 = pci_map_single(h->pdev, buff,
6351edd16368SStephen M. Cameron 			iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
635250a0decfSStephen M. Cameron 		if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) {
635350a0decfSStephen M. Cameron 			c->SG[0].Addr = cpu_to_le64(0);
635450a0decfSStephen M. Cameron 			c->SG[0].Len = cpu_to_le32(0);
6355bcc48ffaSStephen M. Cameron 			rc = -ENOMEM;
6356bcc48ffaSStephen M. Cameron 			goto out;
6357bcc48ffaSStephen M. Cameron 		}
635850a0decfSStephen M. Cameron 		c->SG[0].Addr = cpu_to_le64(temp64);
635950a0decfSStephen M. Cameron 		c->SG[0].Len = cpu_to_le32(iocommand.buf_size);
636050a0decfSStephen M. Cameron 		c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */
6361edd16368SStephen M. Cameron 	}
636225163bd5SWebb Scales 	rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT);
6363c2dd32e0SStephen M. Cameron 	if (iocommand.buf_size > 0)
6364edd16368SStephen M. Cameron 		hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
6365edd16368SStephen M. Cameron 	check_ioctl_unit_attention(h, c);
636625163bd5SWebb Scales 	if (rc) {
636725163bd5SWebb Scales 		rc = -EIO;
636825163bd5SWebb Scales 		goto out;
636925163bd5SWebb Scales 	}
6370edd16368SStephen M. Cameron 
6371edd16368SStephen M. Cameron 	/* Copy the error information out */
6372edd16368SStephen M. Cameron 	memcpy(&iocommand.error_info, c->err_info,
6373edd16368SStephen M. Cameron 		sizeof(iocommand.error_info));
6374edd16368SStephen M. Cameron 	if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
6375c1f63c8fSStephen M. Cameron 		rc = -EFAULT;
6376c1f63c8fSStephen M. Cameron 		goto out;
6377edd16368SStephen M. Cameron 	}
63789233fb10SStephen M. Cameron 	if ((iocommand.Request.Type.Direction & XFER_READ) &&
6379b03a7771SStephen M. Cameron 		iocommand.buf_size > 0) {
6380edd16368SStephen M. Cameron 		/* Copy the data out of the buffer we created */
6381edd16368SStephen M. Cameron 		if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
6382c1f63c8fSStephen M. Cameron 			rc = -EFAULT;
6383c1f63c8fSStephen M. Cameron 			goto out;
6384edd16368SStephen M. Cameron 		}
6385edd16368SStephen M. Cameron 	}
6386c1f63c8fSStephen M. Cameron out:
638745fcb86eSStephen Cameron 	cmd_free(h, c);
6388c1f63c8fSStephen M. Cameron out_kfree:
6389c1f63c8fSStephen M. Cameron 	kfree(buff);
6390c1f63c8fSStephen M. Cameron 	return rc;
6391edd16368SStephen M. Cameron }
6392edd16368SStephen M. Cameron 
6393edd16368SStephen M. Cameron static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
6394edd16368SStephen M. Cameron {
6395edd16368SStephen M. Cameron 	BIG_IOCTL_Command_struct *ioc;
6396edd16368SStephen M. Cameron 	struct CommandList *c;
6397edd16368SStephen M. Cameron 	unsigned char **buff = NULL;
6398edd16368SStephen M. Cameron 	int *buff_size = NULL;
639950a0decfSStephen M. Cameron 	u64 temp64;
6400edd16368SStephen M. Cameron 	BYTE sg_used = 0;
6401edd16368SStephen M. Cameron 	int status = 0;
640201a02ffcSStephen M. Cameron 	u32 left;
640301a02ffcSStephen M. Cameron 	u32 sz;
6404edd16368SStephen M. Cameron 	BYTE __user *data_ptr;
6405edd16368SStephen M. Cameron 
6406edd16368SStephen M. Cameron 	if (!argp)
6407edd16368SStephen M. Cameron 		return -EINVAL;
6408edd16368SStephen M. Cameron 	if (!capable(CAP_SYS_RAWIO))
6409edd16368SStephen M. Cameron 		return -EPERM;
6410edd16368SStephen M. Cameron 	ioc = (BIG_IOCTL_Command_struct *)
6411edd16368SStephen M. Cameron 	    kmalloc(sizeof(*ioc), GFP_KERNEL);
6412edd16368SStephen M. Cameron 	if (!ioc) {
6413edd16368SStephen M. Cameron 		status = -ENOMEM;
6414edd16368SStephen M. Cameron 		goto cleanup1;
6415edd16368SStephen M. Cameron 	}
6416edd16368SStephen M. Cameron 	if (copy_from_user(ioc, argp, sizeof(*ioc))) {
6417edd16368SStephen M. Cameron 		status = -EFAULT;
6418edd16368SStephen M. Cameron 		goto cleanup1;
6419edd16368SStephen M. Cameron 	}
6420edd16368SStephen M. Cameron 	if ((ioc->buf_size < 1) &&
6421edd16368SStephen M. Cameron 	    (ioc->Request.Type.Direction != XFER_NONE)) {
6422edd16368SStephen M. Cameron 		status = -EINVAL;
6423edd16368SStephen M. Cameron 		goto cleanup1;
6424edd16368SStephen M. Cameron 	}
6425edd16368SStephen M. Cameron 	/* Check kmalloc limits  using all SGs */
6426edd16368SStephen M. Cameron 	if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
6427edd16368SStephen M. Cameron 		status = -EINVAL;
6428edd16368SStephen M. Cameron 		goto cleanup1;
6429edd16368SStephen M. Cameron 	}
6430d66ae08bSStephen M. Cameron 	if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) {
6431edd16368SStephen M. Cameron 		status = -EINVAL;
6432edd16368SStephen M. Cameron 		goto cleanup1;
6433edd16368SStephen M. Cameron 	}
6434d66ae08bSStephen M. Cameron 	buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL);
6435edd16368SStephen M. Cameron 	if (!buff) {
6436edd16368SStephen M. Cameron 		status = -ENOMEM;
6437edd16368SStephen M. Cameron 		goto cleanup1;
6438edd16368SStephen M. Cameron 	}
6439d66ae08bSStephen M. Cameron 	buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL);
6440edd16368SStephen M. Cameron 	if (!buff_size) {
6441edd16368SStephen M. Cameron 		status = -ENOMEM;
6442edd16368SStephen M. Cameron 		goto cleanup1;
6443edd16368SStephen M. Cameron 	}
6444edd16368SStephen M. Cameron 	left = ioc->buf_size;
6445edd16368SStephen M. Cameron 	data_ptr = ioc->buf;
6446edd16368SStephen M. Cameron 	while (left) {
6447edd16368SStephen M. Cameron 		sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
6448edd16368SStephen M. Cameron 		buff_size[sg_used] = sz;
6449edd16368SStephen M. Cameron 		buff[sg_used] = kmalloc(sz, GFP_KERNEL);
6450edd16368SStephen M. Cameron 		if (buff[sg_used] == NULL) {
6451edd16368SStephen M. Cameron 			status = -ENOMEM;
6452edd16368SStephen M. Cameron 			goto cleanup1;
6453edd16368SStephen M. Cameron 		}
64549233fb10SStephen M. Cameron 		if (ioc->Request.Type.Direction & XFER_WRITE) {
6455edd16368SStephen M. Cameron 			if (copy_from_user(buff[sg_used], data_ptr, sz)) {
64560758f4f7SStephen M. Cameron 				status = -EFAULT;
6457edd16368SStephen M. Cameron 				goto cleanup1;
6458edd16368SStephen M. Cameron 			}
6459edd16368SStephen M. Cameron 		} else
6460edd16368SStephen M. Cameron 			memset(buff[sg_used], 0, sz);
6461edd16368SStephen M. Cameron 		left -= sz;
6462edd16368SStephen M. Cameron 		data_ptr += sz;
6463edd16368SStephen M. Cameron 		sg_used++;
6464edd16368SStephen M. Cameron 	}
646545fcb86eSStephen Cameron 	c = cmd_alloc(h);
6466bf43caf3SRobert Elliott 
6467edd16368SStephen M. Cameron 	c->cmd_type = CMD_IOCTL_PEND;
6468a58e7e53SWebb Scales 	c->scsi_cmd = SCSI_CMD_BUSY;
6469edd16368SStephen M. Cameron 	c->Header.ReplyQueue = 0;
647050a0decfSStephen M. Cameron 	c->Header.SGList = (u8) sg_used;
647150a0decfSStephen M. Cameron 	c->Header.SGTotal = cpu_to_le16(sg_used);
6472edd16368SStephen M. Cameron 	memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
6473edd16368SStephen M. Cameron 	memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
6474edd16368SStephen M. Cameron 	if (ioc->buf_size > 0) {
6475edd16368SStephen M. Cameron 		int i;
6476edd16368SStephen M. Cameron 		for (i = 0; i < sg_used; i++) {
647750a0decfSStephen M. Cameron 			temp64 = pci_map_single(h->pdev, buff[i],
6478edd16368SStephen M. Cameron 				    buff_size[i], PCI_DMA_BIDIRECTIONAL);
647950a0decfSStephen M. Cameron 			if (dma_mapping_error(&h->pdev->dev,
648050a0decfSStephen M. Cameron 							(dma_addr_t) temp64)) {
648150a0decfSStephen M. Cameron 				c->SG[i].Addr = cpu_to_le64(0);
648250a0decfSStephen M. Cameron 				c->SG[i].Len = cpu_to_le32(0);
6483bcc48ffaSStephen M. Cameron 				hpsa_pci_unmap(h->pdev, c, i,
6484bcc48ffaSStephen M. Cameron 					PCI_DMA_BIDIRECTIONAL);
6485bcc48ffaSStephen M. Cameron 				status = -ENOMEM;
6486e2d4a1f6SStephen M. Cameron 				goto cleanup0;
6487bcc48ffaSStephen M. Cameron 			}
648850a0decfSStephen M. Cameron 			c->SG[i].Addr = cpu_to_le64(temp64);
648950a0decfSStephen M. Cameron 			c->SG[i].Len = cpu_to_le32(buff_size[i]);
649050a0decfSStephen M. Cameron 			c->SG[i].Ext = cpu_to_le32(0);
6491edd16368SStephen M. Cameron 		}
649250a0decfSStephen M. Cameron 		c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST);
6493edd16368SStephen M. Cameron 	}
649425163bd5SWebb Scales 	status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT);
6495b03a7771SStephen M. Cameron 	if (sg_used)
6496edd16368SStephen M. Cameron 		hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
6497edd16368SStephen M. Cameron 	check_ioctl_unit_attention(h, c);
649825163bd5SWebb Scales 	if (status) {
649925163bd5SWebb Scales 		status = -EIO;
650025163bd5SWebb Scales 		goto cleanup0;
650125163bd5SWebb Scales 	}
650225163bd5SWebb Scales 
6503edd16368SStephen M. Cameron 	/* Copy the error information out */
6504edd16368SStephen M. Cameron 	memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
6505edd16368SStephen M. Cameron 	if (copy_to_user(argp, ioc, sizeof(*ioc))) {
6506edd16368SStephen M. Cameron 		status = -EFAULT;
6507e2d4a1f6SStephen M. Cameron 		goto cleanup0;
6508edd16368SStephen M. Cameron 	}
65099233fb10SStephen M. Cameron 	if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) {
65102b08b3e9SDon Brace 		int i;
65112b08b3e9SDon Brace 
6512edd16368SStephen M. Cameron 		/* Copy the data out of the buffer we created */
6513edd16368SStephen M. Cameron 		BYTE __user *ptr = ioc->buf;
6514edd16368SStephen M. Cameron 		for (i = 0; i < sg_used; i++) {
6515edd16368SStephen M. Cameron 			if (copy_to_user(ptr, buff[i], buff_size[i])) {
6516edd16368SStephen M. Cameron 				status = -EFAULT;
6517e2d4a1f6SStephen M. Cameron 				goto cleanup0;
6518edd16368SStephen M. Cameron 			}
6519edd16368SStephen M. Cameron 			ptr += buff_size[i];
6520edd16368SStephen M. Cameron 		}
6521edd16368SStephen M. Cameron 	}
6522edd16368SStephen M. Cameron 	status = 0;
6523e2d4a1f6SStephen M. Cameron cleanup0:
652445fcb86eSStephen Cameron 	cmd_free(h, c);
6525edd16368SStephen M. Cameron cleanup1:
6526edd16368SStephen M. Cameron 	if (buff) {
65272b08b3e9SDon Brace 		int i;
65282b08b3e9SDon Brace 
6529edd16368SStephen M. Cameron 		for (i = 0; i < sg_used; i++)
6530edd16368SStephen M. Cameron 			kfree(buff[i]);
6531edd16368SStephen M. Cameron 		kfree(buff);
6532edd16368SStephen M. Cameron 	}
6533edd16368SStephen M. Cameron 	kfree(buff_size);
6534edd16368SStephen M. Cameron 	kfree(ioc);
6535edd16368SStephen M. Cameron 	return status;
6536edd16368SStephen M. Cameron }
6537edd16368SStephen M. Cameron 
6538edd16368SStephen M. Cameron static void check_ioctl_unit_attention(struct ctlr_info *h,
6539edd16368SStephen M. Cameron 	struct CommandList *c)
6540edd16368SStephen M. Cameron {
6541edd16368SStephen M. Cameron 	if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
6542edd16368SStephen M. Cameron 			c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
6543edd16368SStephen M. Cameron 		(void) check_for_unit_attention(h, c);
6544edd16368SStephen M. Cameron }
65450390f0c0SStephen M. Cameron 
6546edd16368SStephen M. Cameron /*
6547edd16368SStephen M. Cameron  * ioctl
6548edd16368SStephen M. Cameron  */
654942a91641SDon Brace static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg)
6550edd16368SStephen M. Cameron {
6551edd16368SStephen M. Cameron 	struct ctlr_info *h;
6552edd16368SStephen M. Cameron 	void __user *argp = (void __user *)arg;
65530390f0c0SStephen M. Cameron 	int rc;
6554edd16368SStephen M. Cameron 
6555edd16368SStephen M. Cameron 	h = sdev_to_hba(dev);
6556edd16368SStephen M. Cameron 
6557edd16368SStephen M. Cameron 	switch (cmd) {
6558edd16368SStephen M. Cameron 	case CCISS_DEREGDISK:
6559edd16368SStephen M. Cameron 	case CCISS_REGNEWDISK:
6560edd16368SStephen M. Cameron 	case CCISS_REGNEWD:
6561a08a8471SStephen M. Cameron 		hpsa_scan_start(h->scsi_host);
6562edd16368SStephen M. Cameron 		return 0;
6563edd16368SStephen M. Cameron 	case CCISS_GETPCIINFO:
6564edd16368SStephen M. Cameron 		return hpsa_getpciinfo_ioctl(h, argp);
6565edd16368SStephen M. Cameron 	case CCISS_GETDRIVVER:
6566edd16368SStephen M. Cameron 		return hpsa_getdrivver_ioctl(h, argp);
6567edd16368SStephen M. Cameron 	case CCISS_PASSTHRU:
656834f0c627SDon Brace 		if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
65690390f0c0SStephen M. Cameron 			return -EAGAIN;
65700390f0c0SStephen M. Cameron 		rc = hpsa_passthru_ioctl(h, argp);
657134f0c627SDon Brace 		atomic_inc(&h->passthru_cmds_avail);
65720390f0c0SStephen M. Cameron 		return rc;
6573edd16368SStephen M. Cameron 	case CCISS_BIG_PASSTHRU:
657434f0c627SDon Brace 		if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
65750390f0c0SStephen M. Cameron 			return -EAGAIN;
65760390f0c0SStephen M. Cameron 		rc = hpsa_big_passthru_ioctl(h, argp);
657734f0c627SDon Brace 		atomic_inc(&h->passthru_cmds_avail);
65780390f0c0SStephen M. Cameron 		return rc;
6579edd16368SStephen M. Cameron 	default:
6580edd16368SStephen M. Cameron 		return -ENOTTY;
6581edd16368SStephen M. Cameron 	}
6582edd16368SStephen M. Cameron }
6583edd16368SStephen M. Cameron 
6584bf43caf3SRobert Elliott static void hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr,
65856f039790SGreg Kroah-Hartman 				u8 reset_type)
658664670ac8SStephen M. Cameron {
658764670ac8SStephen M. Cameron 	struct CommandList *c;
658864670ac8SStephen M. Cameron 
658964670ac8SStephen M. Cameron 	c = cmd_alloc(h);
6590bf43caf3SRobert Elliott 
6591a2dac136SStephen M. Cameron 	/* fill_cmd can't fail here, no data buffer to map */
6592a2dac136SStephen M. Cameron 	(void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
659364670ac8SStephen M. Cameron 		RAID_CTLR_LUNID, TYPE_MSG);
659464670ac8SStephen M. Cameron 	c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
659564670ac8SStephen M. Cameron 	c->waiting = NULL;
659664670ac8SStephen M. Cameron 	enqueue_cmd_and_start_io(h, c);
659764670ac8SStephen M. Cameron 	/* Don't wait for completion, the reset won't complete.  Don't free
659864670ac8SStephen M. Cameron 	 * the command either.  This is the last command we will send before
659964670ac8SStephen M. Cameron 	 * re-initializing everything, so it doesn't matter and won't leak.
660064670ac8SStephen M. Cameron 	 */
6601bf43caf3SRobert Elliott 	return;
660264670ac8SStephen M. Cameron }
660364670ac8SStephen M. Cameron 
6604a2dac136SStephen M. Cameron static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
6605b7bb24ebSStephen M. Cameron 	void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
6606edd16368SStephen M. Cameron 	int cmd_type)
6607edd16368SStephen M. Cameron {
6608edd16368SStephen M. Cameron 	int pci_dir = XFER_NONE;
66099b5c48c2SStephen Cameron 	u64 tag; /* for commands to be aborted */
6610edd16368SStephen M. Cameron 
6611edd16368SStephen M. Cameron 	c->cmd_type = CMD_IOCTL_PEND;
6612a58e7e53SWebb Scales 	c->scsi_cmd = SCSI_CMD_BUSY;
6613edd16368SStephen M. Cameron 	c->Header.ReplyQueue = 0;
6614edd16368SStephen M. Cameron 	if (buff != NULL && size > 0) {
6615edd16368SStephen M. Cameron 		c->Header.SGList = 1;
661650a0decfSStephen M. Cameron 		c->Header.SGTotal = cpu_to_le16(1);
6617edd16368SStephen M. Cameron 	} else {
6618edd16368SStephen M. Cameron 		c->Header.SGList = 0;
661950a0decfSStephen M. Cameron 		c->Header.SGTotal = cpu_to_le16(0);
6620edd16368SStephen M. Cameron 	}
6621edd16368SStephen M. Cameron 	memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
6622edd16368SStephen M. Cameron 
6623edd16368SStephen M. Cameron 	if (cmd_type == TYPE_CMD) {
6624edd16368SStephen M. Cameron 		switch (cmd) {
6625edd16368SStephen M. Cameron 		case HPSA_INQUIRY:
6626edd16368SStephen M. Cameron 			/* are we trying to read a vital product page */
6627b7bb24ebSStephen M. Cameron 			if (page_code & VPD_PAGE) {
6628edd16368SStephen M. Cameron 				c->Request.CDB[1] = 0x01;
6629b7bb24ebSStephen M. Cameron 				c->Request.CDB[2] = (page_code & 0xff);
6630edd16368SStephen M. Cameron 			}
6631edd16368SStephen M. Cameron 			c->Request.CDBLen = 6;
6632a505b86fSStephen M. Cameron 			c->Request.type_attr_dir =
6633a505b86fSStephen M. Cameron 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6634edd16368SStephen M. Cameron 			c->Request.Timeout = 0;
6635edd16368SStephen M. Cameron 			c->Request.CDB[0] = HPSA_INQUIRY;
6636edd16368SStephen M. Cameron 			c->Request.CDB[4] = size & 0xFF;
6637edd16368SStephen M. Cameron 			break;
6638edd16368SStephen M. Cameron 		case HPSA_REPORT_LOG:
6639edd16368SStephen M. Cameron 		case HPSA_REPORT_PHYS:
6640edd16368SStephen M. Cameron 			/* Talking to controller so It's a physical command
6641edd16368SStephen M. Cameron 			   mode = 00 target = 0.  Nothing to write.
6642edd16368SStephen M. Cameron 			 */
6643edd16368SStephen M. Cameron 			c->Request.CDBLen = 12;
6644a505b86fSStephen M. Cameron 			c->Request.type_attr_dir =
6645a505b86fSStephen M. Cameron 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6646edd16368SStephen M. Cameron 			c->Request.Timeout = 0;
6647edd16368SStephen M. Cameron 			c->Request.CDB[0] = cmd;
6648edd16368SStephen M. Cameron 			c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
6649edd16368SStephen M. Cameron 			c->Request.CDB[7] = (size >> 16) & 0xFF;
6650edd16368SStephen M. Cameron 			c->Request.CDB[8] = (size >> 8) & 0xFF;
6651edd16368SStephen M. Cameron 			c->Request.CDB[9] = size & 0xFF;
6652edd16368SStephen M. Cameron 			break;
6653c2adae44SScott Teel 		case BMIC_SENSE_DIAG_OPTIONS:
6654c2adae44SScott Teel 			c->Request.CDBLen = 16;
6655c2adae44SScott Teel 			c->Request.type_attr_dir =
6656c2adae44SScott Teel 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6657c2adae44SScott Teel 			c->Request.Timeout = 0;
6658c2adae44SScott Teel 			/* Spec says this should be BMIC_WRITE */
6659c2adae44SScott Teel 			c->Request.CDB[0] = BMIC_READ;
6660c2adae44SScott Teel 			c->Request.CDB[6] = BMIC_SENSE_DIAG_OPTIONS;
6661c2adae44SScott Teel 			break;
6662c2adae44SScott Teel 		case BMIC_SET_DIAG_OPTIONS:
6663c2adae44SScott Teel 			c->Request.CDBLen = 16;
6664c2adae44SScott Teel 			c->Request.type_attr_dir =
6665c2adae44SScott Teel 					TYPE_ATTR_DIR(cmd_type,
6666c2adae44SScott Teel 						ATTR_SIMPLE, XFER_WRITE);
6667c2adae44SScott Teel 			c->Request.Timeout = 0;
6668c2adae44SScott Teel 			c->Request.CDB[0] = BMIC_WRITE;
6669c2adae44SScott Teel 			c->Request.CDB[6] = BMIC_SET_DIAG_OPTIONS;
6670c2adae44SScott Teel 			break;
6671edd16368SStephen M. Cameron 		case HPSA_CACHE_FLUSH:
6672edd16368SStephen M. Cameron 			c->Request.CDBLen = 12;
6673a505b86fSStephen M. Cameron 			c->Request.type_attr_dir =
6674a505b86fSStephen M. Cameron 					TYPE_ATTR_DIR(cmd_type,
6675a505b86fSStephen M. Cameron 						ATTR_SIMPLE, XFER_WRITE);
6676edd16368SStephen M. Cameron 			c->Request.Timeout = 0;
6677edd16368SStephen M. Cameron 			c->Request.CDB[0] = BMIC_WRITE;
6678edd16368SStephen M. Cameron 			c->Request.CDB[6] = BMIC_CACHE_FLUSH;
6679bb158eabSStephen M. Cameron 			c->Request.CDB[7] = (size >> 8) & 0xFF;
6680bb158eabSStephen M. Cameron 			c->Request.CDB[8] = size & 0xFF;
6681edd16368SStephen M. Cameron 			break;
6682edd16368SStephen M. Cameron 		case TEST_UNIT_READY:
6683edd16368SStephen M. Cameron 			c->Request.CDBLen = 6;
6684a505b86fSStephen M. Cameron 			c->Request.type_attr_dir =
6685a505b86fSStephen M. Cameron 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6686edd16368SStephen M. Cameron 			c->Request.Timeout = 0;
6687edd16368SStephen M. Cameron 			break;
6688283b4a9bSStephen M. Cameron 		case HPSA_GET_RAID_MAP:
6689283b4a9bSStephen M. Cameron 			c->Request.CDBLen = 12;
6690a505b86fSStephen M. Cameron 			c->Request.type_attr_dir =
6691a505b86fSStephen M. Cameron 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6692283b4a9bSStephen M. Cameron 			c->Request.Timeout = 0;
6693283b4a9bSStephen M. Cameron 			c->Request.CDB[0] = HPSA_CISS_READ;
6694283b4a9bSStephen M. Cameron 			c->Request.CDB[1] = cmd;
6695283b4a9bSStephen M. Cameron 			c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
6696283b4a9bSStephen M. Cameron 			c->Request.CDB[7] = (size >> 16) & 0xFF;
6697283b4a9bSStephen M. Cameron 			c->Request.CDB[8] = (size >> 8) & 0xFF;
6698283b4a9bSStephen M. Cameron 			c->Request.CDB[9] = size & 0xFF;
6699283b4a9bSStephen M. Cameron 			break;
6700316b221aSStephen M. Cameron 		case BMIC_SENSE_CONTROLLER_PARAMETERS:
6701316b221aSStephen M. Cameron 			c->Request.CDBLen = 10;
6702a505b86fSStephen M. Cameron 			c->Request.type_attr_dir =
6703a505b86fSStephen M. Cameron 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6704316b221aSStephen M. Cameron 			c->Request.Timeout = 0;
6705316b221aSStephen M. Cameron 			c->Request.CDB[0] = BMIC_READ;
6706316b221aSStephen M. Cameron 			c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS;
6707316b221aSStephen M. Cameron 			c->Request.CDB[7] = (size >> 16) & 0xFF;
6708316b221aSStephen M. Cameron 			c->Request.CDB[8] = (size >> 8) & 0xFF;
6709316b221aSStephen M. Cameron 			break;
671003383736SDon Brace 		case BMIC_IDENTIFY_PHYSICAL_DEVICE:
671103383736SDon Brace 			c->Request.CDBLen = 10;
671203383736SDon Brace 			c->Request.type_attr_dir =
671303383736SDon Brace 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
671403383736SDon Brace 			c->Request.Timeout = 0;
671503383736SDon Brace 			c->Request.CDB[0] = BMIC_READ;
671603383736SDon Brace 			c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE;
671703383736SDon Brace 			c->Request.CDB[7] = (size >> 16) & 0xFF;
671803383736SDon Brace 			c->Request.CDB[8] = (size >> 8) & 0XFF;
671903383736SDon Brace 			break;
6720d04e62b9SKevin Barnett 		case BMIC_SENSE_SUBSYSTEM_INFORMATION:
6721d04e62b9SKevin Barnett 			c->Request.CDBLen = 10;
6722d04e62b9SKevin Barnett 			c->Request.type_attr_dir =
6723d04e62b9SKevin Barnett 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6724d04e62b9SKevin Barnett 			c->Request.Timeout = 0;
6725d04e62b9SKevin Barnett 			c->Request.CDB[0] = BMIC_READ;
6726d04e62b9SKevin Barnett 			c->Request.CDB[6] = BMIC_SENSE_SUBSYSTEM_INFORMATION;
6727d04e62b9SKevin Barnett 			c->Request.CDB[7] = (size >> 16) & 0xFF;
6728d04e62b9SKevin Barnett 			c->Request.CDB[8] = (size >> 8) & 0XFF;
6729d04e62b9SKevin Barnett 			break;
6730cca8f13bSDon Brace 		case BMIC_SENSE_STORAGE_BOX_PARAMS:
6731cca8f13bSDon Brace 			c->Request.CDBLen = 10;
6732cca8f13bSDon Brace 			c->Request.type_attr_dir =
6733cca8f13bSDon Brace 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6734cca8f13bSDon Brace 			c->Request.Timeout = 0;
6735cca8f13bSDon Brace 			c->Request.CDB[0] = BMIC_READ;
6736cca8f13bSDon Brace 			c->Request.CDB[6] = BMIC_SENSE_STORAGE_BOX_PARAMS;
6737cca8f13bSDon Brace 			c->Request.CDB[7] = (size >> 16) & 0xFF;
6738cca8f13bSDon Brace 			c->Request.CDB[8] = (size >> 8) & 0XFF;
6739cca8f13bSDon Brace 			break;
674066749d0dSScott Teel 		case BMIC_IDENTIFY_CONTROLLER:
674166749d0dSScott Teel 			c->Request.CDBLen = 10;
674266749d0dSScott Teel 			c->Request.type_attr_dir =
674366749d0dSScott Teel 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
674466749d0dSScott Teel 			c->Request.Timeout = 0;
674566749d0dSScott Teel 			c->Request.CDB[0] = BMIC_READ;
674666749d0dSScott Teel 			c->Request.CDB[1] = 0;
674766749d0dSScott Teel 			c->Request.CDB[2] = 0;
674866749d0dSScott Teel 			c->Request.CDB[3] = 0;
674966749d0dSScott Teel 			c->Request.CDB[4] = 0;
675066749d0dSScott Teel 			c->Request.CDB[5] = 0;
675166749d0dSScott Teel 			c->Request.CDB[6] = BMIC_IDENTIFY_CONTROLLER;
675266749d0dSScott Teel 			c->Request.CDB[7] = (size >> 16) & 0xFF;
675366749d0dSScott Teel 			c->Request.CDB[8] = (size >> 8) & 0XFF;
675466749d0dSScott Teel 			c->Request.CDB[9] = 0;
675566749d0dSScott Teel 			break;
6756edd16368SStephen M. Cameron 		default:
6757edd16368SStephen M. Cameron 			dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
6758edd16368SStephen M. Cameron 			BUG();
6759a2dac136SStephen M. Cameron 			return -1;
6760edd16368SStephen M. Cameron 		}
6761edd16368SStephen M. Cameron 	} else if (cmd_type == TYPE_MSG) {
6762edd16368SStephen M. Cameron 		switch (cmd) {
6763edd16368SStephen M. Cameron 
67640b9b7b6eSScott Teel 		case  HPSA_PHYS_TARGET_RESET:
67650b9b7b6eSScott Teel 			c->Request.CDBLen = 16;
67660b9b7b6eSScott Teel 			c->Request.type_attr_dir =
67670b9b7b6eSScott Teel 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
67680b9b7b6eSScott Teel 			c->Request.Timeout = 0; /* Don't time out */
67690b9b7b6eSScott Teel 			memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
67700b9b7b6eSScott Teel 			c->Request.CDB[0] = HPSA_RESET;
67710b9b7b6eSScott Teel 			c->Request.CDB[1] = HPSA_TARGET_RESET_TYPE;
67720b9b7b6eSScott Teel 			/* Physical target reset needs no control bytes 4-7*/
67730b9b7b6eSScott Teel 			c->Request.CDB[4] = 0x00;
67740b9b7b6eSScott Teel 			c->Request.CDB[5] = 0x00;
67750b9b7b6eSScott Teel 			c->Request.CDB[6] = 0x00;
67760b9b7b6eSScott Teel 			c->Request.CDB[7] = 0x00;
67770b9b7b6eSScott Teel 			break;
6778edd16368SStephen M. Cameron 		case  HPSA_DEVICE_RESET_MSG:
6779edd16368SStephen M. Cameron 			c->Request.CDBLen = 16;
6780a505b86fSStephen M. Cameron 			c->Request.type_attr_dir =
6781a505b86fSStephen M. Cameron 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6782edd16368SStephen M. Cameron 			c->Request.Timeout = 0; /* Don't time out */
678364670ac8SStephen M. Cameron 			memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
678464670ac8SStephen M. Cameron 			c->Request.CDB[0] =  cmd;
678521e89afdSStephen M. Cameron 			c->Request.CDB[1] = HPSA_RESET_TYPE_LUN;
6786edd16368SStephen M. Cameron 			/* If bytes 4-7 are zero, it means reset the */
6787edd16368SStephen M. Cameron 			/* LunID device */
6788edd16368SStephen M. Cameron 			c->Request.CDB[4] = 0x00;
6789edd16368SStephen M. Cameron 			c->Request.CDB[5] = 0x00;
6790edd16368SStephen M. Cameron 			c->Request.CDB[6] = 0x00;
6791edd16368SStephen M. Cameron 			c->Request.CDB[7] = 0x00;
6792edd16368SStephen M. Cameron 			break;
679375167d2cSStephen M. Cameron 		case  HPSA_ABORT_MSG:
67949b5c48c2SStephen Cameron 			memcpy(&tag, buff, sizeof(tag));
67952b08b3e9SDon Brace 			dev_dbg(&h->pdev->dev,
67969b5c48c2SStephen Cameron 				"Abort Tag:0x%016llx using rqst Tag:0x%016llx",
67979b5c48c2SStephen Cameron 				tag, c->Header.tag);
679875167d2cSStephen M. Cameron 			c->Request.CDBLen = 16;
6799a505b86fSStephen M. Cameron 			c->Request.type_attr_dir =
6800a505b86fSStephen M. Cameron 					TYPE_ATTR_DIR(cmd_type,
6801a505b86fSStephen M. Cameron 						ATTR_SIMPLE, XFER_WRITE);
680275167d2cSStephen M. Cameron 			c->Request.Timeout = 0; /* Don't time out */
680375167d2cSStephen M. Cameron 			c->Request.CDB[0] = HPSA_TASK_MANAGEMENT;
680475167d2cSStephen M. Cameron 			c->Request.CDB[1] = HPSA_TMF_ABORT_TASK;
680575167d2cSStephen M. Cameron 			c->Request.CDB[2] = 0x00; /* reserved */
680675167d2cSStephen M. Cameron 			c->Request.CDB[3] = 0x00; /* reserved */
680775167d2cSStephen M. Cameron 			/* Tag to abort goes in CDB[4]-CDB[11] */
68089b5c48c2SStephen Cameron 			memcpy(&c->Request.CDB[4], &tag, sizeof(tag));
680975167d2cSStephen M. Cameron 			c->Request.CDB[12] = 0x00; /* reserved */
681075167d2cSStephen M. Cameron 			c->Request.CDB[13] = 0x00; /* reserved */
681175167d2cSStephen M. Cameron 			c->Request.CDB[14] = 0x00; /* reserved */
681275167d2cSStephen M. Cameron 			c->Request.CDB[15] = 0x00; /* reserved */
681375167d2cSStephen M. Cameron 		break;
6814edd16368SStephen M. Cameron 		default:
6815edd16368SStephen M. Cameron 			dev_warn(&h->pdev->dev, "unknown message type %d\n",
6816edd16368SStephen M. Cameron 				cmd);
6817edd16368SStephen M. Cameron 			BUG();
6818edd16368SStephen M. Cameron 		}
6819edd16368SStephen M. Cameron 	} else {
6820edd16368SStephen M. Cameron 		dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
6821edd16368SStephen M. Cameron 		BUG();
6822edd16368SStephen M. Cameron 	}
6823edd16368SStephen M. Cameron 
6824a505b86fSStephen M. Cameron 	switch (GET_DIR(c->Request.type_attr_dir)) {
6825edd16368SStephen M. Cameron 	case XFER_READ:
6826edd16368SStephen M. Cameron 		pci_dir = PCI_DMA_FROMDEVICE;
6827edd16368SStephen M. Cameron 		break;
6828edd16368SStephen M. Cameron 	case XFER_WRITE:
6829edd16368SStephen M. Cameron 		pci_dir = PCI_DMA_TODEVICE;
6830edd16368SStephen M. Cameron 		break;
6831edd16368SStephen M. Cameron 	case XFER_NONE:
6832edd16368SStephen M. Cameron 		pci_dir = PCI_DMA_NONE;
6833edd16368SStephen M. Cameron 		break;
6834edd16368SStephen M. Cameron 	default:
6835edd16368SStephen M. Cameron 		pci_dir = PCI_DMA_BIDIRECTIONAL;
6836edd16368SStephen M. Cameron 	}
6837a2dac136SStephen M. Cameron 	if (hpsa_map_one(h->pdev, c, buff, size, pci_dir))
6838a2dac136SStephen M. Cameron 		return -1;
6839a2dac136SStephen M. Cameron 	return 0;
6840edd16368SStephen M. Cameron }
6841edd16368SStephen M. Cameron 
6842edd16368SStephen M. Cameron /*
6843edd16368SStephen M. Cameron  * Map (physical) PCI mem into (virtual) kernel space
6844edd16368SStephen M. Cameron  */
6845edd16368SStephen M. Cameron static void __iomem *remap_pci_mem(ulong base, ulong size)
6846edd16368SStephen M. Cameron {
6847edd16368SStephen M. Cameron 	ulong page_base = ((ulong) base) & PAGE_MASK;
6848edd16368SStephen M. Cameron 	ulong page_offs = ((ulong) base) - page_base;
6849088ba34cSStephen M. Cameron 	void __iomem *page_remapped = ioremap_nocache(page_base,
6850088ba34cSStephen M. Cameron 		page_offs + size);
6851edd16368SStephen M. Cameron 
6852edd16368SStephen M. Cameron 	return page_remapped ? (page_remapped + page_offs) : NULL;
6853edd16368SStephen M. Cameron }
6854edd16368SStephen M. Cameron 
6855254f796bSMatt Gates static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q)
6856edd16368SStephen M. Cameron {
6857254f796bSMatt Gates 	return h->access.command_completed(h, q);
6858edd16368SStephen M. Cameron }
6859edd16368SStephen M. Cameron 
6860900c5440SStephen M. Cameron static inline bool interrupt_pending(struct ctlr_info *h)
6861edd16368SStephen M. Cameron {
6862edd16368SStephen M. Cameron 	return h->access.intr_pending(h);
6863edd16368SStephen M. Cameron }
6864edd16368SStephen M. Cameron 
6865edd16368SStephen M. Cameron static inline long interrupt_not_for_us(struct ctlr_info *h)
6866edd16368SStephen M. Cameron {
686710f66018SStephen M. Cameron 	return (h->access.intr_pending(h) == 0) ||
686810f66018SStephen M. Cameron 		(h->interrupts_enabled == 0);
6869edd16368SStephen M. Cameron }
6870edd16368SStephen M. Cameron 
687101a02ffcSStephen M. Cameron static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
687201a02ffcSStephen M. Cameron 	u32 raw_tag)
6873edd16368SStephen M. Cameron {
6874edd16368SStephen M. Cameron 	if (unlikely(tag_index >= h->nr_cmds)) {
6875edd16368SStephen M. Cameron 		dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
6876edd16368SStephen M. Cameron 		return 1;
6877edd16368SStephen M. Cameron 	}
6878edd16368SStephen M. Cameron 	return 0;
6879edd16368SStephen M. Cameron }
6880edd16368SStephen M. Cameron 
68815a3d16f5SStephen M. Cameron static inline void finish_cmd(struct CommandList *c)
6882edd16368SStephen M. Cameron {
6883e85c5974SStephen M. Cameron 	dial_up_lockup_detection_on_fw_flash_complete(c->h, c);
6884c349775eSScott Teel 	if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI
6885c349775eSScott Teel 			|| c->cmd_type == CMD_IOACCEL2))
68861fb011fbSStephen M. Cameron 		complete_scsi_command(c);
68878be986ccSStephen Cameron 	else if (c->cmd_type == CMD_IOCTL_PEND || c->cmd_type == IOACCEL2_TMF)
6888edd16368SStephen M. Cameron 		complete(c->waiting);
6889a104c99fSStephen M. Cameron }
6890a104c99fSStephen M. Cameron 
6891303932fdSDon Brace /* process completion of an indexed ("direct lookup") command */
68921d94f94dSStephen M. Cameron static inline void process_indexed_cmd(struct ctlr_info *h,
6893303932fdSDon Brace 	u32 raw_tag)
6894303932fdSDon Brace {
6895303932fdSDon Brace 	u32 tag_index;
6896303932fdSDon Brace 	struct CommandList *c;
6897303932fdSDon Brace 
6898f2405db8SDon Brace 	tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT;
68991d94f94dSStephen M. Cameron 	if (!bad_tag(h, tag_index, raw_tag)) {
6900303932fdSDon Brace 		c = h->cmd_pool + tag_index;
69015a3d16f5SStephen M. Cameron 		finish_cmd(c);
69021d94f94dSStephen M. Cameron 	}
6903303932fdSDon Brace }
6904303932fdSDon Brace 
690564670ac8SStephen M. Cameron /* Some controllers, like p400, will give us one interrupt
690664670ac8SStephen M. Cameron  * after a soft reset, even if we turned interrupts off.
690764670ac8SStephen M. Cameron  * Only need to check for this in the hpsa_xxx_discard_completions
690864670ac8SStephen M. Cameron  * functions.
690964670ac8SStephen M. Cameron  */
691064670ac8SStephen M. Cameron static int ignore_bogus_interrupt(struct ctlr_info *h)
691164670ac8SStephen M. Cameron {
691264670ac8SStephen M. Cameron 	if (likely(!reset_devices))
691364670ac8SStephen M. Cameron 		return 0;
691464670ac8SStephen M. Cameron 
691564670ac8SStephen M. Cameron 	if (likely(h->interrupts_enabled))
691664670ac8SStephen M. Cameron 		return 0;
691764670ac8SStephen M. Cameron 
691864670ac8SStephen M. Cameron 	dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
691964670ac8SStephen M. Cameron 		"(known firmware bug.)  Ignoring.\n");
692064670ac8SStephen M. Cameron 
692164670ac8SStephen M. Cameron 	return 1;
692264670ac8SStephen M. Cameron }
692364670ac8SStephen M. Cameron 
6924254f796bSMatt Gates /*
6925254f796bSMatt Gates  * Convert &h->q[x] (passed to interrupt handlers) back to h.
6926254f796bSMatt Gates  * Relies on (h-q[x] == x) being true for x such that
6927254f796bSMatt Gates  * 0 <= x < MAX_REPLY_QUEUES.
6928254f796bSMatt Gates  */
6929254f796bSMatt Gates static struct ctlr_info *queue_to_hba(u8 *queue)
693064670ac8SStephen M. Cameron {
6931254f796bSMatt Gates 	return container_of((queue - *queue), struct ctlr_info, q[0]);
6932254f796bSMatt Gates }
6933254f796bSMatt Gates 
6934254f796bSMatt Gates static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue)
6935254f796bSMatt Gates {
6936254f796bSMatt Gates 	struct ctlr_info *h = queue_to_hba(queue);
6937254f796bSMatt Gates 	u8 q = *(u8 *) queue;
693864670ac8SStephen M. Cameron 	u32 raw_tag;
693964670ac8SStephen M. Cameron 
694064670ac8SStephen M. Cameron 	if (ignore_bogus_interrupt(h))
694164670ac8SStephen M. Cameron 		return IRQ_NONE;
694264670ac8SStephen M. Cameron 
694364670ac8SStephen M. Cameron 	if (interrupt_not_for_us(h))
694464670ac8SStephen M. Cameron 		return IRQ_NONE;
6945a0c12413SStephen M. Cameron 	h->last_intr_timestamp = get_jiffies_64();
694664670ac8SStephen M. Cameron 	while (interrupt_pending(h)) {
6947254f796bSMatt Gates 		raw_tag = get_next_completion(h, q);
694864670ac8SStephen M. Cameron 		while (raw_tag != FIFO_EMPTY)
6949254f796bSMatt Gates 			raw_tag = next_command(h, q);
695064670ac8SStephen M. Cameron 	}
695164670ac8SStephen M. Cameron 	return IRQ_HANDLED;
695264670ac8SStephen M. Cameron }
695364670ac8SStephen M. Cameron 
6954254f796bSMatt Gates static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue)
695564670ac8SStephen M. Cameron {
6956254f796bSMatt Gates 	struct ctlr_info *h = queue_to_hba(queue);
695764670ac8SStephen M. Cameron 	u32 raw_tag;
6958254f796bSMatt Gates 	u8 q = *(u8 *) queue;
695964670ac8SStephen M. Cameron 
696064670ac8SStephen M. Cameron 	if (ignore_bogus_interrupt(h))
696164670ac8SStephen M. Cameron 		return IRQ_NONE;
696264670ac8SStephen M. Cameron 
6963a0c12413SStephen M. Cameron 	h->last_intr_timestamp = get_jiffies_64();
6964254f796bSMatt Gates 	raw_tag = get_next_completion(h, q);
696564670ac8SStephen M. Cameron 	while (raw_tag != FIFO_EMPTY)
6966254f796bSMatt Gates 		raw_tag = next_command(h, q);
696764670ac8SStephen M. Cameron 	return IRQ_HANDLED;
696864670ac8SStephen M. Cameron }
696964670ac8SStephen M. Cameron 
6970254f796bSMatt Gates static irqreturn_t do_hpsa_intr_intx(int irq, void *queue)
6971edd16368SStephen M. Cameron {
6972254f796bSMatt Gates 	struct ctlr_info *h = queue_to_hba((u8 *) queue);
6973303932fdSDon Brace 	u32 raw_tag;
6974254f796bSMatt Gates 	u8 q = *(u8 *) queue;
6975edd16368SStephen M. Cameron 
6976edd16368SStephen M. Cameron 	if (interrupt_not_for_us(h))
6977edd16368SStephen M. Cameron 		return IRQ_NONE;
6978a0c12413SStephen M. Cameron 	h->last_intr_timestamp = get_jiffies_64();
697910f66018SStephen M. Cameron 	while (interrupt_pending(h)) {
6980254f796bSMatt Gates 		raw_tag = get_next_completion(h, q);
698110f66018SStephen M. Cameron 		while (raw_tag != FIFO_EMPTY) {
69821d94f94dSStephen M. Cameron 			process_indexed_cmd(h, raw_tag);
6983254f796bSMatt Gates 			raw_tag = next_command(h, q);
698410f66018SStephen M. Cameron 		}
698510f66018SStephen M. Cameron 	}
698610f66018SStephen M. Cameron 	return IRQ_HANDLED;
698710f66018SStephen M. Cameron }
698810f66018SStephen M. Cameron 
6989254f796bSMatt Gates static irqreturn_t do_hpsa_intr_msi(int irq, void *queue)
699010f66018SStephen M. Cameron {
6991254f796bSMatt Gates 	struct ctlr_info *h = queue_to_hba(queue);
699210f66018SStephen M. Cameron 	u32 raw_tag;
6993254f796bSMatt Gates 	u8 q = *(u8 *) queue;
699410f66018SStephen M. Cameron 
6995a0c12413SStephen M. Cameron 	h->last_intr_timestamp = get_jiffies_64();
6996254f796bSMatt Gates 	raw_tag = get_next_completion(h, q);
6997303932fdSDon Brace 	while (raw_tag != FIFO_EMPTY) {
69981d94f94dSStephen M. Cameron 		process_indexed_cmd(h, raw_tag);
6999254f796bSMatt Gates 		raw_tag = next_command(h, q);
7000edd16368SStephen M. Cameron 	}
7001edd16368SStephen M. Cameron 	return IRQ_HANDLED;
7002edd16368SStephen M. Cameron }
7003edd16368SStephen M. Cameron 
7004a9a3a273SStephen M. Cameron /* Send a message CDB to the firmware. Careful, this only works
7005a9a3a273SStephen M. Cameron  * in simple mode, not performant mode due to the tag lookup.
7006a9a3a273SStephen M. Cameron  * We only ever use this immediately after a controller reset.
7007a9a3a273SStephen M. Cameron  */
70086f039790SGreg Kroah-Hartman static int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
7009edd16368SStephen M. Cameron 			unsigned char type)
7010edd16368SStephen M. Cameron {
7011edd16368SStephen M. Cameron 	struct Command {
7012edd16368SStephen M. Cameron 		struct CommandListHeader CommandHeader;
7013edd16368SStephen M. Cameron 		struct RequestBlock Request;
7014edd16368SStephen M. Cameron 		struct ErrDescriptor ErrorDescriptor;
7015edd16368SStephen M. Cameron 	};
7016edd16368SStephen M. Cameron 	struct Command *cmd;
7017edd16368SStephen M. Cameron 	static const size_t cmd_sz = sizeof(*cmd) +
7018edd16368SStephen M. Cameron 					sizeof(cmd->ErrorDescriptor);
7019edd16368SStephen M. Cameron 	dma_addr_t paddr64;
70202b08b3e9SDon Brace 	__le32 paddr32;
70212b08b3e9SDon Brace 	u32 tag;
7022edd16368SStephen M. Cameron 	void __iomem *vaddr;
7023edd16368SStephen M. Cameron 	int i, err;
7024edd16368SStephen M. Cameron 
7025edd16368SStephen M. Cameron 	vaddr = pci_ioremap_bar(pdev, 0);
7026edd16368SStephen M. Cameron 	if (vaddr == NULL)
7027edd16368SStephen M. Cameron 		return -ENOMEM;
7028edd16368SStephen M. Cameron 
7029edd16368SStephen M. Cameron 	/* The Inbound Post Queue only accepts 32-bit physical addresses for the
7030edd16368SStephen M. Cameron 	 * CCISS commands, so they must be allocated from the lower 4GiB of
7031edd16368SStephen M. Cameron 	 * memory.
7032edd16368SStephen M. Cameron 	 */
7033edd16368SStephen M. Cameron 	err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
7034edd16368SStephen M. Cameron 	if (err) {
7035edd16368SStephen M. Cameron 		iounmap(vaddr);
70361eaec8f3SRobert Elliott 		return err;
7037edd16368SStephen M. Cameron 	}
7038edd16368SStephen M. Cameron 
7039edd16368SStephen M. Cameron 	cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
7040edd16368SStephen M. Cameron 	if (cmd == NULL) {
7041edd16368SStephen M. Cameron 		iounmap(vaddr);
7042edd16368SStephen M. Cameron 		return -ENOMEM;
7043edd16368SStephen M. Cameron 	}
7044edd16368SStephen M. Cameron 
7045edd16368SStephen M. Cameron 	/* This must fit, because of the 32-bit consistent DMA mask.  Also,
7046edd16368SStephen M. Cameron 	 * although there's no guarantee, we assume that the address is at
7047edd16368SStephen M. Cameron 	 * least 4-byte aligned (most likely, it's page-aligned).
7048edd16368SStephen M. Cameron 	 */
70492b08b3e9SDon Brace 	paddr32 = cpu_to_le32(paddr64);
7050edd16368SStephen M. Cameron 
7051edd16368SStephen M. Cameron 	cmd->CommandHeader.ReplyQueue = 0;
7052edd16368SStephen M. Cameron 	cmd->CommandHeader.SGList = 0;
705350a0decfSStephen M. Cameron 	cmd->CommandHeader.SGTotal = cpu_to_le16(0);
70542b08b3e9SDon Brace 	cmd->CommandHeader.tag = cpu_to_le64(paddr64);
7055edd16368SStephen M. Cameron 	memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
7056edd16368SStephen M. Cameron 
7057edd16368SStephen M. Cameron 	cmd->Request.CDBLen = 16;
7058a505b86fSStephen M. Cameron 	cmd->Request.type_attr_dir =
7059a505b86fSStephen M. Cameron 			TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE);
7060edd16368SStephen M. Cameron 	cmd->Request.Timeout = 0; /* Don't time out */
7061edd16368SStephen M. Cameron 	cmd->Request.CDB[0] = opcode;
7062edd16368SStephen M. Cameron 	cmd->Request.CDB[1] = type;
7063edd16368SStephen M. Cameron 	memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
706450a0decfSStephen M. Cameron 	cmd->ErrorDescriptor.Addr =
70652b08b3e9SDon Brace 			cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd)));
706650a0decfSStephen M. Cameron 	cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo));
7067edd16368SStephen M. Cameron 
70682b08b3e9SDon Brace 	writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET);
7069edd16368SStephen M. Cameron 
7070edd16368SStephen M. Cameron 	for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
7071edd16368SStephen M. Cameron 		tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
70722b08b3e9SDon Brace 		if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64)
7073edd16368SStephen M. Cameron 			break;
7074edd16368SStephen M. Cameron 		msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
7075edd16368SStephen M. Cameron 	}
7076edd16368SStephen M. Cameron 
7077edd16368SStephen M. Cameron 	iounmap(vaddr);
7078edd16368SStephen M. Cameron 
7079edd16368SStephen M. Cameron 	/* we leak the DMA buffer here ... no choice since the controller could
7080edd16368SStephen M. Cameron 	 *  still complete the command.
7081edd16368SStephen M. Cameron 	 */
7082edd16368SStephen M. Cameron 	if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
7083edd16368SStephen M. Cameron 		dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
7084edd16368SStephen M. Cameron 			opcode, type);
7085edd16368SStephen M. Cameron 		return -ETIMEDOUT;
7086edd16368SStephen M. Cameron 	}
7087edd16368SStephen M. Cameron 
7088edd16368SStephen M. Cameron 	pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
7089edd16368SStephen M. Cameron 
7090edd16368SStephen M. Cameron 	if (tag & HPSA_ERROR_BIT) {
7091edd16368SStephen M. Cameron 		dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
7092edd16368SStephen M. Cameron 			opcode, type);
7093edd16368SStephen M. Cameron 		return -EIO;
7094edd16368SStephen M. Cameron 	}
7095edd16368SStephen M. Cameron 
7096edd16368SStephen M. Cameron 	dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
7097edd16368SStephen M. Cameron 		opcode, type);
7098edd16368SStephen M. Cameron 	return 0;
7099edd16368SStephen M. Cameron }
7100edd16368SStephen M. Cameron 
7101edd16368SStephen M. Cameron #define hpsa_noop(p) hpsa_message(p, 3, 0)
7102edd16368SStephen M. Cameron 
71031df8552aSStephen M. Cameron static int hpsa_controller_hard_reset(struct pci_dev *pdev,
710442a91641SDon Brace 	void __iomem *vaddr, u32 use_doorbell)
7105edd16368SStephen M. Cameron {
7106edd16368SStephen M. Cameron 
71071df8552aSStephen M. Cameron 	if (use_doorbell) {
71081df8552aSStephen M. Cameron 		/* For everything after the P600, the PCI power state method
71091df8552aSStephen M. Cameron 		 * of resetting the controller doesn't work, so we have this
71101df8552aSStephen M. Cameron 		 * other way using the doorbell register.
7111edd16368SStephen M. Cameron 		 */
71121df8552aSStephen M. Cameron 		dev_info(&pdev->dev, "using doorbell to reset controller\n");
7113cf0b08d0SStephen M. Cameron 		writel(use_doorbell, vaddr + SA5_DOORBELL);
711485009239SStephen M. Cameron 
711500701a96SJustin Lindley 		/* PMC hardware guys tell us we need a 10 second delay after
711685009239SStephen M. Cameron 		 * doorbell reset and before any attempt to talk to the board
711785009239SStephen M. Cameron 		 * at all to ensure that this actually works and doesn't fall
711885009239SStephen M. Cameron 		 * over in some weird corner cases.
711985009239SStephen M. Cameron 		 */
712000701a96SJustin Lindley 		msleep(10000);
71211df8552aSStephen M. Cameron 	} else { /* Try to do it the PCI power state way */
7122edd16368SStephen M. Cameron 
7123edd16368SStephen M. Cameron 		/* Quoting from the Open CISS Specification: "The Power
7124edd16368SStephen M. Cameron 		 * Management Control/Status Register (CSR) controls the power
7125edd16368SStephen M. Cameron 		 * state of the device.  The normal operating state is D0,
7126edd16368SStephen M. Cameron 		 * CSR=00h.  The software off state is D3, CSR=03h.  To reset
71271df8552aSStephen M. Cameron 		 * the controller, place the interface device in D3 then to D0,
71281df8552aSStephen M. Cameron 		 * this causes a secondary PCI reset which will reset the
71291df8552aSStephen M. Cameron 		 * controller." */
7130edd16368SStephen M. Cameron 
71312662cab8SDon Brace 		int rc = 0;
71322662cab8SDon Brace 
71331df8552aSStephen M. Cameron 		dev_info(&pdev->dev, "using PCI PM to reset controller\n");
71342662cab8SDon Brace 
7135edd16368SStephen M. Cameron 		/* enter the D3hot power management state */
71362662cab8SDon Brace 		rc = pci_set_power_state(pdev, PCI_D3hot);
71372662cab8SDon Brace 		if (rc)
71382662cab8SDon Brace 			return rc;
7139edd16368SStephen M. Cameron 
7140edd16368SStephen M. Cameron 		msleep(500);
7141edd16368SStephen M. Cameron 
7142edd16368SStephen M. Cameron 		/* enter the D0 power management state */
71432662cab8SDon Brace 		rc = pci_set_power_state(pdev, PCI_D0);
71442662cab8SDon Brace 		if (rc)
71452662cab8SDon Brace 			return rc;
7146c4853efeSMike Miller 
7147c4853efeSMike Miller 		/*
7148c4853efeSMike Miller 		 * The P600 requires a small delay when changing states.
7149c4853efeSMike Miller 		 * Otherwise we may think the board did not reset and we bail.
7150c4853efeSMike Miller 		 * This for kdump only and is particular to the P600.
7151c4853efeSMike Miller 		 */
7152c4853efeSMike Miller 		msleep(500);
71531df8552aSStephen M. Cameron 	}
71541df8552aSStephen M. Cameron 	return 0;
71551df8552aSStephen M. Cameron }
71561df8552aSStephen M. Cameron 
71576f039790SGreg Kroah-Hartman static void init_driver_version(char *driver_version, int len)
7158580ada3cSStephen M. Cameron {
7159580ada3cSStephen M. Cameron 	memset(driver_version, 0, len);
7160f79cfec6SStephen M. Cameron 	strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1);
7161580ada3cSStephen M. Cameron }
7162580ada3cSStephen M. Cameron 
71636f039790SGreg Kroah-Hartman static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable)
7164580ada3cSStephen M. Cameron {
7165580ada3cSStephen M. Cameron 	char *driver_version;
7166580ada3cSStephen M. Cameron 	int i, size = sizeof(cfgtable->driver_version);
7167580ada3cSStephen M. Cameron 
7168580ada3cSStephen M. Cameron 	driver_version = kmalloc(size, GFP_KERNEL);
7169580ada3cSStephen M. Cameron 	if (!driver_version)
7170580ada3cSStephen M. Cameron 		return -ENOMEM;
7171580ada3cSStephen M. Cameron 
7172580ada3cSStephen M. Cameron 	init_driver_version(driver_version, size);
7173580ada3cSStephen M. Cameron 	for (i = 0; i < size; i++)
7174580ada3cSStephen M. Cameron 		writeb(driver_version[i], &cfgtable->driver_version[i]);
7175580ada3cSStephen M. Cameron 	kfree(driver_version);
7176580ada3cSStephen M. Cameron 	return 0;
7177580ada3cSStephen M. Cameron }
7178580ada3cSStephen M. Cameron 
71796f039790SGreg Kroah-Hartman static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable,
71806f039790SGreg Kroah-Hartman 					  unsigned char *driver_ver)
7181580ada3cSStephen M. Cameron {
7182580ada3cSStephen M. Cameron 	int i;
7183580ada3cSStephen M. Cameron 
7184580ada3cSStephen M. Cameron 	for (i = 0; i < sizeof(cfgtable->driver_version); i++)
7185580ada3cSStephen M. Cameron 		driver_ver[i] = readb(&cfgtable->driver_version[i]);
7186580ada3cSStephen M. Cameron }
7187580ada3cSStephen M. Cameron 
71886f039790SGreg Kroah-Hartman static int controller_reset_failed(struct CfgTable __iomem *cfgtable)
7189580ada3cSStephen M. Cameron {
7190580ada3cSStephen M. Cameron 
7191580ada3cSStephen M. Cameron 	char *driver_ver, *old_driver_ver;
7192580ada3cSStephen M. Cameron 	int rc, size = sizeof(cfgtable->driver_version);
7193580ada3cSStephen M. Cameron 
7194580ada3cSStephen M. Cameron 	old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
7195580ada3cSStephen M. Cameron 	if (!old_driver_ver)
7196580ada3cSStephen M. Cameron 		return -ENOMEM;
7197580ada3cSStephen M. Cameron 	driver_ver = old_driver_ver + size;
7198580ada3cSStephen M. Cameron 
7199580ada3cSStephen M. Cameron 	/* After a reset, the 32 bytes of "driver version" in the cfgtable
7200580ada3cSStephen M. Cameron 	 * should have been changed, otherwise we know the reset failed.
7201580ada3cSStephen M. Cameron 	 */
7202580ada3cSStephen M. Cameron 	init_driver_version(old_driver_ver, size);
7203580ada3cSStephen M. Cameron 	read_driver_ver_from_cfgtable(cfgtable, driver_ver);
7204580ada3cSStephen M. Cameron 	rc = !memcmp(driver_ver, old_driver_ver, size);
7205580ada3cSStephen M. Cameron 	kfree(old_driver_ver);
7206580ada3cSStephen M. Cameron 	return rc;
7207580ada3cSStephen M. Cameron }
72081df8552aSStephen M. Cameron /* This does a hard reset of the controller using PCI power management
72091df8552aSStephen M. Cameron  * states or the using the doorbell register.
72101df8552aSStephen M. Cameron  */
72116b6c1cd7STomas Henzl static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id)
72121df8552aSStephen M. Cameron {
72131df8552aSStephen M. Cameron 	u64 cfg_offset;
72141df8552aSStephen M. Cameron 	u32 cfg_base_addr;
72151df8552aSStephen M. Cameron 	u64 cfg_base_addr_index;
72161df8552aSStephen M. Cameron 	void __iomem *vaddr;
72171df8552aSStephen M. Cameron 	unsigned long paddr;
7218580ada3cSStephen M. Cameron 	u32 misc_fw_support;
7219270d05deSStephen M. Cameron 	int rc;
72201df8552aSStephen M. Cameron 	struct CfgTable __iomem *cfgtable;
7221cf0b08d0SStephen M. Cameron 	u32 use_doorbell;
7222270d05deSStephen M. Cameron 	u16 command_register;
72231df8552aSStephen M. Cameron 
72241df8552aSStephen M. Cameron 	/* For controllers as old as the P600, this is very nearly
72251df8552aSStephen M. Cameron 	 * the same thing as
72261df8552aSStephen M. Cameron 	 *
72271df8552aSStephen M. Cameron 	 * pci_save_state(pci_dev);
72281df8552aSStephen M. Cameron 	 * pci_set_power_state(pci_dev, PCI_D3hot);
72291df8552aSStephen M. Cameron 	 * pci_set_power_state(pci_dev, PCI_D0);
72301df8552aSStephen M. Cameron 	 * pci_restore_state(pci_dev);
72311df8552aSStephen M. Cameron 	 *
72321df8552aSStephen M. Cameron 	 * For controllers newer than the P600, the pci power state
72331df8552aSStephen M. Cameron 	 * method of resetting doesn't work so we have another way
72341df8552aSStephen M. Cameron 	 * using the doorbell register.
72351df8552aSStephen M. Cameron 	 */
723618867659SStephen M. Cameron 
723760f923b9SRobert Elliott 	if (!ctlr_is_resettable(board_id)) {
723860f923b9SRobert Elliott 		dev_warn(&pdev->dev, "Controller not resettable\n");
723925c1e56aSStephen M. Cameron 		return -ENODEV;
724025c1e56aSStephen M. Cameron 	}
724146380786SStephen M. Cameron 
724246380786SStephen M. Cameron 	/* if controller is soft- but not hard resettable... */
724346380786SStephen M. Cameron 	if (!ctlr_is_hard_resettable(board_id))
724446380786SStephen M. Cameron 		return -ENOTSUPP; /* try soft reset later. */
724518867659SStephen M. Cameron 
7246270d05deSStephen M. Cameron 	/* Save the PCI command register */
7247270d05deSStephen M. Cameron 	pci_read_config_word(pdev, 4, &command_register);
7248270d05deSStephen M. Cameron 	pci_save_state(pdev);
72491df8552aSStephen M. Cameron 
72501df8552aSStephen M. Cameron 	/* find the first memory BAR, so we can find the cfg table */
72511df8552aSStephen M. Cameron 	rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
72521df8552aSStephen M. Cameron 	if (rc)
72531df8552aSStephen M. Cameron 		return rc;
72541df8552aSStephen M. Cameron 	vaddr = remap_pci_mem(paddr, 0x250);
72551df8552aSStephen M. Cameron 	if (!vaddr)
72561df8552aSStephen M. Cameron 		return -ENOMEM;
72571df8552aSStephen M. Cameron 
72581df8552aSStephen M. Cameron 	/* find cfgtable in order to check if reset via doorbell is supported */
72591df8552aSStephen M. Cameron 	rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
72601df8552aSStephen M. Cameron 					&cfg_base_addr_index, &cfg_offset);
72611df8552aSStephen M. Cameron 	if (rc)
72621df8552aSStephen M. Cameron 		goto unmap_vaddr;
72631df8552aSStephen M. Cameron 	cfgtable = remap_pci_mem(pci_resource_start(pdev,
72641df8552aSStephen M. Cameron 		       cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
72651df8552aSStephen M. Cameron 	if (!cfgtable) {
72661df8552aSStephen M. Cameron 		rc = -ENOMEM;
72671df8552aSStephen M. Cameron 		goto unmap_vaddr;
72681df8552aSStephen M. Cameron 	}
7269580ada3cSStephen M. Cameron 	rc = write_driver_ver_to_cfgtable(cfgtable);
7270580ada3cSStephen M. Cameron 	if (rc)
727103741d95STomas Henzl 		goto unmap_cfgtable;
72721df8552aSStephen M. Cameron 
7273cf0b08d0SStephen M. Cameron 	/* If reset via doorbell register is supported, use that.
7274cf0b08d0SStephen M. Cameron 	 * There are two such methods.  Favor the newest method.
7275cf0b08d0SStephen M. Cameron 	 */
72761df8552aSStephen M. Cameron 	misc_fw_support = readl(&cfgtable->misc_fw_support);
7277cf0b08d0SStephen M. Cameron 	use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
7278cf0b08d0SStephen M. Cameron 	if (use_doorbell) {
7279cf0b08d0SStephen M. Cameron 		use_doorbell = DOORBELL_CTLR_RESET2;
7280cf0b08d0SStephen M. Cameron 	} else {
72811df8552aSStephen M. Cameron 		use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
7282cf0b08d0SStephen M. Cameron 		if (use_doorbell) {
7283050f7147SStephen Cameron 			dev_warn(&pdev->dev,
7284050f7147SStephen Cameron 				"Soft reset not supported. Firmware update is required.\n");
728564670ac8SStephen M. Cameron 			rc = -ENOTSUPP; /* try soft reset */
7286cf0b08d0SStephen M. Cameron 			goto unmap_cfgtable;
7287cf0b08d0SStephen M. Cameron 		}
7288cf0b08d0SStephen M. Cameron 	}
72891df8552aSStephen M. Cameron 
72901df8552aSStephen M. Cameron 	rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
72911df8552aSStephen M. Cameron 	if (rc)
72921df8552aSStephen M. Cameron 		goto unmap_cfgtable;
7293edd16368SStephen M. Cameron 
7294270d05deSStephen M. Cameron 	pci_restore_state(pdev);
7295270d05deSStephen M. Cameron 	pci_write_config_word(pdev, 4, command_register);
7296edd16368SStephen M. Cameron 
72971df8552aSStephen M. Cameron 	/* Some devices (notably the HP Smart Array 5i Controller)
72981df8552aSStephen M. Cameron 	   need a little pause here */
72991df8552aSStephen M. Cameron 	msleep(HPSA_POST_RESET_PAUSE_MSECS);
73001df8552aSStephen M. Cameron 
7301fe5389c8SStephen M. Cameron 	rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
7302fe5389c8SStephen M. Cameron 	if (rc) {
7303fe5389c8SStephen M. Cameron 		dev_warn(&pdev->dev,
7304050f7147SStephen Cameron 			"Failed waiting for board to become ready after hard reset\n");
7305fe5389c8SStephen M. Cameron 		goto unmap_cfgtable;
7306fe5389c8SStephen M. Cameron 	}
7307fe5389c8SStephen M. Cameron 
7308580ada3cSStephen M. Cameron 	rc = controller_reset_failed(vaddr);
7309580ada3cSStephen M. Cameron 	if (rc < 0)
7310580ada3cSStephen M. Cameron 		goto unmap_cfgtable;
7311580ada3cSStephen M. Cameron 	if (rc) {
731264670ac8SStephen M. Cameron 		dev_warn(&pdev->dev, "Unable to successfully reset "
731364670ac8SStephen M. Cameron 			"controller. Will try soft reset.\n");
731464670ac8SStephen M. Cameron 		rc = -ENOTSUPP;
7315580ada3cSStephen M. Cameron 	} else {
731664670ac8SStephen M. Cameron 		dev_info(&pdev->dev, "board ready after hard reset.\n");
73171df8552aSStephen M. Cameron 	}
73181df8552aSStephen M. Cameron 
73191df8552aSStephen M. Cameron unmap_cfgtable:
73201df8552aSStephen M. Cameron 	iounmap(cfgtable);
73211df8552aSStephen M. Cameron 
73221df8552aSStephen M. Cameron unmap_vaddr:
73231df8552aSStephen M. Cameron 	iounmap(vaddr);
73241df8552aSStephen M. Cameron 	return rc;
7325edd16368SStephen M. Cameron }
7326edd16368SStephen M. Cameron 
7327edd16368SStephen M. Cameron /*
7328edd16368SStephen M. Cameron  *  We cannot read the structure directly, for portability we must use
7329edd16368SStephen M. Cameron  *   the io functions.
7330edd16368SStephen M. Cameron  *   This is for debug only.
7331edd16368SStephen M. Cameron  */
733242a91641SDon Brace static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb)
7333edd16368SStephen M. Cameron {
733458f8665cSStephen M. Cameron #ifdef HPSA_DEBUG
7335edd16368SStephen M. Cameron 	int i;
7336edd16368SStephen M. Cameron 	char temp_name[17];
7337edd16368SStephen M. Cameron 
7338edd16368SStephen M. Cameron 	dev_info(dev, "Controller Configuration information\n");
7339edd16368SStephen M. Cameron 	dev_info(dev, "------------------------------------\n");
7340edd16368SStephen M. Cameron 	for (i = 0; i < 4; i++)
7341edd16368SStephen M. Cameron 		temp_name[i] = readb(&(tb->Signature[i]));
7342edd16368SStephen M. Cameron 	temp_name[4] = '\0';
7343edd16368SStephen M. Cameron 	dev_info(dev, "   Signature = %s\n", temp_name);
7344edd16368SStephen M. Cameron 	dev_info(dev, "   Spec Number = %d\n", readl(&(tb->SpecValence)));
7345edd16368SStephen M. Cameron 	dev_info(dev, "   Transport methods supported = 0x%x\n",
7346edd16368SStephen M. Cameron 	       readl(&(tb->TransportSupport)));
7347edd16368SStephen M. Cameron 	dev_info(dev, "   Transport methods active = 0x%x\n",
7348edd16368SStephen M. Cameron 	       readl(&(tb->TransportActive)));
7349edd16368SStephen M. Cameron 	dev_info(dev, "   Requested transport Method = 0x%x\n",
7350edd16368SStephen M. Cameron 	       readl(&(tb->HostWrite.TransportRequest)));
7351edd16368SStephen M. Cameron 	dev_info(dev, "   Coalesce Interrupt Delay = 0x%x\n",
7352edd16368SStephen M. Cameron 	       readl(&(tb->HostWrite.CoalIntDelay)));
7353edd16368SStephen M. Cameron 	dev_info(dev, "   Coalesce Interrupt Count = 0x%x\n",
7354edd16368SStephen M. Cameron 	       readl(&(tb->HostWrite.CoalIntCount)));
735569d6e33dSRobert Elliott 	dev_info(dev, "   Max outstanding commands = %d\n",
7356edd16368SStephen M. Cameron 	       readl(&(tb->CmdsOutMax)));
7357edd16368SStephen M. Cameron 	dev_info(dev, "   Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
7358edd16368SStephen M. Cameron 	for (i = 0; i < 16; i++)
7359edd16368SStephen M. Cameron 		temp_name[i] = readb(&(tb->ServerName[i]));
7360edd16368SStephen M. Cameron 	temp_name[16] = '\0';
7361edd16368SStephen M. Cameron 	dev_info(dev, "   Server Name = %s\n", temp_name);
7362edd16368SStephen M. Cameron 	dev_info(dev, "   Heartbeat Counter = 0x%x\n\n\n",
7363edd16368SStephen M. Cameron 		readl(&(tb->HeartBeat)));
7364edd16368SStephen M. Cameron #endif				/* HPSA_DEBUG */
736558f8665cSStephen M. Cameron }
7366edd16368SStephen M. Cameron 
7367edd16368SStephen M. Cameron static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
7368edd16368SStephen M. Cameron {
7369edd16368SStephen M. Cameron 	int i, offset, mem_type, bar_type;
7370edd16368SStephen M. Cameron 
7371edd16368SStephen M. Cameron 	if (pci_bar_addr == PCI_BASE_ADDRESS_0)	/* looking for BAR zero? */
7372edd16368SStephen M. Cameron 		return 0;
7373edd16368SStephen M. Cameron 	offset = 0;
7374edd16368SStephen M. Cameron 	for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
7375edd16368SStephen M. Cameron 		bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
7376edd16368SStephen M. Cameron 		if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
7377edd16368SStephen M. Cameron 			offset += 4;
7378edd16368SStephen M. Cameron 		else {
7379edd16368SStephen M. Cameron 			mem_type = pci_resource_flags(pdev, i) &
7380edd16368SStephen M. Cameron 			    PCI_BASE_ADDRESS_MEM_TYPE_MASK;
7381edd16368SStephen M. Cameron 			switch (mem_type) {
7382edd16368SStephen M. Cameron 			case PCI_BASE_ADDRESS_MEM_TYPE_32:
7383edd16368SStephen M. Cameron 			case PCI_BASE_ADDRESS_MEM_TYPE_1M:
7384edd16368SStephen M. Cameron 				offset += 4;	/* 32 bit */
7385edd16368SStephen M. Cameron 				break;
7386edd16368SStephen M. Cameron 			case PCI_BASE_ADDRESS_MEM_TYPE_64:
7387edd16368SStephen M. Cameron 				offset += 8;
7388edd16368SStephen M. Cameron 				break;
7389edd16368SStephen M. Cameron 			default:	/* reserved in PCI 2.2 */
7390edd16368SStephen M. Cameron 				dev_warn(&pdev->dev,
7391edd16368SStephen M. Cameron 				       "base address is invalid\n");
7392edd16368SStephen M. Cameron 				return -1;
7393edd16368SStephen M. Cameron 				break;
7394edd16368SStephen M. Cameron 			}
7395edd16368SStephen M. Cameron 		}
7396edd16368SStephen M. Cameron 		if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
7397edd16368SStephen M. Cameron 			return i + 1;
7398edd16368SStephen M. Cameron 	}
7399edd16368SStephen M. Cameron 	return -1;
7400edd16368SStephen M. Cameron }
7401edd16368SStephen M. Cameron 
7402cc64c817SRobert Elliott static void hpsa_disable_interrupt_mode(struct ctlr_info *h)
7403cc64c817SRobert Elliott {
7404cc64c817SRobert Elliott 	if (h->msix_vector) {
7405cc64c817SRobert Elliott 		if (h->pdev->msix_enabled)
7406cc64c817SRobert Elliott 			pci_disable_msix(h->pdev);
7407105a3dbcSRobert Elliott 		h->msix_vector = 0;
7408cc64c817SRobert Elliott 	} else if (h->msi_vector) {
7409cc64c817SRobert Elliott 		if (h->pdev->msi_enabled)
7410cc64c817SRobert Elliott 			pci_disable_msi(h->pdev);
7411105a3dbcSRobert Elliott 		h->msi_vector = 0;
7412cc64c817SRobert Elliott 	}
7413cc64c817SRobert Elliott }
7414cc64c817SRobert Elliott 
7415edd16368SStephen M. Cameron /* If MSI/MSI-X is supported by the kernel we will try to enable it on
7416050f7147SStephen Cameron  * controllers that are capable. If not, we use legacy INTx mode.
7417edd16368SStephen M. Cameron  */
74186f039790SGreg Kroah-Hartman static void hpsa_interrupt_mode(struct ctlr_info *h)
7419edd16368SStephen M. Cameron {
7420edd16368SStephen M. Cameron #ifdef CONFIG_PCI_MSI
7421254f796bSMatt Gates 	int err, i;
7422254f796bSMatt Gates 	struct msix_entry hpsa_msix_entries[MAX_REPLY_QUEUES];
7423254f796bSMatt Gates 
7424254f796bSMatt Gates 	for (i = 0; i < MAX_REPLY_QUEUES; i++) {
7425254f796bSMatt Gates 		hpsa_msix_entries[i].vector = 0;
7426254f796bSMatt Gates 		hpsa_msix_entries[i].entry = i;
7427254f796bSMatt Gates 	}
7428edd16368SStephen M. Cameron 
7429edd16368SStephen M. Cameron 	/* Some boards advertise MSI but don't really support it */
74306b3f4c52SStephen M. Cameron 	if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
74316b3f4c52SStephen M. Cameron 	    (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
7432edd16368SStephen M. Cameron 		goto default_int_mode;
743355c06c71SStephen M. Cameron 	if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
7434050f7147SStephen Cameron 		dev_info(&h->pdev->dev, "MSI-X capable controller\n");
7435eee0f03aSHannes Reinecke 		h->msix_vector = MAX_REPLY_QUEUES;
7436f89439bcSStephen M. Cameron 		if (h->msix_vector > num_online_cpus())
7437f89439bcSStephen M. Cameron 			h->msix_vector = num_online_cpus();
743818fce3c4SAlexander Gordeev 		err = pci_enable_msix_range(h->pdev, hpsa_msix_entries,
743918fce3c4SAlexander Gordeev 					    1, h->msix_vector);
744018fce3c4SAlexander Gordeev 		if (err < 0) {
744118fce3c4SAlexander Gordeev 			dev_warn(&h->pdev->dev, "MSI-X init failed %d\n", err);
744218fce3c4SAlexander Gordeev 			h->msix_vector = 0;
744318fce3c4SAlexander Gordeev 			goto single_msi_mode;
744418fce3c4SAlexander Gordeev 		} else if (err < h->msix_vector) {
744555c06c71SStephen M. Cameron 			dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
7446edd16368SStephen M. Cameron 			       "available\n", err);
7447eee0f03aSHannes Reinecke 		}
744818fce3c4SAlexander Gordeev 		h->msix_vector = err;
7449eee0f03aSHannes Reinecke 		for (i = 0; i < h->msix_vector; i++)
7450eee0f03aSHannes Reinecke 			h->intr[i] = hpsa_msix_entries[i].vector;
7451eee0f03aSHannes Reinecke 		return;
7452edd16368SStephen M. Cameron 	}
745318fce3c4SAlexander Gordeev single_msi_mode:
745455c06c71SStephen M. Cameron 	if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
7455050f7147SStephen Cameron 		dev_info(&h->pdev->dev, "MSI capable controller\n");
745655c06c71SStephen M. Cameron 		if (!pci_enable_msi(h->pdev))
7457edd16368SStephen M. Cameron 			h->msi_vector = 1;
7458edd16368SStephen M. Cameron 		else
745955c06c71SStephen M. Cameron 			dev_warn(&h->pdev->dev, "MSI init failed\n");
7460edd16368SStephen M. Cameron 	}
7461edd16368SStephen M. Cameron default_int_mode:
7462edd16368SStephen M. Cameron #endif				/* CONFIG_PCI_MSI */
7463edd16368SStephen M. Cameron 	/* if we get here we're going to use the default interrupt mode */
7464a9a3a273SStephen M. Cameron 	h->intr[h->intr_mode] = h->pdev->irq;
7465edd16368SStephen M. Cameron }
7466edd16368SStephen M. Cameron 
74676f039790SGreg Kroah-Hartman static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
7468e5c880d1SStephen M. Cameron {
7469e5c880d1SStephen M. Cameron 	int i;
7470e5c880d1SStephen M. Cameron 	u32 subsystem_vendor_id, subsystem_device_id;
7471e5c880d1SStephen M. Cameron 
7472e5c880d1SStephen M. Cameron 	subsystem_vendor_id = pdev->subsystem_vendor;
7473e5c880d1SStephen M. Cameron 	subsystem_device_id = pdev->subsystem_device;
7474e5c880d1SStephen M. Cameron 	*board_id = ((subsystem_device_id << 16) & 0xffff0000) |
7475e5c880d1SStephen M. Cameron 		    subsystem_vendor_id;
7476e5c880d1SStephen M. Cameron 
7477e5c880d1SStephen M. Cameron 	for (i = 0; i < ARRAY_SIZE(products); i++)
7478e5c880d1SStephen M. Cameron 		if (*board_id == products[i].board_id)
7479e5c880d1SStephen M. Cameron 			return i;
7480e5c880d1SStephen M. Cameron 
74816798cc0aSStephen M. Cameron 	if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
74826798cc0aSStephen M. Cameron 		subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
74836798cc0aSStephen M. Cameron 		!hpsa_allow_any) {
7484e5c880d1SStephen M. Cameron 		dev_warn(&pdev->dev, "unrecognized board ID: "
7485e5c880d1SStephen M. Cameron 			"0x%08x, ignoring.\n", *board_id);
7486e5c880d1SStephen M. Cameron 			return -ENODEV;
7487e5c880d1SStephen M. Cameron 	}
7488e5c880d1SStephen M. Cameron 	return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
7489e5c880d1SStephen M. Cameron }
7490e5c880d1SStephen M. Cameron 
74916f039790SGreg Kroah-Hartman static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
74923a7774ceSStephen M. Cameron 				    unsigned long *memory_bar)
74933a7774ceSStephen M. Cameron {
74943a7774ceSStephen M. Cameron 	int i;
74953a7774ceSStephen M. Cameron 
74963a7774ceSStephen M. Cameron 	for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
749712d2cd47SStephen M. Cameron 		if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
74983a7774ceSStephen M. Cameron 			/* addressing mode bits already removed */
749912d2cd47SStephen M. Cameron 			*memory_bar = pci_resource_start(pdev, i);
750012d2cd47SStephen M. Cameron 			dev_dbg(&pdev->dev, "memory BAR = %lx\n",
75013a7774ceSStephen M. Cameron 				*memory_bar);
75023a7774ceSStephen M. Cameron 			return 0;
75033a7774ceSStephen M. Cameron 		}
750412d2cd47SStephen M. Cameron 	dev_warn(&pdev->dev, "no memory BAR found\n");
75053a7774ceSStephen M. Cameron 	return -ENODEV;
75063a7774ceSStephen M. Cameron }
75073a7774ceSStephen M. Cameron 
75086f039790SGreg Kroah-Hartman static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
75096f039790SGreg Kroah-Hartman 				     int wait_for_ready)
75102c4c8c8bSStephen M. Cameron {
7511fe5389c8SStephen M. Cameron 	int i, iterations;
75122c4c8c8bSStephen M. Cameron 	u32 scratchpad;
7513fe5389c8SStephen M. Cameron 	if (wait_for_ready)
7514fe5389c8SStephen M. Cameron 		iterations = HPSA_BOARD_READY_ITERATIONS;
7515fe5389c8SStephen M. Cameron 	else
7516fe5389c8SStephen M. Cameron 		iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
75172c4c8c8bSStephen M. Cameron 
7518fe5389c8SStephen M. Cameron 	for (i = 0; i < iterations; i++) {
7519fe5389c8SStephen M. Cameron 		scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
7520fe5389c8SStephen M. Cameron 		if (wait_for_ready) {
75212c4c8c8bSStephen M. Cameron 			if (scratchpad == HPSA_FIRMWARE_READY)
75222c4c8c8bSStephen M. Cameron 				return 0;
7523fe5389c8SStephen M. Cameron 		} else {
7524fe5389c8SStephen M. Cameron 			if (scratchpad != HPSA_FIRMWARE_READY)
7525fe5389c8SStephen M. Cameron 				return 0;
7526fe5389c8SStephen M. Cameron 		}
75272c4c8c8bSStephen M. Cameron 		msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
75282c4c8c8bSStephen M. Cameron 	}
7529fe5389c8SStephen M. Cameron 	dev_warn(&pdev->dev, "board not ready, timed out.\n");
75302c4c8c8bSStephen M. Cameron 	return -ENODEV;
75312c4c8c8bSStephen M. Cameron }
75322c4c8c8bSStephen M. Cameron 
75336f039790SGreg Kroah-Hartman static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
75346f039790SGreg Kroah-Hartman 			       u32 *cfg_base_addr, u64 *cfg_base_addr_index,
7535a51fd47fSStephen M. Cameron 			       u64 *cfg_offset)
7536a51fd47fSStephen M. Cameron {
7537a51fd47fSStephen M. Cameron 	*cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
7538a51fd47fSStephen M. Cameron 	*cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
7539a51fd47fSStephen M. Cameron 	*cfg_base_addr &= (u32) 0x0000ffff;
7540a51fd47fSStephen M. Cameron 	*cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
7541a51fd47fSStephen M. Cameron 	if (*cfg_base_addr_index == -1) {
7542a51fd47fSStephen M. Cameron 		dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
7543a51fd47fSStephen M. Cameron 		return -ENODEV;
7544a51fd47fSStephen M. Cameron 	}
7545a51fd47fSStephen M. Cameron 	return 0;
7546a51fd47fSStephen M. Cameron }
7547a51fd47fSStephen M. Cameron 
7548195f2c65SRobert Elliott static void hpsa_free_cfgtables(struct ctlr_info *h)
7549195f2c65SRobert Elliott {
7550105a3dbcSRobert Elliott 	if (h->transtable) {
7551195f2c65SRobert Elliott 		iounmap(h->transtable);
7552105a3dbcSRobert Elliott 		h->transtable = NULL;
7553105a3dbcSRobert Elliott 	}
7554105a3dbcSRobert Elliott 	if (h->cfgtable) {
7555195f2c65SRobert Elliott 		iounmap(h->cfgtable);
7556105a3dbcSRobert Elliott 		h->cfgtable = NULL;
7557105a3dbcSRobert Elliott 	}
7558195f2c65SRobert Elliott }
7559195f2c65SRobert Elliott 
7560195f2c65SRobert Elliott /* Find and map CISS config table and transfer table
7561195f2c65SRobert Elliott + * several items must be unmapped (freed) later
7562195f2c65SRobert Elliott + * */
75636f039790SGreg Kroah-Hartman static int hpsa_find_cfgtables(struct ctlr_info *h)
7564edd16368SStephen M. Cameron {
756501a02ffcSStephen M. Cameron 	u64 cfg_offset;
756601a02ffcSStephen M. Cameron 	u32 cfg_base_addr;
756701a02ffcSStephen M. Cameron 	u64 cfg_base_addr_index;
7568303932fdSDon Brace 	u32 trans_offset;
7569a51fd47fSStephen M. Cameron 	int rc;
757077c4495cSStephen M. Cameron 
7571a51fd47fSStephen M. Cameron 	rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
7572a51fd47fSStephen M. Cameron 		&cfg_base_addr_index, &cfg_offset);
7573a51fd47fSStephen M. Cameron 	if (rc)
7574a51fd47fSStephen M. Cameron 		return rc;
757577c4495cSStephen M. Cameron 	h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
7576a51fd47fSStephen M. Cameron 		       cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
7577cd3c81c4SRobert Elliott 	if (!h->cfgtable) {
7578cd3c81c4SRobert Elliott 		dev_err(&h->pdev->dev, "Failed mapping cfgtable\n");
757977c4495cSStephen M. Cameron 		return -ENOMEM;
7580cd3c81c4SRobert Elliott 	}
7581580ada3cSStephen M. Cameron 	rc = write_driver_ver_to_cfgtable(h->cfgtable);
7582580ada3cSStephen M. Cameron 	if (rc)
7583580ada3cSStephen M. Cameron 		return rc;
758477c4495cSStephen M. Cameron 	/* Find performant mode table. */
7585a51fd47fSStephen M. Cameron 	trans_offset = readl(&h->cfgtable->TransMethodOffset);
758677c4495cSStephen M. Cameron 	h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
758777c4495cSStephen M. Cameron 				cfg_base_addr_index)+cfg_offset+trans_offset,
758877c4495cSStephen M. Cameron 				sizeof(*h->transtable));
7589195f2c65SRobert Elliott 	if (!h->transtable) {
7590195f2c65SRobert Elliott 		dev_err(&h->pdev->dev, "Failed mapping transfer table\n");
7591195f2c65SRobert Elliott 		hpsa_free_cfgtables(h);
759277c4495cSStephen M. Cameron 		return -ENOMEM;
7593195f2c65SRobert Elliott 	}
759477c4495cSStephen M. Cameron 	return 0;
759577c4495cSStephen M. Cameron }
759677c4495cSStephen M. Cameron 
75976f039790SGreg Kroah-Hartman static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
7598cba3d38bSStephen M. Cameron {
759941ce4c35SStephen Cameron #define MIN_MAX_COMMANDS 16
760041ce4c35SStephen Cameron 	BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS);
760141ce4c35SStephen Cameron 
760241ce4c35SStephen Cameron 	h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands);
760372ceeaecSStephen M. Cameron 
760472ceeaecSStephen M. Cameron 	/* Limit commands in memory limited kdump scenario. */
760572ceeaecSStephen M. Cameron 	if (reset_devices && h->max_commands > 32)
760672ceeaecSStephen M. Cameron 		h->max_commands = 32;
760772ceeaecSStephen M. Cameron 
760841ce4c35SStephen Cameron 	if (h->max_commands < MIN_MAX_COMMANDS) {
760941ce4c35SStephen Cameron 		dev_warn(&h->pdev->dev,
761041ce4c35SStephen Cameron 			"Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n",
761141ce4c35SStephen Cameron 			h->max_commands,
761241ce4c35SStephen Cameron 			MIN_MAX_COMMANDS);
761341ce4c35SStephen Cameron 		h->max_commands = MIN_MAX_COMMANDS;
7614cba3d38bSStephen M. Cameron 	}
7615cba3d38bSStephen M. Cameron }
7616cba3d38bSStephen M. Cameron 
7617c7ee65b3SWebb Scales /* If the controller reports that the total max sg entries is greater than 512,
7618c7ee65b3SWebb Scales  * then we know that chained SG blocks work.  (Original smart arrays did not
7619c7ee65b3SWebb Scales  * support chained SG blocks and would return zero for max sg entries.)
7620c7ee65b3SWebb Scales  */
7621c7ee65b3SWebb Scales static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h)
7622c7ee65b3SWebb Scales {
7623c7ee65b3SWebb Scales 	return h->maxsgentries > 512;
7624c7ee65b3SWebb Scales }
7625c7ee65b3SWebb Scales 
7626b93d7536SStephen M. Cameron /* Interrogate the hardware for some limits:
7627b93d7536SStephen M. Cameron  * max commands, max SG elements without chaining, and with chaining,
7628b93d7536SStephen M. Cameron  * SG chain block size, etc.
7629b93d7536SStephen M. Cameron  */
76306f039790SGreg Kroah-Hartman static void hpsa_find_board_params(struct ctlr_info *h)
7631b93d7536SStephen M. Cameron {
7632cba3d38bSStephen M. Cameron 	hpsa_get_max_perf_mode_cmds(h);
763345fcb86eSStephen Cameron 	h->nr_cmds = h->max_commands;
7634b93d7536SStephen M. Cameron 	h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
7635283b4a9bSStephen M. Cameron 	h->fw_support = readl(&(h->cfgtable->misc_fw_support));
7636c7ee65b3SWebb Scales 	if (hpsa_supports_chained_sg_blocks(h)) {
7637c7ee65b3SWebb Scales 		/* Limit in-command s/g elements to 32 save dma'able memory. */
7638b93d7536SStephen M. Cameron 		h->max_cmd_sg_entries = 32;
76391a63ea6fSWebb Scales 		h->chainsize = h->maxsgentries - h->max_cmd_sg_entries;
7640b93d7536SStephen M. Cameron 		h->maxsgentries--; /* save one for chain pointer */
7641b93d7536SStephen M. Cameron 	} else {
7642c7ee65b3SWebb Scales 		/*
7643c7ee65b3SWebb Scales 		 * Original smart arrays supported at most 31 s/g entries
7644c7ee65b3SWebb Scales 		 * embedded inline in the command (trying to use more
7645c7ee65b3SWebb Scales 		 * would lock up the controller)
7646c7ee65b3SWebb Scales 		 */
7647c7ee65b3SWebb Scales 		h->max_cmd_sg_entries = 31;
76481a63ea6fSWebb Scales 		h->maxsgentries = 31; /* default to traditional values */
7649c7ee65b3SWebb Scales 		h->chainsize = 0;
7650b93d7536SStephen M. Cameron 	}
765175167d2cSStephen M. Cameron 
765275167d2cSStephen M. Cameron 	/* Find out what task management functions are supported and cache */
765375167d2cSStephen M. Cameron 	h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags));
76540e7a7fceSScott Teel 	if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags))
76550e7a7fceSScott Teel 		dev_warn(&h->pdev->dev, "Physical aborts not supported\n");
76560e7a7fceSScott Teel 	if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
76570e7a7fceSScott Teel 		dev_warn(&h->pdev->dev, "Logical aborts not supported\n");
76588be986ccSStephen Cameron 	if (!(HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags))
76598be986ccSStephen Cameron 		dev_warn(&h->pdev->dev, "HP SSD Smart Path aborts not supported\n");
7660b93d7536SStephen M. Cameron }
7661b93d7536SStephen M. Cameron 
766276c46e49SStephen M. Cameron static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
766376c46e49SStephen M. Cameron {
76640fc9fd40SAkinobu Mita 	if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
7665050f7147SStephen Cameron 		dev_err(&h->pdev->dev, "not a valid CISS config table\n");
766676c46e49SStephen M. Cameron 		return false;
766776c46e49SStephen M. Cameron 	}
766876c46e49SStephen M. Cameron 	return true;
766976c46e49SStephen M. Cameron }
767076c46e49SStephen M. Cameron 
767197a5e98cSStephen M. Cameron static inline void hpsa_set_driver_support_bits(struct ctlr_info *h)
7672f7c39101SStephen M. Cameron {
767397a5e98cSStephen M. Cameron 	u32 driver_support;
7674f7c39101SStephen M. Cameron 
767597a5e98cSStephen M. Cameron 	driver_support = readl(&(h->cfgtable->driver_support));
76760b9e7b74SArnd Bergmann 	/* Need to enable prefetch in the SCSI core for 6400 in x86 */
76770b9e7b74SArnd Bergmann #ifdef CONFIG_X86
767897a5e98cSStephen M. Cameron 	driver_support |= ENABLE_SCSI_PREFETCH;
7679f7c39101SStephen M. Cameron #endif
768028e13446SStephen M. Cameron 	driver_support |= ENABLE_UNIT_ATTN;
768128e13446SStephen M. Cameron 	writel(driver_support, &(h->cfgtable->driver_support));
7682f7c39101SStephen M. Cameron }
7683f7c39101SStephen M. Cameron 
76843d0eab67SStephen M. Cameron /* Disable DMA prefetch for the P600.  Otherwise an ASIC bug may result
76853d0eab67SStephen M. Cameron  * in a prefetch beyond physical memory.
76863d0eab67SStephen M. Cameron  */
76873d0eab67SStephen M. Cameron static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
76883d0eab67SStephen M. Cameron {
76893d0eab67SStephen M. Cameron 	u32 dma_prefetch;
76903d0eab67SStephen M. Cameron 
76913d0eab67SStephen M. Cameron 	if (h->board_id != 0x3225103C)
76923d0eab67SStephen M. Cameron 		return;
76933d0eab67SStephen M. Cameron 	dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
76943d0eab67SStephen M. Cameron 	dma_prefetch |= 0x8000;
76953d0eab67SStephen M. Cameron 	writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
76963d0eab67SStephen M. Cameron }
76973d0eab67SStephen M. Cameron 
7698c706a795SRobert Elliott static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h)
769976438d08SStephen M. Cameron {
770076438d08SStephen M. Cameron 	int i;
770176438d08SStephen M. Cameron 	u32 doorbell_value;
770276438d08SStephen M. Cameron 	unsigned long flags;
770376438d08SStephen M. Cameron 	/* wait until the clear_event_notify bit 6 is cleared by controller. */
7704007e7aa9SRobert Elliott 	for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) {
770576438d08SStephen M. Cameron 		spin_lock_irqsave(&h->lock, flags);
770676438d08SStephen M. Cameron 		doorbell_value = readl(h->vaddr + SA5_DOORBELL);
770776438d08SStephen M. Cameron 		spin_unlock_irqrestore(&h->lock, flags);
770876438d08SStephen M. Cameron 		if (!(doorbell_value & DOORBELL_CLEAR_EVENTS))
7709c706a795SRobert Elliott 			goto done;
771076438d08SStephen M. Cameron 		/* delay and try again */
7711007e7aa9SRobert Elliott 		msleep(CLEAR_EVENT_WAIT_INTERVAL);
771276438d08SStephen M. Cameron 	}
7713c706a795SRobert Elliott 	return -ENODEV;
7714c706a795SRobert Elliott done:
7715c706a795SRobert Elliott 	return 0;
771676438d08SStephen M. Cameron }
771776438d08SStephen M. Cameron 
7718c706a795SRobert Elliott static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
7719eb6b2ae9SStephen M. Cameron {
7720eb6b2ae9SStephen M. Cameron 	int i;
77216eaf46fdSStephen M. Cameron 	u32 doorbell_value;
77226eaf46fdSStephen M. Cameron 	unsigned long flags;
7723eb6b2ae9SStephen M. Cameron 
7724eb6b2ae9SStephen M. Cameron 	/* under certain very rare conditions, this can take awhile.
7725eb6b2ae9SStephen M. Cameron 	 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
7726eb6b2ae9SStephen M. Cameron 	 * as we enter this code.)
7727eb6b2ae9SStephen M. Cameron 	 */
7728007e7aa9SRobert Elliott 	for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) {
772925163bd5SWebb Scales 		if (h->remove_in_progress)
773025163bd5SWebb Scales 			goto done;
77316eaf46fdSStephen M. Cameron 		spin_lock_irqsave(&h->lock, flags);
77326eaf46fdSStephen M. Cameron 		doorbell_value = readl(h->vaddr + SA5_DOORBELL);
77336eaf46fdSStephen M. Cameron 		spin_unlock_irqrestore(&h->lock, flags);
7734382be668SDan Carpenter 		if (!(doorbell_value & CFGTBL_ChangeReq))
7735c706a795SRobert Elliott 			goto done;
7736eb6b2ae9SStephen M. Cameron 		/* delay and try again */
7737007e7aa9SRobert Elliott 		msleep(MODE_CHANGE_WAIT_INTERVAL);
7738eb6b2ae9SStephen M. Cameron 	}
7739c706a795SRobert Elliott 	return -ENODEV;
7740c706a795SRobert Elliott done:
7741c706a795SRobert Elliott 	return 0;
77423f4336f3SStephen M. Cameron }
77433f4336f3SStephen M. Cameron 
7744c706a795SRobert Elliott /* return -ENODEV or other reason on error, 0 on success */
77456f039790SGreg Kroah-Hartman static int hpsa_enter_simple_mode(struct ctlr_info *h)
77463f4336f3SStephen M. Cameron {
77473f4336f3SStephen M. Cameron 	u32 trans_support;
77483f4336f3SStephen M. Cameron 
77493f4336f3SStephen M. Cameron 	trans_support = readl(&(h->cfgtable->TransportSupport));
77503f4336f3SStephen M. Cameron 	if (!(trans_support & SIMPLE_MODE))
77513f4336f3SStephen M. Cameron 		return -ENOTSUPP;
77523f4336f3SStephen M. Cameron 
77533f4336f3SStephen M. Cameron 	h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
7754283b4a9bSStephen M. Cameron 
77553f4336f3SStephen M. Cameron 	/* Update the field, and then ring the doorbell */
77563f4336f3SStephen M. Cameron 	writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
7757b9af4937SStephen M. Cameron 	writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
77583f4336f3SStephen M. Cameron 	writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
7759c706a795SRobert Elliott 	if (hpsa_wait_for_mode_change_ack(h))
7760c706a795SRobert Elliott 		goto error;
7761eb6b2ae9SStephen M. Cameron 	print_cfg_table(&h->pdev->dev, h->cfgtable);
7762283b4a9bSStephen M. Cameron 	if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple))
7763283b4a9bSStephen M. Cameron 		goto error;
7764960a30e7SStephen M. Cameron 	h->transMethod = CFGTBL_Trans_Simple;
7765eb6b2ae9SStephen M. Cameron 	return 0;
7766283b4a9bSStephen M. Cameron error:
7767050f7147SStephen Cameron 	dev_err(&h->pdev->dev, "failed to enter simple mode\n");
7768283b4a9bSStephen M. Cameron 	return -ENODEV;
7769eb6b2ae9SStephen M. Cameron }
7770eb6b2ae9SStephen M. Cameron 
7771195f2c65SRobert Elliott /* free items allocated or mapped by hpsa_pci_init */
7772195f2c65SRobert Elliott static void hpsa_free_pci_init(struct ctlr_info *h)
7773195f2c65SRobert Elliott {
7774195f2c65SRobert Elliott 	hpsa_free_cfgtables(h);			/* pci_init 4 */
7775195f2c65SRobert Elliott 	iounmap(h->vaddr);			/* pci_init 3 */
7776105a3dbcSRobert Elliott 	h->vaddr = NULL;
7777195f2c65SRobert Elliott 	hpsa_disable_interrupt_mode(h);		/* pci_init 2 */
7778943a7021SRobert Elliott 	/*
7779943a7021SRobert Elliott 	 * call pci_disable_device before pci_release_regions per
7780943a7021SRobert Elliott 	 * Documentation/PCI/pci.txt
7781943a7021SRobert Elliott 	 */
7782195f2c65SRobert Elliott 	pci_disable_device(h->pdev);		/* pci_init 1 */
7783943a7021SRobert Elliott 	pci_release_regions(h->pdev);		/* pci_init 2 */
7784195f2c65SRobert Elliott }
7785195f2c65SRobert Elliott 
7786195f2c65SRobert Elliott /* several items must be freed later */
77876f039790SGreg Kroah-Hartman static int hpsa_pci_init(struct ctlr_info *h)
778877c4495cSStephen M. Cameron {
7789eb6b2ae9SStephen M. Cameron 	int prod_index, err;
7790edd16368SStephen M. Cameron 
7791e5c880d1SStephen M. Cameron 	prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
7792e5c880d1SStephen M. Cameron 	if (prod_index < 0)
779360f923b9SRobert Elliott 		return prod_index;
7794e5c880d1SStephen M. Cameron 	h->product_name = products[prod_index].product_name;
7795e5c880d1SStephen M. Cameron 	h->access = *(products[prod_index].access);
7796e5c880d1SStephen M. Cameron 
77979b5c48c2SStephen Cameron 	h->needs_abort_tags_swizzled =
77989b5c48c2SStephen Cameron 		ctlr_needs_abort_tags_swizzled(h->board_id);
77999b5c48c2SStephen Cameron 
7800e5a44df8SMatthew Garrett 	pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
7801e5a44df8SMatthew Garrett 			       PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
7802e5a44df8SMatthew Garrett 
780355c06c71SStephen M. Cameron 	err = pci_enable_device(h->pdev);
7804edd16368SStephen M. Cameron 	if (err) {
7805195f2c65SRobert Elliott 		dev_err(&h->pdev->dev, "failed to enable PCI device\n");
7806943a7021SRobert Elliott 		pci_disable_device(h->pdev);
7807edd16368SStephen M. Cameron 		return err;
7808edd16368SStephen M. Cameron 	}
7809edd16368SStephen M. Cameron 
7810f79cfec6SStephen M. Cameron 	err = pci_request_regions(h->pdev, HPSA);
7811edd16368SStephen M. Cameron 	if (err) {
781255c06c71SStephen M. Cameron 		dev_err(&h->pdev->dev,
7813195f2c65SRobert Elliott 			"failed to obtain PCI resources\n");
7814943a7021SRobert Elliott 		pci_disable_device(h->pdev);
7815943a7021SRobert Elliott 		return err;
7816edd16368SStephen M. Cameron 	}
78174fa604e1SRobert Elliott 
78184fa604e1SRobert Elliott 	pci_set_master(h->pdev);
78194fa604e1SRobert Elliott 
78206b3f4c52SStephen M. Cameron 	hpsa_interrupt_mode(h);
782112d2cd47SStephen M. Cameron 	err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
78223a7774ceSStephen M. Cameron 	if (err)
7823195f2c65SRobert Elliott 		goto clean2;	/* intmode+region, pci */
7824edd16368SStephen M. Cameron 	h->vaddr = remap_pci_mem(h->paddr, 0x250);
7825204892e9SStephen M. Cameron 	if (!h->vaddr) {
7826195f2c65SRobert Elliott 		dev_err(&h->pdev->dev, "failed to remap PCI mem\n");
7827204892e9SStephen M. Cameron 		err = -ENOMEM;
7828195f2c65SRobert Elliott 		goto clean2;	/* intmode+region, pci */
7829204892e9SStephen M. Cameron 	}
7830fe5389c8SStephen M. Cameron 	err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
78312c4c8c8bSStephen M. Cameron 	if (err)
7832195f2c65SRobert Elliott 		goto clean3;	/* vaddr, intmode+region, pci */
783377c4495cSStephen M. Cameron 	err = hpsa_find_cfgtables(h);
783477c4495cSStephen M. Cameron 	if (err)
7835195f2c65SRobert Elliott 		goto clean3;	/* vaddr, intmode+region, pci */
7836b93d7536SStephen M. Cameron 	hpsa_find_board_params(h);
7837edd16368SStephen M. Cameron 
783876c46e49SStephen M. Cameron 	if (!hpsa_CISS_signature_present(h)) {
7839edd16368SStephen M. Cameron 		err = -ENODEV;
7840195f2c65SRobert Elliott 		goto clean4;	/* cfgtables, vaddr, intmode+region, pci */
7841edd16368SStephen M. Cameron 	}
784297a5e98cSStephen M. Cameron 	hpsa_set_driver_support_bits(h);
78433d0eab67SStephen M. Cameron 	hpsa_p600_dma_prefetch_quirk(h);
7844eb6b2ae9SStephen M. Cameron 	err = hpsa_enter_simple_mode(h);
7845eb6b2ae9SStephen M. Cameron 	if (err)
7846195f2c65SRobert Elliott 		goto clean4;	/* cfgtables, vaddr, intmode+region, pci */
7847edd16368SStephen M. Cameron 	return 0;
7848edd16368SStephen M. Cameron 
7849195f2c65SRobert Elliott clean4:	/* cfgtables, vaddr, intmode+region, pci */
7850195f2c65SRobert Elliott 	hpsa_free_cfgtables(h);
7851195f2c65SRobert Elliott clean3:	/* vaddr, intmode+region, pci */
7852204892e9SStephen M. Cameron 	iounmap(h->vaddr);
7853105a3dbcSRobert Elliott 	h->vaddr = NULL;
7854195f2c65SRobert Elliott clean2:	/* intmode+region, pci */
7855195f2c65SRobert Elliott 	hpsa_disable_interrupt_mode(h);
7856943a7021SRobert Elliott 	/*
7857943a7021SRobert Elliott 	 * call pci_disable_device before pci_release_regions per
7858943a7021SRobert Elliott 	 * Documentation/PCI/pci.txt
7859943a7021SRobert Elliott 	 */
7860195f2c65SRobert Elliott 	pci_disable_device(h->pdev);
7861943a7021SRobert Elliott 	pci_release_regions(h->pdev);
7862edd16368SStephen M. Cameron 	return err;
7863edd16368SStephen M. Cameron }
7864edd16368SStephen M. Cameron 
78656f039790SGreg Kroah-Hartman static void hpsa_hba_inquiry(struct ctlr_info *h)
7866339b2b14SStephen M. Cameron {
7867339b2b14SStephen M. Cameron 	int rc;
7868339b2b14SStephen M. Cameron 
7869339b2b14SStephen M. Cameron #define HBA_INQUIRY_BYTE_COUNT 64
7870339b2b14SStephen M. Cameron 	h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
7871339b2b14SStephen M. Cameron 	if (!h->hba_inquiry_data)
7872339b2b14SStephen M. Cameron 		return;
7873339b2b14SStephen M. Cameron 	rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
7874339b2b14SStephen M. Cameron 		h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
7875339b2b14SStephen M. Cameron 	if (rc != 0) {
7876339b2b14SStephen M. Cameron 		kfree(h->hba_inquiry_data);
7877339b2b14SStephen M. Cameron 		h->hba_inquiry_data = NULL;
7878339b2b14SStephen M. Cameron 	}
7879339b2b14SStephen M. Cameron }
7880339b2b14SStephen M. Cameron 
78816b6c1cd7STomas Henzl static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id)
7882edd16368SStephen M. Cameron {
78831df8552aSStephen M. Cameron 	int rc, i;
78843b747298STomas Henzl 	void __iomem *vaddr;
7885edd16368SStephen M. Cameron 
78864c2a8c40SStephen M. Cameron 	if (!reset_devices)
78874c2a8c40SStephen M. Cameron 		return 0;
78884c2a8c40SStephen M. Cameron 
7889132aa220STomas Henzl 	/* kdump kernel is loading, we don't know in which state is
7890132aa220STomas Henzl 	 * the pci interface. The dev->enable_cnt is equal zero
7891132aa220STomas Henzl 	 * so we call enable+disable, wait a while and switch it on.
7892132aa220STomas Henzl 	 */
7893132aa220STomas Henzl 	rc = pci_enable_device(pdev);
7894132aa220STomas Henzl 	if (rc) {
7895132aa220STomas Henzl 		dev_warn(&pdev->dev, "Failed to enable PCI device\n");
7896132aa220STomas Henzl 		return -ENODEV;
7897132aa220STomas Henzl 	}
7898132aa220STomas Henzl 	pci_disable_device(pdev);
7899132aa220STomas Henzl 	msleep(260);			/* a randomly chosen number */
7900132aa220STomas Henzl 	rc = pci_enable_device(pdev);
7901132aa220STomas Henzl 	if (rc) {
7902132aa220STomas Henzl 		dev_warn(&pdev->dev, "failed to enable device.\n");
7903132aa220STomas Henzl 		return -ENODEV;
7904132aa220STomas Henzl 	}
79054fa604e1SRobert Elliott 
7906859c75abSTomas Henzl 	pci_set_master(pdev);
79074fa604e1SRobert Elliott 
79083b747298STomas Henzl 	vaddr = pci_ioremap_bar(pdev, 0);
79093b747298STomas Henzl 	if (vaddr == NULL) {
79103b747298STomas Henzl 		rc = -ENOMEM;
79113b747298STomas Henzl 		goto out_disable;
79123b747298STomas Henzl 	}
79133b747298STomas Henzl 	writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET);
79143b747298STomas Henzl 	iounmap(vaddr);
79153b747298STomas Henzl 
79161df8552aSStephen M. Cameron 	/* Reset the controller with a PCI power-cycle or via doorbell */
79176b6c1cd7STomas Henzl 	rc = hpsa_kdump_hard_reset_controller(pdev, board_id);
7918edd16368SStephen M. Cameron 
79191df8552aSStephen M. Cameron 	/* -ENOTSUPP here means we cannot reset the controller
79201df8552aSStephen M. Cameron 	 * but it's already (and still) up and running in
792118867659SStephen M. Cameron 	 * "performant mode".  Or, it might be 640x, which can't reset
792218867659SStephen M. Cameron 	 * due to concerns about shared bbwc between 6402/6404 pair.
79231df8552aSStephen M. Cameron 	 */
7924adf1b3a3SRobert Elliott 	if (rc)
7925132aa220STomas Henzl 		goto out_disable;
7926edd16368SStephen M. Cameron 
7927edd16368SStephen M. Cameron 	/* Now try to get the controller to respond to a no-op */
79281ba66c9cSRobert Elliott 	dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n");
7929edd16368SStephen M. Cameron 	for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
7930edd16368SStephen M. Cameron 		if (hpsa_noop(pdev) == 0)
7931edd16368SStephen M. Cameron 			break;
7932edd16368SStephen M. Cameron 		else
7933edd16368SStephen M. Cameron 			dev_warn(&pdev->dev, "no-op failed%s\n",
7934edd16368SStephen M. Cameron 					(i < 11 ? "; re-trying" : ""));
7935edd16368SStephen M. Cameron 	}
7936132aa220STomas Henzl 
7937132aa220STomas Henzl out_disable:
7938132aa220STomas Henzl 
7939132aa220STomas Henzl 	pci_disable_device(pdev);
7940132aa220STomas Henzl 	return rc;
7941edd16368SStephen M. Cameron }
7942edd16368SStephen M. Cameron 
79431fb7c98aSRobert Elliott static void hpsa_free_cmd_pool(struct ctlr_info *h)
79441fb7c98aSRobert Elliott {
79451fb7c98aSRobert Elliott 	kfree(h->cmd_pool_bits);
7946105a3dbcSRobert Elliott 	h->cmd_pool_bits = NULL;
7947105a3dbcSRobert Elliott 	if (h->cmd_pool) {
79481fb7c98aSRobert Elliott 		pci_free_consistent(h->pdev,
79491fb7c98aSRobert Elliott 				h->nr_cmds * sizeof(struct CommandList),
79501fb7c98aSRobert Elliott 				h->cmd_pool,
79511fb7c98aSRobert Elliott 				h->cmd_pool_dhandle);
7952105a3dbcSRobert Elliott 		h->cmd_pool = NULL;
7953105a3dbcSRobert Elliott 		h->cmd_pool_dhandle = 0;
7954105a3dbcSRobert Elliott 	}
7955105a3dbcSRobert Elliott 	if (h->errinfo_pool) {
79561fb7c98aSRobert Elliott 		pci_free_consistent(h->pdev,
79571fb7c98aSRobert Elliott 				h->nr_cmds * sizeof(struct ErrorInfo),
79581fb7c98aSRobert Elliott 				h->errinfo_pool,
79591fb7c98aSRobert Elliott 				h->errinfo_pool_dhandle);
7960105a3dbcSRobert Elliott 		h->errinfo_pool = NULL;
7961105a3dbcSRobert Elliott 		h->errinfo_pool_dhandle = 0;
7962105a3dbcSRobert Elliott 	}
79631fb7c98aSRobert Elliott }
79641fb7c98aSRobert Elliott 
7965d37ffbe4SRobert Elliott static int hpsa_alloc_cmd_pool(struct ctlr_info *h)
79662e9d1b36SStephen M. Cameron {
79672e9d1b36SStephen M. Cameron 	h->cmd_pool_bits = kzalloc(
79682e9d1b36SStephen M. Cameron 		DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
79692e9d1b36SStephen M. Cameron 		sizeof(unsigned long), GFP_KERNEL);
79702e9d1b36SStephen M. Cameron 	h->cmd_pool = pci_alloc_consistent(h->pdev,
79712e9d1b36SStephen M. Cameron 		    h->nr_cmds * sizeof(*h->cmd_pool),
79722e9d1b36SStephen M. Cameron 		    &(h->cmd_pool_dhandle));
79732e9d1b36SStephen M. Cameron 	h->errinfo_pool = pci_alloc_consistent(h->pdev,
79742e9d1b36SStephen M. Cameron 		    h->nr_cmds * sizeof(*h->errinfo_pool),
79752e9d1b36SStephen M. Cameron 		    &(h->errinfo_pool_dhandle));
79762e9d1b36SStephen M. Cameron 	if ((h->cmd_pool_bits == NULL)
79772e9d1b36SStephen M. Cameron 	    || (h->cmd_pool == NULL)
79782e9d1b36SStephen M. Cameron 	    || (h->errinfo_pool == NULL)) {
79792e9d1b36SStephen M. Cameron 		dev_err(&h->pdev->dev, "out of memory in %s", __func__);
79802c143342SRobert Elliott 		goto clean_up;
79812e9d1b36SStephen M. Cameron 	}
7982360c73bdSStephen Cameron 	hpsa_preinitialize_commands(h);
79832e9d1b36SStephen M. Cameron 	return 0;
79842c143342SRobert Elliott clean_up:
79852c143342SRobert Elliott 	hpsa_free_cmd_pool(h);
79862c143342SRobert Elliott 	return -ENOMEM;
79872e9d1b36SStephen M. Cameron }
79882e9d1b36SStephen M. Cameron 
798941b3cf08SStephen M. Cameron static void hpsa_irq_affinity_hints(struct ctlr_info *h)
799041b3cf08SStephen M. Cameron {
7991ec429952SFabian Frederick 	int i, cpu;
799241b3cf08SStephen M. Cameron 
799341b3cf08SStephen M. Cameron 	cpu = cpumask_first(cpu_online_mask);
799441b3cf08SStephen M. Cameron 	for (i = 0; i < h->msix_vector; i++) {
7995ec429952SFabian Frederick 		irq_set_affinity_hint(h->intr[i], get_cpu_mask(cpu));
799641b3cf08SStephen M. Cameron 		cpu = cpumask_next(cpu, cpu_online_mask);
799741b3cf08SStephen M. Cameron 	}
799841b3cf08SStephen M. Cameron }
799941b3cf08SStephen M. Cameron 
8000ec501a18SRobert Elliott /* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */
8001ec501a18SRobert Elliott static void hpsa_free_irqs(struct ctlr_info *h)
8002ec501a18SRobert Elliott {
8003ec501a18SRobert Elliott 	int i;
8004ec501a18SRobert Elliott 
8005ec501a18SRobert Elliott 	if (!h->msix_vector || h->intr_mode != PERF_MODE_INT) {
8006ec501a18SRobert Elliott 		/* Single reply queue, only one irq to free */
8007ec501a18SRobert Elliott 		i = h->intr_mode;
8008ec501a18SRobert Elliott 		irq_set_affinity_hint(h->intr[i], NULL);
8009ec501a18SRobert Elliott 		free_irq(h->intr[i], &h->q[i]);
8010105a3dbcSRobert Elliott 		h->q[i] = 0;
8011ec501a18SRobert Elliott 		return;
8012ec501a18SRobert Elliott 	}
8013ec501a18SRobert Elliott 
8014ec501a18SRobert Elliott 	for (i = 0; i < h->msix_vector; i++) {
8015ec501a18SRobert Elliott 		irq_set_affinity_hint(h->intr[i], NULL);
8016ec501a18SRobert Elliott 		free_irq(h->intr[i], &h->q[i]);
8017105a3dbcSRobert Elliott 		h->q[i] = 0;
8018ec501a18SRobert Elliott 	}
8019a4e17fc1SRobert Elliott 	for (; i < MAX_REPLY_QUEUES; i++)
8020a4e17fc1SRobert Elliott 		h->q[i] = 0;
8021ec501a18SRobert Elliott }
8022ec501a18SRobert Elliott 
80239ee61794SRobert Elliott /* returns 0 on success; cleans up and returns -Enn on error */
80249ee61794SRobert Elliott static int hpsa_request_irqs(struct ctlr_info *h,
80250ae01a32SStephen M. Cameron 	irqreturn_t (*msixhandler)(int, void *),
80260ae01a32SStephen M. Cameron 	irqreturn_t (*intxhandler)(int, void *))
80270ae01a32SStephen M. Cameron {
8028254f796bSMatt Gates 	int rc, i;
80290ae01a32SStephen M. Cameron 
8030254f796bSMatt Gates 	/*
8031254f796bSMatt Gates 	 * initialize h->q[x] = x so that interrupt handlers know which
8032254f796bSMatt Gates 	 * queue to process.
8033254f796bSMatt Gates 	 */
8034254f796bSMatt Gates 	for (i = 0; i < MAX_REPLY_QUEUES; i++)
8035254f796bSMatt Gates 		h->q[i] = (u8) i;
8036254f796bSMatt Gates 
8037eee0f03aSHannes Reinecke 	if (h->intr_mode == PERF_MODE_INT && h->msix_vector > 0) {
8038254f796bSMatt Gates 		/* If performant mode and MSI-X, use multiple reply queues */
8039a4e17fc1SRobert Elliott 		for (i = 0; i < h->msix_vector; i++) {
80408b47004aSRobert Elliott 			sprintf(h->intrname[i], "%s-msix%d", h->devname, i);
8041254f796bSMatt Gates 			rc = request_irq(h->intr[i], msixhandler,
80428b47004aSRobert Elliott 					0, h->intrname[i],
8043254f796bSMatt Gates 					&h->q[i]);
8044a4e17fc1SRobert Elliott 			if (rc) {
8045a4e17fc1SRobert Elliott 				int j;
8046a4e17fc1SRobert Elliott 
8047a4e17fc1SRobert Elliott 				dev_err(&h->pdev->dev,
8048a4e17fc1SRobert Elliott 					"failed to get irq %d for %s\n",
8049a4e17fc1SRobert Elliott 				       h->intr[i], h->devname);
8050a4e17fc1SRobert Elliott 				for (j = 0; j < i; j++) {
8051a4e17fc1SRobert Elliott 					free_irq(h->intr[j], &h->q[j]);
8052a4e17fc1SRobert Elliott 					h->q[j] = 0;
8053a4e17fc1SRobert Elliott 				}
8054a4e17fc1SRobert Elliott 				for (; j < MAX_REPLY_QUEUES; j++)
8055a4e17fc1SRobert Elliott 					h->q[j] = 0;
8056a4e17fc1SRobert Elliott 				return rc;
8057a4e17fc1SRobert Elliott 			}
8058a4e17fc1SRobert Elliott 		}
805941b3cf08SStephen M. Cameron 		hpsa_irq_affinity_hints(h);
8060254f796bSMatt Gates 	} else {
8061254f796bSMatt Gates 		/* Use single reply pool */
8062eee0f03aSHannes Reinecke 		if (h->msix_vector > 0 || h->msi_vector) {
80638b47004aSRobert Elliott 			if (h->msix_vector)
80648b47004aSRobert Elliott 				sprintf(h->intrname[h->intr_mode],
80658b47004aSRobert Elliott 					"%s-msix", h->devname);
80668b47004aSRobert Elliott 			else
80678b47004aSRobert Elliott 				sprintf(h->intrname[h->intr_mode],
80688b47004aSRobert Elliott 					"%s-msi", h->devname);
8069254f796bSMatt Gates 			rc = request_irq(h->intr[h->intr_mode],
80708b47004aSRobert Elliott 				msixhandler, 0,
80718b47004aSRobert Elliott 				h->intrname[h->intr_mode],
8072254f796bSMatt Gates 				&h->q[h->intr_mode]);
8073254f796bSMatt Gates 		} else {
80748b47004aSRobert Elliott 			sprintf(h->intrname[h->intr_mode],
80758b47004aSRobert Elliott 				"%s-intx", h->devname);
8076254f796bSMatt Gates 			rc = request_irq(h->intr[h->intr_mode],
80778b47004aSRobert Elliott 				intxhandler, IRQF_SHARED,
80788b47004aSRobert Elliott 				h->intrname[h->intr_mode],
8079254f796bSMatt Gates 				&h->q[h->intr_mode]);
8080254f796bSMatt Gates 		}
8081105a3dbcSRobert Elliott 		irq_set_affinity_hint(h->intr[h->intr_mode], NULL);
8082254f796bSMatt Gates 	}
80830ae01a32SStephen M. Cameron 	if (rc) {
8084195f2c65SRobert Elliott 		dev_err(&h->pdev->dev, "failed to get irq %d for %s\n",
80850ae01a32SStephen M. Cameron 		       h->intr[h->intr_mode], h->devname);
8086195f2c65SRobert Elliott 		hpsa_free_irqs(h);
80870ae01a32SStephen M. Cameron 		return -ENODEV;
80880ae01a32SStephen M. Cameron 	}
80890ae01a32SStephen M. Cameron 	return 0;
80900ae01a32SStephen M. Cameron }
80910ae01a32SStephen M. Cameron 
80926f039790SGreg Kroah-Hartman static int hpsa_kdump_soft_reset(struct ctlr_info *h)
809364670ac8SStephen M. Cameron {
809439c53f55SRobert Elliott 	int rc;
8095bf43caf3SRobert Elliott 	hpsa_send_host_reset(h, RAID_CTLR_LUNID, HPSA_RESET_TYPE_CONTROLLER);
809664670ac8SStephen M. Cameron 
809764670ac8SStephen M. Cameron 	dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
809839c53f55SRobert Elliott 	rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY);
809939c53f55SRobert Elliott 	if (rc) {
810064670ac8SStephen M. Cameron 		dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
810139c53f55SRobert Elliott 		return rc;
810264670ac8SStephen M. Cameron 	}
810364670ac8SStephen M. Cameron 
810464670ac8SStephen M. Cameron 	dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
810539c53f55SRobert Elliott 	rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
810639c53f55SRobert Elliott 	if (rc) {
810764670ac8SStephen M. Cameron 		dev_warn(&h->pdev->dev, "Board failed to become ready "
810864670ac8SStephen M. Cameron 			"after soft reset.\n");
810939c53f55SRobert Elliott 		return rc;
811064670ac8SStephen M. Cameron 	}
811164670ac8SStephen M. Cameron 
811264670ac8SStephen M. Cameron 	return 0;
811364670ac8SStephen M. Cameron }
811464670ac8SStephen M. Cameron 
8115072b0518SStephen M. Cameron static void hpsa_free_reply_queues(struct ctlr_info *h)
8116072b0518SStephen M. Cameron {
8117072b0518SStephen M. Cameron 	int i;
8118072b0518SStephen M. Cameron 
8119072b0518SStephen M. Cameron 	for (i = 0; i < h->nreply_queues; i++) {
8120072b0518SStephen M. Cameron 		if (!h->reply_queue[i].head)
8121072b0518SStephen M. Cameron 			continue;
81221fb7c98aSRobert Elliott 		pci_free_consistent(h->pdev,
81231fb7c98aSRobert Elliott 					h->reply_queue_size,
81241fb7c98aSRobert Elliott 					h->reply_queue[i].head,
81251fb7c98aSRobert Elliott 					h->reply_queue[i].busaddr);
8126072b0518SStephen M. Cameron 		h->reply_queue[i].head = NULL;
8127072b0518SStephen M. Cameron 		h->reply_queue[i].busaddr = 0;
8128072b0518SStephen M. Cameron 	}
8129105a3dbcSRobert Elliott 	h->reply_queue_size = 0;
8130072b0518SStephen M. Cameron }
8131072b0518SStephen M. Cameron 
81320097f0f4SStephen M. Cameron static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
81330097f0f4SStephen M. Cameron {
8134105a3dbcSRobert Elliott 	hpsa_free_performant_mode(h);		/* init_one 7 */
8135105a3dbcSRobert Elliott 	hpsa_free_sg_chain_blocks(h);		/* init_one 6 */
8136105a3dbcSRobert Elliott 	hpsa_free_cmd_pool(h);			/* init_one 5 */
8137105a3dbcSRobert Elliott 	hpsa_free_irqs(h);			/* init_one 4 */
81382946e82bSRobert Elliott 	scsi_host_put(h->scsi_host);		/* init_one 3 */
81392946e82bSRobert Elliott 	h->scsi_host = NULL;			/* init_one 3 */
81402946e82bSRobert Elliott 	hpsa_free_pci_init(h);			/* init_one 2_5 */
81419ecd953aSRobert Elliott 	free_percpu(h->lockup_detected);	/* init_one 2 */
81429ecd953aSRobert Elliott 	h->lockup_detected = NULL;		/* init_one 2 */
81439ecd953aSRobert Elliott 	if (h->resubmit_wq) {
81449ecd953aSRobert Elliott 		destroy_workqueue(h->resubmit_wq);	/* init_one 1 */
81459ecd953aSRobert Elliott 		h->resubmit_wq = NULL;
81469ecd953aSRobert Elliott 	}
81479ecd953aSRobert Elliott 	if (h->rescan_ctlr_wq) {
81489ecd953aSRobert Elliott 		destroy_workqueue(h->rescan_ctlr_wq);
81499ecd953aSRobert Elliott 		h->rescan_ctlr_wq = NULL;
81509ecd953aSRobert Elliott 	}
8151105a3dbcSRobert Elliott 	kfree(h);				/* init_one 1 */
815264670ac8SStephen M. Cameron }
815364670ac8SStephen M. Cameron 
8154a0c12413SStephen M. Cameron /* Called when controller lockup detected. */
8155f2405db8SDon Brace static void fail_all_outstanding_cmds(struct ctlr_info *h)
8156a0c12413SStephen M. Cameron {
8157281a7fd0SWebb Scales 	int i, refcount;
8158281a7fd0SWebb Scales 	struct CommandList *c;
815925163bd5SWebb Scales 	int failcount = 0;
8160a0c12413SStephen M. Cameron 
8161080ef1ccSDon Brace 	flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */
8162f2405db8SDon Brace 	for (i = 0; i < h->nr_cmds; i++) {
8163f2405db8SDon Brace 		c = h->cmd_pool + i;
8164281a7fd0SWebb Scales 		refcount = atomic_inc_return(&c->refcount);
8165281a7fd0SWebb Scales 		if (refcount > 1) {
816625163bd5SWebb Scales 			c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
81675a3d16f5SStephen M. Cameron 			finish_cmd(c);
8168433b5f4dSStephen Cameron 			atomic_dec(&h->commands_outstanding);
816925163bd5SWebb Scales 			failcount++;
8170a0c12413SStephen M. Cameron 		}
8171281a7fd0SWebb Scales 		cmd_free(h, c);
8172281a7fd0SWebb Scales 	}
817325163bd5SWebb Scales 	dev_warn(&h->pdev->dev,
817425163bd5SWebb Scales 		"failed %d commands in fail_all\n", failcount);
8175a0c12413SStephen M. Cameron }
8176a0c12413SStephen M. Cameron 
8177094963daSStephen M. Cameron static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value)
8178094963daSStephen M. Cameron {
8179c8ed0010SRusty Russell 	int cpu;
8180094963daSStephen M. Cameron 
8181c8ed0010SRusty Russell 	for_each_online_cpu(cpu) {
8182094963daSStephen M. Cameron 		u32 *lockup_detected;
8183094963daSStephen M. Cameron 		lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
8184094963daSStephen M. Cameron 		*lockup_detected = value;
8185094963daSStephen M. Cameron 	}
8186094963daSStephen M. Cameron 	wmb(); /* be sure the per-cpu variables are out to memory */
8187094963daSStephen M. Cameron }
8188094963daSStephen M. Cameron 
8189a0c12413SStephen M. Cameron static void controller_lockup_detected(struct ctlr_info *h)
8190a0c12413SStephen M. Cameron {
8191a0c12413SStephen M. Cameron 	unsigned long flags;
8192094963daSStephen M. Cameron 	u32 lockup_detected;
8193a0c12413SStephen M. Cameron 
8194a0c12413SStephen M. Cameron 	h->access.set_intr_mask(h, HPSA_INTR_OFF);
8195a0c12413SStephen M. Cameron 	spin_lock_irqsave(&h->lock, flags);
8196094963daSStephen M. Cameron 	lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
8197094963daSStephen M. Cameron 	if (!lockup_detected) {
8198094963daSStephen M. Cameron 		/* no heartbeat, but controller gave us a zero. */
8199094963daSStephen M. Cameron 		dev_warn(&h->pdev->dev,
820025163bd5SWebb Scales 			"lockup detected after %d but scratchpad register is zero\n",
820125163bd5SWebb Scales 			h->heartbeat_sample_interval / HZ);
8202094963daSStephen M. Cameron 		lockup_detected = 0xffffffff;
8203094963daSStephen M. Cameron 	}
8204094963daSStephen M. Cameron 	set_lockup_detected_for_all_cpus(h, lockup_detected);
8205a0c12413SStephen M. Cameron 	spin_unlock_irqrestore(&h->lock, flags);
820625163bd5SWebb Scales 	dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n",
820725163bd5SWebb Scales 			lockup_detected, h->heartbeat_sample_interval / HZ);
8208a0c12413SStephen M. Cameron 	pci_disable_device(h->pdev);
8209f2405db8SDon Brace 	fail_all_outstanding_cmds(h);
8210a0c12413SStephen M. Cameron }
8211a0c12413SStephen M. Cameron 
821225163bd5SWebb Scales static int detect_controller_lockup(struct ctlr_info *h)
8213a0c12413SStephen M. Cameron {
8214a0c12413SStephen M. Cameron 	u64 now;
8215a0c12413SStephen M. Cameron 	u32 heartbeat;
8216a0c12413SStephen M. Cameron 	unsigned long flags;
8217a0c12413SStephen M. Cameron 
8218a0c12413SStephen M. Cameron 	now = get_jiffies_64();
8219a0c12413SStephen M. Cameron 	/* If we've received an interrupt recently, we're ok. */
8220a0c12413SStephen M. Cameron 	if (time_after64(h->last_intr_timestamp +
8221e85c5974SStephen M. Cameron 				(h->heartbeat_sample_interval), now))
822225163bd5SWebb Scales 		return false;
8223a0c12413SStephen M. Cameron 
8224a0c12413SStephen M. Cameron 	/*
8225a0c12413SStephen M. Cameron 	 * If we've already checked the heartbeat recently, we're ok.
8226a0c12413SStephen M. Cameron 	 * This could happen if someone sends us a signal. We
8227a0c12413SStephen M. Cameron 	 * otherwise don't care about signals in this thread.
8228a0c12413SStephen M. Cameron 	 */
8229a0c12413SStephen M. Cameron 	if (time_after64(h->last_heartbeat_timestamp +
8230e85c5974SStephen M. Cameron 				(h->heartbeat_sample_interval), now))
823125163bd5SWebb Scales 		return false;
8232a0c12413SStephen M. Cameron 
8233a0c12413SStephen M. Cameron 	/* If heartbeat has not changed since we last looked, we're not ok. */
8234a0c12413SStephen M. Cameron 	spin_lock_irqsave(&h->lock, flags);
8235a0c12413SStephen M. Cameron 	heartbeat = readl(&h->cfgtable->HeartBeat);
8236a0c12413SStephen M. Cameron 	spin_unlock_irqrestore(&h->lock, flags);
8237a0c12413SStephen M. Cameron 	if (h->last_heartbeat == heartbeat) {
8238a0c12413SStephen M. Cameron 		controller_lockup_detected(h);
823925163bd5SWebb Scales 		return true;
8240a0c12413SStephen M. Cameron 	}
8241a0c12413SStephen M. Cameron 
8242a0c12413SStephen M. Cameron 	/* We're ok. */
8243a0c12413SStephen M. Cameron 	h->last_heartbeat = heartbeat;
8244a0c12413SStephen M. Cameron 	h->last_heartbeat_timestamp = now;
824525163bd5SWebb Scales 	return false;
8246a0c12413SStephen M. Cameron }
8247a0c12413SStephen M. Cameron 
82489846590eSStephen M. Cameron static void hpsa_ack_ctlr_events(struct ctlr_info *h)
824976438d08SStephen M. Cameron {
825076438d08SStephen M. Cameron 	int i;
825176438d08SStephen M. Cameron 	char *event_type;
825276438d08SStephen M. Cameron 
8253e4aa3e6aSStephen Cameron 	if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
8254e4aa3e6aSStephen Cameron 		return;
8255e4aa3e6aSStephen Cameron 
825676438d08SStephen M. Cameron 	/* Ask the controller to clear the events we're handling. */
82571f7cee8cSStephen M. Cameron 	if ((h->transMethod & (CFGTBL_Trans_io_accel1
82581f7cee8cSStephen M. Cameron 			| CFGTBL_Trans_io_accel2)) &&
825976438d08SStephen M. Cameron 		(h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE ||
826076438d08SStephen M. Cameron 		 h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) {
826176438d08SStephen M. Cameron 
826276438d08SStephen M. Cameron 		if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE)
826376438d08SStephen M. Cameron 			event_type = "state change";
826476438d08SStephen M. Cameron 		if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)
826576438d08SStephen M. Cameron 			event_type = "configuration change";
826676438d08SStephen M. Cameron 		/* Stop sending new RAID offload reqs via the IO accelerator */
826776438d08SStephen M. Cameron 		scsi_block_requests(h->scsi_host);
826876438d08SStephen M. Cameron 		for (i = 0; i < h->ndevices; i++)
826976438d08SStephen M. Cameron 			h->dev[i]->offload_enabled = 0;
827023100dd9SStephen M. Cameron 		hpsa_drain_accel_commands(h);
827176438d08SStephen M. Cameron 		/* Set 'accelerator path config change' bit */
827276438d08SStephen M. Cameron 		dev_warn(&h->pdev->dev,
827376438d08SStephen M. Cameron 			"Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n",
827476438d08SStephen M. Cameron 			h->events, event_type);
827576438d08SStephen M. Cameron 		writel(h->events, &(h->cfgtable->clear_event_notify));
827676438d08SStephen M. Cameron 		/* Set the "clear event notify field update" bit 6 */
827776438d08SStephen M. Cameron 		writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
827876438d08SStephen M. Cameron 		/* Wait until ctlr clears 'clear event notify field', bit 6 */
827976438d08SStephen M. Cameron 		hpsa_wait_for_clear_event_notify_ack(h);
828076438d08SStephen M. Cameron 		scsi_unblock_requests(h->scsi_host);
828176438d08SStephen M. Cameron 	} else {
828276438d08SStephen M. Cameron 		/* Acknowledge controller notification events. */
828376438d08SStephen M. Cameron 		writel(h->events, &(h->cfgtable->clear_event_notify));
828476438d08SStephen M. Cameron 		writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
828576438d08SStephen M. Cameron 		hpsa_wait_for_clear_event_notify_ack(h);
828676438d08SStephen M. Cameron #if 0
828776438d08SStephen M. Cameron 		writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
828876438d08SStephen M. Cameron 		hpsa_wait_for_mode_change_ack(h);
828976438d08SStephen M. Cameron #endif
829076438d08SStephen M. Cameron 	}
82919846590eSStephen M. Cameron 	return;
829276438d08SStephen M. Cameron }
829376438d08SStephen M. Cameron 
829476438d08SStephen M. Cameron /* Check a register on the controller to see if there are configuration
829576438d08SStephen M. Cameron  * changes (added/changed/removed logical drives, etc.) which mean that
8296e863d68eSScott Teel  * we should rescan the controller for devices.
8297e863d68eSScott Teel  * Also check flag for driver-initiated rescan.
829876438d08SStephen M. Cameron  */
82999846590eSStephen M. Cameron static int hpsa_ctlr_needs_rescan(struct ctlr_info *h)
830076438d08SStephen M. Cameron {
8301853633e8SDon Brace 	if (h->drv_req_rescan) {
8302853633e8SDon Brace 		h->drv_req_rescan = 0;
8303853633e8SDon Brace 		return 1;
8304853633e8SDon Brace 	}
8305853633e8SDon Brace 
830676438d08SStephen M. Cameron 	if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
83079846590eSStephen M. Cameron 		return 0;
830876438d08SStephen M. Cameron 
830976438d08SStephen M. Cameron 	h->events = readl(&(h->cfgtable->event_notify));
83109846590eSStephen M. Cameron 	return h->events & RESCAN_REQUIRED_EVENT_BITS;
83119846590eSStephen M. Cameron }
831276438d08SStephen M. Cameron 
831376438d08SStephen M. Cameron /*
83149846590eSStephen M. Cameron  * Check if any of the offline devices have become ready
831576438d08SStephen M. Cameron  */
83169846590eSStephen M. Cameron static int hpsa_offline_devices_ready(struct ctlr_info *h)
83179846590eSStephen M. Cameron {
83189846590eSStephen M. Cameron 	unsigned long flags;
83199846590eSStephen M. Cameron 	struct offline_device_entry *d;
83209846590eSStephen M. Cameron 	struct list_head *this, *tmp;
83219846590eSStephen M. Cameron 
83229846590eSStephen M. Cameron 	spin_lock_irqsave(&h->offline_device_lock, flags);
83239846590eSStephen M. Cameron 	list_for_each_safe(this, tmp, &h->offline_device_list) {
83249846590eSStephen M. Cameron 		d = list_entry(this, struct offline_device_entry,
83259846590eSStephen M. Cameron 				offline_list);
83269846590eSStephen M. Cameron 		spin_unlock_irqrestore(&h->offline_device_lock, flags);
8327d1fea47cSStephen M. Cameron 		if (!hpsa_volume_offline(h, d->scsi3addr)) {
8328d1fea47cSStephen M. Cameron 			spin_lock_irqsave(&h->offline_device_lock, flags);
8329d1fea47cSStephen M. Cameron 			list_del(&d->offline_list);
8330d1fea47cSStephen M. Cameron 			spin_unlock_irqrestore(&h->offline_device_lock, flags);
83319846590eSStephen M. Cameron 			return 1;
8332d1fea47cSStephen M. Cameron 		}
83339846590eSStephen M. Cameron 		spin_lock_irqsave(&h->offline_device_lock, flags);
833476438d08SStephen M. Cameron 	}
83359846590eSStephen M. Cameron 	spin_unlock_irqrestore(&h->offline_device_lock, flags);
83369846590eSStephen M. Cameron 	return 0;
83379846590eSStephen M. Cameron }
83389846590eSStephen M. Cameron 
833934592254SScott Teel static int hpsa_luns_changed(struct ctlr_info *h)
834034592254SScott Teel {
834134592254SScott Teel 	int rc = 1; /* assume there are changes */
834234592254SScott Teel 	struct ReportLUNdata *logdev = NULL;
834334592254SScott Teel 
834434592254SScott Teel 	/* if we can't find out if lun data has changed,
834534592254SScott Teel 	 * assume that it has.
834634592254SScott Teel 	 */
834734592254SScott Teel 
834834592254SScott Teel 	if (!h->lastlogicals)
834934592254SScott Teel 		goto out;
835034592254SScott Teel 
835134592254SScott Teel 	logdev = kzalloc(sizeof(*logdev), GFP_KERNEL);
835234592254SScott Teel 	if (!logdev) {
835334592254SScott Teel 		dev_warn(&h->pdev->dev,
835434592254SScott Teel 			"Out of memory, can't track lun changes.\n");
835534592254SScott Teel 		goto out;
835634592254SScott Teel 	}
835734592254SScott Teel 	if (hpsa_scsi_do_report_luns(h, 1, logdev, sizeof(*logdev), 0)) {
835834592254SScott Teel 		dev_warn(&h->pdev->dev,
835934592254SScott Teel 			"report luns failed, can't track lun changes.\n");
836034592254SScott Teel 		goto out;
836134592254SScott Teel 	}
836234592254SScott Teel 	if (memcmp(logdev, h->lastlogicals, sizeof(*logdev))) {
836334592254SScott Teel 		dev_info(&h->pdev->dev,
836434592254SScott Teel 			"Lun changes detected.\n");
836534592254SScott Teel 		memcpy(h->lastlogicals, logdev, sizeof(*logdev));
836634592254SScott Teel 		goto out;
836734592254SScott Teel 	} else
836834592254SScott Teel 		rc = 0; /* no changes detected. */
836934592254SScott Teel out:
837034592254SScott Teel 	kfree(logdev);
837134592254SScott Teel 	return rc;
837234592254SScott Teel }
837334592254SScott Teel 
83746636e7f4SDon Brace static void hpsa_rescan_ctlr_worker(struct work_struct *work)
8375a0c12413SStephen M. Cameron {
8376a0c12413SStephen M. Cameron 	unsigned long flags;
83778a98db73SStephen M. Cameron 	struct ctlr_info *h = container_of(to_delayed_work(work),
83786636e7f4SDon Brace 					struct ctlr_info, rescan_ctlr_work);
83796636e7f4SDon Brace 
83806636e7f4SDon Brace 
83816636e7f4SDon Brace 	if (h->remove_in_progress)
83828a98db73SStephen M. Cameron 		return;
83839846590eSStephen M. Cameron 
83849846590eSStephen M. Cameron 	if (hpsa_ctlr_needs_rescan(h) || hpsa_offline_devices_ready(h)) {
83859846590eSStephen M. Cameron 		scsi_host_get(h->scsi_host);
83869846590eSStephen M. Cameron 		hpsa_ack_ctlr_events(h);
83879846590eSStephen M. Cameron 		hpsa_scan_start(h->scsi_host);
83889846590eSStephen M. Cameron 		scsi_host_put(h->scsi_host);
838934592254SScott Teel 	} else if (h->discovery_polling) {
8390c2adae44SScott Teel 		hpsa_disable_rld_caching(h);
839134592254SScott Teel 		if (hpsa_luns_changed(h)) {
839234592254SScott Teel 			struct Scsi_Host *sh = NULL;
839334592254SScott Teel 
839434592254SScott Teel 			dev_info(&h->pdev->dev,
839534592254SScott Teel 				"driver discovery polling rescan.\n");
839634592254SScott Teel 			sh = scsi_host_get(h->scsi_host);
839734592254SScott Teel 			if (sh != NULL) {
839834592254SScott Teel 				hpsa_scan_start(sh);
839934592254SScott Teel 				scsi_host_put(sh);
840034592254SScott Teel 			}
840134592254SScott Teel 		}
84029846590eSStephen M. Cameron 	}
84036636e7f4SDon Brace 	spin_lock_irqsave(&h->lock, flags);
84046636e7f4SDon Brace 	if (!h->remove_in_progress)
84056636e7f4SDon Brace 		queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
84066636e7f4SDon Brace 				h->heartbeat_sample_interval);
84076636e7f4SDon Brace 	spin_unlock_irqrestore(&h->lock, flags);
84086636e7f4SDon Brace }
84096636e7f4SDon Brace 
84106636e7f4SDon Brace static void hpsa_monitor_ctlr_worker(struct work_struct *work)
84116636e7f4SDon Brace {
84126636e7f4SDon Brace 	unsigned long flags;
84136636e7f4SDon Brace 	struct ctlr_info *h = container_of(to_delayed_work(work),
84146636e7f4SDon Brace 					struct ctlr_info, monitor_ctlr_work);
84156636e7f4SDon Brace 
84166636e7f4SDon Brace 	detect_controller_lockup(h);
84176636e7f4SDon Brace 	if (lockup_detected(h))
84186636e7f4SDon Brace 		return;
84199846590eSStephen M. Cameron 
84208a98db73SStephen M. Cameron 	spin_lock_irqsave(&h->lock, flags);
84216636e7f4SDon Brace 	if (!h->remove_in_progress)
84228a98db73SStephen M. Cameron 		schedule_delayed_work(&h->monitor_ctlr_work,
84238a98db73SStephen M. Cameron 				h->heartbeat_sample_interval);
84248a98db73SStephen M. Cameron 	spin_unlock_irqrestore(&h->lock, flags);
8425a0c12413SStephen M. Cameron }
8426a0c12413SStephen M. Cameron 
84276636e7f4SDon Brace static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h,
84286636e7f4SDon Brace 						char *name)
84296636e7f4SDon Brace {
84306636e7f4SDon Brace 	struct workqueue_struct *wq = NULL;
84316636e7f4SDon Brace 
8432397ea9cbSDon Brace 	wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr);
84336636e7f4SDon Brace 	if (!wq)
84346636e7f4SDon Brace 		dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name);
84356636e7f4SDon Brace 
84366636e7f4SDon Brace 	return wq;
84376636e7f4SDon Brace }
84386636e7f4SDon Brace 
84396f039790SGreg Kroah-Hartman static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
84404c2a8c40SStephen M. Cameron {
84414c2a8c40SStephen M. Cameron 	int dac, rc;
84424c2a8c40SStephen M. Cameron 	struct ctlr_info *h;
844364670ac8SStephen M. Cameron 	int try_soft_reset = 0;
844464670ac8SStephen M. Cameron 	unsigned long flags;
84456b6c1cd7STomas Henzl 	u32 board_id;
84464c2a8c40SStephen M. Cameron 
84474c2a8c40SStephen M. Cameron 	if (number_of_controllers == 0)
84484c2a8c40SStephen M. Cameron 		printk(KERN_INFO DRIVER_NAME "\n");
84494c2a8c40SStephen M. Cameron 
84506b6c1cd7STomas Henzl 	rc = hpsa_lookup_board_id(pdev, &board_id);
84516b6c1cd7STomas Henzl 	if (rc < 0) {
84526b6c1cd7STomas Henzl 		dev_warn(&pdev->dev, "Board ID not found\n");
84536b6c1cd7STomas Henzl 		return rc;
84546b6c1cd7STomas Henzl 	}
84556b6c1cd7STomas Henzl 
84566b6c1cd7STomas Henzl 	rc = hpsa_init_reset_devices(pdev, board_id);
845764670ac8SStephen M. Cameron 	if (rc) {
845864670ac8SStephen M. Cameron 		if (rc != -ENOTSUPP)
84594c2a8c40SStephen M. Cameron 			return rc;
846064670ac8SStephen M. Cameron 		/* If the reset fails in a particular way (it has no way to do
846164670ac8SStephen M. Cameron 		 * a proper hard reset, so returns -ENOTSUPP) we can try to do
846264670ac8SStephen M. Cameron 		 * a soft reset once we get the controller configured up to the
846364670ac8SStephen M. Cameron 		 * point that it can accept a command.
846464670ac8SStephen M. Cameron 		 */
846564670ac8SStephen M. Cameron 		try_soft_reset = 1;
846664670ac8SStephen M. Cameron 		rc = 0;
846764670ac8SStephen M. Cameron 	}
846864670ac8SStephen M. Cameron 
846964670ac8SStephen M. Cameron reinit_after_soft_reset:
84704c2a8c40SStephen M. Cameron 
8471303932fdSDon Brace 	/* Command structures must be aligned on a 32-byte boundary because
8472303932fdSDon Brace 	 * the 5 lower bits of the address are used by the hardware. and by
8473303932fdSDon Brace 	 * the driver.  See comments in hpsa.h for more info.
8474303932fdSDon Brace 	 */
8475303932fdSDon Brace 	BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
8476edd16368SStephen M. Cameron 	h = kzalloc(sizeof(*h), GFP_KERNEL);
8477105a3dbcSRobert Elliott 	if (!h) {
8478105a3dbcSRobert Elliott 		dev_err(&pdev->dev, "Failed to allocate controller head\n");
8479ecd9aad4SStephen M. Cameron 		return -ENOMEM;
8480105a3dbcSRobert Elliott 	}
8481edd16368SStephen M. Cameron 
848255c06c71SStephen M. Cameron 	h->pdev = pdev;
8483105a3dbcSRobert Elliott 
8484a9a3a273SStephen M. Cameron 	h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
84859846590eSStephen M. Cameron 	INIT_LIST_HEAD(&h->offline_device_list);
84866eaf46fdSStephen M. Cameron 	spin_lock_init(&h->lock);
84879846590eSStephen M. Cameron 	spin_lock_init(&h->offline_device_lock);
84886eaf46fdSStephen M. Cameron 	spin_lock_init(&h->scan_lock);
848934f0c627SDon Brace 	atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS);
84909b5c48c2SStephen Cameron 	atomic_set(&h->abort_cmds_available, HPSA_CMDS_RESERVED_FOR_ABORTS);
8491094963daSStephen M. Cameron 
8492094963daSStephen M. Cameron 	/* Allocate and clear per-cpu variable lockup_detected */
8493094963daSStephen M. Cameron 	h->lockup_detected = alloc_percpu(u32);
84942a5ac326SStephen M. Cameron 	if (!h->lockup_detected) {
8495105a3dbcSRobert Elliott 		dev_err(&h->pdev->dev, "Failed to allocate lockup detector\n");
84962a5ac326SStephen M. Cameron 		rc = -ENOMEM;
84972efa5929SRobert Elliott 		goto clean1;	/* aer/h */
84982a5ac326SStephen M. Cameron 	}
8499094963daSStephen M. Cameron 	set_lockup_detected_for_all_cpus(h, 0);
8500094963daSStephen M. Cameron 
850155c06c71SStephen M. Cameron 	rc = hpsa_pci_init(h);
8502105a3dbcSRobert Elliott 	if (rc)
85032946e82bSRobert Elliott 		goto clean2;	/* lu, aer/h */
8504edd16368SStephen M. Cameron 
85052946e82bSRobert Elliott 	/* relies on h-> settings made by hpsa_pci_init, including
85062946e82bSRobert Elliott 	 * interrupt_mode h->intr */
85072946e82bSRobert Elliott 	rc = hpsa_scsi_host_alloc(h);
85082946e82bSRobert Elliott 	if (rc)
85092946e82bSRobert Elliott 		goto clean2_5;	/* pci, lu, aer/h */
85102946e82bSRobert Elliott 
85112946e82bSRobert Elliott 	sprintf(h->devname, HPSA "%d", h->scsi_host->host_no);
8512edd16368SStephen M. Cameron 	h->ctlr = number_of_controllers;
8513edd16368SStephen M. Cameron 	number_of_controllers++;
8514edd16368SStephen M. Cameron 
8515edd16368SStephen M. Cameron 	/* configure PCI DMA stuff */
8516ecd9aad4SStephen M. Cameron 	rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
8517ecd9aad4SStephen M. Cameron 	if (rc == 0) {
8518edd16368SStephen M. Cameron 		dac = 1;
8519ecd9aad4SStephen M. Cameron 	} else {
8520ecd9aad4SStephen M. Cameron 		rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
8521ecd9aad4SStephen M. Cameron 		if (rc == 0) {
8522edd16368SStephen M. Cameron 			dac = 0;
8523ecd9aad4SStephen M. Cameron 		} else {
8524edd16368SStephen M. Cameron 			dev_err(&pdev->dev, "no suitable DMA available\n");
85252946e82bSRobert Elliott 			goto clean3;	/* shost, pci, lu, aer/h */
8526edd16368SStephen M. Cameron 		}
8527ecd9aad4SStephen M. Cameron 	}
8528edd16368SStephen M. Cameron 
8529edd16368SStephen M. Cameron 	/* make sure the board interrupts are off */
8530edd16368SStephen M. Cameron 	h->access.set_intr_mask(h, HPSA_INTR_OFF);
853110f66018SStephen M. Cameron 
8532105a3dbcSRobert Elliott 	rc = hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx);
8533105a3dbcSRobert Elliott 	if (rc)
85342946e82bSRobert Elliott 		goto clean3;	/* shost, pci, lu, aer/h */
8535d37ffbe4SRobert Elliott 	rc = hpsa_alloc_cmd_pool(h);
85368947fd10SRobert Elliott 	if (rc)
85372946e82bSRobert Elliott 		goto clean4;	/* irq, shost, pci, lu, aer/h */
8538105a3dbcSRobert Elliott 	rc = hpsa_alloc_sg_chain_blocks(h);
8539105a3dbcSRobert Elliott 	if (rc)
85402946e82bSRobert Elliott 		goto clean5;	/* cmd, irq, shost, pci, lu, aer/h */
8541a08a8471SStephen M. Cameron 	init_waitqueue_head(&h->scan_wait_queue);
85429b5c48c2SStephen Cameron 	init_waitqueue_head(&h->abort_cmd_wait_queue);
8543d604f533SWebb Scales 	init_waitqueue_head(&h->event_sync_wait_queue);
8544d604f533SWebb Scales 	mutex_init(&h->reset_mutex);
8545a08a8471SStephen M. Cameron 	h->scan_finished = 1; /* no scan currently in progress */
8546edd16368SStephen M. Cameron 
8547edd16368SStephen M. Cameron 	pci_set_drvdata(pdev, h);
85489a41338eSStephen M. Cameron 	h->ndevices = 0;
85492946e82bSRobert Elliott 
85509a41338eSStephen M. Cameron 	spin_lock_init(&h->devlock);
8551105a3dbcSRobert Elliott 	rc = hpsa_put_ctlr_into_performant_mode(h);
8552105a3dbcSRobert Elliott 	if (rc)
85532946e82bSRobert Elliott 		goto clean6; /* sg, cmd, irq, shost, pci, lu, aer/h */
85542946e82bSRobert Elliott 
85552946e82bSRobert Elliott 	/* hook into SCSI subsystem */
85562946e82bSRobert Elliott 	rc = hpsa_scsi_add_host(h);
85572946e82bSRobert Elliott 	if (rc)
85582946e82bSRobert Elliott 		goto clean7; /* perf, sg, cmd, irq, shost, pci, lu, aer/h */
85592efa5929SRobert Elliott 
85602efa5929SRobert Elliott 	/* create the resubmit workqueue */
85612efa5929SRobert Elliott 	h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan");
85622efa5929SRobert Elliott 	if (!h->rescan_ctlr_wq) {
85632efa5929SRobert Elliott 		rc = -ENOMEM;
85642efa5929SRobert Elliott 		goto clean7;
85652efa5929SRobert Elliott 	}
85662efa5929SRobert Elliott 
85672efa5929SRobert Elliott 	h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit");
85682efa5929SRobert Elliott 	if (!h->resubmit_wq) {
85692efa5929SRobert Elliott 		rc = -ENOMEM;
85702efa5929SRobert Elliott 		goto clean7;	/* aer/h */
85712efa5929SRobert Elliott 	}
857264670ac8SStephen M. Cameron 
8573105a3dbcSRobert Elliott 	/*
8574105a3dbcSRobert Elliott 	 * At this point, the controller is ready to take commands.
857564670ac8SStephen M. Cameron 	 * Now, if reset_devices and the hard reset didn't work, try
857664670ac8SStephen M. Cameron 	 * the soft reset and see if that works.
857764670ac8SStephen M. Cameron 	 */
857864670ac8SStephen M. Cameron 	if (try_soft_reset) {
857964670ac8SStephen M. Cameron 
858064670ac8SStephen M. Cameron 		/* This is kind of gross.  We may or may not get a completion
858164670ac8SStephen M. Cameron 		 * from the soft reset command, and if we do, then the value
858264670ac8SStephen M. Cameron 		 * from the fifo may or may not be valid.  So, we wait 10 secs
858364670ac8SStephen M. Cameron 		 * after the reset throwing away any completions we get during
858464670ac8SStephen M. Cameron 		 * that time.  Unregister the interrupt handler and register
858564670ac8SStephen M. Cameron 		 * fake ones to scoop up any residual completions.
858664670ac8SStephen M. Cameron 		 */
858764670ac8SStephen M. Cameron 		spin_lock_irqsave(&h->lock, flags);
858864670ac8SStephen M. Cameron 		h->access.set_intr_mask(h, HPSA_INTR_OFF);
858964670ac8SStephen M. Cameron 		spin_unlock_irqrestore(&h->lock, flags);
8590ec501a18SRobert Elliott 		hpsa_free_irqs(h);
85919ee61794SRobert Elliott 		rc = hpsa_request_irqs(h, hpsa_msix_discard_completions,
859264670ac8SStephen M. Cameron 					hpsa_intx_discard_completions);
859364670ac8SStephen M. Cameron 		if (rc) {
85949ee61794SRobert Elliott 			dev_warn(&h->pdev->dev,
85959ee61794SRobert Elliott 				"Failed to request_irq after soft reset.\n");
8596d498757cSRobert Elliott 			/*
8597b2ef480cSRobert Elliott 			 * cannot goto clean7 or free_irqs will be called
8598b2ef480cSRobert Elliott 			 * again. Instead, do its work
8599b2ef480cSRobert Elliott 			 */
8600b2ef480cSRobert Elliott 			hpsa_free_performant_mode(h);	/* clean7 */
8601b2ef480cSRobert Elliott 			hpsa_free_sg_chain_blocks(h);	/* clean6 */
8602b2ef480cSRobert Elliott 			hpsa_free_cmd_pool(h);		/* clean5 */
8603b2ef480cSRobert Elliott 			/*
8604b2ef480cSRobert Elliott 			 * skip hpsa_free_irqs(h) clean4 since that
8605b2ef480cSRobert Elliott 			 * was just called before request_irqs failed
8606d498757cSRobert Elliott 			 */
8607d498757cSRobert Elliott 			goto clean3;
860864670ac8SStephen M. Cameron 		}
860964670ac8SStephen M. Cameron 
861064670ac8SStephen M. Cameron 		rc = hpsa_kdump_soft_reset(h);
861164670ac8SStephen M. Cameron 		if (rc)
861264670ac8SStephen M. Cameron 			/* Neither hard nor soft reset worked, we're hosed. */
86137ef7323fSDon Brace 			goto clean7;
861464670ac8SStephen M. Cameron 
861564670ac8SStephen M. Cameron 		dev_info(&h->pdev->dev, "Board READY.\n");
861664670ac8SStephen M. Cameron 		dev_info(&h->pdev->dev,
861764670ac8SStephen M. Cameron 			"Waiting for stale completions to drain.\n");
861864670ac8SStephen M. Cameron 		h->access.set_intr_mask(h, HPSA_INTR_ON);
861964670ac8SStephen M. Cameron 		msleep(10000);
862064670ac8SStephen M. Cameron 		h->access.set_intr_mask(h, HPSA_INTR_OFF);
862164670ac8SStephen M. Cameron 
862264670ac8SStephen M. Cameron 		rc = controller_reset_failed(h->cfgtable);
862364670ac8SStephen M. Cameron 		if (rc)
862464670ac8SStephen M. Cameron 			dev_info(&h->pdev->dev,
862564670ac8SStephen M. Cameron 				"Soft reset appears to have failed.\n");
862664670ac8SStephen M. Cameron 
862764670ac8SStephen M. Cameron 		/* since the controller's reset, we have to go back and re-init
862864670ac8SStephen M. Cameron 		 * everything.  Easiest to just forget what we've done and do it
862964670ac8SStephen M. Cameron 		 * all over again.
863064670ac8SStephen M. Cameron 		 */
863164670ac8SStephen M. Cameron 		hpsa_undo_allocations_after_kdump_soft_reset(h);
863264670ac8SStephen M. Cameron 		try_soft_reset = 0;
863364670ac8SStephen M. Cameron 		if (rc)
8634b2ef480cSRobert Elliott 			/* don't goto clean, we already unallocated */
863564670ac8SStephen M. Cameron 			return -ENODEV;
863664670ac8SStephen M. Cameron 
863764670ac8SStephen M. Cameron 		goto reinit_after_soft_reset;
863864670ac8SStephen M. Cameron 	}
8639edd16368SStephen M. Cameron 
8640da0697bdSScott Teel 	/* Enable Accelerated IO path at driver layer */
8641da0697bdSScott Teel 	h->acciopath_status = 1;
864234592254SScott Teel 	/* Disable discovery polling.*/
864334592254SScott Teel 	h->discovery_polling = 0;
8644da0697bdSScott Teel 
8645e863d68eSScott Teel 
8646edd16368SStephen M. Cameron 	/* Turn the interrupts on so we can service requests */
8647edd16368SStephen M. Cameron 	h->access.set_intr_mask(h, HPSA_INTR_ON);
8648edd16368SStephen M. Cameron 
8649339b2b14SStephen M. Cameron 	hpsa_hba_inquiry(h);
86508a98db73SStephen M. Cameron 
865134592254SScott Teel 	h->lastlogicals = kzalloc(sizeof(*(h->lastlogicals)), GFP_KERNEL);
865234592254SScott Teel 	if (!h->lastlogicals)
865334592254SScott Teel 		dev_info(&h->pdev->dev,
865434592254SScott Teel 			"Can't track change to report lun data\n");
865534592254SScott Teel 
86568a98db73SStephen M. Cameron 	/* Monitor the controller for firmware lockups */
86578a98db73SStephen M. Cameron 	h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
86588a98db73SStephen M. Cameron 	INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker);
86598a98db73SStephen M. Cameron 	schedule_delayed_work(&h->monitor_ctlr_work,
86608a98db73SStephen M. Cameron 				h->heartbeat_sample_interval);
86616636e7f4SDon Brace 	INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker);
86626636e7f4SDon Brace 	queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
86636636e7f4SDon Brace 				h->heartbeat_sample_interval);
866488bf6d62SStephen M. Cameron 	return 0;
8665edd16368SStephen M. Cameron 
86662946e82bSRobert Elliott clean7: /* perf, sg, cmd, irq, shost, pci, lu, aer/h */
8667105a3dbcSRobert Elliott 	hpsa_free_performant_mode(h);
8668105a3dbcSRobert Elliott 	h->access.set_intr_mask(h, HPSA_INTR_OFF);
8669105a3dbcSRobert Elliott clean6: /* sg, cmd, irq, pci, lockup, wq/aer/h */
867033a2ffceSStephen M. Cameron 	hpsa_free_sg_chain_blocks(h);
86712946e82bSRobert Elliott clean5: /* cmd, irq, shost, pci, lu, aer/h */
86722e9d1b36SStephen M. Cameron 	hpsa_free_cmd_pool(h);
86732946e82bSRobert Elliott clean4: /* irq, shost, pci, lu, aer/h */
8674ec501a18SRobert Elliott 	hpsa_free_irqs(h);
86752946e82bSRobert Elliott clean3: /* shost, pci, lu, aer/h */
86762946e82bSRobert Elliott 	scsi_host_put(h->scsi_host);
86772946e82bSRobert Elliott 	h->scsi_host = NULL;
86782946e82bSRobert Elliott clean2_5: /* pci, lu, aer/h */
8679195f2c65SRobert Elliott 	hpsa_free_pci_init(h);
86802946e82bSRobert Elliott clean2: /* lu, aer/h */
8681105a3dbcSRobert Elliott 	if (h->lockup_detected) {
8682094963daSStephen M. Cameron 		free_percpu(h->lockup_detected);
8683105a3dbcSRobert Elliott 		h->lockup_detected = NULL;
8684105a3dbcSRobert Elliott 	}
8685105a3dbcSRobert Elliott clean1:	/* wq/aer/h */
8686105a3dbcSRobert Elliott 	if (h->resubmit_wq) {
8687105a3dbcSRobert Elliott 		destroy_workqueue(h->resubmit_wq);
8688105a3dbcSRobert Elliott 		h->resubmit_wq = NULL;
8689105a3dbcSRobert Elliott 	}
8690105a3dbcSRobert Elliott 	if (h->rescan_ctlr_wq) {
8691105a3dbcSRobert Elliott 		destroy_workqueue(h->rescan_ctlr_wq);
8692105a3dbcSRobert Elliott 		h->rescan_ctlr_wq = NULL;
8693105a3dbcSRobert Elliott 	}
8694edd16368SStephen M. Cameron 	kfree(h);
8695ecd9aad4SStephen M. Cameron 	return rc;
8696edd16368SStephen M. Cameron }
8697edd16368SStephen M. Cameron 
8698edd16368SStephen M. Cameron static void hpsa_flush_cache(struct ctlr_info *h)
8699edd16368SStephen M. Cameron {
8700edd16368SStephen M. Cameron 	char *flush_buf;
8701edd16368SStephen M. Cameron 	struct CommandList *c;
870225163bd5SWebb Scales 	int rc;
8703702890e3SStephen M. Cameron 
8704094963daSStephen M. Cameron 	if (unlikely(lockup_detected(h)))
8705702890e3SStephen M. Cameron 		return;
8706edd16368SStephen M. Cameron 	flush_buf = kzalloc(4, GFP_KERNEL);
8707edd16368SStephen M. Cameron 	if (!flush_buf)
8708edd16368SStephen M. Cameron 		return;
8709edd16368SStephen M. Cameron 
871045fcb86eSStephen Cameron 	c = cmd_alloc(h);
8711bf43caf3SRobert Elliott 
8712a2dac136SStephen M. Cameron 	if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
8713a2dac136SStephen M. Cameron 		RAID_CTLR_LUNID, TYPE_CMD)) {
8714a2dac136SStephen M. Cameron 		goto out;
8715a2dac136SStephen M. Cameron 	}
871625163bd5SWebb Scales 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
871725163bd5SWebb Scales 					PCI_DMA_TODEVICE, NO_TIMEOUT);
871825163bd5SWebb Scales 	if (rc)
871925163bd5SWebb Scales 		goto out;
8720edd16368SStephen M. Cameron 	if (c->err_info->CommandStatus != 0)
8721a2dac136SStephen M. Cameron out:
8722edd16368SStephen M. Cameron 		dev_warn(&h->pdev->dev,
8723edd16368SStephen M. Cameron 			"error flushing cache on controller\n");
872445fcb86eSStephen Cameron 	cmd_free(h, c);
8725edd16368SStephen M. Cameron 	kfree(flush_buf);
8726edd16368SStephen M. Cameron }
8727edd16368SStephen M. Cameron 
8728c2adae44SScott Teel /* Make controller gather fresh report lun data each time we
8729c2adae44SScott Teel  * send down a report luns request
8730c2adae44SScott Teel  */
8731c2adae44SScott Teel static void hpsa_disable_rld_caching(struct ctlr_info *h)
8732c2adae44SScott Teel {
8733c2adae44SScott Teel 	u32 *options;
8734c2adae44SScott Teel 	struct CommandList *c;
8735c2adae44SScott Teel 	int rc;
8736c2adae44SScott Teel 
8737c2adae44SScott Teel 	/* Don't bother trying to set diag options if locked up */
8738c2adae44SScott Teel 	if (unlikely(h->lockup_detected))
8739c2adae44SScott Teel 		return;
8740c2adae44SScott Teel 
8741c2adae44SScott Teel 	options = kzalloc(sizeof(*options), GFP_KERNEL);
8742c2adae44SScott Teel 	if (!options) {
8743c2adae44SScott Teel 		dev_err(&h->pdev->dev,
8744c2adae44SScott Teel 			"Error: failed to disable rld caching, during alloc.\n");
8745c2adae44SScott Teel 		return;
8746c2adae44SScott Teel 	}
8747c2adae44SScott Teel 
8748c2adae44SScott Teel 	c = cmd_alloc(h);
8749c2adae44SScott Teel 
8750c2adae44SScott Teel 	/* first, get the current diag options settings */
8751c2adae44SScott Teel 	if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0,
8752c2adae44SScott Teel 		RAID_CTLR_LUNID, TYPE_CMD))
8753c2adae44SScott Teel 		goto errout;
8754c2adae44SScott Teel 
8755c2adae44SScott Teel 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
8756c2adae44SScott Teel 		PCI_DMA_FROMDEVICE, NO_TIMEOUT);
8757c2adae44SScott Teel 	if ((rc != 0) || (c->err_info->CommandStatus != 0))
8758c2adae44SScott Teel 		goto errout;
8759c2adae44SScott Teel 
8760c2adae44SScott Teel 	/* Now, set the bit for disabling the RLD caching */
8761c2adae44SScott Teel 	*options |= HPSA_DIAG_OPTS_DISABLE_RLD_CACHING;
8762c2adae44SScott Teel 
8763c2adae44SScott Teel 	if (fill_cmd(c, BMIC_SET_DIAG_OPTIONS, h, options, 4, 0,
8764c2adae44SScott Teel 		RAID_CTLR_LUNID, TYPE_CMD))
8765c2adae44SScott Teel 		goto errout;
8766c2adae44SScott Teel 
8767c2adae44SScott Teel 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
8768c2adae44SScott Teel 		PCI_DMA_TODEVICE, NO_TIMEOUT);
8769c2adae44SScott Teel 	if ((rc != 0)  || (c->err_info->CommandStatus != 0))
8770c2adae44SScott Teel 		goto errout;
8771c2adae44SScott Teel 
8772c2adae44SScott Teel 	/* Now verify that it got set: */
8773c2adae44SScott Teel 	if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0,
8774c2adae44SScott Teel 		RAID_CTLR_LUNID, TYPE_CMD))
8775c2adae44SScott Teel 		goto errout;
8776c2adae44SScott Teel 
8777c2adae44SScott Teel 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
8778c2adae44SScott Teel 		PCI_DMA_FROMDEVICE, NO_TIMEOUT);
8779c2adae44SScott Teel 	if ((rc != 0)  || (c->err_info->CommandStatus != 0))
8780c2adae44SScott Teel 		goto errout;
8781c2adae44SScott Teel 
8782d8a080c3SDan Carpenter 	if (*options & HPSA_DIAG_OPTS_DISABLE_RLD_CACHING)
8783c2adae44SScott Teel 		goto out;
8784c2adae44SScott Teel 
8785c2adae44SScott Teel errout:
8786c2adae44SScott Teel 	dev_err(&h->pdev->dev,
8787c2adae44SScott Teel 			"Error: failed to disable report lun data caching.\n");
8788c2adae44SScott Teel out:
8789c2adae44SScott Teel 	cmd_free(h, c);
8790c2adae44SScott Teel 	kfree(options);
8791c2adae44SScott Teel }
8792c2adae44SScott Teel 
8793edd16368SStephen M. Cameron static void hpsa_shutdown(struct pci_dev *pdev)
8794edd16368SStephen M. Cameron {
8795edd16368SStephen M. Cameron 	struct ctlr_info *h;
8796edd16368SStephen M. Cameron 
8797edd16368SStephen M. Cameron 	h = pci_get_drvdata(pdev);
8798edd16368SStephen M. Cameron 	/* Turn board interrupts off  and send the flush cache command
8799edd16368SStephen M. Cameron 	 * sendcmd will turn off interrupt, and send the flush...
8800edd16368SStephen M. Cameron 	 * To write all data in the battery backed cache to disks
8801edd16368SStephen M. Cameron 	 */
8802edd16368SStephen M. Cameron 	hpsa_flush_cache(h);
8803edd16368SStephen M. Cameron 	h->access.set_intr_mask(h, HPSA_INTR_OFF);
8804105a3dbcSRobert Elliott 	hpsa_free_irqs(h);			/* init_one 4 */
8805cc64c817SRobert Elliott 	hpsa_disable_interrupt_mode(h);		/* pci_init 2 */
8806edd16368SStephen M. Cameron }
8807edd16368SStephen M. Cameron 
88086f039790SGreg Kroah-Hartman static void hpsa_free_device_info(struct ctlr_info *h)
880955e14e76SStephen M. Cameron {
881055e14e76SStephen M. Cameron 	int i;
881155e14e76SStephen M. Cameron 
8812105a3dbcSRobert Elliott 	for (i = 0; i < h->ndevices; i++) {
881355e14e76SStephen M. Cameron 		kfree(h->dev[i]);
8814105a3dbcSRobert Elliott 		h->dev[i] = NULL;
8815105a3dbcSRobert Elliott 	}
881655e14e76SStephen M. Cameron }
881755e14e76SStephen M. Cameron 
88186f039790SGreg Kroah-Hartman static void hpsa_remove_one(struct pci_dev *pdev)
8819edd16368SStephen M. Cameron {
8820edd16368SStephen M. Cameron 	struct ctlr_info *h;
88218a98db73SStephen M. Cameron 	unsigned long flags;
8822edd16368SStephen M. Cameron 
8823edd16368SStephen M. Cameron 	if (pci_get_drvdata(pdev) == NULL) {
8824edd16368SStephen M. Cameron 		dev_err(&pdev->dev, "unable to remove device\n");
8825edd16368SStephen M. Cameron 		return;
8826edd16368SStephen M. Cameron 	}
8827edd16368SStephen M. Cameron 	h = pci_get_drvdata(pdev);
88288a98db73SStephen M. Cameron 
88298a98db73SStephen M. Cameron 	/* Get rid of any controller monitoring work items */
88308a98db73SStephen M. Cameron 	spin_lock_irqsave(&h->lock, flags);
88318a98db73SStephen M. Cameron 	h->remove_in_progress = 1;
88328a98db73SStephen M. Cameron 	spin_unlock_irqrestore(&h->lock, flags);
88336636e7f4SDon Brace 	cancel_delayed_work_sync(&h->monitor_ctlr_work);
88346636e7f4SDon Brace 	cancel_delayed_work_sync(&h->rescan_ctlr_work);
88356636e7f4SDon Brace 	destroy_workqueue(h->rescan_ctlr_wq);
88366636e7f4SDon Brace 	destroy_workqueue(h->resubmit_wq);
8837cc64c817SRobert Elliott 
88382d041306SDon Brace 	/*
88392d041306SDon Brace 	 * Call before disabling interrupts.
88402d041306SDon Brace 	 * scsi_remove_host can trigger I/O operations especially
88412d041306SDon Brace 	 * when multipath is enabled. There can be SYNCHRONIZE CACHE
88422d041306SDon Brace 	 * operations which cannot complete and will hang the system.
88432d041306SDon Brace 	 */
88442d041306SDon Brace 	if (h->scsi_host)
88452d041306SDon Brace 		scsi_remove_host(h->scsi_host);		/* init_one 8 */
8846105a3dbcSRobert Elliott 	/* includes hpsa_free_irqs - init_one 4 */
8847195f2c65SRobert Elliott 	/* includes hpsa_disable_interrupt_mode - pci_init 2 */
8848edd16368SStephen M. Cameron 	hpsa_shutdown(pdev);
8849cc64c817SRobert Elliott 
8850105a3dbcSRobert Elliott 	hpsa_free_device_info(h);		/* scan */
8851105a3dbcSRobert Elliott 
88522946e82bSRobert Elliott 	kfree(h->hba_inquiry_data);			/* init_one 10 */
88532946e82bSRobert Elliott 	h->hba_inquiry_data = NULL;			/* init_one 10 */
88542946e82bSRobert Elliott 	hpsa_free_ioaccel2_sg_chain_blocks(h);
8855105a3dbcSRobert Elliott 	hpsa_free_performant_mode(h);			/* init_one 7 */
8856105a3dbcSRobert Elliott 	hpsa_free_sg_chain_blocks(h);			/* init_one 6 */
88571fb7c98aSRobert Elliott 	hpsa_free_cmd_pool(h);				/* init_one 5 */
885834592254SScott Teel 	kfree(h->lastlogicals);
8859105a3dbcSRobert Elliott 
8860105a3dbcSRobert Elliott 	/* hpsa_free_irqs already called via hpsa_shutdown init_one 4 */
8861195f2c65SRobert Elliott 
88622946e82bSRobert Elliott 	scsi_host_put(h->scsi_host);			/* init_one 3 */
88632946e82bSRobert Elliott 	h->scsi_host = NULL;				/* init_one 3 */
88642946e82bSRobert Elliott 
8865195f2c65SRobert Elliott 	/* includes hpsa_disable_interrupt_mode - pci_init 2 */
88662946e82bSRobert Elliott 	hpsa_free_pci_init(h);				/* init_one 2.5 */
8867195f2c65SRobert Elliott 
8868105a3dbcSRobert Elliott 	free_percpu(h->lockup_detected);		/* init_one 2 */
8869105a3dbcSRobert Elliott 	h->lockup_detected = NULL;			/* init_one 2 */
8870105a3dbcSRobert Elliott 	/* (void) pci_disable_pcie_error_reporting(pdev); */	/* init_one 1 */
8871d04e62b9SKevin Barnett 
8872d04e62b9SKevin Barnett 	hpsa_delete_sas_host(h);
8873d04e62b9SKevin Barnett 
8874105a3dbcSRobert Elliott 	kfree(h);					/* init_one 1 */
8875edd16368SStephen M. Cameron }
8876edd16368SStephen M. Cameron 
8877edd16368SStephen M. Cameron static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
8878edd16368SStephen M. Cameron 	__attribute__((unused)) pm_message_t state)
8879edd16368SStephen M. Cameron {
8880edd16368SStephen M. Cameron 	return -ENOSYS;
8881edd16368SStephen M. Cameron }
8882edd16368SStephen M. Cameron 
8883edd16368SStephen M. Cameron static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
8884edd16368SStephen M. Cameron {
8885edd16368SStephen M. Cameron 	return -ENOSYS;
8886edd16368SStephen M. Cameron }
8887edd16368SStephen M. Cameron 
8888edd16368SStephen M. Cameron static struct pci_driver hpsa_pci_driver = {
8889f79cfec6SStephen M. Cameron 	.name = HPSA,
8890edd16368SStephen M. Cameron 	.probe = hpsa_init_one,
88916f039790SGreg Kroah-Hartman 	.remove = hpsa_remove_one,
8892edd16368SStephen M. Cameron 	.id_table = hpsa_pci_device_id,	/* id_table */
8893edd16368SStephen M. Cameron 	.shutdown = hpsa_shutdown,
8894edd16368SStephen M. Cameron 	.suspend = hpsa_suspend,
8895edd16368SStephen M. Cameron 	.resume = hpsa_resume,
8896edd16368SStephen M. Cameron };
8897edd16368SStephen M. Cameron 
8898303932fdSDon Brace /* Fill in bucket_map[], given nsgs (the max number of
8899303932fdSDon Brace  * scatter gather elements supported) and bucket[],
8900303932fdSDon Brace  * which is an array of 8 integers.  The bucket[] array
8901303932fdSDon Brace  * contains 8 different DMA transfer sizes (in 16
8902303932fdSDon Brace  * byte increments) which the controller uses to fetch
8903303932fdSDon Brace  * commands.  This function fills in bucket_map[], which
8904303932fdSDon Brace  * maps a given number of scatter gather elements to one of
8905303932fdSDon Brace  * the 8 DMA transfer sizes.  The point of it is to allow the
8906303932fdSDon Brace  * controller to only do as much DMA as needed to fetch the
8907303932fdSDon Brace  * command, with the DMA transfer size encoded in the lower
8908303932fdSDon Brace  * bits of the command address.
8909303932fdSDon Brace  */
8910303932fdSDon Brace static void  calc_bucket_map(int bucket[], int num_buckets,
89112b08b3e9SDon Brace 	int nsgs, int min_blocks, u32 *bucket_map)
8912303932fdSDon Brace {
8913303932fdSDon Brace 	int i, j, b, size;
8914303932fdSDon Brace 
8915303932fdSDon Brace 	/* Note, bucket_map must have nsgs+1 entries. */
8916303932fdSDon Brace 	for (i = 0; i <= nsgs; i++) {
8917303932fdSDon Brace 		/* Compute size of a command with i SG entries */
8918e1f7de0cSMatt Gates 		size = i + min_blocks;
8919303932fdSDon Brace 		b = num_buckets; /* Assume the biggest bucket */
8920303932fdSDon Brace 		/* Find the bucket that is just big enough */
8921e1f7de0cSMatt Gates 		for (j = 0; j < num_buckets; j++) {
8922303932fdSDon Brace 			if (bucket[j] >= size) {
8923303932fdSDon Brace 				b = j;
8924303932fdSDon Brace 				break;
8925303932fdSDon Brace 			}
8926303932fdSDon Brace 		}
8927303932fdSDon Brace 		/* for a command with i SG entries, use bucket b. */
8928303932fdSDon Brace 		bucket_map[i] = b;
8929303932fdSDon Brace 	}
8930303932fdSDon Brace }
8931303932fdSDon Brace 
8932105a3dbcSRobert Elliott /*
8933105a3dbcSRobert Elliott  * return -ENODEV on err, 0 on success (or no action)
8934105a3dbcSRobert Elliott  * allocates numerous items that must be freed later
8935105a3dbcSRobert Elliott  */
8936c706a795SRobert Elliott static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support)
8937303932fdSDon Brace {
89386c311b57SStephen M. Cameron 	int i;
89396c311b57SStephen M. Cameron 	unsigned long register_value;
8940e1f7de0cSMatt Gates 	unsigned long transMethod = CFGTBL_Trans_Performant |
8941e1f7de0cSMatt Gates 			(trans_support & CFGTBL_Trans_use_short_tags) |
8942e1f7de0cSMatt Gates 				CFGTBL_Trans_enable_directed_msix |
8943b9af4937SStephen M. Cameron 			(trans_support & (CFGTBL_Trans_io_accel1 |
8944b9af4937SStephen M. Cameron 				CFGTBL_Trans_io_accel2));
8945e1f7de0cSMatt Gates 	struct access_method access = SA5_performant_access;
8946def342bdSStephen M. Cameron 
8947def342bdSStephen M. Cameron 	/* This is a bit complicated.  There are 8 registers on
8948def342bdSStephen M. Cameron 	 * the controller which we write to to tell it 8 different
8949def342bdSStephen M. Cameron 	 * sizes of commands which there may be.  It's a way of
8950def342bdSStephen M. Cameron 	 * reducing the DMA done to fetch each command.  Encoded into
8951def342bdSStephen M. Cameron 	 * each command's tag are 3 bits which communicate to the controller
8952def342bdSStephen M. Cameron 	 * which of the eight sizes that command fits within.  The size of
8953def342bdSStephen M. Cameron 	 * each command depends on how many scatter gather entries there are.
8954def342bdSStephen M. Cameron 	 * Each SG entry requires 16 bytes.  The eight registers are programmed
8955def342bdSStephen M. Cameron 	 * with the number of 16-byte blocks a command of that size requires.
8956def342bdSStephen M. Cameron 	 * The smallest command possible requires 5 such 16 byte blocks.
8957d66ae08bSStephen M. Cameron 	 * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte
8958def342bdSStephen M. Cameron 	 * blocks.  Note, this only extends to the SG entries contained
8959def342bdSStephen M. Cameron 	 * within the command block, and does not extend to chained blocks
8960def342bdSStephen M. Cameron 	 * of SG elements.   bft[] contains the eight values we write to
8961def342bdSStephen M. Cameron 	 * the registers.  They are not evenly distributed, but have more
8962def342bdSStephen M. Cameron 	 * sizes for small commands, and fewer sizes for larger commands.
8963def342bdSStephen M. Cameron 	 */
8964d66ae08bSStephen M. Cameron 	int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
8965b9af4937SStephen M. Cameron #define MIN_IOACCEL2_BFT_ENTRY 5
8966b9af4937SStephen M. Cameron #define HPSA_IOACCEL2_HEADER_SZ 4
8967b9af4937SStephen M. Cameron 	int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12,
8968b9af4937SStephen M. Cameron 			13, 14, 15, 16, 17, 18, 19,
8969b9af4937SStephen M. Cameron 			HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES};
8970b9af4937SStephen M. Cameron 	BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16);
8971b9af4937SStephen M. Cameron 	BUILD_BUG_ON(ARRAY_SIZE(bft) != 8);
8972b9af4937SStephen M. Cameron 	BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) >
8973b9af4937SStephen M. Cameron 				 16 * MIN_IOACCEL2_BFT_ENTRY);
8974b9af4937SStephen M. Cameron 	BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16);
8975d66ae08bSStephen M. Cameron 	BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
8976303932fdSDon Brace 	/*  5 = 1 s/g entry or 4k
8977303932fdSDon Brace 	 *  6 = 2 s/g entry or 8k
8978303932fdSDon Brace 	 *  8 = 4 s/g entry or 16k
8979303932fdSDon Brace 	 * 10 = 6 s/g entry or 24k
8980303932fdSDon Brace 	 */
8981303932fdSDon Brace 
8982b3a52e79SStephen M. Cameron 	/* If the controller supports either ioaccel method then
8983b3a52e79SStephen M. Cameron 	 * we can also use the RAID stack submit path that does not
8984b3a52e79SStephen M. Cameron 	 * perform the superfluous readl() after each command submission.
8985b3a52e79SStephen M. Cameron 	 */
8986b3a52e79SStephen M. Cameron 	if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2))
8987b3a52e79SStephen M. Cameron 		access = SA5_performant_access_no_read;
8988b3a52e79SStephen M. Cameron 
8989303932fdSDon Brace 	/* Controller spec: zero out this buffer. */
8990072b0518SStephen M. Cameron 	for (i = 0; i < h->nreply_queues; i++)
8991072b0518SStephen M. Cameron 		memset(h->reply_queue[i].head, 0, h->reply_queue_size);
8992303932fdSDon Brace 
8993d66ae08bSStephen M. Cameron 	bft[7] = SG_ENTRIES_IN_CMD + 4;
8994d66ae08bSStephen M. Cameron 	calc_bucket_map(bft, ARRAY_SIZE(bft),
8995e1f7de0cSMatt Gates 				SG_ENTRIES_IN_CMD, 4, h->blockFetchTable);
8996303932fdSDon Brace 	for (i = 0; i < 8; i++)
8997303932fdSDon Brace 		writel(bft[i], &h->transtable->BlockFetch[i]);
8998303932fdSDon Brace 
8999303932fdSDon Brace 	/* size of controller ring buffer */
9000303932fdSDon Brace 	writel(h->max_commands, &h->transtable->RepQSize);
9001254f796bSMatt Gates 	writel(h->nreply_queues, &h->transtable->RepQCount);
9002303932fdSDon Brace 	writel(0, &h->transtable->RepQCtrAddrLow32);
9003303932fdSDon Brace 	writel(0, &h->transtable->RepQCtrAddrHigh32);
9004254f796bSMatt Gates 
9005254f796bSMatt Gates 	for (i = 0; i < h->nreply_queues; i++) {
9006254f796bSMatt Gates 		writel(0, &h->transtable->RepQAddr[i].upper);
9007072b0518SStephen M. Cameron 		writel(h->reply_queue[i].busaddr,
9008254f796bSMatt Gates 			&h->transtable->RepQAddr[i].lower);
9009254f796bSMatt Gates 	}
9010254f796bSMatt Gates 
9011b9af4937SStephen M. Cameron 	writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
9012e1f7de0cSMatt Gates 	writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest));
9013e1f7de0cSMatt Gates 	/*
9014e1f7de0cSMatt Gates 	 * enable outbound interrupt coalescing in accelerator mode;
9015e1f7de0cSMatt Gates 	 */
9016e1f7de0cSMatt Gates 	if (trans_support & CFGTBL_Trans_io_accel1) {
9017e1f7de0cSMatt Gates 		access = SA5_ioaccel_mode1_access;
9018e1f7de0cSMatt Gates 		writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
9019e1f7de0cSMatt Gates 		writel(4, &h->cfgtable->HostWrite.CoalIntCount);
9020c349775eSScott Teel 	} else {
9021c349775eSScott Teel 		if (trans_support & CFGTBL_Trans_io_accel2) {
9022c349775eSScott Teel 			access = SA5_ioaccel_mode2_access;
9023c349775eSScott Teel 			writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
9024c349775eSScott Teel 			writel(4, &h->cfgtable->HostWrite.CoalIntCount);
9025c349775eSScott Teel 		}
9026e1f7de0cSMatt Gates 	}
9027303932fdSDon Brace 	writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
9028c706a795SRobert Elliott 	if (hpsa_wait_for_mode_change_ack(h)) {
9029c706a795SRobert Elliott 		dev_err(&h->pdev->dev,
9030c706a795SRobert Elliott 			"performant mode problem - doorbell timeout\n");
9031c706a795SRobert Elliott 		return -ENODEV;
9032c706a795SRobert Elliott 	}
9033303932fdSDon Brace 	register_value = readl(&(h->cfgtable->TransportActive));
9034303932fdSDon Brace 	if (!(register_value & CFGTBL_Trans_Performant)) {
9035050f7147SStephen Cameron 		dev_err(&h->pdev->dev,
9036050f7147SStephen Cameron 			"performant mode problem - transport not active\n");
9037c706a795SRobert Elliott 		return -ENODEV;
9038303932fdSDon Brace 	}
9039960a30e7SStephen M. Cameron 	/* Change the access methods to the performant access methods */
9040e1f7de0cSMatt Gates 	h->access = access;
9041e1f7de0cSMatt Gates 	h->transMethod = transMethod;
9042e1f7de0cSMatt Gates 
9043b9af4937SStephen M. Cameron 	if (!((trans_support & CFGTBL_Trans_io_accel1) ||
9044b9af4937SStephen M. Cameron 		(trans_support & CFGTBL_Trans_io_accel2)))
9045c706a795SRobert Elliott 		return 0;
9046e1f7de0cSMatt Gates 
9047b9af4937SStephen M. Cameron 	if (trans_support & CFGTBL_Trans_io_accel1) {
9048e1f7de0cSMatt Gates 		/* Set up I/O accelerator mode */
9049e1f7de0cSMatt Gates 		for (i = 0; i < h->nreply_queues; i++) {
9050e1f7de0cSMatt Gates 			writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX);
9051e1f7de0cSMatt Gates 			h->reply_queue[i].current_entry =
9052e1f7de0cSMatt Gates 				readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX);
9053e1f7de0cSMatt Gates 		}
9054283b4a9bSStephen M. Cameron 		bft[7] = h->ioaccel_maxsg + 8;
9055283b4a9bSStephen M. Cameron 		calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8,
9056e1f7de0cSMatt Gates 				h->ioaccel1_blockFetchTable);
9057e1f7de0cSMatt Gates 
9058e1f7de0cSMatt Gates 		/* initialize all reply queue entries to unused */
9059072b0518SStephen M. Cameron 		for (i = 0; i < h->nreply_queues; i++)
9060072b0518SStephen M. Cameron 			memset(h->reply_queue[i].head,
9061072b0518SStephen M. Cameron 				(u8) IOACCEL_MODE1_REPLY_UNUSED,
9062072b0518SStephen M. Cameron 				h->reply_queue_size);
9063e1f7de0cSMatt Gates 
9064e1f7de0cSMatt Gates 		/* set all the constant fields in the accelerator command
9065e1f7de0cSMatt Gates 		 * frames once at init time to save CPU cycles later.
9066e1f7de0cSMatt Gates 		 */
9067e1f7de0cSMatt Gates 		for (i = 0; i < h->nr_cmds; i++) {
9068e1f7de0cSMatt Gates 			struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i];
9069e1f7de0cSMatt Gates 
9070e1f7de0cSMatt Gates 			cp->function = IOACCEL1_FUNCTION_SCSIIO;
9071e1f7de0cSMatt Gates 			cp->err_info = (u32) (h->errinfo_pool_dhandle +
9072e1f7de0cSMatt Gates 					(i * sizeof(struct ErrorInfo)));
9073e1f7de0cSMatt Gates 			cp->err_info_len = sizeof(struct ErrorInfo);
9074e1f7de0cSMatt Gates 			cp->sgl_offset = IOACCEL1_SGLOFFSET;
90752b08b3e9SDon Brace 			cp->host_context_flags =
90762b08b3e9SDon Brace 				cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT);
9077e1f7de0cSMatt Gates 			cp->timeout_sec = 0;
9078e1f7de0cSMatt Gates 			cp->ReplyQueue = 0;
907950a0decfSStephen M. Cameron 			cp->tag =
9080f2405db8SDon Brace 				cpu_to_le64((i << DIRECT_LOOKUP_SHIFT));
908150a0decfSStephen M. Cameron 			cp->host_addr =
908250a0decfSStephen M. Cameron 				cpu_to_le64(h->ioaccel_cmd_pool_dhandle +
9083e1f7de0cSMatt Gates 					(i * sizeof(struct io_accel1_cmd)));
9084e1f7de0cSMatt Gates 		}
9085b9af4937SStephen M. Cameron 	} else if (trans_support & CFGTBL_Trans_io_accel2) {
9086b9af4937SStephen M. Cameron 		u64 cfg_offset, cfg_base_addr_index;
9087b9af4937SStephen M. Cameron 		u32 bft2_offset, cfg_base_addr;
9088b9af4937SStephen M. Cameron 		int rc;
9089b9af4937SStephen M. Cameron 
9090b9af4937SStephen M. Cameron 		rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
9091b9af4937SStephen M. Cameron 			&cfg_base_addr_index, &cfg_offset);
9092b9af4937SStephen M. Cameron 		BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64);
9093b9af4937SStephen M. Cameron 		bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ;
9094b9af4937SStephen M. Cameron 		calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg,
9095b9af4937SStephen M. Cameron 				4, h->ioaccel2_blockFetchTable);
9096b9af4937SStephen M. Cameron 		bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset);
9097b9af4937SStephen M. Cameron 		BUILD_BUG_ON(offsetof(struct CfgTable,
9098b9af4937SStephen M. Cameron 				io_accel_request_size_offset) != 0xb8);
9099b9af4937SStephen M. Cameron 		h->ioaccel2_bft2_regs =
9100b9af4937SStephen M. Cameron 			remap_pci_mem(pci_resource_start(h->pdev,
9101b9af4937SStephen M. Cameron 					cfg_base_addr_index) +
9102b9af4937SStephen M. Cameron 					cfg_offset + bft2_offset,
9103b9af4937SStephen M. Cameron 					ARRAY_SIZE(bft2) *
9104b9af4937SStephen M. Cameron 					sizeof(*h->ioaccel2_bft2_regs));
9105b9af4937SStephen M. Cameron 		for (i = 0; i < ARRAY_SIZE(bft2); i++)
9106b9af4937SStephen M. Cameron 			writel(bft2[i], &h->ioaccel2_bft2_regs[i]);
9107b9af4937SStephen M. Cameron 	}
9108b9af4937SStephen M. Cameron 	writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
9109c706a795SRobert Elliott 	if (hpsa_wait_for_mode_change_ack(h)) {
9110c706a795SRobert Elliott 		dev_err(&h->pdev->dev,
9111c706a795SRobert Elliott 			"performant mode problem - enabling ioaccel mode\n");
9112c706a795SRobert Elliott 		return -ENODEV;
9113c706a795SRobert Elliott 	}
9114c706a795SRobert Elliott 	return 0;
9115e1f7de0cSMatt Gates }
9116e1f7de0cSMatt Gates 
91171fb7c98aSRobert Elliott /* Free ioaccel1 mode command blocks and block fetch table */
91181fb7c98aSRobert Elliott static void hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info *h)
91191fb7c98aSRobert Elliott {
9120105a3dbcSRobert Elliott 	if (h->ioaccel_cmd_pool) {
91211fb7c98aSRobert Elliott 		pci_free_consistent(h->pdev,
91221fb7c98aSRobert Elliott 			h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
91231fb7c98aSRobert Elliott 			h->ioaccel_cmd_pool,
91241fb7c98aSRobert Elliott 			h->ioaccel_cmd_pool_dhandle);
9125105a3dbcSRobert Elliott 		h->ioaccel_cmd_pool = NULL;
9126105a3dbcSRobert Elliott 		h->ioaccel_cmd_pool_dhandle = 0;
9127105a3dbcSRobert Elliott 	}
91281fb7c98aSRobert Elliott 	kfree(h->ioaccel1_blockFetchTable);
9129105a3dbcSRobert Elliott 	h->ioaccel1_blockFetchTable = NULL;
91301fb7c98aSRobert Elliott }
91311fb7c98aSRobert Elliott 
9132d37ffbe4SRobert Elliott /* Allocate ioaccel1 mode command blocks and block fetch table */
9133d37ffbe4SRobert Elliott static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h)
9134e1f7de0cSMatt Gates {
9135283b4a9bSStephen M. Cameron 	h->ioaccel_maxsg =
9136283b4a9bSStephen M. Cameron 		readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
9137283b4a9bSStephen M. Cameron 	if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES)
9138283b4a9bSStephen M. Cameron 		h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES;
9139283b4a9bSStephen M. Cameron 
9140e1f7de0cSMatt Gates 	/* Command structures must be aligned on a 128-byte boundary
9141e1f7de0cSMatt Gates 	 * because the 7 lower bits of the address are used by the
9142e1f7de0cSMatt Gates 	 * hardware.
9143e1f7de0cSMatt Gates 	 */
9144e1f7de0cSMatt Gates 	BUILD_BUG_ON(sizeof(struct io_accel1_cmd) %
9145e1f7de0cSMatt Gates 			IOACCEL1_COMMANDLIST_ALIGNMENT);
9146e1f7de0cSMatt Gates 	h->ioaccel_cmd_pool =
9147e1f7de0cSMatt Gates 		pci_alloc_consistent(h->pdev,
9148e1f7de0cSMatt Gates 			h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
9149e1f7de0cSMatt Gates 			&(h->ioaccel_cmd_pool_dhandle));
9150e1f7de0cSMatt Gates 
9151e1f7de0cSMatt Gates 	h->ioaccel1_blockFetchTable =
9152283b4a9bSStephen M. Cameron 		kmalloc(((h->ioaccel_maxsg + 1) *
9153e1f7de0cSMatt Gates 				sizeof(u32)), GFP_KERNEL);
9154e1f7de0cSMatt Gates 
9155e1f7de0cSMatt Gates 	if ((h->ioaccel_cmd_pool == NULL) ||
9156e1f7de0cSMatt Gates 		(h->ioaccel1_blockFetchTable == NULL))
9157e1f7de0cSMatt Gates 		goto clean_up;
9158e1f7de0cSMatt Gates 
9159e1f7de0cSMatt Gates 	memset(h->ioaccel_cmd_pool, 0,
9160e1f7de0cSMatt Gates 		h->nr_cmds * sizeof(*h->ioaccel_cmd_pool));
9161e1f7de0cSMatt Gates 	return 0;
9162e1f7de0cSMatt Gates 
9163e1f7de0cSMatt Gates clean_up:
91641fb7c98aSRobert Elliott 	hpsa_free_ioaccel1_cmd_and_bft(h);
91652dd02d74SRobert Elliott 	return -ENOMEM;
91666c311b57SStephen M. Cameron }
91676c311b57SStephen M. Cameron 
91681fb7c98aSRobert Elliott /* Free ioaccel2 mode command blocks and block fetch table */
91691fb7c98aSRobert Elliott static void hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info *h)
91701fb7c98aSRobert Elliott {
9171d9a729f3SWebb Scales 	hpsa_free_ioaccel2_sg_chain_blocks(h);
9172d9a729f3SWebb Scales 
9173105a3dbcSRobert Elliott 	if (h->ioaccel2_cmd_pool) {
91741fb7c98aSRobert Elliott 		pci_free_consistent(h->pdev,
91751fb7c98aSRobert Elliott 			h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
91761fb7c98aSRobert Elliott 			h->ioaccel2_cmd_pool,
91771fb7c98aSRobert Elliott 			h->ioaccel2_cmd_pool_dhandle);
9178105a3dbcSRobert Elliott 		h->ioaccel2_cmd_pool = NULL;
9179105a3dbcSRobert Elliott 		h->ioaccel2_cmd_pool_dhandle = 0;
9180105a3dbcSRobert Elliott 	}
91811fb7c98aSRobert Elliott 	kfree(h->ioaccel2_blockFetchTable);
9182105a3dbcSRobert Elliott 	h->ioaccel2_blockFetchTable = NULL;
91831fb7c98aSRobert Elliott }
91841fb7c98aSRobert Elliott 
9185d37ffbe4SRobert Elliott /* Allocate ioaccel2 mode command blocks and block fetch table */
9186d37ffbe4SRobert Elliott static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h)
9187aca9012aSStephen M. Cameron {
9188d9a729f3SWebb Scales 	int rc;
9189d9a729f3SWebb Scales 
9190aca9012aSStephen M. Cameron 	/* Allocate ioaccel2 mode command blocks and block fetch table */
9191aca9012aSStephen M. Cameron 
9192aca9012aSStephen M. Cameron 	h->ioaccel_maxsg =
9193aca9012aSStephen M. Cameron 		readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
9194aca9012aSStephen M. Cameron 	if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES)
9195aca9012aSStephen M. Cameron 		h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES;
9196aca9012aSStephen M. Cameron 
9197aca9012aSStephen M. Cameron 	BUILD_BUG_ON(sizeof(struct io_accel2_cmd) %
9198aca9012aSStephen M. Cameron 			IOACCEL2_COMMANDLIST_ALIGNMENT);
9199aca9012aSStephen M. Cameron 	h->ioaccel2_cmd_pool =
9200aca9012aSStephen M. Cameron 		pci_alloc_consistent(h->pdev,
9201aca9012aSStephen M. Cameron 			h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
9202aca9012aSStephen M. Cameron 			&(h->ioaccel2_cmd_pool_dhandle));
9203aca9012aSStephen M. Cameron 
9204aca9012aSStephen M. Cameron 	h->ioaccel2_blockFetchTable =
9205aca9012aSStephen M. Cameron 		kmalloc(((h->ioaccel_maxsg + 1) *
9206aca9012aSStephen M. Cameron 				sizeof(u32)), GFP_KERNEL);
9207aca9012aSStephen M. Cameron 
9208aca9012aSStephen M. Cameron 	if ((h->ioaccel2_cmd_pool == NULL) ||
9209d9a729f3SWebb Scales 		(h->ioaccel2_blockFetchTable == NULL)) {
9210d9a729f3SWebb Scales 		rc = -ENOMEM;
9211d9a729f3SWebb Scales 		goto clean_up;
9212d9a729f3SWebb Scales 	}
9213d9a729f3SWebb Scales 
9214d9a729f3SWebb Scales 	rc = hpsa_allocate_ioaccel2_sg_chain_blocks(h);
9215d9a729f3SWebb Scales 	if (rc)
9216aca9012aSStephen M. Cameron 		goto clean_up;
9217aca9012aSStephen M. Cameron 
9218aca9012aSStephen M. Cameron 	memset(h->ioaccel2_cmd_pool, 0,
9219aca9012aSStephen M. Cameron 		h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool));
9220aca9012aSStephen M. Cameron 	return 0;
9221aca9012aSStephen M. Cameron 
9222aca9012aSStephen M. Cameron clean_up:
92231fb7c98aSRobert Elliott 	hpsa_free_ioaccel2_cmd_and_bft(h);
9224d9a729f3SWebb Scales 	return rc;
9225aca9012aSStephen M. Cameron }
9226aca9012aSStephen M. Cameron 
9227105a3dbcSRobert Elliott /* Free items allocated by hpsa_put_ctlr_into_performant_mode */
9228105a3dbcSRobert Elliott static void hpsa_free_performant_mode(struct ctlr_info *h)
9229105a3dbcSRobert Elliott {
9230105a3dbcSRobert Elliott 	kfree(h->blockFetchTable);
9231105a3dbcSRobert Elliott 	h->blockFetchTable = NULL;
9232105a3dbcSRobert Elliott 	hpsa_free_reply_queues(h);
9233105a3dbcSRobert Elliott 	hpsa_free_ioaccel1_cmd_and_bft(h);
9234105a3dbcSRobert Elliott 	hpsa_free_ioaccel2_cmd_and_bft(h);
9235105a3dbcSRobert Elliott }
9236105a3dbcSRobert Elliott 
9237105a3dbcSRobert Elliott /* return -ENODEV on error, 0 on success (or no action)
9238105a3dbcSRobert Elliott  * allocates numerous items that must be freed later
9239105a3dbcSRobert Elliott  */
9240105a3dbcSRobert Elliott static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
92416c311b57SStephen M. Cameron {
92426c311b57SStephen M. Cameron 	u32 trans_support;
9243e1f7de0cSMatt Gates 	unsigned long transMethod = CFGTBL_Trans_Performant |
9244e1f7de0cSMatt Gates 					CFGTBL_Trans_use_short_tags;
9245105a3dbcSRobert Elliott 	int i, rc;
92466c311b57SStephen M. Cameron 
924702ec19c8SStephen M. Cameron 	if (hpsa_simple_mode)
9248105a3dbcSRobert Elliott 		return 0;
924902ec19c8SStephen M. Cameron 
925067c99a72Sscameron@beardog.cce.hp.com 	trans_support = readl(&(h->cfgtable->TransportSupport));
925167c99a72Sscameron@beardog.cce.hp.com 	if (!(trans_support & PERFORMANT_MODE))
9252105a3dbcSRobert Elliott 		return 0;
925367c99a72Sscameron@beardog.cce.hp.com 
9254e1f7de0cSMatt Gates 	/* Check for I/O accelerator mode support */
9255e1f7de0cSMatt Gates 	if (trans_support & CFGTBL_Trans_io_accel1) {
9256e1f7de0cSMatt Gates 		transMethod |= CFGTBL_Trans_io_accel1 |
9257e1f7de0cSMatt Gates 				CFGTBL_Trans_enable_directed_msix;
9258105a3dbcSRobert Elliott 		rc = hpsa_alloc_ioaccel1_cmd_and_bft(h);
9259105a3dbcSRobert Elliott 		if (rc)
9260105a3dbcSRobert Elliott 			return rc;
9261105a3dbcSRobert Elliott 	} else if (trans_support & CFGTBL_Trans_io_accel2) {
9262aca9012aSStephen M. Cameron 		transMethod |= CFGTBL_Trans_io_accel2 |
9263aca9012aSStephen M. Cameron 				CFGTBL_Trans_enable_directed_msix;
9264105a3dbcSRobert Elliott 		rc = hpsa_alloc_ioaccel2_cmd_and_bft(h);
9265105a3dbcSRobert Elliott 		if (rc)
9266105a3dbcSRobert Elliott 			return rc;
9267e1f7de0cSMatt Gates 	}
9268e1f7de0cSMatt Gates 
9269eee0f03aSHannes Reinecke 	h->nreply_queues = h->msix_vector > 0 ? h->msix_vector : 1;
9270cba3d38bSStephen M. Cameron 	hpsa_get_max_perf_mode_cmds(h);
92716c311b57SStephen M. Cameron 	/* Performant mode ring buffer and supporting data structures */
9272072b0518SStephen M. Cameron 	h->reply_queue_size = h->max_commands * sizeof(u64);
92736c311b57SStephen M. Cameron 
9274254f796bSMatt Gates 	for (i = 0; i < h->nreply_queues; i++) {
9275072b0518SStephen M. Cameron 		h->reply_queue[i].head = pci_alloc_consistent(h->pdev,
9276072b0518SStephen M. Cameron 						h->reply_queue_size,
9277072b0518SStephen M. Cameron 						&(h->reply_queue[i].busaddr));
9278105a3dbcSRobert Elliott 		if (!h->reply_queue[i].head) {
9279105a3dbcSRobert Elliott 			rc = -ENOMEM;
9280105a3dbcSRobert Elliott 			goto clean1;	/* rq, ioaccel */
9281105a3dbcSRobert Elliott 		}
9282254f796bSMatt Gates 		h->reply_queue[i].size = h->max_commands;
9283254f796bSMatt Gates 		h->reply_queue[i].wraparound = 1;  /* spec: init to 1 */
9284254f796bSMatt Gates 		h->reply_queue[i].current_entry = 0;
9285254f796bSMatt Gates 	}
9286254f796bSMatt Gates 
92876c311b57SStephen M. Cameron 	/* Need a block fetch table for performant mode */
9288d66ae08bSStephen M. Cameron 	h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
92896c311b57SStephen M. Cameron 				sizeof(u32)), GFP_KERNEL);
9290105a3dbcSRobert Elliott 	if (!h->blockFetchTable) {
9291105a3dbcSRobert Elliott 		rc = -ENOMEM;
9292105a3dbcSRobert Elliott 		goto clean1;	/* rq, ioaccel */
9293105a3dbcSRobert Elliott 	}
92946c311b57SStephen M. Cameron 
9295105a3dbcSRobert Elliott 	rc = hpsa_enter_performant_mode(h, trans_support);
9296105a3dbcSRobert Elliott 	if (rc)
9297105a3dbcSRobert Elliott 		goto clean2;	/* bft, rq, ioaccel */
9298105a3dbcSRobert Elliott 	return 0;
9299303932fdSDon Brace 
9300105a3dbcSRobert Elliott clean2:	/* bft, rq, ioaccel */
9301303932fdSDon Brace 	kfree(h->blockFetchTable);
9302105a3dbcSRobert Elliott 	h->blockFetchTable = NULL;
9303105a3dbcSRobert Elliott clean1:	/* rq, ioaccel */
9304105a3dbcSRobert Elliott 	hpsa_free_reply_queues(h);
9305105a3dbcSRobert Elliott 	hpsa_free_ioaccel1_cmd_and_bft(h);
9306105a3dbcSRobert Elliott 	hpsa_free_ioaccel2_cmd_and_bft(h);
9307105a3dbcSRobert Elliott 	return rc;
9308303932fdSDon Brace }
9309303932fdSDon Brace 
931023100dd9SStephen M. Cameron static int is_accelerated_cmd(struct CommandList *c)
931176438d08SStephen M. Cameron {
931223100dd9SStephen M. Cameron 	return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2;
931323100dd9SStephen M. Cameron }
931423100dd9SStephen M. Cameron 
931523100dd9SStephen M. Cameron static void hpsa_drain_accel_commands(struct ctlr_info *h)
931623100dd9SStephen M. Cameron {
931723100dd9SStephen M. Cameron 	struct CommandList *c = NULL;
9318f2405db8SDon Brace 	int i, accel_cmds_out;
9319281a7fd0SWebb Scales 	int refcount;
932076438d08SStephen M. Cameron 
9321f2405db8SDon Brace 	do { /* wait for all outstanding ioaccel commands to drain out */
932223100dd9SStephen M. Cameron 		accel_cmds_out = 0;
9323f2405db8SDon Brace 		for (i = 0; i < h->nr_cmds; i++) {
9324f2405db8SDon Brace 			c = h->cmd_pool + i;
9325281a7fd0SWebb Scales 			refcount = atomic_inc_return(&c->refcount);
9326281a7fd0SWebb Scales 			if (refcount > 1) /* Command is allocated */
932723100dd9SStephen M. Cameron 				accel_cmds_out += is_accelerated_cmd(c);
9328281a7fd0SWebb Scales 			cmd_free(h, c);
9329f2405db8SDon Brace 		}
933023100dd9SStephen M. Cameron 		if (accel_cmds_out <= 0)
933176438d08SStephen M. Cameron 			break;
933276438d08SStephen M. Cameron 		msleep(100);
933376438d08SStephen M. Cameron 	} while (1);
933476438d08SStephen M. Cameron }
933576438d08SStephen M. Cameron 
9336d04e62b9SKevin Barnett static struct hpsa_sas_phy *hpsa_alloc_sas_phy(
9337d04e62b9SKevin Barnett 				struct hpsa_sas_port *hpsa_sas_port)
9338d04e62b9SKevin Barnett {
9339d04e62b9SKevin Barnett 	struct hpsa_sas_phy *hpsa_sas_phy;
9340d04e62b9SKevin Barnett 	struct sas_phy *phy;
9341d04e62b9SKevin Barnett 
9342d04e62b9SKevin Barnett 	hpsa_sas_phy = kzalloc(sizeof(*hpsa_sas_phy), GFP_KERNEL);
9343d04e62b9SKevin Barnett 	if (!hpsa_sas_phy)
9344d04e62b9SKevin Barnett 		return NULL;
9345d04e62b9SKevin Barnett 
9346d04e62b9SKevin Barnett 	phy = sas_phy_alloc(hpsa_sas_port->parent_node->parent_dev,
9347d04e62b9SKevin Barnett 		hpsa_sas_port->next_phy_index);
9348d04e62b9SKevin Barnett 	if (!phy) {
9349d04e62b9SKevin Barnett 		kfree(hpsa_sas_phy);
9350d04e62b9SKevin Barnett 		return NULL;
9351d04e62b9SKevin Barnett 	}
9352d04e62b9SKevin Barnett 
9353d04e62b9SKevin Barnett 	hpsa_sas_port->next_phy_index++;
9354d04e62b9SKevin Barnett 	hpsa_sas_phy->phy = phy;
9355d04e62b9SKevin Barnett 	hpsa_sas_phy->parent_port = hpsa_sas_port;
9356d04e62b9SKevin Barnett 
9357d04e62b9SKevin Barnett 	return hpsa_sas_phy;
9358d04e62b9SKevin Barnett }
9359d04e62b9SKevin Barnett 
9360d04e62b9SKevin Barnett static void hpsa_free_sas_phy(struct hpsa_sas_phy *hpsa_sas_phy)
9361d04e62b9SKevin Barnett {
9362d04e62b9SKevin Barnett 	struct sas_phy *phy = hpsa_sas_phy->phy;
9363d04e62b9SKevin Barnett 
9364d04e62b9SKevin Barnett 	sas_port_delete_phy(hpsa_sas_phy->parent_port->port, phy);
9365d04e62b9SKevin Barnett 	sas_phy_free(phy);
9366d04e62b9SKevin Barnett 	if (hpsa_sas_phy->added_to_port)
9367d04e62b9SKevin Barnett 		list_del(&hpsa_sas_phy->phy_list_entry);
9368d04e62b9SKevin Barnett 	kfree(hpsa_sas_phy);
9369d04e62b9SKevin Barnett }
9370d04e62b9SKevin Barnett 
9371d04e62b9SKevin Barnett static int hpsa_sas_port_add_phy(struct hpsa_sas_phy *hpsa_sas_phy)
9372d04e62b9SKevin Barnett {
9373d04e62b9SKevin Barnett 	int rc;
9374d04e62b9SKevin Barnett 	struct hpsa_sas_port *hpsa_sas_port;
9375d04e62b9SKevin Barnett 	struct sas_phy *phy;
9376d04e62b9SKevin Barnett 	struct sas_identify *identify;
9377d04e62b9SKevin Barnett 
9378d04e62b9SKevin Barnett 	hpsa_sas_port = hpsa_sas_phy->parent_port;
9379d04e62b9SKevin Barnett 	phy = hpsa_sas_phy->phy;
9380d04e62b9SKevin Barnett 
9381d04e62b9SKevin Barnett 	identify = &phy->identify;
9382d04e62b9SKevin Barnett 	memset(identify, 0, sizeof(*identify));
9383d04e62b9SKevin Barnett 	identify->sas_address = hpsa_sas_port->sas_address;
9384d04e62b9SKevin Barnett 	identify->device_type = SAS_END_DEVICE;
9385d04e62b9SKevin Barnett 	identify->initiator_port_protocols = SAS_PROTOCOL_STP;
9386d04e62b9SKevin Barnett 	identify->target_port_protocols = SAS_PROTOCOL_STP;
9387d04e62b9SKevin Barnett 	phy->minimum_linkrate_hw = SAS_LINK_RATE_UNKNOWN;
9388d04e62b9SKevin Barnett 	phy->maximum_linkrate_hw = SAS_LINK_RATE_UNKNOWN;
9389d04e62b9SKevin Barnett 	phy->minimum_linkrate = SAS_LINK_RATE_UNKNOWN;
9390d04e62b9SKevin Barnett 	phy->maximum_linkrate = SAS_LINK_RATE_UNKNOWN;
9391d04e62b9SKevin Barnett 	phy->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN;
9392d04e62b9SKevin Barnett 
9393d04e62b9SKevin Barnett 	rc = sas_phy_add(hpsa_sas_phy->phy);
9394d04e62b9SKevin Barnett 	if (rc)
9395d04e62b9SKevin Barnett 		return rc;
9396d04e62b9SKevin Barnett 
9397d04e62b9SKevin Barnett 	sas_port_add_phy(hpsa_sas_port->port, hpsa_sas_phy->phy);
9398d04e62b9SKevin Barnett 	list_add_tail(&hpsa_sas_phy->phy_list_entry,
9399d04e62b9SKevin Barnett 			&hpsa_sas_port->phy_list_head);
9400d04e62b9SKevin Barnett 	hpsa_sas_phy->added_to_port = true;
9401d04e62b9SKevin Barnett 
9402d04e62b9SKevin Barnett 	return 0;
9403d04e62b9SKevin Barnett }
9404d04e62b9SKevin Barnett 
9405d04e62b9SKevin Barnett static int
9406d04e62b9SKevin Barnett 	hpsa_sas_port_add_rphy(struct hpsa_sas_port *hpsa_sas_port,
9407d04e62b9SKevin Barnett 				struct sas_rphy *rphy)
9408d04e62b9SKevin Barnett {
9409d04e62b9SKevin Barnett 	struct sas_identify *identify;
9410d04e62b9SKevin Barnett 
9411d04e62b9SKevin Barnett 	identify = &rphy->identify;
9412d04e62b9SKevin Barnett 	identify->sas_address = hpsa_sas_port->sas_address;
9413d04e62b9SKevin Barnett 	identify->initiator_port_protocols = SAS_PROTOCOL_STP;
9414d04e62b9SKevin Barnett 	identify->target_port_protocols = SAS_PROTOCOL_STP;
9415d04e62b9SKevin Barnett 
9416d04e62b9SKevin Barnett 	return sas_rphy_add(rphy);
9417d04e62b9SKevin Barnett }
9418d04e62b9SKevin Barnett 
9419d04e62b9SKevin Barnett static struct hpsa_sas_port
9420d04e62b9SKevin Barnett 	*hpsa_alloc_sas_port(struct hpsa_sas_node *hpsa_sas_node,
9421d04e62b9SKevin Barnett 				u64 sas_address)
9422d04e62b9SKevin Barnett {
9423d04e62b9SKevin Barnett 	int rc;
9424d04e62b9SKevin Barnett 	struct hpsa_sas_port *hpsa_sas_port;
9425d04e62b9SKevin Barnett 	struct sas_port *port;
9426d04e62b9SKevin Barnett 
9427d04e62b9SKevin Barnett 	hpsa_sas_port = kzalloc(sizeof(*hpsa_sas_port), GFP_KERNEL);
9428d04e62b9SKevin Barnett 	if (!hpsa_sas_port)
9429d04e62b9SKevin Barnett 		return NULL;
9430d04e62b9SKevin Barnett 
9431d04e62b9SKevin Barnett 	INIT_LIST_HEAD(&hpsa_sas_port->phy_list_head);
9432d04e62b9SKevin Barnett 	hpsa_sas_port->parent_node = hpsa_sas_node;
9433d04e62b9SKevin Barnett 
9434d04e62b9SKevin Barnett 	port = sas_port_alloc_num(hpsa_sas_node->parent_dev);
9435d04e62b9SKevin Barnett 	if (!port)
9436d04e62b9SKevin Barnett 		goto free_hpsa_port;
9437d04e62b9SKevin Barnett 
9438d04e62b9SKevin Barnett 	rc = sas_port_add(port);
9439d04e62b9SKevin Barnett 	if (rc)
9440d04e62b9SKevin Barnett 		goto free_sas_port;
9441d04e62b9SKevin Barnett 
9442d04e62b9SKevin Barnett 	hpsa_sas_port->port = port;
9443d04e62b9SKevin Barnett 	hpsa_sas_port->sas_address = sas_address;
9444d04e62b9SKevin Barnett 	list_add_tail(&hpsa_sas_port->port_list_entry,
9445d04e62b9SKevin Barnett 			&hpsa_sas_node->port_list_head);
9446d04e62b9SKevin Barnett 
9447d04e62b9SKevin Barnett 	return hpsa_sas_port;
9448d04e62b9SKevin Barnett 
9449d04e62b9SKevin Barnett free_sas_port:
9450d04e62b9SKevin Barnett 	sas_port_free(port);
9451d04e62b9SKevin Barnett free_hpsa_port:
9452d04e62b9SKevin Barnett 	kfree(hpsa_sas_port);
9453d04e62b9SKevin Barnett 
9454d04e62b9SKevin Barnett 	return NULL;
9455d04e62b9SKevin Barnett }
9456d04e62b9SKevin Barnett 
9457d04e62b9SKevin Barnett static void hpsa_free_sas_port(struct hpsa_sas_port *hpsa_sas_port)
9458d04e62b9SKevin Barnett {
9459d04e62b9SKevin Barnett 	struct hpsa_sas_phy *hpsa_sas_phy;
9460d04e62b9SKevin Barnett 	struct hpsa_sas_phy *next;
9461d04e62b9SKevin Barnett 
9462d04e62b9SKevin Barnett 	list_for_each_entry_safe(hpsa_sas_phy, next,
9463d04e62b9SKevin Barnett 			&hpsa_sas_port->phy_list_head, phy_list_entry)
9464d04e62b9SKevin Barnett 		hpsa_free_sas_phy(hpsa_sas_phy);
9465d04e62b9SKevin Barnett 
9466d04e62b9SKevin Barnett 	sas_port_delete(hpsa_sas_port->port);
9467d04e62b9SKevin Barnett 	list_del(&hpsa_sas_port->port_list_entry);
9468d04e62b9SKevin Barnett 	kfree(hpsa_sas_port);
9469d04e62b9SKevin Barnett }
9470d04e62b9SKevin Barnett 
9471d04e62b9SKevin Barnett static struct hpsa_sas_node *hpsa_alloc_sas_node(struct device *parent_dev)
9472d04e62b9SKevin Barnett {
9473d04e62b9SKevin Barnett 	struct hpsa_sas_node *hpsa_sas_node;
9474d04e62b9SKevin Barnett 
9475d04e62b9SKevin Barnett 	hpsa_sas_node = kzalloc(sizeof(*hpsa_sas_node), GFP_KERNEL);
9476d04e62b9SKevin Barnett 	if (hpsa_sas_node) {
9477d04e62b9SKevin Barnett 		hpsa_sas_node->parent_dev = parent_dev;
9478d04e62b9SKevin Barnett 		INIT_LIST_HEAD(&hpsa_sas_node->port_list_head);
9479d04e62b9SKevin Barnett 	}
9480d04e62b9SKevin Barnett 
9481d04e62b9SKevin Barnett 	return hpsa_sas_node;
9482d04e62b9SKevin Barnett }
9483d04e62b9SKevin Barnett 
9484d04e62b9SKevin Barnett static void hpsa_free_sas_node(struct hpsa_sas_node *hpsa_sas_node)
9485d04e62b9SKevin Barnett {
9486d04e62b9SKevin Barnett 	struct hpsa_sas_port *hpsa_sas_port;
9487d04e62b9SKevin Barnett 	struct hpsa_sas_port *next;
9488d04e62b9SKevin Barnett 
9489d04e62b9SKevin Barnett 	if (!hpsa_sas_node)
9490d04e62b9SKevin Barnett 		return;
9491d04e62b9SKevin Barnett 
9492d04e62b9SKevin Barnett 	list_for_each_entry_safe(hpsa_sas_port, next,
9493d04e62b9SKevin Barnett 			&hpsa_sas_node->port_list_head, port_list_entry)
9494d04e62b9SKevin Barnett 		hpsa_free_sas_port(hpsa_sas_port);
9495d04e62b9SKevin Barnett 
9496d04e62b9SKevin Barnett 	kfree(hpsa_sas_node);
9497d04e62b9SKevin Barnett }
9498d04e62b9SKevin Barnett 
9499d04e62b9SKevin Barnett static struct hpsa_scsi_dev_t
9500d04e62b9SKevin Barnett 	*hpsa_find_device_by_sas_rphy(struct ctlr_info *h,
9501d04e62b9SKevin Barnett 					struct sas_rphy *rphy)
9502d04e62b9SKevin Barnett {
9503d04e62b9SKevin Barnett 	int i;
9504d04e62b9SKevin Barnett 	struct hpsa_scsi_dev_t *device;
9505d04e62b9SKevin Barnett 
9506d04e62b9SKevin Barnett 	for (i = 0; i < h->ndevices; i++) {
9507d04e62b9SKevin Barnett 		device = h->dev[i];
9508d04e62b9SKevin Barnett 		if (!device->sas_port)
9509d04e62b9SKevin Barnett 			continue;
9510d04e62b9SKevin Barnett 		if (device->sas_port->rphy == rphy)
9511d04e62b9SKevin Barnett 			return device;
9512d04e62b9SKevin Barnett 	}
9513d04e62b9SKevin Barnett 
9514d04e62b9SKevin Barnett 	return NULL;
9515d04e62b9SKevin Barnett }
9516d04e62b9SKevin Barnett 
9517d04e62b9SKevin Barnett static int hpsa_add_sas_host(struct ctlr_info *h)
9518d04e62b9SKevin Barnett {
9519d04e62b9SKevin Barnett 	int rc;
9520d04e62b9SKevin Barnett 	struct device *parent_dev;
9521d04e62b9SKevin Barnett 	struct hpsa_sas_node *hpsa_sas_node;
9522d04e62b9SKevin Barnett 	struct hpsa_sas_port *hpsa_sas_port;
9523d04e62b9SKevin Barnett 	struct hpsa_sas_phy *hpsa_sas_phy;
9524d04e62b9SKevin Barnett 
9525d04e62b9SKevin Barnett 	parent_dev = &h->scsi_host->shost_gendev;
9526d04e62b9SKevin Barnett 
9527d04e62b9SKevin Barnett 	hpsa_sas_node = hpsa_alloc_sas_node(parent_dev);
9528d04e62b9SKevin Barnett 	if (!hpsa_sas_node)
9529d04e62b9SKevin Barnett 		return -ENOMEM;
9530d04e62b9SKevin Barnett 
9531d04e62b9SKevin Barnett 	hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, h->sas_address);
9532d04e62b9SKevin Barnett 	if (!hpsa_sas_port) {
9533d04e62b9SKevin Barnett 		rc = -ENODEV;
9534d04e62b9SKevin Barnett 		goto free_sas_node;
9535d04e62b9SKevin Barnett 	}
9536d04e62b9SKevin Barnett 
9537d04e62b9SKevin Barnett 	hpsa_sas_phy = hpsa_alloc_sas_phy(hpsa_sas_port);
9538d04e62b9SKevin Barnett 	if (!hpsa_sas_phy) {
9539d04e62b9SKevin Barnett 		rc = -ENODEV;
9540d04e62b9SKevin Barnett 		goto free_sas_port;
9541d04e62b9SKevin Barnett 	}
9542d04e62b9SKevin Barnett 
9543d04e62b9SKevin Barnett 	rc = hpsa_sas_port_add_phy(hpsa_sas_phy);
9544d04e62b9SKevin Barnett 	if (rc)
9545d04e62b9SKevin Barnett 		goto free_sas_phy;
9546d04e62b9SKevin Barnett 
9547d04e62b9SKevin Barnett 	h->sas_host = hpsa_sas_node;
9548d04e62b9SKevin Barnett 
9549d04e62b9SKevin Barnett 	return 0;
9550d04e62b9SKevin Barnett 
9551d04e62b9SKevin Barnett free_sas_phy:
9552d04e62b9SKevin Barnett 	hpsa_free_sas_phy(hpsa_sas_phy);
9553d04e62b9SKevin Barnett free_sas_port:
9554d04e62b9SKevin Barnett 	hpsa_free_sas_port(hpsa_sas_port);
9555d04e62b9SKevin Barnett free_sas_node:
9556d04e62b9SKevin Barnett 	hpsa_free_sas_node(hpsa_sas_node);
9557d04e62b9SKevin Barnett 
9558d04e62b9SKevin Barnett 	return rc;
9559d04e62b9SKevin Barnett }
9560d04e62b9SKevin Barnett 
9561d04e62b9SKevin Barnett static void hpsa_delete_sas_host(struct ctlr_info *h)
9562d04e62b9SKevin Barnett {
9563d04e62b9SKevin Barnett 	hpsa_free_sas_node(h->sas_host);
9564d04e62b9SKevin Barnett }
9565d04e62b9SKevin Barnett 
9566d04e62b9SKevin Barnett static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node,
9567d04e62b9SKevin Barnett 				struct hpsa_scsi_dev_t *device)
9568d04e62b9SKevin Barnett {
9569d04e62b9SKevin Barnett 	int rc;
9570d04e62b9SKevin Barnett 	struct hpsa_sas_port *hpsa_sas_port;
9571d04e62b9SKevin Barnett 	struct sas_rphy *rphy;
9572d04e62b9SKevin Barnett 
9573d04e62b9SKevin Barnett 	hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, device->sas_address);
9574d04e62b9SKevin Barnett 	if (!hpsa_sas_port)
9575d04e62b9SKevin Barnett 		return -ENOMEM;
9576d04e62b9SKevin Barnett 
9577d04e62b9SKevin Barnett 	rphy = sas_end_device_alloc(hpsa_sas_port->port);
9578d04e62b9SKevin Barnett 	if (!rphy) {
9579d04e62b9SKevin Barnett 		rc = -ENODEV;
9580d04e62b9SKevin Barnett 		goto free_sas_port;
9581d04e62b9SKevin Barnett 	}
9582d04e62b9SKevin Barnett 
9583d04e62b9SKevin Barnett 	hpsa_sas_port->rphy = rphy;
9584d04e62b9SKevin Barnett 	device->sas_port = hpsa_sas_port;
9585d04e62b9SKevin Barnett 
9586d04e62b9SKevin Barnett 	rc = hpsa_sas_port_add_rphy(hpsa_sas_port, rphy);
9587d04e62b9SKevin Barnett 	if (rc)
9588d04e62b9SKevin Barnett 		goto free_sas_port;
9589d04e62b9SKevin Barnett 
9590d04e62b9SKevin Barnett 	return 0;
9591d04e62b9SKevin Barnett 
9592d04e62b9SKevin Barnett free_sas_port:
9593d04e62b9SKevin Barnett 	hpsa_free_sas_port(hpsa_sas_port);
9594d04e62b9SKevin Barnett 	device->sas_port = NULL;
9595d04e62b9SKevin Barnett 
9596d04e62b9SKevin Barnett 	return rc;
9597d04e62b9SKevin Barnett }
9598d04e62b9SKevin Barnett 
9599d04e62b9SKevin Barnett static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device)
9600d04e62b9SKevin Barnett {
9601d04e62b9SKevin Barnett 	if (device->sas_port) {
9602d04e62b9SKevin Barnett 		hpsa_free_sas_port(device->sas_port);
9603d04e62b9SKevin Barnett 		device->sas_port = NULL;
9604d04e62b9SKevin Barnett 	}
9605d04e62b9SKevin Barnett }
9606d04e62b9SKevin Barnett 
9607d04e62b9SKevin Barnett static int
9608d04e62b9SKevin Barnett hpsa_sas_get_linkerrors(struct sas_phy *phy)
9609d04e62b9SKevin Barnett {
9610d04e62b9SKevin Barnett 	return 0;
9611d04e62b9SKevin Barnett }
9612d04e62b9SKevin Barnett 
9613d04e62b9SKevin Barnett static int
9614d04e62b9SKevin Barnett hpsa_sas_get_enclosure_identifier(struct sas_rphy *rphy, u64 *identifier)
9615d04e62b9SKevin Barnett {
9616d04e62b9SKevin Barnett 	return 0;
9617d04e62b9SKevin Barnett }
9618d04e62b9SKevin Barnett 
9619d04e62b9SKevin Barnett static int
9620d04e62b9SKevin Barnett hpsa_sas_get_bay_identifier(struct sas_rphy *rphy)
9621d04e62b9SKevin Barnett {
9622d04e62b9SKevin Barnett 	return -ENXIO;
9623d04e62b9SKevin Barnett }
9624d04e62b9SKevin Barnett 
9625d04e62b9SKevin Barnett static int
9626d04e62b9SKevin Barnett hpsa_sas_phy_reset(struct sas_phy *phy, int hard_reset)
9627d04e62b9SKevin Barnett {
9628d04e62b9SKevin Barnett 	return 0;
9629d04e62b9SKevin Barnett }
9630d04e62b9SKevin Barnett 
9631d04e62b9SKevin Barnett static int
9632d04e62b9SKevin Barnett hpsa_sas_phy_enable(struct sas_phy *phy, int enable)
9633d04e62b9SKevin Barnett {
9634d04e62b9SKevin Barnett 	return 0;
9635d04e62b9SKevin Barnett }
9636d04e62b9SKevin Barnett 
9637d04e62b9SKevin Barnett static int
9638d04e62b9SKevin Barnett hpsa_sas_phy_setup(struct sas_phy *phy)
9639d04e62b9SKevin Barnett {
9640d04e62b9SKevin Barnett 	return 0;
9641d04e62b9SKevin Barnett }
9642d04e62b9SKevin Barnett 
9643d04e62b9SKevin Barnett static void
9644d04e62b9SKevin Barnett hpsa_sas_phy_release(struct sas_phy *phy)
9645d04e62b9SKevin Barnett {
9646d04e62b9SKevin Barnett }
9647d04e62b9SKevin Barnett 
9648d04e62b9SKevin Barnett static int
9649d04e62b9SKevin Barnett hpsa_sas_phy_speed(struct sas_phy *phy, struct sas_phy_linkrates *rates)
9650d04e62b9SKevin Barnett {
9651d04e62b9SKevin Barnett 	return -EINVAL;
9652d04e62b9SKevin Barnett }
9653d04e62b9SKevin Barnett 
9654d04e62b9SKevin Barnett /* SMP = Serial Management Protocol */
9655d04e62b9SKevin Barnett static int
9656d04e62b9SKevin Barnett hpsa_sas_smp_handler(struct Scsi_Host *shost, struct sas_rphy *rphy,
9657d04e62b9SKevin Barnett struct request *req)
9658d04e62b9SKevin Barnett {
9659d04e62b9SKevin Barnett 	return -EINVAL;
9660d04e62b9SKevin Barnett }
9661d04e62b9SKevin Barnett 
9662d04e62b9SKevin Barnett static struct sas_function_template hpsa_sas_transport_functions = {
9663d04e62b9SKevin Barnett 	.get_linkerrors = hpsa_sas_get_linkerrors,
9664d04e62b9SKevin Barnett 	.get_enclosure_identifier = hpsa_sas_get_enclosure_identifier,
9665d04e62b9SKevin Barnett 	.get_bay_identifier = hpsa_sas_get_bay_identifier,
9666d04e62b9SKevin Barnett 	.phy_reset = hpsa_sas_phy_reset,
9667d04e62b9SKevin Barnett 	.phy_enable = hpsa_sas_phy_enable,
9668d04e62b9SKevin Barnett 	.phy_setup = hpsa_sas_phy_setup,
9669d04e62b9SKevin Barnett 	.phy_release = hpsa_sas_phy_release,
9670d04e62b9SKevin Barnett 	.set_phy_speed = hpsa_sas_phy_speed,
9671d04e62b9SKevin Barnett 	.smp_handler = hpsa_sas_smp_handler,
9672d04e62b9SKevin Barnett };
9673d04e62b9SKevin Barnett 
9674edd16368SStephen M. Cameron /*
9675edd16368SStephen M. Cameron  *  This is it.  Register the PCI driver information for the cards we control
9676edd16368SStephen M. Cameron  *  the OS will call our registered routines when it finds one of our cards.
9677edd16368SStephen M. Cameron  */
9678edd16368SStephen M. Cameron static int __init hpsa_init(void)
9679edd16368SStephen M. Cameron {
9680d04e62b9SKevin Barnett 	int rc;
9681d04e62b9SKevin Barnett 
9682d04e62b9SKevin Barnett 	hpsa_sas_transport_template =
9683d04e62b9SKevin Barnett 		sas_attach_transport(&hpsa_sas_transport_functions);
9684d04e62b9SKevin Barnett 	if (!hpsa_sas_transport_template)
9685d04e62b9SKevin Barnett 		return -ENODEV;
9686d04e62b9SKevin Barnett 
9687d04e62b9SKevin Barnett 	rc = pci_register_driver(&hpsa_pci_driver);
9688d04e62b9SKevin Barnett 
9689d04e62b9SKevin Barnett 	if (rc)
9690d04e62b9SKevin Barnett 		sas_release_transport(hpsa_sas_transport_template);
9691d04e62b9SKevin Barnett 
9692d04e62b9SKevin Barnett 	return rc;
9693edd16368SStephen M. Cameron }
9694edd16368SStephen M. Cameron 
9695edd16368SStephen M. Cameron static void __exit hpsa_cleanup(void)
9696edd16368SStephen M. Cameron {
9697edd16368SStephen M. Cameron 	pci_unregister_driver(&hpsa_pci_driver);
9698d04e62b9SKevin Barnett 	sas_release_transport(hpsa_sas_transport_template);
9699edd16368SStephen M. Cameron }
9700edd16368SStephen M. Cameron 
9701e1f7de0cSMatt Gates static void __attribute__((unused)) verify_offsets(void)
9702e1f7de0cSMatt Gates {
9703e1f7de0cSMatt Gates #define VERIFY_OFFSET(member, offset) \
9704dd0e19f3SScott Teel 	BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset)
9705dd0e19f3SScott Teel 
9706dd0e19f3SScott Teel 	VERIFY_OFFSET(structure_size, 0);
9707dd0e19f3SScott Teel 	VERIFY_OFFSET(volume_blk_size, 4);
9708dd0e19f3SScott Teel 	VERIFY_OFFSET(volume_blk_cnt, 8);
9709dd0e19f3SScott Teel 	VERIFY_OFFSET(phys_blk_shift, 16);
9710dd0e19f3SScott Teel 	VERIFY_OFFSET(parity_rotation_shift, 17);
9711dd0e19f3SScott Teel 	VERIFY_OFFSET(strip_size, 18);
9712dd0e19f3SScott Teel 	VERIFY_OFFSET(disk_starting_blk, 20);
9713dd0e19f3SScott Teel 	VERIFY_OFFSET(disk_blk_cnt, 28);
9714dd0e19f3SScott Teel 	VERIFY_OFFSET(data_disks_per_row, 36);
9715dd0e19f3SScott Teel 	VERIFY_OFFSET(metadata_disks_per_row, 38);
9716dd0e19f3SScott Teel 	VERIFY_OFFSET(row_cnt, 40);
9717dd0e19f3SScott Teel 	VERIFY_OFFSET(layout_map_count, 42);
9718dd0e19f3SScott Teel 	VERIFY_OFFSET(flags, 44);
9719dd0e19f3SScott Teel 	VERIFY_OFFSET(dekindex, 46);
9720dd0e19f3SScott Teel 	/* VERIFY_OFFSET(reserved, 48 */
9721dd0e19f3SScott Teel 	VERIFY_OFFSET(data, 64);
9722dd0e19f3SScott Teel 
9723dd0e19f3SScott Teel #undef VERIFY_OFFSET
9724dd0e19f3SScott Teel 
9725dd0e19f3SScott Teel #define VERIFY_OFFSET(member, offset) \
9726b66cc250SMike Miller 	BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset)
9727b66cc250SMike Miller 
9728b66cc250SMike Miller 	VERIFY_OFFSET(IU_type, 0);
9729b66cc250SMike Miller 	VERIFY_OFFSET(direction, 1);
9730b66cc250SMike Miller 	VERIFY_OFFSET(reply_queue, 2);
9731b66cc250SMike Miller 	/* VERIFY_OFFSET(reserved1, 3);  */
9732b66cc250SMike Miller 	VERIFY_OFFSET(scsi_nexus, 4);
9733b66cc250SMike Miller 	VERIFY_OFFSET(Tag, 8);
9734b66cc250SMike Miller 	VERIFY_OFFSET(cdb, 16);
9735b66cc250SMike Miller 	VERIFY_OFFSET(cciss_lun, 32);
9736b66cc250SMike Miller 	VERIFY_OFFSET(data_len, 40);
9737b66cc250SMike Miller 	VERIFY_OFFSET(cmd_priority_task_attr, 44);
9738b66cc250SMike Miller 	VERIFY_OFFSET(sg_count, 45);
9739b66cc250SMike Miller 	/* VERIFY_OFFSET(reserved3 */
9740b66cc250SMike Miller 	VERIFY_OFFSET(err_ptr, 48);
9741b66cc250SMike Miller 	VERIFY_OFFSET(err_len, 56);
9742b66cc250SMike Miller 	/* VERIFY_OFFSET(reserved4  */
9743b66cc250SMike Miller 	VERIFY_OFFSET(sg, 64);
9744b66cc250SMike Miller 
9745b66cc250SMike Miller #undef VERIFY_OFFSET
9746b66cc250SMike Miller 
9747b66cc250SMike Miller #define VERIFY_OFFSET(member, offset) \
9748e1f7de0cSMatt Gates 	BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset)
9749e1f7de0cSMatt Gates 
9750e1f7de0cSMatt Gates 	VERIFY_OFFSET(dev_handle, 0x00);
9751e1f7de0cSMatt Gates 	VERIFY_OFFSET(reserved1, 0x02);
9752e1f7de0cSMatt Gates 	VERIFY_OFFSET(function, 0x03);
9753e1f7de0cSMatt Gates 	VERIFY_OFFSET(reserved2, 0x04);
9754e1f7de0cSMatt Gates 	VERIFY_OFFSET(err_info, 0x0C);
9755e1f7de0cSMatt Gates 	VERIFY_OFFSET(reserved3, 0x10);
9756e1f7de0cSMatt Gates 	VERIFY_OFFSET(err_info_len, 0x12);
9757e1f7de0cSMatt Gates 	VERIFY_OFFSET(reserved4, 0x13);
9758e1f7de0cSMatt Gates 	VERIFY_OFFSET(sgl_offset, 0x14);
9759e1f7de0cSMatt Gates 	VERIFY_OFFSET(reserved5, 0x15);
9760e1f7de0cSMatt Gates 	VERIFY_OFFSET(transfer_len, 0x1C);
9761e1f7de0cSMatt Gates 	VERIFY_OFFSET(reserved6, 0x20);
9762e1f7de0cSMatt Gates 	VERIFY_OFFSET(io_flags, 0x24);
9763e1f7de0cSMatt Gates 	VERIFY_OFFSET(reserved7, 0x26);
9764e1f7de0cSMatt Gates 	VERIFY_OFFSET(LUN, 0x34);
9765e1f7de0cSMatt Gates 	VERIFY_OFFSET(control, 0x3C);
9766e1f7de0cSMatt Gates 	VERIFY_OFFSET(CDB, 0x40);
9767e1f7de0cSMatt Gates 	VERIFY_OFFSET(reserved8, 0x50);
9768e1f7de0cSMatt Gates 	VERIFY_OFFSET(host_context_flags, 0x60);
9769e1f7de0cSMatt Gates 	VERIFY_OFFSET(timeout_sec, 0x62);
9770e1f7de0cSMatt Gates 	VERIFY_OFFSET(ReplyQueue, 0x64);
9771e1f7de0cSMatt Gates 	VERIFY_OFFSET(reserved9, 0x65);
977250a0decfSStephen M. Cameron 	VERIFY_OFFSET(tag, 0x68);
9773e1f7de0cSMatt Gates 	VERIFY_OFFSET(host_addr, 0x70);
9774e1f7de0cSMatt Gates 	VERIFY_OFFSET(CISS_LUN, 0x78);
9775e1f7de0cSMatt Gates 	VERIFY_OFFSET(SG, 0x78 + 8);
9776e1f7de0cSMatt Gates #undef VERIFY_OFFSET
9777e1f7de0cSMatt Gates }
9778e1f7de0cSMatt Gates 
9779edd16368SStephen M. Cameron module_init(hpsa_init);
9780edd16368SStephen M. Cameron module_exit(hpsa_cleanup);
9781