1edd16368SStephen M. Cameron /* 2edd16368SStephen M. Cameron * Disk Array driver for HP Smart Array SAS controllers 394c7bc31SDon Brace * Copyright 2016 Microsemi Corporation 41358f6dcSDon Brace * Copyright 2014-2015 PMC-Sierra, Inc. 51358f6dcSDon Brace * Copyright 2000,2009-2015 Hewlett-Packard Development Company, L.P. 6edd16368SStephen M. Cameron * 7edd16368SStephen M. Cameron * This program is free software; you can redistribute it and/or modify 8edd16368SStephen M. Cameron * it under the terms of the GNU General Public License as published by 9edd16368SStephen M. Cameron * the Free Software Foundation; version 2 of the License. 10edd16368SStephen M. Cameron * 11edd16368SStephen M. Cameron * This program is distributed in the hope that it will be useful, 12edd16368SStephen M. Cameron * but WITHOUT ANY WARRANTY; without even the implied warranty of 13edd16368SStephen M. Cameron * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or 14edd16368SStephen M. Cameron * NON INFRINGEMENT. See the GNU General Public License for more details. 15edd16368SStephen M. Cameron * 1694c7bc31SDon Brace * Questions/Comments/Bugfixes to esc.storagedev@microsemi.com 17edd16368SStephen M. Cameron * 18edd16368SStephen M. Cameron */ 19edd16368SStephen M. Cameron 20edd16368SStephen M. Cameron #include <linux/module.h> 21edd16368SStephen M. Cameron #include <linux/interrupt.h> 22edd16368SStephen M. Cameron #include <linux/types.h> 23edd16368SStephen M. Cameron #include <linux/pci.h> 24e5a44df8SMatthew Garrett #include <linux/pci-aspm.h> 25edd16368SStephen M. Cameron #include <linux/kernel.h> 26edd16368SStephen M. Cameron #include <linux/slab.h> 27edd16368SStephen M. Cameron #include <linux/delay.h> 28edd16368SStephen M. Cameron #include <linux/fs.h> 29edd16368SStephen M. Cameron #include <linux/timer.h> 30edd16368SStephen M. Cameron #include <linux/init.h> 31edd16368SStephen M. Cameron #include <linux/spinlock.h> 32edd16368SStephen M. Cameron #include <linux/compat.h> 33edd16368SStephen M. Cameron #include <linux/blktrace_api.h> 34edd16368SStephen M. Cameron #include <linux/uaccess.h> 35edd16368SStephen M. Cameron #include <linux/io.h> 36edd16368SStephen M. Cameron #include <linux/dma-mapping.h> 37edd16368SStephen M. Cameron #include <linux/completion.h> 38edd16368SStephen M. Cameron #include <linux/moduleparam.h> 39edd16368SStephen M. Cameron #include <scsi/scsi.h> 40edd16368SStephen M. Cameron #include <scsi/scsi_cmnd.h> 41edd16368SStephen M. Cameron #include <scsi/scsi_device.h> 42edd16368SStephen M. Cameron #include <scsi/scsi_host.h> 43667e23d4SStephen M. Cameron #include <scsi/scsi_tcq.h> 449437ac43SStephen Cameron #include <scsi/scsi_eh.h> 45d04e62b9SKevin Barnett #include <scsi/scsi_transport_sas.h> 4673153fe5SWebb Scales #include <scsi/scsi_dbg.h> 47edd16368SStephen M. Cameron #include <linux/cciss_ioctl.h> 48edd16368SStephen M. Cameron #include <linux/string.h> 49edd16368SStephen M. Cameron #include <linux/bitmap.h> 5060063497SArun Sharma #include <linux/atomic.h> 51a0c12413SStephen M. Cameron #include <linux/jiffies.h> 5242a91641SDon Brace #include <linux/percpu-defs.h> 53094963daSStephen M. Cameron #include <linux/percpu.h> 542b08b3e9SDon Brace #include <asm/unaligned.h> 55283b4a9bSStephen M. Cameron #include <asm/div64.h> 56edd16368SStephen M. Cameron #include "hpsa_cmd.h" 57edd16368SStephen M. Cameron #include "hpsa.h" 58edd16368SStephen M. Cameron 59ec2c3aa9SDon Brace /* 60ec2c3aa9SDon Brace * HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' 61ec2c3aa9SDon Brace * with an optional trailing '-' followed by a byte value (0-255). 62ec2c3aa9SDon Brace */ 63ff54aee4SDon Brace #define HPSA_DRIVER_VERSION "3.4.16-0" 64edd16368SStephen M. Cameron #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")" 65f79cfec6SStephen M. Cameron #define HPSA "hpsa" 66edd16368SStephen M. Cameron 67007e7aa9SRobert Elliott /* How long to wait for CISS doorbell communication */ 68007e7aa9SRobert Elliott #define CLEAR_EVENT_WAIT_INTERVAL 20 /* ms for each msleep() call */ 69007e7aa9SRobert Elliott #define MODE_CHANGE_WAIT_INTERVAL 10 /* ms for each msleep() call */ 70007e7aa9SRobert Elliott #define MAX_CLEAR_EVENT_WAIT 30000 /* times 20 ms = 600 s */ 71007e7aa9SRobert Elliott #define MAX_MODE_CHANGE_WAIT 2000 /* times 10 ms = 20 s */ 72edd16368SStephen M. Cameron #define MAX_IOCTL_CONFIG_WAIT 1000 73edd16368SStephen M. Cameron 74edd16368SStephen M. Cameron /*define how many times we will try a command because of bus resets */ 75edd16368SStephen M. Cameron #define MAX_CMD_RETRIES 3 76edd16368SStephen M. Cameron 77edd16368SStephen M. Cameron /* Embedded module documentation macros - see modules.h */ 78edd16368SStephen M. Cameron MODULE_AUTHOR("Hewlett-Packard Company"); 79edd16368SStephen M. Cameron MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \ 80edd16368SStephen M. Cameron HPSA_DRIVER_VERSION); 81edd16368SStephen M. Cameron MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers"); 82edd16368SStephen M. Cameron MODULE_VERSION(HPSA_DRIVER_VERSION); 83edd16368SStephen M. Cameron MODULE_LICENSE("GPL"); 84edd16368SStephen M. Cameron 85edd16368SStephen M. Cameron static int hpsa_allow_any; 86edd16368SStephen M. Cameron module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR); 87edd16368SStephen M. Cameron MODULE_PARM_DESC(hpsa_allow_any, 88edd16368SStephen M. Cameron "Allow hpsa driver to access unknown HP Smart Array hardware"); 8902ec19c8SStephen M. Cameron static int hpsa_simple_mode; 9002ec19c8SStephen M. Cameron module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR); 9102ec19c8SStephen M. Cameron MODULE_PARM_DESC(hpsa_simple_mode, 9202ec19c8SStephen M. Cameron "Use 'simple mode' rather than 'performant mode'"); 93edd16368SStephen M. Cameron 94edd16368SStephen M. Cameron /* define the PCI info for the cards we can control */ 95edd16368SStephen M. Cameron static const struct pci_device_id hpsa_pci_device_id[] = { 96edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241}, 97edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243}, 98edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245}, 99edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247}, 100edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249}, 101163dbcd8SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A}, 102163dbcd8SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B}, 103f8b01eb9SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233}, 1049143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350}, 1059143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351}, 1069143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352}, 1079143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353}, 1089143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354}, 1099143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355}, 1109143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356}, 111fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1921}, 112fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1922}, 113fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1923}, 114fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1924}, 115fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1926}, 116fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1928}, 11797b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1929}, 11897b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BD}, 11997b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BE}, 12097b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BF}, 12197b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C0}, 12297b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C1}, 12397b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C2}, 12497b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C3}, 12597b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C4}, 12697b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C5}, 1273b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C6}, 12897b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C7}, 12997b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C8}, 13097b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C9}, 1313b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CA}, 1323b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CB}, 1333b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CC}, 1343b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CD}, 1353b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CE}, 136fdfa4b6dSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0580}, 137cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0581}, 138cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0582}, 139cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0583}, 140cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0584}, 141cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0585}, 1428e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076}, 1438e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087}, 1448e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D}, 1458e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088}, 1468e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f}, 147edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 148edd16368SStephen M. Cameron PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0}, 149edd16368SStephen M. Cameron {0,} 150edd16368SStephen M. Cameron }; 151edd16368SStephen M. Cameron 152edd16368SStephen M. Cameron MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id); 153edd16368SStephen M. Cameron 154edd16368SStephen M. Cameron /* board_id = Subsystem Device ID & Vendor ID 155edd16368SStephen M. Cameron * product = Marketing Name for the board 156edd16368SStephen M. Cameron * access = Address of the struct of function pointers 157edd16368SStephen M. Cameron */ 158edd16368SStephen M. Cameron static struct board_type products[] = { 159edd16368SStephen M. Cameron {0x3241103C, "Smart Array P212", &SA5_access}, 160edd16368SStephen M. Cameron {0x3243103C, "Smart Array P410", &SA5_access}, 161edd16368SStephen M. Cameron {0x3245103C, "Smart Array P410i", &SA5_access}, 162edd16368SStephen M. Cameron {0x3247103C, "Smart Array P411", &SA5_access}, 163edd16368SStephen M. Cameron {0x3249103C, "Smart Array P812", &SA5_access}, 164163dbcd8SMike Miller {0x324A103C, "Smart Array P712m", &SA5_access}, 165163dbcd8SMike Miller {0x324B103C, "Smart Array P711m", &SA5_access}, 1667d2cce58SStephen M. Cameron {0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */ 167fe0c9610SMike Miller {0x3350103C, "Smart Array P222", &SA5_access}, 168fe0c9610SMike Miller {0x3351103C, "Smart Array P420", &SA5_access}, 169fe0c9610SMike Miller {0x3352103C, "Smart Array P421", &SA5_access}, 170fe0c9610SMike Miller {0x3353103C, "Smart Array P822", &SA5_access}, 171fe0c9610SMike Miller {0x3354103C, "Smart Array P420i", &SA5_access}, 172fe0c9610SMike Miller {0x3355103C, "Smart Array P220i", &SA5_access}, 173fe0c9610SMike Miller {0x3356103C, "Smart Array P721m", &SA5_access}, 1741fd6c8e3SMike Miller {0x1921103C, "Smart Array P830i", &SA5_access}, 1751fd6c8e3SMike Miller {0x1922103C, "Smart Array P430", &SA5_access}, 1761fd6c8e3SMike Miller {0x1923103C, "Smart Array P431", &SA5_access}, 1771fd6c8e3SMike Miller {0x1924103C, "Smart Array P830", &SA5_access}, 1781fd6c8e3SMike Miller {0x1926103C, "Smart Array P731m", &SA5_access}, 1791fd6c8e3SMike Miller {0x1928103C, "Smart Array P230i", &SA5_access}, 1801fd6c8e3SMike Miller {0x1929103C, "Smart Array P530", &SA5_access}, 18127fb8137SDon Brace {0x21BD103C, "Smart Array P244br", &SA5_access}, 18227fb8137SDon Brace {0x21BE103C, "Smart Array P741m", &SA5_access}, 18327fb8137SDon Brace {0x21BF103C, "Smart HBA H240ar", &SA5_access}, 18427fb8137SDon Brace {0x21C0103C, "Smart Array P440ar", &SA5_access}, 185c8ae0ab1SDon Brace {0x21C1103C, "Smart Array P840ar", &SA5_access}, 18627fb8137SDon Brace {0x21C2103C, "Smart Array P440", &SA5_access}, 18727fb8137SDon Brace {0x21C3103C, "Smart Array P441", &SA5_access}, 18897b9f53dSMike Miller {0x21C4103C, "Smart Array", &SA5_access}, 18927fb8137SDon Brace {0x21C5103C, "Smart Array P841", &SA5_access}, 19027fb8137SDon Brace {0x21C6103C, "Smart HBA H244br", &SA5_access}, 19127fb8137SDon Brace {0x21C7103C, "Smart HBA H240", &SA5_access}, 19227fb8137SDon Brace {0x21C8103C, "Smart HBA H241", &SA5_access}, 19397b9f53dSMike Miller {0x21C9103C, "Smart Array", &SA5_access}, 19427fb8137SDon Brace {0x21CA103C, "Smart Array P246br", &SA5_access}, 19527fb8137SDon Brace {0x21CB103C, "Smart Array P840", &SA5_access}, 1963b7a45e5SJoe Handzik {0x21CC103C, "Smart Array", &SA5_access}, 1973b7a45e5SJoe Handzik {0x21CD103C, "Smart Array", &SA5_access}, 19827fb8137SDon Brace {0x21CE103C, "Smart HBA", &SA5_access}, 199fdfa4b6dSDon Brace {0x05809005, "SmartHBA-SA", &SA5_access}, 200cbb47dcbSDon Brace {0x05819005, "SmartHBA-SA 8i", &SA5_access}, 201cbb47dcbSDon Brace {0x05829005, "SmartHBA-SA 8i8e", &SA5_access}, 202cbb47dcbSDon Brace {0x05839005, "SmartHBA-SA 8e", &SA5_access}, 203cbb47dcbSDon Brace {0x05849005, "SmartHBA-SA 16i", &SA5_access}, 204cbb47dcbSDon Brace {0x05859005, "SmartHBA-SA 4i4e", &SA5_access}, 2058e616a5eSStephen M. Cameron {0x00761590, "HP Storage P1224 Array Controller", &SA5_access}, 2068e616a5eSStephen M. Cameron {0x00871590, "HP Storage P1224e Array Controller", &SA5_access}, 2078e616a5eSStephen M. Cameron {0x007D1590, "HP Storage P1228 Array Controller", &SA5_access}, 2088e616a5eSStephen M. Cameron {0x00881590, "HP Storage P1228e Array Controller", &SA5_access}, 2098e616a5eSStephen M. Cameron {0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access}, 210edd16368SStephen M. Cameron {0xFFFF103C, "Unknown Smart Array", &SA5_access}, 211edd16368SStephen M. Cameron }; 212edd16368SStephen M. Cameron 213d04e62b9SKevin Barnett static struct scsi_transport_template *hpsa_sas_transport_template; 214d04e62b9SKevin Barnett static int hpsa_add_sas_host(struct ctlr_info *h); 215d04e62b9SKevin Barnett static void hpsa_delete_sas_host(struct ctlr_info *h); 216d04e62b9SKevin Barnett static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node, 217d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *device); 218d04e62b9SKevin Barnett static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device); 219d04e62b9SKevin Barnett static struct hpsa_scsi_dev_t 220d04e62b9SKevin Barnett *hpsa_find_device_by_sas_rphy(struct ctlr_info *h, 221d04e62b9SKevin Barnett struct sas_rphy *rphy); 222d04e62b9SKevin Barnett 223a58e7e53SWebb Scales #define SCSI_CMD_BUSY ((struct scsi_cmnd *)&hpsa_cmd_busy) 224a58e7e53SWebb Scales static const struct scsi_cmnd hpsa_cmd_busy; 225a58e7e53SWebb Scales #define SCSI_CMD_IDLE ((struct scsi_cmnd *)&hpsa_cmd_idle) 226a58e7e53SWebb Scales static const struct scsi_cmnd hpsa_cmd_idle; 227edd16368SStephen M. Cameron static int number_of_controllers; 228edd16368SStephen M. Cameron 22910f66018SStephen M. Cameron static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id); 23010f66018SStephen M. Cameron static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id); 23142a91641SDon Brace static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg); 232edd16368SStephen M. Cameron 233edd16368SStephen M. Cameron #ifdef CONFIG_COMPAT 23442a91641SDon Brace static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, 23542a91641SDon Brace void __user *arg); 236edd16368SStephen M. Cameron #endif 237edd16368SStephen M. Cameron 238edd16368SStephen M. Cameron static void cmd_free(struct ctlr_info *h, struct CommandList *c); 239edd16368SStephen M. Cameron static struct CommandList *cmd_alloc(struct ctlr_info *h); 24073153fe5SWebb Scales static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c); 24173153fe5SWebb Scales static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h, 24273153fe5SWebb Scales struct scsi_cmnd *scmd); 243a2dac136SStephen M. Cameron static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 244b7bb24ebSStephen M. Cameron void *buff, size_t size, u16 page_code, unsigned char *scsi3addr, 245edd16368SStephen M. Cameron int cmd_type); 2462c143342SRobert Elliott static void hpsa_free_cmd_pool(struct ctlr_info *h); 247b7bb24ebSStephen M. Cameron #define VPD_PAGE (1 << 8) 248b48d9804SDon Brace #define HPSA_SIMPLE_ERROR_BITS 0x03 249edd16368SStephen M. Cameron 250f281233dSJeff Garzik static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd); 251a08a8471SStephen M. Cameron static void hpsa_scan_start(struct Scsi_Host *); 252a08a8471SStephen M. Cameron static int hpsa_scan_finished(struct Scsi_Host *sh, 253a08a8471SStephen M. Cameron unsigned long elapsed_time); 2547c0a0229SDon Brace static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth); 255edd16368SStephen M. Cameron 256edd16368SStephen M. Cameron static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd); 25775167d2cSStephen M. Cameron static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd); 258edd16368SStephen M. Cameron static int hpsa_slave_alloc(struct scsi_device *sdev); 25941ce4c35SStephen Cameron static int hpsa_slave_configure(struct scsi_device *sdev); 260edd16368SStephen M. Cameron static void hpsa_slave_destroy(struct scsi_device *sdev); 261edd16368SStephen M. Cameron 2628aa60681SDon Brace static void hpsa_update_scsi_devices(struct ctlr_info *h); 263edd16368SStephen M. Cameron static int check_for_unit_attention(struct ctlr_info *h, 264edd16368SStephen M. Cameron struct CommandList *c); 265edd16368SStephen M. Cameron static void check_ioctl_unit_attention(struct ctlr_info *h, 266edd16368SStephen M. Cameron struct CommandList *c); 267303932fdSDon Brace /* performant mode helper functions */ 268303932fdSDon Brace static void calc_bucket_map(int *bucket, int num_buckets, 2692b08b3e9SDon Brace int nsgs, int min_blocks, u32 *bucket_map); 270105a3dbcSRobert Elliott static void hpsa_free_performant_mode(struct ctlr_info *h); 271105a3dbcSRobert Elliott static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h); 272254f796bSMatt Gates static inline u32 next_command(struct ctlr_info *h, u8 q); 2736f039790SGreg Kroah-Hartman static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 2746f039790SGreg Kroah-Hartman u32 *cfg_base_addr, u64 *cfg_base_addr_index, 2751df8552aSStephen M. Cameron u64 *cfg_offset); 2766f039790SGreg Kroah-Hartman static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 2771df8552aSStephen M. Cameron unsigned long *memory_bar); 2786f039790SGreg Kroah-Hartman static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id); 279*bfd7546cSDon Brace static int wait_for_device_to_become_ready(struct ctlr_info *h, 280*bfd7546cSDon Brace unsigned char lunaddr[], 281*bfd7546cSDon Brace int reply_queue); 2826f039790SGreg Kroah-Hartman static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 2836f039790SGreg Kroah-Hartman int wait_for_ready); 28475167d2cSStephen M. Cameron static inline void finish_cmd(struct CommandList *c); 285c706a795SRobert Elliott static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h); 286fe5389c8SStephen M. Cameron #define BOARD_NOT_READY 0 287fe5389c8SStephen M. Cameron #define BOARD_READY 1 28823100dd9SStephen M. Cameron static void hpsa_drain_accel_commands(struct ctlr_info *h); 28976438d08SStephen M. Cameron static void hpsa_flush_cache(struct ctlr_info *h); 290c349775eSScott Teel static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h, 291c349775eSScott Teel struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 29203383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk); 293080ef1ccSDon Brace static void hpsa_command_resubmit_worker(struct work_struct *work); 29425163bd5SWebb Scales static u32 lockup_detected(struct ctlr_info *h); 29525163bd5SWebb Scales static int detect_controller_lockup(struct ctlr_info *h); 296c2adae44SScott Teel static void hpsa_disable_rld_caching(struct ctlr_info *h); 297d04e62b9SKevin Barnett static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 298d04e62b9SKevin Barnett struct ReportExtendedLUNdata *buf, int bufsize); 2998383278dSScott Teel static bool hpsa_vpd_page_supported(struct ctlr_info *h, 3008383278dSScott Teel unsigned char scsi3addr[], u8 page); 30134592254SScott Teel static int hpsa_luns_changed(struct ctlr_info *h); 302ba74fdc4SDon Brace static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c, 303ba74fdc4SDon Brace struct hpsa_scsi_dev_t *dev, 304ba74fdc4SDon Brace unsigned char *scsi3addr); 305edd16368SStephen M. Cameron 306edd16368SStephen M. Cameron static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev) 307edd16368SStephen M. Cameron { 308edd16368SStephen M. Cameron unsigned long *priv = shost_priv(sdev->host); 309edd16368SStephen M. Cameron return (struct ctlr_info *) *priv; 310edd16368SStephen M. Cameron } 311edd16368SStephen M. Cameron 312a23513e8SStephen M. Cameron static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh) 313a23513e8SStephen M. Cameron { 314a23513e8SStephen M. Cameron unsigned long *priv = shost_priv(sh); 315a23513e8SStephen M. Cameron return (struct ctlr_info *) *priv; 316a23513e8SStephen M. Cameron } 317a23513e8SStephen M. Cameron 318a58e7e53SWebb Scales static inline bool hpsa_is_cmd_idle(struct CommandList *c) 319a58e7e53SWebb Scales { 320a58e7e53SWebb Scales return c->scsi_cmd == SCSI_CMD_IDLE; 321a58e7e53SWebb Scales } 322a58e7e53SWebb Scales 323d604f533SWebb Scales static inline bool hpsa_is_pending_event(struct CommandList *c) 324d604f533SWebb Scales { 325d604f533SWebb Scales return c->abort_pending || c->reset_pending; 326d604f533SWebb Scales } 327d604f533SWebb Scales 3289437ac43SStephen Cameron /* extract sense key, asc, and ascq from sense data. -1 means invalid. */ 3299437ac43SStephen Cameron static void decode_sense_data(const u8 *sense_data, int sense_data_len, 3309437ac43SStephen Cameron u8 *sense_key, u8 *asc, u8 *ascq) 3319437ac43SStephen Cameron { 3329437ac43SStephen Cameron struct scsi_sense_hdr sshdr; 3339437ac43SStephen Cameron bool rc; 3349437ac43SStephen Cameron 3359437ac43SStephen Cameron *sense_key = -1; 3369437ac43SStephen Cameron *asc = -1; 3379437ac43SStephen Cameron *ascq = -1; 3389437ac43SStephen Cameron 3399437ac43SStephen Cameron if (sense_data_len < 1) 3409437ac43SStephen Cameron return; 3419437ac43SStephen Cameron 3429437ac43SStephen Cameron rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr); 3439437ac43SStephen Cameron if (rc) { 3449437ac43SStephen Cameron *sense_key = sshdr.sense_key; 3459437ac43SStephen Cameron *asc = sshdr.asc; 3469437ac43SStephen Cameron *ascq = sshdr.ascq; 3479437ac43SStephen Cameron } 3489437ac43SStephen Cameron } 3499437ac43SStephen Cameron 350edd16368SStephen M. Cameron static int check_for_unit_attention(struct ctlr_info *h, 351edd16368SStephen M. Cameron struct CommandList *c) 352edd16368SStephen M. Cameron { 3539437ac43SStephen Cameron u8 sense_key, asc, ascq; 3549437ac43SStephen Cameron int sense_len; 3559437ac43SStephen Cameron 3569437ac43SStephen Cameron if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo)) 3579437ac43SStephen Cameron sense_len = sizeof(c->err_info->SenseInfo); 3589437ac43SStephen Cameron else 3599437ac43SStephen Cameron sense_len = c->err_info->SenseLen; 3609437ac43SStephen Cameron 3619437ac43SStephen Cameron decode_sense_data(c->err_info->SenseInfo, sense_len, 3629437ac43SStephen Cameron &sense_key, &asc, &ascq); 36381c27557SDon Brace if (sense_key != UNIT_ATTENTION || asc == 0xff) 364edd16368SStephen M. Cameron return 0; 365edd16368SStephen M. Cameron 3669437ac43SStephen Cameron switch (asc) { 367edd16368SStephen M. Cameron case STATE_CHANGED: 3689437ac43SStephen Cameron dev_warn(&h->pdev->dev, 3692946e82bSRobert Elliott "%s: a state change detected, command retried\n", 3702946e82bSRobert Elliott h->devname); 371edd16368SStephen M. Cameron break; 372edd16368SStephen M. Cameron case LUN_FAILED: 3737f73695aSStephen M. Cameron dev_warn(&h->pdev->dev, 3742946e82bSRobert Elliott "%s: LUN failure detected\n", h->devname); 375edd16368SStephen M. Cameron break; 376edd16368SStephen M. Cameron case REPORT_LUNS_CHANGED: 3777f73695aSStephen M. Cameron dev_warn(&h->pdev->dev, 3782946e82bSRobert Elliott "%s: report LUN data changed\n", h->devname); 379edd16368SStephen M. Cameron /* 3804f4eb9f1SScott Teel * Note: this REPORT_LUNS_CHANGED condition only occurs on the external 3814f4eb9f1SScott Teel * target (array) devices. 382edd16368SStephen M. Cameron */ 383edd16368SStephen M. Cameron break; 384edd16368SStephen M. Cameron case POWER_OR_RESET: 3852946e82bSRobert Elliott dev_warn(&h->pdev->dev, 3862946e82bSRobert Elliott "%s: a power on or device reset detected\n", 3872946e82bSRobert Elliott h->devname); 388edd16368SStephen M. Cameron break; 389edd16368SStephen M. Cameron case UNIT_ATTENTION_CLEARED: 3902946e82bSRobert Elliott dev_warn(&h->pdev->dev, 3912946e82bSRobert Elliott "%s: unit attention cleared by another initiator\n", 3922946e82bSRobert Elliott h->devname); 393edd16368SStephen M. Cameron break; 394edd16368SStephen M. Cameron default: 3952946e82bSRobert Elliott dev_warn(&h->pdev->dev, 3962946e82bSRobert Elliott "%s: unknown unit attention detected\n", 3972946e82bSRobert Elliott h->devname); 398edd16368SStephen M. Cameron break; 399edd16368SStephen M. Cameron } 400edd16368SStephen M. Cameron return 1; 401edd16368SStephen M. Cameron } 402edd16368SStephen M. Cameron 403852af20aSMatt Bondurant static int check_for_busy(struct ctlr_info *h, struct CommandList *c) 404852af20aSMatt Bondurant { 405852af20aSMatt Bondurant if (c->err_info->CommandStatus != CMD_TARGET_STATUS || 406852af20aSMatt Bondurant (c->err_info->ScsiStatus != SAM_STAT_BUSY && 407852af20aSMatt Bondurant c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL)) 408852af20aSMatt Bondurant return 0; 409852af20aSMatt Bondurant dev_warn(&h->pdev->dev, HPSA "device busy"); 410852af20aSMatt Bondurant return 1; 411852af20aSMatt Bondurant } 412852af20aSMatt Bondurant 413e985c58fSStephen Cameron static u32 lockup_detected(struct ctlr_info *h); 414e985c58fSStephen Cameron static ssize_t host_show_lockup_detected(struct device *dev, 415e985c58fSStephen Cameron struct device_attribute *attr, char *buf) 416e985c58fSStephen Cameron { 417e985c58fSStephen Cameron int ld; 418e985c58fSStephen Cameron struct ctlr_info *h; 419e985c58fSStephen Cameron struct Scsi_Host *shost = class_to_shost(dev); 420e985c58fSStephen Cameron 421e985c58fSStephen Cameron h = shost_to_hba(shost); 422e985c58fSStephen Cameron ld = lockup_detected(h); 423e985c58fSStephen Cameron 424e985c58fSStephen Cameron return sprintf(buf, "ld=%d\n", ld); 425e985c58fSStephen Cameron } 426e985c58fSStephen Cameron 427da0697bdSScott Teel static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev, 428da0697bdSScott Teel struct device_attribute *attr, 429da0697bdSScott Teel const char *buf, size_t count) 430da0697bdSScott Teel { 431da0697bdSScott Teel int status, len; 432da0697bdSScott Teel struct ctlr_info *h; 433da0697bdSScott Teel struct Scsi_Host *shost = class_to_shost(dev); 434da0697bdSScott Teel char tmpbuf[10]; 435da0697bdSScott Teel 436da0697bdSScott Teel if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO)) 437da0697bdSScott Teel return -EACCES; 438da0697bdSScott Teel len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count; 439da0697bdSScott Teel strncpy(tmpbuf, buf, len); 440da0697bdSScott Teel tmpbuf[len] = '\0'; 441da0697bdSScott Teel if (sscanf(tmpbuf, "%d", &status) != 1) 442da0697bdSScott Teel return -EINVAL; 443da0697bdSScott Teel h = shost_to_hba(shost); 444da0697bdSScott Teel h->acciopath_status = !!status; 445da0697bdSScott Teel dev_warn(&h->pdev->dev, 446da0697bdSScott Teel "hpsa: HP SSD Smart Path %s via sysfs update.\n", 447da0697bdSScott Teel h->acciopath_status ? "enabled" : "disabled"); 448da0697bdSScott Teel return count; 449da0697bdSScott Teel } 450da0697bdSScott Teel 4512ba8bfc8SStephen M. Cameron static ssize_t host_store_raid_offload_debug(struct device *dev, 4522ba8bfc8SStephen M. Cameron struct device_attribute *attr, 4532ba8bfc8SStephen M. Cameron const char *buf, size_t count) 4542ba8bfc8SStephen M. Cameron { 4552ba8bfc8SStephen M. Cameron int debug_level, len; 4562ba8bfc8SStephen M. Cameron struct ctlr_info *h; 4572ba8bfc8SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 4582ba8bfc8SStephen M. Cameron char tmpbuf[10]; 4592ba8bfc8SStephen M. Cameron 4602ba8bfc8SStephen M. Cameron if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO)) 4612ba8bfc8SStephen M. Cameron return -EACCES; 4622ba8bfc8SStephen M. Cameron len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count; 4632ba8bfc8SStephen M. Cameron strncpy(tmpbuf, buf, len); 4642ba8bfc8SStephen M. Cameron tmpbuf[len] = '\0'; 4652ba8bfc8SStephen M. Cameron if (sscanf(tmpbuf, "%d", &debug_level) != 1) 4662ba8bfc8SStephen M. Cameron return -EINVAL; 4672ba8bfc8SStephen M. Cameron if (debug_level < 0) 4682ba8bfc8SStephen M. Cameron debug_level = 0; 4692ba8bfc8SStephen M. Cameron h = shost_to_hba(shost); 4702ba8bfc8SStephen M. Cameron h->raid_offload_debug = debug_level; 4712ba8bfc8SStephen M. Cameron dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n", 4722ba8bfc8SStephen M. Cameron h->raid_offload_debug); 4732ba8bfc8SStephen M. Cameron return count; 4742ba8bfc8SStephen M. Cameron } 4752ba8bfc8SStephen M. Cameron 476edd16368SStephen M. Cameron static ssize_t host_store_rescan(struct device *dev, 477edd16368SStephen M. Cameron struct device_attribute *attr, 478edd16368SStephen M. Cameron const char *buf, size_t count) 479edd16368SStephen M. Cameron { 480edd16368SStephen M. Cameron struct ctlr_info *h; 481edd16368SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 482a23513e8SStephen M. Cameron h = shost_to_hba(shost); 48331468401SMike Miller hpsa_scan_start(h->scsi_host); 484edd16368SStephen M. Cameron return count; 485edd16368SStephen M. Cameron } 486edd16368SStephen M. Cameron 487d28ce020SStephen M. Cameron static ssize_t host_show_firmware_revision(struct device *dev, 488d28ce020SStephen M. Cameron struct device_attribute *attr, char *buf) 489d28ce020SStephen M. Cameron { 490d28ce020SStephen M. Cameron struct ctlr_info *h; 491d28ce020SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 492d28ce020SStephen M. Cameron unsigned char *fwrev; 493d28ce020SStephen M. Cameron 494d28ce020SStephen M. Cameron h = shost_to_hba(shost); 495d28ce020SStephen M. Cameron if (!h->hba_inquiry_data) 496d28ce020SStephen M. Cameron return 0; 497d28ce020SStephen M. Cameron fwrev = &h->hba_inquiry_data[32]; 498d28ce020SStephen M. Cameron return snprintf(buf, 20, "%c%c%c%c\n", 499d28ce020SStephen M. Cameron fwrev[0], fwrev[1], fwrev[2], fwrev[3]); 500d28ce020SStephen M. Cameron } 501d28ce020SStephen M. Cameron 50294a13649SStephen M. Cameron static ssize_t host_show_commands_outstanding(struct device *dev, 50394a13649SStephen M. Cameron struct device_attribute *attr, char *buf) 50494a13649SStephen M. Cameron { 50594a13649SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 50694a13649SStephen M. Cameron struct ctlr_info *h = shost_to_hba(shost); 50794a13649SStephen M. Cameron 5080cbf768eSStephen M. Cameron return snprintf(buf, 20, "%d\n", 5090cbf768eSStephen M. Cameron atomic_read(&h->commands_outstanding)); 51094a13649SStephen M. Cameron } 51194a13649SStephen M. Cameron 512745a7a25SStephen M. Cameron static ssize_t host_show_transport_mode(struct device *dev, 513745a7a25SStephen M. Cameron struct device_attribute *attr, char *buf) 514745a7a25SStephen M. Cameron { 515745a7a25SStephen M. Cameron struct ctlr_info *h; 516745a7a25SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 517745a7a25SStephen M. Cameron 518745a7a25SStephen M. Cameron h = shost_to_hba(shost); 519745a7a25SStephen M. Cameron return snprintf(buf, 20, "%s\n", 520960a30e7SStephen M. Cameron h->transMethod & CFGTBL_Trans_Performant ? 521745a7a25SStephen M. Cameron "performant" : "simple"); 522745a7a25SStephen M. Cameron } 523745a7a25SStephen M. Cameron 524da0697bdSScott Teel static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev, 525da0697bdSScott Teel struct device_attribute *attr, char *buf) 526da0697bdSScott Teel { 527da0697bdSScott Teel struct ctlr_info *h; 528da0697bdSScott Teel struct Scsi_Host *shost = class_to_shost(dev); 529da0697bdSScott Teel 530da0697bdSScott Teel h = shost_to_hba(shost); 531da0697bdSScott Teel return snprintf(buf, 30, "HP SSD Smart Path %s\n", 532da0697bdSScott Teel (h->acciopath_status == 1) ? "enabled" : "disabled"); 533da0697bdSScott Teel } 534da0697bdSScott Teel 53546380786SStephen M. Cameron /* List of controllers which cannot be hard reset on kexec with reset_devices */ 536941b1cdaSStephen M. Cameron static u32 unresettable_controller[] = { 537941b1cdaSStephen M. Cameron 0x324a103C, /* Smart Array P712m */ 538941b1cdaSStephen M. Cameron 0x324b103C, /* Smart Array P711m */ 539941b1cdaSStephen M. Cameron 0x3223103C, /* Smart Array P800 */ 540941b1cdaSStephen M. Cameron 0x3234103C, /* Smart Array P400 */ 541941b1cdaSStephen M. Cameron 0x3235103C, /* Smart Array P400i */ 542941b1cdaSStephen M. Cameron 0x3211103C, /* Smart Array E200i */ 543941b1cdaSStephen M. Cameron 0x3212103C, /* Smart Array E200 */ 544941b1cdaSStephen M. Cameron 0x3213103C, /* Smart Array E200i */ 545941b1cdaSStephen M. Cameron 0x3214103C, /* Smart Array E200i */ 546941b1cdaSStephen M. Cameron 0x3215103C, /* Smart Array E200i */ 547941b1cdaSStephen M. Cameron 0x3237103C, /* Smart Array E500 */ 548941b1cdaSStephen M. Cameron 0x323D103C, /* Smart Array P700m */ 5497af0abbcSTomas Henzl 0x40800E11, /* Smart Array 5i */ 550941b1cdaSStephen M. Cameron 0x409C0E11, /* Smart Array 6400 */ 551941b1cdaSStephen M. Cameron 0x409D0E11, /* Smart Array 6400 EM */ 5525a4f934eSTomas Henzl 0x40700E11, /* Smart Array 5300 */ 5535a4f934eSTomas Henzl 0x40820E11, /* Smart Array 532 */ 5545a4f934eSTomas Henzl 0x40830E11, /* Smart Array 5312 */ 5555a4f934eSTomas Henzl 0x409A0E11, /* Smart Array 641 */ 5565a4f934eSTomas Henzl 0x409B0E11, /* Smart Array 642 */ 5575a4f934eSTomas Henzl 0x40910E11, /* Smart Array 6i */ 558941b1cdaSStephen M. Cameron }; 559941b1cdaSStephen M. Cameron 56046380786SStephen M. Cameron /* List of controllers which cannot even be soft reset */ 56146380786SStephen M. Cameron static u32 soft_unresettable_controller[] = { 5627af0abbcSTomas Henzl 0x40800E11, /* Smart Array 5i */ 5635a4f934eSTomas Henzl 0x40700E11, /* Smart Array 5300 */ 5645a4f934eSTomas Henzl 0x40820E11, /* Smart Array 532 */ 5655a4f934eSTomas Henzl 0x40830E11, /* Smart Array 5312 */ 5665a4f934eSTomas Henzl 0x409A0E11, /* Smart Array 641 */ 5675a4f934eSTomas Henzl 0x409B0E11, /* Smart Array 642 */ 5685a4f934eSTomas Henzl 0x40910E11, /* Smart Array 6i */ 56946380786SStephen M. Cameron /* Exclude 640x boards. These are two pci devices in one slot 57046380786SStephen M. Cameron * which share a battery backed cache module. One controls the 57146380786SStephen M. Cameron * cache, the other accesses the cache through the one that controls 57246380786SStephen M. Cameron * it. If we reset the one controlling the cache, the other will 57346380786SStephen M. Cameron * likely not be happy. Just forbid resetting this conjoined mess. 57446380786SStephen M. Cameron * The 640x isn't really supported by hpsa anyway. 57546380786SStephen M. Cameron */ 57646380786SStephen M. Cameron 0x409C0E11, /* Smart Array 6400 */ 57746380786SStephen M. Cameron 0x409D0E11, /* Smart Array 6400 EM */ 57846380786SStephen M. Cameron }; 57946380786SStephen M. Cameron 5809b5c48c2SStephen Cameron static u32 needs_abort_tags_swizzled[] = { 5819b5c48c2SStephen Cameron 0x323D103C, /* Smart Array P700m */ 5829b5c48c2SStephen Cameron 0x324a103C, /* Smart Array P712m */ 5839b5c48c2SStephen Cameron 0x324b103C, /* SmartArray P711m */ 5849b5c48c2SStephen Cameron }; 5859b5c48c2SStephen Cameron 5869b5c48c2SStephen Cameron static int board_id_in_array(u32 a[], int nelems, u32 board_id) 587941b1cdaSStephen M. Cameron { 588941b1cdaSStephen M. Cameron int i; 589941b1cdaSStephen M. Cameron 5909b5c48c2SStephen Cameron for (i = 0; i < nelems; i++) 5919b5c48c2SStephen Cameron if (a[i] == board_id) 592941b1cdaSStephen M. Cameron return 1; 5939b5c48c2SStephen Cameron return 0; 5949b5c48c2SStephen Cameron } 5959b5c48c2SStephen Cameron 5969b5c48c2SStephen Cameron static int ctlr_is_hard_resettable(u32 board_id) 5979b5c48c2SStephen Cameron { 5989b5c48c2SStephen Cameron return !board_id_in_array(unresettable_controller, 5999b5c48c2SStephen Cameron ARRAY_SIZE(unresettable_controller), board_id); 600941b1cdaSStephen M. Cameron } 601941b1cdaSStephen M. Cameron 60246380786SStephen M. Cameron static int ctlr_is_soft_resettable(u32 board_id) 60346380786SStephen M. Cameron { 6049b5c48c2SStephen Cameron return !board_id_in_array(soft_unresettable_controller, 6059b5c48c2SStephen Cameron ARRAY_SIZE(soft_unresettable_controller), board_id); 60646380786SStephen M. Cameron } 60746380786SStephen M. Cameron 60846380786SStephen M. Cameron static int ctlr_is_resettable(u32 board_id) 60946380786SStephen M. Cameron { 61046380786SStephen M. Cameron return ctlr_is_hard_resettable(board_id) || 61146380786SStephen M. Cameron ctlr_is_soft_resettable(board_id); 61246380786SStephen M. Cameron } 61346380786SStephen M. Cameron 6149b5c48c2SStephen Cameron static int ctlr_needs_abort_tags_swizzled(u32 board_id) 6159b5c48c2SStephen Cameron { 6169b5c48c2SStephen Cameron return board_id_in_array(needs_abort_tags_swizzled, 6179b5c48c2SStephen Cameron ARRAY_SIZE(needs_abort_tags_swizzled), board_id); 6189b5c48c2SStephen Cameron } 6199b5c48c2SStephen Cameron 620941b1cdaSStephen M. Cameron static ssize_t host_show_resettable(struct device *dev, 621941b1cdaSStephen M. Cameron struct device_attribute *attr, char *buf) 622941b1cdaSStephen M. Cameron { 623941b1cdaSStephen M. Cameron struct ctlr_info *h; 624941b1cdaSStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 625941b1cdaSStephen M. Cameron 626941b1cdaSStephen M. Cameron h = shost_to_hba(shost); 62746380786SStephen M. Cameron return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id)); 628941b1cdaSStephen M. Cameron } 629941b1cdaSStephen M. Cameron 630edd16368SStephen M. Cameron static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[]) 631edd16368SStephen M. Cameron { 632edd16368SStephen M. Cameron return (scsi3addr[3] & 0xC0) == 0x40; 633edd16368SStephen M. Cameron } 634edd16368SStephen M. Cameron 635f2ef0ce7SRobert Elliott static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6", 6367c59a0d4SDon Brace "1(+0)ADM", "UNKNOWN", "PHYS DRV" 637edd16368SStephen M. Cameron }; 6386b80b18fSScott Teel #define HPSA_RAID_0 0 6396b80b18fSScott Teel #define HPSA_RAID_4 1 6406b80b18fSScott Teel #define HPSA_RAID_1 2 /* also used for RAID 10 */ 6416b80b18fSScott Teel #define HPSA_RAID_5 3 /* also used for RAID 50 */ 6426b80b18fSScott Teel #define HPSA_RAID_51 4 6436b80b18fSScott Teel #define HPSA_RAID_6 5 /* also used for RAID 60 */ 6446b80b18fSScott Teel #define HPSA_RAID_ADM 6 /* also used for RAID 1+0 ADM */ 6457c59a0d4SDon Brace #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 2) 6467c59a0d4SDon Brace #define PHYSICAL_DRIVE (ARRAY_SIZE(raid_label) - 1) 647edd16368SStephen M. Cameron 648f3f01730SKevin Barnett static inline bool is_logical_device(struct hpsa_scsi_dev_t *device) 649f3f01730SKevin Barnett { 650f3f01730SKevin Barnett return !device->physical_device; 651f3f01730SKevin Barnett } 652edd16368SStephen M. Cameron 653edd16368SStephen M. Cameron static ssize_t raid_level_show(struct device *dev, 654edd16368SStephen M. Cameron struct device_attribute *attr, char *buf) 655edd16368SStephen M. Cameron { 656edd16368SStephen M. Cameron ssize_t l = 0; 65782a72c0aSStephen M. Cameron unsigned char rlevel; 658edd16368SStephen M. Cameron struct ctlr_info *h; 659edd16368SStephen M. Cameron struct scsi_device *sdev; 660edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *hdev; 661edd16368SStephen M. Cameron unsigned long flags; 662edd16368SStephen M. Cameron 663edd16368SStephen M. Cameron sdev = to_scsi_device(dev); 664edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 665edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 666edd16368SStephen M. Cameron hdev = sdev->hostdata; 667edd16368SStephen M. Cameron if (!hdev) { 668edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 669edd16368SStephen M. Cameron return -ENODEV; 670edd16368SStephen M. Cameron } 671edd16368SStephen M. Cameron 672edd16368SStephen M. Cameron /* Is this even a logical drive? */ 673f3f01730SKevin Barnett if (!is_logical_device(hdev)) { 674edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 675edd16368SStephen M. Cameron l = snprintf(buf, PAGE_SIZE, "N/A\n"); 676edd16368SStephen M. Cameron return l; 677edd16368SStephen M. Cameron } 678edd16368SStephen M. Cameron 679edd16368SStephen M. Cameron rlevel = hdev->raid_level; 680edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 68182a72c0aSStephen M. Cameron if (rlevel > RAID_UNKNOWN) 682edd16368SStephen M. Cameron rlevel = RAID_UNKNOWN; 683edd16368SStephen M. Cameron l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]); 684edd16368SStephen M. Cameron return l; 685edd16368SStephen M. Cameron } 686edd16368SStephen M. Cameron 687edd16368SStephen M. Cameron static ssize_t lunid_show(struct device *dev, 688edd16368SStephen M. Cameron struct device_attribute *attr, char *buf) 689edd16368SStephen M. Cameron { 690edd16368SStephen M. Cameron struct ctlr_info *h; 691edd16368SStephen M. Cameron struct scsi_device *sdev; 692edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *hdev; 693edd16368SStephen M. Cameron unsigned long flags; 694edd16368SStephen M. Cameron unsigned char lunid[8]; 695edd16368SStephen M. Cameron 696edd16368SStephen M. Cameron sdev = to_scsi_device(dev); 697edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 698edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 699edd16368SStephen M. Cameron hdev = sdev->hostdata; 700edd16368SStephen M. Cameron if (!hdev) { 701edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 702edd16368SStephen M. Cameron return -ENODEV; 703edd16368SStephen M. Cameron } 704edd16368SStephen M. Cameron memcpy(lunid, hdev->scsi3addr, sizeof(lunid)); 705edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 706edd16368SStephen M. Cameron return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 707edd16368SStephen M. Cameron lunid[0], lunid[1], lunid[2], lunid[3], 708edd16368SStephen M. Cameron lunid[4], lunid[5], lunid[6], lunid[7]); 709edd16368SStephen M. Cameron } 710edd16368SStephen M. Cameron 711edd16368SStephen M. Cameron static ssize_t unique_id_show(struct device *dev, 712edd16368SStephen M. Cameron struct device_attribute *attr, char *buf) 713edd16368SStephen M. Cameron { 714edd16368SStephen M. Cameron struct ctlr_info *h; 715edd16368SStephen M. Cameron struct scsi_device *sdev; 716edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *hdev; 717edd16368SStephen M. Cameron unsigned long flags; 718edd16368SStephen M. Cameron unsigned char sn[16]; 719edd16368SStephen M. Cameron 720edd16368SStephen M. Cameron sdev = to_scsi_device(dev); 721edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 722edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 723edd16368SStephen M. Cameron hdev = sdev->hostdata; 724edd16368SStephen M. Cameron if (!hdev) { 725edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 726edd16368SStephen M. Cameron return -ENODEV; 727edd16368SStephen M. Cameron } 728edd16368SStephen M. Cameron memcpy(sn, hdev->device_id, sizeof(sn)); 729edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 730edd16368SStephen M. Cameron return snprintf(buf, 16 * 2 + 2, 731edd16368SStephen M. Cameron "%02X%02X%02X%02X%02X%02X%02X%02X" 732edd16368SStephen M. Cameron "%02X%02X%02X%02X%02X%02X%02X%02X\n", 733edd16368SStephen M. Cameron sn[0], sn[1], sn[2], sn[3], 734edd16368SStephen M. Cameron sn[4], sn[5], sn[6], sn[7], 735edd16368SStephen M. Cameron sn[8], sn[9], sn[10], sn[11], 736edd16368SStephen M. Cameron sn[12], sn[13], sn[14], sn[15]); 737edd16368SStephen M. Cameron } 738edd16368SStephen M. Cameron 739ded1be4aSJoseph T Handzik static ssize_t sas_address_show(struct device *dev, 740ded1be4aSJoseph T Handzik struct device_attribute *attr, char *buf) 741ded1be4aSJoseph T Handzik { 742ded1be4aSJoseph T Handzik struct ctlr_info *h; 743ded1be4aSJoseph T Handzik struct scsi_device *sdev; 744ded1be4aSJoseph T Handzik struct hpsa_scsi_dev_t *hdev; 745ded1be4aSJoseph T Handzik unsigned long flags; 746ded1be4aSJoseph T Handzik u64 sas_address; 747ded1be4aSJoseph T Handzik 748ded1be4aSJoseph T Handzik sdev = to_scsi_device(dev); 749ded1be4aSJoseph T Handzik h = sdev_to_hba(sdev); 750ded1be4aSJoseph T Handzik spin_lock_irqsave(&h->lock, flags); 751ded1be4aSJoseph T Handzik hdev = sdev->hostdata; 752ded1be4aSJoseph T Handzik if (!hdev || is_logical_device(hdev) || !hdev->expose_device) { 753ded1be4aSJoseph T Handzik spin_unlock_irqrestore(&h->lock, flags); 754ded1be4aSJoseph T Handzik return -ENODEV; 755ded1be4aSJoseph T Handzik } 756ded1be4aSJoseph T Handzik sas_address = hdev->sas_address; 757ded1be4aSJoseph T Handzik spin_unlock_irqrestore(&h->lock, flags); 758ded1be4aSJoseph T Handzik 759ded1be4aSJoseph T Handzik return snprintf(buf, PAGE_SIZE, "0x%016llx\n", sas_address); 760ded1be4aSJoseph T Handzik } 761ded1be4aSJoseph T Handzik 762c1988684SScott Teel static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev, 763c1988684SScott Teel struct device_attribute *attr, char *buf) 764c1988684SScott Teel { 765c1988684SScott Teel struct ctlr_info *h; 766c1988684SScott Teel struct scsi_device *sdev; 767c1988684SScott Teel struct hpsa_scsi_dev_t *hdev; 768c1988684SScott Teel unsigned long flags; 769c1988684SScott Teel int offload_enabled; 770c1988684SScott Teel 771c1988684SScott Teel sdev = to_scsi_device(dev); 772c1988684SScott Teel h = sdev_to_hba(sdev); 773c1988684SScott Teel spin_lock_irqsave(&h->lock, flags); 774c1988684SScott Teel hdev = sdev->hostdata; 775c1988684SScott Teel if (!hdev) { 776c1988684SScott Teel spin_unlock_irqrestore(&h->lock, flags); 777c1988684SScott Teel return -ENODEV; 778c1988684SScott Teel } 779c1988684SScott Teel offload_enabled = hdev->offload_enabled; 780c1988684SScott Teel spin_unlock_irqrestore(&h->lock, flags); 781c1988684SScott Teel return snprintf(buf, 20, "%d\n", offload_enabled); 782c1988684SScott Teel } 783c1988684SScott Teel 7848270b862SJoe Handzik #define MAX_PATHS 8 7858270b862SJoe Handzik static ssize_t path_info_show(struct device *dev, 7868270b862SJoe Handzik struct device_attribute *attr, char *buf) 7878270b862SJoe Handzik { 7888270b862SJoe Handzik struct ctlr_info *h; 7898270b862SJoe Handzik struct scsi_device *sdev; 7908270b862SJoe Handzik struct hpsa_scsi_dev_t *hdev; 7918270b862SJoe Handzik unsigned long flags; 7928270b862SJoe Handzik int i; 7938270b862SJoe Handzik int output_len = 0; 7948270b862SJoe Handzik u8 box; 7958270b862SJoe Handzik u8 bay; 7968270b862SJoe Handzik u8 path_map_index = 0; 7978270b862SJoe Handzik char *active; 7988270b862SJoe Handzik unsigned char phys_connector[2]; 7998270b862SJoe Handzik 8008270b862SJoe Handzik sdev = to_scsi_device(dev); 8018270b862SJoe Handzik h = sdev_to_hba(sdev); 8028270b862SJoe Handzik spin_lock_irqsave(&h->devlock, flags); 8038270b862SJoe Handzik hdev = sdev->hostdata; 8048270b862SJoe Handzik if (!hdev) { 8058270b862SJoe Handzik spin_unlock_irqrestore(&h->devlock, flags); 8068270b862SJoe Handzik return -ENODEV; 8078270b862SJoe Handzik } 8088270b862SJoe Handzik 8098270b862SJoe Handzik bay = hdev->bay; 8108270b862SJoe Handzik for (i = 0; i < MAX_PATHS; i++) { 8118270b862SJoe Handzik path_map_index = 1<<i; 8128270b862SJoe Handzik if (i == hdev->active_path_index) 8138270b862SJoe Handzik active = "Active"; 8148270b862SJoe Handzik else if (hdev->path_map & path_map_index) 8158270b862SJoe Handzik active = "Inactive"; 8168270b862SJoe Handzik else 8178270b862SJoe Handzik continue; 8188270b862SJoe Handzik 8191faf072cSRasmus Villemoes output_len += scnprintf(buf + output_len, 8201faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8211faf072cSRasmus Villemoes "[%d:%d:%d:%d] %20.20s ", 8228270b862SJoe Handzik h->scsi_host->host_no, 8238270b862SJoe Handzik hdev->bus, hdev->target, hdev->lun, 8248270b862SJoe Handzik scsi_device_type(hdev->devtype)); 8258270b862SJoe Handzik 826cca8f13bSDon Brace if (hdev->devtype == TYPE_RAID || is_logical_device(hdev)) { 8272708f295SDon Brace output_len += scnprintf(buf + output_len, 8281faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8291faf072cSRasmus Villemoes "%s\n", active); 8308270b862SJoe Handzik continue; 8318270b862SJoe Handzik } 8328270b862SJoe Handzik 8338270b862SJoe Handzik box = hdev->box[i]; 8348270b862SJoe Handzik memcpy(&phys_connector, &hdev->phys_connector[i], 8358270b862SJoe Handzik sizeof(phys_connector)); 8368270b862SJoe Handzik if (phys_connector[0] < '0') 8378270b862SJoe Handzik phys_connector[0] = '0'; 8388270b862SJoe Handzik if (phys_connector[1] < '0') 8398270b862SJoe Handzik phys_connector[1] = '0'; 8402708f295SDon Brace output_len += scnprintf(buf + output_len, 8411faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8428270b862SJoe Handzik "PORT: %.2s ", 8438270b862SJoe Handzik phys_connector); 844af15ed36SDon Brace if ((hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC) && 845af15ed36SDon Brace hdev->expose_device) { 8468270b862SJoe Handzik if (box == 0 || box == 0xFF) { 8472708f295SDon Brace output_len += scnprintf(buf + output_len, 8481faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8498270b862SJoe Handzik "BAY: %hhu %s\n", 8508270b862SJoe Handzik bay, active); 8518270b862SJoe Handzik } else { 8522708f295SDon Brace output_len += scnprintf(buf + output_len, 8531faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8548270b862SJoe Handzik "BOX: %hhu BAY: %hhu %s\n", 8558270b862SJoe Handzik box, bay, active); 8568270b862SJoe Handzik } 8578270b862SJoe Handzik } else if (box != 0 && box != 0xFF) { 8582708f295SDon Brace output_len += scnprintf(buf + output_len, 8591faf072cSRasmus Villemoes PAGE_SIZE - output_len, "BOX: %hhu %s\n", 8608270b862SJoe Handzik box, active); 8618270b862SJoe Handzik } else 8622708f295SDon Brace output_len += scnprintf(buf + output_len, 8631faf072cSRasmus Villemoes PAGE_SIZE - output_len, "%s\n", active); 8648270b862SJoe Handzik } 8658270b862SJoe Handzik 8668270b862SJoe Handzik spin_unlock_irqrestore(&h->devlock, flags); 8671faf072cSRasmus Villemoes return output_len; 8688270b862SJoe Handzik } 8698270b862SJoe Handzik 8703f5eac3aSStephen M. Cameron static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL); 8713f5eac3aSStephen M. Cameron static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL); 8723f5eac3aSStephen M. Cameron static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL); 8733f5eac3aSStephen M. Cameron static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan); 874ded1be4aSJoseph T Handzik static DEVICE_ATTR(sas_address, S_IRUGO, sas_address_show, NULL); 875c1988684SScott Teel static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO, 876c1988684SScott Teel host_show_hp_ssd_smart_path_enabled, NULL); 8778270b862SJoe Handzik static DEVICE_ATTR(path_info, S_IRUGO, path_info_show, NULL); 878da0697bdSScott Teel static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH, 879da0697bdSScott Teel host_show_hp_ssd_smart_path_status, 880da0697bdSScott Teel host_store_hp_ssd_smart_path_status); 8812ba8bfc8SStephen M. Cameron static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL, 8822ba8bfc8SStephen M. Cameron host_store_raid_offload_debug); 8833f5eac3aSStephen M. Cameron static DEVICE_ATTR(firmware_revision, S_IRUGO, 8843f5eac3aSStephen M. Cameron host_show_firmware_revision, NULL); 8853f5eac3aSStephen M. Cameron static DEVICE_ATTR(commands_outstanding, S_IRUGO, 8863f5eac3aSStephen M. Cameron host_show_commands_outstanding, NULL); 8873f5eac3aSStephen M. Cameron static DEVICE_ATTR(transport_mode, S_IRUGO, 8883f5eac3aSStephen M. Cameron host_show_transport_mode, NULL); 889941b1cdaSStephen M. Cameron static DEVICE_ATTR(resettable, S_IRUGO, 890941b1cdaSStephen M. Cameron host_show_resettable, NULL); 891e985c58fSStephen Cameron static DEVICE_ATTR(lockup_detected, S_IRUGO, 892e985c58fSStephen Cameron host_show_lockup_detected, NULL); 8933f5eac3aSStephen M. Cameron 8943f5eac3aSStephen M. Cameron static struct device_attribute *hpsa_sdev_attrs[] = { 8953f5eac3aSStephen M. Cameron &dev_attr_raid_level, 8963f5eac3aSStephen M. Cameron &dev_attr_lunid, 8973f5eac3aSStephen M. Cameron &dev_attr_unique_id, 898c1988684SScott Teel &dev_attr_hp_ssd_smart_path_enabled, 8998270b862SJoe Handzik &dev_attr_path_info, 900ded1be4aSJoseph T Handzik &dev_attr_sas_address, 9013f5eac3aSStephen M. Cameron NULL, 9023f5eac3aSStephen M. Cameron }; 9033f5eac3aSStephen M. Cameron 9043f5eac3aSStephen M. Cameron static struct device_attribute *hpsa_shost_attrs[] = { 9053f5eac3aSStephen M. Cameron &dev_attr_rescan, 9063f5eac3aSStephen M. Cameron &dev_attr_firmware_revision, 9073f5eac3aSStephen M. Cameron &dev_attr_commands_outstanding, 9083f5eac3aSStephen M. Cameron &dev_attr_transport_mode, 909941b1cdaSStephen M. Cameron &dev_attr_resettable, 910da0697bdSScott Teel &dev_attr_hp_ssd_smart_path_status, 9112ba8bfc8SStephen M. Cameron &dev_attr_raid_offload_debug, 912fb53c439STomas Henzl &dev_attr_lockup_detected, 9133f5eac3aSStephen M. Cameron NULL, 9143f5eac3aSStephen M. Cameron }; 9153f5eac3aSStephen M. Cameron 91641ce4c35SStephen Cameron #define HPSA_NRESERVED_CMDS (HPSA_CMDS_RESERVED_FOR_ABORTS + \ 91741ce4c35SStephen Cameron HPSA_CMDS_RESERVED_FOR_DRIVER + HPSA_MAX_CONCURRENT_PASSTHRUS) 91841ce4c35SStephen Cameron 9193f5eac3aSStephen M. Cameron static struct scsi_host_template hpsa_driver_template = { 9203f5eac3aSStephen M. Cameron .module = THIS_MODULE, 921f79cfec6SStephen M. Cameron .name = HPSA, 922f79cfec6SStephen M. Cameron .proc_name = HPSA, 9233f5eac3aSStephen M. Cameron .queuecommand = hpsa_scsi_queue_command, 9243f5eac3aSStephen M. Cameron .scan_start = hpsa_scan_start, 9253f5eac3aSStephen M. Cameron .scan_finished = hpsa_scan_finished, 9267c0a0229SDon Brace .change_queue_depth = hpsa_change_queue_depth, 9273f5eac3aSStephen M. Cameron .this_id = -1, 9283f5eac3aSStephen M. Cameron .use_clustering = ENABLE_CLUSTERING, 92975167d2cSStephen M. Cameron .eh_abort_handler = hpsa_eh_abort_handler, 9303f5eac3aSStephen M. Cameron .eh_device_reset_handler = hpsa_eh_device_reset_handler, 9313f5eac3aSStephen M. Cameron .ioctl = hpsa_ioctl, 9323f5eac3aSStephen M. Cameron .slave_alloc = hpsa_slave_alloc, 93341ce4c35SStephen Cameron .slave_configure = hpsa_slave_configure, 9343f5eac3aSStephen M. Cameron .slave_destroy = hpsa_slave_destroy, 9353f5eac3aSStephen M. Cameron #ifdef CONFIG_COMPAT 9363f5eac3aSStephen M. Cameron .compat_ioctl = hpsa_compat_ioctl, 9373f5eac3aSStephen M. Cameron #endif 9383f5eac3aSStephen M. Cameron .sdev_attrs = hpsa_sdev_attrs, 9393f5eac3aSStephen M. Cameron .shost_attrs = hpsa_shost_attrs, 940c0d6a4d1SStephen M. Cameron .max_sectors = 8192, 94154b2b50cSMartin K. Petersen .no_write_same = 1, 9423f5eac3aSStephen M. Cameron }; 9433f5eac3aSStephen M. Cameron 944254f796bSMatt Gates static inline u32 next_command(struct ctlr_info *h, u8 q) 9453f5eac3aSStephen M. Cameron { 9463f5eac3aSStephen M. Cameron u32 a; 947072b0518SStephen M. Cameron struct reply_queue_buffer *rq = &h->reply_queue[q]; 9483f5eac3aSStephen M. Cameron 949e1f7de0cSMatt Gates if (h->transMethod & CFGTBL_Trans_io_accel1) 950e1f7de0cSMatt Gates return h->access.command_completed(h, q); 951e1f7de0cSMatt Gates 9523f5eac3aSStephen M. Cameron if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant))) 953254f796bSMatt Gates return h->access.command_completed(h, q); 9543f5eac3aSStephen M. Cameron 955254f796bSMatt Gates if ((rq->head[rq->current_entry] & 1) == rq->wraparound) { 956254f796bSMatt Gates a = rq->head[rq->current_entry]; 957254f796bSMatt Gates rq->current_entry++; 9580cbf768eSStephen M. Cameron atomic_dec(&h->commands_outstanding); 9593f5eac3aSStephen M. Cameron } else { 9603f5eac3aSStephen M. Cameron a = FIFO_EMPTY; 9613f5eac3aSStephen M. Cameron } 9623f5eac3aSStephen M. Cameron /* Check for wraparound */ 963254f796bSMatt Gates if (rq->current_entry == h->max_commands) { 964254f796bSMatt Gates rq->current_entry = 0; 965254f796bSMatt Gates rq->wraparound ^= 1; 9663f5eac3aSStephen M. Cameron } 9673f5eac3aSStephen M. Cameron return a; 9683f5eac3aSStephen M. Cameron } 9693f5eac3aSStephen M. Cameron 970c349775eSScott Teel /* 971c349775eSScott Teel * There are some special bits in the bus address of the 972c349775eSScott Teel * command that we have to set for the controller to know 973c349775eSScott Teel * how to process the command: 974c349775eSScott Teel * 975c349775eSScott Teel * Normal performant mode: 976c349775eSScott Teel * bit 0: 1 means performant mode, 0 means simple mode. 977c349775eSScott Teel * bits 1-3 = block fetch table entry 978c349775eSScott Teel * bits 4-6 = command type (== 0) 979c349775eSScott Teel * 980c349775eSScott Teel * ioaccel1 mode: 981c349775eSScott Teel * bit 0 = "performant mode" bit. 982c349775eSScott Teel * bits 1-3 = block fetch table entry 983c349775eSScott Teel * bits 4-6 = command type (== 110) 984c349775eSScott Teel * (command type is needed because ioaccel1 mode 985c349775eSScott Teel * commands are submitted through the same register as normal 986c349775eSScott Teel * mode commands, so this is how the controller knows whether 987c349775eSScott Teel * the command is normal mode or ioaccel1 mode.) 988c349775eSScott Teel * 989c349775eSScott Teel * ioaccel2 mode: 990c349775eSScott Teel * bit 0 = "performant mode" bit. 991c349775eSScott Teel * bits 1-4 = block fetch table entry (note extra bit) 992c349775eSScott Teel * bits 4-6 = not needed, because ioaccel2 mode has 993c349775eSScott Teel * a separate special register for submitting commands. 994c349775eSScott Teel */ 995c349775eSScott Teel 99625163bd5SWebb Scales /* 99725163bd5SWebb Scales * set_performant_mode: Modify the tag for cciss performant 9983f5eac3aSStephen M. Cameron * set bit 0 for pull model, bits 3-1 for block fetch 9993f5eac3aSStephen M. Cameron * register number 10003f5eac3aSStephen M. Cameron */ 100125163bd5SWebb Scales #define DEFAULT_REPLY_QUEUE (-1) 100225163bd5SWebb Scales static void set_performant_mode(struct ctlr_info *h, struct CommandList *c, 100325163bd5SWebb Scales int reply_queue) 10043f5eac3aSStephen M. Cameron { 1005254f796bSMatt Gates if (likely(h->transMethod & CFGTBL_Trans_Performant)) { 10063f5eac3aSStephen M. Cameron c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1); 1007bc2bb154SChristoph Hellwig if (unlikely(!h->msix_vectors)) 100825163bd5SWebb Scales return; 100925163bd5SWebb Scales if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1010254f796bSMatt Gates c->Header.ReplyQueue = 1011804a5cb5SJohn Kacur raw_smp_processor_id() % h->nreply_queues; 101225163bd5SWebb Scales else 101325163bd5SWebb Scales c->Header.ReplyQueue = reply_queue % h->nreply_queues; 1014254f796bSMatt Gates } 10153f5eac3aSStephen M. Cameron } 10163f5eac3aSStephen M. Cameron 1017c349775eSScott Teel static void set_ioaccel1_performant_mode(struct ctlr_info *h, 101825163bd5SWebb Scales struct CommandList *c, 101925163bd5SWebb Scales int reply_queue) 1020c349775eSScott Teel { 1021c349775eSScott Teel struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex]; 1022c349775eSScott Teel 102325163bd5SWebb Scales /* 102425163bd5SWebb Scales * Tell the controller to post the reply to the queue for this 1025c349775eSScott Teel * processor. This seems to give the best I/O throughput. 1026c349775eSScott Teel */ 102725163bd5SWebb Scales if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1028c349775eSScott Teel cp->ReplyQueue = smp_processor_id() % h->nreply_queues; 102925163bd5SWebb Scales else 103025163bd5SWebb Scales cp->ReplyQueue = reply_queue % h->nreply_queues; 103125163bd5SWebb Scales /* 103225163bd5SWebb Scales * Set the bits in the address sent down to include: 1033c349775eSScott Teel * - performant mode bit (bit 0) 1034c349775eSScott Teel * - pull count (bits 1-3) 1035c349775eSScott Teel * - command type (bits 4-6) 1036c349775eSScott Teel */ 1037c349775eSScott Teel c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) | 1038c349775eSScott Teel IOACCEL1_BUSADDR_CMDTYPE; 1039c349775eSScott Teel } 1040c349775eSScott Teel 10418be986ccSStephen Cameron static void set_ioaccel2_tmf_performant_mode(struct ctlr_info *h, 10428be986ccSStephen Cameron struct CommandList *c, 10438be986ccSStephen Cameron int reply_queue) 10448be986ccSStephen Cameron { 10458be986ccSStephen Cameron struct hpsa_tmf_struct *cp = (struct hpsa_tmf_struct *) 10468be986ccSStephen Cameron &h->ioaccel2_cmd_pool[c->cmdindex]; 10478be986ccSStephen Cameron 10488be986ccSStephen Cameron /* Tell the controller to post the reply to the queue for this 10498be986ccSStephen Cameron * processor. This seems to give the best I/O throughput. 10508be986ccSStephen Cameron */ 10518be986ccSStephen Cameron if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 10528be986ccSStephen Cameron cp->reply_queue = smp_processor_id() % h->nreply_queues; 10538be986ccSStephen Cameron else 10548be986ccSStephen Cameron cp->reply_queue = reply_queue % h->nreply_queues; 10558be986ccSStephen Cameron /* Set the bits in the address sent down to include: 10568be986ccSStephen Cameron * - performant mode bit not used in ioaccel mode 2 10578be986ccSStephen Cameron * - pull count (bits 0-3) 10588be986ccSStephen Cameron * - command type isn't needed for ioaccel2 10598be986ccSStephen Cameron */ 10608be986ccSStephen Cameron c->busaddr |= h->ioaccel2_blockFetchTable[0]; 10618be986ccSStephen Cameron } 10628be986ccSStephen Cameron 1063c349775eSScott Teel static void set_ioaccel2_performant_mode(struct ctlr_info *h, 106425163bd5SWebb Scales struct CommandList *c, 106525163bd5SWebb Scales int reply_queue) 1066c349775eSScott Teel { 1067c349775eSScott Teel struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex]; 1068c349775eSScott Teel 106925163bd5SWebb Scales /* 107025163bd5SWebb Scales * Tell the controller to post the reply to the queue for this 1071c349775eSScott Teel * processor. This seems to give the best I/O throughput. 1072c349775eSScott Teel */ 107325163bd5SWebb Scales if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1074c349775eSScott Teel cp->reply_queue = smp_processor_id() % h->nreply_queues; 107525163bd5SWebb Scales else 107625163bd5SWebb Scales cp->reply_queue = reply_queue % h->nreply_queues; 107725163bd5SWebb Scales /* 107825163bd5SWebb Scales * Set the bits in the address sent down to include: 1079c349775eSScott Teel * - performant mode bit not used in ioaccel mode 2 1080c349775eSScott Teel * - pull count (bits 0-3) 1081c349775eSScott Teel * - command type isn't needed for ioaccel2 1082c349775eSScott Teel */ 1083c349775eSScott Teel c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]); 1084c349775eSScott Teel } 1085c349775eSScott Teel 1086e85c5974SStephen M. Cameron static int is_firmware_flash_cmd(u8 *cdb) 1087e85c5974SStephen M. Cameron { 1088e85c5974SStephen M. Cameron return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE; 1089e85c5974SStephen M. Cameron } 1090e85c5974SStephen M. Cameron 1091e85c5974SStephen M. Cameron /* 1092e85c5974SStephen M. Cameron * During firmware flash, the heartbeat register may not update as frequently 1093e85c5974SStephen M. Cameron * as it should. So we dial down lockup detection during firmware flash. and 1094e85c5974SStephen M. Cameron * dial it back up when firmware flash completes. 1095e85c5974SStephen M. Cameron */ 1096e85c5974SStephen M. Cameron #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ) 1097e85c5974SStephen M. Cameron #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ) 1098e85c5974SStephen M. Cameron static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h, 1099e85c5974SStephen M. Cameron struct CommandList *c) 1100e85c5974SStephen M. Cameron { 1101e85c5974SStephen M. Cameron if (!is_firmware_flash_cmd(c->Request.CDB)) 1102e85c5974SStephen M. Cameron return; 1103e85c5974SStephen M. Cameron atomic_inc(&h->firmware_flash_in_progress); 1104e85c5974SStephen M. Cameron h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH; 1105e85c5974SStephen M. Cameron } 1106e85c5974SStephen M. Cameron 1107e85c5974SStephen M. Cameron static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h, 1108e85c5974SStephen M. Cameron struct CommandList *c) 1109e85c5974SStephen M. Cameron { 1110e85c5974SStephen M. Cameron if (is_firmware_flash_cmd(c->Request.CDB) && 1111e85c5974SStephen M. Cameron atomic_dec_and_test(&h->firmware_flash_in_progress)) 1112e85c5974SStephen M. Cameron h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 1113e85c5974SStephen M. Cameron } 1114e85c5974SStephen M. Cameron 111525163bd5SWebb Scales static void __enqueue_cmd_and_start_io(struct ctlr_info *h, 111625163bd5SWebb Scales struct CommandList *c, int reply_queue) 11173f5eac3aSStephen M. Cameron { 1118c05e8866SStephen Cameron dial_down_lockup_detection_during_fw_flash(h, c); 1119c05e8866SStephen Cameron atomic_inc(&h->commands_outstanding); 1120c349775eSScott Teel switch (c->cmd_type) { 1121c349775eSScott Teel case CMD_IOACCEL1: 112225163bd5SWebb Scales set_ioaccel1_performant_mode(h, c, reply_queue); 1123c05e8866SStephen Cameron writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET); 1124c349775eSScott Teel break; 1125c349775eSScott Teel case CMD_IOACCEL2: 112625163bd5SWebb Scales set_ioaccel2_performant_mode(h, c, reply_queue); 1127c05e8866SStephen Cameron writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32); 1128c349775eSScott Teel break; 11298be986ccSStephen Cameron case IOACCEL2_TMF: 11308be986ccSStephen Cameron set_ioaccel2_tmf_performant_mode(h, c, reply_queue); 11318be986ccSStephen Cameron writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32); 11328be986ccSStephen Cameron break; 1133c349775eSScott Teel default: 113425163bd5SWebb Scales set_performant_mode(h, c, reply_queue); 1135f2405db8SDon Brace h->access.submit_command(h, c); 11363f5eac3aSStephen M. Cameron } 1137c05e8866SStephen Cameron } 11383f5eac3aSStephen M. Cameron 1139a58e7e53SWebb Scales static void enqueue_cmd_and_start_io(struct ctlr_info *h, struct CommandList *c) 114025163bd5SWebb Scales { 1141d604f533SWebb Scales if (unlikely(hpsa_is_pending_event(c))) 1142a58e7e53SWebb Scales return finish_cmd(c); 1143a58e7e53SWebb Scales 114425163bd5SWebb Scales __enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE); 114525163bd5SWebb Scales } 114625163bd5SWebb Scales 11473f5eac3aSStephen M. Cameron static inline int is_hba_lunid(unsigned char scsi3addr[]) 11483f5eac3aSStephen M. Cameron { 11493f5eac3aSStephen M. Cameron return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0; 11503f5eac3aSStephen M. Cameron } 11513f5eac3aSStephen M. Cameron 11523f5eac3aSStephen M. Cameron static inline int is_scsi_rev_5(struct ctlr_info *h) 11533f5eac3aSStephen M. Cameron { 11543f5eac3aSStephen M. Cameron if (!h->hba_inquiry_data) 11553f5eac3aSStephen M. Cameron return 0; 11563f5eac3aSStephen M. Cameron if ((h->hba_inquiry_data[2] & 0x07) == 5) 11573f5eac3aSStephen M. Cameron return 1; 11583f5eac3aSStephen M. Cameron return 0; 11593f5eac3aSStephen M. Cameron } 11603f5eac3aSStephen M. Cameron 1161edd16368SStephen M. Cameron static int hpsa_find_target_lun(struct ctlr_info *h, 1162edd16368SStephen M. Cameron unsigned char scsi3addr[], int bus, int *target, int *lun) 1163edd16368SStephen M. Cameron { 1164edd16368SStephen M. Cameron /* finds an unused bus, target, lun for a new physical device 1165edd16368SStephen M. Cameron * assumes h->devlock is held 1166edd16368SStephen M. Cameron */ 1167edd16368SStephen M. Cameron int i, found = 0; 1168cfe5badcSScott Teel DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES); 1169edd16368SStephen M. Cameron 1170263d9401SAkinobu Mita bitmap_zero(lun_taken, HPSA_MAX_DEVICES); 1171edd16368SStephen M. Cameron 1172edd16368SStephen M. Cameron for (i = 0; i < h->ndevices; i++) { 1173edd16368SStephen M. Cameron if (h->dev[i]->bus == bus && h->dev[i]->target != -1) 1174263d9401SAkinobu Mita __set_bit(h->dev[i]->target, lun_taken); 1175edd16368SStephen M. Cameron } 1176edd16368SStephen M. Cameron 1177263d9401SAkinobu Mita i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES); 1178263d9401SAkinobu Mita if (i < HPSA_MAX_DEVICES) { 1179edd16368SStephen M. Cameron /* *bus = 1; */ 1180edd16368SStephen M. Cameron *target = i; 1181edd16368SStephen M. Cameron *lun = 0; 1182edd16368SStephen M. Cameron found = 1; 1183edd16368SStephen M. Cameron } 1184edd16368SStephen M. Cameron return !found; 1185edd16368SStephen M. Cameron } 1186edd16368SStephen M. Cameron 11871d33d85dSDon Brace static void hpsa_show_dev_msg(const char *level, struct ctlr_info *h, 11880d96ef5fSWebb Scales struct hpsa_scsi_dev_t *dev, char *description) 11890d96ef5fSWebb Scales { 11907c59a0d4SDon Brace #define LABEL_SIZE 25 11917c59a0d4SDon Brace char label[LABEL_SIZE]; 11927c59a0d4SDon Brace 11939975ec9dSDon Brace if (h == NULL || h->pdev == NULL || h->scsi_host == NULL) 11949975ec9dSDon Brace return; 11959975ec9dSDon Brace 11967c59a0d4SDon Brace switch (dev->devtype) { 11977c59a0d4SDon Brace case TYPE_RAID: 11987c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "controller"); 11997c59a0d4SDon Brace break; 12007c59a0d4SDon Brace case TYPE_ENCLOSURE: 12017c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "enclosure"); 12027c59a0d4SDon Brace break; 12037c59a0d4SDon Brace case TYPE_DISK: 1204af15ed36SDon Brace case TYPE_ZBC: 12057c59a0d4SDon Brace if (dev->external) 12067c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "external"); 12077c59a0d4SDon Brace else if (!is_logical_dev_addr_mode(dev->scsi3addr)) 12087c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "%s", 12097c59a0d4SDon Brace raid_label[PHYSICAL_DRIVE]); 12107c59a0d4SDon Brace else 12117c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "RAID-%s", 12127c59a0d4SDon Brace dev->raid_level > RAID_UNKNOWN ? "?" : 12137c59a0d4SDon Brace raid_label[dev->raid_level]); 12147c59a0d4SDon Brace break; 12157c59a0d4SDon Brace case TYPE_ROM: 12167c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "rom"); 12177c59a0d4SDon Brace break; 12187c59a0d4SDon Brace case TYPE_TAPE: 12197c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "tape"); 12207c59a0d4SDon Brace break; 12217c59a0d4SDon Brace case TYPE_MEDIUM_CHANGER: 12227c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "changer"); 12237c59a0d4SDon Brace break; 12247c59a0d4SDon Brace default: 12257c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "UNKNOWN"); 12267c59a0d4SDon Brace break; 12277c59a0d4SDon Brace } 12287c59a0d4SDon Brace 12290d96ef5fSWebb Scales dev_printk(level, &h->pdev->dev, 12307c59a0d4SDon Brace "scsi %d:%d:%d:%d: %s %s %.8s %.16s %s SSDSmartPathCap%c En%c Exp=%d\n", 12310d96ef5fSWebb Scales h->scsi_host->host_no, dev->bus, dev->target, dev->lun, 12320d96ef5fSWebb Scales description, 12330d96ef5fSWebb Scales scsi_device_type(dev->devtype), 12340d96ef5fSWebb Scales dev->vendor, 12350d96ef5fSWebb Scales dev->model, 12367c59a0d4SDon Brace label, 12370d96ef5fSWebb Scales dev->offload_config ? '+' : '-', 12380d96ef5fSWebb Scales dev->offload_enabled ? '+' : '-', 12392a168208SKevin Barnett dev->expose_device); 12400d96ef5fSWebb Scales } 12410d96ef5fSWebb Scales 1242edd16368SStephen M. Cameron /* Add an entry into h->dev[] array. */ 12438aa60681SDon Brace static int hpsa_scsi_add_entry(struct ctlr_info *h, 1244edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *device, 1245edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *added[], int *nadded) 1246edd16368SStephen M. Cameron { 1247edd16368SStephen M. Cameron /* assumes h->devlock is held */ 1248edd16368SStephen M. Cameron int n = h->ndevices; 1249edd16368SStephen M. Cameron int i; 1250edd16368SStephen M. Cameron unsigned char addr1[8], addr2[8]; 1251edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd; 1252edd16368SStephen M. Cameron 1253cfe5badcSScott Teel if (n >= HPSA_MAX_DEVICES) { 1254edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "too many devices, some will be " 1255edd16368SStephen M. Cameron "inaccessible.\n"); 1256edd16368SStephen M. Cameron return -1; 1257edd16368SStephen M. Cameron } 1258edd16368SStephen M. Cameron 1259edd16368SStephen M. Cameron /* physical devices do not have lun or target assigned until now. */ 1260edd16368SStephen M. Cameron if (device->lun != -1) 1261edd16368SStephen M. Cameron /* Logical device, lun is already assigned. */ 1262edd16368SStephen M. Cameron goto lun_assigned; 1263edd16368SStephen M. Cameron 1264edd16368SStephen M. Cameron /* If this device a non-zero lun of a multi-lun device 1265edd16368SStephen M. Cameron * byte 4 of the 8-byte LUN addr will contain the logical 12662b08b3e9SDon Brace * unit no, zero otherwise. 1267edd16368SStephen M. Cameron */ 1268edd16368SStephen M. Cameron if (device->scsi3addr[4] == 0) { 1269edd16368SStephen M. Cameron /* This is not a non-zero lun of a multi-lun device */ 1270edd16368SStephen M. Cameron if (hpsa_find_target_lun(h, device->scsi3addr, 1271edd16368SStephen M. Cameron device->bus, &device->target, &device->lun) != 0) 1272edd16368SStephen M. Cameron return -1; 1273edd16368SStephen M. Cameron goto lun_assigned; 1274edd16368SStephen M. Cameron } 1275edd16368SStephen M. Cameron 1276edd16368SStephen M. Cameron /* This is a non-zero lun of a multi-lun device. 1277edd16368SStephen M. Cameron * Search through our list and find the device which 12789a4178b7Sshane.seymour * has the same 8 byte LUN address, excepting byte 4 and 5. 1279edd16368SStephen M. Cameron * Assign the same bus and target for this new LUN. 1280edd16368SStephen M. Cameron * Use the logical unit number from the firmware. 1281edd16368SStephen M. Cameron */ 1282edd16368SStephen M. Cameron memcpy(addr1, device->scsi3addr, 8); 1283edd16368SStephen M. Cameron addr1[4] = 0; 12849a4178b7Sshane.seymour addr1[5] = 0; 1285edd16368SStephen M. Cameron for (i = 0; i < n; i++) { 1286edd16368SStephen M. Cameron sd = h->dev[i]; 1287edd16368SStephen M. Cameron memcpy(addr2, sd->scsi3addr, 8); 1288edd16368SStephen M. Cameron addr2[4] = 0; 12899a4178b7Sshane.seymour addr2[5] = 0; 12909a4178b7Sshane.seymour /* differ only in byte 4 and 5? */ 1291edd16368SStephen M. Cameron if (memcmp(addr1, addr2, 8) == 0) { 1292edd16368SStephen M. Cameron device->bus = sd->bus; 1293edd16368SStephen M. Cameron device->target = sd->target; 1294edd16368SStephen M. Cameron device->lun = device->scsi3addr[4]; 1295edd16368SStephen M. Cameron break; 1296edd16368SStephen M. Cameron } 1297edd16368SStephen M. Cameron } 1298edd16368SStephen M. Cameron if (device->lun == -1) { 1299edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "physical device with no LUN=0," 1300edd16368SStephen M. Cameron " suspect firmware bug or unsupported hardware " 1301edd16368SStephen M. Cameron "configuration.\n"); 1302edd16368SStephen M. Cameron return -1; 1303edd16368SStephen M. Cameron } 1304edd16368SStephen M. Cameron 1305edd16368SStephen M. Cameron lun_assigned: 1306edd16368SStephen M. Cameron 1307edd16368SStephen M. Cameron h->dev[n] = device; 1308edd16368SStephen M. Cameron h->ndevices++; 1309edd16368SStephen M. Cameron added[*nadded] = device; 1310edd16368SStephen M. Cameron (*nadded)++; 13110d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, device, 13122a168208SKevin Barnett device->expose_device ? "added" : "masked"); 1313a473d86cSRobert Elliott device->offload_to_be_enabled = device->offload_enabled; 1314a473d86cSRobert Elliott device->offload_enabled = 0; 1315edd16368SStephen M. Cameron return 0; 1316edd16368SStephen M. Cameron } 1317edd16368SStephen M. Cameron 1318bd9244f7SScott Teel /* Update an entry in h->dev[] array. */ 13198aa60681SDon Brace static void hpsa_scsi_update_entry(struct ctlr_info *h, 1320bd9244f7SScott Teel int entry, struct hpsa_scsi_dev_t *new_entry) 1321bd9244f7SScott Teel { 1322a473d86cSRobert Elliott int offload_enabled; 1323bd9244f7SScott Teel /* assumes h->devlock is held */ 1324bd9244f7SScott Teel BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1325bd9244f7SScott Teel 1326bd9244f7SScott Teel /* Raid level changed. */ 1327bd9244f7SScott Teel h->dev[entry]->raid_level = new_entry->raid_level; 1328250fb125SStephen M. Cameron 132903383736SDon Brace /* Raid offload parameters changed. Careful about the ordering. */ 133003383736SDon Brace if (new_entry->offload_config && new_entry->offload_enabled) { 133103383736SDon Brace /* 133203383736SDon Brace * if drive is newly offload_enabled, we want to copy the 133303383736SDon Brace * raid map data first. If previously offload_enabled and 133403383736SDon Brace * offload_config were set, raid map data had better be 133503383736SDon Brace * the same as it was before. if raid map data is changed 133603383736SDon Brace * then it had better be the case that 133703383736SDon Brace * h->dev[entry]->offload_enabled is currently 0. 133803383736SDon Brace */ 13399fb0de2dSStephen M. Cameron h->dev[entry]->raid_map = new_entry->raid_map; 134003383736SDon Brace h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 134103383736SDon Brace } 1342a3144e0bSJoe Handzik if (new_entry->hba_ioaccel_enabled) { 1343a3144e0bSJoe Handzik h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 1344a3144e0bSJoe Handzik wmb(); /* set ioaccel_handle *before* hba_ioaccel_enabled */ 1345a3144e0bSJoe Handzik } 1346a3144e0bSJoe Handzik h->dev[entry]->hba_ioaccel_enabled = new_entry->hba_ioaccel_enabled; 134703383736SDon Brace h->dev[entry]->offload_config = new_entry->offload_config; 134803383736SDon Brace h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror; 134903383736SDon Brace h->dev[entry]->queue_depth = new_entry->queue_depth; 1350250fb125SStephen M. Cameron 135141ce4c35SStephen Cameron /* 135241ce4c35SStephen Cameron * We can turn off ioaccel offload now, but need to delay turning 135341ce4c35SStephen Cameron * it on until we can update h->dev[entry]->phys_disk[], but we 135441ce4c35SStephen Cameron * can't do that until all the devices are updated. 135541ce4c35SStephen Cameron */ 135641ce4c35SStephen Cameron h->dev[entry]->offload_to_be_enabled = new_entry->offload_enabled; 135741ce4c35SStephen Cameron if (!new_entry->offload_enabled) 135841ce4c35SStephen Cameron h->dev[entry]->offload_enabled = 0; 135941ce4c35SStephen Cameron 1360a473d86cSRobert Elliott offload_enabled = h->dev[entry]->offload_enabled; 1361a473d86cSRobert Elliott h->dev[entry]->offload_enabled = h->dev[entry]->offload_to_be_enabled; 13620d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated"); 1363a473d86cSRobert Elliott h->dev[entry]->offload_enabled = offload_enabled; 1364bd9244f7SScott Teel } 1365bd9244f7SScott Teel 13662a8ccf31SStephen M. Cameron /* Replace an entry from h->dev[] array. */ 13678aa60681SDon Brace static void hpsa_scsi_replace_entry(struct ctlr_info *h, 13682a8ccf31SStephen M. Cameron int entry, struct hpsa_scsi_dev_t *new_entry, 13692a8ccf31SStephen M. Cameron struct hpsa_scsi_dev_t *added[], int *nadded, 13702a8ccf31SStephen M. Cameron struct hpsa_scsi_dev_t *removed[], int *nremoved) 13712a8ccf31SStephen M. Cameron { 13722a8ccf31SStephen M. Cameron /* assumes h->devlock is held */ 1373cfe5badcSScott Teel BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 13742a8ccf31SStephen M. Cameron removed[*nremoved] = h->dev[entry]; 13752a8ccf31SStephen M. Cameron (*nremoved)++; 137601350d05SStephen M. Cameron 137701350d05SStephen M. Cameron /* 137801350d05SStephen M. Cameron * New physical devices won't have target/lun assigned yet 137901350d05SStephen M. Cameron * so we need to preserve the values in the slot we are replacing. 138001350d05SStephen M. Cameron */ 138101350d05SStephen M. Cameron if (new_entry->target == -1) { 138201350d05SStephen M. Cameron new_entry->target = h->dev[entry]->target; 138301350d05SStephen M. Cameron new_entry->lun = h->dev[entry]->lun; 138401350d05SStephen M. Cameron } 138501350d05SStephen M. Cameron 13862a8ccf31SStephen M. Cameron h->dev[entry] = new_entry; 13872a8ccf31SStephen M. Cameron added[*nadded] = new_entry; 13882a8ccf31SStephen M. Cameron (*nadded)++; 13890d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced"); 1390a473d86cSRobert Elliott new_entry->offload_to_be_enabled = new_entry->offload_enabled; 1391a473d86cSRobert Elliott new_entry->offload_enabled = 0; 13922a8ccf31SStephen M. Cameron } 13932a8ccf31SStephen M. Cameron 1394edd16368SStephen M. Cameron /* Remove an entry from h->dev[] array. */ 13958aa60681SDon Brace static void hpsa_scsi_remove_entry(struct ctlr_info *h, int entry, 1396edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *removed[], int *nremoved) 1397edd16368SStephen M. Cameron { 1398edd16368SStephen M. Cameron /* assumes h->devlock is held */ 1399edd16368SStephen M. Cameron int i; 1400edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd; 1401edd16368SStephen M. Cameron 1402cfe5badcSScott Teel BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1403edd16368SStephen M. Cameron 1404edd16368SStephen M. Cameron sd = h->dev[entry]; 1405edd16368SStephen M. Cameron removed[*nremoved] = h->dev[entry]; 1406edd16368SStephen M. Cameron (*nremoved)++; 1407edd16368SStephen M. Cameron 1408edd16368SStephen M. Cameron for (i = entry; i < h->ndevices-1; i++) 1409edd16368SStephen M. Cameron h->dev[i] = h->dev[i+1]; 1410edd16368SStephen M. Cameron h->ndevices--; 14110d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, sd, "removed"); 1412edd16368SStephen M. Cameron } 1413edd16368SStephen M. Cameron 1414edd16368SStephen M. Cameron #define SCSI3ADDR_EQ(a, b) ( \ 1415edd16368SStephen M. Cameron (a)[7] == (b)[7] && \ 1416edd16368SStephen M. Cameron (a)[6] == (b)[6] && \ 1417edd16368SStephen M. Cameron (a)[5] == (b)[5] && \ 1418edd16368SStephen M. Cameron (a)[4] == (b)[4] && \ 1419edd16368SStephen M. Cameron (a)[3] == (b)[3] && \ 1420edd16368SStephen M. Cameron (a)[2] == (b)[2] && \ 1421edd16368SStephen M. Cameron (a)[1] == (b)[1] && \ 1422edd16368SStephen M. Cameron (a)[0] == (b)[0]) 1423edd16368SStephen M. Cameron 1424edd16368SStephen M. Cameron static void fixup_botched_add(struct ctlr_info *h, 1425edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *added) 1426edd16368SStephen M. Cameron { 1427edd16368SStephen M. Cameron /* called when scsi_add_device fails in order to re-adjust 1428edd16368SStephen M. Cameron * h->dev[] to match the mid layer's view. 1429edd16368SStephen M. Cameron */ 1430edd16368SStephen M. Cameron unsigned long flags; 1431edd16368SStephen M. Cameron int i, j; 1432edd16368SStephen M. Cameron 1433edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 1434edd16368SStephen M. Cameron for (i = 0; i < h->ndevices; i++) { 1435edd16368SStephen M. Cameron if (h->dev[i] == added) { 1436edd16368SStephen M. Cameron for (j = i; j < h->ndevices-1; j++) 1437edd16368SStephen M. Cameron h->dev[j] = h->dev[j+1]; 1438edd16368SStephen M. Cameron h->ndevices--; 1439edd16368SStephen M. Cameron break; 1440edd16368SStephen M. Cameron } 1441edd16368SStephen M. Cameron } 1442edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 1443edd16368SStephen M. Cameron kfree(added); 1444edd16368SStephen M. Cameron } 1445edd16368SStephen M. Cameron 1446edd16368SStephen M. Cameron static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1, 1447edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *dev2) 1448edd16368SStephen M. Cameron { 1449edd16368SStephen M. Cameron /* we compare everything except lun and target as these 1450edd16368SStephen M. Cameron * are not yet assigned. Compare parts likely 1451edd16368SStephen M. Cameron * to differ first 1452edd16368SStephen M. Cameron */ 1453edd16368SStephen M. Cameron if (memcmp(dev1->scsi3addr, dev2->scsi3addr, 1454edd16368SStephen M. Cameron sizeof(dev1->scsi3addr)) != 0) 1455edd16368SStephen M. Cameron return 0; 1456edd16368SStephen M. Cameron if (memcmp(dev1->device_id, dev2->device_id, 1457edd16368SStephen M. Cameron sizeof(dev1->device_id)) != 0) 1458edd16368SStephen M. Cameron return 0; 1459edd16368SStephen M. Cameron if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0) 1460edd16368SStephen M. Cameron return 0; 1461edd16368SStephen M. Cameron if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0) 1462edd16368SStephen M. Cameron return 0; 1463edd16368SStephen M. Cameron if (dev1->devtype != dev2->devtype) 1464edd16368SStephen M. Cameron return 0; 1465edd16368SStephen M. Cameron if (dev1->bus != dev2->bus) 1466edd16368SStephen M. Cameron return 0; 1467edd16368SStephen M. Cameron return 1; 1468edd16368SStephen M. Cameron } 1469edd16368SStephen M. Cameron 1470bd9244f7SScott Teel static inline int device_updated(struct hpsa_scsi_dev_t *dev1, 1471bd9244f7SScott Teel struct hpsa_scsi_dev_t *dev2) 1472bd9244f7SScott Teel { 1473bd9244f7SScott Teel /* Device attributes that can change, but don't mean 1474bd9244f7SScott Teel * that the device is a different device, nor that the OS 1475bd9244f7SScott Teel * needs to be told anything about the change. 1476bd9244f7SScott Teel */ 1477bd9244f7SScott Teel if (dev1->raid_level != dev2->raid_level) 1478bd9244f7SScott Teel return 1; 1479250fb125SStephen M. Cameron if (dev1->offload_config != dev2->offload_config) 1480250fb125SStephen M. Cameron return 1; 1481250fb125SStephen M. Cameron if (dev1->offload_enabled != dev2->offload_enabled) 1482250fb125SStephen M. Cameron return 1; 148393849508SDon Brace if (!is_logical_dev_addr_mode(dev1->scsi3addr)) 148403383736SDon Brace if (dev1->queue_depth != dev2->queue_depth) 148503383736SDon Brace return 1; 1486bd9244f7SScott Teel return 0; 1487bd9244f7SScott Teel } 1488bd9244f7SScott Teel 1489edd16368SStephen M. Cameron /* Find needle in haystack. If exact match found, return DEVICE_SAME, 1490edd16368SStephen M. Cameron * and return needle location in *index. If scsi3addr matches, but not 1491edd16368SStephen M. Cameron * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle 1492bd9244f7SScott Teel * location in *index. 1493bd9244f7SScott Teel * In the case of a minor device attribute change, such as RAID level, just 1494bd9244f7SScott Teel * return DEVICE_UPDATED, along with the updated device's location in index. 1495bd9244f7SScott Teel * If needle not found, return DEVICE_NOT_FOUND. 1496edd16368SStephen M. Cameron */ 1497edd16368SStephen M. Cameron static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle, 1498edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *haystack[], int haystack_size, 1499edd16368SStephen M. Cameron int *index) 1500edd16368SStephen M. Cameron { 1501edd16368SStephen M. Cameron int i; 1502edd16368SStephen M. Cameron #define DEVICE_NOT_FOUND 0 1503edd16368SStephen M. Cameron #define DEVICE_CHANGED 1 1504edd16368SStephen M. Cameron #define DEVICE_SAME 2 1505bd9244f7SScott Teel #define DEVICE_UPDATED 3 15061d33d85dSDon Brace if (needle == NULL) 15071d33d85dSDon Brace return DEVICE_NOT_FOUND; 15081d33d85dSDon Brace 1509edd16368SStephen M. Cameron for (i = 0; i < haystack_size; i++) { 151023231048SStephen M. Cameron if (haystack[i] == NULL) /* previously removed. */ 151123231048SStephen M. Cameron continue; 1512edd16368SStephen M. Cameron if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) { 1513edd16368SStephen M. Cameron *index = i; 1514bd9244f7SScott Teel if (device_is_the_same(needle, haystack[i])) { 1515bd9244f7SScott Teel if (device_updated(needle, haystack[i])) 1516bd9244f7SScott Teel return DEVICE_UPDATED; 1517edd16368SStephen M. Cameron return DEVICE_SAME; 1518bd9244f7SScott Teel } else { 15199846590eSStephen M. Cameron /* Keep offline devices offline */ 15209846590eSStephen M. Cameron if (needle->volume_offline) 15219846590eSStephen M. Cameron return DEVICE_NOT_FOUND; 1522edd16368SStephen M. Cameron return DEVICE_CHANGED; 1523edd16368SStephen M. Cameron } 1524edd16368SStephen M. Cameron } 1525bd9244f7SScott Teel } 1526edd16368SStephen M. Cameron *index = -1; 1527edd16368SStephen M. Cameron return DEVICE_NOT_FOUND; 1528edd16368SStephen M. Cameron } 1529edd16368SStephen M. Cameron 15309846590eSStephen M. Cameron static void hpsa_monitor_offline_device(struct ctlr_info *h, 15319846590eSStephen M. Cameron unsigned char scsi3addr[]) 15329846590eSStephen M. Cameron { 15339846590eSStephen M. Cameron struct offline_device_entry *device; 15349846590eSStephen M. Cameron unsigned long flags; 15359846590eSStephen M. Cameron 15369846590eSStephen M. Cameron /* Check to see if device is already on the list */ 15379846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 15389846590eSStephen M. Cameron list_for_each_entry(device, &h->offline_device_list, offline_list) { 15399846590eSStephen M. Cameron if (memcmp(device->scsi3addr, scsi3addr, 15409846590eSStephen M. Cameron sizeof(device->scsi3addr)) == 0) { 15419846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 15429846590eSStephen M. Cameron return; 15439846590eSStephen M. Cameron } 15449846590eSStephen M. Cameron } 15459846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 15469846590eSStephen M. Cameron 15479846590eSStephen M. Cameron /* Device is not on the list, add it. */ 15489846590eSStephen M. Cameron device = kmalloc(sizeof(*device), GFP_KERNEL); 15499846590eSStephen M. Cameron if (!device) { 15509846590eSStephen M. Cameron dev_warn(&h->pdev->dev, "out of memory in %s\n", __func__); 15519846590eSStephen M. Cameron return; 15529846590eSStephen M. Cameron } 15539846590eSStephen M. Cameron memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr)); 15549846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 15559846590eSStephen M. Cameron list_add_tail(&device->offline_list, &h->offline_device_list); 15569846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 15579846590eSStephen M. Cameron } 15589846590eSStephen M. Cameron 15599846590eSStephen M. Cameron /* Print a message explaining various offline volume states */ 15609846590eSStephen M. Cameron static void hpsa_show_volume_status(struct ctlr_info *h, 15619846590eSStephen M. Cameron struct hpsa_scsi_dev_t *sd) 15629846590eSStephen M. Cameron { 15639846590eSStephen M. Cameron if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED) 15649846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15659846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n", 15669846590eSStephen M. Cameron h->scsi_host->host_no, 15679846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15689846590eSStephen M. Cameron switch (sd->volume_offline) { 15699846590eSStephen M. Cameron case HPSA_LV_OK: 15709846590eSStephen M. Cameron break; 15719846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ERASE: 15729846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15739846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n", 15749846590eSStephen M. Cameron h->scsi_host->host_no, 15759846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15769846590eSStephen M. Cameron break; 15775ca01204SScott Benesh case HPSA_LV_NOT_AVAILABLE: 15785ca01204SScott Benesh dev_info(&h->pdev->dev, 15795ca01204SScott Benesh "C%d:B%d:T%d:L%d Volume is waiting for transforming volume.\n", 15805ca01204SScott Benesh h->scsi_host->host_no, 15815ca01204SScott Benesh sd->bus, sd->target, sd->lun); 15825ca01204SScott Benesh break; 15839846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_RPI: 15849846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15855ca01204SScott Benesh "C%d:B%d:T%d:L%d Volume is undergoing rapid parity init.\n", 15869846590eSStephen M. Cameron h->scsi_host->host_no, 15879846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15889846590eSStephen M. Cameron break; 15899846590eSStephen M. Cameron case HPSA_LV_PENDING_RPI: 15909846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15919846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n", 15929846590eSStephen M. Cameron h->scsi_host->host_no, 15939846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15949846590eSStephen M. Cameron break; 15959846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_NO_KEY: 15969846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15979846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n", 15989846590eSStephen M. Cameron h->scsi_host->host_no, 15999846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16009846590eSStephen M. Cameron break; 16019846590eSStephen M. Cameron case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER: 16029846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16039846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n", 16049846590eSStephen M. Cameron h->scsi_host->host_no, 16059846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16069846590eSStephen M. Cameron break; 16079846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION: 16089846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16099846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n", 16109846590eSStephen M. Cameron h->scsi_host->host_no, 16119846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16129846590eSStephen M. Cameron break; 16139846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING: 16149846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16159846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n", 16169846590eSStephen M. Cameron h->scsi_host->host_no, 16179846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16189846590eSStephen M. Cameron break; 16199846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 16209846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16219846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n", 16229846590eSStephen M. Cameron h->scsi_host->host_no, 16239846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16249846590eSStephen M. Cameron break; 16259846590eSStephen M. Cameron case HPSA_LV_PENDING_ENCRYPTION: 16269846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16279846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n", 16289846590eSStephen M. Cameron h->scsi_host->host_no, 16299846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16309846590eSStephen M. Cameron break; 16319846590eSStephen M. Cameron case HPSA_LV_PENDING_ENCRYPTION_REKEYING: 16329846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16339846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n", 16349846590eSStephen M. Cameron h->scsi_host->host_no, 16359846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16369846590eSStephen M. Cameron break; 16379846590eSStephen M. Cameron } 16389846590eSStephen M. Cameron } 16399846590eSStephen M. Cameron 164003383736SDon Brace /* 164103383736SDon Brace * Figure the list of physical drive pointers for a logical drive with 164203383736SDon Brace * raid offload configured. 164303383736SDon Brace */ 164403383736SDon Brace static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h, 164503383736SDon Brace struct hpsa_scsi_dev_t *dev[], int ndevices, 164603383736SDon Brace struct hpsa_scsi_dev_t *logical_drive) 164703383736SDon Brace { 164803383736SDon Brace struct raid_map_data *map = &logical_drive->raid_map; 164903383736SDon Brace struct raid_map_disk_data *dd = &map->data[0]; 165003383736SDon Brace int i, j; 165103383736SDon Brace int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) + 165203383736SDon Brace le16_to_cpu(map->metadata_disks_per_row); 165303383736SDon Brace int nraid_map_entries = le16_to_cpu(map->row_cnt) * 165403383736SDon Brace le16_to_cpu(map->layout_map_count) * 165503383736SDon Brace total_disks_per_row; 165603383736SDon Brace int nphys_disk = le16_to_cpu(map->layout_map_count) * 165703383736SDon Brace total_disks_per_row; 165803383736SDon Brace int qdepth; 165903383736SDon Brace 166003383736SDon Brace if (nraid_map_entries > RAID_MAP_MAX_ENTRIES) 166103383736SDon Brace nraid_map_entries = RAID_MAP_MAX_ENTRIES; 166203383736SDon Brace 1663d604f533SWebb Scales logical_drive->nphysical_disks = nraid_map_entries; 1664d604f533SWebb Scales 166503383736SDon Brace qdepth = 0; 166603383736SDon Brace for (i = 0; i < nraid_map_entries; i++) { 166703383736SDon Brace logical_drive->phys_disk[i] = NULL; 166803383736SDon Brace if (!logical_drive->offload_config) 166903383736SDon Brace continue; 167003383736SDon Brace for (j = 0; j < ndevices; j++) { 16711d33d85dSDon Brace if (dev[j] == NULL) 16721d33d85dSDon Brace continue; 1673ff615f06SPetros Koutoupis if (dev[j]->devtype != TYPE_DISK && 1674ff615f06SPetros Koutoupis dev[j]->devtype != TYPE_ZBC) 1675af15ed36SDon Brace continue; 1676f3f01730SKevin Barnett if (is_logical_device(dev[j])) 167703383736SDon Brace continue; 167803383736SDon Brace if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle) 167903383736SDon Brace continue; 168003383736SDon Brace 168103383736SDon Brace logical_drive->phys_disk[i] = dev[j]; 168203383736SDon Brace if (i < nphys_disk) 168303383736SDon Brace qdepth = min(h->nr_cmds, qdepth + 168403383736SDon Brace logical_drive->phys_disk[i]->queue_depth); 168503383736SDon Brace break; 168603383736SDon Brace } 168703383736SDon Brace 168803383736SDon Brace /* 168903383736SDon Brace * This can happen if a physical drive is removed and 169003383736SDon Brace * the logical drive is degraded. In that case, the RAID 169103383736SDon Brace * map data will refer to a physical disk which isn't actually 169203383736SDon Brace * present. And in that case offload_enabled should already 169303383736SDon Brace * be 0, but we'll turn it off here just in case 169403383736SDon Brace */ 169503383736SDon Brace if (!logical_drive->phys_disk[i]) { 169603383736SDon Brace logical_drive->offload_enabled = 0; 169741ce4c35SStephen Cameron logical_drive->offload_to_be_enabled = 0; 169841ce4c35SStephen Cameron logical_drive->queue_depth = 8; 169903383736SDon Brace } 170003383736SDon Brace } 170103383736SDon Brace if (nraid_map_entries) 170203383736SDon Brace /* 170303383736SDon Brace * This is correct for reads, too high for full stripe writes, 170403383736SDon Brace * way too high for partial stripe writes 170503383736SDon Brace */ 170603383736SDon Brace logical_drive->queue_depth = qdepth; 170703383736SDon Brace else 170803383736SDon Brace logical_drive->queue_depth = h->nr_cmds; 170903383736SDon Brace } 171003383736SDon Brace 171103383736SDon Brace static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h, 171203383736SDon Brace struct hpsa_scsi_dev_t *dev[], int ndevices) 171303383736SDon Brace { 171403383736SDon Brace int i; 171503383736SDon Brace 171603383736SDon Brace for (i = 0; i < ndevices; i++) { 17171d33d85dSDon Brace if (dev[i] == NULL) 17181d33d85dSDon Brace continue; 1719ff615f06SPetros Koutoupis if (dev[i]->devtype != TYPE_DISK && 1720ff615f06SPetros Koutoupis dev[i]->devtype != TYPE_ZBC) 1721af15ed36SDon Brace continue; 1722f3f01730SKevin Barnett if (!is_logical_device(dev[i])) 172303383736SDon Brace continue; 172441ce4c35SStephen Cameron 172541ce4c35SStephen Cameron /* 172641ce4c35SStephen Cameron * If offload is currently enabled, the RAID map and 172741ce4c35SStephen Cameron * phys_disk[] assignment *better* not be changing 172841ce4c35SStephen Cameron * and since it isn't changing, we do not need to 172941ce4c35SStephen Cameron * update it. 173041ce4c35SStephen Cameron */ 173141ce4c35SStephen Cameron if (dev[i]->offload_enabled) 173241ce4c35SStephen Cameron continue; 173341ce4c35SStephen Cameron 173403383736SDon Brace hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]); 173503383736SDon Brace } 173603383736SDon Brace } 173703383736SDon Brace 1738096ccff4SKevin Barnett static int hpsa_add_device(struct ctlr_info *h, struct hpsa_scsi_dev_t *device) 1739096ccff4SKevin Barnett { 1740096ccff4SKevin Barnett int rc = 0; 1741096ccff4SKevin Barnett 1742096ccff4SKevin Barnett if (!h->scsi_host) 1743096ccff4SKevin Barnett return 1; 1744096ccff4SKevin Barnett 1745d04e62b9SKevin Barnett if (is_logical_device(device)) /* RAID */ 1746096ccff4SKevin Barnett rc = scsi_add_device(h->scsi_host, device->bus, 1747096ccff4SKevin Barnett device->target, device->lun); 1748d04e62b9SKevin Barnett else /* HBA */ 1749d04e62b9SKevin Barnett rc = hpsa_add_sas_device(h->sas_host, device); 1750d04e62b9SKevin Barnett 1751096ccff4SKevin Barnett return rc; 1752096ccff4SKevin Barnett } 1753096ccff4SKevin Barnett 1754ba74fdc4SDon Brace static int hpsa_find_outstanding_commands_for_dev(struct ctlr_info *h, 1755ba74fdc4SDon Brace struct hpsa_scsi_dev_t *dev) 1756ba74fdc4SDon Brace { 1757ba74fdc4SDon Brace int i; 1758ba74fdc4SDon Brace int count = 0; 1759ba74fdc4SDon Brace 1760ba74fdc4SDon Brace for (i = 0; i < h->nr_cmds; i++) { 1761ba74fdc4SDon Brace struct CommandList *c = h->cmd_pool + i; 1762ba74fdc4SDon Brace int refcount = atomic_inc_return(&c->refcount); 1763ba74fdc4SDon Brace 1764ba74fdc4SDon Brace if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, 1765ba74fdc4SDon Brace dev->scsi3addr)) { 1766ba74fdc4SDon Brace unsigned long flags; 1767ba74fdc4SDon Brace 1768ba74fdc4SDon Brace spin_lock_irqsave(&h->lock, flags); /* Implied MB */ 1769ba74fdc4SDon Brace if (!hpsa_is_cmd_idle(c)) 1770ba74fdc4SDon Brace ++count; 1771ba74fdc4SDon Brace spin_unlock_irqrestore(&h->lock, flags); 1772ba74fdc4SDon Brace } 1773ba74fdc4SDon Brace 1774ba74fdc4SDon Brace cmd_free(h, c); 1775ba74fdc4SDon Brace } 1776ba74fdc4SDon Brace 1777ba74fdc4SDon Brace return count; 1778ba74fdc4SDon Brace } 1779ba74fdc4SDon Brace 1780ba74fdc4SDon Brace static void hpsa_wait_for_outstanding_commands_for_dev(struct ctlr_info *h, 1781ba74fdc4SDon Brace struct hpsa_scsi_dev_t *device) 1782ba74fdc4SDon Brace { 1783ba74fdc4SDon Brace int cmds = 0; 1784ba74fdc4SDon Brace int waits = 0; 1785ba74fdc4SDon Brace 1786ba74fdc4SDon Brace while (1) { 1787ba74fdc4SDon Brace cmds = hpsa_find_outstanding_commands_for_dev(h, device); 1788ba74fdc4SDon Brace if (cmds == 0) 1789ba74fdc4SDon Brace break; 1790ba74fdc4SDon Brace if (++waits > 20) 1791ba74fdc4SDon Brace break; 1792ba74fdc4SDon Brace dev_warn(&h->pdev->dev, 1793ba74fdc4SDon Brace "%s: removing device with %d outstanding commands!\n", 1794ba74fdc4SDon Brace __func__, cmds); 1795ba74fdc4SDon Brace msleep(1000); 1796ba74fdc4SDon Brace } 1797ba74fdc4SDon Brace } 1798ba74fdc4SDon Brace 1799096ccff4SKevin Barnett static void hpsa_remove_device(struct ctlr_info *h, 1800096ccff4SKevin Barnett struct hpsa_scsi_dev_t *device) 1801096ccff4SKevin Barnett { 1802096ccff4SKevin Barnett struct scsi_device *sdev = NULL; 1803096ccff4SKevin Barnett 1804096ccff4SKevin Barnett if (!h->scsi_host) 1805096ccff4SKevin Barnett return; 1806096ccff4SKevin Barnett 1807d04e62b9SKevin Barnett if (is_logical_device(device)) { /* RAID */ 1808096ccff4SKevin Barnett sdev = scsi_device_lookup(h->scsi_host, device->bus, 1809096ccff4SKevin Barnett device->target, device->lun); 1810096ccff4SKevin Barnett if (sdev) { 1811096ccff4SKevin Barnett scsi_remove_device(sdev); 1812096ccff4SKevin Barnett scsi_device_put(sdev); 1813096ccff4SKevin Barnett } else { 1814096ccff4SKevin Barnett /* 1815096ccff4SKevin Barnett * We don't expect to get here. Future commands 1816096ccff4SKevin Barnett * to this device will get a selection timeout as 1817096ccff4SKevin Barnett * if the device were gone. 1818096ccff4SKevin Barnett */ 1819096ccff4SKevin Barnett hpsa_show_dev_msg(KERN_WARNING, h, device, 1820096ccff4SKevin Barnett "didn't find device for removal."); 1821096ccff4SKevin Barnett } 1822ba74fdc4SDon Brace } else { /* HBA */ 1823ba74fdc4SDon Brace 1824ba74fdc4SDon Brace device->removed = 1; 1825ba74fdc4SDon Brace hpsa_wait_for_outstanding_commands_for_dev(h, device); 1826ba74fdc4SDon Brace 1827d04e62b9SKevin Barnett hpsa_remove_sas_device(device); 1828096ccff4SKevin Barnett } 1829ba74fdc4SDon Brace } 1830096ccff4SKevin Barnett 18318aa60681SDon Brace static void adjust_hpsa_scsi_table(struct ctlr_info *h, 1832edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd[], int nsds) 1833edd16368SStephen M. Cameron { 1834edd16368SStephen M. Cameron /* sd contains scsi3 addresses and devtypes, and inquiry 1835edd16368SStephen M. Cameron * data. This function takes what's in sd to be the current 1836edd16368SStephen M. Cameron * reality and updates h->dev[] to reflect that reality. 1837edd16368SStephen M. Cameron */ 1838edd16368SStephen M. Cameron int i, entry, device_change, changes = 0; 1839edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *csd; 1840edd16368SStephen M. Cameron unsigned long flags; 1841edd16368SStephen M. Cameron struct hpsa_scsi_dev_t **added, **removed; 1842edd16368SStephen M. Cameron int nadded, nremoved; 1843edd16368SStephen M. Cameron 1844da03ded0SDon Brace /* 1845da03ded0SDon Brace * A reset can cause a device status to change 1846da03ded0SDon Brace * re-schedule the scan to see what happened. 1847da03ded0SDon Brace */ 1848da03ded0SDon Brace if (h->reset_in_progress) { 1849da03ded0SDon Brace h->drv_req_rescan = 1; 1850da03ded0SDon Brace return; 1851da03ded0SDon Brace } 1852edd16368SStephen M. Cameron 1853cfe5badcSScott Teel added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL); 1854cfe5badcSScott Teel removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL); 1855edd16368SStephen M. Cameron 1856edd16368SStephen M. Cameron if (!added || !removed) { 1857edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "out of memory in " 1858edd16368SStephen M. Cameron "adjust_hpsa_scsi_table\n"); 1859edd16368SStephen M. Cameron goto free_and_out; 1860edd16368SStephen M. Cameron } 1861edd16368SStephen M. Cameron 1862edd16368SStephen M. Cameron spin_lock_irqsave(&h->devlock, flags); 1863edd16368SStephen M. Cameron 1864edd16368SStephen M. Cameron /* find any devices in h->dev[] that are not in 1865edd16368SStephen M. Cameron * sd[] and remove them from h->dev[], and for any 1866edd16368SStephen M. Cameron * devices which have changed, remove the old device 1867edd16368SStephen M. Cameron * info and add the new device info. 1868bd9244f7SScott Teel * If minor device attributes change, just update 1869bd9244f7SScott Teel * the existing device structure. 1870edd16368SStephen M. Cameron */ 1871edd16368SStephen M. Cameron i = 0; 1872edd16368SStephen M. Cameron nremoved = 0; 1873edd16368SStephen M. Cameron nadded = 0; 1874edd16368SStephen M. Cameron while (i < h->ndevices) { 1875edd16368SStephen M. Cameron csd = h->dev[i]; 1876edd16368SStephen M. Cameron device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry); 1877edd16368SStephen M. Cameron if (device_change == DEVICE_NOT_FOUND) { 1878edd16368SStephen M. Cameron changes++; 18798aa60681SDon Brace hpsa_scsi_remove_entry(h, i, removed, &nremoved); 1880edd16368SStephen M. Cameron continue; /* remove ^^^, hence i not incremented */ 1881edd16368SStephen M. Cameron } else if (device_change == DEVICE_CHANGED) { 1882edd16368SStephen M. Cameron changes++; 18838aa60681SDon Brace hpsa_scsi_replace_entry(h, i, sd[entry], 18842a8ccf31SStephen M. Cameron added, &nadded, removed, &nremoved); 1885c7f172dcSStephen M. Cameron /* Set it to NULL to prevent it from being freed 1886c7f172dcSStephen M. Cameron * at the bottom of hpsa_update_scsi_devices() 1887c7f172dcSStephen M. Cameron */ 1888c7f172dcSStephen M. Cameron sd[entry] = NULL; 1889bd9244f7SScott Teel } else if (device_change == DEVICE_UPDATED) { 18908aa60681SDon Brace hpsa_scsi_update_entry(h, i, sd[entry]); 1891edd16368SStephen M. Cameron } 1892edd16368SStephen M. Cameron i++; 1893edd16368SStephen M. Cameron } 1894edd16368SStephen M. Cameron 1895edd16368SStephen M. Cameron /* Now, make sure every device listed in sd[] is also 1896edd16368SStephen M. Cameron * listed in h->dev[], adding them if they aren't found 1897edd16368SStephen M. Cameron */ 1898edd16368SStephen M. Cameron 1899edd16368SStephen M. Cameron for (i = 0; i < nsds; i++) { 1900edd16368SStephen M. Cameron if (!sd[i]) /* if already added above. */ 1901edd16368SStephen M. Cameron continue; 19029846590eSStephen M. Cameron 19039846590eSStephen M. Cameron /* Don't add devices which are NOT READY, FORMAT IN PROGRESS 19049846590eSStephen M. Cameron * as the SCSI mid-layer does not handle such devices well. 19059846590eSStephen M. Cameron * It relentlessly loops sending TUR at 3Hz, then READ(10) 19069846590eSStephen M. Cameron * at 160Hz, and prevents the system from coming up. 19079846590eSStephen M. Cameron */ 19089846590eSStephen M. Cameron if (sd[i]->volume_offline) { 19099846590eSStephen M. Cameron hpsa_show_volume_status(h, sd[i]); 19100d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline"); 19119846590eSStephen M. Cameron continue; 19129846590eSStephen M. Cameron } 19139846590eSStephen M. Cameron 1914edd16368SStephen M. Cameron device_change = hpsa_scsi_find_entry(sd[i], h->dev, 1915edd16368SStephen M. Cameron h->ndevices, &entry); 1916edd16368SStephen M. Cameron if (device_change == DEVICE_NOT_FOUND) { 1917edd16368SStephen M. Cameron changes++; 19188aa60681SDon Brace if (hpsa_scsi_add_entry(h, sd[i], added, &nadded) != 0) 1919edd16368SStephen M. Cameron break; 1920edd16368SStephen M. Cameron sd[i] = NULL; /* prevent from being freed later. */ 1921edd16368SStephen M. Cameron } else if (device_change == DEVICE_CHANGED) { 1922edd16368SStephen M. Cameron /* should never happen... */ 1923edd16368SStephen M. Cameron changes++; 1924edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 1925edd16368SStephen M. Cameron "device unexpectedly changed.\n"); 1926edd16368SStephen M. Cameron /* but if it does happen, we just ignore that device */ 1927edd16368SStephen M. Cameron } 1928edd16368SStephen M. Cameron } 192941ce4c35SStephen Cameron hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices); 193041ce4c35SStephen Cameron 193141ce4c35SStephen Cameron /* Now that h->dev[]->phys_disk[] is coherent, we can enable 193241ce4c35SStephen Cameron * any logical drives that need it enabled. 193341ce4c35SStephen Cameron */ 19341d33d85dSDon Brace for (i = 0; i < h->ndevices; i++) { 19351d33d85dSDon Brace if (h->dev[i] == NULL) 19361d33d85dSDon Brace continue; 193741ce4c35SStephen Cameron h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled; 19381d33d85dSDon Brace } 193941ce4c35SStephen Cameron 1940edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->devlock, flags); 1941edd16368SStephen M. Cameron 19429846590eSStephen M. Cameron /* Monitor devices which are in one of several NOT READY states to be 19439846590eSStephen M. Cameron * brought online later. This must be done without holding h->devlock, 19449846590eSStephen M. Cameron * so don't touch h->dev[] 19459846590eSStephen M. Cameron */ 19469846590eSStephen M. Cameron for (i = 0; i < nsds; i++) { 19479846590eSStephen M. Cameron if (!sd[i]) /* if already added above. */ 19489846590eSStephen M. Cameron continue; 19499846590eSStephen M. Cameron if (sd[i]->volume_offline) 19509846590eSStephen M. Cameron hpsa_monitor_offline_device(h, sd[i]->scsi3addr); 19519846590eSStephen M. Cameron } 19529846590eSStephen M. Cameron 1953edd16368SStephen M. Cameron /* Don't notify scsi mid layer of any changes the first time through 1954edd16368SStephen M. Cameron * (or if there are no changes) scsi_scan_host will do it later the 1955edd16368SStephen M. Cameron * first time through. 1956edd16368SStephen M. Cameron */ 19578aa60681SDon Brace if (!changes) 1958edd16368SStephen M. Cameron goto free_and_out; 1959edd16368SStephen M. Cameron 1960edd16368SStephen M. Cameron /* Notify scsi mid layer of any removed devices */ 1961edd16368SStephen M. Cameron for (i = 0; i < nremoved; i++) { 19621d33d85dSDon Brace if (removed[i] == NULL) 19631d33d85dSDon Brace continue; 1964096ccff4SKevin Barnett if (removed[i]->expose_device) 1965096ccff4SKevin Barnett hpsa_remove_device(h, removed[i]); 1966edd16368SStephen M. Cameron kfree(removed[i]); 1967edd16368SStephen M. Cameron removed[i] = NULL; 1968edd16368SStephen M. Cameron } 1969edd16368SStephen M. Cameron 1970edd16368SStephen M. Cameron /* Notify scsi mid layer of any added devices */ 1971edd16368SStephen M. Cameron for (i = 0; i < nadded; i++) { 1972096ccff4SKevin Barnett int rc = 0; 1973096ccff4SKevin Barnett 19741d33d85dSDon Brace if (added[i] == NULL) 197541ce4c35SStephen Cameron continue; 19762a168208SKevin Barnett if (!(added[i]->expose_device)) 1977edd16368SStephen M. Cameron continue; 1978096ccff4SKevin Barnett rc = hpsa_add_device(h, added[i]); 1979096ccff4SKevin Barnett if (!rc) 1980edd16368SStephen M. Cameron continue; 1981096ccff4SKevin Barnett dev_warn(&h->pdev->dev, 1982096ccff4SKevin Barnett "addition failed %d, device not added.", rc); 1983edd16368SStephen M. Cameron /* now we have to remove it from h->dev, 1984edd16368SStephen M. Cameron * since it didn't get added to scsi mid layer 1985edd16368SStephen M. Cameron */ 1986edd16368SStephen M. Cameron fixup_botched_add(h, added[i]); 1987853633e8SDon Brace h->drv_req_rescan = 1; 1988edd16368SStephen M. Cameron } 1989edd16368SStephen M. Cameron 1990edd16368SStephen M. Cameron free_and_out: 1991edd16368SStephen M. Cameron kfree(added); 1992edd16368SStephen M. Cameron kfree(removed); 1993edd16368SStephen M. Cameron } 1994edd16368SStephen M. Cameron 1995edd16368SStephen M. Cameron /* 19969e03aa2fSJoe Perches * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t * 1997edd16368SStephen M. Cameron * Assume's h->devlock is held. 1998edd16368SStephen M. Cameron */ 1999edd16368SStephen M. Cameron static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h, 2000edd16368SStephen M. Cameron int bus, int target, int lun) 2001edd16368SStephen M. Cameron { 2002edd16368SStephen M. Cameron int i; 2003edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd; 2004edd16368SStephen M. Cameron 2005edd16368SStephen M. Cameron for (i = 0; i < h->ndevices; i++) { 2006edd16368SStephen M. Cameron sd = h->dev[i]; 2007edd16368SStephen M. Cameron if (sd->bus == bus && sd->target == target && sd->lun == lun) 2008edd16368SStephen M. Cameron return sd; 2009edd16368SStephen M. Cameron } 2010edd16368SStephen M. Cameron return NULL; 2011edd16368SStephen M. Cameron } 2012edd16368SStephen M. Cameron 2013edd16368SStephen M. Cameron static int hpsa_slave_alloc(struct scsi_device *sdev) 2014edd16368SStephen M. Cameron { 2015edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd; 2016edd16368SStephen M. Cameron unsigned long flags; 2017edd16368SStephen M. Cameron struct ctlr_info *h; 2018edd16368SStephen M. Cameron 2019edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 2020edd16368SStephen M. Cameron spin_lock_irqsave(&h->devlock, flags); 2021d04e62b9SKevin Barnett if (sdev_channel(sdev) == HPSA_PHYSICAL_DEVICE_BUS) { 2022d04e62b9SKevin Barnett struct scsi_target *starget; 2023d04e62b9SKevin Barnett struct sas_rphy *rphy; 2024d04e62b9SKevin Barnett 2025d04e62b9SKevin Barnett starget = scsi_target(sdev); 2026d04e62b9SKevin Barnett rphy = target_to_rphy(starget); 2027d04e62b9SKevin Barnett sd = hpsa_find_device_by_sas_rphy(h, rphy); 2028d04e62b9SKevin Barnett if (sd) { 2029d04e62b9SKevin Barnett sd->target = sdev_id(sdev); 2030d04e62b9SKevin Barnett sd->lun = sdev->lun; 2031d04e62b9SKevin Barnett } 2032d04e62b9SKevin Barnett } else 2033edd16368SStephen M. Cameron sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev), 2034edd16368SStephen M. Cameron sdev_id(sdev), sdev->lun); 2035d04e62b9SKevin Barnett 2036d04e62b9SKevin Barnett if (sd && sd->expose_device) { 203703383736SDon Brace atomic_set(&sd->ioaccel_cmds_out, 0); 2038d04e62b9SKevin Barnett sdev->hostdata = sd; 203941ce4c35SStephen Cameron } else 204041ce4c35SStephen Cameron sdev->hostdata = NULL; 2041edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->devlock, flags); 2042edd16368SStephen M. Cameron return 0; 2043edd16368SStephen M. Cameron } 2044edd16368SStephen M. Cameron 204541ce4c35SStephen Cameron /* configure scsi device based on internal per-device structure */ 204641ce4c35SStephen Cameron static int hpsa_slave_configure(struct scsi_device *sdev) 204741ce4c35SStephen Cameron { 204841ce4c35SStephen Cameron struct hpsa_scsi_dev_t *sd; 204941ce4c35SStephen Cameron int queue_depth; 205041ce4c35SStephen Cameron 205141ce4c35SStephen Cameron sd = sdev->hostdata; 20522a168208SKevin Barnett sdev->no_uld_attach = !sd || !sd->expose_device; 205341ce4c35SStephen Cameron 205441ce4c35SStephen Cameron if (sd) 205541ce4c35SStephen Cameron queue_depth = sd->queue_depth != 0 ? 205641ce4c35SStephen Cameron sd->queue_depth : sdev->host->can_queue; 205741ce4c35SStephen Cameron else 205841ce4c35SStephen Cameron queue_depth = sdev->host->can_queue; 205941ce4c35SStephen Cameron 206041ce4c35SStephen Cameron scsi_change_queue_depth(sdev, queue_depth); 206141ce4c35SStephen Cameron 206241ce4c35SStephen Cameron return 0; 206341ce4c35SStephen Cameron } 206441ce4c35SStephen Cameron 2065edd16368SStephen M. Cameron static void hpsa_slave_destroy(struct scsi_device *sdev) 2066edd16368SStephen M. Cameron { 2067bcc44255SStephen M. Cameron /* nothing to do. */ 2068edd16368SStephen M. Cameron } 2069edd16368SStephen M. Cameron 2070d9a729f3SWebb Scales static void hpsa_free_ioaccel2_sg_chain_blocks(struct ctlr_info *h) 2071d9a729f3SWebb Scales { 2072d9a729f3SWebb Scales int i; 2073d9a729f3SWebb Scales 2074d9a729f3SWebb Scales if (!h->ioaccel2_cmd_sg_list) 2075d9a729f3SWebb Scales return; 2076d9a729f3SWebb Scales for (i = 0; i < h->nr_cmds; i++) { 2077d9a729f3SWebb Scales kfree(h->ioaccel2_cmd_sg_list[i]); 2078d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list[i] = NULL; 2079d9a729f3SWebb Scales } 2080d9a729f3SWebb Scales kfree(h->ioaccel2_cmd_sg_list); 2081d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list = NULL; 2082d9a729f3SWebb Scales } 2083d9a729f3SWebb Scales 2084d9a729f3SWebb Scales static int hpsa_allocate_ioaccel2_sg_chain_blocks(struct ctlr_info *h) 2085d9a729f3SWebb Scales { 2086d9a729f3SWebb Scales int i; 2087d9a729f3SWebb Scales 2088d9a729f3SWebb Scales if (h->chainsize <= 0) 2089d9a729f3SWebb Scales return 0; 2090d9a729f3SWebb Scales 2091d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list = 2092d9a729f3SWebb Scales kzalloc(sizeof(*h->ioaccel2_cmd_sg_list) * h->nr_cmds, 2093d9a729f3SWebb Scales GFP_KERNEL); 2094d9a729f3SWebb Scales if (!h->ioaccel2_cmd_sg_list) 2095d9a729f3SWebb Scales return -ENOMEM; 2096d9a729f3SWebb Scales for (i = 0; i < h->nr_cmds; i++) { 2097d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list[i] = 2098d9a729f3SWebb Scales kmalloc(sizeof(*h->ioaccel2_cmd_sg_list[i]) * 2099d9a729f3SWebb Scales h->maxsgentries, GFP_KERNEL); 2100d9a729f3SWebb Scales if (!h->ioaccel2_cmd_sg_list[i]) 2101d9a729f3SWebb Scales goto clean; 2102d9a729f3SWebb Scales } 2103d9a729f3SWebb Scales return 0; 2104d9a729f3SWebb Scales 2105d9a729f3SWebb Scales clean: 2106d9a729f3SWebb Scales hpsa_free_ioaccel2_sg_chain_blocks(h); 2107d9a729f3SWebb Scales return -ENOMEM; 2108d9a729f3SWebb Scales } 2109d9a729f3SWebb Scales 211033a2ffceSStephen M. Cameron static void hpsa_free_sg_chain_blocks(struct ctlr_info *h) 211133a2ffceSStephen M. Cameron { 211233a2ffceSStephen M. Cameron int i; 211333a2ffceSStephen M. Cameron 211433a2ffceSStephen M. Cameron if (!h->cmd_sg_list) 211533a2ffceSStephen M. Cameron return; 211633a2ffceSStephen M. Cameron for (i = 0; i < h->nr_cmds; i++) { 211733a2ffceSStephen M. Cameron kfree(h->cmd_sg_list[i]); 211833a2ffceSStephen M. Cameron h->cmd_sg_list[i] = NULL; 211933a2ffceSStephen M. Cameron } 212033a2ffceSStephen M. Cameron kfree(h->cmd_sg_list); 212133a2ffceSStephen M. Cameron h->cmd_sg_list = NULL; 212233a2ffceSStephen M. Cameron } 212333a2ffceSStephen M. Cameron 2124105a3dbcSRobert Elliott static int hpsa_alloc_sg_chain_blocks(struct ctlr_info *h) 212533a2ffceSStephen M. Cameron { 212633a2ffceSStephen M. Cameron int i; 212733a2ffceSStephen M. Cameron 212833a2ffceSStephen M. Cameron if (h->chainsize <= 0) 212933a2ffceSStephen M. Cameron return 0; 213033a2ffceSStephen M. Cameron 213133a2ffceSStephen M. Cameron h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds, 213233a2ffceSStephen M. Cameron GFP_KERNEL); 21333d4e6af8SRobert Elliott if (!h->cmd_sg_list) { 21343d4e6af8SRobert Elliott dev_err(&h->pdev->dev, "Failed to allocate SG list\n"); 213533a2ffceSStephen M. Cameron return -ENOMEM; 21363d4e6af8SRobert Elliott } 213733a2ffceSStephen M. Cameron for (i = 0; i < h->nr_cmds; i++) { 213833a2ffceSStephen M. Cameron h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) * 213933a2ffceSStephen M. Cameron h->chainsize, GFP_KERNEL); 21403d4e6af8SRobert Elliott if (!h->cmd_sg_list[i]) { 21413d4e6af8SRobert Elliott dev_err(&h->pdev->dev, "Failed to allocate cmd SG\n"); 214233a2ffceSStephen M. Cameron goto clean; 214333a2ffceSStephen M. Cameron } 21443d4e6af8SRobert Elliott } 214533a2ffceSStephen M. Cameron return 0; 214633a2ffceSStephen M. Cameron 214733a2ffceSStephen M. Cameron clean: 214833a2ffceSStephen M. Cameron hpsa_free_sg_chain_blocks(h); 214933a2ffceSStephen M. Cameron return -ENOMEM; 215033a2ffceSStephen M. Cameron } 215133a2ffceSStephen M. Cameron 2152d9a729f3SWebb Scales static int hpsa_map_ioaccel2_sg_chain_block(struct ctlr_info *h, 2153d9a729f3SWebb Scales struct io_accel2_cmd *cp, struct CommandList *c) 2154d9a729f3SWebb Scales { 2155d9a729f3SWebb Scales struct ioaccel2_sg_element *chain_block; 2156d9a729f3SWebb Scales u64 temp64; 2157d9a729f3SWebb Scales u32 chain_size; 2158d9a729f3SWebb Scales 2159d9a729f3SWebb Scales chain_block = h->ioaccel2_cmd_sg_list[c->cmdindex]; 2160a736e9b6SDon Brace chain_size = le32_to_cpu(cp->sg[0].length); 2161d9a729f3SWebb Scales temp64 = pci_map_single(h->pdev, chain_block, chain_size, 2162d9a729f3SWebb Scales PCI_DMA_TODEVICE); 2163d9a729f3SWebb Scales if (dma_mapping_error(&h->pdev->dev, temp64)) { 2164d9a729f3SWebb Scales /* prevent subsequent unmapping */ 2165d9a729f3SWebb Scales cp->sg->address = 0; 2166d9a729f3SWebb Scales return -1; 2167d9a729f3SWebb Scales } 2168d9a729f3SWebb Scales cp->sg->address = cpu_to_le64(temp64); 2169d9a729f3SWebb Scales return 0; 2170d9a729f3SWebb Scales } 2171d9a729f3SWebb Scales 2172d9a729f3SWebb Scales static void hpsa_unmap_ioaccel2_sg_chain_block(struct ctlr_info *h, 2173d9a729f3SWebb Scales struct io_accel2_cmd *cp) 2174d9a729f3SWebb Scales { 2175d9a729f3SWebb Scales struct ioaccel2_sg_element *chain_sg; 2176d9a729f3SWebb Scales u64 temp64; 2177d9a729f3SWebb Scales u32 chain_size; 2178d9a729f3SWebb Scales 2179d9a729f3SWebb Scales chain_sg = cp->sg; 2180d9a729f3SWebb Scales temp64 = le64_to_cpu(chain_sg->address); 2181a736e9b6SDon Brace chain_size = le32_to_cpu(cp->sg[0].length); 2182d9a729f3SWebb Scales pci_unmap_single(h->pdev, temp64, chain_size, PCI_DMA_TODEVICE); 2183d9a729f3SWebb Scales } 2184d9a729f3SWebb Scales 2185e2bea6dfSStephen M. Cameron static int hpsa_map_sg_chain_block(struct ctlr_info *h, 218633a2ffceSStephen M. Cameron struct CommandList *c) 218733a2ffceSStephen M. Cameron { 218833a2ffceSStephen M. Cameron struct SGDescriptor *chain_sg, *chain_block; 218933a2ffceSStephen M. Cameron u64 temp64; 219050a0decfSStephen M. Cameron u32 chain_len; 219133a2ffceSStephen M. Cameron 219233a2ffceSStephen M. Cameron chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 219333a2ffceSStephen M. Cameron chain_block = h->cmd_sg_list[c->cmdindex]; 219450a0decfSStephen M. Cameron chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN); 219550a0decfSStephen M. Cameron chain_len = sizeof(*chain_sg) * 21962b08b3e9SDon Brace (le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries); 219750a0decfSStephen M. Cameron chain_sg->Len = cpu_to_le32(chain_len); 219850a0decfSStephen M. Cameron temp64 = pci_map_single(h->pdev, chain_block, chain_len, 219933a2ffceSStephen M. Cameron PCI_DMA_TODEVICE); 2200e2bea6dfSStephen M. Cameron if (dma_mapping_error(&h->pdev->dev, temp64)) { 2201e2bea6dfSStephen M. Cameron /* prevent subsequent unmapping */ 220250a0decfSStephen M. Cameron chain_sg->Addr = cpu_to_le64(0); 2203e2bea6dfSStephen M. Cameron return -1; 2204e2bea6dfSStephen M. Cameron } 220550a0decfSStephen M. Cameron chain_sg->Addr = cpu_to_le64(temp64); 2206e2bea6dfSStephen M. Cameron return 0; 220733a2ffceSStephen M. Cameron } 220833a2ffceSStephen M. Cameron 220933a2ffceSStephen M. Cameron static void hpsa_unmap_sg_chain_block(struct ctlr_info *h, 221033a2ffceSStephen M. Cameron struct CommandList *c) 221133a2ffceSStephen M. Cameron { 221233a2ffceSStephen M. Cameron struct SGDescriptor *chain_sg; 221333a2ffceSStephen M. Cameron 221450a0decfSStephen M. Cameron if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries) 221533a2ffceSStephen M. Cameron return; 221633a2ffceSStephen M. Cameron 221733a2ffceSStephen M. Cameron chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 221850a0decfSStephen M. Cameron pci_unmap_single(h->pdev, le64_to_cpu(chain_sg->Addr), 221950a0decfSStephen M. Cameron le32_to_cpu(chain_sg->Len), PCI_DMA_TODEVICE); 222033a2ffceSStephen M. Cameron } 222133a2ffceSStephen M. Cameron 2222a09c1441SScott Teel 2223a09c1441SScott Teel /* Decode the various types of errors on ioaccel2 path. 2224a09c1441SScott Teel * Return 1 for any error that should generate a RAID path retry. 2225a09c1441SScott Teel * Return 0 for errors that don't require a RAID path retry. 2226a09c1441SScott Teel */ 2227a09c1441SScott Teel static int handle_ioaccel_mode2_error(struct ctlr_info *h, 2228c349775eSScott Teel struct CommandList *c, 2229c349775eSScott Teel struct scsi_cmnd *cmd, 2230ba74fdc4SDon Brace struct io_accel2_cmd *c2, 2231ba74fdc4SDon Brace struct hpsa_scsi_dev_t *dev) 2232c349775eSScott Teel { 2233c349775eSScott Teel int data_len; 2234a09c1441SScott Teel int retry = 0; 2235c40820d5SJoe Handzik u32 ioaccel2_resid = 0; 2236c349775eSScott Teel 2237c349775eSScott Teel switch (c2->error_data.serv_response) { 2238c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_COMPLETE: 2239c349775eSScott Teel switch (c2->error_data.status) { 2240c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_GOOD: 2241c349775eSScott Teel break; 2242c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND: 2243ee6b1889SStephen M. Cameron cmd->result |= SAM_STAT_CHECK_CONDITION; 2244c349775eSScott Teel if (c2->error_data.data_present != 2245ee6b1889SStephen M. Cameron IOACCEL2_SENSE_DATA_PRESENT) { 2246ee6b1889SStephen M. Cameron memset(cmd->sense_buffer, 0, 2247ee6b1889SStephen M. Cameron SCSI_SENSE_BUFFERSIZE); 2248c349775eSScott Teel break; 2249ee6b1889SStephen M. Cameron } 2250c349775eSScott Teel /* copy the sense data */ 2251c349775eSScott Teel data_len = c2->error_data.sense_data_len; 2252c349775eSScott Teel if (data_len > SCSI_SENSE_BUFFERSIZE) 2253c349775eSScott Teel data_len = SCSI_SENSE_BUFFERSIZE; 2254c349775eSScott Teel if (data_len > sizeof(c2->error_data.sense_data_buff)) 2255c349775eSScott Teel data_len = 2256c349775eSScott Teel sizeof(c2->error_data.sense_data_buff); 2257c349775eSScott Teel memcpy(cmd->sense_buffer, 2258c349775eSScott Teel c2->error_data.sense_data_buff, data_len); 2259a09c1441SScott Teel retry = 1; 2260c349775eSScott Teel break; 2261c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_BUSY: 2262a09c1441SScott Teel retry = 1; 2263c349775eSScott Teel break; 2264c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON: 2265a09c1441SScott Teel retry = 1; 2266c349775eSScott Teel break; 2267c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL: 22684a8da22bSStephen Cameron retry = 1; 2269c349775eSScott Teel break; 2270c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED: 2271a09c1441SScott Teel retry = 1; 2272c349775eSScott Teel break; 2273c349775eSScott Teel default: 2274a09c1441SScott Teel retry = 1; 2275c349775eSScott Teel break; 2276c349775eSScott Teel } 2277c349775eSScott Teel break; 2278c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_FAILURE: 2279c40820d5SJoe Handzik switch (c2->error_data.status) { 2280c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_IO_ERROR: 2281c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_IO_ABORTED: 2282c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_OVERRUN: 2283c40820d5SJoe Handzik retry = 1; 2284c40820d5SJoe Handzik break; 2285c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_UNDERRUN: 2286c40820d5SJoe Handzik cmd->result = (DID_OK << 16); /* host byte */ 2287c40820d5SJoe Handzik cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 2288c40820d5SJoe Handzik ioaccel2_resid = get_unaligned_le32( 2289c40820d5SJoe Handzik &c2->error_data.resid_cnt[0]); 2290c40820d5SJoe Handzik scsi_set_resid(cmd, ioaccel2_resid); 2291c40820d5SJoe Handzik break; 2292c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_NO_PATH_TO_DEVICE: 2293c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_INVALID_DEVICE: 2294c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_IOACCEL_DISABLED: 2295ba74fdc4SDon Brace /* 2296ba74fdc4SDon Brace * Did an HBA disk disappear? We will eventually 2297ba74fdc4SDon Brace * get a state change event from the controller but 2298ba74fdc4SDon Brace * in the meantime, we need to tell the OS that the 2299ba74fdc4SDon Brace * HBA disk is no longer there and stop I/O 2300ba74fdc4SDon Brace * from going down. This allows the potential re-insert 2301ba74fdc4SDon Brace * of the disk to get the same device node. 2302ba74fdc4SDon Brace */ 2303ba74fdc4SDon Brace if (dev->physical_device && dev->expose_device) { 2304ba74fdc4SDon Brace cmd->result = DID_NO_CONNECT << 16; 2305ba74fdc4SDon Brace dev->removed = 1; 2306ba74fdc4SDon Brace h->drv_req_rescan = 1; 2307ba74fdc4SDon Brace dev_warn(&h->pdev->dev, 2308ba74fdc4SDon Brace "%s: device is gone!\n", __func__); 2309ba74fdc4SDon Brace } else 2310ba74fdc4SDon Brace /* 2311ba74fdc4SDon Brace * Retry by sending down the RAID path. 2312ba74fdc4SDon Brace * We will get an event from ctlr to 2313ba74fdc4SDon Brace * trigger rescan regardless. 2314ba74fdc4SDon Brace */ 2315c40820d5SJoe Handzik retry = 1; 2316c40820d5SJoe Handzik break; 2317c40820d5SJoe Handzik default: 2318c40820d5SJoe Handzik retry = 1; 2319c40820d5SJoe Handzik } 2320c349775eSScott Teel break; 2321c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE: 2322c349775eSScott Teel break; 2323c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS: 2324c349775eSScott Teel break; 2325c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_REJECTED: 2326a09c1441SScott Teel retry = 1; 2327c349775eSScott Teel break; 2328c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN: 2329c349775eSScott Teel break; 2330c349775eSScott Teel default: 2331a09c1441SScott Teel retry = 1; 2332c349775eSScott Teel break; 2333c349775eSScott Teel } 2334a09c1441SScott Teel 2335a09c1441SScott Teel return retry; /* retry on raid path? */ 2336c349775eSScott Teel } 2337c349775eSScott Teel 2338a58e7e53SWebb Scales static void hpsa_cmd_resolve_events(struct ctlr_info *h, 2339a58e7e53SWebb Scales struct CommandList *c) 2340a58e7e53SWebb Scales { 2341d604f533SWebb Scales bool do_wake = false; 2342d604f533SWebb Scales 2343a58e7e53SWebb Scales /* 2344a58e7e53SWebb Scales * Prevent the following race in the abort handler: 2345a58e7e53SWebb Scales * 2346a58e7e53SWebb Scales * 1. LLD is requested to abort a SCSI command 2347a58e7e53SWebb Scales * 2. The SCSI command completes 2348a58e7e53SWebb Scales * 3. The struct CommandList associated with step 2 is made available 2349a58e7e53SWebb Scales * 4. New I/O request to LLD to another LUN re-uses struct CommandList 2350a58e7e53SWebb Scales * 5. Abort handler follows scsi_cmnd->host_scribble and 2351a58e7e53SWebb Scales * finds struct CommandList and tries to aborts it 2352a58e7e53SWebb Scales * Now we have aborted the wrong command. 2353a58e7e53SWebb Scales * 2354d604f533SWebb Scales * Reset c->scsi_cmd here so that the abort or reset handler will know 2355d604f533SWebb Scales * this command has completed. Then, check to see if the handler is 2356a58e7e53SWebb Scales * waiting for this command, and, if so, wake it. 2357a58e7e53SWebb Scales */ 2358a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_IDLE; 2359d604f533SWebb Scales mb(); /* Declare command idle before checking for pending events. */ 2360a58e7e53SWebb Scales if (c->abort_pending) { 2361d604f533SWebb Scales do_wake = true; 2362a58e7e53SWebb Scales c->abort_pending = false; 2363a58e7e53SWebb Scales } 2364d604f533SWebb Scales if (c->reset_pending) { 2365d604f533SWebb Scales unsigned long flags; 2366d604f533SWebb Scales struct hpsa_scsi_dev_t *dev; 2367d604f533SWebb Scales 2368d604f533SWebb Scales /* 2369d604f533SWebb Scales * There appears to be a reset pending; lock the lock and 2370d604f533SWebb Scales * reconfirm. If so, then decrement the count of outstanding 2371d604f533SWebb Scales * commands and wake the reset command if this is the last one. 2372d604f533SWebb Scales */ 2373d604f533SWebb Scales spin_lock_irqsave(&h->lock, flags); 2374d604f533SWebb Scales dev = c->reset_pending; /* Re-fetch under the lock. */ 2375d604f533SWebb Scales if (dev && atomic_dec_and_test(&dev->reset_cmds_out)) 2376d604f533SWebb Scales do_wake = true; 2377d604f533SWebb Scales c->reset_pending = NULL; 2378d604f533SWebb Scales spin_unlock_irqrestore(&h->lock, flags); 2379d604f533SWebb Scales } 2380d604f533SWebb Scales 2381d604f533SWebb Scales if (do_wake) 2382d604f533SWebb Scales wake_up_all(&h->event_sync_wait_queue); 2383a58e7e53SWebb Scales } 2384a58e7e53SWebb Scales 238573153fe5SWebb Scales static void hpsa_cmd_resolve_and_free(struct ctlr_info *h, 238673153fe5SWebb Scales struct CommandList *c) 238773153fe5SWebb Scales { 238873153fe5SWebb Scales hpsa_cmd_resolve_events(h, c); 238973153fe5SWebb Scales cmd_tagged_free(h, c); 239073153fe5SWebb Scales } 239173153fe5SWebb Scales 23928a0ff92cSWebb Scales static void hpsa_cmd_free_and_done(struct ctlr_info *h, 23938a0ff92cSWebb Scales struct CommandList *c, struct scsi_cmnd *cmd) 23948a0ff92cSWebb Scales { 239573153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 2396d49c2077SDon Brace if (cmd && cmd->scsi_done) 23978a0ff92cSWebb Scales cmd->scsi_done(cmd); 23988a0ff92cSWebb Scales } 23998a0ff92cSWebb Scales 24008a0ff92cSWebb Scales static void hpsa_retry_cmd(struct ctlr_info *h, struct CommandList *c) 24018a0ff92cSWebb Scales { 24028a0ff92cSWebb Scales INIT_WORK(&c->work, hpsa_command_resubmit_worker); 24038a0ff92cSWebb Scales queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work); 24048a0ff92cSWebb Scales } 24058a0ff92cSWebb Scales 2406a58e7e53SWebb Scales static void hpsa_set_scsi_cmd_aborted(struct scsi_cmnd *cmd) 2407a58e7e53SWebb Scales { 2408a58e7e53SWebb Scales cmd->result = DID_ABORT << 16; 2409a58e7e53SWebb Scales } 2410a58e7e53SWebb Scales 2411a58e7e53SWebb Scales static void hpsa_cmd_abort_and_free(struct ctlr_info *h, struct CommandList *c, 2412a58e7e53SWebb Scales struct scsi_cmnd *cmd) 2413a58e7e53SWebb Scales { 2414a58e7e53SWebb Scales hpsa_set_scsi_cmd_aborted(cmd); 2415a58e7e53SWebb Scales dev_warn(&h->pdev->dev, "CDB %16phN was aborted with status 0x%x\n", 2416a58e7e53SWebb Scales c->Request.CDB, c->err_info->ScsiStatus); 241773153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 2418a58e7e53SWebb Scales } 2419a58e7e53SWebb Scales 2420c349775eSScott Teel static void process_ioaccel2_completion(struct ctlr_info *h, 2421c349775eSScott Teel struct CommandList *c, struct scsi_cmnd *cmd, 2422c349775eSScott Teel struct hpsa_scsi_dev_t *dev) 2423c349775eSScott Teel { 2424c349775eSScott Teel struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 2425c349775eSScott Teel 2426c349775eSScott Teel /* check for good status */ 2427c349775eSScott Teel if (likely(c2->error_data.serv_response == 0 && 24288a0ff92cSWebb Scales c2->error_data.status == 0)) 24298a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, c, cmd); 2430c349775eSScott Teel 24318a0ff92cSWebb Scales /* 24328a0ff92cSWebb Scales * Any RAID offload error results in retry which will use 2433c349775eSScott Teel * the normal I/O path so the controller can handle whatever's 2434c349775eSScott Teel * wrong. 2435c349775eSScott Teel */ 2436f3f01730SKevin Barnett if (is_logical_device(dev) && 2437c349775eSScott Teel c2->error_data.serv_response == 2438c349775eSScott Teel IOACCEL2_SERV_RESPONSE_FAILURE) { 2439080ef1ccSDon Brace if (c2->error_data.status == 2440064d1b1dSDon Brace IOACCEL2_STATUS_SR_IOACCEL_DISABLED) { 2441c349775eSScott Teel dev->offload_enabled = 0; 2442064d1b1dSDon Brace dev->offload_to_be_enabled = 0; 2443064d1b1dSDon Brace } 24448a0ff92cSWebb Scales 24458a0ff92cSWebb Scales return hpsa_retry_cmd(h, c); 2446080ef1ccSDon Brace } 2447080ef1ccSDon Brace 2448ba74fdc4SDon Brace if (handle_ioaccel_mode2_error(h, c, cmd, c2, dev)) 24498a0ff92cSWebb Scales return hpsa_retry_cmd(h, c); 2450080ef1ccSDon Brace 24518a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, c, cmd); 2452c349775eSScott Teel } 2453c349775eSScott Teel 24549437ac43SStephen Cameron /* Returns 0 on success, < 0 otherwise. */ 24559437ac43SStephen Cameron static int hpsa_evaluate_tmf_status(struct ctlr_info *h, 24569437ac43SStephen Cameron struct CommandList *cp) 24579437ac43SStephen Cameron { 24589437ac43SStephen Cameron u8 tmf_status = cp->err_info->ScsiStatus; 24599437ac43SStephen Cameron 24609437ac43SStephen Cameron switch (tmf_status) { 24619437ac43SStephen Cameron case CISS_TMF_COMPLETE: 24629437ac43SStephen Cameron /* 24639437ac43SStephen Cameron * CISS_TMF_COMPLETE never happens, instead, 24649437ac43SStephen Cameron * ei->CommandStatus == 0 for this case. 24659437ac43SStephen Cameron */ 24669437ac43SStephen Cameron case CISS_TMF_SUCCESS: 24679437ac43SStephen Cameron return 0; 24689437ac43SStephen Cameron case CISS_TMF_INVALID_FRAME: 24699437ac43SStephen Cameron case CISS_TMF_NOT_SUPPORTED: 24709437ac43SStephen Cameron case CISS_TMF_FAILED: 24719437ac43SStephen Cameron case CISS_TMF_WRONG_LUN: 24729437ac43SStephen Cameron case CISS_TMF_OVERLAPPED_TAG: 24739437ac43SStephen Cameron break; 24749437ac43SStephen Cameron default: 24759437ac43SStephen Cameron dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n", 24769437ac43SStephen Cameron tmf_status); 24779437ac43SStephen Cameron break; 24789437ac43SStephen Cameron } 24799437ac43SStephen Cameron return -tmf_status; 24809437ac43SStephen Cameron } 24819437ac43SStephen Cameron 24821fb011fbSStephen M. Cameron static void complete_scsi_command(struct CommandList *cp) 2483edd16368SStephen M. Cameron { 2484edd16368SStephen M. Cameron struct scsi_cmnd *cmd; 2485edd16368SStephen M. Cameron struct ctlr_info *h; 2486edd16368SStephen M. Cameron struct ErrorInfo *ei; 2487283b4a9bSStephen M. Cameron struct hpsa_scsi_dev_t *dev; 2488d9a729f3SWebb Scales struct io_accel2_cmd *c2; 2489edd16368SStephen M. Cameron 24909437ac43SStephen Cameron u8 sense_key; 24919437ac43SStephen Cameron u8 asc; /* additional sense code */ 24929437ac43SStephen Cameron u8 ascq; /* additional sense code qualifier */ 2493db111e18SStephen M. Cameron unsigned long sense_data_size; 2494edd16368SStephen M. Cameron 2495edd16368SStephen M. Cameron ei = cp->err_info; 24967fa3030cSStephen Cameron cmd = cp->scsi_cmd; 2497edd16368SStephen M. Cameron h = cp->h; 2498d49c2077SDon Brace 2499d49c2077SDon Brace if (!cmd->device) { 2500d49c2077SDon Brace cmd->result = DID_NO_CONNECT << 16; 2501d49c2077SDon Brace return hpsa_cmd_free_and_done(h, cp, cmd); 2502d49c2077SDon Brace } 2503d49c2077SDon Brace 2504283b4a9bSStephen M. Cameron dev = cmd->device->hostdata; 250545e596cdSDon Brace if (!dev) { 250645e596cdSDon Brace cmd->result = DID_NO_CONNECT << 16; 250745e596cdSDon Brace return hpsa_cmd_free_and_done(h, cp, cmd); 250845e596cdSDon Brace } 2509d9a729f3SWebb Scales c2 = &h->ioaccel2_cmd_pool[cp->cmdindex]; 2510edd16368SStephen M. Cameron 2511edd16368SStephen M. Cameron scsi_dma_unmap(cmd); /* undo the DMA mappings */ 2512e1f7de0cSMatt Gates if ((cp->cmd_type == CMD_SCSI) && 25132b08b3e9SDon Brace (le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries)) 251433a2ffceSStephen M. Cameron hpsa_unmap_sg_chain_block(h, cp); 2515edd16368SStephen M. Cameron 2516d9a729f3SWebb Scales if ((cp->cmd_type == CMD_IOACCEL2) && 2517d9a729f3SWebb Scales (c2->sg[0].chain_indicator == IOACCEL2_CHAIN)) 2518d9a729f3SWebb Scales hpsa_unmap_ioaccel2_sg_chain_block(h, c2); 2519d9a729f3SWebb Scales 2520edd16368SStephen M. Cameron cmd->result = (DID_OK << 16); /* host byte */ 2521edd16368SStephen M. Cameron cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 2522c349775eSScott Teel 2523d49c2077SDon Brace if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1) { 2524d49c2077SDon Brace if (dev->physical_device && dev->expose_device && 2525d49c2077SDon Brace dev->removed) { 2526d49c2077SDon Brace cmd->result = DID_NO_CONNECT << 16; 2527d49c2077SDon Brace return hpsa_cmd_free_and_done(h, cp, cmd); 2528d49c2077SDon Brace } 2529d49c2077SDon Brace if (likely(cp->phys_disk != NULL)) 253003383736SDon Brace atomic_dec(&cp->phys_disk->ioaccel_cmds_out); 2531d49c2077SDon Brace } 253203383736SDon Brace 253325163bd5SWebb Scales /* 253425163bd5SWebb Scales * We check for lockup status here as it may be set for 253525163bd5SWebb Scales * CMD_SCSI, CMD_IOACCEL1 and CMD_IOACCEL2 commands by 253625163bd5SWebb Scales * fail_all_oustanding_cmds() 253725163bd5SWebb Scales */ 253825163bd5SWebb Scales if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) { 253925163bd5SWebb Scales /* DID_NO_CONNECT will prevent a retry */ 254025163bd5SWebb Scales cmd->result = DID_NO_CONNECT << 16; 25418a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, cp, cmd); 254225163bd5SWebb Scales } 254325163bd5SWebb Scales 2544d604f533SWebb Scales if ((unlikely(hpsa_is_pending_event(cp)))) { 2545d604f533SWebb Scales if (cp->reset_pending) 2546*bfd7546cSDon Brace return hpsa_cmd_free_and_done(h, cp, cmd); 2547d604f533SWebb Scales if (cp->abort_pending) 2548d604f533SWebb Scales return hpsa_cmd_abort_and_free(h, cp, cmd); 2549d604f533SWebb Scales } 2550d604f533SWebb Scales 2551c349775eSScott Teel if (cp->cmd_type == CMD_IOACCEL2) 2552c349775eSScott Teel return process_ioaccel2_completion(h, cp, cmd, dev); 2553c349775eSScott Teel 25546aa4c361SRobert Elliott scsi_set_resid(cmd, ei->ResidualCnt); 25558a0ff92cSWebb Scales if (ei->CommandStatus == 0) 25568a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, cp, cmd); 25576aa4c361SRobert Elliott 2558e1f7de0cSMatt Gates /* For I/O accelerator commands, copy over some fields to the normal 2559e1f7de0cSMatt Gates * CISS header used below for error handling. 2560e1f7de0cSMatt Gates */ 2561e1f7de0cSMatt Gates if (cp->cmd_type == CMD_IOACCEL1) { 2562e1f7de0cSMatt Gates struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex]; 25632b08b3e9SDon Brace cp->Header.SGList = scsi_sg_count(cmd); 25642b08b3e9SDon Brace cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList); 25652b08b3e9SDon Brace cp->Request.CDBLen = le16_to_cpu(c->io_flags) & 25662b08b3e9SDon Brace IOACCEL1_IOFLAGS_CDBLEN_MASK; 256750a0decfSStephen M. Cameron cp->Header.tag = c->tag; 2568e1f7de0cSMatt Gates memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8); 2569e1f7de0cSMatt Gates memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen); 2570283b4a9bSStephen M. Cameron 2571283b4a9bSStephen M. Cameron /* Any RAID offload error results in retry which will use 2572283b4a9bSStephen M. Cameron * the normal I/O path so the controller can handle whatever's 2573283b4a9bSStephen M. Cameron * wrong. 2574283b4a9bSStephen M. Cameron */ 2575f3f01730SKevin Barnett if (is_logical_device(dev)) { 2576283b4a9bSStephen M. Cameron if (ei->CommandStatus == CMD_IOACCEL_DISABLED) 2577283b4a9bSStephen M. Cameron dev->offload_enabled = 0; 25788a0ff92cSWebb Scales return hpsa_retry_cmd(h, cp); 2579283b4a9bSStephen M. Cameron } 2580e1f7de0cSMatt Gates } 2581e1f7de0cSMatt Gates 2582edd16368SStephen M. Cameron /* an error has occurred */ 2583edd16368SStephen M. Cameron switch (ei->CommandStatus) { 2584edd16368SStephen M. Cameron 2585edd16368SStephen M. Cameron case CMD_TARGET_STATUS: 25869437ac43SStephen Cameron cmd->result |= ei->ScsiStatus; 25879437ac43SStephen Cameron /* copy the sense data */ 25889437ac43SStephen Cameron if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo)) 25899437ac43SStephen Cameron sense_data_size = SCSI_SENSE_BUFFERSIZE; 25909437ac43SStephen Cameron else 25919437ac43SStephen Cameron sense_data_size = sizeof(ei->SenseInfo); 25929437ac43SStephen Cameron if (ei->SenseLen < sense_data_size) 25939437ac43SStephen Cameron sense_data_size = ei->SenseLen; 25949437ac43SStephen Cameron memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size); 25959437ac43SStephen Cameron if (ei->ScsiStatus) 25969437ac43SStephen Cameron decode_sense_data(ei->SenseInfo, sense_data_size, 25979437ac43SStephen Cameron &sense_key, &asc, &ascq); 2598edd16368SStephen M. Cameron if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) { 25991d3b3609SMatt Gates if (sense_key == ABORTED_COMMAND) { 26002e311fbaSStephen M. Cameron cmd->result |= DID_SOFT_ERROR << 16; 26011d3b3609SMatt Gates break; 26021d3b3609SMatt Gates } 2603edd16368SStephen M. Cameron break; 2604edd16368SStephen M. Cameron } 2605edd16368SStephen M. Cameron /* Problem was not a check condition 2606edd16368SStephen M. Cameron * Pass it up to the upper layers... 2607edd16368SStephen M. Cameron */ 2608edd16368SStephen M. Cameron if (ei->ScsiStatus) { 2609edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "cp %p has status 0x%x " 2610edd16368SStephen M. Cameron "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, " 2611edd16368SStephen M. Cameron "Returning result: 0x%x\n", 2612edd16368SStephen M. Cameron cp, ei->ScsiStatus, 2613edd16368SStephen M. Cameron sense_key, asc, ascq, 2614edd16368SStephen M. Cameron cmd->result); 2615edd16368SStephen M. Cameron } else { /* scsi status is zero??? How??? */ 2616edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. " 2617edd16368SStephen M. Cameron "Returning no connection.\n", cp), 2618edd16368SStephen M. Cameron 2619edd16368SStephen M. Cameron /* Ordinarily, this case should never happen, 2620edd16368SStephen M. Cameron * but there is a bug in some released firmware 2621edd16368SStephen M. Cameron * revisions that allows it to happen if, for 2622edd16368SStephen M. Cameron * example, a 4100 backplane loses power and 2623edd16368SStephen M. Cameron * the tape drive is in it. We assume that 2624edd16368SStephen M. Cameron * it's a fatal error of some kind because we 2625edd16368SStephen M. Cameron * can't show that it wasn't. We will make it 2626edd16368SStephen M. Cameron * look like selection timeout since that is 2627edd16368SStephen M. Cameron * the most common reason for this to occur, 2628edd16368SStephen M. Cameron * and it's severe enough. 2629edd16368SStephen M. Cameron */ 2630edd16368SStephen M. Cameron 2631edd16368SStephen M. Cameron cmd->result = DID_NO_CONNECT << 16; 2632edd16368SStephen M. Cameron } 2633edd16368SStephen M. Cameron break; 2634edd16368SStephen M. Cameron 2635edd16368SStephen M. Cameron case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 2636edd16368SStephen M. Cameron break; 2637edd16368SStephen M. Cameron case CMD_DATA_OVERRUN: 2638f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, 2639f42e81e1SStephen Cameron "CDB %16phN data overrun\n", cp->Request.CDB); 2640edd16368SStephen M. Cameron break; 2641edd16368SStephen M. Cameron case CMD_INVALID: { 2642edd16368SStephen M. Cameron /* print_bytes(cp, sizeof(*cp), 1, 0); 2643edd16368SStephen M. Cameron print_cmd(cp); */ 2644edd16368SStephen M. Cameron /* We get CMD_INVALID if you address a non-existent device 2645edd16368SStephen M. Cameron * instead of a selection timeout (no response). You will 2646edd16368SStephen M. Cameron * see this if you yank out a drive, then try to access it. 2647edd16368SStephen M. Cameron * This is kind of a shame because it means that any other 2648edd16368SStephen M. Cameron * CMD_INVALID (e.g. driver bug) will get interpreted as a 2649edd16368SStephen M. Cameron * missing target. */ 2650edd16368SStephen M. Cameron cmd->result = DID_NO_CONNECT << 16; 2651edd16368SStephen M. Cameron } 2652edd16368SStephen M. Cameron break; 2653edd16368SStephen M. Cameron case CMD_PROTOCOL_ERR: 2654256d0eaaSStephen M. Cameron cmd->result = DID_ERROR << 16; 2655f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n", 2656f42e81e1SStephen Cameron cp->Request.CDB); 2657edd16368SStephen M. Cameron break; 2658edd16368SStephen M. Cameron case CMD_HARDWARE_ERR: 2659edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2660f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n", 2661f42e81e1SStephen Cameron cp->Request.CDB); 2662edd16368SStephen M. Cameron break; 2663edd16368SStephen M. Cameron case CMD_CONNECTION_LOST: 2664edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2665f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n", 2666f42e81e1SStephen Cameron cp->Request.CDB); 2667edd16368SStephen M. Cameron break; 2668edd16368SStephen M. Cameron case CMD_ABORTED: 2669a58e7e53SWebb Scales /* Return now to avoid calling scsi_done(). */ 2670a58e7e53SWebb Scales return hpsa_cmd_abort_and_free(h, cp, cmd); 2671edd16368SStephen M. Cameron case CMD_ABORT_FAILED: 2672edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2673f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n", 2674f42e81e1SStephen Cameron cp->Request.CDB); 2675edd16368SStephen M. Cameron break; 2676edd16368SStephen M. Cameron case CMD_UNSOLICITED_ABORT: 2677f6e76055SStephen M. Cameron cmd->result = DID_SOFT_ERROR << 16; /* retry the command */ 2678f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n", 2679f42e81e1SStephen Cameron cp->Request.CDB); 2680edd16368SStephen M. Cameron break; 2681edd16368SStephen M. Cameron case CMD_TIMEOUT: 2682edd16368SStephen M. Cameron cmd->result = DID_TIME_OUT << 16; 2683f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN timed out\n", 2684f42e81e1SStephen Cameron cp->Request.CDB); 2685edd16368SStephen M. Cameron break; 26861d5e2ed0SStephen M. Cameron case CMD_UNABORTABLE: 26871d5e2ed0SStephen M. Cameron cmd->result = DID_ERROR << 16; 26881d5e2ed0SStephen M. Cameron dev_warn(&h->pdev->dev, "Command unabortable\n"); 26891d5e2ed0SStephen M. Cameron break; 26909437ac43SStephen Cameron case CMD_TMF_STATUS: 26919437ac43SStephen Cameron if (hpsa_evaluate_tmf_status(h, cp)) /* TMF failed? */ 26929437ac43SStephen Cameron cmd->result = DID_ERROR << 16; 26939437ac43SStephen Cameron break; 2694283b4a9bSStephen M. Cameron case CMD_IOACCEL_DISABLED: 2695283b4a9bSStephen M. Cameron /* This only handles the direct pass-through case since RAID 2696283b4a9bSStephen M. Cameron * offload is handled above. Just attempt a retry. 2697283b4a9bSStephen M. Cameron */ 2698283b4a9bSStephen M. Cameron cmd->result = DID_SOFT_ERROR << 16; 2699283b4a9bSStephen M. Cameron dev_warn(&h->pdev->dev, 2700283b4a9bSStephen M. Cameron "cp %p had HP SSD Smart Path error\n", cp); 2701283b4a9bSStephen M. Cameron break; 2702edd16368SStephen M. Cameron default: 2703edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2704edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n", 2705edd16368SStephen M. Cameron cp, ei->CommandStatus); 2706edd16368SStephen M. Cameron } 27078a0ff92cSWebb Scales 27088a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, cp, cmd); 2709edd16368SStephen M. Cameron } 2710edd16368SStephen M. Cameron 2711edd16368SStephen M. Cameron static void hpsa_pci_unmap(struct pci_dev *pdev, 2712edd16368SStephen M. Cameron struct CommandList *c, int sg_used, int data_direction) 2713edd16368SStephen M. Cameron { 2714edd16368SStephen M. Cameron int i; 2715edd16368SStephen M. Cameron 271650a0decfSStephen M. Cameron for (i = 0; i < sg_used; i++) 271750a0decfSStephen M. Cameron pci_unmap_single(pdev, (dma_addr_t) le64_to_cpu(c->SG[i].Addr), 271850a0decfSStephen M. Cameron le32_to_cpu(c->SG[i].Len), 2719edd16368SStephen M. Cameron data_direction); 2720edd16368SStephen M. Cameron } 2721edd16368SStephen M. Cameron 2722a2dac136SStephen M. Cameron static int hpsa_map_one(struct pci_dev *pdev, 2723edd16368SStephen M. Cameron struct CommandList *cp, 2724edd16368SStephen M. Cameron unsigned char *buf, 2725edd16368SStephen M. Cameron size_t buflen, 2726edd16368SStephen M. Cameron int data_direction) 2727edd16368SStephen M. Cameron { 272801a02ffcSStephen M. Cameron u64 addr64; 2729edd16368SStephen M. Cameron 2730edd16368SStephen M. Cameron if (buflen == 0 || data_direction == PCI_DMA_NONE) { 2731edd16368SStephen M. Cameron cp->Header.SGList = 0; 273250a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(0); 2733a2dac136SStephen M. Cameron return 0; 2734edd16368SStephen M. Cameron } 2735edd16368SStephen M. Cameron 273650a0decfSStephen M. Cameron addr64 = pci_map_single(pdev, buf, buflen, data_direction); 2737eceaae18SShuah Khan if (dma_mapping_error(&pdev->dev, addr64)) { 2738a2dac136SStephen M. Cameron /* Prevent subsequent unmap of something never mapped */ 2739eceaae18SShuah Khan cp->Header.SGList = 0; 274050a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(0); 2741a2dac136SStephen M. Cameron return -1; 2742eceaae18SShuah Khan } 274350a0decfSStephen M. Cameron cp->SG[0].Addr = cpu_to_le64(addr64); 274450a0decfSStephen M. Cameron cp->SG[0].Len = cpu_to_le32(buflen); 274550a0decfSStephen M. Cameron cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */ 274650a0decfSStephen M. Cameron cp->Header.SGList = 1; /* no. SGs contig in this cmd */ 274750a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */ 2748a2dac136SStephen M. Cameron return 0; 2749edd16368SStephen M. Cameron } 2750edd16368SStephen M. Cameron 275125163bd5SWebb Scales #define NO_TIMEOUT ((unsigned long) -1) 275225163bd5SWebb Scales #define DEFAULT_TIMEOUT 30000 /* milliseconds */ 275325163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h, 275425163bd5SWebb Scales struct CommandList *c, int reply_queue, unsigned long timeout_msecs) 2755edd16368SStephen M. Cameron { 2756edd16368SStephen M. Cameron DECLARE_COMPLETION_ONSTACK(wait); 2757edd16368SStephen M. Cameron 2758edd16368SStephen M. Cameron c->waiting = &wait; 275925163bd5SWebb Scales __enqueue_cmd_and_start_io(h, c, reply_queue); 276025163bd5SWebb Scales if (timeout_msecs == NO_TIMEOUT) { 276125163bd5SWebb Scales /* TODO: get rid of this no-timeout thing */ 276225163bd5SWebb Scales wait_for_completion_io(&wait); 276325163bd5SWebb Scales return IO_OK; 276425163bd5SWebb Scales } 276525163bd5SWebb Scales if (!wait_for_completion_io_timeout(&wait, 276625163bd5SWebb Scales msecs_to_jiffies(timeout_msecs))) { 276725163bd5SWebb Scales dev_warn(&h->pdev->dev, "Command timed out.\n"); 276825163bd5SWebb Scales return -ETIMEDOUT; 276925163bd5SWebb Scales } 277025163bd5SWebb Scales return IO_OK; 277125163bd5SWebb Scales } 277225163bd5SWebb Scales 277325163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c, 277425163bd5SWebb Scales int reply_queue, unsigned long timeout_msecs) 277525163bd5SWebb Scales { 277625163bd5SWebb Scales if (unlikely(lockup_detected(h))) { 277725163bd5SWebb Scales c->err_info->CommandStatus = CMD_CTLR_LOCKUP; 277825163bd5SWebb Scales return IO_OK; 277925163bd5SWebb Scales } 278025163bd5SWebb Scales return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs); 2781edd16368SStephen M. Cameron } 2782edd16368SStephen M. Cameron 2783094963daSStephen M. Cameron static u32 lockup_detected(struct ctlr_info *h) 2784094963daSStephen M. Cameron { 2785094963daSStephen M. Cameron int cpu; 2786094963daSStephen M. Cameron u32 rc, *lockup_detected; 2787094963daSStephen M. Cameron 2788094963daSStephen M. Cameron cpu = get_cpu(); 2789094963daSStephen M. Cameron lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 2790094963daSStephen M. Cameron rc = *lockup_detected; 2791094963daSStephen M. Cameron put_cpu(); 2792094963daSStephen M. Cameron return rc; 2793094963daSStephen M. Cameron } 2794094963daSStephen M. Cameron 27959c2fc160SStephen M. Cameron #define MAX_DRIVER_CMD_RETRIES 25 279625163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h, 279725163bd5SWebb Scales struct CommandList *c, int data_direction, unsigned long timeout_msecs) 2798edd16368SStephen M. Cameron { 27999c2fc160SStephen M. Cameron int backoff_time = 10, retry_count = 0; 280025163bd5SWebb Scales int rc; 2801edd16368SStephen M. Cameron 2802edd16368SStephen M. Cameron do { 28037630abd0SJoe Perches memset(c->err_info, 0, sizeof(*c->err_info)); 280425163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 280525163bd5SWebb Scales timeout_msecs); 280625163bd5SWebb Scales if (rc) 280725163bd5SWebb Scales break; 2808edd16368SStephen M. Cameron retry_count++; 28099c2fc160SStephen M. Cameron if (retry_count > 3) { 28109c2fc160SStephen M. Cameron msleep(backoff_time); 28119c2fc160SStephen M. Cameron if (backoff_time < 1000) 28129c2fc160SStephen M. Cameron backoff_time *= 2; 28139c2fc160SStephen M. Cameron } 2814852af20aSMatt Bondurant } while ((check_for_unit_attention(h, c) || 28159c2fc160SStephen M. Cameron check_for_busy(h, c)) && 28169c2fc160SStephen M. Cameron retry_count <= MAX_DRIVER_CMD_RETRIES); 2817edd16368SStephen M. Cameron hpsa_pci_unmap(h->pdev, c, 1, data_direction); 281825163bd5SWebb Scales if (retry_count > MAX_DRIVER_CMD_RETRIES) 281925163bd5SWebb Scales rc = -EIO; 282025163bd5SWebb Scales return rc; 2821edd16368SStephen M. Cameron } 2822edd16368SStephen M. Cameron 2823d1e8beacSStephen M. Cameron static void hpsa_print_cmd(struct ctlr_info *h, char *txt, 2824d1e8beacSStephen M. Cameron struct CommandList *c) 2825edd16368SStephen M. Cameron { 2826d1e8beacSStephen M. Cameron const u8 *cdb = c->Request.CDB; 2827d1e8beacSStephen M. Cameron const u8 *lun = c->Header.LUN.LunAddrBytes; 2828edd16368SStephen M. Cameron 2829d1e8beacSStephen M. Cameron dev_warn(&h->pdev->dev, "%s: LUN:%02x%02x%02x%02x%02x%02x%02x%02x" 2830d1e8beacSStephen M. Cameron " CDB:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x\n", 2831d1e8beacSStephen M. Cameron txt, lun[0], lun[1], lun[2], lun[3], 2832d1e8beacSStephen M. Cameron lun[4], lun[5], lun[6], lun[7], 2833d1e8beacSStephen M. Cameron cdb[0], cdb[1], cdb[2], cdb[3], 2834d1e8beacSStephen M. Cameron cdb[4], cdb[5], cdb[6], cdb[7], 2835d1e8beacSStephen M. Cameron cdb[8], cdb[9], cdb[10], cdb[11], 2836d1e8beacSStephen M. Cameron cdb[12], cdb[13], cdb[14], cdb[15]); 2837d1e8beacSStephen M. Cameron } 2838d1e8beacSStephen M. Cameron 2839d1e8beacSStephen M. Cameron static void hpsa_scsi_interpret_error(struct ctlr_info *h, 2840d1e8beacSStephen M. Cameron struct CommandList *cp) 2841d1e8beacSStephen M. Cameron { 2842d1e8beacSStephen M. Cameron const struct ErrorInfo *ei = cp->err_info; 2843d1e8beacSStephen M. Cameron struct device *d = &cp->h->pdev->dev; 28449437ac43SStephen Cameron u8 sense_key, asc, ascq; 28459437ac43SStephen Cameron int sense_len; 2846d1e8beacSStephen M. Cameron 2847edd16368SStephen M. Cameron switch (ei->CommandStatus) { 2848edd16368SStephen M. Cameron case CMD_TARGET_STATUS: 28499437ac43SStephen Cameron if (ei->SenseLen > sizeof(ei->SenseInfo)) 28509437ac43SStephen Cameron sense_len = sizeof(ei->SenseInfo); 28519437ac43SStephen Cameron else 28529437ac43SStephen Cameron sense_len = ei->SenseLen; 28539437ac43SStephen Cameron decode_sense_data(ei->SenseInfo, sense_len, 28549437ac43SStephen Cameron &sense_key, &asc, &ascq); 2855d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "SCSI status", cp); 2856d1e8beacSStephen M. Cameron if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) 28579437ac43SStephen Cameron dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n", 28589437ac43SStephen Cameron sense_key, asc, ascq); 2859d1e8beacSStephen M. Cameron else 28609437ac43SStephen Cameron dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus); 2861edd16368SStephen M. Cameron if (ei->ScsiStatus == 0) 2862edd16368SStephen M. Cameron dev_warn(d, "SCSI status is abnormally zero. " 2863edd16368SStephen M. Cameron "(probably indicates selection timeout " 2864edd16368SStephen M. Cameron "reported incorrectly due to a known " 2865edd16368SStephen M. Cameron "firmware bug, circa July, 2001.)\n"); 2866edd16368SStephen M. Cameron break; 2867edd16368SStephen M. Cameron case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 2868edd16368SStephen M. Cameron break; 2869edd16368SStephen M. Cameron case CMD_DATA_OVERRUN: 2870d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "overrun condition", cp); 2871edd16368SStephen M. Cameron break; 2872edd16368SStephen M. Cameron case CMD_INVALID: { 2873edd16368SStephen M. Cameron /* controller unfortunately reports SCSI passthru's 2874edd16368SStephen M. Cameron * to non-existent targets as invalid commands. 2875edd16368SStephen M. Cameron */ 2876d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "invalid command", cp); 2877d1e8beacSStephen M. Cameron dev_warn(d, "probably means device no longer present\n"); 2878edd16368SStephen M. Cameron } 2879edd16368SStephen M. Cameron break; 2880edd16368SStephen M. Cameron case CMD_PROTOCOL_ERR: 2881d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "protocol error", cp); 2882edd16368SStephen M. Cameron break; 2883edd16368SStephen M. Cameron case CMD_HARDWARE_ERR: 2884d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "hardware error", cp); 2885edd16368SStephen M. Cameron break; 2886edd16368SStephen M. Cameron case CMD_CONNECTION_LOST: 2887d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "connection lost", cp); 2888edd16368SStephen M. Cameron break; 2889edd16368SStephen M. Cameron case CMD_ABORTED: 2890d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "aborted", cp); 2891edd16368SStephen M. Cameron break; 2892edd16368SStephen M. Cameron case CMD_ABORT_FAILED: 2893d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "abort failed", cp); 2894edd16368SStephen M. Cameron break; 2895edd16368SStephen M. Cameron case CMD_UNSOLICITED_ABORT: 2896d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "unsolicited abort", cp); 2897edd16368SStephen M. Cameron break; 2898edd16368SStephen M. Cameron case CMD_TIMEOUT: 2899d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "timed out", cp); 2900edd16368SStephen M. Cameron break; 29011d5e2ed0SStephen M. Cameron case CMD_UNABORTABLE: 2902d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "unabortable", cp); 29031d5e2ed0SStephen M. Cameron break; 290425163bd5SWebb Scales case CMD_CTLR_LOCKUP: 290525163bd5SWebb Scales hpsa_print_cmd(h, "controller lockup detected", cp); 290625163bd5SWebb Scales break; 2907edd16368SStephen M. Cameron default: 2908d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "unknown status", cp); 2909d1e8beacSStephen M. Cameron dev_warn(d, "Unknown command status %x\n", 2910edd16368SStephen M. Cameron ei->CommandStatus); 2911edd16368SStephen M. Cameron } 2912edd16368SStephen M. Cameron } 2913edd16368SStephen M. Cameron 2914edd16368SStephen M. Cameron static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr, 2915b7bb24ebSStephen M. Cameron u16 page, unsigned char *buf, 2916edd16368SStephen M. Cameron unsigned char bufsize) 2917edd16368SStephen M. Cameron { 2918edd16368SStephen M. Cameron int rc = IO_OK; 2919edd16368SStephen M. Cameron struct CommandList *c; 2920edd16368SStephen M. Cameron struct ErrorInfo *ei; 2921edd16368SStephen M. Cameron 292245fcb86eSStephen Cameron c = cmd_alloc(h); 2923edd16368SStephen M. Cameron 2924a2dac136SStephen M. Cameron if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, 2925a2dac136SStephen M. Cameron page, scsi3addr, TYPE_CMD)) { 2926a2dac136SStephen M. Cameron rc = -1; 2927a2dac136SStephen M. Cameron goto out; 2928a2dac136SStephen M. Cameron } 292925163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 2930c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 293125163bd5SWebb Scales if (rc) 293225163bd5SWebb Scales goto out; 2933edd16368SStephen M. Cameron ei = c->err_info; 2934edd16368SStephen M. Cameron if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 2935d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 2936edd16368SStephen M. Cameron rc = -1; 2937edd16368SStephen M. Cameron } 2938a2dac136SStephen M. Cameron out: 293945fcb86eSStephen Cameron cmd_free(h, c); 2940edd16368SStephen M. Cameron return rc; 2941edd16368SStephen M. Cameron } 2942edd16368SStephen M. Cameron 2943bf711ac6SScott Teel static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr, 294425163bd5SWebb Scales u8 reset_type, int reply_queue) 2945edd16368SStephen M. Cameron { 2946edd16368SStephen M. Cameron int rc = IO_OK; 2947edd16368SStephen M. Cameron struct CommandList *c; 2948edd16368SStephen M. Cameron struct ErrorInfo *ei; 2949edd16368SStephen M. Cameron 295045fcb86eSStephen Cameron c = cmd_alloc(h); 2951edd16368SStephen M. Cameron 2952edd16368SStephen M. Cameron 2953a2dac136SStephen M. Cameron /* fill_cmd can't fail here, no data buffer to map. */ 29540b9b7b6eSScott Teel (void) fill_cmd(c, reset_type, h, NULL, 0, 0, 2955bf711ac6SScott Teel scsi3addr, TYPE_MSG); 2956c448ecfaSDon Brace rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 295725163bd5SWebb Scales if (rc) { 295825163bd5SWebb Scales dev_warn(&h->pdev->dev, "Failed to send reset command\n"); 295925163bd5SWebb Scales goto out; 296025163bd5SWebb Scales } 2961edd16368SStephen M. Cameron /* no unmap needed here because no data xfer. */ 2962edd16368SStephen M. Cameron 2963edd16368SStephen M. Cameron ei = c->err_info; 2964edd16368SStephen M. Cameron if (ei->CommandStatus != 0) { 2965d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 2966edd16368SStephen M. Cameron rc = -1; 2967edd16368SStephen M. Cameron } 296825163bd5SWebb Scales out: 296945fcb86eSStephen Cameron cmd_free(h, c); 2970edd16368SStephen M. Cameron return rc; 2971edd16368SStephen M. Cameron } 2972edd16368SStephen M. Cameron 2973d604f533SWebb Scales static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c, 2974d604f533SWebb Scales struct hpsa_scsi_dev_t *dev, 2975d604f533SWebb Scales unsigned char *scsi3addr) 2976d604f533SWebb Scales { 2977d604f533SWebb Scales int i; 2978d604f533SWebb Scales bool match = false; 2979d604f533SWebb Scales struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 2980d604f533SWebb Scales struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2; 2981d604f533SWebb Scales 2982d604f533SWebb Scales if (hpsa_is_cmd_idle(c)) 2983d604f533SWebb Scales return false; 2984d604f533SWebb Scales 2985d604f533SWebb Scales switch (c->cmd_type) { 2986d604f533SWebb Scales case CMD_SCSI: 2987d604f533SWebb Scales case CMD_IOCTL_PEND: 2988d604f533SWebb Scales match = !memcmp(scsi3addr, &c->Header.LUN.LunAddrBytes, 2989d604f533SWebb Scales sizeof(c->Header.LUN.LunAddrBytes)); 2990d604f533SWebb Scales break; 2991d604f533SWebb Scales 2992d604f533SWebb Scales case CMD_IOACCEL1: 2993d604f533SWebb Scales case CMD_IOACCEL2: 2994d604f533SWebb Scales if (c->phys_disk == dev) { 2995d604f533SWebb Scales /* HBA mode match */ 2996d604f533SWebb Scales match = true; 2997d604f533SWebb Scales } else { 2998d604f533SWebb Scales /* Possible RAID mode -- check each phys dev. */ 2999d604f533SWebb Scales /* FIXME: Do we need to take out a lock here? If 3000d604f533SWebb Scales * so, we could just call hpsa_get_pdisk_of_ioaccel2() 3001d604f533SWebb Scales * instead. */ 3002d604f533SWebb Scales for (i = 0; i < dev->nphysical_disks && !match; i++) { 3003d604f533SWebb Scales /* FIXME: an alternate test might be 3004d604f533SWebb Scales * 3005d604f533SWebb Scales * match = dev->phys_disk[i]->ioaccel_handle 3006d604f533SWebb Scales * == c2->scsi_nexus; */ 3007d604f533SWebb Scales match = dev->phys_disk[i] == c->phys_disk; 3008d604f533SWebb Scales } 3009d604f533SWebb Scales } 3010d604f533SWebb Scales break; 3011d604f533SWebb Scales 3012d604f533SWebb Scales case IOACCEL2_TMF: 3013d604f533SWebb Scales for (i = 0; i < dev->nphysical_disks && !match; i++) { 3014d604f533SWebb Scales match = dev->phys_disk[i]->ioaccel_handle == 3015d604f533SWebb Scales le32_to_cpu(ac->it_nexus); 3016d604f533SWebb Scales } 3017d604f533SWebb Scales break; 3018d604f533SWebb Scales 3019d604f533SWebb Scales case 0: /* The command is in the middle of being initialized. */ 3020d604f533SWebb Scales match = false; 3021d604f533SWebb Scales break; 3022d604f533SWebb Scales 3023d604f533SWebb Scales default: 3024d604f533SWebb Scales dev_err(&h->pdev->dev, "unexpected cmd_type: %d\n", 3025d604f533SWebb Scales c->cmd_type); 3026d604f533SWebb Scales BUG(); 3027d604f533SWebb Scales } 3028d604f533SWebb Scales 3029d604f533SWebb Scales return match; 3030d604f533SWebb Scales } 3031d604f533SWebb Scales 3032d604f533SWebb Scales static int hpsa_do_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev, 3033d604f533SWebb Scales unsigned char *scsi3addr, u8 reset_type, int reply_queue) 3034d604f533SWebb Scales { 3035d604f533SWebb Scales int i; 3036d604f533SWebb Scales int rc = 0; 3037d604f533SWebb Scales 3038d604f533SWebb Scales /* We can really only handle one reset at a time */ 3039d604f533SWebb Scales if (mutex_lock_interruptible(&h->reset_mutex) == -EINTR) { 3040d604f533SWebb Scales dev_warn(&h->pdev->dev, "concurrent reset wait interrupted.\n"); 3041d604f533SWebb Scales return -EINTR; 3042d604f533SWebb Scales } 3043d604f533SWebb Scales 3044d604f533SWebb Scales BUG_ON(atomic_read(&dev->reset_cmds_out) != 0); 3045d604f533SWebb Scales 3046d604f533SWebb Scales for (i = 0; i < h->nr_cmds; i++) { 3047d604f533SWebb Scales struct CommandList *c = h->cmd_pool + i; 3048d604f533SWebb Scales int refcount = atomic_inc_return(&c->refcount); 3049d604f533SWebb Scales 3050d604f533SWebb Scales if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, scsi3addr)) { 3051d604f533SWebb Scales unsigned long flags; 3052d604f533SWebb Scales 3053d604f533SWebb Scales /* 3054d604f533SWebb Scales * Mark the target command as having a reset pending, 3055d604f533SWebb Scales * then lock a lock so that the command cannot complete 3056d604f533SWebb Scales * while we're considering it. If the command is not 3057d604f533SWebb Scales * idle then count it; otherwise revoke the event. 3058d604f533SWebb Scales */ 3059d604f533SWebb Scales c->reset_pending = dev; 3060d604f533SWebb Scales spin_lock_irqsave(&h->lock, flags); /* Implied MB */ 3061d604f533SWebb Scales if (!hpsa_is_cmd_idle(c)) 3062d604f533SWebb Scales atomic_inc(&dev->reset_cmds_out); 3063d604f533SWebb Scales else 3064d604f533SWebb Scales c->reset_pending = NULL; 3065d604f533SWebb Scales spin_unlock_irqrestore(&h->lock, flags); 3066d604f533SWebb Scales } 3067d604f533SWebb Scales 3068d604f533SWebb Scales cmd_free(h, c); 3069d604f533SWebb Scales } 3070d604f533SWebb Scales 3071d604f533SWebb Scales rc = hpsa_send_reset(h, scsi3addr, reset_type, reply_queue); 3072d604f533SWebb Scales if (!rc) 3073d604f533SWebb Scales wait_event(h->event_sync_wait_queue, 3074d604f533SWebb Scales atomic_read(&dev->reset_cmds_out) == 0 || 3075d604f533SWebb Scales lockup_detected(h)); 3076d604f533SWebb Scales 3077d604f533SWebb Scales if (unlikely(lockup_detected(h))) { 3078d604f533SWebb Scales dev_warn(&h->pdev->dev, 3079d604f533SWebb Scales "Controller lockup detected during reset wait\n"); 3080d604f533SWebb Scales rc = -ENODEV; 3081d604f533SWebb Scales } 3082d604f533SWebb Scales 3083d604f533SWebb Scales if (unlikely(rc)) 3084d604f533SWebb Scales atomic_set(&dev->reset_cmds_out, 0); 3085*bfd7546cSDon Brace else 3086*bfd7546cSDon Brace wait_for_device_to_become_ready(h, scsi3addr, 0); 3087d604f533SWebb Scales 3088d604f533SWebb Scales mutex_unlock(&h->reset_mutex); 3089d604f533SWebb Scales return rc; 3090d604f533SWebb Scales } 3091d604f533SWebb Scales 3092edd16368SStephen M. Cameron static void hpsa_get_raid_level(struct ctlr_info *h, 3093edd16368SStephen M. Cameron unsigned char *scsi3addr, unsigned char *raid_level) 3094edd16368SStephen M. Cameron { 3095edd16368SStephen M. Cameron int rc; 3096edd16368SStephen M. Cameron unsigned char *buf; 3097edd16368SStephen M. Cameron 3098edd16368SStephen M. Cameron *raid_level = RAID_UNKNOWN; 3099edd16368SStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 3100edd16368SStephen M. Cameron if (!buf) 3101edd16368SStephen M. Cameron return; 31028383278dSScott Teel 31038383278dSScott Teel if (!hpsa_vpd_page_supported(h, scsi3addr, 31048383278dSScott Teel HPSA_VPD_LV_DEVICE_GEOMETRY)) 31058383278dSScott Teel goto exit; 31068383278dSScott Teel 31078383278dSScott Teel rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 31088383278dSScott Teel HPSA_VPD_LV_DEVICE_GEOMETRY, buf, 64); 31098383278dSScott Teel 3110edd16368SStephen M. Cameron if (rc == 0) 3111edd16368SStephen M. Cameron *raid_level = buf[8]; 3112edd16368SStephen M. Cameron if (*raid_level > RAID_UNKNOWN) 3113edd16368SStephen M. Cameron *raid_level = RAID_UNKNOWN; 31148383278dSScott Teel exit: 3115edd16368SStephen M. Cameron kfree(buf); 3116edd16368SStephen M. Cameron return; 3117edd16368SStephen M. Cameron } 3118edd16368SStephen M. Cameron 3119283b4a9bSStephen M. Cameron #define HPSA_MAP_DEBUG 3120283b4a9bSStephen M. Cameron #ifdef HPSA_MAP_DEBUG 3121283b4a9bSStephen M. Cameron static void hpsa_debug_map_buff(struct ctlr_info *h, int rc, 3122283b4a9bSStephen M. Cameron struct raid_map_data *map_buff) 3123283b4a9bSStephen M. Cameron { 3124283b4a9bSStephen M. Cameron struct raid_map_disk_data *dd = &map_buff->data[0]; 3125283b4a9bSStephen M. Cameron int map, row, col; 3126283b4a9bSStephen M. Cameron u16 map_cnt, row_cnt, disks_per_row; 3127283b4a9bSStephen M. Cameron 3128283b4a9bSStephen M. Cameron if (rc != 0) 3129283b4a9bSStephen M. Cameron return; 3130283b4a9bSStephen M. Cameron 31312ba8bfc8SStephen M. Cameron /* Show details only if debugging has been activated. */ 31322ba8bfc8SStephen M. Cameron if (h->raid_offload_debug < 2) 31332ba8bfc8SStephen M. Cameron return; 31342ba8bfc8SStephen M. Cameron 3135283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "structure_size = %u\n", 3136283b4a9bSStephen M. Cameron le32_to_cpu(map_buff->structure_size)); 3137283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "volume_blk_size = %u\n", 3138283b4a9bSStephen M. Cameron le32_to_cpu(map_buff->volume_blk_size)); 3139283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n", 3140283b4a9bSStephen M. Cameron le64_to_cpu(map_buff->volume_blk_cnt)); 3141283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "physicalBlockShift = %u\n", 3142283b4a9bSStephen M. Cameron map_buff->phys_blk_shift); 3143283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n", 3144283b4a9bSStephen M. Cameron map_buff->parity_rotation_shift); 3145283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "strip_size = %u\n", 3146283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->strip_size)); 3147283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n", 3148283b4a9bSStephen M. Cameron le64_to_cpu(map_buff->disk_starting_blk)); 3149283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n", 3150283b4a9bSStephen M. Cameron le64_to_cpu(map_buff->disk_blk_cnt)); 3151283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "data_disks_per_row = %u\n", 3152283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->data_disks_per_row)); 3153283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n", 3154283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->metadata_disks_per_row)); 3155283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "row_cnt = %u\n", 3156283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->row_cnt)); 3157283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "layout_map_count = %u\n", 3158283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->layout_map_count)); 31592b08b3e9SDon Brace dev_info(&h->pdev->dev, "flags = 0x%x\n", 3160dd0e19f3SScott Teel le16_to_cpu(map_buff->flags)); 31612b08b3e9SDon Brace dev_info(&h->pdev->dev, "encrypytion = %s\n", 31622b08b3e9SDon Brace le16_to_cpu(map_buff->flags) & 31632b08b3e9SDon Brace RAID_MAP_FLAG_ENCRYPT_ON ? "ON" : "OFF"); 3164dd0e19f3SScott Teel dev_info(&h->pdev->dev, "dekindex = %u\n", 3165dd0e19f3SScott Teel le16_to_cpu(map_buff->dekindex)); 3166283b4a9bSStephen M. Cameron map_cnt = le16_to_cpu(map_buff->layout_map_count); 3167283b4a9bSStephen M. Cameron for (map = 0; map < map_cnt; map++) { 3168283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "Map%u:\n", map); 3169283b4a9bSStephen M. Cameron row_cnt = le16_to_cpu(map_buff->row_cnt); 3170283b4a9bSStephen M. Cameron for (row = 0; row < row_cnt; row++) { 3171283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, " Row%u:\n", row); 3172283b4a9bSStephen M. Cameron disks_per_row = 3173283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->data_disks_per_row); 3174283b4a9bSStephen M. Cameron for (col = 0; col < disks_per_row; col++, dd++) 3175283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, 3176283b4a9bSStephen M. Cameron " D%02u: h=0x%04x xor=%u,%u\n", 3177283b4a9bSStephen M. Cameron col, dd->ioaccel_handle, 3178283b4a9bSStephen M. Cameron dd->xor_mult[0], dd->xor_mult[1]); 3179283b4a9bSStephen M. Cameron disks_per_row = 3180283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->metadata_disks_per_row); 3181283b4a9bSStephen M. Cameron for (col = 0; col < disks_per_row; col++, dd++) 3182283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, 3183283b4a9bSStephen M. Cameron " M%02u: h=0x%04x xor=%u,%u\n", 3184283b4a9bSStephen M. Cameron col, dd->ioaccel_handle, 3185283b4a9bSStephen M. Cameron dd->xor_mult[0], dd->xor_mult[1]); 3186283b4a9bSStephen M. Cameron } 3187283b4a9bSStephen M. Cameron } 3188283b4a9bSStephen M. Cameron } 3189283b4a9bSStephen M. Cameron #else 3190283b4a9bSStephen M. Cameron static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h, 3191283b4a9bSStephen M. Cameron __attribute__((unused)) int rc, 3192283b4a9bSStephen M. Cameron __attribute__((unused)) struct raid_map_data *map_buff) 3193283b4a9bSStephen M. Cameron { 3194283b4a9bSStephen M. Cameron } 3195283b4a9bSStephen M. Cameron #endif 3196283b4a9bSStephen M. Cameron 3197283b4a9bSStephen M. Cameron static int hpsa_get_raid_map(struct ctlr_info *h, 3198283b4a9bSStephen M. Cameron unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device) 3199283b4a9bSStephen M. Cameron { 3200283b4a9bSStephen M. Cameron int rc = 0; 3201283b4a9bSStephen M. Cameron struct CommandList *c; 3202283b4a9bSStephen M. Cameron struct ErrorInfo *ei; 3203283b4a9bSStephen M. Cameron 320445fcb86eSStephen Cameron c = cmd_alloc(h); 3205bf43caf3SRobert Elliott 3206283b4a9bSStephen M. Cameron if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map, 3207283b4a9bSStephen M. Cameron sizeof(this_device->raid_map), 0, 3208283b4a9bSStephen M. Cameron scsi3addr, TYPE_CMD)) { 32092dd02d74SRobert Elliott dev_warn(&h->pdev->dev, "hpsa_get_raid_map fill_cmd failed\n"); 32102dd02d74SRobert Elliott cmd_free(h, c); 32112dd02d74SRobert Elliott return -1; 3212283b4a9bSStephen M. Cameron } 321325163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3214c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 321525163bd5SWebb Scales if (rc) 321625163bd5SWebb Scales goto out; 3217283b4a9bSStephen M. Cameron ei = c->err_info; 3218283b4a9bSStephen M. Cameron if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3219d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 322025163bd5SWebb Scales rc = -1; 322125163bd5SWebb Scales goto out; 3222283b4a9bSStephen M. Cameron } 322345fcb86eSStephen Cameron cmd_free(h, c); 3224283b4a9bSStephen M. Cameron 3225283b4a9bSStephen M. Cameron /* @todo in the future, dynamically allocate RAID map memory */ 3226283b4a9bSStephen M. Cameron if (le32_to_cpu(this_device->raid_map.structure_size) > 3227283b4a9bSStephen M. Cameron sizeof(this_device->raid_map)) { 3228283b4a9bSStephen M. Cameron dev_warn(&h->pdev->dev, "RAID map size is too large!\n"); 3229283b4a9bSStephen M. Cameron rc = -1; 3230283b4a9bSStephen M. Cameron } 3231283b4a9bSStephen M. Cameron hpsa_debug_map_buff(h, rc, &this_device->raid_map); 3232283b4a9bSStephen M. Cameron return rc; 323325163bd5SWebb Scales out: 323425163bd5SWebb Scales cmd_free(h, c); 323525163bd5SWebb Scales return rc; 3236283b4a9bSStephen M. Cameron } 3237283b4a9bSStephen M. Cameron 3238d04e62b9SKevin Barnett static int hpsa_bmic_sense_subsystem_information(struct ctlr_info *h, 3239d04e62b9SKevin Barnett unsigned char scsi3addr[], u16 bmic_device_index, 3240d04e62b9SKevin Barnett struct bmic_sense_subsystem_info *buf, size_t bufsize) 3241d04e62b9SKevin Barnett { 3242d04e62b9SKevin Barnett int rc = IO_OK; 3243d04e62b9SKevin Barnett struct CommandList *c; 3244d04e62b9SKevin Barnett struct ErrorInfo *ei; 3245d04e62b9SKevin Barnett 3246d04e62b9SKevin Barnett c = cmd_alloc(h); 3247d04e62b9SKevin Barnett 3248d04e62b9SKevin Barnett rc = fill_cmd(c, BMIC_SENSE_SUBSYSTEM_INFORMATION, h, buf, bufsize, 3249d04e62b9SKevin Barnett 0, RAID_CTLR_LUNID, TYPE_CMD); 3250d04e62b9SKevin Barnett if (rc) 3251d04e62b9SKevin Barnett goto out; 3252d04e62b9SKevin Barnett 3253d04e62b9SKevin Barnett c->Request.CDB[2] = bmic_device_index & 0xff; 3254d04e62b9SKevin Barnett c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff; 3255d04e62b9SKevin Barnett 3256d04e62b9SKevin Barnett rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3257c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 3258d04e62b9SKevin Barnett if (rc) 3259d04e62b9SKevin Barnett goto out; 3260d04e62b9SKevin Barnett ei = c->err_info; 3261d04e62b9SKevin Barnett if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3262d04e62b9SKevin Barnett hpsa_scsi_interpret_error(h, c); 3263d04e62b9SKevin Barnett rc = -1; 3264d04e62b9SKevin Barnett } 3265d04e62b9SKevin Barnett out: 3266d04e62b9SKevin Barnett cmd_free(h, c); 3267d04e62b9SKevin Barnett return rc; 3268d04e62b9SKevin Barnett } 3269d04e62b9SKevin Barnett 327066749d0dSScott Teel static int hpsa_bmic_id_controller(struct ctlr_info *h, 327166749d0dSScott Teel struct bmic_identify_controller *buf, size_t bufsize) 327266749d0dSScott Teel { 327366749d0dSScott Teel int rc = IO_OK; 327466749d0dSScott Teel struct CommandList *c; 327566749d0dSScott Teel struct ErrorInfo *ei; 327666749d0dSScott Teel 327766749d0dSScott Teel c = cmd_alloc(h); 327866749d0dSScott Teel 327966749d0dSScott Teel rc = fill_cmd(c, BMIC_IDENTIFY_CONTROLLER, h, buf, bufsize, 328066749d0dSScott Teel 0, RAID_CTLR_LUNID, TYPE_CMD); 328166749d0dSScott Teel if (rc) 328266749d0dSScott Teel goto out; 328366749d0dSScott Teel 328466749d0dSScott Teel rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3285c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 328666749d0dSScott Teel if (rc) 328766749d0dSScott Teel goto out; 328866749d0dSScott Teel ei = c->err_info; 328966749d0dSScott Teel if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 329066749d0dSScott Teel hpsa_scsi_interpret_error(h, c); 329166749d0dSScott Teel rc = -1; 329266749d0dSScott Teel } 329366749d0dSScott Teel out: 329466749d0dSScott Teel cmd_free(h, c); 329566749d0dSScott Teel return rc; 329666749d0dSScott Teel } 329766749d0dSScott Teel 329803383736SDon Brace static int hpsa_bmic_id_physical_device(struct ctlr_info *h, 329903383736SDon Brace unsigned char scsi3addr[], u16 bmic_device_index, 330003383736SDon Brace struct bmic_identify_physical_device *buf, size_t bufsize) 330103383736SDon Brace { 330203383736SDon Brace int rc = IO_OK; 330303383736SDon Brace struct CommandList *c; 330403383736SDon Brace struct ErrorInfo *ei; 330503383736SDon Brace 330603383736SDon Brace c = cmd_alloc(h); 330703383736SDon Brace rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize, 330803383736SDon Brace 0, RAID_CTLR_LUNID, TYPE_CMD); 330903383736SDon Brace if (rc) 331003383736SDon Brace goto out; 331103383736SDon Brace 331203383736SDon Brace c->Request.CDB[2] = bmic_device_index & 0xff; 331303383736SDon Brace c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff; 331403383736SDon Brace 331525163bd5SWebb Scales hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE, 3316c448ecfaSDon Brace DEFAULT_TIMEOUT); 331703383736SDon Brace ei = c->err_info; 331803383736SDon Brace if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 331903383736SDon Brace hpsa_scsi_interpret_error(h, c); 332003383736SDon Brace rc = -1; 332103383736SDon Brace } 332203383736SDon Brace out: 332303383736SDon Brace cmd_free(h, c); 3324d04e62b9SKevin Barnett 332503383736SDon Brace return rc; 332603383736SDon Brace } 332703383736SDon Brace 3328cca8f13bSDon Brace /* 3329cca8f13bSDon Brace * get enclosure information 3330cca8f13bSDon Brace * struct ReportExtendedLUNdata *rlep - Used for BMIC drive number 3331cca8f13bSDon Brace * struct hpsa_scsi_dev_t *encl_dev - device entry for enclosure 3332cca8f13bSDon Brace * Uses id_physical_device to determine the box_index. 3333cca8f13bSDon Brace */ 3334cca8f13bSDon Brace static void hpsa_get_enclosure_info(struct ctlr_info *h, 3335cca8f13bSDon Brace unsigned char *scsi3addr, 3336cca8f13bSDon Brace struct ReportExtendedLUNdata *rlep, int rle_index, 3337cca8f13bSDon Brace struct hpsa_scsi_dev_t *encl_dev) 3338cca8f13bSDon Brace { 3339cca8f13bSDon Brace int rc = -1; 3340cca8f13bSDon Brace struct CommandList *c = NULL; 3341cca8f13bSDon Brace struct ErrorInfo *ei = NULL; 3342cca8f13bSDon Brace struct bmic_sense_storage_box_params *bssbp = NULL; 3343cca8f13bSDon Brace struct bmic_identify_physical_device *id_phys = NULL; 3344cca8f13bSDon Brace struct ext_report_lun_entry *rle = &rlep->LUN[rle_index]; 3345cca8f13bSDon Brace u16 bmic_device_index = 0; 3346cca8f13bSDon Brace 3347cca8f13bSDon Brace bmic_device_index = GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]); 3348cca8f13bSDon Brace 334917a9e54aSDon Brace if (bmic_device_index == 0xFF00 || MASKED_DEVICE(&rle->lunid[0])) { 335017a9e54aSDon Brace rc = IO_OK; 3351cca8f13bSDon Brace goto out; 335217a9e54aSDon Brace } 3353cca8f13bSDon Brace 3354cca8f13bSDon Brace bssbp = kzalloc(sizeof(*bssbp), GFP_KERNEL); 3355cca8f13bSDon Brace if (!bssbp) 3356cca8f13bSDon Brace goto out; 3357cca8f13bSDon Brace 3358cca8f13bSDon Brace id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 3359cca8f13bSDon Brace if (!id_phys) 3360cca8f13bSDon Brace goto out; 3361cca8f13bSDon Brace 3362cca8f13bSDon Brace rc = hpsa_bmic_id_physical_device(h, scsi3addr, bmic_device_index, 3363cca8f13bSDon Brace id_phys, sizeof(*id_phys)); 3364cca8f13bSDon Brace if (rc) { 3365cca8f13bSDon Brace dev_warn(&h->pdev->dev, "%s: id_phys failed %d bdi[0x%x]\n", 3366cca8f13bSDon Brace __func__, encl_dev->external, bmic_device_index); 3367cca8f13bSDon Brace goto out; 3368cca8f13bSDon Brace } 3369cca8f13bSDon Brace 3370cca8f13bSDon Brace c = cmd_alloc(h); 3371cca8f13bSDon Brace 3372cca8f13bSDon Brace rc = fill_cmd(c, BMIC_SENSE_STORAGE_BOX_PARAMS, h, bssbp, 3373cca8f13bSDon Brace sizeof(*bssbp), 0, RAID_CTLR_LUNID, TYPE_CMD); 3374cca8f13bSDon Brace 3375cca8f13bSDon Brace if (rc) 3376cca8f13bSDon Brace goto out; 3377cca8f13bSDon Brace 3378cca8f13bSDon Brace if (id_phys->phys_connector[1] == 'E') 3379cca8f13bSDon Brace c->Request.CDB[5] = id_phys->box_index; 3380cca8f13bSDon Brace else 3381cca8f13bSDon Brace c->Request.CDB[5] = 0; 3382cca8f13bSDon Brace 3383cca8f13bSDon Brace rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE, 3384c448ecfaSDon Brace DEFAULT_TIMEOUT); 3385cca8f13bSDon Brace if (rc) 3386cca8f13bSDon Brace goto out; 3387cca8f13bSDon Brace 3388cca8f13bSDon Brace ei = c->err_info; 3389cca8f13bSDon Brace if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3390cca8f13bSDon Brace rc = -1; 3391cca8f13bSDon Brace goto out; 3392cca8f13bSDon Brace } 3393cca8f13bSDon Brace 3394cca8f13bSDon Brace encl_dev->box[id_phys->active_path_number] = bssbp->phys_box_on_port; 3395cca8f13bSDon Brace memcpy(&encl_dev->phys_connector[id_phys->active_path_number], 3396cca8f13bSDon Brace bssbp->phys_connector, sizeof(bssbp->phys_connector)); 3397cca8f13bSDon Brace 3398cca8f13bSDon Brace rc = IO_OK; 3399cca8f13bSDon Brace out: 3400cca8f13bSDon Brace kfree(bssbp); 3401cca8f13bSDon Brace kfree(id_phys); 3402cca8f13bSDon Brace 3403cca8f13bSDon Brace if (c) 3404cca8f13bSDon Brace cmd_free(h, c); 3405cca8f13bSDon Brace 3406cca8f13bSDon Brace if (rc != IO_OK) 3407cca8f13bSDon Brace hpsa_show_dev_msg(KERN_INFO, h, encl_dev, 3408cca8f13bSDon Brace "Error, could not get enclosure information\n"); 3409cca8f13bSDon Brace } 3410cca8f13bSDon Brace 3411d04e62b9SKevin Barnett static u64 hpsa_get_sas_address_from_report_physical(struct ctlr_info *h, 3412d04e62b9SKevin Barnett unsigned char *scsi3addr) 3413d04e62b9SKevin Barnett { 3414d04e62b9SKevin Barnett struct ReportExtendedLUNdata *physdev; 3415d04e62b9SKevin Barnett u32 nphysicals; 3416d04e62b9SKevin Barnett u64 sa = 0; 3417d04e62b9SKevin Barnett int i; 3418d04e62b9SKevin Barnett 3419d04e62b9SKevin Barnett physdev = kzalloc(sizeof(*physdev), GFP_KERNEL); 3420d04e62b9SKevin Barnett if (!physdev) 3421d04e62b9SKevin Barnett return 0; 3422d04e62b9SKevin Barnett 3423d04e62b9SKevin Barnett if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) { 3424d04e62b9SKevin Barnett dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 3425d04e62b9SKevin Barnett kfree(physdev); 3426d04e62b9SKevin Barnett return 0; 3427d04e62b9SKevin Barnett } 3428d04e62b9SKevin Barnett nphysicals = get_unaligned_be32(physdev->LUNListLength) / 24; 3429d04e62b9SKevin Barnett 3430d04e62b9SKevin Barnett for (i = 0; i < nphysicals; i++) 3431d04e62b9SKevin Barnett if (!memcmp(&physdev->LUN[i].lunid[0], scsi3addr, 8)) { 3432d04e62b9SKevin Barnett sa = get_unaligned_be64(&physdev->LUN[i].wwid[0]); 3433d04e62b9SKevin Barnett break; 3434d04e62b9SKevin Barnett } 3435d04e62b9SKevin Barnett 3436d04e62b9SKevin Barnett kfree(physdev); 3437d04e62b9SKevin Barnett 3438d04e62b9SKevin Barnett return sa; 3439d04e62b9SKevin Barnett } 3440d04e62b9SKevin Barnett 3441d04e62b9SKevin Barnett static void hpsa_get_sas_address(struct ctlr_info *h, unsigned char *scsi3addr, 3442d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *dev) 3443d04e62b9SKevin Barnett { 3444d04e62b9SKevin Barnett int rc; 3445d04e62b9SKevin Barnett u64 sa = 0; 3446d04e62b9SKevin Barnett 3447d04e62b9SKevin Barnett if (is_hba_lunid(scsi3addr)) { 3448d04e62b9SKevin Barnett struct bmic_sense_subsystem_info *ssi; 3449d04e62b9SKevin Barnett 3450d04e62b9SKevin Barnett ssi = kzalloc(sizeof(*ssi), GFP_KERNEL); 3451d04e62b9SKevin Barnett if (ssi == NULL) { 3452d04e62b9SKevin Barnett dev_warn(&h->pdev->dev, 3453d04e62b9SKevin Barnett "%s: out of memory\n", __func__); 3454d04e62b9SKevin Barnett return; 3455d04e62b9SKevin Barnett } 3456d04e62b9SKevin Barnett 3457d04e62b9SKevin Barnett rc = hpsa_bmic_sense_subsystem_information(h, 3458d04e62b9SKevin Barnett scsi3addr, 0, ssi, sizeof(*ssi)); 3459d04e62b9SKevin Barnett if (rc == 0) { 3460d04e62b9SKevin Barnett sa = get_unaligned_be64(ssi->primary_world_wide_id); 3461d04e62b9SKevin Barnett h->sas_address = sa; 3462d04e62b9SKevin Barnett } 3463d04e62b9SKevin Barnett 3464d04e62b9SKevin Barnett kfree(ssi); 3465d04e62b9SKevin Barnett } else 3466d04e62b9SKevin Barnett sa = hpsa_get_sas_address_from_report_physical(h, scsi3addr); 3467d04e62b9SKevin Barnett 3468d04e62b9SKevin Barnett dev->sas_address = sa; 3469d04e62b9SKevin Barnett } 3470d04e62b9SKevin Barnett 3471d04e62b9SKevin Barnett /* Get a device id from inquiry page 0x83 */ 34728383278dSScott Teel static bool hpsa_vpd_page_supported(struct ctlr_info *h, 34731b70150aSStephen M. Cameron unsigned char scsi3addr[], u8 page) 34741b70150aSStephen M. Cameron { 34751b70150aSStephen M. Cameron int rc; 34761b70150aSStephen M. Cameron int i; 34771b70150aSStephen M. Cameron int pages; 34781b70150aSStephen M. Cameron unsigned char *buf, bufsize; 34791b70150aSStephen M. Cameron 34801b70150aSStephen M. Cameron buf = kzalloc(256, GFP_KERNEL); 34811b70150aSStephen M. Cameron if (!buf) 34828383278dSScott Teel return false; 34831b70150aSStephen M. Cameron 34841b70150aSStephen M. Cameron /* Get the size of the page list first */ 34851b70150aSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, 34861b70150aSStephen M. Cameron VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES, 34871b70150aSStephen M. Cameron buf, HPSA_VPD_HEADER_SZ); 34881b70150aSStephen M. Cameron if (rc != 0) 34891b70150aSStephen M. Cameron goto exit_unsupported; 34901b70150aSStephen M. Cameron pages = buf[3]; 34911b70150aSStephen M. Cameron if ((pages + HPSA_VPD_HEADER_SZ) <= 255) 34921b70150aSStephen M. Cameron bufsize = pages + HPSA_VPD_HEADER_SZ; 34931b70150aSStephen M. Cameron else 34941b70150aSStephen M. Cameron bufsize = 255; 34951b70150aSStephen M. Cameron 34961b70150aSStephen M. Cameron /* Get the whole VPD page list */ 34971b70150aSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, 34981b70150aSStephen M. Cameron VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES, 34991b70150aSStephen M. Cameron buf, bufsize); 35001b70150aSStephen M. Cameron if (rc != 0) 35011b70150aSStephen M. Cameron goto exit_unsupported; 35021b70150aSStephen M. Cameron 35031b70150aSStephen M. Cameron pages = buf[3]; 35041b70150aSStephen M. Cameron for (i = 1; i <= pages; i++) 35051b70150aSStephen M. Cameron if (buf[3 + i] == page) 35061b70150aSStephen M. Cameron goto exit_supported; 35071b70150aSStephen M. Cameron exit_unsupported: 35081b70150aSStephen M. Cameron kfree(buf); 35098383278dSScott Teel return false; 35101b70150aSStephen M. Cameron exit_supported: 35111b70150aSStephen M. Cameron kfree(buf); 35128383278dSScott Teel return true; 35131b70150aSStephen M. Cameron } 35141b70150aSStephen M. Cameron 3515283b4a9bSStephen M. Cameron static void hpsa_get_ioaccel_status(struct ctlr_info *h, 3516283b4a9bSStephen M. Cameron unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device) 3517283b4a9bSStephen M. Cameron { 3518283b4a9bSStephen M. Cameron int rc; 3519283b4a9bSStephen M. Cameron unsigned char *buf; 3520283b4a9bSStephen M. Cameron u8 ioaccel_status; 3521283b4a9bSStephen M. Cameron 3522283b4a9bSStephen M. Cameron this_device->offload_config = 0; 3523283b4a9bSStephen M. Cameron this_device->offload_enabled = 0; 352441ce4c35SStephen Cameron this_device->offload_to_be_enabled = 0; 3525283b4a9bSStephen M. Cameron 3526283b4a9bSStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 3527283b4a9bSStephen M. Cameron if (!buf) 3528283b4a9bSStephen M. Cameron return; 35291b70150aSStephen M. Cameron if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS)) 35301b70150aSStephen M. Cameron goto out; 3531283b4a9bSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, 3532b7bb24ebSStephen M. Cameron VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64); 3533283b4a9bSStephen M. Cameron if (rc != 0) 3534283b4a9bSStephen M. Cameron goto out; 3535283b4a9bSStephen M. Cameron 3536283b4a9bSStephen M. Cameron #define IOACCEL_STATUS_BYTE 4 3537283b4a9bSStephen M. Cameron #define OFFLOAD_CONFIGURED_BIT 0x01 3538283b4a9bSStephen M. Cameron #define OFFLOAD_ENABLED_BIT 0x02 3539283b4a9bSStephen M. Cameron ioaccel_status = buf[IOACCEL_STATUS_BYTE]; 3540283b4a9bSStephen M. Cameron this_device->offload_config = 3541283b4a9bSStephen M. Cameron !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT); 3542283b4a9bSStephen M. Cameron if (this_device->offload_config) { 3543283b4a9bSStephen M. Cameron this_device->offload_enabled = 3544283b4a9bSStephen M. Cameron !!(ioaccel_status & OFFLOAD_ENABLED_BIT); 3545283b4a9bSStephen M. Cameron if (hpsa_get_raid_map(h, scsi3addr, this_device)) 3546283b4a9bSStephen M. Cameron this_device->offload_enabled = 0; 3547283b4a9bSStephen M. Cameron } 354841ce4c35SStephen Cameron this_device->offload_to_be_enabled = this_device->offload_enabled; 3549283b4a9bSStephen M. Cameron out: 3550283b4a9bSStephen M. Cameron kfree(buf); 3551283b4a9bSStephen M. Cameron return; 3552283b4a9bSStephen M. Cameron } 3553283b4a9bSStephen M. Cameron 3554edd16368SStephen M. Cameron /* Get the device id from inquiry page 0x83 */ 3555edd16368SStephen M. Cameron static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr, 355675d23d89SDon Brace unsigned char *device_id, int index, int buflen) 3557edd16368SStephen M. Cameron { 3558edd16368SStephen M. Cameron int rc; 3559edd16368SStephen M. Cameron unsigned char *buf; 3560edd16368SStephen M. Cameron 35618383278dSScott Teel /* Does controller have VPD for device id? */ 35628383278dSScott Teel if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_DEVICE_ID)) 35638383278dSScott Teel return 1; /* not supported */ 35648383278dSScott Teel 3565edd16368SStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 3566edd16368SStephen M. Cameron if (!buf) 3567a84d794dSStephen M. Cameron return -ENOMEM; 35688383278dSScott Teel 35698383278dSScott Teel rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 35708383278dSScott Teel HPSA_VPD_LV_DEVICE_ID, buf, 64); 35718383278dSScott Teel if (rc == 0) { 35728383278dSScott Teel if (buflen > 16) 35738383278dSScott Teel buflen = 16; 35748383278dSScott Teel memcpy(device_id, &buf[8], buflen); 35758383278dSScott Teel } 357675d23d89SDon Brace 3577edd16368SStephen M. Cameron kfree(buf); 357875d23d89SDon Brace 35798383278dSScott Teel return rc; /*0 - got id, otherwise, didn't */ 3580edd16368SStephen M. Cameron } 3581edd16368SStephen M. Cameron 3582edd16368SStephen M. Cameron static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical, 358303383736SDon Brace void *buf, int bufsize, 3584edd16368SStephen M. Cameron int extended_response) 3585edd16368SStephen M. Cameron { 3586edd16368SStephen M. Cameron int rc = IO_OK; 3587edd16368SStephen M. Cameron struct CommandList *c; 3588edd16368SStephen M. Cameron unsigned char scsi3addr[8]; 3589edd16368SStephen M. Cameron struct ErrorInfo *ei; 3590edd16368SStephen M. Cameron 359145fcb86eSStephen Cameron c = cmd_alloc(h); 3592bf43caf3SRobert Elliott 3593e89c0ae7SStephen M. Cameron /* address the controller */ 3594e89c0ae7SStephen M. Cameron memset(scsi3addr, 0, sizeof(scsi3addr)); 3595a2dac136SStephen M. Cameron if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h, 3596a2dac136SStephen M. Cameron buf, bufsize, 0, scsi3addr, TYPE_CMD)) { 3597a2dac136SStephen M. Cameron rc = -1; 3598a2dac136SStephen M. Cameron goto out; 3599a2dac136SStephen M. Cameron } 3600edd16368SStephen M. Cameron if (extended_response) 3601edd16368SStephen M. Cameron c->Request.CDB[1] = extended_response; 360225163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3603c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 360425163bd5SWebb Scales if (rc) 360525163bd5SWebb Scales goto out; 3606edd16368SStephen M. Cameron ei = c->err_info; 3607edd16368SStephen M. Cameron if (ei->CommandStatus != 0 && 3608edd16368SStephen M. Cameron ei->CommandStatus != CMD_DATA_UNDERRUN) { 3609d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 3610edd16368SStephen M. Cameron rc = -1; 3611283b4a9bSStephen M. Cameron } else { 361203383736SDon Brace struct ReportLUNdata *rld = buf; 361303383736SDon Brace 361403383736SDon Brace if (rld->extended_response_flag != extended_response) { 3615283b4a9bSStephen M. Cameron dev_err(&h->pdev->dev, 3616283b4a9bSStephen M. Cameron "report luns requested format %u, got %u\n", 3617283b4a9bSStephen M. Cameron extended_response, 361803383736SDon Brace rld->extended_response_flag); 3619283b4a9bSStephen M. Cameron rc = -1; 3620283b4a9bSStephen M. Cameron } 3621edd16368SStephen M. Cameron } 3622a2dac136SStephen M. Cameron out: 362345fcb86eSStephen Cameron cmd_free(h, c); 3624edd16368SStephen M. Cameron return rc; 3625edd16368SStephen M. Cameron } 3626edd16368SStephen M. Cameron 3627edd16368SStephen M. Cameron static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 362803383736SDon Brace struct ReportExtendedLUNdata *buf, int bufsize) 3629edd16368SStephen M. Cameron { 363003383736SDon Brace return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, 363103383736SDon Brace HPSA_REPORT_PHYS_EXTENDED); 3632edd16368SStephen M. Cameron } 3633edd16368SStephen M. Cameron 3634edd16368SStephen M. Cameron static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h, 3635edd16368SStephen M. Cameron struct ReportLUNdata *buf, int bufsize) 3636edd16368SStephen M. Cameron { 3637edd16368SStephen M. Cameron return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0); 3638edd16368SStephen M. Cameron } 3639edd16368SStephen M. Cameron 3640edd16368SStephen M. Cameron static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device, 3641edd16368SStephen M. Cameron int bus, int target, int lun) 3642edd16368SStephen M. Cameron { 3643edd16368SStephen M. Cameron device->bus = bus; 3644edd16368SStephen M. Cameron device->target = target; 3645edd16368SStephen M. Cameron device->lun = lun; 3646edd16368SStephen M. Cameron } 3647edd16368SStephen M. Cameron 36489846590eSStephen M. Cameron /* Use VPD inquiry to get details of volume status */ 36499846590eSStephen M. Cameron static int hpsa_get_volume_status(struct ctlr_info *h, 36509846590eSStephen M. Cameron unsigned char scsi3addr[]) 36519846590eSStephen M. Cameron { 36529846590eSStephen M. Cameron int rc; 36539846590eSStephen M. Cameron int status; 36549846590eSStephen M. Cameron int size; 36559846590eSStephen M. Cameron unsigned char *buf; 36569846590eSStephen M. Cameron 36579846590eSStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 36589846590eSStephen M. Cameron if (!buf) 36599846590eSStephen M. Cameron return HPSA_VPD_LV_STATUS_UNSUPPORTED; 36609846590eSStephen M. Cameron 36619846590eSStephen M. Cameron /* Does controller have VPD for logical volume status? */ 366224a4b078SStephen M. Cameron if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS)) 36639846590eSStephen M. Cameron goto exit_failed; 36649846590eSStephen M. Cameron 36659846590eSStephen M. Cameron /* Get the size of the VPD return buffer */ 36669846590eSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS, 36679846590eSStephen M. Cameron buf, HPSA_VPD_HEADER_SZ); 366824a4b078SStephen M. Cameron if (rc != 0) 36699846590eSStephen M. Cameron goto exit_failed; 36709846590eSStephen M. Cameron size = buf[3]; 36719846590eSStephen M. Cameron 36729846590eSStephen M. Cameron /* Now get the whole VPD buffer */ 36739846590eSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS, 36749846590eSStephen M. Cameron buf, size + HPSA_VPD_HEADER_SZ); 367524a4b078SStephen M. Cameron if (rc != 0) 36769846590eSStephen M. Cameron goto exit_failed; 36779846590eSStephen M. Cameron status = buf[4]; /* status byte */ 36789846590eSStephen M. Cameron 36799846590eSStephen M. Cameron kfree(buf); 36809846590eSStephen M. Cameron return status; 36819846590eSStephen M. Cameron exit_failed: 36829846590eSStephen M. Cameron kfree(buf); 36839846590eSStephen M. Cameron return HPSA_VPD_LV_STATUS_UNSUPPORTED; 36849846590eSStephen M. Cameron } 36859846590eSStephen M. Cameron 36869846590eSStephen M. Cameron /* Determine offline status of a volume. 36879846590eSStephen M. Cameron * Return either: 36889846590eSStephen M. Cameron * 0 (not offline) 368967955ba3SStephen M. Cameron * 0xff (offline for unknown reasons) 36909846590eSStephen M. Cameron * # (integer code indicating one of several NOT READY states 36919846590eSStephen M. Cameron * describing why a volume is to be kept offline) 36929846590eSStephen M. Cameron */ 369367955ba3SStephen M. Cameron static int hpsa_volume_offline(struct ctlr_info *h, 36949846590eSStephen M. Cameron unsigned char scsi3addr[]) 36959846590eSStephen M. Cameron { 36969846590eSStephen M. Cameron struct CommandList *c; 36979437ac43SStephen Cameron unsigned char *sense; 36989437ac43SStephen Cameron u8 sense_key, asc, ascq; 36999437ac43SStephen Cameron int sense_len; 370025163bd5SWebb Scales int rc, ldstat = 0; 37019846590eSStephen M. Cameron u16 cmd_status; 37029846590eSStephen M. Cameron u8 scsi_status; 37039846590eSStephen M. Cameron #define ASC_LUN_NOT_READY 0x04 37049846590eSStephen M. Cameron #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04 37059846590eSStephen M. Cameron #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02 37069846590eSStephen M. Cameron 37079846590eSStephen M. Cameron c = cmd_alloc(h); 3708bf43caf3SRobert Elliott 37099846590eSStephen M. Cameron (void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD); 3710c448ecfaSDon Brace rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 3711c448ecfaSDon Brace DEFAULT_TIMEOUT); 371225163bd5SWebb Scales if (rc) { 371325163bd5SWebb Scales cmd_free(h, c); 371425163bd5SWebb Scales return 0; 371525163bd5SWebb Scales } 37169846590eSStephen M. Cameron sense = c->err_info->SenseInfo; 37179437ac43SStephen Cameron if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo)) 37189437ac43SStephen Cameron sense_len = sizeof(c->err_info->SenseInfo); 37199437ac43SStephen Cameron else 37209437ac43SStephen Cameron sense_len = c->err_info->SenseLen; 37219437ac43SStephen Cameron decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq); 37229846590eSStephen M. Cameron cmd_status = c->err_info->CommandStatus; 37239846590eSStephen M. Cameron scsi_status = c->err_info->ScsiStatus; 37249846590eSStephen M. Cameron cmd_free(h, c); 37259846590eSStephen M. Cameron /* Is the volume 'not ready'? */ 37269846590eSStephen M. Cameron if (cmd_status != CMD_TARGET_STATUS || 37279846590eSStephen M. Cameron scsi_status != SAM_STAT_CHECK_CONDITION || 37289846590eSStephen M. Cameron sense_key != NOT_READY || 37299846590eSStephen M. Cameron asc != ASC_LUN_NOT_READY) { 37309846590eSStephen M. Cameron return 0; 37319846590eSStephen M. Cameron } 37329846590eSStephen M. Cameron 37339846590eSStephen M. Cameron /* Determine the reason for not ready state */ 37349846590eSStephen M. Cameron ldstat = hpsa_get_volume_status(h, scsi3addr); 37359846590eSStephen M. Cameron 37369846590eSStephen M. Cameron /* Keep volume offline in certain cases: */ 37379846590eSStephen M. Cameron switch (ldstat) { 37389846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ERASE: 37395ca01204SScott Benesh case HPSA_LV_NOT_AVAILABLE: 37409846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_RPI: 37419846590eSStephen M. Cameron case HPSA_LV_PENDING_RPI: 37429846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_NO_KEY: 37439846590eSStephen M. Cameron case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER: 37449846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION: 37459846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING: 37469846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 37479846590eSStephen M. Cameron return ldstat; 37489846590eSStephen M. Cameron case HPSA_VPD_LV_STATUS_UNSUPPORTED: 37499846590eSStephen M. Cameron /* If VPD status page isn't available, 37509846590eSStephen M. Cameron * use ASC/ASCQ to determine state 37519846590eSStephen M. Cameron */ 37529846590eSStephen M. Cameron if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) || 37539846590eSStephen M. Cameron (ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ)) 37549846590eSStephen M. Cameron return ldstat; 37559846590eSStephen M. Cameron break; 37569846590eSStephen M. Cameron default: 37579846590eSStephen M. Cameron break; 37589846590eSStephen M. Cameron } 37599846590eSStephen M. Cameron return 0; 37609846590eSStephen M. Cameron } 37619846590eSStephen M. Cameron 37629b5c48c2SStephen Cameron /* 37639b5c48c2SStephen Cameron * Find out if a logical device supports aborts by simply trying one. 37649b5c48c2SStephen Cameron * Smart Array may claim not to support aborts on logical drives, but 37659b5c48c2SStephen Cameron * if a MSA2000 * is connected, the drives on that will be presented 37669b5c48c2SStephen Cameron * by the Smart Array as logical drives, and aborts may be sent to 37679b5c48c2SStephen Cameron * those devices successfully. So the simplest way to find out is 37689b5c48c2SStephen Cameron * to simply try an abort and see how the device responds. 37699b5c48c2SStephen Cameron */ 37709b5c48c2SStephen Cameron static int hpsa_device_supports_aborts(struct ctlr_info *h, 37719b5c48c2SStephen Cameron unsigned char *scsi3addr) 37729b5c48c2SStephen Cameron { 37739b5c48c2SStephen Cameron struct CommandList *c; 37749b5c48c2SStephen Cameron struct ErrorInfo *ei; 37759b5c48c2SStephen Cameron int rc = 0; 37769b5c48c2SStephen Cameron 37779b5c48c2SStephen Cameron u64 tag = (u64) -1; /* bogus tag */ 37789b5c48c2SStephen Cameron 37799b5c48c2SStephen Cameron /* Assume that physical devices support aborts */ 37809b5c48c2SStephen Cameron if (!is_logical_dev_addr_mode(scsi3addr)) 37819b5c48c2SStephen Cameron return 1; 37829b5c48c2SStephen Cameron 37839b5c48c2SStephen Cameron c = cmd_alloc(h); 3784bf43caf3SRobert Elliott 37859b5c48c2SStephen Cameron (void) fill_cmd(c, HPSA_ABORT_MSG, h, &tag, 0, 0, scsi3addr, TYPE_MSG); 3786c448ecfaSDon Brace (void) hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 3787c448ecfaSDon Brace DEFAULT_TIMEOUT); 37889b5c48c2SStephen Cameron /* no unmap needed here because no data xfer. */ 37899b5c48c2SStephen Cameron ei = c->err_info; 37909b5c48c2SStephen Cameron switch (ei->CommandStatus) { 37919b5c48c2SStephen Cameron case CMD_INVALID: 37929b5c48c2SStephen Cameron rc = 0; 37939b5c48c2SStephen Cameron break; 37949b5c48c2SStephen Cameron case CMD_UNABORTABLE: 37959b5c48c2SStephen Cameron case CMD_ABORT_FAILED: 37969b5c48c2SStephen Cameron rc = 1; 37979b5c48c2SStephen Cameron break; 37989437ac43SStephen Cameron case CMD_TMF_STATUS: 37999437ac43SStephen Cameron rc = hpsa_evaluate_tmf_status(h, c); 38009437ac43SStephen Cameron break; 38019b5c48c2SStephen Cameron default: 38029b5c48c2SStephen Cameron rc = 0; 38039b5c48c2SStephen Cameron break; 38049b5c48c2SStephen Cameron } 38059b5c48c2SStephen Cameron cmd_free(h, c); 38069b5c48c2SStephen Cameron return rc; 38079b5c48c2SStephen Cameron } 38089b5c48c2SStephen Cameron 3809edd16368SStephen M. Cameron static int hpsa_update_device_info(struct ctlr_info *h, 38100b0e1d6cSStephen M. Cameron unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device, 38110b0e1d6cSStephen M. Cameron unsigned char *is_OBDR_device) 3812edd16368SStephen M. Cameron { 38130b0e1d6cSStephen M. Cameron 38140b0e1d6cSStephen M. Cameron #define OBDR_SIG_OFFSET 43 38150b0e1d6cSStephen M. Cameron #define OBDR_TAPE_SIG "$DR-10" 38160b0e1d6cSStephen M. Cameron #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1) 38170b0e1d6cSStephen M. Cameron #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN) 38180b0e1d6cSStephen M. Cameron 3819ea6d3bc3SStephen M. Cameron unsigned char *inq_buff; 38200b0e1d6cSStephen M. Cameron unsigned char *obdr_sig; 3821683fc444SDon Brace int rc = 0; 3822edd16368SStephen M. Cameron 3823ea6d3bc3SStephen M. Cameron inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL); 3824683fc444SDon Brace if (!inq_buff) { 3825683fc444SDon Brace rc = -ENOMEM; 3826edd16368SStephen M. Cameron goto bail_out; 3827683fc444SDon Brace } 3828edd16368SStephen M. Cameron 3829edd16368SStephen M. Cameron /* Do an inquiry to the device to see what it is. */ 3830edd16368SStephen M. Cameron if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff, 3831edd16368SStephen M. Cameron (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) { 3832edd16368SStephen M. Cameron /* Inquiry failed (msg printed already) */ 3833edd16368SStephen M. Cameron dev_err(&h->pdev->dev, 3834edd16368SStephen M. Cameron "hpsa_update_device_info: inquiry failed\n"); 3835683fc444SDon Brace rc = -EIO; 3836edd16368SStephen M. Cameron goto bail_out; 3837edd16368SStephen M. Cameron } 3838edd16368SStephen M. Cameron 38394af61e4fSDon Brace scsi_sanitize_inquiry_string(&inq_buff[8], 8); 38404af61e4fSDon Brace scsi_sanitize_inquiry_string(&inq_buff[16], 16); 384175d23d89SDon Brace 3842edd16368SStephen M. Cameron this_device->devtype = (inq_buff[0] & 0x1f); 3843edd16368SStephen M. Cameron memcpy(this_device->scsi3addr, scsi3addr, 8); 3844edd16368SStephen M. Cameron memcpy(this_device->vendor, &inq_buff[8], 3845edd16368SStephen M. Cameron sizeof(this_device->vendor)); 3846edd16368SStephen M. Cameron memcpy(this_device->model, &inq_buff[16], 3847edd16368SStephen M. Cameron sizeof(this_device->model)); 3848edd16368SStephen M. Cameron memset(this_device->device_id, 0, 3849edd16368SStephen M. Cameron sizeof(this_device->device_id)); 38508383278dSScott Teel if (hpsa_get_device_id(h, scsi3addr, this_device->device_id, 8, 38518383278dSScott Teel sizeof(this_device->device_id))) 38528383278dSScott Teel dev_err(&h->pdev->dev, 38538383278dSScott Teel "hpsa%d: %s: can't get device id for host %d:C0:T%d:L%d\t%s\t%.16s\n", 38548383278dSScott Teel h->ctlr, __func__, 38558383278dSScott Teel h->scsi_host->host_no, 38568383278dSScott Teel this_device->target, this_device->lun, 38578383278dSScott Teel scsi_device_type(this_device->devtype), 38588383278dSScott Teel this_device->model); 3859edd16368SStephen M. Cameron 3860af15ed36SDon Brace if ((this_device->devtype == TYPE_DISK || 3861af15ed36SDon Brace this_device->devtype == TYPE_ZBC) && 3862283b4a9bSStephen M. Cameron is_logical_dev_addr_mode(scsi3addr)) { 386367955ba3SStephen M. Cameron int volume_offline; 386467955ba3SStephen M. Cameron 3865edd16368SStephen M. Cameron hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level); 3866283b4a9bSStephen M. Cameron if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC) 3867283b4a9bSStephen M. Cameron hpsa_get_ioaccel_status(h, scsi3addr, this_device); 386867955ba3SStephen M. Cameron volume_offline = hpsa_volume_offline(h, scsi3addr); 386967955ba3SStephen M. Cameron if (volume_offline < 0 || volume_offline > 0xff) 387067955ba3SStephen M. Cameron volume_offline = HPSA_VPD_LV_STATUS_UNSUPPORTED; 387167955ba3SStephen M. Cameron this_device->volume_offline = volume_offline & 0xff; 3872283b4a9bSStephen M. Cameron } else { 3873edd16368SStephen M. Cameron this_device->raid_level = RAID_UNKNOWN; 3874283b4a9bSStephen M. Cameron this_device->offload_config = 0; 3875283b4a9bSStephen M. Cameron this_device->offload_enabled = 0; 387641ce4c35SStephen Cameron this_device->offload_to_be_enabled = 0; 3877a3144e0bSJoe Handzik this_device->hba_ioaccel_enabled = 0; 38789846590eSStephen M. Cameron this_device->volume_offline = 0; 387903383736SDon Brace this_device->queue_depth = h->nr_cmds; 3880283b4a9bSStephen M. Cameron } 3881edd16368SStephen M. Cameron 38820b0e1d6cSStephen M. Cameron if (is_OBDR_device) { 38830b0e1d6cSStephen M. Cameron /* See if this is a One-Button-Disaster-Recovery device 38840b0e1d6cSStephen M. Cameron * by looking for "$DR-10" at offset 43 in inquiry data. 38850b0e1d6cSStephen M. Cameron */ 38860b0e1d6cSStephen M. Cameron obdr_sig = &inq_buff[OBDR_SIG_OFFSET]; 38870b0e1d6cSStephen M. Cameron *is_OBDR_device = (this_device->devtype == TYPE_ROM && 38880b0e1d6cSStephen M. Cameron strncmp(obdr_sig, OBDR_TAPE_SIG, 38890b0e1d6cSStephen M. Cameron OBDR_SIG_LEN) == 0); 38900b0e1d6cSStephen M. Cameron } 3891edd16368SStephen M. Cameron kfree(inq_buff); 3892edd16368SStephen M. Cameron return 0; 3893edd16368SStephen M. Cameron 3894edd16368SStephen M. Cameron bail_out: 3895edd16368SStephen M. Cameron kfree(inq_buff); 3896683fc444SDon Brace return rc; 3897edd16368SStephen M. Cameron } 3898edd16368SStephen M. Cameron 38999b5c48c2SStephen Cameron static void hpsa_update_device_supports_aborts(struct ctlr_info *h, 39009b5c48c2SStephen Cameron struct hpsa_scsi_dev_t *dev, u8 *scsi3addr) 39019b5c48c2SStephen Cameron { 39029b5c48c2SStephen Cameron unsigned long flags; 39039b5c48c2SStephen Cameron int rc, entry; 39049b5c48c2SStephen Cameron /* 39059b5c48c2SStephen Cameron * See if this device supports aborts. If we already know 39069b5c48c2SStephen Cameron * the device, we already know if it supports aborts, otherwise 39079b5c48c2SStephen Cameron * we have to find out if it supports aborts by trying one. 39089b5c48c2SStephen Cameron */ 39099b5c48c2SStephen Cameron spin_lock_irqsave(&h->devlock, flags); 39109b5c48c2SStephen Cameron rc = hpsa_scsi_find_entry(dev, h->dev, h->ndevices, &entry); 39119b5c48c2SStephen Cameron if ((rc == DEVICE_SAME || rc == DEVICE_UPDATED) && 39129b5c48c2SStephen Cameron entry >= 0 && entry < h->ndevices) { 39139b5c48c2SStephen Cameron dev->supports_aborts = h->dev[entry]->supports_aborts; 39149b5c48c2SStephen Cameron spin_unlock_irqrestore(&h->devlock, flags); 39159b5c48c2SStephen Cameron } else { 39169b5c48c2SStephen Cameron spin_unlock_irqrestore(&h->devlock, flags); 39179b5c48c2SStephen Cameron dev->supports_aborts = 39189b5c48c2SStephen Cameron hpsa_device_supports_aborts(h, scsi3addr); 39199b5c48c2SStephen Cameron if (dev->supports_aborts < 0) 39209b5c48c2SStephen Cameron dev->supports_aborts = 0; 39219b5c48c2SStephen Cameron } 39229b5c48c2SStephen Cameron } 39239b5c48c2SStephen Cameron 3924c795505aSKevin Barnett /* 3925c795505aSKevin Barnett * Helper function to assign bus, target, lun mapping of devices. 3926edd16368SStephen M. Cameron * Logical drive target and lun are assigned at this time, but 3927edd16368SStephen M. Cameron * physical device lun and target assignment are deferred (assigned 3928edd16368SStephen M. Cameron * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.) 3929edd16368SStephen M. Cameron */ 3930edd16368SStephen M. Cameron static void figure_bus_target_lun(struct ctlr_info *h, 39311f310bdeSStephen M. Cameron u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device) 3932edd16368SStephen M. Cameron { 3933c795505aSKevin Barnett u32 lunid = get_unaligned_le32(lunaddrbytes); 3934edd16368SStephen M. Cameron 39351f310bdeSStephen M. Cameron if (!is_logical_dev_addr_mode(lunaddrbytes)) { 39361f310bdeSStephen M. Cameron /* physical device, target and lun filled in later */ 39371f310bdeSStephen M. Cameron if (is_hba_lunid(lunaddrbytes)) 3938c795505aSKevin Barnett hpsa_set_bus_target_lun(device, 3939c795505aSKevin Barnett HPSA_HBA_BUS, 0, lunid & 0x3fff); 39401f310bdeSStephen M. Cameron else 39411f310bdeSStephen M. Cameron /* defer target, lun assignment for physical devices */ 3942c795505aSKevin Barnett hpsa_set_bus_target_lun(device, 3943c795505aSKevin Barnett HPSA_PHYSICAL_DEVICE_BUS, -1, -1); 39441f310bdeSStephen M. Cameron return; 39451f310bdeSStephen M. Cameron } 39461f310bdeSStephen M. Cameron /* It's a logical device */ 394766749d0dSScott Teel if (device->external) { 39481f310bdeSStephen M. Cameron hpsa_set_bus_target_lun(device, 3949c795505aSKevin Barnett HPSA_EXTERNAL_RAID_VOLUME_BUS, (lunid >> 16) & 0x3fff, 3950c795505aSKevin Barnett lunid & 0x00ff); 39511f310bdeSStephen M. Cameron return; 3952339b2b14SStephen M. Cameron } 3953c795505aSKevin Barnett hpsa_set_bus_target_lun(device, HPSA_RAID_VOLUME_BUS, 3954c795505aSKevin Barnett 0, lunid & 0x3fff); 3955edd16368SStephen M. Cameron } 3956edd16368SStephen M. Cameron 3957edd16368SStephen M. Cameron 3958edd16368SStephen M. Cameron /* 395954b6e9e9SScott Teel * Get address of physical disk used for an ioaccel2 mode command: 396054b6e9e9SScott Teel * 1. Extract ioaccel2 handle from the command. 396154b6e9e9SScott Teel * 2. Find a matching ioaccel2 handle from list of physical disks. 396254b6e9e9SScott Teel * 3. Return: 396354b6e9e9SScott Teel * 1 and set scsi3addr to address of matching physical 396454b6e9e9SScott Teel * 0 if no matching physical disk was found. 396554b6e9e9SScott Teel */ 396654b6e9e9SScott Teel static int hpsa_get_pdisk_of_ioaccel2(struct ctlr_info *h, 396754b6e9e9SScott Teel struct CommandList *ioaccel2_cmd_to_abort, unsigned char *scsi3addr) 396854b6e9e9SScott Teel { 396941ce4c35SStephen Cameron struct io_accel2_cmd *c2 = 397041ce4c35SStephen Cameron &h->ioaccel2_cmd_pool[ioaccel2_cmd_to_abort->cmdindex]; 397141ce4c35SStephen Cameron unsigned long flags; 397254b6e9e9SScott Teel int i; 397354b6e9e9SScott Teel 397441ce4c35SStephen Cameron spin_lock_irqsave(&h->devlock, flags); 397541ce4c35SStephen Cameron for (i = 0; i < h->ndevices; i++) 397641ce4c35SStephen Cameron if (h->dev[i]->ioaccel_handle == le32_to_cpu(c2->scsi_nexus)) { 397741ce4c35SStephen Cameron memcpy(scsi3addr, h->dev[i]->scsi3addr, 397841ce4c35SStephen Cameron sizeof(h->dev[i]->scsi3addr)); 397941ce4c35SStephen Cameron spin_unlock_irqrestore(&h->devlock, flags); 398054b6e9e9SScott Teel return 1; 398154b6e9e9SScott Teel } 398241ce4c35SStephen Cameron spin_unlock_irqrestore(&h->devlock, flags); 398341ce4c35SStephen Cameron return 0; 398441ce4c35SStephen Cameron } 398541ce4c35SStephen Cameron 398666749d0dSScott Teel static int figure_external_status(struct ctlr_info *h, int raid_ctlr_position, 398766749d0dSScott Teel int i, int nphysicals, int nlocal_logicals) 398866749d0dSScott Teel { 398966749d0dSScott Teel /* In report logicals, local logicals are listed first, 399066749d0dSScott Teel * then any externals. 399166749d0dSScott Teel */ 399266749d0dSScott Teel int logicals_start = nphysicals + (raid_ctlr_position == 0); 399366749d0dSScott Teel 399466749d0dSScott Teel if (i == raid_ctlr_position) 399566749d0dSScott Teel return 0; 399666749d0dSScott Teel 399766749d0dSScott Teel if (i < logicals_start) 399866749d0dSScott Teel return 0; 399966749d0dSScott Teel 400066749d0dSScott Teel /* i is in logicals range, but still within local logicals */ 400166749d0dSScott Teel if ((i - nphysicals - (raid_ctlr_position == 0)) < nlocal_logicals) 400266749d0dSScott Teel return 0; 400366749d0dSScott Teel 400466749d0dSScott Teel return 1; /* it's an external lun */ 400566749d0dSScott Teel } 400666749d0dSScott Teel 400754b6e9e9SScott Teel /* 4008edd16368SStephen M. Cameron * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev, 4009edd16368SStephen M. Cameron * logdev. The number of luns in physdev and logdev are returned in 4010edd16368SStephen M. Cameron * *nphysicals and *nlogicals, respectively. 4011edd16368SStephen M. Cameron * Returns 0 on success, -1 otherwise. 4012edd16368SStephen M. Cameron */ 4013edd16368SStephen M. Cameron static int hpsa_gather_lun_info(struct ctlr_info *h, 401403383736SDon Brace struct ReportExtendedLUNdata *physdev, u32 *nphysicals, 401501a02ffcSStephen M. Cameron struct ReportLUNdata *logdev, u32 *nlogicals) 4016edd16368SStephen M. Cameron { 401703383736SDon Brace if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) { 4018edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 4019edd16368SStephen M. Cameron return -1; 4020edd16368SStephen M. Cameron } 402103383736SDon Brace *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24; 4022edd16368SStephen M. Cameron if (*nphysicals > HPSA_MAX_PHYS_LUN) { 402303383736SDon Brace dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n", 402403383736SDon Brace HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN); 4025edd16368SStephen M. Cameron *nphysicals = HPSA_MAX_PHYS_LUN; 4026edd16368SStephen M. Cameron } 402703383736SDon Brace if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) { 4028edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "report logical LUNs failed.\n"); 4029edd16368SStephen M. Cameron return -1; 4030edd16368SStephen M. Cameron } 40316df1e954SStephen M. Cameron *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8; 4032edd16368SStephen M. Cameron /* Reject Logicals in excess of our max capability. */ 4033edd16368SStephen M. Cameron if (*nlogicals > HPSA_MAX_LUN) { 4034edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 4035edd16368SStephen M. Cameron "maximum logical LUNs (%d) exceeded. " 4036edd16368SStephen M. Cameron "%d LUNs ignored.\n", HPSA_MAX_LUN, 4037edd16368SStephen M. Cameron *nlogicals - HPSA_MAX_LUN); 4038edd16368SStephen M. Cameron *nlogicals = HPSA_MAX_LUN; 4039edd16368SStephen M. Cameron } 4040edd16368SStephen M. Cameron if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) { 4041edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 4042edd16368SStephen M. Cameron "maximum logical + physical LUNs (%d) exceeded. " 4043edd16368SStephen M. Cameron "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN, 4044edd16368SStephen M. Cameron *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN); 4045edd16368SStephen M. Cameron *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals; 4046edd16368SStephen M. Cameron } 4047edd16368SStephen M. Cameron return 0; 4048edd16368SStephen M. Cameron } 4049edd16368SStephen M. Cameron 405042a91641SDon Brace static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, 405142a91641SDon Brace int i, int nphysicals, int nlogicals, 4052a93aa1feSMatt Gates struct ReportExtendedLUNdata *physdev_list, 4053339b2b14SStephen M. Cameron struct ReportLUNdata *logdev_list) 4054339b2b14SStephen M. Cameron { 4055339b2b14SStephen M. Cameron /* Helper function, figure out where the LUN ID info is coming from 4056339b2b14SStephen M. Cameron * given index i, lists of physical and logical devices, where in 4057339b2b14SStephen M. Cameron * the list the raid controller is supposed to appear (first or last) 4058339b2b14SStephen M. Cameron */ 4059339b2b14SStephen M. Cameron 4060339b2b14SStephen M. Cameron int logicals_start = nphysicals + (raid_ctlr_position == 0); 4061339b2b14SStephen M. Cameron int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0); 4062339b2b14SStephen M. Cameron 4063339b2b14SStephen M. Cameron if (i == raid_ctlr_position) 4064339b2b14SStephen M. Cameron return RAID_CTLR_LUNID; 4065339b2b14SStephen M. Cameron 4066339b2b14SStephen M. Cameron if (i < logicals_start) 4067d5b5d964SStephen M. Cameron return &physdev_list->LUN[i - 4068d5b5d964SStephen M. Cameron (raid_ctlr_position == 0)].lunid[0]; 4069339b2b14SStephen M. Cameron 4070339b2b14SStephen M. Cameron if (i < last_device) 4071339b2b14SStephen M. Cameron return &logdev_list->LUN[i - nphysicals - 4072339b2b14SStephen M. Cameron (raid_ctlr_position == 0)][0]; 4073339b2b14SStephen M. Cameron BUG(); 4074339b2b14SStephen M. Cameron return NULL; 4075339b2b14SStephen M. Cameron } 4076339b2b14SStephen M. Cameron 407703383736SDon Brace /* get physical drive ioaccel handle and queue depth */ 407803383736SDon Brace static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h, 407903383736SDon Brace struct hpsa_scsi_dev_t *dev, 4080f2039b03SDon Brace struct ReportExtendedLUNdata *rlep, int rle_index, 408103383736SDon Brace struct bmic_identify_physical_device *id_phys) 408203383736SDon Brace { 408303383736SDon Brace int rc; 40844b6e5597SScott Teel struct ext_report_lun_entry *rle; 40854b6e5597SScott Teel 40864b6e5597SScott Teel /* 40874b6e5597SScott Teel * external targets don't support BMIC 40884b6e5597SScott Teel */ 40894b6e5597SScott Teel if (dev->external) { 40904b6e5597SScott Teel dev->queue_depth = 7; 40914b6e5597SScott Teel return; 40924b6e5597SScott Teel } 40934b6e5597SScott Teel 40944b6e5597SScott Teel rle = &rlep->LUN[rle_index]; 409503383736SDon Brace 409603383736SDon Brace dev->ioaccel_handle = rle->ioaccel_handle; 4097f2039b03SDon Brace if ((rle->device_flags & 0x08) && dev->ioaccel_handle) 4098a3144e0bSJoe Handzik dev->hba_ioaccel_enabled = 1; 409903383736SDon Brace memset(id_phys, 0, sizeof(*id_phys)); 4100f2039b03SDon Brace rc = hpsa_bmic_id_physical_device(h, &rle->lunid[0], 4101f2039b03SDon Brace GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]), id_phys, 410203383736SDon Brace sizeof(*id_phys)); 410303383736SDon Brace if (!rc) 410403383736SDon Brace /* Reserve space for FW operations */ 410503383736SDon Brace #define DRIVE_CMDS_RESERVED_FOR_FW 2 410603383736SDon Brace #define DRIVE_QUEUE_DEPTH 7 410703383736SDon Brace dev->queue_depth = 410803383736SDon Brace le16_to_cpu(id_phys->current_queue_depth_limit) - 410903383736SDon Brace DRIVE_CMDS_RESERVED_FOR_FW; 411003383736SDon Brace else 411103383736SDon Brace dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */ 411203383736SDon Brace } 411303383736SDon Brace 41148270b862SJoe Handzik static void hpsa_get_path_info(struct hpsa_scsi_dev_t *this_device, 4115f2039b03SDon Brace struct ReportExtendedLUNdata *rlep, int rle_index, 41168270b862SJoe Handzik struct bmic_identify_physical_device *id_phys) 41178270b862SJoe Handzik { 4118f2039b03SDon Brace struct ext_report_lun_entry *rle = &rlep->LUN[rle_index]; 4119f2039b03SDon Brace 4120f2039b03SDon Brace if ((rle->device_flags & 0x08) && this_device->ioaccel_handle) 41218270b862SJoe Handzik this_device->hba_ioaccel_enabled = 1; 41228270b862SJoe Handzik 41238270b862SJoe Handzik memcpy(&this_device->active_path_index, 41248270b862SJoe Handzik &id_phys->active_path_number, 41258270b862SJoe Handzik sizeof(this_device->active_path_index)); 41268270b862SJoe Handzik memcpy(&this_device->path_map, 41278270b862SJoe Handzik &id_phys->redundant_path_present_map, 41288270b862SJoe Handzik sizeof(this_device->path_map)); 41298270b862SJoe Handzik memcpy(&this_device->box, 41308270b862SJoe Handzik &id_phys->alternate_paths_phys_box_on_port, 41318270b862SJoe Handzik sizeof(this_device->box)); 41328270b862SJoe Handzik memcpy(&this_device->phys_connector, 41338270b862SJoe Handzik &id_phys->alternate_paths_phys_connector, 41348270b862SJoe Handzik sizeof(this_device->phys_connector)); 41358270b862SJoe Handzik memcpy(&this_device->bay, 41368270b862SJoe Handzik &id_phys->phys_bay_in_box, 41378270b862SJoe Handzik sizeof(this_device->bay)); 41388270b862SJoe Handzik } 41398270b862SJoe Handzik 414066749d0dSScott Teel /* get number of local logical disks. */ 414166749d0dSScott Teel static int hpsa_set_local_logical_count(struct ctlr_info *h, 414266749d0dSScott Teel struct bmic_identify_controller *id_ctlr, 414366749d0dSScott Teel u32 *nlocals) 414466749d0dSScott Teel { 414566749d0dSScott Teel int rc; 414666749d0dSScott Teel 414766749d0dSScott Teel if (!id_ctlr) { 414866749d0dSScott Teel dev_warn(&h->pdev->dev, "%s: id_ctlr buffer is NULL.\n", 414966749d0dSScott Teel __func__); 415066749d0dSScott Teel return -ENOMEM; 415166749d0dSScott Teel } 415266749d0dSScott Teel memset(id_ctlr, 0, sizeof(*id_ctlr)); 415366749d0dSScott Teel rc = hpsa_bmic_id_controller(h, id_ctlr, sizeof(*id_ctlr)); 415466749d0dSScott Teel if (!rc) 415566749d0dSScott Teel if (id_ctlr->configured_logical_drive_count < 256) 415666749d0dSScott Teel *nlocals = id_ctlr->configured_logical_drive_count; 415766749d0dSScott Teel else 415866749d0dSScott Teel *nlocals = le16_to_cpu( 415966749d0dSScott Teel id_ctlr->extended_logical_unit_count); 416066749d0dSScott Teel else 416166749d0dSScott Teel *nlocals = -1; 416266749d0dSScott Teel return rc; 416366749d0dSScott Teel } 416466749d0dSScott Teel 416564ce60caSDon Brace static bool hpsa_is_disk_spare(struct ctlr_info *h, u8 *lunaddrbytes) 416664ce60caSDon Brace { 416764ce60caSDon Brace struct bmic_identify_physical_device *id_phys; 416864ce60caSDon Brace bool is_spare = false; 416964ce60caSDon Brace int rc; 417064ce60caSDon Brace 417164ce60caSDon Brace id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 417264ce60caSDon Brace if (!id_phys) 417364ce60caSDon Brace return false; 417464ce60caSDon Brace 417564ce60caSDon Brace rc = hpsa_bmic_id_physical_device(h, 417664ce60caSDon Brace lunaddrbytes, 417764ce60caSDon Brace GET_BMIC_DRIVE_NUMBER(lunaddrbytes), 417864ce60caSDon Brace id_phys, sizeof(*id_phys)); 417964ce60caSDon Brace if (rc == 0) 418064ce60caSDon Brace is_spare = (id_phys->more_flags >> 6) & 0x01; 418164ce60caSDon Brace 418264ce60caSDon Brace kfree(id_phys); 418364ce60caSDon Brace return is_spare; 418464ce60caSDon Brace } 418564ce60caSDon Brace 418664ce60caSDon Brace #define RPL_DEV_FLAG_NON_DISK 0x1 418764ce60caSDon Brace #define RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED 0x2 418864ce60caSDon Brace #define RPL_DEV_FLAG_UNCONFIG_DISK 0x4 418964ce60caSDon Brace 419064ce60caSDon Brace #define BMIC_DEVICE_TYPE_ENCLOSURE 6 419164ce60caSDon Brace 419264ce60caSDon Brace static bool hpsa_skip_device(struct ctlr_info *h, u8 *lunaddrbytes, 419364ce60caSDon Brace struct ext_report_lun_entry *rle) 419464ce60caSDon Brace { 419564ce60caSDon Brace u8 device_flags; 419664ce60caSDon Brace u8 device_type; 419764ce60caSDon Brace 419864ce60caSDon Brace if (!MASKED_DEVICE(lunaddrbytes)) 419964ce60caSDon Brace return false; 420064ce60caSDon Brace 420164ce60caSDon Brace device_flags = rle->device_flags; 420264ce60caSDon Brace device_type = rle->device_type; 420364ce60caSDon Brace 420464ce60caSDon Brace if (device_flags & RPL_DEV_FLAG_NON_DISK) { 420564ce60caSDon Brace if (device_type == BMIC_DEVICE_TYPE_ENCLOSURE) 420664ce60caSDon Brace return false; 420764ce60caSDon Brace return true; 420864ce60caSDon Brace } 420964ce60caSDon Brace 421064ce60caSDon Brace if (!(device_flags & RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED)) 421164ce60caSDon Brace return false; 421264ce60caSDon Brace 421364ce60caSDon Brace if (device_flags & RPL_DEV_FLAG_UNCONFIG_DISK) 421464ce60caSDon Brace return false; 421564ce60caSDon Brace 421664ce60caSDon Brace /* 421764ce60caSDon Brace * Spares may be spun down, we do not want to 421864ce60caSDon Brace * do an Inquiry to a RAID set spare drive as 421964ce60caSDon Brace * that would have them spun up, that is a 422064ce60caSDon Brace * performance hit because I/O to the RAID device 422164ce60caSDon Brace * stops while the spin up occurs which can take 422264ce60caSDon Brace * over 50 seconds. 422364ce60caSDon Brace */ 422464ce60caSDon Brace if (hpsa_is_disk_spare(h, lunaddrbytes)) 422564ce60caSDon Brace return true; 422664ce60caSDon Brace 422764ce60caSDon Brace return false; 422864ce60caSDon Brace } 422966749d0dSScott Teel 42308aa60681SDon Brace static void hpsa_update_scsi_devices(struct ctlr_info *h) 4231edd16368SStephen M. Cameron { 4232edd16368SStephen M. Cameron /* the idea here is we could get notified 4233edd16368SStephen M. Cameron * that some devices have changed, so we do a report 4234edd16368SStephen M. Cameron * physical luns and report logical luns cmd, and adjust 4235edd16368SStephen M. Cameron * our list of devices accordingly. 4236edd16368SStephen M. Cameron * 4237edd16368SStephen M. Cameron * The scsi3addr's of devices won't change so long as the 4238edd16368SStephen M. Cameron * adapter is not reset. That means we can rescan and 4239edd16368SStephen M. Cameron * tell which devices we already know about, vs. new 4240edd16368SStephen M. Cameron * devices, vs. disappearing devices. 4241edd16368SStephen M. Cameron */ 4242a93aa1feSMatt Gates struct ReportExtendedLUNdata *physdev_list = NULL; 4243edd16368SStephen M. Cameron struct ReportLUNdata *logdev_list = NULL; 424403383736SDon Brace struct bmic_identify_physical_device *id_phys = NULL; 424566749d0dSScott Teel struct bmic_identify_controller *id_ctlr = NULL; 424601a02ffcSStephen M. Cameron u32 nphysicals = 0; 424701a02ffcSStephen M. Cameron u32 nlogicals = 0; 424866749d0dSScott Teel u32 nlocal_logicals = 0; 424901a02ffcSStephen M. Cameron u32 ndev_allocated = 0; 4250edd16368SStephen M. Cameron struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice; 4251edd16368SStephen M. Cameron int ncurrent = 0; 42524f4eb9f1SScott Teel int i, n_ext_target_devs, ndevs_to_allocate; 4253339b2b14SStephen M. Cameron int raid_ctlr_position; 425404fa2f44SKevin Barnett bool physical_device; 4255aca4a520SScott Teel DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS); 4256edd16368SStephen M. Cameron 4257cfe5badcSScott Teel currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL); 425892084715SStephen M. Cameron physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL); 425992084715SStephen M. Cameron logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL); 4260edd16368SStephen M. Cameron tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL); 426103383736SDon Brace id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 426266749d0dSScott Teel id_ctlr = kzalloc(sizeof(*id_ctlr), GFP_KERNEL); 4263edd16368SStephen M. Cameron 426403383736SDon Brace if (!currentsd || !physdev_list || !logdev_list || 426566749d0dSScott Teel !tmpdevice || !id_phys || !id_ctlr) { 4266edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "out of memory\n"); 4267edd16368SStephen M. Cameron goto out; 4268edd16368SStephen M. Cameron } 4269edd16368SStephen M. Cameron memset(lunzerobits, 0, sizeof(lunzerobits)); 4270edd16368SStephen M. Cameron 4271853633e8SDon Brace h->drv_req_rescan = 0; /* cancel scheduled rescan - we're doing it. */ 4272853633e8SDon Brace 427303383736SDon Brace if (hpsa_gather_lun_info(h, physdev_list, &nphysicals, 4274853633e8SDon Brace logdev_list, &nlogicals)) { 4275853633e8SDon Brace h->drv_req_rescan = 1; 4276edd16368SStephen M. Cameron goto out; 4277853633e8SDon Brace } 4278edd16368SStephen M. Cameron 427966749d0dSScott Teel /* Set number of local logicals (non PTRAID) */ 428066749d0dSScott Teel if (hpsa_set_local_logical_count(h, id_ctlr, &nlocal_logicals)) { 428166749d0dSScott Teel dev_warn(&h->pdev->dev, 428266749d0dSScott Teel "%s: Can't determine number of local logical devices.\n", 428366749d0dSScott Teel __func__); 428466749d0dSScott Teel } 4285edd16368SStephen M. Cameron 4286aca4a520SScott Teel /* We might see up to the maximum number of logical and physical disks 4287aca4a520SScott Teel * plus external target devices, and a device for the local RAID 4288aca4a520SScott Teel * controller. 4289edd16368SStephen M. Cameron */ 4290aca4a520SScott Teel ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1; 4291edd16368SStephen M. Cameron 4292edd16368SStephen M. Cameron /* Allocate the per device structures */ 4293edd16368SStephen M. Cameron for (i = 0; i < ndevs_to_allocate; i++) { 4294b7ec021fSScott Teel if (i >= HPSA_MAX_DEVICES) { 4295b7ec021fSScott Teel dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded." 4296b7ec021fSScott Teel " %d devices ignored.\n", HPSA_MAX_DEVICES, 4297b7ec021fSScott Teel ndevs_to_allocate - HPSA_MAX_DEVICES); 4298b7ec021fSScott Teel break; 4299b7ec021fSScott Teel } 4300b7ec021fSScott Teel 4301edd16368SStephen M. Cameron currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL); 4302edd16368SStephen M. Cameron if (!currentsd[i]) { 4303edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "out of memory at %s:%d\n", 4304edd16368SStephen M. Cameron __FILE__, __LINE__); 4305853633e8SDon Brace h->drv_req_rescan = 1; 4306edd16368SStephen M. Cameron goto out; 4307edd16368SStephen M. Cameron } 4308edd16368SStephen M. Cameron ndev_allocated++; 4309edd16368SStephen M. Cameron } 4310edd16368SStephen M. Cameron 43118645291bSStephen M. Cameron if (is_scsi_rev_5(h)) 4312339b2b14SStephen M. Cameron raid_ctlr_position = 0; 4313339b2b14SStephen M. Cameron else 4314339b2b14SStephen M. Cameron raid_ctlr_position = nphysicals + nlogicals; 4315339b2b14SStephen M. Cameron 4316edd16368SStephen M. Cameron /* adjust our table of devices */ 43174f4eb9f1SScott Teel n_ext_target_devs = 0; 4318edd16368SStephen M. Cameron for (i = 0; i < nphysicals + nlogicals + 1; i++) { 43190b0e1d6cSStephen M. Cameron u8 *lunaddrbytes, is_OBDR = 0; 4320683fc444SDon Brace int rc = 0; 4321f2039b03SDon Brace int phys_dev_index = i - (raid_ctlr_position == 0); 432264ce60caSDon Brace bool skip_device = false; 4323edd16368SStephen M. Cameron 432404fa2f44SKevin Barnett physical_device = i < nphysicals + (raid_ctlr_position == 0); 4325edd16368SStephen M. Cameron 4326edd16368SStephen M. Cameron /* Figure out where the LUN ID info is coming from */ 4327339b2b14SStephen M. Cameron lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position, 4328339b2b14SStephen M. Cameron i, nphysicals, nlogicals, physdev_list, logdev_list); 432941ce4c35SStephen Cameron 433086cf7130SDon Brace /* Determine if this is a lun from an external target array */ 433186cf7130SDon Brace tmpdevice->external = 433286cf7130SDon Brace figure_external_status(h, raid_ctlr_position, i, 433386cf7130SDon Brace nphysicals, nlocal_logicals); 433486cf7130SDon Brace 433564ce60caSDon Brace /* 433664ce60caSDon Brace * Skip over some devices such as a spare. 433764ce60caSDon Brace */ 433864ce60caSDon Brace if (!tmpdevice->external && physical_device) { 433964ce60caSDon Brace skip_device = hpsa_skip_device(h, lunaddrbytes, 434064ce60caSDon Brace &physdev_list->LUN[phys_dev_index]); 434164ce60caSDon Brace if (skip_device) 4342edd16368SStephen M. Cameron continue; 434364ce60caSDon Brace } 4344edd16368SStephen M. Cameron 4345edd16368SStephen M. Cameron /* Get device type, vendor, model, device id */ 4346683fc444SDon Brace rc = hpsa_update_device_info(h, lunaddrbytes, tmpdevice, 4347683fc444SDon Brace &is_OBDR); 4348683fc444SDon Brace if (rc == -ENOMEM) { 4349683fc444SDon Brace dev_warn(&h->pdev->dev, 4350683fc444SDon Brace "Out of memory, rescan deferred.\n"); 4351853633e8SDon Brace h->drv_req_rescan = 1; 4352683fc444SDon Brace goto out; 4353853633e8SDon Brace } 4354683fc444SDon Brace if (rc) { 4355683fc444SDon Brace dev_warn(&h->pdev->dev, 4356683fc444SDon Brace "Inquiry failed, skipping device.\n"); 4357683fc444SDon Brace continue; 4358683fc444SDon Brace } 4359683fc444SDon Brace 43601f310bdeSStephen M. Cameron figure_bus_target_lun(h, lunaddrbytes, tmpdevice); 43619b5c48c2SStephen Cameron hpsa_update_device_supports_aborts(h, tmpdevice, lunaddrbytes); 4362edd16368SStephen M. Cameron this_device = currentsd[ncurrent]; 4363edd16368SStephen M. Cameron 436434592254SScott Teel /* Turn on discovery_polling if there are ext target devices. 436534592254SScott Teel * Event-based change notification is unreliable for those. 4366edd16368SStephen M. Cameron */ 436734592254SScott Teel if (!h->discovery_polling) { 436834592254SScott Teel if (tmpdevice->external) { 436934592254SScott Teel h->discovery_polling = 1; 437034592254SScott Teel dev_info(&h->pdev->dev, 437134592254SScott Teel "External target, activate discovery polling.\n"); 4372edd16368SStephen M. Cameron } 437334592254SScott Teel } 437434592254SScott Teel 4375edd16368SStephen M. Cameron 4376edd16368SStephen M. Cameron *this_device = *tmpdevice; 437704fa2f44SKevin Barnett this_device->physical_device = physical_device; 4378edd16368SStephen M. Cameron 437904fa2f44SKevin Barnett /* 438004fa2f44SKevin Barnett * Expose all devices except for physical devices that 438104fa2f44SKevin Barnett * are masked. 438204fa2f44SKevin Barnett */ 438304fa2f44SKevin Barnett if (MASKED_DEVICE(lunaddrbytes) && this_device->physical_device) 43842a168208SKevin Barnett this_device->expose_device = 0; 43852a168208SKevin Barnett else 43862a168208SKevin Barnett this_device->expose_device = 1; 438741ce4c35SStephen Cameron 4388d04e62b9SKevin Barnett 4389d04e62b9SKevin Barnett /* 4390d04e62b9SKevin Barnett * Get the SAS address for physical devices that are exposed. 4391d04e62b9SKevin Barnett */ 4392d04e62b9SKevin Barnett if (this_device->physical_device && this_device->expose_device) 4393d04e62b9SKevin Barnett hpsa_get_sas_address(h, lunaddrbytes, this_device); 4394edd16368SStephen M. Cameron 4395edd16368SStephen M. Cameron switch (this_device->devtype) { 43960b0e1d6cSStephen M. Cameron case TYPE_ROM: 4397edd16368SStephen M. Cameron /* We don't *really* support actual CD-ROM devices, 4398edd16368SStephen M. Cameron * just "One Button Disaster Recovery" tape drive 4399edd16368SStephen M. Cameron * which temporarily pretends to be a CD-ROM drive. 4400edd16368SStephen M. Cameron * So we check that the device is really an OBDR tape 4401edd16368SStephen M. Cameron * device by checking for "$DR-10" in bytes 43-48 of 4402edd16368SStephen M. Cameron * the inquiry data. 4403edd16368SStephen M. Cameron */ 44040b0e1d6cSStephen M. Cameron if (is_OBDR) 4405edd16368SStephen M. Cameron ncurrent++; 4406edd16368SStephen M. Cameron break; 4407edd16368SStephen M. Cameron case TYPE_DISK: 4408af15ed36SDon Brace case TYPE_ZBC: 440904fa2f44SKevin Barnett if (this_device->physical_device) { 4410b9092b79SKevin Barnett /* The disk is in HBA mode. */ 4411b9092b79SKevin Barnett /* Never use RAID mapper in HBA mode. */ 4412ecf418d1SJoe Handzik this_device->offload_enabled = 0; 441303383736SDon Brace hpsa_get_ioaccel_drive_info(h, this_device, 4414f2039b03SDon Brace physdev_list, phys_dev_index, id_phys); 4415f2039b03SDon Brace hpsa_get_path_info(this_device, 4416f2039b03SDon Brace physdev_list, phys_dev_index, id_phys); 4417b9092b79SKevin Barnett } 4418edd16368SStephen M. Cameron ncurrent++; 4419edd16368SStephen M. Cameron break; 4420edd16368SStephen M. Cameron case TYPE_TAPE: 4421edd16368SStephen M. Cameron case TYPE_MEDIUM_CHANGER: 4422cca8f13bSDon Brace ncurrent++; 4423cca8f13bSDon Brace break; 442441ce4c35SStephen Cameron case TYPE_ENCLOSURE: 442517a9e54aSDon Brace if (!this_device->external) 4426cca8f13bSDon Brace hpsa_get_enclosure_info(h, lunaddrbytes, 4427cca8f13bSDon Brace physdev_list, phys_dev_index, 4428cca8f13bSDon Brace this_device); 442941ce4c35SStephen Cameron ncurrent++; 443041ce4c35SStephen Cameron break; 4431edd16368SStephen M. Cameron case TYPE_RAID: 4432edd16368SStephen M. Cameron /* Only present the Smartarray HBA as a RAID controller. 4433edd16368SStephen M. Cameron * If it's a RAID controller other than the HBA itself 4434edd16368SStephen M. Cameron * (an external RAID controller, MSA500 or similar) 4435edd16368SStephen M. Cameron * don't present it. 4436edd16368SStephen M. Cameron */ 4437edd16368SStephen M. Cameron if (!is_hba_lunid(lunaddrbytes)) 4438edd16368SStephen M. Cameron break; 4439edd16368SStephen M. Cameron ncurrent++; 4440edd16368SStephen M. Cameron break; 4441edd16368SStephen M. Cameron default: 4442edd16368SStephen M. Cameron break; 4443edd16368SStephen M. Cameron } 4444cfe5badcSScott Teel if (ncurrent >= HPSA_MAX_DEVICES) 4445edd16368SStephen M. Cameron break; 4446edd16368SStephen M. Cameron } 4447d04e62b9SKevin Barnett 4448d04e62b9SKevin Barnett if (h->sas_host == NULL) { 4449d04e62b9SKevin Barnett int rc = 0; 4450d04e62b9SKevin Barnett 4451d04e62b9SKevin Barnett rc = hpsa_add_sas_host(h); 4452d04e62b9SKevin Barnett if (rc) { 4453d04e62b9SKevin Barnett dev_warn(&h->pdev->dev, 4454d04e62b9SKevin Barnett "Could not add sas host %d\n", rc); 4455d04e62b9SKevin Barnett goto out; 4456d04e62b9SKevin Barnett } 4457d04e62b9SKevin Barnett } 4458d04e62b9SKevin Barnett 44598aa60681SDon Brace adjust_hpsa_scsi_table(h, currentsd, ncurrent); 4460edd16368SStephen M. Cameron out: 4461edd16368SStephen M. Cameron kfree(tmpdevice); 4462edd16368SStephen M. Cameron for (i = 0; i < ndev_allocated; i++) 4463edd16368SStephen M. Cameron kfree(currentsd[i]); 4464edd16368SStephen M. Cameron kfree(currentsd); 4465edd16368SStephen M. Cameron kfree(physdev_list); 4466edd16368SStephen M. Cameron kfree(logdev_list); 446766749d0dSScott Teel kfree(id_ctlr); 446803383736SDon Brace kfree(id_phys); 4469edd16368SStephen M. Cameron } 4470edd16368SStephen M. Cameron 4471ec5cbf04SWebb Scales static void hpsa_set_sg_descriptor(struct SGDescriptor *desc, 4472ec5cbf04SWebb Scales struct scatterlist *sg) 4473ec5cbf04SWebb Scales { 4474ec5cbf04SWebb Scales u64 addr64 = (u64) sg_dma_address(sg); 4475ec5cbf04SWebb Scales unsigned int len = sg_dma_len(sg); 4476ec5cbf04SWebb Scales 4477ec5cbf04SWebb Scales desc->Addr = cpu_to_le64(addr64); 4478ec5cbf04SWebb Scales desc->Len = cpu_to_le32(len); 4479ec5cbf04SWebb Scales desc->Ext = 0; 4480ec5cbf04SWebb Scales } 4481ec5cbf04SWebb Scales 4482c7ee65b3SWebb Scales /* 4483c7ee65b3SWebb Scales * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci 4484edd16368SStephen M. Cameron * dma mapping and fills in the scatter gather entries of the 4485edd16368SStephen M. Cameron * hpsa command, cp. 4486edd16368SStephen M. Cameron */ 448733a2ffceSStephen M. Cameron static int hpsa_scatter_gather(struct ctlr_info *h, 4488edd16368SStephen M. Cameron struct CommandList *cp, 4489edd16368SStephen M. Cameron struct scsi_cmnd *cmd) 4490edd16368SStephen M. Cameron { 4491edd16368SStephen M. Cameron struct scatterlist *sg; 4492b3a7ba7cSWebb Scales int use_sg, i, sg_limit, chained, last_sg; 449333a2ffceSStephen M. Cameron struct SGDescriptor *curr_sg; 4494edd16368SStephen M. Cameron 449533a2ffceSStephen M. Cameron BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 4496edd16368SStephen M. Cameron 4497edd16368SStephen M. Cameron use_sg = scsi_dma_map(cmd); 4498edd16368SStephen M. Cameron if (use_sg < 0) 4499edd16368SStephen M. Cameron return use_sg; 4500edd16368SStephen M. Cameron 4501edd16368SStephen M. Cameron if (!use_sg) 4502edd16368SStephen M. Cameron goto sglist_finished; 4503edd16368SStephen M. Cameron 4504b3a7ba7cSWebb Scales /* 4505b3a7ba7cSWebb Scales * If the number of entries is greater than the max for a single list, 4506b3a7ba7cSWebb Scales * then we have a chained list; we will set up all but one entry in the 4507b3a7ba7cSWebb Scales * first list (the last entry is saved for link information); 4508b3a7ba7cSWebb Scales * otherwise, we don't have a chained list and we'll set up at each of 4509b3a7ba7cSWebb Scales * the entries in the one list. 4510b3a7ba7cSWebb Scales */ 451133a2ffceSStephen M. Cameron curr_sg = cp->SG; 4512b3a7ba7cSWebb Scales chained = use_sg > h->max_cmd_sg_entries; 4513b3a7ba7cSWebb Scales sg_limit = chained ? h->max_cmd_sg_entries - 1 : use_sg; 4514b3a7ba7cSWebb Scales last_sg = scsi_sg_count(cmd) - 1; 4515b3a7ba7cSWebb Scales scsi_for_each_sg(cmd, sg, sg_limit, i) { 4516ec5cbf04SWebb Scales hpsa_set_sg_descriptor(curr_sg, sg); 451733a2ffceSStephen M. Cameron curr_sg++; 451833a2ffceSStephen M. Cameron } 4519ec5cbf04SWebb Scales 4520b3a7ba7cSWebb Scales if (chained) { 4521b3a7ba7cSWebb Scales /* 4522b3a7ba7cSWebb Scales * Continue with the chained list. Set curr_sg to the chained 4523b3a7ba7cSWebb Scales * list. Modify the limit to the total count less the entries 4524b3a7ba7cSWebb Scales * we've already set up. Resume the scan at the list entry 4525b3a7ba7cSWebb Scales * where the previous loop left off. 4526b3a7ba7cSWebb Scales */ 4527b3a7ba7cSWebb Scales curr_sg = h->cmd_sg_list[cp->cmdindex]; 4528b3a7ba7cSWebb Scales sg_limit = use_sg - sg_limit; 4529b3a7ba7cSWebb Scales for_each_sg(sg, sg, sg_limit, i) { 4530b3a7ba7cSWebb Scales hpsa_set_sg_descriptor(curr_sg, sg); 4531b3a7ba7cSWebb Scales curr_sg++; 4532b3a7ba7cSWebb Scales } 4533b3a7ba7cSWebb Scales } 4534b3a7ba7cSWebb Scales 4535ec5cbf04SWebb Scales /* Back the pointer up to the last entry and mark it as "last". */ 4536b3a7ba7cSWebb Scales (curr_sg - 1)->Ext = cpu_to_le32(HPSA_SG_LAST); 453733a2ffceSStephen M. Cameron 453833a2ffceSStephen M. Cameron if (use_sg + chained > h->maxSG) 453933a2ffceSStephen M. Cameron h->maxSG = use_sg + chained; 454033a2ffceSStephen M. Cameron 454133a2ffceSStephen M. Cameron if (chained) { 454233a2ffceSStephen M. Cameron cp->Header.SGList = h->max_cmd_sg_entries; 454350a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(use_sg + 1); 4544e2bea6dfSStephen M. Cameron if (hpsa_map_sg_chain_block(h, cp)) { 4545e2bea6dfSStephen M. Cameron scsi_dma_unmap(cmd); 4546e2bea6dfSStephen M. Cameron return -1; 4547e2bea6dfSStephen M. Cameron } 454833a2ffceSStephen M. Cameron return 0; 4549edd16368SStephen M. Cameron } 4550edd16368SStephen M. Cameron 4551edd16368SStephen M. Cameron sglist_finished: 4552edd16368SStephen M. Cameron 455301a02ffcSStephen M. Cameron cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */ 4554c7ee65b3SWebb Scales cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */ 4555edd16368SStephen M. Cameron return 0; 4556edd16368SStephen M. Cameron } 4557edd16368SStephen M. Cameron 4558283b4a9bSStephen M. Cameron #define IO_ACCEL_INELIGIBLE (1) 4559283b4a9bSStephen M. Cameron static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len) 4560283b4a9bSStephen M. Cameron { 4561283b4a9bSStephen M. Cameron int is_write = 0; 4562283b4a9bSStephen M. Cameron u32 block; 4563283b4a9bSStephen M. Cameron u32 block_cnt; 4564283b4a9bSStephen M. Cameron 4565283b4a9bSStephen M. Cameron /* Perform some CDB fixups if needed using 10 byte reads/writes only */ 4566283b4a9bSStephen M. Cameron switch (cdb[0]) { 4567283b4a9bSStephen M. Cameron case WRITE_6: 4568283b4a9bSStephen M. Cameron case WRITE_12: 4569283b4a9bSStephen M. Cameron is_write = 1; 4570283b4a9bSStephen M. Cameron case READ_6: 4571283b4a9bSStephen M. Cameron case READ_12: 4572283b4a9bSStephen M. Cameron if (*cdb_len == 6) { 4573abbada71SMahesh Rajashekhara block = (((cdb[1] & 0x1F) << 16) | 4574abbada71SMahesh Rajashekhara (cdb[2] << 8) | 4575abbada71SMahesh Rajashekhara cdb[3]); 4576283b4a9bSStephen M. Cameron block_cnt = cdb[4]; 4577c8a6c9a6SDon Brace if (block_cnt == 0) 4578c8a6c9a6SDon Brace block_cnt = 256; 4579283b4a9bSStephen M. Cameron } else { 4580283b4a9bSStephen M. Cameron BUG_ON(*cdb_len != 12); 4581c8a6c9a6SDon Brace block = get_unaligned_be32(&cdb[2]); 4582c8a6c9a6SDon Brace block_cnt = get_unaligned_be32(&cdb[6]); 4583283b4a9bSStephen M. Cameron } 4584283b4a9bSStephen M. Cameron if (block_cnt > 0xffff) 4585283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 4586283b4a9bSStephen M. Cameron 4587283b4a9bSStephen M. Cameron cdb[0] = is_write ? WRITE_10 : READ_10; 4588283b4a9bSStephen M. Cameron cdb[1] = 0; 4589283b4a9bSStephen M. Cameron cdb[2] = (u8) (block >> 24); 4590283b4a9bSStephen M. Cameron cdb[3] = (u8) (block >> 16); 4591283b4a9bSStephen M. Cameron cdb[4] = (u8) (block >> 8); 4592283b4a9bSStephen M. Cameron cdb[5] = (u8) (block); 4593283b4a9bSStephen M. Cameron cdb[6] = 0; 4594283b4a9bSStephen M. Cameron cdb[7] = (u8) (block_cnt >> 8); 4595283b4a9bSStephen M. Cameron cdb[8] = (u8) (block_cnt); 4596283b4a9bSStephen M. Cameron cdb[9] = 0; 4597283b4a9bSStephen M. Cameron *cdb_len = 10; 4598283b4a9bSStephen M. Cameron break; 4599283b4a9bSStephen M. Cameron } 4600283b4a9bSStephen M. Cameron return 0; 4601283b4a9bSStephen M. Cameron } 4602283b4a9bSStephen M. Cameron 4603c349775eSScott Teel static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h, 4604283b4a9bSStephen M. Cameron struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 460503383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4606e1f7de0cSMatt Gates { 4607e1f7de0cSMatt Gates struct scsi_cmnd *cmd = c->scsi_cmd; 4608e1f7de0cSMatt Gates struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex]; 4609e1f7de0cSMatt Gates unsigned int len; 4610e1f7de0cSMatt Gates unsigned int total_len = 0; 4611e1f7de0cSMatt Gates struct scatterlist *sg; 4612e1f7de0cSMatt Gates u64 addr64; 4613e1f7de0cSMatt Gates int use_sg, i; 4614e1f7de0cSMatt Gates struct SGDescriptor *curr_sg; 4615e1f7de0cSMatt Gates u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE; 4616e1f7de0cSMatt Gates 4617283b4a9bSStephen M. Cameron /* TODO: implement chaining support */ 461803383736SDon Brace if (scsi_sg_count(cmd) > h->ioaccel_maxsg) { 461903383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4620283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 462103383736SDon Brace } 4622283b4a9bSStephen M. Cameron 4623e1f7de0cSMatt Gates BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX); 4624e1f7de0cSMatt Gates 462503383736SDon Brace if (fixup_ioaccel_cdb(cdb, &cdb_len)) { 462603383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4627283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 462803383736SDon Brace } 4629283b4a9bSStephen M. Cameron 4630e1f7de0cSMatt Gates c->cmd_type = CMD_IOACCEL1; 4631e1f7de0cSMatt Gates 4632e1f7de0cSMatt Gates /* Adjust the DMA address to point to the accelerated command buffer */ 4633e1f7de0cSMatt Gates c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle + 4634e1f7de0cSMatt Gates (c->cmdindex * sizeof(*cp)); 4635e1f7de0cSMatt Gates BUG_ON(c->busaddr & 0x0000007F); 4636e1f7de0cSMatt Gates 4637e1f7de0cSMatt Gates use_sg = scsi_dma_map(cmd); 463803383736SDon Brace if (use_sg < 0) { 463903383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4640e1f7de0cSMatt Gates return use_sg; 464103383736SDon Brace } 4642e1f7de0cSMatt Gates 4643e1f7de0cSMatt Gates if (use_sg) { 4644e1f7de0cSMatt Gates curr_sg = cp->SG; 4645e1f7de0cSMatt Gates scsi_for_each_sg(cmd, sg, use_sg, i) { 4646e1f7de0cSMatt Gates addr64 = (u64) sg_dma_address(sg); 4647e1f7de0cSMatt Gates len = sg_dma_len(sg); 4648e1f7de0cSMatt Gates total_len += len; 464950a0decfSStephen M. Cameron curr_sg->Addr = cpu_to_le64(addr64); 465050a0decfSStephen M. Cameron curr_sg->Len = cpu_to_le32(len); 465150a0decfSStephen M. Cameron curr_sg->Ext = cpu_to_le32(0); 4652e1f7de0cSMatt Gates curr_sg++; 4653e1f7de0cSMatt Gates } 465450a0decfSStephen M. Cameron (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST); 4655e1f7de0cSMatt Gates 4656e1f7de0cSMatt Gates switch (cmd->sc_data_direction) { 4657e1f7de0cSMatt Gates case DMA_TO_DEVICE: 4658e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_DATA_OUT; 4659e1f7de0cSMatt Gates break; 4660e1f7de0cSMatt Gates case DMA_FROM_DEVICE: 4661e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_DATA_IN; 4662e1f7de0cSMatt Gates break; 4663e1f7de0cSMatt Gates case DMA_NONE: 4664e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_NODATAXFER; 4665e1f7de0cSMatt Gates break; 4666e1f7de0cSMatt Gates default: 4667e1f7de0cSMatt Gates dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4668e1f7de0cSMatt Gates cmd->sc_data_direction); 4669e1f7de0cSMatt Gates BUG(); 4670e1f7de0cSMatt Gates break; 4671e1f7de0cSMatt Gates } 4672e1f7de0cSMatt Gates } else { 4673e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_NODATAXFER; 4674e1f7de0cSMatt Gates } 4675e1f7de0cSMatt Gates 4676c349775eSScott Teel c->Header.SGList = use_sg; 4677e1f7de0cSMatt Gates /* Fill out the command structure to submit */ 46782b08b3e9SDon Brace cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF); 46792b08b3e9SDon Brace cp->transfer_len = cpu_to_le32(total_len); 46802b08b3e9SDon Brace cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ | 46812b08b3e9SDon Brace (cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK)); 46822b08b3e9SDon Brace cp->control = cpu_to_le32(control); 4683283b4a9bSStephen M. Cameron memcpy(cp->CDB, cdb, cdb_len); 4684283b4a9bSStephen M. Cameron memcpy(cp->CISS_LUN, scsi3addr, 8); 4685c349775eSScott Teel /* Tag was already set at init time. */ 4686e1f7de0cSMatt Gates enqueue_cmd_and_start_io(h, c); 4687e1f7de0cSMatt Gates return 0; 4688e1f7de0cSMatt Gates } 4689edd16368SStephen M. Cameron 4690283b4a9bSStephen M. Cameron /* 4691283b4a9bSStephen M. Cameron * Queue a command directly to a device behind the controller using the 4692283b4a9bSStephen M. Cameron * I/O accelerator path. 4693283b4a9bSStephen M. Cameron */ 4694283b4a9bSStephen M. Cameron static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h, 4695283b4a9bSStephen M. Cameron struct CommandList *c) 4696283b4a9bSStephen M. Cameron { 4697283b4a9bSStephen M. Cameron struct scsi_cmnd *cmd = c->scsi_cmd; 4698283b4a9bSStephen M. Cameron struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4699283b4a9bSStephen M. Cameron 470045e596cdSDon Brace if (!dev) 470145e596cdSDon Brace return -1; 470245e596cdSDon Brace 470303383736SDon Brace c->phys_disk = dev; 470403383736SDon Brace 4705283b4a9bSStephen M. Cameron return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle, 470603383736SDon Brace cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev); 4707283b4a9bSStephen M. Cameron } 4708283b4a9bSStephen M. Cameron 4709dd0e19f3SScott Teel /* 4710dd0e19f3SScott Teel * Set encryption parameters for the ioaccel2 request 4711dd0e19f3SScott Teel */ 4712dd0e19f3SScott Teel static void set_encrypt_ioaccel2(struct ctlr_info *h, 4713dd0e19f3SScott Teel struct CommandList *c, struct io_accel2_cmd *cp) 4714dd0e19f3SScott Teel { 4715dd0e19f3SScott Teel struct scsi_cmnd *cmd = c->scsi_cmd; 4716dd0e19f3SScott Teel struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4717dd0e19f3SScott Teel struct raid_map_data *map = &dev->raid_map; 4718dd0e19f3SScott Teel u64 first_block; 4719dd0e19f3SScott Teel 4720dd0e19f3SScott Teel /* Are we doing encryption on this device */ 47212b08b3e9SDon Brace if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON)) 4722dd0e19f3SScott Teel return; 4723dd0e19f3SScott Teel /* Set the data encryption key index. */ 4724dd0e19f3SScott Teel cp->dekindex = map->dekindex; 4725dd0e19f3SScott Teel 4726dd0e19f3SScott Teel /* Set the encryption enable flag, encoded into direction field. */ 4727dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK; 4728dd0e19f3SScott Teel 4729dd0e19f3SScott Teel /* Set encryption tweak values based on logical block address 4730dd0e19f3SScott Teel * If block size is 512, tweak value is LBA. 4731dd0e19f3SScott Teel * For other block sizes, tweak is (LBA * block size)/ 512) 4732dd0e19f3SScott Teel */ 4733dd0e19f3SScott Teel switch (cmd->cmnd[0]) { 4734dd0e19f3SScott Teel /* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */ 4735dd0e19f3SScott Teel case READ_6: 4736abbada71SMahesh Rajashekhara case WRITE_6: 4737abbada71SMahesh Rajashekhara first_block = (((cmd->cmnd[1] & 0x1F) << 16) | 4738abbada71SMahesh Rajashekhara (cmd->cmnd[2] << 8) | 4739abbada71SMahesh Rajashekhara cmd->cmnd[3]); 4740dd0e19f3SScott Teel break; 4741dd0e19f3SScott Teel case WRITE_10: 4742dd0e19f3SScott Teel case READ_10: 4743dd0e19f3SScott Teel /* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */ 4744dd0e19f3SScott Teel case WRITE_12: 4745dd0e19f3SScott Teel case READ_12: 47462b08b3e9SDon Brace first_block = get_unaligned_be32(&cmd->cmnd[2]); 4747dd0e19f3SScott Teel break; 4748dd0e19f3SScott Teel case WRITE_16: 4749dd0e19f3SScott Teel case READ_16: 47502b08b3e9SDon Brace first_block = get_unaligned_be64(&cmd->cmnd[2]); 4751dd0e19f3SScott Teel break; 4752dd0e19f3SScott Teel default: 4753dd0e19f3SScott Teel dev_err(&h->pdev->dev, 47542b08b3e9SDon Brace "ERROR: %s: size (0x%x) not supported for encryption\n", 47552b08b3e9SDon Brace __func__, cmd->cmnd[0]); 4756dd0e19f3SScott Teel BUG(); 4757dd0e19f3SScott Teel break; 4758dd0e19f3SScott Teel } 47592b08b3e9SDon Brace 47602b08b3e9SDon Brace if (le32_to_cpu(map->volume_blk_size) != 512) 47612b08b3e9SDon Brace first_block = first_block * 47622b08b3e9SDon Brace le32_to_cpu(map->volume_blk_size)/512; 47632b08b3e9SDon Brace 47642b08b3e9SDon Brace cp->tweak_lower = cpu_to_le32(first_block); 47652b08b3e9SDon Brace cp->tweak_upper = cpu_to_le32(first_block >> 32); 4766dd0e19f3SScott Teel } 4767dd0e19f3SScott Teel 4768c349775eSScott Teel static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h, 4769c349775eSScott Teel struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 477003383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4771c349775eSScott Teel { 4772c349775eSScott Teel struct scsi_cmnd *cmd = c->scsi_cmd; 4773c349775eSScott Teel struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex]; 4774c349775eSScott Teel struct ioaccel2_sg_element *curr_sg; 4775c349775eSScott Teel int use_sg, i; 4776c349775eSScott Teel struct scatterlist *sg; 4777c349775eSScott Teel u64 addr64; 4778c349775eSScott Teel u32 len; 4779c349775eSScott Teel u32 total_len = 0; 4780c349775eSScott Teel 478145e596cdSDon Brace if (!cmd->device) 478245e596cdSDon Brace return -1; 478345e596cdSDon Brace 478445e596cdSDon Brace if (!cmd->device->hostdata) 478545e596cdSDon Brace return -1; 478645e596cdSDon Brace 4787d9a729f3SWebb Scales BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 4788c349775eSScott Teel 478903383736SDon Brace if (fixup_ioaccel_cdb(cdb, &cdb_len)) { 479003383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4791c349775eSScott Teel return IO_ACCEL_INELIGIBLE; 479203383736SDon Brace } 479303383736SDon Brace 4794c349775eSScott Teel c->cmd_type = CMD_IOACCEL2; 4795c349775eSScott Teel /* Adjust the DMA address to point to the accelerated command buffer */ 4796c349775eSScott Teel c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle + 4797c349775eSScott Teel (c->cmdindex * sizeof(*cp)); 4798c349775eSScott Teel BUG_ON(c->busaddr & 0x0000007F); 4799c349775eSScott Teel 4800c349775eSScott Teel memset(cp, 0, sizeof(*cp)); 4801c349775eSScott Teel cp->IU_type = IOACCEL2_IU_TYPE; 4802c349775eSScott Teel 4803c349775eSScott Teel use_sg = scsi_dma_map(cmd); 480403383736SDon Brace if (use_sg < 0) { 480503383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4806c349775eSScott Teel return use_sg; 480703383736SDon Brace } 4808c349775eSScott Teel 4809c349775eSScott Teel if (use_sg) { 4810c349775eSScott Teel curr_sg = cp->sg; 4811d9a729f3SWebb Scales if (use_sg > h->ioaccel_maxsg) { 4812d9a729f3SWebb Scales addr64 = le64_to_cpu( 4813d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list[c->cmdindex]->address); 4814d9a729f3SWebb Scales curr_sg->address = cpu_to_le64(addr64); 4815d9a729f3SWebb Scales curr_sg->length = 0; 4816d9a729f3SWebb Scales curr_sg->reserved[0] = 0; 4817d9a729f3SWebb Scales curr_sg->reserved[1] = 0; 4818d9a729f3SWebb Scales curr_sg->reserved[2] = 0; 4819d9a729f3SWebb Scales curr_sg->chain_indicator = 0x80; 4820d9a729f3SWebb Scales 4821d9a729f3SWebb Scales curr_sg = h->ioaccel2_cmd_sg_list[c->cmdindex]; 4822d9a729f3SWebb Scales } 4823c349775eSScott Teel scsi_for_each_sg(cmd, sg, use_sg, i) { 4824c349775eSScott Teel addr64 = (u64) sg_dma_address(sg); 4825c349775eSScott Teel len = sg_dma_len(sg); 4826c349775eSScott Teel total_len += len; 4827c349775eSScott Teel curr_sg->address = cpu_to_le64(addr64); 4828c349775eSScott Teel curr_sg->length = cpu_to_le32(len); 4829c349775eSScott Teel curr_sg->reserved[0] = 0; 4830c349775eSScott Teel curr_sg->reserved[1] = 0; 4831c349775eSScott Teel curr_sg->reserved[2] = 0; 4832c349775eSScott Teel curr_sg->chain_indicator = 0; 4833c349775eSScott Teel curr_sg++; 4834c349775eSScott Teel } 4835c349775eSScott Teel 4836c349775eSScott Teel switch (cmd->sc_data_direction) { 4837c349775eSScott Teel case DMA_TO_DEVICE: 4838dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4839dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_DATA_OUT; 4840c349775eSScott Teel break; 4841c349775eSScott Teel case DMA_FROM_DEVICE: 4842dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4843dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_DATA_IN; 4844c349775eSScott Teel break; 4845c349775eSScott Teel case DMA_NONE: 4846dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4847dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_NO_DATA; 4848c349775eSScott Teel break; 4849c349775eSScott Teel default: 4850c349775eSScott Teel dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4851c349775eSScott Teel cmd->sc_data_direction); 4852c349775eSScott Teel BUG(); 4853c349775eSScott Teel break; 4854c349775eSScott Teel } 4855c349775eSScott Teel } else { 4856dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4857dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_NO_DATA; 4858c349775eSScott Teel } 4859dd0e19f3SScott Teel 4860dd0e19f3SScott Teel /* Set encryption parameters, if necessary */ 4861dd0e19f3SScott Teel set_encrypt_ioaccel2(h, c, cp); 4862dd0e19f3SScott Teel 48632b08b3e9SDon Brace cp->scsi_nexus = cpu_to_le32(ioaccel_handle); 4864f2405db8SDon Brace cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT); 4865c349775eSScott Teel memcpy(cp->cdb, cdb, sizeof(cp->cdb)); 4866c349775eSScott Teel 4867c349775eSScott Teel cp->data_len = cpu_to_le32(total_len); 4868c349775eSScott Teel cp->err_ptr = cpu_to_le64(c->busaddr + 4869c349775eSScott Teel offsetof(struct io_accel2_cmd, error_data)); 487050a0decfSStephen M. Cameron cp->err_len = cpu_to_le32(sizeof(cp->error_data)); 4871c349775eSScott Teel 4872d9a729f3SWebb Scales /* fill in sg elements */ 4873d9a729f3SWebb Scales if (use_sg > h->ioaccel_maxsg) { 4874d9a729f3SWebb Scales cp->sg_count = 1; 4875a736e9b6SDon Brace cp->sg[0].length = cpu_to_le32(use_sg * sizeof(cp->sg[0])); 4876d9a729f3SWebb Scales if (hpsa_map_ioaccel2_sg_chain_block(h, cp, c)) { 4877d9a729f3SWebb Scales atomic_dec(&phys_disk->ioaccel_cmds_out); 4878d9a729f3SWebb Scales scsi_dma_unmap(cmd); 4879d9a729f3SWebb Scales return -1; 4880d9a729f3SWebb Scales } 4881d9a729f3SWebb Scales } else 4882d9a729f3SWebb Scales cp->sg_count = (u8) use_sg; 4883d9a729f3SWebb Scales 4884c349775eSScott Teel enqueue_cmd_and_start_io(h, c); 4885c349775eSScott Teel return 0; 4886c349775eSScott Teel } 4887c349775eSScott Teel 4888c349775eSScott Teel /* 4889c349775eSScott Teel * Queue a command to the correct I/O accelerator path. 4890c349775eSScott Teel */ 4891c349775eSScott Teel static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h, 4892c349775eSScott Teel struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 489303383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4894c349775eSScott Teel { 489545e596cdSDon Brace if (!c->scsi_cmd->device) 489645e596cdSDon Brace return -1; 489745e596cdSDon Brace 489845e596cdSDon Brace if (!c->scsi_cmd->device->hostdata) 489945e596cdSDon Brace return -1; 490045e596cdSDon Brace 490103383736SDon Brace /* Try to honor the device's queue depth */ 490203383736SDon Brace if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) > 490303383736SDon Brace phys_disk->queue_depth) { 490403383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 490503383736SDon Brace return IO_ACCEL_INELIGIBLE; 490603383736SDon Brace } 4907c349775eSScott Teel if (h->transMethod & CFGTBL_Trans_io_accel1) 4908c349775eSScott Teel return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle, 490903383736SDon Brace cdb, cdb_len, scsi3addr, 491003383736SDon Brace phys_disk); 4911c349775eSScott Teel else 4912c349775eSScott Teel return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle, 491303383736SDon Brace cdb, cdb_len, scsi3addr, 491403383736SDon Brace phys_disk); 4915c349775eSScott Teel } 4916c349775eSScott Teel 49176b80b18fSScott Teel static void raid_map_helper(struct raid_map_data *map, 49186b80b18fSScott Teel int offload_to_mirror, u32 *map_index, u32 *current_group) 49196b80b18fSScott Teel { 49206b80b18fSScott Teel if (offload_to_mirror == 0) { 49216b80b18fSScott Teel /* use physical disk in the first mirrored group. */ 49222b08b3e9SDon Brace *map_index %= le16_to_cpu(map->data_disks_per_row); 49236b80b18fSScott Teel return; 49246b80b18fSScott Teel } 49256b80b18fSScott Teel do { 49266b80b18fSScott Teel /* determine mirror group that *map_index indicates */ 49272b08b3e9SDon Brace *current_group = *map_index / 49282b08b3e9SDon Brace le16_to_cpu(map->data_disks_per_row); 49296b80b18fSScott Teel if (offload_to_mirror == *current_group) 49306b80b18fSScott Teel continue; 49312b08b3e9SDon Brace if (*current_group < le16_to_cpu(map->layout_map_count) - 1) { 49326b80b18fSScott Teel /* select map index from next group */ 49332b08b3e9SDon Brace *map_index += le16_to_cpu(map->data_disks_per_row); 49346b80b18fSScott Teel (*current_group)++; 49356b80b18fSScott Teel } else { 49366b80b18fSScott Teel /* select map index from first group */ 49372b08b3e9SDon Brace *map_index %= le16_to_cpu(map->data_disks_per_row); 49386b80b18fSScott Teel *current_group = 0; 49396b80b18fSScott Teel } 49406b80b18fSScott Teel } while (offload_to_mirror != *current_group); 49416b80b18fSScott Teel } 49426b80b18fSScott Teel 4943283b4a9bSStephen M. Cameron /* 4944283b4a9bSStephen M. Cameron * Attempt to perform offload RAID mapping for a logical volume I/O. 4945283b4a9bSStephen M. Cameron */ 4946283b4a9bSStephen M. Cameron static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h, 4947283b4a9bSStephen M. Cameron struct CommandList *c) 4948283b4a9bSStephen M. Cameron { 4949283b4a9bSStephen M. Cameron struct scsi_cmnd *cmd = c->scsi_cmd; 4950283b4a9bSStephen M. Cameron struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4951283b4a9bSStephen M. Cameron struct raid_map_data *map = &dev->raid_map; 4952283b4a9bSStephen M. Cameron struct raid_map_disk_data *dd = &map->data[0]; 4953283b4a9bSStephen M. Cameron int is_write = 0; 4954283b4a9bSStephen M. Cameron u32 map_index; 4955283b4a9bSStephen M. Cameron u64 first_block, last_block; 4956283b4a9bSStephen M. Cameron u32 block_cnt; 4957283b4a9bSStephen M. Cameron u32 blocks_per_row; 4958283b4a9bSStephen M. Cameron u64 first_row, last_row; 4959283b4a9bSStephen M. Cameron u32 first_row_offset, last_row_offset; 4960283b4a9bSStephen M. Cameron u32 first_column, last_column; 49616b80b18fSScott Teel u64 r0_first_row, r0_last_row; 49626b80b18fSScott Teel u32 r5or6_blocks_per_row; 49636b80b18fSScott Teel u64 r5or6_first_row, r5or6_last_row; 49646b80b18fSScott Teel u32 r5or6_first_row_offset, r5or6_last_row_offset; 49656b80b18fSScott Teel u32 r5or6_first_column, r5or6_last_column; 49666b80b18fSScott Teel u32 total_disks_per_row; 49676b80b18fSScott Teel u32 stripesize; 49686b80b18fSScott Teel u32 first_group, last_group, current_group; 4969283b4a9bSStephen M. Cameron u32 map_row; 4970283b4a9bSStephen M. Cameron u32 disk_handle; 4971283b4a9bSStephen M. Cameron u64 disk_block; 4972283b4a9bSStephen M. Cameron u32 disk_block_cnt; 4973283b4a9bSStephen M. Cameron u8 cdb[16]; 4974283b4a9bSStephen M. Cameron u8 cdb_len; 49752b08b3e9SDon Brace u16 strip_size; 4976283b4a9bSStephen M. Cameron #if BITS_PER_LONG == 32 4977283b4a9bSStephen M. Cameron u64 tmpdiv; 4978283b4a9bSStephen M. Cameron #endif 49796b80b18fSScott Teel int offload_to_mirror; 4980283b4a9bSStephen M. Cameron 498145e596cdSDon Brace if (!dev) 498245e596cdSDon Brace return -1; 498345e596cdSDon Brace 4984283b4a9bSStephen M. Cameron /* check for valid opcode, get LBA and block count */ 4985283b4a9bSStephen M. Cameron switch (cmd->cmnd[0]) { 4986283b4a9bSStephen M. Cameron case WRITE_6: 4987283b4a9bSStephen M. Cameron is_write = 1; 4988283b4a9bSStephen M. Cameron case READ_6: 4989abbada71SMahesh Rajashekhara first_block = (((cmd->cmnd[1] & 0x1F) << 16) | 4990abbada71SMahesh Rajashekhara (cmd->cmnd[2] << 8) | 4991abbada71SMahesh Rajashekhara cmd->cmnd[3]); 4992283b4a9bSStephen M. Cameron block_cnt = cmd->cmnd[4]; 49933fa89a04SStephen M. Cameron if (block_cnt == 0) 49943fa89a04SStephen M. Cameron block_cnt = 256; 4995283b4a9bSStephen M. Cameron break; 4996283b4a9bSStephen M. Cameron case WRITE_10: 4997283b4a9bSStephen M. Cameron is_write = 1; 4998283b4a9bSStephen M. Cameron case READ_10: 4999283b4a9bSStephen M. Cameron first_block = 5000283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[2]) << 24) | 5001283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[3]) << 16) | 5002283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[4]) << 8) | 5003283b4a9bSStephen M. Cameron cmd->cmnd[5]; 5004283b4a9bSStephen M. Cameron block_cnt = 5005283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[7]) << 8) | 5006283b4a9bSStephen M. Cameron cmd->cmnd[8]; 5007283b4a9bSStephen M. Cameron break; 5008283b4a9bSStephen M. Cameron case WRITE_12: 5009283b4a9bSStephen M. Cameron is_write = 1; 5010283b4a9bSStephen M. Cameron case READ_12: 5011283b4a9bSStephen M. Cameron first_block = 5012283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[2]) << 24) | 5013283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[3]) << 16) | 5014283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[4]) << 8) | 5015283b4a9bSStephen M. Cameron cmd->cmnd[5]; 5016283b4a9bSStephen M. Cameron block_cnt = 5017283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[6]) << 24) | 5018283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[7]) << 16) | 5019283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[8]) << 8) | 5020283b4a9bSStephen M. Cameron cmd->cmnd[9]; 5021283b4a9bSStephen M. Cameron break; 5022283b4a9bSStephen M. Cameron case WRITE_16: 5023283b4a9bSStephen M. Cameron is_write = 1; 5024283b4a9bSStephen M. Cameron case READ_16: 5025283b4a9bSStephen M. Cameron first_block = 5026283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[2]) << 56) | 5027283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[3]) << 48) | 5028283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[4]) << 40) | 5029283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[5]) << 32) | 5030283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[6]) << 24) | 5031283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[7]) << 16) | 5032283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[8]) << 8) | 5033283b4a9bSStephen M. Cameron cmd->cmnd[9]; 5034283b4a9bSStephen M. Cameron block_cnt = 5035283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[10]) << 24) | 5036283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[11]) << 16) | 5037283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[12]) << 8) | 5038283b4a9bSStephen M. Cameron cmd->cmnd[13]; 5039283b4a9bSStephen M. Cameron break; 5040283b4a9bSStephen M. Cameron default: 5041283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */ 5042283b4a9bSStephen M. Cameron } 5043283b4a9bSStephen M. Cameron last_block = first_block + block_cnt - 1; 5044283b4a9bSStephen M. Cameron 5045283b4a9bSStephen M. Cameron /* check for write to non-RAID-0 */ 5046283b4a9bSStephen M. Cameron if (is_write && dev->raid_level != 0) 5047283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 5048283b4a9bSStephen M. Cameron 5049283b4a9bSStephen M. Cameron /* check for invalid block or wraparound */ 50502b08b3e9SDon Brace if (last_block >= le64_to_cpu(map->volume_blk_cnt) || 50512b08b3e9SDon Brace last_block < first_block) 5052283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 5053283b4a9bSStephen M. Cameron 5054283b4a9bSStephen M. Cameron /* calculate stripe information for the request */ 50552b08b3e9SDon Brace blocks_per_row = le16_to_cpu(map->data_disks_per_row) * 50562b08b3e9SDon Brace le16_to_cpu(map->strip_size); 50572b08b3e9SDon Brace strip_size = le16_to_cpu(map->strip_size); 5058283b4a9bSStephen M. Cameron #if BITS_PER_LONG == 32 5059283b4a9bSStephen M. Cameron tmpdiv = first_block; 5060283b4a9bSStephen M. Cameron (void) do_div(tmpdiv, blocks_per_row); 5061283b4a9bSStephen M. Cameron first_row = tmpdiv; 5062283b4a9bSStephen M. Cameron tmpdiv = last_block; 5063283b4a9bSStephen M. Cameron (void) do_div(tmpdiv, blocks_per_row); 5064283b4a9bSStephen M. Cameron last_row = tmpdiv; 5065283b4a9bSStephen M. Cameron first_row_offset = (u32) (first_block - (first_row * blocks_per_row)); 5066283b4a9bSStephen M. Cameron last_row_offset = (u32) (last_block - (last_row * blocks_per_row)); 5067283b4a9bSStephen M. Cameron tmpdiv = first_row_offset; 50682b08b3e9SDon Brace (void) do_div(tmpdiv, strip_size); 5069283b4a9bSStephen M. Cameron first_column = tmpdiv; 5070283b4a9bSStephen M. Cameron tmpdiv = last_row_offset; 50712b08b3e9SDon Brace (void) do_div(tmpdiv, strip_size); 5072283b4a9bSStephen M. Cameron last_column = tmpdiv; 5073283b4a9bSStephen M. Cameron #else 5074283b4a9bSStephen M. Cameron first_row = first_block / blocks_per_row; 5075283b4a9bSStephen M. Cameron last_row = last_block / blocks_per_row; 5076283b4a9bSStephen M. Cameron first_row_offset = (u32) (first_block - (first_row * blocks_per_row)); 5077283b4a9bSStephen M. Cameron last_row_offset = (u32) (last_block - (last_row * blocks_per_row)); 50782b08b3e9SDon Brace first_column = first_row_offset / strip_size; 50792b08b3e9SDon Brace last_column = last_row_offset / strip_size; 5080283b4a9bSStephen M. Cameron #endif 5081283b4a9bSStephen M. Cameron 5082283b4a9bSStephen M. Cameron /* if this isn't a single row/column then give to the controller */ 5083283b4a9bSStephen M. Cameron if ((first_row != last_row) || (first_column != last_column)) 5084283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 5085283b4a9bSStephen M. Cameron 5086283b4a9bSStephen M. Cameron /* proceeding with driver mapping */ 50872b08b3e9SDon Brace total_disks_per_row = le16_to_cpu(map->data_disks_per_row) + 50882b08b3e9SDon Brace le16_to_cpu(map->metadata_disks_per_row); 5089283b4a9bSStephen M. Cameron map_row = ((u32)(first_row >> map->parity_rotation_shift)) % 50902b08b3e9SDon Brace le16_to_cpu(map->row_cnt); 50916b80b18fSScott Teel map_index = (map_row * total_disks_per_row) + first_column; 50926b80b18fSScott Teel 50936b80b18fSScott Teel switch (dev->raid_level) { 50946b80b18fSScott Teel case HPSA_RAID_0: 50956b80b18fSScott Teel break; /* nothing special to do */ 50966b80b18fSScott Teel case HPSA_RAID_1: 50976b80b18fSScott Teel /* Handles load balance across RAID 1 members. 50986b80b18fSScott Teel * (2-drive R1 and R10 with even # of drives.) 50996b80b18fSScott Teel * Appropriate for SSDs, not optimal for HDDs 5100283b4a9bSStephen M. Cameron */ 51012b08b3e9SDon Brace BUG_ON(le16_to_cpu(map->layout_map_count) != 2); 5102283b4a9bSStephen M. Cameron if (dev->offload_to_mirror) 51032b08b3e9SDon Brace map_index += le16_to_cpu(map->data_disks_per_row); 5104283b4a9bSStephen M. Cameron dev->offload_to_mirror = !dev->offload_to_mirror; 51056b80b18fSScott Teel break; 51066b80b18fSScott Teel case HPSA_RAID_ADM: 51076b80b18fSScott Teel /* Handles N-way mirrors (R1-ADM) 51086b80b18fSScott Teel * and R10 with # of drives divisible by 3.) 51096b80b18fSScott Teel */ 51102b08b3e9SDon Brace BUG_ON(le16_to_cpu(map->layout_map_count) != 3); 51116b80b18fSScott Teel 51126b80b18fSScott Teel offload_to_mirror = dev->offload_to_mirror; 51136b80b18fSScott Teel raid_map_helper(map, offload_to_mirror, 51146b80b18fSScott Teel &map_index, ¤t_group); 51156b80b18fSScott Teel /* set mirror group to use next time */ 51166b80b18fSScott Teel offload_to_mirror = 51172b08b3e9SDon Brace (offload_to_mirror >= 51182b08b3e9SDon Brace le16_to_cpu(map->layout_map_count) - 1) 51196b80b18fSScott Teel ? 0 : offload_to_mirror + 1; 51206b80b18fSScott Teel dev->offload_to_mirror = offload_to_mirror; 51216b80b18fSScott Teel /* Avoid direct use of dev->offload_to_mirror within this 51226b80b18fSScott Teel * function since multiple threads might simultaneously 51236b80b18fSScott Teel * increment it beyond the range of dev->layout_map_count -1. 51246b80b18fSScott Teel */ 51256b80b18fSScott Teel break; 51266b80b18fSScott Teel case HPSA_RAID_5: 51276b80b18fSScott Teel case HPSA_RAID_6: 51282b08b3e9SDon Brace if (le16_to_cpu(map->layout_map_count) <= 1) 51296b80b18fSScott Teel break; 51306b80b18fSScott Teel 51316b80b18fSScott Teel /* Verify first and last block are in same RAID group */ 51326b80b18fSScott Teel r5or6_blocks_per_row = 51332b08b3e9SDon Brace le16_to_cpu(map->strip_size) * 51342b08b3e9SDon Brace le16_to_cpu(map->data_disks_per_row); 51356b80b18fSScott Teel BUG_ON(r5or6_blocks_per_row == 0); 51362b08b3e9SDon Brace stripesize = r5or6_blocks_per_row * 51372b08b3e9SDon Brace le16_to_cpu(map->layout_map_count); 51386b80b18fSScott Teel #if BITS_PER_LONG == 32 51396b80b18fSScott Teel tmpdiv = first_block; 51406b80b18fSScott Teel first_group = do_div(tmpdiv, stripesize); 51416b80b18fSScott Teel tmpdiv = first_group; 51426b80b18fSScott Teel (void) do_div(tmpdiv, r5or6_blocks_per_row); 51436b80b18fSScott Teel first_group = tmpdiv; 51446b80b18fSScott Teel tmpdiv = last_block; 51456b80b18fSScott Teel last_group = do_div(tmpdiv, stripesize); 51466b80b18fSScott Teel tmpdiv = last_group; 51476b80b18fSScott Teel (void) do_div(tmpdiv, r5or6_blocks_per_row); 51486b80b18fSScott Teel last_group = tmpdiv; 51496b80b18fSScott Teel #else 51506b80b18fSScott Teel first_group = (first_block % stripesize) / r5or6_blocks_per_row; 51516b80b18fSScott Teel last_group = (last_block % stripesize) / r5or6_blocks_per_row; 51526b80b18fSScott Teel #endif 5153000ff7c2SStephen M. Cameron if (first_group != last_group) 51546b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 51556b80b18fSScott Teel 51566b80b18fSScott Teel /* Verify request is in a single row of RAID 5/6 */ 51576b80b18fSScott Teel #if BITS_PER_LONG == 32 51586b80b18fSScott Teel tmpdiv = first_block; 51596b80b18fSScott Teel (void) do_div(tmpdiv, stripesize); 51606b80b18fSScott Teel first_row = r5or6_first_row = r0_first_row = tmpdiv; 51616b80b18fSScott Teel tmpdiv = last_block; 51626b80b18fSScott Teel (void) do_div(tmpdiv, stripesize); 51636b80b18fSScott Teel r5or6_last_row = r0_last_row = tmpdiv; 51646b80b18fSScott Teel #else 51656b80b18fSScott Teel first_row = r5or6_first_row = r0_first_row = 51666b80b18fSScott Teel first_block / stripesize; 51676b80b18fSScott Teel r5or6_last_row = r0_last_row = last_block / stripesize; 51686b80b18fSScott Teel #endif 51696b80b18fSScott Teel if (r5or6_first_row != r5or6_last_row) 51706b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 51716b80b18fSScott Teel 51726b80b18fSScott Teel 51736b80b18fSScott Teel /* Verify request is in a single column */ 51746b80b18fSScott Teel #if BITS_PER_LONG == 32 51756b80b18fSScott Teel tmpdiv = first_block; 51766b80b18fSScott Teel first_row_offset = do_div(tmpdiv, stripesize); 51776b80b18fSScott Teel tmpdiv = first_row_offset; 51786b80b18fSScott Teel first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row); 51796b80b18fSScott Teel r5or6_first_row_offset = first_row_offset; 51806b80b18fSScott Teel tmpdiv = last_block; 51816b80b18fSScott Teel r5or6_last_row_offset = do_div(tmpdiv, stripesize); 51826b80b18fSScott Teel tmpdiv = r5or6_last_row_offset; 51836b80b18fSScott Teel r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row); 51846b80b18fSScott Teel tmpdiv = r5or6_first_row_offset; 51856b80b18fSScott Teel (void) do_div(tmpdiv, map->strip_size); 51866b80b18fSScott Teel first_column = r5or6_first_column = tmpdiv; 51876b80b18fSScott Teel tmpdiv = r5or6_last_row_offset; 51886b80b18fSScott Teel (void) do_div(tmpdiv, map->strip_size); 51896b80b18fSScott Teel r5or6_last_column = tmpdiv; 51906b80b18fSScott Teel #else 51916b80b18fSScott Teel first_row_offset = r5or6_first_row_offset = 51926b80b18fSScott Teel (u32)((first_block % stripesize) % 51936b80b18fSScott Teel r5or6_blocks_per_row); 51946b80b18fSScott Teel 51956b80b18fSScott Teel r5or6_last_row_offset = 51966b80b18fSScott Teel (u32)((last_block % stripesize) % 51976b80b18fSScott Teel r5or6_blocks_per_row); 51986b80b18fSScott Teel 51996b80b18fSScott Teel first_column = r5or6_first_column = 52002b08b3e9SDon Brace r5or6_first_row_offset / le16_to_cpu(map->strip_size); 52016b80b18fSScott Teel r5or6_last_column = 52022b08b3e9SDon Brace r5or6_last_row_offset / le16_to_cpu(map->strip_size); 52036b80b18fSScott Teel #endif 52046b80b18fSScott Teel if (r5or6_first_column != r5or6_last_column) 52056b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 52066b80b18fSScott Teel 52076b80b18fSScott Teel /* Request is eligible */ 52086b80b18fSScott Teel map_row = ((u32)(first_row >> map->parity_rotation_shift)) % 52092b08b3e9SDon Brace le16_to_cpu(map->row_cnt); 52106b80b18fSScott Teel 52116b80b18fSScott Teel map_index = (first_group * 52122b08b3e9SDon Brace (le16_to_cpu(map->row_cnt) * total_disks_per_row)) + 52136b80b18fSScott Teel (map_row * total_disks_per_row) + first_column; 52146b80b18fSScott Teel break; 52156b80b18fSScott Teel default: 52166b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 5217283b4a9bSStephen M. Cameron } 52186b80b18fSScott Teel 521907543e0cSStephen Cameron if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES)) 522007543e0cSStephen Cameron return IO_ACCEL_INELIGIBLE; 522107543e0cSStephen Cameron 522203383736SDon Brace c->phys_disk = dev->phys_disk[map_index]; 5223c3390df4SDon Brace if (!c->phys_disk) 5224c3390df4SDon Brace return IO_ACCEL_INELIGIBLE; 522503383736SDon Brace 5226283b4a9bSStephen M. Cameron disk_handle = dd[map_index].ioaccel_handle; 52272b08b3e9SDon Brace disk_block = le64_to_cpu(map->disk_starting_blk) + 52282b08b3e9SDon Brace first_row * le16_to_cpu(map->strip_size) + 52292b08b3e9SDon Brace (first_row_offset - first_column * 52302b08b3e9SDon Brace le16_to_cpu(map->strip_size)); 5231283b4a9bSStephen M. Cameron disk_block_cnt = block_cnt; 5232283b4a9bSStephen M. Cameron 5233283b4a9bSStephen M. Cameron /* handle differing logical/physical block sizes */ 5234283b4a9bSStephen M. Cameron if (map->phys_blk_shift) { 5235283b4a9bSStephen M. Cameron disk_block <<= map->phys_blk_shift; 5236283b4a9bSStephen M. Cameron disk_block_cnt <<= map->phys_blk_shift; 5237283b4a9bSStephen M. Cameron } 5238283b4a9bSStephen M. Cameron BUG_ON(disk_block_cnt > 0xffff); 5239283b4a9bSStephen M. Cameron 5240283b4a9bSStephen M. Cameron /* build the new CDB for the physical disk I/O */ 5241283b4a9bSStephen M. Cameron if (disk_block > 0xffffffff) { 5242283b4a9bSStephen M. Cameron cdb[0] = is_write ? WRITE_16 : READ_16; 5243283b4a9bSStephen M. Cameron cdb[1] = 0; 5244283b4a9bSStephen M. Cameron cdb[2] = (u8) (disk_block >> 56); 5245283b4a9bSStephen M. Cameron cdb[3] = (u8) (disk_block >> 48); 5246283b4a9bSStephen M. Cameron cdb[4] = (u8) (disk_block >> 40); 5247283b4a9bSStephen M. Cameron cdb[5] = (u8) (disk_block >> 32); 5248283b4a9bSStephen M. Cameron cdb[6] = (u8) (disk_block >> 24); 5249283b4a9bSStephen M. Cameron cdb[7] = (u8) (disk_block >> 16); 5250283b4a9bSStephen M. Cameron cdb[8] = (u8) (disk_block >> 8); 5251283b4a9bSStephen M. Cameron cdb[9] = (u8) (disk_block); 5252283b4a9bSStephen M. Cameron cdb[10] = (u8) (disk_block_cnt >> 24); 5253283b4a9bSStephen M. Cameron cdb[11] = (u8) (disk_block_cnt >> 16); 5254283b4a9bSStephen M. Cameron cdb[12] = (u8) (disk_block_cnt >> 8); 5255283b4a9bSStephen M. Cameron cdb[13] = (u8) (disk_block_cnt); 5256283b4a9bSStephen M. Cameron cdb[14] = 0; 5257283b4a9bSStephen M. Cameron cdb[15] = 0; 5258283b4a9bSStephen M. Cameron cdb_len = 16; 5259283b4a9bSStephen M. Cameron } else { 5260283b4a9bSStephen M. Cameron cdb[0] = is_write ? WRITE_10 : READ_10; 5261283b4a9bSStephen M. Cameron cdb[1] = 0; 5262283b4a9bSStephen M. Cameron cdb[2] = (u8) (disk_block >> 24); 5263283b4a9bSStephen M. Cameron cdb[3] = (u8) (disk_block >> 16); 5264283b4a9bSStephen M. Cameron cdb[4] = (u8) (disk_block >> 8); 5265283b4a9bSStephen M. Cameron cdb[5] = (u8) (disk_block); 5266283b4a9bSStephen M. Cameron cdb[6] = 0; 5267283b4a9bSStephen M. Cameron cdb[7] = (u8) (disk_block_cnt >> 8); 5268283b4a9bSStephen M. Cameron cdb[8] = (u8) (disk_block_cnt); 5269283b4a9bSStephen M. Cameron cdb[9] = 0; 5270283b4a9bSStephen M. Cameron cdb_len = 10; 5271283b4a9bSStephen M. Cameron } 5272283b4a9bSStephen M. Cameron return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len, 527303383736SDon Brace dev->scsi3addr, 527403383736SDon Brace dev->phys_disk[map_index]); 5275283b4a9bSStephen M. Cameron } 5276283b4a9bSStephen M. Cameron 527725163bd5SWebb Scales /* 527825163bd5SWebb Scales * Submit commands down the "normal" RAID stack path 527925163bd5SWebb Scales * All callers to hpsa_ciss_submit must check lockup_detected 528025163bd5SWebb Scales * beforehand, before (opt.) and after calling cmd_alloc 528125163bd5SWebb Scales */ 5282574f05d3SStephen Cameron static int hpsa_ciss_submit(struct ctlr_info *h, 5283574f05d3SStephen Cameron struct CommandList *c, struct scsi_cmnd *cmd, 5284574f05d3SStephen Cameron unsigned char scsi3addr[]) 5285edd16368SStephen M. Cameron { 5286edd16368SStephen M. Cameron cmd->host_scribble = (unsigned char *) c; 5287edd16368SStephen M. Cameron c->cmd_type = CMD_SCSI; 5288edd16368SStephen M. Cameron c->scsi_cmd = cmd; 5289edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; /* unused in simple mode */ 5290edd16368SStephen M. Cameron memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8); 5291f2405db8SDon Brace c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT)); 5292edd16368SStephen M. Cameron 5293edd16368SStephen M. Cameron /* Fill in the request block... */ 5294edd16368SStephen M. Cameron 5295edd16368SStephen M. Cameron c->Request.Timeout = 0; 5296edd16368SStephen M. Cameron BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB)); 5297edd16368SStephen M. Cameron c->Request.CDBLen = cmd->cmd_len; 5298edd16368SStephen M. Cameron memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len); 5299edd16368SStephen M. Cameron switch (cmd->sc_data_direction) { 5300edd16368SStephen M. Cameron case DMA_TO_DEVICE: 5301a505b86fSStephen M. Cameron c->Request.type_attr_dir = 5302a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE); 5303edd16368SStephen M. Cameron break; 5304edd16368SStephen M. Cameron case DMA_FROM_DEVICE: 5305a505b86fSStephen M. Cameron c->Request.type_attr_dir = 5306a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ); 5307edd16368SStephen M. Cameron break; 5308edd16368SStephen M. Cameron case DMA_NONE: 5309a505b86fSStephen M. Cameron c->Request.type_attr_dir = 5310a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE); 5311edd16368SStephen M. Cameron break; 5312edd16368SStephen M. Cameron case DMA_BIDIRECTIONAL: 5313edd16368SStephen M. Cameron /* This can happen if a buggy application does a scsi passthru 5314edd16368SStephen M. Cameron * and sets both inlen and outlen to non-zero. ( see 5315edd16368SStephen M. Cameron * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() ) 5316edd16368SStephen M. Cameron */ 5317edd16368SStephen M. Cameron 5318a505b86fSStephen M. Cameron c->Request.type_attr_dir = 5319a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD); 5320edd16368SStephen M. Cameron /* This is technically wrong, and hpsa controllers should 5321edd16368SStephen M. Cameron * reject it with CMD_INVALID, which is the most correct 5322edd16368SStephen M. Cameron * response, but non-fibre backends appear to let it 5323edd16368SStephen M. Cameron * slide by, and give the same results as if this field 5324edd16368SStephen M. Cameron * were set correctly. Either way is acceptable for 5325edd16368SStephen M. Cameron * our purposes here. 5326edd16368SStephen M. Cameron */ 5327edd16368SStephen M. Cameron 5328edd16368SStephen M. Cameron break; 5329edd16368SStephen M. Cameron 5330edd16368SStephen M. Cameron default: 5331edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "unknown data direction: %d\n", 5332edd16368SStephen M. Cameron cmd->sc_data_direction); 5333edd16368SStephen M. Cameron BUG(); 5334edd16368SStephen M. Cameron break; 5335edd16368SStephen M. Cameron } 5336edd16368SStephen M. Cameron 533733a2ffceSStephen M. Cameron if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */ 533873153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 5339edd16368SStephen M. Cameron return SCSI_MLQUEUE_HOST_BUSY; 5340edd16368SStephen M. Cameron } 5341edd16368SStephen M. Cameron enqueue_cmd_and_start_io(h, c); 5342edd16368SStephen M. Cameron /* the cmd'll come back via intr handler in complete_scsi_command() */ 5343edd16368SStephen M. Cameron return 0; 5344edd16368SStephen M. Cameron } 5345edd16368SStephen M. Cameron 5346360c73bdSStephen Cameron static void hpsa_cmd_init(struct ctlr_info *h, int index, 5347360c73bdSStephen Cameron struct CommandList *c) 5348360c73bdSStephen Cameron { 5349360c73bdSStephen Cameron dma_addr_t cmd_dma_handle, err_dma_handle; 5350360c73bdSStephen Cameron 5351360c73bdSStephen Cameron /* Zero out all of commandlist except the last field, refcount */ 5352360c73bdSStephen Cameron memset(c, 0, offsetof(struct CommandList, refcount)); 5353360c73bdSStephen Cameron c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT)); 5354360c73bdSStephen Cameron cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c); 5355360c73bdSStephen Cameron c->err_info = h->errinfo_pool + index; 5356360c73bdSStephen Cameron memset(c->err_info, 0, sizeof(*c->err_info)); 5357360c73bdSStephen Cameron err_dma_handle = h->errinfo_pool_dhandle 5358360c73bdSStephen Cameron + index * sizeof(*c->err_info); 5359360c73bdSStephen Cameron c->cmdindex = index; 5360360c73bdSStephen Cameron c->busaddr = (u32) cmd_dma_handle; 5361360c73bdSStephen Cameron c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle); 5362360c73bdSStephen Cameron c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info)); 5363360c73bdSStephen Cameron c->h = h; 5364a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_IDLE; 5365360c73bdSStephen Cameron } 5366360c73bdSStephen Cameron 5367360c73bdSStephen Cameron static void hpsa_preinitialize_commands(struct ctlr_info *h) 5368360c73bdSStephen Cameron { 5369360c73bdSStephen Cameron int i; 5370360c73bdSStephen Cameron 5371360c73bdSStephen Cameron for (i = 0; i < h->nr_cmds; i++) { 5372360c73bdSStephen Cameron struct CommandList *c = h->cmd_pool + i; 5373360c73bdSStephen Cameron 5374360c73bdSStephen Cameron hpsa_cmd_init(h, i, c); 5375360c73bdSStephen Cameron atomic_set(&c->refcount, 0); 5376360c73bdSStephen Cameron } 5377360c73bdSStephen Cameron } 5378360c73bdSStephen Cameron 5379360c73bdSStephen Cameron static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index, 5380360c73bdSStephen Cameron struct CommandList *c) 5381360c73bdSStephen Cameron { 5382360c73bdSStephen Cameron dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c); 5383360c73bdSStephen Cameron 538473153fe5SWebb Scales BUG_ON(c->cmdindex != index); 538573153fe5SWebb Scales 5386360c73bdSStephen Cameron memset(c->Request.CDB, 0, sizeof(c->Request.CDB)); 5387360c73bdSStephen Cameron memset(c->err_info, 0, sizeof(*c->err_info)); 5388360c73bdSStephen Cameron c->busaddr = (u32) cmd_dma_handle; 5389360c73bdSStephen Cameron } 5390360c73bdSStephen Cameron 5391592a0ad5SWebb Scales static int hpsa_ioaccel_submit(struct ctlr_info *h, 5392592a0ad5SWebb Scales struct CommandList *c, struct scsi_cmnd *cmd, 5393592a0ad5SWebb Scales unsigned char *scsi3addr) 5394592a0ad5SWebb Scales { 5395592a0ad5SWebb Scales struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 5396592a0ad5SWebb Scales int rc = IO_ACCEL_INELIGIBLE; 5397592a0ad5SWebb Scales 539845e596cdSDon Brace if (!dev) 539945e596cdSDon Brace return SCSI_MLQUEUE_HOST_BUSY; 540045e596cdSDon Brace 5401592a0ad5SWebb Scales cmd->host_scribble = (unsigned char *) c; 5402592a0ad5SWebb Scales 5403592a0ad5SWebb Scales if (dev->offload_enabled) { 5404592a0ad5SWebb Scales hpsa_cmd_init(h, c->cmdindex, c); 5405592a0ad5SWebb Scales c->cmd_type = CMD_SCSI; 5406592a0ad5SWebb Scales c->scsi_cmd = cmd; 5407592a0ad5SWebb Scales rc = hpsa_scsi_ioaccel_raid_map(h, c); 5408592a0ad5SWebb Scales if (rc < 0) /* scsi_dma_map failed. */ 5409592a0ad5SWebb Scales rc = SCSI_MLQUEUE_HOST_BUSY; 5410a3144e0bSJoe Handzik } else if (dev->hba_ioaccel_enabled) { 5411592a0ad5SWebb Scales hpsa_cmd_init(h, c->cmdindex, c); 5412592a0ad5SWebb Scales c->cmd_type = CMD_SCSI; 5413592a0ad5SWebb Scales c->scsi_cmd = cmd; 5414592a0ad5SWebb Scales rc = hpsa_scsi_ioaccel_direct_map(h, c); 5415592a0ad5SWebb Scales if (rc < 0) /* scsi_dma_map failed. */ 5416592a0ad5SWebb Scales rc = SCSI_MLQUEUE_HOST_BUSY; 5417592a0ad5SWebb Scales } 5418592a0ad5SWebb Scales return rc; 5419592a0ad5SWebb Scales } 5420592a0ad5SWebb Scales 5421080ef1ccSDon Brace static void hpsa_command_resubmit_worker(struct work_struct *work) 5422080ef1ccSDon Brace { 5423080ef1ccSDon Brace struct scsi_cmnd *cmd; 5424080ef1ccSDon Brace struct hpsa_scsi_dev_t *dev; 54258a0ff92cSWebb Scales struct CommandList *c = container_of(work, struct CommandList, work); 5426080ef1ccSDon Brace 5427080ef1ccSDon Brace cmd = c->scsi_cmd; 5428080ef1ccSDon Brace dev = cmd->device->hostdata; 5429080ef1ccSDon Brace if (!dev) { 5430080ef1ccSDon Brace cmd->result = DID_NO_CONNECT << 16; 54318a0ff92cSWebb Scales return hpsa_cmd_free_and_done(c->h, c, cmd); 5432080ef1ccSDon Brace } 5433d604f533SWebb Scales if (c->reset_pending) 5434d604f533SWebb Scales return hpsa_cmd_resolve_and_free(c->h, c); 5435a58e7e53SWebb Scales if (c->abort_pending) 5436a58e7e53SWebb Scales return hpsa_cmd_abort_and_free(c->h, c, cmd); 5437592a0ad5SWebb Scales if (c->cmd_type == CMD_IOACCEL2) { 5438592a0ad5SWebb Scales struct ctlr_info *h = c->h; 5439592a0ad5SWebb Scales struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 5440592a0ad5SWebb Scales int rc; 5441592a0ad5SWebb Scales 5442592a0ad5SWebb Scales if (c2->error_data.serv_response == 5443592a0ad5SWebb Scales IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL) { 5444592a0ad5SWebb Scales rc = hpsa_ioaccel_submit(h, c, cmd, dev->scsi3addr); 5445592a0ad5SWebb Scales if (rc == 0) 5446592a0ad5SWebb Scales return; 5447592a0ad5SWebb Scales if (rc == SCSI_MLQUEUE_HOST_BUSY) { 5448592a0ad5SWebb Scales /* 5449592a0ad5SWebb Scales * If we get here, it means dma mapping failed. 5450592a0ad5SWebb Scales * Try again via scsi mid layer, which will 5451592a0ad5SWebb Scales * then get SCSI_MLQUEUE_HOST_BUSY. 5452592a0ad5SWebb Scales */ 5453592a0ad5SWebb Scales cmd->result = DID_IMM_RETRY << 16; 54548a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, c, cmd); 5455592a0ad5SWebb Scales } 5456592a0ad5SWebb Scales /* else, fall thru and resubmit down CISS path */ 5457592a0ad5SWebb Scales } 5458592a0ad5SWebb Scales } 5459360c73bdSStephen Cameron hpsa_cmd_partial_init(c->h, c->cmdindex, c); 5460080ef1ccSDon Brace if (hpsa_ciss_submit(c->h, c, cmd, dev->scsi3addr)) { 5461080ef1ccSDon Brace /* 5462080ef1ccSDon Brace * If we get here, it means dma mapping failed. Try 5463080ef1ccSDon Brace * again via scsi mid layer, which will then get 5464080ef1ccSDon Brace * SCSI_MLQUEUE_HOST_BUSY. 5465592a0ad5SWebb Scales * 5466592a0ad5SWebb Scales * hpsa_ciss_submit will have already freed c 5467592a0ad5SWebb Scales * if it encountered a dma mapping failure. 5468080ef1ccSDon Brace */ 5469080ef1ccSDon Brace cmd->result = DID_IMM_RETRY << 16; 5470080ef1ccSDon Brace cmd->scsi_done(cmd); 5471080ef1ccSDon Brace } 5472080ef1ccSDon Brace } 5473080ef1ccSDon Brace 5474574f05d3SStephen Cameron /* Running in struct Scsi_Host->host_lock less mode */ 5475574f05d3SStephen Cameron static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd) 5476574f05d3SStephen Cameron { 5477574f05d3SStephen Cameron struct ctlr_info *h; 5478574f05d3SStephen Cameron struct hpsa_scsi_dev_t *dev; 5479574f05d3SStephen Cameron unsigned char scsi3addr[8]; 5480574f05d3SStephen Cameron struct CommandList *c; 5481574f05d3SStephen Cameron int rc = 0; 5482574f05d3SStephen Cameron 5483574f05d3SStephen Cameron /* Get the ptr to our adapter structure out of cmd->host. */ 5484574f05d3SStephen Cameron h = sdev_to_hba(cmd->device); 548573153fe5SWebb Scales 548673153fe5SWebb Scales BUG_ON(cmd->request->tag < 0); 548773153fe5SWebb Scales 5488574f05d3SStephen Cameron dev = cmd->device->hostdata; 5489574f05d3SStephen Cameron if (!dev) { 5490ba74fdc4SDon Brace cmd->result = NOT_READY << 16; /* host byte */ 5491ba74fdc4SDon Brace cmd->scsi_done(cmd); 5492ba74fdc4SDon Brace return 0; 5493ba74fdc4SDon Brace } 5494ba74fdc4SDon Brace 5495ba74fdc4SDon Brace if (dev->removed) { 5496574f05d3SStephen Cameron cmd->result = DID_NO_CONNECT << 16; 5497574f05d3SStephen Cameron cmd->scsi_done(cmd); 5498574f05d3SStephen Cameron return 0; 5499574f05d3SStephen Cameron } 550073153fe5SWebb Scales 5501574f05d3SStephen Cameron memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr)); 5502574f05d3SStephen Cameron 5503574f05d3SStephen Cameron if (unlikely(lockup_detected(h))) { 550425163bd5SWebb Scales cmd->result = DID_NO_CONNECT << 16; 5505574f05d3SStephen Cameron cmd->scsi_done(cmd); 5506574f05d3SStephen Cameron return 0; 5507574f05d3SStephen Cameron } 550873153fe5SWebb Scales c = cmd_tagged_alloc(h, cmd); 5509574f05d3SStephen Cameron 5510407863cbSStephen Cameron /* 5511407863cbSStephen Cameron * Call alternate submit routine for I/O accelerated commands. 5512574f05d3SStephen Cameron * Retries always go down the normal I/O path. 5513574f05d3SStephen Cameron */ 5514574f05d3SStephen Cameron if (likely(cmd->retries == 0 && 5515574f05d3SStephen Cameron cmd->request->cmd_type == REQ_TYPE_FS && 5516574f05d3SStephen Cameron h->acciopath_status)) { 5517592a0ad5SWebb Scales rc = hpsa_ioaccel_submit(h, c, cmd, scsi3addr); 5518574f05d3SStephen Cameron if (rc == 0) 5519592a0ad5SWebb Scales return 0; 5520592a0ad5SWebb Scales if (rc == SCSI_MLQUEUE_HOST_BUSY) { 552173153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 5522574f05d3SStephen Cameron return SCSI_MLQUEUE_HOST_BUSY; 5523574f05d3SStephen Cameron } 5524574f05d3SStephen Cameron } 5525574f05d3SStephen Cameron return hpsa_ciss_submit(h, c, cmd, scsi3addr); 5526574f05d3SStephen Cameron } 5527574f05d3SStephen Cameron 55288ebc9248SWebb Scales static void hpsa_scan_complete(struct ctlr_info *h) 55295f389360SStephen M. Cameron { 55305f389360SStephen M. Cameron unsigned long flags; 55315f389360SStephen M. Cameron 55325f389360SStephen M. Cameron spin_lock_irqsave(&h->scan_lock, flags); 55335f389360SStephen M. Cameron h->scan_finished = 1; 55345f389360SStephen M. Cameron wake_up_all(&h->scan_wait_queue); 55355f389360SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 55365f389360SStephen M. Cameron } 55375f389360SStephen M. Cameron 5538a08a8471SStephen M. Cameron static void hpsa_scan_start(struct Scsi_Host *sh) 5539a08a8471SStephen M. Cameron { 5540a08a8471SStephen M. Cameron struct ctlr_info *h = shost_to_hba(sh); 5541a08a8471SStephen M. Cameron unsigned long flags; 5542a08a8471SStephen M. Cameron 55438ebc9248SWebb Scales /* 55448ebc9248SWebb Scales * Don't let rescans be initiated on a controller known to be locked 55458ebc9248SWebb Scales * up. If the controller locks up *during* a rescan, that thread is 55468ebc9248SWebb Scales * probably hosed, but at least we can prevent new rescan threads from 55478ebc9248SWebb Scales * piling up on a locked up controller. 55488ebc9248SWebb Scales */ 55498ebc9248SWebb Scales if (unlikely(lockup_detected(h))) 55508ebc9248SWebb Scales return hpsa_scan_complete(h); 55515f389360SStephen M. Cameron 5552a08a8471SStephen M. Cameron /* wait until any scan already in progress is finished. */ 5553a08a8471SStephen M. Cameron while (1) { 5554a08a8471SStephen M. Cameron spin_lock_irqsave(&h->scan_lock, flags); 5555a08a8471SStephen M. Cameron if (h->scan_finished) 5556a08a8471SStephen M. Cameron break; 5557a08a8471SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 5558a08a8471SStephen M. Cameron wait_event(h->scan_wait_queue, h->scan_finished); 5559a08a8471SStephen M. Cameron /* Note: We don't need to worry about a race between this 5560a08a8471SStephen M. Cameron * thread and driver unload because the midlayer will 5561a08a8471SStephen M. Cameron * have incremented the reference count, so unload won't 5562a08a8471SStephen M. Cameron * happen if we're in here. 5563a08a8471SStephen M. Cameron */ 5564a08a8471SStephen M. Cameron } 5565a08a8471SStephen M. Cameron h->scan_finished = 0; /* mark scan as in progress */ 5566a08a8471SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 5567a08a8471SStephen M. Cameron 55688ebc9248SWebb Scales if (unlikely(lockup_detected(h))) 55698ebc9248SWebb Scales return hpsa_scan_complete(h); 55705f389360SStephen M. Cameron 5571*bfd7546cSDon Brace /* 5572*bfd7546cSDon Brace * Do the scan after a reset completion 5573*bfd7546cSDon Brace */ 5574*bfd7546cSDon Brace if (h->reset_in_progress) { 5575*bfd7546cSDon Brace h->drv_req_rescan = 1; 5576*bfd7546cSDon Brace return; 5577*bfd7546cSDon Brace } 5578*bfd7546cSDon Brace 55798aa60681SDon Brace hpsa_update_scsi_devices(h); 5580a08a8471SStephen M. Cameron 55818ebc9248SWebb Scales hpsa_scan_complete(h); 5582a08a8471SStephen M. Cameron } 5583a08a8471SStephen M. Cameron 55847c0a0229SDon Brace static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth) 55857c0a0229SDon Brace { 558603383736SDon Brace struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata; 558703383736SDon Brace 558803383736SDon Brace if (!logical_drive) 558903383736SDon Brace return -ENODEV; 55907c0a0229SDon Brace 55917c0a0229SDon Brace if (qdepth < 1) 55927c0a0229SDon Brace qdepth = 1; 559303383736SDon Brace else if (qdepth > logical_drive->queue_depth) 559403383736SDon Brace qdepth = logical_drive->queue_depth; 559503383736SDon Brace 559603383736SDon Brace return scsi_change_queue_depth(sdev, qdepth); 55977c0a0229SDon Brace } 55987c0a0229SDon Brace 5599a08a8471SStephen M. Cameron static int hpsa_scan_finished(struct Scsi_Host *sh, 5600a08a8471SStephen M. Cameron unsigned long elapsed_time) 5601a08a8471SStephen M. Cameron { 5602a08a8471SStephen M. Cameron struct ctlr_info *h = shost_to_hba(sh); 5603a08a8471SStephen M. Cameron unsigned long flags; 5604a08a8471SStephen M. Cameron int finished; 5605a08a8471SStephen M. Cameron 5606a08a8471SStephen M. Cameron spin_lock_irqsave(&h->scan_lock, flags); 5607a08a8471SStephen M. Cameron finished = h->scan_finished; 5608a08a8471SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 5609a08a8471SStephen M. Cameron return finished; 5610a08a8471SStephen M. Cameron } 5611a08a8471SStephen M. Cameron 56122946e82bSRobert Elliott static int hpsa_scsi_host_alloc(struct ctlr_info *h) 5613edd16368SStephen M. Cameron { 5614b705690dSStephen M. Cameron struct Scsi_Host *sh; 5615edd16368SStephen M. Cameron 5616b705690dSStephen M. Cameron sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h)); 56172946e82bSRobert Elliott if (sh == NULL) { 56182946e82bSRobert Elliott dev_err(&h->pdev->dev, "scsi_host_alloc failed\n"); 56192946e82bSRobert Elliott return -ENOMEM; 56202946e82bSRobert Elliott } 5621b705690dSStephen M. Cameron 5622b705690dSStephen M. Cameron sh->io_port = 0; 5623b705690dSStephen M. Cameron sh->n_io_port = 0; 5624b705690dSStephen M. Cameron sh->this_id = -1; 5625b705690dSStephen M. Cameron sh->max_channel = 3; 5626b705690dSStephen M. Cameron sh->max_cmd_len = MAX_COMMAND_SIZE; 5627b705690dSStephen M. Cameron sh->max_lun = HPSA_MAX_LUN; 5628b705690dSStephen M. Cameron sh->max_id = HPSA_MAX_LUN; 562941ce4c35SStephen Cameron sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS; 5630d54c5c24SStephen Cameron sh->cmd_per_lun = sh->can_queue; 5631b705690dSStephen M. Cameron sh->sg_tablesize = h->maxsgentries; 5632d04e62b9SKevin Barnett sh->transportt = hpsa_sas_transport_template; 5633b705690dSStephen M. Cameron sh->hostdata[0] = (unsigned long) h; 5634bc2bb154SChristoph Hellwig sh->irq = pci_irq_vector(h->pdev, 0); 5635b705690dSStephen M. Cameron sh->unique_id = sh->irq; 563664d513acSChristoph Hellwig 56372946e82bSRobert Elliott h->scsi_host = sh; 56382946e82bSRobert Elliott return 0; 56392946e82bSRobert Elliott } 56402946e82bSRobert Elliott 56412946e82bSRobert Elliott static int hpsa_scsi_add_host(struct ctlr_info *h) 56422946e82bSRobert Elliott { 56432946e82bSRobert Elliott int rv; 56442946e82bSRobert Elliott 56452946e82bSRobert Elliott rv = scsi_add_host(h->scsi_host, &h->pdev->dev); 56462946e82bSRobert Elliott if (rv) { 56472946e82bSRobert Elliott dev_err(&h->pdev->dev, "scsi_add_host failed\n"); 56482946e82bSRobert Elliott return rv; 56492946e82bSRobert Elliott } 56502946e82bSRobert Elliott scsi_scan_host(h->scsi_host); 56512946e82bSRobert Elliott return 0; 5652edd16368SStephen M. Cameron } 5653edd16368SStephen M. Cameron 5654b69324ffSWebb Scales /* 565573153fe5SWebb Scales * The block layer has already gone to the trouble of picking out a unique, 565673153fe5SWebb Scales * small-integer tag for this request. We use an offset from that value as 565773153fe5SWebb Scales * an index to select our command block. (The offset allows us to reserve the 565873153fe5SWebb Scales * low-numbered entries for our own uses.) 565973153fe5SWebb Scales */ 566073153fe5SWebb Scales static int hpsa_get_cmd_index(struct scsi_cmnd *scmd) 566173153fe5SWebb Scales { 566273153fe5SWebb Scales int idx = scmd->request->tag; 566373153fe5SWebb Scales 566473153fe5SWebb Scales if (idx < 0) 566573153fe5SWebb Scales return idx; 566673153fe5SWebb Scales 566773153fe5SWebb Scales /* Offset to leave space for internal cmds. */ 566873153fe5SWebb Scales return idx += HPSA_NRESERVED_CMDS; 566973153fe5SWebb Scales } 567073153fe5SWebb Scales 567173153fe5SWebb Scales /* 5672b69324ffSWebb Scales * Send a TEST_UNIT_READY command to the specified LUN using the specified 5673b69324ffSWebb Scales * reply queue; returns zero if the unit is ready, and non-zero otherwise. 5674b69324ffSWebb Scales */ 5675b69324ffSWebb Scales static int hpsa_send_test_unit_ready(struct ctlr_info *h, 5676b69324ffSWebb Scales struct CommandList *c, unsigned char lunaddr[], 5677b69324ffSWebb Scales int reply_queue) 5678edd16368SStephen M. Cameron { 56798919358eSTomas Henzl int rc; 5680edd16368SStephen M. Cameron 5681a2dac136SStephen M. Cameron /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */ 5682a2dac136SStephen M. Cameron (void) fill_cmd(c, TEST_UNIT_READY, h, 5683a2dac136SStephen M. Cameron NULL, 0, 0, lunaddr, TYPE_CMD); 5684c448ecfaSDon Brace rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 568525163bd5SWebb Scales if (rc) 5686b69324ffSWebb Scales return rc; 5687edd16368SStephen M. Cameron /* no unmap needed here because no data xfer. */ 5688edd16368SStephen M. Cameron 5689b69324ffSWebb Scales /* Check if the unit is already ready. */ 5690edd16368SStephen M. Cameron if (c->err_info->CommandStatus == CMD_SUCCESS) 5691b69324ffSWebb Scales return 0; 5692edd16368SStephen M. Cameron 5693b69324ffSWebb Scales /* 5694b69324ffSWebb Scales * The first command sent after reset will receive "unit attention" to 5695b69324ffSWebb Scales * indicate that the LUN has been reset...this is actually what we're 5696b69324ffSWebb Scales * looking for (but, success is good too). 5697b69324ffSWebb Scales */ 5698edd16368SStephen M. Cameron if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 5699edd16368SStephen M. Cameron c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION && 5700edd16368SStephen M. Cameron (c->err_info->SenseInfo[2] == NO_SENSE || 5701edd16368SStephen M. Cameron c->err_info->SenseInfo[2] == UNIT_ATTENTION)) 5702b69324ffSWebb Scales return 0; 5703b69324ffSWebb Scales 5704b69324ffSWebb Scales return 1; 5705b69324ffSWebb Scales } 5706b69324ffSWebb Scales 5707b69324ffSWebb Scales /* 5708b69324ffSWebb Scales * Wait for a TEST_UNIT_READY command to complete, retrying as necessary; 5709b69324ffSWebb Scales * returns zero when the unit is ready, and non-zero when giving up. 5710b69324ffSWebb Scales */ 5711b69324ffSWebb Scales static int hpsa_wait_for_test_unit_ready(struct ctlr_info *h, 5712b69324ffSWebb Scales struct CommandList *c, 5713b69324ffSWebb Scales unsigned char lunaddr[], int reply_queue) 5714b69324ffSWebb Scales { 5715b69324ffSWebb Scales int rc; 5716b69324ffSWebb Scales int count = 0; 5717b69324ffSWebb Scales int waittime = 1; /* seconds */ 5718b69324ffSWebb Scales 5719b69324ffSWebb Scales /* Send test unit ready until device ready, or give up. */ 5720b69324ffSWebb Scales for (count = 0; count < HPSA_TUR_RETRY_LIMIT; count++) { 5721b69324ffSWebb Scales 5722b69324ffSWebb Scales /* 5723b69324ffSWebb Scales * Wait for a bit. do this first, because if we send 5724b69324ffSWebb Scales * the TUR right away, the reset will just abort it. 5725b69324ffSWebb Scales */ 5726b69324ffSWebb Scales msleep(1000 * waittime); 5727b69324ffSWebb Scales 5728b69324ffSWebb Scales rc = hpsa_send_test_unit_ready(h, c, lunaddr, reply_queue); 5729b69324ffSWebb Scales if (!rc) 5730edd16368SStephen M. Cameron break; 5731b69324ffSWebb Scales 5732b69324ffSWebb Scales /* Increase wait time with each try, up to a point. */ 5733b69324ffSWebb Scales if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS) 5734b69324ffSWebb Scales waittime *= 2; 5735b69324ffSWebb Scales 5736b69324ffSWebb Scales dev_warn(&h->pdev->dev, 5737b69324ffSWebb Scales "waiting %d secs for device to become ready.\n", 5738b69324ffSWebb Scales waittime); 5739b69324ffSWebb Scales } 5740b69324ffSWebb Scales 5741b69324ffSWebb Scales return rc; 5742b69324ffSWebb Scales } 5743b69324ffSWebb Scales 5744b69324ffSWebb Scales static int wait_for_device_to_become_ready(struct ctlr_info *h, 5745b69324ffSWebb Scales unsigned char lunaddr[], 5746b69324ffSWebb Scales int reply_queue) 5747b69324ffSWebb Scales { 5748b69324ffSWebb Scales int first_queue; 5749b69324ffSWebb Scales int last_queue; 5750b69324ffSWebb Scales int rq; 5751b69324ffSWebb Scales int rc = 0; 5752b69324ffSWebb Scales struct CommandList *c; 5753b69324ffSWebb Scales 5754b69324ffSWebb Scales c = cmd_alloc(h); 5755b69324ffSWebb Scales 5756b69324ffSWebb Scales /* 5757b69324ffSWebb Scales * If no specific reply queue was requested, then send the TUR 5758b69324ffSWebb Scales * repeatedly, requesting a reply on each reply queue; otherwise execute 5759b69324ffSWebb Scales * the loop exactly once using only the specified queue. 5760b69324ffSWebb Scales */ 5761b69324ffSWebb Scales if (reply_queue == DEFAULT_REPLY_QUEUE) { 5762b69324ffSWebb Scales first_queue = 0; 5763b69324ffSWebb Scales last_queue = h->nreply_queues - 1; 5764b69324ffSWebb Scales } else { 5765b69324ffSWebb Scales first_queue = reply_queue; 5766b69324ffSWebb Scales last_queue = reply_queue; 5767b69324ffSWebb Scales } 5768b69324ffSWebb Scales 5769b69324ffSWebb Scales for (rq = first_queue; rq <= last_queue; rq++) { 5770b69324ffSWebb Scales rc = hpsa_wait_for_test_unit_ready(h, c, lunaddr, rq); 5771b69324ffSWebb Scales if (rc) 5772b69324ffSWebb Scales break; 5773edd16368SStephen M. Cameron } 5774edd16368SStephen M. Cameron 5775edd16368SStephen M. Cameron if (rc) 5776edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "giving up on device.\n"); 5777edd16368SStephen M. Cameron else 5778edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "device is ready.\n"); 5779edd16368SStephen M. Cameron 578045fcb86eSStephen Cameron cmd_free(h, c); 5781edd16368SStephen M. Cameron return rc; 5782edd16368SStephen M. Cameron } 5783edd16368SStephen M. Cameron 5784edd16368SStephen M. Cameron /* Need at least one of these error handlers to keep ../scsi/hosts.c from 5785edd16368SStephen M. Cameron * complaining. Doing a host- or bus-reset can't do anything good here. 5786edd16368SStephen M. Cameron */ 5787edd16368SStephen M. Cameron static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd) 5788edd16368SStephen M. Cameron { 5789edd16368SStephen M. Cameron int rc; 5790edd16368SStephen M. Cameron struct ctlr_info *h; 5791edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *dev; 57920b9b7b6eSScott Teel u8 reset_type; 57932dc127bbSDan Carpenter char msg[48]; 5794edd16368SStephen M. Cameron 5795edd16368SStephen M. Cameron /* find the controller to which the command to be aborted was sent */ 5796edd16368SStephen M. Cameron h = sdev_to_hba(scsicmd->device); 5797edd16368SStephen M. Cameron if (h == NULL) /* paranoia */ 5798edd16368SStephen M. Cameron return FAILED; 5799e345893bSDon Brace 5800e345893bSDon Brace if (lockup_detected(h)) 5801e345893bSDon Brace return FAILED; 5802e345893bSDon Brace 5803edd16368SStephen M. Cameron dev = scsicmd->device->hostdata; 5804edd16368SStephen M. Cameron if (!dev) { 5805d604f533SWebb Scales dev_err(&h->pdev->dev, "%s: device lookup failed\n", __func__); 5806edd16368SStephen M. Cameron return FAILED; 5807edd16368SStephen M. Cameron } 580825163bd5SWebb Scales 580925163bd5SWebb Scales /* if controller locked up, we can guarantee command won't complete */ 581025163bd5SWebb Scales if (lockup_detected(h)) { 58112dc127bbSDan Carpenter snprintf(msg, sizeof(msg), 58122dc127bbSDan Carpenter "cmd %d RESET FAILED, lockup detected", 581373153fe5SWebb Scales hpsa_get_cmd_index(scsicmd)); 581473153fe5SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 581525163bd5SWebb Scales return FAILED; 581625163bd5SWebb Scales } 581725163bd5SWebb Scales 581825163bd5SWebb Scales /* this reset request might be the result of a lockup; check */ 581925163bd5SWebb Scales if (detect_controller_lockup(h)) { 58202dc127bbSDan Carpenter snprintf(msg, sizeof(msg), 58212dc127bbSDan Carpenter "cmd %d RESET FAILED, new lockup detected", 582273153fe5SWebb Scales hpsa_get_cmd_index(scsicmd)); 582373153fe5SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 582425163bd5SWebb Scales return FAILED; 582525163bd5SWebb Scales } 582625163bd5SWebb Scales 5827d604f533SWebb Scales /* Do not attempt on controller */ 5828d604f533SWebb Scales if (is_hba_lunid(dev->scsi3addr)) 5829d604f533SWebb Scales return SUCCESS; 5830d604f533SWebb Scales 58310b9b7b6eSScott Teel if (is_logical_dev_addr_mode(dev->scsi3addr)) 58320b9b7b6eSScott Teel reset_type = HPSA_DEVICE_RESET_MSG; 58330b9b7b6eSScott Teel else 58340b9b7b6eSScott Teel reset_type = HPSA_PHYS_TARGET_RESET; 58350b9b7b6eSScott Teel 58360b9b7b6eSScott Teel sprintf(msg, "resetting %s", 58370b9b7b6eSScott Teel reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical "); 58380b9b7b6eSScott Teel hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 583925163bd5SWebb Scales 5840da03ded0SDon Brace h->reset_in_progress = 1; 5841d416b0c7SStephen M. Cameron 5842edd16368SStephen M. Cameron /* send a reset to the SCSI LUN which the command was sent to */ 58430b9b7b6eSScott Teel rc = hpsa_do_reset(h, dev, dev->scsi3addr, reset_type, 584425163bd5SWebb Scales DEFAULT_REPLY_QUEUE); 58450b9b7b6eSScott Teel sprintf(msg, "reset %s %s", 58460b9b7b6eSScott Teel reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ", 58472dc127bbSDan Carpenter rc == 0 ? "completed successfully" : "failed"); 5848d604f533SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 5849da03ded0SDon Brace h->reset_in_progress = 0; 5850d604f533SWebb Scales return rc == 0 ? SUCCESS : FAILED; 5851edd16368SStephen M. Cameron } 5852edd16368SStephen M. Cameron 58536cba3f19SStephen M. Cameron static void swizzle_abort_tag(u8 *tag) 58546cba3f19SStephen M. Cameron { 58556cba3f19SStephen M. Cameron u8 original_tag[8]; 58566cba3f19SStephen M. Cameron 58576cba3f19SStephen M. Cameron memcpy(original_tag, tag, 8); 58586cba3f19SStephen M. Cameron tag[0] = original_tag[3]; 58596cba3f19SStephen M. Cameron tag[1] = original_tag[2]; 58606cba3f19SStephen M. Cameron tag[2] = original_tag[1]; 58616cba3f19SStephen M. Cameron tag[3] = original_tag[0]; 58626cba3f19SStephen M. Cameron tag[4] = original_tag[7]; 58636cba3f19SStephen M. Cameron tag[5] = original_tag[6]; 58646cba3f19SStephen M. Cameron tag[6] = original_tag[5]; 58656cba3f19SStephen M. Cameron tag[7] = original_tag[4]; 58666cba3f19SStephen M. Cameron } 58676cba3f19SStephen M. Cameron 586817eb87d2SScott Teel static void hpsa_get_tag(struct ctlr_info *h, 58692b08b3e9SDon Brace struct CommandList *c, __le32 *taglower, __le32 *tagupper) 587017eb87d2SScott Teel { 58712b08b3e9SDon Brace u64 tag; 587217eb87d2SScott Teel if (c->cmd_type == CMD_IOACCEL1) { 587317eb87d2SScott Teel struct io_accel1_cmd *cm1 = (struct io_accel1_cmd *) 587417eb87d2SScott Teel &h->ioaccel_cmd_pool[c->cmdindex]; 58752b08b3e9SDon Brace tag = le64_to_cpu(cm1->tag); 58762b08b3e9SDon Brace *tagupper = cpu_to_le32(tag >> 32); 58772b08b3e9SDon Brace *taglower = cpu_to_le32(tag); 587854b6e9e9SScott Teel return; 587954b6e9e9SScott Teel } 588054b6e9e9SScott Teel if (c->cmd_type == CMD_IOACCEL2) { 588154b6e9e9SScott Teel struct io_accel2_cmd *cm2 = (struct io_accel2_cmd *) 588254b6e9e9SScott Teel &h->ioaccel2_cmd_pool[c->cmdindex]; 5883dd0e19f3SScott Teel /* upper tag not used in ioaccel2 mode */ 5884dd0e19f3SScott Teel memset(tagupper, 0, sizeof(*tagupper)); 5885dd0e19f3SScott Teel *taglower = cm2->Tag; 588654b6e9e9SScott Teel return; 588754b6e9e9SScott Teel } 58882b08b3e9SDon Brace tag = le64_to_cpu(c->Header.tag); 58892b08b3e9SDon Brace *tagupper = cpu_to_le32(tag >> 32); 58902b08b3e9SDon Brace *taglower = cpu_to_le32(tag); 589117eb87d2SScott Teel } 589254b6e9e9SScott Teel 589375167d2cSStephen M. Cameron static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr, 58949b5c48c2SStephen Cameron struct CommandList *abort, int reply_queue) 589575167d2cSStephen M. Cameron { 589675167d2cSStephen M. Cameron int rc = IO_OK; 589775167d2cSStephen M. Cameron struct CommandList *c; 589875167d2cSStephen M. Cameron struct ErrorInfo *ei; 58992b08b3e9SDon Brace __le32 tagupper, taglower; 590075167d2cSStephen M. Cameron 590145fcb86eSStephen Cameron c = cmd_alloc(h); 590275167d2cSStephen M. Cameron 5903a2dac136SStephen M. Cameron /* fill_cmd can't fail here, no buffer to map */ 59049b5c48c2SStephen Cameron (void) fill_cmd(c, HPSA_ABORT_MSG, h, &abort->Header.tag, 5905a2dac136SStephen M. Cameron 0, 0, scsi3addr, TYPE_MSG); 59069b5c48c2SStephen Cameron if (h->needs_abort_tags_swizzled) 59076cba3f19SStephen M. Cameron swizzle_abort_tag(&c->Request.CDB[4]); 5908c448ecfaSDon Brace (void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 590917eb87d2SScott Teel hpsa_get_tag(h, abort, &taglower, &tagupper); 591025163bd5SWebb Scales dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd(abort) completed.\n", 591117eb87d2SScott Teel __func__, tagupper, taglower); 591275167d2cSStephen M. Cameron /* no unmap needed here because no data xfer. */ 591375167d2cSStephen M. Cameron 591475167d2cSStephen M. Cameron ei = c->err_info; 591575167d2cSStephen M. Cameron switch (ei->CommandStatus) { 591675167d2cSStephen M. Cameron case CMD_SUCCESS: 591775167d2cSStephen M. Cameron break; 59189437ac43SStephen Cameron case CMD_TMF_STATUS: 59199437ac43SStephen Cameron rc = hpsa_evaluate_tmf_status(h, c); 59209437ac43SStephen Cameron break; 592175167d2cSStephen M. Cameron case CMD_UNABORTABLE: /* Very common, don't make noise. */ 592275167d2cSStephen M. Cameron rc = -1; 592375167d2cSStephen M. Cameron break; 592475167d2cSStephen M. Cameron default: 592575167d2cSStephen M. Cameron dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n", 592617eb87d2SScott Teel __func__, tagupper, taglower); 5927d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 592875167d2cSStephen M. Cameron rc = -1; 592975167d2cSStephen M. Cameron break; 593075167d2cSStephen M. Cameron } 593145fcb86eSStephen Cameron cmd_free(h, c); 5932dd0e19f3SScott Teel dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", 5933dd0e19f3SScott Teel __func__, tagupper, taglower); 593475167d2cSStephen M. Cameron return rc; 593575167d2cSStephen M. Cameron } 593675167d2cSStephen M. Cameron 59378be986ccSStephen Cameron static void setup_ioaccel2_abort_cmd(struct CommandList *c, struct ctlr_info *h, 59388be986ccSStephen Cameron struct CommandList *command_to_abort, int reply_queue) 59398be986ccSStephen Cameron { 59408be986ccSStephen Cameron struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 59418be986ccSStephen Cameron struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2; 59428be986ccSStephen Cameron struct io_accel2_cmd *c2a = 59438be986ccSStephen Cameron &h->ioaccel2_cmd_pool[command_to_abort->cmdindex]; 5944a58e7e53SWebb Scales struct scsi_cmnd *scmd = command_to_abort->scsi_cmd; 59458be986ccSStephen Cameron struct hpsa_scsi_dev_t *dev = scmd->device->hostdata; 59468be986ccSStephen Cameron 594745e596cdSDon Brace if (!dev) 594845e596cdSDon Brace return; 594945e596cdSDon Brace 59508be986ccSStephen Cameron /* 59518be986ccSStephen Cameron * We're overlaying struct hpsa_tmf_struct on top of something which 59528be986ccSStephen Cameron * was allocated as a struct io_accel2_cmd, so we better be sure it 59538be986ccSStephen Cameron * actually fits, and doesn't overrun the error info space. 59548be986ccSStephen Cameron */ 59558be986ccSStephen Cameron BUILD_BUG_ON(sizeof(struct hpsa_tmf_struct) > 59568be986ccSStephen Cameron sizeof(struct io_accel2_cmd)); 59578be986ccSStephen Cameron BUG_ON(offsetof(struct io_accel2_cmd, error_data) < 59588be986ccSStephen Cameron offsetof(struct hpsa_tmf_struct, error_len) + 59598be986ccSStephen Cameron sizeof(ac->error_len)); 59608be986ccSStephen Cameron 59618be986ccSStephen Cameron c->cmd_type = IOACCEL2_TMF; 5962a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 5963a58e7e53SWebb Scales 59648be986ccSStephen Cameron /* Adjust the DMA address to point to the accelerated command buffer */ 59658be986ccSStephen Cameron c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle + 59668be986ccSStephen Cameron (c->cmdindex * sizeof(struct io_accel2_cmd)); 59678be986ccSStephen Cameron BUG_ON(c->busaddr & 0x0000007F); 59688be986ccSStephen Cameron 59698be986ccSStephen Cameron memset(ac, 0, sizeof(*c2)); /* yes this is correct */ 59708be986ccSStephen Cameron ac->iu_type = IOACCEL2_IU_TMF_TYPE; 59718be986ccSStephen Cameron ac->reply_queue = reply_queue; 59728be986ccSStephen Cameron ac->tmf = IOACCEL2_TMF_ABORT; 59738be986ccSStephen Cameron ac->it_nexus = cpu_to_le32(dev->ioaccel_handle); 59748be986ccSStephen Cameron memset(ac->lun_id, 0, sizeof(ac->lun_id)); 59758be986ccSStephen Cameron ac->tag = cpu_to_le64(c->cmdindex << DIRECT_LOOKUP_SHIFT); 59768be986ccSStephen Cameron ac->abort_tag = cpu_to_le64(le32_to_cpu(c2a->Tag)); 59778be986ccSStephen Cameron ac->error_ptr = cpu_to_le64(c->busaddr + 59788be986ccSStephen Cameron offsetof(struct io_accel2_cmd, error_data)); 59798be986ccSStephen Cameron ac->error_len = cpu_to_le32(sizeof(c2->error_data)); 59808be986ccSStephen Cameron } 59818be986ccSStephen Cameron 598254b6e9e9SScott Teel /* ioaccel2 path firmware cannot handle abort task requests. 598354b6e9e9SScott Teel * Change abort requests to physical target reset, and send to the 598454b6e9e9SScott Teel * address of the physical disk used for the ioaccel 2 command. 598554b6e9e9SScott Teel * Return 0 on success (IO_OK) 598654b6e9e9SScott Teel * -1 on failure 598754b6e9e9SScott Teel */ 598854b6e9e9SScott Teel 598954b6e9e9SScott Teel static int hpsa_send_reset_as_abort_ioaccel2(struct ctlr_info *h, 599025163bd5SWebb Scales unsigned char *scsi3addr, struct CommandList *abort, int reply_queue) 599154b6e9e9SScott Teel { 599254b6e9e9SScott Teel int rc = IO_OK; 599354b6e9e9SScott Teel struct scsi_cmnd *scmd; /* scsi command within request being aborted */ 599454b6e9e9SScott Teel struct hpsa_scsi_dev_t *dev; /* device to which scsi cmd was sent */ 599554b6e9e9SScott Teel unsigned char phys_scsi3addr[8]; /* addr of phys disk with volume */ 599654b6e9e9SScott Teel unsigned char *psa = &phys_scsi3addr[0]; 599754b6e9e9SScott Teel 599854b6e9e9SScott Teel /* Get a pointer to the hpsa logical device. */ 59997fa3030cSStephen Cameron scmd = abort->scsi_cmd; 600054b6e9e9SScott Teel dev = (struct hpsa_scsi_dev_t *)(scmd->device->hostdata); 600154b6e9e9SScott Teel if (dev == NULL) { 600254b6e9e9SScott Teel dev_warn(&h->pdev->dev, 600354b6e9e9SScott Teel "Cannot abort: no device pointer for command.\n"); 600454b6e9e9SScott Teel return -1; /* not abortable */ 600554b6e9e9SScott Teel } 600654b6e9e9SScott Teel 60072ba8bfc8SStephen M. Cameron if (h->raid_offload_debug > 0) 60082ba8bfc8SStephen M. Cameron dev_info(&h->pdev->dev, 60090d96ef5fSWebb Scales "scsi %d:%d:%d:%d %s scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 60102ba8bfc8SStephen M. Cameron h->scsi_host->host_no, dev->bus, dev->target, dev->lun, 60110d96ef5fSWebb Scales "Reset as abort", 60122ba8bfc8SStephen M. Cameron scsi3addr[0], scsi3addr[1], scsi3addr[2], scsi3addr[3], 60132ba8bfc8SStephen M. Cameron scsi3addr[4], scsi3addr[5], scsi3addr[6], scsi3addr[7]); 60142ba8bfc8SStephen M. Cameron 601554b6e9e9SScott Teel if (!dev->offload_enabled) { 601654b6e9e9SScott Teel dev_warn(&h->pdev->dev, 601754b6e9e9SScott Teel "Can't abort: device is not operating in HP SSD Smart Path mode.\n"); 601854b6e9e9SScott Teel return -1; /* not abortable */ 601954b6e9e9SScott Teel } 602054b6e9e9SScott Teel 602154b6e9e9SScott Teel /* Incoming scsi3addr is logical addr. We need physical disk addr. */ 602254b6e9e9SScott Teel if (!hpsa_get_pdisk_of_ioaccel2(h, abort, psa)) { 602354b6e9e9SScott Teel dev_warn(&h->pdev->dev, "Can't abort: Failed lookup of physical address.\n"); 602454b6e9e9SScott Teel return -1; /* not abortable */ 602554b6e9e9SScott Teel } 602654b6e9e9SScott Teel 602754b6e9e9SScott Teel /* send the reset */ 60282ba8bfc8SStephen M. Cameron if (h->raid_offload_debug > 0) 60292ba8bfc8SStephen M. Cameron dev_info(&h->pdev->dev, 60302ba8bfc8SStephen M. Cameron "Reset as abort: Resetting physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 60312ba8bfc8SStephen M. Cameron psa[0], psa[1], psa[2], psa[3], 60322ba8bfc8SStephen M. Cameron psa[4], psa[5], psa[6], psa[7]); 6033b32ece0fSDon Brace rc = hpsa_do_reset(h, dev, psa, HPSA_PHYS_TARGET_RESET, reply_queue); 603454b6e9e9SScott Teel if (rc != 0) { 603554b6e9e9SScott Teel dev_warn(&h->pdev->dev, 603654b6e9e9SScott Teel "Reset as abort: Failed on physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 603754b6e9e9SScott Teel psa[0], psa[1], psa[2], psa[3], 603854b6e9e9SScott Teel psa[4], psa[5], psa[6], psa[7]); 603954b6e9e9SScott Teel return rc; /* failed to reset */ 604054b6e9e9SScott Teel } 604154b6e9e9SScott Teel 604254b6e9e9SScott Teel /* wait for device to recover */ 6043b69324ffSWebb Scales if (wait_for_device_to_become_ready(h, psa, reply_queue) != 0) { 604454b6e9e9SScott Teel dev_warn(&h->pdev->dev, 604554b6e9e9SScott Teel "Reset as abort: Failed: Device never recovered from reset: 0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 604654b6e9e9SScott Teel psa[0], psa[1], psa[2], psa[3], 604754b6e9e9SScott Teel psa[4], psa[5], psa[6], psa[7]); 604854b6e9e9SScott Teel return -1; /* failed to recover */ 604954b6e9e9SScott Teel } 605054b6e9e9SScott Teel 605154b6e9e9SScott Teel /* device recovered */ 605254b6e9e9SScott Teel dev_info(&h->pdev->dev, 605354b6e9e9SScott Teel "Reset as abort: Device recovered from reset: scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 605454b6e9e9SScott Teel psa[0], psa[1], psa[2], psa[3], 605554b6e9e9SScott Teel psa[4], psa[5], psa[6], psa[7]); 605654b6e9e9SScott Teel 605754b6e9e9SScott Teel return rc; /* success */ 605854b6e9e9SScott Teel } 605954b6e9e9SScott Teel 60608be986ccSStephen Cameron static int hpsa_send_abort_ioaccel2(struct ctlr_info *h, 60618be986ccSStephen Cameron struct CommandList *abort, int reply_queue) 60628be986ccSStephen Cameron { 60638be986ccSStephen Cameron int rc = IO_OK; 60648be986ccSStephen Cameron struct CommandList *c; 60658be986ccSStephen Cameron __le32 taglower, tagupper; 60668be986ccSStephen Cameron struct hpsa_scsi_dev_t *dev; 60678be986ccSStephen Cameron struct io_accel2_cmd *c2; 60688be986ccSStephen Cameron 60698be986ccSStephen Cameron dev = abort->scsi_cmd->device->hostdata; 607045e596cdSDon Brace if (!dev) 607145e596cdSDon Brace return -1; 607245e596cdSDon Brace 60738be986ccSStephen Cameron if (!dev->offload_enabled && !dev->hba_ioaccel_enabled) 60748be986ccSStephen Cameron return -1; 60758be986ccSStephen Cameron 60768be986ccSStephen Cameron c = cmd_alloc(h); 60778be986ccSStephen Cameron setup_ioaccel2_abort_cmd(c, h, abort, reply_queue); 60788be986ccSStephen Cameron c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 6079c448ecfaSDon Brace (void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 60808be986ccSStephen Cameron hpsa_get_tag(h, abort, &taglower, &tagupper); 60818be986ccSStephen Cameron dev_dbg(&h->pdev->dev, 60828be986ccSStephen Cameron "%s: Tag:0x%08x:%08x: do_simple_cmd(ioaccel2 abort) completed.\n", 60838be986ccSStephen Cameron __func__, tagupper, taglower); 60848be986ccSStephen Cameron /* no unmap needed here because no data xfer. */ 60858be986ccSStephen Cameron 60868be986ccSStephen Cameron dev_dbg(&h->pdev->dev, 60878be986ccSStephen Cameron "%s: Tag:0x%08x:%08x: abort service response = 0x%02x.\n", 60888be986ccSStephen Cameron __func__, tagupper, taglower, c2->error_data.serv_response); 60898be986ccSStephen Cameron switch (c2->error_data.serv_response) { 60908be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE: 60918be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS: 60928be986ccSStephen Cameron rc = 0; 60938be986ccSStephen Cameron break; 60948be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_TMF_REJECTED: 60958be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_FAILURE: 60968be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN: 60978be986ccSStephen Cameron rc = -1; 60988be986ccSStephen Cameron break; 60998be986ccSStephen Cameron default: 61008be986ccSStephen Cameron dev_warn(&h->pdev->dev, 61018be986ccSStephen Cameron "%s: Tag:0x%08x:%08x: unknown abort service response 0x%02x\n", 61028be986ccSStephen Cameron __func__, tagupper, taglower, 61038be986ccSStephen Cameron c2->error_data.serv_response); 61048be986ccSStephen Cameron rc = -1; 61058be986ccSStephen Cameron } 61068be986ccSStephen Cameron cmd_free(h, c); 61078be986ccSStephen Cameron dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", __func__, 61088be986ccSStephen Cameron tagupper, taglower); 61098be986ccSStephen Cameron return rc; 61108be986ccSStephen Cameron } 61118be986ccSStephen Cameron 61126cba3f19SStephen M. Cameron static int hpsa_send_abort_both_ways(struct ctlr_info *h, 611339f3deb2SDon Brace struct hpsa_scsi_dev_t *dev, struct CommandList *abort, int reply_queue) 61146cba3f19SStephen M. Cameron { 61158be986ccSStephen Cameron /* 61168be986ccSStephen Cameron * ioccelerator mode 2 commands should be aborted via the 611754b6e9e9SScott Teel * accelerated path, since RAID path is unaware of these commands, 61188be986ccSStephen Cameron * but not all underlying firmware can handle abort TMF. 61198be986ccSStephen Cameron * Change abort to physical device reset when abort TMF is unsupported. 612054b6e9e9SScott Teel */ 61218be986ccSStephen Cameron if (abort->cmd_type == CMD_IOACCEL2) { 612239f3deb2SDon Brace if ((HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags) || 612339f3deb2SDon Brace dev->physical_device) 61248be986ccSStephen Cameron return hpsa_send_abort_ioaccel2(h, abort, 61258be986ccSStephen Cameron reply_queue); 61268be986ccSStephen Cameron else 612739f3deb2SDon Brace return hpsa_send_reset_as_abort_ioaccel2(h, 612839f3deb2SDon Brace dev->scsi3addr, 612925163bd5SWebb Scales abort, reply_queue); 61308be986ccSStephen Cameron } 613139f3deb2SDon Brace return hpsa_send_abort(h, dev->scsi3addr, abort, reply_queue); 613225163bd5SWebb Scales } 613325163bd5SWebb Scales 613425163bd5SWebb Scales /* Find out which reply queue a command was meant to return on */ 613525163bd5SWebb Scales static int hpsa_extract_reply_queue(struct ctlr_info *h, 613625163bd5SWebb Scales struct CommandList *c) 613725163bd5SWebb Scales { 613825163bd5SWebb Scales if (c->cmd_type == CMD_IOACCEL2) 613925163bd5SWebb Scales return h->ioaccel2_cmd_pool[c->cmdindex].reply_queue; 614025163bd5SWebb Scales return c->Header.ReplyQueue; 61416cba3f19SStephen M. Cameron } 61426cba3f19SStephen M. Cameron 61439b5c48c2SStephen Cameron /* 61449b5c48c2SStephen Cameron * Limit concurrency of abort commands to prevent 61459b5c48c2SStephen Cameron * over-subscription of commands 61469b5c48c2SStephen Cameron */ 61479b5c48c2SStephen Cameron static inline int wait_for_available_abort_cmd(struct ctlr_info *h) 61489b5c48c2SStephen Cameron { 61499b5c48c2SStephen Cameron #define ABORT_CMD_WAIT_MSECS 5000 61509b5c48c2SStephen Cameron return !wait_event_timeout(h->abort_cmd_wait_queue, 61519b5c48c2SStephen Cameron atomic_dec_if_positive(&h->abort_cmds_available) >= 0, 61529b5c48c2SStephen Cameron msecs_to_jiffies(ABORT_CMD_WAIT_MSECS)); 61539b5c48c2SStephen Cameron } 61549b5c48c2SStephen Cameron 615575167d2cSStephen M. Cameron /* Send an abort for the specified command. 615675167d2cSStephen M. Cameron * If the device and controller support it, 615775167d2cSStephen M. Cameron * send a task abort request. 615875167d2cSStephen M. Cameron */ 615975167d2cSStephen M. Cameron static int hpsa_eh_abort_handler(struct scsi_cmnd *sc) 616075167d2cSStephen M. Cameron { 616175167d2cSStephen M. Cameron 6162a58e7e53SWebb Scales int rc; 616375167d2cSStephen M. Cameron struct ctlr_info *h; 616475167d2cSStephen M. Cameron struct hpsa_scsi_dev_t *dev; 616575167d2cSStephen M. Cameron struct CommandList *abort; /* pointer to command to be aborted */ 616675167d2cSStephen M. Cameron struct scsi_cmnd *as; /* ptr to scsi cmd inside aborted command. */ 616775167d2cSStephen M. Cameron char msg[256]; /* For debug messaging. */ 616875167d2cSStephen M. Cameron int ml = 0; 61692b08b3e9SDon Brace __le32 tagupper, taglower; 617025163bd5SWebb Scales int refcount, reply_queue; 617125163bd5SWebb Scales 617225163bd5SWebb Scales if (sc == NULL) 617325163bd5SWebb Scales return FAILED; 617475167d2cSStephen M. Cameron 61759b5c48c2SStephen Cameron if (sc->device == NULL) 61769b5c48c2SStephen Cameron return FAILED; 61779b5c48c2SStephen Cameron 617875167d2cSStephen M. Cameron /* Find the controller of the command to be aborted */ 617975167d2cSStephen M. Cameron h = sdev_to_hba(sc->device); 61809b5c48c2SStephen Cameron if (h == NULL) 618175167d2cSStephen M. Cameron return FAILED; 618275167d2cSStephen M. Cameron 618325163bd5SWebb Scales /* Find the device of the command to be aborted */ 618425163bd5SWebb Scales dev = sc->device->hostdata; 618525163bd5SWebb Scales if (!dev) { 618625163bd5SWebb Scales dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n", 618725163bd5SWebb Scales msg); 6188e345893bSDon Brace return FAILED; 618925163bd5SWebb Scales } 619025163bd5SWebb Scales 619125163bd5SWebb Scales /* If controller locked up, we can guarantee command won't complete */ 619225163bd5SWebb Scales if (lockup_detected(h)) { 619325163bd5SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, 619425163bd5SWebb Scales "ABORT FAILED, lockup detected"); 619525163bd5SWebb Scales return FAILED; 619625163bd5SWebb Scales } 619725163bd5SWebb Scales 619825163bd5SWebb Scales /* This is a good time to check if controller lockup has occurred */ 619925163bd5SWebb Scales if (detect_controller_lockup(h)) { 620025163bd5SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, 620125163bd5SWebb Scales "ABORT FAILED, new lockup detected"); 620225163bd5SWebb Scales return FAILED; 620325163bd5SWebb Scales } 6204e345893bSDon Brace 620575167d2cSStephen M. Cameron /* Check that controller supports some kind of task abort */ 620675167d2cSStephen M. Cameron if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) && 620775167d2cSStephen M. Cameron !(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags)) 620875167d2cSStephen M. Cameron return FAILED; 620975167d2cSStephen M. Cameron 621075167d2cSStephen M. Cameron memset(msg, 0, sizeof(msg)); 62114b761557SRobert Elliott ml += sprintf(msg+ml, "scsi %d:%d:%d:%llu %s %p", 621275167d2cSStephen M. Cameron h->scsi_host->host_no, sc->device->channel, 62130d96ef5fSWebb Scales sc->device->id, sc->device->lun, 62144b761557SRobert Elliott "Aborting command", sc); 621575167d2cSStephen M. Cameron 621675167d2cSStephen M. Cameron /* Get SCSI command to be aborted */ 621775167d2cSStephen M. Cameron abort = (struct CommandList *) sc->host_scribble; 621875167d2cSStephen M. Cameron if (abort == NULL) { 6219281a7fd0SWebb Scales /* This can happen if the command already completed. */ 6220281a7fd0SWebb Scales return SUCCESS; 6221281a7fd0SWebb Scales } 6222281a7fd0SWebb Scales refcount = atomic_inc_return(&abort->refcount); 6223281a7fd0SWebb Scales if (refcount == 1) { /* Command is done already. */ 6224281a7fd0SWebb Scales cmd_free(h, abort); 6225281a7fd0SWebb Scales return SUCCESS; 622675167d2cSStephen M. Cameron } 62279b5c48c2SStephen Cameron 62289b5c48c2SStephen Cameron /* Don't bother trying the abort if we know it won't work. */ 62299b5c48c2SStephen Cameron if (abort->cmd_type != CMD_IOACCEL2 && 62309b5c48c2SStephen Cameron abort->cmd_type != CMD_IOACCEL1 && !dev->supports_aborts) { 62319b5c48c2SStephen Cameron cmd_free(h, abort); 62329b5c48c2SStephen Cameron return FAILED; 62339b5c48c2SStephen Cameron } 62349b5c48c2SStephen Cameron 6235a58e7e53SWebb Scales /* 6236a58e7e53SWebb Scales * Check that we're aborting the right command. 6237a58e7e53SWebb Scales * It's possible the CommandList already completed and got re-used. 6238a58e7e53SWebb Scales */ 6239a58e7e53SWebb Scales if (abort->scsi_cmd != sc) { 6240a58e7e53SWebb Scales cmd_free(h, abort); 6241a58e7e53SWebb Scales return SUCCESS; 6242a58e7e53SWebb Scales } 6243a58e7e53SWebb Scales 6244a58e7e53SWebb Scales abort->abort_pending = true; 624517eb87d2SScott Teel hpsa_get_tag(h, abort, &taglower, &tagupper); 624625163bd5SWebb Scales reply_queue = hpsa_extract_reply_queue(h, abort); 624717eb87d2SScott Teel ml += sprintf(msg+ml, "Tag:0x%08x:%08x ", tagupper, taglower); 62487fa3030cSStephen Cameron as = abort->scsi_cmd; 624975167d2cSStephen M. Cameron if (as != NULL) 62504b761557SRobert Elliott ml += sprintf(msg+ml, 62514b761557SRobert Elliott "CDBLen: %d CDB: 0x%02x%02x... SN: 0x%lx ", 62524b761557SRobert Elliott as->cmd_len, as->cmnd[0], as->cmnd[1], 62534b761557SRobert Elliott as->serial_number); 62544b761557SRobert Elliott dev_warn(&h->pdev->dev, "%s BEING SENT\n", msg); 62550d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, "Aborting command"); 62564b761557SRobert Elliott 625775167d2cSStephen M. Cameron /* 625875167d2cSStephen M. Cameron * Command is in flight, or possibly already completed 625975167d2cSStephen M. Cameron * by the firmware (but not to the scsi mid layer) but we can't 626075167d2cSStephen M. Cameron * distinguish which. Send the abort down. 626175167d2cSStephen M. Cameron */ 62629b5c48c2SStephen Cameron if (wait_for_available_abort_cmd(h)) { 62639b5c48c2SStephen Cameron dev_warn(&h->pdev->dev, 62644b761557SRobert Elliott "%s FAILED, timeout waiting for an abort command to become available.\n", 62654b761557SRobert Elliott msg); 62669b5c48c2SStephen Cameron cmd_free(h, abort); 62679b5c48c2SStephen Cameron return FAILED; 62689b5c48c2SStephen Cameron } 626939f3deb2SDon Brace rc = hpsa_send_abort_both_ways(h, dev, abort, reply_queue); 62709b5c48c2SStephen Cameron atomic_inc(&h->abort_cmds_available); 62719b5c48c2SStephen Cameron wake_up_all(&h->abort_cmd_wait_queue); 627275167d2cSStephen M. Cameron if (rc != 0) { 62734b761557SRobert Elliott dev_warn(&h->pdev->dev, "%s SENT, FAILED\n", msg); 62740d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, 62750d96ef5fSWebb Scales "FAILED to abort command"); 6276281a7fd0SWebb Scales cmd_free(h, abort); 627775167d2cSStephen M. Cameron return FAILED; 627875167d2cSStephen M. Cameron } 62794b761557SRobert Elliott dev_info(&h->pdev->dev, "%s SENT, SUCCESS\n", msg); 6280d604f533SWebb Scales wait_event(h->event_sync_wait_queue, 6281a58e7e53SWebb Scales abort->scsi_cmd != sc || lockup_detected(h)); 6282281a7fd0SWebb Scales cmd_free(h, abort); 6283a58e7e53SWebb Scales return !lockup_detected(h) ? SUCCESS : FAILED; 628475167d2cSStephen M. Cameron } 628575167d2cSStephen M. Cameron 6286edd16368SStephen M. Cameron /* 628773153fe5SWebb Scales * For operations with an associated SCSI command, a command block is allocated 628873153fe5SWebb Scales * at init, and managed by cmd_tagged_alloc() and cmd_tagged_free() using the 628973153fe5SWebb Scales * block request tag as an index into a table of entries. cmd_tagged_free() is 629073153fe5SWebb Scales * the complement, although cmd_free() may be called instead. 629173153fe5SWebb Scales */ 629273153fe5SWebb Scales static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h, 629373153fe5SWebb Scales struct scsi_cmnd *scmd) 629473153fe5SWebb Scales { 629573153fe5SWebb Scales int idx = hpsa_get_cmd_index(scmd); 629673153fe5SWebb Scales struct CommandList *c = h->cmd_pool + idx; 629773153fe5SWebb Scales 629873153fe5SWebb Scales if (idx < HPSA_NRESERVED_CMDS || idx >= h->nr_cmds) { 629973153fe5SWebb Scales dev_err(&h->pdev->dev, "Bad block tag: %d not in [%d..%d]\n", 630073153fe5SWebb Scales idx, HPSA_NRESERVED_CMDS, h->nr_cmds - 1); 630173153fe5SWebb Scales /* The index value comes from the block layer, so if it's out of 630273153fe5SWebb Scales * bounds, it's probably not our bug. 630373153fe5SWebb Scales */ 630473153fe5SWebb Scales BUG(); 630573153fe5SWebb Scales } 630673153fe5SWebb Scales 630773153fe5SWebb Scales atomic_inc(&c->refcount); 630873153fe5SWebb Scales if (unlikely(!hpsa_is_cmd_idle(c))) { 630973153fe5SWebb Scales /* 631073153fe5SWebb Scales * We expect that the SCSI layer will hand us a unique tag 631173153fe5SWebb Scales * value. Thus, there should never be a collision here between 631273153fe5SWebb Scales * two requests...because if the selected command isn't idle 631373153fe5SWebb Scales * then someone is going to be very disappointed. 631473153fe5SWebb Scales */ 631573153fe5SWebb Scales dev_err(&h->pdev->dev, 631673153fe5SWebb Scales "tag collision (tag=%d) in cmd_tagged_alloc().\n", 631773153fe5SWebb Scales idx); 631873153fe5SWebb Scales if (c->scsi_cmd != NULL) 631973153fe5SWebb Scales scsi_print_command(c->scsi_cmd); 632073153fe5SWebb Scales scsi_print_command(scmd); 632173153fe5SWebb Scales } 632273153fe5SWebb Scales 632373153fe5SWebb Scales hpsa_cmd_partial_init(h, idx, c); 632473153fe5SWebb Scales return c; 632573153fe5SWebb Scales } 632673153fe5SWebb Scales 632773153fe5SWebb Scales static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c) 632873153fe5SWebb Scales { 632973153fe5SWebb Scales /* 633073153fe5SWebb Scales * Release our reference to the block. We don't need to do anything 633173153fe5SWebb Scales * else to free it, because it is accessed by index. (There's no point 633273153fe5SWebb Scales * in checking the result of the decrement, since we cannot guarantee 633373153fe5SWebb Scales * that there isn't a concurrent abort which is also accessing it.) 633473153fe5SWebb Scales */ 633573153fe5SWebb Scales (void)atomic_dec(&c->refcount); 633673153fe5SWebb Scales } 633773153fe5SWebb Scales 633873153fe5SWebb Scales /* 6339edd16368SStephen M. Cameron * For operations that cannot sleep, a command block is allocated at init, 6340edd16368SStephen M. Cameron * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track 6341edd16368SStephen M. Cameron * which ones are free or in use. Lock must be held when calling this. 6342edd16368SStephen M. Cameron * cmd_free() is the complement. 6343bf43caf3SRobert Elliott * This function never gives up and returns NULL. If it hangs, 6344bf43caf3SRobert Elliott * another thread must call cmd_free() to free some tags. 6345edd16368SStephen M. Cameron */ 6346281a7fd0SWebb Scales 6347edd16368SStephen M. Cameron static struct CommandList *cmd_alloc(struct ctlr_info *h) 6348edd16368SStephen M. Cameron { 6349edd16368SStephen M. Cameron struct CommandList *c; 6350360c73bdSStephen Cameron int refcount, i; 635173153fe5SWebb Scales int offset = 0; 6352edd16368SStephen M. Cameron 635333811026SRobert Elliott /* 635433811026SRobert Elliott * There is some *extremely* small but non-zero chance that that 63554c413128SStephen M. Cameron * multiple threads could get in here, and one thread could 63564c413128SStephen M. Cameron * be scanning through the list of bits looking for a free 63574c413128SStephen M. Cameron * one, but the free ones are always behind him, and other 63584c413128SStephen M. Cameron * threads sneak in behind him and eat them before he can 63594c413128SStephen M. Cameron * get to them, so that while there is always a free one, a 63604c413128SStephen M. Cameron * very unlucky thread might be starved anyway, never able to 63614c413128SStephen M. Cameron * beat the other threads. In reality, this happens so 63624c413128SStephen M. Cameron * infrequently as to be indistinguishable from never. 636373153fe5SWebb Scales * 636473153fe5SWebb Scales * Note that we start allocating commands before the SCSI host structure 636573153fe5SWebb Scales * is initialized. Since the search starts at bit zero, this 636673153fe5SWebb Scales * all works, since we have at least one command structure available; 636773153fe5SWebb Scales * however, it means that the structures with the low indexes have to be 636873153fe5SWebb Scales * reserved for driver-initiated requests, while requests from the block 636973153fe5SWebb Scales * layer will use the higher indexes. 63704c413128SStephen M. Cameron */ 63714c413128SStephen M. Cameron 6372281a7fd0SWebb Scales for (;;) { 637373153fe5SWebb Scales i = find_next_zero_bit(h->cmd_pool_bits, 637473153fe5SWebb Scales HPSA_NRESERVED_CMDS, 637573153fe5SWebb Scales offset); 637673153fe5SWebb Scales if (unlikely(i >= HPSA_NRESERVED_CMDS)) { 6377281a7fd0SWebb Scales offset = 0; 6378281a7fd0SWebb Scales continue; 6379281a7fd0SWebb Scales } 6380edd16368SStephen M. Cameron c = h->cmd_pool + i; 6381281a7fd0SWebb Scales refcount = atomic_inc_return(&c->refcount); 6382281a7fd0SWebb Scales if (unlikely(refcount > 1)) { 6383281a7fd0SWebb Scales cmd_free(h, c); /* already in use */ 638473153fe5SWebb Scales offset = (i + 1) % HPSA_NRESERVED_CMDS; 6385281a7fd0SWebb Scales continue; 6386281a7fd0SWebb Scales } 6387281a7fd0SWebb Scales set_bit(i & (BITS_PER_LONG - 1), 6388281a7fd0SWebb Scales h->cmd_pool_bits + (i / BITS_PER_LONG)); 6389281a7fd0SWebb Scales break; /* it's ours now. */ 6390281a7fd0SWebb Scales } 6391360c73bdSStephen Cameron hpsa_cmd_partial_init(h, i, c); 6392edd16368SStephen M. Cameron return c; 6393edd16368SStephen M. Cameron } 6394edd16368SStephen M. Cameron 639573153fe5SWebb Scales /* 639673153fe5SWebb Scales * This is the complementary operation to cmd_alloc(). Note, however, in some 639773153fe5SWebb Scales * corner cases it may also be used to free blocks allocated by 639873153fe5SWebb Scales * cmd_tagged_alloc() in which case the ref-count decrement does the trick and 639973153fe5SWebb Scales * the clear-bit is harmless. 640073153fe5SWebb Scales */ 6401edd16368SStephen M. Cameron static void cmd_free(struct ctlr_info *h, struct CommandList *c) 6402edd16368SStephen M. Cameron { 6403281a7fd0SWebb Scales if (atomic_dec_and_test(&c->refcount)) { 6404edd16368SStephen M. Cameron int i; 6405edd16368SStephen M. Cameron 6406edd16368SStephen M. Cameron i = c - h->cmd_pool; 6407edd16368SStephen M. Cameron clear_bit(i & (BITS_PER_LONG - 1), 6408edd16368SStephen M. Cameron h->cmd_pool_bits + (i / BITS_PER_LONG)); 6409edd16368SStephen M. Cameron } 6410281a7fd0SWebb Scales } 6411edd16368SStephen M. Cameron 6412edd16368SStephen M. Cameron #ifdef CONFIG_COMPAT 6413edd16368SStephen M. Cameron 641442a91641SDon Brace static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, 641542a91641SDon Brace void __user *arg) 6416edd16368SStephen M. Cameron { 6417edd16368SStephen M. Cameron IOCTL32_Command_struct __user *arg32 = 6418edd16368SStephen M. Cameron (IOCTL32_Command_struct __user *) arg; 6419edd16368SStephen M. Cameron IOCTL_Command_struct arg64; 6420edd16368SStephen M. Cameron IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64)); 6421edd16368SStephen M. Cameron int err; 6422edd16368SStephen M. Cameron u32 cp; 6423edd16368SStephen M. Cameron 6424938abd84SVasiliy Kulikov memset(&arg64, 0, sizeof(arg64)); 6425edd16368SStephen M. Cameron err = 0; 6426edd16368SStephen M. Cameron err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 6427edd16368SStephen M. Cameron sizeof(arg64.LUN_info)); 6428edd16368SStephen M. Cameron err |= copy_from_user(&arg64.Request, &arg32->Request, 6429edd16368SStephen M. Cameron sizeof(arg64.Request)); 6430edd16368SStephen M. Cameron err |= copy_from_user(&arg64.error_info, &arg32->error_info, 6431edd16368SStephen M. Cameron sizeof(arg64.error_info)); 6432edd16368SStephen M. Cameron err |= get_user(arg64.buf_size, &arg32->buf_size); 6433edd16368SStephen M. Cameron err |= get_user(cp, &arg32->buf); 6434edd16368SStephen M. Cameron arg64.buf = compat_ptr(cp); 6435edd16368SStephen M. Cameron err |= copy_to_user(p, &arg64, sizeof(arg64)); 6436edd16368SStephen M. Cameron 6437edd16368SStephen M. Cameron if (err) 6438edd16368SStephen M. Cameron return -EFAULT; 6439edd16368SStephen M. Cameron 644042a91641SDon Brace err = hpsa_ioctl(dev, CCISS_PASSTHRU, p); 6441edd16368SStephen M. Cameron if (err) 6442edd16368SStephen M. Cameron return err; 6443edd16368SStephen M. Cameron err |= copy_in_user(&arg32->error_info, &p->error_info, 6444edd16368SStephen M. Cameron sizeof(arg32->error_info)); 6445edd16368SStephen M. Cameron if (err) 6446edd16368SStephen M. Cameron return -EFAULT; 6447edd16368SStephen M. Cameron return err; 6448edd16368SStephen M. Cameron } 6449edd16368SStephen M. Cameron 6450edd16368SStephen M. Cameron static int hpsa_ioctl32_big_passthru(struct scsi_device *dev, 645142a91641SDon Brace int cmd, void __user *arg) 6452edd16368SStephen M. Cameron { 6453edd16368SStephen M. Cameron BIG_IOCTL32_Command_struct __user *arg32 = 6454edd16368SStephen M. Cameron (BIG_IOCTL32_Command_struct __user *) arg; 6455edd16368SStephen M. Cameron BIG_IOCTL_Command_struct arg64; 6456edd16368SStephen M. Cameron BIG_IOCTL_Command_struct __user *p = 6457edd16368SStephen M. Cameron compat_alloc_user_space(sizeof(arg64)); 6458edd16368SStephen M. Cameron int err; 6459edd16368SStephen M. Cameron u32 cp; 6460edd16368SStephen M. Cameron 6461938abd84SVasiliy Kulikov memset(&arg64, 0, sizeof(arg64)); 6462edd16368SStephen M. Cameron err = 0; 6463edd16368SStephen M. Cameron err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 6464edd16368SStephen M. Cameron sizeof(arg64.LUN_info)); 6465edd16368SStephen M. Cameron err |= copy_from_user(&arg64.Request, &arg32->Request, 6466edd16368SStephen M. Cameron sizeof(arg64.Request)); 6467edd16368SStephen M. Cameron err |= copy_from_user(&arg64.error_info, &arg32->error_info, 6468edd16368SStephen M. Cameron sizeof(arg64.error_info)); 6469edd16368SStephen M. Cameron err |= get_user(arg64.buf_size, &arg32->buf_size); 6470edd16368SStephen M. Cameron err |= get_user(arg64.malloc_size, &arg32->malloc_size); 6471edd16368SStephen M. Cameron err |= get_user(cp, &arg32->buf); 6472edd16368SStephen M. Cameron arg64.buf = compat_ptr(cp); 6473edd16368SStephen M. Cameron err |= copy_to_user(p, &arg64, sizeof(arg64)); 6474edd16368SStephen M. Cameron 6475edd16368SStephen M. Cameron if (err) 6476edd16368SStephen M. Cameron return -EFAULT; 6477edd16368SStephen M. Cameron 647842a91641SDon Brace err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, p); 6479edd16368SStephen M. Cameron if (err) 6480edd16368SStephen M. Cameron return err; 6481edd16368SStephen M. Cameron err |= copy_in_user(&arg32->error_info, &p->error_info, 6482edd16368SStephen M. Cameron sizeof(arg32->error_info)); 6483edd16368SStephen M. Cameron if (err) 6484edd16368SStephen M. Cameron return -EFAULT; 6485edd16368SStephen M. Cameron return err; 6486edd16368SStephen M. Cameron } 648771fe75a7SStephen M. Cameron 648842a91641SDon Brace static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void __user *arg) 648971fe75a7SStephen M. Cameron { 649071fe75a7SStephen M. Cameron switch (cmd) { 649171fe75a7SStephen M. Cameron case CCISS_GETPCIINFO: 649271fe75a7SStephen M. Cameron case CCISS_GETINTINFO: 649371fe75a7SStephen M. Cameron case CCISS_SETINTINFO: 649471fe75a7SStephen M. Cameron case CCISS_GETNODENAME: 649571fe75a7SStephen M. Cameron case CCISS_SETNODENAME: 649671fe75a7SStephen M. Cameron case CCISS_GETHEARTBEAT: 649771fe75a7SStephen M. Cameron case CCISS_GETBUSTYPES: 649871fe75a7SStephen M. Cameron case CCISS_GETFIRMVER: 649971fe75a7SStephen M. Cameron case CCISS_GETDRIVVER: 650071fe75a7SStephen M. Cameron case CCISS_REVALIDVOLS: 650171fe75a7SStephen M. Cameron case CCISS_DEREGDISK: 650271fe75a7SStephen M. Cameron case CCISS_REGNEWDISK: 650371fe75a7SStephen M. Cameron case CCISS_REGNEWD: 650471fe75a7SStephen M. Cameron case CCISS_RESCANDISK: 650571fe75a7SStephen M. Cameron case CCISS_GETLUNINFO: 650671fe75a7SStephen M. Cameron return hpsa_ioctl(dev, cmd, arg); 650771fe75a7SStephen M. Cameron 650871fe75a7SStephen M. Cameron case CCISS_PASSTHRU32: 650971fe75a7SStephen M. Cameron return hpsa_ioctl32_passthru(dev, cmd, arg); 651071fe75a7SStephen M. Cameron case CCISS_BIG_PASSTHRU32: 651171fe75a7SStephen M. Cameron return hpsa_ioctl32_big_passthru(dev, cmd, arg); 651271fe75a7SStephen M. Cameron 651371fe75a7SStephen M. Cameron default: 651471fe75a7SStephen M. Cameron return -ENOIOCTLCMD; 651571fe75a7SStephen M. Cameron } 651671fe75a7SStephen M. Cameron } 6517edd16368SStephen M. Cameron #endif 6518edd16368SStephen M. Cameron 6519edd16368SStephen M. Cameron static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp) 6520edd16368SStephen M. Cameron { 6521edd16368SStephen M. Cameron struct hpsa_pci_info pciinfo; 6522edd16368SStephen M. Cameron 6523edd16368SStephen M. Cameron if (!argp) 6524edd16368SStephen M. Cameron return -EINVAL; 6525edd16368SStephen M. Cameron pciinfo.domain = pci_domain_nr(h->pdev->bus); 6526edd16368SStephen M. Cameron pciinfo.bus = h->pdev->bus->number; 6527edd16368SStephen M. Cameron pciinfo.dev_fn = h->pdev->devfn; 6528edd16368SStephen M. Cameron pciinfo.board_id = h->board_id; 6529edd16368SStephen M. Cameron if (copy_to_user(argp, &pciinfo, sizeof(pciinfo))) 6530edd16368SStephen M. Cameron return -EFAULT; 6531edd16368SStephen M. Cameron return 0; 6532edd16368SStephen M. Cameron } 6533edd16368SStephen M. Cameron 6534edd16368SStephen M. Cameron static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp) 6535edd16368SStephen M. Cameron { 6536edd16368SStephen M. Cameron DriverVer_type DriverVer; 6537edd16368SStephen M. Cameron unsigned char vmaj, vmin, vsubmin; 6538edd16368SStephen M. Cameron int rc; 6539edd16368SStephen M. Cameron 6540edd16368SStephen M. Cameron rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu", 6541edd16368SStephen M. Cameron &vmaj, &vmin, &vsubmin); 6542edd16368SStephen M. Cameron if (rc != 3) { 6543edd16368SStephen M. Cameron dev_info(&h->pdev->dev, "driver version string '%s' " 6544edd16368SStephen M. Cameron "unrecognized.", HPSA_DRIVER_VERSION); 6545edd16368SStephen M. Cameron vmaj = 0; 6546edd16368SStephen M. Cameron vmin = 0; 6547edd16368SStephen M. Cameron vsubmin = 0; 6548edd16368SStephen M. Cameron } 6549edd16368SStephen M. Cameron DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin; 6550edd16368SStephen M. Cameron if (!argp) 6551edd16368SStephen M. Cameron return -EINVAL; 6552edd16368SStephen M. Cameron if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type))) 6553edd16368SStephen M. Cameron return -EFAULT; 6554edd16368SStephen M. Cameron return 0; 6555edd16368SStephen M. Cameron } 6556edd16368SStephen M. Cameron 6557edd16368SStephen M. Cameron static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp) 6558edd16368SStephen M. Cameron { 6559edd16368SStephen M. Cameron IOCTL_Command_struct iocommand; 6560edd16368SStephen M. Cameron struct CommandList *c; 6561edd16368SStephen M. Cameron char *buff = NULL; 656250a0decfSStephen M. Cameron u64 temp64; 6563c1f63c8fSStephen M. Cameron int rc = 0; 6564edd16368SStephen M. Cameron 6565edd16368SStephen M. Cameron if (!argp) 6566edd16368SStephen M. Cameron return -EINVAL; 6567edd16368SStephen M. Cameron if (!capable(CAP_SYS_RAWIO)) 6568edd16368SStephen M. Cameron return -EPERM; 6569edd16368SStephen M. Cameron if (copy_from_user(&iocommand, argp, sizeof(iocommand))) 6570edd16368SStephen M. Cameron return -EFAULT; 6571edd16368SStephen M. Cameron if ((iocommand.buf_size < 1) && 6572edd16368SStephen M. Cameron (iocommand.Request.Type.Direction != XFER_NONE)) { 6573edd16368SStephen M. Cameron return -EINVAL; 6574edd16368SStephen M. Cameron } 6575edd16368SStephen M. Cameron if (iocommand.buf_size > 0) { 6576edd16368SStephen M. Cameron buff = kmalloc(iocommand.buf_size, GFP_KERNEL); 6577edd16368SStephen M. Cameron if (buff == NULL) 65782dd02d74SRobert Elliott return -ENOMEM; 65799233fb10SStephen M. Cameron if (iocommand.Request.Type.Direction & XFER_WRITE) { 6580edd16368SStephen M. Cameron /* Copy the data into the buffer we created */ 6581b03a7771SStephen M. Cameron if (copy_from_user(buff, iocommand.buf, 6582b03a7771SStephen M. Cameron iocommand.buf_size)) { 6583c1f63c8fSStephen M. Cameron rc = -EFAULT; 6584c1f63c8fSStephen M. Cameron goto out_kfree; 6585edd16368SStephen M. Cameron } 6586b03a7771SStephen M. Cameron } else { 6587edd16368SStephen M. Cameron memset(buff, 0, iocommand.buf_size); 6588b03a7771SStephen M. Cameron } 6589b03a7771SStephen M. Cameron } 659045fcb86eSStephen Cameron c = cmd_alloc(h); 6591bf43caf3SRobert Elliott 6592edd16368SStephen M. Cameron /* Fill in the command type */ 6593edd16368SStephen M. Cameron c->cmd_type = CMD_IOCTL_PEND; 6594a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 6595edd16368SStephen M. Cameron /* Fill in Command Header */ 6596edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; /* unused in simple mode */ 6597edd16368SStephen M. Cameron if (iocommand.buf_size > 0) { /* buffer to fill */ 6598edd16368SStephen M. Cameron c->Header.SGList = 1; 659950a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(1); 6600edd16368SStephen M. Cameron } else { /* no buffers to fill */ 6601edd16368SStephen M. Cameron c->Header.SGList = 0; 660250a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(0); 6603edd16368SStephen M. Cameron } 6604edd16368SStephen M. Cameron memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN)); 6605edd16368SStephen M. Cameron 6606edd16368SStephen M. Cameron /* Fill in Request block */ 6607edd16368SStephen M. Cameron memcpy(&c->Request, &iocommand.Request, 6608edd16368SStephen M. Cameron sizeof(c->Request)); 6609edd16368SStephen M. Cameron 6610edd16368SStephen M. Cameron /* Fill in the scatter gather information */ 6611edd16368SStephen M. Cameron if (iocommand.buf_size > 0) { 661250a0decfSStephen M. Cameron temp64 = pci_map_single(h->pdev, buff, 6613edd16368SStephen M. Cameron iocommand.buf_size, PCI_DMA_BIDIRECTIONAL); 661450a0decfSStephen M. Cameron if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) { 661550a0decfSStephen M. Cameron c->SG[0].Addr = cpu_to_le64(0); 661650a0decfSStephen M. Cameron c->SG[0].Len = cpu_to_le32(0); 6617bcc48ffaSStephen M. Cameron rc = -ENOMEM; 6618bcc48ffaSStephen M. Cameron goto out; 6619bcc48ffaSStephen M. Cameron } 662050a0decfSStephen M. Cameron c->SG[0].Addr = cpu_to_le64(temp64); 662150a0decfSStephen M. Cameron c->SG[0].Len = cpu_to_le32(iocommand.buf_size); 662250a0decfSStephen M. Cameron c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */ 6623edd16368SStephen M. Cameron } 6624c448ecfaSDon Brace rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 66253fb134cbSDon Brace NO_TIMEOUT); 6626c2dd32e0SStephen M. Cameron if (iocommand.buf_size > 0) 6627edd16368SStephen M. Cameron hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL); 6628edd16368SStephen M. Cameron check_ioctl_unit_attention(h, c); 662925163bd5SWebb Scales if (rc) { 663025163bd5SWebb Scales rc = -EIO; 663125163bd5SWebb Scales goto out; 663225163bd5SWebb Scales } 6633edd16368SStephen M. Cameron 6634edd16368SStephen M. Cameron /* Copy the error information out */ 6635edd16368SStephen M. Cameron memcpy(&iocommand.error_info, c->err_info, 6636edd16368SStephen M. Cameron sizeof(iocommand.error_info)); 6637edd16368SStephen M. Cameron if (copy_to_user(argp, &iocommand, sizeof(iocommand))) { 6638c1f63c8fSStephen M. Cameron rc = -EFAULT; 6639c1f63c8fSStephen M. Cameron goto out; 6640edd16368SStephen M. Cameron } 66419233fb10SStephen M. Cameron if ((iocommand.Request.Type.Direction & XFER_READ) && 6642b03a7771SStephen M. Cameron iocommand.buf_size > 0) { 6643edd16368SStephen M. Cameron /* Copy the data out of the buffer we created */ 6644edd16368SStephen M. Cameron if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) { 6645c1f63c8fSStephen M. Cameron rc = -EFAULT; 6646c1f63c8fSStephen M. Cameron goto out; 6647edd16368SStephen M. Cameron } 6648edd16368SStephen M. Cameron } 6649c1f63c8fSStephen M. Cameron out: 665045fcb86eSStephen Cameron cmd_free(h, c); 6651c1f63c8fSStephen M. Cameron out_kfree: 6652c1f63c8fSStephen M. Cameron kfree(buff); 6653c1f63c8fSStephen M. Cameron return rc; 6654edd16368SStephen M. Cameron } 6655edd16368SStephen M. Cameron 6656edd16368SStephen M. Cameron static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp) 6657edd16368SStephen M. Cameron { 6658edd16368SStephen M. Cameron BIG_IOCTL_Command_struct *ioc; 6659edd16368SStephen M. Cameron struct CommandList *c; 6660edd16368SStephen M. Cameron unsigned char **buff = NULL; 6661edd16368SStephen M. Cameron int *buff_size = NULL; 666250a0decfSStephen M. Cameron u64 temp64; 6663edd16368SStephen M. Cameron BYTE sg_used = 0; 6664edd16368SStephen M. Cameron int status = 0; 666501a02ffcSStephen M. Cameron u32 left; 666601a02ffcSStephen M. Cameron u32 sz; 6667edd16368SStephen M. Cameron BYTE __user *data_ptr; 6668edd16368SStephen M. Cameron 6669edd16368SStephen M. Cameron if (!argp) 6670edd16368SStephen M. Cameron return -EINVAL; 6671edd16368SStephen M. Cameron if (!capable(CAP_SYS_RAWIO)) 6672edd16368SStephen M. Cameron return -EPERM; 667319be606bSJavier Martinez Canillas ioc = kmalloc(sizeof(*ioc), GFP_KERNEL); 6674edd16368SStephen M. Cameron if (!ioc) { 6675edd16368SStephen M. Cameron status = -ENOMEM; 6676edd16368SStephen M. Cameron goto cleanup1; 6677edd16368SStephen M. Cameron } 6678edd16368SStephen M. Cameron if (copy_from_user(ioc, argp, sizeof(*ioc))) { 6679edd16368SStephen M. Cameron status = -EFAULT; 6680edd16368SStephen M. Cameron goto cleanup1; 6681edd16368SStephen M. Cameron } 6682edd16368SStephen M. Cameron if ((ioc->buf_size < 1) && 6683edd16368SStephen M. Cameron (ioc->Request.Type.Direction != XFER_NONE)) { 6684edd16368SStephen M. Cameron status = -EINVAL; 6685edd16368SStephen M. Cameron goto cleanup1; 6686edd16368SStephen M. Cameron } 6687edd16368SStephen M. Cameron /* Check kmalloc limits using all SGs */ 6688edd16368SStephen M. Cameron if (ioc->malloc_size > MAX_KMALLOC_SIZE) { 6689edd16368SStephen M. Cameron status = -EINVAL; 6690edd16368SStephen M. Cameron goto cleanup1; 6691edd16368SStephen M. Cameron } 6692d66ae08bSStephen M. Cameron if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) { 6693edd16368SStephen M. Cameron status = -EINVAL; 6694edd16368SStephen M. Cameron goto cleanup1; 6695edd16368SStephen M. Cameron } 6696d66ae08bSStephen M. Cameron buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL); 6697edd16368SStephen M. Cameron if (!buff) { 6698edd16368SStephen M. Cameron status = -ENOMEM; 6699edd16368SStephen M. Cameron goto cleanup1; 6700edd16368SStephen M. Cameron } 6701d66ae08bSStephen M. Cameron buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL); 6702edd16368SStephen M. Cameron if (!buff_size) { 6703edd16368SStephen M. Cameron status = -ENOMEM; 6704edd16368SStephen M. Cameron goto cleanup1; 6705edd16368SStephen M. Cameron } 6706edd16368SStephen M. Cameron left = ioc->buf_size; 6707edd16368SStephen M. Cameron data_ptr = ioc->buf; 6708edd16368SStephen M. Cameron while (left) { 6709edd16368SStephen M. Cameron sz = (left > ioc->malloc_size) ? ioc->malloc_size : left; 6710edd16368SStephen M. Cameron buff_size[sg_used] = sz; 6711edd16368SStephen M. Cameron buff[sg_used] = kmalloc(sz, GFP_KERNEL); 6712edd16368SStephen M. Cameron if (buff[sg_used] == NULL) { 6713edd16368SStephen M. Cameron status = -ENOMEM; 6714edd16368SStephen M. Cameron goto cleanup1; 6715edd16368SStephen M. Cameron } 67169233fb10SStephen M. Cameron if (ioc->Request.Type.Direction & XFER_WRITE) { 6717edd16368SStephen M. Cameron if (copy_from_user(buff[sg_used], data_ptr, sz)) { 67180758f4f7SStephen M. Cameron status = -EFAULT; 6719edd16368SStephen M. Cameron goto cleanup1; 6720edd16368SStephen M. Cameron } 6721edd16368SStephen M. Cameron } else 6722edd16368SStephen M. Cameron memset(buff[sg_used], 0, sz); 6723edd16368SStephen M. Cameron left -= sz; 6724edd16368SStephen M. Cameron data_ptr += sz; 6725edd16368SStephen M. Cameron sg_used++; 6726edd16368SStephen M. Cameron } 672745fcb86eSStephen Cameron c = cmd_alloc(h); 6728bf43caf3SRobert Elliott 6729edd16368SStephen M. Cameron c->cmd_type = CMD_IOCTL_PEND; 6730a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 6731edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; 673250a0decfSStephen M. Cameron c->Header.SGList = (u8) sg_used; 673350a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(sg_used); 6734edd16368SStephen M. Cameron memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN)); 6735edd16368SStephen M. Cameron memcpy(&c->Request, &ioc->Request, sizeof(c->Request)); 6736edd16368SStephen M. Cameron if (ioc->buf_size > 0) { 6737edd16368SStephen M. Cameron int i; 6738edd16368SStephen M. Cameron for (i = 0; i < sg_used; i++) { 673950a0decfSStephen M. Cameron temp64 = pci_map_single(h->pdev, buff[i], 6740edd16368SStephen M. Cameron buff_size[i], PCI_DMA_BIDIRECTIONAL); 674150a0decfSStephen M. Cameron if (dma_mapping_error(&h->pdev->dev, 674250a0decfSStephen M. Cameron (dma_addr_t) temp64)) { 674350a0decfSStephen M. Cameron c->SG[i].Addr = cpu_to_le64(0); 674450a0decfSStephen M. Cameron c->SG[i].Len = cpu_to_le32(0); 6745bcc48ffaSStephen M. Cameron hpsa_pci_unmap(h->pdev, c, i, 6746bcc48ffaSStephen M. Cameron PCI_DMA_BIDIRECTIONAL); 6747bcc48ffaSStephen M. Cameron status = -ENOMEM; 6748e2d4a1f6SStephen M. Cameron goto cleanup0; 6749bcc48ffaSStephen M. Cameron } 675050a0decfSStephen M. Cameron c->SG[i].Addr = cpu_to_le64(temp64); 675150a0decfSStephen M. Cameron c->SG[i].Len = cpu_to_le32(buff_size[i]); 675250a0decfSStephen M. Cameron c->SG[i].Ext = cpu_to_le32(0); 6753edd16368SStephen M. Cameron } 675450a0decfSStephen M. Cameron c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST); 6755edd16368SStephen M. Cameron } 6756c448ecfaSDon Brace status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 67573fb134cbSDon Brace NO_TIMEOUT); 6758b03a7771SStephen M. Cameron if (sg_used) 6759edd16368SStephen M. Cameron hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL); 6760edd16368SStephen M. Cameron check_ioctl_unit_attention(h, c); 676125163bd5SWebb Scales if (status) { 676225163bd5SWebb Scales status = -EIO; 676325163bd5SWebb Scales goto cleanup0; 676425163bd5SWebb Scales } 676525163bd5SWebb Scales 6766edd16368SStephen M. Cameron /* Copy the error information out */ 6767edd16368SStephen M. Cameron memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info)); 6768edd16368SStephen M. Cameron if (copy_to_user(argp, ioc, sizeof(*ioc))) { 6769edd16368SStephen M. Cameron status = -EFAULT; 6770e2d4a1f6SStephen M. Cameron goto cleanup0; 6771edd16368SStephen M. Cameron } 67729233fb10SStephen M. Cameron if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) { 67732b08b3e9SDon Brace int i; 67742b08b3e9SDon Brace 6775edd16368SStephen M. Cameron /* Copy the data out of the buffer we created */ 6776edd16368SStephen M. Cameron BYTE __user *ptr = ioc->buf; 6777edd16368SStephen M. Cameron for (i = 0; i < sg_used; i++) { 6778edd16368SStephen M. Cameron if (copy_to_user(ptr, buff[i], buff_size[i])) { 6779edd16368SStephen M. Cameron status = -EFAULT; 6780e2d4a1f6SStephen M. Cameron goto cleanup0; 6781edd16368SStephen M. Cameron } 6782edd16368SStephen M. Cameron ptr += buff_size[i]; 6783edd16368SStephen M. Cameron } 6784edd16368SStephen M. Cameron } 6785edd16368SStephen M. Cameron status = 0; 6786e2d4a1f6SStephen M. Cameron cleanup0: 678745fcb86eSStephen Cameron cmd_free(h, c); 6788edd16368SStephen M. Cameron cleanup1: 6789edd16368SStephen M. Cameron if (buff) { 67902b08b3e9SDon Brace int i; 67912b08b3e9SDon Brace 6792edd16368SStephen M. Cameron for (i = 0; i < sg_used; i++) 6793edd16368SStephen M. Cameron kfree(buff[i]); 6794edd16368SStephen M. Cameron kfree(buff); 6795edd16368SStephen M. Cameron } 6796edd16368SStephen M. Cameron kfree(buff_size); 6797edd16368SStephen M. Cameron kfree(ioc); 6798edd16368SStephen M. Cameron return status; 6799edd16368SStephen M. Cameron } 6800edd16368SStephen M. Cameron 6801edd16368SStephen M. Cameron static void check_ioctl_unit_attention(struct ctlr_info *h, 6802edd16368SStephen M. Cameron struct CommandList *c) 6803edd16368SStephen M. Cameron { 6804edd16368SStephen M. Cameron if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 6805edd16368SStephen M. Cameron c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) 6806edd16368SStephen M. Cameron (void) check_for_unit_attention(h, c); 6807edd16368SStephen M. Cameron } 68080390f0c0SStephen M. Cameron 6809edd16368SStephen M. Cameron /* 6810edd16368SStephen M. Cameron * ioctl 6811edd16368SStephen M. Cameron */ 681242a91641SDon Brace static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg) 6813edd16368SStephen M. Cameron { 6814edd16368SStephen M. Cameron struct ctlr_info *h; 6815edd16368SStephen M. Cameron void __user *argp = (void __user *)arg; 68160390f0c0SStephen M. Cameron int rc; 6817edd16368SStephen M. Cameron 6818edd16368SStephen M. Cameron h = sdev_to_hba(dev); 6819edd16368SStephen M. Cameron 6820edd16368SStephen M. Cameron switch (cmd) { 6821edd16368SStephen M. Cameron case CCISS_DEREGDISK: 6822edd16368SStephen M. Cameron case CCISS_REGNEWDISK: 6823edd16368SStephen M. Cameron case CCISS_REGNEWD: 6824a08a8471SStephen M. Cameron hpsa_scan_start(h->scsi_host); 6825edd16368SStephen M. Cameron return 0; 6826edd16368SStephen M. Cameron case CCISS_GETPCIINFO: 6827edd16368SStephen M. Cameron return hpsa_getpciinfo_ioctl(h, argp); 6828edd16368SStephen M. Cameron case CCISS_GETDRIVVER: 6829edd16368SStephen M. Cameron return hpsa_getdrivver_ioctl(h, argp); 6830edd16368SStephen M. Cameron case CCISS_PASSTHRU: 683134f0c627SDon Brace if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 68320390f0c0SStephen M. Cameron return -EAGAIN; 68330390f0c0SStephen M. Cameron rc = hpsa_passthru_ioctl(h, argp); 683434f0c627SDon Brace atomic_inc(&h->passthru_cmds_avail); 68350390f0c0SStephen M. Cameron return rc; 6836edd16368SStephen M. Cameron case CCISS_BIG_PASSTHRU: 683734f0c627SDon Brace if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 68380390f0c0SStephen M. Cameron return -EAGAIN; 68390390f0c0SStephen M. Cameron rc = hpsa_big_passthru_ioctl(h, argp); 684034f0c627SDon Brace atomic_inc(&h->passthru_cmds_avail); 68410390f0c0SStephen M. Cameron return rc; 6842edd16368SStephen M. Cameron default: 6843edd16368SStephen M. Cameron return -ENOTTY; 6844edd16368SStephen M. Cameron } 6845edd16368SStephen M. Cameron } 6846edd16368SStephen M. Cameron 6847bf43caf3SRobert Elliott static void hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr, 68486f039790SGreg Kroah-Hartman u8 reset_type) 684964670ac8SStephen M. Cameron { 685064670ac8SStephen M. Cameron struct CommandList *c; 685164670ac8SStephen M. Cameron 685264670ac8SStephen M. Cameron c = cmd_alloc(h); 6853bf43caf3SRobert Elliott 6854a2dac136SStephen M. Cameron /* fill_cmd can't fail here, no data buffer to map */ 6855a2dac136SStephen M. Cameron (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, 685664670ac8SStephen M. Cameron RAID_CTLR_LUNID, TYPE_MSG); 685764670ac8SStephen M. Cameron c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */ 685864670ac8SStephen M. Cameron c->waiting = NULL; 685964670ac8SStephen M. Cameron enqueue_cmd_and_start_io(h, c); 686064670ac8SStephen M. Cameron /* Don't wait for completion, the reset won't complete. Don't free 686164670ac8SStephen M. Cameron * the command either. This is the last command we will send before 686264670ac8SStephen M. Cameron * re-initializing everything, so it doesn't matter and won't leak. 686364670ac8SStephen M. Cameron */ 6864bf43caf3SRobert Elliott return; 686564670ac8SStephen M. Cameron } 686664670ac8SStephen M. Cameron 6867a2dac136SStephen M. Cameron static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 6868b7bb24ebSStephen M. Cameron void *buff, size_t size, u16 page_code, unsigned char *scsi3addr, 6869edd16368SStephen M. Cameron int cmd_type) 6870edd16368SStephen M. Cameron { 6871edd16368SStephen M. Cameron int pci_dir = XFER_NONE; 68729b5c48c2SStephen Cameron u64 tag; /* for commands to be aborted */ 6873edd16368SStephen M. Cameron 6874edd16368SStephen M. Cameron c->cmd_type = CMD_IOCTL_PEND; 6875a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 6876edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; 6877edd16368SStephen M. Cameron if (buff != NULL && size > 0) { 6878edd16368SStephen M. Cameron c->Header.SGList = 1; 687950a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(1); 6880edd16368SStephen M. Cameron } else { 6881edd16368SStephen M. Cameron c->Header.SGList = 0; 688250a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(0); 6883edd16368SStephen M. Cameron } 6884edd16368SStephen M. Cameron memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8); 6885edd16368SStephen M. Cameron 6886edd16368SStephen M. Cameron if (cmd_type == TYPE_CMD) { 6887edd16368SStephen M. Cameron switch (cmd) { 6888edd16368SStephen M. Cameron case HPSA_INQUIRY: 6889edd16368SStephen M. Cameron /* are we trying to read a vital product page */ 6890b7bb24ebSStephen M. Cameron if (page_code & VPD_PAGE) { 6891edd16368SStephen M. Cameron c->Request.CDB[1] = 0x01; 6892b7bb24ebSStephen M. Cameron c->Request.CDB[2] = (page_code & 0xff); 6893edd16368SStephen M. Cameron } 6894edd16368SStephen M. Cameron c->Request.CDBLen = 6; 6895a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6896a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6897edd16368SStephen M. Cameron c->Request.Timeout = 0; 6898edd16368SStephen M. Cameron c->Request.CDB[0] = HPSA_INQUIRY; 6899edd16368SStephen M. Cameron c->Request.CDB[4] = size & 0xFF; 6900edd16368SStephen M. Cameron break; 6901edd16368SStephen M. Cameron case HPSA_REPORT_LOG: 6902edd16368SStephen M. Cameron case HPSA_REPORT_PHYS: 6903edd16368SStephen M. Cameron /* Talking to controller so It's a physical command 6904edd16368SStephen M. Cameron mode = 00 target = 0. Nothing to write. 6905edd16368SStephen M. Cameron */ 6906edd16368SStephen M. Cameron c->Request.CDBLen = 12; 6907a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6908a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6909edd16368SStephen M. Cameron c->Request.Timeout = 0; 6910edd16368SStephen M. Cameron c->Request.CDB[0] = cmd; 6911edd16368SStephen M. Cameron c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 6912edd16368SStephen M. Cameron c->Request.CDB[7] = (size >> 16) & 0xFF; 6913edd16368SStephen M. Cameron c->Request.CDB[8] = (size >> 8) & 0xFF; 6914edd16368SStephen M. Cameron c->Request.CDB[9] = size & 0xFF; 6915edd16368SStephen M. Cameron break; 6916c2adae44SScott Teel case BMIC_SENSE_DIAG_OPTIONS: 6917c2adae44SScott Teel c->Request.CDBLen = 16; 6918c2adae44SScott Teel c->Request.type_attr_dir = 6919c2adae44SScott Teel TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6920c2adae44SScott Teel c->Request.Timeout = 0; 6921c2adae44SScott Teel /* Spec says this should be BMIC_WRITE */ 6922c2adae44SScott Teel c->Request.CDB[0] = BMIC_READ; 6923c2adae44SScott Teel c->Request.CDB[6] = BMIC_SENSE_DIAG_OPTIONS; 6924c2adae44SScott Teel break; 6925c2adae44SScott Teel case BMIC_SET_DIAG_OPTIONS: 6926c2adae44SScott Teel c->Request.CDBLen = 16; 6927c2adae44SScott Teel c->Request.type_attr_dir = 6928c2adae44SScott Teel TYPE_ATTR_DIR(cmd_type, 6929c2adae44SScott Teel ATTR_SIMPLE, XFER_WRITE); 6930c2adae44SScott Teel c->Request.Timeout = 0; 6931c2adae44SScott Teel c->Request.CDB[0] = BMIC_WRITE; 6932c2adae44SScott Teel c->Request.CDB[6] = BMIC_SET_DIAG_OPTIONS; 6933c2adae44SScott Teel break; 6934edd16368SStephen M. Cameron case HPSA_CACHE_FLUSH: 6935edd16368SStephen M. Cameron c->Request.CDBLen = 12; 6936a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6937a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, 6938a505b86fSStephen M. Cameron ATTR_SIMPLE, XFER_WRITE); 6939edd16368SStephen M. Cameron c->Request.Timeout = 0; 6940edd16368SStephen M. Cameron c->Request.CDB[0] = BMIC_WRITE; 6941edd16368SStephen M. Cameron c->Request.CDB[6] = BMIC_CACHE_FLUSH; 6942bb158eabSStephen M. Cameron c->Request.CDB[7] = (size >> 8) & 0xFF; 6943bb158eabSStephen M. Cameron c->Request.CDB[8] = size & 0xFF; 6944edd16368SStephen M. Cameron break; 6945edd16368SStephen M. Cameron case TEST_UNIT_READY: 6946edd16368SStephen M. Cameron c->Request.CDBLen = 6; 6947a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6948a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 6949edd16368SStephen M. Cameron c->Request.Timeout = 0; 6950edd16368SStephen M. Cameron break; 6951283b4a9bSStephen M. Cameron case HPSA_GET_RAID_MAP: 6952283b4a9bSStephen M. Cameron c->Request.CDBLen = 12; 6953a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6954a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6955283b4a9bSStephen M. Cameron c->Request.Timeout = 0; 6956283b4a9bSStephen M. Cameron c->Request.CDB[0] = HPSA_CISS_READ; 6957283b4a9bSStephen M. Cameron c->Request.CDB[1] = cmd; 6958283b4a9bSStephen M. Cameron c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 6959283b4a9bSStephen M. Cameron c->Request.CDB[7] = (size >> 16) & 0xFF; 6960283b4a9bSStephen M. Cameron c->Request.CDB[8] = (size >> 8) & 0xFF; 6961283b4a9bSStephen M. Cameron c->Request.CDB[9] = size & 0xFF; 6962283b4a9bSStephen M. Cameron break; 6963316b221aSStephen M. Cameron case BMIC_SENSE_CONTROLLER_PARAMETERS: 6964316b221aSStephen M. Cameron c->Request.CDBLen = 10; 6965a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6966a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6967316b221aSStephen M. Cameron c->Request.Timeout = 0; 6968316b221aSStephen M. Cameron c->Request.CDB[0] = BMIC_READ; 6969316b221aSStephen M. Cameron c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS; 6970316b221aSStephen M. Cameron c->Request.CDB[7] = (size >> 16) & 0xFF; 6971316b221aSStephen M. Cameron c->Request.CDB[8] = (size >> 8) & 0xFF; 6972316b221aSStephen M. Cameron break; 697303383736SDon Brace case BMIC_IDENTIFY_PHYSICAL_DEVICE: 697403383736SDon Brace c->Request.CDBLen = 10; 697503383736SDon Brace c->Request.type_attr_dir = 697603383736SDon Brace TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 697703383736SDon Brace c->Request.Timeout = 0; 697803383736SDon Brace c->Request.CDB[0] = BMIC_READ; 697903383736SDon Brace c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE; 698003383736SDon Brace c->Request.CDB[7] = (size >> 16) & 0xFF; 698103383736SDon Brace c->Request.CDB[8] = (size >> 8) & 0XFF; 698203383736SDon Brace break; 6983d04e62b9SKevin Barnett case BMIC_SENSE_SUBSYSTEM_INFORMATION: 6984d04e62b9SKevin Barnett c->Request.CDBLen = 10; 6985d04e62b9SKevin Barnett c->Request.type_attr_dir = 6986d04e62b9SKevin Barnett TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6987d04e62b9SKevin Barnett c->Request.Timeout = 0; 6988d04e62b9SKevin Barnett c->Request.CDB[0] = BMIC_READ; 6989d04e62b9SKevin Barnett c->Request.CDB[6] = BMIC_SENSE_SUBSYSTEM_INFORMATION; 6990d04e62b9SKevin Barnett c->Request.CDB[7] = (size >> 16) & 0xFF; 6991d04e62b9SKevin Barnett c->Request.CDB[8] = (size >> 8) & 0XFF; 6992d04e62b9SKevin Barnett break; 6993cca8f13bSDon Brace case BMIC_SENSE_STORAGE_BOX_PARAMS: 6994cca8f13bSDon Brace c->Request.CDBLen = 10; 6995cca8f13bSDon Brace c->Request.type_attr_dir = 6996cca8f13bSDon Brace TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6997cca8f13bSDon Brace c->Request.Timeout = 0; 6998cca8f13bSDon Brace c->Request.CDB[0] = BMIC_READ; 6999cca8f13bSDon Brace c->Request.CDB[6] = BMIC_SENSE_STORAGE_BOX_PARAMS; 7000cca8f13bSDon Brace c->Request.CDB[7] = (size >> 16) & 0xFF; 7001cca8f13bSDon Brace c->Request.CDB[8] = (size >> 8) & 0XFF; 7002cca8f13bSDon Brace break; 700366749d0dSScott Teel case BMIC_IDENTIFY_CONTROLLER: 700466749d0dSScott Teel c->Request.CDBLen = 10; 700566749d0dSScott Teel c->Request.type_attr_dir = 700666749d0dSScott Teel TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 700766749d0dSScott Teel c->Request.Timeout = 0; 700866749d0dSScott Teel c->Request.CDB[0] = BMIC_READ; 700966749d0dSScott Teel c->Request.CDB[1] = 0; 701066749d0dSScott Teel c->Request.CDB[2] = 0; 701166749d0dSScott Teel c->Request.CDB[3] = 0; 701266749d0dSScott Teel c->Request.CDB[4] = 0; 701366749d0dSScott Teel c->Request.CDB[5] = 0; 701466749d0dSScott Teel c->Request.CDB[6] = BMIC_IDENTIFY_CONTROLLER; 701566749d0dSScott Teel c->Request.CDB[7] = (size >> 16) & 0xFF; 701666749d0dSScott Teel c->Request.CDB[8] = (size >> 8) & 0XFF; 701766749d0dSScott Teel c->Request.CDB[9] = 0; 701866749d0dSScott Teel break; 7019edd16368SStephen M. Cameron default: 7020edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd); 7021edd16368SStephen M. Cameron BUG(); 7022a2dac136SStephen M. Cameron return -1; 7023edd16368SStephen M. Cameron } 7024edd16368SStephen M. Cameron } else if (cmd_type == TYPE_MSG) { 7025edd16368SStephen M. Cameron switch (cmd) { 7026edd16368SStephen M. Cameron 70270b9b7b6eSScott Teel case HPSA_PHYS_TARGET_RESET: 70280b9b7b6eSScott Teel c->Request.CDBLen = 16; 70290b9b7b6eSScott Teel c->Request.type_attr_dir = 70300b9b7b6eSScott Teel TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 70310b9b7b6eSScott Teel c->Request.Timeout = 0; /* Don't time out */ 70320b9b7b6eSScott Teel memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 70330b9b7b6eSScott Teel c->Request.CDB[0] = HPSA_RESET; 70340b9b7b6eSScott Teel c->Request.CDB[1] = HPSA_TARGET_RESET_TYPE; 70350b9b7b6eSScott Teel /* Physical target reset needs no control bytes 4-7*/ 70360b9b7b6eSScott Teel c->Request.CDB[4] = 0x00; 70370b9b7b6eSScott Teel c->Request.CDB[5] = 0x00; 70380b9b7b6eSScott Teel c->Request.CDB[6] = 0x00; 70390b9b7b6eSScott Teel c->Request.CDB[7] = 0x00; 70400b9b7b6eSScott Teel break; 7041edd16368SStephen M. Cameron case HPSA_DEVICE_RESET_MSG: 7042edd16368SStephen M. Cameron c->Request.CDBLen = 16; 7043a505b86fSStephen M. Cameron c->Request.type_attr_dir = 7044a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 7045edd16368SStephen M. Cameron c->Request.Timeout = 0; /* Don't time out */ 704664670ac8SStephen M. Cameron memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 704764670ac8SStephen M. Cameron c->Request.CDB[0] = cmd; 704821e89afdSStephen M. Cameron c->Request.CDB[1] = HPSA_RESET_TYPE_LUN; 7049edd16368SStephen M. Cameron /* If bytes 4-7 are zero, it means reset the */ 7050edd16368SStephen M. Cameron /* LunID device */ 7051edd16368SStephen M. Cameron c->Request.CDB[4] = 0x00; 7052edd16368SStephen M. Cameron c->Request.CDB[5] = 0x00; 7053edd16368SStephen M. Cameron c->Request.CDB[6] = 0x00; 7054edd16368SStephen M. Cameron c->Request.CDB[7] = 0x00; 7055edd16368SStephen M. Cameron break; 705675167d2cSStephen M. Cameron case HPSA_ABORT_MSG: 70579b5c48c2SStephen Cameron memcpy(&tag, buff, sizeof(tag)); 70582b08b3e9SDon Brace dev_dbg(&h->pdev->dev, 70599b5c48c2SStephen Cameron "Abort Tag:0x%016llx using rqst Tag:0x%016llx", 70609b5c48c2SStephen Cameron tag, c->Header.tag); 706175167d2cSStephen M. Cameron c->Request.CDBLen = 16; 7062a505b86fSStephen M. Cameron c->Request.type_attr_dir = 7063a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, 7064a505b86fSStephen M. Cameron ATTR_SIMPLE, XFER_WRITE); 706575167d2cSStephen M. Cameron c->Request.Timeout = 0; /* Don't time out */ 706675167d2cSStephen M. Cameron c->Request.CDB[0] = HPSA_TASK_MANAGEMENT; 706775167d2cSStephen M. Cameron c->Request.CDB[1] = HPSA_TMF_ABORT_TASK; 706875167d2cSStephen M. Cameron c->Request.CDB[2] = 0x00; /* reserved */ 706975167d2cSStephen M. Cameron c->Request.CDB[3] = 0x00; /* reserved */ 707075167d2cSStephen M. Cameron /* Tag to abort goes in CDB[4]-CDB[11] */ 70719b5c48c2SStephen Cameron memcpy(&c->Request.CDB[4], &tag, sizeof(tag)); 707275167d2cSStephen M. Cameron c->Request.CDB[12] = 0x00; /* reserved */ 707375167d2cSStephen M. Cameron c->Request.CDB[13] = 0x00; /* reserved */ 707475167d2cSStephen M. Cameron c->Request.CDB[14] = 0x00; /* reserved */ 707575167d2cSStephen M. Cameron c->Request.CDB[15] = 0x00; /* reserved */ 707675167d2cSStephen M. Cameron break; 7077edd16368SStephen M. Cameron default: 7078edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "unknown message type %d\n", 7079edd16368SStephen M. Cameron cmd); 7080edd16368SStephen M. Cameron BUG(); 7081edd16368SStephen M. Cameron } 7082edd16368SStephen M. Cameron } else { 7083edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type); 7084edd16368SStephen M. Cameron BUG(); 7085edd16368SStephen M. Cameron } 7086edd16368SStephen M. Cameron 7087a505b86fSStephen M. Cameron switch (GET_DIR(c->Request.type_attr_dir)) { 7088edd16368SStephen M. Cameron case XFER_READ: 7089edd16368SStephen M. Cameron pci_dir = PCI_DMA_FROMDEVICE; 7090edd16368SStephen M. Cameron break; 7091edd16368SStephen M. Cameron case XFER_WRITE: 7092edd16368SStephen M. Cameron pci_dir = PCI_DMA_TODEVICE; 7093edd16368SStephen M. Cameron break; 7094edd16368SStephen M. Cameron case XFER_NONE: 7095edd16368SStephen M. Cameron pci_dir = PCI_DMA_NONE; 7096edd16368SStephen M. Cameron break; 7097edd16368SStephen M. Cameron default: 7098edd16368SStephen M. Cameron pci_dir = PCI_DMA_BIDIRECTIONAL; 7099edd16368SStephen M. Cameron } 7100a2dac136SStephen M. Cameron if (hpsa_map_one(h->pdev, c, buff, size, pci_dir)) 7101a2dac136SStephen M. Cameron return -1; 7102a2dac136SStephen M. Cameron return 0; 7103edd16368SStephen M. Cameron } 7104edd16368SStephen M. Cameron 7105edd16368SStephen M. Cameron /* 7106edd16368SStephen M. Cameron * Map (physical) PCI mem into (virtual) kernel space 7107edd16368SStephen M. Cameron */ 7108edd16368SStephen M. Cameron static void __iomem *remap_pci_mem(ulong base, ulong size) 7109edd16368SStephen M. Cameron { 7110edd16368SStephen M. Cameron ulong page_base = ((ulong) base) & PAGE_MASK; 7111edd16368SStephen M. Cameron ulong page_offs = ((ulong) base) - page_base; 7112088ba34cSStephen M. Cameron void __iomem *page_remapped = ioremap_nocache(page_base, 7113088ba34cSStephen M. Cameron page_offs + size); 7114edd16368SStephen M. Cameron 7115edd16368SStephen M. Cameron return page_remapped ? (page_remapped + page_offs) : NULL; 7116edd16368SStephen M. Cameron } 7117edd16368SStephen M. Cameron 7118254f796bSMatt Gates static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q) 7119edd16368SStephen M. Cameron { 7120254f796bSMatt Gates return h->access.command_completed(h, q); 7121edd16368SStephen M. Cameron } 7122edd16368SStephen M. Cameron 7123900c5440SStephen M. Cameron static inline bool interrupt_pending(struct ctlr_info *h) 7124edd16368SStephen M. Cameron { 7125edd16368SStephen M. Cameron return h->access.intr_pending(h); 7126edd16368SStephen M. Cameron } 7127edd16368SStephen M. Cameron 7128edd16368SStephen M. Cameron static inline long interrupt_not_for_us(struct ctlr_info *h) 7129edd16368SStephen M. Cameron { 713010f66018SStephen M. Cameron return (h->access.intr_pending(h) == 0) || 713110f66018SStephen M. Cameron (h->interrupts_enabled == 0); 7132edd16368SStephen M. Cameron } 7133edd16368SStephen M. Cameron 713401a02ffcSStephen M. Cameron static inline int bad_tag(struct ctlr_info *h, u32 tag_index, 713501a02ffcSStephen M. Cameron u32 raw_tag) 7136edd16368SStephen M. Cameron { 7137edd16368SStephen M. Cameron if (unlikely(tag_index >= h->nr_cmds)) { 7138edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag); 7139edd16368SStephen M. Cameron return 1; 7140edd16368SStephen M. Cameron } 7141edd16368SStephen M. Cameron return 0; 7142edd16368SStephen M. Cameron } 7143edd16368SStephen M. Cameron 71445a3d16f5SStephen M. Cameron static inline void finish_cmd(struct CommandList *c) 7145edd16368SStephen M. Cameron { 7146e85c5974SStephen M. Cameron dial_up_lockup_detection_on_fw_flash_complete(c->h, c); 7147c349775eSScott Teel if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI 7148c349775eSScott Teel || c->cmd_type == CMD_IOACCEL2)) 71491fb011fbSStephen M. Cameron complete_scsi_command(c); 71508be986ccSStephen Cameron else if (c->cmd_type == CMD_IOCTL_PEND || c->cmd_type == IOACCEL2_TMF) 7151edd16368SStephen M. Cameron complete(c->waiting); 7152a104c99fSStephen M. Cameron } 7153a104c99fSStephen M. Cameron 7154303932fdSDon Brace /* process completion of an indexed ("direct lookup") command */ 71551d94f94dSStephen M. Cameron static inline void process_indexed_cmd(struct ctlr_info *h, 7156303932fdSDon Brace u32 raw_tag) 7157303932fdSDon Brace { 7158303932fdSDon Brace u32 tag_index; 7159303932fdSDon Brace struct CommandList *c; 7160303932fdSDon Brace 7161f2405db8SDon Brace tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT; 71621d94f94dSStephen M. Cameron if (!bad_tag(h, tag_index, raw_tag)) { 7163303932fdSDon Brace c = h->cmd_pool + tag_index; 71645a3d16f5SStephen M. Cameron finish_cmd(c); 71651d94f94dSStephen M. Cameron } 7166303932fdSDon Brace } 7167303932fdSDon Brace 716864670ac8SStephen M. Cameron /* Some controllers, like p400, will give us one interrupt 716964670ac8SStephen M. Cameron * after a soft reset, even if we turned interrupts off. 717064670ac8SStephen M. Cameron * Only need to check for this in the hpsa_xxx_discard_completions 717164670ac8SStephen M. Cameron * functions. 717264670ac8SStephen M. Cameron */ 717364670ac8SStephen M. Cameron static int ignore_bogus_interrupt(struct ctlr_info *h) 717464670ac8SStephen M. Cameron { 717564670ac8SStephen M. Cameron if (likely(!reset_devices)) 717664670ac8SStephen M. Cameron return 0; 717764670ac8SStephen M. Cameron 717864670ac8SStephen M. Cameron if (likely(h->interrupts_enabled)) 717964670ac8SStephen M. Cameron return 0; 718064670ac8SStephen M. Cameron 718164670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled " 718264670ac8SStephen M. Cameron "(known firmware bug.) Ignoring.\n"); 718364670ac8SStephen M. Cameron 718464670ac8SStephen M. Cameron return 1; 718564670ac8SStephen M. Cameron } 718664670ac8SStephen M. Cameron 7187254f796bSMatt Gates /* 7188254f796bSMatt Gates * Convert &h->q[x] (passed to interrupt handlers) back to h. 7189254f796bSMatt Gates * Relies on (h-q[x] == x) being true for x such that 7190254f796bSMatt Gates * 0 <= x < MAX_REPLY_QUEUES. 7191254f796bSMatt Gates */ 7192254f796bSMatt Gates static struct ctlr_info *queue_to_hba(u8 *queue) 719364670ac8SStephen M. Cameron { 7194254f796bSMatt Gates return container_of((queue - *queue), struct ctlr_info, q[0]); 7195254f796bSMatt Gates } 7196254f796bSMatt Gates 7197254f796bSMatt Gates static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue) 7198254f796bSMatt Gates { 7199254f796bSMatt Gates struct ctlr_info *h = queue_to_hba(queue); 7200254f796bSMatt Gates u8 q = *(u8 *) queue; 720164670ac8SStephen M. Cameron u32 raw_tag; 720264670ac8SStephen M. Cameron 720364670ac8SStephen M. Cameron if (ignore_bogus_interrupt(h)) 720464670ac8SStephen M. Cameron return IRQ_NONE; 720564670ac8SStephen M. Cameron 720664670ac8SStephen M. Cameron if (interrupt_not_for_us(h)) 720764670ac8SStephen M. Cameron return IRQ_NONE; 7208a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 720964670ac8SStephen M. Cameron while (interrupt_pending(h)) { 7210254f796bSMatt Gates raw_tag = get_next_completion(h, q); 721164670ac8SStephen M. Cameron while (raw_tag != FIFO_EMPTY) 7212254f796bSMatt Gates raw_tag = next_command(h, q); 721364670ac8SStephen M. Cameron } 721464670ac8SStephen M. Cameron return IRQ_HANDLED; 721564670ac8SStephen M. Cameron } 721664670ac8SStephen M. Cameron 7217254f796bSMatt Gates static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue) 721864670ac8SStephen M. Cameron { 7219254f796bSMatt Gates struct ctlr_info *h = queue_to_hba(queue); 722064670ac8SStephen M. Cameron u32 raw_tag; 7221254f796bSMatt Gates u8 q = *(u8 *) queue; 722264670ac8SStephen M. Cameron 722364670ac8SStephen M. Cameron if (ignore_bogus_interrupt(h)) 722464670ac8SStephen M. Cameron return IRQ_NONE; 722564670ac8SStephen M. Cameron 7226a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 7227254f796bSMatt Gates raw_tag = get_next_completion(h, q); 722864670ac8SStephen M. Cameron while (raw_tag != FIFO_EMPTY) 7229254f796bSMatt Gates raw_tag = next_command(h, q); 723064670ac8SStephen M. Cameron return IRQ_HANDLED; 723164670ac8SStephen M. Cameron } 723264670ac8SStephen M. Cameron 7233254f796bSMatt Gates static irqreturn_t do_hpsa_intr_intx(int irq, void *queue) 7234edd16368SStephen M. Cameron { 7235254f796bSMatt Gates struct ctlr_info *h = queue_to_hba((u8 *) queue); 7236303932fdSDon Brace u32 raw_tag; 7237254f796bSMatt Gates u8 q = *(u8 *) queue; 7238edd16368SStephen M. Cameron 7239edd16368SStephen M. Cameron if (interrupt_not_for_us(h)) 7240edd16368SStephen M. Cameron return IRQ_NONE; 7241a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 724210f66018SStephen M. Cameron while (interrupt_pending(h)) { 7243254f796bSMatt Gates raw_tag = get_next_completion(h, q); 724410f66018SStephen M. Cameron while (raw_tag != FIFO_EMPTY) { 72451d94f94dSStephen M. Cameron process_indexed_cmd(h, raw_tag); 7246254f796bSMatt Gates raw_tag = next_command(h, q); 724710f66018SStephen M. Cameron } 724810f66018SStephen M. Cameron } 724910f66018SStephen M. Cameron return IRQ_HANDLED; 725010f66018SStephen M. Cameron } 725110f66018SStephen M. Cameron 7252254f796bSMatt Gates static irqreturn_t do_hpsa_intr_msi(int irq, void *queue) 725310f66018SStephen M. Cameron { 7254254f796bSMatt Gates struct ctlr_info *h = queue_to_hba(queue); 725510f66018SStephen M. Cameron u32 raw_tag; 7256254f796bSMatt Gates u8 q = *(u8 *) queue; 725710f66018SStephen M. Cameron 7258a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 7259254f796bSMatt Gates raw_tag = get_next_completion(h, q); 7260303932fdSDon Brace while (raw_tag != FIFO_EMPTY) { 72611d94f94dSStephen M. Cameron process_indexed_cmd(h, raw_tag); 7262254f796bSMatt Gates raw_tag = next_command(h, q); 7263edd16368SStephen M. Cameron } 7264edd16368SStephen M. Cameron return IRQ_HANDLED; 7265edd16368SStephen M. Cameron } 7266edd16368SStephen M. Cameron 7267a9a3a273SStephen M. Cameron /* Send a message CDB to the firmware. Careful, this only works 7268a9a3a273SStephen M. Cameron * in simple mode, not performant mode due to the tag lookup. 7269a9a3a273SStephen M. Cameron * We only ever use this immediately after a controller reset. 7270a9a3a273SStephen M. Cameron */ 72716f039790SGreg Kroah-Hartman static int hpsa_message(struct pci_dev *pdev, unsigned char opcode, 7272edd16368SStephen M. Cameron unsigned char type) 7273edd16368SStephen M. Cameron { 7274edd16368SStephen M. Cameron struct Command { 7275edd16368SStephen M. Cameron struct CommandListHeader CommandHeader; 7276edd16368SStephen M. Cameron struct RequestBlock Request; 7277edd16368SStephen M. Cameron struct ErrDescriptor ErrorDescriptor; 7278edd16368SStephen M. Cameron }; 7279edd16368SStephen M. Cameron struct Command *cmd; 7280edd16368SStephen M. Cameron static const size_t cmd_sz = sizeof(*cmd) + 7281edd16368SStephen M. Cameron sizeof(cmd->ErrorDescriptor); 7282edd16368SStephen M. Cameron dma_addr_t paddr64; 72832b08b3e9SDon Brace __le32 paddr32; 72842b08b3e9SDon Brace u32 tag; 7285edd16368SStephen M. Cameron void __iomem *vaddr; 7286edd16368SStephen M. Cameron int i, err; 7287edd16368SStephen M. Cameron 7288edd16368SStephen M. Cameron vaddr = pci_ioremap_bar(pdev, 0); 7289edd16368SStephen M. Cameron if (vaddr == NULL) 7290edd16368SStephen M. Cameron return -ENOMEM; 7291edd16368SStephen M. Cameron 7292edd16368SStephen M. Cameron /* The Inbound Post Queue only accepts 32-bit physical addresses for the 7293edd16368SStephen M. Cameron * CCISS commands, so they must be allocated from the lower 4GiB of 7294edd16368SStephen M. Cameron * memory. 7295edd16368SStephen M. Cameron */ 7296edd16368SStephen M. Cameron err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 7297edd16368SStephen M. Cameron if (err) { 7298edd16368SStephen M. Cameron iounmap(vaddr); 72991eaec8f3SRobert Elliott return err; 7300edd16368SStephen M. Cameron } 7301edd16368SStephen M. Cameron 7302edd16368SStephen M. Cameron cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64); 7303edd16368SStephen M. Cameron if (cmd == NULL) { 7304edd16368SStephen M. Cameron iounmap(vaddr); 7305edd16368SStephen M. Cameron return -ENOMEM; 7306edd16368SStephen M. Cameron } 7307edd16368SStephen M. Cameron 7308edd16368SStephen M. Cameron /* This must fit, because of the 32-bit consistent DMA mask. Also, 7309edd16368SStephen M. Cameron * although there's no guarantee, we assume that the address is at 7310edd16368SStephen M. Cameron * least 4-byte aligned (most likely, it's page-aligned). 7311edd16368SStephen M. Cameron */ 73122b08b3e9SDon Brace paddr32 = cpu_to_le32(paddr64); 7313edd16368SStephen M. Cameron 7314edd16368SStephen M. Cameron cmd->CommandHeader.ReplyQueue = 0; 7315edd16368SStephen M. Cameron cmd->CommandHeader.SGList = 0; 731650a0decfSStephen M. Cameron cmd->CommandHeader.SGTotal = cpu_to_le16(0); 73172b08b3e9SDon Brace cmd->CommandHeader.tag = cpu_to_le64(paddr64); 7318edd16368SStephen M. Cameron memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8); 7319edd16368SStephen M. Cameron 7320edd16368SStephen M. Cameron cmd->Request.CDBLen = 16; 7321a505b86fSStephen M. Cameron cmd->Request.type_attr_dir = 7322a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE); 7323edd16368SStephen M. Cameron cmd->Request.Timeout = 0; /* Don't time out */ 7324edd16368SStephen M. Cameron cmd->Request.CDB[0] = opcode; 7325edd16368SStephen M. Cameron cmd->Request.CDB[1] = type; 7326edd16368SStephen M. Cameron memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */ 732750a0decfSStephen M. Cameron cmd->ErrorDescriptor.Addr = 73282b08b3e9SDon Brace cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd))); 732950a0decfSStephen M. Cameron cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo)); 7330edd16368SStephen M. Cameron 73312b08b3e9SDon Brace writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET); 7332edd16368SStephen M. Cameron 7333edd16368SStephen M. Cameron for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) { 7334edd16368SStephen M. Cameron tag = readl(vaddr + SA5_REPLY_PORT_OFFSET); 73352b08b3e9SDon Brace if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64) 7336edd16368SStephen M. Cameron break; 7337edd16368SStephen M. Cameron msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS); 7338edd16368SStephen M. Cameron } 7339edd16368SStephen M. Cameron 7340edd16368SStephen M. Cameron iounmap(vaddr); 7341edd16368SStephen M. Cameron 7342edd16368SStephen M. Cameron /* we leak the DMA buffer here ... no choice since the controller could 7343edd16368SStephen M. Cameron * still complete the command. 7344edd16368SStephen M. Cameron */ 7345edd16368SStephen M. Cameron if (i == HPSA_MSG_SEND_RETRY_LIMIT) { 7346edd16368SStephen M. Cameron dev_err(&pdev->dev, "controller message %02x:%02x timed out\n", 7347edd16368SStephen M. Cameron opcode, type); 7348edd16368SStephen M. Cameron return -ETIMEDOUT; 7349edd16368SStephen M. Cameron } 7350edd16368SStephen M. Cameron 7351edd16368SStephen M. Cameron pci_free_consistent(pdev, cmd_sz, cmd, paddr64); 7352edd16368SStephen M. Cameron 7353edd16368SStephen M. Cameron if (tag & HPSA_ERROR_BIT) { 7354edd16368SStephen M. Cameron dev_err(&pdev->dev, "controller message %02x:%02x failed\n", 7355edd16368SStephen M. Cameron opcode, type); 7356edd16368SStephen M. Cameron return -EIO; 7357edd16368SStephen M. Cameron } 7358edd16368SStephen M. Cameron 7359edd16368SStephen M. Cameron dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n", 7360edd16368SStephen M. Cameron opcode, type); 7361edd16368SStephen M. Cameron return 0; 7362edd16368SStephen M. Cameron } 7363edd16368SStephen M. Cameron 7364edd16368SStephen M. Cameron #define hpsa_noop(p) hpsa_message(p, 3, 0) 7365edd16368SStephen M. Cameron 73661df8552aSStephen M. Cameron static int hpsa_controller_hard_reset(struct pci_dev *pdev, 736742a91641SDon Brace void __iomem *vaddr, u32 use_doorbell) 7368edd16368SStephen M. Cameron { 7369edd16368SStephen M. Cameron 73701df8552aSStephen M. Cameron if (use_doorbell) { 73711df8552aSStephen M. Cameron /* For everything after the P600, the PCI power state method 73721df8552aSStephen M. Cameron * of resetting the controller doesn't work, so we have this 73731df8552aSStephen M. Cameron * other way using the doorbell register. 7374edd16368SStephen M. Cameron */ 73751df8552aSStephen M. Cameron dev_info(&pdev->dev, "using doorbell to reset controller\n"); 7376cf0b08d0SStephen M. Cameron writel(use_doorbell, vaddr + SA5_DOORBELL); 737785009239SStephen M. Cameron 737800701a96SJustin Lindley /* PMC hardware guys tell us we need a 10 second delay after 737985009239SStephen M. Cameron * doorbell reset and before any attempt to talk to the board 738085009239SStephen M. Cameron * at all to ensure that this actually works and doesn't fall 738185009239SStephen M. Cameron * over in some weird corner cases. 738285009239SStephen M. Cameron */ 738300701a96SJustin Lindley msleep(10000); 73841df8552aSStephen M. Cameron } else { /* Try to do it the PCI power state way */ 7385edd16368SStephen M. Cameron 7386edd16368SStephen M. Cameron /* Quoting from the Open CISS Specification: "The Power 7387edd16368SStephen M. Cameron * Management Control/Status Register (CSR) controls the power 7388edd16368SStephen M. Cameron * state of the device. The normal operating state is D0, 7389edd16368SStephen M. Cameron * CSR=00h. The software off state is D3, CSR=03h. To reset 73901df8552aSStephen M. Cameron * the controller, place the interface device in D3 then to D0, 73911df8552aSStephen M. Cameron * this causes a secondary PCI reset which will reset the 73921df8552aSStephen M. Cameron * controller." */ 7393edd16368SStephen M. Cameron 73942662cab8SDon Brace int rc = 0; 73952662cab8SDon Brace 73961df8552aSStephen M. Cameron dev_info(&pdev->dev, "using PCI PM to reset controller\n"); 73972662cab8SDon Brace 7398edd16368SStephen M. Cameron /* enter the D3hot power management state */ 73992662cab8SDon Brace rc = pci_set_power_state(pdev, PCI_D3hot); 74002662cab8SDon Brace if (rc) 74012662cab8SDon Brace return rc; 7402edd16368SStephen M. Cameron 7403edd16368SStephen M. Cameron msleep(500); 7404edd16368SStephen M. Cameron 7405edd16368SStephen M. Cameron /* enter the D0 power management state */ 74062662cab8SDon Brace rc = pci_set_power_state(pdev, PCI_D0); 74072662cab8SDon Brace if (rc) 74082662cab8SDon Brace return rc; 7409c4853efeSMike Miller 7410c4853efeSMike Miller /* 7411c4853efeSMike Miller * The P600 requires a small delay when changing states. 7412c4853efeSMike Miller * Otherwise we may think the board did not reset and we bail. 7413c4853efeSMike Miller * This for kdump only and is particular to the P600. 7414c4853efeSMike Miller */ 7415c4853efeSMike Miller msleep(500); 74161df8552aSStephen M. Cameron } 74171df8552aSStephen M. Cameron return 0; 74181df8552aSStephen M. Cameron } 74191df8552aSStephen M. Cameron 74206f039790SGreg Kroah-Hartman static void init_driver_version(char *driver_version, int len) 7421580ada3cSStephen M. Cameron { 7422580ada3cSStephen M. Cameron memset(driver_version, 0, len); 7423f79cfec6SStephen M. Cameron strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1); 7424580ada3cSStephen M. Cameron } 7425580ada3cSStephen M. Cameron 74266f039790SGreg Kroah-Hartman static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable) 7427580ada3cSStephen M. Cameron { 7428580ada3cSStephen M. Cameron char *driver_version; 7429580ada3cSStephen M. Cameron int i, size = sizeof(cfgtable->driver_version); 7430580ada3cSStephen M. Cameron 7431580ada3cSStephen M. Cameron driver_version = kmalloc(size, GFP_KERNEL); 7432580ada3cSStephen M. Cameron if (!driver_version) 7433580ada3cSStephen M. Cameron return -ENOMEM; 7434580ada3cSStephen M. Cameron 7435580ada3cSStephen M. Cameron init_driver_version(driver_version, size); 7436580ada3cSStephen M. Cameron for (i = 0; i < size; i++) 7437580ada3cSStephen M. Cameron writeb(driver_version[i], &cfgtable->driver_version[i]); 7438580ada3cSStephen M. Cameron kfree(driver_version); 7439580ada3cSStephen M. Cameron return 0; 7440580ada3cSStephen M. Cameron } 7441580ada3cSStephen M. Cameron 74426f039790SGreg Kroah-Hartman static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable, 74436f039790SGreg Kroah-Hartman unsigned char *driver_ver) 7444580ada3cSStephen M. Cameron { 7445580ada3cSStephen M. Cameron int i; 7446580ada3cSStephen M. Cameron 7447580ada3cSStephen M. Cameron for (i = 0; i < sizeof(cfgtable->driver_version); i++) 7448580ada3cSStephen M. Cameron driver_ver[i] = readb(&cfgtable->driver_version[i]); 7449580ada3cSStephen M. Cameron } 7450580ada3cSStephen M. Cameron 74516f039790SGreg Kroah-Hartman static int controller_reset_failed(struct CfgTable __iomem *cfgtable) 7452580ada3cSStephen M. Cameron { 7453580ada3cSStephen M. Cameron 7454580ada3cSStephen M. Cameron char *driver_ver, *old_driver_ver; 7455580ada3cSStephen M. Cameron int rc, size = sizeof(cfgtable->driver_version); 7456580ada3cSStephen M. Cameron 7457580ada3cSStephen M. Cameron old_driver_ver = kmalloc(2 * size, GFP_KERNEL); 7458580ada3cSStephen M. Cameron if (!old_driver_ver) 7459580ada3cSStephen M. Cameron return -ENOMEM; 7460580ada3cSStephen M. Cameron driver_ver = old_driver_ver + size; 7461580ada3cSStephen M. Cameron 7462580ada3cSStephen M. Cameron /* After a reset, the 32 bytes of "driver version" in the cfgtable 7463580ada3cSStephen M. Cameron * should have been changed, otherwise we know the reset failed. 7464580ada3cSStephen M. Cameron */ 7465580ada3cSStephen M. Cameron init_driver_version(old_driver_ver, size); 7466580ada3cSStephen M. Cameron read_driver_ver_from_cfgtable(cfgtable, driver_ver); 7467580ada3cSStephen M. Cameron rc = !memcmp(driver_ver, old_driver_ver, size); 7468580ada3cSStephen M. Cameron kfree(old_driver_ver); 7469580ada3cSStephen M. Cameron return rc; 7470580ada3cSStephen M. Cameron } 74711df8552aSStephen M. Cameron /* This does a hard reset of the controller using PCI power management 74721df8552aSStephen M. Cameron * states or the using the doorbell register. 74731df8552aSStephen M. Cameron */ 74746b6c1cd7STomas Henzl static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id) 74751df8552aSStephen M. Cameron { 74761df8552aSStephen M. Cameron u64 cfg_offset; 74771df8552aSStephen M. Cameron u32 cfg_base_addr; 74781df8552aSStephen M. Cameron u64 cfg_base_addr_index; 74791df8552aSStephen M. Cameron void __iomem *vaddr; 74801df8552aSStephen M. Cameron unsigned long paddr; 7481580ada3cSStephen M. Cameron u32 misc_fw_support; 7482270d05deSStephen M. Cameron int rc; 74831df8552aSStephen M. Cameron struct CfgTable __iomem *cfgtable; 7484cf0b08d0SStephen M. Cameron u32 use_doorbell; 7485270d05deSStephen M. Cameron u16 command_register; 74861df8552aSStephen M. Cameron 74871df8552aSStephen M. Cameron /* For controllers as old as the P600, this is very nearly 74881df8552aSStephen M. Cameron * the same thing as 74891df8552aSStephen M. Cameron * 74901df8552aSStephen M. Cameron * pci_save_state(pci_dev); 74911df8552aSStephen M. Cameron * pci_set_power_state(pci_dev, PCI_D3hot); 74921df8552aSStephen M. Cameron * pci_set_power_state(pci_dev, PCI_D0); 74931df8552aSStephen M. Cameron * pci_restore_state(pci_dev); 74941df8552aSStephen M. Cameron * 74951df8552aSStephen M. Cameron * For controllers newer than the P600, the pci power state 74961df8552aSStephen M. Cameron * method of resetting doesn't work so we have another way 74971df8552aSStephen M. Cameron * using the doorbell register. 74981df8552aSStephen M. Cameron */ 749918867659SStephen M. Cameron 750060f923b9SRobert Elliott if (!ctlr_is_resettable(board_id)) { 750160f923b9SRobert Elliott dev_warn(&pdev->dev, "Controller not resettable\n"); 750225c1e56aSStephen M. Cameron return -ENODEV; 750325c1e56aSStephen M. Cameron } 750446380786SStephen M. Cameron 750546380786SStephen M. Cameron /* if controller is soft- but not hard resettable... */ 750646380786SStephen M. Cameron if (!ctlr_is_hard_resettable(board_id)) 750746380786SStephen M. Cameron return -ENOTSUPP; /* try soft reset later. */ 750818867659SStephen M. Cameron 7509270d05deSStephen M. Cameron /* Save the PCI command register */ 7510270d05deSStephen M. Cameron pci_read_config_word(pdev, 4, &command_register); 7511270d05deSStephen M. Cameron pci_save_state(pdev); 75121df8552aSStephen M. Cameron 75131df8552aSStephen M. Cameron /* find the first memory BAR, so we can find the cfg table */ 75141df8552aSStephen M. Cameron rc = hpsa_pci_find_memory_BAR(pdev, &paddr); 75151df8552aSStephen M. Cameron if (rc) 75161df8552aSStephen M. Cameron return rc; 75171df8552aSStephen M. Cameron vaddr = remap_pci_mem(paddr, 0x250); 75181df8552aSStephen M. Cameron if (!vaddr) 75191df8552aSStephen M. Cameron return -ENOMEM; 75201df8552aSStephen M. Cameron 75211df8552aSStephen M. Cameron /* find cfgtable in order to check if reset via doorbell is supported */ 75221df8552aSStephen M. Cameron rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr, 75231df8552aSStephen M. Cameron &cfg_base_addr_index, &cfg_offset); 75241df8552aSStephen M. Cameron if (rc) 75251df8552aSStephen M. Cameron goto unmap_vaddr; 75261df8552aSStephen M. Cameron cfgtable = remap_pci_mem(pci_resource_start(pdev, 75271df8552aSStephen M. Cameron cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable)); 75281df8552aSStephen M. Cameron if (!cfgtable) { 75291df8552aSStephen M. Cameron rc = -ENOMEM; 75301df8552aSStephen M. Cameron goto unmap_vaddr; 75311df8552aSStephen M. Cameron } 7532580ada3cSStephen M. Cameron rc = write_driver_ver_to_cfgtable(cfgtable); 7533580ada3cSStephen M. Cameron if (rc) 753403741d95STomas Henzl goto unmap_cfgtable; 75351df8552aSStephen M. Cameron 7536cf0b08d0SStephen M. Cameron /* If reset via doorbell register is supported, use that. 7537cf0b08d0SStephen M. Cameron * There are two such methods. Favor the newest method. 7538cf0b08d0SStephen M. Cameron */ 75391df8552aSStephen M. Cameron misc_fw_support = readl(&cfgtable->misc_fw_support); 7540cf0b08d0SStephen M. Cameron use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2; 7541cf0b08d0SStephen M. Cameron if (use_doorbell) { 7542cf0b08d0SStephen M. Cameron use_doorbell = DOORBELL_CTLR_RESET2; 7543cf0b08d0SStephen M. Cameron } else { 75441df8552aSStephen M. Cameron use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET; 7545cf0b08d0SStephen M. Cameron if (use_doorbell) { 7546050f7147SStephen Cameron dev_warn(&pdev->dev, 7547050f7147SStephen Cameron "Soft reset not supported. Firmware update is required.\n"); 754864670ac8SStephen M. Cameron rc = -ENOTSUPP; /* try soft reset */ 7549cf0b08d0SStephen M. Cameron goto unmap_cfgtable; 7550cf0b08d0SStephen M. Cameron } 7551cf0b08d0SStephen M. Cameron } 75521df8552aSStephen M. Cameron 75531df8552aSStephen M. Cameron rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell); 75541df8552aSStephen M. Cameron if (rc) 75551df8552aSStephen M. Cameron goto unmap_cfgtable; 7556edd16368SStephen M. Cameron 7557270d05deSStephen M. Cameron pci_restore_state(pdev); 7558270d05deSStephen M. Cameron pci_write_config_word(pdev, 4, command_register); 7559edd16368SStephen M. Cameron 75601df8552aSStephen M. Cameron /* Some devices (notably the HP Smart Array 5i Controller) 75611df8552aSStephen M. Cameron need a little pause here */ 75621df8552aSStephen M. Cameron msleep(HPSA_POST_RESET_PAUSE_MSECS); 75631df8552aSStephen M. Cameron 7564fe5389c8SStephen M. Cameron rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY); 7565fe5389c8SStephen M. Cameron if (rc) { 7566fe5389c8SStephen M. Cameron dev_warn(&pdev->dev, 7567050f7147SStephen Cameron "Failed waiting for board to become ready after hard reset\n"); 7568fe5389c8SStephen M. Cameron goto unmap_cfgtable; 7569fe5389c8SStephen M. Cameron } 7570fe5389c8SStephen M. Cameron 7571580ada3cSStephen M. Cameron rc = controller_reset_failed(vaddr); 7572580ada3cSStephen M. Cameron if (rc < 0) 7573580ada3cSStephen M. Cameron goto unmap_cfgtable; 7574580ada3cSStephen M. Cameron if (rc) { 757564670ac8SStephen M. Cameron dev_warn(&pdev->dev, "Unable to successfully reset " 757664670ac8SStephen M. Cameron "controller. Will try soft reset.\n"); 757764670ac8SStephen M. Cameron rc = -ENOTSUPP; 7578580ada3cSStephen M. Cameron } else { 757964670ac8SStephen M. Cameron dev_info(&pdev->dev, "board ready after hard reset.\n"); 75801df8552aSStephen M. Cameron } 75811df8552aSStephen M. Cameron 75821df8552aSStephen M. Cameron unmap_cfgtable: 75831df8552aSStephen M. Cameron iounmap(cfgtable); 75841df8552aSStephen M. Cameron 75851df8552aSStephen M. Cameron unmap_vaddr: 75861df8552aSStephen M. Cameron iounmap(vaddr); 75871df8552aSStephen M. Cameron return rc; 7588edd16368SStephen M. Cameron } 7589edd16368SStephen M. Cameron 7590edd16368SStephen M. Cameron /* 7591edd16368SStephen M. Cameron * We cannot read the structure directly, for portability we must use 7592edd16368SStephen M. Cameron * the io functions. 7593edd16368SStephen M. Cameron * This is for debug only. 7594edd16368SStephen M. Cameron */ 759542a91641SDon Brace static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb) 7596edd16368SStephen M. Cameron { 759758f8665cSStephen M. Cameron #ifdef HPSA_DEBUG 7598edd16368SStephen M. Cameron int i; 7599edd16368SStephen M. Cameron char temp_name[17]; 7600edd16368SStephen M. Cameron 7601edd16368SStephen M. Cameron dev_info(dev, "Controller Configuration information\n"); 7602edd16368SStephen M. Cameron dev_info(dev, "------------------------------------\n"); 7603edd16368SStephen M. Cameron for (i = 0; i < 4; i++) 7604edd16368SStephen M. Cameron temp_name[i] = readb(&(tb->Signature[i])); 7605edd16368SStephen M. Cameron temp_name[4] = '\0'; 7606edd16368SStephen M. Cameron dev_info(dev, " Signature = %s\n", temp_name); 7607edd16368SStephen M. Cameron dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence))); 7608edd16368SStephen M. Cameron dev_info(dev, " Transport methods supported = 0x%x\n", 7609edd16368SStephen M. Cameron readl(&(tb->TransportSupport))); 7610edd16368SStephen M. Cameron dev_info(dev, " Transport methods active = 0x%x\n", 7611edd16368SStephen M. Cameron readl(&(tb->TransportActive))); 7612edd16368SStephen M. Cameron dev_info(dev, " Requested transport Method = 0x%x\n", 7613edd16368SStephen M. Cameron readl(&(tb->HostWrite.TransportRequest))); 7614edd16368SStephen M. Cameron dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n", 7615edd16368SStephen M. Cameron readl(&(tb->HostWrite.CoalIntDelay))); 7616edd16368SStephen M. Cameron dev_info(dev, " Coalesce Interrupt Count = 0x%x\n", 7617edd16368SStephen M. Cameron readl(&(tb->HostWrite.CoalIntCount))); 761869d6e33dSRobert Elliott dev_info(dev, " Max outstanding commands = %d\n", 7619edd16368SStephen M. Cameron readl(&(tb->CmdsOutMax))); 7620edd16368SStephen M. Cameron dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes))); 7621edd16368SStephen M. Cameron for (i = 0; i < 16; i++) 7622edd16368SStephen M. Cameron temp_name[i] = readb(&(tb->ServerName[i])); 7623edd16368SStephen M. Cameron temp_name[16] = '\0'; 7624edd16368SStephen M. Cameron dev_info(dev, " Server Name = %s\n", temp_name); 7625edd16368SStephen M. Cameron dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n", 7626edd16368SStephen M. Cameron readl(&(tb->HeartBeat))); 7627edd16368SStephen M. Cameron #endif /* HPSA_DEBUG */ 762858f8665cSStephen M. Cameron } 7629edd16368SStephen M. Cameron 7630edd16368SStephen M. Cameron static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr) 7631edd16368SStephen M. Cameron { 7632edd16368SStephen M. Cameron int i, offset, mem_type, bar_type; 7633edd16368SStephen M. Cameron 7634edd16368SStephen M. Cameron if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */ 7635edd16368SStephen M. Cameron return 0; 7636edd16368SStephen M. Cameron offset = 0; 7637edd16368SStephen M. Cameron for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { 7638edd16368SStephen M. Cameron bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE; 7639edd16368SStephen M. Cameron if (bar_type == PCI_BASE_ADDRESS_SPACE_IO) 7640edd16368SStephen M. Cameron offset += 4; 7641edd16368SStephen M. Cameron else { 7642edd16368SStephen M. Cameron mem_type = pci_resource_flags(pdev, i) & 7643edd16368SStephen M. Cameron PCI_BASE_ADDRESS_MEM_TYPE_MASK; 7644edd16368SStephen M. Cameron switch (mem_type) { 7645edd16368SStephen M. Cameron case PCI_BASE_ADDRESS_MEM_TYPE_32: 7646edd16368SStephen M. Cameron case PCI_BASE_ADDRESS_MEM_TYPE_1M: 7647edd16368SStephen M. Cameron offset += 4; /* 32 bit */ 7648edd16368SStephen M. Cameron break; 7649edd16368SStephen M. Cameron case PCI_BASE_ADDRESS_MEM_TYPE_64: 7650edd16368SStephen M. Cameron offset += 8; 7651edd16368SStephen M. Cameron break; 7652edd16368SStephen M. Cameron default: /* reserved in PCI 2.2 */ 7653edd16368SStephen M. Cameron dev_warn(&pdev->dev, 7654edd16368SStephen M. Cameron "base address is invalid\n"); 7655edd16368SStephen M. Cameron return -1; 7656edd16368SStephen M. Cameron break; 7657edd16368SStephen M. Cameron } 7658edd16368SStephen M. Cameron } 7659edd16368SStephen M. Cameron if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0) 7660edd16368SStephen M. Cameron return i + 1; 7661edd16368SStephen M. Cameron } 7662edd16368SStephen M. Cameron return -1; 7663edd16368SStephen M. Cameron } 7664edd16368SStephen M. Cameron 7665cc64c817SRobert Elliott static void hpsa_disable_interrupt_mode(struct ctlr_info *h) 7666cc64c817SRobert Elliott { 7667bc2bb154SChristoph Hellwig pci_free_irq_vectors(h->pdev); 7668bc2bb154SChristoph Hellwig h->msix_vectors = 0; 7669cc64c817SRobert Elliott } 7670cc64c817SRobert Elliott 7671edd16368SStephen M. Cameron /* If MSI/MSI-X is supported by the kernel we will try to enable it on 7672050f7147SStephen Cameron * controllers that are capable. If not, we use legacy INTx mode. 7673edd16368SStephen M. Cameron */ 7674bc2bb154SChristoph Hellwig static int hpsa_interrupt_mode(struct ctlr_info *h) 7675edd16368SStephen M. Cameron { 7676bc2bb154SChristoph Hellwig unsigned int flags = PCI_IRQ_LEGACY; 7677bc2bb154SChristoph Hellwig int ret; 7678edd16368SStephen M. Cameron 7679edd16368SStephen M. Cameron /* Some boards advertise MSI but don't really support it */ 7680bc2bb154SChristoph Hellwig switch (h->board_id) { 7681bc2bb154SChristoph Hellwig case 0x40700E11: 7682bc2bb154SChristoph Hellwig case 0x40800E11: 7683bc2bb154SChristoph Hellwig case 0x40820E11: 7684bc2bb154SChristoph Hellwig case 0x40830E11: 7685bc2bb154SChristoph Hellwig break; 7686bc2bb154SChristoph Hellwig default: 7687bc2bb154SChristoph Hellwig ret = pci_alloc_irq_vectors(h->pdev, 1, MAX_REPLY_QUEUES, 7688bc2bb154SChristoph Hellwig PCI_IRQ_MSIX | PCI_IRQ_AFFINITY); 7689bc2bb154SChristoph Hellwig if (ret > 0) { 7690bc2bb154SChristoph Hellwig h->msix_vectors = ret; 7691bc2bb154SChristoph Hellwig return 0; 7692eee0f03aSHannes Reinecke } 7693bc2bb154SChristoph Hellwig 7694bc2bb154SChristoph Hellwig flags |= PCI_IRQ_MSI; 7695bc2bb154SChristoph Hellwig break; 7696edd16368SStephen M. Cameron } 7697bc2bb154SChristoph Hellwig 7698bc2bb154SChristoph Hellwig ret = pci_alloc_irq_vectors(h->pdev, 1, 1, flags); 7699bc2bb154SChristoph Hellwig if (ret < 0) 7700bc2bb154SChristoph Hellwig return ret; 7701bc2bb154SChristoph Hellwig return 0; 7702edd16368SStephen M. Cameron } 7703edd16368SStephen M. Cameron 77046f039790SGreg Kroah-Hartman static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id) 7705e5c880d1SStephen M. Cameron { 7706e5c880d1SStephen M. Cameron int i; 7707e5c880d1SStephen M. Cameron u32 subsystem_vendor_id, subsystem_device_id; 7708e5c880d1SStephen M. Cameron 7709e5c880d1SStephen M. Cameron subsystem_vendor_id = pdev->subsystem_vendor; 7710e5c880d1SStephen M. Cameron subsystem_device_id = pdev->subsystem_device; 7711e5c880d1SStephen M. Cameron *board_id = ((subsystem_device_id << 16) & 0xffff0000) | 7712e5c880d1SStephen M. Cameron subsystem_vendor_id; 7713e5c880d1SStephen M. Cameron 7714e5c880d1SStephen M. Cameron for (i = 0; i < ARRAY_SIZE(products); i++) 7715e5c880d1SStephen M. Cameron if (*board_id == products[i].board_id) 7716e5c880d1SStephen M. Cameron return i; 7717e5c880d1SStephen M. Cameron 77186798cc0aSStephen M. Cameron if ((subsystem_vendor_id != PCI_VENDOR_ID_HP && 77196798cc0aSStephen M. Cameron subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) || 77206798cc0aSStephen M. Cameron !hpsa_allow_any) { 7721e5c880d1SStephen M. Cameron dev_warn(&pdev->dev, "unrecognized board ID: " 7722e5c880d1SStephen M. Cameron "0x%08x, ignoring.\n", *board_id); 7723e5c880d1SStephen M. Cameron return -ENODEV; 7724e5c880d1SStephen M. Cameron } 7725e5c880d1SStephen M. Cameron return ARRAY_SIZE(products) - 1; /* generic unknown smart array */ 7726e5c880d1SStephen M. Cameron } 7727e5c880d1SStephen M. Cameron 77286f039790SGreg Kroah-Hartman static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 77293a7774ceSStephen M. Cameron unsigned long *memory_bar) 77303a7774ceSStephen M. Cameron { 77313a7774ceSStephen M. Cameron int i; 77323a7774ceSStephen M. Cameron 77333a7774ceSStephen M. Cameron for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) 773412d2cd47SStephen M. Cameron if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) { 77353a7774ceSStephen M. Cameron /* addressing mode bits already removed */ 773612d2cd47SStephen M. Cameron *memory_bar = pci_resource_start(pdev, i); 773712d2cd47SStephen M. Cameron dev_dbg(&pdev->dev, "memory BAR = %lx\n", 77383a7774ceSStephen M. Cameron *memory_bar); 77393a7774ceSStephen M. Cameron return 0; 77403a7774ceSStephen M. Cameron } 774112d2cd47SStephen M. Cameron dev_warn(&pdev->dev, "no memory BAR found\n"); 77423a7774ceSStephen M. Cameron return -ENODEV; 77433a7774ceSStephen M. Cameron } 77443a7774ceSStephen M. Cameron 77456f039790SGreg Kroah-Hartman static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 77466f039790SGreg Kroah-Hartman int wait_for_ready) 77472c4c8c8bSStephen M. Cameron { 7748fe5389c8SStephen M. Cameron int i, iterations; 77492c4c8c8bSStephen M. Cameron u32 scratchpad; 7750fe5389c8SStephen M. Cameron if (wait_for_ready) 7751fe5389c8SStephen M. Cameron iterations = HPSA_BOARD_READY_ITERATIONS; 7752fe5389c8SStephen M. Cameron else 7753fe5389c8SStephen M. Cameron iterations = HPSA_BOARD_NOT_READY_ITERATIONS; 77542c4c8c8bSStephen M. Cameron 7755fe5389c8SStephen M. Cameron for (i = 0; i < iterations; i++) { 7756fe5389c8SStephen M. Cameron scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET); 7757fe5389c8SStephen M. Cameron if (wait_for_ready) { 77582c4c8c8bSStephen M. Cameron if (scratchpad == HPSA_FIRMWARE_READY) 77592c4c8c8bSStephen M. Cameron return 0; 7760fe5389c8SStephen M. Cameron } else { 7761fe5389c8SStephen M. Cameron if (scratchpad != HPSA_FIRMWARE_READY) 7762fe5389c8SStephen M. Cameron return 0; 7763fe5389c8SStephen M. Cameron } 77642c4c8c8bSStephen M. Cameron msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS); 77652c4c8c8bSStephen M. Cameron } 7766fe5389c8SStephen M. Cameron dev_warn(&pdev->dev, "board not ready, timed out.\n"); 77672c4c8c8bSStephen M. Cameron return -ENODEV; 77682c4c8c8bSStephen M. Cameron } 77692c4c8c8bSStephen M. Cameron 77706f039790SGreg Kroah-Hartman static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 77716f039790SGreg Kroah-Hartman u32 *cfg_base_addr, u64 *cfg_base_addr_index, 7772a51fd47fSStephen M. Cameron u64 *cfg_offset) 7773a51fd47fSStephen M. Cameron { 7774a51fd47fSStephen M. Cameron *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET); 7775a51fd47fSStephen M. Cameron *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET); 7776a51fd47fSStephen M. Cameron *cfg_base_addr &= (u32) 0x0000ffff; 7777a51fd47fSStephen M. Cameron *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr); 7778a51fd47fSStephen M. Cameron if (*cfg_base_addr_index == -1) { 7779a51fd47fSStephen M. Cameron dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n"); 7780a51fd47fSStephen M. Cameron return -ENODEV; 7781a51fd47fSStephen M. Cameron } 7782a51fd47fSStephen M. Cameron return 0; 7783a51fd47fSStephen M. Cameron } 7784a51fd47fSStephen M. Cameron 7785195f2c65SRobert Elliott static void hpsa_free_cfgtables(struct ctlr_info *h) 7786195f2c65SRobert Elliott { 7787105a3dbcSRobert Elliott if (h->transtable) { 7788195f2c65SRobert Elliott iounmap(h->transtable); 7789105a3dbcSRobert Elliott h->transtable = NULL; 7790105a3dbcSRobert Elliott } 7791105a3dbcSRobert Elliott if (h->cfgtable) { 7792195f2c65SRobert Elliott iounmap(h->cfgtable); 7793105a3dbcSRobert Elliott h->cfgtable = NULL; 7794105a3dbcSRobert Elliott } 7795195f2c65SRobert Elliott } 7796195f2c65SRobert Elliott 7797195f2c65SRobert Elliott /* Find and map CISS config table and transfer table 7798195f2c65SRobert Elliott + * several items must be unmapped (freed) later 7799195f2c65SRobert Elliott + * */ 78006f039790SGreg Kroah-Hartman static int hpsa_find_cfgtables(struct ctlr_info *h) 7801edd16368SStephen M. Cameron { 780201a02ffcSStephen M. Cameron u64 cfg_offset; 780301a02ffcSStephen M. Cameron u32 cfg_base_addr; 780401a02ffcSStephen M. Cameron u64 cfg_base_addr_index; 7805303932fdSDon Brace u32 trans_offset; 7806a51fd47fSStephen M. Cameron int rc; 780777c4495cSStephen M. Cameron 7808a51fd47fSStephen M. Cameron rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 7809a51fd47fSStephen M. Cameron &cfg_base_addr_index, &cfg_offset); 7810a51fd47fSStephen M. Cameron if (rc) 7811a51fd47fSStephen M. Cameron return rc; 781277c4495cSStephen M. Cameron h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev, 7813a51fd47fSStephen M. Cameron cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable)); 7814cd3c81c4SRobert Elliott if (!h->cfgtable) { 7815cd3c81c4SRobert Elliott dev_err(&h->pdev->dev, "Failed mapping cfgtable\n"); 781677c4495cSStephen M. Cameron return -ENOMEM; 7817cd3c81c4SRobert Elliott } 7818580ada3cSStephen M. Cameron rc = write_driver_ver_to_cfgtable(h->cfgtable); 7819580ada3cSStephen M. Cameron if (rc) 7820580ada3cSStephen M. Cameron return rc; 782177c4495cSStephen M. Cameron /* Find performant mode table. */ 7822a51fd47fSStephen M. Cameron trans_offset = readl(&h->cfgtable->TransMethodOffset); 782377c4495cSStephen M. Cameron h->transtable = remap_pci_mem(pci_resource_start(h->pdev, 782477c4495cSStephen M. Cameron cfg_base_addr_index)+cfg_offset+trans_offset, 782577c4495cSStephen M. Cameron sizeof(*h->transtable)); 7826195f2c65SRobert Elliott if (!h->transtable) { 7827195f2c65SRobert Elliott dev_err(&h->pdev->dev, "Failed mapping transfer table\n"); 7828195f2c65SRobert Elliott hpsa_free_cfgtables(h); 782977c4495cSStephen M. Cameron return -ENOMEM; 7830195f2c65SRobert Elliott } 783177c4495cSStephen M. Cameron return 0; 783277c4495cSStephen M. Cameron } 783377c4495cSStephen M. Cameron 78346f039790SGreg Kroah-Hartman static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h) 7835cba3d38bSStephen M. Cameron { 783641ce4c35SStephen Cameron #define MIN_MAX_COMMANDS 16 783741ce4c35SStephen Cameron BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS); 783841ce4c35SStephen Cameron 783941ce4c35SStephen Cameron h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands); 784072ceeaecSStephen M. Cameron 784172ceeaecSStephen M. Cameron /* Limit commands in memory limited kdump scenario. */ 784272ceeaecSStephen M. Cameron if (reset_devices && h->max_commands > 32) 784372ceeaecSStephen M. Cameron h->max_commands = 32; 784472ceeaecSStephen M. Cameron 784541ce4c35SStephen Cameron if (h->max_commands < MIN_MAX_COMMANDS) { 784641ce4c35SStephen Cameron dev_warn(&h->pdev->dev, 784741ce4c35SStephen Cameron "Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n", 784841ce4c35SStephen Cameron h->max_commands, 784941ce4c35SStephen Cameron MIN_MAX_COMMANDS); 785041ce4c35SStephen Cameron h->max_commands = MIN_MAX_COMMANDS; 7851cba3d38bSStephen M. Cameron } 7852cba3d38bSStephen M. Cameron } 7853cba3d38bSStephen M. Cameron 7854c7ee65b3SWebb Scales /* If the controller reports that the total max sg entries is greater than 512, 7855c7ee65b3SWebb Scales * then we know that chained SG blocks work. (Original smart arrays did not 7856c7ee65b3SWebb Scales * support chained SG blocks and would return zero for max sg entries.) 7857c7ee65b3SWebb Scales */ 7858c7ee65b3SWebb Scales static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h) 7859c7ee65b3SWebb Scales { 7860c7ee65b3SWebb Scales return h->maxsgentries > 512; 7861c7ee65b3SWebb Scales } 7862c7ee65b3SWebb Scales 7863b93d7536SStephen M. Cameron /* Interrogate the hardware for some limits: 7864b93d7536SStephen M. Cameron * max commands, max SG elements without chaining, and with chaining, 7865b93d7536SStephen M. Cameron * SG chain block size, etc. 7866b93d7536SStephen M. Cameron */ 78676f039790SGreg Kroah-Hartman static void hpsa_find_board_params(struct ctlr_info *h) 7868b93d7536SStephen M. Cameron { 7869cba3d38bSStephen M. Cameron hpsa_get_max_perf_mode_cmds(h); 787045fcb86eSStephen Cameron h->nr_cmds = h->max_commands; 7871b93d7536SStephen M. Cameron h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements)); 7872283b4a9bSStephen M. Cameron h->fw_support = readl(&(h->cfgtable->misc_fw_support)); 7873c7ee65b3SWebb Scales if (hpsa_supports_chained_sg_blocks(h)) { 7874c7ee65b3SWebb Scales /* Limit in-command s/g elements to 32 save dma'able memory. */ 7875b93d7536SStephen M. Cameron h->max_cmd_sg_entries = 32; 78761a63ea6fSWebb Scales h->chainsize = h->maxsgentries - h->max_cmd_sg_entries; 7877b93d7536SStephen M. Cameron h->maxsgentries--; /* save one for chain pointer */ 7878b93d7536SStephen M. Cameron } else { 7879c7ee65b3SWebb Scales /* 7880c7ee65b3SWebb Scales * Original smart arrays supported at most 31 s/g entries 7881c7ee65b3SWebb Scales * embedded inline in the command (trying to use more 7882c7ee65b3SWebb Scales * would lock up the controller) 7883c7ee65b3SWebb Scales */ 7884c7ee65b3SWebb Scales h->max_cmd_sg_entries = 31; 78851a63ea6fSWebb Scales h->maxsgentries = 31; /* default to traditional values */ 7886c7ee65b3SWebb Scales h->chainsize = 0; 7887b93d7536SStephen M. Cameron } 788875167d2cSStephen M. Cameron 788975167d2cSStephen M. Cameron /* Find out what task management functions are supported and cache */ 789075167d2cSStephen M. Cameron h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags)); 78910e7a7fceSScott Teel if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags)) 78920e7a7fceSScott Teel dev_warn(&h->pdev->dev, "Physical aborts not supported\n"); 78930e7a7fceSScott Teel if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags)) 78940e7a7fceSScott Teel dev_warn(&h->pdev->dev, "Logical aborts not supported\n"); 78958be986ccSStephen Cameron if (!(HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags)) 78968be986ccSStephen Cameron dev_warn(&h->pdev->dev, "HP SSD Smart Path aborts not supported\n"); 7897b93d7536SStephen M. Cameron } 7898b93d7536SStephen M. Cameron 789976c46e49SStephen M. Cameron static inline bool hpsa_CISS_signature_present(struct ctlr_info *h) 790076c46e49SStephen M. Cameron { 79010fc9fd40SAkinobu Mita if (!check_signature(h->cfgtable->Signature, "CISS", 4)) { 7902050f7147SStephen Cameron dev_err(&h->pdev->dev, "not a valid CISS config table\n"); 790376c46e49SStephen M. Cameron return false; 790476c46e49SStephen M. Cameron } 790576c46e49SStephen M. Cameron return true; 790676c46e49SStephen M. Cameron } 790776c46e49SStephen M. Cameron 790897a5e98cSStephen M. Cameron static inline void hpsa_set_driver_support_bits(struct ctlr_info *h) 7909f7c39101SStephen M. Cameron { 791097a5e98cSStephen M. Cameron u32 driver_support; 7911f7c39101SStephen M. Cameron 791297a5e98cSStephen M. Cameron driver_support = readl(&(h->cfgtable->driver_support)); 79130b9e7b74SArnd Bergmann /* Need to enable prefetch in the SCSI core for 6400 in x86 */ 79140b9e7b74SArnd Bergmann #ifdef CONFIG_X86 791597a5e98cSStephen M. Cameron driver_support |= ENABLE_SCSI_PREFETCH; 7916f7c39101SStephen M. Cameron #endif 791728e13446SStephen M. Cameron driver_support |= ENABLE_UNIT_ATTN; 791828e13446SStephen M. Cameron writel(driver_support, &(h->cfgtable->driver_support)); 7919f7c39101SStephen M. Cameron } 7920f7c39101SStephen M. Cameron 79213d0eab67SStephen M. Cameron /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result 79223d0eab67SStephen M. Cameron * in a prefetch beyond physical memory. 79233d0eab67SStephen M. Cameron */ 79243d0eab67SStephen M. Cameron static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h) 79253d0eab67SStephen M. Cameron { 79263d0eab67SStephen M. Cameron u32 dma_prefetch; 79273d0eab67SStephen M. Cameron 79283d0eab67SStephen M. Cameron if (h->board_id != 0x3225103C) 79293d0eab67SStephen M. Cameron return; 79303d0eab67SStephen M. Cameron dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG); 79313d0eab67SStephen M. Cameron dma_prefetch |= 0x8000; 79323d0eab67SStephen M. Cameron writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG); 79333d0eab67SStephen M. Cameron } 79343d0eab67SStephen M. Cameron 7935c706a795SRobert Elliott static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h) 793676438d08SStephen M. Cameron { 793776438d08SStephen M. Cameron int i; 793876438d08SStephen M. Cameron u32 doorbell_value; 793976438d08SStephen M. Cameron unsigned long flags; 794076438d08SStephen M. Cameron /* wait until the clear_event_notify bit 6 is cleared by controller. */ 7941007e7aa9SRobert Elliott for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) { 794276438d08SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 794376438d08SStephen M. Cameron doorbell_value = readl(h->vaddr + SA5_DOORBELL); 794476438d08SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 794576438d08SStephen M. Cameron if (!(doorbell_value & DOORBELL_CLEAR_EVENTS)) 7946c706a795SRobert Elliott goto done; 794776438d08SStephen M. Cameron /* delay and try again */ 7948007e7aa9SRobert Elliott msleep(CLEAR_EVENT_WAIT_INTERVAL); 794976438d08SStephen M. Cameron } 7950c706a795SRobert Elliott return -ENODEV; 7951c706a795SRobert Elliott done: 7952c706a795SRobert Elliott return 0; 795376438d08SStephen M. Cameron } 795476438d08SStephen M. Cameron 7955c706a795SRobert Elliott static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h) 7956eb6b2ae9SStephen M. Cameron { 7957eb6b2ae9SStephen M. Cameron int i; 79586eaf46fdSStephen M. Cameron u32 doorbell_value; 79596eaf46fdSStephen M. Cameron unsigned long flags; 7960eb6b2ae9SStephen M. Cameron 7961eb6b2ae9SStephen M. Cameron /* under certain very rare conditions, this can take awhile. 7962eb6b2ae9SStephen M. Cameron * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right 7963eb6b2ae9SStephen M. Cameron * as we enter this code.) 7964eb6b2ae9SStephen M. Cameron */ 7965007e7aa9SRobert Elliott for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) { 796625163bd5SWebb Scales if (h->remove_in_progress) 796725163bd5SWebb Scales goto done; 79686eaf46fdSStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 79696eaf46fdSStephen M. Cameron doorbell_value = readl(h->vaddr + SA5_DOORBELL); 79706eaf46fdSStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 7971382be668SDan Carpenter if (!(doorbell_value & CFGTBL_ChangeReq)) 7972c706a795SRobert Elliott goto done; 7973eb6b2ae9SStephen M. Cameron /* delay and try again */ 7974007e7aa9SRobert Elliott msleep(MODE_CHANGE_WAIT_INTERVAL); 7975eb6b2ae9SStephen M. Cameron } 7976c706a795SRobert Elliott return -ENODEV; 7977c706a795SRobert Elliott done: 7978c706a795SRobert Elliott return 0; 79793f4336f3SStephen M. Cameron } 79803f4336f3SStephen M. Cameron 7981c706a795SRobert Elliott /* return -ENODEV or other reason on error, 0 on success */ 79826f039790SGreg Kroah-Hartman static int hpsa_enter_simple_mode(struct ctlr_info *h) 79833f4336f3SStephen M. Cameron { 79843f4336f3SStephen M. Cameron u32 trans_support; 79853f4336f3SStephen M. Cameron 79863f4336f3SStephen M. Cameron trans_support = readl(&(h->cfgtable->TransportSupport)); 79873f4336f3SStephen M. Cameron if (!(trans_support & SIMPLE_MODE)) 79883f4336f3SStephen M. Cameron return -ENOTSUPP; 79893f4336f3SStephen M. Cameron 79903f4336f3SStephen M. Cameron h->max_commands = readl(&(h->cfgtable->CmdsOutMax)); 7991283b4a9bSStephen M. Cameron 79923f4336f3SStephen M. Cameron /* Update the field, and then ring the doorbell */ 79933f4336f3SStephen M. Cameron writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest)); 7994b9af4937SStephen M. Cameron writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi); 79953f4336f3SStephen M. Cameron writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 7996c706a795SRobert Elliott if (hpsa_wait_for_mode_change_ack(h)) 7997c706a795SRobert Elliott goto error; 7998eb6b2ae9SStephen M. Cameron print_cfg_table(&h->pdev->dev, h->cfgtable); 7999283b4a9bSStephen M. Cameron if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) 8000283b4a9bSStephen M. Cameron goto error; 8001960a30e7SStephen M. Cameron h->transMethod = CFGTBL_Trans_Simple; 8002eb6b2ae9SStephen M. Cameron return 0; 8003283b4a9bSStephen M. Cameron error: 8004050f7147SStephen Cameron dev_err(&h->pdev->dev, "failed to enter simple mode\n"); 8005283b4a9bSStephen M. Cameron return -ENODEV; 8006eb6b2ae9SStephen M. Cameron } 8007eb6b2ae9SStephen M. Cameron 8008195f2c65SRobert Elliott /* free items allocated or mapped by hpsa_pci_init */ 8009195f2c65SRobert Elliott static void hpsa_free_pci_init(struct ctlr_info *h) 8010195f2c65SRobert Elliott { 8011195f2c65SRobert Elliott hpsa_free_cfgtables(h); /* pci_init 4 */ 8012195f2c65SRobert Elliott iounmap(h->vaddr); /* pci_init 3 */ 8013105a3dbcSRobert Elliott h->vaddr = NULL; 8014195f2c65SRobert Elliott hpsa_disable_interrupt_mode(h); /* pci_init 2 */ 8015943a7021SRobert Elliott /* 8016943a7021SRobert Elliott * call pci_disable_device before pci_release_regions per 8017943a7021SRobert Elliott * Documentation/PCI/pci.txt 8018943a7021SRobert Elliott */ 8019195f2c65SRobert Elliott pci_disable_device(h->pdev); /* pci_init 1 */ 8020943a7021SRobert Elliott pci_release_regions(h->pdev); /* pci_init 2 */ 8021195f2c65SRobert Elliott } 8022195f2c65SRobert Elliott 8023195f2c65SRobert Elliott /* several items must be freed later */ 80246f039790SGreg Kroah-Hartman static int hpsa_pci_init(struct ctlr_info *h) 802577c4495cSStephen M. Cameron { 8026eb6b2ae9SStephen M. Cameron int prod_index, err; 8027edd16368SStephen M. Cameron 8028e5c880d1SStephen M. Cameron prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id); 8029e5c880d1SStephen M. Cameron if (prod_index < 0) 803060f923b9SRobert Elliott return prod_index; 8031e5c880d1SStephen M. Cameron h->product_name = products[prod_index].product_name; 8032e5c880d1SStephen M. Cameron h->access = *(products[prod_index].access); 8033e5c880d1SStephen M. Cameron 80349b5c48c2SStephen Cameron h->needs_abort_tags_swizzled = 80359b5c48c2SStephen Cameron ctlr_needs_abort_tags_swizzled(h->board_id); 80369b5c48c2SStephen Cameron 8037e5a44df8SMatthew Garrett pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S | 8038e5a44df8SMatthew Garrett PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM); 8039e5a44df8SMatthew Garrett 804055c06c71SStephen M. Cameron err = pci_enable_device(h->pdev); 8041edd16368SStephen M. Cameron if (err) { 8042195f2c65SRobert Elliott dev_err(&h->pdev->dev, "failed to enable PCI device\n"); 8043943a7021SRobert Elliott pci_disable_device(h->pdev); 8044edd16368SStephen M. Cameron return err; 8045edd16368SStephen M. Cameron } 8046edd16368SStephen M. Cameron 8047f79cfec6SStephen M. Cameron err = pci_request_regions(h->pdev, HPSA); 8048edd16368SStephen M. Cameron if (err) { 804955c06c71SStephen M. Cameron dev_err(&h->pdev->dev, 8050195f2c65SRobert Elliott "failed to obtain PCI resources\n"); 8051943a7021SRobert Elliott pci_disable_device(h->pdev); 8052943a7021SRobert Elliott return err; 8053edd16368SStephen M. Cameron } 80544fa604e1SRobert Elliott 80554fa604e1SRobert Elliott pci_set_master(h->pdev); 80564fa604e1SRobert Elliott 8057bc2bb154SChristoph Hellwig err = hpsa_interrupt_mode(h); 8058bc2bb154SChristoph Hellwig if (err) 8059bc2bb154SChristoph Hellwig goto clean1; 806012d2cd47SStephen M. Cameron err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr); 80613a7774ceSStephen M. Cameron if (err) 8062195f2c65SRobert Elliott goto clean2; /* intmode+region, pci */ 8063edd16368SStephen M. Cameron h->vaddr = remap_pci_mem(h->paddr, 0x250); 8064204892e9SStephen M. Cameron if (!h->vaddr) { 8065195f2c65SRobert Elliott dev_err(&h->pdev->dev, "failed to remap PCI mem\n"); 8066204892e9SStephen M. Cameron err = -ENOMEM; 8067195f2c65SRobert Elliott goto clean2; /* intmode+region, pci */ 8068204892e9SStephen M. Cameron } 8069fe5389c8SStephen M. Cameron err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 80702c4c8c8bSStephen M. Cameron if (err) 8071195f2c65SRobert Elliott goto clean3; /* vaddr, intmode+region, pci */ 807277c4495cSStephen M. Cameron err = hpsa_find_cfgtables(h); 807377c4495cSStephen M. Cameron if (err) 8074195f2c65SRobert Elliott goto clean3; /* vaddr, intmode+region, pci */ 8075b93d7536SStephen M. Cameron hpsa_find_board_params(h); 8076edd16368SStephen M. Cameron 807776c46e49SStephen M. Cameron if (!hpsa_CISS_signature_present(h)) { 8078edd16368SStephen M. Cameron err = -ENODEV; 8079195f2c65SRobert Elliott goto clean4; /* cfgtables, vaddr, intmode+region, pci */ 8080edd16368SStephen M. Cameron } 808197a5e98cSStephen M. Cameron hpsa_set_driver_support_bits(h); 80823d0eab67SStephen M. Cameron hpsa_p600_dma_prefetch_quirk(h); 8083eb6b2ae9SStephen M. Cameron err = hpsa_enter_simple_mode(h); 8084eb6b2ae9SStephen M. Cameron if (err) 8085195f2c65SRobert Elliott goto clean4; /* cfgtables, vaddr, intmode+region, pci */ 8086edd16368SStephen M. Cameron return 0; 8087edd16368SStephen M. Cameron 8088195f2c65SRobert Elliott clean4: /* cfgtables, vaddr, intmode+region, pci */ 8089195f2c65SRobert Elliott hpsa_free_cfgtables(h); 8090195f2c65SRobert Elliott clean3: /* vaddr, intmode+region, pci */ 8091204892e9SStephen M. Cameron iounmap(h->vaddr); 8092105a3dbcSRobert Elliott h->vaddr = NULL; 8093195f2c65SRobert Elliott clean2: /* intmode+region, pci */ 8094195f2c65SRobert Elliott hpsa_disable_interrupt_mode(h); 8095bc2bb154SChristoph Hellwig clean1: 8096943a7021SRobert Elliott /* 8097943a7021SRobert Elliott * call pci_disable_device before pci_release_regions per 8098943a7021SRobert Elliott * Documentation/PCI/pci.txt 8099943a7021SRobert Elliott */ 8100195f2c65SRobert Elliott pci_disable_device(h->pdev); 8101943a7021SRobert Elliott pci_release_regions(h->pdev); 8102edd16368SStephen M. Cameron return err; 8103edd16368SStephen M. Cameron } 8104edd16368SStephen M. Cameron 81056f039790SGreg Kroah-Hartman static void hpsa_hba_inquiry(struct ctlr_info *h) 8106339b2b14SStephen M. Cameron { 8107339b2b14SStephen M. Cameron int rc; 8108339b2b14SStephen M. Cameron 8109339b2b14SStephen M. Cameron #define HBA_INQUIRY_BYTE_COUNT 64 8110339b2b14SStephen M. Cameron h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL); 8111339b2b14SStephen M. Cameron if (!h->hba_inquiry_data) 8112339b2b14SStephen M. Cameron return; 8113339b2b14SStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0, 8114339b2b14SStephen M. Cameron h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT); 8115339b2b14SStephen M. Cameron if (rc != 0) { 8116339b2b14SStephen M. Cameron kfree(h->hba_inquiry_data); 8117339b2b14SStephen M. Cameron h->hba_inquiry_data = NULL; 8118339b2b14SStephen M. Cameron } 8119339b2b14SStephen M. Cameron } 8120339b2b14SStephen M. Cameron 81216b6c1cd7STomas Henzl static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id) 8122edd16368SStephen M. Cameron { 81231df8552aSStephen M. Cameron int rc, i; 81243b747298STomas Henzl void __iomem *vaddr; 8125edd16368SStephen M. Cameron 81264c2a8c40SStephen M. Cameron if (!reset_devices) 81274c2a8c40SStephen M. Cameron return 0; 81284c2a8c40SStephen M. Cameron 8129132aa220STomas Henzl /* kdump kernel is loading, we don't know in which state is 8130132aa220STomas Henzl * the pci interface. The dev->enable_cnt is equal zero 8131132aa220STomas Henzl * so we call enable+disable, wait a while and switch it on. 8132132aa220STomas Henzl */ 8133132aa220STomas Henzl rc = pci_enable_device(pdev); 8134132aa220STomas Henzl if (rc) { 8135132aa220STomas Henzl dev_warn(&pdev->dev, "Failed to enable PCI device\n"); 8136132aa220STomas Henzl return -ENODEV; 8137132aa220STomas Henzl } 8138132aa220STomas Henzl pci_disable_device(pdev); 8139132aa220STomas Henzl msleep(260); /* a randomly chosen number */ 8140132aa220STomas Henzl rc = pci_enable_device(pdev); 8141132aa220STomas Henzl if (rc) { 8142132aa220STomas Henzl dev_warn(&pdev->dev, "failed to enable device.\n"); 8143132aa220STomas Henzl return -ENODEV; 8144132aa220STomas Henzl } 81454fa604e1SRobert Elliott 8146859c75abSTomas Henzl pci_set_master(pdev); 81474fa604e1SRobert Elliott 81483b747298STomas Henzl vaddr = pci_ioremap_bar(pdev, 0); 81493b747298STomas Henzl if (vaddr == NULL) { 81503b747298STomas Henzl rc = -ENOMEM; 81513b747298STomas Henzl goto out_disable; 81523b747298STomas Henzl } 81533b747298STomas Henzl writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET); 81543b747298STomas Henzl iounmap(vaddr); 81553b747298STomas Henzl 81561df8552aSStephen M. Cameron /* Reset the controller with a PCI power-cycle or via doorbell */ 81576b6c1cd7STomas Henzl rc = hpsa_kdump_hard_reset_controller(pdev, board_id); 8158edd16368SStephen M. Cameron 81591df8552aSStephen M. Cameron /* -ENOTSUPP here means we cannot reset the controller 81601df8552aSStephen M. Cameron * but it's already (and still) up and running in 816118867659SStephen M. Cameron * "performant mode". Or, it might be 640x, which can't reset 816218867659SStephen M. Cameron * due to concerns about shared bbwc between 6402/6404 pair. 81631df8552aSStephen M. Cameron */ 8164adf1b3a3SRobert Elliott if (rc) 8165132aa220STomas Henzl goto out_disable; 8166edd16368SStephen M. Cameron 8167edd16368SStephen M. Cameron /* Now try to get the controller to respond to a no-op */ 81681ba66c9cSRobert Elliott dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n"); 8169edd16368SStephen M. Cameron for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) { 8170edd16368SStephen M. Cameron if (hpsa_noop(pdev) == 0) 8171edd16368SStephen M. Cameron break; 8172edd16368SStephen M. Cameron else 8173edd16368SStephen M. Cameron dev_warn(&pdev->dev, "no-op failed%s\n", 8174edd16368SStephen M. Cameron (i < 11 ? "; re-trying" : "")); 8175edd16368SStephen M. Cameron } 8176132aa220STomas Henzl 8177132aa220STomas Henzl out_disable: 8178132aa220STomas Henzl 8179132aa220STomas Henzl pci_disable_device(pdev); 8180132aa220STomas Henzl return rc; 8181edd16368SStephen M. Cameron } 8182edd16368SStephen M. Cameron 81831fb7c98aSRobert Elliott static void hpsa_free_cmd_pool(struct ctlr_info *h) 81841fb7c98aSRobert Elliott { 81851fb7c98aSRobert Elliott kfree(h->cmd_pool_bits); 8186105a3dbcSRobert Elliott h->cmd_pool_bits = NULL; 8187105a3dbcSRobert Elliott if (h->cmd_pool) { 81881fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 81891fb7c98aSRobert Elliott h->nr_cmds * sizeof(struct CommandList), 81901fb7c98aSRobert Elliott h->cmd_pool, 81911fb7c98aSRobert Elliott h->cmd_pool_dhandle); 8192105a3dbcSRobert Elliott h->cmd_pool = NULL; 8193105a3dbcSRobert Elliott h->cmd_pool_dhandle = 0; 8194105a3dbcSRobert Elliott } 8195105a3dbcSRobert Elliott if (h->errinfo_pool) { 81961fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 81971fb7c98aSRobert Elliott h->nr_cmds * sizeof(struct ErrorInfo), 81981fb7c98aSRobert Elliott h->errinfo_pool, 81991fb7c98aSRobert Elliott h->errinfo_pool_dhandle); 8200105a3dbcSRobert Elliott h->errinfo_pool = NULL; 8201105a3dbcSRobert Elliott h->errinfo_pool_dhandle = 0; 8202105a3dbcSRobert Elliott } 82031fb7c98aSRobert Elliott } 82041fb7c98aSRobert Elliott 8205d37ffbe4SRobert Elliott static int hpsa_alloc_cmd_pool(struct ctlr_info *h) 82062e9d1b36SStephen M. Cameron { 82072e9d1b36SStephen M. Cameron h->cmd_pool_bits = kzalloc( 82082e9d1b36SStephen M. Cameron DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) * 82092e9d1b36SStephen M. Cameron sizeof(unsigned long), GFP_KERNEL); 82102e9d1b36SStephen M. Cameron h->cmd_pool = pci_alloc_consistent(h->pdev, 82112e9d1b36SStephen M. Cameron h->nr_cmds * sizeof(*h->cmd_pool), 82122e9d1b36SStephen M. Cameron &(h->cmd_pool_dhandle)); 82132e9d1b36SStephen M. Cameron h->errinfo_pool = pci_alloc_consistent(h->pdev, 82142e9d1b36SStephen M. Cameron h->nr_cmds * sizeof(*h->errinfo_pool), 82152e9d1b36SStephen M. Cameron &(h->errinfo_pool_dhandle)); 82162e9d1b36SStephen M. Cameron if ((h->cmd_pool_bits == NULL) 82172e9d1b36SStephen M. Cameron || (h->cmd_pool == NULL) 82182e9d1b36SStephen M. Cameron || (h->errinfo_pool == NULL)) { 82192e9d1b36SStephen M. Cameron dev_err(&h->pdev->dev, "out of memory in %s", __func__); 82202c143342SRobert Elliott goto clean_up; 82212e9d1b36SStephen M. Cameron } 8222360c73bdSStephen Cameron hpsa_preinitialize_commands(h); 82232e9d1b36SStephen M. Cameron return 0; 82242c143342SRobert Elliott clean_up: 82252c143342SRobert Elliott hpsa_free_cmd_pool(h); 82262c143342SRobert Elliott return -ENOMEM; 82272e9d1b36SStephen M. Cameron } 82282e9d1b36SStephen M. Cameron 8229ec501a18SRobert Elliott /* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */ 8230ec501a18SRobert Elliott static void hpsa_free_irqs(struct ctlr_info *h) 8231ec501a18SRobert Elliott { 8232ec501a18SRobert Elliott int i; 8233ec501a18SRobert Elliott 8234bc2bb154SChristoph Hellwig if (!h->msix_vectors || h->intr_mode != PERF_MODE_INT) { 8235ec501a18SRobert Elliott /* Single reply queue, only one irq to free */ 82367dc62d93SColin Ian King free_irq(pci_irq_vector(h->pdev, 0), &h->q[h->intr_mode]); 8237bc2bb154SChristoph Hellwig h->q[h->intr_mode] = 0; 8238ec501a18SRobert Elliott return; 8239ec501a18SRobert Elliott } 8240ec501a18SRobert Elliott 8241bc2bb154SChristoph Hellwig for (i = 0; i < h->msix_vectors; i++) { 8242bc2bb154SChristoph Hellwig free_irq(pci_irq_vector(h->pdev, i), &h->q[i]); 8243105a3dbcSRobert Elliott h->q[i] = 0; 8244ec501a18SRobert Elliott } 8245a4e17fc1SRobert Elliott for (; i < MAX_REPLY_QUEUES; i++) 8246a4e17fc1SRobert Elliott h->q[i] = 0; 8247ec501a18SRobert Elliott } 8248ec501a18SRobert Elliott 82499ee61794SRobert Elliott /* returns 0 on success; cleans up and returns -Enn on error */ 82509ee61794SRobert Elliott static int hpsa_request_irqs(struct ctlr_info *h, 82510ae01a32SStephen M. Cameron irqreturn_t (*msixhandler)(int, void *), 82520ae01a32SStephen M. Cameron irqreturn_t (*intxhandler)(int, void *)) 82530ae01a32SStephen M. Cameron { 8254254f796bSMatt Gates int rc, i; 82550ae01a32SStephen M. Cameron 8256254f796bSMatt Gates /* 8257254f796bSMatt Gates * initialize h->q[x] = x so that interrupt handlers know which 8258254f796bSMatt Gates * queue to process. 8259254f796bSMatt Gates */ 8260254f796bSMatt Gates for (i = 0; i < MAX_REPLY_QUEUES; i++) 8261254f796bSMatt Gates h->q[i] = (u8) i; 8262254f796bSMatt Gates 8263bc2bb154SChristoph Hellwig if (h->intr_mode == PERF_MODE_INT && h->msix_vectors > 0) { 8264254f796bSMatt Gates /* If performant mode and MSI-X, use multiple reply queues */ 8265bc2bb154SChristoph Hellwig for (i = 0; i < h->msix_vectors; i++) { 82668b47004aSRobert Elliott sprintf(h->intrname[i], "%s-msix%d", h->devname, i); 8267bc2bb154SChristoph Hellwig rc = request_irq(pci_irq_vector(h->pdev, i), msixhandler, 82688b47004aSRobert Elliott 0, h->intrname[i], 8269254f796bSMatt Gates &h->q[i]); 8270a4e17fc1SRobert Elliott if (rc) { 8271a4e17fc1SRobert Elliott int j; 8272a4e17fc1SRobert Elliott 8273a4e17fc1SRobert Elliott dev_err(&h->pdev->dev, 8274a4e17fc1SRobert Elliott "failed to get irq %d for %s\n", 8275bc2bb154SChristoph Hellwig pci_irq_vector(h->pdev, i), h->devname); 8276a4e17fc1SRobert Elliott for (j = 0; j < i; j++) { 8277bc2bb154SChristoph Hellwig free_irq(pci_irq_vector(h->pdev, j), &h->q[j]); 8278a4e17fc1SRobert Elliott h->q[j] = 0; 8279a4e17fc1SRobert Elliott } 8280a4e17fc1SRobert Elliott for (; j < MAX_REPLY_QUEUES; j++) 8281a4e17fc1SRobert Elliott h->q[j] = 0; 8282a4e17fc1SRobert Elliott return rc; 8283a4e17fc1SRobert Elliott } 8284a4e17fc1SRobert Elliott } 8285254f796bSMatt Gates } else { 8286254f796bSMatt Gates /* Use single reply pool */ 8287bc2bb154SChristoph Hellwig if (h->msix_vectors > 0 || h->pdev->msi_enabled) { 8288bc2bb154SChristoph Hellwig sprintf(h->intrname[0], "%s-msi%s", h->devname, 8289bc2bb154SChristoph Hellwig h->msix_vectors ? "x" : ""); 8290bc2bb154SChristoph Hellwig rc = request_irq(pci_irq_vector(h->pdev, 0), 82918b47004aSRobert Elliott msixhandler, 0, 8292bc2bb154SChristoph Hellwig h->intrname[0], 8293254f796bSMatt Gates &h->q[h->intr_mode]); 8294254f796bSMatt Gates } else { 82958b47004aSRobert Elliott sprintf(h->intrname[h->intr_mode], 82968b47004aSRobert Elliott "%s-intx", h->devname); 8297bc2bb154SChristoph Hellwig rc = request_irq(pci_irq_vector(h->pdev, 0), 82988b47004aSRobert Elliott intxhandler, IRQF_SHARED, 8299bc2bb154SChristoph Hellwig h->intrname[0], 8300254f796bSMatt Gates &h->q[h->intr_mode]); 8301254f796bSMatt Gates } 8302254f796bSMatt Gates } 83030ae01a32SStephen M. Cameron if (rc) { 8304195f2c65SRobert Elliott dev_err(&h->pdev->dev, "failed to get irq %d for %s\n", 8305bc2bb154SChristoph Hellwig pci_irq_vector(h->pdev, 0), h->devname); 8306195f2c65SRobert Elliott hpsa_free_irqs(h); 83070ae01a32SStephen M. Cameron return -ENODEV; 83080ae01a32SStephen M. Cameron } 83090ae01a32SStephen M. Cameron return 0; 83100ae01a32SStephen M. Cameron } 83110ae01a32SStephen M. Cameron 83126f039790SGreg Kroah-Hartman static int hpsa_kdump_soft_reset(struct ctlr_info *h) 831364670ac8SStephen M. Cameron { 831439c53f55SRobert Elliott int rc; 8315bf43caf3SRobert Elliott hpsa_send_host_reset(h, RAID_CTLR_LUNID, HPSA_RESET_TYPE_CONTROLLER); 831664670ac8SStephen M. Cameron 831764670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n"); 831839c53f55SRobert Elliott rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY); 831939c53f55SRobert Elliott if (rc) { 832064670ac8SStephen M. Cameron dev_warn(&h->pdev->dev, "Soft reset had no effect.\n"); 832139c53f55SRobert Elliott return rc; 832264670ac8SStephen M. Cameron } 832364670ac8SStephen M. Cameron 832464670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n"); 832539c53f55SRobert Elliott rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 832639c53f55SRobert Elliott if (rc) { 832764670ac8SStephen M. Cameron dev_warn(&h->pdev->dev, "Board failed to become ready " 832864670ac8SStephen M. Cameron "after soft reset.\n"); 832939c53f55SRobert Elliott return rc; 833064670ac8SStephen M. Cameron } 833164670ac8SStephen M. Cameron 833264670ac8SStephen M. Cameron return 0; 833364670ac8SStephen M. Cameron } 833464670ac8SStephen M. Cameron 8335072b0518SStephen M. Cameron static void hpsa_free_reply_queues(struct ctlr_info *h) 8336072b0518SStephen M. Cameron { 8337072b0518SStephen M. Cameron int i; 8338072b0518SStephen M. Cameron 8339072b0518SStephen M. Cameron for (i = 0; i < h->nreply_queues; i++) { 8340072b0518SStephen M. Cameron if (!h->reply_queue[i].head) 8341072b0518SStephen M. Cameron continue; 83421fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 83431fb7c98aSRobert Elliott h->reply_queue_size, 83441fb7c98aSRobert Elliott h->reply_queue[i].head, 83451fb7c98aSRobert Elliott h->reply_queue[i].busaddr); 8346072b0518SStephen M. Cameron h->reply_queue[i].head = NULL; 8347072b0518SStephen M. Cameron h->reply_queue[i].busaddr = 0; 8348072b0518SStephen M. Cameron } 8349105a3dbcSRobert Elliott h->reply_queue_size = 0; 8350072b0518SStephen M. Cameron } 8351072b0518SStephen M. Cameron 83520097f0f4SStephen M. Cameron static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h) 83530097f0f4SStephen M. Cameron { 8354105a3dbcSRobert Elliott hpsa_free_performant_mode(h); /* init_one 7 */ 8355105a3dbcSRobert Elliott hpsa_free_sg_chain_blocks(h); /* init_one 6 */ 8356105a3dbcSRobert Elliott hpsa_free_cmd_pool(h); /* init_one 5 */ 8357105a3dbcSRobert Elliott hpsa_free_irqs(h); /* init_one 4 */ 83582946e82bSRobert Elliott scsi_host_put(h->scsi_host); /* init_one 3 */ 83592946e82bSRobert Elliott h->scsi_host = NULL; /* init_one 3 */ 83602946e82bSRobert Elliott hpsa_free_pci_init(h); /* init_one 2_5 */ 83619ecd953aSRobert Elliott free_percpu(h->lockup_detected); /* init_one 2 */ 83629ecd953aSRobert Elliott h->lockup_detected = NULL; /* init_one 2 */ 83639ecd953aSRobert Elliott if (h->resubmit_wq) { 83649ecd953aSRobert Elliott destroy_workqueue(h->resubmit_wq); /* init_one 1 */ 83659ecd953aSRobert Elliott h->resubmit_wq = NULL; 83669ecd953aSRobert Elliott } 83679ecd953aSRobert Elliott if (h->rescan_ctlr_wq) { 83689ecd953aSRobert Elliott destroy_workqueue(h->rescan_ctlr_wq); 83699ecd953aSRobert Elliott h->rescan_ctlr_wq = NULL; 83709ecd953aSRobert Elliott } 8371105a3dbcSRobert Elliott kfree(h); /* init_one 1 */ 837264670ac8SStephen M. Cameron } 837364670ac8SStephen M. Cameron 8374a0c12413SStephen M. Cameron /* Called when controller lockup detected. */ 8375f2405db8SDon Brace static void fail_all_outstanding_cmds(struct ctlr_info *h) 8376a0c12413SStephen M. Cameron { 8377281a7fd0SWebb Scales int i, refcount; 8378281a7fd0SWebb Scales struct CommandList *c; 837925163bd5SWebb Scales int failcount = 0; 8380a0c12413SStephen M. Cameron 8381080ef1ccSDon Brace flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */ 8382f2405db8SDon Brace for (i = 0; i < h->nr_cmds; i++) { 8383f2405db8SDon Brace c = h->cmd_pool + i; 8384281a7fd0SWebb Scales refcount = atomic_inc_return(&c->refcount); 8385281a7fd0SWebb Scales if (refcount > 1) { 838625163bd5SWebb Scales c->err_info->CommandStatus = CMD_CTLR_LOCKUP; 83875a3d16f5SStephen M. Cameron finish_cmd(c); 8388433b5f4dSStephen Cameron atomic_dec(&h->commands_outstanding); 838925163bd5SWebb Scales failcount++; 8390a0c12413SStephen M. Cameron } 8391281a7fd0SWebb Scales cmd_free(h, c); 8392281a7fd0SWebb Scales } 839325163bd5SWebb Scales dev_warn(&h->pdev->dev, 839425163bd5SWebb Scales "failed %d commands in fail_all\n", failcount); 8395a0c12413SStephen M. Cameron } 8396a0c12413SStephen M. Cameron 8397094963daSStephen M. Cameron static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value) 8398094963daSStephen M. Cameron { 8399c8ed0010SRusty Russell int cpu; 8400094963daSStephen M. Cameron 8401c8ed0010SRusty Russell for_each_online_cpu(cpu) { 8402094963daSStephen M. Cameron u32 *lockup_detected; 8403094963daSStephen M. Cameron lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 8404094963daSStephen M. Cameron *lockup_detected = value; 8405094963daSStephen M. Cameron } 8406094963daSStephen M. Cameron wmb(); /* be sure the per-cpu variables are out to memory */ 8407094963daSStephen M. Cameron } 8408094963daSStephen M. Cameron 8409a0c12413SStephen M. Cameron static void controller_lockup_detected(struct ctlr_info *h) 8410a0c12413SStephen M. Cameron { 8411a0c12413SStephen M. Cameron unsigned long flags; 8412094963daSStephen M. Cameron u32 lockup_detected; 8413a0c12413SStephen M. Cameron 8414a0c12413SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 8415a0c12413SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 8416094963daSStephen M. Cameron lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET); 8417094963daSStephen M. Cameron if (!lockup_detected) { 8418094963daSStephen M. Cameron /* no heartbeat, but controller gave us a zero. */ 8419094963daSStephen M. Cameron dev_warn(&h->pdev->dev, 842025163bd5SWebb Scales "lockup detected after %d but scratchpad register is zero\n", 842125163bd5SWebb Scales h->heartbeat_sample_interval / HZ); 8422094963daSStephen M. Cameron lockup_detected = 0xffffffff; 8423094963daSStephen M. Cameron } 8424094963daSStephen M. Cameron set_lockup_detected_for_all_cpus(h, lockup_detected); 8425a0c12413SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 842625163bd5SWebb Scales dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n", 842725163bd5SWebb Scales lockup_detected, h->heartbeat_sample_interval / HZ); 8428a0c12413SStephen M. Cameron pci_disable_device(h->pdev); 8429f2405db8SDon Brace fail_all_outstanding_cmds(h); 8430a0c12413SStephen M. Cameron } 8431a0c12413SStephen M. Cameron 843225163bd5SWebb Scales static int detect_controller_lockup(struct ctlr_info *h) 8433a0c12413SStephen M. Cameron { 8434a0c12413SStephen M. Cameron u64 now; 8435a0c12413SStephen M. Cameron u32 heartbeat; 8436a0c12413SStephen M. Cameron unsigned long flags; 8437a0c12413SStephen M. Cameron 8438a0c12413SStephen M. Cameron now = get_jiffies_64(); 8439a0c12413SStephen M. Cameron /* If we've received an interrupt recently, we're ok. */ 8440a0c12413SStephen M. Cameron if (time_after64(h->last_intr_timestamp + 8441e85c5974SStephen M. Cameron (h->heartbeat_sample_interval), now)) 844225163bd5SWebb Scales return false; 8443a0c12413SStephen M. Cameron 8444a0c12413SStephen M. Cameron /* 8445a0c12413SStephen M. Cameron * If we've already checked the heartbeat recently, we're ok. 8446a0c12413SStephen M. Cameron * This could happen if someone sends us a signal. We 8447a0c12413SStephen M. Cameron * otherwise don't care about signals in this thread. 8448a0c12413SStephen M. Cameron */ 8449a0c12413SStephen M. Cameron if (time_after64(h->last_heartbeat_timestamp + 8450e85c5974SStephen M. Cameron (h->heartbeat_sample_interval), now)) 845125163bd5SWebb Scales return false; 8452a0c12413SStephen M. Cameron 8453a0c12413SStephen M. Cameron /* If heartbeat has not changed since we last looked, we're not ok. */ 8454a0c12413SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 8455a0c12413SStephen M. Cameron heartbeat = readl(&h->cfgtable->HeartBeat); 8456a0c12413SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 8457a0c12413SStephen M. Cameron if (h->last_heartbeat == heartbeat) { 8458a0c12413SStephen M. Cameron controller_lockup_detected(h); 845925163bd5SWebb Scales return true; 8460a0c12413SStephen M. Cameron } 8461a0c12413SStephen M. Cameron 8462a0c12413SStephen M. Cameron /* We're ok. */ 8463a0c12413SStephen M. Cameron h->last_heartbeat = heartbeat; 8464a0c12413SStephen M. Cameron h->last_heartbeat_timestamp = now; 846525163bd5SWebb Scales return false; 8466a0c12413SStephen M. Cameron } 8467a0c12413SStephen M. Cameron 84689846590eSStephen M. Cameron static void hpsa_ack_ctlr_events(struct ctlr_info *h) 846976438d08SStephen M. Cameron { 847076438d08SStephen M. Cameron int i; 847176438d08SStephen M. Cameron char *event_type; 847276438d08SStephen M. Cameron 8473e4aa3e6aSStephen Cameron if (!(h->fw_support & MISC_FW_EVENT_NOTIFY)) 8474e4aa3e6aSStephen Cameron return; 8475e4aa3e6aSStephen Cameron 847676438d08SStephen M. Cameron /* Ask the controller to clear the events we're handling. */ 84771f7cee8cSStephen M. Cameron if ((h->transMethod & (CFGTBL_Trans_io_accel1 84781f7cee8cSStephen M. Cameron | CFGTBL_Trans_io_accel2)) && 847976438d08SStephen M. Cameron (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE || 848076438d08SStephen M. Cameron h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) { 848176438d08SStephen M. Cameron 848276438d08SStephen M. Cameron if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE) 848376438d08SStephen M. Cameron event_type = "state change"; 848476438d08SStephen M. Cameron if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE) 848576438d08SStephen M. Cameron event_type = "configuration change"; 848676438d08SStephen M. Cameron /* Stop sending new RAID offload reqs via the IO accelerator */ 848776438d08SStephen M. Cameron scsi_block_requests(h->scsi_host); 84885323ed74SDon Brace for (i = 0; i < h->ndevices; i++) { 848976438d08SStephen M. Cameron h->dev[i]->offload_enabled = 0; 84905323ed74SDon Brace h->dev[i]->offload_to_be_enabled = 0; 84915323ed74SDon Brace } 849223100dd9SStephen M. Cameron hpsa_drain_accel_commands(h); 849376438d08SStephen M. Cameron /* Set 'accelerator path config change' bit */ 849476438d08SStephen M. Cameron dev_warn(&h->pdev->dev, 849576438d08SStephen M. Cameron "Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n", 849676438d08SStephen M. Cameron h->events, event_type); 849776438d08SStephen M. Cameron writel(h->events, &(h->cfgtable->clear_event_notify)); 849876438d08SStephen M. Cameron /* Set the "clear event notify field update" bit 6 */ 849976438d08SStephen M. Cameron writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL); 850076438d08SStephen M. Cameron /* Wait until ctlr clears 'clear event notify field', bit 6 */ 850176438d08SStephen M. Cameron hpsa_wait_for_clear_event_notify_ack(h); 850276438d08SStephen M. Cameron scsi_unblock_requests(h->scsi_host); 850376438d08SStephen M. Cameron } else { 850476438d08SStephen M. Cameron /* Acknowledge controller notification events. */ 850576438d08SStephen M. Cameron writel(h->events, &(h->cfgtable->clear_event_notify)); 850676438d08SStephen M. Cameron writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL); 850776438d08SStephen M. Cameron hpsa_wait_for_clear_event_notify_ack(h); 850876438d08SStephen M. Cameron #if 0 850976438d08SStephen M. Cameron writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 851076438d08SStephen M. Cameron hpsa_wait_for_mode_change_ack(h); 851176438d08SStephen M. Cameron #endif 851276438d08SStephen M. Cameron } 85139846590eSStephen M. Cameron return; 851476438d08SStephen M. Cameron } 851576438d08SStephen M. Cameron 851676438d08SStephen M. Cameron /* Check a register on the controller to see if there are configuration 851776438d08SStephen M. Cameron * changes (added/changed/removed logical drives, etc.) which mean that 8518e863d68eSScott Teel * we should rescan the controller for devices. 8519e863d68eSScott Teel * Also check flag for driver-initiated rescan. 852076438d08SStephen M. Cameron */ 85219846590eSStephen M. Cameron static int hpsa_ctlr_needs_rescan(struct ctlr_info *h) 852276438d08SStephen M. Cameron { 8523853633e8SDon Brace if (h->drv_req_rescan) { 8524853633e8SDon Brace h->drv_req_rescan = 0; 8525853633e8SDon Brace return 1; 8526853633e8SDon Brace } 8527853633e8SDon Brace 852876438d08SStephen M. Cameron if (!(h->fw_support & MISC_FW_EVENT_NOTIFY)) 85299846590eSStephen M. Cameron return 0; 853076438d08SStephen M. Cameron 853176438d08SStephen M. Cameron h->events = readl(&(h->cfgtable->event_notify)); 85329846590eSStephen M. Cameron return h->events & RESCAN_REQUIRED_EVENT_BITS; 85339846590eSStephen M. Cameron } 853476438d08SStephen M. Cameron 853576438d08SStephen M. Cameron /* 85369846590eSStephen M. Cameron * Check if any of the offline devices have become ready 853776438d08SStephen M. Cameron */ 85389846590eSStephen M. Cameron static int hpsa_offline_devices_ready(struct ctlr_info *h) 85399846590eSStephen M. Cameron { 85409846590eSStephen M. Cameron unsigned long flags; 85419846590eSStephen M. Cameron struct offline_device_entry *d; 85429846590eSStephen M. Cameron struct list_head *this, *tmp; 85439846590eSStephen M. Cameron 85449846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 85459846590eSStephen M. Cameron list_for_each_safe(this, tmp, &h->offline_device_list) { 85469846590eSStephen M. Cameron d = list_entry(this, struct offline_device_entry, 85479846590eSStephen M. Cameron offline_list); 85489846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 8549d1fea47cSStephen M. Cameron if (!hpsa_volume_offline(h, d->scsi3addr)) { 8550d1fea47cSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 8551d1fea47cSStephen M. Cameron list_del(&d->offline_list); 8552d1fea47cSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 85539846590eSStephen M. Cameron return 1; 8554d1fea47cSStephen M. Cameron } 85559846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 855676438d08SStephen M. Cameron } 85579846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 85589846590eSStephen M. Cameron return 0; 85599846590eSStephen M. Cameron } 85609846590eSStephen M. Cameron 856134592254SScott Teel static int hpsa_luns_changed(struct ctlr_info *h) 856234592254SScott Teel { 856334592254SScott Teel int rc = 1; /* assume there are changes */ 856434592254SScott Teel struct ReportLUNdata *logdev = NULL; 856534592254SScott Teel 856634592254SScott Teel /* if we can't find out if lun data has changed, 856734592254SScott Teel * assume that it has. 856834592254SScott Teel */ 856934592254SScott Teel 857034592254SScott Teel if (!h->lastlogicals) 857134592254SScott Teel goto out; 857234592254SScott Teel 857334592254SScott Teel logdev = kzalloc(sizeof(*logdev), GFP_KERNEL); 857434592254SScott Teel if (!logdev) { 857534592254SScott Teel dev_warn(&h->pdev->dev, 857634592254SScott Teel "Out of memory, can't track lun changes.\n"); 857734592254SScott Teel goto out; 857834592254SScott Teel } 857934592254SScott Teel if (hpsa_scsi_do_report_luns(h, 1, logdev, sizeof(*logdev), 0)) { 858034592254SScott Teel dev_warn(&h->pdev->dev, 858134592254SScott Teel "report luns failed, can't track lun changes.\n"); 858234592254SScott Teel goto out; 858334592254SScott Teel } 858434592254SScott Teel if (memcmp(logdev, h->lastlogicals, sizeof(*logdev))) { 858534592254SScott Teel dev_info(&h->pdev->dev, 858634592254SScott Teel "Lun changes detected.\n"); 858734592254SScott Teel memcpy(h->lastlogicals, logdev, sizeof(*logdev)); 858834592254SScott Teel goto out; 858934592254SScott Teel } else 859034592254SScott Teel rc = 0; /* no changes detected. */ 859134592254SScott Teel out: 859234592254SScott Teel kfree(logdev); 859334592254SScott Teel return rc; 859434592254SScott Teel } 859534592254SScott Teel 85966636e7f4SDon Brace static void hpsa_rescan_ctlr_worker(struct work_struct *work) 8597a0c12413SStephen M. Cameron { 8598a0c12413SStephen M. Cameron unsigned long flags; 85998a98db73SStephen M. Cameron struct ctlr_info *h = container_of(to_delayed_work(work), 86006636e7f4SDon Brace struct ctlr_info, rescan_ctlr_work); 86016636e7f4SDon Brace 86026636e7f4SDon Brace 86036636e7f4SDon Brace if (h->remove_in_progress) 86048a98db73SStephen M. Cameron return; 86059846590eSStephen M. Cameron 8606*bfd7546cSDon Brace /* 8607*bfd7546cSDon Brace * Do the scan after the reset 8608*bfd7546cSDon Brace */ 8609*bfd7546cSDon Brace if (h->reset_in_progress) { 8610*bfd7546cSDon Brace h->drv_req_rescan = 1; 8611*bfd7546cSDon Brace return; 8612*bfd7546cSDon Brace } 8613*bfd7546cSDon Brace 86149846590eSStephen M. Cameron if (hpsa_ctlr_needs_rescan(h) || hpsa_offline_devices_ready(h)) { 86159846590eSStephen M. Cameron scsi_host_get(h->scsi_host); 86169846590eSStephen M. Cameron hpsa_ack_ctlr_events(h); 86179846590eSStephen M. Cameron hpsa_scan_start(h->scsi_host); 86189846590eSStephen M. Cameron scsi_host_put(h->scsi_host); 861934592254SScott Teel } else if (h->discovery_polling) { 8620c2adae44SScott Teel hpsa_disable_rld_caching(h); 862134592254SScott Teel if (hpsa_luns_changed(h)) { 862234592254SScott Teel struct Scsi_Host *sh = NULL; 862334592254SScott Teel 862434592254SScott Teel dev_info(&h->pdev->dev, 862534592254SScott Teel "driver discovery polling rescan.\n"); 862634592254SScott Teel sh = scsi_host_get(h->scsi_host); 862734592254SScott Teel if (sh != NULL) { 862834592254SScott Teel hpsa_scan_start(sh); 862934592254SScott Teel scsi_host_put(sh); 863034592254SScott Teel } 863134592254SScott Teel } 86329846590eSStephen M. Cameron } 86336636e7f4SDon Brace spin_lock_irqsave(&h->lock, flags); 86346636e7f4SDon Brace if (!h->remove_in_progress) 86356636e7f4SDon Brace queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work, 86366636e7f4SDon Brace h->heartbeat_sample_interval); 86376636e7f4SDon Brace spin_unlock_irqrestore(&h->lock, flags); 86386636e7f4SDon Brace } 86396636e7f4SDon Brace 86406636e7f4SDon Brace static void hpsa_monitor_ctlr_worker(struct work_struct *work) 86416636e7f4SDon Brace { 86426636e7f4SDon Brace unsigned long flags; 86436636e7f4SDon Brace struct ctlr_info *h = container_of(to_delayed_work(work), 86446636e7f4SDon Brace struct ctlr_info, monitor_ctlr_work); 86456636e7f4SDon Brace 86466636e7f4SDon Brace detect_controller_lockup(h); 86476636e7f4SDon Brace if (lockup_detected(h)) 86486636e7f4SDon Brace return; 86499846590eSStephen M. Cameron 86508a98db73SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 86516636e7f4SDon Brace if (!h->remove_in_progress) 86528a98db73SStephen M. Cameron schedule_delayed_work(&h->monitor_ctlr_work, 86538a98db73SStephen M. Cameron h->heartbeat_sample_interval); 86548a98db73SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 8655a0c12413SStephen M. Cameron } 8656a0c12413SStephen M. Cameron 86576636e7f4SDon Brace static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h, 86586636e7f4SDon Brace char *name) 86596636e7f4SDon Brace { 86606636e7f4SDon Brace struct workqueue_struct *wq = NULL; 86616636e7f4SDon Brace 8662397ea9cbSDon Brace wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr); 86636636e7f4SDon Brace if (!wq) 86646636e7f4SDon Brace dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name); 86656636e7f4SDon Brace 86666636e7f4SDon Brace return wq; 86676636e7f4SDon Brace } 86686636e7f4SDon Brace 86696f039790SGreg Kroah-Hartman static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 86704c2a8c40SStephen M. Cameron { 86714c2a8c40SStephen M. Cameron int dac, rc; 86724c2a8c40SStephen M. Cameron struct ctlr_info *h; 867364670ac8SStephen M. Cameron int try_soft_reset = 0; 867464670ac8SStephen M. Cameron unsigned long flags; 86756b6c1cd7STomas Henzl u32 board_id; 86764c2a8c40SStephen M. Cameron 86774c2a8c40SStephen M. Cameron if (number_of_controllers == 0) 86784c2a8c40SStephen M. Cameron printk(KERN_INFO DRIVER_NAME "\n"); 86794c2a8c40SStephen M. Cameron 86806b6c1cd7STomas Henzl rc = hpsa_lookup_board_id(pdev, &board_id); 86816b6c1cd7STomas Henzl if (rc < 0) { 86826b6c1cd7STomas Henzl dev_warn(&pdev->dev, "Board ID not found\n"); 86836b6c1cd7STomas Henzl return rc; 86846b6c1cd7STomas Henzl } 86856b6c1cd7STomas Henzl 86866b6c1cd7STomas Henzl rc = hpsa_init_reset_devices(pdev, board_id); 868764670ac8SStephen M. Cameron if (rc) { 868864670ac8SStephen M. Cameron if (rc != -ENOTSUPP) 86894c2a8c40SStephen M. Cameron return rc; 869064670ac8SStephen M. Cameron /* If the reset fails in a particular way (it has no way to do 869164670ac8SStephen M. Cameron * a proper hard reset, so returns -ENOTSUPP) we can try to do 869264670ac8SStephen M. Cameron * a soft reset once we get the controller configured up to the 869364670ac8SStephen M. Cameron * point that it can accept a command. 869464670ac8SStephen M. Cameron */ 869564670ac8SStephen M. Cameron try_soft_reset = 1; 869664670ac8SStephen M. Cameron rc = 0; 869764670ac8SStephen M. Cameron } 869864670ac8SStephen M. Cameron 869964670ac8SStephen M. Cameron reinit_after_soft_reset: 87004c2a8c40SStephen M. Cameron 8701303932fdSDon Brace /* Command structures must be aligned on a 32-byte boundary because 8702303932fdSDon Brace * the 5 lower bits of the address are used by the hardware. and by 8703303932fdSDon Brace * the driver. See comments in hpsa.h for more info. 8704303932fdSDon Brace */ 8705303932fdSDon Brace BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT); 8706edd16368SStephen M. Cameron h = kzalloc(sizeof(*h), GFP_KERNEL); 8707105a3dbcSRobert Elliott if (!h) { 8708105a3dbcSRobert Elliott dev_err(&pdev->dev, "Failed to allocate controller head\n"); 8709ecd9aad4SStephen M. Cameron return -ENOMEM; 8710105a3dbcSRobert Elliott } 8711edd16368SStephen M. Cameron 871255c06c71SStephen M. Cameron h->pdev = pdev; 8713105a3dbcSRobert Elliott 8714a9a3a273SStephen M. Cameron h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT; 87159846590eSStephen M. Cameron INIT_LIST_HEAD(&h->offline_device_list); 87166eaf46fdSStephen M. Cameron spin_lock_init(&h->lock); 87179846590eSStephen M. Cameron spin_lock_init(&h->offline_device_lock); 87186eaf46fdSStephen M. Cameron spin_lock_init(&h->scan_lock); 871934f0c627SDon Brace atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS); 87209b5c48c2SStephen Cameron atomic_set(&h->abort_cmds_available, HPSA_CMDS_RESERVED_FOR_ABORTS); 8721094963daSStephen M. Cameron 8722094963daSStephen M. Cameron /* Allocate and clear per-cpu variable lockup_detected */ 8723094963daSStephen M. Cameron h->lockup_detected = alloc_percpu(u32); 87242a5ac326SStephen M. Cameron if (!h->lockup_detected) { 8725105a3dbcSRobert Elliott dev_err(&h->pdev->dev, "Failed to allocate lockup detector\n"); 87262a5ac326SStephen M. Cameron rc = -ENOMEM; 87272efa5929SRobert Elliott goto clean1; /* aer/h */ 87282a5ac326SStephen M. Cameron } 8729094963daSStephen M. Cameron set_lockup_detected_for_all_cpus(h, 0); 8730094963daSStephen M. Cameron 873155c06c71SStephen M. Cameron rc = hpsa_pci_init(h); 8732105a3dbcSRobert Elliott if (rc) 87332946e82bSRobert Elliott goto clean2; /* lu, aer/h */ 8734edd16368SStephen M. Cameron 87352946e82bSRobert Elliott /* relies on h-> settings made by hpsa_pci_init, including 87362946e82bSRobert Elliott * interrupt_mode h->intr */ 87372946e82bSRobert Elliott rc = hpsa_scsi_host_alloc(h); 87382946e82bSRobert Elliott if (rc) 87392946e82bSRobert Elliott goto clean2_5; /* pci, lu, aer/h */ 87402946e82bSRobert Elliott 87412946e82bSRobert Elliott sprintf(h->devname, HPSA "%d", h->scsi_host->host_no); 8742edd16368SStephen M. Cameron h->ctlr = number_of_controllers; 8743edd16368SStephen M. Cameron number_of_controllers++; 8744edd16368SStephen M. Cameron 8745edd16368SStephen M. Cameron /* configure PCI DMA stuff */ 8746ecd9aad4SStephen M. Cameron rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 8747ecd9aad4SStephen M. Cameron if (rc == 0) { 8748edd16368SStephen M. Cameron dac = 1; 8749ecd9aad4SStephen M. Cameron } else { 8750ecd9aad4SStephen M. Cameron rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 8751ecd9aad4SStephen M. Cameron if (rc == 0) { 8752edd16368SStephen M. Cameron dac = 0; 8753ecd9aad4SStephen M. Cameron } else { 8754edd16368SStephen M. Cameron dev_err(&pdev->dev, "no suitable DMA available\n"); 87552946e82bSRobert Elliott goto clean3; /* shost, pci, lu, aer/h */ 8756edd16368SStephen M. Cameron } 8757ecd9aad4SStephen M. Cameron } 8758edd16368SStephen M. Cameron 8759edd16368SStephen M. Cameron /* make sure the board interrupts are off */ 8760edd16368SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 876110f66018SStephen M. Cameron 8762105a3dbcSRobert Elliott rc = hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx); 8763105a3dbcSRobert Elliott if (rc) 87642946e82bSRobert Elliott goto clean3; /* shost, pci, lu, aer/h */ 8765d37ffbe4SRobert Elliott rc = hpsa_alloc_cmd_pool(h); 87668947fd10SRobert Elliott if (rc) 87672946e82bSRobert Elliott goto clean4; /* irq, shost, pci, lu, aer/h */ 8768105a3dbcSRobert Elliott rc = hpsa_alloc_sg_chain_blocks(h); 8769105a3dbcSRobert Elliott if (rc) 87702946e82bSRobert Elliott goto clean5; /* cmd, irq, shost, pci, lu, aer/h */ 8771a08a8471SStephen M. Cameron init_waitqueue_head(&h->scan_wait_queue); 87729b5c48c2SStephen Cameron init_waitqueue_head(&h->abort_cmd_wait_queue); 8773d604f533SWebb Scales init_waitqueue_head(&h->event_sync_wait_queue); 8774d604f533SWebb Scales mutex_init(&h->reset_mutex); 8775a08a8471SStephen M. Cameron h->scan_finished = 1; /* no scan currently in progress */ 8776edd16368SStephen M. Cameron 8777edd16368SStephen M. Cameron pci_set_drvdata(pdev, h); 87789a41338eSStephen M. Cameron h->ndevices = 0; 87792946e82bSRobert Elliott 87809a41338eSStephen M. Cameron spin_lock_init(&h->devlock); 8781105a3dbcSRobert Elliott rc = hpsa_put_ctlr_into_performant_mode(h); 8782105a3dbcSRobert Elliott if (rc) 87832946e82bSRobert Elliott goto clean6; /* sg, cmd, irq, shost, pci, lu, aer/h */ 87842946e82bSRobert Elliott 87852efa5929SRobert Elliott /* create the resubmit workqueue */ 87862efa5929SRobert Elliott h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan"); 87872efa5929SRobert Elliott if (!h->rescan_ctlr_wq) { 87882efa5929SRobert Elliott rc = -ENOMEM; 87892efa5929SRobert Elliott goto clean7; 87902efa5929SRobert Elliott } 87912efa5929SRobert Elliott 87922efa5929SRobert Elliott h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit"); 87932efa5929SRobert Elliott if (!h->resubmit_wq) { 87942efa5929SRobert Elliott rc = -ENOMEM; 87952efa5929SRobert Elliott goto clean7; /* aer/h */ 87962efa5929SRobert Elliott } 879764670ac8SStephen M. Cameron 8798105a3dbcSRobert Elliott /* 8799105a3dbcSRobert Elliott * At this point, the controller is ready to take commands. 880064670ac8SStephen M. Cameron * Now, if reset_devices and the hard reset didn't work, try 880164670ac8SStephen M. Cameron * the soft reset and see if that works. 880264670ac8SStephen M. Cameron */ 880364670ac8SStephen M. Cameron if (try_soft_reset) { 880464670ac8SStephen M. Cameron 880564670ac8SStephen M. Cameron /* This is kind of gross. We may or may not get a completion 880664670ac8SStephen M. Cameron * from the soft reset command, and if we do, then the value 880764670ac8SStephen M. Cameron * from the fifo may or may not be valid. So, we wait 10 secs 880864670ac8SStephen M. Cameron * after the reset throwing away any completions we get during 880964670ac8SStephen M. Cameron * that time. Unregister the interrupt handler and register 881064670ac8SStephen M. Cameron * fake ones to scoop up any residual completions. 881164670ac8SStephen M. Cameron */ 881264670ac8SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 881364670ac8SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 881464670ac8SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 8815ec501a18SRobert Elliott hpsa_free_irqs(h); 88169ee61794SRobert Elliott rc = hpsa_request_irqs(h, hpsa_msix_discard_completions, 881764670ac8SStephen M. Cameron hpsa_intx_discard_completions); 881864670ac8SStephen M. Cameron if (rc) { 88199ee61794SRobert Elliott dev_warn(&h->pdev->dev, 88209ee61794SRobert Elliott "Failed to request_irq after soft reset.\n"); 8821d498757cSRobert Elliott /* 8822b2ef480cSRobert Elliott * cannot goto clean7 or free_irqs will be called 8823b2ef480cSRobert Elliott * again. Instead, do its work 8824b2ef480cSRobert Elliott */ 8825b2ef480cSRobert Elliott hpsa_free_performant_mode(h); /* clean7 */ 8826b2ef480cSRobert Elliott hpsa_free_sg_chain_blocks(h); /* clean6 */ 8827b2ef480cSRobert Elliott hpsa_free_cmd_pool(h); /* clean5 */ 8828b2ef480cSRobert Elliott /* 8829b2ef480cSRobert Elliott * skip hpsa_free_irqs(h) clean4 since that 8830b2ef480cSRobert Elliott * was just called before request_irqs failed 8831d498757cSRobert Elliott */ 8832d498757cSRobert Elliott goto clean3; 883364670ac8SStephen M. Cameron } 883464670ac8SStephen M. Cameron 883564670ac8SStephen M. Cameron rc = hpsa_kdump_soft_reset(h); 883664670ac8SStephen M. Cameron if (rc) 883764670ac8SStephen M. Cameron /* Neither hard nor soft reset worked, we're hosed. */ 88387ef7323fSDon Brace goto clean7; 883964670ac8SStephen M. Cameron 884064670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Board READY.\n"); 884164670ac8SStephen M. Cameron dev_info(&h->pdev->dev, 884264670ac8SStephen M. Cameron "Waiting for stale completions to drain.\n"); 884364670ac8SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_ON); 884464670ac8SStephen M. Cameron msleep(10000); 884564670ac8SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 884664670ac8SStephen M. Cameron 884764670ac8SStephen M. Cameron rc = controller_reset_failed(h->cfgtable); 884864670ac8SStephen M. Cameron if (rc) 884964670ac8SStephen M. Cameron dev_info(&h->pdev->dev, 885064670ac8SStephen M. Cameron "Soft reset appears to have failed.\n"); 885164670ac8SStephen M. Cameron 885264670ac8SStephen M. Cameron /* since the controller's reset, we have to go back and re-init 885364670ac8SStephen M. Cameron * everything. Easiest to just forget what we've done and do it 885464670ac8SStephen M. Cameron * all over again. 885564670ac8SStephen M. Cameron */ 885664670ac8SStephen M. Cameron hpsa_undo_allocations_after_kdump_soft_reset(h); 885764670ac8SStephen M. Cameron try_soft_reset = 0; 885864670ac8SStephen M. Cameron if (rc) 8859b2ef480cSRobert Elliott /* don't goto clean, we already unallocated */ 886064670ac8SStephen M. Cameron return -ENODEV; 886164670ac8SStephen M. Cameron 886264670ac8SStephen M. Cameron goto reinit_after_soft_reset; 886364670ac8SStephen M. Cameron } 8864edd16368SStephen M. Cameron 8865da0697bdSScott Teel /* Enable Accelerated IO path at driver layer */ 8866da0697bdSScott Teel h->acciopath_status = 1; 886734592254SScott Teel /* Disable discovery polling.*/ 886834592254SScott Teel h->discovery_polling = 0; 8869da0697bdSScott Teel 8870e863d68eSScott Teel 8871edd16368SStephen M. Cameron /* Turn the interrupts on so we can service requests */ 8872edd16368SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_ON); 8873edd16368SStephen M. Cameron 8874339b2b14SStephen M. Cameron hpsa_hba_inquiry(h); 88758a98db73SStephen M. Cameron 887634592254SScott Teel h->lastlogicals = kzalloc(sizeof(*(h->lastlogicals)), GFP_KERNEL); 887734592254SScott Teel if (!h->lastlogicals) 887834592254SScott Teel dev_info(&h->pdev->dev, 887934592254SScott Teel "Can't track change to report lun data\n"); 888034592254SScott Teel 8881cf477237SDon Brace /* hook into SCSI subsystem */ 8882cf477237SDon Brace rc = hpsa_scsi_add_host(h); 8883cf477237SDon Brace if (rc) 8884cf477237SDon Brace goto clean7; /* perf, sg, cmd, irq, shost, pci, lu, aer/h */ 8885cf477237SDon Brace 88868a98db73SStephen M. Cameron /* Monitor the controller for firmware lockups */ 88878a98db73SStephen M. Cameron h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 88888a98db73SStephen M. Cameron INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker); 88898a98db73SStephen M. Cameron schedule_delayed_work(&h->monitor_ctlr_work, 88908a98db73SStephen M. Cameron h->heartbeat_sample_interval); 88916636e7f4SDon Brace INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker); 88926636e7f4SDon Brace queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work, 88936636e7f4SDon Brace h->heartbeat_sample_interval); 889488bf6d62SStephen M. Cameron return 0; 8895edd16368SStephen M. Cameron 88962946e82bSRobert Elliott clean7: /* perf, sg, cmd, irq, shost, pci, lu, aer/h */ 8897105a3dbcSRobert Elliott hpsa_free_performant_mode(h); 8898105a3dbcSRobert Elliott h->access.set_intr_mask(h, HPSA_INTR_OFF); 8899105a3dbcSRobert Elliott clean6: /* sg, cmd, irq, pci, lockup, wq/aer/h */ 890033a2ffceSStephen M. Cameron hpsa_free_sg_chain_blocks(h); 89012946e82bSRobert Elliott clean5: /* cmd, irq, shost, pci, lu, aer/h */ 89022e9d1b36SStephen M. Cameron hpsa_free_cmd_pool(h); 89032946e82bSRobert Elliott clean4: /* irq, shost, pci, lu, aer/h */ 8904ec501a18SRobert Elliott hpsa_free_irqs(h); 89052946e82bSRobert Elliott clean3: /* shost, pci, lu, aer/h */ 89062946e82bSRobert Elliott scsi_host_put(h->scsi_host); 89072946e82bSRobert Elliott h->scsi_host = NULL; 89082946e82bSRobert Elliott clean2_5: /* pci, lu, aer/h */ 8909195f2c65SRobert Elliott hpsa_free_pci_init(h); 89102946e82bSRobert Elliott clean2: /* lu, aer/h */ 8911105a3dbcSRobert Elliott if (h->lockup_detected) { 8912094963daSStephen M. Cameron free_percpu(h->lockup_detected); 8913105a3dbcSRobert Elliott h->lockup_detected = NULL; 8914105a3dbcSRobert Elliott } 8915105a3dbcSRobert Elliott clean1: /* wq/aer/h */ 8916105a3dbcSRobert Elliott if (h->resubmit_wq) { 8917105a3dbcSRobert Elliott destroy_workqueue(h->resubmit_wq); 8918105a3dbcSRobert Elliott h->resubmit_wq = NULL; 8919105a3dbcSRobert Elliott } 8920105a3dbcSRobert Elliott if (h->rescan_ctlr_wq) { 8921105a3dbcSRobert Elliott destroy_workqueue(h->rescan_ctlr_wq); 8922105a3dbcSRobert Elliott h->rescan_ctlr_wq = NULL; 8923105a3dbcSRobert Elliott } 8924edd16368SStephen M. Cameron kfree(h); 8925ecd9aad4SStephen M. Cameron return rc; 8926edd16368SStephen M. Cameron } 8927edd16368SStephen M. Cameron 8928edd16368SStephen M. Cameron static void hpsa_flush_cache(struct ctlr_info *h) 8929edd16368SStephen M. Cameron { 8930edd16368SStephen M. Cameron char *flush_buf; 8931edd16368SStephen M. Cameron struct CommandList *c; 893225163bd5SWebb Scales int rc; 8933702890e3SStephen M. Cameron 8934094963daSStephen M. Cameron if (unlikely(lockup_detected(h))) 8935702890e3SStephen M. Cameron return; 8936edd16368SStephen M. Cameron flush_buf = kzalloc(4, GFP_KERNEL); 8937edd16368SStephen M. Cameron if (!flush_buf) 8938edd16368SStephen M. Cameron return; 8939edd16368SStephen M. Cameron 894045fcb86eSStephen Cameron c = cmd_alloc(h); 8941bf43caf3SRobert Elliott 8942a2dac136SStephen M. Cameron if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0, 8943a2dac136SStephen M. Cameron RAID_CTLR_LUNID, TYPE_CMD)) { 8944a2dac136SStephen M. Cameron goto out; 8945a2dac136SStephen M. Cameron } 894625163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 8947c448ecfaSDon Brace PCI_DMA_TODEVICE, DEFAULT_TIMEOUT); 894825163bd5SWebb Scales if (rc) 894925163bd5SWebb Scales goto out; 8950edd16368SStephen M. Cameron if (c->err_info->CommandStatus != 0) 8951a2dac136SStephen M. Cameron out: 8952edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 8953edd16368SStephen M. Cameron "error flushing cache on controller\n"); 895445fcb86eSStephen Cameron cmd_free(h, c); 8955edd16368SStephen M. Cameron kfree(flush_buf); 8956edd16368SStephen M. Cameron } 8957edd16368SStephen M. Cameron 8958c2adae44SScott Teel /* Make controller gather fresh report lun data each time we 8959c2adae44SScott Teel * send down a report luns request 8960c2adae44SScott Teel */ 8961c2adae44SScott Teel static void hpsa_disable_rld_caching(struct ctlr_info *h) 8962c2adae44SScott Teel { 8963c2adae44SScott Teel u32 *options; 8964c2adae44SScott Teel struct CommandList *c; 8965c2adae44SScott Teel int rc; 8966c2adae44SScott Teel 8967c2adae44SScott Teel /* Don't bother trying to set diag options if locked up */ 8968c2adae44SScott Teel if (unlikely(h->lockup_detected)) 8969c2adae44SScott Teel return; 8970c2adae44SScott Teel 8971c2adae44SScott Teel options = kzalloc(sizeof(*options), GFP_KERNEL); 8972c2adae44SScott Teel if (!options) { 8973c2adae44SScott Teel dev_err(&h->pdev->dev, 8974c2adae44SScott Teel "Error: failed to disable rld caching, during alloc.\n"); 8975c2adae44SScott Teel return; 8976c2adae44SScott Teel } 8977c2adae44SScott Teel 8978c2adae44SScott Teel c = cmd_alloc(h); 8979c2adae44SScott Teel 8980c2adae44SScott Teel /* first, get the current diag options settings */ 8981c2adae44SScott Teel if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0, 8982c2adae44SScott Teel RAID_CTLR_LUNID, TYPE_CMD)) 8983c2adae44SScott Teel goto errout; 8984c2adae44SScott Teel 8985c2adae44SScott Teel rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 8986c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 8987c2adae44SScott Teel if ((rc != 0) || (c->err_info->CommandStatus != 0)) 8988c2adae44SScott Teel goto errout; 8989c2adae44SScott Teel 8990c2adae44SScott Teel /* Now, set the bit for disabling the RLD caching */ 8991c2adae44SScott Teel *options |= HPSA_DIAG_OPTS_DISABLE_RLD_CACHING; 8992c2adae44SScott Teel 8993c2adae44SScott Teel if (fill_cmd(c, BMIC_SET_DIAG_OPTIONS, h, options, 4, 0, 8994c2adae44SScott Teel RAID_CTLR_LUNID, TYPE_CMD)) 8995c2adae44SScott Teel goto errout; 8996c2adae44SScott Teel 8997c2adae44SScott Teel rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 8998c448ecfaSDon Brace PCI_DMA_TODEVICE, DEFAULT_TIMEOUT); 8999c2adae44SScott Teel if ((rc != 0) || (c->err_info->CommandStatus != 0)) 9000c2adae44SScott Teel goto errout; 9001c2adae44SScott Teel 9002c2adae44SScott Teel /* Now verify that it got set: */ 9003c2adae44SScott Teel if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0, 9004c2adae44SScott Teel RAID_CTLR_LUNID, TYPE_CMD)) 9005c2adae44SScott Teel goto errout; 9006c2adae44SScott Teel 9007c2adae44SScott Teel rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 9008c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 9009c2adae44SScott Teel if ((rc != 0) || (c->err_info->CommandStatus != 0)) 9010c2adae44SScott Teel goto errout; 9011c2adae44SScott Teel 9012d8a080c3SDan Carpenter if (*options & HPSA_DIAG_OPTS_DISABLE_RLD_CACHING) 9013c2adae44SScott Teel goto out; 9014c2adae44SScott Teel 9015c2adae44SScott Teel errout: 9016c2adae44SScott Teel dev_err(&h->pdev->dev, 9017c2adae44SScott Teel "Error: failed to disable report lun data caching.\n"); 9018c2adae44SScott Teel out: 9019c2adae44SScott Teel cmd_free(h, c); 9020c2adae44SScott Teel kfree(options); 9021c2adae44SScott Teel } 9022c2adae44SScott Teel 9023edd16368SStephen M. Cameron static void hpsa_shutdown(struct pci_dev *pdev) 9024edd16368SStephen M. Cameron { 9025edd16368SStephen M. Cameron struct ctlr_info *h; 9026edd16368SStephen M. Cameron 9027edd16368SStephen M. Cameron h = pci_get_drvdata(pdev); 9028edd16368SStephen M. Cameron /* Turn board interrupts off and send the flush cache command 9029edd16368SStephen M. Cameron * sendcmd will turn off interrupt, and send the flush... 9030edd16368SStephen M. Cameron * To write all data in the battery backed cache to disks 9031edd16368SStephen M. Cameron */ 9032edd16368SStephen M. Cameron hpsa_flush_cache(h); 9033edd16368SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 9034105a3dbcSRobert Elliott hpsa_free_irqs(h); /* init_one 4 */ 9035cc64c817SRobert Elliott hpsa_disable_interrupt_mode(h); /* pci_init 2 */ 9036edd16368SStephen M. Cameron } 9037edd16368SStephen M. Cameron 90386f039790SGreg Kroah-Hartman static void hpsa_free_device_info(struct ctlr_info *h) 903955e14e76SStephen M. Cameron { 904055e14e76SStephen M. Cameron int i; 904155e14e76SStephen M. Cameron 9042105a3dbcSRobert Elliott for (i = 0; i < h->ndevices; i++) { 904355e14e76SStephen M. Cameron kfree(h->dev[i]); 9044105a3dbcSRobert Elliott h->dev[i] = NULL; 9045105a3dbcSRobert Elliott } 904655e14e76SStephen M. Cameron } 904755e14e76SStephen M. Cameron 90486f039790SGreg Kroah-Hartman static void hpsa_remove_one(struct pci_dev *pdev) 9049edd16368SStephen M. Cameron { 9050edd16368SStephen M. Cameron struct ctlr_info *h; 90518a98db73SStephen M. Cameron unsigned long flags; 9052edd16368SStephen M. Cameron 9053edd16368SStephen M. Cameron if (pci_get_drvdata(pdev) == NULL) { 9054edd16368SStephen M. Cameron dev_err(&pdev->dev, "unable to remove device\n"); 9055edd16368SStephen M. Cameron return; 9056edd16368SStephen M. Cameron } 9057edd16368SStephen M. Cameron h = pci_get_drvdata(pdev); 90588a98db73SStephen M. Cameron 90598a98db73SStephen M. Cameron /* Get rid of any controller monitoring work items */ 90608a98db73SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 90618a98db73SStephen M. Cameron h->remove_in_progress = 1; 90628a98db73SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 90636636e7f4SDon Brace cancel_delayed_work_sync(&h->monitor_ctlr_work); 90646636e7f4SDon Brace cancel_delayed_work_sync(&h->rescan_ctlr_work); 90656636e7f4SDon Brace destroy_workqueue(h->rescan_ctlr_wq); 90666636e7f4SDon Brace destroy_workqueue(h->resubmit_wq); 9067cc64c817SRobert Elliott 90682d041306SDon Brace /* 90692d041306SDon Brace * Call before disabling interrupts. 90702d041306SDon Brace * scsi_remove_host can trigger I/O operations especially 90712d041306SDon Brace * when multipath is enabled. There can be SYNCHRONIZE CACHE 90722d041306SDon Brace * operations which cannot complete and will hang the system. 90732d041306SDon Brace */ 90742d041306SDon Brace if (h->scsi_host) 90752d041306SDon Brace scsi_remove_host(h->scsi_host); /* init_one 8 */ 9076105a3dbcSRobert Elliott /* includes hpsa_free_irqs - init_one 4 */ 9077195f2c65SRobert Elliott /* includes hpsa_disable_interrupt_mode - pci_init 2 */ 9078edd16368SStephen M. Cameron hpsa_shutdown(pdev); 9079cc64c817SRobert Elliott 9080105a3dbcSRobert Elliott hpsa_free_device_info(h); /* scan */ 9081105a3dbcSRobert Elliott 90822946e82bSRobert Elliott kfree(h->hba_inquiry_data); /* init_one 10 */ 90832946e82bSRobert Elliott h->hba_inquiry_data = NULL; /* init_one 10 */ 90842946e82bSRobert Elliott hpsa_free_ioaccel2_sg_chain_blocks(h); 9085105a3dbcSRobert Elliott hpsa_free_performant_mode(h); /* init_one 7 */ 9086105a3dbcSRobert Elliott hpsa_free_sg_chain_blocks(h); /* init_one 6 */ 90871fb7c98aSRobert Elliott hpsa_free_cmd_pool(h); /* init_one 5 */ 908834592254SScott Teel kfree(h->lastlogicals); 9089105a3dbcSRobert Elliott 9090105a3dbcSRobert Elliott /* hpsa_free_irqs already called via hpsa_shutdown init_one 4 */ 9091195f2c65SRobert Elliott 90922946e82bSRobert Elliott scsi_host_put(h->scsi_host); /* init_one 3 */ 90932946e82bSRobert Elliott h->scsi_host = NULL; /* init_one 3 */ 90942946e82bSRobert Elliott 9095195f2c65SRobert Elliott /* includes hpsa_disable_interrupt_mode - pci_init 2 */ 90962946e82bSRobert Elliott hpsa_free_pci_init(h); /* init_one 2.5 */ 9097195f2c65SRobert Elliott 9098105a3dbcSRobert Elliott free_percpu(h->lockup_detected); /* init_one 2 */ 9099105a3dbcSRobert Elliott h->lockup_detected = NULL; /* init_one 2 */ 9100105a3dbcSRobert Elliott /* (void) pci_disable_pcie_error_reporting(pdev); */ /* init_one 1 */ 9101d04e62b9SKevin Barnett 9102d04e62b9SKevin Barnett hpsa_delete_sas_host(h); 9103d04e62b9SKevin Barnett 9104105a3dbcSRobert Elliott kfree(h); /* init_one 1 */ 9105edd16368SStephen M. Cameron } 9106edd16368SStephen M. Cameron 9107edd16368SStephen M. Cameron static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev, 9108edd16368SStephen M. Cameron __attribute__((unused)) pm_message_t state) 9109edd16368SStephen M. Cameron { 9110edd16368SStephen M. Cameron return -ENOSYS; 9111edd16368SStephen M. Cameron } 9112edd16368SStephen M. Cameron 9113edd16368SStephen M. Cameron static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev) 9114edd16368SStephen M. Cameron { 9115edd16368SStephen M. Cameron return -ENOSYS; 9116edd16368SStephen M. Cameron } 9117edd16368SStephen M. Cameron 9118edd16368SStephen M. Cameron static struct pci_driver hpsa_pci_driver = { 9119f79cfec6SStephen M. Cameron .name = HPSA, 9120edd16368SStephen M. Cameron .probe = hpsa_init_one, 91216f039790SGreg Kroah-Hartman .remove = hpsa_remove_one, 9122edd16368SStephen M. Cameron .id_table = hpsa_pci_device_id, /* id_table */ 9123edd16368SStephen M. Cameron .shutdown = hpsa_shutdown, 9124edd16368SStephen M. Cameron .suspend = hpsa_suspend, 9125edd16368SStephen M. Cameron .resume = hpsa_resume, 9126edd16368SStephen M. Cameron }; 9127edd16368SStephen M. Cameron 9128303932fdSDon Brace /* Fill in bucket_map[], given nsgs (the max number of 9129303932fdSDon Brace * scatter gather elements supported) and bucket[], 9130303932fdSDon Brace * which is an array of 8 integers. The bucket[] array 9131303932fdSDon Brace * contains 8 different DMA transfer sizes (in 16 9132303932fdSDon Brace * byte increments) which the controller uses to fetch 9133303932fdSDon Brace * commands. This function fills in bucket_map[], which 9134303932fdSDon Brace * maps a given number of scatter gather elements to one of 9135303932fdSDon Brace * the 8 DMA transfer sizes. The point of it is to allow the 9136303932fdSDon Brace * controller to only do as much DMA as needed to fetch the 9137303932fdSDon Brace * command, with the DMA transfer size encoded in the lower 9138303932fdSDon Brace * bits of the command address. 9139303932fdSDon Brace */ 9140303932fdSDon Brace static void calc_bucket_map(int bucket[], int num_buckets, 91412b08b3e9SDon Brace int nsgs, int min_blocks, u32 *bucket_map) 9142303932fdSDon Brace { 9143303932fdSDon Brace int i, j, b, size; 9144303932fdSDon Brace 9145303932fdSDon Brace /* Note, bucket_map must have nsgs+1 entries. */ 9146303932fdSDon Brace for (i = 0; i <= nsgs; i++) { 9147303932fdSDon Brace /* Compute size of a command with i SG entries */ 9148e1f7de0cSMatt Gates size = i + min_blocks; 9149303932fdSDon Brace b = num_buckets; /* Assume the biggest bucket */ 9150303932fdSDon Brace /* Find the bucket that is just big enough */ 9151e1f7de0cSMatt Gates for (j = 0; j < num_buckets; j++) { 9152303932fdSDon Brace if (bucket[j] >= size) { 9153303932fdSDon Brace b = j; 9154303932fdSDon Brace break; 9155303932fdSDon Brace } 9156303932fdSDon Brace } 9157303932fdSDon Brace /* for a command with i SG entries, use bucket b. */ 9158303932fdSDon Brace bucket_map[i] = b; 9159303932fdSDon Brace } 9160303932fdSDon Brace } 9161303932fdSDon Brace 9162105a3dbcSRobert Elliott /* 9163105a3dbcSRobert Elliott * return -ENODEV on err, 0 on success (or no action) 9164105a3dbcSRobert Elliott * allocates numerous items that must be freed later 9165105a3dbcSRobert Elliott */ 9166c706a795SRobert Elliott static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support) 9167303932fdSDon Brace { 91686c311b57SStephen M. Cameron int i; 91696c311b57SStephen M. Cameron unsigned long register_value; 9170e1f7de0cSMatt Gates unsigned long transMethod = CFGTBL_Trans_Performant | 9171e1f7de0cSMatt Gates (trans_support & CFGTBL_Trans_use_short_tags) | 9172e1f7de0cSMatt Gates CFGTBL_Trans_enable_directed_msix | 9173b9af4937SStephen M. Cameron (trans_support & (CFGTBL_Trans_io_accel1 | 9174b9af4937SStephen M. Cameron CFGTBL_Trans_io_accel2)); 9175e1f7de0cSMatt Gates struct access_method access = SA5_performant_access; 9176def342bdSStephen M. Cameron 9177def342bdSStephen M. Cameron /* This is a bit complicated. There are 8 registers on 9178def342bdSStephen M. Cameron * the controller which we write to to tell it 8 different 9179def342bdSStephen M. Cameron * sizes of commands which there may be. It's a way of 9180def342bdSStephen M. Cameron * reducing the DMA done to fetch each command. Encoded into 9181def342bdSStephen M. Cameron * each command's tag are 3 bits which communicate to the controller 9182def342bdSStephen M. Cameron * which of the eight sizes that command fits within. The size of 9183def342bdSStephen M. Cameron * each command depends on how many scatter gather entries there are. 9184def342bdSStephen M. Cameron * Each SG entry requires 16 bytes. The eight registers are programmed 9185def342bdSStephen M. Cameron * with the number of 16-byte blocks a command of that size requires. 9186def342bdSStephen M. Cameron * The smallest command possible requires 5 such 16 byte blocks. 9187d66ae08bSStephen M. Cameron * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte 9188def342bdSStephen M. Cameron * blocks. Note, this only extends to the SG entries contained 9189def342bdSStephen M. Cameron * within the command block, and does not extend to chained blocks 9190def342bdSStephen M. Cameron * of SG elements. bft[] contains the eight values we write to 9191def342bdSStephen M. Cameron * the registers. They are not evenly distributed, but have more 9192def342bdSStephen M. Cameron * sizes for small commands, and fewer sizes for larger commands. 9193def342bdSStephen M. Cameron */ 9194d66ae08bSStephen M. Cameron int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4}; 9195b9af4937SStephen M. Cameron #define MIN_IOACCEL2_BFT_ENTRY 5 9196b9af4937SStephen M. Cameron #define HPSA_IOACCEL2_HEADER_SZ 4 9197b9af4937SStephen M. Cameron int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12, 9198b9af4937SStephen M. Cameron 13, 14, 15, 16, 17, 18, 19, 9199b9af4937SStephen M. Cameron HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES}; 9200b9af4937SStephen M. Cameron BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16); 9201b9af4937SStephen M. Cameron BUILD_BUG_ON(ARRAY_SIZE(bft) != 8); 9202b9af4937SStephen M. Cameron BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) > 9203b9af4937SStephen M. Cameron 16 * MIN_IOACCEL2_BFT_ENTRY); 9204b9af4937SStephen M. Cameron BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16); 9205d66ae08bSStephen M. Cameron BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4); 9206303932fdSDon Brace /* 5 = 1 s/g entry or 4k 9207303932fdSDon Brace * 6 = 2 s/g entry or 8k 9208303932fdSDon Brace * 8 = 4 s/g entry or 16k 9209303932fdSDon Brace * 10 = 6 s/g entry or 24k 9210303932fdSDon Brace */ 9211303932fdSDon Brace 9212b3a52e79SStephen M. Cameron /* If the controller supports either ioaccel method then 9213b3a52e79SStephen M. Cameron * we can also use the RAID stack submit path that does not 9214b3a52e79SStephen M. Cameron * perform the superfluous readl() after each command submission. 9215b3a52e79SStephen M. Cameron */ 9216b3a52e79SStephen M. Cameron if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2)) 9217b3a52e79SStephen M. Cameron access = SA5_performant_access_no_read; 9218b3a52e79SStephen M. Cameron 9219303932fdSDon Brace /* Controller spec: zero out this buffer. */ 9220072b0518SStephen M. Cameron for (i = 0; i < h->nreply_queues; i++) 9221072b0518SStephen M. Cameron memset(h->reply_queue[i].head, 0, h->reply_queue_size); 9222303932fdSDon Brace 9223d66ae08bSStephen M. Cameron bft[7] = SG_ENTRIES_IN_CMD + 4; 9224d66ae08bSStephen M. Cameron calc_bucket_map(bft, ARRAY_SIZE(bft), 9225e1f7de0cSMatt Gates SG_ENTRIES_IN_CMD, 4, h->blockFetchTable); 9226303932fdSDon Brace for (i = 0; i < 8; i++) 9227303932fdSDon Brace writel(bft[i], &h->transtable->BlockFetch[i]); 9228303932fdSDon Brace 9229303932fdSDon Brace /* size of controller ring buffer */ 9230303932fdSDon Brace writel(h->max_commands, &h->transtable->RepQSize); 9231254f796bSMatt Gates writel(h->nreply_queues, &h->transtable->RepQCount); 9232303932fdSDon Brace writel(0, &h->transtable->RepQCtrAddrLow32); 9233303932fdSDon Brace writel(0, &h->transtable->RepQCtrAddrHigh32); 9234254f796bSMatt Gates 9235254f796bSMatt Gates for (i = 0; i < h->nreply_queues; i++) { 9236254f796bSMatt Gates writel(0, &h->transtable->RepQAddr[i].upper); 9237072b0518SStephen M. Cameron writel(h->reply_queue[i].busaddr, 9238254f796bSMatt Gates &h->transtable->RepQAddr[i].lower); 9239254f796bSMatt Gates } 9240254f796bSMatt Gates 9241b9af4937SStephen M. Cameron writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi); 9242e1f7de0cSMatt Gates writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest)); 9243e1f7de0cSMatt Gates /* 9244e1f7de0cSMatt Gates * enable outbound interrupt coalescing in accelerator mode; 9245e1f7de0cSMatt Gates */ 9246e1f7de0cSMatt Gates if (trans_support & CFGTBL_Trans_io_accel1) { 9247e1f7de0cSMatt Gates access = SA5_ioaccel_mode1_access; 9248e1f7de0cSMatt Gates writel(10, &h->cfgtable->HostWrite.CoalIntDelay); 9249e1f7de0cSMatt Gates writel(4, &h->cfgtable->HostWrite.CoalIntCount); 9250c349775eSScott Teel } else { 9251c349775eSScott Teel if (trans_support & CFGTBL_Trans_io_accel2) { 9252c349775eSScott Teel access = SA5_ioaccel_mode2_access; 9253c349775eSScott Teel writel(10, &h->cfgtable->HostWrite.CoalIntDelay); 9254c349775eSScott Teel writel(4, &h->cfgtable->HostWrite.CoalIntCount); 9255c349775eSScott Teel } 9256e1f7de0cSMatt Gates } 9257303932fdSDon Brace writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 9258c706a795SRobert Elliott if (hpsa_wait_for_mode_change_ack(h)) { 9259c706a795SRobert Elliott dev_err(&h->pdev->dev, 9260c706a795SRobert Elliott "performant mode problem - doorbell timeout\n"); 9261c706a795SRobert Elliott return -ENODEV; 9262c706a795SRobert Elliott } 9263303932fdSDon Brace register_value = readl(&(h->cfgtable->TransportActive)); 9264303932fdSDon Brace if (!(register_value & CFGTBL_Trans_Performant)) { 9265050f7147SStephen Cameron dev_err(&h->pdev->dev, 9266050f7147SStephen Cameron "performant mode problem - transport not active\n"); 9267c706a795SRobert Elliott return -ENODEV; 9268303932fdSDon Brace } 9269960a30e7SStephen M. Cameron /* Change the access methods to the performant access methods */ 9270e1f7de0cSMatt Gates h->access = access; 9271e1f7de0cSMatt Gates h->transMethod = transMethod; 9272e1f7de0cSMatt Gates 9273b9af4937SStephen M. Cameron if (!((trans_support & CFGTBL_Trans_io_accel1) || 9274b9af4937SStephen M. Cameron (trans_support & CFGTBL_Trans_io_accel2))) 9275c706a795SRobert Elliott return 0; 9276e1f7de0cSMatt Gates 9277b9af4937SStephen M. Cameron if (trans_support & CFGTBL_Trans_io_accel1) { 9278e1f7de0cSMatt Gates /* Set up I/O accelerator mode */ 9279e1f7de0cSMatt Gates for (i = 0; i < h->nreply_queues; i++) { 9280e1f7de0cSMatt Gates writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX); 9281e1f7de0cSMatt Gates h->reply_queue[i].current_entry = 9282e1f7de0cSMatt Gates readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX); 9283e1f7de0cSMatt Gates } 9284283b4a9bSStephen M. Cameron bft[7] = h->ioaccel_maxsg + 8; 9285283b4a9bSStephen M. Cameron calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8, 9286e1f7de0cSMatt Gates h->ioaccel1_blockFetchTable); 9287e1f7de0cSMatt Gates 9288e1f7de0cSMatt Gates /* initialize all reply queue entries to unused */ 9289072b0518SStephen M. Cameron for (i = 0; i < h->nreply_queues; i++) 9290072b0518SStephen M. Cameron memset(h->reply_queue[i].head, 9291072b0518SStephen M. Cameron (u8) IOACCEL_MODE1_REPLY_UNUSED, 9292072b0518SStephen M. Cameron h->reply_queue_size); 9293e1f7de0cSMatt Gates 9294e1f7de0cSMatt Gates /* set all the constant fields in the accelerator command 9295e1f7de0cSMatt Gates * frames once at init time to save CPU cycles later. 9296e1f7de0cSMatt Gates */ 9297e1f7de0cSMatt Gates for (i = 0; i < h->nr_cmds; i++) { 9298e1f7de0cSMatt Gates struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i]; 9299e1f7de0cSMatt Gates 9300e1f7de0cSMatt Gates cp->function = IOACCEL1_FUNCTION_SCSIIO; 9301e1f7de0cSMatt Gates cp->err_info = (u32) (h->errinfo_pool_dhandle + 9302e1f7de0cSMatt Gates (i * sizeof(struct ErrorInfo))); 9303e1f7de0cSMatt Gates cp->err_info_len = sizeof(struct ErrorInfo); 9304e1f7de0cSMatt Gates cp->sgl_offset = IOACCEL1_SGLOFFSET; 93052b08b3e9SDon Brace cp->host_context_flags = 93062b08b3e9SDon Brace cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT); 9307e1f7de0cSMatt Gates cp->timeout_sec = 0; 9308e1f7de0cSMatt Gates cp->ReplyQueue = 0; 930950a0decfSStephen M. Cameron cp->tag = 9310f2405db8SDon Brace cpu_to_le64((i << DIRECT_LOOKUP_SHIFT)); 931150a0decfSStephen M. Cameron cp->host_addr = 931250a0decfSStephen M. Cameron cpu_to_le64(h->ioaccel_cmd_pool_dhandle + 9313e1f7de0cSMatt Gates (i * sizeof(struct io_accel1_cmd))); 9314e1f7de0cSMatt Gates } 9315b9af4937SStephen M. Cameron } else if (trans_support & CFGTBL_Trans_io_accel2) { 9316b9af4937SStephen M. Cameron u64 cfg_offset, cfg_base_addr_index; 9317b9af4937SStephen M. Cameron u32 bft2_offset, cfg_base_addr; 9318b9af4937SStephen M. Cameron int rc; 9319b9af4937SStephen M. Cameron 9320b9af4937SStephen M. Cameron rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 9321b9af4937SStephen M. Cameron &cfg_base_addr_index, &cfg_offset); 9322b9af4937SStephen M. Cameron BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64); 9323b9af4937SStephen M. Cameron bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ; 9324b9af4937SStephen M. Cameron calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg, 9325b9af4937SStephen M. Cameron 4, h->ioaccel2_blockFetchTable); 9326b9af4937SStephen M. Cameron bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset); 9327b9af4937SStephen M. Cameron BUILD_BUG_ON(offsetof(struct CfgTable, 9328b9af4937SStephen M. Cameron io_accel_request_size_offset) != 0xb8); 9329b9af4937SStephen M. Cameron h->ioaccel2_bft2_regs = 9330b9af4937SStephen M. Cameron remap_pci_mem(pci_resource_start(h->pdev, 9331b9af4937SStephen M. Cameron cfg_base_addr_index) + 9332b9af4937SStephen M. Cameron cfg_offset + bft2_offset, 9333b9af4937SStephen M. Cameron ARRAY_SIZE(bft2) * 9334b9af4937SStephen M. Cameron sizeof(*h->ioaccel2_bft2_regs)); 9335b9af4937SStephen M. Cameron for (i = 0; i < ARRAY_SIZE(bft2); i++) 9336b9af4937SStephen M. Cameron writel(bft2[i], &h->ioaccel2_bft2_regs[i]); 9337b9af4937SStephen M. Cameron } 9338b9af4937SStephen M. Cameron writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 9339c706a795SRobert Elliott if (hpsa_wait_for_mode_change_ack(h)) { 9340c706a795SRobert Elliott dev_err(&h->pdev->dev, 9341c706a795SRobert Elliott "performant mode problem - enabling ioaccel mode\n"); 9342c706a795SRobert Elliott return -ENODEV; 9343c706a795SRobert Elliott } 9344c706a795SRobert Elliott return 0; 9345e1f7de0cSMatt Gates } 9346e1f7de0cSMatt Gates 93471fb7c98aSRobert Elliott /* Free ioaccel1 mode command blocks and block fetch table */ 93481fb7c98aSRobert Elliott static void hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info *h) 93491fb7c98aSRobert Elliott { 9350105a3dbcSRobert Elliott if (h->ioaccel_cmd_pool) { 93511fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 93521fb7c98aSRobert Elliott h->nr_cmds * sizeof(*h->ioaccel_cmd_pool), 93531fb7c98aSRobert Elliott h->ioaccel_cmd_pool, 93541fb7c98aSRobert Elliott h->ioaccel_cmd_pool_dhandle); 9355105a3dbcSRobert Elliott h->ioaccel_cmd_pool = NULL; 9356105a3dbcSRobert Elliott h->ioaccel_cmd_pool_dhandle = 0; 9357105a3dbcSRobert Elliott } 93581fb7c98aSRobert Elliott kfree(h->ioaccel1_blockFetchTable); 9359105a3dbcSRobert Elliott h->ioaccel1_blockFetchTable = NULL; 93601fb7c98aSRobert Elliott } 93611fb7c98aSRobert Elliott 9362d37ffbe4SRobert Elliott /* Allocate ioaccel1 mode command blocks and block fetch table */ 9363d37ffbe4SRobert Elliott static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h) 9364e1f7de0cSMatt Gates { 9365283b4a9bSStephen M. Cameron h->ioaccel_maxsg = 9366283b4a9bSStephen M. Cameron readl(&(h->cfgtable->io_accel_max_embedded_sg_count)); 9367283b4a9bSStephen M. Cameron if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES) 9368283b4a9bSStephen M. Cameron h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES; 9369283b4a9bSStephen M. Cameron 9370e1f7de0cSMatt Gates /* Command structures must be aligned on a 128-byte boundary 9371e1f7de0cSMatt Gates * because the 7 lower bits of the address are used by the 9372e1f7de0cSMatt Gates * hardware. 9373e1f7de0cSMatt Gates */ 9374e1f7de0cSMatt Gates BUILD_BUG_ON(sizeof(struct io_accel1_cmd) % 9375e1f7de0cSMatt Gates IOACCEL1_COMMANDLIST_ALIGNMENT); 9376e1f7de0cSMatt Gates h->ioaccel_cmd_pool = 9377e1f7de0cSMatt Gates pci_alloc_consistent(h->pdev, 9378e1f7de0cSMatt Gates h->nr_cmds * sizeof(*h->ioaccel_cmd_pool), 9379e1f7de0cSMatt Gates &(h->ioaccel_cmd_pool_dhandle)); 9380e1f7de0cSMatt Gates 9381e1f7de0cSMatt Gates h->ioaccel1_blockFetchTable = 9382283b4a9bSStephen M. Cameron kmalloc(((h->ioaccel_maxsg + 1) * 9383e1f7de0cSMatt Gates sizeof(u32)), GFP_KERNEL); 9384e1f7de0cSMatt Gates 9385e1f7de0cSMatt Gates if ((h->ioaccel_cmd_pool == NULL) || 9386e1f7de0cSMatt Gates (h->ioaccel1_blockFetchTable == NULL)) 9387e1f7de0cSMatt Gates goto clean_up; 9388e1f7de0cSMatt Gates 9389e1f7de0cSMatt Gates memset(h->ioaccel_cmd_pool, 0, 9390e1f7de0cSMatt Gates h->nr_cmds * sizeof(*h->ioaccel_cmd_pool)); 9391e1f7de0cSMatt Gates return 0; 9392e1f7de0cSMatt Gates 9393e1f7de0cSMatt Gates clean_up: 93941fb7c98aSRobert Elliott hpsa_free_ioaccel1_cmd_and_bft(h); 93952dd02d74SRobert Elliott return -ENOMEM; 93966c311b57SStephen M. Cameron } 93976c311b57SStephen M. Cameron 93981fb7c98aSRobert Elliott /* Free ioaccel2 mode command blocks and block fetch table */ 93991fb7c98aSRobert Elliott static void hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info *h) 94001fb7c98aSRobert Elliott { 9401d9a729f3SWebb Scales hpsa_free_ioaccel2_sg_chain_blocks(h); 9402d9a729f3SWebb Scales 9403105a3dbcSRobert Elliott if (h->ioaccel2_cmd_pool) { 94041fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 94051fb7c98aSRobert Elliott h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 94061fb7c98aSRobert Elliott h->ioaccel2_cmd_pool, 94071fb7c98aSRobert Elliott h->ioaccel2_cmd_pool_dhandle); 9408105a3dbcSRobert Elliott h->ioaccel2_cmd_pool = NULL; 9409105a3dbcSRobert Elliott h->ioaccel2_cmd_pool_dhandle = 0; 9410105a3dbcSRobert Elliott } 94111fb7c98aSRobert Elliott kfree(h->ioaccel2_blockFetchTable); 9412105a3dbcSRobert Elliott h->ioaccel2_blockFetchTable = NULL; 94131fb7c98aSRobert Elliott } 94141fb7c98aSRobert Elliott 9415d37ffbe4SRobert Elliott /* Allocate ioaccel2 mode command blocks and block fetch table */ 9416d37ffbe4SRobert Elliott static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h) 9417aca9012aSStephen M. Cameron { 9418d9a729f3SWebb Scales int rc; 9419d9a729f3SWebb Scales 9420aca9012aSStephen M. Cameron /* Allocate ioaccel2 mode command blocks and block fetch table */ 9421aca9012aSStephen M. Cameron 9422aca9012aSStephen M. Cameron h->ioaccel_maxsg = 9423aca9012aSStephen M. Cameron readl(&(h->cfgtable->io_accel_max_embedded_sg_count)); 9424aca9012aSStephen M. Cameron if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES) 9425aca9012aSStephen M. Cameron h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES; 9426aca9012aSStephen M. Cameron 9427aca9012aSStephen M. Cameron BUILD_BUG_ON(sizeof(struct io_accel2_cmd) % 9428aca9012aSStephen M. Cameron IOACCEL2_COMMANDLIST_ALIGNMENT); 9429aca9012aSStephen M. Cameron h->ioaccel2_cmd_pool = 9430aca9012aSStephen M. Cameron pci_alloc_consistent(h->pdev, 9431aca9012aSStephen M. Cameron h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 9432aca9012aSStephen M. Cameron &(h->ioaccel2_cmd_pool_dhandle)); 9433aca9012aSStephen M. Cameron 9434aca9012aSStephen M. Cameron h->ioaccel2_blockFetchTable = 9435aca9012aSStephen M. Cameron kmalloc(((h->ioaccel_maxsg + 1) * 9436aca9012aSStephen M. Cameron sizeof(u32)), GFP_KERNEL); 9437aca9012aSStephen M. Cameron 9438aca9012aSStephen M. Cameron if ((h->ioaccel2_cmd_pool == NULL) || 9439d9a729f3SWebb Scales (h->ioaccel2_blockFetchTable == NULL)) { 9440d9a729f3SWebb Scales rc = -ENOMEM; 9441d9a729f3SWebb Scales goto clean_up; 9442d9a729f3SWebb Scales } 9443d9a729f3SWebb Scales 9444d9a729f3SWebb Scales rc = hpsa_allocate_ioaccel2_sg_chain_blocks(h); 9445d9a729f3SWebb Scales if (rc) 9446aca9012aSStephen M. Cameron goto clean_up; 9447aca9012aSStephen M. Cameron 9448aca9012aSStephen M. Cameron memset(h->ioaccel2_cmd_pool, 0, 9449aca9012aSStephen M. Cameron h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool)); 9450aca9012aSStephen M. Cameron return 0; 9451aca9012aSStephen M. Cameron 9452aca9012aSStephen M. Cameron clean_up: 94531fb7c98aSRobert Elliott hpsa_free_ioaccel2_cmd_and_bft(h); 9454d9a729f3SWebb Scales return rc; 9455aca9012aSStephen M. Cameron } 9456aca9012aSStephen M. Cameron 9457105a3dbcSRobert Elliott /* Free items allocated by hpsa_put_ctlr_into_performant_mode */ 9458105a3dbcSRobert Elliott static void hpsa_free_performant_mode(struct ctlr_info *h) 9459105a3dbcSRobert Elliott { 9460105a3dbcSRobert Elliott kfree(h->blockFetchTable); 9461105a3dbcSRobert Elliott h->blockFetchTable = NULL; 9462105a3dbcSRobert Elliott hpsa_free_reply_queues(h); 9463105a3dbcSRobert Elliott hpsa_free_ioaccel1_cmd_and_bft(h); 9464105a3dbcSRobert Elliott hpsa_free_ioaccel2_cmd_and_bft(h); 9465105a3dbcSRobert Elliott } 9466105a3dbcSRobert Elliott 9467105a3dbcSRobert Elliott /* return -ENODEV on error, 0 on success (or no action) 9468105a3dbcSRobert Elliott * allocates numerous items that must be freed later 9469105a3dbcSRobert Elliott */ 9470105a3dbcSRobert Elliott static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h) 94716c311b57SStephen M. Cameron { 94726c311b57SStephen M. Cameron u32 trans_support; 9473e1f7de0cSMatt Gates unsigned long transMethod = CFGTBL_Trans_Performant | 9474e1f7de0cSMatt Gates CFGTBL_Trans_use_short_tags; 9475105a3dbcSRobert Elliott int i, rc; 94766c311b57SStephen M. Cameron 947702ec19c8SStephen M. Cameron if (hpsa_simple_mode) 9478105a3dbcSRobert Elliott return 0; 947902ec19c8SStephen M. Cameron 948067c99a72Sscameron@beardog.cce.hp.com trans_support = readl(&(h->cfgtable->TransportSupport)); 948167c99a72Sscameron@beardog.cce.hp.com if (!(trans_support & PERFORMANT_MODE)) 9482105a3dbcSRobert Elliott return 0; 948367c99a72Sscameron@beardog.cce.hp.com 9484e1f7de0cSMatt Gates /* Check for I/O accelerator mode support */ 9485e1f7de0cSMatt Gates if (trans_support & CFGTBL_Trans_io_accel1) { 9486e1f7de0cSMatt Gates transMethod |= CFGTBL_Trans_io_accel1 | 9487e1f7de0cSMatt Gates CFGTBL_Trans_enable_directed_msix; 9488105a3dbcSRobert Elliott rc = hpsa_alloc_ioaccel1_cmd_and_bft(h); 9489105a3dbcSRobert Elliott if (rc) 9490105a3dbcSRobert Elliott return rc; 9491105a3dbcSRobert Elliott } else if (trans_support & CFGTBL_Trans_io_accel2) { 9492aca9012aSStephen M. Cameron transMethod |= CFGTBL_Trans_io_accel2 | 9493aca9012aSStephen M. Cameron CFGTBL_Trans_enable_directed_msix; 9494105a3dbcSRobert Elliott rc = hpsa_alloc_ioaccel2_cmd_and_bft(h); 9495105a3dbcSRobert Elliott if (rc) 9496105a3dbcSRobert Elliott return rc; 9497e1f7de0cSMatt Gates } 9498e1f7de0cSMatt Gates 9499bc2bb154SChristoph Hellwig h->nreply_queues = h->msix_vectors > 0 ? h->msix_vectors : 1; 9500cba3d38bSStephen M. Cameron hpsa_get_max_perf_mode_cmds(h); 95016c311b57SStephen M. Cameron /* Performant mode ring buffer and supporting data structures */ 9502072b0518SStephen M. Cameron h->reply_queue_size = h->max_commands * sizeof(u64); 95036c311b57SStephen M. Cameron 9504254f796bSMatt Gates for (i = 0; i < h->nreply_queues; i++) { 9505072b0518SStephen M. Cameron h->reply_queue[i].head = pci_alloc_consistent(h->pdev, 9506072b0518SStephen M. Cameron h->reply_queue_size, 9507072b0518SStephen M. Cameron &(h->reply_queue[i].busaddr)); 9508105a3dbcSRobert Elliott if (!h->reply_queue[i].head) { 9509105a3dbcSRobert Elliott rc = -ENOMEM; 9510105a3dbcSRobert Elliott goto clean1; /* rq, ioaccel */ 9511105a3dbcSRobert Elliott } 9512254f796bSMatt Gates h->reply_queue[i].size = h->max_commands; 9513254f796bSMatt Gates h->reply_queue[i].wraparound = 1; /* spec: init to 1 */ 9514254f796bSMatt Gates h->reply_queue[i].current_entry = 0; 9515254f796bSMatt Gates } 9516254f796bSMatt Gates 95176c311b57SStephen M. Cameron /* Need a block fetch table for performant mode */ 9518d66ae08bSStephen M. Cameron h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) * 95196c311b57SStephen M. Cameron sizeof(u32)), GFP_KERNEL); 9520105a3dbcSRobert Elliott if (!h->blockFetchTable) { 9521105a3dbcSRobert Elliott rc = -ENOMEM; 9522105a3dbcSRobert Elliott goto clean1; /* rq, ioaccel */ 9523105a3dbcSRobert Elliott } 95246c311b57SStephen M. Cameron 9525105a3dbcSRobert Elliott rc = hpsa_enter_performant_mode(h, trans_support); 9526105a3dbcSRobert Elliott if (rc) 9527105a3dbcSRobert Elliott goto clean2; /* bft, rq, ioaccel */ 9528105a3dbcSRobert Elliott return 0; 9529303932fdSDon Brace 9530105a3dbcSRobert Elliott clean2: /* bft, rq, ioaccel */ 9531303932fdSDon Brace kfree(h->blockFetchTable); 9532105a3dbcSRobert Elliott h->blockFetchTable = NULL; 9533105a3dbcSRobert Elliott clean1: /* rq, ioaccel */ 9534105a3dbcSRobert Elliott hpsa_free_reply_queues(h); 9535105a3dbcSRobert Elliott hpsa_free_ioaccel1_cmd_and_bft(h); 9536105a3dbcSRobert Elliott hpsa_free_ioaccel2_cmd_and_bft(h); 9537105a3dbcSRobert Elliott return rc; 9538303932fdSDon Brace } 9539303932fdSDon Brace 954023100dd9SStephen M. Cameron static int is_accelerated_cmd(struct CommandList *c) 954176438d08SStephen M. Cameron { 954223100dd9SStephen M. Cameron return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2; 954323100dd9SStephen M. Cameron } 954423100dd9SStephen M. Cameron 954523100dd9SStephen M. Cameron static void hpsa_drain_accel_commands(struct ctlr_info *h) 954623100dd9SStephen M. Cameron { 954723100dd9SStephen M. Cameron struct CommandList *c = NULL; 9548f2405db8SDon Brace int i, accel_cmds_out; 9549281a7fd0SWebb Scales int refcount; 955076438d08SStephen M. Cameron 9551f2405db8SDon Brace do { /* wait for all outstanding ioaccel commands to drain out */ 955223100dd9SStephen M. Cameron accel_cmds_out = 0; 9553f2405db8SDon Brace for (i = 0; i < h->nr_cmds; i++) { 9554f2405db8SDon Brace c = h->cmd_pool + i; 9555281a7fd0SWebb Scales refcount = atomic_inc_return(&c->refcount); 9556281a7fd0SWebb Scales if (refcount > 1) /* Command is allocated */ 955723100dd9SStephen M. Cameron accel_cmds_out += is_accelerated_cmd(c); 9558281a7fd0SWebb Scales cmd_free(h, c); 9559f2405db8SDon Brace } 956023100dd9SStephen M. Cameron if (accel_cmds_out <= 0) 956176438d08SStephen M. Cameron break; 956276438d08SStephen M. Cameron msleep(100); 956376438d08SStephen M. Cameron } while (1); 956476438d08SStephen M. Cameron } 956576438d08SStephen M. Cameron 9566d04e62b9SKevin Barnett static struct hpsa_sas_phy *hpsa_alloc_sas_phy( 9567d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port) 9568d04e62b9SKevin Barnett { 9569d04e62b9SKevin Barnett struct hpsa_sas_phy *hpsa_sas_phy; 9570d04e62b9SKevin Barnett struct sas_phy *phy; 9571d04e62b9SKevin Barnett 9572d04e62b9SKevin Barnett hpsa_sas_phy = kzalloc(sizeof(*hpsa_sas_phy), GFP_KERNEL); 9573d04e62b9SKevin Barnett if (!hpsa_sas_phy) 9574d04e62b9SKevin Barnett return NULL; 9575d04e62b9SKevin Barnett 9576d04e62b9SKevin Barnett phy = sas_phy_alloc(hpsa_sas_port->parent_node->parent_dev, 9577d04e62b9SKevin Barnett hpsa_sas_port->next_phy_index); 9578d04e62b9SKevin Barnett if (!phy) { 9579d04e62b9SKevin Barnett kfree(hpsa_sas_phy); 9580d04e62b9SKevin Barnett return NULL; 9581d04e62b9SKevin Barnett } 9582d04e62b9SKevin Barnett 9583d04e62b9SKevin Barnett hpsa_sas_port->next_phy_index++; 9584d04e62b9SKevin Barnett hpsa_sas_phy->phy = phy; 9585d04e62b9SKevin Barnett hpsa_sas_phy->parent_port = hpsa_sas_port; 9586d04e62b9SKevin Barnett 9587d04e62b9SKevin Barnett return hpsa_sas_phy; 9588d04e62b9SKevin Barnett } 9589d04e62b9SKevin Barnett 9590d04e62b9SKevin Barnett static void hpsa_free_sas_phy(struct hpsa_sas_phy *hpsa_sas_phy) 9591d04e62b9SKevin Barnett { 9592d04e62b9SKevin Barnett struct sas_phy *phy = hpsa_sas_phy->phy; 9593d04e62b9SKevin Barnett 9594d04e62b9SKevin Barnett sas_port_delete_phy(hpsa_sas_phy->parent_port->port, phy); 9595d04e62b9SKevin Barnett sas_phy_free(phy); 9596d04e62b9SKevin Barnett if (hpsa_sas_phy->added_to_port) 9597d04e62b9SKevin Barnett list_del(&hpsa_sas_phy->phy_list_entry); 9598d04e62b9SKevin Barnett kfree(hpsa_sas_phy); 9599d04e62b9SKevin Barnett } 9600d04e62b9SKevin Barnett 9601d04e62b9SKevin Barnett static int hpsa_sas_port_add_phy(struct hpsa_sas_phy *hpsa_sas_phy) 9602d04e62b9SKevin Barnett { 9603d04e62b9SKevin Barnett int rc; 9604d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9605d04e62b9SKevin Barnett struct sas_phy *phy; 9606d04e62b9SKevin Barnett struct sas_identify *identify; 9607d04e62b9SKevin Barnett 9608d04e62b9SKevin Barnett hpsa_sas_port = hpsa_sas_phy->parent_port; 9609d04e62b9SKevin Barnett phy = hpsa_sas_phy->phy; 9610d04e62b9SKevin Barnett 9611d04e62b9SKevin Barnett identify = &phy->identify; 9612d04e62b9SKevin Barnett memset(identify, 0, sizeof(*identify)); 9613d04e62b9SKevin Barnett identify->sas_address = hpsa_sas_port->sas_address; 9614d04e62b9SKevin Barnett identify->device_type = SAS_END_DEVICE; 9615d04e62b9SKevin Barnett identify->initiator_port_protocols = SAS_PROTOCOL_STP; 9616d04e62b9SKevin Barnett identify->target_port_protocols = SAS_PROTOCOL_STP; 9617d04e62b9SKevin Barnett phy->minimum_linkrate_hw = SAS_LINK_RATE_UNKNOWN; 9618d04e62b9SKevin Barnett phy->maximum_linkrate_hw = SAS_LINK_RATE_UNKNOWN; 9619d04e62b9SKevin Barnett phy->minimum_linkrate = SAS_LINK_RATE_UNKNOWN; 9620d04e62b9SKevin Barnett phy->maximum_linkrate = SAS_LINK_RATE_UNKNOWN; 9621d04e62b9SKevin Barnett phy->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN; 9622d04e62b9SKevin Barnett 9623d04e62b9SKevin Barnett rc = sas_phy_add(hpsa_sas_phy->phy); 9624d04e62b9SKevin Barnett if (rc) 9625d04e62b9SKevin Barnett return rc; 9626d04e62b9SKevin Barnett 9627d04e62b9SKevin Barnett sas_port_add_phy(hpsa_sas_port->port, hpsa_sas_phy->phy); 9628d04e62b9SKevin Barnett list_add_tail(&hpsa_sas_phy->phy_list_entry, 9629d04e62b9SKevin Barnett &hpsa_sas_port->phy_list_head); 9630d04e62b9SKevin Barnett hpsa_sas_phy->added_to_port = true; 9631d04e62b9SKevin Barnett 9632d04e62b9SKevin Barnett return 0; 9633d04e62b9SKevin Barnett } 9634d04e62b9SKevin Barnett 9635d04e62b9SKevin Barnett static int 9636d04e62b9SKevin Barnett hpsa_sas_port_add_rphy(struct hpsa_sas_port *hpsa_sas_port, 9637d04e62b9SKevin Barnett struct sas_rphy *rphy) 9638d04e62b9SKevin Barnett { 9639d04e62b9SKevin Barnett struct sas_identify *identify; 9640d04e62b9SKevin Barnett 9641d04e62b9SKevin Barnett identify = &rphy->identify; 9642d04e62b9SKevin Barnett identify->sas_address = hpsa_sas_port->sas_address; 9643d04e62b9SKevin Barnett identify->initiator_port_protocols = SAS_PROTOCOL_STP; 9644d04e62b9SKevin Barnett identify->target_port_protocols = SAS_PROTOCOL_STP; 9645d04e62b9SKevin Barnett 9646d04e62b9SKevin Barnett return sas_rphy_add(rphy); 9647d04e62b9SKevin Barnett } 9648d04e62b9SKevin Barnett 9649d04e62b9SKevin Barnett static struct hpsa_sas_port 9650d04e62b9SKevin Barnett *hpsa_alloc_sas_port(struct hpsa_sas_node *hpsa_sas_node, 9651d04e62b9SKevin Barnett u64 sas_address) 9652d04e62b9SKevin Barnett { 9653d04e62b9SKevin Barnett int rc; 9654d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9655d04e62b9SKevin Barnett struct sas_port *port; 9656d04e62b9SKevin Barnett 9657d04e62b9SKevin Barnett hpsa_sas_port = kzalloc(sizeof(*hpsa_sas_port), GFP_KERNEL); 9658d04e62b9SKevin Barnett if (!hpsa_sas_port) 9659d04e62b9SKevin Barnett return NULL; 9660d04e62b9SKevin Barnett 9661d04e62b9SKevin Barnett INIT_LIST_HEAD(&hpsa_sas_port->phy_list_head); 9662d04e62b9SKevin Barnett hpsa_sas_port->parent_node = hpsa_sas_node; 9663d04e62b9SKevin Barnett 9664d04e62b9SKevin Barnett port = sas_port_alloc_num(hpsa_sas_node->parent_dev); 9665d04e62b9SKevin Barnett if (!port) 9666d04e62b9SKevin Barnett goto free_hpsa_port; 9667d04e62b9SKevin Barnett 9668d04e62b9SKevin Barnett rc = sas_port_add(port); 9669d04e62b9SKevin Barnett if (rc) 9670d04e62b9SKevin Barnett goto free_sas_port; 9671d04e62b9SKevin Barnett 9672d04e62b9SKevin Barnett hpsa_sas_port->port = port; 9673d04e62b9SKevin Barnett hpsa_sas_port->sas_address = sas_address; 9674d04e62b9SKevin Barnett list_add_tail(&hpsa_sas_port->port_list_entry, 9675d04e62b9SKevin Barnett &hpsa_sas_node->port_list_head); 9676d04e62b9SKevin Barnett 9677d04e62b9SKevin Barnett return hpsa_sas_port; 9678d04e62b9SKevin Barnett 9679d04e62b9SKevin Barnett free_sas_port: 9680d04e62b9SKevin Barnett sas_port_free(port); 9681d04e62b9SKevin Barnett free_hpsa_port: 9682d04e62b9SKevin Barnett kfree(hpsa_sas_port); 9683d04e62b9SKevin Barnett 9684d04e62b9SKevin Barnett return NULL; 9685d04e62b9SKevin Barnett } 9686d04e62b9SKevin Barnett 9687d04e62b9SKevin Barnett static void hpsa_free_sas_port(struct hpsa_sas_port *hpsa_sas_port) 9688d04e62b9SKevin Barnett { 9689d04e62b9SKevin Barnett struct hpsa_sas_phy *hpsa_sas_phy; 9690d04e62b9SKevin Barnett struct hpsa_sas_phy *next; 9691d04e62b9SKevin Barnett 9692d04e62b9SKevin Barnett list_for_each_entry_safe(hpsa_sas_phy, next, 9693d04e62b9SKevin Barnett &hpsa_sas_port->phy_list_head, phy_list_entry) 9694d04e62b9SKevin Barnett hpsa_free_sas_phy(hpsa_sas_phy); 9695d04e62b9SKevin Barnett 9696d04e62b9SKevin Barnett sas_port_delete(hpsa_sas_port->port); 9697d04e62b9SKevin Barnett list_del(&hpsa_sas_port->port_list_entry); 9698d04e62b9SKevin Barnett kfree(hpsa_sas_port); 9699d04e62b9SKevin Barnett } 9700d04e62b9SKevin Barnett 9701d04e62b9SKevin Barnett static struct hpsa_sas_node *hpsa_alloc_sas_node(struct device *parent_dev) 9702d04e62b9SKevin Barnett { 9703d04e62b9SKevin Barnett struct hpsa_sas_node *hpsa_sas_node; 9704d04e62b9SKevin Barnett 9705d04e62b9SKevin Barnett hpsa_sas_node = kzalloc(sizeof(*hpsa_sas_node), GFP_KERNEL); 9706d04e62b9SKevin Barnett if (hpsa_sas_node) { 9707d04e62b9SKevin Barnett hpsa_sas_node->parent_dev = parent_dev; 9708d04e62b9SKevin Barnett INIT_LIST_HEAD(&hpsa_sas_node->port_list_head); 9709d04e62b9SKevin Barnett } 9710d04e62b9SKevin Barnett 9711d04e62b9SKevin Barnett return hpsa_sas_node; 9712d04e62b9SKevin Barnett } 9713d04e62b9SKevin Barnett 9714d04e62b9SKevin Barnett static void hpsa_free_sas_node(struct hpsa_sas_node *hpsa_sas_node) 9715d04e62b9SKevin Barnett { 9716d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9717d04e62b9SKevin Barnett struct hpsa_sas_port *next; 9718d04e62b9SKevin Barnett 9719d04e62b9SKevin Barnett if (!hpsa_sas_node) 9720d04e62b9SKevin Barnett return; 9721d04e62b9SKevin Barnett 9722d04e62b9SKevin Barnett list_for_each_entry_safe(hpsa_sas_port, next, 9723d04e62b9SKevin Barnett &hpsa_sas_node->port_list_head, port_list_entry) 9724d04e62b9SKevin Barnett hpsa_free_sas_port(hpsa_sas_port); 9725d04e62b9SKevin Barnett 9726d04e62b9SKevin Barnett kfree(hpsa_sas_node); 9727d04e62b9SKevin Barnett } 9728d04e62b9SKevin Barnett 9729d04e62b9SKevin Barnett static struct hpsa_scsi_dev_t 9730d04e62b9SKevin Barnett *hpsa_find_device_by_sas_rphy(struct ctlr_info *h, 9731d04e62b9SKevin Barnett struct sas_rphy *rphy) 9732d04e62b9SKevin Barnett { 9733d04e62b9SKevin Barnett int i; 9734d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *device; 9735d04e62b9SKevin Barnett 9736d04e62b9SKevin Barnett for (i = 0; i < h->ndevices; i++) { 9737d04e62b9SKevin Barnett device = h->dev[i]; 9738d04e62b9SKevin Barnett if (!device->sas_port) 9739d04e62b9SKevin Barnett continue; 9740d04e62b9SKevin Barnett if (device->sas_port->rphy == rphy) 9741d04e62b9SKevin Barnett return device; 9742d04e62b9SKevin Barnett } 9743d04e62b9SKevin Barnett 9744d04e62b9SKevin Barnett return NULL; 9745d04e62b9SKevin Barnett } 9746d04e62b9SKevin Barnett 9747d04e62b9SKevin Barnett static int hpsa_add_sas_host(struct ctlr_info *h) 9748d04e62b9SKevin Barnett { 9749d04e62b9SKevin Barnett int rc; 9750d04e62b9SKevin Barnett struct device *parent_dev; 9751d04e62b9SKevin Barnett struct hpsa_sas_node *hpsa_sas_node; 9752d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9753d04e62b9SKevin Barnett struct hpsa_sas_phy *hpsa_sas_phy; 9754d04e62b9SKevin Barnett 9755d04e62b9SKevin Barnett parent_dev = &h->scsi_host->shost_gendev; 9756d04e62b9SKevin Barnett 9757d04e62b9SKevin Barnett hpsa_sas_node = hpsa_alloc_sas_node(parent_dev); 9758d04e62b9SKevin Barnett if (!hpsa_sas_node) 9759d04e62b9SKevin Barnett return -ENOMEM; 9760d04e62b9SKevin Barnett 9761d04e62b9SKevin Barnett hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, h->sas_address); 9762d04e62b9SKevin Barnett if (!hpsa_sas_port) { 9763d04e62b9SKevin Barnett rc = -ENODEV; 9764d04e62b9SKevin Barnett goto free_sas_node; 9765d04e62b9SKevin Barnett } 9766d04e62b9SKevin Barnett 9767d04e62b9SKevin Barnett hpsa_sas_phy = hpsa_alloc_sas_phy(hpsa_sas_port); 9768d04e62b9SKevin Barnett if (!hpsa_sas_phy) { 9769d04e62b9SKevin Barnett rc = -ENODEV; 9770d04e62b9SKevin Barnett goto free_sas_port; 9771d04e62b9SKevin Barnett } 9772d04e62b9SKevin Barnett 9773d04e62b9SKevin Barnett rc = hpsa_sas_port_add_phy(hpsa_sas_phy); 9774d04e62b9SKevin Barnett if (rc) 9775d04e62b9SKevin Barnett goto free_sas_phy; 9776d04e62b9SKevin Barnett 9777d04e62b9SKevin Barnett h->sas_host = hpsa_sas_node; 9778d04e62b9SKevin Barnett 9779d04e62b9SKevin Barnett return 0; 9780d04e62b9SKevin Barnett 9781d04e62b9SKevin Barnett free_sas_phy: 9782d04e62b9SKevin Barnett hpsa_free_sas_phy(hpsa_sas_phy); 9783d04e62b9SKevin Barnett free_sas_port: 9784d04e62b9SKevin Barnett hpsa_free_sas_port(hpsa_sas_port); 9785d04e62b9SKevin Barnett free_sas_node: 9786d04e62b9SKevin Barnett hpsa_free_sas_node(hpsa_sas_node); 9787d04e62b9SKevin Barnett 9788d04e62b9SKevin Barnett return rc; 9789d04e62b9SKevin Barnett } 9790d04e62b9SKevin Barnett 9791d04e62b9SKevin Barnett static void hpsa_delete_sas_host(struct ctlr_info *h) 9792d04e62b9SKevin Barnett { 9793d04e62b9SKevin Barnett hpsa_free_sas_node(h->sas_host); 9794d04e62b9SKevin Barnett } 9795d04e62b9SKevin Barnett 9796d04e62b9SKevin Barnett static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node, 9797d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *device) 9798d04e62b9SKevin Barnett { 9799d04e62b9SKevin Barnett int rc; 9800d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9801d04e62b9SKevin Barnett struct sas_rphy *rphy; 9802d04e62b9SKevin Barnett 9803d04e62b9SKevin Barnett hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, device->sas_address); 9804d04e62b9SKevin Barnett if (!hpsa_sas_port) 9805d04e62b9SKevin Barnett return -ENOMEM; 9806d04e62b9SKevin Barnett 9807d04e62b9SKevin Barnett rphy = sas_end_device_alloc(hpsa_sas_port->port); 9808d04e62b9SKevin Barnett if (!rphy) { 9809d04e62b9SKevin Barnett rc = -ENODEV; 9810d04e62b9SKevin Barnett goto free_sas_port; 9811d04e62b9SKevin Barnett } 9812d04e62b9SKevin Barnett 9813d04e62b9SKevin Barnett hpsa_sas_port->rphy = rphy; 9814d04e62b9SKevin Barnett device->sas_port = hpsa_sas_port; 9815d04e62b9SKevin Barnett 9816d04e62b9SKevin Barnett rc = hpsa_sas_port_add_rphy(hpsa_sas_port, rphy); 9817d04e62b9SKevin Barnett if (rc) 9818d04e62b9SKevin Barnett goto free_sas_port; 9819d04e62b9SKevin Barnett 9820d04e62b9SKevin Barnett return 0; 9821d04e62b9SKevin Barnett 9822d04e62b9SKevin Barnett free_sas_port: 9823d04e62b9SKevin Barnett hpsa_free_sas_port(hpsa_sas_port); 9824d04e62b9SKevin Barnett device->sas_port = NULL; 9825d04e62b9SKevin Barnett 9826d04e62b9SKevin Barnett return rc; 9827d04e62b9SKevin Barnett } 9828d04e62b9SKevin Barnett 9829d04e62b9SKevin Barnett static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device) 9830d04e62b9SKevin Barnett { 9831d04e62b9SKevin Barnett if (device->sas_port) { 9832d04e62b9SKevin Barnett hpsa_free_sas_port(device->sas_port); 9833d04e62b9SKevin Barnett device->sas_port = NULL; 9834d04e62b9SKevin Barnett } 9835d04e62b9SKevin Barnett } 9836d04e62b9SKevin Barnett 9837d04e62b9SKevin Barnett static int 9838d04e62b9SKevin Barnett hpsa_sas_get_linkerrors(struct sas_phy *phy) 9839d04e62b9SKevin Barnett { 9840d04e62b9SKevin Barnett return 0; 9841d04e62b9SKevin Barnett } 9842d04e62b9SKevin Barnett 9843d04e62b9SKevin Barnett static int 9844d04e62b9SKevin Barnett hpsa_sas_get_enclosure_identifier(struct sas_rphy *rphy, u64 *identifier) 9845d04e62b9SKevin Barnett { 9846aa105695SDan Carpenter *identifier = 0; 9847d04e62b9SKevin Barnett return 0; 9848d04e62b9SKevin Barnett } 9849d04e62b9SKevin Barnett 9850d04e62b9SKevin Barnett static int 9851d04e62b9SKevin Barnett hpsa_sas_get_bay_identifier(struct sas_rphy *rphy) 9852d04e62b9SKevin Barnett { 9853d04e62b9SKevin Barnett return -ENXIO; 9854d04e62b9SKevin Barnett } 9855d04e62b9SKevin Barnett 9856d04e62b9SKevin Barnett static int 9857d04e62b9SKevin Barnett hpsa_sas_phy_reset(struct sas_phy *phy, int hard_reset) 9858d04e62b9SKevin Barnett { 9859d04e62b9SKevin Barnett return 0; 9860d04e62b9SKevin Barnett } 9861d04e62b9SKevin Barnett 9862d04e62b9SKevin Barnett static int 9863d04e62b9SKevin Barnett hpsa_sas_phy_enable(struct sas_phy *phy, int enable) 9864d04e62b9SKevin Barnett { 9865d04e62b9SKevin Barnett return 0; 9866d04e62b9SKevin Barnett } 9867d04e62b9SKevin Barnett 9868d04e62b9SKevin Barnett static int 9869d04e62b9SKevin Barnett hpsa_sas_phy_setup(struct sas_phy *phy) 9870d04e62b9SKevin Barnett { 9871d04e62b9SKevin Barnett return 0; 9872d04e62b9SKevin Barnett } 9873d04e62b9SKevin Barnett 9874d04e62b9SKevin Barnett static void 9875d04e62b9SKevin Barnett hpsa_sas_phy_release(struct sas_phy *phy) 9876d04e62b9SKevin Barnett { 9877d04e62b9SKevin Barnett } 9878d04e62b9SKevin Barnett 9879d04e62b9SKevin Barnett static int 9880d04e62b9SKevin Barnett hpsa_sas_phy_speed(struct sas_phy *phy, struct sas_phy_linkrates *rates) 9881d04e62b9SKevin Barnett { 9882d04e62b9SKevin Barnett return -EINVAL; 9883d04e62b9SKevin Barnett } 9884d04e62b9SKevin Barnett 9885d04e62b9SKevin Barnett /* SMP = Serial Management Protocol */ 9886d04e62b9SKevin Barnett static int 9887d04e62b9SKevin Barnett hpsa_sas_smp_handler(struct Scsi_Host *shost, struct sas_rphy *rphy, 9888d04e62b9SKevin Barnett struct request *req) 9889d04e62b9SKevin Barnett { 9890d04e62b9SKevin Barnett return -EINVAL; 9891d04e62b9SKevin Barnett } 9892d04e62b9SKevin Barnett 9893d04e62b9SKevin Barnett static struct sas_function_template hpsa_sas_transport_functions = { 9894d04e62b9SKevin Barnett .get_linkerrors = hpsa_sas_get_linkerrors, 9895d04e62b9SKevin Barnett .get_enclosure_identifier = hpsa_sas_get_enclosure_identifier, 9896d04e62b9SKevin Barnett .get_bay_identifier = hpsa_sas_get_bay_identifier, 9897d04e62b9SKevin Barnett .phy_reset = hpsa_sas_phy_reset, 9898d04e62b9SKevin Barnett .phy_enable = hpsa_sas_phy_enable, 9899d04e62b9SKevin Barnett .phy_setup = hpsa_sas_phy_setup, 9900d04e62b9SKevin Barnett .phy_release = hpsa_sas_phy_release, 9901d04e62b9SKevin Barnett .set_phy_speed = hpsa_sas_phy_speed, 9902d04e62b9SKevin Barnett .smp_handler = hpsa_sas_smp_handler, 9903d04e62b9SKevin Barnett }; 9904d04e62b9SKevin Barnett 9905edd16368SStephen M. Cameron /* 9906edd16368SStephen M. Cameron * This is it. Register the PCI driver information for the cards we control 9907edd16368SStephen M. Cameron * the OS will call our registered routines when it finds one of our cards. 9908edd16368SStephen M. Cameron */ 9909edd16368SStephen M. Cameron static int __init hpsa_init(void) 9910edd16368SStephen M. Cameron { 9911d04e62b9SKevin Barnett int rc; 9912d04e62b9SKevin Barnett 9913d04e62b9SKevin Barnett hpsa_sas_transport_template = 9914d04e62b9SKevin Barnett sas_attach_transport(&hpsa_sas_transport_functions); 9915d04e62b9SKevin Barnett if (!hpsa_sas_transport_template) 9916d04e62b9SKevin Barnett return -ENODEV; 9917d04e62b9SKevin Barnett 9918d04e62b9SKevin Barnett rc = pci_register_driver(&hpsa_pci_driver); 9919d04e62b9SKevin Barnett 9920d04e62b9SKevin Barnett if (rc) 9921d04e62b9SKevin Barnett sas_release_transport(hpsa_sas_transport_template); 9922d04e62b9SKevin Barnett 9923d04e62b9SKevin Barnett return rc; 9924edd16368SStephen M. Cameron } 9925edd16368SStephen M. Cameron 9926edd16368SStephen M. Cameron static void __exit hpsa_cleanup(void) 9927edd16368SStephen M. Cameron { 9928edd16368SStephen M. Cameron pci_unregister_driver(&hpsa_pci_driver); 9929d04e62b9SKevin Barnett sas_release_transport(hpsa_sas_transport_template); 9930edd16368SStephen M. Cameron } 9931edd16368SStephen M. Cameron 9932e1f7de0cSMatt Gates static void __attribute__((unused)) verify_offsets(void) 9933e1f7de0cSMatt Gates { 9934e1f7de0cSMatt Gates #define VERIFY_OFFSET(member, offset) \ 9935dd0e19f3SScott Teel BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset) 9936dd0e19f3SScott Teel 9937dd0e19f3SScott Teel VERIFY_OFFSET(structure_size, 0); 9938dd0e19f3SScott Teel VERIFY_OFFSET(volume_blk_size, 4); 9939dd0e19f3SScott Teel VERIFY_OFFSET(volume_blk_cnt, 8); 9940dd0e19f3SScott Teel VERIFY_OFFSET(phys_blk_shift, 16); 9941dd0e19f3SScott Teel VERIFY_OFFSET(parity_rotation_shift, 17); 9942dd0e19f3SScott Teel VERIFY_OFFSET(strip_size, 18); 9943dd0e19f3SScott Teel VERIFY_OFFSET(disk_starting_blk, 20); 9944dd0e19f3SScott Teel VERIFY_OFFSET(disk_blk_cnt, 28); 9945dd0e19f3SScott Teel VERIFY_OFFSET(data_disks_per_row, 36); 9946dd0e19f3SScott Teel VERIFY_OFFSET(metadata_disks_per_row, 38); 9947dd0e19f3SScott Teel VERIFY_OFFSET(row_cnt, 40); 9948dd0e19f3SScott Teel VERIFY_OFFSET(layout_map_count, 42); 9949dd0e19f3SScott Teel VERIFY_OFFSET(flags, 44); 9950dd0e19f3SScott Teel VERIFY_OFFSET(dekindex, 46); 9951dd0e19f3SScott Teel /* VERIFY_OFFSET(reserved, 48 */ 9952dd0e19f3SScott Teel VERIFY_OFFSET(data, 64); 9953dd0e19f3SScott Teel 9954dd0e19f3SScott Teel #undef VERIFY_OFFSET 9955dd0e19f3SScott Teel 9956dd0e19f3SScott Teel #define VERIFY_OFFSET(member, offset) \ 9957b66cc250SMike Miller BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset) 9958b66cc250SMike Miller 9959b66cc250SMike Miller VERIFY_OFFSET(IU_type, 0); 9960b66cc250SMike Miller VERIFY_OFFSET(direction, 1); 9961b66cc250SMike Miller VERIFY_OFFSET(reply_queue, 2); 9962b66cc250SMike Miller /* VERIFY_OFFSET(reserved1, 3); */ 9963b66cc250SMike Miller VERIFY_OFFSET(scsi_nexus, 4); 9964b66cc250SMike Miller VERIFY_OFFSET(Tag, 8); 9965b66cc250SMike Miller VERIFY_OFFSET(cdb, 16); 9966b66cc250SMike Miller VERIFY_OFFSET(cciss_lun, 32); 9967b66cc250SMike Miller VERIFY_OFFSET(data_len, 40); 9968b66cc250SMike Miller VERIFY_OFFSET(cmd_priority_task_attr, 44); 9969b66cc250SMike Miller VERIFY_OFFSET(sg_count, 45); 9970b66cc250SMike Miller /* VERIFY_OFFSET(reserved3 */ 9971b66cc250SMike Miller VERIFY_OFFSET(err_ptr, 48); 9972b66cc250SMike Miller VERIFY_OFFSET(err_len, 56); 9973b66cc250SMike Miller /* VERIFY_OFFSET(reserved4 */ 9974b66cc250SMike Miller VERIFY_OFFSET(sg, 64); 9975b66cc250SMike Miller 9976b66cc250SMike Miller #undef VERIFY_OFFSET 9977b66cc250SMike Miller 9978b66cc250SMike Miller #define VERIFY_OFFSET(member, offset) \ 9979e1f7de0cSMatt Gates BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset) 9980e1f7de0cSMatt Gates 9981e1f7de0cSMatt Gates VERIFY_OFFSET(dev_handle, 0x00); 9982e1f7de0cSMatt Gates VERIFY_OFFSET(reserved1, 0x02); 9983e1f7de0cSMatt Gates VERIFY_OFFSET(function, 0x03); 9984e1f7de0cSMatt Gates VERIFY_OFFSET(reserved2, 0x04); 9985e1f7de0cSMatt Gates VERIFY_OFFSET(err_info, 0x0C); 9986e1f7de0cSMatt Gates VERIFY_OFFSET(reserved3, 0x10); 9987e1f7de0cSMatt Gates VERIFY_OFFSET(err_info_len, 0x12); 9988e1f7de0cSMatt Gates VERIFY_OFFSET(reserved4, 0x13); 9989e1f7de0cSMatt Gates VERIFY_OFFSET(sgl_offset, 0x14); 9990e1f7de0cSMatt Gates VERIFY_OFFSET(reserved5, 0x15); 9991e1f7de0cSMatt Gates VERIFY_OFFSET(transfer_len, 0x1C); 9992e1f7de0cSMatt Gates VERIFY_OFFSET(reserved6, 0x20); 9993e1f7de0cSMatt Gates VERIFY_OFFSET(io_flags, 0x24); 9994e1f7de0cSMatt Gates VERIFY_OFFSET(reserved7, 0x26); 9995e1f7de0cSMatt Gates VERIFY_OFFSET(LUN, 0x34); 9996e1f7de0cSMatt Gates VERIFY_OFFSET(control, 0x3C); 9997e1f7de0cSMatt Gates VERIFY_OFFSET(CDB, 0x40); 9998e1f7de0cSMatt Gates VERIFY_OFFSET(reserved8, 0x50); 9999e1f7de0cSMatt Gates VERIFY_OFFSET(host_context_flags, 0x60); 10000e1f7de0cSMatt Gates VERIFY_OFFSET(timeout_sec, 0x62); 10001e1f7de0cSMatt Gates VERIFY_OFFSET(ReplyQueue, 0x64); 10002e1f7de0cSMatt Gates VERIFY_OFFSET(reserved9, 0x65); 1000350a0decfSStephen M. Cameron VERIFY_OFFSET(tag, 0x68); 10004e1f7de0cSMatt Gates VERIFY_OFFSET(host_addr, 0x70); 10005e1f7de0cSMatt Gates VERIFY_OFFSET(CISS_LUN, 0x78); 10006e1f7de0cSMatt Gates VERIFY_OFFSET(SG, 0x78 + 8); 10007e1f7de0cSMatt Gates #undef VERIFY_OFFSET 10008e1f7de0cSMatt Gates } 10009e1f7de0cSMatt Gates 10010edd16368SStephen M. Cameron module_init(hpsa_init); 10011edd16368SStephen M. Cameron module_exit(hpsa_cleanup); 10012