1edd16368SStephen M. Cameron /* 2edd16368SStephen M. Cameron * Disk Array driver for HP Smart Array SAS controllers 394c7bc31SDon Brace * Copyright 2016 Microsemi Corporation 41358f6dcSDon Brace * Copyright 2014-2015 PMC-Sierra, Inc. 51358f6dcSDon Brace * Copyright 2000,2009-2015 Hewlett-Packard Development Company, L.P. 6edd16368SStephen M. Cameron * 7edd16368SStephen M. Cameron * This program is free software; you can redistribute it and/or modify 8edd16368SStephen M. Cameron * it under the terms of the GNU General Public License as published by 9edd16368SStephen M. Cameron * the Free Software Foundation; version 2 of the License. 10edd16368SStephen M. Cameron * 11edd16368SStephen M. Cameron * This program is distributed in the hope that it will be useful, 12edd16368SStephen M. Cameron * but WITHOUT ANY WARRANTY; without even the implied warranty of 13edd16368SStephen M. Cameron * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or 14edd16368SStephen M. Cameron * NON INFRINGEMENT. See the GNU General Public License for more details. 15edd16368SStephen M. Cameron * 1694c7bc31SDon Brace * Questions/Comments/Bugfixes to esc.storagedev@microsemi.com 17edd16368SStephen M. Cameron * 18edd16368SStephen M. Cameron */ 19edd16368SStephen M. Cameron 20edd16368SStephen M. Cameron #include <linux/module.h> 21edd16368SStephen M. Cameron #include <linux/interrupt.h> 22edd16368SStephen M. Cameron #include <linux/types.h> 23edd16368SStephen M. Cameron #include <linux/pci.h> 24e5a44df8SMatthew Garrett #include <linux/pci-aspm.h> 25edd16368SStephen M. Cameron #include <linux/kernel.h> 26edd16368SStephen M. Cameron #include <linux/slab.h> 27edd16368SStephen M. Cameron #include <linux/delay.h> 28edd16368SStephen M. Cameron #include <linux/fs.h> 29edd16368SStephen M. Cameron #include <linux/timer.h> 30edd16368SStephen M. Cameron #include <linux/init.h> 31edd16368SStephen M. Cameron #include <linux/spinlock.h> 32edd16368SStephen M. Cameron #include <linux/compat.h> 33edd16368SStephen M. Cameron #include <linux/blktrace_api.h> 34edd16368SStephen M. Cameron #include <linux/uaccess.h> 35edd16368SStephen M. Cameron #include <linux/io.h> 36edd16368SStephen M. Cameron #include <linux/dma-mapping.h> 37edd16368SStephen M. Cameron #include <linux/completion.h> 38edd16368SStephen M. Cameron #include <linux/moduleparam.h> 39edd16368SStephen M. Cameron #include <scsi/scsi.h> 40edd16368SStephen M. Cameron #include <scsi/scsi_cmnd.h> 41edd16368SStephen M. Cameron #include <scsi/scsi_device.h> 42edd16368SStephen M. Cameron #include <scsi/scsi_host.h> 43667e23d4SStephen M. Cameron #include <scsi/scsi_tcq.h> 449437ac43SStephen Cameron #include <scsi/scsi_eh.h> 45d04e62b9SKevin Barnett #include <scsi/scsi_transport_sas.h> 4673153fe5SWebb Scales #include <scsi/scsi_dbg.h> 47edd16368SStephen M. Cameron #include <linux/cciss_ioctl.h> 48edd16368SStephen M. Cameron #include <linux/string.h> 49edd16368SStephen M. Cameron #include <linux/bitmap.h> 5060063497SArun Sharma #include <linux/atomic.h> 51a0c12413SStephen M. Cameron #include <linux/jiffies.h> 5242a91641SDon Brace #include <linux/percpu-defs.h> 53094963daSStephen M. Cameron #include <linux/percpu.h> 542b08b3e9SDon Brace #include <asm/unaligned.h> 55283b4a9bSStephen M. Cameron #include <asm/div64.h> 56edd16368SStephen M. Cameron #include "hpsa_cmd.h" 57edd16368SStephen M. Cameron #include "hpsa.h" 58edd16368SStephen M. Cameron 59ec2c3aa9SDon Brace /* 60ec2c3aa9SDon Brace * HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' 61ec2c3aa9SDon Brace * with an optional trailing '-' followed by a byte value (0-255). 62ec2c3aa9SDon Brace */ 63ec2c3aa9SDon Brace #define HPSA_DRIVER_VERSION "3.4.14-0" 64edd16368SStephen M. Cameron #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")" 65f79cfec6SStephen M. Cameron #define HPSA "hpsa" 66edd16368SStephen M. Cameron 67007e7aa9SRobert Elliott /* How long to wait for CISS doorbell communication */ 68007e7aa9SRobert Elliott #define CLEAR_EVENT_WAIT_INTERVAL 20 /* ms for each msleep() call */ 69007e7aa9SRobert Elliott #define MODE_CHANGE_WAIT_INTERVAL 10 /* ms for each msleep() call */ 70007e7aa9SRobert Elliott #define MAX_CLEAR_EVENT_WAIT 30000 /* times 20 ms = 600 s */ 71007e7aa9SRobert Elliott #define MAX_MODE_CHANGE_WAIT 2000 /* times 10 ms = 20 s */ 72edd16368SStephen M. Cameron #define MAX_IOCTL_CONFIG_WAIT 1000 73edd16368SStephen M. Cameron 74edd16368SStephen M. Cameron /*define how many times we will try a command because of bus resets */ 75edd16368SStephen M. Cameron #define MAX_CMD_RETRIES 3 76edd16368SStephen M. Cameron 77edd16368SStephen M. Cameron /* Embedded module documentation macros - see modules.h */ 78edd16368SStephen M. Cameron MODULE_AUTHOR("Hewlett-Packard Company"); 79edd16368SStephen M. Cameron MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \ 80edd16368SStephen M. Cameron HPSA_DRIVER_VERSION); 81edd16368SStephen M. Cameron MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers"); 82edd16368SStephen M. Cameron MODULE_VERSION(HPSA_DRIVER_VERSION); 83edd16368SStephen M. Cameron MODULE_LICENSE("GPL"); 84edd16368SStephen M. Cameron 85edd16368SStephen M. Cameron static int hpsa_allow_any; 86edd16368SStephen M. Cameron module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR); 87edd16368SStephen M. Cameron MODULE_PARM_DESC(hpsa_allow_any, 88edd16368SStephen M. Cameron "Allow hpsa driver to access unknown HP Smart Array hardware"); 8902ec19c8SStephen M. Cameron static int hpsa_simple_mode; 9002ec19c8SStephen M. Cameron module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR); 9102ec19c8SStephen M. Cameron MODULE_PARM_DESC(hpsa_simple_mode, 9202ec19c8SStephen M. Cameron "Use 'simple mode' rather than 'performant mode'"); 93edd16368SStephen M. Cameron 94edd16368SStephen M. Cameron /* define the PCI info for the cards we can control */ 95edd16368SStephen M. Cameron static const struct pci_device_id hpsa_pci_device_id[] = { 96edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241}, 97edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243}, 98edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245}, 99edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247}, 100edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249}, 101163dbcd8SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A}, 102163dbcd8SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B}, 103f8b01eb9SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233}, 1049143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350}, 1059143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351}, 1069143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352}, 1079143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353}, 1089143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354}, 1099143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355}, 1109143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356}, 111fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1921}, 112fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1922}, 113fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1923}, 114fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1924}, 115fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1926}, 116fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1928}, 11797b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1929}, 11897b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BD}, 11997b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BE}, 12097b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BF}, 12197b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C0}, 12297b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C1}, 12397b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C2}, 12497b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C3}, 12597b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C4}, 12697b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C5}, 1273b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C6}, 12897b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C7}, 12997b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C8}, 13097b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C9}, 1313b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CA}, 1323b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CB}, 1333b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CC}, 1343b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CD}, 1353b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CE}, 136fdfa4b6dSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0580}, 137cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0581}, 138cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0582}, 139cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0583}, 140cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0584}, 141cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0585}, 1428e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076}, 1438e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087}, 1448e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D}, 1458e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088}, 1468e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f}, 147edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 148edd16368SStephen M. Cameron PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0}, 149edd16368SStephen M. Cameron {0,} 150edd16368SStephen M. Cameron }; 151edd16368SStephen M. Cameron 152edd16368SStephen M. Cameron MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id); 153edd16368SStephen M. Cameron 154edd16368SStephen M. Cameron /* board_id = Subsystem Device ID & Vendor ID 155edd16368SStephen M. Cameron * product = Marketing Name for the board 156edd16368SStephen M. Cameron * access = Address of the struct of function pointers 157edd16368SStephen M. Cameron */ 158edd16368SStephen M. Cameron static struct board_type products[] = { 159edd16368SStephen M. Cameron {0x3241103C, "Smart Array P212", &SA5_access}, 160edd16368SStephen M. Cameron {0x3243103C, "Smart Array P410", &SA5_access}, 161edd16368SStephen M. Cameron {0x3245103C, "Smart Array P410i", &SA5_access}, 162edd16368SStephen M. Cameron {0x3247103C, "Smart Array P411", &SA5_access}, 163edd16368SStephen M. Cameron {0x3249103C, "Smart Array P812", &SA5_access}, 164163dbcd8SMike Miller {0x324A103C, "Smart Array P712m", &SA5_access}, 165163dbcd8SMike Miller {0x324B103C, "Smart Array P711m", &SA5_access}, 1667d2cce58SStephen M. Cameron {0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */ 167fe0c9610SMike Miller {0x3350103C, "Smart Array P222", &SA5_access}, 168fe0c9610SMike Miller {0x3351103C, "Smart Array P420", &SA5_access}, 169fe0c9610SMike Miller {0x3352103C, "Smart Array P421", &SA5_access}, 170fe0c9610SMike Miller {0x3353103C, "Smart Array P822", &SA5_access}, 171fe0c9610SMike Miller {0x3354103C, "Smart Array P420i", &SA5_access}, 172fe0c9610SMike Miller {0x3355103C, "Smart Array P220i", &SA5_access}, 173fe0c9610SMike Miller {0x3356103C, "Smart Array P721m", &SA5_access}, 1741fd6c8e3SMike Miller {0x1921103C, "Smart Array P830i", &SA5_access}, 1751fd6c8e3SMike Miller {0x1922103C, "Smart Array P430", &SA5_access}, 1761fd6c8e3SMike Miller {0x1923103C, "Smart Array P431", &SA5_access}, 1771fd6c8e3SMike Miller {0x1924103C, "Smart Array P830", &SA5_access}, 1781fd6c8e3SMike Miller {0x1926103C, "Smart Array P731m", &SA5_access}, 1791fd6c8e3SMike Miller {0x1928103C, "Smart Array P230i", &SA5_access}, 1801fd6c8e3SMike Miller {0x1929103C, "Smart Array P530", &SA5_access}, 18127fb8137SDon Brace {0x21BD103C, "Smart Array P244br", &SA5_access}, 18227fb8137SDon Brace {0x21BE103C, "Smart Array P741m", &SA5_access}, 18327fb8137SDon Brace {0x21BF103C, "Smart HBA H240ar", &SA5_access}, 18427fb8137SDon Brace {0x21C0103C, "Smart Array P440ar", &SA5_access}, 185c8ae0ab1SDon Brace {0x21C1103C, "Smart Array P840ar", &SA5_access}, 18627fb8137SDon Brace {0x21C2103C, "Smart Array P440", &SA5_access}, 18727fb8137SDon Brace {0x21C3103C, "Smart Array P441", &SA5_access}, 18897b9f53dSMike Miller {0x21C4103C, "Smart Array", &SA5_access}, 18927fb8137SDon Brace {0x21C5103C, "Smart Array P841", &SA5_access}, 19027fb8137SDon Brace {0x21C6103C, "Smart HBA H244br", &SA5_access}, 19127fb8137SDon Brace {0x21C7103C, "Smart HBA H240", &SA5_access}, 19227fb8137SDon Brace {0x21C8103C, "Smart HBA H241", &SA5_access}, 19397b9f53dSMike Miller {0x21C9103C, "Smart Array", &SA5_access}, 19427fb8137SDon Brace {0x21CA103C, "Smart Array P246br", &SA5_access}, 19527fb8137SDon Brace {0x21CB103C, "Smart Array P840", &SA5_access}, 1963b7a45e5SJoe Handzik {0x21CC103C, "Smart Array", &SA5_access}, 1973b7a45e5SJoe Handzik {0x21CD103C, "Smart Array", &SA5_access}, 19827fb8137SDon Brace {0x21CE103C, "Smart HBA", &SA5_access}, 199fdfa4b6dSDon Brace {0x05809005, "SmartHBA-SA", &SA5_access}, 200cbb47dcbSDon Brace {0x05819005, "SmartHBA-SA 8i", &SA5_access}, 201cbb47dcbSDon Brace {0x05829005, "SmartHBA-SA 8i8e", &SA5_access}, 202cbb47dcbSDon Brace {0x05839005, "SmartHBA-SA 8e", &SA5_access}, 203cbb47dcbSDon Brace {0x05849005, "SmartHBA-SA 16i", &SA5_access}, 204cbb47dcbSDon Brace {0x05859005, "SmartHBA-SA 4i4e", &SA5_access}, 2058e616a5eSStephen M. Cameron {0x00761590, "HP Storage P1224 Array Controller", &SA5_access}, 2068e616a5eSStephen M. Cameron {0x00871590, "HP Storage P1224e Array Controller", &SA5_access}, 2078e616a5eSStephen M. Cameron {0x007D1590, "HP Storage P1228 Array Controller", &SA5_access}, 2088e616a5eSStephen M. Cameron {0x00881590, "HP Storage P1228e Array Controller", &SA5_access}, 2098e616a5eSStephen M. Cameron {0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access}, 210edd16368SStephen M. Cameron {0xFFFF103C, "Unknown Smart Array", &SA5_access}, 211edd16368SStephen M. Cameron }; 212edd16368SStephen M. Cameron 213d04e62b9SKevin Barnett static struct scsi_transport_template *hpsa_sas_transport_template; 214d04e62b9SKevin Barnett static int hpsa_add_sas_host(struct ctlr_info *h); 215d04e62b9SKevin Barnett static void hpsa_delete_sas_host(struct ctlr_info *h); 216d04e62b9SKevin Barnett static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node, 217d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *device); 218d04e62b9SKevin Barnett static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device); 219d04e62b9SKevin Barnett static struct hpsa_scsi_dev_t 220d04e62b9SKevin Barnett *hpsa_find_device_by_sas_rphy(struct ctlr_info *h, 221d04e62b9SKevin Barnett struct sas_rphy *rphy); 222d04e62b9SKevin Barnett 223a58e7e53SWebb Scales #define SCSI_CMD_BUSY ((struct scsi_cmnd *)&hpsa_cmd_busy) 224a58e7e53SWebb Scales static const struct scsi_cmnd hpsa_cmd_busy; 225a58e7e53SWebb Scales #define SCSI_CMD_IDLE ((struct scsi_cmnd *)&hpsa_cmd_idle) 226a58e7e53SWebb Scales static const struct scsi_cmnd hpsa_cmd_idle; 227edd16368SStephen M. Cameron static int number_of_controllers; 228edd16368SStephen M. Cameron 22910f66018SStephen M. Cameron static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id); 23010f66018SStephen M. Cameron static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id); 23142a91641SDon Brace static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg); 232edd16368SStephen M. Cameron 233edd16368SStephen M. Cameron #ifdef CONFIG_COMPAT 23442a91641SDon Brace static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, 23542a91641SDon Brace void __user *arg); 236edd16368SStephen M. Cameron #endif 237edd16368SStephen M. Cameron 238edd16368SStephen M. Cameron static void cmd_free(struct ctlr_info *h, struct CommandList *c); 239edd16368SStephen M. Cameron static struct CommandList *cmd_alloc(struct ctlr_info *h); 24073153fe5SWebb Scales static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c); 24173153fe5SWebb Scales static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h, 24273153fe5SWebb Scales struct scsi_cmnd *scmd); 243a2dac136SStephen M. Cameron static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 244b7bb24ebSStephen M. Cameron void *buff, size_t size, u16 page_code, unsigned char *scsi3addr, 245edd16368SStephen M. Cameron int cmd_type); 2462c143342SRobert Elliott static void hpsa_free_cmd_pool(struct ctlr_info *h); 247b7bb24ebSStephen M. Cameron #define VPD_PAGE (1 << 8) 248b48d9804SDon Brace #define HPSA_SIMPLE_ERROR_BITS 0x03 249edd16368SStephen M. Cameron 250f281233dSJeff Garzik static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd); 251a08a8471SStephen M. Cameron static void hpsa_scan_start(struct Scsi_Host *); 252a08a8471SStephen M. Cameron static int hpsa_scan_finished(struct Scsi_Host *sh, 253a08a8471SStephen M. Cameron unsigned long elapsed_time); 2547c0a0229SDon Brace static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth); 255edd16368SStephen M. Cameron 256edd16368SStephen M. Cameron static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd); 25775167d2cSStephen M. Cameron static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd); 258edd16368SStephen M. Cameron static int hpsa_slave_alloc(struct scsi_device *sdev); 25941ce4c35SStephen Cameron static int hpsa_slave_configure(struct scsi_device *sdev); 260edd16368SStephen M. Cameron static void hpsa_slave_destroy(struct scsi_device *sdev); 261edd16368SStephen M. Cameron 2628aa60681SDon Brace static void hpsa_update_scsi_devices(struct ctlr_info *h); 263edd16368SStephen M. Cameron static int check_for_unit_attention(struct ctlr_info *h, 264edd16368SStephen M. Cameron struct CommandList *c); 265edd16368SStephen M. Cameron static void check_ioctl_unit_attention(struct ctlr_info *h, 266edd16368SStephen M. Cameron struct CommandList *c); 267303932fdSDon Brace /* performant mode helper functions */ 268303932fdSDon Brace static void calc_bucket_map(int *bucket, int num_buckets, 2692b08b3e9SDon Brace int nsgs, int min_blocks, u32 *bucket_map); 270105a3dbcSRobert Elliott static void hpsa_free_performant_mode(struct ctlr_info *h); 271105a3dbcSRobert Elliott static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h); 272254f796bSMatt Gates static inline u32 next_command(struct ctlr_info *h, u8 q); 2736f039790SGreg Kroah-Hartman static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 2746f039790SGreg Kroah-Hartman u32 *cfg_base_addr, u64 *cfg_base_addr_index, 2751df8552aSStephen M. Cameron u64 *cfg_offset); 2766f039790SGreg Kroah-Hartman static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 2771df8552aSStephen M. Cameron unsigned long *memory_bar); 2786f039790SGreg Kroah-Hartman static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id); 2796f039790SGreg Kroah-Hartman static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 2806f039790SGreg Kroah-Hartman int wait_for_ready); 28175167d2cSStephen M. Cameron static inline void finish_cmd(struct CommandList *c); 282c706a795SRobert Elliott static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h); 283fe5389c8SStephen M. Cameron #define BOARD_NOT_READY 0 284fe5389c8SStephen M. Cameron #define BOARD_READY 1 28523100dd9SStephen M. Cameron static void hpsa_drain_accel_commands(struct ctlr_info *h); 28676438d08SStephen M. Cameron static void hpsa_flush_cache(struct ctlr_info *h); 287c349775eSScott Teel static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h, 288c349775eSScott Teel struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 28903383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk); 290080ef1ccSDon Brace static void hpsa_command_resubmit_worker(struct work_struct *work); 29125163bd5SWebb Scales static u32 lockup_detected(struct ctlr_info *h); 29225163bd5SWebb Scales static int detect_controller_lockup(struct ctlr_info *h); 293c2adae44SScott Teel static void hpsa_disable_rld_caching(struct ctlr_info *h); 294d04e62b9SKevin Barnett static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 295d04e62b9SKevin Barnett struct ReportExtendedLUNdata *buf, int bufsize); 29634592254SScott Teel static int hpsa_luns_changed(struct ctlr_info *h); 297*ba74fdc4SDon Brace static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c, 298*ba74fdc4SDon Brace struct hpsa_scsi_dev_t *dev, 299*ba74fdc4SDon Brace unsigned char *scsi3addr); 300edd16368SStephen M. Cameron 301edd16368SStephen M. Cameron static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev) 302edd16368SStephen M. Cameron { 303edd16368SStephen M. Cameron unsigned long *priv = shost_priv(sdev->host); 304edd16368SStephen M. Cameron return (struct ctlr_info *) *priv; 305edd16368SStephen M. Cameron } 306edd16368SStephen M. Cameron 307a23513e8SStephen M. Cameron static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh) 308a23513e8SStephen M. Cameron { 309a23513e8SStephen M. Cameron unsigned long *priv = shost_priv(sh); 310a23513e8SStephen M. Cameron return (struct ctlr_info *) *priv; 311a23513e8SStephen M. Cameron } 312a23513e8SStephen M. Cameron 313a58e7e53SWebb Scales static inline bool hpsa_is_cmd_idle(struct CommandList *c) 314a58e7e53SWebb Scales { 315a58e7e53SWebb Scales return c->scsi_cmd == SCSI_CMD_IDLE; 316a58e7e53SWebb Scales } 317a58e7e53SWebb Scales 318d604f533SWebb Scales static inline bool hpsa_is_pending_event(struct CommandList *c) 319d604f533SWebb Scales { 320d604f533SWebb Scales return c->abort_pending || c->reset_pending; 321d604f533SWebb Scales } 322d604f533SWebb Scales 3239437ac43SStephen Cameron /* extract sense key, asc, and ascq from sense data. -1 means invalid. */ 3249437ac43SStephen Cameron static void decode_sense_data(const u8 *sense_data, int sense_data_len, 3259437ac43SStephen Cameron u8 *sense_key, u8 *asc, u8 *ascq) 3269437ac43SStephen Cameron { 3279437ac43SStephen Cameron struct scsi_sense_hdr sshdr; 3289437ac43SStephen Cameron bool rc; 3299437ac43SStephen Cameron 3309437ac43SStephen Cameron *sense_key = -1; 3319437ac43SStephen Cameron *asc = -1; 3329437ac43SStephen Cameron *ascq = -1; 3339437ac43SStephen Cameron 3349437ac43SStephen Cameron if (sense_data_len < 1) 3359437ac43SStephen Cameron return; 3369437ac43SStephen Cameron 3379437ac43SStephen Cameron rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr); 3389437ac43SStephen Cameron if (rc) { 3399437ac43SStephen Cameron *sense_key = sshdr.sense_key; 3409437ac43SStephen Cameron *asc = sshdr.asc; 3419437ac43SStephen Cameron *ascq = sshdr.ascq; 3429437ac43SStephen Cameron } 3439437ac43SStephen Cameron } 3449437ac43SStephen Cameron 345edd16368SStephen M. Cameron static int check_for_unit_attention(struct ctlr_info *h, 346edd16368SStephen M. Cameron struct CommandList *c) 347edd16368SStephen M. Cameron { 3489437ac43SStephen Cameron u8 sense_key, asc, ascq; 3499437ac43SStephen Cameron int sense_len; 3509437ac43SStephen Cameron 3519437ac43SStephen Cameron if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo)) 3529437ac43SStephen Cameron sense_len = sizeof(c->err_info->SenseInfo); 3539437ac43SStephen Cameron else 3549437ac43SStephen Cameron sense_len = c->err_info->SenseLen; 3559437ac43SStephen Cameron 3569437ac43SStephen Cameron decode_sense_data(c->err_info->SenseInfo, sense_len, 3579437ac43SStephen Cameron &sense_key, &asc, &ascq); 35881c27557SDon Brace if (sense_key != UNIT_ATTENTION || asc == 0xff) 359edd16368SStephen M. Cameron return 0; 360edd16368SStephen M. Cameron 3619437ac43SStephen Cameron switch (asc) { 362edd16368SStephen M. Cameron case STATE_CHANGED: 3639437ac43SStephen Cameron dev_warn(&h->pdev->dev, 3642946e82bSRobert Elliott "%s: a state change detected, command retried\n", 3652946e82bSRobert Elliott h->devname); 366edd16368SStephen M. Cameron break; 367edd16368SStephen M. Cameron case LUN_FAILED: 3687f73695aSStephen M. Cameron dev_warn(&h->pdev->dev, 3692946e82bSRobert Elliott "%s: LUN failure detected\n", h->devname); 370edd16368SStephen M. Cameron break; 371edd16368SStephen M. Cameron case REPORT_LUNS_CHANGED: 3727f73695aSStephen M. Cameron dev_warn(&h->pdev->dev, 3732946e82bSRobert Elliott "%s: report LUN data changed\n", h->devname); 374edd16368SStephen M. Cameron /* 3754f4eb9f1SScott Teel * Note: this REPORT_LUNS_CHANGED condition only occurs on the external 3764f4eb9f1SScott Teel * target (array) devices. 377edd16368SStephen M. Cameron */ 378edd16368SStephen M. Cameron break; 379edd16368SStephen M. Cameron case POWER_OR_RESET: 3802946e82bSRobert Elliott dev_warn(&h->pdev->dev, 3812946e82bSRobert Elliott "%s: a power on or device reset detected\n", 3822946e82bSRobert Elliott h->devname); 383edd16368SStephen M. Cameron break; 384edd16368SStephen M. Cameron case UNIT_ATTENTION_CLEARED: 3852946e82bSRobert Elliott dev_warn(&h->pdev->dev, 3862946e82bSRobert Elliott "%s: unit attention cleared by another initiator\n", 3872946e82bSRobert Elliott h->devname); 388edd16368SStephen M. Cameron break; 389edd16368SStephen M. Cameron default: 3902946e82bSRobert Elliott dev_warn(&h->pdev->dev, 3912946e82bSRobert Elliott "%s: unknown unit attention detected\n", 3922946e82bSRobert Elliott h->devname); 393edd16368SStephen M. Cameron break; 394edd16368SStephen M. Cameron } 395edd16368SStephen M. Cameron return 1; 396edd16368SStephen M. Cameron } 397edd16368SStephen M. Cameron 398852af20aSMatt Bondurant static int check_for_busy(struct ctlr_info *h, struct CommandList *c) 399852af20aSMatt Bondurant { 400852af20aSMatt Bondurant if (c->err_info->CommandStatus != CMD_TARGET_STATUS || 401852af20aSMatt Bondurant (c->err_info->ScsiStatus != SAM_STAT_BUSY && 402852af20aSMatt Bondurant c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL)) 403852af20aSMatt Bondurant return 0; 404852af20aSMatt Bondurant dev_warn(&h->pdev->dev, HPSA "device busy"); 405852af20aSMatt Bondurant return 1; 406852af20aSMatt Bondurant } 407852af20aSMatt Bondurant 408e985c58fSStephen Cameron static u32 lockup_detected(struct ctlr_info *h); 409e985c58fSStephen Cameron static ssize_t host_show_lockup_detected(struct device *dev, 410e985c58fSStephen Cameron struct device_attribute *attr, char *buf) 411e985c58fSStephen Cameron { 412e985c58fSStephen Cameron int ld; 413e985c58fSStephen Cameron struct ctlr_info *h; 414e985c58fSStephen Cameron struct Scsi_Host *shost = class_to_shost(dev); 415e985c58fSStephen Cameron 416e985c58fSStephen Cameron h = shost_to_hba(shost); 417e985c58fSStephen Cameron ld = lockup_detected(h); 418e985c58fSStephen Cameron 419e985c58fSStephen Cameron return sprintf(buf, "ld=%d\n", ld); 420e985c58fSStephen Cameron } 421e985c58fSStephen Cameron 422da0697bdSScott Teel static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev, 423da0697bdSScott Teel struct device_attribute *attr, 424da0697bdSScott Teel const char *buf, size_t count) 425da0697bdSScott Teel { 426da0697bdSScott Teel int status, len; 427da0697bdSScott Teel struct ctlr_info *h; 428da0697bdSScott Teel struct Scsi_Host *shost = class_to_shost(dev); 429da0697bdSScott Teel char tmpbuf[10]; 430da0697bdSScott Teel 431da0697bdSScott Teel if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO)) 432da0697bdSScott Teel return -EACCES; 433da0697bdSScott Teel len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count; 434da0697bdSScott Teel strncpy(tmpbuf, buf, len); 435da0697bdSScott Teel tmpbuf[len] = '\0'; 436da0697bdSScott Teel if (sscanf(tmpbuf, "%d", &status) != 1) 437da0697bdSScott Teel return -EINVAL; 438da0697bdSScott Teel h = shost_to_hba(shost); 439da0697bdSScott Teel h->acciopath_status = !!status; 440da0697bdSScott Teel dev_warn(&h->pdev->dev, 441da0697bdSScott Teel "hpsa: HP SSD Smart Path %s via sysfs update.\n", 442da0697bdSScott Teel h->acciopath_status ? "enabled" : "disabled"); 443da0697bdSScott Teel return count; 444da0697bdSScott Teel } 445da0697bdSScott Teel 4462ba8bfc8SStephen M. Cameron static ssize_t host_store_raid_offload_debug(struct device *dev, 4472ba8bfc8SStephen M. Cameron struct device_attribute *attr, 4482ba8bfc8SStephen M. Cameron const char *buf, size_t count) 4492ba8bfc8SStephen M. Cameron { 4502ba8bfc8SStephen M. Cameron int debug_level, len; 4512ba8bfc8SStephen M. Cameron struct ctlr_info *h; 4522ba8bfc8SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 4532ba8bfc8SStephen M. Cameron char tmpbuf[10]; 4542ba8bfc8SStephen M. Cameron 4552ba8bfc8SStephen M. Cameron if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO)) 4562ba8bfc8SStephen M. Cameron return -EACCES; 4572ba8bfc8SStephen M. Cameron len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count; 4582ba8bfc8SStephen M. Cameron strncpy(tmpbuf, buf, len); 4592ba8bfc8SStephen M. Cameron tmpbuf[len] = '\0'; 4602ba8bfc8SStephen M. Cameron if (sscanf(tmpbuf, "%d", &debug_level) != 1) 4612ba8bfc8SStephen M. Cameron return -EINVAL; 4622ba8bfc8SStephen M. Cameron if (debug_level < 0) 4632ba8bfc8SStephen M. Cameron debug_level = 0; 4642ba8bfc8SStephen M. Cameron h = shost_to_hba(shost); 4652ba8bfc8SStephen M. Cameron h->raid_offload_debug = debug_level; 4662ba8bfc8SStephen M. Cameron dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n", 4672ba8bfc8SStephen M. Cameron h->raid_offload_debug); 4682ba8bfc8SStephen M. Cameron return count; 4692ba8bfc8SStephen M. Cameron } 4702ba8bfc8SStephen M. Cameron 471edd16368SStephen M. Cameron static ssize_t host_store_rescan(struct device *dev, 472edd16368SStephen M. Cameron struct device_attribute *attr, 473edd16368SStephen M. Cameron const char *buf, size_t count) 474edd16368SStephen M. Cameron { 475edd16368SStephen M. Cameron struct ctlr_info *h; 476edd16368SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 477a23513e8SStephen M. Cameron h = shost_to_hba(shost); 47831468401SMike Miller hpsa_scan_start(h->scsi_host); 479edd16368SStephen M. Cameron return count; 480edd16368SStephen M. Cameron } 481edd16368SStephen M. Cameron 482d28ce020SStephen M. Cameron static ssize_t host_show_firmware_revision(struct device *dev, 483d28ce020SStephen M. Cameron struct device_attribute *attr, char *buf) 484d28ce020SStephen M. Cameron { 485d28ce020SStephen M. Cameron struct ctlr_info *h; 486d28ce020SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 487d28ce020SStephen M. Cameron unsigned char *fwrev; 488d28ce020SStephen M. Cameron 489d28ce020SStephen M. Cameron h = shost_to_hba(shost); 490d28ce020SStephen M. Cameron if (!h->hba_inquiry_data) 491d28ce020SStephen M. Cameron return 0; 492d28ce020SStephen M. Cameron fwrev = &h->hba_inquiry_data[32]; 493d28ce020SStephen M. Cameron return snprintf(buf, 20, "%c%c%c%c\n", 494d28ce020SStephen M. Cameron fwrev[0], fwrev[1], fwrev[2], fwrev[3]); 495d28ce020SStephen M. Cameron } 496d28ce020SStephen M. Cameron 49794a13649SStephen M. Cameron static ssize_t host_show_commands_outstanding(struct device *dev, 49894a13649SStephen M. Cameron struct device_attribute *attr, char *buf) 49994a13649SStephen M. Cameron { 50094a13649SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 50194a13649SStephen M. Cameron struct ctlr_info *h = shost_to_hba(shost); 50294a13649SStephen M. Cameron 5030cbf768eSStephen M. Cameron return snprintf(buf, 20, "%d\n", 5040cbf768eSStephen M. Cameron atomic_read(&h->commands_outstanding)); 50594a13649SStephen M. Cameron } 50694a13649SStephen M. Cameron 507745a7a25SStephen M. Cameron static ssize_t host_show_transport_mode(struct device *dev, 508745a7a25SStephen M. Cameron struct device_attribute *attr, char *buf) 509745a7a25SStephen M. Cameron { 510745a7a25SStephen M. Cameron struct ctlr_info *h; 511745a7a25SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 512745a7a25SStephen M. Cameron 513745a7a25SStephen M. Cameron h = shost_to_hba(shost); 514745a7a25SStephen M. Cameron return snprintf(buf, 20, "%s\n", 515960a30e7SStephen M. Cameron h->transMethod & CFGTBL_Trans_Performant ? 516745a7a25SStephen M. Cameron "performant" : "simple"); 517745a7a25SStephen M. Cameron } 518745a7a25SStephen M. Cameron 519da0697bdSScott Teel static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev, 520da0697bdSScott Teel struct device_attribute *attr, char *buf) 521da0697bdSScott Teel { 522da0697bdSScott Teel struct ctlr_info *h; 523da0697bdSScott Teel struct Scsi_Host *shost = class_to_shost(dev); 524da0697bdSScott Teel 525da0697bdSScott Teel h = shost_to_hba(shost); 526da0697bdSScott Teel return snprintf(buf, 30, "HP SSD Smart Path %s\n", 527da0697bdSScott Teel (h->acciopath_status == 1) ? "enabled" : "disabled"); 528da0697bdSScott Teel } 529da0697bdSScott Teel 53046380786SStephen M. Cameron /* List of controllers which cannot be hard reset on kexec with reset_devices */ 531941b1cdaSStephen M. Cameron static u32 unresettable_controller[] = { 532941b1cdaSStephen M. Cameron 0x324a103C, /* Smart Array P712m */ 533941b1cdaSStephen M. Cameron 0x324b103C, /* Smart Array P711m */ 534941b1cdaSStephen M. Cameron 0x3223103C, /* Smart Array P800 */ 535941b1cdaSStephen M. Cameron 0x3234103C, /* Smart Array P400 */ 536941b1cdaSStephen M. Cameron 0x3235103C, /* Smart Array P400i */ 537941b1cdaSStephen M. Cameron 0x3211103C, /* Smart Array E200i */ 538941b1cdaSStephen M. Cameron 0x3212103C, /* Smart Array E200 */ 539941b1cdaSStephen M. Cameron 0x3213103C, /* Smart Array E200i */ 540941b1cdaSStephen M. Cameron 0x3214103C, /* Smart Array E200i */ 541941b1cdaSStephen M. Cameron 0x3215103C, /* Smart Array E200i */ 542941b1cdaSStephen M. Cameron 0x3237103C, /* Smart Array E500 */ 543941b1cdaSStephen M. Cameron 0x323D103C, /* Smart Array P700m */ 5447af0abbcSTomas Henzl 0x40800E11, /* Smart Array 5i */ 545941b1cdaSStephen M. Cameron 0x409C0E11, /* Smart Array 6400 */ 546941b1cdaSStephen M. Cameron 0x409D0E11, /* Smart Array 6400 EM */ 5475a4f934eSTomas Henzl 0x40700E11, /* Smart Array 5300 */ 5485a4f934eSTomas Henzl 0x40820E11, /* Smart Array 532 */ 5495a4f934eSTomas Henzl 0x40830E11, /* Smart Array 5312 */ 5505a4f934eSTomas Henzl 0x409A0E11, /* Smart Array 641 */ 5515a4f934eSTomas Henzl 0x409B0E11, /* Smart Array 642 */ 5525a4f934eSTomas Henzl 0x40910E11, /* Smart Array 6i */ 553941b1cdaSStephen M. Cameron }; 554941b1cdaSStephen M. Cameron 55546380786SStephen M. Cameron /* List of controllers which cannot even be soft reset */ 55646380786SStephen M. Cameron static u32 soft_unresettable_controller[] = { 5577af0abbcSTomas Henzl 0x40800E11, /* Smart Array 5i */ 5585a4f934eSTomas Henzl 0x40700E11, /* Smart Array 5300 */ 5595a4f934eSTomas Henzl 0x40820E11, /* Smart Array 532 */ 5605a4f934eSTomas Henzl 0x40830E11, /* Smart Array 5312 */ 5615a4f934eSTomas Henzl 0x409A0E11, /* Smart Array 641 */ 5625a4f934eSTomas Henzl 0x409B0E11, /* Smart Array 642 */ 5635a4f934eSTomas Henzl 0x40910E11, /* Smart Array 6i */ 56446380786SStephen M. Cameron /* Exclude 640x boards. These are two pci devices in one slot 56546380786SStephen M. Cameron * which share a battery backed cache module. One controls the 56646380786SStephen M. Cameron * cache, the other accesses the cache through the one that controls 56746380786SStephen M. Cameron * it. If we reset the one controlling the cache, the other will 56846380786SStephen M. Cameron * likely not be happy. Just forbid resetting this conjoined mess. 56946380786SStephen M. Cameron * The 640x isn't really supported by hpsa anyway. 57046380786SStephen M. Cameron */ 57146380786SStephen M. Cameron 0x409C0E11, /* Smart Array 6400 */ 57246380786SStephen M. Cameron 0x409D0E11, /* Smart Array 6400 EM */ 57346380786SStephen M. Cameron }; 57446380786SStephen M. Cameron 5759b5c48c2SStephen Cameron static u32 needs_abort_tags_swizzled[] = { 5769b5c48c2SStephen Cameron 0x323D103C, /* Smart Array P700m */ 5779b5c48c2SStephen Cameron 0x324a103C, /* Smart Array P712m */ 5789b5c48c2SStephen Cameron 0x324b103C, /* SmartArray P711m */ 5799b5c48c2SStephen Cameron }; 5809b5c48c2SStephen Cameron 5819b5c48c2SStephen Cameron static int board_id_in_array(u32 a[], int nelems, u32 board_id) 582941b1cdaSStephen M. Cameron { 583941b1cdaSStephen M. Cameron int i; 584941b1cdaSStephen M. Cameron 5859b5c48c2SStephen Cameron for (i = 0; i < nelems; i++) 5869b5c48c2SStephen Cameron if (a[i] == board_id) 587941b1cdaSStephen M. Cameron return 1; 5889b5c48c2SStephen Cameron return 0; 5899b5c48c2SStephen Cameron } 5909b5c48c2SStephen Cameron 5919b5c48c2SStephen Cameron static int ctlr_is_hard_resettable(u32 board_id) 5929b5c48c2SStephen Cameron { 5939b5c48c2SStephen Cameron return !board_id_in_array(unresettable_controller, 5949b5c48c2SStephen Cameron ARRAY_SIZE(unresettable_controller), board_id); 595941b1cdaSStephen M. Cameron } 596941b1cdaSStephen M. Cameron 59746380786SStephen M. Cameron static int ctlr_is_soft_resettable(u32 board_id) 59846380786SStephen M. Cameron { 5999b5c48c2SStephen Cameron return !board_id_in_array(soft_unresettable_controller, 6009b5c48c2SStephen Cameron ARRAY_SIZE(soft_unresettable_controller), board_id); 60146380786SStephen M. Cameron } 60246380786SStephen M. Cameron 60346380786SStephen M. Cameron static int ctlr_is_resettable(u32 board_id) 60446380786SStephen M. Cameron { 60546380786SStephen M. Cameron return ctlr_is_hard_resettable(board_id) || 60646380786SStephen M. Cameron ctlr_is_soft_resettable(board_id); 60746380786SStephen M. Cameron } 60846380786SStephen M. Cameron 6099b5c48c2SStephen Cameron static int ctlr_needs_abort_tags_swizzled(u32 board_id) 6109b5c48c2SStephen Cameron { 6119b5c48c2SStephen Cameron return board_id_in_array(needs_abort_tags_swizzled, 6129b5c48c2SStephen Cameron ARRAY_SIZE(needs_abort_tags_swizzled), board_id); 6139b5c48c2SStephen Cameron } 6149b5c48c2SStephen Cameron 615941b1cdaSStephen M. Cameron static ssize_t host_show_resettable(struct device *dev, 616941b1cdaSStephen M. Cameron struct device_attribute *attr, char *buf) 617941b1cdaSStephen M. Cameron { 618941b1cdaSStephen M. Cameron struct ctlr_info *h; 619941b1cdaSStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 620941b1cdaSStephen M. Cameron 621941b1cdaSStephen M. Cameron h = shost_to_hba(shost); 62246380786SStephen M. Cameron return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id)); 623941b1cdaSStephen M. Cameron } 624941b1cdaSStephen M. Cameron 625edd16368SStephen M. Cameron static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[]) 626edd16368SStephen M. Cameron { 627edd16368SStephen M. Cameron return (scsi3addr[3] & 0xC0) == 0x40; 628edd16368SStephen M. Cameron } 629edd16368SStephen M. Cameron 630f2ef0ce7SRobert Elliott static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6", 6317c59a0d4SDon Brace "1(+0)ADM", "UNKNOWN", "PHYS DRV" 632edd16368SStephen M. Cameron }; 6336b80b18fSScott Teel #define HPSA_RAID_0 0 6346b80b18fSScott Teel #define HPSA_RAID_4 1 6356b80b18fSScott Teel #define HPSA_RAID_1 2 /* also used for RAID 10 */ 6366b80b18fSScott Teel #define HPSA_RAID_5 3 /* also used for RAID 50 */ 6376b80b18fSScott Teel #define HPSA_RAID_51 4 6386b80b18fSScott Teel #define HPSA_RAID_6 5 /* also used for RAID 60 */ 6396b80b18fSScott Teel #define HPSA_RAID_ADM 6 /* also used for RAID 1+0 ADM */ 6407c59a0d4SDon Brace #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 2) 6417c59a0d4SDon Brace #define PHYSICAL_DRIVE (ARRAY_SIZE(raid_label) - 1) 642edd16368SStephen M. Cameron 643f3f01730SKevin Barnett static inline bool is_logical_device(struct hpsa_scsi_dev_t *device) 644f3f01730SKevin Barnett { 645f3f01730SKevin Barnett return !device->physical_device; 646f3f01730SKevin Barnett } 647edd16368SStephen M. Cameron 648edd16368SStephen M. Cameron static ssize_t raid_level_show(struct device *dev, 649edd16368SStephen M. Cameron struct device_attribute *attr, char *buf) 650edd16368SStephen M. Cameron { 651edd16368SStephen M. Cameron ssize_t l = 0; 65282a72c0aSStephen M. Cameron unsigned char rlevel; 653edd16368SStephen M. Cameron struct ctlr_info *h; 654edd16368SStephen M. Cameron struct scsi_device *sdev; 655edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *hdev; 656edd16368SStephen M. Cameron unsigned long flags; 657edd16368SStephen M. Cameron 658edd16368SStephen M. Cameron sdev = to_scsi_device(dev); 659edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 660edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 661edd16368SStephen M. Cameron hdev = sdev->hostdata; 662edd16368SStephen M. Cameron if (!hdev) { 663edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 664edd16368SStephen M. Cameron return -ENODEV; 665edd16368SStephen M. Cameron } 666edd16368SStephen M. Cameron 667edd16368SStephen M. Cameron /* Is this even a logical drive? */ 668f3f01730SKevin Barnett if (!is_logical_device(hdev)) { 669edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 670edd16368SStephen M. Cameron l = snprintf(buf, PAGE_SIZE, "N/A\n"); 671edd16368SStephen M. Cameron return l; 672edd16368SStephen M. Cameron } 673edd16368SStephen M. Cameron 674edd16368SStephen M. Cameron rlevel = hdev->raid_level; 675edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 67682a72c0aSStephen M. Cameron if (rlevel > RAID_UNKNOWN) 677edd16368SStephen M. Cameron rlevel = RAID_UNKNOWN; 678edd16368SStephen M. Cameron l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]); 679edd16368SStephen M. Cameron return l; 680edd16368SStephen M. Cameron } 681edd16368SStephen M. Cameron 682edd16368SStephen M. Cameron static ssize_t lunid_show(struct device *dev, 683edd16368SStephen M. Cameron struct device_attribute *attr, char *buf) 684edd16368SStephen M. Cameron { 685edd16368SStephen M. Cameron struct ctlr_info *h; 686edd16368SStephen M. Cameron struct scsi_device *sdev; 687edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *hdev; 688edd16368SStephen M. Cameron unsigned long flags; 689edd16368SStephen M. Cameron unsigned char lunid[8]; 690edd16368SStephen M. Cameron 691edd16368SStephen M. Cameron sdev = to_scsi_device(dev); 692edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 693edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 694edd16368SStephen M. Cameron hdev = sdev->hostdata; 695edd16368SStephen M. Cameron if (!hdev) { 696edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 697edd16368SStephen M. Cameron return -ENODEV; 698edd16368SStephen M. Cameron } 699edd16368SStephen M. Cameron memcpy(lunid, hdev->scsi3addr, sizeof(lunid)); 700edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 701edd16368SStephen M. Cameron return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 702edd16368SStephen M. Cameron lunid[0], lunid[1], lunid[2], lunid[3], 703edd16368SStephen M. Cameron lunid[4], lunid[5], lunid[6], lunid[7]); 704edd16368SStephen M. Cameron } 705edd16368SStephen M. Cameron 706edd16368SStephen M. Cameron static ssize_t unique_id_show(struct device *dev, 707edd16368SStephen M. Cameron struct device_attribute *attr, char *buf) 708edd16368SStephen M. Cameron { 709edd16368SStephen M. Cameron struct ctlr_info *h; 710edd16368SStephen M. Cameron struct scsi_device *sdev; 711edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *hdev; 712edd16368SStephen M. Cameron unsigned long flags; 713edd16368SStephen M. Cameron unsigned char sn[16]; 714edd16368SStephen M. Cameron 715edd16368SStephen M. Cameron sdev = to_scsi_device(dev); 716edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 717edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 718edd16368SStephen M. Cameron hdev = sdev->hostdata; 719edd16368SStephen M. Cameron if (!hdev) { 720edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 721edd16368SStephen M. Cameron return -ENODEV; 722edd16368SStephen M. Cameron } 723edd16368SStephen M. Cameron memcpy(sn, hdev->device_id, sizeof(sn)); 724edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 725edd16368SStephen M. Cameron return snprintf(buf, 16 * 2 + 2, 726edd16368SStephen M. Cameron "%02X%02X%02X%02X%02X%02X%02X%02X" 727edd16368SStephen M. Cameron "%02X%02X%02X%02X%02X%02X%02X%02X\n", 728edd16368SStephen M. Cameron sn[0], sn[1], sn[2], sn[3], 729edd16368SStephen M. Cameron sn[4], sn[5], sn[6], sn[7], 730edd16368SStephen M. Cameron sn[8], sn[9], sn[10], sn[11], 731edd16368SStephen M. Cameron sn[12], sn[13], sn[14], sn[15]); 732edd16368SStephen M. Cameron } 733edd16368SStephen M. Cameron 734ded1be4aSJoseph T Handzik static ssize_t sas_address_show(struct device *dev, 735ded1be4aSJoseph T Handzik struct device_attribute *attr, char *buf) 736ded1be4aSJoseph T Handzik { 737ded1be4aSJoseph T Handzik struct ctlr_info *h; 738ded1be4aSJoseph T Handzik struct scsi_device *sdev; 739ded1be4aSJoseph T Handzik struct hpsa_scsi_dev_t *hdev; 740ded1be4aSJoseph T Handzik unsigned long flags; 741ded1be4aSJoseph T Handzik u64 sas_address; 742ded1be4aSJoseph T Handzik 743ded1be4aSJoseph T Handzik sdev = to_scsi_device(dev); 744ded1be4aSJoseph T Handzik h = sdev_to_hba(sdev); 745ded1be4aSJoseph T Handzik spin_lock_irqsave(&h->lock, flags); 746ded1be4aSJoseph T Handzik hdev = sdev->hostdata; 747ded1be4aSJoseph T Handzik if (!hdev || is_logical_device(hdev) || !hdev->expose_device) { 748ded1be4aSJoseph T Handzik spin_unlock_irqrestore(&h->lock, flags); 749ded1be4aSJoseph T Handzik return -ENODEV; 750ded1be4aSJoseph T Handzik } 751ded1be4aSJoseph T Handzik sas_address = hdev->sas_address; 752ded1be4aSJoseph T Handzik spin_unlock_irqrestore(&h->lock, flags); 753ded1be4aSJoseph T Handzik 754ded1be4aSJoseph T Handzik return snprintf(buf, PAGE_SIZE, "0x%016llx\n", sas_address); 755ded1be4aSJoseph T Handzik } 756ded1be4aSJoseph T Handzik 757c1988684SScott Teel static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev, 758c1988684SScott Teel struct device_attribute *attr, char *buf) 759c1988684SScott Teel { 760c1988684SScott Teel struct ctlr_info *h; 761c1988684SScott Teel struct scsi_device *sdev; 762c1988684SScott Teel struct hpsa_scsi_dev_t *hdev; 763c1988684SScott Teel unsigned long flags; 764c1988684SScott Teel int offload_enabled; 765c1988684SScott Teel 766c1988684SScott Teel sdev = to_scsi_device(dev); 767c1988684SScott Teel h = sdev_to_hba(sdev); 768c1988684SScott Teel spin_lock_irqsave(&h->lock, flags); 769c1988684SScott Teel hdev = sdev->hostdata; 770c1988684SScott Teel if (!hdev) { 771c1988684SScott Teel spin_unlock_irqrestore(&h->lock, flags); 772c1988684SScott Teel return -ENODEV; 773c1988684SScott Teel } 774c1988684SScott Teel offload_enabled = hdev->offload_enabled; 775c1988684SScott Teel spin_unlock_irqrestore(&h->lock, flags); 776c1988684SScott Teel return snprintf(buf, 20, "%d\n", offload_enabled); 777c1988684SScott Teel } 778c1988684SScott Teel 7798270b862SJoe Handzik #define MAX_PATHS 8 7808270b862SJoe Handzik static ssize_t path_info_show(struct device *dev, 7818270b862SJoe Handzik struct device_attribute *attr, char *buf) 7828270b862SJoe Handzik { 7838270b862SJoe Handzik struct ctlr_info *h; 7848270b862SJoe Handzik struct scsi_device *sdev; 7858270b862SJoe Handzik struct hpsa_scsi_dev_t *hdev; 7868270b862SJoe Handzik unsigned long flags; 7878270b862SJoe Handzik int i; 7888270b862SJoe Handzik int output_len = 0; 7898270b862SJoe Handzik u8 box; 7908270b862SJoe Handzik u8 bay; 7918270b862SJoe Handzik u8 path_map_index = 0; 7928270b862SJoe Handzik char *active; 7938270b862SJoe Handzik unsigned char phys_connector[2]; 7948270b862SJoe Handzik 7958270b862SJoe Handzik sdev = to_scsi_device(dev); 7968270b862SJoe Handzik h = sdev_to_hba(sdev); 7978270b862SJoe Handzik spin_lock_irqsave(&h->devlock, flags); 7988270b862SJoe Handzik hdev = sdev->hostdata; 7998270b862SJoe Handzik if (!hdev) { 8008270b862SJoe Handzik spin_unlock_irqrestore(&h->devlock, flags); 8018270b862SJoe Handzik return -ENODEV; 8028270b862SJoe Handzik } 8038270b862SJoe Handzik 8048270b862SJoe Handzik bay = hdev->bay; 8058270b862SJoe Handzik for (i = 0; i < MAX_PATHS; i++) { 8068270b862SJoe Handzik path_map_index = 1<<i; 8078270b862SJoe Handzik if (i == hdev->active_path_index) 8088270b862SJoe Handzik active = "Active"; 8098270b862SJoe Handzik else if (hdev->path_map & path_map_index) 8108270b862SJoe Handzik active = "Inactive"; 8118270b862SJoe Handzik else 8128270b862SJoe Handzik continue; 8138270b862SJoe Handzik 8141faf072cSRasmus Villemoes output_len += scnprintf(buf + output_len, 8151faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8161faf072cSRasmus Villemoes "[%d:%d:%d:%d] %20.20s ", 8178270b862SJoe Handzik h->scsi_host->host_no, 8188270b862SJoe Handzik hdev->bus, hdev->target, hdev->lun, 8198270b862SJoe Handzik scsi_device_type(hdev->devtype)); 8208270b862SJoe Handzik 821cca8f13bSDon Brace if (hdev->devtype == TYPE_RAID || is_logical_device(hdev)) { 8222708f295SDon Brace output_len += scnprintf(buf + output_len, 8231faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8241faf072cSRasmus Villemoes "%s\n", active); 8258270b862SJoe Handzik continue; 8268270b862SJoe Handzik } 8278270b862SJoe Handzik 8288270b862SJoe Handzik box = hdev->box[i]; 8298270b862SJoe Handzik memcpy(&phys_connector, &hdev->phys_connector[i], 8308270b862SJoe Handzik sizeof(phys_connector)); 8318270b862SJoe Handzik if (phys_connector[0] < '0') 8328270b862SJoe Handzik phys_connector[0] = '0'; 8338270b862SJoe Handzik if (phys_connector[1] < '0') 8348270b862SJoe Handzik phys_connector[1] = '0'; 8352708f295SDon Brace output_len += scnprintf(buf + output_len, 8361faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8378270b862SJoe Handzik "PORT: %.2s ", 8388270b862SJoe Handzik phys_connector); 839af15ed36SDon Brace if ((hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC) && 840af15ed36SDon Brace hdev->expose_device) { 8418270b862SJoe Handzik if (box == 0 || box == 0xFF) { 8422708f295SDon Brace output_len += scnprintf(buf + output_len, 8431faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8448270b862SJoe Handzik "BAY: %hhu %s\n", 8458270b862SJoe Handzik bay, active); 8468270b862SJoe Handzik } else { 8472708f295SDon Brace output_len += scnprintf(buf + output_len, 8481faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8498270b862SJoe Handzik "BOX: %hhu BAY: %hhu %s\n", 8508270b862SJoe Handzik box, bay, active); 8518270b862SJoe Handzik } 8528270b862SJoe Handzik } else if (box != 0 && box != 0xFF) { 8532708f295SDon Brace output_len += scnprintf(buf + output_len, 8541faf072cSRasmus Villemoes PAGE_SIZE - output_len, "BOX: %hhu %s\n", 8558270b862SJoe Handzik box, active); 8568270b862SJoe Handzik } else 8572708f295SDon Brace output_len += scnprintf(buf + output_len, 8581faf072cSRasmus Villemoes PAGE_SIZE - output_len, "%s\n", active); 8598270b862SJoe Handzik } 8608270b862SJoe Handzik 8618270b862SJoe Handzik spin_unlock_irqrestore(&h->devlock, flags); 8621faf072cSRasmus Villemoes return output_len; 8638270b862SJoe Handzik } 8648270b862SJoe Handzik 8653f5eac3aSStephen M. Cameron static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL); 8663f5eac3aSStephen M. Cameron static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL); 8673f5eac3aSStephen M. Cameron static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL); 8683f5eac3aSStephen M. Cameron static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan); 869ded1be4aSJoseph T Handzik static DEVICE_ATTR(sas_address, S_IRUGO, sas_address_show, NULL); 870c1988684SScott Teel static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO, 871c1988684SScott Teel host_show_hp_ssd_smart_path_enabled, NULL); 8728270b862SJoe Handzik static DEVICE_ATTR(path_info, S_IRUGO, path_info_show, NULL); 873da0697bdSScott Teel static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH, 874da0697bdSScott Teel host_show_hp_ssd_smart_path_status, 875da0697bdSScott Teel host_store_hp_ssd_smart_path_status); 8762ba8bfc8SStephen M. Cameron static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL, 8772ba8bfc8SStephen M. Cameron host_store_raid_offload_debug); 8783f5eac3aSStephen M. Cameron static DEVICE_ATTR(firmware_revision, S_IRUGO, 8793f5eac3aSStephen M. Cameron host_show_firmware_revision, NULL); 8803f5eac3aSStephen M. Cameron static DEVICE_ATTR(commands_outstanding, S_IRUGO, 8813f5eac3aSStephen M. Cameron host_show_commands_outstanding, NULL); 8823f5eac3aSStephen M. Cameron static DEVICE_ATTR(transport_mode, S_IRUGO, 8833f5eac3aSStephen M. Cameron host_show_transport_mode, NULL); 884941b1cdaSStephen M. Cameron static DEVICE_ATTR(resettable, S_IRUGO, 885941b1cdaSStephen M. Cameron host_show_resettable, NULL); 886e985c58fSStephen Cameron static DEVICE_ATTR(lockup_detected, S_IRUGO, 887e985c58fSStephen Cameron host_show_lockup_detected, NULL); 8883f5eac3aSStephen M. Cameron 8893f5eac3aSStephen M. Cameron static struct device_attribute *hpsa_sdev_attrs[] = { 8903f5eac3aSStephen M. Cameron &dev_attr_raid_level, 8913f5eac3aSStephen M. Cameron &dev_attr_lunid, 8923f5eac3aSStephen M. Cameron &dev_attr_unique_id, 893c1988684SScott Teel &dev_attr_hp_ssd_smart_path_enabled, 8948270b862SJoe Handzik &dev_attr_path_info, 895ded1be4aSJoseph T Handzik &dev_attr_sas_address, 8963f5eac3aSStephen M. Cameron NULL, 8973f5eac3aSStephen M. Cameron }; 8983f5eac3aSStephen M. Cameron 8993f5eac3aSStephen M. Cameron static struct device_attribute *hpsa_shost_attrs[] = { 9003f5eac3aSStephen M. Cameron &dev_attr_rescan, 9013f5eac3aSStephen M. Cameron &dev_attr_firmware_revision, 9023f5eac3aSStephen M. Cameron &dev_attr_commands_outstanding, 9033f5eac3aSStephen M. Cameron &dev_attr_transport_mode, 904941b1cdaSStephen M. Cameron &dev_attr_resettable, 905da0697bdSScott Teel &dev_attr_hp_ssd_smart_path_status, 9062ba8bfc8SStephen M. Cameron &dev_attr_raid_offload_debug, 907fb53c439STomas Henzl &dev_attr_lockup_detected, 9083f5eac3aSStephen M. Cameron NULL, 9093f5eac3aSStephen M. Cameron }; 9103f5eac3aSStephen M. Cameron 91141ce4c35SStephen Cameron #define HPSA_NRESERVED_CMDS (HPSA_CMDS_RESERVED_FOR_ABORTS + \ 91241ce4c35SStephen Cameron HPSA_CMDS_RESERVED_FOR_DRIVER + HPSA_MAX_CONCURRENT_PASSTHRUS) 91341ce4c35SStephen Cameron 9143f5eac3aSStephen M. Cameron static struct scsi_host_template hpsa_driver_template = { 9153f5eac3aSStephen M. Cameron .module = THIS_MODULE, 916f79cfec6SStephen M. Cameron .name = HPSA, 917f79cfec6SStephen M. Cameron .proc_name = HPSA, 9183f5eac3aSStephen M. Cameron .queuecommand = hpsa_scsi_queue_command, 9193f5eac3aSStephen M. Cameron .scan_start = hpsa_scan_start, 9203f5eac3aSStephen M. Cameron .scan_finished = hpsa_scan_finished, 9217c0a0229SDon Brace .change_queue_depth = hpsa_change_queue_depth, 9223f5eac3aSStephen M. Cameron .this_id = -1, 9233f5eac3aSStephen M. Cameron .use_clustering = ENABLE_CLUSTERING, 92475167d2cSStephen M. Cameron .eh_abort_handler = hpsa_eh_abort_handler, 9253f5eac3aSStephen M. Cameron .eh_device_reset_handler = hpsa_eh_device_reset_handler, 9263f5eac3aSStephen M. Cameron .ioctl = hpsa_ioctl, 9273f5eac3aSStephen M. Cameron .slave_alloc = hpsa_slave_alloc, 92841ce4c35SStephen Cameron .slave_configure = hpsa_slave_configure, 9293f5eac3aSStephen M. Cameron .slave_destroy = hpsa_slave_destroy, 9303f5eac3aSStephen M. Cameron #ifdef CONFIG_COMPAT 9313f5eac3aSStephen M. Cameron .compat_ioctl = hpsa_compat_ioctl, 9323f5eac3aSStephen M. Cameron #endif 9333f5eac3aSStephen M. Cameron .sdev_attrs = hpsa_sdev_attrs, 9343f5eac3aSStephen M. Cameron .shost_attrs = hpsa_shost_attrs, 935c0d6a4d1SStephen M. Cameron .max_sectors = 8192, 93654b2b50cSMartin K. Petersen .no_write_same = 1, 9373f5eac3aSStephen M. Cameron }; 9383f5eac3aSStephen M. Cameron 939254f796bSMatt Gates static inline u32 next_command(struct ctlr_info *h, u8 q) 9403f5eac3aSStephen M. Cameron { 9413f5eac3aSStephen M. Cameron u32 a; 942072b0518SStephen M. Cameron struct reply_queue_buffer *rq = &h->reply_queue[q]; 9433f5eac3aSStephen M. Cameron 944e1f7de0cSMatt Gates if (h->transMethod & CFGTBL_Trans_io_accel1) 945e1f7de0cSMatt Gates return h->access.command_completed(h, q); 946e1f7de0cSMatt Gates 9473f5eac3aSStephen M. Cameron if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant))) 948254f796bSMatt Gates return h->access.command_completed(h, q); 9493f5eac3aSStephen M. Cameron 950254f796bSMatt Gates if ((rq->head[rq->current_entry] & 1) == rq->wraparound) { 951254f796bSMatt Gates a = rq->head[rq->current_entry]; 952254f796bSMatt Gates rq->current_entry++; 9530cbf768eSStephen M. Cameron atomic_dec(&h->commands_outstanding); 9543f5eac3aSStephen M. Cameron } else { 9553f5eac3aSStephen M. Cameron a = FIFO_EMPTY; 9563f5eac3aSStephen M. Cameron } 9573f5eac3aSStephen M. Cameron /* Check for wraparound */ 958254f796bSMatt Gates if (rq->current_entry == h->max_commands) { 959254f796bSMatt Gates rq->current_entry = 0; 960254f796bSMatt Gates rq->wraparound ^= 1; 9613f5eac3aSStephen M. Cameron } 9623f5eac3aSStephen M. Cameron return a; 9633f5eac3aSStephen M. Cameron } 9643f5eac3aSStephen M. Cameron 965c349775eSScott Teel /* 966c349775eSScott Teel * There are some special bits in the bus address of the 967c349775eSScott Teel * command that we have to set for the controller to know 968c349775eSScott Teel * how to process the command: 969c349775eSScott Teel * 970c349775eSScott Teel * Normal performant mode: 971c349775eSScott Teel * bit 0: 1 means performant mode, 0 means simple mode. 972c349775eSScott Teel * bits 1-3 = block fetch table entry 973c349775eSScott Teel * bits 4-6 = command type (== 0) 974c349775eSScott Teel * 975c349775eSScott Teel * ioaccel1 mode: 976c349775eSScott Teel * bit 0 = "performant mode" bit. 977c349775eSScott Teel * bits 1-3 = block fetch table entry 978c349775eSScott Teel * bits 4-6 = command type (== 110) 979c349775eSScott Teel * (command type is needed because ioaccel1 mode 980c349775eSScott Teel * commands are submitted through the same register as normal 981c349775eSScott Teel * mode commands, so this is how the controller knows whether 982c349775eSScott Teel * the command is normal mode or ioaccel1 mode.) 983c349775eSScott Teel * 984c349775eSScott Teel * ioaccel2 mode: 985c349775eSScott Teel * bit 0 = "performant mode" bit. 986c349775eSScott Teel * bits 1-4 = block fetch table entry (note extra bit) 987c349775eSScott Teel * bits 4-6 = not needed, because ioaccel2 mode has 988c349775eSScott Teel * a separate special register for submitting commands. 989c349775eSScott Teel */ 990c349775eSScott Teel 99125163bd5SWebb Scales /* 99225163bd5SWebb Scales * set_performant_mode: Modify the tag for cciss performant 9933f5eac3aSStephen M. Cameron * set bit 0 for pull model, bits 3-1 for block fetch 9943f5eac3aSStephen M. Cameron * register number 9953f5eac3aSStephen M. Cameron */ 99625163bd5SWebb Scales #define DEFAULT_REPLY_QUEUE (-1) 99725163bd5SWebb Scales static void set_performant_mode(struct ctlr_info *h, struct CommandList *c, 99825163bd5SWebb Scales int reply_queue) 9993f5eac3aSStephen M. Cameron { 1000254f796bSMatt Gates if (likely(h->transMethod & CFGTBL_Trans_Performant)) { 10013f5eac3aSStephen M. Cameron c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1); 100225163bd5SWebb Scales if (unlikely(!h->msix_vector)) 100325163bd5SWebb Scales return; 100425163bd5SWebb Scales if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1005254f796bSMatt Gates c->Header.ReplyQueue = 1006804a5cb5SJohn Kacur raw_smp_processor_id() % h->nreply_queues; 100725163bd5SWebb Scales else 100825163bd5SWebb Scales c->Header.ReplyQueue = reply_queue % h->nreply_queues; 1009254f796bSMatt Gates } 10103f5eac3aSStephen M. Cameron } 10113f5eac3aSStephen M. Cameron 1012c349775eSScott Teel static void set_ioaccel1_performant_mode(struct ctlr_info *h, 101325163bd5SWebb Scales struct CommandList *c, 101425163bd5SWebb Scales int reply_queue) 1015c349775eSScott Teel { 1016c349775eSScott Teel struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex]; 1017c349775eSScott Teel 101825163bd5SWebb Scales /* 101925163bd5SWebb Scales * Tell the controller to post the reply to the queue for this 1020c349775eSScott Teel * processor. This seems to give the best I/O throughput. 1021c349775eSScott Teel */ 102225163bd5SWebb Scales if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1023c349775eSScott Teel cp->ReplyQueue = smp_processor_id() % h->nreply_queues; 102425163bd5SWebb Scales else 102525163bd5SWebb Scales cp->ReplyQueue = reply_queue % h->nreply_queues; 102625163bd5SWebb Scales /* 102725163bd5SWebb Scales * Set the bits in the address sent down to include: 1028c349775eSScott Teel * - performant mode bit (bit 0) 1029c349775eSScott Teel * - pull count (bits 1-3) 1030c349775eSScott Teel * - command type (bits 4-6) 1031c349775eSScott Teel */ 1032c349775eSScott Teel c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) | 1033c349775eSScott Teel IOACCEL1_BUSADDR_CMDTYPE; 1034c349775eSScott Teel } 1035c349775eSScott Teel 10368be986ccSStephen Cameron static void set_ioaccel2_tmf_performant_mode(struct ctlr_info *h, 10378be986ccSStephen Cameron struct CommandList *c, 10388be986ccSStephen Cameron int reply_queue) 10398be986ccSStephen Cameron { 10408be986ccSStephen Cameron struct hpsa_tmf_struct *cp = (struct hpsa_tmf_struct *) 10418be986ccSStephen Cameron &h->ioaccel2_cmd_pool[c->cmdindex]; 10428be986ccSStephen Cameron 10438be986ccSStephen Cameron /* Tell the controller to post the reply to the queue for this 10448be986ccSStephen Cameron * processor. This seems to give the best I/O throughput. 10458be986ccSStephen Cameron */ 10468be986ccSStephen Cameron if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 10478be986ccSStephen Cameron cp->reply_queue = smp_processor_id() % h->nreply_queues; 10488be986ccSStephen Cameron else 10498be986ccSStephen Cameron cp->reply_queue = reply_queue % h->nreply_queues; 10508be986ccSStephen Cameron /* Set the bits in the address sent down to include: 10518be986ccSStephen Cameron * - performant mode bit not used in ioaccel mode 2 10528be986ccSStephen Cameron * - pull count (bits 0-3) 10538be986ccSStephen Cameron * - command type isn't needed for ioaccel2 10548be986ccSStephen Cameron */ 10558be986ccSStephen Cameron c->busaddr |= h->ioaccel2_blockFetchTable[0]; 10568be986ccSStephen Cameron } 10578be986ccSStephen Cameron 1058c349775eSScott Teel static void set_ioaccel2_performant_mode(struct ctlr_info *h, 105925163bd5SWebb Scales struct CommandList *c, 106025163bd5SWebb Scales int reply_queue) 1061c349775eSScott Teel { 1062c349775eSScott Teel struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex]; 1063c349775eSScott Teel 106425163bd5SWebb Scales /* 106525163bd5SWebb Scales * Tell the controller to post the reply to the queue for this 1066c349775eSScott Teel * processor. This seems to give the best I/O throughput. 1067c349775eSScott Teel */ 106825163bd5SWebb Scales if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1069c349775eSScott Teel cp->reply_queue = smp_processor_id() % h->nreply_queues; 107025163bd5SWebb Scales else 107125163bd5SWebb Scales cp->reply_queue = reply_queue % h->nreply_queues; 107225163bd5SWebb Scales /* 107325163bd5SWebb Scales * Set the bits in the address sent down to include: 1074c349775eSScott Teel * - performant mode bit not used in ioaccel mode 2 1075c349775eSScott Teel * - pull count (bits 0-3) 1076c349775eSScott Teel * - command type isn't needed for ioaccel2 1077c349775eSScott Teel */ 1078c349775eSScott Teel c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]); 1079c349775eSScott Teel } 1080c349775eSScott Teel 1081e85c5974SStephen M. Cameron static int is_firmware_flash_cmd(u8 *cdb) 1082e85c5974SStephen M. Cameron { 1083e85c5974SStephen M. Cameron return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE; 1084e85c5974SStephen M. Cameron } 1085e85c5974SStephen M. Cameron 1086e85c5974SStephen M. Cameron /* 1087e85c5974SStephen M. Cameron * During firmware flash, the heartbeat register may not update as frequently 1088e85c5974SStephen M. Cameron * as it should. So we dial down lockup detection during firmware flash. and 1089e85c5974SStephen M. Cameron * dial it back up when firmware flash completes. 1090e85c5974SStephen M. Cameron */ 1091e85c5974SStephen M. Cameron #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ) 1092e85c5974SStephen M. Cameron #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ) 1093e85c5974SStephen M. Cameron static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h, 1094e85c5974SStephen M. Cameron struct CommandList *c) 1095e85c5974SStephen M. Cameron { 1096e85c5974SStephen M. Cameron if (!is_firmware_flash_cmd(c->Request.CDB)) 1097e85c5974SStephen M. Cameron return; 1098e85c5974SStephen M. Cameron atomic_inc(&h->firmware_flash_in_progress); 1099e85c5974SStephen M. Cameron h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH; 1100e85c5974SStephen M. Cameron } 1101e85c5974SStephen M. Cameron 1102e85c5974SStephen M. Cameron static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h, 1103e85c5974SStephen M. Cameron struct CommandList *c) 1104e85c5974SStephen M. Cameron { 1105e85c5974SStephen M. Cameron if (is_firmware_flash_cmd(c->Request.CDB) && 1106e85c5974SStephen M. Cameron atomic_dec_and_test(&h->firmware_flash_in_progress)) 1107e85c5974SStephen M. Cameron h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 1108e85c5974SStephen M. Cameron } 1109e85c5974SStephen M. Cameron 111025163bd5SWebb Scales static void __enqueue_cmd_and_start_io(struct ctlr_info *h, 111125163bd5SWebb Scales struct CommandList *c, int reply_queue) 11123f5eac3aSStephen M. Cameron { 1113c05e8866SStephen Cameron dial_down_lockup_detection_during_fw_flash(h, c); 1114c05e8866SStephen Cameron atomic_inc(&h->commands_outstanding); 1115c349775eSScott Teel switch (c->cmd_type) { 1116c349775eSScott Teel case CMD_IOACCEL1: 111725163bd5SWebb Scales set_ioaccel1_performant_mode(h, c, reply_queue); 1118c05e8866SStephen Cameron writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET); 1119c349775eSScott Teel break; 1120c349775eSScott Teel case CMD_IOACCEL2: 112125163bd5SWebb Scales set_ioaccel2_performant_mode(h, c, reply_queue); 1122c05e8866SStephen Cameron writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32); 1123c349775eSScott Teel break; 11248be986ccSStephen Cameron case IOACCEL2_TMF: 11258be986ccSStephen Cameron set_ioaccel2_tmf_performant_mode(h, c, reply_queue); 11268be986ccSStephen Cameron writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32); 11278be986ccSStephen Cameron break; 1128c349775eSScott Teel default: 112925163bd5SWebb Scales set_performant_mode(h, c, reply_queue); 1130f2405db8SDon Brace h->access.submit_command(h, c); 11313f5eac3aSStephen M. Cameron } 1132c05e8866SStephen Cameron } 11333f5eac3aSStephen M. Cameron 1134a58e7e53SWebb Scales static void enqueue_cmd_and_start_io(struct ctlr_info *h, struct CommandList *c) 113525163bd5SWebb Scales { 1136d604f533SWebb Scales if (unlikely(hpsa_is_pending_event(c))) 1137a58e7e53SWebb Scales return finish_cmd(c); 1138a58e7e53SWebb Scales 113925163bd5SWebb Scales __enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE); 114025163bd5SWebb Scales } 114125163bd5SWebb Scales 11423f5eac3aSStephen M. Cameron static inline int is_hba_lunid(unsigned char scsi3addr[]) 11433f5eac3aSStephen M. Cameron { 11443f5eac3aSStephen M. Cameron return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0; 11453f5eac3aSStephen M. Cameron } 11463f5eac3aSStephen M. Cameron 11473f5eac3aSStephen M. Cameron static inline int is_scsi_rev_5(struct ctlr_info *h) 11483f5eac3aSStephen M. Cameron { 11493f5eac3aSStephen M. Cameron if (!h->hba_inquiry_data) 11503f5eac3aSStephen M. Cameron return 0; 11513f5eac3aSStephen M. Cameron if ((h->hba_inquiry_data[2] & 0x07) == 5) 11523f5eac3aSStephen M. Cameron return 1; 11533f5eac3aSStephen M. Cameron return 0; 11543f5eac3aSStephen M. Cameron } 11553f5eac3aSStephen M. Cameron 1156edd16368SStephen M. Cameron static int hpsa_find_target_lun(struct ctlr_info *h, 1157edd16368SStephen M. Cameron unsigned char scsi3addr[], int bus, int *target, int *lun) 1158edd16368SStephen M. Cameron { 1159edd16368SStephen M. Cameron /* finds an unused bus, target, lun for a new physical device 1160edd16368SStephen M. Cameron * assumes h->devlock is held 1161edd16368SStephen M. Cameron */ 1162edd16368SStephen M. Cameron int i, found = 0; 1163cfe5badcSScott Teel DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES); 1164edd16368SStephen M. Cameron 1165263d9401SAkinobu Mita bitmap_zero(lun_taken, HPSA_MAX_DEVICES); 1166edd16368SStephen M. Cameron 1167edd16368SStephen M. Cameron for (i = 0; i < h->ndevices; i++) { 1168edd16368SStephen M. Cameron if (h->dev[i]->bus == bus && h->dev[i]->target != -1) 1169263d9401SAkinobu Mita __set_bit(h->dev[i]->target, lun_taken); 1170edd16368SStephen M. Cameron } 1171edd16368SStephen M. Cameron 1172263d9401SAkinobu Mita i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES); 1173263d9401SAkinobu Mita if (i < HPSA_MAX_DEVICES) { 1174edd16368SStephen M. Cameron /* *bus = 1; */ 1175edd16368SStephen M. Cameron *target = i; 1176edd16368SStephen M. Cameron *lun = 0; 1177edd16368SStephen M. Cameron found = 1; 1178edd16368SStephen M. Cameron } 1179edd16368SStephen M. Cameron return !found; 1180edd16368SStephen M. Cameron } 1181edd16368SStephen M. Cameron 11821d33d85dSDon Brace static void hpsa_show_dev_msg(const char *level, struct ctlr_info *h, 11830d96ef5fSWebb Scales struct hpsa_scsi_dev_t *dev, char *description) 11840d96ef5fSWebb Scales { 11857c59a0d4SDon Brace #define LABEL_SIZE 25 11867c59a0d4SDon Brace char label[LABEL_SIZE]; 11877c59a0d4SDon Brace 11889975ec9dSDon Brace if (h == NULL || h->pdev == NULL || h->scsi_host == NULL) 11899975ec9dSDon Brace return; 11909975ec9dSDon Brace 11917c59a0d4SDon Brace switch (dev->devtype) { 11927c59a0d4SDon Brace case TYPE_RAID: 11937c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "controller"); 11947c59a0d4SDon Brace break; 11957c59a0d4SDon Brace case TYPE_ENCLOSURE: 11967c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "enclosure"); 11977c59a0d4SDon Brace break; 11987c59a0d4SDon Brace case TYPE_DISK: 1199af15ed36SDon Brace case TYPE_ZBC: 12007c59a0d4SDon Brace if (dev->external) 12017c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "external"); 12027c59a0d4SDon Brace else if (!is_logical_dev_addr_mode(dev->scsi3addr)) 12037c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "%s", 12047c59a0d4SDon Brace raid_label[PHYSICAL_DRIVE]); 12057c59a0d4SDon Brace else 12067c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "RAID-%s", 12077c59a0d4SDon Brace dev->raid_level > RAID_UNKNOWN ? "?" : 12087c59a0d4SDon Brace raid_label[dev->raid_level]); 12097c59a0d4SDon Brace break; 12107c59a0d4SDon Brace case TYPE_ROM: 12117c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "rom"); 12127c59a0d4SDon Brace break; 12137c59a0d4SDon Brace case TYPE_TAPE: 12147c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "tape"); 12157c59a0d4SDon Brace break; 12167c59a0d4SDon Brace case TYPE_MEDIUM_CHANGER: 12177c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "changer"); 12187c59a0d4SDon Brace break; 12197c59a0d4SDon Brace default: 12207c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "UNKNOWN"); 12217c59a0d4SDon Brace break; 12227c59a0d4SDon Brace } 12237c59a0d4SDon Brace 12240d96ef5fSWebb Scales dev_printk(level, &h->pdev->dev, 12257c59a0d4SDon Brace "scsi %d:%d:%d:%d: %s %s %.8s %.16s %s SSDSmartPathCap%c En%c Exp=%d\n", 12260d96ef5fSWebb Scales h->scsi_host->host_no, dev->bus, dev->target, dev->lun, 12270d96ef5fSWebb Scales description, 12280d96ef5fSWebb Scales scsi_device_type(dev->devtype), 12290d96ef5fSWebb Scales dev->vendor, 12300d96ef5fSWebb Scales dev->model, 12317c59a0d4SDon Brace label, 12320d96ef5fSWebb Scales dev->offload_config ? '+' : '-', 12330d96ef5fSWebb Scales dev->offload_enabled ? '+' : '-', 12342a168208SKevin Barnett dev->expose_device); 12350d96ef5fSWebb Scales } 12360d96ef5fSWebb Scales 1237edd16368SStephen M. Cameron /* Add an entry into h->dev[] array. */ 12388aa60681SDon Brace static int hpsa_scsi_add_entry(struct ctlr_info *h, 1239edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *device, 1240edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *added[], int *nadded) 1241edd16368SStephen M. Cameron { 1242edd16368SStephen M. Cameron /* assumes h->devlock is held */ 1243edd16368SStephen M. Cameron int n = h->ndevices; 1244edd16368SStephen M. Cameron int i; 1245edd16368SStephen M. Cameron unsigned char addr1[8], addr2[8]; 1246edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd; 1247edd16368SStephen M. Cameron 1248cfe5badcSScott Teel if (n >= HPSA_MAX_DEVICES) { 1249edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "too many devices, some will be " 1250edd16368SStephen M. Cameron "inaccessible.\n"); 1251edd16368SStephen M. Cameron return -1; 1252edd16368SStephen M. Cameron } 1253edd16368SStephen M. Cameron 1254edd16368SStephen M. Cameron /* physical devices do not have lun or target assigned until now. */ 1255edd16368SStephen M. Cameron if (device->lun != -1) 1256edd16368SStephen M. Cameron /* Logical device, lun is already assigned. */ 1257edd16368SStephen M. Cameron goto lun_assigned; 1258edd16368SStephen M. Cameron 1259edd16368SStephen M. Cameron /* If this device a non-zero lun of a multi-lun device 1260edd16368SStephen M. Cameron * byte 4 of the 8-byte LUN addr will contain the logical 12612b08b3e9SDon Brace * unit no, zero otherwise. 1262edd16368SStephen M. Cameron */ 1263edd16368SStephen M. Cameron if (device->scsi3addr[4] == 0) { 1264edd16368SStephen M. Cameron /* This is not a non-zero lun of a multi-lun device */ 1265edd16368SStephen M. Cameron if (hpsa_find_target_lun(h, device->scsi3addr, 1266edd16368SStephen M. Cameron device->bus, &device->target, &device->lun) != 0) 1267edd16368SStephen M. Cameron return -1; 1268edd16368SStephen M. Cameron goto lun_assigned; 1269edd16368SStephen M. Cameron } 1270edd16368SStephen M. Cameron 1271edd16368SStephen M. Cameron /* This is a non-zero lun of a multi-lun device. 1272edd16368SStephen M. Cameron * Search through our list and find the device which 12739a4178b7Sshane.seymour * has the same 8 byte LUN address, excepting byte 4 and 5. 1274edd16368SStephen M. Cameron * Assign the same bus and target for this new LUN. 1275edd16368SStephen M. Cameron * Use the logical unit number from the firmware. 1276edd16368SStephen M. Cameron */ 1277edd16368SStephen M. Cameron memcpy(addr1, device->scsi3addr, 8); 1278edd16368SStephen M. Cameron addr1[4] = 0; 12799a4178b7Sshane.seymour addr1[5] = 0; 1280edd16368SStephen M. Cameron for (i = 0; i < n; i++) { 1281edd16368SStephen M. Cameron sd = h->dev[i]; 1282edd16368SStephen M. Cameron memcpy(addr2, sd->scsi3addr, 8); 1283edd16368SStephen M. Cameron addr2[4] = 0; 12849a4178b7Sshane.seymour addr2[5] = 0; 12859a4178b7Sshane.seymour /* differ only in byte 4 and 5? */ 1286edd16368SStephen M. Cameron if (memcmp(addr1, addr2, 8) == 0) { 1287edd16368SStephen M. Cameron device->bus = sd->bus; 1288edd16368SStephen M. Cameron device->target = sd->target; 1289edd16368SStephen M. Cameron device->lun = device->scsi3addr[4]; 1290edd16368SStephen M. Cameron break; 1291edd16368SStephen M. Cameron } 1292edd16368SStephen M. Cameron } 1293edd16368SStephen M. Cameron if (device->lun == -1) { 1294edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "physical device with no LUN=0," 1295edd16368SStephen M. Cameron " suspect firmware bug or unsupported hardware " 1296edd16368SStephen M. Cameron "configuration.\n"); 1297edd16368SStephen M. Cameron return -1; 1298edd16368SStephen M. Cameron } 1299edd16368SStephen M. Cameron 1300edd16368SStephen M. Cameron lun_assigned: 1301edd16368SStephen M. Cameron 1302edd16368SStephen M. Cameron h->dev[n] = device; 1303edd16368SStephen M. Cameron h->ndevices++; 1304edd16368SStephen M. Cameron added[*nadded] = device; 1305edd16368SStephen M. Cameron (*nadded)++; 13060d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, device, 13072a168208SKevin Barnett device->expose_device ? "added" : "masked"); 1308a473d86cSRobert Elliott device->offload_to_be_enabled = device->offload_enabled; 1309a473d86cSRobert Elliott device->offload_enabled = 0; 1310edd16368SStephen M. Cameron return 0; 1311edd16368SStephen M. Cameron } 1312edd16368SStephen M. Cameron 1313bd9244f7SScott Teel /* Update an entry in h->dev[] array. */ 13148aa60681SDon Brace static void hpsa_scsi_update_entry(struct ctlr_info *h, 1315bd9244f7SScott Teel int entry, struct hpsa_scsi_dev_t *new_entry) 1316bd9244f7SScott Teel { 1317a473d86cSRobert Elliott int offload_enabled; 1318bd9244f7SScott Teel /* assumes h->devlock is held */ 1319bd9244f7SScott Teel BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1320bd9244f7SScott Teel 1321bd9244f7SScott Teel /* Raid level changed. */ 1322bd9244f7SScott Teel h->dev[entry]->raid_level = new_entry->raid_level; 1323250fb125SStephen M. Cameron 132403383736SDon Brace /* Raid offload parameters changed. Careful about the ordering. */ 132503383736SDon Brace if (new_entry->offload_config && new_entry->offload_enabled) { 132603383736SDon Brace /* 132703383736SDon Brace * if drive is newly offload_enabled, we want to copy the 132803383736SDon Brace * raid map data first. If previously offload_enabled and 132903383736SDon Brace * offload_config were set, raid map data had better be 133003383736SDon Brace * the same as it was before. if raid map data is changed 133103383736SDon Brace * then it had better be the case that 133203383736SDon Brace * h->dev[entry]->offload_enabled is currently 0. 133303383736SDon Brace */ 13349fb0de2dSStephen M. Cameron h->dev[entry]->raid_map = new_entry->raid_map; 133503383736SDon Brace h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 133603383736SDon Brace } 1337a3144e0bSJoe Handzik if (new_entry->hba_ioaccel_enabled) { 1338a3144e0bSJoe Handzik h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 1339a3144e0bSJoe Handzik wmb(); /* set ioaccel_handle *before* hba_ioaccel_enabled */ 1340a3144e0bSJoe Handzik } 1341a3144e0bSJoe Handzik h->dev[entry]->hba_ioaccel_enabled = new_entry->hba_ioaccel_enabled; 134203383736SDon Brace h->dev[entry]->offload_config = new_entry->offload_config; 134303383736SDon Brace h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror; 134403383736SDon Brace h->dev[entry]->queue_depth = new_entry->queue_depth; 1345250fb125SStephen M. Cameron 134641ce4c35SStephen Cameron /* 134741ce4c35SStephen Cameron * We can turn off ioaccel offload now, but need to delay turning 134841ce4c35SStephen Cameron * it on until we can update h->dev[entry]->phys_disk[], but we 134941ce4c35SStephen Cameron * can't do that until all the devices are updated. 135041ce4c35SStephen Cameron */ 135141ce4c35SStephen Cameron h->dev[entry]->offload_to_be_enabled = new_entry->offload_enabled; 135241ce4c35SStephen Cameron if (!new_entry->offload_enabled) 135341ce4c35SStephen Cameron h->dev[entry]->offload_enabled = 0; 135441ce4c35SStephen Cameron 1355a473d86cSRobert Elliott offload_enabled = h->dev[entry]->offload_enabled; 1356a473d86cSRobert Elliott h->dev[entry]->offload_enabled = h->dev[entry]->offload_to_be_enabled; 13570d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated"); 1358a473d86cSRobert Elliott h->dev[entry]->offload_enabled = offload_enabled; 1359bd9244f7SScott Teel } 1360bd9244f7SScott Teel 13612a8ccf31SStephen M. Cameron /* Replace an entry from h->dev[] array. */ 13628aa60681SDon Brace static void hpsa_scsi_replace_entry(struct ctlr_info *h, 13632a8ccf31SStephen M. Cameron int entry, struct hpsa_scsi_dev_t *new_entry, 13642a8ccf31SStephen M. Cameron struct hpsa_scsi_dev_t *added[], int *nadded, 13652a8ccf31SStephen M. Cameron struct hpsa_scsi_dev_t *removed[], int *nremoved) 13662a8ccf31SStephen M. Cameron { 13672a8ccf31SStephen M. Cameron /* assumes h->devlock is held */ 1368cfe5badcSScott Teel BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 13692a8ccf31SStephen M. Cameron removed[*nremoved] = h->dev[entry]; 13702a8ccf31SStephen M. Cameron (*nremoved)++; 137101350d05SStephen M. Cameron 137201350d05SStephen M. Cameron /* 137301350d05SStephen M. Cameron * New physical devices won't have target/lun assigned yet 137401350d05SStephen M. Cameron * so we need to preserve the values in the slot we are replacing. 137501350d05SStephen M. Cameron */ 137601350d05SStephen M. Cameron if (new_entry->target == -1) { 137701350d05SStephen M. Cameron new_entry->target = h->dev[entry]->target; 137801350d05SStephen M. Cameron new_entry->lun = h->dev[entry]->lun; 137901350d05SStephen M. Cameron } 138001350d05SStephen M. Cameron 13812a8ccf31SStephen M. Cameron h->dev[entry] = new_entry; 13822a8ccf31SStephen M. Cameron added[*nadded] = new_entry; 13832a8ccf31SStephen M. Cameron (*nadded)++; 13840d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced"); 1385a473d86cSRobert Elliott new_entry->offload_to_be_enabled = new_entry->offload_enabled; 1386a473d86cSRobert Elliott new_entry->offload_enabled = 0; 13872a8ccf31SStephen M. Cameron } 13882a8ccf31SStephen M. Cameron 1389edd16368SStephen M. Cameron /* Remove an entry from h->dev[] array. */ 13908aa60681SDon Brace static void hpsa_scsi_remove_entry(struct ctlr_info *h, int entry, 1391edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *removed[], int *nremoved) 1392edd16368SStephen M. Cameron { 1393edd16368SStephen M. Cameron /* assumes h->devlock is held */ 1394edd16368SStephen M. Cameron int i; 1395edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd; 1396edd16368SStephen M. Cameron 1397cfe5badcSScott Teel BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1398edd16368SStephen M. Cameron 1399edd16368SStephen M. Cameron sd = h->dev[entry]; 1400edd16368SStephen M. Cameron removed[*nremoved] = h->dev[entry]; 1401edd16368SStephen M. Cameron (*nremoved)++; 1402edd16368SStephen M. Cameron 1403edd16368SStephen M. Cameron for (i = entry; i < h->ndevices-1; i++) 1404edd16368SStephen M. Cameron h->dev[i] = h->dev[i+1]; 1405edd16368SStephen M. Cameron h->ndevices--; 14060d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, sd, "removed"); 1407edd16368SStephen M. Cameron } 1408edd16368SStephen M. Cameron 1409edd16368SStephen M. Cameron #define SCSI3ADDR_EQ(a, b) ( \ 1410edd16368SStephen M. Cameron (a)[7] == (b)[7] && \ 1411edd16368SStephen M. Cameron (a)[6] == (b)[6] && \ 1412edd16368SStephen M. Cameron (a)[5] == (b)[5] && \ 1413edd16368SStephen M. Cameron (a)[4] == (b)[4] && \ 1414edd16368SStephen M. Cameron (a)[3] == (b)[3] && \ 1415edd16368SStephen M. Cameron (a)[2] == (b)[2] && \ 1416edd16368SStephen M. Cameron (a)[1] == (b)[1] && \ 1417edd16368SStephen M. Cameron (a)[0] == (b)[0]) 1418edd16368SStephen M. Cameron 1419edd16368SStephen M. Cameron static void fixup_botched_add(struct ctlr_info *h, 1420edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *added) 1421edd16368SStephen M. Cameron { 1422edd16368SStephen M. Cameron /* called when scsi_add_device fails in order to re-adjust 1423edd16368SStephen M. Cameron * h->dev[] to match the mid layer's view. 1424edd16368SStephen M. Cameron */ 1425edd16368SStephen M. Cameron unsigned long flags; 1426edd16368SStephen M. Cameron int i, j; 1427edd16368SStephen M. Cameron 1428edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 1429edd16368SStephen M. Cameron for (i = 0; i < h->ndevices; i++) { 1430edd16368SStephen M. Cameron if (h->dev[i] == added) { 1431edd16368SStephen M. Cameron for (j = i; j < h->ndevices-1; j++) 1432edd16368SStephen M. Cameron h->dev[j] = h->dev[j+1]; 1433edd16368SStephen M. Cameron h->ndevices--; 1434edd16368SStephen M. Cameron break; 1435edd16368SStephen M. Cameron } 1436edd16368SStephen M. Cameron } 1437edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 1438edd16368SStephen M. Cameron kfree(added); 1439edd16368SStephen M. Cameron } 1440edd16368SStephen M. Cameron 1441edd16368SStephen M. Cameron static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1, 1442edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *dev2) 1443edd16368SStephen M. Cameron { 1444edd16368SStephen M. Cameron /* we compare everything except lun and target as these 1445edd16368SStephen M. Cameron * are not yet assigned. Compare parts likely 1446edd16368SStephen M. Cameron * to differ first 1447edd16368SStephen M. Cameron */ 1448edd16368SStephen M. Cameron if (memcmp(dev1->scsi3addr, dev2->scsi3addr, 1449edd16368SStephen M. Cameron sizeof(dev1->scsi3addr)) != 0) 1450edd16368SStephen M. Cameron return 0; 1451edd16368SStephen M. Cameron if (memcmp(dev1->device_id, dev2->device_id, 1452edd16368SStephen M. Cameron sizeof(dev1->device_id)) != 0) 1453edd16368SStephen M. Cameron return 0; 1454edd16368SStephen M. Cameron if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0) 1455edd16368SStephen M. Cameron return 0; 1456edd16368SStephen M. Cameron if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0) 1457edd16368SStephen M. Cameron return 0; 1458edd16368SStephen M. Cameron if (dev1->devtype != dev2->devtype) 1459edd16368SStephen M. Cameron return 0; 1460edd16368SStephen M. Cameron if (dev1->bus != dev2->bus) 1461edd16368SStephen M. Cameron return 0; 1462edd16368SStephen M. Cameron return 1; 1463edd16368SStephen M. Cameron } 1464edd16368SStephen M. Cameron 1465bd9244f7SScott Teel static inline int device_updated(struct hpsa_scsi_dev_t *dev1, 1466bd9244f7SScott Teel struct hpsa_scsi_dev_t *dev2) 1467bd9244f7SScott Teel { 1468bd9244f7SScott Teel /* Device attributes that can change, but don't mean 1469bd9244f7SScott Teel * that the device is a different device, nor that the OS 1470bd9244f7SScott Teel * needs to be told anything about the change. 1471bd9244f7SScott Teel */ 1472bd9244f7SScott Teel if (dev1->raid_level != dev2->raid_level) 1473bd9244f7SScott Teel return 1; 1474250fb125SStephen M. Cameron if (dev1->offload_config != dev2->offload_config) 1475250fb125SStephen M. Cameron return 1; 1476250fb125SStephen M. Cameron if (dev1->offload_enabled != dev2->offload_enabled) 1477250fb125SStephen M. Cameron return 1; 147893849508SDon Brace if (!is_logical_dev_addr_mode(dev1->scsi3addr)) 147903383736SDon Brace if (dev1->queue_depth != dev2->queue_depth) 148003383736SDon Brace return 1; 1481bd9244f7SScott Teel return 0; 1482bd9244f7SScott Teel } 1483bd9244f7SScott Teel 1484edd16368SStephen M. Cameron /* Find needle in haystack. If exact match found, return DEVICE_SAME, 1485edd16368SStephen M. Cameron * and return needle location in *index. If scsi3addr matches, but not 1486edd16368SStephen M. Cameron * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle 1487bd9244f7SScott Teel * location in *index. 1488bd9244f7SScott Teel * In the case of a minor device attribute change, such as RAID level, just 1489bd9244f7SScott Teel * return DEVICE_UPDATED, along with the updated device's location in index. 1490bd9244f7SScott Teel * If needle not found, return DEVICE_NOT_FOUND. 1491edd16368SStephen M. Cameron */ 1492edd16368SStephen M. Cameron static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle, 1493edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *haystack[], int haystack_size, 1494edd16368SStephen M. Cameron int *index) 1495edd16368SStephen M. Cameron { 1496edd16368SStephen M. Cameron int i; 1497edd16368SStephen M. Cameron #define DEVICE_NOT_FOUND 0 1498edd16368SStephen M. Cameron #define DEVICE_CHANGED 1 1499edd16368SStephen M. Cameron #define DEVICE_SAME 2 1500bd9244f7SScott Teel #define DEVICE_UPDATED 3 15011d33d85dSDon Brace if (needle == NULL) 15021d33d85dSDon Brace return DEVICE_NOT_FOUND; 15031d33d85dSDon Brace 1504edd16368SStephen M. Cameron for (i = 0; i < haystack_size; i++) { 150523231048SStephen M. Cameron if (haystack[i] == NULL) /* previously removed. */ 150623231048SStephen M. Cameron continue; 1507edd16368SStephen M. Cameron if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) { 1508edd16368SStephen M. Cameron *index = i; 1509bd9244f7SScott Teel if (device_is_the_same(needle, haystack[i])) { 1510bd9244f7SScott Teel if (device_updated(needle, haystack[i])) 1511bd9244f7SScott Teel return DEVICE_UPDATED; 1512edd16368SStephen M. Cameron return DEVICE_SAME; 1513bd9244f7SScott Teel } else { 15149846590eSStephen M. Cameron /* Keep offline devices offline */ 15159846590eSStephen M. Cameron if (needle->volume_offline) 15169846590eSStephen M. Cameron return DEVICE_NOT_FOUND; 1517edd16368SStephen M. Cameron return DEVICE_CHANGED; 1518edd16368SStephen M. Cameron } 1519edd16368SStephen M. Cameron } 1520bd9244f7SScott Teel } 1521edd16368SStephen M. Cameron *index = -1; 1522edd16368SStephen M. Cameron return DEVICE_NOT_FOUND; 1523edd16368SStephen M. Cameron } 1524edd16368SStephen M. Cameron 15259846590eSStephen M. Cameron static void hpsa_monitor_offline_device(struct ctlr_info *h, 15269846590eSStephen M. Cameron unsigned char scsi3addr[]) 15279846590eSStephen M. Cameron { 15289846590eSStephen M. Cameron struct offline_device_entry *device; 15299846590eSStephen M. Cameron unsigned long flags; 15309846590eSStephen M. Cameron 15319846590eSStephen M. Cameron /* Check to see if device is already on the list */ 15329846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 15339846590eSStephen M. Cameron list_for_each_entry(device, &h->offline_device_list, offline_list) { 15349846590eSStephen M. Cameron if (memcmp(device->scsi3addr, scsi3addr, 15359846590eSStephen M. Cameron sizeof(device->scsi3addr)) == 0) { 15369846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 15379846590eSStephen M. Cameron return; 15389846590eSStephen M. Cameron } 15399846590eSStephen M. Cameron } 15409846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 15419846590eSStephen M. Cameron 15429846590eSStephen M. Cameron /* Device is not on the list, add it. */ 15439846590eSStephen M. Cameron device = kmalloc(sizeof(*device), GFP_KERNEL); 15449846590eSStephen M. Cameron if (!device) { 15459846590eSStephen M. Cameron dev_warn(&h->pdev->dev, "out of memory in %s\n", __func__); 15469846590eSStephen M. Cameron return; 15479846590eSStephen M. Cameron } 15489846590eSStephen M. Cameron memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr)); 15499846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 15509846590eSStephen M. Cameron list_add_tail(&device->offline_list, &h->offline_device_list); 15519846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 15529846590eSStephen M. Cameron } 15539846590eSStephen M. Cameron 15549846590eSStephen M. Cameron /* Print a message explaining various offline volume states */ 15559846590eSStephen M. Cameron static void hpsa_show_volume_status(struct ctlr_info *h, 15569846590eSStephen M. Cameron struct hpsa_scsi_dev_t *sd) 15579846590eSStephen M. Cameron { 15589846590eSStephen M. Cameron if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED) 15599846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15609846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n", 15619846590eSStephen M. Cameron h->scsi_host->host_no, 15629846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15639846590eSStephen M. Cameron switch (sd->volume_offline) { 15649846590eSStephen M. Cameron case HPSA_LV_OK: 15659846590eSStephen M. Cameron break; 15669846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ERASE: 15679846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15689846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n", 15699846590eSStephen M. Cameron h->scsi_host->host_no, 15709846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15719846590eSStephen M. Cameron break; 15725ca01204SScott Benesh case HPSA_LV_NOT_AVAILABLE: 15735ca01204SScott Benesh dev_info(&h->pdev->dev, 15745ca01204SScott Benesh "C%d:B%d:T%d:L%d Volume is waiting for transforming volume.\n", 15755ca01204SScott Benesh h->scsi_host->host_no, 15765ca01204SScott Benesh sd->bus, sd->target, sd->lun); 15775ca01204SScott Benesh break; 15789846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_RPI: 15799846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15805ca01204SScott Benesh "C%d:B%d:T%d:L%d Volume is undergoing rapid parity init.\n", 15819846590eSStephen M. Cameron h->scsi_host->host_no, 15829846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15839846590eSStephen M. Cameron break; 15849846590eSStephen M. Cameron case HPSA_LV_PENDING_RPI: 15859846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15869846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n", 15879846590eSStephen M. Cameron h->scsi_host->host_no, 15889846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15899846590eSStephen M. Cameron break; 15909846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_NO_KEY: 15919846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15929846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n", 15939846590eSStephen M. Cameron h->scsi_host->host_no, 15949846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15959846590eSStephen M. Cameron break; 15969846590eSStephen M. Cameron case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER: 15979846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15989846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n", 15999846590eSStephen M. Cameron h->scsi_host->host_no, 16009846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16019846590eSStephen M. Cameron break; 16029846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION: 16039846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16049846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n", 16059846590eSStephen M. Cameron h->scsi_host->host_no, 16069846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16079846590eSStephen M. Cameron break; 16089846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING: 16099846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16109846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n", 16119846590eSStephen M. Cameron h->scsi_host->host_no, 16129846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16139846590eSStephen M. Cameron break; 16149846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 16159846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16169846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n", 16179846590eSStephen M. Cameron h->scsi_host->host_no, 16189846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16199846590eSStephen M. Cameron break; 16209846590eSStephen M. Cameron case HPSA_LV_PENDING_ENCRYPTION: 16219846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16229846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n", 16239846590eSStephen M. Cameron h->scsi_host->host_no, 16249846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16259846590eSStephen M. Cameron break; 16269846590eSStephen M. Cameron case HPSA_LV_PENDING_ENCRYPTION_REKEYING: 16279846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16289846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n", 16299846590eSStephen M. Cameron h->scsi_host->host_no, 16309846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16319846590eSStephen M. Cameron break; 16329846590eSStephen M. Cameron } 16339846590eSStephen M. Cameron } 16349846590eSStephen M. Cameron 163503383736SDon Brace /* 163603383736SDon Brace * Figure the list of physical drive pointers for a logical drive with 163703383736SDon Brace * raid offload configured. 163803383736SDon Brace */ 163903383736SDon Brace static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h, 164003383736SDon Brace struct hpsa_scsi_dev_t *dev[], int ndevices, 164103383736SDon Brace struct hpsa_scsi_dev_t *logical_drive) 164203383736SDon Brace { 164303383736SDon Brace struct raid_map_data *map = &logical_drive->raid_map; 164403383736SDon Brace struct raid_map_disk_data *dd = &map->data[0]; 164503383736SDon Brace int i, j; 164603383736SDon Brace int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) + 164703383736SDon Brace le16_to_cpu(map->metadata_disks_per_row); 164803383736SDon Brace int nraid_map_entries = le16_to_cpu(map->row_cnt) * 164903383736SDon Brace le16_to_cpu(map->layout_map_count) * 165003383736SDon Brace total_disks_per_row; 165103383736SDon Brace int nphys_disk = le16_to_cpu(map->layout_map_count) * 165203383736SDon Brace total_disks_per_row; 165303383736SDon Brace int qdepth; 165403383736SDon Brace 165503383736SDon Brace if (nraid_map_entries > RAID_MAP_MAX_ENTRIES) 165603383736SDon Brace nraid_map_entries = RAID_MAP_MAX_ENTRIES; 165703383736SDon Brace 1658d604f533SWebb Scales logical_drive->nphysical_disks = nraid_map_entries; 1659d604f533SWebb Scales 166003383736SDon Brace qdepth = 0; 166103383736SDon Brace for (i = 0; i < nraid_map_entries; i++) { 166203383736SDon Brace logical_drive->phys_disk[i] = NULL; 166303383736SDon Brace if (!logical_drive->offload_config) 166403383736SDon Brace continue; 166503383736SDon Brace for (j = 0; j < ndevices; j++) { 16661d33d85dSDon Brace if (dev[j] == NULL) 16671d33d85dSDon Brace continue; 166803383736SDon Brace if (dev[j]->devtype != TYPE_DISK) 166903383736SDon Brace continue; 1670af15ed36SDon Brace if (dev[j]->devtype != TYPE_ZBC) 1671af15ed36SDon Brace continue; 1672f3f01730SKevin Barnett if (is_logical_device(dev[j])) 167303383736SDon Brace continue; 167403383736SDon Brace if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle) 167503383736SDon Brace continue; 167603383736SDon Brace 167703383736SDon Brace logical_drive->phys_disk[i] = dev[j]; 167803383736SDon Brace if (i < nphys_disk) 167903383736SDon Brace qdepth = min(h->nr_cmds, qdepth + 168003383736SDon Brace logical_drive->phys_disk[i]->queue_depth); 168103383736SDon Brace break; 168203383736SDon Brace } 168303383736SDon Brace 168403383736SDon Brace /* 168503383736SDon Brace * This can happen if a physical drive is removed and 168603383736SDon Brace * the logical drive is degraded. In that case, the RAID 168703383736SDon Brace * map data will refer to a physical disk which isn't actually 168803383736SDon Brace * present. And in that case offload_enabled should already 168903383736SDon Brace * be 0, but we'll turn it off here just in case 169003383736SDon Brace */ 169103383736SDon Brace if (!logical_drive->phys_disk[i]) { 169203383736SDon Brace logical_drive->offload_enabled = 0; 169341ce4c35SStephen Cameron logical_drive->offload_to_be_enabled = 0; 169441ce4c35SStephen Cameron logical_drive->queue_depth = 8; 169503383736SDon Brace } 169603383736SDon Brace } 169703383736SDon Brace if (nraid_map_entries) 169803383736SDon Brace /* 169903383736SDon Brace * This is correct for reads, too high for full stripe writes, 170003383736SDon Brace * way too high for partial stripe writes 170103383736SDon Brace */ 170203383736SDon Brace logical_drive->queue_depth = qdepth; 170303383736SDon Brace else 170403383736SDon Brace logical_drive->queue_depth = h->nr_cmds; 170503383736SDon Brace } 170603383736SDon Brace 170703383736SDon Brace static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h, 170803383736SDon Brace struct hpsa_scsi_dev_t *dev[], int ndevices) 170903383736SDon Brace { 171003383736SDon Brace int i; 171103383736SDon Brace 171203383736SDon Brace for (i = 0; i < ndevices; i++) { 17131d33d85dSDon Brace if (dev[i] == NULL) 17141d33d85dSDon Brace continue; 171503383736SDon Brace if (dev[i]->devtype != TYPE_DISK) 171603383736SDon Brace continue; 1717af15ed36SDon Brace if (dev[i]->devtype != TYPE_ZBC) 1718af15ed36SDon Brace continue; 1719f3f01730SKevin Barnett if (!is_logical_device(dev[i])) 172003383736SDon Brace continue; 172141ce4c35SStephen Cameron 172241ce4c35SStephen Cameron /* 172341ce4c35SStephen Cameron * If offload is currently enabled, the RAID map and 172441ce4c35SStephen Cameron * phys_disk[] assignment *better* not be changing 172541ce4c35SStephen Cameron * and since it isn't changing, we do not need to 172641ce4c35SStephen Cameron * update it. 172741ce4c35SStephen Cameron */ 172841ce4c35SStephen Cameron if (dev[i]->offload_enabled) 172941ce4c35SStephen Cameron continue; 173041ce4c35SStephen Cameron 173103383736SDon Brace hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]); 173203383736SDon Brace } 173303383736SDon Brace } 173403383736SDon Brace 1735096ccff4SKevin Barnett static int hpsa_add_device(struct ctlr_info *h, struct hpsa_scsi_dev_t *device) 1736096ccff4SKevin Barnett { 1737096ccff4SKevin Barnett int rc = 0; 1738096ccff4SKevin Barnett 1739096ccff4SKevin Barnett if (!h->scsi_host) 1740096ccff4SKevin Barnett return 1; 1741096ccff4SKevin Barnett 1742d04e62b9SKevin Barnett if (is_logical_device(device)) /* RAID */ 1743096ccff4SKevin Barnett rc = scsi_add_device(h->scsi_host, device->bus, 1744096ccff4SKevin Barnett device->target, device->lun); 1745d04e62b9SKevin Barnett else /* HBA */ 1746d04e62b9SKevin Barnett rc = hpsa_add_sas_device(h->sas_host, device); 1747d04e62b9SKevin Barnett 1748096ccff4SKevin Barnett return rc; 1749096ccff4SKevin Barnett } 1750096ccff4SKevin Barnett 1751*ba74fdc4SDon Brace static int hpsa_find_outstanding_commands_for_dev(struct ctlr_info *h, 1752*ba74fdc4SDon Brace struct hpsa_scsi_dev_t *dev) 1753*ba74fdc4SDon Brace { 1754*ba74fdc4SDon Brace int i; 1755*ba74fdc4SDon Brace int count = 0; 1756*ba74fdc4SDon Brace 1757*ba74fdc4SDon Brace for (i = 0; i < h->nr_cmds; i++) { 1758*ba74fdc4SDon Brace struct CommandList *c = h->cmd_pool + i; 1759*ba74fdc4SDon Brace int refcount = atomic_inc_return(&c->refcount); 1760*ba74fdc4SDon Brace 1761*ba74fdc4SDon Brace if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, 1762*ba74fdc4SDon Brace dev->scsi3addr)) { 1763*ba74fdc4SDon Brace unsigned long flags; 1764*ba74fdc4SDon Brace 1765*ba74fdc4SDon Brace spin_lock_irqsave(&h->lock, flags); /* Implied MB */ 1766*ba74fdc4SDon Brace if (!hpsa_is_cmd_idle(c)) 1767*ba74fdc4SDon Brace ++count; 1768*ba74fdc4SDon Brace spin_unlock_irqrestore(&h->lock, flags); 1769*ba74fdc4SDon Brace } 1770*ba74fdc4SDon Brace 1771*ba74fdc4SDon Brace cmd_free(h, c); 1772*ba74fdc4SDon Brace } 1773*ba74fdc4SDon Brace 1774*ba74fdc4SDon Brace return count; 1775*ba74fdc4SDon Brace } 1776*ba74fdc4SDon Brace 1777*ba74fdc4SDon Brace static void hpsa_wait_for_outstanding_commands_for_dev(struct ctlr_info *h, 1778*ba74fdc4SDon Brace struct hpsa_scsi_dev_t *device) 1779*ba74fdc4SDon Brace { 1780*ba74fdc4SDon Brace int cmds = 0; 1781*ba74fdc4SDon Brace int waits = 0; 1782*ba74fdc4SDon Brace 1783*ba74fdc4SDon Brace while (1) { 1784*ba74fdc4SDon Brace cmds = hpsa_find_outstanding_commands_for_dev(h, device); 1785*ba74fdc4SDon Brace if (cmds == 0) 1786*ba74fdc4SDon Brace break; 1787*ba74fdc4SDon Brace if (++waits > 20) 1788*ba74fdc4SDon Brace break; 1789*ba74fdc4SDon Brace dev_warn(&h->pdev->dev, 1790*ba74fdc4SDon Brace "%s: removing device with %d outstanding commands!\n", 1791*ba74fdc4SDon Brace __func__, cmds); 1792*ba74fdc4SDon Brace msleep(1000); 1793*ba74fdc4SDon Brace } 1794*ba74fdc4SDon Brace } 1795*ba74fdc4SDon Brace 1796096ccff4SKevin Barnett static void hpsa_remove_device(struct ctlr_info *h, 1797096ccff4SKevin Barnett struct hpsa_scsi_dev_t *device) 1798096ccff4SKevin Barnett { 1799096ccff4SKevin Barnett struct scsi_device *sdev = NULL; 1800096ccff4SKevin Barnett 1801096ccff4SKevin Barnett if (!h->scsi_host) 1802096ccff4SKevin Barnett return; 1803096ccff4SKevin Barnett 1804d04e62b9SKevin Barnett if (is_logical_device(device)) { /* RAID */ 1805096ccff4SKevin Barnett sdev = scsi_device_lookup(h->scsi_host, device->bus, 1806096ccff4SKevin Barnett device->target, device->lun); 1807096ccff4SKevin Barnett if (sdev) { 1808096ccff4SKevin Barnett scsi_remove_device(sdev); 1809096ccff4SKevin Barnett scsi_device_put(sdev); 1810096ccff4SKevin Barnett } else { 1811096ccff4SKevin Barnett /* 1812096ccff4SKevin Barnett * We don't expect to get here. Future commands 1813096ccff4SKevin Barnett * to this device will get a selection timeout as 1814096ccff4SKevin Barnett * if the device were gone. 1815096ccff4SKevin Barnett */ 1816096ccff4SKevin Barnett hpsa_show_dev_msg(KERN_WARNING, h, device, 1817096ccff4SKevin Barnett "didn't find device for removal."); 1818096ccff4SKevin Barnett } 1819*ba74fdc4SDon Brace } else { /* HBA */ 1820*ba74fdc4SDon Brace 1821*ba74fdc4SDon Brace device->removed = 1; 1822*ba74fdc4SDon Brace hpsa_wait_for_outstanding_commands_for_dev(h, device); 1823*ba74fdc4SDon Brace 1824d04e62b9SKevin Barnett hpsa_remove_sas_device(device); 1825096ccff4SKevin Barnett } 1826*ba74fdc4SDon Brace } 1827096ccff4SKevin Barnett 18288aa60681SDon Brace static void adjust_hpsa_scsi_table(struct ctlr_info *h, 1829edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd[], int nsds) 1830edd16368SStephen M. Cameron { 1831edd16368SStephen M. Cameron /* sd contains scsi3 addresses and devtypes, and inquiry 1832edd16368SStephen M. Cameron * data. This function takes what's in sd to be the current 1833edd16368SStephen M. Cameron * reality and updates h->dev[] to reflect that reality. 1834edd16368SStephen M. Cameron */ 1835edd16368SStephen M. Cameron int i, entry, device_change, changes = 0; 1836edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *csd; 1837edd16368SStephen M. Cameron unsigned long flags; 1838edd16368SStephen M. Cameron struct hpsa_scsi_dev_t **added, **removed; 1839edd16368SStephen M. Cameron int nadded, nremoved; 1840edd16368SStephen M. Cameron 1841da03ded0SDon Brace /* 1842da03ded0SDon Brace * A reset can cause a device status to change 1843da03ded0SDon Brace * re-schedule the scan to see what happened. 1844da03ded0SDon Brace */ 1845da03ded0SDon Brace if (h->reset_in_progress) { 1846da03ded0SDon Brace h->drv_req_rescan = 1; 1847da03ded0SDon Brace return; 1848da03ded0SDon Brace } 1849edd16368SStephen M. Cameron 1850cfe5badcSScott Teel added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL); 1851cfe5badcSScott Teel removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL); 1852edd16368SStephen M. Cameron 1853edd16368SStephen M. Cameron if (!added || !removed) { 1854edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "out of memory in " 1855edd16368SStephen M. Cameron "adjust_hpsa_scsi_table\n"); 1856edd16368SStephen M. Cameron goto free_and_out; 1857edd16368SStephen M. Cameron } 1858edd16368SStephen M. Cameron 1859edd16368SStephen M. Cameron spin_lock_irqsave(&h->devlock, flags); 1860edd16368SStephen M. Cameron 1861edd16368SStephen M. Cameron /* find any devices in h->dev[] that are not in 1862edd16368SStephen M. Cameron * sd[] and remove them from h->dev[], and for any 1863edd16368SStephen M. Cameron * devices which have changed, remove the old device 1864edd16368SStephen M. Cameron * info and add the new device info. 1865bd9244f7SScott Teel * If minor device attributes change, just update 1866bd9244f7SScott Teel * the existing device structure. 1867edd16368SStephen M. Cameron */ 1868edd16368SStephen M. Cameron i = 0; 1869edd16368SStephen M. Cameron nremoved = 0; 1870edd16368SStephen M. Cameron nadded = 0; 1871edd16368SStephen M. Cameron while (i < h->ndevices) { 1872edd16368SStephen M. Cameron csd = h->dev[i]; 1873edd16368SStephen M. Cameron device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry); 1874edd16368SStephen M. Cameron if (device_change == DEVICE_NOT_FOUND) { 1875edd16368SStephen M. Cameron changes++; 18768aa60681SDon Brace hpsa_scsi_remove_entry(h, i, removed, &nremoved); 1877edd16368SStephen M. Cameron continue; /* remove ^^^, hence i not incremented */ 1878edd16368SStephen M. Cameron } else if (device_change == DEVICE_CHANGED) { 1879edd16368SStephen M. Cameron changes++; 18808aa60681SDon Brace hpsa_scsi_replace_entry(h, i, sd[entry], 18812a8ccf31SStephen M. Cameron added, &nadded, removed, &nremoved); 1882c7f172dcSStephen M. Cameron /* Set it to NULL to prevent it from being freed 1883c7f172dcSStephen M. Cameron * at the bottom of hpsa_update_scsi_devices() 1884c7f172dcSStephen M. Cameron */ 1885c7f172dcSStephen M. Cameron sd[entry] = NULL; 1886bd9244f7SScott Teel } else if (device_change == DEVICE_UPDATED) { 18878aa60681SDon Brace hpsa_scsi_update_entry(h, i, sd[entry]); 1888edd16368SStephen M. Cameron } 1889edd16368SStephen M. Cameron i++; 1890edd16368SStephen M. Cameron } 1891edd16368SStephen M. Cameron 1892edd16368SStephen M. Cameron /* Now, make sure every device listed in sd[] is also 1893edd16368SStephen M. Cameron * listed in h->dev[], adding them if they aren't found 1894edd16368SStephen M. Cameron */ 1895edd16368SStephen M. Cameron 1896edd16368SStephen M. Cameron for (i = 0; i < nsds; i++) { 1897edd16368SStephen M. Cameron if (!sd[i]) /* if already added above. */ 1898edd16368SStephen M. Cameron continue; 18999846590eSStephen M. Cameron 19009846590eSStephen M. Cameron /* Don't add devices which are NOT READY, FORMAT IN PROGRESS 19019846590eSStephen M. Cameron * as the SCSI mid-layer does not handle such devices well. 19029846590eSStephen M. Cameron * It relentlessly loops sending TUR at 3Hz, then READ(10) 19039846590eSStephen M. Cameron * at 160Hz, and prevents the system from coming up. 19049846590eSStephen M. Cameron */ 19059846590eSStephen M. Cameron if (sd[i]->volume_offline) { 19069846590eSStephen M. Cameron hpsa_show_volume_status(h, sd[i]); 19070d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline"); 19089846590eSStephen M. Cameron continue; 19099846590eSStephen M. Cameron } 19109846590eSStephen M. Cameron 1911edd16368SStephen M. Cameron device_change = hpsa_scsi_find_entry(sd[i], h->dev, 1912edd16368SStephen M. Cameron h->ndevices, &entry); 1913edd16368SStephen M. Cameron if (device_change == DEVICE_NOT_FOUND) { 1914edd16368SStephen M. Cameron changes++; 19158aa60681SDon Brace if (hpsa_scsi_add_entry(h, sd[i], added, &nadded) != 0) 1916edd16368SStephen M. Cameron break; 1917edd16368SStephen M. Cameron sd[i] = NULL; /* prevent from being freed later. */ 1918edd16368SStephen M. Cameron } else if (device_change == DEVICE_CHANGED) { 1919edd16368SStephen M. Cameron /* should never happen... */ 1920edd16368SStephen M. Cameron changes++; 1921edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 1922edd16368SStephen M. Cameron "device unexpectedly changed.\n"); 1923edd16368SStephen M. Cameron /* but if it does happen, we just ignore that device */ 1924edd16368SStephen M. Cameron } 1925edd16368SStephen M. Cameron } 192641ce4c35SStephen Cameron hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices); 192741ce4c35SStephen Cameron 192841ce4c35SStephen Cameron /* Now that h->dev[]->phys_disk[] is coherent, we can enable 192941ce4c35SStephen Cameron * any logical drives that need it enabled. 193041ce4c35SStephen Cameron */ 19311d33d85dSDon Brace for (i = 0; i < h->ndevices; i++) { 19321d33d85dSDon Brace if (h->dev[i] == NULL) 19331d33d85dSDon Brace continue; 193441ce4c35SStephen Cameron h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled; 19351d33d85dSDon Brace } 193641ce4c35SStephen Cameron 1937edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->devlock, flags); 1938edd16368SStephen M. Cameron 19399846590eSStephen M. Cameron /* Monitor devices which are in one of several NOT READY states to be 19409846590eSStephen M. Cameron * brought online later. This must be done without holding h->devlock, 19419846590eSStephen M. Cameron * so don't touch h->dev[] 19429846590eSStephen M. Cameron */ 19439846590eSStephen M. Cameron for (i = 0; i < nsds; i++) { 19449846590eSStephen M. Cameron if (!sd[i]) /* if already added above. */ 19459846590eSStephen M. Cameron continue; 19469846590eSStephen M. Cameron if (sd[i]->volume_offline) 19479846590eSStephen M. Cameron hpsa_monitor_offline_device(h, sd[i]->scsi3addr); 19489846590eSStephen M. Cameron } 19499846590eSStephen M. Cameron 1950edd16368SStephen M. Cameron /* Don't notify scsi mid layer of any changes the first time through 1951edd16368SStephen M. Cameron * (or if there are no changes) scsi_scan_host will do it later the 1952edd16368SStephen M. Cameron * first time through. 1953edd16368SStephen M. Cameron */ 19548aa60681SDon Brace if (!changes) 1955edd16368SStephen M. Cameron goto free_and_out; 1956edd16368SStephen M. Cameron 1957edd16368SStephen M. Cameron /* Notify scsi mid layer of any removed devices */ 1958edd16368SStephen M. Cameron for (i = 0; i < nremoved; i++) { 19591d33d85dSDon Brace if (removed[i] == NULL) 19601d33d85dSDon Brace continue; 1961096ccff4SKevin Barnett if (removed[i]->expose_device) 1962096ccff4SKevin Barnett hpsa_remove_device(h, removed[i]); 1963edd16368SStephen M. Cameron kfree(removed[i]); 1964edd16368SStephen M. Cameron removed[i] = NULL; 1965edd16368SStephen M. Cameron } 1966edd16368SStephen M. Cameron 1967edd16368SStephen M. Cameron /* Notify scsi mid layer of any added devices */ 1968edd16368SStephen M. Cameron for (i = 0; i < nadded; i++) { 1969096ccff4SKevin Barnett int rc = 0; 1970096ccff4SKevin Barnett 19711d33d85dSDon Brace if (added[i] == NULL) 197241ce4c35SStephen Cameron continue; 19732a168208SKevin Barnett if (!(added[i]->expose_device)) 1974edd16368SStephen M. Cameron continue; 1975096ccff4SKevin Barnett rc = hpsa_add_device(h, added[i]); 1976096ccff4SKevin Barnett if (!rc) 1977edd16368SStephen M. Cameron continue; 1978096ccff4SKevin Barnett dev_warn(&h->pdev->dev, 1979096ccff4SKevin Barnett "addition failed %d, device not added.", rc); 1980edd16368SStephen M. Cameron /* now we have to remove it from h->dev, 1981edd16368SStephen M. Cameron * since it didn't get added to scsi mid layer 1982edd16368SStephen M. Cameron */ 1983edd16368SStephen M. Cameron fixup_botched_add(h, added[i]); 1984853633e8SDon Brace h->drv_req_rescan = 1; 1985edd16368SStephen M. Cameron } 1986edd16368SStephen M. Cameron 1987edd16368SStephen M. Cameron free_and_out: 1988edd16368SStephen M. Cameron kfree(added); 1989edd16368SStephen M. Cameron kfree(removed); 1990edd16368SStephen M. Cameron } 1991edd16368SStephen M. Cameron 1992edd16368SStephen M. Cameron /* 19939e03aa2fSJoe Perches * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t * 1994edd16368SStephen M. Cameron * Assume's h->devlock is held. 1995edd16368SStephen M. Cameron */ 1996edd16368SStephen M. Cameron static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h, 1997edd16368SStephen M. Cameron int bus, int target, int lun) 1998edd16368SStephen M. Cameron { 1999edd16368SStephen M. Cameron int i; 2000edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd; 2001edd16368SStephen M. Cameron 2002edd16368SStephen M. Cameron for (i = 0; i < h->ndevices; i++) { 2003edd16368SStephen M. Cameron sd = h->dev[i]; 2004edd16368SStephen M. Cameron if (sd->bus == bus && sd->target == target && sd->lun == lun) 2005edd16368SStephen M. Cameron return sd; 2006edd16368SStephen M. Cameron } 2007edd16368SStephen M. Cameron return NULL; 2008edd16368SStephen M. Cameron } 2009edd16368SStephen M. Cameron 2010edd16368SStephen M. Cameron static int hpsa_slave_alloc(struct scsi_device *sdev) 2011edd16368SStephen M. Cameron { 2012edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd; 2013edd16368SStephen M. Cameron unsigned long flags; 2014edd16368SStephen M. Cameron struct ctlr_info *h; 2015edd16368SStephen M. Cameron 2016edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 2017edd16368SStephen M. Cameron spin_lock_irqsave(&h->devlock, flags); 2018d04e62b9SKevin Barnett if (sdev_channel(sdev) == HPSA_PHYSICAL_DEVICE_BUS) { 2019d04e62b9SKevin Barnett struct scsi_target *starget; 2020d04e62b9SKevin Barnett struct sas_rphy *rphy; 2021d04e62b9SKevin Barnett 2022d04e62b9SKevin Barnett starget = scsi_target(sdev); 2023d04e62b9SKevin Barnett rphy = target_to_rphy(starget); 2024d04e62b9SKevin Barnett sd = hpsa_find_device_by_sas_rphy(h, rphy); 2025d04e62b9SKevin Barnett if (sd) { 2026d04e62b9SKevin Barnett sd->target = sdev_id(sdev); 2027d04e62b9SKevin Barnett sd->lun = sdev->lun; 2028d04e62b9SKevin Barnett } 2029d04e62b9SKevin Barnett } else 2030edd16368SStephen M. Cameron sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev), 2031edd16368SStephen M. Cameron sdev_id(sdev), sdev->lun); 2032d04e62b9SKevin Barnett 2033d04e62b9SKevin Barnett if (sd && sd->expose_device) { 203403383736SDon Brace atomic_set(&sd->ioaccel_cmds_out, 0); 2035d04e62b9SKevin Barnett sdev->hostdata = sd; 203641ce4c35SStephen Cameron } else 203741ce4c35SStephen Cameron sdev->hostdata = NULL; 2038edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->devlock, flags); 2039edd16368SStephen M. Cameron return 0; 2040edd16368SStephen M. Cameron } 2041edd16368SStephen M. Cameron 204241ce4c35SStephen Cameron /* configure scsi device based on internal per-device structure */ 204341ce4c35SStephen Cameron static int hpsa_slave_configure(struct scsi_device *sdev) 204441ce4c35SStephen Cameron { 204541ce4c35SStephen Cameron struct hpsa_scsi_dev_t *sd; 204641ce4c35SStephen Cameron int queue_depth; 204741ce4c35SStephen Cameron 204841ce4c35SStephen Cameron sd = sdev->hostdata; 20492a168208SKevin Barnett sdev->no_uld_attach = !sd || !sd->expose_device; 205041ce4c35SStephen Cameron 205141ce4c35SStephen Cameron if (sd) 205241ce4c35SStephen Cameron queue_depth = sd->queue_depth != 0 ? 205341ce4c35SStephen Cameron sd->queue_depth : sdev->host->can_queue; 205441ce4c35SStephen Cameron else 205541ce4c35SStephen Cameron queue_depth = sdev->host->can_queue; 205641ce4c35SStephen Cameron 205741ce4c35SStephen Cameron scsi_change_queue_depth(sdev, queue_depth); 205841ce4c35SStephen Cameron 205941ce4c35SStephen Cameron return 0; 206041ce4c35SStephen Cameron } 206141ce4c35SStephen Cameron 2062edd16368SStephen M. Cameron static void hpsa_slave_destroy(struct scsi_device *sdev) 2063edd16368SStephen M. Cameron { 2064bcc44255SStephen M. Cameron /* nothing to do. */ 2065edd16368SStephen M. Cameron } 2066edd16368SStephen M. Cameron 2067d9a729f3SWebb Scales static void hpsa_free_ioaccel2_sg_chain_blocks(struct ctlr_info *h) 2068d9a729f3SWebb Scales { 2069d9a729f3SWebb Scales int i; 2070d9a729f3SWebb Scales 2071d9a729f3SWebb Scales if (!h->ioaccel2_cmd_sg_list) 2072d9a729f3SWebb Scales return; 2073d9a729f3SWebb Scales for (i = 0; i < h->nr_cmds; i++) { 2074d9a729f3SWebb Scales kfree(h->ioaccel2_cmd_sg_list[i]); 2075d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list[i] = NULL; 2076d9a729f3SWebb Scales } 2077d9a729f3SWebb Scales kfree(h->ioaccel2_cmd_sg_list); 2078d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list = NULL; 2079d9a729f3SWebb Scales } 2080d9a729f3SWebb Scales 2081d9a729f3SWebb Scales static int hpsa_allocate_ioaccel2_sg_chain_blocks(struct ctlr_info *h) 2082d9a729f3SWebb Scales { 2083d9a729f3SWebb Scales int i; 2084d9a729f3SWebb Scales 2085d9a729f3SWebb Scales if (h->chainsize <= 0) 2086d9a729f3SWebb Scales return 0; 2087d9a729f3SWebb Scales 2088d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list = 2089d9a729f3SWebb Scales kzalloc(sizeof(*h->ioaccel2_cmd_sg_list) * h->nr_cmds, 2090d9a729f3SWebb Scales GFP_KERNEL); 2091d9a729f3SWebb Scales if (!h->ioaccel2_cmd_sg_list) 2092d9a729f3SWebb Scales return -ENOMEM; 2093d9a729f3SWebb Scales for (i = 0; i < h->nr_cmds; i++) { 2094d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list[i] = 2095d9a729f3SWebb Scales kmalloc(sizeof(*h->ioaccel2_cmd_sg_list[i]) * 2096d9a729f3SWebb Scales h->maxsgentries, GFP_KERNEL); 2097d9a729f3SWebb Scales if (!h->ioaccel2_cmd_sg_list[i]) 2098d9a729f3SWebb Scales goto clean; 2099d9a729f3SWebb Scales } 2100d9a729f3SWebb Scales return 0; 2101d9a729f3SWebb Scales 2102d9a729f3SWebb Scales clean: 2103d9a729f3SWebb Scales hpsa_free_ioaccel2_sg_chain_blocks(h); 2104d9a729f3SWebb Scales return -ENOMEM; 2105d9a729f3SWebb Scales } 2106d9a729f3SWebb Scales 210733a2ffceSStephen M. Cameron static void hpsa_free_sg_chain_blocks(struct ctlr_info *h) 210833a2ffceSStephen M. Cameron { 210933a2ffceSStephen M. Cameron int i; 211033a2ffceSStephen M. Cameron 211133a2ffceSStephen M. Cameron if (!h->cmd_sg_list) 211233a2ffceSStephen M. Cameron return; 211333a2ffceSStephen M. Cameron for (i = 0; i < h->nr_cmds; i++) { 211433a2ffceSStephen M. Cameron kfree(h->cmd_sg_list[i]); 211533a2ffceSStephen M. Cameron h->cmd_sg_list[i] = NULL; 211633a2ffceSStephen M. Cameron } 211733a2ffceSStephen M. Cameron kfree(h->cmd_sg_list); 211833a2ffceSStephen M. Cameron h->cmd_sg_list = NULL; 211933a2ffceSStephen M. Cameron } 212033a2ffceSStephen M. Cameron 2121105a3dbcSRobert Elliott static int hpsa_alloc_sg_chain_blocks(struct ctlr_info *h) 212233a2ffceSStephen M. Cameron { 212333a2ffceSStephen M. Cameron int i; 212433a2ffceSStephen M. Cameron 212533a2ffceSStephen M. Cameron if (h->chainsize <= 0) 212633a2ffceSStephen M. Cameron return 0; 212733a2ffceSStephen M. Cameron 212833a2ffceSStephen M. Cameron h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds, 212933a2ffceSStephen M. Cameron GFP_KERNEL); 21303d4e6af8SRobert Elliott if (!h->cmd_sg_list) { 21313d4e6af8SRobert Elliott dev_err(&h->pdev->dev, "Failed to allocate SG list\n"); 213233a2ffceSStephen M. Cameron return -ENOMEM; 21333d4e6af8SRobert Elliott } 213433a2ffceSStephen M. Cameron for (i = 0; i < h->nr_cmds; i++) { 213533a2ffceSStephen M. Cameron h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) * 213633a2ffceSStephen M. Cameron h->chainsize, GFP_KERNEL); 21373d4e6af8SRobert Elliott if (!h->cmd_sg_list[i]) { 21383d4e6af8SRobert Elliott dev_err(&h->pdev->dev, "Failed to allocate cmd SG\n"); 213933a2ffceSStephen M. Cameron goto clean; 214033a2ffceSStephen M. Cameron } 21413d4e6af8SRobert Elliott } 214233a2ffceSStephen M. Cameron return 0; 214333a2ffceSStephen M. Cameron 214433a2ffceSStephen M. Cameron clean: 214533a2ffceSStephen M. Cameron hpsa_free_sg_chain_blocks(h); 214633a2ffceSStephen M. Cameron return -ENOMEM; 214733a2ffceSStephen M. Cameron } 214833a2ffceSStephen M. Cameron 2149d9a729f3SWebb Scales static int hpsa_map_ioaccel2_sg_chain_block(struct ctlr_info *h, 2150d9a729f3SWebb Scales struct io_accel2_cmd *cp, struct CommandList *c) 2151d9a729f3SWebb Scales { 2152d9a729f3SWebb Scales struct ioaccel2_sg_element *chain_block; 2153d9a729f3SWebb Scales u64 temp64; 2154d9a729f3SWebb Scales u32 chain_size; 2155d9a729f3SWebb Scales 2156d9a729f3SWebb Scales chain_block = h->ioaccel2_cmd_sg_list[c->cmdindex]; 2157a736e9b6SDon Brace chain_size = le32_to_cpu(cp->sg[0].length); 2158d9a729f3SWebb Scales temp64 = pci_map_single(h->pdev, chain_block, chain_size, 2159d9a729f3SWebb Scales PCI_DMA_TODEVICE); 2160d9a729f3SWebb Scales if (dma_mapping_error(&h->pdev->dev, temp64)) { 2161d9a729f3SWebb Scales /* prevent subsequent unmapping */ 2162d9a729f3SWebb Scales cp->sg->address = 0; 2163d9a729f3SWebb Scales return -1; 2164d9a729f3SWebb Scales } 2165d9a729f3SWebb Scales cp->sg->address = cpu_to_le64(temp64); 2166d9a729f3SWebb Scales return 0; 2167d9a729f3SWebb Scales } 2168d9a729f3SWebb Scales 2169d9a729f3SWebb Scales static void hpsa_unmap_ioaccel2_sg_chain_block(struct ctlr_info *h, 2170d9a729f3SWebb Scales struct io_accel2_cmd *cp) 2171d9a729f3SWebb Scales { 2172d9a729f3SWebb Scales struct ioaccel2_sg_element *chain_sg; 2173d9a729f3SWebb Scales u64 temp64; 2174d9a729f3SWebb Scales u32 chain_size; 2175d9a729f3SWebb Scales 2176d9a729f3SWebb Scales chain_sg = cp->sg; 2177d9a729f3SWebb Scales temp64 = le64_to_cpu(chain_sg->address); 2178a736e9b6SDon Brace chain_size = le32_to_cpu(cp->sg[0].length); 2179d9a729f3SWebb Scales pci_unmap_single(h->pdev, temp64, chain_size, PCI_DMA_TODEVICE); 2180d9a729f3SWebb Scales } 2181d9a729f3SWebb Scales 2182e2bea6dfSStephen M. Cameron static int hpsa_map_sg_chain_block(struct ctlr_info *h, 218333a2ffceSStephen M. Cameron struct CommandList *c) 218433a2ffceSStephen M. Cameron { 218533a2ffceSStephen M. Cameron struct SGDescriptor *chain_sg, *chain_block; 218633a2ffceSStephen M. Cameron u64 temp64; 218750a0decfSStephen M. Cameron u32 chain_len; 218833a2ffceSStephen M. Cameron 218933a2ffceSStephen M. Cameron chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 219033a2ffceSStephen M. Cameron chain_block = h->cmd_sg_list[c->cmdindex]; 219150a0decfSStephen M. Cameron chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN); 219250a0decfSStephen M. Cameron chain_len = sizeof(*chain_sg) * 21932b08b3e9SDon Brace (le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries); 219450a0decfSStephen M. Cameron chain_sg->Len = cpu_to_le32(chain_len); 219550a0decfSStephen M. Cameron temp64 = pci_map_single(h->pdev, chain_block, chain_len, 219633a2ffceSStephen M. Cameron PCI_DMA_TODEVICE); 2197e2bea6dfSStephen M. Cameron if (dma_mapping_error(&h->pdev->dev, temp64)) { 2198e2bea6dfSStephen M. Cameron /* prevent subsequent unmapping */ 219950a0decfSStephen M. Cameron chain_sg->Addr = cpu_to_le64(0); 2200e2bea6dfSStephen M. Cameron return -1; 2201e2bea6dfSStephen M. Cameron } 220250a0decfSStephen M. Cameron chain_sg->Addr = cpu_to_le64(temp64); 2203e2bea6dfSStephen M. Cameron return 0; 220433a2ffceSStephen M. Cameron } 220533a2ffceSStephen M. Cameron 220633a2ffceSStephen M. Cameron static void hpsa_unmap_sg_chain_block(struct ctlr_info *h, 220733a2ffceSStephen M. Cameron struct CommandList *c) 220833a2ffceSStephen M. Cameron { 220933a2ffceSStephen M. Cameron struct SGDescriptor *chain_sg; 221033a2ffceSStephen M. Cameron 221150a0decfSStephen M. Cameron if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries) 221233a2ffceSStephen M. Cameron return; 221333a2ffceSStephen M. Cameron 221433a2ffceSStephen M. Cameron chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 221550a0decfSStephen M. Cameron pci_unmap_single(h->pdev, le64_to_cpu(chain_sg->Addr), 221650a0decfSStephen M. Cameron le32_to_cpu(chain_sg->Len), PCI_DMA_TODEVICE); 221733a2ffceSStephen M. Cameron } 221833a2ffceSStephen M. Cameron 2219a09c1441SScott Teel 2220a09c1441SScott Teel /* Decode the various types of errors on ioaccel2 path. 2221a09c1441SScott Teel * Return 1 for any error that should generate a RAID path retry. 2222a09c1441SScott Teel * Return 0 for errors that don't require a RAID path retry. 2223a09c1441SScott Teel */ 2224a09c1441SScott Teel static int handle_ioaccel_mode2_error(struct ctlr_info *h, 2225c349775eSScott Teel struct CommandList *c, 2226c349775eSScott Teel struct scsi_cmnd *cmd, 2227*ba74fdc4SDon Brace struct io_accel2_cmd *c2, 2228*ba74fdc4SDon Brace struct hpsa_scsi_dev_t *dev) 2229c349775eSScott Teel { 2230c349775eSScott Teel int data_len; 2231a09c1441SScott Teel int retry = 0; 2232c40820d5SJoe Handzik u32 ioaccel2_resid = 0; 2233c349775eSScott Teel 2234c349775eSScott Teel switch (c2->error_data.serv_response) { 2235c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_COMPLETE: 2236c349775eSScott Teel switch (c2->error_data.status) { 2237c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_GOOD: 2238c349775eSScott Teel break; 2239c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND: 2240ee6b1889SStephen M. Cameron cmd->result |= SAM_STAT_CHECK_CONDITION; 2241c349775eSScott Teel if (c2->error_data.data_present != 2242ee6b1889SStephen M. Cameron IOACCEL2_SENSE_DATA_PRESENT) { 2243ee6b1889SStephen M. Cameron memset(cmd->sense_buffer, 0, 2244ee6b1889SStephen M. Cameron SCSI_SENSE_BUFFERSIZE); 2245c349775eSScott Teel break; 2246ee6b1889SStephen M. Cameron } 2247c349775eSScott Teel /* copy the sense data */ 2248c349775eSScott Teel data_len = c2->error_data.sense_data_len; 2249c349775eSScott Teel if (data_len > SCSI_SENSE_BUFFERSIZE) 2250c349775eSScott Teel data_len = SCSI_SENSE_BUFFERSIZE; 2251c349775eSScott Teel if (data_len > sizeof(c2->error_data.sense_data_buff)) 2252c349775eSScott Teel data_len = 2253c349775eSScott Teel sizeof(c2->error_data.sense_data_buff); 2254c349775eSScott Teel memcpy(cmd->sense_buffer, 2255c349775eSScott Teel c2->error_data.sense_data_buff, data_len); 2256a09c1441SScott Teel retry = 1; 2257c349775eSScott Teel break; 2258c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_BUSY: 2259a09c1441SScott Teel retry = 1; 2260c349775eSScott Teel break; 2261c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON: 2262a09c1441SScott Teel retry = 1; 2263c349775eSScott Teel break; 2264c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL: 22654a8da22bSStephen Cameron retry = 1; 2266c349775eSScott Teel break; 2267c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED: 2268a09c1441SScott Teel retry = 1; 2269c349775eSScott Teel break; 2270c349775eSScott Teel default: 2271a09c1441SScott Teel retry = 1; 2272c349775eSScott Teel break; 2273c349775eSScott Teel } 2274c349775eSScott Teel break; 2275c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_FAILURE: 2276c40820d5SJoe Handzik switch (c2->error_data.status) { 2277c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_IO_ERROR: 2278c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_IO_ABORTED: 2279c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_OVERRUN: 2280c40820d5SJoe Handzik retry = 1; 2281c40820d5SJoe Handzik break; 2282c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_UNDERRUN: 2283c40820d5SJoe Handzik cmd->result = (DID_OK << 16); /* host byte */ 2284c40820d5SJoe Handzik cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 2285c40820d5SJoe Handzik ioaccel2_resid = get_unaligned_le32( 2286c40820d5SJoe Handzik &c2->error_data.resid_cnt[0]); 2287c40820d5SJoe Handzik scsi_set_resid(cmd, ioaccel2_resid); 2288c40820d5SJoe Handzik break; 2289c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_NO_PATH_TO_DEVICE: 2290c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_INVALID_DEVICE: 2291c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_IOACCEL_DISABLED: 2292*ba74fdc4SDon Brace /* 2293*ba74fdc4SDon Brace * Did an HBA disk disappear? We will eventually 2294*ba74fdc4SDon Brace * get a state change event from the controller but 2295*ba74fdc4SDon Brace * in the meantime, we need to tell the OS that the 2296*ba74fdc4SDon Brace * HBA disk is no longer there and stop I/O 2297*ba74fdc4SDon Brace * from going down. This allows the potential re-insert 2298*ba74fdc4SDon Brace * of the disk to get the same device node. 2299*ba74fdc4SDon Brace */ 2300*ba74fdc4SDon Brace if (dev->physical_device && dev->expose_device) { 2301*ba74fdc4SDon Brace cmd->result = DID_NO_CONNECT << 16; 2302*ba74fdc4SDon Brace dev->removed = 1; 2303*ba74fdc4SDon Brace h->drv_req_rescan = 1; 2304*ba74fdc4SDon Brace dev_warn(&h->pdev->dev, 2305*ba74fdc4SDon Brace "%s: device is gone!\n", __func__); 2306*ba74fdc4SDon Brace } else 2307*ba74fdc4SDon Brace /* 2308*ba74fdc4SDon Brace * Retry by sending down the RAID path. 2309*ba74fdc4SDon Brace * We will get an event from ctlr to 2310*ba74fdc4SDon Brace * trigger rescan regardless. 2311*ba74fdc4SDon Brace */ 2312c40820d5SJoe Handzik retry = 1; 2313c40820d5SJoe Handzik break; 2314c40820d5SJoe Handzik default: 2315c40820d5SJoe Handzik retry = 1; 2316c40820d5SJoe Handzik } 2317c349775eSScott Teel break; 2318c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE: 2319c349775eSScott Teel break; 2320c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS: 2321c349775eSScott Teel break; 2322c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_REJECTED: 2323a09c1441SScott Teel retry = 1; 2324c349775eSScott Teel break; 2325c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN: 2326c349775eSScott Teel break; 2327c349775eSScott Teel default: 2328a09c1441SScott Teel retry = 1; 2329c349775eSScott Teel break; 2330c349775eSScott Teel } 2331a09c1441SScott Teel 2332a09c1441SScott Teel return retry; /* retry on raid path? */ 2333c349775eSScott Teel } 2334c349775eSScott Teel 2335a58e7e53SWebb Scales static void hpsa_cmd_resolve_events(struct ctlr_info *h, 2336a58e7e53SWebb Scales struct CommandList *c) 2337a58e7e53SWebb Scales { 2338d604f533SWebb Scales bool do_wake = false; 2339d604f533SWebb Scales 2340a58e7e53SWebb Scales /* 2341a58e7e53SWebb Scales * Prevent the following race in the abort handler: 2342a58e7e53SWebb Scales * 2343a58e7e53SWebb Scales * 1. LLD is requested to abort a SCSI command 2344a58e7e53SWebb Scales * 2. The SCSI command completes 2345a58e7e53SWebb Scales * 3. The struct CommandList associated with step 2 is made available 2346a58e7e53SWebb Scales * 4. New I/O request to LLD to another LUN re-uses struct CommandList 2347a58e7e53SWebb Scales * 5. Abort handler follows scsi_cmnd->host_scribble and 2348a58e7e53SWebb Scales * finds struct CommandList and tries to aborts it 2349a58e7e53SWebb Scales * Now we have aborted the wrong command. 2350a58e7e53SWebb Scales * 2351d604f533SWebb Scales * Reset c->scsi_cmd here so that the abort or reset handler will know 2352d604f533SWebb Scales * this command has completed. Then, check to see if the handler is 2353a58e7e53SWebb Scales * waiting for this command, and, if so, wake it. 2354a58e7e53SWebb Scales */ 2355a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_IDLE; 2356d604f533SWebb Scales mb(); /* Declare command idle before checking for pending events. */ 2357a58e7e53SWebb Scales if (c->abort_pending) { 2358d604f533SWebb Scales do_wake = true; 2359a58e7e53SWebb Scales c->abort_pending = false; 2360a58e7e53SWebb Scales } 2361d604f533SWebb Scales if (c->reset_pending) { 2362d604f533SWebb Scales unsigned long flags; 2363d604f533SWebb Scales struct hpsa_scsi_dev_t *dev; 2364d604f533SWebb Scales 2365d604f533SWebb Scales /* 2366d604f533SWebb Scales * There appears to be a reset pending; lock the lock and 2367d604f533SWebb Scales * reconfirm. If so, then decrement the count of outstanding 2368d604f533SWebb Scales * commands and wake the reset command if this is the last one. 2369d604f533SWebb Scales */ 2370d604f533SWebb Scales spin_lock_irqsave(&h->lock, flags); 2371d604f533SWebb Scales dev = c->reset_pending; /* Re-fetch under the lock. */ 2372d604f533SWebb Scales if (dev && atomic_dec_and_test(&dev->reset_cmds_out)) 2373d604f533SWebb Scales do_wake = true; 2374d604f533SWebb Scales c->reset_pending = NULL; 2375d604f533SWebb Scales spin_unlock_irqrestore(&h->lock, flags); 2376d604f533SWebb Scales } 2377d604f533SWebb Scales 2378d604f533SWebb Scales if (do_wake) 2379d604f533SWebb Scales wake_up_all(&h->event_sync_wait_queue); 2380a58e7e53SWebb Scales } 2381a58e7e53SWebb Scales 238273153fe5SWebb Scales static void hpsa_cmd_resolve_and_free(struct ctlr_info *h, 238373153fe5SWebb Scales struct CommandList *c) 238473153fe5SWebb Scales { 238573153fe5SWebb Scales hpsa_cmd_resolve_events(h, c); 238673153fe5SWebb Scales cmd_tagged_free(h, c); 238773153fe5SWebb Scales } 238873153fe5SWebb Scales 23898a0ff92cSWebb Scales static void hpsa_cmd_free_and_done(struct ctlr_info *h, 23908a0ff92cSWebb Scales struct CommandList *c, struct scsi_cmnd *cmd) 23918a0ff92cSWebb Scales { 239273153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 23938a0ff92cSWebb Scales cmd->scsi_done(cmd); 23948a0ff92cSWebb Scales } 23958a0ff92cSWebb Scales 23968a0ff92cSWebb Scales static void hpsa_retry_cmd(struct ctlr_info *h, struct CommandList *c) 23978a0ff92cSWebb Scales { 23988a0ff92cSWebb Scales INIT_WORK(&c->work, hpsa_command_resubmit_worker); 23998a0ff92cSWebb Scales queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work); 24008a0ff92cSWebb Scales } 24018a0ff92cSWebb Scales 2402a58e7e53SWebb Scales static void hpsa_set_scsi_cmd_aborted(struct scsi_cmnd *cmd) 2403a58e7e53SWebb Scales { 2404a58e7e53SWebb Scales cmd->result = DID_ABORT << 16; 2405a58e7e53SWebb Scales } 2406a58e7e53SWebb Scales 2407a58e7e53SWebb Scales static void hpsa_cmd_abort_and_free(struct ctlr_info *h, struct CommandList *c, 2408a58e7e53SWebb Scales struct scsi_cmnd *cmd) 2409a58e7e53SWebb Scales { 2410a58e7e53SWebb Scales hpsa_set_scsi_cmd_aborted(cmd); 2411a58e7e53SWebb Scales dev_warn(&h->pdev->dev, "CDB %16phN was aborted with status 0x%x\n", 2412a58e7e53SWebb Scales c->Request.CDB, c->err_info->ScsiStatus); 241373153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 2414a58e7e53SWebb Scales } 2415a58e7e53SWebb Scales 2416c349775eSScott Teel static void process_ioaccel2_completion(struct ctlr_info *h, 2417c349775eSScott Teel struct CommandList *c, struct scsi_cmnd *cmd, 2418c349775eSScott Teel struct hpsa_scsi_dev_t *dev) 2419c349775eSScott Teel { 2420c349775eSScott Teel struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 2421c349775eSScott Teel 2422c349775eSScott Teel /* check for good status */ 2423c349775eSScott Teel if (likely(c2->error_data.serv_response == 0 && 24248a0ff92cSWebb Scales c2->error_data.status == 0)) 24258a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, c, cmd); 2426c349775eSScott Teel 24278a0ff92cSWebb Scales /* 24288a0ff92cSWebb Scales * Any RAID offload error results in retry which will use 2429c349775eSScott Teel * the normal I/O path so the controller can handle whatever's 2430c349775eSScott Teel * wrong. 2431c349775eSScott Teel */ 2432f3f01730SKevin Barnett if (is_logical_device(dev) && 2433c349775eSScott Teel c2->error_data.serv_response == 2434c349775eSScott Teel IOACCEL2_SERV_RESPONSE_FAILURE) { 2435080ef1ccSDon Brace if (c2->error_data.status == 2436064d1b1dSDon Brace IOACCEL2_STATUS_SR_IOACCEL_DISABLED) { 2437c349775eSScott Teel dev->offload_enabled = 0; 2438064d1b1dSDon Brace dev->offload_to_be_enabled = 0; 2439064d1b1dSDon Brace } 24408a0ff92cSWebb Scales 24418a0ff92cSWebb Scales return hpsa_retry_cmd(h, c); 2442080ef1ccSDon Brace } 2443080ef1ccSDon Brace 2444*ba74fdc4SDon Brace if (handle_ioaccel_mode2_error(h, c, cmd, c2, dev)) 24458a0ff92cSWebb Scales return hpsa_retry_cmd(h, c); 2446080ef1ccSDon Brace 24478a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, c, cmd); 2448c349775eSScott Teel } 2449c349775eSScott Teel 24509437ac43SStephen Cameron /* Returns 0 on success, < 0 otherwise. */ 24519437ac43SStephen Cameron static int hpsa_evaluate_tmf_status(struct ctlr_info *h, 24529437ac43SStephen Cameron struct CommandList *cp) 24539437ac43SStephen Cameron { 24549437ac43SStephen Cameron u8 tmf_status = cp->err_info->ScsiStatus; 24559437ac43SStephen Cameron 24569437ac43SStephen Cameron switch (tmf_status) { 24579437ac43SStephen Cameron case CISS_TMF_COMPLETE: 24589437ac43SStephen Cameron /* 24599437ac43SStephen Cameron * CISS_TMF_COMPLETE never happens, instead, 24609437ac43SStephen Cameron * ei->CommandStatus == 0 for this case. 24619437ac43SStephen Cameron */ 24629437ac43SStephen Cameron case CISS_TMF_SUCCESS: 24639437ac43SStephen Cameron return 0; 24649437ac43SStephen Cameron case CISS_TMF_INVALID_FRAME: 24659437ac43SStephen Cameron case CISS_TMF_NOT_SUPPORTED: 24669437ac43SStephen Cameron case CISS_TMF_FAILED: 24679437ac43SStephen Cameron case CISS_TMF_WRONG_LUN: 24689437ac43SStephen Cameron case CISS_TMF_OVERLAPPED_TAG: 24699437ac43SStephen Cameron break; 24709437ac43SStephen Cameron default: 24719437ac43SStephen Cameron dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n", 24729437ac43SStephen Cameron tmf_status); 24739437ac43SStephen Cameron break; 24749437ac43SStephen Cameron } 24759437ac43SStephen Cameron return -tmf_status; 24769437ac43SStephen Cameron } 24779437ac43SStephen Cameron 24781fb011fbSStephen M. Cameron static void complete_scsi_command(struct CommandList *cp) 2479edd16368SStephen M. Cameron { 2480edd16368SStephen M. Cameron struct scsi_cmnd *cmd; 2481edd16368SStephen M. Cameron struct ctlr_info *h; 2482edd16368SStephen M. Cameron struct ErrorInfo *ei; 2483283b4a9bSStephen M. Cameron struct hpsa_scsi_dev_t *dev; 2484d9a729f3SWebb Scales struct io_accel2_cmd *c2; 2485edd16368SStephen M. Cameron 24869437ac43SStephen Cameron u8 sense_key; 24879437ac43SStephen Cameron u8 asc; /* additional sense code */ 24889437ac43SStephen Cameron u8 ascq; /* additional sense code qualifier */ 2489db111e18SStephen M. Cameron unsigned long sense_data_size; 2490edd16368SStephen M. Cameron 2491edd16368SStephen M. Cameron ei = cp->err_info; 24927fa3030cSStephen Cameron cmd = cp->scsi_cmd; 2493edd16368SStephen M. Cameron h = cp->h; 2494283b4a9bSStephen M. Cameron dev = cmd->device->hostdata; 2495d9a729f3SWebb Scales c2 = &h->ioaccel2_cmd_pool[cp->cmdindex]; 2496edd16368SStephen M. Cameron 2497edd16368SStephen M. Cameron scsi_dma_unmap(cmd); /* undo the DMA mappings */ 2498e1f7de0cSMatt Gates if ((cp->cmd_type == CMD_SCSI) && 24992b08b3e9SDon Brace (le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries)) 250033a2ffceSStephen M. Cameron hpsa_unmap_sg_chain_block(h, cp); 2501edd16368SStephen M. Cameron 2502d9a729f3SWebb Scales if ((cp->cmd_type == CMD_IOACCEL2) && 2503d9a729f3SWebb Scales (c2->sg[0].chain_indicator == IOACCEL2_CHAIN)) 2504d9a729f3SWebb Scales hpsa_unmap_ioaccel2_sg_chain_block(h, c2); 2505d9a729f3SWebb Scales 2506edd16368SStephen M. Cameron cmd->result = (DID_OK << 16); /* host byte */ 2507edd16368SStephen M. Cameron cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 2508c349775eSScott Teel 250903383736SDon Brace if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1) 251003383736SDon Brace atomic_dec(&cp->phys_disk->ioaccel_cmds_out); 251103383736SDon Brace 251225163bd5SWebb Scales /* 251325163bd5SWebb Scales * We check for lockup status here as it may be set for 251425163bd5SWebb Scales * CMD_SCSI, CMD_IOACCEL1 and CMD_IOACCEL2 commands by 251525163bd5SWebb Scales * fail_all_oustanding_cmds() 251625163bd5SWebb Scales */ 251725163bd5SWebb Scales if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) { 251825163bd5SWebb Scales /* DID_NO_CONNECT will prevent a retry */ 251925163bd5SWebb Scales cmd->result = DID_NO_CONNECT << 16; 25208a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, cp, cmd); 252125163bd5SWebb Scales } 252225163bd5SWebb Scales 2523d604f533SWebb Scales if ((unlikely(hpsa_is_pending_event(cp)))) { 2524d604f533SWebb Scales if (cp->reset_pending) 2525d604f533SWebb Scales return hpsa_cmd_resolve_and_free(h, cp); 2526d604f533SWebb Scales if (cp->abort_pending) 2527d604f533SWebb Scales return hpsa_cmd_abort_and_free(h, cp, cmd); 2528d604f533SWebb Scales } 2529d604f533SWebb Scales 2530c349775eSScott Teel if (cp->cmd_type == CMD_IOACCEL2) 2531c349775eSScott Teel return process_ioaccel2_completion(h, cp, cmd, dev); 2532c349775eSScott Teel 25336aa4c361SRobert Elliott scsi_set_resid(cmd, ei->ResidualCnt); 25348a0ff92cSWebb Scales if (ei->CommandStatus == 0) 25358a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, cp, cmd); 25366aa4c361SRobert Elliott 2537e1f7de0cSMatt Gates /* For I/O accelerator commands, copy over some fields to the normal 2538e1f7de0cSMatt Gates * CISS header used below for error handling. 2539e1f7de0cSMatt Gates */ 2540e1f7de0cSMatt Gates if (cp->cmd_type == CMD_IOACCEL1) { 2541e1f7de0cSMatt Gates struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex]; 25422b08b3e9SDon Brace cp->Header.SGList = scsi_sg_count(cmd); 25432b08b3e9SDon Brace cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList); 25442b08b3e9SDon Brace cp->Request.CDBLen = le16_to_cpu(c->io_flags) & 25452b08b3e9SDon Brace IOACCEL1_IOFLAGS_CDBLEN_MASK; 254650a0decfSStephen M. Cameron cp->Header.tag = c->tag; 2547e1f7de0cSMatt Gates memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8); 2548e1f7de0cSMatt Gates memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen); 2549283b4a9bSStephen M. Cameron 2550283b4a9bSStephen M. Cameron /* Any RAID offload error results in retry which will use 2551283b4a9bSStephen M. Cameron * the normal I/O path so the controller can handle whatever's 2552283b4a9bSStephen M. Cameron * wrong. 2553283b4a9bSStephen M. Cameron */ 2554f3f01730SKevin Barnett if (is_logical_device(dev)) { 2555283b4a9bSStephen M. Cameron if (ei->CommandStatus == CMD_IOACCEL_DISABLED) 2556283b4a9bSStephen M. Cameron dev->offload_enabled = 0; 25578a0ff92cSWebb Scales return hpsa_retry_cmd(h, cp); 2558283b4a9bSStephen M. Cameron } 2559e1f7de0cSMatt Gates } 2560e1f7de0cSMatt Gates 2561edd16368SStephen M. Cameron /* an error has occurred */ 2562edd16368SStephen M. Cameron switch (ei->CommandStatus) { 2563edd16368SStephen M. Cameron 2564edd16368SStephen M. Cameron case CMD_TARGET_STATUS: 25659437ac43SStephen Cameron cmd->result |= ei->ScsiStatus; 25669437ac43SStephen Cameron /* copy the sense data */ 25679437ac43SStephen Cameron if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo)) 25689437ac43SStephen Cameron sense_data_size = SCSI_SENSE_BUFFERSIZE; 25699437ac43SStephen Cameron else 25709437ac43SStephen Cameron sense_data_size = sizeof(ei->SenseInfo); 25719437ac43SStephen Cameron if (ei->SenseLen < sense_data_size) 25729437ac43SStephen Cameron sense_data_size = ei->SenseLen; 25739437ac43SStephen Cameron memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size); 25749437ac43SStephen Cameron if (ei->ScsiStatus) 25759437ac43SStephen Cameron decode_sense_data(ei->SenseInfo, sense_data_size, 25769437ac43SStephen Cameron &sense_key, &asc, &ascq); 2577edd16368SStephen M. Cameron if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) { 25781d3b3609SMatt Gates if (sense_key == ABORTED_COMMAND) { 25792e311fbaSStephen M. Cameron cmd->result |= DID_SOFT_ERROR << 16; 25801d3b3609SMatt Gates break; 25811d3b3609SMatt Gates } 2582edd16368SStephen M. Cameron break; 2583edd16368SStephen M. Cameron } 2584edd16368SStephen M. Cameron /* Problem was not a check condition 2585edd16368SStephen M. Cameron * Pass it up to the upper layers... 2586edd16368SStephen M. Cameron */ 2587edd16368SStephen M. Cameron if (ei->ScsiStatus) { 2588edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "cp %p has status 0x%x " 2589edd16368SStephen M. Cameron "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, " 2590edd16368SStephen M. Cameron "Returning result: 0x%x\n", 2591edd16368SStephen M. Cameron cp, ei->ScsiStatus, 2592edd16368SStephen M. Cameron sense_key, asc, ascq, 2593edd16368SStephen M. Cameron cmd->result); 2594edd16368SStephen M. Cameron } else { /* scsi status is zero??? How??? */ 2595edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. " 2596edd16368SStephen M. Cameron "Returning no connection.\n", cp), 2597edd16368SStephen M. Cameron 2598edd16368SStephen M. Cameron /* Ordinarily, this case should never happen, 2599edd16368SStephen M. Cameron * but there is a bug in some released firmware 2600edd16368SStephen M. Cameron * revisions that allows it to happen if, for 2601edd16368SStephen M. Cameron * example, a 4100 backplane loses power and 2602edd16368SStephen M. Cameron * the tape drive is in it. We assume that 2603edd16368SStephen M. Cameron * it's a fatal error of some kind because we 2604edd16368SStephen M. Cameron * can't show that it wasn't. We will make it 2605edd16368SStephen M. Cameron * look like selection timeout since that is 2606edd16368SStephen M. Cameron * the most common reason for this to occur, 2607edd16368SStephen M. Cameron * and it's severe enough. 2608edd16368SStephen M. Cameron */ 2609edd16368SStephen M. Cameron 2610edd16368SStephen M. Cameron cmd->result = DID_NO_CONNECT << 16; 2611edd16368SStephen M. Cameron } 2612edd16368SStephen M. Cameron break; 2613edd16368SStephen M. Cameron 2614edd16368SStephen M. Cameron case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 2615edd16368SStephen M. Cameron break; 2616edd16368SStephen M. Cameron case CMD_DATA_OVERRUN: 2617f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, 2618f42e81e1SStephen Cameron "CDB %16phN data overrun\n", cp->Request.CDB); 2619edd16368SStephen M. Cameron break; 2620edd16368SStephen M. Cameron case CMD_INVALID: { 2621edd16368SStephen M. Cameron /* print_bytes(cp, sizeof(*cp), 1, 0); 2622edd16368SStephen M. Cameron print_cmd(cp); */ 2623edd16368SStephen M. Cameron /* We get CMD_INVALID if you address a non-existent device 2624edd16368SStephen M. Cameron * instead of a selection timeout (no response). You will 2625edd16368SStephen M. Cameron * see this if you yank out a drive, then try to access it. 2626edd16368SStephen M. Cameron * This is kind of a shame because it means that any other 2627edd16368SStephen M. Cameron * CMD_INVALID (e.g. driver bug) will get interpreted as a 2628edd16368SStephen M. Cameron * missing target. */ 2629edd16368SStephen M. Cameron cmd->result = DID_NO_CONNECT << 16; 2630edd16368SStephen M. Cameron } 2631edd16368SStephen M. Cameron break; 2632edd16368SStephen M. Cameron case CMD_PROTOCOL_ERR: 2633256d0eaaSStephen M. Cameron cmd->result = DID_ERROR << 16; 2634f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n", 2635f42e81e1SStephen Cameron cp->Request.CDB); 2636edd16368SStephen M. Cameron break; 2637edd16368SStephen M. Cameron case CMD_HARDWARE_ERR: 2638edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2639f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n", 2640f42e81e1SStephen Cameron cp->Request.CDB); 2641edd16368SStephen M. Cameron break; 2642edd16368SStephen M. Cameron case CMD_CONNECTION_LOST: 2643edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2644f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n", 2645f42e81e1SStephen Cameron cp->Request.CDB); 2646edd16368SStephen M. Cameron break; 2647edd16368SStephen M. Cameron case CMD_ABORTED: 2648a58e7e53SWebb Scales /* Return now to avoid calling scsi_done(). */ 2649a58e7e53SWebb Scales return hpsa_cmd_abort_and_free(h, cp, cmd); 2650edd16368SStephen M. Cameron case CMD_ABORT_FAILED: 2651edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2652f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n", 2653f42e81e1SStephen Cameron cp->Request.CDB); 2654edd16368SStephen M. Cameron break; 2655edd16368SStephen M. Cameron case CMD_UNSOLICITED_ABORT: 2656f6e76055SStephen M. Cameron cmd->result = DID_SOFT_ERROR << 16; /* retry the command */ 2657f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n", 2658f42e81e1SStephen Cameron cp->Request.CDB); 2659edd16368SStephen M. Cameron break; 2660edd16368SStephen M. Cameron case CMD_TIMEOUT: 2661edd16368SStephen M. Cameron cmd->result = DID_TIME_OUT << 16; 2662f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN timed out\n", 2663f42e81e1SStephen Cameron cp->Request.CDB); 2664edd16368SStephen M. Cameron break; 26651d5e2ed0SStephen M. Cameron case CMD_UNABORTABLE: 26661d5e2ed0SStephen M. Cameron cmd->result = DID_ERROR << 16; 26671d5e2ed0SStephen M. Cameron dev_warn(&h->pdev->dev, "Command unabortable\n"); 26681d5e2ed0SStephen M. Cameron break; 26699437ac43SStephen Cameron case CMD_TMF_STATUS: 26709437ac43SStephen Cameron if (hpsa_evaluate_tmf_status(h, cp)) /* TMF failed? */ 26719437ac43SStephen Cameron cmd->result = DID_ERROR << 16; 26729437ac43SStephen Cameron break; 2673283b4a9bSStephen M. Cameron case CMD_IOACCEL_DISABLED: 2674283b4a9bSStephen M. Cameron /* This only handles the direct pass-through case since RAID 2675283b4a9bSStephen M. Cameron * offload is handled above. Just attempt a retry. 2676283b4a9bSStephen M. Cameron */ 2677283b4a9bSStephen M. Cameron cmd->result = DID_SOFT_ERROR << 16; 2678283b4a9bSStephen M. Cameron dev_warn(&h->pdev->dev, 2679283b4a9bSStephen M. Cameron "cp %p had HP SSD Smart Path error\n", cp); 2680283b4a9bSStephen M. Cameron break; 2681edd16368SStephen M. Cameron default: 2682edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2683edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n", 2684edd16368SStephen M. Cameron cp, ei->CommandStatus); 2685edd16368SStephen M. Cameron } 26868a0ff92cSWebb Scales 26878a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, cp, cmd); 2688edd16368SStephen M. Cameron } 2689edd16368SStephen M. Cameron 2690edd16368SStephen M. Cameron static void hpsa_pci_unmap(struct pci_dev *pdev, 2691edd16368SStephen M. Cameron struct CommandList *c, int sg_used, int data_direction) 2692edd16368SStephen M. Cameron { 2693edd16368SStephen M. Cameron int i; 2694edd16368SStephen M. Cameron 269550a0decfSStephen M. Cameron for (i = 0; i < sg_used; i++) 269650a0decfSStephen M. Cameron pci_unmap_single(pdev, (dma_addr_t) le64_to_cpu(c->SG[i].Addr), 269750a0decfSStephen M. Cameron le32_to_cpu(c->SG[i].Len), 2698edd16368SStephen M. Cameron data_direction); 2699edd16368SStephen M. Cameron } 2700edd16368SStephen M. Cameron 2701a2dac136SStephen M. Cameron static int hpsa_map_one(struct pci_dev *pdev, 2702edd16368SStephen M. Cameron struct CommandList *cp, 2703edd16368SStephen M. Cameron unsigned char *buf, 2704edd16368SStephen M. Cameron size_t buflen, 2705edd16368SStephen M. Cameron int data_direction) 2706edd16368SStephen M. Cameron { 270701a02ffcSStephen M. Cameron u64 addr64; 2708edd16368SStephen M. Cameron 2709edd16368SStephen M. Cameron if (buflen == 0 || data_direction == PCI_DMA_NONE) { 2710edd16368SStephen M. Cameron cp->Header.SGList = 0; 271150a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(0); 2712a2dac136SStephen M. Cameron return 0; 2713edd16368SStephen M. Cameron } 2714edd16368SStephen M. Cameron 271550a0decfSStephen M. Cameron addr64 = pci_map_single(pdev, buf, buflen, data_direction); 2716eceaae18SShuah Khan if (dma_mapping_error(&pdev->dev, addr64)) { 2717a2dac136SStephen M. Cameron /* Prevent subsequent unmap of something never mapped */ 2718eceaae18SShuah Khan cp->Header.SGList = 0; 271950a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(0); 2720a2dac136SStephen M. Cameron return -1; 2721eceaae18SShuah Khan } 272250a0decfSStephen M. Cameron cp->SG[0].Addr = cpu_to_le64(addr64); 272350a0decfSStephen M. Cameron cp->SG[0].Len = cpu_to_le32(buflen); 272450a0decfSStephen M. Cameron cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */ 272550a0decfSStephen M. Cameron cp->Header.SGList = 1; /* no. SGs contig in this cmd */ 272650a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */ 2727a2dac136SStephen M. Cameron return 0; 2728edd16368SStephen M. Cameron } 2729edd16368SStephen M. Cameron 273025163bd5SWebb Scales #define NO_TIMEOUT ((unsigned long) -1) 273125163bd5SWebb Scales #define DEFAULT_TIMEOUT 30000 /* milliseconds */ 273225163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h, 273325163bd5SWebb Scales struct CommandList *c, int reply_queue, unsigned long timeout_msecs) 2734edd16368SStephen M. Cameron { 2735edd16368SStephen M. Cameron DECLARE_COMPLETION_ONSTACK(wait); 2736edd16368SStephen M. Cameron 2737edd16368SStephen M. Cameron c->waiting = &wait; 273825163bd5SWebb Scales __enqueue_cmd_and_start_io(h, c, reply_queue); 273925163bd5SWebb Scales if (timeout_msecs == NO_TIMEOUT) { 274025163bd5SWebb Scales /* TODO: get rid of this no-timeout thing */ 274125163bd5SWebb Scales wait_for_completion_io(&wait); 274225163bd5SWebb Scales return IO_OK; 274325163bd5SWebb Scales } 274425163bd5SWebb Scales if (!wait_for_completion_io_timeout(&wait, 274525163bd5SWebb Scales msecs_to_jiffies(timeout_msecs))) { 274625163bd5SWebb Scales dev_warn(&h->pdev->dev, "Command timed out.\n"); 274725163bd5SWebb Scales return -ETIMEDOUT; 274825163bd5SWebb Scales } 274925163bd5SWebb Scales return IO_OK; 275025163bd5SWebb Scales } 275125163bd5SWebb Scales 275225163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c, 275325163bd5SWebb Scales int reply_queue, unsigned long timeout_msecs) 275425163bd5SWebb Scales { 275525163bd5SWebb Scales if (unlikely(lockup_detected(h))) { 275625163bd5SWebb Scales c->err_info->CommandStatus = CMD_CTLR_LOCKUP; 275725163bd5SWebb Scales return IO_OK; 275825163bd5SWebb Scales } 275925163bd5SWebb Scales return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs); 2760edd16368SStephen M. Cameron } 2761edd16368SStephen M. Cameron 2762094963daSStephen M. Cameron static u32 lockup_detected(struct ctlr_info *h) 2763094963daSStephen M. Cameron { 2764094963daSStephen M. Cameron int cpu; 2765094963daSStephen M. Cameron u32 rc, *lockup_detected; 2766094963daSStephen M. Cameron 2767094963daSStephen M. Cameron cpu = get_cpu(); 2768094963daSStephen M. Cameron lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 2769094963daSStephen M. Cameron rc = *lockup_detected; 2770094963daSStephen M. Cameron put_cpu(); 2771094963daSStephen M. Cameron return rc; 2772094963daSStephen M. Cameron } 2773094963daSStephen M. Cameron 27749c2fc160SStephen M. Cameron #define MAX_DRIVER_CMD_RETRIES 25 277525163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h, 277625163bd5SWebb Scales struct CommandList *c, int data_direction, unsigned long timeout_msecs) 2777edd16368SStephen M. Cameron { 27789c2fc160SStephen M. Cameron int backoff_time = 10, retry_count = 0; 277925163bd5SWebb Scales int rc; 2780edd16368SStephen M. Cameron 2781edd16368SStephen M. Cameron do { 27827630abd0SJoe Perches memset(c->err_info, 0, sizeof(*c->err_info)); 278325163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 278425163bd5SWebb Scales timeout_msecs); 278525163bd5SWebb Scales if (rc) 278625163bd5SWebb Scales break; 2787edd16368SStephen M. Cameron retry_count++; 27889c2fc160SStephen M. Cameron if (retry_count > 3) { 27899c2fc160SStephen M. Cameron msleep(backoff_time); 27909c2fc160SStephen M. Cameron if (backoff_time < 1000) 27919c2fc160SStephen M. Cameron backoff_time *= 2; 27929c2fc160SStephen M. Cameron } 2793852af20aSMatt Bondurant } while ((check_for_unit_attention(h, c) || 27949c2fc160SStephen M. Cameron check_for_busy(h, c)) && 27959c2fc160SStephen M. Cameron retry_count <= MAX_DRIVER_CMD_RETRIES); 2796edd16368SStephen M. Cameron hpsa_pci_unmap(h->pdev, c, 1, data_direction); 279725163bd5SWebb Scales if (retry_count > MAX_DRIVER_CMD_RETRIES) 279825163bd5SWebb Scales rc = -EIO; 279925163bd5SWebb Scales return rc; 2800edd16368SStephen M. Cameron } 2801edd16368SStephen M. Cameron 2802d1e8beacSStephen M. Cameron static void hpsa_print_cmd(struct ctlr_info *h, char *txt, 2803d1e8beacSStephen M. Cameron struct CommandList *c) 2804edd16368SStephen M. Cameron { 2805d1e8beacSStephen M. Cameron const u8 *cdb = c->Request.CDB; 2806d1e8beacSStephen M. Cameron const u8 *lun = c->Header.LUN.LunAddrBytes; 2807edd16368SStephen M. Cameron 2808d1e8beacSStephen M. Cameron dev_warn(&h->pdev->dev, "%s: LUN:%02x%02x%02x%02x%02x%02x%02x%02x" 2809d1e8beacSStephen M. Cameron " CDB:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x\n", 2810d1e8beacSStephen M. Cameron txt, lun[0], lun[1], lun[2], lun[3], 2811d1e8beacSStephen M. Cameron lun[4], lun[5], lun[6], lun[7], 2812d1e8beacSStephen M. Cameron cdb[0], cdb[1], cdb[2], cdb[3], 2813d1e8beacSStephen M. Cameron cdb[4], cdb[5], cdb[6], cdb[7], 2814d1e8beacSStephen M. Cameron cdb[8], cdb[9], cdb[10], cdb[11], 2815d1e8beacSStephen M. Cameron cdb[12], cdb[13], cdb[14], cdb[15]); 2816d1e8beacSStephen M. Cameron } 2817d1e8beacSStephen M. Cameron 2818d1e8beacSStephen M. Cameron static void hpsa_scsi_interpret_error(struct ctlr_info *h, 2819d1e8beacSStephen M. Cameron struct CommandList *cp) 2820d1e8beacSStephen M. Cameron { 2821d1e8beacSStephen M. Cameron const struct ErrorInfo *ei = cp->err_info; 2822d1e8beacSStephen M. Cameron struct device *d = &cp->h->pdev->dev; 28239437ac43SStephen Cameron u8 sense_key, asc, ascq; 28249437ac43SStephen Cameron int sense_len; 2825d1e8beacSStephen M. Cameron 2826edd16368SStephen M. Cameron switch (ei->CommandStatus) { 2827edd16368SStephen M. Cameron case CMD_TARGET_STATUS: 28289437ac43SStephen Cameron if (ei->SenseLen > sizeof(ei->SenseInfo)) 28299437ac43SStephen Cameron sense_len = sizeof(ei->SenseInfo); 28309437ac43SStephen Cameron else 28319437ac43SStephen Cameron sense_len = ei->SenseLen; 28329437ac43SStephen Cameron decode_sense_data(ei->SenseInfo, sense_len, 28339437ac43SStephen Cameron &sense_key, &asc, &ascq); 2834d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "SCSI status", cp); 2835d1e8beacSStephen M. Cameron if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) 28369437ac43SStephen Cameron dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n", 28379437ac43SStephen Cameron sense_key, asc, ascq); 2838d1e8beacSStephen M. Cameron else 28399437ac43SStephen Cameron dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus); 2840edd16368SStephen M. Cameron if (ei->ScsiStatus == 0) 2841edd16368SStephen M. Cameron dev_warn(d, "SCSI status is abnormally zero. " 2842edd16368SStephen M. Cameron "(probably indicates selection timeout " 2843edd16368SStephen M. Cameron "reported incorrectly due to a known " 2844edd16368SStephen M. Cameron "firmware bug, circa July, 2001.)\n"); 2845edd16368SStephen M. Cameron break; 2846edd16368SStephen M. Cameron case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 2847edd16368SStephen M. Cameron break; 2848edd16368SStephen M. Cameron case CMD_DATA_OVERRUN: 2849d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "overrun condition", cp); 2850edd16368SStephen M. Cameron break; 2851edd16368SStephen M. Cameron case CMD_INVALID: { 2852edd16368SStephen M. Cameron /* controller unfortunately reports SCSI passthru's 2853edd16368SStephen M. Cameron * to non-existent targets as invalid commands. 2854edd16368SStephen M. Cameron */ 2855d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "invalid command", cp); 2856d1e8beacSStephen M. Cameron dev_warn(d, "probably means device no longer present\n"); 2857edd16368SStephen M. Cameron } 2858edd16368SStephen M. Cameron break; 2859edd16368SStephen M. Cameron case CMD_PROTOCOL_ERR: 2860d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "protocol error", cp); 2861edd16368SStephen M. Cameron break; 2862edd16368SStephen M. Cameron case CMD_HARDWARE_ERR: 2863d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "hardware error", cp); 2864edd16368SStephen M. Cameron break; 2865edd16368SStephen M. Cameron case CMD_CONNECTION_LOST: 2866d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "connection lost", cp); 2867edd16368SStephen M. Cameron break; 2868edd16368SStephen M. Cameron case CMD_ABORTED: 2869d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "aborted", cp); 2870edd16368SStephen M. Cameron break; 2871edd16368SStephen M. Cameron case CMD_ABORT_FAILED: 2872d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "abort failed", cp); 2873edd16368SStephen M. Cameron break; 2874edd16368SStephen M. Cameron case CMD_UNSOLICITED_ABORT: 2875d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "unsolicited abort", cp); 2876edd16368SStephen M. Cameron break; 2877edd16368SStephen M. Cameron case CMD_TIMEOUT: 2878d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "timed out", cp); 2879edd16368SStephen M. Cameron break; 28801d5e2ed0SStephen M. Cameron case CMD_UNABORTABLE: 2881d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "unabortable", cp); 28821d5e2ed0SStephen M. Cameron break; 288325163bd5SWebb Scales case CMD_CTLR_LOCKUP: 288425163bd5SWebb Scales hpsa_print_cmd(h, "controller lockup detected", cp); 288525163bd5SWebb Scales break; 2886edd16368SStephen M. Cameron default: 2887d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "unknown status", cp); 2888d1e8beacSStephen M. Cameron dev_warn(d, "Unknown command status %x\n", 2889edd16368SStephen M. Cameron ei->CommandStatus); 2890edd16368SStephen M. Cameron } 2891edd16368SStephen M. Cameron } 2892edd16368SStephen M. Cameron 2893edd16368SStephen M. Cameron static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr, 2894b7bb24ebSStephen M. Cameron u16 page, unsigned char *buf, 2895edd16368SStephen M. Cameron unsigned char bufsize) 2896edd16368SStephen M. Cameron { 2897edd16368SStephen M. Cameron int rc = IO_OK; 2898edd16368SStephen M. Cameron struct CommandList *c; 2899edd16368SStephen M. Cameron struct ErrorInfo *ei; 2900edd16368SStephen M. Cameron 290145fcb86eSStephen Cameron c = cmd_alloc(h); 2902edd16368SStephen M. Cameron 2903a2dac136SStephen M. Cameron if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, 2904a2dac136SStephen M. Cameron page, scsi3addr, TYPE_CMD)) { 2905a2dac136SStephen M. Cameron rc = -1; 2906a2dac136SStephen M. Cameron goto out; 2907a2dac136SStephen M. Cameron } 290825163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 2909c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 291025163bd5SWebb Scales if (rc) 291125163bd5SWebb Scales goto out; 2912edd16368SStephen M. Cameron ei = c->err_info; 2913edd16368SStephen M. Cameron if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 2914d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 2915edd16368SStephen M. Cameron rc = -1; 2916edd16368SStephen M. Cameron } 2917a2dac136SStephen M. Cameron out: 291845fcb86eSStephen Cameron cmd_free(h, c); 2919edd16368SStephen M. Cameron return rc; 2920edd16368SStephen M. Cameron } 2921edd16368SStephen M. Cameron 2922bf711ac6SScott Teel static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr, 292325163bd5SWebb Scales u8 reset_type, int reply_queue) 2924edd16368SStephen M. Cameron { 2925edd16368SStephen M. Cameron int rc = IO_OK; 2926edd16368SStephen M. Cameron struct CommandList *c; 2927edd16368SStephen M. Cameron struct ErrorInfo *ei; 2928edd16368SStephen M. Cameron 292945fcb86eSStephen Cameron c = cmd_alloc(h); 2930edd16368SStephen M. Cameron 2931edd16368SStephen M. Cameron 2932a2dac136SStephen M. Cameron /* fill_cmd can't fail here, no data buffer to map. */ 29330b9b7b6eSScott Teel (void) fill_cmd(c, reset_type, h, NULL, 0, 0, 2934bf711ac6SScott Teel scsi3addr, TYPE_MSG); 2935c448ecfaSDon Brace rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 293625163bd5SWebb Scales if (rc) { 293725163bd5SWebb Scales dev_warn(&h->pdev->dev, "Failed to send reset command\n"); 293825163bd5SWebb Scales goto out; 293925163bd5SWebb Scales } 2940edd16368SStephen M. Cameron /* no unmap needed here because no data xfer. */ 2941edd16368SStephen M. Cameron 2942edd16368SStephen M. Cameron ei = c->err_info; 2943edd16368SStephen M. Cameron if (ei->CommandStatus != 0) { 2944d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 2945edd16368SStephen M. Cameron rc = -1; 2946edd16368SStephen M. Cameron } 294725163bd5SWebb Scales out: 294845fcb86eSStephen Cameron cmd_free(h, c); 2949edd16368SStephen M. Cameron return rc; 2950edd16368SStephen M. Cameron } 2951edd16368SStephen M. Cameron 2952d604f533SWebb Scales static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c, 2953d604f533SWebb Scales struct hpsa_scsi_dev_t *dev, 2954d604f533SWebb Scales unsigned char *scsi3addr) 2955d604f533SWebb Scales { 2956d604f533SWebb Scales int i; 2957d604f533SWebb Scales bool match = false; 2958d604f533SWebb Scales struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 2959d604f533SWebb Scales struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2; 2960d604f533SWebb Scales 2961d604f533SWebb Scales if (hpsa_is_cmd_idle(c)) 2962d604f533SWebb Scales return false; 2963d604f533SWebb Scales 2964d604f533SWebb Scales switch (c->cmd_type) { 2965d604f533SWebb Scales case CMD_SCSI: 2966d604f533SWebb Scales case CMD_IOCTL_PEND: 2967d604f533SWebb Scales match = !memcmp(scsi3addr, &c->Header.LUN.LunAddrBytes, 2968d604f533SWebb Scales sizeof(c->Header.LUN.LunAddrBytes)); 2969d604f533SWebb Scales break; 2970d604f533SWebb Scales 2971d604f533SWebb Scales case CMD_IOACCEL1: 2972d604f533SWebb Scales case CMD_IOACCEL2: 2973d604f533SWebb Scales if (c->phys_disk == dev) { 2974d604f533SWebb Scales /* HBA mode match */ 2975d604f533SWebb Scales match = true; 2976d604f533SWebb Scales } else { 2977d604f533SWebb Scales /* Possible RAID mode -- check each phys dev. */ 2978d604f533SWebb Scales /* FIXME: Do we need to take out a lock here? If 2979d604f533SWebb Scales * so, we could just call hpsa_get_pdisk_of_ioaccel2() 2980d604f533SWebb Scales * instead. */ 2981d604f533SWebb Scales for (i = 0; i < dev->nphysical_disks && !match; i++) { 2982d604f533SWebb Scales /* FIXME: an alternate test might be 2983d604f533SWebb Scales * 2984d604f533SWebb Scales * match = dev->phys_disk[i]->ioaccel_handle 2985d604f533SWebb Scales * == c2->scsi_nexus; */ 2986d604f533SWebb Scales match = dev->phys_disk[i] == c->phys_disk; 2987d604f533SWebb Scales } 2988d604f533SWebb Scales } 2989d604f533SWebb Scales break; 2990d604f533SWebb Scales 2991d604f533SWebb Scales case IOACCEL2_TMF: 2992d604f533SWebb Scales for (i = 0; i < dev->nphysical_disks && !match; i++) { 2993d604f533SWebb Scales match = dev->phys_disk[i]->ioaccel_handle == 2994d604f533SWebb Scales le32_to_cpu(ac->it_nexus); 2995d604f533SWebb Scales } 2996d604f533SWebb Scales break; 2997d604f533SWebb Scales 2998d604f533SWebb Scales case 0: /* The command is in the middle of being initialized. */ 2999d604f533SWebb Scales match = false; 3000d604f533SWebb Scales break; 3001d604f533SWebb Scales 3002d604f533SWebb Scales default: 3003d604f533SWebb Scales dev_err(&h->pdev->dev, "unexpected cmd_type: %d\n", 3004d604f533SWebb Scales c->cmd_type); 3005d604f533SWebb Scales BUG(); 3006d604f533SWebb Scales } 3007d604f533SWebb Scales 3008d604f533SWebb Scales return match; 3009d604f533SWebb Scales } 3010d604f533SWebb Scales 3011d604f533SWebb Scales static int hpsa_do_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev, 3012d604f533SWebb Scales unsigned char *scsi3addr, u8 reset_type, int reply_queue) 3013d604f533SWebb Scales { 3014d604f533SWebb Scales int i; 3015d604f533SWebb Scales int rc = 0; 3016d604f533SWebb Scales 3017d604f533SWebb Scales /* We can really only handle one reset at a time */ 3018d604f533SWebb Scales if (mutex_lock_interruptible(&h->reset_mutex) == -EINTR) { 3019d604f533SWebb Scales dev_warn(&h->pdev->dev, "concurrent reset wait interrupted.\n"); 3020d604f533SWebb Scales return -EINTR; 3021d604f533SWebb Scales } 3022d604f533SWebb Scales 3023d604f533SWebb Scales BUG_ON(atomic_read(&dev->reset_cmds_out) != 0); 3024d604f533SWebb Scales 3025d604f533SWebb Scales for (i = 0; i < h->nr_cmds; i++) { 3026d604f533SWebb Scales struct CommandList *c = h->cmd_pool + i; 3027d604f533SWebb Scales int refcount = atomic_inc_return(&c->refcount); 3028d604f533SWebb Scales 3029d604f533SWebb Scales if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, scsi3addr)) { 3030d604f533SWebb Scales unsigned long flags; 3031d604f533SWebb Scales 3032d604f533SWebb Scales /* 3033d604f533SWebb Scales * Mark the target command as having a reset pending, 3034d604f533SWebb Scales * then lock a lock so that the command cannot complete 3035d604f533SWebb Scales * while we're considering it. If the command is not 3036d604f533SWebb Scales * idle then count it; otherwise revoke the event. 3037d604f533SWebb Scales */ 3038d604f533SWebb Scales c->reset_pending = dev; 3039d604f533SWebb Scales spin_lock_irqsave(&h->lock, flags); /* Implied MB */ 3040d604f533SWebb Scales if (!hpsa_is_cmd_idle(c)) 3041d604f533SWebb Scales atomic_inc(&dev->reset_cmds_out); 3042d604f533SWebb Scales else 3043d604f533SWebb Scales c->reset_pending = NULL; 3044d604f533SWebb Scales spin_unlock_irqrestore(&h->lock, flags); 3045d604f533SWebb Scales } 3046d604f533SWebb Scales 3047d604f533SWebb Scales cmd_free(h, c); 3048d604f533SWebb Scales } 3049d604f533SWebb Scales 3050d604f533SWebb Scales rc = hpsa_send_reset(h, scsi3addr, reset_type, reply_queue); 3051d604f533SWebb Scales if (!rc) 3052d604f533SWebb Scales wait_event(h->event_sync_wait_queue, 3053d604f533SWebb Scales atomic_read(&dev->reset_cmds_out) == 0 || 3054d604f533SWebb Scales lockup_detected(h)); 3055d604f533SWebb Scales 3056d604f533SWebb Scales if (unlikely(lockup_detected(h))) { 3057d604f533SWebb Scales dev_warn(&h->pdev->dev, 3058d604f533SWebb Scales "Controller lockup detected during reset wait\n"); 3059d604f533SWebb Scales rc = -ENODEV; 3060d604f533SWebb Scales } 3061d604f533SWebb Scales 3062d604f533SWebb Scales if (unlikely(rc)) 3063d604f533SWebb Scales atomic_set(&dev->reset_cmds_out, 0); 3064d604f533SWebb Scales 3065d604f533SWebb Scales mutex_unlock(&h->reset_mutex); 3066d604f533SWebb Scales return rc; 3067d604f533SWebb Scales } 3068d604f533SWebb Scales 3069edd16368SStephen M. Cameron static void hpsa_get_raid_level(struct ctlr_info *h, 3070edd16368SStephen M. Cameron unsigned char *scsi3addr, unsigned char *raid_level) 3071edd16368SStephen M. Cameron { 3072edd16368SStephen M. Cameron int rc; 3073edd16368SStephen M. Cameron unsigned char *buf; 3074edd16368SStephen M. Cameron 3075edd16368SStephen M. Cameron *raid_level = RAID_UNKNOWN; 3076edd16368SStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 3077edd16368SStephen M. Cameron if (!buf) 3078edd16368SStephen M. Cameron return; 3079b7bb24ebSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 0xC1, buf, 64); 3080edd16368SStephen M. Cameron if (rc == 0) 3081edd16368SStephen M. Cameron *raid_level = buf[8]; 3082edd16368SStephen M. Cameron if (*raid_level > RAID_UNKNOWN) 3083edd16368SStephen M. Cameron *raid_level = RAID_UNKNOWN; 3084edd16368SStephen M. Cameron kfree(buf); 3085edd16368SStephen M. Cameron return; 3086edd16368SStephen M. Cameron } 3087edd16368SStephen M. Cameron 3088283b4a9bSStephen M. Cameron #define HPSA_MAP_DEBUG 3089283b4a9bSStephen M. Cameron #ifdef HPSA_MAP_DEBUG 3090283b4a9bSStephen M. Cameron static void hpsa_debug_map_buff(struct ctlr_info *h, int rc, 3091283b4a9bSStephen M. Cameron struct raid_map_data *map_buff) 3092283b4a9bSStephen M. Cameron { 3093283b4a9bSStephen M. Cameron struct raid_map_disk_data *dd = &map_buff->data[0]; 3094283b4a9bSStephen M. Cameron int map, row, col; 3095283b4a9bSStephen M. Cameron u16 map_cnt, row_cnt, disks_per_row; 3096283b4a9bSStephen M. Cameron 3097283b4a9bSStephen M. Cameron if (rc != 0) 3098283b4a9bSStephen M. Cameron return; 3099283b4a9bSStephen M. Cameron 31002ba8bfc8SStephen M. Cameron /* Show details only if debugging has been activated. */ 31012ba8bfc8SStephen M. Cameron if (h->raid_offload_debug < 2) 31022ba8bfc8SStephen M. Cameron return; 31032ba8bfc8SStephen M. Cameron 3104283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "structure_size = %u\n", 3105283b4a9bSStephen M. Cameron le32_to_cpu(map_buff->structure_size)); 3106283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "volume_blk_size = %u\n", 3107283b4a9bSStephen M. Cameron le32_to_cpu(map_buff->volume_blk_size)); 3108283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n", 3109283b4a9bSStephen M. Cameron le64_to_cpu(map_buff->volume_blk_cnt)); 3110283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "physicalBlockShift = %u\n", 3111283b4a9bSStephen M. Cameron map_buff->phys_blk_shift); 3112283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n", 3113283b4a9bSStephen M. Cameron map_buff->parity_rotation_shift); 3114283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "strip_size = %u\n", 3115283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->strip_size)); 3116283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n", 3117283b4a9bSStephen M. Cameron le64_to_cpu(map_buff->disk_starting_blk)); 3118283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n", 3119283b4a9bSStephen M. Cameron le64_to_cpu(map_buff->disk_blk_cnt)); 3120283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "data_disks_per_row = %u\n", 3121283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->data_disks_per_row)); 3122283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n", 3123283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->metadata_disks_per_row)); 3124283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "row_cnt = %u\n", 3125283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->row_cnt)); 3126283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "layout_map_count = %u\n", 3127283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->layout_map_count)); 31282b08b3e9SDon Brace dev_info(&h->pdev->dev, "flags = 0x%x\n", 3129dd0e19f3SScott Teel le16_to_cpu(map_buff->flags)); 31302b08b3e9SDon Brace dev_info(&h->pdev->dev, "encrypytion = %s\n", 31312b08b3e9SDon Brace le16_to_cpu(map_buff->flags) & 31322b08b3e9SDon Brace RAID_MAP_FLAG_ENCRYPT_ON ? "ON" : "OFF"); 3133dd0e19f3SScott Teel dev_info(&h->pdev->dev, "dekindex = %u\n", 3134dd0e19f3SScott Teel le16_to_cpu(map_buff->dekindex)); 3135283b4a9bSStephen M. Cameron map_cnt = le16_to_cpu(map_buff->layout_map_count); 3136283b4a9bSStephen M. Cameron for (map = 0; map < map_cnt; map++) { 3137283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "Map%u:\n", map); 3138283b4a9bSStephen M. Cameron row_cnt = le16_to_cpu(map_buff->row_cnt); 3139283b4a9bSStephen M. Cameron for (row = 0; row < row_cnt; row++) { 3140283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, " Row%u:\n", row); 3141283b4a9bSStephen M. Cameron disks_per_row = 3142283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->data_disks_per_row); 3143283b4a9bSStephen M. Cameron for (col = 0; col < disks_per_row; col++, dd++) 3144283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, 3145283b4a9bSStephen M. Cameron " D%02u: h=0x%04x xor=%u,%u\n", 3146283b4a9bSStephen M. Cameron col, dd->ioaccel_handle, 3147283b4a9bSStephen M. Cameron dd->xor_mult[0], dd->xor_mult[1]); 3148283b4a9bSStephen M. Cameron disks_per_row = 3149283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->metadata_disks_per_row); 3150283b4a9bSStephen M. Cameron for (col = 0; col < disks_per_row; col++, dd++) 3151283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, 3152283b4a9bSStephen M. Cameron " M%02u: h=0x%04x xor=%u,%u\n", 3153283b4a9bSStephen M. Cameron col, dd->ioaccel_handle, 3154283b4a9bSStephen M. Cameron dd->xor_mult[0], dd->xor_mult[1]); 3155283b4a9bSStephen M. Cameron } 3156283b4a9bSStephen M. Cameron } 3157283b4a9bSStephen M. Cameron } 3158283b4a9bSStephen M. Cameron #else 3159283b4a9bSStephen M. Cameron static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h, 3160283b4a9bSStephen M. Cameron __attribute__((unused)) int rc, 3161283b4a9bSStephen M. Cameron __attribute__((unused)) struct raid_map_data *map_buff) 3162283b4a9bSStephen M. Cameron { 3163283b4a9bSStephen M. Cameron } 3164283b4a9bSStephen M. Cameron #endif 3165283b4a9bSStephen M. Cameron 3166283b4a9bSStephen M. Cameron static int hpsa_get_raid_map(struct ctlr_info *h, 3167283b4a9bSStephen M. Cameron unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device) 3168283b4a9bSStephen M. Cameron { 3169283b4a9bSStephen M. Cameron int rc = 0; 3170283b4a9bSStephen M. Cameron struct CommandList *c; 3171283b4a9bSStephen M. Cameron struct ErrorInfo *ei; 3172283b4a9bSStephen M. Cameron 317345fcb86eSStephen Cameron c = cmd_alloc(h); 3174bf43caf3SRobert Elliott 3175283b4a9bSStephen M. Cameron if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map, 3176283b4a9bSStephen M. Cameron sizeof(this_device->raid_map), 0, 3177283b4a9bSStephen M. Cameron scsi3addr, TYPE_CMD)) { 31782dd02d74SRobert Elliott dev_warn(&h->pdev->dev, "hpsa_get_raid_map fill_cmd failed\n"); 31792dd02d74SRobert Elliott cmd_free(h, c); 31802dd02d74SRobert Elliott return -1; 3181283b4a9bSStephen M. Cameron } 318225163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3183c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 318425163bd5SWebb Scales if (rc) 318525163bd5SWebb Scales goto out; 3186283b4a9bSStephen M. Cameron ei = c->err_info; 3187283b4a9bSStephen M. Cameron if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3188d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 318925163bd5SWebb Scales rc = -1; 319025163bd5SWebb Scales goto out; 3191283b4a9bSStephen M. Cameron } 319245fcb86eSStephen Cameron cmd_free(h, c); 3193283b4a9bSStephen M. Cameron 3194283b4a9bSStephen M. Cameron /* @todo in the future, dynamically allocate RAID map memory */ 3195283b4a9bSStephen M. Cameron if (le32_to_cpu(this_device->raid_map.structure_size) > 3196283b4a9bSStephen M. Cameron sizeof(this_device->raid_map)) { 3197283b4a9bSStephen M. Cameron dev_warn(&h->pdev->dev, "RAID map size is too large!\n"); 3198283b4a9bSStephen M. Cameron rc = -1; 3199283b4a9bSStephen M. Cameron } 3200283b4a9bSStephen M. Cameron hpsa_debug_map_buff(h, rc, &this_device->raid_map); 3201283b4a9bSStephen M. Cameron return rc; 320225163bd5SWebb Scales out: 320325163bd5SWebb Scales cmd_free(h, c); 320425163bd5SWebb Scales return rc; 3205283b4a9bSStephen M. Cameron } 3206283b4a9bSStephen M. Cameron 3207d04e62b9SKevin Barnett static int hpsa_bmic_sense_subsystem_information(struct ctlr_info *h, 3208d04e62b9SKevin Barnett unsigned char scsi3addr[], u16 bmic_device_index, 3209d04e62b9SKevin Barnett struct bmic_sense_subsystem_info *buf, size_t bufsize) 3210d04e62b9SKevin Barnett { 3211d04e62b9SKevin Barnett int rc = IO_OK; 3212d04e62b9SKevin Barnett struct CommandList *c; 3213d04e62b9SKevin Barnett struct ErrorInfo *ei; 3214d04e62b9SKevin Barnett 3215d04e62b9SKevin Barnett c = cmd_alloc(h); 3216d04e62b9SKevin Barnett 3217d04e62b9SKevin Barnett rc = fill_cmd(c, BMIC_SENSE_SUBSYSTEM_INFORMATION, h, buf, bufsize, 3218d04e62b9SKevin Barnett 0, RAID_CTLR_LUNID, TYPE_CMD); 3219d04e62b9SKevin Barnett if (rc) 3220d04e62b9SKevin Barnett goto out; 3221d04e62b9SKevin Barnett 3222d04e62b9SKevin Barnett c->Request.CDB[2] = bmic_device_index & 0xff; 3223d04e62b9SKevin Barnett c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff; 3224d04e62b9SKevin Barnett 3225d04e62b9SKevin Barnett rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3226c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 3227d04e62b9SKevin Barnett if (rc) 3228d04e62b9SKevin Barnett goto out; 3229d04e62b9SKevin Barnett ei = c->err_info; 3230d04e62b9SKevin Barnett if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3231d04e62b9SKevin Barnett hpsa_scsi_interpret_error(h, c); 3232d04e62b9SKevin Barnett rc = -1; 3233d04e62b9SKevin Barnett } 3234d04e62b9SKevin Barnett out: 3235d04e62b9SKevin Barnett cmd_free(h, c); 3236d04e62b9SKevin Barnett return rc; 3237d04e62b9SKevin Barnett } 3238d04e62b9SKevin Barnett 323966749d0dSScott Teel static int hpsa_bmic_id_controller(struct ctlr_info *h, 324066749d0dSScott Teel struct bmic_identify_controller *buf, size_t bufsize) 324166749d0dSScott Teel { 324266749d0dSScott Teel int rc = IO_OK; 324366749d0dSScott Teel struct CommandList *c; 324466749d0dSScott Teel struct ErrorInfo *ei; 324566749d0dSScott Teel 324666749d0dSScott Teel c = cmd_alloc(h); 324766749d0dSScott Teel 324866749d0dSScott Teel rc = fill_cmd(c, BMIC_IDENTIFY_CONTROLLER, h, buf, bufsize, 324966749d0dSScott Teel 0, RAID_CTLR_LUNID, TYPE_CMD); 325066749d0dSScott Teel if (rc) 325166749d0dSScott Teel goto out; 325266749d0dSScott Teel 325366749d0dSScott Teel rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3254c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 325566749d0dSScott Teel if (rc) 325666749d0dSScott Teel goto out; 325766749d0dSScott Teel ei = c->err_info; 325866749d0dSScott Teel if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 325966749d0dSScott Teel hpsa_scsi_interpret_error(h, c); 326066749d0dSScott Teel rc = -1; 326166749d0dSScott Teel } 326266749d0dSScott Teel out: 326366749d0dSScott Teel cmd_free(h, c); 326466749d0dSScott Teel return rc; 326566749d0dSScott Teel } 326666749d0dSScott Teel 326703383736SDon Brace static int hpsa_bmic_id_physical_device(struct ctlr_info *h, 326803383736SDon Brace unsigned char scsi3addr[], u16 bmic_device_index, 326903383736SDon Brace struct bmic_identify_physical_device *buf, size_t bufsize) 327003383736SDon Brace { 327103383736SDon Brace int rc = IO_OK; 327203383736SDon Brace struct CommandList *c; 327303383736SDon Brace struct ErrorInfo *ei; 327403383736SDon Brace 327503383736SDon Brace c = cmd_alloc(h); 327603383736SDon Brace rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize, 327703383736SDon Brace 0, RAID_CTLR_LUNID, TYPE_CMD); 327803383736SDon Brace if (rc) 327903383736SDon Brace goto out; 328003383736SDon Brace 328103383736SDon Brace c->Request.CDB[2] = bmic_device_index & 0xff; 328203383736SDon Brace c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff; 328303383736SDon Brace 328425163bd5SWebb Scales hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE, 3285c448ecfaSDon Brace DEFAULT_TIMEOUT); 328603383736SDon Brace ei = c->err_info; 328703383736SDon Brace if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 328803383736SDon Brace hpsa_scsi_interpret_error(h, c); 328903383736SDon Brace rc = -1; 329003383736SDon Brace } 329103383736SDon Brace out: 329203383736SDon Brace cmd_free(h, c); 3293d04e62b9SKevin Barnett 329403383736SDon Brace return rc; 329503383736SDon Brace } 329603383736SDon Brace 3297cca8f13bSDon Brace /* 3298cca8f13bSDon Brace * get enclosure information 3299cca8f13bSDon Brace * struct ReportExtendedLUNdata *rlep - Used for BMIC drive number 3300cca8f13bSDon Brace * struct hpsa_scsi_dev_t *encl_dev - device entry for enclosure 3301cca8f13bSDon Brace * Uses id_physical_device to determine the box_index. 3302cca8f13bSDon Brace */ 3303cca8f13bSDon Brace static void hpsa_get_enclosure_info(struct ctlr_info *h, 3304cca8f13bSDon Brace unsigned char *scsi3addr, 3305cca8f13bSDon Brace struct ReportExtendedLUNdata *rlep, int rle_index, 3306cca8f13bSDon Brace struct hpsa_scsi_dev_t *encl_dev) 3307cca8f13bSDon Brace { 3308cca8f13bSDon Brace int rc = -1; 3309cca8f13bSDon Brace struct CommandList *c = NULL; 3310cca8f13bSDon Brace struct ErrorInfo *ei = NULL; 3311cca8f13bSDon Brace struct bmic_sense_storage_box_params *bssbp = NULL; 3312cca8f13bSDon Brace struct bmic_identify_physical_device *id_phys = NULL; 3313cca8f13bSDon Brace struct ext_report_lun_entry *rle = &rlep->LUN[rle_index]; 3314cca8f13bSDon Brace u16 bmic_device_index = 0; 3315cca8f13bSDon Brace 3316cca8f13bSDon Brace bmic_device_index = GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]); 3317cca8f13bSDon Brace 331817a9e54aSDon Brace if (bmic_device_index == 0xFF00 || MASKED_DEVICE(&rle->lunid[0])) { 331917a9e54aSDon Brace rc = IO_OK; 3320cca8f13bSDon Brace goto out; 332117a9e54aSDon Brace } 3322cca8f13bSDon Brace 3323cca8f13bSDon Brace bssbp = kzalloc(sizeof(*bssbp), GFP_KERNEL); 3324cca8f13bSDon Brace if (!bssbp) 3325cca8f13bSDon Brace goto out; 3326cca8f13bSDon Brace 3327cca8f13bSDon Brace id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 3328cca8f13bSDon Brace if (!id_phys) 3329cca8f13bSDon Brace goto out; 3330cca8f13bSDon Brace 3331cca8f13bSDon Brace rc = hpsa_bmic_id_physical_device(h, scsi3addr, bmic_device_index, 3332cca8f13bSDon Brace id_phys, sizeof(*id_phys)); 3333cca8f13bSDon Brace if (rc) { 3334cca8f13bSDon Brace dev_warn(&h->pdev->dev, "%s: id_phys failed %d bdi[0x%x]\n", 3335cca8f13bSDon Brace __func__, encl_dev->external, bmic_device_index); 3336cca8f13bSDon Brace goto out; 3337cca8f13bSDon Brace } 3338cca8f13bSDon Brace 3339cca8f13bSDon Brace c = cmd_alloc(h); 3340cca8f13bSDon Brace 3341cca8f13bSDon Brace rc = fill_cmd(c, BMIC_SENSE_STORAGE_BOX_PARAMS, h, bssbp, 3342cca8f13bSDon Brace sizeof(*bssbp), 0, RAID_CTLR_LUNID, TYPE_CMD); 3343cca8f13bSDon Brace 3344cca8f13bSDon Brace if (rc) 3345cca8f13bSDon Brace goto out; 3346cca8f13bSDon Brace 3347cca8f13bSDon Brace if (id_phys->phys_connector[1] == 'E') 3348cca8f13bSDon Brace c->Request.CDB[5] = id_phys->box_index; 3349cca8f13bSDon Brace else 3350cca8f13bSDon Brace c->Request.CDB[5] = 0; 3351cca8f13bSDon Brace 3352cca8f13bSDon Brace rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE, 3353c448ecfaSDon Brace DEFAULT_TIMEOUT); 3354cca8f13bSDon Brace if (rc) 3355cca8f13bSDon Brace goto out; 3356cca8f13bSDon Brace 3357cca8f13bSDon Brace ei = c->err_info; 3358cca8f13bSDon Brace if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3359cca8f13bSDon Brace rc = -1; 3360cca8f13bSDon Brace goto out; 3361cca8f13bSDon Brace } 3362cca8f13bSDon Brace 3363cca8f13bSDon Brace encl_dev->box[id_phys->active_path_number] = bssbp->phys_box_on_port; 3364cca8f13bSDon Brace memcpy(&encl_dev->phys_connector[id_phys->active_path_number], 3365cca8f13bSDon Brace bssbp->phys_connector, sizeof(bssbp->phys_connector)); 3366cca8f13bSDon Brace 3367cca8f13bSDon Brace rc = IO_OK; 3368cca8f13bSDon Brace out: 3369cca8f13bSDon Brace kfree(bssbp); 3370cca8f13bSDon Brace kfree(id_phys); 3371cca8f13bSDon Brace 3372cca8f13bSDon Brace if (c) 3373cca8f13bSDon Brace cmd_free(h, c); 3374cca8f13bSDon Brace 3375cca8f13bSDon Brace if (rc != IO_OK) 3376cca8f13bSDon Brace hpsa_show_dev_msg(KERN_INFO, h, encl_dev, 3377cca8f13bSDon Brace "Error, could not get enclosure information\n"); 3378cca8f13bSDon Brace } 3379cca8f13bSDon Brace 3380d04e62b9SKevin Barnett static u64 hpsa_get_sas_address_from_report_physical(struct ctlr_info *h, 3381d04e62b9SKevin Barnett unsigned char *scsi3addr) 3382d04e62b9SKevin Barnett { 3383d04e62b9SKevin Barnett struct ReportExtendedLUNdata *physdev; 3384d04e62b9SKevin Barnett u32 nphysicals; 3385d04e62b9SKevin Barnett u64 sa = 0; 3386d04e62b9SKevin Barnett int i; 3387d04e62b9SKevin Barnett 3388d04e62b9SKevin Barnett physdev = kzalloc(sizeof(*physdev), GFP_KERNEL); 3389d04e62b9SKevin Barnett if (!physdev) 3390d04e62b9SKevin Barnett return 0; 3391d04e62b9SKevin Barnett 3392d04e62b9SKevin Barnett if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) { 3393d04e62b9SKevin Barnett dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 3394d04e62b9SKevin Barnett kfree(physdev); 3395d04e62b9SKevin Barnett return 0; 3396d04e62b9SKevin Barnett } 3397d04e62b9SKevin Barnett nphysicals = get_unaligned_be32(physdev->LUNListLength) / 24; 3398d04e62b9SKevin Barnett 3399d04e62b9SKevin Barnett for (i = 0; i < nphysicals; i++) 3400d04e62b9SKevin Barnett if (!memcmp(&physdev->LUN[i].lunid[0], scsi3addr, 8)) { 3401d04e62b9SKevin Barnett sa = get_unaligned_be64(&physdev->LUN[i].wwid[0]); 3402d04e62b9SKevin Barnett break; 3403d04e62b9SKevin Barnett } 3404d04e62b9SKevin Barnett 3405d04e62b9SKevin Barnett kfree(physdev); 3406d04e62b9SKevin Barnett 3407d04e62b9SKevin Barnett return sa; 3408d04e62b9SKevin Barnett } 3409d04e62b9SKevin Barnett 3410d04e62b9SKevin Barnett static void hpsa_get_sas_address(struct ctlr_info *h, unsigned char *scsi3addr, 3411d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *dev) 3412d04e62b9SKevin Barnett { 3413d04e62b9SKevin Barnett int rc; 3414d04e62b9SKevin Barnett u64 sa = 0; 3415d04e62b9SKevin Barnett 3416d04e62b9SKevin Barnett if (is_hba_lunid(scsi3addr)) { 3417d04e62b9SKevin Barnett struct bmic_sense_subsystem_info *ssi; 3418d04e62b9SKevin Barnett 3419d04e62b9SKevin Barnett ssi = kzalloc(sizeof(*ssi), GFP_KERNEL); 3420d04e62b9SKevin Barnett if (ssi == NULL) { 3421d04e62b9SKevin Barnett dev_warn(&h->pdev->dev, 3422d04e62b9SKevin Barnett "%s: out of memory\n", __func__); 3423d04e62b9SKevin Barnett return; 3424d04e62b9SKevin Barnett } 3425d04e62b9SKevin Barnett 3426d04e62b9SKevin Barnett rc = hpsa_bmic_sense_subsystem_information(h, 3427d04e62b9SKevin Barnett scsi3addr, 0, ssi, sizeof(*ssi)); 3428d04e62b9SKevin Barnett if (rc == 0) { 3429d04e62b9SKevin Barnett sa = get_unaligned_be64(ssi->primary_world_wide_id); 3430d04e62b9SKevin Barnett h->sas_address = sa; 3431d04e62b9SKevin Barnett } 3432d04e62b9SKevin Barnett 3433d04e62b9SKevin Barnett kfree(ssi); 3434d04e62b9SKevin Barnett } else 3435d04e62b9SKevin Barnett sa = hpsa_get_sas_address_from_report_physical(h, scsi3addr); 3436d04e62b9SKevin Barnett 3437d04e62b9SKevin Barnett dev->sas_address = sa; 3438d04e62b9SKevin Barnett } 3439d04e62b9SKevin Barnett 3440d04e62b9SKevin Barnett /* Get a device id from inquiry page 0x83 */ 34411b70150aSStephen M. Cameron static int hpsa_vpd_page_supported(struct ctlr_info *h, 34421b70150aSStephen M. Cameron unsigned char scsi3addr[], u8 page) 34431b70150aSStephen M. Cameron { 34441b70150aSStephen M. Cameron int rc; 34451b70150aSStephen M. Cameron int i; 34461b70150aSStephen M. Cameron int pages; 34471b70150aSStephen M. Cameron unsigned char *buf, bufsize; 34481b70150aSStephen M. Cameron 34491b70150aSStephen M. Cameron buf = kzalloc(256, GFP_KERNEL); 34501b70150aSStephen M. Cameron if (!buf) 34511b70150aSStephen M. Cameron return 0; 34521b70150aSStephen M. Cameron 34531b70150aSStephen M. Cameron /* Get the size of the page list first */ 34541b70150aSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, 34551b70150aSStephen M. Cameron VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES, 34561b70150aSStephen M. Cameron buf, HPSA_VPD_HEADER_SZ); 34571b70150aSStephen M. Cameron if (rc != 0) 34581b70150aSStephen M. Cameron goto exit_unsupported; 34591b70150aSStephen M. Cameron pages = buf[3]; 34601b70150aSStephen M. Cameron if ((pages + HPSA_VPD_HEADER_SZ) <= 255) 34611b70150aSStephen M. Cameron bufsize = pages + HPSA_VPD_HEADER_SZ; 34621b70150aSStephen M. Cameron else 34631b70150aSStephen M. Cameron bufsize = 255; 34641b70150aSStephen M. Cameron 34651b70150aSStephen M. Cameron /* Get the whole VPD page list */ 34661b70150aSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, 34671b70150aSStephen M. Cameron VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES, 34681b70150aSStephen M. Cameron buf, bufsize); 34691b70150aSStephen M. Cameron if (rc != 0) 34701b70150aSStephen M. Cameron goto exit_unsupported; 34711b70150aSStephen M. Cameron 34721b70150aSStephen M. Cameron pages = buf[3]; 34731b70150aSStephen M. Cameron for (i = 1; i <= pages; i++) 34741b70150aSStephen M. Cameron if (buf[3 + i] == page) 34751b70150aSStephen M. Cameron goto exit_supported; 34761b70150aSStephen M. Cameron exit_unsupported: 34771b70150aSStephen M. Cameron kfree(buf); 34781b70150aSStephen M. Cameron return 0; 34791b70150aSStephen M. Cameron exit_supported: 34801b70150aSStephen M. Cameron kfree(buf); 34811b70150aSStephen M. Cameron return 1; 34821b70150aSStephen M. Cameron } 34831b70150aSStephen M. Cameron 3484283b4a9bSStephen M. Cameron static void hpsa_get_ioaccel_status(struct ctlr_info *h, 3485283b4a9bSStephen M. Cameron unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device) 3486283b4a9bSStephen M. Cameron { 3487283b4a9bSStephen M. Cameron int rc; 3488283b4a9bSStephen M. Cameron unsigned char *buf; 3489283b4a9bSStephen M. Cameron u8 ioaccel_status; 3490283b4a9bSStephen M. Cameron 3491283b4a9bSStephen M. Cameron this_device->offload_config = 0; 3492283b4a9bSStephen M. Cameron this_device->offload_enabled = 0; 349341ce4c35SStephen Cameron this_device->offload_to_be_enabled = 0; 3494283b4a9bSStephen M. Cameron 3495283b4a9bSStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 3496283b4a9bSStephen M. Cameron if (!buf) 3497283b4a9bSStephen M. Cameron return; 34981b70150aSStephen M. Cameron if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS)) 34991b70150aSStephen M. Cameron goto out; 3500283b4a9bSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, 3501b7bb24ebSStephen M. Cameron VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64); 3502283b4a9bSStephen M. Cameron if (rc != 0) 3503283b4a9bSStephen M. Cameron goto out; 3504283b4a9bSStephen M. Cameron 3505283b4a9bSStephen M. Cameron #define IOACCEL_STATUS_BYTE 4 3506283b4a9bSStephen M. Cameron #define OFFLOAD_CONFIGURED_BIT 0x01 3507283b4a9bSStephen M. Cameron #define OFFLOAD_ENABLED_BIT 0x02 3508283b4a9bSStephen M. Cameron ioaccel_status = buf[IOACCEL_STATUS_BYTE]; 3509283b4a9bSStephen M. Cameron this_device->offload_config = 3510283b4a9bSStephen M. Cameron !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT); 3511283b4a9bSStephen M. Cameron if (this_device->offload_config) { 3512283b4a9bSStephen M. Cameron this_device->offload_enabled = 3513283b4a9bSStephen M. Cameron !!(ioaccel_status & OFFLOAD_ENABLED_BIT); 3514283b4a9bSStephen M. Cameron if (hpsa_get_raid_map(h, scsi3addr, this_device)) 3515283b4a9bSStephen M. Cameron this_device->offload_enabled = 0; 3516283b4a9bSStephen M. Cameron } 351741ce4c35SStephen Cameron this_device->offload_to_be_enabled = this_device->offload_enabled; 3518283b4a9bSStephen M. Cameron out: 3519283b4a9bSStephen M. Cameron kfree(buf); 3520283b4a9bSStephen M. Cameron return; 3521283b4a9bSStephen M. Cameron } 3522283b4a9bSStephen M. Cameron 3523edd16368SStephen M. Cameron /* Get the device id from inquiry page 0x83 */ 3524edd16368SStephen M. Cameron static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr, 352575d23d89SDon Brace unsigned char *device_id, int index, int buflen) 3526edd16368SStephen M. Cameron { 3527edd16368SStephen M. Cameron int rc; 3528edd16368SStephen M. Cameron unsigned char *buf; 3529edd16368SStephen M. Cameron 3530edd16368SStephen M. Cameron if (buflen > 16) 3531edd16368SStephen M. Cameron buflen = 16; 3532edd16368SStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 3533edd16368SStephen M. Cameron if (!buf) 3534a84d794dSStephen M. Cameron return -ENOMEM; 3535b7bb24ebSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 0x83, buf, 64); 3536edd16368SStephen M. Cameron if (rc == 0) 353775d23d89SDon Brace memcpy(device_id, &buf[index], buflen); 353875d23d89SDon Brace 3539edd16368SStephen M. Cameron kfree(buf); 354075d23d89SDon Brace 3541edd16368SStephen M. Cameron return rc != 0; 3542edd16368SStephen M. Cameron } 3543edd16368SStephen M. Cameron 3544edd16368SStephen M. Cameron static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical, 354503383736SDon Brace void *buf, int bufsize, 3546edd16368SStephen M. Cameron int extended_response) 3547edd16368SStephen M. Cameron { 3548edd16368SStephen M. Cameron int rc = IO_OK; 3549edd16368SStephen M. Cameron struct CommandList *c; 3550edd16368SStephen M. Cameron unsigned char scsi3addr[8]; 3551edd16368SStephen M. Cameron struct ErrorInfo *ei; 3552edd16368SStephen M. Cameron 355345fcb86eSStephen Cameron c = cmd_alloc(h); 3554bf43caf3SRobert Elliott 3555e89c0ae7SStephen M. Cameron /* address the controller */ 3556e89c0ae7SStephen M. Cameron memset(scsi3addr, 0, sizeof(scsi3addr)); 3557a2dac136SStephen M. Cameron if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h, 3558a2dac136SStephen M. Cameron buf, bufsize, 0, scsi3addr, TYPE_CMD)) { 3559a2dac136SStephen M. Cameron rc = -1; 3560a2dac136SStephen M. Cameron goto out; 3561a2dac136SStephen M. Cameron } 3562edd16368SStephen M. Cameron if (extended_response) 3563edd16368SStephen M. Cameron c->Request.CDB[1] = extended_response; 356425163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3565c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 356625163bd5SWebb Scales if (rc) 356725163bd5SWebb Scales goto out; 3568edd16368SStephen M. Cameron ei = c->err_info; 3569edd16368SStephen M. Cameron if (ei->CommandStatus != 0 && 3570edd16368SStephen M. Cameron ei->CommandStatus != CMD_DATA_UNDERRUN) { 3571d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 3572edd16368SStephen M. Cameron rc = -1; 3573283b4a9bSStephen M. Cameron } else { 357403383736SDon Brace struct ReportLUNdata *rld = buf; 357503383736SDon Brace 357603383736SDon Brace if (rld->extended_response_flag != extended_response) { 3577283b4a9bSStephen M. Cameron dev_err(&h->pdev->dev, 3578283b4a9bSStephen M. Cameron "report luns requested format %u, got %u\n", 3579283b4a9bSStephen M. Cameron extended_response, 358003383736SDon Brace rld->extended_response_flag); 3581283b4a9bSStephen M. Cameron rc = -1; 3582283b4a9bSStephen M. Cameron } 3583edd16368SStephen M. Cameron } 3584a2dac136SStephen M. Cameron out: 358545fcb86eSStephen Cameron cmd_free(h, c); 3586edd16368SStephen M. Cameron return rc; 3587edd16368SStephen M. Cameron } 3588edd16368SStephen M. Cameron 3589edd16368SStephen M. Cameron static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 359003383736SDon Brace struct ReportExtendedLUNdata *buf, int bufsize) 3591edd16368SStephen M. Cameron { 359203383736SDon Brace return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, 359303383736SDon Brace HPSA_REPORT_PHYS_EXTENDED); 3594edd16368SStephen M. Cameron } 3595edd16368SStephen M. Cameron 3596edd16368SStephen M. Cameron static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h, 3597edd16368SStephen M. Cameron struct ReportLUNdata *buf, int bufsize) 3598edd16368SStephen M. Cameron { 3599edd16368SStephen M. Cameron return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0); 3600edd16368SStephen M. Cameron } 3601edd16368SStephen M. Cameron 3602edd16368SStephen M. Cameron static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device, 3603edd16368SStephen M. Cameron int bus, int target, int lun) 3604edd16368SStephen M. Cameron { 3605edd16368SStephen M. Cameron device->bus = bus; 3606edd16368SStephen M. Cameron device->target = target; 3607edd16368SStephen M. Cameron device->lun = lun; 3608edd16368SStephen M. Cameron } 3609edd16368SStephen M. Cameron 36109846590eSStephen M. Cameron /* Use VPD inquiry to get details of volume status */ 36119846590eSStephen M. Cameron static int hpsa_get_volume_status(struct ctlr_info *h, 36129846590eSStephen M. Cameron unsigned char scsi3addr[]) 36139846590eSStephen M. Cameron { 36149846590eSStephen M. Cameron int rc; 36159846590eSStephen M. Cameron int status; 36169846590eSStephen M. Cameron int size; 36179846590eSStephen M. Cameron unsigned char *buf; 36189846590eSStephen M. Cameron 36199846590eSStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 36209846590eSStephen M. Cameron if (!buf) 36219846590eSStephen M. Cameron return HPSA_VPD_LV_STATUS_UNSUPPORTED; 36229846590eSStephen M. Cameron 36239846590eSStephen M. Cameron /* Does controller have VPD for logical volume status? */ 362424a4b078SStephen M. Cameron if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS)) 36259846590eSStephen M. Cameron goto exit_failed; 36269846590eSStephen M. Cameron 36279846590eSStephen M. Cameron /* Get the size of the VPD return buffer */ 36289846590eSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS, 36299846590eSStephen M. Cameron buf, HPSA_VPD_HEADER_SZ); 363024a4b078SStephen M. Cameron if (rc != 0) 36319846590eSStephen M. Cameron goto exit_failed; 36329846590eSStephen M. Cameron size = buf[3]; 36339846590eSStephen M. Cameron 36349846590eSStephen M. Cameron /* Now get the whole VPD buffer */ 36359846590eSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS, 36369846590eSStephen M. Cameron buf, size + HPSA_VPD_HEADER_SZ); 363724a4b078SStephen M. Cameron if (rc != 0) 36389846590eSStephen M. Cameron goto exit_failed; 36399846590eSStephen M. Cameron status = buf[4]; /* status byte */ 36409846590eSStephen M. Cameron 36419846590eSStephen M. Cameron kfree(buf); 36429846590eSStephen M. Cameron return status; 36439846590eSStephen M. Cameron exit_failed: 36449846590eSStephen M. Cameron kfree(buf); 36459846590eSStephen M. Cameron return HPSA_VPD_LV_STATUS_UNSUPPORTED; 36469846590eSStephen M. Cameron } 36479846590eSStephen M. Cameron 36489846590eSStephen M. Cameron /* Determine offline status of a volume. 36499846590eSStephen M. Cameron * Return either: 36509846590eSStephen M. Cameron * 0 (not offline) 365167955ba3SStephen M. Cameron * 0xff (offline for unknown reasons) 36529846590eSStephen M. Cameron * # (integer code indicating one of several NOT READY states 36539846590eSStephen M. Cameron * describing why a volume is to be kept offline) 36549846590eSStephen M. Cameron */ 365567955ba3SStephen M. Cameron static int hpsa_volume_offline(struct ctlr_info *h, 36569846590eSStephen M. Cameron unsigned char scsi3addr[]) 36579846590eSStephen M. Cameron { 36589846590eSStephen M. Cameron struct CommandList *c; 36599437ac43SStephen Cameron unsigned char *sense; 36609437ac43SStephen Cameron u8 sense_key, asc, ascq; 36619437ac43SStephen Cameron int sense_len; 366225163bd5SWebb Scales int rc, ldstat = 0; 36639846590eSStephen M. Cameron u16 cmd_status; 36649846590eSStephen M. Cameron u8 scsi_status; 36659846590eSStephen M. Cameron #define ASC_LUN_NOT_READY 0x04 36669846590eSStephen M. Cameron #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04 36679846590eSStephen M. Cameron #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02 36689846590eSStephen M. Cameron 36699846590eSStephen M. Cameron c = cmd_alloc(h); 3670bf43caf3SRobert Elliott 36719846590eSStephen M. Cameron (void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD); 3672c448ecfaSDon Brace rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 3673c448ecfaSDon Brace DEFAULT_TIMEOUT); 367425163bd5SWebb Scales if (rc) { 367525163bd5SWebb Scales cmd_free(h, c); 367625163bd5SWebb Scales return 0; 367725163bd5SWebb Scales } 36789846590eSStephen M. Cameron sense = c->err_info->SenseInfo; 36799437ac43SStephen Cameron if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo)) 36809437ac43SStephen Cameron sense_len = sizeof(c->err_info->SenseInfo); 36819437ac43SStephen Cameron else 36829437ac43SStephen Cameron sense_len = c->err_info->SenseLen; 36839437ac43SStephen Cameron decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq); 36849846590eSStephen M. Cameron cmd_status = c->err_info->CommandStatus; 36859846590eSStephen M. Cameron scsi_status = c->err_info->ScsiStatus; 36869846590eSStephen M. Cameron cmd_free(h, c); 36879846590eSStephen M. Cameron /* Is the volume 'not ready'? */ 36889846590eSStephen M. Cameron if (cmd_status != CMD_TARGET_STATUS || 36899846590eSStephen M. Cameron scsi_status != SAM_STAT_CHECK_CONDITION || 36909846590eSStephen M. Cameron sense_key != NOT_READY || 36919846590eSStephen M. Cameron asc != ASC_LUN_NOT_READY) { 36929846590eSStephen M. Cameron return 0; 36939846590eSStephen M. Cameron } 36949846590eSStephen M. Cameron 36959846590eSStephen M. Cameron /* Determine the reason for not ready state */ 36969846590eSStephen M. Cameron ldstat = hpsa_get_volume_status(h, scsi3addr); 36979846590eSStephen M. Cameron 36989846590eSStephen M. Cameron /* Keep volume offline in certain cases: */ 36999846590eSStephen M. Cameron switch (ldstat) { 37009846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ERASE: 37015ca01204SScott Benesh case HPSA_LV_NOT_AVAILABLE: 37029846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_RPI: 37039846590eSStephen M. Cameron case HPSA_LV_PENDING_RPI: 37049846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_NO_KEY: 37059846590eSStephen M. Cameron case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER: 37069846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION: 37079846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING: 37089846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 37099846590eSStephen M. Cameron return ldstat; 37109846590eSStephen M. Cameron case HPSA_VPD_LV_STATUS_UNSUPPORTED: 37119846590eSStephen M. Cameron /* If VPD status page isn't available, 37129846590eSStephen M. Cameron * use ASC/ASCQ to determine state 37139846590eSStephen M. Cameron */ 37149846590eSStephen M. Cameron if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) || 37159846590eSStephen M. Cameron (ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ)) 37169846590eSStephen M. Cameron return ldstat; 37179846590eSStephen M. Cameron break; 37189846590eSStephen M. Cameron default: 37199846590eSStephen M. Cameron break; 37209846590eSStephen M. Cameron } 37219846590eSStephen M. Cameron return 0; 37229846590eSStephen M. Cameron } 37239846590eSStephen M. Cameron 37249b5c48c2SStephen Cameron /* 37259b5c48c2SStephen Cameron * Find out if a logical device supports aborts by simply trying one. 37269b5c48c2SStephen Cameron * Smart Array may claim not to support aborts on logical drives, but 37279b5c48c2SStephen Cameron * if a MSA2000 * is connected, the drives on that will be presented 37289b5c48c2SStephen Cameron * by the Smart Array as logical drives, and aborts may be sent to 37299b5c48c2SStephen Cameron * those devices successfully. So the simplest way to find out is 37309b5c48c2SStephen Cameron * to simply try an abort and see how the device responds. 37319b5c48c2SStephen Cameron */ 37329b5c48c2SStephen Cameron static int hpsa_device_supports_aborts(struct ctlr_info *h, 37339b5c48c2SStephen Cameron unsigned char *scsi3addr) 37349b5c48c2SStephen Cameron { 37359b5c48c2SStephen Cameron struct CommandList *c; 37369b5c48c2SStephen Cameron struct ErrorInfo *ei; 37379b5c48c2SStephen Cameron int rc = 0; 37389b5c48c2SStephen Cameron 37399b5c48c2SStephen Cameron u64 tag = (u64) -1; /* bogus tag */ 37409b5c48c2SStephen Cameron 37419b5c48c2SStephen Cameron /* Assume that physical devices support aborts */ 37429b5c48c2SStephen Cameron if (!is_logical_dev_addr_mode(scsi3addr)) 37439b5c48c2SStephen Cameron return 1; 37449b5c48c2SStephen Cameron 37459b5c48c2SStephen Cameron c = cmd_alloc(h); 3746bf43caf3SRobert Elliott 37479b5c48c2SStephen Cameron (void) fill_cmd(c, HPSA_ABORT_MSG, h, &tag, 0, 0, scsi3addr, TYPE_MSG); 3748c448ecfaSDon Brace (void) hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 3749c448ecfaSDon Brace DEFAULT_TIMEOUT); 37509b5c48c2SStephen Cameron /* no unmap needed here because no data xfer. */ 37519b5c48c2SStephen Cameron ei = c->err_info; 37529b5c48c2SStephen Cameron switch (ei->CommandStatus) { 37539b5c48c2SStephen Cameron case CMD_INVALID: 37549b5c48c2SStephen Cameron rc = 0; 37559b5c48c2SStephen Cameron break; 37569b5c48c2SStephen Cameron case CMD_UNABORTABLE: 37579b5c48c2SStephen Cameron case CMD_ABORT_FAILED: 37589b5c48c2SStephen Cameron rc = 1; 37599b5c48c2SStephen Cameron break; 37609437ac43SStephen Cameron case CMD_TMF_STATUS: 37619437ac43SStephen Cameron rc = hpsa_evaluate_tmf_status(h, c); 37629437ac43SStephen Cameron break; 37639b5c48c2SStephen Cameron default: 37649b5c48c2SStephen Cameron rc = 0; 37659b5c48c2SStephen Cameron break; 37669b5c48c2SStephen Cameron } 37679b5c48c2SStephen Cameron cmd_free(h, c); 37689b5c48c2SStephen Cameron return rc; 37699b5c48c2SStephen Cameron } 37709b5c48c2SStephen Cameron 3771edd16368SStephen M. Cameron static int hpsa_update_device_info(struct ctlr_info *h, 37720b0e1d6cSStephen M. Cameron unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device, 37730b0e1d6cSStephen M. Cameron unsigned char *is_OBDR_device) 3774edd16368SStephen M. Cameron { 37750b0e1d6cSStephen M. Cameron 37760b0e1d6cSStephen M. Cameron #define OBDR_SIG_OFFSET 43 37770b0e1d6cSStephen M. Cameron #define OBDR_TAPE_SIG "$DR-10" 37780b0e1d6cSStephen M. Cameron #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1) 37790b0e1d6cSStephen M. Cameron #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN) 37800b0e1d6cSStephen M. Cameron 3781ea6d3bc3SStephen M. Cameron unsigned char *inq_buff; 37820b0e1d6cSStephen M. Cameron unsigned char *obdr_sig; 3783683fc444SDon Brace int rc = 0; 3784edd16368SStephen M. Cameron 3785ea6d3bc3SStephen M. Cameron inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL); 3786683fc444SDon Brace if (!inq_buff) { 3787683fc444SDon Brace rc = -ENOMEM; 3788edd16368SStephen M. Cameron goto bail_out; 3789683fc444SDon Brace } 3790edd16368SStephen M. Cameron 3791edd16368SStephen M. Cameron /* Do an inquiry to the device to see what it is. */ 3792edd16368SStephen M. Cameron if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff, 3793edd16368SStephen M. Cameron (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) { 3794edd16368SStephen M. Cameron /* Inquiry failed (msg printed already) */ 3795edd16368SStephen M. Cameron dev_err(&h->pdev->dev, 3796edd16368SStephen M. Cameron "hpsa_update_device_info: inquiry failed\n"); 3797683fc444SDon Brace rc = -EIO; 3798edd16368SStephen M. Cameron goto bail_out; 3799edd16368SStephen M. Cameron } 3800edd16368SStephen M. Cameron 38014af61e4fSDon Brace scsi_sanitize_inquiry_string(&inq_buff[8], 8); 38024af61e4fSDon Brace scsi_sanitize_inquiry_string(&inq_buff[16], 16); 380375d23d89SDon Brace 3804edd16368SStephen M. Cameron this_device->devtype = (inq_buff[0] & 0x1f); 3805edd16368SStephen M. Cameron memcpy(this_device->scsi3addr, scsi3addr, 8); 3806edd16368SStephen M. Cameron memcpy(this_device->vendor, &inq_buff[8], 3807edd16368SStephen M. Cameron sizeof(this_device->vendor)); 3808edd16368SStephen M. Cameron memcpy(this_device->model, &inq_buff[16], 3809edd16368SStephen M. Cameron sizeof(this_device->model)); 3810edd16368SStephen M. Cameron memset(this_device->device_id, 0, 3811edd16368SStephen M. Cameron sizeof(this_device->device_id)); 381275d23d89SDon Brace hpsa_get_device_id(h, scsi3addr, this_device->device_id, 8, 3813edd16368SStephen M. Cameron sizeof(this_device->device_id)); 3814edd16368SStephen M. Cameron 3815af15ed36SDon Brace if ((this_device->devtype == TYPE_DISK || 3816af15ed36SDon Brace this_device->devtype == TYPE_ZBC) && 3817283b4a9bSStephen M. Cameron is_logical_dev_addr_mode(scsi3addr)) { 381867955ba3SStephen M. Cameron int volume_offline; 381967955ba3SStephen M. Cameron 3820edd16368SStephen M. Cameron hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level); 3821283b4a9bSStephen M. Cameron if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC) 3822283b4a9bSStephen M. Cameron hpsa_get_ioaccel_status(h, scsi3addr, this_device); 382367955ba3SStephen M. Cameron volume_offline = hpsa_volume_offline(h, scsi3addr); 382467955ba3SStephen M. Cameron if (volume_offline < 0 || volume_offline > 0xff) 382567955ba3SStephen M. Cameron volume_offline = HPSA_VPD_LV_STATUS_UNSUPPORTED; 382667955ba3SStephen M. Cameron this_device->volume_offline = volume_offline & 0xff; 3827283b4a9bSStephen M. Cameron } else { 3828edd16368SStephen M. Cameron this_device->raid_level = RAID_UNKNOWN; 3829283b4a9bSStephen M. Cameron this_device->offload_config = 0; 3830283b4a9bSStephen M. Cameron this_device->offload_enabled = 0; 383141ce4c35SStephen Cameron this_device->offload_to_be_enabled = 0; 3832a3144e0bSJoe Handzik this_device->hba_ioaccel_enabled = 0; 38339846590eSStephen M. Cameron this_device->volume_offline = 0; 383403383736SDon Brace this_device->queue_depth = h->nr_cmds; 3835283b4a9bSStephen M. Cameron } 3836edd16368SStephen M. Cameron 38370b0e1d6cSStephen M. Cameron if (is_OBDR_device) { 38380b0e1d6cSStephen M. Cameron /* See if this is a One-Button-Disaster-Recovery device 38390b0e1d6cSStephen M. Cameron * by looking for "$DR-10" at offset 43 in inquiry data. 38400b0e1d6cSStephen M. Cameron */ 38410b0e1d6cSStephen M. Cameron obdr_sig = &inq_buff[OBDR_SIG_OFFSET]; 38420b0e1d6cSStephen M. Cameron *is_OBDR_device = (this_device->devtype == TYPE_ROM && 38430b0e1d6cSStephen M. Cameron strncmp(obdr_sig, OBDR_TAPE_SIG, 38440b0e1d6cSStephen M. Cameron OBDR_SIG_LEN) == 0); 38450b0e1d6cSStephen M. Cameron } 3846edd16368SStephen M. Cameron kfree(inq_buff); 3847edd16368SStephen M. Cameron return 0; 3848edd16368SStephen M. Cameron 3849edd16368SStephen M. Cameron bail_out: 3850edd16368SStephen M. Cameron kfree(inq_buff); 3851683fc444SDon Brace return rc; 3852edd16368SStephen M. Cameron } 3853edd16368SStephen M. Cameron 38549b5c48c2SStephen Cameron static void hpsa_update_device_supports_aborts(struct ctlr_info *h, 38559b5c48c2SStephen Cameron struct hpsa_scsi_dev_t *dev, u8 *scsi3addr) 38569b5c48c2SStephen Cameron { 38579b5c48c2SStephen Cameron unsigned long flags; 38589b5c48c2SStephen Cameron int rc, entry; 38599b5c48c2SStephen Cameron /* 38609b5c48c2SStephen Cameron * See if this device supports aborts. If we already know 38619b5c48c2SStephen Cameron * the device, we already know if it supports aborts, otherwise 38629b5c48c2SStephen Cameron * we have to find out if it supports aborts by trying one. 38639b5c48c2SStephen Cameron */ 38649b5c48c2SStephen Cameron spin_lock_irqsave(&h->devlock, flags); 38659b5c48c2SStephen Cameron rc = hpsa_scsi_find_entry(dev, h->dev, h->ndevices, &entry); 38669b5c48c2SStephen Cameron if ((rc == DEVICE_SAME || rc == DEVICE_UPDATED) && 38679b5c48c2SStephen Cameron entry >= 0 && entry < h->ndevices) { 38689b5c48c2SStephen Cameron dev->supports_aborts = h->dev[entry]->supports_aborts; 38699b5c48c2SStephen Cameron spin_unlock_irqrestore(&h->devlock, flags); 38709b5c48c2SStephen Cameron } else { 38719b5c48c2SStephen Cameron spin_unlock_irqrestore(&h->devlock, flags); 38729b5c48c2SStephen Cameron dev->supports_aborts = 38739b5c48c2SStephen Cameron hpsa_device_supports_aborts(h, scsi3addr); 38749b5c48c2SStephen Cameron if (dev->supports_aborts < 0) 38759b5c48c2SStephen Cameron dev->supports_aborts = 0; 38769b5c48c2SStephen Cameron } 38779b5c48c2SStephen Cameron } 38789b5c48c2SStephen Cameron 3879c795505aSKevin Barnett /* 3880c795505aSKevin Barnett * Helper function to assign bus, target, lun mapping of devices. 3881edd16368SStephen M. Cameron * Logical drive target and lun are assigned at this time, but 3882edd16368SStephen M. Cameron * physical device lun and target assignment are deferred (assigned 3883edd16368SStephen M. Cameron * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.) 3884edd16368SStephen M. Cameron */ 3885edd16368SStephen M. Cameron static void figure_bus_target_lun(struct ctlr_info *h, 38861f310bdeSStephen M. Cameron u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device) 3887edd16368SStephen M. Cameron { 3888c795505aSKevin Barnett u32 lunid = get_unaligned_le32(lunaddrbytes); 3889edd16368SStephen M. Cameron 38901f310bdeSStephen M. Cameron if (!is_logical_dev_addr_mode(lunaddrbytes)) { 38911f310bdeSStephen M. Cameron /* physical device, target and lun filled in later */ 38921f310bdeSStephen M. Cameron if (is_hba_lunid(lunaddrbytes)) 3893c795505aSKevin Barnett hpsa_set_bus_target_lun(device, 3894c795505aSKevin Barnett HPSA_HBA_BUS, 0, lunid & 0x3fff); 38951f310bdeSStephen M. Cameron else 38961f310bdeSStephen M. Cameron /* defer target, lun assignment for physical devices */ 3897c795505aSKevin Barnett hpsa_set_bus_target_lun(device, 3898c795505aSKevin Barnett HPSA_PHYSICAL_DEVICE_BUS, -1, -1); 38991f310bdeSStephen M. Cameron return; 39001f310bdeSStephen M. Cameron } 39011f310bdeSStephen M. Cameron /* It's a logical device */ 390266749d0dSScott Teel if (device->external) { 39031f310bdeSStephen M. Cameron hpsa_set_bus_target_lun(device, 3904c795505aSKevin Barnett HPSA_EXTERNAL_RAID_VOLUME_BUS, (lunid >> 16) & 0x3fff, 3905c795505aSKevin Barnett lunid & 0x00ff); 39061f310bdeSStephen M. Cameron return; 3907339b2b14SStephen M. Cameron } 3908c795505aSKevin Barnett hpsa_set_bus_target_lun(device, HPSA_RAID_VOLUME_BUS, 3909c795505aSKevin Barnett 0, lunid & 0x3fff); 3910edd16368SStephen M. Cameron } 3911edd16368SStephen M. Cameron 3912edd16368SStephen M. Cameron 3913edd16368SStephen M. Cameron /* 391454b6e9e9SScott Teel * Get address of physical disk used for an ioaccel2 mode command: 391554b6e9e9SScott Teel * 1. Extract ioaccel2 handle from the command. 391654b6e9e9SScott Teel * 2. Find a matching ioaccel2 handle from list of physical disks. 391754b6e9e9SScott Teel * 3. Return: 391854b6e9e9SScott Teel * 1 and set scsi3addr to address of matching physical 391954b6e9e9SScott Teel * 0 if no matching physical disk was found. 392054b6e9e9SScott Teel */ 392154b6e9e9SScott Teel static int hpsa_get_pdisk_of_ioaccel2(struct ctlr_info *h, 392254b6e9e9SScott Teel struct CommandList *ioaccel2_cmd_to_abort, unsigned char *scsi3addr) 392354b6e9e9SScott Teel { 392441ce4c35SStephen Cameron struct io_accel2_cmd *c2 = 392541ce4c35SStephen Cameron &h->ioaccel2_cmd_pool[ioaccel2_cmd_to_abort->cmdindex]; 392641ce4c35SStephen Cameron unsigned long flags; 392754b6e9e9SScott Teel int i; 392854b6e9e9SScott Teel 392941ce4c35SStephen Cameron spin_lock_irqsave(&h->devlock, flags); 393041ce4c35SStephen Cameron for (i = 0; i < h->ndevices; i++) 393141ce4c35SStephen Cameron if (h->dev[i]->ioaccel_handle == le32_to_cpu(c2->scsi_nexus)) { 393241ce4c35SStephen Cameron memcpy(scsi3addr, h->dev[i]->scsi3addr, 393341ce4c35SStephen Cameron sizeof(h->dev[i]->scsi3addr)); 393441ce4c35SStephen Cameron spin_unlock_irqrestore(&h->devlock, flags); 393554b6e9e9SScott Teel return 1; 393654b6e9e9SScott Teel } 393741ce4c35SStephen Cameron spin_unlock_irqrestore(&h->devlock, flags); 393841ce4c35SStephen Cameron return 0; 393941ce4c35SStephen Cameron } 394041ce4c35SStephen Cameron 394166749d0dSScott Teel static int figure_external_status(struct ctlr_info *h, int raid_ctlr_position, 394266749d0dSScott Teel int i, int nphysicals, int nlocal_logicals) 394366749d0dSScott Teel { 394466749d0dSScott Teel /* In report logicals, local logicals are listed first, 394566749d0dSScott Teel * then any externals. 394666749d0dSScott Teel */ 394766749d0dSScott Teel int logicals_start = nphysicals + (raid_ctlr_position == 0); 394866749d0dSScott Teel 394966749d0dSScott Teel if (i == raid_ctlr_position) 395066749d0dSScott Teel return 0; 395166749d0dSScott Teel 395266749d0dSScott Teel if (i < logicals_start) 395366749d0dSScott Teel return 0; 395466749d0dSScott Teel 395566749d0dSScott Teel /* i is in logicals range, but still within local logicals */ 395666749d0dSScott Teel if ((i - nphysicals - (raid_ctlr_position == 0)) < nlocal_logicals) 395766749d0dSScott Teel return 0; 395866749d0dSScott Teel 395966749d0dSScott Teel return 1; /* it's an external lun */ 396066749d0dSScott Teel } 396166749d0dSScott Teel 396254b6e9e9SScott Teel /* 3963edd16368SStephen M. Cameron * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev, 3964edd16368SStephen M. Cameron * logdev. The number of luns in physdev and logdev are returned in 3965edd16368SStephen M. Cameron * *nphysicals and *nlogicals, respectively. 3966edd16368SStephen M. Cameron * Returns 0 on success, -1 otherwise. 3967edd16368SStephen M. Cameron */ 3968edd16368SStephen M. Cameron static int hpsa_gather_lun_info(struct ctlr_info *h, 396903383736SDon Brace struct ReportExtendedLUNdata *physdev, u32 *nphysicals, 397001a02ffcSStephen M. Cameron struct ReportLUNdata *logdev, u32 *nlogicals) 3971edd16368SStephen M. Cameron { 397203383736SDon Brace if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) { 3973edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 3974edd16368SStephen M. Cameron return -1; 3975edd16368SStephen M. Cameron } 397603383736SDon Brace *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24; 3977edd16368SStephen M. Cameron if (*nphysicals > HPSA_MAX_PHYS_LUN) { 397803383736SDon Brace dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n", 397903383736SDon Brace HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN); 3980edd16368SStephen M. Cameron *nphysicals = HPSA_MAX_PHYS_LUN; 3981edd16368SStephen M. Cameron } 398203383736SDon Brace if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) { 3983edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "report logical LUNs failed.\n"); 3984edd16368SStephen M. Cameron return -1; 3985edd16368SStephen M. Cameron } 39866df1e954SStephen M. Cameron *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8; 3987edd16368SStephen M. Cameron /* Reject Logicals in excess of our max capability. */ 3988edd16368SStephen M. Cameron if (*nlogicals > HPSA_MAX_LUN) { 3989edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 3990edd16368SStephen M. Cameron "maximum logical LUNs (%d) exceeded. " 3991edd16368SStephen M. Cameron "%d LUNs ignored.\n", HPSA_MAX_LUN, 3992edd16368SStephen M. Cameron *nlogicals - HPSA_MAX_LUN); 3993edd16368SStephen M. Cameron *nlogicals = HPSA_MAX_LUN; 3994edd16368SStephen M. Cameron } 3995edd16368SStephen M. Cameron if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) { 3996edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 3997edd16368SStephen M. Cameron "maximum logical + physical LUNs (%d) exceeded. " 3998edd16368SStephen M. Cameron "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN, 3999edd16368SStephen M. Cameron *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN); 4000edd16368SStephen M. Cameron *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals; 4001edd16368SStephen M. Cameron } 4002edd16368SStephen M. Cameron return 0; 4003edd16368SStephen M. Cameron } 4004edd16368SStephen M. Cameron 400542a91641SDon Brace static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, 400642a91641SDon Brace int i, int nphysicals, int nlogicals, 4007a93aa1feSMatt Gates struct ReportExtendedLUNdata *physdev_list, 4008339b2b14SStephen M. Cameron struct ReportLUNdata *logdev_list) 4009339b2b14SStephen M. Cameron { 4010339b2b14SStephen M. Cameron /* Helper function, figure out where the LUN ID info is coming from 4011339b2b14SStephen M. Cameron * given index i, lists of physical and logical devices, where in 4012339b2b14SStephen M. Cameron * the list the raid controller is supposed to appear (first or last) 4013339b2b14SStephen M. Cameron */ 4014339b2b14SStephen M. Cameron 4015339b2b14SStephen M. Cameron int logicals_start = nphysicals + (raid_ctlr_position == 0); 4016339b2b14SStephen M. Cameron int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0); 4017339b2b14SStephen M. Cameron 4018339b2b14SStephen M. Cameron if (i == raid_ctlr_position) 4019339b2b14SStephen M. Cameron return RAID_CTLR_LUNID; 4020339b2b14SStephen M. Cameron 4021339b2b14SStephen M. Cameron if (i < logicals_start) 4022d5b5d964SStephen M. Cameron return &physdev_list->LUN[i - 4023d5b5d964SStephen M. Cameron (raid_ctlr_position == 0)].lunid[0]; 4024339b2b14SStephen M. Cameron 4025339b2b14SStephen M. Cameron if (i < last_device) 4026339b2b14SStephen M. Cameron return &logdev_list->LUN[i - nphysicals - 4027339b2b14SStephen M. Cameron (raid_ctlr_position == 0)][0]; 4028339b2b14SStephen M. Cameron BUG(); 4029339b2b14SStephen M. Cameron return NULL; 4030339b2b14SStephen M. Cameron } 4031339b2b14SStephen M. Cameron 403203383736SDon Brace /* get physical drive ioaccel handle and queue depth */ 403303383736SDon Brace static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h, 403403383736SDon Brace struct hpsa_scsi_dev_t *dev, 4035f2039b03SDon Brace struct ReportExtendedLUNdata *rlep, int rle_index, 403603383736SDon Brace struct bmic_identify_physical_device *id_phys) 403703383736SDon Brace { 403803383736SDon Brace int rc; 4039f2039b03SDon Brace struct ext_report_lun_entry *rle = &rlep->LUN[rle_index]; 404003383736SDon Brace 404103383736SDon Brace dev->ioaccel_handle = rle->ioaccel_handle; 4042f2039b03SDon Brace if ((rle->device_flags & 0x08) && dev->ioaccel_handle) 4043a3144e0bSJoe Handzik dev->hba_ioaccel_enabled = 1; 404403383736SDon Brace memset(id_phys, 0, sizeof(*id_phys)); 4045f2039b03SDon Brace rc = hpsa_bmic_id_physical_device(h, &rle->lunid[0], 4046f2039b03SDon Brace GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]), id_phys, 404703383736SDon Brace sizeof(*id_phys)); 404803383736SDon Brace if (!rc) 404903383736SDon Brace /* Reserve space for FW operations */ 405003383736SDon Brace #define DRIVE_CMDS_RESERVED_FOR_FW 2 405103383736SDon Brace #define DRIVE_QUEUE_DEPTH 7 405203383736SDon Brace dev->queue_depth = 405303383736SDon Brace le16_to_cpu(id_phys->current_queue_depth_limit) - 405403383736SDon Brace DRIVE_CMDS_RESERVED_FOR_FW; 405503383736SDon Brace else 405603383736SDon Brace dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */ 405703383736SDon Brace } 405803383736SDon Brace 40598270b862SJoe Handzik static void hpsa_get_path_info(struct hpsa_scsi_dev_t *this_device, 4060f2039b03SDon Brace struct ReportExtendedLUNdata *rlep, int rle_index, 40618270b862SJoe Handzik struct bmic_identify_physical_device *id_phys) 40628270b862SJoe Handzik { 4063f2039b03SDon Brace struct ext_report_lun_entry *rle = &rlep->LUN[rle_index]; 4064f2039b03SDon Brace 4065f2039b03SDon Brace if ((rle->device_flags & 0x08) && this_device->ioaccel_handle) 40668270b862SJoe Handzik this_device->hba_ioaccel_enabled = 1; 40678270b862SJoe Handzik 40688270b862SJoe Handzik memcpy(&this_device->active_path_index, 40698270b862SJoe Handzik &id_phys->active_path_number, 40708270b862SJoe Handzik sizeof(this_device->active_path_index)); 40718270b862SJoe Handzik memcpy(&this_device->path_map, 40728270b862SJoe Handzik &id_phys->redundant_path_present_map, 40738270b862SJoe Handzik sizeof(this_device->path_map)); 40748270b862SJoe Handzik memcpy(&this_device->box, 40758270b862SJoe Handzik &id_phys->alternate_paths_phys_box_on_port, 40768270b862SJoe Handzik sizeof(this_device->box)); 40778270b862SJoe Handzik memcpy(&this_device->phys_connector, 40788270b862SJoe Handzik &id_phys->alternate_paths_phys_connector, 40798270b862SJoe Handzik sizeof(this_device->phys_connector)); 40808270b862SJoe Handzik memcpy(&this_device->bay, 40818270b862SJoe Handzik &id_phys->phys_bay_in_box, 40828270b862SJoe Handzik sizeof(this_device->bay)); 40838270b862SJoe Handzik } 40848270b862SJoe Handzik 408566749d0dSScott Teel /* get number of local logical disks. */ 408666749d0dSScott Teel static int hpsa_set_local_logical_count(struct ctlr_info *h, 408766749d0dSScott Teel struct bmic_identify_controller *id_ctlr, 408866749d0dSScott Teel u32 *nlocals) 408966749d0dSScott Teel { 409066749d0dSScott Teel int rc; 409166749d0dSScott Teel 409266749d0dSScott Teel if (!id_ctlr) { 409366749d0dSScott Teel dev_warn(&h->pdev->dev, "%s: id_ctlr buffer is NULL.\n", 409466749d0dSScott Teel __func__); 409566749d0dSScott Teel return -ENOMEM; 409666749d0dSScott Teel } 409766749d0dSScott Teel memset(id_ctlr, 0, sizeof(*id_ctlr)); 409866749d0dSScott Teel rc = hpsa_bmic_id_controller(h, id_ctlr, sizeof(*id_ctlr)); 409966749d0dSScott Teel if (!rc) 410066749d0dSScott Teel if (id_ctlr->configured_logical_drive_count < 256) 410166749d0dSScott Teel *nlocals = id_ctlr->configured_logical_drive_count; 410266749d0dSScott Teel else 410366749d0dSScott Teel *nlocals = le16_to_cpu( 410466749d0dSScott Teel id_ctlr->extended_logical_unit_count); 410566749d0dSScott Teel else 410666749d0dSScott Teel *nlocals = -1; 410766749d0dSScott Teel return rc; 410866749d0dSScott Teel } 410966749d0dSScott Teel 411066749d0dSScott Teel 41118aa60681SDon Brace static void hpsa_update_scsi_devices(struct ctlr_info *h) 4112edd16368SStephen M. Cameron { 4113edd16368SStephen M. Cameron /* the idea here is we could get notified 4114edd16368SStephen M. Cameron * that some devices have changed, so we do a report 4115edd16368SStephen M. Cameron * physical luns and report logical luns cmd, and adjust 4116edd16368SStephen M. Cameron * our list of devices accordingly. 4117edd16368SStephen M. Cameron * 4118edd16368SStephen M. Cameron * The scsi3addr's of devices won't change so long as the 4119edd16368SStephen M. Cameron * adapter is not reset. That means we can rescan and 4120edd16368SStephen M. Cameron * tell which devices we already know about, vs. new 4121edd16368SStephen M. Cameron * devices, vs. disappearing devices. 4122edd16368SStephen M. Cameron */ 4123a93aa1feSMatt Gates struct ReportExtendedLUNdata *physdev_list = NULL; 4124edd16368SStephen M. Cameron struct ReportLUNdata *logdev_list = NULL; 412503383736SDon Brace struct bmic_identify_physical_device *id_phys = NULL; 412666749d0dSScott Teel struct bmic_identify_controller *id_ctlr = NULL; 412701a02ffcSStephen M. Cameron u32 nphysicals = 0; 412801a02ffcSStephen M. Cameron u32 nlogicals = 0; 412966749d0dSScott Teel u32 nlocal_logicals = 0; 413001a02ffcSStephen M. Cameron u32 ndev_allocated = 0; 4131edd16368SStephen M. Cameron struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice; 4132edd16368SStephen M. Cameron int ncurrent = 0; 41334f4eb9f1SScott Teel int i, n_ext_target_devs, ndevs_to_allocate; 4134339b2b14SStephen M. Cameron int raid_ctlr_position; 413504fa2f44SKevin Barnett bool physical_device; 4136aca4a520SScott Teel DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS); 4137edd16368SStephen M. Cameron 4138cfe5badcSScott Teel currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL); 413992084715SStephen M. Cameron physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL); 414092084715SStephen M. Cameron logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL); 4141edd16368SStephen M. Cameron tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL); 414203383736SDon Brace id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 414366749d0dSScott Teel id_ctlr = kzalloc(sizeof(*id_ctlr), GFP_KERNEL); 4144edd16368SStephen M. Cameron 414503383736SDon Brace if (!currentsd || !physdev_list || !logdev_list || 414666749d0dSScott Teel !tmpdevice || !id_phys || !id_ctlr) { 4147edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "out of memory\n"); 4148edd16368SStephen M. Cameron goto out; 4149edd16368SStephen M. Cameron } 4150edd16368SStephen M. Cameron memset(lunzerobits, 0, sizeof(lunzerobits)); 4151edd16368SStephen M. Cameron 4152853633e8SDon Brace h->drv_req_rescan = 0; /* cancel scheduled rescan - we're doing it. */ 4153853633e8SDon Brace 415403383736SDon Brace if (hpsa_gather_lun_info(h, physdev_list, &nphysicals, 4155853633e8SDon Brace logdev_list, &nlogicals)) { 4156853633e8SDon Brace h->drv_req_rescan = 1; 4157edd16368SStephen M. Cameron goto out; 4158853633e8SDon Brace } 4159edd16368SStephen M. Cameron 416066749d0dSScott Teel /* Set number of local logicals (non PTRAID) */ 416166749d0dSScott Teel if (hpsa_set_local_logical_count(h, id_ctlr, &nlocal_logicals)) { 416266749d0dSScott Teel dev_warn(&h->pdev->dev, 416366749d0dSScott Teel "%s: Can't determine number of local logical devices.\n", 416466749d0dSScott Teel __func__); 416566749d0dSScott Teel } 4166edd16368SStephen M. Cameron 4167aca4a520SScott Teel /* We might see up to the maximum number of logical and physical disks 4168aca4a520SScott Teel * plus external target devices, and a device for the local RAID 4169aca4a520SScott Teel * controller. 4170edd16368SStephen M. Cameron */ 4171aca4a520SScott Teel ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1; 4172edd16368SStephen M. Cameron 4173edd16368SStephen M. Cameron /* Allocate the per device structures */ 4174edd16368SStephen M. Cameron for (i = 0; i < ndevs_to_allocate; i++) { 4175b7ec021fSScott Teel if (i >= HPSA_MAX_DEVICES) { 4176b7ec021fSScott Teel dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded." 4177b7ec021fSScott Teel " %d devices ignored.\n", HPSA_MAX_DEVICES, 4178b7ec021fSScott Teel ndevs_to_allocate - HPSA_MAX_DEVICES); 4179b7ec021fSScott Teel break; 4180b7ec021fSScott Teel } 4181b7ec021fSScott Teel 4182edd16368SStephen M. Cameron currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL); 4183edd16368SStephen M. Cameron if (!currentsd[i]) { 4184edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "out of memory at %s:%d\n", 4185edd16368SStephen M. Cameron __FILE__, __LINE__); 4186853633e8SDon Brace h->drv_req_rescan = 1; 4187edd16368SStephen M. Cameron goto out; 4188edd16368SStephen M. Cameron } 4189edd16368SStephen M. Cameron ndev_allocated++; 4190edd16368SStephen M. Cameron } 4191edd16368SStephen M. Cameron 41928645291bSStephen M. Cameron if (is_scsi_rev_5(h)) 4193339b2b14SStephen M. Cameron raid_ctlr_position = 0; 4194339b2b14SStephen M. Cameron else 4195339b2b14SStephen M. Cameron raid_ctlr_position = nphysicals + nlogicals; 4196339b2b14SStephen M. Cameron 4197edd16368SStephen M. Cameron /* adjust our table of devices */ 41984f4eb9f1SScott Teel n_ext_target_devs = 0; 4199edd16368SStephen M. Cameron for (i = 0; i < nphysicals + nlogicals + 1; i++) { 42000b0e1d6cSStephen M. Cameron u8 *lunaddrbytes, is_OBDR = 0; 4201683fc444SDon Brace int rc = 0; 4202f2039b03SDon Brace int phys_dev_index = i - (raid_ctlr_position == 0); 4203edd16368SStephen M. Cameron 420404fa2f44SKevin Barnett physical_device = i < nphysicals + (raid_ctlr_position == 0); 4205edd16368SStephen M. Cameron 4206edd16368SStephen M. Cameron /* Figure out where the LUN ID info is coming from */ 4207339b2b14SStephen M. Cameron lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position, 4208339b2b14SStephen M. Cameron i, nphysicals, nlogicals, physdev_list, logdev_list); 420941ce4c35SStephen Cameron 421041ce4c35SStephen Cameron /* skip masked non-disk devices */ 421104fa2f44SKevin Barnett if (MASKED_DEVICE(lunaddrbytes) && physical_device && 4212cca8f13bSDon Brace (physdev_list->LUN[phys_dev_index].device_type != 0x06) && 421304fa2f44SKevin Barnett (physdev_list->LUN[phys_dev_index].device_flags & 0x01)) 4214edd16368SStephen M. Cameron continue; 4215edd16368SStephen M. Cameron 4216edd16368SStephen M. Cameron /* Get device type, vendor, model, device id */ 4217683fc444SDon Brace rc = hpsa_update_device_info(h, lunaddrbytes, tmpdevice, 4218683fc444SDon Brace &is_OBDR); 4219683fc444SDon Brace if (rc == -ENOMEM) { 4220683fc444SDon Brace dev_warn(&h->pdev->dev, 4221683fc444SDon Brace "Out of memory, rescan deferred.\n"); 4222853633e8SDon Brace h->drv_req_rescan = 1; 4223683fc444SDon Brace goto out; 4224853633e8SDon Brace } 4225683fc444SDon Brace if (rc) { 4226683fc444SDon Brace dev_warn(&h->pdev->dev, 4227683fc444SDon Brace "Inquiry failed, skipping device.\n"); 4228683fc444SDon Brace continue; 4229683fc444SDon Brace } 4230683fc444SDon Brace 423166749d0dSScott Teel /* Determine if this is a lun from an external target array */ 423266749d0dSScott Teel tmpdevice->external = 423366749d0dSScott Teel figure_external_status(h, raid_ctlr_position, i, 423466749d0dSScott Teel nphysicals, nlocal_logicals); 423566749d0dSScott Teel 42361f310bdeSStephen M. Cameron figure_bus_target_lun(h, lunaddrbytes, tmpdevice); 42379b5c48c2SStephen Cameron hpsa_update_device_supports_aborts(h, tmpdevice, lunaddrbytes); 4238edd16368SStephen M. Cameron this_device = currentsd[ncurrent]; 4239edd16368SStephen M. Cameron 424034592254SScott Teel /* Turn on discovery_polling if there are ext target devices. 424134592254SScott Teel * Event-based change notification is unreliable for those. 4242edd16368SStephen M. Cameron */ 424334592254SScott Teel if (!h->discovery_polling) { 424434592254SScott Teel if (tmpdevice->external) { 424534592254SScott Teel h->discovery_polling = 1; 424634592254SScott Teel dev_info(&h->pdev->dev, 424734592254SScott Teel "External target, activate discovery polling.\n"); 4248edd16368SStephen M. Cameron } 424934592254SScott Teel } 425034592254SScott Teel 4251edd16368SStephen M. Cameron 4252edd16368SStephen M. Cameron *this_device = *tmpdevice; 425304fa2f44SKevin Barnett this_device->physical_device = physical_device; 4254edd16368SStephen M. Cameron 425504fa2f44SKevin Barnett /* 425604fa2f44SKevin Barnett * Expose all devices except for physical devices that 425704fa2f44SKevin Barnett * are masked. 425804fa2f44SKevin Barnett */ 425904fa2f44SKevin Barnett if (MASKED_DEVICE(lunaddrbytes) && this_device->physical_device) 42602a168208SKevin Barnett this_device->expose_device = 0; 42612a168208SKevin Barnett else 42622a168208SKevin Barnett this_device->expose_device = 1; 426341ce4c35SStephen Cameron 4264d04e62b9SKevin Barnett 4265d04e62b9SKevin Barnett /* 4266d04e62b9SKevin Barnett * Get the SAS address for physical devices that are exposed. 4267d04e62b9SKevin Barnett */ 4268d04e62b9SKevin Barnett if (this_device->physical_device && this_device->expose_device) 4269d04e62b9SKevin Barnett hpsa_get_sas_address(h, lunaddrbytes, this_device); 4270edd16368SStephen M. Cameron 4271edd16368SStephen M. Cameron switch (this_device->devtype) { 42720b0e1d6cSStephen M. Cameron case TYPE_ROM: 4273edd16368SStephen M. Cameron /* We don't *really* support actual CD-ROM devices, 4274edd16368SStephen M. Cameron * just "One Button Disaster Recovery" tape drive 4275edd16368SStephen M. Cameron * which temporarily pretends to be a CD-ROM drive. 4276edd16368SStephen M. Cameron * So we check that the device is really an OBDR tape 4277edd16368SStephen M. Cameron * device by checking for "$DR-10" in bytes 43-48 of 4278edd16368SStephen M. Cameron * the inquiry data. 4279edd16368SStephen M. Cameron */ 42800b0e1d6cSStephen M. Cameron if (is_OBDR) 4281edd16368SStephen M. Cameron ncurrent++; 4282edd16368SStephen M. Cameron break; 4283edd16368SStephen M. Cameron case TYPE_DISK: 4284af15ed36SDon Brace case TYPE_ZBC: 428504fa2f44SKevin Barnett if (this_device->physical_device) { 4286b9092b79SKevin Barnett /* The disk is in HBA mode. */ 4287b9092b79SKevin Barnett /* Never use RAID mapper in HBA mode. */ 4288ecf418d1SJoe Handzik this_device->offload_enabled = 0; 428903383736SDon Brace hpsa_get_ioaccel_drive_info(h, this_device, 4290f2039b03SDon Brace physdev_list, phys_dev_index, id_phys); 4291f2039b03SDon Brace hpsa_get_path_info(this_device, 4292f2039b03SDon Brace physdev_list, phys_dev_index, id_phys); 4293b9092b79SKevin Barnett } 4294edd16368SStephen M. Cameron ncurrent++; 4295edd16368SStephen M. Cameron break; 4296edd16368SStephen M. Cameron case TYPE_TAPE: 4297edd16368SStephen M. Cameron case TYPE_MEDIUM_CHANGER: 4298cca8f13bSDon Brace ncurrent++; 4299cca8f13bSDon Brace break; 430041ce4c35SStephen Cameron case TYPE_ENCLOSURE: 430117a9e54aSDon Brace if (!this_device->external) 4302cca8f13bSDon Brace hpsa_get_enclosure_info(h, lunaddrbytes, 4303cca8f13bSDon Brace physdev_list, phys_dev_index, 4304cca8f13bSDon Brace this_device); 430541ce4c35SStephen Cameron ncurrent++; 430641ce4c35SStephen Cameron break; 4307edd16368SStephen M. Cameron case TYPE_RAID: 4308edd16368SStephen M. Cameron /* Only present the Smartarray HBA as a RAID controller. 4309edd16368SStephen M. Cameron * If it's a RAID controller other than the HBA itself 4310edd16368SStephen M. Cameron * (an external RAID controller, MSA500 or similar) 4311edd16368SStephen M. Cameron * don't present it. 4312edd16368SStephen M. Cameron */ 4313edd16368SStephen M. Cameron if (!is_hba_lunid(lunaddrbytes)) 4314edd16368SStephen M. Cameron break; 4315edd16368SStephen M. Cameron ncurrent++; 4316edd16368SStephen M. Cameron break; 4317edd16368SStephen M. Cameron default: 4318edd16368SStephen M. Cameron break; 4319edd16368SStephen M. Cameron } 4320cfe5badcSScott Teel if (ncurrent >= HPSA_MAX_DEVICES) 4321edd16368SStephen M. Cameron break; 4322edd16368SStephen M. Cameron } 4323d04e62b9SKevin Barnett 4324d04e62b9SKevin Barnett if (h->sas_host == NULL) { 4325d04e62b9SKevin Barnett int rc = 0; 4326d04e62b9SKevin Barnett 4327d04e62b9SKevin Barnett rc = hpsa_add_sas_host(h); 4328d04e62b9SKevin Barnett if (rc) { 4329d04e62b9SKevin Barnett dev_warn(&h->pdev->dev, 4330d04e62b9SKevin Barnett "Could not add sas host %d\n", rc); 4331d04e62b9SKevin Barnett goto out; 4332d04e62b9SKevin Barnett } 4333d04e62b9SKevin Barnett } 4334d04e62b9SKevin Barnett 43358aa60681SDon Brace adjust_hpsa_scsi_table(h, currentsd, ncurrent); 4336edd16368SStephen M. Cameron out: 4337edd16368SStephen M. Cameron kfree(tmpdevice); 4338edd16368SStephen M. Cameron for (i = 0; i < ndev_allocated; i++) 4339edd16368SStephen M. Cameron kfree(currentsd[i]); 4340edd16368SStephen M. Cameron kfree(currentsd); 4341edd16368SStephen M. Cameron kfree(physdev_list); 4342edd16368SStephen M. Cameron kfree(logdev_list); 434366749d0dSScott Teel kfree(id_ctlr); 434403383736SDon Brace kfree(id_phys); 4345edd16368SStephen M. Cameron } 4346edd16368SStephen M. Cameron 4347ec5cbf04SWebb Scales static void hpsa_set_sg_descriptor(struct SGDescriptor *desc, 4348ec5cbf04SWebb Scales struct scatterlist *sg) 4349ec5cbf04SWebb Scales { 4350ec5cbf04SWebb Scales u64 addr64 = (u64) sg_dma_address(sg); 4351ec5cbf04SWebb Scales unsigned int len = sg_dma_len(sg); 4352ec5cbf04SWebb Scales 4353ec5cbf04SWebb Scales desc->Addr = cpu_to_le64(addr64); 4354ec5cbf04SWebb Scales desc->Len = cpu_to_le32(len); 4355ec5cbf04SWebb Scales desc->Ext = 0; 4356ec5cbf04SWebb Scales } 4357ec5cbf04SWebb Scales 4358c7ee65b3SWebb Scales /* 4359c7ee65b3SWebb Scales * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci 4360edd16368SStephen M. Cameron * dma mapping and fills in the scatter gather entries of the 4361edd16368SStephen M. Cameron * hpsa command, cp. 4362edd16368SStephen M. Cameron */ 436333a2ffceSStephen M. Cameron static int hpsa_scatter_gather(struct ctlr_info *h, 4364edd16368SStephen M. Cameron struct CommandList *cp, 4365edd16368SStephen M. Cameron struct scsi_cmnd *cmd) 4366edd16368SStephen M. Cameron { 4367edd16368SStephen M. Cameron struct scatterlist *sg; 4368b3a7ba7cSWebb Scales int use_sg, i, sg_limit, chained, last_sg; 436933a2ffceSStephen M. Cameron struct SGDescriptor *curr_sg; 4370edd16368SStephen M. Cameron 437133a2ffceSStephen M. Cameron BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 4372edd16368SStephen M. Cameron 4373edd16368SStephen M. Cameron use_sg = scsi_dma_map(cmd); 4374edd16368SStephen M. Cameron if (use_sg < 0) 4375edd16368SStephen M. Cameron return use_sg; 4376edd16368SStephen M. Cameron 4377edd16368SStephen M. Cameron if (!use_sg) 4378edd16368SStephen M. Cameron goto sglist_finished; 4379edd16368SStephen M. Cameron 4380b3a7ba7cSWebb Scales /* 4381b3a7ba7cSWebb Scales * If the number of entries is greater than the max for a single list, 4382b3a7ba7cSWebb Scales * then we have a chained list; we will set up all but one entry in the 4383b3a7ba7cSWebb Scales * first list (the last entry is saved for link information); 4384b3a7ba7cSWebb Scales * otherwise, we don't have a chained list and we'll set up at each of 4385b3a7ba7cSWebb Scales * the entries in the one list. 4386b3a7ba7cSWebb Scales */ 438733a2ffceSStephen M. Cameron curr_sg = cp->SG; 4388b3a7ba7cSWebb Scales chained = use_sg > h->max_cmd_sg_entries; 4389b3a7ba7cSWebb Scales sg_limit = chained ? h->max_cmd_sg_entries - 1 : use_sg; 4390b3a7ba7cSWebb Scales last_sg = scsi_sg_count(cmd) - 1; 4391b3a7ba7cSWebb Scales scsi_for_each_sg(cmd, sg, sg_limit, i) { 4392ec5cbf04SWebb Scales hpsa_set_sg_descriptor(curr_sg, sg); 439333a2ffceSStephen M. Cameron curr_sg++; 439433a2ffceSStephen M. Cameron } 4395ec5cbf04SWebb Scales 4396b3a7ba7cSWebb Scales if (chained) { 4397b3a7ba7cSWebb Scales /* 4398b3a7ba7cSWebb Scales * Continue with the chained list. Set curr_sg to the chained 4399b3a7ba7cSWebb Scales * list. Modify the limit to the total count less the entries 4400b3a7ba7cSWebb Scales * we've already set up. Resume the scan at the list entry 4401b3a7ba7cSWebb Scales * where the previous loop left off. 4402b3a7ba7cSWebb Scales */ 4403b3a7ba7cSWebb Scales curr_sg = h->cmd_sg_list[cp->cmdindex]; 4404b3a7ba7cSWebb Scales sg_limit = use_sg - sg_limit; 4405b3a7ba7cSWebb Scales for_each_sg(sg, sg, sg_limit, i) { 4406b3a7ba7cSWebb Scales hpsa_set_sg_descriptor(curr_sg, sg); 4407b3a7ba7cSWebb Scales curr_sg++; 4408b3a7ba7cSWebb Scales } 4409b3a7ba7cSWebb Scales } 4410b3a7ba7cSWebb Scales 4411ec5cbf04SWebb Scales /* Back the pointer up to the last entry and mark it as "last". */ 4412b3a7ba7cSWebb Scales (curr_sg - 1)->Ext = cpu_to_le32(HPSA_SG_LAST); 441333a2ffceSStephen M. Cameron 441433a2ffceSStephen M. Cameron if (use_sg + chained > h->maxSG) 441533a2ffceSStephen M. Cameron h->maxSG = use_sg + chained; 441633a2ffceSStephen M. Cameron 441733a2ffceSStephen M. Cameron if (chained) { 441833a2ffceSStephen M. Cameron cp->Header.SGList = h->max_cmd_sg_entries; 441950a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(use_sg + 1); 4420e2bea6dfSStephen M. Cameron if (hpsa_map_sg_chain_block(h, cp)) { 4421e2bea6dfSStephen M. Cameron scsi_dma_unmap(cmd); 4422e2bea6dfSStephen M. Cameron return -1; 4423e2bea6dfSStephen M. Cameron } 442433a2ffceSStephen M. Cameron return 0; 4425edd16368SStephen M. Cameron } 4426edd16368SStephen M. Cameron 4427edd16368SStephen M. Cameron sglist_finished: 4428edd16368SStephen M. Cameron 442901a02ffcSStephen M. Cameron cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */ 4430c7ee65b3SWebb Scales cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */ 4431edd16368SStephen M. Cameron return 0; 4432edd16368SStephen M. Cameron } 4433edd16368SStephen M. Cameron 4434283b4a9bSStephen M. Cameron #define IO_ACCEL_INELIGIBLE (1) 4435283b4a9bSStephen M. Cameron static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len) 4436283b4a9bSStephen M. Cameron { 4437283b4a9bSStephen M. Cameron int is_write = 0; 4438283b4a9bSStephen M. Cameron u32 block; 4439283b4a9bSStephen M. Cameron u32 block_cnt; 4440283b4a9bSStephen M. Cameron 4441283b4a9bSStephen M. Cameron /* Perform some CDB fixups if needed using 10 byte reads/writes only */ 4442283b4a9bSStephen M. Cameron switch (cdb[0]) { 4443283b4a9bSStephen M. Cameron case WRITE_6: 4444283b4a9bSStephen M. Cameron case WRITE_12: 4445283b4a9bSStephen M. Cameron is_write = 1; 4446283b4a9bSStephen M. Cameron case READ_6: 4447283b4a9bSStephen M. Cameron case READ_12: 4448283b4a9bSStephen M. Cameron if (*cdb_len == 6) { 4449c8a6c9a6SDon Brace block = get_unaligned_be16(&cdb[2]); 4450283b4a9bSStephen M. Cameron block_cnt = cdb[4]; 4451c8a6c9a6SDon Brace if (block_cnt == 0) 4452c8a6c9a6SDon Brace block_cnt = 256; 4453283b4a9bSStephen M. Cameron } else { 4454283b4a9bSStephen M. Cameron BUG_ON(*cdb_len != 12); 4455c8a6c9a6SDon Brace block = get_unaligned_be32(&cdb[2]); 4456c8a6c9a6SDon Brace block_cnt = get_unaligned_be32(&cdb[6]); 4457283b4a9bSStephen M. Cameron } 4458283b4a9bSStephen M. Cameron if (block_cnt > 0xffff) 4459283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 4460283b4a9bSStephen M. Cameron 4461283b4a9bSStephen M. Cameron cdb[0] = is_write ? WRITE_10 : READ_10; 4462283b4a9bSStephen M. Cameron cdb[1] = 0; 4463283b4a9bSStephen M. Cameron cdb[2] = (u8) (block >> 24); 4464283b4a9bSStephen M. Cameron cdb[3] = (u8) (block >> 16); 4465283b4a9bSStephen M. Cameron cdb[4] = (u8) (block >> 8); 4466283b4a9bSStephen M. Cameron cdb[5] = (u8) (block); 4467283b4a9bSStephen M. Cameron cdb[6] = 0; 4468283b4a9bSStephen M. Cameron cdb[7] = (u8) (block_cnt >> 8); 4469283b4a9bSStephen M. Cameron cdb[8] = (u8) (block_cnt); 4470283b4a9bSStephen M. Cameron cdb[9] = 0; 4471283b4a9bSStephen M. Cameron *cdb_len = 10; 4472283b4a9bSStephen M. Cameron break; 4473283b4a9bSStephen M. Cameron } 4474283b4a9bSStephen M. Cameron return 0; 4475283b4a9bSStephen M. Cameron } 4476283b4a9bSStephen M. Cameron 4477c349775eSScott Teel static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h, 4478283b4a9bSStephen M. Cameron struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 447903383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4480e1f7de0cSMatt Gates { 4481e1f7de0cSMatt Gates struct scsi_cmnd *cmd = c->scsi_cmd; 4482e1f7de0cSMatt Gates struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex]; 4483e1f7de0cSMatt Gates unsigned int len; 4484e1f7de0cSMatt Gates unsigned int total_len = 0; 4485e1f7de0cSMatt Gates struct scatterlist *sg; 4486e1f7de0cSMatt Gates u64 addr64; 4487e1f7de0cSMatt Gates int use_sg, i; 4488e1f7de0cSMatt Gates struct SGDescriptor *curr_sg; 4489e1f7de0cSMatt Gates u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE; 4490e1f7de0cSMatt Gates 4491283b4a9bSStephen M. Cameron /* TODO: implement chaining support */ 449203383736SDon Brace if (scsi_sg_count(cmd) > h->ioaccel_maxsg) { 449303383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4494283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 449503383736SDon Brace } 4496283b4a9bSStephen M. Cameron 4497e1f7de0cSMatt Gates BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX); 4498e1f7de0cSMatt Gates 449903383736SDon Brace if (fixup_ioaccel_cdb(cdb, &cdb_len)) { 450003383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4501283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 450203383736SDon Brace } 4503283b4a9bSStephen M. Cameron 4504e1f7de0cSMatt Gates c->cmd_type = CMD_IOACCEL1; 4505e1f7de0cSMatt Gates 4506e1f7de0cSMatt Gates /* Adjust the DMA address to point to the accelerated command buffer */ 4507e1f7de0cSMatt Gates c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle + 4508e1f7de0cSMatt Gates (c->cmdindex * sizeof(*cp)); 4509e1f7de0cSMatt Gates BUG_ON(c->busaddr & 0x0000007F); 4510e1f7de0cSMatt Gates 4511e1f7de0cSMatt Gates use_sg = scsi_dma_map(cmd); 451203383736SDon Brace if (use_sg < 0) { 451303383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4514e1f7de0cSMatt Gates return use_sg; 451503383736SDon Brace } 4516e1f7de0cSMatt Gates 4517e1f7de0cSMatt Gates if (use_sg) { 4518e1f7de0cSMatt Gates curr_sg = cp->SG; 4519e1f7de0cSMatt Gates scsi_for_each_sg(cmd, sg, use_sg, i) { 4520e1f7de0cSMatt Gates addr64 = (u64) sg_dma_address(sg); 4521e1f7de0cSMatt Gates len = sg_dma_len(sg); 4522e1f7de0cSMatt Gates total_len += len; 452350a0decfSStephen M. Cameron curr_sg->Addr = cpu_to_le64(addr64); 452450a0decfSStephen M. Cameron curr_sg->Len = cpu_to_le32(len); 452550a0decfSStephen M. Cameron curr_sg->Ext = cpu_to_le32(0); 4526e1f7de0cSMatt Gates curr_sg++; 4527e1f7de0cSMatt Gates } 452850a0decfSStephen M. Cameron (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST); 4529e1f7de0cSMatt Gates 4530e1f7de0cSMatt Gates switch (cmd->sc_data_direction) { 4531e1f7de0cSMatt Gates case DMA_TO_DEVICE: 4532e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_DATA_OUT; 4533e1f7de0cSMatt Gates break; 4534e1f7de0cSMatt Gates case DMA_FROM_DEVICE: 4535e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_DATA_IN; 4536e1f7de0cSMatt Gates break; 4537e1f7de0cSMatt Gates case DMA_NONE: 4538e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_NODATAXFER; 4539e1f7de0cSMatt Gates break; 4540e1f7de0cSMatt Gates default: 4541e1f7de0cSMatt Gates dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4542e1f7de0cSMatt Gates cmd->sc_data_direction); 4543e1f7de0cSMatt Gates BUG(); 4544e1f7de0cSMatt Gates break; 4545e1f7de0cSMatt Gates } 4546e1f7de0cSMatt Gates } else { 4547e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_NODATAXFER; 4548e1f7de0cSMatt Gates } 4549e1f7de0cSMatt Gates 4550c349775eSScott Teel c->Header.SGList = use_sg; 4551e1f7de0cSMatt Gates /* Fill out the command structure to submit */ 45522b08b3e9SDon Brace cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF); 45532b08b3e9SDon Brace cp->transfer_len = cpu_to_le32(total_len); 45542b08b3e9SDon Brace cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ | 45552b08b3e9SDon Brace (cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK)); 45562b08b3e9SDon Brace cp->control = cpu_to_le32(control); 4557283b4a9bSStephen M. Cameron memcpy(cp->CDB, cdb, cdb_len); 4558283b4a9bSStephen M. Cameron memcpy(cp->CISS_LUN, scsi3addr, 8); 4559c349775eSScott Teel /* Tag was already set at init time. */ 4560e1f7de0cSMatt Gates enqueue_cmd_and_start_io(h, c); 4561e1f7de0cSMatt Gates return 0; 4562e1f7de0cSMatt Gates } 4563edd16368SStephen M. Cameron 4564283b4a9bSStephen M. Cameron /* 4565283b4a9bSStephen M. Cameron * Queue a command directly to a device behind the controller using the 4566283b4a9bSStephen M. Cameron * I/O accelerator path. 4567283b4a9bSStephen M. Cameron */ 4568283b4a9bSStephen M. Cameron static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h, 4569283b4a9bSStephen M. Cameron struct CommandList *c) 4570283b4a9bSStephen M. Cameron { 4571283b4a9bSStephen M. Cameron struct scsi_cmnd *cmd = c->scsi_cmd; 4572283b4a9bSStephen M. Cameron struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4573283b4a9bSStephen M. Cameron 457403383736SDon Brace c->phys_disk = dev; 457503383736SDon Brace 4576283b4a9bSStephen M. Cameron return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle, 457703383736SDon Brace cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev); 4578283b4a9bSStephen M. Cameron } 4579283b4a9bSStephen M. Cameron 4580dd0e19f3SScott Teel /* 4581dd0e19f3SScott Teel * Set encryption parameters for the ioaccel2 request 4582dd0e19f3SScott Teel */ 4583dd0e19f3SScott Teel static void set_encrypt_ioaccel2(struct ctlr_info *h, 4584dd0e19f3SScott Teel struct CommandList *c, struct io_accel2_cmd *cp) 4585dd0e19f3SScott Teel { 4586dd0e19f3SScott Teel struct scsi_cmnd *cmd = c->scsi_cmd; 4587dd0e19f3SScott Teel struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4588dd0e19f3SScott Teel struct raid_map_data *map = &dev->raid_map; 4589dd0e19f3SScott Teel u64 first_block; 4590dd0e19f3SScott Teel 4591dd0e19f3SScott Teel /* Are we doing encryption on this device */ 45922b08b3e9SDon Brace if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON)) 4593dd0e19f3SScott Teel return; 4594dd0e19f3SScott Teel /* Set the data encryption key index. */ 4595dd0e19f3SScott Teel cp->dekindex = map->dekindex; 4596dd0e19f3SScott Teel 4597dd0e19f3SScott Teel /* Set the encryption enable flag, encoded into direction field. */ 4598dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK; 4599dd0e19f3SScott Teel 4600dd0e19f3SScott Teel /* Set encryption tweak values based on logical block address 4601dd0e19f3SScott Teel * If block size is 512, tweak value is LBA. 4602dd0e19f3SScott Teel * For other block sizes, tweak is (LBA * block size)/ 512) 4603dd0e19f3SScott Teel */ 4604dd0e19f3SScott Teel switch (cmd->cmnd[0]) { 4605dd0e19f3SScott Teel /* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */ 4606dd0e19f3SScott Teel case WRITE_6: 4607dd0e19f3SScott Teel case READ_6: 46082b08b3e9SDon Brace first_block = get_unaligned_be16(&cmd->cmnd[2]); 4609dd0e19f3SScott Teel break; 4610dd0e19f3SScott Teel case WRITE_10: 4611dd0e19f3SScott Teel case READ_10: 4612dd0e19f3SScott Teel /* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */ 4613dd0e19f3SScott Teel case WRITE_12: 4614dd0e19f3SScott Teel case READ_12: 46152b08b3e9SDon Brace first_block = get_unaligned_be32(&cmd->cmnd[2]); 4616dd0e19f3SScott Teel break; 4617dd0e19f3SScott Teel case WRITE_16: 4618dd0e19f3SScott Teel case READ_16: 46192b08b3e9SDon Brace first_block = get_unaligned_be64(&cmd->cmnd[2]); 4620dd0e19f3SScott Teel break; 4621dd0e19f3SScott Teel default: 4622dd0e19f3SScott Teel dev_err(&h->pdev->dev, 46232b08b3e9SDon Brace "ERROR: %s: size (0x%x) not supported for encryption\n", 46242b08b3e9SDon Brace __func__, cmd->cmnd[0]); 4625dd0e19f3SScott Teel BUG(); 4626dd0e19f3SScott Teel break; 4627dd0e19f3SScott Teel } 46282b08b3e9SDon Brace 46292b08b3e9SDon Brace if (le32_to_cpu(map->volume_blk_size) != 512) 46302b08b3e9SDon Brace first_block = first_block * 46312b08b3e9SDon Brace le32_to_cpu(map->volume_blk_size)/512; 46322b08b3e9SDon Brace 46332b08b3e9SDon Brace cp->tweak_lower = cpu_to_le32(first_block); 46342b08b3e9SDon Brace cp->tweak_upper = cpu_to_le32(first_block >> 32); 4635dd0e19f3SScott Teel } 4636dd0e19f3SScott Teel 4637c349775eSScott Teel static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h, 4638c349775eSScott Teel struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 463903383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4640c349775eSScott Teel { 4641c349775eSScott Teel struct scsi_cmnd *cmd = c->scsi_cmd; 4642c349775eSScott Teel struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex]; 4643c349775eSScott Teel struct ioaccel2_sg_element *curr_sg; 4644c349775eSScott Teel int use_sg, i; 4645c349775eSScott Teel struct scatterlist *sg; 4646c349775eSScott Teel u64 addr64; 4647c349775eSScott Teel u32 len; 4648c349775eSScott Teel u32 total_len = 0; 4649c349775eSScott Teel 4650d9a729f3SWebb Scales BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 4651c349775eSScott Teel 465203383736SDon Brace if (fixup_ioaccel_cdb(cdb, &cdb_len)) { 465303383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4654c349775eSScott Teel return IO_ACCEL_INELIGIBLE; 465503383736SDon Brace } 465603383736SDon Brace 4657c349775eSScott Teel c->cmd_type = CMD_IOACCEL2; 4658c349775eSScott Teel /* Adjust the DMA address to point to the accelerated command buffer */ 4659c349775eSScott Teel c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle + 4660c349775eSScott Teel (c->cmdindex * sizeof(*cp)); 4661c349775eSScott Teel BUG_ON(c->busaddr & 0x0000007F); 4662c349775eSScott Teel 4663c349775eSScott Teel memset(cp, 0, sizeof(*cp)); 4664c349775eSScott Teel cp->IU_type = IOACCEL2_IU_TYPE; 4665c349775eSScott Teel 4666c349775eSScott Teel use_sg = scsi_dma_map(cmd); 466703383736SDon Brace if (use_sg < 0) { 466803383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4669c349775eSScott Teel return use_sg; 467003383736SDon Brace } 4671c349775eSScott Teel 4672c349775eSScott Teel if (use_sg) { 4673c349775eSScott Teel curr_sg = cp->sg; 4674d9a729f3SWebb Scales if (use_sg > h->ioaccel_maxsg) { 4675d9a729f3SWebb Scales addr64 = le64_to_cpu( 4676d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list[c->cmdindex]->address); 4677d9a729f3SWebb Scales curr_sg->address = cpu_to_le64(addr64); 4678d9a729f3SWebb Scales curr_sg->length = 0; 4679d9a729f3SWebb Scales curr_sg->reserved[0] = 0; 4680d9a729f3SWebb Scales curr_sg->reserved[1] = 0; 4681d9a729f3SWebb Scales curr_sg->reserved[2] = 0; 4682d9a729f3SWebb Scales curr_sg->chain_indicator = 0x80; 4683d9a729f3SWebb Scales 4684d9a729f3SWebb Scales curr_sg = h->ioaccel2_cmd_sg_list[c->cmdindex]; 4685d9a729f3SWebb Scales } 4686c349775eSScott Teel scsi_for_each_sg(cmd, sg, use_sg, i) { 4687c349775eSScott Teel addr64 = (u64) sg_dma_address(sg); 4688c349775eSScott Teel len = sg_dma_len(sg); 4689c349775eSScott Teel total_len += len; 4690c349775eSScott Teel curr_sg->address = cpu_to_le64(addr64); 4691c349775eSScott Teel curr_sg->length = cpu_to_le32(len); 4692c349775eSScott Teel curr_sg->reserved[0] = 0; 4693c349775eSScott Teel curr_sg->reserved[1] = 0; 4694c349775eSScott Teel curr_sg->reserved[2] = 0; 4695c349775eSScott Teel curr_sg->chain_indicator = 0; 4696c349775eSScott Teel curr_sg++; 4697c349775eSScott Teel } 4698c349775eSScott Teel 4699c349775eSScott Teel switch (cmd->sc_data_direction) { 4700c349775eSScott Teel case DMA_TO_DEVICE: 4701dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4702dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_DATA_OUT; 4703c349775eSScott Teel break; 4704c349775eSScott Teel case DMA_FROM_DEVICE: 4705dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4706dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_DATA_IN; 4707c349775eSScott Teel break; 4708c349775eSScott Teel case DMA_NONE: 4709dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4710dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_NO_DATA; 4711c349775eSScott Teel break; 4712c349775eSScott Teel default: 4713c349775eSScott Teel dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4714c349775eSScott Teel cmd->sc_data_direction); 4715c349775eSScott Teel BUG(); 4716c349775eSScott Teel break; 4717c349775eSScott Teel } 4718c349775eSScott Teel } else { 4719dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4720dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_NO_DATA; 4721c349775eSScott Teel } 4722dd0e19f3SScott Teel 4723dd0e19f3SScott Teel /* Set encryption parameters, if necessary */ 4724dd0e19f3SScott Teel set_encrypt_ioaccel2(h, c, cp); 4725dd0e19f3SScott Teel 47262b08b3e9SDon Brace cp->scsi_nexus = cpu_to_le32(ioaccel_handle); 4727f2405db8SDon Brace cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT); 4728c349775eSScott Teel memcpy(cp->cdb, cdb, sizeof(cp->cdb)); 4729c349775eSScott Teel 4730c349775eSScott Teel cp->data_len = cpu_to_le32(total_len); 4731c349775eSScott Teel cp->err_ptr = cpu_to_le64(c->busaddr + 4732c349775eSScott Teel offsetof(struct io_accel2_cmd, error_data)); 473350a0decfSStephen M. Cameron cp->err_len = cpu_to_le32(sizeof(cp->error_data)); 4734c349775eSScott Teel 4735d9a729f3SWebb Scales /* fill in sg elements */ 4736d9a729f3SWebb Scales if (use_sg > h->ioaccel_maxsg) { 4737d9a729f3SWebb Scales cp->sg_count = 1; 4738a736e9b6SDon Brace cp->sg[0].length = cpu_to_le32(use_sg * sizeof(cp->sg[0])); 4739d9a729f3SWebb Scales if (hpsa_map_ioaccel2_sg_chain_block(h, cp, c)) { 4740d9a729f3SWebb Scales atomic_dec(&phys_disk->ioaccel_cmds_out); 4741d9a729f3SWebb Scales scsi_dma_unmap(cmd); 4742d9a729f3SWebb Scales return -1; 4743d9a729f3SWebb Scales } 4744d9a729f3SWebb Scales } else 4745d9a729f3SWebb Scales cp->sg_count = (u8) use_sg; 4746d9a729f3SWebb Scales 4747c349775eSScott Teel enqueue_cmd_and_start_io(h, c); 4748c349775eSScott Teel return 0; 4749c349775eSScott Teel } 4750c349775eSScott Teel 4751c349775eSScott Teel /* 4752c349775eSScott Teel * Queue a command to the correct I/O accelerator path. 4753c349775eSScott Teel */ 4754c349775eSScott Teel static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h, 4755c349775eSScott Teel struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 475603383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4757c349775eSScott Teel { 475803383736SDon Brace /* Try to honor the device's queue depth */ 475903383736SDon Brace if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) > 476003383736SDon Brace phys_disk->queue_depth) { 476103383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 476203383736SDon Brace return IO_ACCEL_INELIGIBLE; 476303383736SDon Brace } 4764c349775eSScott Teel if (h->transMethod & CFGTBL_Trans_io_accel1) 4765c349775eSScott Teel return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle, 476603383736SDon Brace cdb, cdb_len, scsi3addr, 476703383736SDon Brace phys_disk); 4768c349775eSScott Teel else 4769c349775eSScott Teel return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle, 477003383736SDon Brace cdb, cdb_len, scsi3addr, 477103383736SDon Brace phys_disk); 4772c349775eSScott Teel } 4773c349775eSScott Teel 47746b80b18fSScott Teel static void raid_map_helper(struct raid_map_data *map, 47756b80b18fSScott Teel int offload_to_mirror, u32 *map_index, u32 *current_group) 47766b80b18fSScott Teel { 47776b80b18fSScott Teel if (offload_to_mirror == 0) { 47786b80b18fSScott Teel /* use physical disk in the first mirrored group. */ 47792b08b3e9SDon Brace *map_index %= le16_to_cpu(map->data_disks_per_row); 47806b80b18fSScott Teel return; 47816b80b18fSScott Teel } 47826b80b18fSScott Teel do { 47836b80b18fSScott Teel /* determine mirror group that *map_index indicates */ 47842b08b3e9SDon Brace *current_group = *map_index / 47852b08b3e9SDon Brace le16_to_cpu(map->data_disks_per_row); 47866b80b18fSScott Teel if (offload_to_mirror == *current_group) 47876b80b18fSScott Teel continue; 47882b08b3e9SDon Brace if (*current_group < le16_to_cpu(map->layout_map_count) - 1) { 47896b80b18fSScott Teel /* select map index from next group */ 47902b08b3e9SDon Brace *map_index += le16_to_cpu(map->data_disks_per_row); 47916b80b18fSScott Teel (*current_group)++; 47926b80b18fSScott Teel } else { 47936b80b18fSScott Teel /* select map index from first group */ 47942b08b3e9SDon Brace *map_index %= le16_to_cpu(map->data_disks_per_row); 47956b80b18fSScott Teel *current_group = 0; 47966b80b18fSScott Teel } 47976b80b18fSScott Teel } while (offload_to_mirror != *current_group); 47986b80b18fSScott Teel } 47996b80b18fSScott Teel 4800283b4a9bSStephen M. Cameron /* 4801283b4a9bSStephen M. Cameron * Attempt to perform offload RAID mapping for a logical volume I/O. 4802283b4a9bSStephen M. Cameron */ 4803283b4a9bSStephen M. Cameron static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h, 4804283b4a9bSStephen M. Cameron struct CommandList *c) 4805283b4a9bSStephen M. Cameron { 4806283b4a9bSStephen M. Cameron struct scsi_cmnd *cmd = c->scsi_cmd; 4807283b4a9bSStephen M. Cameron struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4808283b4a9bSStephen M. Cameron struct raid_map_data *map = &dev->raid_map; 4809283b4a9bSStephen M. Cameron struct raid_map_disk_data *dd = &map->data[0]; 4810283b4a9bSStephen M. Cameron int is_write = 0; 4811283b4a9bSStephen M. Cameron u32 map_index; 4812283b4a9bSStephen M. Cameron u64 first_block, last_block; 4813283b4a9bSStephen M. Cameron u32 block_cnt; 4814283b4a9bSStephen M. Cameron u32 blocks_per_row; 4815283b4a9bSStephen M. Cameron u64 first_row, last_row; 4816283b4a9bSStephen M. Cameron u32 first_row_offset, last_row_offset; 4817283b4a9bSStephen M. Cameron u32 first_column, last_column; 48186b80b18fSScott Teel u64 r0_first_row, r0_last_row; 48196b80b18fSScott Teel u32 r5or6_blocks_per_row; 48206b80b18fSScott Teel u64 r5or6_first_row, r5or6_last_row; 48216b80b18fSScott Teel u32 r5or6_first_row_offset, r5or6_last_row_offset; 48226b80b18fSScott Teel u32 r5or6_first_column, r5or6_last_column; 48236b80b18fSScott Teel u32 total_disks_per_row; 48246b80b18fSScott Teel u32 stripesize; 48256b80b18fSScott Teel u32 first_group, last_group, current_group; 4826283b4a9bSStephen M. Cameron u32 map_row; 4827283b4a9bSStephen M. Cameron u32 disk_handle; 4828283b4a9bSStephen M. Cameron u64 disk_block; 4829283b4a9bSStephen M. Cameron u32 disk_block_cnt; 4830283b4a9bSStephen M. Cameron u8 cdb[16]; 4831283b4a9bSStephen M. Cameron u8 cdb_len; 48322b08b3e9SDon Brace u16 strip_size; 4833283b4a9bSStephen M. Cameron #if BITS_PER_LONG == 32 4834283b4a9bSStephen M. Cameron u64 tmpdiv; 4835283b4a9bSStephen M. Cameron #endif 48366b80b18fSScott Teel int offload_to_mirror; 4837283b4a9bSStephen M. Cameron 4838283b4a9bSStephen M. Cameron /* check for valid opcode, get LBA and block count */ 4839283b4a9bSStephen M. Cameron switch (cmd->cmnd[0]) { 4840283b4a9bSStephen M. Cameron case WRITE_6: 4841283b4a9bSStephen M. Cameron is_write = 1; 4842283b4a9bSStephen M. Cameron case READ_6: 4843c8a6c9a6SDon Brace first_block = get_unaligned_be16(&cmd->cmnd[2]); 4844283b4a9bSStephen M. Cameron block_cnt = cmd->cmnd[4]; 48453fa89a04SStephen M. Cameron if (block_cnt == 0) 48463fa89a04SStephen M. Cameron block_cnt = 256; 4847283b4a9bSStephen M. Cameron break; 4848283b4a9bSStephen M. Cameron case WRITE_10: 4849283b4a9bSStephen M. Cameron is_write = 1; 4850283b4a9bSStephen M. Cameron case READ_10: 4851283b4a9bSStephen M. Cameron first_block = 4852283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[2]) << 24) | 4853283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[3]) << 16) | 4854283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[4]) << 8) | 4855283b4a9bSStephen M. Cameron cmd->cmnd[5]; 4856283b4a9bSStephen M. Cameron block_cnt = 4857283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[7]) << 8) | 4858283b4a9bSStephen M. Cameron cmd->cmnd[8]; 4859283b4a9bSStephen M. Cameron break; 4860283b4a9bSStephen M. Cameron case WRITE_12: 4861283b4a9bSStephen M. Cameron is_write = 1; 4862283b4a9bSStephen M. Cameron case READ_12: 4863283b4a9bSStephen M. Cameron first_block = 4864283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[2]) << 24) | 4865283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[3]) << 16) | 4866283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[4]) << 8) | 4867283b4a9bSStephen M. Cameron cmd->cmnd[5]; 4868283b4a9bSStephen M. Cameron block_cnt = 4869283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[6]) << 24) | 4870283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[7]) << 16) | 4871283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[8]) << 8) | 4872283b4a9bSStephen M. Cameron cmd->cmnd[9]; 4873283b4a9bSStephen M. Cameron break; 4874283b4a9bSStephen M. Cameron case WRITE_16: 4875283b4a9bSStephen M. Cameron is_write = 1; 4876283b4a9bSStephen M. Cameron case READ_16: 4877283b4a9bSStephen M. Cameron first_block = 4878283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[2]) << 56) | 4879283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[3]) << 48) | 4880283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[4]) << 40) | 4881283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[5]) << 32) | 4882283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[6]) << 24) | 4883283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[7]) << 16) | 4884283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[8]) << 8) | 4885283b4a9bSStephen M. Cameron cmd->cmnd[9]; 4886283b4a9bSStephen M. Cameron block_cnt = 4887283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[10]) << 24) | 4888283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[11]) << 16) | 4889283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[12]) << 8) | 4890283b4a9bSStephen M. Cameron cmd->cmnd[13]; 4891283b4a9bSStephen M. Cameron break; 4892283b4a9bSStephen M. Cameron default: 4893283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */ 4894283b4a9bSStephen M. Cameron } 4895283b4a9bSStephen M. Cameron last_block = first_block + block_cnt - 1; 4896283b4a9bSStephen M. Cameron 4897283b4a9bSStephen M. Cameron /* check for write to non-RAID-0 */ 4898283b4a9bSStephen M. Cameron if (is_write && dev->raid_level != 0) 4899283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 4900283b4a9bSStephen M. Cameron 4901283b4a9bSStephen M. Cameron /* check for invalid block or wraparound */ 49022b08b3e9SDon Brace if (last_block >= le64_to_cpu(map->volume_blk_cnt) || 49032b08b3e9SDon Brace last_block < first_block) 4904283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 4905283b4a9bSStephen M. Cameron 4906283b4a9bSStephen M. Cameron /* calculate stripe information for the request */ 49072b08b3e9SDon Brace blocks_per_row = le16_to_cpu(map->data_disks_per_row) * 49082b08b3e9SDon Brace le16_to_cpu(map->strip_size); 49092b08b3e9SDon Brace strip_size = le16_to_cpu(map->strip_size); 4910283b4a9bSStephen M. Cameron #if BITS_PER_LONG == 32 4911283b4a9bSStephen M. Cameron tmpdiv = first_block; 4912283b4a9bSStephen M. Cameron (void) do_div(tmpdiv, blocks_per_row); 4913283b4a9bSStephen M. Cameron first_row = tmpdiv; 4914283b4a9bSStephen M. Cameron tmpdiv = last_block; 4915283b4a9bSStephen M. Cameron (void) do_div(tmpdiv, blocks_per_row); 4916283b4a9bSStephen M. Cameron last_row = tmpdiv; 4917283b4a9bSStephen M. Cameron first_row_offset = (u32) (first_block - (first_row * blocks_per_row)); 4918283b4a9bSStephen M. Cameron last_row_offset = (u32) (last_block - (last_row * blocks_per_row)); 4919283b4a9bSStephen M. Cameron tmpdiv = first_row_offset; 49202b08b3e9SDon Brace (void) do_div(tmpdiv, strip_size); 4921283b4a9bSStephen M. Cameron first_column = tmpdiv; 4922283b4a9bSStephen M. Cameron tmpdiv = last_row_offset; 49232b08b3e9SDon Brace (void) do_div(tmpdiv, strip_size); 4924283b4a9bSStephen M. Cameron last_column = tmpdiv; 4925283b4a9bSStephen M. Cameron #else 4926283b4a9bSStephen M. Cameron first_row = first_block / blocks_per_row; 4927283b4a9bSStephen M. Cameron last_row = last_block / blocks_per_row; 4928283b4a9bSStephen M. Cameron first_row_offset = (u32) (first_block - (first_row * blocks_per_row)); 4929283b4a9bSStephen M. Cameron last_row_offset = (u32) (last_block - (last_row * blocks_per_row)); 49302b08b3e9SDon Brace first_column = first_row_offset / strip_size; 49312b08b3e9SDon Brace last_column = last_row_offset / strip_size; 4932283b4a9bSStephen M. Cameron #endif 4933283b4a9bSStephen M. Cameron 4934283b4a9bSStephen M. Cameron /* if this isn't a single row/column then give to the controller */ 4935283b4a9bSStephen M. Cameron if ((first_row != last_row) || (first_column != last_column)) 4936283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 4937283b4a9bSStephen M. Cameron 4938283b4a9bSStephen M. Cameron /* proceeding with driver mapping */ 49392b08b3e9SDon Brace total_disks_per_row = le16_to_cpu(map->data_disks_per_row) + 49402b08b3e9SDon Brace le16_to_cpu(map->metadata_disks_per_row); 4941283b4a9bSStephen M. Cameron map_row = ((u32)(first_row >> map->parity_rotation_shift)) % 49422b08b3e9SDon Brace le16_to_cpu(map->row_cnt); 49436b80b18fSScott Teel map_index = (map_row * total_disks_per_row) + first_column; 49446b80b18fSScott Teel 49456b80b18fSScott Teel switch (dev->raid_level) { 49466b80b18fSScott Teel case HPSA_RAID_0: 49476b80b18fSScott Teel break; /* nothing special to do */ 49486b80b18fSScott Teel case HPSA_RAID_1: 49496b80b18fSScott Teel /* Handles load balance across RAID 1 members. 49506b80b18fSScott Teel * (2-drive R1 and R10 with even # of drives.) 49516b80b18fSScott Teel * Appropriate for SSDs, not optimal for HDDs 4952283b4a9bSStephen M. Cameron */ 49532b08b3e9SDon Brace BUG_ON(le16_to_cpu(map->layout_map_count) != 2); 4954283b4a9bSStephen M. Cameron if (dev->offload_to_mirror) 49552b08b3e9SDon Brace map_index += le16_to_cpu(map->data_disks_per_row); 4956283b4a9bSStephen M. Cameron dev->offload_to_mirror = !dev->offload_to_mirror; 49576b80b18fSScott Teel break; 49586b80b18fSScott Teel case HPSA_RAID_ADM: 49596b80b18fSScott Teel /* Handles N-way mirrors (R1-ADM) 49606b80b18fSScott Teel * and R10 with # of drives divisible by 3.) 49616b80b18fSScott Teel */ 49622b08b3e9SDon Brace BUG_ON(le16_to_cpu(map->layout_map_count) != 3); 49636b80b18fSScott Teel 49646b80b18fSScott Teel offload_to_mirror = dev->offload_to_mirror; 49656b80b18fSScott Teel raid_map_helper(map, offload_to_mirror, 49666b80b18fSScott Teel &map_index, ¤t_group); 49676b80b18fSScott Teel /* set mirror group to use next time */ 49686b80b18fSScott Teel offload_to_mirror = 49692b08b3e9SDon Brace (offload_to_mirror >= 49702b08b3e9SDon Brace le16_to_cpu(map->layout_map_count) - 1) 49716b80b18fSScott Teel ? 0 : offload_to_mirror + 1; 49726b80b18fSScott Teel dev->offload_to_mirror = offload_to_mirror; 49736b80b18fSScott Teel /* Avoid direct use of dev->offload_to_mirror within this 49746b80b18fSScott Teel * function since multiple threads might simultaneously 49756b80b18fSScott Teel * increment it beyond the range of dev->layout_map_count -1. 49766b80b18fSScott Teel */ 49776b80b18fSScott Teel break; 49786b80b18fSScott Teel case HPSA_RAID_5: 49796b80b18fSScott Teel case HPSA_RAID_6: 49802b08b3e9SDon Brace if (le16_to_cpu(map->layout_map_count) <= 1) 49816b80b18fSScott Teel break; 49826b80b18fSScott Teel 49836b80b18fSScott Teel /* Verify first and last block are in same RAID group */ 49846b80b18fSScott Teel r5or6_blocks_per_row = 49852b08b3e9SDon Brace le16_to_cpu(map->strip_size) * 49862b08b3e9SDon Brace le16_to_cpu(map->data_disks_per_row); 49876b80b18fSScott Teel BUG_ON(r5or6_blocks_per_row == 0); 49882b08b3e9SDon Brace stripesize = r5or6_blocks_per_row * 49892b08b3e9SDon Brace le16_to_cpu(map->layout_map_count); 49906b80b18fSScott Teel #if BITS_PER_LONG == 32 49916b80b18fSScott Teel tmpdiv = first_block; 49926b80b18fSScott Teel first_group = do_div(tmpdiv, stripesize); 49936b80b18fSScott Teel tmpdiv = first_group; 49946b80b18fSScott Teel (void) do_div(tmpdiv, r5or6_blocks_per_row); 49956b80b18fSScott Teel first_group = tmpdiv; 49966b80b18fSScott Teel tmpdiv = last_block; 49976b80b18fSScott Teel last_group = do_div(tmpdiv, stripesize); 49986b80b18fSScott Teel tmpdiv = last_group; 49996b80b18fSScott Teel (void) do_div(tmpdiv, r5or6_blocks_per_row); 50006b80b18fSScott Teel last_group = tmpdiv; 50016b80b18fSScott Teel #else 50026b80b18fSScott Teel first_group = (first_block % stripesize) / r5or6_blocks_per_row; 50036b80b18fSScott Teel last_group = (last_block % stripesize) / r5or6_blocks_per_row; 50046b80b18fSScott Teel #endif 5005000ff7c2SStephen M. Cameron if (first_group != last_group) 50066b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 50076b80b18fSScott Teel 50086b80b18fSScott Teel /* Verify request is in a single row of RAID 5/6 */ 50096b80b18fSScott Teel #if BITS_PER_LONG == 32 50106b80b18fSScott Teel tmpdiv = first_block; 50116b80b18fSScott Teel (void) do_div(tmpdiv, stripesize); 50126b80b18fSScott Teel first_row = r5or6_first_row = r0_first_row = tmpdiv; 50136b80b18fSScott Teel tmpdiv = last_block; 50146b80b18fSScott Teel (void) do_div(tmpdiv, stripesize); 50156b80b18fSScott Teel r5or6_last_row = r0_last_row = tmpdiv; 50166b80b18fSScott Teel #else 50176b80b18fSScott Teel first_row = r5or6_first_row = r0_first_row = 50186b80b18fSScott Teel first_block / stripesize; 50196b80b18fSScott Teel r5or6_last_row = r0_last_row = last_block / stripesize; 50206b80b18fSScott Teel #endif 50216b80b18fSScott Teel if (r5or6_first_row != r5or6_last_row) 50226b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 50236b80b18fSScott Teel 50246b80b18fSScott Teel 50256b80b18fSScott Teel /* Verify request is in a single column */ 50266b80b18fSScott Teel #if BITS_PER_LONG == 32 50276b80b18fSScott Teel tmpdiv = first_block; 50286b80b18fSScott Teel first_row_offset = do_div(tmpdiv, stripesize); 50296b80b18fSScott Teel tmpdiv = first_row_offset; 50306b80b18fSScott Teel first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row); 50316b80b18fSScott Teel r5or6_first_row_offset = first_row_offset; 50326b80b18fSScott Teel tmpdiv = last_block; 50336b80b18fSScott Teel r5or6_last_row_offset = do_div(tmpdiv, stripesize); 50346b80b18fSScott Teel tmpdiv = r5or6_last_row_offset; 50356b80b18fSScott Teel r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row); 50366b80b18fSScott Teel tmpdiv = r5or6_first_row_offset; 50376b80b18fSScott Teel (void) do_div(tmpdiv, map->strip_size); 50386b80b18fSScott Teel first_column = r5or6_first_column = tmpdiv; 50396b80b18fSScott Teel tmpdiv = r5or6_last_row_offset; 50406b80b18fSScott Teel (void) do_div(tmpdiv, map->strip_size); 50416b80b18fSScott Teel r5or6_last_column = tmpdiv; 50426b80b18fSScott Teel #else 50436b80b18fSScott Teel first_row_offset = r5or6_first_row_offset = 50446b80b18fSScott Teel (u32)((first_block % stripesize) % 50456b80b18fSScott Teel r5or6_blocks_per_row); 50466b80b18fSScott Teel 50476b80b18fSScott Teel r5or6_last_row_offset = 50486b80b18fSScott Teel (u32)((last_block % stripesize) % 50496b80b18fSScott Teel r5or6_blocks_per_row); 50506b80b18fSScott Teel 50516b80b18fSScott Teel first_column = r5or6_first_column = 50522b08b3e9SDon Brace r5or6_first_row_offset / le16_to_cpu(map->strip_size); 50536b80b18fSScott Teel r5or6_last_column = 50542b08b3e9SDon Brace r5or6_last_row_offset / le16_to_cpu(map->strip_size); 50556b80b18fSScott Teel #endif 50566b80b18fSScott Teel if (r5or6_first_column != r5or6_last_column) 50576b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 50586b80b18fSScott Teel 50596b80b18fSScott Teel /* Request is eligible */ 50606b80b18fSScott Teel map_row = ((u32)(first_row >> map->parity_rotation_shift)) % 50612b08b3e9SDon Brace le16_to_cpu(map->row_cnt); 50626b80b18fSScott Teel 50636b80b18fSScott Teel map_index = (first_group * 50642b08b3e9SDon Brace (le16_to_cpu(map->row_cnt) * total_disks_per_row)) + 50656b80b18fSScott Teel (map_row * total_disks_per_row) + first_column; 50666b80b18fSScott Teel break; 50676b80b18fSScott Teel default: 50686b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 5069283b4a9bSStephen M. Cameron } 50706b80b18fSScott Teel 507107543e0cSStephen Cameron if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES)) 507207543e0cSStephen Cameron return IO_ACCEL_INELIGIBLE; 507307543e0cSStephen Cameron 507403383736SDon Brace c->phys_disk = dev->phys_disk[map_index]; 5075c3390df4SDon Brace if (!c->phys_disk) 5076c3390df4SDon Brace return IO_ACCEL_INELIGIBLE; 507703383736SDon Brace 5078283b4a9bSStephen M. Cameron disk_handle = dd[map_index].ioaccel_handle; 50792b08b3e9SDon Brace disk_block = le64_to_cpu(map->disk_starting_blk) + 50802b08b3e9SDon Brace first_row * le16_to_cpu(map->strip_size) + 50812b08b3e9SDon Brace (first_row_offset - first_column * 50822b08b3e9SDon Brace le16_to_cpu(map->strip_size)); 5083283b4a9bSStephen M. Cameron disk_block_cnt = block_cnt; 5084283b4a9bSStephen M. Cameron 5085283b4a9bSStephen M. Cameron /* handle differing logical/physical block sizes */ 5086283b4a9bSStephen M. Cameron if (map->phys_blk_shift) { 5087283b4a9bSStephen M. Cameron disk_block <<= map->phys_blk_shift; 5088283b4a9bSStephen M. Cameron disk_block_cnt <<= map->phys_blk_shift; 5089283b4a9bSStephen M. Cameron } 5090283b4a9bSStephen M. Cameron BUG_ON(disk_block_cnt > 0xffff); 5091283b4a9bSStephen M. Cameron 5092283b4a9bSStephen M. Cameron /* build the new CDB for the physical disk I/O */ 5093283b4a9bSStephen M. Cameron if (disk_block > 0xffffffff) { 5094283b4a9bSStephen M. Cameron cdb[0] = is_write ? WRITE_16 : READ_16; 5095283b4a9bSStephen M. Cameron cdb[1] = 0; 5096283b4a9bSStephen M. Cameron cdb[2] = (u8) (disk_block >> 56); 5097283b4a9bSStephen M. Cameron cdb[3] = (u8) (disk_block >> 48); 5098283b4a9bSStephen M. Cameron cdb[4] = (u8) (disk_block >> 40); 5099283b4a9bSStephen M. Cameron cdb[5] = (u8) (disk_block >> 32); 5100283b4a9bSStephen M. Cameron cdb[6] = (u8) (disk_block >> 24); 5101283b4a9bSStephen M. Cameron cdb[7] = (u8) (disk_block >> 16); 5102283b4a9bSStephen M. Cameron cdb[8] = (u8) (disk_block >> 8); 5103283b4a9bSStephen M. Cameron cdb[9] = (u8) (disk_block); 5104283b4a9bSStephen M. Cameron cdb[10] = (u8) (disk_block_cnt >> 24); 5105283b4a9bSStephen M. Cameron cdb[11] = (u8) (disk_block_cnt >> 16); 5106283b4a9bSStephen M. Cameron cdb[12] = (u8) (disk_block_cnt >> 8); 5107283b4a9bSStephen M. Cameron cdb[13] = (u8) (disk_block_cnt); 5108283b4a9bSStephen M. Cameron cdb[14] = 0; 5109283b4a9bSStephen M. Cameron cdb[15] = 0; 5110283b4a9bSStephen M. Cameron cdb_len = 16; 5111283b4a9bSStephen M. Cameron } else { 5112283b4a9bSStephen M. Cameron cdb[0] = is_write ? WRITE_10 : READ_10; 5113283b4a9bSStephen M. Cameron cdb[1] = 0; 5114283b4a9bSStephen M. Cameron cdb[2] = (u8) (disk_block >> 24); 5115283b4a9bSStephen M. Cameron cdb[3] = (u8) (disk_block >> 16); 5116283b4a9bSStephen M. Cameron cdb[4] = (u8) (disk_block >> 8); 5117283b4a9bSStephen M. Cameron cdb[5] = (u8) (disk_block); 5118283b4a9bSStephen M. Cameron cdb[6] = 0; 5119283b4a9bSStephen M. Cameron cdb[7] = (u8) (disk_block_cnt >> 8); 5120283b4a9bSStephen M. Cameron cdb[8] = (u8) (disk_block_cnt); 5121283b4a9bSStephen M. Cameron cdb[9] = 0; 5122283b4a9bSStephen M. Cameron cdb_len = 10; 5123283b4a9bSStephen M. Cameron } 5124283b4a9bSStephen M. Cameron return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len, 512503383736SDon Brace dev->scsi3addr, 512603383736SDon Brace dev->phys_disk[map_index]); 5127283b4a9bSStephen M. Cameron } 5128283b4a9bSStephen M. Cameron 512925163bd5SWebb Scales /* 513025163bd5SWebb Scales * Submit commands down the "normal" RAID stack path 513125163bd5SWebb Scales * All callers to hpsa_ciss_submit must check lockup_detected 513225163bd5SWebb Scales * beforehand, before (opt.) and after calling cmd_alloc 513325163bd5SWebb Scales */ 5134574f05d3SStephen Cameron static int hpsa_ciss_submit(struct ctlr_info *h, 5135574f05d3SStephen Cameron struct CommandList *c, struct scsi_cmnd *cmd, 5136574f05d3SStephen Cameron unsigned char scsi3addr[]) 5137edd16368SStephen M. Cameron { 5138edd16368SStephen M. Cameron cmd->host_scribble = (unsigned char *) c; 5139edd16368SStephen M. Cameron c->cmd_type = CMD_SCSI; 5140edd16368SStephen M. Cameron c->scsi_cmd = cmd; 5141edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; /* unused in simple mode */ 5142edd16368SStephen M. Cameron memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8); 5143f2405db8SDon Brace c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT)); 5144edd16368SStephen M. Cameron 5145edd16368SStephen M. Cameron /* Fill in the request block... */ 5146edd16368SStephen M. Cameron 5147edd16368SStephen M. Cameron c->Request.Timeout = 0; 5148edd16368SStephen M. Cameron BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB)); 5149edd16368SStephen M. Cameron c->Request.CDBLen = cmd->cmd_len; 5150edd16368SStephen M. Cameron memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len); 5151edd16368SStephen M. Cameron switch (cmd->sc_data_direction) { 5152edd16368SStephen M. Cameron case DMA_TO_DEVICE: 5153a505b86fSStephen M. Cameron c->Request.type_attr_dir = 5154a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE); 5155edd16368SStephen M. Cameron break; 5156edd16368SStephen M. Cameron case DMA_FROM_DEVICE: 5157a505b86fSStephen M. Cameron c->Request.type_attr_dir = 5158a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ); 5159edd16368SStephen M. Cameron break; 5160edd16368SStephen M. Cameron case DMA_NONE: 5161a505b86fSStephen M. Cameron c->Request.type_attr_dir = 5162a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE); 5163edd16368SStephen M. Cameron break; 5164edd16368SStephen M. Cameron case DMA_BIDIRECTIONAL: 5165edd16368SStephen M. Cameron /* This can happen if a buggy application does a scsi passthru 5166edd16368SStephen M. Cameron * and sets both inlen and outlen to non-zero. ( see 5167edd16368SStephen M. Cameron * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() ) 5168edd16368SStephen M. Cameron */ 5169edd16368SStephen M. Cameron 5170a505b86fSStephen M. Cameron c->Request.type_attr_dir = 5171a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD); 5172edd16368SStephen M. Cameron /* This is technically wrong, and hpsa controllers should 5173edd16368SStephen M. Cameron * reject it with CMD_INVALID, which is the most correct 5174edd16368SStephen M. Cameron * response, but non-fibre backends appear to let it 5175edd16368SStephen M. Cameron * slide by, and give the same results as if this field 5176edd16368SStephen M. Cameron * were set correctly. Either way is acceptable for 5177edd16368SStephen M. Cameron * our purposes here. 5178edd16368SStephen M. Cameron */ 5179edd16368SStephen M. Cameron 5180edd16368SStephen M. Cameron break; 5181edd16368SStephen M. Cameron 5182edd16368SStephen M. Cameron default: 5183edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "unknown data direction: %d\n", 5184edd16368SStephen M. Cameron cmd->sc_data_direction); 5185edd16368SStephen M. Cameron BUG(); 5186edd16368SStephen M. Cameron break; 5187edd16368SStephen M. Cameron } 5188edd16368SStephen M. Cameron 518933a2ffceSStephen M. Cameron if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */ 519073153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 5191edd16368SStephen M. Cameron return SCSI_MLQUEUE_HOST_BUSY; 5192edd16368SStephen M. Cameron } 5193edd16368SStephen M. Cameron enqueue_cmd_and_start_io(h, c); 5194edd16368SStephen M. Cameron /* the cmd'll come back via intr handler in complete_scsi_command() */ 5195edd16368SStephen M. Cameron return 0; 5196edd16368SStephen M. Cameron } 5197edd16368SStephen M. Cameron 5198360c73bdSStephen Cameron static void hpsa_cmd_init(struct ctlr_info *h, int index, 5199360c73bdSStephen Cameron struct CommandList *c) 5200360c73bdSStephen Cameron { 5201360c73bdSStephen Cameron dma_addr_t cmd_dma_handle, err_dma_handle; 5202360c73bdSStephen Cameron 5203360c73bdSStephen Cameron /* Zero out all of commandlist except the last field, refcount */ 5204360c73bdSStephen Cameron memset(c, 0, offsetof(struct CommandList, refcount)); 5205360c73bdSStephen Cameron c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT)); 5206360c73bdSStephen Cameron cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c); 5207360c73bdSStephen Cameron c->err_info = h->errinfo_pool + index; 5208360c73bdSStephen Cameron memset(c->err_info, 0, sizeof(*c->err_info)); 5209360c73bdSStephen Cameron err_dma_handle = h->errinfo_pool_dhandle 5210360c73bdSStephen Cameron + index * sizeof(*c->err_info); 5211360c73bdSStephen Cameron c->cmdindex = index; 5212360c73bdSStephen Cameron c->busaddr = (u32) cmd_dma_handle; 5213360c73bdSStephen Cameron c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle); 5214360c73bdSStephen Cameron c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info)); 5215360c73bdSStephen Cameron c->h = h; 5216a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_IDLE; 5217360c73bdSStephen Cameron } 5218360c73bdSStephen Cameron 5219360c73bdSStephen Cameron static void hpsa_preinitialize_commands(struct ctlr_info *h) 5220360c73bdSStephen Cameron { 5221360c73bdSStephen Cameron int i; 5222360c73bdSStephen Cameron 5223360c73bdSStephen Cameron for (i = 0; i < h->nr_cmds; i++) { 5224360c73bdSStephen Cameron struct CommandList *c = h->cmd_pool + i; 5225360c73bdSStephen Cameron 5226360c73bdSStephen Cameron hpsa_cmd_init(h, i, c); 5227360c73bdSStephen Cameron atomic_set(&c->refcount, 0); 5228360c73bdSStephen Cameron } 5229360c73bdSStephen Cameron } 5230360c73bdSStephen Cameron 5231360c73bdSStephen Cameron static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index, 5232360c73bdSStephen Cameron struct CommandList *c) 5233360c73bdSStephen Cameron { 5234360c73bdSStephen Cameron dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c); 5235360c73bdSStephen Cameron 523673153fe5SWebb Scales BUG_ON(c->cmdindex != index); 523773153fe5SWebb Scales 5238360c73bdSStephen Cameron memset(c->Request.CDB, 0, sizeof(c->Request.CDB)); 5239360c73bdSStephen Cameron memset(c->err_info, 0, sizeof(*c->err_info)); 5240360c73bdSStephen Cameron c->busaddr = (u32) cmd_dma_handle; 5241360c73bdSStephen Cameron } 5242360c73bdSStephen Cameron 5243592a0ad5SWebb Scales static int hpsa_ioaccel_submit(struct ctlr_info *h, 5244592a0ad5SWebb Scales struct CommandList *c, struct scsi_cmnd *cmd, 5245592a0ad5SWebb Scales unsigned char *scsi3addr) 5246592a0ad5SWebb Scales { 5247592a0ad5SWebb Scales struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 5248592a0ad5SWebb Scales int rc = IO_ACCEL_INELIGIBLE; 5249592a0ad5SWebb Scales 5250592a0ad5SWebb Scales cmd->host_scribble = (unsigned char *) c; 5251592a0ad5SWebb Scales 5252592a0ad5SWebb Scales if (dev->offload_enabled) { 5253592a0ad5SWebb Scales hpsa_cmd_init(h, c->cmdindex, c); 5254592a0ad5SWebb Scales c->cmd_type = CMD_SCSI; 5255592a0ad5SWebb Scales c->scsi_cmd = cmd; 5256592a0ad5SWebb Scales rc = hpsa_scsi_ioaccel_raid_map(h, c); 5257592a0ad5SWebb Scales if (rc < 0) /* scsi_dma_map failed. */ 5258592a0ad5SWebb Scales rc = SCSI_MLQUEUE_HOST_BUSY; 5259a3144e0bSJoe Handzik } else if (dev->hba_ioaccel_enabled) { 5260592a0ad5SWebb Scales hpsa_cmd_init(h, c->cmdindex, c); 5261592a0ad5SWebb Scales c->cmd_type = CMD_SCSI; 5262592a0ad5SWebb Scales c->scsi_cmd = cmd; 5263592a0ad5SWebb Scales rc = hpsa_scsi_ioaccel_direct_map(h, c); 5264592a0ad5SWebb Scales if (rc < 0) /* scsi_dma_map failed. */ 5265592a0ad5SWebb Scales rc = SCSI_MLQUEUE_HOST_BUSY; 5266592a0ad5SWebb Scales } 5267592a0ad5SWebb Scales return rc; 5268592a0ad5SWebb Scales } 5269592a0ad5SWebb Scales 5270080ef1ccSDon Brace static void hpsa_command_resubmit_worker(struct work_struct *work) 5271080ef1ccSDon Brace { 5272080ef1ccSDon Brace struct scsi_cmnd *cmd; 5273080ef1ccSDon Brace struct hpsa_scsi_dev_t *dev; 52748a0ff92cSWebb Scales struct CommandList *c = container_of(work, struct CommandList, work); 5275080ef1ccSDon Brace 5276080ef1ccSDon Brace cmd = c->scsi_cmd; 5277080ef1ccSDon Brace dev = cmd->device->hostdata; 5278080ef1ccSDon Brace if (!dev) { 5279080ef1ccSDon Brace cmd->result = DID_NO_CONNECT << 16; 52808a0ff92cSWebb Scales return hpsa_cmd_free_and_done(c->h, c, cmd); 5281080ef1ccSDon Brace } 5282d604f533SWebb Scales if (c->reset_pending) 5283d604f533SWebb Scales return hpsa_cmd_resolve_and_free(c->h, c); 5284a58e7e53SWebb Scales if (c->abort_pending) 5285a58e7e53SWebb Scales return hpsa_cmd_abort_and_free(c->h, c, cmd); 5286592a0ad5SWebb Scales if (c->cmd_type == CMD_IOACCEL2) { 5287592a0ad5SWebb Scales struct ctlr_info *h = c->h; 5288592a0ad5SWebb Scales struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 5289592a0ad5SWebb Scales int rc; 5290592a0ad5SWebb Scales 5291592a0ad5SWebb Scales if (c2->error_data.serv_response == 5292592a0ad5SWebb Scales IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL) { 5293592a0ad5SWebb Scales rc = hpsa_ioaccel_submit(h, c, cmd, dev->scsi3addr); 5294592a0ad5SWebb Scales if (rc == 0) 5295592a0ad5SWebb Scales return; 5296592a0ad5SWebb Scales if (rc == SCSI_MLQUEUE_HOST_BUSY) { 5297592a0ad5SWebb Scales /* 5298592a0ad5SWebb Scales * If we get here, it means dma mapping failed. 5299592a0ad5SWebb Scales * Try again via scsi mid layer, which will 5300592a0ad5SWebb Scales * then get SCSI_MLQUEUE_HOST_BUSY. 5301592a0ad5SWebb Scales */ 5302592a0ad5SWebb Scales cmd->result = DID_IMM_RETRY << 16; 53038a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, c, cmd); 5304592a0ad5SWebb Scales } 5305592a0ad5SWebb Scales /* else, fall thru and resubmit down CISS path */ 5306592a0ad5SWebb Scales } 5307592a0ad5SWebb Scales } 5308360c73bdSStephen Cameron hpsa_cmd_partial_init(c->h, c->cmdindex, c); 5309080ef1ccSDon Brace if (hpsa_ciss_submit(c->h, c, cmd, dev->scsi3addr)) { 5310080ef1ccSDon Brace /* 5311080ef1ccSDon Brace * If we get here, it means dma mapping failed. Try 5312080ef1ccSDon Brace * again via scsi mid layer, which will then get 5313080ef1ccSDon Brace * SCSI_MLQUEUE_HOST_BUSY. 5314592a0ad5SWebb Scales * 5315592a0ad5SWebb Scales * hpsa_ciss_submit will have already freed c 5316592a0ad5SWebb Scales * if it encountered a dma mapping failure. 5317080ef1ccSDon Brace */ 5318080ef1ccSDon Brace cmd->result = DID_IMM_RETRY << 16; 5319080ef1ccSDon Brace cmd->scsi_done(cmd); 5320080ef1ccSDon Brace } 5321080ef1ccSDon Brace } 5322080ef1ccSDon Brace 5323574f05d3SStephen Cameron /* Running in struct Scsi_Host->host_lock less mode */ 5324574f05d3SStephen Cameron static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd) 5325574f05d3SStephen Cameron { 5326574f05d3SStephen Cameron struct ctlr_info *h; 5327574f05d3SStephen Cameron struct hpsa_scsi_dev_t *dev; 5328574f05d3SStephen Cameron unsigned char scsi3addr[8]; 5329574f05d3SStephen Cameron struct CommandList *c; 5330574f05d3SStephen Cameron int rc = 0; 5331574f05d3SStephen Cameron 5332574f05d3SStephen Cameron /* Get the ptr to our adapter structure out of cmd->host. */ 5333574f05d3SStephen Cameron h = sdev_to_hba(cmd->device); 533473153fe5SWebb Scales 533573153fe5SWebb Scales BUG_ON(cmd->request->tag < 0); 533673153fe5SWebb Scales 5337574f05d3SStephen Cameron dev = cmd->device->hostdata; 5338574f05d3SStephen Cameron if (!dev) { 5339*ba74fdc4SDon Brace cmd->result = NOT_READY << 16; /* host byte */ 5340*ba74fdc4SDon Brace cmd->scsi_done(cmd); 5341*ba74fdc4SDon Brace return 0; 5342*ba74fdc4SDon Brace } 5343*ba74fdc4SDon Brace 5344*ba74fdc4SDon Brace if (dev->removed) { 5345574f05d3SStephen Cameron cmd->result = DID_NO_CONNECT << 16; 5346574f05d3SStephen Cameron cmd->scsi_done(cmd); 5347574f05d3SStephen Cameron return 0; 5348574f05d3SStephen Cameron } 534973153fe5SWebb Scales 5350574f05d3SStephen Cameron memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr)); 5351574f05d3SStephen Cameron 5352574f05d3SStephen Cameron if (unlikely(lockup_detected(h))) { 535325163bd5SWebb Scales cmd->result = DID_NO_CONNECT << 16; 5354574f05d3SStephen Cameron cmd->scsi_done(cmd); 5355574f05d3SStephen Cameron return 0; 5356574f05d3SStephen Cameron } 535773153fe5SWebb Scales c = cmd_tagged_alloc(h, cmd); 5358574f05d3SStephen Cameron 5359407863cbSStephen Cameron /* 5360407863cbSStephen Cameron * Call alternate submit routine for I/O accelerated commands. 5361574f05d3SStephen Cameron * Retries always go down the normal I/O path. 5362574f05d3SStephen Cameron */ 5363574f05d3SStephen Cameron if (likely(cmd->retries == 0 && 5364574f05d3SStephen Cameron cmd->request->cmd_type == REQ_TYPE_FS && 5365574f05d3SStephen Cameron h->acciopath_status)) { 5366592a0ad5SWebb Scales rc = hpsa_ioaccel_submit(h, c, cmd, scsi3addr); 5367574f05d3SStephen Cameron if (rc == 0) 5368592a0ad5SWebb Scales return 0; 5369592a0ad5SWebb Scales if (rc == SCSI_MLQUEUE_HOST_BUSY) { 537073153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 5371574f05d3SStephen Cameron return SCSI_MLQUEUE_HOST_BUSY; 5372574f05d3SStephen Cameron } 5373574f05d3SStephen Cameron } 5374574f05d3SStephen Cameron return hpsa_ciss_submit(h, c, cmd, scsi3addr); 5375574f05d3SStephen Cameron } 5376574f05d3SStephen Cameron 53778ebc9248SWebb Scales static void hpsa_scan_complete(struct ctlr_info *h) 53785f389360SStephen M. Cameron { 53795f389360SStephen M. Cameron unsigned long flags; 53805f389360SStephen M. Cameron 53815f389360SStephen M. Cameron spin_lock_irqsave(&h->scan_lock, flags); 53825f389360SStephen M. Cameron h->scan_finished = 1; 53835f389360SStephen M. Cameron wake_up_all(&h->scan_wait_queue); 53845f389360SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 53855f389360SStephen M. Cameron } 53865f389360SStephen M. Cameron 5387a08a8471SStephen M. Cameron static void hpsa_scan_start(struct Scsi_Host *sh) 5388a08a8471SStephen M. Cameron { 5389a08a8471SStephen M. Cameron struct ctlr_info *h = shost_to_hba(sh); 5390a08a8471SStephen M. Cameron unsigned long flags; 5391a08a8471SStephen M. Cameron 53928ebc9248SWebb Scales /* 53938ebc9248SWebb Scales * Don't let rescans be initiated on a controller known to be locked 53948ebc9248SWebb Scales * up. If the controller locks up *during* a rescan, that thread is 53958ebc9248SWebb Scales * probably hosed, but at least we can prevent new rescan threads from 53968ebc9248SWebb Scales * piling up on a locked up controller. 53978ebc9248SWebb Scales */ 53988ebc9248SWebb Scales if (unlikely(lockup_detected(h))) 53998ebc9248SWebb Scales return hpsa_scan_complete(h); 54005f389360SStephen M. Cameron 5401a08a8471SStephen M. Cameron /* wait until any scan already in progress is finished. */ 5402a08a8471SStephen M. Cameron while (1) { 5403a08a8471SStephen M. Cameron spin_lock_irqsave(&h->scan_lock, flags); 5404a08a8471SStephen M. Cameron if (h->scan_finished) 5405a08a8471SStephen M. Cameron break; 5406a08a8471SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 5407a08a8471SStephen M. Cameron wait_event(h->scan_wait_queue, h->scan_finished); 5408a08a8471SStephen M. Cameron /* Note: We don't need to worry about a race between this 5409a08a8471SStephen M. Cameron * thread and driver unload because the midlayer will 5410a08a8471SStephen M. Cameron * have incremented the reference count, so unload won't 5411a08a8471SStephen M. Cameron * happen if we're in here. 5412a08a8471SStephen M. Cameron */ 5413a08a8471SStephen M. Cameron } 5414a08a8471SStephen M. Cameron h->scan_finished = 0; /* mark scan as in progress */ 5415a08a8471SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 5416a08a8471SStephen M. Cameron 54178ebc9248SWebb Scales if (unlikely(lockup_detected(h))) 54188ebc9248SWebb Scales return hpsa_scan_complete(h); 54195f389360SStephen M. Cameron 54208aa60681SDon Brace hpsa_update_scsi_devices(h); 5421a08a8471SStephen M. Cameron 54228ebc9248SWebb Scales hpsa_scan_complete(h); 5423a08a8471SStephen M. Cameron } 5424a08a8471SStephen M. Cameron 54257c0a0229SDon Brace static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth) 54267c0a0229SDon Brace { 542703383736SDon Brace struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata; 542803383736SDon Brace 542903383736SDon Brace if (!logical_drive) 543003383736SDon Brace return -ENODEV; 54317c0a0229SDon Brace 54327c0a0229SDon Brace if (qdepth < 1) 54337c0a0229SDon Brace qdepth = 1; 543403383736SDon Brace else if (qdepth > logical_drive->queue_depth) 543503383736SDon Brace qdepth = logical_drive->queue_depth; 543603383736SDon Brace 543703383736SDon Brace return scsi_change_queue_depth(sdev, qdepth); 54387c0a0229SDon Brace } 54397c0a0229SDon Brace 5440a08a8471SStephen M. Cameron static int hpsa_scan_finished(struct Scsi_Host *sh, 5441a08a8471SStephen M. Cameron unsigned long elapsed_time) 5442a08a8471SStephen M. Cameron { 5443a08a8471SStephen M. Cameron struct ctlr_info *h = shost_to_hba(sh); 5444a08a8471SStephen M. Cameron unsigned long flags; 5445a08a8471SStephen M. Cameron int finished; 5446a08a8471SStephen M. Cameron 5447a08a8471SStephen M. Cameron spin_lock_irqsave(&h->scan_lock, flags); 5448a08a8471SStephen M. Cameron finished = h->scan_finished; 5449a08a8471SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 5450a08a8471SStephen M. Cameron return finished; 5451a08a8471SStephen M. Cameron } 5452a08a8471SStephen M. Cameron 54532946e82bSRobert Elliott static int hpsa_scsi_host_alloc(struct ctlr_info *h) 5454edd16368SStephen M. Cameron { 5455b705690dSStephen M. Cameron struct Scsi_Host *sh; 5456edd16368SStephen M. Cameron 5457b705690dSStephen M. Cameron sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h)); 54582946e82bSRobert Elliott if (sh == NULL) { 54592946e82bSRobert Elliott dev_err(&h->pdev->dev, "scsi_host_alloc failed\n"); 54602946e82bSRobert Elliott return -ENOMEM; 54612946e82bSRobert Elliott } 5462b705690dSStephen M. Cameron 5463b705690dSStephen M. Cameron sh->io_port = 0; 5464b705690dSStephen M. Cameron sh->n_io_port = 0; 5465b705690dSStephen M. Cameron sh->this_id = -1; 5466b705690dSStephen M. Cameron sh->max_channel = 3; 5467b705690dSStephen M. Cameron sh->max_cmd_len = MAX_COMMAND_SIZE; 5468b705690dSStephen M. Cameron sh->max_lun = HPSA_MAX_LUN; 5469b705690dSStephen M. Cameron sh->max_id = HPSA_MAX_LUN; 547041ce4c35SStephen Cameron sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS; 5471d54c5c24SStephen Cameron sh->cmd_per_lun = sh->can_queue; 5472b705690dSStephen M. Cameron sh->sg_tablesize = h->maxsgentries; 5473d04e62b9SKevin Barnett sh->transportt = hpsa_sas_transport_template; 5474b705690dSStephen M. Cameron sh->hostdata[0] = (unsigned long) h; 5475b705690dSStephen M. Cameron sh->irq = h->intr[h->intr_mode]; 5476b705690dSStephen M. Cameron sh->unique_id = sh->irq; 547764d513acSChristoph Hellwig 54782946e82bSRobert Elliott h->scsi_host = sh; 54792946e82bSRobert Elliott return 0; 54802946e82bSRobert Elliott } 54812946e82bSRobert Elliott 54822946e82bSRobert Elliott static int hpsa_scsi_add_host(struct ctlr_info *h) 54832946e82bSRobert Elliott { 54842946e82bSRobert Elliott int rv; 54852946e82bSRobert Elliott 54862946e82bSRobert Elliott rv = scsi_add_host(h->scsi_host, &h->pdev->dev); 54872946e82bSRobert Elliott if (rv) { 54882946e82bSRobert Elliott dev_err(&h->pdev->dev, "scsi_add_host failed\n"); 54892946e82bSRobert Elliott return rv; 54902946e82bSRobert Elliott } 54912946e82bSRobert Elliott scsi_scan_host(h->scsi_host); 54922946e82bSRobert Elliott return 0; 5493edd16368SStephen M. Cameron } 5494edd16368SStephen M. Cameron 5495b69324ffSWebb Scales /* 549673153fe5SWebb Scales * The block layer has already gone to the trouble of picking out a unique, 549773153fe5SWebb Scales * small-integer tag for this request. We use an offset from that value as 549873153fe5SWebb Scales * an index to select our command block. (The offset allows us to reserve the 549973153fe5SWebb Scales * low-numbered entries for our own uses.) 550073153fe5SWebb Scales */ 550173153fe5SWebb Scales static int hpsa_get_cmd_index(struct scsi_cmnd *scmd) 550273153fe5SWebb Scales { 550373153fe5SWebb Scales int idx = scmd->request->tag; 550473153fe5SWebb Scales 550573153fe5SWebb Scales if (idx < 0) 550673153fe5SWebb Scales return idx; 550773153fe5SWebb Scales 550873153fe5SWebb Scales /* Offset to leave space for internal cmds. */ 550973153fe5SWebb Scales return idx += HPSA_NRESERVED_CMDS; 551073153fe5SWebb Scales } 551173153fe5SWebb Scales 551273153fe5SWebb Scales /* 5513b69324ffSWebb Scales * Send a TEST_UNIT_READY command to the specified LUN using the specified 5514b69324ffSWebb Scales * reply queue; returns zero if the unit is ready, and non-zero otherwise. 5515b69324ffSWebb Scales */ 5516b69324ffSWebb Scales static int hpsa_send_test_unit_ready(struct ctlr_info *h, 5517b69324ffSWebb Scales struct CommandList *c, unsigned char lunaddr[], 5518b69324ffSWebb Scales int reply_queue) 5519edd16368SStephen M. Cameron { 55208919358eSTomas Henzl int rc; 5521edd16368SStephen M. Cameron 5522a2dac136SStephen M. Cameron /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */ 5523a2dac136SStephen M. Cameron (void) fill_cmd(c, TEST_UNIT_READY, h, 5524a2dac136SStephen M. Cameron NULL, 0, 0, lunaddr, TYPE_CMD); 5525c448ecfaSDon Brace rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 552625163bd5SWebb Scales if (rc) 5527b69324ffSWebb Scales return rc; 5528edd16368SStephen M. Cameron /* no unmap needed here because no data xfer. */ 5529edd16368SStephen M. Cameron 5530b69324ffSWebb Scales /* Check if the unit is already ready. */ 5531edd16368SStephen M. Cameron if (c->err_info->CommandStatus == CMD_SUCCESS) 5532b69324ffSWebb Scales return 0; 5533edd16368SStephen M. Cameron 5534b69324ffSWebb Scales /* 5535b69324ffSWebb Scales * The first command sent after reset will receive "unit attention" to 5536b69324ffSWebb Scales * indicate that the LUN has been reset...this is actually what we're 5537b69324ffSWebb Scales * looking for (but, success is good too). 5538b69324ffSWebb Scales */ 5539edd16368SStephen M. Cameron if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 5540edd16368SStephen M. Cameron c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION && 5541edd16368SStephen M. Cameron (c->err_info->SenseInfo[2] == NO_SENSE || 5542edd16368SStephen M. Cameron c->err_info->SenseInfo[2] == UNIT_ATTENTION)) 5543b69324ffSWebb Scales return 0; 5544b69324ffSWebb Scales 5545b69324ffSWebb Scales return 1; 5546b69324ffSWebb Scales } 5547b69324ffSWebb Scales 5548b69324ffSWebb Scales /* 5549b69324ffSWebb Scales * Wait for a TEST_UNIT_READY command to complete, retrying as necessary; 5550b69324ffSWebb Scales * returns zero when the unit is ready, and non-zero when giving up. 5551b69324ffSWebb Scales */ 5552b69324ffSWebb Scales static int hpsa_wait_for_test_unit_ready(struct ctlr_info *h, 5553b69324ffSWebb Scales struct CommandList *c, 5554b69324ffSWebb Scales unsigned char lunaddr[], int reply_queue) 5555b69324ffSWebb Scales { 5556b69324ffSWebb Scales int rc; 5557b69324ffSWebb Scales int count = 0; 5558b69324ffSWebb Scales int waittime = 1; /* seconds */ 5559b69324ffSWebb Scales 5560b69324ffSWebb Scales /* Send test unit ready until device ready, or give up. */ 5561b69324ffSWebb Scales for (count = 0; count < HPSA_TUR_RETRY_LIMIT; count++) { 5562b69324ffSWebb Scales 5563b69324ffSWebb Scales /* 5564b69324ffSWebb Scales * Wait for a bit. do this first, because if we send 5565b69324ffSWebb Scales * the TUR right away, the reset will just abort it. 5566b69324ffSWebb Scales */ 5567b69324ffSWebb Scales msleep(1000 * waittime); 5568b69324ffSWebb Scales 5569b69324ffSWebb Scales rc = hpsa_send_test_unit_ready(h, c, lunaddr, reply_queue); 5570b69324ffSWebb Scales if (!rc) 5571edd16368SStephen M. Cameron break; 5572b69324ffSWebb Scales 5573b69324ffSWebb Scales /* Increase wait time with each try, up to a point. */ 5574b69324ffSWebb Scales if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS) 5575b69324ffSWebb Scales waittime *= 2; 5576b69324ffSWebb Scales 5577b69324ffSWebb Scales dev_warn(&h->pdev->dev, 5578b69324ffSWebb Scales "waiting %d secs for device to become ready.\n", 5579b69324ffSWebb Scales waittime); 5580b69324ffSWebb Scales } 5581b69324ffSWebb Scales 5582b69324ffSWebb Scales return rc; 5583b69324ffSWebb Scales } 5584b69324ffSWebb Scales 5585b69324ffSWebb Scales static int wait_for_device_to_become_ready(struct ctlr_info *h, 5586b69324ffSWebb Scales unsigned char lunaddr[], 5587b69324ffSWebb Scales int reply_queue) 5588b69324ffSWebb Scales { 5589b69324ffSWebb Scales int first_queue; 5590b69324ffSWebb Scales int last_queue; 5591b69324ffSWebb Scales int rq; 5592b69324ffSWebb Scales int rc = 0; 5593b69324ffSWebb Scales struct CommandList *c; 5594b69324ffSWebb Scales 5595b69324ffSWebb Scales c = cmd_alloc(h); 5596b69324ffSWebb Scales 5597b69324ffSWebb Scales /* 5598b69324ffSWebb Scales * If no specific reply queue was requested, then send the TUR 5599b69324ffSWebb Scales * repeatedly, requesting a reply on each reply queue; otherwise execute 5600b69324ffSWebb Scales * the loop exactly once using only the specified queue. 5601b69324ffSWebb Scales */ 5602b69324ffSWebb Scales if (reply_queue == DEFAULT_REPLY_QUEUE) { 5603b69324ffSWebb Scales first_queue = 0; 5604b69324ffSWebb Scales last_queue = h->nreply_queues - 1; 5605b69324ffSWebb Scales } else { 5606b69324ffSWebb Scales first_queue = reply_queue; 5607b69324ffSWebb Scales last_queue = reply_queue; 5608b69324ffSWebb Scales } 5609b69324ffSWebb Scales 5610b69324ffSWebb Scales for (rq = first_queue; rq <= last_queue; rq++) { 5611b69324ffSWebb Scales rc = hpsa_wait_for_test_unit_ready(h, c, lunaddr, rq); 5612b69324ffSWebb Scales if (rc) 5613b69324ffSWebb Scales break; 5614edd16368SStephen M. Cameron } 5615edd16368SStephen M. Cameron 5616edd16368SStephen M. Cameron if (rc) 5617edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "giving up on device.\n"); 5618edd16368SStephen M. Cameron else 5619edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "device is ready.\n"); 5620edd16368SStephen M. Cameron 562145fcb86eSStephen Cameron cmd_free(h, c); 5622edd16368SStephen M. Cameron return rc; 5623edd16368SStephen M. Cameron } 5624edd16368SStephen M. Cameron 5625edd16368SStephen M. Cameron /* Need at least one of these error handlers to keep ../scsi/hosts.c from 5626edd16368SStephen M. Cameron * complaining. Doing a host- or bus-reset can't do anything good here. 5627edd16368SStephen M. Cameron */ 5628edd16368SStephen M. Cameron static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd) 5629edd16368SStephen M. Cameron { 5630edd16368SStephen M. Cameron int rc; 5631edd16368SStephen M. Cameron struct ctlr_info *h; 5632edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *dev; 56330b9b7b6eSScott Teel u8 reset_type; 56342dc127bbSDan Carpenter char msg[48]; 5635edd16368SStephen M. Cameron 5636edd16368SStephen M. Cameron /* find the controller to which the command to be aborted was sent */ 5637edd16368SStephen M. Cameron h = sdev_to_hba(scsicmd->device); 5638edd16368SStephen M. Cameron if (h == NULL) /* paranoia */ 5639edd16368SStephen M. Cameron return FAILED; 5640e345893bSDon Brace 5641e345893bSDon Brace if (lockup_detected(h)) 5642e345893bSDon Brace return FAILED; 5643e345893bSDon Brace 5644edd16368SStephen M. Cameron dev = scsicmd->device->hostdata; 5645edd16368SStephen M. Cameron if (!dev) { 5646d604f533SWebb Scales dev_err(&h->pdev->dev, "%s: device lookup failed\n", __func__); 5647edd16368SStephen M. Cameron return FAILED; 5648edd16368SStephen M. Cameron } 564925163bd5SWebb Scales 565025163bd5SWebb Scales /* if controller locked up, we can guarantee command won't complete */ 565125163bd5SWebb Scales if (lockup_detected(h)) { 56522dc127bbSDan Carpenter snprintf(msg, sizeof(msg), 56532dc127bbSDan Carpenter "cmd %d RESET FAILED, lockup detected", 565473153fe5SWebb Scales hpsa_get_cmd_index(scsicmd)); 565573153fe5SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 565625163bd5SWebb Scales return FAILED; 565725163bd5SWebb Scales } 565825163bd5SWebb Scales 565925163bd5SWebb Scales /* this reset request might be the result of a lockup; check */ 566025163bd5SWebb Scales if (detect_controller_lockup(h)) { 56612dc127bbSDan Carpenter snprintf(msg, sizeof(msg), 56622dc127bbSDan Carpenter "cmd %d RESET FAILED, new lockup detected", 566373153fe5SWebb Scales hpsa_get_cmd_index(scsicmd)); 566473153fe5SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 566525163bd5SWebb Scales return FAILED; 566625163bd5SWebb Scales } 566725163bd5SWebb Scales 5668d604f533SWebb Scales /* Do not attempt on controller */ 5669d604f533SWebb Scales if (is_hba_lunid(dev->scsi3addr)) 5670d604f533SWebb Scales return SUCCESS; 5671d604f533SWebb Scales 56720b9b7b6eSScott Teel if (is_logical_dev_addr_mode(dev->scsi3addr)) 56730b9b7b6eSScott Teel reset_type = HPSA_DEVICE_RESET_MSG; 56740b9b7b6eSScott Teel else 56750b9b7b6eSScott Teel reset_type = HPSA_PHYS_TARGET_RESET; 56760b9b7b6eSScott Teel 56770b9b7b6eSScott Teel sprintf(msg, "resetting %s", 56780b9b7b6eSScott Teel reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical "); 56790b9b7b6eSScott Teel hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 568025163bd5SWebb Scales 5681da03ded0SDon Brace h->reset_in_progress = 1; 5682d416b0c7SStephen M. Cameron 5683edd16368SStephen M. Cameron /* send a reset to the SCSI LUN which the command was sent to */ 56840b9b7b6eSScott Teel rc = hpsa_do_reset(h, dev, dev->scsi3addr, reset_type, 568525163bd5SWebb Scales DEFAULT_REPLY_QUEUE); 56860b9b7b6eSScott Teel sprintf(msg, "reset %s %s", 56870b9b7b6eSScott Teel reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ", 56882dc127bbSDan Carpenter rc == 0 ? "completed successfully" : "failed"); 5689d604f533SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 5690da03ded0SDon Brace h->reset_in_progress = 0; 5691d604f533SWebb Scales return rc == 0 ? SUCCESS : FAILED; 5692edd16368SStephen M. Cameron } 5693edd16368SStephen M. Cameron 56946cba3f19SStephen M. Cameron static void swizzle_abort_tag(u8 *tag) 56956cba3f19SStephen M. Cameron { 56966cba3f19SStephen M. Cameron u8 original_tag[8]; 56976cba3f19SStephen M. Cameron 56986cba3f19SStephen M. Cameron memcpy(original_tag, tag, 8); 56996cba3f19SStephen M. Cameron tag[0] = original_tag[3]; 57006cba3f19SStephen M. Cameron tag[1] = original_tag[2]; 57016cba3f19SStephen M. Cameron tag[2] = original_tag[1]; 57026cba3f19SStephen M. Cameron tag[3] = original_tag[0]; 57036cba3f19SStephen M. Cameron tag[4] = original_tag[7]; 57046cba3f19SStephen M. Cameron tag[5] = original_tag[6]; 57056cba3f19SStephen M. Cameron tag[6] = original_tag[5]; 57066cba3f19SStephen M. Cameron tag[7] = original_tag[4]; 57076cba3f19SStephen M. Cameron } 57086cba3f19SStephen M. Cameron 570917eb87d2SScott Teel static void hpsa_get_tag(struct ctlr_info *h, 57102b08b3e9SDon Brace struct CommandList *c, __le32 *taglower, __le32 *tagupper) 571117eb87d2SScott Teel { 57122b08b3e9SDon Brace u64 tag; 571317eb87d2SScott Teel if (c->cmd_type == CMD_IOACCEL1) { 571417eb87d2SScott Teel struct io_accel1_cmd *cm1 = (struct io_accel1_cmd *) 571517eb87d2SScott Teel &h->ioaccel_cmd_pool[c->cmdindex]; 57162b08b3e9SDon Brace tag = le64_to_cpu(cm1->tag); 57172b08b3e9SDon Brace *tagupper = cpu_to_le32(tag >> 32); 57182b08b3e9SDon Brace *taglower = cpu_to_le32(tag); 571954b6e9e9SScott Teel return; 572054b6e9e9SScott Teel } 572154b6e9e9SScott Teel if (c->cmd_type == CMD_IOACCEL2) { 572254b6e9e9SScott Teel struct io_accel2_cmd *cm2 = (struct io_accel2_cmd *) 572354b6e9e9SScott Teel &h->ioaccel2_cmd_pool[c->cmdindex]; 5724dd0e19f3SScott Teel /* upper tag not used in ioaccel2 mode */ 5725dd0e19f3SScott Teel memset(tagupper, 0, sizeof(*tagupper)); 5726dd0e19f3SScott Teel *taglower = cm2->Tag; 572754b6e9e9SScott Teel return; 572854b6e9e9SScott Teel } 57292b08b3e9SDon Brace tag = le64_to_cpu(c->Header.tag); 57302b08b3e9SDon Brace *tagupper = cpu_to_le32(tag >> 32); 57312b08b3e9SDon Brace *taglower = cpu_to_le32(tag); 573217eb87d2SScott Teel } 573354b6e9e9SScott Teel 573475167d2cSStephen M. Cameron static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr, 57359b5c48c2SStephen Cameron struct CommandList *abort, int reply_queue) 573675167d2cSStephen M. Cameron { 573775167d2cSStephen M. Cameron int rc = IO_OK; 573875167d2cSStephen M. Cameron struct CommandList *c; 573975167d2cSStephen M. Cameron struct ErrorInfo *ei; 57402b08b3e9SDon Brace __le32 tagupper, taglower; 574175167d2cSStephen M. Cameron 574245fcb86eSStephen Cameron c = cmd_alloc(h); 574375167d2cSStephen M. Cameron 5744a2dac136SStephen M. Cameron /* fill_cmd can't fail here, no buffer to map */ 57459b5c48c2SStephen Cameron (void) fill_cmd(c, HPSA_ABORT_MSG, h, &abort->Header.tag, 5746a2dac136SStephen M. Cameron 0, 0, scsi3addr, TYPE_MSG); 57479b5c48c2SStephen Cameron if (h->needs_abort_tags_swizzled) 57486cba3f19SStephen M. Cameron swizzle_abort_tag(&c->Request.CDB[4]); 5749c448ecfaSDon Brace (void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 575017eb87d2SScott Teel hpsa_get_tag(h, abort, &taglower, &tagupper); 575125163bd5SWebb Scales dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd(abort) completed.\n", 575217eb87d2SScott Teel __func__, tagupper, taglower); 575375167d2cSStephen M. Cameron /* no unmap needed here because no data xfer. */ 575475167d2cSStephen M. Cameron 575575167d2cSStephen M. Cameron ei = c->err_info; 575675167d2cSStephen M. Cameron switch (ei->CommandStatus) { 575775167d2cSStephen M. Cameron case CMD_SUCCESS: 575875167d2cSStephen M. Cameron break; 57599437ac43SStephen Cameron case CMD_TMF_STATUS: 57609437ac43SStephen Cameron rc = hpsa_evaluate_tmf_status(h, c); 57619437ac43SStephen Cameron break; 576275167d2cSStephen M. Cameron case CMD_UNABORTABLE: /* Very common, don't make noise. */ 576375167d2cSStephen M. Cameron rc = -1; 576475167d2cSStephen M. Cameron break; 576575167d2cSStephen M. Cameron default: 576675167d2cSStephen M. Cameron dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n", 576717eb87d2SScott Teel __func__, tagupper, taglower); 5768d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 576975167d2cSStephen M. Cameron rc = -1; 577075167d2cSStephen M. Cameron break; 577175167d2cSStephen M. Cameron } 577245fcb86eSStephen Cameron cmd_free(h, c); 5773dd0e19f3SScott Teel dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", 5774dd0e19f3SScott Teel __func__, tagupper, taglower); 577575167d2cSStephen M. Cameron return rc; 577675167d2cSStephen M. Cameron } 577775167d2cSStephen M. Cameron 57788be986ccSStephen Cameron static void setup_ioaccel2_abort_cmd(struct CommandList *c, struct ctlr_info *h, 57798be986ccSStephen Cameron struct CommandList *command_to_abort, int reply_queue) 57808be986ccSStephen Cameron { 57818be986ccSStephen Cameron struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 57828be986ccSStephen Cameron struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2; 57838be986ccSStephen Cameron struct io_accel2_cmd *c2a = 57848be986ccSStephen Cameron &h->ioaccel2_cmd_pool[command_to_abort->cmdindex]; 5785a58e7e53SWebb Scales struct scsi_cmnd *scmd = command_to_abort->scsi_cmd; 57868be986ccSStephen Cameron struct hpsa_scsi_dev_t *dev = scmd->device->hostdata; 57878be986ccSStephen Cameron 57888be986ccSStephen Cameron /* 57898be986ccSStephen Cameron * We're overlaying struct hpsa_tmf_struct on top of something which 57908be986ccSStephen Cameron * was allocated as a struct io_accel2_cmd, so we better be sure it 57918be986ccSStephen Cameron * actually fits, and doesn't overrun the error info space. 57928be986ccSStephen Cameron */ 57938be986ccSStephen Cameron BUILD_BUG_ON(sizeof(struct hpsa_tmf_struct) > 57948be986ccSStephen Cameron sizeof(struct io_accel2_cmd)); 57958be986ccSStephen Cameron BUG_ON(offsetof(struct io_accel2_cmd, error_data) < 57968be986ccSStephen Cameron offsetof(struct hpsa_tmf_struct, error_len) + 57978be986ccSStephen Cameron sizeof(ac->error_len)); 57988be986ccSStephen Cameron 57998be986ccSStephen Cameron c->cmd_type = IOACCEL2_TMF; 5800a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 5801a58e7e53SWebb Scales 58028be986ccSStephen Cameron /* Adjust the DMA address to point to the accelerated command buffer */ 58038be986ccSStephen Cameron c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle + 58048be986ccSStephen Cameron (c->cmdindex * sizeof(struct io_accel2_cmd)); 58058be986ccSStephen Cameron BUG_ON(c->busaddr & 0x0000007F); 58068be986ccSStephen Cameron 58078be986ccSStephen Cameron memset(ac, 0, sizeof(*c2)); /* yes this is correct */ 58088be986ccSStephen Cameron ac->iu_type = IOACCEL2_IU_TMF_TYPE; 58098be986ccSStephen Cameron ac->reply_queue = reply_queue; 58108be986ccSStephen Cameron ac->tmf = IOACCEL2_TMF_ABORT; 58118be986ccSStephen Cameron ac->it_nexus = cpu_to_le32(dev->ioaccel_handle); 58128be986ccSStephen Cameron memset(ac->lun_id, 0, sizeof(ac->lun_id)); 58138be986ccSStephen Cameron ac->tag = cpu_to_le64(c->cmdindex << DIRECT_LOOKUP_SHIFT); 58148be986ccSStephen Cameron ac->abort_tag = cpu_to_le64(le32_to_cpu(c2a->Tag)); 58158be986ccSStephen Cameron ac->error_ptr = cpu_to_le64(c->busaddr + 58168be986ccSStephen Cameron offsetof(struct io_accel2_cmd, error_data)); 58178be986ccSStephen Cameron ac->error_len = cpu_to_le32(sizeof(c2->error_data)); 58188be986ccSStephen Cameron } 58198be986ccSStephen Cameron 582054b6e9e9SScott Teel /* ioaccel2 path firmware cannot handle abort task requests. 582154b6e9e9SScott Teel * Change abort requests to physical target reset, and send to the 582254b6e9e9SScott Teel * address of the physical disk used for the ioaccel 2 command. 582354b6e9e9SScott Teel * Return 0 on success (IO_OK) 582454b6e9e9SScott Teel * -1 on failure 582554b6e9e9SScott Teel */ 582654b6e9e9SScott Teel 582754b6e9e9SScott Teel static int hpsa_send_reset_as_abort_ioaccel2(struct ctlr_info *h, 582825163bd5SWebb Scales unsigned char *scsi3addr, struct CommandList *abort, int reply_queue) 582954b6e9e9SScott Teel { 583054b6e9e9SScott Teel int rc = IO_OK; 583154b6e9e9SScott Teel struct scsi_cmnd *scmd; /* scsi command within request being aborted */ 583254b6e9e9SScott Teel struct hpsa_scsi_dev_t *dev; /* device to which scsi cmd was sent */ 583354b6e9e9SScott Teel unsigned char phys_scsi3addr[8]; /* addr of phys disk with volume */ 583454b6e9e9SScott Teel unsigned char *psa = &phys_scsi3addr[0]; 583554b6e9e9SScott Teel 583654b6e9e9SScott Teel /* Get a pointer to the hpsa logical device. */ 58377fa3030cSStephen Cameron scmd = abort->scsi_cmd; 583854b6e9e9SScott Teel dev = (struct hpsa_scsi_dev_t *)(scmd->device->hostdata); 583954b6e9e9SScott Teel if (dev == NULL) { 584054b6e9e9SScott Teel dev_warn(&h->pdev->dev, 584154b6e9e9SScott Teel "Cannot abort: no device pointer for command.\n"); 584254b6e9e9SScott Teel return -1; /* not abortable */ 584354b6e9e9SScott Teel } 584454b6e9e9SScott Teel 58452ba8bfc8SStephen M. Cameron if (h->raid_offload_debug > 0) 58462ba8bfc8SStephen M. Cameron dev_info(&h->pdev->dev, 58470d96ef5fSWebb Scales "scsi %d:%d:%d:%d %s scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 58482ba8bfc8SStephen M. Cameron h->scsi_host->host_no, dev->bus, dev->target, dev->lun, 58490d96ef5fSWebb Scales "Reset as abort", 58502ba8bfc8SStephen M. Cameron scsi3addr[0], scsi3addr[1], scsi3addr[2], scsi3addr[3], 58512ba8bfc8SStephen M. Cameron scsi3addr[4], scsi3addr[5], scsi3addr[6], scsi3addr[7]); 58522ba8bfc8SStephen M. Cameron 585354b6e9e9SScott Teel if (!dev->offload_enabled) { 585454b6e9e9SScott Teel dev_warn(&h->pdev->dev, 585554b6e9e9SScott Teel "Can't abort: device is not operating in HP SSD Smart Path mode.\n"); 585654b6e9e9SScott Teel return -1; /* not abortable */ 585754b6e9e9SScott Teel } 585854b6e9e9SScott Teel 585954b6e9e9SScott Teel /* Incoming scsi3addr is logical addr. We need physical disk addr. */ 586054b6e9e9SScott Teel if (!hpsa_get_pdisk_of_ioaccel2(h, abort, psa)) { 586154b6e9e9SScott Teel dev_warn(&h->pdev->dev, "Can't abort: Failed lookup of physical address.\n"); 586254b6e9e9SScott Teel return -1; /* not abortable */ 586354b6e9e9SScott Teel } 586454b6e9e9SScott Teel 586554b6e9e9SScott Teel /* send the reset */ 58662ba8bfc8SStephen M. Cameron if (h->raid_offload_debug > 0) 58672ba8bfc8SStephen M. Cameron dev_info(&h->pdev->dev, 58682ba8bfc8SStephen M. Cameron "Reset as abort: Resetting physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 58692ba8bfc8SStephen M. Cameron psa[0], psa[1], psa[2], psa[3], 58702ba8bfc8SStephen M. Cameron psa[4], psa[5], psa[6], psa[7]); 5871d604f533SWebb Scales rc = hpsa_do_reset(h, dev, psa, HPSA_RESET_TYPE_TARGET, reply_queue); 587254b6e9e9SScott Teel if (rc != 0) { 587354b6e9e9SScott Teel dev_warn(&h->pdev->dev, 587454b6e9e9SScott Teel "Reset as abort: Failed on physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 587554b6e9e9SScott Teel psa[0], psa[1], psa[2], psa[3], 587654b6e9e9SScott Teel psa[4], psa[5], psa[6], psa[7]); 587754b6e9e9SScott Teel return rc; /* failed to reset */ 587854b6e9e9SScott Teel } 587954b6e9e9SScott Teel 588054b6e9e9SScott Teel /* wait for device to recover */ 5881b69324ffSWebb Scales if (wait_for_device_to_become_ready(h, psa, reply_queue) != 0) { 588254b6e9e9SScott Teel dev_warn(&h->pdev->dev, 588354b6e9e9SScott Teel "Reset as abort: Failed: Device never recovered from reset: 0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 588454b6e9e9SScott Teel psa[0], psa[1], psa[2], psa[3], 588554b6e9e9SScott Teel psa[4], psa[5], psa[6], psa[7]); 588654b6e9e9SScott Teel return -1; /* failed to recover */ 588754b6e9e9SScott Teel } 588854b6e9e9SScott Teel 588954b6e9e9SScott Teel /* device recovered */ 589054b6e9e9SScott Teel dev_info(&h->pdev->dev, 589154b6e9e9SScott Teel "Reset as abort: Device recovered from reset: scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 589254b6e9e9SScott Teel psa[0], psa[1], psa[2], psa[3], 589354b6e9e9SScott Teel psa[4], psa[5], psa[6], psa[7]); 589454b6e9e9SScott Teel 589554b6e9e9SScott Teel return rc; /* success */ 589654b6e9e9SScott Teel } 589754b6e9e9SScott Teel 58988be986ccSStephen Cameron static int hpsa_send_abort_ioaccel2(struct ctlr_info *h, 58998be986ccSStephen Cameron struct CommandList *abort, int reply_queue) 59008be986ccSStephen Cameron { 59018be986ccSStephen Cameron int rc = IO_OK; 59028be986ccSStephen Cameron struct CommandList *c; 59038be986ccSStephen Cameron __le32 taglower, tagupper; 59048be986ccSStephen Cameron struct hpsa_scsi_dev_t *dev; 59058be986ccSStephen Cameron struct io_accel2_cmd *c2; 59068be986ccSStephen Cameron 59078be986ccSStephen Cameron dev = abort->scsi_cmd->device->hostdata; 59088be986ccSStephen Cameron if (!dev->offload_enabled && !dev->hba_ioaccel_enabled) 59098be986ccSStephen Cameron return -1; 59108be986ccSStephen Cameron 59118be986ccSStephen Cameron c = cmd_alloc(h); 59128be986ccSStephen Cameron setup_ioaccel2_abort_cmd(c, h, abort, reply_queue); 59138be986ccSStephen Cameron c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 5914c448ecfaSDon Brace (void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 59158be986ccSStephen Cameron hpsa_get_tag(h, abort, &taglower, &tagupper); 59168be986ccSStephen Cameron dev_dbg(&h->pdev->dev, 59178be986ccSStephen Cameron "%s: Tag:0x%08x:%08x: do_simple_cmd(ioaccel2 abort) completed.\n", 59188be986ccSStephen Cameron __func__, tagupper, taglower); 59198be986ccSStephen Cameron /* no unmap needed here because no data xfer. */ 59208be986ccSStephen Cameron 59218be986ccSStephen Cameron dev_dbg(&h->pdev->dev, 59228be986ccSStephen Cameron "%s: Tag:0x%08x:%08x: abort service response = 0x%02x.\n", 59238be986ccSStephen Cameron __func__, tagupper, taglower, c2->error_data.serv_response); 59248be986ccSStephen Cameron switch (c2->error_data.serv_response) { 59258be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE: 59268be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS: 59278be986ccSStephen Cameron rc = 0; 59288be986ccSStephen Cameron break; 59298be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_TMF_REJECTED: 59308be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_FAILURE: 59318be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN: 59328be986ccSStephen Cameron rc = -1; 59338be986ccSStephen Cameron break; 59348be986ccSStephen Cameron default: 59358be986ccSStephen Cameron dev_warn(&h->pdev->dev, 59368be986ccSStephen Cameron "%s: Tag:0x%08x:%08x: unknown abort service response 0x%02x\n", 59378be986ccSStephen Cameron __func__, tagupper, taglower, 59388be986ccSStephen Cameron c2->error_data.serv_response); 59398be986ccSStephen Cameron rc = -1; 59408be986ccSStephen Cameron } 59418be986ccSStephen Cameron cmd_free(h, c); 59428be986ccSStephen Cameron dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", __func__, 59438be986ccSStephen Cameron tagupper, taglower); 59448be986ccSStephen Cameron return rc; 59458be986ccSStephen Cameron } 59468be986ccSStephen Cameron 59476cba3f19SStephen M. Cameron static int hpsa_send_abort_both_ways(struct ctlr_info *h, 594839f3deb2SDon Brace struct hpsa_scsi_dev_t *dev, struct CommandList *abort, int reply_queue) 59496cba3f19SStephen M. Cameron { 59508be986ccSStephen Cameron /* 59518be986ccSStephen Cameron * ioccelerator mode 2 commands should be aborted via the 595254b6e9e9SScott Teel * accelerated path, since RAID path is unaware of these commands, 59538be986ccSStephen Cameron * but not all underlying firmware can handle abort TMF. 59548be986ccSStephen Cameron * Change abort to physical device reset when abort TMF is unsupported. 595554b6e9e9SScott Teel */ 59568be986ccSStephen Cameron if (abort->cmd_type == CMD_IOACCEL2) { 595739f3deb2SDon Brace if ((HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags) || 595839f3deb2SDon Brace dev->physical_device) 59598be986ccSStephen Cameron return hpsa_send_abort_ioaccel2(h, abort, 59608be986ccSStephen Cameron reply_queue); 59618be986ccSStephen Cameron else 596239f3deb2SDon Brace return hpsa_send_reset_as_abort_ioaccel2(h, 596339f3deb2SDon Brace dev->scsi3addr, 596425163bd5SWebb Scales abort, reply_queue); 59658be986ccSStephen Cameron } 596639f3deb2SDon Brace return hpsa_send_abort(h, dev->scsi3addr, abort, reply_queue); 596725163bd5SWebb Scales } 596825163bd5SWebb Scales 596925163bd5SWebb Scales /* Find out which reply queue a command was meant to return on */ 597025163bd5SWebb Scales static int hpsa_extract_reply_queue(struct ctlr_info *h, 597125163bd5SWebb Scales struct CommandList *c) 597225163bd5SWebb Scales { 597325163bd5SWebb Scales if (c->cmd_type == CMD_IOACCEL2) 597425163bd5SWebb Scales return h->ioaccel2_cmd_pool[c->cmdindex].reply_queue; 597525163bd5SWebb Scales return c->Header.ReplyQueue; 59766cba3f19SStephen M. Cameron } 59776cba3f19SStephen M. Cameron 59789b5c48c2SStephen Cameron /* 59799b5c48c2SStephen Cameron * Limit concurrency of abort commands to prevent 59809b5c48c2SStephen Cameron * over-subscription of commands 59819b5c48c2SStephen Cameron */ 59829b5c48c2SStephen Cameron static inline int wait_for_available_abort_cmd(struct ctlr_info *h) 59839b5c48c2SStephen Cameron { 59849b5c48c2SStephen Cameron #define ABORT_CMD_WAIT_MSECS 5000 59859b5c48c2SStephen Cameron return !wait_event_timeout(h->abort_cmd_wait_queue, 59869b5c48c2SStephen Cameron atomic_dec_if_positive(&h->abort_cmds_available) >= 0, 59879b5c48c2SStephen Cameron msecs_to_jiffies(ABORT_CMD_WAIT_MSECS)); 59889b5c48c2SStephen Cameron } 59899b5c48c2SStephen Cameron 599075167d2cSStephen M. Cameron /* Send an abort for the specified command. 599175167d2cSStephen M. Cameron * If the device and controller support it, 599275167d2cSStephen M. Cameron * send a task abort request. 599375167d2cSStephen M. Cameron */ 599475167d2cSStephen M. Cameron static int hpsa_eh_abort_handler(struct scsi_cmnd *sc) 599575167d2cSStephen M. Cameron { 599675167d2cSStephen M. Cameron 5997a58e7e53SWebb Scales int rc; 599875167d2cSStephen M. Cameron struct ctlr_info *h; 599975167d2cSStephen M. Cameron struct hpsa_scsi_dev_t *dev; 600075167d2cSStephen M. Cameron struct CommandList *abort; /* pointer to command to be aborted */ 600175167d2cSStephen M. Cameron struct scsi_cmnd *as; /* ptr to scsi cmd inside aborted command. */ 600275167d2cSStephen M. Cameron char msg[256]; /* For debug messaging. */ 600375167d2cSStephen M. Cameron int ml = 0; 60042b08b3e9SDon Brace __le32 tagupper, taglower; 600525163bd5SWebb Scales int refcount, reply_queue; 600625163bd5SWebb Scales 600725163bd5SWebb Scales if (sc == NULL) 600825163bd5SWebb Scales return FAILED; 600975167d2cSStephen M. Cameron 60109b5c48c2SStephen Cameron if (sc->device == NULL) 60119b5c48c2SStephen Cameron return FAILED; 60129b5c48c2SStephen Cameron 601375167d2cSStephen M. Cameron /* Find the controller of the command to be aborted */ 601475167d2cSStephen M. Cameron h = sdev_to_hba(sc->device); 60159b5c48c2SStephen Cameron if (h == NULL) 601675167d2cSStephen M. Cameron return FAILED; 601775167d2cSStephen M. Cameron 601825163bd5SWebb Scales /* Find the device of the command to be aborted */ 601925163bd5SWebb Scales dev = sc->device->hostdata; 602025163bd5SWebb Scales if (!dev) { 602125163bd5SWebb Scales dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n", 602225163bd5SWebb Scales msg); 6023e345893bSDon Brace return FAILED; 602425163bd5SWebb Scales } 602525163bd5SWebb Scales 602625163bd5SWebb Scales /* If controller locked up, we can guarantee command won't complete */ 602725163bd5SWebb Scales if (lockup_detected(h)) { 602825163bd5SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, 602925163bd5SWebb Scales "ABORT FAILED, lockup detected"); 603025163bd5SWebb Scales return FAILED; 603125163bd5SWebb Scales } 603225163bd5SWebb Scales 603325163bd5SWebb Scales /* This is a good time to check if controller lockup has occurred */ 603425163bd5SWebb Scales if (detect_controller_lockup(h)) { 603525163bd5SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, 603625163bd5SWebb Scales "ABORT FAILED, new lockup detected"); 603725163bd5SWebb Scales return FAILED; 603825163bd5SWebb Scales } 6039e345893bSDon Brace 604075167d2cSStephen M. Cameron /* Check that controller supports some kind of task abort */ 604175167d2cSStephen M. Cameron if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) && 604275167d2cSStephen M. Cameron !(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags)) 604375167d2cSStephen M. Cameron return FAILED; 604475167d2cSStephen M. Cameron 604575167d2cSStephen M. Cameron memset(msg, 0, sizeof(msg)); 60464b761557SRobert Elliott ml += sprintf(msg+ml, "scsi %d:%d:%d:%llu %s %p", 604775167d2cSStephen M. Cameron h->scsi_host->host_no, sc->device->channel, 60480d96ef5fSWebb Scales sc->device->id, sc->device->lun, 60494b761557SRobert Elliott "Aborting command", sc); 605075167d2cSStephen M. Cameron 605175167d2cSStephen M. Cameron /* Get SCSI command to be aborted */ 605275167d2cSStephen M. Cameron abort = (struct CommandList *) sc->host_scribble; 605375167d2cSStephen M. Cameron if (abort == NULL) { 6054281a7fd0SWebb Scales /* This can happen if the command already completed. */ 6055281a7fd0SWebb Scales return SUCCESS; 6056281a7fd0SWebb Scales } 6057281a7fd0SWebb Scales refcount = atomic_inc_return(&abort->refcount); 6058281a7fd0SWebb Scales if (refcount == 1) { /* Command is done already. */ 6059281a7fd0SWebb Scales cmd_free(h, abort); 6060281a7fd0SWebb Scales return SUCCESS; 606175167d2cSStephen M. Cameron } 60629b5c48c2SStephen Cameron 60639b5c48c2SStephen Cameron /* Don't bother trying the abort if we know it won't work. */ 60649b5c48c2SStephen Cameron if (abort->cmd_type != CMD_IOACCEL2 && 60659b5c48c2SStephen Cameron abort->cmd_type != CMD_IOACCEL1 && !dev->supports_aborts) { 60669b5c48c2SStephen Cameron cmd_free(h, abort); 60679b5c48c2SStephen Cameron return FAILED; 60689b5c48c2SStephen Cameron } 60699b5c48c2SStephen Cameron 6070a58e7e53SWebb Scales /* 6071a58e7e53SWebb Scales * Check that we're aborting the right command. 6072a58e7e53SWebb Scales * It's possible the CommandList already completed and got re-used. 6073a58e7e53SWebb Scales */ 6074a58e7e53SWebb Scales if (abort->scsi_cmd != sc) { 6075a58e7e53SWebb Scales cmd_free(h, abort); 6076a58e7e53SWebb Scales return SUCCESS; 6077a58e7e53SWebb Scales } 6078a58e7e53SWebb Scales 6079a58e7e53SWebb Scales abort->abort_pending = true; 608017eb87d2SScott Teel hpsa_get_tag(h, abort, &taglower, &tagupper); 608125163bd5SWebb Scales reply_queue = hpsa_extract_reply_queue(h, abort); 608217eb87d2SScott Teel ml += sprintf(msg+ml, "Tag:0x%08x:%08x ", tagupper, taglower); 60837fa3030cSStephen Cameron as = abort->scsi_cmd; 608475167d2cSStephen M. Cameron if (as != NULL) 60854b761557SRobert Elliott ml += sprintf(msg+ml, 60864b761557SRobert Elliott "CDBLen: %d CDB: 0x%02x%02x... SN: 0x%lx ", 60874b761557SRobert Elliott as->cmd_len, as->cmnd[0], as->cmnd[1], 60884b761557SRobert Elliott as->serial_number); 60894b761557SRobert Elliott dev_warn(&h->pdev->dev, "%s BEING SENT\n", msg); 60900d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, "Aborting command"); 60914b761557SRobert Elliott 609275167d2cSStephen M. Cameron /* 609375167d2cSStephen M. Cameron * Command is in flight, or possibly already completed 609475167d2cSStephen M. Cameron * by the firmware (but not to the scsi mid layer) but we can't 609575167d2cSStephen M. Cameron * distinguish which. Send the abort down. 609675167d2cSStephen M. Cameron */ 60979b5c48c2SStephen Cameron if (wait_for_available_abort_cmd(h)) { 60989b5c48c2SStephen Cameron dev_warn(&h->pdev->dev, 60994b761557SRobert Elliott "%s FAILED, timeout waiting for an abort command to become available.\n", 61004b761557SRobert Elliott msg); 61019b5c48c2SStephen Cameron cmd_free(h, abort); 61029b5c48c2SStephen Cameron return FAILED; 61039b5c48c2SStephen Cameron } 610439f3deb2SDon Brace rc = hpsa_send_abort_both_ways(h, dev, abort, reply_queue); 61059b5c48c2SStephen Cameron atomic_inc(&h->abort_cmds_available); 61069b5c48c2SStephen Cameron wake_up_all(&h->abort_cmd_wait_queue); 610775167d2cSStephen M. Cameron if (rc != 0) { 61084b761557SRobert Elliott dev_warn(&h->pdev->dev, "%s SENT, FAILED\n", msg); 61090d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, 61100d96ef5fSWebb Scales "FAILED to abort command"); 6111281a7fd0SWebb Scales cmd_free(h, abort); 611275167d2cSStephen M. Cameron return FAILED; 611375167d2cSStephen M. Cameron } 61144b761557SRobert Elliott dev_info(&h->pdev->dev, "%s SENT, SUCCESS\n", msg); 6115d604f533SWebb Scales wait_event(h->event_sync_wait_queue, 6116a58e7e53SWebb Scales abort->scsi_cmd != sc || lockup_detected(h)); 6117281a7fd0SWebb Scales cmd_free(h, abort); 6118a58e7e53SWebb Scales return !lockup_detected(h) ? SUCCESS : FAILED; 611975167d2cSStephen M. Cameron } 612075167d2cSStephen M. Cameron 6121edd16368SStephen M. Cameron /* 612273153fe5SWebb Scales * For operations with an associated SCSI command, a command block is allocated 612373153fe5SWebb Scales * at init, and managed by cmd_tagged_alloc() and cmd_tagged_free() using the 612473153fe5SWebb Scales * block request tag as an index into a table of entries. cmd_tagged_free() is 612573153fe5SWebb Scales * the complement, although cmd_free() may be called instead. 612673153fe5SWebb Scales */ 612773153fe5SWebb Scales static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h, 612873153fe5SWebb Scales struct scsi_cmnd *scmd) 612973153fe5SWebb Scales { 613073153fe5SWebb Scales int idx = hpsa_get_cmd_index(scmd); 613173153fe5SWebb Scales struct CommandList *c = h->cmd_pool + idx; 613273153fe5SWebb Scales 613373153fe5SWebb Scales if (idx < HPSA_NRESERVED_CMDS || idx >= h->nr_cmds) { 613473153fe5SWebb Scales dev_err(&h->pdev->dev, "Bad block tag: %d not in [%d..%d]\n", 613573153fe5SWebb Scales idx, HPSA_NRESERVED_CMDS, h->nr_cmds - 1); 613673153fe5SWebb Scales /* The index value comes from the block layer, so if it's out of 613773153fe5SWebb Scales * bounds, it's probably not our bug. 613873153fe5SWebb Scales */ 613973153fe5SWebb Scales BUG(); 614073153fe5SWebb Scales } 614173153fe5SWebb Scales 614273153fe5SWebb Scales atomic_inc(&c->refcount); 614373153fe5SWebb Scales if (unlikely(!hpsa_is_cmd_idle(c))) { 614473153fe5SWebb Scales /* 614573153fe5SWebb Scales * We expect that the SCSI layer will hand us a unique tag 614673153fe5SWebb Scales * value. Thus, there should never be a collision here between 614773153fe5SWebb Scales * two requests...because if the selected command isn't idle 614873153fe5SWebb Scales * then someone is going to be very disappointed. 614973153fe5SWebb Scales */ 615073153fe5SWebb Scales dev_err(&h->pdev->dev, 615173153fe5SWebb Scales "tag collision (tag=%d) in cmd_tagged_alloc().\n", 615273153fe5SWebb Scales idx); 615373153fe5SWebb Scales if (c->scsi_cmd != NULL) 615473153fe5SWebb Scales scsi_print_command(c->scsi_cmd); 615573153fe5SWebb Scales scsi_print_command(scmd); 615673153fe5SWebb Scales } 615773153fe5SWebb Scales 615873153fe5SWebb Scales hpsa_cmd_partial_init(h, idx, c); 615973153fe5SWebb Scales return c; 616073153fe5SWebb Scales } 616173153fe5SWebb Scales 616273153fe5SWebb Scales static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c) 616373153fe5SWebb Scales { 616473153fe5SWebb Scales /* 616573153fe5SWebb Scales * Release our reference to the block. We don't need to do anything 616673153fe5SWebb Scales * else to free it, because it is accessed by index. (There's no point 616773153fe5SWebb Scales * in checking the result of the decrement, since we cannot guarantee 616873153fe5SWebb Scales * that there isn't a concurrent abort which is also accessing it.) 616973153fe5SWebb Scales */ 617073153fe5SWebb Scales (void)atomic_dec(&c->refcount); 617173153fe5SWebb Scales } 617273153fe5SWebb Scales 617373153fe5SWebb Scales /* 6174edd16368SStephen M. Cameron * For operations that cannot sleep, a command block is allocated at init, 6175edd16368SStephen M. Cameron * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track 6176edd16368SStephen M. Cameron * which ones are free or in use. Lock must be held when calling this. 6177edd16368SStephen M. Cameron * cmd_free() is the complement. 6178bf43caf3SRobert Elliott * This function never gives up and returns NULL. If it hangs, 6179bf43caf3SRobert Elliott * another thread must call cmd_free() to free some tags. 6180edd16368SStephen M. Cameron */ 6181281a7fd0SWebb Scales 6182edd16368SStephen M. Cameron static struct CommandList *cmd_alloc(struct ctlr_info *h) 6183edd16368SStephen M. Cameron { 6184edd16368SStephen M. Cameron struct CommandList *c; 6185360c73bdSStephen Cameron int refcount, i; 618673153fe5SWebb Scales int offset = 0; 6187edd16368SStephen M. Cameron 618833811026SRobert Elliott /* 618933811026SRobert Elliott * There is some *extremely* small but non-zero chance that that 61904c413128SStephen M. Cameron * multiple threads could get in here, and one thread could 61914c413128SStephen M. Cameron * be scanning through the list of bits looking for a free 61924c413128SStephen M. Cameron * one, but the free ones are always behind him, and other 61934c413128SStephen M. Cameron * threads sneak in behind him and eat them before he can 61944c413128SStephen M. Cameron * get to them, so that while there is always a free one, a 61954c413128SStephen M. Cameron * very unlucky thread might be starved anyway, never able to 61964c413128SStephen M. Cameron * beat the other threads. In reality, this happens so 61974c413128SStephen M. Cameron * infrequently as to be indistinguishable from never. 619873153fe5SWebb Scales * 619973153fe5SWebb Scales * Note that we start allocating commands before the SCSI host structure 620073153fe5SWebb Scales * is initialized. Since the search starts at bit zero, this 620173153fe5SWebb Scales * all works, since we have at least one command structure available; 620273153fe5SWebb Scales * however, it means that the structures with the low indexes have to be 620373153fe5SWebb Scales * reserved for driver-initiated requests, while requests from the block 620473153fe5SWebb Scales * layer will use the higher indexes. 62054c413128SStephen M. Cameron */ 62064c413128SStephen M. Cameron 6207281a7fd0SWebb Scales for (;;) { 620873153fe5SWebb Scales i = find_next_zero_bit(h->cmd_pool_bits, 620973153fe5SWebb Scales HPSA_NRESERVED_CMDS, 621073153fe5SWebb Scales offset); 621173153fe5SWebb Scales if (unlikely(i >= HPSA_NRESERVED_CMDS)) { 6212281a7fd0SWebb Scales offset = 0; 6213281a7fd0SWebb Scales continue; 6214281a7fd0SWebb Scales } 6215edd16368SStephen M. Cameron c = h->cmd_pool + i; 6216281a7fd0SWebb Scales refcount = atomic_inc_return(&c->refcount); 6217281a7fd0SWebb Scales if (unlikely(refcount > 1)) { 6218281a7fd0SWebb Scales cmd_free(h, c); /* already in use */ 621973153fe5SWebb Scales offset = (i + 1) % HPSA_NRESERVED_CMDS; 6220281a7fd0SWebb Scales continue; 6221281a7fd0SWebb Scales } 6222281a7fd0SWebb Scales set_bit(i & (BITS_PER_LONG - 1), 6223281a7fd0SWebb Scales h->cmd_pool_bits + (i / BITS_PER_LONG)); 6224281a7fd0SWebb Scales break; /* it's ours now. */ 6225281a7fd0SWebb Scales } 6226360c73bdSStephen Cameron hpsa_cmd_partial_init(h, i, c); 6227edd16368SStephen M. Cameron return c; 6228edd16368SStephen M. Cameron } 6229edd16368SStephen M. Cameron 623073153fe5SWebb Scales /* 623173153fe5SWebb Scales * This is the complementary operation to cmd_alloc(). Note, however, in some 623273153fe5SWebb Scales * corner cases it may also be used to free blocks allocated by 623373153fe5SWebb Scales * cmd_tagged_alloc() in which case the ref-count decrement does the trick and 623473153fe5SWebb Scales * the clear-bit is harmless. 623573153fe5SWebb Scales */ 6236edd16368SStephen M. Cameron static void cmd_free(struct ctlr_info *h, struct CommandList *c) 6237edd16368SStephen M. Cameron { 6238281a7fd0SWebb Scales if (atomic_dec_and_test(&c->refcount)) { 6239edd16368SStephen M. Cameron int i; 6240edd16368SStephen M. Cameron 6241edd16368SStephen M. Cameron i = c - h->cmd_pool; 6242edd16368SStephen M. Cameron clear_bit(i & (BITS_PER_LONG - 1), 6243edd16368SStephen M. Cameron h->cmd_pool_bits + (i / BITS_PER_LONG)); 6244edd16368SStephen M. Cameron } 6245281a7fd0SWebb Scales } 6246edd16368SStephen M. Cameron 6247edd16368SStephen M. Cameron #ifdef CONFIG_COMPAT 6248edd16368SStephen M. Cameron 624942a91641SDon Brace static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, 625042a91641SDon Brace void __user *arg) 6251edd16368SStephen M. Cameron { 6252edd16368SStephen M. Cameron IOCTL32_Command_struct __user *arg32 = 6253edd16368SStephen M. Cameron (IOCTL32_Command_struct __user *) arg; 6254edd16368SStephen M. Cameron IOCTL_Command_struct arg64; 6255edd16368SStephen M. Cameron IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64)); 6256edd16368SStephen M. Cameron int err; 6257edd16368SStephen M. Cameron u32 cp; 6258edd16368SStephen M. Cameron 6259938abd84SVasiliy Kulikov memset(&arg64, 0, sizeof(arg64)); 6260edd16368SStephen M. Cameron err = 0; 6261edd16368SStephen M. Cameron err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 6262edd16368SStephen M. Cameron sizeof(arg64.LUN_info)); 6263edd16368SStephen M. Cameron err |= copy_from_user(&arg64.Request, &arg32->Request, 6264edd16368SStephen M. Cameron sizeof(arg64.Request)); 6265edd16368SStephen M. Cameron err |= copy_from_user(&arg64.error_info, &arg32->error_info, 6266edd16368SStephen M. Cameron sizeof(arg64.error_info)); 6267edd16368SStephen M. Cameron err |= get_user(arg64.buf_size, &arg32->buf_size); 6268edd16368SStephen M. Cameron err |= get_user(cp, &arg32->buf); 6269edd16368SStephen M. Cameron arg64.buf = compat_ptr(cp); 6270edd16368SStephen M. Cameron err |= copy_to_user(p, &arg64, sizeof(arg64)); 6271edd16368SStephen M. Cameron 6272edd16368SStephen M. Cameron if (err) 6273edd16368SStephen M. Cameron return -EFAULT; 6274edd16368SStephen M. Cameron 627542a91641SDon Brace err = hpsa_ioctl(dev, CCISS_PASSTHRU, p); 6276edd16368SStephen M. Cameron if (err) 6277edd16368SStephen M. Cameron return err; 6278edd16368SStephen M. Cameron err |= copy_in_user(&arg32->error_info, &p->error_info, 6279edd16368SStephen M. Cameron sizeof(arg32->error_info)); 6280edd16368SStephen M. Cameron if (err) 6281edd16368SStephen M. Cameron return -EFAULT; 6282edd16368SStephen M. Cameron return err; 6283edd16368SStephen M. Cameron } 6284edd16368SStephen M. Cameron 6285edd16368SStephen M. Cameron static int hpsa_ioctl32_big_passthru(struct scsi_device *dev, 628642a91641SDon Brace int cmd, void __user *arg) 6287edd16368SStephen M. Cameron { 6288edd16368SStephen M. Cameron BIG_IOCTL32_Command_struct __user *arg32 = 6289edd16368SStephen M. Cameron (BIG_IOCTL32_Command_struct __user *) arg; 6290edd16368SStephen M. Cameron BIG_IOCTL_Command_struct arg64; 6291edd16368SStephen M. Cameron BIG_IOCTL_Command_struct __user *p = 6292edd16368SStephen M. Cameron compat_alloc_user_space(sizeof(arg64)); 6293edd16368SStephen M. Cameron int err; 6294edd16368SStephen M. Cameron u32 cp; 6295edd16368SStephen M. Cameron 6296938abd84SVasiliy Kulikov memset(&arg64, 0, sizeof(arg64)); 6297edd16368SStephen M. Cameron err = 0; 6298edd16368SStephen M. Cameron err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 6299edd16368SStephen M. Cameron sizeof(arg64.LUN_info)); 6300edd16368SStephen M. Cameron err |= copy_from_user(&arg64.Request, &arg32->Request, 6301edd16368SStephen M. Cameron sizeof(arg64.Request)); 6302edd16368SStephen M. Cameron err |= copy_from_user(&arg64.error_info, &arg32->error_info, 6303edd16368SStephen M. Cameron sizeof(arg64.error_info)); 6304edd16368SStephen M. Cameron err |= get_user(arg64.buf_size, &arg32->buf_size); 6305edd16368SStephen M. Cameron err |= get_user(arg64.malloc_size, &arg32->malloc_size); 6306edd16368SStephen M. Cameron err |= get_user(cp, &arg32->buf); 6307edd16368SStephen M. Cameron arg64.buf = compat_ptr(cp); 6308edd16368SStephen M. Cameron err |= copy_to_user(p, &arg64, sizeof(arg64)); 6309edd16368SStephen M. Cameron 6310edd16368SStephen M. Cameron if (err) 6311edd16368SStephen M. Cameron return -EFAULT; 6312edd16368SStephen M. Cameron 631342a91641SDon Brace err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, p); 6314edd16368SStephen M. Cameron if (err) 6315edd16368SStephen M. Cameron return err; 6316edd16368SStephen M. Cameron err |= copy_in_user(&arg32->error_info, &p->error_info, 6317edd16368SStephen M. Cameron sizeof(arg32->error_info)); 6318edd16368SStephen M. Cameron if (err) 6319edd16368SStephen M. Cameron return -EFAULT; 6320edd16368SStephen M. Cameron return err; 6321edd16368SStephen M. Cameron } 632271fe75a7SStephen M. Cameron 632342a91641SDon Brace static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void __user *arg) 632471fe75a7SStephen M. Cameron { 632571fe75a7SStephen M. Cameron switch (cmd) { 632671fe75a7SStephen M. Cameron case CCISS_GETPCIINFO: 632771fe75a7SStephen M. Cameron case CCISS_GETINTINFO: 632871fe75a7SStephen M. Cameron case CCISS_SETINTINFO: 632971fe75a7SStephen M. Cameron case CCISS_GETNODENAME: 633071fe75a7SStephen M. Cameron case CCISS_SETNODENAME: 633171fe75a7SStephen M. Cameron case CCISS_GETHEARTBEAT: 633271fe75a7SStephen M. Cameron case CCISS_GETBUSTYPES: 633371fe75a7SStephen M. Cameron case CCISS_GETFIRMVER: 633471fe75a7SStephen M. Cameron case CCISS_GETDRIVVER: 633571fe75a7SStephen M. Cameron case CCISS_REVALIDVOLS: 633671fe75a7SStephen M. Cameron case CCISS_DEREGDISK: 633771fe75a7SStephen M. Cameron case CCISS_REGNEWDISK: 633871fe75a7SStephen M. Cameron case CCISS_REGNEWD: 633971fe75a7SStephen M. Cameron case CCISS_RESCANDISK: 634071fe75a7SStephen M. Cameron case CCISS_GETLUNINFO: 634171fe75a7SStephen M. Cameron return hpsa_ioctl(dev, cmd, arg); 634271fe75a7SStephen M. Cameron 634371fe75a7SStephen M. Cameron case CCISS_PASSTHRU32: 634471fe75a7SStephen M. Cameron return hpsa_ioctl32_passthru(dev, cmd, arg); 634571fe75a7SStephen M. Cameron case CCISS_BIG_PASSTHRU32: 634671fe75a7SStephen M. Cameron return hpsa_ioctl32_big_passthru(dev, cmd, arg); 634771fe75a7SStephen M. Cameron 634871fe75a7SStephen M. Cameron default: 634971fe75a7SStephen M. Cameron return -ENOIOCTLCMD; 635071fe75a7SStephen M. Cameron } 635171fe75a7SStephen M. Cameron } 6352edd16368SStephen M. Cameron #endif 6353edd16368SStephen M. Cameron 6354edd16368SStephen M. Cameron static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp) 6355edd16368SStephen M. Cameron { 6356edd16368SStephen M. Cameron struct hpsa_pci_info pciinfo; 6357edd16368SStephen M. Cameron 6358edd16368SStephen M. Cameron if (!argp) 6359edd16368SStephen M. Cameron return -EINVAL; 6360edd16368SStephen M. Cameron pciinfo.domain = pci_domain_nr(h->pdev->bus); 6361edd16368SStephen M. Cameron pciinfo.bus = h->pdev->bus->number; 6362edd16368SStephen M. Cameron pciinfo.dev_fn = h->pdev->devfn; 6363edd16368SStephen M. Cameron pciinfo.board_id = h->board_id; 6364edd16368SStephen M. Cameron if (copy_to_user(argp, &pciinfo, sizeof(pciinfo))) 6365edd16368SStephen M. Cameron return -EFAULT; 6366edd16368SStephen M. Cameron return 0; 6367edd16368SStephen M. Cameron } 6368edd16368SStephen M. Cameron 6369edd16368SStephen M. Cameron static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp) 6370edd16368SStephen M. Cameron { 6371edd16368SStephen M. Cameron DriverVer_type DriverVer; 6372edd16368SStephen M. Cameron unsigned char vmaj, vmin, vsubmin; 6373edd16368SStephen M. Cameron int rc; 6374edd16368SStephen M. Cameron 6375edd16368SStephen M. Cameron rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu", 6376edd16368SStephen M. Cameron &vmaj, &vmin, &vsubmin); 6377edd16368SStephen M. Cameron if (rc != 3) { 6378edd16368SStephen M. Cameron dev_info(&h->pdev->dev, "driver version string '%s' " 6379edd16368SStephen M. Cameron "unrecognized.", HPSA_DRIVER_VERSION); 6380edd16368SStephen M. Cameron vmaj = 0; 6381edd16368SStephen M. Cameron vmin = 0; 6382edd16368SStephen M. Cameron vsubmin = 0; 6383edd16368SStephen M. Cameron } 6384edd16368SStephen M. Cameron DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin; 6385edd16368SStephen M. Cameron if (!argp) 6386edd16368SStephen M. Cameron return -EINVAL; 6387edd16368SStephen M. Cameron if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type))) 6388edd16368SStephen M. Cameron return -EFAULT; 6389edd16368SStephen M. Cameron return 0; 6390edd16368SStephen M. Cameron } 6391edd16368SStephen M. Cameron 6392edd16368SStephen M. Cameron static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp) 6393edd16368SStephen M. Cameron { 6394edd16368SStephen M. Cameron IOCTL_Command_struct iocommand; 6395edd16368SStephen M. Cameron struct CommandList *c; 6396edd16368SStephen M. Cameron char *buff = NULL; 639750a0decfSStephen M. Cameron u64 temp64; 6398c1f63c8fSStephen M. Cameron int rc = 0; 6399edd16368SStephen M. Cameron 6400edd16368SStephen M. Cameron if (!argp) 6401edd16368SStephen M. Cameron return -EINVAL; 6402edd16368SStephen M. Cameron if (!capable(CAP_SYS_RAWIO)) 6403edd16368SStephen M. Cameron return -EPERM; 6404edd16368SStephen M. Cameron if (copy_from_user(&iocommand, argp, sizeof(iocommand))) 6405edd16368SStephen M. Cameron return -EFAULT; 6406edd16368SStephen M. Cameron if ((iocommand.buf_size < 1) && 6407edd16368SStephen M. Cameron (iocommand.Request.Type.Direction != XFER_NONE)) { 6408edd16368SStephen M. Cameron return -EINVAL; 6409edd16368SStephen M. Cameron } 6410edd16368SStephen M. Cameron if (iocommand.buf_size > 0) { 6411edd16368SStephen M. Cameron buff = kmalloc(iocommand.buf_size, GFP_KERNEL); 6412edd16368SStephen M. Cameron if (buff == NULL) 64132dd02d74SRobert Elliott return -ENOMEM; 64149233fb10SStephen M. Cameron if (iocommand.Request.Type.Direction & XFER_WRITE) { 6415edd16368SStephen M. Cameron /* Copy the data into the buffer we created */ 6416b03a7771SStephen M. Cameron if (copy_from_user(buff, iocommand.buf, 6417b03a7771SStephen M. Cameron iocommand.buf_size)) { 6418c1f63c8fSStephen M. Cameron rc = -EFAULT; 6419c1f63c8fSStephen M. Cameron goto out_kfree; 6420edd16368SStephen M. Cameron } 6421b03a7771SStephen M. Cameron } else { 6422edd16368SStephen M. Cameron memset(buff, 0, iocommand.buf_size); 6423b03a7771SStephen M. Cameron } 6424b03a7771SStephen M. Cameron } 642545fcb86eSStephen Cameron c = cmd_alloc(h); 6426bf43caf3SRobert Elliott 6427edd16368SStephen M. Cameron /* Fill in the command type */ 6428edd16368SStephen M. Cameron c->cmd_type = CMD_IOCTL_PEND; 6429a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 6430edd16368SStephen M. Cameron /* Fill in Command Header */ 6431edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; /* unused in simple mode */ 6432edd16368SStephen M. Cameron if (iocommand.buf_size > 0) { /* buffer to fill */ 6433edd16368SStephen M. Cameron c->Header.SGList = 1; 643450a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(1); 6435edd16368SStephen M. Cameron } else { /* no buffers to fill */ 6436edd16368SStephen M. Cameron c->Header.SGList = 0; 643750a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(0); 6438edd16368SStephen M. Cameron } 6439edd16368SStephen M. Cameron memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN)); 6440edd16368SStephen M. Cameron 6441edd16368SStephen M. Cameron /* Fill in Request block */ 6442edd16368SStephen M. Cameron memcpy(&c->Request, &iocommand.Request, 6443edd16368SStephen M. Cameron sizeof(c->Request)); 6444edd16368SStephen M. Cameron 6445edd16368SStephen M. Cameron /* Fill in the scatter gather information */ 6446edd16368SStephen M. Cameron if (iocommand.buf_size > 0) { 644750a0decfSStephen M. Cameron temp64 = pci_map_single(h->pdev, buff, 6448edd16368SStephen M. Cameron iocommand.buf_size, PCI_DMA_BIDIRECTIONAL); 644950a0decfSStephen M. Cameron if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) { 645050a0decfSStephen M. Cameron c->SG[0].Addr = cpu_to_le64(0); 645150a0decfSStephen M. Cameron c->SG[0].Len = cpu_to_le32(0); 6452bcc48ffaSStephen M. Cameron rc = -ENOMEM; 6453bcc48ffaSStephen M. Cameron goto out; 6454bcc48ffaSStephen M. Cameron } 645550a0decfSStephen M. Cameron c->SG[0].Addr = cpu_to_le64(temp64); 645650a0decfSStephen M. Cameron c->SG[0].Len = cpu_to_le32(iocommand.buf_size); 645750a0decfSStephen M. Cameron c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */ 6458edd16368SStephen M. Cameron } 6459c448ecfaSDon Brace rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 6460c448ecfaSDon Brace DEFAULT_TIMEOUT); 6461c2dd32e0SStephen M. Cameron if (iocommand.buf_size > 0) 6462edd16368SStephen M. Cameron hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL); 6463edd16368SStephen M. Cameron check_ioctl_unit_attention(h, c); 646425163bd5SWebb Scales if (rc) { 646525163bd5SWebb Scales rc = -EIO; 646625163bd5SWebb Scales goto out; 646725163bd5SWebb Scales } 6468edd16368SStephen M. Cameron 6469edd16368SStephen M. Cameron /* Copy the error information out */ 6470edd16368SStephen M. Cameron memcpy(&iocommand.error_info, c->err_info, 6471edd16368SStephen M. Cameron sizeof(iocommand.error_info)); 6472edd16368SStephen M. Cameron if (copy_to_user(argp, &iocommand, sizeof(iocommand))) { 6473c1f63c8fSStephen M. Cameron rc = -EFAULT; 6474c1f63c8fSStephen M. Cameron goto out; 6475edd16368SStephen M. Cameron } 64769233fb10SStephen M. Cameron if ((iocommand.Request.Type.Direction & XFER_READ) && 6477b03a7771SStephen M. Cameron iocommand.buf_size > 0) { 6478edd16368SStephen M. Cameron /* Copy the data out of the buffer we created */ 6479edd16368SStephen M. Cameron if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) { 6480c1f63c8fSStephen M. Cameron rc = -EFAULT; 6481c1f63c8fSStephen M. Cameron goto out; 6482edd16368SStephen M. Cameron } 6483edd16368SStephen M. Cameron } 6484c1f63c8fSStephen M. Cameron out: 648545fcb86eSStephen Cameron cmd_free(h, c); 6486c1f63c8fSStephen M. Cameron out_kfree: 6487c1f63c8fSStephen M. Cameron kfree(buff); 6488c1f63c8fSStephen M. Cameron return rc; 6489edd16368SStephen M. Cameron } 6490edd16368SStephen M. Cameron 6491edd16368SStephen M. Cameron static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp) 6492edd16368SStephen M. Cameron { 6493edd16368SStephen M. Cameron BIG_IOCTL_Command_struct *ioc; 6494edd16368SStephen M. Cameron struct CommandList *c; 6495edd16368SStephen M. Cameron unsigned char **buff = NULL; 6496edd16368SStephen M. Cameron int *buff_size = NULL; 649750a0decfSStephen M. Cameron u64 temp64; 6498edd16368SStephen M. Cameron BYTE sg_used = 0; 6499edd16368SStephen M. Cameron int status = 0; 650001a02ffcSStephen M. Cameron u32 left; 650101a02ffcSStephen M. Cameron u32 sz; 6502edd16368SStephen M. Cameron BYTE __user *data_ptr; 6503edd16368SStephen M. Cameron 6504edd16368SStephen M. Cameron if (!argp) 6505edd16368SStephen M. Cameron return -EINVAL; 6506edd16368SStephen M. Cameron if (!capable(CAP_SYS_RAWIO)) 6507edd16368SStephen M. Cameron return -EPERM; 6508edd16368SStephen M. Cameron ioc = (BIG_IOCTL_Command_struct *) 6509edd16368SStephen M. Cameron kmalloc(sizeof(*ioc), GFP_KERNEL); 6510edd16368SStephen M. Cameron if (!ioc) { 6511edd16368SStephen M. Cameron status = -ENOMEM; 6512edd16368SStephen M. Cameron goto cleanup1; 6513edd16368SStephen M. Cameron } 6514edd16368SStephen M. Cameron if (copy_from_user(ioc, argp, sizeof(*ioc))) { 6515edd16368SStephen M. Cameron status = -EFAULT; 6516edd16368SStephen M. Cameron goto cleanup1; 6517edd16368SStephen M. Cameron } 6518edd16368SStephen M. Cameron if ((ioc->buf_size < 1) && 6519edd16368SStephen M. Cameron (ioc->Request.Type.Direction != XFER_NONE)) { 6520edd16368SStephen M. Cameron status = -EINVAL; 6521edd16368SStephen M. Cameron goto cleanup1; 6522edd16368SStephen M. Cameron } 6523edd16368SStephen M. Cameron /* Check kmalloc limits using all SGs */ 6524edd16368SStephen M. Cameron if (ioc->malloc_size > MAX_KMALLOC_SIZE) { 6525edd16368SStephen M. Cameron status = -EINVAL; 6526edd16368SStephen M. Cameron goto cleanup1; 6527edd16368SStephen M. Cameron } 6528d66ae08bSStephen M. Cameron if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) { 6529edd16368SStephen M. Cameron status = -EINVAL; 6530edd16368SStephen M. Cameron goto cleanup1; 6531edd16368SStephen M. Cameron } 6532d66ae08bSStephen M. Cameron buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL); 6533edd16368SStephen M. Cameron if (!buff) { 6534edd16368SStephen M. Cameron status = -ENOMEM; 6535edd16368SStephen M. Cameron goto cleanup1; 6536edd16368SStephen M. Cameron } 6537d66ae08bSStephen M. Cameron buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL); 6538edd16368SStephen M. Cameron if (!buff_size) { 6539edd16368SStephen M. Cameron status = -ENOMEM; 6540edd16368SStephen M. Cameron goto cleanup1; 6541edd16368SStephen M. Cameron } 6542edd16368SStephen M. Cameron left = ioc->buf_size; 6543edd16368SStephen M. Cameron data_ptr = ioc->buf; 6544edd16368SStephen M. Cameron while (left) { 6545edd16368SStephen M. Cameron sz = (left > ioc->malloc_size) ? ioc->malloc_size : left; 6546edd16368SStephen M. Cameron buff_size[sg_used] = sz; 6547edd16368SStephen M. Cameron buff[sg_used] = kmalloc(sz, GFP_KERNEL); 6548edd16368SStephen M. Cameron if (buff[sg_used] == NULL) { 6549edd16368SStephen M. Cameron status = -ENOMEM; 6550edd16368SStephen M. Cameron goto cleanup1; 6551edd16368SStephen M. Cameron } 65529233fb10SStephen M. Cameron if (ioc->Request.Type.Direction & XFER_WRITE) { 6553edd16368SStephen M. Cameron if (copy_from_user(buff[sg_used], data_ptr, sz)) { 65540758f4f7SStephen M. Cameron status = -EFAULT; 6555edd16368SStephen M. Cameron goto cleanup1; 6556edd16368SStephen M. Cameron } 6557edd16368SStephen M. Cameron } else 6558edd16368SStephen M. Cameron memset(buff[sg_used], 0, sz); 6559edd16368SStephen M. Cameron left -= sz; 6560edd16368SStephen M. Cameron data_ptr += sz; 6561edd16368SStephen M. Cameron sg_used++; 6562edd16368SStephen M. Cameron } 656345fcb86eSStephen Cameron c = cmd_alloc(h); 6564bf43caf3SRobert Elliott 6565edd16368SStephen M. Cameron c->cmd_type = CMD_IOCTL_PEND; 6566a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 6567edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; 656850a0decfSStephen M. Cameron c->Header.SGList = (u8) sg_used; 656950a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(sg_used); 6570edd16368SStephen M. Cameron memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN)); 6571edd16368SStephen M. Cameron memcpy(&c->Request, &ioc->Request, sizeof(c->Request)); 6572edd16368SStephen M. Cameron if (ioc->buf_size > 0) { 6573edd16368SStephen M. Cameron int i; 6574edd16368SStephen M. Cameron for (i = 0; i < sg_used; i++) { 657550a0decfSStephen M. Cameron temp64 = pci_map_single(h->pdev, buff[i], 6576edd16368SStephen M. Cameron buff_size[i], PCI_DMA_BIDIRECTIONAL); 657750a0decfSStephen M. Cameron if (dma_mapping_error(&h->pdev->dev, 657850a0decfSStephen M. Cameron (dma_addr_t) temp64)) { 657950a0decfSStephen M. Cameron c->SG[i].Addr = cpu_to_le64(0); 658050a0decfSStephen M. Cameron c->SG[i].Len = cpu_to_le32(0); 6581bcc48ffaSStephen M. Cameron hpsa_pci_unmap(h->pdev, c, i, 6582bcc48ffaSStephen M. Cameron PCI_DMA_BIDIRECTIONAL); 6583bcc48ffaSStephen M. Cameron status = -ENOMEM; 6584e2d4a1f6SStephen M. Cameron goto cleanup0; 6585bcc48ffaSStephen M. Cameron } 658650a0decfSStephen M. Cameron c->SG[i].Addr = cpu_to_le64(temp64); 658750a0decfSStephen M. Cameron c->SG[i].Len = cpu_to_le32(buff_size[i]); 658850a0decfSStephen M. Cameron c->SG[i].Ext = cpu_to_le32(0); 6589edd16368SStephen M. Cameron } 659050a0decfSStephen M. Cameron c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST); 6591edd16368SStephen M. Cameron } 6592c448ecfaSDon Brace status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 6593c448ecfaSDon Brace DEFAULT_TIMEOUT); 6594b03a7771SStephen M. Cameron if (sg_used) 6595edd16368SStephen M. Cameron hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL); 6596edd16368SStephen M. Cameron check_ioctl_unit_attention(h, c); 659725163bd5SWebb Scales if (status) { 659825163bd5SWebb Scales status = -EIO; 659925163bd5SWebb Scales goto cleanup0; 660025163bd5SWebb Scales } 660125163bd5SWebb Scales 6602edd16368SStephen M. Cameron /* Copy the error information out */ 6603edd16368SStephen M. Cameron memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info)); 6604edd16368SStephen M. Cameron if (copy_to_user(argp, ioc, sizeof(*ioc))) { 6605edd16368SStephen M. Cameron status = -EFAULT; 6606e2d4a1f6SStephen M. Cameron goto cleanup0; 6607edd16368SStephen M. Cameron } 66089233fb10SStephen M. Cameron if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) { 66092b08b3e9SDon Brace int i; 66102b08b3e9SDon Brace 6611edd16368SStephen M. Cameron /* Copy the data out of the buffer we created */ 6612edd16368SStephen M. Cameron BYTE __user *ptr = ioc->buf; 6613edd16368SStephen M. Cameron for (i = 0; i < sg_used; i++) { 6614edd16368SStephen M. Cameron if (copy_to_user(ptr, buff[i], buff_size[i])) { 6615edd16368SStephen M. Cameron status = -EFAULT; 6616e2d4a1f6SStephen M. Cameron goto cleanup0; 6617edd16368SStephen M. Cameron } 6618edd16368SStephen M. Cameron ptr += buff_size[i]; 6619edd16368SStephen M. Cameron } 6620edd16368SStephen M. Cameron } 6621edd16368SStephen M. Cameron status = 0; 6622e2d4a1f6SStephen M. Cameron cleanup0: 662345fcb86eSStephen Cameron cmd_free(h, c); 6624edd16368SStephen M. Cameron cleanup1: 6625edd16368SStephen M. Cameron if (buff) { 66262b08b3e9SDon Brace int i; 66272b08b3e9SDon Brace 6628edd16368SStephen M. Cameron for (i = 0; i < sg_used; i++) 6629edd16368SStephen M. Cameron kfree(buff[i]); 6630edd16368SStephen M. Cameron kfree(buff); 6631edd16368SStephen M. Cameron } 6632edd16368SStephen M. Cameron kfree(buff_size); 6633edd16368SStephen M. Cameron kfree(ioc); 6634edd16368SStephen M. Cameron return status; 6635edd16368SStephen M. Cameron } 6636edd16368SStephen M. Cameron 6637edd16368SStephen M. Cameron static void check_ioctl_unit_attention(struct ctlr_info *h, 6638edd16368SStephen M. Cameron struct CommandList *c) 6639edd16368SStephen M. Cameron { 6640edd16368SStephen M. Cameron if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 6641edd16368SStephen M. Cameron c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) 6642edd16368SStephen M. Cameron (void) check_for_unit_attention(h, c); 6643edd16368SStephen M. Cameron } 66440390f0c0SStephen M. Cameron 6645edd16368SStephen M. Cameron /* 6646edd16368SStephen M. Cameron * ioctl 6647edd16368SStephen M. Cameron */ 664842a91641SDon Brace static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg) 6649edd16368SStephen M. Cameron { 6650edd16368SStephen M. Cameron struct ctlr_info *h; 6651edd16368SStephen M. Cameron void __user *argp = (void __user *)arg; 66520390f0c0SStephen M. Cameron int rc; 6653edd16368SStephen M. Cameron 6654edd16368SStephen M. Cameron h = sdev_to_hba(dev); 6655edd16368SStephen M. Cameron 6656edd16368SStephen M. Cameron switch (cmd) { 6657edd16368SStephen M. Cameron case CCISS_DEREGDISK: 6658edd16368SStephen M. Cameron case CCISS_REGNEWDISK: 6659edd16368SStephen M. Cameron case CCISS_REGNEWD: 6660a08a8471SStephen M. Cameron hpsa_scan_start(h->scsi_host); 6661edd16368SStephen M. Cameron return 0; 6662edd16368SStephen M. Cameron case CCISS_GETPCIINFO: 6663edd16368SStephen M. Cameron return hpsa_getpciinfo_ioctl(h, argp); 6664edd16368SStephen M. Cameron case CCISS_GETDRIVVER: 6665edd16368SStephen M. Cameron return hpsa_getdrivver_ioctl(h, argp); 6666edd16368SStephen M. Cameron case CCISS_PASSTHRU: 666734f0c627SDon Brace if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 66680390f0c0SStephen M. Cameron return -EAGAIN; 66690390f0c0SStephen M. Cameron rc = hpsa_passthru_ioctl(h, argp); 667034f0c627SDon Brace atomic_inc(&h->passthru_cmds_avail); 66710390f0c0SStephen M. Cameron return rc; 6672edd16368SStephen M. Cameron case CCISS_BIG_PASSTHRU: 667334f0c627SDon Brace if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 66740390f0c0SStephen M. Cameron return -EAGAIN; 66750390f0c0SStephen M. Cameron rc = hpsa_big_passthru_ioctl(h, argp); 667634f0c627SDon Brace atomic_inc(&h->passthru_cmds_avail); 66770390f0c0SStephen M. Cameron return rc; 6678edd16368SStephen M. Cameron default: 6679edd16368SStephen M. Cameron return -ENOTTY; 6680edd16368SStephen M. Cameron } 6681edd16368SStephen M. Cameron } 6682edd16368SStephen M. Cameron 6683bf43caf3SRobert Elliott static void hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr, 66846f039790SGreg Kroah-Hartman u8 reset_type) 668564670ac8SStephen M. Cameron { 668664670ac8SStephen M. Cameron struct CommandList *c; 668764670ac8SStephen M. Cameron 668864670ac8SStephen M. Cameron c = cmd_alloc(h); 6689bf43caf3SRobert Elliott 6690a2dac136SStephen M. Cameron /* fill_cmd can't fail here, no data buffer to map */ 6691a2dac136SStephen M. Cameron (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, 669264670ac8SStephen M. Cameron RAID_CTLR_LUNID, TYPE_MSG); 669364670ac8SStephen M. Cameron c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */ 669464670ac8SStephen M. Cameron c->waiting = NULL; 669564670ac8SStephen M. Cameron enqueue_cmd_and_start_io(h, c); 669664670ac8SStephen M. Cameron /* Don't wait for completion, the reset won't complete. Don't free 669764670ac8SStephen M. Cameron * the command either. This is the last command we will send before 669864670ac8SStephen M. Cameron * re-initializing everything, so it doesn't matter and won't leak. 669964670ac8SStephen M. Cameron */ 6700bf43caf3SRobert Elliott return; 670164670ac8SStephen M. Cameron } 670264670ac8SStephen M. Cameron 6703a2dac136SStephen M. Cameron static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 6704b7bb24ebSStephen M. Cameron void *buff, size_t size, u16 page_code, unsigned char *scsi3addr, 6705edd16368SStephen M. Cameron int cmd_type) 6706edd16368SStephen M. Cameron { 6707edd16368SStephen M. Cameron int pci_dir = XFER_NONE; 67089b5c48c2SStephen Cameron u64 tag; /* for commands to be aborted */ 6709edd16368SStephen M. Cameron 6710edd16368SStephen M. Cameron c->cmd_type = CMD_IOCTL_PEND; 6711a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 6712edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; 6713edd16368SStephen M. Cameron if (buff != NULL && size > 0) { 6714edd16368SStephen M. Cameron c->Header.SGList = 1; 671550a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(1); 6716edd16368SStephen M. Cameron } else { 6717edd16368SStephen M. Cameron c->Header.SGList = 0; 671850a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(0); 6719edd16368SStephen M. Cameron } 6720edd16368SStephen M. Cameron memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8); 6721edd16368SStephen M. Cameron 6722edd16368SStephen M. Cameron if (cmd_type == TYPE_CMD) { 6723edd16368SStephen M. Cameron switch (cmd) { 6724edd16368SStephen M. Cameron case HPSA_INQUIRY: 6725edd16368SStephen M. Cameron /* are we trying to read a vital product page */ 6726b7bb24ebSStephen M. Cameron if (page_code & VPD_PAGE) { 6727edd16368SStephen M. Cameron c->Request.CDB[1] = 0x01; 6728b7bb24ebSStephen M. Cameron c->Request.CDB[2] = (page_code & 0xff); 6729edd16368SStephen M. Cameron } 6730edd16368SStephen M. Cameron c->Request.CDBLen = 6; 6731a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6732a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6733edd16368SStephen M. Cameron c->Request.Timeout = 0; 6734edd16368SStephen M. Cameron c->Request.CDB[0] = HPSA_INQUIRY; 6735edd16368SStephen M. Cameron c->Request.CDB[4] = size & 0xFF; 6736edd16368SStephen M. Cameron break; 6737edd16368SStephen M. Cameron case HPSA_REPORT_LOG: 6738edd16368SStephen M. Cameron case HPSA_REPORT_PHYS: 6739edd16368SStephen M. Cameron /* Talking to controller so It's a physical command 6740edd16368SStephen M. Cameron mode = 00 target = 0. Nothing to write. 6741edd16368SStephen M. Cameron */ 6742edd16368SStephen M. Cameron c->Request.CDBLen = 12; 6743a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6744a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6745edd16368SStephen M. Cameron c->Request.Timeout = 0; 6746edd16368SStephen M. Cameron c->Request.CDB[0] = cmd; 6747edd16368SStephen M. Cameron c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 6748edd16368SStephen M. Cameron c->Request.CDB[7] = (size >> 16) & 0xFF; 6749edd16368SStephen M. Cameron c->Request.CDB[8] = (size >> 8) & 0xFF; 6750edd16368SStephen M. Cameron c->Request.CDB[9] = size & 0xFF; 6751edd16368SStephen M. Cameron break; 6752c2adae44SScott Teel case BMIC_SENSE_DIAG_OPTIONS: 6753c2adae44SScott Teel c->Request.CDBLen = 16; 6754c2adae44SScott Teel c->Request.type_attr_dir = 6755c2adae44SScott Teel TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6756c2adae44SScott Teel c->Request.Timeout = 0; 6757c2adae44SScott Teel /* Spec says this should be BMIC_WRITE */ 6758c2adae44SScott Teel c->Request.CDB[0] = BMIC_READ; 6759c2adae44SScott Teel c->Request.CDB[6] = BMIC_SENSE_DIAG_OPTIONS; 6760c2adae44SScott Teel break; 6761c2adae44SScott Teel case BMIC_SET_DIAG_OPTIONS: 6762c2adae44SScott Teel c->Request.CDBLen = 16; 6763c2adae44SScott Teel c->Request.type_attr_dir = 6764c2adae44SScott Teel TYPE_ATTR_DIR(cmd_type, 6765c2adae44SScott Teel ATTR_SIMPLE, XFER_WRITE); 6766c2adae44SScott Teel c->Request.Timeout = 0; 6767c2adae44SScott Teel c->Request.CDB[0] = BMIC_WRITE; 6768c2adae44SScott Teel c->Request.CDB[6] = BMIC_SET_DIAG_OPTIONS; 6769c2adae44SScott Teel break; 6770edd16368SStephen M. Cameron case HPSA_CACHE_FLUSH: 6771edd16368SStephen M. Cameron c->Request.CDBLen = 12; 6772a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6773a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, 6774a505b86fSStephen M. Cameron ATTR_SIMPLE, XFER_WRITE); 6775edd16368SStephen M. Cameron c->Request.Timeout = 0; 6776edd16368SStephen M. Cameron c->Request.CDB[0] = BMIC_WRITE; 6777edd16368SStephen M. Cameron c->Request.CDB[6] = BMIC_CACHE_FLUSH; 6778bb158eabSStephen M. Cameron c->Request.CDB[7] = (size >> 8) & 0xFF; 6779bb158eabSStephen M. Cameron c->Request.CDB[8] = size & 0xFF; 6780edd16368SStephen M. Cameron break; 6781edd16368SStephen M. Cameron case TEST_UNIT_READY: 6782edd16368SStephen M. Cameron c->Request.CDBLen = 6; 6783a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6784a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 6785edd16368SStephen M. Cameron c->Request.Timeout = 0; 6786edd16368SStephen M. Cameron break; 6787283b4a9bSStephen M. Cameron case HPSA_GET_RAID_MAP: 6788283b4a9bSStephen M. Cameron c->Request.CDBLen = 12; 6789a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6790a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6791283b4a9bSStephen M. Cameron c->Request.Timeout = 0; 6792283b4a9bSStephen M. Cameron c->Request.CDB[0] = HPSA_CISS_READ; 6793283b4a9bSStephen M. Cameron c->Request.CDB[1] = cmd; 6794283b4a9bSStephen M. Cameron c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 6795283b4a9bSStephen M. Cameron c->Request.CDB[7] = (size >> 16) & 0xFF; 6796283b4a9bSStephen M. Cameron c->Request.CDB[8] = (size >> 8) & 0xFF; 6797283b4a9bSStephen M. Cameron c->Request.CDB[9] = size & 0xFF; 6798283b4a9bSStephen M. Cameron break; 6799316b221aSStephen M. Cameron case BMIC_SENSE_CONTROLLER_PARAMETERS: 6800316b221aSStephen M. Cameron c->Request.CDBLen = 10; 6801a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6802a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6803316b221aSStephen M. Cameron c->Request.Timeout = 0; 6804316b221aSStephen M. Cameron c->Request.CDB[0] = BMIC_READ; 6805316b221aSStephen M. Cameron c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS; 6806316b221aSStephen M. Cameron c->Request.CDB[7] = (size >> 16) & 0xFF; 6807316b221aSStephen M. Cameron c->Request.CDB[8] = (size >> 8) & 0xFF; 6808316b221aSStephen M. Cameron break; 680903383736SDon Brace case BMIC_IDENTIFY_PHYSICAL_DEVICE: 681003383736SDon Brace c->Request.CDBLen = 10; 681103383736SDon Brace c->Request.type_attr_dir = 681203383736SDon Brace TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 681303383736SDon Brace c->Request.Timeout = 0; 681403383736SDon Brace c->Request.CDB[0] = BMIC_READ; 681503383736SDon Brace c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE; 681603383736SDon Brace c->Request.CDB[7] = (size >> 16) & 0xFF; 681703383736SDon Brace c->Request.CDB[8] = (size >> 8) & 0XFF; 681803383736SDon Brace break; 6819d04e62b9SKevin Barnett case BMIC_SENSE_SUBSYSTEM_INFORMATION: 6820d04e62b9SKevin Barnett c->Request.CDBLen = 10; 6821d04e62b9SKevin Barnett c->Request.type_attr_dir = 6822d04e62b9SKevin Barnett TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6823d04e62b9SKevin Barnett c->Request.Timeout = 0; 6824d04e62b9SKevin Barnett c->Request.CDB[0] = BMIC_READ; 6825d04e62b9SKevin Barnett c->Request.CDB[6] = BMIC_SENSE_SUBSYSTEM_INFORMATION; 6826d04e62b9SKevin Barnett c->Request.CDB[7] = (size >> 16) & 0xFF; 6827d04e62b9SKevin Barnett c->Request.CDB[8] = (size >> 8) & 0XFF; 6828d04e62b9SKevin Barnett break; 6829cca8f13bSDon Brace case BMIC_SENSE_STORAGE_BOX_PARAMS: 6830cca8f13bSDon Brace c->Request.CDBLen = 10; 6831cca8f13bSDon Brace c->Request.type_attr_dir = 6832cca8f13bSDon Brace TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6833cca8f13bSDon Brace c->Request.Timeout = 0; 6834cca8f13bSDon Brace c->Request.CDB[0] = BMIC_READ; 6835cca8f13bSDon Brace c->Request.CDB[6] = BMIC_SENSE_STORAGE_BOX_PARAMS; 6836cca8f13bSDon Brace c->Request.CDB[7] = (size >> 16) & 0xFF; 6837cca8f13bSDon Brace c->Request.CDB[8] = (size >> 8) & 0XFF; 6838cca8f13bSDon Brace break; 683966749d0dSScott Teel case BMIC_IDENTIFY_CONTROLLER: 684066749d0dSScott Teel c->Request.CDBLen = 10; 684166749d0dSScott Teel c->Request.type_attr_dir = 684266749d0dSScott Teel TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 684366749d0dSScott Teel c->Request.Timeout = 0; 684466749d0dSScott Teel c->Request.CDB[0] = BMIC_READ; 684566749d0dSScott Teel c->Request.CDB[1] = 0; 684666749d0dSScott Teel c->Request.CDB[2] = 0; 684766749d0dSScott Teel c->Request.CDB[3] = 0; 684866749d0dSScott Teel c->Request.CDB[4] = 0; 684966749d0dSScott Teel c->Request.CDB[5] = 0; 685066749d0dSScott Teel c->Request.CDB[6] = BMIC_IDENTIFY_CONTROLLER; 685166749d0dSScott Teel c->Request.CDB[7] = (size >> 16) & 0xFF; 685266749d0dSScott Teel c->Request.CDB[8] = (size >> 8) & 0XFF; 685366749d0dSScott Teel c->Request.CDB[9] = 0; 685466749d0dSScott Teel break; 6855edd16368SStephen M. Cameron default: 6856edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd); 6857edd16368SStephen M. Cameron BUG(); 6858a2dac136SStephen M. Cameron return -1; 6859edd16368SStephen M. Cameron } 6860edd16368SStephen M. Cameron } else if (cmd_type == TYPE_MSG) { 6861edd16368SStephen M. Cameron switch (cmd) { 6862edd16368SStephen M. Cameron 68630b9b7b6eSScott Teel case HPSA_PHYS_TARGET_RESET: 68640b9b7b6eSScott Teel c->Request.CDBLen = 16; 68650b9b7b6eSScott Teel c->Request.type_attr_dir = 68660b9b7b6eSScott Teel TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 68670b9b7b6eSScott Teel c->Request.Timeout = 0; /* Don't time out */ 68680b9b7b6eSScott Teel memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 68690b9b7b6eSScott Teel c->Request.CDB[0] = HPSA_RESET; 68700b9b7b6eSScott Teel c->Request.CDB[1] = HPSA_TARGET_RESET_TYPE; 68710b9b7b6eSScott Teel /* Physical target reset needs no control bytes 4-7*/ 68720b9b7b6eSScott Teel c->Request.CDB[4] = 0x00; 68730b9b7b6eSScott Teel c->Request.CDB[5] = 0x00; 68740b9b7b6eSScott Teel c->Request.CDB[6] = 0x00; 68750b9b7b6eSScott Teel c->Request.CDB[7] = 0x00; 68760b9b7b6eSScott Teel break; 6877edd16368SStephen M. Cameron case HPSA_DEVICE_RESET_MSG: 6878edd16368SStephen M. Cameron c->Request.CDBLen = 16; 6879a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6880a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 6881edd16368SStephen M. Cameron c->Request.Timeout = 0; /* Don't time out */ 688264670ac8SStephen M. Cameron memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 688364670ac8SStephen M. Cameron c->Request.CDB[0] = cmd; 688421e89afdSStephen M. Cameron c->Request.CDB[1] = HPSA_RESET_TYPE_LUN; 6885edd16368SStephen M. Cameron /* If bytes 4-7 are zero, it means reset the */ 6886edd16368SStephen M. Cameron /* LunID device */ 6887edd16368SStephen M. Cameron c->Request.CDB[4] = 0x00; 6888edd16368SStephen M. Cameron c->Request.CDB[5] = 0x00; 6889edd16368SStephen M. Cameron c->Request.CDB[6] = 0x00; 6890edd16368SStephen M. Cameron c->Request.CDB[7] = 0x00; 6891edd16368SStephen M. Cameron break; 689275167d2cSStephen M. Cameron case HPSA_ABORT_MSG: 68939b5c48c2SStephen Cameron memcpy(&tag, buff, sizeof(tag)); 68942b08b3e9SDon Brace dev_dbg(&h->pdev->dev, 68959b5c48c2SStephen Cameron "Abort Tag:0x%016llx using rqst Tag:0x%016llx", 68969b5c48c2SStephen Cameron tag, c->Header.tag); 689775167d2cSStephen M. Cameron c->Request.CDBLen = 16; 6898a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6899a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, 6900a505b86fSStephen M. Cameron ATTR_SIMPLE, XFER_WRITE); 690175167d2cSStephen M. Cameron c->Request.Timeout = 0; /* Don't time out */ 690275167d2cSStephen M. Cameron c->Request.CDB[0] = HPSA_TASK_MANAGEMENT; 690375167d2cSStephen M. Cameron c->Request.CDB[1] = HPSA_TMF_ABORT_TASK; 690475167d2cSStephen M. Cameron c->Request.CDB[2] = 0x00; /* reserved */ 690575167d2cSStephen M. Cameron c->Request.CDB[3] = 0x00; /* reserved */ 690675167d2cSStephen M. Cameron /* Tag to abort goes in CDB[4]-CDB[11] */ 69079b5c48c2SStephen Cameron memcpy(&c->Request.CDB[4], &tag, sizeof(tag)); 690875167d2cSStephen M. Cameron c->Request.CDB[12] = 0x00; /* reserved */ 690975167d2cSStephen M. Cameron c->Request.CDB[13] = 0x00; /* reserved */ 691075167d2cSStephen M. Cameron c->Request.CDB[14] = 0x00; /* reserved */ 691175167d2cSStephen M. Cameron c->Request.CDB[15] = 0x00; /* reserved */ 691275167d2cSStephen M. Cameron break; 6913edd16368SStephen M. Cameron default: 6914edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "unknown message type %d\n", 6915edd16368SStephen M. Cameron cmd); 6916edd16368SStephen M. Cameron BUG(); 6917edd16368SStephen M. Cameron } 6918edd16368SStephen M. Cameron } else { 6919edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type); 6920edd16368SStephen M. Cameron BUG(); 6921edd16368SStephen M. Cameron } 6922edd16368SStephen M. Cameron 6923a505b86fSStephen M. Cameron switch (GET_DIR(c->Request.type_attr_dir)) { 6924edd16368SStephen M. Cameron case XFER_READ: 6925edd16368SStephen M. Cameron pci_dir = PCI_DMA_FROMDEVICE; 6926edd16368SStephen M. Cameron break; 6927edd16368SStephen M. Cameron case XFER_WRITE: 6928edd16368SStephen M. Cameron pci_dir = PCI_DMA_TODEVICE; 6929edd16368SStephen M. Cameron break; 6930edd16368SStephen M. Cameron case XFER_NONE: 6931edd16368SStephen M. Cameron pci_dir = PCI_DMA_NONE; 6932edd16368SStephen M. Cameron break; 6933edd16368SStephen M. Cameron default: 6934edd16368SStephen M. Cameron pci_dir = PCI_DMA_BIDIRECTIONAL; 6935edd16368SStephen M. Cameron } 6936a2dac136SStephen M. Cameron if (hpsa_map_one(h->pdev, c, buff, size, pci_dir)) 6937a2dac136SStephen M. Cameron return -1; 6938a2dac136SStephen M. Cameron return 0; 6939edd16368SStephen M. Cameron } 6940edd16368SStephen M. Cameron 6941edd16368SStephen M. Cameron /* 6942edd16368SStephen M. Cameron * Map (physical) PCI mem into (virtual) kernel space 6943edd16368SStephen M. Cameron */ 6944edd16368SStephen M. Cameron static void __iomem *remap_pci_mem(ulong base, ulong size) 6945edd16368SStephen M. Cameron { 6946edd16368SStephen M. Cameron ulong page_base = ((ulong) base) & PAGE_MASK; 6947edd16368SStephen M. Cameron ulong page_offs = ((ulong) base) - page_base; 6948088ba34cSStephen M. Cameron void __iomem *page_remapped = ioremap_nocache(page_base, 6949088ba34cSStephen M. Cameron page_offs + size); 6950edd16368SStephen M. Cameron 6951edd16368SStephen M. Cameron return page_remapped ? (page_remapped + page_offs) : NULL; 6952edd16368SStephen M. Cameron } 6953edd16368SStephen M. Cameron 6954254f796bSMatt Gates static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q) 6955edd16368SStephen M. Cameron { 6956254f796bSMatt Gates return h->access.command_completed(h, q); 6957edd16368SStephen M. Cameron } 6958edd16368SStephen M. Cameron 6959900c5440SStephen M. Cameron static inline bool interrupt_pending(struct ctlr_info *h) 6960edd16368SStephen M. Cameron { 6961edd16368SStephen M. Cameron return h->access.intr_pending(h); 6962edd16368SStephen M. Cameron } 6963edd16368SStephen M. Cameron 6964edd16368SStephen M. Cameron static inline long interrupt_not_for_us(struct ctlr_info *h) 6965edd16368SStephen M. Cameron { 696610f66018SStephen M. Cameron return (h->access.intr_pending(h) == 0) || 696710f66018SStephen M. Cameron (h->interrupts_enabled == 0); 6968edd16368SStephen M. Cameron } 6969edd16368SStephen M. Cameron 697001a02ffcSStephen M. Cameron static inline int bad_tag(struct ctlr_info *h, u32 tag_index, 697101a02ffcSStephen M. Cameron u32 raw_tag) 6972edd16368SStephen M. Cameron { 6973edd16368SStephen M. Cameron if (unlikely(tag_index >= h->nr_cmds)) { 6974edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag); 6975edd16368SStephen M. Cameron return 1; 6976edd16368SStephen M. Cameron } 6977edd16368SStephen M. Cameron return 0; 6978edd16368SStephen M. Cameron } 6979edd16368SStephen M. Cameron 69805a3d16f5SStephen M. Cameron static inline void finish_cmd(struct CommandList *c) 6981edd16368SStephen M. Cameron { 6982e85c5974SStephen M. Cameron dial_up_lockup_detection_on_fw_flash_complete(c->h, c); 6983c349775eSScott Teel if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI 6984c349775eSScott Teel || c->cmd_type == CMD_IOACCEL2)) 69851fb011fbSStephen M. Cameron complete_scsi_command(c); 69868be986ccSStephen Cameron else if (c->cmd_type == CMD_IOCTL_PEND || c->cmd_type == IOACCEL2_TMF) 6987edd16368SStephen M. Cameron complete(c->waiting); 6988a104c99fSStephen M. Cameron } 6989a104c99fSStephen M. Cameron 6990303932fdSDon Brace /* process completion of an indexed ("direct lookup") command */ 69911d94f94dSStephen M. Cameron static inline void process_indexed_cmd(struct ctlr_info *h, 6992303932fdSDon Brace u32 raw_tag) 6993303932fdSDon Brace { 6994303932fdSDon Brace u32 tag_index; 6995303932fdSDon Brace struct CommandList *c; 6996303932fdSDon Brace 6997f2405db8SDon Brace tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT; 69981d94f94dSStephen M. Cameron if (!bad_tag(h, tag_index, raw_tag)) { 6999303932fdSDon Brace c = h->cmd_pool + tag_index; 70005a3d16f5SStephen M. Cameron finish_cmd(c); 70011d94f94dSStephen M. Cameron } 7002303932fdSDon Brace } 7003303932fdSDon Brace 700464670ac8SStephen M. Cameron /* Some controllers, like p400, will give us one interrupt 700564670ac8SStephen M. Cameron * after a soft reset, even if we turned interrupts off. 700664670ac8SStephen M. Cameron * Only need to check for this in the hpsa_xxx_discard_completions 700764670ac8SStephen M. Cameron * functions. 700864670ac8SStephen M. Cameron */ 700964670ac8SStephen M. Cameron static int ignore_bogus_interrupt(struct ctlr_info *h) 701064670ac8SStephen M. Cameron { 701164670ac8SStephen M. Cameron if (likely(!reset_devices)) 701264670ac8SStephen M. Cameron return 0; 701364670ac8SStephen M. Cameron 701464670ac8SStephen M. Cameron if (likely(h->interrupts_enabled)) 701564670ac8SStephen M. Cameron return 0; 701664670ac8SStephen M. Cameron 701764670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled " 701864670ac8SStephen M. Cameron "(known firmware bug.) Ignoring.\n"); 701964670ac8SStephen M. Cameron 702064670ac8SStephen M. Cameron return 1; 702164670ac8SStephen M. Cameron } 702264670ac8SStephen M. Cameron 7023254f796bSMatt Gates /* 7024254f796bSMatt Gates * Convert &h->q[x] (passed to interrupt handlers) back to h. 7025254f796bSMatt Gates * Relies on (h-q[x] == x) being true for x such that 7026254f796bSMatt Gates * 0 <= x < MAX_REPLY_QUEUES. 7027254f796bSMatt Gates */ 7028254f796bSMatt Gates static struct ctlr_info *queue_to_hba(u8 *queue) 702964670ac8SStephen M. Cameron { 7030254f796bSMatt Gates return container_of((queue - *queue), struct ctlr_info, q[0]); 7031254f796bSMatt Gates } 7032254f796bSMatt Gates 7033254f796bSMatt Gates static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue) 7034254f796bSMatt Gates { 7035254f796bSMatt Gates struct ctlr_info *h = queue_to_hba(queue); 7036254f796bSMatt Gates u8 q = *(u8 *) queue; 703764670ac8SStephen M. Cameron u32 raw_tag; 703864670ac8SStephen M. Cameron 703964670ac8SStephen M. Cameron if (ignore_bogus_interrupt(h)) 704064670ac8SStephen M. Cameron return IRQ_NONE; 704164670ac8SStephen M. Cameron 704264670ac8SStephen M. Cameron if (interrupt_not_for_us(h)) 704364670ac8SStephen M. Cameron return IRQ_NONE; 7044a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 704564670ac8SStephen M. Cameron while (interrupt_pending(h)) { 7046254f796bSMatt Gates raw_tag = get_next_completion(h, q); 704764670ac8SStephen M. Cameron while (raw_tag != FIFO_EMPTY) 7048254f796bSMatt Gates raw_tag = next_command(h, q); 704964670ac8SStephen M. Cameron } 705064670ac8SStephen M. Cameron return IRQ_HANDLED; 705164670ac8SStephen M. Cameron } 705264670ac8SStephen M. Cameron 7053254f796bSMatt Gates static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue) 705464670ac8SStephen M. Cameron { 7055254f796bSMatt Gates struct ctlr_info *h = queue_to_hba(queue); 705664670ac8SStephen M. Cameron u32 raw_tag; 7057254f796bSMatt Gates u8 q = *(u8 *) queue; 705864670ac8SStephen M. Cameron 705964670ac8SStephen M. Cameron if (ignore_bogus_interrupt(h)) 706064670ac8SStephen M. Cameron return IRQ_NONE; 706164670ac8SStephen M. Cameron 7062a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 7063254f796bSMatt Gates raw_tag = get_next_completion(h, q); 706464670ac8SStephen M. Cameron while (raw_tag != FIFO_EMPTY) 7065254f796bSMatt Gates raw_tag = next_command(h, q); 706664670ac8SStephen M. Cameron return IRQ_HANDLED; 706764670ac8SStephen M. Cameron } 706864670ac8SStephen M. Cameron 7069254f796bSMatt Gates static irqreturn_t do_hpsa_intr_intx(int irq, void *queue) 7070edd16368SStephen M. Cameron { 7071254f796bSMatt Gates struct ctlr_info *h = queue_to_hba((u8 *) queue); 7072303932fdSDon Brace u32 raw_tag; 7073254f796bSMatt Gates u8 q = *(u8 *) queue; 7074edd16368SStephen M. Cameron 7075edd16368SStephen M. Cameron if (interrupt_not_for_us(h)) 7076edd16368SStephen M. Cameron return IRQ_NONE; 7077a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 707810f66018SStephen M. Cameron while (interrupt_pending(h)) { 7079254f796bSMatt Gates raw_tag = get_next_completion(h, q); 708010f66018SStephen M. Cameron while (raw_tag != FIFO_EMPTY) { 70811d94f94dSStephen M. Cameron process_indexed_cmd(h, raw_tag); 7082254f796bSMatt Gates raw_tag = next_command(h, q); 708310f66018SStephen M. Cameron } 708410f66018SStephen M. Cameron } 708510f66018SStephen M. Cameron return IRQ_HANDLED; 708610f66018SStephen M. Cameron } 708710f66018SStephen M. Cameron 7088254f796bSMatt Gates static irqreturn_t do_hpsa_intr_msi(int irq, void *queue) 708910f66018SStephen M. Cameron { 7090254f796bSMatt Gates struct ctlr_info *h = queue_to_hba(queue); 709110f66018SStephen M. Cameron u32 raw_tag; 7092254f796bSMatt Gates u8 q = *(u8 *) queue; 709310f66018SStephen M. Cameron 7094a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 7095254f796bSMatt Gates raw_tag = get_next_completion(h, q); 7096303932fdSDon Brace while (raw_tag != FIFO_EMPTY) { 70971d94f94dSStephen M. Cameron process_indexed_cmd(h, raw_tag); 7098254f796bSMatt Gates raw_tag = next_command(h, q); 7099edd16368SStephen M. Cameron } 7100edd16368SStephen M. Cameron return IRQ_HANDLED; 7101edd16368SStephen M. Cameron } 7102edd16368SStephen M. Cameron 7103a9a3a273SStephen M. Cameron /* Send a message CDB to the firmware. Careful, this only works 7104a9a3a273SStephen M. Cameron * in simple mode, not performant mode due to the tag lookup. 7105a9a3a273SStephen M. Cameron * We only ever use this immediately after a controller reset. 7106a9a3a273SStephen M. Cameron */ 71076f039790SGreg Kroah-Hartman static int hpsa_message(struct pci_dev *pdev, unsigned char opcode, 7108edd16368SStephen M. Cameron unsigned char type) 7109edd16368SStephen M. Cameron { 7110edd16368SStephen M. Cameron struct Command { 7111edd16368SStephen M. Cameron struct CommandListHeader CommandHeader; 7112edd16368SStephen M. Cameron struct RequestBlock Request; 7113edd16368SStephen M. Cameron struct ErrDescriptor ErrorDescriptor; 7114edd16368SStephen M. Cameron }; 7115edd16368SStephen M. Cameron struct Command *cmd; 7116edd16368SStephen M. Cameron static const size_t cmd_sz = sizeof(*cmd) + 7117edd16368SStephen M. Cameron sizeof(cmd->ErrorDescriptor); 7118edd16368SStephen M. Cameron dma_addr_t paddr64; 71192b08b3e9SDon Brace __le32 paddr32; 71202b08b3e9SDon Brace u32 tag; 7121edd16368SStephen M. Cameron void __iomem *vaddr; 7122edd16368SStephen M. Cameron int i, err; 7123edd16368SStephen M. Cameron 7124edd16368SStephen M. Cameron vaddr = pci_ioremap_bar(pdev, 0); 7125edd16368SStephen M. Cameron if (vaddr == NULL) 7126edd16368SStephen M. Cameron return -ENOMEM; 7127edd16368SStephen M. Cameron 7128edd16368SStephen M. Cameron /* The Inbound Post Queue only accepts 32-bit physical addresses for the 7129edd16368SStephen M. Cameron * CCISS commands, so they must be allocated from the lower 4GiB of 7130edd16368SStephen M. Cameron * memory. 7131edd16368SStephen M. Cameron */ 7132edd16368SStephen M. Cameron err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 7133edd16368SStephen M. Cameron if (err) { 7134edd16368SStephen M. Cameron iounmap(vaddr); 71351eaec8f3SRobert Elliott return err; 7136edd16368SStephen M. Cameron } 7137edd16368SStephen M. Cameron 7138edd16368SStephen M. Cameron cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64); 7139edd16368SStephen M. Cameron if (cmd == NULL) { 7140edd16368SStephen M. Cameron iounmap(vaddr); 7141edd16368SStephen M. Cameron return -ENOMEM; 7142edd16368SStephen M. Cameron } 7143edd16368SStephen M. Cameron 7144edd16368SStephen M. Cameron /* This must fit, because of the 32-bit consistent DMA mask. Also, 7145edd16368SStephen M. Cameron * although there's no guarantee, we assume that the address is at 7146edd16368SStephen M. Cameron * least 4-byte aligned (most likely, it's page-aligned). 7147edd16368SStephen M. Cameron */ 71482b08b3e9SDon Brace paddr32 = cpu_to_le32(paddr64); 7149edd16368SStephen M. Cameron 7150edd16368SStephen M. Cameron cmd->CommandHeader.ReplyQueue = 0; 7151edd16368SStephen M. Cameron cmd->CommandHeader.SGList = 0; 715250a0decfSStephen M. Cameron cmd->CommandHeader.SGTotal = cpu_to_le16(0); 71532b08b3e9SDon Brace cmd->CommandHeader.tag = cpu_to_le64(paddr64); 7154edd16368SStephen M. Cameron memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8); 7155edd16368SStephen M. Cameron 7156edd16368SStephen M. Cameron cmd->Request.CDBLen = 16; 7157a505b86fSStephen M. Cameron cmd->Request.type_attr_dir = 7158a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE); 7159edd16368SStephen M. Cameron cmd->Request.Timeout = 0; /* Don't time out */ 7160edd16368SStephen M. Cameron cmd->Request.CDB[0] = opcode; 7161edd16368SStephen M. Cameron cmd->Request.CDB[1] = type; 7162edd16368SStephen M. Cameron memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */ 716350a0decfSStephen M. Cameron cmd->ErrorDescriptor.Addr = 71642b08b3e9SDon Brace cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd))); 716550a0decfSStephen M. Cameron cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo)); 7166edd16368SStephen M. Cameron 71672b08b3e9SDon Brace writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET); 7168edd16368SStephen M. Cameron 7169edd16368SStephen M. Cameron for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) { 7170edd16368SStephen M. Cameron tag = readl(vaddr + SA5_REPLY_PORT_OFFSET); 71712b08b3e9SDon Brace if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64) 7172edd16368SStephen M. Cameron break; 7173edd16368SStephen M. Cameron msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS); 7174edd16368SStephen M. Cameron } 7175edd16368SStephen M. Cameron 7176edd16368SStephen M. Cameron iounmap(vaddr); 7177edd16368SStephen M. Cameron 7178edd16368SStephen M. Cameron /* we leak the DMA buffer here ... no choice since the controller could 7179edd16368SStephen M. Cameron * still complete the command. 7180edd16368SStephen M. Cameron */ 7181edd16368SStephen M. Cameron if (i == HPSA_MSG_SEND_RETRY_LIMIT) { 7182edd16368SStephen M. Cameron dev_err(&pdev->dev, "controller message %02x:%02x timed out\n", 7183edd16368SStephen M. Cameron opcode, type); 7184edd16368SStephen M. Cameron return -ETIMEDOUT; 7185edd16368SStephen M. Cameron } 7186edd16368SStephen M. Cameron 7187edd16368SStephen M. Cameron pci_free_consistent(pdev, cmd_sz, cmd, paddr64); 7188edd16368SStephen M. Cameron 7189edd16368SStephen M. Cameron if (tag & HPSA_ERROR_BIT) { 7190edd16368SStephen M. Cameron dev_err(&pdev->dev, "controller message %02x:%02x failed\n", 7191edd16368SStephen M. Cameron opcode, type); 7192edd16368SStephen M. Cameron return -EIO; 7193edd16368SStephen M. Cameron } 7194edd16368SStephen M. Cameron 7195edd16368SStephen M. Cameron dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n", 7196edd16368SStephen M. Cameron opcode, type); 7197edd16368SStephen M. Cameron return 0; 7198edd16368SStephen M. Cameron } 7199edd16368SStephen M. Cameron 7200edd16368SStephen M. Cameron #define hpsa_noop(p) hpsa_message(p, 3, 0) 7201edd16368SStephen M. Cameron 72021df8552aSStephen M. Cameron static int hpsa_controller_hard_reset(struct pci_dev *pdev, 720342a91641SDon Brace void __iomem *vaddr, u32 use_doorbell) 7204edd16368SStephen M. Cameron { 7205edd16368SStephen M. Cameron 72061df8552aSStephen M. Cameron if (use_doorbell) { 72071df8552aSStephen M. Cameron /* For everything after the P600, the PCI power state method 72081df8552aSStephen M. Cameron * of resetting the controller doesn't work, so we have this 72091df8552aSStephen M. Cameron * other way using the doorbell register. 7210edd16368SStephen M. Cameron */ 72111df8552aSStephen M. Cameron dev_info(&pdev->dev, "using doorbell to reset controller\n"); 7212cf0b08d0SStephen M. Cameron writel(use_doorbell, vaddr + SA5_DOORBELL); 721385009239SStephen M. Cameron 721400701a96SJustin Lindley /* PMC hardware guys tell us we need a 10 second delay after 721585009239SStephen M. Cameron * doorbell reset and before any attempt to talk to the board 721685009239SStephen M. Cameron * at all to ensure that this actually works and doesn't fall 721785009239SStephen M. Cameron * over in some weird corner cases. 721885009239SStephen M. Cameron */ 721900701a96SJustin Lindley msleep(10000); 72201df8552aSStephen M. Cameron } else { /* Try to do it the PCI power state way */ 7221edd16368SStephen M. Cameron 7222edd16368SStephen M. Cameron /* Quoting from the Open CISS Specification: "The Power 7223edd16368SStephen M. Cameron * Management Control/Status Register (CSR) controls the power 7224edd16368SStephen M. Cameron * state of the device. The normal operating state is D0, 7225edd16368SStephen M. Cameron * CSR=00h. The software off state is D3, CSR=03h. To reset 72261df8552aSStephen M. Cameron * the controller, place the interface device in D3 then to D0, 72271df8552aSStephen M. Cameron * this causes a secondary PCI reset which will reset the 72281df8552aSStephen M. Cameron * controller." */ 7229edd16368SStephen M. Cameron 72302662cab8SDon Brace int rc = 0; 72312662cab8SDon Brace 72321df8552aSStephen M. Cameron dev_info(&pdev->dev, "using PCI PM to reset controller\n"); 72332662cab8SDon Brace 7234edd16368SStephen M. Cameron /* enter the D3hot power management state */ 72352662cab8SDon Brace rc = pci_set_power_state(pdev, PCI_D3hot); 72362662cab8SDon Brace if (rc) 72372662cab8SDon Brace return rc; 7238edd16368SStephen M. Cameron 7239edd16368SStephen M. Cameron msleep(500); 7240edd16368SStephen M. Cameron 7241edd16368SStephen M. Cameron /* enter the D0 power management state */ 72422662cab8SDon Brace rc = pci_set_power_state(pdev, PCI_D0); 72432662cab8SDon Brace if (rc) 72442662cab8SDon Brace return rc; 7245c4853efeSMike Miller 7246c4853efeSMike Miller /* 7247c4853efeSMike Miller * The P600 requires a small delay when changing states. 7248c4853efeSMike Miller * Otherwise we may think the board did not reset and we bail. 7249c4853efeSMike Miller * This for kdump only and is particular to the P600. 7250c4853efeSMike Miller */ 7251c4853efeSMike Miller msleep(500); 72521df8552aSStephen M. Cameron } 72531df8552aSStephen M. Cameron return 0; 72541df8552aSStephen M. Cameron } 72551df8552aSStephen M. Cameron 72566f039790SGreg Kroah-Hartman static void init_driver_version(char *driver_version, int len) 7257580ada3cSStephen M. Cameron { 7258580ada3cSStephen M. Cameron memset(driver_version, 0, len); 7259f79cfec6SStephen M. Cameron strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1); 7260580ada3cSStephen M. Cameron } 7261580ada3cSStephen M. Cameron 72626f039790SGreg Kroah-Hartman static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable) 7263580ada3cSStephen M. Cameron { 7264580ada3cSStephen M. Cameron char *driver_version; 7265580ada3cSStephen M. Cameron int i, size = sizeof(cfgtable->driver_version); 7266580ada3cSStephen M. Cameron 7267580ada3cSStephen M. Cameron driver_version = kmalloc(size, GFP_KERNEL); 7268580ada3cSStephen M. Cameron if (!driver_version) 7269580ada3cSStephen M. Cameron return -ENOMEM; 7270580ada3cSStephen M. Cameron 7271580ada3cSStephen M. Cameron init_driver_version(driver_version, size); 7272580ada3cSStephen M. Cameron for (i = 0; i < size; i++) 7273580ada3cSStephen M. Cameron writeb(driver_version[i], &cfgtable->driver_version[i]); 7274580ada3cSStephen M. Cameron kfree(driver_version); 7275580ada3cSStephen M. Cameron return 0; 7276580ada3cSStephen M. Cameron } 7277580ada3cSStephen M. Cameron 72786f039790SGreg Kroah-Hartman static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable, 72796f039790SGreg Kroah-Hartman unsigned char *driver_ver) 7280580ada3cSStephen M. Cameron { 7281580ada3cSStephen M. Cameron int i; 7282580ada3cSStephen M. Cameron 7283580ada3cSStephen M. Cameron for (i = 0; i < sizeof(cfgtable->driver_version); i++) 7284580ada3cSStephen M. Cameron driver_ver[i] = readb(&cfgtable->driver_version[i]); 7285580ada3cSStephen M. Cameron } 7286580ada3cSStephen M. Cameron 72876f039790SGreg Kroah-Hartman static int controller_reset_failed(struct CfgTable __iomem *cfgtable) 7288580ada3cSStephen M. Cameron { 7289580ada3cSStephen M. Cameron 7290580ada3cSStephen M. Cameron char *driver_ver, *old_driver_ver; 7291580ada3cSStephen M. Cameron int rc, size = sizeof(cfgtable->driver_version); 7292580ada3cSStephen M. Cameron 7293580ada3cSStephen M. Cameron old_driver_ver = kmalloc(2 * size, GFP_KERNEL); 7294580ada3cSStephen M. Cameron if (!old_driver_ver) 7295580ada3cSStephen M. Cameron return -ENOMEM; 7296580ada3cSStephen M. Cameron driver_ver = old_driver_ver + size; 7297580ada3cSStephen M. Cameron 7298580ada3cSStephen M. Cameron /* After a reset, the 32 bytes of "driver version" in the cfgtable 7299580ada3cSStephen M. Cameron * should have been changed, otherwise we know the reset failed. 7300580ada3cSStephen M. Cameron */ 7301580ada3cSStephen M. Cameron init_driver_version(old_driver_ver, size); 7302580ada3cSStephen M. Cameron read_driver_ver_from_cfgtable(cfgtable, driver_ver); 7303580ada3cSStephen M. Cameron rc = !memcmp(driver_ver, old_driver_ver, size); 7304580ada3cSStephen M. Cameron kfree(old_driver_ver); 7305580ada3cSStephen M. Cameron return rc; 7306580ada3cSStephen M. Cameron } 73071df8552aSStephen M. Cameron /* This does a hard reset of the controller using PCI power management 73081df8552aSStephen M. Cameron * states or the using the doorbell register. 73091df8552aSStephen M. Cameron */ 73106b6c1cd7STomas Henzl static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id) 73111df8552aSStephen M. Cameron { 73121df8552aSStephen M. Cameron u64 cfg_offset; 73131df8552aSStephen M. Cameron u32 cfg_base_addr; 73141df8552aSStephen M. Cameron u64 cfg_base_addr_index; 73151df8552aSStephen M. Cameron void __iomem *vaddr; 73161df8552aSStephen M. Cameron unsigned long paddr; 7317580ada3cSStephen M. Cameron u32 misc_fw_support; 7318270d05deSStephen M. Cameron int rc; 73191df8552aSStephen M. Cameron struct CfgTable __iomem *cfgtable; 7320cf0b08d0SStephen M. Cameron u32 use_doorbell; 7321270d05deSStephen M. Cameron u16 command_register; 73221df8552aSStephen M. Cameron 73231df8552aSStephen M. Cameron /* For controllers as old as the P600, this is very nearly 73241df8552aSStephen M. Cameron * the same thing as 73251df8552aSStephen M. Cameron * 73261df8552aSStephen M. Cameron * pci_save_state(pci_dev); 73271df8552aSStephen M. Cameron * pci_set_power_state(pci_dev, PCI_D3hot); 73281df8552aSStephen M. Cameron * pci_set_power_state(pci_dev, PCI_D0); 73291df8552aSStephen M. Cameron * pci_restore_state(pci_dev); 73301df8552aSStephen M. Cameron * 73311df8552aSStephen M. Cameron * For controllers newer than the P600, the pci power state 73321df8552aSStephen M. Cameron * method of resetting doesn't work so we have another way 73331df8552aSStephen M. Cameron * using the doorbell register. 73341df8552aSStephen M. Cameron */ 733518867659SStephen M. Cameron 733660f923b9SRobert Elliott if (!ctlr_is_resettable(board_id)) { 733760f923b9SRobert Elliott dev_warn(&pdev->dev, "Controller not resettable\n"); 733825c1e56aSStephen M. Cameron return -ENODEV; 733925c1e56aSStephen M. Cameron } 734046380786SStephen M. Cameron 734146380786SStephen M. Cameron /* if controller is soft- but not hard resettable... */ 734246380786SStephen M. Cameron if (!ctlr_is_hard_resettable(board_id)) 734346380786SStephen M. Cameron return -ENOTSUPP; /* try soft reset later. */ 734418867659SStephen M. Cameron 7345270d05deSStephen M. Cameron /* Save the PCI command register */ 7346270d05deSStephen M. Cameron pci_read_config_word(pdev, 4, &command_register); 7347270d05deSStephen M. Cameron pci_save_state(pdev); 73481df8552aSStephen M. Cameron 73491df8552aSStephen M. Cameron /* find the first memory BAR, so we can find the cfg table */ 73501df8552aSStephen M. Cameron rc = hpsa_pci_find_memory_BAR(pdev, &paddr); 73511df8552aSStephen M. Cameron if (rc) 73521df8552aSStephen M. Cameron return rc; 73531df8552aSStephen M. Cameron vaddr = remap_pci_mem(paddr, 0x250); 73541df8552aSStephen M. Cameron if (!vaddr) 73551df8552aSStephen M. Cameron return -ENOMEM; 73561df8552aSStephen M. Cameron 73571df8552aSStephen M. Cameron /* find cfgtable in order to check if reset via doorbell is supported */ 73581df8552aSStephen M. Cameron rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr, 73591df8552aSStephen M. Cameron &cfg_base_addr_index, &cfg_offset); 73601df8552aSStephen M. Cameron if (rc) 73611df8552aSStephen M. Cameron goto unmap_vaddr; 73621df8552aSStephen M. Cameron cfgtable = remap_pci_mem(pci_resource_start(pdev, 73631df8552aSStephen M. Cameron cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable)); 73641df8552aSStephen M. Cameron if (!cfgtable) { 73651df8552aSStephen M. Cameron rc = -ENOMEM; 73661df8552aSStephen M. Cameron goto unmap_vaddr; 73671df8552aSStephen M. Cameron } 7368580ada3cSStephen M. Cameron rc = write_driver_ver_to_cfgtable(cfgtable); 7369580ada3cSStephen M. Cameron if (rc) 737003741d95STomas Henzl goto unmap_cfgtable; 73711df8552aSStephen M. Cameron 7372cf0b08d0SStephen M. Cameron /* If reset via doorbell register is supported, use that. 7373cf0b08d0SStephen M. Cameron * There are two such methods. Favor the newest method. 7374cf0b08d0SStephen M. Cameron */ 73751df8552aSStephen M. Cameron misc_fw_support = readl(&cfgtable->misc_fw_support); 7376cf0b08d0SStephen M. Cameron use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2; 7377cf0b08d0SStephen M. Cameron if (use_doorbell) { 7378cf0b08d0SStephen M. Cameron use_doorbell = DOORBELL_CTLR_RESET2; 7379cf0b08d0SStephen M. Cameron } else { 73801df8552aSStephen M. Cameron use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET; 7381cf0b08d0SStephen M. Cameron if (use_doorbell) { 7382050f7147SStephen Cameron dev_warn(&pdev->dev, 7383050f7147SStephen Cameron "Soft reset not supported. Firmware update is required.\n"); 738464670ac8SStephen M. Cameron rc = -ENOTSUPP; /* try soft reset */ 7385cf0b08d0SStephen M. Cameron goto unmap_cfgtable; 7386cf0b08d0SStephen M. Cameron } 7387cf0b08d0SStephen M. Cameron } 73881df8552aSStephen M. Cameron 73891df8552aSStephen M. Cameron rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell); 73901df8552aSStephen M. Cameron if (rc) 73911df8552aSStephen M. Cameron goto unmap_cfgtable; 7392edd16368SStephen M. Cameron 7393270d05deSStephen M. Cameron pci_restore_state(pdev); 7394270d05deSStephen M. Cameron pci_write_config_word(pdev, 4, command_register); 7395edd16368SStephen M. Cameron 73961df8552aSStephen M. Cameron /* Some devices (notably the HP Smart Array 5i Controller) 73971df8552aSStephen M. Cameron need a little pause here */ 73981df8552aSStephen M. Cameron msleep(HPSA_POST_RESET_PAUSE_MSECS); 73991df8552aSStephen M. Cameron 7400fe5389c8SStephen M. Cameron rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY); 7401fe5389c8SStephen M. Cameron if (rc) { 7402fe5389c8SStephen M. Cameron dev_warn(&pdev->dev, 7403050f7147SStephen Cameron "Failed waiting for board to become ready after hard reset\n"); 7404fe5389c8SStephen M. Cameron goto unmap_cfgtable; 7405fe5389c8SStephen M. Cameron } 7406fe5389c8SStephen M. Cameron 7407580ada3cSStephen M. Cameron rc = controller_reset_failed(vaddr); 7408580ada3cSStephen M. Cameron if (rc < 0) 7409580ada3cSStephen M. Cameron goto unmap_cfgtable; 7410580ada3cSStephen M. Cameron if (rc) { 741164670ac8SStephen M. Cameron dev_warn(&pdev->dev, "Unable to successfully reset " 741264670ac8SStephen M. Cameron "controller. Will try soft reset.\n"); 741364670ac8SStephen M. Cameron rc = -ENOTSUPP; 7414580ada3cSStephen M. Cameron } else { 741564670ac8SStephen M. Cameron dev_info(&pdev->dev, "board ready after hard reset.\n"); 74161df8552aSStephen M. Cameron } 74171df8552aSStephen M. Cameron 74181df8552aSStephen M. Cameron unmap_cfgtable: 74191df8552aSStephen M. Cameron iounmap(cfgtable); 74201df8552aSStephen M. Cameron 74211df8552aSStephen M. Cameron unmap_vaddr: 74221df8552aSStephen M. Cameron iounmap(vaddr); 74231df8552aSStephen M. Cameron return rc; 7424edd16368SStephen M. Cameron } 7425edd16368SStephen M. Cameron 7426edd16368SStephen M. Cameron /* 7427edd16368SStephen M. Cameron * We cannot read the structure directly, for portability we must use 7428edd16368SStephen M. Cameron * the io functions. 7429edd16368SStephen M. Cameron * This is for debug only. 7430edd16368SStephen M. Cameron */ 743142a91641SDon Brace static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb) 7432edd16368SStephen M. Cameron { 743358f8665cSStephen M. Cameron #ifdef HPSA_DEBUG 7434edd16368SStephen M. Cameron int i; 7435edd16368SStephen M. Cameron char temp_name[17]; 7436edd16368SStephen M. Cameron 7437edd16368SStephen M. Cameron dev_info(dev, "Controller Configuration information\n"); 7438edd16368SStephen M. Cameron dev_info(dev, "------------------------------------\n"); 7439edd16368SStephen M. Cameron for (i = 0; i < 4; i++) 7440edd16368SStephen M. Cameron temp_name[i] = readb(&(tb->Signature[i])); 7441edd16368SStephen M. Cameron temp_name[4] = '\0'; 7442edd16368SStephen M. Cameron dev_info(dev, " Signature = %s\n", temp_name); 7443edd16368SStephen M. Cameron dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence))); 7444edd16368SStephen M. Cameron dev_info(dev, " Transport methods supported = 0x%x\n", 7445edd16368SStephen M. Cameron readl(&(tb->TransportSupport))); 7446edd16368SStephen M. Cameron dev_info(dev, " Transport methods active = 0x%x\n", 7447edd16368SStephen M. Cameron readl(&(tb->TransportActive))); 7448edd16368SStephen M. Cameron dev_info(dev, " Requested transport Method = 0x%x\n", 7449edd16368SStephen M. Cameron readl(&(tb->HostWrite.TransportRequest))); 7450edd16368SStephen M. Cameron dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n", 7451edd16368SStephen M. Cameron readl(&(tb->HostWrite.CoalIntDelay))); 7452edd16368SStephen M. Cameron dev_info(dev, " Coalesce Interrupt Count = 0x%x\n", 7453edd16368SStephen M. Cameron readl(&(tb->HostWrite.CoalIntCount))); 745469d6e33dSRobert Elliott dev_info(dev, " Max outstanding commands = %d\n", 7455edd16368SStephen M. Cameron readl(&(tb->CmdsOutMax))); 7456edd16368SStephen M. Cameron dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes))); 7457edd16368SStephen M. Cameron for (i = 0; i < 16; i++) 7458edd16368SStephen M. Cameron temp_name[i] = readb(&(tb->ServerName[i])); 7459edd16368SStephen M. Cameron temp_name[16] = '\0'; 7460edd16368SStephen M. Cameron dev_info(dev, " Server Name = %s\n", temp_name); 7461edd16368SStephen M. Cameron dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n", 7462edd16368SStephen M. Cameron readl(&(tb->HeartBeat))); 7463edd16368SStephen M. Cameron #endif /* HPSA_DEBUG */ 746458f8665cSStephen M. Cameron } 7465edd16368SStephen M. Cameron 7466edd16368SStephen M. Cameron static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr) 7467edd16368SStephen M. Cameron { 7468edd16368SStephen M. Cameron int i, offset, mem_type, bar_type; 7469edd16368SStephen M. Cameron 7470edd16368SStephen M. Cameron if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */ 7471edd16368SStephen M. Cameron return 0; 7472edd16368SStephen M. Cameron offset = 0; 7473edd16368SStephen M. Cameron for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { 7474edd16368SStephen M. Cameron bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE; 7475edd16368SStephen M. Cameron if (bar_type == PCI_BASE_ADDRESS_SPACE_IO) 7476edd16368SStephen M. Cameron offset += 4; 7477edd16368SStephen M. Cameron else { 7478edd16368SStephen M. Cameron mem_type = pci_resource_flags(pdev, i) & 7479edd16368SStephen M. Cameron PCI_BASE_ADDRESS_MEM_TYPE_MASK; 7480edd16368SStephen M. Cameron switch (mem_type) { 7481edd16368SStephen M. Cameron case PCI_BASE_ADDRESS_MEM_TYPE_32: 7482edd16368SStephen M. Cameron case PCI_BASE_ADDRESS_MEM_TYPE_1M: 7483edd16368SStephen M. Cameron offset += 4; /* 32 bit */ 7484edd16368SStephen M. Cameron break; 7485edd16368SStephen M. Cameron case PCI_BASE_ADDRESS_MEM_TYPE_64: 7486edd16368SStephen M. Cameron offset += 8; 7487edd16368SStephen M. Cameron break; 7488edd16368SStephen M. Cameron default: /* reserved in PCI 2.2 */ 7489edd16368SStephen M. Cameron dev_warn(&pdev->dev, 7490edd16368SStephen M. Cameron "base address is invalid\n"); 7491edd16368SStephen M. Cameron return -1; 7492edd16368SStephen M. Cameron break; 7493edd16368SStephen M. Cameron } 7494edd16368SStephen M. Cameron } 7495edd16368SStephen M. Cameron if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0) 7496edd16368SStephen M. Cameron return i + 1; 7497edd16368SStephen M. Cameron } 7498edd16368SStephen M. Cameron return -1; 7499edd16368SStephen M. Cameron } 7500edd16368SStephen M. Cameron 7501cc64c817SRobert Elliott static void hpsa_disable_interrupt_mode(struct ctlr_info *h) 7502cc64c817SRobert Elliott { 7503cc64c817SRobert Elliott if (h->msix_vector) { 7504cc64c817SRobert Elliott if (h->pdev->msix_enabled) 7505cc64c817SRobert Elliott pci_disable_msix(h->pdev); 7506105a3dbcSRobert Elliott h->msix_vector = 0; 7507cc64c817SRobert Elliott } else if (h->msi_vector) { 7508cc64c817SRobert Elliott if (h->pdev->msi_enabled) 7509cc64c817SRobert Elliott pci_disable_msi(h->pdev); 7510105a3dbcSRobert Elliott h->msi_vector = 0; 7511cc64c817SRobert Elliott } 7512cc64c817SRobert Elliott } 7513cc64c817SRobert Elliott 7514edd16368SStephen M. Cameron /* If MSI/MSI-X is supported by the kernel we will try to enable it on 7515050f7147SStephen Cameron * controllers that are capable. If not, we use legacy INTx mode. 7516edd16368SStephen M. Cameron */ 75176f039790SGreg Kroah-Hartman static void hpsa_interrupt_mode(struct ctlr_info *h) 7518edd16368SStephen M. Cameron { 7519edd16368SStephen M. Cameron #ifdef CONFIG_PCI_MSI 7520254f796bSMatt Gates int err, i; 7521254f796bSMatt Gates struct msix_entry hpsa_msix_entries[MAX_REPLY_QUEUES]; 7522254f796bSMatt Gates 7523254f796bSMatt Gates for (i = 0; i < MAX_REPLY_QUEUES; i++) { 7524254f796bSMatt Gates hpsa_msix_entries[i].vector = 0; 7525254f796bSMatt Gates hpsa_msix_entries[i].entry = i; 7526254f796bSMatt Gates } 7527edd16368SStephen M. Cameron 7528edd16368SStephen M. Cameron /* Some boards advertise MSI but don't really support it */ 75296b3f4c52SStephen M. Cameron if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) || 75306b3f4c52SStephen M. Cameron (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11)) 7531edd16368SStephen M. Cameron goto default_int_mode; 753255c06c71SStephen M. Cameron if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) { 7533050f7147SStephen Cameron dev_info(&h->pdev->dev, "MSI-X capable controller\n"); 7534eee0f03aSHannes Reinecke h->msix_vector = MAX_REPLY_QUEUES; 7535f89439bcSStephen M. Cameron if (h->msix_vector > num_online_cpus()) 7536f89439bcSStephen M. Cameron h->msix_vector = num_online_cpus(); 753718fce3c4SAlexander Gordeev err = pci_enable_msix_range(h->pdev, hpsa_msix_entries, 753818fce3c4SAlexander Gordeev 1, h->msix_vector); 753918fce3c4SAlexander Gordeev if (err < 0) { 754018fce3c4SAlexander Gordeev dev_warn(&h->pdev->dev, "MSI-X init failed %d\n", err); 754118fce3c4SAlexander Gordeev h->msix_vector = 0; 754218fce3c4SAlexander Gordeev goto single_msi_mode; 754318fce3c4SAlexander Gordeev } else if (err < h->msix_vector) { 754455c06c71SStephen M. Cameron dev_warn(&h->pdev->dev, "only %d MSI-X vectors " 7545edd16368SStephen M. Cameron "available\n", err); 7546eee0f03aSHannes Reinecke } 754718fce3c4SAlexander Gordeev h->msix_vector = err; 7548eee0f03aSHannes Reinecke for (i = 0; i < h->msix_vector; i++) 7549eee0f03aSHannes Reinecke h->intr[i] = hpsa_msix_entries[i].vector; 7550eee0f03aSHannes Reinecke return; 7551edd16368SStephen M. Cameron } 755218fce3c4SAlexander Gordeev single_msi_mode: 755355c06c71SStephen M. Cameron if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) { 7554050f7147SStephen Cameron dev_info(&h->pdev->dev, "MSI capable controller\n"); 755555c06c71SStephen M. Cameron if (!pci_enable_msi(h->pdev)) 7556edd16368SStephen M. Cameron h->msi_vector = 1; 7557edd16368SStephen M. Cameron else 755855c06c71SStephen M. Cameron dev_warn(&h->pdev->dev, "MSI init failed\n"); 7559edd16368SStephen M. Cameron } 7560edd16368SStephen M. Cameron default_int_mode: 7561edd16368SStephen M. Cameron #endif /* CONFIG_PCI_MSI */ 7562edd16368SStephen M. Cameron /* if we get here we're going to use the default interrupt mode */ 7563a9a3a273SStephen M. Cameron h->intr[h->intr_mode] = h->pdev->irq; 7564edd16368SStephen M. Cameron } 7565edd16368SStephen M. Cameron 75666f039790SGreg Kroah-Hartman static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id) 7567e5c880d1SStephen M. Cameron { 7568e5c880d1SStephen M. Cameron int i; 7569e5c880d1SStephen M. Cameron u32 subsystem_vendor_id, subsystem_device_id; 7570e5c880d1SStephen M. Cameron 7571e5c880d1SStephen M. Cameron subsystem_vendor_id = pdev->subsystem_vendor; 7572e5c880d1SStephen M. Cameron subsystem_device_id = pdev->subsystem_device; 7573e5c880d1SStephen M. Cameron *board_id = ((subsystem_device_id << 16) & 0xffff0000) | 7574e5c880d1SStephen M. Cameron subsystem_vendor_id; 7575e5c880d1SStephen M. Cameron 7576e5c880d1SStephen M. Cameron for (i = 0; i < ARRAY_SIZE(products); i++) 7577e5c880d1SStephen M. Cameron if (*board_id == products[i].board_id) 7578e5c880d1SStephen M. Cameron return i; 7579e5c880d1SStephen M. Cameron 75806798cc0aSStephen M. Cameron if ((subsystem_vendor_id != PCI_VENDOR_ID_HP && 75816798cc0aSStephen M. Cameron subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) || 75826798cc0aSStephen M. Cameron !hpsa_allow_any) { 7583e5c880d1SStephen M. Cameron dev_warn(&pdev->dev, "unrecognized board ID: " 7584e5c880d1SStephen M. Cameron "0x%08x, ignoring.\n", *board_id); 7585e5c880d1SStephen M. Cameron return -ENODEV; 7586e5c880d1SStephen M. Cameron } 7587e5c880d1SStephen M. Cameron return ARRAY_SIZE(products) - 1; /* generic unknown smart array */ 7588e5c880d1SStephen M. Cameron } 7589e5c880d1SStephen M. Cameron 75906f039790SGreg Kroah-Hartman static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 75913a7774ceSStephen M. Cameron unsigned long *memory_bar) 75923a7774ceSStephen M. Cameron { 75933a7774ceSStephen M. Cameron int i; 75943a7774ceSStephen M. Cameron 75953a7774ceSStephen M. Cameron for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) 759612d2cd47SStephen M. Cameron if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) { 75973a7774ceSStephen M. Cameron /* addressing mode bits already removed */ 759812d2cd47SStephen M. Cameron *memory_bar = pci_resource_start(pdev, i); 759912d2cd47SStephen M. Cameron dev_dbg(&pdev->dev, "memory BAR = %lx\n", 76003a7774ceSStephen M. Cameron *memory_bar); 76013a7774ceSStephen M. Cameron return 0; 76023a7774ceSStephen M. Cameron } 760312d2cd47SStephen M. Cameron dev_warn(&pdev->dev, "no memory BAR found\n"); 76043a7774ceSStephen M. Cameron return -ENODEV; 76053a7774ceSStephen M. Cameron } 76063a7774ceSStephen M. Cameron 76076f039790SGreg Kroah-Hartman static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 76086f039790SGreg Kroah-Hartman int wait_for_ready) 76092c4c8c8bSStephen M. Cameron { 7610fe5389c8SStephen M. Cameron int i, iterations; 76112c4c8c8bSStephen M. Cameron u32 scratchpad; 7612fe5389c8SStephen M. Cameron if (wait_for_ready) 7613fe5389c8SStephen M. Cameron iterations = HPSA_BOARD_READY_ITERATIONS; 7614fe5389c8SStephen M. Cameron else 7615fe5389c8SStephen M. Cameron iterations = HPSA_BOARD_NOT_READY_ITERATIONS; 76162c4c8c8bSStephen M. Cameron 7617fe5389c8SStephen M. Cameron for (i = 0; i < iterations; i++) { 7618fe5389c8SStephen M. Cameron scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET); 7619fe5389c8SStephen M. Cameron if (wait_for_ready) { 76202c4c8c8bSStephen M. Cameron if (scratchpad == HPSA_FIRMWARE_READY) 76212c4c8c8bSStephen M. Cameron return 0; 7622fe5389c8SStephen M. Cameron } else { 7623fe5389c8SStephen M. Cameron if (scratchpad != HPSA_FIRMWARE_READY) 7624fe5389c8SStephen M. Cameron return 0; 7625fe5389c8SStephen M. Cameron } 76262c4c8c8bSStephen M. Cameron msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS); 76272c4c8c8bSStephen M. Cameron } 7628fe5389c8SStephen M. Cameron dev_warn(&pdev->dev, "board not ready, timed out.\n"); 76292c4c8c8bSStephen M. Cameron return -ENODEV; 76302c4c8c8bSStephen M. Cameron } 76312c4c8c8bSStephen M. Cameron 76326f039790SGreg Kroah-Hartman static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 76336f039790SGreg Kroah-Hartman u32 *cfg_base_addr, u64 *cfg_base_addr_index, 7634a51fd47fSStephen M. Cameron u64 *cfg_offset) 7635a51fd47fSStephen M. Cameron { 7636a51fd47fSStephen M. Cameron *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET); 7637a51fd47fSStephen M. Cameron *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET); 7638a51fd47fSStephen M. Cameron *cfg_base_addr &= (u32) 0x0000ffff; 7639a51fd47fSStephen M. Cameron *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr); 7640a51fd47fSStephen M. Cameron if (*cfg_base_addr_index == -1) { 7641a51fd47fSStephen M. Cameron dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n"); 7642a51fd47fSStephen M. Cameron return -ENODEV; 7643a51fd47fSStephen M. Cameron } 7644a51fd47fSStephen M. Cameron return 0; 7645a51fd47fSStephen M. Cameron } 7646a51fd47fSStephen M. Cameron 7647195f2c65SRobert Elliott static void hpsa_free_cfgtables(struct ctlr_info *h) 7648195f2c65SRobert Elliott { 7649105a3dbcSRobert Elliott if (h->transtable) { 7650195f2c65SRobert Elliott iounmap(h->transtable); 7651105a3dbcSRobert Elliott h->transtable = NULL; 7652105a3dbcSRobert Elliott } 7653105a3dbcSRobert Elliott if (h->cfgtable) { 7654195f2c65SRobert Elliott iounmap(h->cfgtable); 7655105a3dbcSRobert Elliott h->cfgtable = NULL; 7656105a3dbcSRobert Elliott } 7657195f2c65SRobert Elliott } 7658195f2c65SRobert Elliott 7659195f2c65SRobert Elliott /* Find and map CISS config table and transfer table 7660195f2c65SRobert Elliott + * several items must be unmapped (freed) later 7661195f2c65SRobert Elliott + * */ 76626f039790SGreg Kroah-Hartman static int hpsa_find_cfgtables(struct ctlr_info *h) 7663edd16368SStephen M. Cameron { 766401a02ffcSStephen M. Cameron u64 cfg_offset; 766501a02ffcSStephen M. Cameron u32 cfg_base_addr; 766601a02ffcSStephen M. Cameron u64 cfg_base_addr_index; 7667303932fdSDon Brace u32 trans_offset; 7668a51fd47fSStephen M. Cameron int rc; 766977c4495cSStephen M. Cameron 7670a51fd47fSStephen M. Cameron rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 7671a51fd47fSStephen M. Cameron &cfg_base_addr_index, &cfg_offset); 7672a51fd47fSStephen M. Cameron if (rc) 7673a51fd47fSStephen M. Cameron return rc; 767477c4495cSStephen M. Cameron h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev, 7675a51fd47fSStephen M. Cameron cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable)); 7676cd3c81c4SRobert Elliott if (!h->cfgtable) { 7677cd3c81c4SRobert Elliott dev_err(&h->pdev->dev, "Failed mapping cfgtable\n"); 767877c4495cSStephen M. Cameron return -ENOMEM; 7679cd3c81c4SRobert Elliott } 7680580ada3cSStephen M. Cameron rc = write_driver_ver_to_cfgtable(h->cfgtable); 7681580ada3cSStephen M. Cameron if (rc) 7682580ada3cSStephen M. Cameron return rc; 768377c4495cSStephen M. Cameron /* Find performant mode table. */ 7684a51fd47fSStephen M. Cameron trans_offset = readl(&h->cfgtable->TransMethodOffset); 768577c4495cSStephen M. Cameron h->transtable = remap_pci_mem(pci_resource_start(h->pdev, 768677c4495cSStephen M. Cameron cfg_base_addr_index)+cfg_offset+trans_offset, 768777c4495cSStephen M. Cameron sizeof(*h->transtable)); 7688195f2c65SRobert Elliott if (!h->transtable) { 7689195f2c65SRobert Elliott dev_err(&h->pdev->dev, "Failed mapping transfer table\n"); 7690195f2c65SRobert Elliott hpsa_free_cfgtables(h); 769177c4495cSStephen M. Cameron return -ENOMEM; 7692195f2c65SRobert Elliott } 769377c4495cSStephen M. Cameron return 0; 769477c4495cSStephen M. Cameron } 769577c4495cSStephen M. Cameron 76966f039790SGreg Kroah-Hartman static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h) 7697cba3d38bSStephen M. Cameron { 769841ce4c35SStephen Cameron #define MIN_MAX_COMMANDS 16 769941ce4c35SStephen Cameron BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS); 770041ce4c35SStephen Cameron 770141ce4c35SStephen Cameron h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands); 770272ceeaecSStephen M. Cameron 770372ceeaecSStephen M. Cameron /* Limit commands in memory limited kdump scenario. */ 770472ceeaecSStephen M. Cameron if (reset_devices && h->max_commands > 32) 770572ceeaecSStephen M. Cameron h->max_commands = 32; 770672ceeaecSStephen M. Cameron 770741ce4c35SStephen Cameron if (h->max_commands < MIN_MAX_COMMANDS) { 770841ce4c35SStephen Cameron dev_warn(&h->pdev->dev, 770941ce4c35SStephen Cameron "Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n", 771041ce4c35SStephen Cameron h->max_commands, 771141ce4c35SStephen Cameron MIN_MAX_COMMANDS); 771241ce4c35SStephen Cameron h->max_commands = MIN_MAX_COMMANDS; 7713cba3d38bSStephen M. Cameron } 7714cba3d38bSStephen M. Cameron } 7715cba3d38bSStephen M. Cameron 7716c7ee65b3SWebb Scales /* If the controller reports that the total max sg entries is greater than 512, 7717c7ee65b3SWebb Scales * then we know that chained SG blocks work. (Original smart arrays did not 7718c7ee65b3SWebb Scales * support chained SG blocks and would return zero for max sg entries.) 7719c7ee65b3SWebb Scales */ 7720c7ee65b3SWebb Scales static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h) 7721c7ee65b3SWebb Scales { 7722c7ee65b3SWebb Scales return h->maxsgentries > 512; 7723c7ee65b3SWebb Scales } 7724c7ee65b3SWebb Scales 7725b93d7536SStephen M. Cameron /* Interrogate the hardware for some limits: 7726b93d7536SStephen M. Cameron * max commands, max SG elements without chaining, and with chaining, 7727b93d7536SStephen M. Cameron * SG chain block size, etc. 7728b93d7536SStephen M. Cameron */ 77296f039790SGreg Kroah-Hartman static void hpsa_find_board_params(struct ctlr_info *h) 7730b93d7536SStephen M. Cameron { 7731cba3d38bSStephen M. Cameron hpsa_get_max_perf_mode_cmds(h); 773245fcb86eSStephen Cameron h->nr_cmds = h->max_commands; 7733b93d7536SStephen M. Cameron h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements)); 7734283b4a9bSStephen M. Cameron h->fw_support = readl(&(h->cfgtable->misc_fw_support)); 7735c7ee65b3SWebb Scales if (hpsa_supports_chained_sg_blocks(h)) { 7736c7ee65b3SWebb Scales /* Limit in-command s/g elements to 32 save dma'able memory. */ 7737b93d7536SStephen M. Cameron h->max_cmd_sg_entries = 32; 77381a63ea6fSWebb Scales h->chainsize = h->maxsgentries - h->max_cmd_sg_entries; 7739b93d7536SStephen M. Cameron h->maxsgentries--; /* save one for chain pointer */ 7740b93d7536SStephen M. Cameron } else { 7741c7ee65b3SWebb Scales /* 7742c7ee65b3SWebb Scales * Original smart arrays supported at most 31 s/g entries 7743c7ee65b3SWebb Scales * embedded inline in the command (trying to use more 7744c7ee65b3SWebb Scales * would lock up the controller) 7745c7ee65b3SWebb Scales */ 7746c7ee65b3SWebb Scales h->max_cmd_sg_entries = 31; 77471a63ea6fSWebb Scales h->maxsgentries = 31; /* default to traditional values */ 7748c7ee65b3SWebb Scales h->chainsize = 0; 7749b93d7536SStephen M. Cameron } 775075167d2cSStephen M. Cameron 775175167d2cSStephen M. Cameron /* Find out what task management functions are supported and cache */ 775275167d2cSStephen M. Cameron h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags)); 77530e7a7fceSScott Teel if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags)) 77540e7a7fceSScott Teel dev_warn(&h->pdev->dev, "Physical aborts not supported\n"); 77550e7a7fceSScott Teel if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags)) 77560e7a7fceSScott Teel dev_warn(&h->pdev->dev, "Logical aborts not supported\n"); 77578be986ccSStephen Cameron if (!(HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags)) 77588be986ccSStephen Cameron dev_warn(&h->pdev->dev, "HP SSD Smart Path aborts not supported\n"); 7759b93d7536SStephen M. Cameron } 7760b93d7536SStephen M. Cameron 776176c46e49SStephen M. Cameron static inline bool hpsa_CISS_signature_present(struct ctlr_info *h) 776276c46e49SStephen M. Cameron { 77630fc9fd40SAkinobu Mita if (!check_signature(h->cfgtable->Signature, "CISS", 4)) { 7764050f7147SStephen Cameron dev_err(&h->pdev->dev, "not a valid CISS config table\n"); 776576c46e49SStephen M. Cameron return false; 776676c46e49SStephen M. Cameron } 776776c46e49SStephen M. Cameron return true; 776876c46e49SStephen M. Cameron } 776976c46e49SStephen M. Cameron 777097a5e98cSStephen M. Cameron static inline void hpsa_set_driver_support_bits(struct ctlr_info *h) 7771f7c39101SStephen M. Cameron { 777297a5e98cSStephen M. Cameron u32 driver_support; 7773f7c39101SStephen M. Cameron 777497a5e98cSStephen M. Cameron driver_support = readl(&(h->cfgtable->driver_support)); 77750b9e7b74SArnd Bergmann /* Need to enable prefetch in the SCSI core for 6400 in x86 */ 77760b9e7b74SArnd Bergmann #ifdef CONFIG_X86 777797a5e98cSStephen M. Cameron driver_support |= ENABLE_SCSI_PREFETCH; 7778f7c39101SStephen M. Cameron #endif 777928e13446SStephen M. Cameron driver_support |= ENABLE_UNIT_ATTN; 778028e13446SStephen M. Cameron writel(driver_support, &(h->cfgtable->driver_support)); 7781f7c39101SStephen M. Cameron } 7782f7c39101SStephen M. Cameron 77833d0eab67SStephen M. Cameron /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result 77843d0eab67SStephen M. Cameron * in a prefetch beyond physical memory. 77853d0eab67SStephen M. Cameron */ 77863d0eab67SStephen M. Cameron static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h) 77873d0eab67SStephen M. Cameron { 77883d0eab67SStephen M. Cameron u32 dma_prefetch; 77893d0eab67SStephen M. Cameron 77903d0eab67SStephen M. Cameron if (h->board_id != 0x3225103C) 77913d0eab67SStephen M. Cameron return; 77923d0eab67SStephen M. Cameron dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG); 77933d0eab67SStephen M. Cameron dma_prefetch |= 0x8000; 77943d0eab67SStephen M. Cameron writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG); 77953d0eab67SStephen M. Cameron } 77963d0eab67SStephen M. Cameron 7797c706a795SRobert Elliott static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h) 779876438d08SStephen M. Cameron { 779976438d08SStephen M. Cameron int i; 780076438d08SStephen M. Cameron u32 doorbell_value; 780176438d08SStephen M. Cameron unsigned long flags; 780276438d08SStephen M. Cameron /* wait until the clear_event_notify bit 6 is cleared by controller. */ 7803007e7aa9SRobert Elliott for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) { 780476438d08SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 780576438d08SStephen M. Cameron doorbell_value = readl(h->vaddr + SA5_DOORBELL); 780676438d08SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 780776438d08SStephen M. Cameron if (!(doorbell_value & DOORBELL_CLEAR_EVENTS)) 7808c706a795SRobert Elliott goto done; 780976438d08SStephen M. Cameron /* delay and try again */ 7810007e7aa9SRobert Elliott msleep(CLEAR_EVENT_WAIT_INTERVAL); 781176438d08SStephen M. Cameron } 7812c706a795SRobert Elliott return -ENODEV; 7813c706a795SRobert Elliott done: 7814c706a795SRobert Elliott return 0; 781576438d08SStephen M. Cameron } 781676438d08SStephen M. Cameron 7817c706a795SRobert Elliott static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h) 7818eb6b2ae9SStephen M. Cameron { 7819eb6b2ae9SStephen M. Cameron int i; 78206eaf46fdSStephen M. Cameron u32 doorbell_value; 78216eaf46fdSStephen M. Cameron unsigned long flags; 7822eb6b2ae9SStephen M. Cameron 7823eb6b2ae9SStephen M. Cameron /* under certain very rare conditions, this can take awhile. 7824eb6b2ae9SStephen M. Cameron * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right 7825eb6b2ae9SStephen M. Cameron * as we enter this code.) 7826eb6b2ae9SStephen M. Cameron */ 7827007e7aa9SRobert Elliott for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) { 782825163bd5SWebb Scales if (h->remove_in_progress) 782925163bd5SWebb Scales goto done; 78306eaf46fdSStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 78316eaf46fdSStephen M. Cameron doorbell_value = readl(h->vaddr + SA5_DOORBELL); 78326eaf46fdSStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 7833382be668SDan Carpenter if (!(doorbell_value & CFGTBL_ChangeReq)) 7834c706a795SRobert Elliott goto done; 7835eb6b2ae9SStephen M. Cameron /* delay and try again */ 7836007e7aa9SRobert Elliott msleep(MODE_CHANGE_WAIT_INTERVAL); 7837eb6b2ae9SStephen M. Cameron } 7838c706a795SRobert Elliott return -ENODEV; 7839c706a795SRobert Elliott done: 7840c706a795SRobert Elliott return 0; 78413f4336f3SStephen M. Cameron } 78423f4336f3SStephen M. Cameron 7843c706a795SRobert Elliott /* return -ENODEV or other reason on error, 0 on success */ 78446f039790SGreg Kroah-Hartman static int hpsa_enter_simple_mode(struct ctlr_info *h) 78453f4336f3SStephen M. Cameron { 78463f4336f3SStephen M. Cameron u32 trans_support; 78473f4336f3SStephen M. Cameron 78483f4336f3SStephen M. Cameron trans_support = readl(&(h->cfgtable->TransportSupport)); 78493f4336f3SStephen M. Cameron if (!(trans_support & SIMPLE_MODE)) 78503f4336f3SStephen M. Cameron return -ENOTSUPP; 78513f4336f3SStephen M. Cameron 78523f4336f3SStephen M. Cameron h->max_commands = readl(&(h->cfgtable->CmdsOutMax)); 7853283b4a9bSStephen M. Cameron 78543f4336f3SStephen M. Cameron /* Update the field, and then ring the doorbell */ 78553f4336f3SStephen M. Cameron writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest)); 7856b9af4937SStephen M. Cameron writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi); 78573f4336f3SStephen M. Cameron writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 7858c706a795SRobert Elliott if (hpsa_wait_for_mode_change_ack(h)) 7859c706a795SRobert Elliott goto error; 7860eb6b2ae9SStephen M. Cameron print_cfg_table(&h->pdev->dev, h->cfgtable); 7861283b4a9bSStephen M. Cameron if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) 7862283b4a9bSStephen M. Cameron goto error; 7863960a30e7SStephen M. Cameron h->transMethod = CFGTBL_Trans_Simple; 7864eb6b2ae9SStephen M. Cameron return 0; 7865283b4a9bSStephen M. Cameron error: 7866050f7147SStephen Cameron dev_err(&h->pdev->dev, "failed to enter simple mode\n"); 7867283b4a9bSStephen M. Cameron return -ENODEV; 7868eb6b2ae9SStephen M. Cameron } 7869eb6b2ae9SStephen M. Cameron 7870195f2c65SRobert Elliott /* free items allocated or mapped by hpsa_pci_init */ 7871195f2c65SRobert Elliott static void hpsa_free_pci_init(struct ctlr_info *h) 7872195f2c65SRobert Elliott { 7873195f2c65SRobert Elliott hpsa_free_cfgtables(h); /* pci_init 4 */ 7874195f2c65SRobert Elliott iounmap(h->vaddr); /* pci_init 3 */ 7875105a3dbcSRobert Elliott h->vaddr = NULL; 7876195f2c65SRobert Elliott hpsa_disable_interrupt_mode(h); /* pci_init 2 */ 7877943a7021SRobert Elliott /* 7878943a7021SRobert Elliott * call pci_disable_device before pci_release_regions per 7879943a7021SRobert Elliott * Documentation/PCI/pci.txt 7880943a7021SRobert Elliott */ 7881195f2c65SRobert Elliott pci_disable_device(h->pdev); /* pci_init 1 */ 7882943a7021SRobert Elliott pci_release_regions(h->pdev); /* pci_init 2 */ 7883195f2c65SRobert Elliott } 7884195f2c65SRobert Elliott 7885195f2c65SRobert Elliott /* several items must be freed later */ 78866f039790SGreg Kroah-Hartman static int hpsa_pci_init(struct ctlr_info *h) 788777c4495cSStephen M. Cameron { 7888eb6b2ae9SStephen M. Cameron int prod_index, err; 7889edd16368SStephen M. Cameron 7890e5c880d1SStephen M. Cameron prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id); 7891e5c880d1SStephen M. Cameron if (prod_index < 0) 789260f923b9SRobert Elliott return prod_index; 7893e5c880d1SStephen M. Cameron h->product_name = products[prod_index].product_name; 7894e5c880d1SStephen M. Cameron h->access = *(products[prod_index].access); 7895e5c880d1SStephen M. Cameron 78969b5c48c2SStephen Cameron h->needs_abort_tags_swizzled = 78979b5c48c2SStephen Cameron ctlr_needs_abort_tags_swizzled(h->board_id); 78989b5c48c2SStephen Cameron 7899e5a44df8SMatthew Garrett pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S | 7900e5a44df8SMatthew Garrett PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM); 7901e5a44df8SMatthew Garrett 790255c06c71SStephen M. Cameron err = pci_enable_device(h->pdev); 7903edd16368SStephen M. Cameron if (err) { 7904195f2c65SRobert Elliott dev_err(&h->pdev->dev, "failed to enable PCI device\n"); 7905943a7021SRobert Elliott pci_disable_device(h->pdev); 7906edd16368SStephen M. Cameron return err; 7907edd16368SStephen M. Cameron } 7908edd16368SStephen M. Cameron 7909f79cfec6SStephen M. Cameron err = pci_request_regions(h->pdev, HPSA); 7910edd16368SStephen M. Cameron if (err) { 791155c06c71SStephen M. Cameron dev_err(&h->pdev->dev, 7912195f2c65SRobert Elliott "failed to obtain PCI resources\n"); 7913943a7021SRobert Elliott pci_disable_device(h->pdev); 7914943a7021SRobert Elliott return err; 7915edd16368SStephen M. Cameron } 79164fa604e1SRobert Elliott 79174fa604e1SRobert Elliott pci_set_master(h->pdev); 79184fa604e1SRobert Elliott 79196b3f4c52SStephen M. Cameron hpsa_interrupt_mode(h); 792012d2cd47SStephen M. Cameron err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr); 79213a7774ceSStephen M. Cameron if (err) 7922195f2c65SRobert Elliott goto clean2; /* intmode+region, pci */ 7923edd16368SStephen M. Cameron h->vaddr = remap_pci_mem(h->paddr, 0x250); 7924204892e9SStephen M. Cameron if (!h->vaddr) { 7925195f2c65SRobert Elliott dev_err(&h->pdev->dev, "failed to remap PCI mem\n"); 7926204892e9SStephen M. Cameron err = -ENOMEM; 7927195f2c65SRobert Elliott goto clean2; /* intmode+region, pci */ 7928204892e9SStephen M. Cameron } 7929fe5389c8SStephen M. Cameron err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 79302c4c8c8bSStephen M. Cameron if (err) 7931195f2c65SRobert Elliott goto clean3; /* vaddr, intmode+region, pci */ 793277c4495cSStephen M. Cameron err = hpsa_find_cfgtables(h); 793377c4495cSStephen M. Cameron if (err) 7934195f2c65SRobert Elliott goto clean3; /* vaddr, intmode+region, pci */ 7935b93d7536SStephen M. Cameron hpsa_find_board_params(h); 7936edd16368SStephen M. Cameron 793776c46e49SStephen M. Cameron if (!hpsa_CISS_signature_present(h)) { 7938edd16368SStephen M. Cameron err = -ENODEV; 7939195f2c65SRobert Elliott goto clean4; /* cfgtables, vaddr, intmode+region, pci */ 7940edd16368SStephen M. Cameron } 794197a5e98cSStephen M. Cameron hpsa_set_driver_support_bits(h); 79423d0eab67SStephen M. Cameron hpsa_p600_dma_prefetch_quirk(h); 7943eb6b2ae9SStephen M. Cameron err = hpsa_enter_simple_mode(h); 7944eb6b2ae9SStephen M. Cameron if (err) 7945195f2c65SRobert Elliott goto clean4; /* cfgtables, vaddr, intmode+region, pci */ 7946edd16368SStephen M. Cameron return 0; 7947edd16368SStephen M. Cameron 7948195f2c65SRobert Elliott clean4: /* cfgtables, vaddr, intmode+region, pci */ 7949195f2c65SRobert Elliott hpsa_free_cfgtables(h); 7950195f2c65SRobert Elliott clean3: /* vaddr, intmode+region, pci */ 7951204892e9SStephen M. Cameron iounmap(h->vaddr); 7952105a3dbcSRobert Elliott h->vaddr = NULL; 7953195f2c65SRobert Elliott clean2: /* intmode+region, pci */ 7954195f2c65SRobert Elliott hpsa_disable_interrupt_mode(h); 7955943a7021SRobert Elliott /* 7956943a7021SRobert Elliott * call pci_disable_device before pci_release_regions per 7957943a7021SRobert Elliott * Documentation/PCI/pci.txt 7958943a7021SRobert Elliott */ 7959195f2c65SRobert Elliott pci_disable_device(h->pdev); 7960943a7021SRobert Elliott pci_release_regions(h->pdev); 7961edd16368SStephen M. Cameron return err; 7962edd16368SStephen M. Cameron } 7963edd16368SStephen M. Cameron 79646f039790SGreg Kroah-Hartman static void hpsa_hba_inquiry(struct ctlr_info *h) 7965339b2b14SStephen M. Cameron { 7966339b2b14SStephen M. Cameron int rc; 7967339b2b14SStephen M. Cameron 7968339b2b14SStephen M. Cameron #define HBA_INQUIRY_BYTE_COUNT 64 7969339b2b14SStephen M. Cameron h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL); 7970339b2b14SStephen M. Cameron if (!h->hba_inquiry_data) 7971339b2b14SStephen M. Cameron return; 7972339b2b14SStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0, 7973339b2b14SStephen M. Cameron h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT); 7974339b2b14SStephen M. Cameron if (rc != 0) { 7975339b2b14SStephen M. Cameron kfree(h->hba_inquiry_data); 7976339b2b14SStephen M. Cameron h->hba_inquiry_data = NULL; 7977339b2b14SStephen M. Cameron } 7978339b2b14SStephen M. Cameron } 7979339b2b14SStephen M. Cameron 79806b6c1cd7STomas Henzl static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id) 7981edd16368SStephen M. Cameron { 79821df8552aSStephen M. Cameron int rc, i; 79833b747298STomas Henzl void __iomem *vaddr; 7984edd16368SStephen M. Cameron 79854c2a8c40SStephen M. Cameron if (!reset_devices) 79864c2a8c40SStephen M. Cameron return 0; 79874c2a8c40SStephen M. Cameron 7988132aa220STomas Henzl /* kdump kernel is loading, we don't know in which state is 7989132aa220STomas Henzl * the pci interface. The dev->enable_cnt is equal zero 7990132aa220STomas Henzl * so we call enable+disable, wait a while and switch it on. 7991132aa220STomas Henzl */ 7992132aa220STomas Henzl rc = pci_enable_device(pdev); 7993132aa220STomas Henzl if (rc) { 7994132aa220STomas Henzl dev_warn(&pdev->dev, "Failed to enable PCI device\n"); 7995132aa220STomas Henzl return -ENODEV; 7996132aa220STomas Henzl } 7997132aa220STomas Henzl pci_disable_device(pdev); 7998132aa220STomas Henzl msleep(260); /* a randomly chosen number */ 7999132aa220STomas Henzl rc = pci_enable_device(pdev); 8000132aa220STomas Henzl if (rc) { 8001132aa220STomas Henzl dev_warn(&pdev->dev, "failed to enable device.\n"); 8002132aa220STomas Henzl return -ENODEV; 8003132aa220STomas Henzl } 80044fa604e1SRobert Elliott 8005859c75abSTomas Henzl pci_set_master(pdev); 80064fa604e1SRobert Elliott 80073b747298STomas Henzl vaddr = pci_ioremap_bar(pdev, 0); 80083b747298STomas Henzl if (vaddr == NULL) { 80093b747298STomas Henzl rc = -ENOMEM; 80103b747298STomas Henzl goto out_disable; 80113b747298STomas Henzl } 80123b747298STomas Henzl writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET); 80133b747298STomas Henzl iounmap(vaddr); 80143b747298STomas Henzl 80151df8552aSStephen M. Cameron /* Reset the controller with a PCI power-cycle or via doorbell */ 80166b6c1cd7STomas Henzl rc = hpsa_kdump_hard_reset_controller(pdev, board_id); 8017edd16368SStephen M. Cameron 80181df8552aSStephen M. Cameron /* -ENOTSUPP here means we cannot reset the controller 80191df8552aSStephen M. Cameron * but it's already (and still) up and running in 802018867659SStephen M. Cameron * "performant mode". Or, it might be 640x, which can't reset 802118867659SStephen M. Cameron * due to concerns about shared bbwc between 6402/6404 pair. 80221df8552aSStephen M. Cameron */ 8023adf1b3a3SRobert Elliott if (rc) 8024132aa220STomas Henzl goto out_disable; 8025edd16368SStephen M. Cameron 8026edd16368SStephen M. Cameron /* Now try to get the controller to respond to a no-op */ 80271ba66c9cSRobert Elliott dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n"); 8028edd16368SStephen M. Cameron for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) { 8029edd16368SStephen M. Cameron if (hpsa_noop(pdev) == 0) 8030edd16368SStephen M. Cameron break; 8031edd16368SStephen M. Cameron else 8032edd16368SStephen M. Cameron dev_warn(&pdev->dev, "no-op failed%s\n", 8033edd16368SStephen M. Cameron (i < 11 ? "; re-trying" : "")); 8034edd16368SStephen M. Cameron } 8035132aa220STomas Henzl 8036132aa220STomas Henzl out_disable: 8037132aa220STomas Henzl 8038132aa220STomas Henzl pci_disable_device(pdev); 8039132aa220STomas Henzl return rc; 8040edd16368SStephen M. Cameron } 8041edd16368SStephen M. Cameron 80421fb7c98aSRobert Elliott static void hpsa_free_cmd_pool(struct ctlr_info *h) 80431fb7c98aSRobert Elliott { 80441fb7c98aSRobert Elliott kfree(h->cmd_pool_bits); 8045105a3dbcSRobert Elliott h->cmd_pool_bits = NULL; 8046105a3dbcSRobert Elliott if (h->cmd_pool) { 80471fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 80481fb7c98aSRobert Elliott h->nr_cmds * sizeof(struct CommandList), 80491fb7c98aSRobert Elliott h->cmd_pool, 80501fb7c98aSRobert Elliott h->cmd_pool_dhandle); 8051105a3dbcSRobert Elliott h->cmd_pool = NULL; 8052105a3dbcSRobert Elliott h->cmd_pool_dhandle = 0; 8053105a3dbcSRobert Elliott } 8054105a3dbcSRobert Elliott if (h->errinfo_pool) { 80551fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 80561fb7c98aSRobert Elliott h->nr_cmds * sizeof(struct ErrorInfo), 80571fb7c98aSRobert Elliott h->errinfo_pool, 80581fb7c98aSRobert Elliott h->errinfo_pool_dhandle); 8059105a3dbcSRobert Elliott h->errinfo_pool = NULL; 8060105a3dbcSRobert Elliott h->errinfo_pool_dhandle = 0; 8061105a3dbcSRobert Elliott } 80621fb7c98aSRobert Elliott } 80631fb7c98aSRobert Elliott 8064d37ffbe4SRobert Elliott static int hpsa_alloc_cmd_pool(struct ctlr_info *h) 80652e9d1b36SStephen M. Cameron { 80662e9d1b36SStephen M. Cameron h->cmd_pool_bits = kzalloc( 80672e9d1b36SStephen M. Cameron DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) * 80682e9d1b36SStephen M. Cameron sizeof(unsigned long), GFP_KERNEL); 80692e9d1b36SStephen M. Cameron h->cmd_pool = pci_alloc_consistent(h->pdev, 80702e9d1b36SStephen M. Cameron h->nr_cmds * sizeof(*h->cmd_pool), 80712e9d1b36SStephen M. Cameron &(h->cmd_pool_dhandle)); 80722e9d1b36SStephen M. Cameron h->errinfo_pool = pci_alloc_consistent(h->pdev, 80732e9d1b36SStephen M. Cameron h->nr_cmds * sizeof(*h->errinfo_pool), 80742e9d1b36SStephen M. Cameron &(h->errinfo_pool_dhandle)); 80752e9d1b36SStephen M. Cameron if ((h->cmd_pool_bits == NULL) 80762e9d1b36SStephen M. Cameron || (h->cmd_pool == NULL) 80772e9d1b36SStephen M. Cameron || (h->errinfo_pool == NULL)) { 80782e9d1b36SStephen M. Cameron dev_err(&h->pdev->dev, "out of memory in %s", __func__); 80792c143342SRobert Elliott goto clean_up; 80802e9d1b36SStephen M. Cameron } 8081360c73bdSStephen Cameron hpsa_preinitialize_commands(h); 80822e9d1b36SStephen M. Cameron return 0; 80832c143342SRobert Elliott clean_up: 80842c143342SRobert Elliott hpsa_free_cmd_pool(h); 80852c143342SRobert Elliott return -ENOMEM; 80862e9d1b36SStephen M. Cameron } 80872e9d1b36SStephen M. Cameron 808841b3cf08SStephen M. Cameron static void hpsa_irq_affinity_hints(struct ctlr_info *h) 808941b3cf08SStephen M. Cameron { 8090ec429952SFabian Frederick int i, cpu; 809141b3cf08SStephen M. Cameron 809241b3cf08SStephen M. Cameron cpu = cpumask_first(cpu_online_mask); 809341b3cf08SStephen M. Cameron for (i = 0; i < h->msix_vector; i++) { 8094ec429952SFabian Frederick irq_set_affinity_hint(h->intr[i], get_cpu_mask(cpu)); 809541b3cf08SStephen M. Cameron cpu = cpumask_next(cpu, cpu_online_mask); 809641b3cf08SStephen M. Cameron } 809741b3cf08SStephen M. Cameron } 809841b3cf08SStephen M. Cameron 8099ec501a18SRobert Elliott /* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */ 8100ec501a18SRobert Elliott static void hpsa_free_irqs(struct ctlr_info *h) 8101ec501a18SRobert Elliott { 8102ec501a18SRobert Elliott int i; 8103ec501a18SRobert Elliott 8104ec501a18SRobert Elliott if (!h->msix_vector || h->intr_mode != PERF_MODE_INT) { 8105ec501a18SRobert Elliott /* Single reply queue, only one irq to free */ 8106ec501a18SRobert Elliott i = h->intr_mode; 8107ec501a18SRobert Elliott irq_set_affinity_hint(h->intr[i], NULL); 8108ec501a18SRobert Elliott free_irq(h->intr[i], &h->q[i]); 8109105a3dbcSRobert Elliott h->q[i] = 0; 8110ec501a18SRobert Elliott return; 8111ec501a18SRobert Elliott } 8112ec501a18SRobert Elliott 8113ec501a18SRobert Elliott for (i = 0; i < h->msix_vector; i++) { 8114ec501a18SRobert Elliott irq_set_affinity_hint(h->intr[i], NULL); 8115ec501a18SRobert Elliott free_irq(h->intr[i], &h->q[i]); 8116105a3dbcSRobert Elliott h->q[i] = 0; 8117ec501a18SRobert Elliott } 8118a4e17fc1SRobert Elliott for (; i < MAX_REPLY_QUEUES; i++) 8119a4e17fc1SRobert Elliott h->q[i] = 0; 8120ec501a18SRobert Elliott } 8121ec501a18SRobert Elliott 81229ee61794SRobert Elliott /* returns 0 on success; cleans up and returns -Enn on error */ 81239ee61794SRobert Elliott static int hpsa_request_irqs(struct ctlr_info *h, 81240ae01a32SStephen M. Cameron irqreturn_t (*msixhandler)(int, void *), 81250ae01a32SStephen M. Cameron irqreturn_t (*intxhandler)(int, void *)) 81260ae01a32SStephen M. Cameron { 8127254f796bSMatt Gates int rc, i; 81280ae01a32SStephen M. Cameron 8129254f796bSMatt Gates /* 8130254f796bSMatt Gates * initialize h->q[x] = x so that interrupt handlers know which 8131254f796bSMatt Gates * queue to process. 8132254f796bSMatt Gates */ 8133254f796bSMatt Gates for (i = 0; i < MAX_REPLY_QUEUES; i++) 8134254f796bSMatt Gates h->q[i] = (u8) i; 8135254f796bSMatt Gates 8136eee0f03aSHannes Reinecke if (h->intr_mode == PERF_MODE_INT && h->msix_vector > 0) { 8137254f796bSMatt Gates /* If performant mode and MSI-X, use multiple reply queues */ 8138a4e17fc1SRobert Elliott for (i = 0; i < h->msix_vector; i++) { 81398b47004aSRobert Elliott sprintf(h->intrname[i], "%s-msix%d", h->devname, i); 8140254f796bSMatt Gates rc = request_irq(h->intr[i], msixhandler, 81418b47004aSRobert Elliott 0, h->intrname[i], 8142254f796bSMatt Gates &h->q[i]); 8143a4e17fc1SRobert Elliott if (rc) { 8144a4e17fc1SRobert Elliott int j; 8145a4e17fc1SRobert Elliott 8146a4e17fc1SRobert Elliott dev_err(&h->pdev->dev, 8147a4e17fc1SRobert Elliott "failed to get irq %d for %s\n", 8148a4e17fc1SRobert Elliott h->intr[i], h->devname); 8149a4e17fc1SRobert Elliott for (j = 0; j < i; j++) { 8150a4e17fc1SRobert Elliott free_irq(h->intr[j], &h->q[j]); 8151a4e17fc1SRobert Elliott h->q[j] = 0; 8152a4e17fc1SRobert Elliott } 8153a4e17fc1SRobert Elliott for (; j < MAX_REPLY_QUEUES; j++) 8154a4e17fc1SRobert Elliott h->q[j] = 0; 8155a4e17fc1SRobert Elliott return rc; 8156a4e17fc1SRobert Elliott } 8157a4e17fc1SRobert Elliott } 815841b3cf08SStephen M. Cameron hpsa_irq_affinity_hints(h); 8159254f796bSMatt Gates } else { 8160254f796bSMatt Gates /* Use single reply pool */ 8161eee0f03aSHannes Reinecke if (h->msix_vector > 0 || h->msi_vector) { 81628b47004aSRobert Elliott if (h->msix_vector) 81638b47004aSRobert Elliott sprintf(h->intrname[h->intr_mode], 81648b47004aSRobert Elliott "%s-msix", h->devname); 81658b47004aSRobert Elliott else 81668b47004aSRobert Elliott sprintf(h->intrname[h->intr_mode], 81678b47004aSRobert Elliott "%s-msi", h->devname); 8168254f796bSMatt Gates rc = request_irq(h->intr[h->intr_mode], 81698b47004aSRobert Elliott msixhandler, 0, 81708b47004aSRobert Elliott h->intrname[h->intr_mode], 8171254f796bSMatt Gates &h->q[h->intr_mode]); 8172254f796bSMatt Gates } else { 81738b47004aSRobert Elliott sprintf(h->intrname[h->intr_mode], 81748b47004aSRobert Elliott "%s-intx", h->devname); 8175254f796bSMatt Gates rc = request_irq(h->intr[h->intr_mode], 81768b47004aSRobert Elliott intxhandler, IRQF_SHARED, 81778b47004aSRobert Elliott h->intrname[h->intr_mode], 8178254f796bSMatt Gates &h->q[h->intr_mode]); 8179254f796bSMatt Gates } 8180105a3dbcSRobert Elliott irq_set_affinity_hint(h->intr[h->intr_mode], NULL); 8181254f796bSMatt Gates } 81820ae01a32SStephen M. Cameron if (rc) { 8183195f2c65SRobert Elliott dev_err(&h->pdev->dev, "failed to get irq %d for %s\n", 81840ae01a32SStephen M. Cameron h->intr[h->intr_mode], h->devname); 8185195f2c65SRobert Elliott hpsa_free_irqs(h); 81860ae01a32SStephen M. Cameron return -ENODEV; 81870ae01a32SStephen M. Cameron } 81880ae01a32SStephen M. Cameron return 0; 81890ae01a32SStephen M. Cameron } 81900ae01a32SStephen M. Cameron 81916f039790SGreg Kroah-Hartman static int hpsa_kdump_soft_reset(struct ctlr_info *h) 819264670ac8SStephen M. Cameron { 819339c53f55SRobert Elliott int rc; 8194bf43caf3SRobert Elliott hpsa_send_host_reset(h, RAID_CTLR_LUNID, HPSA_RESET_TYPE_CONTROLLER); 819564670ac8SStephen M. Cameron 819664670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n"); 819739c53f55SRobert Elliott rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY); 819839c53f55SRobert Elliott if (rc) { 819964670ac8SStephen M. Cameron dev_warn(&h->pdev->dev, "Soft reset had no effect.\n"); 820039c53f55SRobert Elliott return rc; 820164670ac8SStephen M. Cameron } 820264670ac8SStephen M. Cameron 820364670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n"); 820439c53f55SRobert Elliott rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 820539c53f55SRobert Elliott if (rc) { 820664670ac8SStephen M. Cameron dev_warn(&h->pdev->dev, "Board failed to become ready " 820764670ac8SStephen M. Cameron "after soft reset.\n"); 820839c53f55SRobert Elliott return rc; 820964670ac8SStephen M. Cameron } 821064670ac8SStephen M. Cameron 821164670ac8SStephen M. Cameron return 0; 821264670ac8SStephen M. Cameron } 821364670ac8SStephen M. Cameron 8214072b0518SStephen M. Cameron static void hpsa_free_reply_queues(struct ctlr_info *h) 8215072b0518SStephen M. Cameron { 8216072b0518SStephen M. Cameron int i; 8217072b0518SStephen M. Cameron 8218072b0518SStephen M. Cameron for (i = 0; i < h->nreply_queues; i++) { 8219072b0518SStephen M. Cameron if (!h->reply_queue[i].head) 8220072b0518SStephen M. Cameron continue; 82211fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 82221fb7c98aSRobert Elliott h->reply_queue_size, 82231fb7c98aSRobert Elliott h->reply_queue[i].head, 82241fb7c98aSRobert Elliott h->reply_queue[i].busaddr); 8225072b0518SStephen M. Cameron h->reply_queue[i].head = NULL; 8226072b0518SStephen M. Cameron h->reply_queue[i].busaddr = 0; 8227072b0518SStephen M. Cameron } 8228105a3dbcSRobert Elliott h->reply_queue_size = 0; 8229072b0518SStephen M. Cameron } 8230072b0518SStephen M. Cameron 82310097f0f4SStephen M. Cameron static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h) 82320097f0f4SStephen M. Cameron { 8233105a3dbcSRobert Elliott hpsa_free_performant_mode(h); /* init_one 7 */ 8234105a3dbcSRobert Elliott hpsa_free_sg_chain_blocks(h); /* init_one 6 */ 8235105a3dbcSRobert Elliott hpsa_free_cmd_pool(h); /* init_one 5 */ 8236105a3dbcSRobert Elliott hpsa_free_irqs(h); /* init_one 4 */ 82372946e82bSRobert Elliott scsi_host_put(h->scsi_host); /* init_one 3 */ 82382946e82bSRobert Elliott h->scsi_host = NULL; /* init_one 3 */ 82392946e82bSRobert Elliott hpsa_free_pci_init(h); /* init_one 2_5 */ 82409ecd953aSRobert Elliott free_percpu(h->lockup_detected); /* init_one 2 */ 82419ecd953aSRobert Elliott h->lockup_detected = NULL; /* init_one 2 */ 82429ecd953aSRobert Elliott if (h->resubmit_wq) { 82439ecd953aSRobert Elliott destroy_workqueue(h->resubmit_wq); /* init_one 1 */ 82449ecd953aSRobert Elliott h->resubmit_wq = NULL; 82459ecd953aSRobert Elliott } 82469ecd953aSRobert Elliott if (h->rescan_ctlr_wq) { 82479ecd953aSRobert Elliott destroy_workqueue(h->rescan_ctlr_wq); 82489ecd953aSRobert Elliott h->rescan_ctlr_wq = NULL; 82499ecd953aSRobert Elliott } 8250105a3dbcSRobert Elliott kfree(h); /* init_one 1 */ 825164670ac8SStephen M. Cameron } 825264670ac8SStephen M. Cameron 8253a0c12413SStephen M. Cameron /* Called when controller lockup detected. */ 8254f2405db8SDon Brace static void fail_all_outstanding_cmds(struct ctlr_info *h) 8255a0c12413SStephen M. Cameron { 8256281a7fd0SWebb Scales int i, refcount; 8257281a7fd0SWebb Scales struct CommandList *c; 825825163bd5SWebb Scales int failcount = 0; 8259a0c12413SStephen M. Cameron 8260080ef1ccSDon Brace flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */ 8261f2405db8SDon Brace for (i = 0; i < h->nr_cmds; i++) { 8262f2405db8SDon Brace c = h->cmd_pool + i; 8263281a7fd0SWebb Scales refcount = atomic_inc_return(&c->refcount); 8264281a7fd0SWebb Scales if (refcount > 1) { 826525163bd5SWebb Scales c->err_info->CommandStatus = CMD_CTLR_LOCKUP; 82665a3d16f5SStephen M. Cameron finish_cmd(c); 8267433b5f4dSStephen Cameron atomic_dec(&h->commands_outstanding); 826825163bd5SWebb Scales failcount++; 8269a0c12413SStephen M. Cameron } 8270281a7fd0SWebb Scales cmd_free(h, c); 8271281a7fd0SWebb Scales } 827225163bd5SWebb Scales dev_warn(&h->pdev->dev, 827325163bd5SWebb Scales "failed %d commands in fail_all\n", failcount); 8274a0c12413SStephen M. Cameron } 8275a0c12413SStephen M. Cameron 8276094963daSStephen M. Cameron static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value) 8277094963daSStephen M. Cameron { 8278c8ed0010SRusty Russell int cpu; 8279094963daSStephen M. Cameron 8280c8ed0010SRusty Russell for_each_online_cpu(cpu) { 8281094963daSStephen M. Cameron u32 *lockup_detected; 8282094963daSStephen M. Cameron lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 8283094963daSStephen M. Cameron *lockup_detected = value; 8284094963daSStephen M. Cameron } 8285094963daSStephen M. Cameron wmb(); /* be sure the per-cpu variables are out to memory */ 8286094963daSStephen M. Cameron } 8287094963daSStephen M. Cameron 8288a0c12413SStephen M. Cameron static void controller_lockup_detected(struct ctlr_info *h) 8289a0c12413SStephen M. Cameron { 8290a0c12413SStephen M. Cameron unsigned long flags; 8291094963daSStephen M. Cameron u32 lockup_detected; 8292a0c12413SStephen M. Cameron 8293a0c12413SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 8294a0c12413SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 8295094963daSStephen M. Cameron lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET); 8296094963daSStephen M. Cameron if (!lockup_detected) { 8297094963daSStephen M. Cameron /* no heartbeat, but controller gave us a zero. */ 8298094963daSStephen M. Cameron dev_warn(&h->pdev->dev, 829925163bd5SWebb Scales "lockup detected after %d but scratchpad register is zero\n", 830025163bd5SWebb Scales h->heartbeat_sample_interval / HZ); 8301094963daSStephen M. Cameron lockup_detected = 0xffffffff; 8302094963daSStephen M. Cameron } 8303094963daSStephen M. Cameron set_lockup_detected_for_all_cpus(h, lockup_detected); 8304a0c12413SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 830525163bd5SWebb Scales dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n", 830625163bd5SWebb Scales lockup_detected, h->heartbeat_sample_interval / HZ); 8307a0c12413SStephen M. Cameron pci_disable_device(h->pdev); 8308f2405db8SDon Brace fail_all_outstanding_cmds(h); 8309a0c12413SStephen M. Cameron } 8310a0c12413SStephen M. Cameron 831125163bd5SWebb Scales static int detect_controller_lockup(struct ctlr_info *h) 8312a0c12413SStephen M. Cameron { 8313a0c12413SStephen M. Cameron u64 now; 8314a0c12413SStephen M. Cameron u32 heartbeat; 8315a0c12413SStephen M. Cameron unsigned long flags; 8316a0c12413SStephen M. Cameron 8317a0c12413SStephen M. Cameron now = get_jiffies_64(); 8318a0c12413SStephen M. Cameron /* If we've received an interrupt recently, we're ok. */ 8319a0c12413SStephen M. Cameron if (time_after64(h->last_intr_timestamp + 8320e85c5974SStephen M. Cameron (h->heartbeat_sample_interval), now)) 832125163bd5SWebb Scales return false; 8322a0c12413SStephen M. Cameron 8323a0c12413SStephen M. Cameron /* 8324a0c12413SStephen M. Cameron * If we've already checked the heartbeat recently, we're ok. 8325a0c12413SStephen M. Cameron * This could happen if someone sends us a signal. We 8326a0c12413SStephen M. Cameron * otherwise don't care about signals in this thread. 8327a0c12413SStephen M. Cameron */ 8328a0c12413SStephen M. Cameron if (time_after64(h->last_heartbeat_timestamp + 8329e85c5974SStephen M. Cameron (h->heartbeat_sample_interval), now)) 833025163bd5SWebb Scales return false; 8331a0c12413SStephen M. Cameron 8332a0c12413SStephen M. Cameron /* If heartbeat has not changed since we last looked, we're not ok. */ 8333a0c12413SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 8334a0c12413SStephen M. Cameron heartbeat = readl(&h->cfgtable->HeartBeat); 8335a0c12413SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 8336a0c12413SStephen M. Cameron if (h->last_heartbeat == heartbeat) { 8337a0c12413SStephen M. Cameron controller_lockup_detected(h); 833825163bd5SWebb Scales return true; 8339a0c12413SStephen M. Cameron } 8340a0c12413SStephen M. Cameron 8341a0c12413SStephen M. Cameron /* We're ok. */ 8342a0c12413SStephen M. Cameron h->last_heartbeat = heartbeat; 8343a0c12413SStephen M. Cameron h->last_heartbeat_timestamp = now; 834425163bd5SWebb Scales return false; 8345a0c12413SStephen M. Cameron } 8346a0c12413SStephen M. Cameron 83479846590eSStephen M. Cameron static void hpsa_ack_ctlr_events(struct ctlr_info *h) 834876438d08SStephen M. Cameron { 834976438d08SStephen M. Cameron int i; 835076438d08SStephen M. Cameron char *event_type; 835176438d08SStephen M. Cameron 8352e4aa3e6aSStephen Cameron if (!(h->fw_support & MISC_FW_EVENT_NOTIFY)) 8353e4aa3e6aSStephen Cameron return; 8354e4aa3e6aSStephen Cameron 835576438d08SStephen M. Cameron /* Ask the controller to clear the events we're handling. */ 83561f7cee8cSStephen M. Cameron if ((h->transMethod & (CFGTBL_Trans_io_accel1 83571f7cee8cSStephen M. Cameron | CFGTBL_Trans_io_accel2)) && 835876438d08SStephen M. Cameron (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE || 835976438d08SStephen M. Cameron h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) { 836076438d08SStephen M. Cameron 836176438d08SStephen M. Cameron if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE) 836276438d08SStephen M. Cameron event_type = "state change"; 836376438d08SStephen M. Cameron if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE) 836476438d08SStephen M. Cameron event_type = "configuration change"; 836576438d08SStephen M. Cameron /* Stop sending new RAID offload reqs via the IO accelerator */ 836676438d08SStephen M. Cameron scsi_block_requests(h->scsi_host); 83675323ed74SDon Brace for (i = 0; i < h->ndevices; i++) { 836876438d08SStephen M. Cameron h->dev[i]->offload_enabled = 0; 83695323ed74SDon Brace h->dev[i]->offload_to_be_enabled = 0; 83705323ed74SDon Brace } 837123100dd9SStephen M. Cameron hpsa_drain_accel_commands(h); 837276438d08SStephen M. Cameron /* Set 'accelerator path config change' bit */ 837376438d08SStephen M. Cameron dev_warn(&h->pdev->dev, 837476438d08SStephen M. Cameron "Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n", 837576438d08SStephen M. Cameron h->events, event_type); 837676438d08SStephen M. Cameron writel(h->events, &(h->cfgtable->clear_event_notify)); 837776438d08SStephen M. Cameron /* Set the "clear event notify field update" bit 6 */ 837876438d08SStephen M. Cameron writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL); 837976438d08SStephen M. Cameron /* Wait until ctlr clears 'clear event notify field', bit 6 */ 838076438d08SStephen M. Cameron hpsa_wait_for_clear_event_notify_ack(h); 838176438d08SStephen M. Cameron scsi_unblock_requests(h->scsi_host); 838276438d08SStephen M. Cameron } else { 838376438d08SStephen M. Cameron /* Acknowledge controller notification events. */ 838476438d08SStephen M. Cameron writel(h->events, &(h->cfgtable->clear_event_notify)); 838576438d08SStephen M. Cameron writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL); 838676438d08SStephen M. Cameron hpsa_wait_for_clear_event_notify_ack(h); 838776438d08SStephen M. Cameron #if 0 838876438d08SStephen M. Cameron writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 838976438d08SStephen M. Cameron hpsa_wait_for_mode_change_ack(h); 839076438d08SStephen M. Cameron #endif 839176438d08SStephen M. Cameron } 83929846590eSStephen M. Cameron return; 839376438d08SStephen M. Cameron } 839476438d08SStephen M. Cameron 839576438d08SStephen M. Cameron /* Check a register on the controller to see if there are configuration 839676438d08SStephen M. Cameron * changes (added/changed/removed logical drives, etc.) which mean that 8397e863d68eSScott Teel * we should rescan the controller for devices. 8398e863d68eSScott Teel * Also check flag for driver-initiated rescan. 839976438d08SStephen M. Cameron */ 84009846590eSStephen M. Cameron static int hpsa_ctlr_needs_rescan(struct ctlr_info *h) 840176438d08SStephen M. Cameron { 8402853633e8SDon Brace if (h->drv_req_rescan) { 8403853633e8SDon Brace h->drv_req_rescan = 0; 8404853633e8SDon Brace return 1; 8405853633e8SDon Brace } 8406853633e8SDon Brace 840776438d08SStephen M. Cameron if (!(h->fw_support & MISC_FW_EVENT_NOTIFY)) 84089846590eSStephen M. Cameron return 0; 840976438d08SStephen M. Cameron 841076438d08SStephen M. Cameron h->events = readl(&(h->cfgtable->event_notify)); 84119846590eSStephen M. Cameron return h->events & RESCAN_REQUIRED_EVENT_BITS; 84129846590eSStephen M. Cameron } 841376438d08SStephen M. Cameron 841476438d08SStephen M. Cameron /* 84159846590eSStephen M. Cameron * Check if any of the offline devices have become ready 841676438d08SStephen M. Cameron */ 84179846590eSStephen M. Cameron static int hpsa_offline_devices_ready(struct ctlr_info *h) 84189846590eSStephen M. Cameron { 84199846590eSStephen M. Cameron unsigned long flags; 84209846590eSStephen M. Cameron struct offline_device_entry *d; 84219846590eSStephen M. Cameron struct list_head *this, *tmp; 84229846590eSStephen M. Cameron 84239846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 84249846590eSStephen M. Cameron list_for_each_safe(this, tmp, &h->offline_device_list) { 84259846590eSStephen M. Cameron d = list_entry(this, struct offline_device_entry, 84269846590eSStephen M. Cameron offline_list); 84279846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 8428d1fea47cSStephen M. Cameron if (!hpsa_volume_offline(h, d->scsi3addr)) { 8429d1fea47cSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 8430d1fea47cSStephen M. Cameron list_del(&d->offline_list); 8431d1fea47cSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 84329846590eSStephen M. Cameron return 1; 8433d1fea47cSStephen M. Cameron } 84349846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 843576438d08SStephen M. Cameron } 84369846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 84379846590eSStephen M. Cameron return 0; 84389846590eSStephen M. Cameron } 84399846590eSStephen M. Cameron 844034592254SScott Teel static int hpsa_luns_changed(struct ctlr_info *h) 844134592254SScott Teel { 844234592254SScott Teel int rc = 1; /* assume there are changes */ 844334592254SScott Teel struct ReportLUNdata *logdev = NULL; 844434592254SScott Teel 844534592254SScott Teel /* if we can't find out if lun data has changed, 844634592254SScott Teel * assume that it has. 844734592254SScott Teel */ 844834592254SScott Teel 844934592254SScott Teel if (!h->lastlogicals) 845034592254SScott Teel goto out; 845134592254SScott Teel 845234592254SScott Teel logdev = kzalloc(sizeof(*logdev), GFP_KERNEL); 845334592254SScott Teel if (!logdev) { 845434592254SScott Teel dev_warn(&h->pdev->dev, 845534592254SScott Teel "Out of memory, can't track lun changes.\n"); 845634592254SScott Teel goto out; 845734592254SScott Teel } 845834592254SScott Teel if (hpsa_scsi_do_report_luns(h, 1, logdev, sizeof(*logdev), 0)) { 845934592254SScott Teel dev_warn(&h->pdev->dev, 846034592254SScott Teel "report luns failed, can't track lun changes.\n"); 846134592254SScott Teel goto out; 846234592254SScott Teel } 846334592254SScott Teel if (memcmp(logdev, h->lastlogicals, sizeof(*logdev))) { 846434592254SScott Teel dev_info(&h->pdev->dev, 846534592254SScott Teel "Lun changes detected.\n"); 846634592254SScott Teel memcpy(h->lastlogicals, logdev, sizeof(*logdev)); 846734592254SScott Teel goto out; 846834592254SScott Teel } else 846934592254SScott Teel rc = 0; /* no changes detected. */ 847034592254SScott Teel out: 847134592254SScott Teel kfree(logdev); 847234592254SScott Teel return rc; 847334592254SScott Teel } 847434592254SScott Teel 84756636e7f4SDon Brace static void hpsa_rescan_ctlr_worker(struct work_struct *work) 8476a0c12413SStephen M. Cameron { 8477a0c12413SStephen M. Cameron unsigned long flags; 84788a98db73SStephen M. Cameron struct ctlr_info *h = container_of(to_delayed_work(work), 84796636e7f4SDon Brace struct ctlr_info, rescan_ctlr_work); 84806636e7f4SDon Brace 84816636e7f4SDon Brace 84826636e7f4SDon Brace if (h->remove_in_progress) 84838a98db73SStephen M. Cameron return; 84849846590eSStephen M. Cameron 84859846590eSStephen M. Cameron if (hpsa_ctlr_needs_rescan(h) || hpsa_offline_devices_ready(h)) { 84869846590eSStephen M. Cameron scsi_host_get(h->scsi_host); 84879846590eSStephen M. Cameron hpsa_ack_ctlr_events(h); 84889846590eSStephen M. Cameron hpsa_scan_start(h->scsi_host); 84899846590eSStephen M. Cameron scsi_host_put(h->scsi_host); 849034592254SScott Teel } else if (h->discovery_polling) { 8491c2adae44SScott Teel hpsa_disable_rld_caching(h); 849234592254SScott Teel if (hpsa_luns_changed(h)) { 849334592254SScott Teel struct Scsi_Host *sh = NULL; 849434592254SScott Teel 849534592254SScott Teel dev_info(&h->pdev->dev, 849634592254SScott Teel "driver discovery polling rescan.\n"); 849734592254SScott Teel sh = scsi_host_get(h->scsi_host); 849834592254SScott Teel if (sh != NULL) { 849934592254SScott Teel hpsa_scan_start(sh); 850034592254SScott Teel scsi_host_put(sh); 850134592254SScott Teel } 850234592254SScott Teel } 85039846590eSStephen M. Cameron } 85046636e7f4SDon Brace spin_lock_irqsave(&h->lock, flags); 85056636e7f4SDon Brace if (!h->remove_in_progress) 85066636e7f4SDon Brace queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work, 85076636e7f4SDon Brace h->heartbeat_sample_interval); 85086636e7f4SDon Brace spin_unlock_irqrestore(&h->lock, flags); 85096636e7f4SDon Brace } 85106636e7f4SDon Brace 85116636e7f4SDon Brace static void hpsa_monitor_ctlr_worker(struct work_struct *work) 85126636e7f4SDon Brace { 85136636e7f4SDon Brace unsigned long flags; 85146636e7f4SDon Brace struct ctlr_info *h = container_of(to_delayed_work(work), 85156636e7f4SDon Brace struct ctlr_info, monitor_ctlr_work); 85166636e7f4SDon Brace 85176636e7f4SDon Brace detect_controller_lockup(h); 85186636e7f4SDon Brace if (lockup_detected(h)) 85196636e7f4SDon Brace return; 85209846590eSStephen M. Cameron 85218a98db73SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 85226636e7f4SDon Brace if (!h->remove_in_progress) 85238a98db73SStephen M. Cameron schedule_delayed_work(&h->monitor_ctlr_work, 85248a98db73SStephen M. Cameron h->heartbeat_sample_interval); 85258a98db73SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 8526a0c12413SStephen M. Cameron } 8527a0c12413SStephen M. Cameron 85286636e7f4SDon Brace static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h, 85296636e7f4SDon Brace char *name) 85306636e7f4SDon Brace { 85316636e7f4SDon Brace struct workqueue_struct *wq = NULL; 85326636e7f4SDon Brace 8533397ea9cbSDon Brace wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr); 85346636e7f4SDon Brace if (!wq) 85356636e7f4SDon Brace dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name); 85366636e7f4SDon Brace 85376636e7f4SDon Brace return wq; 85386636e7f4SDon Brace } 85396636e7f4SDon Brace 85406f039790SGreg Kroah-Hartman static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 85414c2a8c40SStephen M. Cameron { 85424c2a8c40SStephen M. Cameron int dac, rc; 85434c2a8c40SStephen M. Cameron struct ctlr_info *h; 854464670ac8SStephen M. Cameron int try_soft_reset = 0; 854564670ac8SStephen M. Cameron unsigned long flags; 85466b6c1cd7STomas Henzl u32 board_id; 85474c2a8c40SStephen M. Cameron 85484c2a8c40SStephen M. Cameron if (number_of_controllers == 0) 85494c2a8c40SStephen M. Cameron printk(KERN_INFO DRIVER_NAME "\n"); 85504c2a8c40SStephen M. Cameron 85516b6c1cd7STomas Henzl rc = hpsa_lookup_board_id(pdev, &board_id); 85526b6c1cd7STomas Henzl if (rc < 0) { 85536b6c1cd7STomas Henzl dev_warn(&pdev->dev, "Board ID not found\n"); 85546b6c1cd7STomas Henzl return rc; 85556b6c1cd7STomas Henzl } 85566b6c1cd7STomas Henzl 85576b6c1cd7STomas Henzl rc = hpsa_init_reset_devices(pdev, board_id); 855864670ac8SStephen M. Cameron if (rc) { 855964670ac8SStephen M. Cameron if (rc != -ENOTSUPP) 85604c2a8c40SStephen M. Cameron return rc; 856164670ac8SStephen M. Cameron /* If the reset fails in a particular way (it has no way to do 856264670ac8SStephen M. Cameron * a proper hard reset, so returns -ENOTSUPP) we can try to do 856364670ac8SStephen M. Cameron * a soft reset once we get the controller configured up to the 856464670ac8SStephen M. Cameron * point that it can accept a command. 856564670ac8SStephen M. Cameron */ 856664670ac8SStephen M. Cameron try_soft_reset = 1; 856764670ac8SStephen M. Cameron rc = 0; 856864670ac8SStephen M. Cameron } 856964670ac8SStephen M. Cameron 857064670ac8SStephen M. Cameron reinit_after_soft_reset: 85714c2a8c40SStephen M. Cameron 8572303932fdSDon Brace /* Command structures must be aligned on a 32-byte boundary because 8573303932fdSDon Brace * the 5 lower bits of the address are used by the hardware. and by 8574303932fdSDon Brace * the driver. See comments in hpsa.h for more info. 8575303932fdSDon Brace */ 8576303932fdSDon Brace BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT); 8577edd16368SStephen M. Cameron h = kzalloc(sizeof(*h), GFP_KERNEL); 8578105a3dbcSRobert Elliott if (!h) { 8579105a3dbcSRobert Elliott dev_err(&pdev->dev, "Failed to allocate controller head\n"); 8580ecd9aad4SStephen M. Cameron return -ENOMEM; 8581105a3dbcSRobert Elliott } 8582edd16368SStephen M. Cameron 858355c06c71SStephen M. Cameron h->pdev = pdev; 8584105a3dbcSRobert Elliott 8585a9a3a273SStephen M. Cameron h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT; 85869846590eSStephen M. Cameron INIT_LIST_HEAD(&h->offline_device_list); 85876eaf46fdSStephen M. Cameron spin_lock_init(&h->lock); 85889846590eSStephen M. Cameron spin_lock_init(&h->offline_device_lock); 85896eaf46fdSStephen M. Cameron spin_lock_init(&h->scan_lock); 859034f0c627SDon Brace atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS); 85919b5c48c2SStephen Cameron atomic_set(&h->abort_cmds_available, HPSA_CMDS_RESERVED_FOR_ABORTS); 8592094963daSStephen M. Cameron 8593094963daSStephen M. Cameron /* Allocate and clear per-cpu variable lockup_detected */ 8594094963daSStephen M. Cameron h->lockup_detected = alloc_percpu(u32); 85952a5ac326SStephen M. Cameron if (!h->lockup_detected) { 8596105a3dbcSRobert Elliott dev_err(&h->pdev->dev, "Failed to allocate lockup detector\n"); 85972a5ac326SStephen M. Cameron rc = -ENOMEM; 85982efa5929SRobert Elliott goto clean1; /* aer/h */ 85992a5ac326SStephen M. Cameron } 8600094963daSStephen M. Cameron set_lockup_detected_for_all_cpus(h, 0); 8601094963daSStephen M. Cameron 860255c06c71SStephen M. Cameron rc = hpsa_pci_init(h); 8603105a3dbcSRobert Elliott if (rc) 86042946e82bSRobert Elliott goto clean2; /* lu, aer/h */ 8605edd16368SStephen M. Cameron 86062946e82bSRobert Elliott /* relies on h-> settings made by hpsa_pci_init, including 86072946e82bSRobert Elliott * interrupt_mode h->intr */ 86082946e82bSRobert Elliott rc = hpsa_scsi_host_alloc(h); 86092946e82bSRobert Elliott if (rc) 86102946e82bSRobert Elliott goto clean2_5; /* pci, lu, aer/h */ 86112946e82bSRobert Elliott 86122946e82bSRobert Elliott sprintf(h->devname, HPSA "%d", h->scsi_host->host_no); 8613edd16368SStephen M. Cameron h->ctlr = number_of_controllers; 8614edd16368SStephen M. Cameron number_of_controllers++; 8615edd16368SStephen M. Cameron 8616edd16368SStephen M. Cameron /* configure PCI DMA stuff */ 8617ecd9aad4SStephen M. Cameron rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 8618ecd9aad4SStephen M. Cameron if (rc == 0) { 8619edd16368SStephen M. Cameron dac = 1; 8620ecd9aad4SStephen M. Cameron } else { 8621ecd9aad4SStephen M. Cameron rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 8622ecd9aad4SStephen M. Cameron if (rc == 0) { 8623edd16368SStephen M. Cameron dac = 0; 8624ecd9aad4SStephen M. Cameron } else { 8625edd16368SStephen M. Cameron dev_err(&pdev->dev, "no suitable DMA available\n"); 86262946e82bSRobert Elliott goto clean3; /* shost, pci, lu, aer/h */ 8627edd16368SStephen M. Cameron } 8628ecd9aad4SStephen M. Cameron } 8629edd16368SStephen M. Cameron 8630edd16368SStephen M. Cameron /* make sure the board interrupts are off */ 8631edd16368SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 863210f66018SStephen M. Cameron 8633105a3dbcSRobert Elliott rc = hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx); 8634105a3dbcSRobert Elliott if (rc) 86352946e82bSRobert Elliott goto clean3; /* shost, pci, lu, aer/h */ 8636d37ffbe4SRobert Elliott rc = hpsa_alloc_cmd_pool(h); 86378947fd10SRobert Elliott if (rc) 86382946e82bSRobert Elliott goto clean4; /* irq, shost, pci, lu, aer/h */ 8639105a3dbcSRobert Elliott rc = hpsa_alloc_sg_chain_blocks(h); 8640105a3dbcSRobert Elliott if (rc) 86412946e82bSRobert Elliott goto clean5; /* cmd, irq, shost, pci, lu, aer/h */ 8642a08a8471SStephen M. Cameron init_waitqueue_head(&h->scan_wait_queue); 86439b5c48c2SStephen Cameron init_waitqueue_head(&h->abort_cmd_wait_queue); 8644d604f533SWebb Scales init_waitqueue_head(&h->event_sync_wait_queue); 8645d604f533SWebb Scales mutex_init(&h->reset_mutex); 8646a08a8471SStephen M. Cameron h->scan_finished = 1; /* no scan currently in progress */ 8647edd16368SStephen M. Cameron 8648edd16368SStephen M. Cameron pci_set_drvdata(pdev, h); 86499a41338eSStephen M. Cameron h->ndevices = 0; 86502946e82bSRobert Elliott 86519a41338eSStephen M. Cameron spin_lock_init(&h->devlock); 8652105a3dbcSRobert Elliott rc = hpsa_put_ctlr_into_performant_mode(h); 8653105a3dbcSRobert Elliott if (rc) 86542946e82bSRobert Elliott goto clean6; /* sg, cmd, irq, shost, pci, lu, aer/h */ 86552946e82bSRobert Elliott 86562efa5929SRobert Elliott /* create the resubmit workqueue */ 86572efa5929SRobert Elliott h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan"); 86582efa5929SRobert Elliott if (!h->rescan_ctlr_wq) { 86592efa5929SRobert Elliott rc = -ENOMEM; 86602efa5929SRobert Elliott goto clean7; 86612efa5929SRobert Elliott } 86622efa5929SRobert Elliott 86632efa5929SRobert Elliott h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit"); 86642efa5929SRobert Elliott if (!h->resubmit_wq) { 86652efa5929SRobert Elliott rc = -ENOMEM; 86662efa5929SRobert Elliott goto clean7; /* aer/h */ 86672efa5929SRobert Elliott } 866864670ac8SStephen M. Cameron 8669105a3dbcSRobert Elliott /* 8670105a3dbcSRobert Elliott * At this point, the controller is ready to take commands. 867164670ac8SStephen M. Cameron * Now, if reset_devices and the hard reset didn't work, try 867264670ac8SStephen M. Cameron * the soft reset and see if that works. 867364670ac8SStephen M. Cameron */ 867464670ac8SStephen M. Cameron if (try_soft_reset) { 867564670ac8SStephen M. Cameron 867664670ac8SStephen M. Cameron /* This is kind of gross. We may or may not get a completion 867764670ac8SStephen M. Cameron * from the soft reset command, and if we do, then the value 867864670ac8SStephen M. Cameron * from the fifo may or may not be valid. So, we wait 10 secs 867964670ac8SStephen M. Cameron * after the reset throwing away any completions we get during 868064670ac8SStephen M. Cameron * that time. Unregister the interrupt handler and register 868164670ac8SStephen M. Cameron * fake ones to scoop up any residual completions. 868264670ac8SStephen M. Cameron */ 868364670ac8SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 868464670ac8SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 868564670ac8SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 8686ec501a18SRobert Elliott hpsa_free_irqs(h); 86879ee61794SRobert Elliott rc = hpsa_request_irqs(h, hpsa_msix_discard_completions, 868864670ac8SStephen M. Cameron hpsa_intx_discard_completions); 868964670ac8SStephen M. Cameron if (rc) { 86909ee61794SRobert Elliott dev_warn(&h->pdev->dev, 86919ee61794SRobert Elliott "Failed to request_irq after soft reset.\n"); 8692d498757cSRobert Elliott /* 8693b2ef480cSRobert Elliott * cannot goto clean7 or free_irqs will be called 8694b2ef480cSRobert Elliott * again. Instead, do its work 8695b2ef480cSRobert Elliott */ 8696b2ef480cSRobert Elliott hpsa_free_performant_mode(h); /* clean7 */ 8697b2ef480cSRobert Elliott hpsa_free_sg_chain_blocks(h); /* clean6 */ 8698b2ef480cSRobert Elliott hpsa_free_cmd_pool(h); /* clean5 */ 8699b2ef480cSRobert Elliott /* 8700b2ef480cSRobert Elliott * skip hpsa_free_irqs(h) clean4 since that 8701b2ef480cSRobert Elliott * was just called before request_irqs failed 8702d498757cSRobert Elliott */ 8703d498757cSRobert Elliott goto clean3; 870464670ac8SStephen M. Cameron } 870564670ac8SStephen M. Cameron 870664670ac8SStephen M. Cameron rc = hpsa_kdump_soft_reset(h); 870764670ac8SStephen M. Cameron if (rc) 870864670ac8SStephen M. Cameron /* Neither hard nor soft reset worked, we're hosed. */ 87097ef7323fSDon Brace goto clean7; 871064670ac8SStephen M. Cameron 871164670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Board READY.\n"); 871264670ac8SStephen M. Cameron dev_info(&h->pdev->dev, 871364670ac8SStephen M. Cameron "Waiting for stale completions to drain.\n"); 871464670ac8SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_ON); 871564670ac8SStephen M. Cameron msleep(10000); 871664670ac8SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 871764670ac8SStephen M. Cameron 871864670ac8SStephen M. Cameron rc = controller_reset_failed(h->cfgtable); 871964670ac8SStephen M. Cameron if (rc) 872064670ac8SStephen M. Cameron dev_info(&h->pdev->dev, 872164670ac8SStephen M. Cameron "Soft reset appears to have failed.\n"); 872264670ac8SStephen M. Cameron 872364670ac8SStephen M. Cameron /* since the controller's reset, we have to go back and re-init 872464670ac8SStephen M. Cameron * everything. Easiest to just forget what we've done and do it 872564670ac8SStephen M. Cameron * all over again. 872664670ac8SStephen M. Cameron */ 872764670ac8SStephen M. Cameron hpsa_undo_allocations_after_kdump_soft_reset(h); 872864670ac8SStephen M. Cameron try_soft_reset = 0; 872964670ac8SStephen M. Cameron if (rc) 8730b2ef480cSRobert Elliott /* don't goto clean, we already unallocated */ 873164670ac8SStephen M. Cameron return -ENODEV; 873264670ac8SStephen M. Cameron 873364670ac8SStephen M. Cameron goto reinit_after_soft_reset; 873464670ac8SStephen M. Cameron } 8735edd16368SStephen M. Cameron 8736da0697bdSScott Teel /* Enable Accelerated IO path at driver layer */ 8737da0697bdSScott Teel h->acciopath_status = 1; 873834592254SScott Teel /* Disable discovery polling.*/ 873934592254SScott Teel h->discovery_polling = 0; 8740da0697bdSScott Teel 8741e863d68eSScott Teel 8742edd16368SStephen M. Cameron /* Turn the interrupts on so we can service requests */ 8743edd16368SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_ON); 8744edd16368SStephen M. Cameron 8745339b2b14SStephen M. Cameron hpsa_hba_inquiry(h); 87468a98db73SStephen M. Cameron 874734592254SScott Teel h->lastlogicals = kzalloc(sizeof(*(h->lastlogicals)), GFP_KERNEL); 874834592254SScott Teel if (!h->lastlogicals) 874934592254SScott Teel dev_info(&h->pdev->dev, 875034592254SScott Teel "Can't track change to report lun data\n"); 875134592254SScott Teel 8752cf477237SDon Brace /* hook into SCSI subsystem */ 8753cf477237SDon Brace rc = hpsa_scsi_add_host(h); 8754cf477237SDon Brace if (rc) 8755cf477237SDon Brace goto clean7; /* perf, sg, cmd, irq, shost, pci, lu, aer/h */ 8756cf477237SDon Brace 87578a98db73SStephen M. Cameron /* Monitor the controller for firmware lockups */ 87588a98db73SStephen M. Cameron h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 87598a98db73SStephen M. Cameron INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker); 87608a98db73SStephen M. Cameron schedule_delayed_work(&h->monitor_ctlr_work, 87618a98db73SStephen M. Cameron h->heartbeat_sample_interval); 87626636e7f4SDon Brace INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker); 87636636e7f4SDon Brace queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work, 87646636e7f4SDon Brace h->heartbeat_sample_interval); 876588bf6d62SStephen M. Cameron return 0; 8766edd16368SStephen M. Cameron 87672946e82bSRobert Elliott clean7: /* perf, sg, cmd, irq, shost, pci, lu, aer/h */ 8768105a3dbcSRobert Elliott hpsa_free_performant_mode(h); 8769105a3dbcSRobert Elliott h->access.set_intr_mask(h, HPSA_INTR_OFF); 8770105a3dbcSRobert Elliott clean6: /* sg, cmd, irq, pci, lockup, wq/aer/h */ 877133a2ffceSStephen M. Cameron hpsa_free_sg_chain_blocks(h); 87722946e82bSRobert Elliott clean5: /* cmd, irq, shost, pci, lu, aer/h */ 87732e9d1b36SStephen M. Cameron hpsa_free_cmd_pool(h); 87742946e82bSRobert Elliott clean4: /* irq, shost, pci, lu, aer/h */ 8775ec501a18SRobert Elliott hpsa_free_irqs(h); 87762946e82bSRobert Elliott clean3: /* shost, pci, lu, aer/h */ 87772946e82bSRobert Elliott scsi_host_put(h->scsi_host); 87782946e82bSRobert Elliott h->scsi_host = NULL; 87792946e82bSRobert Elliott clean2_5: /* pci, lu, aer/h */ 8780195f2c65SRobert Elliott hpsa_free_pci_init(h); 87812946e82bSRobert Elliott clean2: /* lu, aer/h */ 8782105a3dbcSRobert Elliott if (h->lockup_detected) { 8783094963daSStephen M. Cameron free_percpu(h->lockup_detected); 8784105a3dbcSRobert Elliott h->lockup_detected = NULL; 8785105a3dbcSRobert Elliott } 8786105a3dbcSRobert Elliott clean1: /* wq/aer/h */ 8787105a3dbcSRobert Elliott if (h->resubmit_wq) { 8788105a3dbcSRobert Elliott destroy_workqueue(h->resubmit_wq); 8789105a3dbcSRobert Elliott h->resubmit_wq = NULL; 8790105a3dbcSRobert Elliott } 8791105a3dbcSRobert Elliott if (h->rescan_ctlr_wq) { 8792105a3dbcSRobert Elliott destroy_workqueue(h->rescan_ctlr_wq); 8793105a3dbcSRobert Elliott h->rescan_ctlr_wq = NULL; 8794105a3dbcSRobert Elliott } 8795edd16368SStephen M. Cameron kfree(h); 8796ecd9aad4SStephen M. Cameron return rc; 8797edd16368SStephen M. Cameron } 8798edd16368SStephen M. Cameron 8799edd16368SStephen M. Cameron static void hpsa_flush_cache(struct ctlr_info *h) 8800edd16368SStephen M. Cameron { 8801edd16368SStephen M. Cameron char *flush_buf; 8802edd16368SStephen M. Cameron struct CommandList *c; 880325163bd5SWebb Scales int rc; 8804702890e3SStephen M. Cameron 8805094963daSStephen M. Cameron if (unlikely(lockup_detected(h))) 8806702890e3SStephen M. Cameron return; 8807edd16368SStephen M. Cameron flush_buf = kzalloc(4, GFP_KERNEL); 8808edd16368SStephen M. Cameron if (!flush_buf) 8809edd16368SStephen M. Cameron return; 8810edd16368SStephen M. Cameron 881145fcb86eSStephen Cameron c = cmd_alloc(h); 8812bf43caf3SRobert Elliott 8813a2dac136SStephen M. Cameron if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0, 8814a2dac136SStephen M. Cameron RAID_CTLR_LUNID, TYPE_CMD)) { 8815a2dac136SStephen M. Cameron goto out; 8816a2dac136SStephen M. Cameron } 881725163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 8818c448ecfaSDon Brace PCI_DMA_TODEVICE, DEFAULT_TIMEOUT); 881925163bd5SWebb Scales if (rc) 882025163bd5SWebb Scales goto out; 8821edd16368SStephen M. Cameron if (c->err_info->CommandStatus != 0) 8822a2dac136SStephen M. Cameron out: 8823edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 8824edd16368SStephen M. Cameron "error flushing cache on controller\n"); 882545fcb86eSStephen Cameron cmd_free(h, c); 8826edd16368SStephen M. Cameron kfree(flush_buf); 8827edd16368SStephen M. Cameron } 8828edd16368SStephen M. Cameron 8829c2adae44SScott Teel /* Make controller gather fresh report lun data each time we 8830c2adae44SScott Teel * send down a report luns request 8831c2adae44SScott Teel */ 8832c2adae44SScott Teel static void hpsa_disable_rld_caching(struct ctlr_info *h) 8833c2adae44SScott Teel { 8834c2adae44SScott Teel u32 *options; 8835c2adae44SScott Teel struct CommandList *c; 8836c2adae44SScott Teel int rc; 8837c2adae44SScott Teel 8838c2adae44SScott Teel /* Don't bother trying to set diag options if locked up */ 8839c2adae44SScott Teel if (unlikely(h->lockup_detected)) 8840c2adae44SScott Teel return; 8841c2adae44SScott Teel 8842c2adae44SScott Teel options = kzalloc(sizeof(*options), GFP_KERNEL); 8843c2adae44SScott Teel if (!options) { 8844c2adae44SScott Teel dev_err(&h->pdev->dev, 8845c2adae44SScott Teel "Error: failed to disable rld caching, during alloc.\n"); 8846c2adae44SScott Teel return; 8847c2adae44SScott Teel } 8848c2adae44SScott Teel 8849c2adae44SScott Teel c = cmd_alloc(h); 8850c2adae44SScott Teel 8851c2adae44SScott Teel /* first, get the current diag options settings */ 8852c2adae44SScott Teel if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0, 8853c2adae44SScott Teel RAID_CTLR_LUNID, TYPE_CMD)) 8854c2adae44SScott Teel goto errout; 8855c2adae44SScott Teel 8856c2adae44SScott Teel rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 8857c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 8858c2adae44SScott Teel if ((rc != 0) || (c->err_info->CommandStatus != 0)) 8859c2adae44SScott Teel goto errout; 8860c2adae44SScott Teel 8861c2adae44SScott Teel /* Now, set the bit for disabling the RLD caching */ 8862c2adae44SScott Teel *options |= HPSA_DIAG_OPTS_DISABLE_RLD_CACHING; 8863c2adae44SScott Teel 8864c2adae44SScott Teel if (fill_cmd(c, BMIC_SET_DIAG_OPTIONS, h, options, 4, 0, 8865c2adae44SScott Teel RAID_CTLR_LUNID, TYPE_CMD)) 8866c2adae44SScott Teel goto errout; 8867c2adae44SScott Teel 8868c2adae44SScott Teel rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 8869c448ecfaSDon Brace PCI_DMA_TODEVICE, DEFAULT_TIMEOUT); 8870c2adae44SScott Teel if ((rc != 0) || (c->err_info->CommandStatus != 0)) 8871c2adae44SScott Teel goto errout; 8872c2adae44SScott Teel 8873c2adae44SScott Teel /* Now verify that it got set: */ 8874c2adae44SScott Teel if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0, 8875c2adae44SScott Teel RAID_CTLR_LUNID, TYPE_CMD)) 8876c2adae44SScott Teel goto errout; 8877c2adae44SScott Teel 8878c2adae44SScott Teel rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 8879c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 8880c2adae44SScott Teel if ((rc != 0) || (c->err_info->CommandStatus != 0)) 8881c2adae44SScott Teel goto errout; 8882c2adae44SScott Teel 8883d8a080c3SDan Carpenter if (*options & HPSA_DIAG_OPTS_DISABLE_RLD_CACHING) 8884c2adae44SScott Teel goto out; 8885c2adae44SScott Teel 8886c2adae44SScott Teel errout: 8887c2adae44SScott Teel dev_err(&h->pdev->dev, 8888c2adae44SScott Teel "Error: failed to disable report lun data caching.\n"); 8889c2adae44SScott Teel out: 8890c2adae44SScott Teel cmd_free(h, c); 8891c2adae44SScott Teel kfree(options); 8892c2adae44SScott Teel } 8893c2adae44SScott Teel 8894edd16368SStephen M. Cameron static void hpsa_shutdown(struct pci_dev *pdev) 8895edd16368SStephen M. Cameron { 8896edd16368SStephen M. Cameron struct ctlr_info *h; 8897edd16368SStephen M. Cameron 8898edd16368SStephen M. Cameron h = pci_get_drvdata(pdev); 8899edd16368SStephen M. Cameron /* Turn board interrupts off and send the flush cache command 8900edd16368SStephen M. Cameron * sendcmd will turn off interrupt, and send the flush... 8901edd16368SStephen M. Cameron * To write all data in the battery backed cache to disks 8902edd16368SStephen M. Cameron */ 8903edd16368SStephen M. Cameron hpsa_flush_cache(h); 8904edd16368SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 8905105a3dbcSRobert Elliott hpsa_free_irqs(h); /* init_one 4 */ 8906cc64c817SRobert Elliott hpsa_disable_interrupt_mode(h); /* pci_init 2 */ 8907edd16368SStephen M. Cameron } 8908edd16368SStephen M. Cameron 89096f039790SGreg Kroah-Hartman static void hpsa_free_device_info(struct ctlr_info *h) 891055e14e76SStephen M. Cameron { 891155e14e76SStephen M. Cameron int i; 891255e14e76SStephen M. Cameron 8913105a3dbcSRobert Elliott for (i = 0; i < h->ndevices; i++) { 891455e14e76SStephen M. Cameron kfree(h->dev[i]); 8915105a3dbcSRobert Elliott h->dev[i] = NULL; 8916105a3dbcSRobert Elliott } 891755e14e76SStephen M. Cameron } 891855e14e76SStephen M. Cameron 89196f039790SGreg Kroah-Hartman static void hpsa_remove_one(struct pci_dev *pdev) 8920edd16368SStephen M. Cameron { 8921edd16368SStephen M. Cameron struct ctlr_info *h; 89228a98db73SStephen M. Cameron unsigned long flags; 8923edd16368SStephen M. Cameron 8924edd16368SStephen M. Cameron if (pci_get_drvdata(pdev) == NULL) { 8925edd16368SStephen M. Cameron dev_err(&pdev->dev, "unable to remove device\n"); 8926edd16368SStephen M. Cameron return; 8927edd16368SStephen M. Cameron } 8928edd16368SStephen M. Cameron h = pci_get_drvdata(pdev); 89298a98db73SStephen M. Cameron 89308a98db73SStephen M. Cameron /* Get rid of any controller monitoring work items */ 89318a98db73SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 89328a98db73SStephen M. Cameron h->remove_in_progress = 1; 89338a98db73SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 89346636e7f4SDon Brace cancel_delayed_work_sync(&h->monitor_ctlr_work); 89356636e7f4SDon Brace cancel_delayed_work_sync(&h->rescan_ctlr_work); 89366636e7f4SDon Brace destroy_workqueue(h->rescan_ctlr_wq); 89376636e7f4SDon Brace destroy_workqueue(h->resubmit_wq); 8938cc64c817SRobert Elliott 89392d041306SDon Brace /* 89402d041306SDon Brace * Call before disabling interrupts. 89412d041306SDon Brace * scsi_remove_host can trigger I/O operations especially 89422d041306SDon Brace * when multipath is enabled. There can be SYNCHRONIZE CACHE 89432d041306SDon Brace * operations which cannot complete and will hang the system. 89442d041306SDon Brace */ 89452d041306SDon Brace if (h->scsi_host) 89462d041306SDon Brace scsi_remove_host(h->scsi_host); /* init_one 8 */ 8947105a3dbcSRobert Elliott /* includes hpsa_free_irqs - init_one 4 */ 8948195f2c65SRobert Elliott /* includes hpsa_disable_interrupt_mode - pci_init 2 */ 8949edd16368SStephen M. Cameron hpsa_shutdown(pdev); 8950cc64c817SRobert Elliott 8951105a3dbcSRobert Elliott hpsa_free_device_info(h); /* scan */ 8952105a3dbcSRobert Elliott 89532946e82bSRobert Elliott kfree(h->hba_inquiry_data); /* init_one 10 */ 89542946e82bSRobert Elliott h->hba_inquiry_data = NULL; /* init_one 10 */ 89552946e82bSRobert Elliott hpsa_free_ioaccel2_sg_chain_blocks(h); 8956105a3dbcSRobert Elliott hpsa_free_performant_mode(h); /* init_one 7 */ 8957105a3dbcSRobert Elliott hpsa_free_sg_chain_blocks(h); /* init_one 6 */ 89581fb7c98aSRobert Elliott hpsa_free_cmd_pool(h); /* init_one 5 */ 895934592254SScott Teel kfree(h->lastlogicals); 8960105a3dbcSRobert Elliott 8961105a3dbcSRobert Elliott /* hpsa_free_irqs already called via hpsa_shutdown init_one 4 */ 8962195f2c65SRobert Elliott 89632946e82bSRobert Elliott scsi_host_put(h->scsi_host); /* init_one 3 */ 89642946e82bSRobert Elliott h->scsi_host = NULL; /* init_one 3 */ 89652946e82bSRobert Elliott 8966195f2c65SRobert Elliott /* includes hpsa_disable_interrupt_mode - pci_init 2 */ 89672946e82bSRobert Elliott hpsa_free_pci_init(h); /* init_one 2.5 */ 8968195f2c65SRobert Elliott 8969105a3dbcSRobert Elliott free_percpu(h->lockup_detected); /* init_one 2 */ 8970105a3dbcSRobert Elliott h->lockup_detected = NULL; /* init_one 2 */ 8971105a3dbcSRobert Elliott /* (void) pci_disable_pcie_error_reporting(pdev); */ /* init_one 1 */ 8972d04e62b9SKevin Barnett 8973d04e62b9SKevin Barnett hpsa_delete_sas_host(h); 8974d04e62b9SKevin Barnett 8975105a3dbcSRobert Elliott kfree(h); /* init_one 1 */ 8976edd16368SStephen M. Cameron } 8977edd16368SStephen M. Cameron 8978edd16368SStephen M. Cameron static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev, 8979edd16368SStephen M. Cameron __attribute__((unused)) pm_message_t state) 8980edd16368SStephen M. Cameron { 8981edd16368SStephen M. Cameron return -ENOSYS; 8982edd16368SStephen M. Cameron } 8983edd16368SStephen M. Cameron 8984edd16368SStephen M. Cameron static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev) 8985edd16368SStephen M. Cameron { 8986edd16368SStephen M. Cameron return -ENOSYS; 8987edd16368SStephen M. Cameron } 8988edd16368SStephen M. Cameron 8989edd16368SStephen M. Cameron static struct pci_driver hpsa_pci_driver = { 8990f79cfec6SStephen M. Cameron .name = HPSA, 8991edd16368SStephen M. Cameron .probe = hpsa_init_one, 89926f039790SGreg Kroah-Hartman .remove = hpsa_remove_one, 8993edd16368SStephen M. Cameron .id_table = hpsa_pci_device_id, /* id_table */ 8994edd16368SStephen M. Cameron .shutdown = hpsa_shutdown, 8995edd16368SStephen M. Cameron .suspend = hpsa_suspend, 8996edd16368SStephen M. Cameron .resume = hpsa_resume, 8997edd16368SStephen M. Cameron }; 8998edd16368SStephen M. Cameron 8999303932fdSDon Brace /* Fill in bucket_map[], given nsgs (the max number of 9000303932fdSDon Brace * scatter gather elements supported) and bucket[], 9001303932fdSDon Brace * which is an array of 8 integers. The bucket[] array 9002303932fdSDon Brace * contains 8 different DMA transfer sizes (in 16 9003303932fdSDon Brace * byte increments) which the controller uses to fetch 9004303932fdSDon Brace * commands. This function fills in bucket_map[], which 9005303932fdSDon Brace * maps a given number of scatter gather elements to one of 9006303932fdSDon Brace * the 8 DMA transfer sizes. The point of it is to allow the 9007303932fdSDon Brace * controller to only do as much DMA as needed to fetch the 9008303932fdSDon Brace * command, with the DMA transfer size encoded in the lower 9009303932fdSDon Brace * bits of the command address. 9010303932fdSDon Brace */ 9011303932fdSDon Brace static void calc_bucket_map(int bucket[], int num_buckets, 90122b08b3e9SDon Brace int nsgs, int min_blocks, u32 *bucket_map) 9013303932fdSDon Brace { 9014303932fdSDon Brace int i, j, b, size; 9015303932fdSDon Brace 9016303932fdSDon Brace /* Note, bucket_map must have nsgs+1 entries. */ 9017303932fdSDon Brace for (i = 0; i <= nsgs; i++) { 9018303932fdSDon Brace /* Compute size of a command with i SG entries */ 9019e1f7de0cSMatt Gates size = i + min_blocks; 9020303932fdSDon Brace b = num_buckets; /* Assume the biggest bucket */ 9021303932fdSDon Brace /* Find the bucket that is just big enough */ 9022e1f7de0cSMatt Gates for (j = 0; j < num_buckets; j++) { 9023303932fdSDon Brace if (bucket[j] >= size) { 9024303932fdSDon Brace b = j; 9025303932fdSDon Brace break; 9026303932fdSDon Brace } 9027303932fdSDon Brace } 9028303932fdSDon Brace /* for a command with i SG entries, use bucket b. */ 9029303932fdSDon Brace bucket_map[i] = b; 9030303932fdSDon Brace } 9031303932fdSDon Brace } 9032303932fdSDon Brace 9033105a3dbcSRobert Elliott /* 9034105a3dbcSRobert Elliott * return -ENODEV on err, 0 on success (or no action) 9035105a3dbcSRobert Elliott * allocates numerous items that must be freed later 9036105a3dbcSRobert Elliott */ 9037c706a795SRobert Elliott static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support) 9038303932fdSDon Brace { 90396c311b57SStephen M. Cameron int i; 90406c311b57SStephen M. Cameron unsigned long register_value; 9041e1f7de0cSMatt Gates unsigned long transMethod = CFGTBL_Trans_Performant | 9042e1f7de0cSMatt Gates (trans_support & CFGTBL_Trans_use_short_tags) | 9043e1f7de0cSMatt Gates CFGTBL_Trans_enable_directed_msix | 9044b9af4937SStephen M. Cameron (trans_support & (CFGTBL_Trans_io_accel1 | 9045b9af4937SStephen M. Cameron CFGTBL_Trans_io_accel2)); 9046e1f7de0cSMatt Gates struct access_method access = SA5_performant_access; 9047def342bdSStephen M. Cameron 9048def342bdSStephen M. Cameron /* This is a bit complicated. There are 8 registers on 9049def342bdSStephen M. Cameron * the controller which we write to to tell it 8 different 9050def342bdSStephen M. Cameron * sizes of commands which there may be. It's a way of 9051def342bdSStephen M. Cameron * reducing the DMA done to fetch each command. Encoded into 9052def342bdSStephen M. Cameron * each command's tag are 3 bits which communicate to the controller 9053def342bdSStephen M. Cameron * which of the eight sizes that command fits within. The size of 9054def342bdSStephen M. Cameron * each command depends on how many scatter gather entries there are. 9055def342bdSStephen M. Cameron * Each SG entry requires 16 bytes. The eight registers are programmed 9056def342bdSStephen M. Cameron * with the number of 16-byte blocks a command of that size requires. 9057def342bdSStephen M. Cameron * The smallest command possible requires 5 such 16 byte blocks. 9058d66ae08bSStephen M. Cameron * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte 9059def342bdSStephen M. Cameron * blocks. Note, this only extends to the SG entries contained 9060def342bdSStephen M. Cameron * within the command block, and does not extend to chained blocks 9061def342bdSStephen M. Cameron * of SG elements. bft[] contains the eight values we write to 9062def342bdSStephen M. Cameron * the registers. They are not evenly distributed, but have more 9063def342bdSStephen M. Cameron * sizes for small commands, and fewer sizes for larger commands. 9064def342bdSStephen M. Cameron */ 9065d66ae08bSStephen M. Cameron int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4}; 9066b9af4937SStephen M. Cameron #define MIN_IOACCEL2_BFT_ENTRY 5 9067b9af4937SStephen M. Cameron #define HPSA_IOACCEL2_HEADER_SZ 4 9068b9af4937SStephen M. Cameron int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12, 9069b9af4937SStephen M. Cameron 13, 14, 15, 16, 17, 18, 19, 9070b9af4937SStephen M. Cameron HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES}; 9071b9af4937SStephen M. Cameron BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16); 9072b9af4937SStephen M. Cameron BUILD_BUG_ON(ARRAY_SIZE(bft) != 8); 9073b9af4937SStephen M. Cameron BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) > 9074b9af4937SStephen M. Cameron 16 * MIN_IOACCEL2_BFT_ENTRY); 9075b9af4937SStephen M. Cameron BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16); 9076d66ae08bSStephen M. Cameron BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4); 9077303932fdSDon Brace /* 5 = 1 s/g entry or 4k 9078303932fdSDon Brace * 6 = 2 s/g entry or 8k 9079303932fdSDon Brace * 8 = 4 s/g entry or 16k 9080303932fdSDon Brace * 10 = 6 s/g entry or 24k 9081303932fdSDon Brace */ 9082303932fdSDon Brace 9083b3a52e79SStephen M. Cameron /* If the controller supports either ioaccel method then 9084b3a52e79SStephen M. Cameron * we can also use the RAID stack submit path that does not 9085b3a52e79SStephen M. Cameron * perform the superfluous readl() after each command submission. 9086b3a52e79SStephen M. Cameron */ 9087b3a52e79SStephen M. Cameron if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2)) 9088b3a52e79SStephen M. Cameron access = SA5_performant_access_no_read; 9089b3a52e79SStephen M. Cameron 9090303932fdSDon Brace /* Controller spec: zero out this buffer. */ 9091072b0518SStephen M. Cameron for (i = 0; i < h->nreply_queues; i++) 9092072b0518SStephen M. Cameron memset(h->reply_queue[i].head, 0, h->reply_queue_size); 9093303932fdSDon Brace 9094d66ae08bSStephen M. Cameron bft[7] = SG_ENTRIES_IN_CMD + 4; 9095d66ae08bSStephen M. Cameron calc_bucket_map(bft, ARRAY_SIZE(bft), 9096e1f7de0cSMatt Gates SG_ENTRIES_IN_CMD, 4, h->blockFetchTable); 9097303932fdSDon Brace for (i = 0; i < 8; i++) 9098303932fdSDon Brace writel(bft[i], &h->transtable->BlockFetch[i]); 9099303932fdSDon Brace 9100303932fdSDon Brace /* size of controller ring buffer */ 9101303932fdSDon Brace writel(h->max_commands, &h->transtable->RepQSize); 9102254f796bSMatt Gates writel(h->nreply_queues, &h->transtable->RepQCount); 9103303932fdSDon Brace writel(0, &h->transtable->RepQCtrAddrLow32); 9104303932fdSDon Brace writel(0, &h->transtable->RepQCtrAddrHigh32); 9105254f796bSMatt Gates 9106254f796bSMatt Gates for (i = 0; i < h->nreply_queues; i++) { 9107254f796bSMatt Gates writel(0, &h->transtable->RepQAddr[i].upper); 9108072b0518SStephen M. Cameron writel(h->reply_queue[i].busaddr, 9109254f796bSMatt Gates &h->transtable->RepQAddr[i].lower); 9110254f796bSMatt Gates } 9111254f796bSMatt Gates 9112b9af4937SStephen M. Cameron writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi); 9113e1f7de0cSMatt Gates writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest)); 9114e1f7de0cSMatt Gates /* 9115e1f7de0cSMatt Gates * enable outbound interrupt coalescing in accelerator mode; 9116e1f7de0cSMatt Gates */ 9117e1f7de0cSMatt Gates if (trans_support & CFGTBL_Trans_io_accel1) { 9118e1f7de0cSMatt Gates access = SA5_ioaccel_mode1_access; 9119e1f7de0cSMatt Gates writel(10, &h->cfgtable->HostWrite.CoalIntDelay); 9120e1f7de0cSMatt Gates writel(4, &h->cfgtable->HostWrite.CoalIntCount); 9121c349775eSScott Teel } else { 9122c349775eSScott Teel if (trans_support & CFGTBL_Trans_io_accel2) { 9123c349775eSScott Teel access = SA5_ioaccel_mode2_access; 9124c349775eSScott Teel writel(10, &h->cfgtable->HostWrite.CoalIntDelay); 9125c349775eSScott Teel writel(4, &h->cfgtable->HostWrite.CoalIntCount); 9126c349775eSScott Teel } 9127e1f7de0cSMatt Gates } 9128303932fdSDon Brace writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 9129c706a795SRobert Elliott if (hpsa_wait_for_mode_change_ack(h)) { 9130c706a795SRobert Elliott dev_err(&h->pdev->dev, 9131c706a795SRobert Elliott "performant mode problem - doorbell timeout\n"); 9132c706a795SRobert Elliott return -ENODEV; 9133c706a795SRobert Elliott } 9134303932fdSDon Brace register_value = readl(&(h->cfgtable->TransportActive)); 9135303932fdSDon Brace if (!(register_value & CFGTBL_Trans_Performant)) { 9136050f7147SStephen Cameron dev_err(&h->pdev->dev, 9137050f7147SStephen Cameron "performant mode problem - transport not active\n"); 9138c706a795SRobert Elliott return -ENODEV; 9139303932fdSDon Brace } 9140960a30e7SStephen M. Cameron /* Change the access methods to the performant access methods */ 9141e1f7de0cSMatt Gates h->access = access; 9142e1f7de0cSMatt Gates h->transMethod = transMethod; 9143e1f7de0cSMatt Gates 9144b9af4937SStephen M. Cameron if (!((trans_support & CFGTBL_Trans_io_accel1) || 9145b9af4937SStephen M. Cameron (trans_support & CFGTBL_Trans_io_accel2))) 9146c706a795SRobert Elliott return 0; 9147e1f7de0cSMatt Gates 9148b9af4937SStephen M. Cameron if (trans_support & CFGTBL_Trans_io_accel1) { 9149e1f7de0cSMatt Gates /* Set up I/O accelerator mode */ 9150e1f7de0cSMatt Gates for (i = 0; i < h->nreply_queues; i++) { 9151e1f7de0cSMatt Gates writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX); 9152e1f7de0cSMatt Gates h->reply_queue[i].current_entry = 9153e1f7de0cSMatt Gates readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX); 9154e1f7de0cSMatt Gates } 9155283b4a9bSStephen M. Cameron bft[7] = h->ioaccel_maxsg + 8; 9156283b4a9bSStephen M. Cameron calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8, 9157e1f7de0cSMatt Gates h->ioaccel1_blockFetchTable); 9158e1f7de0cSMatt Gates 9159e1f7de0cSMatt Gates /* initialize all reply queue entries to unused */ 9160072b0518SStephen M. Cameron for (i = 0; i < h->nreply_queues; i++) 9161072b0518SStephen M. Cameron memset(h->reply_queue[i].head, 9162072b0518SStephen M. Cameron (u8) IOACCEL_MODE1_REPLY_UNUSED, 9163072b0518SStephen M. Cameron h->reply_queue_size); 9164e1f7de0cSMatt Gates 9165e1f7de0cSMatt Gates /* set all the constant fields in the accelerator command 9166e1f7de0cSMatt Gates * frames once at init time to save CPU cycles later. 9167e1f7de0cSMatt Gates */ 9168e1f7de0cSMatt Gates for (i = 0; i < h->nr_cmds; i++) { 9169e1f7de0cSMatt Gates struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i]; 9170e1f7de0cSMatt Gates 9171e1f7de0cSMatt Gates cp->function = IOACCEL1_FUNCTION_SCSIIO; 9172e1f7de0cSMatt Gates cp->err_info = (u32) (h->errinfo_pool_dhandle + 9173e1f7de0cSMatt Gates (i * sizeof(struct ErrorInfo))); 9174e1f7de0cSMatt Gates cp->err_info_len = sizeof(struct ErrorInfo); 9175e1f7de0cSMatt Gates cp->sgl_offset = IOACCEL1_SGLOFFSET; 91762b08b3e9SDon Brace cp->host_context_flags = 91772b08b3e9SDon Brace cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT); 9178e1f7de0cSMatt Gates cp->timeout_sec = 0; 9179e1f7de0cSMatt Gates cp->ReplyQueue = 0; 918050a0decfSStephen M. Cameron cp->tag = 9181f2405db8SDon Brace cpu_to_le64((i << DIRECT_LOOKUP_SHIFT)); 918250a0decfSStephen M. Cameron cp->host_addr = 918350a0decfSStephen M. Cameron cpu_to_le64(h->ioaccel_cmd_pool_dhandle + 9184e1f7de0cSMatt Gates (i * sizeof(struct io_accel1_cmd))); 9185e1f7de0cSMatt Gates } 9186b9af4937SStephen M. Cameron } else if (trans_support & CFGTBL_Trans_io_accel2) { 9187b9af4937SStephen M. Cameron u64 cfg_offset, cfg_base_addr_index; 9188b9af4937SStephen M. Cameron u32 bft2_offset, cfg_base_addr; 9189b9af4937SStephen M. Cameron int rc; 9190b9af4937SStephen M. Cameron 9191b9af4937SStephen M. Cameron rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 9192b9af4937SStephen M. Cameron &cfg_base_addr_index, &cfg_offset); 9193b9af4937SStephen M. Cameron BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64); 9194b9af4937SStephen M. Cameron bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ; 9195b9af4937SStephen M. Cameron calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg, 9196b9af4937SStephen M. Cameron 4, h->ioaccel2_blockFetchTable); 9197b9af4937SStephen M. Cameron bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset); 9198b9af4937SStephen M. Cameron BUILD_BUG_ON(offsetof(struct CfgTable, 9199b9af4937SStephen M. Cameron io_accel_request_size_offset) != 0xb8); 9200b9af4937SStephen M. Cameron h->ioaccel2_bft2_regs = 9201b9af4937SStephen M. Cameron remap_pci_mem(pci_resource_start(h->pdev, 9202b9af4937SStephen M. Cameron cfg_base_addr_index) + 9203b9af4937SStephen M. Cameron cfg_offset + bft2_offset, 9204b9af4937SStephen M. Cameron ARRAY_SIZE(bft2) * 9205b9af4937SStephen M. Cameron sizeof(*h->ioaccel2_bft2_regs)); 9206b9af4937SStephen M. Cameron for (i = 0; i < ARRAY_SIZE(bft2); i++) 9207b9af4937SStephen M. Cameron writel(bft2[i], &h->ioaccel2_bft2_regs[i]); 9208b9af4937SStephen M. Cameron } 9209b9af4937SStephen M. Cameron writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 9210c706a795SRobert Elliott if (hpsa_wait_for_mode_change_ack(h)) { 9211c706a795SRobert Elliott dev_err(&h->pdev->dev, 9212c706a795SRobert Elliott "performant mode problem - enabling ioaccel mode\n"); 9213c706a795SRobert Elliott return -ENODEV; 9214c706a795SRobert Elliott } 9215c706a795SRobert Elliott return 0; 9216e1f7de0cSMatt Gates } 9217e1f7de0cSMatt Gates 92181fb7c98aSRobert Elliott /* Free ioaccel1 mode command blocks and block fetch table */ 92191fb7c98aSRobert Elliott static void hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info *h) 92201fb7c98aSRobert Elliott { 9221105a3dbcSRobert Elliott if (h->ioaccel_cmd_pool) { 92221fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 92231fb7c98aSRobert Elliott h->nr_cmds * sizeof(*h->ioaccel_cmd_pool), 92241fb7c98aSRobert Elliott h->ioaccel_cmd_pool, 92251fb7c98aSRobert Elliott h->ioaccel_cmd_pool_dhandle); 9226105a3dbcSRobert Elliott h->ioaccel_cmd_pool = NULL; 9227105a3dbcSRobert Elliott h->ioaccel_cmd_pool_dhandle = 0; 9228105a3dbcSRobert Elliott } 92291fb7c98aSRobert Elliott kfree(h->ioaccel1_blockFetchTable); 9230105a3dbcSRobert Elliott h->ioaccel1_blockFetchTable = NULL; 92311fb7c98aSRobert Elliott } 92321fb7c98aSRobert Elliott 9233d37ffbe4SRobert Elliott /* Allocate ioaccel1 mode command blocks and block fetch table */ 9234d37ffbe4SRobert Elliott static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h) 9235e1f7de0cSMatt Gates { 9236283b4a9bSStephen M. Cameron h->ioaccel_maxsg = 9237283b4a9bSStephen M. Cameron readl(&(h->cfgtable->io_accel_max_embedded_sg_count)); 9238283b4a9bSStephen M. Cameron if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES) 9239283b4a9bSStephen M. Cameron h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES; 9240283b4a9bSStephen M. Cameron 9241e1f7de0cSMatt Gates /* Command structures must be aligned on a 128-byte boundary 9242e1f7de0cSMatt Gates * because the 7 lower bits of the address are used by the 9243e1f7de0cSMatt Gates * hardware. 9244e1f7de0cSMatt Gates */ 9245e1f7de0cSMatt Gates BUILD_BUG_ON(sizeof(struct io_accel1_cmd) % 9246e1f7de0cSMatt Gates IOACCEL1_COMMANDLIST_ALIGNMENT); 9247e1f7de0cSMatt Gates h->ioaccel_cmd_pool = 9248e1f7de0cSMatt Gates pci_alloc_consistent(h->pdev, 9249e1f7de0cSMatt Gates h->nr_cmds * sizeof(*h->ioaccel_cmd_pool), 9250e1f7de0cSMatt Gates &(h->ioaccel_cmd_pool_dhandle)); 9251e1f7de0cSMatt Gates 9252e1f7de0cSMatt Gates h->ioaccel1_blockFetchTable = 9253283b4a9bSStephen M. Cameron kmalloc(((h->ioaccel_maxsg + 1) * 9254e1f7de0cSMatt Gates sizeof(u32)), GFP_KERNEL); 9255e1f7de0cSMatt Gates 9256e1f7de0cSMatt Gates if ((h->ioaccel_cmd_pool == NULL) || 9257e1f7de0cSMatt Gates (h->ioaccel1_blockFetchTable == NULL)) 9258e1f7de0cSMatt Gates goto clean_up; 9259e1f7de0cSMatt Gates 9260e1f7de0cSMatt Gates memset(h->ioaccel_cmd_pool, 0, 9261e1f7de0cSMatt Gates h->nr_cmds * sizeof(*h->ioaccel_cmd_pool)); 9262e1f7de0cSMatt Gates return 0; 9263e1f7de0cSMatt Gates 9264e1f7de0cSMatt Gates clean_up: 92651fb7c98aSRobert Elliott hpsa_free_ioaccel1_cmd_and_bft(h); 92662dd02d74SRobert Elliott return -ENOMEM; 92676c311b57SStephen M. Cameron } 92686c311b57SStephen M. Cameron 92691fb7c98aSRobert Elliott /* Free ioaccel2 mode command blocks and block fetch table */ 92701fb7c98aSRobert Elliott static void hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info *h) 92711fb7c98aSRobert Elliott { 9272d9a729f3SWebb Scales hpsa_free_ioaccel2_sg_chain_blocks(h); 9273d9a729f3SWebb Scales 9274105a3dbcSRobert Elliott if (h->ioaccel2_cmd_pool) { 92751fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 92761fb7c98aSRobert Elliott h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 92771fb7c98aSRobert Elliott h->ioaccel2_cmd_pool, 92781fb7c98aSRobert Elliott h->ioaccel2_cmd_pool_dhandle); 9279105a3dbcSRobert Elliott h->ioaccel2_cmd_pool = NULL; 9280105a3dbcSRobert Elliott h->ioaccel2_cmd_pool_dhandle = 0; 9281105a3dbcSRobert Elliott } 92821fb7c98aSRobert Elliott kfree(h->ioaccel2_blockFetchTable); 9283105a3dbcSRobert Elliott h->ioaccel2_blockFetchTable = NULL; 92841fb7c98aSRobert Elliott } 92851fb7c98aSRobert Elliott 9286d37ffbe4SRobert Elliott /* Allocate ioaccel2 mode command blocks and block fetch table */ 9287d37ffbe4SRobert Elliott static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h) 9288aca9012aSStephen M. Cameron { 9289d9a729f3SWebb Scales int rc; 9290d9a729f3SWebb Scales 9291aca9012aSStephen M. Cameron /* Allocate ioaccel2 mode command blocks and block fetch table */ 9292aca9012aSStephen M. Cameron 9293aca9012aSStephen M. Cameron h->ioaccel_maxsg = 9294aca9012aSStephen M. Cameron readl(&(h->cfgtable->io_accel_max_embedded_sg_count)); 9295aca9012aSStephen M. Cameron if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES) 9296aca9012aSStephen M. Cameron h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES; 9297aca9012aSStephen M. Cameron 9298aca9012aSStephen M. Cameron BUILD_BUG_ON(sizeof(struct io_accel2_cmd) % 9299aca9012aSStephen M. Cameron IOACCEL2_COMMANDLIST_ALIGNMENT); 9300aca9012aSStephen M. Cameron h->ioaccel2_cmd_pool = 9301aca9012aSStephen M. Cameron pci_alloc_consistent(h->pdev, 9302aca9012aSStephen M. Cameron h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 9303aca9012aSStephen M. Cameron &(h->ioaccel2_cmd_pool_dhandle)); 9304aca9012aSStephen M. Cameron 9305aca9012aSStephen M. Cameron h->ioaccel2_blockFetchTable = 9306aca9012aSStephen M. Cameron kmalloc(((h->ioaccel_maxsg + 1) * 9307aca9012aSStephen M. Cameron sizeof(u32)), GFP_KERNEL); 9308aca9012aSStephen M. Cameron 9309aca9012aSStephen M. Cameron if ((h->ioaccel2_cmd_pool == NULL) || 9310d9a729f3SWebb Scales (h->ioaccel2_blockFetchTable == NULL)) { 9311d9a729f3SWebb Scales rc = -ENOMEM; 9312d9a729f3SWebb Scales goto clean_up; 9313d9a729f3SWebb Scales } 9314d9a729f3SWebb Scales 9315d9a729f3SWebb Scales rc = hpsa_allocate_ioaccel2_sg_chain_blocks(h); 9316d9a729f3SWebb Scales if (rc) 9317aca9012aSStephen M. Cameron goto clean_up; 9318aca9012aSStephen M. Cameron 9319aca9012aSStephen M. Cameron memset(h->ioaccel2_cmd_pool, 0, 9320aca9012aSStephen M. Cameron h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool)); 9321aca9012aSStephen M. Cameron return 0; 9322aca9012aSStephen M. Cameron 9323aca9012aSStephen M. Cameron clean_up: 93241fb7c98aSRobert Elliott hpsa_free_ioaccel2_cmd_and_bft(h); 9325d9a729f3SWebb Scales return rc; 9326aca9012aSStephen M. Cameron } 9327aca9012aSStephen M. Cameron 9328105a3dbcSRobert Elliott /* Free items allocated by hpsa_put_ctlr_into_performant_mode */ 9329105a3dbcSRobert Elliott static void hpsa_free_performant_mode(struct ctlr_info *h) 9330105a3dbcSRobert Elliott { 9331105a3dbcSRobert Elliott kfree(h->blockFetchTable); 9332105a3dbcSRobert Elliott h->blockFetchTable = NULL; 9333105a3dbcSRobert Elliott hpsa_free_reply_queues(h); 9334105a3dbcSRobert Elliott hpsa_free_ioaccel1_cmd_and_bft(h); 9335105a3dbcSRobert Elliott hpsa_free_ioaccel2_cmd_and_bft(h); 9336105a3dbcSRobert Elliott } 9337105a3dbcSRobert Elliott 9338105a3dbcSRobert Elliott /* return -ENODEV on error, 0 on success (or no action) 9339105a3dbcSRobert Elliott * allocates numerous items that must be freed later 9340105a3dbcSRobert Elliott */ 9341105a3dbcSRobert Elliott static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h) 93426c311b57SStephen M. Cameron { 93436c311b57SStephen M. Cameron u32 trans_support; 9344e1f7de0cSMatt Gates unsigned long transMethod = CFGTBL_Trans_Performant | 9345e1f7de0cSMatt Gates CFGTBL_Trans_use_short_tags; 9346105a3dbcSRobert Elliott int i, rc; 93476c311b57SStephen M. Cameron 934802ec19c8SStephen M. Cameron if (hpsa_simple_mode) 9349105a3dbcSRobert Elliott return 0; 935002ec19c8SStephen M. Cameron 935167c99a72Sscameron@beardog.cce.hp.com trans_support = readl(&(h->cfgtable->TransportSupport)); 935267c99a72Sscameron@beardog.cce.hp.com if (!(trans_support & PERFORMANT_MODE)) 9353105a3dbcSRobert Elliott return 0; 935467c99a72Sscameron@beardog.cce.hp.com 9355e1f7de0cSMatt Gates /* Check for I/O accelerator mode support */ 9356e1f7de0cSMatt Gates if (trans_support & CFGTBL_Trans_io_accel1) { 9357e1f7de0cSMatt Gates transMethod |= CFGTBL_Trans_io_accel1 | 9358e1f7de0cSMatt Gates CFGTBL_Trans_enable_directed_msix; 9359105a3dbcSRobert Elliott rc = hpsa_alloc_ioaccel1_cmd_and_bft(h); 9360105a3dbcSRobert Elliott if (rc) 9361105a3dbcSRobert Elliott return rc; 9362105a3dbcSRobert Elliott } else if (trans_support & CFGTBL_Trans_io_accel2) { 9363aca9012aSStephen M. Cameron transMethod |= CFGTBL_Trans_io_accel2 | 9364aca9012aSStephen M. Cameron CFGTBL_Trans_enable_directed_msix; 9365105a3dbcSRobert Elliott rc = hpsa_alloc_ioaccel2_cmd_and_bft(h); 9366105a3dbcSRobert Elliott if (rc) 9367105a3dbcSRobert Elliott return rc; 9368e1f7de0cSMatt Gates } 9369e1f7de0cSMatt Gates 9370eee0f03aSHannes Reinecke h->nreply_queues = h->msix_vector > 0 ? h->msix_vector : 1; 9371cba3d38bSStephen M. Cameron hpsa_get_max_perf_mode_cmds(h); 93726c311b57SStephen M. Cameron /* Performant mode ring buffer and supporting data structures */ 9373072b0518SStephen M. Cameron h->reply_queue_size = h->max_commands * sizeof(u64); 93746c311b57SStephen M. Cameron 9375254f796bSMatt Gates for (i = 0; i < h->nreply_queues; i++) { 9376072b0518SStephen M. Cameron h->reply_queue[i].head = pci_alloc_consistent(h->pdev, 9377072b0518SStephen M. Cameron h->reply_queue_size, 9378072b0518SStephen M. Cameron &(h->reply_queue[i].busaddr)); 9379105a3dbcSRobert Elliott if (!h->reply_queue[i].head) { 9380105a3dbcSRobert Elliott rc = -ENOMEM; 9381105a3dbcSRobert Elliott goto clean1; /* rq, ioaccel */ 9382105a3dbcSRobert Elliott } 9383254f796bSMatt Gates h->reply_queue[i].size = h->max_commands; 9384254f796bSMatt Gates h->reply_queue[i].wraparound = 1; /* spec: init to 1 */ 9385254f796bSMatt Gates h->reply_queue[i].current_entry = 0; 9386254f796bSMatt Gates } 9387254f796bSMatt Gates 93886c311b57SStephen M. Cameron /* Need a block fetch table for performant mode */ 9389d66ae08bSStephen M. Cameron h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) * 93906c311b57SStephen M. Cameron sizeof(u32)), GFP_KERNEL); 9391105a3dbcSRobert Elliott if (!h->blockFetchTable) { 9392105a3dbcSRobert Elliott rc = -ENOMEM; 9393105a3dbcSRobert Elliott goto clean1; /* rq, ioaccel */ 9394105a3dbcSRobert Elliott } 93956c311b57SStephen M. Cameron 9396105a3dbcSRobert Elliott rc = hpsa_enter_performant_mode(h, trans_support); 9397105a3dbcSRobert Elliott if (rc) 9398105a3dbcSRobert Elliott goto clean2; /* bft, rq, ioaccel */ 9399105a3dbcSRobert Elliott return 0; 9400303932fdSDon Brace 9401105a3dbcSRobert Elliott clean2: /* bft, rq, ioaccel */ 9402303932fdSDon Brace kfree(h->blockFetchTable); 9403105a3dbcSRobert Elliott h->blockFetchTable = NULL; 9404105a3dbcSRobert Elliott clean1: /* rq, ioaccel */ 9405105a3dbcSRobert Elliott hpsa_free_reply_queues(h); 9406105a3dbcSRobert Elliott hpsa_free_ioaccel1_cmd_and_bft(h); 9407105a3dbcSRobert Elliott hpsa_free_ioaccel2_cmd_and_bft(h); 9408105a3dbcSRobert Elliott return rc; 9409303932fdSDon Brace } 9410303932fdSDon Brace 941123100dd9SStephen M. Cameron static int is_accelerated_cmd(struct CommandList *c) 941276438d08SStephen M. Cameron { 941323100dd9SStephen M. Cameron return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2; 941423100dd9SStephen M. Cameron } 941523100dd9SStephen M. Cameron 941623100dd9SStephen M. Cameron static void hpsa_drain_accel_commands(struct ctlr_info *h) 941723100dd9SStephen M. Cameron { 941823100dd9SStephen M. Cameron struct CommandList *c = NULL; 9419f2405db8SDon Brace int i, accel_cmds_out; 9420281a7fd0SWebb Scales int refcount; 942176438d08SStephen M. Cameron 9422f2405db8SDon Brace do { /* wait for all outstanding ioaccel commands to drain out */ 942323100dd9SStephen M. Cameron accel_cmds_out = 0; 9424f2405db8SDon Brace for (i = 0; i < h->nr_cmds; i++) { 9425f2405db8SDon Brace c = h->cmd_pool + i; 9426281a7fd0SWebb Scales refcount = atomic_inc_return(&c->refcount); 9427281a7fd0SWebb Scales if (refcount > 1) /* Command is allocated */ 942823100dd9SStephen M. Cameron accel_cmds_out += is_accelerated_cmd(c); 9429281a7fd0SWebb Scales cmd_free(h, c); 9430f2405db8SDon Brace } 943123100dd9SStephen M. Cameron if (accel_cmds_out <= 0) 943276438d08SStephen M. Cameron break; 943376438d08SStephen M. Cameron msleep(100); 943476438d08SStephen M. Cameron } while (1); 943576438d08SStephen M. Cameron } 943676438d08SStephen M. Cameron 9437d04e62b9SKevin Barnett static struct hpsa_sas_phy *hpsa_alloc_sas_phy( 9438d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port) 9439d04e62b9SKevin Barnett { 9440d04e62b9SKevin Barnett struct hpsa_sas_phy *hpsa_sas_phy; 9441d04e62b9SKevin Barnett struct sas_phy *phy; 9442d04e62b9SKevin Barnett 9443d04e62b9SKevin Barnett hpsa_sas_phy = kzalloc(sizeof(*hpsa_sas_phy), GFP_KERNEL); 9444d04e62b9SKevin Barnett if (!hpsa_sas_phy) 9445d04e62b9SKevin Barnett return NULL; 9446d04e62b9SKevin Barnett 9447d04e62b9SKevin Barnett phy = sas_phy_alloc(hpsa_sas_port->parent_node->parent_dev, 9448d04e62b9SKevin Barnett hpsa_sas_port->next_phy_index); 9449d04e62b9SKevin Barnett if (!phy) { 9450d04e62b9SKevin Barnett kfree(hpsa_sas_phy); 9451d04e62b9SKevin Barnett return NULL; 9452d04e62b9SKevin Barnett } 9453d04e62b9SKevin Barnett 9454d04e62b9SKevin Barnett hpsa_sas_port->next_phy_index++; 9455d04e62b9SKevin Barnett hpsa_sas_phy->phy = phy; 9456d04e62b9SKevin Barnett hpsa_sas_phy->parent_port = hpsa_sas_port; 9457d04e62b9SKevin Barnett 9458d04e62b9SKevin Barnett return hpsa_sas_phy; 9459d04e62b9SKevin Barnett } 9460d04e62b9SKevin Barnett 9461d04e62b9SKevin Barnett static void hpsa_free_sas_phy(struct hpsa_sas_phy *hpsa_sas_phy) 9462d04e62b9SKevin Barnett { 9463d04e62b9SKevin Barnett struct sas_phy *phy = hpsa_sas_phy->phy; 9464d04e62b9SKevin Barnett 9465d04e62b9SKevin Barnett sas_port_delete_phy(hpsa_sas_phy->parent_port->port, phy); 9466d04e62b9SKevin Barnett sas_phy_free(phy); 9467d04e62b9SKevin Barnett if (hpsa_sas_phy->added_to_port) 9468d04e62b9SKevin Barnett list_del(&hpsa_sas_phy->phy_list_entry); 9469d04e62b9SKevin Barnett kfree(hpsa_sas_phy); 9470d04e62b9SKevin Barnett } 9471d04e62b9SKevin Barnett 9472d04e62b9SKevin Barnett static int hpsa_sas_port_add_phy(struct hpsa_sas_phy *hpsa_sas_phy) 9473d04e62b9SKevin Barnett { 9474d04e62b9SKevin Barnett int rc; 9475d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9476d04e62b9SKevin Barnett struct sas_phy *phy; 9477d04e62b9SKevin Barnett struct sas_identify *identify; 9478d04e62b9SKevin Barnett 9479d04e62b9SKevin Barnett hpsa_sas_port = hpsa_sas_phy->parent_port; 9480d04e62b9SKevin Barnett phy = hpsa_sas_phy->phy; 9481d04e62b9SKevin Barnett 9482d04e62b9SKevin Barnett identify = &phy->identify; 9483d04e62b9SKevin Barnett memset(identify, 0, sizeof(*identify)); 9484d04e62b9SKevin Barnett identify->sas_address = hpsa_sas_port->sas_address; 9485d04e62b9SKevin Barnett identify->device_type = SAS_END_DEVICE; 9486d04e62b9SKevin Barnett identify->initiator_port_protocols = SAS_PROTOCOL_STP; 9487d04e62b9SKevin Barnett identify->target_port_protocols = SAS_PROTOCOL_STP; 9488d04e62b9SKevin Barnett phy->minimum_linkrate_hw = SAS_LINK_RATE_UNKNOWN; 9489d04e62b9SKevin Barnett phy->maximum_linkrate_hw = SAS_LINK_RATE_UNKNOWN; 9490d04e62b9SKevin Barnett phy->minimum_linkrate = SAS_LINK_RATE_UNKNOWN; 9491d04e62b9SKevin Barnett phy->maximum_linkrate = SAS_LINK_RATE_UNKNOWN; 9492d04e62b9SKevin Barnett phy->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN; 9493d04e62b9SKevin Barnett 9494d04e62b9SKevin Barnett rc = sas_phy_add(hpsa_sas_phy->phy); 9495d04e62b9SKevin Barnett if (rc) 9496d04e62b9SKevin Barnett return rc; 9497d04e62b9SKevin Barnett 9498d04e62b9SKevin Barnett sas_port_add_phy(hpsa_sas_port->port, hpsa_sas_phy->phy); 9499d04e62b9SKevin Barnett list_add_tail(&hpsa_sas_phy->phy_list_entry, 9500d04e62b9SKevin Barnett &hpsa_sas_port->phy_list_head); 9501d04e62b9SKevin Barnett hpsa_sas_phy->added_to_port = true; 9502d04e62b9SKevin Barnett 9503d04e62b9SKevin Barnett return 0; 9504d04e62b9SKevin Barnett } 9505d04e62b9SKevin Barnett 9506d04e62b9SKevin Barnett static int 9507d04e62b9SKevin Barnett hpsa_sas_port_add_rphy(struct hpsa_sas_port *hpsa_sas_port, 9508d04e62b9SKevin Barnett struct sas_rphy *rphy) 9509d04e62b9SKevin Barnett { 9510d04e62b9SKevin Barnett struct sas_identify *identify; 9511d04e62b9SKevin Barnett 9512d04e62b9SKevin Barnett identify = &rphy->identify; 9513d04e62b9SKevin Barnett identify->sas_address = hpsa_sas_port->sas_address; 9514d04e62b9SKevin Barnett identify->initiator_port_protocols = SAS_PROTOCOL_STP; 9515d04e62b9SKevin Barnett identify->target_port_protocols = SAS_PROTOCOL_STP; 9516d04e62b9SKevin Barnett 9517d04e62b9SKevin Barnett return sas_rphy_add(rphy); 9518d04e62b9SKevin Barnett } 9519d04e62b9SKevin Barnett 9520d04e62b9SKevin Barnett static struct hpsa_sas_port 9521d04e62b9SKevin Barnett *hpsa_alloc_sas_port(struct hpsa_sas_node *hpsa_sas_node, 9522d04e62b9SKevin Barnett u64 sas_address) 9523d04e62b9SKevin Barnett { 9524d04e62b9SKevin Barnett int rc; 9525d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9526d04e62b9SKevin Barnett struct sas_port *port; 9527d04e62b9SKevin Barnett 9528d04e62b9SKevin Barnett hpsa_sas_port = kzalloc(sizeof(*hpsa_sas_port), GFP_KERNEL); 9529d04e62b9SKevin Barnett if (!hpsa_sas_port) 9530d04e62b9SKevin Barnett return NULL; 9531d04e62b9SKevin Barnett 9532d04e62b9SKevin Barnett INIT_LIST_HEAD(&hpsa_sas_port->phy_list_head); 9533d04e62b9SKevin Barnett hpsa_sas_port->parent_node = hpsa_sas_node; 9534d04e62b9SKevin Barnett 9535d04e62b9SKevin Barnett port = sas_port_alloc_num(hpsa_sas_node->parent_dev); 9536d04e62b9SKevin Barnett if (!port) 9537d04e62b9SKevin Barnett goto free_hpsa_port; 9538d04e62b9SKevin Barnett 9539d04e62b9SKevin Barnett rc = sas_port_add(port); 9540d04e62b9SKevin Barnett if (rc) 9541d04e62b9SKevin Barnett goto free_sas_port; 9542d04e62b9SKevin Barnett 9543d04e62b9SKevin Barnett hpsa_sas_port->port = port; 9544d04e62b9SKevin Barnett hpsa_sas_port->sas_address = sas_address; 9545d04e62b9SKevin Barnett list_add_tail(&hpsa_sas_port->port_list_entry, 9546d04e62b9SKevin Barnett &hpsa_sas_node->port_list_head); 9547d04e62b9SKevin Barnett 9548d04e62b9SKevin Barnett return hpsa_sas_port; 9549d04e62b9SKevin Barnett 9550d04e62b9SKevin Barnett free_sas_port: 9551d04e62b9SKevin Barnett sas_port_free(port); 9552d04e62b9SKevin Barnett free_hpsa_port: 9553d04e62b9SKevin Barnett kfree(hpsa_sas_port); 9554d04e62b9SKevin Barnett 9555d04e62b9SKevin Barnett return NULL; 9556d04e62b9SKevin Barnett } 9557d04e62b9SKevin Barnett 9558d04e62b9SKevin Barnett static void hpsa_free_sas_port(struct hpsa_sas_port *hpsa_sas_port) 9559d04e62b9SKevin Barnett { 9560d04e62b9SKevin Barnett struct hpsa_sas_phy *hpsa_sas_phy; 9561d04e62b9SKevin Barnett struct hpsa_sas_phy *next; 9562d04e62b9SKevin Barnett 9563d04e62b9SKevin Barnett list_for_each_entry_safe(hpsa_sas_phy, next, 9564d04e62b9SKevin Barnett &hpsa_sas_port->phy_list_head, phy_list_entry) 9565d04e62b9SKevin Barnett hpsa_free_sas_phy(hpsa_sas_phy); 9566d04e62b9SKevin Barnett 9567d04e62b9SKevin Barnett sas_port_delete(hpsa_sas_port->port); 9568d04e62b9SKevin Barnett list_del(&hpsa_sas_port->port_list_entry); 9569d04e62b9SKevin Barnett kfree(hpsa_sas_port); 9570d04e62b9SKevin Barnett } 9571d04e62b9SKevin Barnett 9572d04e62b9SKevin Barnett static struct hpsa_sas_node *hpsa_alloc_sas_node(struct device *parent_dev) 9573d04e62b9SKevin Barnett { 9574d04e62b9SKevin Barnett struct hpsa_sas_node *hpsa_sas_node; 9575d04e62b9SKevin Barnett 9576d04e62b9SKevin Barnett hpsa_sas_node = kzalloc(sizeof(*hpsa_sas_node), GFP_KERNEL); 9577d04e62b9SKevin Barnett if (hpsa_sas_node) { 9578d04e62b9SKevin Barnett hpsa_sas_node->parent_dev = parent_dev; 9579d04e62b9SKevin Barnett INIT_LIST_HEAD(&hpsa_sas_node->port_list_head); 9580d04e62b9SKevin Barnett } 9581d04e62b9SKevin Barnett 9582d04e62b9SKevin Barnett return hpsa_sas_node; 9583d04e62b9SKevin Barnett } 9584d04e62b9SKevin Barnett 9585d04e62b9SKevin Barnett static void hpsa_free_sas_node(struct hpsa_sas_node *hpsa_sas_node) 9586d04e62b9SKevin Barnett { 9587d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9588d04e62b9SKevin Barnett struct hpsa_sas_port *next; 9589d04e62b9SKevin Barnett 9590d04e62b9SKevin Barnett if (!hpsa_sas_node) 9591d04e62b9SKevin Barnett return; 9592d04e62b9SKevin Barnett 9593d04e62b9SKevin Barnett list_for_each_entry_safe(hpsa_sas_port, next, 9594d04e62b9SKevin Barnett &hpsa_sas_node->port_list_head, port_list_entry) 9595d04e62b9SKevin Barnett hpsa_free_sas_port(hpsa_sas_port); 9596d04e62b9SKevin Barnett 9597d04e62b9SKevin Barnett kfree(hpsa_sas_node); 9598d04e62b9SKevin Barnett } 9599d04e62b9SKevin Barnett 9600d04e62b9SKevin Barnett static struct hpsa_scsi_dev_t 9601d04e62b9SKevin Barnett *hpsa_find_device_by_sas_rphy(struct ctlr_info *h, 9602d04e62b9SKevin Barnett struct sas_rphy *rphy) 9603d04e62b9SKevin Barnett { 9604d04e62b9SKevin Barnett int i; 9605d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *device; 9606d04e62b9SKevin Barnett 9607d04e62b9SKevin Barnett for (i = 0; i < h->ndevices; i++) { 9608d04e62b9SKevin Barnett device = h->dev[i]; 9609d04e62b9SKevin Barnett if (!device->sas_port) 9610d04e62b9SKevin Barnett continue; 9611d04e62b9SKevin Barnett if (device->sas_port->rphy == rphy) 9612d04e62b9SKevin Barnett return device; 9613d04e62b9SKevin Barnett } 9614d04e62b9SKevin Barnett 9615d04e62b9SKevin Barnett return NULL; 9616d04e62b9SKevin Barnett } 9617d04e62b9SKevin Barnett 9618d04e62b9SKevin Barnett static int hpsa_add_sas_host(struct ctlr_info *h) 9619d04e62b9SKevin Barnett { 9620d04e62b9SKevin Barnett int rc; 9621d04e62b9SKevin Barnett struct device *parent_dev; 9622d04e62b9SKevin Barnett struct hpsa_sas_node *hpsa_sas_node; 9623d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9624d04e62b9SKevin Barnett struct hpsa_sas_phy *hpsa_sas_phy; 9625d04e62b9SKevin Barnett 9626d04e62b9SKevin Barnett parent_dev = &h->scsi_host->shost_gendev; 9627d04e62b9SKevin Barnett 9628d04e62b9SKevin Barnett hpsa_sas_node = hpsa_alloc_sas_node(parent_dev); 9629d04e62b9SKevin Barnett if (!hpsa_sas_node) 9630d04e62b9SKevin Barnett return -ENOMEM; 9631d04e62b9SKevin Barnett 9632d04e62b9SKevin Barnett hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, h->sas_address); 9633d04e62b9SKevin Barnett if (!hpsa_sas_port) { 9634d04e62b9SKevin Barnett rc = -ENODEV; 9635d04e62b9SKevin Barnett goto free_sas_node; 9636d04e62b9SKevin Barnett } 9637d04e62b9SKevin Barnett 9638d04e62b9SKevin Barnett hpsa_sas_phy = hpsa_alloc_sas_phy(hpsa_sas_port); 9639d04e62b9SKevin Barnett if (!hpsa_sas_phy) { 9640d04e62b9SKevin Barnett rc = -ENODEV; 9641d04e62b9SKevin Barnett goto free_sas_port; 9642d04e62b9SKevin Barnett } 9643d04e62b9SKevin Barnett 9644d04e62b9SKevin Barnett rc = hpsa_sas_port_add_phy(hpsa_sas_phy); 9645d04e62b9SKevin Barnett if (rc) 9646d04e62b9SKevin Barnett goto free_sas_phy; 9647d04e62b9SKevin Barnett 9648d04e62b9SKevin Barnett h->sas_host = hpsa_sas_node; 9649d04e62b9SKevin Barnett 9650d04e62b9SKevin Barnett return 0; 9651d04e62b9SKevin Barnett 9652d04e62b9SKevin Barnett free_sas_phy: 9653d04e62b9SKevin Barnett hpsa_free_sas_phy(hpsa_sas_phy); 9654d04e62b9SKevin Barnett free_sas_port: 9655d04e62b9SKevin Barnett hpsa_free_sas_port(hpsa_sas_port); 9656d04e62b9SKevin Barnett free_sas_node: 9657d04e62b9SKevin Barnett hpsa_free_sas_node(hpsa_sas_node); 9658d04e62b9SKevin Barnett 9659d04e62b9SKevin Barnett return rc; 9660d04e62b9SKevin Barnett } 9661d04e62b9SKevin Barnett 9662d04e62b9SKevin Barnett static void hpsa_delete_sas_host(struct ctlr_info *h) 9663d04e62b9SKevin Barnett { 9664d04e62b9SKevin Barnett hpsa_free_sas_node(h->sas_host); 9665d04e62b9SKevin Barnett } 9666d04e62b9SKevin Barnett 9667d04e62b9SKevin Barnett static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node, 9668d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *device) 9669d04e62b9SKevin Barnett { 9670d04e62b9SKevin Barnett int rc; 9671d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9672d04e62b9SKevin Barnett struct sas_rphy *rphy; 9673d04e62b9SKevin Barnett 9674d04e62b9SKevin Barnett hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, device->sas_address); 9675d04e62b9SKevin Barnett if (!hpsa_sas_port) 9676d04e62b9SKevin Barnett return -ENOMEM; 9677d04e62b9SKevin Barnett 9678d04e62b9SKevin Barnett rphy = sas_end_device_alloc(hpsa_sas_port->port); 9679d04e62b9SKevin Barnett if (!rphy) { 9680d04e62b9SKevin Barnett rc = -ENODEV; 9681d04e62b9SKevin Barnett goto free_sas_port; 9682d04e62b9SKevin Barnett } 9683d04e62b9SKevin Barnett 9684d04e62b9SKevin Barnett hpsa_sas_port->rphy = rphy; 9685d04e62b9SKevin Barnett device->sas_port = hpsa_sas_port; 9686d04e62b9SKevin Barnett 9687d04e62b9SKevin Barnett rc = hpsa_sas_port_add_rphy(hpsa_sas_port, rphy); 9688d04e62b9SKevin Barnett if (rc) 9689d04e62b9SKevin Barnett goto free_sas_port; 9690d04e62b9SKevin Barnett 9691d04e62b9SKevin Barnett return 0; 9692d04e62b9SKevin Barnett 9693d04e62b9SKevin Barnett free_sas_port: 9694d04e62b9SKevin Barnett hpsa_free_sas_port(hpsa_sas_port); 9695d04e62b9SKevin Barnett device->sas_port = NULL; 9696d04e62b9SKevin Barnett 9697d04e62b9SKevin Barnett return rc; 9698d04e62b9SKevin Barnett } 9699d04e62b9SKevin Barnett 9700d04e62b9SKevin Barnett static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device) 9701d04e62b9SKevin Barnett { 9702d04e62b9SKevin Barnett if (device->sas_port) { 9703d04e62b9SKevin Barnett hpsa_free_sas_port(device->sas_port); 9704d04e62b9SKevin Barnett device->sas_port = NULL; 9705d04e62b9SKevin Barnett } 9706d04e62b9SKevin Barnett } 9707d04e62b9SKevin Barnett 9708d04e62b9SKevin Barnett static int 9709d04e62b9SKevin Barnett hpsa_sas_get_linkerrors(struct sas_phy *phy) 9710d04e62b9SKevin Barnett { 9711d04e62b9SKevin Barnett return 0; 9712d04e62b9SKevin Barnett } 9713d04e62b9SKevin Barnett 9714d04e62b9SKevin Barnett static int 9715d04e62b9SKevin Barnett hpsa_sas_get_enclosure_identifier(struct sas_rphy *rphy, u64 *identifier) 9716d04e62b9SKevin Barnett { 9717aa105695SDan Carpenter *identifier = 0; 9718d04e62b9SKevin Barnett return 0; 9719d04e62b9SKevin Barnett } 9720d04e62b9SKevin Barnett 9721d04e62b9SKevin Barnett static int 9722d04e62b9SKevin Barnett hpsa_sas_get_bay_identifier(struct sas_rphy *rphy) 9723d04e62b9SKevin Barnett { 9724d04e62b9SKevin Barnett return -ENXIO; 9725d04e62b9SKevin Barnett } 9726d04e62b9SKevin Barnett 9727d04e62b9SKevin Barnett static int 9728d04e62b9SKevin Barnett hpsa_sas_phy_reset(struct sas_phy *phy, int hard_reset) 9729d04e62b9SKevin Barnett { 9730d04e62b9SKevin Barnett return 0; 9731d04e62b9SKevin Barnett } 9732d04e62b9SKevin Barnett 9733d04e62b9SKevin Barnett static int 9734d04e62b9SKevin Barnett hpsa_sas_phy_enable(struct sas_phy *phy, int enable) 9735d04e62b9SKevin Barnett { 9736d04e62b9SKevin Barnett return 0; 9737d04e62b9SKevin Barnett } 9738d04e62b9SKevin Barnett 9739d04e62b9SKevin Barnett static int 9740d04e62b9SKevin Barnett hpsa_sas_phy_setup(struct sas_phy *phy) 9741d04e62b9SKevin Barnett { 9742d04e62b9SKevin Barnett return 0; 9743d04e62b9SKevin Barnett } 9744d04e62b9SKevin Barnett 9745d04e62b9SKevin Barnett static void 9746d04e62b9SKevin Barnett hpsa_sas_phy_release(struct sas_phy *phy) 9747d04e62b9SKevin Barnett { 9748d04e62b9SKevin Barnett } 9749d04e62b9SKevin Barnett 9750d04e62b9SKevin Barnett static int 9751d04e62b9SKevin Barnett hpsa_sas_phy_speed(struct sas_phy *phy, struct sas_phy_linkrates *rates) 9752d04e62b9SKevin Barnett { 9753d04e62b9SKevin Barnett return -EINVAL; 9754d04e62b9SKevin Barnett } 9755d04e62b9SKevin Barnett 9756d04e62b9SKevin Barnett /* SMP = Serial Management Protocol */ 9757d04e62b9SKevin Barnett static int 9758d04e62b9SKevin Barnett hpsa_sas_smp_handler(struct Scsi_Host *shost, struct sas_rphy *rphy, 9759d04e62b9SKevin Barnett struct request *req) 9760d04e62b9SKevin Barnett { 9761d04e62b9SKevin Barnett return -EINVAL; 9762d04e62b9SKevin Barnett } 9763d04e62b9SKevin Barnett 9764d04e62b9SKevin Barnett static struct sas_function_template hpsa_sas_transport_functions = { 9765d04e62b9SKevin Barnett .get_linkerrors = hpsa_sas_get_linkerrors, 9766d04e62b9SKevin Barnett .get_enclosure_identifier = hpsa_sas_get_enclosure_identifier, 9767d04e62b9SKevin Barnett .get_bay_identifier = hpsa_sas_get_bay_identifier, 9768d04e62b9SKevin Barnett .phy_reset = hpsa_sas_phy_reset, 9769d04e62b9SKevin Barnett .phy_enable = hpsa_sas_phy_enable, 9770d04e62b9SKevin Barnett .phy_setup = hpsa_sas_phy_setup, 9771d04e62b9SKevin Barnett .phy_release = hpsa_sas_phy_release, 9772d04e62b9SKevin Barnett .set_phy_speed = hpsa_sas_phy_speed, 9773d04e62b9SKevin Barnett .smp_handler = hpsa_sas_smp_handler, 9774d04e62b9SKevin Barnett }; 9775d04e62b9SKevin Barnett 9776edd16368SStephen M. Cameron /* 9777edd16368SStephen M. Cameron * This is it. Register the PCI driver information for the cards we control 9778edd16368SStephen M. Cameron * the OS will call our registered routines when it finds one of our cards. 9779edd16368SStephen M. Cameron */ 9780edd16368SStephen M. Cameron static int __init hpsa_init(void) 9781edd16368SStephen M. Cameron { 9782d04e62b9SKevin Barnett int rc; 9783d04e62b9SKevin Barnett 9784d04e62b9SKevin Barnett hpsa_sas_transport_template = 9785d04e62b9SKevin Barnett sas_attach_transport(&hpsa_sas_transport_functions); 9786d04e62b9SKevin Barnett if (!hpsa_sas_transport_template) 9787d04e62b9SKevin Barnett return -ENODEV; 9788d04e62b9SKevin Barnett 9789d04e62b9SKevin Barnett rc = pci_register_driver(&hpsa_pci_driver); 9790d04e62b9SKevin Barnett 9791d04e62b9SKevin Barnett if (rc) 9792d04e62b9SKevin Barnett sas_release_transport(hpsa_sas_transport_template); 9793d04e62b9SKevin Barnett 9794d04e62b9SKevin Barnett return rc; 9795edd16368SStephen M. Cameron } 9796edd16368SStephen M. Cameron 9797edd16368SStephen M. Cameron static void __exit hpsa_cleanup(void) 9798edd16368SStephen M. Cameron { 9799edd16368SStephen M. Cameron pci_unregister_driver(&hpsa_pci_driver); 9800d04e62b9SKevin Barnett sas_release_transport(hpsa_sas_transport_template); 9801edd16368SStephen M. Cameron } 9802edd16368SStephen M. Cameron 9803e1f7de0cSMatt Gates static void __attribute__((unused)) verify_offsets(void) 9804e1f7de0cSMatt Gates { 9805e1f7de0cSMatt Gates #define VERIFY_OFFSET(member, offset) \ 9806dd0e19f3SScott Teel BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset) 9807dd0e19f3SScott Teel 9808dd0e19f3SScott Teel VERIFY_OFFSET(structure_size, 0); 9809dd0e19f3SScott Teel VERIFY_OFFSET(volume_blk_size, 4); 9810dd0e19f3SScott Teel VERIFY_OFFSET(volume_blk_cnt, 8); 9811dd0e19f3SScott Teel VERIFY_OFFSET(phys_blk_shift, 16); 9812dd0e19f3SScott Teel VERIFY_OFFSET(parity_rotation_shift, 17); 9813dd0e19f3SScott Teel VERIFY_OFFSET(strip_size, 18); 9814dd0e19f3SScott Teel VERIFY_OFFSET(disk_starting_blk, 20); 9815dd0e19f3SScott Teel VERIFY_OFFSET(disk_blk_cnt, 28); 9816dd0e19f3SScott Teel VERIFY_OFFSET(data_disks_per_row, 36); 9817dd0e19f3SScott Teel VERIFY_OFFSET(metadata_disks_per_row, 38); 9818dd0e19f3SScott Teel VERIFY_OFFSET(row_cnt, 40); 9819dd0e19f3SScott Teel VERIFY_OFFSET(layout_map_count, 42); 9820dd0e19f3SScott Teel VERIFY_OFFSET(flags, 44); 9821dd0e19f3SScott Teel VERIFY_OFFSET(dekindex, 46); 9822dd0e19f3SScott Teel /* VERIFY_OFFSET(reserved, 48 */ 9823dd0e19f3SScott Teel VERIFY_OFFSET(data, 64); 9824dd0e19f3SScott Teel 9825dd0e19f3SScott Teel #undef VERIFY_OFFSET 9826dd0e19f3SScott Teel 9827dd0e19f3SScott Teel #define VERIFY_OFFSET(member, offset) \ 9828b66cc250SMike Miller BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset) 9829b66cc250SMike Miller 9830b66cc250SMike Miller VERIFY_OFFSET(IU_type, 0); 9831b66cc250SMike Miller VERIFY_OFFSET(direction, 1); 9832b66cc250SMike Miller VERIFY_OFFSET(reply_queue, 2); 9833b66cc250SMike Miller /* VERIFY_OFFSET(reserved1, 3); */ 9834b66cc250SMike Miller VERIFY_OFFSET(scsi_nexus, 4); 9835b66cc250SMike Miller VERIFY_OFFSET(Tag, 8); 9836b66cc250SMike Miller VERIFY_OFFSET(cdb, 16); 9837b66cc250SMike Miller VERIFY_OFFSET(cciss_lun, 32); 9838b66cc250SMike Miller VERIFY_OFFSET(data_len, 40); 9839b66cc250SMike Miller VERIFY_OFFSET(cmd_priority_task_attr, 44); 9840b66cc250SMike Miller VERIFY_OFFSET(sg_count, 45); 9841b66cc250SMike Miller /* VERIFY_OFFSET(reserved3 */ 9842b66cc250SMike Miller VERIFY_OFFSET(err_ptr, 48); 9843b66cc250SMike Miller VERIFY_OFFSET(err_len, 56); 9844b66cc250SMike Miller /* VERIFY_OFFSET(reserved4 */ 9845b66cc250SMike Miller VERIFY_OFFSET(sg, 64); 9846b66cc250SMike Miller 9847b66cc250SMike Miller #undef VERIFY_OFFSET 9848b66cc250SMike Miller 9849b66cc250SMike Miller #define VERIFY_OFFSET(member, offset) \ 9850e1f7de0cSMatt Gates BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset) 9851e1f7de0cSMatt Gates 9852e1f7de0cSMatt Gates VERIFY_OFFSET(dev_handle, 0x00); 9853e1f7de0cSMatt Gates VERIFY_OFFSET(reserved1, 0x02); 9854e1f7de0cSMatt Gates VERIFY_OFFSET(function, 0x03); 9855e1f7de0cSMatt Gates VERIFY_OFFSET(reserved2, 0x04); 9856e1f7de0cSMatt Gates VERIFY_OFFSET(err_info, 0x0C); 9857e1f7de0cSMatt Gates VERIFY_OFFSET(reserved3, 0x10); 9858e1f7de0cSMatt Gates VERIFY_OFFSET(err_info_len, 0x12); 9859e1f7de0cSMatt Gates VERIFY_OFFSET(reserved4, 0x13); 9860e1f7de0cSMatt Gates VERIFY_OFFSET(sgl_offset, 0x14); 9861e1f7de0cSMatt Gates VERIFY_OFFSET(reserved5, 0x15); 9862e1f7de0cSMatt Gates VERIFY_OFFSET(transfer_len, 0x1C); 9863e1f7de0cSMatt Gates VERIFY_OFFSET(reserved6, 0x20); 9864e1f7de0cSMatt Gates VERIFY_OFFSET(io_flags, 0x24); 9865e1f7de0cSMatt Gates VERIFY_OFFSET(reserved7, 0x26); 9866e1f7de0cSMatt Gates VERIFY_OFFSET(LUN, 0x34); 9867e1f7de0cSMatt Gates VERIFY_OFFSET(control, 0x3C); 9868e1f7de0cSMatt Gates VERIFY_OFFSET(CDB, 0x40); 9869e1f7de0cSMatt Gates VERIFY_OFFSET(reserved8, 0x50); 9870e1f7de0cSMatt Gates VERIFY_OFFSET(host_context_flags, 0x60); 9871e1f7de0cSMatt Gates VERIFY_OFFSET(timeout_sec, 0x62); 9872e1f7de0cSMatt Gates VERIFY_OFFSET(ReplyQueue, 0x64); 9873e1f7de0cSMatt Gates VERIFY_OFFSET(reserved9, 0x65); 987450a0decfSStephen M. Cameron VERIFY_OFFSET(tag, 0x68); 9875e1f7de0cSMatt Gates VERIFY_OFFSET(host_addr, 0x70); 9876e1f7de0cSMatt Gates VERIFY_OFFSET(CISS_LUN, 0x78); 9877e1f7de0cSMatt Gates VERIFY_OFFSET(SG, 0x78 + 8); 9878e1f7de0cSMatt Gates #undef VERIFY_OFFSET 9879e1f7de0cSMatt Gates } 9880e1f7de0cSMatt Gates 9881edd16368SStephen M. Cameron module_init(hpsa_init); 9882edd16368SStephen M. Cameron module_exit(hpsa_cleanup); 9883