1edd16368SStephen M. Cameron /* 2edd16368SStephen M. Cameron * Disk Array driver for HP Smart Array SAS controllers 394c7bc31SDon Brace * Copyright 2016 Microsemi Corporation 41358f6dcSDon Brace * Copyright 2014-2015 PMC-Sierra, Inc. 51358f6dcSDon Brace * Copyright 2000,2009-2015 Hewlett-Packard Development Company, L.P. 6edd16368SStephen M. Cameron * 7edd16368SStephen M. Cameron * This program is free software; you can redistribute it and/or modify 8edd16368SStephen M. Cameron * it under the terms of the GNU General Public License as published by 9edd16368SStephen M. Cameron * the Free Software Foundation; version 2 of the License. 10edd16368SStephen M. Cameron * 11edd16368SStephen M. Cameron * This program is distributed in the hope that it will be useful, 12edd16368SStephen M. Cameron * but WITHOUT ANY WARRANTY; without even the implied warranty of 13edd16368SStephen M. Cameron * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or 14edd16368SStephen M. Cameron * NON INFRINGEMENT. See the GNU General Public License for more details. 15edd16368SStephen M. Cameron * 1694c7bc31SDon Brace * Questions/Comments/Bugfixes to esc.storagedev@microsemi.com 17edd16368SStephen M. Cameron * 18edd16368SStephen M. Cameron */ 19edd16368SStephen M. Cameron 20edd16368SStephen M. Cameron #include <linux/module.h> 21edd16368SStephen M. Cameron #include <linux/interrupt.h> 22edd16368SStephen M. Cameron #include <linux/types.h> 23edd16368SStephen M. Cameron #include <linux/pci.h> 24e5a44df8SMatthew Garrett #include <linux/pci-aspm.h> 25edd16368SStephen M. Cameron #include <linux/kernel.h> 26edd16368SStephen M. Cameron #include <linux/slab.h> 27edd16368SStephen M. Cameron #include <linux/delay.h> 28edd16368SStephen M. Cameron #include <linux/fs.h> 29edd16368SStephen M. Cameron #include <linux/timer.h> 30edd16368SStephen M. Cameron #include <linux/init.h> 31edd16368SStephen M. Cameron #include <linux/spinlock.h> 32edd16368SStephen M. Cameron #include <linux/compat.h> 33edd16368SStephen M. Cameron #include <linux/blktrace_api.h> 34edd16368SStephen M. Cameron #include <linux/uaccess.h> 35edd16368SStephen M. Cameron #include <linux/io.h> 36edd16368SStephen M. Cameron #include <linux/dma-mapping.h> 37edd16368SStephen M. Cameron #include <linux/completion.h> 38edd16368SStephen M. Cameron #include <linux/moduleparam.h> 39edd16368SStephen M. Cameron #include <scsi/scsi.h> 40edd16368SStephen M. Cameron #include <scsi/scsi_cmnd.h> 41edd16368SStephen M. Cameron #include <scsi/scsi_device.h> 42edd16368SStephen M. Cameron #include <scsi/scsi_host.h> 43667e23d4SStephen M. Cameron #include <scsi/scsi_tcq.h> 449437ac43SStephen Cameron #include <scsi/scsi_eh.h> 45d04e62b9SKevin Barnett #include <scsi/scsi_transport_sas.h> 4673153fe5SWebb Scales #include <scsi/scsi_dbg.h> 47edd16368SStephen M. Cameron #include <linux/cciss_ioctl.h> 48edd16368SStephen M. Cameron #include <linux/string.h> 49edd16368SStephen M. Cameron #include <linux/bitmap.h> 5060063497SArun Sharma #include <linux/atomic.h> 51a0c12413SStephen M. Cameron #include <linux/jiffies.h> 5242a91641SDon Brace #include <linux/percpu-defs.h> 53094963daSStephen M. Cameron #include <linux/percpu.h> 542b08b3e9SDon Brace #include <asm/unaligned.h> 55283b4a9bSStephen M. Cameron #include <asm/div64.h> 56edd16368SStephen M. Cameron #include "hpsa_cmd.h" 57edd16368SStephen M. Cameron #include "hpsa.h" 58edd16368SStephen M. Cameron 59ec2c3aa9SDon Brace /* 60ec2c3aa9SDon Brace * HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' 61ec2c3aa9SDon Brace * with an optional trailing '-' followed by a byte value (0-255). 62ec2c3aa9SDon Brace */ 63ff54aee4SDon Brace #define HPSA_DRIVER_VERSION "3.4.16-0" 64edd16368SStephen M. Cameron #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")" 65f79cfec6SStephen M. Cameron #define HPSA "hpsa" 66edd16368SStephen M. Cameron 67007e7aa9SRobert Elliott /* How long to wait for CISS doorbell communication */ 68007e7aa9SRobert Elliott #define CLEAR_EVENT_WAIT_INTERVAL 20 /* ms for each msleep() call */ 69007e7aa9SRobert Elliott #define MODE_CHANGE_WAIT_INTERVAL 10 /* ms for each msleep() call */ 70007e7aa9SRobert Elliott #define MAX_CLEAR_EVENT_WAIT 30000 /* times 20 ms = 600 s */ 71007e7aa9SRobert Elliott #define MAX_MODE_CHANGE_WAIT 2000 /* times 10 ms = 20 s */ 72edd16368SStephen M. Cameron #define MAX_IOCTL_CONFIG_WAIT 1000 73edd16368SStephen M. Cameron 74edd16368SStephen M. Cameron /*define how many times we will try a command because of bus resets */ 75edd16368SStephen M. Cameron #define MAX_CMD_RETRIES 3 76edd16368SStephen M. Cameron 77edd16368SStephen M. Cameron /* Embedded module documentation macros - see modules.h */ 78edd16368SStephen M. Cameron MODULE_AUTHOR("Hewlett-Packard Company"); 79edd16368SStephen M. Cameron MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \ 80edd16368SStephen M. Cameron HPSA_DRIVER_VERSION); 81edd16368SStephen M. Cameron MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers"); 82edd16368SStephen M. Cameron MODULE_VERSION(HPSA_DRIVER_VERSION); 83edd16368SStephen M. Cameron MODULE_LICENSE("GPL"); 84edd16368SStephen M. Cameron 85edd16368SStephen M. Cameron static int hpsa_allow_any; 86edd16368SStephen M. Cameron module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR); 87edd16368SStephen M. Cameron MODULE_PARM_DESC(hpsa_allow_any, 88edd16368SStephen M. Cameron "Allow hpsa driver to access unknown HP Smart Array hardware"); 8902ec19c8SStephen M. Cameron static int hpsa_simple_mode; 9002ec19c8SStephen M. Cameron module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR); 9102ec19c8SStephen M. Cameron MODULE_PARM_DESC(hpsa_simple_mode, 9202ec19c8SStephen M. Cameron "Use 'simple mode' rather than 'performant mode'"); 93edd16368SStephen M. Cameron 94edd16368SStephen M. Cameron /* define the PCI info for the cards we can control */ 95edd16368SStephen M. Cameron static const struct pci_device_id hpsa_pci_device_id[] = { 96edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241}, 97edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243}, 98edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245}, 99edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247}, 100edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249}, 101163dbcd8SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A}, 102163dbcd8SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B}, 103f8b01eb9SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233}, 1049143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350}, 1059143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351}, 1069143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352}, 1079143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353}, 1089143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354}, 1099143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355}, 1109143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356}, 111fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1921}, 112fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1922}, 113fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1923}, 114fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1924}, 115fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1926}, 116fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1928}, 11797b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1929}, 11897b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BD}, 11997b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BE}, 12097b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BF}, 12197b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C0}, 12297b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C1}, 12397b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C2}, 12497b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C3}, 12597b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C4}, 12697b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C5}, 1273b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C6}, 12897b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C7}, 12997b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C8}, 13097b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C9}, 1313b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CA}, 1323b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CB}, 1333b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CC}, 1343b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CD}, 1353b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CE}, 136fdfa4b6dSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0580}, 137cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0581}, 138cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0582}, 139cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0583}, 140cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0584}, 141cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0585}, 1428e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076}, 1438e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087}, 1448e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D}, 1458e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088}, 1468e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f}, 147edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 148edd16368SStephen M. Cameron PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0}, 149edd16368SStephen M. Cameron {0,} 150edd16368SStephen M. Cameron }; 151edd16368SStephen M. Cameron 152edd16368SStephen M. Cameron MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id); 153edd16368SStephen M. Cameron 154edd16368SStephen M. Cameron /* board_id = Subsystem Device ID & Vendor ID 155edd16368SStephen M. Cameron * product = Marketing Name for the board 156edd16368SStephen M. Cameron * access = Address of the struct of function pointers 157edd16368SStephen M. Cameron */ 158edd16368SStephen M. Cameron static struct board_type products[] = { 159edd16368SStephen M. Cameron {0x3241103C, "Smart Array P212", &SA5_access}, 160edd16368SStephen M. Cameron {0x3243103C, "Smart Array P410", &SA5_access}, 161edd16368SStephen M. Cameron {0x3245103C, "Smart Array P410i", &SA5_access}, 162edd16368SStephen M. Cameron {0x3247103C, "Smart Array P411", &SA5_access}, 163edd16368SStephen M. Cameron {0x3249103C, "Smart Array P812", &SA5_access}, 164163dbcd8SMike Miller {0x324A103C, "Smart Array P712m", &SA5_access}, 165163dbcd8SMike Miller {0x324B103C, "Smart Array P711m", &SA5_access}, 1667d2cce58SStephen M. Cameron {0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */ 167fe0c9610SMike Miller {0x3350103C, "Smart Array P222", &SA5_access}, 168fe0c9610SMike Miller {0x3351103C, "Smart Array P420", &SA5_access}, 169fe0c9610SMike Miller {0x3352103C, "Smart Array P421", &SA5_access}, 170fe0c9610SMike Miller {0x3353103C, "Smart Array P822", &SA5_access}, 171fe0c9610SMike Miller {0x3354103C, "Smart Array P420i", &SA5_access}, 172fe0c9610SMike Miller {0x3355103C, "Smart Array P220i", &SA5_access}, 173fe0c9610SMike Miller {0x3356103C, "Smart Array P721m", &SA5_access}, 1741fd6c8e3SMike Miller {0x1921103C, "Smart Array P830i", &SA5_access}, 1751fd6c8e3SMike Miller {0x1922103C, "Smart Array P430", &SA5_access}, 1761fd6c8e3SMike Miller {0x1923103C, "Smart Array P431", &SA5_access}, 1771fd6c8e3SMike Miller {0x1924103C, "Smart Array P830", &SA5_access}, 1781fd6c8e3SMike Miller {0x1926103C, "Smart Array P731m", &SA5_access}, 1791fd6c8e3SMike Miller {0x1928103C, "Smart Array P230i", &SA5_access}, 1801fd6c8e3SMike Miller {0x1929103C, "Smart Array P530", &SA5_access}, 18127fb8137SDon Brace {0x21BD103C, "Smart Array P244br", &SA5_access}, 18227fb8137SDon Brace {0x21BE103C, "Smart Array P741m", &SA5_access}, 18327fb8137SDon Brace {0x21BF103C, "Smart HBA H240ar", &SA5_access}, 18427fb8137SDon Brace {0x21C0103C, "Smart Array P440ar", &SA5_access}, 185c8ae0ab1SDon Brace {0x21C1103C, "Smart Array P840ar", &SA5_access}, 18627fb8137SDon Brace {0x21C2103C, "Smart Array P440", &SA5_access}, 18727fb8137SDon Brace {0x21C3103C, "Smart Array P441", &SA5_access}, 18897b9f53dSMike Miller {0x21C4103C, "Smart Array", &SA5_access}, 18927fb8137SDon Brace {0x21C5103C, "Smart Array P841", &SA5_access}, 19027fb8137SDon Brace {0x21C6103C, "Smart HBA H244br", &SA5_access}, 19127fb8137SDon Brace {0x21C7103C, "Smart HBA H240", &SA5_access}, 19227fb8137SDon Brace {0x21C8103C, "Smart HBA H241", &SA5_access}, 19397b9f53dSMike Miller {0x21C9103C, "Smart Array", &SA5_access}, 19427fb8137SDon Brace {0x21CA103C, "Smart Array P246br", &SA5_access}, 19527fb8137SDon Brace {0x21CB103C, "Smart Array P840", &SA5_access}, 1963b7a45e5SJoe Handzik {0x21CC103C, "Smart Array", &SA5_access}, 1973b7a45e5SJoe Handzik {0x21CD103C, "Smart Array", &SA5_access}, 19827fb8137SDon Brace {0x21CE103C, "Smart HBA", &SA5_access}, 199fdfa4b6dSDon Brace {0x05809005, "SmartHBA-SA", &SA5_access}, 200cbb47dcbSDon Brace {0x05819005, "SmartHBA-SA 8i", &SA5_access}, 201cbb47dcbSDon Brace {0x05829005, "SmartHBA-SA 8i8e", &SA5_access}, 202cbb47dcbSDon Brace {0x05839005, "SmartHBA-SA 8e", &SA5_access}, 203cbb47dcbSDon Brace {0x05849005, "SmartHBA-SA 16i", &SA5_access}, 204cbb47dcbSDon Brace {0x05859005, "SmartHBA-SA 4i4e", &SA5_access}, 2058e616a5eSStephen M. Cameron {0x00761590, "HP Storage P1224 Array Controller", &SA5_access}, 2068e616a5eSStephen M. Cameron {0x00871590, "HP Storage P1224e Array Controller", &SA5_access}, 2078e616a5eSStephen M. Cameron {0x007D1590, "HP Storage P1228 Array Controller", &SA5_access}, 2088e616a5eSStephen M. Cameron {0x00881590, "HP Storage P1228e Array Controller", &SA5_access}, 2098e616a5eSStephen M. Cameron {0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access}, 210edd16368SStephen M. Cameron {0xFFFF103C, "Unknown Smart Array", &SA5_access}, 211edd16368SStephen M. Cameron }; 212edd16368SStephen M. Cameron 213d04e62b9SKevin Barnett static struct scsi_transport_template *hpsa_sas_transport_template; 214d04e62b9SKevin Barnett static int hpsa_add_sas_host(struct ctlr_info *h); 215d04e62b9SKevin Barnett static void hpsa_delete_sas_host(struct ctlr_info *h); 216d04e62b9SKevin Barnett static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node, 217d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *device); 218d04e62b9SKevin Barnett static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device); 219d04e62b9SKevin Barnett static struct hpsa_scsi_dev_t 220d04e62b9SKevin Barnett *hpsa_find_device_by_sas_rphy(struct ctlr_info *h, 221d04e62b9SKevin Barnett struct sas_rphy *rphy); 222d04e62b9SKevin Barnett 223a58e7e53SWebb Scales #define SCSI_CMD_BUSY ((struct scsi_cmnd *)&hpsa_cmd_busy) 224a58e7e53SWebb Scales static const struct scsi_cmnd hpsa_cmd_busy; 225a58e7e53SWebb Scales #define SCSI_CMD_IDLE ((struct scsi_cmnd *)&hpsa_cmd_idle) 226a58e7e53SWebb Scales static const struct scsi_cmnd hpsa_cmd_idle; 227edd16368SStephen M. Cameron static int number_of_controllers; 228edd16368SStephen M. Cameron 22910f66018SStephen M. Cameron static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id); 23010f66018SStephen M. Cameron static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id); 23142a91641SDon Brace static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg); 232edd16368SStephen M. Cameron 233edd16368SStephen M. Cameron #ifdef CONFIG_COMPAT 23442a91641SDon Brace static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, 23542a91641SDon Brace void __user *arg); 236edd16368SStephen M. Cameron #endif 237edd16368SStephen M. Cameron 238edd16368SStephen M. Cameron static void cmd_free(struct ctlr_info *h, struct CommandList *c); 239edd16368SStephen M. Cameron static struct CommandList *cmd_alloc(struct ctlr_info *h); 24073153fe5SWebb Scales static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c); 24173153fe5SWebb Scales static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h, 24273153fe5SWebb Scales struct scsi_cmnd *scmd); 243a2dac136SStephen M. Cameron static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 244b7bb24ebSStephen M. Cameron void *buff, size_t size, u16 page_code, unsigned char *scsi3addr, 245edd16368SStephen M. Cameron int cmd_type); 2462c143342SRobert Elliott static void hpsa_free_cmd_pool(struct ctlr_info *h); 247b7bb24ebSStephen M. Cameron #define VPD_PAGE (1 << 8) 248b48d9804SDon Brace #define HPSA_SIMPLE_ERROR_BITS 0x03 249edd16368SStephen M. Cameron 250f281233dSJeff Garzik static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd); 251a08a8471SStephen M. Cameron static void hpsa_scan_start(struct Scsi_Host *); 252a08a8471SStephen M. Cameron static int hpsa_scan_finished(struct Scsi_Host *sh, 253a08a8471SStephen M. Cameron unsigned long elapsed_time); 2547c0a0229SDon Brace static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth); 255edd16368SStephen M. Cameron 256edd16368SStephen M. Cameron static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd); 25775167d2cSStephen M. Cameron static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd); 258edd16368SStephen M. Cameron static int hpsa_slave_alloc(struct scsi_device *sdev); 25941ce4c35SStephen Cameron static int hpsa_slave_configure(struct scsi_device *sdev); 260edd16368SStephen M. Cameron static void hpsa_slave_destroy(struct scsi_device *sdev); 261edd16368SStephen M. Cameron 2628aa60681SDon Brace static void hpsa_update_scsi_devices(struct ctlr_info *h); 263edd16368SStephen M. Cameron static int check_for_unit_attention(struct ctlr_info *h, 264edd16368SStephen M. Cameron struct CommandList *c); 265edd16368SStephen M. Cameron static void check_ioctl_unit_attention(struct ctlr_info *h, 266edd16368SStephen M. Cameron struct CommandList *c); 267303932fdSDon Brace /* performant mode helper functions */ 268303932fdSDon Brace static void calc_bucket_map(int *bucket, int num_buckets, 2692b08b3e9SDon Brace int nsgs, int min_blocks, u32 *bucket_map); 270105a3dbcSRobert Elliott static void hpsa_free_performant_mode(struct ctlr_info *h); 271105a3dbcSRobert Elliott static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h); 272254f796bSMatt Gates static inline u32 next_command(struct ctlr_info *h, u8 q); 2736f039790SGreg Kroah-Hartman static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 2746f039790SGreg Kroah-Hartman u32 *cfg_base_addr, u64 *cfg_base_addr_index, 2751df8552aSStephen M. Cameron u64 *cfg_offset); 2766f039790SGreg Kroah-Hartman static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 2771df8552aSStephen M. Cameron unsigned long *memory_bar); 2786f039790SGreg Kroah-Hartman static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id); 2796f039790SGreg Kroah-Hartman static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 2806f039790SGreg Kroah-Hartman int wait_for_ready); 28175167d2cSStephen M. Cameron static inline void finish_cmd(struct CommandList *c); 282c706a795SRobert Elliott static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h); 283fe5389c8SStephen M. Cameron #define BOARD_NOT_READY 0 284fe5389c8SStephen M. Cameron #define BOARD_READY 1 28523100dd9SStephen M. Cameron static void hpsa_drain_accel_commands(struct ctlr_info *h); 28676438d08SStephen M. Cameron static void hpsa_flush_cache(struct ctlr_info *h); 287c349775eSScott Teel static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h, 288c349775eSScott Teel struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 28903383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk); 290080ef1ccSDon Brace static void hpsa_command_resubmit_worker(struct work_struct *work); 29125163bd5SWebb Scales static u32 lockup_detected(struct ctlr_info *h); 29225163bd5SWebb Scales static int detect_controller_lockup(struct ctlr_info *h); 293c2adae44SScott Teel static void hpsa_disable_rld_caching(struct ctlr_info *h); 294d04e62b9SKevin Barnett static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 295d04e62b9SKevin Barnett struct ReportExtendedLUNdata *buf, int bufsize); 296*8383278dSScott Teel static bool hpsa_vpd_page_supported(struct ctlr_info *h, 297*8383278dSScott Teel unsigned char scsi3addr[], u8 page); 29834592254SScott Teel static int hpsa_luns_changed(struct ctlr_info *h); 299ba74fdc4SDon Brace static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c, 300ba74fdc4SDon Brace struct hpsa_scsi_dev_t *dev, 301ba74fdc4SDon Brace unsigned char *scsi3addr); 302edd16368SStephen M. Cameron 303edd16368SStephen M. Cameron static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev) 304edd16368SStephen M. Cameron { 305edd16368SStephen M. Cameron unsigned long *priv = shost_priv(sdev->host); 306edd16368SStephen M. Cameron return (struct ctlr_info *) *priv; 307edd16368SStephen M. Cameron } 308edd16368SStephen M. Cameron 309a23513e8SStephen M. Cameron static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh) 310a23513e8SStephen M. Cameron { 311a23513e8SStephen M. Cameron unsigned long *priv = shost_priv(sh); 312a23513e8SStephen M. Cameron return (struct ctlr_info *) *priv; 313a23513e8SStephen M. Cameron } 314a23513e8SStephen M. Cameron 315a58e7e53SWebb Scales static inline bool hpsa_is_cmd_idle(struct CommandList *c) 316a58e7e53SWebb Scales { 317a58e7e53SWebb Scales return c->scsi_cmd == SCSI_CMD_IDLE; 318a58e7e53SWebb Scales } 319a58e7e53SWebb Scales 320d604f533SWebb Scales static inline bool hpsa_is_pending_event(struct CommandList *c) 321d604f533SWebb Scales { 322d604f533SWebb Scales return c->abort_pending || c->reset_pending; 323d604f533SWebb Scales } 324d604f533SWebb Scales 3259437ac43SStephen Cameron /* extract sense key, asc, and ascq from sense data. -1 means invalid. */ 3269437ac43SStephen Cameron static void decode_sense_data(const u8 *sense_data, int sense_data_len, 3279437ac43SStephen Cameron u8 *sense_key, u8 *asc, u8 *ascq) 3289437ac43SStephen Cameron { 3299437ac43SStephen Cameron struct scsi_sense_hdr sshdr; 3309437ac43SStephen Cameron bool rc; 3319437ac43SStephen Cameron 3329437ac43SStephen Cameron *sense_key = -1; 3339437ac43SStephen Cameron *asc = -1; 3349437ac43SStephen Cameron *ascq = -1; 3359437ac43SStephen Cameron 3369437ac43SStephen Cameron if (sense_data_len < 1) 3379437ac43SStephen Cameron return; 3389437ac43SStephen Cameron 3399437ac43SStephen Cameron rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr); 3409437ac43SStephen Cameron if (rc) { 3419437ac43SStephen Cameron *sense_key = sshdr.sense_key; 3429437ac43SStephen Cameron *asc = sshdr.asc; 3439437ac43SStephen Cameron *ascq = sshdr.ascq; 3449437ac43SStephen Cameron } 3459437ac43SStephen Cameron } 3469437ac43SStephen Cameron 347edd16368SStephen M. Cameron static int check_for_unit_attention(struct ctlr_info *h, 348edd16368SStephen M. Cameron struct CommandList *c) 349edd16368SStephen M. Cameron { 3509437ac43SStephen Cameron u8 sense_key, asc, ascq; 3519437ac43SStephen Cameron int sense_len; 3529437ac43SStephen Cameron 3539437ac43SStephen Cameron if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo)) 3549437ac43SStephen Cameron sense_len = sizeof(c->err_info->SenseInfo); 3559437ac43SStephen Cameron else 3569437ac43SStephen Cameron sense_len = c->err_info->SenseLen; 3579437ac43SStephen Cameron 3589437ac43SStephen Cameron decode_sense_data(c->err_info->SenseInfo, sense_len, 3599437ac43SStephen Cameron &sense_key, &asc, &ascq); 36081c27557SDon Brace if (sense_key != UNIT_ATTENTION || asc == 0xff) 361edd16368SStephen M. Cameron return 0; 362edd16368SStephen M. Cameron 3639437ac43SStephen Cameron switch (asc) { 364edd16368SStephen M. Cameron case STATE_CHANGED: 3659437ac43SStephen Cameron dev_warn(&h->pdev->dev, 3662946e82bSRobert Elliott "%s: a state change detected, command retried\n", 3672946e82bSRobert Elliott h->devname); 368edd16368SStephen M. Cameron break; 369edd16368SStephen M. Cameron case LUN_FAILED: 3707f73695aSStephen M. Cameron dev_warn(&h->pdev->dev, 3712946e82bSRobert Elliott "%s: LUN failure detected\n", h->devname); 372edd16368SStephen M. Cameron break; 373edd16368SStephen M. Cameron case REPORT_LUNS_CHANGED: 3747f73695aSStephen M. Cameron dev_warn(&h->pdev->dev, 3752946e82bSRobert Elliott "%s: report LUN data changed\n", h->devname); 376edd16368SStephen M. Cameron /* 3774f4eb9f1SScott Teel * Note: this REPORT_LUNS_CHANGED condition only occurs on the external 3784f4eb9f1SScott Teel * target (array) devices. 379edd16368SStephen M. Cameron */ 380edd16368SStephen M. Cameron break; 381edd16368SStephen M. Cameron case POWER_OR_RESET: 3822946e82bSRobert Elliott dev_warn(&h->pdev->dev, 3832946e82bSRobert Elliott "%s: a power on or device reset detected\n", 3842946e82bSRobert Elliott h->devname); 385edd16368SStephen M. Cameron break; 386edd16368SStephen M. Cameron case UNIT_ATTENTION_CLEARED: 3872946e82bSRobert Elliott dev_warn(&h->pdev->dev, 3882946e82bSRobert Elliott "%s: unit attention cleared by another initiator\n", 3892946e82bSRobert Elliott h->devname); 390edd16368SStephen M. Cameron break; 391edd16368SStephen M. Cameron default: 3922946e82bSRobert Elliott dev_warn(&h->pdev->dev, 3932946e82bSRobert Elliott "%s: unknown unit attention detected\n", 3942946e82bSRobert Elliott h->devname); 395edd16368SStephen M. Cameron break; 396edd16368SStephen M. Cameron } 397edd16368SStephen M. Cameron return 1; 398edd16368SStephen M. Cameron } 399edd16368SStephen M. Cameron 400852af20aSMatt Bondurant static int check_for_busy(struct ctlr_info *h, struct CommandList *c) 401852af20aSMatt Bondurant { 402852af20aSMatt Bondurant if (c->err_info->CommandStatus != CMD_TARGET_STATUS || 403852af20aSMatt Bondurant (c->err_info->ScsiStatus != SAM_STAT_BUSY && 404852af20aSMatt Bondurant c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL)) 405852af20aSMatt Bondurant return 0; 406852af20aSMatt Bondurant dev_warn(&h->pdev->dev, HPSA "device busy"); 407852af20aSMatt Bondurant return 1; 408852af20aSMatt Bondurant } 409852af20aSMatt Bondurant 410e985c58fSStephen Cameron static u32 lockup_detected(struct ctlr_info *h); 411e985c58fSStephen Cameron static ssize_t host_show_lockup_detected(struct device *dev, 412e985c58fSStephen Cameron struct device_attribute *attr, char *buf) 413e985c58fSStephen Cameron { 414e985c58fSStephen Cameron int ld; 415e985c58fSStephen Cameron struct ctlr_info *h; 416e985c58fSStephen Cameron struct Scsi_Host *shost = class_to_shost(dev); 417e985c58fSStephen Cameron 418e985c58fSStephen Cameron h = shost_to_hba(shost); 419e985c58fSStephen Cameron ld = lockup_detected(h); 420e985c58fSStephen Cameron 421e985c58fSStephen Cameron return sprintf(buf, "ld=%d\n", ld); 422e985c58fSStephen Cameron } 423e985c58fSStephen Cameron 424da0697bdSScott Teel static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev, 425da0697bdSScott Teel struct device_attribute *attr, 426da0697bdSScott Teel const char *buf, size_t count) 427da0697bdSScott Teel { 428da0697bdSScott Teel int status, len; 429da0697bdSScott Teel struct ctlr_info *h; 430da0697bdSScott Teel struct Scsi_Host *shost = class_to_shost(dev); 431da0697bdSScott Teel char tmpbuf[10]; 432da0697bdSScott Teel 433da0697bdSScott Teel if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO)) 434da0697bdSScott Teel return -EACCES; 435da0697bdSScott Teel len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count; 436da0697bdSScott Teel strncpy(tmpbuf, buf, len); 437da0697bdSScott Teel tmpbuf[len] = '\0'; 438da0697bdSScott Teel if (sscanf(tmpbuf, "%d", &status) != 1) 439da0697bdSScott Teel return -EINVAL; 440da0697bdSScott Teel h = shost_to_hba(shost); 441da0697bdSScott Teel h->acciopath_status = !!status; 442da0697bdSScott Teel dev_warn(&h->pdev->dev, 443da0697bdSScott Teel "hpsa: HP SSD Smart Path %s via sysfs update.\n", 444da0697bdSScott Teel h->acciopath_status ? "enabled" : "disabled"); 445da0697bdSScott Teel return count; 446da0697bdSScott Teel } 447da0697bdSScott Teel 4482ba8bfc8SStephen M. Cameron static ssize_t host_store_raid_offload_debug(struct device *dev, 4492ba8bfc8SStephen M. Cameron struct device_attribute *attr, 4502ba8bfc8SStephen M. Cameron const char *buf, size_t count) 4512ba8bfc8SStephen M. Cameron { 4522ba8bfc8SStephen M. Cameron int debug_level, len; 4532ba8bfc8SStephen M. Cameron struct ctlr_info *h; 4542ba8bfc8SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 4552ba8bfc8SStephen M. Cameron char tmpbuf[10]; 4562ba8bfc8SStephen M. Cameron 4572ba8bfc8SStephen M. Cameron if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO)) 4582ba8bfc8SStephen M. Cameron return -EACCES; 4592ba8bfc8SStephen M. Cameron len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count; 4602ba8bfc8SStephen M. Cameron strncpy(tmpbuf, buf, len); 4612ba8bfc8SStephen M. Cameron tmpbuf[len] = '\0'; 4622ba8bfc8SStephen M. Cameron if (sscanf(tmpbuf, "%d", &debug_level) != 1) 4632ba8bfc8SStephen M. Cameron return -EINVAL; 4642ba8bfc8SStephen M. Cameron if (debug_level < 0) 4652ba8bfc8SStephen M. Cameron debug_level = 0; 4662ba8bfc8SStephen M. Cameron h = shost_to_hba(shost); 4672ba8bfc8SStephen M. Cameron h->raid_offload_debug = debug_level; 4682ba8bfc8SStephen M. Cameron dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n", 4692ba8bfc8SStephen M. Cameron h->raid_offload_debug); 4702ba8bfc8SStephen M. Cameron return count; 4712ba8bfc8SStephen M. Cameron } 4722ba8bfc8SStephen M. Cameron 473edd16368SStephen M. Cameron static ssize_t host_store_rescan(struct device *dev, 474edd16368SStephen M. Cameron struct device_attribute *attr, 475edd16368SStephen M. Cameron const char *buf, size_t count) 476edd16368SStephen M. Cameron { 477edd16368SStephen M. Cameron struct ctlr_info *h; 478edd16368SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 479a23513e8SStephen M. Cameron h = shost_to_hba(shost); 48031468401SMike Miller hpsa_scan_start(h->scsi_host); 481edd16368SStephen M. Cameron return count; 482edd16368SStephen M. Cameron } 483edd16368SStephen M. Cameron 484d28ce020SStephen M. Cameron static ssize_t host_show_firmware_revision(struct device *dev, 485d28ce020SStephen M. Cameron struct device_attribute *attr, char *buf) 486d28ce020SStephen M. Cameron { 487d28ce020SStephen M. Cameron struct ctlr_info *h; 488d28ce020SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 489d28ce020SStephen M. Cameron unsigned char *fwrev; 490d28ce020SStephen M. Cameron 491d28ce020SStephen M. Cameron h = shost_to_hba(shost); 492d28ce020SStephen M. Cameron if (!h->hba_inquiry_data) 493d28ce020SStephen M. Cameron return 0; 494d28ce020SStephen M. Cameron fwrev = &h->hba_inquiry_data[32]; 495d28ce020SStephen M. Cameron return snprintf(buf, 20, "%c%c%c%c\n", 496d28ce020SStephen M. Cameron fwrev[0], fwrev[1], fwrev[2], fwrev[3]); 497d28ce020SStephen M. Cameron } 498d28ce020SStephen M. Cameron 49994a13649SStephen M. Cameron static ssize_t host_show_commands_outstanding(struct device *dev, 50094a13649SStephen M. Cameron struct device_attribute *attr, char *buf) 50194a13649SStephen M. Cameron { 50294a13649SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 50394a13649SStephen M. Cameron struct ctlr_info *h = shost_to_hba(shost); 50494a13649SStephen M. Cameron 5050cbf768eSStephen M. Cameron return snprintf(buf, 20, "%d\n", 5060cbf768eSStephen M. Cameron atomic_read(&h->commands_outstanding)); 50794a13649SStephen M. Cameron } 50894a13649SStephen M. Cameron 509745a7a25SStephen M. Cameron static ssize_t host_show_transport_mode(struct device *dev, 510745a7a25SStephen M. Cameron struct device_attribute *attr, char *buf) 511745a7a25SStephen M. Cameron { 512745a7a25SStephen M. Cameron struct ctlr_info *h; 513745a7a25SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 514745a7a25SStephen M. Cameron 515745a7a25SStephen M. Cameron h = shost_to_hba(shost); 516745a7a25SStephen M. Cameron return snprintf(buf, 20, "%s\n", 517960a30e7SStephen M. Cameron h->transMethod & CFGTBL_Trans_Performant ? 518745a7a25SStephen M. Cameron "performant" : "simple"); 519745a7a25SStephen M. Cameron } 520745a7a25SStephen M. Cameron 521da0697bdSScott Teel static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev, 522da0697bdSScott Teel struct device_attribute *attr, char *buf) 523da0697bdSScott Teel { 524da0697bdSScott Teel struct ctlr_info *h; 525da0697bdSScott Teel struct Scsi_Host *shost = class_to_shost(dev); 526da0697bdSScott Teel 527da0697bdSScott Teel h = shost_to_hba(shost); 528da0697bdSScott Teel return snprintf(buf, 30, "HP SSD Smart Path %s\n", 529da0697bdSScott Teel (h->acciopath_status == 1) ? "enabled" : "disabled"); 530da0697bdSScott Teel } 531da0697bdSScott Teel 53246380786SStephen M. Cameron /* List of controllers which cannot be hard reset on kexec with reset_devices */ 533941b1cdaSStephen M. Cameron static u32 unresettable_controller[] = { 534941b1cdaSStephen M. Cameron 0x324a103C, /* Smart Array P712m */ 535941b1cdaSStephen M. Cameron 0x324b103C, /* Smart Array P711m */ 536941b1cdaSStephen M. Cameron 0x3223103C, /* Smart Array P800 */ 537941b1cdaSStephen M. Cameron 0x3234103C, /* Smart Array P400 */ 538941b1cdaSStephen M. Cameron 0x3235103C, /* Smart Array P400i */ 539941b1cdaSStephen M. Cameron 0x3211103C, /* Smart Array E200i */ 540941b1cdaSStephen M. Cameron 0x3212103C, /* Smart Array E200 */ 541941b1cdaSStephen M. Cameron 0x3213103C, /* Smart Array E200i */ 542941b1cdaSStephen M. Cameron 0x3214103C, /* Smart Array E200i */ 543941b1cdaSStephen M. Cameron 0x3215103C, /* Smart Array E200i */ 544941b1cdaSStephen M. Cameron 0x3237103C, /* Smart Array E500 */ 545941b1cdaSStephen M. Cameron 0x323D103C, /* Smart Array P700m */ 5467af0abbcSTomas Henzl 0x40800E11, /* Smart Array 5i */ 547941b1cdaSStephen M. Cameron 0x409C0E11, /* Smart Array 6400 */ 548941b1cdaSStephen M. Cameron 0x409D0E11, /* Smart Array 6400 EM */ 5495a4f934eSTomas Henzl 0x40700E11, /* Smart Array 5300 */ 5505a4f934eSTomas Henzl 0x40820E11, /* Smart Array 532 */ 5515a4f934eSTomas Henzl 0x40830E11, /* Smart Array 5312 */ 5525a4f934eSTomas Henzl 0x409A0E11, /* Smart Array 641 */ 5535a4f934eSTomas Henzl 0x409B0E11, /* Smart Array 642 */ 5545a4f934eSTomas Henzl 0x40910E11, /* Smart Array 6i */ 555941b1cdaSStephen M. Cameron }; 556941b1cdaSStephen M. Cameron 55746380786SStephen M. Cameron /* List of controllers which cannot even be soft reset */ 55846380786SStephen M. Cameron static u32 soft_unresettable_controller[] = { 5597af0abbcSTomas Henzl 0x40800E11, /* Smart Array 5i */ 5605a4f934eSTomas Henzl 0x40700E11, /* Smart Array 5300 */ 5615a4f934eSTomas Henzl 0x40820E11, /* Smart Array 532 */ 5625a4f934eSTomas Henzl 0x40830E11, /* Smart Array 5312 */ 5635a4f934eSTomas Henzl 0x409A0E11, /* Smart Array 641 */ 5645a4f934eSTomas Henzl 0x409B0E11, /* Smart Array 642 */ 5655a4f934eSTomas Henzl 0x40910E11, /* Smart Array 6i */ 56646380786SStephen M. Cameron /* Exclude 640x boards. These are two pci devices in one slot 56746380786SStephen M. Cameron * which share a battery backed cache module. One controls the 56846380786SStephen M. Cameron * cache, the other accesses the cache through the one that controls 56946380786SStephen M. Cameron * it. If we reset the one controlling the cache, the other will 57046380786SStephen M. Cameron * likely not be happy. Just forbid resetting this conjoined mess. 57146380786SStephen M. Cameron * The 640x isn't really supported by hpsa anyway. 57246380786SStephen M. Cameron */ 57346380786SStephen M. Cameron 0x409C0E11, /* Smart Array 6400 */ 57446380786SStephen M. Cameron 0x409D0E11, /* Smart Array 6400 EM */ 57546380786SStephen M. Cameron }; 57646380786SStephen M. Cameron 5779b5c48c2SStephen Cameron static u32 needs_abort_tags_swizzled[] = { 5789b5c48c2SStephen Cameron 0x323D103C, /* Smart Array P700m */ 5799b5c48c2SStephen Cameron 0x324a103C, /* Smart Array P712m */ 5809b5c48c2SStephen Cameron 0x324b103C, /* SmartArray P711m */ 5819b5c48c2SStephen Cameron }; 5829b5c48c2SStephen Cameron 5839b5c48c2SStephen Cameron static int board_id_in_array(u32 a[], int nelems, u32 board_id) 584941b1cdaSStephen M. Cameron { 585941b1cdaSStephen M. Cameron int i; 586941b1cdaSStephen M. Cameron 5879b5c48c2SStephen Cameron for (i = 0; i < nelems; i++) 5889b5c48c2SStephen Cameron if (a[i] == board_id) 589941b1cdaSStephen M. Cameron return 1; 5909b5c48c2SStephen Cameron return 0; 5919b5c48c2SStephen Cameron } 5929b5c48c2SStephen Cameron 5939b5c48c2SStephen Cameron static int ctlr_is_hard_resettable(u32 board_id) 5949b5c48c2SStephen Cameron { 5959b5c48c2SStephen Cameron return !board_id_in_array(unresettable_controller, 5969b5c48c2SStephen Cameron ARRAY_SIZE(unresettable_controller), board_id); 597941b1cdaSStephen M. Cameron } 598941b1cdaSStephen M. Cameron 59946380786SStephen M. Cameron static int ctlr_is_soft_resettable(u32 board_id) 60046380786SStephen M. Cameron { 6019b5c48c2SStephen Cameron return !board_id_in_array(soft_unresettable_controller, 6029b5c48c2SStephen Cameron ARRAY_SIZE(soft_unresettable_controller), board_id); 60346380786SStephen M. Cameron } 60446380786SStephen M. Cameron 60546380786SStephen M. Cameron static int ctlr_is_resettable(u32 board_id) 60646380786SStephen M. Cameron { 60746380786SStephen M. Cameron return ctlr_is_hard_resettable(board_id) || 60846380786SStephen M. Cameron ctlr_is_soft_resettable(board_id); 60946380786SStephen M. Cameron } 61046380786SStephen M. Cameron 6119b5c48c2SStephen Cameron static int ctlr_needs_abort_tags_swizzled(u32 board_id) 6129b5c48c2SStephen Cameron { 6139b5c48c2SStephen Cameron return board_id_in_array(needs_abort_tags_swizzled, 6149b5c48c2SStephen Cameron ARRAY_SIZE(needs_abort_tags_swizzled), board_id); 6159b5c48c2SStephen Cameron } 6169b5c48c2SStephen Cameron 617941b1cdaSStephen M. Cameron static ssize_t host_show_resettable(struct device *dev, 618941b1cdaSStephen M. Cameron struct device_attribute *attr, char *buf) 619941b1cdaSStephen M. Cameron { 620941b1cdaSStephen M. Cameron struct ctlr_info *h; 621941b1cdaSStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 622941b1cdaSStephen M. Cameron 623941b1cdaSStephen M. Cameron h = shost_to_hba(shost); 62446380786SStephen M. Cameron return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id)); 625941b1cdaSStephen M. Cameron } 626941b1cdaSStephen M. Cameron 627edd16368SStephen M. Cameron static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[]) 628edd16368SStephen M. Cameron { 629edd16368SStephen M. Cameron return (scsi3addr[3] & 0xC0) == 0x40; 630edd16368SStephen M. Cameron } 631edd16368SStephen M. Cameron 632f2ef0ce7SRobert Elliott static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6", 6337c59a0d4SDon Brace "1(+0)ADM", "UNKNOWN", "PHYS DRV" 634edd16368SStephen M. Cameron }; 6356b80b18fSScott Teel #define HPSA_RAID_0 0 6366b80b18fSScott Teel #define HPSA_RAID_4 1 6376b80b18fSScott Teel #define HPSA_RAID_1 2 /* also used for RAID 10 */ 6386b80b18fSScott Teel #define HPSA_RAID_5 3 /* also used for RAID 50 */ 6396b80b18fSScott Teel #define HPSA_RAID_51 4 6406b80b18fSScott Teel #define HPSA_RAID_6 5 /* also used for RAID 60 */ 6416b80b18fSScott Teel #define HPSA_RAID_ADM 6 /* also used for RAID 1+0 ADM */ 6427c59a0d4SDon Brace #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 2) 6437c59a0d4SDon Brace #define PHYSICAL_DRIVE (ARRAY_SIZE(raid_label) - 1) 644edd16368SStephen M. Cameron 645f3f01730SKevin Barnett static inline bool is_logical_device(struct hpsa_scsi_dev_t *device) 646f3f01730SKevin Barnett { 647f3f01730SKevin Barnett return !device->physical_device; 648f3f01730SKevin Barnett } 649edd16368SStephen M. Cameron 650edd16368SStephen M. Cameron static ssize_t raid_level_show(struct device *dev, 651edd16368SStephen M. Cameron struct device_attribute *attr, char *buf) 652edd16368SStephen M. Cameron { 653edd16368SStephen M. Cameron ssize_t l = 0; 65482a72c0aSStephen M. Cameron unsigned char rlevel; 655edd16368SStephen M. Cameron struct ctlr_info *h; 656edd16368SStephen M. Cameron struct scsi_device *sdev; 657edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *hdev; 658edd16368SStephen M. Cameron unsigned long flags; 659edd16368SStephen M. Cameron 660edd16368SStephen M. Cameron sdev = to_scsi_device(dev); 661edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 662edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 663edd16368SStephen M. Cameron hdev = sdev->hostdata; 664edd16368SStephen M. Cameron if (!hdev) { 665edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 666edd16368SStephen M. Cameron return -ENODEV; 667edd16368SStephen M. Cameron } 668edd16368SStephen M. Cameron 669edd16368SStephen M. Cameron /* Is this even a logical drive? */ 670f3f01730SKevin Barnett if (!is_logical_device(hdev)) { 671edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 672edd16368SStephen M. Cameron l = snprintf(buf, PAGE_SIZE, "N/A\n"); 673edd16368SStephen M. Cameron return l; 674edd16368SStephen M. Cameron } 675edd16368SStephen M. Cameron 676edd16368SStephen M. Cameron rlevel = hdev->raid_level; 677edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 67882a72c0aSStephen M. Cameron if (rlevel > RAID_UNKNOWN) 679edd16368SStephen M. Cameron rlevel = RAID_UNKNOWN; 680edd16368SStephen M. Cameron l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]); 681edd16368SStephen M. Cameron return l; 682edd16368SStephen M. Cameron } 683edd16368SStephen M. Cameron 684edd16368SStephen M. Cameron static ssize_t lunid_show(struct device *dev, 685edd16368SStephen M. Cameron struct device_attribute *attr, char *buf) 686edd16368SStephen M. Cameron { 687edd16368SStephen M. Cameron struct ctlr_info *h; 688edd16368SStephen M. Cameron struct scsi_device *sdev; 689edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *hdev; 690edd16368SStephen M. Cameron unsigned long flags; 691edd16368SStephen M. Cameron unsigned char lunid[8]; 692edd16368SStephen M. Cameron 693edd16368SStephen M. Cameron sdev = to_scsi_device(dev); 694edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 695edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 696edd16368SStephen M. Cameron hdev = sdev->hostdata; 697edd16368SStephen M. Cameron if (!hdev) { 698edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 699edd16368SStephen M. Cameron return -ENODEV; 700edd16368SStephen M. Cameron } 701edd16368SStephen M. Cameron memcpy(lunid, hdev->scsi3addr, sizeof(lunid)); 702edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 703edd16368SStephen M. Cameron return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 704edd16368SStephen M. Cameron lunid[0], lunid[1], lunid[2], lunid[3], 705edd16368SStephen M. Cameron lunid[4], lunid[5], lunid[6], lunid[7]); 706edd16368SStephen M. Cameron } 707edd16368SStephen M. Cameron 708edd16368SStephen M. Cameron static ssize_t unique_id_show(struct device *dev, 709edd16368SStephen M. Cameron struct device_attribute *attr, char *buf) 710edd16368SStephen M. Cameron { 711edd16368SStephen M. Cameron struct ctlr_info *h; 712edd16368SStephen M. Cameron struct scsi_device *sdev; 713edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *hdev; 714edd16368SStephen M. Cameron unsigned long flags; 715edd16368SStephen M. Cameron unsigned char sn[16]; 716edd16368SStephen M. Cameron 717edd16368SStephen M. Cameron sdev = to_scsi_device(dev); 718edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 719edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 720edd16368SStephen M. Cameron hdev = sdev->hostdata; 721edd16368SStephen M. Cameron if (!hdev) { 722edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 723edd16368SStephen M. Cameron return -ENODEV; 724edd16368SStephen M. Cameron } 725edd16368SStephen M. Cameron memcpy(sn, hdev->device_id, sizeof(sn)); 726edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 727edd16368SStephen M. Cameron return snprintf(buf, 16 * 2 + 2, 728edd16368SStephen M. Cameron "%02X%02X%02X%02X%02X%02X%02X%02X" 729edd16368SStephen M. Cameron "%02X%02X%02X%02X%02X%02X%02X%02X\n", 730edd16368SStephen M. Cameron sn[0], sn[1], sn[2], sn[3], 731edd16368SStephen M. Cameron sn[4], sn[5], sn[6], sn[7], 732edd16368SStephen M. Cameron sn[8], sn[9], sn[10], sn[11], 733edd16368SStephen M. Cameron sn[12], sn[13], sn[14], sn[15]); 734edd16368SStephen M. Cameron } 735edd16368SStephen M. Cameron 736ded1be4aSJoseph T Handzik static ssize_t sas_address_show(struct device *dev, 737ded1be4aSJoseph T Handzik struct device_attribute *attr, char *buf) 738ded1be4aSJoseph T Handzik { 739ded1be4aSJoseph T Handzik struct ctlr_info *h; 740ded1be4aSJoseph T Handzik struct scsi_device *sdev; 741ded1be4aSJoseph T Handzik struct hpsa_scsi_dev_t *hdev; 742ded1be4aSJoseph T Handzik unsigned long flags; 743ded1be4aSJoseph T Handzik u64 sas_address; 744ded1be4aSJoseph T Handzik 745ded1be4aSJoseph T Handzik sdev = to_scsi_device(dev); 746ded1be4aSJoseph T Handzik h = sdev_to_hba(sdev); 747ded1be4aSJoseph T Handzik spin_lock_irqsave(&h->lock, flags); 748ded1be4aSJoseph T Handzik hdev = sdev->hostdata; 749ded1be4aSJoseph T Handzik if (!hdev || is_logical_device(hdev) || !hdev->expose_device) { 750ded1be4aSJoseph T Handzik spin_unlock_irqrestore(&h->lock, flags); 751ded1be4aSJoseph T Handzik return -ENODEV; 752ded1be4aSJoseph T Handzik } 753ded1be4aSJoseph T Handzik sas_address = hdev->sas_address; 754ded1be4aSJoseph T Handzik spin_unlock_irqrestore(&h->lock, flags); 755ded1be4aSJoseph T Handzik 756ded1be4aSJoseph T Handzik return snprintf(buf, PAGE_SIZE, "0x%016llx\n", sas_address); 757ded1be4aSJoseph T Handzik } 758ded1be4aSJoseph T Handzik 759c1988684SScott Teel static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev, 760c1988684SScott Teel struct device_attribute *attr, char *buf) 761c1988684SScott Teel { 762c1988684SScott Teel struct ctlr_info *h; 763c1988684SScott Teel struct scsi_device *sdev; 764c1988684SScott Teel struct hpsa_scsi_dev_t *hdev; 765c1988684SScott Teel unsigned long flags; 766c1988684SScott Teel int offload_enabled; 767c1988684SScott Teel 768c1988684SScott Teel sdev = to_scsi_device(dev); 769c1988684SScott Teel h = sdev_to_hba(sdev); 770c1988684SScott Teel spin_lock_irqsave(&h->lock, flags); 771c1988684SScott Teel hdev = sdev->hostdata; 772c1988684SScott Teel if (!hdev) { 773c1988684SScott Teel spin_unlock_irqrestore(&h->lock, flags); 774c1988684SScott Teel return -ENODEV; 775c1988684SScott Teel } 776c1988684SScott Teel offload_enabled = hdev->offload_enabled; 777c1988684SScott Teel spin_unlock_irqrestore(&h->lock, flags); 778c1988684SScott Teel return snprintf(buf, 20, "%d\n", offload_enabled); 779c1988684SScott Teel } 780c1988684SScott Teel 7818270b862SJoe Handzik #define MAX_PATHS 8 7828270b862SJoe Handzik static ssize_t path_info_show(struct device *dev, 7838270b862SJoe Handzik struct device_attribute *attr, char *buf) 7848270b862SJoe Handzik { 7858270b862SJoe Handzik struct ctlr_info *h; 7868270b862SJoe Handzik struct scsi_device *sdev; 7878270b862SJoe Handzik struct hpsa_scsi_dev_t *hdev; 7888270b862SJoe Handzik unsigned long flags; 7898270b862SJoe Handzik int i; 7908270b862SJoe Handzik int output_len = 0; 7918270b862SJoe Handzik u8 box; 7928270b862SJoe Handzik u8 bay; 7938270b862SJoe Handzik u8 path_map_index = 0; 7948270b862SJoe Handzik char *active; 7958270b862SJoe Handzik unsigned char phys_connector[2]; 7968270b862SJoe Handzik 7978270b862SJoe Handzik sdev = to_scsi_device(dev); 7988270b862SJoe Handzik h = sdev_to_hba(sdev); 7998270b862SJoe Handzik spin_lock_irqsave(&h->devlock, flags); 8008270b862SJoe Handzik hdev = sdev->hostdata; 8018270b862SJoe Handzik if (!hdev) { 8028270b862SJoe Handzik spin_unlock_irqrestore(&h->devlock, flags); 8038270b862SJoe Handzik return -ENODEV; 8048270b862SJoe Handzik } 8058270b862SJoe Handzik 8068270b862SJoe Handzik bay = hdev->bay; 8078270b862SJoe Handzik for (i = 0; i < MAX_PATHS; i++) { 8088270b862SJoe Handzik path_map_index = 1<<i; 8098270b862SJoe Handzik if (i == hdev->active_path_index) 8108270b862SJoe Handzik active = "Active"; 8118270b862SJoe Handzik else if (hdev->path_map & path_map_index) 8128270b862SJoe Handzik active = "Inactive"; 8138270b862SJoe Handzik else 8148270b862SJoe Handzik continue; 8158270b862SJoe Handzik 8161faf072cSRasmus Villemoes output_len += scnprintf(buf + output_len, 8171faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8181faf072cSRasmus Villemoes "[%d:%d:%d:%d] %20.20s ", 8198270b862SJoe Handzik h->scsi_host->host_no, 8208270b862SJoe Handzik hdev->bus, hdev->target, hdev->lun, 8218270b862SJoe Handzik scsi_device_type(hdev->devtype)); 8228270b862SJoe Handzik 823cca8f13bSDon Brace if (hdev->devtype == TYPE_RAID || is_logical_device(hdev)) { 8242708f295SDon Brace output_len += scnprintf(buf + output_len, 8251faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8261faf072cSRasmus Villemoes "%s\n", active); 8278270b862SJoe Handzik continue; 8288270b862SJoe Handzik } 8298270b862SJoe Handzik 8308270b862SJoe Handzik box = hdev->box[i]; 8318270b862SJoe Handzik memcpy(&phys_connector, &hdev->phys_connector[i], 8328270b862SJoe Handzik sizeof(phys_connector)); 8338270b862SJoe Handzik if (phys_connector[0] < '0') 8348270b862SJoe Handzik phys_connector[0] = '0'; 8358270b862SJoe Handzik if (phys_connector[1] < '0') 8368270b862SJoe Handzik phys_connector[1] = '0'; 8372708f295SDon Brace output_len += scnprintf(buf + output_len, 8381faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8398270b862SJoe Handzik "PORT: %.2s ", 8408270b862SJoe Handzik phys_connector); 841af15ed36SDon Brace if ((hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC) && 842af15ed36SDon Brace hdev->expose_device) { 8438270b862SJoe Handzik if (box == 0 || box == 0xFF) { 8442708f295SDon Brace output_len += scnprintf(buf + output_len, 8451faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8468270b862SJoe Handzik "BAY: %hhu %s\n", 8478270b862SJoe Handzik bay, active); 8488270b862SJoe Handzik } else { 8492708f295SDon Brace output_len += scnprintf(buf + output_len, 8501faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8518270b862SJoe Handzik "BOX: %hhu BAY: %hhu %s\n", 8528270b862SJoe Handzik box, bay, active); 8538270b862SJoe Handzik } 8548270b862SJoe Handzik } else if (box != 0 && box != 0xFF) { 8552708f295SDon Brace output_len += scnprintf(buf + output_len, 8561faf072cSRasmus Villemoes PAGE_SIZE - output_len, "BOX: %hhu %s\n", 8578270b862SJoe Handzik box, active); 8588270b862SJoe Handzik } else 8592708f295SDon Brace output_len += scnprintf(buf + output_len, 8601faf072cSRasmus Villemoes PAGE_SIZE - output_len, "%s\n", active); 8618270b862SJoe Handzik } 8628270b862SJoe Handzik 8638270b862SJoe Handzik spin_unlock_irqrestore(&h->devlock, flags); 8641faf072cSRasmus Villemoes return output_len; 8658270b862SJoe Handzik } 8668270b862SJoe Handzik 8673f5eac3aSStephen M. Cameron static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL); 8683f5eac3aSStephen M. Cameron static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL); 8693f5eac3aSStephen M. Cameron static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL); 8703f5eac3aSStephen M. Cameron static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan); 871ded1be4aSJoseph T Handzik static DEVICE_ATTR(sas_address, S_IRUGO, sas_address_show, NULL); 872c1988684SScott Teel static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO, 873c1988684SScott Teel host_show_hp_ssd_smart_path_enabled, NULL); 8748270b862SJoe Handzik static DEVICE_ATTR(path_info, S_IRUGO, path_info_show, NULL); 875da0697bdSScott Teel static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH, 876da0697bdSScott Teel host_show_hp_ssd_smart_path_status, 877da0697bdSScott Teel host_store_hp_ssd_smart_path_status); 8782ba8bfc8SStephen M. Cameron static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL, 8792ba8bfc8SStephen M. Cameron host_store_raid_offload_debug); 8803f5eac3aSStephen M. Cameron static DEVICE_ATTR(firmware_revision, S_IRUGO, 8813f5eac3aSStephen M. Cameron host_show_firmware_revision, NULL); 8823f5eac3aSStephen M. Cameron static DEVICE_ATTR(commands_outstanding, S_IRUGO, 8833f5eac3aSStephen M. Cameron host_show_commands_outstanding, NULL); 8843f5eac3aSStephen M. Cameron static DEVICE_ATTR(transport_mode, S_IRUGO, 8853f5eac3aSStephen M. Cameron host_show_transport_mode, NULL); 886941b1cdaSStephen M. Cameron static DEVICE_ATTR(resettable, S_IRUGO, 887941b1cdaSStephen M. Cameron host_show_resettable, NULL); 888e985c58fSStephen Cameron static DEVICE_ATTR(lockup_detected, S_IRUGO, 889e985c58fSStephen Cameron host_show_lockup_detected, NULL); 8903f5eac3aSStephen M. Cameron 8913f5eac3aSStephen M. Cameron static struct device_attribute *hpsa_sdev_attrs[] = { 8923f5eac3aSStephen M. Cameron &dev_attr_raid_level, 8933f5eac3aSStephen M. Cameron &dev_attr_lunid, 8943f5eac3aSStephen M. Cameron &dev_attr_unique_id, 895c1988684SScott Teel &dev_attr_hp_ssd_smart_path_enabled, 8968270b862SJoe Handzik &dev_attr_path_info, 897ded1be4aSJoseph T Handzik &dev_attr_sas_address, 8983f5eac3aSStephen M. Cameron NULL, 8993f5eac3aSStephen M. Cameron }; 9003f5eac3aSStephen M. Cameron 9013f5eac3aSStephen M. Cameron static struct device_attribute *hpsa_shost_attrs[] = { 9023f5eac3aSStephen M. Cameron &dev_attr_rescan, 9033f5eac3aSStephen M. Cameron &dev_attr_firmware_revision, 9043f5eac3aSStephen M. Cameron &dev_attr_commands_outstanding, 9053f5eac3aSStephen M. Cameron &dev_attr_transport_mode, 906941b1cdaSStephen M. Cameron &dev_attr_resettable, 907da0697bdSScott Teel &dev_attr_hp_ssd_smart_path_status, 9082ba8bfc8SStephen M. Cameron &dev_attr_raid_offload_debug, 909fb53c439STomas Henzl &dev_attr_lockup_detected, 9103f5eac3aSStephen M. Cameron NULL, 9113f5eac3aSStephen M. Cameron }; 9123f5eac3aSStephen M. Cameron 91341ce4c35SStephen Cameron #define HPSA_NRESERVED_CMDS (HPSA_CMDS_RESERVED_FOR_ABORTS + \ 91441ce4c35SStephen Cameron HPSA_CMDS_RESERVED_FOR_DRIVER + HPSA_MAX_CONCURRENT_PASSTHRUS) 91541ce4c35SStephen Cameron 9163f5eac3aSStephen M. Cameron static struct scsi_host_template hpsa_driver_template = { 9173f5eac3aSStephen M. Cameron .module = THIS_MODULE, 918f79cfec6SStephen M. Cameron .name = HPSA, 919f79cfec6SStephen M. Cameron .proc_name = HPSA, 9203f5eac3aSStephen M. Cameron .queuecommand = hpsa_scsi_queue_command, 9213f5eac3aSStephen M. Cameron .scan_start = hpsa_scan_start, 9223f5eac3aSStephen M. Cameron .scan_finished = hpsa_scan_finished, 9237c0a0229SDon Brace .change_queue_depth = hpsa_change_queue_depth, 9243f5eac3aSStephen M. Cameron .this_id = -1, 9253f5eac3aSStephen M. Cameron .use_clustering = ENABLE_CLUSTERING, 92675167d2cSStephen M. Cameron .eh_abort_handler = hpsa_eh_abort_handler, 9273f5eac3aSStephen M. Cameron .eh_device_reset_handler = hpsa_eh_device_reset_handler, 9283f5eac3aSStephen M. Cameron .ioctl = hpsa_ioctl, 9293f5eac3aSStephen M. Cameron .slave_alloc = hpsa_slave_alloc, 93041ce4c35SStephen Cameron .slave_configure = hpsa_slave_configure, 9313f5eac3aSStephen M. Cameron .slave_destroy = hpsa_slave_destroy, 9323f5eac3aSStephen M. Cameron #ifdef CONFIG_COMPAT 9333f5eac3aSStephen M. Cameron .compat_ioctl = hpsa_compat_ioctl, 9343f5eac3aSStephen M. Cameron #endif 9353f5eac3aSStephen M. Cameron .sdev_attrs = hpsa_sdev_attrs, 9363f5eac3aSStephen M. Cameron .shost_attrs = hpsa_shost_attrs, 937c0d6a4d1SStephen M. Cameron .max_sectors = 8192, 93854b2b50cSMartin K. Petersen .no_write_same = 1, 9393f5eac3aSStephen M. Cameron }; 9403f5eac3aSStephen M. Cameron 941254f796bSMatt Gates static inline u32 next_command(struct ctlr_info *h, u8 q) 9423f5eac3aSStephen M. Cameron { 9433f5eac3aSStephen M. Cameron u32 a; 944072b0518SStephen M. Cameron struct reply_queue_buffer *rq = &h->reply_queue[q]; 9453f5eac3aSStephen M. Cameron 946e1f7de0cSMatt Gates if (h->transMethod & CFGTBL_Trans_io_accel1) 947e1f7de0cSMatt Gates return h->access.command_completed(h, q); 948e1f7de0cSMatt Gates 9493f5eac3aSStephen M. Cameron if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant))) 950254f796bSMatt Gates return h->access.command_completed(h, q); 9513f5eac3aSStephen M. Cameron 952254f796bSMatt Gates if ((rq->head[rq->current_entry] & 1) == rq->wraparound) { 953254f796bSMatt Gates a = rq->head[rq->current_entry]; 954254f796bSMatt Gates rq->current_entry++; 9550cbf768eSStephen M. Cameron atomic_dec(&h->commands_outstanding); 9563f5eac3aSStephen M. Cameron } else { 9573f5eac3aSStephen M. Cameron a = FIFO_EMPTY; 9583f5eac3aSStephen M. Cameron } 9593f5eac3aSStephen M. Cameron /* Check for wraparound */ 960254f796bSMatt Gates if (rq->current_entry == h->max_commands) { 961254f796bSMatt Gates rq->current_entry = 0; 962254f796bSMatt Gates rq->wraparound ^= 1; 9633f5eac3aSStephen M. Cameron } 9643f5eac3aSStephen M. Cameron return a; 9653f5eac3aSStephen M. Cameron } 9663f5eac3aSStephen M. Cameron 967c349775eSScott Teel /* 968c349775eSScott Teel * There are some special bits in the bus address of the 969c349775eSScott Teel * command that we have to set for the controller to know 970c349775eSScott Teel * how to process the command: 971c349775eSScott Teel * 972c349775eSScott Teel * Normal performant mode: 973c349775eSScott Teel * bit 0: 1 means performant mode, 0 means simple mode. 974c349775eSScott Teel * bits 1-3 = block fetch table entry 975c349775eSScott Teel * bits 4-6 = command type (== 0) 976c349775eSScott Teel * 977c349775eSScott Teel * ioaccel1 mode: 978c349775eSScott Teel * bit 0 = "performant mode" bit. 979c349775eSScott Teel * bits 1-3 = block fetch table entry 980c349775eSScott Teel * bits 4-6 = command type (== 110) 981c349775eSScott Teel * (command type is needed because ioaccel1 mode 982c349775eSScott Teel * commands are submitted through the same register as normal 983c349775eSScott Teel * mode commands, so this is how the controller knows whether 984c349775eSScott Teel * the command is normal mode or ioaccel1 mode.) 985c349775eSScott Teel * 986c349775eSScott Teel * ioaccel2 mode: 987c349775eSScott Teel * bit 0 = "performant mode" bit. 988c349775eSScott Teel * bits 1-4 = block fetch table entry (note extra bit) 989c349775eSScott Teel * bits 4-6 = not needed, because ioaccel2 mode has 990c349775eSScott Teel * a separate special register for submitting commands. 991c349775eSScott Teel */ 992c349775eSScott Teel 99325163bd5SWebb Scales /* 99425163bd5SWebb Scales * set_performant_mode: Modify the tag for cciss performant 9953f5eac3aSStephen M. Cameron * set bit 0 for pull model, bits 3-1 for block fetch 9963f5eac3aSStephen M. Cameron * register number 9973f5eac3aSStephen M. Cameron */ 99825163bd5SWebb Scales #define DEFAULT_REPLY_QUEUE (-1) 99925163bd5SWebb Scales static void set_performant_mode(struct ctlr_info *h, struct CommandList *c, 100025163bd5SWebb Scales int reply_queue) 10013f5eac3aSStephen M. Cameron { 1002254f796bSMatt Gates if (likely(h->transMethod & CFGTBL_Trans_Performant)) { 10033f5eac3aSStephen M. Cameron c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1); 100425163bd5SWebb Scales if (unlikely(!h->msix_vector)) 100525163bd5SWebb Scales return; 100625163bd5SWebb Scales if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1007254f796bSMatt Gates c->Header.ReplyQueue = 1008804a5cb5SJohn Kacur raw_smp_processor_id() % h->nreply_queues; 100925163bd5SWebb Scales else 101025163bd5SWebb Scales c->Header.ReplyQueue = reply_queue % h->nreply_queues; 1011254f796bSMatt Gates } 10123f5eac3aSStephen M. Cameron } 10133f5eac3aSStephen M. Cameron 1014c349775eSScott Teel static void set_ioaccel1_performant_mode(struct ctlr_info *h, 101525163bd5SWebb Scales struct CommandList *c, 101625163bd5SWebb Scales int reply_queue) 1017c349775eSScott Teel { 1018c349775eSScott Teel struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex]; 1019c349775eSScott Teel 102025163bd5SWebb Scales /* 102125163bd5SWebb Scales * Tell the controller to post the reply to the queue for this 1022c349775eSScott Teel * processor. This seems to give the best I/O throughput. 1023c349775eSScott Teel */ 102425163bd5SWebb Scales if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1025c349775eSScott Teel cp->ReplyQueue = smp_processor_id() % h->nreply_queues; 102625163bd5SWebb Scales else 102725163bd5SWebb Scales cp->ReplyQueue = reply_queue % h->nreply_queues; 102825163bd5SWebb Scales /* 102925163bd5SWebb Scales * Set the bits in the address sent down to include: 1030c349775eSScott Teel * - performant mode bit (bit 0) 1031c349775eSScott Teel * - pull count (bits 1-3) 1032c349775eSScott Teel * - command type (bits 4-6) 1033c349775eSScott Teel */ 1034c349775eSScott Teel c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) | 1035c349775eSScott Teel IOACCEL1_BUSADDR_CMDTYPE; 1036c349775eSScott Teel } 1037c349775eSScott Teel 10388be986ccSStephen Cameron static void set_ioaccel2_tmf_performant_mode(struct ctlr_info *h, 10398be986ccSStephen Cameron struct CommandList *c, 10408be986ccSStephen Cameron int reply_queue) 10418be986ccSStephen Cameron { 10428be986ccSStephen Cameron struct hpsa_tmf_struct *cp = (struct hpsa_tmf_struct *) 10438be986ccSStephen Cameron &h->ioaccel2_cmd_pool[c->cmdindex]; 10448be986ccSStephen Cameron 10458be986ccSStephen Cameron /* Tell the controller to post the reply to the queue for this 10468be986ccSStephen Cameron * processor. This seems to give the best I/O throughput. 10478be986ccSStephen Cameron */ 10488be986ccSStephen Cameron if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 10498be986ccSStephen Cameron cp->reply_queue = smp_processor_id() % h->nreply_queues; 10508be986ccSStephen Cameron else 10518be986ccSStephen Cameron cp->reply_queue = reply_queue % h->nreply_queues; 10528be986ccSStephen Cameron /* Set the bits in the address sent down to include: 10538be986ccSStephen Cameron * - performant mode bit not used in ioaccel mode 2 10548be986ccSStephen Cameron * - pull count (bits 0-3) 10558be986ccSStephen Cameron * - command type isn't needed for ioaccel2 10568be986ccSStephen Cameron */ 10578be986ccSStephen Cameron c->busaddr |= h->ioaccel2_blockFetchTable[0]; 10588be986ccSStephen Cameron } 10598be986ccSStephen Cameron 1060c349775eSScott Teel static void set_ioaccel2_performant_mode(struct ctlr_info *h, 106125163bd5SWebb Scales struct CommandList *c, 106225163bd5SWebb Scales int reply_queue) 1063c349775eSScott Teel { 1064c349775eSScott Teel struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex]; 1065c349775eSScott Teel 106625163bd5SWebb Scales /* 106725163bd5SWebb Scales * Tell the controller to post the reply to the queue for this 1068c349775eSScott Teel * processor. This seems to give the best I/O throughput. 1069c349775eSScott Teel */ 107025163bd5SWebb Scales if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1071c349775eSScott Teel cp->reply_queue = smp_processor_id() % h->nreply_queues; 107225163bd5SWebb Scales else 107325163bd5SWebb Scales cp->reply_queue = reply_queue % h->nreply_queues; 107425163bd5SWebb Scales /* 107525163bd5SWebb Scales * Set the bits in the address sent down to include: 1076c349775eSScott Teel * - performant mode bit not used in ioaccel mode 2 1077c349775eSScott Teel * - pull count (bits 0-3) 1078c349775eSScott Teel * - command type isn't needed for ioaccel2 1079c349775eSScott Teel */ 1080c349775eSScott Teel c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]); 1081c349775eSScott Teel } 1082c349775eSScott Teel 1083e85c5974SStephen M. Cameron static int is_firmware_flash_cmd(u8 *cdb) 1084e85c5974SStephen M. Cameron { 1085e85c5974SStephen M. Cameron return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE; 1086e85c5974SStephen M. Cameron } 1087e85c5974SStephen M. Cameron 1088e85c5974SStephen M. Cameron /* 1089e85c5974SStephen M. Cameron * During firmware flash, the heartbeat register may not update as frequently 1090e85c5974SStephen M. Cameron * as it should. So we dial down lockup detection during firmware flash. and 1091e85c5974SStephen M. Cameron * dial it back up when firmware flash completes. 1092e85c5974SStephen M. Cameron */ 1093e85c5974SStephen M. Cameron #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ) 1094e85c5974SStephen M. Cameron #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ) 1095e85c5974SStephen M. Cameron static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h, 1096e85c5974SStephen M. Cameron struct CommandList *c) 1097e85c5974SStephen M. Cameron { 1098e85c5974SStephen M. Cameron if (!is_firmware_flash_cmd(c->Request.CDB)) 1099e85c5974SStephen M. Cameron return; 1100e85c5974SStephen M. Cameron atomic_inc(&h->firmware_flash_in_progress); 1101e85c5974SStephen M. Cameron h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH; 1102e85c5974SStephen M. Cameron } 1103e85c5974SStephen M. Cameron 1104e85c5974SStephen M. Cameron static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h, 1105e85c5974SStephen M. Cameron struct CommandList *c) 1106e85c5974SStephen M. Cameron { 1107e85c5974SStephen M. Cameron if (is_firmware_flash_cmd(c->Request.CDB) && 1108e85c5974SStephen M. Cameron atomic_dec_and_test(&h->firmware_flash_in_progress)) 1109e85c5974SStephen M. Cameron h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 1110e85c5974SStephen M. Cameron } 1111e85c5974SStephen M. Cameron 111225163bd5SWebb Scales static void __enqueue_cmd_and_start_io(struct ctlr_info *h, 111325163bd5SWebb Scales struct CommandList *c, int reply_queue) 11143f5eac3aSStephen M. Cameron { 1115c05e8866SStephen Cameron dial_down_lockup_detection_during_fw_flash(h, c); 1116c05e8866SStephen Cameron atomic_inc(&h->commands_outstanding); 1117c349775eSScott Teel switch (c->cmd_type) { 1118c349775eSScott Teel case CMD_IOACCEL1: 111925163bd5SWebb Scales set_ioaccel1_performant_mode(h, c, reply_queue); 1120c05e8866SStephen Cameron writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET); 1121c349775eSScott Teel break; 1122c349775eSScott Teel case CMD_IOACCEL2: 112325163bd5SWebb Scales set_ioaccel2_performant_mode(h, c, reply_queue); 1124c05e8866SStephen Cameron writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32); 1125c349775eSScott Teel break; 11268be986ccSStephen Cameron case IOACCEL2_TMF: 11278be986ccSStephen Cameron set_ioaccel2_tmf_performant_mode(h, c, reply_queue); 11288be986ccSStephen Cameron writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32); 11298be986ccSStephen Cameron break; 1130c349775eSScott Teel default: 113125163bd5SWebb Scales set_performant_mode(h, c, reply_queue); 1132f2405db8SDon Brace h->access.submit_command(h, c); 11333f5eac3aSStephen M. Cameron } 1134c05e8866SStephen Cameron } 11353f5eac3aSStephen M. Cameron 1136a58e7e53SWebb Scales static void enqueue_cmd_and_start_io(struct ctlr_info *h, struct CommandList *c) 113725163bd5SWebb Scales { 1138d604f533SWebb Scales if (unlikely(hpsa_is_pending_event(c))) 1139a58e7e53SWebb Scales return finish_cmd(c); 1140a58e7e53SWebb Scales 114125163bd5SWebb Scales __enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE); 114225163bd5SWebb Scales } 114325163bd5SWebb Scales 11443f5eac3aSStephen M. Cameron static inline int is_hba_lunid(unsigned char scsi3addr[]) 11453f5eac3aSStephen M. Cameron { 11463f5eac3aSStephen M. Cameron return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0; 11473f5eac3aSStephen M. Cameron } 11483f5eac3aSStephen M. Cameron 11493f5eac3aSStephen M. Cameron static inline int is_scsi_rev_5(struct ctlr_info *h) 11503f5eac3aSStephen M. Cameron { 11513f5eac3aSStephen M. Cameron if (!h->hba_inquiry_data) 11523f5eac3aSStephen M. Cameron return 0; 11533f5eac3aSStephen M. Cameron if ((h->hba_inquiry_data[2] & 0x07) == 5) 11543f5eac3aSStephen M. Cameron return 1; 11553f5eac3aSStephen M. Cameron return 0; 11563f5eac3aSStephen M. Cameron } 11573f5eac3aSStephen M. Cameron 1158edd16368SStephen M. Cameron static int hpsa_find_target_lun(struct ctlr_info *h, 1159edd16368SStephen M. Cameron unsigned char scsi3addr[], int bus, int *target, int *lun) 1160edd16368SStephen M. Cameron { 1161edd16368SStephen M. Cameron /* finds an unused bus, target, lun for a new physical device 1162edd16368SStephen M. Cameron * assumes h->devlock is held 1163edd16368SStephen M. Cameron */ 1164edd16368SStephen M. Cameron int i, found = 0; 1165cfe5badcSScott Teel DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES); 1166edd16368SStephen M. Cameron 1167263d9401SAkinobu Mita bitmap_zero(lun_taken, HPSA_MAX_DEVICES); 1168edd16368SStephen M. Cameron 1169edd16368SStephen M. Cameron for (i = 0; i < h->ndevices; i++) { 1170edd16368SStephen M. Cameron if (h->dev[i]->bus == bus && h->dev[i]->target != -1) 1171263d9401SAkinobu Mita __set_bit(h->dev[i]->target, lun_taken); 1172edd16368SStephen M. Cameron } 1173edd16368SStephen M. Cameron 1174263d9401SAkinobu Mita i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES); 1175263d9401SAkinobu Mita if (i < HPSA_MAX_DEVICES) { 1176edd16368SStephen M. Cameron /* *bus = 1; */ 1177edd16368SStephen M. Cameron *target = i; 1178edd16368SStephen M. Cameron *lun = 0; 1179edd16368SStephen M. Cameron found = 1; 1180edd16368SStephen M. Cameron } 1181edd16368SStephen M. Cameron return !found; 1182edd16368SStephen M. Cameron } 1183edd16368SStephen M. Cameron 11841d33d85dSDon Brace static void hpsa_show_dev_msg(const char *level, struct ctlr_info *h, 11850d96ef5fSWebb Scales struct hpsa_scsi_dev_t *dev, char *description) 11860d96ef5fSWebb Scales { 11877c59a0d4SDon Brace #define LABEL_SIZE 25 11887c59a0d4SDon Brace char label[LABEL_SIZE]; 11897c59a0d4SDon Brace 11909975ec9dSDon Brace if (h == NULL || h->pdev == NULL || h->scsi_host == NULL) 11919975ec9dSDon Brace return; 11929975ec9dSDon Brace 11937c59a0d4SDon Brace switch (dev->devtype) { 11947c59a0d4SDon Brace case TYPE_RAID: 11957c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "controller"); 11967c59a0d4SDon Brace break; 11977c59a0d4SDon Brace case TYPE_ENCLOSURE: 11987c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "enclosure"); 11997c59a0d4SDon Brace break; 12007c59a0d4SDon Brace case TYPE_DISK: 1201af15ed36SDon Brace case TYPE_ZBC: 12027c59a0d4SDon Brace if (dev->external) 12037c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "external"); 12047c59a0d4SDon Brace else if (!is_logical_dev_addr_mode(dev->scsi3addr)) 12057c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "%s", 12067c59a0d4SDon Brace raid_label[PHYSICAL_DRIVE]); 12077c59a0d4SDon Brace else 12087c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "RAID-%s", 12097c59a0d4SDon Brace dev->raid_level > RAID_UNKNOWN ? "?" : 12107c59a0d4SDon Brace raid_label[dev->raid_level]); 12117c59a0d4SDon Brace break; 12127c59a0d4SDon Brace case TYPE_ROM: 12137c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "rom"); 12147c59a0d4SDon Brace break; 12157c59a0d4SDon Brace case TYPE_TAPE: 12167c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "tape"); 12177c59a0d4SDon Brace break; 12187c59a0d4SDon Brace case TYPE_MEDIUM_CHANGER: 12197c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "changer"); 12207c59a0d4SDon Brace break; 12217c59a0d4SDon Brace default: 12227c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "UNKNOWN"); 12237c59a0d4SDon Brace break; 12247c59a0d4SDon Brace } 12257c59a0d4SDon Brace 12260d96ef5fSWebb Scales dev_printk(level, &h->pdev->dev, 12277c59a0d4SDon Brace "scsi %d:%d:%d:%d: %s %s %.8s %.16s %s SSDSmartPathCap%c En%c Exp=%d\n", 12280d96ef5fSWebb Scales h->scsi_host->host_no, dev->bus, dev->target, dev->lun, 12290d96ef5fSWebb Scales description, 12300d96ef5fSWebb Scales scsi_device_type(dev->devtype), 12310d96ef5fSWebb Scales dev->vendor, 12320d96ef5fSWebb Scales dev->model, 12337c59a0d4SDon Brace label, 12340d96ef5fSWebb Scales dev->offload_config ? '+' : '-', 12350d96ef5fSWebb Scales dev->offload_enabled ? '+' : '-', 12362a168208SKevin Barnett dev->expose_device); 12370d96ef5fSWebb Scales } 12380d96ef5fSWebb Scales 1239edd16368SStephen M. Cameron /* Add an entry into h->dev[] array. */ 12408aa60681SDon Brace static int hpsa_scsi_add_entry(struct ctlr_info *h, 1241edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *device, 1242edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *added[], int *nadded) 1243edd16368SStephen M. Cameron { 1244edd16368SStephen M. Cameron /* assumes h->devlock is held */ 1245edd16368SStephen M. Cameron int n = h->ndevices; 1246edd16368SStephen M. Cameron int i; 1247edd16368SStephen M. Cameron unsigned char addr1[8], addr2[8]; 1248edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd; 1249edd16368SStephen M. Cameron 1250cfe5badcSScott Teel if (n >= HPSA_MAX_DEVICES) { 1251edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "too many devices, some will be " 1252edd16368SStephen M. Cameron "inaccessible.\n"); 1253edd16368SStephen M. Cameron return -1; 1254edd16368SStephen M. Cameron } 1255edd16368SStephen M. Cameron 1256edd16368SStephen M. Cameron /* physical devices do not have lun or target assigned until now. */ 1257edd16368SStephen M. Cameron if (device->lun != -1) 1258edd16368SStephen M. Cameron /* Logical device, lun is already assigned. */ 1259edd16368SStephen M. Cameron goto lun_assigned; 1260edd16368SStephen M. Cameron 1261edd16368SStephen M. Cameron /* If this device a non-zero lun of a multi-lun device 1262edd16368SStephen M. Cameron * byte 4 of the 8-byte LUN addr will contain the logical 12632b08b3e9SDon Brace * unit no, zero otherwise. 1264edd16368SStephen M. Cameron */ 1265edd16368SStephen M. Cameron if (device->scsi3addr[4] == 0) { 1266edd16368SStephen M. Cameron /* This is not a non-zero lun of a multi-lun device */ 1267edd16368SStephen M. Cameron if (hpsa_find_target_lun(h, device->scsi3addr, 1268edd16368SStephen M. Cameron device->bus, &device->target, &device->lun) != 0) 1269edd16368SStephen M. Cameron return -1; 1270edd16368SStephen M. Cameron goto lun_assigned; 1271edd16368SStephen M. Cameron } 1272edd16368SStephen M. Cameron 1273edd16368SStephen M. Cameron /* This is a non-zero lun of a multi-lun device. 1274edd16368SStephen M. Cameron * Search through our list and find the device which 12759a4178b7Sshane.seymour * has the same 8 byte LUN address, excepting byte 4 and 5. 1276edd16368SStephen M. Cameron * Assign the same bus and target for this new LUN. 1277edd16368SStephen M. Cameron * Use the logical unit number from the firmware. 1278edd16368SStephen M. Cameron */ 1279edd16368SStephen M. Cameron memcpy(addr1, device->scsi3addr, 8); 1280edd16368SStephen M. Cameron addr1[4] = 0; 12819a4178b7Sshane.seymour addr1[5] = 0; 1282edd16368SStephen M. Cameron for (i = 0; i < n; i++) { 1283edd16368SStephen M. Cameron sd = h->dev[i]; 1284edd16368SStephen M. Cameron memcpy(addr2, sd->scsi3addr, 8); 1285edd16368SStephen M. Cameron addr2[4] = 0; 12869a4178b7Sshane.seymour addr2[5] = 0; 12879a4178b7Sshane.seymour /* differ only in byte 4 and 5? */ 1288edd16368SStephen M. Cameron if (memcmp(addr1, addr2, 8) == 0) { 1289edd16368SStephen M. Cameron device->bus = sd->bus; 1290edd16368SStephen M. Cameron device->target = sd->target; 1291edd16368SStephen M. Cameron device->lun = device->scsi3addr[4]; 1292edd16368SStephen M. Cameron break; 1293edd16368SStephen M. Cameron } 1294edd16368SStephen M. Cameron } 1295edd16368SStephen M. Cameron if (device->lun == -1) { 1296edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "physical device with no LUN=0," 1297edd16368SStephen M. Cameron " suspect firmware bug or unsupported hardware " 1298edd16368SStephen M. Cameron "configuration.\n"); 1299edd16368SStephen M. Cameron return -1; 1300edd16368SStephen M. Cameron } 1301edd16368SStephen M. Cameron 1302edd16368SStephen M. Cameron lun_assigned: 1303edd16368SStephen M. Cameron 1304edd16368SStephen M. Cameron h->dev[n] = device; 1305edd16368SStephen M. Cameron h->ndevices++; 1306edd16368SStephen M. Cameron added[*nadded] = device; 1307edd16368SStephen M. Cameron (*nadded)++; 13080d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, device, 13092a168208SKevin Barnett device->expose_device ? "added" : "masked"); 1310a473d86cSRobert Elliott device->offload_to_be_enabled = device->offload_enabled; 1311a473d86cSRobert Elliott device->offload_enabled = 0; 1312edd16368SStephen M. Cameron return 0; 1313edd16368SStephen M. Cameron } 1314edd16368SStephen M. Cameron 1315bd9244f7SScott Teel /* Update an entry in h->dev[] array. */ 13168aa60681SDon Brace static void hpsa_scsi_update_entry(struct ctlr_info *h, 1317bd9244f7SScott Teel int entry, struct hpsa_scsi_dev_t *new_entry) 1318bd9244f7SScott Teel { 1319a473d86cSRobert Elliott int offload_enabled; 1320bd9244f7SScott Teel /* assumes h->devlock is held */ 1321bd9244f7SScott Teel BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1322bd9244f7SScott Teel 1323bd9244f7SScott Teel /* Raid level changed. */ 1324bd9244f7SScott Teel h->dev[entry]->raid_level = new_entry->raid_level; 1325250fb125SStephen M. Cameron 132603383736SDon Brace /* Raid offload parameters changed. Careful about the ordering. */ 132703383736SDon Brace if (new_entry->offload_config && new_entry->offload_enabled) { 132803383736SDon Brace /* 132903383736SDon Brace * if drive is newly offload_enabled, we want to copy the 133003383736SDon Brace * raid map data first. If previously offload_enabled and 133103383736SDon Brace * offload_config were set, raid map data had better be 133203383736SDon Brace * the same as it was before. if raid map data is changed 133303383736SDon Brace * then it had better be the case that 133403383736SDon Brace * h->dev[entry]->offload_enabled is currently 0. 133503383736SDon Brace */ 13369fb0de2dSStephen M. Cameron h->dev[entry]->raid_map = new_entry->raid_map; 133703383736SDon Brace h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 133803383736SDon Brace } 1339a3144e0bSJoe Handzik if (new_entry->hba_ioaccel_enabled) { 1340a3144e0bSJoe Handzik h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 1341a3144e0bSJoe Handzik wmb(); /* set ioaccel_handle *before* hba_ioaccel_enabled */ 1342a3144e0bSJoe Handzik } 1343a3144e0bSJoe Handzik h->dev[entry]->hba_ioaccel_enabled = new_entry->hba_ioaccel_enabled; 134403383736SDon Brace h->dev[entry]->offload_config = new_entry->offload_config; 134503383736SDon Brace h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror; 134603383736SDon Brace h->dev[entry]->queue_depth = new_entry->queue_depth; 1347250fb125SStephen M. Cameron 134841ce4c35SStephen Cameron /* 134941ce4c35SStephen Cameron * We can turn off ioaccel offload now, but need to delay turning 135041ce4c35SStephen Cameron * it on until we can update h->dev[entry]->phys_disk[], but we 135141ce4c35SStephen Cameron * can't do that until all the devices are updated. 135241ce4c35SStephen Cameron */ 135341ce4c35SStephen Cameron h->dev[entry]->offload_to_be_enabled = new_entry->offload_enabled; 135441ce4c35SStephen Cameron if (!new_entry->offload_enabled) 135541ce4c35SStephen Cameron h->dev[entry]->offload_enabled = 0; 135641ce4c35SStephen Cameron 1357a473d86cSRobert Elliott offload_enabled = h->dev[entry]->offload_enabled; 1358a473d86cSRobert Elliott h->dev[entry]->offload_enabled = h->dev[entry]->offload_to_be_enabled; 13590d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated"); 1360a473d86cSRobert Elliott h->dev[entry]->offload_enabled = offload_enabled; 1361bd9244f7SScott Teel } 1362bd9244f7SScott Teel 13632a8ccf31SStephen M. Cameron /* Replace an entry from h->dev[] array. */ 13648aa60681SDon Brace static void hpsa_scsi_replace_entry(struct ctlr_info *h, 13652a8ccf31SStephen M. Cameron int entry, struct hpsa_scsi_dev_t *new_entry, 13662a8ccf31SStephen M. Cameron struct hpsa_scsi_dev_t *added[], int *nadded, 13672a8ccf31SStephen M. Cameron struct hpsa_scsi_dev_t *removed[], int *nremoved) 13682a8ccf31SStephen M. Cameron { 13692a8ccf31SStephen M. Cameron /* assumes h->devlock is held */ 1370cfe5badcSScott Teel BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 13712a8ccf31SStephen M. Cameron removed[*nremoved] = h->dev[entry]; 13722a8ccf31SStephen M. Cameron (*nremoved)++; 137301350d05SStephen M. Cameron 137401350d05SStephen M. Cameron /* 137501350d05SStephen M. Cameron * New physical devices won't have target/lun assigned yet 137601350d05SStephen M. Cameron * so we need to preserve the values in the slot we are replacing. 137701350d05SStephen M. Cameron */ 137801350d05SStephen M. Cameron if (new_entry->target == -1) { 137901350d05SStephen M. Cameron new_entry->target = h->dev[entry]->target; 138001350d05SStephen M. Cameron new_entry->lun = h->dev[entry]->lun; 138101350d05SStephen M. Cameron } 138201350d05SStephen M. Cameron 13832a8ccf31SStephen M. Cameron h->dev[entry] = new_entry; 13842a8ccf31SStephen M. Cameron added[*nadded] = new_entry; 13852a8ccf31SStephen M. Cameron (*nadded)++; 13860d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced"); 1387a473d86cSRobert Elliott new_entry->offload_to_be_enabled = new_entry->offload_enabled; 1388a473d86cSRobert Elliott new_entry->offload_enabled = 0; 13892a8ccf31SStephen M. Cameron } 13902a8ccf31SStephen M. Cameron 1391edd16368SStephen M. Cameron /* Remove an entry from h->dev[] array. */ 13928aa60681SDon Brace static void hpsa_scsi_remove_entry(struct ctlr_info *h, int entry, 1393edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *removed[], int *nremoved) 1394edd16368SStephen M. Cameron { 1395edd16368SStephen M. Cameron /* assumes h->devlock is held */ 1396edd16368SStephen M. Cameron int i; 1397edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd; 1398edd16368SStephen M. Cameron 1399cfe5badcSScott Teel BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1400edd16368SStephen M. Cameron 1401edd16368SStephen M. Cameron sd = h->dev[entry]; 1402edd16368SStephen M. Cameron removed[*nremoved] = h->dev[entry]; 1403edd16368SStephen M. Cameron (*nremoved)++; 1404edd16368SStephen M. Cameron 1405edd16368SStephen M. Cameron for (i = entry; i < h->ndevices-1; i++) 1406edd16368SStephen M. Cameron h->dev[i] = h->dev[i+1]; 1407edd16368SStephen M. Cameron h->ndevices--; 14080d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, sd, "removed"); 1409edd16368SStephen M. Cameron } 1410edd16368SStephen M. Cameron 1411edd16368SStephen M. Cameron #define SCSI3ADDR_EQ(a, b) ( \ 1412edd16368SStephen M. Cameron (a)[7] == (b)[7] && \ 1413edd16368SStephen M. Cameron (a)[6] == (b)[6] && \ 1414edd16368SStephen M. Cameron (a)[5] == (b)[5] && \ 1415edd16368SStephen M. Cameron (a)[4] == (b)[4] && \ 1416edd16368SStephen M. Cameron (a)[3] == (b)[3] && \ 1417edd16368SStephen M. Cameron (a)[2] == (b)[2] && \ 1418edd16368SStephen M. Cameron (a)[1] == (b)[1] && \ 1419edd16368SStephen M. Cameron (a)[0] == (b)[0]) 1420edd16368SStephen M. Cameron 1421edd16368SStephen M. Cameron static void fixup_botched_add(struct ctlr_info *h, 1422edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *added) 1423edd16368SStephen M. Cameron { 1424edd16368SStephen M. Cameron /* called when scsi_add_device fails in order to re-adjust 1425edd16368SStephen M. Cameron * h->dev[] to match the mid layer's view. 1426edd16368SStephen M. Cameron */ 1427edd16368SStephen M. Cameron unsigned long flags; 1428edd16368SStephen M. Cameron int i, j; 1429edd16368SStephen M. Cameron 1430edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 1431edd16368SStephen M. Cameron for (i = 0; i < h->ndevices; i++) { 1432edd16368SStephen M. Cameron if (h->dev[i] == added) { 1433edd16368SStephen M. Cameron for (j = i; j < h->ndevices-1; j++) 1434edd16368SStephen M. Cameron h->dev[j] = h->dev[j+1]; 1435edd16368SStephen M. Cameron h->ndevices--; 1436edd16368SStephen M. Cameron break; 1437edd16368SStephen M. Cameron } 1438edd16368SStephen M. Cameron } 1439edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 1440edd16368SStephen M. Cameron kfree(added); 1441edd16368SStephen M. Cameron } 1442edd16368SStephen M. Cameron 1443edd16368SStephen M. Cameron static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1, 1444edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *dev2) 1445edd16368SStephen M. Cameron { 1446edd16368SStephen M. Cameron /* we compare everything except lun and target as these 1447edd16368SStephen M. Cameron * are not yet assigned. Compare parts likely 1448edd16368SStephen M. Cameron * to differ first 1449edd16368SStephen M. Cameron */ 1450edd16368SStephen M. Cameron if (memcmp(dev1->scsi3addr, dev2->scsi3addr, 1451edd16368SStephen M. Cameron sizeof(dev1->scsi3addr)) != 0) 1452edd16368SStephen M. Cameron return 0; 1453edd16368SStephen M. Cameron if (memcmp(dev1->device_id, dev2->device_id, 1454edd16368SStephen M. Cameron sizeof(dev1->device_id)) != 0) 1455edd16368SStephen M. Cameron return 0; 1456edd16368SStephen M. Cameron if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0) 1457edd16368SStephen M. Cameron return 0; 1458edd16368SStephen M. Cameron if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0) 1459edd16368SStephen M. Cameron return 0; 1460edd16368SStephen M. Cameron if (dev1->devtype != dev2->devtype) 1461edd16368SStephen M. Cameron return 0; 1462edd16368SStephen M. Cameron if (dev1->bus != dev2->bus) 1463edd16368SStephen M. Cameron return 0; 1464edd16368SStephen M. Cameron return 1; 1465edd16368SStephen M. Cameron } 1466edd16368SStephen M. Cameron 1467bd9244f7SScott Teel static inline int device_updated(struct hpsa_scsi_dev_t *dev1, 1468bd9244f7SScott Teel struct hpsa_scsi_dev_t *dev2) 1469bd9244f7SScott Teel { 1470bd9244f7SScott Teel /* Device attributes that can change, but don't mean 1471bd9244f7SScott Teel * that the device is a different device, nor that the OS 1472bd9244f7SScott Teel * needs to be told anything about the change. 1473bd9244f7SScott Teel */ 1474bd9244f7SScott Teel if (dev1->raid_level != dev2->raid_level) 1475bd9244f7SScott Teel return 1; 1476250fb125SStephen M. Cameron if (dev1->offload_config != dev2->offload_config) 1477250fb125SStephen M. Cameron return 1; 1478250fb125SStephen M. Cameron if (dev1->offload_enabled != dev2->offload_enabled) 1479250fb125SStephen M. Cameron return 1; 148093849508SDon Brace if (!is_logical_dev_addr_mode(dev1->scsi3addr)) 148103383736SDon Brace if (dev1->queue_depth != dev2->queue_depth) 148203383736SDon Brace return 1; 1483bd9244f7SScott Teel return 0; 1484bd9244f7SScott Teel } 1485bd9244f7SScott Teel 1486edd16368SStephen M. Cameron /* Find needle in haystack. If exact match found, return DEVICE_SAME, 1487edd16368SStephen M. Cameron * and return needle location in *index. If scsi3addr matches, but not 1488edd16368SStephen M. Cameron * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle 1489bd9244f7SScott Teel * location in *index. 1490bd9244f7SScott Teel * In the case of a minor device attribute change, such as RAID level, just 1491bd9244f7SScott Teel * return DEVICE_UPDATED, along with the updated device's location in index. 1492bd9244f7SScott Teel * If needle not found, return DEVICE_NOT_FOUND. 1493edd16368SStephen M. Cameron */ 1494edd16368SStephen M. Cameron static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle, 1495edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *haystack[], int haystack_size, 1496edd16368SStephen M. Cameron int *index) 1497edd16368SStephen M. Cameron { 1498edd16368SStephen M. Cameron int i; 1499edd16368SStephen M. Cameron #define DEVICE_NOT_FOUND 0 1500edd16368SStephen M. Cameron #define DEVICE_CHANGED 1 1501edd16368SStephen M. Cameron #define DEVICE_SAME 2 1502bd9244f7SScott Teel #define DEVICE_UPDATED 3 15031d33d85dSDon Brace if (needle == NULL) 15041d33d85dSDon Brace return DEVICE_NOT_FOUND; 15051d33d85dSDon Brace 1506edd16368SStephen M. Cameron for (i = 0; i < haystack_size; i++) { 150723231048SStephen M. Cameron if (haystack[i] == NULL) /* previously removed. */ 150823231048SStephen M. Cameron continue; 1509edd16368SStephen M. Cameron if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) { 1510edd16368SStephen M. Cameron *index = i; 1511bd9244f7SScott Teel if (device_is_the_same(needle, haystack[i])) { 1512bd9244f7SScott Teel if (device_updated(needle, haystack[i])) 1513bd9244f7SScott Teel return DEVICE_UPDATED; 1514edd16368SStephen M. Cameron return DEVICE_SAME; 1515bd9244f7SScott Teel } else { 15169846590eSStephen M. Cameron /* Keep offline devices offline */ 15179846590eSStephen M. Cameron if (needle->volume_offline) 15189846590eSStephen M. Cameron return DEVICE_NOT_FOUND; 1519edd16368SStephen M. Cameron return DEVICE_CHANGED; 1520edd16368SStephen M. Cameron } 1521edd16368SStephen M. Cameron } 1522bd9244f7SScott Teel } 1523edd16368SStephen M. Cameron *index = -1; 1524edd16368SStephen M. Cameron return DEVICE_NOT_FOUND; 1525edd16368SStephen M. Cameron } 1526edd16368SStephen M. Cameron 15279846590eSStephen M. Cameron static void hpsa_monitor_offline_device(struct ctlr_info *h, 15289846590eSStephen M. Cameron unsigned char scsi3addr[]) 15299846590eSStephen M. Cameron { 15309846590eSStephen M. Cameron struct offline_device_entry *device; 15319846590eSStephen M. Cameron unsigned long flags; 15329846590eSStephen M. Cameron 15339846590eSStephen M. Cameron /* Check to see if device is already on the list */ 15349846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 15359846590eSStephen M. Cameron list_for_each_entry(device, &h->offline_device_list, offline_list) { 15369846590eSStephen M. Cameron if (memcmp(device->scsi3addr, scsi3addr, 15379846590eSStephen M. Cameron sizeof(device->scsi3addr)) == 0) { 15389846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 15399846590eSStephen M. Cameron return; 15409846590eSStephen M. Cameron } 15419846590eSStephen M. Cameron } 15429846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 15439846590eSStephen M. Cameron 15449846590eSStephen M. Cameron /* Device is not on the list, add it. */ 15459846590eSStephen M. Cameron device = kmalloc(sizeof(*device), GFP_KERNEL); 15469846590eSStephen M. Cameron if (!device) { 15479846590eSStephen M. Cameron dev_warn(&h->pdev->dev, "out of memory in %s\n", __func__); 15489846590eSStephen M. Cameron return; 15499846590eSStephen M. Cameron } 15509846590eSStephen M. Cameron memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr)); 15519846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 15529846590eSStephen M. Cameron list_add_tail(&device->offline_list, &h->offline_device_list); 15539846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 15549846590eSStephen M. Cameron } 15559846590eSStephen M. Cameron 15569846590eSStephen M. Cameron /* Print a message explaining various offline volume states */ 15579846590eSStephen M. Cameron static void hpsa_show_volume_status(struct ctlr_info *h, 15589846590eSStephen M. Cameron struct hpsa_scsi_dev_t *sd) 15599846590eSStephen M. Cameron { 15609846590eSStephen M. Cameron if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED) 15619846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15629846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n", 15639846590eSStephen M. Cameron h->scsi_host->host_no, 15649846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15659846590eSStephen M. Cameron switch (sd->volume_offline) { 15669846590eSStephen M. Cameron case HPSA_LV_OK: 15679846590eSStephen M. Cameron break; 15689846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ERASE: 15699846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15709846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n", 15719846590eSStephen M. Cameron h->scsi_host->host_no, 15729846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15739846590eSStephen M. Cameron break; 15745ca01204SScott Benesh case HPSA_LV_NOT_AVAILABLE: 15755ca01204SScott Benesh dev_info(&h->pdev->dev, 15765ca01204SScott Benesh "C%d:B%d:T%d:L%d Volume is waiting for transforming volume.\n", 15775ca01204SScott Benesh h->scsi_host->host_no, 15785ca01204SScott Benesh sd->bus, sd->target, sd->lun); 15795ca01204SScott Benesh break; 15809846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_RPI: 15819846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15825ca01204SScott Benesh "C%d:B%d:T%d:L%d Volume is undergoing rapid parity init.\n", 15839846590eSStephen M. Cameron h->scsi_host->host_no, 15849846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15859846590eSStephen M. Cameron break; 15869846590eSStephen M. Cameron case HPSA_LV_PENDING_RPI: 15879846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15889846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n", 15899846590eSStephen M. Cameron h->scsi_host->host_no, 15909846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15919846590eSStephen M. Cameron break; 15929846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_NO_KEY: 15939846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15949846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n", 15959846590eSStephen M. Cameron h->scsi_host->host_no, 15969846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15979846590eSStephen M. Cameron break; 15989846590eSStephen M. Cameron case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER: 15999846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16009846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n", 16019846590eSStephen M. Cameron h->scsi_host->host_no, 16029846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16039846590eSStephen M. Cameron break; 16049846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION: 16059846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16069846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n", 16079846590eSStephen M. Cameron h->scsi_host->host_no, 16089846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16099846590eSStephen M. Cameron break; 16109846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING: 16119846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16129846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n", 16139846590eSStephen M. Cameron h->scsi_host->host_no, 16149846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16159846590eSStephen M. Cameron break; 16169846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 16179846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16189846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n", 16199846590eSStephen M. Cameron h->scsi_host->host_no, 16209846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16219846590eSStephen M. Cameron break; 16229846590eSStephen M. Cameron case HPSA_LV_PENDING_ENCRYPTION: 16239846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16249846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n", 16259846590eSStephen M. Cameron h->scsi_host->host_no, 16269846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16279846590eSStephen M. Cameron break; 16289846590eSStephen M. Cameron case HPSA_LV_PENDING_ENCRYPTION_REKEYING: 16299846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16309846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n", 16319846590eSStephen M. Cameron h->scsi_host->host_no, 16329846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16339846590eSStephen M. Cameron break; 16349846590eSStephen M. Cameron } 16359846590eSStephen M. Cameron } 16369846590eSStephen M. Cameron 163703383736SDon Brace /* 163803383736SDon Brace * Figure the list of physical drive pointers for a logical drive with 163903383736SDon Brace * raid offload configured. 164003383736SDon Brace */ 164103383736SDon Brace static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h, 164203383736SDon Brace struct hpsa_scsi_dev_t *dev[], int ndevices, 164303383736SDon Brace struct hpsa_scsi_dev_t *logical_drive) 164403383736SDon Brace { 164503383736SDon Brace struct raid_map_data *map = &logical_drive->raid_map; 164603383736SDon Brace struct raid_map_disk_data *dd = &map->data[0]; 164703383736SDon Brace int i, j; 164803383736SDon Brace int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) + 164903383736SDon Brace le16_to_cpu(map->metadata_disks_per_row); 165003383736SDon Brace int nraid_map_entries = le16_to_cpu(map->row_cnt) * 165103383736SDon Brace le16_to_cpu(map->layout_map_count) * 165203383736SDon Brace total_disks_per_row; 165303383736SDon Brace int nphys_disk = le16_to_cpu(map->layout_map_count) * 165403383736SDon Brace total_disks_per_row; 165503383736SDon Brace int qdepth; 165603383736SDon Brace 165703383736SDon Brace if (nraid_map_entries > RAID_MAP_MAX_ENTRIES) 165803383736SDon Brace nraid_map_entries = RAID_MAP_MAX_ENTRIES; 165903383736SDon Brace 1660d604f533SWebb Scales logical_drive->nphysical_disks = nraid_map_entries; 1661d604f533SWebb Scales 166203383736SDon Brace qdepth = 0; 166303383736SDon Brace for (i = 0; i < nraid_map_entries; i++) { 166403383736SDon Brace logical_drive->phys_disk[i] = NULL; 166503383736SDon Brace if (!logical_drive->offload_config) 166603383736SDon Brace continue; 166703383736SDon Brace for (j = 0; j < ndevices; j++) { 16681d33d85dSDon Brace if (dev[j] == NULL) 16691d33d85dSDon Brace continue; 1670ff615f06SPetros Koutoupis if (dev[j]->devtype != TYPE_DISK && 1671ff615f06SPetros Koutoupis dev[j]->devtype != TYPE_ZBC) 1672af15ed36SDon Brace continue; 1673f3f01730SKevin Barnett if (is_logical_device(dev[j])) 167403383736SDon Brace continue; 167503383736SDon Brace if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle) 167603383736SDon Brace continue; 167703383736SDon Brace 167803383736SDon Brace logical_drive->phys_disk[i] = dev[j]; 167903383736SDon Brace if (i < nphys_disk) 168003383736SDon Brace qdepth = min(h->nr_cmds, qdepth + 168103383736SDon Brace logical_drive->phys_disk[i]->queue_depth); 168203383736SDon Brace break; 168303383736SDon Brace } 168403383736SDon Brace 168503383736SDon Brace /* 168603383736SDon Brace * This can happen if a physical drive is removed and 168703383736SDon Brace * the logical drive is degraded. In that case, the RAID 168803383736SDon Brace * map data will refer to a physical disk which isn't actually 168903383736SDon Brace * present. And in that case offload_enabled should already 169003383736SDon Brace * be 0, but we'll turn it off here just in case 169103383736SDon Brace */ 169203383736SDon Brace if (!logical_drive->phys_disk[i]) { 169303383736SDon Brace logical_drive->offload_enabled = 0; 169441ce4c35SStephen Cameron logical_drive->offload_to_be_enabled = 0; 169541ce4c35SStephen Cameron logical_drive->queue_depth = 8; 169603383736SDon Brace } 169703383736SDon Brace } 169803383736SDon Brace if (nraid_map_entries) 169903383736SDon Brace /* 170003383736SDon Brace * This is correct for reads, too high for full stripe writes, 170103383736SDon Brace * way too high for partial stripe writes 170203383736SDon Brace */ 170303383736SDon Brace logical_drive->queue_depth = qdepth; 170403383736SDon Brace else 170503383736SDon Brace logical_drive->queue_depth = h->nr_cmds; 170603383736SDon Brace } 170703383736SDon Brace 170803383736SDon Brace static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h, 170903383736SDon Brace struct hpsa_scsi_dev_t *dev[], int ndevices) 171003383736SDon Brace { 171103383736SDon Brace int i; 171203383736SDon Brace 171303383736SDon Brace for (i = 0; i < ndevices; i++) { 17141d33d85dSDon Brace if (dev[i] == NULL) 17151d33d85dSDon Brace continue; 1716ff615f06SPetros Koutoupis if (dev[i]->devtype != TYPE_DISK && 1717ff615f06SPetros Koutoupis dev[i]->devtype != TYPE_ZBC) 1718af15ed36SDon Brace continue; 1719f3f01730SKevin Barnett if (!is_logical_device(dev[i])) 172003383736SDon Brace continue; 172141ce4c35SStephen Cameron 172241ce4c35SStephen Cameron /* 172341ce4c35SStephen Cameron * If offload is currently enabled, the RAID map and 172441ce4c35SStephen Cameron * phys_disk[] assignment *better* not be changing 172541ce4c35SStephen Cameron * and since it isn't changing, we do not need to 172641ce4c35SStephen Cameron * update it. 172741ce4c35SStephen Cameron */ 172841ce4c35SStephen Cameron if (dev[i]->offload_enabled) 172941ce4c35SStephen Cameron continue; 173041ce4c35SStephen Cameron 173103383736SDon Brace hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]); 173203383736SDon Brace } 173303383736SDon Brace } 173403383736SDon Brace 1735096ccff4SKevin Barnett static int hpsa_add_device(struct ctlr_info *h, struct hpsa_scsi_dev_t *device) 1736096ccff4SKevin Barnett { 1737096ccff4SKevin Barnett int rc = 0; 1738096ccff4SKevin Barnett 1739096ccff4SKevin Barnett if (!h->scsi_host) 1740096ccff4SKevin Barnett return 1; 1741096ccff4SKevin Barnett 1742d04e62b9SKevin Barnett if (is_logical_device(device)) /* RAID */ 1743096ccff4SKevin Barnett rc = scsi_add_device(h->scsi_host, device->bus, 1744096ccff4SKevin Barnett device->target, device->lun); 1745d04e62b9SKevin Barnett else /* HBA */ 1746d04e62b9SKevin Barnett rc = hpsa_add_sas_device(h->sas_host, device); 1747d04e62b9SKevin Barnett 1748096ccff4SKevin Barnett return rc; 1749096ccff4SKevin Barnett } 1750096ccff4SKevin Barnett 1751ba74fdc4SDon Brace static int hpsa_find_outstanding_commands_for_dev(struct ctlr_info *h, 1752ba74fdc4SDon Brace struct hpsa_scsi_dev_t *dev) 1753ba74fdc4SDon Brace { 1754ba74fdc4SDon Brace int i; 1755ba74fdc4SDon Brace int count = 0; 1756ba74fdc4SDon Brace 1757ba74fdc4SDon Brace for (i = 0; i < h->nr_cmds; i++) { 1758ba74fdc4SDon Brace struct CommandList *c = h->cmd_pool + i; 1759ba74fdc4SDon Brace int refcount = atomic_inc_return(&c->refcount); 1760ba74fdc4SDon Brace 1761ba74fdc4SDon Brace if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, 1762ba74fdc4SDon Brace dev->scsi3addr)) { 1763ba74fdc4SDon Brace unsigned long flags; 1764ba74fdc4SDon Brace 1765ba74fdc4SDon Brace spin_lock_irqsave(&h->lock, flags); /* Implied MB */ 1766ba74fdc4SDon Brace if (!hpsa_is_cmd_idle(c)) 1767ba74fdc4SDon Brace ++count; 1768ba74fdc4SDon Brace spin_unlock_irqrestore(&h->lock, flags); 1769ba74fdc4SDon Brace } 1770ba74fdc4SDon Brace 1771ba74fdc4SDon Brace cmd_free(h, c); 1772ba74fdc4SDon Brace } 1773ba74fdc4SDon Brace 1774ba74fdc4SDon Brace return count; 1775ba74fdc4SDon Brace } 1776ba74fdc4SDon Brace 1777ba74fdc4SDon Brace static void hpsa_wait_for_outstanding_commands_for_dev(struct ctlr_info *h, 1778ba74fdc4SDon Brace struct hpsa_scsi_dev_t *device) 1779ba74fdc4SDon Brace { 1780ba74fdc4SDon Brace int cmds = 0; 1781ba74fdc4SDon Brace int waits = 0; 1782ba74fdc4SDon Brace 1783ba74fdc4SDon Brace while (1) { 1784ba74fdc4SDon Brace cmds = hpsa_find_outstanding_commands_for_dev(h, device); 1785ba74fdc4SDon Brace if (cmds == 0) 1786ba74fdc4SDon Brace break; 1787ba74fdc4SDon Brace if (++waits > 20) 1788ba74fdc4SDon Brace break; 1789ba74fdc4SDon Brace dev_warn(&h->pdev->dev, 1790ba74fdc4SDon Brace "%s: removing device with %d outstanding commands!\n", 1791ba74fdc4SDon Brace __func__, cmds); 1792ba74fdc4SDon Brace msleep(1000); 1793ba74fdc4SDon Brace } 1794ba74fdc4SDon Brace } 1795ba74fdc4SDon Brace 1796096ccff4SKevin Barnett static void hpsa_remove_device(struct ctlr_info *h, 1797096ccff4SKevin Barnett struct hpsa_scsi_dev_t *device) 1798096ccff4SKevin Barnett { 1799096ccff4SKevin Barnett struct scsi_device *sdev = NULL; 1800096ccff4SKevin Barnett 1801096ccff4SKevin Barnett if (!h->scsi_host) 1802096ccff4SKevin Barnett return; 1803096ccff4SKevin Barnett 1804d04e62b9SKevin Barnett if (is_logical_device(device)) { /* RAID */ 1805096ccff4SKevin Barnett sdev = scsi_device_lookup(h->scsi_host, device->bus, 1806096ccff4SKevin Barnett device->target, device->lun); 1807096ccff4SKevin Barnett if (sdev) { 1808096ccff4SKevin Barnett scsi_remove_device(sdev); 1809096ccff4SKevin Barnett scsi_device_put(sdev); 1810096ccff4SKevin Barnett } else { 1811096ccff4SKevin Barnett /* 1812096ccff4SKevin Barnett * We don't expect to get here. Future commands 1813096ccff4SKevin Barnett * to this device will get a selection timeout as 1814096ccff4SKevin Barnett * if the device were gone. 1815096ccff4SKevin Barnett */ 1816096ccff4SKevin Barnett hpsa_show_dev_msg(KERN_WARNING, h, device, 1817096ccff4SKevin Barnett "didn't find device for removal."); 1818096ccff4SKevin Barnett } 1819ba74fdc4SDon Brace } else { /* HBA */ 1820ba74fdc4SDon Brace 1821ba74fdc4SDon Brace device->removed = 1; 1822ba74fdc4SDon Brace hpsa_wait_for_outstanding_commands_for_dev(h, device); 1823ba74fdc4SDon Brace 1824d04e62b9SKevin Barnett hpsa_remove_sas_device(device); 1825096ccff4SKevin Barnett } 1826ba74fdc4SDon Brace } 1827096ccff4SKevin Barnett 18288aa60681SDon Brace static void adjust_hpsa_scsi_table(struct ctlr_info *h, 1829edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd[], int nsds) 1830edd16368SStephen M. Cameron { 1831edd16368SStephen M. Cameron /* sd contains scsi3 addresses and devtypes, and inquiry 1832edd16368SStephen M. Cameron * data. This function takes what's in sd to be the current 1833edd16368SStephen M. Cameron * reality and updates h->dev[] to reflect that reality. 1834edd16368SStephen M. Cameron */ 1835edd16368SStephen M. Cameron int i, entry, device_change, changes = 0; 1836edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *csd; 1837edd16368SStephen M. Cameron unsigned long flags; 1838edd16368SStephen M. Cameron struct hpsa_scsi_dev_t **added, **removed; 1839edd16368SStephen M. Cameron int nadded, nremoved; 1840edd16368SStephen M. Cameron 1841da03ded0SDon Brace /* 1842da03ded0SDon Brace * A reset can cause a device status to change 1843da03ded0SDon Brace * re-schedule the scan to see what happened. 1844da03ded0SDon Brace */ 1845da03ded0SDon Brace if (h->reset_in_progress) { 1846da03ded0SDon Brace h->drv_req_rescan = 1; 1847da03ded0SDon Brace return; 1848da03ded0SDon Brace } 1849edd16368SStephen M. Cameron 1850cfe5badcSScott Teel added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL); 1851cfe5badcSScott Teel removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL); 1852edd16368SStephen M. Cameron 1853edd16368SStephen M. Cameron if (!added || !removed) { 1854edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "out of memory in " 1855edd16368SStephen M. Cameron "adjust_hpsa_scsi_table\n"); 1856edd16368SStephen M. Cameron goto free_and_out; 1857edd16368SStephen M. Cameron } 1858edd16368SStephen M. Cameron 1859edd16368SStephen M. Cameron spin_lock_irqsave(&h->devlock, flags); 1860edd16368SStephen M. Cameron 1861edd16368SStephen M. Cameron /* find any devices in h->dev[] that are not in 1862edd16368SStephen M. Cameron * sd[] and remove them from h->dev[], and for any 1863edd16368SStephen M. Cameron * devices which have changed, remove the old device 1864edd16368SStephen M. Cameron * info and add the new device info. 1865bd9244f7SScott Teel * If minor device attributes change, just update 1866bd9244f7SScott Teel * the existing device structure. 1867edd16368SStephen M. Cameron */ 1868edd16368SStephen M. Cameron i = 0; 1869edd16368SStephen M. Cameron nremoved = 0; 1870edd16368SStephen M. Cameron nadded = 0; 1871edd16368SStephen M. Cameron while (i < h->ndevices) { 1872edd16368SStephen M. Cameron csd = h->dev[i]; 1873edd16368SStephen M. Cameron device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry); 1874edd16368SStephen M. Cameron if (device_change == DEVICE_NOT_FOUND) { 1875edd16368SStephen M. Cameron changes++; 18768aa60681SDon Brace hpsa_scsi_remove_entry(h, i, removed, &nremoved); 1877edd16368SStephen M. Cameron continue; /* remove ^^^, hence i not incremented */ 1878edd16368SStephen M. Cameron } else if (device_change == DEVICE_CHANGED) { 1879edd16368SStephen M. Cameron changes++; 18808aa60681SDon Brace hpsa_scsi_replace_entry(h, i, sd[entry], 18812a8ccf31SStephen M. Cameron added, &nadded, removed, &nremoved); 1882c7f172dcSStephen M. Cameron /* Set it to NULL to prevent it from being freed 1883c7f172dcSStephen M. Cameron * at the bottom of hpsa_update_scsi_devices() 1884c7f172dcSStephen M. Cameron */ 1885c7f172dcSStephen M. Cameron sd[entry] = NULL; 1886bd9244f7SScott Teel } else if (device_change == DEVICE_UPDATED) { 18878aa60681SDon Brace hpsa_scsi_update_entry(h, i, sd[entry]); 1888edd16368SStephen M. Cameron } 1889edd16368SStephen M. Cameron i++; 1890edd16368SStephen M. Cameron } 1891edd16368SStephen M. Cameron 1892edd16368SStephen M. Cameron /* Now, make sure every device listed in sd[] is also 1893edd16368SStephen M. Cameron * listed in h->dev[], adding them if they aren't found 1894edd16368SStephen M. Cameron */ 1895edd16368SStephen M. Cameron 1896edd16368SStephen M. Cameron for (i = 0; i < nsds; i++) { 1897edd16368SStephen M. Cameron if (!sd[i]) /* if already added above. */ 1898edd16368SStephen M. Cameron continue; 18999846590eSStephen M. Cameron 19009846590eSStephen M. Cameron /* Don't add devices which are NOT READY, FORMAT IN PROGRESS 19019846590eSStephen M. Cameron * as the SCSI mid-layer does not handle such devices well. 19029846590eSStephen M. Cameron * It relentlessly loops sending TUR at 3Hz, then READ(10) 19039846590eSStephen M. Cameron * at 160Hz, and prevents the system from coming up. 19049846590eSStephen M. Cameron */ 19059846590eSStephen M. Cameron if (sd[i]->volume_offline) { 19069846590eSStephen M. Cameron hpsa_show_volume_status(h, sd[i]); 19070d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline"); 19089846590eSStephen M. Cameron continue; 19099846590eSStephen M. Cameron } 19109846590eSStephen M. Cameron 1911edd16368SStephen M. Cameron device_change = hpsa_scsi_find_entry(sd[i], h->dev, 1912edd16368SStephen M. Cameron h->ndevices, &entry); 1913edd16368SStephen M. Cameron if (device_change == DEVICE_NOT_FOUND) { 1914edd16368SStephen M. Cameron changes++; 19158aa60681SDon Brace if (hpsa_scsi_add_entry(h, sd[i], added, &nadded) != 0) 1916edd16368SStephen M. Cameron break; 1917edd16368SStephen M. Cameron sd[i] = NULL; /* prevent from being freed later. */ 1918edd16368SStephen M. Cameron } else if (device_change == DEVICE_CHANGED) { 1919edd16368SStephen M. Cameron /* should never happen... */ 1920edd16368SStephen M. Cameron changes++; 1921edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 1922edd16368SStephen M. Cameron "device unexpectedly changed.\n"); 1923edd16368SStephen M. Cameron /* but if it does happen, we just ignore that device */ 1924edd16368SStephen M. Cameron } 1925edd16368SStephen M. Cameron } 192641ce4c35SStephen Cameron hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices); 192741ce4c35SStephen Cameron 192841ce4c35SStephen Cameron /* Now that h->dev[]->phys_disk[] is coherent, we can enable 192941ce4c35SStephen Cameron * any logical drives that need it enabled. 193041ce4c35SStephen Cameron */ 19311d33d85dSDon Brace for (i = 0; i < h->ndevices; i++) { 19321d33d85dSDon Brace if (h->dev[i] == NULL) 19331d33d85dSDon Brace continue; 193441ce4c35SStephen Cameron h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled; 19351d33d85dSDon Brace } 193641ce4c35SStephen Cameron 1937edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->devlock, flags); 1938edd16368SStephen M. Cameron 19399846590eSStephen M. Cameron /* Monitor devices which are in one of several NOT READY states to be 19409846590eSStephen M. Cameron * brought online later. This must be done without holding h->devlock, 19419846590eSStephen M. Cameron * so don't touch h->dev[] 19429846590eSStephen M. Cameron */ 19439846590eSStephen M. Cameron for (i = 0; i < nsds; i++) { 19449846590eSStephen M. Cameron if (!sd[i]) /* if already added above. */ 19459846590eSStephen M. Cameron continue; 19469846590eSStephen M. Cameron if (sd[i]->volume_offline) 19479846590eSStephen M. Cameron hpsa_monitor_offline_device(h, sd[i]->scsi3addr); 19489846590eSStephen M. Cameron } 19499846590eSStephen M. Cameron 1950edd16368SStephen M. Cameron /* Don't notify scsi mid layer of any changes the first time through 1951edd16368SStephen M. Cameron * (or if there are no changes) scsi_scan_host will do it later the 1952edd16368SStephen M. Cameron * first time through. 1953edd16368SStephen M. Cameron */ 19548aa60681SDon Brace if (!changes) 1955edd16368SStephen M. Cameron goto free_and_out; 1956edd16368SStephen M. Cameron 1957edd16368SStephen M. Cameron /* Notify scsi mid layer of any removed devices */ 1958edd16368SStephen M. Cameron for (i = 0; i < nremoved; i++) { 19591d33d85dSDon Brace if (removed[i] == NULL) 19601d33d85dSDon Brace continue; 1961096ccff4SKevin Barnett if (removed[i]->expose_device) 1962096ccff4SKevin Barnett hpsa_remove_device(h, removed[i]); 1963edd16368SStephen M. Cameron kfree(removed[i]); 1964edd16368SStephen M. Cameron removed[i] = NULL; 1965edd16368SStephen M. Cameron } 1966edd16368SStephen M. Cameron 1967edd16368SStephen M. Cameron /* Notify scsi mid layer of any added devices */ 1968edd16368SStephen M. Cameron for (i = 0; i < nadded; i++) { 1969096ccff4SKevin Barnett int rc = 0; 1970096ccff4SKevin Barnett 19711d33d85dSDon Brace if (added[i] == NULL) 197241ce4c35SStephen Cameron continue; 19732a168208SKevin Barnett if (!(added[i]->expose_device)) 1974edd16368SStephen M. Cameron continue; 1975096ccff4SKevin Barnett rc = hpsa_add_device(h, added[i]); 1976096ccff4SKevin Barnett if (!rc) 1977edd16368SStephen M. Cameron continue; 1978096ccff4SKevin Barnett dev_warn(&h->pdev->dev, 1979096ccff4SKevin Barnett "addition failed %d, device not added.", rc); 1980edd16368SStephen M. Cameron /* now we have to remove it from h->dev, 1981edd16368SStephen M. Cameron * since it didn't get added to scsi mid layer 1982edd16368SStephen M. Cameron */ 1983edd16368SStephen M. Cameron fixup_botched_add(h, added[i]); 1984853633e8SDon Brace h->drv_req_rescan = 1; 1985edd16368SStephen M. Cameron } 1986edd16368SStephen M. Cameron 1987edd16368SStephen M. Cameron free_and_out: 1988edd16368SStephen M. Cameron kfree(added); 1989edd16368SStephen M. Cameron kfree(removed); 1990edd16368SStephen M. Cameron } 1991edd16368SStephen M. Cameron 1992edd16368SStephen M. Cameron /* 19939e03aa2fSJoe Perches * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t * 1994edd16368SStephen M. Cameron * Assume's h->devlock is held. 1995edd16368SStephen M. Cameron */ 1996edd16368SStephen M. Cameron static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h, 1997edd16368SStephen M. Cameron int bus, int target, int lun) 1998edd16368SStephen M. Cameron { 1999edd16368SStephen M. Cameron int i; 2000edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd; 2001edd16368SStephen M. Cameron 2002edd16368SStephen M. Cameron for (i = 0; i < h->ndevices; i++) { 2003edd16368SStephen M. Cameron sd = h->dev[i]; 2004edd16368SStephen M. Cameron if (sd->bus == bus && sd->target == target && sd->lun == lun) 2005edd16368SStephen M. Cameron return sd; 2006edd16368SStephen M. Cameron } 2007edd16368SStephen M. Cameron return NULL; 2008edd16368SStephen M. Cameron } 2009edd16368SStephen M. Cameron 2010edd16368SStephen M. Cameron static int hpsa_slave_alloc(struct scsi_device *sdev) 2011edd16368SStephen M. Cameron { 2012edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd; 2013edd16368SStephen M. Cameron unsigned long flags; 2014edd16368SStephen M. Cameron struct ctlr_info *h; 2015edd16368SStephen M. Cameron 2016edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 2017edd16368SStephen M. Cameron spin_lock_irqsave(&h->devlock, flags); 2018d04e62b9SKevin Barnett if (sdev_channel(sdev) == HPSA_PHYSICAL_DEVICE_BUS) { 2019d04e62b9SKevin Barnett struct scsi_target *starget; 2020d04e62b9SKevin Barnett struct sas_rphy *rphy; 2021d04e62b9SKevin Barnett 2022d04e62b9SKevin Barnett starget = scsi_target(sdev); 2023d04e62b9SKevin Barnett rphy = target_to_rphy(starget); 2024d04e62b9SKevin Barnett sd = hpsa_find_device_by_sas_rphy(h, rphy); 2025d04e62b9SKevin Barnett if (sd) { 2026d04e62b9SKevin Barnett sd->target = sdev_id(sdev); 2027d04e62b9SKevin Barnett sd->lun = sdev->lun; 2028d04e62b9SKevin Barnett } 2029d04e62b9SKevin Barnett } else 2030edd16368SStephen M. Cameron sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev), 2031edd16368SStephen M. Cameron sdev_id(sdev), sdev->lun); 2032d04e62b9SKevin Barnett 2033d04e62b9SKevin Barnett if (sd && sd->expose_device) { 203403383736SDon Brace atomic_set(&sd->ioaccel_cmds_out, 0); 2035d04e62b9SKevin Barnett sdev->hostdata = sd; 203641ce4c35SStephen Cameron } else 203741ce4c35SStephen Cameron sdev->hostdata = NULL; 2038edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->devlock, flags); 2039edd16368SStephen M. Cameron return 0; 2040edd16368SStephen M. Cameron } 2041edd16368SStephen M. Cameron 204241ce4c35SStephen Cameron /* configure scsi device based on internal per-device structure */ 204341ce4c35SStephen Cameron static int hpsa_slave_configure(struct scsi_device *sdev) 204441ce4c35SStephen Cameron { 204541ce4c35SStephen Cameron struct hpsa_scsi_dev_t *sd; 204641ce4c35SStephen Cameron int queue_depth; 204741ce4c35SStephen Cameron 204841ce4c35SStephen Cameron sd = sdev->hostdata; 20492a168208SKevin Barnett sdev->no_uld_attach = !sd || !sd->expose_device; 205041ce4c35SStephen Cameron 205141ce4c35SStephen Cameron if (sd) 205241ce4c35SStephen Cameron queue_depth = sd->queue_depth != 0 ? 205341ce4c35SStephen Cameron sd->queue_depth : sdev->host->can_queue; 205441ce4c35SStephen Cameron else 205541ce4c35SStephen Cameron queue_depth = sdev->host->can_queue; 205641ce4c35SStephen Cameron 205741ce4c35SStephen Cameron scsi_change_queue_depth(sdev, queue_depth); 205841ce4c35SStephen Cameron 205941ce4c35SStephen Cameron return 0; 206041ce4c35SStephen Cameron } 206141ce4c35SStephen Cameron 2062edd16368SStephen M. Cameron static void hpsa_slave_destroy(struct scsi_device *sdev) 2063edd16368SStephen M. Cameron { 2064bcc44255SStephen M. Cameron /* nothing to do. */ 2065edd16368SStephen M. Cameron } 2066edd16368SStephen M. Cameron 2067d9a729f3SWebb Scales static void hpsa_free_ioaccel2_sg_chain_blocks(struct ctlr_info *h) 2068d9a729f3SWebb Scales { 2069d9a729f3SWebb Scales int i; 2070d9a729f3SWebb Scales 2071d9a729f3SWebb Scales if (!h->ioaccel2_cmd_sg_list) 2072d9a729f3SWebb Scales return; 2073d9a729f3SWebb Scales for (i = 0; i < h->nr_cmds; i++) { 2074d9a729f3SWebb Scales kfree(h->ioaccel2_cmd_sg_list[i]); 2075d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list[i] = NULL; 2076d9a729f3SWebb Scales } 2077d9a729f3SWebb Scales kfree(h->ioaccel2_cmd_sg_list); 2078d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list = NULL; 2079d9a729f3SWebb Scales } 2080d9a729f3SWebb Scales 2081d9a729f3SWebb Scales static int hpsa_allocate_ioaccel2_sg_chain_blocks(struct ctlr_info *h) 2082d9a729f3SWebb Scales { 2083d9a729f3SWebb Scales int i; 2084d9a729f3SWebb Scales 2085d9a729f3SWebb Scales if (h->chainsize <= 0) 2086d9a729f3SWebb Scales return 0; 2087d9a729f3SWebb Scales 2088d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list = 2089d9a729f3SWebb Scales kzalloc(sizeof(*h->ioaccel2_cmd_sg_list) * h->nr_cmds, 2090d9a729f3SWebb Scales GFP_KERNEL); 2091d9a729f3SWebb Scales if (!h->ioaccel2_cmd_sg_list) 2092d9a729f3SWebb Scales return -ENOMEM; 2093d9a729f3SWebb Scales for (i = 0; i < h->nr_cmds; i++) { 2094d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list[i] = 2095d9a729f3SWebb Scales kmalloc(sizeof(*h->ioaccel2_cmd_sg_list[i]) * 2096d9a729f3SWebb Scales h->maxsgentries, GFP_KERNEL); 2097d9a729f3SWebb Scales if (!h->ioaccel2_cmd_sg_list[i]) 2098d9a729f3SWebb Scales goto clean; 2099d9a729f3SWebb Scales } 2100d9a729f3SWebb Scales return 0; 2101d9a729f3SWebb Scales 2102d9a729f3SWebb Scales clean: 2103d9a729f3SWebb Scales hpsa_free_ioaccel2_sg_chain_blocks(h); 2104d9a729f3SWebb Scales return -ENOMEM; 2105d9a729f3SWebb Scales } 2106d9a729f3SWebb Scales 210733a2ffceSStephen M. Cameron static void hpsa_free_sg_chain_blocks(struct ctlr_info *h) 210833a2ffceSStephen M. Cameron { 210933a2ffceSStephen M. Cameron int i; 211033a2ffceSStephen M. Cameron 211133a2ffceSStephen M. Cameron if (!h->cmd_sg_list) 211233a2ffceSStephen M. Cameron return; 211333a2ffceSStephen M. Cameron for (i = 0; i < h->nr_cmds; i++) { 211433a2ffceSStephen M. Cameron kfree(h->cmd_sg_list[i]); 211533a2ffceSStephen M. Cameron h->cmd_sg_list[i] = NULL; 211633a2ffceSStephen M. Cameron } 211733a2ffceSStephen M. Cameron kfree(h->cmd_sg_list); 211833a2ffceSStephen M. Cameron h->cmd_sg_list = NULL; 211933a2ffceSStephen M. Cameron } 212033a2ffceSStephen M. Cameron 2121105a3dbcSRobert Elliott static int hpsa_alloc_sg_chain_blocks(struct ctlr_info *h) 212233a2ffceSStephen M. Cameron { 212333a2ffceSStephen M. Cameron int i; 212433a2ffceSStephen M. Cameron 212533a2ffceSStephen M. Cameron if (h->chainsize <= 0) 212633a2ffceSStephen M. Cameron return 0; 212733a2ffceSStephen M. Cameron 212833a2ffceSStephen M. Cameron h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds, 212933a2ffceSStephen M. Cameron GFP_KERNEL); 21303d4e6af8SRobert Elliott if (!h->cmd_sg_list) { 21313d4e6af8SRobert Elliott dev_err(&h->pdev->dev, "Failed to allocate SG list\n"); 213233a2ffceSStephen M. Cameron return -ENOMEM; 21333d4e6af8SRobert Elliott } 213433a2ffceSStephen M. Cameron for (i = 0; i < h->nr_cmds; i++) { 213533a2ffceSStephen M. Cameron h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) * 213633a2ffceSStephen M. Cameron h->chainsize, GFP_KERNEL); 21373d4e6af8SRobert Elliott if (!h->cmd_sg_list[i]) { 21383d4e6af8SRobert Elliott dev_err(&h->pdev->dev, "Failed to allocate cmd SG\n"); 213933a2ffceSStephen M. Cameron goto clean; 214033a2ffceSStephen M. Cameron } 21413d4e6af8SRobert Elliott } 214233a2ffceSStephen M. Cameron return 0; 214333a2ffceSStephen M. Cameron 214433a2ffceSStephen M. Cameron clean: 214533a2ffceSStephen M. Cameron hpsa_free_sg_chain_blocks(h); 214633a2ffceSStephen M. Cameron return -ENOMEM; 214733a2ffceSStephen M. Cameron } 214833a2ffceSStephen M. Cameron 2149d9a729f3SWebb Scales static int hpsa_map_ioaccel2_sg_chain_block(struct ctlr_info *h, 2150d9a729f3SWebb Scales struct io_accel2_cmd *cp, struct CommandList *c) 2151d9a729f3SWebb Scales { 2152d9a729f3SWebb Scales struct ioaccel2_sg_element *chain_block; 2153d9a729f3SWebb Scales u64 temp64; 2154d9a729f3SWebb Scales u32 chain_size; 2155d9a729f3SWebb Scales 2156d9a729f3SWebb Scales chain_block = h->ioaccel2_cmd_sg_list[c->cmdindex]; 2157a736e9b6SDon Brace chain_size = le32_to_cpu(cp->sg[0].length); 2158d9a729f3SWebb Scales temp64 = pci_map_single(h->pdev, chain_block, chain_size, 2159d9a729f3SWebb Scales PCI_DMA_TODEVICE); 2160d9a729f3SWebb Scales if (dma_mapping_error(&h->pdev->dev, temp64)) { 2161d9a729f3SWebb Scales /* prevent subsequent unmapping */ 2162d9a729f3SWebb Scales cp->sg->address = 0; 2163d9a729f3SWebb Scales return -1; 2164d9a729f3SWebb Scales } 2165d9a729f3SWebb Scales cp->sg->address = cpu_to_le64(temp64); 2166d9a729f3SWebb Scales return 0; 2167d9a729f3SWebb Scales } 2168d9a729f3SWebb Scales 2169d9a729f3SWebb Scales static void hpsa_unmap_ioaccel2_sg_chain_block(struct ctlr_info *h, 2170d9a729f3SWebb Scales struct io_accel2_cmd *cp) 2171d9a729f3SWebb Scales { 2172d9a729f3SWebb Scales struct ioaccel2_sg_element *chain_sg; 2173d9a729f3SWebb Scales u64 temp64; 2174d9a729f3SWebb Scales u32 chain_size; 2175d9a729f3SWebb Scales 2176d9a729f3SWebb Scales chain_sg = cp->sg; 2177d9a729f3SWebb Scales temp64 = le64_to_cpu(chain_sg->address); 2178a736e9b6SDon Brace chain_size = le32_to_cpu(cp->sg[0].length); 2179d9a729f3SWebb Scales pci_unmap_single(h->pdev, temp64, chain_size, PCI_DMA_TODEVICE); 2180d9a729f3SWebb Scales } 2181d9a729f3SWebb Scales 2182e2bea6dfSStephen M. Cameron static int hpsa_map_sg_chain_block(struct ctlr_info *h, 218333a2ffceSStephen M. Cameron struct CommandList *c) 218433a2ffceSStephen M. Cameron { 218533a2ffceSStephen M. Cameron struct SGDescriptor *chain_sg, *chain_block; 218633a2ffceSStephen M. Cameron u64 temp64; 218750a0decfSStephen M. Cameron u32 chain_len; 218833a2ffceSStephen M. Cameron 218933a2ffceSStephen M. Cameron chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 219033a2ffceSStephen M. Cameron chain_block = h->cmd_sg_list[c->cmdindex]; 219150a0decfSStephen M. Cameron chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN); 219250a0decfSStephen M. Cameron chain_len = sizeof(*chain_sg) * 21932b08b3e9SDon Brace (le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries); 219450a0decfSStephen M. Cameron chain_sg->Len = cpu_to_le32(chain_len); 219550a0decfSStephen M. Cameron temp64 = pci_map_single(h->pdev, chain_block, chain_len, 219633a2ffceSStephen M. Cameron PCI_DMA_TODEVICE); 2197e2bea6dfSStephen M. Cameron if (dma_mapping_error(&h->pdev->dev, temp64)) { 2198e2bea6dfSStephen M. Cameron /* prevent subsequent unmapping */ 219950a0decfSStephen M. Cameron chain_sg->Addr = cpu_to_le64(0); 2200e2bea6dfSStephen M. Cameron return -1; 2201e2bea6dfSStephen M. Cameron } 220250a0decfSStephen M. Cameron chain_sg->Addr = cpu_to_le64(temp64); 2203e2bea6dfSStephen M. Cameron return 0; 220433a2ffceSStephen M. Cameron } 220533a2ffceSStephen M. Cameron 220633a2ffceSStephen M. Cameron static void hpsa_unmap_sg_chain_block(struct ctlr_info *h, 220733a2ffceSStephen M. Cameron struct CommandList *c) 220833a2ffceSStephen M. Cameron { 220933a2ffceSStephen M. Cameron struct SGDescriptor *chain_sg; 221033a2ffceSStephen M. Cameron 221150a0decfSStephen M. Cameron if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries) 221233a2ffceSStephen M. Cameron return; 221333a2ffceSStephen M. Cameron 221433a2ffceSStephen M. Cameron chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 221550a0decfSStephen M. Cameron pci_unmap_single(h->pdev, le64_to_cpu(chain_sg->Addr), 221650a0decfSStephen M. Cameron le32_to_cpu(chain_sg->Len), PCI_DMA_TODEVICE); 221733a2ffceSStephen M. Cameron } 221833a2ffceSStephen M. Cameron 2219a09c1441SScott Teel 2220a09c1441SScott Teel /* Decode the various types of errors on ioaccel2 path. 2221a09c1441SScott Teel * Return 1 for any error that should generate a RAID path retry. 2222a09c1441SScott Teel * Return 0 for errors that don't require a RAID path retry. 2223a09c1441SScott Teel */ 2224a09c1441SScott Teel static int handle_ioaccel_mode2_error(struct ctlr_info *h, 2225c349775eSScott Teel struct CommandList *c, 2226c349775eSScott Teel struct scsi_cmnd *cmd, 2227ba74fdc4SDon Brace struct io_accel2_cmd *c2, 2228ba74fdc4SDon Brace struct hpsa_scsi_dev_t *dev) 2229c349775eSScott Teel { 2230c349775eSScott Teel int data_len; 2231a09c1441SScott Teel int retry = 0; 2232c40820d5SJoe Handzik u32 ioaccel2_resid = 0; 2233c349775eSScott Teel 2234c349775eSScott Teel switch (c2->error_data.serv_response) { 2235c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_COMPLETE: 2236c349775eSScott Teel switch (c2->error_data.status) { 2237c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_GOOD: 2238c349775eSScott Teel break; 2239c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND: 2240ee6b1889SStephen M. Cameron cmd->result |= SAM_STAT_CHECK_CONDITION; 2241c349775eSScott Teel if (c2->error_data.data_present != 2242ee6b1889SStephen M. Cameron IOACCEL2_SENSE_DATA_PRESENT) { 2243ee6b1889SStephen M. Cameron memset(cmd->sense_buffer, 0, 2244ee6b1889SStephen M. Cameron SCSI_SENSE_BUFFERSIZE); 2245c349775eSScott Teel break; 2246ee6b1889SStephen M. Cameron } 2247c349775eSScott Teel /* copy the sense data */ 2248c349775eSScott Teel data_len = c2->error_data.sense_data_len; 2249c349775eSScott Teel if (data_len > SCSI_SENSE_BUFFERSIZE) 2250c349775eSScott Teel data_len = SCSI_SENSE_BUFFERSIZE; 2251c349775eSScott Teel if (data_len > sizeof(c2->error_data.sense_data_buff)) 2252c349775eSScott Teel data_len = 2253c349775eSScott Teel sizeof(c2->error_data.sense_data_buff); 2254c349775eSScott Teel memcpy(cmd->sense_buffer, 2255c349775eSScott Teel c2->error_data.sense_data_buff, data_len); 2256a09c1441SScott Teel retry = 1; 2257c349775eSScott Teel break; 2258c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_BUSY: 2259a09c1441SScott Teel retry = 1; 2260c349775eSScott Teel break; 2261c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON: 2262a09c1441SScott Teel retry = 1; 2263c349775eSScott Teel break; 2264c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL: 22654a8da22bSStephen Cameron retry = 1; 2266c349775eSScott Teel break; 2267c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED: 2268a09c1441SScott Teel retry = 1; 2269c349775eSScott Teel break; 2270c349775eSScott Teel default: 2271a09c1441SScott Teel retry = 1; 2272c349775eSScott Teel break; 2273c349775eSScott Teel } 2274c349775eSScott Teel break; 2275c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_FAILURE: 2276c40820d5SJoe Handzik switch (c2->error_data.status) { 2277c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_IO_ERROR: 2278c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_IO_ABORTED: 2279c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_OVERRUN: 2280c40820d5SJoe Handzik retry = 1; 2281c40820d5SJoe Handzik break; 2282c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_UNDERRUN: 2283c40820d5SJoe Handzik cmd->result = (DID_OK << 16); /* host byte */ 2284c40820d5SJoe Handzik cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 2285c40820d5SJoe Handzik ioaccel2_resid = get_unaligned_le32( 2286c40820d5SJoe Handzik &c2->error_data.resid_cnt[0]); 2287c40820d5SJoe Handzik scsi_set_resid(cmd, ioaccel2_resid); 2288c40820d5SJoe Handzik break; 2289c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_NO_PATH_TO_DEVICE: 2290c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_INVALID_DEVICE: 2291c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_IOACCEL_DISABLED: 2292ba74fdc4SDon Brace /* 2293ba74fdc4SDon Brace * Did an HBA disk disappear? We will eventually 2294ba74fdc4SDon Brace * get a state change event from the controller but 2295ba74fdc4SDon Brace * in the meantime, we need to tell the OS that the 2296ba74fdc4SDon Brace * HBA disk is no longer there and stop I/O 2297ba74fdc4SDon Brace * from going down. This allows the potential re-insert 2298ba74fdc4SDon Brace * of the disk to get the same device node. 2299ba74fdc4SDon Brace */ 2300ba74fdc4SDon Brace if (dev->physical_device && dev->expose_device) { 2301ba74fdc4SDon Brace cmd->result = DID_NO_CONNECT << 16; 2302ba74fdc4SDon Brace dev->removed = 1; 2303ba74fdc4SDon Brace h->drv_req_rescan = 1; 2304ba74fdc4SDon Brace dev_warn(&h->pdev->dev, 2305ba74fdc4SDon Brace "%s: device is gone!\n", __func__); 2306ba74fdc4SDon Brace } else 2307ba74fdc4SDon Brace /* 2308ba74fdc4SDon Brace * Retry by sending down the RAID path. 2309ba74fdc4SDon Brace * We will get an event from ctlr to 2310ba74fdc4SDon Brace * trigger rescan regardless. 2311ba74fdc4SDon Brace */ 2312c40820d5SJoe Handzik retry = 1; 2313c40820d5SJoe Handzik break; 2314c40820d5SJoe Handzik default: 2315c40820d5SJoe Handzik retry = 1; 2316c40820d5SJoe Handzik } 2317c349775eSScott Teel break; 2318c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE: 2319c349775eSScott Teel break; 2320c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS: 2321c349775eSScott Teel break; 2322c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_REJECTED: 2323a09c1441SScott Teel retry = 1; 2324c349775eSScott Teel break; 2325c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN: 2326c349775eSScott Teel break; 2327c349775eSScott Teel default: 2328a09c1441SScott Teel retry = 1; 2329c349775eSScott Teel break; 2330c349775eSScott Teel } 2331a09c1441SScott Teel 2332a09c1441SScott Teel return retry; /* retry on raid path? */ 2333c349775eSScott Teel } 2334c349775eSScott Teel 2335a58e7e53SWebb Scales static void hpsa_cmd_resolve_events(struct ctlr_info *h, 2336a58e7e53SWebb Scales struct CommandList *c) 2337a58e7e53SWebb Scales { 2338d604f533SWebb Scales bool do_wake = false; 2339d604f533SWebb Scales 2340a58e7e53SWebb Scales /* 2341a58e7e53SWebb Scales * Prevent the following race in the abort handler: 2342a58e7e53SWebb Scales * 2343a58e7e53SWebb Scales * 1. LLD is requested to abort a SCSI command 2344a58e7e53SWebb Scales * 2. The SCSI command completes 2345a58e7e53SWebb Scales * 3. The struct CommandList associated with step 2 is made available 2346a58e7e53SWebb Scales * 4. New I/O request to LLD to another LUN re-uses struct CommandList 2347a58e7e53SWebb Scales * 5. Abort handler follows scsi_cmnd->host_scribble and 2348a58e7e53SWebb Scales * finds struct CommandList and tries to aborts it 2349a58e7e53SWebb Scales * Now we have aborted the wrong command. 2350a58e7e53SWebb Scales * 2351d604f533SWebb Scales * Reset c->scsi_cmd here so that the abort or reset handler will know 2352d604f533SWebb Scales * this command has completed. Then, check to see if the handler is 2353a58e7e53SWebb Scales * waiting for this command, and, if so, wake it. 2354a58e7e53SWebb Scales */ 2355a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_IDLE; 2356d604f533SWebb Scales mb(); /* Declare command idle before checking for pending events. */ 2357a58e7e53SWebb Scales if (c->abort_pending) { 2358d604f533SWebb Scales do_wake = true; 2359a58e7e53SWebb Scales c->abort_pending = false; 2360a58e7e53SWebb Scales } 2361d604f533SWebb Scales if (c->reset_pending) { 2362d604f533SWebb Scales unsigned long flags; 2363d604f533SWebb Scales struct hpsa_scsi_dev_t *dev; 2364d604f533SWebb Scales 2365d604f533SWebb Scales /* 2366d604f533SWebb Scales * There appears to be a reset pending; lock the lock and 2367d604f533SWebb Scales * reconfirm. If so, then decrement the count of outstanding 2368d604f533SWebb Scales * commands and wake the reset command if this is the last one. 2369d604f533SWebb Scales */ 2370d604f533SWebb Scales spin_lock_irqsave(&h->lock, flags); 2371d604f533SWebb Scales dev = c->reset_pending; /* Re-fetch under the lock. */ 2372d604f533SWebb Scales if (dev && atomic_dec_and_test(&dev->reset_cmds_out)) 2373d604f533SWebb Scales do_wake = true; 2374d604f533SWebb Scales c->reset_pending = NULL; 2375d604f533SWebb Scales spin_unlock_irqrestore(&h->lock, flags); 2376d604f533SWebb Scales } 2377d604f533SWebb Scales 2378d604f533SWebb Scales if (do_wake) 2379d604f533SWebb Scales wake_up_all(&h->event_sync_wait_queue); 2380a58e7e53SWebb Scales } 2381a58e7e53SWebb Scales 238273153fe5SWebb Scales static void hpsa_cmd_resolve_and_free(struct ctlr_info *h, 238373153fe5SWebb Scales struct CommandList *c) 238473153fe5SWebb Scales { 238573153fe5SWebb Scales hpsa_cmd_resolve_events(h, c); 238673153fe5SWebb Scales cmd_tagged_free(h, c); 238773153fe5SWebb Scales } 238873153fe5SWebb Scales 23898a0ff92cSWebb Scales static void hpsa_cmd_free_and_done(struct ctlr_info *h, 23908a0ff92cSWebb Scales struct CommandList *c, struct scsi_cmnd *cmd) 23918a0ff92cSWebb Scales { 239273153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 2393d49c2077SDon Brace if (cmd && cmd->scsi_done) 23948a0ff92cSWebb Scales cmd->scsi_done(cmd); 23958a0ff92cSWebb Scales } 23968a0ff92cSWebb Scales 23978a0ff92cSWebb Scales static void hpsa_retry_cmd(struct ctlr_info *h, struct CommandList *c) 23988a0ff92cSWebb Scales { 23998a0ff92cSWebb Scales INIT_WORK(&c->work, hpsa_command_resubmit_worker); 24008a0ff92cSWebb Scales queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work); 24018a0ff92cSWebb Scales } 24028a0ff92cSWebb Scales 2403a58e7e53SWebb Scales static void hpsa_set_scsi_cmd_aborted(struct scsi_cmnd *cmd) 2404a58e7e53SWebb Scales { 2405a58e7e53SWebb Scales cmd->result = DID_ABORT << 16; 2406a58e7e53SWebb Scales } 2407a58e7e53SWebb Scales 2408a58e7e53SWebb Scales static void hpsa_cmd_abort_and_free(struct ctlr_info *h, struct CommandList *c, 2409a58e7e53SWebb Scales struct scsi_cmnd *cmd) 2410a58e7e53SWebb Scales { 2411a58e7e53SWebb Scales hpsa_set_scsi_cmd_aborted(cmd); 2412a58e7e53SWebb Scales dev_warn(&h->pdev->dev, "CDB %16phN was aborted with status 0x%x\n", 2413a58e7e53SWebb Scales c->Request.CDB, c->err_info->ScsiStatus); 241473153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 2415a58e7e53SWebb Scales } 2416a58e7e53SWebb Scales 2417c349775eSScott Teel static void process_ioaccel2_completion(struct ctlr_info *h, 2418c349775eSScott Teel struct CommandList *c, struct scsi_cmnd *cmd, 2419c349775eSScott Teel struct hpsa_scsi_dev_t *dev) 2420c349775eSScott Teel { 2421c349775eSScott Teel struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 2422c349775eSScott Teel 2423c349775eSScott Teel /* check for good status */ 2424c349775eSScott Teel if (likely(c2->error_data.serv_response == 0 && 24258a0ff92cSWebb Scales c2->error_data.status == 0)) 24268a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, c, cmd); 2427c349775eSScott Teel 24288a0ff92cSWebb Scales /* 24298a0ff92cSWebb Scales * Any RAID offload error results in retry which will use 2430c349775eSScott Teel * the normal I/O path so the controller can handle whatever's 2431c349775eSScott Teel * wrong. 2432c349775eSScott Teel */ 2433f3f01730SKevin Barnett if (is_logical_device(dev) && 2434c349775eSScott Teel c2->error_data.serv_response == 2435c349775eSScott Teel IOACCEL2_SERV_RESPONSE_FAILURE) { 2436080ef1ccSDon Brace if (c2->error_data.status == 2437064d1b1dSDon Brace IOACCEL2_STATUS_SR_IOACCEL_DISABLED) { 2438c349775eSScott Teel dev->offload_enabled = 0; 2439064d1b1dSDon Brace dev->offload_to_be_enabled = 0; 2440064d1b1dSDon Brace } 24418a0ff92cSWebb Scales 24428a0ff92cSWebb Scales return hpsa_retry_cmd(h, c); 2443080ef1ccSDon Brace } 2444080ef1ccSDon Brace 2445ba74fdc4SDon Brace if (handle_ioaccel_mode2_error(h, c, cmd, c2, dev)) 24468a0ff92cSWebb Scales return hpsa_retry_cmd(h, c); 2447080ef1ccSDon Brace 24488a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, c, cmd); 2449c349775eSScott Teel } 2450c349775eSScott Teel 24519437ac43SStephen Cameron /* Returns 0 on success, < 0 otherwise. */ 24529437ac43SStephen Cameron static int hpsa_evaluate_tmf_status(struct ctlr_info *h, 24539437ac43SStephen Cameron struct CommandList *cp) 24549437ac43SStephen Cameron { 24559437ac43SStephen Cameron u8 tmf_status = cp->err_info->ScsiStatus; 24569437ac43SStephen Cameron 24579437ac43SStephen Cameron switch (tmf_status) { 24589437ac43SStephen Cameron case CISS_TMF_COMPLETE: 24599437ac43SStephen Cameron /* 24609437ac43SStephen Cameron * CISS_TMF_COMPLETE never happens, instead, 24619437ac43SStephen Cameron * ei->CommandStatus == 0 for this case. 24629437ac43SStephen Cameron */ 24639437ac43SStephen Cameron case CISS_TMF_SUCCESS: 24649437ac43SStephen Cameron return 0; 24659437ac43SStephen Cameron case CISS_TMF_INVALID_FRAME: 24669437ac43SStephen Cameron case CISS_TMF_NOT_SUPPORTED: 24679437ac43SStephen Cameron case CISS_TMF_FAILED: 24689437ac43SStephen Cameron case CISS_TMF_WRONG_LUN: 24699437ac43SStephen Cameron case CISS_TMF_OVERLAPPED_TAG: 24709437ac43SStephen Cameron break; 24719437ac43SStephen Cameron default: 24729437ac43SStephen Cameron dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n", 24739437ac43SStephen Cameron tmf_status); 24749437ac43SStephen Cameron break; 24759437ac43SStephen Cameron } 24769437ac43SStephen Cameron return -tmf_status; 24779437ac43SStephen Cameron } 24789437ac43SStephen Cameron 24791fb011fbSStephen M. Cameron static void complete_scsi_command(struct CommandList *cp) 2480edd16368SStephen M. Cameron { 2481edd16368SStephen M. Cameron struct scsi_cmnd *cmd; 2482edd16368SStephen M. Cameron struct ctlr_info *h; 2483edd16368SStephen M. Cameron struct ErrorInfo *ei; 2484283b4a9bSStephen M. Cameron struct hpsa_scsi_dev_t *dev; 2485d9a729f3SWebb Scales struct io_accel2_cmd *c2; 2486edd16368SStephen M. Cameron 24879437ac43SStephen Cameron u8 sense_key; 24889437ac43SStephen Cameron u8 asc; /* additional sense code */ 24899437ac43SStephen Cameron u8 ascq; /* additional sense code qualifier */ 2490db111e18SStephen M. Cameron unsigned long sense_data_size; 2491edd16368SStephen M. Cameron 2492edd16368SStephen M. Cameron ei = cp->err_info; 24937fa3030cSStephen Cameron cmd = cp->scsi_cmd; 2494edd16368SStephen M. Cameron h = cp->h; 2495d49c2077SDon Brace 2496d49c2077SDon Brace if (!cmd->device) { 2497d49c2077SDon Brace cmd->result = DID_NO_CONNECT << 16; 2498d49c2077SDon Brace return hpsa_cmd_free_and_done(h, cp, cmd); 2499d49c2077SDon Brace } 2500d49c2077SDon Brace 2501283b4a9bSStephen M. Cameron dev = cmd->device->hostdata; 2502d9a729f3SWebb Scales c2 = &h->ioaccel2_cmd_pool[cp->cmdindex]; 2503edd16368SStephen M. Cameron 2504edd16368SStephen M. Cameron scsi_dma_unmap(cmd); /* undo the DMA mappings */ 2505e1f7de0cSMatt Gates if ((cp->cmd_type == CMD_SCSI) && 25062b08b3e9SDon Brace (le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries)) 250733a2ffceSStephen M. Cameron hpsa_unmap_sg_chain_block(h, cp); 2508edd16368SStephen M. Cameron 2509d9a729f3SWebb Scales if ((cp->cmd_type == CMD_IOACCEL2) && 2510d9a729f3SWebb Scales (c2->sg[0].chain_indicator == IOACCEL2_CHAIN)) 2511d9a729f3SWebb Scales hpsa_unmap_ioaccel2_sg_chain_block(h, c2); 2512d9a729f3SWebb Scales 2513edd16368SStephen M. Cameron cmd->result = (DID_OK << 16); /* host byte */ 2514edd16368SStephen M. Cameron cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 2515c349775eSScott Teel 2516d49c2077SDon Brace if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1) { 2517d49c2077SDon Brace if (dev->physical_device && dev->expose_device && 2518d49c2077SDon Brace dev->removed) { 2519d49c2077SDon Brace cmd->result = DID_NO_CONNECT << 16; 2520d49c2077SDon Brace return hpsa_cmd_free_and_done(h, cp, cmd); 2521d49c2077SDon Brace } 2522d49c2077SDon Brace if (likely(cp->phys_disk != NULL)) 252303383736SDon Brace atomic_dec(&cp->phys_disk->ioaccel_cmds_out); 2524d49c2077SDon Brace } 252503383736SDon Brace 252625163bd5SWebb Scales /* 252725163bd5SWebb Scales * We check for lockup status here as it may be set for 252825163bd5SWebb Scales * CMD_SCSI, CMD_IOACCEL1 and CMD_IOACCEL2 commands by 252925163bd5SWebb Scales * fail_all_oustanding_cmds() 253025163bd5SWebb Scales */ 253125163bd5SWebb Scales if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) { 253225163bd5SWebb Scales /* DID_NO_CONNECT will prevent a retry */ 253325163bd5SWebb Scales cmd->result = DID_NO_CONNECT << 16; 25348a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, cp, cmd); 253525163bd5SWebb Scales } 253625163bd5SWebb Scales 2537d604f533SWebb Scales if ((unlikely(hpsa_is_pending_event(cp)))) { 2538d604f533SWebb Scales if (cp->reset_pending) 2539d604f533SWebb Scales return hpsa_cmd_resolve_and_free(h, cp); 2540d604f533SWebb Scales if (cp->abort_pending) 2541d604f533SWebb Scales return hpsa_cmd_abort_and_free(h, cp, cmd); 2542d604f533SWebb Scales } 2543d604f533SWebb Scales 2544c349775eSScott Teel if (cp->cmd_type == CMD_IOACCEL2) 2545c349775eSScott Teel return process_ioaccel2_completion(h, cp, cmd, dev); 2546c349775eSScott Teel 25476aa4c361SRobert Elliott scsi_set_resid(cmd, ei->ResidualCnt); 25488a0ff92cSWebb Scales if (ei->CommandStatus == 0) 25498a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, cp, cmd); 25506aa4c361SRobert Elliott 2551e1f7de0cSMatt Gates /* For I/O accelerator commands, copy over some fields to the normal 2552e1f7de0cSMatt Gates * CISS header used below for error handling. 2553e1f7de0cSMatt Gates */ 2554e1f7de0cSMatt Gates if (cp->cmd_type == CMD_IOACCEL1) { 2555e1f7de0cSMatt Gates struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex]; 25562b08b3e9SDon Brace cp->Header.SGList = scsi_sg_count(cmd); 25572b08b3e9SDon Brace cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList); 25582b08b3e9SDon Brace cp->Request.CDBLen = le16_to_cpu(c->io_flags) & 25592b08b3e9SDon Brace IOACCEL1_IOFLAGS_CDBLEN_MASK; 256050a0decfSStephen M. Cameron cp->Header.tag = c->tag; 2561e1f7de0cSMatt Gates memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8); 2562e1f7de0cSMatt Gates memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen); 2563283b4a9bSStephen M. Cameron 2564283b4a9bSStephen M. Cameron /* Any RAID offload error results in retry which will use 2565283b4a9bSStephen M. Cameron * the normal I/O path so the controller can handle whatever's 2566283b4a9bSStephen M. Cameron * wrong. 2567283b4a9bSStephen M. Cameron */ 2568f3f01730SKevin Barnett if (is_logical_device(dev)) { 2569283b4a9bSStephen M. Cameron if (ei->CommandStatus == CMD_IOACCEL_DISABLED) 2570283b4a9bSStephen M. Cameron dev->offload_enabled = 0; 25718a0ff92cSWebb Scales return hpsa_retry_cmd(h, cp); 2572283b4a9bSStephen M. Cameron } 2573e1f7de0cSMatt Gates } 2574e1f7de0cSMatt Gates 2575edd16368SStephen M. Cameron /* an error has occurred */ 2576edd16368SStephen M. Cameron switch (ei->CommandStatus) { 2577edd16368SStephen M. Cameron 2578edd16368SStephen M. Cameron case CMD_TARGET_STATUS: 25799437ac43SStephen Cameron cmd->result |= ei->ScsiStatus; 25809437ac43SStephen Cameron /* copy the sense data */ 25819437ac43SStephen Cameron if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo)) 25829437ac43SStephen Cameron sense_data_size = SCSI_SENSE_BUFFERSIZE; 25839437ac43SStephen Cameron else 25849437ac43SStephen Cameron sense_data_size = sizeof(ei->SenseInfo); 25859437ac43SStephen Cameron if (ei->SenseLen < sense_data_size) 25869437ac43SStephen Cameron sense_data_size = ei->SenseLen; 25879437ac43SStephen Cameron memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size); 25889437ac43SStephen Cameron if (ei->ScsiStatus) 25899437ac43SStephen Cameron decode_sense_data(ei->SenseInfo, sense_data_size, 25909437ac43SStephen Cameron &sense_key, &asc, &ascq); 2591edd16368SStephen M. Cameron if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) { 25921d3b3609SMatt Gates if (sense_key == ABORTED_COMMAND) { 25932e311fbaSStephen M. Cameron cmd->result |= DID_SOFT_ERROR << 16; 25941d3b3609SMatt Gates break; 25951d3b3609SMatt Gates } 2596edd16368SStephen M. Cameron break; 2597edd16368SStephen M. Cameron } 2598edd16368SStephen M. Cameron /* Problem was not a check condition 2599edd16368SStephen M. Cameron * Pass it up to the upper layers... 2600edd16368SStephen M. Cameron */ 2601edd16368SStephen M. Cameron if (ei->ScsiStatus) { 2602edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "cp %p has status 0x%x " 2603edd16368SStephen M. Cameron "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, " 2604edd16368SStephen M. Cameron "Returning result: 0x%x\n", 2605edd16368SStephen M. Cameron cp, ei->ScsiStatus, 2606edd16368SStephen M. Cameron sense_key, asc, ascq, 2607edd16368SStephen M. Cameron cmd->result); 2608edd16368SStephen M. Cameron } else { /* scsi status is zero??? How??? */ 2609edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. " 2610edd16368SStephen M. Cameron "Returning no connection.\n", cp), 2611edd16368SStephen M. Cameron 2612edd16368SStephen M. Cameron /* Ordinarily, this case should never happen, 2613edd16368SStephen M. Cameron * but there is a bug in some released firmware 2614edd16368SStephen M. Cameron * revisions that allows it to happen if, for 2615edd16368SStephen M. Cameron * example, a 4100 backplane loses power and 2616edd16368SStephen M. Cameron * the tape drive is in it. We assume that 2617edd16368SStephen M. Cameron * it's a fatal error of some kind because we 2618edd16368SStephen M. Cameron * can't show that it wasn't. We will make it 2619edd16368SStephen M. Cameron * look like selection timeout since that is 2620edd16368SStephen M. Cameron * the most common reason for this to occur, 2621edd16368SStephen M. Cameron * and it's severe enough. 2622edd16368SStephen M. Cameron */ 2623edd16368SStephen M. Cameron 2624edd16368SStephen M. Cameron cmd->result = DID_NO_CONNECT << 16; 2625edd16368SStephen M. Cameron } 2626edd16368SStephen M. Cameron break; 2627edd16368SStephen M. Cameron 2628edd16368SStephen M. Cameron case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 2629edd16368SStephen M. Cameron break; 2630edd16368SStephen M. Cameron case CMD_DATA_OVERRUN: 2631f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, 2632f42e81e1SStephen Cameron "CDB %16phN data overrun\n", cp->Request.CDB); 2633edd16368SStephen M. Cameron break; 2634edd16368SStephen M. Cameron case CMD_INVALID: { 2635edd16368SStephen M. Cameron /* print_bytes(cp, sizeof(*cp), 1, 0); 2636edd16368SStephen M. Cameron print_cmd(cp); */ 2637edd16368SStephen M. Cameron /* We get CMD_INVALID if you address a non-existent device 2638edd16368SStephen M. Cameron * instead of a selection timeout (no response). You will 2639edd16368SStephen M. Cameron * see this if you yank out a drive, then try to access it. 2640edd16368SStephen M. Cameron * This is kind of a shame because it means that any other 2641edd16368SStephen M. Cameron * CMD_INVALID (e.g. driver bug) will get interpreted as a 2642edd16368SStephen M. Cameron * missing target. */ 2643edd16368SStephen M. Cameron cmd->result = DID_NO_CONNECT << 16; 2644edd16368SStephen M. Cameron } 2645edd16368SStephen M. Cameron break; 2646edd16368SStephen M. Cameron case CMD_PROTOCOL_ERR: 2647256d0eaaSStephen M. Cameron cmd->result = DID_ERROR << 16; 2648f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n", 2649f42e81e1SStephen Cameron cp->Request.CDB); 2650edd16368SStephen M. Cameron break; 2651edd16368SStephen M. Cameron case CMD_HARDWARE_ERR: 2652edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2653f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n", 2654f42e81e1SStephen Cameron cp->Request.CDB); 2655edd16368SStephen M. Cameron break; 2656edd16368SStephen M. Cameron case CMD_CONNECTION_LOST: 2657edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2658f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n", 2659f42e81e1SStephen Cameron cp->Request.CDB); 2660edd16368SStephen M. Cameron break; 2661edd16368SStephen M. Cameron case CMD_ABORTED: 2662a58e7e53SWebb Scales /* Return now to avoid calling scsi_done(). */ 2663a58e7e53SWebb Scales return hpsa_cmd_abort_and_free(h, cp, cmd); 2664edd16368SStephen M. Cameron case CMD_ABORT_FAILED: 2665edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2666f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n", 2667f42e81e1SStephen Cameron cp->Request.CDB); 2668edd16368SStephen M. Cameron break; 2669edd16368SStephen M. Cameron case CMD_UNSOLICITED_ABORT: 2670f6e76055SStephen M. Cameron cmd->result = DID_SOFT_ERROR << 16; /* retry the command */ 2671f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n", 2672f42e81e1SStephen Cameron cp->Request.CDB); 2673edd16368SStephen M. Cameron break; 2674edd16368SStephen M. Cameron case CMD_TIMEOUT: 2675edd16368SStephen M. Cameron cmd->result = DID_TIME_OUT << 16; 2676f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN timed out\n", 2677f42e81e1SStephen Cameron cp->Request.CDB); 2678edd16368SStephen M. Cameron break; 26791d5e2ed0SStephen M. Cameron case CMD_UNABORTABLE: 26801d5e2ed0SStephen M. Cameron cmd->result = DID_ERROR << 16; 26811d5e2ed0SStephen M. Cameron dev_warn(&h->pdev->dev, "Command unabortable\n"); 26821d5e2ed0SStephen M. Cameron break; 26839437ac43SStephen Cameron case CMD_TMF_STATUS: 26849437ac43SStephen Cameron if (hpsa_evaluate_tmf_status(h, cp)) /* TMF failed? */ 26859437ac43SStephen Cameron cmd->result = DID_ERROR << 16; 26869437ac43SStephen Cameron break; 2687283b4a9bSStephen M. Cameron case CMD_IOACCEL_DISABLED: 2688283b4a9bSStephen M. Cameron /* This only handles the direct pass-through case since RAID 2689283b4a9bSStephen M. Cameron * offload is handled above. Just attempt a retry. 2690283b4a9bSStephen M. Cameron */ 2691283b4a9bSStephen M. Cameron cmd->result = DID_SOFT_ERROR << 16; 2692283b4a9bSStephen M. Cameron dev_warn(&h->pdev->dev, 2693283b4a9bSStephen M. Cameron "cp %p had HP SSD Smart Path error\n", cp); 2694283b4a9bSStephen M. Cameron break; 2695edd16368SStephen M. Cameron default: 2696edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2697edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n", 2698edd16368SStephen M. Cameron cp, ei->CommandStatus); 2699edd16368SStephen M. Cameron } 27008a0ff92cSWebb Scales 27018a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, cp, cmd); 2702edd16368SStephen M. Cameron } 2703edd16368SStephen M. Cameron 2704edd16368SStephen M. Cameron static void hpsa_pci_unmap(struct pci_dev *pdev, 2705edd16368SStephen M. Cameron struct CommandList *c, int sg_used, int data_direction) 2706edd16368SStephen M. Cameron { 2707edd16368SStephen M. Cameron int i; 2708edd16368SStephen M. Cameron 270950a0decfSStephen M. Cameron for (i = 0; i < sg_used; i++) 271050a0decfSStephen M. Cameron pci_unmap_single(pdev, (dma_addr_t) le64_to_cpu(c->SG[i].Addr), 271150a0decfSStephen M. Cameron le32_to_cpu(c->SG[i].Len), 2712edd16368SStephen M. Cameron data_direction); 2713edd16368SStephen M. Cameron } 2714edd16368SStephen M. Cameron 2715a2dac136SStephen M. Cameron static int hpsa_map_one(struct pci_dev *pdev, 2716edd16368SStephen M. Cameron struct CommandList *cp, 2717edd16368SStephen M. Cameron unsigned char *buf, 2718edd16368SStephen M. Cameron size_t buflen, 2719edd16368SStephen M. Cameron int data_direction) 2720edd16368SStephen M. Cameron { 272101a02ffcSStephen M. Cameron u64 addr64; 2722edd16368SStephen M. Cameron 2723edd16368SStephen M. Cameron if (buflen == 0 || data_direction == PCI_DMA_NONE) { 2724edd16368SStephen M. Cameron cp->Header.SGList = 0; 272550a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(0); 2726a2dac136SStephen M. Cameron return 0; 2727edd16368SStephen M. Cameron } 2728edd16368SStephen M. Cameron 272950a0decfSStephen M. Cameron addr64 = pci_map_single(pdev, buf, buflen, data_direction); 2730eceaae18SShuah Khan if (dma_mapping_error(&pdev->dev, addr64)) { 2731a2dac136SStephen M. Cameron /* Prevent subsequent unmap of something never mapped */ 2732eceaae18SShuah Khan cp->Header.SGList = 0; 273350a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(0); 2734a2dac136SStephen M. Cameron return -1; 2735eceaae18SShuah Khan } 273650a0decfSStephen M. Cameron cp->SG[0].Addr = cpu_to_le64(addr64); 273750a0decfSStephen M. Cameron cp->SG[0].Len = cpu_to_le32(buflen); 273850a0decfSStephen M. Cameron cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */ 273950a0decfSStephen M. Cameron cp->Header.SGList = 1; /* no. SGs contig in this cmd */ 274050a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */ 2741a2dac136SStephen M. Cameron return 0; 2742edd16368SStephen M. Cameron } 2743edd16368SStephen M. Cameron 274425163bd5SWebb Scales #define NO_TIMEOUT ((unsigned long) -1) 274525163bd5SWebb Scales #define DEFAULT_TIMEOUT 30000 /* milliseconds */ 274625163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h, 274725163bd5SWebb Scales struct CommandList *c, int reply_queue, unsigned long timeout_msecs) 2748edd16368SStephen M. Cameron { 2749edd16368SStephen M. Cameron DECLARE_COMPLETION_ONSTACK(wait); 2750edd16368SStephen M. Cameron 2751edd16368SStephen M. Cameron c->waiting = &wait; 275225163bd5SWebb Scales __enqueue_cmd_and_start_io(h, c, reply_queue); 275325163bd5SWebb Scales if (timeout_msecs == NO_TIMEOUT) { 275425163bd5SWebb Scales /* TODO: get rid of this no-timeout thing */ 275525163bd5SWebb Scales wait_for_completion_io(&wait); 275625163bd5SWebb Scales return IO_OK; 275725163bd5SWebb Scales } 275825163bd5SWebb Scales if (!wait_for_completion_io_timeout(&wait, 275925163bd5SWebb Scales msecs_to_jiffies(timeout_msecs))) { 276025163bd5SWebb Scales dev_warn(&h->pdev->dev, "Command timed out.\n"); 276125163bd5SWebb Scales return -ETIMEDOUT; 276225163bd5SWebb Scales } 276325163bd5SWebb Scales return IO_OK; 276425163bd5SWebb Scales } 276525163bd5SWebb Scales 276625163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c, 276725163bd5SWebb Scales int reply_queue, unsigned long timeout_msecs) 276825163bd5SWebb Scales { 276925163bd5SWebb Scales if (unlikely(lockup_detected(h))) { 277025163bd5SWebb Scales c->err_info->CommandStatus = CMD_CTLR_LOCKUP; 277125163bd5SWebb Scales return IO_OK; 277225163bd5SWebb Scales } 277325163bd5SWebb Scales return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs); 2774edd16368SStephen M. Cameron } 2775edd16368SStephen M. Cameron 2776094963daSStephen M. Cameron static u32 lockup_detected(struct ctlr_info *h) 2777094963daSStephen M. Cameron { 2778094963daSStephen M. Cameron int cpu; 2779094963daSStephen M. Cameron u32 rc, *lockup_detected; 2780094963daSStephen M. Cameron 2781094963daSStephen M. Cameron cpu = get_cpu(); 2782094963daSStephen M. Cameron lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 2783094963daSStephen M. Cameron rc = *lockup_detected; 2784094963daSStephen M. Cameron put_cpu(); 2785094963daSStephen M. Cameron return rc; 2786094963daSStephen M. Cameron } 2787094963daSStephen M. Cameron 27889c2fc160SStephen M. Cameron #define MAX_DRIVER_CMD_RETRIES 25 278925163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h, 279025163bd5SWebb Scales struct CommandList *c, int data_direction, unsigned long timeout_msecs) 2791edd16368SStephen M. Cameron { 27929c2fc160SStephen M. Cameron int backoff_time = 10, retry_count = 0; 279325163bd5SWebb Scales int rc; 2794edd16368SStephen M. Cameron 2795edd16368SStephen M. Cameron do { 27967630abd0SJoe Perches memset(c->err_info, 0, sizeof(*c->err_info)); 279725163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 279825163bd5SWebb Scales timeout_msecs); 279925163bd5SWebb Scales if (rc) 280025163bd5SWebb Scales break; 2801edd16368SStephen M. Cameron retry_count++; 28029c2fc160SStephen M. Cameron if (retry_count > 3) { 28039c2fc160SStephen M. Cameron msleep(backoff_time); 28049c2fc160SStephen M. Cameron if (backoff_time < 1000) 28059c2fc160SStephen M. Cameron backoff_time *= 2; 28069c2fc160SStephen M. Cameron } 2807852af20aSMatt Bondurant } while ((check_for_unit_attention(h, c) || 28089c2fc160SStephen M. Cameron check_for_busy(h, c)) && 28099c2fc160SStephen M. Cameron retry_count <= MAX_DRIVER_CMD_RETRIES); 2810edd16368SStephen M. Cameron hpsa_pci_unmap(h->pdev, c, 1, data_direction); 281125163bd5SWebb Scales if (retry_count > MAX_DRIVER_CMD_RETRIES) 281225163bd5SWebb Scales rc = -EIO; 281325163bd5SWebb Scales return rc; 2814edd16368SStephen M. Cameron } 2815edd16368SStephen M. Cameron 2816d1e8beacSStephen M. Cameron static void hpsa_print_cmd(struct ctlr_info *h, char *txt, 2817d1e8beacSStephen M. Cameron struct CommandList *c) 2818edd16368SStephen M. Cameron { 2819d1e8beacSStephen M. Cameron const u8 *cdb = c->Request.CDB; 2820d1e8beacSStephen M. Cameron const u8 *lun = c->Header.LUN.LunAddrBytes; 2821edd16368SStephen M. Cameron 2822d1e8beacSStephen M. Cameron dev_warn(&h->pdev->dev, "%s: LUN:%02x%02x%02x%02x%02x%02x%02x%02x" 2823d1e8beacSStephen M. Cameron " CDB:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x\n", 2824d1e8beacSStephen M. Cameron txt, lun[0], lun[1], lun[2], lun[3], 2825d1e8beacSStephen M. Cameron lun[4], lun[5], lun[6], lun[7], 2826d1e8beacSStephen M. Cameron cdb[0], cdb[1], cdb[2], cdb[3], 2827d1e8beacSStephen M. Cameron cdb[4], cdb[5], cdb[6], cdb[7], 2828d1e8beacSStephen M. Cameron cdb[8], cdb[9], cdb[10], cdb[11], 2829d1e8beacSStephen M. Cameron cdb[12], cdb[13], cdb[14], cdb[15]); 2830d1e8beacSStephen M. Cameron } 2831d1e8beacSStephen M. Cameron 2832d1e8beacSStephen M. Cameron static void hpsa_scsi_interpret_error(struct ctlr_info *h, 2833d1e8beacSStephen M. Cameron struct CommandList *cp) 2834d1e8beacSStephen M. Cameron { 2835d1e8beacSStephen M. Cameron const struct ErrorInfo *ei = cp->err_info; 2836d1e8beacSStephen M. Cameron struct device *d = &cp->h->pdev->dev; 28379437ac43SStephen Cameron u8 sense_key, asc, ascq; 28389437ac43SStephen Cameron int sense_len; 2839d1e8beacSStephen M. Cameron 2840edd16368SStephen M. Cameron switch (ei->CommandStatus) { 2841edd16368SStephen M. Cameron case CMD_TARGET_STATUS: 28429437ac43SStephen Cameron if (ei->SenseLen > sizeof(ei->SenseInfo)) 28439437ac43SStephen Cameron sense_len = sizeof(ei->SenseInfo); 28449437ac43SStephen Cameron else 28459437ac43SStephen Cameron sense_len = ei->SenseLen; 28469437ac43SStephen Cameron decode_sense_data(ei->SenseInfo, sense_len, 28479437ac43SStephen Cameron &sense_key, &asc, &ascq); 2848d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "SCSI status", cp); 2849d1e8beacSStephen M. Cameron if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) 28509437ac43SStephen Cameron dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n", 28519437ac43SStephen Cameron sense_key, asc, ascq); 2852d1e8beacSStephen M. Cameron else 28539437ac43SStephen Cameron dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus); 2854edd16368SStephen M. Cameron if (ei->ScsiStatus == 0) 2855edd16368SStephen M. Cameron dev_warn(d, "SCSI status is abnormally zero. " 2856edd16368SStephen M. Cameron "(probably indicates selection timeout " 2857edd16368SStephen M. Cameron "reported incorrectly due to a known " 2858edd16368SStephen M. Cameron "firmware bug, circa July, 2001.)\n"); 2859edd16368SStephen M. Cameron break; 2860edd16368SStephen M. Cameron case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 2861edd16368SStephen M. Cameron break; 2862edd16368SStephen M. Cameron case CMD_DATA_OVERRUN: 2863d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "overrun condition", cp); 2864edd16368SStephen M. Cameron break; 2865edd16368SStephen M. Cameron case CMD_INVALID: { 2866edd16368SStephen M. Cameron /* controller unfortunately reports SCSI passthru's 2867edd16368SStephen M. Cameron * to non-existent targets as invalid commands. 2868edd16368SStephen M. Cameron */ 2869d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "invalid command", cp); 2870d1e8beacSStephen M. Cameron dev_warn(d, "probably means device no longer present\n"); 2871edd16368SStephen M. Cameron } 2872edd16368SStephen M. Cameron break; 2873edd16368SStephen M. Cameron case CMD_PROTOCOL_ERR: 2874d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "protocol error", cp); 2875edd16368SStephen M. Cameron break; 2876edd16368SStephen M. Cameron case CMD_HARDWARE_ERR: 2877d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "hardware error", cp); 2878edd16368SStephen M. Cameron break; 2879edd16368SStephen M. Cameron case CMD_CONNECTION_LOST: 2880d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "connection lost", cp); 2881edd16368SStephen M. Cameron break; 2882edd16368SStephen M. Cameron case CMD_ABORTED: 2883d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "aborted", cp); 2884edd16368SStephen M. Cameron break; 2885edd16368SStephen M. Cameron case CMD_ABORT_FAILED: 2886d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "abort failed", cp); 2887edd16368SStephen M. Cameron break; 2888edd16368SStephen M. Cameron case CMD_UNSOLICITED_ABORT: 2889d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "unsolicited abort", cp); 2890edd16368SStephen M. Cameron break; 2891edd16368SStephen M. Cameron case CMD_TIMEOUT: 2892d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "timed out", cp); 2893edd16368SStephen M. Cameron break; 28941d5e2ed0SStephen M. Cameron case CMD_UNABORTABLE: 2895d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "unabortable", cp); 28961d5e2ed0SStephen M. Cameron break; 289725163bd5SWebb Scales case CMD_CTLR_LOCKUP: 289825163bd5SWebb Scales hpsa_print_cmd(h, "controller lockup detected", cp); 289925163bd5SWebb Scales break; 2900edd16368SStephen M. Cameron default: 2901d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "unknown status", cp); 2902d1e8beacSStephen M. Cameron dev_warn(d, "Unknown command status %x\n", 2903edd16368SStephen M. Cameron ei->CommandStatus); 2904edd16368SStephen M. Cameron } 2905edd16368SStephen M. Cameron } 2906edd16368SStephen M. Cameron 2907edd16368SStephen M. Cameron static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr, 2908b7bb24ebSStephen M. Cameron u16 page, unsigned char *buf, 2909edd16368SStephen M. Cameron unsigned char bufsize) 2910edd16368SStephen M. Cameron { 2911edd16368SStephen M. Cameron int rc = IO_OK; 2912edd16368SStephen M. Cameron struct CommandList *c; 2913edd16368SStephen M. Cameron struct ErrorInfo *ei; 2914edd16368SStephen M. Cameron 291545fcb86eSStephen Cameron c = cmd_alloc(h); 2916edd16368SStephen M. Cameron 2917a2dac136SStephen M. Cameron if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, 2918a2dac136SStephen M. Cameron page, scsi3addr, TYPE_CMD)) { 2919a2dac136SStephen M. Cameron rc = -1; 2920a2dac136SStephen M. Cameron goto out; 2921a2dac136SStephen M. Cameron } 292225163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 2923c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 292425163bd5SWebb Scales if (rc) 292525163bd5SWebb Scales goto out; 2926edd16368SStephen M. Cameron ei = c->err_info; 2927edd16368SStephen M. Cameron if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 2928d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 2929edd16368SStephen M. Cameron rc = -1; 2930edd16368SStephen M. Cameron } 2931a2dac136SStephen M. Cameron out: 293245fcb86eSStephen Cameron cmd_free(h, c); 2933edd16368SStephen M. Cameron return rc; 2934edd16368SStephen M. Cameron } 2935edd16368SStephen M. Cameron 2936bf711ac6SScott Teel static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr, 293725163bd5SWebb Scales u8 reset_type, int reply_queue) 2938edd16368SStephen M. Cameron { 2939edd16368SStephen M. Cameron int rc = IO_OK; 2940edd16368SStephen M. Cameron struct CommandList *c; 2941edd16368SStephen M. Cameron struct ErrorInfo *ei; 2942edd16368SStephen M. Cameron 294345fcb86eSStephen Cameron c = cmd_alloc(h); 2944edd16368SStephen M. Cameron 2945edd16368SStephen M. Cameron 2946a2dac136SStephen M. Cameron /* fill_cmd can't fail here, no data buffer to map. */ 29470b9b7b6eSScott Teel (void) fill_cmd(c, reset_type, h, NULL, 0, 0, 2948bf711ac6SScott Teel scsi3addr, TYPE_MSG); 2949c448ecfaSDon Brace rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 295025163bd5SWebb Scales if (rc) { 295125163bd5SWebb Scales dev_warn(&h->pdev->dev, "Failed to send reset command\n"); 295225163bd5SWebb Scales goto out; 295325163bd5SWebb Scales } 2954edd16368SStephen M. Cameron /* no unmap needed here because no data xfer. */ 2955edd16368SStephen M. Cameron 2956edd16368SStephen M. Cameron ei = c->err_info; 2957edd16368SStephen M. Cameron if (ei->CommandStatus != 0) { 2958d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 2959edd16368SStephen M. Cameron rc = -1; 2960edd16368SStephen M. Cameron } 296125163bd5SWebb Scales out: 296245fcb86eSStephen Cameron cmd_free(h, c); 2963edd16368SStephen M. Cameron return rc; 2964edd16368SStephen M. Cameron } 2965edd16368SStephen M. Cameron 2966d604f533SWebb Scales static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c, 2967d604f533SWebb Scales struct hpsa_scsi_dev_t *dev, 2968d604f533SWebb Scales unsigned char *scsi3addr) 2969d604f533SWebb Scales { 2970d604f533SWebb Scales int i; 2971d604f533SWebb Scales bool match = false; 2972d604f533SWebb Scales struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 2973d604f533SWebb Scales struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2; 2974d604f533SWebb Scales 2975d604f533SWebb Scales if (hpsa_is_cmd_idle(c)) 2976d604f533SWebb Scales return false; 2977d604f533SWebb Scales 2978d604f533SWebb Scales switch (c->cmd_type) { 2979d604f533SWebb Scales case CMD_SCSI: 2980d604f533SWebb Scales case CMD_IOCTL_PEND: 2981d604f533SWebb Scales match = !memcmp(scsi3addr, &c->Header.LUN.LunAddrBytes, 2982d604f533SWebb Scales sizeof(c->Header.LUN.LunAddrBytes)); 2983d604f533SWebb Scales break; 2984d604f533SWebb Scales 2985d604f533SWebb Scales case CMD_IOACCEL1: 2986d604f533SWebb Scales case CMD_IOACCEL2: 2987d604f533SWebb Scales if (c->phys_disk == dev) { 2988d604f533SWebb Scales /* HBA mode match */ 2989d604f533SWebb Scales match = true; 2990d604f533SWebb Scales } else { 2991d604f533SWebb Scales /* Possible RAID mode -- check each phys dev. */ 2992d604f533SWebb Scales /* FIXME: Do we need to take out a lock here? If 2993d604f533SWebb Scales * so, we could just call hpsa_get_pdisk_of_ioaccel2() 2994d604f533SWebb Scales * instead. */ 2995d604f533SWebb Scales for (i = 0; i < dev->nphysical_disks && !match; i++) { 2996d604f533SWebb Scales /* FIXME: an alternate test might be 2997d604f533SWebb Scales * 2998d604f533SWebb Scales * match = dev->phys_disk[i]->ioaccel_handle 2999d604f533SWebb Scales * == c2->scsi_nexus; */ 3000d604f533SWebb Scales match = dev->phys_disk[i] == c->phys_disk; 3001d604f533SWebb Scales } 3002d604f533SWebb Scales } 3003d604f533SWebb Scales break; 3004d604f533SWebb Scales 3005d604f533SWebb Scales case IOACCEL2_TMF: 3006d604f533SWebb Scales for (i = 0; i < dev->nphysical_disks && !match; i++) { 3007d604f533SWebb Scales match = dev->phys_disk[i]->ioaccel_handle == 3008d604f533SWebb Scales le32_to_cpu(ac->it_nexus); 3009d604f533SWebb Scales } 3010d604f533SWebb Scales break; 3011d604f533SWebb Scales 3012d604f533SWebb Scales case 0: /* The command is in the middle of being initialized. */ 3013d604f533SWebb Scales match = false; 3014d604f533SWebb Scales break; 3015d604f533SWebb Scales 3016d604f533SWebb Scales default: 3017d604f533SWebb Scales dev_err(&h->pdev->dev, "unexpected cmd_type: %d\n", 3018d604f533SWebb Scales c->cmd_type); 3019d604f533SWebb Scales BUG(); 3020d604f533SWebb Scales } 3021d604f533SWebb Scales 3022d604f533SWebb Scales return match; 3023d604f533SWebb Scales } 3024d604f533SWebb Scales 3025d604f533SWebb Scales static int hpsa_do_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev, 3026d604f533SWebb Scales unsigned char *scsi3addr, u8 reset_type, int reply_queue) 3027d604f533SWebb Scales { 3028d604f533SWebb Scales int i; 3029d604f533SWebb Scales int rc = 0; 3030d604f533SWebb Scales 3031d604f533SWebb Scales /* We can really only handle one reset at a time */ 3032d604f533SWebb Scales if (mutex_lock_interruptible(&h->reset_mutex) == -EINTR) { 3033d604f533SWebb Scales dev_warn(&h->pdev->dev, "concurrent reset wait interrupted.\n"); 3034d604f533SWebb Scales return -EINTR; 3035d604f533SWebb Scales } 3036d604f533SWebb Scales 3037d604f533SWebb Scales BUG_ON(atomic_read(&dev->reset_cmds_out) != 0); 3038d604f533SWebb Scales 3039d604f533SWebb Scales for (i = 0; i < h->nr_cmds; i++) { 3040d604f533SWebb Scales struct CommandList *c = h->cmd_pool + i; 3041d604f533SWebb Scales int refcount = atomic_inc_return(&c->refcount); 3042d604f533SWebb Scales 3043d604f533SWebb Scales if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, scsi3addr)) { 3044d604f533SWebb Scales unsigned long flags; 3045d604f533SWebb Scales 3046d604f533SWebb Scales /* 3047d604f533SWebb Scales * Mark the target command as having a reset pending, 3048d604f533SWebb Scales * then lock a lock so that the command cannot complete 3049d604f533SWebb Scales * while we're considering it. If the command is not 3050d604f533SWebb Scales * idle then count it; otherwise revoke the event. 3051d604f533SWebb Scales */ 3052d604f533SWebb Scales c->reset_pending = dev; 3053d604f533SWebb Scales spin_lock_irqsave(&h->lock, flags); /* Implied MB */ 3054d604f533SWebb Scales if (!hpsa_is_cmd_idle(c)) 3055d604f533SWebb Scales atomic_inc(&dev->reset_cmds_out); 3056d604f533SWebb Scales else 3057d604f533SWebb Scales c->reset_pending = NULL; 3058d604f533SWebb Scales spin_unlock_irqrestore(&h->lock, flags); 3059d604f533SWebb Scales } 3060d604f533SWebb Scales 3061d604f533SWebb Scales cmd_free(h, c); 3062d604f533SWebb Scales } 3063d604f533SWebb Scales 3064d604f533SWebb Scales rc = hpsa_send_reset(h, scsi3addr, reset_type, reply_queue); 3065d604f533SWebb Scales if (!rc) 3066d604f533SWebb Scales wait_event(h->event_sync_wait_queue, 3067d604f533SWebb Scales atomic_read(&dev->reset_cmds_out) == 0 || 3068d604f533SWebb Scales lockup_detected(h)); 3069d604f533SWebb Scales 3070d604f533SWebb Scales if (unlikely(lockup_detected(h))) { 3071d604f533SWebb Scales dev_warn(&h->pdev->dev, 3072d604f533SWebb Scales "Controller lockup detected during reset wait\n"); 3073d604f533SWebb Scales rc = -ENODEV; 3074d604f533SWebb Scales } 3075d604f533SWebb Scales 3076d604f533SWebb Scales if (unlikely(rc)) 3077d604f533SWebb Scales atomic_set(&dev->reset_cmds_out, 0); 3078d604f533SWebb Scales 3079d604f533SWebb Scales mutex_unlock(&h->reset_mutex); 3080d604f533SWebb Scales return rc; 3081d604f533SWebb Scales } 3082d604f533SWebb Scales 3083edd16368SStephen M. Cameron static void hpsa_get_raid_level(struct ctlr_info *h, 3084edd16368SStephen M. Cameron unsigned char *scsi3addr, unsigned char *raid_level) 3085edd16368SStephen M. Cameron { 3086edd16368SStephen M. Cameron int rc; 3087edd16368SStephen M. Cameron unsigned char *buf; 3088edd16368SStephen M. Cameron 3089edd16368SStephen M. Cameron *raid_level = RAID_UNKNOWN; 3090edd16368SStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 3091edd16368SStephen M. Cameron if (!buf) 3092edd16368SStephen M. Cameron return; 3093*8383278dSScott Teel 3094*8383278dSScott Teel if (!hpsa_vpd_page_supported(h, scsi3addr, 3095*8383278dSScott Teel HPSA_VPD_LV_DEVICE_GEOMETRY)) 3096*8383278dSScott Teel goto exit; 3097*8383278dSScott Teel 3098*8383278dSScott Teel rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 3099*8383278dSScott Teel HPSA_VPD_LV_DEVICE_GEOMETRY, buf, 64); 3100*8383278dSScott Teel 3101edd16368SStephen M. Cameron if (rc == 0) 3102edd16368SStephen M. Cameron *raid_level = buf[8]; 3103edd16368SStephen M. Cameron if (*raid_level > RAID_UNKNOWN) 3104edd16368SStephen M. Cameron *raid_level = RAID_UNKNOWN; 3105*8383278dSScott Teel exit: 3106edd16368SStephen M. Cameron kfree(buf); 3107edd16368SStephen M. Cameron return; 3108edd16368SStephen M. Cameron } 3109edd16368SStephen M. Cameron 3110283b4a9bSStephen M. Cameron #define HPSA_MAP_DEBUG 3111283b4a9bSStephen M. Cameron #ifdef HPSA_MAP_DEBUG 3112283b4a9bSStephen M. Cameron static void hpsa_debug_map_buff(struct ctlr_info *h, int rc, 3113283b4a9bSStephen M. Cameron struct raid_map_data *map_buff) 3114283b4a9bSStephen M. Cameron { 3115283b4a9bSStephen M. Cameron struct raid_map_disk_data *dd = &map_buff->data[0]; 3116283b4a9bSStephen M. Cameron int map, row, col; 3117283b4a9bSStephen M. Cameron u16 map_cnt, row_cnt, disks_per_row; 3118283b4a9bSStephen M. Cameron 3119283b4a9bSStephen M. Cameron if (rc != 0) 3120283b4a9bSStephen M. Cameron return; 3121283b4a9bSStephen M. Cameron 31222ba8bfc8SStephen M. Cameron /* Show details only if debugging has been activated. */ 31232ba8bfc8SStephen M. Cameron if (h->raid_offload_debug < 2) 31242ba8bfc8SStephen M. Cameron return; 31252ba8bfc8SStephen M. Cameron 3126283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "structure_size = %u\n", 3127283b4a9bSStephen M. Cameron le32_to_cpu(map_buff->structure_size)); 3128283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "volume_blk_size = %u\n", 3129283b4a9bSStephen M. Cameron le32_to_cpu(map_buff->volume_blk_size)); 3130283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n", 3131283b4a9bSStephen M. Cameron le64_to_cpu(map_buff->volume_blk_cnt)); 3132283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "physicalBlockShift = %u\n", 3133283b4a9bSStephen M. Cameron map_buff->phys_blk_shift); 3134283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n", 3135283b4a9bSStephen M. Cameron map_buff->parity_rotation_shift); 3136283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "strip_size = %u\n", 3137283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->strip_size)); 3138283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n", 3139283b4a9bSStephen M. Cameron le64_to_cpu(map_buff->disk_starting_blk)); 3140283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n", 3141283b4a9bSStephen M. Cameron le64_to_cpu(map_buff->disk_blk_cnt)); 3142283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "data_disks_per_row = %u\n", 3143283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->data_disks_per_row)); 3144283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n", 3145283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->metadata_disks_per_row)); 3146283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "row_cnt = %u\n", 3147283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->row_cnt)); 3148283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "layout_map_count = %u\n", 3149283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->layout_map_count)); 31502b08b3e9SDon Brace dev_info(&h->pdev->dev, "flags = 0x%x\n", 3151dd0e19f3SScott Teel le16_to_cpu(map_buff->flags)); 31522b08b3e9SDon Brace dev_info(&h->pdev->dev, "encrypytion = %s\n", 31532b08b3e9SDon Brace le16_to_cpu(map_buff->flags) & 31542b08b3e9SDon Brace RAID_MAP_FLAG_ENCRYPT_ON ? "ON" : "OFF"); 3155dd0e19f3SScott Teel dev_info(&h->pdev->dev, "dekindex = %u\n", 3156dd0e19f3SScott Teel le16_to_cpu(map_buff->dekindex)); 3157283b4a9bSStephen M. Cameron map_cnt = le16_to_cpu(map_buff->layout_map_count); 3158283b4a9bSStephen M. Cameron for (map = 0; map < map_cnt; map++) { 3159283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "Map%u:\n", map); 3160283b4a9bSStephen M. Cameron row_cnt = le16_to_cpu(map_buff->row_cnt); 3161283b4a9bSStephen M. Cameron for (row = 0; row < row_cnt; row++) { 3162283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, " Row%u:\n", row); 3163283b4a9bSStephen M. Cameron disks_per_row = 3164283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->data_disks_per_row); 3165283b4a9bSStephen M. Cameron for (col = 0; col < disks_per_row; col++, dd++) 3166283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, 3167283b4a9bSStephen M. Cameron " D%02u: h=0x%04x xor=%u,%u\n", 3168283b4a9bSStephen M. Cameron col, dd->ioaccel_handle, 3169283b4a9bSStephen M. Cameron dd->xor_mult[0], dd->xor_mult[1]); 3170283b4a9bSStephen M. Cameron disks_per_row = 3171283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->metadata_disks_per_row); 3172283b4a9bSStephen M. Cameron for (col = 0; col < disks_per_row; col++, dd++) 3173283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, 3174283b4a9bSStephen M. Cameron " M%02u: h=0x%04x xor=%u,%u\n", 3175283b4a9bSStephen M. Cameron col, dd->ioaccel_handle, 3176283b4a9bSStephen M. Cameron dd->xor_mult[0], dd->xor_mult[1]); 3177283b4a9bSStephen M. Cameron } 3178283b4a9bSStephen M. Cameron } 3179283b4a9bSStephen M. Cameron } 3180283b4a9bSStephen M. Cameron #else 3181283b4a9bSStephen M. Cameron static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h, 3182283b4a9bSStephen M. Cameron __attribute__((unused)) int rc, 3183283b4a9bSStephen M. Cameron __attribute__((unused)) struct raid_map_data *map_buff) 3184283b4a9bSStephen M. Cameron { 3185283b4a9bSStephen M. Cameron } 3186283b4a9bSStephen M. Cameron #endif 3187283b4a9bSStephen M. Cameron 3188283b4a9bSStephen M. Cameron static int hpsa_get_raid_map(struct ctlr_info *h, 3189283b4a9bSStephen M. Cameron unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device) 3190283b4a9bSStephen M. Cameron { 3191283b4a9bSStephen M. Cameron int rc = 0; 3192283b4a9bSStephen M. Cameron struct CommandList *c; 3193283b4a9bSStephen M. Cameron struct ErrorInfo *ei; 3194283b4a9bSStephen M. Cameron 319545fcb86eSStephen Cameron c = cmd_alloc(h); 3196bf43caf3SRobert Elliott 3197283b4a9bSStephen M. Cameron if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map, 3198283b4a9bSStephen M. Cameron sizeof(this_device->raid_map), 0, 3199283b4a9bSStephen M. Cameron scsi3addr, TYPE_CMD)) { 32002dd02d74SRobert Elliott dev_warn(&h->pdev->dev, "hpsa_get_raid_map fill_cmd failed\n"); 32012dd02d74SRobert Elliott cmd_free(h, c); 32022dd02d74SRobert Elliott return -1; 3203283b4a9bSStephen M. Cameron } 320425163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3205c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 320625163bd5SWebb Scales if (rc) 320725163bd5SWebb Scales goto out; 3208283b4a9bSStephen M. Cameron ei = c->err_info; 3209283b4a9bSStephen M. Cameron if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3210d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 321125163bd5SWebb Scales rc = -1; 321225163bd5SWebb Scales goto out; 3213283b4a9bSStephen M. Cameron } 321445fcb86eSStephen Cameron cmd_free(h, c); 3215283b4a9bSStephen M. Cameron 3216283b4a9bSStephen M. Cameron /* @todo in the future, dynamically allocate RAID map memory */ 3217283b4a9bSStephen M. Cameron if (le32_to_cpu(this_device->raid_map.structure_size) > 3218283b4a9bSStephen M. Cameron sizeof(this_device->raid_map)) { 3219283b4a9bSStephen M. Cameron dev_warn(&h->pdev->dev, "RAID map size is too large!\n"); 3220283b4a9bSStephen M. Cameron rc = -1; 3221283b4a9bSStephen M. Cameron } 3222283b4a9bSStephen M. Cameron hpsa_debug_map_buff(h, rc, &this_device->raid_map); 3223283b4a9bSStephen M. Cameron return rc; 322425163bd5SWebb Scales out: 322525163bd5SWebb Scales cmd_free(h, c); 322625163bd5SWebb Scales return rc; 3227283b4a9bSStephen M. Cameron } 3228283b4a9bSStephen M. Cameron 3229d04e62b9SKevin Barnett static int hpsa_bmic_sense_subsystem_information(struct ctlr_info *h, 3230d04e62b9SKevin Barnett unsigned char scsi3addr[], u16 bmic_device_index, 3231d04e62b9SKevin Barnett struct bmic_sense_subsystem_info *buf, size_t bufsize) 3232d04e62b9SKevin Barnett { 3233d04e62b9SKevin Barnett int rc = IO_OK; 3234d04e62b9SKevin Barnett struct CommandList *c; 3235d04e62b9SKevin Barnett struct ErrorInfo *ei; 3236d04e62b9SKevin Barnett 3237d04e62b9SKevin Barnett c = cmd_alloc(h); 3238d04e62b9SKevin Barnett 3239d04e62b9SKevin Barnett rc = fill_cmd(c, BMIC_SENSE_SUBSYSTEM_INFORMATION, h, buf, bufsize, 3240d04e62b9SKevin Barnett 0, RAID_CTLR_LUNID, TYPE_CMD); 3241d04e62b9SKevin Barnett if (rc) 3242d04e62b9SKevin Barnett goto out; 3243d04e62b9SKevin Barnett 3244d04e62b9SKevin Barnett c->Request.CDB[2] = bmic_device_index & 0xff; 3245d04e62b9SKevin Barnett c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff; 3246d04e62b9SKevin Barnett 3247d04e62b9SKevin Barnett rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3248c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 3249d04e62b9SKevin Barnett if (rc) 3250d04e62b9SKevin Barnett goto out; 3251d04e62b9SKevin Barnett ei = c->err_info; 3252d04e62b9SKevin Barnett if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3253d04e62b9SKevin Barnett hpsa_scsi_interpret_error(h, c); 3254d04e62b9SKevin Barnett rc = -1; 3255d04e62b9SKevin Barnett } 3256d04e62b9SKevin Barnett out: 3257d04e62b9SKevin Barnett cmd_free(h, c); 3258d04e62b9SKevin Barnett return rc; 3259d04e62b9SKevin Barnett } 3260d04e62b9SKevin Barnett 326166749d0dSScott Teel static int hpsa_bmic_id_controller(struct ctlr_info *h, 326266749d0dSScott Teel struct bmic_identify_controller *buf, size_t bufsize) 326366749d0dSScott Teel { 326466749d0dSScott Teel int rc = IO_OK; 326566749d0dSScott Teel struct CommandList *c; 326666749d0dSScott Teel struct ErrorInfo *ei; 326766749d0dSScott Teel 326866749d0dSScott Teel c = cmd_alloc(h); 326966749d0dSScott Teel 327066749d0dSScott Teel rc = fill_cmd(c, BMIC_IDENTIFY_CONTROLLER, h, buf, bufsize, 327166749d0dSScott Teel 0, RAID_CTLR_LUNID, TYPE_CMD); 327266749d0dSScott Teel if (rc) 327366749d0dSScott Teel goto out; 327466749d0dSScott Teel 327566749d0dSScott Teel rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3276c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 327766749d0dSScott Teel if (rc) 327866749d0dSScott Teel goto out; 327966749d0dSScott Teel ei = c->err_info; 328066749d0dSScott Teel if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 328166749d0dSScott Teel hpsa_scsi_interpret_error(h, c); 328266749d0dSScott Teel rc = -1; 328366749d0dSScott Teel } 328466749d0dSScott Teel out: 328566749d0dSScott Teel cmd_free(h, c); 328666749d0dSScott Teel return rc; 328766749d0dSScott Teel } 328866749d0dSScott Teel 328903383736SDon Brace static int hpsa_bmic_id_physical_device(struct ctlr_info *h, 329003383736SDon Brace unsigned char scsi3addr[], u16 bmic_device_index, 329103383736SDon Brace struct bmic_identify_physical_device *buf, size_t bufsize) 329203383736SDon Brace { 329303383736SDon Brace int rc = IO_OK; 329403383736SDon Brace struct CommandList *c; 329503383736SDon Brace struct ErrorInfo *ei; 329603383736SDon Brace 329703383736SDon Brace c = cmd_alloc(h); 329803383736SDon Brace rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize, 329903383736SDon Brace 0, RAID_CTLR_LUNID, TYPE_CMD); 330003383736SDon Brace if (rc) 330103383736SDon Brace goto out; 330203383736SDon Brace 330303383736SDon Brace c->Request.CDB[2] = bmic_device_index & 0xff; 330403383736SDon Brace c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff; 330503383736SDon Brace 330625163bd5SWebb Scales hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE, 3307c448ecfaSDon Brace DEFAULT_TIMEOUT); 330803383736SDon Brace ei = c->err_info; 330903383736SDon Brace if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 331003383736SDon Brace hpsa_scsi_interpret_error(h, c); 331103383736SDon Brace rc = -1; 331203383736SDon Brace } 331303383736SDon Brace out: 331403383736SDon Brace cmd_free(h, c); 3315d04e62b9SKevin Barnett 331603383736SDon Brace return rc; 331703383736SDon Brace } 331803383736SDon Brace 3319cca8f13bSDon Brace /* 3320cca8f13bSDon Brace * get enclosure information 3321cca8f13bSDon Brace * struct ReportExtendedLUNdata *rlep - Used for BMIC drive number 3322cca8f13bSDon Brace * struct hpsa_scsi_dev_t *encl_dev - device entry for enclosure 3323cca8f13bSDon Brace * Uses id_physical_device to determine the box_index. 3324cca8f13bSDon Brace */ 3325cca8f13bSDon Brace static void hpsa_get_enclosure_info(struct ctlr_info *h, 3326cca8f13bSDon Brace unsigned char *scsi3addr, 3327cca8f13bSDon Brace struct ReportExtendedLUNdata *rlep, int rle_index, 3328cca8f13bSDon Brace struct hpsa_scsi_dev_t *encl_dev) 3329cca8f13bSDon Brace { 3330cca8f13bSDon Brace int rc = -1; 3331cca8f13bSDon Brace struct CommandList *c = NULL; 3332cca8f13bSDon Brace struct ErrorInfo *ei = NULL; 3333cca8f13bSDon Brace struct bmic_sense_storage_box_params *bssbp = NULL; 3334cca8f13bSDon Brace struct bmic_identify_physical_device *id_phys = NULL; 3335cca8f13bSDon Brace struct ext_report_lun_entry *rle = &rlep->LUN[rle_index]; 3336cca8f13bSDon Brace u16 bmic_device_index = 0; 3337cca8f13bSDon Brace 3338cca8f13bSDon Brace bmic_device_index = GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]); 3339cca8f13bSDon Brace 334017a9e54aSDon Brace if (bmic_device_index == 0xFF00 || MASKED_DEVICE(&rle->lunid[0])) { 334117a9e54aSDon Brace rc = IO_OK; 3342cca8f13bSDon Brace goto out; 334317a9e54aSDon Brace } 3344cca8f13bSDon Brace 3345cca8f13bSDon Brace bssbp = kzalloc(sizeof(*bssbp), GFP_KERNEL); 3346cca8f13bSDon Brace if (!bssbp) 3347cca8f13bSDon Brace goto out; 3348cca8f13bSDon Brace 3349cca8f13bSDon Brace id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 3350cca8f13bSDon Brace if (!id_phys) 3351cca8f13bSDon Brace goto out; 3352cca8f13bSDon Brace 3353cca8f13bSDon Brace rc = hpsa_bmic_id_physical_device(h, scsi3addr, bmic_device_index, 3354cca8f13bSDon Brace id_phys, sizeof(*id_phys)); 3355cca8f13bSDon Brace if (rc) { 3356cca8f13bSDon Brace dev_warn(&h->pdev->dev, "%s: id_phys failed %d bdi[0x%x]\n", 3357cca8f13bSDon Brace __func__, encl_dev->external, bmic_device_index); 3358cca8f13bSDon Brace goto out; 3359cca8f13bSDon Brace } 3360cca8f13bSDon Brace 3361cca8f13bSDon Brace c = cmd_alloc(h); 3362cca8f13bSDon Brace 3363cca8f13bSDon Brace rc = fill_cmd(c, BMIC_SENSE_STORAGE_BOX_PARAMS, h, bssbp, 3364cca8f13bSDon Brace sizeof(*bssbp), 0, RAID_CTLR_LUNID, TYPE_CMD); 3365cca8f13bSDon Brace 3366cca8f13bSDon Brace if (rc) 3367cca8f13bSDon Brace goto out; 3368cca8f13bSDon Brace 3369cca8f13bSDon Brace if (id_phys->phys_connector[1] == 'E') 3370cca8f13bSDon Brace c->Request.CDB[5] = id_phys->box_index; 3371cca8f13bSDon Brace else 3372cca8f13bSDon Brace c->Request.CDB[5] = 0; 3373cca8f13bSDon Brace 3374cca8f13bSDon Brace rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE, 3375c448ecfaSDon Brace DEFAULT_TIMEOUT); 3376cca8f13bSDon Brace if (rc) 3377cca8f13bSDon Brace goto out; 3378cca8f13bSDon Brace 3379cca8f13bSDon Brace ei = c->err_info; 3380cca8f13bSDon Brace if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3381cca8f13bSDon Brace rc = -1; 3382cca8f13bSDon Brace goto out; 3383cca8f13bSDon Brace } 3384cca8f13bSDon Brace 3385cca8f13bSDon Brace encl_dev->box[id_phys->active_path_number] = bssbp->phys_box_on_port; 3386cca8f13bSDon Brace memcpy(&encl_dev->phys_connector[id_phys->active_path_number], 3387cca8f13bSDon Brace bssbp->phys_connector, sizeof(bssbp->phys_connector)); 3388cca8f13bSDon Brace 3389cca8f13bSDon Brace rc = IO_OK; 3390cca8f13bSDon Brace out: 3391cca8f13bSDon Brace kfree(bssbp); 3392cca8f13bSDon Brace kfree(id_phys); 3393cca8f13bSDon Brace 3394cca8f13bSDon Brace if (c) 3395cca8f13bSDon Brace cmd_free(h, c); 3396cca8f13bSDon Brace 3397cca8f13bSDon Brace if (rc != IO_OK) 3398cca8f13bSDon Brace hpsa_show_dev_msg(KERN_INFO, h, encl_dev, 3399cca8f13bSDon Brace "Error, could not get enclosure information\n"); 3400cca8f13bSDon Brace } 3401cca8f13bSDon Brace 3402d04e62b9SKevin Barnett static u64 hpsa_get_sas_address_from_report_physical(struct ctlr_info *h, 3403d04e62b9SKevin Barnett unsigned char *scsi3addr) 3404d04e62b9SKevin Barnett { 3405d04e62b9SKevin Barnett struct ReportExtendedLUNdata *physdev; 3406d04e62b9SKevin Barnett u32 nphysicals; 3407d04e62b9SKevin Barnett u64 sa = 0; 3408d04e62b9SKevin Barnett int i; 3409d04e62b9SKevin Barnett 3410d04e62b9SKevin Barnett physdev = kzalloc(sizeof(*physdev), GFP_KERNEL); 3411d04e62b9SKevin Barnett if (!physdev) 3412d04e62b9SKevin Barnett return 0; 3413d04e62b9SKevin Barnett 3414d04e62b9SKevin Barnett if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) { 3415d04e62b9SKevin Barnett dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 3416d04e62b9SKevin Barnett kfree(physdev); 3417d04e62b9SKevin Barnett return 0; 3418d04e62b9SKevin Barnett } 3419d04e62b9SKevin Barnett nphysicals = get_unaligned_be32(physdev->LUNListLength) / 24; 3420d04e62b9SKevin Barnett 3421d04e62b9SKevin Barnett for (i = 0; i < nphysicals; i++) 3422d04e62b9SKevin Barnett if (!memcmp(&physdev->LUN[i].lunid[0], scsi3addr, 8)) { 3423d04e62b9SKevin Barnett sa = get_unaligned_be64(&physdev->LUN[i].wwid[0]); 3424d04e62b9SKevin Barnett break; 3425d04e62b9SKevin Barnett } 3426d04e62b9SKevin Barnett 3427d04e62b9SKevin Barnett kfree(physdev); 3428d04e62b9SKevin Barnett 3429d04e62b9SKevin Barnett return sa; 3430d04e62b9SKevin Barnett } 3431d04e62b9SKevin Barnett 3432d04e62b9SKevin Barnett static void hpsa_get_sas_address(struct ctlr_info *h, unsigned char *scsi3addr, 3433d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *dev) 3434d04e62b9SKevin Barnett { 3435d04e62b9SKevin Barnett int rc; 3436d04e62b9SKevin Barnett u64 sa = 0; 3437d04e62b9SKevin Barnett 3438d04e62b9SKevin Barnett if (is_hba_lunid(scsi3addr)) { 3439d04e62b9SKevin Barnett struct bmic_sense_subsystem_info *ssi; 3440d04e62b9SKevin Barnett 3441d04e62b9SKevin Barnett ssi = kzalloc(sizeof(*ssi), GFP_KERNEL); 3442d04e62b9SKevin Barnett if (ssi == NULL) { 3443d04e62b9SKevin Barnett dev_warn(&h->pdev->dev, 3444d04e62b9SKevin Barnett "%s: out of memory\n", __func__); 3445d04e62b9SKevin Barnett return; 3446d04e62b9SKevin Barnett } 3447d04e62b9SKevin Barnett 3448d04e62b9SKevin Barnett rc = hpsa_bmic_sense_subsystem_information(h, 3449d04e62b9SKevin Barnett scsi3addr, 0, ssi, sizeof(*ssi)); 3450d04e62b9SKevin Barnett if (rc == 0) { 3451d04e62b9SKevin Barnett sa = get_unaligned_be64(ssi->primary_world_wide_id); 3452d04e62b9SKevin Barnett h->sas_address = sa; 3453d04e62b9SKevin Barnett } 3454d04e62b9SKevin Barnett 3455d04e62b9SKevin Barnett kfree(ssi); 3456d04e62b9SKevin Barnett } else 3457d04e62b9SKevin Barnett sa = hpsa_get_sas_address_from_report_physical(h, scsi3addr); 3458d04e62b9SKevin Barnett 3459d04e62b9SKevin Barnett dev->sas_address = sa; 3460d04e62b9SKevin Barnett } 3461d04e62b9SKevin Barnett 3462d04e62b9SKevin Barnett /* Get a device id from inquiry page 0x83 */ 3463*8383278dSScott Teel static bool hpsa_vpd_page_supported(struct ctlr_info *h, 34641b70150aSStephen M. Cameron unsigned char scsi3addr[], u8 page) 34651b70150aSStephen M. Cameron { 34661b70150aSStephen M. Cameron int rc; 34671b70150aSStephen M. Cameron int i; 34681b70150aSStephen M. Cameron int pages; 34691b70150aSStephen M. Cameron unsigned char *buf, bufsize; 34701b70150aSStephen M. Cameron 34711b70150aSStephen M. Cameron buf = kzalloc(256, GFP_KERNEL); 34721b70150aSStephen M. Cameron if (!buf) 3473*8383278dSScott Teel return false; 34741b70150aSStephen M. Cameron 34751b70150aSStephen M. Cameron /* Get the size of the page list first */ 34761b70150aSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, 34771b70150aSStephen M. Cameron VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES, 34781b70150aSStephen M. Cameron buf, HPSA_VPD_HEADER_SZ); 34791b70150aSStephen M. Cameron if (rc != 0) 34801b70150aSStephen M. Cameron goto exit_unsupported; 34811b70150aSStephen M. Cameron pages = buf[3]; 34821b70150aSStephen M. Cameron if ((pages + HPSA_VPD_HEADER_SZ) <= 255) 34831b70150aSStephen M. Cameron bufsize = pages + HPSA_VPD_HEADER_SZ; 34841b70150aSStephen M. Cameron else 34851b70150aSStephen M. Cameron bufsize = 255; 34861b70150aSStephen M. Cameron 34871b70150aSStephen M. Cameron /* Get the whole VPD page list */ 34881b70150aSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, 34891b70150aSStephen M. Cameron VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES, 34901b70150aSStephen M. Cameron buf, bufsize); 34911b70150aSStephen M. Cameron if (rc != 0) 34921b70150aSStephen M. Cameron goto exit_unsupported; 34931b70150aSStephen M. Cameron 34941b70150aSStephen M. Cameron pages = buf[3]; 34951b70150aSStephen M. Cameron for (i = 1; i <= pages; i++) 34961b70150aSStephen M. Cameron if (buf[3 + i] == page) 34971b70150aSStephen M. Cameron goto exit_supported; 34981b70150aSStephen M. Cameron exit_unsupported: 34991b70150aSStephen M. Cameron kfree(buf); 3500*8383278dSScott Teel return false; 35011b70150aSStephen M. Cameron exit_supported: 35021b70150aSStephen M. Cameron kfree(buf); 3503*8383278dSScott Teel return true; 35041b70150aSStephen M. Cameron } 35051b70150aSStephen M. Cameron 3506283b4a9bSStephen M. Cameron static void hpsa_get_ioaccel_status(struct ctlr_info *h, 3507283b4a9bSStephen M. Cameron unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device) 3508283b4a9bSStephen M. Cameron { 3509283b4a9bSStephen M. Cameron int rc; 3510283b4a9bSStephen M. Cameron unsigned char *buf; 3511283b4a9bSStephen M. Cameron u8 ioaccel_status; 3512283b4a9bSStephen M. Cameron 3513283b4a9bSStephen M. Cameron this_device->offload_config = 0; 3514283b4a9bSStephen M. Cameron this_device->offload_enabled = 0; 351541ce4c35SStephen Cameron this_device->offload_to_be_enabled = 0; 3516283b4a9bSStephen M. Cameron 3517283b4a9bSStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 3518283b4a9bSStephen M. Cameron if (!buf) 3519283b4a9bSStephen M. Cameron return; 35201b70150aSStephen M. Cameron if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS)) 35211b70150aSStephen M. Cameron goto out; 3522283b4a9bSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, 3523b7bb24ebSStephen M. Cameron VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64); 3524283b4a9bSStephen M. Cameron if (rc != 0) 3525283b4a9bSStephen M. Cameron goto out; 3526283b4a9bSStephen M. Cameron 3527283b4a9bSStephen M. Cameron #define IOACCEL_STATUS_BYTE 4 3528283b4a9bSStephen M. Cameron #define OFFLOAD_CONFIGURED_BIT 0x01 3529283b4a9bSStephen M. Cameron #define OFFLOAD_ENABLED_BIT 0x02 3530283b4a9bSStephen M. Cameron ioaccel_status = buf[IOACCEL_STATUS_BYTE]; 3531283b4a9bSStephen M. Cameron this_device->offload_config = 3532283b4a9bSStephen M. Cameron !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT); 3533283b4a9bSStephen M. Cameron if (this_device->offload_config) { 3534283b4a9bSStephen M. Cameron this_device->offload_enabled = 3535283b4a9bSStephen M. Cameron !!(ioaccel_status & OFFLOAD_ENABLED_BIT); 3536283b4a9bSStephen M. Cameron if (hpsa_get_raid_map(h, scsi3addr, this_device)) 3537283b4a9bSStephen M. Cameron this_device->offload_enabled = 0; 3538283b4a9bSStephen M. Cameron } 353941ce4c35SStephen Cameron this_device->offload_to_be_enabled = this_device->offload_enabled; 3540283b4a9bSStephen M. Cameron out: 3541283b4a9bSStephen M. Cameron kfree(buf); 3542283b4a9bSStephen M. Cameron return; 3543283b4a9bSStephen M. Cameron } 3544283b4a9bSStephen M. Cameron 3545edd16368SStephen M. Cameron /* Get the device id from inquiry page 0x83 */ 3546edd16368SStephen M. Cameron static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr, 354775d23d89SDon Brace unsigned char *device_id, int index, int buflen) 3548edd16368SStephen M. Cameron { 3549edd16368SStephen M. Cameron int rc; 3550edd16368SStephen M. Cameron unsigned char *buf; 3551edd16368SStephen M. Cameron 3552*8383278dSScott Teel /* Does controller have VPD for device id? */ 3553*8383278dSScott Teel if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_DEVICE_ID)) 3554*8383278dSScott Teel return 1; /* not supported */ 3555*8383278dSScott Teel 3556edd16368SStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 3557edd16368SStephen M. Cameron if (!buf) 3558a84d794dSStephen M. Cameron return -ENOMEM; 3559*8383278dSScott Teel 3560*8383278dSScott Teel rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 3561*8383278dSScott Teel HPSA_VPD_LV_DEVICE_ID, buf, 64); 3562*8383278dSScott Teel if (rc == 0) { 3563*8383278dSScott Teel if (buflen > 16) 3564*8383278dSScott Teel buflen = 16; 3565*8383278dSScott Teel memcpy(device_id, &buf[8], buflen); 3566*8383278dSScott Teel } 356775d23d89SDon Brace 3568edd16368SStephen M. Cameron kfree(buf); 356975d23d89SDon Brace 3570*8383278dSScott Teel return rc; /*0 - got id, otherwise, didn't */ 3571edd16368SStephen M. Cameron } 3572edd16368SStephen M. Cameron 3573edd16368SStephen M. Cameron static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical, 357403383736SDon Brace void *buf, int bufsize, 3575edd16368SStephen M. Cameron int extended_response) 3576edd16368SStephen M. Cameron { 3577edd16368SStephen M. Cameron int rc = IO_OK; 3578edd16368SStephen M. Cameron struct CommandList *c; 3579edd16368SStephen M. Cameron unsigned char scsi3addr[8]; 3580edd16368SStephen M. Cameron struct ErrorInfo *ei; 3581edd16368SStephen M. Cameron 358245fcb86eSStephen Cameron c = cmd_alloc(h); 3583bf43caf3SRobert Elliott 3584e89c0ae7SStephen M. Cameron /* address the controller */ 3585e89c0ae7SStephen M. Cameron memset(scsi3addr, 0, sizeof(scsi3addr)); 3586a2dac136SStephen M. Cameron if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h, 3587a2dac136SStephen M. Cameron buf, bufsize, 0, scsi3addr, TYPE_CMD)) { 3588a2dac136SStephen M. Cameron rc = -1; 3589a2dac136SStephen M. Cameron goto out; 3590a2dac136SStephen M. Cameron } 3591edd16368SStephen M. Cameron if (extended_response) 3592edd16368SStephen M. Cameron c->Request.CDB[1] = extended_response; 359325163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3594c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 359525163bd5SWebb Scales if (rc) 359625163bd5SWebb Scales goto out; 3597edd16368SStephen M. Cameron ei = c->err_info; 3598edd16368SStephen M. Cameron if (ei->CommandStatus != 0 && 3599edd16368SStephen M. Cameron ei->CommandStatus != CMD_DATA_UNDERRUN) { 3600d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 3601edd16368SStephen M. Cameron rc = -1; 3602283b4a9bSStephen M. Cameron } else { 360303383736SDon Brace struct ReportLUNdata *rld = buf; 360403383736SDon Brace 360503383736SDon Brace if (rld->extended_response_flag != extended_response) { 3606283b4a9bSStephen M. Cameron dev_err(&h->pdev->dev, 3607283b4a9bSStephen M. Cameron "report luns requested format %u, got %u\n", 3608283b4a9bSStephen M. Cameron extended_response, 360903383736SDon Brace rld->extended_response_flag); 3610283b4a9bSStephen M. Cameron rc = -1; 3611283b4a9bSStephen M. Cameron } 3612edd16368SStephen M. Cameron } 3613a2dac136SStephen M. Cameron out: 361445fcb86eSStephen Cameron cmd_free(h, c); 3615edd16368SStephen M. Cameron return rc; 3616edd16368SStephen M. Cameron } 3617edd16368SStephen M. Cameron 3618edd16368SStephen M. Cameron static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 361903383736SDon Brace struct ReportExtendedLUNdata *buf, int bufsize) 3620edd16368SStephen M. Cameron { 362103383736SDon Brace return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, 362203383736SDon Brace HPSA_REPORT_PHYS_EXTENDED); 3623edd16368SStephen M. Cameron } 3624edd16368SStephen M. Cameron 3625edd16368SStephen M. Cameron static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h, 3626edd16368SStephen M. Cameron struct ReportLUNdata *buf, int bufsize) 3627edd16368SStephen M. Cameron { 3628edd16368SStephen M. Cameron return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0); 3629edd16368SStephen M. Cameron } 3630edd16368SStephen M. Cameron 3631edd16368SStephen M. Cameron static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device, 3632edd16368SStephen M. Cameron int bus, int target, int lun) 3633edd16368SStephen M. Cameron { 3634edd16368SStephen M. Cameron device->bus = bus; 3635edd16368SStephen M. Cameron device->target = target; 3636edd16368SStephen M. Cameron device->lun = lun; 3637edd16368SStephen M. Cameron } 3638edd16368SStephen M. Cameron 36399846590eSStephen M. Cameron /* Use VPD inquiry to get details of volume status */ 36409846590eSStephen M. Cameron static int hpsa_get_volume_status(struct ctlr_info *h, 36419846590eSStephen M. Cameron unsigned char scsi3addr[]) 36429846590eSStephen M. Cameron { 36439846590eSStephen M. Cameron int rc; 36449846590eSStephen M. Cameron int status; 36459846590eSStephen M. Cameron int size; 36469846590eSStephen M. Cameron unsigned char *buf; 36479846590eSStephen M. Cameron 36489846590eSStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 36499846590eSStephen M. Cameron if (!buf) 36509846590eSStephen M. Cameron return HPSA_VPD_LV_STATUS_UNSUPPORTED; 36519846590eSStephen M. Cameron 36529846590eSStephen M. Cameron /* Does controller have VPD for logical volume status? */ 365324a4b078SStephen M. Cameron if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS)) 36549846590eSStephen M. Cameron goto exit_failed; 36559846590eSStephen M. Cameron 36569846590eSStephen M. Cameron /* Get the size of the VPD return buffer */ 36579846590eSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS, 36589846590eSStephen M. Cameron buf, HPSA_VPD_HEADER_SZ); 365924a4b078SStephen M. Cameron if (rc != 0) 36609846590eSStephen M. Cameron goto exit_failed; 36619846590eSStephen M. Cameron size = buf[3]; 36629846590eSStephen M. Cameron 36639846590eSStephen M. Cameron /* Now get the whole VPD buffer */ 36649846590eSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS, 36659846590eSStephen M. Cameron buf, size + HPSA_VPD_HEADER_SZ); 366624a4b078SStephen M. Cameron if (rc != 0) 36679846590eSStephen M. Cameron goto exit_failed; 36689846590eSStephen M. Cameron status = buf[4]; /* status byte */ 36699846590eSStephen M. Cameron 36709846590eSStephen M. Cameron kfree(buf); 36719846590eSStephen M. Cameron return status; 36729846590eSStephen M. Cameron exit_failed: 36739846590eSStephen M. Cameron kfree(buf); 36749846590eSStephen M. Cameron return HPSA_VPD_LV_STATUS_UNSUPPORTED; 36759846590eSStephen M. Cameron } 36769846590eSStephen M. Cameron 36779846590eSStephen M. Cameron /* Determine offline status of a volume. 36789846590eSStephen M. Cameron * Return either: 36799846590eSStephen M. Cameron * 0 (not offline) 368067955ba3SStephen M. Cameron * 0xff (offline for unknown reasons) 36819846590eSStephen M. Cameron * # (integer code indicating one of several NOT READY states 36829846590eSStephen M. Cameron * describing why a volume is to be kept offline) 36839846590eSStephen M. Cameron */ 368467955ba3SStephen M. Cameron static int hpsa_volume_offline(struct ctlr_info *h, 36859846590eSStephen M. Cameron unsigned char scsi3addr[]) 36869846590eSStephen M. Cameron { 36879846590eSStephen M. Cameron struct CommandList *c; 36889437ac43SStephen Cameron unsigned char *sense; 36899437ac43SStephen Cameron u8 sense_key, asc, ascq; 36909437ac43SStephen Cameron int sense_len; 369125163bd5SWebb Scales int rc, ldstat = 0; 36929846590eSStephen M. Cameron u16 cmd_status; 36939846590eSStephen M. Cameron u8 scsi_status; 36949846590eSStephen M. Cameron #define ASC_LUN_NOT_READY 0x04 36959846590eSStephen M. Cameron #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04 36969846590eSStephen M. Cameron #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02 36979846590eSStephen M. Cameron 36989846590eSStephen M. Cameron c = cmd_alloc(h); 3699bf43caf3SRobert Elliott 37009846590eSStephen M. Cameron (void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD); 3701c448ecfaSDon Brace rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 3702c448ecfaSDon Brace DEFAULT_TIMEOUT); 370325163bd5SWebb Scales if (rc) { 370425163bd5SWebb Scales cmd_free(h, c); 370525163bd5SWebb Scales return 0; 370625163bd5SWebb Scales } 37079846590eSStephen M. Cameron sense = c->err_info->SenseInfo; 37089437ac43SStephen Cameron if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo)) 37099437ac43SStephen Cameron sense_len = sizeof(c->err_info->SenseInfo); 37109437ac43SStephen Cameron else 37119437ac43SStephen Cameron sense_len = c->err_info->SenseLen; 37129437ac43SStephen Cameron decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq); 37139846590eSStephen M. Cameron cmd_status = c->err_info->CommandStatus; 37149846590eSStephen M. Cameron scsi_status = c->err_info->ScsiStatus; 37159846590eSStephen M. Cameron cmd_free(h, c); 37169846590eSStephen M. Cameron /* Is the volume 'not ready'? */ 37179846590eSStephen M. Cameron if (cmd_status != CMD_TARGET_STATUS || 37189846590eSStephen M. Cameron scsi_status != SAM_STAT_CHECK_CONDITION || 37199846590eSStephen M. Cameron sense_key != NOT_READY || 37209846590eSStephen M. Cameron asc != ASC_LUN_NOT_READY) { 37219846590eSStephen M. Cameron return 0; 37229846590eSStephen M. Cameron } 37239846590eSStephen M. Cameron 37249846590eSStephen M. Cameron /* Determine the reason for not ready state */ 37259846590eSStephen M. Cameron ldstat = hpsa_get_volume_status(h, scsi3addr); 37269846590eSStephen M. Cameron 37279846590eSStephen M. Cameron /* Keep volume offline in certain cases: */ 37289846590eSStephen M. Cameron switch (ldstat) { 37299846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ERASE: 37305ca01204SScott Benesh case HPSA_LV_NOT_AVAILABLE: 37319846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_RPI: 37329846590eSStephen M. Cameron case HPSA_LV_PENDING_RPI: 37339846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_NO_KEY: 37349846590eSStephen M. Cameron case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER: 37359846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION: 37369846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING: 37379846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 37389846590eSStephen M. Cameron return ldstat; 37399846590eSStephen M. Cameron case HPSA_VPD_LV_STATUS_UNSUPPORTED: 37409846590eSStephen M. Cameron /* If VPD status page isn't available, 37419846590eSStephen M. Cameron * use ASC/ASCQ to determine state 37429846590eSStephen M. Cameron */ 37439846590eSStephen M. Cameron if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) || 37449846590eSStephen M. Cameron (ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ)) 37459846590eSStephen M. Cameron return ldstat; 37469846590eSStephen M. Cameron break; 37479846590eSStephen M. Cameron default: 37489846590eSStephen M. Cameron break; 37499846590eSStephen M. Cameron } 37509846590eSStephen M. Cameron return 0; 37519846590eSStephen M. Cameron } 37529846590eSStephen M. Cameron 37539b5c48c2SStephen Cameron /* 37549b5c48c2SStephen Cameron * Find out if a logical device supports aborts by simply trying one. 37559b5c48c2SStephen Cameron * Smart Array may claim not to support aborts on logical drives, but 37569b5c48c2SStephen Cameron * if a MSA2000 * is connected, the drives on that will be presented 37579b5c48c2SStephen Cameron * by the Smart Array as logical drives, and aborts may be sent to 37589b5c48c2SStephen Cameron * those devices successfully. So the simplest way to find out is 37599b5c48c2SStephen Cameron * to simply try an abort and see how the device responds. 37609b5c48c2SStephen Cameron */ 37619b5c48c2SStephen Cameron static int hpsa_device_supports_aborts(struct ctlr_info *h, 37629b5c48c2SStephen Cameron unsigned char *scsi3addr) 37639b5c48c2SStephen Cameron { 37649b5c48c2SStephen Cameron struct CommandList *c; 37659b5c48c2SStephen Cameron struct ErrorInfo *ei; 37669b5c48c2SStephen Cameron int rc = 0; 37679b5c48c2SStephen Cameron 37689b5c48c2SStephen Cameron u64 tag = (u64) -1; /* bogus tag */ 37699b5c48c2SStephen Cameron 37709b5c48c2SStephen Cameron /* Assume that physical devices support aborts */ 37719b5c48c2SStephen Cameron if (!is_logical_dev_addr_mode(scsi3addr)) 37729b5c48c2SStephen Cameron return 1; 37739b5c48c2SStephen Cameron 37749b5c48c2SStephen Cameron c = cmd_alloc(h); 3775bf43caf3SRobert Elliott 37769b5c48c2SStephen Cameron (void) fill_cmd(c, HPSA_ABORT_MSG, h, &tag, 0, 0, scsi3addr, TYPE_MSG); 3777c448ecfaSDon Brace (void) hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 3778c448ecfaSDon Brace DEFAULT_TIMEOUT); 37799b5c48c2SStephen Cameron /* no unmap needed here because no data xfer. */ 37809b5c48c2SStephen Cameron ei = c->err_info; 37819b5c48c2SStephen Cameron switch (ei->CommandStatus) { 37829b5c48c2SStephen Cameron case CMD_INVALID: 37839b5c48c2SStephen Cameron rc = 0; 37849b5c48c2SStephen Cameron break; 37859b5c48c2SStephen Cameron case CMD_UNABORTABLE: 37869b5c48c2SStephen Cameron case CMD_ABORT_FAILED: 37879b5c48c2SStephen Cameron rc = 1; 37889b5c48c2SStephen Cameron break; 37899437ac43SStephen Cameron case CMD_TMF_STATUS: 37909437ac43SStephen Cameron rc = hpsa_evaluate_tmf_status(h, c); 37919437ac43SStephen Cameron break; 37929b5c48c2SStephen Cameron default: 37939b5c48c2SStephen Cameron rc = 0; 37949b5c48c2SStephen Cameron break; 37959b5c48c2SStephen Cameron } 37969b5c48c2SStephen Cameron cmd_free(h, c); 37979b5c48c2SStephen Cameron return rc; 37989b5c48c2SStephen Cameron } 37999b5c48c2SStephen Cameron 3800edd16368SStephen M. Cameron static int hpsa_update_device_info(struct ctlr_info *h, 38010b0e1d6cSStephen M. Cameron unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device, 38020b0e1d6cSStephen M. Cameron unsigned char *is_OBDR_device) 3803edd16368SStephen M. Cameron { 38040b0e1d6cSStephen M. Cameron 38050b0e1d6cSStephen M. Cameron #define OBDR_SIG_OFFSET 43 38060b0e1d6cSStephen M. Cameron #define OBDR_TAPE_SIG "$DR-10" 38070b0e1d6cSStephen M. Cameron #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1) 38080b0e1d6cSStephen M. Cameron #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN) 38090b0e1d6cSStephen M. Cameron 3810ea6d3bc3SStephen M. Cameron unsigned char *inq_buff; 38110b0e1d6cSStephen M. Cameron unsigned char *obdr_sig; 3812683fc444SDon Brace int rc = 0; 3813edd16368SStephen M. Cameron 3814ea6d3bc3SStephen M. Cameron inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL); 3815683fc444SDon Brace if (!inq_buff) { 3816683fc444SDon Brace rc = -ENOMEM; 3817edd16368SStephen M. Cameron goto bail_out; 3818683fc444SDon Brace } 3819edd16368SStephen M. Cameron 3820edd16368SStephen M. Cameron /* Do an inquiry to the device to see what it is. */ 3821edd16368SStephen M. Cameron if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff, 3822edd16368SStephen M. Cameron (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) { 3823edd16368SStephen M. Cameron /* Inquiry failed (msg printed already) */ 3824edd16368SStephen M. Cameron dev_err(&h->pdev->dev, 3825edd16368SStephen M. Cameron "hpsa_update_device_info: inquiry failed\n"); 3826683fc444SDon Brace rc = -EIO; 3827edd16368SStephen M. Cameron goto bail_out; 3828edd16368SStephen M. Cameron } 3829edd16368SStephen M. Cameron 38304af61e4fSDon Brace scsi_sanitize_inquiry_string(&inq_buff[8], 8); 38314af61e4fSDon Brace scsi_sanitize_inquiry_string(&inq_buff[16], 16); 383275d23d89SDon Brace 3833edd16368SStephen M. Cameron this_device->devtype = (inq_buff[0] & 0x1f); 3834edd16368SStephen M. Cameron memcpy(this_device->scsi3addr, scsi3addr, 8); 3835edd16368SStephen M. Cameron memcpy(this_device->vendor, &inq_buff[8], 3836edd16368SStephen M. Cameron sizeof(this_device->vendor)); 3837edd16368SStephen M. Cameron memcpy(this_device->model, &inq_buff[16], 3838edd16368SStephen M. Cameron sizeof(this_device->model)); 3839edd16368SStephen M. Cameron memset(this_device->device_id, 0, 3840edd16368SStephen M. Cameron sizeof(this_device->device_id)); 3841*8383278dSScott Teel if (hpsa_get_device_id(h, scsi3addr, this_device->device_id, 8, 3842*8383278dSScott Teel sizeof(this_device->device_id))) 3843*8383278dSScott Teel dev_err(&h->pdev->dev, 3844*8383278dSScott Teel "hpsa%d: %s: can't get device id for host %d:C0:T%d:L%d\t%s\t%.16s\n", 3845*8383278dSScott Teel h->ctlr, __func__, 3846*8383278dSScott Teel h->scsi_host->host_no, 3847*8383278dSScott Teel this_device->target, this_device->lun, 3848*8383278dSScott Teel scsi_device_type(this_device->devtype), 3849*8383278dSScott Teel this_device->model); 3850edd16368SStephen M. Cameron 3851af15ed36SDon Brace if ((this_device->devtype == TYPE_DISK || 3852af15ed36SDon Brace this_device->devtype == TYPE_ZBC) && 3853283b4a9bSStephen M. Cameron is_logical_dev_addr_mode(scsi3addr)) { 385467955ba3SStephen M. Cameron int volume_offline; 385567955ba3SStephen M. Cameron 3856edd16368SStephen M. Cameron hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level); 3857283b4a9bSStephen M. Cameron if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC) 3858283b4a9bSStephen M. Cameron hpsa_get_ioaccel_status(h, scsi3addr, this_device); 385967955ba3SStephen M. Cameron volume_offline = hpsa_volume_offline(h, scsi3addr); 386067955ba3SStephen M. Cameron if (volume_offline < 0 || volume_offline > 0xff) 386167955ba3SStephen M. Cameron volume_offline = HPSA_VPD_LV_STATUS_UNSUPPORTED; 386267955ba3SStephen M. Cameron this_device->volume_offline = volume_offline & 0xff; 3863283b4a9bSStephen M. Cameron } else { 3864edd16368SStephen M. Cameron this_device->raid_level = RAID_UNKNOWN; 3865283b4a9bSStephen M. Cameron this_device->offload_config = 0; 3866283b4a9bSStephen M. Cameron this_device->offload_enabled = 0; 386741ce4c35SStephen Cameron this_device->offload_to_be_enabled = 0; 3868a3144e0bSJoe Handzik this_device->hba_ioaccel_enabled = 0; 38699846590eSStephen M. Cameron this_device->volume_offline = 0; 387003383736SDon Brace this_device->queue_depth = h->nr_cmds; 3871283b4a9bSStephen M. Cameron } 3872edd16368SStephen M. Cameron 38730b0e1d6cSStephen M. Cameron if (is_OBDR_device) { 38740b0e1d6cSStephen M. Cameron /* See if this is a One-Button-Disaster-Recovery device 38750b0e1d6cSStephen M. Cameron * by looking for "$DR-10" at offset 43 in inquiry data. 38760b0e1d6cSStephen M. Cameron */ 38770b0e1d6cSStephen M. Cameron obdr_sig = &inq_buff[OBDR_SIG_OFFSET]; 38780b0e1d6cSStephen M. Cameron *is_OBDR_device = (this_device->devtype == TYPE_ROM && 38790b0e1d6cSStephen M. Cameron strncmp(obdr_sig, OBDR_TAPE_SIG, 38800b0e1d6cSStephen M. Cameron OBDR_SIG_LEN) == 0); 38810b0e1d6cSStephen M. Cameron } 3882edd16368SStephen M. Cameron kfree(inq_buff); 3883edd16368SStephen M. Cameron return 0; 3884edd16368SStephen M. Cameron 3885edd16368SStephen M. Cameron bail_out: 3886edd16368SStephen M. Cameron kfree(inq_buff); 3887683fc444SDon Brace return rc; 3888edd16368SStephen M. Cameron } 3889edd16368SStephen M. Cameron 38909b5c48c2SStephen Cameron static void hpsa_update_device_supports_aborts(struct ctlr_info *h, 38919b5c48c2SStephen Cameron struct hpsa_scsi_dev_t *dev, u8 *scsi3addr) 38929b5c48c2SStephen Cameron { 38939b5c48c2SStephen Cameron unsigned long flags; 38949b5c48c2SStephen Cameron int rc, entry; 38959b5c48c2SStephen Cameron /* 38969b5c48c2SStephen Cameron * See if this device supports aborts. If we already know 38979b5c48c2SStephen Cameron * the device, we already know if it supports aborts, otherwise 38989b5c48c2SStephen Cameron * we have to find out if it supports aborts by trying one. 38999b5c48c2SStephen Cameron */ 39009b5c48c2SStephen Cameron spin_lock_irqsave(&h->devlock, flags); 39019b5c48c2SStephen Cameron rc = hpsa_scsi_find_entry(dev, h->dev, h->ndevices, &entry); 39029b5c48c2SStephen Cameron if ((rc == DEVICE_SAME || rc == DEVICE_UPDATED) && 39039b5c48c2SStephen Cameron entry >= 0 && entry < h->ndevices) { 39049b5c48c2SStephen Cameron dev->supports_aborts = h->dev[entry]->supports_aborts; 39059b5c48c2SStephen Cameron spin_unlock_irqrestore(&h->devlock, flags); 39069b5c48c2SStephen Cameron } else { 39079b5c48c2SStephen Cameron spin_unlock_irqrestore(&h->devlock, flags); 39089b5c48c2SStephen Cameron dev->supports_aborts = 39099b5c48c2SStephen Cameron hpsa_device_supports_aborts(h, scsi3addr); 39109b5c48c2SStephen Cameron if (dev->supports_aborts < 0) 39119b5c48c2SStephen Cameron dev->supports_aborts = 0; 39129b5c48c2SStephen Cameron } 39139b5c48c2SStephen Cameron } 39149b5c48c2SStephen Cameron 3915c795505aSKevin Barnett /* 3916c795505aSKevin Barnett * Helper function to assign bus, target, lun mapping of devices. 3917edd16368SStephen M. Cameron * Logical drive target and lun are assigned at this time, but 3918edd16368SStephen M. Cameron * physical device lun and target assignment are deferred (assigned 3919edd16368SStephen M. Cameron * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.) 3920edd16368SStephen M. Cameron */ 3921edd16368SStephen M. Cameron static void figure_bus_target_lun(struct ctlr_info *h, 39221f310bdeSStephen M. Cameron u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device) 3923edd16368SStephen M. Cameron { 3924c795505aSKevin Barnett u32 lunid = get_unaligned_le32(lunaddrbytes); 3925edd16368SStephen M. Cameron 39261f310bdeSStephen M. Cameron if (!is_logical_dev_addr_mode(lunaddrbytes)) { 39271f310bdeSStephen M. Cameron /* physical device, target and lun filled in later */ 39281f310bdeSStephen M. Cameron if (is_hba_lunid(lunaddrbytes)) 3929c795505aSKevin Barnett hpsa_set_bus_target_lun(device, 3930c795505aSKevin Barnett HPSA_HBA_BUS, 0, lunid & 0x3fff); 39311f310bdeSStephen M. Cameron else 39321f310bdeSStephen M. Cameron /* defer target, lun assignment for physical devices */ 3933c795505aSKevin Barnett hpsa_set_bus_target_lun(device, 3934c795505aSKevin Barnett HPSA_PHYSICAL_DEVICE_BUS, -1, -1); 39351f310bdeSStephen M. Cameron return; 39361f310bdeSStephen M. Cameron } 39371f310bdeSStephen M. Cameron /* It's a logical device */ 393866749d0dSScott Teel if (device->external) { 39391f310bdeSStephen M. Cameron hpsa_set_bus_target_lun(device, 3940c795505aSKevin Barnett HPSA_EXTERNAL_RAID_VOLUME_BUS, (lunid >> 16) & 0x3fff, 3941c795505aSKevin Barnett lunid & 0x00ff); 39421f310bdeSStephen M. Cameron return; 3943339b2b14SStephen M. Cameron } 3944c795505aSKevin Barnett hpsa_set_bus_target_lun(device, HPSA_RAID_VOLUME_BUS, 3945c795505aSKevin Barnett 0, lunid & 0x3fff); 3946edd16368SStephen M. Cameron } 3947edd16368SStephen M. Cameron 3948edd16368SStephen M. Cameron 3949edd16368SStephen M. Cameron /* 395054b6e9e9SScott Teel * Get address of physical disk used for an ioaccel2 mode command: 395154b6e9e9SScott Teel * 1. Extract ioaccel2 handle from the command. 395254b6e9e9SScott Teel * 2. Find a matching ioaccel2 handle from list of physical disks. 395354b6e9e9SScott Teel * 3. Return: 395454b6e9e9SScott Teel * 1 and set scsi3addr to address of matching physical 395554b6e9e9SScott Teel * 0 if no matching physical disk was found. 395654b6e9e9SScott Teel */ 395754b6e9e9SScott Teel static int hpsa_get_pdisk_of_ioaccel2(struct ctlr_info *h, 395854b6e9e9SScott Teel struct CommandList *ioaccel2_cmd_to_abort, unsigned char *scsi3addr) 395954b6e9e9SScott Teel { 396041ce4c35SStephen Cameron struct io_accel2_cmd *c2 = 396141ce4c35SStephen Cameron &h->ioaccel2_cmd_pool[ioaccel2_cmd_to_abort->cmdindex]; 396241ce4c35SStephen Cameron unsigned long flags; 396354b6e9e9SScott Teel int i; 396454b6e9e9SScott Teel 396541ce4c35SStephen Cameron spin_lock_irqsave(&h->devlock, flags); 396641ce4c35SStephen Cameron for (i = 0; i < h->ndevices; i++) 396741ce4c35SStephen Cameron if (h->dev[i]->ioaccel_handle == le32_to_cpu(c2->scsi_nexus)) { 396841ce4c35SStephen Cameron memcpy(scsi3addr, h->dev[i]->scsi3addr, 396941ce4c35SStephen Cameron sizeof(h->dev[i]->scsi3addr)); 397041ce4c35SStephen Cameron spin_unlock_irqrestore(&h->devlock, flags); 397154b6e9e9SScott Teel return 1; 397254b6e9e9SScott Teel } 397341ce4c35SStephen Cameron spin_unlock_irqrestore(&h->devlock, flags); 397441ce4c35SStephen Cameron return 0; 397541ce4c35SStephen Cameron } 397641ce4c35SStephen Cameron 397766749d0dSScott Teel static int figure_external_status(struct ctlr_info *h, int raid_ctlr_position, 397866749d0dSScott Teel int i, int nphysicals, int nlocal_logicals) 397966749d0dSScott Teel { 398066749d0dSScott Teel /* In report logicals, local logicals are listed first, 398166749d0dSScott Teel * then any externals. 398266749d0dSScott Teel */ 398366749d0dSScott Teel int logicals_start = nphysicals + (raid_ctlr_position == 0); 398466749d0dSScott Teel 398566749d0dSScott Teel if (i == raid_ctlr_position) 398666749d0dSScott Teel return 0; 398766749d0dSScott Teel 398866749d0dSScott Teel if (i < logicals_start) 398966749d0dSScott Teel return 0; 399066749d0dSScott Teel 399166749d0dSScott Teel /* i is in logicals range, but still within local logicals */ 399266749d0dSScott Teel if ((i - nphysicals - (raid_ctlr_position == 0)) < nlocal_logicals) 399366749d0dSScott Teel return 0; 399466749d0dSScott Teel 399566749d0dSScott Teel return 1; /* it's an external lun */ 399666749d0dSScott Teel } 399766749d0dSScott Teel 399854b6e9e9SScott Teel /* 3999edd16368SStephen M. Cameron * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev, 4000edd16368SStephen M. Cameron * logdev. The number of luns in physdev and logdev are returned in 4001edd16368SStephen M. Cameron * *nphysicals and *nlogicals, respectively. 4002edd16368SStephen M. Cameron * Returns 0 on success, -1 otherwise. 4003edd16368SStephen M. Cameron */ 4004edd16368SStephen M. Cameron static int hpsa_gather_lun_info(struct ctlr_info *h, 400503383736SDon Brace struct ReportExtendedLUNdata *physdev, u32 *nphysicals, 400601a02ffcSStephen M. Cameron struct ReportLUNdata *logdev, u32 *nlogicals) 4007edd16368SStephen M. Cameron { 400803383736SDon Brace if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) { 4009edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 4010edd16368SStephen M. Cameron return -1; 4011edd16368SStephen M. Cameron } 401203383736SDon Brace *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24; 4013edd16368SStephen M. Cameron if (*nphysicals > HPSA_MAX_PHYS_LUN) { 401403383736SDon Brace dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n", 401503383736SDon Brace HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN); 4016edd16368SStephen M. Cameron *nphysicals = HPSA_MAX_PHYS_LUN; 4017edd16368SStephen M. Cameron } 401803383736SDon Brace if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) { 4019edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "report logical LUNs failed.\n"); 4020edd16368SStephen M. Cameron return -1; 4021edd16368SStephen M. Cameron } 40226df1e954SStephen M. Cameron *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8; 4023edd16368SStephen M. Cameron /* Reject Logicals in excess of our max capability. */ 4024edd16368SStephen M. Cameron if (*nlogicals > HPSA_MAX_LUN) { 4025edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 4026edd16368SStephen M. Cameron "maximum logical LUNs (%d) exceeded. " 4027edd16368SStephen M. Cameron "%d LUNs ignored.\n", HPSA_MAX_LUN, 4028edd16368SStephen M. Cameron *nlogicals - HPSA_MAX_LUN); 4029edd16368SStephen M. Cameron *nlogicals = HPSA_MAX_LUN; 4030edd16368SStephen M. Cameron } 4031edd16368SStephen M. Cameron if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) { 4032edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 4033edd16368SStephen M. Cameron "maximum logical + physical LUNs (%d) exceeded. " 4034edd16368SStephen M. Cameron "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN, 4035edd16368SStephen M. Cameron *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN); 4036edd16368SStephen M. Cameron *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals; 4037edd16368SStephen M. Cameron } 4038edd16368SStephen M. Cameron return 0; 4039edd16368SStephen M. Cameron } 4040edd16368SStephen M. Cameron 404142a91641SDon Brace static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, 404242a91641SDon Brace int i, int nphysicals, int nlogicals, 4043a93aa1feSMatt Gates struct ReportExtendedLUNdata *physdev_list, 4044339b2b14SStephen M. Cameron struct ReportLUNdata *logdev_list) 4045339b2b14SStephen M. Cameron { 4046339b2b14SStephen M. Cameron /* Helper function, figure out where the LUN ID info is coming from 4047339b2b14SStephen M. Cameron * given index i, lists of physical and logical devices, where in 4048339b2b14SStephen M. Cameron * the list the raid controller is supposed to appear (first or last) 4049339b2b14SStephen M. Cameron */ 4050339b2b14SStephen M. Cameron 4051339b2b14SStephen M. Cameron int logicals_start = nphysicals + (raid_ctlr_position == 0); 4052339b2b14SStephen M. Cameron int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0); 4053339b2b14SStephen M. Cameron 4054339b2b14SStephen M. Cameron if (i == raid_ctlr_position) 4055339b2b14SStephen M. Cameron return RAID_CTLR_LUNID; 4056339b2b14SStephen M. Cameron 4057339b2b14SStephen M. Cameron if (i < logicals_start) 4058d5b5d964SStephen M. Cameron return &physdev_list->LUN[i - 4059d5b5d964SStephen M. Cameron (raid_ctlr_position == 0)].lunid[0]; 4060339b2b14SStephen M. Cameron 4061339b2b14SStephen M. Cameron if (i < last_device) 4062339b2b14SStephen M. Cameron return &logdev_list->LUN[i - nphysicals - 4063339b2b14SStephen M. Cameron (raid_ctlr_position == 0)][0]; 4064339b2b14SStephen M. Cameron BUG(); 4065339b2b14SStephen M. Cameron return NULL; 4066339b2b14SStephen M. Cameron } 4067339b2b14SStephen M. Cameron 406803383736SDon Brace /* get physical drive ioaccel handle and queue depth */ 406903383736SDon Brace static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h, 407003383736SDon Brace struct hpsa_scsi_dev_t *dev, 4071f2039b03SDon Brace struct ReportExtendedLUNdata *rlep, int rle_index, 407203383736SDon Brace struct bmic_identify_physical_device *id_phys) 407303383736SDon Brace { 407403383736SDon Brace int rc; 4075f2039b03SDon Brace struct ext_report_lun_entry *rle = &rlep->LUN[rle_index]; 407603383736SDon Brace 407703383736SDon Brace dev->ioaccel_handle = rle->ioaccel_handle; 4078f2039b03SDon Brace if ((rle->device_flags & 0x08) && dev->ioaccel_handle) 4079a3144e0bSJoe Handzik dev->hba_ioaccel_enabled = 1; 408003383736SDon Brace memset(id_phys, 0, sizeof(*id_phys)); 4081f2039b03SDon Brace rc = hpsa_bmic_id_physical_device(h, &rle->lunid[0], 4082f2039b03SDon Brace GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]), id_phys, 408303383736SDon Brace sizeof(*id_phys)); 408403383736SDon Brace if (!rc) 408503383736SDon Brace /* Reserve space for FW operations */ 408603383736SDon Brace #define DRIVE_CMDS_RESERVED_FOR_FW 2 408703383736SDon Brace #define DRIVE_QUEUE_DEPTH 7 408803383736SDon Brace dev->queue_depth = 408903383736SDon Brace le16_to_cpu(id_phys->current_queue_depth_limit) - 409003383736SDon Brace DRIVE_CMDS_RESERVED_FOR_FW; 409103383736SDon Brace else 409203383736SDon Brace dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */ 409303383736SDon Brace } 409403383736SDon Brace 40958270b862SJoe Handzik static void hpsa_get_path_info(struct hpsa_scsi_dev_t *this_device, 4096f2039b03SDon Brace struct ReportExtendedLUNdata *rlep, int rle_index, 40978270b862SJoe Handzik struct bmic_identify_physical_device *id_phys) 40988270b862SJoe Handzik { 4099f2039b03SDon Brace struct ext_report_lun_entry *rle = &rlep->LUN[rle_index]; 4100f2039b03SDon Brace 4101f2039b03SDon Brace if ((rle->device_flags & 0x08) && this_device->ioaccel_handle) 41028270b862SJoe Handzik this_device->hba_ioaccel_enabled = 1; 41038270b862SJoe Handzik 41048270b862SJoe Handzik memcpy(&this_device->active_path_index, 41058270b862SJoe Handzik &id_phys->active_path_number, 41068270b862SJoe Handzik sizeof(this_device->active_path_index)); 41078270b862SJoe Handzik memcpy(&this_device->path_map, 41088270b862SJoe Handzik &id_phys->redundant_path_present_map, 41098270b862SJoe Handzik sizeof(this_device->path_map)); 41108270b862SJoe Handzik memcpy(&this_device->box, 41118270b862SJoe Handzik &id_phys->alternate_paths_phys_box_on_port, 41128270b862SJoe Handzik sizeof(this_device->box)); 41138270b862SJoe Handzik memcpy(&this_device->phys_connector, 41148270b862SJoe Handzik &id_phys->alternate_paths_phys_connector, 41158270b862SJoe Handzik sizeof(this_device->phys_connector)); 41168270b862SJoe Handzik memcpy(&this_device->bay, 41178270b862SJoe Handzik &id_phys->phys_bay_in_box, 41188270b862SJoe Handzik sizeof(this_device->bay)); 41198270b862SJoe Handzik } 41208270b862SJoe Handzik 412166749d0dSScott Teel /* get number of local logical disks. */ 412266749d0dSScott Teel static int hpsa_set_local_logical_count(struct ctlr_info *h, 412366749d0dSScott Teel struct bmic_identify_controller *id_ctlr, 412466749d0dSScott Teel u32 *nlocals) 412566749d0dSScott Teel { 412666749d0dSScott Teel int rc; 412766749d0dSScott Teel 412866749d0dSScott Teel if (!id_ctlr) { 412966749d0dSScott Teel dev_warn(&h->pdev->dev, "%s: id_ctlr buffer is NULL.\n", 413066749d0dSScott Teel __func__); 413166749d0dSScott Teel return -ENOMEM; 413266749d0dSScott Teel } 413366749d0dSScott Teel memset(id_ctlr, 0, sizeof(*id_ctlr)); 413466749d0dSScott Teel rc = hpsa_bmic_id_controller(h, id_ctlr, sizeof(*id_ctlr)); 413566749d0dSScott Teel if (!rc) 413666749d0dSScott Teel if (id_ctlr->configured_logical_drive_count < 256) 413766749d0dSScott Teel *nlocals = id_ctlr->configured_logical_drive_count; 413866749d0dSScott Teel else 413966749d0dSScott Teel *nlocals = le16_to_cpu( 414066749d0dSScott Teel id_ctlr->extended_logical_unit_count); 414166749d0dSScott Teel else 414266749d0dSScott Teel *nlocals = -1; 414366749d0dSScott Teel return rc; 414466749d0dSScott Teel } 414566749d0dSScott Teel 414664ce60caSDon Brace static bool hpsa_is_disk_spare(struct ctlr_info *h, u8 *lunaddrbytes) 414764ce60caSDon Brace { 414864ce60caSDon Brace struct bmic_identify_physical_device *id_phys; 414964ce60caSDon Brace bool is_spare = false; 415064ce60caSDon Brace int rc; 415164ce60caSDon Brace 415264ce60caSDon Brace id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 415364ce60caSDon Brace if (!id_phys) 415464ce60caSDon Brace return false; 415564ce60caSDon Brace 415664ce60caSDon Brace rc = hpsa_bmic_id_physical_device(h, 415764ce60caSDon Brace lunaddrbytes, 415864ce60caSDon Brace GET_BMIC_DRIVE_NUMBER(lunaddrbytes), 415964ce60caSDon Brace id_phys, sizeof(*id_phys)); 416064ce60caSDon Brace if (rc == 0) 416164ce60caSDon Brace is_spare = (id_phys->more_flags >> 6) & 0x01; 416264ce60caSDon Brace 416364ce60caSDon Brace kfree(id_phys); 416464ce60caSDon Brace return is_spare; 416564ce60caSDon Brace } 416664ce60caSDon Brace 416764ce60caSDon Brace #define RPL_DEV_FLAG_NON_DISK 0x1 416864ce60caSDon Brace #define RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED 0x2 416964ce60caSDon Brace #define RPL_DEV_FLAG_UNCONFIG_DISK 0x4 417064ce60caSDon Brace 417164ce60caSDon Brace #define BMIC_DEVICE_TYPE_ENCLOSURE 6 417264ce60caSDon Brace 417364ce60caSDon Brace static bool hpsa_skip_device(struct ctlr_info *h, u8 *lunaddrbytes, 417464ce60caSDon Brace struct ext_report_lun_entry *rle) 417564ce60caSDon Brace { 417664ce60caSDon Brace u8 device_flags; 417764ce60caSDon Brace u8 device_type; 417864ce60caSDon Brace 417964ce60caSDon Brace if (!MASKED_DEVICE(lunaddrbytes)) 418064ce60caSDon Brace return false; 418164ce60caSDon Brace 418264ce60caSDon Brace device_flags = rle->device_flags; 418364ce60caSDon Brace device_type = rle->device_type; 418464ce60caSDon Brace 418564ce60caSDon Brace if (device_flags & RPL_DEV_FLAG_NON_DISK) { 418664ce60caSDon Brace if (device_type == BMIC_DEVICE_TYPE_ENCLOSURE) 418764ce60caSDon Brace return false; 418864ce60caSDon Brace return true; 418964ce60caSDon Brace } 419064ce60caSDon Brace 419164ce60caSDon Brace if (!(device_flags & RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED)) 419264ce60caSDon Brace return false; 419364ce60caSDon Brace 419464ce60caSDon Brace if (device_flags & RPL_DEV_FLAG_UNCONFIG_DISK) 419564ce60caSDon Brace return false; 419664ce60caSDon Brace 419764ce60caSDon Brace /* 419864ce60caSDon Brace * Spares may be spun down, we do not want to 419964ce60caSDon Brace * do an Inquiry to a RAID set spare drive as 420064ce60caSDon Brace * that would have them spun up, that is a 420164ce60caSDon Brace * performance hit because I/O to the RAID device 420264ce60caSDon Brace * stops while the spin up occurs which can take 420364ce60caSDon Brace * over 50 seconds. 420464ce60caSDon Brace */ 420564ce60caSDon Brace if (hpsa_is_disk_spare(h, lunaddrbytes)) 420664ce60caSDon Brace return true; 420764ce60caSDon Brace 420864ce60caSDon Brace return false; 420964ce60caSDon Brace } 421066749d0dSScott Teel 42118aa60681SDon Brace static void hpsa_update_scsi_devices(struct ctlr_info *h) 4212edd16368SStephen M. Cameron { 4213edd16368SStephen M. Cameron /* the idea here is we could get notified 4214edd16368SStephen M. Cameron * that some devices have changed, so we do a report 4215edd16368SStephen M. Cameron * physical luns and report logical luns cmd, and adjust 4216edd16368SStephen M. Cameron * our list of devices accordingly. 4217edd16368SStephen M. Cameron * 4218edd16368SStephen M. Cameron * The scsi3addr's of devices won't change so long as the 4219edd16368SStephen M. Cameron * adapter is not reset. That means we can rescan and 4220edd16368SStephen M. Cameron * tell which devices we already know about, vs. new 4221edd16368SStephen M. Cameron * devices, vs. disappearing devices. 4222edd16368SStephen M. Cameron */ 4223a93aa1feSMatt Gates struct ReportExtendedLUNdata *physdev_list = NULL; 4224edd16368SStephen M. Cameron struct ReportLUNdata *logdev_list = NULL; 422503383736SDon Brace struct bmic_identify_physical_device *id_phys = NULL; 422666749d0dSScott Teel struct bmic_identify_controller *id_ctlr = NULL; 422701a02ffcSStephen M. Cameron u32 nphysicals = 0; 422801a02ffcSStephen M. Cameron u32 nlogicals = 0; 422966749d0dSScott Teel u32 nlocal_logicals = 0; 423001a02ffcSStephen M. Cameron u32 ndev_allocated = 0; 4231edd16368SStephen M. Cameron struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice; 4232edd16368SStephen M. Cameron int ncurrent = 0; 42334f4eb9f1SScott Teel int i, n_ext_target_devs, ndevs_to_allocate; 4234339b2b14SStephen M. Cameron int raid_ctlr_position; 423504fa2f44SKevin Barnett bool physical_device; 4236aca4a520SScott Teel DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS); 4237edd16368SStephen M. Cameron 4238cfe5badcSScott Teel currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL); 423992084715SStephen M. Cameron physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL); 424092084715SStephen M. Cameron logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL); 4241edd16368SStephen M. Cameron tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL); 424203383736SDon Brace id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 424366749d0dSScott Teel id_ctlr = kzalloc(sizeof(*id_ctlr), GFP_KERNEL); 4244edd16368SStephen M. Cameron 424503383736SDon Brace if (!currentsd || !physdev_list || !logdev_list || 424666749d0dSScott Teel !tmpdevice || !id_phys || !id_ctlr) { 4247edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "out of memory\n"); 4248edd16368SStephen M. Cameron goto out; 4249edd16368SStephen M. Cameron } 4250edd16368SStephen M. Cameron memset(lunzerobits, 0, sizeof(lunzerobits)); 4251edd16368SStephen M. Cameron 4252853633e8SDon Brace h->drv_req_rescan = 0; /* cancel scheduled rescan - we're doing it. */ 4253853633e8SDon Brace 425403383736SDon Brace if (hpsa_gather_lun_info(h, physdev_list, &nphysicals, 4255853633e8SDon Brace logdev_list, &nlogicals)) { 4256853633e8SDon Brace h->drv_req_rescan = 1; 4257edd16368SStephen M. Cameron goto out; 4258853633e8SDon Brace } 4259edd16368SStephen M. Cameron 426066749d0dSScott Teel /* Set number of local logicals (non PTRAID) */ 426166749d0dSScott Teel if (hpsa_set_local_logical_count(h, id_ctlr, &nlocal_logicals)) { 426266749d0dSScott Teel dev_warn(&h->pdev->dev, 426366749d0dSScott Teel "%s: Can't determine number of local logical devices.\n", 426466749d0dSScott Teel __func__); 426566749d0dSScott Teel } 4266edd16368SStephen M. Cameron 4267aca4a520SScott Teel /* We might see up to the maximum number of logical and physical disks 4268aca4a520SScott Teel * plus external target devices, and a device for the local RAID 4269aca4a520SScott Teel * controller. 4270edd16368SStephen M. Cameron */ 4271aca4a520SScott Teel ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1; 4272edd16368SStephen M. Cameron 4273edd16368SStephen M. Cameron /* Allocate the per device structures */ 4274edd16368SStephen M. Cameron for (i = 0; i < ndevs_to_allocate; i++) { 4275b7ec021fSScott Teel if (i >= HPSA_MAX_DEVICES) { 4276b7ec021fSScott Teel dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded." 4277b7ec021fSScott Teel " %d devices ignored.\n", HPSA_MAX_DEVICES, 4278b7ec021fSScott Teel ndevs_to_allocate - HPSA_MAX_DEVICES); 4279b7ec021fSScott Teel break; 4280b7ec021fSScott Teel } 4281b7ec021fSScott Teel 4282edd16368SStephen M. Cameron currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL); 4283edd16368SStephen M. Cameron if (!currentsd[i]) { 4284edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "out of memory at %s:%d\n", 4285edd16368SStephen M. Cameron __FILE__, __LINE__); 4286853633e8SDon Brace h->drv_req_rescan = 1; 4287edd16368SStephen M. Cameron goto out; 4288edd16368SStephen M. Cameron } 4289edd16368SStephen M. Cameron ndev_allocated++; 4290edd16368SStephen M. Cameron } 4291edd16368SStephen M. Cameron 42928645291bSStephen M. Cameron if (is_scsi_rev_5(h)) 4293339b2b14SStephen M. Cameron raid_ctlr_position = 0; 4294339b2b14SStephen M. Cameron else 4295339b2b14SStephen M. Cameron raid_ctlr_position = nphysicals + nlogicals; 4296339b2b14SStephen M. Cameron 4297edd16368SStephen M. Cameron /* adjust our table of devices */ 42984f4eb9f1SScott Teel n_ext_target_devs = 0; 4299edd16368SStephen M. Cameron for (i = 0; i < nphysicals + nlogicals + 1; i++) { 43000b0e1d6cSStephen M. Cameron u8 *lunaddrbytes, is_OBDR = 0; 4301683fc444SDon Brace int rc = 0; 4302f2039b03SDon Brace int phys_dev_index = i - (raid_ctlr_position == 0); 430364ce60caSDon Brace bool skip_device = false; 4304edd16368SStephen M. Cameron 430504fa2f44SKevin Barnett physical_device = i < nphysicals + (raid_ctlr_position == 0); 4306edd16368SStephen M. Cameron 4307edd16368SStephen M. Cameron /* Figure out where the LUN ID info is coming from */ 4308339b2b14SStephen M. Cameron lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position, 4309339b2b14SStephen M. Cameron i, nphysicals, nlogicals, physdev_list, logdev_list); 431041ce4c35SStephen Cameron 431186cf7130SDon Brace /* Determine if this is a lun from an external target array */ 431286cf7130SDon Brace tmpdevice->external = 431386cf7130SDon Brace figure_external_status(h, raid_ctlr_position, i, 431486cf7130SDon Brace nphysicals, nlocal_logicals); 431586cf7130SDon Brace 431664ce60caSDon Brace /* 431764ce60caSDon Brace * Skip over some devices such as a spare. 431864ce60caSDon Brace */ 431964ce60caSDon Brace if (!tmpdevice->external && physical_device) { 432064ce60caSDon Brace skip_device = hpsa_skip_device(h, lunaddrbytes, 432164ce60caSDon Brace &physdev_list->LUN[phys_dev_index]); 432264ce60caSDon Brace if (skip_device) 4323edd16368SStephen M. Cameron continue; 432464ce60caSDon Brace } 4325edd16368SStephen M. Cameron 4326edd16368SStephen M. Cameron /* Get device type, vendor, model, device id */ 4327683fc444SDon Brace rc = hpsa_update_device_info(h, lunaddrbytes, tmpdevice, 4328683fc444SDon Brace &is_OBDR); 4329683fc444SDon Brace if (rc == -ENOMEM) { 4330683fc444SDon Brace dev_warn(&h->pdev->dev, 4331683fc444SDon Brace "Out of memory, rescan deferred.\n"); 4332853633e8SDon Brace h->drv_req_rescan = 1; 4333683fc444SDon Brace goto out; 4334853633e8SDon Brace } 4335683fc444SDon Brace if (rc) { 4336683fc444SDon Brace dev_warn(&h->pdev->dev, 4337683fc444SDon Brace "Inquiry failed, skipping device.\n"); 4338683fc444SDon Brace continue; 4339683fc444SDon Brace } 4340683fc444SDon Brace 43411f310bdeSStephen M. Cameron figure_bus_target_lun(h, lunaddrbytes, tmpdevice); 43429b5c48c2SStephen Cameron hpsa_update_device_supports_aborts(h, tmpdevice, lunaddrbytes); 4343edd16368SStephen M. Cameron this_device = currentsd[ncurrent]; 4344edd16368SStephen M. Cameron 434534592254SScott Teel /* Turn on discovery_polling if there are ext target devices. 434634592254SScott Teel * Event-based change notification is unreliable for those. 4347edd16368SStephen M. Cameron */ 434834592254SScott Teel if (!h->discovery_polling) { 434934592254SScott Teel if (tmpdevice->external) { 435034592254SScott Teel h->discovery_polling = 1; 435134592254SScott Teel dev_info(&h->pdev->dev, 435234592254SScott Teel "External target, activate discovery polling.\n"); 4353edd16368SStephen M. Cameron } 435434592254SScott Teel } 435534592254SScott Teel 4356edd16368SStephen M. Cameron 4357edd16368SStephen M. Cameron *this_device = *tmpdevice; 435804fa2f44SKevin Barnett this_device->physical_device = physical_device; 4359edd16368SStephen M. Cameron 436004fa2f44SKevin Barnett /* 436104fa2f44SKevin Barnett * Expose all devices except for physical devices that 436204fa2f44SKevin Barnett * are masked. 436304fa2f44SKevin Barnett */ 436404fa2f44SKevin Barnett if (MASKED_DEVICE(lunaddrbytes) && this_device->physical_device) 43652a168208SKevin Barnett this_device->expose_device = 0; 43662a168208SKevin Barnett else 43672a168208SKevin Barnett this_device->expose_device = 1; 436841ce4c35SStephen Cameron 4369d04e62b9SKevin Barnett 4370d04e62b9SKevin Barnett /* 4371d04e62b9SKevin Barnett * Get the SAS address for physical devices that are exposed. 4372d04e62b9SKevin Barnett */ 4373d04e62b9SKevin Barnett if (this_device->physical_device && this_device->expose_device) 4374d04e62b9SKevin Barnett hpsa_get_sas_address(h, lunaddrbytes, this_device); 4375edd16368SStephen M. Cameron 4376edd16368SStephen M. Cameron switch (this_device->devtype) { 43770b0e1d6cSStephen M. Cameron case TYPE_ROM: 4378edd16368SStephen M. Cameron /* We don't *really* support actual CD-ROM devices, 4379edd16368SStephen M. Cameron * just "One Button Disaster Recovery" tape drive 4380edd16368SStephen M. Cameron * which temporarily pretends to be a CD-ROM drive. 4381edd16368SStephen M. Cameron * So we check that the device is really an OBDR tape 4382edd16368SStephen M. Cameron * device by checking for "$DR-10" in bytes 43-48 of 4383edd16368SStephen M. Cameron * the inquiry data. 4384edd16368SStephen M. Cameron */ 43850b0e1d6cSStephen M. Cameron if (is_OBDR) 4386edd16368SStephen M. Cameron ncurrent++; 4387edd16368SStephen M. Cameron break; 4388edd16368SStephen M. Cameron case TYPE_DISK: 4389af15ed36SDon Brace case TYPE_ZBC: 439004fa2f44SKevin Barnett if (this_device->physical_device) { 4391b9092b79SKevin Barnett /* The disk is in HBA mode. */ 4392b9092b79SKevin Barnett /* Never use RAID mapper in HBA mode. */ 4393ecf418d1SJoe Handzik this_device->offload_enabled = 0; 439403383736SDon Brace hpsa_get_ioaccel_drive_info(h, this_device, 4395f2039b03SDon Brace physdev_list, phys_dev_index, id_phys); 4396f2039b03SDon Brace hpsa_get_path_info(this_device, 4397f2039b03SDon Brace physdev_list, phys_dev_index, id_phys); 4398b9092b79SKevin Barnett } 4399edd16368SStephen M. Cameron ncurrent++; 4400edd16368SStephen M. Cameron break; 4401edd16368SStephen M. Cameron case TYPE_TAPE: 4402edd16368SStephen M. Cameron case TYPE_MEDIUM_CHANGER: 4403cca8f13bSDon Brace ncurrent++; 4404cca8f13bSDon Brace break; 440541ce4c35SStephen Cameron case TYPE_ENCLOSURE: 440617a9e54aSDon Brace if (!this_device->external) 4407cca8f13bSDon Brace hpsa_get_enclosure_info(h, lunaddrbytes, 4408cca8f13bSDon Brace physdev_list, phys_dev_index, 4409cca8f13bSDon Brace this_device); 441041ce4c35SStephen Cameron ncurrent++; 441141ce4c35SStephen Cameron break; 4412edd16368SStephen M. Cameron case TYPE_RAID: 4413edd16368SStephen M. Cameron /* Only present the Smartarray HBA as a RAID controller. 4414edd16368SStephen M. Cameron * If it's a RAID controller other than the HBA itself 4415edd16368SStephen M. Cameron * (an external RAID controller, MSA500 or similar) 4416edd16368SStephen M. Cameron * don't present it. 4417edd16368SStephen M. Cameron */ 4418edd16368SStephen M. Cameron if (!is_hba_lunid(lunaddrbytes)) 4419edd16368SStephen M. Cameron break; 4420edd16368SStephen M. Cameron ncurrent++; 4421edd16368SStephen M. Cameron break; 4422edd16368SStephen M. Cameron default: 4423edd16368SStephen M. Cameron break; 4424edd16368SStephen M. Cameron } 4425cfe5badcSScott Teel if (ncurrent >= HPSA_MAX_DEVICES) 4426edd16368SStephen M. Cameron break; 4427edd16368SStephen M. Cameron } 4428d04e62b9SKevin Barnett 4429d04e62b9SKevin Barnett if (h->sas_host == NULL) { 4430d04e62b9SKevin Barnett int rc = 0; 4431d04e62b9SKevin Barnett 4432d04e62b9SKevin Barnett rc = hpsa_add_sas_host(h); 4433d04e62b9SKevin Barnett if (rc) { 4434d04e62b9SKevin Barnett dev_warn(&h->pdev->dev, 4435d04e62b9SKevin Barnett "Could not add sas host %d\n", rc); 4436d04e62b9SKevin Barnett goto out; 4437d04e62b9SKevin Barnett } 4438d04e62b9SKevin Barnett } 4439d04e62b9SKevin Barnett 44408aa60681SDon Brace adjust_hpsa_scsi_table(h, currentsd, ncurrent); 4441edd16368SStephen M. Cameron out: 4442edd16368SStephen M. Cameron kfree(tmpdevice); 4443edd16368SStephen M. Cameron for (i = 0; i < ndev_allocated; i++) 4444edd16368SStephen M. Cameron kfree(currentsd[i]); 4445edd16368SStephen M. Cameron kfree(currentsd); 4446edd16368SStephen M. Cameron kfree(physdev_list); 4447edd16368SStephen M. Cameron kfree(logdev_list); 444866749d0dSScott Teel kfree(id_ctlr); 444903383736SDon Brace kfree(id_phys); 4450edd16368SStephen M. Cameron } 4451edd16368SStephen M. Cameron 4452ec5cbf04SWebb Scales static void hpsa_set_sg_descriptor(struct SGDescriptor *desc, 4453ec5cbf04SWebb Scales struct scatterlist *sg) 4454ec5cbf04SWebb Scales { 4455ec5cbf04SWebb Scales u64 addr64 = (u64) sg_dma_address(sg); 4456ec5cbf04SWebb Scales unsigned int len = sg_dma_len(sg); 4457ec5cbf04SWebb Scales 4458ec5cbf04SWebb Scales desc->Addr = cpu_to_le64(addr64); 4459ec5cbf04SWebb Scales desc->Len = cpu_to_le32(len); 4460ec5cbf04SWebb Scales desc->Ext = 0; 4461ec5cbf04SWebb Scales } 4462ec5cbf04SWebb Scales 4463c7ee65b3SWebb Scales /* 4464c7ee65b3SWebb Scales * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci 4465edd16368SStephen M. Cameron * dma mapping and fills in the scatter gather entries of the 4466edd16368SStephen M. Cameron * hpsa command, cp. 4467edd16368SStephen M. Cameron */ 446833a2ffceSStephen M. Cameron static int hpsa_scatter_gather(struct ctlr_info *h, 4469edd16368SStephen M. Cameron struct CommandList *cp, 4470edd16368SStephen M. Cameron struct scsi_cmnd *cmd) 4471edd16368SStephen M. Cameron { 4472edd16368SStephen M. Cameron struct scatterlist *sg; 4473b3a7ba7cSWebb Scales int use_sg, i, sg_limit, chained, last_sg; 447433a2ffceSStephen M. Cameron struct SGDescriptor *curr_sg; 4475edd16368SStephen M. Cameron 447633a2ffceSStephen M. Cameron BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 4477edd16368SStephen M. Cameron 4478edd16368SStephen M. Cameron use_sg = scsi_dma_map(cmd); 4479edd16368SStephen M. Cameron if (use_sg < 0) 4480edd16368SStephen M. Cameron return use_sg; 4481edd16368SStephen M. Cameron 4482edd16368SStephen M. Cameron if (!use_sg) 4483edd16368SStephen M. Cameron goto sglist_finished; 4484edd16368SStephen M. Cameron 4485b3a7ba7cSWebb Scales /* 4486b3a7ba7cSWebb Scales * If the number of entries is greater than the max for a single list, 4487b3a7ba7cSWebb Scales * then we have a chained list; we will set up all but one entry in the 4488b3a7ba7cSWebb Scales * first list (the last entry is saved for link information); 4489b3a7ba7cSWebb Scales * otherwise, we don't have a chained list and we'll set up at each of 4490b3a7ba7cSWebb Scales * the entries in the one list. 4491b3a7ba7cSWebb Scales */ 449233a2ffceSStephen M. Cameron curr_sg = cp->SG; 4493b3a7ba7cSWebb Scales chained = use_sg > h->max_cmd_sg_entries; 4494b3a7ba7cSWebb Scales sg_limit = chained ? h->max_cmd_sg_entries - 1 : use_sg; 4495b3a7ba7cSWebb Scales last_sg = scsi_sg_count(cmd) - 1; 4496b3a7ba7cSWebb Scales scsi_for_each_sg(cmd, sg, sg_limit, i) { 4497ec5cbf04SWebb Scales hpsa_set_sg_descriptor(curr_sg, sg); 449833a2ffceSStephen M. Cameron curr_sg++; 449933a2ffceSStephen M. Cameron } 4500ec5cbf04SWebb Scales 4501b3a7ba7cSWebb Scales if (chained) { 4502b3a7ba7cSWebb Scales /* 4503b3a7ba7cSWebb Scales * Continue with the chained list. Set curr_sg to the chained 4504b3a7ba7cSWebb Scales * list. Modify the limit to the total count less the entries 4505b3a7ba7cSWebb Scales * we've already set up. Resume the scan at the list entry 4506b3a7ba7cSWebb Scales * where the previous loop left off. 4507b3a7ba7cSWebb Scales */ 4508b3a7ba7cSWebb Scales curr_sg = h->cmd_sg_list[cp->cmdindex]; 4509b3a7ba7cSWebb Scales sg_limit = use_sg - sg_limit; 4510b3a7ba7cSWebb Scales for_each_sg(sg, sg, sg_limit, i) { 4511b3a7ba7cSWebb Scales hpsa_set_sg_descriptor(curr_sg, sg); 4512b3a7ba7cSWebb Scales curr_sg++; 4513b3a7ba7cSWebb Scales } 4514b3a7ba7cSWebb Scales } 4515b3a7ba7cSWebb Scales 4516ec5cbf04SWebb Scales /* Back the pointer up to the last entry and mark it as "last". */ 4517b3a7ba7cSWebb Scales (curr_sg - 1)->Ext = cpu_to_le32(HPSA_SG_LAST); 451833a2ffceSStephen M. Cameron 451933a2ffceSStephen M. Cameron if (use_sg + chained > h->maxSG) 452033a2ffceSStephen M. Cameron h->maxSG = use_sg + chained; 452133a2ffceSStephen M. Cameron 452233a2ffceSStephen M. Cameron if (chained) { 452333a2ffceSStephen M. Cameron cp->Header.SGList = h->max_cmd_sg_entries; 452450a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(use_sg + 1); 4525e2bea6dfSStephen M. Cameron if (hpsa_map_sg_chain_block(h, cp)) { 4526e2bea6dfSStephen M. Cameron scsi_dma_unmap(cmd); 4527e2bea6dfSStephen M. Cameron return -1; 4528e2bea6dfSStephen M. Cameron } 452933a2ffceSStephen M. Cameron return 0; 4530edd16368SStephen M. Cameron } 4531edd16368SStephen M. Cameron 4532edd16368SStephen M. Cameron sglist_finished: 4533edd16368SStephen M. Cameron 453401a02ffcSStephen M. Cameron cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */ 4535c7ee65b3SWebb Scales cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */ 4536edd16368SStephen M. Cameron return 0; 4537edd16368SStephen M. Cameron } 4538edd16368SStephen M. Cameron 4539283b4a9bSStephen M. Cameron #define IO_ACCEL_INELIGIBLE (1) 4540283b4a9bSStephen M. Cameron static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len) 4541283b4a9bSStephen M. Cameron { 4542283b4a9bSStephen M. Cameron int is_write = 0; 4543283b4a9bSStephen M. Cameron u32 block; 4544283b4a9bSStephen M. Cameron u32 block_cnt; 4545283b4a9bSStephen M. Cameron 4546283b4a9bSStephen M. Cameron /* Perform some CDB fixups if needed using 10 byte reads/writes only */ 4547283b4a9bSStephen M. Cameron switch (cdb[0]) { 4548283b4a9bSStephen M. Cameron case WRITE_6: 4549283b4a9bSStephen M. Cameron case WRITE_12: 4550283b4a9bSStephen M. Cameron is_write = 1; 4551283b4a9bSStephen M. Cameron case READ_6: 4552283b4a9bSStephen M. Cameron case READ_12: 4553283b4a9bSStephen M. Cameron if (*cdb_len == 6) { 4554c8a6c9a6SDon Brace block = get_unaligned_be16(&cdb[2]); 4555283b4a9bSStephen M. Cameron block_cnt = cdb[4]; 4556c8a6c9a6SDon Brace if (block_cnt == 0) 4557c8a6c9a6SDon Brace block_cnt = 256; 4558283b4a9bSStephen M. Cameron } else { 4559283b4a9bSStephen M. Cameron BUG_ON(*cdb_len != 12); 4560c8a6c9a6SDon Brace block = get_unaligned_be32(&cdb[2]); 4561c8a6c9a6SDon Brace block_cnt = get_unaligned_be32(&cdb[6]); 4562283b4a9bSStephen M. Cameron } 4563283b4a9bSStephen M. Cameron if (block_cnt > 0xffff) 4564283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 4565283b4a9bSStephen M. Cameron 4566283b4a9bSStephen M. Cameron cdb[0] = is_write ? WRITE_10 : READ_10; 4567283b4a9bSStephen M. Cameron cdb[1] = 0; 4568283b4a9bSStephen M. Cameron cdb[2] = (u8) (block >> 24); 4569283b4a9bSStephen M. Cameron cdb[3] = (u8) (block >> 16); 4570283b4a9bSStephen M. Cameron cdb[4] = (u8) (block >> 8); 4571283b4a9bSStephen M. Cameron cdb[5] = (u8) (block); 4572283b4a9bSStephen M. Cameron cdb[6] = 0; 4573283b4a9bSStephen M. Cameron cdb[7] = (u8) (block_cnt >> 8); 4574283b4a9bSStephen M. Cameron cdb[8] = (u8) (block_cnt); 4575283b4a9bSStephen M. Cameron cdb[9] = 0; 4576283b4a9bSStephen M. Cameron *cdb_len = 10; 4577283b4a9bSStephen M. Cameron break; 4578283b4a9bSStephen M. Cameron } 4579283b4a9bSStephen M. Cameron return 0; 4580283b4a9bSStephen M. Cameron } 4581283b4a9bSStephen M. Cameron 4582c349775eSScott Teel static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h, 4583283b4a9bSStephen M. Cameron struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 458403383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4585e1f7de0cSMatt Gates { 4586e1f7de0cSMatt Gates struct scsi_cmnd *cmd = c->scsi_cmd; 4587e1f7de0cSMatt Gates struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex]; 4588e1f7de0cSMatt Gates unsigned int len; 4589e1f7de0cSMatt Gates unsigned int total_len = 0; 4590e1f7de0cSMatt Gates struct scatterlist *sg; 4591e1f7de0cSMatt Gates u64 addr64; 4592e1f7de0cSMatt Gates int use_sg, i; 4593e1f7de0cSMatt Gates struct SGDescriptor *curr_sg; 4594e1f7de0cSMatt Gates u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE; 4595e1f7de0cSMatt Gates 4596283b4a9bSStephen M. Cameron /* TODO: implement chaining support */ 459703383736SDon Brace if (scsi_sg_count(cmd) > h->ioaccel_maxsg) { 459803383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4599283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 460003383736SDon Brace } 4601283b4a9bSStephen M. Cameron 4602e1f7de0cSMatt Gates BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX); 4603e1f7de0cSMatt Gates 460403383736SDon Brace if (fixup_ioaccel_cdb(cdb, &cdb_len)) { 460503383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4606283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 460703383736SDon Brace } 4608283b4a9bSStephen M. Cameron 4609e1f7de0cSMatt Gates c->cmd_type = CMD_IOACCEL1; 4610e1f7de0cSMatt Gates 4611e1f7de0cSMatt Gates /* Adjust the DMA address to point to the accelerated command buffer */ 4612e1f7de0cSMatt Gates c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle + 4613e1f7de0cSMatt Gates (c->cmdindex * sizeof(*cp)); 4614e1f7de0cSMatt Gates BUG_ON(c->busaddr & 0x0000007F); 4615e1f7de0cSMatt Gates 4616e1f7de0cSMatt Gates use_sg = scsi_dma_map(cmd); 461703383736SDon Brace if (use_sg < 0) { 461803383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4619e1f7de0cSMatt Gates return use_sg; 462003383736SDon Brace } 4621e1f7de0cSMatt Gates 4622e1f7de0cSMatt Gates if (use_sg) { 4623e1f7de0cSMatt Gates curr_sg = cp->SG; 4624e1f7de0cSMatt Gates scsi_for_each_sg(cmd, sg, use_sg, i) { 4625e1f7de0cSMatt Gates addr64 = (u64) sg_dma_address(sg); 4626e1f7de0cSMatt Gates len = sg_dma_len(sg); 4627e1f7de0cSMatt Gates total_len += len; 462850a0decfSStephen M. Cameron curr_sg->Addr = cpu_to_le64(addr64); 462950a0decfSStephen M. Cameron curr_sg->Len = cpu_to_le32(len); 463050a0decfSStephen M. Cameron curr_sg->Ext = cpu_to_le32(0); 4631e1f7de0cSMatt Gates curr_sg++; 4632e1f7de0cSMatt Gates } 463350a0decfSStephen M. Cameron (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST); 4634e1f7de0cSMatt Gates 4635e1f7de0cSMatt Gates switch (cmd->sc_data_direction) { 4636e1f7de0cSMatt Gates case DMA_TO_DEVICE: 4637e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_DATA_OUT; 4638e1f7de0cSMatt Gates break; 4639e1f7de0cSMatt Gates case DMA_FROM_DEVICE: 4640e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_DATA_IN; 4641e1f7de0cSMatt Gates break; 4642e1f7de0cSMatt Gates case DMA_NONE: 4643e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_NODATAXFER; 4644e1f7de0cSMatt Gates break; 4645e1f7de0cSMatt Gates default: 4646e1f7de0cSMatt Gates dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4647e1f7de0cSMatt Gates cmd->sc_data_direction); 4648e1f7de0cSMatt Gates BUG(); 4649e1f7de0cSMatt Gates break; 4650e1f7de0cSMatt Gates } 4651e1f7de0cSMatt Gates } else { 4652e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_NODATAXFER; 4653e1f7de0cSMatt Gates } 4654e1f7de0cSMatt Gates 4655c349775eSScott Teel c->Header.SGList = use_sg; 4656e1f7de0cSMatt Gates /* Fill out the command structure to submit */ 46572b08b3e9SDon Brace cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF); 46582b08b3e9SDon Brace cp->transfer_len = cpu_to_le32(total_len); 46592b08b3e9SDon Brace cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ | 46602b08b3e9SDon Brace (cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK)); 46612b08b3e9SDon Brace cp->control = cpu_to_le32(control); 4662283b4a9bSStephen M. Cameron memcpy(cp->CDB, cdb, cdb_len); 4663283b4a9bSStephen M. Cameron memcpy(cp->CISS_LUN, scsi3addr, 8); 4664c349775eSScott Teel /* Tag was already set at init time. */ 4665e1f7de0cSMatt Gates enqueue_cmd_and_start_io(h, c); 4666e1f7de0cSMatt Gates return 0; 4667e1f7de0cSMatt Gates } 4668edd16368SStephen M. Cameron 4669283b4a9bSStephen M. Cameron /* 4670283b4a9bSStephen M. Cameron * Queue a command directly to a device behind the controller using the 4671283b4a9bSStephen M. Cameron * I/O accelerator path. 4672283b4a9bSStephen M. Cameron */ 4673283b4a9bSStephen M. Cameron static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h, 4674283b4a9bSStephen M. Cameron struct CommandList *c) 4675283b4a9bSStephen M. Cameron { 4676283b4a9bSStephen M. Cameron struct scsi_cmnd *cmd = c->scsi_cmd; 4677283b4a9bSStephen M. Cameron struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4678283b4a9bSStephen M. Cameron 467903383736SDon Brace c->phys_disk = dev; 468003383736SDon Brace 4681283b4a9bSStephen M. Cameron return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle, 468203383736SDon Brace cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev); 4683283b4a9bSStephen M. Cameron } 4684283b4a9bSStephen M. Cameron 4685dd0e19f3SScott Teel /* 4686dd0e19f3SScott Teel * Set encryption parameters for the ioaccel2 request 4687dd0e19f3SScott Teel */ 4688dd0e19f3SScott Teel static void set_encrypt_ioaccel2(struct ctlr_info *h, 4689dd0e19f3SScott Teel struct CommandList *c, struct io_accel2_cmd *cp) 4690dd0e19f3SScott Teel { 4691dd0e19f3SScott Teel struct scsi_cmnd *cmd = c->scsi_cmd; 4692dd0e19f3SScott Teel struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4693dd0e19f3SScott Teel struct raid_map_data *map = &dev->raid_map; 4694dd0e19f3SScott Teel u64 first_block; 4695dd0e19f3SScott Teel 4696dd0e19f3SScott Teel /* Are we doing encryption on this device */ 46972b08b3e9SDon Brace if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON)) 4698dd0e19f3SScott Teel return; 4699dd0e19f3SScott Teel /* Set the data encryption key index. */ 4700dd0e19f3SScott Teel cp->dekindex = map->dekindex; 4701dd0e19f3SScott Teel 4702dd0e19f3SScott Teel /* Set the encryption enable flag, encoded into direction field. */ 4703dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK; 4704dd0e19f3SScott Teel 4705dd0e19f3SScott Teel /* Set encryption tweak values based on logical block address 4706dd0e19f3SScott Teel * If block size is 512, tweak value is LBA. 4707dd0e19f3SScott Teel * For other block sizes, tweak is (LBA * block size)/ 512) 4708dd0e19f3SScott Teel */ 4709dd0e19f3SScott Teel switch (cmd->cmnd[0]) { 4710dd0e19f3SScott Teel /* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */ 4711dd0e19f3SScott Teel case WRITE_6: 4712dd0e19f3SScott Teel case READ_6: 47132b08b3e9SDon Brace first_block = get_unaligned_be16(&cmd->cmnd[2]); 4714dd0e19f3SScott Teel break; 4715dd0e19f3SScott Teel case WRITE_10: 4716dd0e19f3SScott Teel case READ_10: 4717dd0e19f3SScott Teel /* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */ 4718dd0e19f3SScott Teel case WRITE_12: 4719dd0e19f3SScott Teel case READ_12: 47202b08b3e9SDon Brace first_block = get_unaligned_be32(&cmd->cmnd[2]); 4721dd0e19f3SScott Teel break; 4722dd0e19f3SScott Teel case WRITE_16: 4723dd0e19f3SScott Teel case READ_16: 47242b08b3e9SDon Brace first_block = get_unaligned_be64(&cmd->cmnd[2]); 4725dd0e19f3SScott Teel break; 4726dd0e19f3SScott Teel default: 4727dd0e19f3SScott Teel dev_err(&h->pdev->dev, 47282b08b3e9SDon Brace "ERROR: %s: size (0x%x) not supported for encryption\n", 47292b08b3e9SDon Brace __func__, cmd->cmnd[0]); 4730dd0e19f3SScott Teel BUG(); 4731dd0e19f3SScott Teel break; 4732dd0e19f3SScott Teel } 47332b08b3e9SDon Brace 47342b08b3e9SDon Brace if (le32_to_cpu(map->volume_blk_size) != 512) 47352b08b3e9SDon Brace first_block = first_block * 47362b08b3e9SDon Brace le32_to_cpu(map->volume_blk_size)/512; 47372b08b3e9SDon Brace 47382b08b3e9SDon Brace cp->tweak_lower = cpu_to_le32(first_block); 47392b08b3e9SDon Brace cp->tweak_upper = cpu_to_le32(first_block >> 32); 4740dd0e19f3SScott Teel } 4741dd0e19f3SScott Teel 4742c349775eSScott Teel static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h, 4743c349775eSScott Teel struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 474403383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4745c349775eSScott Teel { 4746c349775eSScott Teel struct scsi_cmnd *cmd = c->scsi_cmd; 4747c349775eSScott Teel struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex]; 4748c349775eSScott Teel struct ioaccel2_sg_element *curr_sg; 4749c349775eSScott Teel int use_sg, i; 4750c349775eSScott Teel struct scatterlist *sg; 4751c349775eSScott Teel u64 addr64; 4752c349775eSScott Teel u32 len; 4753c349775eSScott Teel u32 total_len = 0; 4754c349775eSScott Teel 4755d9a729f3SWebb Scales BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 4756c349775eSScott Teel 475703383736SDon Brace if (fixup_ioaccel_cdb(cdb, &cdb_len)) { 475803383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4759c349775eSScott Teel return IO_ACCEL_INELIGIBLE; 476003383736SDon Brace } 476103383736SDon Brace 4762c349775eSScott Teel c->cmd_type = CMD_IOACCEL2; 4763c349775eSScott Teel /* Adjust the DMA address to point to the accelerated command buffer */ 4764c349775eSScott Teel c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle + 4765c349775eSScott Teel (c->cmdindex * sizeof(*cp)); 4766c349775eSScott Teel BUG_ON(c->busaddr & 0x0000007F); 4767c349775eSScott Teel 4768c349775eSScott Teel memset(cp, 0, sizeof(*cp)); 4769c349775eSScott Teel cp->IU_type = IOACCEL2_IU_TYPE; 4770c349775eSScott Teel 4771c349775eSScott Teel use_sg = scsi_dma_map(cmd); 477203383736SDon Brace if (use_sg < 0) { 477303383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4774c349775eSScott Teel return use_sg; 477503383736SDon Brace } 4776c349775eSScott Teel 4777c349775eSScott Teel if (use_sg) { 4778c349775eSScott Teel curr_sg = cp->sg; 4779d9a729f3SWebb Scales if (use_sg > h->ioaccel_maxsg) { 4780d9a729f3SWebb Scales addr64 = le64_to_cpu( 4781d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list[c->cmdindex]->address); 4782d9a729f3SWebb Scales curr_sg->address = cpu_to_le64(addr64); 4783d9a729f3SWebb Scales curr_sg->length = 0; 4784d9a729f3SWebb Scales curr_sg->reserved[0] = 0; 4785d9a729f3SWebb Scales curr_sg->reserved[1] = 0; 4786d9a729f3SWebb Scales curr_sg->reserved[2] = 0; 4787d9a729f3SWebb Scales curr_sg->chain_indicator = 0x80; 4788d9a729f3SWebb Scales 4789d9a729f3SWebb Scales curr_sg = h->ioaccel2_cmd_sg_list[c->cmdindex]; 4790d9a729f3SWebb Scales } 4791c349775eSScott Teel scsi_for_each_sg(cmd, sg, use_sg, i) { 4792c349775eSScott Teel addr64 = (u64) sg_dma_address(sg); 4793c349775eSScott Teel len = sg_dma_len(sg); 4794c349775eSScott Teel total_len += len; 4795c349775eSScott Teel curr_sg->address = cpu_to_le64(addr64); 4796c349775eSScott Teel curr_sg->length = cpu_to_le32(len); 4797c349775eSScott Teel curr_sg->reserved[0] = 0; 4798c349775eSScott Teel curr_sg->reserved[1] = 0; 4799c349775eSScott Teel curr_sg->reserved[2] = 0; 4800c349775eSScott Teel curr_sg->chain_indicator = 0; 4801c349775eSScott Teel curr_sg++; 4802c349775eSScott Teel } 4803c349775eSScott Teel 4804c349775eSScott Teel switch (cmd->sc_data_direction) { 4805c349775eSScott Teel case DMA_TO_DEVICE: 4806dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4807dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_DATA_OUT; 4808c349775eSScott Teel break; 4809c349775eSScott Teel case DMA_FROM_DEVICE: 4810dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4811dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_DATA_IN; 4812c349775eSScott Teel break; 4813c349775eSScott Teel case DMA_NONE: 4814dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4815dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_NO_DATA; 4816c349775eSScott Teel break; 4817c349775eSScott Teel default: 4818c349775eSScott Teel dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4819c349775eSScott Teel cmd->sc_data_direction); 4820c349775eSScott Teel BUG(); 4821c349775eSScott Teel break; 4822c349775eSScott Teel } 4823c349775eSScott Teel } else { 4824dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4825dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_NO_DATA; 4826c349775eSScott Teel } 4827dd0e19f3SScott Teel 4828dd0e19f3SScott Teel /* Set encryption parameters, if necessary */ 4829dd0e19f3SScott Teel set_encrypt_ioaccel2(h, c, cp); 4830dd0e19f3SScott Teel 48312b08b3e9SDon Brace cp->scsi_nexus = cpu_to_le32(ioaccel_handle); 4832f2405db8SDon Brace cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT); 4833c349775eSScott Teel memcpy(cp->cdb, cdb, sizeof(cp->cdb)); 4834c349775eSScott Teel 4835c349775eSScott Teel cp->data_len = cpu_to_le32(total_len); 4836c349775eSScott Teel cp->err_ptr = cpu_to_le64(c->busaddr + 4837c349775eSScott Teel offsetof(struct io_accel2_cmd, error_data)); 483850a0decfSStephen M. Cameron cp->err_len = cpu_to_le32(sizeof(cp->error_data)); 4839c349775eSScott Teel 4840d9a729f3SWebb Scales /* fill in sg elements */ 4841d9a729f3SWebb Scales if (use_sg > h->ioaccel_maxsg) { 4842d9a729f3SWebb Scales cp->sg_count = 1; 4843a736e9b6SDon Brace cp->sg[0].length = cpu_to_le32(use_sg * sizeof(cp->sg[0])); 4844d9a729f3SWebb Scales if (hpsa_map_ioaccel2_sg_chain_block(h, cp, c)) { 4845d9a729f3SWebb Scales atomic_dec(&phys_disk->ioaccel_cmds_out); 4846d9a729f3SWebb Scales scsi_dma_unmap(cmd); 4847d9a729f3SWebb Scales return -1; 4848d9a729f3SWebb Scales } 4849d9a729f3SWebb Scales } else 4850d9a729f3SWebb Scales cp->sg_count = (u8) use_sg; 4851d9a729f3SWebb Scales 4852c349775eSScott Teel enqueue_cmd_and_start_io(h, c); 4853c349775eSScott Teel return 0; 4854c349775eSScott Teel } 4855c349775eSScott Teel 4856c349775eSScott Teel /* 4857c349775eSScott Teel * Queue a command to the correct I/O accelerator path. 4858c349775eSScott Teel */ 4859c349775eSScott Teel static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h, 4860c349775eSScott Teel struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 486103383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4862c349775eSScott Teel { 486303383736SDon Brace /* Try to honor the device's queue depth */ 486403383736SDon Brace if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) > 486503383736SDon Brace phys_disk->queue_depth) { 486603383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 486703383736SDon Brace return IO_ACCEL_INELIGIBLE; 486803383736SDon Brace } 4869c349775eSScott Teel if (h->transMethod & CFGTBL_Trans_io_accel1) 4870c349775eSScott Teel return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle, 487103383736SDon Brace cdb, cdb_len, scsi3addr, 487203383736SDon Brace phys_disk); 4873c349775eSScott Teel else 4874c349775eSScott Teel return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle, 487503383736SDon Brace cdb, cdb_len, scsi3addr, 487603383736SDon Brace phys_disk); 4877c349775eSScott Teel } 4878c349775eSScott Teel 48796b80b18fSScott Teel static void raid_map_helper(struct raid_map_data *map, 48806b80b18fSScott Teel int offload_to_mirror, u32 *map_index, u32 *current_group) 48816b80b18fSScott Teel { 48826b80b18fSScott Teel if (offload_to_mirror == 0) { 48836b80b18fSScott Teel /* use physical disk in the first mirrored group. */ 48842b08b3e9SDon Brace *map_index %= le16_to_cpu(map->data_disks_per_row); 48856b80b18fSScott Teel return; 48866b80b18fSScott Teel } 48876b80b18fSScott Teel do { 48886b80b18fSScott Teel /* determine mirror group that *map_index indicates */ 48892b08b3e9SDon Brace *current_group = *map_index / 48902b08b3e9SDon Brace le16_to_cpu(map->data_disks_per_row); 48916b80b18fSScott Teel if (offload_to_mirror == *current_group) 48926b80b18fSScott Teel continue; 48932b08b3e9SDon Brace if (*current_group < le16_to_cpu(map->layout_map_count) - 1) { 48946b80b18fSScott Teel /* select map index from next group */ 48952b08b3e9SDon Brace *map_index += le16_to_cpu(map->data_disks_per_row); 48966b80b18fSScott Teel (*current_group)++; 48976b80b18fSScott Teel } else { 48986b80b18fSScott Teel /* select map index from first group */ 48992b08b3e9SDon Brace *map_index %= le16_to_cpu(map->data_disks_per_row); 49006b80b18fSScott Teel *current_group = 0; 49016b80b18fSScott Teel } 49026b80b18fSScott Teel } while (offload_to_mirror != *current_group); 49036b80b18fSScott Teel } 49046b80b18fSScott Teel 4905283b4a9bSStephen M. Cameron /* 4906283b4a9bSStephen M. Cameron * Attempt to perform offload RAID mapping for a logical volume I/O. 4907283b4a9bSStephen M. Cameron */ 4908283b4a9bSStephen M. Cameron static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h, 4909283b4a9bSStephen M. Cameron struct CommandList *c) 4910283b4a9bSStephen M. Cameron { 4911283b4a9bSStephen M. Cameron struct scsi_cmnd *cmd = c->scsi_cmd; 4912283b4a9bSStephen M. Cameron struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4913283b4a9bSStephen M. Cameron struct raid_map_data *map = &dev->raid_map; 4914283b4a9bSStephen M. Cameron struct raid_map_disk_data *dd = &map->data[0]; 4915283b4a9bSStephen M. Cameron int is_write = 0; 4916283b4a9bSStephen M. Cameron u32 map_index; 4917283b4a9bSStephen M. Cameron u64 first_block, last_block; 4918283b4a9bSStephen M. Cameron u32 block_cnt; 4919283b4a9bSStephen M. Cameron u32 blocks_per_row; 4920283b4a9bSStephen M. Cameron u64 first_row, last_row; 4921283b4a9bSStephen M. Cameron u32 first_row_offset, last_row_offset; 4922283b4a9bSStephen M. Cameron u32 first_column, last_column; 49236b80b18fSScott Teel u64 r0_first_row, r0_last_row; 49246b80b18fSScott Teel u32 r5or6_blocks_per_row; 49256b80b18fSScott Teel u64 r5or6_first_row, r5or6_last_row; 49266b80b18fSScott Teel u32 r5or6_first_row_offset, r5or6_last_row_offset; 49276b80b18fSScott Teel u32 r5or6_first_column, r5or6_last_column; 49286b80b18fSScott Teel u32 total_disks_per_row; 49296b80b18fSScott Teel u32 stripesize; 49306b80b18fSScott Teel u32 first_group, last_group, current_group; 4931283b4a9bSStephen M. Cameron u32 map_row; 4932283b4a9bSStephen M. Cameron u32 disk_handle; 4933283b4a9bSStephen M. Cameron u64 disk_block; 4934283b4a9bSStephen M. Cameron u32 disk_block_cnt; 4935283b4a9bSStephen M. Cameron u8 cdb[16]; 4936283b4a9bSStephen M. Cameron u8 cdb_len; 49372b08b3e9SDon Brace u16 strip_size; 4938283b4a9bSStephen M. Cameron #if BITS_PER_LONG == 32 4939283b4a9bSStephen M. Cameron u64 tmpdiv; 4940283b4a9bSStephen M. Cameron #endif 49416b80b18fSScott Teel int offload_to_mirror; 4942283b4a9bSStephen M. Cameron 4943283b4a9bSStephen M. Cameron /* check for valid opcode, get LBA and block count */ 4944283b4a9bSStephen M. Cameron switch (cmd->cmnd[0]) { 4945283b4a9bSStephen M. Cameron case WRITE_6: 4946283b4a9bSStephen M. Cameron is_write = 1; 4947283b4a9bSStephen M. Cameron case READ_6: 4948c8a6c9a6SDon Brace first_block = get_unaligned_be16(&cmd->cmnd[2]); 4949283b4a9bSStephen M. Cameron block_cnt = cmd->cmnd[4]; 49503fa89a04SStephen M. Cameron if (block_cnt == 0) 49513fa89a04SStephen M. Cameron block_cnt = 256; 4952283b4a9bSStephen M. Cameron break; 4953283b4a9bSStephen M. Cameron case WRITE_10: 4954283b4a9bSStephen M. Cameron is_write = 1; 4955283b4a9bSStephen M. Cameron case READ_10: 4956283b4a9bSStephen M. Cameron first_block = 4957283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[2]) << 24) | 4958283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[3]) << 16) | 4959283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[4]) << 8) | 4960283b4a9bSStephen M. Cameron cmd->cmnd[5]; 4961283b4a9bSStephen M. Cameron block_cnt = 4962283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[7]) << 8) | 4963283b4a9bSStephen M. Cameron cmd->cmnd[8]; 4964283b4a9bSStephen M. Cameron break; 4965283b4a9bSStephen M. Cameron case WRITE_12: 4966283b4a9bSStephen M. Cameron is_write = 1; 4967283b4a9bSStephen M. Cameron case READ_12: 4968283b4a9bSStephen M. Cameron first_block = 4969283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[2]) << 24) | 4970283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[3]) << 16) | 4971283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[4]) << 8) | 4972283b4a9bSStephen M. Cameron cmd->cmnd[5]; 4973283b4a9bSStephen M. Cameron block_cnt = 4974283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[6]) << 24) | 4975283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[7]) << 16) | 4976283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[8]) << 8) | 4977283b4a9bSStephen M. Cameron cmd->cmnd[9]; 4978283b4a9bSStephen M. Cameron break; 4979283b4a9bSStephen M. Cameron case WRITE_16: 4980283b4a9bSStephen M. Cameron is_write = 1; 4981283b4a9bSStephen M. Cameron case READ_16: 4982283b4a9bSStephen M. Cameron first_block = 4983283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[2]) << 56) | 4984283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[3]) << 48) | 4985283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[4]) << 40) | 4986283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[5]) << 32) | 4987283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[6]) << 24) | 4988283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[7]) << 16) | 4989283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[8]) << 8) | 4990283b4a9bSStephen M. Cameron cmd->cmnd[9]; 4991283b4a9bSStephen M. Cameron block_cnt = 4992283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[10]) << 24) | 4993283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[11]) << 16) | 4994283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[12]) << 8) | 4995283b4a9bSStephen M. Cameron cmd->cmnd[13]; 4996283b4a9bSStephen M. Cameron break; 4997283b4a9bSStephen M. Cameron default: 4998283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */ 4999283b4a9bSStephen M. Cameron } 5000283b4a9bSStephen M. Cameron last_block = first_block + block_cnt - 1; 5001283b4a9bSStephen M. Cameron 5002283b4a9bSStephen M. Cameron /* check for write to non-RAID-0 */ 5003283b4a9bSStephen M. Cameron if (is_write && dev->raid_level != 0) 5004283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 5005283b4a9bSStephen M. Cameron 5006283b4a9bSStephen M. Cameron /* check for invalid block or wraparound */ 50072b08b3e9SDon Brace if (last_block >= le64_to_cpu(map->volume_blk_cnt) || 50082b08b3e9SDon Brace last_block < first_block) 5009283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 5010283b4a9bSStephen M. Cameron 5011283b4a9bSStephen M. Cameron /* calculate stripe information for the request */ 50122b08b3e9SDon Brace blocks_per_row = le16_to_cpu(map->data_disks_per_row) * 50132b08b3e9SDon Brace le16_to_cpu(map->strip_size); 50142b08b3e9SDon Brace strip_size = le16_to_cpu(map->strip_size); 5015283b4a9bSStephen M. Cameron #if BITS_PER_LONG == 32 5016283b4a9bSStephen M. Cameron tmpdiv = first_block; 5017283b4a9bSStephen M. Cameron (void) do_div(tmpdiv, blocks_per_row); 5018283b4a9bSStephen M. Cameron first_row = tmpdiv; 5019283b4a9bSStephen M. Cameron tmpdiv = last_block; 5020283b4a9bSStephen M. Cameron (void) do_div(tmpdiv, blocks_per_row); 5021283b4a9bSStephen M. Cameron last_row = tmpdiv; 5022283b4a9bSStephen M. Cameron first_row_offset = (u32) (first_block - (first_row * blocks_per_row)); 5023283b4a9bSStephen M. Cameron last_row_offset = (u32) (last_block - (last_row * blocks_per_row)); 5024283b4a9bSStephen M. Cameron tmpdiv = first_row_offset; 50252b08b3e9SDon Brace (void) do_div(tmpdiv, strip_size); 5026283b4a9bSStephen M. Cameron first_column = tmpdiv; 5027283b4a9bSStephen M. Cameron tmpdiv = last_row_offset; 50282b08b3e9SDon Brace (void) do_div(tmpdiv, strip_size); 5029283b4a9bSStephen M. Cameron last_column = tmpdiv; 5030283b4a9bSStephen M. Cameron #else 5031283b4a9bSStephen M. Cameron first_row = first_block / blocks_per_row; 5032283b4a9bSStephen M. Cameron last_row = last_block / blocks_per_row; 5033283b4a9bSStephen M. Cameron first_row_offset = (u32) (first_block - (first_row * blocks_per_row)); 5034283b4a9bSStephen M. Cameron last_row_offset = (u32) (last_block - (last_row * blocks_per_row)); 50352b08b3e9SDon Brace first_column = first_row_offset / strip_size; 50362b08b3e9SDon Brace last_column = last_row_offset / strip_size; 5037283b4a9bSStephen M. Cameron #endif 5038283b4a9bSStephen M. Cameron 5039283b4a9bSStephen M. Cameron /* if this isn't a single row/column then give to the controller */ 5040283b4a9bSStephen M. Cameron if ((first_row != last_row) || (first_column != last_column)) 5041283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 5042283b4a9bSStephen M. Cameron 5043283b4a9bSStephen M. Cameron /* proceeding with driver mapping */ 50442b08b3e9SDon Brace total_disks_per_row = le16_to_cpu(map->data_disks_per_row) + 50452b08b3e9SDon Brace le16_to_cpu(map->metadata_disks_per_row); 5046283b4a9bSStephen M. Cameron map_row = ((u32)(first_row >> map->parity_rotation_shift)) % 50472b08b3e9SDon Brace le16_to_cpu(map->row_cnt); 50486b80b18fSScott Teel map_index = (map_row * total_disks_per_row) + first_column; 50496b80b18fSScott Teel 50506b80b18fSScott Teel switch (dev->raid_level) { 50516b80b18fSScott Teel case HPSA_RAID_0: 50526b80b18fSScott Teel break; /* nothing special to do */ 50536b80b18fSScott Teel case HPSA_RAID_1: 50546b80b18fSScott Teel /* Handles load balance across RAID 1 members. 50556b80b18fSScott Teel * (2-drive R1 and R10 with even # of drives.) 50566b80b18fSScott Teel * Appropriate for SSDs, not optimal for HDDs 5057283b4a9bSStephen M. Cameron */ 50582b08b3e9SDon Brace BUG_ON(le16_to_cpu(map->layout_map_count) != 2); 5059283b4a9bSStephen M. Cameron if (dev->offload_to_mirror) 50602b08b3e9SDon Brace map_index += le16_to_cpu(map->data_disks_per_row); 5061283b4a9bSStephen M. Cameron dev->offload_to_mirror = !dev->offload_to_mirror; 50626b80b18fSScott Teel break; 50636b80b18fSScott Teel case HPSA_RAID_ADM: 50646b80b18fSScott Teel /* Handles N-way mirrors (R1-ADM) 50656b80b18fSScott Teel * and R10 with # of drives divisible by 3.) 50666b80b18fSScott Teel */ 50672b08b3e9SDon Brace BUG_ON(le16_to_cpu(map->layout_map_count) != 3); 50686b80b18fSScott Teel 50696b80b18fSScott Teel offload_to_mirror = dev->offload_to_mirror; 50706b80b18fSScott Teel raid_map_helper(map, offload_to_mirror, 50716b80b18fSScott Teel &map_index, ¤t_group); 50726b80b18fSScott Teel /* set mirror group to use next time */ 50736b80b18fSScott Teel offload_to_mirror = 50742b08b3e9SDon Brace (offload_to_mirror >= 50752b08b3e9SDon Brace le16_to_cpu(map->layout_map_count) - 1) 50766b80b18fSScott Teel ? 0 : offload_to_mirror + 1; 50776b80b18fSScott Teel dev->offload_to_mirror = offload_to_mirror; 50786b80b18fSScott Teel /* Avoid direct use of dev->offload_to_mirror within this 50796b80b18fSScott Teel * function since multiple threads might simultaneously 50806b80b18fSScott Teel * increment it beyond the range of dev->layout_map_count -1. 50816b80b18fSScott Teel */ 50826b80b18fSScott Teel break; 50836b80b18fSScott Teel case HPSA_RAID_5: 50846b80b18fSScott Teel case HPSA_RAID_6: 50852b08b3e9SDon Brace if (le16_to_cpu(map->layout_map_count) <= 1) 50866b80b18fSScott Teel break; 50876b80b18fSScott Teel 50886b80b18fSScott Teel /* Verify first and last block are in same RAID group */ 50896b80b18fSScott Teel r5or6_blocks_per_row = 50902b08b3e9SDon Brace le16_to_cpu(map->strip_size) * 50912b08b3e9SDon Brace le16_to_cpu(map->data_disks_per_row); 50926b80b18fSScott Teel BUG_ON(r5or6_blocks_per_row == 0); 50932b08b3e9SDon Brace stripesize = r5or6_blocks_per_row * 50942b08b3e9SDon Brace le16_to_cpu(map->layout_map_count); 50956b80b18fSScott Teel #if BITS_PER_LONG == 32 50966b80b18fSScott Teel tmpdiv = first_block; 50976b80b18fSScott Teel first_group = do_div(tmpdiv, stripesize); 50986b80b18fSScott Teel tmpdiv = first_group; 50996b80b18fSScott Teel (void) do_div(tmpdiv, r5or6_blocks_per_row); 51006b80b18fSScott Teel first_group = tmpdiv; 51016b80b18fSScott Teel tmpdiv = last_block; 51026b80b18fSScott Teel last_group = do_div(tmpdiv, stripesize); 51036b80b18fSScott Teel tmpdiv = last_group; 51046b80b18fSScott Teel (void) do_div(tmpdiv, r5or6_blocks_per_row); 51056b80b18fSScott Teel last_group = tmpdiv; 51066b80b18fSScott Teel #else 51076b80b18fSScott Teel first_group = (first_block % stripesize) / r5or6_blocks_per_row; 51086b80b18fSScott Teel last_group = (last_block % stripesize) / r5or6_blocks_per_row; 51096b80b18fSScott Teel #endif 5110000ff7c2SStephen M. Cameron if (first_group != last_group) 51116b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 51126b80b18fSScott Teel 51136b80b18fSScott Teel /* Verify request is in a single row of RAID 5/6 */ 51146b80b18fSScott Teel #if BITS_PER_LONG == 32 51156b80b18fSScott Teel tmpdiv = first_block; 51166b80b18fSScott Teel (void) do_div(tmpdiv, stripesize); 51176b80b18fSScott Teel first_row = r5or6_first_row = r0_first_row = tmpdiv; 51186b80b18fSScott Teel tmpdiv = last_block; 51196b80b18fSScott Teel (void) do_div(tmpdiv, stripesize); 51206b80b18fSScott Teel r5or6_last_row = r0_last_row = tmpdiv; 51216b80b18fSScott Teel #else 51226b80b18fSScott Teel first_row = r5or6_first_row = r0_first_row = 51236b80b18fSScott Teel first_block / stripesize; 51246b80b18fSScott Teel r5or6_last_row = r0_last_row = last_block / stripesize; 51256b80b18fSScott Teel #endif 51266b80b18fSScott Teel if (r5or6_first_row != r5or6_last_row) 51276b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 51286b80b18fSScott Teel 51296b80b18fSScott Teel 51306b80b18fSScott Teel /* Verify request is in a single column */ 51316b80b18fSScott Teel #if BITS_PER_LONG == 32 51326b80b18fSScott Teel tmpdiv = first_block; 51336b80b18fSScott Teel first_row_offset = do_div(tmpdiv, stripesize); 51346b80b18fSScott Teel tmpdiv = first_row_offset; 51356b80b18fSScott Teel first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row); 51366b80b18fSScott Teel r5or6_first_row_offset = first_row_offset; 51376b80b18fSScott Teel tmpdiv = last_block; 51386b80b18fSScott Teel r5or6_last_row_offset = do_div(tmpdiv, stripesize); 51396b80b18fSScott Teel tmpdiv = r5or6_last_row_offset; 51406b80b18fSScott Teel r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row); 51416b80b18fSScott Teel tmpdiv = r5or6_first_row_offset; 51426b80b18fSScott Teel (void) do_div(tmpdiv, map->strip_size); 51436b80b18fSScott Teel first_column = r5or6_first_column = tmpdiv; 51446b80b18fSScott Teel tmpdiv = r5or6_last_row_offset; 51456b80b18fSScott Teel (void) do_div(tmpdiv, map->strip_size); 51466b80b18fSScott Teel r5or6_last_column = tmpdiv; 51476b80b18fSScott Teel #else 51486b80b18fSScott Teel first_row_offset = r5or6_first_row_offset = 51496b80b18fSScott Teel (u32)((first_block % stripesize) % 51506b80b18fSScott Teel r5or6_blocks_per_row); 51516b80b18fSScott Teel 51526b80b18fSScott Teel r5or6_last_row_offset = 51536b80b18fSScott Teel (u32)((last_block % stripesize) % 51546b80b18fSScott Teel r5or6_blocks_per_row); 51556b80b18fSScott Teel 51566b80b18fSScott Teel first_column = r5or6_first_column = 51572b08b3e9SDon Brace r5or6_first_row_offset / le16_to_cpu(map->strip_size); 51586b80b18fSScott Teel r5or6_last_column = 51592b08b3e9SDon Brace r5or6_last_row_offset / le16_to_cpu(map->strip_size); 51606b80b18fSScott Teel #endif 51616b80b18fSScott Teel if (r5or6_first_column != r5or6_last_column) 51626b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 51636b80b18fSScott Teel 51646b80b18fSScott Teel /* Request is eligible */ 51656b80b18fSScott Teel map_row = ((u32)(first_row >> map->parity_rotation_shift)) % 51662b08b3e9SDon Brace le16_to_cpu(map->row_cnt); 51676b80b18fSScott Teel 51686b80b18fSScott Teel map_index = (first_group * 51692b08b3e9SDon Brace (le16_to_cpu(map->row_cnt) * total_disks_per_row)) + 51706b80b18fSScott Teel (map_row * total_disks_per_row) + first_column; 51716b80b18fSScott Teel break; 51726b80b18fSScott Teel default: 51736b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 5174283b4a9bSStephen M. Cameron } 51756b80b18fSScott Teel 517607543e0cSStephen Cameron if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES)) 517707543e0cSStephen Cameron return IO_ACCEL_INELIGIBLE; 517807543e0cSStephen Cameron 517903383736SDon Brace c->phys_disk = dev->phys_disk[map_index]; 5180c3390df4SDon Brace if (!c->phys_disk) 5181c3390df4SDon Brace return IO_ACCEL_INELIGIBLE; 518203383736SDon Brace 5183283b4a9bSStephen M. Cameron disk_handle = dd[map_index].ioaccel_handle; 51842b08b3e9SDon Brace disk_block = le64_to_cpu(map->disk_starting_blk) + 51852b08b3e9SDon Brace first_row * le16_to_cpu(map->strip_size) + 51862b08b3e9SDon Brace (first_row_offset - first_column * 51872b08b3e9SDon Brace le16_to_cpu(map->strip_size)); 5188283b4a9bSStephen M. Cameron disk_block_cnt = block_cnt; 5189283b4a9bSStephen M. Cameron 5190283b4a9bSStephen M. Cameron /* handle differing logical/physical block sizes */ 5191283b4a9bSStephen M. Cameron if (map->phys_blk_shift) { 5192283b4a9bSStephen M. Cameron disk_block <<= map->phys_blk_shift; 5193283b4a9bSStephen M. Cameron disk_block_cnt <<= map->phys_blk_shift; 5194283b4a9bSStephen M. Cameron } 5195283b4a9bSStephen M. Cameron BUG_ON(disk_block_cnt > 0xffff); 5196283b4a9bSStephen M. Cameron 5197283b4a9bSStephen M. Cameron /* build the new CDB for the physical disk I/O */ 5198283b4a9bSStephen M. Cameron if (disk_block > 0xffffffff) { 5199283b4a9bSStephen M. Cameron cdb[0] = is_write ? WRITE_16 : READ_16; 5200283b4a9bSStephen M. Cameron cdb[1] = 0; 5201283b4a9bSStephen M. Cameron cdb[2] = (u8) (disk_block >> 56); 5202283b4a9bSStephen M. Cameron cdb[3] = (u8) (disk_block >> 48); 5203283b4a9bSStephen M. Cameron cdb[4] = (u8) (disk_block >> 40); 5204283b4a9bSStephen M. Cameron cdb[5] = (u8) (disk_block >> 32); 5205283b4a9bSStephen M. Cameron cdb[6] = (u8) (disk_block >> 24); 5206283b4a9bSStephen M. Cameron cdb[7] = (u8) (disk_block >> 16); 5207283b4a9bSStephen M. Cameron cdb[8] = (u8) (disk_block >> 8); 5208283b4a9bSStephen M. Cameron cdb[9] = (u8) (disk_block); 5209283b4a9bSStephen M. Cameron cdb[10] = (u8) (disk_block_cnt >> 24); 5210283b4a9bSStephen M. Cameron cdb[11] = (u8) (disk_block_cnt >> 16); 5211283b4a9bSStephen M. Cameron cdb[12] = (u8) (disk_block_cnt >> 8); 5212283b4a9bSStephen M. Cameron cdb[13] = (u8) (disk_block_cnt); 5213283b4a9bSStephen M. Cameron cdb[14] = 0; 5214283b4a9bSStephen M. Cameron cdb[15] = 0; 5215283b4a9bSStephen M. Cameron cdb_len = 16; 5216283b4a9bSStephen M. Cameron } else { 5217283b4a9bSStephen M. Cameron cdb[0] = is_write ? WRITE_10 : READ_10; 5218283b4a9bSStephen M. Cameron cdb[1] = 0; 5219283b4a9bSStephen M. Cameron cdb[2] = (u8) (disk_block >> 24); 5220283b4a9bSStephen M. Cameron cdb[3] = (u8) (disk_block >> 16); 5221283b4a9bSStephen M. Cameron cdb[4] = (u8) (disk_block >> 8); 5222283b4a9bSStephen M. Cameron cdb[5] = (u8) (disk_block); 5223283b4a9bSStephen M. Cameron cdb[6] = 0; 5224283b4a9bSStephen M. Cameron cdb[7] = (u8) (disk_block_cnt >> 8); 5225283b4a9bSStephen M. Cameron cdb[8] = (u8) (disk_block_cnt); 5226283b4a9bSStephen M. Cameron cdb[9] = 0; 5227283b4a9bSStephen M. Cameron cdb_len = 10; 5228283b4a9bSStephen M. Cameron } 5229283b4a9bSStephen M. Cameron return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len, 523003383736SDon Brace dev->scsi3addr, 523103383736SDon Brace dev->phys_disk[map_index]); 5232283b4a9bSStephen M. Cameron } 5233283b4a9bSStephen M. Cameron 523425163bd5SWebb Scales /* 523525163bd5SWebb Scales * Submit commands down the "normal" RAID stack path 523625163bd5SWebb Scales * All callers to hpsa_ciss_submit must check lockup_detected 523725163bd5SWebb Scales * beforehand, before (opt.) and after calling cmd_alloc 523825163bd5SWebb Scales */ 5239574f05d3SStephen Cameron static int hpsa_ciss_submit(struct ctlr_info *h, 5240574f05d3SStephen Cameron struct CommandList *c, struct scsi_cmnd *cmd, 5241574f05d3SStephen Cameron unsigned char scsi3addr[]) 5242edd16368SStephen M. Cameron { 5243edd16368SStephen M. Cameron cmd->host_scribble = (unsigned char *) c; 5244edd16368SStephen M. Cameron c->cmd_type = CMD_SCSI; 5245edd16368SStephen M. Cameron c->scsi_cmd = cmd; 5246edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; /* unused in simple mode */ 5247edd16368SStephen M. Cameron memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8); 5248f2405db8SDon Brace c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT)); 5249edd16368SStephen M. Cameron 5250edd16368SStephen M. Cameron /* Fill in the request block... */ 5251edd16368SStephen M. Cameron 5252edd16368SStephen M. Cameron c->Request.Timeout = 0; 5253edd16368SStephen M. Cameron BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB)); 5254edd16368SStephen M. Cameron c->Request.CDBLen = cmd->cmd_len; 5255edd16368SStephen M. Cameron memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len); 5256edd16368SStephen M. Cameron switch (cmd->sc_data_direction) { 5257edd16368SStephen M. Cameron case DMA_TO_DEVICE: 5258a505b86fSStephen M. Cameron c->Request.type_attr_dir = 5259a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE); 5260edd16368SStephen M. Cameron break; 5261edd16368SStephen M. Cameron case DMA_FROM_DEVICE: 5262a505b86fSStephen M. Cameron c->Request.type_attr_dir = 5263a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ); 5264edd16368SStephen M. Cameron break; 5265edd16368SStephen M. Cameron case DMA_NONE: 5266a505b86fSStephen M. Cameron c->Request.type_attr_dir = 5267a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE); 5268edd16368SStephen M. Cameron break; 5269edd16368SStephen M. Cameron case DMA_BIDIRECTIONAL: 5270edd16368SStephen M. Cameron /* This can happen if a buggy application does a scsi passthru 5271edd16368SStephen M. Cameron * and sets both inlen and outlen to non-zero. ( see 5272edd16368SStephen M. Cameron * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() ) 5273edd16368SStephen M. Cameron */ 5274edd16368SStephen M. Cameron 5275a505b86fSStephen M. Cameron c->Request.type_attr_dir = 5276a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD); 5277edd16368SStephen M. Cameron /* This is technically wrong, and hpsa controllers should 5278edd16368SStephen M. Cameron * reject it with CMD_INVALID, which is the most correct 5279edd16368SStephen M. Cameron * response, but non-fibre backends appear to let it 5280edd16368SStephen M. Cameron * slide by, and give the same results as if this field 5281edd16368SStephen M. Cameron * were set correctly. Either way is acceptable for 5282edd16368SStephen M. Cameron * our purposes here. 5283edd16368SStephen M. Cameron */ 5284edd16368SStephen M. Cameron 5285edd16368SStephen M. Cameron break; 5286edd16368SStephen M. Cameron 5287edd16368SStephen M. Cameron default: 5288edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "unknown data direction: %d\n", 5289edd16368SStephen M. Cameron cmd->sc_data_direction); 5290edd16368SStephen M. Cameron BUG(); 5291edd16368SStephen M. Cameron break; 5292edd16368SStephen M. Cameron } 5293edd16368SStephen M. Cameron 529433a2ffceSStephen M. Cameron if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */ 529573153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 5296edd16368SStephen M. Cameron return SCSI_MLQUEUE_HOST_BUSY; 5297edd16368SStephen M. Cameron } 5298edd16368SStephen M. Cameron enqueue_cmd_and_start_io(h, c); 5299edd16368SStephen M. Cameron /* the cmd'll come back via intr handler in complete_scsi_command() */ 5300edd16368SStephen M. Cameron return 0; 5301edd16368SStephen M. Cameron } 5302edd16368SStephen M. Cameron 5303360c73bdSStephen Cameron static void hpsa_cmd_init(struct ctlr_info *h, int index, 5304360c73bdSStephen Cameron struct CommandList *c) 5305360c73bdSStephen Cameron { 5306360c73bdSStephen Cameron dma_addr_t cmd_dma_handle, err_dma_handle; 5307360c73bdSStephen Cameron 5308360c73bdSStephen Cameron /* Zero out all of commandlist except the last field, refcount */ 5309360c73bdSStephen Cameron memset(c, 0, offsetof(struct CommandList, refcount)); 5310360c73bdSStephen Cameron c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT)); 5311360c73bdSStephen Cameron cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c); 5312360c73bdSStephen Cameron c->err_info = h->errinfo_pool + index; 5313360c73bdSStephen Cameron memset(c->err_info, 0, sizeof(*c->err_info)); 5314360c73bdSStephen Cameron err_dma_handle = h->errinfo_pool_dhandle 5315360c73bdSStephen Cameron + index * sizeof(*c->err_info); 5316360c73bdSStephen Cameron c->cmdindex = index; 5317360c73bdSStephen Cameron c->busaddr = (u32) cmd_dma_handle; 5318360c73bdSStephen Cameron c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle); 5319360c73bdSStephen Cameron c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info)); 5320360c73bdSStephen Cameron c->h = h; 5321a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_IDLE; 5322360c73bdSStephen Cameron } 5323360c73bdSStephen Cameron 5324360c73bdSStephen Cameron static void hpsa_preinitialize_commands(struct ctlr_info *h) 5325360c73bdSStephen Cameron { 5326360c73bdSStephen Cameron int i; 5327360c73bdSStephen Cameron 5328360c73bdSStephen Cameron for (i = 0; i < h->nr_cmds; i++) { 5329360c73bdSStephen Cameron struct CommandList *c = h->cmd_pool + i; 5330360c73bdSStephen Cameron 5331360c73bdSStephen Cameron hpsa_cmd_init(h, i, c); 5332360c73bdSStephen Cameron atomic_set(&c->refcount, 0); 5333360c73bdSStephen Cameron } 5334360c73bdSStephen Cameron } 5335360c73bdSStephen Cameron 5336360c73bdSStephen Cameron static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index, 5337360c73bdSStephen Cameron struct CommandList *c) 5338360c73bdSStephen Cameron { 5339360c73bdSStephen Cameron dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c); 5340360c73bdSStephen Cameron 534173153fe5SWebb Scales BUG_ON(c->cmdindex != index); 534273153fe5SWebb Scales 5343360c73bdSStephen Cameron memset(c->Request.CDB, 0, sizeof(c->Request.CDB)); 5344360c73bdSStephen Cameron memset(c->err_info, 0, sizeof(*c->err_info)); 5345360c73bdSStephen Cameron c->busaddr = (u32) cmd_dma_handle; 5346360c73bdSStephen Cameron } 5347360c73bdSStephen Cameron 5348592a0ad5SWebb Scales static int hpsa_ioaccel_submit(struct ctlr_info *h, 5349592a0ad5SWebb Scales struct CommandList *c, struct scsi_cmnd *cmd, 5350592a0ad5SWebb Scales unsigned char *scsi3addr) 5351592a0ad5SWebb Scales { 5352592a0ad5SWebb Scales struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 5353592a0ad5SWebb Scales int rc = IO_ACCEL_INELIGIBLE; 5354592a0ad5SWebb Scales 5355592a0ad5SWebb Scales cmd->host_scribble = (unsigned char *) c; 5356592a0ad5SWebb Scales 5357592a0ad5SWebb Scales if (dev->offload_enabled) { 5358592a0ad5SWebb Scales hpsa_cmd_init(h, c->cmdindex, c); 5359592a0ad5SWebb Scales c->cmd_type = CMD_SCSI; 5360592a0ad5SWebb Scales c->scsi_cmd = cmd; 5361592a0ad5SWebb Scales rc = hpsa_scsi_ioaccel_raid_map(h, c); 5362592a0ad5SWebb Scales if (rc < 0) /* scsi_dma_map failed. */ 5363592a0ad5SWebb Scales rc = SCSI_MLQUEUE_HOST_BUSY; 5364a3144e0bSJoe Handzik } else if (dev->hba_ioaccel_enabled) { 5365592a0ad5SWebb Scales hpsa_cmd_init(h, c->cmdindex, c); 5366592a0ad5SWebb Scales c->cmd_type = CMD_SCSI; 5367592a0ad5SWebb Scales c->scsi_cmd = cmd; 5368592a0ad5SWebb Scales rc = hpsa_scsi_ioaccel_direct_map(h, c); 5369592a0ad5SWebb Scales if (rc < 0) /* scsi_dma_map failed. */ 5370592a0ad5SWebb Scales rc = SCSI_MLQUEUE_HOST_BUSY; 5371592a0ad5SWebb Scales } 5372592a0ad5SWebb Scales return rc; 5373592a0ad5SWebb Scales } 5374592a0ad5SWebb Scales 5375080ef1ccSDon Brace static void hpsa_command_resubmit_worker(struct work_struct *work) 5376080ef1ccSDon Brace { 5377080ef1ccSDon Brace struct scsi_cmnd *cmd; 5378080ef1ccSDon Brace struct hpsa_scsi_dev_t *dev; 53798a0ff92cSWebb Scales struct CommandList *c = container_of(work, struct CommandList, work); 5380080ef1ccSDon Brace 5381080ef1ccSDon Brace cmd = c->scsi_cmd; 5382080ef1ccSDon Brace dev = cmd->device->hostdata; 5383080ef1ccSDon Brace if (!dev) { 5384080ef1ccSDon Brace cmd->result = DID_NO_CONNECT << 16; 53858a0ff92cSWebb Scales return hpsa_cmd_free_and_done(c->h, c, cmd); 5386080ef1ccSDon Brace } 5387d604f533SWebb Scales if (c->reset_pending) 5388d604f533SWebb Scales return hpsa_cmd_resolve_and_free(c->h, c); 5389a58e7e53SWebb Scales if (c->abort_pending) 5390a58e7e53SWebb Scales return hpsa_cmd_abort_and_free(c->h, c, cmd); 5391592a0ad5SWebb Scales if (c->cmd_type == CMD_IOACCEL2) { 5392592a0ad5SWebb Scales struct ctlr_info *h = c->h; 5393592a0ad5SWebb Scales struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 5394592a0ad5SWebb Scales int rc; 5395592a0ad5SWebb Scales 5396592a0ad5SWebb Scales if (c2->error_data.serv_response == 5397592a0ad5SWebb Scales IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL) { 5398592a0ad5SWebb Scales rc = hpsa_ioaccel_submit(h, c, cmd, dev->scsi3addr); 5399592a0ad5SWebb Scales if (rc == 0) 5400592a0ad5SWebb Scales return; 5401592a0ad5SWebb Scales if (rc == SCSI_MLQUEUE_HOST_BUSY) { 5402592a0ad5SWebb Scales /* 5403592a0ad5SWebb Scales * If we get here, it means dma mapping failed. 5404592a0ad5SWebb Scales * Try again via scsi mid layer, which will 5405592a0ad5SWebb Scales * then get SCSI_MLQUEUE_HOST_BUSY. 5406592a0ad5SWebb Scales */ 5407592a0ad5SWebb Scales cmd->result = DID_IMM_RETRY << 16; 54088a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, c, cmd); 5409592a0ad5SWebb Scales } 5410592a0ad5SWebb Scales /* else, fall thru and resubmit down CISS path */ 5411592a0ad5SWebb Scales } 5412592a0ad5SWebb Scales } 5413360c73bdSStephen Cameron hpsa_cmd_partial_init(c->h, c->cmdindex, c); 5414080ef1ccSDon Brace if (hpsa_ciss_submit(c->h, c, cmd, dev->scsi3addr)) { 5415080ef1ccSDon Brace /* 5416080ef1ccSDon Brace * If we get here, it means dma mapping failed. Try 5417080ef1ccSDon Brace * again via scsi mid layer, which will then get 5418080ef1ccSDon Brace * SCSI_MLQUEUE_HOST_BUSY. 5419592a0ad5SWebb Scales * 5420592a0ad5SWebb Scales * hpsa_ciss_submit will have already freed c 5421592a0ad5SWebb Scales * if it encountered a dma mapping failure. 5422080ef1ccSDon Brace */ 5423080ef1ccSDon Brace cmd->result = DID_IMM_RETRY << 16; 5424080ef1ccSDon Brace cmd->scsi_done(cmd); 5425080ef1ccSDon Brace } 5426080ef1ccSDon Brace } 5427080ef1ccSDon Brace 5428574f05d3SStephen Cameron /* Running in struct Scsi_Host->host_lock less mode */ 5429574f05d3SStephen Cameron static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd) 5430574f05d3SStephen Cameron { 5431574f05d3SStephen Cameron struct ctlr_info *h; 5432574f05d3SStephen Cameron struct hpsa_scsi_dev_t *dev; 5433574f05d3SStephen Cameron unsigned char scsi3addr[8]; 5434574f05d3SStephen Cameron struct CommandList *c; 5435574f05d3SStephen Cameron int rc = 0; 5436574f05d3SStephen Cameron 5437574f05d3SStephen Cameron /* Get the ptr to our adapter structure out of cmd->host. */ 5438574f05d3SStephen Cameron h = sdev_to_hba(cmd->device); 543973153fe5SWebb Scales 544073153fe5SWebb Scales BUG_ON(cmd->request->tag < 0); 544173153fe5SWebb Scales 5442574f05d3SStephen Cameron dev = cmd->device->hostdata; 5443574f05d3SStephen Cameron if (!dev) { 5444ba74fdc4SDon Brace cmd->result = NOT_READY << 16; /* host byte */ 5445ba74fdc4SDon Brace cmd->scsi_done(cmd); 5446ba74fdc4SDon Brace return 0; 5447ba74fdc4SDon Brace } 5448ba74fdc4SDon Brace 5449ba74fdc4SDon Brace if (dev->removed) { 5450574f05d3SStephen Cameron cmd->result = DID_NO_CONNECT << 16; 5451574f05d3SStephen Cameron cmd->scsi_done(cmd); 5452574f05d3SStephen Cameron return 0; 5453574f05d3SStephen Cameron } 545473153fe5SWebb Scales 5455574f05d3SStephen Cameron memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr)); 5456574f05d3SStephen Cameron 5457574f05d3SStephen Cameron if (unlikely(lockup_detected(h))) { 545825163bd5SWebb Scales cmd->result = DID_NO_CONNECT << 16; 5459574f05d3SStephen Cameron cmd->scsi_done(cmd); 5460574f05d3SStephen Cameron return 0; 5461574f05d3SStephen Cameron } 546273153fe5SWebb Scales c = cmd_tagged_alloc(h, cmd); 5463574f05d3SStephen Cameron 5464407863cbSStephen Cameron /* 5465407863cbSStephen Cameron * Call alternate submit routine for I/O accelerated commands. 5466574f05d3SStephen Cameron * Retries always go down the normal I/O path. 5467574f05d3SStephen Cameron */ 5468574f05d3SStephen Cameron if (likely(cmd->retries == 0 && 5469574f05d3SStephen Cameron cmd->request->cmd_type == REQ_TYPE_FS && 5470574f05d3SStephen Cameron h->acciopath_status)) { 5471592a0ad5SWebb Scales rc = hpsa_ioaccel_submit(h, c, cmd, scsi3addr); 5472574f05d3SStephen Cameron if (rc == 0) 5473592a0ad5SWebb Scales return 0; 5474592a0ad5SWebb Scales if (rc == SCSI_MLQUEUE_HOST_BUSY) { 547573153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 5476574f05d3SStephen Cameron return SCSI_MLQUEUE_HOST_BUSY; 5477574f05d3SStephen Cameron } 5478574f05d3SStephen Cameron } 5479574f05d3SStephen Cameron return hpsa_ciss_submit(h, c, cmd, scsi3addr); 5480574f05d3SStephen Cameron } 5481574f05d3SStephen Cameron 54828ebc9248SWebb Scales static void hpsa_scan_complete(struct ctlr_info *h) 54835f389360SStephen M. Cameron { 54845f389360SStephen M. Cameron unsigned long flags; 54855f389360SStephen M. Cameron 54865f389360SStephen M. Cameron spin_lock_irqsave(&h->scan_lock, flags); 54875f389360SStephen M. Cameron h->scan_finished = 1; 54885f389360SStephen M. Cameron wake_up_all(&h->scan_wait_queue); 54895f389360SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 54905f389360SStephen M. Cameron } 54915f389360SStephen M. Cameron 5492a08a8471SStephen M. Cameron static void hpsa_scan_start(struct Scsi_Host *sh) 5493a08a8471SStephen M. Cameron { 5494a08a8471SStephen M. Cameron struct ctlr_info *h = shost_to_hba(sh); 5495a08a8471SStephen M. Cameron unsigned long flags; 5496a08a8471SStephen M. Cameron 54978ebc9248SWebb Scales /* 54988ebc9248SWebb Scales * Don't let rescans be initiated on a controller known to be locked 54998ebc9248SWebb Scales * up. If the controller locks up *during* a rescan, that thread is 55008ebc9248SWebb Scales * probably hosed, but at least we can prevent new rescan threads from 55018ebc9248SWebb Scales * piling up on a locked up controller. 55028ebc9248SWebb Scales */ 55038ebc9248SWebb Scales if (unlikely(lockup_detected(h))) 55048ebc9248SWebb Scales return hpsa_scan_complete(h); 55055f389360SStephen M. Cameron 5506a08a8471SStephen M. Cameron /* wait until any scan already in progress is finished. */ 5507a08a8471SStephen M. Cameron while (1) { 5508a08a8471SStephen M. Cameron spin_lock_irqsave(&h->scan_lock, flags); 5509a08a8471SStephen M. Cameron if (h->scan_finished) 5510a08a8471SStephen M. Cameron break; 5511a08a8471SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 5512a08a8471SStephen M. Cameron wait_event(h->scan_wait_queue, h->scan_finished); 5513a08a8471SStephen M. Cameron /* Note: We don't need to worry about a race between this 5514a08a8471SStephen M. Cameron * thread and driver unload because the midlayer will 5515a08a8471SStephen M. Cameron * have incremented the reference count, so unload won't 5516a08a8471SStephen M. Cameron * happen if we're in here. 5517a08a8471SStephen M. Cameron */ 5518a08a8471SStephen M. Cameron } 5519a08a8471SStephen M. Cameron h->scan_finished = 0; /* mark scan as in progress */ 5520a08a8471SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 5521a08a8471SStephen M. Cameron 55228ebc9248SWebb Scales if (unlikely(lockup_detected(h))) 55238ebc9248SWebb Scales return hpsa_scan_complete(h); 55245f389360SStephen M. Cameron 55258aa60681SDon Brace hpsa_update_scsi_devices(h); 5526a08a8471SStephen M. Cameron 55278ebc9248SWebb Scales hpsa_scan_complete(h); 5528a08a8471SStephen M. Cameron } 5529a08a8471SStephen M. Cameron 55307c0a0229SDon Brace static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth) 55317c0a0229SDon Brace { 553203383736SDon Brace struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata; 553303383736SDon Brace 553403383736SDon Brace if (!logical_drive) 553503383736SDon Brace return -ENODEV; 55367c0a0229SDon Brace 55377c0a0229SDon Brace if (qdepth < 1) 55387c0a0229SDon Brace qdepth = 1; 553903383736SDon Brace else if (qdepth > logical_drive->queue_depth) 554003383736SDon Brace qdepth = logical_drive->queue_depth; 554103383736SDon Brace 554203383736SDon Brace return scsi_change_queue_depth(sdev, qdepth); 55437c0a0229SDon Brace } 55447c0a0229SDon Brace 5545a08a8471SStephen M. Cameron static int hpsa_scan_finished(struct Scsi_Host *sh, 5546a08a8471SStephen M. Cameron unsigned long elapsed_time) 5547a08a8471SStephen M. Cameron { 5548a08a8471SStephen M. Cameron struct ctlr_info *h = shost_to_hba(sh); 5549a08a8471SStephen M. Cameron unsigned long flags; 5550a08a8471SStephen M. Cameron int finished; 5551a08a8471SStephen M. Cameron 5552a08a8471SStephen M. Cameron spin_lock_irqsave(&h->scan_lock, flags); 5553a08a8471SStephen M. Cameron finished = h->scan_finished; 5554a08a8471SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 5555a08a8471SStephen M. Cameron return finished; 5556a08a8471SStephen M. Cameron } 5557a08a8471SStephen M. Cameron 55582946e82bSRobert Elliott static int hpsa_scsi_host_alloc(struct ctlr_info *h) 5559edd16368SStephen M. Cameron { 5560b705690dSStephen M. Cameron struct Scsi_Host *sh; 5561edd16368SStephen M. Cameron 5562b705690dSStephen M. Cameron sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h)); 55632946e82bSRobert Elliott if (sh == NULL) { 55642946e82bSRobert Elliott dev_err(&h->pdev->dev, "scsi_host_alloc failed\n"); 55652946e82bSRobert Elliott return -ENOMEM; 55662946e82bSRobert Elliott } 5567b705690dSStephen M. Cameron 5568b705690dSStephen M. Cameron sh->io_port = 0; 5569b705690dSStephen M. Cameron sh->n_io_port = 0; 5570b705690dSStephen M. Cameron sh->this_id = -1; 5571b705690dSStephen M. Cameron sh->max_channel = 3; 5572b705690dSStephen M. Cameron sh->max_cmd_len = MAX_COMMAND_SIZE; 5573b705690dSStephen M. Cameron sh->max_lun = HPSA_MAX_LUN; 5574b705690dSStephen M. Cameron sh->max_id = HPSA_MAX_LUN; 557541ce4c35SStephen Cameron sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS; 5576d54c5c24SStephen Cameron sh->cmd_per_lun = sh->can_queue; 5577b705690dSStephen M. Cameron sh->sg_tablesize = h->maxsgentries; 5578d04e62b9SKevin Barnett sh->transportt = hpsa_sas_transport_template; 5579b705690dSStephen M. Cameron sh->hostdata[0] = (unsigned long) h; 5580b705690dSStephen M. Cameron sh->irq = h->intr[h->intr_mode]; 5581b705690dSStephen M. Cameron sh->unique_id = sh->irq; 558264d513acSChristoph Hellwig 55832946e82bSRobert Elliott h->scsi_host = sh; 55842946e82bSRobert Elliott return 0; 55852946e82bSRobert Elliott } 55862946e82bSRobert Elliott 55872946e82bSRobert Elliott static int hpsa_scsi_add_host(struct ctlr_info *h) 55882946e82bSRobert Elliott { 55892946e82bSRobert Elliott int rv; 55902946e82bSRobert Elliott 55912946e82bSRobert Elliott rv = scsi_add_host(h->scsi_host, &h->pdev->dev); 55922946e82bSRobert Elliott if (rv) { 55932946e82bSRobert Elliott dev_err(&h->pdev->dev, "scsi_add_host failed\n"); 55942946e82bSRobert Elliott return rv; 55952946e82bSRobert Elliott } 55962946e82bSRobert Elliott scsi_scan_host(h->scsi_host); 55972946e82bSRobert Elliott return 0; 5598edd16368SStephen M. Cameron } 5599edd16368SStephen M. Cameron 5600b69324ffSWebb Scales /* 560173153fe5SWebb Scales * The block layer has already gone to the trouble of picking out a unique, 560273153fe5SWebb Scales * small-integer tag for this request. We use an offset from that value as 560373153fe5SWebb Scales * an index to select our command block. (The offset allows us to reserve the 560473153fe5SWebb Scales * low-numbered entries for our own uses.) 560573153fe5SWebb Scales */ 560673153fe5SWebb Scales static int hpsa_get_cmd_index(struct scsi_cmnd *scmd) 560773153fe5SWebb Scales { 560873153fe5SWebb Scales int idx = scmd->request->tag; 560973153fe5SWebb Scales 561073153fe5SWebb Scales if (idx < 0) 561173153fe5SWebb Scales return idx; 561273153fe5SWebb Scales 561373153fe5SWebb Scales /* Offset to leave space for internal cmds. */ 561473153fe5SWebb Scales return idx += HPSA_NRESERVED_CMDS; 561573153fe5SWebb Scales } 561673153fe5SWebb Scales 561773153fe5SWebb Scales /* 5618b69324ffSWebb Scales * Send a TEST_UNIT_READY command to the specified LUN using the specified 5619b69324ffSWebb Scales * reply queue; returns zero if the unit is ready, and non-zero otherwise. 5620b69324ffSWebb Scales */ 5621b69324ffSWebb Scales static int hpsa_send_test_unit_ready(struct ctlr_info *h, 5622b69324ffSWebb Scales struct CommandList *c, unsigned char lunaddr[], 5623b69324ffSWebb Scales int reply_queue) 5624edd16368SStephen M. Cameron { 56258919358eSTomas Henzl int rc; 5626edd16368SStephen M. Cameron 5627a2dac136SStephen M. Cameron /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */ 5628a2dac136SStephen M. Cameron (void) fill_cmd(c, TEST_UNIT_READY, h, 5629a2dac136SStephen M. Cameron NULL, 0, 0, lunaddr, TYPE_CMD); 5630c448ecfaSDon Brace rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 563125163bd5SWebb Scales if (rc) 5632b69324ffSWebb Scales return rc; 5633edd16368SStephen M. Cameron /* no unmap needed here because no data xfer. */ 5634edd16368SStephen M. Cameron 5635b69324ffSWebb Scales /* Check if the unit is already ready. */ 5636edd16368SStephen M. Cameron if (c->err_info->CommandStatus == CMD_SUCCESS) 5637b69324ffSWebb Scales return 0; 5638edd16368SStephen M. Cameron 5639b69324ffSWebb Scales /* 5640b69324ffSWebb Scales * The first command sent after reset will receive "unit attention" to 5641b69324ffSWebb Scales * indicate that the LUN has been reset...this is actually what we're 5642b69324ffSWebb Scales * looking for (but, success is good too). 5643b69324ffSWebb Scales */ 5644edd16368SStephen M. Cameron if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 5645edd16368SStephen M. Cameron c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION && 5646edd16368SStephen M. Cameron (c->err_info->SenseInfo[2] == NO_SENSE || 5647edd16368SStephen M. Cameron c->err_info->SenseInfo[2] == UNIT_ATTENTION)) 5648b69324ffSWebb Scales return 0; 5649b69324ffSWebb Scales 5650b69324ffSWebb Scales return 1; 5651b69324ffSWebb Scales } 5652b69324ffSWebb Scales 5653b69324ffSWebb Scales /* 5654b69324ffSWebb Scales * Wait for a TEST_UNIT_READY command to complete, retrying as necessary; 5655b69324ffSWebb Scales * returns zero when the unit is ready, and non-zero when giving up. 5656b69324ffSWebb Scales */ 5657b69324ffSWebb Scales static int hpsa_wait_for_test_unit_ready(struct ctlr_info *h, 5658b69324ffSWebb Scales struct CommandList *c, 5659b69324ffSWebb Scales unsigned char lunaddr[], int reply_queue) 5660b69324ffSWebb Scales { 5661b69324ffSWebb Scales int rc; 5662b69324ffSWebb Scales int count = 0; 5663b69324ffSWebb Scales int waittime = 1; /* seconds */ 5664b69324ffSWebb Scales 5665b69324ffSWebb Scales /* Send test unit ready until device ready, or give up. */ 5666b69324ffSWebb Scales for (count = 0; count < HPSA_TUR_RETRY_LIMIT; count++) { 5667b69324ffSWebb Scales 5668b69324ffSWebb Scales /* 5669b69324ffSWebb Scales * Wait for a bit. do this first, because if we send 5670b69324ffSWebb Scales * the TUR right away, the reset will just abort it. 5671b69324ffSWebb Scales */ 5672b69324ffSWebb Scales msleep(1000 * waittime); 5673b69324ffSWebb Scales 5674b69324ffSWebb Scales rc = hpsa_send_test_unit_ready(h, c, lunaddr, reply_queue); 5675b69324ffSWebb Scales if (!rc) 5676edd16368SStephen M. Cameron break; 5677b69324ffSWebb Scales 5678b69324ffSWebb Scales /* Increase wait time with each try, up to a point. */ 5679b69324ffSWebb Scales if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS) 5680b69324ffSWebb Scales waittime *= 2; 5681b69324ffSWebb Scales 5682b69324ffSWebb Scales dev_warn(&h->pdev->dev, 5683b69324ffSWebb Scales "waiting %d secs for device to become ready.\n", 5684b69324ffSWebb Scales waittime); 5685b69324ffSWebb Scales } 5686b69324ffSWebb Scales 5687b69324ffSWebb Scales return rc; 5688b69324ffSWebb Scales } 5689b69324ffSWebb Scales 5690b69324ffSWebb Scales static int wait_for_device_to_become_ready(struct ctlr_info *h, 5691b69324ffSWebb Scales unsigned char lunaddr[], 5692b69324ffSWebb Scales int reply_queue) 5693b69324ffSWebb Scales { 5694b69324ffSWebb Scales int first_queue; 5695b69324ffSWebb Scales int last_queue; 5696b69324ffSWebb Scales int rq; 5697b69324ffSWebb Scales int rc = 0; 5698b69324ffSWebb Scales struct CommandList *c; 5699b69324ffSWebb Scales 5700b69324ffSWebb Scales c = cmd_alloc(h); 5701b69324ffSWebb Scales 5702b69324ffSWebb Scales /* 5703b69324ffSWebb Scales * If no specific reply queue was requested, then send the TUR 5704b69324ffSWebb Scales * repeatedly, requesting a reply on each reply queue; otherwise execute 5705b69324ffSWebb Scales * the loop exactly once using only the specified queue. 5706b69324ffSWebb Scales */ 5707b69324ffSWebb Scales if (reply_queue == DEFAULT_REPLY_QUEUE) { 5708b69324ffSWebb Scales first_queue = 0; 5709b69324ffSWebb Scales last_queue = h->nreply_queues - 1; 5710b69324ffSWebb Scales } else { 5711b69324ffSWebb Scales first_queue = reply_queue; 5712b69324ffSWebb Scales last_queue = reply_queue; 5713b69324ffSWebb Scales } 5714b69324ffSWebb Scales 5715b69324ffSWebb Scales for (rq = first_queue; rq <= last_queue; rq++) { 5716b69324ffSWebb Scales rc = hpsa_wait_for_test_unit_ready(h, c, lunaddr, rq); 5717b69324ffSWebb Scales if (rc) 5718b69324ffSWebb Scales break; 5719edd16368SStephen M. Cameron } 5720edd16368SStephen M. Cameron 5721edd16368SStephen M. Cameron if (rc) 5722edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "giving up on device.\n"); 5723edd16368SStephen M. Cameron else 5724edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "device is ready.\n"); 5725edd16368SStephen M. Cameron 572645fcb86eSStephen Cameron cmd_free(h, c); 5727edd16368SStephen M. Cameron return rc; 5728edd16368SStephen M. Cameron } 5729edd16368SStephen M. Cameron 5730edd16368SStephen M. Cameron /* Need at least one of these error handlers to keep ../scsi/hosts.c from 5731edd16368SStephen M. Cameron * complaining. Doing a host- or bus-reset can't do anything good here. 5732edd16368SStephen M. Cameron */ 5733edd16368SStephen M. Cameron static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd) 5734edd16368SStephen M. Cameron { 5735edd16368SStephen M. Cameron int rc; 5736edd16368SStephen M. Cameron struct ctlr_info *h; 5737edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *dev; 57380b9b7b6eSScott Teel u8 reset_type; 57392dc127bbSDan Carpenter char msg[48]; 5740edd16368SStephen M. Cameron 5741edd16368SStephen M. Cameron /* find the controller to which the command to be aborted was sent */ 5742edd16368SStephen M. Cameron h = sdev_to_hba(scsicmd->device); 5743edd16368SStephen M. Cameron if (h == NULL) /* paranoia */ 5744edd16368SStephen M. Cameron return FAILED; 5745e345893bSDon Brace 5746e345893bSDon Brace if (lockup_detected(h)) 5747e345893bSDon Brace return FAILED; 5748e345893bSDon Brace 5749edd16368SStephen M. Cameron dev = scsicmd->device->hostdata; 5750edd16368SStephen M. Cameron if (!dev) { 5751d604f533SWebb Scales dev_err(&h->pdev->dev, "%s: device lookup failed\n", __func__); 5752edd16368SStephen M. Cameron return FAILED; 5753edd16368SStephen M. Cameron } 575425163bd5SWebb Scales 575525163bd5SWebb Scales /* if controller locked up, we can guarantee command won't complete */ 575625163bd5SWebb Scales if (lockup_detected(h)) { 57572dc127bbSDan Carpenter snprintf(msg, sizeof(msg), 57582dc127bbSDan Carpenter "cmd %d RESET FAILED, lockup detected", 575973153fe5SWebb Scales hpsa_get_cmd_index(scsicmd)); 576073153fe5SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 576125163bd5SWebb Scales return FAILED; 576225163bd5SWebb Scales } 576325163bd5SWebb Scales 576425163bd5SWebb Scales /* this reset request might be the result of a lockup; check */ 576525163bd5SWebb Scales if (detect_controller_lockup(h)) { 57662dc127bbSDan Carpenter snprintf(msg, sizeof(msg), 57672dc127bbSDan Carpenter "cmd %d RESET FAILED, new lockup detected", 576873153fe5SWebb Scales hpsa_get_cmd_index(scsicmd)); 576973153fe5SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 577025163bd5SWebb Scales return FAILED; 577125163bd5SWebb Scales } 577225163bd5SWebb Scales 5773d604f533SWebb Scales /* Do not attempt on controller */ 5774d604f533SWebb Scales if (is_hba_lunid(dev->scsi3addr)) 5775d604f533SWebb Scales return SUCCESS; 5776d604f533SWebb Scales 57770b9b7b6eSScott Teel if (is_logical_dev_addr_mode(dev->scsi3addr)) 57780b9b7b6eSScott Teel reset_type = HPSA_DEVICE_RESET_MSG; 57790b9b7b6eSScott Teel else 57800b9b7b6eSScott Teel reset_type = HPSA_PHYS_TARGET_RESET; 57810b9b7b6eSScott Teel 57820b9b7b6eSScott Teel sprintf(msg, "resetting %s", 57830b9b7b6eSScott Teel reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical "); 57840b9b7b6eSScott Teel hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 578525163bd5SWebb Scales 5786da03ded0SDon Brace h->reset_in_progress = 1; 5787d416b0c7SStephen M. Cameron 5788edd16368SStephen M. Cameron /* send a reset to the SCSI LUN which the command was sent to */ 57890b9b7b6eSScott Teel rc = hpsa_do_reset(h, dev, dev->scsi3addr, reset_type, 579025163bd5SWebb Scales DEFAULT_REPLY_QUEUE); 57910b9b7b6eSScott Teel sprintf(msg, "reset %s %s", 57920b9b7b6eSScott Teel reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ", 57932dc127bbSDan Carpenter rc == 0 ? "completed successfully" : "failed"); 5794d604f533SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 5795da03ded0SDon Brace h->reset_in_progress = 0; 5796d604f533SWebb Scales return rc == 0 ? SUCCESS : FAILED; 5797edd16368SStephen M. Cameron } 5798edd16368SStephen M. Cameron 57996cba3f19SStephen M. Cameron static void swizzle_abort_tag(u8 *tag) 58006cba3f19SStephen M. Cameron { 58016cba3f19SStephen M. Cameron u8 original_tag[8]; 58026cba3f19SStephen M. Cameron 58036cba3f19SStephen M. Cameron memcpy(original_tag, tag, 8); 58046cba3f19SStephen M. Cameron tag[0] = original_tag[3]; 58056cba3f19SStephen M. Cameron tag[1] = original_tag[2]; 58066cba3f19SStephen M. Cameron tag[2] = original_tag[1]; 58076cba3f19SStephen M. Cameron tag[3] = original_tag[0]; 58086cba3f19SStephen M. Cameron tag[4] = original_tag[7]; 58096cba3f19SStephen M. Cameron tag[5] = original_tag[6]; 58106cba3f19SStephen M. Cameron tag[6] = original_tag[5]; 58116cba3f19SStephen M. Cameron tag[7] = original_tag[4]; 58126cba3f19SStephen M. Cameron } 58136cba3f19SStephen M. Cameron 581417eb87d2SScott Teel static void hpsa_get_tag(struct ctlr_info *h, 58152b08b3e9SDon Brace struct CommandList *c, __le32 *taglower, __le32 *tagupper) 581617eb87d2SScott Teel { 58172b08b3e9SDon Brace u64 tag; 581817eb87d2SScott Teel if (c->cmd_type == CMD_IOACCEL1) { 581917eb87d2SScott Teel struct io_accel1_cmd *cm1 = (struct io_accel1_cmd *) 582017eb87d2SScott Teel &h->ioaccel_cmd_pool[c->cmdindex]; 58212b08b3e9SDon Brace tag = le64_to_cpu(cm1->tag); 58222b08b3e9SDon Brace *tagupper = cpu_to_le32(tag >> 32); 58232b08b3e9SDon Brace *taglower = cpu_to_le32(tag); 582454b6e9e9SScott Teel return; 582554b6e9e9SScott Teel } 582654b6e9e9SScott Teel if (c->cmd_type == CMD_IOACCEL2) { 582754b6e9e9SScott Teel struct io_accel2_cmd *cm2 = (struct io_accel2_cmd *) 582854b6e9e9SScott Teel &h->ioaccel2_cmd_pool[c->cmdindex]; 5829dd0e19f3SScott Teel /* upper tag not used in ioaccel2 mode */ 5830dd0e19f3SScott Teel memset(tagupper, 0, sizeof(*tagupper)); 5831dd0e19f3SScott Teel *taglower = cm2->Tag; 583254b6e9e9SScott Teel return; 583354b6e9e9SScott Teel } 58342b08b3e9SDon Brace tag = le64_to_cpu(c->Header.tag); 58352b08b3e9SDon Brace *tagupper = cpu_to_le32(tag >> 32); 58362b08b3e9SDon Brace *taglower = cpu_to_le32(tag); 583717eb87d2SScott Teel } 583854b6e9e9SScott Teel 583975167d2cSStephen M. Cameron static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr, 58409b5c48c2SStephen Cameron struct CommandList *abort, int reply_queue) 584175167d2cSStephen M. Cameron { 584275167d2cSStephen M. Cameron int rc = IO_OK; 584375167d2cSStephen M. Cameron struct CommandList *c; 584475167d2cSStephen M. Cameron struct ErrorInfo *ei; 58452b08b3e9SDon Brace __le32 tagupper, taglower; 584675167d2cSStephen M. Cameron 584745fcb86eSStephen Cameron c = cmd_alloc(h); 584875167d2cSStephen M. Cameron 5849a2dac136SStephen M. Cameron /* fill_cmd can't fail here, no buffer to map */ 58509b5c48c2SStephen Cameron (void) fill_cmd(c, HPSA_ABORT_MSG, h, &abort->Header.tag, 5851a2dac136SStephen M. Cameron 0, 0, scsi3addr, TYPE_MSG); 58529b5c48c2SStephen Cameron if (h->needs_abort_tags_swizzled) 58536cba3f19SStephen M. Cameron swizzle_abort_tag(&c->Request.CDB[4]); 5854c448ecfaSDon Brace (void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 585517eb87d2SScott Teel hpsa_get_tag(h, abort, &taglower, &tagupper); 585625163bd5SWebb Scales dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd(abort) completed.\n", 585717eb87d2SScott Teel __func__, tagupper, taglower); 585875167d2cSStephen M. Cameron /* no unmap needed here because no data xfer. */ 585975167d2cSStephen M. Cameron 586075167d2cSStephen M. Cameron ei = c->err_info; 586175167d2cSStephen M. Cameron switch (ei->CommandStatus) { 586275167d2cSStephen M. Cameron case CMD_SUCCESS: 586375167d2cSStephen M. Cameron break; 58649437ac43SStephen Cameron case CMD_TMF_STATUS: 58659437ac43SStephen Cameron rc = hpsa_evaluate_tmf_status(h, c); 58669437ac43SStephen Cameron break; 586775167d2cSStephen M. Cameron case CMD_UNABORTABLE: /* Very common, don't make noise. */ 586875167d2cSStephen M. Cameron rc = -1; 586975167d2cSStephen M. Cameron break; 587075167d2cSStephen M. Cameron default: 587175167d2cSStephen M. Cameron dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n", 587217eb87d2SScott Teel __func__, tagupper, taglower); 5873d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 587475167d2cSStephen M. Cameron rc = -1; 587575167d2cSStephen M. Cameron break; 587675167d2cSStephen M. Cameron } 587745fcb86eSStephen Cameron cmd_free(h, c); 5878dd0e19f3SScott Teel dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", 5879dd0e19f3SScott Teel __func__, tagupper, taglower); 588075167d2cSStephen M. Cameron return rc; 588175167d2cSStephen M. Cameron } 588275167d2cSStephen M. Cameron 58838be986ccSStephen Cameron static void setup_ioaccel2_abort_cmd(struct CommandList *c, struct ctlr_info *h, 58848be986ccSStephen Cameron struct CommandList *command_to_abort, int reply_queue) 58858be986ccSStephen Cameron { 58868be986ccSStephen Cameron struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 58878be986ccSStephen Cameron struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2; 58888be986ccSStephen Cameron struct io_accel2_cmd *c2a = 58898be986ccSStephen Cameron &h->ioaccel2_cmd_pool[command_to_abort->cmdindex]; 5890a58e7e53SWebb Scales struct scsi_cmnd *scmd = command_to_abort->scsi_cmd; 58918be986ccSStephen Cameron struct hpsa_scsi_dev_t *dev = scmd->device->hostdata; 58928be986ccSStephen Cameron 58938be986ccSStephen Cameron /* 58948be986ccSStephen Cameron * We're overlaying struct hpsa_tmf_struct on top of something which 58958be986ccSStephen Cameron * was allocated as a struct io_accel2_cmd, so we better be sure it 58968be986ccSStephen Cameron * actually fits, and doesn't overrun the error info space. 58978be986ccSStephen Cameron */ 58988be986ccSStephen Cameron BUILD_BUG_ON(sizeof(struct hpsa_tmf_struct) > 58998be986ccSStephen Cameron sizeof(struct io_accel2_cmd)); 59008be986ccSStephen Cameron BUG_ON(offsetof(struct io_accel2_cmd, error_data) < 59018be986ccSStephen Cameron offsetof(struct hpsa_tmf_struct, error_len) + 59028be986ccSStephen Cameron sizeof(ac->error_len)); 59038be986ccSStephen Cameron 59048be986ccSStephen Cameron c->cmd_type = IOACCEL2_TMF; 5905a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 5906a58e7e53SWebb Scales 59078be986ccSStephen Cameron /* Adjust the DMA address to point to the accelerated command buffer */ 59088be986ccSStephen Cameron c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle + 59098be986ccSStephen Cameron (c->cmdindex * sizeof(struct io_accel2_cmd)); 59108be986ccSStephen Cameron BUG_ON(c->busaddr & 0x0000007F); 59118be986ccSStephen Cameron 59128be986ccSStephen Cameron memset(ac, 0, sizeof(*c2)); /* yes this is correct */ 59138be986ccSStephen Cameron ac->iu_type = IOACCEL2_IU_TMF_TYPE; 59148be986ccSStephen Cameron ac->reply_queue = reply_queue; 59158be986ccSStephen Cameron ac->tmf = IOACCEL2_TMF_ABORT; 59168be986ccSStephen Cameron ac->it_nexus = cpu_to_le32(dev->ioaccel_handle); 59178be986ccSStephen Cameron memset(ac->lun_id, 0, sizeof(ac->lun_id)); 59188be986ccSStephen Cameron ac->tag = cpu_to_le64(c->cmdindex << DIRECT_LOOKUP_SHIFT); 59198be986ccSStephen Cameron ac->abort_tag = cpu_to_le64(le32_to_cpu(c2a->Tag)); 59208be986ccSStephen Cameron ac->error_ptr = cpu_to_le64(c->busaddr + 59218be986ccSStephen Cameron offsetof(struct io_accel2_cmd, error_data)); 59228be986ccSStephen Cameron ac->error_len = cpu_to_le32(sizeof(c2->error_data)); 59238be986ccSStephen Cameron } 59248be986ccSStephen Cameron 592554b6e9e9SScott Teel /* ioaccel2 path firmware cannot handle abort task requests. 592654b6e9e9SScott Teel * Change abort requests to physical target reset, and send to the 592754b6e9e9SScott Teel * address of the physical disk used for the ioaccel 2 command. 592854b6e9e9SScott Teel * Return 0 on success (IO_OK) 592954b6e9e9SScott Teel * -1 on failure 593054b6e9e9SScott Teel */ 593154b6e9e9SScott Teel 593254b6e9e9SScott Teel static int hpsa_send_reset_as_abort_ioaccel2(struct ctlr_info *h, 593325163bd5SWebb Scales unsigned char *scsi3addr, struct CommandList *abort, int reply_queue) 593454b6e9e9SScott Teel { 593554b6e9e9SScott Teel int rc = IO_OK; 593654b6e9e9SScott Teel struct scsi_cmnd *scmd; /* scsi command within request being aborted */ 593754b6e9e9SScott Teel struct hpsa_scsi_dev_t *dev; /* device to which scsi cmd was sent */ 593854b6e9e9SScott Teel unsigned char phys_scsi3addr[8]; /* addr of phys disk with volume */ 593954b6e9e9SScott Teel unsigned char *psa = &phys_scsi3addr[0]; 594054b6e9e9SScott Teel 594154b6e9e9SScott Teel /* Get a pointer to the hpsa logical device. */ 59427fa3030cSStephen Cameron scmd = abort->scsi_cmd; 594354b6e9e9SScott Teel dev = (struct hpsa_scsi_dev_t *)(scmd->device->hostdata); 594454b6e9e9SScott Teel if (dev == NULL) { 594554b6e9e9SScott Teel dev_warn(&h->pdev->dev, 594654b6e9e9SScott Teel "Cannot abort: no device pointer for command.\n"); 594754b6e9e9SScott Teel return -1; /* not abortable */ 594854b6e9e9SScott Teel } 594954b6e9e9SScott Teel 59502ba8bfc8SStephen M. Cameron if (h->raid_offload_debug > 0) 59512ba8bfc8SStephen M. Cameron dev_info(&h->pdev->dev, 59520d96ef5fSWebb Scales "scsi %d:%d:%d:%d %s scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 59532ba8bfc8SStephen M. Cameron h->scsi_host->host_no, dev->bus, dev->target, dev->lun, 59540d96ef5fSWebb Scales "Reset as abort", 59552ba8bfc8SStephen M. Cameron scsi3addr[0], scsi3addr[1], scsi3addr[2], scsi3addr[3], 59562ba8bfc8SStephen M. Cameron scsi3addr[4], scsi3addr[5], scsi3addr[6], scsi3addr[7]); 59572ba8bfc8SStephen M. Cameron 595854b6e9e9SScott Teel if (!dev->offload_enabled) { 595954b6e9e9SScott Teel dev_warn(&h->pdev->dev, 596054b6e9e9SScott Teel "Can't abort: device is not operating in HP SSD Smart Path mode.\n"); 596154b6e9e9SScott Teel return -1; /* not abortable */ 596254b6e9e9SScott Teel } 596354b6e9e9SScott Teel 596454b6e9e9SScott Teel /* Incoming scsi3addr is logical addr. We need physical disk addr. */ 596554b6e9e9SScott Teel if (!hpsa_get_pdisk_of_ioaccel2(h, abort, psa)) { 596654b6e9e9SScott Teel dev_warn(&h->pdev->dev, "Can't abort: Failed lookup of physical address.\n"); 596754b6e9e9SScott Teel return -1; /* not abortable */ 596854b6e9e9SScott Teel } 596954b6e9e9SScott Teel 597054b6e9e9SScott Teel /* send the reset */ 59712ba8bfc8SStephen M. Cameron if (h->raid_offload_debug > 0) 59722ba8bfc8SStephen M. Cameron dev_info(&h->pdev->dev, 59732ba8bfc8SStephen M. Cameron "Reset as abort: Resetting physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 59742ba8bfc8SStephen M. Cameron psa[0], psa[1], psa[2], psa[3], 59752ba8bfc8SStephen M. Cameron psa[4], psa[5], psa[6], psa[7]); 5976d604f533SWebb Scales rc = hpsa_do_reset(h, dev, psa, HPSA_RESET_TYPE_TARGET, reply_queue); 597754b6e9e9SScott Teel if (rc != 0) { 597854b6e9e9SScott Teel dev_warn(&h->pdev->dev, 597954b6e9e9SScott Teel "Reset as abort: Failed on physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 598054b6e9e9SScott Teel psa[0], psa[1], psa[2], psa[3], 598154b6e9e9SScott Teel psa[4], psa[5], psa[6], psa[7]); 598254b6e9e9SScott Teel return rc; /* failed to reset */ 598354b6e9e9SScott Teel } 598454b6e9e9SScott Teel 598554b6e9e9SScott Teel /* wait for device to recover */ 5986b69324ffSWebb Scales if (wait_for_device_to_become_ready(h, psa, reply_queue) != 0) { 598754b6e9e9SScott Teel dev_warn(&h->pdev->dev, 598854b6e9e9SScott Teel "Reset as abort: Failed: Device never recovered from reset: 0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 598954b6e9e9SScott Teel psa[0], psa[1], psa[2], psa[3], 599054b6e9e9SScott Teel psa[4], psa[5], psa[6], psa[7]); 599154b6e9e9SScott Teel return -1; /* failed to recover */ 599254b6e9e9SScott Teel } 599354b6e9e9SScott Teel 599454b6e9e9SScott Teel /* device recovered */ 599554b6e9e9SScott Teel dev_info(&h->pdev->dev, 599654b6e9e9SScott Teel "Reset as abort: Device recovered from reset: scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 599754b6e9e9SScott Teel psa[0], psa[1], psa[2], psa[3], 599854b6e9e9SScott Teel psa[4], psa[5], psa[6], psa[7]); 599954b6e9e9SScott Teel 600054b6e9e9SScott Teel return rc; /* success */ 600154b6e9e9SScott Teel } 600254b6e9e9SScott Teel 60038be986ccSStephen Cameron static int hpsa_send_abort_ioaccel2(struct ctlr_info *h, 60048be986ccSStephen Cameron struct CommandList *abort, int reply_queue) 60058be986ccSStephen Cameron { 60068be986ccSStephen Cameron int rc = IO_OK; 60078be986ccSStephen Cameron struct CommandList *c; 60088be986ccSStephen Cameron __le32 taglower, tagupper; 60098be986ccSStephen Cameron struct hpsa_scsi_dev_t *dev; 60108be986ccSStephen Cameron struct io_accel2_cmd *c2; 60118be986ccSStephen Cameron 60128be986ccSStephen Cameron dev = abort->scsi_cmd->device->hostdata; 60138be986ccSStephen Cameron if (!dev->offload_enabled && !dev->hba_ioaccel_enabled) 60148be986ccSStephen Cameron return -1; 60158be986ccSStephen Cameron 60168be986ccSStephen Cameron c = cmd_alloc(h); 60178be986ccSStephen Cameron setup_ioaccel2_abort_cmd(c, h, abort, reply_queue); 60188be986ccSStephen Cameron c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 6019c448ecfaSDon Brace (void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 60208be986ccSStephen Cameron hpsa_get_tag(h, abort, &taglower, &tagupper); 60218be986ccSStephen Cameron dev_dbg(&h->pdev->dev, 60228be986ccSStephen Cameron "%s: Tag:0x%08x:%08x: do_simple_cmd(ioaccel2 abort) completed.\n", 60238be986ccSStephen Cameron __func__, tagupper, taglower); 60248be986ccSStephen Cameron /* no unmap needed here because no data xfer. */ 60258be986ccSStephen Cameron 60268be986ccSStephen Cameron dev_dbg(&h->pdev->dev, 60278be986ccSStephen Cameron "%s: Tag:0x%08x:%08x: abort service response = 0x%02x.\n", 60288be986ccSStephen Cameron __func__, tagupper, taglower, c2->error_data.serv_response); 60298be986ccSStephen Cameron switch (c2->error_data.serv_response) { 60308be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE: 60318be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS: 60328be986ccSStephen Cameron rc = 0; 60338be986ccSStephen Cameron break; 60348be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_TMF_REJECTED: 60358be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_FAILURE: 60368be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN: 60378be986ccSStephen Cameron rc = -1; 60388be986ccSStephen Cameron break; 60398be986ccSStephen Cameron default: 60408be986ccSStephen Cameron dev_warn(&h->pdev->dev, 60418be986ccSStephen Cameron "%s: Tag:0x%08x:%08x: unknown abort service response 0x%02x\n", 60428be986ccSStephen Cameron __func__, tagupper, taglower, 60438be986ccSStephen Cameron c2->error_data.serv_response); 60448be986ccSStephen Cameron rc = -1; 60458be986ccSStephen Cameron } 60468be986ccSStephen Cameron cmd_free(h, c); 60478be986ccSStephen Cameron dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", __func__, 60488be986ccSStephen Cameron tagupper, taglower); 60498be986ccSStephen Cameron return rc; 60508be986ccSStephen Cameron } 60518be986ccSStephen Cameron 60526cba3f19SStephen M. Cameron static int hpsa_send_abort_both_ways(struct ctlr_info *h, 605339f3deb2SDon Brace struct hpsa_scsi_dev_t *dev, struct CommandList *abort, int reply_queue) 60546cba3f19SStephen M. Cameron { 60558be986ccSStephen Cameron /* 60568be986ccSStephen Cameron * ioccelerator mode 2 commands should be aborted via the 605754b6e9e9SScott Teel * accelerated path, since RAID path is unaware of these commands, 60588be986ccSStephen Cameron * but not all underlying firmware can handle abort TMF. 60598be986ccSStephen Cameron * Change abort to physical device reset when abort TMF is unsupported. 606054b6e9e9SScott Teel */ 60618be986ccSStephen Cameron if (abort->cmd_type == CMD_IOACCEL2) { 606239f3deb2SDon Brace if ((HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags) || 606339f3deb2SDon Brace dev->physical_device) 60648be986ccSStephen Cameron return hpsa_send_abort_ioaccel2(h, abort, 60658be986ccSStephen Cameron reply_queue); 60668be986ccSStephen Cameron else 606739f3deb2SDon Brace return hpsa_send_reset_as_abort_ioaccel2(h, 606839f3deb2SDon Brace dev->scsi3addr, 606925163bd5SWebb Scales abort, reply_queue); 60708be986ccSStephen Cameron } 607139f3deb2SDon Brace return hpsa_send_abort(h, dev->scsi3addr, abort, reply_queue); 607225163bd5SWebb Scales } 607325163bd5SWebb Scales 607425163bd5SWebb Scales /* Find out which reply queue a command was meant to return on */ 607525163bd5SWebb Scales static int hpsa_extract_reply_queue(struct ctlr_info *h, 607625163bd5SWebb Scales struct CommandList *c) 607725163bd5SWebb Scales { 607825163bd5SWebb Scales if (c->cmd_type == CMD_IOACCEL2) 607925163bd5SWebb Scales return h->ioaccel2_cmd_pool[c->cmdindex].reply_queue; 608025163bd5SWebb Scales return c->Header.ReplyQueue; 60816cba3f19SStephen M. Cameron } 60826cba3f19SStephen M. Cameron 60839b5c48c2SStephen Cameron /* 60849b5c48c2SStephen Cameron * Limit concurrency of abort commands to prevent 60859b5c48c2SStephen Cameron * over-subscription of commands 60869b5c48c2SStephen Cameron */ 60879b5c48c2SStephen Cameron static inline int wait_for_available_abort_cmd(struct ctlr_info *h) 60889b5c48c2SStephen Cameron { 60899b5c48c2SStephen Cameron #define ABORT_CMD_WAIT_MSECS 5000 60909b5c48c2SStephen Cameron return !wait_event_timeout(h->abort_cmd_wait_queue, 60919b5c48c2SStephen Cameron atomic_dec_if_positive(&h->abort_cmds_available) >= 0, 60929b5c48c2SStephen Cameron msecs_to_jiffies(ABORT_CMD_WAIT_MSECS)); 60939b5c48c2SStephen Cameron } 60949b5c48c2SStephen Cameron 609575167d2cSStephen M. Cameron /* Send an abort for the specified command. 609675167d2cSStephen M. Cameron * If the device and controller support it, 609775167d2cSStephen M. Cameron * send a task abort request. 609875167d2cSStephen M. Cameron */ 609975167d2cSStephen M. Cameron static int hpsa_eh_abort_handler(struct scsi_cmnd *sc) 610075167d2cSStephen M. Cameron { 610175167d2cSStephen M. Cameron 6102a58e7e53SWebb Scales int rc; 610375167d2cSStephen M. Cameron struct ctlr_info *h; 610475167d2cSStephen M. Cameron struct hpsa_scsi_dev_t *dev; 610575167d2cSStephen M. Cameron struct CommandList *abort; /* pointer to command to be aborted */ 610675167d2cSStephen M. Cameron struct scsi_cmnd *as; /* ptr to scsi cmd inside aborted command. */ 610775167d2cSStephen M. Cameron char msg[256]; /* For debug messaging. */ 610875167d2cSStephen M. Cameron int ml = 0; 61092b08b3e9SDon Brace __le32 tagupper, taglower; 611025163bd5SWebb Scales int refcount, reply_queue; 611125163bd5SWebb Scales 611225163bd5SWebb Scales if (sc == NULL) 611325163bd5SWebb Scales return FAILED; 611475167d2cSStephen M. Cameron 61159b5c48c2SStephen Cameron if (sc->device == NULL) 61169b5c48c2SStephen Cameron return FAILED; 61179b5c48c2SStephen Cameron 611875167d2cSStephen M. Cameron /* Find the controller of the command to be aborted */ 611975167d2cSStephen M. Cameron h = sdev_to_hba(sc->device); 61209b5c48c2SStephen Cameron if (h == NULL) 612175167d2cSStephen M. Cameron return FAILED; 612275167d2cSStephen M. Cameron 612325163bd5SWebb Scales /* Find the device of the command to be aborted */ 612425163bd5SWebb Scales dev = sc->device->hostdata; 612525163bd5SWebb Scales if (!dev) { 612625163bd5SWebb Scales dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n", 612725163bd5SWebb Scales msg); 6128e345893bSDon Brace return FAILED; 612925163bd5SWebb Scales } 613025163bd5SWebb Scales 613125163bd5SWebb Scales /* If controller locked up, we can guarantee command won't complete */ 613225163bd5SWebb Scales if (lockup_detected(h)) { 613325163bd5SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, 613425163bd5SWebb Scales "ABORT FAILED, lockup detected"); 613525163bd5SWebb Scales return FAILED; 613625163bd5SWebb Scales } 613725163bd5SWebb Scales 613825163bd5SWebb Scales /* This is a good time to check if controller lockup has occurred */ 613925163bd5SWebb Scales if (detect_controller_lockup(h)) { 614025163bd5SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, 614125163bd5SWebb Scales "ABORT FAILED, new lockup detected"); 614225163bd5SWebb Scales return FAILED; 614325163bd5SWebb Scales } 6144e345893bSDon Brace 614575167d2cSStephen M. Cameron /* Check that controller supports some kind of task abort */ 614675167d2cSStephen M. Cameron if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) && 614775167d2cSStephen M. Cameron !(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags)) 614875167d2cSStephen M. Cameron return FAILED; 614975167d2cSStephen M. Cameron 615075167d2cSStephen M. Cameron memset(msg, 0, sizeof(msg)); 61514b761557SRobert Elliott ml += sprintf(msg+ml, "scsi %d:%d:%d:%llu %s %p", 615275167d2cSStephen M. Cameron h->scsi_host->host_no, sc->device->channel, 61530d96ef5fSWebb Scales sc->device->id, sc->device->lun, 61544b761557SRobert Elliott "Aborting command", sc); 615575167d2cSStephen M. Cameron 615675167d2cSStephen M. Cameron /* Get SCSI command to be aborted */ 615775167d2cSStephen M. Cameron abort = (struct CommandList *) sc->host_scribble; 615875167d2cSStephen M. Cameron if (abort == NULL) { 6159281a7fd0SWebb Scales /* This can happen if the command already completed. */ 6160281a7fd0SWebb Scales return SUCCESS; 6161281a7fd0SWebb Scales } 6162281a7fd0SWebb Scales refcount = atomic_inc_return(&abort->refcount); 6163281a7fd0SWebb Scales if (refcount == 1) { /* Command is done already. */ 6164281a7fd0SWebb Scales cmd_free(h, abort); 6165281a7fd0SWebb Scales return SUCCESS; 616675167d2cSStephen M. Cameron } 61679b5c48c2SStephen Cameron 61689b5c48c2SStephen Cameron /* Don't bother trying the abort if we know it won't work. */ 61699b5c48c2SStephen Cameron if (abort->cmd_type != CMD_IOACCEL2 && 61709b5c48c2SStephen Cameron abort->cmd_type != CMD_IOACCEL1 && !dev->supports_aborts) { 61719b5c48c2SStephen Cameron cmd_free(h, abort); 61729b5c48c2SStephen Cameron return FAILED; 61739b5c48c2SStephen Cameron } 61749b5c48c2SStephen Cameron 6175a58e7e53SWebb Scales /* 6176a58e7e53SWebb Scales * Check that we're aborting the right command. 6177a58e7e53SWebb Scales * It's possible the CommandList already completed and got re-used. 6178a58e7e53SWebb Scales */ 6179a58e7e53SWebb Scales if (abort->scsi_cmd != sc) { 6180a58e7e53SWebb Scales cmd_free(h, abort); 6181a58e7e53SWebb Scales return SUCCESS; 6182a58e7e53SWebb Scales } 6183a58e7e53SWebb Scales 6184a58e7e53SWebb Scales abort->abort_pending = true; 618517eb87d2SScott Teel hpsa_get_tag(h, abort, &taglower, &tagupper); 618625163bd5SWebb Scales reply_queue = hpsa_extract_reply_queue(h, abort); 618717eb87d2SScott Teel ml += sprintf(msg+ml, "Tag:0x%08x:%08x ", tagupper, taglower); 61887fa3030cSStephen Cameron as = abort->scsi_cmd; 618975167d2cSStephen M. Cameron if (as != NULL) 61904b761557SRobert Elliott ml += sprintf(msg+ml, 61914b761557SRobert Elliott "CDBLen: %d CDB: 0x%02x%02x... SN: 0x%lx ", 61924b761557SRobert Elliott as->cmd_len, as->cmnd[0], as->cmnd[1], 61934b761557SRobert Elliott as->serial_number); 61944b761557SRobert Elliott dev_warn(&h->pdev->dev, "%s BEING SENT\n", msg); 61950d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, "Aborting command"); 61964b761557SRobert Elliott 619775167d2cSStephen M. Cameron /* 619875167d2cSStephen M. Cameron * Command is in flight, or possibly already completed 619975167d2cSStephen M. Cameron * by the firmware (but not to the scsi mid layer) but we can't 620075167d2cSStephen M. Cameron * distinguish which. Send the abort down. 620175167d2cSStephen M. Cameron */ 62029b5c48c2SStephen Cameron if (wait_for_available_abort_cmd(h)) { 62039b5c48c2SStephen Cameron dev_warn(&h->pdev->dev, 62044b761557SRobert Elliott "%s FAILED, timeout waiting for an abort command to become available.\n", 62054b761557SRobert Elliott msg); 62069b5c48c2SStephen Cameron cmd_free(h, abort); 62079b5c48c2SStephen Cameron return FAILED; 62089b5c48c2SStephen Cameron } 620939f3deb2SDon Brace rc = hpsa_send_abort_both_ways(h, dev, abort, reply_queue); 62109b5c48c2SStephen Cameron atomic_inc(&h->abort_cmds_available); 62119b5c48c2SStephen Cameron wake_up_all(&h->abort_cmd_wait_queue); 621275167d2cSStephen M. Cameron if (rc != 0) { 62134b761557SRobert Elliott dev_warn(&h->pdev->dev, "%s SENT, FAILED\n", msg); 62140d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, 62150d96ef5fSWebb Scales "FAILED to abort command"); 6216281a7fd0SWebb Scales cmd_free(h, abort); 621775167d2cSStephen M. Cameron return FAILED; 621875167d2cSStephen M. Cameron } 62194b761557SRobert Elliott dev_info(&h->pdev->dev, "%s SENT, SUCCESS\n", msg); 6220d604f533SWebb Scales wait_event(h->event_sync_wait_queue, 6221a58e7e53SWebb Scales abort->scsi_cmd != sc || lockup_detected(h)); 6222281a7fd0SWebb Scales cmd_free(h, abort); 6223a58e7e53SWebb Scales return !lockup_detected(h) ? SUCCESS : FAILED; 622475167d2cSStephen M. Cameron } 622575167d2cSStephen M. Cameron 6226edd16368SStephen M. Cameron /* 622773153fe5SWebb Scales * For operations with an associated SCSI command, a command block is allocated 622873153fe5SWebb Scales * at init, and managed by cmd_tagged_alloc() and cmd_tagged_free() using the 622973153fe5SWebb Scales * block request tag as an index into a table of entries. cmd_tagged_free() is 623073153fe5SWebb Scales * the complement, although cmd_free() may be called instead. 623173153fe5SWebb Scales */ 623273153fe5SWebb Scales static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h, 623373153fe5SWebb Scales struct scsi_cmnd *scmd) 623473153fe5SWebb Scales { 623573153fe5SWebb Scales int idx = hpsa_get_cmd_index(scmd); 623673153fe5SWebb Scales struct CommandList *c = h->cmd_pool + idx; 623773153fe5SWebb Scales 623873153fe5SWebb Scales if (idx < HPSA_NRESERVED_CMDS || idx >= h->nr_cmds) { 623973153fe5SWebb Scales dev_err(&h->pdev->dev, "Bad block tag: %d not in [%d..%d]\n", 624073153fe5SWebb Scales idx, HPSA_NRESERVED_CMDS, h->nr_cmds - 1); 624173153fe5SWebb Scales /* The index value comes from the block layer, so if it's out of 624273153fe5SWebb Scales * bounds, it's probably not our bug. 624373153fe5SWebb Scales */ 624473153fe5SWebb Scales BUG(); 624573153fe5SWebb Scales } 624673153fe5SWebb Scales 624773153fe5SWebb Scales atomic_inc(&c->refcount); 624873153fe5SWebb Scales if (unlikely(!hpsa_is_cmd_idle(c))) { 624973153fe5SWebb Scales /* 625073153fe5SWebb Scales * We expect that the SCSI layer will hand us a unique tag 625173153fe5SWebb Scales * value. Thus, there should never be a collision here between 625273153fe5SWebb Scales * two requests...because if the selected command isn't idle 625373153fe5SWebb Scales * then someone is going to be very disappointed. 625473153fe5SWebb Scales */ 625573153fe5SWebb Scales dev_err(&h->pdev->dev, 625673153fe5SWebb Scales "tag collision (tag=%d) in cmd_tagged_alloc().\n", 625773153fe5SWebb Scales idx); 625873153fe5SWebb Scales if (c->scsi_cmd != NULL) 625973153fe5SWebb Scales scsi_print_command(c->scsi_cmd); 626073153fe5SWebb Scales scsi_print_command(scmd); 626173153fe5SWebb Scales } 626273153fe5SWebb Scales 626373153fe5SWebb Scales hpsa_cmd_partial_init(h, idx, c); 626473153fe5SWebb Scales return c; 626573153fe5SWebb Scales } 626673153fe5SWebb Scales 626773153fe5SWebb Scales static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c) 626873153fe5SWebb Scales { 626973153fe5SWebb Scales /* 627073153fe5SWebb Scales * Release our reference to the block. We don't need to do anything 627173153fe5SWebb Scales * else to free it, because it is accessed by index. (There's no point 627273153fe5SWebb Scales * in checking the result of the decrement, since we cannot guarantee 627373153fe5SWebb Scales * that there isn't a concurrent abort which is also accessing it.) 627473153fe5SWebb Scales */ 627573153fe5SWebb Scales (void)atomic_dec(&c->refcount); 627673153fe5SWebb Scales } 627773153fe5SWebb Scales 627873153fe5SWebb Scales /* 6279edd16368SStephen M. Cameron * For operations that cannot sleep, a command block is allocated at init, 6280edd16368SStephen M. Cameron * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track 6281edd16368SStephen M. Cameron * which ones are free or in use. Lock must be held when calling this. 6282edd16368SStephen M. Cameron * cmd_free() is the complement. 6283bf43caf3SRobert Elliott * This function never gives up and returns NULL. If it hangs, 6284bf43caf3SRobert Elliott * another thread must call cmd_free() to free some tags. 6285edd16368SStephen M. Cameron */ 6286281a7fd0SWebb Scales 6287edd16368SStephen M. Cameron static struct CommandList *cmd_alloc(struct ctlr_info *h) 6288edd16368SStephen M. Cameron { 6289edd16368SStephen M. Cameron struct CommandList *c; 6290360c73bdSStephen Cameron int refcount, i; 629173153fe5SWebb Scales int offset = 0; 6292edd16368SStephen M. Cameron 629333811026SRobert Elliott /* 629433811026SRobert Elliott * There is some *extremely* small but non-zero chance that that 62954c413128SStephen M. Cameron * multiple threads could get in here, and one thread could 62964c413128SStephen M. Cameron * be scanning through the list of bits looking for a free 62974c413128SStephen M. Cameron * one, but the free ones are always behind him, and other 62984c413128SStephen M. Cameron * threads sneak in behind him and eat them before he can 62994c413128SStephen M. Cameron * get to them, so that while there is always a free one, a 63004c413128SStephen M. Cameron * very unlucky thread might be starved anyway, never able to 63014c413128SStephen M. Cameron * beat the other threads. In reality, this happens so 63024c413128SStephen M. Cameron * infrequently as to be indistinguishable from never. 630373153fe5SWebb Scales * 630473153fe5SWebb Scales * Note that we start allocating commands before the SCSI host structure 630573153fe5SWebb Scales * is initialized. Since the search starts at bit zero, this 630673153fe5SWebb Scales * all works, since we have at least one command structure available; 630773153fe5SWebb Scales * however, it means that the structures with the low indexes have to be 630873153fe5SWebb Scales * reserved for driver-initiated requests, while requests from the block 630973153fe5SWebb Scales * layer will use the higher indexes. 63104c413128SStephen M. Cameron */ 63114c413128SStephen M. Cameron 6312281a7fd0SWebb Scales for (;;) { 631373153fe5SWebb Scales i = find_next_zero_bit(h->cmd_pool_bits, 631473153fe5SWebb Scales HPSA_NRESERVED_CMDS, 631573153fe5SWebb Scales offset); 631673153fe5SWebb Scales if (unlikely(i >= HPSA_NRESERVED_CMDS)) { 6317281a7fd0SWebb Scales offset = 0; 6318281a7fd0SWebb Scales continue; 6319281a7fd0SWebb Scales } 6320edd16368SStephen M. Cameron c = h->cmd_pool + i; 6321281a7fd0SWebb Scales refcount = atomic_inc_return(&c->refcount); 6322281a7fd0SWebb Scales if (unlikely(refcount > 1)) { 6323281a7fd0SWebb Scales cmd_free(h, c); /* already in use */ 632473153fe5SWebb Scales offset = (i + 1) % HPSA_NRESERVED_CMDS; 6325281a7fd0SWebb Scales continue; 6326281a7fd0SWebb Scales } 6327281a7fd0SWebb Scales set_bit(i & (BITS_PER_LONG - 1), 6328281a7fd0SWebb Scales h->cmd_pool_bits + (i / BITS_PER_LONG)); 6329281a7fd0SWebb Scales break; /* it's ours now. */ 6330281a7fd0SWebb Scales } 6331360c73bdSStephen Cameron hpsa_cmd_partial_init(h, i, c); 6332edd16368SStephen M. Cameron return c; 6333edd16368SStephen M. Cameron } 6334edd16368SStephen M. Cameron 633573153fe5SWebb Scales /* 633673153fe5SWebb Scales * This is the complementary operation to cmd_alloc(). Note, however, in some 633773153fe5SWebb Scales * corner cases it may also be used to free blocks allocated by 633873153fe5SWebb Scales * cmd_tagged_alloc() in which case the ref-count decrement does the trick and 633973153fe5SWebb Scales * the clear-bit is harmless. 634073153fe5SWebb Scales */ 6341edd16368SStephen M. Cameron static void cmd_free(struct ctlr_info *h, struct CommandList *c) 6342edd16368SStephen M. Cameron { 6343281a7fd0SWebb Scales if (atomic_dec_and_test(&c->refcount)) { 6344edd16368SStephen M. Cameron int i; 6345edd16368SStephen M. Cameron 6346edd16368SStephen M. Cameron i = c - h->cmd_pool; 6347edd16368SStephen M. Cameron clear_bit(i & (BITS_PER_LONG - 1), 6348edd16368SStephen M. Cameron h->cmd_pool_bits + (i / BITS_PER_LONG)); 6349edd16368SStephen M. Cameron } 6350281a7fd0SWebb Scales } 6351edd16368SStephen M. Cameron 6352edd16368SStephen M. Cameron #ifdef CONFIG_COMPAT 6353edd16368SStephen M. Cameron 635442a91641SDon Brace static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, 635542a91641SDon Brace void __user *arg) 6356edd16368SStephen M. Cameron { 6357edd16368SStephen M. Cameron IOCTL32_Command_struct __user *arg32 = 6358edd16368SStephen M. Cameron (IOCTL32_Command_struct __user *) arg; 6359edd16368SStephen M. Cameron IOCTL_Command_struct arg64; 6360edd16368SStephen M. Cameron IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64)); 6361edd16368SStephen M. Cameron int err; 6362edd16368SStephen M. Cameron u32 cp; 6363edd16368SStephen M. Cameron 6364938abd84SVasiliy Kulikov memset(&arg64, 0, sizeof(arg64)); 6365edd16368SStephen M. Cameron err = 0; 6366edd16368SStephen M. Cameron err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 6367edd16368SStephen M. Cameron sizeof(arg64.LUN_info)); 6368edd16368SStephen M. Cameron err |= copy_from_user(&arg64.Request, &arg32->Request, 6369edd16368SStephen M. Cameron sizeof(arg64.Request)); 6370edd16368SStephen M. Cameron err |= copy_from_user(&arg64.error_info, &arg32->error_info, 6371edd16368SStephen M. Cameron sizeof(arg64.error_info)); 6372edd16368SStephen M. Cameron err |= get_user(arg64.buf_size, &arg32->buf_size); 6373edd16368SStephen M. Cameron err |= get_user(cp, &arg32->buf); 6374edd16368SStephen M. Cameron arg64.buf = compat_ptr(cp); 6375edd16368SStephen M. Cameron err |= copy_to_user(p, &arg64, sizeof(arg64)); 6376edd16368SStephen M. Cameron 6377edd16368SStephen M. Cameron if (err) 6378edd16368SStephen M. Cameron return -EFAULT; 6379edd16368SStephen M. Cameron 638042a91641SDon Brace err = hpsa_ioctl(dev, CCISS_PASSTHRU, p); 6381edd16368SStephen M. Cameron if (err) 6382edd16368SStephen M. Cameron return err; 6383edd16368SStephen M. Cameron err |= copy_in_user(&arg32->error_info, &p->error_info, 6384edd16368SStephen M. Cameron sizeof(arg32->error_info)); 6385edd16368SStephen M. Cameron if (err) 6386edd16368SStephen M. Cameron return -EFAULT; 6387edd16368SStephen M. Cameron return err; 6388edd16368SStephen M. Cameron } 6389edd16368SStephen M. Cameron 6390edd16368SStephen M. Cameron static int hpsa_ioctl32_big_passthru(struct scsi_device *dev, 639142a91641SDon Brace int cmd, void __user *arg) 6392edd16368SStephen M. Cameron { 6393edd16368SStephen M. Cameron BIG_IOCTL32_Command_struct __user *arg32 = 6394edd16368SStephen M. Cameron (BIG_IOCTL32_Command_struct __user *) arg; 6395edd16368SStephen M. Cameron BIG_IOCTL_Command_struct arg64; 6396edd16368SStephen M. Cameron BIG_IOCTL_Command_struct __user *p = 6397edd16368SStephen M. Cameron compat_alloc_user_space(sizeof(arg64)); 6398edd16368SStephen M. Cameron int err; 6399edd16368SStephen M. Cameron u32 cp; 6400edd16368SStephen M. Cameron 6401938abd84SVasiliy Kulikov memset(&arg64, 0, sizeof(arg64)); 6402edd16368SStephen M. Cameron err = 0; 6403edd16368SStephen M. Cameron err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 6404edd16368SStephen M. Cameron sizeof(arg64.LUN_info)); 6405edd16368SStephen M. Cameron err |= copy_from_user(&arg64.Request, &arg32->Request, 6406edd16368SStephen M. Cameron sizeof(arg64.Request)); 6407edd16368SStephen M. Cameron err |= copy_from_user(&arg64.error_info, &arg32->error_info, 6408edd16368SStephen M. Cameron sizeof(arg64.error_info)); 6409edd16368SStephen M. Cameron err |= get_user(arg64.buf_size, &arg32->buf_size); 6410edd16368SStephen M. Cameron err |= get_user(arg64.malloc_size, &arg32->malloc_size); 6411edd16368SStephen M. Cameron err |= get_user(cp, &arg32->buf); 6412edd16368SStephen M. Cameron arg64.buf = compat_ptr(cp); 6413edd16368SStephen M. Cameron err |= copy_to_user(p, &arg64, sizeof(arg64)); 6414edd16368SStephen M. Cameron 6415edd16368SStephen M. Cameron if (err) 6416edd16368SStephen M. Cameron return -EFAULT; 6417edd16368SStephen M. Cameron 641842a91641SDon Brace err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, p); 6419edd16368SStephen M. Cameron if (err) 6420edd16368SStephen M. Cameron return err; 6421edd16368SStephen M. Cameron err |= copy_in_user(&arg32->error_info, &p->error_info, 6422edd16368SStephen M. Cameron sizeof(arg32->error_info)); 6423edd16368SStephen M. Cameron if (err) 6424edd16368SStephen M. Cameron return -EFAULT; 6425edd16368SStephen M. Cameron return err; 6426edd16368SStephen M. Cameron } 642771fe75a7SStephen M. Cameron 642842a91641SDon Brace static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void __user *arg) 642971fe75a7SStephen M. Cameron { 643071fe75a7SStephen M. Cameron switch (cmd) { 643171fe75a7SStephen M. Cameron case CCISS_GETPCIINFO: 643271fe75a7SStephen M. Cameron case CCISS_GETINTINFO: 643371fe75a7SStephen M. Cameron case CCISS_SETINTINFO: 643471fe75a7SStephen M. Cameron case CCISS_GETNODENAME: 643571fe75a7SStephen M. Cameron case CCISS_SETNODENAME: 643671fe75a7SStephen M. Cameron case CCISS_GETHEARTBEAT: 643771fe75a7SStephen M. Cameron case CCISS_GETBUSTYPES: 643871fe75a7SStephen M. Cameron case CCISS_GETFIRMVER: 643971fe75a7SStephen M. Cameron case CCISS_GETDRIVVER: 644071fe75a7SStephen M. Cameron case CCISS_REVALIDVOLS: 644171fe75a7SStephen M. Cameron case CCISS_DEREGDISK: 644271fe75a7SStephen M. Cameron case CCISS_REGNEWDISK: 644371fe75a7SStephen M. Cameron case CCISS_REGNEWD: 644471fe75a7SStephen M. Cameron case CCISS_RESCANDISK: 644571fe75a7SStephen M. Cameron case CCISS_GETLUNINFO: 644671fe75a7SStephen M. Cameron return hpsa_ioctl(dev, cmd, arg); 644771fe75a7SStephen M. Cameron 644871fe75a7SStephen M. Cameron case CCISS_PASSTHRU32: 644971fe75a7SStephen M. Cameron return hpsa_ioctl32_passthru(dev, cmd, arg); 645071fe75a7SStephen M. Cameron case CCISS_BIG_PASSTHRU32: 645171fe75a7SStephen M. Cameron return hpsa_ioctl32_big_passthru(dev, cmd, arg); 645271fe75a7SStephen M. Cameron 645371fe75a7SStephen M. Cameron default: 645471fe75a7SStephen M. Cameron return -ENOIOCTLCMD; 645571fe75a7SStephen M. Cameron } 645671fe75a7SStephen M. Cameron } 6457edd16368SStephen M. Cameron #endif 6458edd16368SStephen M. Cameron 6459edd16368SStephen M. Cameron static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp) 6460edd16368SStephen M. Cameron { 6461edd16368SStephen M. Cameron struct hpsa_pci_info pciinfo; 6462edd16368SStephen M. Cameron 6463edd16368SStephen M. Cameron if (!argp) 6464edd16368SStephen M. Cameron return -EINVAL; 6465edd16368SStephen M. Cameron pciinfo.domain = pci_domain_nr(h->pdev->bus); 6466edd16368SStephen M. Cameron pciinfo.bus = h->pdev->bus->number; 6467edd16368SStephen M. Cameron pciinfo.dev_fn = h->pdev->devfn; 6468edd16368SStephen M. Cameron pciinfo.board_id = h->board_id; 6469edd16368SStephen M. Cameron if (copy_to_user(argp, &pciinfo, sizeof(pciinfo))) 6470edd16368SStephen M. Cameron return -EFAULT; 6471edd16368SStephen M. Cameron return 0; 6472edd16368SStephen M. Cameron } 6473edd16368SStephen M. Cameron 6474edd16368SStephen M. Cameron static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp) 6475edd16368SStephen M. Cameron { 6476edd16368SStephen M. Cameron DriverVer_type DriverVer; 6477edd16368SStephen M. Cameron unsigned char vmaj, vmin, vsubmin; 6478edd16368SStephen M. Cameron int rc; 6479edd16368SStephen M. Cameron 6480edd16368SStephen M. Cameron rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu", 6481edd16368SStephen M. Cameron &vmaj, &vmin, &vsubmin); 6482edd16368SStephen M. Cameron if (rc != 3) { 6483edd16368SStephen M. Cameron dev_info(&h->pdev->dev, "driver version string '%s' " 6484edd16368SStephen M. Cameron "unrecognized.", HPSA_DRIVER_VERSION); 6485edd16368SStephen M. Cameron vmaj = 0; 6486edd16368SStephen M. Cameron vmin = 0; 6487edd16368SStephen M. Cameron vsubmin = 0; 6488edd16368SStephen M. Cameron } 6489edd16368SStephen M. Cameron DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin; 6490edd16368SStephen M. Cameron if (!argp) 6491edd16368SStephen M. Cameron return -EINVAL; 6492edd16368SStephen M. Cameron if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type))) 6493edd16368SStephen M. Cameron return -EFAULT; 6494edd16368SStephen M. Cameron return 0; 6495edd16368SStephen M. Cameron } 6496edd16368SStephen M. Cameron 6497edd16368SStephen M. Cameron static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp) 6498edd16368SStephen M. Cameron { 6499edd16368SStephen M. Cameron IOCTL_Command_struct iocommand; 6500edd16368SStephen M. Cameron struct CommandList *c; 6501edd16368SStephen M. Cameron char *buff = NULL; 650250a0decfSStephen M. Cameron u64 temp64; 6503c1f63c8fSStephen M. Cameron int rc = 0; 6504edd16368SStephen M. Cameron 6505edd16368SStephen M. Cameron if (!argp) 6506edd16368SStephen M. Cameron return -EINVAL; 6507edd16368SStephen M. Cameron if (!capable(CAP_SYS_RAWIO)) 6508edd16368SStephen M. Cameron return -EPERM; 6509edd16368SStephen M. Cameron if (copy_from_user(&iocommand, argp, sizeof(iocommand))) 6510edd16368SStephen M. Cameron return -EFAULT; 6511edd16368SStephen M. Cameron if ((iocommand.buf_size < 1) && 6512edd16368SStephen M. Cameron (iocommand.Request.Type.Direction != XFER_NONE)) { 6513edd16368SStephen M. Cameron return -EINVAL; 6514edd16368SStephen M. Cameron } 6515edd16368SStephen M. Cameron if (iocommand.buf_size > 0) { 6516edd16368SStephen M. Cameron buff = kmalloc(iocommand.buf_size, GFP_KERNEL); 6517edd16368SStephen M. Cameron if (buff == NULL) 65182dd02d74SRobert Elliott return -ENOMEM; 65199233fb10SStephen M. Cameron if (iocommand.Request.Type.Direction & XFER_WRITE) { 6520edd16368SStephen M. Cameron /* Copy the data into the buffer we created */ 6521b03a7771SStephen M. Cameron if (copy_from_user(buff, iocommand.buf, 6522b03a7771SStephen M. Cameron iocommand.buf_size)) { 6523c1f63c8fSStephen M. Cameron rc = -EFAULT; 6524c1f63c8fSStephen M. Cameron goto out_kfree; 6525edd16368SStephen M. Cameron } 6526b03a7771SStephen M. Cameron } else { 6527edd16368SStephen M. Cameron memset(buff, 0, iocommand.buf_size); 6528b03a7771SStephen M. Cameron } 6529b03a7771SStephen M. Cameron } 653045fcb86eSStephen Cameron c = cmd_alloc(h); 6531bf43caf3SRobert Elliott 6532edd16368SStephen M. Cameron /* Fill in the command type */ 6533edd16368SStephen M. Cameron c->cmd_type = CMD_IOCTL_PEND; 6534a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 6535edd16368SStephen M. Cameron /* Fill in Command Header */ 6536edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; /* unused in simple mode */ 6537edd16368SStephen M. Cameron if (iocommand.buf_size > 0) { /* buffer to fill */ 6538edd16368SStephen M. Cameron c->Header.SGList = 1; 653950a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(1); 6540edd16368SStephen M. Cameron } else { /* no buffers to fill */ 6541edd16368SStephen M. Cameron c->Header.SGList = 0; 654250a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(0); 6543edd16368SStephen M. Cameron } 6544edd16368SStephen M. Cameron memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN)); 6545edd16368SStephen M. Cameron 6546edd16368SStephen M. Cameron /* Fill in Request block */ 6547edd16368SStephen M. Cameron memcpy(&c->Request, &iocommand.Request, 6548edd16368SStephen M. Cameron sizeof(c->Request)); 6549edd16368SStephen M. Cameron 6550edd16368SStephen M. Cameron /* Fill in the scatter gather information */ 6551edd16368SStephen M. Cameron if (iocommand.buf_size > 0) { 655250a0decfSStephen M. Cameron temp64 = pci_map_single(h->pdev, buff, 6553edd16368SStephen M. Cameron iocommand.buf_size, PCI_DMA_BIDIRECTIONAL); 655450a0decfSStephen M. Cameron if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) { 655550a0decfSStephen M. Cameron c->SG[0].Addr = cpu_to_le64(0); 655650a0decfSStephen M. Cameron c->SG[0].Len = cpu_to_le32(0); 6557bcc48ffaSStephen M. Cameron rc = -ENOMEM; 6558bcc48ffaSStephen M. Cameron goto out; 6559bcc48ffaSStephen M. Cameron } 656050a0decfSStephen M. Cameron c->SG[0].Addr = cpu_to_le64(temp64); 656150a0decfSStephen M. Cameron c->SG[0].Len = cpu_to_le32(iocommand.buf_size); 656250a0decfSStephen M. Cameron c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */ 6563edd16368SStephen M. Cameron } 6564c448ecfaSDon Brace rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 65653fb134cbSDon Brace NO_TIMEOUT); 6566c2dd32e0SStephen M. Cameron if (iocommand.buf_size > 0) 6567edd16368SStephen M. Cameron hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL); 6568edd16368SStephen M. Cameron check_ioctl_unit_attention(h, c); 656925163bd5SWebb Scales if (rc) { 657025163bd5SWebb Scales rc = -EIO; 657125163bd5SWebb Scales goto out; 657225163bd5SWebb Scales } 6573edd16368SStephen M. Cameron 6574edd16368SStephen M. Cameron /* Copy the error information out */ 6575edd16368SStephen M. Cameron memcpy(&iocommand.error_info, c->err_info, 6576edd16368SStephen M. Cameron sizeof(iocommand.error_info)); 6577edd16368SStephen M. Cameron if (copy_to_user(argp, &iocommand, sizeof(iocommand))) { 6578c1f63c8fSStephen M. Cameron rc = -EFAULT; 6579c1f63c8fSStephen M. Cameron goto out; 6580edd16368SStephen M. Cameron } 65819233fb10SStephen M. Cameron if ((iocommand.Request.Type.Direction & XFER_READ) && 6582b03a7771SStephen M. Cameron iocommand.buf_size > 0) { 6583edd16368SStephen M. Cameron /* Copy the data out of the buffer we created */ 6584edd16368SStephen M. Cameron if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) { 6585c1f63c8fSStephen M. Cameron rc = -EFAULT; 6586c1f63c8fSStephen M. Cameron goto out; 6587edd16368SStephen M. Cameron } 6588edd16368SStephen M. Cameron } 6589c1f63c8fSStephen M. Cameron out: 659045fcb86eSStephen Cameron cmd_free(h, c); 6591c1f63c8fSStephen M. Cameron out_kfree: 6592c1f63c8fSStephen M. Cameron kfree(buff); 6593c1f63c8fSStephen M. Cameron return rc; 6594edd16368SStephen M. Cameron } 6595edd16368SStephen M. Cameron 6596edd16368SStephen M. Cameron static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp) 6597edd16368SStephen M. Cameron { 6598edd16368SStephen M. Cameron BIG_IOCTL_Command_struct *ioc; 6599edd16368SStephen M. Cameron struct CommandList *c; 6600edd16368SStephen M. Cameron unsigned char **buff = NULL; 6601edd16368SStephen M. Cameron int *buff_size = NULL; 660250a0decfSStephen M. Cameron u64 temp64; 6603edd16368SStephen M. Cameron BYTE sg_used = 0; 6604edd16368SStephen M. Cameron int status = 0; 660501a02ffcSStephen M. Cameron u32 left; 660601a02ffcSStephen M. Cameron u32 sz; 6607edd16368SStephen M. Cameron BYTE __user *data_ptr; 6608edd16368SStephen M. Cameron 6609edd16368SStephen M. Cameron if (!argp) 6610edd16368SStephen M. Cameron return -EINVAL; 6611edd16368SStephen M. Cameron if (!capable(CAP_SYS_RAWIO)) 6612edd16368SStephen M. Cameron return -EPERM; 6613edd16368SStephen M. Cameron ioc = (BIG_IOCTL_Command_struct *) 6614edd16368SStephen M. Cameron kmalloc(sizeof(*ioc), GFP_KERNEL); 6615edd16368SStephen M. Cameron if (!ioc) { 6616edd16368SStephen M. Cameron status = -ENOMEM; 6617edd16368SStephen M. Cameron goto cleanup1; 6618edd16368SStephen M. Cameron } 6619edd16368SStephen M. Cameron if (copy_from_user(ioc, argp, sizeof(*ioc))) { 6620edd16368SStephen M. Cameron status = -EFAULT; 6621edd16368SStephen M. Cameron goto cleanup1; 6622edd16368SStephen M. Cameron } 6623edd16368SStephen M. Cameron if ((ioc->buf_size < 1) && 6624edd16368SStephen M. Cameron (ioc->Request.Type.Direction != XFER_NONE)) { 6625edd16368SStephen M. Cameron status = -EINVAL; 6626edd16368SStephen M. Cameron goto cleanup1; 6627edd16368SStephen M. Cameron } 6628edd16368SStephen M. Cameron /* Check kmalloc limits using all SGs */ 6629edd16368SStephen M. Cameron if (ioc->malloc_size > MAX_KMALLOC_SIZE) { 6630edd16368SStephen M. Cameron status = -EINVAL; 6631edd16368SStephen M. Cameron goto cleanup1; 6632edd16368SStephen M. Cameron } 6633d66ae08bSStephen M. Cameron if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) { 6634edd16368SStephen M. Cameron status = -EINVAL; 6635edd16368SStephen M. Cameron goto cleanup1; 6636edd16368SStephen M. Cameron } 6637d66ae08bSStephen M. Cameron buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL); 6638edd16368SStephen M. Cameron if (!buff) { 6639edd16368SStephen M. Cameron status = -ENOMEM; 6640edd16368SStephen M. Cameron goto cleanup1; 6641edd16368SStephen M. Cameron } 6642d66ae08bSStephen M. Cameron buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL); 6643edd16368SStephen M. Cameron if (!buff_size) { 6644edd16368SStephen M. Cameron status = -ENOMEM; 6645edd16368SStephen M. Cameron goto cleanup1; 6646edd16368SStephen M. Cameron } 6647edd16368SStephen M. Cameron left = ioc->buf_size; 6648edd16368SStephen M. Cameron data_ptr = ioc->buf; 6649edd16368SStephen M. Cameron while (left) { 6650edd16368SStephen M. Cameron sz = (left > ioc->malloc_size) ? ioc->malloc_size : left; 6651edd16368SStephen M. Cameron buff_size[sg_used] = sz; 6652edd16368SStephen M. Cameron buff[sg_used] = kmalloc(sz, GFP_KERNEL); 6653edd16368SStephen M. Cameron if (buff[sg_used] == NULL) { 6654edd16368SStephen M. Cameron status = -ENOMEM; 6655edd16368SStephen M. Cameron goto cleanup1; 6656edd16368SStephen M. Cameron } 66579233fb10SStephen M. Cameron if (ioc->Request.Type.Direction & XFER_WRITE) { 6658edd16368SStephen M. Cameron if (copy_from_user(buff[sg_used], data_ptr, sz)) { 66590758f4f7SStephen M. Cameron status = -EFAULT; 6660edd16368SStephen M. Cameron goto cleanup1; 6661edd16368SStephen M. Cameron } 6662edd16368SStephen M. Cameron } else 6663edd16368SStephen M. Cameron memset(buff[sg_used], 0, sz); 6664edd16368SStephen M. Cameron left -= sz; 6665edd16368SStephen M. Cameron data_ptr += sz; 6666edd16368SStephen M. Cameron sg_used++; 6667edd16368SStephen M. Cameron } 666845fcb86eSStephen Cameron c = cmd_alloc(h); 6669bf43caf3SRobert Elliott 6670edd16368SStephen M. Cameron c->cmd_type = CMD_IOCTL_PEND; 6671a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 6672edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; 667350a0decfSStephen M. Cameron c->Header.SGList = (u8) sg_used; 667450a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(sg_used); 6675edd16368SStephen M. Cameron memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN)); 6676edd16368SStephen M. Cameron memcpy(&c->Request, &ioc->Request, sizeof(c->Request)); 6677edd16368SStephen M. Cameron if (ioc->buf_size > 0) { 6678edd16368SStephen M. Cameron int i; 6679edd16368SStephen M. Cameron for (i = 0; i < sg_used; i++) { 668050a0decfSStephen M. Cameron temp64 = pci_map_single(h->pdev, buff[i], 6681edd16368SStephen M. Cameron buff_size[i], PCI_DMA_BIDIRECTIONAL); 668250a0decfSStephen M. Cameron if (dma_mapping_error(&h->pdev->dev, 668350a0decfSStephen M. Cameron (dma_addr_t) temp64)) { 668450a0decfSStephen M. Cameron c->SG[i].Addr = cpu_to_le64(0); 668550a0decfSStephen M. Cameron c->SG[i].Len = cpu_to_le32(0); 6686bcc48ffaSStephen M. Cameron hpsa_pci_unmap(h->pdev, c, i, 6687bcc48ffaSStephen M. Cameron PCI_DMA_BIDIRECTIONAL); 6688bcc48ffaSStephen M. Cameron status = -ENOMEM; 6689e2d4a1f6SStephen M. Cameron goto cleanup0; 6690bcc48ffaSStephen M. Cameron } 669150a0decfSStephen M. Cameron c->SG[i].Addr = cpu_to_le64(temp64); 669250a0decfSStephen M. Cameron c->SG[i].Len = cpu_to_le32(buff_size[i]); 669350a0decfSStephen M. Cameron c->SG[i].Ext = cpu_to_le32(0); 6694edd16368SStephen M. Cameron } 669550a0decfSStephen M. Cameron c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST); 6696edd16368SStephen M. Cameron } 6697c448ecfaSDon Brace status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 66983fb134cbSDon Brace NO_TIMEOUT); 6699b03a7771SStephen M. Cameron if (sg_used) 6700edd16368SStephen M. Cameron hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL); 6701edd16368SStephen M. Cameron check_ioctl_unit_attention(h, c); 670225163bd5SWebb Scales if (status) { 670325163bd5SWebb Scales status = -EIO; 670425163bd5SWebb Scales goto cleanup0; 670525163bd5SWebb Scales } 670625163bd5SWebb Scales 6707edd16368SStephen M. Cameron /* Copy the error information out */ 6708edd16368SStephen M. Cameron memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info)); 6709edd16368SStephen M. Cameron if (copy_to_user(argp, ioc, sizeof(*ioc))) { 6710edd16368SStephen M. Cameron status = -EFAULT; 6711e2d4a1f6SStephen M. Cameron goto cleanup0; 6712edd16368SStephen M. Cameron } 67139233fb10SStephen M. Cameron if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) { 67142b08b3e9SDon Brace int i; 67152b08b3e9SDon Brace 6716edd16368SStephen M. Cameron /* Copy the data out of the buffer we created */ 6717edd16368SStephen M. Cameron BYTE __user *ptr = ioc->buf; 6718edd16368SStephen M. Cameron for (i = 0; i < sg_used; i++) { 6719edd16368SStephen M. Cameron if (copy_to_user(ptr, buff[i], buff_size[i])) { 6720edd16368SStephen M. Cameron status = -EFAULT; 6721e2d4a1f6SStephen M. Cameron goto cleanup0; 6722edd16368SStephen M. Cameron } 6723edd16368SStephen M. Cameron ptr += buff_size[i]; 6724edd16368SStephen M. Cameron } 6725edd16368SStephen M. Cameron } 6726edd16368SStephen M. Cameron status = 0; 6727e2d4a1f6SStephen M. Cameron cleanup0: 672845fcb86eSStephen Cameron cmd_free(h, c); 6729edd16368SStephen M. Cameron cleanup1: 6730edd16368SStephen M. Cameron if (buff) { 67312b08b3e9SDon Brace int i; 67322b08b3e9SDon Brace 6733edd16368SStephen M. Cameron for (i = 0; i < sg_used; i++) 6734edd16368SStephen M. Cameron kfree(buff[i]); 6735edd16368SStephen M. Cameron kfree(buff); 6736edd16368SStephen M. Cameron } 6737edd16368SStephen M. Cameron kfree(buff_size); 6738edd16368SStephen M. Cameron kfree(ioc); 6739edd16368SStephen M. Cameron return status; 6740edd16368SStephen M. Cameron } 6741edd16368SStephen M. Cameron 6742edd16368SStephen M. Cameron static void check_ioctl_unit_attention(struct ctlr_info *h, 6743edd16368SStephen M. Cameron struct CommandList *c) 6744edd16368SStephen M. Cameron { 6745edd16368SStephen M. Cameron if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 6746edd16368SStephen M. Cameron c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) 6747edd16368SStephen M. Cameron (void) check_for_unit_attention(h, c); 6748edd16368SStephen M. Cameron } 67490390f0c0SStephen M. Cameron 6750edd16368SStephen M. Cameron /* 6751edd16368SStephen M. Cameron * ioctl 6752edd16368SStephen M. Cameron */ 675342a91641SDon Brace static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg) 6754edd16368SStephen M. Cameron { 6755edd16368SStephen M. Cameron struct ctlr_info *h; 6756edd16368SStephen M. Cameron void __user *argp = (void __user *)arg; 67570390f0c0SStephen M. Cameron int rc; 6758edd16368SStephen M. Cameron 6759edd16368SStephen M. Cameron h = sdev_to_hba(dev); 6760edd16368SStephen M. Cameron 6761edd16368SStephen M. Cameron switch (cmd) { 6762edd16368SStephen M. Cameron case CCISS_DEREGDISK: 6763edd16368SStephen M. Cameron case CCISS_REGNEWDISK: 6764edd16368SStephen M. Cameron case CCISS_REGNEWD: 6765a08a8471SStephen M. Cameron hpsa_scan_start(h->scsi_host); 6766edd16368SStephen M. Cameron return 0; 6767edd16368SStephen M. Cameron case CCISS_GETPCIINFO: 6768edd16368SStephen M. Cameron return hpsa_getpciinfo_ioctl(h, argp); 6769edd16368SStephen M. Cameron case CCISS_GETDRIVVER: 6770edd16368SStephen M. Cameron return hpsa_getdrivver_ioctl(h, argp); 6771edd16368SStephen M. Cameron case CCISS_PASSTHRU: 677234f0c627SDon Brace if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 67730390f0c0SStephen M. Cameron return -EAGAIN; 67740390f0c0SStephen M. Cameron rc = hpsa_passthru_ioctl(h, argp); 677534f0c627SDon Brace atomic_inc(&h->passthru_cmds_avail); 67760390f0c0SStephen M. Cameron return rc; 6777edd16368SStephen M. Cameron case CCISS_BIG_PASSTHRU: 677834f0c627SDon Brace if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 67790390f0c0SStephen M. Cameron return -EAGAIN; 67800390f0c0SStephen M. Cameron rc = hpsa_big_passthru_ioctl(h, argp); 678134f0c627SDon Brace atomic_inc(&h->passthru_cmds_avail); 67820390f0c0SStephen M. Cameron return rc; 6783edd16368SStephen M. Cameron default: 6784edd16368SStephen M. Cameron return -ENOTTY; 6785edd16368SStephen M. Cameron } 6786edd16368SStephen M. Cameron } 6787edd16368SStephen M. Cameron 6788bf43caf3SRobert Elliott static void hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr, 67896f039790SGreg Kroah-Hartman u8 reset_type) 679064670ac8SStephen M. Cameron { 679164670ac8SStephen M. Cameron struct CommandList *c; 679264670ac8SStephen M. Cameron 679364670ac8SStephen M. Cameron c = cmd_alloc(h); 6794bf43caf3SRobert Elliott 6795a2dac136SStephen M. Cameron /* fill_cmd can't fail here, no data buffer to map */ 6796a2dac136SStephen M. Cameron (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, 679764670ac8SStephen M. Cameron RAID_CTLR_LUNID, TYPE_MSG); 679864670ac8SStephen M. Cameron c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */ 679964670ac8SStephen M. Cameron c->waiting = NULL; 680064670ac8SStephen M. Cameron enqueue_cmd_and_start_io(h, c); 680164670ac8SStephen M. Cameron /* Don't wait for completion, the reset won't complete. Don't free 680264670ac8SStephen M. Cameron * the command either. This is the last command we will send before 680364670ac8SStephen M. Cameron * re-initializing everything, so it doesn't matter and won't leak. 680464670ac8SStephen M. Cameron */ 6805bf43caf3SRobert Elliott return; 680664670ac8SStephen M. Cameron } 680764670ac8SStephen M. Cameron 6808a2dac136SStephen M. Cameron static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 6809b7bb24ebSStephen M. Cameron void *buff, size_t size, u16 page_code, unsigned char *scsi3addr, 6810edd16368SStephen M. Cameron int cmd_type) 6811edd16368SStephen M. Cameron { 6812edd16368SStephen M. Cameron int pci_dir = XFER_NONE; 68139b5c48c2SStephen Cameron u64 tag; /* for commands to be aborted */ 6814edd16368SStephen M. Cameron 6815edd16368SStephen M. Cameron c->cmd_type = CMD_IOCTL_PEND; 6816a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 6817edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; 6818edd16368SStephen M. Cameron if (buff != NULL && size > 0) { 6819edd16368SStephen M. Cameron c->Header.SGList = 1; 682050a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(1); 6821edd16368SStephen M. Cameron } else { 6822edd16368SStephen M. Cameron c->Header.SGList = 0; 682350a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(0); 6824edd16368SStephen M. Cameron } 6825edd16368SStephen M. Cameron memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8); 6826edd16368SStephen M. Cameron 6827edd16368SStephen M. Cameron if (cmd_type == TYPE_CMD) { 6828edd16368SStephen M. Cameron switch (cmd) { 6829edd16368SStephen M. Cameron case HPSA_INQUIRY: 6830edd16368SStephen M. Cameron /* are we trying to read a vital product page */ 6831b7bb24ebSStephen M. Cameron if (page_code & VPD_PAGE) { 6832edd16368SStephen M. Cameron c->Request.CDB[1] = 0x01; 6833b7bb24ebSStephen M. Cameron c->Request.CDB[2] = (page_code & 0xff); 6834edd16368SStephen M. Cameron } 6835edd16368SStephen M. Cameron c->Request.CDBLen = 6; 6836a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6837a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6838edd16368SStephen M. Cameron c->Request.Timeout = 0; 6839edd16368SStephen M. Cameron c->Request.CDB[0] = HPSA_INQUIRY; 6840edd16368SStephen M. Cameron c->Request.CDB[4] = size & 0xFF; 6841edd16368SStephen M. Cameron break; 6842edd16368SStephen M. Cameron case HPSA_REPORT_LOG: 6843edd16368SStephen M. Cameron case HPSA_REPORT_PHYS: 6844edd16368SStephen M. Cameron /* Talking to controller so It's a physical command 6845edd16368SStephen M. Cameron mode = 00 target = 0. Nothing to write. 6846edd16368SStephen M. Cameron */ 6847edd16368SStephen M. Cameron c->Request.CDBLen = 12; 6848a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6849a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6850edd16368SStephen M. Cameron c->Request.Timeout = 0; 6851edd16368SStephen M. Cameron c->Request.CDB[0] = cmd; 6852edd16368SStephen M. Cameron c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 6853edd16368SStephen M. Cameron c->Request.CDB[7] = (size >> 16) & 0xFF; 6854edd16368SStephen M. Cameron c->Request.CDB[8] = (size >> 8) & 0xFF; 6855edd16368SStephen M. Cameron c->Request.CDB[9] = size & 0xFF; 6856edd16368SStephen M. Cameron break; 6857c2adae44SScott Teel case BMIC_SENSE_DIAG_OPTIONS: 6858c2adae44SScott Teel c->Request.CDBLen = 16; 6859c2adae44SScott Teel c->Request.type_attr_dir = 6860c2adae44SScott Teel TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6861c2adae44SScott Teel c->Request.Timeout = 0; 6862c2adae44SScott Teel /* Spec says this should be BMIC_WRITE */ 6863c2adae44SScott Teel c->Request.CDB[0] = BMIC_READ; 6864c2adae44SScott Teel c->Request.CDB[6] = BMIC_SENSE_DIAG_OPTIONS; 6865c2adae44SScott Teel break; 6866c2adae44SScott Teel case BMIC_SET_DIAG_OPTIONS: 6867c2adae44SScott Teel c->Request.CDBLen = 16; 6868c2adae44SScott Teel c->Request.type_attr_dir = 6869c2adae44SScott Teel TYPE_ATTR_DIR(cmd_type, 6870c2adae44SScott Teel ATTR_SIMPLE, XFER_WRITE); 6871c2adae44SScott Teel c->Request.Timeout = 0; 6872c2adae44SScott Teel c->Request.CDB[0] = BMIC_WRITE; 6873c2adae44SScott Teel c->Request.CDB[6] = BMIC_SET_DIAG_OPTIONS; 6874c2adae44SScott Teel break; 6875edd16368SStephen M. Cameron case HPSA_CACHE_FLUSH: 6876edd16368SStephen M. Cameron c->Request.CDBLen = 12; 6877a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6878a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, 6879a505b86fSStephen M. Cameron ATTR_SIMPLE, XFER_WRITE); 6880edd16368SStephen M. Cameron c->Request.Timeout = 0; 6881edd16368SStephen M. Cameron c->Request.CDB[0] = BMIC_WRITE; 6882edd16368SStephen M. Cameron c->Request.CDB[6] = BMIC_CACHE_FLUSH; 6883bb158eabSStephen M. Cameron c->Request.CDB[7] = (size >> 8) & 0xFF; 6884bb158eabSStephen M. Cameron c->Request.CDB[8] = size & 0xFF; 6885edd16368SStephen M. Cameron break; 6886edd16368SStephen M. Cameron case TEST_UNIT_READY: 6887edd16368SStephen M. Cameron c->Request.CDBLen = 6; 6888a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6889a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 6890edd16368SStephen M. Cameron c->Request.Timeout = 0; 6891edd16368SStephen M. Cameron break; 6892283b4a9bSStephen M. Cameron case HPSA_GET_RAID_MAP: 6893283b4a9bSStephen M. Cameron c->Request.CDBLen = 12; 6894a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6895a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6896283b4a9bSStephen M. Cameron c->Request.Timeout = 0; 6897283b4a9bSStephen M. Cameron c->Request.CDB[0] = HPSA_CISS_READ; 6898283b4a9bSStephen M. Cameron c->Request.CDB[1] = cmd; 6899283b4a9bSStephen M. Cameron c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 6900283b4a9bSStephen M. Cameron c->Request.CDB[7] = (size >> 16) & 0xFF; 6901283b4a9bSStephen M. Cameron c->Request.CDB[8] = (size >> 8) & 0xFF; 6902283b4a9bSStephen M. Cameron c->Request.CDB[9] = size & 0xFF; 6903283b4a9bSStephen M. Cameron break; 6904316b221aSStephen M. Cameron case BMIC_SENSE_CONTROLLER_PARAMETERS: 6905316b221aSStephen M. Cameron c->Request.CDBLen = 10; 6906a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6907a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6908316b221aSStephen M. Cameron c->Request.Timeout = 0; 6909316b221aSStephen M. Cameron c->Request.CDB[0] = BMIC_READ; 6910316b221aSStephen M. Cameron c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS; 6911316b221aSStephen M. Cameron c->Request.CDB[7] = (size >> 16) & 0xFF; 6912316b221aSStephen M. Cameron c->Request.CDB[8] = (size >> 8) & 0xFF; 6913316b221aSStephen M. Cameron break; 691403383736SDon Brace case BMIC_IDENTIFY_PHYSICAL_DEVICE: 691503383736SDon Brace c->Request.CDBLen = 10; 691603383736SDon Brace c->Request.type_attr_dir = 691703383736SDon Brace TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 691803383736SDon Brace c->Request.Timeout = 0; 691903383736SDon Brace c->Request.CDB[0] = BMIC_READ; 692003383736SDon Brace c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE; 692103383736SDon Brace c->Request.CDB[7] = (size >> 16) & 0xFF; 692203383736SDon Brace c->Request.CDB[8] = (size >> 8) & 0XFF; 692303383736SDon Brace break; 6924d04e62b9SKevin Barnett case BMIC_SENSE_SUBSYSTEM_INFORMATION: 6925d04e62b9SKevin Barnett c->Request.CDBLen = 10; 6926d04e62b9SKevin Barnett c->Request.type_attr_dir = 6927d04e62b9SKevin Barnett TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6928d04e62b9SKevin Barnett c->Request.Timeout = 0; 6929d04e62b9SKevin Barnett c->Request.CDB[0] = BMIC_READ; 6930d04e62b9SKevin Barnett c->Request.CDB[6] = BMIC_SENSE_SUBSYSTEM_INFORMATION; 6931d04e62b9SKevin Barnett c->Request.CDB[7] = (size >> 16) & 0xFF; 6932d04e62b9SKevin Barnett c->Request.CDB[8] = (size >> 8) & 0XFF; 6933d04e62b9SKevin Barnett break; 6934cca8f13bSDon Brace case BMIC_SENSE_STORAGE_BOX_PARAMS: 6935cca8f13bSDon Brace c->Request.CDBLen = 10; 6936cca8f13bSDon Brace c->Request.type_attr_dir = 6937cca8f13bSDon Brace TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6938cca8f13bSDon Brace c->Request.Timeout = 0; 6939cca8f13bSDon Brace c->Request.CDB[0] = BMIC_READ; 6940cca8f13bSDon Brace c->Request.CDB[6] = BMIC_SENSE_STORAGE_BOX_PARAMS; 6941cca8f13bSDon Brace c->Request.CDB[7] = (size >> 16) & 0xFF; 6942cca8f13bSDon Brace c->Request.CDB[8] = (size >> 8) & 0XFF; 6943cca8f13bSDon Brace break; 694466749d0dSScott Teel case BMIC_IDENTIFY_CONTROLLER: 694566749d0dSScott Teel c->Request.CDBLen = 10; 694666749d0dSScott Teel c->Request.type_attr_dir = 694766749d0dSScott Teel TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 694866749d0dSScott Teel c->Request.Timeout = 0; 694966749d0dSScott Teel c->Request.CDB[0] = BMIC_READ; 695066749d0dSScott Teel c->Request.CDB[1] = 0; 695166749d0dSScott Teel c->Request.CDB[2] = 0; 695266749d0dSScott Teel c->Request.CDB[3] = 0; 695366749d0dSScott Teel c->Request.CDB[4] = 0; 695466749d0dSScott Teel c->Request.CDB[5] = 0; 695566749d0dSScott Teel c->Request.CDB[6] = BMIC_IDENTIFY_CONTROLLER; 695666749d0dSScott Teel c->Request.CDB[7] = (size >> 16) & 0xFF; 695766749d0dSScott Teel c->Request.CDB[8] = (size >> 8) & 0XFF; 695866749d0dSScott Teel c->Request.CDB[9] = 0; 695966749d0dSScott Teel break; 6960edd16368SStephen M. Cameron default: 6961edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd); 6962edd16368SStephen M. Cameron BUG(); 6963a2dac136SStephen M. Cameron return -1; 6964edd16368SStephen M. Cameron } 6965edd16368SStephen M. Cameron } else if (cmd_type == TYPE_MSG) { 6966edd16368SStephen M. Cameron switch (cmd) { 6967edd16368SStephen M. Cameron 69680b9b7b6eSScott Teel case HPSA_PHYS_TARGET_RESET: 69690b9b7b6eSScott Teel c->Request.CDBLen = 16; 69700b9b7b6eSScott Teel c->Request.type_attr_dir = 69710b9b7b6eSScott Teel TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 69720b9b7b6eSScott Teel c->Request.Timeout = 0; /* Don't time out */ 69730b9b7b6eSScott Teel memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 69740b9b7b6eSScott Teel c->Request.CDB[0] = HPSA_RESET; 69750b9b7b6eSScott Teel c->Request.CDB[1] = HPSA_TARGET_RESET_TYPE; 69760b9b7b6eSScott Teel /* Physical target reset needs no control bytes 4-7*/ 69770b9b7b6eSScott Teel c->Request.CDB[4] = 0x00; 69780b9b7b6eSScott Teel c->Request.CDB[5] = 0x00; 69790b9b7b6eSScott Teel c->Request.CDB[6] = 0x00; 69800b9b7b6eSScott Teel c->Request.CDB[7] = 0x00; 69810b9b7b6eSScott Teel break; 6982edd16368SStephen M. Cameron case HPSA_DEVICE_RESET_MSG: 6983edd16368SStephen M. Cameron c->Request.CDBLen = 16; 6984a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6985a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 6986edd16368SStephen M. Cameron c->Request.Timeout = 0; /* Don't time out */ 698764670ac8SStephen M. Cameron memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 698864670ac8SStephen M. Cameron c->Request.CDB[0] = cmd; 698921e89afdSStephen M. Cameron c->Request.CDB[1] = HPSA_RESET_TYPE_LUN; 6990edd16368SStephen M. Cameron /* If bytes 4-7 are zero, it means reset the */ 6991edd16368SStephen M. Cameron /* LunID device */ 6992edd16368SStephen M. Cameron c->Request.CDB[4] = 0x00; 6993edd16368SStephen M. Cameron c->Request.CDB[5] = 0x00; 6994edd16368SStephen M. Cameron c->Request.CDB[6] = 0x00; 6995edd16368SStephen M. Cameron c->Request.CDB[7] = 0x00; 6996edd16368SStephen M. Cameron break; 699775167d2cSStephen M. Cameron case HPSA_ABORT_MSG: 69989b5c48c2SStephen Cameron memcpy(&tag, buff, sizeof(tag)); 69992b08b3e9SDon Brace dev_dbg(&h->pdev->dev, 70009b5c48c2SStephen Cameron "Abort Tag:0x%016llx using rqst Tag:0x%016llx", 70019b5c48c2SStephen Cameron tag, c->Header.tag); 700275167d2cSStephen M. Cameron c->Request.CDBLen = 16; 7003a505b86fSStephen M. Cameron c->Request.type_attr_dir = 7004a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, 7005a505b86fSStephen M. Cameron ATTR_SIMPLE, XFER_WRITE); 700675167d2cSStephen M. Cameron c->Request.Timeout = 0; /* Don't time out */ 700775167d2cSStephen M. Cameron c->Request.CDB[0] = HPSA_TASK_MANAGEMENT; 700875167d2cSStephen M. Cameron c->Request.CDB[1] = HPSA_TMF_ABORT_TASK; 700975167d2cSStephen M. Cameron c->Request.CDB[2] = 0x00; /* reserved */ 701075167d2cSStephen M. Cameron c->Request.CDB[3] = 0x00; /* reserved */ 701175167d2cSStephen M. Cameron /* Tag to abort goes in CDB[4]-CDB[11] */ 70129b5c48c2SStephen Cameron memcpy(&c->Request.CDB[4], &tag, sizeof(tag)); 701375167d2cSStephen M. Cameron c->Request.CDB[12] = 0x00; /* reserved */ 701475167d2cSStephen M. Cameron c->Request.CDB[13] = 0x00; /* reserved */ 701575167d2cSStephen M. Cameron c->Request.CDB[14] = 0x00; /* reserved */ 701675167d2cSStephen M. Cameron c->Request.CDB[15] = 0x00; /* reserved */ 701775167d2cSStephen M. Cameron break; 7018edd16368SStephen M. Cameron default: 7019edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "unknown message type %d\n", 7020edd16368SStephen M. Cameron cmd); 7021edd16368SStephen M. Cameron BUG(); 7022edd16368SStephen M. Cameron } 7023edd16368SStephen M. Cameron } else { 7024edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type); 7025edd16368SStephen M. Cameron BUG(); 7026edd16368SStephen M. Cameron } 7027edd16368SStephen M. Cameron 7028a505b86fSStephen M. Cameron switch (GET_DIR(c->Request.type_attr_dir)) { 7029edd16368SStephen M. Cameron case XFER_READ: 7030edd16368SStephen M. Cameron pci_dir = PCI_DMA_FROMDEVICE; 7031edd16368SStephen M. Cameron break; 7032edd16368SStephen M. Cameron case XFER_WRITE: 7033edd16368SStephen M. Cameron pci_dir = PCI_DMA_TODEVICE; 7034edd16368SStephen M. Cameron break; 7035edd16368SStephen M. Cameron case XFER_NONE: 7036edd16368SStephen M. Cameron pci_dir = PCI_DMA_NONE; 7037edd16368SStephen M. Cameron break; 7038edd16368SStephen M. Cameron default: 7039edd16368SStephen M. Cameron pci_dir = PCI_DMA_BIDIRECTIONAL; 7040edd16368SStephen M. Cameron } 7041a2dac136SStephen M. Cameron if (hpsa_map_one(h->pdev, c, buff, size, pci_dir)) 7042a2dac136SStephen M. Cameron return -1; 7043a2dac136SStephen M. Cameron return 0; 7044edd16368SStephen M. Cameron } 7045edd16368SStephen M. Cameron 7046edd16368SStephen M. Cameron /* 7047edd16368SStephen M. Cameron * Map (physical) PCI mem into (virtual) kernel space 7048edd16368SStephen M. Cameron */ 7049edd16368SStephen M. Cameron static void __iomem *remap_pci_mem(ulong base, ulong size) 7050edd16368SStephen M. Cameron { 7051edd16368SStephen M. Cameron ulong page_base = ((ulong) base) & PAGE_MASK; 7052edd16368SStephen M. Cameron ulong page_offs = ((ulong) base) - page_base; 7053088ba34cSStephen M. Cameron void __iomem *page_remapped = ioremap_nocache(page_base, 7054088ba34cSStephen M. Cameron page_offs + size); 7055edd16368SStephen M. Cameron 7056edd16368SStephen M. Cameron return page_remapped ? (page_remapped + page_offs) : NULL; 7057edd16368SStephen M. Cameron } 7058edd16368SStephen M. Cameron 7059254f796bSMatt Gates static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q) 7060edd16368SStephen M. Cameron { 7061254f796bSMatt Gates return h->access.command_completed(h, q); 7062edd16368SStephen M. Cameron } 7063edd16368SStephen M. Cameron 7064900c5440SStephen M. Cameron static inline bool interrupt_pending(struct ctlr_info *h) 7065edd16368SStephen M. Cameron { 7066edd16368SStephen M. Cameron return h->access.intr_pending(h); 7067edd16368SStephen M. Cameron } 7068edd16368SStephen M. Cameron 7069edd16368SStephen M. Cameron static inline long interrupt_not_for_us(struct ctlr_info *h) 7070edd16368SStephen M. Cameron { 707110f66018SStephen M. Cameron return (h->access.intr_pending(h) == 0) || 707210f66018SStephen M. Cameron (h->interrupts_enabled == 0); 7073edd16368SStephen M. Cameron } 7074edd16368SStephen M. Cameron 707501a02ffcSStephen M. Cameron static inline int bad_tag(struct ctlr_info *h, u32 tag_index, 707601a02ffcSStephen M. Cameron u32 raw_tag) 7077edd16368SStephen M. Cameron { 7078edd16368SStephen M. Cameron if (unlikely(tag_index >= h->nr_cmds)) { 7079edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag); 7080edd16368SStephen M. Cameron return 1; 7081edd16368SStephen M. Cameron } 7082edd16368SStephen M. Cameron return 0; 7083edd16368SStephen M. Cameron } 7084edd16368SStephen M. Cameron 70855a3d16f5SStephen M. Cameron static inline void finish_cmd(struct CommandList *c) 7086edd16368SStephen M. Cameron { 7087e85c5974SStephen M. Cameron dial_up_lockup_detection_on_fw_flash_complete(c->h, c); 7088c349775eSScott Teel if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI 7089c349775eSScott Teel || c->cmd_type == CMD_IOACCEL2)) 70901fb011fbSStephen M. Cameron complete_scsi_command(c); 70918be986ccSStephen Cameron else if (c->cmd_type == CMD_IOCTL_PEND || c->cmd_type == IOACCEL2_TMF) 7092edd16368SStephen M. Cameron complete(c->waiting); 7093a104c99fSStephen M. Cameron } 7094a104c99fSStephen M. Cameron 7095303932fdSDon Brace /* process completion of an indexed ("direct lookup") command */ 70961d94f94dSStephen M. Cameron static inline void process_indexed_cmd(struct ctlr_info *h, 7097303932fdSDon Brace u32 raw_tag) 7098303932fdSDon Brace { 7099303932fdSDon Brace u32 tag_index; 7100303932fdSDon Brace struct CommandList *c; 7101303932fdSDon Brace 7102f2405db8SDon Brace tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT; 71031d94f94dSStephen M. Cameron if (!bad_tag(h, tag_index, raw_tag)) { 7104303932fdSDon Brace c = h->cmd_pool + tag_index; 71055a3d16f5SStephen M. Cameron finish_cmd(c); 71061d94f94dSStephen M. Cameron } 7107303932fdSDon Brace } 7108303932fdSDon Brace 710964670ac8SStephen M. Cameron /* Some controllers, like p400, will give us one interrupt 711064670ac8SStephen M. Cameron * after a soft reset, even if we turned interrupts off. 711164670ac8SStephen M. Cameron * Only need to check for this in the hpsa_xxx_discard_completions 711264670ac8SStephen M. Cameron * functions. 711364670ac8SStephen M. Cameron */ 711464670ac8SStephen M. Cameron static int ignore_bogus_interrupt(struct ctlr_info *h) 711564670ac8SStephen M. Cameron { 711664670ac8SStephen M. Cameron if (likely(!reset_devices)) 711764670ac8SStephen M. Cameron return 0; 711864670ac8SStephen M. Cameron 711964670ac8SStephen M. Cameron if (likely(h->interrupts_enabled)) 712064670ac8SStephen M. Cameron return 0; 712164670ac8SStephen M. Cameron 712264670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled " 712364670ac8SStephen M. Cameron "(known firmware bug.) Ignoring.\n"); 712464670ac8SStephen M. Cameron 712564670ac8SStephen M. Cameron return 1; 712664670ac8SStephen M. Cameron } 712764670ac8SStephen M. Cameron 7128254f796bSMatt Gates /* 7129254f796bSMatt Gates * Convert &h->q[x] (passed to interrupt handlers) back to h. 7130254f796bSMatt Gates * Relies on (h-q[x] == x) being true for x such that 7131254f796bSMatt Gates * 0 <= x < MAX_REPLY_QUEUES. 7132254f796bSMatt Gates */ 7133254f796bSMatt Gates static struct ctlr_info *queue_to_hba(u8 *queue) 713464670ac8SStephen M. Cameron { 7135254f796bSMatt Gates return container_of((queue - *queue), struct ctlr_info, q[0]); 7136254f796bSMatt Gates } 7137254f796bSMatt Gates 7138254f796bSMatt Gates static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue) 7139254f796bSMatt Gates { 7140254f796bSMatt Gates struct ctlr_info *h = queue_to_hba(queue); 7141254f796bSMatt Gates u8 q = *(u8 *) queue; 714264670ac8SStephen M. Cameron u32 raw_tag; 714364670ac8SStephen M. Cameron 714464670ac8SStephen M. Cameron if (ignore_bogus_interrupt(h)) 714564670ac8SStephen M. Cameron return IRQ_NONE; 714664670ac8SStephen M. Cameron 714764670ac8SStephen M. Cameron if (interrupt_not_for_us(h)) 714864670ac8SStephen M. Cameron return IRQ_NONE; 7149a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 715064670ac8SStephen M. Cameron while (interrupt_pending(h)) { 7151254f796bSMatt Gates raw_tag = get_next_completion(h, q); 715264670ac8SStephen M. Cameron while (raw_tag != FIFO_EMPTY) 7153254f796bSMatt Gates raw_tag = next_command(h, q); 715464670ac8SStephen M. Cameron } 715564670ac8SStephen M. Cameron return IRQ_HANDLED; 715664670ac8SStephen M. Cameron } 715764670ac8SStephen M. Cameron 7158254f796bSMatt Gates static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue) 715964670ac8SStephen M. Cameron { 7160254f796bSMatt Gates struct ctlr_info *h = queue_to_hba(queue); 716164670ac8SStephen M. Cameron u32 raw_tag; 7162254f796bSMatt Gates u8 q = *(u8 *) queue; 716364670ac8SStephen M. Cameron 716464670ac8SStephen M. Cameron if (ignore_bogus_interrupt(h)) 716564670ac8SStephen M. Cameron return IRQ_NONE; 716664670ac8SStephen M. Cameron 7167a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 7168254f796bSMatt Gates raw_tag = get_next_completion(h, q); 716964670ac8SStephen M. Cameron while (raw_tag != FIFO_EMPTY) 7170254f796bSMatt Gates raw_tag = next_command(h, q); 717164670ac8SStephen M. Cameron return IRQ_HANDLED; 717264670ac8SStephen M. Cameron } 717364670ac8SStephen M. Cameron 7174254f796bSMatt Gates static irqreturn_t do_hpsa_intr_intx(int irq, void *queue) 7175edd16368SStephen M. Cameron { 7176254f796bSMatt Gates struct ctlr_info *h = queue_to_hba((u8 *) queue); 7177303932fdSDon Brace u32 raw_tag; 7178254f796bSMatt Gates u8 q = *(u8 *) queue; 7179edd16368SStephen M. Cameron 7180edd16368SStephen M. Cameron if (interrupt_not_for_us(h)) 7181edd16368SStephen M. Cameron return IRQ_NONE; 7182a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 718310f66018SStephen M. Cameron while (interrupt_pending(h)) { 7184254f796bSMatt Gates raw_tag = get_next_completion(h, q); 718510f66018SStephen M. Cameron while (raw_tag != FIFO_EMPTY) { 71861d94f94dSStephen M. Cameron process_indexed_cmd(h, raw_tag); 7187254f796bSMatt Gates raw_tag = next_command(h, q); 718810f66018SStephen M. Cameron } 718910f66018SStephen M. Cameron } 719010f66018SStephen M. Cameron return IRQ_HANDLED; 719110f66018SStephen M. Cameron } 719210f66018SStephen M. Cameron 7193254f796bSMatt Gates static irqreturn_t do_hpsa_intr_msi(int irq, void *queue) 719410f66018SStephen M. Cameron { 7195254f796bSMatt Gates struct ctlr_info *h = queue_to_hba(queue); 719610f66018SStephen M. Cameron u32 raw_tag; 7197254f796bSMatt Gates u8 q = *(u8 *) queue; 719810f66018SStephen M. Cameron 7199a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 7200254f796bSMatt Gates raw_tag = get_next_completion(h, q); 7201303932fdSDon Brace while (raw_tag != FIFO_EMPTY) { 72021d94f94dSStephen M. Cameron process_indexed_cmd(h, raw_tag); 7203254f796bSMatt Gates raw_tag = next_command(h, q); 7204edd16368SStephen M. Cameron } 7205edd16368SStephen M. Cameron return IRQ_HANDLED; 7206edd16368SStephen M. Cameron } 7207edd16368SStephen M. Cameron 7208a9a3a273SStephen M. Cameron /* Send a message CDB to the firmware. Careful, this only works 7209a9a3a273SStephen M. Cameron * in simple mode, not performant mode due to the tag lookup. 7210a9a3a273SStephen M. Cameron * We only ever use this immediately after a controller reset. 7211a9a3a273SStephen M. Cameron */ 72126f039790SGreg Kroah-Hartman static int hpsa_message(struct pci_dev *pdev, unsigned char opcode, 7213edd16368SStephen M. Cameron unsigned char type) 7214edd16368SStephen M. Cameron { 7215edd16368SStephen M. Cameron struct Command { 7216edd16368SStephen M. Cameron struct CommandListHeader CommandHeader; 7217edd16368SStephen M. Cameron struct RequestBlock Request; 7218edd16368SStephen M. Cameron struct ErrDescriptor ErrorDescriptor; 7219edd16368SStephen M. Cameron }; 7220edd16368SStephen M. Cameron struct Command *cmd; 7221edd16368SStephen M. Cameron static const size_t cmd_sz = sizeof(*cmd) + 7222edd16368SStephen M. Cameron sizeof(cmd->ErrorDescriptor); 7223edd16368SStephen M. Cameron dma_addr_t paddr64; 72242b08b3e9SDon Brace __le32 paddr32; 72252b08b3e9SDon Brace u32 tag; 7226edd16368SStephen M. Cameron void __iomem *vaddr; 7227edd16368SStephen M. Cameron int i, err; 7228edd16368SStephen M. Cameron 7229edd16368SStephen M. Cameron vaddr = pci_ioremap_bar(pdev, 0); 7230edd16368SStephen M. Cameron if (vaddr == NULL) 7231edd16368SStephen M. Cameron return -ENOMEM; 7232edd16368SStephen M. Cameron 7233edd16368SStephen M. Cameron /* The Inbound Post Queue only accepts 32-bit physical addresses for the 7234edd16368SStephen M. Cameron * CCISS commands, so they must be allocated from the lower 4GiB of 7235edd16368SStephen M. Cameron * memory. 7236edd16368SStephen M. Cameron */ 7237edd16368SStephen M. Cameron err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 7238edd16368SStephen M. Cameron if (err) { 7239edd16368SStephen M. Cameron iounmap(vaddr); 72401eaec8f3SRobert Elliott return err; 7241edd16368SStephen M. Cameron } 7242edd16368SStephen M. Cameron 7243edd16368SStephen M. Cameron cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64); 7244edd16368SStephen M. Cameron if (cmd == NULL) { 7245edd16368SStephen M. Cameron iounmap(vaddr); 7246edd16368SStephen M. Cameron return -ENOMEM; 7247edd16368SStephen M. Cameron } 7248edd16368SStephen M. Cameron 7249edd16368SStephen M. Cameron /* This must fit, because of the 32-bit consistent DMA mask. Also, 7250edd16368SStephen M. Cameron * although there's no guarantee, we assume that the address is at 7251edd16368SStephen M. Cameron * least 4-byte aligned (most likely, it's page-aligned). 7252edd16368SStephen M. Cameron */ 72532b08b3e9SDon Brace paddr32 = cpu_to_le32(paddr64); 7254edd16368SStephen M. Cameron 7255edd16368SStephen M. Cameron cmd->CommandHeader.ReplyQueue = 0; 7256edd16368SStephen M. Cameron cmd->CommandHeader.SGList = 0; 725750a0decfSStephen M. Cameron cmd->CommandHeader.SGTotal = cpu_to_le16(0); 72582b08b3e9SDon Brace cmd->CommandHeader.tag = cpu_to_le64(paddr64); 7259edd16368SStephen M. Cameron memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8); 7260edd16368SStephen M. Cameron 7261edd16368SStephen M. Cameron cmd->Request.CDBLen = 16; 7262a505b86fSStephen M. Cameron cmd->Request.type_attr_dir = 7263a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE); 7264edd16368SStephen M. Cameron cmd->Request.Timeout = 0; /* Don't time out */ 7265edd16368SStephen M. Cameron cmd->Request.CDB[0] = opcode; 7266edd16368SStephen M. Cameron cmd->Request.CDB[1] = type; 7267edd16368SStephen M. Cameron memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */ 726850a0decfSStephen M. Cameron cmd->ErrorDescriptor.Addr = 72692b08b3e9SDon Brace cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd))); 727050a0decfSStephen M. Cameron cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo)); 7271edd16368SStephen M. Cameron 72722b08b3e9SDon Brace writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET); 7273edd16368SStephen M. Cameron 7274edd16368SStephen M. Cameron for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) { 7275edd16368SStephen M. Cameron tag = readl(vaddr + SA5_REPLY_PORT_OFFSET); 72762b08b3e9SDon Brace if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64) 7277edd16368SStephen M. Cameron break; 7278edd16368SStephen M. Cameron msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS); 7279edd16368SStephen M. Cameron } 7280edd16368SStephen M. Cameron 7281edd16368SStephen M. Cameron iounmap(vaddr); 7282edd16368SStephen M. Cameron 7283edd16368SStephen M. Cameron /* we leak the DMA buffer here ... no choice since the controller could 7284edd16368SStephen M. Cameron * still complete the command. 7285edd16368SStephen M. Cameron */ 7286edd16368SStephen M. Cameron if (i == HPSA_MSG_SEND_RETRY_LIMIT) { 7287edd16368SStephen M. Cameron dev_err(&pdev->dev, "controller message %02x:%02x timed out\n", 7288edd16368SStephen M. Cameron opcode, type); 7289edd16368SStephen M. Cameron return -ETIMEDOUT; 7290edd16368SStephen M. Cameron } 7291edd16368SStephen M. Cameron 7292edd16368SStephen M. Cameron pci_free_consistent(pdev, cmd_sz, cmd, paddr64); 7293edd16368SStephen M. Cameron 7294edd16368SStephen M. Cameron if (tag & HPSA_ERROR_BIT) { 7295edd16368SStephen M. Cameron dev_err(&pdev->dev, "controller message %02x:%02x failed\n", 7296edd16368SStephen M. Cameron opcode, type); 7297edd16368SStephen M. Cameron return -EIO; 7298edd16368SStephen M. Cameron } 7299edd16368SStephen M. Cameron 7300edd16368SStephen M. Cameron dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n", 7301edd16368SStephen M. Cameron opcode, type); 7302edd16368SStephen M. Cameron return 0; 7303edd16368SStephen M. Cameron } 7304edd16368SStephen M. Cameron 7305edd16368SStephen M. Cameron #define hpsa_noop(p) hpsa_message(p, 3, 0) 7306edd16368SStephen M. Cameron 73071df8552aSStephen M. Cameron static int hpsa_controller_hard_reset(struct pci_dev *pdev, 730842a91641SDon Brace void __iomem *vaddr, u32 use_doorbell) 7309edd16368SStephen M. Cameron { 7310edd16368SStephen M. Cameron 73111df8552aSStephen M. Cameron if (use_doorbell) { 73121df8552aSStephen M. Cameron /* For everything after the P600, the PCI power state method 73131df8552aSStephen M. Cameron * of resetting the controller doesn't work, so we have this 73141df8552aSStephen M. Cameron * other way using the doorbell register. 7315edd16368SStephen M. Cameron */ 73161df8552aSStephen M. Cameron dev_info(&pdev->dev, "using doorbell to reset controller\n"); 7317cf0b08d0SStephen M. Cameron writel(use_doorbell, vaddr + SA5_DOORBELL); 731885009239SStephen M. Cameron 731900701a96SJustin Lindley /* PMC hardware guys tell us we need a 10 second delay after 732085009239SStephen M. Cameron * doorbell reset and before any attempt to talk to the board 732185009239SStephen M. Cameron * at all to ensure that this actually works and doesn't fall 732285009239SStephen M. Cameron * over in some weird corner cases. 732385009239SStephen M. Cameron */ 732400701a96SJustin Lindley msleep(10000); 73251df8552aSStephen M. Cameron } else { /* Try to do it the PCI power state way */ 7326edd16368SStephen M. Cameron 7327edd16368SStephen M. Cameron /* Quoting from the Open CISS Specification: "The Power 7328edd16368SStephen M. Cameron * Management Control/Status Register (CSR) controls the power 7329edd16368SStephen M. Cameron * state of the device. The normal operating state is D0, 7330edd16368SStephen M. Cameron * CSR=00h. The software off state is D3, CSR=03h. To reset 73311df8552aSStephen M. Cameron * the controller, place the interface device in D3 then to D0, 73321df8552aSStephen M. Cameron * this causes a secondary PCI reset which will reset the 73331df8552aSStephen M. Cameron * controller." */ 7334edd16368SStephen M. Cameron 73352662cab8SDon Brace int rc = 0; 73362662cab8SDon Brace 73371df8552aSStephen M. Cameron dev_info(&pdev->dev, "using PCI PM to reset controller\n"); 73382662cab8SDon Brace 7339edd16368SStephen M. Cameron /* enter the D3hot power management state */ 73402662cab8SDon Brace rc = pci_set_power_state(pdev, PCI_D3hot); 73412662cab8SDon Brace if (rc) 73422662cab8SDon Brace return rc; 7343edd16368SStephen M. Cameron 7344edd16368SStephen M. Cameron msleep(500); 7345edd16368SStephen M. Cameron 7346edd16368SStephen M. Cameron /* enter the D0 power management state */ 73472662cab8SDon Brace rc = pci_set_power_state(pdev, PCI_D0); 73482662cab8SDon Brace if (rc) 73492662cab8SDon Brace return rc; 7350c4853efeSMike Miller 7351c4853efeSMike Miller /* 7352c4853efeSMike Miller * The P600 requires a small delay when changing states. 7353c4853efeSMike Miller * Otherwise we may think the board did not reset and we bail. 7354c4853efeSMike Miller * This for kdump only and is particular to the P600. 7355c4853efeSMike Miller */ 7356c4853efeSMike Miller msleep(500); 73571df8552aSStephen M. Cameron } 73581df8552aSStephen M. Cameron return 0; 73591df8552aSStephen M. Cameron } 73601df8552aSStephen M. Cameron 73616f039790SGreg Kroah-Hartman static void init_driver_version(char *driver_version, int len) 7362580ada3cSStephen M. Cameron { 7363580ada3cSStephen M. Cameron memset(driver_version, 0, len); 7364f79cfec6SStephen M. Cameron strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1); 7365580ada3cSStephen M. Cameron } 7366580ada3cSStephen M. Cameron 73676f039790SGreg Kroah-Hartman static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable) 7368580ada3cSStephen M. Cameron { 7369580ada3cSStephen M. Cameron char *driver_version; 7370580ada3cSStephen M. Cameron int i, size = sizeof(cfgtable->driver_version); 7371580ada3cSStephen M. Cameron 7372580ada3cSStephen M. Cameron driver_version = kmalloc(size, GFP_KERNEL); 7373580ada3cSStephen M. Cameron if (!driver_version) 7374580ada3cSStephen M. Cameron return -ENOMEM; 7375580ada3cSStephen M. Cameron 7376580ada3cSStephen M. Cameron init_driver_version(driver_version, size); 7377580ada3cSStephen M. Cameron for (i = 0; i < size; i++) 7378580ada3cSStephen M. Cameron writeb(driver_version[i], &cfgtable->driver_version[i]); 7379580ada3cSStephen M. Cameron kfree(driver_version); 7380580ada3cSStephen M. Cameron return 0; 7381580ada3cSStephen M. Cameron } 7382580ada3cSStephen M. Cameron 73836f039790SGreg Kroah-Hartman static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable, 73846f039790SGreg Kroah-Hartman unsigned char *driver_ver) 7385580ada3cSStephen M. Cameron { 7386580ada3cSStephen M. Cameron int i; 7387580ada3cSStephen M. Cameron 7388580ada3cSStephen M. Cameron for (i = 0; i < sizeof(cfgtable->driver_version); i++) 7389580ada3cSStephen M. Cameron driver_ver[i] = readb(&cfgtable->driver_version[i]); 7390580ada3cSStephen M. Cameron } 7391580ada3cSStephen M. Cameron 73926f039790SGreg Kroah-Hartman static int controller_reset_failed(struct CfgTable __iomem *cfgtable) 7393580ada3cSStephen M. Cameron { 7394580ada3cSStephen M. Cameron 7395580ada3cSStephen M. Cameron char *driver_ver, *old_driver_ver; 7396580ada3cSStephen M. Cameron int rc, size = sizeof(cfgtable->driver_version); 7397580ada3cSStephen M. Cameron 7398580ada3cSStephen M. Cameron old_driver_ver = kmalloc(2 * size, GFP_KERNEL); 7399580ada3cSStephen M. Cameron if (!old_driver_ver) 7400580ada3cSStephen M. Cameron return -ENOMEM; 7401580ada3cSStephen M. Cameron driver_ver = old_driver_ver + size; 7402580ada3cSStephen M. Cameron 7403580ada3cSStephen M. Cameron /* After a reset, the 32 bytes of "driver version" in the cfgtable 7404580ada3cSStephen M. Cameron * should have been changed, otherwise we know the reset failed. 7405580ada3cSStephen M. Cameron */ 7406580ada3cSStephen M. Cameron init_driver_version(old_driver_ver, size); 7407580ada3cSStephen M. Cameron read_driver_ver_from_cfgtable(cfgtable, driver_ver); 7408580ada3cSStephen M. Cameron rc = !memcmp(driver_ver, old_driver_ver, size); 7409580ada3cSStephen M. Cameron kfree(old_driver_ver); 7410580ada3cSStephen M. Cameron return rc; 7411580ada3cSStephen M. Cameron } 74121df8552aSStephen M. Cameron /* This does a hard reset of the controller using PCI power management 74131df8552aSStephen M. Cameron * states or the using the doorbell register. 74141df8552aSStephen M. Cameron */ 74156b6c1cd7STomas Henzl static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id) 74161df8552aSStephen M. Cameron { 74171df8552aSStephen M. Cameron u64 cfg_offset; 74181df8552aSStephen M. Cameron u32 cfg_base_addr; 74191df8552aSStephen M. Cameron u64 cfg_base_addr_index; 74201df8552aSStephen M. Cameron void __iomem *vaddr; 74211df8552aSStephen M. Cameron unsigned long paddr; 7422580ada3cSStephen M. Cameron u32 misc_fw_support; 7423270d05deSStephen M. Cameron int rc; 74241df8552aSStephen M. Cameron struct CfgTable __iomem *cfgtable; 7425cf0b08d0SStephen M. Cameron u32 use_doorbell; 7426270d05deSStephen M. Cameron u16 command_register; 74271df8552aSStephen M. Cameron 74281df8552aSStephen M. Cameron /* For controllers as old as the P600, this is very nearly 74291df8552aSStephen M. Cameron * the same thing as 74301df8552aSStephen M. Cameron * 74311df8552aSStephen M. Cameron * pci_save_state(pci_dev); 74321df8552aSStephen M. Cameron * pci_set_power_state(pci_dev, PCI_D3hot); 74331df8552aSStephen M. Cameron * pci_set_power_state(pci_dev, PCI_D0); 74341df8552aSStephen M. Cameron * pci_restore_state(pci_dev); 74351df8552aSStephen M. Cameron * 74361df8552aSStephen M. Cameron * For controllers newer than the P600, the pci power state 74371df8552aSStephen M. Cameron * method of resetting doesn't work so we have another way 74381df8552aSStephen M. Cameron * using the doorbell register. 74391df8552aSStephen M. Cameron */ 744018867659SStephen M. Cameron 744160f923b9SRobert Elliott if (!ctlr_is_resettable(board_id)) { 744260f923b9SRobert Elliott dev_warn(&pdev->dev, "Controller not resettable\n"); 744325c1e56aSStephen M. Cameron return -ENODEV; 744425c1e56aSStephen M. Cameron } 744546380786SStephen M. Cameron 744646380786SStephen M. Cameron /* if controller is soft- but not hard resettable... */ 744746380786SStephen M. Cameron if (!ctlr_is_hard_resettable(board_id)) 744846380786SStephen M. Cameron return -ENOTSUPP; /* try soft reset later. */ 744918867659SStephen M. Cameron 7450270d05deSStephen M. Cameron /* Save the PCI command register */ 7451270d05deSStephen M. Cameron pci_read_config_word(pdev, 4, &command_register); 7452270d05deSStephen M. Cameron pci_save_state(pdev); 74531df8552aSStephen M. Cameron 74541df8552aSStephen M. Cameron /* find the first memory BAR, so we can find the cfg table */ 74551df8552aSStephen M. Cameron rc = hpsa_pci_find_memory_BAR(pdev, &paddr); 74561df8552aSStephen M. Cameron if (rc) 74571df8552aSStephen M. Cameron return rc; 74581df8552aSStephen M. Cameron vaddr = remap_pci_mem(paddr, 0x250); 74591df8552aSStephen M. Cameron if (!vaddr) 74601df8552aSStephen M. Cameron return -ENOMEM; 74611df8552aSStephen M. Cameron 74621df8552aSStephen M. Cameron /* find cfgtable in order to check if reset via doorbell is supported */ 74631df8552aSStephen M. Cameron rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr, 74641df8552aSStephen M. Cameron &cfg_base_addr_index, &cfg_offset); 74651df8552aSStephen M. Cameron if (rc) 74661df8552aSStephen M. Cameron goto unmap_vaddr; 74671df8552aSStephen M. Cameron cfgtable = remap_pci_mem(pci_resource_start(pdev, 74681df8552aSStephen M. Cameron cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable)); 74691df8552aSStephen M. Cameron if (!cfgtable) { 74701df8552aSStephen M. Cameron rc = -ENOMEM; 74711df8552aSStephen M. Cameron goto unmap_vaddr; 74721df8552aSStephen M. Cameron } 7473580ada3cSStephen M. Cameron rc = write_driver_ver_to_cfgtable(cfgtable); 7474580ada3cSStephen M. Cameron if (rc) 747503741d95STomas Henzl goto unmap_cfgtable; 74761df8552aSStephen M. Cameron 7477cf0b08d0SStephen M. Cameron /* If reset via doorbell register is supported, use that. 7478cf0b08d0SStephen M. Cameron * There are two such methods. Favor the newest method. 7479cf0b08d0SStephen M. Cameron */ 74801df8552aSStephen M. Cameron misc_fw_support = readl(&cfgtable->misc_fw_support); 7481cf0b08d0SStephen M. Cameron use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2; 7482cf0b08d0SStephen M. Cameron if (use_doorbell) { 7483cf0b08d0SStephen M. Cameron use_doorbell = DOORBELL_CTLR_RESET2; 7484cf0b08d0SStephen M. Cameron } else { 74851df8552aSStephen M. Cameron use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET; 7486cf0b08d0SStephen M. Cameron if (use_doorbell) { 7487050f7147SStephen Cameron dev_warn(&pdev->dev, 7488050f7147SStephen Cameron "Soft reset not supported. Firmware update is required.\n"); 748964670ac8SStephen M. Cameron rc = -ENOTSUPP; /* try soft reset */ 7490cf0b08d0SStephen M. Cameron goto unmap_cfgtable; 7491cf0b08d0SStephen M. Cameron } 7492cf0b08d0SStephen M. Cameron } 74931df8552aSStephen M. Cameron 74941df8552aSStephen M. Cameron rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell); 74951df8552aSStephen M. Cameron if (rc) 74961df8552aSStephen M. Cameron goto unmap_cfgtable; 7497edd16368SStephen M. Cameron 7498270d05deSStephen M. Cameron pci_restore_state(pdev); 7499270d05deSStephen M. Cameron pci_write_config_word(pdev, 4, command_register); 7500edd16368SStephen M. Cameron 75011df8552aSStephen M. Cameron /* Some devices (notably the HP Smart Array 5i Controller) 75021df8552aSStephen M. Cameron need a little pause here */ 75031df8552aSStephen M. Cameron msleep(HPSA_POST_RESET_PAUSE_MSECS); 75041df8552aSStephen M. Cameron 7505fe5389c8SStephen M. Cameron rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY); 7506fe5389c8SStephen M. Cameron if (rc) { 7507fe5389c8SStephen M. Cameron dev_warn(&pdev->dev, 7508050f7147SStephen Cameron "Failed waiting for board to become ready after hard reset\n"); 7509fe5389c8SStephen M. Cameron goto unmap_cfgtable; 7510fe5389c8SStephen M. Cameron } 7511fe5389c8SStephen M. Cameron 7512580ada3cSStephen M. Cameron rc = controller_reset_failed(vaddr); 7513580ada3cSStephen M. Cameron if (rc < 0) 7514580ada3cSStephen M. Cameron goto unmap_cfgtable; 7515580ada3cSStephen M. Cameron if (rc) { 751664670ac8SStephen M. Cameron dev_warn(&pdev->dev, "Unable to successfully reset " 751764670ac8SStephen M. Cameron "controller. Will try soft reset.\n"); 751864670ac8SStephen M. Cameron rc = -ENOTSUPP; 7519580ada3cSStephen M. Cameron } else { 752064670ac8SStephen M. Cameron dev_info(&pdev->dev, "board ready after hard reset.\n"); 75211df8552aSStephen M. Cameron } 75221df8552aSStephen M. Cameron 75231df8552aSStephen M. Cameron unmap_cfgtable: 75241df8552aSStephen M. Cameron iounmap(cfgtable); 75251df8552aSStephen M. Cameron 75261df8552aSStephen M. Cameron unmap_vaddr: 75271df8552aSStephen M. Cameron iounmap(vaddr); 75281df8552aSStephen M. Cameron return rc; 7529edd16368SStephen M. Cameron } 7530edd16368SStephen M. Cameron 7531edd16368SStephen M. Cameron /* 7532edd16368SStephen M. Cameron * We cannot read the structure directly, for portability we must use 7533edd16368SStephen M. Cameron * the io functions. 7534edd16368SStephen M. Cameron * This is for debug only. 7535edd16368SStephen M. Cameron */ 753642a91641SDon Brace static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb) 7537edd16368SStephen M. Cameron { 753858f8665cSStephen M. Cameron #ifdef HPSA_DEBUG 7539edd16368SStephen M. Cameron int i; 7540edd16368SStephen M. Cameron char temp_name[17]; 7541edd16368SStephen M. Cameron 7542edd16368SStephen M. Cameron dev_info(dev, "Controller Configuration information\n"); 7543edd16368SStephen M. Cameron dev_info(dev, "------------------------------------\n"); 7544edd16368SStephen M. Cameron for (i = 0; i < 4; i++) 7545edd16368SStephen M. Cameron temp_name[i] = readb(&(tb->Signature[i])); 7546edd16368SStephen M. Cameron temp_name[4] = '\0'; 7547edd16368SStephen M. Cameron dev_info(dev, " Signature = %s\n", temp_name); 7548edd16368SStephen M. Cameron dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence))); 7549edd16368SStephen M. Cameron dev_info(dev, " Transport methods supported = 0x%x\n", 7550edd16368SStephen M. Cameron readl(&(tb->TransportSupport))); 7551edd16368SStephen M. Cameron dev_info(dev, " Transport methods active = 0x%x\n", 7552edd16368SStephen M. Cameron readl(&(tb->TransportActive))); 7553edd16368SStephen M. Cameron dev_info(dev, " Requested transport Method = 0x%x\n", 7554edd16368SStephen M. Cameron readl(&(tb->HostWrite.TransportRequest))); 7555edd16368SStephen M. Cameron dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n", 7556edd16368SStephen M. Cameron readl(&(tb->HostWrite.CoalIntDelay))); 7557edd16368SStephen M. Cameron dev_info(dev, " Coalesce Interrupt Count = 0x%x\n", 7558edd16368SStephen M. Cameron readl(&(tb->HostWrite.CoalIntCount))); 755969d6e33dSRobert Elliott dev_info(dev, " Max outstanding commands = %d\n", 7560edd16368SStephen M. Cameron readl(&(tb->CmdsOutMax))); 7561edd16368SStephen M. Cameron dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes))); 7562edd16368SStephen M. Cameron for (i = 0; i < 16; i++) 7563edd16368SStephen M. Cameron temp_name[i] = readb(&(tb->ServerName[i])); 7564edd16368SStephen M. Cameron temp_name[16] = '\0'; 7565edd16368SStephen M. Cameron dev_info(dev, " Server Name = %s\n", temp_name); 7566edd16368SStephen M. Cameron dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n", 7567edd16368SStephen M. Cameron readl(&(tb->HeartBeat))); 7568edd16368SStephen M. Cameron #endif /* HPSA_DEBUG */ 756958f8665cSStephen M. Cameron } 7570edd16368SStephen M. Cameron 7571edd16368SStephen M. Cameron static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr) 7572edd16368SStephen M. Cameron { 7573edd16368SStephen M. Cameron int i, offset, mem_type, bar_type; 7574edd16368SStephen M. Cameron 7575edd16368SStephen M. Cameron if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */ 7576edd16368SStephen M. Cameron return 0; 7577edd16368SStephen M. Cameron offset = 0; 7578edd16368SStephen M. Cameron for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { 7579edd16368SStephen M. Cameron bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE; 7580edd16368SStephen M. Cameron if (bar_type == PCI_BASE_ADDRESS_SPACE_IO) 7581edd16368SStephen M. Cameron offset += 4; 7582edd16368SStephen M. Cameron else { 7583edd16368SStephen M. Cameron mem_type = pci_resource_flags(pdev, i) & 7584edd16368SStephen M. Cameron PCI_BASE_ADDRESS_MEM_TYPE_MASK; 7585edd16368SStephen M. Cameron switch (mem_type) { 7586edd16368SStephen M. Cameron case PCI_BASE_ADDRESS_MEM_TYPE_32: 7587edd16368SStephen M. Cameron case PCI_BASE_ADDRESS_MEM_TYPE_1M: 7588edd16368SStephen M. Cameron offset += 4; /* 32 bit */ 7589edd16368SStephen M. Cameron break; 7590edd16368SStephen M. Cameron case PCI_BASE_ADDRESS_MEM_TYPE_64: 7591edd16368SStephen M. Cameron offset += 8; 7592edd16368SStephen M. Cameron break; 7593edd16368SStephen M. Cameron default: /* reserved in PCI 2.2 */ 7594edd16368SStephen M. Cameron dev_warn(&pdev->dev, 7595edd16368SStephen M. Cameron "base address is invalid\n"); 7596edd16368SStephen M. Cameron return -1; 7597edd16368SStephen M. Cameron break; 7598edd16368SStephen M. Cameron } 7599edd16368SStephen M. Cameron } 7600edd16368SStephen M. Cameron if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0) 7601edd16368SStephen M. Cameron return i + 1; 7602edd16368SStephen M. Cameron } 7603edd16368SStephen M. Cameron return -1; 7604edd16368SStephen M. Cameron } 7605edd16368SStephen M. Cameron 7606cc64c817SRobert Elliott static void hpsa_disable_interrupt_mode(struct ctlr_info *h) 7607cc64c817SRobert Elliott { 7608cc64c817SRobert Elliott if (h->msix_vector) { 7609cc64c817SRobert Elliott if (h->pdev->msix_enabled) 7610cc64c817SRobert Elliott pci_disable_msix(h->pdev); 7611105a3dbcSRobert Elliott h->msix_vector = 0; 7612cc64c817SRobert Elliott } else if (h->msi_vector) { 7613cc64c817SRobert Elliott if (h->pdev->msi_enabled) 7614cc64c817SRobert Elliott pci_disable_msi(h->pdev); 7615105a3dbcSRobert Elliott h->msi_vector = 0; 7616cc64c817SRobert Elliott } 7617cc64c817SRobert Elliott } 7618cc64c817SRobert Elliott 7619edd16368SStephen M. Cameron /* If MSI/MSI-X is supported by the kernel we will try to enable it on 7620050f7147SStephen Cameron * controllers that are capable. If not, we use legacy INTx mode. 7621edd16368SStephen M. Cameron */ 76226f039790SGreg Kroah-Hartman static void hpsa_interrupt_mode(struct ctlr_info *h) 7623edd16368SStephen M. Cameron { 7624edd16368SStephen M. Cameron #ifdef CONFIG_PCI_MSI 7625254f796bSMatt Gates int err, i; 7626254f796bSMatt Gates struct msix_entry hpsa_msix_entries[MAX_REPLY_QUEUES]; 7627254f796bSMatt Gates 7628254f796bSMatt Gates for (i = 0; i < MAX_REPLY_QUEUES; i++) { 7629254f796bSMatt Gates hpsa_msix_entries[i].vector = 0; 7630254f796bSMatt Gates hpsa_msix_entries[i].entry = i; 7631254f796bSMatt Gates } 7632edd16368SStephen M. Cameron 7633edd16368SStephen M. Cameron /* Some boards advertise MSI but don't really support it */ 76346b3f4c52SStephen M. Cameron if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) || 76356b3f4c52SStephen M. Cameron (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11)) 7636edd16368SStephen M. Cameron goto default_int_mode; 763755c06c71SStephen M. Cameron if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) { 7638050f7147SStephen Cameron dev_info(&h->pdev->dev, "MSI-X capable controller\n"); 7639eee0f03aSHannes Reinecke h->msix_vector = MAX_REPLY_QUEUES; 7640f89439bcSStephen M. Cameron if (h->msix_vector > num_online_cpus()) 7641f89439bcSStephen M. Cameron h->msix_vector = num_online_cpus(); 764218fce3c4SAlexander Gordeev err = pci_enable_msix_range(h->pdev, hpsa_msix_entries, 764318fce3c4SAlexander Gordeev 1, h->msix_vector); 764418fce3c4SAlexander Gordeev if (err < 0) { 764518fce3c4SAlexander Gordeev dev_warn(&h->pdev->dev, "MSI-X init failed %d\n", err); 764618fce3c4SAlexander Gordeev h->msix_vector = 0; 764718fce3c4SAlexander Gordeev goto single_msi_mode; 764818fce3c4SAlexander Gordeev } else if (err < h->msix_vector) { 764955c06c71SStephen M. Cameron dev_warn(&h->pdev->dev, "only %d MSI-X vectors " 7650edd16368SStephen M. Cameron "available\n", err); 7651eee0f03aSHannes Reinecke } 765218fce3c4SAlexander Gordeev h->msix_vector = err; 7653eee0f03aSHannes Reinecke for (i = 0; i < h->msix_vector; i++) 7654eee0f03aSHannes Reinecke h->intr[i] = hpsa_msix_entries[i].vector; 7655eee0f03aSHannes Reinecke return; 7656edd16368SStephen M. Cameron } 765718fce3c4SAlexander Gordeev single_msi_mode: 765855c06c71SStephen M. Cameron if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) { 7659050f7147SStephen Cameron dev_info(&h->pdev->dev, "MSI capable controller\n"); 766055c06c71SStephen M. Cameron if (!pci_enable_msi(h->pdev)) 7661edd16368SStephen M. Cameron h->msi_vector = 1; 7662edd16368SStephen M. Cameron else 766355c06c71SStephen M. Cameron dev_warn(&h->pdev->dev, "MSI init failed\n"); 7664edd16368SStephen M. Cameron } 7665edd16368SStephen M. Cameron default_int_mode: 7666edd16368SStephen M. Cameron #endif /* CONFIG_PCI_MSI */ 7667edd16368SStephen M. Cameron /* if we get here we're going to use the default interrupt mode */ 7668a9a3a273SStephen M. Cameron h->intr[h->intr_mode] = h->pdev->irq; 7669edd16368SStephen M. Cameron } 7670edd16368SStephen M. Cameron 76716f039790SGreg Kroah-Hartman static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id) 7672e5c880d1SStephen M. Cameron { 7673e5c880d1SStephen M. Cameron int i; 7674e5c880d1SStephen M. Cameron u32 subsystem_vendor_id, subsystem_device_id; 7675e5c880d1SStephen M. Cameron 7676e5c880d1SStephen M. Cameron subsystem_vendor_id = pdev->subsystem_vendor; 7677e5c880d1SStephen M. Cameron subsystem_device_id = pdev->subsystem_device; 7678e5c880d1SStephen M. Cameron *board_id = ((subsystem_device_id << 16) & 0xffff0000) | 7679e5c880d1SStephen M. Cameron subsystem_vendor_id; 7680e5c880d1SStephen M. Cameron 7681e5c880d1SStephen M. Cameron for (i = 0; i < ARRAY_SIZE(products); i++) 7682e5c880d1SStephen M. Cameron if (*board_id == products[i].board_id) 7683e5c880d1SStephen M. Cameron return i; 7684e5c880d1SStephen M. Cameron 76856798cc0aSStephen M. Cameron if ((subsystem_vendor_id != PCI_VENDOR_ID_HP && 76866798cc0aSStephen M. Cameron subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) || 76876798cc0aSStephen M. Cameron !hpsa_allow_any) { 7688e5c880d1SStephen M. Cameron dev_warn(&pdev->dev, "unrecognized board ID: " 7689e5c880d1SStephen M. Cameron "0x%08x, ignoring.\n", *board_id); 7690e5c880d1SStephen M. Cameron return -ENODEV; 7691e5c880d1SStephen M. Cameron } 7692e5c880d1SStephen M. Cameron return ARRAY_SIZE(products) - 1; /* generic unknown smart array */ 7693e5c880d1SStephen M. Cameron } 7694e5c880d1SStephen M. Cameron 76956f039790SGreg Kroah-Hartman static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 76963a7774ceSStephen M. Cameron unsigned long *memory_bar) 76973a7774ceSStephen M. Cameron { 76983a7774ceSStephen M. Cameron int i; 76993a7774ceSStephen M. Cameron 77003a7774ceSStephen M. Cameron for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) 770112d2cd47SStephen M. Cameron if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) { 77023a7774ceSStephen M. Cameron /* addressing mode bits already removed */ 770312d2cd47SStephen M. Cameron *memory_bar = pci_resource_start(pdev, i); 770412d2cd47SStephen M. Cameron dev_dbg(&pdev->dev, "memory BAR = %lx\n", 77053a7774ceSStephen M. Cameron *memory_bar); 77063a7774ceSStephen M. Cameron return 0; 77073a7774ceSStephen M. Cameron } 770812d2cd47SStephen M. Cameron dev_warn(&pdev->dev, "no memory BAR found\n"); 77093a7774ceSStephen M. Cameron return -ENODEV; 77103a7774ceSStephen M. Cameron } 77113a7774ceSStephen M. Cameron 77126f039790SGreg Kroah-Hartman static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 77136f039790SGreg Kroah-Hartman int wait_for_ready) 77142c4c8c8bSStephen M. Cameron { 7715fe5389c8SStephen M. Cameron int i, iterations; 77162c4c8c8bSStephen M. Cameron u32 scratchpad; 7717fe5389c8SStephen M. Cameron if (wait_for_ready) 7718fe5389c8SStephen M. Cameron iterations = HPSA_BOARD_READY_ITERATIONS; 7719fe5389c8SStephen M. Cameron else 7720fe5389c8SStephen M. Cameron iterations = HPSA_BOARD_NOT_READY_ITERATIONS; 77212c4c8c8bSStephen M. Cameron 7722fe5389c8SStephen M. Cameron for (i = 0; i < iterations; i++) { 7723fe5389c8SStephen M. Cameron scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET); 7724fe5389c8SStephen M. Cameron if (wait_for_ready) { 77252c4c8c8bSStephen M. Cameron if (scratchpad == HPSA_FIRMWARE_READY) 77262c4c8c8bSStephen M. Cameron return 0; 7727fe5389c8SStephen M. Cameron } else { 7728fe5389c8SStephen M. Cameron if (scratchpad != HPSA_FIRMWARE_READY) 7729fe5389c8SStephen M. Cameron return 0; 7730fe5389c8SStephen M. Cameron } 77312c4c8c8bSStephen M. Cameron msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS); 77322c4c8c8bSStephen M. Cameron } 7733fe5389c8SStephen M. Cameron dev_warn(&pdev->dev, "board not ready, timed out.\n"); 77342c4c8c8bSStephen M. Cameron return -ENODEV; 77352c4c8c8bSStephen M. Cameron } 77362c4c8c8bSStephen M. Cameron 77376f039790SGreg Kroah-Hartman static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 77386f039790SGreg Kroah-Hartman u32 *cfg_base_addr, u64 *cfg_base_addr_index, 7739a51fd47fSStephen M. Cameron u64 *cfg_offset) 7740a51fd47fSStephen M. Cameron { 7741a51fd47fSStephen M. Cameron *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET); 7742a51fd47fSStephen M. Cameron *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET); 7743a51fd47fSStephen M. Cameron *cfg_base_addr &= (u32) 0x0000ffff; 7744a51fd47fSStephen M. Cameron *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr); 7745a51fd47fSStephen M. Cameron if (*cfg_base_addr_index == -1) { 7746a51fd47fSStephen M. Cameron dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n"); 7747a51fd47fSStephen M. Cameron return -ENODEV; 7748a51fd47fSStephen M. Cameron } 7749a51fd47fSStephen M. Cameron return 0; 7750a51fd47fSStephen M. Cameron } 7751a51fd47fSStephen M. Cameron 7752195f2c65SRobert Elliott static void hpsa_free_cfgtables(struct ctlr_info *h) 7753195f2c65SRobert Elliott { 7754105a3dbcSRobert Elliott if (h->transtable) { 7755195f2c65SRobert Elliott iounmap(h->transtable); 7756105a3dbcSRobert Elliott h->transtable = NULL; 7757105a3dbcSRobert Elliott } 7758105a3dbcSRobert Elliott if (h->cfgtable) { 7759195f2c65SRobert Elliott iounmap(h->cfgtable); 7760105a3dbcSRobert Elliott h->cfgtable = NULL; 7761105a3dbcSRobert Elliott } 7762195f2c65SRobert Elliott } 7763195f2c65SRobert Elliott 7764195f2c65SRobert Elliott /* Find and map CISS config table and transfer table 7765195f2c65SRobert Elliott + * several items must be unmapped (freed) later 7766195f2c65SRobert Elliott + * */ 77676f039790SGreg Kroah-Hartman static int hpsa_find_cfgtables(struct ctlr_info *h) 7768edd16368SStephen M. Cameron { 776901a02ffcSStephen M. Cameron u64 cfg_offset; 777001a02ffcSStephen M. Cameron u32 cfg_base_addr; 777101a02ffcSStephen M. Cameron u64 cfg_base_addr_index; 7772303932fdSDon Brace u32 trans_offset; 7773a51fd47fSStephen M. Cameron int rc; 777477c4495cSStephen M. Cameron 7775a51fd47fSStephen M. Cameron rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 7776a51fd47fSStephen M. Cameron &cfg_base_addr_index, &cfg_offset); 7777a51fd47fSStephen M. Cameron if (rc) 7778a51fd47fSStephen M. Cameron return rc; 777977c4495cSStephen M. Cameron h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev, 7780a51fd47fSStephen M. Cameron cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable)); 7781cd3c81c4SRobert Elliott if (!h->cfgtable) { 7782cd3c81c4SRobert Elliott dev_err(&h->pdev->dev, "Failed mapping cfgtable\n"); 778377c4495cSStephen M. Cameron return -ENOMEM; 7784cd3c81c4SRobert Elliott } 7785580ada3cSStephen M. Cameron rc = write_driver_ver_to_cfgtable(h->cfgtable); 7786580ada3cSStephen M. Cameron if (rc) 7787580ada3cSStephen M. Cameron return rc; 778877c4495cSStephen M. Cameron /* Find performant mode table. */ 7789a51fd47fSStephen M. Cameron trans_offset = readl(&h->cfgtable->TransMethodOffset); 779077c4495cSStephen M. Cameron h->transtable = remap_pci_mem(pci_resource_start(h->pdev, 779177c4495cSStephen M. Cameron cfg_base_addr_index)+cfg_offset+trans_offset, 779277c4495cSStephen M. Cameron sizeof(*h->transtable)); 7793195f2c65SRobert Elliott if (!h->transtable) { 7794195f2c65SRobert Elliott dev_err(&h->pdev->dev, "Failed mapping transfer table\n"); 7795195f2c65SRobert Elliott hpsa_free_cfgtables(h); 779677c4495cSStephen M. Cameron return -ENOMEM; 7797195f2c65SRobert Elliott } 779877c4495cSStephen M. Cameron return 0; 779977c4495cSStephen M. Cameron } 780077c4495cSStephen M. Cameron 78016f039790SGreg Kroah-Hartman static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h) 7802cba3d38bSStephen M. Cameron { 780341ce4c35SStephen Cameron #define MIN_MAX_COMMANDS 16 780441ce4c35SStephen Cameron BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS); 780541ce4c35SStephen Cameron 780641ce4c35SStephen Cameron h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands); 780772ceeaecSStephen M. Cameron 780872ceeaecSStephen M. Cameron /* Limit commands in memory limited kdump scenario. */ 780972ceeaecSStephen M. Cameron if (reset_devices && h->max_commands > 32) 781072ceeaecSStephen M. Cameron h->max_commands = 32; 781172ceeaecSStephen M. Cameron 781241ce4c35SStephen Cameron if (h->max_commands < MIN_MAX_COMMANDS) { 781341ce4c35SStephen Cameron dev_warn(&h->pdev->dev, 781441ce4c35SStephen Cameron "Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n", 781541ce4c35SStephen Cameron h->max_commands, 781641ce4c35SStephen Cameron MIN_MAX_COMMANDS); 781741ce4c35SStephen Cameron h->max_commands = MIN_MAX_COMMANDS; 7818cba3d38bSStephen M. Cameron } 7819cba3d38bSStephen M. Cameron } 7820cba3d38bSStephen M. Cameron 7821c7ee65b3SWebb Scales /* If the controller reports that the total max sg entries is greater than 512, 7822c7ee65b3SWebb Scales * then we know that chained SG blocks work. (Original smart arrays did not 7823c7ee65b3SWebb Scales * support chained SG blocks and would return zero for max sg entries.) 7824c7ee65b3SWebb Scales */ 7825c7ee65b3SWebb Scales static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h) 7826c7ee65b3SWebb Scales { 7827c7ee65b3SWebb Scales return h->maxsgentries > 512; 7828c7ee65b3SWebb Scales } 7829c7ee65b3SWebb Scales 7830b93d7536SStephen M. Cameron /* Interrogate the hardware for some limits: 7831b93d7536SStephen M. Cameron * max commands, max SG elements without chaining, and with chaining, 7832b93d7536SStephen M. Cameron * SG chain block size, etc. 7833b93d7536SStephen M. Cameron */ 78346f039790SGreg Kroah-Hartman static void hpsa_find_board_params(struct ctlr_info *h) 7835b93d7536SStephen M. Cameron { 7836cba3d38bSStephen M. Cameron hpsa_get_max_perf_mode_cmds(h); 783745fcb86eSStephen Cameron h->nr_cmds = h->max_commands; 7838b93d7536SStephen M. Cameron h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements)); 7839283b4a9bSStephen M. Cameron h->fw_support = readl(&(h->cfgtable->misc_fw_support)); 7840c7ee65b3SWebb Scales if (hpsa_supports_chained_sg_blocks(h)) { 7841c7ee65b3SWebb Scales /* Limit in-command s/g elements to 32 save dma'able memory. */ 7842b93d7536SStephen M. Cameron h->max_cmd_sg_entries = 32; 78431a63ea6fSWebb Scales h->chainsize = h->maxsgentries - h->max_cmd_sg_entries; 7844b93d7536SStephen M. Cameron h->maxsgentries--; /* save one for chain pointer */ 7845b93d7536SStephen M. Cameron } else { 7846c7ee65b3SWebb Scales /* 7847c7ee65b3SWebb Scales * Original smart arrays supported at most 31 s/g entries 7848c7ee65b3SWebb Scales * embedded inline in the command (trying to use more 7849c7ee65b3SWebb Scales * would lock up the controller) 7850c7ee65b3SWebb Scales */ 7851c7ee65b3SWebb Scales h->max_cmd_sg_entries = 31; 78521a63ea6fSWebb Scales h->maxsgentries = 31; /* default to traditional values */ 7853c7ee65b3SWebb Scales h->chainsize = 0; 7854b93d7536SStephen M. Cameron } 785575167d2cSStephen M. Cameron 785675167d2cSStephen M. Cameron /* Find out what task management functions are supported and cache */ 785775167d2cSStephen M. Cameron h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags)); 78580e7a7fceSScott Teel if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags)) 78590e7a7fceSScott Teel dev_warn(&h->pdev->dev, "Physical aborts not supported\n"); 78600e7a7fceSScott Teel if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags)) 78610e7a7fceSScott Teel dev_warn(&h->pdev->dev, "Logical aborts not supported\n"); 78628be986ccSStephen Cameron if (!(HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags)) 78638be986ccSStephen Cameron dev_warn(&h->pdev->dev, "HP SSD Smart Path aborts not supported\n"); 7864b93d7536SStephen M. Cameron } 7865b93d7536SStephen M. Cameron 786676c46e49SStephen M. Cameron static inline bool hpsa_CISS_signature_present(struct ctlr_info *h) 786776c46e49SStephen M. Cameron { 78680fc9fd40SAkinobu Mita if (!check_signature(h->cfgtable->Signature, "CISS", 4)) { 7869050f7147SStephen Cameron dev_err(&h->pdev->dev, "not a valid CISS config table\n"); 787076c46e49SStephen M. Cameron return false; 787176c46e49SStephen M. Cameron } 787276c46e49SStephen M. Cameron return true; 787376c46e49SStephen M. Cameron } 787476c46e49SStephen M. Cameron 787597a5e98cSStephen M. Cameron static inline void hpsa_set_driver_support_bits(struct ctlr_info *h) 7876f7c39101SStephen M. Cameron { 787797a5e98cSStephen M. Cameron u32 driver_support; 7878f7c39101SStephen M. Cameron 787997a5e98cSStephen M. Cameron driver_support = readl(&(h->cfgtable->driver_support)); 78800b9e7b74SArnd Bergmann /* Need to enable prefetch in the SCSI core for 6400 in x86 */ 78810b9e7b74SArnd Bergmann #ifdef CONFIG_X86 788297a5e98cSStephen M. Cameron driver_support |= ENABLE_SCSI_PREFETCH; 7883f7c39101SStephen M. Cameron #endif 788428e13446SStephen M. Cameron driver_support |= ENABLE_UNIT_ATTN; 788528e13446SStephen M. Cameron writel(driver_support, &(h->cfgtable->driver_support)); 7886f7c39101SStephen M. Cameron } 7887f7c39101SStephen M. Cameron 78883d0eab67SStephen M. Cameron /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result 78893d0eab67SStephen M. Cameron * in a prefetch beyond physical memory. 78903d0eab67SStephen M. Cameron */ 78913d0eab67SStephen M. Cameron static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h) 78923d0eab67SStephen M. Cameron { 78933d0eab67SStephen M. Cameron u32 dma_prefetch; 78943d0eab67SStephen M. Cameron 78953d0eab67SStephen M. Cameron if (h->board_id != 0x3225103C) 78963d0eab67SStephen M. Cameron return; 78973d0eab67SStephen M. Cameron dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG); 78983d0eab67SStephen M. Cameron dma_prefetch |= 0x8000; 78993d0eab67SStephen M. Cameron writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG); 79003d0eab67SStephen M. Cameron } 79013d0eab67SStephen M. Cameron 7902c706a795SRobert Elliott static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h) 790376438d08SStephen M. Cameron { 790476438d08SStephen M. Cameron int i; 790576438d08SStephen M. Cameron u32 doorbell_value; 790676438d08SStephen M. Cameron unsigned long flags; 790776438d08SStephen M. Cameron /* wait until the clear_event_notify bit 6 is cleared by controller. */ 7908007e7aa9SRobert Elliott for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) { 790976438d08SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 791076438d08SStephen M. Cameron doorbell_value = readl(h->vaddr + SA5_DOORBELL); 791176438d08SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 791276438d08SStephen M. Cameron if (!(doorbell_value & DOORBELL_CLEAR_EVENTS)) 7913c706a795SRobert Elliott goto done; 791476438d08SStephen M. Cameron /* delay and try again */ 7915007e7aa9SRobert Elliott msleep(CLEAR_EVENT_WAIT_INTERVAL); 791676438d08SStephen M. Cameron } 7917c706a795SRobert Elliott return -ENODEV; 7918c706a795SRobert Elliott done: 7919c706a795SRobert Elliott return 0; 792076438d08SStephen M. Cameron } 792176438d08SStephen M. Cameron 7922c706a795SRobert Elliott static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h) 7923eb6b2ae9SStephen M. Cameron { 7924eb6b2ae9SStephen M. Cameron int i; 79256eaf46fdSStephen M. Cameron u32 doorbell_value; 79266eaf46fdSStephen M. Cameron unsigned long flags; 7927eb6b2ae9SStephen M. Cameron 7928eb6b2ae9SStephen M. Cameron /* under certain very rare conditions, this can take awhile. 7929eb6b2ae9SStephen M. Cameron * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right 7930eb6b2ae9SStephen M. Cameron * as we enter this code.) 7931eb6b2ae9SStephen M. Cameron */ 7932007e7aa9SRobert Elliott for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) { 793325163bd5SWebb Scales if (h->remove_in_progress) 793425163bd5SWebb Scales goto done; 79356eaf46fdSStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 79366eaf46fdSStephen M. Cameron doorbell_value = readl(h->vaddr + SA5_DOORBELL); 79376eaf46fdSStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 7938382be668SDan Carpenter if (!(doorbell_value & CFGTBL_ChangeReq)) 7939c706a795SRobert Elliott goto done; 7940eb6b2ae9SStephen M. Cameron /* delay and try again */ 7941007e7aa9SRobert Elliott msleep(MODE_CHANGE_WAIT_INTERVAL); 7942eb6b2ae9SStephen M. Cameron } 7943c706a795SRobert Elliott return -ENODEV; 7944c706a795SRobert Elliott done: 7945c706a795SRobert Elliott return 0; 79463f4336f3SStephen M. Cameron } 79473f4336f3SStephen M. Cameron 7948c706a795SRobert Elliott /* return -ENODEV or other reason on error, 0 on success */ 79496f039790SGreg Kroah-Hartman static int hpsa_enter_simple_mode(struct ctlr_info *h) 79503f4336f3SStephen M. Cameron { 79513f4336f3SStephen M. Cameron u32 trans_support; 79523f4336f3SStephen M. Cameron 79533f4336f3SStephen M. Cameron trans_support = readl(&(h->cfgtable->TransportSupport)); 79543f4336f3SStephen M. Cameron if (!(trans_support & SIMPLE_MODE)) 79553f4336f3SStephen M. Cameron return -ENOTSUPP; 79563f4336f3SStephen M. Cameron 79573f4336f3SStephen M. Cameron h->max_commands = readl(&(h->cfgtable->CmdsOutMax)); 7958283b4a9bSStephen M. Cameron 79593f4336f3SStephen M. Cameron /* Update the field, and then ring the doorbell */ 79603f4336f3SStephen M. Cameron writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest)); 7961b9af4937SStephen M. Cameron writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi); 79623f4336f3SStephen M. Cameron writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 7963c706a795SRobert Elliott if (hpsa_wait_for_mode_change_ack(h)) 7964c706a795SRobert Elliott goto error; 7965eb6b2ae9SStephen M. Cameron print_cfg_table(&h->pdev->dev, h->cfgtable); 7966283b4a9bSStephen M. Cameron if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) 7967283b4a9bSStephen M. Cameron goto error; 7968960a30e7SStephen M. Cameron h->transMethod = CFGTBL_Trans_Simple; 7969eb6b2ae9SStephen M. Cameron return 0; 7970283b4a9bSStephen M. Cameron error: 7971050f7147SStephen Cameron dev_err(&h->pdev->dev, "failed to enter simple mode\n"); 7972283b4a9bSStephen M. Cameron return -ENODEV; 7973eb6b2ae9SStephen M. Cameron } 7974eb6b2ae9SStephen M. Cameron 7975195f2c65SRobert Elliott /* free items allocated or mapped by hpsa_pci_init */ 7976195f2c65SRobert Elliott static void hpsa_free_pci_init(struct ctlr_info *h) 7977195f2c65SRobert Elliott { 7978195f2c65SRobert Elliott hpsa_free_cfgtables(h); /* pci_init 4 */ 7979195f2c65SRobert Elliott iounmap(h->vaddr); /* pci_init 3 */ 7980105a3dbcSRobert Elliott h->vaddr = NULL; 7981195f2c65SRobert Elliott hpsa_disable_interrupt_mode(h); /* pci_init 2 */ 7982943a7021SRobert Elliott /* 7983943a7021SRobert Elliott * call pci_disable_device before pci_release_regions per 7984943a7021SRobert Elliott * Documentation/PCI/pci.txt 7985943a7021SRobert Elliott */ 7986195f2c65SRobert Elliott pci_disable_device(h->pdev); /* pci_init 1 */ 7987943a7021SRobert Elliott pci_release_regions(h->pdev); /* pci_init 2 */ 7988195f2c65SRobert Elliott } 7989195f2c65SRobert Elliott 7990195f2c65SRobert Elliott /* several items must be freed later */ 79916f039790SGreg Kroah-Hartman static int hpsa_pci_init(struct ctlr_info *h) 799277c4495cSStephen M. Cameron { 7993eb6b2ae9SStephen M. Cameron int prod_index, err; 7994edd16368SStephen M. Cameron 7995e5c880d1SStephen M. Cameron prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id); 7996e5c880d1SStephen M. Cameron if (prod_index < 0) 799760f923b9SRobert Elliott return prod_index; 7998e5c880d1SStephen M. Cameron h->product_name = products[prod_index].product_name; 7999e5c880d1SStephen M. Cameron h->access = *(products[prod_index].access); 8000e5c880d1SStephen M. Cameron 80019b5c48c2SStephen Cameron h->needs_abort_tags_swizzled = 80029b5c48c2SStephen Cameron ctlr_needs_abort_tags_swizzled(h->board_id); 80039b5c48c2SStephen Cameron 8004e5a44df8SMatthew Garrett pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S | 8005e5a44df8SMatthew Garrett PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM); 8006e5a44df8SMatthew Garrett 800755c06c71SStephen M. Cameron err = pci_enable_device(h->pdev); 8008edd16368SStephen M. Cameron if (err) { 8009195f2c65SRobert Elliott dev_err(&h->pdev->dev, "failed to enable PCI device\n"); 8010943a7021SRobert Elliott pci_disable_device(h->pdev); 8011edd16368SStephen M. Cameron return err; 8012edd16368SStephen M. Cameron } 8013edd16368SStephen M. Cameron 8014f79cfec6SStephen M. Cameron err = pci_request_regions(h->pdev, HPSA); 8015edd16368SStephen M. Cameron if (err) { 801655c06c71SStephen M. Cameron dev_err(&h->pdev->dev, 8017195f2c65SRobert Elliott "failed to obtain PCI resources\n"); 8018943a7021SRobert Elliott pci_disable_device(h->pdev); 8019943a7021SRobert Elliott return err; 8020edd16368SStephen M. Cameron } 80214fa604e1SRobert Elliott 80224fa604e1SRobert Elliott pci_set_master(h->pdev); 80234fa604e1SRobert Elliott 80246b3f4c52SStephen M. Cameron hpsa_interrupt_mode(h); 802512d2cd47SStephen M. Cameron err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr); 80263a7774ceSStephen M. Cameron if (err) 8027195f2c65SRobert Elliott goto clean2; /* intmode+region, pci */ 8028edd16368SStephen M. Cameron h->vaddr = remap_pci_mem(h->paddr, 0x250); 8029204892e9SStephen M. Cameron if (!h->vaddr) { 8030195f2c65SRobert Elliott dev_err(&h->pdev->dev, "failed to remap PCI mem\n"); 8031204892e9SStephen M. Cameron err = -ENOMEM; 8032195f2c65SRobert Elliott goto clean2; /* intmode+region, pci */ 8033204892e9SStephen M. Cameron } 8034fe5389c8SStephen M. Cameron err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 80352c4c8c8bSStephen M. Cameron if (err) 8036195f2c65SRobert Elliott goto clean3; /* vaddr, intmode+region, pci */ 803777c4495cSStephen M. Cameron err = hpsa_find_cfgtables(h); 803877c4495cSStephen M. Cameron if (err) 8039195f2c65SRobert Elliott goto clean3; /* vaddr, intmode+region, pci */ 8040b93d7536SStephen M. Cameron hpsa_find_board_params(h); 8041edd16368SStephen M. Cameron 804276c46e49SStephen M. Cameron if (!hpsa_CISS_signature_present(h)) { 8043edd16368SStephen M. Cameron err = -ENODEV; 8044195f2c65SRobert Elliott goto clean4; /* cfgtables, vaddr, intmode+region, pci */ 8045edd16368SStephen M. Cameron } 804697a5e98cSStephen M. Cameron hpsa_set_driver_support_bits(h); 80473d0eab67SStephen M. Cameron hpsa_p600_dma_prefetch_quirk(h); 8048eb6b2ae9SStephen M. Cameron err = hpsa_enter_simple_mode(h); 8049eb6b2ae9SStephen M. Cameron if (err) 8050195f2c65SRobert Elliott goto clean4; /* cfgtables, vaddr, intmode+region, pci */ 8051edd16368SStephen M. Cameron return 0; 8052edd16368SStephen M. Cameron 8053195f2c65SRobert Elliott clean4: /* cfgtables, vaddr, intmode+region, pci */ 8054195f2c65SRobert Elliott hpsa_free_cfgtables(h); 8055195f2c65SRobert Elliott clean3: /* vaddr, intmode+region, pci */ 8056204892e9SStephen M. Cameron iounmap(h->vaddr); 8057105a3dbcSRobert Elliott h->vaddr = NULL; 8058195f2c65SRobert Elliott clean2: /* intmode+region, pci */ 8059195f2c65SRobert Elliott hpsa_disable_interrupt_mode(h); 8060943a7021SRobert Elliott /* 8061943a7021SRobert Elliott * call pci_disable_device before pci_release_regions per 8062943a7021SRobert Elliott * Documentation/PCI/pci.txt 8063943a7021SRobert Elliott */ 8064195f2c65SRobert Elliott pci_disable_device(h->pdev); 8065943a7021SRobert Elliott pci_release_regions(h->pdev); 8066edd16368SStephen M. Cameron return err; 8067edd16368SStephen M. Cameron } 8068edd16368SStephen M. Cameron 80696f039790SGreg Kroah-Hartman static void hpsa_hba_inquiry(struct ctlr_info *h) 8070339b2b14SStephen M. Cameron { 8071339b2b14SStephen M. Cameron int rc; 8072339b2b14SStephen M. Cameron 8073339b2b14SStephen M. Cameron #define HBA_INQUIRY_BYTE_COUNT 64 8074339b2b14SStephen M. Cameron h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL); 8075339b2b14SStephen M. Cameron if (!h->hba_inquiry_data) 8076339b2b14SStephen M. Cameron return; 8077339b2b14SStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0, 8078339b2b14SStephen M. Cameron h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT); 8079339b2b14SStephen M. Cameron if (rc != 0) { 8080339b2b14SStephen M. Cameron kfree(h->hba_inquiry_data); 8081339b2b14SStephen M. Cameron h->hba_inquiry_data = NULL; 8082339b2b14SStephen M. Cameron } 8083339b2b14SStephen M. Cameron } 8084339b2b14SStephen M. Cameron 80856b6c1cd7STomas Henzl static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id) 8086edd16368SStephen M. Cameron { 80871df8552aSStephen M. Cameron int rc, i; 80883b747298STomas Henzl void __iomem *vaddr; 8089edd16368SStephen M. Cameron 80904c2a8c40SStephen M. Cameron if (!reset_devices) 80914c2a8c40SStephen M. Cameron return 0; 80924c2a8c40SStephen M. Cameron 8093132aa220STomas Henzl /* kdump kernel is loading, we don't know in which state is 8094132aa220STomas Henzl * the pci interface. The dev->enable_cnt is equal zero 8095132aa220STomas Henzl * so we call enable+disable, wait a while and switch it on. 8096132aa220STomas Henzl */ 8097132aa220STomas Henzl rc = pci_enable_device(pdev); 8098132aa220STomas Henzl if (rc) { 8099132aa220STomas Henzl dev_warn(&pdev->dev, "Failed to enable PCI device\n"); 8100132aa220STomas Henzl return -ENODEV; 8101132aa220STomas Henzl } 8102132aa220STomas Henzl pci_disable_device(pdev); 8103132aa220STomas Henzl msleep(260); /* a randomly chosen number */ 8104132aa220STomas Henzl rc = pci_enable_device(pdev); 8105132aa220STomas Henzl if (rc) { 8106132aa220STomas Henzl dev_warn(&pdev->dev, "failed to enable device.\n"); 8107132aa220STomas Henzl return -ENODEV; 8108132aa220STomas Henzl } 81094fa604e1SRobert Elliott 8110859c75abSTomas Henzl pci_set_master(pdev); 81114fa604e1SRobert Elliott 81123b747298STomas Henzl vaddr = pci_ioremap_bar(pdev, 0); 81133b747298STomas Henzl if (vaddr == NULL) { 81143b747298STomas Henzl rc = -ENOMEM; 81153b747298STomas Henzl goto out_disable; 81163b747298STomas Henzl } 81173b747298STomas Henzl writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET); 81183b747298STomas Henzl iounmap(vaddr); 81193b747298STomas Henzl 81201df8552aSStephen M. Cameron /* Reset the controller with a PCI power-cycle or via doorbell */ 81216b6c1cd7STomas Henzl rc = hpsa_kdump_hard_reset_controller(pdev, board_id); 8122edd16368SStephen M. Cameron 81231df8552aSStephen M. Cameron /* -ENOTSUPP here means we cannot reset the controller 81241df8552aSStephen M. Cameron * but it's already (and still) up and running in 812518867659SStephen M. Cameron * "performant mode". Or, it might be 640x, which can't reset 812618867659SStephen M. Cameron * due to concerns about shared bbwc between 6402/6404 pair. 81271df8552aSStephen M. Cameron */ 8128adf1b3a3SRobert Elliott if (rc) 8129132aa220STomas Henzl goto out_disable; 8130edd16368SStephen M. Cameron 8131edd16368SStephen M. Cameron /* Now try to get the controller to respond to a no-op */ 81321ba66c9cSRobert Elliott dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n"); 8133edd16368SStephen M. Cameron for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) { 8134edd16368SStephen M. Cameron if (hpsa_noop(pdev) == 0) 8135edd16368SStephen M. Cameron break; 8136edd16368SStephen M. Cameron else 8137edd16368SStephen M. Cameron dev_warn(&pdev->dev, "no-op failed%s\n", 8138edd16368SStephen M. Cameron (i < 11 ? "; re-trying" : "")); 8139edd16368SStephen M. Cameron } 8140132aa220STomas Henzl 8141132aa220STomas Henzl out_disable: 8142132aa220STomas Henzl 8143132aa220STomas Henzl pci_disable_device(pdev); 8144132aa220STomas Henzl return rc; 8145edd16368SStephen M. Cameron } 8146edd16368SStephen M. Cameron 81471fb7c98aSRobert Elliott static void hpsa_free_cmd_pool(struct ctlr_info *h) 81481fb7c98aSRobert Elliott { 81491fb7c98aSRobert Elliott kfree(h->cmd_pool_bits); 8150105a3dbcSRobert Elliott h->cmd_pool_bits = NULL; 8151105a3dbcSRobert Elliott if (h->cmd_pool) { 81521fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 81531fb7c98aSRobert Elliott h->nr_cmds * sizeof(struct CommandList), 81541fb7c98aSRobert Elliott h->cmd_pool, 81551fb7c98aSRobert Elliott h->cmd_pool_dhandle); 8156105a3dbcSRobert Elliott h->cmd_pool = NULL; 8157105a3dbcSRobert Elliott h->cmd_pool_dhandle = 0; 8158105a3dbcSRobert Elliott } 8159105a3dbcSRobert Elliott if (h->errinfo_pool) { 81601fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 81611fb7c98aSRobert Elliott h->nr_cmds * sizeof(struct ErrorInfo), 81621fb7c98aSRobert Elliott h->errinfo_pool, 81631fb7c98aSRobert Elliott h->errinfo_pool_dhandle); 8164105a3dbcSRobert Elliott h->errinfo_pool = NULL; 8165105a3dbcSRobert Elliott h->errinfo_pool_dhandle = 0; 8166105a3dbcSRobert Elliott } 81671fb7c98aSRobert Elliott } 81681fb7c98aSRobert Elliott 8169d37ffbe4SRobert Elliott static int hpsa_alloc_cmd_pool(struct ctlr_info *h) 81702e9d1b36SStephen M. Cameron { 81712e9d1b36SStephen M. Cameron h->cmd_pool_bits = kzalloc( 81722e9d1b36SStephen M. Cameron DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) * 81732e9d1b36SStephen M. Cameron sizeof(unsigned long), GFP_KERNEL); 81742e9d1b36SStephen M. Cameron h->cmd_pool = pci_alloc_consistent(h->pdev, 81752e9d1b36SStephen M. Cameron h->nr_cmds * sizeof(*h->cmd_pool), 81762e9d1b36SStephen M. Cameron &(h->cmd_pool_dhandle)); 81772e9d1b36SStephen M. Cameron h->errinfo_pool = pci_alloc_consistent(h->pdev, 81782e9d1b36SStephen M. Cameron h->nr_cmds * sizeof(*h->errinfo_pool), 81792e9d1b36SStephen M. Cameron &(h->errinfo_pool_dhandle)); 81802e9d1b36SStephen M. Cameron if ((h->cmd_pool_bits == NULL) 81812e9d1b36SStephen M. Cameron || (h->cmd_pool == NULL) 81822e9d1b36SStephen M. Cameron || (h->errinfo_pool == NULL)) { 81832e9d1b36SStephen M. Cameron dev_err(&h->pdev->dev, "out of memory in %s", __func__); 81842c143342SRobert Elliott goto clean_up; 81852e9d1b36SStephen M. Cameron } 8186360c73bdSStephen Cameron hpsa_preinitialize_commands(h); 81872e9d1b36SStephen M. Cameron return 0; 81882c143342SRobert Elliott clean_up: 81892c143342SRobert Elliott hpsa_free_cmd_pool(h); 81902c143342SRobert Elliott return -ENOMEM; 81912e9d1b36SStephen M. Cameron } 81922e9d1b36SStephen M. Cameron 819341b3cf08SStephen M. Cameron static void hpsa_irq_affinity_hints(struct ctlr_info *h) 819441b3cf08SStephen M. Cameron { 8195ec429952SFabian Frederick int i, cpu; 819641b3cf08SStephen M. Cameron 819741b3cf08SStephen M. Cameron cpu = cpumask_first(cpu_online_mask); 819841b3cf08SStephen M. Cameron for (i = 0; i < h->msix_vector; i++) { 8199ec429952SFabian Frederick irq_set_affinity_hint(h->intr[i], get_cpu_mask(cpu)); 820041b3cf08SStephen M. Cameron cpu = cpumask_next(cpu, cpu_online_mask); 820141b3cf08SStephen M. Cameron } 820241b3cf08SStephen M. Cameron } 820341b3cf08SStephen M. Cameron 8204ec501a18SRobert Elliott /* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */ 8205ec501a18SRobert Elliott static void hpsa_free_irqs(struct ctlr_info *h) 8206ec501a18SRobert Elliott { 8207ec501a18SRobert Elliott int i; 8208ec501a18SRobert Elliott 8209ec501a18SRobert Elliott if (!h->msix_vector || h->intr_mode != PERF_MODE_INT) { 8210ec501a18SRobert Elliott /* Single reply queue, only one irq to free */ 8211ec501a18SRobert Elliott i = h->intr_mode; 8212ec501a18SRobert Elliott irq_set_affinity_hint(h->intr[i], NULL); 8213ec501a18SRobert Elliott free_irq(h->intr[i], &h->q[i]); 8214105a3dbcSRobert Elliott h->q[i] = 0; 8215ec501a18SRobert Elliott return; 8216ec501a18SRobert Elliott } 8217ec501a18SRobert Elliott 8218ec501a18SRobert Elliott for (i = 0; i < h->msix_vector; i++) { 8219ec501a18SRobert Elliott irq_set_affinity_hint(h->intr[i], NULL); 8220ec501a18SRobert Elliott free_irq(h->intr[i], &h->q[i]); 8221105a3dbcSRobert Elliott h->q[i] = 0; 8222ec501a18SRobert Elliott } 8223a4e17fc1SRobert Elliott for (; i < MAX_REPLY_QUEUES; i++) 8224a4e17fc1SRobert Elliott h->q[i] = 0; 8225ec501a18SRobert Elliott } 8226ec501a18SRobert Elliott 82279ee61794SRobert Elliott /* returns 0 on success; cleans up and returns -Enn on error */ 82289ee61794SRobert Elliott static int hpsa_request_irqs(struct ctlr_info *h, 82290ae01a32SStephen M. Cameron irqreturn_t (*msixhandler)(int, void *), 82300ae01a32SStephen M. Cameron irqreturn_t (*intxhandler)(int, void *)) 82310ae01a32SStephen M. Cameron { 8232254f796bSMatt Gates int rc, i; 82330ae01a32SStephen M. Cameron 8234254f796bSMatt Gates /* 8235254f796bSMatt Gates * initialize h->q[x] = x so that interrupt handlers know which 8236254f796bSMatt Gates * queue to process. 8237254f796bSMatt Gates */ 8238254f796bSMatt Gates for (i = 0; i < MAX_REPLY_QUEUES; i++) 8239254f796bSMatt Gates h->q[i] = (u8) i; 8240254f796bSMatt Gates 8241eee0f03aSHannes Reinecke if (h->intr_mode == PERF_MODE_INT && h->msix_vector > 0) { 8242254f796bSMatt Gates /* If performant mode and MSI-X, use multiple reply queues */ 8243a4e17fc1SRobert Elliott for (i = 0; i < h->msix_vector; i++) { 82448b47004aSRobert Elliott sprintf(h->intrname[i], "%s-msix%d", h->devname, i); 8245254f796bSMatt Gates rc = request_irq(h->intr[i], msixhandler, 82468b47004aSRobert Elliott 0, h->intrname[i], 8247254f796bSMatt Gates &h->q[i]); 8248a4e17fc1SRobert Elliott if (rc) { 8249a4e17fc1SRobert Elliott int j; 8250a4e17fc1SRobert Elliott 8251a4e17fc1SRobert Elliott dev_err(&h->pdev->dev, 8252a4e17fc1SRobert Elliott "failed to get irq %d for %s\n", 8253a4e17fc1SRobert Elliott h->intr[i], h->devname); 8254a4e17fc1SRobert Elliott for (j = 0; j < i; j++) { 8255a4e17fc1SRobert Elliott free_irq(h->intr[j], &h->q[j]); 8256a4e17fc1SRobert Elliott h->q[j] = 0; 8257a4e17fc1SRobert Elliott } 8258a4e17fc1SRobert Elliott for (; j < MAX_REPLY_QUEUES; j++) 8259a4e17fc1SRobert Elliott h->q[j] = 0; 8260a4e17fc1SRobert Elliott return rc; 8261a4e17fc1SRobert Elliott } 8262a4e17fc1SRobert Elliott } 826341b3cf08SStephen M. Cameron hpsa_irq_affinity_hints(h); 8264254f796bSMatt Gates } else { 8265254f796bSMatt Gates /* Use single reply pool */ 8266eee0f03aSHannes Reinecke if (h->msix_vector > 0 || h->msi_vector) { 82678b47004aSRobert Elliott if (h->msix_vector) 82688b47004aSRobert Elliott sprintf(h->intrname[h->intr_mode], 82698b47004aSRobert Elliott "%s-msix", h->devname); 82708b47004aSRobert Elliott else 82718b47004aSRobert Elliott sprintf(h->intrname[h->intr_mode], 82728b47004aSRobert Elliott "%s-msi", h->devname); 8273254f796bSMatt Gates rc = request_irq(h->intr[h->intr_mode], 82748b47004aSRobert Elliott msixhandler, 0, 82758b47004aSRobert Elliott h->intrname[h->intr_mode], 8276254f796bSMatt Gates &h->q[h->intr_mode]); 8277254f796bSMatt Gates } else { 82788b47004aSRobert Elliott sprintf(h->intrname[h->intr_mode], 82798b47004aSRobert Elliott "%s-intx", h->devname); 8280254f796bSMatt Gates rc = request_irq(h->intr[h->intr_mode], 82818b47004aSRobert Elliott intxhandler, IRQF_SHARED, 82828b47004aSRobert Elliott h->intrname[h->intr_mode], 8283254f796bSMatt Gates &h->q[h->intr_mode]); 8284254f796bSMatt Gates } 8285105a3dbcSRobert Elliott irq_set_affinity_hint(h->intr[h->intr_mode], NULL); 8286254f796bSMatt Gates } 82870ae01a32SStephen M. Cameron if (rc) { 8288195f2c65SRobert Elliott dev_err(&h->pdev->dev, "failed to get irq %d for %s\n", 82890ae01a32SStephen M. Cameron h->intr[h->intr_mode], h->devname); 8290195f2c65SRobert Elliott hpsa_free_irqs(h); 82910ae01a32SStephen M. Cameron return -ENODEV; 82920ae01a32SStephen M. Cameron } 82930ae01a32SStephen M. Cameron return 0; 82940ae01a32SStephen M. Cameron } 82950ae01a32SStephen M. Cameron 82966f039790SGreg Kroah-Hartman static int hpsa_kdump_soft_reset(struct ctlr_info *h) 829764670ac8SStephen M. Cameron { 829839c53f55SRobert Elliott int rc; 8299bf43caf3SRobert Elliott hpsa_send_host_reset(h, RAID_CTLR_LUNID, HPSA_RESET_TYPE_CONTROLLER); 830064670ac8SStephen M. Cameron 830164670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n"); 830239c53f55SRobert Elliott rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY); 830339c53f55SRobert Elliott if (rc) { 830464670ac8SStephen M. Cameron dev_warn(&h->pdev->dev, "Soft reset had no effect.\n"); 830539c53f55SRobert Elliott return rc; 830664670ac8SStephen M. Cameron } 830764670ac8SStephen M. Cameron 830864670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n"); 830939c53f55SRobert Elliott rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 831039c53f55SRobert Elliott if (rc) { 831164670ac8SStephen M. Cameron dev_warn(&h->pdev->dev, "Board failed to become ready " 831264670ac8SStephen M. Cameron "after soft reset.\n"); 831339c53f55SRobert Elliott return rc; 831464670ac8SStephen M. Cameron } 831564670ac8SStephen M. Cameron 831664670ac8SStephen M. Cameron return 0; 831764670ac8SStephen M. Cameron } 831864670ac8SStephen M. Cameron 8319072b0518SStephen M. Cameron static void hpsa_free_reply_queues(struct ctlr_info *h) 8320072b0518SStephen M. Cameron { 8321072b0518SStephen M. Cameron int i; 8322072b0518SStephen M. Cameron 8323072b0518SStephen M. Cameron for (i = 0; i < h->nreply_queues; i++) { 8324072b0518SStephen M. Cameron if (!h->reply_queue[i].head) 8325072b0518SStephen M. Cameron continue; 83261fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 83271fb7c98aSRobert Elliott h->reply_queue_size, 83281fb7c98aSRobert Elliott h->reply_queue[i].head, 83291fb7c98aSRobert Elliott h->reply_queue[i].busaddr); 8330072b0518SStephen M. Cameron h->reply_queue[i].head = NULL; 8331072b0518SStephen M. Cameron h->reply_queue[i].busaddr = 0; 8332072b0518SStephen M. Cameron } 8333105a3dbcSRobert Elliott h->reply_queue_size = 0; 8334072b0518SStephen M. Cameron } 8335072b0518SStephen M. Cameron 83360097f0f4SStephen M. Cameron static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h) 83370097f0f4SStephen M. Cameron { 8338105a3dbcSRobert Elliott hpsa_free_performant_mode(h); /* init_one 7 */ 8339105a3dbcSRobert Elliott hpsa_free_sg_chain_blocks(h); /* init_one 6 */ 8340105a3dbcSRobert Elliott hpsa_free_cmd_pool(h); /* init_one 5 */ 8341105a3dbcSRobert Elliott hpsa_free_irqs(h); /* init_one 4 */ 83422946e82bSRobert Elliott scsi_host_put(h->scsi_host); /* init_one 3 */ 83432946e82bSRobert Elliott h->scsi_host = NULL; /* init_one 3 */ 83442946e82bSRobert Elliott hpsa_free_pci_init(h); /* init_one 2_5 */ 83459ecd953aSRobert Elliott free_percpu(h->lockup_detected); /* init_one 2 */ 83469ecd953aSRobert Elliott h->lockup_detected = NULL; /* init_one 2 */ 83479ecd953aSRobert Elliott if (h->resubmit_wq) { 83489ecd953aSRobert Elliott destroy_workqueue(h->resubmit_wq); /* init_one 1 */ 83499ecd953aSRobert Elliott h->resubmit_wq = NULL; 83509ecd953aSRobert Elliott } 83519ecd953aSRobert Elliott if (h->rescan_ctlr_wq) { 83529ecd953aSRobert Elliott destroy_workqueue(h->rescan_ctlr_wq); 83539ecd953aSRobert Elliott h->rescan_ctlr_wq = NULL; 83549ecd953aSRobert Elliott } 8355105a3dbcSRobert Elliott kfree(h); /* init_one 1 */ 835664670ac8SStephen M. Cameron } 835764670ac8SStephen M. Cameron 8358a0c12413SStephen M. Cameron /* Called when controller lockup detected. */ 8359f2405db8SDon Brace static void fail_all_outstanding_cmds(struct ctlr_info *h) 8360a0c12413SStephen M. Cameron { 8361281a7fd0SWebb Scales int i, refcount; 8362281a7fd0SWebb Scales struct CommandList *c; 836325163bd5SWebb Scales int failcount = 0; 8364a0c12413SStephen M. Cameron 8365080ef1ccSDon Brace flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */ 8366f2405db8SDon Brace for (i = 0; i < h->nr_cmds; i++) { 8367f2405db8SDon Brace c = h->cmd_pool + i; 8368281a7fd0SWebb Scales refcount = atomic_inc_return(&c->refcount); 8369281a7fd0SWebb Scales if (refcount > 1) { 837025163bd5SWebb Scales c->err_info->CommandStatus = CMD_CTLR_LOCKUP; 83715a3d16f5SStephen M. Cameron finish_cmd(c); 8372433b5f4dSStephen Cameron atomic_dec(&h->commands_outstanding); 837325163bd5SWebb Scales failcount++; 8374a0c12413SStephen M. Cameron } 8375281a7fd0SWebb Scales cmd_free(h, c); 8376281a7fd0SWebb Scales } 837725163bd5SWebb Scales dev_warn(&h->pdev->dev, 837825163bd5SWebb Scales "failed %d commands in fail_all\n", failcount); 8379a0c12413SStephen M. Cameron } 8380a0c12413SStephen M. Cameron 8381094963daSStephen M. Cameron static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value) 8382094963daSStephen M. Cameron { 8383c8ed0010SRusty Russell int cpu; 8384094963daSStephen M. Cameron 8385c8ed0010SRusty Russell for_each_online_cpu(cpu) { 8386094963daSStephen M. Cameron u32 *lockup_detected; 8387094963daSStephen M. Cameron lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 8388094963daSStephen M. Cameron *lockup_detected = value; 8389094963daSStephen M. Cameron } 8390094963daSStephen M. Cameron wmb(); /* be sure the per-cpu variables are out to memory */ 8391094963daSStephen M. Cameron } 8392094963daSStephen M. Cameron 8393a0c12413SStephen M. Cameron static void controller_lockup_detected(struct ctlr_info *h) 8394a0c12413SStephen M. Cameron { 8395a0c12413SStephen M. Cameron unsigned long flags; 8396094963daSStephen M. Cameron u32 lockup_detected; 8397a0c12413SStephen M. Cameron 8398a0c12413SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 8399a0c12413SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 8400094963daSStephen M. Cameron lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET); 8401094963daSStephen M. Cameron if (!lockup_detected) { 8402094963daSStephen M. Cameron /* no heartbeat, but controller gave us a zero. */ 8403094963daSStephen M. Cameron dev_warn(&h->pdev->dev, 840425163bd5SWebb Scales "lockup detected after %d but scratchpad register is zero\n", 840525163bd5SWebb Scales h->heartbeat_sample_interval / HZ); 8406094963daSStephen M. Cameron lockup_detected = 0xffffffff; 8407094963daSStephen M. Cameron } 8408094963daSStephen M. Cameron set_lockup_detected_for_all_cpus(h, lockup_detected); 8409a0c12413SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 841025163bd5SWebb Scales dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n", 841125163bd5SWebb Scales lockup_detected, h->heartbeat_sample_interval / HZ); 8412a0c12413SStephen M. Cameron pci_disable_device(h->pdev); 8413f2405db8SDon Brace fail_all_outstanding_cmds(h); 8414a0c12413SStephen M. Cameron } 8415a0c12413SStephen M. Cameron 841625163bd5SWebb Scales static int detect_controller_lockup(struct ctlr_info *h) 8417a0c12413SStephen M. Cameron { 8418a0c12413SStephen M. Cameron u64 now; 8419a0c12413SStephen M. Cameron u32 heartbeat; 8420a0c12413SStephen M. Cameron unsigned long flags; 8421a0c12413SStephen M. Cameron 8422a0c12413SStephen M. Cameron now = get_jiffies_64(); 8423a0c12413SStephen M. Cameron /* If we've received an interrupt recently, we're ok. */ 8424a0c12413SStephen M. Cameron if (time_after64(h->last_intr_timestamp + 8425e85c5974SStephen M. Cameron (h->heartbeat_sample_interval), now)) 842625163bd5SWebb Scales return false; 8427a0c12413SStephen M. Cameron 8428a0c12413SStephen M. Cameron /* 8429a0c12413SStephen M. Cameron * If we've already checked the heartbeat recently, we're ok. 8430a0c12413SStephen M. Cameron * This could happen if someone sends us a signal. We 8431a0c12413SStephen M. Cameron * otherwise don't care about signals in this thread. 8432a0c12413SStephen M. Cameron */ 8433a0c12413SStephen M. Cameron if (time_after64(h->last_heartbeat_timestamp + 8434e85c5974SStephen M. Cameron (h->heartbeat_sample_interval), now)) 843525163bd5SWebb Scales return false; 8436a0c12413SStephen M. Cameron 8437a0c12413SStephen M. Cameron /* If heartbeat has not changed since we last looked, we're not ok. */ 8438a0c12413SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 8439a0c12413SStephen M. Cameron heartbeat = readl(&h->cfgtable->HeartBeat); 8440a0c12413SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 8441a0c12413SStephen M. Cameron if (h->last_heartbeat == heartbeat) { 8442a0c12413SStephen M. Cameron controller_lockup_detected(h); 844325163bd5SWebb Scales return true; 8444a0c12413SStephen M. Cameron } 8445a0c12413SStephen M. Cameron 8446a0c12413SStephen M. Cameron /* We're ok. */ 8447a0c12413SStephen M. Cameron h->last_heartbeat = heartbeat; 8448a0c12413SStephen M. Cameron h->last_heartbeat_timestamp = now; 844925163bd5SWebb Scales return false; 8450a0c12413SStephen M. Cameron } 8451a0c12413SStephen M. Cameron 84529846590eSStephen M. Cameron static void hpsa_ack_ctlr_events(struct ctlr_info *h) 845376438d08SStephen M. Cameron { 845476438d08SStephen M. Cameron int i; 845576438d08SStephen M. Cameron char *event_type; 845676438d08SStephen M. Cameron 8457e4aa3e6aSStephen Cameron if (!(h->fw_support & MISC_FW_EVENT_NOTIFY)) 8458e4aa3e6aSStephen Cameron return; 8459e4aa3e6aSStephen Cameron 846076438d08SStephen M. Cameron /* Ask the controller to clear the events we're handling. */ 84611f7cee8cSStephen M. Cameron if ((h->transMethod & (CFGTBL_Trans_io_accel1 84621f7cee8cSStephen M. Cameron | CFGTBL_Trans_io_accel2)) && 846376438d08SStephen M. Cameron (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE || 846476438d08SStephen M. Cameron h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) { 846576438d08SStephen M. Cameron 846676438d08SStephen M. Cameron if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE) 846776438d08SStephen M. Cameron event_type = "state change"; 846876438d08SStephen M. Cameron if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE) 846976438d08SStephen M. Cameron event_type = "configuration change"; 847076438d08SStephen M. Cameron /* Stop sending new RAID offload reqs via the IO accelerator */ 847176438d08SStephen M. Cameron scsi_block_requests(h->scsi_host); 84725323ed74SDon Brace for (i = 0; i < h->ndevices; i++) { 847376438d08SStephen M. Cameron h->dev[i]->offload_enabled = 0; 84745323ed74SDon Brace h->dev[i]->offload_to_be_enabled = 0; 84755323ed74SDon Brace } 847623100dd9SStephen M. Cameron hpsa_drain_accel_commands(h); 847776438d08SStephen M. Cameron /* Set 'accelerator path config change' bit */ 847876438d08SStephen M. Cameron dev_warn(&h->pdev->dev, 847976438d08SStephen M. Cameron "Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n", 848076438d08SStephen M. Cameron h->events, event_type); 848176438d08SStephen M. Cameron writel(h->events, &(h->cfgtable->clear_event_notify)); 848276438d08SStephen M. Cameron /* Set the "clear event notify field update" bit 6 */ 848376438d08SStephen M. Cameron writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL); 848476438d08SStephen M. Cameron /* Wait until ctlr clears 'clear event notify field', bit 6 */ 848576438d08SStephen M. Cameron hpsa_wait_for_clear_event_notify_ack(h); 848676438d08SStephen M. Cameron scsi_unblock_requests(h->scsi_host); 848776438d08SStephen M. Cameron } else { 848876438d08SStephen M. Cameron /* Acknowledge controller notification events. */ 848976438d08SStephen M. Cameron writel(h->events, &(h->cfgtable->clear_event_notify)); 849076438d08SStephen M. Cameron writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL); 849176438d08SStephen M. Cameron hpsa_wait_for_clear_event_notify_ack(h); 849276438d08SStephen M. Cameron #if 0 849376438d08SStephen M. Cameron writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 849476438d08SStephen M. Cameron hpsa_wait_for_mode_change_ack(h); 849576438d08SStephen M. Cameron #endif 849676438d08SStephen M. Cameron } 84979846590eSStephen M. Cameron return; 849876438d08SStephen M. Cameron } 849976438d08SStephen M. Cameron 850076438d08SStephen M. Cameron /* Check a register on the controller to see if there are configuration 850176438d08SStephen M. Cameron * changes (added/changed/removed logical drives, etc.) which mean that 8502e863d68eSScott Teel * we should rescan the controller for devices. 8503e863d68eSScott Teel * Also check flag for driver-initiated rescan. 850476438d08SStephen M. Cameron */ 85059846590eSStephen M. Cameron static int hpsa_ctlr_needs_rescan(struct ctlr_info *h) 850676438d08SStephen M. Cameron { 8507853633e8SDon Brace if (h->drv_req_rescan) { 8508853633e8SDon Brace h->drv_req_rescan = 0; 8509853633e8SDon Brace return 1; 8510853633e8SDon Brace } 8511853633e8SDon Brace 851276438d08SStephen M. Cameron if (!(h->fw_support & MISC_FW_EVENT_NOTIFY)) 85139846590eSStephen M. Cameron return 0; 851476438d08SStephen M. Cameron 851576438d08SStephen M. Cameron h->events = readl(&(h->cfgtable->event_notify)); 85169846590eSStephen M. Cameron return h->events & RESCAN_REQUIRED_EVENT_BITS; 85179846590eSStephen M. Cameron } 851876438d08SStephen M. Cameron 851976438d08SStephen M. Cameron /* 85209846590eSStephen M. Cameron * Check if any of the offline devices have become ready 852176438d08SStephen M. Cameron */ 85229846590eSStephen M. Cameron static int hpsa_offline_devices_ready(struct ctlr_info *h) 85239846590eSStephen M. Cameron { 85249846590eSStephen M. Cameron unsigned long flags; 85259846590eSStephen M. Cameron struct offline_device_entry *d; 85269846590eSStephen M. Cameron struct list_head *this, *tmp; 85279846590eSStephen M. Cameron 85289846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 85299846590eSStephen M. Cameron list_for_each_safe(this, tmp, &h->offline_device_list) { 85309846590eSStephen M. Cameron d = list_entry(this, struct offline_device_entry, 85319846590eSStephen M. Cameron offline_list); 85329846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 8533d1fea47cSStephen M. Cameron if (!hpsa_volume_offline(h, d->scsi3addr)) { 8534d1fea47cSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 8535d1fea47cSStephen M. Cameron list_del(&d->offline_list); 8536d1fea47cSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 85379846590eSStephen M. Cameron return 1; 8538d1fea47cSStephen M. Cameron } 85399846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 854076438d08SStephen M. Cameron } 85419846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 85429846590eSStephen M. Cameron return 0; 85439846590eSStephen M. Cameron } 85449846590eSStephen M. Cameron 854534592254SScott Teel static int hpsa_luns_changed(struct ctlr_info *h) 854634592254SScott Teel { 854734592254SScott Teel int rc = 1; /* assume there are changes */ 854834592254SScott Teel struct ReportLUNdata *logdev = NULL; 854934592254SScott Teel 855034592254SScott Teel /* if we can't find out if lun data has changed, 855134592254SScott Teel * assume that it has. 855234592254SScott Teel */ 855334592254SScott Teel 855434592254SScott Teel if (!h->lastlogicals) 855534592254SScott Teel goto out; 855634592254SScott Teel 855734592254SScott Teel logdev = kzalloc(sizeof(*logdev), GFP_KERNEL); 855834592254SScott Teel if (!logdev) { 855934592254SScott Teel dev_warn(&h->pdev->dev, 856034592254SScott Teel "Out of memory, can't track lun changes.\n"); 856134592254SScott Teel goto out; 856234592254SScott Teel } 856334592254SScott Teel if (hpsa_scsi_do_report_luns(h, 1, logdev, sizeof(*logdev), 0)) { 856434592254SScott Teel dev_warn(&h->pdev->dev, 856534592254SScott Teel "report luns failed, can't track lun changes.\n"); 856634592254SScott Teel goto out; 856734592254SScott Teel } 856834592254SScott Teel if (memcmp(logdev, h->lastlogicals, sizeof(*logdev))) { 856934592254SScott Teel dev_info(&h->pdev->dev, 857034592254SScott Teel "Lun changes detected.\n"); 857134592254SScott Teel memcpy(h->lastlogicals, logdev, sizeof(*logdev)); 857234592254SScott Teel goto out; 857334592254SScott Teel } else 857434592254SScott Teel rc = 0; /* no changes detected. */ 857534592254SScott Teel out: 857634592254SScott Teel kfree(logdev); 857734592254SScott Teel return rc; 857834592254SScott Teel } 857934592254SScott Teel 85806636e7f4SDon Brace static void hpsa_rescan_ctlr_worker(struct work_struct *work) 8581a0c12413SStephen M. Cameron { 8582a0c12413SStephen M. Cameron unsigned long flags; 85838a98db73SStephen M. Cameron struct ctlr_info *h = container_of(to_delayed_work(work), 85846636e7f4SDon Brace struct ctlr_info, rescan_ctlr_work); 85856636e7f4SDon Brace 85866636e7f4SDon Brace 85876636e7f4SDon Brace if (h->remove_in_progress) 85888a98db73SStephen M. Cameron return; 85899846590eSStephen M. Cameron 85909846590eSStephen M. Cameron if (hpsa_ctlr_needs_rescan(h) || hpsa_offline_devices_ready(h)) { 85919846590eSStephen M. Cameron scsi_host_get(h->scsi_host); 85929846590eSStephen M. Cameron hpsa_ack_ctlr_events(h); 85939846590eSStephen M. Cameron hpsa_scan_start(h->scsi_host); 85949846590eSStephen M. Cameron scsi_host_put(h->scsi_host); 859534592254SScott Teel } else if (h->discovery_polling) { 8596c2adae44SScott Teel hpsa_disable_rld_caching(h); 859734592254SScott Teel if (hpsa_luns_changed(h)) { 859834592254SScott Teel struct Scsi_Host *sh = NULL; 859934592254SScott Teel 860034592254SScott Teel dev_info(&h->pdev->dev, 860134592254SScott Teel "driver discovery polling rescan.\n"); 860234592254SScott Teel sh = scsi_host_get(h->scsi_host); 860334592254SScott Teel if (sh != NULL) { 860434592254SScott Teel hpsa_scan_start(sh); 860534592254SScott Teel scsi_host_put(sh); 860634592254SScott Teel } 860734592254SScott Teel } 86089846590eSStephen M. Cameron } 86096636e7f4SDon Brace spin_lock_irqsave(&h->lock, flags); 86106636e7f4SDon Brace if (!h->remove_in_progress) 86116636e7f4SDon Brace queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work, 86126636e7f4SDon Brace h->heartbeat_sample_interval); 86136636e7f4SDon Brace spin_unlock_irqrestore(&h->lock, flags); 86146636e7f4SDon Brace } 86156636e7f4SDon Brace 86166636e7f4SDon Brace static void hpsa_monitor_ctlr_worker(struct work_struct *work) 86176636e7f4SDon Brace { 86186636e7f4SDon Brace unsigned long flags; 86196636e7f4SDon Brace struct ctlr_info *h = container_of(to_delayed_work(work), 86206636e7f4SDon Brace struct ctlr_info, monitor_ctlr_work); 86216636e7f4SDon Brace 86226636e7f4SDon Brace detect_controller_lockup(h); 86236636e7f4SDon Brace if (lockup_detected(h)) 86246636e7f4SDon Brace return; 86259846590eSStephen M. Cameron 86268a98db73SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 86276636e7f4SDon Brace if (!h->remove_in_progress) 86288a98db73SStephen M. Cameron schedule_delayed_work(&h->monitor_ctlr_work, 86298a98db73SStephen M. Cameron h->heartbeat_sample_interval); 86308a98db73SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 8631a0c12413SStephen M. Cameron } 8632a0c12413SStephen M. Cameron 86336636e7f4SDon Brace static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h, 86346636e7f4SDon Brace char *name) 86356636e7f4SDon Brace { 86366636e7f4SDon Brace struct workqueue_struct *wq = NULL; 86376636e7f4SDon Brace 8638397ea9cbSDon Brace wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr); 86396636e7f4SDon Brace if (!wq) 86406636e7f4SDon Brace dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name); 86416636e7f4SDon Brace 86426636e7f4SDon Brace return wq; 86436636e7f4SDon Brace } 86446636e7f4SDon Brace 86456f039790SGreg Kroah-Hartman static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 86464c2a8c40SStephen M. Cameron { 86474c2a8c40SStephen M. Cameron int dac, rc; 86484c2a8c40SStephen M. Cameron struct ctlr_info *h; 864964670ac8SStephen M. Cameron int try_soft_reset = 0; 865064670ac8SStephen M. Cameron unsigned long flags; 86516b6c1cd7STomas Henzl u32 board_id; 86524c2a8c40SStephen M. Cameron 86534c2a8c40SStephen M. Cameron if (number_of_controllers == 0) 86544c2a8c40SStephen M. Cameron printk(KERN_INFO DRIVER_NAME "\n"); 86554c2a8c40SStephen M. Cameron 86566b6c1cd7STomas Henzl rc = hpsa_lookup_board_id(pdev, &board_id); 86576b6c1cd7STomas Henzl if (rc < 0) { 86586b6c1cd7STomas Henzl dev_warn(&pdev->dev, "Board ID not found\n"); 86596b6c1cd7STomas Henzl return rc; 86606b6c1cd7STomas Henzl } 86616b6c1cd7STomas Henzl 86626b6c1cd7STomas Henzl rc = hpsa_init_reset_devices(pdev, board_id); 866364670ac8SStephen M. Cameron if (rc) { 866464670ac8SStephen M. Cameron if (rc != -ENOTSUPP) 86654c2a8c40SStephen M. Cameron return rc; 866664670ac8SStephen M. Cameron /* If the reset fails in a particular way (it has no way to do 866764670ac8SStephen M. Cameron * a proper hard reset, so returns -ENOTSUPP) we can try to do 866864670ac8SStephen M. Cameron * a soft reset once we get the controller configured up to the 866964670ac8SStephen M. Cameron * point that it can accept a command. 867064670ac8SStephen M. Cameron */ 867164670ac8SStephen M. Cameron try_soft_reset = 1; 867264670ac8SStephen M. Cameron rc = 0; 867364670ac8SStephen M. Cameron } 867464670ac8SStephen M. Cameron 867564670ac8SStephen M. Cameron reinit_after_soft_reset: 86764c2a8c40SStephen M. Cameron 8677303932fdSDon Brace /* Command structures must be aligned on a 32-byte boundary because 8678303932fdSDon Brace * the 5 lower bits of the address are used by the hardware. and by 8679303932fdSDon Brace * the driver. See comments in hpsa.h for more info. 8680303932fdSDon Brace */ 8681303932fdSDon Brace BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT); 8682edd16368SStephen M. Cameron h = kzalloc(sizeof(*h), GFP_KERNEL); 8683105a3dbcSRobert Elliott if (!h) { 8684105a3dbcSRobert Elliott dev_err(&pdev->dev, "Failed to allocate controller head\n"); 8685ecd9aad4SStephen M. Cameron return -ENOMEM; 8686105a3dbcSRobert Elliott } 8687edd16368SStephen M. Cameron 868855c06c71SStephen M. Cameron h->pdev = pdev; 8689105a3dbcSRobert Elliott 8690a9a3a273SStephen M. Cameron h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT; 86919846590eSStephen M. Cameron INIT_LIST_HEAD(&h->offline_device_list); 86926eaf46fdSStephen M. Cameron spin_lock_init(&h->lock); 86939846590eSStephen M. Cameron spin_lock_init(&h->offline_device_lock); 86946eaf46fdSStephen M. Cameron spin_lock_init(&h->scan_lock); 869534f0c627SDon Brace atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS); 86969b5c48c2SStephen Cameron atomic_set(&h->abort_cmds_available, HPSA_CMDS_RESERVED_FOR_ABORTS); 8697094963daSStephen M. Cameron 8698094963daSStephen M. Cameron /* Allocate and clear per-cpu variable lockup_detected */ 8699094963daSStephen M. Cameron h->lockup_detected = alloc_percpu(u32); 87002a5ac326SStephen M. Cameron if (!h->lockup_detected) { 8701105a3dbcSRobert Elliott dev_err(&h->pdev->dev, "Failed to allocate lockup detector\n"); 87022a5ac326SStephen M. Cameron rc = -ENOMEM; 87032efa5929SRobert Elliott goto clean1; /* aer/h */ 87042a5ac326SStephen M. Cameron } 8705094963daSStephen M. Cameron set_lockup_detected_for_all_cpus(h, 0); 8706094963daSStephen M. Cameron 870755c06c71SStephen M. Cameron rc = hpsa_pci_init(h); 8708105a3dbcSRobert Elliott if (rc) 87092946e82bSRobert Elliott goto clean2; /* lu, aer/h */ 8710edd16368SStephen M. Cameron 87112946e82bSRobert Elliott /* relies on h-> settings made by hpsa_pci_init, including 87122946e82bSRobert Elliott * interrupt_mode h->intr */ 87132946e82bSRobert Elliott rc = hpsa_scsi_host_alloc(h); 87142946e82bSRobert Elliott if (rc) 87152946e82bSRobert Elliott goto clean2_5; /* pci, lu, aer/h */ 87162946e82bSRobert Elliott 87172946e82bSRobert Elliott sprintf(h->devname, HPSA "%d", h->scsi_host->host_no); 8718edd16368SStephen M. Cameron h->ctlr = number_of_controllers; 8719edd16368SStephen M. Cameron number_of_controllers++; 8720edd16368SStephen M. Cameron 8721edd16368SStephen M. Cameron /* configure PCI DMA stuff */ 8722ecd9aad4SStephen M. Cameron rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 8723ecd9aad4SStephen M. Cameron if (rc == 0) { 8724edd16368SStephen M. Cameron dac = 1; 8725ecd9aad4SStephen M. Cameron } else { 8726ecd9aad4SStephen M. Cameron rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 8727ecd9aad4SStephen M. Cameron if (rc == 0) { 8728edd16368SStephen M. Cameron dac = 0; 8729ecd9aad4SStephen M. Cameron } else { 8730edd16368SStephen M. Cameron dev_err(&pdev->dev, "no suitable DMA available\n"); 87312946e82bSRobert Elliott goto clean3; /* shost, pci, lu, aer/h */ 8732edd16368SStephen M. Cameron } 8733ecd9aad4SStephen M. Cameron } 8734edd16368SStephen M. Cameron 8735edd16368SStephen M. Cameron /* make sure the board interrupts are off */ 8736edd16368SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 873710f66018SStephen M. Cameron 8738105a3dbcSRobert Elliott rc = hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx); 8739105a3dbcSRobert Elliott if (rc) 87402946e82bSRobert Elliott goto clean3; /* shost, pci, lu, aer/h */ 8741d37ffbe4SRobert Elliott rc = hpsa_alloc_cmd_pool(h); 87428947fd10SRobert Elliott if (rc) 87432946e82bSRobert Elliott goto clean4; /* irq, shost, pci, lu, aer/h */ 8744105a3dbcSRobert Elliott rc = hpsa_alloc_sg_chain_blocks(h); 8745105a3dbcSRobert Elliott if (rc) 87462946e82bSRobert Elliott goto clean5; /* cmd, irq, shost, pci, lu, aer/h */ 8747a08a8471SStephen M. Cameron init_waitqueue_head(&h->scan_wait_queue); 87489b5c48c2SStephen Cameron init_waitqueue_head(&h->abort_cmd_wait_queue); 8749d604f533SWebb Scales init_waitqueue_head(&h->event_sync_wait_queue); 8750d604f533SWebb Scales mutex_init(&h->reset_mutex); 8751a08a8471SStephen M. Cameron h->scan_finished = 1; /* no scan currently in progress */ 8752edd16368SStephen M. Cameron 8753edd16368SStephen M. Cameron pci_set_drvdata(pdev, h); 87549a41338eSStephen M. Cameron h->ndevices = 0; 87552946e82bSRobert Elliott 87569a41338eSStephen M. Cameron spin_lock_init(&h->devlock); 8757105a3dbcSRobert Elliott rc = hpsa_put_ctlr_into_performant_mode(h); 8758105a3dbcSRobert Elliott if (rc) 87592946e82bSRobert Elliott goto clean6; /* sg, cmd, irq, shost, pci, lu, aer/h */ 87602946e82bSRobert Elliott 87612efa5929SRobert Elliott /* create the resubmit workqueue */ 87622efa5929SRobert Elliott h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan"); 87632efa5929SRobert Elliott if (!h->rescan_ctlr_wq) { 87642efa5929SRobert Elliott rc = -ENOMEM; 87652efa5929SRobert Elliott goto clean7; 87662efa5929SRobert Elliott } 87672efa5929SRobert Elliott 87682efa5929SRobert Elliott h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit"); 87692efa5929SRobert Elliott if (!h->resubmit_wq) { 87702efa5929SRobert Elliott rc = -ENOMEM; 87712efa5929SRobert Elliott goto clean7; /* aer/h */ 87722efa5929SRobert Elliott } 877364670ac8SStephen M. Cameron 8774105a3dbcSRobert Elliott /* 8775105a3dbcSRobert Elliott * At this point, the controller is ready to take commands. 877664670ac8SStephen M. Cameron * Now, if reset_devices and the hard reset didn't work, try 877764670ac8SStephen M. Cameron * the soft reset and see if that works. 877864670ac8SStephen M. Cameron */ 877964670ac8SStephen M. Cameron if (try_soft_reset) { 878064670ac8SStephen M. Cameron 878164670ac8SStephen M. Cameron /* This is kind of gross. We may or may not get a completion 878264670ac8SStephen M. Cameron * from the soft reset command, and if we do, then the value 878364670ac8SStephen M. Cameron * from the fifo may or may not be valid. So, we wait 10 secs 878464670ac8SStephen M. Cameron * after the reset throwing away any completions we get during 878564670ac8SStephen M. Cameron * that time. Unregister the interrupt handler and register 878664670ac8SStephen M. Cameron * fake ones to scoop up any residual completions. 878764670ac8SStephen M. Cameron */ 878864670ac8SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 878964670ac8SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 879064670ac8SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 8791ec501a18SRobert Elliott hpsa_free_irqs(h); 87929ee61794SRobert Elliott rc = hpsa_request_irqs(h, hpsa_msix_discard_completions, 879364670ac8SStephen M. Cameron hpsa_intx_discard_completions); 879464670ac8SStephen M. Cameron if (rc) { 87959ee61794SRobert Elliott dev_warn(&h->pdev->dev, 87969ee61794SRobert Elliott "Failed to request_irq after soft reset.\n"); 8797d498757cSRobert Elliott /* 8798b2ef480cSRobert Elliott * cannot goto clean7 or free_irqs will be called 8799b2ef480cSRobert Elliott * again. Instead, do its work 8800b2ef480cSRobert Elliott */ 8801b2ef480cSRobert Elliott hpsa_free_performant_mode(h); /* clean7 */ 8802b2ef480cSRobert Elliott hpsa_free_sg_chain_blocks(h); /* clean6 */ 8803b2ef480cSRobert Elliott hpsa_free_cmd_pool(h); /* clean5 */ 8804b2ef480cSRobert Elliott /* 8805b2ef480cSRobert Elliott * skip hpsa_free_irqs(h) clean4 since that 8806b2ef480cSRobert Elliott * was just called before request_irqs failed 8807d498757cSRobert Elliott */ 8808d498757cSRobert Elliott goto clean3; 880964670ac8SStephen M. Cameron } 881064670ac8SStephen M. Cameron 881164670ac8SStephen M. Cameron rc = hpsa_kdump_soft_reset(h); 881264670ac8SStephen M. Cameron if (rc) 881364670ac8SStephen M. Cameron /* Neither hard nor soft reset worked, we're hosed. */ 88147ef7323fSDon Brace goto clean7; 881564670ac8SStephen M. Cameron 881664670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Board READY.\n"); 881764670ac8SStephen M. Cameron dev_info(&h->pdev->dev, 881864670ac8SStephen M. Cameron "Waiting for stale completions to drain.\n"); 881964670ac8SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_ON); 882064670ac8SStephen M. Cameron msleep(10000); 882164670ac8SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 882264670ac8SStephen M. Cameron 882364670ac8SStephen M. Cameron rc = controller_reset_failed(h->cfgtable); 882464670ac8SStephen M. Cameron if (rc) 882564670ac8SStephen M. Cameron dev_info(&h->pdev->dev, 882664670ac8SStephen M. Cameron "Soft reset appears to have failed.\n"); 882764670ac8SStephen M. Cameron 882864670ac8SStephen M. Cameron /* since the controller's reset, we have to go back and re-init 882964670ac8SStephen M. Cameron * everything. Easiest to just forget what we've done and do it 883064670ac8SStephen M. Cameron * all over again. 883164670ac8SStephen M. Cameron */ 883264670ac8SStephen M. Cameron hpsa_undo_allocations_after_kdump_soft_reset(h); 883364670ac8SStephen M. Cameron try_soft_reset = 0; 883464670ac8SStephen M. Cameron if (rc) 8835b2ef480cSRobert Elliott /* don't goto clean, we already unallocated */ 883664670ac8SStephen M. Cameron return -ENODEV; 883764670ac8SStephen M. Cameron 883864670ac8SStephen M. Cameron goto reinit_after_soft_reset; 883964670ac8SStephen M. Cameron } 8840edd16368SStephen M. Cameron 8841da0697bdSScott Teel /* Enable Accelerated IO path at driver layer */ 8842da0697bdSScott Teel h->acciopath_status = 1; 884334592254SScott Teel /* Disable discovery polling.*/ 884434592254SScott Teel h->discovery_polling = 0; 8845da0697bdSScott Teel 8846e863d68eSScott Teel 8847edd16368SStephen M. Cameron /* Turn the interrupts on so we can service requests */ 8848edd16368SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_ON); 8849edd16368SStephen M. Cameron 8850339b2b14SStephen M. Cameron hpsa_hba_inquiry(h); 88518a98db73SStephen M. Cameron 885234592254SScott Teel h->lastlogicals = kzalloc(sizeof(*(h->lastlogicals)), GFP_KERNEL); 885334592254SScott Teel if (!h->lastlogicals) 885434592254SScott Teel dev_info(&h->pdev->dev, 885534592254SScott Teel "Can't track change to report lun data\n"); 885634592254SScott Teel 8857cf477237SDon Brace /* hook into SCSI subsystem */ 8858cf477237SDon Brace rc = hpsa_scsi_add_host(h); 8859cf477237SDon Brace if (rc) 8860cf477237SDon Brace goto clean7; /* perf, sg, cmd, irq, shost, pci, lu, aer/h */ 8861cf477237SDon Brace 88628a98db73SStephen M. Cameron /* Monitor the controller for firmware lockups */ 88638a98db73SStephen M. Cameron h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 88648a98db73SStephen M. Cameron INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker); 88658a98db73SStephen M. Cameron schedule_delayed_work(&h->monitor_ctlr_work, 88668a98db73SStephen M. Cameron h->heartbeat_sample_interval); 88676636e7f4SDon Brace INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker); 88686636e7f4SDon Brace queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work, 88696636e7f4SDon Brace h->heartbeat_sample_interval); 887088bf6d62SStephen M. Cameron return 0; 8871edd16368SStephen M. Cameron 88722946e82bSRobert Elliott clean7: /* perf, sg, cmd, irq, shost, pci, lu, aer/h */ 8873105a3dbcSRobert Elliott hpsa_free_performant_mode(h); 8874105a3dbcSRobert Elliott h->access.set_intr_mask(h, HPSA_INTR_OFF); 8875105a3dbcSRobert Elliott clean6: /* sg, cmd, irq, pci, lockup, wq/aer/h */ 887633a2ffceSStephen M. Cameron hpsa_free_sg_chain_blocks(h); 88772946e82bSRobert Elliott clean5: /* cmd, irq, shost, pci, lu, aer/h */ 88782e9d1b36SStephen M. Cameron hpsa_free_cmd_pool(h); 88792946e82bSRobert Elliott clean4: /* irq, shost, pci, lu, aer/h */ 8880ec501a18SRobert Elliott hpsa_free_irqs(h); 88812946e82bSRobert Elliott clean3: /* shost, pci, lu, aer/h */ 88822946e82bSRobert Elliott scsi_host_put(h->scsi_host); 88832946e82bSRobert Elliott h->scsi_host = NULL; 88842946e82bSRobert Elliott clean2_5: /* pci, lu, aer/h */ 8885195f2c65SRobert Elliott hpsa_free_pci_init(h); 88862946e82bSRobert Elliott clean2: /* lu, aer/h */ 8887105a3dbcSRobert Elliott if (h->lockup_detected) { 8888094963daSStephen M. Cameron free_percpu(h->lockup_detected); 8889105a3dbcSRobert Elliott h->lockup_detected = NULL; 8890105a3dbcSRobert Elliott } 8891105a3dbcSRobert Elliott clean1: /* wq/aer/h */ 8892105a3dbcSRobert Elliott if (h->resubmit_wq) { 8893105a3dbcSRobert Elliott destroy_workqueue(h->resubmit_wq); 8894105a3dbcSRobert Elliott h->resubmit_wq = NULL; 8895105a3dbcSRobert Elliott } 8896105a3dbcSRobert Elliott if (h->rescan_ctlr_wq) { 8897105a3dbcSRobert Elliott destroy_workqueue(h->rescan_ctlr_wq); 8898105a3dbcSRobert Elliott h->rescan_ctlr_wq = NULL; 8899105a3dbcSRobert Elliott } 8900edd16368SStephen M. Cameron kfree(h); 8901ecd9aad4SStephen M. Cameron return rc; 8902edd16368SStephen M. Cameron } 8903edd16368SStephen M. Cameron 8904edd16368SStephen M. Cameron static void hpsa_flush_cache(struct ctlr_info *h) 8905edd16368SStephen M. Cameron { 8906edd16368SStephen M. Cameron char *flush_buf; 8907edd16368SStephen M. Cameron struct CommandList *c; 890825163bd5SWebb Scales int rc; 8909702890e3SStephen M. Cameron 8910094963daSStephen M. Cameron if (unlikely(lockup_detected(h))) 8911702890e3SStephen M. Cameron return; 8912edd16368SStephen M. Cameron flush_buf = kzalloc(4, GFP_KERNEL); 8913edd16368SStephen M. Cameron if (!flush_buf) 8914edd16368SStephen M. Cameron return; 8915edd16368SStephen M. Cameron 891645fcb86eSStephen Cameron c = cmd_alloc(h); 8917bf43caf3SRobert Elliott 8918a2dac136SStephen M. Cameron if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0, 8919a2dac136SStephen M. Cameron RAID_CTLR_LUNID, TYPE_CMD)) { 8920a2dac136SStephen M. Cameron goto out; 8921a2dac136SStephen M. Cameron } 892225163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 8923c448ecfaSDon Brace PCI_DMA_TODEVICE, DEFAULT_TIMEOUT); 892425163bd5SWebb Scales if (rc) 892525163bd5SWebb Scales goto out; 8926edd16368SStephen M. Cameron if (c->err_info->CommandStatus != 0) 8927a2dac136SStephen M. Cameron out: 8928edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 8929edd16368SStephen M. Cameron "error flushing cache on controller\n"); 893045fcb86eSStephen Cameron cmd_free(h, c); 8931edd16368SStephen M. Cameron kfree(flush_buf); 8932edd16368SStephen M. Cameron } 8933edd16368SStephen M. Cameron 8934c2adae44SScott Teel /* Make controller gather fresh report lun data each time we 8935c2adae44SScott Teel * send down a report luns request 8936c2adae44SScott Teel */ 8937c2adae44SScott Teel static void hpsa_disable_rld_caching(struct ctlr_info *h) 8938c2adae44SScott Teel { 8939c2adae44SScott Teel u32 *options; 8940c2adae44SScott Teel struct CommandList *c; 8941c2adae44SScott Teel int rc; 8942c2adae44SScott Teel 8943c2adae44SScott Teel /* Don't bother trying to set diag options if locked up */ 8944c2adae44SScott Teel if (unlikely(h->lockup_detected)) 8945c2adae44SScott Teel return; 8946c2adae44SScott Teel 8947c2adae44SScott Teel options = kzalloc(sizeof(*options), GFP_KERNEL); 8948c2adae44SScott Teel if (!options) { 8949c2adae44SScott Teel dev_err(&h->pdev->dev, 8950c2adae44SScott Teel "Error: failed to disable rld caching, during alloc.\n"); 8951c2adae44SScott Teel return; 8952c2adae44SScott Teel } 8953c2adae44SScott Teel 8954c2adae44SScott Teel c = cmd_alloc(h); 8955c2adae44SScott Teel 8956c2adae44SScott Teel /* first, get the current diag options settings */ 8957c2adae44SScott Teel if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0, 8958c2adae44SScott Teel RAID_CTLR_LUNID, TYPE_CMD)) 8959c2adae44SScott Teel goto errout; 8960c2adae44SScott Teel 8961c2adae44SScott Teel rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 8962c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 8963c2adae44SScott Teel if ((rc != 0) || (c->err_info->CommandStatus != 0)) 8964c2adae44SScott Teel goto errout; 8965c2adae44SScott Teel 8966c2adae44SScott Teel /* Now, set the bit for disabling the RLD caching */ 8967c2adae44SScott Teel *options |= HPSA_DIAG_OPTS_DISABLE_RLD_CACHING; 8968c2adae44SScott Teel 8969c2adae44SScott Teel if (fill_cmd(c, BMIC_SET_DIAG_OPTIONS, h, options, 4, 0, 8970c2adae44SScott Teel RAID_CTLR_LUNID, TYPE_CMD)) 8971c2adae44SScott Teel goto errout; 8972c2adae44SScott Teel 8973c2adae44SScott Teel rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 8974c448ecfaSDon Brace PCI_DMA_TODEVICE, DEFAULT_TIMEOUT); 8975c2adae44SScott Teel if ((rc != 0) || (c->err_info->CommandStatus != 0)) 8976c2adae44SScott Teel goto errout; 8977c2adae44SScott Teel 8978c2adae44SScott Teel /* Now verify that it got set: */ 8979c2adae44SScott Teel if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0, 8980c2adae44SScott Teel RAID_CTLR_LUNID, TYPE_CMD)) 8981c2adae44SScott Teel goto errout; 8982c2adae44SScott Teel 8983c2adae44SScott Teel rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 8984c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 8985c2adae44SScott Teel if ((rc != 0) || (c->err_info->CommandStatus != 0)) 8986c2adae44SScott Teel goto errout; 8987c2adae44SScott Teel 8988d8a080c3SDan Carpenter if (*options & HPSA_DIAG_OPTS_DISABLE_RLD_CACHING) 8989c2adae44SScott Teel goto out; 8990c2adae44SScott Teel 8991c2adae44SScott Teel errout: 8992c2adae44SScott Teel dev_err(&h->pdev->dev, 8993c2adae44SScott Teel "Error: failed to disable report lun data caching.\n"); 8994c2adae44SScott Teel out: 8995c2adae44SScott Teel cmd_free(h, c); 8996c2adae44SScott Teel kfree(options); 8997c2adae44SScott Teel } 8998c2adae44SScott Teel 8999edd16368SStephen M. Cameron static void hpsa_shutdown(struct pci_dev *pdev) 9000edd16368SStephen M. Cameron { 9001edd16368SStephen M. Cameron struct ctlr_info *h; 9002edd16368SStephen M. Cameron 9003edd16368SStephen M. Cameron h = pci_get_drvdata(pdev); 9004edd16368SStephen M. Cameron /* Turn board interrupts off and send the flush cache command 9005edd16368SStephen M. Cameron * sendcmd will turn off interrupt, and send the flush... 9006edd16368SStephen M. Cameron * To write all data in the battery backed cache to disks 9007edd16368SStephen M. Cameron */ 9008edd16368SStephen M. Cameron hpsa_flush_cache(h); 9009edd16368SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 9010105a3dbcSRobert Elliott hpsa_free_irqs(h); /* init_one 4 */ 9011cc64c817SRobert Elliott hpsa_disable_interrupt_mode(h); /* pci_init 2 */ 9012edd16368SStephen M. Cameron } 9013edd16368SStephen M. Cameron 90146f039790SGreg Kroah-Hartman static void hpsa_free_device_info(struct ctlr_info *h) 901555e14e76SStephen M. Cameron { 901655e14e76SStephen M. Cameron int i; 901755e14e76SStephen M. Cameron 9018105a3dbcSRobert Elliott for (i = 0; i < h->ndevices; i++) { 901955e14e76SStephen M. Cameron kfree(h->dev[i]); 9020105a3dbcSRobert Elliott h->dev[i] = NULL; 9021105a3dbcSRobert Elliott } 902255e14e76SStephen M. Cameron } 902355e14e76SStephen M. Cameron 90246f039790SGreg Kroah-Hartman static void hpsa_remove_one(struct pci_dev *pdev) 9025edd16368SStephen M. Cameron { 9026edd16368SStephen M. Cameron struct ctlr_info *h; 90278a98db73SStephen M. Cameron unsigned long flags; 9028edd16368SStephen M. Cameron 9029edd16368SStephen M. Cameron if (pci_get_drvdata(pdev) == NULL) { 9030edd16368SStephen M. Cameron dev_err(&pdev->dev, "unable to remove device\n"); 9031edd16368SStephen M. Cameron return; 9032edd16368SStephen M. Cameron } 9033edd16368SStephen M. Cameron h = pci_get_drvdata(pdev); 90348a98db73SStephen M. Cameron 90358a98db73SStephen M. Cameron /* Get rid of any controller monitoring work items */ 90368a98db73SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 90378a98db73SStephen M. Cameron h->remove_in_progress = 1; 90388a98db73SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 90396636e7f4SDon Brace cancel_delayed_work_sync(&h->monitor_ctlr_work); 90406636e7f4SDon Brace cancel_delayed_work_sync(&h->rescan_ctlr_work); 90416636e7f4SDon Brace destroy_workqueue(h->rescan_ctlr_wq); 90426636e7f4SDon Brace destroy_workqueue(h->resubmit_wq); 9043cc64c817SRobert Elliott 90442d041306SDon Brace /* 90452d041306SDon Brace * Call before disabling interrupts. 90462d041306SDon Brace * scsi_remove_host can trigger I/O operations especially 90472d041306SDon Brace * when multipath is enabled. There can be SYNCHRONIZE CACHE 90482d041306SDon Brace * operations which cannot complete and will hang the system. 90492d041306SDon Brace */ 90502d041306SDon Brace if (h->scsi_host) 90512d041306SDon Brace scsi_remove_host(h->scsi_host); /* init_one 8 */ 9052105a3dbcSRobert Elliott /* includes hpsa_free_irqs - init_one 4 */ 9053195f2c65SRobert Elliott /* includes hpsa_disable_interrupt_mode - pci_init 2 */ 9054edd16368SStephen M. Cameron hpsa_shutdown(pdev); 9055cc64c817SRobert Elliott 9056105a3dbcSRobert Elliott hpsa_free_device_info(h); /* scan */ 9057105a3dbcSRobert Elliott 90582946e82bSRobert Elliott kfree(h->hba_inquiry_data); /* init_one 10 */ 90592946e82bSRobert Elliott h->hba_inquiry_data = NULL; /* init_one 10 */ 90602946e82bSRobert Elliott hpsa_free_ioaccel2_sg_chain_blocks(h); 9061105a3dbcSRobert Elliott hpsa_free_performant_mode(h); /* init_one 7 */ 9062105a3dbcSRobert Elliott hpsa_free_sg_chain_blocks(h); /* init_one 6 */ 90631fb7c98aSRobert Elliott hpsa_free_cmd_pool(h); /* init_one 5 */ 906434592254SScott Teel kfree(h->lastlogicals); 9065105a3dbcSRobert Elliott 9066105a3dbcSRobert Elliott /* hpsa_free_irqs already called via hpsa_shutdown init_one 4 */ 9067195f2c65SRobert Elliott 90682946e82bSRobert Elliott scsi_host_put(h->scsi_host); /* init_one 3 */ 90692946e82bSRobert Elliott h->scsi_host = NULL; /* init_one 3 */ 90702946e82bSRobert Elliott 9071195f2c65SRobert Elliott /* includes hpsa_disable_interrupt_mode - pci_init 2 */ 90722946e82bSRobert Elliott hpsa_free_pci_init(h); /* init_one 2.5 */ 9073195f2c65SRobert Elliott 9074105a3dbcSRobert Elliott free_percpu(h->lockup_detected); /* init_one 2 */ 9075105a3dbcSRobert Elliott h->lockup_detected = NULL; /* init_one 2 */ 9076105a3dbcSRobert Elliott /* (void) pci_disable_pcie_error_reporting(pdev); */ /* init_one 1 */ 9077d04e62b9SKevin Barnett 9078d04e62b9SKevin Barnett hpsa_delete_sas_host(h); 9079d04e62b9SKevin Barnett 9080105a3dbcSRobert Elliott kfree(h); /* init_one 1 */ 9081edd16368SStephen M. Cameron } 9082edd16368SStephen M. Cameron 9083edd16368SStephen M. Cameron static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev, 9084edd16368SStephen M. Cameron __attribute__((unused)) pm_message_t state) 9085edd16368SStephen M. Cameron { 9086edd16368SStephen M. Cameron return -ENOSYS; 9087edd16368SStephen M. Cameron } 9088edd16368SStephen M. Cameron 9089edd16368SStephen M. Cameron static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev) 9090edd16368SStephen M. Cameron { 9091edd16368SStephen M. Cameron return -ENOSYS; 9092edd16368SStephen M. Cameron } 9093edd16368SStephen M. Cameron 9094edd16368SStephen M. Cameron static struct pci_driver hpsa_pci_driver = { 9095f79cfec6SStephen M. Cameron .name = HPSA, 9096edd16368SStephen M. Cameron .probe = hpsa_init_one, 90976f039790SGreg Kroah-Hartman .remove = hpsa_remove_one, 9098edd16368SStephen M. Cameron .id_table = hpsa_pci_device_id, /* id_table */ 9099edd16368SStephen M. Cameron .shutdown = hpsa_shutdown, 9100edd16368SStephen M. Cameron .suspend = hpsa_suspend, 9101edd16368SStephen M. Cameron .resume = hpsa_resume, 9102edd16368SStephen M. Cameron }; 9103edd16368SStephen M. Cameron 9104303932fdSDon Brace /* Fill in bucket_map[], given nsgs (the max number of 9105303932fdSDon Brace * scatter gather elements supported) and bucket[], 9106303932fdSDon Brace * which is an array of 8 integers. The bucket[] array 9107303932fdSDon Brace * contains 8 different DMA transfer sizes (in 16 9108303932fdSDon Brace * byte increments) which the controller uses to fetch 9109303932fdSDon Brace * commands. This function fills in bucket_map[], which 9110303932fdSDon Brace * maps a given number of scatter gather elements to one of 9111303932fdSDon Brace * the 8 DMA transfer sizes. The point of it is to allow the 9112303932fdSDon Brace * controller to only do as much DMA as needed to fetch the 9113303932fdSDon Brace * command, with the DMA transfer size encoded in the lower 9114303932fdSDon Brace * bits of the command address. 9115303932fdSDon Brace */ 9116303932fdSDon Brace static void calc_bucket_map(int bucket[], int num_buckets, 91172b08b3e9SDon Brace int nsgs, int min_blocks, u32 *bucket_map) 9118303932fdSDon Brace { 9119303932fdSDon Brace int i, j, b, size; 9120303932fdSDon Brace 9121303932fdSDon Brace /* Note, bucket_map must have nsgs+1 entries. */ 9122303932fdSDon Brace for (i = 0; i <= nsgs; i++) { 9123303932fdSDon Brace /* Compute size of a command with i SG entries */ 9124e1f7de0cSMatt Gates size = i + min_blocks; 9125303932fdSDon Brace b = num_buckets; /* Assume the biggest bucket */ 9126303932fdSDon Brace /* Find the bucket that is just big enough */ 9127e1f7de0cSMatt Gates for (j = 0; j < num_buckets; j++) { 9128303932fdSDon Brace if (bucket[j] >= size) { 9129303932fdSDon Brace b = j; 9130303932fdSDon Brace break; 9131303932fdSDon Brace } 9132303932fdSDon Brace } 9133303932fdSDon Brace /* for a command with i SG entries, use bucket b. */ 9134303932fdSDon Brace bucket_map[i] = b; 9135303932fdSDon Brace } 9136303932fdSDon Brace } 9137303932fdSDon Brace 9138105a3dbcSRobert Elliott /* 9139105a3dbcSRobert Elliott * return -ENODEV on err, 0 on success (or no action) 9140105a3dbcSRobert Elliott * allocates numerous items that must be freed later 9141105a3dbcSRobert Elliott */ 9142c706a795SRobert Elliott static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support) 9143303932fdSDon Brace { 91446c311b57SStephen M. Cameron int i; 91456c311b57SStephen M. Cameron unsigned long register_value; 9146e1f7de0cSMatt Gates unsigned long transMethod = CFGTBL_Trans_Performant | 9147e1f7de0cSMatt Gates (trans_support & CFGTBL_Trans_use_short_tags) | 9148e1f7de0cSMatt Gates CFGTBL_Trans_enable_directed_msix | 9149b9af4937SStephen M. Cameron (trans_support & (CFGTBL_Trans_io_accel1 | 9150b9af4937SStephen M. Cameron CFGTBL_Trans_io_accel2)); 9151e1f7de0cSMatt Gates struct access_method access = SA5_performant_access; 9152def342bdSStephen M. Cameron 9153def342bdSStephen M. Cameron /* This is a bit complicated. There are 8 registers on 9154def342bdSStephen M. Cameron * the controller which we write to to tell it 8 different 9155def342bdSStephen M. Cameron * sizes of commands which there may be. It's a way of 9156def342bdSStephen M. Cameron * reducing the DMA done to fetch each command. Encoded into 9157def342bdSStephen M. Cameron * each command's tag are 3 bits which communicate to the controller 9158def342bdSStephen M. Cameron * which of the eight sizes that command fits within. The size of 9159def342bdSStephen M. Cameron * each command depends on how many scatter gather entries there are. 9160def342bdSStephen M. Cameron * Each SG entry requires 16 bytes. The eight registers are programmed 9161def342bdSStephen M. Cameron * with the number of 16-byte blocks a command of that size requires. 9162def342bdSStephen M. Cameron * The smallest command possible requires 5 such 16 byte blocks. 9163d66ae08bSStephen M. Cameron * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte 9164def342bdSStephen M. Cameron * blocks. Note, this only extends to the SG entries contained 9165def342bdSStephen M. Cameron * within the command block, and does not extend to chained blocks 9166def342bdSStephen M. Cameron * of SG elements. bft[] contains the eight values we write to 9167def342bdSStephen M. Cameron * the registers. They are not evenly distributed, but have more 9168def342bdSStephen M. Cameron * sizes for small commands, and fewer sizes for larger commands. 9169def342bdSStephen M. Cameron */ 9170d66ae08bSStephen M. Cameron int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4}; 9171b9af4937SStephen M. Cameron #define MIN_IOACCEL2_BFT_ENTRY 5 9172b9af4937SStephen M. Cameron #define HPSA_IOACCEL2_HEADER_SZ 4 9173b9af4937SStephen M. Cameron int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12, 9174b9af4937SStephen M. Cameron 13, 14, 15, 16, 17, 18, 19, 9175b9af4937SStephen M. Cameron HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES}; 9176b9af4937SStephen M. Cameron BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16); 9177b9af4937SStephen M. Cameron BUILD_BUG_ON(ARRAY_SIZE(bft) != 8); 9178b9af4937SStephen M. Cameron BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) > 9179b9af4937SStephen M. Cameron 16 * MIN_IOACCEL2_BFT_ENTRY); 9180b9af4937SStephen M. Cameron BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16); 9181d66ae08bSStephen M. Cameron BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4); 9182303932fdSDon Brace /* 5 = 1 s/g entry or 4k 9183303932fdSDon Brace * 6 = 2 s/g entry or 8k 9184303932fdSDon Brace * 8 = 4 s/g entry or 16k 9185303932fdSDon Brace * 10 = 6 s/g entry or 24k 9186303932fdSDon Brace */ 9187303932fdSDon Brace 9188b3a52e79SStephen M. Cameron /* If the controller supports either ioaccel method then 9189b3a52e79SStephen M. Cameron * we can also use the RAID stack submit path that does not 9190b3a52e79SStephen M. Cameron * perform the superfluous readl() after each command submission. 9191b3a52e79SStephen M. Cameron */ 9192b3a52e79SStephen M. Cameron if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2)) 9193b3a52e79SStephen M. Cameron access = SA5_performant_access_no_read; 9194b3a52e79SStephen M. Cameron 9195303932fdSDon Brace /* Controller spec: zero out this buffer. */ 9196072b0518SStephen M. Cameron for (i = 0; i < h->nreply_queues; i++) 9197072b0518SStephen M. Cameron memset(h->reply_queue[i].head, 0, h->reply_queue_size); 9198303932fdSDon Brace 9199d66ae08bSStephen M. Cameron bft[7] = SG_ENTRIES_IN_CMD + 4; 9200d66ae08bSStephen M. Cameron calc_bucket_map(bft, ARRAY_SIZE(bft), 9201e1f7de0cSMatt Gates SG_ENTRIES_IN_CMD, 4, h->blockFetchTable); 9202303932fdSDon Brace for (i = 0; i < 8; i++) 9203303932fdSDon Brace writel(bft[i], &h->transtable->BlockFetch[i]); 9204303932fdSDon Brace 9205303932fdSDon Brace /* size of controller ring buffer */ 9206303932fdSDon Brace writel(h->max_commands, &h->transtable->RepQSize); 9207254f796bSMatt Gates writel(h->nreply_queues, &h->transtable->RepQCount); 9208303932fdSDon Brace writel(0, &h->transtable->RepQCtrAddrLow32); 9209303932fdSDon Brace writel(0, &h->transtable->RepQCtrAddrHigh32); 9210254f796bSMatt Gates 9211254f796bSMatt Gates for (i = 0; i < h->nreply_queues; i++) { 9212254f796bSMatt Gates writel(0, &h->transtable->RepQAddr[i].upper); 9213072b0518SStephen M. Cameron writel(h->reply_queue[i].busaddr, 9214254f796bSMatt Gates &h->transtable->RepQAddr[i].lower); 9215254f796bSMatt Gates } 9216254f796bSMatt Gates 9217b9af4937SStephen M. Cameron writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi); 9218e1f7de0cSMatt Gates writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest)); 9219e1f7de0cSMatt Gates /* 9220e1f7de0cSMatt Gates * enable outbound interrupt coalescing in accelerator mode; 9221e1f7de0cSMatt Gates */ 9222e1f7de0cSMatt Gates if (trans_support & CFGTBL_Trans_io_accel1) { 9223e1f7de0cSMatt Gates access = SA5_ioaccel_mode1_access; 9224e1f7de0cSMatt Gates writel(10, &h->cfgtable->HostWrite.CoalIntDelay); 9225e1f7de0cSMatt Gates writel(4, &h->cfgtable->HostWrite.CoalIntCount); 9226c349775eSScott Teel } else { 9227c349775eSScott Teel if (trans_support & CFGTBL_Trans_io_accel2) { 9228c349775eSScott Teel access = SA5_ioaccel_mode2_access; 9229c349775eSScott Teel writel(10, &h->cfgtable->HostWrite.CoalIntDelay); 9230c349775eSScott Teel writel(4, &h->cfgtable->HostWrite.CoalIntCount); 9231c349775eSScott Teel } 9232e1f7de0cSMatt Gates } 9233303932fdSDon Brace writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 9234c706a795SRobert Elliott if (hpsa_wait_for_mode_change_ack(h)) { 9235c706a795SRobert Elliott dev_err(&h->pdev->dev, 9236c706a795SRobert Elliott "performant mode problem - doorbell timeout\n"); 9237c706a795SRobert Elliott return -ENODEV; 9238c706a795SRobert Elliott } 9239303932fdSDon Brace register_value = readl(&(h->cfgtable->TransportActive)); 9240303932fdSDon Brace if (!(register_value & CFGTBL_Trans_Performant)) { 9241050f7147SStephen Cameron dev_err(&h->pdev->dev, 9242050f7147SStephen Cameron "performant mode problem - transport not active\n"); 9243c706a795SRobert Elliott return -ENODEV; 9244303932fdSDon Brace } 9245960a30e7SStephen M. Cameron /* Change the access methods to the performant access methods */ 9246e1f7de0cSMatt Gates h->access = access; 9247e1f7de0cSMatt Gates h->transMethod = transMethod; 9248e1f7de0cSMatt Gates 9249b9af4937SStephen M. Cameron if (!((trans_support & CFGTBL_Trans_io_accel1) || 9250b9af4937SStephen M. Cameron (trans_support & CFGTBL_Trans_io_accel2))) 9251c706a795SRobert Elliott return 0; 9252e1f7de0cSMatt Gates 9253b9af4937SStephen M. Cameron if (trans_support & CFGTBL_Trans_io_accel1) { 9254e1f7de0cSMatt Gates /* Set up I/O accelerator mode */ 9255e1f7de0cSMatt Gates for (i = 0; i < h->nreply_queues; i++) { 9256e1f7de0cSMatt Gates writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX); 9257e1f7de0cSMatt Gates h->reply_queue[i].current_entry = 9258e1f7de0cSMatt Gates readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX); 9259e1f7de0cSMatt Gates } 9260283b4a9bSStephen M. Cameron bft[7] = h->ioaccel_maxsg + 8; 9261283b4a9bSStephen M. Cameron calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8, 9262e1f7de0cSMatt Gates h->ioaccel1_blockFetchTable); 9263e1f7de0cSMatt Gates 9264e1f7de0cSMatt Gates /* initialize all reply queue entries to unused */ 9265072b0518SStephen M. Cameron for (i = 0; i < h->nreply_queues; i++) 9266072b0518SStephen M. Cameron memset(h->reply_queue[i].head, 9267072b0518SStephen M. Cameron (u8) IOACCEL_MODE1_REPLY_UNUSED, 9268072b0518SStephen M. Cameron h->reply_queue_size); 9269e1f7de0cSMatt Gates 9270e1f7de0cSMatt Gates /* set all the constant fields in the accelerator command 9271e1f7de0cSMatt Gates * frames once at init time to save CPU cycles later. 9272e1f7de0cSMatt Gates */ 9273e1f7de0cSMatt Gates for (i = 0; i < h->nr_cmds; i++) { 9274e1f7de0cSMatt Gates struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i]; 9275e1f7de0cSMatt Gates 9276e1f7de0cSMatt Gates cp->function = IOACCEL1_FUNCTION_SCSIIO; 9277e1f7de0cSMatt Gates cp->err_info = (u32) (h->errinfo_pool_dhandle + 9278e1f7de0cSMatt Gates (i * sizeof(struct ErrorInfo))); 9279e1f7de0cSMatt Gates cp->err_info_len = sizeof(struct ErrorInfo); 9280e1f7de0cSMatt Gates cp->sgl_offset = IOACCEL1_SGLOFFSET; 92812b08b3e9SDon Brace cp->host_context_flags = 92822b08b3e9SDon Brace cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT); 9283e1f7de0cSMatt Gates cp->timeout_sec = 0; 9284e1f7de0cSMatt Gates cp->ReplyQueue = 0; 928550a0decfSStephen M. Cameron cp->tag = 9286f2405db8SDon Brace cpu_to_le64((i << DIRECT_LOOKUP_SHIFT)); 928750a0decfSStephen M. Cameron cp->host_addr = 928850a0decfSStephen M. Cameron cpu_to_le64(h->ioaccel_cmd_pool_dhandle + 9289e1f7de0cSMatt Gates (i * sizeof(struct io_accel1_cmd))); 9290e1f7de0cSMatt Gates } 9291b9af4937SStephen M. Cameron } else if (trans_support & CFGTBL_Trans_io_accel2) { 9292b9af4937SStephen M. Cameron u64 cfg_offset, cfg_base_addr_index; 9293b9af4937SStephen M. Cameron u32 bft2_offset, cfg_base_addr; 9294b9af4937SStephen M. Cameron int rc; 9295b9af4937SStephen M. Cameron 9296b9af4937SStephen M. Cameron rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 9297b9af4937SStephen M. Cameron &cfg_base_addr_index, &cfg_offset); 9298b9af4937SStephen M. Cameron BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64); 9299b9af4937SStephen M. Cameron bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ; 9300b9af4937SStephen M. Cameron calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg, 9301b9af4937SStephen M. Cameron 4, h->ioaccel2_blockFetchTable); 9302b9af4937SStephen M. Cameron bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset); 9303b9af4937SStephen M. Cameron BUILD_BUG_ON(offsetof(struct CfgTable, 9304b9af4937SStephen M. Cameron io_accel_request_size_offset) != 0xb8); 9305b9af4937SStephen M. Cameron h->ioaccel2_bft2_regs = 9306b9af4937SStephen M. Cameron remap_pci_mem(pci_resource_start(h->pdev, 9307b9af4937SStephen M. Cameron cfg_base_addr_index) + 9308b9af4937SStephen M. Cameron cfg_offset + bft2_offset, 9309b9af4937SStephen M. Cameron ARRAY_SIZE(bft2) * 9310b9af4937SStephen M. Cameron sizeof(*h->ioaccel2_bft2_regs)); 9311b9af4937SStephen M. Cameron for (i = 0; i < ARRAY_SIZE(bft2); i++) 9312b9af4937SStephen M. Cameron writel(bft2[i], &h->ioaccel2_bft2_regs[i]); 9313b9af4937SStephen M. Cameron } 9314b9af4937SStephen M. Cameron writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 9315c706a795SRobert Elliott if (hpsa_wait_for_mode_change_ack(h)) { 9316c706a795SRobert Elliott dev_err(&h->pdev->dev, 9317c706a795SRobert Elliott "performant mode problem - enabling ioaccel mode\n"); 9318c706a795SRobert Elliott return -ENODEV; 9319c706a795SRobert Elliott } 9320c706a795SRobert Elliott return 0; 9321e1f7de0cSMatt Gates } 9322e1f7de0cSMatt Gates 93231fb7c98aSRobert Elliott /* Free ioaccel1 mode command blocks and block fetch table */ 93241fb7c98aSRobert Elliott static void hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info *h) 93251fb7c98aSRobert Elliott { 9326105a3dbcSRobert Elliott if (h->ioaccel_cmd_pool) { 93271fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 93281fb7c98aSRobert Elliott h->nr_cmds * sizeof(*h->ioaccel_cmd_pool), 93291fb7c98aSRobert Elliott h->ioaccel_cmd_pool, 93301fb7c98aSRobert Elliott h->ioaccel_cmd_pool_dhandle); 9331105a3dbcSRobert Elliott h->ioaccel_cmd_pool = NULL; 9332105a3dbcSRobert Elliott h->ioaccel_cmd_pool_dhandle = 0; 9333105a3dbcSRobert Elliott } 93341fb7c98aSRobert Elliott kfree(h->ioaccel1_blockFetchTable); 9335105a3dbcSRobert Elliott h->ioaccel1_blockFetchTable = NULL; 93361fb7c98aSRobert Elliott } 93371fb7c98aSRobert Elliott 9338d37ffbe4SRobert Elliott /* Allocate ioaccel1 mode command blocks and block fetch table */ 9339d37ffbe4SRobert Elliott static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h) 9340e1f7de0cSMatt Gates { 9341283b4a9bSStephen M. Cameron h->ioaccel_maxsg = 9342283b4a9bSStephen M. Cameron readl(&(h->cfgtable->io_accel_max_embedded_sg_count)); 9343283b4a9bSStephen M. Cameron if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES) 9344283b4a9bSStephen M. Cameron h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES; 9345283b4a9bSStephen M. Cameron 9346e1f7de0cSMatt Gates /* Command structures must be aligned on a 128-byte boundary 9347e1f7de0cSMatt Gates * because the 7 lower bits of the address are used by the 9348e1f7de0cSMatt Gates * hardware. 9349e1f7de0cSMatt Gates */ 9350e1f7de0cSMatt Gates BUILD_BUG_ON(sizeof(struct io_accel1_cmd) % 9351e1f7de0cSMatt Gates IOACCEL1_COMMANDLIST_ALIGNMENT); 9352e1f7de0cSMatt Gates h->ioaccel_cmd_pool = 9353e1f7de0cSMatt Gates pci_alloc_consistent(h->pdev, 9354e1f7de0cSMatt Gates h->nr_cmds * sizeof(*h->ioaccel_cmd_pool), 9355e1f7de0cSMatt Gates &(h->ioaccel_cmd_pool_dhandle)); 9356e1f7de0cSMatt Gates 9357e1f7de0cSMatt Gates h->ioaccel1_blockFetchTable = 9358283b4a9bSStephen M. Cameron kmalloc(((h->ioaccel_maxsg + 1) * 9359e1f7de0cSMatt Gates sizeof(u32)), GFP_KERNEL); 9360e1f7de0cSMatt Gates 9361e1f7de0cSMatt Gates if ((h->ioaccel_cmd_pool == NULL) || 9362e1f7de0cSMatt Gates (h->ioaccel1_blockFetchTable == NULL)) 9363e1f7de0cSMatt Gates goto clean_up; 9364e1f7de0cSMatt Gates 9365e1f7de0cSMatt Gates memset(h->ioaccel_cmd_pool, 0, 9366e1f7de0cSMatt Gates h->nr_cmds * sizeof(*h->ioaccel_cmd_pool)); 9367e1f7de0cSMatt Gates return 0; 9368e1f7de0cSMatt Gates 9369e1f7de0cSMatt Gates clean_up: 93701fb7c98aSRobert Elliott hpsa_free_ioaccel1_cmd_and_bft(h); 93712dd02d74SRobert Elliott return -ENOMEM; 93726c311b57SStephen M. Cameron } 93736c311b57SStephen M. Cameron 93741fb7c98aSRobert Elliott /* Free ioaccel2 mode command blocks and block fetch table */ 93751fb7c98aSRobert Elliott static void hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info *h) 93761fb7c98aSRobert Elliott { 9377d9a729f3SWebb Scales hpsa_free_ioaccel2_sg_chain_blocks(h); 9378d9a729f3SWebb Scales 9379105a3dbcSRobert Elliott if (h->ioaccel2_cmd_pool) { 93801fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 93811fb7c98aSRobert Elliott h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 93821fb7c98aSRobert Elliott h->ioaccel2_cmd_pool, 93831fb7c98aSRobert Elliott h->ioaccel2_cmd_pool_dhandle); 9384105a3dbcSRobert Elliott h->ioaccel2_cmd_pool = NULL; 9385105a3dbcSRobert Elliott h->ioaccel2_cmd_pool_dhandle = 0; 9386105a3dbcSRobert Elliott } 93871fb7c98aSRobert Elliott kfree(h->ioaccel2_blockFetchTable); 9388105a3dbcSRobert Elliott h->ioaccel2_blockFetchTable = NULL; 93891fb7c98aSRobert Elliott } 93901fb7c98aSRobert Elliott 9391d37ffbe4SRobert Elliott /* Allocate ioaccel2 mode command blocks and block fetch table */ 9392d37ffbe4SRobert Elliott static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h) 9393aca9012aSStephen M. Cameron { 9394d9a729f3SWebb Scales int rc; 9395d9a729f3SWebb Scales 9396aca9012aSStephen M. Cameron /* Allocate ioaccel2 mode command blocks and block fetch table */ 9397aca9012aSStephen M. Cameron 9398aca9012aSStephen M. Cameron h->ioaccel_maxsg = 9399aca9012aSStephen M. Cameron readl(&(h->cfgtable->io_accel_max_embedded_sg_count)); 9400aca9012aSStephen M. Cameron if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES) 9401aca9012aSStephen M. Cameron h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES; 9402aca9012aSStephen M. Cameron 9403aca9012aSStephen M. Cameron BUILD_BUG_ON(sizeof(struct io_accel2_cmd) % 9404aca9012aSStephen M. Cameron IOACCEL2_COMMANDLIST_ALIGNMENT); 9405aca9012aSStephen M. Cameron h->ioaccel2_cmd_pool = 9406aca9012aSStephen M. Cameron pci_alloc_consistent(h->pdev, 9407aca9012aSStephen M. Cameron h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 9408aca9012aSStephen M. Cameron &(h->ioaccel2_cmd_pool_dhandle)); 9409aca9012aSStephen M. Cameron 9410aca9012aSStephen M. Cameron h->ioaccel2_blockFetchTable = 9411aca9012aSStephen M. Cameron kmalloc(((h->ioaccel_maxsg + 1) * 9412aca9012aSStephen M. Cameron sizeof(u32)), GFP_KERNEL); 9413aca9012aSStephen M. Cameron 9414aca9012aSStephen M. Cameron if ((h->ioaccel2_cmd_pool == NULL) || 9415d9a729f3SWebb Scales (h->ioaccel2_blockFetchTable == NULL)) { 9416d9a729f3SWebb Scales rc = -ENOMEM; 9417d9a729f3SWebb Scales goto clean_up; 9418d9a729f3SWebb Scales } 9419d9a729f3SWebb Scales 9420d9a729f3SWebb Scales rc = hpsa_allocate_ioaccel2_sg_chain_blocks(h); 9421d9a729f3SWebb Scales if (rc) 9422aca9012aSStephen M. Cameron goto clean_up; 9423aca9012aSStephen M. Cameron 9424aca9012aSStephen M. Cameron memset(h->ioaccel2_cmd_pool, 0, 9425aca9012aSStephen M. Cameron h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool)); 9426aca9012aSStephen M. Cameron return 0; 9427aca9012aSStephen M. Cameron 9428aca9012aSStephen M. Cameron clean_up: 94291fb7c98aSRobert Elliott hpsa_free_ioaccel2_cmd_and_bft(h); 9430d9a729f3SWebb Scales return rc; 9431aca9012aSStephen M. Cameron } 9432aca9012aSStephen M. Cameron 9433105a3dbcSRobert Elliott /* Free items allocated by hpsa_put_ctlr_into_performant_mode */ 9434105a3dbcSRobert Elliott static void hpsa_free_performant_mode(struct ctlr_info *h) 9435105a3dbcSRobert Elliott { 9436105a3dbcSRobert Elliott kfree(h->blockFetchTable); 9437105a3dbcSRobert Elliott h->blockFetchTable = NULL; 9438105a3dbcSRobert Elliott hpsa_free_reply_queues(h); 9439105a3dbcSRobert Elliott hpsa_free_ioaccel1_cmd_and_bft(h); 9440105a3dbcSRobert Elliott hpsa_free_ioaccel2_cmd_and_bft(h); 9441105a3dbcSRobert Elliott } 9442105a3dbcSRobert Elliott 9443105a3dbcSRobert Elliott /* return -ENODEV on error, 0 on success (or no action) 9444105a3dbcSRobert Elliott * allocates numerous items that must be freed later 9445105a3dbcSRobert Elliott */ 9446105a3dbcSRobert Elliott static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h) 94476c311b57SStephen M. Cameron { 94486c311b57SStephen M. Cameron u32 trans_support; 9449e1f7de0cSMatt Gates unsigned long transMethod = CFGTBL_Trans_Performant | 9450e1f7de0cSMatt Gates CFGTBL_Trans_use_short_tags; 9451105a3dbcSRobert Elliott int i, rc; 94526c311b57SStephen M. Cameron 945302ec19c8SStephen M. Cameron if (hpsa_simple_mode) 9454105a3dbcSRobert Elliott return 0; 945502ec19c8SStephen M. Cameron 945667c99a72Sscameron@beardog.cce.hp.com trans_support = readl(&(h->cfgtable->TransportSupport)); 945767c99a72Sscameron@beardog.cce.hp.com if (!(trans_support & PERFORMANT_MODE)) 9458105a3dbcSRobert Elliott return 0; 945967c99a72Sscameron@beardog.cce.hp.com 9460e1f7de0cSMatt Gates /* Check for I/O accelerator mode support */ 9461e1f7de0cSMatt Gates if (trans_support & CFGTBL_Trans_io_accel1) { 9462e1f7de0cSMatt Gates transMethod |= CFGTBL_Trans_io_accel1 | 9463e1f7de0cSMatt Gates CFGTBL_Trans_enable_directed_msix; 9464105a3dbcSRobert Elliott rc = hpsa_alloc_ioaccel1_cmd_and_bft(h); 9465105a3dbcSRobert Elliott if (rc) 9466105a3dbcSRobert Elliott return rc; 9467105a3dbcSRobert Elliott } else if (trans_support & CFGTBL_Trans_io_accel2) { 9468aca9012aSStephen M. Cameron transMethod |= CFGTBL_Trans_io_accel2 | 9469aca9012aSStephen M. Cameron CFGTBL_Trans_enable_directed_msix; 9470105a3dbcSRobert Elliott rc = hpsa_alloc_ioaccel2_cmd_and_bft(h); 9471105a3dbcSRobert Elliott if (rc) 9472105a3dbcSRobert Elliott return rc; 9473e1f7de0cSMatt Gates } 9474e1f7de0cSMatt Gates 9475eee0f03aSHannes Reinecke h->nreply_queues = h->msix_vector > 0 ? h->msix_vector : 1; 9476cba3d38bSStephen M. Cameron hpsa_get_max_perf_mode_cmds(h); 94776c311b57SStephen M. Cameron /* Performant mode ring buffer and supporting data structures */ 9478072b0518SStephen M. Cameron h->reply_queue_size = h->max_commands * sizeof(u64); 94796c311b57SStephen M. Cameron 9480254f796bSMatt Gates for (i = 0; i < h->nreply_queues; i++) { 9481072b0518SStephen M. Cameron h->reply_queue[i].head = pci_alloc_consistent(h->pdev, 9482072b0518SStephen M. Cameron h->reply_queue_size, 9483072b0518SStephen M. Cameron &(h->reply_queue[i].busaddr)); 9484105a3dbcSRobert Elliott if (!h->reply_queue[i].head) { 9485105a3dbcSRobert Elliott rc = -ENOMEM; 9486105a3dbcSRobert Elliott goto clean1; /* rq, ioaccel */ 9487105a3dbcSRobert Elliott } 9488254f796bSMatt Gates h->reply_queue[i].size = h->max_commands; 9489254f796bSMatt Gates h->reply_queue[i].wraparound = 1; /* spec: init to 1 */ 9490254f796bSMatt Gates h->reply_queue[i].current_entry = 0; 9491254f796bSMatt Gates } 9492254f796bSMatt Gates 94936c311b57SStephen M. Cameron /* Need a block fetch table for performant mode */ 9494d66ae08bSStephen M. Cameron h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) * 94956c311b57SStephen M. Cameron sizeof(u32)), GFP_KERNEL); 9496105a3dbcSRobert Elliott if (!h->blockFetchTable) { 9497105a3dbcSRobert Elliott rc = -ENOMEM; 9498105a3dbcSRobert Elliott goto clean1; /* rq, ioaccel */ 9499105a3dbcSRobert Elliott } 95006c311b57SStephen M. Cameron 9501105a3dbcSRobert Elliott rc = hpsa_enter_performant_mode(h, trans_support); 9502105a3dbcSRobert Elliott if (rc) 9503105a3dbcSRobert Elliott goto clean2; /* bft, rq, ioaccel */ 9504105a3dbcSRobert Elliott return 0; 9505303932fdSDon Brace 9506105a3dbcSRobert Elliott clean2: /* bft, rq, ioaccel */ 9507303932fdSDon Brace kfree(h->blockFetchTable); 9508105a3dbcSRobert Elliott h->blockFetchTable = NULL; 9509105a3dbcSRobert Elliott clean1: /* rq, ioaccel */ 9510105a3dbcSRobert Elliott hpsa_free_reply_queues(h); 9511105a3dbcSRobert Elliott hpsa_free_ioaccel1_cmd_and_bft(h); 9512105a3dbcSRobert Elliott hpsa_free_ioaccel2_cmd_and_bft(h); 9513105a3dbcSRobert Elliott return rc; 9514303932fdSDon Brace } 9515303932fdSDon Brace 951623100dd9SStephen M. Cameron static int is_accelerated_cmd(struct CommandList *c) 951776438d08SStephen M. Cameron { 951823100dd9SStephen M. Cameron return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2; 951923100dd9SStephen M. Cameron } 952023100dd9SStephen M. Cameron 952123100dd9SStephen M. Cameron static void hpsa_drain_accel_commands(struct ctlr_info *h) 952223100dd9SStephen M. Cameron { 952323100dd9SStephen M. Cameron struct CommandList *c = NULL; 9524f2405db8SDon Brace int i, accel_cmds_out; 9525281a7fd0SWebb Scales int refcount; 952676438d08SStephen M. Cameron 9527f2405db8SDon Brace do { /* wait for all outstanding ioaccel commands to drain out */ 952823100dd9SStephen M. Cameron accel_cmds_out = 0; 9529f2405db8SDon Brace for (i = 0; i < h->nr_cmds; i++) { 9530f2405db8SDon Brace c = h->cmd_pool + i; 9531281a7fd0SWebb Scales refcount = atomic_inc_return(&c->refcount); 9532281a7fd0SWebb Scales if (refcount > 1) /* Command is allocated */ 953323100dd9SStephen M. Cameron accel_cmds_out += is_accelerated_cmd(c); 9534281a7fd0SWebb Scales cmd_free(h, c); 9535f2405db8SDon Brace } 953623100dd9SStephen M. Cameron if (accel_cmds_out <= 0) 953776438d08SStephen M. Cameron break; 953876438d08SStephen M. Cameron msleep(100); 953976438d08SStephen M. Cameron } while (1); 954076438d08SStephen M. Cameron } 954176438d08SStephen M. Cameron 9542d04e62b9SKevin Barnett static struct hpsa_sas_phy *hpsa_alloc_sas_phy( 9543d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port) 9544d04e62b9SKevin Barnett { 9545d04e62b9SKevin Barnett struct hpsa_sas_phy *hpsa_sas_phy; 9546d04e62b9SKevin Barnett struct sas_phy *phy; 9547d04e62b9SKevin Barnett 9548d04e62b9SKevin Barnett hpsa_sas_phy = kzalloc(sizeof(*hpsa_sas_phy), GFP_KERNEL); 9549d04e62b9SKevin Barnett if (!hpsa_sas_phy) 9550d04e62b9SKevin Barnett return NULL; 9551d04e62b9SKevin Barnett 9552d04e62b9SKevin Barnett phy = sas_phy_alloc(hpsa_sas_port->parent_node->parent_dev, 9553d04e62b9SKevin Barnett hpsa_sas_port->next_phy_index); 9554d04e62b9SKevin Barnett if (!phy) { 9555d04e62b9SKevin Barnett kfree(hpsa_sas_phy); 9556d04e62b9SKevin Barnett return NULL; 9557d04e62b9SKevin Barnett } 9558d04e62b9SKevin Barnett 9559d04e62b9SKevin Barnett hpsa_sas_port->next_phy_index++; 9560d04e62b9SKevin Barnett hpsa_sas_phy->phy = phy; 9561d04e62b9SKevin Barnett hpsa_sas_phy->parent_port = hpsa_sas_port; 9562d04e62b9SKevin Barnett 9563d04e62b9SKevin Barnett return hpsa_sas_phy; 9564d04e62b9SKevin Barnett } 9565d04e62b9SKevin Barnett 9566d04e62b9SKevin Barnett static void hpsa_free_sas_phy(struct hpsa_sas_phy *hpsa_sas_phy) 9567d04e62b9SKevin Barnett { 9568d04e62b9SKevin Barnett struct sas_phy *phy = hpsa_sas_phy->phy; 9569d04e62b9SKevin Barnett 9570d04e62b9SKevin Barnett sas_port_delete_phy(hpsa_sas_phy->parent_port->port, phy); 9571d04e62b9SKevin Barnett sas_phy_free(phy); 9572d04e62b9SKevin Barnett if (hpsa_sas_phy->added_to_port) 9573d04e62b9SKevin Barnett list_del(&hpsa_sas_phy->phy_list_entry); 9574d04e62b9SKevin Barnett kfree(hpsa_sas_phy); 9575d04e62b9SKevin Barnett } 9576d04e62b9SKevin Barnett 9577d04e62b9SKevin Barnett static int hpsa_sas_port_add_phy(struct hpsa_sas_phy *hpsa_sas_phy) 9578d04e62b9SKevin Barnett { 9579d04e62b9SKevin Barnett int rc; 9580d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9581d04e62b9SKevin Barnett struct sas_phy *phy; 9582d04e62b9SKevin Barnett struct sas_identify *identify; 9583d04e62b9SKevin Barnett 9584d04e62b9SKevin Barnett hpsa_sas_port = hpsa_sas_phy->parent_port; 9585d04e62b9SKevin Barnett phy = hpsa_sas_phy->phy; 9586d04e62b9SKevin Barnett 9587d04e62b9SKevin Barnett identify = &phy->identify; 9588d04e62b9SKevin Barnett memset(identify, 0, sizeof(*identify)); 9589d04e62b9SKevin Barnett identify->sas_address = hpsa_sas_port->sas_address; 9590d04e62b9SKevin Barnett identify->device_type = SAS_END_DEVICE; 9591d04e62b9SKevin Barnett identify->initiator_port_protocols = SAS_PROTOCOL_STP; 9592d04e62b9SKevin Barnett identify->target_port_protocols = SAS_PROTOCOL_STP; 9593d04e62b9SKevin Barnett phy->minimum_linkrate_hw = SAS_LINK_RATE_UNKNOWN; 9594d04e62b9SKevin Barnett phy->maximum_linkrate_hw = SAS_LINK_RATE_UNKNOWN; 9595d04e62b9SKevin Barnett phy->minimum_linkrate = SAS_LINK_RATE_UNKNOWN; 9596d04e62b9SKevin Barnett phy->maximum_linkrate = SAS_LINK_RATE_UNKNOWN; 9597d04e62b9SKevin Barnett phy->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN; 9598d04e62b9SKevin Barnett 9599d04e62b9SKevin Barnett rc = sas_phy_add(hpsa_sas_phy->phy); 9600d04e62b9SKevin Barnett if (rc) 9601d04e62b9SKevin Barnett return rc; 9602d04e62b9SKevin Barnett 9603d04e62b9SKevin Barnett sas_port_add_phy(hpsa_sas_port->port, hpsa_sas_phy->phy); 9604d04e62b9SKevin Barnett list_add_tail(&hpsa_sas_phy->phy_list_entry, 9605d04e62b9SKevin Barnett &hpsa_sas_port->phy_list_head); 9606d04e62b9SKevin Barnett hpsa_sas_phy->added_to_port = true; 9607d04e62b9SKevin Barnett 9608d04e62b9SKevin Barnett return 0; 9609d04e62b9SKevin Barnett } 9610d04e62b9SKevin Barnett 9611d04e62b9SKevin Barnett static int 9612d04e62b9SKevin Barnett hpsa_sas_port_add_rphy(struct hpsa_sas_port *hpsa_sas_port, 9613d04e62b9SKevin Barnett struct sas_rphy *rphy) 9614d04e62b9SKevin Barnett { 9615d04e62b9SKevin Barnett struct sas_identify *identify; 9616d04e62b9SKevin Barnett 9617d04e62b9SKevin Barnett identify = &rphy->identify; 9618d04e62b9SKevin Barnett identify->sas_address = hpsa_sas_port->sas_address; 9619d04e62b9SKevin Barnett identify->initiator_port_protocols = SAS_PROTOCOL_STP; 9620d04e62b9SKevin Barnett identify->target_port_protocols = SAS_PROTOCOL_STP; 9621d04e62b9SKevin Barnett 9622d04e62b9SKevin Barnett return sas_rphy_add(rphy); 9623d04e62b9SKevin Barnett } 9624d04e62b9SKevin Barnett 9625d04e62b9SKevin Barnett static struct hpsa_sas_port 9626d04e62b9SKevin Barnett *hpsa_alloc_sas_port(struct hpsa_sas_node *hpsa_sas_node, 9627d04e62b9SKevin Barnett u64 sas_address) 9628d04e62b9SKevin Barnett { 9629d04e62b9SKevin Barnett int rc; 9630d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9631d04e62b9SKevin Barnett struct sas_port *port; 9632d04e62b9SKevin Barnett 9633d04e62b9SKevin Barnett hpsa_sas_port = kzalloc(sizeof(*hpsa_sas_port), GFP_KERNEL); 9634d04e62b9SKevin Barnett if (!hpsa_sas_port) 9635d04e62b9SKevin Barnett return NULL; 9636d04e62b9SKevin Barnett 9637d04e62b9SKevin Barnett INIT_LIST_HEAD(&hpsa_sas_port->phy_list_head); 9638d04e62b9SKevin Barnett hpsa_sas_port->parent_node = hpsa_sas_node; 9639d04e62b9SKevin Barnett 9640d04e62b9SKevin Barnett port = sas_port_alloc_num(hpsa_sas_node->parent_dev); 9641d04e62b9SKevin Barnett if (!port) 9642d04e62b9SKevin Barnett goto free_hpsa_port; 9643d04e62b9SKevin Barnett 9644d04e62b9SKevin Barnett rc = sas_port_add(port); 9645d04e62b9SKevin Barnett if (rc) 9646d04e62b9SKevin Barnett goto free_sas_port; 9647d04e62b9SKevin Barnett 9648d04e62b9SKevin Barnett hpsa_sas_port->port = port; 9649d04e62b9SKevin Barnett hpsa_sas_port->sas_address = sas_address; 9650d04e62b9SKevin Barnett list_add_tail(&hpsa_sas_port->port_list_entry, 9651d04e62b9SKevin Barnett &hpsa_sas_node->port_list_head); 9652d04e62b9SKevin Barnett 9653d04e62b9SKevin Barnett return hpsa_sas_port; 9654d04e62b9SKevin Barnett 9655d04e62b9SKevin Barnett free_sas_port: 9656d04e62b9SKevin Barnett sas_port_free(port); 9657d04e62b9SKevin Barnett free_hpsa_port: 9658d04e62b9SKevin Barnett kfree(hpsa_sas_port); 9659d04e62b9SKevin Barnett 9660d04e62b9SKevin Barnett return NULL; 9661d04e62b9SKevin Barnett } 9662d04e62b9SKevin Barnett 9663d04e62b9SKevin Barnett static void hpsa_free_sas_port(struct hpsa_sas_port *hpsa_sas_port) 9664d04e62b9SKevin Barnett { 9665d04e62b9SKevin Barnett struct hpsa_sas_phy *hpsa_sas_phy; 9666d04e62b9SKevin Barnett struct hpsa_sas_phy *next; 9667d04e62b9SKevin Barnett 9668d04e62b9SKevin Barnett list_for_each_entry_safe(hpsa_sas_phy, next, 9669d04e62b9SKevin Barnett &hpsa_sas_port->phy_list_head, phy_list_entry) 9670d04e62b9SKevin Barnett hpsa_free_sas_phy(hpsa_sas_phy); 9671d04e62b9SKevin Barnett 9672d04e62b9SKevin Barnett sas_port_delete(hpsa_sas_port->port); 9673d04e62b9SKevin Barnett list_del(&hpsa_sas_port->port_list_entry); 9674d04e62b9SKevin Barnett kfree(hpsa_sas_port); 9675d04e62b9SKevin Barnett } 9676d04e62b9SKevin Barnett 9677d04e62b9SKevin Barnett static struct hpsa_sas_node *hpsa_alloc_sas_node(struct device *parent_dev) 9678d04e62b9SKevin Barnett { 9679d04e62b9SKevin Barnett struct hpsa_sas_node *hpsa_sas_node; 9680d04e62b9SKevin Barnett 9681d04e62b9SKevin Barnett hpsa_sas_node = kzalloc(sizeof(*hpsa_sas_node), GFP_KERNEL); 9682d04e62b9SKevin Barnett if (hpsa_sas_node) { 9683d04e62b9SKevin Barnett hpsa_sas_node->parent_dev = parent_dev; 9684d04e62b9SKevin Barnett INIT_LIST_HEAD(&hpsa_sas_node->port_list_head); 9685d04e62b9SKevin Barnett } 9686d04e62b9SKevin Barnett 9687d04e62b9SKevin Barnett return hpsa_sas_node; 9688d04e62b9SKevin Barnett } 9689d04e62b9SKevin Barnett 9690d04e62b9SKevin Barnett static void hpsa_free_sas_node(struct hpsa_sas_node *hpsa_sas_node) 9691d04e62b9SKevin Barnett { 9692d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9693d04e62b9SKevin Barnett struct hpsa_sas_port *next; 9694d04e62b9SKevin Barnett 9695d04e62b9SKevin Barnett if (!hpsa_sas_node) 9696d04e62b9SKevin Barnett return; 9697d04e62b9SKevin Barnett 9698d04e62b9SKevin Barnett list_for_each_entry_safe(hpsa_sas_port, next, 9699d04e62b9SKevin Barnett &hpsa_sas_node->port_list_head, port_list_entry) 9700d04e62b9SKevin Barnett hpsa_free_sas_port(hpsa_sas_port); 9701d04e62b9SKevin Barnett 9702d04e62b9SKevin Barnett kfree(hpsa_sas_node); 9703d04e62b9SKevin Barnett } 9704d04e62b9SKevin Barnett 9705d04e62b9SKevin Barnett static struct hpsa_scsi_dev_t 9706d04e62b9SKevin Barnett *hpsa_find_device_by_sas_rphy(struct ctlr_info *h, 9707d04e62b9SKevin Barnett struct sas_rphy *rphy) 9708d04e62b9SKevin Barnett { 9709d04e62b9SKevin Barnett int i; 9710d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *device; 9711d04e62b9SKevin Barnett 9712d04e62b9SKevin Barnett for (i = 0; i < h->ndevices; i++) { 9713d04e62b9SKevin Barnett device = h->dev[i]; 9714d04e62b9SKevin Barnett if (!device->sas_port) 9715d04e62b9SKevin Barnett continue; 9716d04e62b9SKevin Barnett if (device->sas_port->rphy == rphy) 9717d04e62b9SKevin Barnett return device; 9718d04e62b9SKevin Barnett } 9719d04e62b9SKevin Barnett 9720d04e62b9SKevin Barnett return NULL; 9721d04e62b9SKevin Barnett } 9722d04e62b9SKevin Barnett 9723d04e62b9SKevin Barnett static int hpsa_add_sas_host(struct ctlr_info *h) 9724d04e62b9SKevin Barnett { 9725d04e62b9SKevin Barnett int rc; 9726d04e62b9SKevin Barnett struct device *parent_dev; 9727d04e62b9SKevin Barnett struct hpsa_sas_node *hpsa_sas_node; 9728d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9729d04e62b9SKevin Barnett struct hpsa_sas_phy *hpsa_sas_phy; 9730d04e62b9SKevin Barnett 9731d04e62b9SKevin Barnett parent_dev = &h->scsi_host->shost_gendev; 9732d04e62b9SKevin Barnett 9733d04e62b9SKevin Barnett hpsa_sas_node = hpsa_alloc_sas_node(parent_dev); 9734d04e62b9SKevin Barnett if (!hpsa_sas_node) 9735d04e62b9SKevin Barnett return -ENOMEM; 9736d04e62b9SKevin Barnett 9737d04e62b9SKevin Barnett hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, h->sas_address); 9738d04e62b9SKevin Barnett if (!hpsa_sas_port) { 9739d04e62b9SKevin Barnett rc = -ENODEV; 9740d04e62b9SKevin Barnett goto free_sas_node; 9741d04e62b9SKevin Barnett } 9742d04e62b9SKevin Barnett 9743d04e62b9SKevin Barnett hpsa_sas_phy = hpsa_alloc_sas_phy(hpsa_sas_port); 9744d04e62b9SKevin Barnett if (!hpsa_sas_phy) { 9745d04e62b9SKevin Barnett rc = -ENODEV; 9746d04e62b9SKevin Barnett goto free_sas_port; 9747d04e62b9SKevin Barnett } 9748d04e62b9SKevin Barnett 9749d04e62b9SKevin Barnett rc = hpsa_sas_port_add_phy(hpsa_sas_phy); 9750d04e62b9SKevin Barnett if (rc) 9751d04e62b9SKevin Barnett goto free_sas_phy; 9752d04e62b9SKevin Barnett 9753d04e62b9SKevin Barnett h->sas_host = hpsa_sas_node; 9754d04e62b9SKevin Barnett 9755d04e62b9SKevin Barnett return 0; 9756d04e62b9SKevin Barnett 9757d04e62b9SKevin Barnett free_sas_phy: 9758d04e62b9SKevin Barnett hpsa_free_sas_phy(hpsa_sas_phy); 9759d04e62b9SKevin Barnett free_sas_port: 9760d04e62b9SKevin Barnett hpsa_free_sas_port(hpsa_sas_port); 9761d04e62b9SKevin Barnett free_sas_node: 9762d04e62b9SKevin Barnett hpsa_free_sas_node(hpsa_sas_node); 9763d04e62b9SKevin Barnett 9764d04e62b9SKevin Barnett return rc; 9765d04e62b9SKevin Barnett } 9766d04e62b9SKevin Barnett 9767d04e62b9SKevin Barnett static void hpsa_delete_sas_host(struct ctlr_info *h) 9768d04e62b9SKevin Barnett { 9769d04e62b9SKevin Barnett hpsa_free_sas_node(h->sas_host); 9770d04e62b9SKevin Barnett } 9771d04e62b9SKevin Barnett 9772d04e62b9SKevin Barnett static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node, 9773d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *device) 9774d04e62b9SKevin Barnett { 9775d04e62b9SKevin Barnett int rc; 9776d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9777d04e62b9SKevin Barnett struct sas_rphy *rphy; 9778d04e62b9SKevin Barnett 9779d04e62b9SKevin Barnett hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, device->sas_address); 9780d04e62b9SKevin Barnett if (!hpsa_sas_port) 9781d04e62b9SKevin Barnett return -ENOMEM; 9782d04e62b9SKevin Barnett 9783d04e62b9SKevin Barnett rphy = sas_end_device_alloc(hpsa_sas_port->port); 9784d04e62b9SKevin Barnett if (!rphy) { 9785d04e62b9SKevin Barnett rc = -ENODEV; 9786d04e62b9SKevin Barnett goto free_sas_port; 9787d04e62b9SKevin Barnett } 9788d04e62b9SKevin Barnett 9789d04e62b9SKevin Barnett hpsa_sas_port->rphy = rphy; 9790d04e62b9SKevin Barnett device->sas_port = hpsa_sas_port; 9791d04e62b9SKevin Barnett 9792d04e62b9SKevin Barnett rc = hpsa_sas_port_add_rphy(hpsa_sas_port, rphy); 9793d04e62b9SKevin Barnett if (rc) 9794d04e62b9SKevin Barnett goto free_sas_port; 9795d04e62b9SKevin Barnett 9796d04e62b9SKevin Barnett return 0; 9797d04e62b9SKevin Barnett 9798d04e62b9SKevin Barnett free_sas_port: 9799d04e62b9SKevin Barnett hpsa_free_sas_port(hpsa_sas_port); 9800d04e62b9SKevin Barnett device->sas_port = NULL; 9801d04e62b9SKevin Barnett 9802d04e62b9SKevin Barnett return rc; 9803d04e62b9SKevin Barnett } 9804d04e62b9SKevin Barnett 9805d04e62b9SKevin Barnett static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device) 9806d04e62b9SKevin Barnett { 9807d04e62b9SKevin Barnett if (device->sas_port) { 9808d04e62b9SKevin Barnett hpsa_free_sas_port(device->sas_port); 9809d04e62b9SKevin Barnett device->sas_port = NULL; 9810d04e62b9SKevin Barnett } 9811d04e62b9SKevin Barnett } 9812d04e62b9SKevin Barnett 9813d04e62b9SKevin Barnett static int 9814d04e62b9SKevin Barnett hpsa_sas_get_linkerrors(struct sas_phy *phy) 9815d04e62b9SKevin Barnett { 9816d04e62b9SKevin Barnett return 0; 9817d04e62b9SKevin Barnett } 9818d04e62b9SKevin Barnett 9819d04e62b9SKevin Barnett static int 9820d04e62b9SKevin Barnett hpsa_sas_get_enclosure_identifier(struct sas_rphy *rphy, u64 *identifier) 9821d04e62b9SKevin Barnett { 9822aa105695SDan Carpenter *identifier = 0; 9823d04e62b9SKevin Barnett return 0; 9824d04e62b9SKevin Barnett } 9825d04e62b9SKevin Barnett 9826d04e62b9SKevin Barnett static int 9827d04e62b9SKevin Barnett hpsa_sas_get_bay_identifier(struct sas_rphy *rphy) 9828d04e62b9SKevin Barnett { 9829d04e62b9SKevin Barnett return -ENXIO; 9830d04e62b9SKevin Barnett } 9831d04e62b9SKevin Barnett 9832d04e62b9SKevin Barnett static int 9833d04e62b9SKevin Barnett hpsa_sas_phy_reset(struct sas_phy *phy, int hard_reset) 9834d04e62b9SKevin Barnett { 9835d04e62b9SKevin Barnett return 0; 9836d04e62b9SKevin Barnett } 9837d04e62b9SKevin Barnett 9838d04e62b9SKevin Barnett static int 9839d04e62b9SKevin Barnett hpsa_sas_phy_enable(struct sas_phy *phy, int enable) 9840d04e62b9SKevin Barnett { 9841d04e62b9SKevin Barnett return 0; 9842d04e62b9SKevin Barnett } 9843d04e62b9SKevin Barnett 9844d04e62b9SKevin Barnett static int 9845d04e62b9SKevin Barnett hpsa_sas_phy_setup(struct sas_phy *phy) 9846d04e62b9SKevin Barnett { 9847d04e62b9SKevin Barnett return 0; 9848d04e62b9SKevin Barnett } 9849d04e62b9SKevin Barnett 9850d04e62b9SKevin Barnett static void 9851d04e62b9SKevin Barnett hpsa_sas_phy_release(struct sas_phy *phy) 9852d04e62b9SKevin Barnett { 9853d04e62b9SKevin Barnett } 9854d04e62b9SKevin Barnett 9855d04e62b9SKevin Barnett static int 9856d04e62b9SKevin Barnett hpsa_sas_phy_speed(struct sas_phy *phy, struct sas_phy_linkrates *rates) 9857d04e62b9SKevin Barnett { 9858d04e62b9SKevin Barnett return -EINVAL; 9859d04e62b9SKevin Barnett } 9860d04e62b9SKevin Barnett 9861d04e62b9SKevin Barnett /* SMP = Serial Management Protocol */ 9862d04e62b9SKevin Barnett static int 9863d04e62b9SKevin Barnett hpsa_sas_smp_handler(struct Scsi_Host *shost, struct sas_rphy *rphy, 9864d04e62b9SKevin Barnett struct request *req) 9865d04e62b9SKevin Barnett { 9866d04e62b9SKevin Barnett return -EINVAL; 9867d04e62b9SKevin Barnett } 9868d04e62b9SKevin Barnett 9869d04e62b9SKevin Barnett static struct sas_function_template hpsa_sas_transport_functions = { 9870d04e62b9SKevin Barnett .get_linkerrors = hpsa_sas_get_linkerrors, 9871d04e62b9SKevin Barnett .get_enclosure_identifier = hpsa_sas_get_enclosure_identifier, 9872d04e62b9SKevin Barnett .get_bay_identifier = hpsa_sas_get_bay_identifier, 9873d04e62b9SKevin Barnett .phy_reset = hpsa_sas_phy_reset, 9874d04e62b9SKevin Barnett .phy_enable = hpsa_sas_phy_enable, 9875d04e62b9SKevin Barnett .phy_setup = hpsa_sas_phy_setup, 9876d04e62b9SKevin Barnett .phy_release = hpsa_sas_phy_release, 9877d04e62b9SKevin Barnett .set_phy_speed = hpsa_sas_phy_speed, 9878d04e62b9SKevin Barnett .smp_handler = hpsa_sas_smp_handler, 9879d04e62b9SKevin Barnett }; 9880d04e62b9SKevin Barnett 9881edd16368SStephen M. Cameron /* 9882edd16368SStephen M. Cameron * This is it. Register the PCI driver information for the cards we control 9883edd16368SStephen M. Cameron * the OS will call our registered routines when it finds one of our cards. 9884edd16368SStephen M. Cameron */ 9885edd16368SStephen M. Cameron static int __init hpsa_init(void) 9886edd16368SStephen M. Cameron { 9887d04e62b9SKevin Barnett int rc; 9888d04e62b9SKevin Barnett 9889d04e62b9SKevin Barnett hpsa_sas_transport_template = 9890d04e62b9SKevin Barnett sas_attach_transport(&hpsa_sas_transport_functions); 9891d04e62b9SKevin Barnett if (!hpsa_sas_transport_template) 9892d04e62b9SKevin Barnett return -ENODEV; 9893d04e62b9SKevin Barnett 9894d04e62b9SKevin Barnett rc = pci_register_driver(&hpsa_pci_driver); 9895d04e62b9SKevin Barnett 9896d04e62b9SKevin Barnett if (rc) 9897d04e62b9SKevin Barnett sas_release_transport(hpsa_sas_transport_template); 9898d04e62b9SKevin Barnett 9899d04e62b9SKevin Barnett return rc; 9900edd16368SStephen M. Cameron } 9901edd16368SStephen M. Cameron 9902edd16368SStephen M. Cameron static void __exit hpsa_cleanup(void) 9903edd16368SStephen M. Cameron { 9904edd16368SStephen M. Cameron pci_unregister_driver(&hpsa_pci_driver); 9905d04e62b9SKevin Barnett sas_release_transport(hpsa_sas_transport_template); 9906edd16368SStephen M. Cameron } 9907edd16368SStephen M. Cameron 9908e1f7de0cSMatt Gates static void __attribute__((unused)) verify_offsets(void) 9909e1f7de0cSMatt Gates { 9910e1f7de0cSMatt Gates #define VERIFY_OFFSET(member, offset) \ 9911dd0e19f3SScott Teel BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset) 9912dd0e19f3SScott Teel 9913dd0e19f3SScott Teel VERIFY_OFFSET(structure_size, 0); 9914dd0e19f3SScott Teel VERIFY_OFFSET(volume_blk_size, 4); 9915dd0e19f3SScott Teel VERIFY_OFFSET(volume_blk_cnt, 8); 9916dd0e19f3SScott Teel VERIFY_OFFSET(phys_blk_shift, 16); 9917dd0e19f3SScott Teel VERIFY_OFFSET(parity_rotation_shift, 17); 9918dd0e19f3SScott Teel VERIFY_OFFSET(strip_size, 18); 9919dd0e19f3SScott Teel VERIFY_OFFSET(disk_starting_blk, 20); 9920dd0e19f3SScott Teel VERIFY_OFFSET(disk_blk_cnt, 28); 9921dd0e19f3SScott Teel VERIFY_OFFSET(data_disks_per_row, 36); 9922dd0e19f3SScott Teel VERIFY_OFFSET(metadata_disks_per_row, 38); 9923dd0e19f3SScott Teel VERIFY_OFFSET(row_cnt, 40); 9924dd0e19f3SScott Teel VERIFY_OFFSET(layout_map_count, 42); 9925dd0e19f3SScott Teel VERIFY_OFFSET(flags, 44); 9926dd0e19f3SScott Teel VERIFY_OFFSET(dekindex, 46); 9927dd0e19f3SScott Teel /* VERIFY_OFFSET(reserved, 48 */ 9928dd0e19f3SScott Teel VERIFY_OFFSET(data, 64); 9929dd0e19f3SScott Teel 9930dd0e19f3SScott Teel #undef VERIFY_OFFSET 9931dd0e19f3SScott Teel 9932dd0e19f3SScott Teel #define VERIFY_OFFSET(member, offset) \ 9933b66cc250SMike Miller BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset) 9934b66cc250SMike Miller 9935b66cc250SMike Miller VERIFY_OFFSET(IU_type, 0); 9936b66cc250SMike Miller VERIFY_OFFSET(direction, 1); 9937b66cc250SMike Miller VERIFY_OFFSET(reply_queue, 2); 9938b66cc250SMike Miller /* VERIFY_OFFSET(reserved1, 3); */ 9939b66cc250SMike Miller VERIFY_OFFSET(scsi_nexus, 4); 9940b66cc250SMike Miller VERIFY_OFFSET(Tag, 8); 9941b66cc250SMike Miller VERIFY_OFFSET(cdb, 16); 9942b66cc250SMike Miller VERIFY_OFFSET(cciss_lun, 32); 9943b66cc250SMike Miller VERIFY_OFFSET(data_len, 40); 9944b66cc250SMike Miller VERIFY_OFFSET(cmd_priority_task_attr, 44); 9945b66cc250SMike Miller VERIFY_OFFSET(sg_count, 45); 9946b66cc250SMike Miller /* VERIFY_OFFSET(reserved3 */ 9947b66cc250SMike Miller VERIFY_OFFSET(err_ptr, 48); 9948b66cc250SMike Miller VERIFY_OFFSET(err_len, 56); 9949b66cc250SMike Miller /* VERIFY_OFFSET(reserved4 */ 9950b66cc250SMike Miller VERIFY_OFFSET(sg, 64); 9951b66cc250SMike Miller 9952b66cc250SMike Miller #undef VERIFY_OFFSET 9953b66cc250SMike Miller 9954b66cc250SMike Miller #define VERIFY_OFFSET(member, offset) \ 9955e1f7de0cSMatt Gates BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset) 9956e1f7de0cSMatt Gates 9957e1f7de0cSMatt Gates VERIFY_OFFSET(dev_handle, 0x00); 9958e1f7de0cSMatt Gates VERIFY_OFFSET(reserved1, 0x02); 9959e1f7de0cSMatt Gates VERIFY_OFFSET(function, 0x03); 9960e1f7de0cSMatt Gates VERIFY_OFFSET(reserved2, 0x04); 9961e1f7de0cSMatt Gates VERIFY_OFFSET(err_info, 0x0C); 9962e1f7de0cSMatt Gates VERIFY_OFFSET(reserved3, 0x10); 9963e1f7de0cSMatt Gates VERIFY_OFFSET(err_info_len, 0x12); 9964e1f7de0cSMatt Gates VERIFY_OFFSET(reserved4, 0x13); 9965e1f7de0cSMatt Gates VERIFY_OFFSET(sgl_offset, 0x14); 9966e1f7de0cSMatt Gates VERIFY_OFFSET(reserved5, 0x15); 9967e1f7de0cSMatt Gates VERIFY_OFFSET(transfer_len, 0x1C); 9968e1f7de0cSMatt Gates VERIFY_OFFSET(reserved6, 0x20); 9969e1f7de0cSMatt Gates VERIFY_OFFSET(io_flags, 0x24); 9970e1f7de0cSMatt Gates VERIFY_OFFSET(reserved7, 0x26); 9971e1f7de0cSMatt Gates VERIFY_OFFSET(LUN, 0x34); 9972e1f7de0cSMatt Gates VERIFY_OFFSET(control, 0x3C); 9973e1f7de0cSMatt Gates VERIFY_OFFSET(CDB, 0x40); 9974e1f7de0cSMatt Gates VERIFY_OFFSET(reserved8, 0x50); 9975e1f7de0cSMatt Gates VERIFY_OFFSET(host_context_flags, 0x60); 9976e1f7de0cSMatt Gates VERIFY_OFFSET(timeout_sec, 0x62); 9977e1f7de0cSMatt Gates VERIFY_OFFSET(ReplyQueue, 0x64); 9978e1f7de0cSMatt Gates VERIFY_OFFSET(reserved9, 0x65); 997950a0decfSStephen M. Cameron VERIFY_OFFSET(tag, 0x68); 9980e1f7de0cSMatt Gates VERIFY_OFFSET(host_addr, 0x70); 9981e1f7de0cSMatt Gates VERIFY_OFFSET(CISS_LUN, 0x78); 9982e1f7de0cSMatt Gates VERIFY_OFFSET(SG, 0x78 + 8); 9983e1f7de0cSMatt Gates #undef VERIFY_OFFSET 9984e1f7de0cSMatt Gates } 9985e1f7de0cSMatt Gates 9986edd16368SStephen M. Cameron module_init(hpsa_init); 9987edd16368SStephen M. Cameron module_exit(hpsa_cleanup); 9988