xref: /openbmc/linux/drivers/scsi/hpsa.c (revision 82f01edcf9a81dd958015b36b409011187c013d0)
1edd16368SStephen M. Cameron /*
2edd16368SStephen M. Cameron  *    Disk Array driver for HP Smart Array SAS controllers
39e21760eSDon Brace  *    Copyright (c) 2019-2020 Microchip Technology Inc. and its subsidiaries
494c7bc31SDon Brace  *    Copyright 2016 Microsemi Corporation
51358f6dcSDon Brace  *    Copyright 2014-2015 PMC-Sierra, Inc.
61358f6dcSDon Brace  *    Copyright 2000,2009-2015 Hewlett-Packard Development Company, L.P.
7edd16368SStephen M. Cameron  *
8edd16368SStephen M. Cameron  *    This program is free software; you can redistribute it and/or modify
9edd16368SStephen M. Cameron  *    it under the terms of the GNU General Public License as published by
10edd16368SStephen M. Cameron  *    the Free Software Foundation; version 2 of the License.
11edd16368SStephen M. Cameron  *
12edd16368SStephen M. Cameron  *    This program is distributed in the hope that it will be useful,
13edd16368SStephen M. Cameron  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
14edd16368SStephen M. Cameron  *    MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
15edd16368SStephen M. Cameron  *    NON INFRINGEMENT.  See the GNU General Public License for more details.
16edd16368SStephen M. Cameron  *
1794c7bc31SDon Brace  *    Questions/Comments/Bugfixes to esc.storagedev@microsemi.com
18edd16368SStephen M. Cameron  *
19edd16368SStephen M. Cameron  */
20edd16368SStephen M. Cameron 
21edd16368SStephen M. Cameron #include <linux/module.h>
22edd16368SStephen M. Cameron #include <linux/interrupt.h>
23edd16368SStephen M. Cameron #include <linux/types.h>
24edd16368SStephen M. Cameron #include <linux/pci.h>
25edd16368SStephen M. Cameron #include <linux/kernel.h>
26edd16368SStephen M. Cameron #include <linux/slab.h>
27edd16368SStephen M. Cameron #include <linux/delay.h>
28edd16368SStephen M. Cameron #include <linux/fs.h>
29edd16368SStephen M. Cameron #include <linux/timer.h>
30edd16368SStephen M. Cameron #include <linux/init.h>
31edd16368SStephen M. Cameron #include <linux/spinlock.h>
32edd16368SStephen M. Cameron #include <linux/compat.h>
33edd16368SStephen M. Cameron #include <linux/blktrace_api.h>
34edd16368SStephen M. Cameron #include <linux/uaccess.h>
35edd16368SStephen M. Cameron #include <linux/io.h>
36edd16368SStephen M. Cameron #include <linux/dma-mapping.h>
37edd16368SStephen M. Cameron #include <linux/completion.h>
38edd16368SStephen M. Cameron #include <linux/moduleparam.h>
39edd16368SStephen M. Cameron #include <scsi/scsi.h>
40edd16368SStephen M. Cameron #include <scsi/scsi_cmnd.h>
41edd16368SStephen M. Cameron #include <scsi/scsi_device.h>
42edd16368SStephen M. Cameron #include <scsi/scsi_host.h>
43667e23d4SStephen M. Cameron #include <scsi/scsi_tcq.h>
449437ac43SStephen Cameron #include <scsi/scsi_eh.h>
45d04e62b9SKevin Barnett #include <scsi/scsi_transport_sas.h>
4673153fe5SWebb Scales #include <scsi/scsi_dbg.h>
47edd16368SStephen M. Cameron #include <linux/cciss_ioctl.h>
48edd16368SStephen M. Cameron #include <linux/string.h>
49edd16368SStephen M. Cameron #include <linux/bitmap.h>
5060063497SArun Sharma #include <linux/atomic.h>
51a0c12413SStephen M. Cameron #include <linux/jiffies.h>
5242a91641SDon Brace #include <linux/percpu-defs.h>
53094963daSStephen M. Cameron #include <linux/percpu.h>
542b08b3e9SDon Brace #include <asm/unaligned.h>
55283b4a9bSStephen M. Cameron #include <asm/div64.h>
56edd16368SStephen M. Cameron #include "hpsa_cmd.h"
57edd16368SStephen M. Cameron #include "hpsa.h"
58edd16368SStephen M. Cameron 
59ec2c3aa9SDon Brace /*
60ec2c3aa9SDon Brace  * HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.'
61ec2c3aa9SDon Brace  * with an optional trailing '-' followed by a byte value (0-255).
62ec2c3aa9SDon Brace  */
63654cc541SDon Brace #define HPSA_DRIVER_VERSION "3.4.20-200"
64edd16368SStephen M. Cameron #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
65f79cfec6SStephen M. Cameron #define HPSA "hpsa"
66edd16368SStephen M. Cameron 
67007e7aa9SRobert Elliott /* How long to wait for CISS doorbell communication */
68007e7aa9SRobert Elliott #define CLEAR_EVENT_WAIT_INTERVAL 20	/* ms for each msleep() call */
69007e7aa9SRobert Elliott #define MODE_CHANGE_WAIT_INTERVAL 10	/* ms for each msleep() call */
70007e7aa9SRobert Elliott #define MAX_CLEAR_EVENT_WAIT 30000	/* times 20 ms = 600 s */
71007e7aa9SRobert Elliott #define MAX_MODE_CHANGE_WAIT 2000	/* times 10 ms = 20 s */
72edd16368SStephen M. Cameron #define MAX_IOCTL_CONFIG_WAIT 1000
73edd16368SStephen M. Cameron 
74edd16368SStephen M. Cameron /*define how many times we will try a command because of bus resets */
75edd16368SStephen M. Cameron #define MAX_CMD_RETRIES 3
76b443d3eaSDon Brace /* How long to wait before giving up on a command */
77b443d3eaSDon Brace #define HPSA_EH_PTRAID_TIMEOUT (240 * HZ)
78edd16368SStephen M. Cameron 
79edd16368SStephen M. Cameron /* Embedded module documentation macros - see modules.h */
80edd16368SStephen M. Cameron MODULE_AUTHOR("Hewlett-Packard Company");
81edd16368SStephen M. Cameron MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
82edd16368SStephen M. Cameron 	HPSA_DRIVER_VERSION);
83edd16368SStephen M. Cameron MODULE_VERSION(HPSA_DRIVER_VERSION);
84edd16368SStephen M. Cameron MODULE_LICENSE("GPL");
85253d2464SHannes Reinecke MODULE_ALIAS("cciss");
86edd16368SStephen M. Cameron 
8702ec19c8SStephen M. Cameron static int hpsa_simple_mode;
8802ec19c8SStephen M. Cameron module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
8902ec19c8SStephen M. Cameron MODULE_PARM_DESC(hpsa_simple_mode,
9002ec19c8SStephen M. Cameron 	"Use 'simple mode' rather than 'performant mode'");
91edd16368SStephen M. Cameron 
92edd16368SStephen M. Cameron /* define the PCI info for the cards we can control */
93edd16368SStephen M. Cameron static const struct pci_device_id hpsa_pci_device_id[] = {
94edd16368SStephen M. Cameron 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3241},
95edd16368SStephen M. Cameron 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3243},
96edd16368SStephen M. Cameron 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3245},
97edd16368SStephen M. Cameron 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3247},
98edd16368SStephen M. Cameron 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3249},
99163dbcd8SMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x324A},
100163dbcd8SMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x324B},
101f8b01eb9SMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3233},
1029143a961Sscameron@beardog.cce.hp.com 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3350},
1039143a961Sscameron@beardog.cce.hp.com 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3351},
1049143a961Sscameron@beardog.cce.hp.com 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3352},
1059143a961Sscameron@beardog.cce.hp.com 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3353},
1069143a961Sscameron@beardog.cce.hp.com 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3354},
1079143a961Sscameron@beardog.cce.hp.com 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3355},
1089143a961Sscameron@beardog.cce.hp.com 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3356},
1097f1974a7SDon Brace 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103c, 0x1920},
110fe0c9610SMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1921},
111fe0c9610SMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1922},
112fe0c9610SMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1923},
113fe0c9610SMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1924},
1147f1974a7SDon Brace 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103c, 0x1925},
115fe0c9610SMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1926},
116fe0c9610SMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1928},
11797b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1929},
11897b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BD},
11997b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BE},
12097b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BF},
12197b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C0},
12297b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C1},
12397b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C2},
12497b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C3},
12597b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C4},
12697b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C5},
1273b7a45e5SJoe Handzik 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C6},
12897b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C7},
12997b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C8},
13097b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C9},
1313b7a45e5SJoe Handzik 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CA},
1323b7a45e5SJoe Handzik 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CB},
1333b7a45e5SJoe Handzik 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CC},
1343b7a45e5SJoe Handzik 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CD},
1353b7a45e5SJoe Handzik 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CE},
136fdfa4b6dSDon Brace 	{PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0580},
137cbb47dcbSDon Brace 	{PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0581},
138cbb47dcbSDon Brace 	{PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0582},
139cbb47dcbSDon Brace 	{PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0583},
140cbb47dcbSDon Brace 	{PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0584},
141cbb47dcbSDon Brace 	{PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0585},
1428e616a5eSStephen M. Cameron 	{PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076},
1438e616a5eSStephen M. Cameron 	{PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087},
1448e616a5eSStephen M. Cameron 	{PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D},
1458e616a5eSStephen M. Cameron 	{PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088},
1468e616a5eSStephen M. Cameron 	{PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f},
147edd16368SStephen M. Cameron 	{PCI_VENDOR_ID_HP,     PCI_ANY_ID,	PCI_ANY_ID, PCI_ANY_ID,
148edd16368SStephen M. Cameron 		PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
149135ae6edSHannes Reinecke 	{PCI_VENDOR_ID_COMPAQ,     PCI_ANY_ID,	PCI_ANY_ID, PCI_ANY_ID,
150135ae6edSHannes Reinecke 		PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
151edd16368SStephen M. Cameron 	{0,}
152edd16368SStephen M. Cameron };
153edd16368SStephen M. Cameron 
154edd16368SStephen M. Cameron MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
155edd16368SStephen M. Cameron 
156edd16368SStephen M. Cameron /*  board_id = Subsystem Device ID & Vendor ID
157edd16368SStephen M. Cameron  *  product = Marketing Name for the board
158edd16368SStephen M. Cameron  *  access = Address of the struct of function pointers
159edd16368SStephen M. Cameron  */
160edd16368SStephen M. Cameron static struct board_type products[] = {
161135ae6edSHannes Reinecke 	{0x40700E11, "Smart Array 5300", &SA5A_access},
162135ae6edSHannes Reinecke 	{0x40800E11, "Smart Array 5i", &SA5B_access},
163135ae6edSHannes Reinecke 	{0x40820E11, "Smart Array 532", &SA5B_access},
164135ae6edSHannes Reinecke 	{0x40830E11, "Smart Array 5312", &SA5B_access},
165135ae6edSHannes Reinecke 	{0x409A0E11, "Smart Array 641", &SA5A_access},
166135ae6edSHannes Reinecke 	{0x409B0E11, "Smart Array 642", &SA5A_access},
167135ae6edSHannes Reinecke 	{0x409C0E11, "Smart Array 6400", &SA5A_access},
168135ae6edSHannes Reinecke 	{0x409D0E11, "Smart Array 6400 EM", &SA5A_access},
169135ae6edSHannes Reinecke 	{0x40910E11, "Smart Array 6i", &SA5A_access},
170135ae6edSHannes Reinecke 	{0x3225103C, "Smart Array P600", &SA5A_access},
171135ae6edSHannes Reinecke 	{0x3223103C, "Smart Array P800", &SA5A_access},
172135ae6edSHannes Reinecke 	{0x3234103C, "Smart Array P400", &SA5A_access},
173135ae6edSHannes Reinecke 	{0x3235103C, "Smart Array P400i", &SA5A_access},
174135ae6edSHannes Reinecke 	{0x3211103C, "Smart Array E200i", &SA5A_access},
175135ae6edSHannes Reinecke 	{0x3212103C, "Smart Array E200", &SA5A_access},
176135ae6edSHannes Reinecke 	{0x3213103C, "Smart Array E200i", &SA5A_access},
177135ae6edSHannes Reinecke 	{0x3214103C, "Smart Array E200i", &SA5A_access},
178135ae6edSHannes Reinecke 	{0x3215103C, "Smart Array E200i", &SA5A_access},
179135ae6edSHannes Reinecke 	{0x3237103C, "Smart Array E500", &SA5A_access},
180135ae6edSHannes Reinecke 	{0x323D103C, "Smart Array P700m", &SA5A_access},
181edd16368SStephen M. Cameron 	{0x3241103C, "Smart Array P212", &SA5_access},
182edd16368SStephen M. Cameron 	{0x3243103C, "Smart Array P410", &SA5_access},
183edd16368SStephen M. Cameron 	{0x3245103C, "Smart Array P410i", &SA5_access},
184edd16368SStephen M. Cameron 	{0x3247103C, "Smart Array P411", &SA5_access},
185edd16368SStephen M. Cameron 	{0x3249103C, "Smart Array P812", &SA5_access},
186163dbcd8SMike Miller 	{0x324A103C, "Smart Array P712m", &SA5_access},
187163dbcd8SMike Miller 	{0x324B103C, "Smart Array P711m", &SA5_access},
1887d2cce58SStephen M. Cameron 	{0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */
189fe0c9610SMike Miller 	{0x3350103C, "Smart Array P222", &SA5_access},
190fe0c9610SMike Miller 	{0x3351103C, "Smart Array P420", &SA5_access},
191fe0c9610SMike Miller 	{0x3352103C, "Smart Array P421", &SA5_access},
192fe0c9610SMike Miller 	{0x3353103C, "Smart Array P822", &SA5_access},
193fe0c9610SMike Miller 	{0x3354103C, "Smart Array P420i", &SA5_access},
194fe0c9610SMike Miller 	{0x3355103C, "Smart Array P220i", &SA5_access},
195fe0c9610SMike Miller 	{0x3356103C, "Smart Array P721m", &SA5_access},
1967f1974a7SDon Brace 	{0x1920103C, "Smart Array P430i", &SA5_access},
1971fd6c8e3SMike Miller 	{0x1921103C, "Smart Array P830i", &SA5_access},
1981fd6c8e3SMike Miller 	{0x1922103C, "Smart Array P430", &SA5_access},
1991fd6c8e3SMike Miller 	{0x1923103C, "Smart Array P431", &SA5_access},
2001fd6c8e3SMike Miller 	{0x1924103C, "Smart Array P830", &SA5_access},
2017f1974a7SDon Brace 	{0x1925103C, "Smart Array P831", &SA5_access},
2021fd6c8e3SMike Miller 	{0x1926103C, "Smart Array P731m", &SA5_access},
2031fd6c8e3SMike Miller 	{0x1928103C, "Smart Array P230i", &SA5_access},
2041fd6c8e3SMike Miller 	{0x1929103C, "Smart Array P530", &SA5_access},
20527fb8137SDon Brace 	{0x21BD103C, "Smart Array P244br", &SA5_access},
20627fb8137SDon Brace 	{0x21BE103C, "Smart Array P741m", &SA5_access},
20727fb8137SDon Brace 	{0x21BF103C, "Smart HBA H240ar", &SA5_access},
20827fb8137SDon Brace 	{0x21C0103C, "Smart Array P440ar", &SA5_access},
209c8ae0ab1SDon Brace 	{0x21C1103C, "Smart Array P840ar", &SA5_access},
21027fb8137SDon Brace 	{0x21C2103C, "Smart Array P440", &SA5_access},
21127fb8137SDon Brace 	{0x21C3103C, "Smart Array P441", &SA5_access},
21297b9f53dSMike Miller 	{0x21C4103C, "Smart Array", &SA5_access},
21327fb8137SDon Brace 	{0x21C5103C, "Smart Array P841", &SA5_access},
21427fb8137SDon Brace 	{0x21C6103C, "Smart HBA H244br", &SA5_access},
21527fb8137SDon Brace 	{0x21C7103C, "Smart HBA H240", &SA5_access},
21627fb8137SDon Brace 	{0x21C8103C, "Smart HBA H241", &SA5_access},
21797b9f53dSMike Miller 	{0x21C9103C, "Smart Array", &SA5_access},
21827fb8137SDon Brace 	{0x21CA103C, "Smart Array P246br", &SA5_access},
21927fb8137SDon Brace 	{0x21CB103C, "Smart Array P840", &SA5_access},
2203b7a45e5SJoe Handzik 	{0x21CC103C, "Smart Array", &SA5_access},
2213b7a45e5SJoe Handzik 	{0x21CD103C, "Smart Array", &SA5_access},
22227fb8137SDon Brace 	{0x21CE103C, "Smart HBA", &SA5_access},
223fdfa4b6dSDon Brace 	{0x05809005, "SmartHBA-SA", &SA5_access},
224cbb47dcbSDon Brace 	{0x05819005, "SmartHBA-SA 8i", &SA5_access},
225cbb47dcbSDon Brace 	{0x05829005, "SmartHBA-SA 8i8e", &SA5_access},
226cbb47dcbSDon Brace 	{0x05839005, "SmartHBA-SA 8e", &SA5_access},
227cbb47dcbSDon Brace 	{0x05849005, "SmartHBA-SA 16i", &SA5_access},
228cbb47dcbSDon Brace 	{0x05859005, "SmartHBA-SA 4i4e", &SA5_access},
2298e616a5eSStephen M. Cameron 	{0x00761590, "HP Storage P1224 Array Controller", &SA5_access},
2308e616a5eSStephen M. Cameron 	{0x00871590, "HP Storage P1224e Array Controller", &SA5_access},
2318e616a5eSStephen M. Cameron 	{0x007D1590, "HP Storage P1228 Array Controller", &SA5_access},
2328e616a5eSStephen M. Cameron 	{0x00881590, "HP Storage P1228e Array Controller", &SA5_access},
2338e616a5eSStephen M. Cameron 	{0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access},
234edd16368SStephen M. Cameron 	{0xFFFF103C, "Unknown Smart Array", &SA5_access},
235edd16368SStephen M. Cameron };
236edd16368SStephen M. Cameron 
237d04e62b9SKevin Barnett static struct scsi_transport_template *hpsa_sas_transport_template;
238d04e62b9SKevin Barnett static int hpsa_add_sas_host(struct ctlr_info *h);
239d04e62b9SKevin Barnett static void hpsa_delete_sas_host(struct ctlr_info *h);
240d04e62b9SKevin Barnett static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node,
241d04e62b9SKevin Barnett 			struct hpsa_scsi_dev_t *device);
242d04e62b9SKevin Barnett static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device);
243d04e62b9SKevin Barnett static struct hpsa_scsi_dev_t
244d04e62b9SKevin Barnett 	*hpsa_find_device_by_sas_rphy(struct ctlr_info *h,
245d04e62b9SKevin Barnett 		struct sas_rphy *rphy);
246d04e62b9SKevin Barnett 
247a58e7e53SWebb Scales #define SCSI_CMD_BUSY ((struct scsi_cmnd *)&hpsa_cmd_busy)
248a58e7e53SWebb Scales static const struct scsi_cmnd hpsa_cmd_busy;
249a58e7e53SWebb Scales #define SCSI_CMD_IDLE ((struct scsi_cmnd *)&hpsa_cmd_idle)
250a58e7e53SWebb Scales static const struct scsi_cmnd hpsa_cmd_idle;
251edd16368SStephen M. Cameron static int number_of_controllers;
252edd16368SStephen M. Cameron 
25310f66018SStephen M. Cameron static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
25410f66018SStephen M. Cameron static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
2556f4e626fSNathan Chancellor static int hpsa_ioctl(struct scsi_device *dev, unsigned int cmd,
2566f4e626fSNathan Chancellor 		      void __user *arg);
25710100ffdSAl Viro static int hpsa_passthru_ioctl(struct ctlr_info *h,
25810100ffdSAl Viro 			       IOCTL_Command_struct *iocommand);
25910100ffdSAl Viro static int hpsa_big_passthru_ioctl(struct ctlr_info *h,
26010100ffdSAl Viro 				   BIG_IOCTL_Command_struct *ioc);
261edd16368SStephen M. Cameron 
262edd16368SStephen M. Cameron #ifdef CONFIG_COMPAT
2636f4e626fSNathan Chancellor static int hpsa_compat_ioctl(struct scsi_device *dev, unsigned int cmd,
26442a91641SDon Brace 	void __user *arg);
265edd16368SStephen M. Cameron #endif
266edd16368SStephen M. Cameron 
267edd16368SStephen M. Cameron static void cmd_free(struct ctlr_info *h, struct CommandList *c);
268edd16368SStephen M. Cameron static struct CommandList *cmd_alloc(struct ctlr_info *h);
26973153fe5SWebb Scales static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c);
27073153fe5SWebb Scales static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h,
27173153fe5SWebb Scales 					    struct scsi_cmnd *scmd);
272a2dac136SStephen M. Cameron static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
273b7bb24ebSStephen M. Cameron 	void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
274edd16368SStephen M. Cameron 	int cmd_type);
2752c143342SRobert Elliott static void hpsa_free_cmd_pool(struct ctlr_info *h);
276b7bb24ebSStephen M. Cameron #define VPD_PAGE (1 << 8)
277b48d9804SDon Brace #define HPSA_SIMPLE_ERROR_BITS 0x03
278edd16368SStephen M. Cameron 
279f281233dSJeff Garzik static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
280a08a8471SStephen M. Cameron static void hpsa_scan_start(struct Scsi_Host *);
281a08a8471SStephen M. Cameron static int hpsa_scan_finished(struct Scsi_Host *sh,
282a08a8471SStephen M. Cameron 	unsigned long elapsed_time);
2837c0a0229SDon Brace static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth);
284edd16368SStephen M. Cameron 
285edd16368SStephen M. Cameron static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
286edd16368SStephen M. Cameron static int hpsa_slave_alloc(struct scsi_device *sdev);
28741ce4c35SStephen Cameron static int hpsa_slave_configure(struct scsi_device *sdev);
288edd16368SStephen M. Cameron static void hpsa_slave_destroy(struct scsi_device *sdev);
289edd16368SStephen M. Cameron 
2908aa60681SDon Brace static void hpsa_update_scsi_devices(struct ctlr_info *h);
291edd16368SStephen M. Cameron static int check_for_unit_attention(struct ctlr_info *h,
292edd16368SStephen M. Cameron 	struct CommandList *c);
293edd16368SStephen M. Cameron static void check_ioctl_unit_attention(struct ctlr_info *h,
294edd16368SStephen M. Cameron 	struct CommandList *c);
295303932fdSDon Brace /* performant mode helper functions */
296303932fdSDon Brace static void calc_bucket_map(int *bucket, int num_buckets,
2972b08b3e9SDon Brace 	int nsgs, int min_blocks, u32 *bucket_map);
298105a3dbcSRobert Elliott static void hpsa_free_performant_mode(struct ctlr_info *h);
299105a3dbcSRobert Elliott static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
300254f796bSMatt Gates static inline u32 next_command(struct ctlr_info *h, u8 q);
3016f039790SGreg Kroah-Hartman static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
3026f039790SGreg Kroah-Hartman 			       u32 *cfg_base_addr, u64 *cfg_base_addr_index,
3031df8552aSStephen M. Cameron 			       u64 *cfg_offset);
3046f039790SGreg Kroah-Hartman static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
3051df8552aSStephen M. Cameron 				    unsigned long *memory_bar);
306135ae6edSHannes Reinecke static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id,
307135ae6edSHannes Reinecke 				bool *legacy_board);
308bfd7546cSDon Brace static int wait_for_device_to_become_ready(struct ctlr_info *h,
309bfd7546cSDon Brace 					   unsigned char lunaddr[],
310bfd7546cSDon Brace 					   int reply_queue);
3116f039790SGreg Kroah-Hartman static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
3126f039790SGreg Kroah-Hartman 				     int wait_for_ready);
31375167d2cSStephen M. Cameron static inline void finish_cmd(struct CommandList *c);
314c706a795SRobert Elliott static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h);
315fe5389c8SStephen M. Cameron #define BOARD_NOT_READY 0
316fe5389c8SStephen M. Cameron #define BOARD_READY 1
31723100dd9SStephen M. Cameron static void hpsa_drain_accel_commands(struct ctlr_info *h);
31876438d08SStephen M. Cameron static void hpsa_flush_cache(struct ctlr_info *h);
319c349775eSScott Teel static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
320c349775eSScott Teel 	struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
32103383736SDon Brace 	u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk);
322080ef1ccSDon Brace static void hpsa_command_resubmit_worker(struct work_struct *work);
32325163bd5SWebb Scales static u32 lockup_detected(struct ctlr_info *h);
32425163bd5SWebb Scales static int detect_controller_lockup(struct ctlr_info *h);
325c2adae44SScott Teel static void hpsa_disable_rld_caching(struct ctlr_info *h);
326d04e62b9SKevin Barnett static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
327d04e62b9SKevin Barnett 	struct ReportExtendedLUNdata *buf, int bufsize);
3288383278dSScott Teel static bool hpsa_vpd_page_supported(struct ctlr_info *h,
3298383278dSScott Teel 	unsigned char scsi3addr[], u8 page);
33034592254SScott Teel static int hpsa_luns_changed(struct ctlr_info *h);
331ba74fdc4SDon Brace static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c,
332ba74fdc4SDon Brace 			       struct hpsa_scsi_dev_t *dev,
333ba74fdc4SDon Brace 			       unsigned char *scsi3addr);
334edd16368SStephen M. Cameron 
335edd16368SStephen M. Cameron static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
336edd16368SStephen M. Cameron {
337edd16368SStephen M. Cameron 	unsigned long *priv = shost_priv(sdev->host);
338edd16368SStephen M. Cameron 	return (struct ctlr_info *) *priv;
339edd16368SStephen M. Cameron }
340edd16368SStephen M. Cameron 
341a23513e8SStephen M. Cameron static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
342a23513e8SStephen M. Cameron {
343a23513e8SStephen M. Cameron 	unsigned long *priv = shost_priv(sh);
344a23513e8SStephen M. Cameron 	return (struct ctlr_info *) *priv;
345a23513e8SStephen M. Cameron }
346a23513e8SStephen M. Cameron 
347a58e7e53SWebb Scales static inline bool hpsa_is_cmd_idle(struct CommandList *c)
348a58e7e53SWebb Scales {
349a58e7e53SWebb Scales 	return c->scsi_cmd == SCSI_CMD_IDLE;
350a58e7e53SWebb Scales }
351a58e7e53SWebb Scales 
3529437ac43SStephen Cameron /* extract sense key, asc, and ascq from sense data.  -1 means invalid. */
3539437ac43SStephen Cameron static void decode_sense_data(const u8 *sense_data, int sense_data_len,
3549437ac43SStephen Cameron 			u8 *sense_key, u8 *asc, u8 *ascq)
3559437ac43SStephen Cameron {
3569437ac43SStephen Cameron 	struct scsi_sense_hdr sshdr;
3579437ac43SStephen Cameron 	bool rc;
3589437ac43SStephen Cameron 
3599437ac43SStephen Cameron 	*sense_key = -1;
3609437ac43SStephen Cameron 	*asc = -1;
3619437ac43SStephen Cameron 	*ascq = -1;
3629437ac43SStephen Cameron 
3639437ac43SStephen Cameron 	if (sense_data_len < 1)
3649437ac43SStephen Cameron 		return;
3659437ac43SStephen Cameron 
3669437ac43SStephen Cameron 	rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr);
3679437ac43SStephen Cameron 	if (rc) {
3689437ac43SStephen Cameron 		*sense_key = sshdr.sense_key;
3699437ac43SStephen Cameron 		*asc = sshdr.asc;
3709437ac43SStephen Cameron 		*ascq = sshdr.ascq;
3719437ac43SStephen Cameron 	}
3729437ac43SStephen Cameron }
3739437ac43SStephen Cameron 
374edd16368SStephen M. Cameron static int check_for_unit_attention(struct ctlr_info *h,
375edd16368SStephen M. Cameron 	struct CommandList *c)
376edd16368SStephen M. Cameron {
3779437ac43SStephen Cameron 	u8 sense_key, asc, ascq;
3789437ac43SStephen Cameron 	int sense_len;
3799437ac43SStephen Cameron 
3809437ac43SStephen Cameron 	if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
3819437ac43SStephen Cameron 		sense_len = sizeof(c->err_info->SenseInfo);
3829437ac43SStephen Cameron 	else
3839437ac43SStephen Cameron 		sense_len = c->err_info->SenseLen;
3849437ac43SStephen Cameron 
3859437ac43SStephen Cameron 	decode_sense_data(c->err_info->SenseInfo, sense_len,
3869437ac43SStephen Cameron 				&sense_key, &asc, &ascq);
38781c27557SDon Brace 	if (sense_key != UNIT_ATTENTION || asc == 0xff)
388edd16368SStephen M. Cameron 		return 0;
389edd16368SStephen M. Cameron 
3909437ac43SStephen Cameron 	switch (asc) {
391edd16368SStephen M. Cameron 	case STATE_CHANGED:
3929437ac43SStephen Cameron 		dev_warn(&h->pdev->dev,
3932946e82bSRobert Elliott 			"%s: a state change detected, command retried\n",
3942946e82bSRobert Elliott 			h->devname);
395edd16368SStephen M. Cameron 		break;
396edd16368SStephen M. Cameron 	case LUN_FAILED:
3977f73695aSStephen M. Cameron 		dev_warn(&h->pdev->dev,
3982946e82bSRobert Elliott 			"%s: LUN failure detected\n", h->devname);
399edd16368SStephen M. Cameron 		break;
400edd16368SStephen M. Cameron 	case REPORT_LUNS_CHANGED:
4017f73695aSStephen M. Cameron 		dev_warn(&h->pdev->dev,
4022946e82bSRobert Elliott 			"%s: report LUN data changed\n", h->devname);
403edd16368SStephen M. Cameron 	/*
4044f4eb9f1SScott Teel 	 * Note: this REPORT_LUNS_CHANGED condition only occurs on the external
4054f4eb9f1SScott Teel 	 * target (array) devices.
406edd16368SStephen M. Cameron 	 */
407edd16368SStephen M. Cameron 		break;
408edd16368SStephen M. Cameron 	case POWER_OR_RESET:
4092946e82bSRobert Elliott 		dev_warn(&h->pdev->dev,
4102946e82bSRobert Elliott 			"%s: a power on or device reset detected\n",
4112946e82bSRobert Elliott 			h->devname);
412edd16368SStephen M. Cameron 		break;
413edd16368SStephen M. Cameron 	case UNIT_ATTENTION_CLEARED:
4142946e82bSRobert Elliott 		dev_warn(&h->pdev->dev,
4152946e82bSRobert Elliott 			"%s: unit attention cleared by another initiator\n",
4162946e82bSRobert Elliott 			h->devname);
417edd16368SStephen M. Cameron 		break;
418edd16368SStephen M. Cameron 	default:
4192946e82bSRobert Elliott 		dev_warn(&h->pdev->dev,
4202946e82bSRobert Elliott 			"%s: unknown unit attention detected\n",
4212946e82bSRobert Elliott 			h->devname);
422edd16368SStephen M. Cameron 		break;
423edd16368SStephen M. Cameron 	}
424edd16368SStephen M. Cameron 	return 1;
425edd16368SStephen M. Cameron }
426edd16368SStephen M. Cameron 
427852af20aSMatt Bondurant static int check_for_busy(struct ctlr_info *h, struct CommandList *c)
428852af20aSMatt Bondurant {
429852af20aSMatt Bondurant 	if (c->err_info->CommandStatus != CMD_TARGET_STATUS ||
430852af20aSMatt Bondurant 		(c->err_info->ScsiStatus != SAM_STAT_BUSY &&
431852af20aSMatt Bondurant 		 c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL))
432852af20aSMatt Bondurant 		return 0;
433852af20aSMatt Bondurant 	dev_warn(&h->pdev->dev, HPSA "device busy");
434852af20aSMatt Bondurant 	return 1;
435852af20aSMatt Bondurant }
436852af20aSMatt Bondurant 
437e985c58fSStephen Cameron static u32 lockup_detected(struct ctlr_info *h);
438e985c58fSStephen Cameron static ssize_t host_show_lockup_detected(struct device *dev,
439e985c58fSStephen Cameron 		struct device_attribute *attr, char *buf)
440e985c58fSStephen Cameron {
441e985c58fSStephen Cameron 	int ld;
442e985c58fSStephen Cameron 	struct ctlr_info *h;
443e985c58fSStephen Cameron 	struct Scsi_Host *shost = class_to_shost(dev);
444e985c58fSStephen Cameron 
445e985c58fSStephen Cameron 	h = shost_to_hba(shost);
446e985c58fSStephen Cameron 	ld = lockup_detected(h);
447e985c58fSStephen Cameron 
448e985c58fSStephen Cameron 	return sprintf(buf, "ld=%d\n", ld);
449e985c58fSStephen Cameron }
450e985c58fSStephen Cameron 
451da0697bdSScott Teel static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev,
452da0697bdSScott Teel 					 struct device_attribute *attr,
453da0697bdSScott Teel 					 const char *buf, size_t count)
454da0697bdSScott Teel {
455da0697bdSScott Teel 	int status, len;
456da0697bdSScott Teel 	struct ctlr_info *h;
457da0697bdSScott Teel 	struct Scsi_Host *shost = class_to_shost(dev);
458da0697bdSScott Teel 	char tmpbuf[10];
459da0697bdSScott Teel 
460da0697bdSScott Teel 	if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
461da0697bdSScott Teel 		return -EACCES;
462da0697bdSScott Teel 	len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
463da0697bdSScott Teel 	strncpy(tmpbuf, buf, len);
464da0697bdSScott Teel 	tmpbuf[len] = '\0';
465da0697bdSScott Teel 	if (sscanf(tmpbuf, "%d", &status) != 1)
466da0697bdSScott Teel 		return -EINVAL;
467da0697bdSScott Teel 	h = shost_to_hba(shost);
468da0697bdSScott Teel 	h->acciopath_status = !!status;
469da0697bdSScott Teel 	dev_warn(&h->pdev->dev,
470da0697bdSScott Teel 		"hpsa: HP SSD Smart Path %s via sysfs update.\n",
471da0697bdSScott Teel 		h->acciopath_status ? "enabled" : "disabled");
472da0697bdSScott Teel 	return count;
473da0697bdSScott Teel }
474da0697bdSScott Teel 
4752ba8bfc8SStephen M. Cameron static ssize_t host_store_raid_offload_debug(struct device *dev,
4762ba8bfc8SStephen M. Cameron 					 struct device_attribute *attr,
4772ba8bfc8SStephen M. Cameron 					 const char *buf, size_t count)
4782ba8bfc8SStephen M. Cameron {
4792ba8bfc8SStephen M. Cameron 	int debug_level, len;
4802ba8bfc8SStephen M. Cameron 	struct ctlr_info *h;
4812ba8bfc8SStephen M. Cameron 	struct Scsi_Host *shost = class_to_shost(dev);
4822ba8bfc8SStephen M. Cameron 	char tmpbuf[10];
4832ba8bfc8SStephen M. Cameron 
4842ba8bfc8SStephen M. Cameron 	if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
4852ba8bfc8SStephen M. Cameron 		return -EACCES;
4862ba8bfc8SStephen M. Cameron 	len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
4872ba8bfc8SStephen M. Cameron 	strncpy(tmpbuf, buf, len);
4882ba8bfc8SStephen M. Cameron 	tmpbuf[len] = '\0';
4892ba8bfc8SStephen M. Cameron 	if (sscanf(tmpbuf, "%d", &debug_level) != 1)
4902ba8bfc8SStephen M. Cameron 		return -EINVAL;
4912ba8bfc8SStephen M. Cameron 	if (debug_level < 0)
4922ba8bfc8SStephen M. Cameron 		debug_level = 0;
4932ba8bfc8SStephen M. Cameron 	h = shost_to_hba(shost);
4942ba8bfc8SStephen M. Cameron 	h->raid_offload_debug = debug_level;
4952ba8bfc8SStephen M. Cameron 	dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n",
4962ba8bfc8SStephen M. Cameron 		h->raid_offload_debug);
4972ba8bfc8SStephen M. Cameron 	return count;
4982ba8bfc8SStephen M. Cameron }
4992ba8bfc8SStephen M. Cameron 
500edd16368SStephen M. Cameron static ssize_t host_store_rescan(struct device *dev,
501edd16368SStephen M. Cameron 				 struct device_attribute *attr,
502edd16368SStephen M. Cameron 				 const char *buf, size_t count)
503edd16368SStephen M. Cameron {
504edd16368SStephen M. Cameron 	struct ctlr_info *h;
505edd16368SStephen M. Cameron 	struct Scsi_Host *shost = class_to_shost(dev);
506a23513e8SStephen M. Cameron 	h = shost_to_hba(shost);
50731468401SMike Miller 	hpsa_scan_start(h->scsi_host);
508edd16368SStephen M. Cameron 	return count;
509edd16368SStephen M. Cameron }
510edd16368SStephen M. Cameron 
5113e16e83aSDon Brace static void hpsa_turn_off_ioaccel_for_device(struct hpsa_scsi_dev_t *device)
5123e16e83aSDon Brace {
5133e16e83aSDon Brace 	device->offload_enabled = 0;
5143e16e83aSDon Brace 	device->offload_to_be_enabled = 0;
5153e16e83aSDon Brace }
5163e16e83aSDon Brace 
517d28ce020SStephen M. Cameron static ssize_t host_show_firmware_revision(struct device *dev,
518d28ce020SStephen M. Cameron 	     struct device_attribute *attr, char *buf)
519d28ce020SStephen M. Cameron {
520d28ce020SStephen M. Cameron 	struct ctlr_info *h;
521d28ce020SStephen M. Cameron 	struct Scsi_Host *shost = class_to_shost(dev);
522d28ce020SStephen M. Cameron 	unsigned char *fwrev;
523d28ce020SStephen M. Cameron 
524d28ce020SStephen M. Cameron 	h = shost_to_hba(shost);
525d28ce020SStephen M. Cameron 	if (!h->hba_inquiry_data)
526d28ce020SStephen M. Cameron 		return 0;
527d28ce020SStephen M. Cameron 	fwrev = &h->hba_inquiry_data[32];
528d28ce020SStephen M. Cameron 	return snprintf(buf, 20, "%c%c%c%c\n",
529d28ce020SStephen M. Cameron 		fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
530d28ce020SStephen M. Cameron }
531d28ce020SStephen M. Cameron 
53294a13649SStephen M. Cameron static ssize_t host_show_commands_outstanding(struct device *dev,
53394a13649SStephen M. Cameron 	     struct device_attribute *attr, char *buf)
53494a13649SStephen M. Cameron {
53594a13649SStephen M. Cameron 	struct Scsi_Host *shost = class_to_shost(dev);
53694a13649SStephen M. Cameron 	struct ctlr_info *h = shost_to_hba(shost);
53794a13649SStephen M. Cameron 
5380cbf768eSStephen M. Cameron 	return snprintf(buf, 20, "%d\n",
5390cbf768eSStephen M. Cameron 			atomic_read(&h->commands_outstanding));
54094a13649SStephen M. Cameron }
54194a13649SStephen M. Cameron 
542745a7a25SStephen M. Cameron static ssize_t host_show_transport_mode(struct device *dev,
543745a7a25SStephen M. Cameron 	struct device_attribute *attr, char *buf)
544745a7a25SStephen M. Cameron {
545745a7a25SStephen M. Cameron 	struct ctlr_info *h;
546745a7a25SStephen M. Cameron 	struct Scsi_Host *shost = class_to_shost(dev);
547745a7a25SStephen M. Cameron 
548745a7a25SStephen M. Cameron 	h = shost_to_hba(shost);
549745a7a25SStephen M. Cameron 	return snprintf(buf, 20, "%s\n",
550960a30e7SStephen M. Cameron 		h->transMethod & CFGTBL_Trans_Performant ?
551745a7a25SStephen M. Cameron 			"performant" : "simple");
552745a7a25SStephen M. Cameron }
553745a7a25SStephen M. Cameron 
554da0697bdSScott Teel static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev,
555da0697bdSScott Teel 	struct device_attribute *attr, char *buf)
556da0697bdSScott Teel {
557da0697bdSScott Teel 	struct ctlr_info *h;
558da0697bdSScott Teel 	struct Scsi_Host *shost = class_to_shost(dev);
559da0697bdSScott Teel 
560da0697bdSScott Teel 	h = shost_to_hba(shost);
561da0697bdSScott Teel 	return snprintf(buf, 30, "HP SSD Smart Path %s\n",
562da0697bdSScott Teel 		(h->acciopath_status == 1) ?  "enabled" : "disabled");
563da0697bdSScott Teel }
564da0697bdSScott Teel 
56546380786SStephen M. Cameron /* List of controllers which cannot be hard reset on kexec with reset_devices */
566941b1cdaSStephen M. Cameron static u32 unresettable_controller[] = {
567941b1cdaSStephen M. Cameron 	0x324a103C, /* Smart Array P712m */
568941b1cdaSStephen M. Cameron 	0x324b103C, /* Smart Array P711m */
569941b1cdaSStephen M. Cameron 	0x3223103C, /* Smart Array P800 */
570941b1cdaSStephen M. Cameron 	0x3234103C, /* Smart Array P400 */
571941b1cdaSStephen M. Cameron 	0x3235103C, /* Smart Array P400i */
572941b1cdaSStephen M. Cameron 	0x3211103C, /* Smart Array E200i */
573941b1cdaSStephen M. Cameron 	0x3212103C, /* Smart Array E200 */
574941b1cdaSStephen M. Cameron 	0x3213103C, /* Smart Array E200i */
575941b1cdaSStephen M. Cameron 	0x3214103C, /* Smart Array E200i */
576941b1cdaSStephen M. Cameron 	0x3215103C, /* Smart Array E200i */
577941b1cdaSStephen M. Cameron 	0x3237103C, /* Smart Array E500 */
578941b1cdaSStephen M. Cameron 	0x323D103C, /* Smart Array P700m */
5797af0abbcSTomas Henzl 	0x40800E11, /* Smart Array 5i */
580941b1cdaSStephen M. Cameron 	0x409C0E11, /* Smart Array 6400 */
581941b1cdaSStephen M. Cameron 	0x409D0E11, /* Smart Array 6400 EM */
5825a4f934eSTomas Henzl 	0x40700E11, /* Smart Array 5300 */
5835a4f934eSTomas Henzl 	0x40820E11, /* Smart Array 532 */
5845a4f934eSTomas Henzl 	0x40830E11, /* Smart Array 5312 */
5855a4f934eSTomas Henzl 	0x409A0E11, /* Smart Array 641 */
5865a4f934eSTomas Henzl 	0x409B0E11, /* Smart Array 642 */
5875a4f934eSTomas Henzl 	0x40910E11, /* Smart Array 6i */
588941b1cdaSStephen M. Cameron };
589941b1cdaSStephen M. Cameron 
59046380786SStephen M. Cameron /* List of controllers which cannot even be soft reset */
59146380786SStephen M. Cameron static u32 soft_unresettable_controller[] = {
5927af0abbcSTomas Henzl 	0x40800E11, /* Smart Array 5i */
5935a4f934eSTomas Henzl 	0x40700E11, /* Smart Array 5300 */
5945a4f934eSTomas Henzl 	0x40820E11, /* Smart Array 532 */
5955a4f934eSTomas Henzl 	0x40830E11, /* Smart Array 5312 */
5965a4f934eSTomas Henzl 	0x409A0E11, /* Smart Array 641 */
5975a4f934eSTomas Henzl 	0x409B0E11, /* Smart Array 642 */
5985a4f934eSTomas Henzl 	0x40910E11, /* Smart Array 6i */
59946380786SStephen M. Cameron 	/* Exclude 640x boards.  These are two pci devices in one slot
60046380786SStephen M. Cameron 	 * which share a battery backed cache module.  One controls the
60146380786SStephen M. Cameron 	 * cache, the other accesses the cache through the one that controls
60246380786SStephen M. Cameron 	 * it.  If we reset the one controlling the cache, the other will
60346380786SStephen M. Cameron 	 * likely not be happy.  Just forbid resetting this conjoined mess.
60446380786SStephen M. Cameron 	 * The 640x isn't really supported by hpsa anyway.
60546380786SStephen M. Cameron 	 */
60646380786SStephen M. Cameron 	0x409C0E11, /* Smart Array 6400 */
60746380786SStephen M. Cameron 	0x409D0E11, /* Smart Array 6400 EM */
60846380786SStephen M. Cameron };
60946380786SStephen M. Cameron 
6109b5c48c2SStephen Cameron static int board_id_in_array(u32 a[], int nelems, u32 board_id)
611941b1cdaSStephen M. Cameron {
612941b1cdaSStephen M. Cameron 	int i;
613941b1cdaSStephen M. Cameron 
6149b5c48c2SStephen Cameron 	for (i = 0; i < nelems; i++)
6159b5c48c2SStephen Cameron 		if (a[i] == board_id)
616941b1cdaSStephen M. Cameron 			return 1;
6179b5c48c2SStephen Cameron 	return 0;
6189b5c48c2SStephen Cameron }
6199b5c48c2SStephen Cameron 
6209b5c48c2SStephen Cameron static int ctlr_is_hard_resettable(u32 board_id)
6219b5c48c2SStephen Cameron {
6229b5c48c2SStephen Cameron 	return !board_id_in_array(unresettable_controller,
6239b5c48c2SStephen Cameron 			ARRAY_SIZE(unresettable_controller), board_id);
624941b1cdaSStephen M. Cameron }
625941b1cdaSStephen M. Cameron 
62646380786SStephen M. Cameron static int ctlr_is_soft_resettable(u32 board_id)
62746380786SStephen M. Cameron {
6289b5c48c2SStephen Cameron 	return !board_id_in_array(soft_unresettable_controller,
6299b5c48c2SStephen Cameron 			ARRAY_SIZE(soft_unresettable_controller), board_id);
63046380786SStephen M. Cameron }
63146380786SStephen M. Cameron 
63246380786SStephen M. Cameron static int ctlr_is_resettable(u32 board_id)
63346380786SStephen M. Cameron {
63446380786SStephen M. Cameron 	return ctlr_is_hard_resettable(board_id) ||
63546380786SStephen M. Cameron 		ctlr_is_soft_resettable(board_id);
63646380786SStephen M. Cameron }
63746380786SStephen M. Cameron 
638941b1cdaSStephen M. Cameron static ssize_t host_show_resettable(struct device *dev,
639941b1cdaSStephen M. Cameron 	struct device_attribute *attr, char *buf)
640941b1cdaSStephen M. Cameron {
641941b1cdaSStephen M. Cameron 	struct ctlr_info *h;
642941b1cdaSStephen M. Cameron 	struct Scsi_Host *shost = class_to_shost(dev);
643941b1cdaSStephen M. Cameron 
644941b1cdaSStephen M. Cameron 	h = shost_to_hba(shost);
64546380786SStephen M. Cameron 	return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
646941b1cdaSStephen M. Cameron }
647941b1cdaSStephen M. Cameron 
648edd16368SStephen M. Cameron static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
649edd16368SStephen M. Cameron {
650edd16368SStephen M. Cameron 	return (scsi3addr[3] & 0xC0) == 0x40;
651edd16368SStephen M. Cameron }
652edd16368SStephen M. Cameron 
653f2ef0ce7SRobert Elliott static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6",
6547c59a0d4SDon Brace 	"1(+0)ADM", "UNKNOWN", "PHYS DRV"
655edd16368SStephen M. Cameron };
6566b80b18fSScott Teel #define HPSA_RAID_0	0
6576b80b18fSScott Teel #define HPSA_RAID_4	1
6586b80b18fSScott Teel #define HPSA_RAID_1	2	/* also used for RAID 10 */
6596b80b18fSScott Teel #define HPSA_RAID_5	3	/* also used for RAID 50 */
6606b80b18fSScott Teel #define HPSA_RAID_51	4
6616b80b18fSScott Teel #define HPSA_RAID_6	5	/* also used for RAID 60 */
6626b80b18fSScott Teel #define HPSA_RAID_ADM	6	/* also used for RAID 1+0 ADM */
6637c59a0d4SDon Brace #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 2)
6647c59a0d4SDon Brace #define PHYSICAL_DRIVE (ARRAY_SIZE(raid_label) - 1)
665edd16368SStephen M. Cameron 
666f3f01730SKevin Barnett static inline bool is_logical_device(struct hpsa_scsi_dev_t *device)
667f3f01730SKevin Barnett {
668f3f01730SKevin Barnett 	return !device->physical_device;
669f3f01730SKevin Barnett }
670edd16368SStephen M. Cameron 
671edd16368SStephen M. Cameron static ssize_t raid_level_show(struct device *dev,
672edd16368SStephen M. Cameron 	     struct device_attribute *attr, char *buf)
673edd16368SStephen M. Cameron {
674edd16368SStephen M. Cameron 	ssize_t l = 0;
67582a72c0aSStephen M. Cameron 	unsigned char rlevel;
676edd16368SStephen M. Cameron 	struct ctlr_info *h;
677edd16368SStephen M. Cameron 	struct scsi_device *sdev;
678edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *hdev;
679edd16368SStephen M. Cameron 	unsigned long flags;
680edd16368SStephen M. Cameron 
681edd16368SStephen M. Cameron 	sdev = to_scsi_device(dev);
682edd16368SStephen M. Cameron 	h = sdev_to_hba(sdev);
683edd16368SStephen M. Cameron 	spin_lock_irqsave(&h->lock, flags);
684edd16368SStephen M. Cameron 	hdev = sdev->hostdata;
685edd16368SStephen M. Cameron 	if (!hdev) {
686edd16368SStephen M. Cameron 		spin_unlock_irqrestore(&h->lock, flags);
687edd16368SStephen M. Cameron 		return -ENODEV;
688edd16368SStephen M. Cameron 	}
689edd16368SStephen M. Cameron 
690edd16368SStephen M. Cameron 	/* Is this even a logical drive? */
691f3f01730SKevin Barnett 	if (!is_logical_device(hdev)) {
692edd16368SStephen M. Cameron 		spin_unlock_irqrestore(&h->lock, flags);
693edd16368SStephen M. Cameron 		l = snprintf(buf, PAGE_SIZE, "N/A\n");
694edd16368SStephen M. Cameron 		return l;
695edd16368SStephen M. Cameron 	}
696edd16368SStephen M. Cameron 
697edd16368SStephen M. Cameron 	rlevel = hdev->raid_level;
698edd16368SStephen M. Cameron 	spin_unlock_irqrestore(&h->lock, flags);
69982a72c0aSStephen M. Cameron 	if (rlevel > RAID_UNKNOWN)
700edd16368SStephen M. Cameron 		rlevel = RAID_UNKNOWN;
701edd16368SStephen M. Cameron 	l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
702edd16368SStephen M. Cameron 	return l;
703edd16368SStephen M. Cameron }
704edd16368SStephen M. Cameron 
705edd16368SStephen M. Cameron static ssize_t lunid_show(struct device *dev,
706edd16368SStephen M. Cameron 	     struct device_attribute *attr, char *buf)
707edd16368SStephen M. Cameron {
708edd16368SStephen M. Cameron 	struct ctlr_info *h;
709edd16368SStephen M. Cameron 	struct scsi_device *sdev;
710edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *hdev;
711edd16368SStephen M. Cameron 	unsigned long flags;
712edd16368SStephen M. Cameron 	unsigned char lunid[8];
713edd16368SStephen M. Cameron 
714edd16368SStephen M. Cameron 	sdev = to_scsi_device(dev);
715edd16368SStephen M. Cameron 	h = sdev_to_hba(sdev);
716edd16368SStephen M. Cameron 	spin_lock_irqsave(&h->lock, flags);
717edd16368SStephen M. Cameron 	hdev = sdev->hostdata;
718edd16368SStephen M. Cameron 	if (!hdev) {
719edd16368SStephen M. Cameron 		spin_unlock_irqrestore(&h->lock, flags);
720edd16368SStephen M. Cameron 		return -ENODEV;
721edd16368SStephen M. Cameron 	}
722edd16368SStephen M. Cameron 	memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
723edd16368SStephen M. Cameron 	spin_unlock_irqrestore(&h->lock, flags);
724609a70dfSRasmus Villemoes 	return snprintf(buf, 20, "0x%8phN\n", lunid);
725edd16368SStephen M. Cameron }
726edd16368SStephen M. Cameron 
727edd16368SStephen M. Cameron static ssize_t unique_id_show(struct device *dev,
728edd16368SStephen M. Cameron 	     struct device_attribute *attr, char *buf)
729edd16368SStephen M. Cameron {
730edd16368SStephen M. Cameron 	struct ctlr_info *h;
731edd16368SStephen M. Cameron 	struct scsi_device *sdev;
732edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *hdev;
733edd16368SStephen M. Cameron 	unsigned long flags;
734edd16368SStephen M. Cameron 	unsigned char sn[16];
735edd16368SStephen M. Cameron 
736edd16368SStephen M. Cameron 	sdev = to_scsi_device(dev);
737edd16368SStephen M. Cameron 	h = sdev_to_hba(sdev);
738edd16368SStephen M. Cameron 	spin_lock_irqsave(&h->lock, flags);
739edd16368SStephen M. Cameron 	hdev = sdev->hostdata;
740edd16368SStephen M. Cameron 	if (!hdev) {
741edd16368SStephen M. Cameron 		spin_unlock_irqrestore(&h->lock, flags);
742edd16368SStephen M. Cameron 		return -ENODEV;
743edd16368SStephen M. Cameron 	}
744edd16368SStephen M. Cameron 	memcpy(sn, hdev->device_id, sizeof(sn));
745edd16368SStephen M. Cameron 	spin_unlock_irqrestore(&h->lock, flags);
746edd16368SStephen M. Cameron 	return snprintf(buf, 16 * 2 + 2,
747edd16368SStephen M. Cameron 			"%02X%02X%02X%02X%02X%02X%02X%02X"
748edd16368SStephen M. Cameron 			"%02X%02X%02X%02X%02X%02X%02X%02X\n",
749edd16368SStephen M. Cameron 			sn[0], sn[1], sn[2], sn[3],
750edd16368SStephen M. Cameron 			sn[4], sn[5], sn[6], sn[7],
751edd16368SStephen M. Cameron 			sn[8], sn[9], sn[10], sn[11],
752edd16368SStephen M. Cameron 			sn[12], sn[13], sn[14], sn[15]);
753edd16368SStephen M. Cameron }
754edd16368SStephen M. Cameron 
755ded1be4aSJoseph T Handzik static ssize_t sas_address_show(struct device *dev,
756ded1be4aSJoseph T Handzik 	      struct device_attribute *attr, char *buf)
757ded1be4aSJoseph T Handzik {
758ded1be4aSJoseph T Handzik 	struct ctlr_info *h;
759ded1be4aSJoseph T Handzik 	struct scsi_device *sdev;
760ded1be4aSJoseph T Handzik 	struct hpsa_scsi_dev_t *hdev;
761ded1be4aSJoseph T Handzik 	unsigned long flags;
762ded1be4aSJoseph T Handzik 	u64 sas_address;
763ded1be4aSJoseph T Handzik 
764ded1be4aSJoseph T Handzik 	sdev = to_scsi_device(dev);
765ded1be4aSJoseph T Handzik 	h = sdev_to_hba(sdev);
766ded1be4aSJoseph T Handzik 	spin_lock_irqsave(&h->lock, flags);
767ded1be4aSJoseph T Handzik 	hdev = sdev->hostdata;
768ded1be4aSJoseph T Handzik 	if (!hdev || is_logical_device(hdev) || !hdev->expose_device) {
769ded1be4aSJoseph T Handzik 		spin_unlock_irqrestore(&h->lock, flags);
770ded1be4aSJoseph T Handzik 		return -ENODEV;
771ded1be4aSJoseph T Handzik 	}
772ded1be4aSJoseph T Handzik 	sas_address = hdev->sas_address;
773ded1be4aSJoseph T Handzik 	spin_unlock_irqrestore(&h->lock, flags);
774ded1be4aSJoseph T Handzik 
775ded1be4aSJoseph T Handzik 	return snprintf(buf, PAGE_SIZE, "0x%016llx\n", sas_address);
776ded1be4aSJoseph T Handzik }
777ded1be4aSJoseph T Handzik 
778c1988684SScott Teel static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev,
779c1988684SScott Teel 	     struct device_attribute *attr, char *buf)
780c1988684SScott Teel {
781c1988684SScott Teel 	struct ctlr_info *h;
782c1988684SScott Teel 	struct scsi_device *sdev;
783c1988684SScott Teel 	struct hpsa_scsi_dev_t *hdev;
784c1988684SScott Teel 	unsigned long flags;
785c1988684SScott Teel 	int offload_enabled;
786c1988684SScott Teel 
787c1988684SScott Teel 	sdev = to_scsi_device(dev);
788c1988684SScott Teel 	h = sdev_to_hba(sdev);
789c1988684SScott Teel 	spin_lock_irqsave(&h->lock, flags);
790c1988684SScott Teel 	hdev = sdev->hostdata;
791c1988684SScott Teel 	if (!hdev) {
792c1988684SScott Teel 		spin_unlock_irqrestore(&h->lock, flags);
793c1988684SScott Teel 		return -ENODEV;
794c1988684SScott Teel 	}
795c1988684SScott Teel 	offload_enabled = hdev->offload_enabled;
796c1988684SScott Teel 	spin_unlock_irqrestore(&h->lock, flags);
797b2582a65SDon Brace 
798b2582a65SDon Brace 	if (hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC)
799c1988684SScott Teel 		return snprintf(buf, 20, "%d\n", offload_enabled);
800b2582a65SDon Brace 	else
801b2582a65SDon Brace 		return snprintf(buf, 40, "%s\n",
802b2582a65SDon Brace 				"Not applicable for a controller");
803c1988684SScott Teel }
804c1988684SScott Teel 
8058270b862SJoe Handzik #define MAX_PATHS 8
8068270b862SJoe Handzik static ssize_t path_info_show(struct device *dev,
8078270b862SJoe Handzik 	     struct device_attribute *attr, char *buf)
8088270b862SJoe Handzik {
8098270b862SJoe Handzik 	struct ctlr_info *h;
8108270b862SJoe Handzik 	struct scsi_device *sdev;
8118270b862SJoe Handzik 	struct hpsa_scsi_dev_t *hdev;
8128270b862SJoe Handzik 	unsigned long flags;
8138270b862SJoe Handzik 	int i;
8148270b862SJoe Handzik 	int output_len = 0;
8158270b862SJoe Handzik 	u8 box;
8168270b862SJoe Handzik 	u8 bay;
8178270b862SJoe Handzik 	u8 path_map_index = 0;
8188270b862SJoe Handzik 	char *active;
8198270b862SJoe Handzik 	unsigned char phys_connector[2];
8208270b862SJoe Handzik 
8218270b862SJoe Handzik 	sdev = to_scsi_device(dev);
8228270b862SJoe Handzik 	h = sdev_to_hba(sdev);
8238270b862SJoe Handzik 	spin_lock_irqsave(&h->devlock, flags);
8248270b862SJoe Handzik 	hdev = sdev->hostdata;
8258270b862SJoe Handzik 	if (!hdev) {
8268270b862SJoe Handzik 		spin_unlock_irqrestore(&h->devlock, flags);
8278270b862SJoe Handzik 		return -ENODEV;
8288270b862SJoe Handzik 	}
8298270b862SJoe Handzik 
8308270b862SJoe Handzik 	bay = hdev->bay;
8318270b862SJoe Handzik 	for (i = 0; i < MAX_PATHS; i++) {
8328270b862SJoe Handzik 		path_map_index = 1<<i;
8338270b862SJoe Handzik 		if (i == hdev->active_path_index)
8348270b862SJoe Handzik 			active = "Active";
8358270b862SJoe Handzik 		else if (hdev->path_map & path_map_index)
8368270b862SJoe Handzik 			active = "Inactive";
8378270b862SJoe Handzik 		else
8388270b862SJoe Handzik 			continue;
8398270b862SJoe Handzik 
8401faf072cSRasmus Villemoes 		output_len += scnprintf(buf + output_len,
8411faf072cSRasmus Villemoes 				PAGE_SIZE - output_len,
8421faf072cSRasmus Villemoes 				"[%d:%d:%d:%d] %20.20s ",
8438270b862SJoe Handzik 				h->scsi_host->host_no,
8448270b862SJoe Handzik 				hdev->bus, hdev->target, hdev->lun,
8458270b862SJoe Handzik 				scsi_device_type(hdev->devtype));
8468270b862SJoe Handzik 
847cca8f13bSDon Brace 		if (hdev->devtype == TYPE_RAID || is_logical_device(hdev)) {
8482708f295SDon Brace 			output_len += scnprintf(buf + output_len,
8491faf072cSRasmus Villemoes 						PAGE_SIZE - output_len,
8501faf072cSRasmus Villemoes 						"%s\n", active);
8518270b862SJoe Handzik 			continue;
8528270b862SJoe Handzik 		}
8538270b862SJoe Handzik 
8548270b862SJoe Handzik 		box = hdev->box[i];
8558270b862SJoe Handzik 		memcpy(&phys_connector, &hdev->phys_connector[i],
8568270b862SJoe Handzik 			sizeof(phys_connector));
8578270b862SJoe Handzik 		if (phys_connector[0] < '0')
8588270b862SJoe Handzik 			phys_connector[0] = '0';
8598270b862SJoe Handzik 		if (phys_connector[1] < '0')
8608270b862SJoe Handzik 			phys_connector[1] = '0';
8612708f295SDon Brace 		output_len += scnprintf(buf + output_len,
8621faf072cSRasmus Villemoes 				PAGE_SIZE - output_len,
8638270b862SJoe Handzik 				"PORT: %.2s ",
8648270b862SJoe Handzik 				phys_connector);
865af15ed36SDon Brace 		if ((hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC) &&
866af15ed36SDon Brace 			hdev->expose_device) {
8678270b862SJoe Handzik 			if (box == 0 || box == 0xFF) {
8682708f295SDon Brace 				output_len += scnprintf(buf + output_len,
8691faf072cSRasmus Villemoes 					PAGE_SIZE - output_len,
8708270b862SJoe Handzik 					"BAY: %hhu %s\n",
8718270b862SJoe Handzik 					bay, active);
8728270b862SJoe Handzik 			} else {
8732708f295SDon Brace 				output_len += scnprintf(buf + output_len,
8741faf072cSRasmus Villemoes 					PAGE_SIZE - output_len,
8758270b862SJoe Handzik 					"BOX: %hhu BAY: %hhu %s\n",
8768270b862SJoe Handzik 					box, bay, active);
8778270b862SJoe Handzik 			}
8788270b862SJoe Handzik 		} else if (box != 0 && box != 0xFF) {
8792708f295SDon Brace 			output_len += scnprintf(buf + output_len,
8801faf072cSRasmus Villemoes 				PAGE_SIZE - output_len, "BOX: %hhu %s\n",
8818270b862SJoe Handzik 				box, active);
8828270b862SJoe Handzik 		} else
8832708f295SDon Brace 			output_len += scnprintf(buf + output_len,
8841faf072cSRasmus Villemoes 				PAGE_SIZE - output_len, "%s\n", active);
8858270b862SJoe Handzik 	}
8868270b862SJoe Handzik 
8878270b862SJoe Handzik 	spin_unlock_irqrestore(&h->devlock, flags);
8881faf072cSRasmus Villemoes 	return output_len;
8898270b862SJoe Handzik }
8908270b862SJoe Handzik 
89116961204SHannes Reinecke static ssize_t host_show_ctlr_num(struct device *dev,
89216961204SHannes Reinecke 	struct device_attribute *attr, char *buf)
89316961204SHannes Reinecke {
89416961204SHannes Reinecke 	struct ctlr_info *h;
89516961204SHannes Reinecke 	struct Scsi_Host *shost = class_to_shost(dev);
89616961204SHannes Reinecke 
89716961204SHannes Reinecke 	h = shost_to_hba(shost);
89816961204SHannes Reinecke 	return snprintf(buf, 20, "%d\n", h->ctlr);
89916961204SHannes Reinecke }
90016961204SHannes Reinecke 
901135ae6edSHannes Reinecke static ssize_t host_show_legacy_board(struct device *dev,
902135ae6edSHannes Reinecke 	struct device_attribute *attr, char *buf)
903135ae6edSHannes Reinecke {
904135ae6edSHannes Reinecke 	struct ctlr_info *h;
905135ae6edSHannes Reinecke 	struct Scsi_Host *shost = class_to_shost(dev);
906135ae6edSHannes Reinecke 
907135ae6edSHannes Reinecke 	h = shost_to_hba(shost);
908135ae6edSHannes Reinecke 	return snprintf(buf, 20, "%d\n", h->legacy_board ? 1 : 0);
909135ae6edSHannes Reinecke }
910135ae6edSHannes Reinecke 
911c828a892SJoe Perches static DEVICE_ATTR_RO(raid_level);
912c828a892SJoe Perches static DEVICE_ATTR_RO(lunid);
913c828a892SJoe Perches static DEVICE_ATTR_RO(unique_id);
9143f5eac3aSStephen M. Cameron static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
915c828a892SJoe Perches static DEVICE_ATTR_RO(sas_address);
916c1988684SScott Teel static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO,
917c1988684SScott Teel 			host_show_hp_ssd_smart_path_enabled, NULL);
918c828a892SJoe Perches static DEVICE_ATTR_RO(path_info);
919da0697bdSScott Teel static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH,
920da0697bdSScott Teel 		host_show_hp_ssd_smart_path_status,
921da0697bdSScott Teel 		host_store_hp_ssd_smart_path_status);
9222ba8bfc8SStephen M. Cameron static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL,
9232ba8bfc8SStephen M. Cameron 			host_store_raid_offload_debug);
9243f5eac3aSStephen M. Cameron static DEVICE_ATTR(firmware_revision, S_IRUGO,
9253f5eac3aSStephen M. Cameron 	host_show_firmware_revision, NULL);
9263f5eac3aSStephen M. Cameron static DEVICE_ATTR(commands_outstanding, S_IRUGO,
9273f5eac3aSStephen M. Cameron 	host_show_commands_outstanding, NULL);
9283f5eac3aSStephen M. Cameron static DEVICE_ATTR(transport_mode, S_IRUGO,
9293f5eac3aSStephen M. Cameron 	host_show_transport_mode, NULL);
930941b1cdaSStephen M. Cameron static DEVICE_ATTR(resettable, S_IRUGO,
931941b1cdaSStephen M. Cameron 	host_show_resettable, NULL);
932e985c58fSStephen Cameron static DEVICE_ATTR(lockup_detected, S_IRUGO,
933e985c58fSStephen Cameron 	host_show_lockup_detected, NULL);
93416961204SHannes Reinecke static DEVICE_ATTR(ctlr_num, S_IRUGO,
93516961204SHannes Reinecke 	host_show_ctlr_num, NULL);
936135ae6edSHannes Reinecke static DEVICE_ATTR(legacy_board, S_IRUGO,
937135ae6edSHannes Reinecke 	host_show_legacy_board, NULL);
9383f5eac3aSStephen M. Cameron 
9393f5eac3aSStephen M. Cameron static struct device_attribute *hpsa_sdev_attrs[] = {
9403f5eac3aSStephen M. Cameron 	&dev_attr_raid_level,
9413f5eac3aSStephen M. Cameron 	&dev_attr_lunid,
9423f5eac3aSStephen M. Cameron 	&dev_attr_unique_id,
943c1988684SScott Teel 	&dev_attr_hp_ssd_smart_path_enabled,
9448270b862SJoe Handzik 	&dev_attr_path_info,
945ded1be4aSJoseph T Handzik 	&dev_attr_sas_address,
9463f5eac3aSStephen M. Cameron 	NULL,
9473f5eac3aSStephen M. Cameron };
9483f5eac3aSStephen M. Cameron 
9493f5eac3aSStephen M. Cameron static struct device_attribute *hpsa_shost_attrs[] = {
9503f5eac3aSStephen M. Cameron 	&dev_attr_rescan,
9513f5eac3aSStephen M. Cameron 	&dev_attr_firmware_revision,
9523f5eac3aSStephen M. Cameron 	&dev_attr_commands_outstanding,
9533f5eac3aSStephen M. Cameron 	&dev_attr_transport_mode,
954941b1cdaSStephen M. Cameron 	&dev_attr_resettable,
955da0697bdSScott Teel 	&dev_attr_hp_ssd_smart_path_status,
9562ba8bfc8SStephen M. Cameron 	&dev_attr_raid_offload_debug,
957fb53c439STomas Henzl 	&dev_attr_lockup_detected,
95816961204SHannes Reinecke 	&dev_attr_ctlr_num,
959135ae6edSHannes Reinecke 	&dev_attr_legacy_board,
9603f5eac3aSStephen M. Cameron 	NULL,
9613f5eac3aSStephen M. Cameron };
9623f5eac3aSStephen M. Cameron 
96308ec46f6SDon Brace #define HPSA_NRESERVED_CMDS	(HPSA_CMDS_RESERVED_FOR_DRIVER +\
96408ec46f6SDon Brace 				 HPSA_MAX_CONCURRENT_PASSTHRUS)
96541ce4c35SStephen Cameron 
9663f5eac3aSStephen M. Cameron static struct scsi_host_template hpsa_driver_template = {
9673f5eac3aSStephen M. Cameron 	.module			= THIS_MODULE,
968f79cfec6SStephen M. Cameron 	.name			= HPSA,
969f79cfec6SStephen M. Cameron 	.proc_name		= HPSA,
9703f5eac3aSStephen M. Cameron 	.queuecommand		= hpsa_scsi_queue_command,
9713f5eac3aSStephen M. Cameron 	.scan_start		= hpsa_scan_start,
9723f5eac3aSStephen M. Cameron 	.scan_finished		= hpsa_scan_finished,
9737c0a0229SDon Brace 	.change_queue_depth	= hpsa_change_queue_depth,
9743f5eac3aSStephen M. Cameron 	.this_id		= -1,
9753f5eac3aSStephen M. Cameron 	.eh_device_reset_handler = hpsa_eh_device_reset_handler,
9763f5eac3aSStephen M. Cameron 	.ioctl			= hpsa_ioctl,
9773f5eac3aSStephen M. Cameron 	.slave_alloc		= hpsa_slave_alloc,
97841ce4c35SStephen Cameron 	.slave_configure	= hpsa_slave_configure,
9793f5eac3aSStephen M. Cameron 	.slave_destroy		= hpsa_slave_destroy,
9803f5eac3aSStephen M. Cameron #ifdef CONFIG_COMPAT
9813f5eac3aSStephen M. Cameron 	.compat_ioctl		= hpsa_compat_ioctl,
9823f5eac3aSStephen M. Cameron #endif
9833f5eac3aSStephen M. Cameron 	.sdev_attrs = hpsa_sdev_attrs,
9843f5eac3aSStephen M. Cameron 	.shost_attrs = hpsa_shost_attrs,
985eb53a3eaSMartin Wilck 	.max_sectors = 2048,
98654b2b50cSMartin K. Petersen 	.no_write_same = 1,
9873f5eac3aSStephen M. Cameron };
9883f5eac3aSStephen M. Cameron 
989254f796bSMatt Gates static inline u32 next_command(struct ctlr_info *h, u8 q)
9903f5eac3aSStephen M. Cameron {
9913f5eac3aSStephen M. Cameron 	u32 a;
992072b0518SStephen M. Cameron 	struct reply_queue_buffer *rq = &h->reply_queue[q];
9933f5eac3aSStephen M. Cameron 
994e1f7de0cSMatt Gates 	if (h->transMethod & CFGTBL_Trans_io_accel1)
995e1f7de0cSMatt Gates 		return h->access.command_completed(h, q);
996e1f7de0cSMatt Gates 
9973f5eac3aSStephen M. Cameron 	if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
998254f796bSMatt Gates 		return h->access.command_completed(h, q);
9993f5eac3aSStephen M. Cameron 
1000254f796bSMatt Gates 	if ((rq->head[rq->current_entry] & 1) == rq->wraparound) {
1001254f796bSMatt Gates 		a = rq->head[rq->current_entry];
1002254f796bSMatt Gates 		rq->current_entry++;
10030cbf768eSStephen M. Cameron 		atomic_dec(&h->commands_outstanding);
10043f5eac3aSStephen M. Cameron 	} else {
10053f5eac3aSStephen M. Cameron 		a = FIFO_EMPTY;
10063f5eac3aSStephen M. Cameron 	}
10073f5eac3aSStephen M. Cameron 	/* Check for wraparound */
1008254f796bSMatt Gates 	if (rq->current_entry == h->max_commands) {
1009254f796bSMatt Gates 		rq->current_entry = 0;
1010254f796bSMatt Gates 		rq->wraparound ^= 1;
10113f5eac3aSStephen M. Cameron 	}
10123f5eac3aSStephen M. Cameron 	return a;
10133f5eac3aSStephen M. Cameron }
10143f5eac3aSStephen M. Cameron 
1015c349775eSScott Teel /*
1016c349775eSScott Teel  * There are some special bits in the bus address of the
1017c349775eSScott Teel  * command that we have to set for the controller to know
1018c349775eSScott Teel  * how to process the command:
1019c349775eSScott Teel  *
1020c349775eSScott Teel  * Normal performant mode:
1021c349775eSScott Teel  * bit 0: 1 means performant mode, 0 means simple mode.
1022c349775eSScott Teel  * bits 1-3 = block fetch table entry
1023c349775eSScott Teel  * bits 4-6 = command type (== 0)
1024c349775eSScott Teel  *
1025c349775eSScott Teel  * ioaccel1 mode:
1026c349775eSScott Teel  * bit 0 = "performant mode" bit.
1027c349775eSScott Teel  * bits 1-3 = block fetch table entry
1028c349775eSScott Teel  * bits 4-6 = command type (== 110)
1029c349775eSScott Teel  * (command type is needed because ioaccel1 mode
1030c349775eSScott Teel  * commands are submitted through the same register as normal
1031c349775eSScott Teel  * mode commands, so this is how the controller knows whether
1032c349775eSScott Teel  * the command is normal mode or ioaccel1 mode.)
1033c349775eSScott Teel  *
1034c349775eSScott Teel  * ioaccel2 mode:
1035c349775eSScott Teel  * bit 0 = "performant mode" bit.
1036c349775eSScott Teel  * bits 1-4 = block fetch table entry (note extra bit)
1037c349775eSScott Teel  * bits 4-6 = not needed, because ioaccel2 mode has
1038c349775eSScott Teel  * a separate special register for submitting commands.
1039c349775eSScott Teel  */
1040c349775eSScott Teel 
104125163bd5SWebb Scales /*
104225163bd5SWebb Scales  * set_performant_mode: Modify the tag for cciss performant
10433f5eac3aSStephen M. Cameron  * set bit 0 for pull model, bits 3-1 for block fetch
10443f5eac3aSStephen M. Cameron  * register number
10453f5eac3aSStephen M. Cameron  */
104625163bd5SWebb Scales #define DEFAULT_REPLY_QUEUE (-1)
104725163bd5SWebb Scales static void set_performant_mode(struct ctlr_info *h, struct CommandList *c,
104825163bd5SWebb Scales 					int reply_queue)
10493f5eac3aSStephen M. Cameron {
1050254f796bSMatt Gates 	if (likely(h->transMethod & CFGTBL_Trans_Performant)) {
10513f5eac3aSStephen M. Cameron 		c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
1052bc2bb154SChristoph Hellwig 		if (unlikely(!h->msix_vectors))
105325163bd5SWebb Scales 			return;
10548b834bffSMing Lei 		c->Header.ReplyQueue = reply_queue;
1055254f796bSMatt Gates 	}
10563f5eac3aSStephen M. Cameron }
10573f5eac3aSStephen M. Cameron 
1058c349775eSScott Teel static void set_ioaccel1_performant_mode(struct ctlr_info *h,
105925163bd5SWebb Scales 						struct CommandList *c,
106025163bd5SWebb Scales 						int reply_queue)
1061c349775eSScott Teel {
1062c349775eSScott Teel 	struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
1063c349775eSScott Teel 
106425163bd5SWebb Scales 	/*
106525163bd5SWebb Scales 	 * Tell the controller to post the reply to the queue for this
1066c349775eSScott Teel 	 * processor.  This seems to give the best I/O throughput.
1067c349775eSScott Teel 	 */
10688b834bffSMing Lei 	cp->ReplyQueue = reply_queue;
106925163bd5SWebb Scales 	/*
107025163bd5SWebb Scales 	 * Set the bits in the address sent down to include:
1071c349775eSScott Teel 	 *  - performant mode bit (bit 0)
1072c349775eSScott Teel 	 *  - pull count (bits 1-3)
1073c349775eSScott Teel 	 *  - command type (bits 4-6)
1074c349775eSScott Teel 	 */
1075c349775eSScott Teel 	c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) |
1076c349775eSScott Teel 					IOACCEL1_BUSADDR_CMDTYPE;
1077c349775eSScott Teel }
1078c349775eSScott Teel 
10798be986ccSStephen Cameron static void set_ioaccel2_tmf_performant_mode(struct ctlr_info *h,
10808be986ccSStephen Cameron 						struct CommandList *c,
10818be986ccSStephen Cameron 						int reply_queue)
10828be986ccSStephen Cameron {
10838be986ccSStephen Cameron 	struct hpsa_tmf_struct *cp = (struct hpsa_tmf_struct *)
10848be986ccSStephen Cameron 		&h->ioaccel2_cmd_pool[c->cmdindex];
10858be986ccSStephen Cameron 
10868be986ccSStephen Cameron 	/* Tell the controller to post the reply to the queue for this
10878be986ccSStephen Cameron 	 * processor.  This seems to give the best I/O throughput.
10888be986ccSStephen Cameron 	 */
10898b834bffSMing Lei 	cp->reply_queue = reply_queue;
10908be986ccSStephen Cameron 	/* Set the bits in the address sent down to include:
10918be986ccSStephen Cameron 	 *  - performant mode bit not used in ioaccel mode 2
10928be986ccSStephen Cameron 	 *  - pull count (bits 0-3)
10938be986ccSStephen Cameron 	 *  - command type isn't needed for ioaccel2
10948be986ccSStephen Cameron 	 */
10958be986ccSStephen Cameron 	c->busaddr |= h->ioaccel2_blockFetchTable[0];
10968be986ccSStephen Cameron }
10978be986ccSStephen Cameron 
1098c349775eSScott Teel static void set_ioaccel2_performant_mode(struct ctlr_info *h,
109925163bd5SWebb Scales 						struct CommandList *c,
110025163bd5SWebb Scales 						int reply_queue)
1101c349775eSScott Teel {
1102c349775eSScott Teel 	struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
1103c349775eSScott Teel 
110425163bd5SWebb Scales 	/*
110525163bd5SWebb Scales 	 * Tell the controller to post the reply to the queue for this
1106c349775eSScott Teel 	 * processor.  This seems to give the best I/O throughput.
1107c349775eSScott Teel 	 */
11088b834bffSMing Lei 	cp->reply_queue = reply_queue;
110925163bd5SWebb Scales 	/*
111025163bd5SWebb Scales 	 * Set the bits in the address sent down to include:
1111c349775eSScott Teel 	 *  - performant mode bit not used in ioaccel mode 2
1112c349775eSScott Teel 	 *  - pull count (bits 0-3)
1113c349775eSScott Teel 	 *  - command type isn't needed for ioaccel2
1114c349775eSScott Teel 	 */
1115c349775eSScott Teel 	c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]);
1116c349775eSScott Teel }
1117c349775eSScott Teel 
1118e85c5974SStephen M. Cameron static int is_firmware_flash_cmd(u8 *cdb)
1119e85c5974SStephen M. Cameron {
1120e85c5974SStephen M. Cameron 	return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE;
1121e85c5974SStephen M. Cameron }
1122e85c5974SStephen M. Cameron 
1123e85c5974SStephen M. Cameron /*
1124e85c5974SStephen M. Cameron  * During firmware flash, the heartbeat register may not update as frequently
1125e85c5974SStephen M. Cameron  * as it should.  So we dial down lockup detection during firmware flash. and
1126e85c5974SStephen M. Cameron  * dial it back up when firmware flash completes.
1127e85c5974SStephen M. Cameron  */
1128e85c5974SStephen M. Cameron #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ)
1129e85c5974SStephen M. Cameron #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ)
11303d38f00cSScott Teel #define HPSA_EVENT_MONITOR_INTERVAL (15 * HZ)
1131e85c5974SStephen M. Cameron static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h,
1132e85c5974SStephen M. Cameron 		struct CommandList *c)
1133e85c5974SStephen M. Cameron {
1134e85c5974SStephen M. Cameron 	if (!is_firmware_flash_cmd(c->Request.CDB))
1135e85c5974SStephen M. Cameron 		return;
1136e85c5974SStephen M. Cameron 	atomic_inc(&h->firmware_flash_in_progress);
1137e85c5974SStephen M. Cameron 	h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH;
1138e85c5974SStephen M. Cameron }
1139e85c5974SStephen M. Cameron 
1140e85c5974SStephen M. Cameron static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h,
1141e85c5974SStephen M. Cameron 		struct CommandList *c)
1142e85c5974SStephen M. Cameron {
1143e85c5974SStephen M. Cameron 	if (is_firmware_flash_cmd(c->Request.CDB) &&
1144e85c5974SStephen M. Cameron 		atomic_dec_and_test(&h->firmware_flash_in_progress))
1145e85c5974SStephen M. Cameron 		h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
1146e85c5974SStephen M. Cameron }
1147e85c5974SStephen M. Cameron 
114825163bd5SWebb Scales static void __enqueue_cmd_and_start_io(struct ctlr_info *h,
114925163bd5SWebb Scales 	struct CommandList *c, int reply_queue)
11503f5eac3aSStephen M. Cameron {
1151c05e8866SStephen Cameron 	dial_down_lockup_detection_during_fw_flash(h, c);
1152c05e8866SStephen Cameron 	atomic_inc(&h->commands_outstanding);
1153f749d8b7SDon Brace 	/*
1154f749d8b7SDon Brace 	 * Check to see if the command is being retried.
1155f749d8b7SDon Brace 	 */
1156f749d8b7SDon Brace 	if (c->device && !c->retry_pending)
1157c5dfd106SDon Brace 		atomic_inc(&c->device->commands_outstanding);
11588b834bffSMing Lei 
11598b834bffSMing Lei 	reply_queue = h->reply_map[raw_smp_processor_id()];
1160c349775eSScott Teel 	switch (c->cmd_type) {
1161c349775eSScott Teel 	case CMD_IOACCEL1:
116225163bd5SWebb Scales 		set_ioaccel1_performant_mode(h, c, reply_queue);
1163c05e8866SStephen Cameron 		writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);
1164c349775eSScott Teel 		break;
1165c349775eSScott Teel 	case CMD_IOACCEL2:
116625163bd5SWebb Scales 		set_ioaccel2_performant_mode(h, c, reply_queue);
1167c05e8866SStephen Cameron 		writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
1168c349775eSScott Teel 		break;
11698be986ccSStephen Cameron 	case IOACCEL2_TMF:
11708be986ccSStephen Cameron 		set_ioaccel2_tmf_performant_mode(h, c, reply_queue);
11718be986ccSStephen Cameron 		writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
11728be986ccSStephen Cameron 		break;
1173c349775eSScott Teel 	default:
117425163bd5SWebb Scales 		set_performant_mode(h, c, reply_queue);
1175f2405db8SDon Brace 		h->access.submit_command(h, c);
11763f5eac3aSStephen M. Cameron 	}
1177c05e8866SStephen Cameron }
11783f5eac3aSStephen M. Cameron 
1179a58e7e53SWebb Scales static void enqueue_cmd_and_start_io(struct ctlr_info *h, struct CommandList *c)
118025163bd5SWebb Scales {
118125163bd5SWebb Scales 	__enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE);
118225163bd5SWebb Scales }
118325163bd5SWebb Scales 
11843f5eac3aSStephen M. Cameron static inline int is_hba_lunid(unsigned char scsi3addr[])
11853f5eac3aSStephen M. Cameron {
11863f5eac3aSStephen M. Cameron 	return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
11873f5eac3aSStephen M. Cameron }
11883f5eac3aSStephen M. Cameron 
11893f5eac3aSStephen M. Cameron static inline int is_scsi_rev_5(struct ctlr_info *h)
11903f5eac3aSStephen M. Cameron {
11913f5eac3aSStephen M. Cameron 	if (!h->hba_inquiry_data)
11923f5eac3aSStephen M. Cameron 		return 0;
11933f5eac3aSStephen M. Cameron 	if ((h->hba_inquiry_data[2] & 0x07) == 5)
11943f5eac3aSStephen M. Cameron 		return 1;
11953f5eac3aSStephen M. Cameron 	return 0;
11963f5eac3aSStephen M. Cameron }
11973f5eac3aSStephen M. Cameron 
1198edd16368SStephen M. Cameron static int hpsa_find_target_lun(struct ctlr_info *h,
1199edd16368SStephen M. Cameron 	unsigned char scsi3addr[], int bus, int *target, int *lun)
1200edd16368SStephen M. Cameron {
1201edd16368SStephen M. Cameron 	/* finds an unused bus, target, lun for a new physical device
1202edd16368SStephen M. Cameron 	 * assumes h->devlock is held
1203edd16368SStephen M. Cameron 	 */
1204edd16368SStephen M. Cameron 	int i, found = 0;
1205cfe5badcSScott Teel 	DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
1206edd16368SStephen M. Cameron 
1207263d9401SAkinobu Mita 	bitmap_zero(lun_taken, HPSA_MAX_DEVICES);
1208edd16368SStephen M. Cameron 
1209edd16368SStephen M. Cameron 	for (i = 0; i < h->ndevices; i++) {
1210edd16368SStephen M. Cameron 		if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
1211263d9401SAkinobu Mita 			__set_bit(h->dev[i]->target, lun_taken);
1212edd16368SStephen M. Cameron 	}
1213edd16368SStephen M. Cameron 
1214263d9401SAkinobu Mita 	i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES);
1215263d9401SAkinobu Mita 	if (i < HPSA_MAX_DEVICES) {
1216edd16368SStephen M. Cameron 		/* *bus = 1; */
1217edd16368SStephen M. Cameron 		*target = i;
1218edd16368SStephen M. Cameron 		*lun = 0;
1219edd16368SStephen M. Cameron 		found = 1;
1220edd16368SStephen M. Cameron 	}
1221edd16368SStephen M. Cameron 	return !found;
1222edd16368SStephen M. Cameron }
1223edd16368SStephen M. Cameron 
12241d33d85dSDon Brace static void hpsa_show_dev_msg(const char *level, struct ctlr_info *h,
12250d96ef5fSWebb Scales 	struct hpsa_scsi_dev_t *dev, char *description)
12260d96ef5fSWebb Scales {
12277c59a0d4SDon Brace #define LABEL_SIZE 25
12287c59a0d4SDon Brace 	char label[LABEL_SIZE];
12297c59a0d4SDon Brace 
12309975ec9dSDon Brace 	if (h == NULL || h->pdev == NULL || h->scsi_host == NULL)
12319975ec9dSDon Brace 		return;
12329975ec9dSDon Brace 
12337c59a0d4SDon Brace 	switch (dev->devtype) {
12347c59a0d4SDon Brace 	case TYPE_RAID:
12357c59a0d4SDon Brace 		snprintf(label, LABEL_SIZE, "controller");
12367c59a0d4SDon Brace 		break;
12377c59a0d4SDon Brace 	case TYPE_ENCLOSURE:
12387c59a0d4SDon Brace 		snprintf(label, LABEL_SIZE, "enclosure");
12397c59a0d4SDon Brace 		break;
12407c59a0d4SDon Brace 	case TYPE_DISK:
1241af15ed36SDon Brace 	case TYPE_ZBC:
12427c59a0d4SDon Brace 		if (dev->external)
12437c59a0d4SDon Brace 			snprintf(label, LABEL_SIZE, "external");
12447c59a0d4SDon Brace 		else if (!is_logical_dev_addr_mode(dev->scsi3addr))
12457c59a0d4SDon Brace 			snprintf(label, LABEL_SIZE, "%s",
12467c59a0d4SDon Brace 				raid_label[PHYSICAL_DRIVE]);
12477c59a0d4SDon Brace 		else
12487c59a0d4SDon Brace 			snprintf(label, LABEL_SIZE, "RAID-%s",
12497c59a0d4SDon Brace 				dev->raid_level > RAID_UNKNOWN ? "?" :
12507c59a0d4SDon Brace 				raid_label[dev->raid_level]);
12517c59a0d4SDon Brace 		break;
12527c59a0d4SDon Brace 	case TYPE_ROM:
12537c59a0d4SDon Brace 		snprintf(label, LABEL_SIZE, "rom");
12547c59a0d4SDon Brace 		break;
12557c59a0d4SDon Brace 	case TYPE_TAPE:
12567c59a0d4SDon Brace 		snprintf(label, LABEL_SIZE, "tape");
12577c59a0d4SDon Brace 		break;
12587c59a0d4SDon Brace 	case TYPE_MEDIUM_CHANGER:
12597c59a0d4SDon Brace 		snprintf(label, LABEL_SIZE, "changer");
12607c59a0d4SDon Brace 		break;
12617c59a0d4SDon Brace 	default:
12627c59a0d4SDon Brace 		snprintf(label, LABEL_SIZE, "UNKNOWN");
12637c59a0d4SDon Brace 		break;
12647c59a0d4SDon Brace 	}
12657c59a0d4SDon Brace 
12660d96ef5fSWebb Scales 	dev_printk(level, &h->pdev->dev,
12677c59a0d4SDon Brace 			"scsi %d:%d:%d:%d: %s %s %.8s %.16s %s SSDSmartPathCap%c En%c Exp=%d\n",
12680d96ef5fSWebb Scales 			h->scsi_host->host_no, dev->bus, dev->target, dev->lun,
12690d96ef5fSWebb Scales 			description,
12700d96ef5fSWebb Scales 			scsi_device_type(dev->devtype),
12710d96ef5fSWebb Scales 			dev->vendor,
12720d96ef5fSWebb Scales 			dev->model,
12737c59a0d4SDon Brace 			label,
12740d96ef5fSWebb Scales 			dev->offload_config ? '+' : '-',
1275b2582a65SDon Brace 			dev->offload_to_be_enabled ? '+' : '-',
12762a168208SKevin Barnett 			dev->expose_device);
12770d96ef5fSWebb Scales }
12780d96ef5fSWebb Scales 
1279edd16368SStephen M. Cameron /* Add an entry into h->dev[] array. */
12808aa60681SDon Brace static int hpsa_scsi_add_entry(struct ctlr_info *h,
1281edd16368SStephen M. Cameron 		struct hpsa_scsi_dev_t *device,
1282edd16368SStephen M. Cameron 		struct hpsa_scsi_dev_t *added[], int *nadded)
1283edd16368SStephen M. Cameron {
1284edd16368SStephen M. Cameron 	/* assumes h->devlock is held */
1285edd16368SStephen M. Cameron 	int n = h->ndevices;
1286edd16368SStephen M. Cameron 	int i;
1287edd16368SStephen M. Cameron 	unsigned char addr1[8], addr2[8];
1288edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *sd;
1289edd16368SStephen M. Cameron 
1290cfe5badcSScott Teel 	if (n >= HPSA_MAX_DEVICES) {
1291edd16368SStephen M. Cameron 		dev_err(&h->pdev->dev, "too many devices, some will be "
1292edd16368SStephen M. Cameron 			"inaccessible.\n");
1293edd16368SStephen M. Cameron 		return -1;
1294edd16368SStephen M. Cameron 	}
1295edd16368SStephen M. Cameron 
1296edd16368SStephen M. Cameron 	/* physical devices do not have lun or target assigned until now. */
1297edd16368SStephen M. Cameron 	if (device->lun != -1)
1298edd16368SStephen M. Cameron 		/* Logical device, lun is already assigned. */
1299edd16368SStephen M. Cameron 		goto lun_assigned;
1300edd16368SStephen M. Cameron 
1301edd16368SStephen M. Cameron 	/* If this device a non-zero lun of a multi-lun device
1302edd16368SStephen M. Cameron 	 * byte 4 of the 8-byte LUN addr will contain the logical
13032b08b3e9SDon Brace 	 * unit no, zero otherwise.
1304edd16368SStephen M. Cameron 	 */
1305edd16368SStephen M. Cameron 	if (device->scsi3addr[4] == 0) {
1306edd16368SStephen M. Cameron 		/* This is not a non-zero lun of a multi-lun device */
1307edd16368SStephen M. Cameron 		if (hpsa_find_target_lun(h, device->scsi3addr,
1308edd16368SStephen M. Cameron 			device->bus, &device->target, &device->lun) != 0)
1309edd16368SStephen M. Cameron 			return -1;
1310edd16368SStephen M. Cameron 		goto lun_assigned;
1311edd16368SStephen M. Cameron 	}
1312edd16368SStephen M. Cameron 
1313edd16368SStephen M. Cameron 	/* This is a non-zero lun of a multi-lun device.
1314edd16368SStephen M. Cameron 	 * Search through our list and find the device which
13159a4178b7Sshane.seymour 	 * has the same 8 byte LUN address, excepting byte 4 and 5.
1316edd16368SStephen M. Cameron 	 * Assign the same bus and target for this new LUN.
1317edd16368SStephen M. Cameron 	 * Use the logical unit number from the firmware.
1318edd16368SStephen M. Cameron 	 */
1319edd16368SStephen M. Cameron 	memcpy(addr1, device->scsi3addr, 8);
1320edd16368SStephen M. Cameron 	addr1[4] = 0;
13219a4178b7Sshane.seymour 	addr1[5] = 0;
1322edd16368SStephen M. Cameron 	for (i = 0; i < n; i++) {
1323edd16368SStephen M. Cameron 		sd = h->dev[i];
1324edd16368SStephen M. Cameron 		memcpy(addr2, sd->scsi3addr, 8);
1325edd16368SStephen M. Cameron 		addr2[4] = 0;
13269a4178b7Sshane.seymour 		addr2[5] = 0;
13279a4178b7Sshane.seymour 		/* differ only in byte 4 and 5? */
1328edd16368SStephen M. Cameron 		if (memcmp(addr1, addr2, 8) == 0) {
1329edd16368SStephen M. Cameron 			device->bus = sd->bus;
1330edd16368SStephen M. Cameron 			device->target = sd->target;
1331edd16368SStephen M. Cameron 			device->lun = device->scsi3addr[4];
1332edd16368SStephen M. Cameron 			break;
1333edd16368SStephen M. Cameron 		}
1334edd16368SStephen M. Cameron 	}
1335edd16368SStephen M. Cameron 	if (device->lun == -1) {
1336edd16368SStephen M. Cameron 		dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
1337edd16368SStephen M. Cameron 			" suspect firmware bug or unsupported hardware "
1338edd16368SStephen M. Cameron 			"configuration.\n");
1339edd16368SStephen M. Cameron 		return -1;
1340edd16368SStephen M. Cameron 	}
1341edd16368SStephen M. Cameron 
1342edd16368SStephen M. Cameron lun_assigned:
1343edd16368SStephen M. Cameron 
1344edd16368SStephen M. Cameron 	h->dev[n] = device;
1345edd16368SStephen M. Cameron 	h->ndevices++;
1346edd16368SStephen M. Cameron 	added[*nadded] = device;
1347edd16368SStephen M. Cameron 	(*nadded)++;
13480d96ef5fSWebb Scales 	hpsa_show_dev_msg(KERN_INFO, h, device,
13492a168208SKevin Barnett 		device->expose_device ? "added" : "masked");
1350edd16368SStephen M. Cameron 	return 0;
1351edd16368SStephen M. Cameron }
1352edd16368SStephen M. Cameron 
1353b2582a65SDon Brace /*
1354b2582a65SDon Brace  * Called during a scan operation.
1355b2582a65SDon Brace  *
1356b2582a65SDon Brace  * Update an entry in h->dev[] array.
1357b2582a65SDon Brace  */
13588aa60681SDon Brace static void hpsa_scsi_update_entry(struct ctlr_info *h,
1359bd9244f7SScott Teel 	int entry, struct hpsa_scsi_dev_t *new_entry)
1360bd9244f7SScott Teel {
1361bd9244f7SScott Teel 	/* assumes h->devlock is held */
1362bd9244f7SScott Teel 	BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1363bd9244f7SScott Teel 
1364bd9244f7SScott Teel 	/* Raid level changed. */
1365bd9244f7SScott Teel 	h->dev[entry]->raid_level = new_entry->raid_level;
1366250fb125SStephen M. Cameron 
1367b2582a65SDon Brace 	/*
1368b2582a65SDon Brace 	 * ioacccel_handle may have changed for a dual domain disk
1369b2582a65SDon Brace 	 */
1370b2582a65SDon Brace 	h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1371b2582a65SDon Brace 
137203383736SDon Brace 	/* Raid offload parameters changed.  Careful about the ordering. */
1373b2582a65SDon Brace 	if (new_entry->offload_config && new_entry->offload_to_be_enabled) {
137403383736SDon Brace 		/*
137503383736SDon Brace 		 * if drive is newly offload_enabled, we want to copy the
137603383736SDon Brace 		 * raid map data first.  If previously offload_enabled and
137703383736SDon Brace 		 * offload_config were set, raid map data had better be
1378b2582a65SDon Brace 		 * the same as it was before. If raid map data has changed
137903383736SDon Brace 		 * then it had better be the case that
138003383736SDon Brace 		 * h->dev[entry]->offload_enabled is currently 0.
138103383736SDon Brace 		 */
13829fb0de2dSStephen M. Cameron 		h->dev[entry]->raid_map = new_entry->raid_map;
138303383736SDon Brace 		h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
138403383736SDon Brace 	}
1385b2582a65SDon Brace 	if (new_entry->offload_to_be_enabled) {
1386a3144e0bSJoe Handzik 		h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1387a3144e0bSJoe Handzik 		wmb(); /* set ioaccel_handle *before* hba_ioaccel_enabled */
1388a3144e0bSJoe Handzik 	}
1389a3144e0bSJoe Handzik 	h->dev[entry]->hba_ioaccel_enabled = new_entry->hba_ioaccel_enabled;
139003383736SDon Brace 	h->dev[entry]->offload_config = new_entry->offload_config;
139103383736SDon Brace 	h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror;
139203383736SDon Brace 	h->dev[entry]->queue_depth = new_entry->queue_depth;
1393250fb125SStephen M. Cameron 
139441ce4c35SStephen Cameron 	/*
139541ce4c35SStephen Cameron 	 * We can turn off ioaccel offload now, but need to delay turning
1396b2582a65SDon Brace 	 * ioaccel on until we can update h->dev[entry]->phys_disk[], but we
139741ce4c35SStephen Cameron 	 * can't do that until all the devices are updated.
139841ce4c35SStephen Cameron 	 */
1399b2582a65SDon Brace 	h->dev[entry]->offload_to_be_enabled = new_entry->offload_to_be_enabled;
1400b2582a65SDon Brace 
1401b2582a65SDon Brace 	/*
1402b2582a65SDon Brace 	 * turn ioaccel off immediately if told to do so.
1403b2582a65SDon Brace 	 */
1404b2582a65SDon Brace 	if (!new_entry->offload_to_be_enabled)
140541ce4c35SStephen Cameron 		h->dev[entry]->offload_enabled = 0;
140641ce4c35SStephen Cameron 
14070d96ef5fSWebb Scales 	hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated");
1408bd9244f7SScott Teel }
1409bd9244f7SScott Teel 
14102a8ccf31SStephen M. Cameron /* Replace an entry from h->dev[] array. */
14118aa60681SDon Brace static void hpsa_scsi_replace_entry(struct ctlr_info *h,
14122a8ccf31SStephen M. Cameron 	int entry, struct hpsa_scsi_dev_t *new_entry,
14132a8ccf31SStephen M. Cameron 	struct hpsa_scsi_dev_t *added[], int *nadded,
14142a8ccf31SStephen M. Cameron 	struct hpsa_scsi_dev_t *removed[], int *nremoved)
14152a8ccf31SStephen M. Cameron {
14162a8ccf31SStephen M. Cameron 	/* assumes h->devlock is held */
1417cfe5badcSScott Teel 	BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
14182a8ccf31SStephen M. Cameron 	removed[*nremoved] = h->dev[entry];
14192a8ccf31SStephen M. Cameron 	(*nremoved)++;
142001350d05SStephen M. Cameron 
142101350d05SStephen M. Cameron 	/*
142201350d05SStephen M. Cameron 	 * New physical devices won't have target/lun assigned yet
142301350d05SStephen M. Cameron 	 * so we need to preserve the values in the slot we are replacing.
142401350d05SStephen M. Cameron 	 */
142501350d05SStephen M. Cameron 	if (new_entry->target == -1) {
142601350d05SStephen M. Cameron 		new_entry->target = h->dev[entry]->target;
142701350d05SStephen M. Cameron 		new_entry->lun = h->dev[entry]->lun;
142801350d05SStephen M. Cameron 	}
142901350d05SStephen M. Cameron 
14302a8ccf31SStephen M. Cameron 	h->dev[entry] = new_entry;
14312a8ccf31SStephen M. Cameron 	added[*nadded] = new_entry;
14322a8ccf31SStephen M. Cameron 	(*nadded)++;
1433b2582a65SDon Brace 
14340d96ef5fSWebb Scales 	hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced");
14352a8ccf31SStephen M. Cameron }
14362a8ccf31SStephen M. Cameron 
1437edd16368SStephen M. Cameron /* Remove an entry from h->dev[] array. */
14388aa60681SDon Brace static void hpsa_scsi_remove_entry(struct ctlr_info *h, int entry,
1439edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *removed[], int *nremoved)
1440edd16368SStephen M. Cameron {
1441edd16368SStephen M. Cameron 	/* assumes h->devlock is held */
1442edd16368SStephen M. Cameron 	int i;
1443edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *sd;
1444edd16368SStephen M. Cameron 
1445cfe5badcSScott Teel 	BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1446edd16368SStephen M. Cameron 
1447edd16368SStephen M. Cameron 	sd = h->dev[entry];
1448edd16368SStephen M. Cameron 	removed[*nremoved] = h->dev[entry];
1449edd16368SStephen M. Cameron 	(*nremoved)++;
1450edd16368SStephen M. Cameron 
1451edd16368SStephen M. Cameron 	for (i = entry; i < h->ndevices-1; i++)
1452edd16368SStephen M. Cameron 		h->dev[i] = h->dev[i+1];
1453edd16368SStephen M. Cameron 	h->ndevices--;
14540d96ef5fSWebb Scales 	hpsa_show_dev_msg(KERN_INFO, h, sd, "removed");
1455edd16368SStephen M. Cameron }
1456edd16368SStephen M. Cameron 
1457edd16368SStephen M. Cameron #define SCSI3ADDR_EQ(a, b) ( \
1458edd16368SStephen M. Cameron 	(a)[7] == (b)[7] && \
1459edd16368SStephen M. Cameron 	(a)[6] == (b)[6] && \
1460edd16368SStephen M. Cameron 	(a)[5] == (b)[5] && \
1461edd16368SStephen M. Cameron 	(a)[4] == (b)[4] && \
1462edd16368SStephen M. Cameron 	(a)[3] == (b)[3] && \
1463edd16368SStephen M. Cameron 	(a)[2] == (b)[2] && \
1464edd16368SStephen M. Cameron 	(a)[1] == (b)[1] && \
1465edd16368SStephen M. Cameron 	(a)[0] == (b)[0])
1466edd16368SStephen M. Cameron 
1467edd16368SStephen M. Cameron static void fixup_botched_add(struct ctlr_info *h,
1468edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *added)
1469edd16368SStephen M. Cameron {
1470edd16368SStephen M. Cameron 	/* called when scsi_add_device fails in order to re-adjust
1471edd16368SStephen M. Cameron 	 * h->dev[] to match the mid layer's view.
1472edd16368SStephen M. Cameron 	 */
1473edd16368SStephen M. Cameron 	unsigned long flags;
1474edd16368SStephen M. Cameron 	int i, j;
1475edd16368SStephen M. Cameron 
1476edd16368SStephen M. Cameron 	spin_lock_irqsave(&h->lock, flags);
1477edd16368SStephen M. Cameron 	for (i = 0; i < h->ndevices; i++) {
1478edd16368SStephen M. Cameron 		if (h->dev[i] == added) {
1479edd16368SStephen M. Cameron 			for (j = i; j < h->ndevices-1; j++)
1480edd16368SStephen M. Cameron 				h->dev[j] = h->dev[j+1];
1481edd16368SStephen M. Cameron 			h->ndevices--;
1482edd16368SStephen M. Cameron 			break;
1483edd16368SStephen M. Cameron 		}
1484edd16368SStephen M. Cameron 	}
1485edd16368SStephen M. Cameron 	spin_unlock_irqrestore(&h->lock, flags);
1486edd16368SStephen M. Cameron 	kfree(added);
1487edd16368SStephen M. Cameron }
1488edd16368SStephen M. Cameron 
1489edd16368SStephen M. Cameron static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
1490edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *dev2)
1491edd16368SStephen M. Cameron {
1492edd16368SStephen M. Cameron 	/* we compare everything except lun and target as these
1493edd16368SStephen M. Cameron 	 * are not yet assigned.  Compare parts likely
1494edd16368SStephen M. Cameron 	 * to differ first
1495edd16368SStephen M. Cameron 	 */
1496edd16368SStephen M. Cameron 	if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
1497edd16368SStephen M. Cameron 		sizeof(dev1->scsi3addr)) != 0)
1498edd16368SStephen M. Cameron 		return 0;
1499edd16368SStephen M. Cameron 	if (memcmp(dev1->device_id, dev2->device_id,
1500edd16368SStephen M. Cameron 		sizeof(dev1->device_id)) != 0)
1501edd16368SStephen M. Cameron 		return 0;
1502edd16368SStephen M. Cameron 	if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
1503edd16368SStephen M. Cameron 		return 0;
1504edd16368SStephen M. Cameron 	if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
1505edd16368SStephen M. Cameron 		return 0;
1506edd16368SStephen M. Cameron 	if (dev1->devtype != dev2->devtype)
1507edd16368SStephen M. Cameron 		return 0;
1508edd16368SStephen M. Cameron 	if (dev1->bus != dev2->bus)
1509edd16368SStephen M. Cameron 		return 0;
1510edd16368SStephen M. Cameron 	return 1;
1511edd16368SStephen M. Cameron }
1512edd16368SStephen M. Cameron 
1513bd9244f7SScott Teel static inline int device_updated(struct hpsa_scsi_dev_t *dev1,
1514bd9244f7SScott Teel 	struct hpsa_scsi_dev_t *dev2)
1515bd9244f7SScott Teel {
1516bd9244f7SScott Teel 	/* Device attributes that can change, but don't mean
1517bd9244f7SScott Teel 	 * that the device is a different device, nor that the OS
1518bd9244f7SScott Teel 	 * needs to be told anything about the change.
1519bd9244f7SScott Teel 	 */
1520bd9244f7SScott Teel 	if (dev1->raid_level != dev2->raid_level)
1521bd9244f7SScott Teel 		return 1;
1522250fb125SStephen M. Cameron 	if (dev1->offload_config != dev2->offload_config)
1523250fb125SStephen M. Cameron 		return 1;
1524b2582a65SDon Brace 	if (dev1->offload_to_be_enabled != dev2->offload_to_be_enabled)
1525250fb125SStephen M. Cameron 		return 1;
152693849508SDon Brace 	if (!is_logical_dev_addr_mode(dev1->scsi3addr))
152703383736SDon Brace 		if (dev1->queue_depth != dev2->queue_depth)
152803383736SDon Brace 			return 1;
1529b2582a65SDon Brace 	/*
1530b2582a65SDon Brace 	 * This can happen for dual domain devices. An active
1531b2582a65SDon Brace 	 * path change causes the ioaccel handle to change
1532b2582a65SDon Brace 	 *
1533b2582a65SDon Brace 	 * for example note the handle differences between p0 and p1
1534b2582a65SDon Brace 	 * Device                    WWN               ,WWN hash,Handle
1535b2582a65SDon Brace 	 * D016 p0|0x3 [02]P2E:01:01,0x5000C5005FC4DACA,0x9B5616,0x01030003
1536b2582a65SDon Brace 	 *	p1                   0x5000C5005FC4DAC9,0x6798C0,0x00040004
1537b2582a65SDon Brace 	 */
1538b2582a65SDon Brace 	if (dev1->ioaccel_handle != dev2->ioaccel_handle)
1539b2582a65SDon Brace 		return 1;
1540bd9244f7SScott Teel 	return 0;
1541bd9244f7SScott Teel }
1542bd9244f7SScott Teel 
1543edd16368SStephen M. Cameron /* Find needle in haystack.  If exact match found, return DEVICE_SAME,
1544edd16368SStephen M. Cameron  * and return needle location in *index.  If scsi3addr matches, but not
1545edd16368SStephen M. Cameron  * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
1546bd9244f7SScott Teel  * location in *index.
1547bd9244f7SScott Teel  * In the case of a minor device attribute change, such as RAID level, just
1548bd9244f7SScott Teel  * return DEVICE_UPDATED, along with the updated device's location in index.
1549bd9244f7SScott Teel  * If needle not found, return DEVICE_NOT_FOUND.
1550edd16368SStephen M. Cameron  */
1551edd16368SStephen M. Cameron static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
1552edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *haystack[], int haystack_size,
1553edd16368SStephen M. Cameron 	int *index)
1554edd16368SStephen M. Cameron {
1555edd16368SStephen M. Cameron 	int i;
1556edd16368SStephen M. Cameron #define DEVICE_NOT_FOUND 0
1557edd16368SStephen M. Cameron #define DEVICE_CHANGED 1
1558edd16368SStephen M. Cameron #define DEVICE_SAME 2
1559bd9244f7SScott Teel #define DEVICE_UPDATED 3
15601d33d85dSDon Brace 	if (needle == NULL)
15611d33d85dSDon Brace 		return DEVICE_NOT_FOUND;
15621d33d85dSDon Brace 
1563edd16368SStephen M. Cameron 	for (i = 0; i < haystack_size; i++) {
156423231048SStephen M. Cameron 		if (haystack[i] == NULL) /* previously removed. */
156523231048SStephen M. Cameron 			continue;
1566edd16368SStephen M. Cameron 		if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
1567edd16368SStephen M. Cameron 			*index = i;
1568bd9244f7SScott Teel 			if (device_is_the_same(needle, haystack[i])) {
1569bd9244f7SScott Teel 				if (device_updated(needle, haystack[i]))
1570bd9244f7SScott Teel 					return DEVICE_UPDATED;
1571edd16368SStephen M. Cameron 				return DEVICE_SAME;
1572bd9244f7SScott Teel 			} else {
15739846590eSStephen M. Cameron 				/* Keep offline devices offline */
15749846590eSStephen M. Cameron 				if (needle->volume_offline)
15759846590eSStephen M. Cameron 					return DEVICE_NOT_FOUND;
1576edd16368SStephen M. Cameron 				return DEVICE_CHANGED;
1577edd16368SStephen M. Cameron 			}
1578edd16368SStephen M. Cameron 		}
1579bd9244f7SScott Teel 	}
1580edd16368SStephen M. Cameron 	*index = -1;
1581edd16368SStephen M. Cameron 	return DEVICE_NOT_FOUND;
1582edd16368SStephen M. Cameron }
1583edd16368SStephen M. Cameron 
15849846590eSStephen M. Cameron static void hpsa_monitor_offline_device(struct ctlr_info *h,
15859846590eSStephen M. Cameron 					unsigned char scsi3addr[])
15869846590eSStephen M. Cameron {
15879846590eSStephen M. Cameron 	struct offline_device_entry *device;
15889846590eSStephen M. Cameron 	unsigned long flags;
15899846590eSStephen M. Cameron 
15909846590eSStephen M. Cameron 	/* Check to see if device is already on the list */
15919846590eSStephen M. Cameron 	spin_lock_irqsave(&h->offline_device_lock, flags);
15929846590eSStephen M. Cameron 	list_for_each_entry(device, &h->offline_device_list, offline_list) {
15939846590eSStephen M. Cameron 		if (memcmp(device->scsi3addr, scsi3addr,
15949846590eSStephen M. Cameron 			sizeof(device->scsi3addr)) == 0) {
15959846590eSStephen M. Cameron 			spin_unlock_irqrestore(&h->offline_device_lock, flags);
15969846590eSStephen M. Cameron 			return;
15979846590eSStephen M. Cameron 		}
15989846590eSStephen M. Cameron 	}
15999846590eSStephen M. Cameron 	spin_unlock_irqrestore(&h->offline_device_lock, flags);
16009846590eSStephen M. Cameron 
16019846590eSStephen M. Cameron 	/* Device is not on the list, add it. */
16029846590eSStephen M. Cameron 	device = kmalloc(sizeof(*device), GFP_KERNEL);
16037e8a9486SAmit Kushwaha 	if (!device)
16049846590eSStephen M. Cameron 		return;
16057e8a9486SAmit Kushwaha 
16069846590eSStephen M. Cameron 	memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr));
16079846590eSStephen M. Cameron 	spin_lock_irqsave(&h->offline_device_lock, flags);
16089846590eSStephen M. Cameron 	list_add_tail(&device->offline_list, &h->offline_device_list);
16099846590eSStephen M. Cameron 	spin_unlock_irqrestore(&h->offline_device_lock, flags);
16109846590eSStephen M. Cameron }
16119846590eSStephen M. Cameron 
16129846590eSStephen M. Cameron /* Print a message explaining various offline volume states */
16139846590eSStephen M. Cameron static void hpsa_show_volume_status(struct ctlr_info *h,
16149846590eSStephen M. Cameron 	struct hpsa_scsi_dev_t *sd)
16159846590eSStephen M. Cameron {
16169846590eSStephen M. Cameron 	if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED)
16179846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
16189846590eSStephen M. Cameron 			"C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n",
16199846590eSStephen M. Cameron 			h->scsi_host->host_no,
16209846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
16219846590eSStephen M. Cameron 	switch (sd->volume_offline) {
16229846590eSStephen M. Cameron 	case HPSA_LV_OK:
16239846590eSStephen M. Cameron 		break;
16249846590eSStephen M. Cameron 	case HPSA_LV_UNDERGOING_ERASE:
16259846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
16269846590eSStephen M. Cameron 			"C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n",
16279846590eSStephen M. Cameron 			h->scsi_host->host_no,
16289846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
16299846590eSStephen M. Cameron 		break;
16305ca01204SScott Benesh 	case HPSA_LV_NOT_AVAILABLE:
16315ca01204SScott Benesh 		dev_info(&h->pdev->dev,
16325ca01204SScott Benesh 			"C%d:B%d:T%d:L%d Volume is waiting for transforming volume.\n",
16335ca01204SScott Benesh 			h->scsi_host->host_no,
16345ca01204SScott Benesh 			sd->bus, sd->target, sd->lun);
16355ca01204SScott Benesh 		break;
16369846590eSStephen M. Cameron 	case HPSA_LV_UNDERGOING_RPI:
16379846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
16385ca01204SScott Benesh 			"C%d:B%d:T%d:L%d Volume is undergoing rapid parity init.\n",
16399846590eSStephen M. Cameron 			h->scsi_host->host_no,
16409846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
16419846590eSStephen M. Cameron 		break;
16429846590eSStephen M. Cameron 	case HPSA_LV_PENDING_RPI:
16439846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
16449846590eSStephen M. Cameron 			"C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n",
16459846590eSStephen M. Cameron 			h->scsi_host->host_no,
16469846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
16479846590eSStephen M. Cameron 		break;
16489846590eSStephen M. Cameron 	case HPSA_LV_ENCRYPTED_NO_KEY:
16499846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
16509846590eSStephen M. Cameron 			"C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n",
16519846590eSStephen M. Cameron 			h->scsi_host->host_no,
16529846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
16539846590eSStephen M. Cameron 		break;
16549846590eSStephen M. Cameron 	case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
16559846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
16569846590eSStephen M. Cameron 			"C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n",
16579846590eSStephen M. Cameron 			h->scsi_host->host_no,
16589846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
16599846590eSStephen M. Cameron 		break;
16609846590eSStephen M. Cameron 	case HPSA_LV_UNDERGOING_ENCRYPTION:
16619846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
16629846590eSStephen M. Cameron 			"C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n",
16639846590eSStephen M. Cameron 			h->scsi_host->host_no,
16649846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
16659846590eSStephen M. Cameron 		break;
16669846590eSStephen M. Cameron 	case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
16679846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
16689846590eSStephen M. Cameron 			"C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n",
16699846590eSStephen M. Cameron 			h->scsi_host->host_no,
16709846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
16719846590eSStephen M. Cameron 		break;
16729846590eSStephen M. Cameron 	case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
16739846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
16749846590eSStephen M. Cameron 			"C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n",
16759846590eSStephen M. Cameron 			h->scsi_host->host_no,
16769846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
16779846590eSStephen M. Cameron 		break;
16789846590eSStephen M. Cameron 	case HPSA_LV_PENDING_ENCRYPTION:
16799846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
16809846590eSStephen M. Cameron 			"C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n",
16819846590eSStephen M. Cameron 			h->scsi_host->host_no,
16829846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
16839846590eSStephen M. Cameron 		break;
16849846590eSStephen M. Cameron 	case HPSA_LV_PENDING_ENCRYPTION_REKEYING:
16859846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
16869846590eSStephen M. Cameron 			"C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n",
16879846590eSStephen M. Cameron 			h->scsi_host->host_no,
16889846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
16899846590eSStephen M. Cameron 		break;
16909846590eSStephen M. Cameron 	}
16919846590eSStephen M. Cameron }
16929846590eSStephen M. Cameron 
169303383736SDon Brace /*
169403383736SDon Brace  * Figure the list of physical drive pointers for a logical drive with
169503383736SDon Brace  * raid offload configured.
169603383736SDon Brace  */
169703383736SDon Brace static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h,
169803383736SDon Brace 				struct hpsa_scsi_dev_t *dev[], int ndevices,
169903383736SDon Brace 				struct hpsa_scsi_dev_t *logical_drive)
170003383736SDon Brace {
170103383736SDon Brace 	struct raid_map_data *map = &logical_drive->raid_map;
170203383736SDon Brace 	struct raid_map_disk_data *dd = &map->data[0];
170303383736SDon Brace 	int i, j;
170403383736SDon Brace 	int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
170503383736SDon Brace 				le16_to_cpu(map->metadata_disks_per_row);
170603383736SDon Brace 	int nraid_map_entries = le16_to_cpu(map->row_cnt) *
170703383736SDon Brace 				le16_to_cpu(map->layout_map_count) *
170803383736SDon Brace 				total_disks_per_row;
170903383736SDon Brace 	int nphys_disk = le16_to_cpu(map->layout_map_count) *
171003383736SDon Brace 				total_disks_per_row;
171103383736SDon Brace 	int qdepth;
171203383736SDon Brace 
171303383736SDon Brace 	if (nraid_map_entries > RAID_MAP_MAX_ENTRIES)
171403383736SDon Brace 		nraid_map_entries = RAID_MAP_MAX_ENTRIES;
171503383736SDon Brace 
1716d604f533SWebb Scales 	logical_drive->nphysical_disks = nraid_map_entries;
1717d604f533SWebb Scales 
171803383736SDon Brace 	qdepth = 0;
171903383736SDon Brace 	for (i = 0; i < nraid_map_entries; i++) {
172003383736SDon Brace 		logical_drive->phys_disk[i] = NULL;
172103383736SDon Brace 		if (!logical_drive->offload_config)
172203383736SDon Brace 			continue;
172303383736SDon Brace 		for (j = 0; j < ndevices; j++) {
17241d33d85dSDon Brace 			if (dev[j] == NULL)
17251d33d85dSDon Brace 				continue;
1726ff615f06SPetros Koutoupis 			if (dev[j]->devtype != TYPE_DISK &&
1727ff615f06SPetros Koutoupis 			    dev[j]->devtype != TYPE_ZBC)
1728af15ed36SDon Brace 				continue;
1729f3f01730SKevin Barnett 			if (is_logical_device(dev[j]))
173003383736SDon Brace 				continue;
173103383736SDon Brace 			if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle)
173203383736SDon Brace 				continue;
173303383736SDon Brace 
173403383736SDon Brace 			logical_drive->phys_disk[i] = dev[j];
173503383736SDon Brace 			if (i < nphys_disk)
173603383736SDon Brace 				qdepth = min(h->nr_cmds, qdepth +
173703383736SDon Brace 				    logical_drive->phys_disk[i]->queue_depth);
173803383736SDon Brace 			break;
173903383736SDon Brace 		}
174003383736SDon Brace 
174103383736SDon Brace 		/*
174203383736SDon Brace 		 * This can happen if a physical drive is removed and
174303383736SDon Brace 		 * the logical drive is degraded.  In that case, the RAID
174403383736SDon Brace 		 * map data will refer to a physical disk which isn't actually
174503383736SDon Brace 		 * present.  And in that case offload_enabled should already
174603383736SDon Brace 		 * be 0, but we'll turn it off here just in case
174703383736SDon Brace 		 */
174803383736SDon Brace 		if (!logical_drive->phys_disk[i]) {
1749b2582a65SDon Brace 			dev_warn(&h->pdev->dev,
1750b2582a65SDon Brace 				"%s: [%d:%d:%d:%d] A phys disk component of LV is missing, turning off offload_enabled for LV.\n",
1751b2582a65SDon Brace 				__func__,
1752b2582a65SDon Brace 				h->scsi_host->host_no, logical_drive->bus,
1753b2582a65SDon Brace 				logical_drive->target, logical_drive->lun);
17543e16e83aSDon Brace 			hpsa_turn_off_ioaccel_for_device(logical_drive);
175541ce4c35SStephen Cameron 			logical_drive->queue_depth = 8;
175603383736SDon Brace 		}
175703383736SDon Brace 	}
175803383736SDon Brace 	if (nraid_map_entries)
175903383736SDon Brace 		/*
176003383736SDon Brace 		 * This is correct for reads, too high for full stripe writes,
176103383736SDon Brace 		 * way too high for partial stripe writes
176203383736SDon Brace 		 */
176303383736SDon Brace 		logical_drive->queue_depth = qdepth;
17642c5fc363SDon Brace 	else {
17652c5fc363SDon Brace 		if (logical_drive->external)
17662c5fc363SDon Brace 			logical_drive->queue_depth = EXTERNAL_QD;
176703383736SDon Brace 		else
176803383736SDon Brace 			logical_drive->queue_depth = h->nr_cmds;
176903383736SDon Brace 	}
17702c5fc363SDon Brace }
177103383736SDon Brace 
177203383736SDon Brace static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h,
177303383736SDon Brace 				struct hpsa_scsi_dev_t *dev[], int ndevices)
177403383736SDon Brace {
177503383736SDon Brace 	int i;
177603383736SDon Brace 
177703383736SDon Brace 	for (i = 0; i < ndevices; i++) {
17781d33d85dSDon Brace 		if (dev[i] == NULL)
17791d33d85dSDon Brace 			continue;
1780ff615f06SPetros Koutoupis 		if (dev[i]->devtype != TYPE_DISK &&
1781ff615f06SPetros Koutoupis 		    dev[i]->devtype != TYPE_ZBC)
1782af15ed36SDon Brace 			continue;
1783f3f01730SKevin Barnett 		if (!is_logical_device(dev[i]))
178403383736SDon Brace 			continue;
178541ce4c35SStephen Cameron 
178641ce4c35SStephen Cameron 		/*
178741ce4c35SStephen Cameron 		 * If offload is currently enabled, the RAID map and
178841ce4c35SStephen Cameron 		 * phys_disk[] assignment *better* not be changing
1789b2582a65SDon Brace 		 * because we would be changing ioaccel phsy_disk[] pointers
1790b2582a65SDon Brace 		 * on a ioaccel volume processing I/O requests.
1791b2582a65SDon Brace 		 *
1792b2582a65SDon Brace 		 * If an ioaccel volume status changed, initially because it was
1793b2582a65SDon Brace 		 * re-configured and thus underwent a transformation, or
1794b2582a65SDon Brace 		 * a drive failed, we would have received a state change
1795b2582a65SDon Brace 		 * request and ioaccel should have been turned off. When the
1796b2582a65SDon Brace 		 * transformation completes, we get another state change
1797b2582a65SDon Brace 		 * request to turn ioaccel back on. In this case, we need
1798b2582a65SDon Brace 		 * to update the ioaccel information.
1799b2582a65SDon Brace 		 *
1800b2582a65SDon Brace 		 * Thus: If it is not currently enabled, but will be after
1801b2582a65SDon Brace 		 * the scan completes, make sure the ioaccel pointers
1802b2582a65SDon Brace 		 * are up to date.
180341ce4c35SStephen Cameron 		 */
180441ce4c35SStephen Cameron 
1805b2582a65SDon Brace 		if (!dev[i]->offload_enabled && dev[i]->offload_to_be_enabled)
180603383736SDon Brace 			hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]);
180703383736SDon Brace 	}
180803383736SDon Brace }
180903383736SDon Brace 
1810096ccff4SKevin Barnett static int hpsa_add_device(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
1811096ccff4SKevin Barnett {
1812096ccff4SKevin Barnett 	int rc = 0;
1813096ccff4SKevin Barnett 
1814096ccff4SKevin Barnett 	if (!h->scsi_host)
1815096ccff4SKevin Barnett 		return 1;
1816096ccff4SKevin Barnett 
1817d04e62b9SKevin Barnett 	if (is_logical_device(device)) /* RAID */
1818096ccff4SKevin Barnett 		rc = scsi_add_device(h->scsi_host, device->bus,
1819096ccff4SKevin Barnett 					device->target, device->lun);
1820d04e62b9SKevin Barnett 	else /* HBA */
1821d04e62b9SKevin Barnett 		rc = hpsa_add_sas_device(h->sas_host, device);
1822d04e62b9SKevin Barnett 
1823096ccff4SKevin Barnett 	return rc;
1824096ccff4SKevin Barnett }
1825096ccff4SKevin Barnett 
1826ba74fdc4SDon Brace static int hpsa_find_outstanding_commands_for_dev(struct ctlr_info *h,
1827ba74fdc4SDon Brace 						struct hpsa_scsi_dev_t *dev)
1828ba74fdc4SDon Brace {
1829ba74fdc4SDon Brace 	int i;
1830ba74fdc4SDon Brace 	int count = 0;
1831ba74fdc4SDon Brace 
1832ba74fdc4SDon Brace 	for (i = 0; i < h->nr_cmds; i++) {
1833ba74fdc4SDon Brace 		struct CommandList *c = h->cmd_pool + i;
1834ba74fdc4SDon Brace 		int refcount = atomic_inc_return(&c->refcount);
1835ba74fdc4SDon Brace 
1836ba74fdc4SDon Brace 		if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev,
1837ba74fdc4SDon Brace 				dev->scsi3addr)) {
1838ba74fdc4SDon Brace 			unsigned long flags;
1839ba74fdc4SDon Brace 
1840ba74fdc4SDon Brace 			spin_lock_irqsave(&h->lock, flags);	/* Implied MB */
1841ba74fdc4SDon Brace 			if (!hpsa_is_cmd_idle(c))
1842ba74fdc4SDon Brace 				++count;
1843ba74fdc4SDon Brace 			spin_unlock_irqrestore(&h->lock, flags);
1844ba74fdc4SDon Brace 		}
1845ba74fdc4SDon Brace 
1846ba74fdc4SDon Brace 		cmd_free(h, c);
1847ba74fdc4SDon Brace 	}
1848ba74fdc4SDon Brace 
1849ba74fdc4SDon Brace 	return count;
1850ba74fdc4SDon Brace }
1851ba74fdc4SDon Brace 
1852b443d3eaSDon Brace #define NUM_WAIT 20
1853ba74fdc4SDon Brace static void hpsa_wait_for_outstanding_commands_for_dev(struct ctlr_info *h,
1854ba74fdc4SDon Brace 						struct hpsa_scsi_dev_t *device)
1855ba74fdc4SDon Brace {
1856ba74fdc4SDon Brace 	int cmds = 0;
1857ba74fdc4SDon Brace 	int waits = 0;
1858b443d3eaSDon Brace 	int num_wait = NUM_WAIT;
1859b443d3eaSDon Brace 
1860b443d3eaSDon Brace 	if (device->external)
1861b443d3eaSDon Brace 		num_wait = HPSA_EH_PTRAID_TIMEOUT;
1862ba74fdc4SDon Brace 
1863ba74fdc4SDon Brace 	while (1) {
1864ba74fdc4SDon Brace 		cmds = hpsa_find_outstanding_commands_for_dev(h, device);
1865ba74fdc4SDon Brace 		if (cmds == 0)
1866ba74fdc4SDon Brace 			break;
1867b443d3eaSDon Brace 		if (++waits > num_wait)
1868ba74fdc4SDon Brace 			break;
18699211a07fSDon Brace 		msleep(1000);
18709211a07fSDon Brace 	}
18719211a07fSDon Brace 
1872b443d3eaSDon Brace 	if (waits > num_wait) {
1873ba74fdc4SDon Brace 		dev_warn(&h->pdev->dev,
1874b443d3eaSDon Brace 			"%s: removing device [%d:%d:%d:%d] with %d outstanding commands!\n",
1875b443d3eaSDon Brace 			__func__,
1876b443d3eaSDon Brace 			h->scsi_host->host_no,
1877b443d3eaSDon Brace 			device->bus, device->target, device->lun, cmds);
1878b443d3eaSDon Brace 	}
1879ba74fdc4SDon Brace }
1880ba74fdc4SDon Brace 
1881096ccff4SKevin Barnett static void hpsa_remove_device(struct ctlr_info *h,
1882096ccff4SKevin Barnett 			struct hpsa_scsi_dev_t *device)
1883096ccff4SKevin Barnett {
1884096ccff4SKevin Barnett 	struct scsi_device *sdev = NULL;
1885096ccff4SKevin Barnett 
1886096ccff4SKevin Barnett 	if (!h->scsi_host)
1887096ccff4SKevin Barnett 		return;
1888096ccff4SKevin Barnett 
18890ff365f5SDon Brace 	/*
18900ff365f5SDon Brace 	 * Allow for commands to drain
18910ff365f5SDon Brace 	 */
18920ff365f5SDon Brace 	device->removed = 1;
18930ff365f5SDon Brace 	hpsa_wait_for_outstanding_commands_for_dev(h, device);
18940ff365f5SDon Brace 
1895d04e62b9SKevin Barnett 	if (is_logical_device(device)) { /* RAID */
1896096ccff4SKevin Barnett 		sdev = scsi_device_lookup(h->scsi_host, device->bus,
1897096ccff4SKevin Barnett 						device->target, device->lun);
1898096ccff4SKevin Barnett 		if (sdev) {
1899096ccff4SKevin Barnett 			scsi_remove_device(sdev);
1900096ccff4SKevin Barnett 			scsi_device_put(sdev);
1901096ccff4SKevin Barnett 		} else {
1902096ccff4SKevin Barnett 			/*
1903096ccff4SKevin Barnett 			 * We don't expect to get here.  Future commands
1904096ccff4SKevin Barnett 			 * to this device will get a selection timeout as
1905096ccff4SKevin Barnett 			 * if the device were gone.
1906096ccff4SKevin Barnett 			 */
1907096ccff4SKevin Barnett 			hpsa_show_dev_msg(KERN_WARNING, h, device,
1908096ccff4SKevin Barnett 					"didn't find device for removal.");
1909096ccff4SKevin Barnett 		}
1910ba74fdc4SDon Brace 	} else { /* HBA */
1911ba74fdc4SDon Brace 
1912d04e62b9SKevin Barnett 		hpsa_remove_sas_device(device);
1913096ccff4SKevin Barnett 	}
1914ba74fdc4SDon Brace }
1915096ccff4SKevin Barnett 
19168aa60681SDon Brace static void adjust_hpsa_scsi_table(struct ctlr_info *h,
1917edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *sd[], int nsds)
1918edd16368SStephen M. Cameron {
1919edd16368SStephen M. Cameron 	/* sd contains scsi3 addresses and devtypes, and inquiry
1920edd16368SStephen M. Cameron 	 * data.  This function takes what's in sd to be the current
1921edd16368SStephen M. Cameron 	 * reality and updates h->dev[] to reflect that reality.
1922edd16368SStephen M. Cameron 	 */
1923edd16368SStephen M. Cameron 	int i, entry, device_change, changes = 0;
1924edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *csd;
1925edd16368SStephen M. Cameron 	unsigned long flags;
1926edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t **added, **removed;
1927edd16368SStephen M. Cameron 	int nadded, nremoved;
1928edd16368SStephen M. Cameron 
1929da03ded0SDon Brace 	/*
1930da03ded0SDon Brace 	 * A reset can cause a device status to change
1931da03ded0SDon Brace 	 * re-schedule the scan to see what happened.
1932da03ded0SDon Brace 	 */
1933c59d04f3SDon Brace 	spin_lock_irqsave(&h->reset_lock, flags);
1934da03ded0SDon Brace 	if (h->reset_in_progress) {
1935da03ded0SDon Brace 		h->drv_req_rescan = 1;
1936c59d04f3SDon Brace 		spin_unlock_irqrestore(&h->reset_lock, flags);
1937da03ded0SDon Brace 		return;
1938da03ded0SDon Brace 	}
1939c59d04f3SDon Brace 	spin_unlock_irqrestore(&h->reset_lock, flags);
1940edd16368SStephen M. Cameron 
19416396bb22SKees Cook 	added = kcalloc(HPSA_MAX_DEVICES, sizeof(*added), GFP_KERNEL);
19426396bb22SKees Cook 	removed = kcalloc(HPSA_MAX_DEVICES, sizeof(*removed), GFP_KERNEL);
1943edd16368SStephen M. Cameron 
1944edd16368SStephen M. Cameron 	if (!added || !removed) {
1945edd16368SStephen M. Cameron 		dev_warn(&h->pdev->dev, "out of memory in "
1946edd16368SStephen M. Cameron 			"adjust_hpsa_scsi_table\n");
1947edd16368SStephen M. Cameron 		goto free_and_out;
1948edd16368SStephen M. Cameron 	}
1949edd16368SStephen M. Cameron 
1950edd16368SStephen M. Cameron 	spin_lock_irqsave(&h->devlock, flags);
1951edd16368SStephen M. Cameron 
1952edd16368SStephen M. Cameron 	/* find any devices in h->dev[] that are not in
1953edd16368SStephen M. Cameron 	 * sd[] and remove them from h->dev[], and for any
1954edd16368SStephen M. Cameron 	 * devices which have changed, remove the old device
1955edd16368SStephen M. Cameron 	 * info and add the new device info.
1956bd9244f7SScott Teel 	 * If minor device attributes change, just update
1957bd9244f7SScott Teel 	 * the existing device structure.
1958edd16368SStephen M. Cameron 	 */
1959edd16368SStephen M. Cameron 	i = 0;
1960edd16368SStephen M. Cameron 	nremoved = 0;
1961edd16368SStephen M. Cameron 	nadded = 0;
1962edd16368SStephen M. Cameron 	while (i < h->ndevices) {
1963edd16368SStephen M. Cameron 		csd = h->dev[i];
1964edd16368SStephen M. Cameron 		device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
1965edd16368SStephen M. Cameron 		if (device_change == DEVICE_NOT_FOUND) {
1966edd16368SStephen M. Cameron 			changes++;
19678aa60681SDon Brace 			hpsa_scsi_remove_entry(h, i, removed, &nremoved);
1968edd16368SStephen M. Cameron 			continue; /* remove ^^^, hence i not incremented */
1969edd16368SStephen M. Cameron 		} else if (device_change == DEVICE_CHANGED) {
1970edd16368SStephen M. Cameron 			changes++;
19718aa60681SDon Brace 			hpsa_scsi_replace_entry(h, i, sd[entry],
19722a8ccf31SStephen M. Cameron 				added, &nadded, removed, &nremoved);
1973c7f172dcSStephen M. Cameron 			/* Set it to NULL to prevent it from being freed
1974c7f172dcSStephen M. Cameron 			 * at the bottom of hpsa_update_scsi_devices()
1975c7f172dcSStephen M. Cameron 			 */
1976c7f172dcSStephen M. Cameron 			sd[entry] = NULL;
1977bd9244f7SScott Teel 		} else if (device_change == DEVICE_UPDATED) {
19788aa60681SDon Brace 			hpsa_scsi_update_entry(h, i, sd[entry]);
1979edd16368SStephen M. Cameron 		}
1980edd16368SStephen M. Cameron 		i++;
1981edd16368SStephen M. Cameron 	}
1982edd16368SStephen M. Cameron 
1983edd16368SStephen M. Cameron 	/* Now, make sure every device listed in sd[] is also
1984edd16368SStephen M. Cameron 	 * listed in h->dev[], adding them if they aren't found
1985edd16368SStephen M. Cameron 	 */
1986edd16368SStephen M. Cameron 
1987edd16368SStephen M. Cameron 	for (i = 0; i < nsds; i++) {
1988edd16368SStephen M. Cameron 		if (!sd[i]) /* if already added above. */
1989edd16368SStephen M. Cameron 			continue;
19909846590eSStephen M. Cameron 
19919846590eSStephen M. Cameron 		/* Don't add devices which are NOT READY, FORMAT IN PROGRESS
19929846590eSStephen M. Cameron 		 * as the SCSI mid-layer does not handle such devices well.
19939846590eSStephen M. Cameron 		 * It relentlessly loops sending TUR at 3Hz, then READ(10)
19949846590eSStephen M. Cameron 		 * at 160Hz, and prevents the system from coming up.
19959846590eSStephen M. Cameron 		 */
19969846590eSStephen M. Cameron 		if (sd[i]->volume_offline) {
19979846590eSStephen M. Cameron 			hpsa_show_volume_status(h, sd[i]);
19980d96ef5fSWebb Scales 			hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline");
19999846590eSStephen M. Cameron 			continue;
20009846590eSStephen M. Cameron 		}
20019846590eSStephen M. Cameron 
2002edd16368SStephen M. Cameron 		device_change = hpsa_scsi_find_entry(sd[i], h->dev,
2003edd16368SStephen M. Cameron 					h->ndevices, &entry);
2004edd16368SStephen M. Cameron 		if (device_change == DEVICE_NOT_FOUND) {
2005edd16368SStephen M. Cameron 			changes++;
20068aa60681SDon Brace 			if (hpsa_scsi_add_entry(h, sd[i], added, &nadded) != 0)
2007edd16368SStephen M. Cameron 				break;
2008edd16368SStephen M. Cameron 			sd[i] = NULL; /* prevent from being freed later. */
2009edd16368SStephen M. Cameron 		} else if (device_change == DEVICE_CHANGED) {
2010edd16368SStephen M. Cameron 			/* should never happen... */
2011edd16368SStephen M. Cameron 			changes++;
2012edd16368SStephen M. Cameron 			dev_warn(&h->pdev->dev,
2013edd16368SStephen M. Cameron 				"device unexpectedly changed.\n");
2014edd16368SStephen M. Cameron 			/* but if it does happen, we just ignore that device */
2015edd16368SStephen M. Cameron 		}
2016edd16368SStephen M. Cameron 	}
201741ce4c35SStephen Cameron 	hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices);
201841ce4c35SStephen Cameron 
2019b2582a65SDon Brace 	/*
2020b2582a65SDon Brace 	 * Now that h->dev[]->phys_disk[] is coherent, we can enable
202141ce4c35SStephen Cameron 	 * any logical drives that need it enabled.
2022b2582a65SDon Brace 	 *
2023b2582a65SDon Brace 	 * The raid map should be current by now.
2024b2582a65SDon Brace 	 *
2025b2582a65SDon Brace 	 * We are updating the device list used for I/O requests.
202641ce4c35SStephen Cameron 	 */
20271d33d85dSDon Brace 	for (i = 0; i < h->ndevices; i++) {
20281d33d85dSDon Brace 		if (h->dev[i] == NULL)
20291d33d85dSDon Brace 			continue;
203041ce4c35SStephen Cameron 		h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled;
20311d33d85dSDon Brace 	}
203241ce4c35SStephen Cameron 
2033edd16368SStephen M. Cameron 	spin_unlock_irqrestore(&h->devlock, flags);
2034edd16368SStephen M. Cameron 
20359846590eSStephen M. Cameron 	/* Monitor devices which are in one of several NOT READY states to be
20369846590eSStephen M. Cameron 	 * brought online later. This must be done without holding h->devlock,
20379846590eSStephen M. Cameron 	 * so don't touch h->dev[]
20389846590eSStephen M. Cameron 	 */
20399846590eSStephen M. Cameron 	for (i = 0; i < nsds; i++) {
20409846590eSStephen M. Cameron 		if (!sd[i]) /* if already added above. */
20419846590eSStephen M. Cameron 			continue;
20429846590eSStephen M. Cameron 		if (sd[i]->volume_offline)
20439846590eSStephen M. Cameron 			hpsa_monitor_offline_device(h, sd[i]->scsi3addr);
20449846590eSStephen M. Cameron 	}
20459846590eSStephen M. Cameron 
2046edd16368SStephen M. Cameron 	/* Don't notify scsi mid layer of any changes the first time through
2047edd16368SStephen M. Cameron 	 * (or if there are no changes) scsi_scan_host will do it later the
2048edd16368SStephen M. Cameron 	 * first time through.
2049edd16368SStephen M. Cameron 	 */
20508aa60681SDon Brace 	if (!changes)
2051edd16368SStephen M. Cameron 		goto free_and_out;
2052edd16368SStephen M. Cameron 
2053edd16368SStephen M. Cameron 	/* Notify scsi mid layer of any removed devices */
2054edd16368SStephen M. Cameron 	for (i = 0; i < nremoved; i++) {
20551d33d85dSDon Brace 		if (removed[i] == NULL)
20561d33d85dSDon Brace 			continue;
2057096ccff4SKevin Barnett 		if (removed[i]->expose_device)
2058096ccff4SKevin Barnett 			hpsa_remove_device(h, removed[i]);
2059edd16368SStephen M. Cameron 		kfree(removed[i]);
2060edd16368SStephen M. Cameron 		removed[i] = NULL;
2061edd16368SStephen M. Cameron 	}
2062edd16368SStephen M. Cameron 
2063edd16368SStephen M. Cameron 	/* Notify scsi mid layer of any added devices */
2064edd16368SStephen M. Cameron 	for (i = 0; i < nadded; i++) {
2065096ccff4SKevin Barnett 		int rc = 0;
2066096ccff4SKevin Barnett 
20671d33d85dSDon Brace 		if (added[i] == NULL)
206841ce4c35SStephen Cameron 			continue;
20692a168208SKevin Barnett 		if (!(added[i]->expose_device))
2070edd16368SStephen M. Cameron 			continue;
2071096ccff4SKevin Barnett 		rc = hpsa_add_device(h, added[i]);
2072096ccff4SKevin Barnett 		if (!rc)
2073edd16368SStephen M. Cameron 			continue;
2074096ccff4SKevin Barnett 		dev_warn(&h->pdev->dev,
2075096ccff4SKevin Barnett 			"addition failed %d, device not added.", rc);
2076edd16368SStephen M. Cameron 		/* now we have to remove it from h->dev,
2077edd16368SStephen M. Cameron 		 * since it didn't get added to scsi mid layer
2078edd16368SStephen M. Cameron 		 */
2079edd16368SStephen M. Cameron 		fixup_botched_add(h, added[i]);
2080853633e8SDon Brace 		h->drv_req_rescan = 1;
2081edd16368SStephen M. Cameron 	}
2082edd16368SStephen M. Cameron 
2083edd16368SStephen M. Cameron free_and_out:
2084edd16368SStephen M. Cameron 	kfree(added);
2085edd16368SStephen M. Cameron 	kfree(removed);
2086edd16368SStephen M. Cameron }
2087edd16368SStephen M. Cameron 
2088edd16368SStephen M. Cameron /*
20899e03aa2fSJoe Perches  * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t *
2090edd16368SStephen M. Cameron  * Assume's h->devlock is held.
2091edd16368SStephen M. Cameron  */
2092edd16368SStephen M. Cameron static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
2093edd16368SStephen M. Cameron 	int bus, int target, int lun)
2094edd16368SStephen M. Cameron {
2095edd16368SStephen M. Cameron 	int i;
2096edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *sd;
2097edd16368SStephen M. Cameron 
2098edd16368SStephen M. Cameron 	for (i = 0; i < h->ndevices; i++) {
2099edd16368SStephen M. Cameron 		sd = h->dev[i];
2100edd16368SStephen M. Cameron 		if (sd->bus == bus && sd->target == target && sd->lun == lun)
2101edd16368SStephen M. Cameron 			return sd;
2102edd16368SStephen M. Cameron 	}
2103edd16368SStephen M. Cameron 	return NULL;
2104edd16368SStephen M. Cameron }
2105edd16368SStephen M. Cameron 
2106edd16368SStephen M. Cameron static int hpsa_slave_alloc(struct scsi_device *sdev)
2107edd16368SStephen M. Cameron {
21087630b3a5SHannes Reinecke 	struct hpsa_scsi_dev_t *sd = NULL;
2109edd16368SStephen M. Cameron 	unsigned long flags;
2110edd16368SStephen M. Cameron 	struct ctlr_info *h;
2111edd16368SStephen M. Cameron 
2112edd16368SStephen M. Cameron 	h = sdev_to_hba(sdev);
2113edd16368SStephen M. Cameron 	spin_lock_irqsave(&h->devlock, flags);
2114d04e62b9SKevin Barnett 	if (sdev_channel(sdev) == HPSA_PHYSICAL_DEVICE_BUS) {
2115d04e62b9SKevin Barnett 		struct scsi_target *starget;
2116d04e62b9SKevin Barnett 		struct sas_rphy *rphy;
2117d04e62b9SKevin Barnett 
2118d04e62b9SKevin Barnett 		starget = scsi_target(sdev);
2119d04e62b9SKevin Barnett 		rphy = target_to_rphy(starget);
2120d04e62b9SKevin Barnett 		sd = hpsa_find_device_by_sas_rphy(h, rphy);
2121d04e62b9SKevin Barnett 		if (sd) {
2122d04e62b9SKevin Barnett 			sd->target = sdev_id(sdev);
2123d04e62b9SKevin Barnett 			sd->lun = sdev->lun;
2124d04e62b9SKevin Barnett 		}
21257630b3a5SHannes Reinecke 	}
21267630b3a5SHannes Reinecke 	if (!sd)
2127edd16368SStephen M. Cameron 		sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
2128edd16368SStephen M. Cameron 					sdev_id(sdev), sdev->lun);
2129d04e62b9SKevin Barnett 
2130d04e62b9SKevin Barnett 	if (sd && sd->expose_device) {
213103383736SDon Brace 		atomic_set(&sd->ioaccel_cmds_out, 0);
2132d04e62b9SKevin Barnett 		sdev->hostdata = sd;
213341ce4c35SStephen Cameron 	} else
213441ce4c35SStephen Cameron 		sdev->hostdata = NULL;
2135edd16368SStephen M. Cameron 	spin_unlock_irqrestore(&h->devlock, flags);
2136edd16368SStephen M. Cameron 	return 0;
2137edd16368SStephen M. Cameron }
2138edd16368SStephen M. Cameron 
213941ce4c35SStephen Cameron /* configure scsi device based on internal per-device structure */
214030bda784SDon Brace #define CTLR_TIMEOUT (120 * HZ)
214141ce4c35SStephen Cameron static int hpsa_slave_configure(struct scsi_device *sdev)
214241ce4c35SStephen Cameron {
214341ce4c35SStephen Cameron 	struct hpsa_scsi_dev_t *sd;
214441ce4c35SStephen Cameron 	int queue_depth;
214541ce4c35SStephen Cameron 
214641ce4c35SStephen Cameron 	sd = sdev->hostdata;
21472a168208SKevin Barnett 	sdev->no_uld_attach = !sd || !sd->expose_device;
214841ce4c35SStephen Cameron 
21495086435eSDon Brace 	if (sd) {
21509e33f0d5SDon Brace 		sd->was_removed = 0;
21515759ff11SDon Brace 		queue_depth = sd->queue_depth != 0 ?
21525759ff11SDon Brace 				sd->queue_depth : sdev->host->can_queue;
2153b443d3eaSDon Brace 		if (sd->external) {
21545086435eSDon Brace 			queue_depth = EXTERNAL_QD;
2155b443d3eaSDon Brace 			sdev->eh_timeout = HPSA_EH_PTRAID_TIMEOUT;
2156b443d3eaSDon Brace 			blk_queue_rq_timeout(sdev->request_queue,
2157b443d3eaSDon Brace 						HPSA_EH_PTRAID_TIMEOUT);
21585759ff11SDon Brace 		}
21595759ff11SDon Brace 		if (is_hba_lunid(sd->scsi3addr)) {
216030bda784SDon Brace 			sdev->eh_timeout = CTLR_TIMEOUT;
216130bda784SDon Brace 			blk_queue_rq_timeout(sdev->request_queue, CTLR_TIMEOUT);
2162b443d3eaSDon Brace 		}
21635759ff11SDon Brace 	} else {
216441ce4c35SStephen Cameron 		queue_depth = sdev->host->can_queue;
21655759ff11SDon Brace 	}
216641ce4c35SStephen Cameron 
216741ce4c35SStephen Cameron 	scsi_change_queue_depth(sdev, queue_depth);
216841ce4c35SStephen Cameron 
216941ce4c35SStephen Cameron 	return 0;
217041ce4c35SStephen Cameron }
217141ce4c35SStephen Cameron 
2172edd16368SStephen M. Cameron static void hpsa_slave_destroy(struct scsi_device *sdev)
2173edd16368SStephen M. Cameron {
21749e33f0d5SDon Brace 	struct hpsa_scsi_dev_t *hdev = NULL;
21759e33f0d5SDon Brace 
21769e33f0d5SDon Brace 	hdev = sdev->hostdata;
21779e33f0d5SDon Brace 
21789e33f0d5SDon Brace 	if (hdev)
21799e33f0d5SDon Brace 		hdev->was_removed = 1;
2180edd16368SStephen M. Cameron }
2181edd16368SStephen M. Cameron 
2182d9a729f3SWebb Scales static void hpsa_free_ioaccel2_sg_chain_blocks(struct ctlr_info *h)
2183d9a729f3SWebb Scales {
2184d9a729f3SWebb Scales 	int i;
2185d9a729f3SWebb Scales 
2186d9a729f3SWebb Scales 	if (!h->ioaccel2_cmd_sg_list)
2187d9a729f3SWebb Scales 		return;
2188d9a729f3SWebb Scales 	for (i = 0; i < h->nr_cmds; i++) {
2189d9a729f3SWebb Scales 		kfree(h->ioaccel2_cmd_sg_list[i]);
2190d9a729f3SWebb Scales 		h->ioaccel2_cmd_sg_list[i] = NULL;
2191d9a729f3SWebb Scales 	}
2192d9a729f3SWebb Scales 	kfree(h->ioaccel2_cmd_sg_list);
2193d9a729f3SWebb Scales 	h->ioaccel2_cmd_sg_list = NULL;
2194d9a729f3SWebb Scales }
2195d9a729f3SWebb Scales 
2196d9a729f3SWebb Scales static int hpsa_allocate_ioaccel2_sg_chain_blocks(struct ctlr_info *h)
2197d9a729f3SWebb Scales {
2198d9a729f3SWebb Scales 	int i;
2199d9a729f3SWebb Scales 
2200d9a729f3SWebb Scales 	if (h->chainsize <= 0)
2201d9a729f3SWebb Scales 		return 0;
2202d9a729f3SWebb Scales 
2203d9a729f3SWebb Scales 	h->ioaccel2_cmd_sg_list =
22046396bb22SKees Cook 		kcalloc(h->nr_cmds, sizeof(*h->ioaccel2_cmd_sg_list),
2205d9a729f3SWebb Scales 					GFP_KERNEL);
2206d9a729f3SWebb Scales 	if (!h->ioaccel2_cmd_sg_list)
2207d9a729f3SWebb Scales 		return -ENOMEM;
2208d9a729f3SWebb Scales 	for (i = 0; i < h->nr_cmds; i++) {
2209d9a729f3SWebb Scales 		h->ioaccel2_cmd_sg_list[i] =
22106da2ec56SKees Cook 			kmalloc_array(h->maxsgentries,
22116da2ec56SKees Cook 				      sizeof(*h->ioaccel2_cmd_sg_list[i]),
22126da2ec56SKees Cook 				      GFP_KERNEL);
2213d9a729f3SWebb Scales 		if (!h->ioaccel2_cmd_sg_list[i])
2214d9a729f3SWebb Scales 			goto clean;
2215d9a729f3SWebb Scales 	}
2216d9a729f3SWebb Scales 	return 0;
2217d9a729f3SWebb Scales 
2218d9a729f3SWebb Scales clean:
2219d9a729f3SWebb Scales 	hpsa_free_ioaccel2_sg_chain_blocks(h);
2220d9a729f3SWebb Scales 	return -ENOMEM;
2221d9a729f3SWebb Scales }
2222d9a729f3SWebb Scales 
222333a2ffceSStephen M. Cameron static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
222433a2ffceSStephen M. Cameron {
222533a2ffceSStephen M. Cameron 	int i;
222633a2ffceSStephen M. Cameron 
222733a2ffceSStephen M. Cameron 	if (!h->cmd_sg_list)
222833a2ffceSStephen M. Cameron 		return;
222933a2ffceSStephen M. Cameron 	for (i = 0; i < h->nr_cmds; i++) {
223033a2ffceSStephen M. Cameron 		kfree(h->cmd_sg_list[i]);
223133a2ffceSStephen M. Cameron 		h->cmd_sg_list[i] = NULL;
223233a2ffceSStephen M. Cameron 	}
223333a2ffceSStephen M. Cameron 	kfree(h->cmd_sg_list);
223433a2ffceSStephen M. Cameron 	h->cmd_sg_list = NULL;
223533a2ffceSStephen M. Cameron }
223633a2ffceSStephen M. Cameron 
2237105a3dbcSRobert Elliott static int hpsa_alloc_sg_chain_blocks(struct ctlr_info *h)
223833a2ffceSStephen M. Cameron {
223933a2ffceSStephen M. Cameron 	int i;
224033a2ffceSStephen M. Cameron 
224133a2ffceSStephen M. Cameron 	if (h->chainsize <= 0)
224233a2ffceSStephen M. Cameron 		return 0;
224333a2ffceSStephen M. Cameron 
22446396bb22SKees Cook 	h->cmd_sg_list = kcalloc(h->nr_cmds, sizeof(*h->cmd_sg_list),
224533a2ffceSStephen M. Cameron 				 GFP_KERNEL);
22467e8a9486SAmit Kushwaha 	if (!h->cmd_sg_list)
224733a2ffceSStephen M. Cameron 		return -ENOMEM;
22487e8a9486SAmit Kushwaha 
224933a2ffceSStephen M. Cameron 	for (i = 0; i < h->nr_cmds; i++) {
22506da2ec56SKees Cook 		h->cmd_sg_list[i] = kmalloc_array(h->chainsize,
22516da2ec56SKees Cook 						  sizeof(*h->cmd_sg_list[i]),
22526da2ec56SKees Cook 						  GFP_KERNEL);
22537e8a9486SAmit Kushwaha 		if (!h->cmd_sg_list[i])
225433a2ffceSStephen M. Cameron 			goto clean;
22557e8a9486SAmit Kushwaha 
22563d4e6af8SRobert Elliott 	}
225733a2ffceSStephen M. Cameron 	return 0;
225833a2ffceSStephen M. Cameron 
225933a2ffceSStephen M. Cameron clean:
226033a2ffceSStephen M. Cameron 	hpsa_free_sg_chain_blocks(h);
226133a2ffceSStephen M. Cameron 	return -ENOMEM;
226233a2ffceSStephen M. Cameron }
226333a2ffceSStephen M. Cameron 
2264d9a729f3SWebb Scales static int hpsa_map_ioaccel2_sg_chain_block(struct ctlr_info *h,
2265d9a729f3SWebb Scales 	struct io_accel2_cmd *cp, struct CommandList *c)
2266d9a729f3SWebb Scales {
2267d9a729f3SWebb Scales 	struct ioaccel2_sg_element *chain_block;
2268d9a729f3SWebb Scales 	u64 temp64;
2269d9a729f3SWebb Scales 	u32 chain_size;
2270d9a729f3SWebb Scales 
2271d9a729f3SWebb Scales 	chain_block = h->ioaccel2_cmd_sg_list[c->cmdindex];
2272a736e9b6SDon Brace 	chain_size = le32_to_cpu(cp->sg[0].length);
22738bc8f47eSChristoph Hellwig 	temp64 = dma_map_single(&h->pdev->dev, chain_block, chain_size,
22748bc8f47eSChristoph Hellwig 				DMA_TO_DEVICE);
2275d9a729f3SWebb Scales 	if (dma_mapping_error(&h->pdev->dev, temp64)) {
2276d9a729f3SWebb Scales 		/* prevent subsequent unmapping */
2277d9a729f3SWebb Scales 		cp->sg->address = 0;
2278d9a729f3SWebb Scales 		return -1;
2279d9a729f3SWebb Scales 	}
2280d9a729f3SWebb Scales 	cp->sg->address = cpu_to_le64(temp64);
2281d9a729f3SWebb Scales 	return 0;
2282d9a729f3SWebb Scales }
2283d9a729f3SWebb Scales 
2284d9a729f3SWebb Scales static void hpsa_unmap_ioaccel2_sg_chain_block(struct ctlr_info *h,
2285d9a729f3SWebb Scales 	struct io_accel2_cmd *cp)
2286d9a729f3SWebb Scales {
2287d9a729f3SWebb Scales 	struct ioaccel2_sg_element *chain_sg;
2288d9a729f3SWebb Scales 	u64 temp64;
2289d9a729f3SWebb Scales 	u32 chain_size;
2290d9a729f3SWebb Scales 
2291d9a729f3SWebb Scales 	chain_sg = cp->sg;
2292d9a729f3SWebb Scales 	temp64 = le64_to_cpu(chain_sg->address);
2293a736e9b6SDon Brace 	chain_size = le32_to_cpu(cp->sg[0].length);
22948bc8f47eSChristoph Hellwig 	dma_unmap_single(&h->pdev->dev, temp64, chain_size, DMA_TO_DEVICE);
2295d9a729f3SWebb Scales }
2296d9a729f3SWebb Scales 
2297e2bea6dfSStephen M. Cameron static int hpsa_map_sg_chain_block(struct ctlr_info *h,
229833a2ffceSStephen M. Cameron 	struct CommandList *c)
229933a2ffceSStephen M. Cameron {
230033a2ffceSStephen M. Cameron 	struct SGDescriptor *chain_sg, *chain_block;
230133a2ffceSStephen M. Cameron 	u64 temp64;
230250a0decfSStephen M. Cameron 	u32 chain_len;
230333a2ffceSStephen M. Cameron 
230433a2ffceSStephen M. Cameron 	chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
230533a2ffceSStephen M. Cameron 	chain_block = h->cmd_sg_list[c->cmdindex];
230650a0decfSStephen M. Cameron 	chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN);
230750a0decfSStephen M. Cameron 	chain_len = sizeof(*chain_sg) *
23082b08b3e9SDon Brace 		(le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries);
230950a0decfSStephen M. Cameron 	chain_sg->Len = cpu_to_le32(chain_len);
23108bc8f47eSChristoph Hellwig 	temp64 = dma_map_single(&h->pdev->dev, chain_block, chain_len,
23118bc8f47eSChristoph Hellwig 				DMA_TO_DEVICE);
2312e2bea6dfSStephen M. Cameron 	if (dma_mapping_error(&h->pdev->dev, temp64)) {
2313e2bea6dfSStephen M. Cameron 		/* prevent subsequent unmapping */
231450a0decfSStephen M. Cameron 		chain_sg->Addr = cpu_to_le64(0);
2315e2bea6dfSStephen M. Cameron 		return -1;
2316e2bea6dfSStephen M. Cameron 	}
231750a0decfSStephen M. Cameron 	chain_sg->Addr = cpu_to_le64(temp64);
2318e2bea6dfSStephen M. Cameron 	return 0;
231933a2ffceSStephen M. Cameron }
232033a2ffceSStephen M. Cameron 
232133a2ffceSStephen M. Cameron static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
232233a2ffceSStephen M. Cameron 	struct CommandList *c)
232333a2ffceSStephen M. Cameron {
232433a2ffceSStephen M. Cameron 	struct SGDescriptor *chain_sg;
232533a2ffceSStephen M. Cameron 
232650a0decfSStephen M. Cameron 	if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries)
232733a2ffceSStephen M. Cameron 		return;
232833a2ffceSStephen M. Cameron 
232933a2ffceSStephen M. Cameron 	chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
23308bc8f47eSChristoph Hellwig 	dma_unmap_single(&h->pdev->dev, le64_to_cpu(chain_sg->Addr),
23318bc8f47eSChristoph Hellwig 			le32_to_cpu(chain_sg->Len), DMA_TO_DEVICE);
233233a2ffceSStephen M. Cameron }
233333a2ffceSStephen M. Cameron 
2334a09c1441SScott Teel 
2335a09c1441SScott Teel /* Decode the various types of errors on ioaccel2 path.
2336a09c1441SScott Teel  * Return 1 for any error that should generate a RAID path retry.
2337a09c1441SScott Teel  * Return 0 for errors that don't require a RAID path retry.
2338a09c1441SScott Teel  */
2339a09c1441SScott Teel static int handle_ioaccel_mode2_error(struct ctlr_info *h,
2340c349775eSScott Teel 					struct CommandList *c,
2341c349775eSScott Teel 					struct scsi_cmnd *cmd,
2342ba74fdc4SDon Brace 					struct io_accel2_cmd *c2,
2343ba74fdc4SDon Brace 					struct hpsa_scsi_dev_t *dev)
2344c349775eSScott Teel {
2345c349775eSScott Teel 	int data_len;
2346a09c1441SScott Teel 	int retry = 0;
2347c40820d5SJoe Handzik 	u32 ioaccel2_resid = 0;
2348c349775eSScott Teel 
2349c349775eSScott Teel 	switch (c2->error_data.serv_response) {
2350c349775eSScott Teel 	case IOACCEL2_SERV_RESPONSE_COMPLETE:
2351c349775eSScott Teel 		switch (c2->error_data.status) {
2352c349775eSScott Teel 		case IOACCEL2_STATUS_SR_TASK_COMP_GOOD:
2353eeebce18SDon Brace 			if (cmd)
2354eeebce18SDon Brace 				cmd->result = 0;
2355c349775eSScott Teel 			break;
2356c349775eSScott Teel 		case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND:
2357ee6b1889SStephen M. Cameron 			cmd->result |= SAM_STAT_CHECK_CONDITION;
2358c349775eSScott Teel 			if (c2->error_data.data_present !=
2359ee6b1889SStephen M. Cameron 					IOACCEL2_SENSE_DATA_PRESENT) {
2360ee6b1889SStephen M. Cameron 				memset(cmd->sense_buffer, 0,
2361ee6b1889SStephen M. Cameron 					SCSI_SENSE_BUFFERSIZE);
2362c349775eSScott Teel 				break;
2363ee6b1889SStephen M. Cameron 			}
2364c349775eSScott Teel 			/* copy the sense data */
2365c349775eSScott Teel 			data_len = c2->error_data.sense_data_len;
2366c349775eSScott Teel 			if (data_len > SCSI_SENSE_BUFFERSIZE)
2367c349775eSScott Teel 				data_len = SCSI_SENSE_BUFFERSIZE;
2368c349775eSScott Teel 			if (data_len > sizeof(c2->error_data.sense_data_buff))
2369c349775eSScott Teel 				data_len =
2370c349775eSScott Teel 					sizeof(c2->error_data.sense_data_buff);
2371c349775eSScott Teel 			memcpy(cmd->sense_buffer,
2372c349775eSScott Teel 				c2->error_data.sense_data_buff, data_len);
2373a09c1441SScott Teel 			retry = 1;
2374c349775eSScott Teel 			break;
2375c349775eSScott Teel 		case IOACCEL2_STATUS_SR_TASK_COMP_BUSY:
2376a09c1441SScott Teel 			retry = 1;
2377c349775eSScott Teel 			break;
2378c349775eSScott Teel 		case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON:
2379a09c1441SScott Teel 			retry = 1;
2380c349775eSScott Teel 			break;
2381c349775eSScott Teel 		case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL:
23824a8da22bSStephen Cameron 			retry = 1;
2383c349775eSScott Teel 			break;
2384c349775eSScott Teel 		case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED:
2385a09c1441SScott Teel 			retry = 1;
2386c349775eSScott Teel 			break;
2387c349775eSScott Teel 		default:
2388a09c1441SScott Teel 			retry = 1;
2389c349775eSScott Teel 			break;
2390c349775eSScott Teel 		}
2391c349775eSScott Teel 		break;
2392c349775eSScott Teel 	case IOACCEL2_SERV_RESPONSE_FAILURE:
2393c40820d5SJoe Handzik 		switch (c2->error_data.status) {
2394c40820d5SJoe Handzik 		case IOACCEL2_STATUS_SR_IO_ERROR:
2395c40820d5SJoe Handzik 		case IOACCEL2_STATUS_SR_IO_ABORTED:
2396c40820d5SJoe Handzik 		case IOACCEL2_STATUS_SR_OVERRUN:
2397c40820d5SJoe Handzik 			retry = 1;
2398c40820d5SJoe Handzik 			break;
2399c40820d5SJoe Handzik 		case IOACCEL2_STATUS_SR_UNDERRUN:
2400c40820d5SJoe Handzik 			cmd->result = (DID_OK << 16);		/* host byte */
2401c40820d5SJoe Handzik 			ioaccel2_resid = get_unaligned_le32(
2402c40820d5SJoe Handzik 						&c2->error_data.resid_cnt[0]);
2403c40820d5SJoe Handzik 			scsi_set_resid(cmd, ioaccel2_resid);
2404c40820d5SJoe Handzik 			break;
2405c40820d5SJoe Handzik 		case IOACCEL2_STATUS_SR_NO_PATH_TO_DEVICE:
2406c40820d5SJoe Handzik 		case IOACCEL2_STATUS_SR_INVALID_DEVICE:
2407c40820d5SJoe Handzik 		case IOACCEL2_STATUS_SR_IOACCEL_DISABLED:
2408ba74fdc4SDon Brace 			/*
2409ba74fdc4SDon Brace 			 * Did an HBA disk disappear? We will eventually
2410ba74fdc4SDon Brace 			 * get a state change event from the controller but
2411ba74fdc4SDon Brace 			 * in the meantime, we need to tell the OS that the
2412ba74fdc4SDon Brace 			 * HBA disk is no longer there and stop I/O
2413ba74fdc4SDon Brace 			 * from going down. This allows the potential re-insert
2414ba74fdc4SDon Brace 			 * of the disk to get the same device node.
2415ba74fdc4SDon Brace 			 */
2416ba74fdc4SDon Brace 			if (dev->physical_device && dev->expose_device) {
2417ba74fdc4SDon Brace 				cmd->result = DID_NO_CONNECT << 16;
2418ba74fdc4SDon Brace 				dev->removed = 1;
2419ba74fdc4SDon Brace 				h->drv_req_rescan = 1;
2420ba74fdc4SDon Brace 				dev_warn(&h->pdev->dev,
2421ba74fdc4SDon Brace 					"%s: device is gone!\n", __func__);
2422ba74fdc4SDon Brace 			} else
2423ba74fdc4SDon Brace 				/*
2424ba74fdc4SDon Brace 				 * Retry by sending down the RAID path.
2425ba74fdc4SDon Brace 				 * We will get an event from ctlr to
2426ba74fdc4SDon Brace 				 * trigger rescan regardless.
2427ba74fdc4SDon Brace 				 */
2428c40820d5SJoe Handzik 				retry = 1;
2429c40820d5SJoe Handzik 			break;
2430c40820d5SJoe Handzik 		default:
2431c40820d5SJoe Handzik 			retry = 1;
2432c40820d5SJoe Handzik 		}
2433c349775eSScott Teel 		break;
2434c349775eSScott Teel 	case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE:
2435c349775eSScott Teel 		break;
2436c349775eSScott Teel 	case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS:
2437c349775eSScott Teel 		break;
2438c349775eSScott Teel 	case IOACCEL2_SERV_RESPONSE_TMF_REJECTED:
2439a09c1441SScott Teel 		retry = 1;
2440c349775eSScott Teel 		break;
2441c349775eSScott Teel 	case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN:
2442c349775eSScott Teel 		break;
2443c349775eSScott Teel 	default:
2444a09c1441SScott Teel 		retry = 1;
2445c349775eSScott Teel 		break;
2446c349775eSScott Teel 	}
2447a09c1441SScott Teel 
2448c5dfd106SDon Brace 	if (dev->in_reset)
2449c5dfd106SDon Brace 		retry = 0;
2450c5dfd106SDon Brace 
2451a09c1441SScott Teel 	return retry;	/* retry on raid path? */
2452c349775eSScott Teel }
2453c349775eSScott Teel 
2454a58e7e53SWebb Scales static void hpsa_cmd_resolve_events(struct ctlr_info *h,
2455a58e7e53SWebb Scales 		struct CommandList *c)
2456a58e7e53SWebb Scales {
2457c5dfd106SDon Brace 	struct hpsa_scsi_dev_t *dev = c->device;
2458d604f533SWebb Scales 
2459a58e7e53SWebb Scales 	/*
246008ec46f6SDon Brace 	 * Reset c->scsi_cmd here so that the reset handler will know
2461d604f533SWebb Scales 	 * this command has completed.  Then, check to see if the handler is
2462a58e7e53SWebb Scales 	 * waiting for this command, and, if so, wake it.
2463a58e7e53SWebb Scales 	 */
2464a58e7e53SWebb Scales 	c->scsi_cmd = SCSI_CMD_IDLE;
2465d604f533SWebb Scales 	mb();	/* Declare command idle before checking for pending events. */
2466c5dfd106SDon Brace 	if (dev) {
2467c5dfd106SDon Brace 		atomic_dec(&dev->commands_outstanding);
2468c5dfd106SDon Brace 		if (dev->in_reset &&
2469c5dfd106SDon Brace 			atomic_read(&dev->commands_outstanding) <= 0)
2470d604f533SWebb Scales 			wake_up_all(&h->event_sync_wait_queue);
2471a58e7e53SWebb Scales 	}
2472c5dfd106SDon Brace }
2473a58e7e53SWebb Scales 
247473153fe5SWebb Scales static void hpsa_cmd_resolve_and_free(struct ctlr_info *h,
247573153fe5SWebb Scales 				      struct CommandList *c)
247673153fe5SWebb Scales {
247773153fe5SWebb Scales 	hpsa_cmd_resolve_events(h, c);
247873153fe5SWebb Scales 	cmd_tagged_free(h, c);
247973153fe5SWebb Scales }
248073153fe5SWebb Scales 
24818a0ff92cSWebb Scales static void hpsa_cmd_free_and_done(struct ctlr_info *h,
24828a0ff92cSWebb Scales 		struct CommandList *c, struct scsi_cmnd *cmd)
24838a0ff92cSWebb Scales {
248473153fe5SWebb Scales 	hpsa_cmd_resolve_and_free(h, c);
2485*82f01edcSBart Van Assche 	if (cmd)
2486*82f01edcSBart Van Assche 		scsi_done(cmd);
24878a0ff92cSWebb Scales }
24888a0ff92cSWebb Scales 
24898a0ff92cSWebb Scales static void hpsa_retry_cmd(struct ctlr_info *h, struct CommandList *c)
24908a0ff92cSWebb Scales {
24918a0ff92cSWebb Scales 	INIT_WORK(&c->work, hpsa_command_resubmit_worker);
24928a0ff92cSWebb Scales 	queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work);
24938a0ff92cSWebb Scales }
24948a0ff92cSWebb Scales 
2495c349775eSScott Teel static void process_ioaccel2_completion(struct ctlr_info *h,
2496c349775eSScott Teel 		struct CommandList *c, struct scsi_cmnd *cmd,
2497c349775eSScott Teel 		struct hpsa_scsi_dev_t *dev)
2498c349775eSScott Teel {
2499c349775eSScott Teel 	struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
2500c349775eSScott Teel 
2501c349775eSScott Teel 	/* check for good status */
2502c349775eSScott Teel 	if (likely(c2->error_data.serv_response == 0 &&
2503eeebce18SDon Brace 			c2->error_data.status == 0)) {
2504eeebce18SDon Brace 		cmd->result = 0;
25058a0ff92cSWebb Scales 		return hpsa_cmd_free_and_done(h, c, cmd);
2506eeebce18SDon Brace 	}
2507c349775eSScott Teel 
25088a0ff92cSWebb Scales 	/*
25098a0ff92cSWebb Scales 	 * Any RAID offload error results in retry which will use
2510b2582a65SDon Brace 	 * the normal I/O path so the controller can handle whatever is
2511c349775eSScott Teel 	 * wrong.
2512c349775eSScott Teel 	 */
2513f3f01730SKevin Barnett 	if (is_logical_device(dev) &&
2514c349775eSScott Teel 		c2->error_data.serv_response ==
2515c349775eSScott Teel 			IOACCEL2_SERV_RESPONSE_FAILURE) {
2516080ef1ccSDon Brace 		if (c2->error_data.status ==
2517064d1b1dSDon Brace 			IOACCEL2_STATUS_SR_IOACCEL_DISABLED) {
25183e16e83aSDon Brace 			hpsa_turn_off_ioaccel_for_device(dev);
2519064d1b1dSDon Brace 		}
25208a0ff92cSWebb Scales 
2521c5dfd106SDon Brace 		if (dev->in_reset) {
2522c5dfd106SDon Brace 			cmd->result = DID_RESET << 16;
2523c5dfd106SDon Brace 			return hpsa_cmd_free_and_done(h, c, cmd);
2524c5dfd106SDon Brace 		}
2525c5dfd106SDon Brace 
25268a0ff92cSWebb Scales 		return hpsa_retry_cmd(h, c);
2527080ef1ccSDon Brace 	}
2528080ef1ccSDon Brace 
2529ba74fdc4SDon Brace 	if (handle_ioaccel_mode2_error(h, c, cmd, c2, dev))
25308a0ff92cSWebb Scales 		return hpsa_retry_cmd(h, c);
2531080ef1ccSDon Brace 
25328a0ff92cSWebb Scales 	return hpsa_cmd_free_and_done(h, c, cmd);
2533c349775eSScott Teel }
2534c349775eSScott Teel 
25359437ac43SStephen Cameron /* Returns 0 on success, < 0 otherwise. */
25369437ac43SStephen Cameron static int hpsa_evaluate_tmf_status(struct ctlr_info *h,
25379437ac43SStephen Cameron 					struct CommandList *cp)
25389437ac43SStephen Cameron {
25399437ac43SStephen Cameron 	u8 tmf_status = cp->err_info->ScsiStatus;
25409437ac43SStephen Cameron 
25419437ac43SStephen Cameron 	switch (tmf_status) {
25429437ac43SStephen Cameron 	case CISS_TMF_COMPLETE:
25439437ac43SStephen Cameron 		/*
25449437ac43SStephen Cameron 		 * CISS_TMF_COMPLETE never happens, instead,
25459437ac43SStephen Cameron 		 * ei->CommandStatus == 0 for this case.
25469437ac43SStephen Cameron 		 */
25479437ac43SStephen Cameron 	case CISS_TMF_SUCCESS:
25489437ac43SStephen Cameron 		return 0;
25499437ac43SStephen Cameron 	case CISS_TMF_INVALID_FRAME:
25509437ac43SStephen Cameron 	case CISS_TMF_NOT_SUPPORTED:
25519437ac43SStephen Cameron 	case CISS_TMF_FAILED:
25529437ac43SStephen Cameron 	case CISS_TMF_WRONG_LUN:
25539437ac43SStephen Cameron 	case CISS_TMF_OVERLAPPED_TAG:
25549437ac43SStephen Cameron 		break;
25559437ac43SStephen Cameron 	default:
25569437ac43SStephen Cameron 		dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n",
25579437ac43SStephen Cameron 				tmf_status);
25589437ac43SStephen Cameron 		break;
25599437ac43SStephen Cameron 	}
25609437ac43SStephen Cameron 	return -tmf_status;
25619437ac43SStephen Cameron }
25629437ac43SStephen Cameron 
25631fb011fbSStephen M. Cameron static void complete_scsi_command(struct CommandList *cp)
2564edd16368SStephen M. Cameron {
2565edd16368SStephen M. Cameron 	struct scsi_cmnd *cmd;
2566edd16368SStephen M. Cameron 	struct ctlr_info *h;
2567edd16368SStephen M. Cameron 	struct ErrorInfo *ei;
2568283b4a9bSStephen M. Cameron 	struct hpsa_scsi_dev_t *dev;
2569d9a729f3SWebb Scales 	struct io_accel2_cmd *c2;
2570edd16368SStephen M. Cameron 
25719437ac43SStephen Cameron 	u8 sense_key;
25729437ac43SStephen Cameron 	u8 asc;      /* additional sense code */
25739437ac43SStephen Cameron 	u8 ascq;     /* additional sense code qualifier */
2574db111e18SStephen M. Cameron 	unsigned long sense_data_size;
2575edd16368SStephen M. Cameron 
2576edd16368SStephen M. Cameron 	ei = cp->err_info;
25777fa3030cSStephen Cameron 	cmd = cp->scsi_cmd;
2578edd16368SStephen M. Cameron 	h = cp->h;
2579d49c2077SDon Brace 
2580d49c2077SDon Brace 	if (!cmd->device) {
2581d49c2077SDon Brace 		cmd->result = DID_NO_CONNECT << 16;
2582d49c2077SDon Brace 		return hpsa_cmd_free_and_done(h, cp, cmd);
2583d49c2077SDon Brace 	}
2584d49c2077SDon Brace 
2585283b4a9bSStephen M. Cameron 	dev = cmd->device->hostdata;
258645e596cdSDon Brace 	if (!dev) {
258745e596cdSDon Brace 		cmd->result = DID_NO_CONNECT << 16;
258845e596cdSDon Brace 		return hpsa_cmd_free_and_done(h, cp, cmd);
258945e596cdSDon Brace 	}
2590d9a729f3SWebb Scales 	c2 = &h->ioaccel2_cmd_pool[cp->cmdindex];
2591edd16368SStephen M. Cameron 
2592edd16368SStephen M. Cameron 	scsi_dma_unmap(cmd); /* undo the DMA mappings */
2593e1f7de0cSMatt Gates 	if ((cp->cmd_type == CMD_SCSI) &&
25942b08b3e9SDon Brace 		(le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries))
259533a2ffceSStephen M. Cameron 		hpsa_unmap_sg_chain_block(h, cp);
2596edd16368SStephen M. Cameron 
2597d9a729f3SWebb Scales 	if ((cp->cmd_type == CMD_IOACCEL2) &&
2598d9a729f3SWebb Scales 		(c2->sg[0].chain_indicator == IOACCEL2_CHAIN))
2599d9a729f3SWebb Scales 		hpsa_unmap_ioaccel2_sg_chain_block(h, c2);
2600d9a729f3SWebb Scales 
2601edd16368SStephen M. Cameron 	cmd->result = (DID_OK << 16);		/* host byte */
2602c349775eSScott Teel 
26039e33f0d5SDon Brace 	/* SCSI command has already been cleaned up in SML */
26049e33f0d5SDon Brace 	if (dev->was_removed) {
26059e33f0d5SDon Brace 		hpsa_cmd_resolve_and_free(h, cp);
26069e33f0d5SDon Brace 		return;
26079e33f0d5SDon Brace 	}
26089e33f0d5SDon Brace 
2609d49c2077SDon Brace 	if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1) {
2610d49c2077SDon Brace 		if (dev->physical_device && dev->expose_device &&
2611d49c2077SDon Brace 			dev->removed) {
2612d49c2077SDon Brace 			cmd->result = DID_NO_CONNECT << 16;
2613d49c2077SDon Brace 			return hpsa_cmd_free_and_done(h, cp, cmd);
2614d49c2077SDon Brace 		}
2615d49c2077SDon Brace 		if (likely(cp->phys_disk != NULL))
261603383736SDon Brace 			atomic_dec(&cp->phys_disk->ioaccel_cmds_out);
2617d49c2077SDon Brace 	}
261803383736SDon Brace 
261925163bd5SWebb Scales 	/*
262025163bd5SWebb Scales 	 * We check for lockup status here as it may be set for
262125163bd5SWebb Scales 	 * CMD_SCSI, CMD_IOACCEL1 and CMD_IOACCEL2 commands by
262225163bd5SWebb Scales 	 * fail_all_oustanding_cmds()
262325163bd5SWebb Scales 	 */
262425163bd5SWebb Scales 	if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) {
262525163bd5SWebb Scales 		/* DID_NO_CONNECT will prevent a retry */
262625163bd5SWebb Scales 		cmd->result = DID_NO_CONNECT << 16;
26278a0ff92cSWebb Scales 		return hpsa_cmd_free_and_done(h, cp, cmd);
262825163bd5SWebb Scales 	}
262925163bd5SWebb Scales 
2630c349775eSScott Teel 	if (cp->cmd_type == CMD_IOACCEL2)
2631c349775eSScott Teel 		return process_ioaccel2_completion(h, cp, cmd, dev);
2632c349775eSScott Teel 
26336aa4c361SRobert Elliott 	scsi_set_resid(cmd, ei->ResidualCnt);
26348a0ff92cSWebb Scales 	if (ei->CommandStatus == 0)
26358a0ff92cSWebb Scales 		return hpsa_cmd_free_and_done(h, cp, cmd);
26366aa4c361SRobert Elliott 
2637e1f7de0cSMatt Gates 	/* For I/O accelerator commands, copy over some fields to the normal
2638e1f7de0cSMatt Gates 	 * CISS header used below for error handling.
2639e1f7de0cSMatt Gates 	 */
2640e1f7de0cSMatt Gates 	if (cp->cmd_type == CMD_IOACCEL1) {
2641e1f7de0cSMatt Gates 		struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex];
26422b08b3e9SDon Brace 		cp->Header.SGList = scsi_sg_count(cmd);
26432b08b3e9SDon Brace 		cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList);
26442b08b3e9SDon Brace 		cp->Request.CDBLen = le16_to_cpu(c->io_flags) &
26452b08b3e9SDon Brace 			IOACCEL1_IOFLAGS_CDBLEN_MASK;
264650a0decfSStephen M. Cameron 		cp->Header.tag = c->tag;
2647e1f7de0cSMatt Gates 		memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8);
2648e1f7de0cSMatt Gates 		memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen);
2649283b4a9bSStephen M. Cameron 
2650283b4a9bSStephen M. Cameron 		/* Any RAID offload error results in retry which will use
2651283b4a9bSStephen M. Cameron 		 * the normal I/O path so the controller can handle whatever's
2652283b4a9bSStephen M. Cameron 		 * wrong.
2653283b4a9bSStephen M. Cameron 		 */
2654f3f01730SKevin Barnett 		if (is_logical_device(dev)) {
2655283b4a9bSStephen M. Cameron 			if (ei->CommandStatus == CMD_IOACCEL_DISABLED)
2656283b4a9bSStephen M. Cameron 				dev->offload_enabled = 0;
26578a0ff92cSWebb Scales 			return hpsa_retry_cmd(h, cp);
2658283b4a9bSStephen M. Cameron 		}
2659e1f7de0cSMatt Gates 	}
2660e1f7de0cSMatt Gates 
2661edd16368SStephen M. Cameron 	/* an error has occurred */
2662edd16368SStephen M. Cameron 	switch (ei->CommandStatus) {
2663edd16368SStephen M. Cameron 
2664edd16368SStephen M. Cameron 	case CMD_TARGET_STATUS:
26659437ac43SStephen Cameron 		cmd->result |= ei->ScsiStatus;
26669437ac43SStephen Cameron 		/* copy the sense data */
26679437ac43SStephen Cameron 		if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
26689437ac43SStephen Cameron 			sense_data_size = SCSI_SENSE_BUFFERSIZE;
26699437ac43SStephen Cameron 		else
26709437ac43SStephen Cameron 			sense_data_size = sizeof(ei->SenseInfo);
26719437ac43SStephen Cameron 		if (ei->SenseLen < sense_data_size)
26729437ac43SStephen Cameron 			sense_data_size = ei->SenseLen;
26739437ac43SStephen Cameron 		memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
26749437ac43SStephen Cameron 		if (ei->ScsiStatus)
26759437ac43SStephen Cameron 			decode_sense_data(ei->SenseInfo, sense_data_size,
26769437ac43SStephen Cameron 				&sense_key, &asc, &ascq);
2677edd16368SStephen M. Cameron 		if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
267849ea45cbSDon Brace 			switch (sense_key) {
267949ea45cbSDon Brace 			case ABORTED_COMMAND:
26802e311fbaSStephen M. Cameron 				cmd->result |= DID_SOFT_ERROR << 16;
26811d3b3609SMatt Gates 				break;
268249ea45cbSDon Brace 			case UNIT_ATTENTION:
268349ea45cbSDon Brace 				if (asc == 0x3F && ascq == 0x0E)
268449ea45cbSDon Brace 					h->drv_req_rescan = 1;
268549ea45cbSDon Brace 				break;
268649ea45cbSDon Brace 			case ILLEGAL_REQUEST:
268749ea45cbSDon Brace 				if (asc == 0x25 && ascq == 0x00) {
268849ea45cbSDon Brace 					dev->removed = 1;
268949ea45cbSDon Brace 					cmd->result = DID_NO_CONNECT << 16;
269049ea45cbSDon Brace 				}
269149ea45cbSDon Brace 				break;
26921d3b3609SMatt Gates 			}
2693edd16368SStephen M. Cameron 			break;
2694edd16368SStephen M. Cameron 		}
2695edd16368SStephen M. Cameron 		/* Problem was not a check condition
2696edd16368SStephen M. Cameron 		 * Pass it up to the upper layers...
2697edd16368SStephen M. Cameron 		 */
2698edd16368SStephen M. Cameron 		if (ei->ScsiStatus) {
2699edd16368SStephen M. Cameron 			dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
2700edd16368SStephen M. Cameron 				"Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
2701edd16368SStephen M. Cameron 				"Returning result: 0x%x\n",
2702edd16368SStephen M. Cameron 				cp, ei->ScsiStatus,
2703edd16368SStephen M. Cameron 				sense_key, asc, ascq,
2704edd16368SStephen M. Cameron 				cmd->result);
2705edd16368SStephen M. Cameron 		} else {  /* scsi status is zero??? How??? */
2706edd16368SStephen M. Cameron 			dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
2707edd16368SStephen M. Cameron 				"Returning no connection.\n", cp),
2708edd16368SStephen M. Cameron 
2709edd16368SStephen M. Cameron 			/* Ordinarily, this case should never happen,
2710edd16368SStephen M. Cameron 			 * but there is a bug in some released firmware
2711edd16368SStephen M. Cameron 			 * revisions that allows it to happen if, for
2712edd16368SStephen M. Cameron 			 * example, a 4100 backplane loses power and
2713edd16368SStephen M. Cameron 			 * the tape drive is in it.  We assume that
2714edd16368SStephen M. Cameron 			 * it's a fatal error of some kind because we
2715edd16368SStephen M. Cameron 			 * can't show that it wasn't. We will make it
2716edd16368SStephen M. Cameron 			 * look like selection timeout since that is
2717edd16368SStephen M. Cameron 			 * the most common reason for this to occur,
2718edd16368SStephen M. Cameron 			 * and it's severe enough.
2719edd16368SStephen M. Cameron 			 */
2720edd16368SStephen M. Cameron 
2721edd16368SStephen M. Cameron 			cmd->result = DID_NO_CONNECT << 16;
2722edd16368SStephen M. Cameron 		}
2723edd16368SStephen M. Cameron 		break;
2724edd16368SStephen M. Cameron 
2725edd16368SStephen M. Cameron 	case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2726edd16368SStephen M. Cameron 		break;
2727edd16368SStephen M. Cameron 	case CMD_DATA_OVERRUN:
2728f42e81e1SStephen Cameron 		dev_warn(&h->pdev->dev,
2729f42e81e1SStephen Cameron 			"CDB %16phN data overrun\n", cp->Request.CDB);
2730edd16368SStephen M. Cameron 		break;
2731edd16368SStephen M. Cameron 	case CMD_INVALID: {
2732edd16368SStephen M. Cameron 		/* print_bytes(cp, sizeof(*cp), 1, 0);
2733edd16368SStephen M. Cameron 		print_cmd(cp); */
2734edd16368SStephen M. Cameron 		/* We get CMD_INVALID if you address a non-existent device
2735edd16368SStephen M. Cameron 		 * instead of a selection timeout (no response).  You will
2736edd16368SStephen M. Cameron 		 * see this if you yank out a drive, then try to access it.
2737edd16368SStephen M. Cameron 		 * This is kind of a shame because it means that any other
2738edd16368SStephen M. Cameron 		 * CMD_INVALID (e.g. driver bug) will get interpreted as a
2739edd16368SStephen M. Cameron 		 * missing target. */
2740edd16368SStephen M. Cameron 		cmd->result = DID_NO_CONNECT << 16;
2741edd16368SStephen M. Cameron 	}
2742edd16368SStephen M. Cameron 		break;
2743edd16368SStephen M. Cameron 	case CMD_PROTOCOL_ERR:
2744256d0eaaSStephen M. Cameron 		cmd->result = DID_ERROR << 16;
2745f42e81e1SStephen Cameron 		dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n",
2746f42e81e1SStephen Cameron 				cp->Request.CDB);
2747edd16368SStephen M. Cameron 		break;
2748edd16368SStephen M. Cameron 	case CMD_HARDWARE_ERR:
2749edd16368SStephen M. Cameron 		cmd->result = DID_ERROR << 16;
2750f42e81e1SStephen Cameron 		dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n",
2751f42e81e1SStephen Cameron 			cp->Request.CDB);
2752edd16368SStephen M. Cameron 		break;
2753edd16368SStephen M. Cameron 	case CMD_CONNECTION_LOST:
2754edd16368SStephen M. Cameron 		cmd->result = DID_ERROR << 16;
2755f42e81e1SStephen Cameron 		dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n",
2756f42e81e1SStephen Cameron 			cp->Request.CDB);
2757edd16368SStephen M. Cameron 		break;
2758edd16368SStephen M. Cameron 	case CMD_ABORTED:
275908ec46f6SDon Brace 		cmd->result = DID_ABORT << 16;
276008ec46f6SDon Brace 		break;
2761edd16368SStephen M. Cameron 	case CMD_ABORT_FAILED:
2762edd16368SStephen M. Cameron 		cmd->result = DID_ERROR << 16;
2763f42e81e1SStephen Cameron 		dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n",
2764f42e81e1SStephen Cameron 			cp->Request.CDB);
2765edd16368SStephen M. Cameron 		break;
2766edd16368SStephen M. Cameron 	case CMD_UNSOLICITED_ABORT:
2767f6e76055SStephen M. Cameron 		cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
2768f42e81e1SStephen Cameron 		dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n",
2769f42e81e1SStephen Cameron 			cp->Request.CDB);
2770edd16368SStephen M. Cameron 		break;
2771edd16368SStephen M. Cameron 	case CMD_TIMEOUT:
2772edd16368SStephen M. Cameron 		cmd->result = DID_TIME_OUT << 16;
2773f42e81e1SStephen Cameron 		dev_warn(&h->pdev->dev, "CDB %16phN timed out\n",
2774f42e81e1SStephen Cameron 			cp->Request.CDB);
2775edd16368SStephen M. Cameron 		break;
27761d5e2ed0SStephen M. Cameron 	case CMD_UNABORTABLE:
27771d5e2ed0SStephen M. Cameron 		cmd->result = DID_ERROR << 16;
27781d5e2ed0SStephen M. Cameron 		dev_warn(&h->pdev->dev, "Command unabortable\n");
27791d5e2ed0SStephen M. Cameron 		break;
27809437ac43SStephen Cameron 	case CMD_TMF_STATUS:
27819437ac43SStephen Cameron 		if (hpsa_evaluate_tmf_status(h, cp)) /* TMF failed? */
27829437ac43SStephen Cameron 			cmd->result = DID_ERROR << 16;
27839437ac43SStephen Cameron 		break;
2784283b4a9bSStephen M. Cameron 	case CMD_IOACCEL_DISABLED:
2785283b4a9bSStephen M. Cameron 		/* This only handles the direct pass-through case since RAID
2786283b4a9bSStephen M. Cameron 		 * offload is handled above.  Just attempt a retry.
2787283b4a9bSStephen M. Cameron 		 */
2788283b4a9bSStephen M. Cameron 		cmd->result = DID_SOFT_ERROR << 16;
2789283b4a9bSStephen M. Cameron 		dev_warn(&h->pdev->dev,
2790283b4a9bSStephen M. Cameron 				"cp %p had HP SSD Smart Path error\n", cp);
2791283b4a9bSStephen M. Cameron 		break;
2792edd16368SStephen M. Cameron 	default:
2793edd16368SStephen M. Cameron 		cmd->result = DID_ERROR << 16;
2794edd16368SStephen M. Cameron 		dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
2795edd16368SStephen M. Cameron 				cp, ei->CommandStatus);
2796edd16368SStephen M. Cameron 	}
27978a0ff92cSWebb Scales 
27988a0ff92cSWebb Scales 	return hpsa_cmd_free_and_done(h, cp, cmd);
2799edd16368SStephen M. Cameron }
2800edd16368SStephen M. Cameron 
28018bc8f47eSChristoph Hellwig static void hpsa_pci_unmap(struct pci_dev *pdev, struct CommandList *c,
28028bc8f47eSChristoph Hellwig 		int sg_used, enum dma_data_direction data_direction)
2803edd16368SStephen M. Cameron {
2804edd16368SStephen M. Cameron 	int i;
2805edd16368SStephen M. Cameron 
280650a0decfSStephen M. Cameron 	for (i = 0; i < sg_used; i++)
28078bc8f47eSChristoph Hellwig 		dma_unmap_single(&pdev->dev, le64_to_cpu(c->SG[i].Addr),
280850a0decfSStephen M. Cameron 				le32_to_cpu(c->SG[i].Len),
2809edd16368SStephen M. Cameron 				data_direction);
2810edd16368SStephen M. Cameron }
2811edd16368SStephen M. Cameron 
2812a2dac136SStephen M. Cameron static int hpsa_map_one(struct pci_dev *pdev,
2813edd16368SStephen M. Cameron 		struct CommandList *cp,
2814edd16368SStephen M. Cameron 		unsigned char *buf,
2815edd16368SStephen M. Cameron 		size_t buflen,
28168bc8f47eSChristoph Hellwig 		enum dma_data_direction data_direction)
2817edd16368SStephen M. Cameron {
281801a02ffcSStephen M. Cameron 	u64 addr64;
2819edd16368SStephen M. Cameron 
28208bc8f47eSChristoph Hellwig 	if (buflen == 0 || data_direction == DMA_NONE) {
2821edd16368SStephen M. Cameron 		cp->Header.SGList = 0;
282250a0decfSStephen M. Cameron 		cp->Header.SGTotal = cpu_to_le16(0);
2823a2dac136SStephen M. Cameron 		return 0;
2824edd16368SStephen M. Cameron 	}
2825edd16368SStephen M. Cameron 
28268bc8f47eSChristoph Hellwig 	addr64 = dma_map_single(&pdev->dev, buf, buflen, data_direction);
2827eceaae18SShuah Khan 	if (dma_mapping_error(&pdev->dev, addr64)) {
2828a2dac136SStephen M. Cameron 		/* Prevent subsequent unmap of something never mapped */
2829eceaae18SShuah Khan 		cp->Header.SGList = 0;
283050a0decfSStephen M. Cameron 		cp->Header.SGTotal = cpu_to_le16(0);
2831a2dac136SStephen M. Cameron 		return -1;
2832eceaae18SShuah Khan 	}
283350a0decfSStephen M. Cameron 	cp->SG[0].Addr = cpu_to_le64(addr64);
283450a0decfSStephen M. Cameron 	cp->SG[0].Len = cpu_to_le32(buflen);
283550a0decfSStephen M. Cameron 	cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */
283650a0decfSStephen M. Cameron 	cp->Header.SGList = 1;   /* no. SGs contig in this cmd */
283750a0decfSStephen M. Cameron 	cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */
2838a2dac136SStephen M. Cameron 	return 0;
2839edd16368SStephen M. Cameron }
2840edd16368SStephen M. Cameron 
284125163bd5SWebb Scales #define NO_TIMEOUT ((unsigned long) -1)
284225163bd5SWebb Scales #define DEFAULT_TIMEOUT 30000 /* milliseconds */
284325163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
284425163bd5SWebb Scales 	struct CommandList *c, int reply_queue, unsigned long timeout_msecs)
2845edd16368SStephen M. Cameron {
2846edd16368SStephen M. Cameron 	DECLARE_COMPLETION_ONSTACK(wait);
2847edd16368SStephen M. Cameron 
2848edd16368SStephen M. Cameron 	c->waiting = &wait;
284925163bd5SWebb Scales 	__enqueue_cmd_and_start_io(h, c, reply_queue);
285025163bd5SWebb Scales 	if (timeout_msecs == NO_TIMEOUT) {
285125163bd5SWebb Scales 		/* TODO: get rid of this no-timeout thing */
285225163bd5SWebb Scales 		wait_for_completion_io(&wait);
285325163bd5SWebb Scales 		return IO_OK;
285425163bd5SWebb Scales 	}
285525163bd5SWebb Scales 	if (!wait_for_completion_io_timeout(&wait,
285625163bd5SWebb Scales 					msecs_to_jiffies(timeout_msecs))) {
285725163bd5SWebb Scales 		dev_warn(&h->pdev->dev, "Command timed out.\n");
285825163bd5SWebb Scales 		return -ETIMEDOUT;
285925163bd5SWebb Scales 	}
286025163bd5SWebb Scales 	return IO_OK;
286125163bd5SWebb Scales }
286225163bd5SWebb Scales 
286325163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c,
286425163bd5SWebb Scales 				   int reply_queue, unsigned long timeout_msecs)
286525163bd5SWebb Scales {
286625163bd5SWebb Scales 	if (unlikely(lockup_detected(h))) {
286725163bd5SWebb Scales 		c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
286825163bd5SWebb Scales 		return IO_OK;
286925163bd5SWebb Scales 	}
287025163bd5SWebb Scales 	return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs);
2871edd16368SStephen M. Cameron }
2872edd16368SStephen M. Cameron 
2873094963daSStephen M. Cameron static u32 lockup_detected(struct ctlr_info *h)
2874094963daSStephen M. Cameron {
2875094963daSStephen M. Cameron 	int cpu;
2876094963daSStephen M. Cameron 	u32 rc, *lockup_detected;
2877094963daSStephen M. Cameron 
2878094963daSStephen M. Cameron 	cpu = get_cpu();
2879094963daSStephen M. Cameron 	lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
2880094963daSStephen M. Cameron 	rc = *lockup_detected;
2881094963daSStephen M. Cameron 	put_cpu();
2882094963daSStephen M. Cameron 	return rc;
2883094963daSStephen M. Cameron }
2884094963daSStephen M. Cameron 
28859c2fc160SStephen M. Cameron #define MAX_DRIVER_CMD_RETRIES 25
288625163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
28878bc8f47eSChristoph Hellwig 		struct CommandList *c, enum dma_data_direction data_direction,
28888bc8f47eSChristoph Hellwig 		unsigned long timeout_msecs)
2889edd16368SStephen M. Cameron {
28909c2fc160SStephen M. Cameron 	int backoff_time = 10, retry_count = 0;
289125163bd5SWebb Scales 	int rc;
2892edd16368SStephen M. Cameron 
2893edd16368SStephen M. Cameron 	do {
28947630abd0SJoe Perches 		memset(c->err_info, 0, sizeof(*c->err_info));
289525163bd5SWebb Scales 		rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
289625163bd5SWebb Scales 						  timeout_msecs);
289725163bd5SWebb Scales 		if (rc)
289825163bd5SWebb Scales 			break;
2899edd16368SStephen M. Cameron 		retry_count++;
29009c2fc160SStephen M. Cameron 		if (retry_count > 3) {
29019c2fc160SStephen M. Cameron 			msleep(backoff_time);
29029c2fc160SStephen M. Cameron 			if (backoff_time < 1000)
29039c2fc160SStephen M. Cameron 				backoff_time *= 2;
29049c2fc160SStephen M. Cameron 		}
2905852af20aSMatt Bondurant 	} while ((check_for_unit_attention(h, c) ||
29069c2fc160SStephen M. Cameron 			check_for_busy(h, c)) &&
29079c2fc160SStephen M. Cameron 			retry_count <= MAX_DRIVER_CMD_RETRIES);
2908edd16368SStephen M. Cameron 	hpsa_pci_unmap(h->pdev, c, 1, data_direction);
290925163bd5SWebb Scales 	if (retry_count > MAX_DRIVER_CMD_RETRIES)
291025163bd5SWebb Scales 		rc = -EIO;
291125163bd5SWebb Scales 	return rc;
2912edd16368SStephen M. Cameron }
2913edd16368SStephen M. Cameron 
2914d1e8beacSStephen M. Cameron static void hpsa_print_cmd(struct ctlr_info *h, char *txt,
2915d1e8beacSStephen M. Cameron 				struct CommandList *c)
2916edd16368SStephen M. Cameron {
2917d1e8beacSStephen M. Cameron 	const u8 *cdb = c->Request.CDB;
2918d1e8beacSStephen M. Cameron 	const u8 *lun = c->Header.LUN.LunAddrBytes;
2919edd16368SStephen M. Cameron 
2920609a70dfSRasmus Villemoes 	dev_warn(&h->pdev->dev, "%s: LUN:%8phN CDB:%16phN\n",
2921609a70dfSRasmus Villemoes 		 txt, lun, cdb);
2922d1e8beacSStephen M. Cameron }
2923d1e8beacSStephen M. Cameron 
2924d1e8beacSStephen M. Cameron static void hpsa_scsi_interpret_error(struct ctlr_info *h,
2925d1e8beacSStephen M. Cameron 			struct CommandList *cp)
2926d1e8beacSStephen M. Cameron {
2927d1e8beacSStephen M. Cameron 	const struct ErrorInfo *ei = cp->err_info;
2928d1e8beacSStephen M. Cameron 	struct device *d = &cp->h->pdev->dev;
29299437ac43SStephen Cameron 	u8 sense_key, asc, ascq;
29309437ac43SStephen Cameron 	int sense_len;
2931d1e8beacSStephen M. Cameron 
2932edd16368SStephen M. Cameron 	switch (ei->CommandStatus) {
2933edd16368SStephen M. Cameron 	case CMD_TARGET_STATUS:
29349437ac43SStephen Cameron 		if (ei->SenseLen > sizeof(ei->SenseInfo))
29359437ac43SStephen Cameron 			sense_len = sizeof(ei->SenseInfo);
29369437ac43SStephen Cameron 		else
29379437ac43SStephen Cameron 			sense_len = ei->SenseLen;
29389437ac43SStephen Cameron 		decode_sense_data(ei->SenseInfo, sense_len,
29399437ac43SStephen Cameron 					&sense_key, &asc, &ascq);
2940d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "SCSI status", cp);
2941d1e8beacSStephen M. Cameron 		if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION)
29429437ac43SStephen Cameron 			dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n",
29439437ac43SStephen Cameron 				sense_key, asc, ascq);
2944d1e8beacSStephen M. Cameron 		else
29459437ac43SStephen Cameron 			dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus);
2946edd16368SStephen M. Cameron 		if (ei->ScsiStatus == 0)
2947edd16368SStephen M. Cameron 			dev_warn(d, "SCSI status is abnormally zero.  "
2948edd16368SStephen M. Cameron 			"(probably indicates selection timeout "
2949edd16368SStephen M. Cameron 			"reported incorrectly due to a known "
2950edd16368SStephen M. Cameron 			"firmware bug, circa July, 2001.)\n");
2951edd16368SStephen M. Cameron 		break;
2952edd16368SStephen M. Cameron 	case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2953edd16368SStephen M. Cameron 		break;
2954edd16368SStephen M. Cameron 	case CMD_DATA_OVERRUN:
2955d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "overrun condition", cp);
2956edd16368SStephen M. Cameron 		break;
2957edd16368SStephen M. Cameron 	case CMD_INVALID: {
2958edd16368SStephen M. Cameron 		/* controller unfortunately reports SCSI passthru's
2959edd16368SStephen M. Cameron 		 * to non-existent targets as invalid commands.
2960edd16368SStephen M. Cameron 		 */
2961d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "invalid command", cp);
2962d1e8beacSStephen M. Cameron 		dev_warn(d, "probably means device no longer present\n");
2963edd16368SStephen M. Cameron 		}
2964edd16368SStephen M. Cameron 		break;
2965edd16368SStephen M. Cameron 	case CMD_PROTOCOL_ERR:
2966d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "protocol error", cp);
2967edd16368SStephen M. Cameron 		break;
2968edd16368SStephen M. Cameron 	case CMD_HARDWARE_ERR:
2969d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "hardware error", cp);
2970edd16368SStephen M. Cameron 		break;
2971edd16368SStephen M. Cameron 	case CMD_CONNECTION_LOST:
2972d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "connection lost", cp);
2973edd16368SStephen M. Cameron 		break;
2974edd16368SStephen M. Cameron 	case CMD_ABORTED:
2975d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "aborted", cp);
2976edd16368SStephen M. Cameron 		break;
2977edd16368SStephen M. Cameron 	case CMD_ABORT_FAILED:
2978d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "abort failed", cp);
2979edd16368SStephen M. Cameron 		break;
2980edd16368SStephen M. Cameron 	case CMD_UNSOLICITED_ABORT:
2981d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "unsolicited abort", cp);
2982edd16368SStephen M. Cameron 		break;
2983edd16368SStephen M. Cameron 	case CMD_TIMEOUT:
2984d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "timed out", cp);
2985edd16368SStephen M. Cameron 		break;
29861d5e2ed0SStephen M. Cameron 	case CMD_UNABORTABLE:
2987d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "unabortable", cp);
29881d5e2ed0SStephen M. Cameron 		break;
298925163bd5SWebb Scales 	case CMD_CTLR_LOCKUP:
299025163bd5SWebb Scales 		hpsa_print_cmd(h, "controller lockup detected", cp);
299125163bd5SWebb Scales 		break;
2992edd16368SStephen M. Cameron 	default:
2993d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "unknown status", cp);
2994d1e8beacSStephen M. Cameron 		dev_warn(d, "Unknown command status %x\n",
2995edd16368SStephen M. Cameron 				ei->CommandStatus);
2996edd16368SStephen M. Cameron 	}
2997edd16368SStephen M. Cameron }
2998edd16368SStephen M. Cameron 
29990a7c3bb8SDon Brace static int hpsa_do_receive_diagnostic(struct ctlr_info *h, u8 *scsi3addr,
30000a7c3bb8SDon Brace 					u8 page, u8 *buf, size_t bufsize)
30010a7c3bb8SDon Brace {
30020a7c3bb8SDon Brace 	int rc = IO_OK;
30030a7c3bb8SDon Brace 	struct CommandList *c;
30040a7c3bb8SDon Brace 	struct ErrorInfo *ei;
30050a7c3bb8SDon Brace 
30060a7c3bb8SDon Brace 	c = cmd_alloc(h);
30070a7c3bb8SDon Brace 	if (fill_cmd(c, RECEIVE_DIAGNOSTIC, h, buf, bufsize,
30080a7c3bb8SDon Brace 			page, scsi3addr, TYPE_CMD)) {
30090a7c3bb8SDon Brace 		rc = -1;
30100a7c3bb8SDon Brace 		goto out;
30110a7c3bb8SDon Brace 	}
30128bc8f47eSChristoph Hellwig 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
30138bc8f47eSChristoph Hellwig 			NO_TIMEOUT);
30140a7c3bb8SDon Brace 	if (rc)
30150a7c3bb8SDon Brace 		goto out;
30160a7c3bb8SDon Brace 	ei = c->err_info;
30170a7c3bb8SDon Brace 	if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
30180a7c3bb8SDon Brace 		hpsa_scsi_interpret_error(h, c);
30190a7c3bb8SDon Brace 		rc = -1;
30200a7c3bb8SDon Brace 	}
30210a7c3bb8SDon Brace out:
30220a7c3bb8SDon Brace 	cmd_free(h, c);
30230a7c3bb8SDon Brace 	return rc;
30240a7c3bb8SDon Brace }
30250a7c3bb8SDon Brace 
30260a7c3bb8SDon Brace static u64 hpsa_get_enclosure_logical_identifier(struct ctlr_info *h,
30270a7c3bb8SDon Brace 						u8 *scsi3addr)
30280a7c3bb8SDon Brace {
30290a7c3bb8SDon Brace 	u8 *buf;
30300a7c3bb8SDon Brace 	u64 sa = 0;
30310a7c3bb8SDon Brace 	int rc = 0;
30320a7c3bb8SDon Brace 
30330a7c3bb8SDon Brace 	buf = kzalloc(1024, GFP_KERNEL);
30340a7c3bb8SDon Brace 	if (!buf)
30350a7c3bb8SDon Brace 		return 0;
30360a7c3bb8SDon Brace 
30370a7c3bb8SDon Brace 	rc = hpsa_do_receive_diagnostic(h, scsi3addr, RECEIVE_DIAGNOSTIC,
30380a7c3bb8SDon Brace 					buf, 1024);
30390a7c3bb8SDon Brace 
30400a7c3bb8SDon Brace 	if (rc)
30410a7c3bb8SDon Brace 		goto out;
30420a7c3bb8SDon Brace 
30430a7c3bb8SDon Brace 	sa = get_unaligned_be64(buf+12);
30440a7c3bb8SDon Brace 
30450a7c3bb8SDon Brace out:
30460a7c3bb8SDon Brace 	kfree(buf);
30470a7c3bb8SDon Brace 	return sa;
30480a7c3bb8SDon Brace }
30490a7c3bb8SDon Brace 
3050edd16368SStephen M. Cameron static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
3051b7bb24ebSStephen M. Cameron 			u16 page, unsigned char *buf,
3052edd16368SStephen M. Cameron 			unsigned char bufsize)
3053edd16368SStephen M. Cameron {
3054edd16368SStephen M. Cameron 	int rc = IO_OK;
3055edd16368SStephen M. Cameron 	struct CommandList *c;
3056edd16368SStephen M. Cameron 	struct ErrorInfo *ei;
3057edd16368SStephen M. Cameron 
305845fcb86eSStephen Cameron 	c = cmd_alloc(h);
3059edd16368SStephen M. Cameron 
3060a2dac136SStephen M. Cameron 	if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize,
3061a2dac136SStephen M. Cameron 			page, scsi3addr, TYPE_CMD)) {
3062a2dac136SStephen M. Cameron 		rc = -1;
3063a2dac136SStephen M. Cameron 		goto out;
3064a2dac136SStephen M. Cameron 	}
30658bc8f47eSChristoph Hellwig 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
30668bc8f47eSChristoph Hellwig 			NO_TIMEOUT);
306725163bd5SWebb Scales 	if (rc)
306825163bd5SWebb Scales 		goto out;
3069edd16368SStephen M. Cameron 	ei = c->err_info;
3070edd16368SStephen M. Cameron 	if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3071d1e8beacSStephen M. Cameron 		hpsa_scsi_interpret_error(h, c);
3072edd16368SStephen M. Cameron 		rc = -1;
3073edd16368SStephen M. Cameron 	}
3074a2dac136SStephen M. Cameron out:
307545fcb86eSStephen Cameron 	cmd_free(h, c);
3076edd16368SStephen M. Cameron 	return rc;
3077edd16368SStephen M. Cameron }
3078edd16368SStephen M. Cameron 
3079c5dfd106SDon Brace static int hpsa_send_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev,
308025163bd5SWebb Scales 	u8 reset_type, int reply_queue)
3081edd16368SStephen M. Cameron {
3082edd16368SStephen M. Cameron 	int rc = IO_OK;
3083edd16368SStephen M. Cameron 	struct CommandList *c;
3084edd16368SStephen M. Cameron 	struct ErrorInfo *ei;
3085edd16368SStephen M. Cameron 
308645fcb86eSStephen Cameron 	c = cmd_alloc(h);
3087c5dfd106SDon Brace 	c->device = dev;
3088edd16368SStephen M. Cameron 
3089a2dac136SStephen M. Cameron 	/* fill_cmd can't fail here, no data buffer to map. */
3090c5dfd106SDon Brace 	(void) fill_cmd(c, reset_type, h, NULL, 0, 0, dev->scsi3addr, TYPE_MSG);
30912ef28849SDon Brace 	rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
309225163bd5SWebb Scales 	if (rc) {
309325163bd5SWebb Scales 		dev_warn(&h->pdev->dev, "Failed to send reset command\n");
309425163bd5SWebb Scales 		goto out;
309525163bd5SWebb Scales 	}
3096edd16368SStephen M. Cameron 	/* no unmap needed here because no data xfer. */
3097edd16368SStephen M. Cameron 
3098edd16368SStephen M. Cameron 	ei = c->err_info;
3099edd16368SStephen M. Cameron 	if (ei->CommandStatus != 0) {
3100d1e8beacSStephen M. Cameron 		hpsa_scsi_interpret_error(h, c);
3101edd16368SStephen M. Cameron 		rc = -1;
3102edd16368SStephen M. Cameron 	}
310325163bd5SWebb Scales out:
310445fcb86eSStephen Cameron 	cmd_free(h, c);
3105edd16368SStephen M. Cameron 	return rc;
3106edd16368SStephen M. Cameron }
3107edd16368SStephen M. Cameron 
3108d604f533SWebb Scales static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c,
3109d604f533SWebb Scales 			       struct hpsa_scsi_dev_t *dev,
3110d604f533SWebb Scales 			       unsigned char *scsi3addr)
3111d604f533SWebb Scales {
3112d604f533SWebb Scales 	int i;
3113d604f533SWebb Scales 	bool match = false;
3114d604f533SWebb Scales 	struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
3115d604f533SWebb Scales 	struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2;
3116d604f533SWebb Scales 
3117d604f533SWebb Scales 	if (hpsa_is_cmd_idle(c))
3118d604f533SWebb Scales 		return false;
3119d604f533SWebb Scales 
3120d604f533SWebb Scales 	switch (c->cmd_type) {
3121d604f533SWebb Scales 	case CMD_SCSI:
3122d604f533SWebb Scales 	case CMD_IOCTL_PEND:
3123d604f533SWebb Scales 		match = !memcmp(scsi3addr, &c->Header.LUN.LunAddrBytes,
3124d604f533SWebb Scales 				sizeof(c->Header.LUN.LunAddrBytes));
3125d604f533SWebb Scales 		break;
3126d604f533SWebb Scales 
3127d604f533SWebb Scales 	case CMD_IOACCEL1:
3128d604f533SWebb Scales 	case CMD_IOACCEL2:
3129d604f533SWebb Scales 		if (c->phys_disk == dev) {
3130d604f533SWebb Scales 			/* HBA mode match */
3131d604f533SWebb Scales 			match = true;
3132d604f533SWebb Scales 		} else {
3133d604f533SWebb Scales 			/* Possible RAID mode -- check each phys dev. */
3134d604f533SWebb Scales 			/* FIXME:  Do we need to take out a lock here?  If
3135d604f533SWebb Scales 			 * so, we could just call hpsa_get_pdisk_of_ioaccel2()
3136d604f533SWebb Scales 			 * instead. */
3137d604f533SWebb Scales 			for (i = 0; i < dev->nphysical_disks && !match; i++) {
3138d604f533SWebb Scales 				/* FIXME: an alternate test might be
3139d604f533SWebb Scales 				 *
3140d604f533SWebb Scales 				 * match = dev->phys_disk[i]->ioaccel_handle
3141d604f533SWebb Scales 				 *              == c2->scsi_nexus;      */
3142d604f533SWebb Scales 				match = dev->phys_disk[i] == c->phys_disk;
3143d604f533SWebb Scales 			}
3144d604f533SWebb Scales 		}
3145d604f533SWebb Scales 		break;
3146d604f533SWebb Scales 
3147d604f533SWebb Scales 	case IOACCEL2_TMF:
3148d604f533SWebb Scales 		for (i = 0; i < dev->nphysical_disks && !match; i++) {
3149d604f533SWebb Scales 			match = dev->phys_disk[i]->ioaccel_handle ==
3150d604f533SWebb Scales 					le32_to_cpu(ac->it_nexus);
3151d604f533SWebb Scales 		}
3152d604f533SWebb Scales 		break;
3153d604f533SWebb Scales 
3154d604f533SWebb Scales 	case 0:		/* The command is in the middle of being initialized. */
3155d604f533SWebb Scales 		match = false;
3156d604f533SWebb Scales 		break;
3157d604f533SWebb Scales 
3158d604f533SWebb Scales 	default:
3159d604f533SWebb Scales 		dev_err(&h->pdev->dev, "unexpected cmd_type: %d\n",
3160d604f533SWebb Scales 			c->cmd_type);
3161d604f533SWebb Scales 		BUG();
3162d604f533SWebb Scales 	}
3163d604f533SWebb Scales 
3164d604f533SWebb Scales 	return match;
3165d604f533SWebb Scales }
3166d604f533SWebb Scales 
3167d604f533SWebb Scales static int hpsa_do_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev,
3168c5dfd106SDon Brace 	u8 reset_type, int reply_queue)
3169d604f533SWebb Scales {
3170d604f533SWebb Scales 	int rc = 0;
3171d604f533SWebb Scales 
3172d604f533SWebb Scales 	/* We can really only handle one reset at a time */
3173d604f533SWebb Scales 	if (mutex_lock_interruptible(&h->reset_mutex) == -EINTR) {
3174d604f533SWebb Scales 		dev_warn(&h->pdev->dev, "concurrent reset wait interrupted.\n");
3175d604f533SWebb Scales 		return -EINTR;
3176d604f533SWebb Scales 	}
3177d604f533SWebb Scales 
3178c5dfd106SDon Brace 	rc = hpsa_send_reset(h, dev, reset_type, reply_queue);
3179c5dfd106SDon Brace 	if (!rc) {
3180c5dfd106SDon Brace 		/* incremented by sending the reset request */
3181c5dfd106SDon Brace 		atomic_dec(&dev->commands_outstanding);
3182d604f533SWebb Scales 		wait_event(h->event_sync_wait_queue,
3183c5dfd106SDon Brace 			atomic_read(&dev->commands_outstanding) <= 0 ||
3184d604f533SWebb Scales 			lockup_detected(h));
3185c5dfd106SDon Brace 	}
3186d604f533SWebb Scales 
3187d604f533SWebb Scales 	if (unlikely(lockup_detected(h))) {
3188d604f533SWebb Scales 		dev_warn(&h->pdev->dev,
3189d604f533SWebb Scales 			 "Controller lockup detected during reset wait\n");
3190d604f533SWebb Scales 		rc = -ENODEV;
3191d604f533SWebb Scales 	}
3192d604f533SWebb Scales 
3193c5dfd106SDon Brace 	if (!rc)
3194c5dfd106SDon Brace 		rc = wait_for_device_to_become_ready(h, dev->scsi3addr, 0);
3195d604f533SWebb Scales 
3196d604f533SWebb Scales 	mutex_unlock(&h->reset_mutex);
3197d604f533SWebb Scales 	return rc;
3198d604f533SWebb Scales }
3199d604f533SWebb Scales 
3200edd16368SStephen M. Cameron static void hpsa_get_raid_level(struct ctlr_info *h,
3201edd16368SStephen M. Cameron 	unsigned char *scsi3addr, unsigned char *raid_level)
3202edd16368SStephen M. Cameron {
3203edd16368SStephen M. Cameron 	int rc;
3204edd16368SStephen M. Cameron 	unsigned char *buf;
3205edd16368SStephen M. Cameron 
3206edd16368SStephen M. Cameron 	*raid_level = RAID_UNKNOWN;
3207edd16368SStephen M. Cameron 	buf = kzalloc(64, GFP_KERNEL);
3208edd16368SStephen M. Cameron 	if (!buf)
3209edd16368SStephen M. Cameron 		return;
32108383278dSScott Teel 
32118383278dSScott Teel 	if (!hpsa_vpd_page_supported(h, scsi3addr,
32128383278dSScott Teel 		HPSA_VPD_LV_DEVICE_GEOMETRY))
32138383278dSScott Teel 		goto exit;
32148383278dSScott Teel 
32158383278dSScott Teel 	rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE |
32168383278dSScott Teel 		HPSA_VPD_LV_DEVICE_GEOMETRY, buf, 64);
32178383278dSScott Teel 
3218edd16368SStephen M. Cameron 	if (rc == 0)
3219edd16368SStephen M. Cameron 		*raid_level = buf[8];
3220edd16368SStephen M. Cameron 	if (*raid_level > RAID_UNKNOWN)
3221edd16368SStephen M. Cameron 		*raid_level = RAID_UNKNOWN;
32228383278dSScott Teel exit:
3223edd16368SStephen M. Cameron 	kfree(buf);
3224edd16368SStephen M. Cameron 	return;
3225edd16368SStephen M. Cameron }
3226edd16368SStephen M. Cameron 
3227283b4a9bSStephen M. Cameron #define HPSA_MAP_DEBUG
3228283b4a9bSStephen M. Cameron #ifdef HPSA_MAP_DEBUG
3229283b4a9bSStephen M. Cameron static void hpsa_debug_map_buff(struct ctlr_info *h, int rc,
3230283b4a9bSStephen M. Cameron 				struct raid_map_data *map_buff)
3231283b4a9bSStephen M. Cameron {
3232283b4a9bSStephen M. Cameron 	struct raid_map_disk_data *dd = &map_buff->data[0];
3233283b4a9bSStephen M. Cameron 	int map, row, col;
3234283b4a9bSStephen M. Cameron 	u16 map_cnt, row_cnt, disks_per_row;
3235283b4a9bSStephen M. Cameron 
3236283b4a9bSStephen M. Cameron 	if (rc != 0)
3237283b4a9bSStephen M. Cameron 		return;
3238283b4a9bSStephen M. Cameron 
32392ba8bfc8SStephen M. Cameron 	/* Show details only if debugging has been activated. */
32402ba8bfc8SStephen M. Cameron 	if (h->raid_offload_debug < 2)
32412ba8bfc8SStephen M. Cameron 		return;
32422ba8bfc8SStephen M. Cameron 
3243283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "structure_size = %u\n",
3244283b4a9bSStephen M. Cameron 				le32_to_cpu(map_buff->structure_size));
3245283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "volume_blk_size = %u\n",
3246283b4a9bSStephen M. Cameron 			le32_to_cpu(map_buff->volume_blk_size));
3247283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n",
3248283b4a9bSStephen M. Cameron 			le64_to_cpu(map_buff->volume_blk_cnt));
3249283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "physicalBlockShift = %u\n",
3250283b4a9bSStephen M. Cameron 			map_buff->phys_blk_shift);
3251283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n",
3252283b4a9bSStephen M. Cameron 			map_buff->parity_rotation_shift);
3253283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "strip_size = %u\n",
3254283b4a9bSStephen M. Cameron 			le16_to_cpu(map_buff->strip_size));
3255283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n",
3256283b4a9bSStephen M. Cameron 			le64_to_cpu(map_buff->disk_starting_blk));
3257283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n",
3258283b4a9bSStephen M. Cameron 			le64_to_cpu(map_buff->disk_blk_cnt));
3259283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "data_disks_per_row = %u\n",
3260283b4a9bSStephen M. Cameron 			le16_to_cpu(map_buff->data_disks_per_row));
3261283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n",
3262283b4a9bSStephen M. Cameron 			le16_to_cpu(map_buff->metadata_disks_per_row));
3263283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "row_cnt = %u\n",
3264283b4a9bSStephen M. Cameron 			le16_to_cpu(map_buff->row_cnt));
3265283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "layout_map_count = %u\n",
3266283b4a9bSStephen M. Cameron 			le16_to_cpu(map_buff->layout_map_count));
32672b08b3e9SDon Brace 	dev_info(&h->pdev->dev, "flags = 0x%x\n",
3268dd0e19f3SScott Teel 			le16_to_cpu(map_buff->flags));
3269ba82d91bSColin Ian King 	dev_info(&h->pdev->dev, "encryption = %s\n",
32702b08b3e9SDon Brace 			le16_to_cpu(map_buff->flags) &
32712b08b3e9SDon Brace 			RAID_MAP_FLAG_ENCRYPT_ON ?  "ON" : "OFF");
3272dd0e19f3SScott Teel 	dev_info(&h->pdev->dev, "dekindex = %u\n",
3273dd0e19f3SScott Teel 			le16_to_cpu(map_buff->dekindex));
3274283b4a9bSStephen M. Cameron 	map_cnt = le16_to_cpu(map_buff->layout_map_count);
3275283b4a9bSStephen M. Cameron 	for (map = 0; map < map_cnt; map++) {
3276283b4a9bSStephen M. Cameron 		dev_info(&h->pdev->dev, "Map%u:\n", map);
3277283b4a9bSStephen M. Cameron 		row_cnt = le16_to_cpu(map_buff->row_cnt);
3278283b4a9bSStephen M. Cameron 		for (row = 0; row < row_cnt; row++) {
3279283b4a9bSStephen M. Cameron 			dev_info(&h->pdev->dev, "  Row%u:\n", row);
3280283b4a9bSStephen M. Cameron 			disks_per_row =
3281283b4a9bSStephen M. Cameron 				le16_to_cpu(map_buff->data_disks_per_row);
3282283b4a9bSStephen M. Cameron 			for (col = 0; col < disks_per_row; col++, dd++)
3283283b4a9bSStephen M. Cameron 				dev_info(&h->pdev->dev,
3284283b4a9bSStephen M. Cameron 					"    D%02u: h=0x%04x xor=%u,%u\n",
3285283b4a9bSStephen M. Cameron 					col, dd->ioaccel_handle,
3286283b4a9bSStephen M. Cameron 					dd->xor_mult[0], dd->xor_mult[1]);
3287283b4a9bSStephen M. Cameron 			disks_per_row =
3288283b4a9bSStephen M. Cameron 				le16_to_cpu(map_buff->metadata_disks_per_row);
3289283b4a9bSStephen M. Cameron 			for (col = 0; col < disks_per_row; col++, dd++)
3290283b4a9bSStephen M. Cameron 				dev_info(&h->pdev->dev,
3291283b4a9bSStephen M. Cameron 					"    M%02u: h=0x%04x xor=%u,%u\n",
3292283b4a9bSStephen M. Cameron 					col, dd->ioaccel_handle,
3293283b4a9bSStephen M. Cameron 					dd->xor_mult[0], dd->xor_mult[1]);
3294283b4a9bSStephen M. Cameron 		}
3295283b4a9bSStephen M. Cameron 	}
3296283b4a9bSStephen M. Cameron }
3297283b4a9bSStephen M. Cameron #else
3298283b4a9bSStephen M. Cameron static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h,
3299283b4a9bSStephen M. Cameron 			__attribute__((unused)) int rc,
3300283b4a9bSStephen M. Cameron 			__attribute__((unused)) struct raid_map_data *map_buff)
3301283b4a9bSStephen M. Cameron {
3302283b4a9bSStephen M. Cameron }
3303283b4a9bSStephen M. Cameron #endif
3304283b4a9bSStephen M. Cameron 
3305283b4a9bSStephen M. Cameron static int hpsa_get_raid_map(struct ctlr_info *h,
3306283b4a9bSStephen M. Cameron 	unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
3307283b4a9bSStephen M. Cameron {
3308283b4a9bSStephen M. Cameron 	int rc = 0;
3309283b4a9bSStephen M. Cameron 	struct CommandList *c;
3310283b4a9bSStephen M. Cameron 	struct ErrorInfo *ei;
3311283b4a9bSStephen M. Cameron 
331245fcb86eSStephen Cameron 	c = cmd_alloc(h);
3313bf43caf3SRobert Elliott 
3314283b4a9bSStephen M. Cameron 	if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map,
3315283b4a9bSStephen M. Cameron 			sizeof(this_device->raid_map), 0,
3316283b4a9bSStephen M. Cameron 			scsi3addr, TYPE_CMD)) {
33172dd02d74SRobert Elliott 		dev_warn(&h->pdev->dev, "hpsa_get_raid_map fill_cmd failed\n");
33182dd02d74SRobert Elliott 		cmd_free(h, c);
33192dd02d74SRobert Elliott 		return -1;
3320283b4a9bSStephen M. Cameron 	}
33218bc8f47eSChristoph Hellwig 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
33228bc8f47eSChristoph Hellwig 			NO_TIMEOUT);
332325163bd5SWebb Scales 	if (rc)
332425163bd5SWebb Scales 		goto out;
3325283b4a9bSStephen M. Cameron 	ei = c->err_info;
3326283b4a9bSStephen M. Cameron 	if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3327d1e8beacSStephen M. Cameron 		hpsa_scsi_interpret_error(h, c);
332825163bd5SWebb Scales 		rc = -1;
332925163bd5SWebb Scales 		goto out;
3330283b4a9bSStephen M. Cameron 	}
333145fcb86eSStephen Cameron 	cmd_free(h, c);
3332283b4a9bSStephen M. Cameron 
3333283b4a9bSStephen M. Cameron 	/* @todo in the future, dynamically allocate RAID map memory */
3334283b4a9bSStephen M. Cameron 	if (le32_to_cpu(this_device->raid_map.structure_size) >
3335283b4a9bSStephen M. Cameron 				sizeof(this_device->raid_map)) {
3336283b4a9bSStephen M. Cameron 		dev_warn(&h->pdev->dev, "RAID map size is too large!\n");
3337283b4a9bSStephen M. Cameron 		rc = -1;
3338283b4a9bSStephen M. Cameron 	}
3339283b4a9bSStephen M. Cameron 	hpsa_debug_map_buff(h, rc, &this_device->raid_map);
3340283b4a9bSStephen M. Cameron 	return rc;
334125163bd5SWebb Scales out:
334225163bd5SWebb Scales 	cmd_free(h, c);
334325163bd5SWebb Scales 	return rc;
3344283b4a9bSStephen M. Cameron }
3345283b4a9bSStephen M. Cameron 
3346d04e62b9SKevin Barnett static int hpsa_bmic_sense_subsystem_information(struct ctlr_info *h,
3347d04e62b9SKevin Barnett 		unsigned char scsi3addr[], u16 bmic_device_index,
3348d04e62b9SKevin Barnett 		struct bmic_sense_subsystem_info *buf, size_t bufsize)
3349d04e62b9SKevin Barnett {
3350d04e62b9SKevin Barnett 	int rc = IO_OK;
3351d04e62b9SKevin Barnett 	struct CommandList *c;
3352d04e62b9SKevin Barnett 	struct ErrorInfo *ei;
3353d04e62b9SKevin Barnett 
3354d04e62b9SKevin Barnett 	c = cmd_alloc(h);
3355d04e62b9SKevin Barnett 
3356d04e62b9SKevin Barnett 	rc = fill_cmd(c, BMIC_SENSE_SUBSYSTEM_INFORMATION, h, buf, bufsize,
3357d04e62b9SKevin Barnett 		0, RAID_CTLR_LUNID, TYPE_CMD);
3358d04e62b9SKevin Barnett 	if (rc)
3359d04e62b9SKevin Barnett 		goto out;
3360d04e62b9SKevin Barnett 
3361d04e62b9SKevin Barnett 	c->Request.CDB[2] = bmic_device_index & 0xff;
3362d04e62b9SKevin Barnett 	c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff;
3363d04e62b9SKevin Barnett 
33648bc8f47eSChristoph Hellwig 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
33658bc8f47eSChristoph Hellwig 			NO_TIMEOUT);
3366d04e62b9SKevin Barnett 	if (rc)
3367d04e62b9SKevin Barnett 		goto out;
3368d04e62b9SKevin Barnett 	ei = c->err_info;
3369d04e62b9SKevin Barnett 	if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3370d04e62b9SKevin Barnett 		hpsa_scsi_interpret_error(h, c);
3371d04e62b9SKevin Barnett 		rc = -1;
3372d04e62b9SKevin Barnett 	}
3373d04e62b9SKevin Barnett out:
3374d04e62b9SKevin Barnett 	cmd_free(h, c);
3375d04e62b9SKevin Barnett 	return rc;
3376d04e62b9SKevin Barnett }
3377d04e62b9SKevin Barnett 
337866749d0dSScott Teel static int hpsa_bmic_id_controller(struct ctlr_info *h,
337966749d0dSScott Teel 	struct bmic_identify_controller *buf, size_t bufsize)
338066749d0dSScott Teel {
338166749d0dSScott Teel 	int rc = IO_OK;
338266749d0dSScott Teel 	struct CommandList *c;
338366749d0dSScott Teel 	struct ErrorInfo *ei;
338466749d0dSScott Teel 
338566749d0dSScott Teel 	c = cmd_alloc(h);
338666749d0dSScott Teel 
338766749d0dSScott Teel 	rc = fill_cmd(c, BMIC_IDENTIFY_CONTROLLER, h, buf, bufsize,
338866749d0dSScott Teel 		0, RAID_CTLR_LUNID, TYPE_CMD);
338966749d0dSScott Teel 	if (rc)
339066749d0dSScott Teel 		goto out;
339166749d0dSScott Teel 
33928bc8f47eSChristoph Hellwig 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
33938bc8f47eSChristoph Hellwig 			NO_TIMEOUT);
339466749d0dSScott Teel 	if (rc)
339566749d0dSScott Teel 		goto out;
339666749d0dSScott Teel 	ei = c->err_info;
339766749d0dSScott Teel 	if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
339866749d0dSScott Teel 		hpsa_scsi_interpret_error(h, c);
339966749d0dSScott Teel 		rc = -1;
340066749d0dSScott Teel 	}
340166749d0dSScott Teel out:
340266749d0dSScott Teel 	cmd_free(h, c);
340366749d0dSScott Teel 	return rc;
340466749d0dSScott Teel }
340566749d0dSScott Teel 
340603383736SDon Brace static int hpsa_bmic_id_physical_device(struct ctlr_info *h,
340703383736SDon Brace 		unsigned char scsi3addr[], u16 bmic_device_index,
340803383736SDon Brace 		struct bmic_identify_physical_device *buf, size_t bufsize)
340903383736SDon Brace {
341003383736SDon Brace 	int rc = IO_OK;
341103383736SDon Brace 	struct CommandList *c;
341203383736SDon Brace 	struct ErrorInfo *ei;
341303383736SDon Brace 
341403383736SDon Brace 	c = cmd_alloc(h);
341503383736SDon Brace 	rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize,
341603383736SDon Brace 		0, RAID_CTLR_LUNID, TYPE_CMD);
341703383736SDon Brace 	if (rc)
341803383736SDon Brace 		goto out;
341903383736SDon Brace 
342003383736SDon Brace 	c->Request.CDB[2] = bmic_device_index & 0xff;
342103383736SDon Brace 	c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff;
342203383736SDon Brace 
34238bc8f47eSChristoph Hellwig 	hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
34243026ff9bSDon Brace 						NO_TIMEOUT);
342503383736SDon Brace 	ei = c->err_info;
342603383736SDon Brace 	if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
342703383736SDon Brace 		hpsa_scsi_interpret_error(h, c);
342803383736SDon Brace 		rc = -1;
342903383736SDon Brace 	}
343003383736SDon Brace out:
343103383736SDon Brace 	cmd_free(h, c);
3432d04e62b9SKevin Barnett 
343303383736SDon Brace 	return rc;
343403383736SDon Brace }
343503383736SDon Brace 
3436cca8f13bSDon Brace /*
3437cca8f13bSDon Brace  * get enclosure information
3438cca8f13bSDon Brace  * struct ReportExtendedLUNdata *rlep - Used for BMIC drive number
3439cca8f13bSDon Brace  * struct hpsa_scsi_dev_t *encl_dev - device entry for enclosure
3440cca8f13bSDon Brace  * Uses id_physical_device to determine the box_index.
3441cca8f13bSDon Brace  */
3442cca8f13bSDon Brace static void hpsa_get_enclosure_info(struct ctlr_info *h,
3443cca8f13bSDon Brace 			unsigned char *scsi3addr,
3444cca8f13bSDon Brace 			struct ReportExtendedLUNdata *rlep, int rle_index,
3445cca8f13bSDon Brace 			struct hpsa_scsi_dev_t *encl_dev)
3446cca8f13bSDon Brace {
3447cca8f13bSDon Brace 	int rc = -1;
3448cca8f13bSDon Brace 	struct CommandList *c = NULL;
3449cca8f13bSDon Brace 	struct ErrorInfo *ei = NULL;
3450cca8f13bSDon Brace 	struct bmic_sense_storage_box_params *bssbp = NULL;
3451cca8f13bSDon Brace 	struct bmic_identify_physical_device *id_phys = NULL;
345227e1b94dSDon Brace 	struct ext_report_lun_entry *rle;
3453cca8f13bSDon Brace 	u16 bmic_device_index = 0;
3454cca8f13bSDon Brace 
345527e1b94dSDon Brace 	if (rle_index < 0 || rle_index >= HPSA_MAX_PHYS_LUN)
345627e1b94dSDon Brace 		return;
345727e1b94dSDon Brace 
345827e1b94dSDon Brace 	rle = &rlep->LUN[rle_index];
345927e1b94dSDon Brace 
346001d0e789SDon Brace 	encl_dev->eli =
34610a7c3bb8SDon Brace 		hpsa_get_enclosure_logical_identifier(h, scsi3addr);
34620a7c3bb8SDon Brace 
346301d0e789SDon Brace 	bmic_device_index = GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]);
346401d0e789SDon Brace 
34655ac517b8SDon Brace 	if (encl_dev->target == -1 || encl_dev->lun == -1) {
34665ac517b8SDon Brace 		rc = IO_OK;
34675ac517b8SDon Brace 		goto out;
34685ac517b8SDon Brace 	}
34695ac517b8SDon Brace 
347017a9e54aSDon Brace 	if (bmic_device_index == 0xFF00 || MASKED_DEVICE(&rle->lunid[0])) {
347117a9e54aSDon Brace 		rc = IO_OK;
3472cca8f13bSDon Brace 		goto out;
347317a9e54aSDon Brace 	}
3474cca8f13bSDon Brace 
3475cca8f13bSDon Brace 	bssbp = kzalloc(sizeof(*bssbp), GFP_KERNEL);
3476cca8f13bSDon Brace 	if (!bssbp)
3477cca8f13bSDon Brace 		goto out;
3478cca8f13bSDon Brace 
3479cca8f13bSDon Brace 	id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
3480cca8f13bSDon Brace 	if (!id_phys)
3481cca8f13bSDon Brace 		goto out;
3482cca8f13bSDon Brace 
3483cca8f13bSDon Brace 	rc = hpsa_bmic_id_physical_device(h, scsi3addr, bmic_device_index,
3484cca8f13bSDon Brace 						id_phys, sizeof(*id_phys));
3485cca8f13bSDon Brace 	if (rc) {
3486cca8f13bSDon Brace 		dev_warn(&h->pdev->dev, "%s: id_phys failed %d bdi[0x%x]\n",
3487cca8f13bSDon Brace 			__func__, encl_dev->external, bmic_device_index);
3488cca8f13bSDon Brace 		goto out;
3489cca8f13bSDon Brace 	}
3490cca8f13bSDon Brace 
3491cca8f13bSDon Brace 	c = cmd_alloc(h);
3492cca8f13bSDon Brace 
3493cca8f13bSDon Brace 	rc = fill_cmd(c, BMIC_SENSE_STORAGE_BOX_PARAMS, h, bssbp,
3494cca8f13bSDon Brace 			sizeof(*bssbp), 0, RAID_CTLR_LUNID, TYPE_CMD);
3495cca8f13bSDon Brace 
3496cca8f13bSDon Brace 	if (rc)
3497cca8f13bSDon Brace 		goto out;
3498cca8f13bSDon Brace 
3499cca8f13bSDon Brace 	if (id_phys->phys_connector[1] == 'E')
3500cca8f13bSDon Brace 		c->Request.CDB[5] = id_phys->box_index;
3501cca8f13bSDon Brace 	else
3502cca8f13bSDon Brace 		c->Request.CDB[5] = 0;
3503cca8f13bSDon Brace 
35048bc8f47eSChristoph Hellwig 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
35053026ff9bSDon Brace 						NO_TIMEOUT);
3506cca8f13bSDon Brace 	if (rc)
3507cca8f13bSDon Brace 		goto out;
3508cca8f13bSDon Brace 
3509cca8f13bSDon Brace 	ei = c->err_info;
3510cca8f13bSDon Brace 	if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3511cca8f13bSDon Brace 		rc = -1;
3512cca8f13bSDon Brace 		goto out;
3513cca8f13bSDon Brace 	}
3514cca8f13bSDon Brace 
3515cca8f13bSDon Brace 	encl_dev->box[id_phys->active_path_number] = bssbp->phys_box_on_port;
3516cca8f13bSDon Brace 	memcpy(&encl_dev->phys_connector[id_phys->active_path_number],
3517cca8f13bSDon Brace 		bssbp->phys_connector, sizeof(bssbp->phys_connector));
3518cca8f13bSDon Brace 
3519cca8f13bSDon Brace 	rc = IO_OK;
3520cca8f13bSDon Brace out:
3521cca8f13bSDon Brace 	kfree(bssbp);
3522cca8f13bSDon Brace 	kfree(id_phys);
3523cca8f13bSDon Brace 
3524cca8f13bSDon Brace 	if (c)
3525cca8f13bSDon Brace 		cmd_free(h, c);
3526cca8f13bSDon Brace 
3527cca8f13bSDon Brace 	if (rc != IO_OK)
3528cca8f13bSDon Brace 		hpsa_show_dev_msg(KERN_INFO, h, encl_dev,
3529b4e9ce1cSJulia Lawall 			"Error, could not get enclosure information");
3530cca8f13bSDon Brace }
3531cca8f13bSDon Brace 
3532d04e62b9SKevin Barnett static u64 hpsa_get_sas_address_from_report_physical(struct ctlr_info *h,
3533d04e62b9SKevin Barnett 						unsigned char *scsi3addr)
3534d04e62b9SKevin Barnett {
3535d04e62b9SKevin Barnett 	struct ReportExtendedLUNdata *physdev;
3536d04e62b9SKevin Barnett 	u32 nphysicals;
3537d04e62b9SKevin Barnett 	u64 sa = 0;
3538d04e62b9SKevin Barnett 	int i;
3539d04e62b9SKevin Barnett 
3540d04e62b9SKevin Barnett 	physdev = kzalloc(sizeof(*physdev), GFP_KERNEL);
3541d04e62b9SKevin Barnett 	if (!physdev)
3542d04e62b9SKevin Barnett 		return 0;
3543d04e62b9SKevin Barnett 
3544d04e62b9SKevin Barnett 	if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) {
3545d04e62b9SKevin Barnett 		dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
3546d04e62b9SKevin Barnett 		kfree(physdev);
3547d04e62b9SKevin Barnett 		return 0;
3548d04e62b9SKevin Barnett 	}
3549d04e62b9SKevin Barnett 	nphysicals = get_unaligned_be32(physdev->LUNListLength) / 24;
3550d04e62b9SKevin Barnett 
3551d04e62b9SKevin Barnett 	for (i = 0; i < nphysicals; i++)
3552d04e62b9SKevin Barnett 		if (!memcmp(&physdev->LUN[i].lunid[0], scsi3addr, 8)) {
3553d04e62b9SKevin Barnett 			sa = get_unaligned_be64(&physdev->LUN[i].wwid[0]);
3554d04e62b9SKevin Barnett 			break;
3555d04e62b9SKevin Barnett 		}
3556d04e62b9SKevin Barnett 
3557d04e62b9SKevin Barnett 	kfree(physdev);
3558d04e62b9SKevin Barnett 
3559d04e62b9SKevin Barnett 	return sa;
3560d04e62b9SKevin Barnett }
3561d04e62b9SKevin Barnett 
3562d04e62b9SKevin Barnett static void hpsa_get_sas_address(struct ctlr_info *h, unsigned char *scsi3addr,
3563d04e62b9SKevin Barnett 					struct hpsa_scsi_dev_t *dev)
3564d04e62b9SKevin Barnett {
3565d04e62b9SKevin Barnett 	int rc;
3566d04e62b9SKevin Barnett 	u64 sa = 0;
3567d04e62b9SKevin Barnett 
3568d04e62b9SKevin Barnett 	if (is_hba_lunid(scsi3addr)) {
3569d04e62b9SKevin Barnett 		struct bmic_sense_subsystem_info *ssi;
3570d04e62b9SKevin Barnett 
3571d04e62b9SKevin Barnett 		ssi = kzalloc(sizeof(*ssi), GFP_KERNEL);
35727e8a9486SAmit Kushwaha 		if (!ssi)
3573d04e62b9SKevin Barnett 			return;
3574d04e62b9SKevin Barnett 
3575d04e62b9SKevin Barnett 		rc = hpsa_bmic_sense_subsystem_information(h,
3576d04e62b9SKevin Barnett 					scsi3addr, 0, ssi, sizeof(*ssi));
3577d04e62b9SKevin Barnett 		if (rc == 0) {
3578d04e62b9SKevin Barnett 			sa = get_unaligned_be64(ssi->primary_world_wide_id);
3579d04e62b9SKevin Barnett 			h->sas_address = sa;
3580d04e62b9SKevin Barnett 		}
3581d04e62b9SKevin Barnett 
3582d04e62b9SKevin Barnett 		kfree(ssi);
3583d04e62b9SKevin Barnett 	} else
3584d04e62b9SKevin Barnett 		sa = hpsa_get_sas_address_from_report_physical(h, scsi3addr);
3585d04e62b9SKevin Barnett 
3586d04e62b9SKevin Barnett 	dev->sas_address = sa;
3587d04e62b9SKevin Barnett }
3588d04e62b9SKevin Barnett 
35894e188184SBader Ali Saleh static void hpsa_ext_ctrl_present(struct ctlr_info *h,
35904e188184SBader Ali Saleh 	struct ReportExtendedLUNdata *physdev)
35914e188184SBader Ali Saleh {
35924e188184SBader Ali Saleh 	u32 nphysicals;
35934e188184SBader Ali Saleh 	int i;
35944e188184SBader Ali Saleh 
35954e188184SBader Ali Saleh 	if (h->discovery_polling)
35964e188184SBader Ali Saleh 		return;
35974e188184SBader Ali Saleh 
35984e188184SBader Ali Saleh 	nphysicals = (get_unaligned_be32(physdev->LUNListLength) / 24) + 1;
35994e188184SBader Ali Saleh 
36004e188184SBader Ali Saleh 	for (i = 0; i < nphysicals; i++) {
36014e188184SBader Ali Saleh 		if (physdev->LUN[i].device_type ==
36024e188184SBader Ali Saleh 			BMIC_DEVICE_TYPE_CONTROLLER
36034e188184SBader Ali Saleh 			&& !is_hba_lunid(physdev->LUN[i].lunid)) {
36044e188184SBader Ali Saleh 			dev_info(&h->pdev->dev,
36054e188184SBader Ali Saleh 				"External controller present, activate discovery polling and disable rld caching\n");
36064e188184SBader Ali Saleh 			hpsa_disable_rld_caching(h);
36074e188184SBader Ali Saleh 			h->discovery_polling = 1;
36084e188184SBader Ali Saleh 			break;
36094e188184SBader Ali Saleh 		}
36104e188184SBader Ali Saleh 	}
36114e188184SBader Ali Saleh }
36124e188184SBader Ali Saleh 
3613d04e62b9SKevin Barnett /* Get a device id from inquiry page 0x83 */
36148383278dSScott Teel static bool hpsa_vpd_page_supported(struct ctlr_info *h,
36151b70150aSStephen M. Cameron 	unsigned char scsi3addr[], u8 page)
36161b70150aSStephen M. Cameron {
36171b70150aSStephen M. Cameron 	int rc;
36181b70150aSStephen M. Cameron 	int i;
36191b70150aSStephen M. Cameron 	int pages;
36201b70150aSStephen M. Cameron 	unsigned char *buf, bufsize;
36211b70150aSStephen M. Cameron 
36221b70150aSStephen M. Cameron 	buf = kzalloc(256, GFP_KERNEL);
36231b70150aSStephen M. Cameron 	if (!buf)
36248383278dSScott Teel 		return false;
36251b70150aSStephen M. Cameron 
36261b70150aSStephen M. Cameron 	/* Get the size of the page list first */
36271b70150aSStephen M. Cameron 	rc = hpsa_scsi_do_inquiry(h, scsi3addr,
36281b70150aSStephen M. Cameron 				VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
36291b70150aSStephen M. Cameron 				buf, HPSA_VPD_HEADER_SZ);
36301b70150aSStephen M. Cameron 	if (rc != 0)
36311b70150aSStephen M. Cameron 		goto exit_unsupported;
36321b70150aSStephen M. Cameron 	pages = buf[3];
36331b70150aSStephen M. Cameron 	if ((pages + HPSA_VPD_HEADER_SZ) <= 255)
36341b70150aSStephen M. Cameron 		bufsize = pages + HPSA_VPD_HEADER_SZ;
36351b70150aSStephen M. Cameron 	else
36361b70150aSStephen M. Cameron 		bufsize = 255;
36371b70150aSStephen M. Cameron 
36381b70150aSStephen M. Cameron 	/* Get the whole VPD page list */
36391b70150aSStephen M. Cameron 	rc = hpsa_scsi_do_inquiry(h, scsi3addr,
36401b70150aSStephen M. Cameron 				VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
36411b70150aSStephen M. Cameron 				buf, bufsize);
36421b70150aSStephen M. Cameron 	if (rc != 0)
36431b70150aSStephen M. Cameron 		goto exit_unsupported;
36441b70150aSStephen M. Cameron 
36451b70150aSStephen M. Cameron 	pages = buf[3];
36461b70150aSStephen M. Cameron 	for (i = 1; i <= pages; i++)
36471b70150aSStephen M. Cameron 		if (buf[3 + i] == page)
36481b70150aSStephen M. Cameron 			goto exit_supported;
36491b70150aSStephen M. Cameron exit_unsupported:
36501b70150aSStephen M. Cameron 	kfree(buf);
36518383278dSScott Teel 	return false;
36521b70150aSStephen M. Cameron exit_supported:
36531b70150aSStephen M. Cameron 	kfree(buf);
36548383278dSScott Teel 	return true;
36551b70150aSStephen M. Cameron }
36561b70150aSStephen M. Cameron 
3657b2582a65SDon Brace /*
3658b2582a65SDon Brace  * Called during a scan operation.
3659b2582a65SDon Brace  * Sets ioaccel status on the new device list, not the existing device list
3660b2582a65SDon Brace  *
3661b2582a65SDon Brace  * The device list used during I/O will be updated later in
3662b2582a65SDon Brace  * adjust_hpsa_scsi_table.
3663b2582a65SDon Brace  */
3664283b4a9bSStephen M. Cameron static void hpsa_get_ioaccel_status(struct ctlr_info *h,
3665283b4a9bSStephen M. Cameron 	unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
3666283b4a9bSStephen M. Cameron {
3667283b4a9bSStephen M. Cameron 	int rc;
3668283b4a9bSStephen M. Cameron 	unsigned char *buf;
3669283b4a9bSStephen M. Cameron 	u8 ioaccel_status;
3670283b4a9bSStephen M. Cameron 
3671283b4a9bSStephen M. Cameron 	this_device->offload_config = 0;
3672283b4a9bSStephen M. Cameron 	this_device->offload_enabled = 0;
367341ce4c35SStephen Cameron 	this_device->offload_to_be_enabled = 0;
3674283b4a9bSStephen M. Cameron 
3675283b4a9bSStephen M. Cameron 	buf = kzalloc(64, GFP_KERNEL);
3676283b4a9bSStephen M. Cameron 	if (!buf)
3677283b4a9bSStephen M. Cameron 		return;
36781b70150aSStephen M. Cameron 	if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS))
36791b70150aSStephen M. Cameron 		goto out;
3680283b4a9bSStephen M. Cameron 	rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3681b7bb24ebSStephen M. Cameron 			VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64);
3682283b4a9bSStephen M. Cameron 	if (rc != 0)
3683283b4a9bSStephen M. Cameron 		goto out;
3684283b4a9bSStephen M. Cameron 
3685283b4a9bSStephen M. Cameron #define IOACCEL_STATUS_BYTE 4
3686283b4a9bSStephen M. Cameron #define OFFLOAD_CONFIGURED_BIT 0x01
3687283b4a9bSStephen M. Cameron #define OFFLOAD_ENABLED_BIT 0x02
3688283b4a9bSStephen M. Cameron 	ioaccel_status = buf[IOACCEL_STATUS_BYTE];
3689283b4a9bSStephen M. Cameron 	this_device->offload_config =
3690283b4a9bSStephen M. Cameron 		!!(ioaccel_status & OFFLOAD_CONFIGURED_BIT);
3691283b4a9bSStephen M. Cameron 	if (this_device->offload_config) {
36923e16e83aSDon Brace 		bool offload_enabled =
3693283b4a9bSStephen M. Cameron 			!!(ioaccel_status & OFFLOAD_ENABLED_BIT);
36943e16e83aSDon Brace 		/*
36953e16e83aSDon Brace 		 * Check to see if offload can be enabled.
36963e16e83aSDon Brace 		 */
36973e16e83aSDon Brace 		if (offload_enabled) {
36983e16e83aSDon Brace 			rc = hpsa_get_raid_map(h, scsi3addr, this_device);
36993e16e83aSDon Brace 			if (rc) /* could not load raid_map */
37003e16e83aSDon Brace 				goto out;
37013e16e83aSDon Brace 			this_device->offload_to_be_enabled = 1;
37023e16e83aSDon Brace 		}
3703283b4a9bSStephen M. Cameron 	}
3704b2582a65SDon Brace 
3705283b4a9bSStephen M. Cameron out:
3706283b4a9bSStephen M. Cameron 	kfree(buf);
3707283b4a9bSStephen M. Cameron 	return;
3708283b4a9bSStephen M. Cameron }
3709283b4a9bSStephen M. Cameron 
3710edd16368SStephen M. Cameron /* Get the device id from inquiry page 0x83 */
3711edd16368SStephen M. Cameron static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
371275d23d89SDon Brace 	unsigned char *device_id, int index, int buflen)
3713edd16368SStephen M. Cameron {
3714edd16368SStephen M. Cameron 	int rc;
3715edd16368SStephen M. Cameron 	unsigned char *buf;
3716edd16368SStephen M. Cameron 
37178383278dSScott Teel 	/* Does controller have VPD for device id? */
37188383278dSScott Teel 	if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_DEVICE_ID))
37198383278dSScott Teel 		return 1; /* not supported */
37208383278dSScott Teel 
3721edd16368SStephen M. Cameron 	buf = kzalloc(64, GFP_KERNEL);
3722edd16368SStephen M. Cameron 	if (!buf)
3723a84d794dSStephen M. Cameron 		return -ENOMEM;
37248383278dSScott Teel 
37258383278dSScott Teel 	rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE |
37268383278dSScott Teel 					HPSA_VPD_LV_DEVICE_ID, buf, 64);
37278383278dSScott Teel 	if (rc == 0) {
37288383278dSScott Teel 		if (buflen > 16)
37298383278dSScott Teel 			buflen = 16;
37308383278dSScott Teel 		memcpy(device_id, &buf[8], buflen);
37318383278dSScott Teel 	}
373275d23d89SDon Brace 
3733edd16368SStephen M. Cameron 	kfree(buf);
373475d23d89SDon Brace 
37358383278dSScott Teel 	return rc; /*0 - got id,  otherwise, didn't */
3736edd16368SStephen M. Cameron }
3737edd16368SStephen M. Cameron 
3738edd16368SStephen M. Cameron static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
373903383736SDon Brace 		void *buf, int bufsize,
3740edd16368SStephen M. Cameron 		int extended_response)
3741edd16368SStephen M. Cameron {
3742edd16368SStephen M. Cameron 	int rc = IO_OK;
3743edd16368SStephen M. Cameron 	struct CommandList *c;
3744edd16368SStephen M. Cameron 	unsigned char scsi3addr[8];
3745edd16368SStephen M. Cameron 	struct ErrorInfo *ei;
3746edd16368SStephen M. Cameron 
374745fcb86eSStephen Cameron 	c = cmd_alloc(h);
3748bf43caf3SRobert Elliott 
3749e89c0ae7SStephen M. Cameron 	/* address the controller */
3750e89c0ae7SStephen M. Cameron 	memset(scsi3addr, 0, sizeof(scsi3addr));
3751a2dac136SStephen M. Cameron 	if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
3752a2dac136SStephen M. Cameron 		buf, bufsize, 0, scsi3addr, TYPE_CMD)) {
375345f769b2SHannes Reinecke 		rc = -EAGAIN;
3754a2dac136SStephen M. Cameron 		goto out;
3755a2dac136SStephen M. Cameron 	}
3756edd16368SStephen M. Cameron 	if (extended_response)
3757edd16368SStephen M. Cameron 		c->Request.CDB[1] = extended_response;
37588bc8f47eSChristoph Hellwig 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
37598bc8f47eSChristoph Hellwig 			NO_TIMEOUT);
376025163bd5SWebb Scales 	if (rc)
376125163bd5SWebb Scales 		goto out;
3762edd16368SStephen M. Cameron 	ei = c->err_info;
3763edd16368SStephen M. Cameron 	if (ei->CommandStatus != 0 &&
3764edd16368SStephen M. Cameron 	    ei->CommandStatus != CMD_DATA_UNDERRUN) {
3765d1e8beacSStephen M. Cameron 		hpsa_scsi_interpret_error(h, c);
376645f769b2SHannes Reinecke 		rc = -EIO;
3767283b4a9bSStephen M. Cameron 	} else {
376803383736SDon Brace 		struct ReportLUNdata *rld = buf;
376903383736SDon Brace 
377003383736SDon Brace 		if (rld->extended_response_flag != extended_response) {
377145f769b2SHannes Reinecke 			if (!h->legacy_board) {
3772283b4a9bSStephen M. Cameron 				dev_err(&h->pdev->dev,
3773283b4a9bSStephen M. Cameron 					"report luns requested format %u, got %u\n",
3774283b4a9bSStephen M. Cameron 					extended_response,
377503383736SDon Brace 					rld->extended_response_flag);
377645f769b2SHannes Reinecke 				rc = -EINVAL;
377745f769b2SHannes Reinecke 			} else
377845f769b2SHannes Reinecke 				rc = -EOPNOTSUPP;
3779283b4a9bSStephen M. Cameron 		}
3780edd16368SStephen M. Cameron 	}
3781a2dac136SStephen M. Cameron out:
378245fcb86eSStephen Cameron 	cmd_free(h, c);
3783edd16368SStephen M. Cameron 	return rc;
3784edd16368SStephen M. Cameron }
3785edd16368SStephen M. Cameron 
3786edd16368SStephen M. Cameron static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
378703383736SDon Brace 		struct ReportExtendedLUNdata *buf, int bufsize)
3788edd16368SStephen M. Cameron {
37892a80d545SHannes Reinecke 	int rc;
37902a80d545SHannes Reinecke 	struct ReportLUNdata *lbuf;
37912a80d545SHannes Reinecke 
37922a80d545SHannes Reinecke 	rc = hpsa_scsi_do_report_luns(h, 0, buf, bufsize,
379303383736SDon Brace 				      HPSA_REPORT_PHYS_EXTENDED);
379445f769b2SHannes Reinecke 	if (!rc || rc != -EOPNOTSUPP)
37952a80d545SHannes Reinecke 		return rc;
37962a80d545SHannes Reinecke 
37972a80d545SHannes Reinecke 	/* REPORT PHYS EXTENDED is not supported */
37982a80d545SHannes Reinecke 	lbuf = kzalloc(sizeof(*lbuf), GFP_KERNEL);
37992a80d545SHannes Reinecke 	if (!lbuf)
38002a80d545SHannes Reinecke 		return -ENOMEM;
38012a80d545SHannes Reinecke 
38022a80d545SHannes Reinecke 	rc = hpsa_scsi_do_report_luns(h, 0, lbuf, sizeof(*lbuf), 0);
38032a80d545SHannes Reinecke 	if (!rc) {
38042a80d545SHannes Reinecke 		int i;
38052a80d545SHannes Reinecke 		u32 nphys;
38062a80d545SHannes Reinecke 
38072a80d545SHannes Reinecke 		/* Copy ReportLUNdata header */
38082a80d545SHannes Reinecke 		memcpy(buf, lbuf, 8);
38092a80d545SHannes Reinecke 		nphys = be32_to_cpu(*((__be32 *)lbuf->LUNListLength)) / 8;
38102a80d545SHannes Reinecke 		for (i = 0; i < nphys; i++)
38112a80d545SHannes Reinecke 			memcpy(buf->LUN[i].lunid, lbuf->LUN[i], 8);
38122a80d545SHannes Reinecke 	}
38132a80d545SHannes Reinecke 	kfree(lbuf);
38142a80d545SHannes Reinecke 	return rc;
3815edd16368SStephen M. Cameron }
3816edd16368SStephen M. Cameron 
3817edd16368SStephen M. Cameron static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
3818edd16368SStephen M. Cameron 		struct ReportLUNdata *buf, int bufsize)
3819edd16368SStephen M. Cameron {
3820edd16368SStephen M. Cameron 	return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
3821edd16368SStephen M. Cameron }
3822edd16368SStephen M. Cameron 
3823edd16368SStephen M. Cameron static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
3824edd16368SStephen M. Cameron 	int bus, int target, int lun)
3825edd16368SStephen M. Cameron {
3826edd16368SStephen M. Cameron 	device->bus = bus;
3827edd16368SStephen M. Cameron 	device->target = target;
3828edd16368SStephen M. Cameron 	device->lun = lun;
3829edd16368SStephen M. Cameron }
3830edd16368SStephen M. Cameron 
38319846590eSStephen M. Cameron /* Use VPD inquiry to get details of volume status */
38329846590eSStephen M. Cameron static int hpsa_get_volume_status(struct ctlr_info *h,
38339846590eSStephen M. Cameron 					unsigned char scsi3addr[])
38349846590eSStephen M. Cameron {
38359846590eSStephen M. Cameron 	int rc;
38369846590eSStephen M. Cameron 	int status;
38379846590eSStephen M. Cameron 	int size;
38389846590eSStephen M. Cameron 	unsigned char *buf;
38399846590eSStephen M. Cameron 
38409846590eSStephen M. Cameron 	buf = kzalloc(64, GFP_KERNEL);
38419846590eSStephen M. Cameron 	if (!buf)
38429846590eSStephen M. Cameron 		return HPSA_VPD_LV_STATUS_UNSUPPORTED;
38439846590eSStephen M. Cameron 
38449846590eSStephen M. Cameron 	/* Does controller have VPD for logical volume status? */
384524a4b078SStephen M. Cameron 	if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS))
38469846590eSStephen M. Cameron 		goto exit_failed;
38479846590eSStephen M. Cameron 
38489846590eSStephen M. Cameron 	/* Get the size of the VPD return buffer */
38499846590eSStephen M. Cameron 	rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
38509846590eSStephen M. Cameron 					buf, HPSA_VPD_HEADER_SZ);
385124a4b078SStephen M. Cameron 	if (rc != 0)
38529846590eSStephen M. Cameron 		goto exit_failed;
38539846590eSStephen M. Cameron 	size = buf[3];
38549846590eSStephen M. Cameron 
38559846590eSStephen M. Cameron 	/* Now get the whole VPD buffer */
38569846590eSStephen M. Cameron 	rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
38579846590eSStephen M. Cameron 					buf, size + HPSA_VPD_HEADER_SZ);
385824a4b078SStephen M. Cameron 	if (rc != 0)
38599846590eSStephen M. Cameron 		goto exit_failed;
38609846590eSStephen M. Cameron 	status = buf[4]; /* status byte */
38619846590eSStephen M. Cameron 
38629846590eSStephen M. Cameron 	kfree(buf);
38639846590eSStephen M. Cameron 	return status;
38649846590eSStephen M. Cameron exit_failed:
38659846590eSStephen M. Cameron 	kfree(buf);
38669846590eSStephen M. Cameron 	return HPSA_VPD_LV_STATUS_UNSUPPORTED;
38679846590eSStephen M. Cameron }
38689846590eSStephen M. Cameron 
38699846590eSStephen M. Cameron /* Determine offline status of a volume.
38709846590eSStephen M. Cameron  * Return either:
38719846590eSStephen M. Cameron  *  0 (not offline)
387267955ba3SStephen M. Cameron  *  0xff (offline for unknown reasons)
38739846590eSStephen M. Cameron  *  # (integer code indicating one of several NOT READY states
38749846590eSStephen M. Cameron  *     describing why a volume is to be kept offline)
38759846590eSStephen M. Cameron  */
387685b29008SDon Brace static unsigned char hpsa_volume_offline(struct ctlr_info *h,
38779846590eSStephen M. Cameron 					unsigned char scsi3addr[])
38789846590eSStephen M. Cameron {
38799846590eSStephen M. Cameron 	struct CommandList *c;
38809437ac43SStephen Cameron 	unsigned char *sense;
38819437ac43SStephen Cameron 	u8 sense_key, asc, ascq;
38829437ac43SStephen Cameron 	int sense_len;
388325163bd5SWebb Scales 	int rc, ldstat = 0;
38849846590eSStephen M. Cameron #define ASC_LUN_NOT_READY 0x04
38859846590eSStephen M. Cameron #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04
38869846590eSStephen M. Cameron #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02
38879846590eSStephen M. Cameron 
38889846590eSStephen M. Cameron 	c = cmd_alloc(h);
3889bf43caf3SRobert Elliott 
38909846590eSStephen M. Cameron 	(void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD);
3891c448ecfaSDon Brace 	rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
38923026ff9bSDon Brace 					NO_TIMEOUT);
389325163bd5SWebb Scales 	if (rc) {
389425163bd5SWebb Scales 		cmd_free(h, c);
389585b29008SDon Brace 		return HPSA_VPD_LV_STATUS_UNSUPPORTED;
389625163bd5SWebb Scales 	}
38979846590eSStephen M. Cameron 	sense = c->err_info->SenseInfo;
38989437ac43SStephen Cameron 	if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
38999437ac43SStephen Cameron 		sense_len = sizeof(c->err_info->SenseInfo);
39009437ac43SStephen Cameron 	else
39019437ac43SStephen Cameron 		sense_len = c->err_info->SenseLen;
39029437ac43SStephen Cameron 	decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq);
39039846590eSStephen M. Cameron 	cmd_free(h, c);
39049846590eSStephen M. Cameron 
39059846590eSStephen M. Cameron 	/* Determine the reason for not ready state */
39069846590eSStephen M. Cameron 	ldstat = hpsa_get_volume_status(h, scsi3addr);
39079846590eSStephen M. Cameron 
39089846590eSStephen M. Cameron 	/* Keep volume offline in certain cases: */
39099846590eSStephen M. Cameron 	switch (ldstat) {
391085b29008SDon Brace 	case HPSA_LV_FAILED:
39119846590eSStephen M. Cameron 	case HPSA_LV_UNDERGOING_ERASE:
39125ca01204SScott Benesh 	case HPSA_LV_NOT_AVAILABLE:
39139846590eSStephen M. Cameron 	case HPSA_LV_UNDERGOING_RPI:
39149846590eSStephen M. Cameron 	case HPSA_LV_PENDING_RPI:
39159846590eSStephen M. Cameron 	case HPSA_LV_ENCRYPTED_NO_KEY:
39169846590eSStephen M. Cameron 	case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
39179846590eSStephen M. Cameron 	case HPSA_LV_UNDERGOING_ENCRYPTION:
39189846590eSStephen M. Cameron 	case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
39199846590eSStephen M. Cameron 	case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
39209846590eSStephen M. Cameron 		return ldstat;
39219846590eSStephen M. Cameron 	case HPSA_VPD_LV_STATUS_UNSUPPORTED:
39229846590eSStephen M. Cameron 		/* If VPD status page isn't available,
39239846590eSStephen M. Cameron 		 * use ASC/ASCQ to determine state
39249846590eSStephen M. Cameron 		 */
39259846590eSStephen M. Cameron 		if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) ||
39269846590eSStephen M. Cameron 			(ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ))
39279846590eSStephen M. Cameron 			return ldstat;
39289846590eSStephen M. Cameron 		break;
39299846590eSStephen M. Cameron 	default:
39309846590eSStephen M. Cameron 		break;
39319846590eSStephen M. Cameron 	}
393285b29008SDon Brace 	return HPSA_LV_OK;
39339846590eSStephen M. Cameron }
39349846590eSStephen M. Cameron 
3935edd16368SStephen M. Cameron static int hpsa_update_device_info(struct ctlr_info *h,
39360b0e1d6cSStephen M. Cameron 	unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
39370b0e1d6cSStephen M. Cameron 	unsigned char *is_OBDR_device)
3938edd16368SStephen M. Cameron {
39390b0e1d6cSStephen M. Cameron 
39400b0e1d6cSStephen M. Cameron #define OBDR_SIG_OFFSET 43
39410b0e1d6cSStephen M. Cameron #define OBDR_TAPE_SIG "$DR-10"
39420b0e1d6cSStephen M. Cameron #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
39430b0e1d6cSStephen M. Cameron #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
39440b0e1d6cSStephen M. Cameron 
3945ea6d3bc3SStephen M. Cameron 	unsigned char *inq_buff;
39460b0e1d6cSStephen M. Cameron 	unsigned char *obdr_sig;
3947683fc444SDon Brace 	int rc = 0;
3948edd16368SStephen M. Cameron 
3949ea6d3bc3SStephen M. Cameron 	inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
3950683fc444SDon Brace 	if (!inq_buff) {
3951683fc444SDon Brace 		rc = -ENOMEM;
3952edd16368SStephen M. Cameron 		goto bail_out;
3953683fc444SDon Brace 	}
3954edd16368SStephen M. Cameron 
3955edd16368SStephen M. Cameron 	/* Do an inquiry to the device to see what it is. */
3956edd16368SStephen M. Cameron 	if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
3957edd16368SStephen M. Cameron 		(unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
3958edd16368SStephen M. Cameron 		dev_err(&h->pdev->dev,
395985b29008SDon Brace 			"%s: inquiry failed, device will be skipped.\n",
396085b29008SDon Brace 			__func__);
396185b29008SDon Brace 		rc = HPSA_INQUIRY_FAILED;
3962edd16368SStephen M. Cameron 		goto bail_out;
3963edd16368SStephen M. Cameron 	}
3964edd16368SStephen M. Cameron 
39654af61e4fSDon Brace 	scsi_sanitize_inquiry_string(&inq_buff[8], 8);
39664af61e4fSDon Brace 	scsi_sanitize_inquiry_string(&inq_buff[16], 16);
396775d23d89SDon Brace 
3968edd16368SStephen M. Cameron 	this_device->devtype = (inq_buff[0] & 0x1f);
3969edd16368SStephen M. Cameron 	memcpy(this_device->scsi3addr, scsi3addr, 8);
3970edd16368SStephen M. Cameron 	memcpy(this_device->vendor, &inq_buff[8],
3971edd16368SStephen M. Cameron 		sizeof(this_device->vendor));
3972edd16368SStephen M. Cameron 	memcpy(this_device->model, &inq_buff[16],
3973edd16368SStephen M. Cameron 		sizeof(this_device->model));
39747630b3a5SHannes Reinecke 	this_device->rev = inq_buff[2];
3975edd16368SStephen M. Cameron 	memset(this_device->device_id, 0,
3976edd16368SStephen M. Cameron 		sizeof(this_device->device_id));
39778383278dSScott Teel 	if (hpsa_get_device_id(h, scsi3addr, this_device->device_id, 8,
3978a45bcc4eSDon Brace 		sizeof(this_device->device_id)) < 0) {
39798383278dSScott Teel 		dev_err(&h->pdev->dev,
3980a45bcc4eSDon Brace 			"hpsa%d: %s: can't get device id for [%d:%d:%d:%d]\t%s\t%.16s\n",
39818383278dSScott Teel 			h->ctlr, __func__,
39828383278dSScott Teel 			h->scsi_host->host_no,
3983a45bcc4eSDon Brace 			this_device->bus, this_device->target,
3984a45bcc4eSDon Brace 			this_device->lun,
39858383278dSScott Teel 			scsi_device_type(this_device->devtype),
39868383278dSScott Teel 			this_device->model);
3987a45bcc4eSDon Brace 		rc = HPSA_LV_FAILED;
3988a45bcc4eSDon Brace 		goto bail_out;
3989a45bcc4eSDon Brace 	}
3990edd16368SStephen M. Cameron 
3991af15ed36SDon Brace 	if ((this_device->devtype == TYPE_DISK ||
3992af15ed36SDon Brace 		this_device->devtype == TYPE_ZBC) &&
3993283b4a9bSStephen M. Cameron 		is_logical_dev_addr_mode(scsi3addr)) {
399485b29008SDon Brace 		unsigned char volume_offline;
399567955ba3SStephen M. Cameron 
3996edd16368SStephen M. Cameron 		hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
3997283b4a9bSStephen M. Cameron 		if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC)
3998283b4a9bSStephen M. Cameron 			hpsa_get_ioaccel_status(h, scsi3addr, this_device);
399967955ba3SStephen M. Cameron 		volume_offline = hpsa_volume_offline(h, scsi3addr);
40004d17944aSHannes Reinecke 		if (volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED &&
40014d17944aSHannes Reinecke 		    h->legacy_board) {
40024d17944aSHannes Reinecke 			/*
40034d17944aSHannes Reinecke 			 * Legacy boards might not support volume status
40044d17944aSHannes Reinecke 			 */
40054d17944aSHannes Reinecke 			dev_info(&h->pdev->dev,
40064d17944aSHannes Reinecke 				 "C0:T%d:L%d Volume status not available, assuming online.\n",
40074d17944aSHannes Reinecke 				 this_device->target, this_device->lun);
40084d17944aSHannes Reinecke 			volume_offline = 0;
40094d17944aSHannes Reinecke 		}
4010eb94588dSTomas Henzl 		this_device->volume_offline = volume_offline;
401185b29008SDon Brace 		if (volume_offline == HPSA_LV_FAILED) {
401285b29008SDon Brace 			rc = HPSA_LV_FAILED;
401385b29008SDon Brace 			dev_err(&h->pdev->dev,
401485b29008SDon Brace 				"%s: LV failed, device will be skipped.\n",
401585b29008SDon Brace 				__func__);
401685b29008SDon Brace 			goto bail_out;
401785b29008SDon Brace 		}
4018283b4a9bSStephen M. Cameron 	} else {
4019edd16368SStephen M. Cameron 		this_device->raid_level = RAID_UNKNOWN;
4020283b4a9bSStephen M. Cameron 		this_device->offload_config = 0;
40213e16e83aSDon Brace 		hpsa_turn_off_ioaccel_for_device(this_device);
4022a3144e0bSJoe Handzik 		this_device->hba_ioaccel_enabled = 0;
40239846590eSStephen M. Cameron 		this_device->volume_offline = 0;
402403383736SDon Brace 		this_device->queue_depth = h->nr_cmds;
4025283b4a9bSStephen M. Cameron 	}
4026edd16368SStephen M. Cameron 
40275086435eSDon Brace 	if (this_device->external)
40285086435eSDon Brace 		this_device->queue_depth = EXTERNAL_QD;
40295086435eSDon Brace 
40300b0e1d6cSStephen M. Cameron 	if (is_OBDR_device) {
40310b0e1d6cSStephen M. Cameron 		/* See if this is a One-Button-Disaster-Recovery device
40320b0e1d6cSStephen M. Cameron 		 * by looking for "$DR-10" at offset 43 in inquiry data.
40330b0e1d6cSStephen M. Cameron 		 */
40340b0e1d6cSStephen M. Cameron 		obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
40350b0e1d6cSStephen M. Cameron 		*is_OBDR_device = (this_device->devtype == TYPE_ROM &&
40360b0e1d6cSStephen M. Cameron 					strncmp(obdr_sig, OBDR_TAPE_SIG,
40370b0e1d6cSStephen M. Cameron 						OBDR_SIG_LEN) == 0);
40380b0e1d6cSStephen M. Cameron 	}
4039edd16368SStephen M. Cameron 	kfree(inq_buff);
4040edd16368SStephen M. Cameron 	return 0;
4041edd16368SStephen M. Cameron 
4042edd16368SStephen M. Cameron bail_out:
4043edd16368SStephen M. Cameron 	kfree(inq_buff);
4044683fc444SDon Brace 	return rc;
4045edd16368SStephen M. Cameron }
4046edd16368SStephen M. Cameron 
4047c795505aSKevin Barnett /*
4048c795505aSKevin Barnett  * Helper function to assign bus, target, lun mapping of devices.
4049edd16368SStephen M. Cameron  * Logical drive target and lun are assigned at this time, but
4050edd16368SStephen M. Cameron  * physical device lun and target assignment are deferred (assigned
4051edd16368SStephen M. Cameron  * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
4052edd16368SStephen M. Cameron */
4053edd16368SStephen M. Cameron static void figure_bus_target_lun(struct ctlr_info *h,
40541f310bdeSStephen M. Cameron 	u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device)
4055edd16368SStephen M. Cameron {
4056c795505aSKevin Barnett 	u32 lunid = get_unaligned_le32(lunaddrbytes);
4057edd16368SStephen M. Cameron 
40581f310bdeSStephen M. Cameron 	if (!is_logical_dev_addr_mode(lunaddrbytes)) {
40591f310bdeSStephen M. Cameron 		/* physical device, target and lun filled in later */
40607630b3a5SHannes Reinecke 		if (is_hba_lunid(lunaddrbytes)) {
40617630b3a5SHannes Reinecke 			int bus = HPSA_HBA_BUS;
40627630b3a5SHannes Reinecke 
40637630b3a5SHannes Reinecke 			if (!device->rev)
40647630b3a5SHannes Reinecke 				bus = HPSA_LEGACY_HBA_BUS;
4065c795505aSKevin Barnett 			hpsa_set_bus_target_lun(device,
40667630b3a5SHannes Reinecke 					bus, 0, lunid & 0x3fff);
40677630b3a5SHannes Reinecke 		} else
40681f310bdeSStephen M. Cameron 			/* defer target, lun assignment for physical devices */
4069c795505aSKevin Barnett 			hpsa_set_bus_target_lun(device,
4070c795505aSKevin Barnett 					HPSA_PHYSICAL_DEVICE_BUS, -1, -1);
40711f310bdeSStephen M. Cameron 		return;
40721f310bdeSStephen M. Cameron 	}
40731f310bdeSStephen M. Cameron 	/* It's a logical device */
407466749d0dSScott Teel 	if (device->external) {
40751f310bdeSStephen M. Cameron 		hpsa_set_bus_target_lun(device,
4076c795505aSKevin Barnett 			HPSA_EXTERNAL_RAID_VOLUME_BUS, (lunid >> 16) & 0x3fff,
4077c795505aSKevin Barnett 			lunid & 0x00ff);
40781f310bdeSStephen M. Cameron 		return;
4079339b2b14SStephen M. Cameron 	}
4080c795505aSKevin Barnett 	hpsa_set_bus_target_lun(device, HPSA_RAID_VOLUME_BUS,
4081c795505aSKevin Barnett 				0, lunid & 0x3fff);
4082edd16368SStephen M. Cameron }
4083edd16368SStephen M. Cameron 
408466749d0dSScott Teel static int  figure_external_status(struct ctlr_info *h, int raid_ctlr_position,
408566749d0dSScott Teel 	int i, int nphysicals, int nlocal_logicals)
408666749d0dSScott Teel {
408766749d0dSScott Teel 	/* In report logicals, local logicals are listed first,
408866749d0dSScott Teel 	* then any externals.
408966749d0dSScott Teel 	*/
409066749d0dSScott Teel 	int logicals_start = nphysicals + (raid_ctlr_position == 0);
409166749d0dSScott Teel 
409266749d0dSScott Teel 	if (i == raid_ctlr_position)
409366749d0dSScott Teel 		return 0;
409466749d0dSScott Teel 
409566749d0dSScott Teel 	if (i < logicals_start)
409666749d0dSScott Teel 		return 0;
409766749d0dSScott Teel 
409866749d0dSScott Teel 	/* i is in logicals range, but still within local logicals */
409966749d0dSScott Teel 	if ((i - nphysicals - (raid_ctlr_position == 0)) < nlocal_logicals)
410066749d0dSScott Teel 		return 0;
410166749d0dSScott Teel 
410266749d0dSScott Teel 	return 1; /* it's an external lun */
410366749d0dSScott Teel }
410466749d0dSScott Teel 
410554b6e9e9SScott Teel /*
4106edd16368SStephen M. Cameron  * Do CISS_REPORT_PHYS and CISS_REPORT_LOG.  Data is returned in physdev,
4107edd16368SStephen M. Cameron  * logdev.  The number of luns in physdev and logdev are returned in
4108edd16368SStephen M. Cameron  * *nphysicals and *nlogicals, respectively.
4109edd16368SStephen M. Cameron  * Returns 0 on success, -1 otherwise.
4110edd16368SStephen M. Cameron  */
4111edd16368SStephen M. Cameron static int hpsa_gather_lun_info(struct ctlr_info *h,
411203383736SDon Brace 	struct ReportExtendedLUNdata *physdev, u32 *nphysicals,
411301a02ffcSStephen M. Cameron 	struct ReportLUNdata *logdev, u32 *nlogicals)
4114edd16368SStephen M. Cameron {
411503383736SDon Brace 	if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) {
4116edd16368SStephen M. Cameron 		dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
4117edd16368SStephen M. Cameron 		return -1;
4118edd16368SStephen M. Cameron 	}
411903383736SDon Brace 	*nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24;
4120edd16368SStephen M. Cameron 	if (*nphysicals > HPSA_MAX_PHYS_LUN) {
412103383736SDon Brace 		dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n",
412203383736SDon Brace 			HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN);
4123edd16368SStephen M. Cameron 		*nphysicals = HPSA_MAX_PHYS_LUN;
4124edd16368SStephen M. Cameron 	}
412503383736SDon Brace 	if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) {
4126edd16368SStephen M. Cameron 		dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
4127edd16368SStephen M. Cameron 		return -1;
4128edd16368SStephen M. Cameron 	}
41296df1e954SStephen M. Cameron 	*nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
4130edd16368SStephen M. Cameron 	/* Reject Logicals in excess of our max capability. */
4131edd16368SStephen M. Cameron 	if (*nlogicals > HPSA_MAX_LUN) {
4132edd16368SStephen M. Cameron 		dev_warn(&h->pdev->dev,
4133edd16368SStephen M. Cameron 			"maximum logical LUNs (%d) exceeded.  "
4134edd16368SStephen M. Cameron 			"%d LUNs ignored.\n", HPSA_MAX_LUN,
4135edd16368SStephen M. Cameron 			*nlogicals - HPSA_MAX_LUN);
4136edd16368SStephen M. Cameron 		*nlogicals = HPSA_MAX_LUN;
4137edd16368SStephen M. Cameron 	}
4138edd16368SStephen M. Cameron 	if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
4139edd16368SStephen M. Cameron 		dev_warn(&h->pdev->dev,
4140edd16368SStephen M. Cameron 			"maximum logical + physical LUNs (%d) exceeded. "
4141edd16368SStephen M. Cameron 			"%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
4142edd16368SStephen M. Cameron 			*nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
4143edd16368SStephen M. Cameron 		*nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
4144edd16368SStephen M. Cameron 	}
4145edd16368SStephen M. Cameron 	return 0;
4146edd16368SStephen M. Cameron }
4147edd16368SStephen M. Cameron 
414842a91641SDon Brace static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position,
414942a91641SDon Brace 	int i, int nphysicals, int nlogicals,
4150a93aa1feSMatt Gates 	struct ReportExtendedLUNdata *physdev_list,
4151339b2b14SStephen M. Cameron 	struct ReportLUNdata *logdev_list)
4152339b2b14SStephen M. Cameron {
4153339b2b14SStephen M. Cameron 	/* Helper function, figure out where the LUN ID info is coming from
4154339b2b14SStephen M. Cameron 	 * given index i, lists of physical and logical devices, where in
4155339b2b14SStephen M. Cameron 	 * the list the raid controller is supposed to appear (first or last)
4156339b2b14SStephen M. Cameron 	 */
4157339b2b14SStephen M. Cameron 
4158339b2b14SStephen M. Cameron 	int logicals_start = nphysicals + (raid_ctlr_position == 0);
4159339b2b14SStephen M. Cameron 	int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
4160339b2b14SStephen M. Cameron 
4161339b2b14SStephen M. Cameron 	if (i == raid_ctlr_position)
4162339b2b14SStephen M. Cameron 		return RAID_CTLR_LUNID;
4163339b2b14SStephen M. Cameron 
4164339b2b14SStephen M. Cameron 	if (i < logicals_start)
4165d5b5d964SStephen M. Cameron 		return &physdev_list->LUN[i -
4166d5b5d964SStephen M. Cameron 				(raid_ctlr_position == 0)].lunid[0];
4167339b2b14SStephen M. Cameron 
4168339b2b14SStephen M. Cameron 	if (i < last_device)
4169339b2b14SStephen M. Cameron 		return &logdev_list->LUN[i - nphysicals -
4170339b2b14SStephen M. Cameron 			(raid_ctlr_position == 0)][0];
4171339b2b14SStephen M. Cameron 	BUG();
4172339b2b14SStephen M. Cameron 	return NULL;
4173339b2b14SStephen M. Cameron }
4174339b2b14SStephen M. Cameron 
417503383736SDon Brace /* get physical drive ioaccel handle and queue depth */
417603383736SDon Brace static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h,
417703383736SDon Brace 		struct hpsa_scsi_dev_t *dev,
4178f2039b03SDon Brace 		struct ReportExtendedLUNdata *rlep, int rle_index,
417903383736SDon Brace 		struct bmic_identify_physical_device *id_phys)
418003383736SDon Brace {
418103383736SDon Brace 	int rc;
41824b6e5597SScott Teel 	struct ext_report_lun_entry *rle;
41834b6e5597SScott Teel 
418427e1b94dSDon Brace 	if (rle_index < 0 || rle_index >= HPSA_MAX_PHYS_LUN)
418527e1b94dSDon Brace 		return;
418627e1b94dSDon Brace 
41874b6e5597SScott Teel 	rle = &rlep->LUN[rle_index];
418803383736SDon Brace 
418903383736SDon Brace 	dev->ioaccel_handle = rle->ioaccel_handle;
4190f2039b03SDon Brace 	if ((rle->device_flags & 0x08) && dev->ioaccel_handle)
4191a3144e0bSJoe Handzik 		dev->hba_ioaccel_enabled = 1;
419203383736SDon Brace 	memset(id_phys, 0, sizeof(*id_phys));
4193f2039b03SDon Brace 	rc = hpsa_bmic_id_physical_device(h, &rle->lunid[0],
4194f2039b03SDon Brace 			GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]), id_phys,
419503383736SDon Brace 			sizeof(*id_phys));
419603383736SDon Brace 	if (!rc)
419703383736SDon Brace 		/* Reserve space for FW operations */
419803383736SDon Brace #define DRIVE_CMDS_RESERVED_FOR_FW 2
419903383736SDon Brace #define DRIVE_QUEUE_DEPTH 7
420003383736SDon Brace 		dev->queue_depth =
420103383736SDon Brace 			le16_to_cpu(id_phys->current_queue_depth_limit) -
420203383736SDon Brace 				DRIVE_CMDS_RESERVED_FOR_FW;
420303383736SDon Brace 	else
420403383736SDon Brace 		dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */
420503383736SDon Brace }
420603383736SDon Brace 
42078270b862SJoe Handzik static void hpsa_get_path_info(struct hpsa_scsi_dev_t *this_device,
4208f2039b03SDon Brace 	struct ReportExtendedLUNdata *rlep, int rle_index,
42098270b862SJoe Handzik 	struct bmic_identify_physical_device *id_phys)
42108270b862SJoe Handzik {
421127e1b94dSDon Brace 	struct ext_report_lun_entry *rle;
421227e1b94dSDon Brace 
421327e1b94dSDon Brace 	if (rle_index < 0 || rle_index >= HPSA_MAX_PHYS_LUN)
421427e1b94dSDon Brace 		return;
421527e1b94dSDon Brace 
421627e1b94dSDon Brace 	rle = &rlep->LUN[rle_index];
4217f2039b03SDon Brace 
4218f2039b03SDon Brace 	if ((rle->device_flags & 0x08) && this_device->ioaccel_handle)
42198270b862SJoe Handzik 		this_device->hba_ioaccel_enabled = 1;
42208270b862SJoe Handzik 
42218270b862SJoe Handzik 	memcpy(&this_device->active_path_index,
42228270b862SJoe Handzik 		&id_phys->active_path_number,
42238270b862SJoe Handzik 		sizeof(this_device->active_path_index));
42248270b862SJoe Handzik 	memcpy(&this_device->path_map,
42258270b862SJoe Handzik 		&id_phys->redundant_path_present_map,
42268270b862SJoe Handzik 		sizeof(this_device->path_map));
42278270b862SJoe Handzik 	memcpy(&this_device->box,
42288270b862SJoe Handzik 		&id_phys->alternate_paths_phys_box_on_port,
42298270b862SJoe Handzik 		sizeof(this_device->box));
42308270b862SJoe Handzik 	memcpy(&this_device->phys_connector,
42318270b862SJoe Handzik 		&id_phys->alternate_paths_phys_connector,
42328270b862SJoe Handzik 		sizeof(this_device->phys_connector));
42338270b862SJoe Handzik 	memcpy(&this_device->bay,
42348270b862SJoe Handzik 		&id_phys->phys_bay_in_box,
42358270b862SJoe Handzik 		sizeof(this_device->bay));
42368270b862SJoe Handzik }
42378270b862SJoe Handzik 
423866749d0dSScott Teel /* get number of local logical disks. */
423966749d0dSScott Teel static int hpsa_set_local_logical_count(struct ctlr_info *h,
424066749d0dSScott Teel 	struct bmic_identify_controller *id_ctlr,
424166749d0dSScott Teel 	u32 *nlocals)
424266749d0dSScott Teel {
424366749d0dSScott Teel 	int rc;
424466749d0dSScott Teel 
424566749d0dSScott Teel 	if (!id_ctlr) {
424666749d0dSScott Teel 		dev_warn(&h->pdev->dev, "%s: id_ctlr buffer is NULL.\n",
424766749d0dSScott Teel 			__func__);
424866749d0dSScott Teel 		return -ENOMEM;
424966749d0dSScott Teel 	}
425066749d0dSScott Teel 	memset(id_ctlr, 0, sizeof(*id_ctlr));
425166749d0dSScott Teel 	rc = hpsa_bmic_id_controller(h, id_ctlr, sizeof(*id_ctlr));
425266749d0dSScott Teel 	if (!rc)
4253c99dfd20SChristos Gkekas 		if (id_ctlr->configured_logical_drive_count < 255)
425466749d0dSScott Teel 			*nlocals = id_ctlr->configured_logical_drive_count;
425566749d0dSScott Teel 		else
425666749d0dSScott Teel 			*nlocals = le16_to_cpu(
425766749d0dSScott Teel 					id_ctlr->extended_logical_unit_count);
425866749d0dSScott Teel 	else
425966749d0dSScott Teel 		*nlocals = -1;
426066749d0dSScott Teel 	return rc;
426166749d0dSScott Teel }
426266749d0dSScott Teel 
426364ce60caSDon Brace static bool hpsa_is_disk_spare(struct ctlr_info *h, u8 *lunaddrbytes)
426464ce60caSDon Brace {
426564ce60caSDon Brace 	struct bmic_identify_physical_device *id_phys;
426664ce60caSDon Brace 	bool is_spare = false;
426764ce60caSDon Brace 	int rc;
426864ce60caSDon Brace 
426964ce60caSDon Brace 	id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
427064ce60caSDon Brace 	if (!id_phys)
427164ce60caSDon Brace 		return false;
427264ce60caSDon Brace 
427364ce60caSDon Brace 	rc = hpsa_bmic_id_physical_device(h,
427464ce60caSDon Brace 					lunaddrbytes,
427564ce60caSDon Brace 					GET_BMIC_DRIVE_NUMBER(lunaddrbytes),
427664ce60caSDon Brace 					id_phys, sizeof(*id_phys));
427764ce60caSDon Brace 	if (rc == 0)
427864ce60caSDon Brace 		is_spare = (id_phys->more_flags >> 6) & 0x01;
427964ce60caSDon Brace 
428064ce60caSDon Brace 	kfree(id_phys);
428164ce60caSDon Brace 	return is_spare;
428264ce60caSDon Brace }
428364ce60caSDon Brace 
428464ce60caSDon Brace #define RPL_DEV_FLAG_NON_DISK                           0x1
428564ce60caSDon Brace #define RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED  0x2
428664ce60caSDon Brace #define RPL_DEV_FLAG_UNCONFIG_DISK                      0x4
428764ce60caSDon Brace 
428864ce60caSDon Brace #define BMIC_DEVICE_TYPE_ENCLOSURE  6
428964ce60caSDon Brace 
429064ce60caSDon Brace static bool hpsa_skip_device(struct ctlr_info *h, u8 *lunaddrbytes,
429164ce60caSDon Brace 				struct ext_report_lun_entry *rle)
429264ce60caSDon Brace {
429364ce60caSDon Brace 	u8 device_flags;
429464ce60caSDon Brace 	u8 device_type;
429564ce60caSDon Brace 
429664ce60caSDon Brace 	if (!MASKED_DEVICE(lunaddrbytes))
429764ce60caSDon Brace 		return false;
429864ce60caSDon Brace 
429964ce60caSDon Brace 	device_flags = rle->device_flags;
430064ce60caSDon Brace 	device_type = rle->device_type;
430164ce60caSDon Brace 
430264ce60caSDon Brace 	if (device_flags & RPL_DEV_FLAG_NON_DISK) {
430364ce60caSDon Brace 		if (device_type == BMIC_DEVICE_TYPE_ENCLOSURE)
430464ce60caSDon Brace 			return false;
430564ce60caSDon Brace 		return true;
430664ce60caSDon Brace 	}
430764ce60caSDon Brace 
430864ce60caSDon Brace 	if (!(device_flags & RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED))
430964ce60caSDon Brace 		return false;
431064ce60caSDon Brace 
431164ce60caSDon Brace 	if (device_flags & RPL_DEV_FLAG_UNCONFIG_DISK)
431264ce60caSDon Brace 		return false;
431364ce60caSDon Brace 
431464ce60caSDon Brace 	/*
431564ce60caSDon Brace 	 * Spares may be spun down, we do not want to
431664ce60caSDon Brace 	 * do an Inquiry to a RAID set spare drive as
431764ce60caSDon Brace 	 * that would have them spun up, that is a
431864ce60caSDon Brace 	 * performance hit because I/O to the RAID device
431964ce60caSDon Brace 	 * stops while the spin up occurs which can take
432064ce60caSDon Brace 	 * over 50 seconds.
432164ce60caSDon Brace 	 */
432264ce60caSDon Brace 	if (hpsa_is_disk_spare(h, lunaddrbytes))
432364ce60caSDon Brace 		return true;
432464ce60caSDon Brace 
432564ce60caSDon Brace 	return false;
432664ce60caSDon Brace }
432766749d0dSScott Teel 
43288aa60681SDon Brace static void hpsa_update_scsi_devices(struct ctlr_info *h)
4329edd16368SStephen M. Cameron {
4330edd16368SStephen M. Cameron 	/* the idea here is we could get notified
4331edd16368SStephen M. Cameron 	 * that some devices have changed, so we do a report
4332edd16368SStephen M. Cameron 	 * physical luns and report logical luns cmd, and adjust
4333edd16368SStephen M. Cameron 	 * our list of devices accordingly.
4334edd16368SStephen M. Cameron 	 *
4335edd16368SStephen M. Cameron 	 * The scsi3addr's of devices won't change so long as the
4336edd16368SStephen M. Cameron 	 * adapter is not reset.  That means we can rescan and
4337edd16368SStephen M. Cameron 	 * tell which devices we already know about, vs. new
4338edd16368SStephen M. Cameron 	 * devices, vs.  disappearing devices.
4339edd16368SStephen M. Cameron 	 */
4340a93aa1feSMatt Gates 	struct ReportExtendedLUNdata *physdev_list = NULL;
4341edd16368SStephen M. Cameron 	struct ReportLUNdata *logdev_list = NULL;
434203383736SDon Brace 	struct bmic_identify_physical_device *id_phys = NULL;
434366749d0dSScott Teel 	struct bmic_identify_controller *id_ctlr = NULL;
434401a02ffcSStephen M. Cameron 	u32 nphysicals = 0;
434501a02ffcSStephen M. Cameron 	u32 nlogicals = 0;
434666749d0dSScott Teel 	u32 nlocal_logicals = 0;
434701a02ffcSStephen M. Cameron 	u32 ndev_allocated = 0;
4348edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
4349edd16368SStephen M. Cameron 	int ncurrent = 0;
43501fc65919SLee Jones 	int i, ndevs_to_allocate;
4351339b2b14SStephen M. Cameron 	int raid_ctlr_position;
435204fa2f44SKevin Barnett 	bool physical_device;
4353aca4a520SScott Teel 	DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS);
4354edd16368SStephen M. Cameron 
43556396bb22SKees Cook 	currentsd = kcalloc(HPSA_MAX_DEVICES, sizeof(*currentsd), GFP_KERNEL);
435692084715SStephen M. Cameron 	physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL);
435792084715SStephen M. Cameron 	logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL);
4358edd16368SStephen M. Cameron 	tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
435903383736SDon Brace 	id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
436066749d0dSScott Teel 	id_ctlr = kzalloc(sizeof(*id_ctlr), GFP_KERNEL);
4361edd16368SStephen M. Cameron 
436203383736SDon Brace 	if (!currentsd || !physdev_list || !logdev_list ||
436366749d0dSScott Teel 		!tmpdevice || !id_phys || !id_ctlr) {
4364edd16368SStephen M. Cameron 		dev_err(&h->pdev->dev, "out of memory\n");
4365edd16368SStephen M. Cameron 		goto out;
4366edd16368SStephen M. Cameron 	}
4367edd16368SStephen M. Cameron 	memset(lunzerobits, 0, sizeof(lunzerobits));
4368edd16368SStephen M. Cameron 
4369853633e8SDon Brace 	h->drv_req_rescan = 0; /* cancel scheduled rescan - we're doing it. */
4370853633e8SDon Brace 
437103383736SDon Brace 	if (hpsa_gather_lun_info(h, physdev_list, &nphysicals,
4372853633e8SDon Brace 			logdev_list, &nlogicals)) {
4373853633e8SDon Brace 		h->drv_req_rescan = 1;
4374edd16368SStephen M. Cameron 		goto out;
4375853633e8SDon Brace 	}
4376edd16368SStephen M. Cameron 
437766749d0dSScott Teel 	/* Set number of local logicals (non PTRAID) */
437866749d0dSScott Teel 	if (hpsa_set_local_logical_count(h, id_ctlr, &nlocal_logicals)) {
437966749d0dSScott Teel 		dev_warn(&h->pdev->dev,
438066749d0dSScott Teel 			"%s: Can't determine number of local logical devices.\n",
438166749d0dSScott Teel 			__func__);
438266749d0dSScott Teel 	}
4383edd16368SStephen M. Cameron 
4384aca4a520SScott Teel 	/* We might see up to the maximum number of logical and physical disks
4385aca4a520SScott Teel 	 * plus external target devices, and a device for the local RAID
4386aca4a520SScott Teel 	 * controller.
4387edd16368SStephen M. Cameron 	 */
4388aca4a520SScott Teel 	ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1;
4389edd16368SStephen M. Cameron 
43904e188184SBader Ali Saleh 	hpsa_ext_ctrl_present(h, physdev_list);
43914e188184SBader Ali Saleh 
4392edd16368SStephen M. Cameron 	/* Allocate the per device structures */
4393edd16368SStephen M. Cameron 	for (i = 0; i < ndevs_to_allocate; i++) {
4394b7ec021fSScott Teel 		if (i >= HPSA_MAX_DEVICES) {
4395b7ec021fSScott Teel 			dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
4396b7ec021fSScott Teel 				"  %d devices ignored.\n", HPSA_MAX_DEVICES,
4397b7ec021fSScott Teel 				ndevs_to_allocate - HPSA_MAX_DEVICES);
4398b7ec021fSScott Teel 			break;
4399b7ec021fSScott Teel 		}
4400b7ec021fSScott Teel 
4401edd16368SStephen M. Cameron 		currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
4402edd16368SStephen M. Cameron 		if (!currentsd[i]) {
4403853633e8SDon Brace 			h->drv_req_rescan = 1;
4404edd16368SStephen M. Cameron 			goto out;
4405edd16368SStephen M. Cameron 		}
4406edd16368SStephen M. Cameron 		ndev_allocated++;
4407edd16368SStephen M. Cameron 	}
4408edd16368SStephen M. Cameron 
44098645291bSStephen M. Cameron 	if (is_scsi_rev_5(h))
4410339b2b14SStephen M. Cameron 		raid_ctlr_position = 0;
4411339b2b14SStephen M. Cameron 	else
4412339b2b14SStephen M. Cameron 		raid_ctlr_position = nphysicals + nlogicals;
4413339b2b14SStephen M. Cameron 
4414edd16368SStephen M. Cameron 	/* adjust our table of devices */
4415edd16368SStephen M. Cameron 	for (i = 0; i < nphysicals + nlogicals + 1; i++) {
44160b0e1d6cSStephen M. Cameron 		u8 *lunaddrbytes, is_OBDR = 0;
4417683fc444SDon Brace 		int rc = 0;
4418f2039b03SDon Brace 		int phys_dev_index = i - (raid_ctlr_position == 0);
441964ce60caSDon Brace 		bool skip_device = false;
4420edd16368SStephen M. Cameron 
4421421bf80cSScott Teel 		memset(tmpdevice, 0, sizeof(*tmpdevice));
4422421bf80cSScott Teel 
442304fa2f44SKevin Barnett 		physical_device = i < nphysicals + (raid_ctlr_position == 0);
4424edd16368SStephen M. Cameron 
4425edd16368SStephen M. Cameron 		/* Figure out where the LUN ID info is coming from */
4426339b2b14SStephen M. Cameron 		lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
4427339b2b14SStephen M. Cameron 			i, nphysicals, nlogicals, physdev_list, logdev_list);
442841ce4c35SStephen Cameron 
442986cf7130SDon Brace 		/* Determine if this is a lun from an external target array */
443086cf7130SDon Brace 		tmpdevice->external =
443186cf7130SDon Brace 			figure_external_status(h, raid_ctlr_position, i,
443286cf7130SDon Brace 						nphysicals, nlocal_logicals);
443386cf7130SDon Brace 
443464ce60caSDon Brace 		/*
443564ce60caSDon Brace 		 * Skip over some devices such as a spare.
443664ce60caSDon Brace 		 */
443727e1b94dSDon Brace 		if (phys_dev_index >= 0 && !tmpdevice->external &&
443827e1b94dSDon Brace 			physical_device) {
443964ce60caSDon Brace 			skip_device = hpsa_skip_device(h, lunaddrbytes,
444064ce60caSDon Brace 					&physdev_list->LUN[phys_dev_index]);
444164ce60caSDon Brace 			if (skip_device)
4442edd16368SStephen M. Cameron 				continue;
444364ce60caSDon Brace 		}
4444edd16368SStephen M. Cameron 
4445b2582a65SDon Brace 		/* Get device type, vendor, model, device id, raid_map */
4446683fc444SDon Brace 		rc = hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
4447683fc444SDon Brace 							&is_OBDR);
4448683fc444SDon Brace 		if (rc == -ENOMEM) {
4449683fc444SDon Brace 			dev_warn(&h->pdev->dev,
4450683fc444SDon Brace 				"Out of memory, rescan deferred.\n");
4451853633e8SDon Brace 			h->drv_req_rescan = 1;
4452683fc444SDon Brace 			goto out;
4453853633e8SDon Brace 		}
4454683fc444SDon Brace 		if (rc) {
445585b29008SDon Brace 			h->drv_req_rescan = 1;
4456683fc444SDon Brace 			continue;
4457683fc444SDon Brace 		}
4458683fc444SDon Brace 
44591f310bdeSStephen M. Cameron 		figure_bus_target_lun(h, lunaddrbytes, tmpdevice);
4460edd16368SStephen M. Cameron 		this_device = currentsd[ncurrent];
4461edd16368SStephen M. Cameron 
4462edd16368SStephen M. Cameron 		*this_device = *tmpdevice;
446304fa2f44SKevin Barnett 		this_device->physical_device = physical_device;
4464edd16368SStephen M. Cameron 
446504fa2f44SKevin Barnett 		/*
446604fa2f44SKevin Barnett 		 * Expose all devices except for physical devices that
446704fa2f44SKevin Barnett 		 * are masked.
446804fa2f44SKevin Barnett 		 */
446904fa2f44SKevin Barnett 		if (MASKED_DEVICE(lunaddrbytes) && this_device->physical_device)
44702a168208SKevin Barnett 			this_device->expose_device = 0;
44712a168208SKevin Barnett 		else
44722a168208SKevin Barnett 			this_device->expose_device = 1;
447341ce4c35SStephen Cameron 
4474d04e62b9SKevin Barnett 
4475d04e62b9SKevin Barnett 		/*
4476d04e62b9SKevin Barnett 		 * Get the SAS address for physical devices that are exposed.
4477d04e62b9SKevin Barnett 		 */
4478d04e62b9SKevin Barnett 		if (this_device->physical_device && this_device->expose_device)
4479d04e62b9SKevin Barnett 			hpsa_get_sas_address(h, lunaddrbytes, this_device);
4480edd16368SStephen M. Cameron 
4481edd16368SStephen M. Cameron 		switch (this_device->devtype) {
44820b0e1d6cSStephen M. Cameron 		case TYPE_ROM:
4483edd16368SStephen M. Cameron 			/* We don't *really* support actual CD-ROM devices,
4484edd16368SStephen M. Cameron 			 * just "One Button Disaster Recovery" tape drive
4485edd16368SStephen M. Cameron 			 * which temporarily pretends to be a CD-ROM drive.
4486edd16368SStephen M. Cameron 			 * So we check that the device is really an OBDR tape
4487edd16368SStephen M. Cameron 			 * device by checking for "$DR-10" in bytes 43-48 of
4488edd16368SStephen M. Cameron 			 * the inquiry data.
4489edd16368SStephen M. Cameron 			 */
44900b0e1d6cSStephen M. Cameron 			if (is_OBDR)
4491edd16368SStephen M. Cameron 				ncurrent++;
4492edd16368SStephen M. Cameron 			break;
4493edd16368SStephen M. Cameron 		case TYPE_DISK:
4494af15ed36SDon Brace 		case TYPE_ZBC:
449504fa2f44SKevin Barnett 			if (this_device->physical_device) {
4496b9092b79SKevin Barnett 				/* The disk is in HBA mode. */
4497b9092b79SKevin Barnett 				/* Never use RAID mapper in HBA mode. */
4498ecf418d1SJoe Handzik 				this_device->offload_enabled = 0;
449903383736SDon Brace 				hpsa_get_ioaccel_drive_info(h, this_device,
4500f2039b03SDon Brace 					physdev_list, phys_dev_index, id_phys);
4501f2039b03SDon Brace 				hpsa_get_path_info(this_device,
4502f2039b03SDon Brace 					physdev_list, phys_dev_index, id_phys);
4503b9092b79SKevin Barnett 			}
4504edd16368SStephen M. Cameron 			ncurrent++;
4505edd16368SStephen M. Cameron 			break;
4506edd16368SStephen M. Cameron 		case TYPE_TAPE:
4507edd16368SStephen M. Cameron 		case TYPE_MEDIUM_CHANGER:
4508cca8f13bSDon Brace 			ncurrent++;
4509cca8f13bSDon Brace 			break;
451041ce4c35SStephen Cameron 		case TYPE_ENCLOSURE:
451117a9e54aSDon Brace 			if (!this_device->external)
4512cca8f13bSDon Brace 				hpsa_get_enclosure_info(h, lunaddrbytes,
4513cca8f13bSDon Brace 						physdev_list, phys_dev_index,
4514cca8f13bSDon Brace 						this_device);
451541ce4c35SStephen Cameron 			ncurrent++;
451641ce4c35SStephen Cameron 			break;
4517edd16368SStephen M. Cameron 		case TYPE_RAID:
4518edd16368SStephen M. Cameron 			/* Only present the Smartarray HBA as a RAID controller.
4519edd16368SStephen M. Cameron 			 * If it's a RAID controller other than the HBA itself
4520edd16368SStephen M. Cameron 			 * (an external RAID controller, MSA500 or similar)
4521edd16368SStephen M. Cameron 			 * don't present it.
4522edd16368SStephen M. Cameron 			 */
4523edd16368SStephen M. Cameron 			if (!is_hba_lunid(lunaddrbytes))
4524edd16368SStephen M. Cameron 				break;
4525edd16368SStephen M. Cameron 			ncurrent++;
4526edd16368SStephen M. Cameron 			break;
4527edd16368SStephen M. Cameron 		default:
4528edd16368SStephen M. Cameron 			break;
4529edd16368SStephen M. Cameron 		}
4530cfe5badcSScott Teel 		if (ncurrent >= HPSA_MAX_DEVICES)
4531edd16368SStephen M. Cameron 			break;
4532edd16368SStephen M. Cameron 	}
4533d04e62b9SKevin Barnett 
4534d04e62b9SKevin Barnett 	if (h->sas_host == NULL) {
4535d04e62b9SKevin Barnett 		int rc = 0;
4536d04e62b9SKevin Barnett 
4537d04e62b9SKevin Barnett 		rc = hpsa_add_sas_host(h);
4538d04e62b9SKevin Barnett 		if (rc) {
4539d04e62b9SKevin Barnett 			dev_warn(&h->pdev->dev,
4540d04e62b9SKevin Barnett 				"Could not add sas host %d\n", rc);
4541d04e62b9SKevin Barnett 			goto out;
4542d04e62b9SKevin Barnett 		}
4543d04e62b9SKevin Barnett 	}
4544d04e62b9SKevin Barnett 
45458aa60681SDon Brace 	adjust_hpsa_scsi_table(h, currentsd, ncurrent);
4546edd16368SStephen M. Cameron out:
4547edd16368SStephen M. Cameron 	kfree(tmpdevice);
4548edd16368SStephen M. Cameron 	for (i = 0; i < ndev_allocated; i++)
4549edd16368SStephen M. Cameron 		kfree(currentsd[i]);
4550edd16368SStephen M. Cameron 	kfree(currentsd);
4551edd16368SStephen M. Cameron 	kfree(physdev_list);
4552edd16368SStephen M. Cameron 	kfree(logdev_list);
455366749d0dSScott Teel 	kfree(id_ctlr);
455403383736SDon Brace 	kfree(id_phys);
4555edd16368SStephen M. Cameron }
4556edd16368SStephen M. Cameron 
4557ec5cbf04SWebb Scales static void hpsa_set_sg_descriptor(struct SGDescriptor *desc,
4558ec5cbf04SWebb Scales 				   struct scatterlist *sg)
4559ec5cbf04SWebb Scales {
4560ec5cbf04SWebb Scales 	u64 addr64 = (u64) sg_dma_address(sg);
4561ec5cbf04SWebb Scales 	unsigned int len = sg_dma_len(sg);
4562ec5cbf04SWebb Scales 
4563ec5cbf04SWebb Scales 	desc->Addr = cpu_to_le64(addr64);
4564ec5cbf04SWebb Scales 	desc->Len = cpu_to_le32(len);
4565ec5cbf04SWebb Scales 	desc->Ext = 0;
4566ec5cbf04SWebb Scales }
4567ec5cbf04SWebb Scales 
4568c7ee65b3SWebb Scales /*
4569c7ee65b3SWebb Scales  * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
4570edd16368SStephen M. Cameron  * dma mapping  and fills in the scatter gather entries of the
4571edd16368SStephen M. Cameron  * hpsa command, cp.
4572edd16368SStephen M. Cameron  */
457333a2ffceSStephen M. Cameron static int hpsa_scatter_gather(struct ctlr_info *h,
4574edd16368SStephen M. Cameron 		struct CommandList *cp,
4575edd16368SStephen M. Cameron 		struct scsi_cmnd *cmd)
4576edd16368SStephen M. Cameron {
4577edd16368SStephen M. Cameron 	struct scatterlist *sg;
45781fc65919SLee Jones 	int use_sg, i, sg_limit, chained;
457933a2ffceSStephen M. Cameron 	struct SGDescriptor *curr_sg;
4580edd16368SStephen M. Cameron 
458133a2ffceSStephen M. Cameron 	BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
4582edd16368SStephen M. Cameron 
4583edd16368SStephen M. Cameron 	use_sg = scsi_dma_map(cmd);
4584edd16368SStephen M. Cameron 	if (use_sg < 0)
4585edd16368SStephen M. Cameron 		return use_sg;
4586edd16368SStephen M. Cameron 
4587edd16368SStephen M. Cameron 	if (!use_sg)
4588edd16368SStephen M. Cameron 		goto sglist_finished;
4589edd16368SStephen M. Cameron 
4590b3a7ba7cSWebb Scales 	/*
4591b3a7ba7cSWebb Scales 	 * If the number of entries is greater than the max for a single list,
4592b3a7ba7cSWebb Scales 	 * then we have a chained list; we will set up all but one entry in the
4593b3a7ba7cSWebb Scales 	 * first list (the last entry is saved for link information);
4594b3a7ba7cSWebb Scales 	 * otherwise, we don't have a chained list and we'll set up at each of
4595b3a7ba7cSWebb Scales 	 * the entries in the one list.
4596b3a7ba7cSWebb Scales 	 */
459733a2ffceSStephen M. Cameron 	curr_sg = cp->SG;
4598b3a7ba7cSWebb Scales 	chained = use_sg > h->max_cmd_sg_entries;
4599b3a7ba7cSWebb Scales 	sg_limit = chained ? h->max_cmd_sg_entries - 1 : use_sg;
4600b3a7ba7cSWebb Scales 	scsi_for_each_sg(cmd, sg, sg_limit, i) {
4601ec5cbf04SWebb Scales 		hpsa_set_sg_descriptor(curr_sg, sg);
460233a2ffceSStephen M. Cameron 		curr_sg++;
460333a2ffceSStephen M. Cameron 	}
4604ec5cbf04SWebb Scales 
4605b3a7ba7cSWebb Scales 	if (chained) {
4606b3a7ba7cSWebb Scales 		/*
4607b3a7ba7cSWebb Scales 		 * Continue with the chained list.  Set curr_sg to the chained
4608b3a7ba7cSWebb Scales 		 * list.  Modify the limit to the total count less the entries
4609b3a7ba7cSWebb Scales 		 * we've already set up.  Resume the scan at the list entry
4610b3a7ba7cSWebb Scales 		 * where the previous loop left off.
4611b3a7ba7cSWebb Scales 		 */
4612b3a7ba7cSWebb Scales 		curr_sg = h->cmd_sg_list[cp->cmdindex];
4613b3a7ba7cSWebb Scales 		sg_limit = use_sg - sg_limit;
4614b3a7ba7cSWebb Scales 		for_each_sg(sg, sg, sg_limit, i) {
4615b3a7ba7cSWebb Scales 			hpsa_set_sg_descriptor(curr_sg, sg);
4616b3a7ba7cSWebb Scales 			curr_sg++;
4617b3a7ba7cSWebb Scales 		}
4618b3a7ba7cSWebb Scales 	}
4619b3a7ba7cSWebb Scales 
4620ec5cbf04SWebb Scales 	/* Back the pointer up to the last entry and mark it as "last". */
4621b3a7ba7cSWebb Scales 	(curr_sg - 1)->Ext = cpu_to_le32(HPSA_SG_LAST);
462233a2ffceSStephen M. Cameron 
462333a2ffceSStephen M. Cameron 	if (use_sg + chained > h->maxSG)
462433a2ffceSStephen M. Cameron 		h->maxSG = use_sg + chained;
462533a2ffceSStephen M. Cameron 
462633a2ffceSStephen M. Cameron 	if (chained) {
462733a2ffceSStephen M. Cameron 		cp->Header.SGList = h->max_cmd_sg_entries;
462850a0decfSStephen M. Cameron 		cp->Header.SGTotal = cpu_to_le16(use_sg + 1);
4629e2bea6dfSStephen M. Cameron 		if (hpsa_map_sg_chain_block(h, cp)) {
4630e2bea6dfSStephen M. Cameron 			scsi_dma_unmap(cmd);
4631e2bea6dfSStephen M. Cameron 			return -1;
4632e2bea6dfSStephen M. Cameron 		}
463333a2ffceSStephen M. Cameron 		return 0;
4634edd16368SStephen M. Cameron 	}
4635edd16368SStephen M. Cameron 
4636edd16368SStephen M. Cameron sglist_finished:
4637edd16368SStephen M. Cameron 
463801a02ffcSStephen M. Cameron 	cp->Header.SGList = (u8) use_sg;   /* no. SGs contig in this cmd */
4639c7ee65b3SWebb Scales 	cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */
4640edd16368SStephen M. Cameron 	return 0;
4641edd16368SStephen M. Cameron }
4642edd16368SStephen M. Cameron 
4643b63c64acSDon Brace static inline void warn_zero_length_transfer(struct ctlr_info *h,
4644b63c64acSDon Brace 						u8 *cdb, int cdb_len,
4645b63c64acSDon Brace 						const char *func)
4646b63c64acSDon Brace {
4647f4d0ad1fSAndy Shevchenko 	dev_warn(&h->pdev->dev,
4648f4d0ad1fSAndy Shevchenko 		 "%s: Blocking zero-length request: CDB:%*phN\n",
4649f4d0ad1fSAndy Shevchenko 		 func, cdb_len, cdb);
4650b63c64acSDon Brace }
4651b63c64acSDon Brace 
4652b63c64acSDon Brace #define IO_ACCEL_INELIGIBLE 1
4653b63c64acSDon Brace /* zero-length transfers trigger hardware errors. */
4654b63c64acSDon Brace static bool is_zero_length_transfer(u8 *cdb)
4655b63c64acSDon Brace {
4656b63c64acSDon Brace 	u32 block_cnt;
4657b63c64acSDon Brace 
4658b63c64acSDon Brace 	/* Block zero-length transfer sizes on certain commands. */
4659b63c64acSDon Brace 	switch (cdb[0]) {
4660b63c64acSDon Brace 	case READ_10:
4661b63c64acSDon Brace 	case WRITE_10:
4662b63c64acSDon Brace 	case VERIFY:		/* 0x2F */
4663b63c64acSDon Brace 	case WRITE_VERIFY:	/* 0x2E */
4664b63c64acSDon Brace 		block_cnt = get_unaligned_be16(&cdb[7]);
4665b63c64acSDon Brace 		break;
4666b63c64acSDon Brace 	case READ_12:
4667b63c64acSDon Brace 	case WRITE_12:
4668b63c64acSDon Brace 	case VERIFY_12: /* 0xAF */
4669b63c64acSDon Brace 	case WRITE_VERIFY_12:	/* 0xAE */
4670b63c64acSDon Brace 		block_cnt = get_unaligned_be32(&cdb[6]);
4671b63c64acSDon Brace 		break;
4672b63c64acSDon Brace 	case READ_16:
4673b63c64acSDon Brace 	case WRITE_16:
4674b63c64acSDon Brace 	case VERIFY_16:		/* 0x8F */
4675b63c64acSDon Brace 		block_cnt = get_unaligned_be32(&cdb[10]);
4676b63c64acSDon Brace 		break;
4677b63c64acSDon Brace 	default:
4678b63c64acSDon Brace 		return false;
4679b63c64acSDon Brace 	}
4680b63c64acSDon Brace 
4681b63c64acSDon Brace 	return block_cnt == 0;
4682b63c64acSDon Brace }
4683b63c64acSDon Brace 
4684283b4a9bSStephen M. Cameron static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len)
4685283b4a9bSStephen M. Cameron {
4686283b4a9bSStephen M. Cameron 	int is_write = 0;
4687283b4a9bSStephen M. Cameron 	u32 block;
4688283b4a9bSStephen M. Cameron 	u32 block_cnt;
4689283b4a9bSStephen M. Cameron 
4690283b4a9bSStephen M. Cameron 	/* Perform some CDB fixups if needed using 10 byte reads/writes only */
4691283b4a9bSStephen M. Cameron 	switch (cdb[0]) {
4692283b4a9bSStephen M. Cameron 	case WRITE_6:
4693283b4a9bSStephen M. Cameron 	case WRITE_12:
4694283b4a9bSStephen M. Cameron 		is_write = 1;
4695df561f66SGustavo A. R. Silva 		fallthrough;
4696283b4a9bSStephen M. Cameron 	case READ_6:
4697283b4a9bSStephen M. Cameron 	case READ_12:
4698283b4a9bSStephen M. Cameron 		if (*cdb_len == 6) {
4699abbada71SMahesh Rajashekhara 			block = (((cdb[1] & 0x1F) << 16) |
4700abbada71SMahesh Rajashekhara 				(cdb[2] << 8) |
4701abbada71SMahesh Rajashekhara 				cdb[3]);
4702283b4a9bSStephen M. Cameron 			block_cnt = cdb[4];
4703c8a6c9a6SDon Brace 			if (block_cnt == 0)
4704c8a6c9a6SDon Brace 				block_cnt = 256;
4705283b4a9bSStephen M. Cameron 		} else {
4706283b4a9bSStephen M. Cameron 			BUG_ON(*cdb_len != 12);
4707c8a6c9a6SDon Brace 			block = get_unaligned_be32(&cdb[2]);
4708c8a6c9a6SDon Brace 			block_cnt = get_unaligned_be32(&cdb[6]);
4709283b4a9bSStephen M. Cameron 		}
4710283b4a9bSStephen M. Cameron 		if (block_cnt > 0xffff)
4711283b4a9bSStephen M. Cameron 			return IO_ACCEL_INELIGIBLE;
4712283b4a9bSStephen M. Cameron 
4713283b4a9bSStephen M. Cameron 		cdb[0] = is_write ? WRITE_10 : READ_10;
4714283b4a9bSStephen M. Cameron 		cdb[1] = 0;
4715283b4a9bSStephen M. Cameron 		cdb[2] = (u8) (block >> 24);
4716283b4a9bSStephen M. Cameron 		cdb[3] = (u8) (block >> 16);
4717283b4a9bSStephen M. Cameron 		cdb[4] = (u8) (block >> 8);
4718283b4a9bSStephen M. Cameron 		cdb[5] = (u8) (block);
4719283b4a9bSStephen M. Cameron 		cdb[6] = 0;
4720283b4a9bSStephen M. Cameron 		cdb[7] = (u8) (block_cnt >> 8);
4721283b4a9bSStephen M. Cameron 		cdb[8] = (u8) (block_cnt);
4722283b4a9bSStephen M. Cameron 		cdb[9] = 0;
4723283b4a9bSStephen M. Cameron 		*cdb_len = 10;
4724283b4a9bSStephen M. Cameron 		break;
4725283b4a9bSStephen M. Cameron 	}
4726283b4a9bSStephen M. Cameron 	return 0;
4727283b4a9bSStephen M. Cameron }
4728283b4a9bSStephen M. Cameron 
4729c349775eSScott Teel static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h,
4730283b4a9bSStephen M. Cameron 	struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
473103383736SDon Brace 	u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4732e1f7de0cSMatt Gates {
4733e1f7de0cSMatt Gates 	struct scsi_cmnd *cmd = c->scsi_cmd;
4734e1f7de0cSMatt Gates 	struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
4735e1f7de0cSMatt Gates 	unsigned int len;
4736e1f7de0cSMatt Gates 	unsigned int total_len = 0;
4737e1f7de0cSMatt Gates 	struct scatterlist *sg;
4738e1f7de0cSMatt Gates 	u64 addr64;
4739e1f7de0cSMatt Gates 	int use_sg, i;
4740e1f7de0cSMatt Gates 	struct SGDescriptor *curr_sg;
4741e1f7de0cSMatt Gates 	u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE;
4742e1f7de0cSMatt Gates 
4743283b4a9bSStephen M. Cameron 	/* TODO: implement chaining support */
474403383736SDon Brace 	if (scsi_sg_count(cmd) > h->ioaccel_maxsg) {
474503383736SDon Brace 		atomic_dec(&phys_disk->ioaccel_cmds_out);
4746283b4a9bSStephen M. Cameron 		return IO_ACCEL_INELIGIBLE;
474703383736SDon Brace 	}
4748283b4a9bSStephen M. Cameron 
4749e1f7de0cSMatt Gates 	BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX);
4750e1f7de0cSMatt Gates 
4751b63c64acSDon Brace 	if (is_zero_length_transfer(cdb)) {
4752b63c64acSDon Brace 		warn_zero_length_transfer(h, cdb, cdb_len, __func__);
4753b63c64acSDon Brace 		atomic_dec(&phys_disk->ioaccel_cmds_out);
4754b63c64acSDon Brace 		return IO_ACCEL_INELIGIBLE;
4755b63c64acSDon Brace 	}
4756b63c64acSDon Brace 
475703383736SDon Brace 	if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
475803383736SDon Brace 		atomic_dec(&phys_disk->ioaccel_cmds_out);
4759283b4a9bSStephen M. Cameron 		return IO_ACCEL_INELIGIBLE;
476003383736SDon Brace 	}
4761283b4a9bSStephen M. Cameron 
4762e1f7de0cSMatt Gates 	c->cmd_type = CMD_IOACCEL1;
4763e1f7de0cSMatt Gates 
4764e1f7de0cSMatt Gates 	/* Adjust the DMA address to point to the accelerated command buffer */
4765e1f7de0cSMatt Gates 	c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle +
4766e1f7de0cSMatt Gates 				(c->cmdindex * sizeof(*cp));
4767e1f7de0cSMatt Gates 	BUG_ON(c->busaddr & 0x0000007F);
4768e1f7de0cSMatt Gates 
4769e1f7de0cSMatt Gates 	use_sg = scsi_dma_map(cmd);
477003383736SDon Brace 	if (use_sg < 0) {
477103383736SDon Brace 		atomic_dec(&phys_disk->ioaccel_cmds_out);
4772e1f7de0cSMatt Gates 		return use_sg;
477303383736SDon Brace 	}
4774e1f7de0cSMatt Gates 
4775e1f7de0cSMatt Gates 	if (use_sg) {
4776e1f7de0cSMatt Gates 		curr_sg = cp->SG;
4777e1f7de0cSMatt Gates 		scsi_for_each_sg(cmd, sg, use_sg, i) {
4778e1f7de0cSMatt Gates 			addr64 = (u64) sg_dma_address(sg);
4779e1f7de0cSMatt Gates 			len  = sg_dma_len(sg);
4780e1f7de0cSMatt Gates 			total_len += len;
478150a0decfSStephen M. Cameron 			curr_sg->Addr = cpu_to_le64(addr64);
478250a0decfSStephen M. Cameron 			curr_sg->Len = cpu_to_le32(len);
478350a0decfSStephen M. Cameron 			curr_sg->Ext = cpu_to_le32(0);
4784e1f7de0cSMatt Gates 			curr_sg++;
4785e1f7de0cSMatt Gates 		}
478650a0decfSStephen M. Cameron 		(--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST);
4787e1f7de0cSMatt Gates 
4788e1f7de0cSMatt Gates 		switch (cmd->sc_data_direction) {
4789e1f7de0cSMatt Gates 		case DMA_TO_DEVICE:
4790e1f7de0cSMatt Gates 			control |= IOACCEL1_CONTROL_DATA_OUT;
4791e1f7de0cSMatt Gates 			break;
4792e1f7de0cSMatt Gates 		case DMA_FROM_DEVICE:
4793e1f7de0cSMatt Gates 			control |= IOACCEL1_CONTROL_DATA_IN;
4794e1f7de0cSMatt Gates 			break;
4795e1f7de0cSMatt Gates 		case DMA_NONE:
4796e1f7de0cSMatt Gates 			control |= IOACCEL1_CONTROL_NODATAXFER;
4797e1f7de0cSMatt Gates 			break;
4798e1f7de0cSMatt Gates 		default:
4799e1f7de0cSMatt Gates 			dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4800e1f7de0cSMatt Gates 			cmd->sc_data_direction);
4801e1f7de0cSMatt Gates 			BUG();
4802e1f7de0cSMatt Gates 			break;
4803e1f7de0cSMatt Gates 		}
4804e1f7de0cSMatt Gates 	} else {
4805e1f7de0cSMatt Gates 		control |= IOACCEL1_CONTROL_NODATAXFER;
4806e1f7de0cSMatt Gates 	}
4807e1f7de0cSMatt Gates 
4808c349775eSScott Teel 	c->Header.SGList = use_sg;
4809e1f7de0cSMatt Gates 	/* Fill out the command structure to submit */
48102b08b3e9SDon Brace 	cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF);
48112b08b3e9SDon Brace 	cp->transfer_len = cpu_to_le32(total_len);
48122b08b3e9SDon Brace 	cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ |
48132b08b3e9SDon Brace 			(cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK));
48142b08b3e9SDon Brace 	cp->control = cpu_to_le32(control);
4815283b4a9bSStephen M. Cameron 	memcpy(cp->CDB, cdb, cdb_len);
4816283b4a9bSStephen M. Cameron 	memcpy(cp->CISS_LUN, scsi3addr, 8);
4817c349775eSScott Teel 	/* Tag was already set at init time. */
4818e1f7de0cSMatt Gates 	enqueue_cmd_and_start_io(h, c);
4819e1f7de0cSMatt Gates 	return 0;
4820e1f7de0cSMatt Gates }
4821edd16368SStephen M. Cameron 
4822283b4a9bSStephen M. Cameron /*
4823283b4a9bSStephen M. Cameron  * Queue a command directly to a device behind the controller using the
4824283b4a9bSStephen M. Cameron  * I/O accelerator path.
4825283b4a9bSStephen M. Cameron  */
4826283b4a9bSStephen M. Cameron static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h,
4827283b4a9bSStephen M. Cameron 	struct CommandList *c)
4828283b4a9bSStephen M. Cameron {
4829283b4a9bSStephen M. Cameron 	struct scsi_cmnd *cmd = c->scsi_cmd;
4830283b4a9bSStephen M. Cameron 	struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4831283b4a9bSStephen M. Cameron 
483245e596cdSDon Brace 	if (!dev)
483345e596cdSDon Brace 		return -1;
483445e596cdSDon Brace 
483503383736SDon Brace 	c->phys_disk = dev;
483603383736SDon Brace 
4837c5dfd106SDon Brace 	if (dev->in_reset)
4838c5dfd106SDon Brace 		return -1;
4839c5dfd106SDon Brace 
4840283b4a9bSStephen M. Cameron 	return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle,
484103383736SDon Brace 		cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev);
4842283b4a9bSStephen M. Cameron }
4843283b4a9bSStephen M. Cameron 
4844dd0e19f3SScott Teel /*
4845dd0e19f3SScott Teel  * Set encryption parameters for the ioaccel2 request
4846dd0e19f3SScott Teel  */
4847dd0e19f3SScott Teel static void set_encrypt_ioaccel2(struct ctlr_info *h,
4848dd0e19f3SScott Teel 	struct CommandList *c, struct io_accel2_cmd *cp)
4849dd0e19f3SScott Teel {
4850dd0e19f3SScott Teel 	struct scsi_cmnd *cmd = c->scsi_cmd;
4851dd0e19f3SScott Teel 	struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4852dd0e19f3SScott Teel 	struct raid_map_data *map = &dev->raid_map;
4853dd0e19f3SScott Teel 	u64 first_block;
4854dd0e19f3SScott Teel 
4855dd0e19f3SScott Teel 	/* Are we doing encryption on this device */
48562b08b3e9SDon Brace 	if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON))
4857dd0e19f3SScott Teel 		return;
4858dd0e19f3SScott Teel 	/* Set the data encryption key index. */
4859dd0e19f3SScott Teel 	cp->dekindex = map->dekindex;
4860dd0e19f3SScott Teel 
4861dd0e19f3SScott Teel 	/* Set the encryption enable flag, encoded into direction field. */
4862dd0e19f3SScott Teel 	cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK;
4863dd0e19f3SScott Teel 
4864dd0e19f3SScott Teel 	/* Set encryption tweak values based on logical block address
4865dd0e19f3SScott Teel 	 * If block size is 512, tweak value is LBA.
4866dd0e19f3SScott Teel 	 * For other block sizes, tweak is (LBA * block size)/ 512)
4867dd0e19f3SScott Teel 	 */
4868dd0e19f3SScott Teel 	switch (cmd->cmnd[0]) {
4869dd0e19f3SScott Teel 	/* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */
4870dd0e19f3SScott Teel 	case READ_6:
4871abbada71SMahesh Rajashekhara 	case WRITE_6:
4872abbada71SMahesh Rajashekhara 		first_block = (((cmd->cmnd[1] & 0x1F) << 16) |
4873abbada71SMahesh Rajashekhara 				(cmd->cmnd[2] << 8) |
4874abbada71SMahesh Rajashekhara 				cmd->cmnd[3]);
4875dd0e19f3SScott Teel 		break;
4876dd0e19f3SScott Teel 	case WRITE_10:
4877dd0e19f3SScott Teel 	case READ_10:
4878dd0e19f3SScott Teel 	/* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */
4879dd0e19f3SScott Teel 	case WRITE_12:
4880dd0e19f3SScott Teel 	case READ_12:
48812b08b3e9SDon Brace 		first_block = get_unaligned_be32(&cmd->cmnd[2]);
4882dd0e19f3SScott Teel 		break;
4883dd0e19f3SScott Teel 	case WRITE_16:
4884dd0e19f3SScott Teel 	case READ_16:
48852b08b3e9SDon Brace 		first_block = get_unaligned_be64(&cmd->cmnd[2]);
4886dd0e19f3SScott Teel 		break;
4887dd0e19f3SScott Teel 	default:
4888dd0e19f3SScott Teel 		dev_err(&h->pdev->dev,
48892b08b3e9SDon Brace 			"ERROR: %s: size (0x%x) not supported for encryption\n",
48902b08b3e9SDon Brace 			__func__, cmd->cmnd[0]);
4891dd0e19f3SScott Teel 		BUG();
4892dd0e19f3SScott Teel 		break;
4893dd0e19f3SScott Teel 	}
48942b08b3e9SDon Brace 
48952b08b3e9SDon Brace 	if (le32_to_cpu(map->volume_blk_size) != 512)
48962b08b3e9SDon Brace 		first_block = first_block *
48972b08b3e9SDon Brace 				le32_to_cpu(map->volume_blk_size)/512;
48982b08b3e9SDon Brace 
48992b08b3e9SDon Brace 	cp->tweak_lower = cpu_to_le32(first_block);
49002b08b3e9SDon Brace 	cp->tweak_upper = cpu_to_le32(first_block >> 32);
4901dd0e19f3SScott Teel }
4902dd0e19f3SScott Teel 
4903c349775eSScott Teel static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h,
4904c349775eSScott Teel 	struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
490503383736SDon Brace 	u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4906c349775eSScott Teel {
4907c349775eSScott Teel 	struct scsi_cmnd *cmd = c->scsi_cmd;
4908c349775eSScott Teel 	struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
4909c349775eSScott Teel 	struct ioaccel2_sg_element *curr_sg;
4910c349775eSScott Teel 	int use_sg, i;
4911c349775eSScott Teel 	struct scatterlist *sg;
4912c349775eSScott Teel 	u64 addr64;
4913c349775eSScott Teel 	u32 len;
4914c349775eSScott Teel 	u32 total_len = 0;
4915c349775eSScott Teel 
491645e596cdSDon Brace 	if (!cmd->device)
491745e596cdSDon Brace 		return -1;
491845e596cdSDon Brace 
491945e596cdSDon Brace 	if (!cmd->device->hostdata)
492045e596cdSDon Brace 		return -1;
492145e596cdSDon Brace 
4922d9a729f3SWebb Scales 	BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
4923c349775eSScott Teel 
4924b63c64acSDon Brace 	if (is_zero_length_transfer(cdb)) {
4925b63c64acSDon Brace 		warn_zero_length_transfer(h, cdb, cdb_len, __func__);
4926b63c64acSDon Brace 		atomic_dec(&phys_disk->ioaccel_cmds_out);
4927b63c64acSDon Brace 		return IO_ACCEL_INELIGIBLE;
4928b63c64acSDon Brace 	}
4929b63c64acSDon Brace 
493003383736SDon Brace 	if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
493103383736SDon Brace 		atomic_dec(&phys_disk->ioaccel_cmds_out);
4932c349775eSScott Teel 		return IO_ACCEL_INELIGIBLE;
493303383736SDon Brace 	}
493403383736SDon Brace 
4935c349775eSScott Teel 	c->cmd_type = CMD_IOACCEL2;
4936c349775eSScott Teel 	/* Adjust the DMA address to point to the accelerated command buffer */
4937c349775eSScott Teel 	c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle +
4938c349775eSScott Teel 				(c->cmdindex * sizeof(*cp));
4939c349775eSScott Teel 	BUG_ON(c->busaddr & 0x0000007F);
4940c349775eSScott Teel 
4941c349775eSScott Teel 	memset(cp, 0, sizeof(*cp));
4942c349775eSScott Teel 	cp->IU_type = IOACCEL2_IU_TYPE;
4943c349775eSScott Teel 
4944c349775eSScott Teel 	use_sg = scsi_dma_map(cmd);
494503383736SDon Brace 	if (use_sg < 0) {
494603383736SDon Brace 		atomic_dec(&phys_disk->ioaccel_cmds_out);
4947c349775eSScott Teel 		return use_sg;
494803383736SDon Brace 	}
4949c349775eSScott Teel 
4950c349775eSScott Teel 	if (use_sg) {
4951c349775eSScott Teel 		curr_sg = cp->sg;
4952d9a729f3SWebb Scales 		if (use_sg > h->ioaccel_maxsg) {
4953d9a729f3SWebb Scales 			addr64 = le64_to_cpu(
4954d9a729f3SWebb Scales 				h->ioaccel2_cmd_sg_list[c->cmdindex]->address);
4955d9a729f3SWebb Scales 			curr_sg->address = cpu_to_le64(addr64);
4956d9a729f3SWebb Scales 			curr_sg->length = 0;
4957d9a729f3SWebb Scales 			curr_sg->reserved[0] = 0;
4958d9a729f3SWebb Scales 			curr_sg->reserved[1] = 0;
4959d9a729f3SWebb Scales 			curr_sg->reserved[2] = 0;
4960625d7d35SDon Brace 			curr_sg->chain_indicator = IOACCEL2_CHAIN;
4961d9a729f3SWebb Scales 
4962d9a729f3SWebb Scales 			curr_sg = h->ioaccel2_cmd_sg_list[c->cmdindex];
4963d9a729f3SWebb Scales 		}
4964c349775eSScott Teel 		scsi_for_each_sg(cmd, sg, use_sg, i) {
4965c349775eSScott Teel 			addr64 = (u64) sg_dma_address(sg);
4966c349775eSScott Teel 			len  = sg_dma_len(sg);
4967c349775eSScott Teel 			total_len += len;
4968c349775eSScott Teel 			curr_sg->address = cpu_to_le64(addr64);
4969c349775eSScott Teel 			curr_sg->length = cpu_to_le32(len);
4970c349775eSScott Teel 			curr_sg->reserved[0] = 0;
4971c349775eSScott Teel 			curr_sg->reserved[1] = 0;
4972c349775eSScott Teel 			curr_sg->reserved[2] = 0;
4973c349775eSScott Teel 			curr_sg->chain_indicator = 0;
4974c349775eSScott Teel 			curr_sg++;
4975c349775eSScott Teel 		}
4976c349775eSScott Teel 
4977625d7d35SDon Brace 		/*
4978625d7d35SDon Brace 		 * Set the last s/g element bit
4979625d7d35SDon Brace 		 */
4980625d7d35SDon Brace 		(curr_sg - 1)->chain_indicator = IOACCEL2_LAST_SG;
4981625d7d35SDon Brace 
4982c349775eSScott Teel 		switch (cmd->sc_data_direction) {
4983c349775eSScott Teel 		case DMA_TO_DEVICE:
4984dd0e19f3SScott Teel 			cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4985dd0e19f3SScott Teel 			cp->direction |= IOACCEL2_DIR_DATA_OUT;
4986c349775eSScott Teel 			break;
4987c349775eSScott Teel 		case DMA_FROM_DEVICE:
4988dd0e19f3SScott Teel 			cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4989dd0e19f3SScott Teel 			cp->direction |= IOACCEL2_DIR_DATA_IN;
4990c349775eSScott Teel 			break;
4991c349775eSScott Teel 		case DMA_NONE:
4992dd0e19f3SScott Teel 			cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4993dd0e19f3SScott Teel 			cp->direction |= IOACCEL2_DIR_NO_DATA;
4994c349775eSScott Teel 			break;
4995c349775eSScott Teel 		default:
4996c349775eSScott Teel 			dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4997c349775eSScott Teel 				cmd->sc_data_direction);
4998c349775eSScott Teel 			BUG();
4999c349775eSScott Teel 			break;
5000c349775eSScott Teel 		}
5001c349775eSScott Teel 	} else {
5002dd0e19f3SScott Teel 		cp->direction &= ~IOACCEL2_DIRECTION_MASK;
5003dd0e19f3SScott Teel 		cp->direction |= IOACCEL2_DIR_NO_DATA;
5004c349775eSScott Teel 	}
5005dd0e19f3SScott Teel 
5006dd0e19f3SScott Teel 	/* Set encryption parameters, if necessary */
5007dd0e19f3SScott Teel 	set_encrypt_ioaccel2(h, c, cp);
5008dd0e19f3SScott Teel 
50092b08b3e9SDon Brace 	cp->scsi_nexus = cpu_to_le32(ioaccel_handle);
5010f2405db8SDon Brace 	cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT);
5011c349775eSScott Teel 	memcpy(cp->cdb, cdb, sizeof(cp->cdb));
5012c349775eSScott Teel 
5013c349775eSScott Teel 	cp->data_len = cpu_to_le32(total_len);
5014c349775eSScott Teel 	cp->err_ptr = cpu_to_le64(c->busaddr +
5015c349775eSScott Teel 			offsetof(struct io_accel2_cmd, error_data));
501650a0decfSStephen M. Cameron 	cp->err_len = cpu_to_le32(sizeof(cp->error_data));
5017c349775eSScott Teel 
5018d9a729f3SWebb Scales 	/* fill in sg elements */
5019d9a729f3SWebb Scales 	if (use_sg > h->ioaccel_maxsg) {
5020d9a729f3SWebb Scales 		cp->sg_count = 1;
5021a736e9b6SDon Brace 		cp->sg[0].length = cpu_to_le32(use_sg * sizeof(cp->sg[0]));
5022d9a729f3SWebb Scales 		if (hpsa_map_ioaccel2_sg_chain_block(h, cp, c)) {
5023d9a729f3SWebb Scales 			atomic_dec(&phys_disk->ioaccel_cmds_out);
5024d9a729f3SWebb Scales 			scsi_dma_unmap(cmd);
5025d9a729f3SWebb Scales 			return -1;
5026d9a729f3SWebb Scales 		}
5027d9a729f3SWebb Scales 	} else
5028d9a729f3SWebb Scales 		cp->sg_count = (u8) use_sg;
5029d9a729f3SWebb Scales 
5030c5dfd106SDon Brace 	if (phys_disk->in_reset) {
5031c5dfd106SDon Brace 		cmd->result = DID_RESET << 16;
5032c5dfd106SDon Brace 		return -1;
5033c5dfd106SDon Brace 	}
5034c5dfd106SDon Brace 
5035c349775eSScott Teel 	enqueue_cmd_and_start_io(h, c);
5036c349775eSScott Teel 	return 0;
5037c349775eSScott Teel }
5038c349775eSScott Teel 
5039c349775eSScott Teel /*
5040c349775eSScott Teel  * Queue a command to the correct I/O accelerator path.
5041c349775eSScott Teel  */
5042c349775eSScott Teel static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
5043c349775eSScott Teel 	struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
504403383736SDon Brace 	u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
5045c349775eSScott Teel {
504645e596cdSDon Brace 	if (!c->scsi_cmd->device)
504745e596cdSDon Brace 		return -1;
504845e596cdSDon Brace 
504945e596cdSDon Brace 	if (!c->scsi_cmd->device->hostdata)
505045e596cdSDon Brace 		return -1;
505145e596cdSDon Brace 
5052c5dfd106SDon Brace 	if (phys_disk->in_reset)
5053c5dfd106SDon Brace 		return -1;
5054c5dfd106SDon Brace 
505503383736SDon Brace 	/* Try to honor the device's queue depth */
505603383736SDon Brace 	if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) >
505703383736SDon Brace 					phys_disk->queue_depth) {
505803383736SDon Brace 		atomic_dec(&phys_disk->ioaccel_cmds_out);
505903383736SDon Brace 		return IO_ACCEL_INELIGIBLE;
506003383736SDon Brace 	}
5061c349775eSScott Teel 	if (h->transMethod & CFGTBL_Trans_io_accel1)
5062c349775eSScott Teel 		return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle,
506303383736SDon Brace 						cdb, cdb_len, scsi3addr,
506403383736SDon Brace 						phys_disk);
5065c349775eSScott Teel 	else
5066c349775eSScott Teel 		return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle,
506703383736SDon Brace 						cdb, cdb_len, scsi3addr,
506803383736SDon Brace 						phys_disk);
5069c349775eSScott Teel }
5070c349775eSScott Teel 
50716b80b18fSScott Teel static void raid_map_helper(struct raid_map_data *map,
50726b80b18fSScott Teel 		int offload_to_mirror, u32 *map_index, u32 *current_group)
50736b80b18fSScott Teel {
50746b80b18fSScott Teel 	if (offload_to_mirror == 0)  {
50756b80b18fSScott Teel 		/* use physical disk in the first mirrored group. */
50762b08b3e9SDon Brace 		*map_index %= le16_to_cpu(map->data_disks_per_row);
50776b80b18fSScott Teel 		return;
50786b80b18fSScott Teel 	}
50796b80b18fSScott Teel 	do {
50806b80b18fSScott Teel 		/* determine mirror group that *map_index indicates */
50812b08b3e9SDon Brace 		*current_group = *map_index /
50822b08b3e9SDon Brace 			le16_to_cpu(map->data_disks_per_row);
50836b80b18fSScott Teel 		if (offload_to_mirror == *current_group)
50846b80b18fSScott Teel 			continue;
50852b08b3e9SDon Brace 		if (*current_group < le16_to_cpu(map->layout_map_count) - 1) {
50866b80b18fSScott Teel 			/* select map index from next group */
50872b08b3e9SDon Brace 			*map_index += le16_to_cpu(map->data_disks_per_row);
50886b80b18fSScott Teel 			(*current_group)++;
50896b80b18fSScott Teel 		} else {
50906b80b18fSScott Teel 			/* select map index from first group */
50912b08b3e9SDon Brace 			*map_index %= le16_to_cpu(map->data_disks_per_row);
50926b80b18fSScott Teel 			*current_group = 0;
50936b80b18fSScott Teel 		}
50946b80b18fSScott Teel 	} while (offload_to_mirror != *current_group);
50956b80b18fSScott Teel }
50966b80b18fSScott Teel 
5097283b4a9bSStephen M. Cameron /*
5098283b4a9bSStephen M. Cameron  * Attempt to perform offload RAID mapping for a logical volume I/O.
5099283b4a9bSStephen M. Cameron  */
5100283b4a9bSStephen M. Cameron static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h,
5101283b4a9bSStephen M. Cameron 	struct CommandList *c)
5102283b4a9bSStephen M. Cameron {
5103283b4a9bSStephen M. Cameron 	struct scsi_cmnd *cmd = c->scsi_cmd;
5104283b4a9bSStephen M. Cameron 	struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
5105283b4a9bSStephen M. Cameron 	struct raid_map_data *map = &dev->raid_map;
5106283b4a9bSStephen M. Cameron 	struct raid_map_disk_data *dd = &map->data[0];
5107283b4a9bSStephen M. Cameron 	int is_write = 0;
5108283b4a9bSStephen M. Cameron 	u32 map_index;
5109283b4a9bSStephen M. Cameron 	u64 first_block, last_block;
5110283b4a9bSStephen M. Cameron 	u32 block_cnt;
5111283b4a9bSStephen M. Cameron 	u32 blocks_per_row;
5112283b4a9bSStephen M. Cameron 	u64 first_row, last_row;
5113283b4a9bSStephen M. Cameron 	u32 first_row_offset, last_row_offset;
5114283b4a9bSStephen M. Cameron 	u32 first_column, last_column;
51156b80b18fSScott Teel 	u64 r0_first_row, r0_last_row;
51166b80b18fSScott Teel 	u32 r5or6_blocks_per_row;
51176b80b18fSScott Teel 	u64 r5or6_first_row, r5or6_last_row;
51186b80b18fSScott Teel 	u32 r5or6_first_row_offset, r5or6_last_row_offset;
51196b80b18fSScott Teel 	u32 r5or6_first_column, r5or6_last_column;
51206b80b18fSScott Teel 	u32 total_disks_per_row;
51216b80b18fSScott Teel 	u32 stripesize;
51226b80b18fSScott Teel 	u32 first_group, last_group, current_group;
5123283b4a9bSStephen M. Cameron 	u32 map_row;
5124283b4a9bSStephen M. Cameron 	u32 disk_handle;
5125283b4a9bSStephen M. Cameron 	u64 disk_block;
5126283b4a9bSStephen M. Cameron 	u32 disk_block_cnt;
5127283b4a9bSStephen M. Cameron 	u8 cdb[16];
5128283b4a9bSStephen M. Cameron 	u8 cdb_len;
51292b08b3e9SDon Brace 	u16 strip_size;
5130283b4a9bSStephen M. Cameron #if BITS_PER_LONG == 32
5131283b4a9bSStephen M. Cameron 	u64 tmpdiv;
5132283b4a9bSStephen M. Cameron #endif
51336b80b18fSScott Teel 	int offload_to_mirror;
5134283b4a9bSStephen M. Cameron 
513545e596cdSDon Brace 	if (!dev)
513645e596cdSDon Brace 		return -1;
513745e596cdSDon Brace 
5138c5dfd106SDon Brace 	if (dev->in_reset)
5139c5dfd106SDon Brace 		return -1;
5140c5dfd106SDon Brace 
5141283b4a9bSStephen M. Cameron 	/* check for valid opcode, get LBA and block count */
5142283b4a9bSStephen M. Cameron 	switch (cmd->cmnd[0]) {
5143283b4a9bSStephen M. Cameron 	case WRITE_6:
5144283b4a9bSStephen M. Cameron 		is_write = 1;
5145df561f66SGustavo A. R. Silva 		fallthrough;
5146283b4a9bSStephen M. Cameron 	case READ_6:
5147abbada71SMahesh Rajashekhara 		first_block = (((cmd->cmnd[1] & 0x1F) << 16) |
5148abbada71SMahesh Rajashekhara 				(cmd->cmnd[2] << 8) |
5149abbada71SMahesh Rajashekhara 				cmd->cmnd[3]);
5150283b4a9bSStephen M. Cameron 		block_cnt = cmd->cmnd[4];
51513fa89a04SStephen M. Cameron 		if (block_cnt == 0)
51523fa89a04SStephen M. Cameron 			block_cnt = 256;
5153283b4a9bSStephen M. Cameron 		break;
5154283b4a9bSStephen M. Cameron 	case WRITE_10:
5155283b4a9bSStephen M. Cameron 		is_write = 1;
5156df561f66SGustavo A. R. Silva 		fallthrough;
5157283b4a9bSStephen M. Cameron 	case READ_10:
5158283b4a9bSStephen M. Cameron 		first_block =
5159283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[2]) << 24) |
5160283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[3]) << 16) |
5161283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[4]) << 8) |
5162283b4a9bSStephen M. Cameron 			cmd->cmnd[5];
5163283b4a9bSStephen M. Cameron 		block_cnt =
5164283b4a9bSStephen M. Cameron 			(((u32) cmd->cmnd[7]) << 8) |
5165283b4a9bSStephen M. Cameron 			cmd->cmnd[8];
5166283b4a9bSStephen M. Cameron 		break;
5167283b4a9bSStephen M. Cameron 	case WRITE_12:
5168283b4a9bSStephen M. Cameron 		is_write = 1;
5169df561f66SGustavo A. R. Silva 		fallthrough;
5170283b4a9bSStephen M. Cameron 	case READ_12:
5171283b4a9bSStephen M. Cameron 		first_block =
5172283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[2]) << 24) |
5173283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[3]) << 16) |
5174283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[4]) << 8) |
5175283b4a9bSStephen M. Cameron 			cmd->cmnd[5];
5176283b4a9bSStephen M. Cameron 		block_cnt =
5177283b4a9bSStephen M. Cameron 			(((u32) cmd->cmnd[6]) << 24) |
5178283b4a9bSStephen M. Cameron 			(((u32) cmd->cmnd[7]) << 16) |
5179283b4a9bSStephen M. Cameron 			(((u32) cmd->cmnd[8]) << 8) |
5180283b4a9bSStephen M. Cameron 		cmd->cmnd[9];
5181283b4a9bSStephen M. Cameron 		break;
5182283b4a9bSStephen M. Cameron 	case WRITE_16:
5183283b4a9bSStephen M. Cameron 		is_write = 1;
5184df561f66SGustavo A. R. Silva 		fallthrough;
5185283b4a9bSStephen M. Cameron 	case READ_16:
5186283b4a9bSStephen M. Cameron 		first_block =
5187283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[2]) << 56) |
5188283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[3]) << 48) |
5189283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[4]) << 40) |
5190283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[5]) << 32) |
5191283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[6]) << 24) |
5192283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[7]) << 16) |
5193283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[8]) << 8) |
5194283b4a9bSStephen M. Cameron 			cmd->cmnd[9];
5195283b4a9bSStephen M. Cameron 		block_cnt =
5196283b4a9bSStephen M. Cameron 			(((u32) cmd->cmnd[10]) << 24) |
5197283b4a9bSStephen M. Cameron 			(((u32) cmd->cmnd[11]) << 16) |
5198283b4a9bSStephen M. Cameron 			(((u32) cmd->cmnd[12]) << 8) |
5199283b4a9bSStephen M. Cameron 			cmd->cmnd[13];
5200283b4a9bSStephen M. Cameron 		break;
5201283b4a9bSStephen M. Cameron 	default:
5202283b4a9bSStephen M. Cameron 		return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */
5203283b4a9bSStephen M. Cameron 	}
5204283b4a9bSStephen M. Cameron 	last_block = first_block + block_cnt - 1;
5205283b4a9bSStephen M. Cameron 
5206283b4a9bSStephen M. Cameron 	/* check for write to non-RAID-0 */
5207283b4a9bSStephen M. Cameron 	if (is_write && dev->raid_level != 0)
5208283b4a9bSStephen M. Cameron 		return IO_ACCEL_INELIGIBLE;
5209283b4a9bSStephen M. Cameron 
5210283b4a9bSStephen M. Cameron 	/* check for invalid block or wraparound */
52112b08b3e9SDon Brace 	if (last_block >= le64_to_cpu(map->volume_blk_cnt) ||
52122b08b3e9SDon Brace 		last_block < first_block)
5213283b4a9bSStephen M. Cameron 		return IO_ACCEL_INELIGIBLE;
5214283b4a9bSStephen M. Cameron 
5215283b4a9bSStephen M. Cameron 	/* calculate stripe information for the request */
52162b08b3e9SDon Brace 	blocks_per_row = le16_to_cpu(map->data_disks_per_row) *
52172b08b3e9SDon Brace 				le16_to_cpu(map->strip_size);
52182b08b3e9SDon Brace 	strip_size = le16_to_cpu(map->strip_size);
5219283b4a9bSStephen M. Cameron #if BITS_PER_LONG == 32
5220283b4a9bSStephen M. Cameron 	tmpdiv = first_block;
5221283b4a9bSStephen M. Cameron 	(void) do_div(tmpdiv, blocks_per_row);
5222283b4a9bSStephen M. Cameron 	first_row = tmpdiv;
5223283b4a9bSStephen M. Cameron 	tmpdiv = last_block;
5224283b4a9bSStephen M. Cameron 	(void) do_div(tmpdiv, blocks_per_row);
5225283b4a9bSStephen M. Cameron 	last_row = tmpdiv;
5226283b4a9bSStephen M. Cameron 	first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
5227283b4a9bSStephen M. Cameron 	last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
5228283b4a9bSStephen M. Cameron 	tmpdiv = first_row_offset;
52292b08b3e9SDon Brace 	(void) do_div(tmpdiv, strip_size);
5230283b4a9bSStephen M. Cameron 	first_column = tmpdiv;
5231283b4a9bSStephen M. Cameron 	tmpdiv = last_row_offset;
52322b08b3e9SDon Brace 	(void) do_div(tmpdiv, strip_size);
5233283b4a9bSStephen M. Cameron 	last_column = tmpdiv;
5234283b4a9bSStephen M. Cameron #else
5235283b4a9bSStephen M. Cameron 	first_row = first_block / blocks_per_row;
5236283b4a9bSStephen M. Cameron 	last_row = last_block / blocks_per_row;
5237283b4a9bSStephen M. Cameron 	first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
5238283b4a9bSStephen M. Cameron 	last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
52392b08b3e9SDon Brace 	first_column = first_row_offset / strip_size;
52402b08b3e9SDon Brace 	last_column = last_row_offset / strip_size;
5241283b4a9bSStephen M. Cameron #endif
5242283b4a9bSStephen M. Cameron 
5243283b4a9bSStephen M. Cameron 	/* if this isn't a single row/column then give to the controller */
5244283b4a9bSStephen M. Cameron 	if ((first_row != last_row) || (first_column != last_column))
5245283b4a9bSStephen M. Cameron 		return IO_ACCEL_INELIGIBLE;
5246283b4a9bSStephen M. Cameron 
5247283b4a9bSStephen M. Cameron 	/* proceeding with driver mapping */
52482b08b3e9SDon Brace 	total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
52492b08b3e9SDon Brace 				le16_to_cpu(map->metadata_disks_per_row);
5250283b4a9bSStephen M. Cameron 	map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
52512b08b3e9SDon Brace 				le16_to_cpu(map->row_cnt);
52526b80b18fSScott Teel 	map_index = (map_row * total_disks_per_row) + first_column;
52536b80b18fSScott Teel 
52546b80b18fSScott Teel 	switch (dev->raid_level) {
52556b80b18fSScott Teel 	case HPSA_RAID_0:
52566b80b18fSScott Teel 		break; /* nothing special to do */
52576b80b18fSScott Teel 	case HPSA_RAID_1:
52586b80b18fSScott Teel 		/* Handles load balance across RAID 1 members.
52596b80b18fSScott Teel 		 * (2-drive R1 and R10 with even # of drives.)
52606b80b18fSScott Teel 		 * Appropriate for SSDs, not optimal for HDDs
52613e16e83aSDon Brace 		 * Ensure we have the correct raid_map.
5262283b4a9bSStephen M. Cameron 		 */
52633e16e83aSDon Brace 		if (le16_to_cpu(map->layout_map_count) != 2) {
52643e16e83aSDon Brace 			hpsa_turn_off_ioaccel_for_device(dev);
52653e16e83aSDon Brace 			return IO_ACCEL_INELIGIBLE;
52663e16e83aSDon Brace 		}
5267283b4a9bSStephen M. Cameron 		if (dev->offload_to_mirror)
52682b08b3e9SDon Brace 			map_index += le16_to_cpu(map->data_disks_per_row);
5269283b4a9bSStephen M. Cameron 		dev->offload_to_mirror = !dev->offload_to_mirror;
52706b80b18fSScott Teel 		break;
52716b80b18fSScott Teel 	case HPSA_RAID_ADM:
52726b80b18fSScott Teel 		/* Handles N-way mirrors  (R1-ADM)
52736b80b18fSScott Teel 		 * and R10 with # of drives divisible by 3.)
52743e16e83aSDon Brace 		 * Ensure we have the correct raid_map.
52756b80b18fSScott Teel 		 */
52763e16e83aSDon Brace 		if (le16_to_cpu(map->layout_map_count) != 3) {
52773e16e83aSDon Brace 			hpsa_turn_off_ioaccel_for_device(dev);
52783e16e83aSDon Brace 			return IO_ACCEL_INELIGIBLE;
52793e16e83aSDon Brace 		}
52806b80b18fSScott Teel 
52816b80b18fSScott Teel 		offload_to_mirror = dev->offload_to_mirror;
52826b80b18fSScott Teel 		raid_map_helper(map, offload_to_mirror,
52836b80b18fSScott Teel 				&map_index, &current_group);
52846b80b18fSScott Teel 		/* set mirror group to use next time */
52856b80b18fSScott Teel 		offload_to_mirror =
52862b08b3e9SDon Brace 			(offload_to_mirror >=
52872b08b3e9SDon Brace 			le16_to_cpu(map->layout_map_count) - 1)
52886b80b18fSScott Teel 			? 0 : offload_to_mirror + 1;
52896b80b18fSScott Teel 		dev->offload_to_mirror = offload_to_mirror;
52906b80b18fSScott Teel 		/* Avoid direct use of dev->offload_to_mirror within this
52916b80b18fSScott Teel 		 * function since multiple threads might simultaneously
52926b80b18fSScott Teel 		 * increment it beyond the range of dev->layout_map_count -1.
52936b80b18fSScott Teel 		 */
52946b80b18fSScott Teel 		break;
52956b80b18fSScott Teel 	case HPSA_RAID_5:
52966b80b18fSScott Teel 	case HPSA_RAID_6:
52972b08b3e9SDon Brace 		if (le16_to_cpu(map->layout_map_count) <= 1)
52986b80b18fSScott Teel 			break;
52996b80b18fSScott Teel 
53006b80b18fSScott Teel 		/* Verify first and last block are in same RAID group */
53016b80b18fSScott Teel 		r5or6_blocks_per_row =
53022b08b3e9SDon Brace 			le16_to_cpu(map->strip_size) *
53032b08b3e9SDon Brace 			le16_to_cpu(map->data_disks_per_row);
53043e16e83aSDon Brace 		if (r5or6_blocks_per_row == 0) {
53053e16e83aSDon Brace 			hpsa_turn_off_ioaccel_for_device(dev);
53063e16e83aSDon Brace 			return IO_ACCEL_INELIGIBLE;
53073e16e83aSDon Brace 		}
53082b08b3e9SDon Brace 		stripesize = r5or6_blocks_per_row *
53092b08b3e9SDon Brace 			le16_to_cpu(map->layout_map_count);
53106b80b18fSScott Teel #if BITS_PER_LONG == 32
53116b80b18fSScott Teel 		tmpdiv = first_block;
53126b80b18fSScott Teel 		first_group = do_div(tmpdiv, stripesize);
53136b80b18fSScott Teel 		tmpdiv = first_group;
53146b80b18fSScott Teel 		(void) do_div(tmpdiv, r5or6_blocks_per_row);
53156b80b18fSScott Teel 		first_group = tmpdiv;
53166b80b18fSScott Teel 		tmpdiv = last_block;
53176b80b18fSScott Teel 		last_group = do_div(tmpdiv, stripesize);
53186b80b18fSScott Teel 		tmpdiv = last_group;
53196b80b18fSScott Teel 		(void) do_div(tmpdiv, r5or6_blocks_per_row);
53206b80b18fSScott Teel 		last_group = tmpdiv;
53216b80b18fSScott Teel #else
53226b80b18fSScott Teel 		first_group = (first_block % stripesize) / r5or6_blocks_per_row;
53236b80b18fSScott Teel 		last_group = (last_block % stripesize) / r5or6_blocks_per_row;
53246b80b18fSScott Teel #endif
5325000ff7c2SStephen M. Cameron 		if (first_group != last_group)
53266b80b18fSScott Teel 			return IO_ACCEL_INELIGIBLE;
53276b80b18fSScott Teel 
53286b80b18fSScott Teel 		/* Verify request is in a single row of RAID 5/6 */
53296b80b18fSScott Teel #if BITS_PER_LONG == 32
53306b80b18fSScott Teel 		tmpdiv = first_block;
53316b80b18fSScott Teel 		(void) do_div(tmpdiv, stripesize);
53326b80b18fSScott Teel 		first_row = r5or6_first_row = r0_first_row = tmpdiv;
53336b80b18fSScott Teel 		tmpdiv = last_block;
53346b80b18fSScott Teel 		(void) do_div(tmpdiv, stripesize);
53356b80b18fSScott Teel 		r5or6_last_row = r0_last_row = tmpdiv;
53366b80b18fSScott Teel #else
53376b80b18fSScott Teel 		first_row = r5or6_first_row = r0_first_row =
53386b80b18fSScott Teel 						first_block / stripesize;
53396b80b18fSScott Teel 		r5or6_last_row = r0_last_row = last_block / stripesize;
53406b80b18fSScott Teel #endif
53416b80b18fSScott Teel 		if (r5or6_first_row != r5or6_last_row)
53426b80b18fSScott Teel 			return IO_ACCEL_INELIGIBLE;
53436b80b18fSScott Teel 
53446b80b18fSScott Teel 
53456b80b18fSScott Teel 		/* Verify request is in a single column */
53466b80b18fSScott Teel #if BITS_PER_LONG == 32
53476b80b18fSScott Teel 		tmpdiv = first_block;
53486b80b18fSScott Teel 		first_row_offset = do_div(tmpdiv, stripesize);
53496b80b18fSScott Teel 		tmpdiv = first_row_offset;
53506b80b18fSScott Teel 		first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row);
53516b80b18fSScott Teel 		r5or6_first_row_offset = first_row_offset;
53526b80b18fSScott Teel 		tmpdiv = last_block;
53536b80b18fSScott Teel 		r5or6_last_row_offset = do_div(tmpdiv, stripesize);
53546b80b18fSScott Teel 		tmpdiv = r5or6_last_row_offset;
53556b80b18fSScott Teel 		r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row);
53566b80b18fSScott Teel 		tmpdiv = r5or6_first_row_offset;
53576b80b18fSScott Teel 		(void) do_div(tmpdiv, map->strip_size);
53586b80b18fSScott Teel 		first_column = r5or6_first_column = tmpdiv;
53596b80b18fSScott Teel 		tmpdiv = r5or6_last_row_offset;
53606b80b18fSScott Teel 		(void) do_div(tmpdiv, map->strip_size);
53616b80b18fSScott Teel 		r5or6_last_column = tmpdiv;
53626b80b18fSScott Teel #else
53636b80b18fSScott Teel 		first_row_offset = r5or6_first_row_offset =
53646b80b18fSScott Teel 			(u32)((first_block % stripesize) %
53656b80b18fSScott Teel 						r5or6_blocks_per_row);
53666b80b18fSScott Teel 
53676b80b18fSScott Teel 		r5or6_last_row_offset =
53686b80b18fSScott Teel 			(u32)((last_block % stripesize) %
53696b80b18fSScott Teel 						r5or6_blocks_per_row);
53706b80b18fSScott Teel 
53716b80b18fSScott Teel 		first_column = r5or6_first_column =
53722b08b3e9SDon Brace 			r5or6_first_row_offset / le16_to_cpu(map->strip_size);
53736b80b18fSScott Teel 		r5or6_last_column =
53742b08b3e9SDon Brace 			r5or6_last_row_offset / le16_to_cpu(map->strip_size);
53756b80b18fSScott Teel #endif
53766b80b18fSScott Teel 		if (r5or6_first_column != r5or6_last_column)
53776b80b18fSScott Teel 			return IO_ACCEL_INELIGIBLE;
53786b80b18fSScott Teel 
53796b80b18fSScott Teel 		/* Request is eligible */
53806b80b18fSScott Teel 		map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
53812b08b3e9SDon Brace 			le16_to_cpu(map->row_cnt);
53826b80b18fSScott Teel 
53836b80b18fSScott Teel 		map_index = (first_group *
53842b08b3e9SDon Brace 			(le16_to_cpu(map->row_cnt) * total_disks_per_row)) +
53856b80b18fSScott Teel 			(map_row * total_disks_per_row) + first_column;
53866b80b18fSScott Teel 		break;
53876b80b18fSScott Teel 	default:
53886b80b18fSScott Teel 		return IO_ACCEL_INELIGIBLE;
5389283b4a9bSStephen M. Cameron 	}
53906b80b18fSScott Teel 
539107543e0cSStephen Cameron 	if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES))
539207543e0cSStephen Cameron 		return IO_ACCEL_INELIGIBLE;
539307543e0cSStephen Cameron 
539403383736SDon Brace 	c->phys_disk = dev->phys_disk[map_index];
5395c3390df4SDon Brace 	if (!c->phys_disk)
5396c3390df4SDon Brace 		return IO_ACCEL_INELIGIBLE;
539703383736SDon Brace 
5398283b4a9bSStephen M. Cameron 	disk_handle = dd[map_index].ioaccel_handle;
53992b08b3e9SDon Brace 	disk_block = le64_to_cpu(map->disk_starting_blk) +
54002b08b3e9SDon Brace 			first_row * le16_to_cpu(map->strip_size) +
54012b08b3e9SDon Brace 			(first_row_offset - first_column *
54022b08b3e9SDon Brace 			le16_to_cpu(map->strip_size));
5403283b4a9bSStephen M. Cameron 	disk_block_cnt = block_cnt;
5404283b4a9bSStephen M. Cameron 
5405283b4a9bSStephen M. Cameron 	/* handle differing logical/physical block sizes */
5406283b4a9bSStephen M. Cameron 	if (map->phys_blk_shift) {
5407283b4a9bSStephen M. Cameron 		disk_block <<= map->phys_blk_shift;
5408283b4a9bSStephen M. Cameron 		disk_block_cnt <<= map->phys_blk_shift;
5409283b4a9bSStephen M. Cameron 	}
5410283b4a9bSStephen M. Cameron 	BUG_ON(disk_block_cnt > 0xffff);
5411283b4a9bSStephen M. Cameron 
5412283b4a9bSStephen M. Cameron 	/* build the new CDB for the physical disk I/O */
5413283b4a9bSStephen M. Cameron 	if (disk_block > 0xffffffff) {
5414283b4a9bSStephen M. Cameron 		cdb[0] = is_write ? WRITE_16 : READ_16;
5415283b4a9bSStephen M. Cameron 		cdb[1] = 0;
5416283b4a9bSStephen M. Cameron 		cdb[2] = (u8) (disk_block >> 56);
5417283b4a9bSStephen M. Cameron 		cdb[3] = (u8) (disk_block >> 48);
5418283b4a9bSStephen M. Cameron 		cdb[4] = (u8) (disk_block >> 40);
5419283b4a9bSStephen M. Cameron 		cdb[5] = (u8) (disk_block >> 32);
5420283b4a9bSStephen M. Cameron 		cdb[6] = (u8) (disk_block >> 24);
5421283b4a9bSStephen M. Cameron 		cdb[7] = (u8) (disk_block >> 16);
5422283b4a9bSStephen M. Cameron 		cdb[8] = (u8) (disk_block >> 8);
5423283b4a9bSStephen M. Cameron 		cdb[9] = (u8) (disk_block);
5424283b4a9bSStephen M. Cameron 		cdb[10] = (u8) (disk_block_cnt >> 24);
5425283b4a9bSStephen M. Cameron 		cdb[11] = (u8) (disk_block_cnt >> 16);
5426283b4a9bSStephen M. Cameron 		cdb[12] = (u8) (disk_block_cnt >> 8);
5427283b4a9bSStephen M. Cameron 		cdb[13] = (u8) (disk_block_cnt);
5428283b4a9bSStephen M. Cameron 		cdb[14] = 0;
5429283b4a9bSStephen M. Cameron 		cdb[15] = 0;
5430283b4a9bSStephen M. Cameron 		cdb_len = 16;
5431283b4a9bSStephen M. Cameron 	} else {
5432283b4a9bSStephen M. Cameron 		cdb[0] = is_write ? WRITE_10 : READ_10;
5433283b4a9bSStephen M. Cameron 		cdb[1] = 0;
5434283b4a9bSStephen M. Cameron 		cdb[2] = (u8) (disk_block >> 24);
5435283b4a9bSStephen M. Cameron 		cdb[3] = (u8) (disk_block >> 16);
5436283b4a9bSStephen M. Cameron 		cdb[4] = (u8) (disk_block >> 8);
5437283b4a9bSStephen M. Cameron 		cdb[5] = (u8) (disk_block);
5438283b4a9bSStephen M. Cameron 		cdb[6] = 0;
5439283b4a9bSStephen M. Cameron 		cdb[7] = (u8) (disk_block_cnt >> 8);
5440283b4a9bSStephen M. Cameron 		cdb[8] = (u8) (disk_block_cnt);
5441283b4a9bSStephen M. Cameron 		cdb[9] = 0;
5442283b4a9bSStephen M. Cameron 		cdb_len = 10;
5443283b4a9bSStephen M. Cameron 	}
5444283b4a9bSStephen M. Cameron 	return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len,
544503383736SDon Brace 						dev->scsi3addr,
544603383736SDon Brace 						dev->phys_disk[map_index]);
5447283b4a9bSStephen M. Cameron }
5448283b4a9bSStephen M. Cameron 
544925163bd5SWebb Scales /*
545025163bd5SWebb Scales  * Submit commands down the "normal" RAID stack path
545125163bd5SWebb Scales  * All callers to hpsa_ciss_submit must check lockup_detected
545225163bd5SWebb Scales  * beforehand, before (opt.) and after calling cmd_alloc
545325163bd5SWebb Scales  */
5454574f05d3SStephen Cameron static int hpsa_ciss_submit(struct ctlr_info *h,
5455574f05d3SStephen Cameron 	struct CommandList *c, struct scsi_cmnd *cmd,
5456c5dfd106SDon Brace 	struct hpsa_scsi_dev_t *dev)
5457edd16368SStephen M. Cameron {
5458edd16368SStephen M. Cameron 	cmd->host_scribble = (unsigned char *) c;
5459edd16368SStephen M. Cameron 	c->cmd_type = CMD_SCSI;
5460edd16368SStephen M. Cameron 	c->scsi_cmd = cmd;
5461edd16368SStephen M. Cameron 	c->Header.ReplyQueue = 0;  /* unused in simple mode */
5462c5dfd106SDon Brace 	memcpy(&c->Header.LUN.LunAddrBytes[0], &dev->scsi3addr[0], 8);
5463f2405db8SDon Brace 	c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT));
5464edd16368SStephen M. Cameron 
5465edd16368SStephen M. Cameron 	/* Fill in the request block... */
5466edd16368SStephen M. Cameron 
5467edd16368SStephen M. Cameron 	c->Request.Timeout = 0;
5468edd16368SStephen M. Cameron 	BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
5469edd16368SStephen M. Cameron 	c->Request.CDBLen = cmd->cmd_len;
5470edd16368SStephen M. Cameron 	memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
5471edd16368SStephen M. Cameron 	switch (cmd->sc_data_direction) {
5472edd16368SStephen M. Cameron 	case DMA_TO_DEVICE:
5473a505b86fSStephen M. Cameron 		c->Request.type_attr_dir =
5474a505b86fSStephen M. Cameron 			TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE);
5475edd16368SStephen M. Cameron 		break;
5476edd16368SStephen M. Cameron 	case DMA_FROM_DEVICE:
5477a505b86fSStephen M. Cameron 		c->Request.type_attr_dir =
5478a505b86fSStephen M. Cameron 			TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ);
5479edd16368SStephen M. Cameron 		break;
5480edd16368SStephen M. Cameron 	case DMA_NONE:
5481a505b86fSStephen M. Cameron 		c->Request.type_attr_dir =
5482a505b86fSStephen M. Cameron 			TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE);
5483edd16368SStephen M. Cameron 		break;
5484edd16368SStephen M. Cameron 	case DMA_BIDIRECTIONAL:
5485edd16368SStephen M. Cameron 		/* This can happen if a buggy application does a scsi passthru
5486edd16368SStephen M. Cameron 		 * and sets both inlen and outlen to non-zero. ( see
5487edd16368SStephen M. Cameron 		 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
5488edd16368SStephen M. Cameron 		 */
5489edd16368SStephen M. Cameron 
5490a505b86fSStephen M. Cameron 		c->Request.type_attr_dir =
5491a505b86fSStephen M. Cameron 			TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD);
5492edd16368SStephen M. Cameron 		/* This is technically wrong, and hpsa controllers should
5493edd16368SStephen M. Cameron 		 * reject it with CMD_INVALID, which is the most correct
5494edd16368SStephen M. Cameron 		 * response, but non-fibre backends appear to let it
5495edd16368SStephen M. Cameron 		 * slide by, and give the same results as if this field
5496edd16368SStephen M. Cameron 		 * were set correctly.  Either way is acceptable for
5497edd16368SStephen M. Cameron 		 * our purposes here.
5498edd16368SStephen M. Cameron 		 */
5499edd16368SStephen M. Cameron 
5500edd16368SStephen M. Cameron 		break;
5501edd16368SStephen M. Cameron 
5502edd16368SStephen M. Cameron 	default:
5503edd16368SStephen M. Cameron 		dev_err(&h->pdev->dev, "unknown data direction: %d\n",
5504edd16368SStephen M. Cameron 			cmd->sc_data_direction);
5505edd16368SStephen M. Cameron 		BUG();
5506edd16368SStephen M. Cameron 		break;
5507edd16368SStephen M. Cameron 	}
5508edd16368SStephen M. Cameron 
550933a2ffceSStephen M. Cameron 	if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
551073153fe5SWebb Scales 		hpsa_cmd_resolve_and_free(h, c);
5511edd16368SStephen M. Cameron 		return SCSI_MLQUEUE_HOST_BUSY;
5512edd16368SStephen M. Cameron 	}
5513c5dfd106SDon Brace 
5514c5dfd106SDon Brace 	if (dev->in_reset) {
5515c5dfd106SDon Brace 		hpsa_cmd_resolve_and_free(h, c);
5516c5dfd106SDon Brace 		return SCSI_MLQUEUE_HOST_BUSY;
5517c5dfd106SDon Brace 	}
5518c5dfd106SDon Brace 
551913499345SDon Brace 	c->device = dev;
552013499345SDon Brace 
5521edd16368SStephen M. Cameron 	enqueue_cmd_and_start_io(h, c);
5522edd16368SStephen M. Cameron 	/* the cmd'll come back via intr handler in complete_scsi_command()  */
5523edd16368SStephen M. Cameron 	return 0;
5524edd16368SStephen M. Cameron }
5525edd16368SStephen M. Cameron 
5526360c73bdSStephen Cameron static void hpsa_cmd_init(struct ctlr_info *h, int index,
5527360c73bdSStephen Cameron 				struct CommandList *c)
5528360c73bdSStephen Cameron {
5529360c73bdSStephen Cameron 	dma_addr_t cmd_dma_handle, err_dma_handle;
5530360c73bdSStephen Cameron 
5531360c73bdSStephen Cameron 	/* Zero out all of commandlist except the last field, refcount */
5532360c73bdSStephen Cameron 	memset(c, 0, offsetof(struct CommandList, refcount));
5533360c73bdSStephen Cameron 	c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT));
5534360c73bdSStephen Cameron 	cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
5535360c73bdSStephen Cameron 	c->err_info = h->errinfo_pool + index;
5536360c73bdSStephen Cameron 	memset(c->err_info, 0, sizeof(*c->err_info));
5537360c73bdSStephen Cameron 	err_dma_handle = h->errinfo_pool_dhandle
5538360c73bdSStephen Cameron 	    + index * sizeof(*c->err_info);
5539360c73bdSStephen Cameron 	c->cmdindex = index;
5540360c73bdSStephen Cameron 	c->busaddr = (u32) cmd_dma_handle;
5541360c73bdSStephen Cameron 	c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle);
5542360c73bdSStephen Cameron 	c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info));
5543360c73bdSStephen Cameron 	c->h = h;
5544a58e7e53SWebb Scales 	c->scsi_cmd = SCSI_CMD_IDLE;
5545360c73bdSStephen Cameron }
5546360c73bdSStephen Cameron 
5547360c73bdSStephen Cameron static void hpsa_preinitialize_commands(struct ctlr_info *h)
5548360c73bdSStephen Cameron {
5549360c73bdSStephen Cameron 	int i;
5550360c73bdSStephen Cameron 
5551360c73bdSStephen Cameron 	for (i = 0; i < h->nr_cmds; i++) {
5552360c73bdSStephen Cameron 		struct CommandList *c = h->cmd_pool + i;
5553360c73bdSStephen Cameron 
5554360c73bdSStephen Cameron 		hpsa_cmd_init(h, i, c);
5555360c73bdSStephen Cameron 		atomic_set(&c->refcount, 0);
5556360c73bdSStephen Cameron 	}
5557360c73bdSStephen Cameron }
5558360c73bdSStephen Cameron 
5559360c73bdSStephen Cameron static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index,
5560360c73bdSStephen Cameron 				struct CommandList *c)
5561360c73bdSStephen Cameron {
5562360c73bdSStephen Cameron 	dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
5563360c73bdSStephen Cameron 
556473153fe5SWebb Scales 	BUG_ON(c->cmdindex != index);
556573153fe5SWebb Scales 
5566360c73bdSStephen Cameron 	memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
5567360c73bdSStephen Cameron 	memset(c->err_info, 0, sizeof(*c->err_info));
5568360c73bdSStephen Cameron 	c->busaddr = (u32) cmd_dma_handle;
5569360c73bdSStephen Cameron }
5570360c73bdSStephen Cameron 
5571592a0ad5SWebb Scales static int hpsa_ioaccel_submit(struct ctlr_info *h,
5572f749d8b7SDon Brace 		struct CommandList *c, struct scsi_cmnd *cmd,
5573f749d8b7SDon Brace 		bool retry)
5574592a0ad5SWebb Scales {
5575592a0ad5SWebb Scales 	struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
5576592a0ad5SWebb Scales 	int rc = IO_ACCEL_INELIGIBLE;
5577592a0ad5SWebb Scales 
557845e596cdSDon Brace 	if (!dev)
557945e596cdSDon Brace 		return SCSI_MLQUEUE_HOST_BUSY;
558045e596cdSDon Brace 
5581c5dfd106SDon Brace 	if (dev->in_reset)
5582c5dfd106SDon Brace 		return SCSI_MLQUEUE_HOST_BUSY;
5583c5dfd106SDon Brace 
5584a68fdb3aSDon Brace 	if (hpsa_simple_mode)
5585a68fdb3aSDon Brace 		return IO_ACCEL_INELIGIBLE;
5586a68fdb3aSDon Brace 
5587592a0ad5SWebb Scales 	cmd->host_scribble = (unsigned char *) c;
5588592a0ad5SWebb Scales 
5589592a0ad5SWebb Scales 	if (dev->offload_enabled) {
5590f749d8b7SDon Brace 		hpsa_cmd_init(h, c->cmdindex, c); /* Zeroes out all fields */
5591592a0ad5SWebb Scales 		c->cmd_type = CMD_SCSI;
5592592a0ad5SWebb Scales 		c->scsi_cmd = cmd;
559313499345SDon Brace 		c->device = dev;
5594f749d8b7SDon Brace 		if (retry) /* Resubmit but do not increment device->commands_outstanding. */
5595f749d8b7SDon Brace 			c->retry_pending = true;
5596592a0ad5SWebb Scales 		rc = hpsa_scsi_ioaccel_raid_map(h, c);
5597592a0ad5SWebb Scales 		if (rc < 0)     /* scsi_dma_map failed. */
5598592a0ad5SWebb Scales 			rc = SCSI_MLQUEUE_HOST_BUSY;
5599a3144e0bSJoe Handzik 	} else if (dev->hba_ioaccel_enabled) {
5600f749d8b7SDon Brace 		hpsa_cmd_init(h, c->cmdindex, c); /* Zeroes out all fields */
5601592a0ad5SWebb Scales 		c->cmd_type = CMD_SCSI;
5602592a0ad5SWebb Scales 		c->scsi_cmd = cmd;
560313499345SDon Brace 		c->device = dev;
5604f749d8b7SDon Brace 		if (retry) /* Resubmit but do not increment device->commands_outstanding. */
5605f749d8b7SDon Brace 			c->retry_pending = true;
5606592a0ad5SWebb Scales 		rc = hpsa_scsi_ioaccel_direct_map(h, c);
5607592a0ad5SWebb Scales 		if (rc < 0)     /* scsi_dma_map failed. */
5608592a0ad5SWebb Scales 			rc = SCSI_MLQUEUE_HOST_BUSY;
5609592a0ad5SWebb Scales 	}
5610592a0ad5SWebb Scales 	return rc;
5611592a0ad5SWebb Scales }
5612592a0ad5SWebb Scales 
5613080ef1ccSDon Brace static void hpsa_command_resubmit_worker(struct work_struct *work)
5614080ef1ccSDon Brace {
5615080ef1ccSDon Brace 	struct scsi_cmnd *cmd;
5616080ef1ccSDon Brace 	struct hpsa_scsi_dev_t *dev;
56178a0ff92cSWebb Scales 	struct CommandList *c = container_of(work, struct CommandList, work);
5618080ef1ccSDon Brace 
5619080ef1ccSDon Brace 	cmd = c->scsi_cmd;
5620080ef1ccSDon Brace 	dev = cmd->device->hostdata;
5621080ef1ccSDon Brace 	if (!dev) {
5622080ef1ccSDon Brace 		cmd->result = DID_NO_CONNECT << 16;
56238a0ff92cSWebb Scales 		return hpsa_cmd_free_and_done(c->h, c, cmd);
5624080ef1ccSDon Brace 	}
5625c5dfd106SDon Brace 
5626c5dfd106SDon Brace 	if (dev->in_reset) {
5627c5dfd106SDon Brace 		cmd->result = DID_RESET << 16;
5628d2315ce6SDon Brace 		return hpsa_cmd_free_and_done(c->h, c, cmd);
5629c5dfd106SDon Brace 	}
5630c5dfd106SDon Brace 
5631592a0ad5SWebb Scales 	if (c->cmd_type == CMD_IOACCEL2) {
5632592a0ad5SWebb Scales 		struct ctlr_info *h = c->h;
5633592a0ad5SWebb Scales 		struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
5634592a0ad5SWebb Scales 		int rc;
5635592a0ad5SWebb Scales 
5636592a0ad5SWebb Scales 		if (c2->error_data.serv_response ==
5637592a0ad5SWebb Scales 				IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL) {
5638f749d8b7SDon Brace 			/* Resubmit with the retry_pending flag set. */
5639f749d8b7SDon Brace 			rc = hpsa_ioaccel_submit(h, c, cmd, true);
5640592a0ad5SWebb Scales 			if (rc == 0)
5641592a0ad5SWebb Scales 				return;
5642592a0ad5SWebb Scales 			if (rc == SCSI_MLQUEUE_HOST_BUSY) {
5643592a0ad5SWebb Scales 				/*
5644592a0ad5SWebb Scales 				 * If we get here, it means dma mapping failed.
5645592a0ad5SWebb Scales 				 * Try again via scsi mid layer, which will
5646592a0ad5SWebb Scales 				 * then get SCSI_MLQUEUE_HOST_BUSY.
5647592a0ad5SWebb Scales 				 */
5648592a0ad5SWebb Scales 				cmd->result = DID_IMM_RETRY << 16;
56498a0ff92cSWebb Scales 				return hpsa_cmd_free_and_done(h, c, cmd);
5650592a0ad5SWebb Scales 			}
5651592a0ad5SWebb Scales 			/* else, fall thru and resubmit down CISS path */
5652592a0ad5SWebb Scales 		}
5653592a0ad5SWebb Scales 	}
5654360c73bdSStephen Cameron 	hpsa_cmd_partial_init(c->h, c->cmdindex, c);
5655f749d8b7SDon Brace 	/*
5656f749d8b7SDon Brace 	 * Here we have not come in though queue_command, so we
5657f749d8b7SDon Brace 	 * can set the retry_pending flag to true for a driver initiated
5658f749d8b7SDon Brace 	 * retry attempt (I.E. not a SML retry).
5659f749d8b7SDon Brace 	 * I.E. We are submitting a driver initiated retry.
5660f749d8b7SDon Brace 	 * Note: hpsa_ciss_submit does not zero out the command fields like
5661f749d8b7SDon Brace 	 *       ioaccel submit does.
5662f749d8b7SDon Brace 	 */
5663f749d8b7SDon Brace 	c->retry_pending = true;
5664c5dfd106SDon Brace 	if (hpsa_ciss_submit(c->h, c, cmd, dev)) {
5665080ef1ccSDon Brace 		/*
5666080ef1ccSDon Brace 		 * If we get here, it means dma mapping failed. Try
5667080ef1ccSDon Brace 		 * again via scsi mid layer, which will then get
5668080ef1ccSDon Brace 		 * SCSI_MLQUEUE_HOST_BUSY.
5669592a0ad5SWebb Scales 		 *
5670592a0ad5SWebb Scales 		 * hpsa_ciss_submit will have already freed c
5671592a0ad5SWebb Scales 		 * if it encountered a dma mapping failure.
5672080ef1ccSDon Brace 		 */
5673080ef1ccSDon Brace 		cmd->result = DID_IMM_RETRY << 16;
5674*82f01edcSBart Van Assche 		scsi_done(cmd);
5675080ef1ccSDon Brace 	}
5676080ef1ccSDon Brace }
5677080ef1ccSDon Brace 
5678574f05d3SStephen Cameron /* Running in struct Scsi_Host->host_lock less mode */
5679574f05d3SStephen Cameron static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd)
5680574f05d3SStephen Cameron {
5681574f05d3SStephen Cameron 	struct ctlr_info *h;
5682574f05d3SStephen Cameron 	struct hpsa_scsi_dev_t *dev;
5683574f05d3SStephen Cameron 	struct CommandList *c;
5684574f05d3SStephen Cameron 	int rc = 0;
5685574f05d3SStephen Cameron 
5686574f05d3SStephen Cameron 	/* Get the ptr to our adapter structure out of cmd->host. */
5687574f05d3SStephen Cameron 	h = sdev_to_hba(cmd->device);
568873153fe5SWebb Scales 
568984090d42SBart Van Assche 	BUG_ON(scsi_cmd_to_rq(cmd)->tag < 0);
569073153fe5SWebb Scales 
5691574f05d3SStephen Cameron 	dev = cmd->device->hostdata;
5692574f05d3SStephen Cameron 	if (!dev) {
56931ccde700SHannes Reinecke 		cmd->result = DID_NO_CONNECT << 16;
5694*82f01edcSBart Van Assche 		scsi_done(cmd);
5695ba74fdc4SDon Brace 		return 0;
5696ba74fdc4SDon Brace 	}
5697ba74fdc4SDon Brace 
5698ba74fdc4SDon Brace 	if (dev->removed) {
5699574f05d3SStephen Cameron 		cmd->result = DID_NO_CONNECT << 16;
5700*82f01edcSBart Van Assche 		scsi_done(cmd);
5701574f05d3SStephen Cameron 		return 0;
5702574f05d3SStephen Cameron 	}
570373153fe5SWebb Scales 
5704574f05d3SStephen Cameron 	if (unlikely(lockup_detected(h))) {
570525163bd5SWebb Scales 		cmd->result = DID_NO_CONNECT << 16;
5706*82f01edcSBart Van Assche 		scsi_done(cmd);
5707574f05d3SStephen Cameron 		return 0;
5708574f05d3SStephen Cameron 	}
5709c5dfd106SDon Brace 
5710c5dfd106SDon Brace 	if (dev->in_reset)
5711c5dfd106SDon Brace 		return SCSI_MLQUEUE_DEVICE_BUSY;
5712c5dfd106SDon Brace 
571373153fe5SWebb Scales 	c = cmd_tagged_alloc(h, cmd);
57144770e68dSDon Brace 	if (c == NULL)
57154770e68dSDon Brace 		return SCSI_MLQUEUE_DEVICE_BUSY;
5716574f05d3SStephen Cameron 
5717407863cbSStephen Cameron 	/*
5718eeebce18SDon Brace 	 * This is necessary because the SML doesn't zero out this field during
5719eeebce18SDon Brace 	 * error recovery.
5720eeebce18SDon Brace 	 */
5721eeebce18SDon Brace 	cmd->result = 0;
5722eeebce18SDon Brace 
5723eeebce18SDon Brace 	/*
5724407863cbSStephen Cameron 	 * Call alternate submit routine for I/O accelerated commands.
5725574f05d3SStephen Cameron 	 * Retries always go down the normal I/O path.
5726f749d8b7SDon Brace 	 * Note: If cmd->retries is non-zero, then this is a SML
5727f749d8b7SDon Brace 	 *       initiated retry and not a driver initiated retry.
5728f749d8b7SDon Brace 	 *       This command has been obtained from cmd_tagged_alloc
5729f749d8b7SDon Brace 	 *       and is therefore a brand-new command.
5730574f05d3SStephen Cameron 	 */
5731574f05d3SStephen Cameron 	if (likely(cmd->retries == 0 &&
573284090d42SBart Van Assche 			!blk_rq_is_passthrough(scsi_cmd_to_rq(cmd)) &&
5733574f05d3SStephen Cameron 			h->acciopath_status)) {
5734f749d8b7SDon Brace 		/* Submit with the retry_pending flag unset. */
5735f749d8b7SDon Brace 		rc = hpsa_ioaccel_submit(h, c, cmd, false);
5736574f05d3SStephen Cameron 		if (rc == 0)
5737592a0ad5SWebb Scales 			return 0;
5738592a0ad5SWebb Scales 		if (rc == SCSI_MLQUEUE_HOST_BUSY) {
573973153fe5SWebb Scales 			hpsa_cmd_resolve_and_free(h, c);
5740574f05d3SStephen Cameron 			return SCSI_MLQUEUE_HOST_BUSY;
5741574f05d3SStephen Cameron 		}
5742574f05d3SStephen Cameron 	}
5743c5dfd106SDon Brace 	return hpsa_ciss_submit(h, c, cmd, dev);
5744574f05d3SStephen Cameron }
5745574f05d3SStephen Cameron 
57468ebc9248SWebb Scales static void hpsa_scan_complete(struct ctlr_info *h)
57475f389360SStephen M. Cameron {
57485f389360SStephen M. Cameron 	unsigned long flags;
57495f389360SStephen M. Cameron 
57505f389360SStephen M. Cameron 	spin_lock_irqsave(&h->scan_lock, flags);
57515f389360SStephen M. Cameron 	h->scan_finished = 1;
575287b9e6aaSDon Brace 	wake_up(&h->scan_wait_queue);
57535f389360SStephen M. Cameron 	spin_unlock_irqrestore(&h->scan_lock, flags);
57545f389360SStephen M. Cameron }
57555f389360SStephen M. Cameron 
5756a08a8471SStephen M. Cameron static void hpsa_scan_start(struct Scsi_Host *sh)
5757a08a8471SStephen M. Cameron {
5758a08a8471SStephen M. Cameron 	struct ctlr_info *h = shost_to_hba(sh);
5759a08a8471SStephen M. Cameron 	unsigned long flags;
5760a08a8471SStephen M. Cameron 
57618ebc9248SWebb Scales 	/*
57628ebc9248SWebb Scales 	 * Don't let rescans be initiated on a controller known to be locked
57638ebc9248SWebb Scales 	 * up.  If the controller locks up *during* a rescan, that thread is
57648ebc9248SWebb Scales 	 * probably hosed, but at least we can prevent new rescan threads from
57658ebc9248SWebb Scales 	 * piling up on a locked up controller.
57668ebc9248SWebb Scales 	 */
57678ebc9248SWebb Scales 	if (unlikely(lockup_detected(h)))
57688ebc9248SWebb Scales 		return hpsa_scan_complete(h);
57695f389360SStephen M. Cameron 
577087b9e6aaSDon Brace 	/*
577187b9e6aaSDon Brace 	 * If a scan is already waiting to run, no need to add another
577287b9e6aaSDon Brace 	 */
577387b9e6aaSDon Brace 	spin_lock_irqsave(&h->scan_lock, flags);
577487b9e6aaSDon Brace 	if (h->scan_waiting) {
577587b9e6aaSDon Brace 		spin_unlock_irqrestore(&h->scan_lock, flags);
577687b9e6aaSDon Brace 		return;
577787b9e6aaSDon Brace 	}
577887b9e6aaSDon Brace 
577987b9e6aaSDon Brace 	spin_unlock_irqrestore(&h->scan_lock, flags);
578087b9e6aaSDon Brace 
5781a08a8471SStephen M. Cameron 	/* wait until any scan already in progress is finished. */
5782a08a8471SStephen M. Cameron 	while (1) {
5783a08a8471SStephen M. Cameron 		spin_lock_irqsave(&h->scan_lock, flags);
5784a08a8471SStephen M. Cameron 		if (h->scan_finished)
5785a08a8471SStephen M. Cameron 			break;
578687b9e6aaSDon Brace 		h->scan_waiting = 1;
5787a08a8471SStephen M. Cameron 		spin_unlock_irqrestore(&h->scan_lock, flags);
5788a08a8471SStephen M. Cameron 		wait_event(h->scan_wait_queue, h->scan_finished);
5789a08a8471SStephen M. Cameron 		/* Note: We don't need to worry about a race between this
5790a08a8471SStephen M. Cameron 		 * thread and driver unload because the midlayer will
5791a08a8471SStephen M. Cameron 		 * have incremented the reference count, so unload won't
5792a08a8471SStephen M. Cameron 		 * happen if we're in here.
5793a08a8471SStephen M. Cameron 		 */
5794a08a8471SStephen M. Cameron 	}
5795a08a8471SStephen M. Cameron 	h->scan_finished = 0; /* mark scan as in progress */
579687b9e6aaSDon Brace 	h->scan_waiting = 0;
5797a08a8471SStephen M. Cameron 	spin_unlock_irqrestore(&h->scan_lock, flags);
5798a08a8471SStephen M. Cameron 
57998ebc9248SWebb Scales 	if (unlikely(lockup_detected(h)))
58008ebc9248SWebb Scales 		return hpsa_scan_complete(h);
58015f389360SStephen M. Cameron 
5802bfd7546cSDon Brace 	/*
5803bfd7546cSDon Brace 	 * Do the scan after a reset completion
5804bfd7546cSDon Brace 	 */
5805c59d04f3SDon Brace 	spin_lock_irqsave(&h->reset_lock, flags);
5806bfd7546cSDon Brace 	if (h->reset_in_progress) {
5807bfd7546cSDon Brace 		h->drv_req_rescan = 1;
5808c59d04f3SDon Brace 		spin_unlock_irqrestore(&h->reset_lock, flags);
58093b476aa2SDon Brace 		hpsa_scan_complete(h);
5810bfd7546cSDon Brace 		return;
5811bfd7546cSDon Brace 	}
5812c59d04f3SDon Brace 	spin_unlock_irqrestore(&h->reset_lock, flags);
5813bfd7546cSDon Brace 
58148aa60681SDon Brace 	hpsa_update_scsi_devices(h);
5815a08a8471SStephen M. Cameron 
58168ebc9248SWebb Scales 	hpsa_scan_complete(h);
5817a08a8471SStephen M. Cameron }
5818a08a8471SStephen M. Cameron 
58197c0a0229SDon Brace static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth)
58207c0a0229SDon Brace {
582103383736SDon Brace 	struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata;
582203383736SDon Brace 
582303383736SDon Brace 	if (!logical_drive)
582403383736SDon Brace 		return -ENODEV;
58257c0a0229SDon Brace 
58267c0a0229SDon Brace 	if (qdepth < 1)
58277c0a0229SDon Brace 		qdepth = 1;
582803383736SDon Brace 	else if (qdepth > logical_drive->queue_depth)
582903383736SDon Brace 		qdepth = logical_drive->queue_depth;
583003383736SDon Brace 
583103383736SDon Brace 	return scsi_change_queue_depth(sdev, qdepth);
58327c0a0229SDon Brace }
58337c0a0229SDon Brace 
5834a08a8471SStephen M. Cameron static int hpsa_scan_finished(struct Scsi_Host *sh,
5835a08a8471SStephen M. Cameron 	unsigned long elapsed_time)
5836a08a8471SStephen M. Cameron {
5837a08a8471SStephen M. Cameron 	struct ctlr_info *h = shost_to_hba(sh);
5838a08a8471SStephen M. Cameron 	unsigned long flags;
5839a08a8471SStephen M. Cameron 	int finished;
5840a08a8471SStephen M. Cameron 
5841a08a8471SStephen M. Cameron 	spin_lock_irqsave(&h->scan_lock, flags);
5842a08a8471SStephen M. Cameron 	finished = h->scan_finished;
5843a08a8471SStephen M. Cameron 	spin_unlock_irqrestore(&h->scan_lock, flags);
5844a08a8471SStephen M. Cameron 	return finished;
5845a08a8471SStephen M. Cameron }
5846a08a8471SStephen M. Cameron 
58472946e82bSRobert Elliott static int hpsa_scsi_host_alloc(struct ctlr_info *h)
5848edd16368SStephen M. Cameron {
5849b705690dSStephen M. Cameron 	struct Scsi_Host *sh;
5850edd16368SStephen M. Cameron 
5851b705690dSStephen M. Cameron 	sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
58522946e82bSRobert Elliott 	if (sh == NULL) {
58532946e82bSRobert Elliott 		dev_err(&h->pdev->dev, "scsi_host_alloc failed\n");
58542946e82bSRobert Elliott 		return -ENOMEM;
58552946e82bSRobert Elliott 	}
5856b705690dSStephen M. Cameron 
5857b705690dSStephen M. Cameron 	sh->io_port = 0;
5858b705690dSStephen M. Cameron 	sh->n_io_port = 0;
5859b705690dSStephen M. Cameron 	sh->this_id = -1;
5860b705690dSStephen M. Cameron 	sh->max_channel = 3;
5861b705690dSStephen M. Cameron 	sh->max_cmd_len = MAX_COMMAND_SIZE;
5862b705690dSStephen M. Cameron 	sh->max_lun = HPSA_MAX_LUN;
5863b705690dSStephen M. Cameron 	sh->max_id = HPSA_MAX_LUN;
586441ce4c35SStephen Cameron 	sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS;
5865d54c5c24SStephen Cameron 	sh->cmd_per_lun = sh->can_queue;
5866b705690dSStephen M. Cameron 	sh->sg_tablesize = h->maxsgentries;
5867d04e62b9SKevin Barnett 	sh->transportt = hpsa_sas_transport_template;
5868b705690dSStephen M. Cameron 	sh->hostdata[0] = (unsigned long) h;
5869bc2bb154SChristoph Hellwig 	sh->irq = pci_irq_vector(h->pdev, 0);
5870b705690dSStephen M. Cameron 	sh->unique_id = sh->irq;
587164d513acSChristoph Hellwig 
58722946e82bSRobert Elliott 	h->scsi_host = sh;
58732946e82bSRobert Elliott 	return 0;
58742946e82bSRobert Elliott }
58752946e82bSRobert Elliott 
58762946e82bSRobert Elliott static int hpsa_scsi_add_host(struct ctlr_info *h)
58772946e82bSRobert Elliott {
58782946e82bSRobert Elliott 	int rv;
58792946e82bSRobert Elliott 
58802946e82bSRobert Elliott 	rv = scsi_add_host(h->scsi_host, &h->pdev->dev);
58812946e82bSRobert Elliott 	if (rv) {
58822946e82bSRobert Elliott 		dev_err(&h->pdev->dev, "scsi_add_host failed\n");
58832946e82bSRobert Elliott 		return rv;
58842946e82bSRobert Elliott 	}
58852946e82bSRobert Elliott 	scsi_scan_host(h->scsi_host);
58862946e82bSRobert Elliott 	return 0;
5887edd16368SStephen M. Cameron }
5888edd16368SStephen M. Cameron 
5889b69324ffSWebb Scales /*
589073153fe5SWebb Scales  * The block layer has already gone to the trouble of picking out a unique,
589173153fe5SWebb Scales  * small-integer tag for this request.  We use an offset from that value as
589273153fe5SWebb Scales  * an index to select our command block.  (The offset allows us to reserve the
589373153fe5SWebb Scales  * low-numbered entries for our own uses.)
589473153fe5SWebb Scales  */
589573153fe5SWebb Scales static int hpsa_get_cmd_index(struct scsi_cmnd *scmd)
589673153fe5SWebb Scales {
589784090d42SBart Van Assche 	int idx = scsi_cmd_to_rq(scmd)->tag;
589873153fe5SWebb Scales 
589973153fe5SWebb Scales 	if (idx < 0)
590073153fe5SWebb Scales 		return idx;
590173153fe5SWebb Scales 
590273153fe5SWebb Scales 	/* Offset to leave space for internal cmds. */
590373153fe5SWebb Scales 	return idx += HPSA_NRESERVED_CMDS;
590473153fe5SWebb Scales }
590573153fe5SWebb Scales 
590673153fe5SWebb Scales /*
5907b69324ffSWebb Scales  * Send a TEST_UNIT_READY command to the specified LUN using the specified
5908b69324ffSWebb Scales  * reply queue; returns zero if the unit is ready, and non-zero otherwise.
5909b69324ffSWebb Scales  */
5910b69324ffSWebb Scales static int hpsa_send_test_unit_ready(struct ctlr_info *h,
5911b69324ffSWebb Scales 				struct CommandList *c, unsigned char lunaddr[],
5912b69324ffSWebb Scales 				int reply_queue)
5913edd16368SStephen M. Cameron {
59148919358eSTomas Henzl 	int rc;
5915edd16368SStephen M. Cameron 
5916a2dac136SStephen M. Cameron 	/* Send the Test Unit Ready, fill_cmd can't fail, no mapping */
5917a2dac136SStephen M. Cameron 	(void) fill_cmd(c, TEST_UNIT_READY, h,
5918a2dac136SStephen M. Cameron 			NULL, 0, 0, lunaddr, TYPE_CMD);
59191edb6934SDon Brace 	rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
592025163bd5SWebb Scales 	if (rc)
5921b69324ffSWebb Scales 		return rc;
5922edd16368SStephen M. Cameron 	/* no unmap needed here because no data xfer. */
5923edd16368SStephen M. Cameron 
5924b69324ffSWebb Scales 	/* Check if the unit is already ready. */
5925edd16368SStephen M. Cameron 	if (c->err_info->CommandStatus == CMD_SUCCESS)
5926b69324ffSWebb Scales 		return 0;
5927edd16368SStephen M. Cameron 
5928b69324ffSWebb Scales 	/*
5929b69324ffSWebb Scales 	 * The first command sent after reset will receive "unit attention" to
5930b69324ffSWebb Scales 	 * indicate that the LUN has been reset...this is actually what we're
5931b69324ffSWebb Scales 	 * looking for (but, success is good too).
5932b69324ffSWebb Scales 	 */
5933edd16368SStephen M. Cameron 	if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
5934edd16368SStephen M. Cameron 		c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
5935edd16368SStephen M. Cameron 			(c->err_info->SenseInfo[2] == NO_SENSE ||
5936edd16368SStephen M. Cameron 			 c->err_info->SenseInfo[2] == UNIT_ATTENTION))
5937b69324ffSWebb Scales 		return 0;
5938b69324ffSWebb Scales 
5939b69324ffSWebb Scales 	return 1;
5940b69324ffSWebb Scales }
5941b69324ffSWebb Scales 
5942b69324ffSWebb Scales /*
5943b69324ffSWebb Scales  * Wait for a TEST_UNIT_READY command to complete, retrying as necessary;
5944b69324ffSWebb Scales  * returns zero when the unit is ready, and non-zero when giving up.
5945b69324ffSWebb Scales  */
5946b69324ffSWebb Scales static int hpsa_wait_for_test_unit_ready(struct ctlr_info *h,
5947b69324ffSWebb Scales 				struct CommandList *c,
5948b69324ffSWebb Scales 				unsigned char lunaddr[], int reply_queue)
5949b69324ffSWebb Scales {
5950b69324ffSWebb Scales 	int rc;
5951b69324ffSWebb Scales 	int count = 0;
5952b69324ffSWebb Scales 	int waittime = 1; /* seconds */
5953b69324ffSWebb Scales 
5954b69324ffSWebb Scales 	/* Send test unit ready until device ready, or give up. */
5955b69324ffSWebb Scales 	for (count = 0; count < HPSA_TUR_RETRY_LIMIT; count++) {
5956b69324ffSWebb Scales 
5957b69324ffSWebb Scales 		/*
5958b69324ffSWebb Scales 		 * Wait for a bit.  do this first, because if we send
5959b69324ffSWebb Scales 		 * the TUR right away, the reset will just abort it.
5960b69324ffSWebb Scales 		 */
5961b69324ffSWebb Scales 		msleep(1000 * waittime);
5962b69324ffSWebb Scales 
5963b69324ffSWebb Scales 		rc = hpsa_send_test_unit_ready(h, c, lunaddr, reply_queue);
5964b69324ffSWebb Scales 		if (!rc)
5965edd16368SStephen M. Cameron 			break;
5966b69324ffSWebb Scales 
5967b69324ffSWebb Scales 		/* Increase wait time with each try, up to a point. */
5968b69324ffSWebb Scales 		if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
5969b69324ffSWebb Scales 			waittime *= 2;
5970b69324ffSWebb Scales 
5971b69324ffSWebb Scales 		dev_warn(&h->pdev->dev,
5972b69324ffSWebb Scales 			 "waiting %d secs for device to become ready.\n",
5973b69324ffSWebb Scales 			 waittime);
5974b69324ffSWebb Scales 	}
5975b69324ffSWebb Scales 
5976b69324ffSWebb Scales 	return rc;
5977b69324ffSWebb Scales }
5978b69324ffSWebb Scales 
5979b69324ffSWebb Scales static int wait_for_device_to_become_ready(struct ctlr_info *h,
5980b69324ffSWebb Scales 					   unsigned char lunaddr[],
5981b69324ffSWebb Scales 					   int reply_queue)
5982b69324ffSWebb Scales {
5983b69324ffSWebb Scales 	int first_queue;
5984b69324ffSWebb Scales 	int last_queue;
5985b69324ffSWebb Scales 	int rq;
5986b69324ffSWebb Scales 	int rc = 0;
5987b69324ffSWebb Scales 	struct CommandList *c;
5988b69324ffSWebb Scales 
5989b69324ffSWebb Scales 	c = cmd_alloc(h);
5990b69324ffSWebb Scales 
5991b69324ffSWebb Scales 	/*
5992b69324ffSWebb Scales 	 * If no specific reply queue was requested, then send the TUR
5993b69324ffSWebb Scales 	 * repeatedly, requesting a reply on each reply queue; otherwise execute
5994b69324ffSWebb Scales 	 * the loop exactly once using only the specified queue.
5995b69324ffSWebb Scales 	 */
5996b69324ffSWebb Scales 	if (reply_queue == DEFAULT_REPLY_QUEUE) {
5997b69324ffSWebb Scales 		first_queue = 0;
5998b69324ffSWebb Scales 		last_queue = h->nreply_queues - 1;
5999b69324ffSWebb Scales 	} else {
6000b69324ffSWebb Scales 		first_queue = reply_queue;
6001b69324ffSWebb Scales 		last_queue = reply_queue;
6002b69324ffSWebb Scales 	}
6003b69324ffSWebb Scales 
6004b69324ffSWebb Scales 	for (rq = first_queue; rq <= last_queue; rq++) {
6005b69324ffSWebb Scales 		rc = hpsa_wait_for_test_unit_ready(h, c, lunaddr, rq);
6006b69324ffSWebb Scales 		if (rc)
6007b69324ffSWebb Scales 			break;
6008edd16368SStephen M. Cameron 	}
6009edd16368SStephen M. Cameron 
6010edd16368SStephen M. Cameron 	if (rc)
6011edd16368SStephen M. Cameron 		dev_warn(&h->pdev->dev, "giving up on device.\n");
6012edd16368SStephen M. Cameron 	else
6013edd16368SStephen M. Cameron 		dev_warn(&h->pdev->dev, "device is ready.\n");
6014edd16368SStephen M. Cameron 
601545fcb86eSStephen Cameron 	cmd_free(h, c);
6016edd16368SStephen M. Cameron 	return rc;
6017edd16368SStephen M. Cameron }
6018edd16368SStephen M. Cameron 
6019edd16368SStephen M. Cameron /* Need at least one of these error handlers to keep ../scsi/hosts.c from
6020edd16368SStephen M. Cameron  * complaining.  Doing a host- or bus-reset can't do anything good here.
6021edd16368SStephen M. Cameron  */
6022edd16368SStephen M. Cameron static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
6023edd16368SStephen M. Cameron {
6024c59d04f3SDon Brace 	int rc = SUCCESS;
6025c5dfd106SDon Brace 	int i;
6026edd16368SStephen M. Cameron 	struct ctlr_info *h;
602736631157SColin Ian King 	struct hpsa_scsi_dev_t *dev = NULL;
60280b9b7b6eSScott Teel 	u8 reset_type;
60292dc127bbSDan Carpenter 	char msg[48];
6030c59d04f3SDon Brace 	unsigned long flags;
6031edd16368SStephen M. Cameron 
6032edd16368SStephen M. Cameron 	/* find the controller to which the command to be aborted was sent */
6033edd16368SStephen M. Cameron 	h = sdev_to_hba(scsicmd->device);
6034edd16368SStephen M. Cameron 	if (h == NULL) /* paranoia */
6035edd16368SStephen M. Cameron 		return FAILED;
6036e345893bSDon Brace 
6037c59d04f3SDon Brace 	spin_lock_irqsave(&h->reset_lock, flags);
6038c59d04f3SDon Brace 	h->reset_in_progress = 1;
6039c59d04f3SDon Brace 	spin_unlock_irqrestore(&h->reset_lock, flags);
6040c59d04f3SDon Brace 
6041c59d04f3SDon Brace 	if (lockup_detected(h)) {
6042c59d04f3SDon Brace 		rc = FAILED;
6043c59d04f3SDon Brace 		goto return_reset_status;
6044c59d04f3SDon Brace 	}
6045e345893bSDon Brace 
6046edd16368SStephen M. Cameron 	dev = scsicmd->device->hostdata;
6047edd16368SStephen M. Cameron 	if (!dev) {
6048d604f533SWebb Scales 		dev_err(&h->pdev->dev, "%s: device lookup failed\n", __func__);
6049c59d04f3SDon Brace 		rc = FAILED;
6050c59d04f3SDon Brace 		goto return_reset_status;
6051edd16368SStephen M. Cameron 	}
605225163bd5SWebb Scales 
6053c59d04f3SDon Brace 	if (dev->devtype == TYPE_ENCLOSURE) {
6054c59d04f3SDon Brace 		rc = SUCCESS;
6055c59d04f3SDon Brace 		goto return_reset_status;
6056c59d04f3SDon Brace 	}
6057ef8a5203SDon Brace 
605825163bd5SWebb Scales 	/* if controller locked up, we can guarantee command won't complete */
605925163bd5SWebb Scales 	if (lockup_detected(h)) {
60602dc127bbSDan Carpenter 		snprintf(msg, sizeof(msg),
60612dc127bbSDan Carpenter 			 "cmd %d RESET FAILED, lockup detected",
606273153fe5SWebb Scales 			 hpsa_get_cmd_index(scsicmd));
606373153fe5SWebb Scales 		hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
6064c59d04f3SDon Brace 		rc = FAILED;
6065c59d04f3SDon Brace 		goto return_reset_status;
606625163bd5SWebb Scales 	}
606725163bd5SWebb Scales 
606825163bd5SWebb Scales 	/* this reset request might be the result of a lockup; check */
606925163bd5SWebb Scales 	if (detect_controller_lockup(h)) {
60702dc127bbSDan Carpenter 		snprintf(msg, sizeof(msg),
60712dc127bbSDan Carpenter 			 "cmd %d RESET FAILED, new lockup detected",
607273153fe5SWebb Scales 			 hpsa_get_cmd_index(scsicmd));
607373153fe5SWebb Scales 		hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
6074c59d04f3SDon Brace 		rc = FAILED;
6075c59d04f3SDon Brace 		goto return_reset_status;
607625163bd5SWebb Scales 	}
607725163bd5SWebb Scales 
6078d604f533SWebb Scales 	/* Do not attempt on controller */
6079c59d04f3SDon Brace 	if (is_hba_lunid(dev->scsi3addr)) {
6080c59d04f3SDon Brace 		rc = SUCCESS;
6081c59d04f3SDon Brace 		goto return_reset_status;
6082c59d04f3SDon Brace 	}
6083d604f533SWebb Scales 
60840b9b7b6eSScott Teel 	if (is_logical_dev_addr_mode(dev->scsi3addr))
60850b9b7b6eSScott Teel 		reset_type = HPSA_DEVICE_RESET_MSG;
60860b9b7b6eSScott Teel 	else
60870b9b7b6eSScott Teel 		reset_type = HPSA_PHYS_TARGET_RESET;
60880b9b7b6eSScott Teel 
60890b9b7b6eSScott Teel 	sprintf(msg, "resetting %s",
60900b9b7b6eSScott Teel 		reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ");
60910b9b7b6eSScott Teel 	hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
609225163bd5SWebb Scales 
6093c5dfd106SDon Brace 	/*
6094c5dfd106SDon Brace 	 * wait to see if any commands will complete before sending reset
6095c5dfd106SDon Brace 	 */
6096c5dfd106SDon Brace 	dev->in_reset = true; /* block any new cmds from OS for this device */
6097c5dfd106SDon Brace 	for (i = 0; i < 10; i++) {
6098c5dfd106SDon Brace 		if (atomic_read(&dev->commands_outstanding) > 0)
6099c5dfd106SDon Brace 			msleep(1000);
6100c5dfd106SDon Brace 		else
6101c5dfd106SDon Brace 			break;
6102c5dfd106SDon Brace 	}
6103c5dfd106SDon Brace 
6104edd16368SStephen M. Cameron 	/* send a reset to the SCSI LUN which the command was sent to */
6105c5dfd106SDon Brace 	rc = hpsa_do_reset(h, dev, reset_type, DEFAULT_REPLY_QUEUE);
6106c59d04f3SDon Brace 	if (rc == 0)
6107c59d04f3SDon Brace 		rc = SUCCESS;
6108c59d04f3SDon Brace 	else
6109c59d04f3SDon Brace 		rc = FAILED;
6110c59d04f3SDon Brace 
61110b9b7b6eSScott Teel 	sprintf(msg, "reset %s %s",
61120b9b7b6eSScott Teel 		reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ",
6113c59d04f3SDon Brace 		rc == SUCCESS ? "completed successfully" : "failed");
6114d604f533SWebb Scales 	hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
6115c59d04f3SDon Brace 
6116c59d04f3SDon Brace return_reset_status:
6117c59d04f3SDon Brace 	spin_lock_irqsave(&h->reset_lock, flags);
6118da03ded0SDon Brace 	h->reset_in_progress = 0;
6119c5dfd106SDon Brace 	if (dev)
6120c5dfd106SDon Brace 		dev->in_reset = false;
6121c59d04f3SDon Brace 	spin_unlock_irqrestore(&h->reset_lock, flags);
6122c59d04f3SDon Brace 	return rc;
6123edd16368SStephen M. Cameron }
6124edd16368SStephen M. Cameron 
6125edd16368SStephen M. Cameron /*
612673153fe5SWebb Scales  * For operations with an associated SCSI command, a command block is allocated
612773153fe5SWebb Scales  * at init, and managed by cmd_tagged_alloc() and cmd_tagged_free() using the
612873153fe5SWebb Scales  * block request tag as an index into a table of entries.  cmd_tagged_free() is
612973153fe5SWebb Scales  * the complement, although cmd_free() may be called instead.
6130f749d8b7SDon Brace  * This function is only called for new requests from queue_command.
613173153fe5SWebb Scales  */
613273153fe5SWebb Scales static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h,
613373153fe5SWebb Scales 					    struct scsi_cmnd *scmd)
613473153fe5SWebb Scales {
613573153fe5SWebb Scales 	int idx = hpsa_get_cmd_index(scmd);
613673153fe5SWebb Scales 	struct CommandList *c = h->cmd_pool + idx;
613773153fe5SWebb Scales 
613873153fe5SWebb Scales 	if (idx < HPSA_NRESERVED_CMDS || idx >= h->nr_cmds) {
613973153fe5SWebb Scales 		dev_err(&h->pdev->dev, "Bad block tag: %d not in [%d..%d]\n",
614073153fe5SWebb Scales 			idx, HPSA_NRESERVED_CMDS, h->nr_cmds - 1);
614173153fe5SWebb Scales 		/* The index value comes from the block layer, so if it's out of
614273153fe5SWebb Scales 		 * bounds, it's probably not our bug.
614373153fe5SWebb Scales 		 */
614473153fe5SWebb Scales 		BUG();
614573153fe5SWebb Scales 	}
614673153fe5SWebb Scales 
614773153fe5SWebb Scales 	if (unlikely(!hpsa_is_cmd_idle(c))) {
614873153fe5SWebb Scales 		/*
614973153fe5SWebb Scales 		 * We expect that the SCSI layer will hand us a unique tag
615073153fe5SWebb Scales 		 * value.  Thus, there should never be a collision here between
615173153fe5SWebb Scales 		 * two requests...because if the selected command isn't idle
615273153fe5SWebb Scales 		 * then someone is going to be very disappointed.
615373153fe5SWebb Scales 		 */
61544770e68dSDon Brace 		if (idx != h->last_collision_tag) { /* Print once per tag */
61554770e68dSDon Brace 			dev_warn(&h->pdev->dev,
61564770e68dSDon Brace 				"%s: tag collision (tag=%d)\n", __func__, idx);
61574770e68dSDon Brace 			if (scmd)
615873153fe5SWebb Scales 				scsi_print_command(scmd);
61594770e68dSDon Brace 			h->last_collision_tag = idx;
616073153fe5SWebb Scales 		}
61614770e68dSDon Brace 		return NULL;
61624770e68dSDon Brace 	}
61634770e68dSDon Brace 
61644770e68dSDon Brace 	atomic_inc(&c->refcount);
616573153fe5SWebb Scales 	hpsa_cmd_partial_init(h, idx, c);
6166f749d8b7SDon Brace 
6167f749d8b7SDon Brace 	/*
6168f749d8b7SDon Brace 	 * This is a new command obtained from queue_command so
6169f749d8b7SDon Brace 	 * there have not been any driver initiated retry attempts.
6170f749d8b7SDon Brace 	 */
6171f749d8b7SDon Brace 	c->retry_pending = false;
6172f749d8b7SDon Brace 
617373153fe5SWebb Scales 	return c;
617473153fe5SWebb Scales }
617573153fe5SWebb Scales 
617673153fe5SWebb Scales static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c)
617773153fe5SWebb Scales {
617873153fe5SWebb Scales 	/*
617973153fe5SWebb Scales 	 * Release our reference to the block.  We don't need to do anything
618008ec46f6SDon Brace 	 * else to free it, because it is accessed by index.
618173153fe5SWebb Scales 	 */
618273153fe5SWebb Scales 	(void)atomic_dec(&c->refcount);
618373153fe5SWebb Scales }
618473153fe5SWebb Scales 
618573153fe5SWebb Scales /*
6186edd16368SStephen M. Cameron  * For operations that cannot sleep, a command block is allocated at init,
6187edd16368SStephen M. Cameron  * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
6188edd16368SStephen M. Cameron  * which ones are free or in use.  Lock must be held when calling this.
6189edd16368SStephen M. Cameron  * cmd_free() is the complement.
6190bf43caf3SRobert Elliott  * This function never gives up and returns NULL.  If it hangs,
6191bf43caf3SRobert Elliott  * another thread must call cmd_free() to free some tags.
6192edd16368SStephen M. Cameron  */
6193281a7fd0SWebb Scales 
6194edd16368SStephen M. Cameron static struct CommandList *cmd_alloc(struct ctlr_info *h)
6195edd16368SStephen M. Cameron {
6196edd16368SStephen M. Cameron 	struct CommandList *c;
6197360c73bdSStephen Cameron 	int refcount, i;
619873153fe5SWebb Scales 	int offset = 0;
6199edd16368SStephen M. Cameron 
620033811026SRobert Elliott 	/*
620133811026SRobert Elliott 	 * There is some *extremely* small but non-zero chance that that
62024c413128SStephen M. Cameron 	 * multiple threads could get in here, and one thread could
62034c413128SStephen M. Cameron 	 * be scanning through the list of bits looking for a free
62044c413128SStephen M. Cameron 	 * one, but the free ones are always behind him, and other
62054c413128SStephen M. Cameron 	 * threads sneak in behind him and eat them before he can
62064c413128SStephen M. Cameron 	 * get to them, so that while there is always a free one, a
62074c413128SStephen M. Cameron 	 * very unlucky thread might be starved anyway, never able to
62084c413128SStephen M. Cameron 	 * beat the other threads.  In reality, this happens so
62094c413128SStephen M. Cameron 	 * infrequently as to be indistinguishable from never.
621073153fe5SWebb Scales 	 *
621173153fe5SWebb Scales 	 * Note that we start allocating commands before the SCSI host structure
621273153fe5SWebb Scales 	 * is initialized.  Since the search starts at bit zero, this
621373153fe5SWebb Scales 	 * all works, since we have at least one command structure available;
621473153fe5SWebb Scales 	 * however, it means that the structures with the low indexes have to be
621573153fe5SWebb Scales 	 * reserved for driver-initiated requests, while requests from the block
621673153fe5SWebb Scales 	 * layer will use the higher indexes.
62174c413128SStephen M. Cameron 	 */
62184c413128SStephen M. Cameron 
6219281a7fd0SWebb Scales 	for (;;) {
622073153fe5SWebb Scales 		i = find_next_zero_bit(h->cmd_pool_bits,
622173153fe5SWebb Scales 					HPSA_NRESERVED_CMDS,
622273153fe5SWebb Scales 					offset);
622373153fe5SWebb Scales 		if (unlikely(i >= HPSA_NRESERVED_CMDS)) {
6224281a7fd0SWebb Scales 			offset = 0;
6225281a7fd0SWebb Scales 			continue;
6226281a7fd0SWebb Scales 		}
6227edd16368SStephen M. Cameron 		c = h->cmd_pool + i;
6228281a7fd0SWebb Scales 		refcount = atomic_inc_return(&c->refcount);
6229281a7fd0SWebb Scales 		if (unlikely(refcount > 1)) {
6230281a7fd0SWebb Scales 			cmd_free(h, c); /* already in use */
623173153fe5SWebb Scales 			offset = (i + 1) % HPSA_NRESERVED_CMDS;
6232281a7fd0SWebb Scales 			continue;
6233281a7fd0SWebb Scales 		}
6234281a7fd0SWebb Scales 		set_bit(i & (BITS_PER_LONG - 1),
6235281a7fd0SWebb Scales 			h->cmd_pool_bits + (i / BITS_PER_LONG));
6236281a7fd0SWebb Scales 		break; /* it's ours now. */
6237281a7fd0SWebb Scales 	}
6238360c73bdSStephen Cameron 	hpsa_cmd_partial_init(h, i, c);
6239c5dfd106SDon Brace 	c->device = NULL;
6240f749d8b7SDon Brace 
6241f749d8b7SDon Brace 	/*
6242f749d8b7SDon Brace 	 * cmd_alloc is for "internal" commands and they are never
6243f749d8b7SDon Brace 	 * retried.
6244f749d8b7SDon Brace 	 */
6245f749d8b7SDon Brace 	c->retry_pending = false;
6246f749d8b7SDon Brace 
6247edd16368SStephen M. Cameron 	return c;
6248edd16368SStephen M. Cameron }
6249edd16368SStephen M. Cameron 
625073153fe5SWebb Scales /*
625173153fe5SWebb Scales  * This is the complementary operation to cmd_alloc().  Note, however, in some
625273153fe5SWebb Scales  * corner cases it may also be used to free blocks allocated by
625373153fe5SWebb Scales  * cmd_tagged_alloc() in which case the ref-count decrement does the trick and
625473153fe5SWebb Scales  * the clear-bit is harmless.
625573153fe5SWebb Scales  */
6256edd16368SStephen M. Cameron static void cmd_free(struct ctlr_info *h, struct CommandList *c)
6257edd16368SStephen M. Cameron {
6258281a7fd0SWebb Scales 	if (atomic_dec_and_test(&c->refcount)) {
6259edd16368SStephen M. Cameron 		int i;
6260edd16368SStephen M. Cameron 
6261edd16368SStephen M. Cameron 		i = c - h->cmd_pool;
6262edd16368SStephen M. Cameron 		clear_bit(i & (BITS_PER_LONG - 1),
6263edd16368SStephen M. Cameron 			  h->cmd_pool_bits + (i / BITS_PER_LONG));
6264edd16368SStephen M. Cameron 	}
6265281a7fd0SWebb Scales }
6266edd16368SStephen M. Cameron 
6267edd16368SStephen M. Cameron #ifdef CONFIG_COMPAT
6268edd16368SStephen M. Cameron 
62696f4e626fSNathan Chancellor static int hpsa_ioctl32_passthru(struct scsi_device *dev, unsigned int cmd,
627042a91641SDon Brace 	void __user *arg)
6271edd16368SStephen M. Cameron {
627210100ffdSAl Viro 	struct ctlr_info *h = sdev_to_hba(dev);
627310100ffdSAl Viro 	IOCTL32_Command_struct __user *arg32 = arg;
6274edd16368SStephen M. Cameron 	IOCTL_Command_struct arg64;
6275edd16368SStephen M. Cameron 	int err;
6276edd16368SStephen M. Cameron 	u32 cp;
6277edd16368SStephen M. Cameron 
627810100ffdSAl Viro 	if (!arg)
627910100ffdSAl Viro 		return -EINVAL;
628010100ffdSAl Viro 
6281938abd84SVasiliy Kulikov 	memset(&arg64, 0, sizeof(arg64));
628210100ffdSAl Viro 	if (copy_from_user(&arg64, arg32, offsetof(IOCTL_Command_struct, buf)))
628310100ffdSAl Viro 		return -EFAULT;
628410100ffdSAl Viro 	if (get_user(cp, &arg32->buf))
628510100ffdSAl Viro 		return -EFAULT;
6286edd16368SStephen M. Cameron 	arg64.buf = compat_ptr(cp);
6287edd16368SStephen M. Cameron 
628810100ffdSAl Viro 	if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
628910100ffdSAl Viro 		return -EAGAIN;
629010100ffdSAl Viro 	err = hpsa_passthru_ioctl(h, &arg64);
629110100ffdSAl Viro 	atomic_inc(&h->passthru_cmds_avail);
6292edd16368SStephen M. Cameron 	if (err)
6293edd16368SStephen M. Cameron 		return err;
629410100ffdSAl Viro 	if (copy_to_user(&arg32->error_info, &arg64.error_info,
629510100ffdSAl Viro 			 sizeof(arg32->error_info)))
6296edd16368SStephen M. Cameron 		return -EFAULT;
629710100ffdSAl Viro 	return 0;
6298edd16368SStephen M. Cameron }
6299edd16368SStephen M. Cameron 
6300edd16368SStephen M. Cameron static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
63016f4e626fSNathan Chancellor 	unsigned int cmd, void __user *arg)
6302edd16368SStephen M. Cameron {
630310100ffdSAl Viro 	struct ctlr_info *h = sdev_to_hba(dev);
630410100ffdSAl Viro 	BIG_IOCTL32_Command_struct __user *arg32 = arg;
6305edd16368SStephen M. Cameron 	BIG_IOCTL_Command_struct arg64;
6306edd16368SStephen M. Cameron 	int err;
6307edd16368SStephen M. Cameron 	u32 cp;
6308edd16368SStephen M. Cameron 
630910100ffdSAl Viro 	if (!arg)
631010100ffdSAl Viro 		return -EINVAL;
6311938abd84SVasiliy Kulikov 	memset(&arg64, 0, sizeof(arg64));
631210100ffdSAl Viro 	if (copy_from_user(&arg64, arg32,
631310100ffdSAl Viro 			   offsetof(BIG_IOCTL32_Command_struct, buf)))
631410100ffdSAl Viro 		return -EFAULT;
631510100ffdSAl Viro 	if (get_user(cp, &arg32->buf))
631610100ffdSAl Viro 		return -EFAULT;
6317edd16368SStephen M. Cameron 	arg64.buf = compat_ptr(cp);
6318edd16368SStephen M. Cameron 
631910100ffdSAl Viro 	if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
632010100ffdSAl Viro 		return -EAGAIN;
632110100ffdSAl Viro 	err = hpsa_big_passthru_ioctl(h, &arg64);
632210100ffdSAl Viro 	atomic_inc(&h->passthru_cmds_avail);
6323edd16368SStephen M. Cameron 	if (err)
6324edd16368SStephen M. Cameron 		return err;
632510100ffdSAl Viro 	if (copy_to_user(&arg32->error_info, &arg64.error_info,
632610100ffdSAl Viro 			 sizeof(arg32->error_info)))
6327edd16368SStephen M. Cameron 		return -EFAULT;
632810100ffdSAl Viro 	return 0;
6329edd16368SStephen M. Cameron }
633071fe75a7SStephen M. Cameron 
63316f4e626fSNathan Chancellor static int hpsa_compat_ioctl(struct scsi_device *dev, unsigned int cmd,
63326f4e626fSNathan Chancellor 			     void __user *arg)
633371fe75a7SStephen M. Cameron {
633471fe75a7SStephen M. Cameron 	switch (cmd) {
633571fe75a7SStephen M. Cameron 	case CCISS_GETPCIINFO:
633671fe75a7SStephen M. Cameron 	case CCISS_GETINTINFO:
633771fe75a7SStephen M. Cameron 	case CCISS_SETINTINFO:
633871fe75a7SStephen M. Cameron 	case CCISS_GETNODENAME:
633971fe75a7SStephen M. Cameron 	case CCISS_SETNODENAME:
634071fe75a7SStephen M. Cameron 	case CCISS_GETHEARTBEAT:
634171fe75a7SStephen M. Cameron 	case CCISS_GETBUSTYPES:
634271fe75a7SStephen M. Cameron 	case CCISS_GETFIRMVER:
634371fe75a7SStephen M. Cameron 	case CCISS_GETDRIVVER:
634471fe75a7SStephen M. Cameron 	case CCISS_REVALIDVOLS:
634571fe75a7SStephen M. Cameron 	case CCISS_DEREGDISK:
634671fe75a7SStephen M. Cameron 	case CCISS_REGNEWDISK:
634771fe75a7SStephen M. Cameron 	case CCISS_REGNEWD:
634871fe75a7SStephen M. Cameron 	case CCISS_RESCANDISK:
634971fe75a7SStephen M. Cameron 	case CCISS_GETLUNINFO:
635071fe75a7SStephen M. Cameron 		return hpsa_ioctl(dev, cmd, arg);
635171fe75a7SStephen M. Cameron 
635271fe75a7SStephen M. Cameron 	case CCISS_PASSTHRU32:
635371fe75a7SStephen M. Cameron 		return hpsa_ioctl32_passthru(dev, cmd, arg);
635471fe75a7SStephen M. Cameron 	case CCISS_BIG_PASSTHRU32:
635571fe75a7SStephen M. Cameron 		return hpsa_ioctl32_big_passthru(dev, cmd, arg);
635671fe75a7SStephen M. Cameron 
635771fe75a7SStephen M. Cameron 	default:
635871fe75a7SStephen M. Cameron 		return -ENOIOCTLCMD;
635971fe75a7SStephen M. Cameron 	}
636071fe75a7SStephen M. Cameron }
6361edd16368SStephen M. Cameron #endif
6362edd16368SStephen M. Cameron 
6363edd16368SStephen M. Cameron static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
6364edd16368SStephen M. Cameron {
6365edd16368SStephen M. Cameron 	struct hpsa_pci_info pciinfo;
6366edd16368SStephen M. Cameron 
6367edd16368SStephen M. Cameron 	if (!argp)
6368edd16368SStephen M. Cameron 		return -EINVAL;
6369edd16368SStephen M. Cameron 	pciinfo.domain = pci_domain_nr(h->pdev->bus);
6370edd16368SStephen M. Cameron 	pciinfo.bus = h->pdev->bus->number;
6371edd16368SStephen M. Cameron 	pciinfo.dev_fn = h->pdev->devfn;
6372edd16368SStephen M. Cameron 	pciinfo.board_id = h->board_id;
6373edd16368SStephen M. Cameron 	if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
6374edd16368SStephen M. Cameron 		return -EFAULT;
6375edd16368SStephen M. Cameron 	return 0;
6376edd16368SStephen M. Cameron }
6377edd16368SStephen M. Cameron 
6378edd16368SStephen M. Cameron static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
6379edd16368SStephen M. Cameron {
6380edd16368SStephen M. Cameron 	DriverVer_type DriverVer;
6381edd16368SStephen M. Cameron 	unsigned char vmaj, vmin, vsubmin;
6382edd16368SStephen M. Cameron 	int rc;
6383edd16368SStephen M. Cameron 
6384edd16368SStephen M. Cameron 	rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
6385edd16368SStephen M. Cameron 		&vmaj, &vmin, &vsubmin);
6386edd16368SStephen M. Cameron 	if (rc != 3) {
6387edd16368SStephen M. Cameron 		dev_info(&h->pdev->dev, "driver version string '%s' "
6388edd16368SStephen M. Cameron 			"unrecognized.", HPSA_DRIVER_VERSION);
6389edd16368SStephen M. Cameron 		vmaj = 0;
6390edd16368SStephen M. Cameron 		vmin = 0;
6391edd16368SStephen M. Cameron 		vsubmin = 0;
6392edd16368SStephen M. Cameron 	}
6393edd16368SStephen M. Cameron 	DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
6394edd16368SStephen M. Cameron 	if (!argp)
6395edd16368SStephen M. Cameron 		return -EINVAL;
6396edd16368SStephen M. Cameron 	if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
6397edd16368SStephen M. Cameron 		return -EFAULT;
6398edd16368SStephen M. Cameron 	return 0;
6399edd16368SStephen M. Cameron }
6400edd16368SStephen M. Cameron 
6401138125f7SAl Viro static int hpsa_passthru_ioctl(struct ctlr_info *h,
6402138125f7SAl Viro 			       IOCTL_Command_struct *iocommand)
6403edd16368SStephen M. Cameron {
6404edd16368SStephen M. Cameron 	struct CommandList *c;
6405edd16368SStephen M. Cameron 	char *buff = NULL;
640650a0decfSStephen M. Cameron 	u64 temp64;
6407c1f63c8fSStephen M. Cameron 	int rc = 0;
6408edd16368SStephen M. Cameron 
6409edd16368SStephen M. Cameron 	if (!capable(CAP_SYS_RAWIO))
6410edd16368SStephen M. Cameron 		return -EPERM;
6411138125f7SAl Viro 	if ((iocommand->buf_size < 1) &&
6412138125f7SAl Viro 	    (iocommand->Request.Type.Direction != XFER_NONE)) {
6413edd16368SStephen M. Cameron 		return -EINVAL;
6414edd16368SStephen M. Cameron 	}
6415138125f7SAl Viro 	if (iocommand->buf_size > 0) {
6416138125f7SAl Viro 		buff = kmalloc(iocommand->buf_size, GFP_KERNEL);
6417edd16368SStephen M. Cameron 		if (buff == NULL)
64182dd02d74SRobert Elliott 			return -ENOMEM;
6419138125f7SAl Viro 		if (iocommand->Request.Type.Direction & XFER_WRITE) {
6420edd16368SStephen M. Cameron 			/* Copy the data into the buffer we created */
6421138125f7SAl Viro 			if (copy_from_user(buff, iocommand->buf,
6422138125f7SAl Viro 				iocommand->buf_size)) {
6423c1f63c8fSStephen M. Cameron 				rc = -EFAULT;
6424c1f63c8fSStephen M. Cameron 				goto out_kfree;
6425edd16368SStephen M. Cameron 			}
6426b03a7771SStephen M. Cameron 		} else {
6427138125f7SAl Viro 			memset(buff, 0, iocommand->buf_size);
6428b03a7771SStephen M. Cameron 		}
6429b03a7771SStephen M. Cameron 	}
643045fcb86eSStephen Cameron 	c = cmd_alloc(h);
6431bf43caf3SRobert Elliott 
6432edd16368SStephen M. Cameron 	/* Fill in the command type */
6433edd16368SStephen M. Cameron 	c->cmd_type = CMD_IOCTL_PEND;
6434a58e7e53SWebb Scales 	c->scsi_cmd = SCSI_CMD_BUSY;
6435edd16368SStephen M. Cameron 	/* Fill in Command Header */
6436edd16368SStephen M. Cameron 	c->Header.ReplyQueue = 0; /* unused in simple mode */
6437138125f7SAl Viro 	if (iocommand->buf_size > 0) {	/* buffer to fill */
6438edd16368SStephen M. Cameron 		c->Header.SGList = 1;
643950a0decfSStephen M. Cameron 		c->Header.SGTotal = cpu_to_le16(1);
6440edd16368SStephen M. Cameron 	} else	{ /* no buffers to fill */
6441edd16368SStephen M. Cameron 		c->Header.SGList = 0;
644250a0decfSStephen M. Cameron 		c->Header.SGTotal = cpu_to_le16(0);
6443edd16368SStephen M. Cameron 	}
6444138125f7SAl Viro 	memcpy(&c->Header.LUN, &iocommand->LUN_info, sizeof(c->Header.LUN));
6445edd16368SStephen M. Cameron 
6446edd16368SStephen M. Cameron 	/* Fill in Request block */
6447138125f7SAl Viro 	memcpy(&c->Request, &iocommand->Request,
6448edd16368SStephen M. Cameron 		sizeof(c->Request));
6449edd16368SStephen M. Cameron 
6450edd16368SStephen M. Cameron 	/* Fill in the scatter gather information */
6451138125f7SAl Viro 	if (iocommand->buf_size > 0) {
64528bc8f47eSChristoph Hellwig 		temp64 = dma_map_single(&h->pdev->dev, buff,
6453138125f7SAl Viro 			iocommand->buf_size, DMA_BIDIRECTIONAL);
645450a0decfSStephen M. Cameron 		if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) {
645550a0decfSStephen M. Cameron 			c->SG[0].Addr = cpu_to_le64(0);
645650a0decfSStephen M. Cameron 			c->SG[0].Len = cpu_to_le32(0);
6457bcc48ffaSStephen M. Cameron 			rc = -ENOMEM;
6458bcc48ffaSStephen M. Cameron 			goto out;
6459bcc48ffaSStephen M. Cameron 		}
646050a0decfSStephen M. Cameron 		c->SG[0].Addr = cpu_to_le64(temp64);
6461138125f7SAl Viro 		c->SG[0].Len = cpu_to_le32(iocommand->buf_size);
646250a0decfSStephen M. Cameron 		c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */
6463edd16368SStephen M. Cameron 	}
6464c448ecfaSDon Brace 	rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
64653fb134cbSDon Brace 					NO_TIMEOUT);
6466138125f7SAl Viro 	if (iocommand->buf_size > 0)
64678bc8f47eSChristoph Hellwig 		hpsa_pci_unmap(h->pdev, c, 1, DMA_BIDIRECTIONAL);
6468edd16368SStephen M. Cameron 	check_ioctl_unit_attention(h, c);
646925163bd5SWebb Scales 	if (rc) {
647025163bd5SWebb Scales 		rc = -EIO;
647125163bd5SWebb Scales 		goto out;
647225163bd5SWebb Scales 	}
6473edd16368SStephen M. Cameron 
6474edd16368SStephen M. Cameron 	/* Copy the error information out */
6475138125f7SAl Viro 	memcpy(&iocommand->error_info, c->err_info,
6476138125f7SAl Viro 		sizeof(iocommand->error_info));
6477138125f7SAl Viro 	if ((iocommand->Request.Type.Direction & XFER_READ) &&
6478138125f7SAl Viro 		iocommand->buf_size > 0) {
6479edd16368SStephen M. Cameron 		/* Copy the data out of the buffer we created */
6480138125f7SAl Viro 		if (copy_to_user(iocommand->buf, buff, iocommand->buf_size)) {
6481c1f63c8fSStephen M. Cameron 			rc = -EFAULT;
6482c1f63c8fSStephen M. Cameron 			goto out;
6483edd16368SStephen M. Cameron 		}
6484edd16368SStephen M. Cameron 	}
6485c1f63c8fSStephen M. Cameron out:
648645fcb86eSStephen Cameron 	cmd_free(h, c);
6487c1f63c8fSStephen M. Cameron out_kfree:
6488c1f63c8fSStephen M. Cameron 	kfree(buff);
6489c1f63c8fSStephen M. Cameron 	return rc;
6490edd16368SStephen M. Cameron }
6491edd16368SStephen M. Cameron 
6492138125f7SAl Viro static int hpsa_big_passthru_ioctl(struct ctlr_info *h,
6493138125f7SAl Viro 				   BIG_IOCTL_Command_struct *ioc)
6494edd16368SStephen M. Cameron {
6495edd16368SStephen M. Cameron 	struct CommandList *c;
6496edd16368SStephen M. Cameron 	unsigned char **buff = NULL;
6497edd16368SStephen M. Cameron 	int *buff_size = NULL;
649850a0decfSStephen M. Cameron 	u64 temp64;
6499edd16368SStephen M. Cameron 	BYTE sg_used = 0;
6500edd16368SStephen M. Cameron 	int status = 0;
650101a02ffcSStephen M. Cameron 	u32 left;
650201a02ffcSStephen M. Cameron 	u32 sz;
6503edd16368SStephen M. Cameron 	BYTE __user *data_ptr;
6504edd16368SStephen M. Cameron 
6505edd16368SStephen M. Cameron 	if (!capable(CAP_SYS_RAWIO))
6506edd16368SStephen M. Cameron 		return -EPERM;
6507138125f7SAl Viro 
6508edd16368SStephen M. Cameron 	if ((ioc->buf_size < 1) &&
6509138125f7SAl Viro 	    (ioc->Request.Type.Direction != XFER_NONE))
6510138125f7SAl Viro 		return -EINVAL;
6511edd16368SStephen M. Cameron 	/* Check kmalloc limits  using all SGs */
6512138125f7SAl Viro 	if (ioc->malloc_size > MAX_KMALLOC_SIZE)
6513138125f7SAl Viro 		return -EINVAL;
6514138125f7SAl Viro 	if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD)
6515138125f7SAl Viro 		return -EINVAL;
65166396bb22SKees Cook 	buff = kcalloc(SG_ENTRIES_IN_CMD, sizeof(char *), GFP_KERNEL);
6517edd16368SStephen M. Cameron 	if (!buff) {
6518edd16368SStephen M. Cameron 		status = -ENOMEM;
6519edd16368SStephen M. Cameron 		goto cleanup1;
6520edd16368SStephen M. Cameron 	}
65216da2ec56SKees Cook 	buff_size = kmalloc_array(SG_ENTRIES_IN_CMD, sizeof(int), GFP_KERNEL);
6522edd16368SStephen M. Cameron 	if (!buff_size) {
6523edd16368SStephen M. Cameron 		status = -ENOMEM;
6524edd16368SStephen M. Cameron 		goto cleanup1;
6525edd16368SStephen M. Cameron 	}
6526edd16368SStephen M. Cameron 	left = ioc->buf_size;
6527edd16368SStephen M. Cameron 	data_ptr = ioc->buf;
6528edd16368SStephen M. Cameron 	while (left) {
6529edd16368SStephen M. Cameron 		sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
6530edd16368SStephen M. Cameron 		buff_size[sg_used] = sz;
6531edd16368SStephen M. Cameron 		buff[sg_used] = kmalloc(sz, GFP_KERNEL);
6532edd16368SStephen M. Cameron 		if (buff[sg_used] == NULL) {
6533edd16368SStephen M. Cameron 			status = -ENOMEM;
6534edd16368SStephen M. Cameron 			goto cleanup1;
6535edd16368SStephen M. Cameron 		}
65369233fb10SStephen M. Cameron 		if (ioc->Request.Type.Direction & XFER_WRITE) {
6537edd16368SStephen M. Cameron 			if (copy_from_user(buff[sg_used], data_ptr, sz)) {
65380758f4f7SStephen M. Cameron 				status = -EFAULT;
6539edd16368SStephen M. Cameron 				goto cleanup1;
6540edd16368SStephen M. Cameron 			}
6541edd16368SStephen M. Cameron 		} else
6542edd16368SStephen M. Cameron 			memset(buff[sg_used], 0, sz);
6543edd16368SStephen M. Cameron 		left -= sz;
6544edd16368SStephen M. Cameron 		data_ptr += sz;
6545edd16368SStephen M. Cameron 		sg_used++;
6546edd16368SStephen M. Cameron 	}
654745fcb86eSStephen Cameron 	c = cmd_alloc(h);
6548bf43caf3SRobert Elliott 
6549edd16368SStephen M. Cameron 	c->cmd_type = CMD_IOCTL_PEND;
6550a58e7e53SWebb Scales 	c->scsi_cmd = SCSI_CMD_BUSY;
6551edd16368SStephen M. Cameron 	c->Header.ReplyQueue = 0;
655250a0decfSStephen M. Cameron 	c->Header.SGList = (u8) sg_used;
655350a0decfSStephen M. Cameron 	c->Header.SGTotal = cpu_to_le16(sg_used);
6554edd16368SStephen M. Cameron 	memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
6555edd16368SStephen M. Cameron 	memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
6556edd16368SStephen M. Cameron 	if (ioc->buf_size > 0) {
6557edd16368SStephen M. Cameron 		int i;
6558edd16368SStephen M. Cameron 		for (i = 0; i < sg_used; i++) {
65598bc8f47eSChristoph Hellwig 			temp64 = dma_map_single(&h->pdev->dev, buff[i],
65608bc8f47eSChristoph Hellwig 				    buff_size[i], DMA_BIDIRECTIONAL);
656150a0decfSStephen M. Cameron 			if (dma_mapping_error(&h->pdev->dev,
656250a0decfSStephen M. Cameron 							(dma_addr_t) temp64)) {
656350a0decfSStephen M. Cameron 				c->SG[i].Addr = cpu_to_le64(0);
656450a0decfSStephen M. Cameron 				c->SG[i].Len = cpu_to_le32(0);
6565bcc48ffaSStephen M. Cameron 				hpsa_pci_unmap(h->pdev, c, i,
65668bc8f47eSChristoph Hellwig 					DMA_BIDIRECTIONAL);
6567bcc48ffaSStephen M. Cameron 				status = -ENOMEM;
6568e2d4a1f6SStephen M. Cameron 				goto cleanup0;
6569bcc48ffaSStephen M. Cameron 			}
657050a0decfSStephen M. Cameron 			c->SG[i].Addr = cpu_to_le64(temp64);
657150a0decfSStephen M. Cameron 			c->SG[i].Len = cpu_to_le32(buff_size[i]);
657250a0decfSStephen M. Cameron 			c->SG[i].Ext = cpu_to_le32(0);
6573edd16368SStephen M. Cameron 		}
657450a0decfSStephen M. Cameron 		c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST);
6575edd16368SStephen M. Cameron 	}
6576c448ecfaSDon Brace 	status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
65773fb134cbSDon Brace 						NO_TIMEOUT);
6578b03a7771SStephen M. Cameron 	if (sg_used)
65798bc8f47eSChristoph Hellwig 		hpsa_pci_unmap(h->pdev, c, sg_used, DMA_BIDIRECTIONAL);
6580edd16368SStephen M. Cameron 	check_ioctl_unit_attention(h, c);
658125163bd5SWebb Scales 	if (status) {
658225163bd5SWebb Scales 		status = -EIO;
658325163bd5SWebb Scales 		goto cleanup0;
658425163bd5SWebb Scales 	}
658525163bd5SWebb Scales 
6586edd16368SStephen M. Cameron 	/* Copy the error information out */
6587edd16368SStephen M. Cameron 	memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
65889233fb10SStephen M. Cameron 	if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) {
65892b08b3e9SDon Brace 		int i;
65902b08b3e9SDon Brace 
6591edd16368SStephen M. Cameron 		/* Copy the data out of the buffer we created */
6592edd16368SStephen M. Cameron 		BYTE __user *ptr = ioc->buf;
6593edd16368SStephen M. Cameron 		for (i = 0; i < sg_used; i++) {
6594edd16368SStephen M. Cameron 			if (copy_to_user(ptr, buff[i], buff_size[i])) {
6595edd16368SStephen M. Cameron 				status = -EFAULT;
6596e2d4a1f6SStephen M. Cameron 				goto cleanup0;
6597edd16368SStephen M. Cameron 			}
6598edd16368SStephen M. Cameron 			ptr += buff_size[i];
6599edd16368SStephen M. Cameron 		}
6600edd16368SStephen M. Cameron 	}
6601edd16368SStephen M. Cameron 	status = 0;
6602e2d4a1f6SStephen M. Cameron cleanup0:
660345fcb86eSStephen Cameron 	cmd_free(h, c);
6604edd16368SStephen M. Cameron cleanup1:
6605edd16368SStephen M. Cameron 	if (buff) {
66062b08b3e9SDon Brace 		int i;
66072b08b3e9SDon Brace 
6608edd16368SStephen M. Cameron 		for (i = 0; i < sg_used; i++)
6609edd16368SStephen M. Cameron 			kfree(buff[i]);
6610edd16368SStephen M. Cameron 		kfree(buff);
6611edd16368SStephen M. Cameron 	}
6612edd16368SStephen M. Cameron 	kfree(buff_size);
6613edd16368SStephen M. Cameron 	return status;
6614edd16368SStephen M. Cameron }
6615edd16368SStephen M. Cameron 
6616edd16368SStephen M. Cameron static void check_ioctl_unit_attention(struct ctlr_info *h,
6617edd16368SStephen M. Cameron 	struct CommandList *c)
6618edd16368SStephen M. Cameron {
6619edd16368SStephen M. Cameron 	if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
6620edd16368SStephen M. Cameron 			c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
6621edd16368SStephen M. Cameron 		(void) check_for_unit_attention(h, c);
6622edd16368SStephen M. Cameron }
66230390f0c0SStephen M. Cameron 
6624edd16368SStephen M. Cameron /*
6625edd16368SStephen M. Cameron  * ioctl
6626edd16368SStephen M. Cameron  */
66276f4e626fSNathan Chancellor static int hpsa_ioctl(struct scsi_device *dev, unsigned int cmd,
662806b43f96SAl Viro 		      void __user *argp)
6629edd16368SStephen M. Cameron {
663006b43f96SAl Viro 	struct ctlr_info *h = sdev_to_hba(dev);
66310390f0c0SStephen M. Cameron 	int rc;
6632edd16368SStephen M. Cameron 
6633edd16368SStephen M. Cameron 	switch (cmd) {
6634edd16368SStephen M. Cameron 	case CCISS_DEREGDISK:
6635edd16368SStephen M. Cameron 	case CCISS_REGNEWDISK:
6636edd16368SStephen M. Cameron 	case CCISS_REGNEWD:
6637a08a8471SStephen M. Cameron 		hpsa_scan_start(h->scsi_host);
6638edd16368SStephen M. Cameron 		return 0;
6639edd16368SStephen M. Cameron 	case CCISS_GETPCIINFO:
6640edd16368SStephen M. Cameron 		return hpsa_getpciinfo_ioctl(h, argp);
6641edd16368SStephen M. Cameron 	case CCISS_GETDRIVVER:
6642edd16368SStephen M. Cameron 		return hpsa_getdrivver_ioctl(h, argp);
6643138125f7SAl Viro 	case CCISS_PASSTHRU: {
6644138125f7SAl Viro 		IOCTL_Command_struct iocommand;
6645138125f7SAl Viro 
6646138125f7SAl Viro 		if (!argp)
6647138125f7SAl Viro 			return -EINVAL;
6648138125f7SAl Viro 		if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
6649138125f7SAl Viro 			return -EFAULT;
665034f0c627SDon Brace 		if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
66510390f0c0SStephen M. Cameron 			return -EAGAIN;
6652138125f7SAl Viro 		rc = hpsa_passthru_ioctl(h, &iocommand);
665334f0c627SDon Brace 		atomic_inc(&h->passthru_cmds_avail);
6654138125f7SAl Viro 		if (!rc && copy_to_user(argp, &iocommand, sizeof(iocommand)))
6655138125f7SAl Viro 			rc = -EFAULT;
66560390f0c0SStephen M. Cameron 		return rc;
6657138125f7SAl Viro 	}
6658138125f7SAl Viro 	case CCISS_BIG_PASSTHRU: {
6659cb17c1b6SAl Viro 		BIG_IOCTL_Command_struct ioc;
6660138125f7SAl Viro 		if (!argp)
6661138125f7SAl Viro 			return -EINVAL;
6662cb17c1b6SAl Viro 		if (copy_from_user(&ioc, argp, sizeof(ioc)))
6663cb17c1b6SAl Viro 			return -EFAULT;
666434f0c627SDon Brace 		if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
66650390f0c0SStephen M. Cameron 			return -EAGAIN;
6666cb17c1b6SAl Viro 		rc = hpsa_big_passthru_ioctl(h, &ioc);
666734f0c627SDon Brace 		atomic_inc(&h->passthru_cmds_avail);
6668cb17c1b6SAl Viro 		if (!rc && copy_to_user(argp, &ioc, sizeof(ioc)))
6669138125f7SAl Viro 			rc = -EFAULT;
66700390f0c0SStephen M. Cameron 		return rc;
6671138125f7SAl Viro 	}
6672edd16368SStephen M. Cameron 	default:
6673edd16368SStephen M. Cameron 		return -ENOTTY;
6674edd16368SStephen M. Cameron 	}
6675edd16368SStephen M. Cameron }
6676edd16368SStephen M. Cameron 
6677c5dfd106SDon Brace static void hpsa_send_host_reset(struct ctlr_info *h, u8 reset_type)
667864670ac8SStephen M. Cameron {
667964670ac8SStephen M. Cameron 	struct CommandList *c;
668064670ac8SStephen M. Cameron 
668164670ac8SStephen M. Cameron 	c = cmd_alloc(h);
6682bf43caf3SRobert Elliott 
6683a2dac136SStephen M. Cameron 	/* fill_cmd can't fail here, no data buffer to map */
6684a2dac136SStephen M. Cameron 	(void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
668564670ac8SStephen M. Cameron 		RAID_CTLR_LUNID, TYPE_MSG);
668664670ac8SStephen M. Cameron 	c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
668764670ac8SStephen M. Cameron 	c->waiting = NULL;
668864670ac8SStephen M. Cameron 	enqueue_cmd_and_start_io(h, c);
668964670ac8SStephen M. Cameron 	/* Don't wait for completion, the reset won't complete.  Don't free
669064670ac8SStephen M. Cameron 	 * the command either.  This is the last command we will send before
669164670ac8SStephen M. Cameron 	 * re-initializing everything, so it doesn't matter and won't leak.
669264670ac8SStephen M. Cameron 	 */
6693bf43caf3SRobert Elliott 	return;
669464670ac8SStephen M. Cameron }
669564670ac8SStephen M. Cameron 
6696a2dac136SStephen M. Cameron static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
6697b7bb24ebSStephen M. Cameron 	void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
6698edd16368SStephen M. Cameron 	int cmd_type)
6699edd16368SStephen M. Cameron {
67008bc8f47eSChristoph Hellwig 	enum dma_data_direction dir = DMA_NONE;
6701edd16368SStephen M. Cameron 
6702edd16368SStephen M. Cameron 	c->cmd_type = CMD_IOCTL_PEND;
6703a58e7e53SWebb Scales 	c->scsi_cmd = SCSI_CMD_BUSY;
6704edd16368SStephen M. Cameron 	c->Header.ReplyQueue = 0;
6705edd16368SStephen M. Cameron 	if (buff != NULL && size > 0) {
6706edd16368SStephen M. Cameron 		c->Header.SGList = 1;
670750a0decfSStephen M. Cameron 		c->Header.SGTotal = cpu_to_le16(1);
6708edd16368SStephen M. Cameron 	} else {
6709edd16368SStephen M. Cameron 		c->Header.SGList = 0;
671050a0decfSStephen M. Cameron 		c->Header.SGTotal = cpu_to_le16(0);
6711edd16368SStephen M. Cameron 	}
6712edd16368SStephen M. Cameron 	memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
6713edd16368SStephen M. Cameron 
6714edd16368SStephen M. Cameron 	if (cmd_type == TYPE_CMD) {
6715edd16368SStephen M. Cameron 		switch (cmd) {
6716edd16368SStephen M. Cameron 		case HPSA_INQUIRY:
6717edd16368SStephen M. Cameron 			/* are we trying to read a vital product page */
6718b7bb24ebSStephen M. Cameron 			if (page_code & VPD_PAGE) {
6719edd16368SStephen M. Cameron 				c->Request.CDB[1] = 0x01;
6720b7bb24ebSStephen M. Cameron 				c->Request.CDB[2] = (page_code & 0xff);
6721edd16368SStephen M. Cameron 			}
6722edd16368SStephen M. Cameron 			c->Request.CDBLen = 6;
6723a505b86fSStephen M. Cameron 			c->Request.type_attr_dir =
6724a505b86fSStephen M. Cameron 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6725edd16368SStephen M. Cameron 			c->Request.Timeout = 0;
6726edd16368SStephen M. Cameron 			c->Request.CDB[0] = HPSA_INQUIRY;
6727edd16368SStephen M. Cameron 			c->Request.CDB[4] = size & 0xFF;
6728edd16368SStephen M. Cameron 			break;
67290a7c3bb8SDon Brace 		case RECEIVE_DIAGNOSTIC:
67300a7c3bb8SDon Brace 			c->Request.CDBLen = 6;
67310a7c3bb8SDon Brace 			c->Request.type_attr_dir =
67320a7c3bb8SDon Brace 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
67330a7c3bb8SDon Brace 			c->Request.Timeout = 0;
67340a7c3bb8SDon Brace 			c->Request.CDB[0] = cmd;
67350a7c3bb8SDon Brace 			c->Request.CDB[1] = 1;
67360a7c3bb8SDon Brace 			c->Request.CDB[2] = 1;
67370a7c3bb8SDon Brace 			c->Request.CDB[3] = (size >> 8) & 0xFF;
67380a7c3bb8SDon Brace 			c->Request.CDB[4] = size & 0xFF;
67390a7c3bb8SDon Brace 			break;
6740edd16368SStephen M. Cameron 		case HPSA_REPORT_LOG:
6741edd16368SStephen M. Cameron 		case HPSA_REPORT_PHYS:
6742edd16368SStephen M. Cameron 			/* Talking to controller so It's a physical command
6743edd16368SStephen M. Cameron 			   mode = 00 target = 0.  Nothing to write.
6744edd16368SStephen M. Cameron 			 */
6745edd16368SStephen M. Cameron 			c->Request.CDBLen = 12;
6746a505b86fSStephen M. Cameron 			c->Request.type_attr_dir =
6747a505b86fSStephen M. Cameron 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6748edd16368SStephen M. Cameron 			c->Request.Timeout = 0;
6749edd16368SStephen M. Cameron 			c->Request.CDB[0] = cmd;
6750edd16368SStephen M. Cameron 			c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
6751edd16368SStephen M. Cameron 			c->Request.CDB[7] = (size >> 16) & 0xFF;
6752edd16368SStephen M. Cameron 			c->Request.CDB[8] = (size >> 8) & 0xFF;
6753edd16368SStephen M. Cameron 			c->Request.CDB[9] = size & 0xFF;
6754edd16368SStephen M. Cameron 			break;
6755c2adae44SScott Teel 		case BMIC_SENSE_DIAG_OPTIONS:
6756c2adae44SScott Teel 			c->Request.CDBLen = 16;
6757c2adae44SScott Teel 			c->Request.type_attr_dir =
6758c2adae44SScott Teel 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6759c2adae44SScott Teel 			c->Request.Timeout = 0;
6760c2adae44SScott Teel 			/* Spec says this should be BMIC_WRITE */
6761c2adae44SScott Teel 			c->Request.CDB[0] = BMIC_READ;
6762c2adae44SScott Teel 			c->Request.CDB[6] = BMIC_SENSE_DIAG_OPTIONS;
6763c2adae44SScott Teel 			break;
6764c2adae44SScott Teel 		case BMIC_SET_DIAG_OPTIONS:
6765c2adae44SScott Teel 			c->Request.CDBLen = 16;
6766c2adae44SScott Teel 			c->Request.type_attr_dir =
6767c2adae44SScott Teel 					TYPE_ATTR_DIR(cmd_type,
6768c2adae44SScott Teel 						ATTR_SIMPLE, XFER_WRITE);
6769c2adae44SScott Teel 			c->Request.Timeout = 0;
6770c2adae44SScott Teel 			c->Request.CDB[0] = BMIC_WRITE;
6771c2adae44SScott Teel 			c->Request.CDB[6] = BMIC_SET_DIAG_OPTIONS;
6772c2adae44SScott Teel 			break;
6773edd16368SStephen M. Cameron 		case HPSA_CACHE_FLUSH:
6774edd16368SStephen M. Cameron 			c->Request.CDBLen = 12;
6775a505b86fSStephen M. Cameron 			c->Request.type_attr_dir =
6776a505b86fSStephen M. Cameron 					TYPE_ATTR_DIR(cmd_type,
6777a505b86fSStephen M. Cameron 						ATTR_SIMPLE, XFER_WRITE);
6778edd16368SStephen M. Cameron 			c->Request.Timeout = 0;
6779edd16368SStephen M. Cameron 			c->Request.CDB[0] = BMIC_WRITE;
6780edd16368SStephen M. Cameron 			c->Request.CDB[6] = BMIC_CACHE_FLUSH;
6781bb158eabSStephen M. Cameron 			c->Request.CDB[7] = (size >> 8) & 0xFF;
6782bb158eabSStephen M. Cameron 			c->Request.CDB[8] = size & 0xFF;
6783edd16368SStephen M. Cameron 			break;
6784edd16368SStephen M. Cameron 		case TEST_UNIT_READY:
6785edd16368SStephen M. Cameron 			c->Request.CDBLen = 6;
6786a505b86fSStephen M. Cameron 			c->Request.type_attr_dir =
6787a505b86fSStephen M. Cameron 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6788edd16368SStephen M. Cameron 			c->Request.Timeout = 0;
6789edd16368SStephen M. Cameron 			break;
6790283b4a9bSStephen M. Cameron 		case HPSA_GET_RAID_MAP:
6791283b4a9bSStephen M. Cameron 			c->Request.CDBLen = 12;
6792a505b86fSStephen M. Cameron 			c->Request.type_attr_dir =
6793a505b86fSStephen M. Cameron 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6794283b4a9bSStephen M. Cameron 			c->Request.Timeout = 0;
6795283b4a9bSStephen M. Cameron 			c->Request.CDB[0] = HPSA_CISS_READ;
6796283b4a9bSStephen M. Cameron 			c->Request.CDB[1] = cmd;
6797283b4a9bSStephen M. Cameron 			c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
6798283b4a9bSStephen M. Cameron 			c->Request.CDB[7] = (size >> 16) & 0xFF;
6799283b4a9bSStephen M. Cameron 			c->Request.CDB[8] = (size >> 8) & 0xFF;
6800283b4a9bSStephen M. Cameron 			c->Request.CDB[9] = size & 0xFF;
6801283b4a9bSStephen M. Cameron 			break;
6802316b221aSStephen M. Cameron 		case BMIC_SENSE_CONTROLLER_PARAMETERS:
6803316b221aSStephen M. Cameron 			c->Request.CDBLen = 10;
6804a505b86fSStephen M. Cameron 			c->Request.type_attr_dir =
6805a505b86fSStephen M. Cameron 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6806316b221aSStephen M. Cameron 			c->Request.Timeout = 0;
6807316b221aSStephen M. Cameron 			c->Request.CDB[0] = BMIC_READ;
6808316b221aSStephen M. Cameron 			c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS;
6809316b221aSStephen M. Cameron 			c->Request.CDB[7] = (size >> 16) & 0xFF;
6810316b221aSStephen M. Cameron 			c->Request.CDB[8] = (size >> 8) & 0xFF;
6811316b221aSStephen M. Cameron 			break;
681203383736SDon Brace 		case BMIC_IDENTIFY_PHYSICAL_DEVICE:
681303383736SDon Brace 			c->Request.CDBLen = 10;
681403383736SDon Brace 			c->Request.type_attr_dir =
681503383736SDon Brace 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
681603383736SDon Brace 			c->Request.Timeout = 0;
681703383736SDon Brace 			c->Request.CDB[0] = BMIC_READ;
681803383736SDon Brace 			c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE;
681903383736SDon Brace 			c->Request.CDB[7] = (size >> 16) & 0xFF;
682003383736SDon Brace 			c->Request.CDB[8] = (size >> 8) & 0XFF;
682103383736SDon Brace 			break;
6822d04e62b9SKevin Barnett 		case BMIC_SENSE_SUBSYSTEM_INFORMATION:
6823d04e62b9SKevin Barnett 			c->Request.CDBLen = 10;
6824d04e62b9SKevin Barnett 			c->Request.type_attr_dir =
6825d04e62b9SKevin Barnett 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6826d04e62b9SKevin Barnett 			c->Request.Timeout = 0;
6827d04e62b9SKevin Barnett 			c->Request.CDB[0] = BMIC_READ;
6828d04e62b9SKevin Barnett 			c->Request.CDB[6] = BMIC_SENSE_SUBSYSTEM_INFORMATION;
6829d04e62b9SKevin Barnett 			c->Request.CDB[7] = (size >> 16) & 0xFF;
6830d04e62b9SKevin Barnett 			c->Request.CDB[8] = (size >> 8) & 0XFF;
6831d04e62b9SKevin Barnett 			break;
6832cca8f13bSDon Brace 		case BMIC_SENSE_STORAGE_BOX_PARAMS:
6833cca8f13bSDon Brace 			c->Request.CDBLen = 10;
6834cca8f13bSDon Brace 			c->Request.type_attr_dir =
6835cca8f13bSDon Brace 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6836cca8f13bSDon Brace 			c->Request.Timeout = 0;
6837cca8f13bSDon Brace 			c->Request.CDB[0] = BMIC_READ;
6838cca8f13bSDon Brace 			c->Request.CDB[6] = BMIC_SENSE_STORAGE_BOX_PARAMS;
6839cca8f13bSDon Brace 			c->Request.CDB[7] = (size >> 16) & 0xFF;
6840cca8f13bSDon Brace 			c->Request.CDB[8] = (size >> 8) & 0XFF;
6841cca8f13bSDon Brace 			break;
684266749d0dSScott Teel 		case BMIC_IDENTIFY_CONTROLLER:
684366749d0dSScott Teel 			c->Request.CDBLen = 10;
684466749d0dSScott Teel 			c->Request.type_attr_dir =
684566749d0dSScott Teel 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
684666749d0dSScott Teel 			c->Request.Timeout = 0;
684766749d0dSScott Teel 			c->Request.CDB[0] = BMIC_READ;
684866749d0dSScott Teel 			c->Request.CDB[1] = 0;
684966749d0dSScott Teel 			c->Request.CDB[2] = 0;
685066749d0dSScott Teel 			c->Request.CDB[3] = 0;
685166749d0dSScott Teel 			c->Request.CDB[4] = 0;
685266749d0dSScott Teel 			c->Request.CDB[5] = 0;
685366749d0dSScott Teel 			c->Request.CDB[6] = BMIC_IDENTIFY_CONTROLLER;
685466749d0dSScott Teel 			c->Request.CDB[7] = (size >> 16) & 0xFF;
685566749d0dSScott Teel 			c->Request.CDB[8] = (size >> 8) & 0XFF;
685666749d0dSScott Teel 			c->Request.CDB[9] = 0;
685766749d0dSScott Teel 			break;
6858edd16368SStephen M. Cameron 		default:
6859edd16368SStephen M. Cameron 			dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
6860edd16368SStephen M. Cameron 			BUG();
6861edd16368SStephen M. Cameron 		}
6862edd16368SStephen M. Cameron 	} else if (cmd_type == TYPE_MSG) {
6863edd16368SStephen M. Cameron 		switch (cmd) {
6864edd16368SStephen M. Cameron 
68650b9b7b6eSScott Teel 		case  HPSA_PHYS_TARGET_RESET:
68660b9b7b6eSScott Teel 			c->Request.CDBLen = 16;
68670b9b7b6eSScott Teel 			c->Request.type_attr_dir =
68680b9b7b6eSScott Teel 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
68690b9b7b6eSScott Teel 			c->Request.Timeout = 0; /* Don't time out */
68700b9b7b6eSScott Teel 			memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
68710b9b7b6eSScott Teel 			c->Request.CDB[0] = HPSA_RESET;
68720b9b7b6eSScott Teel 			c->Request.CDB[1] = HPSA_TARGET_RESET_TYPE;
68730b9b7b6eSScott Teel 			/* Physical target reset needs no control bytes 4-7*/
68740b9b7b6eSScott Teel 			c->Request.CDB[4] = 0x00;
68750b9b7b6eSScott Teel 			c->Request.CDB[5] = 0x00;
68760b9b7b6eSScott Teel 			c->Request.CDB[6] = 0x00;
68770b9b7b6eSScott Teel 			c->Request.CDB[7] = 0x00;
68780b9b7b6eSScott Teel 			break;
6879edd16368SStephen M. Cameron 		case  HPSA_DEVICE_RESET_MSG:
6880edd16368SStephen M. Cameron 			c->Request.CDBLen = 16;
6881a505b86fSStephen M. Cameron 			c->Request.type_attr_dir =
6882a505b86fSStephen M. Cameron 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6883edd16368SStephen M. Cameron 			c->Request.Timeout = 0; /* Don't time out */
688464670ac8SStephen M. Cameron 			memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
688564670ac8SStephen M. Cameron 			c->Request.CDB[0] =  cmd;
688621e89afdSStephen M. Cameron 			c->Request.CDB[1] = HPSA_RESET_TYPE_LUN;
6887edd16368SStephen M. Cameron 			/* If bytes 4-7 are zero, it means reset the */
6888edd16368SStephen M. Cameron 			/* LunID device */
6889edd16368SStephen M. Cameron 			c->Request.CDB[4] = 0x00;
6890edd16368SStephen M. Cameron 			c->Request.CDB[5] = 0x00;
6891edd16368SStephen M. Cameron 			c->Request.CDB[6] = 0x00;
6892edd16368SStephen M. Cameron 			c->Request.CDB[7] = 0x00;
6893edd16368SStephen M. Cameron 			break;
6894edd16368SStephen M. Cameron 		default:
6895edd16368SStephen M. Cameron 			dev_warn(&h->pdev->dev, "unknown message type %d\n",
6896edd16368SStephen M. Cameron 				cmd);
6897edd16368SStephen M. Cameron 			BUG();
6898edd16368SStephen M. Cameron 		}
6899edd16368SStephen M. Cameron 	} else {
6900edd16368SStephen M. Cameron 		dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
6901edd16368SStephen M. Cameron 		BUG();
6902edd16368SStephen M. Cameron 	}
6903edd16368SStephen M. Cameron 
6904a505b86fSStephen M. Cameron 	switch (GET_DIR(c->Request.type_attr_dir)) {
6905edd16368SStephen M. Cameron 	case XFER_READ:
69068bc8f47eSChristoph Hellwig 		dir = DMA_FROM_DEVICE;
6907edd16368SStephen M. Cameron 		break;
6908edd16368SStephen M. Cameron 	case XFER_WRITE:
69098bc8f47eSChristoph Hellwig 		dir = DMA_TO_DEVICE;
6910edd16368SStephen M. Cameron 		break;
6911edd16368SStephen M. Cameron 	case XFER_NONE:
69128bc8f47eSChristoph Hellwig 		dir = DMA_NONE;
6913edd16368SStephen M. Cameron 		break;
6914edd16368SStephen M. Cameron 	default:
69158bc8f47eSChristoph Hellwig 		dir = DMA_BIDIRECTIONAL;
6916edd16368SStephen M. Cameron 	}
69178bc8f47eSChristoph Hellwig 	if (hpsa_map_one(h->pdev, c, buff, size, dir))
6918a2dac136SStephen M. Cameron 		return -1;
6919a2dac136SStephen M. Cameron 	return 0;
6920edd16368SStephen M. Cameron }
6921edd16368SStephen M. Cameron 
6922edd16368SStephen M. Cameron /*
6923edd16368SStephen M. Cameron  * Map (physical) PCI mem into (virtual) kernel space
6924edd16368SStephen M. Cameron  */
6925edd16368SStephen M. Cameron static void __iomem *remap_pci_mem(ulong base, ulong size)
6926edd16368SStephen M. Cameron {
6927edd16368SStephen M. Cameron 	ulong page_base = ((ulong) base) & PAGE_MASK;
6928edd16368SStephen M. Cameron 	ulong page_offs = ((ulong) base) - page_base;
69294bdc0d67SChristoph Hellwig 	void __iomem *page_remapped = ioremap(page_base,
6930088ba34cSStephen M. Cameron 		page_offs + size);
6931edd16368SStephen M. Cameron 
6932edd16368SStephen M. Cameron 	return page_remapped ? (page_remapped + page_offs) : NULL;
6933edd16368SStephen M. Cameron }
6934edd16368SStephen M. Cameron 
6935254f796bSMatt Gates static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q)
6936edd16368SStephen M. Cameron {
6937254f796bSMatt Gates 	return h->access.command_completed(h, q);
6938edd16368SStephen M. Cameron }
6939edd16368SStephen M. Cameron 
6940900c5440SStephen M. Cameron static inline bool interrupt_pending(struct ctlr_info *h)
6941edd16368SStephen M. Cameron {
6942edd16368SStephen M. Cameron 	return h->access.intr_pending(h);
6943edd16368SStephen M. Cameron }
6944edd16368SStephen M. Cameron 
6945edd16368SStephen M. Cameron static inline long interrupt_not_for_us(struct ctlr_info *h)
6946edd16368SStephen M. Cameron {
694710f66018SStephen M. Cameron 	return (h->access.intr_pending(h) == 0) ||
694810f66018SStephen M. Cameron 		(h->interrupts_enabled == 0);
6949edd16368SStephen M. Cameron }
6950edd16368SStephen M. Cameron 
695101a02ffcSStephen M. Cameron static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
695201a02ffcSStephen M. Cameron 	u32 raw_tag)
6953edd16368SStephen M. Cameron {
6954edd16368SStephen M. Cameron 	if (unlikely(tag_index >= h->nr_cmds)) {
6955edd16368SStephen M. Cameron 		dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
6956edd16368SStephen M. Cameron 		return 1;
6957edd16368SStephen M. Cameron 	}
6958edd16368SStephen M. Cameron 	return 0;
6959edd16368SStephen M. Cameron }
6960edd16368SStephen M. Cameron 
69615a3d16f5SStephen M. Cameron static inline void finish_cmd(struct CommandList *c)
6962edd16368SStephen M. Cameron {
6963e85c5974SStephen M. Cameron 	dial_up_lockup_detection_on_fw_flash_complete(c->h, c);
6964c349775eSScott Teel 	if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI
6965c349775eSScott Teel 			|| c->cmd_type == CMD_IOACCEL2))
69661fb011fbSStephen M. Cameron 		complete_scsi_command(c);
69678be986ccSStephen Cameron 	else if (c->cmd_type == CMD_IOCTL_PEND || c->cmd_type == IOACCEL2_TMF)
6968edd16368SStephen M. Cameron 		complete(c->waiting);
6969a104c99fSStephen M. Cameron }
6970a104c99fSStephen M. Cameron 
6971303932fdSDon Brace /* process completion of an indexed ("direct lookup") command */
69721d94f94dSStephen M. Cameron static inline void process_indexed_cmd(struct ctlr_info *h,
6973303932fdSDon Brace 	u32 raw_tag)
6974303932fdSDon Brace {
6975303932fdSDon Brace 	u32 tag_index;
6976303932fdSDon Brace 	struct CommandList *c;
6977303932fdSDon Brace 
6978f2405db8SDon Brace 	tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT;
69791d94f94dSStephen M. Cameron 	if (!bad_tag(h, tag_index, raw_tag)) {
6980303932fdSDon Brace 		c = h->cmd_pool + tag_index;
69815a3d16f5SStephen M. Cameron 		finish_cmd(c);
69821d94f94dSStephen M. Cameron 	}
6983303932fdSDon Brace }
6984303932fdSDon Brace 
698564670ac8SStephen M. Cameron /* Some controllers, like p400, will give us one interrupt
698664670ac8SStephen M. Cameron  * after a soft reset, even if we turned interrupts off.
698764670ac8SStephen M. Cameron  * Only need to check for this in the hpsa_xxx_discard_completions
698864670ac8SStephen M. Cameron  * functions.
698964670ac8SStephen M. Cameron  */
699064670ac8SStephen M. Cameron static int ignore_bogus_interrupt(struct ctlr_info *h)
699164670ac8SStephen M. Cameron {
699264670ac8SStephen M. Cameron 	if (likely(!reset_devices))
699364670ac8SStephen M. Cameron 		return 0;
699464670ac8SStephen M. Cameron 
699564670ac8SStephen M. Cameron 	if (likely(h->interrupts_enabled))
699664670ac8SStephen M. Cameron 		return 0;
699764670ac8SStephen M. Cameron 
699864670ac8SStephen M. Cameron 	dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
699964670ac8SStephen M. Cameron 		"(known firmware bug.)  Ignoring.\n");
700064670ac8SStephen M. Cameron 
700164670ac8SStephen M. Cameron 	return 1;
700264670ac8SStephen M. Cameron }
700364670ac8SStephen M. Cameron 
7004254f796bSMatt Gates /*
7005254f796bSMatt Gates  * Convert &h->q[x] (passed to interrupt handlers) back to h.
7006254f796bSMatt Gates  * Relies on (h-q[x] == x) being true for x such that
7007254f796bSMatt Gates  * 0 <= x < MAX_REPLY_QUEUES.
7008254f796bSMatt Gates  */
7009254f796bSMatt Gates static struct ctlr_info *queue_to_hba(u8 *queue)
701064670ac8SStephen M. Cameron {
7011254f796bSMatt Gates 	return container_of((queue - *queue), struct ctlr_info, q[0]);
7012254f796bSMatt Gates }
7013254f796bSMatt Gates 
7014254f796bSMatt Gates static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue)
7015254f796bSMatt Gates {
7016254f796bSMatt Gates 	struct ctlr_info *h = queue_to_hba(queue);
7017254f796bSMatt Gates 	u8 q = *(u8 *) queue;
701864670ac8SStephen M. Cameron 	u32 raw_tag;
701964670ac8SStephen M. Cameron 
702064670ac8SStephen M. Cameron 	if (ignore_bogus_interrupt(h))
702164670ac8SStephen M. Cameron 		return IRQ_NONE;
702264670ac8SStephen M. Cameron 
702364670ac8SStephen M. Cameron 	if (interrupt_not_for_us(h))
702464670ac8SStephen M. Cameron 		return IRQ_NONE;
7025a0c12413SStephen M. Cameron 	h->last_intr_timestamp = get_jiffies_64();
702664670ac8SStephen M. Cameron 	while (interrupt_pending(h)) {
7027254f796bSMatt Gates 		raw_tag = get_next_completion(h, q);
702864670ac8SStephen M. Cameron 		while (raw_tag != FIFO_EMPTY)
7029254f796bSMatt Gates 			raw_tag = next_command(h, q);
703064670ac8SStephen M. Cameron 	}
703164670ac8SStephen M. Cameron 	return IRQ_HANDLED;
703264670ac8SStephen M. Cameron }
703364670ac8SStephen M. Cameron 
7034254f796bSMatt Gates static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue)
703564670ac8SStephen M. Cameron {
7036254f796bSMatt Gates 	struct ctlr_info *h = queue_to_hba(queue);
703764670ac8SStephen M. Cameron 	u32 raw_tag;
7038254f796bSMatt Gates 	u8 q = *(u8 *) queue;
703964670ac8SStephen M. Cameron 
704064670ac8SStephen M. Cameron 	if (ignore_bogus_interrupt(h))
704164670ac8SStephen M. Cameron 		return IRQ_NONE;
704264670ac8SStephen M. Cameron 
7043a0c12413SStephen M. Cameron 	h->last_intr_timestamp = get_jiffies_64();
7044254f796bSMatt Gates 	raw_tag = get_next_completion(h, q);
704564670ac8SStephen M. Cameron 	while (raw_tag != FIFO_EMPTY)
7046254f796bSMatt Gates 		raw_tag = next_command(h, q);
704764670ac8SStephen M. Cameron 	return IRQ_HANDLED;
704864670ac8SStephen M. Cameron }
704964670ac8SStephen M. Cameron 
7050254f796bSMatt Gates static irqreturn_t do_hpsa_intr_intx(int irq, void *queue)
7051edd16368SStephen M. Cameron {
7052254f796bSMatt Gates 	struct ctlr_info *h = queue_to_hba((u8 *) queue);
7053303932fdSDon Brace 	u32 raw_tag;
7054254f796bSMatt Gates 	u8 q = *(u8 *) queue;
7055edd16368SStephen M. Cameron 
7056edd16368SStephen M. Cameron 	if (interrupt_not_for_us(h))
7057edd16368SStephen M. Cameron 		return IRQ_NONE;
7058a0c12413SStephen M. Cameron 	h->last_intr_timestamp = get_jiffies_64();
705910f66018SStephen M. Cameron 	while (interrupt_pending(h)) {
7060254f796bSMatt Gates 		raw_tag = get_next_completion(h, q);
706110f66018SStephen M. Cameron 		while (raw_tag != FIFO_EMPTY) {
70621d94f94dSStephen M. Cameron 			process_indexed_cmd(h, raw_tag);
7063254f796bSMatt Gates 			raw_tag = next_command(h, q);
706410f66018SStephen M. Cameron 		}
706510f66018SStephen M. Cameron 	}
706610f66018SStephen M. Cameron 	return IRQ_HANDLED;
706710f66018SStephen M. Cameron }
706810f66018SStephen M. Cameron 
7069254f796bSMatt Gates static irqreturn_t do_hpsa_intr_msi(int irq, void *queue)
707010f66018SStephen M. Cameron {
7071254f796bSMatt Gates 	struct ctlr_info *h = queue_to_hba(queue);
707210f66018SStephen M. Cameron 	u32 raw_tag;
7073254f796bSMatt Gates 	u8 q = *(u8 *) queue;
707410f66018SStephen M. Cameron 
7075a0c12413SStephen M. Cameron 	h->last_intr_timestamp = get_jiffies_64();
7076254f796bSMatt Gates 	raw_tag = get_next_completion(h, q);
7077303932fdSDon Brace 	while (raw_tag != FIFO_EMPTY) {
70781d94f94dSStephen M. Cameron 		process_indexed_cmd(h, raw_tag);
7079254f796bSMatt Gates 		raw_tag = next_command(h, q);
7080edd16368SStephen M. Cameron 	}
7081edd16368SStephen M. Cameron 	return IRQ_HANDLED;
7082edd16368SStephen M. Cameron }
7083edd16368SStephen M. Cameron 
7084a9a3a273SStephen M. Cameron /* Send a message CDB to the firmware. Careful, this only works
7085a9a3a273SStephen M. Cameron  * in simple mode, not performant mode due to the tag lookup.
7086a9a3a273SStephen M. Cameron  * We only ever use this immediately after a controller reset.
7087a9a3a273SStephen M. Cameron  */
70886f039790SGreg Kroah-Hartman static int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
7089edd16368SStephen M. Cameron 			unsigned char type)
7090edd16368SStephen M. Cameron {
7091edd16368SStephen M. Cameron 	struct Command {
7092edd16368SStephen M. Cameron 		struct CommandListHeader CommandHeader;
7093edd16368SStephen M. Cameron 		struct RequestBlock Request;
7094edd16368SStephen M. Cameron 		struct ErrDescriptor ErrorDescriptor;
7095edd16368SStephen M. Cameron 	};
7096edd16368SStephen M. Cameron 	struct Command *cmd;
7097edd16368SStephen M. Cameron 	static const size_t cmd_sz = sizeof(*cmd) +
7098edd16368SStephen M. Cameron 					sizeof(cmd->ErrorDescriptor);
7099edd16368SStephen M. Cameron 	dma_addr_t paddr64;
71002b08b3e9SDon Brace 	__le32 paddr32;
71012b08b3e9SDon Brace 	u32 tag;
7102edd16368SStephen M. Cameron 	void __iomem *vaddr;
7103edd16368SStephen M. Cameron 	int i, err;
7104edd16368SStephen M. Cameron 
7105edd16368SStephen M. Cameron 	vaddr = pci_ioremap_bar(pdev, 0);
7106edd16368SStephen M. Cameron 	if (vaddr == NULL)
7107edd16368SStephen M. Cameron 		return -ENOMEM;
7108edd16368SStephen M. Cameron 
7109edd16368SStephen M. Cameron 	/* The Inbound Post Queue only accepts 32-bit physical addresses for the
7110edd16368SStephen M. Cameron 	 * CCISS commands, so they must be allocated from the lower 4GiB of
7111edd16368SStephen M. Cameron 	 * memory.
7112edd16368SStephen M. Cameron 	 */
71138bc8f47eSChristoph Hellwig 	err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
7114edd16368SStephen M. Cameron 	if (err) {
7115edd16368SStephen M. Cameron 		iounmap(vaddr);
71161eaec8f3SRobert Elliott 		return err;
7117edd16368SStephen M. Cameron 	}
7118edd16368SStephen M. Cameron 
71198bc8f47eSChristoph Hellwig 	cmd = dma_alloc_coherent(&pdev->dev, cmd_sz, &paddr64, GFP_KERNEL);
7120edd16368SStephen M. Cameron 	if (cmd == NULL) {
7121edd16368SStephen M. Cameron 		iounmap(vaddr);
7122edd16368SStephen M. Cameron 		return -ENOMEM;
7123edd16368SStephen M. Cameron 	}
7124edd16368SStephen M. Cameron 
7125edd16368SStephen M. Cameron 	/* This must fit, because of the 32-bit consistent DMA mask.  Also,
7126edd16368SStephen M. Cameron 	 * although there's no guarantee, we assume that the address is at
7127edd16368SStephen M. Cameron 	 * least 4-byte aligned (most likely, it's page-aligned).
7128edd16368SStephen M. Cameron 	 */
71292b08b3e9SDon Brace 	paddr32 = cpu_to_le32(paddr64);
7130edd16368SStephen M. Cameron 
7131edd16368SStephen M. Cameron 	cmd->CommandHeader.ReplyQueue = 0;
7132edd16368SStephen M. Cameron 	cmd->CommandHeader.SGList = 0;
713350a0decfSStephen M. Cameron 	cmd->CommandHeader.SGTotal = cpu_to_le16(0);
71342b08b3e9SDon Brace 	cmd->CommandHeader.tag = cpu_to_le64(paddr64);
7135edd16368SStephen M. Cameron 	memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
7136edd16368SStephen M. Cameron 
7137edd16368SStephen M. Cameron 	cmd->Request.CDBLen = 16;
7138a505b86fSStephen M. Cameron 	cmd->Request.type_attr_dir =
7139a505b86fSStephen M. Cameron 			TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE);
7140edd16368SStephen M. Cameron 	cmd->Request.Timeout = 0; /* Don't time out */
7141edd16368SStephen M. Cameron 	cmd->Request.CDB[0] = opcode;
7142edd16368SStephen M. Cameron 	cmd->Request.CDB[1] = type;
7143edd16368SStephen M. Cameron 	memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
714450a0decfSStephen M. Cameron 	cmd->ErrorDescriptor.Addr =
71452b08b3e9SDon Brace 			cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd)));
714650a0decfSStephen M. Cameron 	cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo));
7147edd16368SStephen M. Cameron 
71482b08b3e9SDon Brace 	writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET);
7149edd16368SStephen M. Cameron 
7150edd16368SStephen M. Cameron 	for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
7151edd16368SStephen M. Cameron 		tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
71522b08b3e9SDon Brace 		if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64)
7153edd16368SStephen M. Cameron 			break;
7154edd16368SStephen M. Cameron 		msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
7155edd16368SStephen M. Cameron 	}
7156edd16368SStephen M. Cameron 
7157edd16368SStephen M. Cameron 	iounmap(vaddr);
7158edd16368SStephen M. Cameron 
7159edd16368SStephen M. Cameron 	/* we leak the DMA buffer here ... no choice since the controller could
7160edd16368SStephen M. Cameron 	 *  still complete the command.
7161edd16368SStephen M. Cameron 	 */
7162edd16368SStephen M. Cameron 	if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
7163edd16368SStephen M. Cameron 		dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
7164edd16368SStephen M. Cameron 			opcode, type);
7165edd16368SStephen M. Cameron 		return -ETIMEDOUT;
7166edd16368SStephen M. Cameron 	}
7167edd16368SStephen M. Cameron 
71688bc8f47eSChristoph Hellwig 	dma_free_coherent(&pdev->dev, cmd_sz, cmd, paddr64);
7169edd16368SStephen M. Cameron 
7170edd16368SStephen M. Cameron 	if (tag & HPSA_ERROR_BIT) {
7171edd16368SStephen M. Cameron 		dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
7172edd16368SStephen M. Cameron 			opcode, type);
7173edd16368SStephen M. Cameron 		return -EIO;
7174edd16368SStephen M. Cameron 	}
7175edd16368SStephen M. Cameron 
7176edd16368SStephen M. Cameron 	dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
7177edd16368SStephen M. Cameron 		opcode, type);
7178edd16368SStephen M. Cameron 	return 0;
7179edd16368SStephen M. Cameron }
7180edd16368SStephen M. Cameron 
7181edd16368SStephen M. Cameron #define hpsa_noop(p) hpsa_message(p, 3, 0)
7182edd16368SStephen M. Cameron 
71831df8552aSStephen M. Cameron static int hpsa_controller_hard_reset(struct pci_dev *pdev,
718442a91641SDon Brace 	void __iomem *vaddr, u32 use_doorbell)
7185edd16368SStephen M. Cameron {
7186edd16368SStephen M. Cameron 
71871df8552aSStephen M. Cameron 	if (use_doorbell) {
71881df8552aSStephen M. Cameron 		/* For everything after the P600, the PCI power state method
71891df8552aSStephen M. Cameron 		 * of resetting the controller doesn't work, so we have this
71901df8552aSStephen M. Cameron 		 * other way using the doorbell register.
7191edd16368SStephen M. Cameron 		 */
71921df8552aSStephen M. Cameron 		dev_info(&pdev->dev, "using doorbell to reset controller\n");
7193cf0b08d0SStephen M. Cameron 		writel(use_doorbell, vaddr + SA5_DOORBELL);
719485009239SStephen M. Cameron 
719500701a96SJustin Lindley 		/* PMC hardware guys tell us we need a 10 second delay after
719685009239SStephen M. Cameron 		 * doorbell reset and before any attempt to talk to the board
719785009239SStephen M. Cameron 		 * at all to ensure that this actually works and doesn't fall
719885009239SStephen M. Cameron 		 * over in some weird corner cases.
719985009239SStephen M. Cameron 		 */
720000701a96SJustin Lindley 		msleep(10000);
72011df8552aSStephen M. Cameron 	} else { /* Try to do it the PCI power state way */
7202edd16368SStephen M. Cameron 
7203edd16368SStephen M. Cameron 		/* Quoting from the Open CISS Specification: "The Power
7204edd16368SStephen M. Cameron 		 * Management Control/Status Register (CSR) controls the power
7205edd16368SStephen M. Cameron 		 * state of the device.  The normal operating state is D0,
7206edd16368SStephen M. Cameron 		 * CSR=00h.  The software off state is D3, CSR=03h.  To reset
72071df8552aSStephen M. Cameron 		 * the controller, place the interface device in D3 then to D0,
72081df8552aSStephen M. Cameron 		 * this causes a secondary PCI reset which will reset the
72091df8552aSStephen M. Cameron 		 * controller." */
7210edd16368SStephen M. Cameron 
72112662cab8SDon Brace 		int rc = 0;
72122662cab8SDon Brace 
72131df8552aSStephen M. Cameron 		dev_info(&pdev->dev, "using PCI PM to reset controller\n");
72142662cab8SDon Brace 
7215edd16368SStephen M. Cameron 		/* enter the D3hot power management state */
72162662cab8SDon Brace 		rc = pci_set_power_state(pdev, PCI_D3hot);
72172662cab8SDon Brace 		if (rc)
72182662cab8SDon Brace 			return rc;
7219edd16368SStephen M. Cameron 
7220edd16368SStephen M. Cameron 		msleep(500);
7221edd16368SStephen M. Cameron 
7222edd16368SStephen M. Cameron 		/* enter the D0 power management state */
72232662cab8SDon Brace 		rc = pci_set_power_state(pdev, PCI_D0);
72242662cab8SDon Brace 		if (rc)
72252662cab8SDon Brace 			return rc;
7226c4853efeSMike Miller 
7227c4853efeSMike Miller 		/*
7228c4853efeSMike Miller 		 * The P600 requires a small delay when changing states.
7229c4853efeSMike Miller 		 * Otherwise we may think the board did not reset and we bail.
7230c4853efeSMike Miller 		 * This for kdump only and is particular to the P600.
7231c4853efeSMike Miller 		 */
7232c4853efeSMike Miller 		msleep(500);
72331df8552aSStephen M. Cameron 	}
72341df8552aSStephen M. Cameron 	return 0;
72351df8552aSStephen M. Cameron }
72361df8552aSStephen M. Cameron 
72376f039790SGreg Kroah-Hartman static void init_driver_version(char *driver_version, int len)
7238580ada3cSStephen M. Cameron {
7239580ada3cSStephen M. Cameron 	memset(driver_version, 0, len);
7240f79cfec6SStephen M. Cameron 	strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1);
7241580ada3cSStephen M. Cameron }
7242580ada3cSStephen M. Cameron 
72436f039790SGreg Kroah-Hartman static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable)
7244580ada3cSStephen M. Cameron {
7245580ada3cSStephen M. Cameron 	char *driver_version;
7246580ada3cSStephen M. Cameron 	int i, size = sizeof(cfgtable->driver_version);
7247580ada3cSStephen M. Cameron 
7248580ada3cSStephen M. Cameron 	driver_version = kmalloc(size, GFP_KERNEL);
7249580ada3cSStephen M. Cameron 	if (!driver_version)
7250580ada3cSStephen M. Cameron 		return -ENOMEM;
7251580ada3cSStephen M. Cameron 
7252580ada3cSStephen M. Cameron 	init_driver_version(driver_version, size);
7253580ada3cSStephen M. Cameron 	for (i = 0; i < size; i++)
7254580ada3cSStephen M. Cameron 		writeb(driver_version[i], &cfgtable->driver_version[i]);
7255580ada3cSStephen M. Cameron 	kfree(driver_version);
7256580ada3cSStephen M. Cameron 	return 0;
7257580ada3cSStephen M. Cameron }
7258580ada3cSStephen M. Cameron 
72596f039790SGreg Kroah-Hartman static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable,
72606f039790SGreg Kroah-Hartman 					  unsigned char *driver_ver)
7261580ada3cSStephen M. Cameron {
7262580ada3cSStephen M. Cameron 	int i;
7263580ada3cSStephen M. Cameron 
7264580ada3cSStephen M. Cameron 	for (i = 0; i < sizeof(cfgtable->driver_version); i++)
7265580ada3cSStephen M. Cameron 		driver_ver[i] = readb(&cfgtable->driver_version[i]);
7266580ada3cSStephen M. Cameron }
7267580ada3cSStephen M. Cameron 
72686f039790SGreg Kroah-Hartman static int controller_reset_failed(struct CfgTable __iomem *cfgtable)
7269580ada3cSStephen M. Cameron {
7270580ada3cSStephen M. Cameron 
7271580ada3cSStephen M. Cameron 	char *driver_ver, *old_driver_ver;
7272580ada3cSStephen M. Cameron 	int rc, size = sizeof(cfgtable->driver_version);
7273580ada3cSStephen M. Cameron 
72746da2ec56SKees Cook 	old_driver_ver = kmalloc_array(2, size, GFP_KERNEL);
7275580ada3cSStephen M. Cameron 	if (!old_driver_ver)
7276580ada3cSStephen M. Cameron 		return -ENOMEM;
7277580ada3cSStephen M. Cameron 	driver_ver = old_driver_ver + size;
7278580ada3cSStephen M. Cameron 
7279580ada3cSStephen M. Cameron 	/* After a reset, the 32 bytes of "driver version" in the cfgtable
7280580ada3cSStephen M. Cameron 	 * should have been changed, otherwise we know the reset failed.
7281580ada3cSStephen M. Cameron 	 */
7282580ada3cSStephen M. Cameron 	init_driver_version(old_driver_ver, size);
7283580ada3cSStephen M. Cameron 	read_driver_ver_from_cfgtable(cfgtable, driver_ver);
7284580ada3cSStephen M. Cameron 	rc = !memcmp(driver_ver, old_driver_ver, size);
7285580ada3cSStephen M. Cameron 	kfree(old_driver_ver);
7286580ada3cSStephen M. Cameron 	return rc;
7287580ada3cSStephen M. Cameron }
72881df8552aSStephen M. Cameron /* This does a hard reset of the controller using PCI power management
72891df8552aSStephen M. Cameron  * states or the using the doorbell register.
72901df8552aSStephen M. Cameron  */
72916b6c1cd7STomas Henzl static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id)
72921df8552aSStephen M. Cameron {
72931df8552aSStephen M. Cameron 	u64 cfg_offset;
72941df8552aSStephen M. Cameron 	u32 cfg_base_addr;
72951df8552aSStephen M. Cameron 	u64 cfg_base_addr_index;
72961df8552aSStephen M. Cameron 	void __iomem *vaddr;
72971df8552aSStephen M. Cameron 	unsigned long paddr;
7298580ada3cSStephen M. Cameron 	u32 misc_fw_support;
7299270d05deSStephen M. Cameron 	int rc;
73001df8552aSStephen M. Cameron 	struct CfgTable __iomem *cfgtable;
7301cf0b08d0SStephen M. Cameron 	u32 use_doorbell;
7302270d05deSStephen M. Cameron 	u16 command_register;
73031df8552aSStephen M. Cameron 
73041df8552aSStephen M. Cameron 	/* For controllers as old as the P600, this is very nearly
73051df8552aSStephen M. Cameron 	 * the same thing as
73061df8552aSStephen M. Cameron 	 *
73071df8552aSStephen M. Cameron 	 * pci_save_state(pci_dev);
73081df8552aSStephen M. Cameron 	 * pci_set_power_state(pci_dev, PCI_D3hot);
73091df8552aSStephen M. Cameron 	 * pci_set_power_state(pci_dev, PCI_D0);
73101df8552aSStephen M. Cameron 	 * pci_restore_state(pci_dev);
73111df8552aSStephen M. Cameron 	 *
73121df8552aSStephen M. Cameron 	 * For controllers newer than the P600, the pci power state
73131df8552aSStephen M. Cameron 	 * method of resetting doesn't work so we have another way
73141df8552aSStephen M. Cameron 	 * using the doorbell register.
73151df8552aSStephen M. Cameron 	 */
731618867659SStephen M. Cameron 
731760f923b9SRobert Elliott 	if (!ctlr_is_resettable(board_id)) {
731860f923b9SRobert Elliott 		dev_warn(&pdev->dev, "Controller not resettable\n");
731925c1e56aSStephen M. Cameron 		return -ENODEV;
732025c1e56aSStephen M. Cameron 	}
732146380786SStephen M. Cameron 
732246380786SStephen M. Cameron 	/* if controller is soft- but not hard resettable... */
732346380786SStephen M. Cameron 	if (!ctlr_is_hard_resettable(board_id))
732446380786SStephen M. Cameron 		return -ENOTSUPP; /* try soft reset later. */
732518867659SStephen M. Cameron 
7326270d05deSStephen M. Cameron 	/* Save the PCI command register */
7327270d05deSStephen M. Cameron 	pci_read_config_word(pdev, 4, &command_register);
7328270d05deSStephen M. Cameron 	pci_save_state(pdev);
73291df8552aSStephen M. Cameron 
73301df8552aSStephen M. Cameron 	/* find the first memory BAR, so we can find the cfg table */
73311df8552aSStephen M. Cameron 	rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
73321df8552aSStephen M. Cameron 	if (rc)
73331df8552aSStephen M. Cameron 		return rc;
73341df8552aSStephen M. Cameron 	vaddr = remap_pci_mem(paddr, 0x250);
73351df8552aSStephen M. Cameron 	if (!vaddr)
73361df8552aSStephen M. Cameron 		return -ENOMEM;
73371df8552aSStephen M. Cameron 
73381df8552aSStephen M. Cameron 	/* find cfgtable in order to check if reset via doorbell is supported */
73391df8552aSStephen M. Cameron 	rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
73401df8552aSStephen M. Cameron 					&cfg_base_addr_index, &cfg_offset);
73411df8552aSStephen M. Cameron 	if (rc)
73421df8552aSStephen M. Cameron 		goto unmap_vaddr;
73431df8552aSStephen M. Cameron 	cfgtable = remap_pci_mem(pci_resource_start(pdev,
73441df8552aSStephen M. Cameron 		       cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
73451df8552aSStephen M. Cameron 	if (!cfgtable) {
73461df8552aSStephen M. Cameron 		rc = -ENOMEM;
73471df8552aSStephen M. Cameron 		goto unmap_vaddr;
73481df8552aSStephen M. Cameron 	}
7349580ada3cSStephen M. Cameron 	rc = write_driver_ver_to_cfgtable(cfgtable);
7350580ada3cSStephen M. Cameron 	if (rc)
735103741d95STomas Henzl 		goto unmap_cfgtable;
73521df8552aSStephen M. Cameron 
7353cf0b08d0SStephen M. Cameron 	/* If reset via doorbell register is supported, use that.
7354cf0b08d0SStephen M. Cameron 	 * There are two such methods.  Favor the newest method.
7355cf0b08d0SStephen M. Cameron 	 */
73561df8552aSStephen M. Cameron 	misc_fw_support = readl(&cfgtable->misc_fw_support);
7357cf0b08d0SStephen M. Cameron 	use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
7358cf0b08d0SStephen M. Cameron 	if (use_doorbell) {
7359cf0b08d0SStephen M. Cameron 		use_doorbell = DOORBELL_CTLR_RESET2;
7360cf0b08d0SStephen M. Cameron 	} else {
73611df8552aSStephen M. Cameron 		use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
7362cf0b08d0SStephen M. Cameron 		if (use_doorbell) {
7363050f7147SStephen Cameron 			dev_warn(&pdev->dev,
7364050f7147SStephen Cameron 				"Soft reset not supported. Firmware update is required.\n");
736564670ac8SStephen M. Cameron 			rc = -ENOTSUPP; /* try soft reset */
7366cf0b08d0SStephen M. Cameron 			goto unmap_cfgtable;
7367cf0b08d0SStephen M. Cameron 		}
7368cf0b08d0SStephen M. Cameron 	}
73691df8552aSStephen M. Cameron 
73701df8552aSStephen M. Cameron 	rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
73711df8552aSStephen M. Cameron 	if (rc)
73721df8552aSStephen M. Cameron 		goto unmap_cfgtable;
7373edd16368SStephen M. Cameron 
7374270d05deSStephen M. Cameron 	pci_restore_state(pdev);
7375270d05deSStephen M. Cameron 	pci_write_config_word(pdev, 4, command_register);
7376edd16368SStephen M. Cameron 
73771df8552aSStephen M. Cameron 	/* Some devices (notably the HP Smart Array 5i Controller)
73781df8552aSStephen M. Cameron 	   need a little pause here */
73791df8552aSStephen M. Cameron 	msleep(HPSA_POST_RESET_PAUSE_MSECS);
73801df8552aSStephen M. Cameron 
7381fe5389c8SStephen M. Cameron 	rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
7382fe5389c8SStephen M. Cameron 	if (rc) {
7383fe5389c8SStephen M. Cameron 		dev_warn(&pdev->dev,
7384050f7147SStephen Cameron 			"Failed waiting for board to become ready after hard reset\n");
7385fe5389c8SStephen M. Cameron 		goto unmap_cfgtable;
7386fe5389c8SStephen M. Cameron 	}
7387fe5389c8SStephen M. Cameron 
7388580ada3cSStephen M. Cameron 	rc = controller_reset_failed(vaddr);
7389580ada3cSStephen M. Cameron 	if (rc < 0)
7390580ada3cSStephen M. Cameron 		goto unmap_cfgtable;
7391580ada3cSStephen M. Cameron 	if (rc) {
739264670ac8SStephen M. Cameron 		dev_warn(&pdev->dev, "Unable to successfully reset "
739364670ac8SStephen M. Cameron 			"controller. Will try soft reset.\n");
739464670ac8SStephen M. Cameron 		rc = -ENOTSUPP;
7395580ada3cSStephen M. Cameron 	} else {
739664670ac8SStephen M. Cameron 		dev_info(&pdev->dev, "board ready after hard reset.\n");
73971df8552aSStephen M. Cameron 	}
73981df8552aSStephen M. Cameron 
73991df8552aSStephen M. Cameron unmap_cfgtable:
74001df8552aSStephen M. Cameron 	iounmap(cfgtable);
74011df8552aSStephen M. Cameron 
74021df8552aSStephen M. Cameron unmap_vaddr:
74031df8552aSStephen M. Cameron 	iounmap(vaddr);
74041df8552aSStephen M. Cameron 	return rc;
7405edd16368SStephen M. Cameron }
7406edd16368SStephen M. Cameron 
7407edd16368SStephen M. Cameron /*
7408edd16368SStephen M. Cameron  *  We cannot read the structure directly, for portability we must use
7409edd16368SStephen M. Cameron  *   the io functions.
7410edd16368SStephen M. Cameron  *   This is for debug only.
7411edd16368SStephen M. Cameron  */
741242a91641SDon Brace static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb)
7413edd16368SStephen M. Cameron {
741458f8665cSStephen M. Cameron #ifdef HPSA_DEBUG
7415edd16368SStephen M. Cameron 	int i;
7416edd16368SStephen M. Cameron 	char temp_name[17];
7417edd16368SStephen M. Cameron 
7418edd16368SStephen M. Cameron 	dev_info(dev, "Controller Configuration information\n");
7419edd16368SStephen M. Cameron 	dev_info(dev, "------------------------------------\n");
7420edd16368SStephen M. Cameron 	for (i = 0; i < 4; i++)
7421edd16368SStephen M. Cameron 		temp_name[i] = readb(&(tb->Signature[i]));
7422edd16368SStephen M. Cameron 	temp_name[4] = '\0';
7423edd16368SStephen M. Cameron 	dev_info(dev, "   Signature = %s\n", temp_name);
7424edd16368SStephen M. Cameron 	dev_info(dev, "   Spec Number = %d\n", readl(&(tb->SpecValence)));
7425edd16368SStephen M. Cameron 	dev_info(dev, "   Transport methods supported = 0x%x\n",
7426edd16368SStephen M. Cameron 	       readl(&(tb->TransportSupport)));
7427edd16368SStephen M. Cameron 	dev_info(dev, "   Transport methods active = 0x%x\n",
7428edd16368SStephen M. Cameron 	       readl(&(tb->TransportActive)));
7429edd16368SStephen M. Cameron 	dev_info(dev, "   Requested transport Method = 0x%x\n",
7430edd16368SStephen M. Cameron 	       readl(&(tb->HostWrite.TransportRequest)));
7431edd16368SStephen M. Cameron 	dev_info(dev, "   Coalesce Interrupt Delay = 0x%x\n",
7432edd16368SStephen M. Cameron 	       readl(&(tb->HostWrite.CoalIntDelay)));
7433edd16368SStephen M. Cameron 	dev_info(dev, "   Coalesce Interrupt Count = 0x%x\n",
7434edd16368SStephen M. Cameron 	       readl(&(tb->HostWrite.CoalIntCount)));
743569d6e33dSRobert Elliott 	dev_info(dev, "   Max outstanding commands = %d\n",
7436edd16368SStephen M. Cameron 	       readl(&(tb->CmdsOutMax)));
7437edd16368SStephen M. Cameron 	dev_info(dev, "   Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
7438edd16368SStephen M. Cameron 	for (i = 0; i < 16; i++)
7439edd16368SStephen M. Cameron 		temp_name[i] = readb(&(tb->ServerName[i]));
7440edd16368SStephen M. Cameron 	temp_name[16] = '\0';
7441edd16368SStephen M. Cameron 	dev_info(dev, "   Server Name = %s\n", temp_name);
7442edd16368SStephen M. Cameron 	dev_info(dev, "   Heartbeat Counter = 0x%x\n\n\n",
7443edd16368SStephen M. Cameron 		readl(&(tb->HeartBeat)));
7444edd16368SStephen M. Cameron #endif				/* HPSA_DEBUG */
744558f8665cSStephen M. Cameron }
7446edd16368SStephen M. Cameron 
7447edd16368SStephen M. Cameron static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
7448edd16368SStephen M. Cameron {
7449edd16368SStephen M. Cameron 	int i, offset, mem_type, bar_type;
7450edd16368SStephen M. Cameron 
7451edd16368SStephen M. Cameron 	if (pci_bar_addr == PCI_BASE_ADDRESS_0)	/* looking for BAR zero? */
7452edd16368SStephen M. Cameron 		return 0;
7453edd16368SStephen M. Cameron 	offset = 0;
7454edd16368SStephen M. Cameron 	for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
7455edd16368SStephen M. Cameron 		bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
7456edd16368SStephen M. Cameron 		if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
7457edd16368SStephen M. Cameron 			offset += 4;
7458edd16368SStephen M. Cameron 		else {
7459edd16368SStephen M. Cameron 			mem_type = pci_resource_flags(pdev, i) &
7460edd16368SStephen M. Cameron 			    PCI_BASE_ADDRESS_MEM_TYPE_MASK;
7461edd16368SStephen M. Cameron 			switch (mem_type) {
7462edd16368SStephen M. Cameron 			case PCI_BASE_ADDRESS_MEM_TYPE_32:
7463edd16368SStephen M. Cameron 			case PCI_BASE_ADDRESS_MEM_TYPE_1M:
7464edd16368SStephen M. Cameron 				offset += 4;	/* 32 bit */
7465edd16368SStephen M. Cameron 				break;
7466edd16368SStephen M. Cameron 			case PCI_BASE_ADDRESS_MEM_TYPE_64:
7467edd16368SStephen M. Cameron 				offset += 8;
7468edd16368SStephen M. Cameron 				break;
7469edd16368SStephen M. Cameron 			default:	/* reserved in PCI 2.2 */
7470edd16368SStephen M. Cameron 				dev_warn(&pdev->dev,
7471edd16368SStephen M. Cameron 				       "base address is invalid\n");
7472edd16368SStephen M. Cameron 				return -1;
7473edd16368SStephen M. Cameron 			}
7474edd16368SStephen M. Cameron 		}
7475edd16368SStephen M. Cameron 		if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
7476edd16368SStephen M. Cameron 			return i + 1;
7477edd16368SStephen M. Cameron 	}
7478edd16368SStephen M. Cameron 	return -1;
7479edd16368SStephen M. Cameron }
7480edd16368SStephen M. Cameron 
7481cc64c817SRobert Elliott static void hpsa_disable_interrupt_mode(struct ctlr_info *h)
7482cc64c817SRobert Elliott {
7483bc2bb154SChristoph Hellwig 	pci_free_irq_vectors(h->pdev);
7484bc2bb154SChristoph Hellwig 	h->msix_vectors = 0;
7485cc64c817SRobert Elliott }
7486cc64c817SRobert Elliott 
74878b834bffSMing Lei static void hpsa_setup_reply_map(struct ctlr_info *h)
74888b834bffSMing Lei {
74898b834bffSMing Lei 	const struct cpumask *mask;
74908b834bffSMing Lei 	unsigned int queue, cpu;
74918b834bffSMing Lei 
74928b834bffSMing Lei 	for (queue = 0; queue < h->msix_vectors; queue++) {
74938b834bffSMing Lei 		mask = pci_irq_get_affinity(h->pdev, queue);
74948b834bffSMing Lei 		if (!mask)
74958b834bffSMing Lei 			goto fallback;
74968b834bffSMing Lei 
74978b834bffSMing Lei 		for_each_cpu(cpu, mask)
74988b834bffSMing Lei 			h->reply_map[cpu] = queue;
74998b834bffSMing Lei 	}
75008b834bffSMing Lei 	return;
75018b834bffSMing Lei 
75028b834bffSMing Lei fallback:
75038b834bffSMing Lei 	for_each_possible_cpu(cpu)
75048b834bffSMing Lei 		h->reply_map[cpu] = 0;
75058b834bffSMing Lei }
75068b834bffSMing Lei 
7507edd16368SStephen M. Cameron /* If MSI/MSI-X is supported by the kernel we will try to enable it on
7508050f7147SStephen Cameron  * controllers that are capable. If not, we use legacy INTx mode.
7509edd16368SStephen M. Cameron  */
7510bc2bb154SChristoph Hellwig static int hpsa_interrupt_mode(struct ctlr_info *h)
7511edd16368SStephen M. Cameron {
7512bc2bb154SChristoph Hellwig 	unsigned int flags = PCI_IRQ_LEGACY;
7513bc2bb154SChristoph Hellwig 	int ret;
7514edd16368SStephen M. Cameron 
7515edd16368SStephen M. Cameron 	/* Some boards advertise MSI but don't really support it */
7516bc2bb154SChristoph Hellwig 	switch (h->board_id) {
7517bc2bb154SChristoph Hellwig 	case 0x40700E11:
7518bc2bb154SChristoph Hellwig 	case 0x40800E11:
7519bc2bb154SChristoph Hellwig 	case 0x40820E11:
7520bc2bb154SChristoph Hellwig 	case 0x40830E11:
7521bc2bb154SChristoph Hellwig 		break;
7522bc2bb154SChristoph Hellwig 	default:
7523bc2bb154SChristoph Hellwig 		ret = pci_alloc_irq_vectors(h->pdev, 1, MAX_REPLY_QUEUES,
7524bc2bb154SChristoph Hellwig 				PCI_IRQ_MSIX | PCI_IRQ_AFFINITY);
7525bc2bb154SChristoph Hellwig 		if (ret > 0) {
7526bc2bb154SChristoph Hellwig 			h->msix_vectors = ret;
7527bc2bb154SChristoph Hellwig 			return 0;
7528eee0f03aSHannes Reinecke 		}
7529bc2bb154SChristoph Hellwig 
7530bc2bb154SChristoph Hellwig 		flags |= PCI_IRQ_MSI;
7531bc2bb154SChristoph Hellwig 		break;
7532edd16368SStephen M. Cameron 	}
7533bc2bb154SChristoph Hellwig 
7534bc2bb154SChristoph Hellwig 	ret = pci_alloc_irq_vectors(h->pdev, 1, 1, flags);
7535bc2bb154SChristoph Hellwig 	if (ret < 0)
7536bc2bb154SChristoph Hellwig 		return ret;
7537bc2bb154SChristoph Hellwig 	return 0;
7538edd16368SStephen M. Cameron }
7539edd16368SStephen M. Cameron 
7540135ae6edSHannes Reinecke static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id,
7541135ae6edSHannes Reinecke 				bool *legacy_board)
7542e5c880d1SStephen M. Cameron {
7543e5c880d1SStephen M. Cameron 	int i;
7544e5c880d1SStephen M. Cameron 	u32 subsystem_vendor_id, subsystem_device_id;
7545e5c880d1SStephen M. Cameron 
7546e5c880d1SStephen M. Cameron 	subsystem_vendor_id = pdev->subsystem_vendor;
7547e5c880d1SStephen M. Cameron 	subsystem_device_id = pdev->subsystem_device;
7548e5c880d1SStephen M. Cameron 	*board_id = ((subsystem_device_id << 16) & 0xffff0000) |
7549e5c880d1SStephen M. Cameron 		    subsystem_vendor_id;
7550e5c880d1SStephen M. Cameron 
7551135ae6edSHannes Reinecke 	if (legacy_board)
7552135ae6edSHannes Reinecke 		*legacy_board = false;
7553e5c880d1SStephen M. Cameron 	for (i = 0; i < ARRAY_SIZE(products); i++)
7554135ae6edSHannes Reinecke 		if (*board_id == products[i].board_id) {
7555135ae6edSHannes Reinecke 			if (products[i].access != &SA5A_access &&
7556135ae6edSHannes Reinecke 			    products[i].access != &SA5B_access)
7557e5c880d1SStephen M. Cameron 				return i;
7558135ae6edSHannes Reinecke 			dev_warn(&pdev->dev,
7559135ae6edSHannes Reinecke 				 "legacy board ID: 0x%08x\n",
7560135ae6edSHannes Reinecke 				 *board_id);
7561135ae6edSHannes Reinecke 			if (legacy_board)
7562135ae6edSHannes Reinecke 			    *legacy_board = true;
7563135ae6edSHannes Reinecke 			return i;
7564135ae6edSHannes Reinecke 		}
7565e5c880d1SStephen M. Cameron 
7566c8cd71f1SHannes Reinecke 	dev_warn(&pdev->dev, "unrecognized board ID: 0x%08x\n", *board_id);
7567135ae6edSHannes Reinecke 	if (legacy_board)
7568135ae6edSHannes Reinecke 		*legacy_board = true;
7569e5c880d1SStephen M. Cameron 	return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
7570e5c880d1SStephen M. Cameron }
7571e5c880d1SStephen M. Cameron 
75726f039790SGreg Kroah-Hartman static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
75733a7774ceSStephen M. Cameron 				    unsigned long *memory_bar)
75743a7774ceSStephen M. Cameron {
75753a7774ceSStephen M. Cameron 	int i;
75763a7774ceSStephen M. Cameron 
75773a7774ceSStephen M. Cameron 	for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
757812d2cd47SStephen M. Cameron 		if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
75793a7774ceSStephen M. Cameron 			/* addressing mode bits already removed */
758012d2cd47SStephen M. Cameron 			*memory_bar = pci_resource_start(pdev, i);
758112d2cd47SStephen M. Cameron 			dev_dbg(&pdev->dev, "memory BAR = %lx\n",
75823a7774ceSStephen M. Cameron 				*memory_bar);
75833a7774ceSStephen M. Cameron 			return 0;
75843a7774ceSStephen M. Cameron 		}
758512d2cd47SStephen M. Cameron 	dev_warn(&pdev->dev, "no memory BAR found\n");
75863a7774ceSStephen M. Cameron 	return -ENODEV;
75873a7774ceSStephen M. Cameron }
75883a7774ceSStephen M. Cameron 
75896f039790SGreg Kroah-Hartman static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
75906f039790SGreg Kroah-Hartman 				     int wait_for_ready)
75912c4c8c8bSStephen M. Cameron {
7592fe5389c8SStephen M. Cameron 	int i, iterations;
75932c4c8c8bSStephen M. Cameron 	u32 scratchpad;
7594fe5389c8SStephen M. Cameron 	if (wait_for_ready)
7595fe5389c8SStephen M. Cameron 		iterations = HPSA_BOARD_READY_ITERATIONS;
7596fe5389c8SStephen M. Cameron 	else
7597fe5389c8SStephen M. Cameron 		iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
75982c4c8c8bSStephen M. Cameron 
7599fe5389c8SStephen M. Cameron 	for (i = 0; i < iterations; i++) {
7600fe5389c8SStephen M. Cameron 		scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
7601fe5389c8SStephen M. Cameron 		if (wait_for_ready) {
76022c4c8c8bSStephen M. Cameron 			if (scratchpad == HPSA_FIRMWARE_READY)
76032c4c8c8bSStephen M. Cameron 				return 0;
7604fe5389c8SStephen M. Cameron 		} else {
7605fe5389c8SStephen M. Cameron 			if (scratchpad != HPSA_FIRMWARE_READY)
7606fe5389c8SStephen M. Cameron 				return 0;
7607fe5389c8SStephen M. Cameron 		}
76082c4c8c8bSStephen M. Cameron 		msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
76092c4c8c8bSStephen M. Cameron 	}
7610fe5389c8SStephen M. Cameron 	dev_warn(&pdev->dev, "board not ready, timed out.\n");
76112c4c8c8bSStephen M. Cameron 	return -ENODEV;
76122c4c8c8bSStephen M. Cameron }
76132c4c8c8bSStephen M. Cameron 
76146f039790SGreg Kroah-Hartman static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
76156f039790SGreg Kroah-Hartman 			       u32 *cfg_base_addr, u64 *cfg_base_addr_index,
7616a51fd47fSStephen M. Cameron 			       u64 *cfg_offset)
7617a51fd47fSStephen M. Cameron {
7618a51fd47fSStephen M. Cameron 	*cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
7619a51fd47fSStephen M. Cameron 	*cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
7620a51fd47fSStephen M. Cameron 	*cfg_base_addr &= (u32) 0x0000ffff;
7621a51fd47fSStephen M. Cameron 	*cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
7622a51fd47fSStephen M. Cameron 	if (*cfg_base_addr_index == -1) {
7623a51fd47fSStephen M. Cameron 		dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
7624a51fd47fSStephen M. Cameron 		return -ENODEV;
7625a51fd47fSStephen M. Cameron 	}
7626a51fd47fSStephen M. Cameron 	return 0;
7627a51fd47fSStephen M. Cameron }
7628a51fd47fSStephen M. Cameron 
7629195f2c65SRobert Elliott static void hpsa_free_cfgtables(struct ctlr_info *h)
7630195f2c65SRobert Elliott {
7631105a3dbcSRobert Elliott 	if (h->transtable) {
7632195f2c65SRobert Elliott 		iounmap(h->transtable);
7633105a3dbcSRobert Elliott 		h->transtable = NULL;
7634105a3dbcSRobert Elliott 	}
7635105a3dbcSRobert Elliott 	if (h->cfgtable) {
7636195f2c65SRobert Elliott 		iounmap(h->cfgtable);
7637105a3dbcSRobert Elliott 		h->cfgtable = NULL;
7638105a3dbcSRobert Elliott 	}
7639195f2c65SRobert Elliott }
7640195f2c65SRobert Elliott 
7641195f2c65SRobert Elliott /* Find and map CISS config table and transfer table
7642195f2c65SRobert Elliott + * several items must be unmapped (freed) later
7643195f2c65SRobert Elliott + * */
76446f039790SGreg Kroah-Hartman static int hpsa_find_cfgtables(struct ctlr_info *h)
7645edd16368SStephen M. Cameron {
764601a02ffcSStephen M. Cameron 	u64 cfg_offset;
764701a02ffcSStephen M. Cameron 	u32 cfg_base_addr;
764801a02ffcSStephen M. Cameron 	u64 cfg_base_addr_index;
7649303932fdSDon Brace 	u32 trans_offset;
7650a51fd47fSStephen M. Cameron 	int rc;
765177c4495cSStephen M. Cameron 
7652a51fd47fSStephen M. Cameron 	rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
7653a51fd47fSStephen M. Cameron 		&cfg_base_addr_index, &cfg_offset);
7654a51fd47fSStephen M. Cameron 	if (rc)
7655a51fd47fSStephen M. Cameron 		return rc;
765677c4495cSStephen M. Cameron 	h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
7657a51fd47fSStephen M. Cameron 		       cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
7658cd3c81c4SRobert Elliott 	if (!h->cfgtable) {
7659cd3c81c4SRobert Elliott 		dev_err(&h->pdev->dev, "Failed mapping cfgtable\n");
766077c4495cSStephen M. Cameron 		return -ENOMEM;
7661cd3c81c4SRobert Elliott 	}
7662580ada3cSStephen M. Cameron 	rc = write_driver_ver_to_cfgtable(h->cfgtable);
7663580ada3cSStephen M. Cameron 	if (rc)
7664580ada3cSStephen M. Cameron 		return rc;
766577c4495cSStephen M. Cameron 	/* Find performant mode table. */
7666a51fd47fSStephen M. Cameron 	trans_offset = readl(&h->cfgtable->TransMethodOffset);
766777c4495cSStephen M. Cameron 	h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
766877c4495cSStephen M. Cameron 				cfg_base_addr_index)+cfg_offset+trans_offset,
766977c4495cSStephen M. Cameron 				sizeof(*h->transtable));
7670195f2c65SRobert Elliott 	if (!h->transtable) {
7671195f2c65SRobert Elliott 		dev_err(&h->pdev->dev, "Failed mapping transfer table\n");
7672195f2c65SRobert Elliott 		hpsa_free_cfgtables(h);
767377c4495cSStephen M. Cameron 		return -ENOMEM;
7674195f2c65SRobert Elliott 	}
767577c4495cSStephen M. Cameron 	return 0;
767677c4495cSStephen M. Cameron }
767777c4495cSStephen M. Cameron 
76786f039790SGreg Kroah-Hartman static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
7679cba3d38bSStephen M. Cameron {
768041ce4c35SStephen Cameron #define MIN_MAX_COMMANDS 16
768141ce4c35SStephen Cameron 	BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS);
768241ce4c35SStephen Cameron 
768341ce4c35SStephen Cameron 	h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands);
768472ceeaecSStephen M. Cameron 
768572ceeaecSStephen M. Cameron 	/* Limit commands in memory limited kdump scenario. */
768672ceeaecSStephen M. Cameron 	if (reset_devices && h->max_commands > 32)
768772ceeaecSStephen M. Cameron 		h->max_commands = 32;
768872ceeaecSStephen M. Cameron 
768941ce4c35SStephen Cameron 	if (h->max_commands < MIN_MAX_COMMANDS) {
769041ce4c35SStephen Cameron 		dev_warn(&h->pdev->dev,
769141ce4c35SStephen Cameron 			"Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n",
769241ce4c35SStephen Cameron 			h->max_commands,
769341ce4c35SStephen Cameron 			MIN_MAX_COMMANDS);
769441ce4c35SStephen Cameron 		h->max_commands = MIN_MAX_COMMANDS;
7695cba3d38bSStephen M. Cameron 	}
7696cba3d38bSStephen M. Cameron }
7697cba3d38bSStephen M. Cameron 
7698c7ee65b3SWebb Scales /* If the controller reports that the total max sg entries is greater than 512,
7699c7ee65b3SWebb Scales  * then we know that chained SG blocks work.  (Original smart arrays did not
7700c7ee65b3SWebb Scales  * support chained SG blocks and would return zero for max sg entries.)
7701c7ee65b3SWebb Scales  */
7702c7ee65b3SWebb Scales static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h)
7703c7ee65b3SWebb Scales {
7704c7ee65b3SWebb Scales 	return h->maxsgentries > 512;
7705c7ee65b3SWebb Scales }
7706c7ee65b3SWebb Scales 
7707b93d7536SStephen M. Cameron /* Interrogate the hardware for some limits:
7708b93d7536SStephen M. Cameron  * max commands, max SG elements without chaining, and with chaining,
7709b93d7536SStephen M. Cameron  * SG chain block size, etc.
7710b93d7536SStephen M. Cameron  */
77116f039790SGreg Kroah-Hartman static void hpsa_find_board_params(struct ctlr_info *h)
7712b93d7536SStephen M. Cameron {
7713cba3d38bSStephen M. Cameron 	hpsa_get_max_perf_mode_cmds(h);
771445fcb86eSStephen Cameron 	h->nr_cmds = h->max_commands;
7715b93d7536SStephen M. Cameron 	h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
7716283b4a9bSStephen M. Cameron 	h->fw_support = readl(&(h->cfgtable->misc_fw_support));
7717c7ee65b3SWebb Scales 	if (hpsa_supports_chained_sg_blocks(h)) {
7718c7ee65b3SWebb Scales 		/* Limit in-command s/g elements to 32 save dma'able memory. */
7719b93d7536SStephen M. Cameron 		h->max_cmd_sg_entries = 32;
77201a63ea6fSWebb Scales 		h->chainsize = h->maxsgentries - h->max_cmd_sg_entries;
7721b93d7536SStephen M. Cameron 		h->maxsgentries--; /* save one for chain pointer */
7722b93d7536SStephen M. Cameron 	} else {
7723c7ee65b3SWebb Scales 		/*
7724c7ee65b3SWebb Scales 		 * Original smart arrays supported at most 31 s/g entries
7725c7ee65b3SWebb Scales 		 * embedded inline in the command (trying to use more
7726c7ee65b3SWebb Scales 		 * would lock up the controller)
7727c7ee65b3SWebb Scales 		 */
7728c7ee65b3SWebb Scales 		h->max_cmd_sg_entries = 31;
77291a63ea6fSWebb Scales 		h->maxsgentries = 31; /* default to traditional values */
7730c7ee65b3SWebb Scales 		h->chainsize = 0;
7731b93d7536SStephen M. Cameron 	}
773275167d2cSStephen M. Cameron 
773375167d2cSStephen M. Cameron 	/* Find out what task management functions are supported and cache */
773475167d2cSStephen M. Cameron 	h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags));
77350e7a7fceSScott Teel 	if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags))
77360e7a7fceSScott Teel 		dev_warn(&h->pdev->dev, "Physical aborts not supported\n");
77370e7a7fceSScott Teel 	if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
77380e7a7fceSScott Teel 		dev_warn(&h->pdev->dev, "Logical aborts not supported\n");
77398be986ccSStephen Cameron 	if (!(HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags))
77408be986ccSStephen Cameron 		dev_warn(&h->pdev->dev, "HP SSD Smart Path aborts not supported\n");
7741b93d7536SStephen M. Cameron }
7742b93d7536SStephen M. Cameron 
774376c46e49SStephen M. Cameron static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
774476c46e49SStephen M. Cameron {
77450fc9fd40SAkinobu Mita 	if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
7746050f7147SStephen Cameron 		dev_err(&h->pdev->dev, "not a valid CISS config table\n");
774776c46e49SStephen M. Cameron 		return false;
774876c46e49SStephen M. Cameron 	}
774976c46e49SStephen M. Cameron 	return true;
775076c46e49SStephen M. Cameron }
775176c46e49SStephen M. Cameron 
775297a5e98cSStephen M. Cameron static inline void hpsa_set_driver_support_bits(struct ctlr_info *h)
7753f7c39101SStephen M. Cameron {
775497a5e98cSStephen M. Cameron 	u32 driver_support;
7755f7c39101SStephen M. Cameron 
775697a5e98cSStephen M. Cameron 	driver_support = readl(&(h->cfgtable->driver_support));
77570b9e7b74SArnd Bergmann 	/* Need to enable prefetch in the SCSI core for 6400 in x86 */
77580b9e7b74SArnd Bergmann #ifdef CONFIG_X86
775997a5e98cSStephen M. Cameron 	driver_support |= ENABLE_SCSI_PREFETCH;
7760f7c39101SStephen M. Cameron #endif
776128e13446SStephen M. Cameron 	driver_support |= ENABLE_UNIT_ATTN;
776228e13446SStephen M. Cameron 	writel(driver_support, &(h->cfgtable->driver_support));
7763f7c39101SStephen M. Cameron }
7764f7c39101SStephen M. Cameron 
77653d0eab67SStephen M. Cameron /* Disable DMA prefetch for the P600.  Otherwise an ASIC bug may result
77663d0eab67SStephen M. Cameron  * in a prefetch beyond physical memory.
77673d0eab67SStephen M. Cameron  */
77683d0eab67SStephen M. Cameron static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
77693d0eab67SStephen M. Cameron {
77703d0eab67SStephen M. Cameron 	u32 dma_prefetch;
77713d0eab67SStephen M. Cameron 
77723d0eab67SStephen M. Cameron 	if (h->board_id != 0x3225103C)
77733d0eab67SStephen M. Cameron 		return;
77743d0eab67SStephen M. Cameron 	dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
77753d0eab67SStephen M. Cameron 	dma_prefetch |= 0x8000;
77763d0eab67SStephen M. Cameron 	writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
77773d0eab67SStephen M. Cameron }
77783d0eab67SStephen M. Cameron 
7779c706a795SRobert Elliott static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h)
778076438d08SStephen M. Cameron {
778176438d08SStephen M. Cameron 	int i;
778276438d08SStephen M. Cameron 	u32 doorbell_value;
778376438d08SStephen M. Cameron 	unsigned long flags;
778476438d08SStephen M. Cameron 	/* wait until the clear_event_notify bit 6 is cleared by controller. */
7785007e7aa9SRobert Elliott 	for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) {
778676438d08SStephen M. Cameron 		spin_lock_irqsave(&h->lock, flags);
778776438d08SStephen M. Cameron 		doorbell_value = readl(h->vaddr + SA5_DOORBELL);
778876438d08SStephen M. Cameron 		spin_unlock_irqrestore(&h->lock, flags);
778976438d08SStephen M. Cameron 		if (!(doorbell_value & DOORBELL_CLEAR_EVENTS))
7790c706a795SRobert Elliott 			goto done;
779176438d08SStephen M. Cameron 		/* delay and try again */
7792007e7aa9SRobert Elliott 		msleep(CLEAR_EVENT_WAIT_INTERVAL);
779376438d08SStephen M. Cameron 	}
7794c706a795SRobert Elliott 	return -ENODEV;
7795c706a795SRobert Elliott done:
7796c706a795SRobert Elliott 	return 0;
779776438d08SStephen M. Cameron }
779876438d08SStephen M. Cameron 
7799c706a795SRobert Elliott static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
7800eb6b2ae9SStephen M. Cameron {
7801eb6b2ae9SStephen M. Cameron 	int i;
78026eaf46fdSStephen M. Cameron 	u32 doorbell_value;
78036eaf46fdSStephen M. Cameron 	unsigned long flags;
7804eb6b2ae9SStephen M. Cameron 
7805eb6b2ae9SStephen M. Cameron 	/* under certain very rare conditions, this can take awhile.
7806eb6b2ae9SStephen M. Cameron 	 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
7807eb6b2ae9SStephen M. Cameron 	 * as we enter this code.)
7808eb6b2ae9SStephen M. Cameron 	 */
7809007e7aa9SRobert Elliott 	for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) {
781025163bd5SWebb Scales 		if (h->remove_in_progress)
781125163bd5SWebb Scales 			goto done;
78126eaf46fdSStephen M. Cameron 		spin_lock_irqsave(&h->lock, flags);
78136eaf46fdSStephen M. Cameron 		doorbell_value = readl(h->vaddr + SA5_DOORBELL);
78146eaf46fdSStephen M. Cameron 		spin_unlock_irqrestore(&h->lock, flags);
7815382be668SDan Carpenter 		if (!(doorbell_value & CFGTBL_ChangeReq))
7816c706a795SRobert Elliott 			goto done;
7817eb6b2ae9SStephen M. Cameron 		/* delay and try again */
7818007e7aa9SRobert Elliott 		msleep(MODE_CHANGE_WAIT_INTERVAL);
7819eb6b2ae9SStephen M. Cameron 	}
7820c706a795SRobert Elliott 	return -ENODEV;
7821c706a795SRobert Elliott done:
7822c706a795SRobert Elliott 	return 0;
78233f4336f3SStephen M. Cameron }
78243f4336f3SStephen M. Cameron 
7825c706a795SRobert Elliott /* return -ENODEV or other reason on error, 0 on success */
78266f039790SGreg Kroah-Hartman static int hpsa_enter_simple_mode(struct ctlr_info *h)
78273f4336f3SStephen M. Cameron {
78283f4336f3SStephen M. Cameron 	u32 trans_support;
78293f4336f3SStephen M. Cameron 
78303f4336f3SStephen M. Cameron 	trans_support = readl(&(h->cfgtable->TransportSupport));
78313f4336f3SStephen M. Cameron 	if (!(trans_support & SIMPLE_MODE))
78323f4336f3SStephen M. Cameron 		return -ENOTSUPP;
78333f4336f3SStephen M. Cameron 
78343f4336f3SStephen M. Cameron 	h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
7835283b4a9bSStephen M. Cameron 
78363f4336f3SStephen M. Cameron 	/* Update the field, and then ring the doorbell */
78373f4336f3SStephen M. Cameron 	writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
7838b9af4937SStephen M. Cameron 	writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
78393f4336f3SStephen M. Cameron 	writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
7840c706a795SRobert Elliott 	if (hpsa_wait_for_mode_change_ack(h))
7841c706a795SRobert Elliott 		goto error;
7842eb6b2ae9SStephen M. Cameron 	print_cfg_table(&h->pdev->dev, h->cfgtable);
7843283b4a9bSStephen M. Cameron 	if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple))
7844283b4a9bSStephen M. Cameron 		goto error;
7845960a30e7SStephen M. Cameron 	h->transMethod = CFGTBL_Trans_Simple;
7846eb6b2ae9SStephen M. Cameron 	return 0;
7847283b4a9bSStephen M. Cameron error:
7848050f7147SStephen Cameron 	dev_err(&h->pdev->dev, "failed to enter simple mode\n");
7849283b4a9bSStephen M. Cameron 	return -ENODEV;
7850eb6b2ae9SStephen M. Cameron }
7851eb6b2ae9SStephen M. Cameron 
7852195f2c65SRobert Elliott /* free items allocated or mapped by hpsa_pci_init */
7853195f2c65SRobert Elliott static void hpsa_free_pci_init(struct ctlr_info *h)
7854195f2c65SRobert Elliott {
7855195f2c65SRobert Elliott 	hpsa_free_cfgtables(h);			/* pci_init 4 */
7856195f2c65SRobert Elliott 	iounmap(h->vaddr);			/* pci_init 3 */
7857105a3dbcSRobert Elliott 	h->vaddr = NULL;
7858195f2c65SRobert Elliott 	hpsa_disable_interrupt_mode(h);		/* pci_init 2 */
7859943a7021SRobert Elliott 	/*
7860943a7021SRobert Elliott 	 * call pci_disable_device before pci_release_regions per
7861bff9e34cSMauro Carvalho Chehab 	 * Documentation/driver-api/pci/pci.rst
7862943a7021SRobert Elliott 	 */
7863195f2c65SRobert Elliott 	pci_disable_device(h->pdev);		/* pci_init 1 */
7864943a7021SRobert Elliott 	pci_release_regions(h->pdev);		/* pci_init 2 */
7865195f2c65SRobert Elliott }
7866195f2c65SRobert Elliott 
7867195f2c65SRobert Elliott /* several items must be freed later */
78686f039790SGreg Kroah-Hartman static int hpsa_pci_init(struct ctlr_info *h)
786977c4495cSStephen M. Cameron {
7870eb6b2ae9SStephen M. Cameron 	int prod_index, err;
7871135ae6edSHannes Reinecke 	bool legacy_board;
7872edd16368SStephen M. Cameron 
7873135ae6edSHannes Reinecke 	prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id, &legacy_board);
7874e5c880d1SStephen M. Cameron 	if (prod_index < 0)
787560f923b9SRobert Elliott 		return prod_index;
7876e5c880d1SStephen M. Cameron 	h->product_name = products[prod_index].product_name;
7877e5c880d1SStephen M. Cameron 	h->access = *(products[prod_index].access);
7878135ae6edSHannes Reinecke 	h->legacy_board = legacy_board;
7879e5a44df8SMatthew Garrett 	pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
7880e5a44df8SMatthew Garrett 			       PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
7881e5a44df8SMatthew Garrett 
788255c06c71SStephen M. Cameron 	err = pci_enable_device(h->pdev);
7883edd16368SStephen M. Cameron 	if (err) {
7884195f2c65SRobert Elliott 		dev_err(&h->pdev->dev, "failed to enable PCI device\n");
7885943a7021SRobert Elliott 		pci_disable_device(h->pdev);
7886edd16368SStephen M. Cameron 		return err;
7887edd16368SStephen M. Cameron 	}
7888edd16368SStephen M. Cameron 
7889f79cfec6SStephen M. Cameron 	err = pci_request_regions(h->pdev, HPSA);
7890edd16368SStephen M. Cameron 	if (err) {
789155c06c71SStephen M. Cameron 		dev_err(&h->pdev->dev,
7892195f2c65SRobert Elliott 			"failed to obtain PCI resources\n");
7893943a7021SRobert Elliott 		pci_disable_device(h->pdev);
7894943a7021SRobert Elliott 		return err;
7895edd16368SStephen M. Cameron 	}
78964fa604e1SRobert Elliott 
78974fa604e1SRobert Elliott 	pci_set_master(h->pdev);
78984fa604e1SRobert Elliott 
7899bc2bb154SChristoph Hellwig 	err = hpsa_interrupt_mode(h);
7900bc2bb154SChristoph Hellwig 	if (err)
7901bc2bb154SChristoph Hellwig 		goto clean1;
79028b834bffSMing Lei 
79038b834bffSMing Lei 	/* setup mapping between CPU and reply queue */
79048b834bffSMing Lei 	hpsa_setup_reply_map(h);
79058b834bffSMing Lei 
790612d2cd47SStephen M. Cameron 	err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
79073a7774ceSStephen M. Cameron 	if (err)
7908195f2c65SRobert Elliott 		goto clean2;	/* intmode+region, pci */
7909edd16368SStephen M. Cameron 	h->vaddr = remap_pci_mem(h->paddr, 0x250);
7910204892e9SStephen M. Cameron 	if (!h->vaddr) {
7911195f2c65SRobert Elliott 		dev_err(&h->pdev->dev, "failed to remap PCI mem\n");
7912204892e9SStephen M. Cameron 		err = -ENOMEM;
7913195f2c65SRobert Elliott 		goto clean2;	/* intmode+region, pci */
7914204892e9SStephen M. Cameron 	}
7915fe5389c8SStephen M. Cameron 	err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
79162c4c8c8bSStephen M. Cameron 	if (err)
7917195f2c65SRobert Elliott 		goto clean3;	/* vaddr, intmode+region, pci */
791877c4495cSStephen M. Cameron 	err = hpsa_find_cfgtables(h);
791977c4495cSStephen M. Cameron 	if (err)
7920195f2c65SRobert Elliott 		goto clean3;	/* vaddr, intmode+region, pci */
7921b93d7536SStephen M. Cameron 	hpsa_find_board_params(h);
7922edd16368SStephen M. Cameron 
792376c46e49SStephen M. Cameron 	if (!hpsa_CISS_signature_present(h)) {
7924edd16368SStephen M. Cameron 		err = -ENODEV;
7925195f2c65SRobert Elliott 		goto clean4;	/* cfgtables, vaddr, intmode+region, pci */
7926edd16368SStephen M. Cameron 	}
792797a5e98cSStephen M. Cameron 	hpsa_set_driver_support_bits(h);
79283d0eab67SStephen M. Cameron 	hpsa_p600_dma_prefetch_quirk(h);
7929eb6b2ae9SStephen M. Cameron 	err = hpsa_enter_simple_mode(h);
7930eb6b2ae9SStephen M. Cameron 	if (err)
7931195f2c65SRobert Elliott 		goto clean4;	/* cfgtables, vaddr, intmode+region, pci */
7932edd16368SStephen M. Cameron 	return 0;
7933edd16368SStephen M. Cameron 
7934195f2c65SRobert Elliott clean4:	/* cfgtables, vaddr, intmode+region, pci */
7935195f2c65SRobert Elliott 	hpsa_free_cfgtables(h);
7936195f2c65SRobert Elliott clean3:	/* vaddr, intmode+region, pci */
7937204892e9SStephen M. Cameron 	iounmap(h->vaddr);
7938105a3dbcSRobert Elliott 	h->vaddr = NULL;
7939195f2c65SRobert Elliott clean2:	/* intmode+region, pci */
7940195f2c65SRobert Elliott 	hpsa_disable_interrupt_mode(h);
7941bc2bb154SChristoph Hellwig clean1:
7942943a7021SRobert Elliott 	/*
7943943a7021SRobert Elliott 	 * call pci_disable_device before pci_release_regions per
7944bff9e34cSMauro Carvalho Chehab 	 * Documentation/driver-api/pci/pci.rst
7945943a7021SRobert Elliott 	 */
7946195f2c65SRobert Elliott 	pci_disable_device(h->pdev);
7947943a7021SRobert Elliott 	pci_release_regions(h->pdev);
7948edd16368SStephen M. Cameron 	return err;
7949edd16368SStephen M. Cameron }
7950edd16368SStephen M. Cameron 
79516f039790SGreg Kroah-Hartman static void hpsa_hba_inquiry(struct ctlr_info *h)
7952339b2b14SStephen M. Cameron {
7953339b2b14SStephen M. Cameron 	int rc;
7954339b2b14SStephen M. Cameron 
7955339b2b14SStephen M. Cameron #define HBA_INQUIRY_BYTE_COUNT 64
7956339b2b14SStephen M. Cameron 	h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
7957339b2b14SStephen M. Cameron 	if (!h->hba_inquiry_data)
7958339b2b14SStephen M. Cameron 		return;
7959339b2b14SStephen M. Cameron 	rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
7960339b2b14SStephen M. Cameron 		h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
7961339b2b14SStephen M. Cameron 	if (rc != 0) {
7962339b2b14SStephen M. Cameron 		kfree(h->hba_inquiry_data);
7963339b2b14SStephen M. Cameron 		h->hba_inquiry_data = NULL;
7964339b2b14SStephen M. Cameron 	}
7965339b2b14SStephen M. Cameron }
7966339b2b14SStephen M. Cameron 
79676b6c1cd7STomas Henzl static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id)
7968edd16368SStephen M. Cameron {
79691df8552aSStephen M. Cameron 	int rc, i;
79703b747298STomas Henzl 	void __iomem *vaddr;
7971edd16368SStephen M. Cameron 
79724c2a8c40SStephen M. Cameron 	if (!reset_devices)
79734c2a8c40SStephen M. Cameron 		return 0;
79744c2a8c40SStephen M. Cameron 
7975132aa220STomas Henzl 	/* kdump kernel is loading, we don't know in which state is
7976132aa220STomas Henzl 	 * the pci interface. The dev->enable_cnt is equal zero
7977132aa220STomas Henzl 	 * so we call enable+disable, wait a while and switch it on.
7978132aa220STomas Henzl 	 */
7979132aa220STomas Henzl 	rc = pci_enable_device(pdev);
7980132aa220STomas Henzl 	if (rc) {
7981132aa220STomas Henzl 		dev_warn(&pdev->dev, "Failed to enable PCI device\n");
7982132aa220STomas Henzl 		return -ENODEV;
7983132aa220STomas Henzl 	}
7984132aa220STomas Henzl 	pci_disable_device(pdev);
7985132aa220STomas Henzl 	msleep(260);			/* a randomly chosen number */
7986132aa220STomas Henzl 	rc = pci_enable_device(pdev);
7987132aa220STomas Henzl 	if (rc) {
7988132aa220STomas Henzl 		dev_warn(&pdev->dev, "failed to enable device.\n");
7989132aa220STomas Henzl 		return -ENODEV;
7990132aa220STomas Henzl 	}
79914fa604e1SRobert Elliott 
7992859c75abSTomas Henzl 	pci_set_master(pdev);
79934fa604e1SRobert Elliott 
79943b747298STomas Henzl 	vaddr = pci_ioremap_bar(pdev, 0);
79953b747298STomas Henzl 	if (vaddr == NULL) {
79963b747298STomas Henzl 		rc = -ENOMEM;
79973b747298STomas Henzl 		goto out_disable;
79983b747298STomas Henzl 	}
79993b747298STomas Henzl 	writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET);
80003b747298STomas Henzl 	iounmap(vaddr);
80013b747298STomas Henzl 
80021df8552aSStephen M. Cameron 	/* Reset the controller with a PCI power-cycle or via doorbell */
80036b6c1cd7STomas Henzl 	rc = hpsa_kdump_hard_reset_controller(pdev, board_id);
8004edd16368SStephen M. Cameron 
80051df8552aSStephen M. Cameron 	/* -ENOTSUPP here means we cannot reset the controller
80061df8552aSStephen M. Cameron 	 * but it's already (and still) up and running in
800718867659SStephen M. Cameron 	 * "performant mode".  Or, it might be 640x, which can't reset
800818867659SStephen M. Cameron 	 * due to concerns about shared bbwc between 6402/6404 pair.
80091df8552aSStephen M. Cameron 	 */
8010adf1b3a3SRobert Elliott 	if (rc)
8011132aa220STomas Henzl 		goto out_disable;
8012edd16368SStephen M. Cameron 
8013edd16368SStephen M. Cameron 	/* Now try to get the controller to respond to a no-op */
80141ba66c9cSRobert Elliott 	dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n");
8015edd16368SStephen M. Cameron 	for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
8016edd16368SStephen M. Cameron 		if (hpsa_noop(pdev) == 0)
8017edd16368SStephen M. Cameron 			break;
8018edd16368SStephen M. Cameron 		else
8019edd16368SStephen M. Cameron 			dev_warn(&pdev->dev, "no-op failed%s\n",
8020edd16368SStephen M. Cameron 					(i < 11 ? "; re-trying" : ""));
8021edd16368SStephen M. Cameron 	}
8022132aa220STomas Henzl 
8023132aa220STomas Henzl out_disable:
8024132aa220STomas Henzl 
8025132aa220STomas Henzl 	pci_disable_device(pdev);
8026132aa220STomas Henzl 	return rc;
8027edd16368SStephen M. Cameron }
8028edd16368SStephen M. Cameron 
80291fb7c98aSRobert Elliott static void hpsa_free_cmd_pool(struct ctlr_info *h)
80301fb7c98aSRobert Elliott {
80311fb7c98aSRobert Elliott 	kfree(h->cmd_pool_bits);
8032105a3dbcSRobert Elliott 	h->cmd_pool_bits = NULL;
8033105a3dbcSRobert Elliott 	if (h->cmd_pool) {
80348bc8f47eSChristoph Hellwig 		dma_free_coherent(&h->pdev->dev,
80351fb7c98aSRobert Elliott 				h->nr_cmds * sizeof(struct CommandList),
80361fb7c98aSRobert Elliott 				h->cmd_pool,
80371fb7c98aSRobert Elliott 				h->cmd_pool_dhandle);
8038105a3dbcSRobert Elliott 		h->cmd_pool = NULL;
8039105a3dbcSRobert Elliott 		h->cmd_pool_dhandle = 0;
8040105a3dbcSRobert Elliott 	}
8041105a3dbcSRobert Elliott 	if (h->errinfo_pool) {
80428bc8f47eSChristoph Hellwig 		dma_free_coherent(&h->pdev->dev,
80431fb7c98aSRobert Elliott 				h->nr_cmds * sizeof(struct ErrorInfo),
80441fb7c98aSRobert Elliott 				h->errinfo_pool,
80451fb7c98aSRobert Elliott 				h->errinfo_pool_dhandle);
8046105a3dbcSRobert Elliott 		h->errinfo_pool = NULL;
8047105a3dbcSRobert Elliott 		h->errinfo_pool_dhandle = 0;
8048105a3dbcSRobert Elliott 	}
80491fb7c98aSRobert Elliott }
80501fb7c98aSRobert Elliott 
8051d37ffbe4SRobert Elliott static int hpsa_alloc_cmd_pool(struct ctlr_info *h)
80522e9d1b36SStephen M. Cameron {
80536396bb22SKees Cook 	h->cmd_pool_bits = kcalloc(DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG),
80546396bb22SKees Cook 				   sizeof(unsigned long),
80556396bb22SKees Cook 				   GFP_KERNEL);
80568bc8f47eSChristoph Hellwig 	h->cmd_pool = dma_alloc_coherent(&h->pdev->dev,
80572e9d1b36SStephen M. Cameron 		    h->nr_cmds * sizeof(*h->cmd_pool),
80588bc8f47eSChristoph Hellwig 		    &h->cmd_pool_dhandle, GFP_KERNEL);
80598bc8f47eSChristoph Hellwig 	h->errinfo_pool = dma_alloc_coherent(&h->pdev->dev,
80602e9d1b36SStephen M. Cameron 		    h->nr_cmds * sizeof(*h->errinfo_pool),
80618bc8f47eSChristoph Hellwig 		    &h->errinfo_pool_dhandle, GFP_KERNEL);
80622e9d1b36SStephen M. Cameron 	if ((h->cmd_pool_bits == NULL)
80632e9d1b36SStephen M. Cameron 	    || (h->cmd_pool == NULL)
80642e9d1b36SStephen M. Cameron 	    || (h->errinfo_pool == NULL)) {
80652e9d1b36SStephen M. Cameron 		dev_err(&h->pdev->dev, "out of memory in %s", __func__);
80662c143342SRobert Elliott 		goto clean_up;
80672e9d1b36SStephen M. Cameron 	}
8068360c73bdSStephen Cameron 	hpsa_preinitialize_commands(h);
80692e9d1b36SStephen M. Cameron 	return 0;
80702c143342SRobert Elliott clean_up:
80712c143342SRobert Elliott 	hpsa_free_cmd_pool(h);
80722c143342SRobert Elliott 	return -ENOMEM;
80732e9d1b36SStephen M. Cameron }
80742e9d1b36SStephen M. Cameron 
8075ec501a18SRobert Elliott /* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */
8076ec501a18SRobert Elliott static void hpsa_free_irqs(struct ctlr_info *h)
8077ec501a18SRobert Elliott {
8078ec501a18SRobert Elliott 	int i;
8079a68fdb3aSDon Brace 	int irq_vector = 0;
8080a68fdb3aSDon Brace 
8081a68fdb3aSDon Brace 	if (hpsa_simple_mode)
8082a68fdb3aSDon Brace 		irq_vector = h->intr_mode;
8083ec501a18SRobert Elliott 
8084bc2bb154SChristoph Hellwig 	if (!h->msix_vectors || h->intr_mode != PERF_MODE_INT) {
8085ec501a18SRobert Elliott 		/* Single reply queue, only one irq to free */
8086a68fdb3aSDon Brace 		free_irq(pci_irq_vector(h->pdev, irq_vector),
8087a68fdb3aSDon Brace 				&h->q[h->intr_mode]);
8088bc2bb154SChristoph Hellwig 		h->q[h->intr_mode] = 0;
8089ec501a18SRobert Elliott 		return;
8090ec501a18SRobert Elliott 	}
8091ec501a18SRobert Elliott 
8092bc2bb154SChristoph Hellwig 	for (i = 0; i < h->msix_vectors; i++) {
8093bc2bb154SChristoph Hellwig 		free_irq(pci_irq_vector(h->pdev, i), &h->q[i]);
8094105a3dbcSRobert Elliott 		h->q[i] = 0;
8095ec501a18SRobert Elliott 	}
8096a4e17fc1SRobert Elliott 	for (; i < MAX_REPLY_QUEUES; i++)
8097a4e17fc1SRobert Elliott 		h->q[i] = 0;
8098ec501a18SRobert Elliott }
8099ec501a18SRobert Elliott 
81009ee61794SRobert Elliott /* returns 0 on success; cleans up and returns -Enn on error */
81019ee61794SRobert Elliott static int hpsa_request_irqs(struct ctlr_info *h,
81020ae01a32SStephen M. Cameron 	irqreturn_t (*msixhandler)(int, void *),
81030ae01a32SStephen M. Cameron 	irqreturn_t (*intxhandler)(int, void *))
81040ae01a32SStephen M. Cameron {
8105254f796bSMatt Gates 	int rc, i;
8106a68fdb3aSDon Brace 	int irq_vector = 0;
8107a68fdb3aSDon Brace 
8108a68fdb3aSDon Brace 	if (hpsa_simple_mode)
8109a68fdb3aSDon Brace 		irq_vector = h->intr_mode;
81100ae01a32SStephen M. Cameron 
8111254f796bSMatt Gates 	/*
8112254f796bSMatt Gates 	 * initialize h->q[x] = x so that interrupt handlers know which
8113254f796bSMatt Gates 	 * queue to process.
8114254f796bSMatt Gates 	 */
8115254f796bSMatt Gates 	for (i = 0; i < MAX_REPLY_QUEUES; i++)
8116254f796bSMatt Gates 		h->q[i] = (u8) i;
8117254f796bSMatt Gates 
8118bc2bb154SChristoph Hellwig 	if (h->intr_mode == PERF_MODE_INT && h->msix_vectors > 0) {
8119254f796bSMatt Gates 		/* If performant mode and MSI-X, use multiple reply queues */
8120bc2bb154SChristoph Hellwig 		for (i = 0; i < h->msix_vectors; i++) {
81218b47004aSRobert Elliott 			sprintf(h->intrname[i], "%s-msix%d", h->devname, i);
8122bc2bb154SChristoph Hellwig 			rc = request_irq(pci_irq_vector(h->pdev, i), msixhandler,
81238b47004aSRobert Elliott 					0, h->intrname[i],
8124254f796bSMatt Gates 					&h->q[i]);
8125a4e17fc1SRobert Elliott 			if (rc) {
8126a4e17fc1SRobert Elliott 				int j;
8127a4e17fc1SRobert Elliott 
8128a4e17fc1SRobert Elliott 				dev_err(&h->pdev->dev,
8129a4e17fc1SRobert Elliott 					"failed to get irq %d for %s\n",
8130bc2bb154SChristoph Hellwig 				       pci_irq_vector(h->pdev, i), h->devname);
8131a4e17fc1SRobert Elliott 				for (j = 0; j < i; j++) {
8132bc2bb154SChristoph Hellwig 					free_irq(pci_irq_vector(h->pdev, j), &h->q[j]);
8133a4e17fc1SRobert Elliott 					h->q[j] = 0;
8134a4e17fc1SRobert Elliott 				}
8135a4e17fc1SRobert Elliott 				for (; j < MAX_REPLY_QUEUES; j++)
8136a4e17fc1SRobert Elliott 					h->q[j] = 0;
8137a4e17fc1SRobert Elliott 				return rc;
8138a4e17fc1SRobert Elliott 			}
8139a4e17fc1SRobert Elliott 		}
8140254f796bSMatt Gates 	} else {
8141254f796bSMatt Gates 		/* Use single reply pool */
8142bc2bb154SChristoph Hellwig 		if (h->msix_vectors > 0 || h->pdev->msi_enabled) {
8143bc2bb154SChristoph Hellwig 			sprintf(h->intrname[0], "%s-msi%s", h->devname,
8144bc2bb154SChristoph Hellwig 				h->msix_vectors ? "x" : "");
8145a68fdb3aSDon Brace 			rc = request_irq(pci_irq_vector(h->pdev, irq_vector),
81468b47004aSRobert Elliott 				msixhandler, 0,
8147bc2bb154SChristoph Hellwig 				h->intrname[0],
8148254f796bSMatt Gates 				&h->q[h->intr_mode]);
8149254f796bSMatt Gates 		} else {
81508b47004aSRobert Elliott 			sprintf(h->intrname[h->intr_mode],
81518b47004aSRobert Elliott 				"%s-intx", h->devname);
8152a68fdb3aSDon Brace 			rc = request_irq(pci_irq_vector(h->pdev, irq_vector),
81538b47004aSRobert Elliott 				intxhandler, IRQF_SHARED,
8154bc2bb154SChristoph Hellwig 				h->intrname[0],
8155254f796bSMatt Gates 				&h->q[h->intr_mode]);
8156254f796bSMatt Gates 		}
8157254f796bSMatt Gates 	}
81580ae01a32SStephen M. Cameron 	if (rc) {
8159195f2c65SRobert Elliott 		dev_err(&h->pdev->dev, "failed to get irq %d for %s\n",
8160a68fdb3aSDon Brace 		       pci_irq_vector(h->pdev, irq_vector), h->devname);
8161195f2c65SRobert Elliott 		hpsa_free_irqs(h);
81620ae01a32SStephen M. Cameron 		return -ENODEV;
81630ae01a32SStephen M. Cameron 	}
81640ae01a32SStephen M. Cameron 	return 0;
81650ae01a32SStephen M. Cameron }
81660ae01a32SStephen M. Cameron 
81676f039790SGreg Kroah-Hartman static int hpsa_kdump_soft_reset(struct ctlr_info *h)
816864670ac8SStephen M. Cameron {
816939c53f55SRobert Elliott 	int rc;
8170c5dfd106SDon Brace 	hpsa_send_host_reset(h, HPSA_RESET_TYPE_CONTROLLER);
817164670ac8SStephen M. Cameron 
817264670ac8SStephen M. Cameron 	dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
817339c53f55SRobert Elliott 	rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY);
817439c53f55SRobert Elliott 	if (rc) {
817564670ac8SStephen M. Cameron 		dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
817639c53f55SRobert Elliott 		return rc;
817764670ac8SStephen M. Cameron 	}
817864670ac8SStephen M. Cameron 
817964670ac8SStephen M. Cameron 	dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
818039c53f55SRobert Elliott 	rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
818139c53f55SRobert Elliott 	if (rc) {
818264670ac8SStephen M. Cameron 		dev_warn(&h->pdev->dev, "Board failed to become ready "
818364670ac8SStephen M. Cameron 			"after soft reset.\n");
818439c53f55SRobert Elliott 		return rc;
818564670ac8SStephen M. Cameron 	}
818664670ac8SStephen M. Cameron 
818764670ac8SStephen M. Cameron 	return 0;
818864670ac8SStephen M. Cameron }
818964670ac8SStephen M. Cameron 
8190072b0518SStephen M. Cameron static void hpsa_free_reply_queues(struct ctlr_info *h)
8191072b0518SStephen M. Cameron {
8192072b0518SStephen M. Cameron 	int i;
8193072b0518SStephen M. Cameron 
8194072b0518SStephen M. Cameron 	for (i = 0; i < h->nreply_queues; i++) {
8195072b0518SStephen M. Cameron 		if (!h->reply_queue[i].head)
8196072b0518SStephen M. Cameron 			continue;
81978bc8f47eSChristoph Hellwig 		dma_free_coherent(&h->pdev->dev,
81981fb7c98aSRobert Elliott 					h->reply_queue_size,
81991fb7c98aSRobert Elliott 					h->reply_queue[i].head,
82001fb7c98aSRobert Elliott 					h->reply_queue[i].busaddr);
8201072b0518SStephen M. Cameron 		h->reply_queue[i].head = NULL;
8202072b0518SStephen M. Cameron 		h->reply_queue[i].busaddr = 0;
8203072b0518SStephen M. Cameron 	}
8204105a3dbcSRobert Elliott 	h->reply_queue_size = 0;
8205072b0518SStephen M. Cameron }
8206072b0518SStephen M. Cameron 
82070097f0f4SStephen M. Cameron static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
82080097f0f4SStephen M. Cameron {
8209105a3dbcSRobert Elliott 	hpsa_free_performant_mode(h);		/* init_one 7 */
8210105a3dbcSRobert Elliott 	hpsa_free_sg_chain_blocks(h);		/* init_one 6 */
8211105a3dbcSRobert Elliott 	hpsa_free_cmd_pool(h);			/* init_one 5 */
8212105a3dbcSRobert Elliott 	hpsa_free_irqs(h);			/* init_one 4 */
82132946e82bSRobert Elliott 	scsi_host_put(h->scsi_host);		/* init_one 3 */
82142946e82bSRobert Elliott 	h->scsi_host = NULL;			/* init_one 3 */
82152946e82bSRobert Elliott 	hpsa_free_pci_init(h);			/* init_one 2_5 */
82169ecd953aSRobert Elliott 	free_percpu(h->lockup_detected);	/* init_one 2 */
82179ecd953aSRobert Elliott 	h->lockup_detected = NULL;		/* init_one 2 */
82189ecd953aSRobert Elliott 	if (h->resubmit_wq) {
82199ecd953aSRobert Elliott 		destroy_workqueue(h->resubmit_wq);	/* init_one 1 */
82209ecd953aSRobert Elliott 		h->resubmit_wq = NULL;
82219ecd953aSRobert Elliott 	}
82229ecd953aSRobert Elliott 	if (h->rescan_ctlr_wq) {
82239ecd953aSRobert Elliott 		destroy_workqueue(h->rescan_ctlr_wq);
82249ecd953aSRobert Elliott 		h->rescan_ctlr_wq = NULL;
82259ecd953aSRobert Elliott 	}
822601192088SDon Brace 	if (h->monitor_ctlr_wq) {
822701192088SDon Brace 		destroy_workqueue(h->monitor_ctlr_wq);
822801192088SDon Brace 		h->monitor_ctlr_wq = NULL;
822901192088SDon Brace 	}
823001192088SDon Brace 
8231105a3dbcSRobert Elliott 	kfree(h);				/* init_one 1 */
823264670ac8SStephen M. Cameron }
823364670ac8SStephen M. Cameron 
8234a0c12413SStephen M. Cameron /* Called when controller lockup detected. */
8235f2405db8SDon Brace static void fail_all_outstanding_cmds(struct ctlr_info *h)
8236a0c12413SStephen M. Cameron {
8237281a7fd0SWebb Scales 	int i, refcount;
8238281a7fd0SWebb Scales 	struct CommandList *c;
823925163bd5SWebb Scales 	int failcount = 0;
8240a0c12413SStephen M. Cameron 
8241080ef1ccSDon Brace 	flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */
8242f2405db8SDon Brace 	for (i = 0; i < h->nr_cmds; i++) {
8243f2405db8SDon Brace 		c = h->cmd_pool + i;
8244281a7fd0SWebb Scales 		refcount = atomic_inc_return(&c->refcount);
8245281a7fd0SWebb Scales 		if (refcount > 1) {
824625163bd5SWebb Scales 			c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
82475a3d16f5SStephen M. Cameron 			finish_cmd(c);
8248433b5f4dSStephen Cameron 			atomic_dec(&h->commands_outstanding);
824925163bd5SWebb Scales 			failcount++;
8250a0c12413SStephen M. Cameron 		}
8251281a7fd0SWebb Scales 		cmd_free(h, c);
8252281a7fd0SWebb Scales 	}
825325163bd5SWebb Scales 	dev_warn(&h->pdev->dev,
825425163bd5SWebb Scales 		"failed %d commands in fail_all\n", failcount);
8255a0c12413SStephen M. Cameron }
8256a0c12413SStephen M. Cameron 
8257094963daSStephen M. Cameron static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value)
8258094963daSStephen M. Cameron {
8259c8ed0010SRusty Russell 	int cpu;
8260094963daSStephen M. Cameron 
8261c8ed0010SRusty Russell 	for_each_online_cpu(cpu) {
8262094963daSStephen M. Cameron 		u32 *lockup_detected;
8263094963daSStephen M. Cameron 		lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
8264094963daSStephen M. Cameron 		*lockup_detected = value;
8265094963daSStephen M. Cameron 	}
8266094963daSStephen M. Cameron 	wmb(); /* be sure the per-cpu variables are out to memory */
8267094963daSStephen M. Cameron }
8268094963daSStephen M. Cameron 
8269a0c12413SStephen M. Cameron static void controller_lockup_detected(struct ctlr_info *h)
8270a0c12413SStephen M. Cameron {
8271a0c12413SStephen M. Cameron 	unsigned long flags;
8272094963daSStephen M. Cameron 	u32 lockup_detected;
8273a0c12413SStephen M. Cameron 
8274a0c12413SStephen M. Cameron 	h->access.set_intr_mask(h, HPSA_INTR_OFF);
8275a0c12413SStephen M. Cameron 	spin_lock_irqsave(&h->lock, flags);
8276094963daSStephen M. Cameron 	lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
8277094963daSStephen M. Cameron 	if (!lockup_detected) {
8278094963daSStephen M. Cameron 		/* no heartbeat, but controller gave us a zero. */
8279094963daSStephen M. Cameron 		dev_warn(&h->pdev->dev,
828025163bd5SWebb Scales 			"lockup detected after %d but scratchpad register is zero\n",
828125163bd5SWebb Scales 			h->heartbeat_sample_interval / HZ);
8282094963daSStephen M. Cameron 		lockup_detected = 0xffffffff;
8283094963daSStephen M. Cameron 	}
8284094963daSStephen M. Cameron 	set_lockup_detected_for_all_cpus(h, lockup_detected);
8285a0c12413SStephen M. Cameron 	spin_unlock_irqrestore(&h->lock, flags);
828625163bd5SWebb Scales 	dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n",
828725163bd5SWebb Scales 			lockup_detected, h->heartbeat_sample_interval / HZ);
8288b9b08cadSDon Brace 	if (lockup_detected == 0xffff0000) {
8289b9b08cadSDon Brace 		dev_warn(&h->pdev->dev, "Telling controller to do a CHKPT\n");
8290b9b08cadSDon Brace 		writel(DOORBELL_GENERATE_CHKPT, h->vaddr + SA5_DOORBELL);
8291b9b08cadSDon Brace 	}
8292a0c12413SStephen M. Cameron 	pci_disable_device(h->pdev);
8293f2405db8SDon Brace 	fail_all_outstanding_cmds(h);
8294a0c12413SStephen M. Cameron }
8295a0c12413SStephen M. Cameron 
829625163bd5SWebb Scales static int detect_controller_lockup(struct ctlr_info *h)
8297a0c12413SStephen M. Cameron {
8298a0c12413SStephen M. Cameron 	u64 now;
8299a0c12413SStephen M. Cameron 	u32 heartbeat;
8300a0c12413SStephen M. Cameron 	unsigned long flags;
8301a0c12413SStephen M. Cameron 
8302a0c12413SStephen M. Cameron 	now = get_jiffies_64();
8303a0c12413SStephen M. Cameron 	/* If we've received an interrupt recently, we're ok. */
8304a0c12413SStephen M. Cameron 	if (time_after64(h->last_intr_timestamp +
8305e85c5974SStephen M. Cameron 				(h->heartbeat_sample_interval), now))
830625163bd5SWebb Scales 		return false;
8307a0c12413SStephen M. Cameron 
8308a0c12413SStephen M. Cameron 	/*
8309a0c12413SStephen M. Cameron 	 * If we've already checked the heartbeat recently, we're ok.
8310a0c12413SStephen M. Cameron 	 * This could happen if someone sends us a signal. We
8311a0c12413SStephen M. Cameron 	 * otherwise don't care about signals in this thread.
8312a0c12413SStephen M. Cameron 	 */
8313a0c12413SStephen M. Cameron 	if (time_after64(h->last_heartbeat_timestamp +
8314e85c5974SStephen M. Cameron 				(h->heartbeat_sample_interval), now))
831525163bd5SWebb Scales 		return false;
8316a0c12413SStephen M. Cameron 
8317a0c12413SStephen M. Cameron 	/* If heartbeat has not changed since we last looked, we're not ok. */
8318a0c12413SStephen M. Cameron 	spin_lock_irqsave(&h->lock, flags);
8319a0c12413SStephen M. Cameron 	heartbeat = readl(&h->cfgtable->HeartBeat);
8320a0c12413SStephen M. Cameron 	spin_unlock_irqrestore(&h->lock, flags);
8321a0c12413SStephen M. Cameron 	if (h->last_heartbeat == heartbeat) {
8322a0c12413SStephen M. Cameron 		controller_lockup_detected(h);
832325163bd5SWebb Scales 		return true;
8324a0c12413SStephen M. Cameron 	}
8325a0c12413SStephen M. Cameron 
8326a0c12413SStephen M. Cameron 	/* We're ok. */
8327a0c12413SStephen M. Cameron 	h->last_heartbeat = heartbeat;
8328a0c12413SStephen M. Cameron 	h->last_heartbeat_timestamp = now;
832925163bd5SWebb Scales 	return false;
8330a0c12413SStephen M. Cameron }
8331a0c12413SStephen M. Cameron 
8332b2582a65SDon Brace /*
8333b2582a65SDon Brace  * Set ioaccel status for all ioaccel volumes.
8334b2582a65SDon Brace  *
8335b2582a65SDon Brace  * Called from monitor controller worker (hpsa_event_monitor_worker)
8336b2582a65SDon Brace  *
83373e16e83aSDon Brace  * A Volume (or Volumes that comprise an Array set) may be undergoing a
8338b2582a65SDon Brace  * transformation, so we will be turning off ioaccel for all volumes that
8339b2582a65SDon Brace  * make up the Array.
8340b2582a65SDon Brace  */
8341b2582a65SDon Brace static void hpsa_set_ioaccel_status(struct ctlr_info *h)
8342b2582a65SDon Brace {
8343b2582a65SDon Brace 	int rc;
8344b2582a65SDon Brace 	int i;
8345b2582a65SDon Brace 	u8 ioaccel_status;
8346b2582a65SDon Brace 	unsigned char *buf;
8347b2582a65SDon Brace 	struct hpsa_scsi_dev_t *device;
8348b2582a65SDon Brace 
8349b2582a65SDon Brace 	if (!h)
8350b2582a65SDon Brace 		return;
8351b2582a65SDon Brace 
8352b2582a65SDon Brace 	buf = kmalloc(64, GFP_KERNEL);
8353b2582a65SDon Brace 	if (!buf)
8354b2582a65SDon Brace 		return;
8355b2582a65SDon Brace 
8356b2582a65SDon Brace 	/*
8357b2582a65SDon Brace 	 * Run through current device list used during I/O requests.
8358b2582a65SDon Brace 	 */
8359b2582a65SDon Brace 	for (i = 0; i < h->ndevices; i++) {
83603e16e83aSDon Brace 		int offload_to_be_enabled = 0;
83613e16e83aSDon Brace 		int offload_config = 0;
83623e16e83aSDon Brace 
8363b2582a65SDon Brace 		device = h->dev[i];
8364b2582a65SDon Brace 
8365b2582a65SDon Brace 		if (!device)
8366b2582a65SDon Brace 			continue;
8367b2582a65SDon Brace 		if (!hpsa_vpd_page_supported(h, device->scsi3addr,
8368b2582a65SDon Brace 						HPSA_VPD_LV_IOACCEL_STATUS))
8369b2582a65SDon Brace 			continue;
8370b2582a65SDon Brace 
8371b2582a65SDon Brace 		memset(buf, 0, 64);
8372b2582a65SDon Brace 
8373b2582a65SDon Brace 		rc = hpsa_scsi_do_inquiry(h, device->scsi3addr,
8374b2582a65SDon Brace 					VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS,
8375b2582a65SDon Brace 					buf, 64);
8376b2582a65SDon Brace 		if (rc != 0)
8377b2582a65SDon Brace 			continue;
8378b2582a65SDon Brace 
8379b2582a65SDon Brace 		ioaccel_status = buf[IOACCEL_STATUS_BYTE];
83803e16e83aSDon Brace 
83813e16e83aSDon Brace 		/*
83823e16e83aSDon Brace 		 * Check if offload is still configured on
83833e16e83aSDon Brace 		 */
83843e16e83aSDon Brace 		offload_config =
8385b2582a65SDon Brace 				!!(ioaccel_status & OFFLOAD_CONFIGURED_BIT);
83863e16e83aSDon Brace 		/*
83873e16e83aSDon Brace 		 * If offload is configured on, check to see if ioaccel
83883e16e83aSDon Brace 		 * needs to be enabled.
83893e16e83aSDon Brace 		 */
83903e16e83aSDon Brace 		if (offload_config)
83913e16e83aSDon Brace 			offload_to_be_enabled =
8392b2582a65SDon Brace 				!!(ioaccel_status & OFFLOAD_ENABLED_BIT);
8393b2582a65SDon Brace 
8394b2582a65SDon Brace 		/*
83953e16e83aSDon Brace 		 * If ioaccel is to be re-enabled, re-enable later during the
83963e16e83aSDon Brace 		 * scan operation so the driver can get a fresh raidmap
83973e16e83aSDon Brace 		 * before turning ioaccel back on.
83983e16e83aSDon Brace 		 */
83993e16e83aSDon Brace 		if (offload_to_be_enabled)
84003e16e83aSDon Brace 			continue;
84013e16e83aSDon Brace 
84023e16e83aSDon Brace 		/*
8403b2582a65SDon Brace 		 * Immediately turn off ioaccel for any volume the
8404b2582a65SDon Brace 		 * controller tells us to. Some of the reasons could be:
8405b2582a65SDon Brace 		 *    transformation - change to the LVs of an Array.
8406b2582a65SDon Brace 		 *    degraded volume - component failure
8407b2582a65SDon Brace 		 */
84083e16e83aSDon Brace 		hpsa_turn_off_ioaccel_for_device(device);
8409b2582a65SDon Brace 	}
8410b2582a65SDon Brace 
8411b2582a65SDon Brace 	kfree(buf);
8412b2582a65SDon Brace }
8413b2582a65SDon Brace 
84149846590eSStephen M. Cameron static void hpsa_ack_ctlr_events(struct ctlr_info *h)
841576438d08SStephen M. Cameron {
841676438d08SStephen M. Cameron 	char *event_type;
841776438d08SStephen M. Cameron 
8418e4aa3e6aSStephen Cameron 	if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
8419e4aa3e6aSStephen Cameron 		return;
8420e4aa3e6aSStephen Cameron 
842176438d08SStephen M. Cameron 	/* Ask the controller to clear the events we're handling. */
84221f7cee8cSStephen M. Cameron 	if ((h->transMethod & (CFGTBL_Trans_io_accel1
84231f7cee8cSStephen M. Cameron 			| CFGTBL_Trans_io_accel2)) &&
842476438d08SStephen M. Cameron 		(h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE ||
842576438d08SStephen M. Cameron 		 h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) {
842676438d08SStephen M. Cameron 
842776438d08SStephen M. Cameron 		if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE)
842876438d08SStephen M. Cameron 			event_type = "state change";
842976438d08SStephen M. Cameron 		if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)
843076438d08SStephen M. Cameron 			event_type = "configuration change";
843176438d08SStephen M. Cameron 		/* Stop sending new RAID offload reqs via the IO accelerator */
843276438d08SStephen M. Cameron 		scsi_block_requests(h->scsi_host);
8433b2582a65SDon Brace 		hpsa_set_ioaccel_status(h);
843423100dd9SStephen M. Cameron 		hpsa_drain_accel_commands(h);
843576438d08SStephen M. Cameron 		/* Set 'accelerator path config change' bit */
843676438d08SStephen M. Cameron 		dev_warn(&h->pdev->dev,
843776438d08SStephen M. Cameron 			"Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n",
843876438d08SStephen M. Cameron 			h->events, event_type);
843976438d08SStephen M. Cameron 		writel(h->events, &(h->cfgtable->clear_event_notify));
844076438d08SStephen M. Cameron 		/* Set the "clear event notify field update" bit 6 */
844176438d08SStephen M. Cameron 		writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
844276438d08SStephen M. Cameron 		/* Wait until ctlr clears 'clear event notify field', bit 6 */
844376438d08SStephen M. Cameron 		hpsa_wait_for_clear_event_notify_ack(h);
844476438d08SStephen M. Cameron 		scsi_unblock_requests(h->scsi_host);
844576438d08SStephen M. Cameron 	} else {
844676438d08SStephen M. Cameron 		/* Acknowledge controller notification events. */
844776438d08SStephen M. Cameron 		writel(h->events, &(h->cfgtable->clear_event_notify));
844876438d08SStephen M. Cameron 		writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
844976438d08SStephen M. Cameron 		hpsa_wait_for_clear_event_notify_ack(h);
845076438d08SStephen M. Cameron 	}
84519846590eSStephen M. Cameron 	return;
845276438d08SStephen M. Cameron }
845376438d08SStephen M. Cameron 
845476438d08SStephen M. Cameron /* Check a register on the controller to see if there are configuration
845576438d08SStephen M. Cameron  * changes (added/changed/removed logical drives, etc.) which mean that
8456e863d68eSScott Teel  * we should rescan the controller for devices.
8457e863d68eSScott Teel  * Also check flag for driver-initiated rescan.
845876438d08SStephen M. Cameron  */
84599846590eSStephen M. Cameron static int hpsa_ctlr_needs_rescan(struct ctlr_info *h)
846076438d08SStephen M. Cameron {
8461853633e8SDon Brace 	if (h->drv_req_rescan) {
8462853633e8SDon Brace 		h->drv_req_rescan = 0;
8463853633e8SDon Brace 		return 1;
8464853633e8SDon Brace 	}
8465853633e8SDon Brace 
846676438d08SStephen M. Cameron 	if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
84679846590eSStephen M. Cameron 		return 0;
846876438d08SStephen M. Cameron 
846976438d08SStephen M. Cameron 	h->events = readl(&(h->cfgtable->event_notify));
84709846590eSStephen M. Cameron 	return h->events & RESCAN_REQUIRED_EVENT_BITS;
84719846590eSStephen M. Cameron }
847276438d08SStephen M. Cameron 
847376438d08SStephen M. Cameron /*
84749846590eSStephen M. Cameron  * Check if any of the offline devices have become ready
847576438d08SStephen M. Cameron  */
84769846590eSStephen M. Cameron static int hpsa_offline_devices_ready(struct ctlr_info *h)
84779846590eSStephen M. Cameron {
84789846590eSStephen M. Cameron 	unsigned long flags;
84799846590eSStephen M. Cameron 	struct offline_device_entry *d;
84809846590eSStephen M. Cameron 	struct list_head *this, *tmp;
84819846590eSStephen M. Cameron 
84829846590eSStephen M. Cameron 	spin_lock_irqsave(&h->offline_device_lock, flags);
84839846590eSStephen M. Cameron 	list_for_each_safe(this, tmp, &h->offline_device_list) {
84849846590eSStephen M. Cameron 		d = list_entry(this, struct offline_device_entry,
84859846590eSStephen M. Cameron 				offline_list);
84869846590eSStephen M. Cameron 		spin_unlock_irqrestore(&h->offline_device_lock, flags);
8487d1fea47cSStephen M. Cameron 		if (!hpsa_volume_offline(h, d->scsi3addr)) {
8488d1fea47cSStephen M. Cameron 			spin_lock_irqsave(&h->offline_device_lock, flags);
8489d1fea47cSStephen M. Cameron 			list_del(&d->offline_list);
8490d1fea47cSStephen M. Cameron 			spin_unlock_irqrestore(&h->offline_device_lock, flags);
84919846590eSStephen M. Cameron 			return 1;
8492d1fea47cSStephen M. Cameron 		}
84939846590eSStephen M. Cameron 		spin_lock_irqsave(&h->offline_device_lock, flags);
849476438d08SStephen M. Cameron 	}
84959846590eSStephen M. Cameron 	spin_unlock_irqrestore(&h->offline_device_lock, flags);
84969846590eSStephen M. Cameron 	return 0;
84979846590eSStephen M. Cameron }
84989846590eSStephen M. Cameron 
849934592254SScott Teel static int hpsa_luns_changed(struct ctlr_info *h)
850034592254SScott Teel {
850134592254SScott Teel 	int rc = 1; /* assume there are changes */
850234592254SScott Teel 	struct ReportLUNdata *logdev = NULL;
850334592254SScott Teel 
850434592254SScott Teel 	/* if we can't find out if lun data has changed,
850534592254SScott Teel 	 * assume that it has.
850634592254SScott Teel 	 */
850734592254SScott Teel 
850834592254SScott Teel 	if (!h->lastlogicals)
85097e8a9486SAmit Kushwaha 		return rc;
851034592254SScott Teel 
851134592254SScott Teel 	logdev = kzalloc(sizeof(*logdev), GFP_KERNEL);
85127e8a9486SAmit Kushwaha 	if (!logdev)
85137e8a9486SAmit Kushwaha 		return rc;
85147e8a9486SAmit Kushwaha 
851534592254SScott Teel 	if (hpsa_scsi_do_report_luns(h, 1, logdev, sizeof(*logdev), 0)) {
851634592254SScott Teel 		dev_warn(&h->pdev->dev,
851734592254SScott Teel 			"report luns failed, can't track lun changes.\n");
851834592254SScott Teel 		goto out;
851934592254SScott Teel 	}
852034592254SScott Teel 	if (memcmp(logdev, h->lastlogicals, sizeof(*logdev))) {
852134592254SScott Teel 		dev_info(&h->pdev->dev,
852234592254SScott Teel 			"Lun changes detected.\n");
852334592254SScott Teel 		memcpy(h->lastlogicals, logdev, sizeof(*logdev));
852434592254SScott Teel 		goto out;
852534592254SScott Teel 	} else
852634592254SScott Teel 		rc = 0; /* no changes detected. */
852734592254SScott Teel out:
852834592254SScott Teel 	kfree(logdev);
852934592254SScott Teel 	return rc;
853034592254SScott Teel }
853134592254SScott Teel 
85323d38f00cSScott Teel static void hpsa_perform_rescan(struct ctlr_info *h)
8533a0c12413SStephen M. Cameron {
85343d38f00cSScott Teel 	struct Scsi_Host *sh = NULL;
8535a0c12413SStephen M. Cameron 	unsigned long flags;
85369846590eSStephen M. Cameron 
8537bfd7546cSDon Brace 	/*
8538bfd7546cSDon Brace 	 * Do the scan after the reset
8539bfd7546cSDon Brace 	 */
8540c59d04f3SDon Brace 	spin_lock_irqsave(&h->reset_lock, flags);
8541bfd7546cSDon Brace 	if (h->reset_in_progress) {
8542bfd7546cSDon Brace 		h->drv_req_rescan = 1;
8543c59d04f3SDon Brace 		spin_unlock_irqrestore(&h->reset_lock, flags);
8544bfd7546cSDon Brace 		return;
8545bfd7546cSDon Brace 	}
8546c59d04f3SDon Brace 	spin_unlock_irqrestore(&h->reset_lock, flags);
8547bfd7546cSDon Brace 
854834592254SScott Teel 	sh = scsi_host_get(h->scsi_host);
854934592254SScott Teel 	if (sh != NULL) {
855034592254SScott Teel 		hpsa_scan_start(sh);
855134592254SScott Teel 		scsi_host_put(sh);
85523d38f00cSScott Teel 		h->drv_req_rescan = 0;
855334592254SScott Teel 	}
855434592254SScott Teel }
85553d38f00cSScott Teel 
85563d38f00cSScott Teel /*
85573d38f00cSScott Teel  * watch for controller events
85583d38f00cSScott Teel  */
85593d38f00cSScott Teel static void hpsa_event_monitor_worker(struct work_struct *work)
85603d38f00cSScott Teel {
85613d38f00cSScott Teel 	struct ctlr_info *h = container_of(to_delayed_work(work),
85623d38f00cSScott Teel 					struct ctlr_info, event_monitor_work);
85633d38f00cSScott Teel 	unsigned long flags;
85643d38f00cSScott Teel 
85653d38f00cSScott Teel 	spin_lock_irqsave(&h->lock, flags);
85663d38f00cSScott Teel 	if (h->remove_in_progress) {
85673d38f00cSScott Teel 		spin_unlock_irqrestore(&h->lock, flags);
85683d38f00cSScott Teel 		return;
85693d38f00cSScott Teel 	}
85703d38f00cSScott Teel 	spin_unlock_irqrestore(&h->lock, flags);
85713d38f00cSScott Teel 
85723d38f00cSScott Teel 	if (hpsa_ctlr_needs_rescan(h)) {
85733d38f00cSScott Teel 		hpsa_ack_ctlr_events(h);
85743d38f00cSScott Teel 		hpsa_perform_rescan(h);
85753d38f00cSScott Teel 	}
85763d38f00cSScott Teel 
85773d38f00cSScott Teel 	spin_lock_irqsave(&h->lock, flags);
85783d38f00cSScott Teel 	if (!h->remove_in_progress)
857901192088SDon Brace 		queue_delayed_work(h->monitor_ctlr_wq, &h->event_monitor_work,
85803d38f00cSScott Teel 				HPSA_EVENT_MONITOR_INTERVAL);
85813d38f00cSScott Teel 	spin_unlock_irqrestore(&h->lock, flags);
85823d38f00cSScott Teel }
85833d38f00cSScott Teel 
85843d38f00cSScott Teel static void hpsa_rescan_ctlr_worker(struct work_struct *work)
85853d38f00cSScott Teel {
85863d38f00cSScott Teel 	unsigned long flags;
85873d38f00cSScott Teel 	struct ctlr_info *h = container_of(to_delayed_work(work),
85883d38f00cSScott Teel 					struct ctlr_info, rescan_ctlr_work);
85893d38f00cSScott Teel 
85903d38f00cSScott Teel 	spin_lock_irqsave(&h->lock, flags);
85913d38f00cSScott Teel 	if (h->remove_in_progress) {
85923d38f00cSScott Teel 		spin_unlock_irqrestore(&h->lock, flags);
85933d38f00cSScott Teel 		return;
85943d38f00cSScott Teel 	}
85953d38f00cSScott Teel 	spin_unlock_irqrestore(&h->lock, flags);
85963d38f00cSScott Teel 
85973d38f00cSScott Teel 	if (h->drv_req_rescan || hpsa_offline_devices_ready(h)) {
85983d38f00cSScott Teel 		hpsa_perform_rescan(h);
85993d38f00cSScott Teel 	} else if (h->discovery_polling) {
86003d38f00cSScott Teel 		if (hpsa_luns_changed(h)) {
86013d38f00cSScott Teel 			dev_info(&h->pdev->dev,
86023d38f00cSScott Teel 				"driver discovery polling rescan.\n");
86033d38f00cSScott Teel 			hpsa_perform_rescan(h);
86043d38f00cSScott Teel 		}
86059846590eSStephen M. Cameron 	}
86066636e7f4SDon Brace 	spin_lock_irqsave(&h->lock, flags);
86076636e7f4SDon Brace 	if (!h->remove_in_progress)
86086636e7f4SDon Brace 		queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
86096636e7f4SDon Brace 				h->heartbeat_sample_interval);
86106636e7f4SDon Brace 	spin_unlock_irqrestore(&h->lock, flags);
86116636e7f4SDon Brace }
86126636e7f4SDon Brace 
86136636e7f4SDon Brace static void hpsa_monitor_ctlr_worker(struct work_struct *work)
86146636e7f4SDon Brace {
86156636e7f4SDon Brace 	unsigned long flags;
86166636e7f4SDon Brace 	struct ctlr_info *h = container_of(to_delayed_work(work),
86176636e7f4SDon Brace 					struct ctlr_info, monitor_ctlr_work);
86186636e7f4SDon Brace 
86196636e7f4SDon Brace 	detect_controller_lockup(h);
86206636e7f4SDon Brace 	if (lockup_detected(h))
86216636e7f4SDon Brace 		return;
86229846590eSStephen M. Cameron 
86238a98db73SStephen M. Cameron 	spin_lock_irqsave(&h->lock, flags);
86246636e7f4SDon Brace 	if (!h->remove_in_progress)
862501192088SDon Brace 		queue_delayed_work(h->monitor_ctlr_wq, &h->monitor_ctlr_work,
86268a98db73SStephen M. Cameron 				h->heartbeat_sample_interval);
86278a98db73SStephen M. Cameron 	spin_unlock_irqrestore(&h->lock, flags);
8628a0c12413SStephen M. Cameron }
8629a0c12413SStephen M. Cameron 
86306636e7f4SDon Brace static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h,
86316636e7f4SDon Brace 						char *name)
86326636e7f4SDon Brace {
86336636e7f4SDon Brace 	struct workqueue_struct *wq = NULL;
86346636e7f4SDon Brace 
8635397ea9cbSDon Brace 	wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr);
86366636e7f4SDon Brace 	if (!wq)
86376636e7f4SDon Brace 		dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name);
86386636e7f4SDon Brace 
86396636e7f4SDon Brace 	return wq;
86406636e7f4SDon Brace }
86416636e7f4SDon Brace 
86428b834bffSMing Lei static void hpda_free_ctlr_info(struct ctlr_info *h)
86438b834bffSMing Lei {
86448b834bffSMing Lei 	kfree(h->reply_map);
86458b834bffSMing Lei 	kfree(h);
86468b834bffSMing Lei }
86478b834bffSMing Lei 
86488b834bffSMing Lei static struct ctlr_info *hpda_alloc_ctlr_info(void)
86498b834bffSMing Lei {
86508b834bffSMing Lei 	struct ctlr_info *h;
86518b834bffSMing Lei 
86528b834bffSMing Lei 	h = kzalloc(sizeof(*h), GFP_KERNEL);
86538b834bffSMing Lei 	if (!h)
86548b834bffSMing Lei 		return NULL;
86558b834bffSMing Lei 
86566396bb22SKees Cook 	h->reply_map = kcalloc(nr_cpu_ids, sizeof(*h->reply_map), GFP_KERNEL);
86578b834bffSMing Lei 	if (!h->reply_map) {
86588b834bffSMing Lei 		kfree(h);
86598b834bffSMing Lei 		return NULL;
86608b834bffSMing Lei 	}
86618b834bffSMing Lei 	return h;
86628b834bffSMing Lei }
86638b834bffSMing Lei 
86646f039790SGreg Kroah-Hartman static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
86654c2a8c40SStephen M. Cameron {
86661fc65919SLee Jones 	int rc;
86674c2a8c40SStephen M. Cameron 	struct ctlr_info *h;
866864670ac8SStephen M. Cameron 	int try_soft_reset = 0;
866964670ac8SStephen M. Cameron 	unsigned long flags;
86706b6c1cd7STomas Henzl 	u32 board_id;
86714c2a8c40SStephen M. Cameron 
86724c2a8c40SStephen M. Cameron 	if (number_of_controllers == 0)
86734c2a8c40SStephen M. Cameron 		printk(KERN_INFO DRIVER_NAME "\n");
86744c2a8c40SStephen M. Cameron 
8675135ae6edSHannes Reinecke 	rc = hpsa_lookup_board_id(pdev, &board_id, NULL);
86766b6c1cd7STomas Henzl 	if (rc < 0) {
86776b6c1cd7STomas Henzl 		dev_warn(&pdev->dev, "Board ID not found\n");
86786b6c1cd7STomas Henzl 		return rc;
86796b6c1cd7STomas Henzl 	}
86806b6c1cd7STomas Henzl 
86816b6c1cd7STomas Henzl 	rc = hpsa_init_reset_devices(pdev, board_id);
868264670ac8SStephen M. Cameron 	if (rc) {
868364670ac8SStephen M. Cameron 		if (rc != -ENOTSUPP)
86844c2a8c40SStephen M. Cameron 			return rc;
868564670ac8SStephen M. Cameron 		/* If the reset fails in a particular way (it has no way to do
868664670ac8SStephen M. Cameron 		 * a proper hard reset, so returns -ENOTSUPP) we can try to do
868764670ac8SStephen M. Cameron 		 * a soft reset once we get the controller configured up to the
868864670ac8SStephen M. Cameron 		 * point that it can accept a command.
868964670ac8SStephen M. Cameron 		 */
869064670ac8SStephen M. Cameron 		try_soft_reset = 1;
869164670ac8SStephen M. Cameron 		rc = 0;
869264670ac8SStephen M. Cameron 	}
869364670ac8SStephen M. Cameron 
869464670ac8SStephen M. Cameron reinit_after_soft_reset:
86954c2a8c40SStephen M. Cameron 
8696303932fdSDon Brace 	/* Command structures must be aligned on a 32-byte boundary because
8697303932fdSDon Brace 	 * the 5 lower bits of the address are used by the hardware. and by
8698303932fdSDon Brace 	 * the driver.  See comments in hpsa.h for more info.
8699303932fdSDon Brace 	 */
8700303932fdSDon Brace 	BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
87018b834bffSMing Lei 	h = hpda_alloc_ctlr_info();
8702105a3dbcSRobert Elliott 	if (!h) {
8703105a3dbcSRobert Elliott 		dev_err(&pdev->dev, "Failed to allocate controller head\n");
8704ecd9aad4SStephen M. Cameron 		return -ENOMEM;
8705105a3dbcSRobert Elliott 	}
8706edd16368SStephen M. Cameron 
870755c06c71SStephen M. Cameron 	h->pdev = pdev;
8708105a3dbcSRobert Elliott 
8709a9a3a273SStephen M. Cameron 	h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
87109846590eSStephen M. Cameron 	INIT_LIST_HEAD(&h->offline_device_list);
87116eaf46fdSStephen M. Cameron 	spin_lock_init(&h->lock);
87129846590eSStephen M. Cameron 	spin_lock_init(&h->offline_device_lock);
87136eaf46fdSStephen M. Cameron 	spin_lock_init(&h->scan_lock);
8714c59d04f3SDon Brace 	spin_lock_init(&h->reset_lock);
871534f0c627SDon Brace 	atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS);
8716094963daSStephen M. Cameron 
8717094963daSStephen M. Cameron 	/* Allocate and clear per-cpu variable lockup_detected */
8718094963daSStephen M. Cameron 	h->lockup_detected = alloc_percpu(u32);
87192a5ac326SStephen M. Cameron 	if (!h->lockup_detected) {
8720105a3dbcSRobert Elliott 		dev_err(&h->pdev->dev, "Failed to allocate lockup detector\n");
87212a5ac326SStephen M. Cameron 		rc = -ENOMEM;
87222efa5929SRobert Elliott 		goto clean1;	/* aer/h */
87232a5ac326SStephen M. Cameron 	}
8724094963daSStephen M. Cameron 	set_lockup_detected_for_all_cpus(h, 0);
8725094963daSStephen M. Cameron 
872655c06c71SStephen M. Cameron 	rc = hpsa_pci_init(h);
8727105a3dbcSRobert Elliott 	if (rc)
87282946e82bSRobert Elliott 		goto clean2;	/* lu, aer/h */
8729edd16368SStephen M. Cameron 
87302946e82bSRobert Elliott 	/* relies on h-> settings made by hpsa_pci_init, including
87312946e82bSRobert Elliott 	 * interrupt_mode h->intr */
87322946e82bSRobert Elliott 	rc = hpsa_scsi_host_alloc(h);
87332946e82bSRobert Elliott 	if (rc)
87342946e82bSRobert Elliott 		goto clean2_5;	/* pci, lu, aer/h */
87352946e82bSRobert Elliott 
87362946e82bSRobert Elliott 	sprintf(h->devname, HPSA "%d", h->scsi_host->host_no);
8737edd16368SStephen M. Cameron 	h->ctlr = number_of_controllers;
8738edd16368SStephen M. Cameron 	number_of_controllers++;
8739edd16368SStephen M. Cameron 
8740edd16368SStephen M. Cameron 	/* configure PCI DMA stuff */
87418bc8f47eSChristoph Hellwig 	rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
87421fc65919SLee Jones 	if (rc != 0) {
87438bc8f47eSChristoph Hellwig 		rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
87441fc65919SLee Jones 		if (rc != 0) {
8745edd16368SStephen M. Cameron 			dev_err(&pdev->dev, "no suitable DMA available\n");
87462946e82bSRobert Elliott 			goto clean3;	/* shost, pci, lu, aer/h */
8747edd16368SStephen M. Cameron 		}
8748ecd9aad4SStephen M. Cameron 	}
8749edd16368SStephen M. Cameron 
8750edd16368SStephen M. Cameron 	/* make sure the board interrupts are off */
8751edd16368SStephen M. Cameron 	h->access.set_intr_mask(h, HPSA_INTR_OFF);
875210f66018SStephen M. Cameron 
8753105a3dbcSRobert Elliott 	rc = hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx);
8754105a3dbcSRobert Elliott 	if (rc)
87552946e82bSRobert Elliott 		goto clean3;	/* shost, pci, lu, aer/h */
8756d37ffbe4SRobert Elliott 	rc = hpsa_alloc_cmd_pool(h);
87578947fd10SRobert Elliott 	if (rc)
87582946e82bSRobert Elliott 		goto clean4;	/* irq, shost, pci, lu, aer/h */
8759105a3dbcSRobert Elliott 	rc = hpsa_alloc_sg_chain_blocks(h);
8760105a3dbcSRobert Elliott 	if (rc)
87612946e82bSRobert Elliott 		goto clean5;	/* cmd, irq, shost, pci, lu, aer/h */
8762a08a8471SStephen M. Cameron 	init_waitqueue_head(&h->scan_wait_queue);
8763d604f533SWebb Scales 	init_waitqueue_head(&h->event_sync_wait_queue);
8764d604f533SWebb Scales 	mutex_init(&h->reset_mutex);
8765a08a8471SStephen M. Cameron 	h->scan_finished = 1; /* no scan currently in progress */
876687b9e6aaSDon Brace 	h->scan_waiting = 0;
8767edd16368SStephen M. Cameron 
8768edd16368SStephen M. Cameron 	pci_set_drvdata(pdev, h);
87699a41338eSStephen M. Cameron 	h->ndevices = 0;
87702946e82bSRobert Elliott 
87719a41338eSStephen M. Cameron 	spin_lock_init(&h->devlock);
8772105a3dbcSRobert Elliott 	rc = hpsa_put_ctlr_into_performant_mode(h);
8773105a3dbcSRobert Elliott 	if (rc)
87742946e82bSRobert Elliott 		goto clean6; /* sg, cmd, irq, shost, pci, lu, aer/h */
87752946e82bSRobert Elliott 
87762efa5929SRobert Elliott 	/* create the resubmit workqueue */
87772efa5929SRobert Elliott 	h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan");
87782efa5929SRobert Elliott 	if (!h->rescan_ctlr_wq) {
87792efa5929SRobert Elliott 		rc = -ENOMEM;
87802efa5929SRobert Elliott 		goto clean7;
87812efa5929SRobert Elliott 	}
87822efa5929SRobert Elliott 
87832efa5929SRobert Elliott 	h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit");
87842efa5929SRobert Elliott 	if (!h->resubmit_wq) {
87852efa5929SRobert Elliott 		rc = -ENOMEM;
87862efa5929SRobert Elliott 		goto clean7;	/* aer/h */
87872efa5929SRobert Elliott 	}
878864670ac8SStephen M. Cameron 
878901192088SDon Brace 	h->monitor_ctlr_wq = hpsa_create_controller_wq(h, "monitor");
879001192088SDon Brace 	if (!h->monitor_ctlr_wq) {
879101192088SDon Brace 		rc = -ENOMEM;
879201192088SDon Brace 		goto clean7;
879301192088SDon Brace 	}
879401192088SDon Brace 
8795105a3dbcSRobert Elliott 	/*
8796105a3dbcSRobert Elliott 	 * At this point, the controller is ready to take commands.
879764670ac8SStephen M. Cameron 	 * Now, if reset_devices and the hard reset didn't work, try
879864670ac8SStephen M. Cameron 	 * the soft reset and see if that works.
879964670ac8SStephen M. Cameron 	 */
880064670ac8SStephen M. Cameron 	if (try_soft_reset) {
880164670ac8SStephen M. Cameron 
880264670ac8SStephen M. Cameron 		/* This is kind of gross.  We may or may not get a completion
880364670ac8SStephen M. Cameron 		 * from the soft reset command, and if we do, then the value
880464670ac8SStephen M. Cameron 		 * from the fifo may or may not be valid.  So, we wait 10 secs
880564670ac8SStephen M. Cameron 		 * after the reset throwing away any completions we get during
880664670ac8SStephen M. Cameron 		 * that time.  Unregister the interrupt handler and register
880764670ac8SStephen M. Cameron 		 * fake ones to scoop up any residual completions.
880864670ac8SStephen M. Cameron 		 */
880964670ac8SStephen M. Cameron 		spin_lock_irqsave(&h->lock, flags);
881064670ac8SStephen M. Cameron 		h->access.set_intr_mask(h, HPSA_INTR_OFF);
881164670ac8SStephen M. Cameron 		spin_unlock_irqrestore(&h->lock, flags);
8812ec501a18SRobert Elliott 		hpsa_free_irqs(h);
88139ee61794SRobert Elliott 		rc = hpsa_request_irqs(h, hpsa_msix_discard_completions,
881464670ac8SStephen M. Cameron 					hpsa_intx_discard_completions);
881564670ac8SStephen M. Cameron 		if (rc) {
88169ee61794SRobert Elliott 			dev_warn(&h->pdev->dev,
88179ee61794SRobert Elliott 				"Failed to request_irq after soft reset.\n");
8818d498757cSRobert Elliott 			/*
8819b2ef480cSRobert Elliott 			 * cannot goto clean7 or free_irqs will be called
8820b2ef480cSRobert Elliott 			 * again. Instead, do its work
8821b2ef480cSRobert Elliott 			 */
8822b2ef480cSRobert Elliott 			hpsa_free_performant_mode(h);	/* clean7 */
8823b2ef480cSRobert Elliott 			hpsa_free_sg_chain_blocks(h);	/* clean6 */
8824b2ef480cSRobert Elliott 			hpsa_free_cmd_pool(h);		/* clean5 */
8825b2ef480cSRobert Elliott 			/*
8826b2ef480cSRobert Elliott 			 * skip hpsa_free_irqs(h) clean4 since that
8827b2ef480cSRobert Elliott 			 * was just called before request_irqs failed
8828d498757cSRobert Elliott 			 */
8829d498757cSRobert Elliott 			goto clean3;
883064670ac8SStephen M. Cameron 		}
883164670ac8SStephen M. Cameron 
883264670ac8SStephen M. Cameron 		rc = hpsa_kdump_soft_reset(h);
883364670ac8SStephen M. Cameron 		if (rc)
883464670ac8SStephen M. Cameron 			/* Neither hard nor soft reset worked, we're hosed. */
88357ef7323fSDon Brace 			goto clean7;
883664670ac8SStephen M. Cameron 
883764670ac8SStephen M. Cameron 		dev_info(&h->pdev->dev, "Board READY.\n");
883864670ac8SStephen M. Cameron 		dev_info(&h->pdev->dev,
883964670ac8SStephen M. Cameron 			"Waiting for stale completions to drain.\n");
884064670ac8SStephen M. Cameron 		h->access.set_intr_mask(h, HPSA_INTR_ON);
884164670ac8SStephen M. Cameron 		msleep(10000);
884264670ac8SStephen M. Cameron 		h->access.set_intr_mask(h, HPSA_INTR_OFF);
884364670ac8SStephen M. Cameron 
884464670ac8SStephen M. Cameron 		rc = controller_reset_failed(h->cfgtable);
884564670ac8SStephen M. Cameron 		if (rc)
884664670ac8SStephen M. Cameron 			dev_info(&h->pdev->dev,
884764670ac8SStephen M. Cameron 				"Soft reset appears to have failed.\n");
884864670ac8SStephen M. Cameron 
884964670ac8SStephen M. Cameron 		/* since the controller's reset, we have to go back and re-init
885064670ac8SStephen M. Cameron 		 * everything.  Easiest to just forget what we've done and do it
885164670ac8SStephen M. Cameron 		 * all over again.
885264670ac8SStephen M. Cameron 		 */
885364670ac8SStephen M. Cameron 		hpsa_undo_allocations_after_kdump_soft_reset(h);
885464670ac8SStephen M. Cameron 		try_soft_reset = 0;
885564670ac8SStephen M. Cameron 		if (rc)
8856b2ef480cSRobert Elliott 			/* don't goto clean, we already unallocated */
885764670ac8SStephen M. Cameron 			return -ENODEV;
885864670ac8SStephen M. Cameron 
885964670ac8SStephen M. Cameron 		goto reinit_after_soft_reset;
886064670ac8SStephen M. Cameron 	}
8861edd16368SStephen M. Cameron 
8862da0697bdSScott Teel 	/* Enable Accelerated IO path at driver layer */
8863da0697bdSScott Teel 	h->acciopath_status = 1;
886434592254SScott Teel 	/* Disable discovery polling.*/
886534592254SScott Teel 	h->discovery_polling = 0;
8866da0697bdSScott Teel 
8867e863d68eSScott Teel 
8868edd16368SStephen M. Cameron 	/* Turn the interrupts on so we can service requests */
8869edd16368SStephen M. Cameron 	h->access.set_intr_mask(h, HPSA_INTR_ON);
8870edd16368SStephen M. Cameron 
8871339b2b14SStephen M. Cameron 	hpsa_hba_inquiry(h);
88728a98db73SStephen M. Cameron 
887334592254SScott Teel 	h->lastlogicals = kzalloc(sizeof(*(h->lastlogicals)), GFP_KERNEL);
887434592254SScott Teel 	if (!h->lastlogicals)
887534592254SScott Teel 		dev_info(&h->pdev->dev,
887634592254SScott Teel 			"Can't track change to report lun data\n");
887734592254SScott Teel 
8878cf477237SDon Brace 	/* hook into SCSI subsystem */
8879cf477237SDon Brace 	rc = hpsa_scsi_add_host(h);
8880cf477237SDon Brace 	if (rc)
8881af61bc1eSKeita Suzuki 		goto clean8; /* lastlogicals, perf, sg, cmd, irq, shost, pci, lu, aer/h */
8882cf477237SDon Brace 
88838a98db73SStephen M. Cameron 	/* Monitor the controller for firmware lockups */
88848a98db73SStephen M. Cameron 	h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
88858a98db73SStephen M. Cameron 	INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker);
88868a98db73SStephen M. Cameron 	schedule_delayed_work(&h->monitor_ctlr_work,
88878a98db73SStephen M. Cameron 				h->heartbeat_sample_interval);
88886636e7f4SDon Brace 	INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker);
88896636e7f4SDon Brace 	queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
88906636e7f4SDon Brace 				h->heartbeat_sample_interval);
88913d38f00cSScott Teel 	INIT_DELAYED_WORK(&h->event_monitor_work, hpsa_event_monitor_worker);
88923d38f00cSScott Teel 	schedule_delayed_work(&h->event_monitor_work,
88933d38f00cSScott Teel 				HPSA_EVENT_MONITOR_INTERVAL);
889488bf6d62SStephen M. Cameron 	return 0;
8895edd16368SStephen M. Cameron 
8896af61bc1eSKeita Suzuki clean8: /* lastlogicals, perf, sg, cmd, irq, shost, pci, lu, aer/h */
8897af61bc1eSKeita Suzuki 	kfree(h->lastlogicals);
88982946e82bSRobert Elliott clean7: /* perf, sg, cmd, irq, shost, pci, lu, aer/h */
8899105a3dbcSRobert Elliott 	hpsa_free_performant_mode(h);
8900105a3dbcSRobert Elliott 	h->access.set_intr_mask(h, HPSA_INTR_OFF);
8901105a3dbcSRobert Elliott clean6: /* sg, cmd, irq, pci, lockup, wq/aer/h */
890233a2ffceSStephen M. Cameron 	hpsa_free_sg_chain_blocks(h);
89032946e82bSRobert Elliott clean5: /* cmd, irq, shost, pci, lu, aer/h */
89042e9d1b36SStephen M. Cameron 	hpsa_free_cmd_pool(h);
89052946e82bSRobert Elliott clean4: /* irq, shost, pci, lu, aer/h */
8906ec501a18SRobert Elliott 	hpsa_free_irqs(h);
89072946e82bSRobert Elliott clean3: /* shost, pci, lu, aer/h */
89082946e82bSRobert Elliott 	scsi_host_put(h->scsi_host);
89092946e82bSRobert Elliott 	h->scsi_host = NULL;
89102946e82bSRobert Elliott clean2_5: /* pci, lu, aer/h */
8911195f2c65SRobert Elliott 	hpsa_free_pci_init(h);
89122946e82bSRobert Elliott clean2: /* lu, aer/h */
8913105a3dbcSRobert Elliott 	if (h->lockup_detected) {
8914094963daSStephen M. Cameron 		free_percpu(h->lockup_detected);
8915105a3dbcSRobert Elliott 		h->lockup_detected = NULL;
8916105a3dbcSRobert Elliott 	}
8917105a3dbcSRobert Elliott clean1:	/* wq/aer/h */
8918105a3dbcSRobert Elliott 	if (h->resubmit_wq) {
8919105a3dbcSRobert Elliott 		destroy_workqueue(h->resubmit_wq);
8920105a3dbcSRobert Elliott 		h->resubmit_wq = NULL;
8921105a3dbcSRobert Elliott 	}
8922105a3dbcSRobert Elliott 	if (h->rescan_ctlr_wq) {
8923105a3dbcSRobert Elliott 		destroy_workqueue(h->rescan_ctlr_wq);
8924105a3dbcSRobert Elliott 		h->rescan_ctlr_wq = NULL;
8925105a3dbcSRobert Elliott 	}
892601192088SDon Brace 	if (h->monitor_ctlr_wq) {
892701192088SDon Brace 		destroy_workqueue(h->monitor_ctlr_wq);
892801192088SDon Brace 		h->monitor_ctlr_wq = NULL;
892901192088SDon Brace 	}
8930edd16368SStephen M. Cameron 	kfree(h);
8931ecd9aad4SStephen M. Cameron 	return rc;
8932edd16368SStephen M. Cameron }
8933edd16368SStephen M. Cameron 
8934edd16368SStephen M. Cameron static void hpsa_flush_cache(struct ctlr_info *h)
8935edd16368SStephen M. Cameron {
8936edd16368SStephen M. Cameron 	char *flush_buf;
8937edd16368SStephen M. Cameron 	struct CommandList *c;
893825163bd5SWebb Scales 	int rc;
8939702890e3SStephen M. Cameron 
8940094963daSStephen M. Cameron 	if (unlikely(lockup_detected(h)))
8941702890e3SStephen M. Cameron 		return;
8942edd16368SStephen M. Cameron 	flush_buf = kzalloc(4, GFP_KERNEL);
8943edd16368SStephen M. Cameron 	if (!flush_buf)
8944edd16368SStephen M. Cameron 		return;
8945edd16368SStephen M. Cameron 
894645fcb86eSStephen Cameron 	c = cmd_alloc(h);
8947bf43caf3SRobert Elliott 
8948a2dac136SStephen M. Cameron 	if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
8949a2dac136SStephen M. Cameron 		RAID_CTLR_LUNID, TYPE_CMD)) {
8950a2dac136SStephen M. Cameron 		goto out;
8951a2dac136SStephen M. Cameron 	}
89528bc8f47eSChristoph Hellwig 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_TO_DEVICE,
89538bc8f47eSChristoph Hellwig 			DEFAULT_TIMEOUT);
895425163bd5SWebb Scales 	if (rc)
895525163bd5SWebb Scales 		goto out;
8956edd16368SStephen M. Cameron 	if (c->err_info->CommandStatus != 0)
8957a2dac136SStephen M. Cameron out:
8958edd16368SStephen M. Cameron 		dev_warn(&h->pdev->dev,
8959edd16368SStephen M. Cameron 			"error flushing cache on controller\n");
896045fcb86eSStephen Cameron 	cmd_free(h, c);
8961edd16368SStephen M. Cameron 	kfree(flush_buf);
8962edd16368SStephen M. Cameron }
8963edd16368SStephen M. Cameron 
8964c2adae44SScott Teel /* Make controller gather fresh report lun data each time we
8965c2adae44SScott Teel  * send down a report luns request
8966c2adae44SScott Teel  */
8967c2adae44SScott Teel static void hpsa_disable_rld_caching(struct ctlr_info *h)
8968c2adae44SScott Teel {
8969c2adae44SScott Teel 	u32 *options;
8970c2adae44SScott Teel 	struct CommandList *c;
8971c2adae44SScott Teel 	int rc;
8972c2adae44SScott Teel 
8973c2adae44SScott Teel 	/* Don't bother trying to set diag options if locked up */
8974c2adae44SScott Teel 	if (unlikely(h->lockup_detected))
8975c2adae44SScott Teel 		return;
8976c2adae44SScott Teel 
8977c2adae44SScott Teel 	options = kzalloc(sizeof(*options), GFP_KERNEL);
89787e8a9486SAmit Kushwaha 	if (!options)
8979c2adae44SScott Teel 		return;
8980c2adae44SScott Teel 
8981c2adae44SScott Teel 	c = cmd_alloc(h);
8982c2adae44SScott Teel 
8983c2adae44SScott Teel 	/* first, get the current diag options settings */
8984c2adae44SScott Teel 	if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0,
8985c2adae44SScott Teel 		RAID_CTLR_LUNID, TYPE_CMD))
8986c2adae44SScott Teel 		goto errout;
8987c2adae44SScott Teel 
89888bc8f47eSChristoph Hellwig 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
89898bc8f47eSChristoph Hellwig 			NO_TIMEOUT);
8990c2adae44SScott Teel 	if ((rc != 0) || (c->err_info->CommandStatus != 0))
8991c2adae44SScott Teel 		goto errout;
8992c2adae44SScott Teel 
8993c2adae44SScott Teel 	/* Now, set the bit for disabling the RLD caching */
8994c2adae44SScott Teel 	*options |= HPSA_DIAG_OPTS_DISABLE_RLD_CACHING;
8995c2adae44SScott Teel 
8996c2adae44SScott Teel 	if (fill_cmd(c, BMIC_SET_DIAG_OPTIONS, h, options, 4, 0,
8997c2adae44SScott Teel 		RAID_CTLR_LUNID, TYPE_CMD))
8998c2adae44SScott Teel 		goto errout;
8999c2adae44SScott Teel 
90008bc8f47eSChristoph Hellwig 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_TO_DEVICE,
90018bc8f47eSChristoph Hellwig 			NO_TIMEOUT);
9002c2adae44SScott Teel 	if ((rc != 0)  || (c->err_info->CommandStatus != 0))
9003c2adae44SScott Teel 		goto errout;
9004c2adae44SScott Teel 
9005c2adae44SScott Teel 	/* Now verify that it got set: */
9006c2adae44SScott Teel 	if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0,
9007c2adae44SScott Teel 		RAID_CTLR_LUNID, TYPE_CMD))
9008c2adae44SScott Teel 		goto errout;
9009c2adae44SScott Teel 
90108bc8f47eSChristoph Hellwig 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE,
90118bc8f47eSChristoph Hellwig 			NO_TIMEOUT);
9012c2adae44SScott Teel 	if ((rc != 0)  || (c->err_info->CommandStatus != 0))
9013c2adae44SScott Teel 		goto errout;
9014c2adae44SScott Teel 
9015d8a080c3SDan Carpenter 	if (*options & HPSA_DIAG_OPTS_DISABLE_RLD_CACHING)
9016c2adae44SScott Teel 		goto out;
9017c2adae44SScott Teel 
9018c2adae44SScott Teel errout:
9019c2adae44SScott Teel 	dev_err(&h->pdev->dev,
9020c2adae44SScott Teel 			"Error: failed to disable report lun data caching.\n");
9021c2adae44SScott Teel out:
9022c2adae44SScott Teel 	cmd_free(h, c);
9023c2adae44SScott Teel 	kfree(options);
9024c2adae44SScott Teel }
9025c2adae44SScott Teel 
90260d98ba8dSSinan Kaya static void __hpsa_shutdown(struct pci_dev *pdev)
9027edd16368SStephen M. Cameron {
9028edd16368SStephen M. Cameron 	struct ctlr_info *h;
9029edd16368SStephen M. Cameron 
9030edd16368SStephen M. Cameron 	h = pci_get_drvdata(pdev);
9031edd16368SStephen M. Cameron 	/* Turn board interrupts off  and send the flush cache command
9032edd16368SStephen M. Cameron 	 * sendcmd will turn off interrupt, and send the flush...
9033edd16368SStephen M. Cameron 	 * To write all data in the battery backed cache to disks
9034edd16368SStephen M. Cameron 	 */
9035edd16368SStephen M. Cameron 	hpsa_flush_cache(h);
9036edd16368SStephen M. Cameron 	h->access.set_intr_mask(h, HPSA_INTR_OFF);
9037105a3dbcSRobert Elliott 	hpsa_free_irqs(h);			/* init_one 4 */
9038cc64c817SRobert Elliott 	hpsa_disable_interrupt_mode(h);		/* pci_init 2 */
9039edd16368SStephen M. Cameron }
9040edd16368SStephen M. Cameron 
90410d98ba8dSSinan Kaya static void hpsa_shutdown(struct pci_dev *pdev)
90420d98ba8dSSinan Kaya {
90430d98ba8dSSinan Kaya 	__hpsa_shutdown(pdev);
90440d98ba8dSSinan Kaya 	pci_disable_device(pdev);
90450d98ba8dSSinan Kaya }
90460d98ba8dSSinan Kaya 
90476f039790SGreg Kroah-Hartman static void hpsa_free_device_info(struct ctlr_info *h)
904855e14e76SStephen M. Cameron {
904955e14e76SStephen M. Cameron 	int i;
905055e14e76SStephen M. Cameron 
9051105a3dbcSRobert Elliott 	for (i = 0; i < h->ndevices; i++) {
905255e14e76SStephen M. Cameron 		kfree(h->dev[i]);
9053105a3dbcSRobert Elliott 		h->dev[i] = NULL;
9054105a3dbcSRobert Elliott 	}
905555e14e76SStephen M. Cameron }
905655e14e76SStephen M. Cameron 
90576f039790SGreg Kroah-Hartman static void hpsa_remove_one(struct pci_dev *pdev)
9058edd16368SStephen M. Cameron {
9059edd16368SStephen M. Cameron 	struct ctlr_info *h;
90608a98db73SStephen M. Cameron 	unsigned long flags;
9061edd16368SStephen M. Cameron 
9062edd16368SStephen M. Cameron 	if (pci_get_drvdata(pdev) == NULL) {
9063edd16368SStephen M. Cameron 		dev_err(&pdev->dev, "unable to remove device\n");
9064edd16368SStephen M. Cameron 		return;
9065edd16368SStephen M. Cameron 	}
9066edd16368SStephen M. Cameron 	h = pci_get_drvdata(pdev);
90678a98db73SStephen M. Cameron 
90688a98db73SStephen M. Cameron 	/* Get rid of any controller monitoring work items */
90698a98db73SStephen M. Cameron 	spin_lock_irqsave(&h->lock, flags);
90708a98db73SStephen M. Cameron 	h->remove_in_progress = 1;
90718a98db73SStephen M. Cameron 	spin_unlock_irqrestore(&h->lock, flags);
90726636e7f4SDon Brace 	cancel_delayed_work_sync(&h->monitor_ctlr_work);
90736636e7f4SDon Brace 	cancel_delayed_work_sync(&h->rescan_ctlr_work);
90743d38f00cSScott Teel 	cancel_delayed_work_sync(&h->event_monitor_work);
90756636e7f4SDon Brace 	destroy_workqueue(h->rescan_ctlr_wq);
90766636e7f4SDon Brace 	destroy_workqueue(h->resubmit_wq);
907701192088SDon Brace 	destroy_workqueue(h->monitor_ctlr_wq);
9078cc64c817SRobert Elliott 
9079dfb2e6f4SMartin Wilck 	hpsa_delete_sas_host(h);
9080dfb2e6f4SMartin Wilck 
90812d041306SDon Brace 	/*
90822d041306SDon Brace 	 * Call before disabling interrupts.
90832d041306SDon Brace 	 * scsi_remove_host can trigger I/O operations especially
90842d041306SDon Brace 	 * when multipath is enabled. There can be SYNCHRONIZE CACHE
90852d041306SDon Brace 	 * operations which cannot complete and will hang the system.
90862d041306SDon Brace 	 */
90872d041306SDon Brace 	if (h->scsi_host)
90882d041306SDon Brace 		scsi_remove_host(h->scsi_host);		/* init_one 8 */
9089105a3dbcSRobert Elliott 	/* includes hpsa_free_irqs - init_one 4 */
9090195f2c65SRobert Elliott 	/* includes hpsa_disable_interrupt_mode - pci_init 2 */
90910d98ba8dSSinan Kaya 	__hpsa_shutdown(pdev);
9092cc64c817SRobert Elliott 
9093105a3dbcSRobert Elliott 	hpsa_free_device_info(h);		/* scan */
9094105a3dbcSRobert Elliott 
90952946e82bSRobert Elliott 	kfree(h->hba_inquiry_data);			/* init_one 10 */
90962946e82bSRobert Elliott 	h->hba_inquiry_data = NULL;			/* init_one 10 */
90972946e82bSRobert Elliott 	hpsa_free_ioaccel2_sg_chain_blocks(h);
9098105a3dbcSRobert Elliott 	hpsa_free_performant_mode(h);			/* init_one 7 */
9099105a3dbcSRobert Elliott 	hpsa_free_sg_chain_blocks(h);			/* init_one 6 */
91001fb7c98aSRobert Elliott 	hpsa_free_cmd_pool(h);				/* init_one 5 */
910134592254SScott Teel 	kfree(h->lastlogicals);
9102105a3dbcSRobert Elliott 
9103105a3dbcSRobert Elliott 	/* hpsa_free_irqs already called via hpsa_shutdown init_one 4 */
9104195f2c65SRobert Elliott 
91052946e82bSRobert Elliott 	scsi_host_put(h->scsi_host);			/* init_one 3 */
91062946e82bSRobert Elliott 	h->scsi_host = NULL;				/* init_one 3 */
91072946e82bSRobert Elliott 
9108195f2c65SRobert Elliott 	/* includes hpsa_disable_interrupt_mode - pci_init 2 */
91092946e82bSRobert Elliott 	hpsa_free_pci_init(h);				/* init_one 2.5 */
9110195f2c65SRobert Elliott 
9111105a3dbcSRobert Elliott 	free_percpu(h->lockup_detected);		/* init_one 2 */
9112105a3dbcSRobert Elliott 	h->lockup_detected = NULL;			/* init_one 2 */
9113105a3dbcSRobert Elliott 	/* (void) pci_disable_pcie_error_reporting(pdev); */	/* init_one 1 */
9114d04e62b9SKevin Barnett 
91158b834bffSMing Lei 	hpda_free_ctlr_info(h);				/* init_one 1 */
9116edd16368SStephen M. Cameron }
9117edd16368SStephen M. Cameron 
9118e5b79ebfSVaibhav Gupta static int __maybe_unused hpsa_suspend(
9119e5b79ebfSVaibhav Gupta 	__attribute__((unused)) struct device *dev)
9120edd16368SStephen M. Cameron {
9121edd16368SStephen M. Cameron 	return -ENOSYS;
9122edd16368SStephen M. Cameron }
9123edd16368SStephen M. Cameron 
9124e5b79ebfSVaibhav Gupta static int __maybe_unused hpsa_resume
9125e5b79ebfSVaibhav Gupta 	(__attribute__((unused)) struct device *dev)
9126edd16368SStephen M. Cameron {
9127edd16368SStephen M. Cameron 	return -ENOSYS;
9128edd16368SStephen M. Cameron }
9129edd16368SStephen M. Cameron 
9130e5b79ebfSVaibhav Gupta static SIMPLE_DEV_PM_OPS(hpsa_pm_ops, hpsa_suspend, hpsa_resume);
9131e5b79ebfSVaibhav Gupta 
9132edd16368SStephen M. Cameron static struct pci_driver hpsa_pci_driver = {
9133f79cfec6SStephen M. Cameron 	.name = HPSA,
9134edd16368SStephen M. Cameron 	.probe = hpsa_init_one,
91356f039790SGreg Kroah-Hartman 	.remove = hpsa_remove_one,
9136edd16368SStephen M. Cameron 	.id_table = hpsa_pci_device_id,	/* id_table */
9137edd16368SStephen M. Cameron 	.shutdown = hpsa_shutdown,
9138e5b79ebfSVaibhav Gupta 	.driver.pm = &hpsa_pm_ops,
9139edd16368SStephen M. Cameron };
9140edd16368SStephen M. Cameron 
9141303932fdSDon Brace /* Fill in bucket_map[], given nsgs (the max number of
9142303932fdSDon Brace  * scatter gather elements supported) and bucket[],
9143303932fdSDon Brace  * which is an array of 8 integers.  The bucket[] array
9144303932fdSDon Brace  * contains 8 different DMA transfer sizes (in 16
9145303932fdSDon Brace  * byte increments) which the controller uses to fetch
9146303932fdSDon Brace  * commands.  This function fills in bucket_map[], which
9147303932fdSDon Brace  * maps a given number of scatter gather elements to one of
9148303932fdSDon Brace  * the 8 DMA transfer sizes.  The point of it is to allow the
9149303932fdSDon Brace  * controller to only do as much DMA as needed to fetch the
9150303932fdSDon Brace  * command, with the DMA transfer size encoded in the lower
9151303932fdSDon Brace  * bits of the command address.
9152303932fdSDon Brace  */
9153303932fdSDon Brace static void  calc_bucket_map(int bucket[], int num_buckets,
91542b08b3e9SDon Brace 	int nsgs, int min_blocks, u32 *bucket_map)
9155303932fdSDon Brace {
9156303932fdSDon Brace 	int i, j, b, size;
9157303932fdSDon Brace 
9158303932fdSDon Brace 	/* Note, bucket_map must have nsgs+1 entries. */
9159303932fdSDon Brace 	for (i = 0; i <= nsgs; i++) {
9160303932fdSDon Brace 		/* Compute size of a command with i SG entries */
9161e1f7de0cSMatt Gates 		size = i + min_blocks;
9162303932fdSDon Brace 		b = num_buckets; /* Assume the biggest bucket */
9163303932fdSDon Brace 		/* Find the bucket that is just big enough */
9164e1f7de0cSMatt Gates 		for (j = 0; j < num_buckets; j++) {
9165303932fdSDon Brace 			if (bucket[j] >= size) {
9166303932fdSDon Brace 				b = j;
9167303932fdSDon Brace 				break;
9168303932fdSDon Brace 			}
9169303932fdSDon Brace 		}
9170303932fdSDon Brace 		/* for a command with i SG entries, use bucket b. */
9171303932fdSDon Brace 		bucket_map[i] = b;
9172303932fdSDon Brace 	}
9173303932fdSDon Brace }
9174303932fdSDon Brace 
9175105a3dbcSRobert Elliott /*
9176105a3dbcSRobert Elliott  * return -ENODEV on err, 0 on success (or no action)
9177105a3dbcSRobert Elliott  * allocates numerous items that must be freed later
9178105a3dbcSRobert Elliott  */
9179c706a795SRobert Elliott static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support)
9180303932fdSDon Brace {
91816c311b57SStephen M. Cameron 	int i;
91826c311b57SStephen M. Cameron 	unsigned long register_value;
9183e1f7de0cSMatt Gates 	unsigned long transMethod = CFGTBL_Trans_Performant |
9184e1f7de0cSMatt Gates 			(trans_support & CFGTBL_Trans_use_short_tags) |
9185e1f7de0cSMatt Gates 				CFGTBL_Trans_enable_directed_msix |
9186b9af4937SStephen M. Cameron 			(trans_support & (CFGTBL_Trans_io_accel1 |
9187b9af4937SStephen M. Cameron 				CFGTBL_Trans_io_accel2));
9188e1f7de0cSMatt Gates 	struct access_method access = SA5_performant_access;
9189def342bdSStephen M. Cameron 
9190def342bdSStephen M. Cameron 	/* This is a bit complicated.  There are 8 registers on
9191def342bdSStephen M. Cameron 	 * the controller which we write to to tell it 8 different
9192def342bdSStephen M. Cameron 	 * sizes of commands which there may be.  It's a way of
9193def342bdSStephen M. Cameron 	 * reducing the DMA done to fetch each command.  Encoded into
9194def342bdSStephen M. Cameron 	 * each command's tag are 3 bits which communicate to the controller
9195def342bdSStephen M. Cameron 	 * which of the eight sizes that command fits within.  The size of
9196def342bdSStephen M. Cameron 	 * each command depends on how many scatter gather entries there are.
9197def342bdSStephen M. Cameron 	 * Each SG entry requires 16 bytes.  The eight registers are programmed
9198def342bdSStephen M. Cameron 	 * with the number of 16-byte blocks a command of that size requires.
9199def342bdSStephen M. Cameron 	 * The smallest command possible requires 5 such 16 byte blocks.
9200d66ae08bSStephen M. Cameron 	 * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte
9201def342bdSStephen M. Cameron 	 * blocks.  Note, this only extends to the SG entries contained
9202def342bdSStephen M. Cameron 	 * within the command block, and does not extend to chained blocks
9203def342bdSStephen M. Cameron 	 * of SG elements.   bft[] contains the eight values we write to
9204def342bdSStephen M. Cameron 	 * the registers.  They are not evenly distributed, but have more
9205def342bdSStephen M. Cameron 	 * sizes for small commands, and fewer sizes for larger commands.
9206def342bdSStephen M. Cameron 	 */
9207d66ae08bSStephen M. Cameron 	int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
9208b9af4937SStephen M. Cameron #define MIN_IOACCEL2_BFT_ENTRY 5
9209b9af4937SStephen M. Cameron #define HPSA_IOACCEL2_HEADER_SZ 4
9210b9af4937SStephen M. Cameron 	int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12,
9211b9af4937SStephen M. Cameron 			13, 14, 15, 16, 17, 18, 19,
9212b9af4937SStephen M. Cameron 			HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES};
9213b9af4937SStephen M. Cameron 	BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16);
9214b9af4937SStephen M. Cameron 	BUILD_BUG_ON(ARRAY_SIZE(bft) != 8);
9215b9af4937SStephen M. Cameron 	BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) >
9216b9af4937SStephen M. Cameron 				 16 * MIN_IOACCEL2_BFT_ENTRY);
9217b9af4937SStephen M. Cameron 	BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16);
9218d66ae08bSStephen M. Cameron 	BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
9219303932fdSDon Brace 	/*  5 = 1 s/g entry or 4k
9220303932fdSDon Brace 	 *  6 = 2 s/g entry or 8k
9221303932fdSDon Brace 	 *  8 = 4 s/g entry or 16k
9222303932fdSDon Brace 	 * 10 = 6 s/g entry or 24k
9223303932fdSDon Brace 	 */
9224303932fdSDon Brace 
9225b3a52e79SStephen M. Cameron 	/* If the controller supports either ioaccel method then
9226b3a52e79SStephen M. Cameron 	 * we can also use the RAID stack submit path that does not
9227b3a52e79SStephen M. Cameron 	 * perform the superfluous readl() after each command submission.
9228b3a52e79SStephen M. Cameron 	 */
9229b3a52e79SStephen M. Cameron 	if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2))
9230b3a52e79SStephen M. Cameron 		access = SA5_performant_access_no_read;
9231b3a52e79SStephen M. Cameron 
9232303932fdSDon Brace 	/* Controller spec: zero out this buffer. */
9233072b0518SStephen M. Cameron 	for (i = 0; i < h->nreply_queues; i++)
9234072b0518SStephen M. Cameron 		memset(h->reply_queue[i].head, 0, h->reply_queue_size);
9235303932fdSDon Brace 
9236d66ae08bSStephen M. Cameron 	bft[7] = SG_ENTRIES_IN_CMD + 4;
9237d66ae08bSStephen M. Cameron 	calc_bucket_map(bft, ARRAY_SIZE(bft),
9238e1f7de0cSMatt Gates 				SG_ENTRIES_IN_CMD, 4, h->blockFetchTable);
9239303932fdSDon Brace 	for (i = 0; i < 8; i++)
9240303932fdSDon Brace 		writel(bft[i], &h->transtable->BlockFetch[i]);
9241303932fdSDon Brace 
9242303932fdSDon Brace 	/* size of controller ring buffer */
9243303932fdSDon Brace 	writel(h->max_commands, &h->transtable->RepQSize);
9244254f796bSMatt Gates 	writel(h->nreply_queues, &h->transtable->RepQCount);
9245303932fdSDon Brace 	writel(0, &h->transtable->RepQCtrAddrLow32);
9246303932fdSDon Brace 	writel(0, &h->transtable->RepQCtrAddrHigh32);
9247254f796bSMatt Gates 
9248254f796bSMatt Gates 	for (i = 0; i < h->nreply_queues; i++) {
9249254f796bSMatt Gates 		writel(0, &h->transtable->RepQAddr[i].upper);
9250072b0518SStephen M. Cameron 		writel(h->reply_queue[i].busaddr,
9251254f796bSMatt Gates 			&h->transtable->RepQAddr[i].lower);
9252254f796bSMatt Gates 	}
9253254f796bSMatt Gates 
9254b9af4937SStephen M. Cameron 	writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
9255e1f7de0cSMatt Gates 	writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest));
9256e1f7de0cSMatt Gates 	/*
9257e1f7de0cSMatt Gates 	 * enable outbound interrupt coalescing in accelerator mode;
9258e1f7de0cSMatt Gates 	 */
9259e1f7de0cSMatt Gates 	if (trans_support & CFGTBL_Trans_io_accel1) {
9260e1f7de0cSMatt Gates 		access = SA5_ioaccel_mode1_access;
9261e1f7de0cSMatt Gates 		writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
9262e1f7de0cSMatt Gates 		writel(4, &h->cfgtable->HostWrite.CoalIntCount);
926396b6ce4eSDon Brace 	} else
926496b6ce4eSDon Brace 		if (trans_support & CFGTBL_Trans_io_accel2)
9265c349775eSScott Teel 			access = SA5_ioaccel_mode2_access;
9266303932fdSDon Brace 	writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
9267c706a795SRobert Elliott 	if (hpsa_wait_for_mode_change_ack(h)) {
9268c706a795SRobert Elliott 		dev_err(&h->pdev->dev,
9269c706a795SRobert Elliott 			"performant mode problem - doorbell timeout\n");
9270c706a795SRobert Elliott 		return -ENODEV;
9271c706a795SRobert Elliott 	}
9272303932fdSDon Brace 	register_value = readl(&(h->cfgtable->TransportActive));
9273303932fdSDon Brace 	if (!(register_value & CFGTBL_Trans_Performant)) {
9274050f7147SStephen Cameron 		dev_err(&h->pdev->dev,
9275050f7147SStephen Cameron 			"performant mode problem - transport not active\n");
9276c706a795SRobert Elliott 		return -ENODEV;
9277303932fdSDon Brace 	}
9278960a30e7SStephen M. Cameron 	/* Change the access methods to the performant access methods */
9279e1f7de0cSMatt Gates 	h->access = access;
9280e1f7de0cSMatt Gates 	h->transMethod = transMethod;
9281e1f7de0cSMatt Gates 
9282b9af4937SStephen M. Cameron 	if (!((trans_support & CFGTBL_Trans_io_accel1) ||
9283b9af4937SStephen M. Cameron 		(trans_support & CFGTBL_Trans_io_accel2)))
9284c706a795SRobert Elliott 		return 0;
9285e1f7de0cSMatt Gates 
9286b9af4937SStephen M. Cameron 	if (trans_support & CFGTBL_Trans_io_accel1) {
9287e1f7de0cSMatt Gates 		/* Set up I/O accelerator mode */
9288e1f7de0cSMatt Gates 		for (i = 0; i < h->nreply_queues; i++) {
9289e1f7de0cSMatt Gates 			writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX);
9290e1f7de0cSMatt Gates 			h->reply_queue[i].current_entry =
9291e1f7de0cSMatt Gates 				readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX);
9292e1f7de0cSMatt Gates 		}
9293283b4a9bSStephen M. Cameron 		bft[7] = h->ioaccel_maxsg + 8;
9294283b4a9bSStephen M. Cameron 		calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8,
9295e1f7de0cSMatt Gates 				h->ioaccel1_blockFetchTable);
9296e1f7de0cSMatt Gates 
9297e1f7de0cSMatt Gates 		/* initialize all reply queue entries to unused */
9298072b0518SStephen M. Cameron 		for (i = 0; i < h->nreply_queues; i++)
9299072b0518SStephen M. Cameron 			memset(h->reply_queue[i].head,
9300072b0518SStephen M. Cameron 				(u8) IOACCEL_MODE1_REPLY_UNUSED,
9301072b0518SStephen M. Cameron 				h->reply_queue_size);
9302e1f7de0cSMatt Gates 
9303e1f7de0cSMatt Gates 		/* set all the constant fields in the accelerator command
9304e1f7de0cSMatt Gates 		 * frames once at init time to save CPU cycles later.
9305e1f7de0cSMatt Gates 		 */
9306e1f7de0cSMatt Gates 		for (i = 0; i < h->nr_cmds; i++) {
9307e1f7de0cSMatt Gates 			struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i];
9308e1f7de0cSMatt Gates 
9309e1f7de0cSMatt Gates 			cp->function = IOACCEL1_FUNCTION_SCSIIO;
9310e1f7de0cSMatt Gates 			cp->err_info = (u32) (h->errinfo_pool_dhandle +
9311e1f7de0cSMatt Gates 					(i * sizeof(struct ErrorInfo)));
9312e1f7de0cSMatt Gates 			cp->err_info_len = sizeof(struct ErrorInfo);
9313e1f7de0cSMatt Gates 			cp->sgl_offset = IOACCEL1_SGLOFFSET;
93142b08b3e9SDon Brace 			cp->host_context_flags =
93152b08b3e9SDon Brace 				cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT);
9316e1f7de0cSMatt Gates 			cp->timeout_sec = 0;
9317e1f7de0cSMatt Gates 			cp->ReplyQueue = 0;
931850a0decfSStephen M. Cameron 			cp->tag =
9319f2405db8SDon Brace 				cpu_to_le64((i << DIRECT_LOOKUP_SHIFT));
932050a0decfSStephen M. Cameron 			cp->host_addr =
932150a0decfSStephen M. Cameron 				cpu_to_le64(h->ioaccel_cmd_pool_dhandle +
9322e1f7de0cSMatt Gates 					(i * sizeof(struct io_accel1_cmd)));
9323e1f7de0cSMatt Gates 		}
9324b9af4937SStephen M. Cameron 	} else if (trans_support & CFGTBL_Trans_io_accel2) {
9325b9af4937SStephen M. Cameron 		u64 cfg_offset, cfg_base_addr_index;
9326b9af4937SStephen M. Cameron 		u32 bft2_offset, cfg_base_addr;
9327b9af4937SStephen M. Cameron 
93281fc65919SLee Jones 		hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
9329b9af4937SStephen M. Cameron 				    &cfg_base_addr_index, &cfg_offset);
9330b9af4937SStephen M. Cameron 		BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64);
9331b9af4937SStephen M. Cameron 		bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ;
9332b9af4937SStephen M. Cameron 		calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg,
9333b9af4937SStephen M. Cameron 				4, h->ioaccel2_blockFetchTable);
9334b9af4937SStephen M. Cameron 		bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset);
9335b9af4937SStephen M. Cameron 		BUILD_BUG_ON(offsetof(struct CfgTable,
9336b9af4937SStephen M. Cameron 				io_accel_request_size_offset) != 0xb8);
9337b9af4937SStephen M. Cameron 		h->ioaccel2_bft2_regs =
9338b9af4937SStephen M. Cameron 			remap_pci_mem(pci_resource_start(h->pdev,
9339b9af4937SStephen M. Cameron 					cfg_base_addr_index) +
9340b9af4937SStephen M. Cameron 					cfg_offset + bft2_offset,
9341b9af4937SStephen M. Cameron 					ARRAY_SIZE(bft2) *
9342b9af4937SStephen M. Cameron 					sizeof(*h->ioaccel2_bft2_regs));
9343b9af4937SStephen M. Cameron 		for (i = 0; i < ARRAY_SIZE(bft2); i++)
9344b9af4937SStephen M. Cameron 			writel(bft2[i], &h->ioaccel2_bft2_regs[i]);
9345b9af4937SStephen M. Cameron 	}
9346b9af4937SStephen M. Cameron 	writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
9347c706a795SRobert Elliott 	if (hpsa_wait_for_mode_change_ack(h)) {
9348c706a795SRobert Elliott 		dev_err(&h->pdev->dev,
9349c706a795SRobert Elliott 			"performant mode problem - enabling ioaccel mode\n");
9350c706a795SRobert Elliott 		return -ENODEV;
9351c706a795SRobert Elliott 	}
9352c706a795SRobert Elliott 	return 0;
9353e1f7de0cSMatt Gates }
9354e1f7de0cSMatt Gates 
93551fb7c98aSRobert Elliott /* Free ioaccel1 mode command blocks and block fetch table */
93561fb7c98aSRobert Elliott static void hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info *h)
93571fb7c98aSRobert Elliott {
9358105a3dbcSRobert Elliott 	if (h->ioaccel_cmd_pool) {
93598f31fa53SSuraj Upadhyay 		dma_free_coherent(&h->pdev->dev,
93601fb7c98aSRobert Elliott 				  h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
93611fb7c98aSRobert Elliott 				  h->ioaccel_cmd_pool,
93621fb7c98aSRobert Elliott 				  h->ioaccel_cmd_pool_dhandle);
9363105a3dbcSRobert Elliott 		h->ioaccel_cmd_pool = NULL;
9364105a3dbcSRobert Elliott 		h->ioaccel_cmd_pool_dhandle = 0;
9365105a3dbcSRobert Elliott 	}
93661fb7c98aSRobert Elliott 	kfree(h->ioaccel1_blockFetchTable);
9367105a3dbcSRobert Elliott 	h->ioaccel1_blockFetchTable = NULL;
93681fb7c98aSRobert Elliott }
93691fb7c98aSRobert Elliott 
9370d37ffbe4SRobert Elliott /* Allocate ioaccel1 mode command blocks and block fetch table */
9371d37ffbe4SRobert Elliott static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h)
9372e1f7de0cSMatt Gates {
9373283b4a9bSStephen M. Cameron 	h->ioaccel_maxsg =
9374283b4a9bSStephen M. Cameron 		readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
9375283b4a9bSStephen M. Cameron 	if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES)
9376283b4a9bSStephen M. Cameron 		h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES;
9377283b4a9bSStephen M. Cameron 
9378e1f7de0cSMatt Gates 	/* Command structures must be aligned on a 128-byte boundary
9379e1f7de0cSMatt Gates 	 * because the 7 lower bits of the address are used by the
9380e1f7de0cSMatt Gates 	 * hardware.
9381e1f7de0cSMatt Gates 	 */
9382e1f7de0cSMatt Gates 	BUILD_BUG_ON(sizeof(struct io_accel1_cmd) %
9383e1f7de0cSMatt Gates 			IOACCEL1_COMMANDLIST_ALIGNMENT);
9384e1f7de0cSMatt Gates 	h->ioaccel_cmd_pool =
93858bc8f47eSChristoph Hellwig 		dma_alloc_coherent(&h->pdev->dev,
9386e1f7de0cSMatt Gates 			h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
93878bc8f47eSChristoph Hellwig 			&h->ioaccel_cmd_pool_dhandle, GFP_KERNEL);
9388e1f7de0cSMatt Gates 
9389e1f7de0cSMatt Gates 	h->ioaccel1_blockFetchTable =
9390283b4a9bSStephen M. Cameron 		kmalloc(((h->ioaccel_maxsg + 1) *
9391e1f7de0cSMatt Gates 				sizeof(u32)), GFP_KERNEL);
9392e1f7de0cSMatt Gates 
9393e1f7de0cSMatt Gates 	if ((h->ioaccel_cmd_pool == NULL) ||
9394e1f7de0cSMatt Gates 		(h->ioaccel1_blockFetchTable == NULL))
9395e1f7de0cSMatt Gates 		goto clean_up;
9396e1f7de0cSMatt Gates 
9397e1f7de0cSMatt Gates 	memset(h->ioaccel_cmd_pool, 0,
9398e1f7de0cSMatt Gates 		h->nr_cmds * sizeof(*h->ioaccel_cmd_pool));
9399e1f7de0cSMatt Gates 	return 0;
9400e1f7de0cSMatt Gates 
9401e1f7de0cSMatt Gates clean_up:
94021fb7c98aSRobert Elliott 	hpsa_free_ioaccel1_cmd_and_bft(h);
94032dd02d74SRobert Elliott 	return -ENOMEM;
94046c311b57SStephen M. Cameron }
94056c311b57SStephen M. Cameron 
94061fb7c98aSRobert Elliott /* Free ioaccel2 mode command blocks and block fetch table */
94071fb7c98aSRobert Elliott static void hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info *h)
94081fb7c98aSRobert Elliott {
9409d9a729f3SWebb Scales 	hpsa_free_ioaccel2_sg_chain_blocks(h);
9410d9a729f3SWebb Scales 
9411105a3dbcSRobert Elliott 	if (h->ioaccel2_cmd_pool) {
94128f31fa53SSuraj Upadhyay 		dma_free_coherent(&h->pdev->dev,
94131fb7c98aSRobert Elliott 				  h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
94141fb7c98aSRobert Elliott 				  h->ioaccel2_cmd_pool,
94151fb7c98aSRobert Elliott 				  h->ioaccel2_cmd_pool_dhandle);
9416105a3dbcSRobert Elliott 		h->ioaccel2_cmd_pool = NULL;
9417105a3dbcSRobert Elliott 		h->ioaccel2_cmd_pool_dhandle = 0;
9418105a3dbcSRobert Elliott 	}
94191fb7c98aSRobert Elliott 	kfree(h->ioaccel2_blockFetchTable);
9420105a3dbcSRobert Elliott 	h->ioaccel2_blockFetchTable = NULL;
94211fb7c98aSRobert Elliott }
94221fb7c98aSRobert Elliott 
9423d37ffbe4SRobert Elliott /* Allocate ioaccel2 mode command blocks and block fetch table */
9424d37ffbe4SRobert Elliott static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h)
9425aca9012aSStephen M. Cameron {
9426d9a729f3SWebb Scales 	int rc;
9427d9a729f3SWebb Scales 
9428aca9012aSStephen M. Cameron 	/* Allocate ioaccel2 mode command blocks and block fetch table */
9429aca9012aSStephen M. Cameron 
9430aca9012aSStephen M. Cameron 	h->ioaccel_maxsg =
9431aca9012aSStephen M. Cameron 		readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
9432aca9012aSStephen M. Cameron 	if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES)
9433aca9012aSStephen M. Cameron 		h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES;
9434aca9012aSStephen M. Cameron 
9435aca9012aSStephen M. Cameron 	BUILD_BUG_ON(sizeof(struct io_accel2_cmd) %
9436aca9012aSStephen M. Cameron 			IOACCEL2_COMMANDLIST_ALIGNMENT);
9437aca9012aSStephen M. Cameron 	h->ioaccel2_cmd_pool =
94388bc8f47eSChristoph Hellwig 		dma_alloc_coherent(&h->pdev->dev,
9439aca9012aSStephen M. Cameron 			h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
94408bc8f47eSChristoph Hellwig 			&h->ioaccel2_cmd_pool_dhandle, GFP_KERNEL);
9441aca9012aSStephen M. Cameron 
9442aca9012aSStephen M. Cameron 	h->ioaccel2_blockFetchTable =
9443aca9012aSStephen M. Cameron 		kmalloc(((h->ioaccel_maxsg + 1) *
9444aca9012aSStephen M. Cameron 				sizeof(u32)), GFP_KERNEL);
9445aca9012aSStephen M. Cameron 
9446aca9012aSStephen M. Cameron 	if ((h->ioaccel2_cmd_pool == NULL) ||
9447d9a729f3SWebb Scales 		(h->ioaccel2_blockFetchTable == NULL)) {
9448d9a729f3SWebb Scales 		rc = -ENOMEM;
9449d9a729f3SWebb Scales 		goto clean_up;
9450d9a729f3SWebb Scales 	}
9451d9a729f3SWebb Scales 
9452d9a729f3SWebb Scales 	rc = hpsa_allocate_ioaccel2_sg_chain_blocks(h);
9453d9a729f3SWebb Scales 	if (rc)
9454aca9012aSStephen M. Cameron 		goto clean_up;
9455aca9012aSStephen M. Cameron 
9456aca9012aSStephen M. Cameron 	memset(h->ioaccel2_cmd_pool, 0,
9457aca9012aSStephen M. Cameron 		h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool));
9458aca9012aSStephen M. Cameron 	return 0;
9459aca9012aSStephen M. Cameron 
9460aca9012aSStephen M. Cameron clean_up:
94611fb7c98aSRobert Elliott 	hpsa_free_ioaccel2_cmd_and_bft(h);
9462d9a729f3SWebb Scales 	return rc;
9463aca9012aSStephen M. Cameron }
9464aca9012aSStephen M. Cameron 
9465105a3dbcSRobert Elliott /* Free items allocated by hpsa_put_ctlr_into_performant_mode */
9466105a3dbcSRobert Elliott static void hpsa_free_performant_mode(struct ctlr_info *h)
9467105a3dbcSRobert Elliott {
9468105a3dbcSRobert Elliott 	kfree(h->blockFetchTable);
9469105a3dbcSRobert Elliott 	h->blockFetchTable = NULL;
9470105a3dbcSRobert Elliott 	hpsa_free_reply_queues(h);
9471105a3dbcSRobert Elliott 	hpsa_free_ioaccel1_cmd_and_bft(h);
9472105a3dbcSRobert Elliott 	hpsa_free_ioaccel2_cmd_and_bft(h);
9473105a3dbcSRobert Elliott }
9474105a3dbcSRobert Elliott 
9475105a3dbcSRobert Elliott /* return -ENODEV on error, 0 on success (or no action)
9476105a3dbcSRobert Elliott  * allocates numerous items that must be freed later
9477105a3dbcSRobert Elliott  */
9478105a3dbcSRobert Elliott static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
94796c311b57SStephen M. Cameron {
94806c311b57SStephen M. Cameron 	u32 trans_support;
9481e1f7de0cSMatt Gates 	unsigned long transMethod = CFGTBL_Trans_Performant |
9482e1f7de0cSMatt Gates 					CFGTBL_Trans_use_short_tags;
9483105a3dbcSRobert Elliott 	int i, rc;
94846c311b57SStephen M. Cameron 
948502ec19c8SStephen M. Cameron 	if (hpsa_simple_mode)
9486105a3dbcSRobert Elliott 		return 0;
948702ec19c8SStephen M. Cameron 
948867c99a72Sscameron@beardog.cce.hp.com 	trans_support = readl(&(h->cfgtable->TransportSupport));
948967c99a72Sscameron@beardog.cce.hp.com 	if (!(trans_support & PERFORMANT_MODE))
9490105a3dbcSRobert Elliott 		return 0;
949167c99a72Sscameron@beardog.cce.hp.com 
9492e1f7de0cSMatt Gates 	/* Check for I/O accelerator mode support */
9493e1f7de0cSMatt Gates 	if (trans_support & CFGTBL_Trans_io_accel1) {
9494e1f7de0cSMatt Gates 		transMethod |= CFGTBL_Trans_io_accel1 |
9495e1f7de0cSMatt Gates 				CFGTBL_Trans_enable_directed_msix;
9496105a3dbcSRobert Elliott 		rc = hpsa_alloc_ioaccel1_cmd_and_bft(h);
9497105a3dbcSRobert Elliott 		if (rc)
9498105a3dbcSRobert Elliott 			return rc;
9499105a3dbcSRobert Elliott 	} else if (trans_support & CFGTBL_Trans_io_accel2) {
9500aca9012aSStephen M. Cameron 		transMethod |= CFGTBL_Trans_io_accel2 |
9501aca9012aSStephen M. Cameron 				CFGTBL_Trans_enable_directed_msix;
9502105a3dbcSRobert Elliott 		rc = hpsa_alloc_ioaccel2_cmd_and_bft(h);
9503105a3dbcSRobert Elliott 		if (rc)
9504105a3dbcSRobert Elliott 			return rc;
9505e1f7de0cSMatt Gates 	}
9506e1f7de0cSMatt Gates 
9507bc2bb154SChristoph Hellwig 	h->nreply_queues = h->msix_vectors > 0 ? h->msix_vectors : 1;
9508cba3d38bSStephen M. Cameron 	hpsa_get_max_perf_mode_cmds(h);
95096c311b57SStephen M. Cameron 	/* Performant mode ring buffer and supporting data structures */
9510072b0518SStephen M. Cameron 	h->reply_queue_size = h->max_commands * sizeof(u64);
95116c311b57SStephen M. Cameron 
9512254f796bSMatt Gates 	for (i = 0; i < h->nreply_queues; i++) {
95138bc8f47eSChristoph Hellwig 		h->reply_queue[i].head = dma_alloc_coherent(&h->pdev->dev,
9514072b0518SStephen M. Cameron 						h->reply_queue_size,
95158bc8f47eSChristoph Hellwig 						&h->reply_queue[i].busaddr,
95168bc8f47eSChristoph Hellwig 						GFP_KERNEL);
9517105a3dbcSRobert Elliott 		if (!h->reply_queue[i].head) {
9518105a3dbcSRobert Elliott 			rc = -ENOMEM;
9519105a3dbcSRobert Elliott 			goto clean1;	/* rq, ioaccel */
9520105a3dbcSRobert Elliott 		}
9521254f796bSMatt Gates 		h->reply_queue[i].size = h->max_commands;
9522254f796bSMatt Gates 		h->reply_queue[i].wraparound = 1;  /* spec: init to 1 */
9523254f796bSMatt Gates 		h->reply_queue[i].current_entry = 0;
9524254f796bSMatt Gates 	}
9525254f796bSMatt Gates 
95266c311b57SStephen M. Cameron 	/* Need a block fetch table for performant mode */
9527d66ae08bSStephen M. Cameron 	h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
95286c311b57SStephen M. Cameron 				sizeof(u32)), GFP_KERNEL);
9529105a3dbcSRobert Elliott 	if (!h->blockFetchTable) {
9530105a3dbcSRobert Elliott 		rc = -ENOMEM;
9531105a3dbcSRobert Elliott 		goto clean1;	/* rq, ioaccel */
9532105a3dbcSRobert Elliott 	}
95336c311b57SStephen M. Cameron 
9534105a3dbcSRobert Elliott 	rc = hpsa_enter_performant_mode(h, trans_support);
9535105a3dbcSRobert Elliott 	if (rc)
9536105a3dbcSRobert Elliott 		goto clean2;	/* bft, rq, ioaccel */
9537105a3dbcSRobert Elliott 	return 0;
9538303932fdSDon Brace 
9539105a3dbcSRobert Elliott clean2:	/* bft, rq, ioaccel */
9540303932fdSDon Brace 	kfree(h->blockFetchTable);
9541105a3dbcSRobert Elliott 	h->blockFetchTable = NULL;
9542105a3dbcSRobert Elliott clean1:	/* rq, ioaccel */
9543105a3dbcSRobert Elliott 	hpsa_free_reply_queues(h);
9544105a3dbcSRobert Elliott 	hpsa_free_ioaccel1_cmd_and_bft(h);
9545105a3dbcSRobert Elliott 	hpsa_free_ioaccel2_cmd_and_bft(h);
9546105a3dbcSRobert Elliott 	return rc;
9547303932fdSDon Brace }
9548303932fdSDon Brace 
954923100dd9SStephen M. Cameron static int is_accelerated_cmd(struct CommandList *c)
955076438d08SStephen M. Cameron {
955123100dd9SStephen M. Cameron 	return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2;
955223100dd9SStephen M. Cameron }
955323100dd9SStephen M. Cameron 
955423100dd9SStephen M. Cameron static void hpsa_drain_accel_commands(struct ctlr_info *h)
955523100dd9SStephen M. Cameron {
955623100dd9SStephen M. Cameron 	struct CommandList *c = NULL;
9557f2405db8SDon Brace 	int i, accel_cmds_out;
9558281a7fd0SWebb Scales 	int refcount;
955976438d08SStephen M. Cameron 
9560f2405db8SDon Brace 	do { /* wait for all outstanding ioaccel commands to drain out */
956123100dd9SStephen M. Cameron 		accel_cmds_out = 0;
9562f2405db8SDon Brace 		for (i = 0; i < h->nr_cmds; i++) {
9563f2405db8SDon Brace 			c = h->cmd_pool + i;
9564281a7fd0SWebb Scales 			refcount = atomic_inc_return(&c->refcount);
9565281a7fd0SWebb Scales 			if (refcount > 1) /* Command is allocated */
956623100dd9SStephen M. Cameron 				accel_cmds_out += is_accelerated_cmd(c);
9567281a7fd0SWebb Scales 			cmd_free(h, c);
9568f2405db8SDon Brace 		}
956923100dd9SStephen M. Cameron 		if (accel_cmds_out <= 0)
957076438d08SStephen M. Cameron 			break;
957176438d08SStephen M. Cameron 		msleep(100);
957276438d08SStephen M. Cameron 	} while (1);
957376438d08SStephen M. Cameron }
957476438d08SStephen M. Cameron 
9575d04e62b9SKevin Barnett static struct hpsa_sas_phy *hpsa_alloc_sas_phy(
9576d04e62b9SKevin Barnett 				struct hpsa_sas_port *hpsa_sas_port)
9577d04e62b9SKevin Barnett {
9578d04e62b9SKevin Barnett 	struct hpsa_sas_phy *hpsa_sas_phy;
9579d04e62b9SKevin Barnett 	struct sas_phy *phy;
9580d04e62b9SKevin Barnett 
9581d04e62b9SKevin Barnett 	hpsa_sas_phy = kzalloc(sizeof(*hpsa_sas_phy), GFP_KERNEL);
9582d04e62b9SKevin Barnett 	if (!hpsa_sas_phy)
9583d04e62b9SKevin Barnett 		return NULL;
9584d04e62b9SKevin Barnett 
9585d04e62b9SKevin Barnett 	phy = sas_phy_alloc(hpsa_sas_port->parent_node->parent_dev,
9586d04e62b9SKevin Barnett 		hpsa_sas_port->next_phy_index);
9587d04e62b9SKevin Barnett 	if (!phy) {
9588d04e62b9SKevin Barnett 		kfree(hpsa_sas_phy);
9589d04e62b9SKevin Barnett 		return NULL;
9590d04e62b9SKevin Barnett 	}
9591d04e62b9SKevin Barnett 
9592d04e62b9SKevin Barnett 	hpsa_sas_port->next_phy_index++;
9593d04e62b9SKevin Barnett 	hpsa_sas_phy->phy = phy;
9594d04e62b9SKevin Barnett 	hpsa_sas_phy->parent_port = hpsa_sas_port;
9595d04e62b9SKevin Barnett 
9596d04e62b9SKevin Barnett 	return hpsa_sas_phy;
9597d04e62b9SKevin Barnett }
9598d04e62b9SKevin Barnett 
9599d04e62b9SKevin Barnett static void hpsa_free_sas_phy(struct hpsa_sas_phy *hpsa_sas_phy)
9600d04e62b9SKevin Barnett {
9601d04e62b9SKevin Barnett 	struct sas_phy *phy = hpsa_sas_phy->phy;
9602d04e62b9SKevin Barnett 
9603d04e62b9SKevin Barnett 	sas_port_delete_phy(hpsa_sas_phy->parent_port->port, phy);
9604d04e62b9SKevin Barnett 	if (hpsa_sas_phy->added_to_port)
9605d04e62b9SKevin Barnett 		list_del(&hpsa_sas_phy->phy_list_entry);
960655ca38b4SMartin Wilck 	sas_phy_delete(phy);
9607d04e62b9SKevin Barnett 	kfree(hpsa_sas_phy);
9608d04e62b9SKevin Barnett }
9609d04e62b9SKevin Barnett 
9610d04e62b9SKevin Barnett static int hpsa_sas_port_add_phy(struct hpsa_sas_phy *hpsa_sas_phy)
9611d04e62b9SKevin Barnett {
9612d04e62b9SKevin Barnett 	int rc;
9613d04e62b9SKevin Barnett 	struct hpsa_sas_port *hpsa_sas_port;
9614d04e62b9SKevin Barnett 	struct sas_phy *phy;
9615d04e62b9SKevin Barnett 	struct sas_identify *identify;
9616d04e62b9SKevin Barnett 
9617d04e62b9SKevin Barnett 	hpsa_sas_port = hpsa_sas_phy->parent_port;
9618d04e62b9SKevin Barnett 	phy = hpsa_sas_phy->phy;
9619d04e62b9SKevin Barnett 
9620d04e62b9SKevin Barnett 	identify = &phy->identify;
9621d04e62b9SKevin Barnett 	memset(identify, 0, sizeof(*identify));
9622d04e62b9SKevin Barnett 	identify->sas_address = hpsa_sas_port->sas_address;
9623d04e62b9SKevin Barnett 	identify->device_type = SAS_END_DEVICE;
9624d04e62b9SKevin Barnett 	identify->initiator_port_protocols = SAS_PROTOCOL_STP;
9625d04e62b9SKevin Barnett 	identify->target_port_protocols = SAS_PROTOCOL_STP;
9626d04e62b9SKevin Barnett 	phy->minimum_linkrate_hw = SAS_LINK_RATE_UNKNOWN;
9627d04e62b9SKevin Barnett 	phy->maximum_linkrate_hw = SAS_LINK_RATE_UNKNOWN;
9628d04e62b9SKevin Barnett 	phy->minimum_linkrate = SAS_LINK_RATE_UNKNOWN;
9629d04e62b9SKevin Barnett 	phy->maximum_linkrate = SAS_LINK_RATE_UNKNOWN;
9630d04e62b9SKevin Barnett 	phy->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN;
9631d04e62b9SKevin Barnett 
9632d04e62b9SKevin Barnett 	rc = sas_phy_add(hpsa_sas_phy->phy);
9633d04e62b9SKevin Barnett 	if (rc)
9634d04e62b9SKevin Barnett 		return rc;
9635d04e62b9SKevin Barnett 
9636d04e62b9SKevin Barnett 	sas_port_add_phy(hpsa_sas_port->port, hpsa_sas_phy->phy);
9637d04e62b9SKevin Barnett 	list_add_tail(&hpsa_sas_phy->phy_list_entry,
9638d04e62b9SKevin Barnett 			&hpsa_sas_port->phy_list_head);
9639d04e62b9SKevin Barnett 	hpsa_sas_phy->added_to_port = true;
9640d04e62b9SKevin Barnett 
9641d04e62b9SKevin Barnett 	return 0;
9642d04e62b9SKevin Barnett }
9643d04e62b9SKevin Barnett 
9644d04e62b9SKevin Barnett static int
9645d04e62b9SKevin Barnett 	hpsa_sas_port_add_rphy(struct hpsa_sas_port *hpsa_sas_port,
9646d04e62b9SKevin Barnett 				struct sas_rphy *rphy)
9647d04e62b9SKevin Barnett {
9648d04e62b9SKevin Barnett 	struct sas_identify *identify;
9649d04e62b9SKevin Barnett 
9650d04e62b9SKevin Barnett 	identify = &rphy->identify;
9651d04e62b9SKevin Barnett 	identify->sas_address = hpsa_sas_port->sas_address;
9652d04e62b9SKevin Barnett 	identify->initiator_port_protocols = SAS_PROTOCOL_STP;
9653d04e62b9SKevin Barnett 	identify->target_port_protocols = SAS_PROTOCOL_STP;
9654d04e62b9SKevin Barnett 
9655d04e62b9SKevin Barnett 	return sas_rphy_add(rphy);
9656d04e62b9SKevin Barnett }
9657d04e62b9SKevin Barnett 
9658d04e62b9SKevin Barnett static struct hpsa_sas_port
9659d04e62b9SKevin Barnett 	*hpsa_alloc_sas_port(struct hpsa_sas_node *hpsa_sas_node,
9660d04e62b9SKevin Barnett 				u64 sas_address)
9661d04e62b9SKevin Barnett {
9662d04e62b9SKevin Barnett 	int rc;
9663d04e62b9SKevin Barnett 	struct hpsa_sas_port *hpsa_sas_port;
9664d04e62b9SKevin Barnett 	struct sas_port *port;
9665d04e62b9SKevin Barnett 
9666d04e62b9SKevin Barnett 	hpsa_sas_port = kzalloc(sizeof(*hpsa_sas_port), GFP_KERNEL);
9667d04e62b9SKevin Barnett 	if (!hpsa_sas_port)
9668d04e62b9SKevin Barnett 		return NULL;
9669d04e62b9SKevin Barnett 
9670d04e62b9SKevin Barnett 	INIT_LIST_HEAD(&hpsa_sas_port->phy_list_head);
9671d04e62b9SKevin Barnett 	hpsa_sas_port->parent_node = hpsa_sas_node;
9672d04e62b9SKevin Barnett 
9673d04e62b9SKevin Barnett 	port = sas_port_alloc_num(hpsa_sas_node->parent_dev);
9674d04e62b9SKevin Barnett 	if (!port)
9675d04e62b9SKevin Barnett 		goto free_hpsa_port;
9676d04e62b9SKevin Barnett 
9677d04e62b9SKevin Barnett 	rc = sas_port_add(port);
9678d04e62b9SKevin Barnett 	if (rc)
9679d04e62b9SKevin Barnett 		goto free_sas_port;
9680d04e62b9SKevin Barnett 
9681d04e62b9SKevin Barnett 	hpsa_sas_port->port = port;
9682d04e62b9SKevin Barnett 	hpsa_sas_port->sas_address = sas_address;
9683d04e62b9SKevin Barnett 	list_add_tail(&hpsa_sas_port->port_list_entry,
9684d04e62b9SKevin Barnett 			&hpsa_sas_node->port_list_head);
9685d04e62b9SKevin Barnett 
9686d04e62b9SKevin Barnett 	return hpsa_sas_port;
9687d04e62b9SKevin Barnett 
9688d04e62b9SKevin Barnett free_sas_port:
9689d04e62b9SKevin Barnett 	sas_port_free(port);
9690d04e62b9SKevin Barnett free_hpsa_port:
9691d04e62b9SKevin Barnett 	kfree(hpsa_sas_port);
9692d04e62b9SKevin Barnett 
9693d04e62b9SKevin Barnett 	return NULL;
9694d04e62b9SKevin Barnett }
9695d04e62b9SKevin Barnett 
9696d04e62b9SKevin Barnett static void hpsa_free_sas_port(struct hpsa_sas_port *hpsa_sas_port)
9697d04e62b9SKevin Barnett {
9698d04e62b9SKevin Barnett 	struct hpsa_sas_phy *hpsa_sas_phy;
9699d04e62b9SKevin Barnett 	struct hpsa_sas_phy *next;
9700d04e62b9SKevin Barnett 
9701d04e62b9SKevin Barnett 	list_for_each_entry_safe(hpsa_sas_phy, next,
9702d04e62b9SKevin Barnett 			&hpsa_sas_port->phy_list_head, phy_list_entry)
9703d04e62b9SKevin Barnett 		hpsa_free_sas_phy(hpsa_sas_phy);
9704d04e62b9SKevin Barnett 
9705d04e62b9SKevin Barnett 	sas_port_delete(hpsa_sas_port->port);
9706d04e62b9SKevin Barnett 	list_del(&hpsa_sas_port->port_list_entry);
9707d04e62b9SKevin Barnett 	kfree(hpsa_sas_port);
9708d04e62b9SKevin Barnett }
9709d04e62b9SKevin Barnett 
9710d04e62b9SKevin Barnett static struct hpsa_sas_node *hpsa_alloc_sas_node(struct device *parent_dev)
9711d04e62b9SKevin Barnett {
9712d04e62b9SKevin Barnett 	struct hpsa_sas_node *hpsa_sas_node;
9713d04e62b9SKevin Barnett 
9714d04e62b9SKevin Barnett 	hpsa_sas_node = kzalloc(sizeof(*hpsa_sas_node), GFP_KERNEL);
9715d04e62b9SKevin Barnett 	if (hpsa_sas_node) {
9716d04e62b9SKevin Barnett 		hpsa_sas_node->parent_dev = parent_dev;
9717d04e62b9SKevin Barnett 		INIT_LIST_HEAD(&hpsa_sas_node->port_list_head);
9718d04e62b9SKevin Barnett 	}
9719d04e62b9SKevin Barnett 
9720d04e62b9SKevin Barnett 	return hpsa_sas_node;
9721d04e62b9SKevin Barnett }
9722d04e62b9SKevin Barnett 
9723d04e62b9SKevin Barnett static void hpsa_free_sas_node(struct hpsa_sas_node *hpsa_sas_node)
9724d04e62b9SKevin Barnett {
9725d04e62b9SKevin Barnett 	struct hpsa_sas_port *hpsa_sas_port;
9726d04e62b9SKevin Barnett 	struct hpsa_sas_port *next;
9727d04e62b9SKevin Barnett 
9728d04e62b9SKevin Barnett 	if (!hpsa_sas_node)
9729d04e62b9SKevin Barnett 		return;
9730d04e62b9SKevin Barnett 
9731d04e62b9SKevin Barnett 	list_for_each_entry_safe(hpsa_sas_port, next,
9732d04e62b9SKevin Barnett 			&hpsa_sas_node->port_list_head, port_list_entry)
9733d04e62b9SKevin Barnett 		hpsa_free_sas_port(hpsa_sas_port);
9734d04e62b9SKevin Barnett 
9735d04e62b9SKevin Barnett 	kfree(hpsa_sas_node);
9736d04e62b9SKevin Barnett }
9737d04e62b9SKevin Barnett 
9738d04e62b9SKevin Barnett static struct hpsa_scsi_dev_t
9739d04e62b9SKevin Barnett 	*hpsa_find_device_by_sas_rphy(struct ctlr_info *h,
9740d04e62b9SKevin Barnett 					struct sas_rphy *rphy)
9741d04e62b9SKevin Barnett {
9742d04e62b9SKevin Barnett 	int i;
9743d04e62b9SKevin Barnett 	struct hpsa_scsi_dev_t *device;
9744d04e62b9SKevin Barnett 
9745d04e62b9SKevin Barnett 	for (i = 0; i < h->ndevices; i++) {
9746d04e62b9SKevin Barnett 		device = h->dev[i];
9747d04e62b9SKevin Barnett 		if (!device->sas_port)
9748d04e62b9SKevin Barnett 			continue;
9749d04e62b9SKevin Barnett 		if (device->sas_port->rphy == rphy)
9750d04e62b9SKevin Barnett 			return device;
9751d04e62b9SKevin Barnett 	}
9752d04e62b9SKevin Barnett 
9753d04e62b9SKevin Barnett 	return NULL;
9754d04e62b9SKevin Barnett }
9755d04e62b9SKevin Barnett 
9756d04e62b9SKevin Barnett static int hpsa_add_sas_host(struct ctlr_info *h)
9757d04e62b9SKevin Barnett {
9758d04e62b9SKevin Barnett 	int rc;
9759d04e62b9SKevin Barnett 	struct device *parent_dev;
9760d04e62b9SKevin Barnett 	struct hpsa_sas_node *hpsa_sas_node;
9761d04e62b9SKevin Barnett 	struct hpsa_sas_port *hpsa_sas_port;
9762d04e62b9SKevin Barnett 	struct hpsa_sas_phy *hpsa_sas_phy;
9763d04e62b9SKevin Barnett 
97640a7c3bb8SDon Brace 	parent_dev = &h->scsi_host->shost_dev;
9765d04e62b9SKevin Barnett 
9766d04e62b9SKevin Barnett 	hpsa_sas_node = hpsa_alloc_sas_node(parent_dev);
9767d04e62b9SKevin Barnett 	if (!hpsa_sas_node)
9768d04e62b9SKevin Barnett 		return -ENOMEM;
9769d04e62b9SKevin Barnett 
9770d04e62b9SKevin Barnett 	hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, h->sas_address);
9771d04e62b9SKevin Barnett 	if (!hpsa_sas_port) {
9772d04e62b9SKevin Barnett 		rc = -ENODEV;
9773d04e62b9SKevin Barnett 		goto free_sas_node;
9774d04e62b9SKevin Barnett 	}
9775d04e62b9SKevin Barnett 
9776d04e62b9SKevin Barnett 	hpsa_sas_phy = hpsa_alloc_sas_phy(hpsa_sas_port);
9777d04e62b9SKevin Barnett 	if (!hpsa_sas_phy) {
9778d04e62b9SKevin Barnett 		rc = -ENODEV;
9779d04e62b9SKevin Barnett 		goto free_sas_port;
9780d04e62b9SKevin Barnett 	}
9781d04e62b9SKevin Barnett 
9782d04e62b9SKevin Barnett 	rc = hpsa_sas_port_add_phy(hpsa_sas_phy);
9783d04e62b9SKevin Barnett 	if (rc)
9784d04e62b9SKevin Barnett 		goto free_sas_phy;
9785d04e62b9SKevin Barnett 
9786d04e62b9SKevin Barnett 	h->sas_host = hpsa_sas_node;
9787d04e62b9SKevin Barnett 
9788d04e62b9SKevin Barnett 	return 0;
9789d04e62b9SKevin Barnett 
9790d04e62b9SKevin Barnett free_sas_phy:
9791d04e62b9SKevin Barnett 	hpsa_free_sas_phy(hpsa_sas_phy);
9792d04e62b9SKevin Barnett free_sas_port:
9793d04e62b9SKevin Barnett 	hpsa_free_sas_port(hpsa_sas_port);
9794d04e62b9SKevin Barnett free_sas_node:
9795d04e62b9SKevin Barnett 	hpsa_free_sas_node(hpsa_sas_node);
9796d04e62b9SKevin Barnett 
9797d04e62b9SKevin Barnett 	return rc;
9798d04e62b9SKevin Barnett }
9799d04e62b9SKevin Barnett 
9800d04e62b9SKevin Barnett static void hpsa_delete_sas_host(struct ctlr_info *h)
9801d04e62b9SKevin Barnett {
9802d04e62b9SKevin Barnett 	hpsa_free_sas_node(h->sas_host);
9803d04e62b9SKevin Barnett }
9804d04e62b9SKevin Barnett 
9805d04e62b9SKevin Barnett static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node,
9806d04e62b9SKevin Barnett 				struct hpsa_scsi_dev_t *device)
9807d04e62b9SKevin Barnett {
9808d04e62b9SKevin Barnett 	int rc;
9809d04e62b9SKevin Barnett 	struct hpsa_sas_port *hpsa_sas_port;
9810d04e62b9SKevin Barnett 	struct sas_rphy *rphy;
9811d04e62b9SKevin Barnett 
9812d04e62b9SKevin Barnett 	hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, device->sas_address);
9813d04e62b9SKevin Barnett 	if (!hpsa_sas_port)
9814d04e62b9SKevin Barnett 		return -ENOMEM;
9815d04e62b9SKevin Barnett 
9816d04e62b9SKevin Barnett 	rphy = sas_end_device_alloc(hpsa_sas_port->port);
9817d04e62b9SKevin Barnett 	if (!rphy) {
9818d04e62b9SKevin Barnett 		rc = -ENODEV;
9819d04e62b9SKevin Barnett 		goto free_sas_port;
9820d04e62b9SKevin Barnett 	}
9821d04e62b9SKevin Barnett 
9822d04e62b9SKevin Barnett 	hpsa_sas_port->rphy = rphy;
9823d04e62b9SKevin Barnett 	device->sas_port = hpsa_sas_port;
9824d04e62b9SKevin Barnett 
9825d04e62b9SKevin Barnett 	rc = hpsa_sas_port_add_rphy(hpsa_sas_port, rphy);
9826d04e62b9SKevin Barnett 	if (rc)
9827d04e62b9SKevin Barnett 		goto free_sas_port;
9828d04e62b9SKevin Barnett 
9829d04e62b9SKevin Barnett 	return 0;
9830d04e62b9SKevin Barnett 
9831d04e62b9SKevin Barnett free_sas_port:
9832d04e62b9SKevin Barnett 	hpsa_free_sas_port(hpsa_sas_port);
9833d04e62b9SKevin Barnett 	device->sas_port = NULL;
9834d04e62b9SKevin Barnett 
9835d04e62b9SKevin Barnett 	return rc;
9836d04e62b9SKevin Barnett }
9837d04e62b9SKevin Barnett 
9838d04e62b9SKevin Barnett static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device)
9839d04e62b9SKevin Barnett {
9840d04e62b9SKevin Barnett 	if (device->sas_port) {
9841d04e62b9SKevin Barnett 		hpsa_free_sas_port(device->sas_port);
9842d04e62b9SKevin Barnett 		device->sas_port = NULL;
9843d04e62b9SKevin Barnett 	}
9844d04e62b9SKevin Barnett }
9845d04e62b9SKevin Barnett 
9846d04e62b9SKevin Barnett static int
9847d04e62b9SKevin Barnett hpsa_sas_get_linkerrors(struct sas_phy *phy)
9848d04e62b9SKevin Barnett {
9849d04e62b9SKevin Barnett 	return 0;
9850d04e62b9SKevin Barnett }
9851d04e62b9SKevin Barnett 
9852d04e62b9SKevin Barnett static int
9853d04e62b9SKevin Barnett hpsa_sas_get_enclosure_identifier(struct sas_rphy *rphy, u64 *identifier)
9854d04e62b9SKevin Barnett {
985501d0e789SDon Brace 	struct Scsi_Host *shost = phy_to_shost(rphy);
985601d0e789SDon Brace 	struct ctlr_info *h;
985701d0e789SDon Brace 	struct hpsa_scsi_dev_t *sd;
985801d0e789SDon Brace 
985901d0e789SDon Brace 	if (!shost)
986001d0e789SDon Brace 		return -ENXIO;
986101d0e789SDon Brace 
986201d0e789SDon Brace 	h = shost_to_hba(shost);
986301d0e789SDon Brace 
986401d0e789SDon Brace 	if (!h)
986501d0e789SDon Brace 		return -ENXIO;
986601d0e789SDon Brace 
986701d0e789SDon Brace 	sd = hpsa_find_device_by_sas_rphy(h, rphy);
986801d0e789SDon Brace 	if (!sd)
986901d0e789SDon Brace 		return -ENXIO;
987001d0e789SDon Brace 
987101d0e789SDon Brace 	*identifier = sd->eli;
987201d0e789SDon Brace 
9873d04e62b9SKevin Barnett 	return 0;
9874d04e62b9SKevin Barnett }
9875d04e62b9SKevin Barnett 
9876d04e62b9SKevin Barnett static int
9877d04e62b9SKevin Barnett hpsa_sas_get_bay_identifier(struct sas_rphy *rphy)
9878d04e62b9SKevin Barnett {
9879d04e62b9SKevin Barnett 	return -ENXIO;
9880d04e62b9SKevin Barnett }
9881d04e62b9SKevin Barnett 
9882d04e62b9SKevin Barnett static int
9883d04e62b9SKevin Barnett hpsa_sas_phy_reset(struct sas_phy *phy, int hard_reset)
9884d04e62b9SKevin Barnett {
9885d04e62b9SKevin Barnett 	return 0;
9886d04e62b9SKevin Barnett }
9887d04e62b9SKevin Barnett 
9888d04e62b9SKevin Barnett static int
9889d04e62b9SKevin Barnett hpsa_sas_phy_enable(struct sas_phy *phy, int enable)
9890d04e62b9SKevin Barnett {
9891d04e62b9SKevin Barnett 	return 0;
9892d04e62b9SKevin Barnett }
9893d04e62b9SKevin Barnett 
9894d04e62b9SKevin Barnett static int
9895d04e62b9SKevin Barnett hpsa_sas_phy_setup(struct sas_phy *phy)
9896d04e62b9SKevin Barnett {
9897d04e62b9SKevin Barnett 	return 0;
9898d04e62b9SKevin Barnett }
9899d04e62b9SKevin Barnett 
9900d04e62b9SKevin Barnett static void
9901d04e62b9SKevin Barnett hpsa_sas_phy_release(struct sas_phy *phy)
9902d04e62b9SKevin Barnett {
9903d04e62b9SKevin Barnett }
9904d04e62b9SKevin Barnett 
9905d04e62b9SKevin Barnett static int
9906d04e62b9SKevin Barnett hpsa_sas_phy_speed(struct sas_phy *phy, struct sas_phy_linkrates *rates)
9907d04e62b9SKevin Barnett {
9908d04e62b9SKevin Barnett 	return -EINVAL;
9909d04e62b9SKevin Barnett }
9910d04e62b9SKevin Barnett 
9911d04e62b9SKevin Barnett static struct sas_function_template hpsa_sas_transport_functions = {
9912d04e62b9SKevin Barnett 	.get_linkerrors = hpsa_sas_get_linkerrors,
9913d04e62b9SKevin Barnett 	.get_enclosure_identifier = hpsa_sas_get_enclosure_identifier,
9914d04e62b9SKevin Barnett 	.get_bay_identifier = hpsa_sas_get_bay_identifier,
9915d04e62b9SKevin Barnett 	.phy_reset = hpsa_sas_phy_reset,
9916d04e62b9SKevin Barnett 	.phy_enable = hpsa_sas_phy_enable,
9917d04e62b9SKevin Barnett 	.phy_setup = hpsa_sas_phy_setup,
9918d04e62b9SKevin Barnett 	.phy_release = hpsa_sas_phy_release,
9919d04e62b9SKevin Barnett 	.set_phy_speed = hpsa_sas_phy_speed,
9920d04e62b9SKevin Barnett };
9921d04e62b9SKevin Barnett 
9922edd16368SStephen M. Cameron /*
9923edd16368SStephen M. Cameron  *  This is it.  Register the PCI driver information for the cards we control
9924edd16368SStephen M. Cameron  *  the OS will call our registered routines when it finds one of our cards.
9925edd16368SStephen M. Cameron  */
9926edd16368SStephen M. Cameron static int __init hpsa_init(void)
9927edd16368SStephen M. Cameron {
9928d04e62b9SKevin Barnett 	int rc;
9929d04e62b9SKevin Barnett 
9930d04e62b9SKevin Barnett 	hpsa_sas_transport_template =
9931d04e62b9SKevin Barnett 		sas_attach_transport(&hpsa_sas_transport_functions);
9932d04e62b9SKevin Barnett 	if (!hpsa_sas_transport_template)
9933d04e62b9SKevin Barnett 		return -ENODEV;
9934d04e62b9SKevin Barnett 
9935d04e62b9SKevin Barnett 	rc = pci_register_driver(&hpsa_pci_driver);
9936d04e62b9SKevin Barnett 
9937d04e62b9SKevin Barnett 	if (rc)
9938d04e62b9SKevin Barnett 		sas_release_transport(hpsa_sas_transport_template);
9939d04e62b9SKevin Barnett 
9940d04e62b9SKevin Barnett 	return rc;
9941edd16368SStephen M. Cameron }
9942edd16368SStephen M. Cameron 
9943edd16368SStephen M. Cameron static void __exit hpsa_cleanup(void)
9944edd16368SStephen M. Cameron {
9945edd16368SStephen M. Cameron 	pci_unregister_driver(&hpsa_pci_driver);
9946d04e62b9SKevin Barnett 	sas_release_transport(hpsa_sas_transport_template);
9947edd16368SStephen M. Cameron }
9948edd16368SStephen M. Cameron 
9949e1f7de0cSMatt Gates static void __attribute__((unused)) verify_offsets(void)
9950e1f7de0cSMatt Gates {
9951e1f7de0cSMatt Gates #define VERIFY_OFFSET(member, offset) \
9952dd0e19f3SScott Teel 	BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset)
9953dd0e19f3SScott Teel 
9954dd0e19f3SScott Teel 	VERIFY_OFFSET(structure_size, 0);
9955dd0e19f3SScott Teel 	VERIFY_OFFSET(volume_blk_size, 4);
9956dd0e19f3SScott Teel 	VERIFY_OFFSET(volume_blk_cnt, 8);
9957dd0e19f3SScott Teel 	VERIFY_OFFSET(phys_blk_shift, 16);
9958dd0e19f3SScott Teel 	VERIFY_OFFSET(parity_rotation_shift, 17);
9959dd0e19f3SScott Teel 	VERIFY_OFFSET(strip_size, 18);
9960dd0e19f3SScott Teel 	VERIFY_OFFSET(disk_starting_blk, 20);
9961dd0e19f3SScott Teel 	VERIFY_OFFSET(disk_blk_cnt, 28);
9962dd0e19f3SScott Teel 	VERIFY_OFFSET(data_disks_per_row, 36);
9963dd0e19f3SScott Teel 	VERIFY_OFFSET(metadata_disks_per_row, 38);
9964dd0e19f3SScott Teel 	VERIFY_OFFSET(row_cnt, 40);
9965dd0e19f3SScott Teel 	VERIFY_OFFSET(layout_map_count, 42);
9966dd0e19f3SScott Teel 	VERIFY_OFFSET(flags, 44);
9967dd0e19f3SScott Teel 	VERIFY_OFFSET(dekindex, 46);
9968dd0e19f3SScott Teel 	/* VERIFY_OFFSET(reserved, 48 */
9969dd0e19f3SScott Teel 	VERIFY_OFFSET(data, 64);
9970dd0e19f3SScott Teel 
9971dd0e19f3SScott Teel #undef VERIFY_OFFSET
9972dd0e19f3SScott Teel 
9973dd0e19f3SScott Teel #define VERIFY_OFFSET(member, offset) \
9974b66cc250SMike Miller 	BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset)
9975b66cc250SMike Miller 
9976b66cc250SMike Miller 	VERIFY_OFFSET(IU_type, 0);
9977b66cc250SMike Miller 	VERIFY_OFFSET(direction, 1);
9978b66cc250SMike Miller 	VERIFY_OFFSET(reply_queue, 2);
9979b66cc250SMike Miller 	/* VERIFY_OFFSET(reserved1, 3);  */
9980b66cc250SMike Miller 	VERIFY_OFFSET(scsi_nexus, 4);
9981b66cc250SMike Miller 	VERIFY_OFFSET(Tag, 8);
9982b66cc250SMike Miller 	VERIFY_OFFSET(cdb, 16);
9983b66cc250SMike Miller 	VERIFY_OFFSET(cciss_lun, 32);
9984b66cc250SMike Miller 	VERIFY_OFFSET(data_len, 40);
9985b66cc250SMike Miller 	VERIFY_OFFSET(cmd_priority_task_attr, 44);
9986b66cc250SMike Miller 	VERIFY_OFFSET(sg_count, 45);
9987b66cc250SMike Miller 	/* VERIFY_OFFSET(reserved3 */
9988b66cc250SMike Miller 	VERIFY_OFFSET(err_ptr, 48);
9989b66cc250SMike Miller 	VERIFY_OFFSET(err_len, 56);
9990b66cc250SMike Miller 	/* VERIFY_OFFSET(reserved4  */
9991b66cc250SMike Miller 	VERIFY_OFFSET(sg, 64);
9992b66cc250SMike Miller 
9993b66cc250SMike Miller #undef VERIFY_OFFSET
9994b66cc250SMike Miller 
9995b66cc250SMike Miller #define VERIFY_OFFSET(member, offset) \
9996e1f7de0cSMatt Gates 	BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset)
9997e1f7de0cSMatt Gates 
9998e1f7de0cSMatt Gates 	VERIFY_OFFSET(dev_handle, 0x00);
9999e1f7de0cSMatt Gates 	VERIFY_OFFSET(reserved1, 0x02);
10000e1f7de0cSMatt Gates 	VERIFY_OFFSET(function, 0x03);
10001e1f7de0cSMatt Gates 	VERIFY_OFFSET(reserved2, 0x04);
10002e1f7de0cSMatt Gates 	VERIFY_OFFSET(err_info, 0x0C);
10003e1f7de0cSMatt Gates 	VERIFY_OFFSET(reserved3, 0x10);
10004e1f7de0cSMatt Gates 	VERIFY_OFFSET(err_info_len, 0x12);
10005e1f7de0cSMatt Gates 	VERIFY_OFFSET(reserved4, 0x13);
10006e1f7de0cSMatt Gates 	VERIFY_OFFSET(sgl_offset, 0x14);
10007e1f7de0cSMatt Gates 	VERIFY_OFFSET(reserved5, 0x15);
10008e1f7de0cSMatt Gates 	VERIFY_OFFSET(transfer_len, 0x1C);
10009e1f7de0cSMatt Gates 	VERIFY_OFFSET(reserved6, 0x20);
10010e1f7de0cSMatt Gates 	VERIFY_OFFSET(io_flags, 0x24);
10011e1f7de0cSMatt Gates 	VERIFY_OFFSET(reserved7, 0x26);
10012e1f7de0cSMatt Gates 	VERIFY_OFFSET(LUN, 0x34);
10013e1f7de0cSMatt Gates 	VERIFY_OFFSET(control, 0x3C);
10014e1f7de0cSMatt Gates 	VERIFY_OFFSET(CDB, 0x40);
10015e1f7de0cSMatt Gates 	VERIFY_OFFSET(reserved8, 0x50);
10016e1f7de0cSMatt Gates 	VERIFY_OFFSET(host_context_flags, 0x60);
10017e1f7de0cSMatt Gates 	VERIFY_OFFSET(timeout_sec, 0x62);
10018e1f7de0cSMatt Gates 	VERIFY_OFFSET(ReplyQueue, 0x64);
10019e1f7de0cSMatt Gates 	VERIFY_OFFSET(reserved9, 0x65);
1002050a0decfSStephen M. Cameron 	VERIFY_OFFSET(tag, 0x68);
10021e1f7de0cSMatt Gates 	VERIFY_OFFSET(host_addr, 0x70);
10022e1f7de0cSMatt Gates 	VERIFY_OFFSET(CISS_LUN, 0x78);
10023e1f7de0cSMatt Gates 	VERIFY_OFFSET(SG, 0x78 + 8);
10024e1f7de0cSMatt Gates #undef VERIFY_OFFSET
10025e1f7de0cSMatt Gates }
10026e1f7de0cSMatt Gates 
10027edd16368SStephen M. Cameron module_init(hpsa_init);
10028edd16368SStephen M. Cameron module_exit(hpsa_cleanup);
10029