1edd16368SStephen M. Cameron /* 2edd16368SStephen M. Cameron * Disk Array driver for HP Smart Array SAS controllers 394c7bc31SDon Brace * Copyright 2016 Microsemi Corporation 41358f6dcSDon Brace * Copyright 2014-2015 PMC-Sierra, Inc. 51358f6dcSDon Brace * Copyright 2000,2009-2015 Hewlett-Packard Development Company, L.P. 6edd16368SStephen M. Cameron * 7edd16368SStephen M. Cameron * This program is free software; you can redistribute it and/or modify 8edd16368SStephen M. Cameron * it under the terms of the GNU General Public License as published by 9edd16368SStephen M. Cameron * the Free Software Foundation; version 2 of the License. 10edd16368SStephen M. Cameron * 11edd16368SStephen M. Cameron * This program is distributed in the hope that it will be useful, 12edd16368SStephen M. Cameron * but WITHOUT ANY WARRANTY; without even the implied warranty of 13edd16368SStephen M. Cameron * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or 14edd16368SStephen M. Cameron * NON INFRINGEMENT. See the GNU General Public License for more details. 15edd16368SStephen M. Cameron * 1694c7bc31SDon Brace * Questions/Comments/Bugfixes to esc.storagedev@microsemi.com 17edd16368SStephen M. Cameron * 18edd16368SStephen M. Cameron */ 19edd16368SStephen M. Cameron 20edd16368SStephen M. Cameron #include <linux/module.h> 21edd16368SStephen M. Cameron #include <linux/interrupt.h> 22edd16368SStephen M. Cameron #include <linux/types.h> 23edd16368SStephen M. Cameron #include <linux/pci.h> 24e5a44df8SMatthew Garrett #include <linux/pci-aspm.h> 25edd16368SStephen M. Cameron #include <linux/kernel.h> 26edd16368SStephen M. Cameron #include <linux/slab.h> 27edd16368SStephen M. Cameron #include <linux/delay.h> 28edd16368SStephen M. Cameron #include <linux/fs.h> 29edd16368SStephen M. Cameron #include <linux/timer.h> 30edd16368SStephen M. Cameron #include <linux/init.h> 31edd16368SStephen M. Cameron #include <linux/spinlock.h> 32edd16368SStephen M. Cameron #include <linux/compat.h> 33edd16368SStephen M. Cameron #include <linux/blktrace_api.h> 34edd16368SStephen M. Cameron #include <linux/uaccess.h> 35edd16368SStephen M. Cameron #include <linux/io.h> 36edd16368SStephen M. Cameron #include <linux/dma-mapping.h> 37edd16368SStephen M. Cameron #include <linux/completion.h> 38edd16368SStephen M. Cameron #include <linux/moduleparam.h> 39edd16368SStephen M. Cameron #include <scsi/scsi.h> 40edd16368SStephen M. Cameron #include <scsi/scsi_cmnd.h> 41edd16368SStephen M. Cameron #include <scsi/scsi_device.h> 42edd16368SStephen M. Cameron #include <scsi/scsi_host.h> 43667e23d4SStephen M. Cameron #include <scsi/scsi_tcq.h> 449437ac43SStephen Cameron #include <scsi/scsi_eh.h> 45d04e62b9SKevin Barnett #include <scsi/scsi_transport_sas.h> 4673153fe5SWebb Scales #include <scsi/scsi_dbg.h> 47edd16368SStephen M. Cameron #include <linux/cciss_ioctl.h> 48edd16368SStephen M. Cameron #include <linux/string.h> 49edd16368SStephen M. Cameron #include <linux/bitmap.h> 5060063497SArun Sharma #include <linux/atomic.h> 51a0c12413SStephen M. Cameron #include <linux/jiffies.h> 5242a91641SDon Brace #include <linux/percpu-defs.h> 53094963daSStephen M. Cameron #include <linux/percpu.h> 542b08b3e9SDon Brace #include <asm/unaligned.h> 55283b4a9bSStephen M. Cameron #include <asm/div64.h> 56edd16368SStephen M. Cameron #include "hpsa_cmd.h" 57edd16368SStephen M. Cameron #include "hpsa.h" 58edd16368SStephen M. Cameron 59ec2c3aa9SDon Brace /* 60ec2c3aa9SDon Brace * HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' 61ec2c3aa9SDon Brace * with an optional trailing '-' followed by a byte value (0-255). 62ec2c3aa9SDon Brace */ 63ff54aee4SDon Brace #define HPSA_DRIVER_VERSION "3.4.16-0" 64edd16368SStephen M. Cameron #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")" 65f79cfec6SStephen M. Cameron #define HPSA "hpsa" 66edd16368SStephen M. Cameron 67007e7aa9SRobert Elliott /* How long to wait for CISS doorbell communication */ 68007e7aa9SRobert Elliott #define CLEAR_EVENT_WAIT_INTERVAL 20 /* ms for each msleep() call */ 69007e7aa9SRobert Elliott #define MODE_CHANGE_WAIT_INTERVAL 10 /* ms for each msleep() call */ 70007e7aa9SRobert Elliott #define MAX_CLEAR_EVENT_WAIT 30000 /* times 20 ms = 600 s */ 71007e7aa9SRobert Elliott #define MAX_MODE_CHANGE_WAIT 2000 /* times 10 ms = 20 s */ 72edd16368SStephen M. Cameron #define MAX_IOCTL_CONFIG_WAIT 1000 73edd16368SStephen M. Cameron 74edd16368SStephen M. Cameron /*define how many times we will try a command because of bus resets */ 75edd16368SStephen M. Cameron #define MAX_CMD_RETRIES 3 76edd16368SStephen M. Cameron 77edd16368SStephen M. Cameron /* Embedded module documentation macros - see modules.h */ 78edd16368SStephen M. Cameron MODULE_AUTHOR("Hewlett-Packard Company"); 79edd16368SStephen M. Cameron MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \ 80edd16368SStephen M. Cameron HPSA_DRIVER_VERSION); 81edd16368SStephen M. Cameron MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers"); 82edd16368SStephen M. Cameron MODULE_VERSION(HPSA_DRIVER_VERSION); 83edd16368SStephen M. Cameron MODULE_LICENSE("GPL"); 84edd16368SStephen M. Cameron 85edd16368SStephen M. Cameron static int hpsa_allow_any; 86edd16368SStephen M. Cameron module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR); 87edd16368SStephen M. Cameron MODULE_PARM_DESC(hpsa_allow_any, 88edd16368SStephen M. Cameron "Allow hpsa driver to access unknown HP Smart Array hardware"); 8902ec19c8SStephen M. Cameron static int hpsa_simple_mode; 9002ec19c8SStephen M. Cameron module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR); 9102ec19c8SStephen M. Cameron MODULE_PARM_DESC(hpsa_simple_mode, 9202ec19c8SStephen M. Cameron "Use 'simple mode' rather than 'performant mode'"); 93edd16368SStephen M. Cameron 94edd16368SStephen M. Cameron /* define the PCI info for the cards we can control */ 95edd16368SStephen M. Cameron static const struct pci_device_id hpsa_pci_device_id[] = { 96edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241}, 97edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243}, 98edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245}, 99edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247}, 100edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249}, 101163dbcd8SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A}, 102163dbcd8SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B}, 103f8b01eb9SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233}, 1049143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350}, 1059143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351}, 1069143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352}, 1079143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353}, 1089143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354}, 1099143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355}, 1109143a961Sscameron@beardog.cce.hp.com {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356}, 111fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1921}, 112fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1922}, 113fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1923}, 114fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1924}, 115fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1926}, 116fe0c9610SMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1928}, 11797b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1929}, 11897b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BD}, 11997b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BE}, 12097b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BF}, 12197b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C0}, 12297b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C1}, 12397b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C2}, 12497b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C3}, 12597b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C4}, 12697b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C5}, 1273b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C6}, 12897b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C7}, 12997b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C8}, 13097b9f53dSMike Miller {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C9}, 1313b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CA}, 1323b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CB}, 1333b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CC}, 1343b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CD}, 1353b7a45e5SJoe Handzik {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CE}, 136fdfa4b6dSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0580}, 137cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0581}, 138cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0582}, 139cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0583}, 140cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0584}, 141cbb47dcbSDon Brace {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0585}, 1428e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076}, 1438e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087}, 1448e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D}, 1458e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088}, 1468e616a5eSStephen M. Cameron {PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f}, 147edd16368SStephen M. Cameron {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 148edd16368SStephen M. Cameron PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0}, 149edd16368SStephen M. Cameron {0,} 150edd16368SStephen M. Cameron }; 151edd16368SStephen M. Cameron 152edd16368SStephen M. Cameron MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id); 153edd16368SStephen M. Cameron 154edd16368SStephen M. Cameron /* board_id = Subsystem Device ID & Vendor ID 155edd16368SStephen M. Cameron * product = Marketing Name for the board 156edd16368SStephen M. Cameron * access = Address of the struct of function pointers 157edd16368SStephen M. Cameron */ 158edd16368SStephen M. Cameron static struct board_type products[] = { 159edd16368SStephen M. Cameron {0x3241103C, "Smart Array P212", &SA5_access}, 160edd16368SStephen M. Cameron {0x3243103C, "Smart Array P410", &SA5_access}, 161edd16368SStephen M. Cameron {0x3245103C, "Smart Array P410i", &SA5_access}, 162edd16368SStephen M. Cameron {0x3247103C, "Smart Array P411", &SA5_access}, 163edd16368SStephen M. Cameron {0x3249103C, "Smart Array P812", &SA5_access}, 164163dbcd8SMike Miller {0x324A103C, "Smart Array P712m", &SA5_access}, 165163dbcd8SMike Miller {0x324B103C, "Smart Array P711m", &SA5_access}, 1667d2cce58SStephen M. Cameron {0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */ 167fe0c9610SMike Miller {0x3350103C, "Smart Array P222", &SA5_access}, 168fe0c9610SMike Miller {0x3351103C, "Smart Array P420", &SA5_access}, 169fe0c9610SMike Miller {0x3352103C, "Smart Array P421", &SA5_access}, 170fe0c9610SMike Miller {0x3353103C, "Smart Array P822", &SA5_access}, 171fe0c9610SMike Miller {0x3354103C, "Smart Array P420i", &SA5_access}, 172fe0c9610SMike Miller {0x3355103C, "Smart Array P220i", &SA5_access}, 173fe0c9610SMike Miller {0x3356103C, "Smart Array P721m", &SA5_access}, 1741fd6c8e3SMike Miller {0x1921103C, "Smart Array P830i", &SA5_access}, 1751fd6c8e3SMike Miller {0x1922103C, "Smart Array P430", &SA5_access}, 1761fd6c8e3SMike Miller {0x1923103C, "Smart Array P431", &SA5_access}, 1771fd6c8e3SMike Miller {0x1924103C, "Smart Array P830", &SA5_access}, 1781fd6c8e3SMike Miller {0x1926103C, "Smart Array P731m", &SA5_access}, 1791fd6c8e3SMike Miller {0x1928103C, "Smart Array P230i", &SA5_access}, 1801fd6c8e3SMike Miller {0x1929103C, "Smart Array P530", &SA5_access}, 18127fb8137SDon Brace {0x21BD103C, "Smart Array P244br", &SA5_access}, 18227fb8137SDon Brace {0x21BE103C, "Smart Array P741m", &SA5_access}, 18327fb8137SDon Brace {0x21BF103C, "Smart HBA H240ar", &SA5_access}, 18427fb8137SDon Brace {0x21C0103C, "Smart Array P440ar", &SA5_access}, 185c8ae0ab1SDon Brace {0x21C1103C, "Smart Array P840ar", &SA5_access}, 18627fb8137SDon Brace {0x21C2103C, "Smart Array P440", &SA5_access}, 18727fb8137SDon Brace {0x21C3103C, "Smart Array P441", &SA5_access}, 18897b9f53dSMike Miller {0x21C4103C, "Smart Array", &SA5_access}, 18927fb8137SDon Brace {0x21C5103C, "Smart Array P841", &SA5_access}, 19027fb8137SDon Brace {0x21C6103C, "Smart HBA H244br", &SA5_access}, 19127fb8137SDon Brace {0x21C7103C, "Smart HBA H240", &SA5_access}, 19227fb8137SDon Brace {0x21C8103C, "Smart HBA H241", &SA5_access}, 19397b9f53dSMike Miller {0x21C9103C, "Smart Array", &SA5_access}, 19427fb8137SDon Brace {0x21CA103C, "Smart Array P246br", &SA5_access}, 19527fb8137SDon Brace {0x21CB103C, "Smart Array P840", &SA5_access}, 1963b7a45e5SJoe Handzik {0x21CC103C, "Smart Array", &SA5_access}, 1973b7a45e5SJoe Handzik {0x21CD103C, "Smart Array", &SA5_access}, 19827fb8137SDon Brace {0x21CE103C, "Smart HBA", &SA5_access}, 199fdfa4b6dSDon Brace {0x05809005, "SmartHBA-SA", &SA5_access}, 200cbb47dcbSDon Brace {0x05819005, "SmartHBA-SA 8i", &SA5_access}, 201cbb47dcbSDon Brace {0x05829005, "SmartHBA-SA 8i8e", &SA5_access}, 202cbb47dcbSDon Brace {0x05839005, "SmartHBA-SA 8e", &SA5_access}, 203cbb47dcbSDon Brace {0x05849005, "SmartHBA-SA 16i", &SA5_access}, 204cbb47dcbSDon Brace {0x05859005, "SmartHBA-SA 4i4e", &SA5_access}, 2058e616a5eSStephen M. Cameron {0x00761590, "HP Storage P1224 Array Controller", &SA5_access}, 2068e616a5eSStephen M. Cameron {0x00871590, "HP Storage P1224e Array Controller", &SA5_access}, 2078e616a5eSStephen M. Cameron {0x007D1590, "HP Storage P1228 Array Controller", &SA5_access}, 2088e616a5eSStephen M. Cameron {0x00881590, "HP Storage P1228e Array Controller", &SA5_access}, 2098e616a5eSStephen M. Cameron {0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access}, 210edd16368SStephen M. Cameron {0xFFFF103C, "Unknown Smart Array", &SA5_access}, 211edd16368SStephen M. Cameron }; 212edd16368SStephen M. Cameron 213d04e62b9SKevin Barnett static struct scsi_transport_template *hpsa_sas_transport_template; 214d04e62b9SKevin Barnett static int hpsa_add_sas_host(struct ctlr_info *h); 215d04e62b9SKevin Barnett static void hpsa_delete_sas_host(struct ctlr_info *h); 216d04e62b9SKevin Barnett static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node, 217d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *device); 218d04e62b9SKevin Barnett static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device); 219d04e62b9SKevin Barnett static struct hpsa_scsi_dev_t 220d04e62b9SKevin Barnett *hpsa_find_device_by_sas_rphy(struct ctlr_info *h, 221d04e62b9SKevin Barnett struct sas_rphy *rphy); 222d04e62b9SKevin Barnett 223a58e7e53SWebb Scales #define SCSI_CMD_BUSY ((struct scsi_cmnd *)&hpsa_cmd_busy) 224a58e7e53SWebb Scales static const struct scsi_cmnd hpsa_cmd_busy; 225a58e7e53SWebb Scales #define SCSI_CMD_IDLE ((struct scsi_cmnd *)&hpsa_cmd_idle) 226a58e7e53SWebb Scales static const struct scsi_cmnd hpsa_cmd_idle; 227edd16368SStephen M. Cameron static int number_of_controllers; 228edd16368SStephen M. Cameron 22910f66018SStephen M. Cameron static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id); 23010f66018SStephen M. Cameron static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id); 23142a91641SDon Brace static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg); 232edd16368SStephen M. Cameron 233edd16368SStephen M. Cameron #ifdef CONFIG_COMPAT 23442a91641SDon Brace static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, 23542a91641SDon Brace void __user *arg); 236edd16368SStephen M. Cameron #endif 237edd16368SStephen M. Cameron 238edd16368SStephen M. Cameron static void cmd_free(struct ctlr_info *h, struct CommandList *c); 239edd16368SStephen M. Cameron static struct CommandList *cmd_alloc(struct ctlr_info *h); 24073153fe5SWebb Scales static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c); 24173153fe5SWebb Scales static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h, 24273153fe5SWebb Scales struct scsi_cmnd *scmd); 243a2dac136SStephen M. Cameron static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 244b7bb24ebSStephen M. Cameron void *buff, size_t size, u16 page_code, unsigned char *scsi3addr, 245edd16368SStephen M. Cameron int cmd_type); 2462c143342SRobert Elliott static void hpsa_free_cmd_pool(struct ctlr_info *h); 247b7bb24ebSStephen M. Cameron #define VPD_PAGE (1 << 8) 248b48d9804SDon Brace #define HPSA_SIMPLE_ERROR_BITS 0x03 249edd16368SStephen M. Cameron 250f281233dSJeff Garzik static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd); 251a08a8471SStephen M. Cameron static void hpsa_scan_start(struct Scsi_Host *); 252a08a8471SStephen M. Cameron static int hpsa_scan_finished(struct Scsi_Host *sh, 253a08a8471SStephen M. Cameron unsigned long elapsed_time); 2547c0a0229SDon Brace static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth); 255edd16368SStephen M. Cameron 256edd16368SStephen M. Cameron static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd); 25775167d2cSStephen M. Cameron static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd); 258edd16368SStephen M. Cameron static int hpsa_slave_alloc(struct scsi_device *sdev); 25941ce4c35SStephen Cameron static int hpsa_slave_configure(struct scsi_device *sdev); 260edd16368SStephen M. Cameron static void hpsa_slave_destroy(struct scsi_device *sdev); 261edd16368SStephen M. Cameron 2628aa60681SDon Brace static void hpsa_update_scsi_devices(struct ctlr_info *h); 263edd16368SStephen M. Cameron static int check_for_unit_attention(struct ctlr_info *h, 264edd16368SStephen M. Cameron struct CommandList *c); 265edd16368SStephen M. Cameron static void check_ioctl_unit_attention(struct ctlr_info *h, 266edd16368SStephen M. Cameron struct CommandList *c); 267303932fdSDon Brace /* performant mode helper functions */ 268303932fdSDon Brace static void calc_bucket_map(int *bucket, int num_buckets, 2692b08b3e9SDon Brace int nsgs, int min_blocks, u32 *bucket_map); 270105a3dbcSRobert Elliott static void hpsa_free_performant_mode(struct ctlr_info *h); 271105a3dbcSRobert Elliott static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h); 272254f796bSMatt Gates static inline u32 next_command(struct ctlr_info *h, u8 q); 2736f039790SGreg Kroah-Hartman static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 2746f039790SGreg Kroah-Hartman u32 *cfg_base_addr, u64 *cfg_base_addr_index, 2751df8552aSStephen M. Cameron u64 *cfg_offset); 2766f039790SGreg Kroah-Hartman static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 2771df8552aSStephen M. Cameron unsigned long *memory_bar); 2786f039790SGreg Kroah-Hartman static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id); 279bfd7546cSDon Brace static int wait_for_device_to_become_ready(struct ctlr_info *h, 280bfd7546cSDon Brace unsigned char lunaddr[], 281bfd7546cSDon Brace int reply_queue); 2826f039790SGreg Kroah-Hartman static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 2836f039790SGreg Kroah-Hartman int wait_for_ready); 28475167d2cSStephen M. Cameron static inline void finish_cmd(struct CommandList *c); 285c706a795SRobert Elliott static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h); 286fe5389c8SStephen M. Cameron #define BOARD_NOT_READY 0 287fe5389c8SStephen M. Cameron #define BOARD_READY 1 28823100dd9SStephen M. Cameron static void hpsa_drain_accel_commands(struct ctlr_info *h); 28976438d08SStephen M. Cameron static void hpsa_flush_cache(struct ctlr_info *h); 290c349775eSScott Teel static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h, 291c349775eSScott Teel struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 29203383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk); 293080ef1ccSDon Brace static void hpsa_command_resubmit_worker(struct work_struct *work); 29425163bd5SWebb Scales static u32 lockup_detected(struct ctlr_info *h); 29525163bd5SWebb Scales static int detect_controller_lockup(struct ctlr_info *h); 296c2adae44SScott Teel static void hpsa_disable_rld_caching(struct ctlr_info *h); 297d04e62b9SKevin Barnett static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 298d04e62b9SKevin Barnett struct ReportExtendedLUNdata *buf, int bufsize); 2998383278dSScott Teel static bool hpsa_vpd_page_supported(struct ctlr_info *h, 3008383278dSScott Teel unsigned char scsi3addr[], u8 page); 30134592254SScott Teel static int hpsa_luns_changed(struct ctlr_info *h); 302ba74fdc4SDon Brace static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c, 303ba74fdc4SDon Brace struct hpsa_scsi_dev_t *dev, 304ba74fdc4SDon Brace unsigned char *scsi3addr); 305edd16368SStephen M. Cameron 306edd16368SStephen M. Cameron static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev) 307edd16368SStephen M. Cameron { 308edd16368SStephen M. Cameron unsigned long *priv = shost_priv(sdev->host); 309edd16368SStephen M. Cameron return (struct ctlr_info *) *priv; 310edd16368SStephen M. Cameron } 311edd16368SStephen M. Cameron 312a23513e8SStephen M. Cameron static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh) 313a23513e8SStephen M. Cameron { 314a23513e8SStephen M. Cameron unsigned long *priv = shost_priv(sh); 315a23513e8SStephen M. Cameron return (struct ctlr_info *) *priv; 316a23513e8SStephen M. Cameron } 317a23513e8SStephen M. Cameron 318a58e7e53SWebb Scales static inline bool hpsa_is_cmd_idle(struct CommandList *c) 319a58e7e53SWebb Scales { 320a58e7e53SWebb Scales return c->scsi_cmd == SCSI_CMD_IDLE; 321a58e7e53SWebb Scales } 322a58e7e53SWebb Scales 323d604f533SWebb Scales static inline bool hpsa_is_pending_event(struct CommandList *c) 324d604f533SWebb Scales { 325d604f533SWebb Scales return c->abort_pending || c->reset_pending; 326d604f533SWebb Scales } 327d604f533SWebb Scales 3289437ac43SStephen Cameron /* extract sense key, asc, and ascq from sense data. -1 means invalid. */ 3299437ac43SStephen Cameron static void decode_sense_data(const u8 *sense_data, int sense_data_len, 3309437ac43SStephen Cameron u8 *sense_key, u8 *asc, u8 *ascq) 3319437ac43SStephen Cameron { 3329437ac43SStephen Cameron struct scsi_sense_hdr sshdr; 3339437ac43SStephen Cameron bool rc; 3349437ac43SStephen Cameron 3359437ac43SStephen Cameron *sense_key = -1; 3369437ac43SStephen Cameron *asc = -1; 3379437ac43SStephen Cameron *ascq = -1; 3389437ac43SStephen Cameron 3399437ac43SStephen Cameron if (sense_data_len < 1) 3409437ac43SStephen Cameron return; 3419437ac43SStephen Cameron 3429437ac43SStephen Cameron rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr); 3439437ac43SStephen Cameron if (rc) { 3449437ac43SStephen Cameron *sense_key = sshdr.sense_key; 3459437ac43SStephen Cameron *asc = sshdr.asc; 3469437ac43SStephen Cameron *ascq = sshdr.ascq; 3479437ac43SStephen Cameron } 3489437ac43SStephen Cameron } 3499437ac43SStephen Cameron 350edd16368SStephen M. Cameron static int check_for_unit_attention(struct ctlr_info *h, 351edd16368SStephen M. Cameron struct CommandList *c) 352edd16368SStephen M. Cameron { 3539437ac43SStephen Cameron u8 sense_key, asc, ascq; 3549437ac43SStephen Cameron int sense_len; 3559437ac43SStephen Cameron 3569437ac43SStephen Cameron if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo)) 3579437ac43SStephen Cameron sense_len = sizeof(c->err_info->SenseInfo); 3589437ac43SStephen Cameron else 3599437ac43SStephen Cameron sense_len = c->err_info->SenseLen; 3609437ac43SStephen Cameron 3619437ac43SStephen Cameron decode_sense_data(c->err_info->SenseInfo, sense_len, 3629437ac43SStephen Cameron &sense_key, &asc, &ascq); 36381c27557SDon Brace if (sense_key != UNIT_ATTENTION || asc == 0xff) 364edd16368SStephen M. Cameron return 0; 365edd16368SStephen M. Cameron 3669437ac43SStephen Cameron switch (asc) { 367edd16368SStephen M. Cameron case STATE_CHANGED: 3689437ac43SStephen Cameron dev_warn(&h->pdev->dev, 3692946e82bSRobert Elliott "%s: a state change detected, command retried\n", 3702946e82bSRobert Elliott h->devname); 371edd16368SStephen M. Cameron break; 372edd16368SStephen M. Cameron case LUN_FAILED: 3737f73695aSStephen M. Cameron dev_warn(&h->pdev->dev, 3742946e82bSRobert Elliott "%s: LUN failure detected\n", h->devname); 375edd16368SStephen M. Cameron break; 376edd16368SStephen M. Cameron case REPORT_LUNS_CHANGED: 3777f73695aSStephen M. Cameron dev_warn(&h->pdev->dev, 3782946e82bSRobert Elliott "%s: report LUN data changed\n", h->devname); 379edd16368SStephen M. Cameron /* 3804f4eb9f1SScott Teel * Note: this REPORT_LUNS_CHANGED condition only occurs on the external 3814f4eb9f1SScott Teel * target (array) devices. 382edd16368SStephen M. Cameron */ 383edd16368SStephen M. Cameron break; 384edd16368SStephen M. Cameron case POWER_OR_RESET: 3852946e82bSRobert Elliott dev_warn(&h->pdev->dev, 3862946e82bSRobert Elliott "%s: a power on or device reset detected\n", 3872946e82bSRobert Elliott h->devname); 388edd16368SStephen M. Cameron break; 389edd16368SStephen M. Cameron case UNIT_ATTENTION_CLEARED: 3902946e82bSRobert Elliott dev_warn(&h->pdev->dev, 3912946e82bSRobert Elliott "%s: unit attention cleared by another initiator\n", 3922946e82bSRobert Elliott h->devname); 393edd16368SStephen M. Cameron break; 394edd16368SStephen M. Cameron default: 3952946e82bSRobert Elliott dev_warn(&h->pdev->dev, 3962946e82bSRobert Elliott "%s: unknown unit attention detected\n", 3972946e82bSRobert Elliott h->devname); 398edd16368SStephen M. Cameron break; 399edd16368SStephen M. Cameron } 400edd16368SStephen M. Cameron return 1; 401edd16368SStephen M. Cameron } 402edd16368SStephen M. Cameron 403852af20aSMatt Bondurant static int check_for_busy(struct ctlr_info *h, struct CommandList *c) 404852af20aSMatt Bondurant { 405852af20aSMatt Bondurant if (c->err_info->CommandStatus != CMD_TARGET_STATUS || 406852af20aSMatt Bondurant (c->err_info->ScsiStatus != SAM_STAT_BUSY && 407852af20aSMatt Bondurant c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL)) 408852af20aSMatt Bondurant return 0; 409852af20aSMatt Bondurant dev_warn(&h->pdev->dev, HPSA "device busy"); 410852af20aSMatt Bondurant return 1; 411852af20aSMatt Bondurant } 412852af20aSMatt Bondurant 413e985c58fSStephen Cameron static u32 lockup_detected(struct ctlr_info *h); 414e985c58fSStephen Cameron static ssize_t host_show_lockup_detected(struct device *dev, 415e985c58fSStephen Cameron struct device_attribute *attr, char *buf) 416e985c58fSStephen Cameron { 417e985c58fSStephen Cameron int ld; 418e985c58fSStephen Cameron struct ctlr_info *h; 419e985c58fSStephen Cameron struct Scsi_Host *shost = class_to_shost(dev); 420e985c58fSStephen Cameron 421e985c58fSStephen Cameron h = shost_to_hba(shost); 422e985c58fSStephen Cameron ld = lockup_detected(h); 423e985c58fSStephen Cameron 424e985c58fSStephen Cameron return sprintf(buf, "ld=%d\n", ld); 425e985c58fSStephen Cameron } 426e985c58fSStephen Cameron 427da0697bdSScott Teel static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev, 428da0697bdSScott Teel struct device_attribute *attr, 429da0697bdSScott Teel const char *buf, size_t count) 430da0697bdSScott Teel { 431da0697bdSScott Teel int status, len; 432da0697bdSScott Teel struct ctlr_info *h; 433da0697bdSScott Teel struct Scsi_Host *shost = class_to_shost(dev); 434da0697bdSScott Teel char tmpbuf[10]; 435da0697bdSScott Teel 436da0697bdSScott Teel if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO)) 437da0697bdSScott Teel return -EACCES; 438da0697bdSScott Teel len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count; 439da0697bdSScott Teel strncpy(tmpbuf, buf, len); 440da0697bdSScott Teel tmpbuf[len] = '\0'; 441da0697bdSScott Teel if (sscanf(tmpbuf, "%d", &status) != 1) 442da0697bdSScott Teel return -EINVAL; 443da0697bdSScott Teel h = shost_to_hba(shost); 444da0697bdSScott Teel h->acciopath_status = !!status; 445da0697bdSScott Teel dev_warn(&h->pdev->dev, 446da0697bdSScott Teel "hpsa: HP SSD Smart Path %s via sysfs update.\n", 447da0697bdSScott Teel h->acciopath_status ? "enabled" : "disabled"); 448da0697bdSScott Teel return count; 449da0697bdSScott Teel } 450da0697bdSScott Teel 4512ba8bfc8SStephen M. Cameron static ssize_t host_store_raid_offload_debug(struct device *dev, 4522ba8bfc8SStephen M. Cameron struct device_attribute *attr, 4532ba8bfc8SStephen M. Cameron const char *buf, size_t count) 4542ba8bfc8SStephen M. Cameron { 4552ba8bfc8SStephen M. Cameron int debug_level, len; 4562ba8bfc8SStephen M. Cameron struct ctlr_info *h; 4572ba8bfc8SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 4582ba8bfc8SStephen M. Cameron char tmpbuf[10]; 4592ba8bfc8SStephen M. Cameron 4602ba8bfc8SStephen M. Cameron if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO)) 4612ba8bfc8SStephen M. Cameron return -EACCES; 4622ba8bfc8SStephen M. Cameron len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count; 4632ba8bfc8SStephen M. Cameron strncpy(tmpbuf, buf, len); 4642ba8bfc8SStephen M. Cameron tmpbuf[len] = '\0'; 4652ba8bfc8SStephen M. Cameron if (sscanf(tmpbuf, "%d", &debug_level) != 1) 4662ba8bfc8SStephen M. Cameron return -EINVAL; 4672ba8bfc8SStephen M. Cameron if (debug_level < 0) 4682ba8bfc8SStephen M. Cameron debug_level = 0; 4692ba8bfc8SStephen M. Cameron h = shost_to_hba(shost); 4702ba8bfc8SStephen M. Cameron h->raid_offload_debug = debug_level; 4712ba8bfc8SStephen M. Cameron dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n", 4722ba8bfc8SStephen M. Cameron h->raid_offload_debug); 4732ba8bfc8SStephen M. Cameron return count; 4742ba8bfc8SStephen M. Cameron } 4752ba8bfc8SStephen M. Cameron 476edd16368SStephen M. Cameron static ssize_t host_store_rescan(struct device *dev, 477edd16368SStephen M. Cameron struct device_attribute *attr, 478edd16368SStephen M. Cameron const char *buf, size_t count) 479edd16368SStephen M. Cameron { 480edd16368SStephen M. Cameron struct ctlr_info *h; 481edd16368SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 482a23513e8SStephen M. Cameron h = shost_to_hba(shost); 48331468401SMike Miller hpsa_scan_start(h->scsi_host); 484edd16368SStephen M. Cameron return count; 485edd16368SStephen M. Cameron } 486edd16368SStephen M. Cameron 487d28ce020SStephen M. Cameron static ssize_t host_show_firmware_revision(struct device *dev, 488d28ce020SStephen M. Cameron struct device_attribute *attr, char *buf) 489d28ce020SStephen M. Cameron { 490d28ce020SStephen M. Cameron struct ctlr_info *h; 491d28ce020SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 492d28ce020SStephen M. Cameron unsigned char *fwrev; 493d28ce020SStephen M. Cameron 494d28ce020SStephen M. Cameron h = shost_to_hba(shost); 495d28ce020SStephen M. Cameron if (!h->hba_inquiry_data) 496d28ce020SStephen M. Cameron return 0; 497d28ce020SStephen M. Cameron fwrev = &h->hba_inquiry_data[32]; 498d28ce020SStephen M. Cameron return snprintf(buf, 20, "%c%c%c%c\n", 499d28ce020SStephen M. Cameron fwrev[0], fwrev[1], fwrev[2], fwrev[3]); 500d28ce020SStephen M. Cameron } 501d28ce020SStephen M. Cameron 50294a13649SStephen M. Cameron static ssize_t host_show_commands_outstanding(struct device *dev, 50394a13649SStephen M. Cameron struct device_attribute *attr, char *buf) 50494a13649SStephen M. Cameron { 50594a13649SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 50694a13649SStephen M. Cameron struct ctlr_info *h = shost_to_hba(shost); 50794a13649SStephen M. Cameron 5080cbf768eSStephen M. Cameron return snprintf(buf, 20, "%d\n", 5090cbf768eSStephen M. Cameron atomic_read(&h->commands_outstanding)); 51094a13649SStephen M. Cameron } 51194a13649SStephen M. Cameron 512745a7a25SStephen M. Cameron static ssize_t host_show_transport_mode(struct device *dev, 513745a7a25SStephen M. Cameron struct device_attribute *attr, char *buf) 514745a7a25SStephen M. Cameron { 515745a7a25SStephen M. Cameron struct ctlr_info *h; 516745a7a25SStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 517745a7a25SStephen M. Cameron 518745a7a25SStephen M. Cameron h = shost_to_hba(shost); 519745a7a25SStephen M. Cameron return snprintf(buf, 20, "%s\n", 520960a30e7SStephen M. Cameron h->transMethod & CFGTBL_Trans_Performant ? 521745a7a25SStephen M. Cameron "performant" : "simple"); 522745a7a25SStephen M. Cameron } 523745a7a25SStephen M. Cameron 524da0697bdSScott Teel static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev, 525da0697bdSScott Teel struct device_attribute *attr, char *buf) 526da0697bdSScott Teel { 527da0697bdSScott Teel struct ctlr_info *h; 528da0697bdSScott Teel struct Scsi_Host *shost = class_to_shost(dev); 529da0697bdSScott Teel 530da0697bdSScott Teel h = shost_to_hba(shost); 531da0697bdSScott Teel return snprintf(buf, 30, "HP SSD Smart Path %s\n", 532da0697bdSScott Teel (h->acciopath_status == 1) ? "enabled" : "disabled"); 533da0697bdSScott Teel } 534da0697bdSScott Teel 53546380786SStephen M. Cameron /* List of controllers which cannot be hard reset on kexec with reset_devices */ 536941b1cdaSStephen M. Cameron static u32 unresettable_controller[] = { 537941b1cdaSStephen M. Cameron 0x324a103C, /* Smart Array P712m */ 538941b1cdaSStephen M. Cameron 0x324b103C, /* Smart Array P711m */ 539941b1cdaSStephen M. Cameron 0x3223103C, /* Smart Array P800 */ 540941b1cdaSStephen M. Cameron 0x3234103C, /* Smart Array P400 */ 541941b1cdaSStephen M. Cameron 0x3235103C, /* Smart Array P400i */ 542941b1cdaSStephen M. Cameron 0x3211103C, /* Smart Array E200i */ 543941b1cdaSStephen M. Cameron 0x3212103C, /* Smart Array E200 */ 544941b1cdaSStephen M. Cameron 0x3213103C, /* Smart Array E200i */ 545941b1cdaSStephen M. Cameron 0x3214103C, /* Smart Array E200i */ 546941b1cdaSStephen M. Cameron 0x3215103C, /* Smart Array E200i */ 547941b1cdaSStephen M. Cameron 0x3237103C, /* Smart Array E500 */ 548941b1cdaSStephen M. Cameron 0x323D103C, /* Smart Array P700m */ 5497af0abbcSTomas Henzl 0x40800E11, /* Smart Array 5i */ 550941b1cdaSStephen M. Cameron 0x409C0E11, /* Smart Array 6400 */ 551941b1cdaSStephen M. Cameron 0x409D0E11, /* Smart Array 6400 EM */ 5525a4f934eSTomas Henzl 0x40700E11, /* Smart Array 5300 */ 5535a4f934eSTomas Henzl 0x40820E11, /* Smart Array 532 */ 5545a4f934eSTomas Henzl 0x40830E11, /* Smart Array 5312 */ 5555a4f934eSTomas Henzl 0x409A0E11, /* Smart Array 641 */ 5565a4f934eSTomas Henzl 0x409B0E11, /* Smart Array 642 */ 5575a4f934eSTomas Henzl 0x40910E11, /* Smart Array 6i */ 558941b1cdaSStephen M. Cameron }; 559941b1cdaSStephen M. Cameron 56046380786SStephen M. Cameron /* List of controllers which cannot even be soft reset */ 56146380786SStephen M. Cameron static u32 soft_unresettable_controller[] = { 5627af0abbcSTomas Henzl 0x40800E11, /* Smart Array 5i */ 5635a4f934eSTomas Henzl 0x40700E11, /* Smart Array 5300 */ 5645a4f934eSTomas Henzl 0x40820E11, /* Smart Array 532 */ 5655a4f934eSTomas Henzl 0x40830E11, /* Smart Array 5312 */ 5665a4f934eSTomas Henzl 0x409A0E11, /* Smart Array 641 */ 5675a4f934eSTomas Henzl 0x409B0E11, /* Smart Array 642 */ 5685a4f934eSTomas Henzl 0x40910E11, /* Smart Array 6i */ 56946380786SStephen M. Cameron /* Exclude 640x boards. These are two pci devices in one slot 57046380786SStephen M. Cameron * which share a battery backed cache module. One controls the 57146380786SStephen M. Cameron * cache, the other accesses the cache through the one that controls 57246380786SStephen M. Cameron * it. If we reset the one controlling the cache, the other will 57346380786SStephen M. Cameron * likely not be happy. Just forbid resetting this conjoined mess. 57446380786SStephen M. Cameron * The 640x isn't really supported by hpsa anyway. 57546380786SStephen M. Cameron */ 57646380786SStephen M. Cameron 0x409C0E11, /* Smart Array 6400 */ 57746380786SStephen M. Cameron 0x409D0E11, /* Smart Array 6400 EM */ 57846380786SStephen M. Cameron }; 57946380786SStephen M. Cameron 5809b5c48c2SStephen Cameron static u32 needs_abort_tags_swizzled[] = { 5819b5c48c2SStephen Cameron 0x323D103C, /* Smart Array P700m */ 5829b5c48c2SStephen Cameron 0x324a103C, /* Smart Array P712m */ 5839b5c48c2SStephen Cameron 0x324b103C, /* SmartArray P711m */ 5849b5c48c2SStephen Cameron }; 5859b5c48c2SStephen Cameron 5869b5c48c2SStephen Cameron static int board_id_in_array(u32 a[], int nelems, u32 board_id) 587941b1cdaSStephen M. Cameron { 588941b1cdaSStephen M. Cameron int i; 589941b1cdaSStephen M. Cameron 5909b5c48c2SStephen Cameron for (i = 0; i < nelems; i++) 5919b5c48c2SStephen Cameron if (a[i] == board_id) 592941b1cdaSStephen M. Cameron return 1; 5939b5c48c2SStephen Cameron return 0; 5949b5c48c2SStephen Cameron } 5959b5c48c2SStephen Cameron 5969b5c48c2SStephen Cameron static int ctlr_is_hard_resettable(u32 board_id) 5979b5c48c2SStephen Cameron { 5989b5c48c2SStephen Cameron return !board_id_in_array(unresettable_controller, 5999b5c48c2SStephen Cameron ARRAY_SIZE(unresettable_controller), board_id); 600941b1cdaSStephen M. Cameron } 601941b1cdaSStephen M. Cameron 60246380786SStephen M. Cameron static int ctlr_is_soft_resettable(u32 board_id) 60346380786SStephen M. Cameron { 6049b5c48c2SStephen Cameron return !board_id_in_array(soft_unresettable_controller, 6059b5c48c2SStephen Cameron ARRAY_SIZE(soft_unresettable_controller), board_id); 60646380786SStephen M. Cameron } 60746380786SStephen M. Cameron 60846380786SStephen M. Cameron static int ctlr_is_resettable(u32 board_id) 60946380786SStephen M. Cameron { 61046380786SStephen M. Cameron return ctlr_is_hard_resettable(board_id) || 61146380786SStephen M. Cameron ctlr_is_soft_resettable(board_id); 61246380786SStephen M. Cameron } 61346380786SStephen M. Cameron 6149b5c48c2SStephen Cameron static int ctlr_needs_abort_tags_swizzled(u32 board_id) 6159b5c48c2SStephen Cameron { 6169b5c48c2SStephen Cameron return board_id_in_array(needs_abort_tags_swizzled, 6179b5c48c2SStephen Cameron ARRAY_SIZE(needs_abort_tags_swizzled), board_id); 6189b5c48c2SStephen Cameron } 6199b5c48c2SStephen Cameron 620941b1cdaSStephen M. Cameron static ssize_t host_show_resettable(struct device *dev, 621941b1cdaSStephen M. Cameron struct device_attribute *attr, char *buf) 622941b1cdaSStephen M. Cameron { 623941b1cdaSStephen M. Cameron struct ctlr_info *h; 624941b1cdaSStephen M. Cameron struct Scsi_Host *shost = class_to_shost(dev); 625941b1cdaSStephen M. Cameron 626941b1cdaSStephen M. Cameron h = shost_to_hba(shost); 62746380786SStephen M. Cameron return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id)); 628941b1cdaSStephen M. Cameron } 629941b1cdaSStephen M. Cameron 630edd16368SStephen M. Cameron static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[]) 631edd16368SStephen M. Cameron { 632edd16368SStephen M. Cameron return (scsi3addr[3] & 0xC0) == 0x40; 633edd16368SStephen M. Cameron } 634edd16368SStephen M. Cameron 635f2ef0ce7SRobert Elliott static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6", 6367c59a0d4SDon Brace "1(+0)ADM", "UNKNOWN", "PHYS DRV" 637edd16368SStephen M. Cameron }; 6386b80b18fSScott Teel #define HPSA_RAID_0 0 6396b80b18fSScott Teel #define HPSA_RAID_4 1 6406b80b18fSScott Teel #define HPSA_RAID_1 2 /* also used for RAID 10 */ 6416b80b18fSScott Teel #define HPSA_RAID_5 3 /* also used for RAID 50 */ 6426b80b18fSScott Teel #define HPSA_RAID_51 4 6436b80b18fSScott Teel #define HPSA_RAID_6 5 /* also used for RAID 60 */ 6446b80b18fSScott Teel #define HPSA_RAID_ADM 6 /* also used for RAID 1+0 ADM */ 6457c59a0d4SDon Brace #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 2) 6467c59a0d4SDon Brace #define PHYSICAL_DRIVE (ARRAY_SIZE(raid_label) - 1) 647edd16368SStephen M. Cameron 648f3f01730SKevin Barnett static inline bool is_logical_device(struct hpsa_scsi_dev_t *device) 649f3f01730SKevin Barnett { 650f3f01730SKevin Barnett return !device->physical_device; 651f3f01730SKevin Barnett } 652edd16368SStephen M. Cameron 653edd16368SStephen M. Cameron static ssize_t raid_level_show(struct device *dev, 654edd16368SStephen M. Cameron struct device_attribute *attr, char *buf) 655edd16368SStephen M. Cameron { 656edd16368SStephen M. Cameron ssize_t l = 0; 65782a72c0aSStephen M. Cameron unsigned char rlevel; 658edd16368SStephen M. Cameron struct ctlr_info *h; 659edd16368SStephen M. Cameron struct scsi_device *sdev; 660edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *hdev; 661edd16368SStephen M. Cameron unsigned long flags; 662edd16368SStephen M. Cameron 663edd16368SStephen M. Cameron sdev = to_scsi_device(dev); 664edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 665edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 666edd16368SStephen M. Cameron hdev = sdev->hostdata; 667edd16368SStephen M. Cameron if (!hdev) { 668edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 669edd16368SStephen M. Cameron return -ENODEV; 670edd16368SStephen M. Cameron } 671edd16368SStephen M. Cameron 672edd16368SStephen M. Cameron /* Is this even a logical drive? */ 673f3f01730SKevin Barnett if (!is_logical_device(hdev)) { 674edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 675edd16368SStephen M. Cameron l = snprintf(buf, PAGE_SIZE, "N/A\n"); 676edd16368SStephen M. Cameron return l; 677edd16368SStephen M. Cameron } 678edd16368SStephen M. Cameron 679edd16368SStephen M. Cameron rlevel = hdev->raid_level; 680edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 68182a72c0aSStephen M. Cameron if (rlevel > RAID_UNKNOWN) 682edd16368SStephen M. Cameron rlevel = RAID_UNKNOWN; 683edd16368SStephen M. Cameron l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]); 684edd16368SStephen M. Cameron return l; 685edd16368SStephen M. Cameron } 686edd16368SStephen M. Cameron 687edd16368SStephen M. Cameron static ssize_t lunid_show(struct device *dev, 688edd16368SStephen M. Cameron struct device_attribute *attr, char *buf) 689edd16368SStephen M. Cameron { 690edd16368SStephen M. Cameron struct ctlr_info *h; 691edd16368SStephen M. Cameron struct scsi_device *sdev; 692edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *hdev; 693edd16368SStephen M. Cameron unsigned long flags; 694edd16368SStephen M. Cameron unsigned char lunid[8]; 695edd16368SStephen M. Cameron 696edd16368SStephen M. Cameron sdev = to_scsi_device(dev); 697edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 698edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 699edd16368SStephen M. Cameron hdev = sdev->hostdata; 700edd16368SStephen M. Cameron if (!hdev) { 701edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 702edd16368SStephen M. Cameron return -ENODEV; 703edd16368SStephen M. Cameron } 704edd16368SStephen M. Cameron memcpy(lunid, hdev->scsi3addr, sizeof(lunid)); 705edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 706609a70dfSRasmus Villemoes return snprintf(buf, 20, "0x%8phN\n", lunid); 707edd16368SStephen M. Cameron } 708edd16368SStephen M. Cameron 709edd16368SStephen M. Cameron static ssize_t unique_id_show(struct device *dev, 710edd16368SStephen M. Cameron struct device_attribute *attr, char *buf) 711edd16368SStephen M. Cameron { 712edd16368SStephen M. Cameron struct ctlr_info *h; 713edd16368SStephen M. Cameron struct scsi_device *sdev; 714edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *hdev; 715edd16368SStephen M. Cameron unsigned long flags; 716edd16368SStephen M. Cameron unsigned char sn[16]; 717edd16368SStephen M. Cameron 718edd16368SStephen M. Cameron sdev = to_scsi_device(dev); 719edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 720edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 721edd16368SStephen M. Cameron hdev = sdev->hostdata; 722edd16368SStephen M. Cameron if (!hdev) { 723edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 724edd16368SStephen M. Cameron return -ENODEV; 725edd16368SStephen M. Cameron } 726edd16368SStephen M. Cameron memcpy(sn, hdev->device_id, sizeof(sn)); 727edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 728edd16368SStephen M. Cameron return snprintf(buf, 16 * 2 + 2, 729edd16368SStephen M. Cameron "%02X%02X%02X%02X%02X%02X%02X%02X" 730edd16368SStephen M. Cameron "%02X%02X%02X%02X%02X%02X%02X%02X\n", 731edd16368SStephen M. Cameron sn[0], sn[1], sn[2], sn[3], 732edd16368SStephen M. Cameron sn[4], sn[5], sn[6], sn[7], 733edd16368SStephen M. Cameron sn[8], sn[9], sn[10], sn[11], 734edd16368SStephen M. Cameron sn[12], sn[13], sn[14], sn[15]); 735edd16368SStephen M. Cameron } 736edd16368SStephen M. Cameron 737ded1be4aSJoseph T Handzik static ssize_t sas_address_show(struct device *dev, 738ded1be4aSJoseph T Handzik struct device_attribute *attr, char *buf) 739ded1be4aSJoseph T Handzik { 740ded1be4aSJoseph T Handzik struct ctlr_info *h; 741ded1be4aSJoseph T Handzik struct scsi_device *sdev; 742ded1be4aSJoseph T Handzik struct hpsa_scsi_dev_t *hdev; 743ded1be4aSJoseph T Handzik unsigned long flags; 744ded1be4aSJoseph T Handzik u64 sas_address; 745ded1be4aSJoseph T Handzik 746ded1be4aSJoseph T Handzik sdev = to_scsi_device(dev); 747ded1be4aSJoseph T Handzik h = sdev_to_hba(sdev); 748ded1be4aSJoseph T Handzik spin_lock_irqsave(&h->lock, flags); 749ded1be4aSJoseph T Handzik hdev = sdev->hostdata; 750ded1be4aSJoseph T Handzik if (!hdev || is_logical_device(hdev) || !hdev->expose_device) { 751ded1be4aSJoseph T Handzik spin_unlock_irqrestore(&h->lock, flags); 752ded1be4aSJoseph T Handzik return -ENODEV; 753ded1be4aSJoseph T Handzik } 754ded1be4aSJoseph T Handzik sas_address = hdev->sas_address; 755ded1be4aSJoseph T Handzik spin_unlock_irqrestore(&h->lock, flags); 756ded1be4aSJoseph T Handzik 757ded1be4aSJoseph T Handzik return snprintf(buf, PAGE_SIZE, "0x%016llx\n", sas_address); 758ded1be4aSJoseph T Handzik } 759ded1be4aSJoseph T Handzik 760c1988684SScott Teel static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev, 761c1988684SScott Teel struct device_attribute *attr, char *buf) 762c1988684SScott Teel { 763c1988684SScott Teel struct ctlr_info *h; 764c1988684SScott Teel struct scsi_device *sdev; 765c1988684SScott Teel struct hpsa_scsi_dev_t *hdev; 766c1988684SScott Teel unsigned long flags; 767c1988684SScott Teel int offload_enabled; 768c1988684SScott Teel 769c1988684SScott Teel sdev = to_scsi_device(dev); 770c1988684SScott Teel h = sdev_to_hba(sdev); 771c1988684SScott Teel spin_lock_irqsave(&h->lock, flags); 772c1988684SScott Teel hdev = sdev->hostdata; 773c1988684SScott Teel if (!hdev) { 774c1988684SScott Teel spin_unlock_irqrestore(&h->lock, flags); 775c1988684SScott Teel return -ENODEV; 776c1988684SScott Teel } 777c1988684SScott Teel offload_enabled = hdev->offload_enabled; 778c1988684SScott Teel spin_unlock_irqrestore(&h->lock, flags); 779c1988684SScott Teel return snprintf(buf, 20, "%d\n", offload_enabled); 780c1988684SScott Teel } 781c1988684SScott Teel 7828270b862SJoe Handzik #define MAX_PATHS 8 7838270b862SJoe Handzik static ssize_t path_info_show(struct device *dev, 7848270b862SJoe Handzik struct device_attribute *attr, char *buf) 7858270b862SJoe Handzik { 7868270b862SJoe Handzik struct ctlr_info *h; 7878270b862SJoe Handzik struct scsi_device *sdev; 7888270b862SJoe Handzik struct hpsa_scsi_dev_t *hdev; 7898270b862SJoe Handzik unsigned long flags; 7908270b862SJoe Handzik int i; 7918270b862SJoe Handzik int output_len = 0; 7928270b862SJoe Handzik u8 box; 7938270b862SJoe Handzik u8 bay; 7948270b862SJoe Handzik u8 path_map_index = 0; 7958270b862SJoe Handzik char *active; 7968270b862SJoe Handzik unsigned char phys_connector[2]; 7978270b862SJoe Handzik 7988270b862SJoe Handzik sdev = to_scsi_device(dev); 7998270b862SJoe Handzik h = sdev_to_hba(sdev); 8008270b862SJoe Handzik spin_lock_irqsave(&h->devlock, flags); 8018270b862SJoe Handzik hdev = sdev->hostdata; 8028270b862SJoe Handzik if (!hdev) { 8038270b862SJoe Handzik spin_unlock_irqrestore(&h->devlock, flags); 8048270b862SJoe Handzik return -ENODEV; 8058270b862SJoe Handzik } 8068270b862SJoe Handzik 8078270b862SJoe Handzik bay = hdev->bay; 8088270b862SJoe Handzik for (i = 0; i < MAX_PATHS; i++) { 8098270b862SJoe Handzik path_map_index = 1<<i; 8108270b862SJoe Handzik if (i == hdev->active_path_index) 8118270b862SJoe Handzik active = "Active"; 8128270b862SJoe Handzik else if (hdev->path_map & path_map_index) 8138270b862SJoe Handzik active = "Inactive"; 8148270b862SJoe Handzik else 8158270b862SJoe Handzik continue; 8168270b862SJoe Handzik 8171faf072cSRasmus Villemoes output_len += scnprintf(buf + output_len, 8181faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8191faf072cSRasmus Villemoes "[%d:%d:%d:%d] %20.20s ", 8208270b862SJoe Handzik h->scsi_host->host_no, 8218270b862SJoe Handzik hdev->bus, hdev->target, hdev->lun, 8228270b862SJoe Handzik scsi_device_type(hdev->devtype)); 8238270b862SJoe Handzik 824cca8f13bSDon Brace if (hdev->devtype == TYPE_RAID || is_logical_device(hdev)) { 8252708f295SDon Brace output_len += scnprintf(buf + output_len, 8261faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8271faf072cSRasmus Villemoes "%s\n", active); 8288270b862SJoe Handzik continue; 8298270b862SJoe Handzik } 8308270b862SJoe Handzik 8318270b862SJoe Handzik box = hdev->box[i]; 8328270b862SJoe Handzik memcpy(&phys_connector, &hdev->phys_connector[i], 8338270b862SJoe Handzik sizeof(phys_connector)); 8348270b862SJoe Handzik if (phys_connector[0] < '0') 8358270b862SJoe Handzik phys_connector[0] = '0'; 8368270b862SJoe Handzik if (phys_connector[1] < '0') 8378270b862SJoe Handzik phys_connector[1] = '0'; 8382708f295SDon Brace output_len += scnprintf(buf + output_len, 8391faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8408270b862SJoe Handzik "PORT: %.2s ", 8418270b862SJoe Handzik phys_connector); 842af15ed36SDon Brace if ((hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC) && 843af15ed36SDon Brace hdev->expose_device) { 8448270b862SJoe Handzik if (box == 0 || box == 0xFF) { 8452708f295SDon Brace output_len += scnprintf(buf + output_len, 8461faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8478270b862SJoe Handzik "BAY: %hhu %s\n", 8488270b862SJoe Handzik bay, active); 8498270b862SJoe Handzik } else { 8502708f295SDon Brace output_len += scnprintf(buf + output_len, 8511faf072cSRasmus Villemoes PAGE_SIZE - output_len, 8528270b862SJoe Handzik "BOX: %hhu BAY: %hhu %s\n", 8538270b862SJoe Handzik box, bay, active); 8548270b862SJoe Handzik } 8558270b862SJoe Handzik } else if (box != 0 && box != 0xFF) { 8562708f295SDon Brace output_len += scnprintf(buf + output_len, 8571faf072cSRasmus Villemoes PAGE_SIZE - output_len, "BOX: %hhu %s\n", 8588270b862SJoe Handzik box, active); 8598270b862SJoe Handzik } else 8602708f295SDon Brace output_len += scnprintf(buf + output_len, 8611faf072cSRasmus Villemoes PAGE_SIZE - output_len, "%s\n", active); 8628270b862SJoe Handzik } 8638270b862SJoe Handzik 8648270b862SJoe Handzik spin_unlock_irqrestore(&h->devlock, flags); 8651faf072cSRasmus Villemoes return output_len; 8668270b862SJoe Handzik } 8678270b862SJoe Handzik 86816961204SHannes Reinecke static ssize_t host_show_ctlr_num(struct device *dev, 86916961204SHannes Reinecke struct device_attribute *attr, char *buf) 87016961204SHannes Reinecke { 87116961204SHannes Reinecke struct ctlr_info *h; 87216961204SHannes Reinecke struct Scsi_Host *shost = class_to_shost(dev); 87316961204SHannes Reinecke 87416961204SHannes Reinecke h = shost_to_hba(shost); 87516961204SHannes Reinecke return snprintf(buf, 20, "%d\n", h->ctlr); 87616961204SHannes Reinecke } 87716961204SHannes Reinecke 8783f5eac3aSStephen M. Cameron static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL); 8793f5eac3aSStephen M. Cameron static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL); 8803f5eac3aSStephen M. Cameron static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL); 8813f5eac3aSStephen M. Cameron static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan); 882ded1be4aSJoseph T Handzik static DEVICE_ATTR(sas_address, S_IRUGO, sas_address_show, NULL); 883c1988684SScott Teel static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO, 884c1988684SScott Teel host_show_hp_ssd_smart_path_enabled, NULL); 8858270b862SJoe Handzik static DEVICE_ATTR(path_info, S_IRUGO, path_info_show, NULL); 886da0697bdSScott Teel static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH, 887da0697bdSScott Teel host_show_hp_ssd_smart_path_status, 888da0697bdSScott Teel host_store_hp_ssd_smart_path_status); 8892ba8bfc8SStephen M. Cameron static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL, 8902ba8bfc8SStephen M. Cameron host_store_raid_offload_debug); 8913f5eac3aSStephen M. Cameron static DEVICE_ATTR(firmware_revision, S_IRUGO, 8923f5eac3aSStephen M. Cameron host_show_firmware_revision, NULL); 8933f5eac3aSStephen M. Cameron static DEVICE_ATTR(commands_outstanding, S_IRUGO, 8943f5eac3aSStephen M. Cameron host_show_commands_outstanding, NULL); 8953f5eac3aSStephen M. Cameron static DEVICE_ATTR(transport_mode, S_IRUGO, 8963f5eac3aSStephen M. Cameron host_show_transport_mode, NULL); 897941b1cdaSStephen M. Cameron static DEVICE_ATTR(resettable, S_IRUGO, 898941b1cdaSStephen M. Cameron host_show_resettable, NULL); 899e985c58fSStephen Cameron static DEVICE_ATTR(lockup_detected, S_IRUGO, 900e985c58fSStephen Cameron host_show_lockup_detected, NULL); 90116961204SHannes Reinecke static DEVICE_ATTR(ctlr_num, S_IRUGO, 90216961204SHannes Reinecke host_show_ctlr_num, NULL); 9033f5eac3aSStephen M. Cameron 9043f5eac3aSStephen M. Cameron static struct device_attribute *hpsa_sdev_attrs[] = { 9053f5eac3aSStephen M. Cameron &dev_attr_raid_level, 9063f5eac3aSStephen M. Cameron &dev_attr_lunid, 9073f5eac3aSStephen M. Cameron &dev_attr_unique_id, 908c1988684SScott Teel &dev_attr_hp_ssd_smart_path_enabled, 9098270b862SJoe Handzik &dev_attr_path_info, 910ded1be4aSJoseph T Handzik &dev_attr_sas_address, 9113f5eac3aSStephen M. Cameron NULL, 9123f5eac3aSStephen M. Cameron }; 9133f5eac3aSStephen M. Cameron 9143f5eac3aSStephen M. Cameron static struct device_attribute *hpsa_shost_attrs[] = { 9153f5eac3aSStephen M. Cameron &dev_attr_rescan, 9163f5eac3aSStephen M. Cameron &dev_attr_firmware_revision, 9173f5eac3aSStephen M. Cameron &dev_attr_commands_outstanding, 9183f5eac3aSStephen M. Cameron &dev_attr_transport_mode, 919941b1cdaSStephen M. Cameron &dev_attr_resettable, 920da0697bdSScott Teel &dev_attr_hp_ssd_smart_path_status, 9212ba8bfc8SStephen M. Cameron &dev_attr_raid_offload_debug, 922fb53c439STomas Henzl &dev_attr_lockup_detected, 92316961204SHannes Reinecke &dev_attr_ctlr_num, 9243f5eac3aSStephen M. Cameron NULL, 9253f5eac3aSStephen M. Cameron }; 9263f5eac3aSStephen M. Cameron 92741ce4c35SStephen Cameron #define HPSA_NRESERVED_CMDS (HPSA_CMDS_RESERVED_FOR_ABORTS + \ 92841ce4c35SStephen Cameron HPSA_CMDS_RESERVED_FOR_DRIVER + HPSA_MAX_CONCURRENT_PASSTHRUS) 92941ce4c35SStephen Cameron 9303f5eac3aSStephen M. Cameron static struct scsi_host_template hpsa_driver_template = { 9313f5eac3aSStephen M. Cameron .module = THIS_MODULE, 932f79cfec6SStephen M. Cameron .name = HPSA, 933f79cfec6SStephen M. Cameron .proc_name = HPSA, 9343f5eac3aSStephen M. Cameron .queuecommand = hpsa_scsi_queue_command, 9353f5eac3aSStephen M. Cameron .scan_start = hpsa_scan_start, 9363f5eac3aSStephen M. Cameron .scan_finished = hpsa_scan_finished, 9377c0a0229SDon Brace .change_queue_depth = hpsa_change_queue_depth, 9383f5eac3aSStephen M. Cameron .this_id = -1, 9393f5eac3aSStephen M. Cameron .use_clustering = ENABLE_CLUSTERING, 94075167d2cSStephen M. Cameron .eh_abort_handler = hpsa_eh_abort_handler, 9413f5eac3aSStephen M. Cameron .eh_device_reset_handler = hpsa_eh_device_reset_handler, 9423f5eac3aSStephen M. Cameron .ioctl = hpsa_ioctl, 9433f5eac3aSStephen M. Cameron .slave_alloc = hpsa_slave_alloc, 94441ce4c35SStephen Cameron .slave_configure = hpsa_slave_configure, 9453f5eac3aSStephen M. Cameron .slave_destroy = hpsa_slave_destroy, 9463f5eac3aSStephen M. Cameron #ifdef CONFIG_COMPAT 9473f5eac3aSStephen M. Cameron .compat_ioctl = hpsa_compat_ioctl, 9483f5eac3aSStephen M. Cameron #endif 9493f5eac3aSStephen M. Cameron .sdev_attrs = hpsa_sdev_attrs, 9503f5eac3aSStephen M. Cameron .shost_attrs = hpsa_shost_attrs, 951c0d6a4d1SStephen M. Cameron .max_sectors = 8192, 95254b2b50cSMartin K. Petersen .no_write_same = 1, 9533f5eac3aSStephen M. Cameron }; 9543f5eac3aSStephen M. Cameron 955254f796bSMatt Gates static inline u32 next_command(struct ctlr_info *h, u8 q) 9563f5eac3aSStephen M. Cameron { 9573f5eac3aSStephen M. Cameron u32 a; 958072b0518SStephen M. Cameron struct reply_queue_buffer *rq = &h->reply_queue[q]; 9593f5eac3aSStephen M. Cameron 960e1f7de0cSMatt Gates if (h->transMethod & CFGTBL_Trans_io_accel1) 961e1f7de0cSMatt Gates return h->access.command_completed(h, q); 962e1f7de0cSMatt Gates 9633f5eac3aSStephen M. Cameron if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant))) 964254f796bSMatt Gates return h->access.command_completed(h, q); 9653f5eac3aSStephen M. Cameron 966254f796bSMatt Gates if ((rq->head[rq->current_entry] & 1) == rq->wraparound) { 967254f796bSMatt Gates a = rq->head[rq->current_entry]; 968254f796bSMatt Gates rq->current_entry++; 9690cbf768eSStephen M. Cameron atomic_dec(&h->commands_outstanding); 9703f5eac3aSStephen M. Cameron } else { 9713f5eac3aSStephen M. Cameron a = FIFO_EMPTY; 9723f5eac3aSStephen M. Cameron } 9733f5eac3aSStephen M. Cameron /* Check for wraparound */ 974254f796bSMatt Gates if (rq->current_entry == h->max_commands) { 975254f796bSMatt Gates rq->current_entry = 0; 976254f796bSMatt Gates rq->wraparound ^= 1; 9773f5eac3aSStephen M. Cameron } 9783f5eac3aSStephen M. Cameron return a; 9793f5eac3aSStephen M. Cameron } 9803f5eac3aSStephen M. Cameron 981c349775eSScott Teel /* 982c349775eSScott Teel * There are some special bits in the bus address of the 983c349775eSScott Teel * command that we have to set for the controller to know 984c349775eSScott Teel * how to process the command: 985c349775eSScott Teel * 986c349775eSScott Teel * Normal performant mode: 987c349775eSScott Teel * bit 0: 1 means performant mode, 0 means simple mode. 988c349775eSScott Teel * bits 1-3 = block fetch table entry 989c349775eSScott Teel * bits 4-6 = command type (== 0) 990c349775eSScott Teel * 991c349775eSScott Teel * ioaccel1 mode: 992c349775eSScott Teel * bit 0 = "performant mode" bit. 993c349775eSScott Teel * bits 1-3 = block fetch table entry 994c349775eSScott Teel * bits 4-6 = command type (== 110) 995c349775eSScott Teel * (command type is needed because ioaccel1 mode 996c349775eSScott Teel * commands are submitted through the same register as normal 997c349775eSScott Teel * mode commands, so this is how the controller knows whether 998c349775eSScott Teel * the command is normal mode or ioaccel1 mode.) 999c349775eSScott Teel * 1000c349775eSScott Teel * ioaccel2 mode: 1001c349775eSScott Teel * bit 0 = "performant mode" bit. 1002c349775eSScott Teel * bits 1-4 = block fetch table entry (note extra bit) 1003c349775eSScott Teel * bits 4-6 = not needed, because ioaccel2 mode has 1004c349775eSScott Teel * a separate special register for submitting commands. 1005c349775eSScott Teel */ 1006c349775eSScott Teel 100725163bd5SWebb Scales /* 100825163bd5SWebb Scales * set_performant_mode: Modify the tag for cciss performant 10093f5eac3aSStephen M. Cameron * set bit 0 for pull model, bits 3-1 for block fetch 10103f5eac3aSStephen M. Cameron * register number 10113f5eac3aSStephen M. Cameron */ 101225163bd5SWebb Scales #define DEFAULT_REPLY_QUEUE (-1) 101325163bd5SWebb Scales static void set_performant_mode(struct ctlr_info *h, struct CommandList *c, 101425163bd5SWebb Scales int reply_queue) 10153f5eac3aSStephen M. Cameron { 1016254f796bSMatt Gates if (likely(h->transMethod & CFGTBL_Trans_Performant)) { 10173f5eac3aSStephen M. Cameron c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1); 1018bc2bb154SChristoph Hellwig if (unlikely(!h->msix_vectors)) 101925163bd5SWebb Scales return; 102025163bd5SWebb Scales if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1021254f796bSMatt Gates c->Header.ReplyQueue = 1022804a5cb5SJohn Kacur raw_smp_processor_id() % h->nreply_queues; 102325163bd5SWebb Scales else 102425163bd5SWebb Scales c->Header.ReplyQueue = reply_queue % h->nreply_queues; 1025254f796bSMatt Gates } 10263f5eac3aSStephen M. Cameron } 10273f5eac3aSStephen M. Cameron 1028c349775eSScott Teel static void set_ioaccel1_performant_mode(struct ctlr_info *h, 102925163bd5SWebb Scales struct CommandList *c, 103025163bd5SWebb Scales int reply_queue) 1031c349775eSScott Teel { 1032c349775eSScott Teel struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex]; 1033c349775eSScott Teel 103425163bd5SWebb Scales /* 103525163bd5SWebb Scales * Tell the controller to post the reply to the queue for this 1036c349775eSScott Teel * processor. This seems to give the best I/O throughput. 1037c349775eSScott Teel */ 103825163bd5SWebb Scales if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1039c349775eSScott Teel cp->ReplyQueue = smp_processor_id() % h->nreply_queues; 104025163bd5SWebb Scales else 104125163bd5SWebb Scales cp->ReplyQueue = reply_queue % h->nreply_queues; 104225163bd5SWebb Scales /* 104325163bd5SWebb Scales * Set the bits in the address sent down to include: 1044c349775eSScott Teel * - performant mode bit (bit 0) 1045c349775eSScott Teel * - pull count (bits 1-3) 1046c349775eSScott Teel * - command type (bits 4-6) 1047c349775eSScott Teel */ 1048c349775eSScott Teel c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) | 1049c349775eSScott Teel IOACCEL1_BUSADDR_CMDTYPE; 1050c349775eSScott Teel } 1051c349775eSScott Teel 10528be986ccSStephen Cameron static void set_ioaccel2_tmf_performant_mode(struct ctlr_info *h, 10538be986ccSStephen Cameron struct CommandList *c, 10548be986ccSStephen Cameron int reply_queue) 10558be986ccSStephen Cameron { 10568be986ccSStephen Cameron struct hpsa_tmf_struct *cp = (struct hpsa_tmf_struct *) 10578be986ccSStephen Cameron &h->ioaccel2_cmd_pool[c->cmdindex]; 10588be986ccSStephen Cameron 10598be986ccSStephen Cameron /* Tell the controller to post the reply to the queue for this 10608be986ccSStephen Cameron * processor. This seems to give the best I/O throughput. 10618be986ccSStephen Cameron */ 10628be986ccSStephen Cameron if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 10638be986ccSStephen Cameron cp->reply_queue = smp_processor_id() % h->nreply_queues; 10648be986ccSStephen Cameron else 10658be986ccSStephen Cameron cp->reply_queue = reply_queue % h->nreply_queues; 10668be986ccSStephen Cameron /* Set the bits in the address sent down to include: 10678be986ccSStephen Cameron * - performant mode bit not used in ioaccel mode 2 10688be986ccSStephen Cameron * - pull count (bits 0-3) 10698be986ccSStephen Cameron * - command type isn't needed for ioaccel2 10708be986ccSStephen Cameron */ 10718be986ccSStephen Cameron c->busaddr |= h->ioaccel2_blockFetchTable[0]; 10728be986ccSStephen Cameron } 10738be986ccSStephen Cameron 1074c349775eSScott Teel static void set_ioaccel2_performant_mode(struct ctlr_info *h, 107525163bd5SWebb Scales struct CommandList *c, 107625163bd5SWebb Scales int reply_queue) 1077c349775eSScott Teel { 1078c349775eSScott Teel struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex]; 1079c349775eSScott Teel 108025163bd5SWebb Scales /* 108125163bd5SWebb Scales * Tell the controller to post the reply to the queue for this 1082c349775eSScott Teel * processor. This seems to give the best I/O throughput. 1083c349775eSScott Teel */ 108425163bd5SWebb Scales if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1085c349775eSScott Teel cp->reply_queue = smp_processor_id() % h->nreply_queues; 108625163bd5SWebb Scales else 108725163bd5SWebb Scales cp->reply_queue = reply_queue % h->nreply_queues; 108825163bd5SWebb Scales /* 108925163bd5SWebb Scales * Set the bits in the address sent down to include: 1090c349775eSScott Teel * - performant mode bit not used in ioaccel mode 2 1091c349775eSScott Teel * - pull count (bits 0-3) 1092c349775eSScott Teel * - command type isn't needed for ioaccel2 1093c349775eSScott Teel */ 1094c349775eSScott Teel c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]); 1095c349775eSScott Teel } 1096c349775eSScott Teel 1097e85c5974SStephen M. Cameron static int is_firmware_flash_cmd(u8 *cdb) 1098e85c5974SStephen M. Cameron { 1099e85c5974SStephen M. Cameron return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE; 1100e85c5974SStephen M. Cameron } 1101e85c5974SStephen M. Cameron 1102e85c5974SStephen M. Cameron /* 1103e85c5974SStephen M. Cameron * During firmware flash, the heartbeat register may not update as frequently 1104e85c5974SStephen M. Cameron * as it should. So we dial down lockup detection during firmware flash. and 1105e85c5974SStephen M. Cameron * dial it back up when firmware flash completes. 1106e85c5974SStephen M. Cameron */ 1107e85c5974SStephen M. Cameron #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ) 1108e85c5974SStephen M. Cameron #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ) 1109e85c5974SStephen M. Cameron static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h, 1110e85c5974SStephen M. Cameron struct CommandList *c) 1111e85c5974SStephen M. Cameron { 1112e85c5974SStephen M. Cameron if (!is_firmware_flash_cmd(c->Request.CDB)) 1113e85c5974SStephen M. Cameron return; 1114e85c5974SStephen M. Cameron atomic_inc(&h->firmware_flash_in_progress); 1115e85c5974SStephen M. Cameron h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH; 1116e85c5974SStephen M. Cameron } 1117e85c5974SStephen M. Cameron 1118e85c5974SStephen M. Cameron static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h, 1119e85c5974SStephen M. Cameron struct CommandList *c) 1120e85c5974SStephen M. Cameron { 1121e85c5974SStephen M. Cameron if (is_firmware_flash_cmd(c->Request.CDB) && 1122e85c5974SStephen M. Cameron atomic_dec_and_test(&h->firmware_flash_in_progress)) 1123e85c5974SStephen M. Cameron h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 1124e85c5974SStephen M. Cameron } 1125e85c5974SStephen M. Cameron 112625163bd5SWebb Scales static void __enqueue_cmd_and_start_io(struct ctlr_info *h, 112725163bd5SWebb Scales struct CommandList *c, int reply_queue) 11283f5eac3aSStephen M. Cameron { 1129c05e8866SStephen Cameron dial_down_lockup_detection_during_fw_flash(h, c); 1130c05e8866SStephen Cameron atomic_inc(&h->commands_outstanding); 1131c349775eSScott Teel switch (c->cmd_type) { 1132c349775eSScott Teel case CMD_IOACCEL1: 113325163bd5SWebb Scales set_ioaccel1_performant_mode(h, c, reply_queue); 1134c05e8866SStephen Cameron writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET); 1135c349775eSScott Teel break; 1136c349775eSScott Teel case CMD_IOACCEL2: 113725163bd5SWebb Scales set_ioaccel2_performant_mode(h, c, reply_queue); 1138c05e8866SStephen Cameron writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32); 1139c349775eSScott Teel break; 11408be986ccSStephen Cameron case IOACCEL2_TMF: 11418be986ccSStephen Cameron set_ioaccel2_tmf_performant_mode(h, c, reply_queue); 11428be986ccSStephen Cameron writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32); 11438be986ccSStephen Cameron break; 1144c349775eSScott Teel default: 114525163bd5SWebb Scales set_performant_mode(h, c, reply_queue); 1146f2405db8SDon Brace h->access.submit_command(h, c); 11473f5eac3aSStephen M. Cameron } 1148c05e8866SStephen Cameron } 11493f5eac3aSStephen M. Cameron 1150a58e7e53SWebb Scales static void enqueue_cmd_and_start_io(struct ctlr_info *h, struct CommandList *c) 115125163bd5SWebb Scales { 1152d604f533SWebb Scales if (unlikely(hpsa_is_pending_event(c))) 1153a58e7e53SWebb Scales return finish_cmd(c); 1154a58e7e53SWebb Scales 115525163bd5SWebb Scales __enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE); 115625163bd5SWebb Scales } 115725163bd5SWebb Scales 11583f5eac3aSStephen M. Cameron static inline int is_hba_lunid(unsigned char scsi3addr[]) 11593f5eac3aSStephen M. Cameron { 11603f5eac3aSStephen M. Cameron return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0; 11613f5eac3aSStephen M. Cameron } 11623f5eac3aSStephen M. Cameron 11633f5eac3aSStephen M. Cameron static inline int is_scsi_rev_5(struct ctlr_info *h) 11643f5eac3aSStephen M. Cameron { 11653f5eac3aSStephen M. Cameron if (!h->hba_inquiry_data) 11663f5eac3aSStephen M. Cameron return 0; 11673f5eac3aSStephen M. Cameron if ((h->hba_inquiry_data[2] & 0x07) == 5) 11683f5eac3aSStephen M. Cameron return 1; 11693f5eac3aSStephen M. Cameron return 0; 11703f5eac3aSStephen M. Cameron } 11713f5eac3aSStephen M. Cameron 1172edd16368SStephen M. Cameron static int hpsa_find_target_lun(struct ctlr_info *h, 1173edd16368SStephen M. Cameron unsigned char scsi3addr[], int bus, int *target, int *lun) 1174edd16368SStephen M. Cameron { 1175edd16368SStephen M. Cameron /* finds an unused bus, target, lun for a new physical device 1176edd16368SStephen M. Cameron * assumes h->devlock is held 1177edd16368SStephen M. Cameron */ 1178edd16368SStephen M. Cameron int i, found = 0; 1179cfe5badcSScott Teel DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES); 1180edd16368SStephen M. Cameron 1181263d9401SAkinobu Mita bitmap_zero(lun_taken, HPSA_MAX_DEVICES); 1182edd16368SStephen M. Cameron 1183edd16368SStephen M. Cameron for (i = 0; i < h->ndevices; i++) { 1184edd16368SStephen M. Cameron if (h->dev[i]->bus == bus && h->dev[i]->target != -1) 1185263d9401SAkinobu Mita __set_bit(h->dev[i]->target, lun_taken); 1186edd16368SStephen M. Cameron } 1187edd16368SStephen M. Cameron 1188263d9401SAkinobu Mita i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES); 1189263d9401SAkinobu Mita if (i < HPSA_MAX_DEVICES) { 1190edd16368SStephen M. Cameron /* *bus = 1; */ 1191edd16368SStephen M. Cameron *target = i; 1192edd16368SStephen M. Cameron *lun = 0; 1193edd16368SStephen M. Cameron found = 1; 1194edd16368SStephen M. Cameron } 1195edd16368SStephen M. Cameron return !found; 1196edd16368SStephen M. Cameron } 1197edd16368SStephen M. Cameron 11981d33d85dSDon Brace static void hpsa_show_dev_msg(const char *level, struct ctlr_info *h, 11990d96ef5fSWebb Scales struct hpsa_scsi_dev_t *dev, char *description) 12000d96ef5fSWebb Scales { 12017c59a0d4SDon Brace #define LABEL_SIZE 25 12027c59a0d4SDon Brace char label[LABEL_SIZE]; 12037c59a0d4SDon Brace 12049975ec9dSDon Brace if (h == NULL || h->pdev == NULL || h->scsi_host == NULL) 12059975ec9dSDon Brace return; 12069975ec9dSDon Brace 12077c59a0d4SDon Brace switch (dev->devtype) { 12087c59a0d4SDon Brace case TYPE_RAID: 12097c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "controller"); 12107c59a0d4SDon Brace break; 12117c59a0d4SDon Brace case TYPE_ENCLOSURE: 12127c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "enclosure"); 12137c59a0d4SDon Brace break; 12147c59a0d4SDon Brace case TYPE_DISK: 1215af15ed36SDon Brace case TYPE_ZBC: 12167c59a0d4SDon Brace if (dev->external) 12177c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "external"); 12187c59a0d4SDon Brace else if (!is_logical_dev_addr_mode(dev->scsi3addr)) 12197c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "%s", 12207c59a0d4SDon Brace raid_label[PHYSICAL_DRIVE]); 12217c59a0d4SDon Brace else 12227c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "RAID-%s", 12237c59a0d4SDon Brace dev->raid_level > RAID_UNKNOWN ? "?" : 12247c59a0d4SDon Brace raid_label[dev->raid_level]); 12257c59a0d4SDon Brace break; 12267c59a0d4SDon Brace case TYPE_ROM: 12277c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "rom"); 12287c59a0d4SDon Brace break; 12297c59a0d4SDon Brace case TYPE_TAPE: 12307c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "tape"); 12317c59a0d4SDon Brace break; 12327c59a0d4SDon Brace case TYPE_MEDIUM_CHANGER: 12337c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "changer"); 12347c59a0d4SDon Brace break; 12357c59a0d4SDon Brace default: 12367c59a0d4SDon Brace snprintf(label, LABEL_SIZE, "UNKNOWN"); 12377c59a0d4SDon Brace break; 12387c59a0d4SDon Brace } 12397c59a0d4SDon Brace 12400d96ef5fSWebb Scales dev_printk(level, &h->pdev->dev, 12417c59a0d4SDon Brace "scsi %d:%d:%d:%d: %s %s %.8s %.16s %s SSDSmartPathCap%c En%c Exp=%d\n", 12420d96ef5fSWebb Scales h->scsi_host->host_no, dev->bus, dev->target, dev->lun, 12430d96ef5fSWebb Scales description, 12440d96ef5fSWebb Scales scsi_device_type(dev->devtype), 12450d96ef5fSWebb Scales dev->vendor, 12460d96ef5fSWebb Scales dev->model, 12477c59a0d4SDon Brace label, 12480d96ef5fSWebb Scales dev->offload_config ? '+' : '-', 12490d96ef5fSWebb Scales dev->offload_enabled ? '+' : '-', 12502a168208SKevin Barnett dev->expose_device); 12510d96ef5fSWebb Scales } 12520d96ef5fSWebb Scales 1253edd16368SStephen M. Cameron /* Add an entry into h->dev[] array. */ 12548aa60681SDon Brace static int hpsa_scsi_add_entry(struct ctlr_info *h, 1255edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *device, 1256edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *added[], int *nadded) 1257edd16368SStephen M. Cameron { 1258edd16368SStephen M. Cameron /* assumes h->devlock is held */ 1259edd16368SStephen M. Cameron int n = h->ndevices; 1260edd16368SStephen M. Cameron int i; 1261edd16368SStephen M. Cameron unsigned char addr1[8], addr2[8]; 1262edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd; 1263edd16368SStephen M. Cameron 1264cfe5badcSScott Teel if (n >= HPSA_MAX_DEVICES) { 1265edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "too many devices, some will be " 1266edd16368SStephen M. Cameron "inaccessible.\n"); 1267edd16368SStephen M. Cameron return -1; 1268edd16368SStephen M. Cameron } 1269edd16368SStephen M. Cameron 1270edd16368SStephen M. Cameron /* physical devices do not have lun or target assigned until now. */ 1271edd16368SStephen M. Cameron if (device->lun != -1) 1272edd16368SStephen M. Cameron /* Logical device, lun is already assigned. */ 1273edd16368SStephen M. Cameron goto lun_assigned; 1274edd16368SStephen M. Cameron 1275edd16368SStephen M. Cameron /* If this device a non-zero lun of a multi-lun device 1276edd16368SStephen M. Cameron * byte 4 of the 8-byte LUN addr will contain the logical 12772b08b3e9SDon Brace * unit no, zero otherwise. 1278edd16368SStephen M. Cameron */ 1279edd16368SStephen M. Cameron if (device->scsi3addr[4] == 0) { 1280edd16368SStephen M. Cameron /* This is not a non-zero lun of a multi-lun device */ 1281edd16368SStephen M. Cameron if (hpsa_find_target_lun(h, device->scsi3addr, 1282edd16368SStephen M. Cameron device->bus, &device->target, &device->lun) != 0) 1283edd16368SStephen M. Cameron return -1; 1284edd16368SStephen M. Cameron goto lun_assigned; 1285edd16368SStephen M. Cameron } 1286edd16368SStephen M. Cameron 1287edd16368SStephen M. Cameron /* This is a non-zero lun of a multi-lun device. 1288edd16368SStephen M. Cameron * Search through our list and find the device which 12899a4178b7Sshane.seymour * has the same 8 byte LUN address, excepting byte 4 and 5. 1290edd16368SStephen M. Cameron * Assign the same bus and target for this new LUN. 1291edd16368SStephen M. Cameron * Use the logical unit number from the firmware. 1292edd16368SStephen M. Cameron */ 1293edd16368SStephen M. Cameron memcpy(addr1, device->scsi3addr, 8); 1294edd16368SStephen M. Cameron addr1[4] = 0; 12959a4178b7Sshane.seymour addr1[5] = 0; 1296edd16368SStephen M. Cameron for (i = 0; i < n; i++) { 1297edd16368SStephen M. Cameron sd = h->dev[i]; 1298edd16368SStephen M. Cameron memcpy(addr2, sd->scsi3addr, 8); 1299edd16368SStephen M. Cameron addr2[4] = 0; 13009a4178b7Sshane.seymour addr2[5] = 0; 13019a4178b7Sshane.seymour /* differ only in byte 4 and 5? */ 1302edd16368SStephen M. Cameron if (memcmp(addr1, addr2, 8) == 0) { 1303edd16368SStephen M. Cameron device->bus = sd->bus; 1304edd16368SStephen M. Cameron device->target = sd->target; 1305edd16368SStephen M. Cameron device->lun = device->scsi3addr[4]; 1306edd16368SStephen M. Cameron break; 1307edd16368SStephen M. Cameron } 1308edd16368SStephen M. Cameron } 1309edd16368SStephen M. Cameron if (device->lun == -1) { 1310edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "physical device with no LUN=0," 1311edd16368SStephen M. Cameron " suspect firmware bug or unsupported hardware " 1312edd16368SStephen M. Cameron "configuration.\n"); 1313edd16368SStephen M. Cameron return -1; 1314edd16368SStephen M. Cameron } 1315edd16368SStephen M. Cameron 1316edd16368SStephen M. Cameron lun_assigned: 1317edd16368SStephen M. Cameron 1318edd16368SStephen M. Cameron h->dev[n] = device; 1319edd16368SStephen M. Cameron h->ndevices++; 1320edd16368SStephen M. Cameron added[*nadded] = device; 1321edd16368SStephen M. Cameron (*nadded)++; 13220d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, device, 13232a168208SKevin Barnett device->expose_device ? "added" : "masked"); 1324a473d86cSRobert Elliott device->offload_to_be_enabled = device->offload_enabled; 1325a473d86cSRobert Elliott device->offload_enabled = 0; 1326edd16368SStephen M. Cameron return 0; 1327edd16368SStephen M. Cameron } 1328edd16368SStephen M. Cameron 1329bd9244f7SScott Teel /* Update an entry in h->dev[] array. */ 13308aa60681SDon Brace static void hpsa_scsi_update_entry(struct ctlr_info *h, 1331bd9244f7SScott Teel int entry, struct hpsa_scsi_dev_t *new_entry) 1332bd9244f7SScott Teel { 1333a473d86cSRobert Elliott int offload_enabled; 1334bd9244f7SScott Teel /* assumes h->devlock is held */ 1335bd9244f7SScott Teel BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1336bd9244f7SScott Teel 1337bd9244f7SScott Teel /* Raid level changed. */ 1338bd9244f7SScott Teel h->dev[entry]->raid_level = new_entry->raid_level; 1339250fb125SStephen M. Cameron 134003383736SDon Brace /* Raid offload parameters changed. Careful about the ordering. */ 134103383736SDon Brace if (new_entry->offload_config && new_entry->offload_enabled) { 134203383736SDon Brace /* 134303383736SDon Brace * if drive is newly offload_enabled, we want to copy the 134403383736SDon Brace * raid map data first. If previously offload_enabled and 134503383736SDon Brace * offload_config were set, raid map data had better be 134603383736SDon Brace * the same as it was before. if raid map data is changed 134703383736SDon Brace * then it had better be the case that 134803383736SDon Brace * h->dev[entry]->offload_enabled is currently 0. 134903383736SDon Brace */ 13509fb0de2dSStephen M. Cameron h->dev[entry]->raid_map = new_entry->raid_map; 135103383736SDon Brace h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 135203383736SDon Brace } 1353a3144e0bSJoe Handzik if (new_entry->hba_ioaccel_enabled) { 1354a3144e0bSJoe Handzik h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 1355a3144e0bSJoe Handzik wmb(); /* set ioaccel_handle *before* hba_ioaccel_enabled */ 1356a3144e0bSJoe Handzik } 1357a3144e0bSJoe Handzik h->dev[entry]->hba_ioaccel_enabled = new_entry->hba_ioaccel_enabled; 135803383736SDon Brace h->dev[entry]->offload_config = new_entry->offload_config; 135903383736SDon Brace h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror; 136003383736SDon Brace h->dev[entry]->queue_depth = new_entry->queue_depth; 1361250fb125SStephen M. Cameron 136241ce4c35SStephen Cameron /* 136341ce4c35SStephen Cameron * We can turn off ioaccel offload now, but need to delay turning 136441ce4c35SStephen Cameron * it on until we can update h->dev[entry]->phys_disk[], but we 136541ce4c35SStephen Cameron * can't do that until all the devices are updated. 136641ce4c35SStephen Cameron */ 136741ce4c35SStephen Cameron h->dev[entry]->offload_to_be_enabled = new_entry->offload_enabled; 136841ce4c35SStephen Cameron if (!new_entry->offload_enabled) 136941ce4c35SStephen Cameron h->dev[entry]->offload_enabled = 0; 137041ce4c35SStephen Cameron 1371a473d86cSRobert Elliott offload_enabled = h->dev[entry]->offload_enabled; 1372a473d86cSRobert Elliott h->dev[entry]->offload_enabled = h->dev[entry]->offload_to_be_enabled; 13730d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated"); 1374a473d86cSRobert Elliott h->dev[entry]->offload_enabled = offload_enabled; 1375bd9244f7SScott Teel } 1376bd9244f7SScott Teel 13772a8ccf31SStephen M. Cameron /* Replace an entry from h->dev[] array. */ 13788aa60681SDon Brace static void hpsa_scsi_replace_entry(struct ctlr_info *h, 13792a8ccf31SStephen M. Cameron int entry, struct hpsa_scsi_dev_t *new_entry, 13802a8ccf31SStephen M. Cameron struct hpsa_scsi_dev_t *added[], int *nadded, 13812a8ccf31SStephen M. Cameron struct hpsa_scsi_dev_t *removed[], int *nremoved) 13822a8ccf31SStephen M. Cameron { 13832a8ccf31SStephen M. Cameron /* assumes h->devlock is held */ 1384cfe5badcSScott Teel BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 13852a8ccf31SStephen M. Cameron removed[*nremoved] = h->dev[entry]; 13862a8ccf31SStephen M. Cameron (*nremoved)++; 138701350d05SStephen M. Cameron 138801350d05SStephen M. Cameron /* 138901350d05SStephen M. Cameron * New physical devices won't have target/lun assigned yet 139001350d05SStephen M. Cameron * so we need to preserve the values in the slot we are replacing. 139101350d05SStephen M. Cameron */ 139201350d05SStephen M. Cameron if (new_entry->target == -1) { 139301350d05SStephen M. Cameron new_entry->target = h->dev[entry]->target; 139401350d05SStephen M. Cameron new_entry->lun = h->dev[entry]->lun; 139501350d05SStephen M. Cameron } 139601350d05SStephen M. Cameron 13972a8ccf31SStephen M. Cameron h->dev[entry] = new_entry; 13982a8ccf31SStephen M. Cameron added[*nadded] = new_entry; 13992a8ccf31SStephen M. Cameron (*nadded)++; 14000d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced"); 1401a473d86cSRobert Elliott new_entry->offload_to_be_enabled = new_entry->offload_enabled; 1402a473d86cSRobert Elliott new_entry->offload_enabled = 0; 14032a8ccf31SStephen M. Cameron } 14042a8ccf31SStephen M. Cameron 1405edd16368SStephen M. Cameron /* Remove an entry from h->dev[] array. */ 14068aa60681SDon Brace static void hpsa_scsi_remove_entry(struct ctlr_info *h, int entry, 1407edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *removed[], int *nremoved) 1408edd16368SStephen M. Cameron { 1409edd16368SStephen M. Cameron /* assumes h->devlock is held */ 1410edd16368SStephen M. Cameron int i; 1411edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd; 1412edd16368SStephen M. Cameron 1413cfe5badcSScott Teel BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1414edd16368SStephen M. Cameron 1415edd16368SStephen M. Cameron sd = h->dev[entry]; 1416edd16368SStephen M. Cameron removed[*nremoved] = h->dev[entry]; 1417edd16368SStephen M. Cameron (*nremoved)++; 1418edd16368SStephen M. Cameron 1419edd16368SStephen M. Cameron for (i = entry; i < h->ndevices-1; i++) 1420edd16368SStephen M. Cameron h->dev[i] = h->dev[i+1]; 1421edd16368SStephen M. Cameron h->ndevices--; 14220d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, sd, "removed"); 1423edd16368SStephen M. Cameron } 1424edd16368SStephen M. Cameron 1425edd16368SStephen M. Cameron #define SCSI3ADDR_EQ(a, b) ( \ 1426edd16368SStephen M. Cameron (a)[7] == (b)[7] && \ 1427edd16368SStephen M. Cameron (a)[6] == (b)[6] && \ 1428edd16368SStephen M. Cameron (a)[5] == (b)[5] && \ 1429edd16368SStephen M. Cameron (a)[4] == (b)[4] && \ 1430edd16368SStephen M. Cameron (a)[3] == (b)[3] && \ 1431edd16368SStephen M. Cameron (a)[2] == (b)[2] && \ 1432edd16368SStephen M. Cameron (a)[1] == (b)[1] && \ 1433edd16368SStephen M. Cameron (a)[0] == (b)[0]) 1434edd16368SStephen M. Cameron 1435edd16368SStephen M. Cameron static void fixup_botched_add(struct ctlr_info *h, 1436edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *added) 1437edd16368SStephen M. Cameron { 1438edd16368SStephen M. Cameron /* called when scsi_add_device fails in order to re-adjust 1439edd16368SStephen M. Cameron * h->dev[] to match the mid layer's view. 1440edd16368SStephen M. Cameron */ 1441edd16368SStephen M. Cameron unsigned long flags; 1442edd16368SStephen M. Cameron int i, j; 1443edd16368SStephen M. Cameron 1444edd16368SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 1445edd16368SStephen M. Cameron for (i = 0; i < h->ndevices; i++) { 1446edd16368SStephen M. Cameron if (h->dev[i] == added) { 1447edd16368SStephen M. Cameron for (j = i; j < h->ndevices-1; j++) 1448edd16368SStephen M. Cameron h->dev[j] = h->dev[j+1]; 1449edd16368SStephen M. Cameron h->ndevices--; 1450edd16368SStephen M. Cameron break; 1451edd16368SStephen M. Cameron } 1452edd16368SStephen M. Cameron } 1453edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 1454edd16368SStephen M. Cameron kfree(added); 1455edd16368SStephen M. Cameron } 1456edd16368SStephen M. Cameron 1457edd16368SStephen M. Cameron static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1, 1458edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *dev2) 1459edd16368SStephen M. Cameron { 1460edd16368SStephen M. Cameron /* we compare everything except lun and target as these 1461edd16368SStephen M. Cameron * are not yet assigned. Compare parts likely 1462edd16368SStephen M. Cameron * to differ first 1463edd16368SStephen M. Cameron */ 1464edd16368SStephen M. Cameron if (memcmp(dev1->scsi3addr, dev2->scsi3addr, 1465edd16368SStephen M. Cameron sizeof(dev1->scsi3addr)) != 0) 1466edd16368SStephen M. Cameron return 0; 1467edd16368SStephen M. Cameron if (memcmp(dev1->device_id, dev2->device_id, 1468edd16368SStephen M. Cameron sizeof(dev1->device_id)) != 0) 1469edd16368SStephen M. Cameron return 0; 1470edd16368SStephen M. Cameron if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0) 1471edd16368SStephen M. Cameron return 0; 1472edd16368SStephen M. Cameron if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0) 1473edd16368SStephen M. Cameron return 0; 1474edd16368SStephen M. Cameron if (dev1->devtype != dev2->devtype) 1475edd16368SStephen M. Cameron return 0; 1476edd16368SStephen M. Cameron if (dev1->bus != dev2->bus) 1477edd16368SStephen M. Cameron return 0; 1478edd16368SStephen M. Cameron return 1; 1479edd16368SStephen M. Cameron } 1480edd16368SStephen M. Cameron 1481bd9244f7SScott Teel static inline int device_updated(struct hpsa_scsi_dev_t *dev1, 1482bd9244f7SScott Teel struct hpsa_scsi_dev_t *dev2) 1483bd9244f7SScott Teel { 1484bd9244f7SScott Teel /* Device attributes that can change, but don't mean 1485bd9244f7SScott Teel * that the device is a different device, nor that the OS 1486bd9244f7SScott Teel * needs to be told anything about the change. 1487bd9244f7SScott Teel */ 1488bd9244f7SScott Teel if (dev1->raid_level != dev2->raid_level) 1489bd9244f7SScott Teel return 1; 1490250fb125SStephen M. Cameron if (dev1->offload_config != dev2->offload_config) 1491250fb125SStephen M. Cameron return 1; 1492250fb125SStephen M. Cameron if (dev1->offload_enabled != dev2->offload_enabled) 1493250fb125SStephen M. Cameron return 1; 149493849508SDon Brace if (!is_logical_dev_addr_mode(dev1->scsi3addr)) 149503383736SDon Brace if (dev1->queue_depth != dev2->queue_depth) 149603383736SDon Brace return 1; 1497bd9244f7SScott Teel return 0; 1498bd9244f7SScott Teel } 1499bd9244f7SScott Teel 1500edd16368SStephen M. Cameron /* Find needle in haystack. If exact match found, return DEVICE_SAME, 1501edd16368SStephen M. Cameron * and return needle location in *index. If scsi3addr matches, but not 1502edd16368SStephen M. Cameron * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle 1503bd9244f7SScott Teel * location in *index. 1504bd9244f7SScott Teel * In the case of a minor device attribute change, such as RAID level, just 1505bd9244f7SScott Teel * return DEVICE_UPDATED, along with the updated device's location in index. 1506bd9244f7SScott Teel * If needle not found, return DEVICE_NOT_FOUND. 1507edd16368SStephen M. Cameron */ 1508edd16368SStephen M. Cameron static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle, 1509edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *haystack[], int haystack_size, 1510edd16368SStephen M. Cameron int *index) 1511edd16368SStephen M. Cameron { 1512edd16368SStephen M. Cameron int i; 1513edd16368SStephen M. Cameron #define DEVICE_NOT_FOUND 0 1514edd16368SStephen M. Cameron #define DEVICE_CHANGED 1 1515edd16368SStephen M. Cameron #define DEVICE_SAME 2 1516bd9244f7SScott Teel #define DEVICE_UPDATED 3 15171d33d85dSDon Brace if (needle == NULL) 15181d33d85dSDon Brace return DEVICE_NOT_FOUND; 15191d33d85dSDon Brace 1520edd16368SStephen M. Cameron for (i = 0; i < haystack_size; i++) { 152123231048SStephen M. Cameron if (haystack[i] == NULL) /* previously removed. */ 152223231048SStephen M. Cameron continue; 1523edd16368SStephen M. Cameron if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) { 1524edd16368SStephen M. Cameron *index = i; 1525bd9244f7SScott Teel if (device_is_the_same(needle, haystack[i])) { 1526bd9244f7SScott Teel if (device_updated(needle, haystack[i])) 1527bd9244f7SScott Teel return DEVICE_UPDATED; 1528edd16368SStephen M. Cameron return DEVICE_SAME; 1529bd9244f7SScott Teel } else { 15309846590eSStephen M. Cameron /* Keep offline devices offline */ 15319846590eSStephen M. Cameron if (needle->volume_offline) 15329846590eSStephen M. Cameron return DEVICE_NOT_FOUND; 1533edd16368SStephen M. Cameron return DEVICE_CHANGED; 1534edd16368SStephen M. Cameron } 1535edd16368SStephen M. Cameron } 1536bd9244f7SScott Teel } 1537edd16368SStephen M. Cameron *index = -1; 1538edd16368SStephen M. Cameron return DEVICE_NOT_FOUND; 1539edd16368SStephen M. Cameron } 1540edd16368SStephen M. Cameron 15419846590eSStephen M. Cameron static void hpsa_monitor_offline_device(struct ctlr_info *h, 15429846590eSStephen M. Cameron unsigned char scsi3addr[]) 15439846590eSStephen M. Cameron { 15449846590eSStephen M. Cameron struct offline_device_entry *device; 15459846590eSStephen M. Cameron unsigned long flags; 15469846590eSStephen M. Cameron 15479846590eSStephen M. Cameron /* Check to see if device is already on the list */ 15489846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 15499846590eSStephen M. Cameron list_for_each_entry(device, &h->offline_device_list, offline_list) { 15509846590eSStephen M. Cameron if (memcmp(device->scsi3addr, scsi3addr, 15519846590eSStephen M. Cameron sizeof(device->scsi3addr)) == 0) { 15529846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 15539846590eSStephen M. Cameron return; 15549846590eSStephen M. Cameron } 15559846590eSStephen M. Cameron } 15569846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 15579846590eSStephen M. Cameron 15589846590eSStephen M. Cameron /* Device is not on the list, add it. */ 15599846590eSStephen M. Cameron device = kmalloc(sizeof(*device), GFP_KERNEL); 1560*7e8a9486SAmit Kushwaha if (!device) 15619846590eSStephen M. Cameron return; 1562*7e8a9486SAmit Kushwaha 15639846590eSStephen M. Cameron memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr)); 15649846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 15659846590eSStephen M. Cameron list_add_tail(&device->offline_list, &h->offline_device_list); 15669846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 15679846590eSStephen M. Cameron } 15689846590eSStephen M. Cameron 15699846590eSStephen M. Cameron /* Print a message explaining various offline volume states */ 15709846590eSStephen M. Cameron static void hpsa_show_volume_status(struct ctlr_info *h, 15719846590eSStephen M. Cameron struct hpsa_scsi_dev_t *sd) 15729846590eSStephen M. Cameron { 15739846590eSStephen M. Cameron if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED) 15749846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15759846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n", 15769846590eSStephen M. Cameron h->scsi_host->host_no, 15779846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15789846590eSStephen M. Cameron switch (sd->volume_offline) { 15799846590eSStephen M. Cameron case HPSA_LV_OK: 15809846590eSStephen M. Cameron break; 15819846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ERASE: 15829846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15839846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n", 15849846590eSStephen M. Cameron h->scsi_host->host_no, 15859846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15869846590eSStephen M. Cameron break; 15875ca01204SScott Benesh case HPSA_LV_NOT_AVAILABLE: 15885ca01204SScott Benesh dev_info(&h->pdev->dev, 15895ca01204SScott Benesh "C%d:B%d:T%d:L%d Volume is waiting for transforming volume.\n", 15905ca01204SScott Benesh h->scsi_host->host_no, 15915ca01204SScott Benesh sd->bus, sd->target, sd->lun); 15925ca01204SScott Benesh break; 15939846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_RPI: 15949846590eSStephen M. Cameron dev_info(&h->pdev->dev, 15955ca01204SScott Benesh "C%d:B%d:T%d:L%d Volume is undergoing rapid parity init.\n", 15969846590eSStephen M. Cameron h->scsi_host->host_no, 15979846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 15989846590eSStephen M. Cameron break; 15999846590eSStephen M. Cameron case HPSA_LV_PENDING_RPI: 16009846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16019846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n", 16029846590eSStephen M. Cameron h->scsi_host->host_no, 16039846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16049846590eSStephen M. Cameron break; 16059846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_NO_KEY: 16069846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16079846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n", 16089846590eSStephen M. Cameron h->scsi_host->host_no, 16099846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16109846590eSStephen M. Cameron break; 16119846590eSStephen M. Cameron case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER: 16129846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16139846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n", 16149846590eSStephen M. Cameron h->scsi_host->host_no, 16159846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16169846590eSStephen M. Cameron break; 16179846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION: 16189846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16199846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n", 16209846590eSStephen M. Cameron h->scsi_host->host_no, 16219846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16229846590eSStephen M. Cameron break; 16239846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING: 16249846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16259846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n", 16269846590eSStephen M. Cameron h->scsi_host->host_no, 16279846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16289846590eSStephen M. Cameron break; 16299846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 16309846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16319846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n", 16329846590eSStephen M. Cameron h->scsi_host->host_no, 16339846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16349846590eSStephen M. Cameron break; 16359846590eSStephen M. Cameron case HPSA_LV_PENDING_ENCRYPTION: 16369846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16379846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n", 16389846590eSStephen M. Cameron h->scsi_host->host_no, 16399846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16409846590eSStephen M. Cameron break; 16419846590eSStephen M. Cameron case HPSA_LV_PENDING_ENCRYPTION_REKEYING: 16429846590eSStephen M. Cameron dev_info(&h->pdev->dev, 16439846590eSStephen M. Cameron "C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n", 16449846590eSStephen M. Cameron h->scsi_host->host_no, 16459846590eSStephen M. Cameron sd->bus, sd->target, sd->lun); 16469846590eSStephen M. Cameron break; 16479846590eSStephen M. Cameron } 16489846590eSStephen M. Cameron } 16499846590eSStephen M. Cameron 165003383736SDon Brace /* 165103383736SDon Brace * Figure the list of physical drive pointers for a logical drive with 165203383736SDon Brace * raid offload configured. 165303383736SDon Brace */ 165403383736SDon Brace static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h, 165503383736SDon Brace struct hpsa_scsi_dev_t *dev[], int ndevices, 165603383736SDon Brace struct hpsa_scsi_dev_t *logical_drive) 165703383736SDon Brace { 165803383736SDon Brace struct raid_map_data *map = &logical_drive->raid_map; 165903383736SDon Brace struct raid_map_disk_data *dd = &map->data[0]; 166003383736SDon Brace int i, j; 166103383736SDon Brace int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) + 166203383736SDon Brace le16_to_cpu(map->metadata_disks_per_row); 166303383736SDon Brace int nraid_map_entries = le16_to_cpu(map->row_cnt) * 166403383736SDon Brace le16_to_cpu(map->layout_map_count) * 166503383736SDon Brace total_disks_per_row; 166603383736SDon Brace int nphys_disk = le16_to_cpu(map->layout_map_count) * 166703383736SDon Brace total_disks_per_row; 166803383736SDon Brace int qdepth; 166903383736SDon Brace 167003383736SDon Brace if (nraid_map_entries > RAID_MAP_MAX_ENTRIES) 167103383736SDon Brace nraid_map_entries = RAID_MAP_MAX_ENTRIES; 167203383736SDon Brace 1673d604f533SWebb Scales logical_drive->nphysical_disks = nraid_map_entries; 1674d604f533SWebb Scales 167503383736SDon Brace qdepth = 0; 167603383736SDon Brace for (i = 0; i < nraid_map_entries; i++) { 167703383736SDon Brace logical_drive->phys_disk[i] = NULL; 167803383736SDon Brace if (!logical_drive->offload_config) 167903383736SDon Brace continue; 168003383736SDon Brace for (j = 0; j < ndevices; j++) { 16811d33d85dSDon Brace if (dev[j] == NULL) 16821d33d85dSDon Brace continue; 1683ff615f06SPetros Koutoupis if (dev[j]->devtype != TYPE_DISK && 1684ff615f06SPetros Koutoupis dev[j]->devtype != TYPE_ZBC) 1685af15ed36SDon Brace continue; 1686f3f01730SKevin Barnett if (is_logical_device(dev[j])) 168703383736SDon Brace continue; 168803383736SDon Brace if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle) 168903383736SDon Brace continue; 169003383736SDon Brace 169103383736SDon Brace logical_drive->phys_disk[i] = dev[j]; 169203383736SDon Brace if (i < nphys_disk) 169303383736SDon Brace qdepth = min(h->nr_cmds, qdepth + 169403383736SDon Brace logical_drive->phys_disk[i]->queue_depth); 169503383736SDon Brace break; 169603383736SDon Brace } 169703383736SDon Brace 169803383736SDon Brace /* 169903383736SDon Brace * This can happen if a physical drive is removed and 170003383736SDon Brace * the logical drive is degraded. In that case, the RAID 170103383736SDon Brace * map data will refer to a physical disk which isn't actually 170203383736SDon Brace * present. And in that case offload_enabled should already 170303383736SDon Brace * be 0, but we'll turn it off here just in case 170403383736SDon Brace */ 170503383736SDon Brace if (!logical_drive->phys_disk[i]) { 170603383736SDon Brace logical_drive->offload_enabled = 0; 170741ce4c35SStephen Cameron logical_drive->offload_to_be_enabled = 0; 170841ce4c35SStephen Cameron logical_drive->queue_depth = 8; 170903383736SDon Brace } 171003383736SDon Brace } 171103383736SDon Brace if (nraid_map_entries) 171203383736SDon Brace /* 171303383736SDon Brace * This is correct for reads, too high for full stripe writes, 171403383736SDon Brace * way too high for partial stripe writes 171503383736SDon Brace */ 171603383736SDon Brace logical_drive->queue_depth = qdepth; 171703383736SDon Brace else 171803383736SDon Brace logical_drive->queue_depth = h->nr_cmds; 171903383736SDon Brace } 172003383736SDon Brace 172103383736SDon Brace static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h, 172203383736SDon Brace struct hpsa_scsi_dev_t *dev[], int ndevices) 172303383736SDon Brace { 172403383736SDon Brace int i; 172503383736SDon Brace 172603383736SDon Brace for (i = 0; i < ndevices; i++) { 17271d33d85dSDon Brace if (dev[i] == NULL) 17281d33d85dSDon Brace continue; 1729ff615f06SPetros Koutoupis if (dev[i]->devtype != TYPE_DISK && 1730ff615f06SPetros Koutoupis dev[i]->devtype != TYPE_ZBC) 1731af15ed36SDon Brace continue; 1732f3f01730SKevin Barnett if (!is_logical_device(dev[i])) 173303383736SDon Brace continue; 173441ce4c35SStephen Cameron 173541ce4c35SStephen Cameron /* 173641ce4c35SStephen Cameron * If offload is currently enabled, the RAID map and 173741ce4c35SStephen Cameron * phys_disk[] assignment *better* not be changing 173841ce4c35SStephen Cameron * and since it isn't changing, we do not need to 173941ce4c35SStephen Cameron * update it. 174041ce4c35SStephen Cameron */ 174141ce4c35SStephen Cameron if (dev[i]->offload_enabled) 174241ce4c35SStephen Cameron continue; 174341ce4c35SStephen Cameron 174403383736SDon Brace hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]); 174503383736SDon Brace } 174603383736SDon Brace } 174703383736SDon Brace 1748096ccff4SKevin Barnett static int hpsa_add_device(struct ctlr_info *h, struct hpsa_scsi_dev_t *device) 1749096ccff4SKevin Barnett { 1750096ccff4SKevin Barnett int rc = 0; 1751096ccff4SKevin Barnett 1752096ccff4SKevin Barnett if (!h->scsi_host) 1753096ccff4SKevin Barnett return 1; 1754096ccff4SKevin Barnett 1755d04e62b9SKevin Barnett if (is_logical_device(device)) /* RAID */ 1756096ccff4SKevin Barnett rc = scsi_add_device(h->scsi_host, device->bus, 1757096ccff4SKevin Barnett device->target, device->lun); 1758d04e62b9SKevin Barnett else /* HBA */ 1759d04e62b9SKevin Barnett rc = hpsa_add_sas_device(h->sas_host, device); 1760d04e62b9SKevin Barnett 1761096ccff4SKevin Barnett return rc; 1762096ccff4SKevin Barnett } 1763096ccff4SKevin Barnett 1764ba74fdc4SDon Brace static int hpsa_find_outstanding_commands_for_dev(struct ctlr_info *h, 1765ba74fdc4SDon Brace struct hpsa_scsi_dev_t *dev) 1766ba74fdc4SDon Brace { 1767ba74fdc4SDon Brace int i; 1768ba74fdc4SDon Brace int count = 0; 1769ba74fdc4SDon Brace 1770ba74fdc4SDon Brace for (i = 0; i < h->nr_cmds; i++) { 1771ba74fdc4SDon Brace struct CommandList *c = h->cmd_pool + i; 1772ba74fdc4SDon Brace int refcount = atomic_inc_return(&c->refcount); 1773ba74fdc4SDon Brace 1774ba74fdc4SDon Brace if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, 1775ba74fdc4SDon Brace dev->scsi3addr)) { 1776ba74fdc4SDon Brace unsigned long flags; 1777ba74fdc4SDon Brace 1778ba74fdc4SDon Brace spin_lock_irqsave(&h->lock, flags); /* Implied MB */ 1779ba74fdc4SDon Brace if (!hpsa_is_cmd_idle(c)) 1780ba74fdc4SDon Brace ++count; 1781ba74fdc4SDon Brace spin_unlock_irqrestore(&h->lock, flags); 1782ba74fdc4SDon Brace } 1783ba74fdc4SDon Brace 1784ba74fdc4SDon Brace cmd_free(h, c); 1785ba74fdc4SDon Brace } 1786ba74fdc4SDon Brace 1787ba74fdc4SDon Brace return count; 1788ba74fdc4SDon Brace } 1789ba74fdc4SDon Brace 1790ba74fdc4SDon Brace static void hpsa_wait_for_outstanding_commands_for_dev(struct ctlr_info *h, 1791ba74fdc4SDon Brace struct hpsa_scsi_dev_t *device) 1792ba74fdc4SDon Brace { 1793ba74fdc4SDon Brace int cmds = 0; 1794ba74fdc4SDon Brace int waits = 0; 1795ba74fdc4SDon Brace 1796ba74fdc4SDon Brace while (1) { 1797ba74fdc4SDon Brace cmds = hpsa_find_outstanding_commands_for_dev(h, device); 1798ba74fdc4SDon Brace if (cmds == 0) 1799ba74fdc4SDon Brace break; 1800ba74fdc4SDon Brace if (++waits > 20) 1801ba74fdc4SDon Brace break; 1802ba74fdc4SDon Brace dev_warn(&h->pdev->dev, 1803ba74fdc4SDon Brace "%s: removing device with %d outstanding commands!\n", 1804ba74fdc4SDon Brace __func__, cmds); 1805ba74fdc4SDon Brace msleep(1000); 1806ba74fdc4SDon Brace } 1807ba74fdc4SDon Brace } 1808ba74fdc4SDon Brace 1809096ccff4SKevin Barnett static void hpsa_remove_device(struct ctlr_info *h, 1810096ccff4SKevin Barnett struct hpsa_scsi_dev_t *device) 1811096ccff4SKevin Barnett { 1812096ccff4SKevin Barnett struct scsi_device *sdev = NULL; 1813096ccff4SKevin Barnett 1814096ccff4SKevin Barnett if (!h->scsi_host) 1815096ccff4SKevin Barnett return; 1816096ccff4SKevin Barnett 1817d04e62b9SKevin Barnett if (is_logical_device(device)) { /* RAID */ 1818096ccff4SKevin Barnett sdev = scsi_device_lookup(h->scsi_host, device->bus, 1819096ccff4SKevin Barnett device->target, device->lun); 1820096ccff4SKevin Barnett if (sdev) { 1821096ccff4SKevin Barnett scsi_remove_device(sdev); 1822096ccff4SKevin Barnett scsi_device_put(sdev); 1823096ccff4SKevin Barnett } else { 1824096ccff4SKevin Barnett /* 1825096ccff4SKevin Barnett * We don't expect to get here. Future commands 1826096ccff4SKevin Barnett * to this device will get a selection timeout as 1827096ccff4SKevin Barnett * if the device were gone. 1828096ccff4SKevin Barnett */ 1829096ccff4SKevin Barnett hpsa_show_dev_msg(KERN_WARNING, h, device, 1830096ccff4SKevin Barnett "didn't find device for removal."); 1831096ccff4SKevin Barnett } 1832ba74fdc4SDon Brace } else { /* HBA */ 1833ba74fdc4SDon Brace 1834ba74fdc4SDon Brace device->removed = 1; 1835ba74fdc4SDon Brace hpsa_wait_for_outstanding_commands_for_dev(h, device); 1836ba74fdc4SDon Brace 1837d04e62b9SKevin Barnett hpsa_remove_sas_device(device); 1838096ccff4SKevin Barnett } 1839ba74fdc4SDon Brace } 1840096ccff4SKevin Barnett 18418aa60681SDon Brace static void adjust_hpsa_scsi_table(struct ctlr_info *h, 1842edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd[], int nsds) 1843edd16368SStephen M. Cameron { 1844edd16368SStephen M. Cameron /* sd contains scsi3 addresses and devtypes, and inquiry 1845edd16368SStephen M. Cameron * data. This function takes what's in sd to be the current 1846edd16368SStephen M. Cameron * reality and updates h->dev[] to reflect that reality. 1847edd16368SStephen M. Cameron */ 1848edd16368SStephen M. Cameron int i, entry, device_change, changes = 0; 1849edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *csd; 1850edd16368SStephen M. Cameron unsigned long flags; 1851edd16368SStephen M. Cameron struct hpsa_scsi_dev_t **added, **removed; 1852edd16368SStephen M. Cameron int nadded, nremoved; 1853edd16368SStephen M. Cameron 1854da03ded0SDon Brace /* 1855da03ded0SDon Brace * A reset can cause a device status to change 1856da03ded0SDon Brace * re-schedule the scan to see what happened. 1857da03ded0SDon Brace */ 1858da03ded0SDon Brace if (h->reset_in_progress) { 1859da03ded0SDon Brace h->drv_req_rescan = 1; 1860da03ded0SDon Brace return; 1861da03ded0SDon Brace } 1862edd16368SStephen M. Cameron 1863cfe5badcSScott Teel added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL); 1864cfe5badcSScott Teel removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL); 1865edd16368SStephen M. Cameron 1866edd16368SStephen M. Cameron if (!added || !removed) { 1867edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "out of memory in " 1868edd16368SStephen M. Cameron "adjust_hpsa_scsi_table\n"); 1869edd16368SStephen M. Cameron goto free_and_out; 1870edd16368SStephen M. Cameron } 1871edd16368SStephen M. Cameron 1872edd16368SStephen M. Cameron spin_lock_irqsave(&h->devlock, flags); 1873edd16368SStephen M. Cameron 1874edd16368SStephen M. Cameron /* find any devices in h->dev[] that are not in 1875edd16368SStephen M. Cameron * sd[] and remove them from h->dev[], and for any 1876edd16368SStephen M. Cameron * devices which have changed, remove the old device 1877edd16368SStephen M. Cameron * info and add the new device info. 1878bd9244f7SScott Teel * If minor device attributes change, just update 1879bd9244f7SScott Teel * the existing device structure. 1880edd16368SStephen M. Cameron */ 1881edd16368SStephen M. Cameron i = 0; 1882edd16368SStephen M. Cameron nremoved = 0; 1883edd16368SStephen M. Cameron nadded = 0; 1884edd16368SStephen M. Cameron while (i < h->ndevices) { 1885edd16368SStephen M. Cameron csd = h->dev[i]; 1886edd16368SStephen M. Cameron device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry); 1887edd16368SStephen M. Cameron if (device_change == DEVICE_NOT_FOUND) { 1888edd16368SStephen M. Cameron changes++; 18898aa60681SDon Brace hpsa_scsi_remove_entry(h, i, removed, &nremoved); 1890edd16368SStephen M. Cameron continue; /* remove ^^^, hence i not incremented */ 1891edd16368SStephen M. Cameron } else if (device_change == DEVICE_CHANGED) { 1892edd16368SStephen M. Cameron changes++; 18938aa60681SDon Brace hpsa_scsi_replace_entry(h, i, sd[entry], 18942a8ccf31SStephen M. Cameron added, &nadded, removed, &nremoved); 1895c7f172dcSStephen M. Cameron /* Set it to NULL to prevent it from being freed 1896c7f172dcSStephen M. Cameron * at the bottom of hpsa_update_scsi_devices() 1897c7f172dcSStephen M. Cameron */ 1898c7f172dcSStephen M. Cameron sd[entry] = NULL; 1899bd9244f7SScott Teel } else if (device_change == DEVICE_UPDATED) { 19008aa60681SDon Brace hpsa_scsi_update_entry(h, i, sd[entry]); 1901edd16368SStephen M. Cameron } 1902edd16368SStephen M. Cameron i++; 1903edd16368SStephen M. Cameron } 1904edd16368SStephen M. Cameron 1905edd16368SStephen M. Cameron /* Now, make sure every device listed in sd[] is also 1906edd16368SStephen M. Cameron * listed in h->dev[], adding them if they aren't found 1907edd16368SStephen M. Cameron */ 1908edd16368SStephen M. Cameron 1909edd16368SStephen M. Cameron for (i = 0; i < nsds; i++) { 1910edd16368SStephen M. Cameron if (!sd[i]) /* if already added above. */ 1911edd16368SStephen M. Cameron continue; 19129846590eSStephen M. Cameron 19139846590eSStephen M. Cameron /* Don't add devices which are NOT READY, FORMAT IN PROGRESS 19149846590eSStephen M. Cameron * as the SCSI mid-layer does not handle such devices well. 19159846590eSStephen M. Cameron * It relentlessly loops sending TUR at 3Hz, then READ(10) 19169846590eSStephen M. Cameron * at 160Hz, and prevents the system from coming up. 19179846590eSStephen M. Cameron */ 19189846590eSStephen M. Cameron if (sd[i]->volume_offline) { 19199846590eSStephen M. Cameron hpsa_show_volume_status(h, sd[i]); 19200d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline"); 19219846590eSStephen M. Cameron continue; 19229846590eSStephen M. Cameron } 19239846590eSStephen M. Cameron 1924edd16368SStephen M. Cameron device_change = hpsa_scsi_find_entry(sd[i], h->dev, 1925edd16368SStephen M. Cameron h->ndevices, &entry); 1926edd16368SStephen M. Cameron if (device_change == DEVICE_NOT_FOUND) { 1927edd16368SStephen M. Cameron changes++; 19288aa60681SDon Brace if (hpsa_scsi_add_entry(h, sd[i], added, &nadded) != 0) 1929edd16368SStephen M. Cameron break; 1930edd16368SStephen M. Cameron sd[i] = NULL; /* prevent from being freed later. */ 1931edd16368SStephen M. Cameron } else if (device_change == DEVICE_CHANGED) { 1932edd16368SStephen M. Cameron /* should never happen... */ 1933edd16368SStephen M. Cameron changes++; 1934edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 1935edd16368SStephen M. Cameron "device unexpectedly changed.\n"); 1936edd16368SStephen M. Cameron /* but if it does happen, we just ignore that device */ 1937edd16368SStephen M. Cameron } 1938edd16368SStephen M. Cameron } 193941ce4c35SStephen Cameron hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices); 194041ce4c35SStephen Cameron 194141ce4c35SStephen Cameron /* Now that h->dev[]->phys_disk[] is coherent, we can enable 194241ce4c35SStephen Cameron * any logical drives that need it enabled. 194341ce4c35SStephen Cameron */ 19441d33d85dSDon Brace for (i = 0; i < h->ndevices; i++) { 19451d33d85dSDon Brace if (h->dev[i] == NULL) 19461d33d85dSDon Brace continue; 194741ce4c35SStephen Cameron h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled; 19481d33d85dSDon Brace } 194941ce4c35SStephen Cameron 1950edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->devlock, flags); 1951edd16368SStephen M. Cameron 19529846590eSStephen M. Cameron /* Monitor devices which are in one of several NOT READY states to be 19539846590eSStephen M. Cameron * brought online later. This must be done without holding h->devlock, 19549846590eSStephen M. Cameron * so don't touch h->dev[] 19559846590eSStephen M. Cameron */ 19569846590eSStephen M. Cameron for (i = 0; i < nsds; i++) { 19579846590eSStephen M. Cameron if (!sd[i]) /* if already added above. */ 19589846590eSStephen M. Cameron continue; 19599846590eSStephen M. Cameron if (sd[i]->volume_offline) 19609846590eSStephen M. Cameron hpsa_monitor_offline_device(h, sd[i]->scsi3addr); 19619846590eSStephen M. Cameron } 19629846590eSStephen M. Cameron 1963edd16368SStephen M. Cameron /* Don't notify scsi mid layer of any changes the first time through 1964edd16368SStephen M. Cameron * (or if there are no changes) scsi_scan_host will do it later the 1965edd16368SStephen M. Cameron * first time through. 1966edd16368SStephen M. Cameron */ 19678aa60681SDon Brace if (!changes) 1968edd16368SStephen M. Cameron goto free_and_out; 1969edd16368SStephen M. Cameron 1970edd16368SStephen M. Cameron /* Notify scsi mid layer of any removed devices */ 1971edd16368SStephen M. Cameron for (i = 0; i < nremoved; i++) { 19721d33d85dSDon Brace if (removed[i] == NULL) 19731d33d85dSDon Brace continue; 1974096ccff4SKevin Barnett if (removed[i]->expose_device) 1975096ccff4SKevin Barnett hpsa_remove_device(h, removed[i]); 1976edd16368SStephen M. Cameron kfree(removed[i]); 1977edd16368SStephen M. Cameron removed[i] = NULL; 1978edd16368SStephen M. Cameron } 1979edd16368SStephen M. Cameron 1980edd16368SStephen M. Cameron /* Notify scsi mid layer of any added devices */ 1981edd16368SStephen M. Cameron for (i = 0; i < nadded; i++) { 1982096ccff4SKevin Barnett int rc = 0; 1983096ccff4SKevin Barnett 19841d33d85dSDon Brace if (added[i] == NULL) 198541ce4c35SStephen Cameron continue; 19862a168208SKevin Barnett if (!(added[i]->expose_device)) 1987edd16368SStephen M. Cameron continue; 1988096ccff4SKevin Barnett rc = hpsa_add_device(h, added[i]); 1989096ccff4SKevin Barnett if (!rc) 1990edd16368SStephen M. Cameron continue; 1991096ccff4SKevin Barnett dev_warn(&h->pdev->dev, 1992096ccff4SKevin Barnett "addition failed %d, device not added.", rc); 1993edd16368SStephen M. Cameron /* now we have to remove it from h->dev, 1994edd16368SStephen M. Cameron * since it didn't get added to scsi mid layer 1995edd16368SStephen M. Cameron */ 1996edd16368SStephen M. Cameron fixup_botched_add(h, added[i]); 1997853633e8SDon Brace h->drv_req_rescan = 1; 1998edd16368SStephen M. Cameron } 1999edd16368SStephen M. Cameron 2000edd16368SStephen M. Cameron free_and_out: 2001edd16368SStephen M. Cameron kfree(added); 2002edd16368SStephen M. Cameron kfree(removed); 2003edd16368SStephen M. Cameron } 2004edd16368SStephen M. Cameron 2005edd16368SStephen M. Cameron /* 20069e03aa2fSJoe Perches * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t * 2007edd16368SStephen M. Cameron * Assume's h->devlock is held. 2008edd16368SStephen M. Cameron */ 2009edd16368SStephen M. Cameron static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h, 2010edd16368SStephen M. Cameron int bus, int target, int lun) 2011edd16368SStephen M. Cameron { 2012edd16368SStephen M. Cameron int i; 2013edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *sd; 2014edd16368SStephen M. Cameron 2015edd16368SStephen M. Cameron for (i = 0; i < h->ndevices; i++) { 2016edd16368SStephen M. Cameron sd = h->dev[i]; 2017edd16368SStephen M. Cameron if (sd->bus == bus && sd->target == target && sd->lun == lun) 2018edd16368SStephen M. Cameron return sd; 2019edd16368SStephen M. Cameron } 2020edd16368SStephen M. Cameron return NULL; 2021edd16368SStephen M. Cameron } 2022edd16368SStephen M. Cameron 2023edd16368SStephen M. Cameron static int hpsa_slave_alloc(struct scsi_device *sdev) 2024edd16368SStephen M. Cameron { 20257630b3a5SHannes Reinecke struct hpsa_scsi_dev_t *sd = NULL; 2026edd16368SStephen M. Cameron unsigned long flags; 2027edd16368SStephen M. Cameron struct ctlr_info *h; 2028edd16368SStephen M. Cameron 2029edd16368SStephen M. Cameron h = sdev_to_hba(sdev); 2030edd16368SStephen M. Cameron spin_lock_irqsave(&h->devlock, flags); 2031d04e62b9SKevin Barnett if (sdev_channel(sdev) == HPSA_PHYSICAL_DEVICE_BUS) { 2032d04e62b9SKevin Barnett struct scsi_target *starget; 2033d04e62b9SKevin Barnett struct sas_rphy *rphy; 2034d04e62b9SKevin Barnett 2035d04e62b9SKevin Barnett starget = scsi_target(sdev); 2036d04e62b9SKevin Barnett rphy = target_to_rphy(starget); 2037d04e62b9SKevin Barnett sd = hpsa_find_device_by_sas_rphy(h, rphy); 2038d04e62b9SKevin Barnett if (sd) { 2039d04e62b9SKevin Barnett sd->target = sdev_id(sdev); 2040d04e62b9SKevin Barnett sd->lun = sdev->lun; 2041d04e62b9SKevin Barnett } 20427630b3a5SHannes Reinecke } 20437630b3a5SHannes Reinecke if (!sd) 2044edd16368SStephen M. Cameron sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev), 2045edd16368SStephen M. Cameron sdev_id(sdev), sdev->lun); 2046d04e62b9SKevin Barnett 2047d04e62b9SKevin Barnett if (sd && sd->expose_device) { 204803383736SDon Brace atomic_set(&sd->ioaccel_cmds_out, 0); 2049d04e62b9SKevin Barnett sdev->hostdata = sd; 205041ce4c35SStephen Cameron } else 205141ce4c35SStephen Cameron sdev->hostdata = NULL; 2052edd16368SStephen M. Cameron spin_unlock_irqrestore(&h->devlock, flags); 2053edd16368SStephen M. Cameron return 0; 2054edd16368SStephen M. Cameron } 2055edd16368SStephen M. Cameron 205641ce4c35SStephen Cameron /* configure scsi device based on internal per-device structure */ 205741ce4c35SStephen Cameron static int hpsa_slave_configure(struct scsi_device *sdev) 205841ce4c35SStephen Cameron { 205941ce4c35SStephen Cameron struct hpsa_scsi_dev_t *sd; 206041ce4c35SStephen Cameron int queue_depth; 206141ce4c35SStephen Cameron 206241ce4c35SStephen Cameron sd = sdev->hostdata; 20632a168208SKevin Barnett sdev->no_uld_attach = !sd || !sd->expose_device; 206441ce4c35SStephen Cameron 206541ce4c35SStephen Cameron if (sd) 206641ce4c35SStephen Cameron queue_depth = sd->queue_depth != 0 ? 206741ce4c35SStephen Cameron sd->queue_depth : sdev->host->can_queue; 206841ce4c35SStephen Cameron else 206941ce4c35SStephen Cameron queue_depth = sdev->host->can_queue; 207041ce4c35SStephen Cameron 207141ce4c35SStephen Cameron scsi_change_queue_depth(sdev, queue_depth); 207241ce4c35SStephen Cameron 207341ce4c35SStephen Cameron return 0; 207441ce4c35SStephen Cameron } 207541ce4c35SStephen Cameron 2076edd16368SStephen M. Cameron static void hpsa_slave_destroy(struct scsi_device *sdev) 2077edd16368SStephen M. Cameron { 2078bcc44255SStephen M. Cameron /* nothing to do. */ 2079edd16368SStephen M. Cameron } 2080edd16368SStephen M. Cameron 2081d9a729f3SWebb Scales static void hpsa_free_ioaccel2_sg_chain_blocks(struct ctlr_info *h) 2082d9a729f3SWebb Scales { 2083d9a729f3SWebb Scales int i; 2084d9a729f3SWebb Scales 2085d9a729f3SWebb Scales if (!h->ioaccel2_cmd_sg_list) 2086d9a729f3SWebb Scales return; 2087d9a729f3SWebb Scales for (i = 0; i < h->nr_cmds; i++) { 2088d9a729f3SWebb Scales kfree(h->ioaccel2_cmd_sg_list[i]); 2089d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list[i] = NULL; 2090d9a729f3SWebb Scales } 2091d9a729f3SWebb Scales kfree(h->ioaccel2_cmd_sg_list); 2092d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list = NULL; 2093d9a729f3SWebb Scales } 2094d9a729f3SWebb Scales 2095d9a729f3SWebb Scales static int hpsa_allocate_ioaccel2_sg_chain_blocks(struct ctlr_info *h) 2096d9a729f3SWebb Scales { 2097d9a729f3SWebb Scales int i; 2098d9a729f3SWebb Scales 2099d9a729f3SWebb Scales if (h->chainsize <= 0) 2100d9a729f3SWebb Scales return 0; 2101d9a729f3SWebb Scales 2102d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list = 2103d9a729f3SWebb Scales kzalloc(sizeof(*h->ioaccel2_cmd_sg_list) * h->nr_cmds, 2104d9a729f3SWebb Scales GFP_KERNEL); 2105d9a729f3SWebb Scales if (!h->ioaccel2_cmd_sg_list) 2106d9a729f3SWebb Scales return -ENOMEM; 2107d9a729f3SWebb Scales for (i = 0; i < h->nr_cmds; i++) { 2108d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list[i] = 2109d9a729f3SWebb Scales kmalloc(sizeof(*h->ioaccel2_cmd_sg_list[i]) * 2110d9a729f3SWebb Scales h->maxsgentries, GFP_KERNEL); 2111d9a729f3SWebb Scales if (!h->ioaccel2_cmd_sg_list[i]) 2112d9a729f3SWebb Scales goto clean; 2113d9a729f3SWebb Scales } 2114d9a729f3SWebb Scales return 0; 2115d9a729f3SWebb Scales 2116d9a729f3SWebb Scales clean: 2117d9a729f3SWebb Scales hpsa_free_ioaccel2_sg_chain_blocks(h); 2118d9a729f3SWebb Scales return -ENOMEM; 2119d9a729f3SWebb Scales } 2120d9a729f3SWebb Scales 212133a2ffceSStephen M. Cameron static void hpsa_free_sg_chain_blocks(struct ctlr_info *h) 212233a2ffceSStephen M. Cameron { 212333a2ffceSStephen M. Cameron int i; 212433a2ffceSStephen M. Cameron 212533a2ffceSStephen M. Cameron if (!h->cmd_sg_list) 212633a2ffceSStephen M. Cameron return; 212733a2ffceSStephen M. Cameron for (i = 0; i < h->nr_cmds; i++) { 212833a2ffceSStephen M. Cameron kfree(h->cmd_sg_list[i]); 212933a2ffceSStephen M. Cameron h->cmd_sg_list[i] = NULL; 213033a2ffceSStephen M. Cameron } 213133a2ffceSStephen M. Cameron kfree(h->cmd_sg_list); 213233a2ffceSStephen M. Cameron h->cmd_sg_list = NULL; 213333a2ffceSStephen M. Cameron } 213433a2ffceSStephen M. Cameron 2135105a3dbcSRobert Elliott static int hpsa_alloc_sg_chain_blocks(struct ctlr_info *h) 213633a2ffceSStephen M. Cameron { 213733a2ffceSStephen M. Cameron int i; 213833a2ffceSStephen M. Cameron 213933a2ffceSStephen M. Cameron if (h->chainsize <= 0) 214033a2ffceSStephen M. Cameron return 0; 214133a2ffceSStephen M. Cameron 214233a2ffceSStephen M. Cameron h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds, 214333a2ffceSStephen M. Cameron GFP_KERNEL); 2144*7e8a9486SAmit Kushwaha if (!h->cmd_sg_list) 214533a2ffceSStephen M. Cameron return -ENOMEM; 2146*7e8a9486SAmit Kushwaha 214733a2ffceSStephen M. Cameron for (i = 0; i < h->nr_cmds; i++) { 214833a2ffceSStephen M. Cameron h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) * 214933a2ffceSStephen M. Cameron h->chainsize, GFP_KERNEL); 2150*7e8a9486SAmit Kushwaha if (!h->cmd_sg_list[i]) 215133a2ffceSStephen M. Cameron goto clean; 2152*7e8a9486SAmit Kushwaha 21533d4e6af8SRobert Elliott } 215433a2ffceSStephen M. Cameron return 0; 215533a2ffceSStephen M. Cameron 215633a2ffceSStephen M. Cameron clean: 215733a2ffceSStephen M. Cameron hpsa_free_sg_chain_blocks(h); 215833a2ffceSStephen M. Cameron return -ENOMEM; 215933a2ffceSStephen M. Cameron } 216033a2ffceSStephen M. Cameron 2161d9a729f3SWebb Scales static int hpsa_map_ioaccel2_sg_chain_block(struct ctlr_info *h, 2162d9a729f3SWebb Scales struct io_accel2_cmd *cp, struct CommandList *c) 2163d9a729f3SWebb Scales { 2164d9a729f3SWebb Scales struct ioaccel2_sg_element *chain_block; 2165d9a729f3SWebb Scales u64 temp64; 2166d9a729f3SWebb Scales u32 chain_size; 2167d9a729f3SWebb Scales 2168d9a729f3SWebb Scales chain_block = h->ioaccel2_cmd_sg_list[c->cmdindex]; 2169a736e9b6SDon Brace chain_size = le32_to_cpu(cp->sg[0].length); 2170d9a729f3SWebb Scales temp64 = pci_map_single(h->pdev, chain_block, chain_size, 2171d9a729f3SWebb Scales PCI_DMA_TODEVICE); 2172d9a729f3SWebb Scales if (dma_mapping_error(&h->pdev->dev, temp64)) { 2173d9a729f3SWebb Scales /* prevent subsequent unmapping */ 2174d9a729f3SWebb Scales cp->sg->address = 0; 2175d9a729f3SWebb Scales return -1; 2176d9a729f3SWebb Scales } 2177d9a729f3SWebb Scales cp->sg->address = cpu_to_le64(temp64); 2178d9a729f3SWebb Scales return 0; 2179d9a729f3SWebb Scales } 2180d9a729f3SWebb Scales 2181d9a729f3SWebb Scales static void hpsa_unmap_ioaccel2_sg_chain_block(struct ctlr_info *h, 2182d9a729f3SWebb Scales struct io_accel2_cmd *cp) 2183d9a729f3SWebb Scales { 2184d9a729f3SWebb Scales struct ioaccel2_sg_element *chain_sg; 2185d9a729f3SWebb Scales u64 temp64; 2186d9a729f3SWebb Scales u32 chain_size; 2187d9a729f3SWebb Scales 2188d9a729f3SWebb Scales chain_sg = cp->sg; 2189d9a729f3SWebb Scales temp64 = le64_to_cpu(chain_sg->address); 2190a736e9b6SDon Brace chain_size = le32_to_cpu(cp->sg[0].length); 2191d9a729f3SWebb Scales pci_unmap_single(h->pdev, temp64, chain_size, PCI_DMA_TODEVICE); 2192d9a729f3SWebb Scales } 2193d9a729f3SWebb Scales 2194e2bea6dfSStephen M. Cameron static int hpsa_map_sg_chain_block(struct ctlr_info *h, 219533a2ffceSStephen M. Cameron struct CommandList *c) 219633a2ffceSStephen M. Cameron { 219733a2ffceSStephen M. Cameron struct SGDescriptor *chain_sg, *chain_block; 219833a2ffceSStephen M. Cameron u64 temp64; 219950a0decfSStephen M. Cameron u32 chain_len; 220033a2ffceSStephen M. Cameron 220133a2ffceSStephen M. Cameron chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 220233a2ffceSStephen M. Cameron chain_block = h->cmd_sg_list[c->cmdindex]; 220350a0decfSStephen M. Cameron chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN); 220450a0decfSStephen M. Cameron chain_len = sizeof(*chain_sg) * 22052b08b3e9SDon Brace (le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries); 220650a0decfSStephen M. Cameron chain_sg->Len = cpu_to_le32(chain_len); 220750a0decfSStephen M. Cameron temp64 = pci_map_single(h->pdev, chain_block, chain_len, 220833a2ffceSStephen M. Cameron PCI_DMA_TODEVICE); 2209e2bea6dfSStephen M. Cameron if (dma_mapping_error(&h->pdev->dev, temp64)) { 2210e2bea6dfSStephen M. Cameron /* prevent subsequent unmapping */ 221150a0decfSStephen M. Cameron chain_sg->Addr = cpu_to_le64(0); 2212e2bea6dfSStephen M. Cameron return -1; 2213e2bea6dfSStephen M. Cameron } 221450a0decfSStephen M. Cameron chain_sg->Addr = cpu_to_le64(temp64); 2215e2bea6dfSStephen M. Cameron return 0; 221633a2ffceSStephen M. Cameron } 221733a2ffceSStephen M. Cameron 221833a2ffceSStephen M. Cameron static void hpsa_unmap_sg_chain_block(struct ctlr_info *h, 221933a2ffceSStephen M. Cameron struct CommandList *c) 222033a2ffceSStephen M. Cameron { 222133a2ffceSStephen M. Cameron struct SGDescriptor *chain_sg; 222233a2ffceSStephen M. Cameron 222350a0decfSStephen M. Cameron if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries) 222433a2ffceSStephen M. Cameron return; 222533a2ffceSStephen M. Cameron 222633a2ffceSStephen M. Cameron chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 222750a0decfSStephen M. Cameron pci_unmap_single(h->pdev, le64_to_cpu(chain_sg->Addr), 222850a0decfSStephen M. Cameron le32_to_cpu(chain_sg->Len), PCI_DMA_TODEVICE); 222933a2ffceSStephen M. Cameron } 223033a2ffceSStephen M. Cameron 2231a09c1441SScott Teel 2232a09c1441SScott Teel /* Decode the various types of errors on ioaccel2 path. 2233a09c1441SScott Teel * Return 1 for any error that should generate a RAID path retry. 2234a09c1441SScott Teel * Return 0 for errors that don't require a RAID path retry. 2235a09c1441SScott Teel */ 2236a09c1441SScott Teel static int handle_ioaccel_mode2_error(struct ctlr_info *h, 2237c349775eSScott Teel struct CommandList *c, 2238c349775eSScott Teel struct scsi_cmnd *cmd, 2239ba74fdc4SDon Brace struct io_accel2_cmd *c2, 2240ba74fdc4SDon Brace struct hpsa_scsi_dev_t *dev) 2241c349775eSScott Teel { 2242c349775eSScott Teel int data_len; 2243a09c1441SScott Teel int retry = 0; 2244c40820d5SJoe Handzik u32 ioaccel2_resid = 0; 2245c349775eSScott Teel 2246c349775eSScott Teel switch (c2->error_data.serv_response) { 2247c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_COMPLETE: 2248c349775eSScott Teel switch (c2->error_data.status) { 2249c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_GOOD: 2250c349775eSScott Teel break; 2251c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND: 2252ee6b1889SStephen M. Cameron cmd->result |= SAM_STAT_CHECK_CONDITION; 2253c349775eSScott Teel if (c2->error_data.data_present != 2254ee6b1889SStephen M. Cameron IOACCEL2_SENSE_DATA_PRESENT) { 2255ee6b1889SStephen M. Cameron memset(cmd->sense_buffer, 0, 2256ee6b1889SStephen M. Cameron SCSI_SENSE_BUFFERSIZE); 2257c349775eSScott Teel break; 2258ee6b1889SStephen M. Cameron } 2259c349775eSScott Teel /* copy the sense data */ 2260c349775eSScott Teel data_len = c2->error_data.sense_data_len; 2261c349775eSScott Teel if (data_len > SCSI_SENSE_BUFFERSIZE) 2262c349775eSScott Teel data_len = SCSI_SENSE_BUFFERSIZE; 2263c349775eSScott Teel if (data_len > sizeof(c2->error_data.sense_data_buff)) 2264c349775eSScott Teel data_len = 2265c349775eSScott Teel sizeof(c2->error_data.sense_data_buff); 2266c349775eSScott Teel memcpy(cmd->sense_buffer, 2267c349775eSScott Teel c2->error_data.sense_data_buff, data_len); 2268a09c1441SScott Teel retry = 1; 2269c349775eSScott Teel break; 2270c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_BUSY: 2271a09c1441SScott Teel retry = 1; 2272c349775eSScott Teel break; 2273c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON: 2274a09c1441SScott Teel retry = 1; 2275c349775eSScott Teel break; 2276c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL: 22774a8da22bSStephen Cameron retry = 1; 2278c349775eSScott Teel break; 2279c349775eSScott Teel case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED: 2280a09c1441SScott Teel retry = 1; 2281c349775eSScott Teel break; 2282c349775eSScott Teel default: 2283a09c1441SScott Teel retry = 1; 2284c349775eSScott Teel break; 2285c349775eSScott Teel } 2286c349775eSScott Teel break; 2287c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_FAILURE: 2288c40820d5SJoe Handzik switch (c2->error_data.status) { 2289c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_IO_ERROR: 2290c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_IO_ABORTED: 2291c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_OVERRUN: 2292c40820d5SJoe Handzik retry = 1; 2293c40820d5SJoe Handzik break; 2294c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_UNDERRUN: 2295c40820d5SJoe Handzik cmd->result = (DID_OK << 16); /* host byte */ 2296c40820d5SJoe Handzik cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 2297c40820d5SJoe Handzik ioaccel2_resid = get_unaligned_le32( 2298c40820d5SJoe Handzik &c2->error_data.resid_cnt[0]); 2299c40820d5SJoe Handzik scsi_set_resid(cmd, ioaccel2_resid); 2300c40820d5SJoe Handzik break; 2301c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_NO_PATH_TO_DEVICE: 2302c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_INVALID_DEVICE: 2303c40820d5SJoe Handzik case IOACCEL2_STATUS_SR_IOACCEL_DISABLED: 2304ba74fdc4SDon Brace /* 2305ba74fdc4SDon Brace * Did an HBA disk disappear? We will eventually 2306ba74fdc4SDon Brace * get a state change event from the controller but 2307ba74fdc4SDon Brace * in the meantime, we need to tell the OS that the 2308ba74fdc4SDon Brace * HBA disk is no longer there and stop I/O 2309ba74fdc4SDon Brace * from going down. This allows the potential re-insert 2310ba74fdc4SDon Brace * of the disk to get the same device node. 2311ba74fdc4SDon Brace */ 2312ba74fdc4SDon Brace if (dev->physical_device && dev->expose_device) { 2313ba74fdc4SDon Brace cmd->result = DID_NO_CONNECT << 16; 2314ba74fdc4SDon Brace dev->removed = 1; 2315ba74fdc4SDon Brace h->drv_req_rescan = 1; 2316ba74fdc4SDon Brace dev_warn(&h->pdev->dev, 2317ba74fdc4SDon Brace "%s: device is gone!\n", __func__); 2318ba74fdc4SDon Brace } else 2319ba74fdc4SDon Brace /* 2320ba74fdc4SDon Brace * Retry by sending down the RAID path. 2321ba74fdc4SDon Brace * We will get an event from ctlr to 2322ba74fdc4SDon Brace * trigger rescan regardless. 2323ba74fdc4SDon Brace */ 2324c40820d5SJoe Handzik retry = 1; 2325c40820d5SJoe Handzik break; 2326c40820d5SJoe Handzik default: 2327c40820d5SJoe Handzik retry = 1; 2328c40820d5SJoe Handzik } 2329c349775eSScott Teel break; 2330c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE: 2331c349775eSScott Teel break; 2332c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS: 2333c349775eSScott Teel break; 2334c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_REJECTED: 2335a09c1441SScott Teel retry = 1; 2336c349775eSScott Teel break; 2337c349775eSScott Teel case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN: 2338c349775eSScott Teel break; 2339c349775eSScott Teel default: 2340a09c1441SScott Teel retry = 1; 2341c349775eSScott Teel break; 2342c349775eSScott Teel } 2343a09c1441SScott Teel 2344a09c1441SScott Teel return retry; /* retry on raid path? */ 2345c349775eSScott Teel } 2346c349775eSScott Teel 2347a58e7e53SWebb Scales static void hpsa_cmd_resolve_events(struct ctlr_info *h, 2348a58e7e53SWebb Scales struct CommandList *c) 2349a58e7e53SWebb Scales { 2350d604f533SWebb Scales bool do_wake = false; 2351d604f533SWebb Scales 2352a58e7e53SWebb Scales /* 2353a58e7e53SWebb Scales * Prevent the following race in the abort handler: 2354a58e7e53SWebb Scales * 2355a58e7e53SWebb Scales * 1. LLD is requested to abort a SCSI command 2356a58e7e53SWebb Scales * 2. The SCSI command completes 2357a58e7e53SWebb Scales * 3. The struct CommandList associated with step 2 is made available 2358a58e7e53SWebb Scales * 4. New I/O request to LLD to another LUN re-uses struct CommandList 2359a58e7e53SWebb Scales * 5. Abort handler follows scsi_cmnd->host_scribble and 2360a58e7e53SWebb Scales * finds struct CommandList and tries to aborts it 2361a58e7e53SWebb Scales * Now we have aborted the wrong command. 2362a58e7e53SWebb Scales * 2363d604f533SWebb Scales * Reset c->scsi_cmd here so that the abort or reset handler will know 2364d604f533SWebb Scales * this command has completed. Then, check to see if the handler is 2365a58e7e53SWebb Scales * waiting for this command, and, if so, wake it. 2366a58e7e53SWebb Scales */ 2367a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_IDLE; 2368d604f533SWebb Scales mb(); /* Declare command idle before checking for pending events. */ 2369a58e7e53SWebb Scales if (c->abort_pending) { 2370d604f533SWebb Scales do_wake = true; 2371a58e7e53SWebb Scales c->abort_pending = false; 2372a58e7e53SWebb Scales } 2373d604f533SWebb Scales if (c->reset_pending) { 2374d604f533SWebb Scales unsigned long flags; 2375d604f533SWebb Scales struct hpsa_scsi_dev_t *dev; 2376d604f533SWebb Scales 2377d604f533SWebb Scales /* 2378d604f533SWebb Scales * There appears to be a reset pending; lock the lock and 2379d604f533SWebb Scales * reconfirm. If so, then decrement the count of outstanding 2380d604f533SWebb Scales * commands and wake the reset command if this is the last one. 2381d604f533SWebb Scales */ 2382d604f533SWebb Scales spin_lock_irqsave(&h->lock, flags); 2383d604f533SWebb Scales dev = c->reset_pending; /* Re-fetch under the lock. */ 2384d604f533SWebb Scales if (dev && atomic_dec_and_test(&dev->reset_cmds_out)) 2385d604f533SWebb Scales do_wake = true; 2386d604f533SWebb Scales c->reset_pending = NULL; 2387d604f533SWebb Scales spin_unlock_irqrestore(&h->lock, flags); 2388d604f533SWebb Scales } 2389d604f533SWebb Scales 2390d604f533SWebb Scales if (do_wake) 2391d604f533SWebb Scales wake_up_all(&h->event_sync_wait_queue); 2392a58e7e53SWebb Scales } 2393a58e7e53SWebb Scales 239473153fe5SWebb Scales static void hpsa_cmd_resolve_and_free(struct ctlr_info *h, 239573153fe5SWebb Scales struct CommandList *c) 239673153fe5SWebb Scales { 239773153fe5SWebb Scales hpsa_cmd_resolve_events(h, c); 239873153fe5SWebb Scales cmd_tagged_free(h, c); 239973153fe5SWebb Scales } 240073153fe5SWebb Scales 24018a0ff92cSWebb Scales static void hpsa_cmd_free_and_done(struct ctlr_info *h, 24028a0ff92cSWebb Scales struct CommandList *c, struct scsi_cmnd *cmd) 24038a0ff92cSWebb Scales { 240473153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 2405d49c2077SDon Brace if (cmd && cmd->scsi_done) 24068a0ff92cSWebb Scales cmd->scsi_done(cmd); 24078a0ff92cSWebb Scales } 24088a0ff92cSWebb Scales 24098a0ff92cSWebb Scales static void hpsa_retry_cmd(struct ctlr_info *h, struct CommandList *c) 24108a0ff92cSWebb Scales { 24118a0ff92cSWebb Scales INIT_WORK(&c->work, hpsa_command_resubmit_worker); 24128a0ff92cSWebb Scales queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work); 24138a0ff92cSWebb Scales } 24148a0ff92cSWebb Scales 2415a58e7e53SWebb Scales static void hpsa_set_scsi_cmd_aborted(struct scsi_cmnd *cmd) 2416a58e7e53SWebb Scales { 2417a58e7e53SWebb Scales cmd->result = DID_ABORT << 16; 2418a58e7e53SWebb Scales } 2419a58e7e53SWebb Scales 2420a58e7e53SWebb Scales static void hpsa_cmd_abort_and_free(struct ctlr_info *h, struct CommandList *c, 2421a58e7e53SWebb Scales struct scsi_cmnd *cmd) 2422a58e7e53SWebb Scales { 2423a58e7e53SWebb Scales hpsa_set_scsi_cmd_aborted(cmd); 2424a58e7e53SWebb Scales dev_warn(&h->pdev->dev, "CDB %16phN was aborted with status 0x%x\n", 2425a58e7e53SWebb Scales c->Request.CDB, c->err_info->ScsiStatus); 242673153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 2427a58e7e53SWebb Scales } 2428a58e7e53SWebb Scales 2429c349775eSScott Teel static void process_ioaccel2_completion(struct ctlr_info *h, 2430c349775eSScott Teel struct CommandList *c, struct scsi_cmnd *cmd, 2431c349775eSScott Teel struct hpsa_scsi_dev_t *dev) 2432c349775eSScott Teel { 2433c349775eSScott Teel struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 2434c349775eSScott Teel 2435c349775eSScott Teel /* check for good status */ 2436c349775eSScott Teel if (likely(c2->error_data.serv_response == 0 && 24378a0ff92cSWebb Scales c2->error_data.status == 0)) 24388a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, c, cmd); 2439c349775eSScott Teel 24408a0ff92cSWebb Scales /* 24418a0ff92cSWebb Scales * Any RAID offload error results in retry which will use 2442c349775eSScott Teel * the normal I/O path so the controller can handle whatever's 2443c349775eSScott Teel * wrong. 2444c349775eSScott Teel */ 2445f3f01730SKevin Barnett if (is_logical_device(dev) && 2446c349775eSScott Teel c2->error_data.serv_response == 2447c349775eSScott Teel IOACCEL2_SERV_RESPONSE_FAILURE) { 2448080ef1ccSDon Brace if (c2->error_data.status == 2449064d1b1dSDon Brace IOACCEL2_STATUS_SR_IOACCEL_DISABLED) { 2450c349775eSScott Teel dev->offload_enabled = 0; 2451064d1b1dSDon Brace dev->offload_to_be_enabled = 0; 2452064d1b1dSDon Brace } 24538a0ff92cSWebb Scales 24548a0ff92cSWebb Scales return hpsa_retry_cmd(h, c); 2455080ef1ccSDon Brace } 2456080ef1ccSDon Brace 2457ba74fdc4SDon Brace if (handle_ioaccel_mode2_error(h, c, cmd, c2, dev)) 24588a0ff92cSWebb Scales return hpsa_retry_cmd(h, c); 2459080ef1ccSDon Brace 24608a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, c, cmd); 2461c349775eSScott Teel } 2462c349775eSScott Teel 24639437ac43SStephen Cameron /* Returns 0 on success, < 0 otherwise. */ 24649437ac43SStephen Cameron static int hpsa_evaluate_tmf_status(struct ctlr_info *h, 24659437ac43SStephen Cameron struct CommandList *cp) 24669437ac43SStephen Cameron { 24679437ac43SStephen Cameron u8 tmf_status = cp->err_info->ScsiStatus; 24689437ac43SStephen Cameron 24699437ac43SStephen Cameron switch (tmf_status) { 24709437ac43SStephen Cameron case CISS_TMF_COMPLETE: 24719437ac43SStephen Cameron /* 24729437ac43SStephen Cameron * CISS_TMF_COMPLETE never happens, instead, 24739437ac43SStephen Cameron * ei->CommandStatus == 0 for this case. 24749437ac43SStephen Cameron */ 24759437ac43SStephen Cameron case CISS_TMF_SUCCESS: 24769437ac43SStephen Cameron return 0; 24779437ac43SStephen Cameron case CISS_TMF_INVALID_FRAME: 24789437ac43SStephen Cameron case CISS_TMF_NOT_SUPPORTED: 24799437ac43SStephen Cameron case CISS_TMF_FAILED: 24809437ac43SStephen Cameron case CISS_TMF_WRONG_LUN: 24819437ac43SStephen Cameron case CISS_TMF_OVERLAPPED_TAG: 24829437ac43SStephen Cameron break; 24839437ac43SStephen Cameron default: 24849437ac43SStephen Cameron dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n", 24859437ac43SStephen Cameron tmf_status); 24869437ac43SStephen Cameron break; 24879437ac43SStephen Cameron } 24889437ac43SStephen Cameron return -tmf_status; 24899437ac43SStephen Cameron } 24909437ac43SStephen Cameron 24911fb011fbSStephen M. Cameron static void complete_scsi_command(struct CommandList *cp) 2492edd16368SStephen M. Cameron { 2493edd16368SStephen M. Cameron struct scsi_cmnd *cmd; 2494edd16368SStephen M. Cameron struct ctlr_info *h; 2495edd16368SStephen M. Cameron struct ErrorInfo *ei; 2496283b4a9bSStephen M. Cameron struct hpsa_scsi_dev_t *dev; 2497d9a729f3SWebb Scales struct io_accel2_cmd *c2; 2498edd16368SStephen M. Cameron 24999437ac43SStephen Cameron u8 sense_key; 25009437ac43SStephen Cameron u8 asc; /* additional sense code */ 25019437ac43SStephen Cameron u8 ascq; /* additional sense code qualifier */ 2502db111e18SStephen M. Cameron unsigned long sense_data_size; 2503edd16368SStephen M. Cameron 2504edd16368SStephen M. Cameron ei = cp->err_info; 25057fa3030cSStephen Cameron cmd = cp->scsi_cmd; 2506edd16368SStephen M. Cameron h = cp->h; 2507d49c2077SDon Brace 2508d49c2077SDon Brace if (!cmd->device) { 2509d49c2077SDon Brace cmd->result = DID_NO_CONNECT << 16; 2510d49c2077SDon Brace return hpsa_cmd_free_and_done(h, cp, cmd); 2511d49c2077SDon Brace } 2512d49c2077SDon Brace 2513283b4a9bSStephen M. Cameron dev = cmd->device->hostdata; 251445e596cdSDon Brace if (!dev) { 251545e596cdSDon Brace cmd->result = DID_NO_CONNECT << 16; 251645e596cdSDon Brace return hpsa_cmd_free_and_done(h, cp, cmd); 251745e596cdSDon Brace } 2518d9a729f3SWebb Scales c2 = &h->ioaccel2_cmd_pool[cp->cmdindex]; 2519edd16368SStephen M. Cameron 2520edd16368SStephen M. Cameron scsi_dma_unmap(cmd); /* undo the DMA mappings */ 2521e1f7de0cSMatt Gates if ((cp->cmd_type == CMD_SCSI) && 25222b08b3e9SDon Brace (le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries)) 252333a2ffceSStephen M. Cameron hpsa_unmap_sg_chain_block(h, cp); 2524edd16368SStephen M. Cameron 2525d9a729f3SWebb Scales if ((cp->cmd_type == CMD_IOACCEL2) && 2526d9a729f3SWebb Scales (c2->sg[0].chain_indicator == IOACCEL2_CHAIN)) 2527d9a729f3SWebb Scales hpsa_unmap_ioaccel2_sg_chain_block(h, c2); 2528d9a729f3SWebb Scales 2529edd16368SStephen M. Cameron cmd->result = (DID_OK << 16); /* host byte */ 2530edd16368SStephen M. Cameron cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 2531c349775eSScott Teel 2532d49c2077SDon Brace if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1) { 2533d49c2077SDon Brace if (dev->physical_device && dev->expose_device && 2534d49c2077SDon Brace dev->removed) { 2535d49c2077SDon Brace cmd->result = DID_NO_CONNECT << 16; 2536d49c2077SDon Brace return hpsa_cmd_free_and_done(h, cp, cmd); 2537d49c2077SDon Brace } 2538d49c2077SDon Brace if (likely(cp->phys_disk != NULL)) 253903383736SDon Brace atomic_dec(&cp->phys_disk->ioaccel_cmds_out); 2540d49c2077SDon Brace } 254103383736SDon Brace 254225163bd5SWebb Scales /* 254325163bd5SWebb Scales * We check for lockup status here as it may be set for 254425163bd5SWebb Scales * CMD_SCSI, CMD_IOACCEL1 and CMD_IOACCEL2 commands by 254525163bd5SWebb Scales * fail_all_oustanding_cmds() 254625163bd5SWebb Scales */ 254725163bd5SWebb Scales if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) { 254825163bd5SWebb Scales /* DID_NO_CONNECT will prevent a retry */ 254925163bd5SWebb Scales cmd->result = DID_NO_CONNECT << 16; 25508a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, cp, cmd); 255125163bd5SWebb Scales } 255225163bd5SWebb Scales 2553d604f533SWebb Scales if ((unlikely(hpsa_is_pending_event(cp)))) { 2554d604f533SWebb Scales if (cp->reset_pending) 2555bfd7546cSDon Brace return hpsa_cmd_free_and_done(h, cp, cmd); 2556d604f533SWebb Scales if (cp->abort_pending) 2557d604f533SWebb Scales return hpsa_cmd_abort_and_free(h, cp, cmd); 2558d604f533SWebb Scales } 2559d604f533SWebb Scales 2560c349775eSScott Teel if (cp->cmd_type == CMD_IOACCEL2) 2561c349775eSScott Teel return process_ioaccel2_completion(h, cp, cmd, dev); 2562c349775eSScott Teel 25636aa4c361SRobert Elliott scsi_set_resid(cmd, ei->ResidualCnt); 25648a0ff92cSWebb Scales if (ei->CommandStatus == 0) 25658a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, cp, cmd); 25666aa4c361SRobert Elliott 2567e1f7de0cSMatt Gates /* For I/O accelerator commands, copy over some fields to the normal 2568e1f7de0cSMatt Gates * CISS header used below for error handling. 2569e1f7de0cSMatt Gates */ 2570e1f7de0cSMatt Gates if (cp->cmd_type == CMD_IOACCEL1) { 2571e1f7de0cSMatt Gates struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex]; 25722b08b3e9SDon Brace cp->Header.SGList = scsi_sg_count(cmd); 25732b08b3e9SDon Brace cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList); 25742b08b3e9SDon Brace cp->Request.CDBLen = le16_to_cpu(c->io_flags) & 25752b08b3e9SDon Brace IOACCEL1_IOFLAGS_CDBLEN_MASK; 257650a0decfSStephen M. Cameron cp->Header.tag = c->tag; 2577e1f7de0cSMatt Gates memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8); 2578e1f7de0cSMatt Gates memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen); 2579283b4a9bSStephen M. Cameron 2580283b4a9bSStephen M. Cameron /* Any RAID offload error results in retry which will use 2581283b4a9bSStephen M. Cameron * the normal I/O path so the controller can handle whatever's 2582283b4a9bSStephen M. Cameron * wrong. 2583283b4a9bSStephen M. Cameron */ 2584f3f01730SKevin Barnett if (is_logical_device(dev)) { 2585283b4a9bSStephen M. Cameron if (ei->CommandStatus == CMD_IOACCEL_DISABLED) 2586283b4a9bSStephen M. Cameron dev->offload_enabled = 0; 25878a0ff92cSWebb Scales return hpsa_retry_cmd(h, cp); 2588283b4a9bSStephen M. Cameron } 2589e1f7de0cSMatt Gates } 2590e1f7de0cSMatt Gates 2591edd16368SStephen M. Cameron /* an error has occurred */ 2592edd16368SStephen M. Cameron switch (ei->CommandStatus) { 2593edd16368SStephen M. Cameron 2594edd16368SStephen M. Cameron case CMD_TARGET_STATUS: 25959437ac43SStephen Cameron cmd->result |= ei->ScsiStatus; 25969437ac43SStephen Cameron /* copy the sense data */ 25979437ac43SStephen Cameron if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo)) 25989437ac43SStephen Cameron sense_data_size = SCSI_SENSE_BUFFERSIZE; 25999437ac43SStephen Cameron else 26009437ac43SStephen Cameron sense_data_size = sizeof(ei->SenseInfo); 26019437ac43SStephen Cameron if (ei->SenseLen < sense_data_size) 26029437ac43SStephen Cameron sense_data_size = ei->SenseLen; 26039437ac43SStephen Cameron memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size); 26049437ac43SStephen Cameron if (ei->ScsiStatus) 26059437ac43SStephen Cameron decode_sense_data(ei->SenseInfo, sense_data_size, 26069437ac43SStephen Cameron &sense_key, &asc, &ascq); 2607edd16368SStephen M. Cameron if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) { 26081d3b3609SMatt Gates if (sense_key == ABORTED_COMMAND) { 26092e311fbaSStephen M. Cameron cmd->result |= DID_SOFT_ERROR << 16; 26101d3b3609SMatt Gates break; 26111d3b3609SMatt Gates } 2612edd16368SStephen M. Cameron break; 2613edd16368SStephen M. Cameron } 2614edd16368SStephen M. Cameron /* Problem was not a check condition 2615edd16368SStephen M. Cameron * Pass it up to the upper layers... 2616edd16368SStephen M. Cameron */ 2617edd16368SStephen M. Cameron if (ei->ScsiStatus) { 2618edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "cp %p has status 0x%x " 2619edd16368SStephen M. Cameron "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, " 2620edd16368SStephen M. Cameron "Returning result: 0x%x\n", 2621edd16368SStephen M. Cameron cp, ei->ScsiStatus, 2622edd16368SStephen M. Cameron sense_key, asc, ascq, 2623edd16368SStephen M. Cameron cmd->result); 2624edd16368SStephen M. Cameron } else { /* scsi status is zero??? How??? */ 2625edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. " 2626edd16368SStephen M. Cameron "Returning no connection.\n", cp), 2627edd16368SStephen M. Cameron 2628edd16368SStephen M. Cameron /* Ordinarily, this case should never happen, 2629edd16368SStephen M. Cameron * but there is a bug in some released firmware 2630edd16368SStephen M. Cameron * revisions that allows it to happen if, for 2631edd16368SStephen M. Cameron * example, a 4100 backplane loses power and 2632edd16368SStephen M. Cameron * the tape drive is in it. We assume that 2633edd16368SStephen M. Cameron * it's a fatal error of some kind because we 2634edd16368SStephen M. Cameron * can't show that it wasn't. We will make it 2635edd16368SStephen M. Cameron * look like selection timeout since that is 2636edd16368SStephen M. Cameron * the most common reason for this to occur, 2637edd16368SStephen M. Cameron * and it's severe enough. 2638edd16368SStephen M. Cameron */ 2639edd16368SStephen M. Cameron 2640edd16368SStephen M. Cameron cmd->result = DID_NO_CONNECT << 16; 2641edd16368SStephen M. Cameron } 2642edd16368SStephen M. Cameron break; 2643edd16368SStephen M. Cameron 2644edd16368SStephen M. Cameron case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 2645edd16368SStephen M. Cameron break; 2646edd16368SStephen M. Cameron case CMD_DATA_OVERRUN: 2647f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, 2648f42e81e1SStephen Cameron "CDB %16phN data overrun\n", cp->Request.CDB); 2649edd16368SStephen M. Cameron break; 2650edd16368SStephen M. Cameron case CMD_INVALID: { 2651edd16368SStephen M. Cameron /* print_bytes(cp, sizeof(*cp), 1, 0); 2652edd16368SStephen M. Cameron print_cmd(cp); */ 2653edd16368SStephen M. Cameron /* We get CMD_INVALID if you address a non-existent device 2654edd16368SStephen M. Cameron * instead of a selection timeout (no response). You will 2655edd16368SStephen M. Cameron * see this if you yank out a drive, then try to access it. 2656edd16368SStephen M. Cameron * This is kind of a shame because it means that any other 2657edd16368SStephen M. Cameron * CMD_INVALID (e.g. driver bug) will get interpreted as a 2658edd16368SStephen M. Cameron * missing target. */ 2659edd16368SStephen M. Cameron cmd->result = DID_NO_CONNECT << 16; 2660edd16368SStephen M. Cameron } 2661edd16368SStephen M. Cameron break; 2662edd16368SStephen M. Cameron case CMD_PROTOCOL_ERR: 2663256d0eaaSStephen M. Cameron cmd->result = DID_ERROR << 16; 2664f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n", 2665f42e81e1SStephen Cameron cp->Request.CDB); 2666edd16368SStephen M. Cameron break; 2667edd16368SStephen M. Cameron case CMD_HARDWARE_ERR: 2668edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2669f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n", 2670f42e81e1SStephen Cameron cp->Request.CDB); 2671edd16368SStephen M. Cameron break; 2672edd16368SStephen M. Cameron case CMD_CONNECTION_LOST: 2673edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2674f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n", 2675f42e81e1SStephen Cameron cp->Request.CDB); 2676edd16368SStephen M. Cameron break; 2677edd16368SStephen M. Cameron case CMD_ABORTED: 2678a58e7e53SWebb Scales /* Return now to avoid calling scsi_done(). */ 2679a58e7e53SWebb Scales return hpsa_cmd_abort_and_free(h, cp, cmd); 2680edd16368SStephen M. Cameron case CMD_ABORT_FAILED: 2681edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2682f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n", 2683f42e81e1SStephen Cameron cp->Request.CDB); 2684edd16368SStephen M. Cameron break; 2685edd16368SStephen M. Cameron case CMD_UNSOLICITED_ABORT: 2686f6e76055SStephen M. Cameron cmd->result = DID_SOFT_ERROR << 16; /* retry the command */ 2687f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n", 2688f42e81e1SStephen Cameron cp->Request.CDB); 2689edd16368SStephen M. Cameron break; 2690edd16368SStephen M. Cameron case CMD_TIMEOUT: 2691edd16368SStephen M. Cameron cmd->result = DID_TIME_OUT << 16; 2692f42e81e1SStephen Cameron dev_warn(&h->pdev->dev, "CDB %16phN timed out\n", 2693f42e81e1SStephen Cameron cp->Request.CDB); 2694edd16368SStephen M. Cameron break; 26951d5e2ed0SStephen M. Cameron case CMD_UNABORTABLE: 26961d5e2ed0SStephen M. Cameron cmd->result = DID_ERROR << 16; 26971d5e2ed0SStephen M. Cameron dev_warn(&h->pdev->dev, "Command unabortable\n"); 26981d5e2ed0SStephen M. Cameron break; 26999437ac43SStephen Cameron case CMD_TMF_STATUS: 27009437ac43SStephen Cameron if (hpsa_evaluate_tmf_status(h, cp)) /* TMF failed? */ 27019437ac43SStephen Cameron cmd->result = DID_ERROR << 16; 27029437ac43SStephen Cameron break; 2703283b4a9bSStephen M. Cameron case CMD_IOACCEL_DISABLED: 2704283b4a9bSStephen M. Cameron /* This only handles the direct pass-through case since RAID 2705283b4a9bSStephen M. Cameron * offload is handled above. Just attempt a retry. 2706283b4a9bSStephen M. Cameron */ 2707283b4a9bSStephen M. Cameron cmd->result = DID_SOFT_ERROR << 16; 2708283b4a9bSStephen M. Cameron dev_warn(&h->pdev->dev, 2709283b4a9bSStephen M. Cameron "cp %p had HP SSD Smart Path error\n", cp); 2710283b4a9bSStephen M. Cameron break; 2711edd16368SStephen M. Cameron default: 2712edd16368SStephen M. Cameron cmd->result = DID_ERROR << 16; 2713edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n", 2714edd16368SStephen M. Cameron cp, ei->CommandStatus); 2715edd16368SStephen M. Cameron } 27168a0ff92cSWebb Scales 27178a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, cp, cmd); 2718edd16368SStephen M. Cameron } 2719edd16368SStephen M. Cameron 2720edd16368SStephen M. Cameron static void hpsa_pci_unmap(struct pci_dev *pdev, 2721edd16368SStephen M. Cameron struct CommandList *c, int sg_used, int data_direction) 2722edd16368SStephen M. Cameron { 2723edd16368SStephen M. Cameron int i; 2724edd16368SStephen M. Cameron 272550a0decfSStephen M. Cameron for (i = 0; i < sg_used; i++) 272650a0decfSStephen M. Cameron pci_unmap_single(pdev, (dma_addr_t) le64_to_cpu(c->SG[i].Addr), 272750a0decfSStephen M. Cameron le32_to_cpu(c->SG[i].Len), 2728edd16368SStephen M. Cameron data_direction); 2729edd16368SStephen M. Cameron } 2730edd16368SStephen M. Cameron 2731a2dac136SStephen M. Cameron static int hpsa_map_one(struct pci_dev *pdev, 2732edd16368SStephen M. Cameron struct CommandList *cp, 2733edd16368SStephen M. Cameron unsigned char *buf, 2734edd16368SStephen M. Cameron size_t buflen, 2735edd16368SStephen M. Cameron int data_direction) 2736edd16368SStephen M. Cameron { 273701a02ffcSStephen M. Cameron u64 addr64; 2738edd16368SStephen M. Cameron 2739edd16368SStephen M. Cameron if (buflen == 0 || data_direction == PCI_DMA_NONE) { 2740edd16368SStephen M. Cameron cp->Header.SGList = 0; 274150a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(0); 2742a2dac136SStephen M. Cameron return 0; 2743edd16368SStephen M. Cameron } 2744edd16368SStephen M. Cameron 274550a0decfSStephen M. Cameron addr64 = pci_map_single(pdev, buf, buflen, data_direction); 2746eceaae18SShuah Khan if (dma_mapping_error(&pdev->dev, addr64)) { 2747a2dac136SStephen M. Cameron /* Prevent subsequent unmap of something never mapped */ 2748eceaae18SShuah Khan cp->Header.SGList = 0; 274950a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(0); 2750a2dac136SStephen M. Cameron return -1; 2751eceaae18SShuah Khan } 275250a0decfSStephen M. Cameron cp->SG[0].Addr = cpu_to_le64(addr64); 275350a0decfSStephen M. Cameron cp->SG[0].Len = cpu_to_le32(buflen); 275450a0decfSStephen M. Cameron cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */ 275550a0decfSStephen M. Cameron cp->Header.SGList = 1; /* no. SGs contig in this cmd */ 275650a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */ 2757a2dac136SStephen M. Cameron return 0; 2758edd16368SStephen M. Cameron } 2759edd16368SStephen M. Cameron 276025163bd5SWebb Scales #define NO_TIMEOUT ((unsigned long) -1) 276125163bd5SWebb Scales #define DEFAULT_TIMEOUT 30000 /* milliseconds */ 276225163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h, 276325163bd5SWebb Scales struct CommandList *c, int reply_queue, unsigned long timeout_msecs) 2764edd16368SStephen M. Cameron { 2765edd16368SStephen M. Cameron DECLARE_COMPLETION_ONSTACK(wait); 2766edd16368SStephen M. Cameron 2767edd16368SStephen M. Cameron c->waiting = &wait; 276825163bd5SWebb Scales __enqueue_cmd_and_start_io(h, c, reply_queue); 276925163bd5SWebb Scales if (timeout_msecs == NO_TIMEOUT) { 277025163bd5SWebb Scales /* TODO: get rid of this no-timeout thing */ 277125163bd5SWebb Scales wait_for_completion_io(&wait); 277225163bd5SWebb Scales return IO_OK; 277325163bd5SWebb Scales } 277425163bd5SWebb Scales if (!wait_for_completion_io_timeout(&wait, 277525163bd5SWebb Scales msecs_to_jiffies(timeout_msecs))) { 277625163bd5SWebb Scales dev_warn(&h->pdev->dev, "Command timed out.\n"); 277725163bd5SWebb Scales return -ETIMEDOUT; 277825163bd5SWebb Scales } 277925163bd5SWebb Scales return IO_OK; 278025163bd5SWebb Scales } 278125163bd5SWebb Scales 278225163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c, 278325163bd5SWebb Scales int reply_queue, unsigned long timeout_msecs) 278425163bd5SWebb Scales { 278525163bd5SWebb Scales if (unlikely(lockup_detected(h))) { 278625163bd5SWebb Scales c->err_info->CommandStatus = CMD_CTLR_LOCKUP; 278725163bd5SWebb Scales return IO_OK; 278825163bd5SWebb Scales } 278925163bd5SWebb Scales return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs); 2790edd16368SStephen M. Cameron } 2791edd16368SStephen M. Cameron 2792094963daSStephen M. Cameron static u32 lockup_detected(struct ctlr_info *h) 2793094963daSStephen M. Cameron { 2794094963daSStephen M. Cameron int cpu; 2795094963daSStephen M. Cameron u32 rc, *lockup_detected; 2796094963daSStephen M. Cameron 2797094963daSStephen M. Cameron cpu = get_cpu(); 2798094963daSStephen M. Cameron lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 2799094963daSStephen M. Cameron rc = *lockup_detected; 2800094963daSStephen M. Cameron put_cpu(); 2801094963daSStephen M. Cameron return rc; 2802094963daSStephen M. Cameron } 2803094963daSStephen M. Cameron 28049c2fc160SStephen M. Cameron #define MAX_DRIVER_CMD_RETRIES 25 280525163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h, 280625163bd5SWebb Scales struct CommandList *c, int data_direction, unsigned long timeout_msecs) 2807edd16368SStephen M. Cameron { 28089c2fc160SStephen M. Cameron int backoff_time = 10, retry_count = 0; 280925163bd5SWebb Scales int rc; 2810edd16368SStephen M. Cameron 2811edd16368SStephen M. Cameron do { 28127630abd0SJoe Perches memset(c->err_info, 0, sizeof(*c->err_info)); 281325163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 281425163bd5SWebb Scales timeout_msecs); 281525163bd5SWebb Scales if (rc) 281625163bd5SWebb Scales break; 2817edd16368SStephen M. Cameron retry_count++; 28189c2fc160SStephen M. Cameron if (retry_count > 3) { 28199c2fc160SStephen M. Cameron msleep(backoff_time); 28209c2fc160SStephen M. Cameron if (backoff_time < 1000) 28219c2fc160SStephen M. Cameron backoff_time *= 2; 28229c2fc160SStephen M. Cameron } 2823852af20aSMatt Bondurant } while ((check_for_unit_attention(h, c) || 28249c2fc160SStephen M. Cameron check_for_busy(h, c)) && 28259c2fc160SStephen M. Cameron retry_count <= MAX_DRIVER_CMD_RETRIES); 2826edd16368SStephen M. Cameron hpsa_pci_unmap(h->pdev, c, 1, data_direction); 282725163bd5SWebb Scales if (retry_count > MAX_DRIVER_CMD_RETRIES) 282825163bd5SWebb Scales rc = -EIO; 282925163bd5SWebb Scales return rc; 2830edd16368SStephen M. Cameron } 2831edd16368SStephen M. Cameron 2832d1e8beacSStephen M. Cameron static void hpsa_print_cmd(struct ctlr_info *h, char *txt, 2833d1e8beacSStephen M. Cameron struct CommandList *c) 2834edd16368SStephen M. Cameron { 2835d1e8beacSStephen M. Cameron const u8 *cdb = c->Request.CDB; 2836d1e8beacSStephen M. Cameron const u8 *lun = c->Header.LUN.LunAddrBytes; 2837edd16368SStephen M. Cameron 2838609a70dfSRasmus Villemoes dev_warn(&h->pdev->dev, "%s: LUN:%8phN CDB:%16phN\n", 2839609a70dfSRasmus Villemoes txt, lun, cdb); 2840d1e8beacSStephen M. Cameron } 2841d1e8beacSStephen M. Cameron 2842d1e8beacSStephen M. Cameron static void hpsa_scsi_interpret_error(struct ctlr_info *h, 2843d1e8beacSStephen M. Cameron struct CommandList *cp) 2844d1e8beacSStephen M. Cameron { 2845d1e8beacSStephen M. Cameron const struct ErrorInfo *ei = cp->err_info; 2846d1e8beacSStephen M. Cameron struct device *d = &cp->h->pdev->dev; 28479437ac43SStephen Cameron u8 sense_key, asc, ascq; 28489437ac43SStephen Cameron int sense_len; 2849d1e8beacSStephen M. Cameron 2850edd16368SStephen M. Cameron switch (ei->CommandStatus) { 2851edd16368SStephen M. Cameron case CMD_TARGET_STATUS: 28529437ac43SStephen Cameron if (ei->SenseLen > sizeof(ei->SenseInfo)) 28539437ac43SStephen Cameron sense_len = sizeof(ei->SenseInfo); 28549437ac43SStephen Cameron else 28559437ac43SStephen Cameron sense_len = ei->SenseLen; 28569437ac43SStephen Cameron decode_sense_data(ei->SenseInfo, sense_len, 28579437ac43SStephen Cameron &sense_key, &asc, &ascq); 2858d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "SCSI status", cp); 2859d1e8beacSStephen M. Cameron if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) 28609437ac43SStephen Cameron dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n", 28619437ac43SStephen Cameron sense_key, asc, ascq); 2862d1e8beacSStephen M. Cameron else 28639437ac43SStephen Cameron dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus); 2864edd16368SStephen M. Cameron if (ei->ScsiStatus == 0) 2865edd16368SStephen M. Cameron dev_warn(d, "SCSI status is abnormally zero. " 2866edd16368SStephen M. Cameron "(probably indicates selection timeout " 2867edd16368SStephen M. Cameron "reported incorrectly due to a known " 2868edd16368SStephen M. Cameron "firmware bug, circa July, 2001.)\n"); 2869edd16368SStephen M. Cameron break; 2870edd16368SStephen M. Cameron case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 2871edd16368SStephen M. Cameron break; 2872edd16368SStephen M. Cameron case CMD_DATA_OVERRUN: 2873d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "overrun condition", cp); 2874edd16368SStephen M. Cameron break; 2875edd16368SStephen M. Cameron case CMD_INVALID: { 2876edd16368SStephen M. Cameron /* controller unfortunately reports SCSI passthru's 2877edd16368SStephen M. Cameron * to non-existent targets as invalid commands. 2878edd16368SStephen M. Cameron */ 2879d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "invalid command", cp); 2880d1e8beacSStephen M. Cameron dev_warn(d, "probably means device no longer present\n"); 2881edd16368SStephen M. Cameron } 2882edd16368SStephen M. Cameron break; 2883edd16368SStephen M. Cameron case CMD_PROTOCOL_ERR: 2884d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "protocol error", cp); 2885edd16368SStephen M. Cameron break; 2886edd16368SStephen M. Cameron case CMD_HARDWARE_ERR: 2887d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "hardware error", cp); 2888edd16368SStephen M. Cameron break; 2889edd16368SStephen M. Cameron case CMD_CONNECTION_LOST: 2890d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "connection lost", cp); 2891edd16368SStephen M. Cameron break; 2892edd16368SStephen M. Cameron case CMD_ABORTED: 2893d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "aborted", cp); 2894edd16368SStephen M. Cameron break; 2895edd16368SStephen M. Cameron case CMD_ABORT_FAILED: 2896d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "abort failed", cp); 2897edd16368SStephen M. Cameron break; 2898edd16368SStephen M. Cameron case CMD_UNSOLICITED_ABORT: 2899d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "unsolicited abort", cp); 2900edd16368SStephen M. Cameron break; 2901edd16368SStephen M. Cameron case CMD_TIMEOUT: 2902d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "timed out", cp); 2903edd16368SStephen M. Cameron break; 29041d5e2ed0SStephen M. Cameron case CMD_UNABORTABLE: 2905d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "unabortable", cp); 29061d5e2ed0SStephen M. Cameron break; 290725163bd5SWebb Scales case CMD_CTLR_LOCKUP: 290825163bd5SWebb Scales hpsa_print_cmd(h, "controller lockup detected", cp); 290925163bd5SWebb Scales break; 2910edd16368SStephen M. Cameron default: 2911d1e8beacSStephen M. Cameron hpsa_print_cmd(h, "unknown status", cp); 2912d1e8beacSStephen M. Cameron dev_warn(d, "Unknown command status %x\n", 2913edd16368SStephen M. Cameron ei->CommandStatus); 2914edd16368SStephen M. Cameron } 2915edd16368SStephen M. Cameron } 2916edd16368SStephen M. Cameron 2917edd16368SStephen M. Cameron static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr, 2918b7bb24ebSStephen M. Cameron u16 page, unsigned char *buf, 2919edd16368SStephen M. Cameron unsigned char bufsize) 2920edd16368SStephen M. Cameron { 2921edd16368SStephen M. Cameron int rc = IO_OK; 2922edd16368SStephen M. Cameron struct CommandList *c; 2923edd16368SStephen M. Cameron struct ErrorInfo *ei; 2924edd16368SStephen M. Cameron 292545fcb86eSStephen Cameron c = cmd_alloc(h); 2926edd16368SStephen M. Cameron 2927a2dac136SStephen M. Cameron if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, 2928a2dac136SStephen M. Cameron page, scsi3addr, TYPE_CMD)) { 2929a2dac136SStephen M. Cameron rc = -1; 2930a2dac136SStephen M. Cameron goto out; 2931a2dac136SStephen M. Cameron } 293225163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 2933c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 293425163bd5SWebb Scales if (rc) 293525163bd5SWebb Scales goto out; 2936edd16368SStephen M. Cameron ei = c->err_info; 2937edd16368SStephen M. Cameron if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 2938d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 2939edd16368SStephen M. Cameron rc = -1; 2940edd16368SStephen M. Cameron } 2941a2dac136SStephen M. Cameron out: 294245fcb86eSStephen Cameron cmd_free(h, c); 2943edd16368SStephen M. Cameron return rc; 2944edd16368SStephen M. Cameron } 2945edd16368SStephen M. Cameron 2946bf711ac6SScott Teel static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr, 294725163bd5SWebb Scales u8 reset_type, int reply_queue) 2948edd16368SStephen M. Cameron { 2949edd16368SStephen M. Cameron int rc = IO_OK; 2950edd16368SStephen M. Cameron struct CommandList *c; 2951edd16368SStephen M. Cameron struct ErrorInfo *ei; 2952edd16368SStephen M. Cameron 295345fcb86eSStephen Cameron c = cmd_alloc(h); 2954edd16368SStephen M. Cameron 2955edd16368SStephen M. Cameron 2956a2dac136SStephen M. Cameron /* fill_cmd can't fail here, no data buffer to map. */ 29570b9b7b6eSScott Teel (void) fill_cmd(c, reset_type, h, NULL, 0, 0, 2958bf711ac6SScott Teel scsi3addr, TYPE_MSG); 2959c448ecfaSDon Brace rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 296025163bd5SWebb Scales if (rc) { 296125163bd5SWebb Scales dev_warn(&h->pdev->dev, "Failed to send reset command\n"); 296225163bd5SWebb Scales goto out; 296325163bd5SWebb Scales } 2964edd16368SStephen M. Cameron /* no unmap needed here because no data xfer. */ 2965edd16368SStephen M. Cameron 2966edd16368SStephen M. Cameron ei = c->err_info; 2967edd16368SStephen M. Cameron if (ei->CommandStatus != 0) { 2968d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 2969edd16368SStephen M. Cameron rc = -1; 2970edd16368SStephen M. Cameron } 297125163bd5SWebb Scales out: 297245fcb86eSStephen Cameron cmd_free(h, c); 2973edd16368SStephen M. Cameron return rc; 2974edd16368SStephen M. Cameron } 2975edd16368SStephen M. Cameron 2976d604f533SWebb Scales static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c, 2977d604f533SWebb Scales struct hpsa_scsi_dev_t *dev, 2978d604f533SWebb Scales unsigned char *scsi3addr) 2979d604f533SWebb Scales { 2980d604f533SWebb Scales int i; 2981d604f533SWebb Scales bool match = false; 2982d604f533SWebb Scales struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 2983d604f533SWebb Scales struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2; 2984d604f533SWebb Scales 2985d604f533SWebb Scales if (hpsa_is_cmd_idle(c)) 2986d604f533SWebb Scales return false; 2987d604f533SWebb Scales 2988d604f533SWebb Scales switch (c->cmd_type) { 2989d604f533SWebb Scales case CMD_SCSI: 2990d604f533SWebb Scales case CMD_IOCTL_PEND: 2991d604f533SWebb Scales match = !memcmp(scsi3addr, &c->Header.LUN.LunAddrBytes, 2992d604f533SWebb Scales sizeof(c->Header.LUN.LunAddrBytes)); 2993d604f533SWebb Scales break; 2994d604f533SWebb Scales 2995d604f533SWebb Scales case CMD_IOACCEL1: 2996d604f533SWebb Scales case CMD_IOACCEL2: 2997d604f533SWebb Scales if (c->phys_disk == dev) { 2998d604f533SWebb Scales /* HBA mode match */ 2999d604f533SWebb Scales match = true; 3000d604f533SWebb Scales } else { 3001d604f533SWebb Scales /* Possible RAID mode -- check each phys dev. */ 3002d604f533SWebb Scales /* FIXME: Do we need to take out a lock here? If 3003d604f533SWebb Scales * so, we could just call hpsa_get_pdisk_of_ioaccel2() 3004d604f533SWebb Scales * instead. */ 3005d604f533SWebb Scales for (i = 0; i < dev->nphysical_disks && !match; i++) { 3006d604f533SWebb Scales /* FIXME: an alternate test might be 3007d604f533SWebb Scales * 3008d604f533SWebb Scales * match = dev->phys_disk[i]->ioaccel_handle 3009d604f533SWebb Scales * == c2->scsi_nexus; */ 3010d604f533SWebb Scales match = dev->phys_disk[i] == c->phys_disk; 3011d604f533SWebb Scales } 3012d604f533SWebb Scales } 3013d604f533SWebb Scales break; 3014d604f533SWebb Scales 3015d604f533SWebb Scales case IOACCEL2_TMF: 3016d604f533SWebb Scales for (i = 0; i < dev->nphysical_disks && !match; i++) { 3017d604f533SWebb Scales match = dev->phys_disk[i]->ioaccel_handle == 3018d604f533SWebb Scales le32_to_cpu(ac->it_nexus); 3019d604f533SWebb Scales } 3020d604f533SWebb Scales break; 3021d604f533SWebb Scales 3022d604f533SWebb Scales case 0: /* The command is in the middle of being initialized. */ 3023d604f533SWebb Scales match = false; 3024d604f533SWebb Scales break; 3025d604f533SWebb Scales 3026d604f533SWebb Scales default: 3027d604f533SWebb Scales dev_err(&h->pdev->dev, "unexpected cmd_type: %d\n", 3028d604f533SWebb Scales c->cmd_type); 3029d604f533SWebb Scales BUG(); 3030d604f533SWebb Scales } 3031d604f533SWebb Scales 3032d604f533SWebb Scales return match; 3033d604f533SWebb Scales } 3034d604f533SWebb Scales 3035d604f533SWebb Scales static int hpsa_do_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev, 3036d604f533SWebb Scales unsigned char *scsi3addr, u8 reset_type, int reply_queue) 3037d604f533SWebb Scales { 3038d604f533SWebb Scales int i; 3039d604f533SWebb Scales int rc = 0; 3040d604f533SWebb Scales 3041d604f533SWebb Scales /* We can really only handle one reset at a time */ 3042d604f533SWebb Scales if (mutex_lock_interruptible(&h->reset_mutex) == -EINTR) { 3043d604f533SWebb Scales dev_warn(&h->pdev->dev, "concurrent reset wait interrupted.\n"); 3044d604f533SWebb Scales return -EINTR; 3045d604f533SWebb Scales } 3046d604f533SWebb Scales 3047d604f533SWebb Scales BUG_ON(atomic_read(&dev->reset_cmds_out) != 0); 3048d604f533SWebb Scales 3049d604f533SWebb Scales for (i = 0; i < h->nr_cmds; i++) { 3050d604f533SWebb Scales struct CommandList *c = h->cmd_pool + i; 3051d604f533SWebb Scales int refcount = atomic_inc_return(&c->refcount); 3052d604f533SWebb Scales 3053d604f533SWebb Scales if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, scsi3addr)) { 3054d604f533SWebb Scales unsigned long flags; 3055d604f533SWebb Scales 3056d604f533SWebb Scales /* 3057d604f533SWebb Scales * Mark the target command as having a reset pending, 3058d604f533SWebb Scales * then lock a lock so that the command cannot complete 3059d604f533SWebb Scales * while we're considering it. If the command is not 3060d604f533SWebb Scales * idle then count it; otherwise revoke the event. 3061d604f533SWebb Scales */ 3062d604f533SWebb Scales c->reset_pending = dev; 3063d604f533SWebb Scales spin_lock_irqsave(&h->lock, flags); /* Implied MB */ 3064d604f533SWebb Scales if (!hpsa_is_cmd_idle(c)) 3065d604f533SWebb Scales atomic_inc(&dev->reset_cmds_out); 3066d604f533SWebb Scales else 3067d604f533SWebb Scales c->reset_pending = NULL; 3068d604f533SWebb Scales spin_unlock_irqrestore(&h->lock, flags); 3069d604f533SWebb Scales } 3070d604f533SWebb Scales 3071d604f533SWebb Scales cmd_free(h, c); 3072d604f533SWebb Scales } 3073d604f533SWebb Scales 3074d604f533SWebb Scales rc = hpsa_send_reset(h, scsi3addr, reset_type, reply_queue); 3075d604f533SWebb Scales if (!rc) 3076d604f533SWebb Scales wait_event(h->event_sync_wait_queue, 3077d604f533SWebb Scales atomic_read(&dev->reset_cmds_out) == 0 || 3078d604f533SWebb Scales lockup_detected(h)); 3079d604f533SWebb Scales 3080d604f533SWebb Scales if (unlikely(lockup_detected(h))) { 3081d604f533SWebb Scales dev_warn(&h->pdev->dev, 3082d604f533SWebb Scales "Controller lockup detected during reset wait\n"); 3083d604f533SWebb Scales rc = -ENODEV; 3084d604f533SWebb Scales } 3085d604f533SWebb Scales 3086d604f533SWebb Scales if (unlikely(rc)) 3087d604f533SWebb Scales atomic_set(&dev->reset_cmds_out, 0); 3088bfd7546cSDon Brace else 3089bfd7546cSDon Brace wait_for_device_to_become_ready(h, scsi3addr, 0); 3090d604f533SWebb Scales 3091d604f533SWebb Scales mutex_unlock(&h->reset_mutex); 3092d604f533SWebb Scales return rc; 3093d604f533SWebb Scales } 3094d604f533SWebb Scales 3095edd16368SStephen M. Cameron static void hpsa_get_raid_level(struct ctlr_info *h, 3096edd16368SStephen M. Cameron unsigned char *scsi3addr, unsigned char *raid_level) 3097edd16368SStephen M. Cameron { 3098edd16368SStephen M. Cameron int rc; 3099edd16368SStephen M. Cameron unsigned char *buf; 3100edd16368SStephen M. Cameron 3101edd16368SStephen M. Cameron *raid_level = RAID_UNKNOWN; 3102edd16368SStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 3103edd16368SStephen M. Cameron if (!buf) 3104edd16368SStephen M. Cameron return; 31058383278dSScott Teel 31068383278dSScott Teel if (!hpsa_vpd_page_supported(h, scsi3addr, 31078383278dSScott Teel HPSA_VPD_LV_DEVICE_GEOMETRY)) 31088383278dSScott Teel goto exit; 31098383278dSScott Teel 31108383278dSScott Teel rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 31118383278dSScott Teel HPSA_VPD_LV_DEVICE_GEOMETRY, buf, 64); 31128383278dSScott Teel 3113edd16368SStephen M. Cameron if (rc == 0) 3114edd16368SStephen M. Cameron *raid_level = buf[8]; 3115edd16368SStephen M. Cameron if (*raid_level > RAID_UNKNOWN) 3116edd16368SStephen M. Cameron *raid_level = RAID_UNKNOWN; 31178383278dSScott Teel exit: 3118edd16368SStephen M. Cameron kfree(buf); 3119edd16368SStephen M. Cameron return; 3120edd16368SStephen M. Cameron } 3121edd16368SStephen M. Cameron 3122283b4a9bSStephen M. Cameron #define HPSA_MAP_DEBUG 3123283b4a9bSStephen M. Cameron #ifdef HPSA_MAP_DEBUG 3124283b4a9bSStephen M. Cameron static void hpsa_debug_map_buff(struct ctlr_info *h, int rc, 3125283b4a9bSStephen M. Cameron struct raid_map_data *map_buff) 3126283b4a9bSStephen M. Cameron { 3127283b4a9bSStephen M. Cameron struct raid_map_disk_data *dd = &map_buff->data[0]; 3128283b4a9bSStephen M. Cameron int map, row, col; 3129283b4a9bSStephen M. Cameron u16 map_cnt, row_cnt, disks_per_row; 3130283b4a9bSStephen M. Cameron 3131283b4a9bSStephen M. Cameron if (rc != 0) 3132283b4a9bSStephen M. Cameron return; 3133283b4a9bSStephen M. Cameron 31342ba8bfc8SStephen M. Cameron /* Show details only if debugging has been activated. */ 31352ba8bfc8SStephen M. Cameron if (h->raid_offload_debug < 2) 31362ba8bfc8SStephen M. Cameron return; 31372ba8bfc8SStephen M. Cameron 3138283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "structure_size = %u\n", 3139283b4a9bSStephen M. Cameron le32_to_cpu(map_buff->structure_size)); 3140283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "volume_blk_size = %u\n", 3141283b4a9bSStephen M. Cameron le32_to_cpu(map_buff->volume_blk_size)); 3142283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n", 3143283b4a9bSStephen M. Cameron le64_to_cpu(map_buff->volume_blk_cnt)); 3144283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "physicalBlockShift = %u\n", 3145283b4a9bSStephen M. Cameron map_buff->phys_blk_shift); 3146283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n", 3147283b4a9bSStephen M. Cameron map_buff->parity_rotation_shift); 3148283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "strip_size = %u\n", 3149283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->strip_size)); 3150283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n", 3151283b4a9bSStephen M. Cameron le64_to_cpu(map_buff->disk_starting_blk)); 3152283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n", 3153283b4a9bSStephen M. Cameron le64_to_cpu(map_buff->disk_blk_cnt)); 3154283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "data_disks_per_row = %u\n", 3155283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->data_disks_per_row)); 3156283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n", 3157283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->metadata_disks_per_row)); 3158283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "row_cnt = %u\n", 3159283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->row_cnt)); 3160283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "layout_map_count = %u\n", 3161283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->layout_map_count)); 31622b08b3e9SDon Brace dev_info(&h->pdev->dev, "flags = 0x%x\n", 3163dd0e19f3SScott Teel le16_to_cpu(map_buff->flags)); 31642b08b3e9SDon Brace dev_info(&h->pdev->dev, "encrypytion = %s\n", 31652b08b3e9SDon Brace le16_to_cpu(map_buff->flags) & 31662b08b3e9SDon Brace RAID_MAP_FLAG_ENCRYPT_ON ? "ON" : "OFF"); 3167dd0e19f3SScott Teel dev_info(&h->pdev->dev, "dekindex = %u\n", 3168dd0e19f3SScott Teel le16_to_cpu(map_buff->dekindex)); 3169283b4a9bSStephen M. Cameron map_cnt = le16_to_cpu(map_buff->layout_map_count); 3170283b4a9bSStephen M. Cameron for (map = 0; map < map_cnt; map++) { 3171283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, "Map%u:\n", map); 3172283b4a9bSStephen M. Cameron row_cnt = le16_to_cpu(map_buff->row_cnt); 3173283b4a9bSStephen M. Cameron for (row = 0; row < row_cnt; row++) { 3174283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, " Row%u:\n", row); 3175283b4a9bSStephen M. Cameron disks_per_row = 3176283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->data_disks_per_row); 3177283b4a9bSStephen M. Cameron for (col = 0; col < disks_per_row; col++, dd++) 3178283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, 3179283b4a9bSStephen M. Cameron " D%02u: h=0x%04x xor=%u,%u\n", 3180283b4a9bSStephen M. Cameron col, dd->ioaccel_handle, 3181283b4a9bSStephen M. Cameron dd->xor_mult[0], dd->xor_mult[1]); 3182283b4a9bSStephen M. Cameron disks_per_row = 3183283b4a9bSStephen M. Cameron le16_to_cpu(map_buff->metadata_disks_per_row); 3184283b4a9bSStephen M. Cameron for (col = 0; col < disks_per_row; col++, dd++) 3185283b4a9bSStephen M. Cameron dev_info(&h->pdev->dev, 3186283b4a9bSStephen M. Cameron " M%02u: h=0x%04x xor=%u,%u\n", 3187283b4a9bSStephen M. Cameron col, dd->ioaccel_handle, 3188283b4a9bSStephen M. Cameron dd->xor_mult[0], dd->xor_mult[1]); 3189283b4a9bSStephen M. Cameron } 3190283b4a9bSStephen M. Cameron } 3191283b4a9bSStephen M. Cameron } 3192283b4a9bSStephen M. Cameron #else 3193283b4a9bSStephen M. Cameron static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h, 3194283b4a9bSStephen M. Cameron __attribute__((unused)) int rc, 3195283b4a9bSStephen M. Cameron __attribute__((unused)) struct raid_map_data *map_buff) 3196283b4a9bSStephen M. Cameron { 3197283b4a9bSStephen M. Cameron } 3198283b4a9bSStephen M. Cameron #endif 3199283b4a9bSStephen M. Cameron 3200283b4a9bSStephen M. Cameron static int hpsa_get_raid_map(struct ctlr_info *h, 3201283b4a9bSStephen M. Cameron unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device) 3202283b4a9bSStephen M. Cameron { 3203283b4a9bSStephen M. Cameron int rc = 0; 3204283b4a9bSStephen M. Cameron struct CommandList *c; 3205283b4a9bSStephen M. Cameron struct ErrorInfo *ei; 3206283b4a9bSStephen M. Cameron 320745fcb86eSStephen Cameron c = cmd_alloc(h); 3208bf43caf3SRobert Elliott 3209283b4a9bSStephen M. Cameron if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map, 3210283b4a9bSStephen M. Cameron sizeof(this_device->raid_map), 0, 3211283b4a9bSStephen M. Cameron scsi3addr, TYPE_CMD)) { 32122dd02d74SRobert Elliott dev_warn(&h->pdev->dev, "hpsa_get_raid_map fill_cmd failed\n"); 32132dd02d74SRobert Elliott cmd_free(h, c); 32142dd02d74SRobert Elliott return -1; 3215283b4a9bSStephen M. Cameron } 321625163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3217c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 321825163bd5SWebb Scales if (rc) 321925163bd5SWebb Scales goto out; 3220283b4a9bSStephen M. Cameron ei = c->err_info; 3221283b4a9bSStephen M. Cameron if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3222d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 322325163bd5SWebb Scales rc = -1; 322425163bd5SWebb Scales goto out; 3225283b4a9bSStephen M. Cameron } 322645fcb86eSStephen Cameron cmd_free(h, c); 3227283b4a9bSStephen M. Cameron 3228283b4a9bSStephen M. Cameron /* @todo in the future, dynamically allocate RAID map memory */ 3229283b4a9bSStephen M. Cameron if (le32_to_cpu(this_device->raid_map.structure_size) > 3230283b4a9bSStephen M. Cameron sizeof(this_device->raid_map)) { 3231283b4a9bSStephen M. Cameron dev_warn(&h->pdev->dev, "RAID map size is too large!\n"); 3232283b4a9bSStephen M. Cameron rc = -1; 3233283b4a9bSStephen M. Cameron } 3234283b4a9bSStephen M. Cameron hpsa_debug_map_buff(h, rc, &this_device->raid_map); 3235283b4a9bSStephen M. Cameron return rc; 323625163bd5SWebb Scales out: 323725163bd5SWebb Scales cmd_free(h, c); 323825163bd5SWebb Scales return rc; 3239283b4a9bSStephen M. Cameron } 3240283b4a9bSStephen M. Cameron 3241d04e62b9SKevin Barnett static int hpsa_bmic_sense_subsystem_information(struct ctlr_info *h, 3242d04e62b9SKevin Barnett unsigned char scsi3addr[], u16 bmic_device_index, 3243d04e62b9SKevin Barnett struct bmic_sense_subsystem_info *buf, size_t bufsize) 3244d04e62b9SKevin Barnett { 3245d04e62b9SKevin Barnett int rc = IO_OK; 3246d04e62b9SKevin Barnett struct CommandList *c; 3247d04e62b9SKevin Barnett struct ErrorInfo *ei; 3248d04e62b9SKevin Barnett 3249d04e62b9SKevin Barnett c = cmd_alloc(h); 3250d04e62b9SKevin Barnett 3251d04e62b9SKevin Barnett rc = fill_cmd(c, BMIC_SENSE_SUBSYSTEM_INFORMATION, h, buf, bufsize, 3252d04e62b9SKevin Barnett 0, RAID_CTLR_LUNID, TYPE_CMD); 3253d04e62b9SKevin Barnett if (rc) 3254d04e62b9SKevin Barnett goto out; 3255d04e62b9SKevin Barnett 3256d04e62b9SKevin Barnett c->Request.CDB[2] = bmic_device_index & 0xff; 3257d04e62b9SKevin Barnett c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff; 3258d04e62b9SKevin Barnett 3259d04e62b9SKevin Barnett rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3260c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 3261d04e62b9SKevin Barnett if (rc) 3262d04e62b9SKevin Barnett goto out; 3263d04e62b9SKevin Barnett ei = c->err_info; 3264d04e62b9SKevin Barnett if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3265d04e62b9SKevin Barnett hpsa_scsi_interpret_error(h, c); 3266d04e62b9SKevin Barnett rc = -1; 3267d04e62b9SKevin Barnett } 3268d04e62b9SKevin Barnett out: 3269d04e62b9SKevin Barnett cmd_free(h, c); 3270d04e62b9SKevin Barnett return rc; 3271d04e62b9SKevin Barnett } 3272d04e62b9SKevin Barnett 327366749d0dSScott Teel static int hpsa_bmic_id_controller(struct ctlr_info *h, 327466749d0dSScott Teel struct bmic_identify_controller *buf, size_t bufsize) 327566749d0dSScott Teel { 327666749d0dSScott Teel int rc = IO_OK; 327766749d0dSScott Teel struct CommandList *c; 327866749d0dSScott Teel struct ErrorInfo *ei; 327966749d0dSScott Teel 328066749d0dSScott Teel c = cmd_alloc(h); 328166749d0dSScott Teel 328266749d0dSScott Teel rc = fill_cmd(c, BMIC_IDENTIFY_CONTROLLER, h, buf, bufsize, 328366749d0dSScott Teel 0, RAID_CTLR_LUNID, TYPE_CMD); 328466749d0dSScott Teel if (rc) 328566749d0dSScott Teel goto out; 328666749d0dSScott Teel 328766749d0dSScott Teel rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3288c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 328966749d0dSScott Teel if (rc) 329066749d0dSScott Teel goto out; 329166749d0dSScott Teel ei = c->err_info; 329266749d0dSScott Teel if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 329366749d0dSScott Teel hpsa_scsi_interpret_error(h, c); 329466749d0dSScott Teel rc = -1; 329566749d0dSScott Teel } 329666749d0dSScott Teel out: 329766749d0dSScott Teel cmd_free(h, c); 329866749d0dSScott Teel return rc; 329966749d0dSScott Teel } 330066749d0dSScott Teel 330103383736SDon Brace static int hpsa_bmic_id_physical_device(struct ctlr_info *h, 330203383736SDon Brace unsigned char scsi3addr[], u16 bmic_device_index, 330303383736SDon Brace struct bmic_identify_physical_device *buf, size_t bufsize) 330403383736SDon Brace { 330503383736SDon Brace int rc = IO_OK; 330603383736SDon Brace struct CommandList *c; 330703383736SDon Brace struct ErrorInfo *ei; 330803383736SDon Brace 330903383736SDon Brace c = cmd_alloc(h); 331003383736SDon Brace rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize, 331103383736SDon Brace 0, RAID_CTLR_LUNID, TYPE_CMD); 331203383736SDon Brace if (rc) 331303383736SDon Brace goto out; 331403383736SDon Brace 331503383736SDon Brace c->Request.CDB[2] = bmic_device_index & 0xff; 331603383736SDon Brace c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff; 331703383736SDon Brace 331825163bd5SWebb Scales hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE, 3319c448ecfaSDon Brace DEFAULT_TIMEOUT); 332003383736SDon Brace ei = c->err_info; 332103383736SDon Brace if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 332203383736SDon Brace hpsa_scsi_interpret_error(h, c); 332303383736SDon Brace rc = -1; 332403383736SDon Brace } 332503383736SDon Brace out: 332603383736SDon Brace cmd_free(h, c); 3327d04e62b9SKevin Barnett 332803383736SDon Brace return rc; 332903383736SDon Brace } 333003383736SDon Brace 3331cca8f13bSDon Brace /* 3332cca8f13bSDon Brace * get enclosure information 3333cca8f13bSDon Brace * struct ReportExtendedLUNdata *rlep - Used for BMIC drive number 3334cca8f13bSDon Brace * struct hpsa_scsi_dev_t *encl_dev - device entry for enclosure 3335cca8f13bSDon Brace * Uses id_physical_device to determine the box_index. 3336cca8f13bSDon Brace */ 3337cca8f13bSDon Brace static void hpsa_get_enclosure_info(struct ctlr_info *h, 3338cca8f13bSDon Brace unsigned char *scsi3addr, 3339cca8f13bSDon Brace struct ReportExtendedLUNdata *rlep, int rle_index, 3340cca8f13bSDon Brace struct hpsa_scsi_dev_t *encl_dev) 3341cca8f13bSDon Brace { 3342cca8f13bSDon Brace int rc = -1; 3343cca8f13bSDon Brace struct CommandList *c = NULL; 3344cca8f13bSDon Brace struct ErrorInfo *ei = NULL; 3345cca8f13bSDon Brace struct bmic_sense_storage_box_params *bssbp = NULL; 3346cca8f13bSDon Brace struct bmic_identify_physical_device *id_phys = NULL; 3347cca8f13bSDon Brace struct ext_report_lun_entry *rle = &rlep->LUN[rle_index]; 3348cca8f13bSDon Brace u16 bmic_device_index = 0; 3349cca8f13bSDon Brace 3350cca8f13bSDon Brace bmic_device_index = GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]); 3351cca8f13bSDon Brace 335217a9e54aSDon Brace if (bmic_device_index == 0xFF00 || MASKED_DEVICE(&rle->lunid[0])) { 335317a9e54aSDon Brace rc = IO_OK; 3354cca8f13bSDon Brace goto out; 335517a9e54aSDon Brace } 3356cca8f13bSDon Brace 3357cca8f13bSDon Brace bssbp = kzalloc(sizeof(*bssbp), GFP_KERNEL); 3358cca8f13bSDon Brace if (!bssbp) 3359cca8f13bSDon Brace goto out; 3360cca8f13bSDon Brace 3361cca8f13bSDon Brace id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 3362cca8f13bSDon Brace if (!id_phys) 3363cca8f13bSDon Brace goto out; 3364cca8f13bSDon Brace 3365cca8f13bSDon Brace rc = hpsa_bmic_id_physical_device(h, scsi3addr, bmic_device_index, 3366cca8f13bSDon Brace id_phys, sizeof(*id_phys)); 3367cca8f13bSDon Brace if (rc) { 3368cca8f13bSDon Brace dev_warn(&h->pdev->dev, "%s: id_phys failed %d bdi[0x%x]\n", 3369cca8f13bSDon Brace __func__, encl_dev->external, bmic_device_index); 3370cca8f13bSDon Brace goto out; 3371cca8f13bSDon Brace } 3372cca8f13bSDon Brace 3373cca8f13bSDon Brace c = cmd_alloc(h); 3374cca8f13bSDon Brace 3375cca8f13bSDon Brace rc = fill_cmd(c, BMIC_SENSE_STORAGE_BOX_PARAMS, h, bssbp, 3376cca8f13bSDon Brace sizeof(*bssbp), 0, RAID_CTLR_LUNID, TYPE_CMD); 3377cca8f13bSDon Brace 3378cca8f13bSDon Brace if (rc) 3379cca8f13bSDon Brace goto out; 3380cca8f13bSDon Brace 3381cca8f13bSDon Brace if (id_phys->phys_connector[1] == 'E') 3382cca8f13bSDon Brace c->Request.CDB[5] = id_phys->box_index; 3383cca8f13bSDon Brace else 3384cca8f13bSDon Brace c->Request.CDB[5] = 0; 3385cca8f13bSDon Brace 3386cca8f13bSDon Brace rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE, 3387c448ecfaSDon Brace DEFAULT_TIMEOUT); 3388cca8f13bSDon Brace if (rc) 3389cca8f13bSDon Brace goto out; 3390cca8f13bSDon Brace 3391cca8f13bSDon Brace ei = c->err_info; 3392cca8f13bSDon Brace if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3393cca8f13bSDon Brace rc = -1; 3394cca8f13bSDon Brace goto out; 3395cca8f13bSDon Brace } 3396cca8f13bSDon Brace 3397cca8f13bSDon Brace encl_dev->box[id_phys->active_path_number] = bssbp->phys_box_on_port; 3398cca8f13bSDon Brace memcpy(&encl_dev->phys_connector[id_phys->active_path_number], 3399cca8f13bSDon Brace bssbp->phys_connector, sizeof(bssbp->phys_connector)); 3400cca8f13bSDon Brace 3401cca8f13bSDon Brace rc = IO_OK; 3402cca8f13bSDon Brace out: 3403cca8f13bSDon Brace kfree(bssbp); 3404cca8f13bSDon Brace kfree(id_phys); 3405cca8f13bSDon Brace 3406cca8f13bSDon Brace if (c) 3407cca8f13bSDon Brace cmd_free(h, c); 3408cca8f13bSDon Brace 3409cca8f13bSDon Brace if (rc != IO_OK) 3410cca8f13bSDon Brace hpsa_show_dev_msg(KERN_INFO, h, encl_dev, 3411cca8f13bSDon Brace "Error, could not get enclosure information\n"); 3412cca8f13bSDon Brace } 3413cca8f13bSDon Brace 3414d04e62b9SKevin Barnett static u64 hpsa_get_sas_address_from_report_physical(struct ctlr_info *h, 3415d04e62b9SKevin Barnett unsigned char *scsi3addr) 3416d04e62b9SKevin Barnett { 3417d04e62b9SKevin Barnett struct ReportExtendedLUNdata *physdev; 3418d04e62b9SKevin Barnett u32 nphysicals; 3419d04e62b9SKevin Barnett u64 sa = 0; 3420d04e62b9SKevin Barnett int i; 3421d04e62b9SKevin Barnett 3422d04e62b9SKevin Barnett physdev = kzalloc(sizeof(*physdev), GFP_KERNEL); 3423d04e62b9SKevin Barnett if (!physdev) 3424d04e62b9SKevin Barnett return 0; 3425d04e62b9SKevin Barnett 3426d04e62b9SKevin Barnett if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) { 3427d04e62b9SKevin Barnett dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 3428d04e62b9SKevin Barnett kfree(physdev); 3429d04e62b9SKevin Barnett return 0; 3430d04e62b9SKevin Barnett } 3431d04e62b9SKevin Barnett nphysicals = get_unaligned_be32(physdev->LUNListLength) / 24; 3432d04e62b9SKevin Barnett 3433d04e62b9SKevin Barnett for (i = 0; i < nphysicals; i++) 3434d04e62b9SKevin Barnett if (!memcmp(&physdev->LUN[i].lunid[0], scsi3addr, 8)) { 3435d04e62b9SKevin Barnett sa = get_unaligned_be64(&physdev->LUN[i].wwid[0]); 3436d04e62b9SKevin Barnett break; 3437d04e62b9SKevin Barnett } 3438d04e62b9SKevin Barnett 3439d04e62b9SKevin Barnett kfree(physdev); 3440d04e62b9SKevin Barnett 3441d04e62b9SKevin Barnett return sa; 3442d04e62b9SKevin Barnett } 3443d04e62b9SKevin Barnett 3444d04e62b9SKevin Barnett static void hpsa_get_sas_address(struct ctlr_info *h, unsigned char *scsi3addr, 3445d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *dev) 3446d04e62b9SKevin Barnett { 3447d04e62b9SKevin Barnett int rc; 3448d04e62b9SKevin Barnett u64 sa = 0; 3449d04e62b9SKevin Barnett 3450d04e62b9SKevin Barnett if (is_hba_lunid(scsi3addr)) { 3451d04e62b9SKevin Barnett struct bmic_sense_subsystem_info *ssi; 3452d04e62b9SKevin Barnett 3453d04e62b9SKevin Barnett ssi = kzalloc(sizeof(*ssi), GFP_KERNEL); 3454*7e8a9486SAmit Kushwaha if (!ssi) 3455d04e62b9SKevin Barnett return; 3456d04e62b9SKevin Barnett 3457d04e62b9SKevin Barnett rc = hpsa_bmic_sense_subsystem_information(h, 3458d04e62b9SKevin Barnett scsi3addr, 0, ssi, sizeof(*ssi)); 3459d04e62b9SKevin Barnett if (rc == 0) { 3460d04e62b9SKevin Barnett sa = get_unaligned_be64(ssi->primary_world_wide_id); 3461d04e62b9SKevin Barnett h->sas_address = sa; 3462d04e62b9SKevin Barnett } 3463d04e62b9SKevin Barnett 3464d04e62b9SKevin Barnett kfree(ssi); 3465d04e62b9SKevin Barnett } else 3466d04e62b9SKevin Barnett sa = hpsa_get_sas_address_from_report_physical(h, scsi3addr); 3467d04e62b9SKevin Barnett 3468d04e62b9SKevin Barnett dev->sas_address = sa; 3469d04e62b9SKevin Barnett } 3470d04e62b9SKevin Barnett 3471d04e62b9SKevin Barnett /* Get a device id from inquiry page 0x83 */ 34728383278dSScott Teel static bool hpsa_vpd_page_supported(struct ctlr_info *h, 34731b70150aSStephen M. Cameron unsigned char scsi3addr[], u8 page) 34741b70150aSStephen M. Cameron { 34751b70150aSStephen M. Cameron int rc; 34761b70150aSStephen M. Cameron int i; 34771b70150aSStephen M. Cameron int pages; 34781b70150aSStephen M. Cameron unsigned char *buf, bufsize; 34791b70150aSStephen M. Cameron 34801b70150aSStephen M. Cameron buf = kzalloc(256, GFP_KERNEL); 34811b70150aSStephen M. Cameron if (!buf) 34828383278dSScott Teel return false; 34831b70150aSStephen M. Cameron 34841b70150aSStephen M. Cameron /* Get the size of the page list first */ 34851b70150aSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, 34861b70150aSStephen M. Cameron VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES, 34871b70150aSStephen M. Cameron buf, HPSA_VPD_HEADER_SZ); 34881b70150aSStephen M. Cameron if (rc != 0) 34891b70150aSStephen M. Cameron goto exit_unsupported; 34901b70150aSStephen M. Cameron pages = buf[3]; 34911b70150aSStephen M. Cameron if ((pages + HPSA_VPD_HEADER_SZ) <= 255) 34921b70150aSStephen M. Cameron bufsize = pages + HPSA_VPD_HEADER_SZ; 34931b70150aSStephen M. Cameron else 34941b70150aSStephen M. Cameron bufsize = 255; 34951b70150aSStephen M. Cameron 34961b70150aSStephen M. Cameron /* Get the whole VPD page list */ 34971b70150aSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, 34981b70150aSStephen M. Cameron VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES, 34991b70150aSStephen M. Cameron buf, bufsize); 35001b70150aSStephen M. Cameron if (rc != 0) 35011b70150aSStephen M. Cameron goto exit_unsupported; 35021b70150aSStephen M. Cameron 35031b70150aSStephen M. Cameron pages = buf[3]; 35041b70150aSStephen M. Cameron for (i = 1; i <= pages; i++) 35051b70150aSStephen M. Cameron if (buf[3 + i] == page) 35061b70150aSStephen M. Cameron goto exit_supported; 35071b70150aSStephen M. Cameron exit_unsupported: 35081b70150aSStephen M. Cameron kfree(buf); 35098383278dSScott Teel return false; 35101b70150aSStephen M. Cameron exit_supported: 35111b70150aSStephen M. Cameron kfree(buf); 35128383278dSScott Teel return true; 35131b70150aSStephen M. Cameron } 35141b70150aSStephen M. Cameron 3515283b4a9bSStephen M. Cameron static void hpsa_get_ioaccel_status(struct ctlr_info *h, 3516283b4a9bSStephen M. Cameron unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device) 3517283b4a9bSStephen M. Cameron { 3518283b4a9bSStephen M. Cameron int rc; 3519283b4a9bSStephen M. Cameron unsigned char *buf; 3520283b4a9bSStephen M. Cameron u8 ioaccel_status; 3521283b4a9bSStephen M. Cameron 3522283b4a9bSStephen M. Cameron this_device->offload_config = 0; 3523283b4a9bSStephen M. Cameron this_device->offload_enabled = 0; 352441ce4c35SStephen Cameron this_device->offload_to_be_enabled = 0; 3525283b4a9bSStephen M. Cameron 3526283b4a9bSStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 3527283b4a9bSStephen M. Cameron if (!buf) 3528283b4a9bSStephen M. Cameron return; 35291b70150aSStephen M. Cameron if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS)) 35301b70150aSStephen M. Cameron goto out; 3531283b4a9bSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, 3532b7bb24ebSStephen M. Cameron VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64); 3533283b4a9bSStephen M. Cameron if (rc != 0) 3534283b4a9bSStephen M. Cameron goto out; 3535283b4a9bSStephen M. Cameron 3536283b4a9bSStephen M. Cameron #define IOACCEL_STATUS_BYTE 4 3537283b4a9bSStephen M. Cameron #define OFFLOAD_CONFIGURED_BIT 0x01 3538283b4a9bSStephen M. Cameron #define OFFLOAD_ENABLED_BIT 0x02 3539283b4a9bSStephen M. Cameron ioaccel_status = buf[IOACCEL_STATUS_BYTE]; 3540283b4a9bSStephen M. Cameron this_device->offload_config = 3541283b4a9bSStephen M. Cameron !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT); 3542283b4a9bSStephen M. Cameron if (this_device->offload_config) { 3543283b4a9bSStephen M. Cameron this_device->offload_enabled = 3544283b4a9bSStephen M. Cameron !!(ioaccel_status & OFFLOAD_ENABLED_BIT); 3545283b4a9bSStephen M. Cameron if (hpsa_get_raid_map(h, scsi3addr, this_device)) 3546283b4a9bSStephen M. Cameron this_device->offload_enabled = 0; 3547283b4a9bSStephen M. Cameron } 354841ce4c35SStephen Cameron this_device->offload_to_be_enabled = this_device->offload_enabled; 3549283b4a9bSStephen M. Cameron out: 3550283b4a9bSStephen M. Cameron kfree(buf); 3551283b4a9bSStephen M. Cameron return; 3552283b4a9bSStephen M. Cameron } 3553283b4a9bSStephen M. Cameron 3554edd16368SStephen M. Cameron /* Get the device id from inquiry page 0x83 */ 3555edd16368SStephen M. Cameron static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr, 355675d23d89SDon Brace unsigned char *device_id, int index, int buflen) 3557edd16368SStephen M. Cameron { 3558edd16368SStephen M. Cameron int rc; 3559edd16368SStephen M. Cameron unsigned char *buf; 3560edd16368SStephen M. Cameron 35618383278dSScott Teel /* Does controller have VPD for device id? */ 35628383278dSScott Teel if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_DEVICE_ID)) 35638383278dSScott Teel return 1; /* not supported */ 35648383278dSScott Teel 3565edd16368SStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 3566edd16368SStephen M. Cameron if (!buf) 3567a84d794dSStephen M. Cameron return -ENOMEM; 35688383278dSScott Teel 35698383278dSScott Teel rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 35708383278dSScott Teel HPSA_VPD_LV_DEVICE_ID, buf, 64); 35718383278dSScott Teel if (rc == 0) { 35728383278dSScott Teel if (buflen > 16) 35738383278dSScott Teel buflen = 16; 35748383278dSScott Teel memcpy(device_id, &buf[8], buflen); 35758383278dSScott Teel } 357675d23d89SDon Brace 3577edd16368SStephen M. Cameron kfree(buf); 357875d23d89SDon Brace 35798383278dSScott Teel return rc; /*0 - got id, otherwise, didn't */ 3580edd16368SStephen M. Cameron } 3581edd16368SStephen M. Cameron 3582edd16368SStephen M. Cameron static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical, 358303383736SDon Brace void *buf, int bufsize, 3584edd16368SStephen M. Cameron int extended_response) 3585edd16368SStephen M. Cameron { 3586edd16368SStephen M. Cameron int rc = IO_OK; 3587edd16368SStephen M. Cameron struct CommandList *c; 3588edd16368SStephen M. Cameron unsigned char scsi3addr[8]; 3589edd16368SStephen M. Cameron struct ErrorInfo *ei; 3590edd16368SStephen M. Cameron 359145fcb86eSStephen Cameron c = cmd_alloc(h); 3592bf43caf3SRobert Elliott 3593e89c0ae7SStephen M. Cameron /* address the controller */ 3594e89c0ae7SStephen M. Cameron memset(scsi3addr, 0, sizeof(scsi3addr)); 3595a2dac136SStephen M. Cameron if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h, 3596a2dac136SStephen M. Cameron buf, bufsize, 0, scsi3addr, TYPE_CMD)) { 3597a2dac136SStephen M. Cameron rc = -1; 3598a2dac136SStephen M. Cameron goto out; 3599a2dac136SStephen M. Cameron } 3600edd16368SStephen M. Cameron if (extended_response) 3601edd16368SStephen M. Cameron c->Request.CDB[1] = extended_response; 360225163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3603c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 360425163bd5SWebb Scales if (rc) 360525163bd5SWebb Scales goto out; 3606edd16368SStephen M. Cameron ei = c->err_info; 3607edd16368SStephen M. Cameron if (ei->CommandStatus != 0 && 3608edd16368SStephen M. Cameron ei->CommandStatus != CMD_DATA_UNDERRUN) { 3609d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 3610edd16368SStephen M. Cameron rc = -1; 3611283b4a9bSStephen M. Cameron } else { 361203383736SDon Brace struct ReportLUNdata *rld = buf; 361303383736SDon Brace 361403383736SDon Brace if (rld->extended_response_flag != extended_response) { 3615283b4a9bSStephen M. Cameron dev_err(&h->pdev->dev, 3616283b4a9bSStephen M. Cameron "report luns requested format %u, got %u\n", 3617283b4a9bSStephen M. Cameron extended_response, 361803383736SDon Brace rld->extended_response_flag); 3619283b4a9bSStephen M. Cameron rc = -1; 3620283b4a9bSStephen M. Cameron } 3621edd16368SStephen M. Cameron } 3622a2dac136SStephen M. Cameron out: 362345fcb86eSStephen Cameron cmd_free(h, c); 3624edd16368SStephen M. Cameron return rc; 3625edd16368SStephen M. Cameron } 3626edd16368SStephen M. Cameron 3627edd16368SStephen M. Cameron static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 362803383736SDon Brace struct ReportExtendedLUNdata *buf, int bufsize) 3629edd16368SStephen M. Cameron { 36302a80d545SHannes Reinecke int rc; 36312a80d545SHannes Reinecke struct ReportLUNdata *lbuf; 36322a80d545SHannes Reinecke 36332a80d545SHannes Reinecke rc = hpsa_scsi_do_report_luns(h, 0, buf, bufsize, 363403383736SDon Brace HPSA_REPORT_PHYS_EXTENDED); 36352a80d545SHannes Reinecke if (!rc || !hpsa_allow_any) 36362a80d545SHannes Reinecke return rc; 36372a80d545SHannes Reinecke 36382a80d545SHannes Reinecke /* REPORT PHYS EXTENDED is not supported */ 36392a80d545SHannes Reinecke lbuf = kzalloc(sizeof(*lbuf), GFP_KERNEL); 36402a80d545SHannes Reinecke if (!lbuf) 36412a80d545SHannes Reinecke return -ENOMEM; 36422a80d545SHannes Reinecke 36432a80d545SHannes Reinecke rc = hpsa_scsi_do_report_luns(h, 0, lbuf, sizeof(*lbuf), 0); 36442a80d545SHannes Reinecke if (!rc) { 36452a80d545SHannes Reinecke int i; 36462a80d545SHannes Reinecke u32 nphys; 36472a80d545SHannes Reinecke 36482a80d545SHannes Reinecke /* Copy ReportLUNdata header */ 36492a80d545SHannes Reinecke memcpy(buf, lbuf, 8); 36502a80d545SHannes Reinecke nphys = be32_to_cpu(*((__be32 *)lbuf->LUNListLength)) / 8; 36512a80d545SHannes Reinecke for (i = 0; i < nphys; i++) 36522a80d545SHannes Reinecke memcpy(buf->LUN[i].lunid, lbuf->LUN[i], 8); 36532a80d545SHannes Reinecke } 36542a80d545SHannes Reinecke kfree(lbuf); 36552a80d545SHannes Reinecke return rc; 3656edd16368SStephen M. Cameron } 3657edd16368SStephen M. Cameron 3658edd16368SStephen M. Cameron static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h, 3659edd16368SStephen M. Cameron struct ReportLUNdata *buf, int bufsize) 3660edd16368SStephen M. Cameron { 3661edd16368SStephen M. Cameron return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0); 3662edd16368SStephen M. Cameron } 3663edd16368SStephen M. Cameron 3664edd16368SStephen M. Cameron static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device, 3665edd16368SStephen M. Cameron int bus, int target, int lun) 3666edd16368SStephen M. Cameron { 3667edd16368SStephen M. Cameron device->bus = bus; 3668edd16368SStephen M. Cameron device->target = target; 3669edd16368SStephen M. Cameron device->lun = lun; 3670edd16368SStephen M. Cameron } 3671edd16368SStephen M. Cameron 36729846590eSStephen M. Cameron /* Use VPD inquiry to get details of volume status */ 36739846590eSStephen M. Cameron static int hpsa_get_volume_status(struct ctlr_info *h, 36749846590eSStephen M. Cameron unsigned char scsi3addr[]) 36759846590eSStephen M. Cameron { 36769846590eSStephen M. Cameron int rc; 36779846590eSStephen M. Cameron int status; 36789846590eSStephen M. Cameron int size; 36799846590eSStephen M. Cameron unsigned char *buf; 36809846590eSStephen M. Cameron 36819846590eSStephen M. Cameron buf = kzalloc(64, GFP_KERNEL); 36829846590eSStephen M. Cameron if (!buf) 36839846590eSStephen M. Cameron return HPSA_VPD_LV_STATUS_UNSUPPORTED; 36849846590eSStephen M. Cameron 36859846590eSStephen M. Cameron /* Does controller have VPD for logical volume status? */ 368624a4b078SStephen M. Cameron if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS)) 36879846590eSStephen M. Cameron goto exit_failed; 36889846590eSStephen M. Cameron 36899846590eSStephen M. Cameron /* Get the size of the VPD return buffer */ 36909846590eSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS, 36919846590eSStephen M. Cameron buf, HPSA_VPD_HEADER_SZ); 369224a4b078SStephen M. Cameron if (rc != 0) 36939846590eSStephen M. Cameron goto exit_failed; 36949846590eSStephen M. Cameron size = buf[3]; 36959846590eSStephen M. Cameron 36969846590eSStephen M. Cameron /* Now get the whole VPD buffer */ 36979846590eSStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS, 36989846590eSStephen M. Cameron buf, size + HPSA_VPD_HEADER_SZ); 369924a4b078SStephen M. Cameron if (rc != 0) 37009846590eSStephen M. Cameron goto exit_failed; 37019846590eSStephen M. Cameron status = buf[4]; /* status byte */ 37029846590eSStephen M. Cameron 37039846590eSStephen M. Cameron kfree(buf); 37049846590eSStephen M. Cameron return status; 37059846590eSStephen M. Cameron exit_failed: 37069846590eSStephen M. Cameron kfree(buf); 37079846590eSStephen M. Cameron return HPSA_VPD_LV_STATUS_UNSUPPORTED; 37089846590eSStephen M. Cameron } 37099846590eSStephen M. Cameron 37109846590eSStephen M. Cameron /* Determine offline status of a volume. 37119846590eSStephen M. Cameron * Return either: 37129846590eSStephen M. Cameron * 0 (not offline) 371367955ba3SStephen M. Cameron * 0xff (offline for unknown reasons) 37149846590eSStephen M. Cameron * # (integer code indicating one of several NOT READY states 37159846590eSStephen M. Cameron * describing why a volume is to be kept offline) 37169846590eSStephen M. Cameron */ 371767955ba3SStephen M. Cameron static int hpsa_volume_offline(struct ctlr_info *h, 37189846590eSStephen M. Cameron unsigned char scsi3addr[]) 37199846590eSStephen M. Cameron { 37209846590eSStephen M. Cameron struct CommandList *c; 37219437ac43SStephen Cameron unsigned char *sense; 37229437ac43SStephen Cameron u8 sense_key, asc, ascq; 37239437ac43SStephen Cameron int sense_len; 372425163bd5SWebb Scales int rc, ldstat = 0; 37259846590eSStephen M. Cameron u16 cmd_status; 37269846590eSStephen M. Cameron u8 scsi_status; 37279846590eSStephen M. Cameron #define ASC_LUN_NOT_READY 0x04 37289846590eSStephen M. Cameron #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04 37299846590eSStephen M. Cameron #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02 37309846590eSStephen M. Cameron 37319846590eSStephen M. Cameron c = cmd_alloc(h); 3732bf43caf3SRobert Elliott 37339846590eSStephen M. Cameron (void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD); 3734c448ecfaSDon Brace rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 3735c448ecfaSDon Brace DEFAULT_TIMEOUT); 373625163bd5SWebb Scales if (rc) { 373725163bd5SWebb Scales cmd_free(h, c); 373825163bd5SWebb Scales return 0; 373925163bd5SWebb Scales } 37409846590eSStephen M. Cameron sense = c->err_info->SenseInfo; 37419437ac43SStephen Cameron if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo)) 37429437ac43SStephen Cameron sense_len = sizeof(c->err_info->SenseInfo); 37439437ac43SStephen Cameron else 37449437ac43SStephen Cameron sense_len = c->err_info->SenseLen; 37459437ac43SStephen Cameron decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq); 37469846590eSStephen M. Cameron cmd_status = c->err_info->CommandStatus; 37479846590eSStephen M. Cameron scsi_status = c->err_info->ScsiStatus; 37489846590eSStephen M. Cameron cmd_free(h, c); 37499846590eSStephen M. Cameron /* Is the volume 'not ready'? */ 37509846590eSStephen M. Cameron if (cmd_status != CMD_TARGET_STATUS || 37519846590eSStephen M. Cameron scsi_status != SAM_STAT_CHECK_CONDITION || 37529846590eSStephen M. Cameron sense_key != NOT_READY || 37539846590eSStephen M. Cameron asc != ASC_LUN_NOT_READY) { 37549846590eSStephen M. Cameron return 0; 37559846590eSStephen M. Cameron } 37569846590eSStephen M. Cameron 37579846590eSStephen M. Cameron /* Determine the reason for not ready state */ 37589846590eSStephen M. Cameron ldstat = hpsa_get_volume_status(h, scsi3addr); 37599846590eSStephen M. Cameron 37609846590eSStephen M. Cameron /* Keep volume offline in certain cases: */ 37619846590eSStephen M. Cameron switch (ldstat) { 37629846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ERASE: 37635ca01204SScott Benesh case HPSA_LV_NOT_AVAILABLE: 37649846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_RPI: 37659846590eSStephen M. Cameron case HPSA_LV_PENDING_RPI: 37669846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_NO_KEY: 37679846590eSStephen M. Cameron case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER: 37689846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION: 37699846590eSStephen M. Cameron case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING: 37709846590eSStephen M. Cameron case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 37719846590eSStephen M. Cameron return ldstat; 37729846590eSStephen M. Cameron case HPSA_VPD_LV_STATUS_UNSUPPORTED: 37739846590eSStephen M. Cameron /* If VPD status page isn't available, 37749846590eSStephen M. Cameron * use ASC/ASCQ to determine state 37759846590eSStephen M. Cameron */ 37769846590eSStephen M. Cameron if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) || 37779846590eSStephen M. Cameron (ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ)) 37789846590eSStephen M. Cameron return ldstat; 37799846590eSStephen M. Cameron break; 37809846590eSStephen M. Cameron default: 37819846590eSStephen M. Cameron break; 37829846590eSStephen M. Cameron } 37839846590eSStephen M. Cameron return 0; 37849846590eSStephen M. Cameron } 37859846590eSStephen M. Cameron 37869b5c48c2SStephen Cameron /* 37879b5c48c2SStephen Cameron * Find out if a logical device supports aborts by simply trying one. 37889b5c48c2SStephen Cameron * Smart Array may claim not to support aborts on logical drives, but 37899b5c48c2SStephen Cameron * if a MSA2000 * is connected, the drives on that will be presented 37909b5c48c2SStephen Cameron * by the Smart Array as logical drives, and aborts may be sent to 37919b5c48c2SStephen Cameron * those devices successfully. So the simplest way to find out is 37929b5c48c2SStephen Cameron * to simply try an abort and see how the device responds. 37939b5c48c2SStephen Cameron */ 37949b5c48c2SStephen Cameron static int hpsa_device_supports_aborts(struct ctlr_info *h, 37959b5c48c2SStephen Cameron unsigned char *scsi3addr) 37969b5c48c2SStephen Cameron { 37979b5c48c2SStephen Cameron struct CommandList *c; 37989b5c48c2SStephen Cameron struct ErrorInfo *ei; 37999b5c48c2SStephen Cameron int rc = 0; 38009b5c48c2SStephen Cameron 38019b5c48c2SStephen Cameron u64 tag = (u64) -1; /* bogus tag */ 38029b5c48c2SStephen Cameron 38039b5c48c2SStephen Cameron /* Assume that physical devices support aborts */ 38049b5c48c2SStephen Cameron if (!is_logical_dev_addr_mode(scsi3addr)) 38059b5c48c2SStephen Cameron return 1; 38069b5c48c2SStephen Cameron 38079b5c48c2SStephen Cameron c = cmd_alloc(h); 3808bf43caf3SRobert Elliott 38099b5c48c2SStephen Cameron (void) fill_cmd(c, HPSA_ABORT_MSG, h, &tag, 0, 0, scsi3addr, TYPE_MSG); 3810c448ecfaSDon Brace (void) hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 3811c448ecfaSDon Brace DEFAULT_TIMEOUT); 38129b5c48c2SStephen Cameron /* no unmap needed here because no data xfer. */ 38139b5c48c2SStephen Cameron ei = c->err_info; 38149b5c48c2SStephen Cameron switch (ei->CommandStatus) { 38159b5c48c2SStephen Cameron case CMD_INVALID: 38169b5c48c2SStephen Cameron rc = 0; 38179b5c48c2SStephen Cameron break; 38189b5c48c2SStephen Cameron case CMD_UNABORTABLE: 38199b5c48c2SStephen Cameron case CMD_ABORT_FAILED: 38209b5c48c2SStephen Cameron rc = 1; 38219b5c48c2SStephen Cameron break; 38229437ac43SStephen Cameron case CMD_TMF_STATUS: 38239437ac43SStephen Cameron rc = hpsa_evaluate_tmf_status(h, c); 38249437ac43SStephen Cameron break; 38259b5c48c2SStephen Cameron default: 38269b5c48c2SStephen Cameron rc = 0; 38279b5c48c2SStephen Cameron break; 38289b5c48c2SStephen Cameron } 38299b5c48c2SStephen Cameron cmd_free(h, c); 38309b5c48c2SStephen Cameron return rc; 38319b5c48c2SStephen Cameron } 38329b5c48c2SStephen Cameron 3833edd16368SStephen M. Cameron static int hpsa_update_device_info(struct ctlr_info *h, 38340b0e1d6cSStephen M. Cameron unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device, 38350b0e1d6cSStephen M. Cameron unsigned char *is_OBDR_device) 3836edd16368SStephen M. Cameron { 38370b0e1d6cSStephen M. Cameron 38380b0e1d6cSStephen M. Cameron #define OBDR_SIG_OFFSET 43 38390b0e1d6cSStephen M. Cameron #define OBDR_TAPE_SIG "$DR-10" 38400b0e1d6cSStephen M. Cameron #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1) 38410b0e1d6cSStephen M. Cameron #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN) 38420b0e1d6cSStephen M. Cameron 3843ea6d3bc3SStephen M. Cameron unsigned char *inq_buff; 38440b0e1d6cSStephen M. Cameron unsigned char *obdr_sig; 3845683fc444SDon Brace int rc = 0; 3846edd16368SStephen M. Cameron 3847ea6d3bc3SStephen M. Cameron inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL); 3848683fc444SDon Brace if (!inq_buff) { 3849683fc444SDon Brace rc = -ENOMEM; 3850edd16368SStephen M. Cameron goto bail_out; 3851683fc444SDon Brace } 3852edd16368SStephen M. Cameron 3853edd16368SStephen M. Cameron /* Do an inquiry to the device to see what it is. */ 3854edd16368SStephen M. Cameron if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff, 3855edd16368SStephen M. Cameron (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) { 3856edd16368SStephen M. Cameron /* Inquiry failed (msg printed already) */ 3857edd16368SStephen M. Cameron dev_err(&h->pdev->dev, 3858edd16368SStephen M. Cameron "hpsa_update_device_info: inquiry failed\n"); 3859683fc444SDon Brace rc = -EIO; 3860edd16368SStephen M. Cameron goto bail_out; 3861edd16368SStephen M. Cameron } 3862edd16368SStephen M. Cameron 38634af61e4fSDon Brace scsi_sanitize_inquiry_string(&inq_buff[8], 8); 38644af61e4fSDon Brace scsi_sanitize_inquiry_string(&inq_buff[16], 16); 386575d23d89SDon Brace 3866edd16368SStephen M. Cameron this_device->devtype = (inq_buff[0] & 0x1f); 3867edd16368SStephen M. Cameron memcpy(this_device->scsi3addr, scsi3addr, 8); 3868edd16368SStephen M. Cameron memcpy(this_device->vendor, &inq_buff[8], 3869edd16368SStephen M. Cameron sizeof(this_device->vendor)); 3870edd16368SStephen M. Cameron memcpy(this_device->model, &inq_buff[16], 3871edd16368SStephen M. Cameron sizeof(this_device->model)); 38727630b3a5SHannes Reinecke this_device->rev = inq_buff[2]; 3873edd16368SStephen M. Cameron memset(this_device->device_id, 0, 3874edd16368SStephen M. Cameron sizeof(this_device->device_id)); 38758383278dSScott Teel if (hpsa_get_device_id(h, scsi3addr, this_device->device_id, 8, 38768383278dSScott Teel sizeof(this_device->device_id))) 38778383278dSScott Teel dev_err(&h->pdev->dev, 38788383278dSScott Teel "hpsa%d: %s: can't get device id for host %d:C0:T%d:L%d\t%s\t%.16s\n", 38798383278dSScott Teel h->ctlr, __func__, 38808383278dSScott Teel h->scsi_host->host_no, 38818383278dSScott Teel this_device->target, this_device->lun, 38828383278dSScott Teel scsi_device_type(this_device->devtype), 38838383278dSScott Teel this_device->model); 3884edd16368SStephen M. Cameron 3885af15ed36SDon Brace if ((this_device->devtype == TYPE_DISK || 3886af15ed36SDon Brace this_device->devtype == TYPE_ZBC) && 3887283b4a9bSStephen M. Cameron is_logical_dev_addr_mode(scsi3addr)) { 388867955ba3SStephen M. Cameron int volume_offline; 388967955ba3SStephen M. Cameron 3890edd16368SStephen M. Cameron hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level); 3891283b4a9bSStephen M. Cameron if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC) 3892283b4a9bSStephen M. Cameron hpsa_get_ioaccel_status(h, scsi3addr, this_device); 389367955ba3SStephen M. Cameron volume_offline = hpsa_volume_offline(h, scsi3addr); 389467955ba3SStephen M. Cameron if (volume_offline < 0 || volume_offline > 0xff) 389567955ba3SStephen M. Cameron volume_offline = HPSA_VPD_LV_STATUS_UNSUPPORTED; 389667955ba3SStephen M. Cameron this_device->volume_offline = volume_offline & 0xff; 3897283b4a9bSStephen M. Cameron } else { 3898edd16368SStephen M. Cameron this_device->raid_level = RAID_UNKNOWN; 3899283b4a9bSStephen M. Cameron this_device->offload_config = 0; 3900283b4a9bSStephen M. Cameron this_device->offload_enabled = 0; 390141ce4c35SStephen Cameron this_device->offload_to_be_enabled = 0; 3902a3144e0bSJoe Handzik this_device->hba_ioaccel_enabled = 0; 39039846590eSStephen M. Cameron this_device->volume_offline = 0; 390403383736SDon Brace this_device->queue_depth = h->nr_cmds; 3905283b4a9bSStephen M. Cameron } 3906edd16368SStephen M. Cameron 39070b0e1d6cSStephen M. Cameron if (is_OBDR_device) { 39080b0e1d6cSStephen M. Cameron /* See if this is a One-Button-Disaster-Recovery device 39090b0e1d6cSStephen M. Cameron * by looking for "$DR-10" at offset 43 in inquiry data. 39100b0e1d6cSStephen M. Cameron */ 39110b0e1d6cSStephen M. Cameron obdr_sig = &inq_buff[OBDR_SIG_OFFSET]; 39120b0e1d6cSStephen M. Cameron *is_OBDR_device = (this_device->devtype == TYPE_ROM && 39130b0e1d6cSStephen M. Cameron strncmp(obdr_sig, OBDR_TAPE_SIG, 39140b0e1d6cSStephen M. Cameron OBDR_SIG_LEN) == 0); 39150b0e1d6cSStephen M. Cameron } 3916edd16368SStephen M. Cameron kfree(inq_buff); 3917edd16368SStephen M. Cameron return 0; 3918edd16368SStephen M. Cameron 3919edd16368SStephen M. Cameron bail_out: 3920edd16368SStephen M. Cameron kfree(inq_buff); 3921683fc444SDon Brace return rc; 3922edd16368SStephen M. Cameron } 3923edd16368SStephen M. Cameron 39249b5c48c2SStephen Cameron static void hpsa_update_device_supports_aborts(struct ctlr_info *h, 39259b5c48c2SStephen Cameron struct hpsa_scsi_dev_t *dev, u8 *scsi3addr) 39269b5c48c2SStephen Cameron { 39279b5c48c2SStephen Cameron unsigned long flags; 39289b5c48c2SStephen Cameron int rc, entry; 39299b5c48c2SStephen Cameron /* 39309b5c48c2SStephen Cameron * See if this device supports aborts. If we already know 39319b5c48c2SStephen Cameron * the device, we already know if it supports aborts, otherwise 39329b5c48c2SStephen Cameron * we have to find out if it supports aborts by trying one. 39339b5c48c2SStephen Cameron */ 39349b5c48c2SStephen Cameron spin_lock_irqsave(&h->devlock, flags); 39359b5c48c2SStephen Cameron rc = hpsa_scsi_find_entry(dev, h->dev, h->ndevices, &entry); 39369b5c48c2SStephen Cameron if ((rc == DEVICE_SAME || rc == DEVICE_UPDATED) && 39379b5c48c2SStephen Cameron entry >= 0 && entry < h->ndevices) { 39389b5c48c2SStephen Cameron dev->supports_aborts = h->dev[entry]->supports_aborts; 39399b5c48c2SStephen Cameron spin_unlock_irqrestore(&h->devlock, flags); 39409b5c48c2SStephen Cameron } else { 39419b5c48c2SStephen Cameron spin_unlock_irqrestore(&h->devlock, flags); 39429b5c48c2SStephen Cameron dev->supports_aborts = 39439b5c48c2SStephen Cameron hpsa_device_supports_aborts(h, scsi3addr); 39449b5c48c2SStephen Cameron if (dev->supports_aborts < 0) 39459b5c48c2SStephen Cameron dev->supports_aborts = 0; 39469b5c48c2SStephen Cameron } 39479b5c48c2SStephen Cameron } 39489b5c48c2SStephen Cameron 3949c795505aSKevin Barnett /* 3950c795505aSKevin Barnett * Helper function to assign bus, target, lun mapping of devices. 3951edd16368SStephen M. Cameron * Logical drive target and lun are assigned at this time, but 3952edd16368SStephen M. Cameron * physical device lun and target assignment are deferred (assigned 3953edd16368SStephen M. Cameron * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.) 3954edd16368SStephen M. Cameron */ 3955edd16368SStephen M. Cameron static void figure_bus_target_lun(struct ctlr_info *h, 39561f310bdeSStephen M. Cameron u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device) 3957edd16368SStephen M. Cameron { 3958c795505aSKevin Barnett u32 lunid = get_unaligned_le32(lunaddrbytes); 3959edd16368SStephen M. Cameron 39601f310bdeSStephen M. Cameron if (!is_logical_dev_addr_mode(lunaddrbytes)) { 39611f310bdeSStephen M. Cameron /* physical device, target and lun filled in later */ 39627630b3a5SHannes Reinecke if (is_hba_lunid(lunaddrbytes)) { 39637630b3a5SHannes Reinecke int bus = HPSA_HBA_BUS; 39647630b3a5SHannes Reinecke 39657630b3a5SHannes Reinecke if (!device->rev) 39667630b3a5SHannes Reinecke bus = HPSA_LEGACY_HBA_BUS; 3967c795505aSKevin Barnett hpsa_set_bus_target_lun(device, 39687630b3a5SHannes Reinecke bus, 0, lunid & 0x3fff); 39697630b3a5SHannes Reinecke } else 39701f310bdeSStephen M. Cameron /* defer target, lun assignment for physical devices */ 3971c795505aSKevin Barnett hpsa_set_bus_target_lun(device, 3972c795505aSKevin Barnett HPSA_PHYSICAL_DEVICE_BUS, -1, -1); 39731f310bdeSStephen M. Cameron return; 39741f310bdeSStephen M. Cameron } 39751f310bdeSStephen M. Cameron /* It's a logical device */ 397666749d0dSScott Teel if (device->external) { 39771f310bdeSStephen M. Cameron hpsa_set_bus_target_lun(device, 3978c795505aSKevin Barnett HPSA_EXTERNAL_RAID_VOLUME_BUS, (lunid >> 16) & 0x3fff, 3979c795505aSKevin Barnett lunid & 0x00ff); 39801f310bdeSStephen M. Cameron return; 3981339b2b14SStephen M. Cameron } 3982c795505aSKevin Barnett hpsa_set_bus_target_lun(device, HPSA_RAID_VOLUME_BUS, 3983c795505aSKevin Barnett 0, lunid & 0x3fff); 3984edd16368SStephen M. Cameron } 3985edd16368SStephen M. Cameron 3986edd16368SStephen M. Cameron 3987edd16368SStephen M. Cameron /* 398854b6e9e9SScott Teel * Get address of physical disk used for an ioaccel2 mode command: 398954b6e9e9SScott Teel * 1. Extract ioaccel2 handle from the command. 399054b6e9e9SScott Teel * 2. Find a matching ioaccel2 handle from list of physical disks. 399154b6e9e9SScott Teel * 3. Return: 399254b6e9e9SScott Teel * 1 and set scsi3addr to address of matching physical 399354b6e9e9SScott Teel * 0 if no matching physical disk was found. 399454b6e9e9SScott Teel */ 399554b6e9e9SScott Teel static int hpsa_get_pdisk_of_ioaccel2(struct ctlr_info *h, 399654b6e9e9SScott Teel struct CommandList *ioaccel2_cmd_to_abort, unsigned char *scsi3addr) 399754b6e9e9SScott Teel { 399841ce4c35SStephen Cameron struct io_accel2_cmd *c2 = 399941ce4c35SStephen Cameron &h->ioaccel2_cmd_pool[ioaccel2_cmd_to_abort->cmdindex]; 400041ce4c35SStephen Cameron unsigned long flags; 400154b6e9e9SScott Teel int i; 400254b6e9e9SScott Teel 400341ce4c35SStephen Cameron spin_lock_irqsave(&h->devlock, flags); 400441ce4c35SStephen Cameron for (i = 0; i < h->ndevices; i++) 400541ce4c35SStephen Cameron if (h->dev[i]->ioaccel_handle == le32_to_cpu(c2->scsi_nexus)) { 400641ce4c35SStephen Cameron memcpy(scsi3addr, h->dev[i]->scsi3addr, 400741ce4c35SStephen Cameron sizeof(h->dev[i]->scsi3addr)); 400841ce4c35SStephen Cameron spin_unlock_irqrestore(&h->devlock, flags); 400954b6e9e9SScott Teel return 1; 401054b6e9e9SScott Teel } 401141ce4c35SStephen Cameron spin_unlock_irqrestore(&h->devlock, flags); 401241ce4c35SStephen Cameron return 0; 401341ce4c35SStephen Cameron } 401441ce4c35SStephen Cameron 401566749d0dSScott Teel static int figure_external_status(struct ctlr_info *h, int raid_ctlr_position, 401666749d0dSScott Teel int i, int nphysicals, int nlocal_logicals) 401766749d0dSScott Teel { 401866749d0dSScott Teel /* In report logicals, local logicals are listed first, 401966749d0dSScott Teel * then any externals. 402066749d0dSScott Teel */ 402166749d0dSScott Teel int logicals_start = nphysicals + (raid_ctlr_position == 0); 402266749d0dSScott Teel 402366749d0dSScott Teel if (i == raid_ctlr_position) 402466749d0dSScott Teel return 0; 402566749d0dSScott Teel 402666749d0dSScott Teel if (i < logicals_start) 402766749d0dSScott Teel return 0; 402866749d0dSScott Teel 402966749d0dSScott Teel /* i is in logicals range, but still within local logicals */ 403066749d0dSScott Teel if ((i - nphysicals - (raid_ctlr_position == 0)) < nlocal_logicals) 403166749d0dSScott Teel return 0; 403266749d0dSScott Teel 403366749d0dSScott Teel return 1; /* it's an external lun */ 403466749d0dSScott Teel } 403566749d0dSScott Teel 403654b6e9e9SScott Teel /* 4037edd16368SStephen M. Cameron * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev, 4038edd16368SStephen M. Cameron * logdev. The number of luns in physdev and logdev are returned in 4039edd16368SStephen M. Cameron * *nphysicals and *nlogicals, respectively. 4040edd16368SStephen M. Cameron * Returns 0 on success, -1 otherwise. 4041edd16368SStephen M. Cameron */ 4042edd16368SStephen M. Cameron static int hpsa_gather_lun_info(struct ctlr_info *h, 404303383736SDon Brace struct ReportExtendedLUNdata *physdev, u32 *nphysicals, 404401a02ffcSStephen M. Cameron struct ReportLUNdata *logdev, u32 *nlogicals) 4045edd16368SStephen M. Cameron { 404603383736SDon Brace if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) { 4047edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 4048edd16368SStephen M. Cameron return -1; 4049edd16368SStephen M. Cameron } 405003383736SDon Brace *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24; 4051edd16368SStephen M. Cameron if (*nphysicals > HPSA_MAX_PHYS_LUN) { 405203383736SDon Brace dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n", 405303383736SDon Brace HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN); 4054edd16368SStephen M. Cameron *nphysicals = HPSA_MAX_PHYS_LUN; 4055edd16368SStephen M. Cameron } 405603383736SDon Brace if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) { 4057edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "report logical LUNs failed.\n"); 4058edd16368SStephen M. Cameron return -1; 4059edd16368SStephen M. Cameron } 40606df1e954SStephen M. Cameron *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8; 4061edd16368SStephen M. Cameron /* Reject Logicals in excess of our max capability. */ 4062edd16368SStephen M. Cameron if (*nlogicals > HPSA_MAX_LUN) { 4063edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 4064edd16368SStephen M. Cameron "maximum logical LUNs (%d) exceeded. " 4065edd16368SStephen M. Cameron "%d LUNs ignored.\n", HPSA_MAX_LUN, 4066edd16368SStephen M. Cameron *nlogicals - HPSA_MAX_LUN); 4067edd16368SStephen M. Cameron *nlogicals = HPSA_MAX_LUN; 4068edd16368SStephen M. Cameron } 4069edd16368SStephen M. Cameron if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) { 4070edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 4071edd16368SStephen M. Cameron "maximum logical + physical LUNs (%d) exceeded. " 4072edd16368SStephen M. Cameron "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN, 4073edd16368SStephen M. Cameron *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN); 4074edd16368SStephen M. Cameron *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals; 4075edd16368SStephen M. Cameron } 4076edd16368SStephen M. Cameron return 0; 4077edd16368SStephen M. Cameron } 4078edd16368SStephen M. Cameron 407942a91641SDon Brace static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, 408042a91641SDon Brace int i, int nphysicals, int nlogicals, 4081a93aa1feSMatt Gates struct ReportExtendedLUNdata *physdev_list, 4082339b2b14SStephen M. Cameron struct ReportLUNdata *logdev_list) 4083339b2b14SStephen M. Cameron { 4084339b2b14SStephen M. Cameron /* Helper function, figure out where the LUN ID info is coming from 4085339b2b14SStephen M. Cameron * given index i, lists of physical and logical devices, where in 4086339b2b14SStephen M. Cameron * the list the raid controller is supposed to appear (first or last) 4087339b2b14SStephen M. Cameron */ 4088339b2b14SStephen M. Cameron 4089339b2b14SStephen M. Cameron int logicals_start = nphysicals + (raid_ctlr_position == 0); 4090339b2b14SStephen M. Cameron int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0); 4091339b2b14SStephen M. Cameron 4092339b2b14SStephen M. Cameron if (i == raid_ctlr_position) 4093339b2b14SStephen M. Cameron return RAID_CTLR_LUNID; 4094339b2b14SStephen M. Cameron 4095339b2b14SStephen M. Cameron if (i < logicals_start) 4096d5b5d964SStephen M. Cameron return &physdev_list->LUN[i - 4097d5b5d964SStephen M. Cameron (raid_ctlr_position == 0)].lunid[0]; 4098339b2b14SStephen M. Cameron 4099339b2b14SStephen M. Cameron if (i < last_device) 4100339b2b14SStephen M. Cameron return &logdev_list->LUN[i - nphysicals - 4101339b2b14SStephen M. Cameron (raid_ctlr_position == 0)][0]; 4102339b2b14SStephen M. Cameron BUG(); 4103339b2b14SStephen M. Cameron return NULL; 4104339b2b14SStephen M. Cameron } 4105339b2b14SStephen M. Cameron 410603383736SDon Brace /* get physical drive ioaccel handle and queue depth */ 410703383736SDon Brace static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h, 410803383736SDon Brace struct hpsa_scsi_dev_t *dev, 4109f2039b03SDon Brace struct ReportExtendedLUNdata *rlep, int rle_index, 411003383736SDon Brace struct bmic_identify_physical_device *id_phys) 411103383736SDon Brace { 411203383736SDon Brace int rc; 41134b6e5597SScott Teel struct ext_report_lun_entry *rle; 41144b6e5597SScott Teel 41154b6e5597SScott Teel /* 41164b6e5597SScott Teel * external targets don't support BMIC 41174b6e5597SScott Teel */ 41184b6e5597SScott Teel if (dev->external) { 41194b6e5597SScott Teel dev->queue_depth = 7; 41204b6e5597SScott Teel return; 41214b6e5597SScott Teel } 41224b6e5597SScott Teel 41234b6e5597SScott Teel rle = &rlep->LUN[rle_index]; 412403383736SDon Brace 412503383736SDon Brace dev->ioaccel_handle = rle->ioaccel_handle; 4126f2039b03SDon Brace if ((rle->device_flags & 0x08) && dev->ioaccel_handle) 4127a3144e0bSJoe Handzik dev->hba_ioaccel_enabled = 1; 412803383736SDon Brace memset(id_phys, 0, sizeof(*id_phys)); 4129f2039b03SDon Brace rc = hpsa_bmic_id_physical_device(h, &rle->lunid[0], 4130f2039b03SDon Brace GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]), id_phys, 413103383736SDon Brace sizeof(*id_phys)); 413203383736SDon Brace if (!rc) 413303383736SDon Brace /* Reserve space for FW operations */ 413403383736SDon Brace #define DRIVE_CMDS_RESERVED_FOR_FW 2 413503383736SDon Brace #define DRIVE_QUEUE_DEPTH 7 413603383736SDon Brace dev->queue_depth = 413703383736SDon Brace le16_to_cpu(id_phys->current_queue_depth_limit) - 413803383736SDon Brace DRIVE_CMDS_RESERVED_FOR_FW; 413903383736SDon Brace else 414003383736SDon Brace dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */ 414103383736SDon Brace } 414203383736SDon Brace 41438270b862SJoe Handzik static void hpsa_get_path_info(struct hpsa_scsi_dev_t *this_device, 4144f2039b03SDon Brace struct ReportExtendedLUNdata *rlep, int rle_index, 41458270b862SJoe Handzik struct bmic_identify_physical_device *id_phys) 41468270b862SJoe Handzik { 4147f2039b03SDon Brace struct ext_report_lun_entry *rle = &rlep->LUN[rle_index]; 4148f2039b03SDon Brace 4149f2039b03SDon Brace if ((rle->device_flags & 0x08) && this_device->ioaccel_handle) 41508270b862SJoe Handzik this_device->hba_ioaccel_enabled = 1; 41518270b862SJoe Handzik 41528270b862SJoe Handzik memcpy(&this_device->active_path_index, 41538270b862SJoe Handzik &id_phys->active_path_number, 41548270b862SJoe Handzik sizeof(this_device->active_path_index)); 41558270b862SJoe Handzik memcpy(&this_device->path_map, 41568270b862SJoe Handzik &id_phys->redundant_path_present_map, 41578270b862SJoe Handzik sizeof(this_device->path_map)); 41588270b862SJoe Handzik memcpy(&this_device->box, 41598270b862SJoe Handzik &id_phys->alternate_paths_phys_box_on_port, 41608270b862SJoe Handzik sizeof(this_device->box)); 41618270b862SJoe Handzik memcpy(&this_device->phys_connector, 41628270b862SJoe Handzik &id_phys->alternate_paths_phys_connector, 41638270b862SJoe Handzik sizeof(this_device->phys_connector)); 41648270b862SJoe Handzik memcpy(&this_device->bay, 41658270b862SJoe Handzik &id_phys->phys_bay_in_box, 41668270b862SJoe Handzik sizeof(this_device->bay)); 41678270b862SJoe Handzik } 41688270b862SJoe Handzik 416966749d0dSScott Teel /* get number of local logical disks. */ 417066749d0dSScott Teel static int hpsa_set_local_logical_count(struct ctlr_info *h, 417166749d0dSScott Teel struct bmic_identify_controller *id_ctlr, 417266749d0dSScott Teel u32 *nlocals) 417366749d0dSScott Teel { 417466749d0dSScott Teel int rc; 417566749d0dSScott Teel 417666749d0dSScott Teel if (!id_ctlr) { 417766749d0dSScott Teel dev_warn(&h->pdev->dev, "%s: id_ctlr buffer is NULL.\n", 417866749d0dSScott Teel __func__); 417966749d0dSScott Teel return -ENOMEM; 418066749d0dSScott Teel } 418166749d0dSScott Teel memset(id_ctlr, 0, sizeof(*id_ctlr)); 418266749d0dSScott Teel rc = hpsa_bmic_id_controller(h, id_ctlr, sizeof(*id_ctlr)); 418366749d0dSScott Teel if (!rc) 418466749d0dSScott Teel if (id_ctlr->configured_logical_drive_count < 256) 418566749d0dSScott Teel *nlocals = id_ctlr->configured_logical_drive_count; 418666749d0dSScott Teel else 418766749d0dSScott Teel *nlocals = le16_to_cpu( 418866749d0dSScott Teel id_ctlr->extended_logical_unit_count); 418966749d0dSScott Teel else 419066749d0dSScott Teel *nlocals = -1; 419166749d0dSScott Teel return rc; 419266749d0dSScott Teel } 419366749d0dSScott Teel 419464ce60caSDon Brace static bool hpsa_is_disk_spare(struct ctlr_info *h, u8 *lunaddrbytes) 419564ce60caSDon Brace { 419664ce60caSDon Brace struct bmic_identify_physical_device *id_phys; 419764ce60caSDon Brace bool is_spare = false; 419864ce60caSDon Brace int rc; 419964ce60caSDon Brace 420064ce60caSDon Brace id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 420164ce60caSDon Brace if (!id_phys) 420264ce60caSDon Brace return false; 420364ce60caSDon Brace 420464ce60caSDon Brace rc = hpsa_bmic_id_physical_device(h, 420564ce60caSDon Brace lunaddrbytes, 420664ce60caSDon Brace GET_BMIC_DRIVE_NUMBER(lunaddrbytes), 420764ce60caSDon Brace id_phys, sizeof(*id_phys)); 420864ce60caSDon Brace if (rc == 0) 420964ce60caSDon Brace is_spare = (id_phys->more_flags >> 6) & 0x01; 421064ce60caSDon Brace 421164ce60caSDon Brace kfree(id_phys); 421264ce60caSDon Brace return is_spare; 421364ce60caSDon Brace } 421464ce60caSDon Brace 421564ce60caSDon Brace #define RPL_DEV_FLAG_NON_DISK 0x1 421664ce60caSDon Brace #define RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED 0x2 421764ce60caSDon Brace #define RPL_DEV_FLAG_UNCONFIG_DISK 0x4 421864ce60caSDon Brace 421964ce60caSDon Brace #define BMIC_DEVICE_TYPE_ENCLOSURE 6 422064ce60caSDon Brace 422164ce60caSDon Brace static bool hpsa_skip_device(struct ctlr_info *h, u8 *lunaddrbytes, 422264ce60caSDon Brace struct ext_report_lun_entry *rle) 422364ce60caSDon Brace { 422464ce60caSDon Brace u8 device_flags; 422564ce60caSDon Brace u8 device_type; 422664ce60caSDon Brace 422764ce60caSDon Brace if (!MASKED_DEVICE(lunaddrbytes)) 422864ce60caSDon Brace return false; 422964ce60caSDon Brace 423064ce60caSDon Brace device_flags = rle->device_flags; 423164ce60caSDon Brace device_type = rle->device_type; 423264ce60caSDon Brace 423364ce60caSDon Brace if (device_flags & RPL_DEV_FLAG_NON_DISK) { 423464ce60caSDon Brace if (device_type == BMIC_DEVICE_TYPE_ENCLOSURE) 423564ce60caSDon Brace return false; 423664ce60caSDon Brace return true; 423764ce60caSDon Brace } 423864ce60caSDon Brace 423964ce60caSDon Brace if (!(device_flags & RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED)) 424064ce60caSDon Brace return false; 424164ce60caSDon Brace 424264ce60caSDon Brace if (device_flags & RPL_DEV_FLAG_UNCONFIG_DISK) 424364ce60caSDon Brace return false; 424464ce60caSDon Brace 424564ce60caSDon Brace /* 424664ce60caSDon Brace * Spares may be spun down, we do not want to 424764ce60caSDon Brace * do an Inquiry to a RAID set spare drive as 424864ce60caSDon Brace * that would have them spun up, that is a 424964ce60caSDon Brace * performance hit because I/O to the RAID device 425064ce60caSDon Brace * stops while the spin up occurs which can take 425164ce60caSDon Brace * over 50 seconds. 425264ce60caSDon Brace */ 425364ce60caSDon Brace if (hpsa_is_disk_spare(h, lunaddrbytes)) 425464ce60caSDon Brace return true; 425564ce60caSDon Brace 425664ce60caSDon Brace return false; 425764ce60caSDon Brace } 425866749d0dSScott Teel 42598aa60681SDon Brace static void hpsa_update_scsi_devices(struct ctlr_info *h) 4260edd16368SStephen M. Cameron { 4261edd16368SStephen M. Cameron /* the idea here is we could get notified 4262edd16368SStephen M. Cameron * that some devices have changed, so we do a report 4263edd16368SStephen M. Cameron * physical luns and report logical luns cmd, and adjust 4264edd16368SStephen M. Cameron * our list of devices accordingly. 4265edd16368SStephen M. Cameron * 4266edd16368SStephen M. Cameron * The scsi3addr's of devices won't change so long as the 4267edd16368SStephen M. Cameron * adapter is not reset. That means we can rescan and 4268edd16368SStephen M. Cameron * tell which devices we already know about, vs. new 4269edd16368SStephen M. Cameron * devices, vs. disappearing devices. 4270edd16368SStephen M. Cameron */ 4271a93aa1feSMatt Gates struct ReportExtendedLUNdata *physdev_list = NULL; 4272edd16368SStephen M. Cameron struct ReportLUNdata *logdev_list = NULL; 427303383736SDon Brace struct bmic_identify_physical_device *id_phys = NULL; 427466749d0dSScott Teel struct bmic_identify_controller *id_ctlr = NULL; 427501a02ffcSStephen M. Cameron u32 nphysicals = 0; 427601a02ffcSStephen M. Cameron u32 nlogicals = 0; 427766749d0dSScott Teel u32 nlocal_logicals = 0; 427801a02ffcSStephen M. Cameron u32 ndev_allocated = 0; 4279edd16368SStephen M. Cameron struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice; 4280edd16368SStephen M. Cameron int ncurrent = 0; 42814f4eb9f1SScott Teel int i, n_ext_target_devs, ndevs_to_allocate; 4282339b2b14SStephen M. Cameron int raid_ctlr_position; 428304fa2f44SKevin Barnett bool physical_device; 4284aca4a520SScott Teel DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS); 4285edd16368SStephen M. Cameron 4286cfe5badcSScott Teel currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL); 428792084715SStephen M. Cameron physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL); 428892084715SStephen M. Cameron logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL); 4289edd16368SStephen M. Cameron tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL); 429003383736SDon Brace id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 429166749d0dSScott Teel id_ctlr = kzalloc(sizeof(*id_ctlr), GFP_KERNEL); 4292edd16368SStephen M. Cameron 429303383736SDon Brace if (!currentsd || !physdev_list || !logdev_list || 429466749d0dSScott Teel !tmpdevice || !id_phys || !id_ctlr) { 4295edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "out of memory\n"); 4296edd16368SStephen M. Cameron goto out; 4297edd16368SStephen M. Cameron } 4298edd16368SStephen M. Cameron memset(lunzerobits, 0, sizeof(lunzerobits)); 4299edd16368SStephen M. Cameron 4300853633e8SDon Brace h->drv_req_rescan = 0; /* cancel scheduled rescan - we're doing it. */ 4301853633e8SDon Brace 430203383736SDon Brace if (hpsa_gather_lun_info(h, physdev_list, &nphysicals, 4303853633e8SDon Brace logdev_list, &nlogicals)) { 4304853633e8SDon Brace h->drv_req_rescan = 1; 4305edd16368SStephen M. Cameron goto out; 4306853633e8SDon Brace } 4307edd16368SStephen M. Cameron 430866749d0dSScott Teel /* Set number of local logicals (non PTRAID) */ 430966749d0dSScott Teel if (hpsa_set_local_logical_count(h, id_ctlr, &nlocal_logicals)) { 431066749d0dSScott Teel dev_warn(&h->pdev->dev, 431166749d0dSScott Teel "%s: Can't determine number of local logical devices.\n", 431266749d0dSScott Teel __func__); 431366749d0dSScott Teel } 4314edd16368SStephen M. Cameron 4315aca4a520SScott Teel /* We might see up to the maximum number of logical and physical disks 4316aca4a520SScott Teel * plus external target devices, and a device for the local RAID 4317aca4a520SScott Teel * controller. 4318edd16368SStephen M. Cameron */ 4319aca4a520SScott Teel ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1; 4320edd16368SStephen M. Cameron 4321edd16368SStephen M. Cameron /* Allocate the per device structures */ 4322edd16368SStephen M. Cameron for (i = 0; i < ndevs_to_allocate; i++) { 4323b7ec021fSScott Teel if (i >= HPSA_MAX_DEVICES) { 4324b7ec021fSScott Teel dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded." 4325b7ec021fSScott Teel " %d devices ignored.\n", HPSA_MAX_DEVICES, 4326b7ec021fSScott Teel ndevs_to_allocate - HPSA_MAX_DEVICES); 4327b7ec021fSScott Teel break; 4328b7ec021fSScott Teel } 4329b7ec021fSScott Teel 4330edd16368SStephen M. Cameron currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL); 4331edd16368SStephen M. Cameron if (!currentsd[i]) { 4332853633e8SDon Brace h->drv_req_rescan = 1; 4333edd16368SStephen M. Cameron goto out; 4334edd16368SStephen M. Cameron } 4335edd16368SStephen M. Cameron ndev_allocated++; 4336edd16368SStephen M. Cameron } 4337edd16368SStephen M. Cameron 43388645291bSStephen M. Cameron if (is_scsi_rev_5(h)) 4339339b2b14SStephen M. Cameron raid_ctlr_position = 0; 4340339b2b14SStephen M. Cameron else 4341339b2b14SStephen M. Cameron raid_ctlr_position = nphysicals + nlogicals; 4342339b2b14SStephen M. Cameron 4343edd16368SStephen M. Cameron /* adjust our table of devices */ 43444f4eb9f1SScott Teel n_ext_target_devs = 0; 4345edd16368SStephen M. Cameron for (i = 0; i < nphysicals + nlogicals + 1; i++) { 43460b0e1d6cSStephen M. Cameron u8 *lunaddrbytes, is_OBDR = 0; 4347683fc444SDon Brace int rc = 0; 4348f2039b03SDon Brace int phys_dev_index = i - (raid_ctlr_position == 0); 434964ce60caSDon Brace bool skip_device = false; 4350edd16368SStephen M. Cameron 435104fa2f44SKevin Barnett physical_device = i < nphysicals + (raid_ctlr_position == 0); 4352edd16368SStephen M. Cameron 4353edd16368SStephen M. Cameron /* Figure out where the LUN ID info is coming from */ 4354339b2b14SStephen M. Cameron lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position, 4355339b2b14SStephen M. Cameron i, nphysicals, nlogicals, physdev_list, logdev_list); 435641ce4c35SStephen Cameron 435786cf7130SDon Brace /* Determine if this is a lun from an external target array */ 435886cf7130SDon Brace tmpdevice->external = 435986cf7130SDon Brace figure_external_status(h, raid_ctlr_position, i, 436086cf7130SDon Brace nphysicals, nlocal_logicals); 436186cf7130SDon Brace 436264ce60caSDon Brace /* 436364ce60caSDon Brace * Skip over some devices such as a spare. 436464ce60caSDon Brace */ 436564ce60caSDon Brace if (!tmpdevice->external && physical_device) { 436664ce60caSDon Brace skip_device = hpsa_skip_device(h, lunaddrbytes, 436764ce60caSDon Brace &physdev_list->LUN[phys_dev_index]); 436864ce60caSDon Brace if (skip_device) 4369edd16368SStephen M. Cameron continue; 437064ce60caSDon Brace } 4371edd16368SStephen M. Cameron 4372edd16368SStephen M. Cameron /* Get device type, vendor, model, device id */ 4373683fc444SDon Brace rc = hpsa_update_device_info(h, lunaddrbytes, tmpdevice, 4374683fc444SDon Brace &is_OBDR); 4375683fc444SDon Brace if (rc == -ENOMEM) { 4376683fc444SDon Brace dev_warn(&h->pdev->dev, 4377683fc444SDon Brace "Out of memory, rescan deferred.\n"); 4378853633e8SDon Brace h->drv_req_rescan = 1; 4379683fc444SDon Brace goto out; 4380853633e8SDon Brace } 4381683fc444SDon Brace if (rc) { 4382683fc444SDon Brace dev_warn(&h->pdev->dev, 4383683fc444SDon Brace "Inquiry failed, skipping device.\n"); 4384683fc444SDon Brace continue; 4385683fc444SDon Brace } 4386683fc444SDon Brace 43871f310bdeSStephen M. Cameron figure_bus_target_lun(h, lunaddrbytes, tmpdevice); 43889b5c48c2SStephen Cameron hpsa_update_device_supports_aborts(h, tmpdevice, lunaddrbytes); 4389edd16368SStephen M. Cameron this_device = currentsd[ncurrent]; 4390edd16368SStephen M. Cameron 439134592254SScott Teel /* Turn on discovery_polling if there are ext target devices. 439234592254SScott Teel * Event-based change notification is unreliable for those. 4393edd16368SStephen M. Cameron */ 439434592254SScott Teel if (!h->discovery_polling) { 439534592254SScott Teel if (tmpdevice->external) { 439634592254SScott Teel h->discovery_polling = 1; 439734592254SScott Teel dev_info(&h->pdev->dev, 439834592254SScott Teel "External target, activate discovery polling.\n"); 4399edd16368SStephen M. Cameron } 440034592254SScott Teel } 440134592254SScott Teel 4402edd16368SStephen M. Cameron 4403edd16368SStephen M. Cameron *this_device = *tmpdevice; 440404fa2f44SKevin Barnett this_device->physical_device = physical_device; 4405edd16368SStephen M. Cameron 440604fa2f44SKevin Barnett /* 440704fa2f44SKevin Barnett * Expose all devices except for physical devices that 440804fa2f44SKevin Barnett * are masked. 440904fa2f44SKevin Barnett */ 441004fa2f44SKevin Barnett if (MASKED_DEVICE(lunaddrbytes) && this_device->physical_device) 44112a168208SKevin Barnett this_device->expose_device = 0; 44122a168208SKevin Barnett else 44132a168208SKevin Barnett this_device->expose_device = 1; 441441ce4c35SStephen Cameron 4415d04e62b9SKevin Barnett 4416d04e62b9SKevin Barnett /* 4417d04e62b9SKevin Barnett * Get the SAS address for physical devices that are exposed. 4418d04e62b9SKevin Barnett */ 4419d04e62b9SKevin Barnett if (this_device->physical_device && this_device->expose_device) 4420d04e62b9SKevin Barnett hpsa_get_sas_address(h, lunaddrbytes, this_device); 4421edd16368SStephen M. Cameron 4422edd16368SStephen M. Cameron switch (this_device->devtype) { 44230b0e1d6cSStephen M. Cameron case TYPE_ROM: 4424edd16368SStephen M. Cameron /* We don't *really* support actual CD-ROM devices, 4425edd16368SStephen M. Cameron * just "One Button Disaster Recovery" tape drive 4426edd16368SStephen M. Cameron * which temporarily pretends to be a CD-ROM drive. 4427edd16368SStephen M. Cameron * So we check that the device is really an OBDR tape 4428edd16368SStephen M. Cameron * device by checking for "$DR-10" in bytes 43-48 of 4429edd16368SStephen M. Cameron * the inquiry data. 4430edd16368SStephen M. Cameron */ 44310b0e1d6cSStephen M. Cameron if (is_OBDR) 4432edd16368SStephen M. Cameron ncurrent++; 4433edd16368SStephen M. Cameron break; 4434edd16368SStephen M. Cameron case TYPE_DISK: 4435af15ed36SDon Brace case TYPE_ZBC: 443604fa2f44SKevin Barnett if (this_device->physical_device) { 4437b9092b79SKevin Barnett /* The disk is in HBA mode. */ 4438b9092b79SKevin Barnett /* Never use RAID mapper in HBA mode. */ 4439ecf418d1SJoe Handzik this_device->offload_enabled = 0; 444003383736SDon Brace hpsa_get_ioaccel_drive_info(h, this_device, 4441f2039b03SDon Brace physdev_list, phys_dev_index, id_phys); 4442f2039b03SDon Brace hpsa_get_path_info(this_device, 4443f2039b03SDon Brace physdev_list, phys_dev_index, id_phys); 4444b9092b79SKevin Barnett } 4445edd16368SStephen M. Cameron ncurrent++; 4446edd16368SStephen M. Cameron break; 4447edd16368SStephen M. Cameron case TYPE_TAPE: 4448edd16368SStephen M. Cameron case TYPE_MEDIUM_CHANGER: 4449cca8f13bSDon Brace ncurrent++; 4450cca8f13bSDon Brace break; 445141ce4c35SStephen Cameron case TYPE_ENCLOSURE: 445217a9e54aSDon Brace if (!this_device->external) 4453cca8f13bSDon Brace hpsa_get_enclosure_info(h, lunaddrbytes, 4454cca8f13bSDon Brace physdev_list, phys_dev_index, 4455cca8f13bSDon Brace this_device); 445641ce4c35SStephen Cameron ncurrent++; 445741ce4c35SStephen Cameron break; 4458edd16368SStephen M. Cameron case TYPE_RAID: 4459edd16368SStephen M. Cameron /* Only present the Smartarray HBA as a RAID controller. 4460edd16368SStephen M. Cameron * If it's a RAID controller other than the HBA itself 4461edd16368SStephen M. Cameron * (an external RAID controller, MSA500 or similar) 4462edd16368SStephen M. Cameron * don't present it. 4463edd16368SStephen M. Cameron */ 4464edd16368SStephen M. Cameron if (!is_hba_lunid(lunaddrbytes)) 4465edd16368SStephen M. Cameron break; 4466edd16368SStephen M. Cameron ncurrent++; 4467edd16368SStephen M. Cameron break; 4468edd16368SStephen M. Cameron default: 4469edd16368SStephen M. Cameron break; 4470edd16368SStephen M. Cameron } 4471cfe5badcSScott Teel if (ncurrent >= HPSA_MAX_DEVICES) 4472edd16368SStephen M. Cameron break; 4473edd16368SStephen M. Cameron } 4474d04e62b9SKevin Barnett 4475d04e62b9SKevin Barnett if (h->sas_host == NULL) { 4476d04e62b9SKevin Barnett int rc = 0; 4477d04e62b9SKevin Barnett 4478d04e62b9SKevin Barnett rc = hpsa_add_sas_host(h); 4479d04e62b9SKevin Barnett if (rc) { 4480d04e62b9SKevin Barnett dev_warn(&h->pdev->dev, 4481d04e62b9SKevin Barnett "Could not add sas host %d\n", rc); 4482d04e62b9SKevin Barnett goto out; 4483d04e62b9SKevin Barnett } 4484d04e62b9SKevin Barnett } 4485d04e62b9SKevin Barnett 44868aa60681SDon Brace adjust_hpsa_scsi_table(h, currentsd, ncurrent); 4487edd16368SStephen M. Cameron out: 4488edd16368SStephen M. Cameron kfree(tmpdevice); 4489edd16368SStephen M. Cameron for (i = 0; i < ndev_allocated; i++) 4490edd16368SStephen M. Cameron kfree(currentsd[i]); 4491edd16368SStephen M. Cameron kfree(currentsd); 4492edd16368SStephen M. Cameron kfree(physdev_list); 4493edd16368SStephen M. Cameron kfree(logdev_list); 449466749d0dSScott Teel kfree(id_ctlr); 449503383736SDon Brace kfree(id_phys); 4496edd16368SStephen M. Cameron } 4497edd16368SStephen M. Cameron 4498ec5cbf04SWebb Scales static void hpsa_set_sg_descriptor(struct SGDescriptor *desc, 4499ec5cbf04SWebb Scales struct scatterlist *sg) 4500ec5cbf04SWebb Scales { 4501ec5cbf04SWebb Scales u64 addr64 = (u64) sg_dma_address(sg); 4502ec5cbf04SWebb Scales unsigned int len = sg_dma_len(sg); 4503ec5cbf04SWebb Scales 4504ec5cbf04SWebb Scales desc->Addr = cpu_to_le64(addr64); 4505ec5cbf04SWebb Scales desc->Len = cpu_to_le32(len); 4506ec5cbf04SWebb Scales desc->Ext = 0; 4507ec5cbf04SWebb Scales } 4508ec5cbf04SWebb Scales 4509c7ee65b3SWebb Scales /* 4510c7ee65b3SWebb Scales * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci 4511edd16368SStephen M. Cameron * dma mapping and fills in the scatter gather entries of the 4512edd16368SStephen M. Cameron * hpsa command, cp. 4513edd16368SStephen M. Cameron */ 451433a2ffceSStephen M. Cameron static int hpsa_scatter_gather(struct ctlr_info *h, 4515edd16368SStephen M. Cameron struct CommandList *cp, 4516edd16368SStephen M. Cameron struct scsi_cmnd *cmd) 4517edd16368SStephen M. Cameron { 4518edd16368SStephen M. Cameron struct scatterlist *sg; 4519b3a7ba7cSWebb Scales int use_sg, i, sg_limit, chained, last_sg; 452033a2ffceSStephen M. Cameron struct SGDescriptor *curr_sg; 4521edd16368SStephen M. Cameron 452233a2ffceSStephen M. Cameron BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 4523edd16368SStephen M. Cameron 4524edd16368SStephen M. Cameron use_sg = scsi_dma_map(cmd); 4525edd16368SStephen M. Cameron if (use_sg < 0) 4526edd16368SStephen M. Cameron return use_sg; 4527edd16368SStephen M. Cameron 4528edd16368SStephen M. Cameron if (!use_sg) 4529edd16368SStephen M. Cameron goto sglist_finished; 4530edd16368SStephen M. Cameron 4531b3a7ba7cSWebb Scales /* 4532b3a7ba7cSWebb Scales * If the number of entries is greater than the max for a single list, 4533b3a7ba7cSWebb Scales * then we have a chained list; we will set up all but one entry in the 4534b3a7ba7cSWebb Scales * first list (the last entry is saved for link information); 4535b3a7ba7cSWebb Scales * otherwise, we don't have a chained list and we'll set up at each of 4536b3a7ba7cSWebb Scales * the entries in the one list. 4537b3a7ba7cSWebb Scales */ 453833a2ffceSStephen M. Cameron curr_sg = cp->SG; 4539b3a7ba7cSWebb Scales chained = use_sg > h->max_cmd_sg_entries; 4540b3a7ba7cSWebb Scales sg_limit = chained ? h->max_cmd_sg_entries - 1 : use_sg; 4541b3a7ba7cSWebb Scales last_sg = scsi_sg_count(cmd) - 1; 4542b3a7ba7cSWebb Scales scsi_for_each_sg(cmd, sg, sg_limit, i) { 4543ec5cbf04SWebb Scales hpsa_set_sg_descriptor(curr_sg, sg); 454433a2ffceSStephen M. Cameron curr_sg++; 454533a2ffceSStephen M. Cameron } 4546ec5cbf04SWebb Scales 4547b3a7ba7cSWebb Scales if (chained) { 4548b3a7ba7cSWebb Scales /* 4549b3a7ba7cSWebb Scales * Continue with the chained list. Set curr_sg to the chained 4550b3a7ba7cSWebb Scales * list. Modify the limit to the total count less the entries 4551b3a7ba7cSWebb Scales * we've already set up. Resume the scan at the list entry 4552b3a7ba7cSWebb Scales * where the previous loop left off. 4553b3a7ba7cSWebb Scales */ 4554b3a7ba7cSWebb Scales curr_sg = h->cmd_sg_list[cp->cmdindex]; 4555b3a7ba7cSWebb Scales sg_limit = use_sg - sg_limit; 4556b3a7ba7cSWebb Scales for_each_sg(sg, sg, sg_limit, i) { 4557b3a7ba7cSWebb Scales hpsa_set_sg_descriptor(curr_sg, sg); 4558b3a7ba7cSWebb Scales curr_sg++; 4559b3a7ba7cSWebb Scales } 4560b3a7ba7cSWebb Scales } 4561b3a7ba7cSWebb Scales 4562ec5cbf04SWebb Scales /* Back the pointer up to the last entry and mark it as "last". */ 4563b3a7ba7cSWebb Scales (curr_sg - 1)->Ext = cpu_to_le32(HPSA_SG_LAST); 456433a2ffceSStephen M. Cameron 456533a2ffceSStephen M. Cameron if (use_sg + chained > h->maxSG) 456633a2ffceSStephen M. Cameron h->maxSG = use_sg + chained; 456733a2ffceSStephen M. Cameron 456833a2ffceSStephen M. Cameron if (chained) { 456933a2ffceSStephen M. Cameron cp->Header.SGList = h->max_cmd_sg_entries; 457050a0decfSStephen M. Cameron cp->Header.SGTotal = cpu_to_le16(use_sg + 1); 4571e2bea6dfSStephen M. Cameron if (hpsa_map_sg_chain_block(h, cp)) { 4572e2bea6dfSStephen M. Cameron scsi_dma_unmap(cmd); 4573e2bea6dfSStephen M. Cameron return -1; 4574e2bea6dfSStephen M. Cameron } 457533a2ffceSStephen M. Cameron return 0; 4576edd16368SStephen M. Cameron } 4577edd16368SStephen M. Cameron 4578edd16368SStephen M. Cameron sglist_finished: 4579edd16368SStephen M. Cameron 458001a02ffcSStephen M. Cameron cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */ 4581c7ee65b3SWebb Scales cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */ 4582edd16368SStephen M. Cameron return 0; 4583edd16368SStephen M. Cameron } 4584edd16368SStephen M. Cameron 4585283b4a9bSStephen M. Cameron #define IO_ACCEL_INELIGIBLE (1) 4586283b4a9bSStephen M. Cameron static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len) 4587283b4a9bSStephen M. Cameron { 4588283b4a9bSStephen M. Cameron int is_write = 0; 4589283b4a9bSStephen M. Cameron u32 block; 4590283b4a9bSStephen M. Cameron u32 block_cnt; 4591283b4a9bSStephen M. Cameron 4592283b4a9bSStephen M. Cameron /* Perform some CDB fixups if needed using 10 byte reads/writes only */ 4593283b4a9bSStephen M. Cameron switch (cdb[0]) { 4594283b4a9bSStephen M. Cameron case WRITE_6: 4595283b4a9bSStephen M. Cameron case WRITE_12: 4596283b4a9bSStephen M. Cameron is_write = 1; 4597283b4a9bSStephen M. Cameron case READ_6: 4598283b4a9bSStephen M. Cameron case READ_12: 4599283b4a9bSStephen M. Cameron if (*cdb_len == 6) { 4600abbada71SMahesh Rajashekhara block = (((cdb[1] & 0x1F) << 16) | 4601abbada71SMahesh Rajashekhara (cdb[2] << 8) | 4602abbada71SMahesh Rajashekhara cdb[3]); 4603283b4a9bSStephen M. Cameron block_cnt = cdb[4]; 4604c8a6c9a6SDon Brace if (block_cnt == 0) 4605c8a6c9a6SDon Brace block_cnt = 256; 4606283b4a9bSStephen M. Cameron } else { 4607283b4a9bSStephen M. Cameron BUG_ON(*cdb_len != 12); 4608c8a6c9a6SDon Brace block = get_unaligned_be32(&cdb[2]); 4609c8a6c9a6SDon Brace block_cnt = get_unaligned_be32(&cdb[6]); 4610283b4a9bSStephen M. Cameron } 4611283b4a9bSStephen M. Cameron if (block_cnt > 0xffff) 4612283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 4613283b4a9bSStephen M. Cameron 4614283b4a9bSStephen M. Cameron cdb[0] = is_write ? WRITE_10 : READ_10; 4615283b4a9bSStephen M. Cameron cdb[1] = 0; 4616283b4a9bSStephen M. Cameron cdb[2] = (u8) (block >> 24); 4617283b4a9bSStephen M. Cameron cdb[3] = (u8) (block >> 16); 4618283b4a9bSStephen M. Cameron cdb[4] = (u8) (block >> 8); 4619283b4a9bSStephen M. Cameron cdb[5] = (u8) (block); 4620283b4a9bSStephen M. Cameron cdb[6] = 0; 4621283b4a9bSStephen M. Cameron cdb[7] = (u8) (block_cnt >> 8); 4622283b4a9bSStephen M. Cameron cdb[8] = (u8) (block_cnt); 4623283b4a9bSStephen M. Cameron cdb[9] = 0; 4624283b4a9bSStephen M. Cameron *cdb_len = 10; 4625283b4a9bSStephen M. Cameron break; 4626283b4a9bSStephen M. Cameron } 4627283b4a9bSStephen M. Cameron return 0; 4628283b4a9bSStephen M. Cameron } 4629283b4a9bSStephen M. Cameron 4630c349775eSScott Teel static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h, 4631283b4a9bSStephen M. Cameron struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 463203383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4633e1f7de0cSMatt Gates { 4634e1f7de0cSMatt Gates struct scsi_cmnd *cmd = c->scsi_cmd; 4635e1f7de0cSMatt Gates struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex]; 4636e1f7de0cSMatt Gates unsigned int len; 4637e1f7de0cSMatt Gates unsigned int total_len = 0; 4638e1f7de0cSMatt Gates struct scatterlist *sg; 4639e1f7de0cSMatt Gates u64 addr64; 4640e1f7de0cSMatt Gates int use_sg, i; 4641e1f7de0cSMatt Gates struct SGDescriptor *curr_sg; 4642e1f7de0cSMatt Gates u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE; 4643e1f7de0cSMatt Gates 4644283b4a9bSStephen M. Cameron /* TODO: implement chaining support */ 464503383736SDon Brace if (scsi_sg_count(cmd) > h->ioaccel_maxsg) { 464603383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4647283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 464803383736SDon Brace } 4649283b4a9bSStephen M. Cameron 4650e1f7de0cSMatt Gates BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX); 4651e1f7de0cSMatt Gates 465203383736SDon Brace if (fixup_ioaccel_cdb(cdb, &cdb_len)) { 465303383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4654283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 465503383736SDon Brace } 4656283b4a9bSStephen M. Cameron 4657e1f7de0cSMatt Gates c->cmd_type = CMD_IOACCEL1; 4658e1f7de0cSMatt Gates 4659e1f7de0cSMatt Gates /* Adjust the DMA address to point to the accelerated command buffer */ 4660e1f7de0cSMatt Gates c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle + 4661e1f7de0cSMatt Gates (c->cmdindex * sizeof(*cp)); 4662e1f7de0cSMatt Gates BUG_ON(c->busaddr & 0x0000007F); 4663e1f7de0cSMatt Gates 4664e1f7de0cSMatt Gates use_sg = scsi_dma_map(cmd); 466503383736SDon Brace if (use_sg < 0) { 466603383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4667e1f7de0cSMatt Gates return use_sg; 466803383736SDon Brace } 4669e1f7de0cSMatt Gates 4670e1f7de0cSMatt Gates if (use_sg) { 4671e1f7de0cSMatt Gates curr_sg = cp->SG; 4672e1f7de0cSMatt Gates scsi_for_each_sg(cmd, sg, use_sg, i) { 4673e1f7de0cSMatt Gates addr64 = (u64) sg_dma_address(sg); 4674e1f7de0cSMatt Gates len = sg_dma_len(sg); 4675e1f7de0cSMatt Gates total_len += len; 467650a0decfSStephen M. Cameron curr_sg->Addr = cpu_to_le64(addr64); 467750a0decfSStephen M. Cameron curr_sg->Len = cpu_to_le32(len); 467850a0decfSStephen M. Cameron curr_sg->Ext = cpu_to_le32(0); 4679e1f7de0cSMatt Gates curr_sg++; 4680e1f7de0cSMatt Gates } 468150a0decfSStephen M. Cameron (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST); 4682e1f7de0cSMatt Gates 4683e1f7de0cSMatt Gates switch (cmd->sc_data_direction) { 4684e1f7de0cSMatt Gates case DMA_TO_DEVICE: 4685e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_DATA_OUT; 4686e1f7de0cSMatt Gates break; 4687e1f7de0cSMatt Gates case DMA_FROM_DEVICE: 4688e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_DATA_IN; 4689e1f7de0cSMatt Gates break; 4690e1f7de0cSMatt Gates case DMA_NONE: 4691e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_NODATAXFER; 4692e1f7de0cSMatt Gates break; 4693e1f7de0cSMatt Gates default: 4694e1f7de0cSMatt Gates dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4695e1f7de0cSMatt Gates cmd->sc_data_direction); 4696e1f7de0cSMatt Gates BUG(); 4697e1f7de0cSMatt Gates break; 4698e1f7de0cSMatt Gates } 4699e1f7de0cSMatt Gates } else { 4700e1f7de0cSMatt Gates control |= IOACCEL1_CONTROL_NODATAXFER; 4701e1f7de0cSMatt Gates } 4702e1f7de0cSMatt Gates 4703c349775eSScott Teel c->Header.SGList = use_sg; 4704e1f7de0cSMatt Gates /* Fill out the command structure to submit */ 47052b08b3e9SDon Brace cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF); 47062b08b3e9SDon Brace cp->transfer_len = cpu_to_le32(total_len); 47072b08b3e9SDon Brace cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ | 47082b08b3e9SDon Brace (cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK)); 47092b08b3e9SDon Brace cp->control = cpu_to_le32(control); 4710283b4a9bSStephen M. Cameron memcpy(cp->CDB, cdb, cdb_len); 4711283b4a9bSStephen M. Cameron memcpy(cp->CISS_LUN, scsi3addr, 8); 4712c349775eSScott Teel /* Tag was already set at init time. */ 4713e1f7de0cSMatt Gates enqueue_cmd_and_start_io(h, c); 4714e1f7de0cSMatt Gates return 0; 4715e1f7de0cSMatt Gates } 4716edd16368SStephen M. Cameron 4717283b4a9bSStephen M. Cameron /* 4718283b4a9bSStephen M. Cameron * Queue a command directly to a device behind the controller using the 4719283b4a9bSStephen M. Cameron * I/O accelerator path. 4720283b4a9bSStephen M. Cameron */ 4721283b4a9bSStephen M. Cameron static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h, 4722283b4a9bSStephen M. Cameron struct CommandList *c) 4723283b4a9bSStephen M. Cameron { 4724283b4a9bSStephen M. Cameron struct scsi_cmnd *cmd = c->scsi_cmd; 4725283b4a9bSStephen M. Cameron struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4726283b4a9bSStephen M. Cameron 472745e596cdSDon Brace if (!dev) 472845e596cdSDon Brace return -1; 472945e596cdSDon Brace 473003383736SDon Brace c->phys_disk = dev; 473103383736SDon Brace 4732283b4a9bSStephen M. Cameron return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle, 473303383736SDon Brace cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev); 4734283b4a9bSStephen M. Cameron } 4735283b4a9bSStephen M. Cameron 4736dd0e19f3SScott Teel /* 4737dd0e19f3SScott Teel * Set encryption parameters for the ioaccel2 request 4738dd0e19f3SScott Teel */ 4739dd0e19f3SScott Teel static void set_encrypt_ioaccel2(struct ctlr_info *h, 4740dd0e19f3SScott Teel struct CommandList *c, struct io_accel2_cmd *cp) 4741dd0e19f3SScott Teel { 4742dd0e19f3SScott Teel struct scsi_cmnd *cmd = c->scsi_cmd; 4743dd0e19f3SScott Teel struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4744dd0e19f3SScott Teel struct raid_map_data *map = &dev->raid_map; 4745dd0e19f3SScott Teel u64 first_block; 4746dd0e19f3SScott Teel 4747dd0e19f3SScott Teel /* Are we doing encryption on this device */ 47482b08b3e9SDon Brace if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON)) 4749dd0e19f3SScott Teel return; 4750dd0e19f3SScott Teel /* Set the data encryption key index. */ 4751dd0e19f3SScott Teel cp->dekindex = map->dekindex; 4752dd0e19f3SScott Teel 4753dd0e19f3SScott Teel /* Set the encryption enable flag, encoded into direction field. */ 4754dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK; 4755dd0e19f3SScott Teel 4756dd0e19f3SScott Teel /* Set encryption tweak values based on logical block address 4757dd0e19f3SScott Teel * If block size is 512, tweak value is LBA. 4758dd0e19f3SScott Teel * For other block sizes, tweak is (LBA * block size)/ 512) 4759dd0e19f3SScott Teel */ 4760dd0e19f3SScott Teel switch (cmd->cmnd[0]) { 4761dd0e19f3SScott Teel /* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */ 4762dd0e19f3SScott Teel case READ_6: 4763abbada71SMahesh Rajashekhara case WRITE_6: 4764abbada71SMahesh Rajashekhara first_block = (((cmd->cmnd[1] & 0x1F) << 16) | 4765abbada71SMahesh Rajashekhara (cmd->cmnd[2] << 8) | 4766abbada71SMahesh Rajashekhara cmd->cmnd[3]); 4767dd0e19f3SScott Teel break; 4768dd0e19f3SScott Teel case WRITE_10: 4769dd0e19f3SScott Teel case READ_10: 4770dd0e19f3SScott Teel /* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */ 4771dd0e19f3SScott Teel case WRITE_12: 4772dd0e19f3SScott Teel case READ_12: 47732b08b3e9SDon Brace first_block = get_unaligned_be32(&cmd->cmnd[2]); 4774dd0e19f3SScott Teel break; 4775dd0e19f3SScott Teel case WRITE_16: 4776dd0e19f3SScott Teel case READ_16: 47772b08b3e9SDon Brace first_block = get_unaligned_be64(&cmd->cmnd[2]); 4778dd0e19f3SScott Teel break; 4779dd0e19f3SScott Teel default: 4780dd0e19f3SScott Teel dev_err(&h->pdev->dev, 47812b08b3e9SDon Brace "ERROR: %s: size (0x%x) not supported for encryption\n", 47822b08b3e9SDon Brace __func__, cmd->cmnd[0]); 4783dd0e19f3SScott Teel BUG(); 4784dd0e19f3SScott Teel break; 4785dd0e19f3SScott Teel } 47862b08b3e9SDon Brace 47872b08b3e9SDon Brace if (le32_to_cpu(map->volume_blk_size) != 512) 47882b08b3e9SDon Brace first_block = first_block * 47892b08b3e9SDon Brace le32_to_cpu(map->volume_blk_size)/512; 47902b08b3e9SDon Brace 47912b08b3e9SDon Brace cp->tweak_lower = cpu_to_le32(first_block); 47922b08b3e9SDon Brace cp->tweak_upper = cpu_to_le32(first_block >> 32); 4793dd0e19f3SScott Teel } 4794dd0e19f3SScott Teel 4795c349775eSScott Teel static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h, 4796c349775eSScott Teel struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 479703383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4798c349775eSScott Teel { 4799c349775eSScott Teel struct scsi_cmnd *cmd = c->scsi_cmd; 4800c349775eSScott Teel struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex]; 4801c349775eSScott Teel struct ioaccel2_sg_element *curr_sg; 4802c349775eSScott Teel int use_sg, i; 4803c349775eSScott Teel struct scatterlist *sg; 4804c349775eSScott Teel u64 addr64; 4805c349775eSScott Teel u32 len; 4806c349775eSScott Teel u32 total_len = 0; 4807c349775eSScott Teel 480845e596cdSDon Brace if (!cmd->device) 480945e596cdSDon Brace return -1; 481045e596cdSDon Brace 481145e596cdSDon Brace if (!cmd->device->hostdata) 481245e596cdSDon Brace return -1; 481345e596cdSDon Brace 4814d9a729f3SWebb Scales BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 4815c349775eSScott Teel 481603383736SDon Brace if (fixup_ioaccel_cdb(cdb, &cdb_len)) { 481703383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4818c349775eSScott Teel return IO_ACCEL_INELIGIBLE; 481903383736SDon Brace } 482003383736SDon Brace 4821c349775eSScott Teel c->cmd_type = CMD_IOACCEL2; 4822c349775eSScott Teel /* Adjust the DMA address to point to the accelerated command buffer */ 4823c349775eSScott Teel c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle + 4824c349775eSScott Teel (c->cmdindex * sizeof(*cp)); 4825c349775eSScott Teel BUG_ON(c->busaddr & 0x0000007F); 4826c349775eSScott Teel 4827c349775eSScott Teel memset(cp, 0, sizeof(*cp)); 4828c349775eSScott Teel cp->IU_type = IOACCEL2_IU_TYPE; 4829c349775eSScott Teel 4830c349775eSScott Teel use_sg = scsi_dma_map(cmd); 483103383736SDon Brace if (use_sg < 0) { 483203383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 4833c349775eSScott Teel return use_sg; 483403383736SDon Brace } 4835c349775eSScott Teel 4836c349775eSScott Teel if (use_sg) { 4837c349775eSScott Teel curr_sg = cp->sg; 4838d9a729f3SWebb Scales if (use_sg > h->ioaccel_maxsg) { 4839d9a729f3SWebb Scales addr64 = le64_to_cpu( 4840d9a729f3SWebb Scales h->ioaccel2_cmd_sg_list[c->cmdindex]->address); 4841d9a729f3SWebb Scales curr_sg->address = cpu_to_le64(addr64); 4842d9a729f3SWebb Scales curr_sg->length = 0; 4843d9a729f3SWebb Scales curr_sg->reserved[0] = 0; 4844d9a729f3SWebb Scales curr_sg->reserved[1] = 0; 4845d9a729f3SWebb Scales curr_sg->reserved[2] = 0; 4846d9a729f3SWebb Scales curr_sg->chain_indicator = 0x80; 4847d9a729f3SWebb Scales 4848d9a729f3SWebb Scales curr_sg = h->ioaccel2_cmd_sg_list[c->cmdindex]; 4849d9a729f3SWebb Scales } 4850c349775eSScott Teel scsi_for_each_sg(cmd, sg, use_sg, i) { 4851c349775eSScott Teel addr64 = (u64) sg_dma_address(sg); 4852c349775eSScott Teel len = sg_dma_len(sg); 4853c349775eSScott Teel total_len += len; 4854c349775eSScott Teel curr_sg->address = cpu_to_le64(addr64); 4855c349775eSScott Teel curr_sg->length = cpu_to_le32(len); 4856c349775eSScott Teel curr_sg->reserved[0] = 0; 4857c349775eSScott Teel curr_sg->reserved[1] = 0; 4858c349775eSScott Teel curr_sg->reserved[2] = 0; 4859c349775eSScott Teel curr_sg->chain_indicator = 0; 4860c349775eSScott Teel curr_sg++; 4861c349775eSScott Teel } 4862c349775eSScott Teel 4863c349775eSScott Teel switch (cmd->sc_data_direction) { 4864c349775eSScott Teel case DMA_TO_DEVICE: 4865dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4866dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_DATA_OUT; 4867c349775eSScott Teel break; 4868c349775eSScott Teel case DMA_FROM_DEVICE: 4869dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4870dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_DATA_IN; 4871c349775eSScott Teel break; 4872c349775eSScott Teel case DMA_NONE: 4873dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4874dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_NO_DATA; 4875c349775eSScott Teel break; 4876c349775eSScott Teel default: 4877c349775eSScott Teel dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4878c349775eSScott Teel cmd->sc_data_direction); 4879c349775eSScott Teel BUG(); 4880c349775eSScott Teel break; 4881c349775eSScott Teel } 4882c349775eSScott Teel } else { 4883dd0e19f3SScott Teel cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4884dd0e19f3SScott Teel cp->direction |= IOACCEL2_DIR_NO_DATA; 4885c349775eSScott Teel } 4886dd0e19f3SScott Teel 4887dd0e19f3SScott Teel /* Set encryption parameters, if necessary */ 4888dd0e19f3SScott Teel set_encrypt_ioaccel2(h, c, cp); 4889dd0e19f3SScott Teel 48902b08b3e9SDon Brace cp->scsi_nexus = cpu_to_le32(ioaccel_handle); 4891f2405db8SDon Brace cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT); 4892c349775eSScott Teel memcpy(cp->cdb, cdb, sizeof(cp->cdb)); 4893c349775eSScott Teel 4894c349775eSScott Teel cp->data_len = cpu_to_le32(total_len); 4895c349775eSScott Teel cp->err_ptr = cpu_to_le64(c->busaddr + 4896c349775eSScott Teel offsetof(struct io_accel2_cmd, error_data)); 489750a0decfSStephen M. Cameron cp->err_len = cpu_to_le32(sizeof(cp->error_data)); 4898c349775eSScott Teel 4899d9a729f3SWebb Scales /* fill in sg elements */ 4900d9a729f3SWebb Scales if (use_sg > h->ioaccel_maxsg) { 4901d9a729f3SWebb Scales cp->sg_count = 1; 4902a736e9b6SDon Brace cp->sg[0].length = cpu_to_le32(use_sg * sizeof(cp->sg[0])); 4903d9a729f3SWebb Scales if (hpsa_map_ioaccel2_sg_chain_block(h, cp, c)) { 4904d9a729f3SWebb Scales atomic_dec(&phys_disk->ioaccel_cmds_out); 4905d9a729f3SWebb Scales scsi_dma_unmap(cmd); 4906d9a729f3SWebb Scales return -1; 4907d9a729f3SWebb Scales } 4908d9a729f3SWebb Scales } else 4909d9a729f3SWebb Scales cp->sg_count = (u8) use_sg; 4910d9a729f3SWebb Scales 4911c349775eSScott Teel enqueue_cmd_and_start_io(h, c); 4912c349775eSScott Teel return 0; 4913c349775eSScott Teel } 4914c349775eSScott Teel 4915c349775eSScott Teel /* 4916c349775eSScott Teel * Queue a command to the correct I/O accelerator path. 4917c349775eSScott Teel */ 4918c349775eSScott Teel static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h, 4919c349775eSScott Teel struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 492003383736SDon Brace u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4921c349775eSScott Teel { 492245e596cdSDon Brace if (!c->scsi_cmd->device) 492345e596cdSDon Brace return -1; 492445e596cdSDon Brace 492545e596cdSDon Brace if (!c->scsi_cmd->device->hostdata) 492645e596cdSDon Brace return -1; 492745e596cdSDon Brace 492803383736SDon Brace /* Try to honor the device's queue depth */ 492903383736SDon Brace if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) > 493003383736SDon Brace phys_disk->queue_depth) { 493103383736SDon Brace atomic_dec(&phys_disk->ioaccel_cmds_out); 493203383736SDon Brace return IO_ACCEL_INELIGIBLE; 493303383736SDon Brace } 4934c349775eSScott Teel if (h->transMethod & CFGTBL_Trans_io_accel1) 4935c349775eSScott Teel return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle, 493603383736SDon Brace cdb, cdb_len, scsi3addr, 493703383736SDon Brace phys_disk); 4938c349775eSScott Teel else 4939c349775eSScott Teel return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle, 494003383736SDon Brace cdb, cdb_len, scsi3addr, 494103383736SDon Brace phys_disk); 4942c349775eSScott Teel } 4943c349775eSScott Teel 49446b80b18fSScott Teel static void raid_map_helper(struct raid_map_data *map, 49456b80b18fSScott Teel int offload_to_mirror, u32 *map_index, u32 *current_group) 49466b80b18fSScott Teel { 49476b80b18fSScott Teel if (offload_to_mirror == 0) { 49486b80b18fSScott Teel /* use physical disk in the first mirrored group. */ 49492b08b3e9SDon Brace *map_index %= le16_to_cpu(map->data_disks_per_row); 49506b80b18fSScott Teel return; 49516b80b18fSScott Teel } 49526b80b18fSScott Teel do { 49536b80b18fSScott Teel /* determine mirror group that *map_index indicates */ 49542b08b3e9SDon Brace *current_group = *map_index / 49552b08b3e9SDon Brace le16_to_cpu(map->data_disks_per_row); 49566b80b18fSScott Teel if (offload_to_mirror == *current_group) 49576b80b18fSScott Teel continue; 49582b08b3e9SDon Brace if (*current_group < le16_to_cpu(map->layout_map_count) - 1) { 49596b80b18fSScott Teel /* select map index from next group */ 49602b08b3e9SDon Brace *map_index += le16_to_cpu(map->data_disks_per_row); 49616b80b18fSScott Teel (*current_group)++; 49626b80b18fSScott Teel } else { 49636b80b18fSScott Teel /* select map index from first group */ 49642b08b3e9SDon Brace *map_index %= le16_to_cpu(map->data_disks_per_row); 49656b80b18fSScott Teel *current_group = 0; 49666b80b18fSScott Teel } 49676b80b18fSScott Teel } while (offload_to_mirror != *current_group); 49686b80b18fSScott Teel } 49696b80b18fSScott Teel 4970283b4a9bSStephen M. Cameron /* 4971283b4a9bSStephen M. Cameron * Attempt to perform offload RAID mapping for a logical volume I/O. 4972283b4a9bSStephen M. Cameron */ 4973283b4a9bSStephen M. Cameron static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h, 4974283b4a9bSStephen M. Cameron struct CommandList *c) 4975283b4a9bSStephen M. Cameron { 4976283b4a9bSStephen M. Cameron struct scsi_cmnd *cmd = c->scsi_cmd; 4977283b4a9bSStephen M. Cameron struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4978283b4a9bSStephen M. Cameron struct raid_map_data *map = &dev->raid_map; 4979283b4a9bSStephen M. Cameron struct raid_map_disk_data *dd = &map->data[0]; 4980283b4a9bSStephen M. Cameron int is_write = 0; 4981283b4a9bSStephen M. Cameron u32 map_index; 4982283b4a9bSStephen M. Cameron u64 first_block, last_block; 4983283b4a9bSStephen M. Cameron u32 block_cnt; 4984283b4a9bSStephen M. Cameron u32 blocks_per_row; 4985283b4a9bSStephen M. Cameron u64 first_row, last_row; 4986283b4a9bSStephen M. Cameron u32 first_row_offset, last_row_offset; 4987283b4a9bSStephen M. Cameron u32 first_column, last_column; 49886b80b18fSScott Teel u64 r0_first_row, r0_last_row; 49896b80b18fSScott Teel u32 r5or6_blocks_per_row; 49906b80b18fSScott Teel u64 r5or6_first_row, r5or6_last_row; 49916b80b18fSScott Teel u32 r5or6_first_row_offset, r5or6_last_row_offset; 49926b80b18fSScott Teel u32 r5or6_first_column, r5or6_last_column; 49936b80b18fSScott Teel u32 total_disks_per_row; 49946b80b18fSScott Teel u32 stripesize; 49956b80b18fSScott Teel u32 first_group, last_group, current_group; 4996283b4a9bSStephen M. Cameron u32 map_row; 4997283b4a9bSStephen M. Cameron u32 disk_handle; 4998283b4a9bSStephen M. Cameron u64 disk_block; 4999283b4a9bSStephen M. Cameron u32 disk_block_cnt; 5000283b4a9bSStephen M. Cameron u8 cdb[16]; 5001283b4a9bSStephen M. Cameron u8 cdb_len; 50022b08b3e9SDon Brace u16 strip_size; 5003283b4a9bSStephen M. Cameron #if BITS_PER_LONG == 32 5004283b4a9bSStephen M. Cameron u64 tmpdiv; 5005283b4a9bSStephen M. Cameron #endif 50066b80b18fSScott Teel int offload_to_mirror; 5007283b4a9bSStephen M. Cameron 500845e596cdSDon Brace if (!dev) 500945e596cdSDon Brace return -1; 501045e596cdSDon Brace 5011283b4a9bSStephen M. Cameron /* check for valid opcode, get LBA and block count */ 5012283b4a9bSStephen M. Cameron switch (cmd->cmnd[0]) { 5013283b4a9bSStephen M. Cameron case WRITE_6: 5014283b4a9bSStephen M. Cameron is_write = 1; 5015283b4a9bSStephen M. Cameron case READ_6: 5016abbada71SMahesh Rajashekhara first_block = (((cmd->cmnd[1] & 0x1F) << 16) | 5017abbada71SMahesh Rajashekhara (cmd->cmnd[2] << 8) | 5018abbada71SMahesh Rajashekhara cmd->cmnd[3]); 5019283b4a9bSStephen M. Cameron block_cnt = cmd->cmnd[4]; 50203fa89a04SStephen M. Cameron if (block_cnt == 0) 50213fa89a04SStephen M. Cameron block_cnt = 256; 5022283b4a9bSStephen M. Cameron break; 5023283b4a9bSStephen M. Cameron case WRITE_10: 5024283b4a9bSStephen M. Cameron is_write = 1; 5025283b4a9bSStephen M. Cameron case READ_10: 5026283b4a9bSStephen M. Cameron first_block = 5027283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[2]) << 24) | 5028283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[3]) << 16) | 5029283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[4]) << 8) | 5030283b4a9bSStephen M. Cameron cmd->cmnd[5]; 5031283b4a9bSStephen M. Cameron block_cnt = 5032283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[7]) << 8) | 5033283b4a9bSStephen M. Cameron cmd->cmnd[8]; 5034283b4a9bSStephen M. Cameron break; 5035283b4a9bSStephen M. Cameron case WRITE_12: 5036283b4a9bSStephen M. Cameron is_write = 1; 5037283b4a9bSStephen M. Cameron case READ_12: 5038283b4a9bSStephen M. Cameron first_block = 5039283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[2]) << 24) | 5040283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[3]) << 16) | 5041283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[4]) << 8) | 5042283b4a9bSStephen M. Cameron cmd->cmnd[5]; 5043283b4a9bSStephen M. Cameron block_cnt = 5044283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[6]) << 24) | 5045283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[7]) << 16) | 5046283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[8]) << 8) | 5047283b4a9bSStephen M. Cameron cmd->cmnd[9]; 5048283b4a9bSStephen M. Cameron break; 5049283b4a9bSStephen M. Cameron case WRITE_16: 5050283b4a9bSStephen M. Cameron is_write = 1; 5051283b4a9bSStephen M. Cameron case READ_16: 5052283b4a9bSStephen M. Cameron first_block = 5053283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[2]) << 56) | 5054283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[3]) << 48) | 5055283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[4]) << 40) | 5056283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[5]) << 32) | 5057283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[6]) << 24) | 5058283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[7]) << 16) | 5059283b4a9bSStephen M. Cameron (((u64) cmd->cmnd[8]) << 8) | 5060283b4a9bSStephen M. Cameron cmd->cmnd[9]; 5061283b4a9bSStephen M. Cameron block_cnt = 5062283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[10]) << 24) | 5063283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[11]) << 16) | 5064283b4a9bSStephen M. Cameron (((u32) cmd->cmnd[12]) << 8) | 5065283b4a9bSStephen M. Cameron cmd->cmnd[13]; 5066283b4a9bSStephen M. Cameron break; 5067283b4a9bSStephen M. Cameron default: 5068283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */ 5069283b4a9bSStephen M. Cameron } 5070283b4a9bSStephen M. Cameron last_block = first_block + block_cnt - 1; 5071283b4a9bSStephen M. Cameron 5072283b4a9bSStephen M. Cameron /* check for write to non-RAID-0 */ 5073283b4a9bSStephen M. Cameron if (is_write && dev->raid_level != 0) 5074283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 5075283b4a9bSStephen M. Cameron 5076283b4a9bSStephen M. Cameron /* check for invalid block or wraparound */ 50772b08b3e9SDon Brace if (last_block >= le64_to_cpu(map->volume_blk_cnt) || 50782b08b3e9SDon Brace last_block < first_block) 5079283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 5080283b4a9bSStephen M. Cameron 5081283b4a9bSStephen M. Cameron /* calculate stripe information for the request */ 50822b08b3e9SDon Brace blocks_per_row = le16_to_cpu(map->data_disks_per_row) * 50832b08b3e9SDon Brace le16_to_cpu(map->strip_size); 50842b08b3e9SDon Brace strip_size = le16_to_cpu(map->strip_size); 5085283b4a9bSStephen M. Cameron #if BITS_PER_LONG == 32 5086283b4a9bSStephen M. Cameron tmpdiv = first_block; 5087283b4a9bSStephen M. Cameron (void) do_div(tmpdiv, blocks_per_row); 5088283b4a9bSStephen M. Cameron first_row = tmpdiv; 5089283b4a9bSStephen M. Cameron tmpdiv = last_block; 5090283b4a9bSStephen M. Cameron (void) do_div(tmpdiv, blocks_per_row); 5091283b4a9bSStephen M. Cameron last_row = tmpdiv; 5092283b4a9bSStephen M. Cameron first_row_offset = (u32) (first_block - (first_row * blocks_per_row)); 5093283b4a9bSStephen M. Cameron last_row_offset = (u32) (last_block - (last_row * blocks_per_row)); 5094283b4a9bSStephen M. Cameron tmpdiv = first_row_offset; 50952b08b3e9SDon Brace (void) do_div(tmpdiv, strip_size); 5096283b4a9bSStephen M. Cameron first_column = tmpdiv; 5097283b4a9bSStephen M. Cameron tmpdiv = last_row_offset; 50982b08b3e9SDon Brace (void) do_div(tmpdiv, strip_size); 5099283b4a9bSStephen M. Cameron last_column = tmpdiv; 5100283b4a9bSStephen M. Cameron #else 5101283b4a9bSStephen M. Cameron first_row = first_block / blocks_per_row; 5102283b4a9bSStephen M. Cameron last_row = last_block / blocks_per_row; 5103283b4a9bSStephen M. Cameron first_row_offset = (u32) (first_block - (first_row * blocks_per_row)); 5104283b4a9bSStephen M. Cameron last_row_offset = (u32) (last_block - (last_row * blocks_per_row)); 51052b08b3e9SDon Brace first_column = first_row_offset / strip_size; 51062b08b3e9SDon Brace last_column = last_row_offset / strip_size; 5107283b4a9bSStephen M. Cameron #endif 5108283b4a9bSStephen M. Cameron 5109283b4a9bSStephen M. Cameron /* if this isn't a single row/column then give to the controller */ 5110283b4a9bSStephen M. Cameron if ((first_row != last_row) || (first_column != last_column)) 5111283b4a9bSStephen M. Cameron return IO_ACCEL_INELIGIBLE; 5112283b4a9bSStephen M. Cameron 5113283b4a9bSStephen M. Cameron /* proceeding with driver mapping */ 51142b08b3e9SDon Brace total_disks_per_row = le16_to_cpu(map->data_disks_per_row) + 51152b08b3e9SDon Brace le16_to_cpu(map->metadata_disks_per_row); 5116283b4a9bSStephen M. Cameron map_row = ((u32)(first_row >> map->parity_rotation_shift)) % 51172b08b3e9SDon Brace le16_to_cpu(map->row_cnt); 51186b80b18fSScott Teel map_index = (map_row * total_disks_per_row) + first_column; 51196b80b18fSScott Teel 51206b80b18fSScott Teel switch (dev->raid_level) { 51216b80b18fSScott Teel case HPSA_RAID_0: 51226b80b18fSScott Teel break; /* nothing special to do */ 51236b80b18fSScott Teel case HPSA_RAID_1: 51246b80b18fSScott Teel /* Handles load balance across RAID 1 members. 51256b80b18fSScott Teel * (2-drive R1 and R10 with even # of drives.) 51266b80b18fSScott Teel * Appropriate for SSDs, not optimal for HDDs 5127283b4a9bSStephen M. Cameron */ 51282b08b3e9SDon Brace BUG_ON(le16_to_cpu(map->layout_map_count) != 2); 5129283b4a9bSStephen M. Cameron if (dev->offload_to_mirror) 51302b08b3e9SDon Brace map_index += le16_to_cpu(map->data_disks_per_row); 5131283b4a9bSStephen M. Cameron dev->offload_to_mirror = !dev->offload_to_mirror; 51326b80b18fSScott Teel break; 51336b80b18fSScott Teel case HPSA_RAID_ADM: 51346b80b18fSScott Teel /* Handles N-way mirrors (R1-ADM) 51356b80b18fSScott Teel * and R10 with # of drives divisible by 3.) 51366b80b18fSScott Teel */ 51372b08b3e9SDon Brace BUG_ON(le16_to_cpu(map->layout_map_count) != 3); 51386b80b18fSScott Teel 51396b80b18fSScott Teel offload_to_mirror = dev->offload_to_mirror; 51406b80b18fSScott Teel raid_map_helper(map, offload_to_mirror, 51416b80b18fSScott Teel &map_index, ¤t_group); 51426b80b18fSScott Teel /* set mirror group to use next time */ 51436b80b18fSScott Teel offload_to_mirror = 51442b08b3e9SDon Brace (offload_to_mirror >= 51452b08b3e9SDon Brace le16_to_cpu(map->layout_map_count) - 1) 51466b80b18fSScott Teel ? 0 : offload_to_mirror + 1; 51476b80b18fSScott Teel dev->offload_to_mirror = offload_to_mirror; 51486b80b18fSScott Teel /* Avoid direct use of dev->offload_to_mirror within this 51496b80b18fSScott Teel * function since multiple threads might simultaneously 51506b80b18fSScott Teel * increment it beyond the range of dev->layout_map_count -1. 51516b80b18fSScott Teel */ 51526b80b18fSScott Teel break; 51536b80b18fSScott Teel case HPSA_RAID_5: 51546b80b18fSScott Teel case HPSA_RAID_6: 51552b08b3e9SDon Brace if (le16_to_cpu(map->layout_map_count) <= 1) 51566b80b18fSScott Teel break; 51576b80b18fSScott Teel 51586b80b18fSScott Teel /* Verify first and last block are in same RAID group */ 51596b80b18fSScott Teel r5or6_blocks_per_row = 51602b08b3e9SDon Brace le16_to_cpu(map->strip_size) * 51612b08b3e9SDon Brace le16_to_cpu(map->data_disks_per_row); 51626b80b18fSScott Teel BUG_ON(r5or6_blocks_per_row == 0); 51632b08b3e9SDon Brace stripesize = r5or6_blocks_per_row * 51642b08b3e9SDon Brace le16_to_cpu(map->layout_map_count); 51656b80b18fSScott Teel #if BITS_PER_LONG == 32 51666b80b18fSScott Teel tmpdiv = first_block; 51676b80b18fSScott Teel first_group = do_div(tmpdiv, stripesize); 51686b80b18fSScott Teel tmpdiv = first_group; 51696b80b18fSScott Teel (void) do_div(tmpdiv, r5or6_blocks_per_row); 51706b80b18fSScott Teel first_group = tmpdiv; 51716b80b18fSScott Teel tmpdiv = last_block; 51726b80b18fSScott Teel last_group = do_div(tmpdiv, stripesize); 51736b80b18fSScott Teel tmpdiv = last_group; 51746b80b18fSScott Teel (void) do_div(tmpdiv, r5or6_blocks_per_row); 51756b80b18fSScott Teel last_group = tmpdiv; 51766b80b18fSScott Teel #else 51776b80b18fSScott Teel first_group = (first_block % stripesize) / r5or6_blocks_per_row; 51786b80b18fSScott Teel last_group = (last_block % stripesize) / r5or6_blocks_per_row; 51796b80b18fSScott Teel #endif 5180000ff7c2SStephen M. Cameron if (first_group != last_group) 51816b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 51826b80b18fSScott Teel 51836b80b18fSScott Teel /* Verify request is in a single row of RAID 5/6 */ 51846b80b18fSScott Teel #if BITS_PER_LONG == 32 51856b80b18fSScott Teel tmpdiv = first_block; 51866b80b18fSScott Teel (void) do_div(tmpdiv, stripesize); 51876b80b18fSScott Teel first_row = r5or6_first_row = r0_first_row = tmpdiv; 51886b80b18fSScott Teel tmpdiv = last_block; 51896b80b18fSScott Teel (void) do_div(tmpdiv, stripesize); 51906b80b18fSScott Teel r5or6_last_row = r0_last_row = tmpdiv; 51916b80b18fSScott Teel #else 51926b80b18fSScott Teel first_row = r5or6_first_row = r0_first_row = 51936b80b18fSScott Teel first_block / stripesize; 51946b80b18fSScott Teel r5or6_last_row = r0_last_row = last_block / stripesize; 51956b80b18fSScott Teel #endif 51966b80b18fSScott Teel if (r5or6_first_row != r5or6_last_row) 51976b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 51986b80b18fSScott Teel 51996b80b18fSScott Teel 52006b80b18fSScott Teel /* Verify request is in a single column */ 52016b80b18fSScott Teel #if BITS_PER_LONG == 32 52026b80b18fSScott Teel tmpdiv = first_block; 52036b80b18fSScott Teel first_row_offset = do_div(tmpdiv, stripesize); 52046b80b18fSScott Teel tmpdiv = first_row_offset; 52056b80b18fSScott Teel first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row); 52066b80b18fSScott Teel r5or6_first_row_offset = first_row_offset; 52076b80b18fSScott Teel tmpdiv = last_block; 52086b80b18fSScott Teel r5or6_last_row_offset = do_div(tmpdiv, stripesize); 52096b80b18fSScott Teel tmpdiv = r5or6_last_row_offset; 52106b80b18fSScott Teel r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row); 52116b80b18fSScott Teel tmpdiv = r5or6_first_row_offset; 52126b80b18fSScott Teel (void) do_div(tmpdiv, map->strip_size); 52136b80b18fSScott Teel first_column = r5or6_first_column = tmpdiv; 52146b80b18fSScott Teel tmpdiv = r5or6_last_row_offset; 52156b80b18fSScott Teel (void) do_div(tmpdiv, map->strip_size); 52166b80b18fSScott Teel r5or6_last_column = tmpdiv; 52176b80b18fSScott Teel #else 52186b80b18fSScott Teel first_row_offset = r5or6_first_row_offset = 52196b80b18fSScott Teel (u32)((first_block % stripesize) % 52206b80b18fSScott Teel r5or6_blocks_per_row); 52216b80b18fSScott Teel 52226b80b18fSScott Teel r5or6_last_row_offset = 52236b80b18fSScott Teel (u32)((last_block % stripesize) % 52246b80b18fSScott Teel r5or6_blocks_per_row); 52256b80b18fSScott Teel 52266b80b18fSScott Teel first_column = r5or6_first_column = 52272b08b3e9SDon Brace r5or6_first_row_offset / le16_to_cpu(map->strip_size); 52286b80b18fSScott Teel r5or6_last_column = 52292b08b3e9SDon Brace r5or6_last_row_offset / le16_to_cpu(map->strip_size); 52306b80b18fSScott Teel #endif 52316b80b18fSScott Teel if (r5or6_first_column != r5or6_last_column) 52326b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 52336b80b18fSScott Teel 52346b80b18fSScott Teel /* Request is eligible */ 52356b80b18fSScott Teel map_row = ((u32)(first_row >> map->parity_rotation_shift)) % 52362b08b3e9SDon Brace le16_to_cpu(map->row_cnt); 52376b80b18fSScott Teel 52386b80b18fSScott Teel map_index = (first_group * 52392b08b3e9SDon Brace (le16_to_cpu(map->row_cnt) * total_disks_per_row)) + 52406b80b18fSScott Teel (map_row * total_disks_per_row) + first_column; 52416b80b18fSScott Teel break; 52426b80b18fSScott Teel default: 52436b80b18fSScott Teel return IO_ACCEL_INELIGIBLE; 5244283b4a9bSStephen M. Cameron } 52456b80b18fSScott Teel 524607543e0cSStephen Cameron if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES)) 524707543e0cSStephen Cameron return IO_ACCEL_INELIGIBLE; 524807543e0cSStephen Cameron 524903383736SDon Brace c->phys_disk = dev->phys_disk[map_index]; 5250c3390df4SDon Brace if (!c->phys_disk) 5251c3390df4SDon Brace return IO_ACCEL_INELIGIBLE; 525203383736SDon Brace 5253283b4a9bSStephen M. Cameron disk_handle = dd[map_index].ioaccel_handle; 52542b08b3e9SDon Brace disk_block = le64_to_cpu(map->disk_starting_blk) + 52552b08b3e9SDon Brace first_row * le16_to_cpu(map->strip_size) + 52562b08b3e9SDon Brace (first_row_offset - first_column * 52572b08b3e9SDon Brace le16_to_cpu(map->strip_size)); 5258283b4a9bSStephen M. Cameron disk_block_cnt = block_cnt; 5259283b4a9bSStephen M. Cameron 5260283b4a9bSStephen M. Cameron /* handle differing logical/physical block sizes */ 5261283b4a9bSStephen M. Cameron if (map->phys_blk_shift) { 5262283b4a9bSStephen M. Cameron disk_block <<= map->phys_blk_shift; 5263283b4a9bSStephen M. Cameron disk_block_cnt <<= map->phys_blk_shift; 5264283b4a9bSStephen M. Cameron } 5265283b4a9bSStephen M. Cameron BUG_ON(disk_block_cnt > 0xffff); 5266283b4a9bSStephen M. Cameron 5267283b4a9bSStephen M. Cameron /* build the new CDB for the physical disk I/O */ 5268283b4a9bSStephen M. Cameron if (disk_block > 0xffffffff) { 5269283b4a9bSStephen M. Cameron cdb[0] = is_write ? WRITE_16 : READ_16; 5270283b4a9bSStephen M. Cameron cdb[1] = 0; 5271283b4a9bSStephen M. Cameron cdb[2] = (u8) (disk_block >> 56); 5272283b4a9bSStephen M. Cameron cdb[3] = (u8) (disk_block >> 48); 5273283b4a9bSStephen M. Cameron cdb[4] = (u8) (disk_block >> 40); 5274283b4a9bSStephen M. Cameron cdb[5] = (u8) (disk_block >> 32); 5275283b4a9bSStephen M. Cameron cdb[6] = (u8) (disk_block >> 24); 5276283b4a9bSStephen M. Cameron cdb[7] = (u8) (disk_block >> 16); 5277283b4a9bSStephen M. Cameron cdb[8] = (u8) (disk_block >> 8); 5278283b4a9bSStephen M. Cameron cdb[9] = (u8) (disk_block); 5279283b4a9bSStephen M. Cameron cdb[10] = (u8) (disk_block_cnt >> 24); 5280283b4a9bSStephen M. Cameron cdb[11] = (u8) (disk_block_cnt >> 16); 5281283b4a9bSStephen M. Cameron cdb[12] = (u8) (disk_block_cnt >> 8); 5282283b4a9bSStephen M. Cameron cdb[13] = (u8) (disk_block_cnt); 5283283b4a9bSStephen M. Cameron cdb[14] = 0; 5284283b4a9bSStephen M. Cameron cdb[15] = 0; 5285283b4a9bSStephen M. Cameron cdb_len = 16; 5286283b4a9bSStephen M. Cameron } else { 5287283b4a9bSStephen M. Cameron cdb[0] = is_write ? WRITE_10 : READ_10; 5288283b4a9bSStephen M. Cameron cdb[1] = 0; 5289283b4a9bSStephen M. Cameron cdb[2] = (u8) (disk_block >> 24); 5290283b4a9bSStephen M. Cameron cdb[3] = (u8) (disk_block >> 16); 5291283b4a9bSStephen M. Cameron cdb[4] = (u8) (disk_block >> 8); 5292283b4a9bSStephen M. Cameron cdb[5] = (u8) (disk_block); 5293283b4a9bSStephen M. Cameron cdb[6] = 0; 5294283b4a9bSStephen M. Cameron cdb[7] = (u8) (disk_block_cnt >> 8); 5295283b4a9bSStephen M. Cameron cdb[8] = (u8) (disk_block_cnt); 5296283b4a9bSStephen M. Cameron cdb[9] = 0; 5297283b4a9bSStephen M. Cameron cdb_len = 10; 5298283b4a9bSStephen M. Cameron } 5299283b4a9bSStephen M. Cameron return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len, 530003383736SDon Brace dev->scsi3addr, 530103383736SDon Brace dev->phys_disk[map_index]); 5302283b4a9bSStephen M. Cameron } 5303283b4a9bSStephen M. Cameron 530425163bd5SWebb Scales /* 530525163bd5SWebb Scales * Submit commands down the "normal" RAID stack path 530625163bd5SWebb Scales * All callers to hpsa_ciss_submit must check lockup_detected 530725163bd5SWebb Scales * beforehand, before (opt.) and after calling cmd_alloc 530825163bd5SWebb Scales */ 5309574f05d3SStephen Cameron static int hpsa_ciss_submit(struct ctlr_info *h, 5310574f05d3SStephen Cameron struct CommandList *c, struct scsi_cmnd *cmd, 5311574f05d3SStephen Cameron unsigned char scsi3addr[]) 5312edd16368SStephen M. Cameron { 5313edd16368SStephen M. Cameron cmd->host_scribble = (unsigned char *) c; 5314edd16368SStephen M. Cameron c->cmd_type = CMD_SCSI; 5315edd16368SStephen M. Cameron c->scsi_cmd = cmd; 5316edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; /* unused in simple mode */ 5317edd16368SStephen M. Cameron memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8); 5318f2405db8SDon Brace c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT)); 5319edd16368SStephen M. Cameron 5320edd16368SStephen M. Cameron /* Fill in the request block... */ 5321edd16368SStephen M. Cameron 5322edd16368SStephen M. Cameron c->Request.Timeout = 0; 5323edd16368SStephen M. Cameron BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB)); 5324edd16368SStephen M. Cameron c->Request.CDBLen = cmd->cmd_len; 5325edd16368SStephen M. Cameron memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len); 5326edd16368SStephen M. Cameron switch (cmd->sc_data_direction) { 5327edd16368SStephen M. Cameron case DMA_TO_DEVICE: 5328a505b86fSStephen M. Cameron c->Request.type_attr_dir = 5329a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE); 5330edd16368SStephen M. Cameron break; 5331edd16368SStephen M. Cameron case DMA_FROM_DEVICE: 5332a505b86fSStephen M. Cameron c->Request.type_attr_dir = 5333a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ); 5334edd16368SStephen M. Cameron break; 5335edd16368SStephen M. Cameron case DMA_NONE: 5336a505b86fSStephen M. Cameron c->Request.type_attr_dir = 5337a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE); 5338edd16368SStephen M. Cameron break; 5339edd16368SStephen M. Cameron case DMA_BIDIRECTIONAL: 5340edd16368SStephen M. Cameron /* This can happen if a buggy application does a scsi passthru 5341edd16368SStephen M. Cameron * and sets both inlen and outlen to non-zero. ( see 5342edd16368SStephen M. Cameron * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() ) 5343edd16368SStephen M. Cameron */ 5344edd16368SStephen M. Cameron 5345a505b86fSStephen M. Cameron c->Request.type_attr_dir = 5346a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD); 5347edd16368SStephen M. Cameron /* This is technically wrong, and hpsa controllers should 5348edd16368SStephen M. Cameron * reject it with CMD_INVALID, which is the most correct 5349edd16368SStephen M. Cameron * response, but non-fibre backends appear to let it 5350edd16368SStephen M. Cameron * slide by, and give the same results as if this field 5351edd16368SStephen M. Cameron * were set correctly. Either way is acceptable for 5352edd16368SStephen M. Cameron * our purposes here. 5353edd16368SStephen M. Cameron */ 5354edd16368SStephen M. Cameron 5355edd16368SStephen M. Cameron break; 5356edd16368SStephen M. Cameron 5357edd16368SStephen M. Cameron default: 5358edd16368SStephen M. Cameron dev_err(&h->pdev->dev, "unknown data direction: %d\n", 5359edd16368SStephen M. Cameron cmd->sc_data_direction); 5360edd16368SStephen M. Cameron BUG(); 5361edd16368SStephen M. Cameron break; 5362edd16368SStephen M. Cameron } 5363edd16368SStephen M. Cameron 536433a2ffceSStephen M. Cameron if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */ 536573153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 5366edd16368SStephen M. Cameron return SCSI_MLQUEUE_HOST_BUSY; 5367edd16368SStephen M. Cameron } 5368edd16368SStephen M. Cameron enqueue_cmd_and_start_io(h, c); 5369edd16368SStephen M. Cameron /* the cmd'll come back via intr handler in complete_scsi_command() */ 5370edd16368SStephen M. Cameron return 0; 5371edd16368SStephen M. Cameron } 5372edd16368SStephen M. Cameron 5373360c73bdSStephen Cameron static void hpsa_cmd_init(struct ctlr_info *h, int index, 5374360c73bdSStephen Cameron struct CommandList *c) 5375360c73bdSStephen Cameron { 5376360c73bdSStephen Cameron dma_addr_t cmd_dma_handle, err_dma_handle; 5377360c73bdSStephen Cameron 5378360c73bdSStephen Cameron /* Zero out all of commandlist except the last field, refcount */ 5379360c73bdSStephen Cameron memset(c, 0, offsetof(struct CommandList, refcount)); 5380360c73bdSStephen Cameron c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT)); 5381360c73bdSStephen Cameron cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c); 5382360c73bdSStephen Cameron c->err_info = h->errinfo_pool + index; 5383360c73bdSStephen Cameron memset(c->err_info, 0, sizeof(*c->err_info)); 5384360c73bdSStephen Cameron err_dma_handle = h->errinfo_pool_dhandle 5385360c73bdSStephen Cameron + index * sizeof(*c->err_info); 5386360c73bdSStephen Cameron c->cmdindex = index; 5387360c73bdSStephen Cameron c->busaddr = (u32) cmd_dma_handle; 5388360c73bdSStephen Cameron c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle); 5389360c73bdSStephen Cameron c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info)); 5390360c73bdSStephen Cameron c->h = h; 5391a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_IDLE; 5392360c73bdSStephen Cameron } 5393360c73bdSStephen Cameron 5394360c73bdSStephen Cameron static void hpsa_preinitialize_commands(struct ctlr_info *h) 5395360c73bdSStephen Cameron { 5396360c73bdSStephen Cameron int i; 5397360c73bdSStephen Cameron 5398360c73bdSStephen Cameron for (i = 0; i < h->nr_cmds; i++) { 5399360c73bdSStephen Cameron struct CommandList *c = h->cmd_pool + i; 5400360c73bdSStephen Cameron 5401360c73bdSStephen Cameron hpsa_cmd_init(h, i, c); 5402360c73bdSStephen Cameron atomic_set(&c->refcount, 0); 5403360c73bdSStephen Cameron } 5404360c73bdSStephen Cameron } 5405360c73bdSStephen Cameron 5406360c73bdSStephen Cameron static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index, 5407360c73bdSStephen Cameron struct CommandList *c) 5408360c73bdSStephen Cameron { 5409360c73bdSStephen Cameron dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c); 5410360c73bdSStephen Cameron 541173153fe5SWebb Scales BUG_ON(c->cmdindex != index); 541273153fe5SWebb Scales 5413360c73bdSStephen Cameron memset(c->Request.CDB, 0, sizeof(c->Request.CDB)); 5414360c73bdSStephen Cameron memset(c->err_info, 0, sizeof(*c->err_info)); 5415360c73bdSStephen Cameron c->busaddr = (u32) cmd_dma_handle; 5416360c73bdSStephen Cameron } 5417360c73bdSStephen Cameron 5418592a0ad5SWebb Scales static int hpsa_ioaccel_submit(struct ctlr_info *h, 5419592a0ad5SWebb Scales struct CommandList *c, struct scsi_cmnd *cmd, 5420592a0ad5SWebb Scales unsigned char *scsi3addr) 5421592a0ad5SWebb Scales { 5422592a0ad5SWebb Scales struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 5423592a0ad5SWebb Scales int rc = IO_ACCEL_INELIGIBLE; 5424592a0ad5SWebb Scales 542545e596cdSDon Brace if (!dev) 542645e596cdSDon Brace return SCSI_MLQUEUE_HOST_BUSY; 542745e596cdSDon Brace 5428592a0ad5SWebb Scales cmd->host_scribble = (unsigned char *) c; 5429592a0ad5SWebb Scales 5430592a0ad5SWebb Scales if (dev->offload_enabled) { 5431592a0ad5SWebb Scales hpsa_cmd_init(h, c->cmdindex, c); 5432592a0ad5SWebb Scales c->cmd_type = CMD_SCSI; 5433592a0ad5SWebb Scales c->scsi_cmd = cmd; 5434592a0ad5SWebb Scales rc = hpsa_scsi_ioaccel_raid_map(h, c); 5435592a0ad5SWebb Scales if (rc < 0) /* scsi_dma_map failed. */ 5436592a0ad5SWebb Scales rc = SCSI_MLQUEUE_HOST_BUSY; 5437a3144e0bSJoe Handzik } else if (dev->hba_ioaccel_enabled) { 5438592a0ad5SWebb Scales hpsa_cmd_init(h, c->cmdindex, c); 5439592a0ad5SWebb Scales c->cmd_type = CMD_SCSI; 5440592a0ad5SWebb Scales c->scsi_cmd = cmd; 5441592a0ad5SWebb Scales rc = hpsa_scsi_ioaccel_direct_map(h, c); 5442592a0ad5SWebb Scales if (rc < 0) /* scsi_dma_map failed. */ 5443592a0ad5SWebb Scales rc = SCSI_MLQUEUE_HOST_BUSY; 5444592a0ad5SWebb Scales } 5445592a0ad5SWebb Scales return rc; 5446592a0ad5SWebb Scales } 5447592a0ad5SWebb Scales 5448080ef1ccSDon Brace static void hpsa_command_resubmit_worker(struct work_struct *work) 5449080ef1ccSDon Brace { 5450080ef1ccSDon Brace struct scsi_cmnd *cmd; 5451080ef1ccSDon Brace struct hpsa_scsi_dev_t *dev; 54528a0ff92cSWebb Scales struct CommandList *c = container_of(work, struct CommandList, work); 5453080ef1ccSDon Brace 5454080ef1ccSDon Brace cmd = c->scsi_cmd; 5455080ef1ccSDon Brace dev = cmd->device->hostdata; 5456080ef1ccSDon Brace if (!dev) { 5457080ef1ccSDon Brace cmd->result = DID_NO_CONNECT << 16; 54588a0ff92cSWebb Scales return hpsa_cmd_free_and_done(c->h, c, cmd); 5459080ef1ccSDon Brace } 5460d604f533SWebb Scales if (c->reset_pending) 5461d604f533SWebb Scales return hpsa_cmd_resolve_and_free(c->h, c); 5462a58e7e53SWebb Scales if (c->abort_pending) 5463a58e7e53SWebb Scales return hpsa_cmd_abort_and_free(c->h, c, cmd); 5464592a0ad5SWebb Scales if (c->cmd_type == CMD_IOACCEL2) { 5465592a0ad5SWebb Scales struct ctlr_info *h = c->h; 5466592a0ad5SWebb Scales struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 5467592a0ad5SWebb Scales int rc; 5468592a0ad5SWebb Scales 5469592a0ad5SWebb Scales if (c2->error_data.serv_response == 5470592a0ad5SWebb Scales IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL) { 5471592a0ad5SWebb Scales rc = hpsa_ioaccel_submit(h, c, cmd, dev->scsi3addr); 5472592a0ad5SWebb Scales if (rc == 0) 5473592a0ad5SWebb Scales return; 5474592a0ad5SWebb Scales if (rc == SCSI_MLQUEUE_HOST_BUSY) { 5475592a0ad5SWebb Scales /* 5476592a0ad5SWebb Scales * If we get here, it means dma mapping failed. 5477592a0ad5SWebb Scales * Try again via scsi mid layer, which will 5478592a0ad5SWebb Scales * then get SCSI_MLQUEUE_HOST_BUSY. 5479592a0ad5SWebb Scales */ 5480592a0ad5SWebb Scales cmd->result = DID_IMM_RETRY << 16; 54818a0ff92cSWebb Scales return hpsa_cmd_free_and_done(h, c, cmd); 5482592a0ad5SWebb Scales } 5483592a0ad5SWebb Scales /* else, fall thru and resubmit down CISS path */ 5484592a0ad5SWebb Scales } 5485592a0ad5SWebb Scales } 5486360c73bdSStephen Cameron hpsa_cmd_partial_init(c->h, c->cmdindex, c); 5487080ef1ccSDon Brace if (hpsa_ciss_submit(c->h, c, cmd, dev->scsi3addr)) { 5488080ef1ccSDon Brace /* 5489080ef1ccSDon Brace * If we get here, it means dma mapping failed. Try 5490080ef1ccSDon Brace * again via scsi mid layer, which will then get 5491080ef1ccSDon Brace * SCSI_MLQUEUE_HOST_BUSY. 5492592a0ad5SWebb Scales * 5493592a0ad5SWebb Scales * hpsa_ciss_submit will have already freed c 5494592a0ad5SWebb Scales * if it encountered a dma mapping failure. 5495080ef1ccSDon Brace */ 5496080ef1ccSDon Brace cmd->result = DID_IMM_RETRY << 16; 5497080ef1ccSDon Brace cmd->scsi_done(cmd); 5498080ef1ccSDon Brace } 5499080ef1ccSDon Brace } 5500080ef1ccSDon Brace 5501574f05d3SStephen Cameron /* Running in struct Scsi_Host->host_lock less mode */ 5502574f05d3SStephen Cameron static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd) 5503574f05d3SStephen Cameron { 5504574f05d3SStephen Cameron struct ctlr_info *h; 5505574f05d3SStephen Cameron struct hpsa_scsi_dev_t *dev; 5506574f05d3SStephen Cameron unsigned char scsi3addr[8]; 5507574f05d3SStephen Cameron struct CommandList *c; 5508574f05d3SStephen Cameron int rc = 0; 5509574f05d3SStephen Cameron 5510574f05d3SStephen Cameron /* Get the ptr to our adapter structure out of cmd->host. */ 5511574f05d3SStephen Cameron h = sdev_to_hba(cmd->device); 551273153fe5SWebb Scales 551373153fe5SWebb Scales BUG_ON(cmd->request->tag < 0); 551473153fe5SWebb Scales 5515574f05d3SStephen Cameron dev = cmd->device->hostdata; 5516574f05d3SStephen Cameron if (!dev) { 55171ccde700SHannes Reinecke cmd->result = DID_NO_CONNECT << 16; 5518ba74fdc4SDon Brace cmd->scsi_done(cmd); 5519ba74fdc4SDon Brace return 0; 5520ba74fdc4SDon Brace } 5521ba74fdc4SDon Brace 5522ba74fdc4SDon Brace if (dev->removed) { 5523574f05d3SStephen Cameron cmd->result = DID_NO_CONNECT << 16; 5524574f05d3SStephen Cameron cmd->scsi_done(cmd); 5525574f05d3SStephen Cameron return 0; 5526574f05d3SStephen Cameron } 552773153fe5SWebb Scales 5528574f05d3SStephen Cameron memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr)); 5529574f05d3SStephen Cameron 5530574f05d3SStephen Cameron if (unlikely(lockup_detected(h))) { 553125163bd5SWebb Scales cmd->result = DID_NO_CONNECT << 16; 5532574f05d3SStephen Cameron cmd->scsi_done(cmd); 5533574f05d3SStephen Cameron return 0; 5534574f05d3SStephen Cameron } 553573153fe5SWebb Scales c = cmd_tagged_alloc(h, cmd); 5536574f05d3SStephen Cameron 5537407863cbSStephen Cameron /* 5538407863cbSStephen Cameron * Call alternate submit routine for I/O accelerated commands. 5539574f05d3SStephen Cameron * Retries always go down the normal I/O path. 5540574f05d3SStephen Cameron */ 5541574f05d3SStephen Cameron if (likely(cmd->retries == 0 && 5542574f05d3SStephen Cameron cmd->request->cmd_type == REQ_TYPE_FS && 5543574f05d3SStephen Cameron h->acciopath_status)) { 5544592a0ad5SWebb Scales rc = hpsa_ioaccel_submit(h, c, cmd, scsi3addr); 5545574f05d3SStephen Cameron if (rc == 0) 5546592a0ad5SWebb Scales return 0; 5547592a0ad5SWebb Scales if (rc == SCSI_MLQUEUE_HOST_BUSY) { 554873153fe5SWebb Scales hpsa_cmd_resolve_and_free(h, c); 5549574f05d3SStephen Cameron return SCSI_MLQUEUE_HOST_BUSY; 5550574f05d3SStephen Cameron } 5551574f05d3SStephen Cameron } 5552574f05d3SStephen Cameron return hpsa_ciss_submit(h, c, cmd, scsi3addr); 5553574f05d3SStephen Cameron } 5554574f05d3SStephen Cameron 55558ebc9248SWebb Scales static void hpsa_scan_complete(struct ctlr_info *h) 55565f389360SStephen M. Cameron { 55575f389360SStephen M. Cameron unsigned long flags; 55585f389360SStephen M. Cameron 55595f389360SStephen M. Cameron spin_lock_irqsave(&h->scan_lock, flags); 55605f389360SStephen M. Cameron h->scan_finished = 1; 55615f389360SStephen M. Cameron wake_up_all(&h->scan_wait_queue); 55625f389360SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 55635f389360SStephen M. Cameron } 55645f389360SStephen M. Cameron 5565a08a8471SStephen M. Cameron static void hpsa_scan_start(struct Scsi_Host *sh) 5566a08a8471SStephen M. Cameron { 5567a08a8471SStephen M. Cameron struct ctlr_info *h = shost_to_hba(sh); 5568a08a8471SStephen M. Cameron unsigned long flags; 5569a08a8471SStephen M. Cameron 55708ebc9248SWebb Scales /* 55718ebc9248SWebb Scales * Don't let rescans be initiated on a controller known to be locked 55728ebc9248SWebb Scales * up. If the controller locks up *during* a rescan, that thread is 55738ebc9248SWebb Scales * probably hosed, but at least we can prevent new rescan threads from 55748ebc9248SWebb Scales * piling up on a locked up controller. 55758ebc9248SWebb Scales */ 55768ebc9248SWebb Scales if (unlikely(lockup_detected(h))) 55778ebc9248SWebb Scales return hpsa_scan_complete(h); 55785f389360SStephen M. Cameron 5579a08a8471SStephen M. Cameron /* wait until any scan already in progress is finished. */ 5580a08a8471SStephen M. Cameron while (1) { 5581a08a8471SStephen M. Cameron spin_lock_irqsave(&h->scan_lock, flags); 5582a08a8471SStephen M. Cameron if (h->scan_finished) 5583a08a8471SStephen M. Cameron break; 5584a08a8471SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 5585a08a8471SStephen M. Cameron wait_event(h->scan_wait_queue, h->scan_finished); 5586a08a8471SStephen M. Cameron /* Note: We don't need to worry about a race between this 5587a08a8471SStephen M. Cameron * thread and driver unload because the midlayer will 5588a08a8471SStephen M. Cameron * have incremented the reference count, so unload won't 5589a08a8471SStephen M. Cameron * happen if we're in here. 5590a08a8471SStephen M. Cameron */ 5591a08a8471SStephen M. Cameron } 5592a08a8471SStephen M. Cameron h->scan_finished = 0; /* mark scan as in progress */ 5593a08a8471SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 5594a08a8471SStephen M. Cameron 55958ebc9248SWebb Scales if (unlikely(lockup_detected(h))) 55968ebc9248SWebb Scales return hpsa_scan_complete(h); 55975f389360SStephen M. Cameron 5598bfd7546cSDon Brace /* 5599bfd7546cSDon Brace * Do the scan after a reset completion 5600bfd7546cSDon Brace */ 5601bfd7546cSDon Brace if (h->reset_in_progress) { 5602bfd7546cSDon Brace h->drv_req_rescan = 1; 5603bfd7546cSDon Brace return; 5604bfd7546cSDon Brace } 5605bfd7546cSDon Brace 56068aa60681SDon Brace hpsa_update_scsi_devices(h); 5607a08a8471SStephen M. Cameron 56088ebc9248SWebb Scales hpsa_scan_complete(h); 5609a08a8471SStephen M. Cameron } 5610a08a8471SStephen M. Cameron 56117c0a0229SDon Brace static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth) 56127c0a0229SDon Brace { 561303383736SDon Brace struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata; 561403383736SDon Brace 561503383736SDon Brace if (!logical_drive) 561603383736SDon Brace return -ENODEV; 56177c0a0229SDon Brace 56187c0a0229SDon Brace if (qdepth < 1) 56197c0a0229SDon Brace qdepth = 1; 562003383736SDon Brace else if (qdepth > logical_drive->queue_depth) 562103383736SDon Brace qdepth = logical_drive->queue_depth; 562203383736SDon Brace 562303383736SDon Brace return scsi_change_queue_depth(sdev, qdepth); 56247c0a0229SDon Brace } 56257c0a0229SDon Brace 5626a08a8471SStephen M. Cameron static int hpsa_scan_finished(struct Scsi_Host *sh, 5627a08a8471SStephen M. Cameron unsigned long elapsed_time) 5628a08a8471SStephen M. Cameron { 5629a08a8471SStephen M. Cameron struct ctlr_info *h = shost_to_hba(sh); 5630a08a8471SStephen M. Cameron unsigned long flags; 5631a08a8471SStephen M. Cameron int finished; 5632a08a8471SStephen M. Cameron 5633a08a8471SStephen M. Cameron spin_lock_irqsave(&h->scan_lock, flags); 5634a08a8471SStephen M. Cameron finished = h->scan_finished; 5635a08a8471SStephen M. Cameron spin_unlock_irqrestore(&h->scan_lock, flags); 5636a08a8471SStephen M. Cameron return finished; 5637a08a8471SStephen M. Cameron } 5638a08a8471SStephen M. Cameron 56392946e82bSRobert Elliott static int hpsa_scsi_host_alloc(struct ctlr_info *h) 5640edd16368SStephen M. Cameron { 5641b705690dSStephen M. Cameron struct Scsi_Host *sh; 5642edd16368SStephen M. Cameron 5643b705690dSStephen M. Cameron sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h)); 56442946e82bSRobert Elliott if (sh == NULL) { 56452946e82bSRobert Elliott dev_err(&h->pdev->dev, "scsi_host_alloc failed\n"); 56462946e82bSRobert Elliott return -ENOMEM; 56472946e82bSRobert Elliott } 5648b705690dSStephen M. Cameron 5649b705690dSStephen M. Cameron sh->io_port = 0; 5650b705690dSStephen M. Cameron sh->n_io_port = 0; 5651b705690dSStephen M. Cameron sh->this_id = -1; 5652b705690dSStephen M. Cameron sh->max_channel = 3; 5653b705690dSStephen M. Cameron sh->max_cmd_len = MAX_COMMAND_SIZE; 5654b705690dSStephen M. Cameron sh->max_lun = HPSA_MAX_LUN; 5655b705690dSStephen M. Cameron sh->max_id = HPSA_MAX_LUN; 565641ce4c35SStephen Cameron sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS; 5657d54c5c24SStephen Cameron sh->cmd_per_lun = sh->can_queue; 5658b705690dSStephen M. Cameron sh->sg_tablesize = h->maxsgentries; 5659d04e62b9SKevin Barnett sh->transportt = hpsa_sas_transport_template; 5660b705690dSStephen M. Cameron sh->hostdata[0] = (unsigned long) h; 5661bc2bb154SChristoph Hellwig sh->irq = pci_irq_vector(h->pdev, 0); 5662b705690dSStephen M. Cameron sh->unique_id = sh->irq; 566364d513acSChristoph Hellwig 56642946e82bSRobert Elliott h->scsi_host = sh; 56652946e82bSRobert Elliott return 0; 56662946e82bSRobert Elliott } 56672946e82bSRobert Elliott 56682946e82bSRobert Elliott static int hpsa_scsi_add_host(struct ctlr_info *h) 56692946e82bSRobert Elliott { 56702946e82bSRobert Elliott int rv; 56712946e82bSRobert Elliott 56722946e82bSRobert Elliott rv = scsi_add_host(h->scsi_host, &h->pdev->dev); 56732946e82bSRobert Elliott if (rv) { 56742946e82bSRobert Elliott dev_err(&h->pdev->dev, "scsi_add_host failed\n"); 56752946e82bSRobert Elliott return rv; 56762946e82bSRobert Elliott } 56772946e82bSRobert Elliott scsi_scan_host(h->scsi_host); 56782946e82bSRobert Elliott return 0; 5679edd16368SStephen M. Cameron } 5680edd16368SStephen M. Cameron 5681b69324ffSWebb Scales /* 568273153fe5SWebb Scales * The block layer has already gone to the trouble of picking out a unique, 568373153fe5SWebb Scales * small-integer tag for this request. We use an offset from that value as 568473153fe5SWebb Scales * an index to select our command block. (The offset allows us to reserve the 568573153fe5SWebb Scales * low-numbered entries for our own uses.) 568673153fe5SWebb Scales */ 568773153fe5SWebb Scales static int hpsa_get_cmd_index(struct scsi_cmnd *scmd) 568873153fe5SWebb Scales { 568973153fe5SWebb Scales int idx = scmd->request->tag; 569073153fe5SWebb Scales 569173153fe5SWebb Scales if (idx < 0) 569273153fe5SWebb Scales return idx; 569373153fe5SWebb Scales 569473153fe5SWebb Scales /* Offset to leave space for internal cmds. */ 569573153fe5SWebb Scales return idx += HPSA_NRESERVED_CMDS; 569673153fe5SWebb Scales } 569773153fe5SWebb Scales 569873153fe5SWebb Scales /* 5699b69324ffSWebb Scales * Send a TEST_UNIT_READY command to the specified LUN using the specified 5700b69324ffSWebb Scales * reply queue; returns zero if the unit is ready, and non-zero otherwise. 5701b69324ffSWebb Scales */ 5702b69324ffSWebb Scales static int hpsa_send_test_unit_ready(struct ctlr_info *h, 5703b69324ffSWebb Scales struct CommandList *c, unsigned char lunaddr[], 5704b69324ffSWebb Scales int reply_queue) 5705edd16368SStephen M. Cameron { 57068919358eSTomas Henzl int rc; 5707edd16368SStephen M. Cameron 5708a2dac136SStephen M. Cameron /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */ 5709a2dac136SStephen M. Cameron (void) fill_cmd(c, TEST_UNIT_READY, h, 5710a2dac136SStephen M. Cameron NULL, 0, 0, lunaddr, TYPE_CMD); 5711c448ecfaSDon Brace rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 571225163bd5SWebb Scales if (rc) 5713b69324ffSWebb Scales return rc; 5714edd16368SStephen M. Cameron /* no unmap needed here because no data xfer. */ 5715edd16368SStephen M. Cameron 5716b69324ffSWebb Scales /* Check if the unit is already ready. */ 5717edd16368SStephen M. Cameron if (c->err_info->CommandStatus == CMD_SUCCESS) 5718b69324ffSWebb Scales return 0; 5719edd16368SStephen M. Cameron 5720b69324ffSWebb Scales /* 5721b69324ffSWebb Scales * The first command sent after reset will receive "unit attention" to 5722b69324ffSWebb Scales * indicate that the LUN has been reset...this is actually what we're 5723b69324ffSWebb Scales * looking for (but, success is good too). 5724b69324ffSWebb Scales */ 5725edd16368SStephen M. Cameron if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 5726edd16368SStephen M. Cameron c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION && 5727edd16368SStephen M. Cameron (c->err_info->SenseInfo[2] == NO_SENSE || 5728edd16368SStephen M. Cameron c->err_info->SenseInfo[2] == UNIT_ATTENTION)) 5729b69324ffSWebb Scales return 0; 5730b69324ffSWebb Scales 5731b69324ffSWebb Scales return 1; 5732b69324ffSWebb Scales } 5733b69324ffSWebb Scales 5734b69324ffSWebb Scales /* 5735b69324ffSWebb Scales * Wait for a TEST_UNIT_READY command to complete, retrying as necessary; 5736b69324ffSWebb Scales * returns zero when the unit is ready, and non-zero when giving up. 5737b69324ffSWebb Scales */ 5738b69324ffSWebb Scales static int hpsa_wait_for_test_unit_ready(struct ctlr_info *h, 5739b69324ffSWebb Scales struct CommandList *c, 5740b69324ffSWebb Scales unsigned char lunaddr[], int reply_queue) 5741b69324ffSWebb Scales { 5742b69324ffSWebb Scales int rc; 5743b69324ffSWebb Scales int count = 0; 5744b69324ffSWebb Scales int waittime = 1; /* seconds */ 5745b69324ffSWebb Scales 5746b69324ffSWebb Scales /* Send test unit ready until device ready, or give up. */ 5747b69324ffSWebb Scales for (count = 0; count < HPSA_TUR_RETRY_LIMIT; count++) { 5748b69324ffSWebb Scales 5749b69324ffSWebb Scales /* 5750b69324ffSWebb Scales * Wait for a bit. do this first, because if we send 5751b69324ffSWebb Scales * the TUR right away, the reset will just abort it. 5752b69324ffSWebb Scales */ 5753b69324ffSWebb Scales msleep(1000 * waittime); 5754b69324ffSWebb Scales 5755b69324ffSWebb Scales rc = hpsa_send_test_unit_ready(h, c, lunaddr, reply_queue); 5756b69324ffSWebb Scales if (!rc) 5757edd16368SStephen M. Cameron break; 5758b69324ffSWebb Scales 5759b69324ffSWebb Scales /* Increase wait time with each try, up to a point. */ 5760b69324ffSWebb Scales if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS) 5761b69324ffSWebb Scales waittime *= 2; 5762b69324ffSWebb Scales 5763b69324ffSWebb Scales dev_warn(&h->pdev->dev, 5764b69324ffSWebb Scales "waiting %d secs for device to become ready.\n", 5765b69324ffSWebb Scales waittime); 5766b69324ffSWebb Scales } 5767b69324ffSWebb Scales 5768b69324ffSWebb Scales return rc; 5769b69324ffSWebb Scales } 5770b69324ffSWebb Scales 5771b69324ffSWebb Scales static int wait_for_device_to_become_ready(struct ctlr_info *h, 5772b69324ffSWebb Scales unsigned char lunaddr[], 5773b69324ffSWebb Scales int reply_queue) 5774b69324ffSWebb Scales { 5775b69324ffSWebb Scales int first_queue; 5776b69324ffSWebb Scales int last_queue; 5777b69324ffSWebb Scales int rq; 5778b69324ffSWebb Scales int rc = 0; 5779b69324ffSWebb Scales struct CommandList *c; 5780b69324ffSWebb Scales 5781b69324ffSWebb Scales c = cmd_alloc(h); 5782b69324ffSWebb Scales 5783b69324ffSWebb Scales /* 5784b69324ffSWebb Scales * If no specific reply queue was requested, then send the TUR 5785b69324ffSWebb Scales * repeatedly, requesting a reply on each reply queue; otherwise execute 5786b69324ffSWebb Scales * the loop exactly once using only the specified queue. 5787b69324ffSWebb Scales */ 5788b69324ffSWebb Scales if (reply_queue == DEFAULT_REPLY_QUEUE) { 5789b69324ffSWebb Scales first_queue = 0; 5790b69324ffSWebb Scales last_queue = h->nreply_queues - 1; 5791b69324ffSWebb Scales } else { 5792b69324ffSWebb Scales first_queue = reply_queue; 5793b69324ffSWebb Scales last_queue = reply_queue; 5794b69324ffSWebb Scales } 5795b69324ffSWebb Scales 5796b69324ffSWebb Scales for (rq = first_queue; rq <= last_queue; rq++) { 5797b69324ffSWebb Scales rc = hpsa_wait_for_test_unit_ready(h, c, lunaddr, rq); 5798b69324ffSWebb Scales if (rc) 5799b69324ffSWebb Scales break; 5800edd16368SStephen M. Cameron } 5801edd16368SStephen M. Cameron 5802edd16368SStephen M. Cameron if (rc) 5803edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "giving up on device.\n"); 5804edd16368SStephen M. Cameron else 5805edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "device is ready.\n"); 5806edd16368SStephen M. Cameron 580745fcb86eSStephen Cameron cmd_free(h, c); 5808edd16368SStephen M. Cameron return rc; 5809edd16368SStephen M. Cameron } 5810edd16368SStephen M. Cameron 5811edd16368SStephen M. Cameron /* Need at least one of these error handlers to keep ../scsi/hosts.c from 5812edd16368SStephen M. Cameron * complaining. Doing a host- or bus-reset can't do anything good here. 5813edd16368SStephen M. Cameron */ 5814edd16368SStephen M. Cameron static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd) 5815edd16368SStephen M. Cameron { 5816edd16368SStephen M. Cameron int rc; 5817edd16368SStephen M. Cameron struct ctlr_info *h; 5818edd16368SStephen M. Cameron struct hpsa_scsi_dev_t *dev; 58190b9b7b6eSScott Teel u8 reset_type; 58202dc127bbSDan Carpenter char msg[48]; 5821edd16368SStephen M. Cameron 5822edd16368SStephen M. Cameron /* find the controller to which the command to be aborted was sent */ 5823edd16368SStephen M. Cameron h = sdev_to_hba(scsicmd->device); 5824edd16368SStephen M. Cameron if (h == NULL) /* paranoia */ 5825edd16368SStephen M. Cameron return FAILED; 5826e345893bSDon Brace 5827e345893bSDon Brace if (lockup_detected(h)) 5828e345893bSDon Brace return FAILED; 5829e345893bSDon Brace 5830edd16368SStephen M. Cameron dev = scsicmd->device->hostdata; 5831edd16368SStephen M. Cameron if (!dev) { 5832d604f533SWebb Scales dev_err(&h->pdev->dev, "%s: device lookup failed\n", __func__); 5833edd16368SStephen M. Cameron return FAILED; 5834edd16368SStephen M. Cameron } 583525163bd5SWebb Scales 583625163bd5SWebb Scales /* if controller locked up, we can guarantee command won't complete */ 583725163bd5SWebb Scales if (lockup_detected(h)) { 58382dc127bbSDan Carpenter snprintf(msg, sizeof(msg), 58392dc127bbSDan Carpenter "cmd %d RESET FAILED, lockup detected", 584073153fe5SWebb Scales hpsa_get_cmd_index(scsicmd)); 584173153fe5SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 584225163bd5SWebb Scales return FAILED; 584325163bd5SWebb Scales } 584425163bd5SWebb Scales 584525163bd5SWebb Scales /* this reset request might be the result of a lockup; check */ 584625163bd5SWebb Scales if (detect_controller_lockup(h)) { 58472dc127bbSDan Carpenter snprintf(msg, sizeof(msg), 58482dc127bbSDan Carpenter "cmd %d RESET FAILED, new lockup detected", 584973153fe5SWebb Scales hpsa_get_cmd_index(scsicmd)); 585073153fe5SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 585125163bd5SWebb Scales return FAILED; 585225163bd5SWebb Scales } 585325163bd5SWebb Scales 5854d604f533SWebb Scales /* Do not attempt on controller */ 5855d604f533SWebb Scales if (is_hba_lunid(dev->scsi3addr)) 5856d604f533SWebb Scales return SUCCESS; 5857d604f533SWebb Scales 58580b9b7b6eSScott Teel if (is_logical_dev_addr_mode(dev->scsi3addr)) 58590b9b7b6eSScott Teel reset_type = HPSA_DEVICE_RESET_MSG; 58600b9b7b6eSScott Teel else 58610b9b7b6eSScott Teel reset_type = HPSA_PHYS_TARGET_RESET; 58620b9b7b6eSScott Teel 58630b9b7b6eSScott Teel sprintf(msg, "resetting %s", 58640b9b7b6eSScott Teel reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical "); 58650b9b7b6eSScott Teel hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 586625163bd5SWebb Scales 5867da03ded0SDon Brace h->reset_in_progress = 1; 5868d416b0c7SStephen M. Cameron 5869edd16368SStephen M. Cameron /* send a reset to the SCSI LUN which the command was sent to */ 58700b9b7b6eSScott Teel rc = hpsa_do_reset(h, dev, dev->scsi3addr, reset_type, 587125163bd5SWebb Scales DEFAULT_REPLY_QUEUE); 58720b9b7b6eSScott Teel sprintf(msg, "reset %s %s", 58730b9b7b6eSScott Teel reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ", 58742dc127bbSDan Carpenter rc == 0 ? "completed successfully" : "failed"); 5875d604f533SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 5876da03ded0SDon Brace h->reset_in_progress = 0; 5877d604f533SWebb Scales return rc == 0 ? SUCCESS : FAILED; 5878edd16368SStephen M. Cameron } 5879edd16368SStephen M. Cameron 58806cba3f19SStephen M. Cameron static void swizzle_abort_tag(u8 *tag) 58816cba3f19SStephen M. Cameron { 58826cba3f19SStephen M. Cameron u8 original_tag[8]; 58836cba3f19SStephen M. Cameron 58846cba3f19SStephen M. Cameron memcpy(original_tag, tag, 8); 58856cba3f19SStephen M. Cameron tag[0] = original_tag[3]; 58866cba3f19SStephen M. Cameron tag[1] = original_tag[2]; 58876cba3f19SStephen M. Cameron tag[2] = original_tag[1]; 58886cba3f19SStephen M. Cameron tag[3] = original_tag[0]; 58896cba3f19SStephen M. Cameron tag[4] = original_tag[7]; 58906cba3f19SStephen M. Cameron tag[5] = original_tag[6]; 58916cba3f19SStephen M. Cameron tag[6] = original_tag[5]; 58926cba3f19SStephen M. Cameron tag[7] = original_tag[4]; 58936cba3f19SStephen M. Cameron } 58946cba3f19SStephen M. Cameron 589517eb87d2SScott Teel static void hpsa_get_tag(struct ctlr_info *h, 58962b08b3e9SDon Brace struct CommandList *c, __le32 *taglower, __le32 *tagupper) 589717eb87d2SScott Teel { 58982b08b3e9SDon Brace u64 tag; 589917eb87d2SScott Teel if (c->cmd_type == CMD_IOACCEL1) { 590017eb87d2SScott Teel struct io_accel1_cmd *cm1 = (struct io_accel1_cmd *) 590117eb87d2SScott Teel &h->ioaccel_cmd_pool[c->cmdindex]; 59022b08b3e9SDon Brace tag = le64_to_cpu(cm1->tag); 59032b08b3e9SDon Brace *tagupper = cpu_to_le32(tag >> 32); 59042b08b3e9SDon Brace *taglower = cpu_to_le32(tag); 590554b6e9e9SScott Teel return; 590654b6e9e9SScott Teel } 590754b6e9e9SScott Teel if (c->cmd_type == CMD_IOACCEL2) { 590854b6e9e9SScott Teel struct io_accel2_cmd *cm2 = (struct io_accel2_cmd *) 590954b6e9e9SScott Teel &h->ioaccel2_cmd_pool[c->cmdindex]; 5910dd0e19f3SScott Teel /* upper tag not used in ioaccel2 mode */ 5911dd0e19f3SScott Teel memset(tagupper, 0, sizeof(*tagupper)); 5912dd0e19f3SScott Teel *taglower = cm2->Tag; 591354b6e9e9SScott Teel return; 591454b6e9e9SScott Teel } 59152b08b3e9SDon Brace tag = le64_to_cpu(c->Header.tag); 59162b08b3e9SDon Brace *tagupper = cpu_to_le32(tag >> 32); 59172b08b3e9SDon Brace *taglower = cpu_to_le32(tag); 591817eb87d2SScott Teel } 591954b6e9e9SScott Teel 592075167d2cSStephen M. Cameron static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr, 59219b5c48c2SStephen Cameron struct CommandList *abort, int reply_queue) 592275167d2cSStephen M. Cameron { 592375167d2cSStephen M. Cameron int rc = IO_OK; 592475167d2cSStephen M. Cameron struct CommandList *c; 592575167d2cSStephen M. Cameron struct ErrorInfo *ei; 59262b08b3e9SDon Brace __le32 tagupper, taglower; 592775167d2cSStephen M. Cameron 592845fcb86eSStephen Cameron c = cmd_alloc(h); 592975167d2cSStephen M. Cameron 5930a2dac136SStephen M. Cameron /* fill_cmd can't fail here, no buffer to map */ 59319b5c48c2SStephen Cameron (void) fill_cmd(c, HPSA_ABORT_MSG, h, &abort->Header.tag, 5932a2dac136SStephen M. Cameron 0, 0, scsi3addr, TYPE_MSG); 59339b5c48c2SStephen Cameron if (h->needs_abort_tags_swizzled) 59346cba3f19SStephen M. Cameron swizzle_abort_tag(&c->Request.CDB[4]); 5935c448ecfaSDon Brace (void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 593617eb87d2SScott Teel hpsa_get_tag(h, abort, &taglower, &tagupper); 593725163bd5SWebb Scales dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd(abort) completed.\n", 593817eb87d2SScott Teel __func__, tagupper, taglower); 593975167d2cSStephen M. Cameron /* no unmap needed here because no data xfer. */ 594075167d2cSStephen M. Cameron 594175167d2cSStephen M. Cameron ei = c->err_info; 594275167d2cSStephen M. Cameron switch (ei->CommandStatus) { 594375167d2cSStephen M. Cameron case CMD_SUCCESS: 594475167d2cSStephen M. Cameron break; 59459437ac43SStephen Cameron case CMD_TMF_STATUS: 59469437ac43SStephen Cameron rc = hpsa_evaluate_tmf_status(h, c); 59479437ac43SStephen Cameron break; 594875167d2cSStephen M. Cameron case CMD_UNABORTABLE: /* Very common, don't make noise. */ 594975167d2cSStephen M. Cameron rc = -1; 595075167d2cSStephen M. Cameron break; 595175167d2cSStephen M. Cameron default: 595275167d2cSStephen M. Cameron dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n", 595317eb87d2SScott Teel __func__, tagupper, taglower); 5954d1e8beacSStephen M. Cameron hpsa_scsi_interpret_error(h, c); 595575167d2cSStephen M. Cameron rc = -1; 595675167d2cSStephen M. Cameron break; 595775167d2cSStephen M. Cameron } 595845fcb86eSStephen Cameron cmd_free(h, c); 5959dd0e19f3SScott Teel dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", 5960dd0e19f3SScott Teel __func__, tagupper, taglower); 596175167d2cSStephen M. Cameron return rc; 596275167d2cSStephen M. Cameron } 596375167d2cSStephen M. Cameron 59648be986ccSStephen Cameron static void setup_ioaccel2_abort_cmd(struct CommandList *c, struct ctlr_info *h, 59658be986ccSStephen Cameron struct CommandList *command_to_abort, int reply_queue) 59668be986ccSStephen Cameron { 59678be986ccSStephen Cameron struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 59688be986ccSStephen Cameron struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2; 59698be986ccSStephen Cameron struct io_accel2_cmd *c2a = 59708be986ccSStephen Cameron &h->ioaccel2_cmd_pool[command_to_abort->cmdindex]; 5971a58e7e53SWebb Scales struct scsi_cmnd *scmd = command_to_abort->scsi_cmd; 59728be986ccSStephen Cameron struct hpsa_scsi_dev_t *dev = scmd->device->hostdata; 59738be986ccSStephen Cameron 597445e596cdSDon Brace if (!dev) 597545e596cdSDon Brace return; 597645e596cdSDon Brace 59778be986ccSStephen Cameron /* 59788be986ccSStephen Cameron * We're overlaying struct hpsa_tmf_struct on top of something which 59798be986ccSStephen Cameron * was allocated as a struct io_accel2_cmd, so we better be sure it 59808be986ccSStephen Cameron * actually fits, and doesn't overrun the error info space. 59818be986ccSStephen Cameron */ 59828be986ccSStephen Cameron BUILD_BUG_ON(sizeof(struct hpsa_tmf_struct) > 59838be986ccSStephen Cameron sizeof(struct io_accel2_cmd)); 59848be986ccSStephen Cameron BUG_ON(offsetof(struct io_accel2_cmd, error_data) < 59858be986ccSStephen Cameron offsetof(struct hpsa_tmf_struct, error_len) + 59868be986ccSStephen Cameron sizeof(ac->error_len)); 59878be986ccSStephen Cameron 59888be986ccSStephen Cameron c->cmd_type = IOACCEL2_TMF; 5989a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 5990a58e7e53SWebb Scales 59918be986ccSStephen Cameron /* Adjust the DMA address to point to the accelerated command buffer */ 59928be986ccSStephen Cameron c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle + 59938be986ccSStephen Cameron (c->cmdindex * sizeof(struct io_accel2_cmd)); 59948be986ccSStephen Cameron BUG_ON(c->busaddr & 0x0000007F); 59958be986ccSStephen Cameron 59968be986ccSStephen Cameron memset(ac, 0, sizeof(*c2)); /* yes this is correct */ 59978be986ccSStephen Cameron ac->iu_type = IOACCEL2_IU_TMF_TYPE; 59988be986ccSStephen Cameron ac->reply_queue = reply_queue; 59998be986ccSStephen Cameron ac->tmf = IOACCEL2_TMF_ABORT; 60008be986ccSStephen Cameron ac->it_nexus = cpu_to_le32(dev->ioaccel_handle); 60018be986ccSStephen Cameron memset(ac->lun_id, 0, sizeof(ac->lun_id)); 60028be986ccSStephen Cameron ac->tag = cpu_to_le64(c->cmdindex << DIRECT_LOOKUP_SHIFT); 60038be986ccSStephen Cameron ac->abort_tag = cpu_to_le64(le32_to_cpu(c2a->Tag)); 60048be986ccSStephen Cameron ac->error_ptr = cpu_to_le64(c->busaddr + 60058be986ccSStephen Cameron offsetof(struct io_accel2_cmd, error_data)); 60068be986ccSStephen Cameron ac->error_len = cpu_to_le32(sizeof(c2->error_data)); 60078be986ccSStephen Cameron } 60088be986ccSStephen Cameron 600954b6e9e9SScott Teel /* ioaccel2 path firmware cannot handle abort task requests. 601054b6e9e9SScott Teel * Change abort requests to physical target reset, and send to the 601154b6e9e9SScott Teel * address of the physical disk used for the ioaccel 2 command. 601254b6e9e9SScott Teel * Return 0 on success (IO_OK) 601354b6e9e9SScott Teel * -1 on failure 601454b6e9e9SScott Teel */ 601554b6e9e9SScott Teel 601654b6e9e9SScott Teel static int hpsa_send_reset_as_abort_ioaccel2(struct ctlr_info *h, 601725163bd5SWebb Scales unsigned char *scsi3addr, struct CommandList *abort, int reply_queue) 601854b6e9e9SScott Teel { 601954b6e9e9SScott Teel int rc = IO_OK; 602054b6e9e9SScott Teel struct scsi_cmnd *scmd; /* scsi command within request being aborted */ 602154b6e9e9SScott Teel struct hpsa_scsi_dev_t *dev; /* device to which scsi cmd was sent */ 602254b6e9e9SScott Teel unsigned char phys_scsi3addr[8]; /* addr of phys disk with volume */ 602354b6e9e9SScott Teel unsigned char *psa = &phys_scsi3addr[0]; 602454b6e9e9SScott Teel 602554b6e9e9SScott Teel /* Get a pointer to the hpsa logical device. */ 60267fa3030cSStephen Cameron scmd = abort->scsi_cmd; 602754b6e9e9SScott Teel dev = (struct hpsa_scsi_dev_t *)(scmd->device->hostdata); 602854b6e9e9SScott Teel if (dev == NULL) { 602954b6e9e9SScott Teel dev_warn(&h->pdev->dev, 603054b6e9e9SScott Teel "Cannot abort: no device pointer for command.\n"); 603154b6e9e9SScott Teel return -1; /* not abortable */ 603254b6e9e9SScott Teel } 603354b6e9e9SScott Teel 60342ba8bfc8SStephen M. Cameron if (h->raid_offload_debug > 0) 60352ba8bfc8SStephen M. Cameron dev_info(&h->pdev->dev, 6036609a70dfSRasmus Villemoes "scsi %d:%d:%d:%d %s scsi3addr 0x%8phN\n", 60372ba8bfc8SStephen M. Cameron h->scsi_host->host_no, dev->bus, dev->target, dev->lun, 6038609a70dfSRasmus Villemoes "Reset as abort", scsi3addr); 60392ba8bfc8SStephen M. Cameron 604054b6e9e9SScott Teel if (!dev->offload_enabled) { 604154b6e9e9SScott Teel dev_warn(&h->pdev->dev, 604254b6e9e9SScott Teel "Can't abort: device is not operating in HP SSD Smart Path mode.\n"); 604354b6e9e9SScott Teel return -1; /* not abortable */ 604454b6e9e9SScott Teel } 604554b6e9e9SScott Teel 604654b6e9e9SScott Teel /* Incoming scsi3addr is logical addr. We need physical disk addr. */ 604754b6e9e9SScott Teel if (!hpsa_get_pdisk_of_ioaccel2(h, abort, psa)) { 604854b6e9e9SScott Teel dev_warn(&h->pdev->dev, "Can't abort: Failed lookup of physical address.\n"); 604954b6e9e9SScott Teel return -1; /* not abortable */ 605054b6e9e9SScott Teel } 605154b6e9e9SScott Teel 605254b6e9e9SScott Teel /* send the reset */ 60532ba8bfc8SStephen M. Cameron if (h->raid_offload_debug > 0) 60542ba8bfc8SStephen M. Cameron dev_info(&h->pdev->dev, 6055609a70dfSRasmus Villemoes "Reset as abort: Resetting physical device at scsi3addr 0x%8phN\n", 6056609a70dfSRasmus Villemoes psa); 6057b32ece0fSDon Brace rc = hpsa_do_reset(h, dev, psa, HPSA_PHYS_TARGET_RESET, reply_queue); 605854b6e9e9SScott Teel if (rc != 0) { 605954b6e9e9SScott Teel dev_warn(&h->pdev->dev, 6060609a70dfSRasmus Villemoes "Reset as abort: Failed on physical device at scsi3addr 0x%8phN\n", 6061609a70dfSRasmus Villemoes psa); 606254b6e9e9SScott Teel return rc; /* failed to reset */ 606354b6e9e9SScott Teel } 606454b6e9e9SScott Teel 606554b6e9e9SScott Teel /* wait for device to recover */ 6066b69324ffSWebb Scales if (wait_for_device_to_become_ready(h, psa, reply_queue) != 0) { 606754b6e9e9SScott Teel dev_warn(&h->pdev->dev, 6068609a70dfSRasmus Villemoes "Reset as abort: Failed: Device never recovered from reset: 0x%8phN\n", 6069609a70dfSRasmus Villemoes psa); 607054b6e9e9SScott Teel return -1; /* failed to recover */ 607154b6e9e9SScott Teel } 607254b6e9e9SScott Teel 607354b6e9e9SScott Teel /* device recovered */ 607454b6e9e9SScott Teel dev_info(&h->pdev->dev, 6075609a70dfSRasmus Villemoes "Reset as abort: Device recovered from reset: scsi3addr 0x%8phN\n", 6076609a70dfSRasmus Villemoes psa); 607754b6e9e9SScott Teel 607854b6e9e9SScott Teel return rc; /* success */ 607954b6e9e9SScott Teel } 608054b6e9e9SScott Teel 60818be986ccSStephen Cameron static int hpsa_send_abort_ioaccel2(struct ctlr_info *h, 60828be986ccSStephen Cameron struct CommandList *abort, int reply_queue) 60838be986ccSStephen Cameron { 60848be986ccSStephen Cameron int rc = IO_OK; 60858be986ccSStephen Cameron struct CommandList *c; 60868be986ccSStephen Cameron __le32 taglower, tagupper; 60878be986ccSStephen Cameron struct hpsa_scsi_dev_t *dev; 60888be986ccSStephen Cameron struct io_accel2_cmd *c2; 60898be986ccSStephen Cameron 60908be986ccSStephen Cameron dev = abort->scsi_cmd->device->hostdata; 609145e596cdSDon Brace if (!dev) 609245e596cdSDon Brace return -1; 609345e596cdSDon Brace 60948be986ccSStephen Cameron if (!dev->offload_enabled && !dev->hba_ioaccel_enabled) 60958be986ccSStephen Cameron return -1; 60968be986ccSStephen Cameron 60978be986ccSStephen Cameron c = cmd_alloc(h); 60988be986ccSStephen Cameron setup_ioaccel2_abort_cmd(c, h, abort, reply_queue); 60998be986ccSStephen Cameron c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 6100c448ecfaSDon Brace (void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 61018be986ccSStephen Cameron hpsa_get_tag(h, abort, &taglower, &tagupper); 61028be986ccSStephen Cameron dev_dbg(&h->pdev->dev, 61038be986ccSStephen Cameron "%s: Tag:0x%08x:%08x: do_simple_cmd(ioaccel2 abort) completed.\n", 61048be986ccSStephen Cameron __func__, tagupper, taglower); 61058be986ccSStephen Cameron /* no unmap needed here because no data xfer. */ 61068be986ccSStephen Cameron 61078be986ccSStephen Cameron dev_dbg(&h->pdev->dev, 61088be986ccSStephen Cameron "%s: Tag:0x%08x:%08x: abort service response = 0x%02x.\n", 61098be986ccSStephen Cameron __func__, tagupper, taglower, c2->error_data.serv_response); 61108be986ccSStephen Cameron switch (c2->error_data.serv_response) { 61118be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE: 61128be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS: 61138be986ccSStephen Cameron rc = 0; 61148be986ccSStephen Cameron break; 61158be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_TMF_REJECTED: 61168be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_FAILURE: 61178be986ccSStephen Cameron case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN: 61188be986ccSStephen Cameron rc = -1; 61198be986ccSStephen Cameron break; 61208be986ccSStephen Cameron default: 61218be986ccSStephen Cameron dev_warn(&h->pdev->dev, 61228be986ccSStephen Cameron "%s: Tag:0x%08x:%08x: unknown abort service response 0x%02x\n", 61238be986ccSStephen Cameron __func__, tagupper, taglower, 61248be986ccSStephen Cameron c2->error_data.serv_response); 61258be986ccSStephen Cameron rc = -1; 61268be986ccSStephen Cameron } 61278be986ccSStephen Cameron cmd_free(h, c); 61288be986ccSStephen Cameron dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", __func__, 61298be986ccSStephen Cameron tagupper, taglower); 61308be986ccSStephen Cameron return rc; 61318be986ccSStephen Cameron } 61328be986ccSStephen Cameron 61336cba3f19SStephen M. Cameron static int hpsa_send_abort_both_ways(struct ctlr_info *h, 613439f3deb2SDon Brace struct hpsa_scsi_dev_t *dev, struct CommandList *abort, int reply_queue) 61356cba3f19SStephen M. Cameron { 61368be986ccSStephen Cameron /* 61378be986ccSStephen Cameron * ioccelerator mode 2 commands should be aborted via the 613854b6e9e9SScott Teel * accelerated path, since RAID path is unaware of these commands, 61398be986ccSStephen Cameron * but not all underlying firmware can handle abort TMF. 61408be986ccSStephen Cameron * Change abort to physical device reset when abort TMF is unsupported. 614154b6e9e9SScott Teel */ 61428be986ccSStephen Cameron if (abort->cmd_type == CMD_IOACCEL2) { 614339f3deb2SDon Brace if ((HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags) || 614439f3deb2SDon Brace dev->physical_device) 61458be986ccSStephen Cameron return hpsa_send_abort_ioaccel2(h, abort, 61468be986ccSStephen Cameron reply_queue); 61478be986ccSStephen Cameron else 614839f3deb2SDon Brace return hpsa_send_reset_as_abort_ioaccel2(h, 614939f3deb2SDon Brace dev->scsi3addr, 615025163bd5SWebb Scales abort, reply_queue); 61518be986ccSStephen Cameron } 615239f3deb2SDon Brace return hpsa_send_abort(h, dev->scsi3addr, abort, reply_queue); 615325163bd5SWebb Scales } 615425163bd5SWebb Scales 615525163bd5SWebb Scales /* Find out which reply queue a command was meant to return on */ 615625163bd5SWebb Scales static int hpsa_extract_reply_queue(struct ctlr_info *h, 615725163bd5SWebb Scales struct CommandList *c) 615825163bd5SWebb Scales { 615925163bd5SWebb Scales if (c->cmd_type == CMD_IOACCEL2) 616025163bd5SWebb Scales return h->ioaccel2_cmd_pool[c->cmdindex].reply_queue; 616125163bd5SWebb Scales return c->Header.ReplyQueue; 61626cba3f19SStephen M. Cameron } 61636cba3f19SStephen M. Cameron 61649b5c48c2SStephen Cameron /* 61659b5c48c2SStephen Cameron * Limit concurrency of abort commands to prevent 61669b5c48c2SStephen Cameron * over-subscription of commands 61679b5c48c2SStephen Cameron */ 61689b5c48c2SStephen Cameron static inline int wait_for_available_abort_cmd(struct ctlr_info *h) 61699b5c48c2SStephen Cameron { 61709b5c48c2SStephen Cameron #define ABORT_CMD_WAIT_MSECS 5000 61719b5c48c2SStephen Cameron return !wait_event_timeout(h->abort_cmd_wait_queue, 61729b5c48c2SStephen Cameron atomic_dec_if_positive(&h->abort_cmds_available) >= 0, 61739b5c48c2SStephen Cameron msecs_to_jiffies(ABORT_CMD_WAIT_MSECS)); 61749b5c48c2SStephen Cameron } 61759b5c48c2SStephen Cameron 617675167d2cSStephen M. Cameron /* Send an abort for the specified command. 617775167d2cSStephen M. Cameron * If the device and controller support it, 617875167d2cSStephen M. Cameron * send a task abort request. 617975167d2cSStephen M. Cameron */ 618075167d2cSStephen M. Cameron static int hpsa_eh_abort_handler(struct scsi_cmnd *sc) 618175167d2cSStephen M. Cameron { 618275167d2cSStephen M. Cameron 6183a58e7e53SWebb Scales int rc; 618475167d2cSStephen M. Cameron struct ctlr_info *h; 618575167d2cSStephen M. Cameron struct hpsa_scsi_dev_t *dev; 618675167d2cSStephen M. Cameron struct CommandList *abort; /* pointer to command to be aborted */ 618775167d2cSStephen M. Cameron struct scsi_cmnd *as; /* ptr to scsi cmd inside aborted command. */ 618875167d2cSStephen M. Cameron char msg[256]; /* For debug messaging. */ 618975167d2cSStephen M. Cameron int ml = 0; 61902b08b3e9SDon Brace __le32 tagupper, taglower; 619125163bd5SWebb Scales int refcount, reply_queue; 619225163bd5SWebb Scales 619325163bd5SWebb Scales if (sc == NULL) 619425163bd5SWebb Scales return FAILED; 619575167d2cSStephen M. Cameron 61969b5c48c2SStephen Cameron if (sc->device == NULL) 61979b5c48c2SStephen Cameron return FAILED; 61989b5c48c2SStephen Cameron 619975167d2cSStephen M. Cameron /* Find the controller of the command to be aborted */ 620075167d2cSStephen M. Cameron h = sdev_to_hba(sc->device); 62019b5c48c2SStephen Cameron if (h == NULL) 620275167d2cSStephen M. Cameron return FAILED; 620375167d2cSStephen M. Cameron 620425163bd5SWebb Scales /* Find the device of the command to be aborted */ 620525163bd5SWebb Scales dev = sc->device->hostdata; 620625163bd5SWebb Scales if (!dev) { 620725163bd5SWebb Scales dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n", 620825163bd5SWebb Scales msg); 6209e345893bSDon Brace return FAILED; 621025163bd5SWebb Scales } 621125163bd5SWebb Scales 621225163bd5SWebb Scales /* If controller locked up, we can guarantee command won't complete */ 621325163bd5SWebb Scales if (lockup_detected(h)) { 621425163bd5SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, 621525163bd5SWebb Scales "ABORT FAILED, lockup detected"); 621625163bd5SWebb Scales return FAILED; 621725163bd5SWebb Scales } 621825163bd5SWebb Scales 621925163bd5SWebb Scales /* This is a good time to check if controller lockup has occurred */ 622025163bd5SWebb Scales if (detect_controller_lockup(h)) { 622125163bd5SWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, 622225163bd5SWebb Scales "ABORT FAILED, new lockup detected"); 622325163bd5SWebb Scales return FAILED; 622425163bd5SWebb Scales } 6225e345893bSDon Brace 622675167d2cSStephen M. Cameron /* Check that controller supports some kind of task abort */ 622775167d2cSStephen M. Cameron if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) && 622875167d2cSStephen M. Cameron !(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags)) 622975167d2cSStephen M. Cameron return FAILED; 623075167d2cSStephen M. Cameron 623175167d2cSStephen M. Cameron memset(msg, 0, sizeof(msg)); 62324b761557SRobert Elliott ml += sprintf(msg+ml, "scsi %d:%d:%d:%llu %s %p", 623375167d2cSStephen M. Cameron h->scsi_host->host_no, sc->device->channel, 62340d96ef5fSWebb Scales sc->device->id, sc->device->lun, 62354b761557SRobert Elliott "Aborting command", sc); 623675167d2cSStephen M. Cameron 623775167d2cSStephen M. Cameron /* Get SCSI command to be aborted */ 623875167d2cSStephen M. Cameron abort = (struct CommandList *) sc->host_scribble; 623975167d2cSStephen M. Cameron if (abort == NULL) { 6240281a7fd0SWebb Scales /* This can happen if the command already completed. */ 6241281a7fd0SWebb Scales return SUCCESS; 6242281a7fd0SWebb Scales } 6243281a7fd0SWebb Scales refcount = atomic_inc_return(&abort->refcount); 6244281a7fd0SWebb Scales if (refcount == 1) { /* Command is done already. */ 6245281a7fd0SWebb Scales cmd_free(h, abort); 6246281a7fd0SWebb Scales return SUCCESS; 624775167d2cSStephen M. Cameron } 62489b5c48c2SStephen Cameron 62499b5c48c2SStephen Cameron /* Don't bother trying the abort if we know it won't work. */ 62509b5c48c2SStephen Cameron if (abort->cmd_type != CMD_IOACCEL2 && 62519b5c48c2SStephen Cameron abort->cmd_type != CMD_IOACCEL1 && !dev->supports_aborts) { 62529b5c48c2SStephen Cameron cmd_free(h, abort); 62539b5c48c2SStephen Cameron return FAILED; 62549b5c48c2SStephen Cameron } 62559b5c48c2SStephen Cameron 6256a58e7e53SWebb Scales /* 6257a58e7e53SWebb Scales * Check that we're aborting the right command. 6258a58e7e53SWebb Scales * It's possible the CommandList already completed and got re-used. 6259a58e7e53SWebb Scales */ 6260a58e7e53SWebb Scales if (abort->scsi_cmd != sc) { 6261a58e7e53SWebb Scales cmd_free(h, abort); 6262a58e7e53SWebb Scales return SUCCESS; 6263a58e7e53SWebb Scales } 6264a58e7e53SWebb Scales 6265a58e7e53SWebb Scales abort->abort_pending = true; 626617eb87d2SScott Teel hpsa_get_tag(h, abort, &taglower, &tagupper); 626725163bd5SWebb Scales reply_queue = hpsa_extract_reply_queue(h, abort); 626817eb87d2SScott Teel ml += sprintf(msg+ml, "Tag:0x%08x:%08x ", tagupper, taglower); 62697fa3030cSStephen Cameron as = abort->scsi_cmd; 627075167d2cSStephen M. Cameron if (as != NULL) 62714b761557SRobert Elliott ml += sprintf(msg+ml, 62724b761557SRobert Elliott "CDBLen: %d CDB: 0x%02x%02x... SN: 0x%lx ", 62734b761557SRobert Elliott as->cmd_len, as->cmnd[0], as->cmnd[1], 62744b761557SRobert Elliott as->serial_number); 62754b761557SRobert Elliott dev_warn(&h->pdev->dev, "%s BEING SENT\n", msg); 62760d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, "Aborting command"); 62774b761557SRobert Elliott 627875167d2cSStephen M. Cameron /* 627975167d2cSStephen M. Cameron * Command is in flight, or possibly already completed 628075167d2cSStephen M. Cameron * by the firmware (but not to the scsi mid layer) but we can't 628175167d2cSStephen M. Cameron * distinguish which. Send the abort down. 628275167d2cSStephen M. Cameron */ 62839b5c48c2SStephen Cameron if (wait_for_available_abort_cmd(h)) { 62849b5c48c2SStephen Cameron dev_warn(&h->pdev->dev, 62854b761557SRobert Elliott "%s FAILED, timeout waiting for an abort command to become available.\n", 62864b761557SRobert Elliott msg); 62879b5c48c2SStephen Cameron cmd_free(h, abort); 62889b5c48c2SStephen Cameron return FAILED; 62899b5c48c2SStephen Cameron } 629039f3deb2SDon Brace rc = hpsa_send_abort_both_ways(h, dev, abort, reply_queue); 62919b5c48c2SStephen Cameron atomic_inc(&h->abort_cmds_available); 62929b5c48c2SStephen Cameron wake_up_all(&h->abort_cmd_wait_queue); 629375167d2cSStephen M. Cameron if (rc != 0) { 62944b761557SRobert Elliott dev_warn(&h->pdev->dev, "%s SENT, FAILED\n", msg); 62950d96ef5fSWebb Scales hpsa_show_dev_msg(KERN_WARNING, h, dev, 62960d96ef5fSWebb Scales "FAILED to abort command"); 6297281a7fd0SWebb Scales cmd_free(h, abort); 629875167d2cSStephen M. Cameron return FAILED; 629975167d2cSStephen M. Cameron } 63004b761557SRobert Elliott dev_info(&h->pdev->dev, "%s SENT, SUCCESS\n", msg); 6301d604f533SWebb Scales wait_event(h->event_sync_wait_queue, 6302a58e7e53SWebb Scales abort->scsi_cmd != sc || lockup_detected(h)); 6303281a7fd0SWebb Scales cmd_free(h, abort); 6304a58e7e53SWebb Scales return !lockup_detected(h) ? SUCCESS : FAILED; 630575167d2cSStephen M. Cameron } 630675167d2cSStephen M. Cameron 6307edd16368SStephen M. Cameron /* 630873153fe5SWebb Scales * For operations with an associated SCSI command, a command block is allocated 630973153fe5SWebb Scales * at init, and managed by cmd_tagged_alloc() and cmd_tagged_free() using the 631073153fe5SWebb Scales * block request tag as an index into a table of entries. cmd_tagged_free() is 631173153fe5SWebb Scales * the complement, although cmd_free() may be called instead. 631273153fe5SWebb Scales */ 631373153fe5SWebb Scales static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h, 631473153fe5SWebb Scales struct scsi_cmnd *scmd) 631573153fe5SWebb Scales { 631673153fe5SWebb Scales int idx = hpsa_get_cmd_index(scmd); 631773153fe5SWebb Scales struct CommandList *c = h->cmd_pool + idx; 631873153fe5SWebb Scales 631973153fe5SWebb Scales if (idx < HPSA_NRESERVED_CMDS || idx >= h->nr_cmds) { 632073153fe5SWebb Scales dev_err(&h->pdev->dev, "Bad block tag: %d not in [%d..%d]\n", 632173153fe5SWebb Scales idx, HPSA_NRESERVED_CMDS, h->nr_cmds - 1); 632273153fe5SWebb Scales /* The index value comes from the block layer, so if it's out of 632373153fe5SWebb Scales * bounds, it's probably not our bug. 632473153fe5SWebb Scales */ 632573153fe5SWebb Scales BUG(); 632673153fe5SWebb Scales } 632773153fe5SWebb Scales 632873153fe5SWebb Scales atomic_inc(&c->refcount); 632973153fe5SWebb Scales if (unlikely(!hpsa_is_cmd_idle(c))) { 633073153fe5SWebb Scales /* 633173153fe5SWebb Scales * We expect that the SCSI layer will hand us a unique tag 633273153fe5SWebb Scales * value. Thus, there should never be a collision here between 633373153fe5SWebb Scales * two requests...because if the selected command isn't idle 633473153fe5SWebb Scales * then someone is going to be very disappointed. 633573153fe5SWebb Scales */ 633673153fe5SWebb Scales dev_err(&h->pdev->dev, 633773153fe5SWebb Scales "tag collision (tag=%d) in cmd_tagged_alloc().\n", 633873153fe5SWebb Scales idx); 633973153fe5SWebb Scales if (c->scsi_cmd != NULL) 634073153fe5SWebb Scales scsi_print_command(c->scsi_cmd); 634173153fe5SWebb Scales scsi_print_command(scmd); 634273153fe5SWebb Scales } 634373153fe5SWebb Scales 634473153fe5SWebb Scales hpsa_cmd_partial_init(h, idx, c); 634573153fe5SWebb Scales return c; 634673153fe5SWebb Scales } 634773153fe5SWebb Scales 634873153fe5SWebb Scales static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c) 634973153fe5SWebb Scales { 635073153fe5SWebb Scales /* 635173153fe5SWebb Scales * Release our reference to the block. We don't need to do anything 635273153fe5SWebb Scales * else to free it, because it is accessed by index. (There's no point 635373153fe5SWebb Scales * in checking the result of the decrement, since we cannot guarantee 635473153fe5SWebb Scales * that there isn't a concurrent abort which is also accessing it.) 635573153fe5SWebb Scales */ 635673153fe5SWebb Scales (void)atomic_dec(&c->refcount); 635773153fe5SWebb Scales } 635873153fe5SWebb Scales 635973153fe5SWebb Scales /* 6360edd16368SStephen M. Cameron * For operations that cannot sleep, a command block is allocated at init, 6361edd16368SStephen M. Cameron * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track 6362edd16368SStephen M. Cameron * which ones are free or in use. Lock must be held when calling this. 6363edd16368SStephen M. Cameron * cmd_free() is the complement. 6364bf43caf3SRobert Elliott * This function never gives up and returns NULL. If it hangs, 6365bf43caf3SRobert Elliott * another thread must call cmd_free() to free some tags. 6366edd16368SStephen M. Cameron */ 6367281a7fd0SWebb Scales 6368edd16368SStephen M. Cameron static struct CommandList *cmd_alloc(struct ctlr_info *h) 6369edd16368SStephen M. Cameron { 6370edd16368SStephen M. Cameron struct CommandList *c; 6371360c73bdSStephen Cameron int refcount, i; 637273153fe5SWebb Scales int offset = 0; 6373edd16368SStephen M. Cameron 637433811026SRobert Elliott /* 637533811026SRobert Elliott * There is some *extremely* small but non-zero chance that that 63764c413128SStephen M. Cameron * multiple threads could get in here, and one thread could 63774c413128SStephen M. Cameron * be scanning through the list of bits looking for a free 63784c413128SStephen M. Cameron * one, but the free ones are always behind him, and other 63794c413128SStephen M. Cameron * threads sneak in behind him and eat them before he can 63804c413128SStephen M. Cameron * get to them, so that while there is always a free one, a 63814c413128SStephen M. Cameron * very unlucky thread might be starved anyway, never able to 63824c413128SStephen M. Cameron * beat the other threads. In reality, this happens so 63834c413128SStephen M. Cameron * infrequently as to be indistinguishable from never. 638473153fe5SWebb Scales * 638573153fe5SWebb Scales * Note that we start allocating commands before the SCSI host structure 638673153fe5SWebb Scales * is initialized. Since the search starts at bit zero, this 638773153fe5SWebb Scales * all works, since we have at least one command structure available; 638873153fe5SWebb Scales * however, it means that the structures with the low indexes have to be 638973153fe5SWebb Scales * reserved for driver-initiated requests, while requests from the block 639073153fe5SWebb Scales * layer will use the higher indexes. 63914c413128SStephen M. Cameron */ 63924c413128SStephen M. Cameron 6393281a7fd0SWebb Scales for (;;) { 639473153fe5SWebb Scales i = find_next_zero_bit(h->cmd_pool_bits, 639573153fe5SWebb Scales HPSA_NRESERVED_CMDS, 639673153fe5SWebb Scales offset); 639773153fe5SWebb Scales if (unlikely(i >= HPSA_NRESERVED_CMDS)) { 6398281a7fd0SWebb Scales offset = 0; 6399281a7fd0SWebb Scales continue; 6400281a7fd0SWebb Scales } 6401edd16368SStephen M. Cameron c = h->cmd_pool + i; 6402281a7fd0SWebb Scales refcount = atomic_inc_return(&c->refcount); 6403281a7fd0SWebb Scales if (unlikely(refcount > 1)) { 6404281a7fd0SWebb Scales cmd_free(h, c); /* already in use */ 640573153fe5SWebb Scales offset = (i + 1) % HPSA_NRESERVED_CMDS; 6406281a7fd0SWebb Scales continue; 6407281a7fd0SWebb Scales } 6408281a7fd0SWebb Scales set_bit(i & (BITS_PER_LONG - 1), 6409281a7fd0SWebb Scales h->cmd_pool_bits + (i / BITS_PER_LONG)); 6410281a7fd0SWebb Scales break; /* it's ours now. */ 6411281a7fd0SWebb Scales } 6412360c73bdSStephen Cameron hpsa_cmd_partial_init(h, i, c); 6413edd16368SStephen M. Cameron return c; 6414edd16368SStephen M. Cameron } 6415edd16368SStephen M. Cameron 641673153fe5SWebb Scales /* 641773153fe5SWebb Scales * This is the complementary operation to cmd_alloc(). Note, however, in some 641873153fe5SWebb Scales * corner cases it may also be used to free blocks allocated by 641973153fe5SWebb Scales * cmd_tagged_alloc() in which case the ref-count decrement does the trick and 642073153fe5SWebb Scales * the clear-bit is harmless. 642173153fe5SWebb Scales */ 6422edd16368SStephen M. Cameron static void cmd_free(struct ctlr_info *h, struct CommandList *c) 6423edd16368SStephen M. Cameron { 6424281a7fd0SWebb Scales if (atomic_dec_and_test(&c->refcount)) { 6425edd16368SStephen M. Cameron int i; 6426edd16368SStephen M. Cameron 6427edd16368SStephen M. Cameron i = c - h->cmd_pool; 6428edd16368SStephen M. Cameron clear_bit(i & (BITS_PER_LONG - 1), 6429edd16368SStephen M. Cameron h->cmd_pool_bits + (i / BITS_PER_LONG)); 6430edd16368SStephen M. Cameron } 6431281a7fd0SWebb Scales } 6432edd16368SStephen M. Cameron 6433edd16368SStephen M. Cameron #ifdef CONFIG_COMPAT 6434edd16368SStephen M. Cameron 643542a91641SDon Brace static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, 643642a91641SDon Brace void __user *arg) 6437edd16368SStephen M. Cameron { 6438edd16368SStephen M. Cameron IOCTL32_Command_struct __user *arg32 = 6439edd16368SStephen M. Cameron (IOCTL32_Command_struct __user *) arg; 6440edd16368SStephen M. Cameron IOCTL_Command_struct arg64; 6441edd16368SStephen M. Cameron IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64)); 6442edd16368SStephen M. Cameron int err; 6443edd16368SStephen M. Cameron u32 cp; 6444edd16368SStephen M. Cameron 6445938abd84SVasiliy Kulikov memset(&arg64, 0, sizeof(arg64)); 6446edd16368SStephen M. Cameron err = 0; 6447edd16368SStephen M. Cameron err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 6448edd16368SStephen M. Cameron sizeof(arg64.LUN_info)); 6449edd16368SStephen M. Cameron err |= copy_from_user(&arg64.Request, &arg32->Request, 6450edd16368SStephen M. Cameron sizeof(arg64.Request)); 6451edd16368SStephen M. Cameron err |= copy_from_user(&arg64.error_info, &arg32->error_info, 6452edd16368SStephen M. Cameron sizeof(arg64.error_info)); 6453edd16368SStephen M. Cameron err |= get_user(arg64.buf_size, &arg32->buf_size); 6454edd16368SStephen M. Cameron err |= get_user(cp, &arg32->buf); 6455edd16368SStephen M. Cameron arg64.buf = compat_ptr(cp); 6456edd16368SStephen M. Cameron err |= copy_to_user(p, &arg64, sizeof(arg64)); 6457edd16368SStephen M. Cameron 6458edd16368SStephen M. Cameron if (err) 6459edd16368SStephen M. Cameron return -EFAULT; 6460edd16368SStephen M. Cameron 646142a91641SDon Brace err = hpsa_ioctl(dev, CCISS_PASSTHRU, p); 6462edd16368SStephen M. Cameron if (err) 6463edd16368SStephen M. Cameron return err; 6464edd16368SStephen M. Cameron err |= copy_in_user(&arg32->error_info, &p->error_info, 6465edd16368SStephen M. Cameron sizeof(arg32->error_info)); 6466edd16368SStephen M. Cameron if (err) 6467edd16368SStephen M. Cameron return -EFAULT; 6468edd16368SStephen M. Cameron return err; 6469edd16368SStephen M. Cameron } 6470edd16368SStephen M. Cameron 6471edd16368SStephen M. Cameron static int hpsa_ioctl32_big_passthru(struct scsi_device *dev, 647242a91641SDon Brace int cmd, void __user *arg) 6473edd16368SStephen M. Cameron { 6474edd16368SStephen M. Cameron BIG_IOCTL32_Command_struct __user *arg32 = 6475edd16368SStephen M. Cameron (BIG_IOCTL32_Command_struct __user *) arg; 6476edd16368SStephen M. Cameron BIG_IOCTL_Command_struct arg64; 6477edd16368SStephen M. Cameron BIG_IOCTL_Command_struct __user *p = 6478edd16368SStephen M. Cameron compat_alloc_user_space(sizeof(arg64)); 6479edd16368SStephen M. Cameron int err; 6480edd16368SStephen M. Cameron u32 cp; 6481edd16368SStephen M. Cameron 6482938abd84SVasiliy Kulikov memset(&arg64, 0, sizeof(arg64)); 6483edd16368SStephen M. Cameron err = 0; 6484edd16368SStephen M. Cameron err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 6485edd16368SStephen M. Cameron sizeof(arg64.LUN_info)); 6486edd16368SStephen M. Cameron err |= copy_from_user(&arg64.Request, &arg32->Request, 6487edd16368SStephen M. Cameron sizeof(arg64.Request)); 6488edd16368SStephen M. Cameron err |= copy_from_user(&arg64.error_info, &arg32->error_info, 6489edd16368SStephen M. Cameron sizeof(arg64.error_info)); 6490edd16368SStephen M. Cameron err |= get_user(arg64.buf_size, &arg32->buf_size); 6491edd16368SStephen M. Cameron err |= get_user(arg64.malloc_size, &arg32->malloc_size); 6492edd16368SStephen M. Cameron err |= get_user(cp, &arg32->buf); 6493edd16368SStephen M. Cameron arg64.buf = compat_ptr(cp); 6494edd16368SStephen M. Cameron err |= copy_to_user(p, &arg64, sizeof(arg64)); 6495edd16368SStephen M. Cameron 6496edd16368SStephen M. Cameron if (err) 6497edd16368SStephen M. Cameron return -EFAULT; 6498edd16368SStephen M. Cameron 649942a91641SDon Brace err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, p); 6500edd16368SStephen M. Cameron if (err) 6501edd16368SStephen M. Cameron return err; 6502edd16368SStephen M. Cameron err |= copy_in_user(&arg32->error_info, &p->error_info, 6503edd16368SStephen M. Cameron sizeof(arg32->error_info)); 6504edd16368SStephen M. Cameron if (err) 6505edd16368SStephen M. Cameron return -EFAULT; 6506edd16368SStephen M. Cameron return err; 6507edd16368SStephen M. Cameron } 650871fe75a7SStephen M. Cameron 650942a91641SDon Brace static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void __user *arg) 651071fe75a7SStephen M. Cameron { 651171fe75a7SStephen M. Cameron switch (cmd) { 651271fe75a7SStephen M. Cameron case CCISS_GETPCIINFO: 651371fe75a7SStephen M. Cameron case CCISS_GETINTINFO: 651471fe75a7SStephen M. Cameron case CCISS_SETINTINFO: 651571fe75a7SStephen M. Cameron case CCISS_GETNODENAME: 651671fe75a7SStephen M. Cameron case CCISS_SETNODENAME: 651771fe75a7SStephen M. Cameron case CCISS_GETHEARTBEAT: 651871fe75a7SStephen M. Cameron case CCISS_GETBUSTYPES: 651971fe75a7SStephen M. Cameron case CCISS_GETFIRMVER: 652071fe75a7SStephen M. Cameron case CCISS_GETDRIVVER: 652171fe75a7SStephen M. Cameron case CCISS_REVALIDVOLS: 652271fe75a7SStephen M. Cameron case CCISS_DEREGDISK: 652371fe75a7SStephen M. Cameron case CCISS_REGNEWDISK: 652471fe75a7SStephen M. Cameron case CCISS_REGNEWD: 652571fe75a7SStephen M. Cameron case CCISS_RESCANDISK: 652671fe75a7SStephen M. Cameron case CCISS_GETLUNINFO: 652771fe75a7SStephen M. Cameron return hpsa_ioctl(dev, cmd, arg); 652871fe75a7SStephen M. Cameron 652971fe75a7SStephen M. Cameron case CCISS_PASSTHRU32: 653071fe75a7SStephen M. Cameron return hpsa_ioctl32_passthru(dev, cmd, arg); 653171fe75a7SStephen M. Cameron case CCISS_BIG_PASSTHRU32: 653271fe75a7SStephen M. Cameron return hpsa_ioctl32_big_passthru(dev, cmd, arg); 653371fe75a7SStephen M. Cameron 653471fe75a7SStephen M. Cameron default: 653571fe75a7SStephen M. Cameron return -ENOIOCTLCMD; 653671fe75a7SStephen M. Cameron } 653771fe75a7SStephen M. Cameron } 6538edd16368SStephen M. Cameron #endif 6539edd16368SStephen M. Cameron 6540edd16368SStephen M. Cameron static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp) 6541edd16368SStephen M. Cameron { 6542edd16368SStephen M. Cameron struct hpsa_pci_info pciinfo; 6543edd16368SStephen M. Cameron 6544edd16368SStephen M. Cameron if (!argp) 6545edd16368SStephen M. Cameron return -EINVAL; 6546edd16368SStephen M. Cameron pciinfo.domain = pci_domain_nr(h->pdev->bus); 6547edd16368SStephen M. Cameron pciinfo.bus = h->pdev->bus->number; 6548edd16368SStephen M. Cameron pciinfo.dev_fn = h->pdev->devfn; 6549edd16368SStephen M. Cameron pciinfo.board_id = h->board_id; 6550edd16368SStephen M. Cameron if (copy_to_user(argp, &pciinfo, sizeof(pciinfo))) 6551edd16368SStephen M. Cameron return -EFAULT; 6552edd16368SStephen M. Cameron return 0; 6553edd16368SStephen M. Cameron } 6554edd16368SStephen M. Cameron 6555edd16368SStephen M. Cameron static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp) 6556edd16368SStephen M. Cameron { 6557edd16368SStephen M. Cameron DriverVer_type DriverVer; 6558edd16368SStephen M. Cameron unsigned char vmaj, vmin, vsubmin; 6559edd16368SStephen M. Cameron int rc; 6560edd16368SStephen M. Cameron 6561edd16368SStephen M. Cameron rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu", 6562edd16368SStephen M. Cameron &vmaj, &vmin, &vsubmin); 6563edd16368SStephen M. Cameron if (rc != 3) { 6564edd16368SStephen M. Cameron dev_info(&h->pdev->dev, "driver version string '%s' " 6565edd16368SStephen M. Cameron "unrecognized.", HPSA_DRIVER_VERSION); 6566edd16368SStephen M. Cameron vmaj = 0; 6567edd16368SStephen M. Cameron vmin = 0; 6568edd16368SStephen M. Cameron vsubmin = 0; 6569edd16368SStephen M. Cameron } 6570edd16368SStephen M. Cameron DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin; 6571edd16368SStephen M. Cameron if (!argp) 6572edd16368SStephen M. Cameron return -EINVAL; 6573edd16368SStephen M. Cameron if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type))) 6574edd16368SStephen M. Cameron return -EFAULT; 6575edd16368SStephen M. Cameron return 0; 6576edd16368SStephen M. Cameron } 6577edd16368SStephen M. Cameron 6578edd16368SStephen M. Cameron static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp) 6579edd16368SStephen M. Cameron { 6580edd16368SStephen M. Cameron IOCTL_Command_struct iocommand; 6581edd16368SStephen M. Cameron struct CommandList *c; 6582edd16368SStephen M. Cameron char *buff = NULL; 658350a0decfSStephen M. Cameron u64 temp64; 6584c1f63c8fSStephen M. Cameron int rc = 0; 6585edd16368SStephen M. Cameron 6586edd16368SStephen M. Cameron if (!argp) 6587edd16368SStephen M. Cameron return -EINVAL; 6588edd16368SStephen M. Cameron if (!capable(CAP_SYS_RAWIO)) 6589edd16368SStephen M. Cameron return -EPERM; 6590edd16368SStephen M. Cameron if (copy_from_user(&iocommand, argp, sizeof(iocommand))) 6591edd16368SStephen M. Cameron return -EFAULT; 6592edd16368SStephen M. Cameron if ((iocommand.buf_size < 1) && 6593edd16368SStephen M. Cameron (iocommand.Request.Type.Direction != XFER_NONE)) { 6594edd16368SStephen M. Cameron return -EINVAL; 6595edd16368SStephen M. Cameron } 6596edd16368SStephen M. Cameron if (iocommand.buf_size > 0) { 6597edd16368SStephen M. Cameron buff = kmalloc(iocommand.buf_size, GFP_KERNEL); 6598edd16368SStephen M. Cameron if (buff == NULL) 65992dd02d74SRobert Elliott return -ENOMEM; 66009233fb10SStephen M. Cameron if (iocommand.Request.Type.Direction & XFER_WRITE) { 6601edd16368SStephen M. Cameron /* Copy the data into the buffer we created */ 6602b03a7771SStephen M. Cameron if (copy_from_user(buff, iocommand.buf, 6603b03a7771SStephen M. Cameron iocommand.buf_size)) { 6604c1f63c8fSStephen M. Cameron rc = -EFAULT; 6605c1f63c8fSStephen M. Cameron goto out_kfree; 6606edd16368SStephen M. Cameron } 6607b03a7771SStephen M. Cameron } else { 6608edd16368SStephen M. Cameron memset(buff, 0, iocommand.buf_size); 6609b03a7771SStephen M. Cameron } 6610b03a7771SStephen M. Cameron } 661145fcb86eSStephen Cameron c = cmd_alloc(h); 6612bf43caf3SRobert Elliott 6613edd16368SStephen M. Cameron /* Fill in the command type */ 6614edd16368SStephen M. Cameron c->cmd_type = CMD_IOCTL_PEND; 6615a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 6616edd16368SStephen M. Cameron /* Fill in Command Header */ 6617edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; /* unused in simple mode */ 6618edd16368SStephen M. Cameron if (iocommand.buf_size > 0) { /* buffer to fill */ 6619edd16368SStephen M. Cameron c->Header.SGList = 1; 662050a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(1); 6621edd16368SStephen M. Cameron } else { /* no buffers to fill */ 6622edd16368SStephen M. Cameron c->Header.SGList = 0; 662350a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(0); 6624edd16368SStephen M. Cameron } 6625edd16368SStephen M. Cameron memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN)); 6626edd16368SStephen M. Cameron 6627edd16368SStephen M. Cameron /* Fill in Request block */ 6628edd16368SStephen M. Cameron memcpy(&c->Request, &iocommand.Request, 6629edd16368SStephen M. Cameron sizeof(c->Request)); 6630edd16368SStephen M. Cameron 6631edd16368SStephen M. Cameron /* Fill in the scatter gather information */ 6632edd16368SStephen M. Cameron if (iocommand.buf_size > 0) { 663350a0decfSStephen M. Cameron temp64 = pci_map_single(h->pdev, buff, 6634edd16368SStephen M. Cameron iocommand.buf_size, PCI_DMA_BIDIRECTIONAL); 663550a0decfSStephen M. Cameron if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) { 663650a0decfSStephen M. Cameron c->SG[0].Addr = cpu_to_le64(0); 663750a0decfSStephen M. Cameron c->SG[0].Len = cpu_to_le32(0); 6638bcc48ffaSStephen M. Cameron rc = -ENOMEM; 6639bcc48ffaSStephen M. Cameron goto out; 6640bcc48ffaSStephen M. Cameron } 664150a0decfSStephen M. Cameron c->SG[0].Addr = cpu_to_le64(temp64); 664250a0decfSStephen M. Cameron c->SG[0].Len = cpu_to_le32(iocommand.buf_size); 664350a0decfSStephen M. Cameron c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */ 6644edd16368SStephen M. Cameron } 6645c448ecfaSDon Brace rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 66463fb134cbSDon Brace NO_TIMEOUT); 6647c2dd32e0SStephen M. Cameron if (iocommand.buf_size > 0) 6648edd16368SStephen M. Cameron hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL); 6649edd16368SStephen M. Cameron check_ioctl_unit_attention(h, c); 665025163bd5SWebb Scales if (rc) { 665125163bd5SWebb Scales rc = -EIO; 665225163bd5SWebb Scales goto out; 665325163bd5SWebb Scales } 6654edd16368SStephen M. Cameron 6655edd16368SStephen M. Cameron /* Copy the error information out */ 6656edd16368SStephen M. Cameron memcpy(&iocommand.error_info, c->err_info, 6657edd16368SStephen M. Cameron sizeof(iocommand.error_info)); 6658edd16368SStephen M. Cameron if (copy_to_user(argp, &iocommand, sizeof(iocommand))) { 6659c1f63c8fSStephen M. Cameron rc = -EFAULT; 6660c1f63c8fSStephen M. Cameron goto out; 6661edd16368SStephen M. Cameron } 66629233fb10SStephen M. Cameron if ((iocommand.Request.Type.Direction & XFER_READ) && 6663b03a7771SStephen M. Cameron iocommand.buf_size > 0) { 6664edd16368SStephen M. Cameron /* Copy the data out of the buffer we created */ 6665edd16368SStephen M. Cameron if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) { 6666c1f63c8fSStephen M. Cameron rc = -EFAULT; 6667c1f63c8fSStephen M. Cameron goto out; 6668edd16368SStephen M. Cameron } 6669edd16368SStephen M. Cameron } 6670c1f63c8fSStephen M. Cameron out: 667145fcb86eSStephen Cameron cmd_free(h, c); 6672c1f63c8fSStephen M. Cameron out_kfree: 6673c1f63c8fSStephen M. Cameron kfree(buff); 6674c1f63c8fSStephen M. Cameron return rc; 6675edd16368SStephen M. Cameron } 6676edd16368SStephen M. Cameron 6677edd16368SStephen M. Cameron static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp) 6678edd16368SStephen M. Cameron { 6679edd16368SStephen M. Cameron BIG_IOCTL_Command_struct *ioc; 6680edd16368SStephen M. Cameron struct CommandList *c; 6681edd16368SStephen M. Cameron unsigned char **buff = NULL; 6682edd16368SStephen M. Cameron int *buff_size = NULL; 668350a0decfSStephen M. Cameron u64 temp64; 6684edd16368SStephen M. Cameron BYTE sg_used = 0; 6685edd16368SStephen M. Cameron int status = 0; 668601a02ffcSStephen M. Cameron u32 left; 668701a02ffcSStephen M. Cameron u32 sz; 6688edd16368SStephen M. Cameron BYTE __user *data_ptr; 6689edd16368SStephen M. Cameron 6690edd16368SStephen M. Cameron if (!argp) 6691edd16368SStephen M. Cameron return -EINVAL; 6692edd16368SStephen M. Cameron if (!capable(CAP_SYS_RAWIO)) 6693edd16368SStephen M. Cameron return -EPERM; 669419be606bSJavier Martinez Canillas ioc = kmalloc(sizeof(*ioc), GFP_KERNEL); 6695edd16368SStephen M. Cameron if (!ioc) { 6696edd16368SStephen M. Cameron status = -ENOMEM; 6697edd16368SStephen M. Cameron goto cleanup1; 6698edd16368SStephen M. Cameron } 6699edd16368SStephen M. Cameron if (copy_from_user(ioc, argp, sizeof(*ioc))) { 6700edd16368SStephen M. Cameron status = -EFAULT; 6701edd16368SStephen M. Cameron goto cleanup1; 6702edd16368SStephen M. Cameron } 6703edd16368SStephen M. Cameron if ((ioc->buf_size < 1) && 6704edd16368SStephen M. Cameron (ioc->Request.Type.Direction != XFER_NONE)) { 6705edd16368SStephen M. Cameron status = -EINVAL; 6706edd16368SStephen M. Cameron goto cleanup1; 6707edd16368SStephen M. Cameron } 6708edd16368SStephen M. Cameron /* Check kmalloc limits using all SGs */ 6709edd16368SStephen M. Cameron if (ioc->malloc_size > MAX_KMALLOC_SIZE) { 6710edd16368SStephen M. Cameron status = -EINVAL; 6711edd16368SStephen M. Cameron goto cleanup1; 6712edd16368SStephen M. Cameron } 6713d66ae08bSStephen M. Cameron if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) { 6714edd16368SStephen M. Cameron status = -EINVAL; 6715edd16368SStephen M. Cameron goto cleanup1; 6716edd16368SStephen M. Cameron } 6717d66ae08bSStephen M. Cameron buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL); 6718edd16368SStephen M. Cameron if (!buff) { 6719edd16368SStephen M. Cameron status = -ENOMEM; 6720edd16368SStephen M. Cameron goto cleanup1; 6721edd16368SStephen M. Cameron } 6722d66ae08bSStephen M. Cameron buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL); 6723edd16368SStephen M. Cameron if (!buff_size) { 6724edd16368SStephen M. Cameron status = -ENOMEM; 6725edd16368SStephen M. Cameron goto cleanup1; 6726edd16368SStephen M. Cameron } 6727edd16368SStephen M. Cameron left = ioc->buf_size; 6728edd16368SStephen M. Cameron data_ptr = ioc->buf; 6729edd16368SStephen M. Cameron while (left) { 6730edd16368SStephen M. Cameron sz = (left > ioc->malloc_size) ? ioc->malloc_size : left; 6731edd16368SStephen M. Cameron buff_size[sg_used] = sz; 6732edd16368SStephen M. Cameron buff[sg_used] = kmalloc(sz, GFP_KERNEL); 6733edd16368SStephen M. Cameron if (buff[sg_used] == NULL) { 6734edd16368SStephen M. Cameron status = -ENOMEM; 6735edd16368SStephen M. Cameron goto cleanup1; 6736edd16368SStephen M. Cameron } 67379233fb10SStephen M. Cameron if (ioc->Request.Type.Direction & XFER_WRITE) { 6738edd16368SStephen M. Cameron if (copy_from_user(buff[sg_used], data_ptr, sz)) { 67390758f4f7SStephen M. Cameron status = -EFAULT; 6740edd16368SStephen M. Cameron goto cleanup1; 6741edd16368SStephen M. Cameron } 6742edd16368SStephen M. Cameron } else 6743edd16368SStephen M. Cameron memset(buff[sg_used], 0, sz); 6744edd16368SStephen M. Cameron left -= sz; 6745edd16368SStephen M. Cameron data_ptr += sz; 6746edd16368SStephen M. Cameron sg_used++; 6747edd16368SStephen M. Cameron } 674845fcb86eSStephen Cameron c = cmd_alloc(h); 6749bf43caf3SRobert Elliott 6750edd16368SStephen M. Cameron c->cmd_type = CMD_IOCTL_PEND; 6751a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 6752edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; 675350a0decfSStephen M. Cameron c->Header.SGList = (u8) sg_used; 675450a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(sg_used); 6755edd16368SStephen M. Cameron memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN)); 6756edd16368SStephen M. Cameron memcpy(&c->Request, &ioc->Request, sizeof(c->Request)); 6757edd16368SStephen M. Cameron if (ioc->buf_size > 0) { 6758edd16368SStephen M. Cameron int i; 6759edd16368SStephen M. Cameron for (i = 0; i < sg_used; i++) { 676050a0decfSStephen M. Cameron temp64 = pci_map_single(h->pdev, buff[i], 6761edd16368SStephen M. Cameron buff_size[i], PCI_DMA_BIDIRECTIONAL); 676250a0decfSStephen M. Cameron if (dma_mapping_error(&h->pdev->dev, 676350a0decfSStephen M. Cameron (dma_addr_t) temp64)) { 676450a0decfSStephen M. Cameron c->SG[i].Addr = cpu_to_le64(0); 676550a0decfSStephen M. Cameron c->SG[i].Len = cpu_to_le32(0); 6766bcc48ffaSStephen M. Cameron hpsa_pci_unmap(h->pdev, c, i, 6767bcc48ffaSStephen M. Cameron PCI_DMA_BIDIRECTIONAL); 6768bcc48ffaSStephen M. Cameron status = -ENOMEM; 6769e2d4a1f6SStephen M. Cameron goto cleanup0; 6770bcc48ffaSStephen M. Cameron } 677150a0decfSStephen M. Cameron c->SG[i].Addr = cpu_to_le64(temp64); 677250a0decfSStephen M. Cameron c->SG[i].Len = cpu_to_le32(buff_size[i]); 677350a0decfSStephen M. Cameron c->SG[i].Ext = cpu_to_le32(0); 6774edd16368SStephen M. Cameron } 677550a0decfSStephen M. Cameron c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST); 6776edd16368SStephen M. Cameron } 6777c448ecfaSDon Brace status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 67783fb134cbSDon Brace NO_TIMEOUT); 6779b03a7771SStephen M. Cameron if (sg_used) 6780edd16368SStephen M. Cameron hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL); 6781edd16368SStephen M. Cameron check_ioctl_unit_attention(h, c); 678225163bd5SWebb Scales if (status) { 678325163bd5SWebb Scales status = -EIO; 678425163bd5SWebb Scales goto cleanup0; 678525163bd5SWebb Scales } 678625163bd5SWebb Scales 6787edd16368SStephen M. Cameron /* Copy the error information out */ 6788edd16368SStephen M. Cameron memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info)); 6789edd16368SStephen M. Cameron if (copy_to_user(argp, ioc, sizeof(*ioc))) { 6790edd16368SStephen M. Cameron status = -EFAULT; 6791e2d4a1f6SStephen M. Cameron goto cleanup0; 6792edd16368SStephen M. Cameron } 67939233fb10SStephen M. Cameron if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) { 67942b08b3e9SDon Brace int i; 67952b08b3e9SDon Brace 6796edd16368SStephen M. Cameron /* Copy the data out of the buffer we created */ 6797edd16368SStephen M. Cameron BYTE __user *ptr = ioc->buf; 6798edd16368SStephen M. Cameron for (i = 0; i < sg_used; i++) { 6799edd16368SStephen M. Cameron if (copy_to_user(ptr, buff[i], buff_size[i])) { 6800edd16368SStephen M. Cameron status = -EFAULT; 6801e2d4a1f6SStephen M. Cameron goto cleanup0; 6802edd16368SStephen M. Cameron } 6803edd16368SStephen M. Cameron ptr += buff_size[i]; 6804edd16368SStephen M. Cameron } 6805edd16368SStephen M. Cameron } 6806edd16368SStephen M. Cameron status = 0; 6807e2d4a1f6SStephen M. Cameron cleanup0: 680845fcb86eSStephen Cameron cmd_free(h, c); 6809edd16368SStephen M. Cameron cleanup1: 6810edd16368SStephen M. Cameron if (buff) { 68112b08b3e9SDon Brace int i; 68122b08b3e9SDon Brace 6813edd16368SStephen M. Cameron for (i = 0; i < sg_used; i++) 6814edd16368SStephen M. Cameron kfree(buff[i]); 6815edd16368SStephen M. Cameron kfree(buff); 6816edd16368SStephen M. Cameron } 6817edd16368SStephen M. Cameron kfree(buff_size); 6818edd16368SStephen M. Cameron kfree(ioc); 6819edd16368SStephen M. Cameron return status; 6820edd16368SStephen M. Cameron } 6821edd16368SStephen M. Cameron 6822edd16368SStephen M. Cameron static void check_ioctl_unit_attention(struct ctlr_info *h, 6823edd16368SStephen M. Cameron struct CommandList *c) 6824edd16368SStephen M. Cameron { 6825edd16368SStephen M. Cameron if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 6826edd16368SStephen M. Cameron c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) 6827edd16368SStephen M. Cameron (void) check_for_unit_attention(h, c); 6828edd16368SStephen M. Cameron } 68290390f0c0SStephen M. Cameron 6830edd16368SStephen M. Cameron /* 6831edd16368SStephen M. Cameron * ioctl 6832edd16368SStephen M. Cameron */ 683342a91641SDon Brace static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg) 6834edd16368SStephen M. Cameron { 6835edd16368SStephen M. Cameron struct ctlr_info *h; 6836edd16368SStephen M. Cameron void __user *argp = (void __user *)arg; 68370390f0c0SStephen M. Cameron int rc; 6838edd16368SStephen M. Cameron 6839edd16368SStephen M. Cameron h = sdev_to_hba(dev); 6840edd16368SStephen M. Cameron 6841edd16368SStephen M. Cameron switch (cmd) { 6842edd16368SStephen M. Cameron case CCISS_DEREGDISK: 6843edd16368SStephen M. Cameron case CCISS_REGNEWDISK: 6844edd16368SStephen M. Cameron case CCISS_REGNEWD: 6845a08a8471SStephen M. Cameron hpsa_scan_start(h->scsi_host); 6846edd16368SStephen M. Cameron return 0; 6847edd16368SStephen M. Cameron case CCISS_GETPCIINFO: 6848edd16368SStephen M. Cameron return hpsa_getpciinfo_ioctl(h, argp); 6849edd16368SStephen M. Cameron case CCISS_GETDRIVVER: 6850edd16368SStephen M. Cameron return hpsa_getdrivver_ioctl(h, argp); 6851edd16368SStephen M. Cameron case CCISS_PASSTHRU: 685234f0c627SDon Brace if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 68530390f0c0SStephen M. Cameron return -EAGAIN; 68540390f0c0SStephen M. Cameron rc = hpsa_passthru_ioctl(h, argp); 685534f0c627SDon Brace atomic_inc(&h->passthru_cmds_avail); 68560390f0c0SStephen M. Cameron return rc; 6857edd16368SStephen M. Cameron case CCISS_BIG_PASSTHRU: 685834f0c627SDon Brace if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 68590390f0c0SStephen M. Cameron return -EAGAIN; 68600390f0c0SStephen M. Cameron rc = hpsa_big_passthru_ioctl(h, argp); 686134f0c627SDon Brace atomic_inc(&h->passthru_cmds_avail); 68620390f0c0SStephen M. Cameron return rc; 6863edd16368SStephen M. Cameron default: 6864edd16368SStephen M. Cameron return -ENOTTY; 6865edd16368SStephen M. Cameron } 6866edd16368SStephen M. Cameron } 6867edd16368SStephen M. Cameron 6868bf43caf3SRobert Elliott static void hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr, 68696f039790SGreg Kroah-Hartman u8 reset_type) 687064670ac8SStephen M. Cameron { 687164670ac8SStephen M. Cameron struct CommandList *c; 687264670ac8SStephen M. Cameron 687364670ac8SStephen M. Cameron c = cmd_alloc(h); 6874bf43caf3SRobert Elliott 6875a2dac136SStephen M. Cameron /* fill_cmd can't fail here, no data buffer to map */ 6876a2dac136SStephen M. Cameron (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, 687764670ac8SStephen M. Cameron RAID_CTLR_LUNID, TYPE_MSG); 687864670ac8SStephen M. Cameron c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */ 687964670ac8SStephen M. Cameron c->waiting = NULL; 688064670ac8SStephen M. Cameron enqueue_cmd_and_start_io(h, c); 688164670ac8SStephen M. Cameron /* Don't wait for completion, the reset won't complete. Don't free 688264670ac8SStephen M. Cameron * the command either. This is the last command we will send before 688364670ac8SStephen M. Cameron * re-initializing everything, so it doesn't matter and won't leak. 688464670ac8SStephen M. Cameron */ 6885bf43caf3SRobert Elliott return; 688664670ac8SStephen M. Cameron } 688764670ac8SStephen M. Cameron 6888a2dac136SStephen M. Cameron static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 6889b7bb24ebSStephen M. Cameron void *buff, size_t size, u16 page_code, unsigned char *scsi3addr, 6890edd16368SStephen M. Cameron int cmd_type) 6891edd16368SStephen M. Cameron { 6892edd16368SStephen M. Cameron int pci_dir = XFER_NONE; 68939b5c48c2SStephen Cameron u64 tag; /* for commands to be aborted */ 6894edd16368SStephen M. Cameron 6895edd16368SStephen M. Cameron c->cmd_type = CMD_IOCTL_PEND; 6896a58e7e53SWebb Scales c->scsi_cmd = SCSI_CMD_BUSY; 6897edd16368SStephen M. Cameron c->Header.ReplyQueue = 0; 6898edd16368SStephen M. Cameron if (buff != NULL && size > 0) { 6899edd16368SStephen M. Cameron c->Header.SGList = 1; 690050a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(1); 6901edd16368SStephen M. Cameron } else { 6902edd16368SStephen M. Cameron c->Header.SGList = 0; 690350a0decfSStephen M. Cameron c->Header.SGTotal = cpu_to_le16(0); 6904edd16368SStephen M. Cameron } 6905edd16368SStephen M. Cameron memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8); 6906edd16368SStephen M. Cameron 6907edd16368SStephen M. Cameron if (cmd_type == TYPE_CMD) { 6908edd16368SStephen M. Cameron switch (cmd) { 6909edd16368SStephen M. Cameron case HPSA_INQUIRY: 6910edd16368SStephen M. Cameron /* are we trying to read a vital product page */ 6911b7bb24ebSStephen M. Cameron if (page_code & VPD_PAGE) { 6912edd16368SStephen M. Cameron c->Request.CDB[1] = 0x01; 6913b7bb24ebSStephen M. Cameron c->Request.CDB[2] = (page_code & 0xff); 6914edd16368SStephen M. Cameron } 6915edd16368SStephen M. Cameron c->Request.CDBLen = 6; 6916a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6917a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6918edd16368SStephen M. Cameron c->Request.Timeout = 0; 6919edd16368SStephen M. Cameron c->Request.CDB[0] = HPSA_INQUIRY; 6920edd16368SStephen M. Cameron c->Request.CDB[4] = size & 0xFF; 6921edd16368SStephen M. Cameron break; 6922edd16368SStephen M. Cameron case HPSA_REPORT_LOG: 6923edd16368SStephen M. Cameron case HPSA_REPORT_PHYS: 6924edd16368SStephen M. Cameron /* Talking to controller so It's a physical command 6925edd16368SStephen M. Cameron mode = 00 target = 0. Nothing to write. 6926edd16368SStephen M. Cameron */ 6927edd16368SStephen M. Cameron c->Request.CDBLen = 12; 6928a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6929a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6930edd16368SStephen M. Cameron c->Request.Timeout = 0; 6931edd16368SStephen M. Cameron c->Request.CDB[0] = cmd; 6932edd16368SStephen M. Cameron c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 6933edd16368SStephen M. Cameron c->Request.CDB[7] = (size >> 16) & 0xFF; 6934edd16368SStephen M. Cameron c->Request.CDB[8] = (size >> 8) & 0xFF; 6935edd16368SStephen M. Cameron c->Request.CDB[9] = size & 0xFF; 6936edd16368SStephen M. Cameron break; 6937c2adae44SScott Teel case BMIC_SENSE_DIAG_OPTIONS: 6938c2adae44SScott Teel c->Request.CDBLen = 16; 6939c2adae44SScott Teel c->Request.type_attr_dir = 6940c2adae44SScott Teel TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6941c2adae44SScott Teel c->Request.Timeout = 0; 6942c2adae44SScott Teel /* Spec says this should be BMIC_WRITE */ 6943c2adae44SScott Teel c->Request.CDB[0] = BMIC_READ; 6944c2adae44SScott Teel c->Request.CDB[6] = BMIC_SENSE_DIAG_OPTIONS; 6945c2adae44SScott Teel break; 6946c2adae44SScott Teel case BMIC_SET_DIAG_OPTIONS: 6947c2adae44SScott Teel c->Request.CDBLen = 16; 6948c2adae44SScott Teel c->Request.type_attr_dir = 6949c2adae44SScott Teel TYPE_ATTR_DIR(cmd_type, 6950c2adae44SScott Teel ATTR_SIMPLE, XFER_WRITE); 6951c2adae44SScott Teel c->Request.Timeout = 0; 6952c2adae44SScott Teel c->Request.CDB[0] = BMIC_WRITE; 6953c2adae44SScott Teel c->Request.CDB[6] = BMIC_SET_DIAG_OPTIONS; 6954c2adae44SScott Teel break; 6955edd16368SStephen M. Cameron case HPSA_CACHE_FLUSH: 6956edd16368SStephen M. Cameron c->Request.CDBLen = 12; 6957a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6958a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, 6959a505b86fSStephen M. Cameron ATTR_SIMPLE, XFER_WRITE); 6960edd16368SStephen M. Cameron c->Request.Timeout = 0; 6961edd16368SStephen M. Cameron c->Request.CDB[0] = BMIC_WRITE; 6962edd16368SStephen M. Cameron c->Request.CDB[6] = BMIC_CACHE_FLUSH; 6963bb158eabSStephen M. Cameron c->Request.CDB[7] = (size >> 8) & 0xFF; 6964bb158eabSStephen M. Cameron c->Request.CDB[8] = size & 0xFF; 6965edd16368SStephen M. Cameron break; 6966edd16368SStephen M. Cameron case TEST_UNIT_READY: 6967edd16368SStephen M. Cameron c->Request.CDBLen = 6; 6968a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6969a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 6970edd16368SStephen M. Cameron c->Request.Timeout = 0; 6971edd16368SStephen M. Cameron break; 6972283b4a9bSStephen M. Cameron case HPSA_GET_RAID_MAP: 6973283b4a9bSStephen M. Cameron c->Request.CDBLen = 12; 6974a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6975a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6976283b4a9bSStephen M. Cameron c->Request.Timeout = 0; 6977283b4a9bSStephen M. Cameron c->Request.CDB[0] = HPSA_CISS_READ; 6978283b4a9bSStephen M. Cameron c->Request.CDB[1] = cmd; 6979283b4a9bSStephen M. Cameron c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 6980283b4a9bSStephen M. Cameron c->Request.CDB[7] = (size >> 16) & 0xFF; 6981283b4a9bSStephen M. Cameron c->Request.CDB[8] = (size >> 8) & 0xFF; 6982283b4a9bSStephen M. Cameron c->Request.CDB[9] = size & 0xFF; 6983283b4a9bSStephen M. Cameron break; 6984316b221aSStephen M. Cameron case BMIC_SENSE_CONTROLLER_PARAMETERS: 6985316b221aSStephen M. Cameron c->Request.CDBLen = 10; 6986a505b86fSStephen M. Cameron c->Request.type_attr_dir = 6987a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6988316b221aSStephen M. Cameron c->Request.Timeout = 0; 6989316b221aSStephen M. Cameron c->Request.CDB[0] = BMIC_READ; 6990316b221aSStephen M. Cameron c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS; 6991316b221aSStephen M. Cameron c->Request.CDB[7] = (size >> 16) & 0xFF; 6992316b221aSStephen M. Cameron c->Request.CDB[8] = (size >> 8) & 0xFF; 6993316b221aSStephen M. Cameron break; 699403383736SDon Brace case BMIC_IDENTIFY_PHYSICAL_DEVICE: 699503383736SDon Brace c->Request.CDBLen = 10; 699603383736SDon Brace c->Request.type_attr_dir = 699703383736SDon Brace TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 699803383736SDon Brace c->Request.Timeout = 0; 699903383736SDon Brace c->Request.CDB[0] = BMIC_READ; 700003383736SDon Brace c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE; 700103383736SDon Brace c->Request.CDB[7] = (size >> 16) & 0xFF; 700203383736SDon Brace c->Request.CDB[8] = (size >> 8) & 0XFF; 700303383736SDon Brace break; 7004d04e62b9SKevin Barnett case BMIC_SENSE_SUBSYSTEM_INFORMATION: 7005d04e62b9SKevin Barnett c->Request.CDBLen = 10; 7006d04e62b9SKevin Barnett c->Request.type_attr_dir = 7007d04e62b9SKevin Barnett TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 7008d04e62b9SKevin Barnett c->Request.Timeout = 0; 7009d04e62b9SKevin Barnett c->Request.CDB[0] = BMIC_READ; 7010d04e62b9SKevin Barnett c->Request.CDB[6] = BMIC_SENSE_SUBSYSTEM_INFORMATION; 7011d04e62b9SKevin Barnett c->Request.CDB[7] = (size >> 16) & 0xFF; 7012d04e62b9SKevin Barnett c->Request.CDB[8] = (size >> 8) & 0XFF; 7013d04e62b9SKevin Barnett break; 7014cca8f13bSDon Brace case BMIC_SENSE_STORAGE_BOX_PARAMS: 7015cca8f13bSDon Brace c->Request.CDBLen = 10; 7016cca8f13bSDon Brace c->Request.type_attr_dir = 7017cca8f13bSDon Brace TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 7018cca8f13bSDon Brace c->Request.Timeout = 0; 7019cca8f13bSDon Brace c->Request.CDB[0] = BMIC_READ; 7020cca8f13bSDon Brace c->Request.CDB[6] = BMIC_SENSE_STORAGE_BOX_PARAMS; 7021cca8f13bSDon Brace c->Request.CDB[7] = (size >> 16) & 0xFF; 7022cca8f13bSDon Brace c->Request.CDB[8] = (size >> 8) & 0XFF; 7023cca8f13bSDon Brace break; 702466749d0dSScott Teel case BMIC_IDENTIFY_CONTROLLER: 702566749d0dSScott Teel c->Request.CDBLen = 10; 702666749d0dSScott Teel c->Request.type_attr_dir = 702766749d0dSScott Teel TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 702866749d0dSScott Teel c->Request.Timeout = 0; 702966749d0dSScott Teel c->Request.CDB[0] = BMIC_READ; 703066749d0dSScott Teel c->Request.CDB[1] = 0; 703166749d0dSScott Teel c->Request.CDB[2] = 0; 703266749d0dSScott Teel c->Request.CDB[3] = 0; 703366749d0dSScott Teel c->Request.CDB[4] = 0; 703466749d0dSScott Teel c->Request.CDB[5] = 0; 703566749d0dSScott Teel c->Request.CDB[6] = BMIC_IDENTIFY_CONTROLLER; 703666749d0dSScott Teel c->Request.CDB[7] = (size >> 16) & 0xFF; 703766749d0dSScott Teel c->Request.CDB[8] = (size >> 8) & 0XFF; 703866749d0dSScott Teel c->Request.CDB[9] = 0; 703966749d0dSScott Teel break; 7040edd16368SStephen M. Cameron default: 7041edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd); 7042edd16368SStephen M. Cameron BUG(); 7043a2dac136SStephen M. Cameron return -1; 7044edd16368SStephen M. Cameron } 7045edd16368SStephen M. Cameron } else if (cmd_type == TYPE_MSG) { 7046edd16368SStephen M. Cameron switch (cmd) { 7047edd16368SStephen M. Cameron 70480b9b7b6eSScott Teel case HPSA_PHYS_TARGET_RESET: 70490b9b7b6eSScott Teel c->Request.CDBLen = 16; 70500b9b7b6eSScott Teel c->Request.type_attr_dir = 70510b9b7b6eSScott Teel TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 70520b9b7b6eSScott Teel c->Request.Timeout = 0; /* Don't time out */ 70530b9b7b6eSScott Teel memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 70540b9b7b6eSScott Teel c->Request.CDB[0] = HPSA_RESET; 70550b9b7b6eSScott Teel c->Request.CDB[1] = HPSA_TARGET_RESET_TYPE; 70560b9b7b6eSScott Teel /* Physical target reset needs no control bytes 4-7*/ 70570b9b7b6eSScott Teel c->Request.CDB[4] = 0x00; 70580b9b7b6eSScott Teel c->Request.CDB[5] = 0x00; 70590b9b7b6eSScott Teel c->Request.CDB[6] = 0x00; 70600b9b7b6eSScott Teel c->Request.CDB[7] = 0x00; 70610b9b7b6eSScott Teel break; 7062edd16368SStephen M. Cameron case HPSA_DEVICE_RESET_MSG: 7063edd16368SStephen M. Cameron c->Request.CDBLen = 16; 7064a505b86fSStephen M. Cameron c->Request.type_attr_dir = 7065a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 7066edd16368SStephen M. Cameron c->Request.Timeout = 0; /* Don't time out */ 706764670ac8SStephen M. Cameron memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 706864670ac8SStephen M. Cameron c->Request.CDB[0] = cmd; 706921e89afdSStephen M. Cameron c->Request.CDB[1] = HPSA_RESET_TYPE_LUN; 7070edd16368SStephen M. Cameron /* If bytes 4-7 are zero, it means reset the */ 7071edd16368SStephen M. Cameron /* LunID device */ 7072edd16368SStephen M. Cameron c->Request.CDB[4] = 0x00; 7073edd16368SStephen M. Cameron c->Request.CDB[5] = 0x00; 7074edd16368SStephen M. Cameron c->Request.CDB[6] = 0x00; 7075edd16368SStephen M. Cameron c->Request.CDB[7] = 0x00; 7076edd16368SStephen M. Cameron break; 707775167d2cSStephen M. Cameron case HPSA_ABORT_MSG: 70789b5c48c2SStephen Cameron memcpy(&tag, buff, sizeof(tag)); 70792b08b3e9SDon Brace dev_dbg(&h->pdev->dev, 70809b5c48c2SStephen Cameron "Abort Tag:0x%016llx using rqst Tag:0x%016llx", 70819b5c48c2SStephen Cameron tag, c->Header.tag); 708275167d2cSStephen M. Cameron c->Request.CDBLen = 16; 7083a505b86fSStephen M. Cameron c->Request.type_attr_dir = 7084a505b86fSStephen M. Cameron TYPE_ATTR_DIR(cmd_type, 7085a505b86fSStephen M. Cameron ATTR_SIMPLE, XFER_WRITE); 708675167d2cSStephen M. Cameron c->Request.Timeout = 0; /* Don't time out */ 708775167d2cSStephen M. Cameron c->Request.CDB[0] = HPSA_TASK_MANAGEMENT; 708875167d2cSStephen M. Cameron c->Request.CDB[1] = HPSA_TMF_ABORT_TASK; 708975167d2cSStephen M. Cameron c->Request.CDB[2] = 0x00; /* reserved */ 709075167d2cSStephen M. Cameron c->Request.CDB[3] = 0x00; /* reserved */ 709175167d2cSStephen M. Cameron /* Tag to abort goes in CDB[4]-CDB[11] */ 70929b5c48c2SStephen Cameron memcpy(&c->Request.CDB[4], &tag, sizeof(tag)); 709375167d2cSStephen M. Cameron c->Request.CDB[12] = 0x00; /* reserved */ 709475167d2cSStephen M. Cameron c->Request.CDB[13] = 0x00; /* reserved */ 709575167d2cSStephen M. Cameron c->Request.CDB[14] = 0x00; /* reserved */ 709675167d2cSStephen M. Cameron c->Request.CDB[15] = 0x00; /* reserved */ 709775167d2cSStephen M. Cameron break; 7098edd16368SStephen M. Cameron default: 7099edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "unknown message type %d\n", 7100edd16368SStephen M. Cameron cmd); 7101edd16368SStephen M. Cameron BUG(); 7102edd16368SStephen M. Cameron } 7103edd16368SStephen M. Cameron } else { 7104edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type); 7105edd16368SStephen M. Cameron BUG(); 7106edd16368SStephen M. Cameron } 7107edd16368SStephen M. Cameron 7108a505b86fSStephen M. Cameron switch (GET_DIR(c->Request.type_attr_dir)) { 7109edd16368SStephen M. Cameron case XFER_READ: 7110edd16368SStephen M. Cameron pci_dir = PCI_DMA_FROMDEVICE; 7111edd16368SStephen M. Cameron break; 7112edd16368SStephen M. Cameron case XFER_WRITE: 7113edd16368SStephen M. Cameron pci_dir = PCI_DMA_TODEVICE; 7114edd16368SStephen M. Cameron break; 7115edd16368SStephen M. Cameron case XFER_NONE: 7116edd16368SStephen M. Cameron pci_dir = PCI_DMA_NONE; 7117edd16368SStephen M. Cameron break; 7118edd16368SStephen M. Cameron default: 7119edd16368SStephen M. Cameron pci_dir = PCI_DMA_BIDIRECTIONAL; 7120edd16368SStephen M. Cameron } 7121a2dac136SStephen M. Cameron if (hpsa_map_one(h->pdev, c, buff, size, pci_dir)) 7122a2dac136SStephen M. Cameron return -1; 7123a2dac136SStephen M. Cameron return 0; 7124edd16368SStephen M. Cameron } 7125edd16368SStephen M. Cameron 7126edd16368SStephen M. Cameron /* 7127edd16368SStephen M. Cameron * Map (physical) PCI mem into (virtual) kernel space 7128edd16368SStephen M. Cameron */ 7129edd16368SStephen M. Cameron static void __iomem *remap_pci_mem(ulong base, ulong size) 7130edd16368SStephen M. Cameron { 7131edd16368SStephen M. Cameron ulong page_base = ((ulong) base) & PAGE_MASK; 7132edd16368SStephen M. Cameron ulong page_offs = ((ulong) base) - page_base; 7133088ba34cSStephen M. Cameron void __iomem *page_remapped = ioremap_nocache(page_base, 7134088ba34cSStephen M. Cameron page_offs + size); 7135edd16368SStephen M. Cameron 7136edd16368SStephen M. Cameron return page_remapped ? (page_remapped + page_offs) : NULL; 7137edd16368SStephen M. Cameron } 7138edd16368SStephen M. Cameron 7139254f796bSMatt Gates static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q) 7140edd16368SStephen M. Cameron { 7141254f796bSMatt Gates return h->access.command_completed(h, q); 7142edd16368SStephen M. Cameron } 7143edd16368SStephen M. Cameron 7144900c5440SStephen M. Cameron static inline bool interrupt_pending(struct ctlr_info *h) 7145edd16368SStephen M. Cameron { 7146edd16368SStephen M. Cameron return h->access.intr_pending(h); 7147edd16368SStephen M. Cameron } 7148edd16368SStephen M. Cameron 7149edd16368SStephen M. Cameron static inline long interrupt_not_for_us(struct ctlr_info *h) 7150edd16368SStephen M. Cameron { 715110f66018SStephen M. Cameron return (h->access.intr_pending(h) == 0) || 715210f66018SStephen M. Cameron (h->interrupts_enabled == 0); 7153edd16368SStephen M. Cameron } 7154edd16368SStephen M. Cameron 715501a02ffcSStephen M. Cameron static inline int bad_tag(struct ctlr_info *h, u32 tag_index, 715601a02ffcSStephen M. Cameron u32 raw_tag) 7157edd16368SStephen M. Cameron { 7158edd16368SStephen M. Cameron if (unlikely(tag_index >= h->nr_cmds)) { 7159edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag); 7160edd16368SStephen M. Cameron return 1; 7161edd16368SStephen M. Cameron } 7162edd16368SStephen M. Cameron return 0; 7163edd16368SStephen M. Cameron } 7164edd16368SStephen M. Cameron 71655a3d16f5SStephen M. Cameron static inline void finish_cmd(struct CommandList *c) 7166edd16368SStephen M. Cameron { 7167e85c5974SStephen M. Cameron dial_up_lockup_detection_on_fw_flash_complete(c->h, c); 7168c349775eSScott Teel if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI 7169c349775eSScott Teel || c->cmd_type == CMD_IOACCEL2)) 71701fb011fbSStephen M. Cameron complete_scsi_command(c); 71718be986ccSStephen Cameron else if (c->cmd_type == CMD_IOCTL_PEND || c->cmd_type == IOACCEL2_TMF) 7172edd16368SStephen M. Cameron complete(c->waiting); 7173a104c99fSStephen M. Cameron } 7174a104c99fSStephen M. Cameron 7175303932fdSDon Brace /* process completion of an indexed ("direct lookup") command */ 71761d94f94dSStephen M. Cameron static inline void process_indexed_cmd(struct ctlr_info *h, 7177303932fdSDon Brace u32 raw_tag) 7178303932fdSDon Brace { 7179303932fdSDon Brace u32 tag_index; 7180303932fdSDon Brace struct CommandList *c; 7181303932fdSDon Brace 7182f2405db8SDon Brace tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT; 71831d94f94dSStephen M. Cameron if (!bad_tag(h, tag_index, raw_tag)) { 7184303932fdSDon Brace c = h->cmd_pool + tag_index; 71855a3d16f5SStephen M. Cameron finish_cmd(c); 71861d94f94dSStephen M. Cameron } 7187303932fdSDon Brace } 7188303932fdSDon Brace 718964670ac8SStephen M. Cameron /* Some controllers, like p400, will give us one interrupt 719064670ac8SStephen M. Cameron * after a soft reset, even if we turned interrupts off. 719164670ac8SStephen M. Cameron * Only need to check for this in the hpsa_xxx_discard_completions 719264670ac8SStephen M. Cameron * functions. 719364670ac8SStephen M. Cameron */ 719464670ac8SStephen M. Cameron static int ignore_bogus_interrupt(struct ctlr_info *h) 719564670ac8SStephen M. Cameron { 719664670ac8SStephen M. Cameron if (likely(!reset_devices)) 719764670ac8SStephen M. Cameron return 0; 719864670ac8SStephen M. Cameron 719964670ac8SStephen M. Cameron if (likely(h->interrupts_enabled)) 720064670ac8SStephen M. Cameron return 0; 720164670ac8SStephen M. Cameron 720264670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled " 720364670ac8SStephen M. Cameron "(known firmware bug.) Ignoring.\n"); 720464670ac8SStephen M. Cameron 720564670ac8SStephen M. Cameron return 1; 720664670ac8SStephen M. Cameron } 720764670ac8SStephen M. Cameron 7208254f796bSMatt Gates /* 7209254f796bSMatt Gates * Convert &h->q[x] (passed to interrupt handlers) back to h. 7210254f796bSMatt Gates * Relies on (h-q[x] == x) being true for x such that 7211254f796bSMatt Gates * 0 <= x < MAX_REPLY_QUEUES. 7212254f796bSMatt Gates */ 7213254f796bSMatt Gates static struct ctlr_info *queue_to_hba(u8 *queue) 721464670ac8SStephen M. Cameron { 7215254f796bSMatt Gates return container_of((queue - *queue), struct ctlr_info, q[0]); 7216254f796bSMatt Gates } 7217254f796bSMatt Gates 7218254f796bSMatt Gates static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue) 7219254f796bSMatt Gates { 7220254f796bSMatt Gates struct ctlr_info *h = queue_to_hba(queue); 7221254f796bSMatt Gates u8 q = *(u8 *) queue; 722264670ac8SStephen M. Cameron u32 raw_tag; 722364670ac8SStephen M. Cameron 722464670ac8SStephen M. Cameron if (ignore_bogus_interrupt(h)) 722564670ac8SStephen M. Cameron return IRQ_NONE; 722664670ac8SStephen M. Cameron 722764670ac8SStephen M. Cameron if (interrupt_not_for_us(h)) 722864670ac8SStephen M. Cameron return IRQ_NONE; 7229a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 723064670ac8SStephen M. Cameron while (interrupt_pending(h)) { 7231254f796bSMatt Gates raw_tag = get_next_completion(h, q); 723264670ac8SStephen M. Cameron while (raw_tag != FIFO_EMPTY) 7233254f796bSMatt Gates raw_tag = next_command(h, q); 723464670ac8SStephen M. Cameron } 723564670ac8SStephen M. Cameron return IRQ_HANDLED; 723664670ac8SStephen M. Cameron } 723764670ac8SStephen M. Cameron 7238254f796bSMatt Gates static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue) 723964670ac8SStephen M. Cameron { 7240254f796bSMatt Gates struct ctlr_info *h = queue_to_hba(queue); 724164670ac8SStephen M. Cameron u32 raw_tag; 7242254f796bSMatt Gates u8 q = *(u8 *) queue; 724364670ac8SStephen M. Cameron 724464670ac8SStephen M. Cameron if (ignore_bogus_interrupt(h)) 724564670ac8SStephen M. Cameron return IRQ_NONE; 724664670ac8SStephen M. Cameron 7247a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 7248254f796bSMatt Gates raw_tag = get_next_completion(h, q); 724964670ac8SStephen M. Cameron while (raw_tag != FIFO_EMPTY) 7250254f796bSMatt Gates raw_tag = next_command(h, q); 725164670ac8SStephen M. Cameron return IRQ_HANDLED; 725264670ac8SStephen M. Cameron } 725364670ac8SStephen M. Cameron 7254254f796bSMatt Gates static irqreturn_t do_hpsa_intr_intx(int irq, void *queue) 7255edd16368SStephen M. Cameron { 7256254f796bSMatt Gates struct ctlr_info *h = queue_to_hba((u8 *) queue); 7257303932fdSDon Brace u32 raw_tag; 7258254f796bSMatt Gates u8 q = *(u8 *) queue; 7259edd16368SStephen M. Cameron 7260edd16368SStephen M. Cameron if (interrupt_not_for_us(h)) 7261edd16368SStephen M. Cameron return IRQ_NONE; 7262a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 726310f66018SStephen M. Cameron while (interrupt_pending(h)) { 7264254f796bSMatt Gates raw_tag = get_next_completion(h, q); 726510f66018SStephen M. Cameron while (raw_tag != FIFO_EMPTY) { 72661d94f94dSStephen M. Cameron process_indexed_cmd(h, raw_tag); 7267254f796bSMatt Gates raw_tag = next_command(h, q); 726810f66018SStephen M. Cameron } 726910f66018SStephen M. Cameron } 727010f66018SStephen M. Cameron return IRQ_HANDLED; 727110f66018SStephen M. Cameron } 727210f66018SStephen M. Cameron 7273254f796bSMatt Gates static irqreturn_t do_hpsa_intr_msi(int irq, void *queue) 727410f66018SStephen M. Cameron { 7275254f796bSMatt Gates struct ctlr_info *h = queue_to_hba(queue); 727610f66018SStephen M. Cameron u32 raw_tag; 7277254f796bSMatt Gates u8 q = *(u8 *) queue; 727810f66018SStephen M. Cameron 7279a0c12413SStephen M. Cameron h->last_intr_timestamp = get_jiffies_64(); 7280254f796bSMatt Gates raw_tag = get_next_completion(h, q); 7281303932fdSDon Brace while (raw_tag != FIFO_EMPTY) { 72821d94f94dSStephen M. Cameron process_indexed_cmd(h, raw_tag); 7283254f796bSMatt Gates raw_tag = next_command(h, q); 7284edd16368SStephen M. Cameron } 7285edd16368SStephen M. Cameron return IRQ_HANDLED; 7286edd16368SStephen M. Cameron } 7287edd16368SStephen M. Cameron 7288a9a3a273SStephen M. Cameron /* Send a message CDB to the firmware. Careful, this only works 7289a9a3a273SStephen M. Cameron * in simple mode, not performant mode due to the tag lookup. 7290a9a3a273SStephen M. Cameron * We only ever use this immediately after a controller reset. 7291a9a3a273SStephen M. Cameron */ 72926f039790SGreg Kroah-Hartman static int hpsa_message(struct pci_dev *pdev, unsigned char opcode, 7293edd16368SStephen M. Cameron unsigned char type) 7294edd16368SStephen M. Cameron { 7295edd16368SStephen M. Cameron struct Command { 7296edd16368SStephen M. Cameron struct CommandListHeader CommandHeader; 7297edd16368SStephen M. Cameron struct RequestBlock Request; 7298edd16368SStephen M. Cameron struct ErrDescriptor ErrorDescriptor; 7299edd16368SStephen M. Cameron }; 7300edd16368SStephen M. Cameron struct Command *cmd; 7301edd16368SStephen M. Cameron static const size_t cmd_sz = sizeof(*cmd) + 7302edd16368SStephen M. Cameron sizeof(cmd->ErrorDescriptor); 7303edd16368SStephen M. Cameron dma_addr_t paddr64; 73042b08b3e9SDon Brace __le32 paddr32; 73052b08b3e9SDon Brace u32 tag; 7306edd16368SStephen M. Cameron void __iomem *vaddr; 7307edd16368SStephen M. Cameron int i, err; 7308edd16368SStephen M. Cameron 7309edd16368SStephen M. Cameron vaddr = pci_ioremap_bar(pdev, 0); 7310edd16368SStephen M. Cameron if (vaddr == NULL) 7311edd16368SStephen M. Cameron return -ENOMEM; 7312edd16368SStephen M. Cameron 7313edd16368SStephen M. Cameron /* The Inbound Post Queue only accepts 32-bit physical addresses for the 7314edd16368SStephen M. Cameron * CCISS commands, so they must be allocated from the lower 4GiB of 7315edd16368SStephen M. Cameron * memory. 7316edd16368SStephen M. Cameron */ 7317edd16368SStephen M. Cameron err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 7318edd16368SStephen M. Cameron if (err) { 7319edd16368SStephen M. Cameron iounmap(vaddr); 73201eaec8f3SRobert Elliott return err; 7321edd16368SStephen M. Cameron } 7322edd16368SStephen M. Cameron 7323edd16368SStephen M. Cameron cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64); 7324edd16368SStephen M. Cameron if (cmd == NULL) { 7325edd16368SStephen M. Cameron iounmap(vaddr); 7326edd16368SStephen M. Cameron return -ENOMEM; 7327edd16368SStephen M. Cameron } 7328edd16368SStephen M. Cameron 7329edd16368SStephen M. Cameron /* This must fit, because of the 32-bit consistent DMA mask. Also, 7330edd16368SStephen M. Cameron * although there's no guarantee, we assume that the address is at 7331edd16368SStephen M. Cameron * least 4-byte aligned (most likely, it's page-aligned). 7332edd16368SStephen M. Cameron */ 73332b08b3e9SDon Brace paddr32 = cpu_to_le32(paddr64); 7334edd16368SStephen M. Cameron 7335edd16368SStephen M. Cameron cmd->CommandHeader.ReplyQueue = 0; 7336edd16368SStephen M. Cameron cmd->CommandHeader.SGList = 0; 733750a0decfSStephen M. Cameron cmd->CommandHeader.SGTotal = cpu_to_le16(0); 73382b08b3e9SDon Brace cmd->CommandHeader.tag = cpu_to_le64(paddr64); 7339edd16368SStephen M. Cameron memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8); 7340edd16368SStephen M. Cameron 7341edd16368SStephen M. Cameron cmd->Request.CDBLen = 16; 7342a505b86fSStephen M. Cameron cmd->Request.type_attr_dir = 7343a505b86fSStephen M. Cameron TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE); 7344edd16368SStephen M. Cameron cmd->Request.Timeout = 0; /* Don't time out */ 7345edd16368SStephen M. Cameron cmd->Request.CDB[0] = opcode; 7346edd16368SStephen M. Cameron cmd->Request.CDB[1] = type; 7347edd16368SStephen M. Cameron memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */ 734850a0decfSStephen M. Cameron cmd->ErrorDescriptor.Addr = 73492b08b3e9SDon Brace cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd))); 735050a0decfSStephen M. Cameron cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo)); 7351edd16368SStephen M. Cameron 73522b08b3e9SDon Brace writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET); 7353edd16368SStephen M. Cameron 7354edd16368SStephen M. Cameron for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) { 7355edd16368SStephen M. Cameron tag = readl(vaddr + SA5_REPLY_PORT_OFFSET); 73562b08b3e9SDon Brace if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64) 7357edd16368SStephen M. Cameron break; 7358edd16368SStephen M. Cameron msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS); 7359edd16368SStephen M. Cameron } 7360edd16368SStephen M. Cameron 7361edd16368SStephen M. Cameron iounmap(vaddr); 7362edd16368SStephen M. Cameron 7363edd16368SStephen M. Cameron /* we leak the DMA buffer here ... no choice since the controller could 7364edd16368SStephen M. Cameron * still complete the command. 7365edd16368SStephen M. Cameron */ 7366edd16368SStephen M. Cameron if (i == HPSA_MSG_SEND_RETRY_LIMIT) { 7367edd16368SStephen M. Cameron dev_err(&pdev->dev, "controller message %02x:%02x timed out\n", 7368edd16368SStephen M. Cameron opcode, type); 7369edd16368SStephen M. Cameron return -ETIMEDOUT; 7370edd16368SStephen M. Cameron } 7371edd16368SStephen M. Cameron 7372edd16368SStephen M. Cameron pci_free_consistent(pdev, cmd_sz, cmd, paddr64); 7373edd16368SStephen M. Cameron 7374edd16368SStephen M. Cameron if (tag & HPSA_ERROR_BIT) { 7375edd16368SStephen M. Cameron dev_err(&pdev->dev, "controller message %02x:%02x failed\n", 7376edd16368SStephen M. Cameron opcode, type); 7377edd16368SStephen M. Cameron return -EIO; 7378edd16368SStephen M. Cameron } 7379edd16368SStephen M. Cameron 7380edd16368SStephen M. Cameron dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n", 7381edd16368SStephen M. Cameron opcode, type); 7382edd16368SStephen M. Cameron return 0; 7383edd16368SStephen M. Cameron } 7384edd16368SStephen M. Cameron 7385edd16368SStephen M. Cameron #define hpsa_noop(p) hpsa_message(p, 3, 0) 7386edd16368SStephen M. Cameron 73871df8552aSStephen M. Cameron static int hpsa_controller_hard_reset(struct pci_dev *pdev, 738842a91641SDon Brace void __iomem *vaddr, u32 use_doorbell) 7389edd16368SStephen M. Cameron { 7390edd16368SStephen M. Cameron 73911df8552aSStephen M. Cameron if (use_doorbell) { 73921df8552aSStephen M. Cameron /* For everything after the P600, the PCI power state method 73931df8552aSStephen M. Cameron * of resetting the controller doesn't work, so we have this 73941df8552aSStephen M. Cameron * other way using the doorbell register. 7395edd16368SStephen M. Cameron */ 73961df8552aSStephen M. Cameron dev_info(&pdev->dev, "using doorbell to reset controller\n"); 7397cf0b08d0SStephen M. Cameron writel(use_doorbell, vaddr + SA5_DOORBELL); 739885009239SStephen M. Cameron 739900701a96SJustin Lindley /* PMC hardware guys tell us we need a 10 second delay after 740085009239SStephen M. Cameron * doorbell reset and before any attempt to talk to the board 740185009239SStephen M. Cameron * at all to ensure that this actually works and doesn't fall 740285009239SStephen M. Cameron * over in some weird corner cases. 740385009239SStephen M. Cameron */ 740400701a96SJustin Lindley msleep(10000); 74051df8552aSStephen M. Cameron } else { /* Try to do it the PCI power state way */ 7406edd16368SStephen M. Cameron 7407edd16368SStephen M. Cameron /* Quoting from the Open CISS Specification: "The Power 7408edd16368SStephen M. Cameron * Management Control/Status Register (CSR) controls the power 7409edd16368SStephen M. Cameron * state of the device. The normal operating state is D0, 7410edd16368SStephen M. Cameron * CSR=00h. The software off state is D3, CSR=03h. To reset 74111df8552aSStephen M. Cameron * the controller, place the interface device in D3 then to D0, 74121df8552aSStephen M. Cameron * this causes a secondary PCI reset which will reset the 74131df8552aSStephen M. Cameron * controller." */ 7414edd16368SStephen M. Cameron 74152662cab8SDon Brace int rc = 0; 74162662cab8SDon Brace 74171df8552aSStephen M. Cameron dev_info(&pdev->dev, "using PCI PM to reset controller\n"); 74182662cab8SDon Brace 7419edd16368SStephen M. Cameron /* enter the D3hot power management state */ 74202662cab8SDon Brace rc = pci_set_power_state(pdev, PCI_D3hot); 74212662cab8SDon Brace if (rc) 74222662cab8SDon Brace return rc; 7423edd16368SStephen M. Cameron 7424edd16368SStephen M. Cameron msleep(500); 7425edd16368SStephen M. Cameron 7426edd16368SStephen M. Cameron /* enter the D0 power management state */ 74272662cab8SDon Brace rc = pci_set_power_state(pdev, PCI_D0); 74282662cab8SDon Brace if (rc) 74292662cab8SDon Brace return rc; 7430c4853efeSMike Miller 7431c4853efeSMike Miller /* 7432c4853efeSMike Miller * The P600 requires a small delay when changing states. 7433c4853efeSMike Miller * Otherwise we may think the board did not reset and we bail. 7434c4853efeSMike Miller * This for kdump only and is particular to the P600. 7435c4853efeSMike Miller */ 7436c4853efeSMike Miller msleep(500); 74371df8552aSStephen M. Cameron } 74381df8552aSStephen M. Cameron return 0; 74391df8552aSStephen M. Cameron } 74401df8552aSStephen M. Cameron 74416f039790SGreg Kroah-Hartman static void init_driver_version(char *driver_version, int len) 7442580ada3cSStephen M. Cameron { 7443580ada3cSStephen M. Cameron memset(driver_version, 0, len); 7444f79cfec6SStephen M. Cameron strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1); 7445580ada3cSStephen M. Cameron } 7446580ada3cSStephen M. Cameron 74476f039790SGreg Kroah-Hartman static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable) 7448580ada3cSStephen M. Cameron { 7449580ada3cSStephen M. Cameron char *driver_version; 7450580ada3cSStephen M. Cameron int i, size = sizeof(cfgtable->driver_version); 7451580ada3cSStephen M. Cameron 7452580ada3cSStephen M. Cameron driver_version = kmalloc(size, GFP_KERNEL); 7453580ada3cSStephen M. Cameron if (!driver_version) 7454580ada3cSStephen M. Cameron return -ENOMEM; 7455580ada3cSStephen M. Cameron 7456580ada3cSStephen M. Cameron init_driver_version(driver_version, size); 7457580ada3cSStephen M. Cameron for (i = 0; i < size; i++) 7458580ada3cSStephen M. Cameron writeb(driver_version[i], &cfgtable->driver_version[i]); 7459580ada3cSStephen M. Cameron kfree(driver_version); 7460580ada3cSStephen M. Cameron return 0; 7461580ada3cSStephen M. Cameron } 7462580ada3cSStephen M. Cameron 74636f039790SGreg Kroah-Hartman static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable, 74646f039790SGreg Kroah-Hartman unsigned char *driver_ver) 7465580ada3cSStephen M. Cameron { 7466580ada3cSStephen M. Cameron int i; 7467580ada3cSStephen M. Cameron 7468580ada3cSStephen M. Cameron for (i = 0; i < sizeof(cfgtable->driver_version); i++) 7469580ada3cSStephen M. Cameron driver_ver[i] = readb(&cfgtable->driver_version[i]); 7470580ada3cSStephen M. Cameron } 7471580ada3cSStephen M. Cameron 74726f039790SGreg Kroah-Hartman static int controller_reset_failed(struct CfgTable __iomem *cfgtable) 7473580ada3cSStephen M. Cameron { 7474580ada3cSStephen M. Cameron 7475580ada3cSStephen M. Cameron char *driver_ver, *old_driver_ver; 7476580ada3cSStephen M. Cameron int rc, size = sizeof(cfgtable->driver_version); 7477580ada3cSStephen M. Cameron 7478580ada3cSStephen M. Cameron old_driver_ver = kmalloc(2 * size, GFP_KERNEL); 7479580ada3cSStephen M. Cameron if (!old_driver_ver) 7480580ada3cSStephen M. Cameron return -ENOMEM; 7481580ada3cSStephen M. Cameron driver_ver = old_driver_ver + size; 7482580ada3cSStephen M. Cameron 7483580ada3cSStephen M. Cameron /* After a reset, the 32 bytes of "driver version" in the cfgtable 7484580ada3cSStephen M. Cameron * should have been changed, otherwise we know the reset failed. 7485580ada3cSStephen M. Cameron */ 7486580ada3cSStephen M. Cameron init_driver_version(old_driver_ver, size); 7487580ada3cSStephen M. Cameron read_driver_ver_from_cfgtable(cfgtable, driver_ver); 7488580ada3cSStephen M. Cameron rc = !memcmp(driver_ver, old_driver_ver, size); 7489580ada3cSStephen M. Cameron kfree(old_driver_ver); 7490580ada3cSStephen M. Cameron return rc; 7491580ada3cSStephen M. Cameron } 74921df8552aSStephen M. Cameron /* This does a hard reset of the controller using PCI power management 74931df8552aSStephen M. Cameron * states or the using the doorbell register. 74941df8552aSStephen M. Cameron */ 74956b6c1cd7STomas Henzl static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id) 74961df8552aSStephen M. Cameron { 74971df8552aSStephen M. Cameron u64 cfg_offset; 74981df8552aSStephen M. Cameron u32 cfg_base_addr; 74991df8552aSStephen M. Cameron u64 cfg_base_addr_index; 75001df8552aSStephen M. Cameron void __iomem *vaddr; 75011df8552aSStephen M. Cameron unsigned long paddr; 7502580ada3cSStephen M. Cameron u32 misc_fw_support; 7503270d05deSStephen M. Cameron int rc; 75041df8552aSStephen M. Cameron struct CfgTable __iomem *cfgtable; 7505cf0b08d0SStephen M. Cameron u32 use_doorbell; 7506270d05deSStephen M. Cameron u16 command_register; 75071df8552aSStephen M. Cameron 75081df8552aSStephen M. Cameron /* For controllers as old as the P600, this is very nearly 75091df8552aSStephen M. Cameron * the same thing as 75101df8552aSStephen M. Cameron * 75111df8552aSStephen M. Cameron * pci_save_state(pci_dev); 75121df8552aSStephen M. Cameron * pci_set_power_state(pci_dev, PCI_D3hot); 75131df8552aSStephen M. Cameron * pci_set_power_state(pci_dev, PCI_D0); 75141df8552aSStephen M. Cameron * pci_restore_state(pci_dev); 75151df8552aSStephen M. Cameron * 75161df8552aSStephen M. Cameron * For controllers newer than the P600, the pci power state 75171df8552aSStephen M. Cameron * method of resetting doesn't work so we have another way 75181df8552aSStephen M. Cameron * using the doorbell register. 75191df8552aSStephen M. Cameron */ 752018867659SStephen M. Cameron 752160f923b9SRobert Elliott if (!ctlr_is_resettable(board_id)) { 752260f923b9SRobert Elliott dev_warn(&pdev->dev, "Controller not resettable\n"); 752325c1e56aSStephen M. Cameron return -ENODEV; 752425c1e56aSStephen M. Cameron } 752546380786SStephen M. Cameron 752646380786SStephen M. Cameron /* if controller is soft- but not hard resettable... */ 752746380786SStephen M. Cameron if (!ctlr_is_hard_resettable(board_id)) 752846380786SStephen M. Cameron return -ENOTSUPP; /* try soft reset later. */ 752918867659SStephen M. Cameron 7530270d05deSStephen M. Cameron /* Save the PCI command register */ 7531270d05deSStephen M. Cameron pci_read_config_word(pdev, 4, &command_register); 7532270d05deSStephen M. Cameron pci_save_state(pdev); 75331df8552aSStephen M. Cameron 75341df8552aSStephen M. Cameron /* find the first memory BAR, so we can find the cfg table */ 75351df8552aSStephen M. Cameron rc = hpsa_pci_find_memory_BAR(pdev, &paddr); 75361df8552aSStephen M. Cameron if (rc) 75371df8552aSStephen M. Cameron return rc; 75381df8552aSStephen M. Cameron vaddr = remap_pci_mem(paddr, 0x250); 75391df8552aSStephen M. Cameron if (!vaddr) 75401df8552aSStephen M. Cameron return -ENOMEM; 75411df8552aSStephen M. Cameron 75421df8552aSStephen M. Cameron /* find cfgtable in order to check if reset via doorbell is supported */ 75431df8552aSStephen M. Cameron rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr, 75441df8552aSStephen M. Cameron &cfg_base_addr_index, &cfg_offset); 75451df8552aSStephen M. Cameron if (rc) 75461df8552aSStephen M. Cameron goto unmap_vaddr; 75471df8552aSStephen M. Cameron cfgtable = remap_pci_mem(pci_resource_start(pdev, 75481df8552aSStephen M. Cameron cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable)); 75491df8552aSStephen M. Cameron if (!cfgtable) { 75501df8552aSStephen M. Cameron rc = -ENOMEM; 75511df8552aSStephen M. Cameron goto unmap_vaddr; 75521df8552aSStephen M. Cameron } 7553580ada3cSStephen M. Cameron rc = write_driver_ver_to_cfgtable(cfgtable); 7554580ada3cSStephen M. Cameron if (rc) 755503741d95STomas Henzl goto unmap_cfgtable; 75561df8552aSStephen M. Cameron 7557cf0b08d0SStephen M. Cameron /* If reset via doorbell register is supported, use that. 7558cf0b08d0SStephen M. Cameron * There are two such methods. Favor the newest method. 7559cf0b08d0SStephen M. Cameron */ 75601df8552aSStephen M. Cameron misc_fw_support = readl(&cfgtable->misc_fw_support); 7561cf0b08d0SStephen M. Cameron use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2; 7562cf0b08d0SStephen M. Cameron if (use_doorbell) { 7563cf0b08d0SStephen M. Cameron use_doorbell = DOORBELL_CTLR_RESET2; 7564cf0b08d0SStephen M. Cameron } else { 75651df8552aSStephen M. Cameron use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET; 7566cf0b08d0SStephen M. Cameron if (use_doorbell) { 7567050f7147SStephen Cameron dev_warn(&pdev->dev, 7568050f7147SStephen Cameron "Soft reset not supported. Firmware update is required.\n"); 756964670ac8SStephen M. Cameron rc = -ENOTSUPP; /* try soft reset */ 7570cf0b08d0SStephen M. Cameron goto unmap_cfgtable; 7571cf0b08d0SStephen M. Cameron } 7572cf0b08d0SStephen M. Cameron } 75731df8552aSStephen M. Cameron 75741df8552aSStephen M. Cameron rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell); 75751df8552aSStephen M. Cameron if (rc) 75761df8552aSStephen M. Cameron goto unmap_cfgtable; 7577edd16368SStephen M. Cameron 7578270d05deSStephen M. Cameron pci_restore_state(pdev); 7579270d05deSStephen M. Cameron pci_write_config_word(pdev, 4, command_register); 7580edd16368SStephen M. Cameron 75811df8552aSStephen M. Cameron /* Some devices (notably the HP Smart Array 5i Controller) 75821df8552aSStephen M. Cameron need a little pause here */ 75831df8552aSStephen M. Cameron msleep(HPSA_POST_RESET_PAUSE_MSECS); 75841df8552aSStephen M. Cameron 7585fe5389c8SStephen M. Cameron rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY); 7586fe5389c8SStephen M. Cameron if (rc) { 7587fe5389c8SStephen M. Cameron dev_warn(&pdev->dev, 7588050f7147SStephen Cameron "Failed waiting for board to become ready after hard reset\n"); 7589fe5389c8SStephen M. Cameron goto unmap_cfgtable; 7590fe5389c8SStephen M. Cameron } 7591fe5389c8SStephen M. Cameron 7592580ada3cSStephen M. Cameron rc = controller_reset_failed(vaddr); 7593580ada3cSStephen M. Cameron if (rc < 0) 7594580ada3cSStephen M. Cameron goto unmap_cfgtable; 7595580ada3cSStephen M. Cameron if (rc) { 759664670ac8SStephen M. Cameron dev_warn(&pdev->dev, "Unable to successfully reset " 759764670ac8SStephen M. Cameron "controller. Will try soft reset.\n"); 759864670ac8SStephen M. Cameron rc = -ENOTSUPP; 7599580ada3cSStephen M. Cameron } else { 760064670ac8SStephen M. Cameron dev_info(&pdev->dev, "board ready after hard reset.\n"); 76011df8552aSStephen M. Cameron } 76021df8552aSStephen M. Cameron 76031df8552aSStephen M. Cameron unmap_cfgtable: 76041df8552aSStephen M. Cameron iounmap(cfgtable); 76051df8552aSStephen M. Cameron 76061df8552aSStephen M. Cameron unmap_vaddr: 76071df8552aSStephen M. Cameron iounmap(vaddr); 76081df8552aSStephen M. Cameron return rc; 7609edd16368SStephen M. Cameron } 7610edd16368SStephen M. Cameron 7611edd16368SStephen M. Cameron /* 7612edd16368SStephen M. Cameron * We cannot read the structure directly, for portability we must use 7613edd16368SStephen M. Cameron * the io functions. 7614edd16368SStephen M. Cameron * This is for debug only. 7615edd16368SStephen M. Cameron */ 761642a91641SDon Brace static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb) 7617edd16368SStephen M. Cameron { 761858f8665cSStephen M. Cameron #ifdef HPSA_DEBUG 7619edd16368SStephen M. Cameron int i; 7620edd16368SStephen M. Cameron char temp_name[17]; 7621edd16368SStephen M. Cameron 7622edd16368SStephen M. Cameron dev_info(dev, "Controller Configuration information\n"); 7623edd16368SStephen M. Cameron dev_info(dev, "------------------------------------\n"); 7624edd16368SStephen M. Cameron for (i = 0; i < 4; i++) 7625edd16368SStephen M. Cameron temp_name[i] = readb(&(tb->Signature[i])); 7626edd16368SStephen M. Cameron temp_name[4] = '\0'; 7627edd16368SStephen M. Cameron dev_info(dev, " Signature = %s\n", temp_name); 7628edd16368SStephen M. Cameron dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence))); 7629edd16368SStephen M. Cameron dev_info(dev, " Transport methods supported = 0x%x\n", 7630edd16368SStephen M. Cameron readl(&(tb->TransportSupport))); 7631edd16368SStephen M. Cameron dev_info(dev, " Transport methods active = 0x%x\n", 7632edd16368SStephen M. Cameron readl(&(tb->TransportActive))); 7633edd16368SStephen M. Cameron dev_info(dev, " Requested transport Method = 0x%x\n", 7634edd16368SStephen M. Cameron readl(&(tb->HostWrite.TransportRequest))); 7635edd16368SStephen M. Cameron dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n", 7636edd16368SStephen M. Cameron readl(&(tb->HostWrite.CoalIntDelay))); 7637edd16368SStephen M. Cameron dev_info(dev, " Coalesce Interrupt Count = 0x%x\n", 7638edd16368SStephen M. Cameron readl(&(tb->HostWrite.CoalIntCount))); 763969d6e33dSRobert Elliott dev_info(dev, " Max outstanding commands = %d\n", 7640edd16368SStephen M. Cameron readl(&(tb->CmdsOutMax))); 7641edd16368SStephen M. Cameron dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes))); 7642edd16368SStephen M. Cameron for (i = 0; i < 16; i++) 7643edd16368SStephen M. Cameron temp_name[i] = readb(&(tb->ServerName[i])); 7644edd16368SStephen M. Cameron temp_name[16] = '\0'; 7645edd16368SStephen M. Cameron dev_info(dev, " Server Name = %s\n", temp_name); 7646edd16368SStephen M. Cameron dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n", 7647edd16368SStephen M. Cameron readl(&(tb->HeartBeat))); 7648edd16368SStephen M. Cameron #endif /* HPSA_DEBUG */ 764958f8665cSStephen M. Cameron } 7650edd16368SStephen M. Cameron 7651edd16368SStephen M. Cameron static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr) 7652edd16368SStephen M. Cameron { 7653edd16368SStephen M. Cameron int i, offset, mem_type, bar_type; 7654edd16368SStephen M. Cameron 7655edd16368SStephen M. Cameron if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */ 7656edd16368SStephen M. Cameron return 0; 7657edd16368SStephen M. Cameron offset = 0; 7658edd16368SStephen M. Cameron for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { 7659edd16368SStephen M. Cameron bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE; 7660edd16368SStephen M. Cameron if (bar_type == PCI_BASE_ADDRESS_SPACE_IO) 7661edd16368SStephen M. Cameron offset += 4; 7662edd16368SStephen M. Cameron else { 7663edd16368SStephen M. Cameron mem_type = pci_resource_flags(pdev, i) & 7664edd16368SStephen M. Cameron PCI_BASE_ADDRESS_MEM_TYPE_MASK; 7665edd16368SStephen M. Cameron switch (mem_type) { 7666edd16368SStephen M. Cameron case PCI_BASE_ADDRESS_MEM_TYPE_32: 7667edd16368SStephen M. Cameron case PCI_BASE_ADDRESS_MEM_TYPE_1M: 7668edd16368SStephen M. Cameron offset += 4; /* 32 bit */ 7669edd16368SStephen M. Cameron break; 7670edd16368SStephen M. Cameron case PCI_BASE_ADDRESS_MEM_TYPE_64: 7671edd16368SStephen M. Cameron offset += 8; 7672edd16368SStephen M. Cameron break; 7673edd16368SStephen M. Cameron default: /* reserved in PCI 2.2 */ 7674edd16368SStephen M. Cameron dev_warn(&pdev->dev, 7675edd16368SStephen M. Cameron "base address is invalid\n"); 7676edd16368SStephen M. Cameron return -1; 7677edd16368SStephen M. Cameron break; 7678edd16368SStephen M. Cameron } 7679edd16368SStephen M. Cameron } 7680edd16368SStephen M. Cameron if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0) 7681edd16368SStephen M. Cameron return i + 1; 7682edd16368SStephen M. Cameron } 7683edd16368SStephen M. Cameron return -1; 7684edd16368SStephen M. Cameron } 7685edd16368SStephen M. Cameron 7686cc64c817SRobert Elliott static void hpsa_disable_interrupt_mode(struct ctlr_info *h) 7687cc64c817SRobert Elliott { 7688bc2bb154SChristoph Hellwig pci_free_irq_vectors(h->pdev); 7689bc2bb154SChristoph Hellwig h->msix_vectors = 0; 7690cc64c817SRobert Elliott } 7691cc64c817SRobert Elliott 7692edd16368SStephen M. Cameron /* If MSI/MSI-X is supported by the kernel we will try to enable it on 7693050f7147SStephen Cameron * controllers that are capable. If not, we use legacy INTx mode. 7694edd16368SStephen M. Cameron */ 7695bc2bb154SChristoph Hellwig static int hpsa_interrupt_mode(struct ctlr_info *h) 7696edd16368SStephen M. Cameron { 7697bc2bb154SChristoph Hellwig unsigned int flags = PCI_IRQ_LEGACY; 7698bc2bb154SChristoph Hellwig int ret; 7699edd16368SStephen M. Cameron 7700edd16368SStephen M. Cameron /* Some boards advertise MSI but don't really support it */ 7701bc2bb154SChristoph Hellwig switch (h->board_id) { 7702bc2bb154SChristoph Hellwig case 0x40700E11: 7703bc2bb154SChristoph Hellwig case 0x40800E11: 7704bc2bb154SChristoph Hellwig case 0x40820E11: 7705bc2bb154SChristoph Hellwig case 0x40830E11: 7706bc2bb154SChristoph Hellwig break; 7707bc2bb154SChristoph Hellwig default: 7708bc2bb154SChristoph Hellwig ret = pci_alloc_irq_vectors(h->pdev, 1, MAX_REPLY_QUEUES, 7709bc2bb154SChristoph Hellwig PCI_IRQ_MSIX | PCI_IRQ_AFFINITY); 7710bc2bb154SChristoph Hellwig if (ret > 0) { 7711bc2bb154SChristoph Hellwig h->msix_vectors = ret; 7712bc2bb154SChristoph Hellwig return 0; 7713eee0f03aSHannes Reinecke } 7714bc2bb154SChristoph Hellwig 7715bc2bb154SChristoph Hellwig flags |= PCI_IRQ_MSI; 7716bc2bb154SChristoph Hellwig break; 7717edd16368SStephen M. Cameron } 7718bc2bb154SChristoph Hellwig 7719bc2bb154SChristoph Hellwig ret = pci_alloc_irq_vectors(h->pdev, 1, 1, flags); 7720bc2bb154SChristoph Hellwig if (ret < 0) 7721bc2bb154SChristoph Hellwig return ret; 7722bc2bb154SChristoph Hellwig return 0; 7723edd16368SStephen M. Cameron } 7724edd16368SStephen M. Cameron 77256f039790SGreg Kroah-Hartman static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id) 7726e5c880d1SStephen M. Cameron { 7727e5c880d1SStephen M. Cameron int i; 7728e5c880d1SStephen M. Cameron u32 subsystem_vendor_id, subsystem_device_id; 7729e5c880d1SStephen M. Cameron 7730e5c880d1SStephen M. Cameron subsystem_vendor_id = pdev->subsystem_vendor; 7731e5c880d1SStephen M. Cameron subsystem_device_id = pdev->subsystem_device; 7732e5c880d1SStephen M. Cameron *board_id = ((subsystem_device_id << 16) & 0xffff0000) | 7733e5c880d1SStephen M. Cameron subsystem_vendor_id; 7734e5c880d1SStephen M. Cameron 7735e5c880d1SStephen M. Cameron for (i = 0; i < ARRAY_SIZE(products); i++) 7736e5c880d1SStephen M. Cameron if (*board_id == products[i].board_id) 7737e5c880d1SStephen M. Cameron return i; 7738e5c880d1SStephen M. Cameron 77396798cc0aSStephen M. Cameron if ((subsystem_vendor_id != PCI_VENDOR_ID_HP && 77406798cc0aSStephen M. Cameron subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) || 77416798cc0aSStephen M. Cameron !hpsa_allow_any) { 7742e5c880d1SStephen M. Cameron dev_warn(&pdev->dev, "unrecognized board ID: " 7743e5c880d1SStephen M. Cameron "0x%08x, ignoring.\n", *board_id); 7744e5c880d1SStephen M. Cameron return -ENODEV; 7745e5c880d1SStephen M. Cameron } 7746e5c880d1SStephen M. Cameron return ARRAY_SIZE(products) - 1; /* generic unknown smart array */ 7747e5c880d1SStephen M. Cameron } 7748e5c880d1SStephen M. Cameron 77496f039790SGreg Kroah-Hartman static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 77503a7774ceSStephen M. Cameron unsigned long *memory_bar) 77513a7774ceSStephen M. Cameron { 77523a7774ceSStephen M. Cameron int i; 77533a7774ceSStephen M. Cameron 77543a7774ceSStephen M. Cameron for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) 775512d2cd47SStephen M. Cameron if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) { 77563a7774ceSStephen M. Cameron /* addressing mode bits already removed */ 775712d2cd47SStephen M. Cameron *memory_bar = pci_resource_start(pdev, i); 775812d2cd47SStephen M. Cameron dev_dbg(&pdev->dev, "memory BAR = %lx\n", 77593a7774ceSStephen M. Cameron *memory_bar); 77603a7774ceSStephen M. Cameron return 0; 77613a7774ceSStephen M. Cameron } 776212d2cd47SStephen M. Cameron dev_warn(&pdev->dev, "no memory BAR found\n"); 77633a7774ceSStephen M. Cameron return -ENODEV; 77643a7774ceSStephen M. Cameron } 77653a7774ceSStephen M. Cameron 77666f039790SGreg Kroah-Hartman static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 77676f039790SGreg Kroah-Hartman int wait_for_ready) 77682c4c8c8bSStephen M. Cameron { 7769fe5389c8SStephen M. Cameron int i, iterations; 77702c4c8c8bSStephen M. Cameron u32 scratchpad; 7771fe5389c8SStephen M. Cameron if (wait_for_ready) 7772fe5389c8SStephen M. Cameron iterations = HPSA_BOARD_READY_ITERATIONS; 7773fe5389c8SStephen M. Cameron else 7774fe5389c8SStephen M. Cameron iterations = HPSA_BOARD_NOT_READY_ITERATIONS; 77752c4c8c8bSStephen M. Cameron 7776fe5389c8SStephen M. Cameron for (i = 0; i < iterations; i++) { 7777fe5389c8SStephen M. Cameron scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET); 7778fe5389c8SStephen M. Cameron if (wait_for_ready) { 77792c4c8c8bSStephen M. Cameron if (scratchpad == HPSA_FIRMWARE_READY) 77802c4c8c8bSStephen M. Cameron return 0; 7781fe5389c8SStephen M. Cameron } else { 7782fe5389c8SStephen M. Cameron if (scratchpad != HPSA_FIRMWARE_READY) 7783fe5389c8SStephen M. Cameron return 0; 7784fe5389c8SStephen M. Cameron } 77852c4c8c8bSStephen M. Cameron msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS); 77862c4c8c8bSStephen M. Cameron } 7787fe5389c8SStephen M. Cameron dev_warn(&pdev->dev, "board not ready, timed out.\n"); 77882c4c8c8bSStephen M. Cameron return -ENODEV; 77892c4c8c8bSStephen M. Cameron } 77902c4c8c8bSStephen M. Cameron 77916f039790SGreg Kroah-Hartman static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 77926f039790SGreg Kroah-Hartman u32 *cfg_base_addr, u64 *cfg_base_addr_index, 7793a51fd47fSStephen M. Cameron u64 *cfg_offset) 7794a51fd47fSStephen M. Cameron { 7795a51fd47fSStephen M. Cameron *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET); 7796a51fd47fSStephen M. Cameron *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET); 7797a51fd47fSStephen M. Cameron *cfg_base_addr &= (u32) 0x0000ffff; 7798a51fd47fSStephen M. Cameron *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr); 7799a51fd47fSStephen M. Cameron if (*cfg_base_addr_index == -1) { 7800a51fd47fSStephen M. Cameron dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n"); 7801a51fd47fSStephen M. Cameron return -ENODEV; 7802a51fd47fSStephen M. Cameron } 7803a51fd47fSStephen M. Cameron return 0; 7804a51fd47fSStephen M. Cameron } 7805a51fd47fSStephen M. Cameron 7806195f2c65SRobert Elliott static void hpsa_free_cfgtables(struct ctlr_info *h) 7807195f2c65SRobert Elliott { 7808105a3dbcSRobert Elliott if (h->transtable) { 7809195f2c65SRobert Elliott iounmap(h->transtable); 7810105a3dbcSRobert Elliott h->transtable = NULL; 7811105a3dbcSRobert Elliott } 7812105a3dbcSRobert Elliott if (h->cfgtable) { 7813195f2c65SRobert Elliott iounmap(h->cfgtable); 7814105a3dbcSRobert Elliott h->cfgtable = NULL; 7815105a3dbcSRobert Elliott } 7816195f2c65SRobert Elliott } 7817195f2c65SRobert Elliott 7818195f2c65SRobert Elliott /* Find and map CISS config table and transfer table 7819195f2c65SRobert Elliott + * several items must be unmapped (freed) later 7820195f2c65SRobert Elliott + * */ 78216f039790SGreg Kroah-Hartman static int hpsa_find_cfgtables(struct ctlr_info *h) 7822edd16368SStephen M. Cameron { 782301a02ffcSStephen M. Cameron u64 cfg_offset; 782401a02ffcSStephen M. Cameron u32 cfg_base_addr; 782501a02ffcSStephen M. Cameron u64 cfg_base_addr_index; 7826303932fdSDon Brace u32 trans_offset; 7827a51fd47fSStephen M. Cameron int rc; 782877c4495cSStephen M. Cameron 7829a51fd47fSStephen M. Cameron rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 7830a51fd47fSStephen M. Cameron &cfg_base_addr_index, &cfg_offset); 7831a51fd47fSStephen M. Cameron if (rc) 7832a51fd47fSStephen M. Cameron return rc; 783377c4495cSStephen M. Cameron h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev, 7834a51fd47fSStephen M. Cameron cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable)); 7835cd3c81c4SRobert Elliott if (!h->cfgtable) { 7836cd3c81c4SRobert Elliott dev_err(&h->pdev->dev, "Failed mapping cfgtable\n"); 783777c4495cSStephen M. Cameron return -ENOMEM; 7838cd3c81c4SRobert Elliott } 7839580ada3cSStephen M. Cameron rc = write_driver_ver_to_cfgtable(h->cfgtable); 7840580ada3cSStephen M. Cameron if (rc) 7841580ada3cSStephen M. Cameron return rc; 784277c4495cSStephen M. Cameron /* Find performant mode table. */ 7843a51fd47fSStephen M. Cameron trans_offset = readl(&h->cfgtable->TransMethodOffset); 784477c4495cSStephen M. Cameron h->transtable = remap_pci_mem(pci_resource_start(h->pdev, 784577c4495cSStephen M. Cameron cfg_base_addr_index)+cfg_offset+trans_offset, 784677c4495cSStephen M. Cameron sizeof(*h->transtable)); 7847195f2c65SRobert Elliott if (!h->transtable) { 7848195f2c65SRobert Elliott dev_err(&h->pdev->dev, "Failed mapping transfer table\n"); 7849195f2c65SRobert Elliott hpsa_free_cfgtables(h); 785077c4495cSStephen M. Cameron return -ENOMEM; 7851195f2c65SRobert Elliott } 785277c4495cSStephen M. Cameron return 0; 785377c4495cSStephen M. Cameron } 785477c4495cSStephen M. Cameron 78556f039790SGreg Kroah-Hartman static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h) 7856cba3d38bSStephen M. Cameron { 785741ce4c35SStephen Cameron #define MIN_MAX_COMMANDS 16 785841ce4c35SStephen Cameron BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS); 785941ce4c35SStephen Cameron 786041ce4c35SStephen Cameron h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands); 786172ceeaecSStephen M. Cameron 786272ceeaecSStephen M. Cameron /* Limit commands in memory limited kdump scenario. */ 786372ceeaecSStephen M. Cameron if (reset_devices && h->max_commands > 32) 786472ceeaecSStephen M. Cameron h->max_commands = 32; 786572ceeaecSStephen M. Cameron 786641ce4c35SStephen Cameron if (h->max_commands < MIN_MAX_COMMANDS) { 786741ce4c35SStephen Cameron dev_warn(&h->pdev->dev, 786841ce4c35SStephen Cameron "Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n", 786941ce4c35SStephen Cameron h->max_commands, 787041ce4c35SStephen Cameron MIN_MAX_COMMANDS); 787141ce4c35SStephen Cameron h->max_commands = MIN_MAX_COMMANDS; 7872cba3d38bSStephen M. Cameron } 7873cba3d38bSStephen M. Cameron } 7874cba3d38bSStephen M. Cameron 7875c7ee65b3SWebb Scales /* If the controller reports that the total max sg entries is greater than 512, 7876c7ee65b3SWebb Scales * then we know that chained SG blocks work. (Original smart arrays did not 7877c7ee65b3SWebb Scales * support chained SG blocks and would return zero for max sg entries.) 7878c7ee65b3SWebb Scales */ 7879c7ee65b3SWebb Scales static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h) 7880c7ee65b3SWebb Scales { 7881c7ee65b3SWebb Scales return h->maxsgentries > 512; 7882c7ee65b3SWebb Scales } 7883c7ee65b3SWebb Scales 7884b93d7536SStephen M. Cameron /* Interrogate the hardware for some limits: 7885b93d7536SStephen M. Cameron * max commands, max SG elements without chaining, and with chaining, 7886b93d7536SStephen M. Cameron * SG chain block size, etc. 7887b93d7536SStephen M. Cameron */ 78886f039790SGreg Kroah-Hartman static void hpsa_find_board_params(struct ctlr_info *h) 7889b93d7536SStephen M. Cameron { 7890cba3d38bSStephen M. Cameron hpsa_get_max_perf_mode_cmds(h); 789145fcb86eSStephen Cameron h->nr_cmds = h->max_commands; 7892b93d7536SStephen M. Cameron h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements)); 7893283b4a9bSStephen M. Cameron h->fw_support = readl(&(h->cfgtable->misc_fw_support)); 7894c7ee65b3SWebb Scales if (hpsa_supports_chained_sg_blocks(h)) { 7895c7ee65b3SWebb Scales /* Limit in-command s/g elements to 32 save dma'able memory. */ 7896b93d7536SStephen M. Cameron h->max_cmd_sg_entries = 32; 78971a63ea6fSWebb Scales h->chainsize = h->maxsgentries - h->max_cmd_sg_entries; 7898b93d7536SStephen M. Cameron h->maxsgentries--; /* save one for chain pointer */ 7899b93d7536SStephen M. Cameron } else { 7900c7ee65b3SWebb Scales /* 7901c7ee65b3SWebb Scales * Original smart arrays supported at most 31 s/g entries 7902c7ee65b3SWebb Scales * embedded inline in the command (trying to use more 7903c7ee65b3SWebb Scales * would lock up the controller) 7904c7ee65b3SWebb Scales */ 7905c7ee65b3SWebb Scales h->max_cmd_sg_entries = 31; 79061a63ea6fSWebb Scales h->maxsgentries = 31; /* default to traditional values */ 7907c7ee65b3SWebb Scales h->chainsize = 0; 7908b93d7536SStephen M. Cameron } 790975167d2cSStephen M. Cameron 791075167d2cSStephen M. Cameron /* Find out what task management functions are supported and cache */ 791175167d2cSStephen M. Cameron h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags)); 79120e7a7fceSScott Teel if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags)) 79130e7a7fceSScott Teel dev_warn(&h->pdev->dev, "Physical aborts not supported\n"); 79140e7a7fceSScott Teel if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags)) 79150e7a7fceSScott Teel dev_warn(&h->pdev->dev, "Logical aborts not supported\n"); 79168be986ccSStephen Cameron if (!(HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags)) 79178be986ccSStephen Cameron dev_warn(&h->pdev->dev, "HP SSD Smart Path aborts not supported\n"); 7918b93d7536SStephen M. Cameron } 7919b93d7536SStephen M. Cameron 792076c46e49SStephen M. Cameron static inline bool hpsa_CISS_signature_present(struct ctlr_info *h) 792176c46e49SStephen M. Cameron { 79220fc9fd40SAkinobu Mita if (!check_signature(h->cfgtable->Signature, "CISS", 4)) { 7923050f7147SStephen Cameron dev_err(&h->pdev->dev, "not a valid CISS config table\n"); 792476c46e49SStephen M. Cameron return false; 792576c46e49SStephen M. Cameron } 792676c46e49SStephen M. Cameron return true; 792776c46e49SStephen M. Cameron } 792876c46e49SStephen M. Cameron 792997a5e98cSStephen M. Cameron static inline void hpsa_set_driver_support_bits(struct ctlr_info *h) 7930f7c39101SStephen M. Cameron { 793197a5e98cSStephen M. Cameron u32 driver_support; 7932f7c39101SStephen M. Cameron 793397a5e98cSStephen M. Cameron driver_support = readl(&(h->cfgtable->driver_support)); 79340b9e7b74SArnd Bergmann /* Need to enable prefetch in the SCSI core for 6400 in x86 */ 79350b9e7b74SArnd Bergmann #ifdef CONFIG_X86 793697a5e98cSStephen M. Cameron driver_support |= ENABLE_SCSI_PREFETCH; 7937f7c39101SStephen M. Cameron #endif 793828e13446SStephen M. Cameron driver_support |= ENABLE_UNIT_ATTN; 793928e13446SStephen M. Cameron writel(driver_support, &(h->cfgtable->driver_support)); 7940f7c39101SStephen M. Cameron } 7941f7c39101SStephen M. Cameron 79423d0eab67SStephen M. Cameron /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result 79433d0eab67SStephen M. Cameron * in a prefetch beyond physical memory. 79443d0eab67SStephen M. Cameron */ 79453d0eab67SStephen M. Cameron static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h) 79463d0eab67SStephen M. Cameron { 79473d0eab67SStephen M. Cameron u32 dma_prefetch; 79483d0eab67SStephen M. Cameron 79493d0eab67SStephen M. Cameron if (h->board_id != 0x3225103C) 79503d0eab67SStephen M. Cameron return; 79513d0eab67SStephen M. Cameron dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG); 79523d0eab67SStephen M. Cameron dma_prefetch |= 0x8000; 79533d0eab67SStephen M. Cameron writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG); 79543d0eab67SStephen M. Cameron } 79553d0eab67SStephen M. Cameron 7956c706a795SRobert Elliott static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h) 795776438d08SStephen M. Cameron { 795876438d08SStephen M. Cameron int i; 795976438d08SStephen M. Cameron u32 doorbell_value; 796076438d08SStephen M. Cameron unsigned long flags; 796176438d08SStephen M. Cameron /* wait until the clear_event_notify bit 6 is cleared by controller. */ 7962007e7aa9SRobert Elliott for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) { 796376438d08SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 796476438d08SStephen M. Cameron doorbell_value = readl(h->vaddr + SA5_DOORBELL); 796576438d08SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 796676438d08SStephen M. Cameron if (!(doorbell_value & DOORBELL_CLEAR_EVENTS)) 7967c706a795SRobert Elliott goto done; 796876438d08SStephen M. Cameron /* delay and try again */ 7969007e7aa9SRobert Elliott msleep(CLEAR_EVENT_WAIT_INTERVAL); 797076438d08SStephen M. Cameron } 7971c706a795SRobert Elliott return -ENODEV; 7972c706a795SRobert Elliott done: 7973c706a795SRobert Elliott return 0; 797476438d08SStephen M. Cameron } 797576438d08SStephen M. Cameron 7976c706a795SRobert Elliott static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h) 7977eb6b2ae9SStephen M. Cameron { 7978eb6b2ae9SStephen M. Cameron int i; 79796eaf46fdSStephen M. Cameron u32 doorbell_value; 79806eaf46fdSStephen M. Cameron unsigned long flags; 7981eb6b2ae9SStephen M. Cameron 7982eb6b2ae9SStephen M. Cameron /* under certain very rare conditions, this can take awhile. 7983eb6b2ae9SStephen M. Cameron * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right 7984eb6b2ae9SStephen M. Cameron * as we enter this code.) 7985eb6b2ae9SStephen M. Cameron */ 7986007e7aa9SRobert Elliott for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) { 798725163bd5SWebb Scales if (h->remove_in_progress) 798825163bd5SWebb Scales goto done; 79896eaf46fdSStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 79906eaf46fdSStephen M. Cameron doorbell_value = readl(h->vaddr + SA5_DOORBELL); 79916eaf46fdSStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 7992382be668SDan Carpenter if (!(doorbell_value & CFGTBL_ChangeReq)) 7993c706a795SRobert Elliott goto done; 7994eb6b2ae9SStephen M. Cameron /* delay and try again */ 7995007e7aa9SRobert Elliott msleep(MODE_CHANGE_WAIT_INTERVAL); 7996eb6b2ae9SStephen M. Cameron } 7997c706a795SRobert Elliott return -ENODEV; 7998c706a795SRobert Elliott done: 7999c706a795SRobert Elliott return 0; 80003f4336f3SStephen M. Cameron } 80013f4336f3SStephen M. Cameron 8002c706a795SRobert Elliott /* return -ENODEV or other reason on error, 0 on success */ 80036f039790SGreg Kroah-Hartman static int hpsa_enter_simple_mode(struct ctlr_info *h) 80043f4336f3SStephen M. Cameron { 80053f4336f3SStephen M. Cameron u32 trans_support; 80063f4336f3SStephen M. Cameron 80073f4336f3SStephen M. Cameron trans_support = readl(&(h->cfgtable->TransportSupport)); 80083f4336f3SStephen M. Cameron if (!(trans_support & SIMPLE_MODE)) 80093f4336f3SStephen M. Cameron return -ENOTSUPP; 80103f4336f3SStephen M. Cameron 80113f4336f3SStephen M. Cameron h->max_commands = readl(&(h->cfgtable->CmdsOutMax)); 8012283b4a9bSStephen M. Cameron 80133f4336f3SStephen M. Cameron /* Update the field, and then ring the doorbell */ 80143f4336f3SStephen M. Cameron writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest)); 8015b9af4937SStephen M. Cameron writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi); 80163f4336f3SStephen M. Cameron writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 8017c706a795SRobert Elliott if (hpsa_wait_for_mode_change_ack(h)) 8018c706a795SRobert Elliott goto error; 8019eb6b2ae9SStephen M. Cameron print_cfg_table(&h->pdev->dev, h->cfgtable); 8020283b4a9bSStephen M. Cameron if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) 8021283b4a9bSStephen M. Cameron goto error; 8022960a30e7SStephen M. Cameron h->transMethod = CFGTBL_Trans_Simple; 8023eb6b2ae9SStephen M. Cameron return 0; 8024283b4a9bSStephen M. Cameron error: 8025050f7147SStephen Cameron dev_err(&h->pdev->dev, "failed to enter simple mode\n"); 8026283b4a9bSStephen M. Cameron return -ENODEV; 8027eb6b2ae9SStephen M. Cameron } 8028eb6b2ae9SStephen M. Cameron 8029195f2c65SRobert Elliott /* free items allocated or mapped by hpsa_pci_init */ 8030195f2c65SRobert Elliott static void hpsa_free_pci_init(struct ctlr_info *h) 8031195f2c65SRobert Elliott { 8032195f2c65SRobert Elliott hpsa_free_cfgtables(h); /* pci_init 4 */ 8033195f2c65SRobert Elliott iounmap(h->vaddr); /* pci_init 3 */ 8034105a3dbcSRobert Elliott h->vaddr = NULL; 8035195f2c65SRobert Elliott hpsa_disable_interrupt_mode(h); /* pci_init 2 */ 8036943a7021SRobert Elliott /* 8037943a7021SRobert Elliott * call pci_disable_device before pci_release_regions per 8038943a7021SRobert Elliott * Documentation/PCI/pci.txt 8039943a7021SRobert Elliott */ 8040195f2c65SRobert Elliott pci_disable_device(h->pdev); /* pci_init 1 */ 8041943a7021SRobert Elliott pci_release_regions(h->pdev); /* pci_init 2 */ 8042195f2c65SRobert Elliott } 8043195f2c65SRobert Elliott 8044195f2c65SRobert Elliott /* several items must be freed later */ 80456f039790SGreg Kroah-Hartman static int hpsa_pci_init(struct ctlr_info *h) 804677c4495cSStephen M. Cameron { 8047eb6b2ae9SStephen M. Cameron int prod_index, err; 8048edd16368SStephen M. Cameron 8049e5c880d1SStephen M. Cameron prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id); 8050e5c880d1SStephen M. Cameron if (prod_index < 0) 805160f923b9SRobert Elliott return prod_index; 8052e5c880d1SStephen M. Cameron h->product_name = products[prod_index].product_name; 8053e5c880d1SStephen M. Cameron h->access = *(products[prod_index].access); 8054e5c880d1SStephen M. Cameron 80559b5c48c2SStephen Cameron h->needs_abort_tags_swizzled = 80569b5c48c2SStephen Cameron ctlr_needs_abort_tags_swizzled(h->board_id); 80579b5c48c2SStephen Cameron 8058e5a44df8SMatthew Garrett pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S | 8059e5a44df8SMatthew Garrett PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM); 8060e5a44df8SMatthew Garrett 806155c06c71SStephen M. Cameron err = pci_enable_device(h->pdev); 8062edd16368SStephen M. Cameron if (err) { 8063195f2c65SRobert Elliott dev_err(&h->pdev->dev, "failed to enable PCI device\n"); 8064943a7021SRobert Elliott pci_disable_device(h->pdev); 8065edd16368SStephen M. Cameron return err; 8066edd16368SStephen M. Cameron } 8067edd16368SStephen M. Cameron 8068f79cfec6SStephen M. Cameron err = pci_request_regions(h->pdev, HPSA); 8069edd16368SStephen M. Cameron if (err) { 807055c06c71SStephen M. Cameron dev_err(&h->pdev->dev, 8071195f2c65SRobert Elliott "failed to obtain PCI resources\n"); 8072943a7021SRobert Elliott pci_disable_device(h->pdev); 8073943a7021SRobert Elliott return err; 8074edd16368SStephen M. Cameron } 80754fa604e1SRobert Elliott 80764fa604e1SRobert Elliott pci_set_master(h->pdev); 80774fa604e1SRobert Elliott 8078bc2bb154SChristoph Hellwig err = hpsa_interrupt_mode(h); 8079bc2bb154SChristoph Hellwig if (err) 8080bc2bb154SChristoph Hellwig goto clean1; 808112d2cd47SStephen M. Cameron err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr); 80823a7774ceSStephen M. Cameron if (err) 8083195f2c65SRobert Elliott goto clean2; /* intmode+region, pci */ 8084edd16368SStephen M. Cameron h->vaddr = remap_pci_mem(h->paddr, 0x250); 8085204892e9SStephen M. Cameron if (!h->vaddr) { 8086195f2c65SRobert Elliott dev_err(&h->pdev->dev, "failed to remap PCI mem\n"); 8087204892e9SStephen M. Cameron err = -ENOMEM; 8088195f2c65SRobert Elliott goto clean2; /* intmode+region, pci */ 8089204892e9SStephen M. Cameron } 8090fe5389c8SStephen M. Cameron err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 80912c4c8c8bSStephen M. Cameron if (err) 8092195f2c65SRobert Elliott goto clean3; /* vaddr, intmode+region, pci */ 809377c4495cSStephen M. Cameron err = hpsa_find_cfgtables(h); 809477c4495cSStephen M. Cameron if (err) 8095195f2c65SRobert Elliott goto clean3; /* vaddr, intmode+region, pci */ 8096b93d7536SStephen M. Cameron hpsa_find_board_params(h); 8097edd16368SStephen M. Cameron 809876c46e49SStephen M. Cameron if (!hpsa_CISS_signature_present(h)) { 8099edd16368SStephen M. Cameron err = -ENODEV; 8100195f2c65SRobert Elliott goto clean4; /* cfgtables, vaddr, intmode+region, pci */ 8101edd16368SStephen M. Cameron } 810297a5e98cSStephen M. Cameron hpsa_set_driver_support_bits(h); 81033d0eab67SStephen M. Cameron hpsa_p600_dma_prefetch_quirk(h); 8104eb6b2ae9SStephen M. Cameron err = hpsa_enter_simple_mode(h); 8105eb6b2ae9SStephen M. Cameron if (err) 8106195f2c65SRobert Elliott goto clean4; /* cfgtables, vaddr, intmode+region, pci */ 8107edd16368SStephen M. Cameron return 0; 8108edd16368SStephen M. Cameron 8109195f2c65SRobert Elliott clean4: /* cfgtables, vaddr, intmode+region, pci */ 8110195f2c65SRobert Elliott hpsa_free_cfgtables(h); 8111195f2c65SRobert Elliott clean3: /* vaddr, intmode+region, pci */ 8112204892e9SStephen M. Cameron iounmap(h->vaddr); 8113105a3dbcSRobert Elliott h->vaddr = NULL; 8114195f2c65SRobert Elliott clean2: /* intmode+region, pci */ 8115195f2c65SRobert Elliott hpsa_disable_interrupt_mode(h); 8116bc2bb154SChristoph Hellwig clean1: 8117943a7021SRobert Elliott /* 8118943a7021SRobert Elliott * call pci_disable_device before pci_release_regions per 8119943a7021SRobert Elliott * Documentation/PCI/pci.txt 8120943a7021SRobert Elliott */ 8121195f2c65SRobert Elliott pci_disable_device(h->pdev); 8122943a7021SRobert Elliott pci_release_regions(h->pdev); 8123edd16368SStephen M. Cameron return err; 8124edd16368SStephen M. Cameron } 8125edd16368SStephen M. Cameron 81266f039790SGreg Kroah-Hartman static void hpsa_hba_inquiry(struct ctlr_info *h) 8127339b2b14SStephen M. Cameron { 8128339b2b14SStephen M. Cameron int rc; 8129339b2b14SStephen M. Cameron 8130339b2b14SStephen M. Cameron #define HBA_INQUIRY_BYTE_COUNT 64 8131339b2b14SStephen M. Cameron h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL); 8132339b2b14SStephen M. Cameron if (!h->hba_inquiry_data) 8133339b2b14SStephen M. Cameron return; 8134339b2b14SStephen M. Cameron rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0, 8135339b2b14SStephen M. Cameron h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT); 8136339b2b14SStephen M. Cameron if (rc != 0) { 8137339b2b14SStephen M. Cameron kfree(h->hba_inquiry_data); 8138339b2b14SStephen M. Cameron h->hba_inquiry_data = NULL; 8139339b2b14SStephen M. Cameron } 8140339b2b14SStephen M. Cameron } 8141339b2b14SStephen M. Cameron 81426b6c1cd7STomas Henzl static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id) 8143edd16368SStephen M. Cameron { 81441df8552aSStephen M. Cameron int rc, i; 81453b747298STomas Henzl void __iomem *vaddr; 8146edd16368SStephen M. Cameron 81474c2a8c40SStephen M. Cameron if (!reset_devices) 81484c2a8c40SStephen M. Cameron return 0; 81494c2a8c40SStephen M. Cameron 8150132aa220STomas Henzl /* kdump kernel is loading, we don't know in which state is 8151132aa220STomas Henzl * the pci interface. The dev->enable_cnt is equal zero 8152132aa220STomas Henzl * so we call enable+disable, wait a while and switch it on. 8153132aa220STomas Henzl */ 8154132aa220STomas Henzl rc = pci_enable_device(pdev); 8155132aa220STomas Henzl if (rc) { 8156132aa220STomas Henzl dev_warn(&pdev->dev, "Failed to enable PCI device\n"); 8157132aa220STomas Henzl return -ENODEV; 8158132aa220STomas Henzl } 8159132aa220STomas Henzl pci_disable_device(pdev); 8160132aa220STomas Henzl msleep(260); /* a randomly chosen number */ 8161132aa220STomas Henzl rc = pci_enable_device(pdev); 8162132aa220STomas Henzl if (rc) { 8163132aa220STomas Henzl dev_warn(&pdev->dev, "failed to enable device.\n"); 8164132aa220STomas Henzl return -ENODEV; 8165132aa220STomas Henzl } 81664fa604e1SRobert Elliott 8167859c75abSTomas Henzl pci_set_master(pdev); 81684fa604e1SRobert Elliott 81693b747298STomas Henzl vaddr = pci_ioremap_bar(pdev, 0); 81703b747298STomas Henzl if (vaddr == NULL) { 81713b747298STomas Henzl rc = -ENOMEM; 81723b747298STomas Henzl goto out_disable; 81733b747298STomas Henzl } 81743b747298STomas Henzl writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET); 81753b747298STomas Henzl iounmap(vaddr); 81763b747298STomas Henzl 81771df8552aSStephen M. Cameron /* Reset the controller with a PCI power-cycle or via doorbell */ 81786b6c1cd7STomas Henzl rc = hpsa_kdump_hard_reset_controller(pdev, board_id); 8179edd16368SStephen M. Cameron 81801df8552aSStephen M. Cameron /* -ENOTSUPP here means we cannot reset the controller 81811df8552aSStephen M. Cameron * but it's already (and still) up and running in 818218867659SStephen M. Cameron * "performant mode". Or, it might be 640x, which can't reset 818318867659SStephen M. Cameron * due to concerns about shared bbwc between 6402/6404 pair. 81841df8552aSStephen M. Cameron */ 8185adf1b3a3SRobert Elliott if (rc) 8186132aa220STomas Henzl goto out_disable; 8187edd16368SStephen M. Cameron 8188edd16368SStephen M. Cameron /* Now try to get the controller to respond to a no-op */ 81891ba66c9cSRobert Elliott dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n"); 8190edd16368SStephen M. Cameron for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) { 8191edd16368SStephen M. Cameron if (hpsa_noop(pdev) == 0) 8192edd16368SStephen M. Cameron break; 8193edd16368SStephen M. Cameron else 8194edd16368SStephen M. Cameron dev_warn(&pdev->dev, "no-op failed%s\n", 8195edd16368SStephen M. Cameron (i < 11 ? "; re-trying" : "")); 8196edd16368SStephen M. Cameron } 8197132aa220STomas Henzl 8198132aa220STomas Henzl out_disable: 8199132aa220STomas Henzl 8200132aa220STomas Henzl pci_disable_device(pdev); 8201132aa220STomas Henzl return rc; 8202edd16368SStephen M. Cameron } 8203edd16368SStephen M. Cameron 82041fb7c98aSRobert Elliott static void hpsa_free_cmd_pool(struct ctlr_info *h) 82051fb7c98aSRobert Elliott { 82061fb7c98aSRobert Elliott kfree(h->cmd_pool_bits); 8207105a3dbcSRobert Elliott h->cmd_pool_bits = NULL; 8208105a3dbcSRobert Elliott if (h->cmd_pool) { 82091fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 82101fb7c98aSRobert Elliott h->nr_cmds * sizeof(struct CommandList), 82111fb7c98aSRobert Elliott h->cmd_pool, 82121fb7c98aSRobert Elliott h->cmd_pool_dhandle); 8213105a3dbcSRobert Elliott h->cmd_pool = NULL; 8214105a3dbcSRobert Elliott h->cmd_pool_dhandle = 0; 8215105a3dbcSRobert Elliott } 8216105a3dbcSRobert Elliott if (h->errinfo_pool) { 82171fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 82181fb7c98aSRobert Elliott h->nr_cmds * sizeof(struct ErrorInfo), 82191fb7c98aSRobert Elliott h->errinfo_pool, 82201fb7c98aSRobert Elliott h->errinfo_pool_dhandle); 8221105a3dbcSRobert Elliott h->errinfo_pool = NULL; 8222105a3dbcSRobert Elliott h->errinfo_pool_dhandle = 0; 8223105a3dbcSRobert Elliott } 82241fb7c98aSRobert Elliott } 82251fb7c98aSRobert Elliott 8226d37ffbe4SRobert Elliott static int hpsa_alloc_cmd_pool(struct ctlr_info *h) 82272e9d1b36SStephen M. Cameron { 82282e9d1b36SStephen M. Cameron h->cmd_pool_bits = kzalloc( 82292e9d1b36SStephen M. Cameron DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) * 82302e9d1b36SStephen M. Cameron sizeof(unsigned long), GFP_KERNEL); 82312e9d1b36SStephen M. Cameron h->cmd_pool = pci_alloc_consistent(h->pdev, 82322e9d1b36SStephen M. Cameron h->nr_cmds * sizeof(*h->cmd_pool), 82332e9d1b36SStephen M. Cameron &(h->cmd_pool_dhandle)); 82342e9d1b36SStephen M. Cameron h->errinfo_pool = pci_alloc_consistent(h->pdev, 82352e9d1b36SStephen M. Cameron h->nr_cmds * sizeof(*h->errinfo_pool), 82362e9d1b36SStephen M. Cameron &(h->errinfo_pool_dhandle)); 82372e9d1b36SStephen M. Cameron if ((h->cmd_pool_bits == NULL) 82382e9d1b36SStephen M. Cameron || (h->cmd_pool == NULL) 82392e9d1b36SStephen M. Cameron || (h->errinfo_pool == NULL)) { 82402e9d1b36SStephen M. Cameron dev_err(&h->pdev->dev, "out of memory in %s", __func__); 82412c143342SRobert Elliott goto clean_up; 82422e9d1b36SStephen M. Cameron } 8243360c73bdSStephen Cameron hpsa_preinitialize_commands(h); 82442e9d1b36SStephen M. Cameron return 0; 82452c143342SRobert Elliott clean_up: 82462c143342SRobert Elliott hpsa_free_cmd_pool(h); 82472c143342SRobert Elliott return -ENOMEM; 82482e9d1b36SStephen M. Cameron } 82492e9d1b36SStephen M. Cameron 8250ec501a18SRobert Elliott /* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */ 8251ec501a18SRobert Elliott static void hpsa_free_irqs(struct ctlr_info *h) 8252ec501a18SRobert Elliott { 8253ec501a18SRobert Elliott int i; 8254ec501a18SRobert Elliott 8255bc2bb154SChristoph Hellwig if (!h->msix_vectors || h->intr_mode != PERF_MODE_INT) { 8256ec501a18SRobert Elliott /* Single reply queue, only one irq to free */ 82577dc62d93SColin Ian King free_irq(pci_irq_vector(h->pdev, 0), &h->q[h->intr_mode]); 8258bc2bb154SChristoph Hellwig h->q[h->intr_mode] = 0; 8259ec501a18SRobert Elliott return; 8260ec501a18SRobert Elliott } 8261ec501a18SRobert Elliott 8262bc2bb154SChristoph Hellwig for (i = 0; i < h->msix_vectors; i++) { 8263bc2bb154SChristoph Hellwig free_irq(pci_irq_vector(h->pdev, i), &h->q[i]); 8264105a3dbcSRobert Elliott h->q[i] = 0; 8265ec501a18SRobert Elliott } 8266a4e17fc1SRobert Elliott for (; i < MAX_REPLY_QUEUES; i++) 8267a4e17fc1SRobert Elliott h->q[i] = 0; 8268ec501a18SRobert Elliott } 8269ec501a18SRobert Elliott 82709ee61794SRobert Elliott /* returns 0 on success; cleans up and returns -Enn on error */ 82719ee61794SRobert Elliott static int hpsa_request_irqs(struct ctlr_info *h, 82720ae01a32SStephen M. Cameron irqreturn_t (*msixhandler)(int, void *), 82730ae01a32SStephen M. Cameron irqreturn_t (*intxhandler)(int, void *)) 82740ae01a32SStephen M. Cameron { 8275254f796bSMatt Gates int rc, i; 82760ae01a32SStephen M. Cameron 8277254f796bSMatt Gates /* 8278254f796bSMatt Gates * initialize h->q[x] = x so that interrupt handlers know which 8279254f796bSMatt Gates * queue to process. 8280254f796bSMatt Gates */ 8281254f796bSMatt Gates for (i = 0; i < MAX_REPLY_QUEUES; i++) 8282254f796bSMatt Gates h->q[i] = (u8) i; 8283254f796bSMatt Gates 8284bc2bb154SChristoph Hellwig if (h->intr_mode == PERF_MODE_INT && h->msix_vectors > 0) { 8285254f796bSMatt Gates /* If performant mode and MSI-X, use multiple reply queues */ 8286bc2bb154SChristoph Hellwig for (i = 0; i < h->msix_vectors; i++) { 82878b47004aSRobert Elliott sprintf(h->intrname[i], "%s-msix%d", h->devname, i); 8288bc2bb154SChristoph Hellwig rc = request_irq(pci_irq_vector(h->pdev, i), msixhandler, 82898b47004aSRobert Elliott 0, h->intrname[i], 8290254f796bSMatt Gates &h->q[i]); 8291a4e17fc1SRobert Elliott if (rc) { 8292a4e17fc1SRobert Elliott int j; 8293a4e17fc1SRobert Elliott 8294a4e17fc1SRobert Elliott dev_err(&h->pdev->dev, 8295a4e17fc1SRobert Elliott "failed to get irq %d for %s\n", 8296bc2bb154SChristoph Hellwig pci_irq_vector(h->pdev, i), h->devname); 8297a4e17fc1SRobert Elliott for (j = 0; j < i; j++) { 8298bc2bb154SChristoph Hellwig free_irq(pci_irq_vector(h->pdev, j), &h->q[j]); 8299a4e17fc1SRobert Elliott h->q[j] = 0; 8300a4e17fc1SRobert Elliott } 8301a4e17fc1SRobert Elliott for (; j < MAX_REPLY_QUEUES; j++) 8302a4e17fc1SRobert Elliott h->q[j] = 0; 8303a4e17fc1SRobert Elliott return rc; 8304a4e17fc1SRobert Elliott } 8305a4e17fc1SRobert Elliott } 8306254f796bSMatt Gates } else { 8307254f796bSMatt Gates /* Use single reply pool */ 8308bc2bb154SChristoph Hellwig if (h->msix_vectors > 0 || h->pdev->msi_enabled) { 8309bc2bb154SChristoph Hellwig sprintf(h->intrname[0], "%s-msi%s", h->devname, 8310bc2bb154SChristoph Hellwig h->msix_vectors ? "x" : ""); 8311bc2bb154SChristoph Hellwig rc = request_irq(pci_irq_vector(h->pdev, 0), 83128b47004aSRobert Elliott msixhandler, 0, 8313bc2bb154SChristoph Hellwig h->intrname[0], 8314254f796bSMatt Gates &h->q[h->intr_mode]); 8315254f796bSMatt Gates } else { 83168b47004aSRobert Elliott sprintf(h->intrname[h->intr_mode], 83178b47004aSRobert Elliott "%s-intx", h->devname); 8318bc2bb154SChristoph Hellwig rc = request_irq(pci_irq_vector(h->pdev, 0), 83198b47004aSRobert Elliott intxhandler, IRQF_SHARED, 8320bc2bb154SChristoph Hellwig h->intrname[0], 8321254f796bSMatt Gates &h->q[h->intr_mode]); 8322254f796bSMatt Gates } 8323254f796bSMatt Gates } 83240ae01a32SStephen M. Cameron if (rc) { 8325195f2c65SRobert Elliott dev_err(&h->pdev->dev, "failed to get irq %d for %s\n", 8326bc2bb154SChristoph Hellwig pci_irq_vector(h->pdev, 0), h->devname); 8327195f2c65SRobert Elliott hpsa_free_irqs(h); 83280ae01a32SStephen M. Cameron return -ENODEV; 83290ae01a32SStephen M. Cameron } 83300ae01a32SStephen M. Cameron return 0; 83310ae01a32SStephen M. Cameron } 83320ae01a32SStephen M. Cameron 83336f039790SGreg Kroah-Hartman static int hpsa_kdump_soft_reset(struct ctlr_info *h) 833464670ac8SStephen M. Cameron { 833539c53f55SRobert Elliott int rc; 8336bf43caf3SRobert Elliott hpsa_send_host_reset(h, RAID_CTLR_LUNID, HPSA_RESET_TYPE_CONTROLLER); 833764670ac8SStephen M. Cameron 833864670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n"); 833939c53f55SRobert Elliott rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY); 834039c53f55SRobert Elliott if (rc) { 834164670ac8SStephen M. Cameron dev_warn(&h->pdev->dev, "Soft reset had no effect.\n"); 834239c53f55SRobert Elliott return rc; 834364670ac8SStephen M. Cameron } 834464670ac8SStephen M. Cameron 834564670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n"); 834639c53f55SRobert Elliott rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 834739c53f55SRobert Elliott if (rc) { 834864670ac8SStephen M. Cameron dev_warn(&h->pdev->dev, "Board failed to become ready " 834964670ac8SStephen M. Cameron "after soft reset.\n"); 835039c53f55SRobert Elliott return rc; 835164670ac8SStephen M. Cameron } 835264670ac8SStephen M. Cameron 835364670ac8SStephen M. Cameron return 0; 835464670ac8SStephen M. Cameron } 835564670ac8SStephen M. Cameron 8356072b0518SStephen M. Cameron static void hpsa_free_reply_queues(struct ctlr_info *h) 8357072b0518SStephen M. Cameron { 8358072b0518SStephen M. Cameron int i; 8359072b0518SStephen M. Cameron 8360072b0518SStephen M. Cameron for (i = 0; i < h->nreply_queues; i++) { 8361072b0518SStephen M. Cameron if (!h->reply_queue[i].head) 8362072b0518SStephen M. Cameron continue; 83631fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 83641fb7c98aSRobert Elliott h->reply_queue_size, 83651fb7c98aSRobert Elliott h->reply_queue[i].head, 83661fb7c98aSRobert Elliott h->reply_queue[i].busaddr); 8367072b0518SStephen M. Cameron h->reply_queue[i].head = NULL; 8368072b0518SStephen M. Cameron h->reply_queue[i].busaddr = 0; 8369072b0518SStephen M. Cameron } 8370105a3dbcSRobert Elliott h->reply_queue_size = 0; 8371072b0518SStephen M. Cameron } 8372072b0518SStephen M. Cameron 83730097f0f4SStephen M. Cameron static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h) 83740097f0f4SStephen M. Cameron { 8375105a3dbcSRobert Elliott hpsa_free_performant_mode(h); /* init_one 7 */ 8376105a3dbcSRobert Elliott hpsa_free_sg_chain_blocks(h); /* init_one 6 */ 8377105a3dbcSRobert Elliott hpsa_free_cmd_pool(h); /* init_one 5 */ 8378105a3dbcSRobert Elliott hpsa_free_irqs(h); /* init_one 4 */ 83792946e82bSRobert Elliott scsi_host_put(h->scsi_host); /* init_one 3 */ 83802946e82bSRobert Elliott h->scsi_host = NULL; /* init_one 3 */ 83812946e82bSRobert Elliott hpsa_free_pci_init(h); /* init_one 2_5 */ 83829ecd953aSRobert Elliott free_percpu(h->lockup_detected); /* init_one 2 */ 83839ecd953aSRobert Elliott h->lockup_detected = NULL; /* init_one 2 */ 83849ecd953aSRobert Elliott if (h->resubmit_wq) { 83859ecd953aSRobert Elliott destroy_workqueue(h->resubmit_wq); /* init_one 1 */ 83869ecd953aSRobert Elliott h->resubmit_wq = NULL; 83879ecd953aSRobert Elliott } 83889ecd953aSRobert Elliott if (h->rescan_ctlr_wq) { 83899ecd953aSRobert Elliott destroy_workqueue(h->rescan_ctlr_wq); 83909ecd953aSRobert Elliott h->rescan_ctlr_wq = NULL; 83919ecd953aSRobert Elliott } 8392105a3dbcSRobert Elliott kfree(h); /* init_one 1 */ 839364670ac8SStephen M. Cameron } 839464670ac8SStephen M. Cameron 8395a0c12413SStephen M. Cameron /* Called when controller lockup detected. */ 8396f2405db8SDon Brace static void fail_all_outstanding_cmds(struct ctlr_info *h) 8397a0c12413SStephen M. Cameron { 8398281a7fd0SWebb Scales int i, refcount; 8399281a7fd0SWebb Scales struct CommandList *c; 840025163bd5SWebb Scales int failcount = 0; 8401a0c12413SStephen M. Cameron 8402080ef1ccSDon Brace flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */ 8403f2405db8SDon Brace for (i = 0; i < h->nr_cmds; i++) { 8404f2405db8SDon Brace c = h->cmd_pool + i; 8405281a7fd0SWebb Scales refcount = atomic_inc_return(&c->refcount); 8406281a7fd0SWebb Scales if (refcount > 1) { 840725163bd5SWebb Scales c->err_info->CommandStatus = CMD_CTLR_LOCKUP; 84085a3d16f5SStephen M. Cameron finish_cmd(c); 8409433b5f4dSStephen Cameron atomic_dec(&h->commands_outstanding); 841025163bd5SWebb Scales failcount++; 8411a0c12413SStephen M. Cameron } 8412281a7fd0SWebb Scales cmd_free(h, c); 8413281a7fd0SWebb Scales } 841425163bd5SWebb Scales dev_warn(&h->pdev->dev, 841525163bd5SWebb Scales "failed %d commands in fail_all\n", failcount); 8416a0c12413SStephen M. Cameron } 8417a0c12413SStephen M. Cameron 8418094963daSStephen M. Cameron static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value) 8419094963daSStephen M. Cameron { 8420c8ed0010SRusty Russell int cpu; 8421094963daSStephen M. Cameron 8422c8ed0010SRusty Russell for_each_online_cpu(cpu) { 8423094963daSStephen M. Cameron u32 *lockup_detected; 8424094963daSStephen M. Cameron lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 8425094963daSStephen M. Cameron *lockup_detected = value; 8426094963daSStephen M. Cameron } 8427094963daSStephen M. Cameron wmb(); /* be sure the per-cpu variables are out to memory */ 8428094963daSStephen M. Cameron } 8429094963daSStephen M. Cameron 8430a0c12413SStephen M. Cameron static void controller_lockup_detected(struct ctlr_info *h) 8431a0c12413SStephen M. Cameron { 8432a0c12413SStephen M. Cameron unsigned long flags; 8433094963daSStephen M. Cameron u32 lockup_detected; 8434a0c12413SStephen M. Cameron 8435a0c12413SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 8436a0c12413SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 8437094963daSStephen M. Cameron lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET); 8438094963daSStephen M. Cameron if (!lockup_detected) { 8439094963daSStephen M. Cameron /* no heartbeat, but controller gave us a zero. */ 8440094963daSStephen M. Cameron dev_warn(&h->pdev->dev, 844125163bd5SWebb Scales "lockup detected after %d but scratchpad register is zero\n", 844225163bd5SWebb Scales h->heartbeat_sample_interval / HZ); 8443094963daSStephen M. Cameron lockup_detected = 0xffffffff; 8444094963daSStephen M. Cameron } 8445094963daSStephen M. Cameron set_lockup_detected_for_all_cpus(h, lockup_detected); 8446a0c12413SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 844725163bd5SWebb Scales dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n", 844825163bd5SWebb Scales lockup_detected, h->heartbeat_sample_interval / HZ); 8449a0c12413SStephen M. Cameron pci_disable_device(h->pdev); 8450f2405db8SDon Brace fail_all_outstanding_cmds(h); 8451a0c12413SStephen M. Cameron } 8452a0c12413SStephen M. Cameron 845325163bd5SWebb Scales static int detect_controller_lockup(struct ctlr_info *h) 8454a0c12413SStephen M. Cameron { 8455a0c12413SStephen M. Cameron u64 now; 8456a0c12413SStephen M. Cameron u32 heartbeat; 8457a0c12413SStephen M. Cameron unsigned long flags; 8458a0c12413SStephen M. Cameron 8459a0c12413SStephen M. Cameron now = get_jiffies_64(); 8460a0c12413SStephen M. Cameron /* If we've received an interrupt recently, we're ok. */ 8461a0c12413SStephen M. Cameron if (time_after64(h->last_intr_timestamp + 8462e85c5974SStephen M. Cameron (h->heartbeat_sample_interval), now)) 846325163bd5SWebb Scales return false; 8464a0c12413SStephen M. Cameron 8465a0c12413SStephen M. Cameron /* 8466a0c12413SStephen M. Cameron * If we've already checked the heartbeat recently, we're ok. 8467a0c12413SStephen M. Cameron * This could happen if someone sends us a signal. We 8468a0c12413SStephen M. Cameron * otherwise don't care about signals in this thread. 8469a0c12413SStephen M. Cameron */ 8470a0c12413SStephen M. Cameron if (time_after64(h->last_heartbeat_timestamp + 8471e85c5974SStephen M. Cameron (h->heartbeat_sample_interval), now)) 847225163bd5SWebb Scales return false; 8473a0c12413SStephen M. Cameron 8474a0c12413SStephen M. Cameron /* If heartbeat has not changed since we last looked, we're not ok. */ 8475a0c12413SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 8476a0c12413SStephen M. Cameron heartbeat = readl(&h->cfgtable->HeartBeat); 8477a0c12413SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 8478a0c12413SStephen M. Cameron if (h->last_heartbeat == heartbeat) { 8479a0c12413SStephen M. Cameron controller_lockup_detected(h); 848025163bd5SWebb Scales return true; 8481a0c12413SStephen M. Cameron } 8482a0c12413SStephen M. Cameron 8483a0c12413SStephen M. Cameron /* We're ok. */ 8484a0c12413SStephen M. Cameron h->last_heartbeat = heartbeat; 8485a0c12413SStephen M. Cameron h->last_heartbeat_timestamp = now; 848625163bd5SWebb Scales return false; 8487a0c12413SStephen M. Cameron } 8488a0c12413SStephen M. Cameron 84899846590eSStephen M. Cameron static void hpsa_ack_ctlr_events(struct ctlr_info *h) 849076438d08SStephen M. Cameron { 849176438d08SStephen M. Cameron int i; 849276438d08SStephen M. Cameron char *event_type; 849376438d08SStephen M. Cameron 8494e4aa3e6aSStephen Cameron if (!(h->fw_support & MISC_FW_EVENT_NOTIFY)) 8495e4aa3e6aSStephen Cameron return; 8496e4aa3e6aSStephen Cameron 849776438d08SStephen M. Cameron /* Ask the controller to clear the events we're handling. */ 84981f7cee8cSStephen M. Cameron if ((h->transMethod & (CFGTBL_Trans_io_accel1 84991f7cee8cSStephen M. Cameron | CFGTBL_Trans_io_accel2)) && 850076438d08SStephen M. Cameron (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE || 850176438d08SStephen M. Cameron h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) { 850276438d08SStephen M. Cameron 850376438d08SStephen M. Cameron if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE) 850476438d08SStephen M. Cameron event_type = "state change"; 850576438d08SStephen M. Cameron if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE) 850676438d08SStephen M. Cameron event_type = "configuration change"; 850776438d08SStephen M. Cameron /* Stop sending new RAID offload reqs via the IO accelerator */ 850876438d08SStephen M. Cameron scsi_block_requests(h->scsi_host); 85095323ed74SDon Brace for (i = 0; i < h->ndevices; i++) { 851076438d08SStephen M. Cameron h->dev[i]->offload_enabled = 0; 85115323ed74SDon Brace h->dev[i]->offload_to_be_enabled = 0; 85125323ed74SDon Brace } 851323100dd9SStephen M. Cameron hpsa_drain_accel_commands(h); 851476438d08SStephen M. Cameron /* Set 'accelerator path config change' bit */ 851576438d08SStephen M. Cameron dev_warn(&h->pdev->dev, 851676438d08SStephen M. Cameron "Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n", 851776438d08SStephen M. Cameron h->events, event_type); 851876438d08SStephen M. Cameron writel(h->events, &(h->cfgtable->clear_event_notify)); 851976438d08SStephen M. Cameron /* Set the "clear event notify field update" bit 6 */ 852076438d08SStephen M. Cameron writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL); 852176438d08SStephen M. Cameron /* Wait until ctlr clears 'clear event notify field', bit 6 */ 852276438d08SStephen M. Cameron hpsa_wait_for_clear_event_notify_ack(h); 852376438d08SStephen M. Cameron scsi_unblock_requests(h->scsi_host); 852476438d08SStephen M. Cameron } else { 852576438d08SStephen M. Cameron /* Acknowledge controller notification events. */ 852676438d08SStephen M. Cameron writel(h->events, &(h->cfgtable->clear_event_notify)); 852776438d08SStephen M. Cameron writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL); 852876438d08SStephen M. Cameron hpsa_wait_for_clear_event_notify_ack(h); 852976438d08SStephen M. Cameron #if 0 853076438d08SStephen M. Cameron writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 853176438d08SStephen M. Cameron hpsa_wait_for_mode_change_ack(h); 853276438d08SStephen M. Cameron #endif 853376438d08SStephen M. Cameron } 85349846590eSStephen M. Cameron return; 853576438d08SStephen M. Cameron } 853676438d08SStephen M. Cameron 853776438d08SStephen M. Cameron /* Check a register on the controller to see if there are configuration 853876438d08SStephen M. Cameron * changes (added/changed/removed logical drives, etc.) which mean that 8539e863d68eSScott Teel * we should rescan the controller for devices. 8540e863d68eSScott Teel * Also check flag for driver-initiated rescan. 854176438d08SStephen M. Cameron */ 85429846590eSStephen M. Cameron static int hpsa_ctlr_needs_rescan(struct ctlr_info *h) 854376438d08SStephen M. Cameron { 8544853633e8SDon Brace if (h->drv_req_rescan) { 8545853633e8SDon Brace h->drv_req_rescan = 0; 8546853633e8SDon Brace return 1; 8547853633e8SDon Brace } 8548853633e8SDon Brace 854976438d08SStephen M. Cameron if (!(h->fw_support & MISC_FW_EVENT_NOTIFY)) 85509846590eSStephen M. Cameron return 0; 855176438d08SStephen M. Cameron 855276438d08SStephen M. Cameron h->events = readl(&(h->cfgtable->event_notify)); 85539846590eSStephen M. Cameron return h->events & RESCAN_REQUIRED_EVENT_BITS; 85549846590eSStephen M. Cameron } 855576438d08SStephen M. Cameron 855676438d08SStephen M. Cameron /* 85579846590eSStephen M. Cameron * Check if any of the offline devices have become ready 855876438d08SStephen M. Cameron */ 85599846590eSStephen M. Cameron static int hpsa_offline_devices_ready(struct ctlr_info *h) 85609846590eSStephen M. Cameron { 85619846590eSStephen M. Cameron unsigned long flags; 85629846590eSStephen M. Cameron struct offline_device_entry *d; 85639846590eSStephen M. Cameron struct list_head *this, *tmp; 85649846590eSStephen M. Cameron 85659846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 85669846590eSStephen M. Cameron list_for_each_safe(this, tmp, &h->offline_device_list) { 85679846590eSStephen M. Cameron d = list_entry(this, struct offline_device_entry, 85689846590eSStephen M. Cameron offline_list); 85699846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 8570d1fea47cSStephen M. Cameron if (!hpsa_volume_offline(h, d->scsi3addr)) { 8571d1fea47cSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 8572d1fea47cSStephen M. Cameron list_del(&d->offline_list); 8573d1fea47cSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 85749846590eSStephen M. Cameron return 1; 8575d1fea47cSStephen M. Cameron } 85769846590eSStephen M. Cameron spin_lock_irqsave(&h->offline_device_lock, flags); 857776438d08SStephen M. Cameron } 85789846590eSStephen M. Cameron spin_unlock_irqrestore(&h->offline_device_lock, flags); 85799846590eSStephen M. Cameron return 0; 85809846590eSStephen M. Cameron } 85819846590eSStephen M. Cameron 858234592254SScott Teel static int hpsa_luns_changed(struct ctlr_info *h) 858334592254SScott Teel { 858434592254SScott Teel int rc = 1; /* assume there are changes */ 858534592254SScott Teel struct ReportLUNdata *logdev = NULL; 858634592254SScott Teel 858734592254SScott Teel /* if we can't find out if lun data has changed, 858834592254SScott Teel * assume that it has. 858934592254SScott Teel */ 859034592254SScott Teel 859134592254SScott Teel if (!h->lastlogicals) 8592*7e8a9486SAmit Kushwaha return rc; 859334592254SScott Teel 859434592254SScott Teel logdev = kzalloc(sizeof(*logdev), GFP_KERNEL); 8595*7e8a9486SAmit Kushwaha if (!logdev) 8596*7e8a9486SAmit Kushwaha return rc; 8597*7e8a9486SAmit Kushwaha 859834592254SScott Teel if (hpsa_scsi_do_report_luns(h, 1, logdev, sizeof(*logdev), 0)) { 859934592254SScott Teel dev_warn(&h->pdev->dev, 860034592254SScott Teel "report luns failed, can't track lun changes.\n"); 860134592254SScott Teel goto out; 860234592254SScott Teel } 860334592254SScott Teel if (memcmp(logdev, h->lastlogicals, sizeof(*logdev))) { 860434592254SScott Teel dev_info(&h->pdev->dev, 860534592254SScott Teel "Lun changes detected.\n"); 860634592254SScott Teel memcpy(h->lastlogicals, logdev, sizeof(*logdev)); 860734592254SScott Teel goto out; 860834592254SScott Teel } else 860934592254SScott Teel rc = 0; /* no changes detected. */ 861034592254SScott Teel out: 861134592254SScott Teel kfree(logdev); 861234592254SScott Teel return rc; 861334592254SScott Teel } 861434592254SScott Teel 86156636e7f4SDon Brace static void hpsa_rescan_ctlr_worker(struct work_struct *work) 8616a0c12413SStephen M. Cameron { 8617a0c12413SStephen M. Cameron unsigned long flags; 86188a98db73SStephen M. Cameron struct ctlr_info *h = container_of(to_delayed_work(work), 86196636e7f4SDon Brace struct ctlr_info, rescan_ctlr_work); 86206636e7f4SDon Brace 86216636e7f4SDon Brace 86226636e7f4SDon Brace if (h->remove_in_progress) 86238a98db73SStephen M. Cameron return; 86249846590eSStephen M. Cameron 8625bfd7546cSDon Brace /* 8626bfd7546cSDon Brace * Do the scan after the reset 8627bfd7546cSDon Brace */ 8628bfd7546cSDon Brace if (h->reset_in_progress) { 8629bfd7546cSDon Brace h->drv_req_rescan = 1; 8630bfd7546cSDon Brace return; 8631bfd7546cSDon Brace } 8632bfd7546cSDon Brace 86339846590eSStephen M. Cameron if (hpsa_ctlr_needs_rescan(h) || hpsa_offline_devices_ready(h)) { 86349846590eSStephen M. Cameron scsi_host_get(h->scsi_host); 86359846590eSStephen M. Cameron hpsa_ack_ctlr_events(h); 86369846590eSStephen M. Cameron hpsa_scan_start(h->scsi_host); 86379846590eSStephen M. Cameron scsi_host_put(h->scsi_host); 863834592254SScott Teel } else if (h->discovery_polling) { 8639c2adae44SScott Teel hpsa_disable_rld_caching(h); 864034592254SScott Teel if (hpsa_luns_changed(h)) { 864134592254SScott Teel struct Scsi_Host *sh = NULL; 864234592254SScott Teel 864334592254SScott Teel dev_info(&h->pdev->dev, 864434592254SScott Teel "driver discovery polling rescan.\n"); 864534592254SScott Teel sh = scsi_host_get(h->scsi_host); 864634592254SScott Teel if (sh != NULL) { 864734592254SScott Teel hpsa_scan_start(sh); 864834592254SScott Teel scsi_host_put(sh); 864934592254SScott Teel } 865034592254SScott Teel } 86519846590eSStephen M. Cameron } 86526636e7f4SDon Brace spin_lock_irqsave(&h->lock, flags); 86536636e7f4SDon Brace if (!h->remove_in_progress) 86546636e7f4SDon Brace queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work, 86556636e7f4SDon Brace h->heartbeat_sample_interval); 86566636e7f4SDon Brace spin_unlock_irqrestore(&h->lock, flags); 86576636e7f4SDon Brace } 86586636e7f4SDon Brace 86596636e7f4SDon Brace static void hpsa_monitor_ctlr_worker(struct work_struct *work) 86606636e7f4SDon Brace { 86616636e7f4SDon Brace unsigned long flags; 86626636e7f4SDon Brace struct ctlr_info *h = container_of(to_delayed_work(work), 86636636e7f4SDon Brace struct ctlr_info, monitor_ctlr_work); 86646636e7f4SDon Brace 86656636e7f4SDon Brace detect_controller_lockup(h); 86666636e7f4SDon Brace if (lockup_detected(h)) 86676636e7f4SDon Brace return; 86689846590eSStephen M. Cameron 86698a98db73SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 86706636e7f4SDon Brace if (!h->remove_in_progress) 86718a98db73SStephen M. Cameron schedule_delayed_work(&h->monitor_ctlr_work, 86728a98db73SStephen M. Cameron h->heartbeat_sample_interval); 86738a98db73SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 8674a0c12413SStephen M. Cameron } 8675a0c12413SStephen M. Cameron 86766636e7f4SDon Brace static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h, 86776636e7f4SDon Brace char *name) 86786636e7f4SDon Brace { 86796636e7f4SDon Brace struct workqueue_struct *wq = NULL; 86806636e7f4SDon Brace 8681397ea9cbSDon Brace wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr); 86826636e7f4SDon Brace if (!wq) 86836636e7f4SDon Brace dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name); 86846636e7f4SDon Brace 86856636e7f4SDon Brace return wq; 86866636e7f4SDon Brace } 86876636e7f4SDon Brace 86886f039790SGreg Kroah-Hartman static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 86894c2a8c40SStephen M. Cameron { 86904c2a8c40SStephen M. Cameron int dac, rc; 86914c2a8c40SStephen M. Cameron struct ctlr_info *h; 869264670ac8SStephen M. Cameron int try_soft_reset = 0; 869364670ac8SStephen M. Cameron unsigned long flags; 86946b6c1cd7STomas Henzl u32 board_id; 86954c2a8c40SStephen M. Cameron 86964c2a8c40SStephen M. Cameron if (number_of_controllers == 0) 86974c2a8c40SStephen M. Cameron printk(KERN_INFO DRIVER_NAME "\n"); 86984c2a8c40SStephen M. Cameron 86996b6c1cd7STomas Henzl rc = hpsa_lookup_board_id(pdev, &board_id); 87006b6c1cd7STomas Henzl if (rc < 0) { 87016b6c1cd7STomas Henzl dev_warn(&pdev->dev, "Board ID not found\n"); 87026b6c1cd7STomas Henzl return rc; 87036b6c1cd7STomas Henzl } 87046b6c1cd7STomas Henzl 87056b6c1cd7STomas Henzl rc = hpsa_init_reset_devices(pdev, board_id); 870664670ac8SStephen M. Cameron if (rc) { 870764670ac8SStephen M. Cameron if (rc != -ENOTSUPP) 87084c2a8c40SStephen M. Cameron return rc; 870964670ac8SStephen M. Cameron /* If the reset fails in a particular way (it has no way to do 871064670ac8SStephen M. Cameron * a proper hard reset, so returns -ENOTSUPP) we can try to do 871164670ac8SStephen M. Cameron * a soft reset once we get the controller configured up to the 871264670ac8SStephen M. Cameron * point that it can accept a command. 871364670ac8SStephen M. Cameron */ 871464670ac8SStephen M. Cameron try_soft_reset = 1; 871564670ac8SStephen M. Cameron rc = 0; 871664670ac8SStephen M. Cameron } 871764670ac8SStephen M. Cameron 871864670ac8SStephen M. Cameron reinit_after_soft_reset: 87194c2a8c40SStephen M. Cameron 8720303932fdSDon Brace /* Command structures must be aligned on a 32-byte boundary because 8721303932fdSDon Brace * the 5 lower bits of the address are used by the hardware. and by 8722303932fdSDon Brace * the driver. See comments in hpsa.h for more info. 8723303932fdSDon Brace */ 8724303932fdSDon Brace BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT); 8725edd16368SStephen M. Cameron h = kzalloc(sizeof(*h), GFP_KERNEL); 8726105a3dbcSRobert Elliott if (!h) { 8727105a3dbcSRobert Elliott dev_err(&pdev->dev, "Failed to allocate controller head\n"); 8728ecd9aad4SStephen M. Cameron return -ENOMEM; 8729105a3dbcSRobert Elliott } 8730edd16368SStephen M. Cameron 873155c06c71SStephen M. Cameron h->pdev = pdev; 8732105a3dbcSRobert Elliott 8733a9a3a273SStephen M. Cameron h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT; 87349846590eSStephen M. Cameron INIT_LIST_HEAD(&h->offline_device_list); 87356eaf46fdSStephen M. Cameron spin_lock_init(&h->lock); 87369846590eSStephen M. Cameron spin_lock_init(&h->offline_device_lock); 87376eaf46fdSStephen M. Cameron spin_lock_init(&h->scan_lock); 873834f0c627SDon Brace atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS); 87399b5c48c2SStephen Cameron atomic_set(&h->abort_cmds_available, HPSA_CMDS_RESERVED_FOR_ABORTS); 8740094963daSStephen M. Cameron 8741094963daSStephen M. Cameron /* Allocate and clear per-cpu variable lockup_detected */ 8742094963daSStephen M. Cameron h->lockup_detected = alloc_percpu(u32); 87432a5ac326SStephen M. Cameron if (!h->lockup_detected) { 8744105a3dbcSRobert Elliott dev_err(&h->pdev->dev, "Failed to allocate lockup detector\n"); 87452a5ac326SStephen M. Cameron rc = -ENOMEM; 87462efa5929SRobert Elliott goto clean1; /* aer/h */ 87472a5ac326SStephen M. Cameron } 8748094963daSStephen M. Cameron set_lockup_detected_for_all_cpus(h, 0); 8749094963daSStephen M. Cameron 875055c06c71SStephen M. Cameron rc = hpsa_pci_init(h); 8751105a3dbcSRobert Elliott if (rc) 87522946e82bSRobert Elliott goto clean2; /* lu, aer/h */ 8753edd16368SStephen M. Cameron 87542946e82bSRobert Elliott /* relies on h-> settings made by hpsa_pci_init, including 87552946e82bSRobert Elliott * interrupt_mode h->intr */ 87562946e82bSRobert Elliott rc = hpsa_scsi_host_alloc(h); 87572946e82bSRobert Elliott if (rc) 87582946e82bSRobert Elliott goto clean2_5; /* pci, lu, aer/h */ 87592946e82bSRobert Elliott 87602946e82bSRobert Elliott sprintf(h->devname, HPSA "%d", h->scsi_host->host_no); 8761edd16368SStephen M. Cameron h->ctlr = number_of_controllers; 8762edd16368SStephen M. Cameron number_of_controllers++; 8763edd16368SStephen M. Cameron 8764edd16368SStephen M. Cameron /* configure PCI DMA stuff */ 8765ecd9aad4SStephen M. Cameron rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 8766ecd9aad4SStephen M. Cameron if (rc == 0) { 8767edd16368SStephen M. Cameron dac = 1; 8768ecd9aad4SStephen M. Cameron } else { 8769ecd9aad4SStephen M. Cameron rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 8770ecd9aad4SStephen M. Cameron if (rc == 0) { 8771edd16368SStephen M. Cameron dac = 0; 8772ecd9aad4SStephen M. Cameron } else { 8773edd16368SStephen M. Cameron dev_err(&pdev->dev, "no suitable DMA available\n"); 87742946e82bSRobert Elliott goto clean3; /* shost, pci, lu, aer/h */ 8775edd16368SStephen M. Cameron } 8776ecd9aad4SStephen M. Cameron } 8777edd16368SStephen M. Cameron 8778edd16368SStephen M. Cameron /* make sure the board interrupts are off */ 8779edd16368SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 878010f66018SStephen M. Cameron 8781105a3dbcSRobert Elliott rc = hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx); 8782105a3dbcSRobert Elliott if (rc) 87832946e82bSRobert Elliott goto clean3; /* shost, pci, lu, aer/h */ 8784d37ffbe4SRobert Elliott rc = hpsa_alloc_cmd_pool(h); 87858947fd10SRobert Elliott if (rc) 87862946e82bSRobert Elliott goto clean4; /* irq, shost, pci, lu, aer/h */ 8787105a3dbcSRobert Elliott rc = hpsa_alloc_sg_chain_blocks(h); 8788105a3dbcSRobert Elliott if (rc) 87892946e82bSRobert Elliott goto clean5; /* cmd, irq, shost, pci, lu, aer/h */ 8790a08a8471SStephen M. Cameron init_waitqueue_head(&h->scan_wait_queue); 87919b5c48c2SStephen Cameron init_waitqueue_head(&h->abort_cmd_wait_queue); 8792d604f533SWebb Scales init_waitqueue_head(&h->event_sync_wait_queue); 8793d604f533SWebb Scales mutex_init(&h->reset_mutex); 8794a08a8471SStephen M. Cameron h->scan_finished = 1; /* no scan currently in progress */ 8795edd16368SStephen M. Cameron 8796edd16368SStephen M. Cameron pci_set_drvdata(pdev, h); 87979a41338eSStephen M. Cameron h->ndevices = 0; 87982946e82bSRobert Elliott 87999a41338eSStephen M. Cameron spin_lock_init(&h->devlock); 8800105a3dbcSRobert Elliott rc = hpsa_put_ctlr_into_performant_mode(h); 8801105a3dbcSRobert Elliott if (rc) 88022946e82bSRobert Elliott goto clean6; /* sg, cmd, irq, shost, pci, lu, aer/h */ 88032946e82bSRobert Elliott 88042efa5929SRobert Elliott /* create the resubmit workqueue */ 88052efa5929SRobert Elliott h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan"); 88062efa5929SRobert Elliott if (!h->rescan_ctlr_wq) { 88072efa5929SRobert Elliott rc = -ENOMEM; 88082efa5929SRobert Elliott goto clean7; 88092efa5929SRobert Elliott } 88102efa5929SRobert Elliott 88112efa5929SRobert Elliott h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit"); 88122efa5929SRobert Elliott if (!h->resubmit_wq) { 88132efa5929SRobert Elliott rc = -ENOMEM; 88142efa5929SRobert Elliott goto clean7; /* aer/h */ 88152efa5929SRobert Elliott } 881664670ac8SStephen M. Cameron 8817105a3dbcSRobert Elliott /* 8818105a3dbcSRobert Elliott * At this point, the controller is ready to take commands. 881964670ac8SStephen M. Cameron * Now, if reset_devices and the hard reset didn't work, try 882064670ac8SStephen M. Cameron * the soft reset and see if that works. 882164670ac8SStephen M. Cameron */ 882264670ac8SStephen M. Cameron if (try_soft_reset) { 882364670ac8SStephen M. Cameron 882464670ac8SStephen M. Cameron /* This is kind of gross. We may or may not get a completion 882564670ac8SStephen M. Cameron * from the soft reset command, and if we do, then the value 882664670ac8SStephen M. Cameron * from the fifo may or may not be valid. So, we wait 10 secs 882764670ac8SStephen M. Cameron * after the reset throwing away any completions we get during 882864670ac8SStephen M. Cameron * that time. Unregister the interrupt handler and register 882964670ac8SStephen M. Cameron * fake ones to scoop up any residual completions. 883064670ac8SStephen M. Cameron */ 883164670ac8SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 883264670ac8SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 883364670ac8SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 8834ec501a18SRobert Elliott hpsa_free_irqs(h); 88359ee61794SRobert Elliott rc = hpsa_request_irqs(h, hpsa_msix_discard_completions, 883664670ac8SStephen M. Cameron hpsa_intx_discard_completions); 883764670ac8SStephen M. Cameron if (rc) { 88389ee61794SRobert Elliott dev_warn(&h->pdev->dev, 88399ee61794SRobert Elliott "Failed to request_irq after soft reset.\n"); 8840d498757cSRobert Elliott /* 8841b2ef480cSRobert Elliott * cannot goto clean7 or free_irqs will be called 8842b2ef480cSRobert Elliott * again. Instead, do its work 8843b2ef480cSRobert Elliott */ 8844b2ef480cSRobert Elliott hpsa_free_performant_mode(h); /* clean7 */ 8845b2ef480cSRobert Elliott hpsa_free_sg_chain_blocks(h); /* clean6 */ 8846b2ef480cSRobert Elliott hpsa_free_cmd_pool(h); /* clean5 */ 8847b2ef480cSRobert Elliott /* 8848b2ef480cSRobert Elliott * skip hpsa_free_irqs(h) clean4 since that 8849b2ef480cSRobert Elliott * was just called before request_irqs failed 8850d498757cSRobert Elliott */ 8851d498757cSRobert Elliott goto clean3; 885264670ac8SStephen M. Cameron } 885364670ac8SStephen M. Cameron 885464670ac8SStephen M. Cameron rc = hpsa_kdump_soft_reset(h); 885564670ac8SStephen M. Cameron if (rc) 885664670ac8SStephen M. Cameron /* Neither hard nor soft reset worked, we're hosed. */ 88577ef7323fSDon Brace goto clean7; 885864670ac8SStephen M. Cameron 885964670ac8SStephen M. Cameron dev_info(&h->pdev->dev, "Board READY.\n"); 886064670ac8SStephen M. Cameron dev_info(&h->pdev->dev, 886164670ac8SStephen M. Cameron "Waiting for stale completions to drain.\n"); 886264670ac8SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_ON); 886364670ac8SStephen M. Cameron msleep(10000); 886464670ac8SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 886564670ac8SStephen M. Cameron 886664670ac8SStephen M. Cameron rc = controller_reset_failed(h->cfgtable); 886764670ac8SStephen M. Cameron if (rc) 886864670ac8SStephen M. Cameron dev_info(&h->pdev->dev, 886964670ac8SStephen M. Cameron "Soft reset appears to have failed.\n"); 887064670ac8SStephen M. Cameron 887164670ac8SStephen M. Cameron /* since the controller's reset, we have to go back and re-init 887264670ac8SStephen M. Cameron * everything. Easiest to just forget what we've done and do it 887364670ac8SStephen M. Cameron * all over again. 887464670ac8SStephen M. Cameron */ 887564670ac8SStephen M. Cameron hpsa_undo_allocations_after_kdump_soft_reset(h); 887664670ac8SStephen M. Cameron try_soft_reset = 0; 887764670ac8SStephen M. Cameron if (rc) 8878b2ef480cSRobert Elliott /* don't goto clean, we already unallocated */ 887964670ac8SStephen M. Cameron return -ENODEV; 888064670ac8SStephen M. Cameron 888164670ac8SStephen M. Cameron goto reinit_after_soft_reset; 888264670ac8SStephen M. Cameron } 8883edd16368SStephen M. Cameron 8884da0697bdSScott Teel /* Enable Accelerated IO path at driver layer */ 8885da0697bdSScott Teel h->acciopath_status = 1; 888634592254SScott Teel /* Disable discovery polling.*/ 888734592254SScott Teel h->discovery_polling = 0; 8888da0697bdSScott Teel 8889e863d68eSScott Teel 8890edd16368SStephen M. Cameron /* Turn the interrupts on so we can service requests */ 8891edd16368SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_ON); 8892edd16368SStephen M. Cameron 8893339b2b14SStephen M. Cameron hpsa_hba_inquiry(h); 88948a98db73SStephen M. Cameron 889534592254SScott Teel h->lastlogicals = kzalloc(sizeof(*(h->lastlogicals)), GFP_KERNEL); 889634592254SScott Teel if (!h->lastlogicals) 889734592254SScott Teel dev_info(&h->pdev->dev, 889834592254SScott Teel "Can't track change to report lun data\n"); 889934592254SScott Teel 8900cf477237SDon Brace /* hook into SCSI subsystem */ 8901cf477237SDon Brace rc = hpsa_scsi_add_host(h); 8902cf477237SDon Brace if (rc) 8903cf477237SDon Brace goto clean7; /* perf, sg, cmd, irq, shost, pci, lu, aer/h */ 8904cf477237SDon Brace 89058a98db73SStephen M. Cameron /* Monitor the controller for firmware lockups */ 89068a98db73SStephen M. Cameron h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 89078a98db73SStephen M. Cameron INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker); 89088a98db73SStephen M. Cameron schedule_delayed_work(&h->monitor_ctlr_work, 89098a98db73SStephen M. Cameron h->heartbeat_sample_interval); 89106636e7f4SDon Brace INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker); 89116636e7f4SDon Brace queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work, 89126636e7f4SDon Brace h->heartbeat_sample_interval); 891388bf6d62SStephen M. Cameron return 0; 8914edd16368SStephen M. Cameron 89152946e82bSRobert Elliott clean7: /* perf, sg, cmd, irq, shost, pci, lu, aer/h */ 8916105a3dbcSRobert Elliott hpsa_free_performant_mode(h); 8917105a3dbcSRobert Elliott h->access.set_intr_mask(h, HPSA_INTR_OFF); 8918105a3dbcSRobert Elliott clean6: /* sg, cmd, irq, pci, lockup, wq/aer/h */ 891933a2ffceSStephen M. Cameron hpsa_free_sg_chain_blocks(h); 89202946e82bSRobert Elliott clean5: /* cmd, irq, shost, pci, lu, aer/h */ 89212e9d1b36SStephen M. Cameron hpsa_free_cmd_pool(h); 89222946e82bSRobert Elliott clean4: /* irq, shost, pci, lu, aer/h */ 8923ec501a18SRobert Elliott hpsa_free_irqs(h); 89242946e82bSRobert Elliott clean3: /* shost, pci, lu, aer/h */ 89252946e82bSRobert Elliott scsi_host_put(h->scsi_host); 89262946e82bSRobert Elliott h->scsi_host = NULL; 89272946e82bSRobert Elliott clean2_5: /* pci, lu, aer/h */ 8928195f2c65SRobert Elliott hpsa_free_pci_init(h); 89292946e82bSRobert Elliott clean2: /* lu, aer/h */ 8930105a3dbcSRobert Elliott if (h->lockup_detected) { 8931094963daSStephen M. Cameron free_percpu(h->lockup_detected); 8932105a3dbcSRobert Elliott h->lockup_detected = NULL; 8933105a3dbcSRobert Elliott } 8934105a3dbcSRobert Elliott clean1: /* wq/aer/h */ 8935105a3dbcSRobert Elliott if (h->resubmit_wq) { 8936105a3dbcSRobert Elliott destroy_workqueue(h->resubmit_wq); 8937105a3dbcSRobert Elliott h->resubmit_wq = NULL; 8938105a3dbcSRobert Elliott } 8939105a3dbcSRobert Elliott if (h->rescan_ctlr_wq) { 8940105a3dbcSRobert Elliott destroy_workqueue(h->rescan_ctlr_wq); 8941105a3dbcSRobert Elliott h->rescan_ctlr_wq = NULL; 8942105a3dbcSRobert Elliott } 8943edd16368SStephen M. Cameron kfree(h); 8944ecd9aad4SStephen M. Cameron return rc; 8945edd16368SStephen M. Cameron } 8946edd16368SStephen M. Cameron 8947edd16368SStephen M. Cameron static void hpsa_flush_cache(struct ctlr_info *h) 8948edd16368SStephen M. Cameron { 8949edd16368SStephen M. Cameron char *flush_buf; 8950edd16368SStephen M. Cameron struct CommandList *c; 895125163bd5SWebb Scales int rc; 8952702890e3SStephen M. Cameron 8953094963daSStephen M. Cameron if (unlikely(lockup_detected(h))) 8954702890e3SStephen M. Cameron return; 8955edd16368SStephen M. Cameron flush_buf = kzalloc(4, GFP_KERNEL); 8956edd16368SStephen M. Cameron if (!flush_buf) 8957edd16368SStephen M. Cameron return; 8958edd16368SStephen M. Cameron 895945fcb86eSStephen Cameron c = cmd_alloc(h); 8960bf43caf3SRobert Elliott 8961a2dac136SStephen M. Cameron if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0, 8962a2dac136SStephen M. Cameron RAID_CTLR_LUNID, TYPE_CMD)) { 8963a2dac136SStephen M. Cameron goto out; 8964a2dac136SStephen M. Cameron } 896525163bd5SWebb Scales rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 8966c448ecfaSDon Brace PCI_DMA_TODEVICE, DEFAULT_TIMEOUT); 896725163bd5SWebb Scales if (rc) 896825163bd5SWebb Scales goto out; 8969edd16368SStephen M. Cameron if (c->err_info->CommandStatus != 0) 8970a2dac136SStephen M. Cameron out: 8971edd16368SStephen M. Cameron dev_warn(&h->pdev->dev, 8972edd16368SStephen M. Cameron "error flushing cache on controller\n"); 897345fcb86eSStephen Cameron cmd_free(h, c); 8974edd16368SStephen M. Cameron kfree(flush_buf); 8975edd16368SStephen M. Cameron } 8976edd16368SStephen M. Cameron 8977c2adae44SScott Teel /* Make controller gather fresh report lun data each time we 8978c2adae44SScott Teel * send down a report luns request 8979c2adae44SScott Teel */ 8980c2adae44SScott Teel static void hpsa_disable_rld_caching(struct ctlr_info *h) 8981c2adae44SScott Teel { 8982c2adae44SScott Teel u32 *options; 8983c2adae44SScott Teel struct CommandList *c; 8984c2adae44SScott Teel int rc; 8985c2adae44SScott Teel 8986c2adae44SScott Teel /* Don't bother trying to set diag options if locked up */ 8987c2adae44SScott Teel if (unlikely(h->lockup_detected)) 8988c2adae44SScott Teel return; 8989c2adae44SScott Teel 8990c2adae44SScott Teel options = kzalloc(sizeof(*options), GFP_KERNEL); 8991*7e8a9486SAmit Kushwaha if (!options) 8992c2adae44SScott Teel return; 8993c2adae44SScott Teel 8994c2adae44SScott Teel c = cmd_alloc(h); 8995c2adae44SScott Teel 8996c2adae44SScott Teel /* first, get the current diag options settings */ 8997c2adae44SScott Teel if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0, 8998c2adae44SScott Teel RAID_CTLR_LUNID, TYPE_CMD)) 8999c2adae44SScott Teel goto errout; 9000c2adae44SScott Teel 9001c2adae44SScott Teel rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 9002c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 9003c2adae44SScott Teel if ((rc != 0) || (c->err_info->CommandStatus != 0)) 9004c2adae44SScott Teel goto errout; 9005c2adae44SScott Teel 9006c2adae44SScott Teel /* Now, set the bit for disabling the RLD caching */ 9007c2adae44SScott Teel *options |= HPSA_DIAG_OPTS_DISABLE_RLD_CACHING; 9008c2adae44SScott Teel 9009c2adae44SScott Teel if (fill_cmd(c, BMIC_SET_DIAG_OPTIONS, h, options, 4, 0, 9010c2adae44SScott Teel RAID_CTLR_LUNID, TYPE_CMD)) 9011c2adae44SScott Teel goto errout; 9012c2adae44SScott Teel 9013c2adae44SScott Teel rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 9014c448ecfaSDon Brace PCI_DMA_TODEVICE, DEFAULT_TIMEOUT); 9015c2adae44SScott Teel if ((rc != 0) || (c->err_info->CommandStatus != 0)) 9016c2adae44SScott Teel goto errout; 9017c2adae44SScott Teel 9018c2adae44SScott Teel /* Now verify that it got set: */ 9019c2adae44SScott Teel if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0, 9020c2adae44SScott Teel RAID_CTLR_LUNID, TYPE_CMD)) 9021c2adae44SScott Teel goto errout; 9022c2adae44SScott Teel 9023c2adae44SScott Teel rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 9024c448ecfaSDon Brace PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT); 9025c2adae44SScott Teel if ((rc != 0) || (c->err_info->CommandStatus != 0)) 9026c2adae44SScott Teel goto errout; 9027c2adae44SScott Teel 9028d8a080c3SDan Carpenter if (*options & HPSA_DIAG_OPTS_DISABLE_RLD_CACHING) 9029c2adae44SScott Teel goto out; 9030c2adae44SScott Teel 9031c2adae44SScott Teel errout: 9032c2adae44SScott Teel dev_err(&h->pdev->dev, 9033c2adae44SScott Teel "Error: failed to disable report lun data caching.\n"); 9034c2adae44SScott Teel out: 9035c2adae44SScott Teel cmd_free(h, c); 9036c2adae44SScott Teel kfree(options); 9037c2adae44SScott Teel } 9038c2adae44SScott Teel 9039edd16368SStephen M. Cameron static void hpsa_shutdown(struct pci_dev *pdev) 9040edd16368SStephen M. Cameron { 9041edd16368SStephen M. Cameron struct ctlr_info *h; 9042edd16368SStephen M. Cameron 9043edd16368SStephen M. Cameron h = pci_get_drvdata(pdev); 9044edd16368SStephen M. Cameron /* Turn board interrupts off and send the flush cache command 9045edd16368SStephen M. Cameron * sendcmd will turn off interrupt, and send the flush... 9046edd16368SStephen M. Cameron * To write all data in the battery backed cache to disks 9047edd16368SStephen M. Cameron */ 9048edd16368SStephen M. Cameron hpsa_flush_cache(h); 9049edd16368SStephen M. Cameron h->access.set_intr_mask(h, HPSA_INTR_OFF); 9050105a3dbcSRobert Elliott hpsa_free_irqs(h); /* init_one 4 */ 9051cc64c817SRobert Elliott hpsa_disable_interrupt_mode(h); /* pci_init 2 */ 9052edd16368SStephen M. Cameron } 9053edd16368SStephen M. Cameron 90546f039790SGreg Kroah-Hartman static void hpsa_free_device_info(struct ctlr_info *h) 905555e14e76SStephen M. Cameron { 905655e14e76SStephen M. Cameron int i; 905755e14e76SStephen M. Cameron 9058105a3dbcSRobert Elliott for (i = 0; i < h->ndevices; i++) { 905955e14e76SStephen M. Cameron kfree(h->dev[i]); 9060105a3dbcSRobert Elliott h->dev[i] = NULL; 9061105a3dbcSRobert Elliott } 906255e14e76SStephen M. Cameron } 906355e14e76SStephen M. Cameron 90646f039790SGreg Kroah-Hartman static void hpsa_remove_one(struct pci_dev *pdev) 9065edd16368SStephen M. Cameron { 9066edd16368SStephen M. Cameron struct ctlr_info *h; 90678a98db73SStephen M. Cameron unsigned long flags; 9068edd16368SStephen M. Cameron 9069edd16368SStephen M. Cameron if (pci_get_drvdata(pdev) == NULL) { 9070edd16368SStephen M. Cameron dev_err(&pdev->dev, "unable to remove device\n"); 9071edd16368SStephen M. Cameron return; 9072edd16368SStephen M. Cameron } 9073edd16368SStephen M. Cameron h = pci_get_drvdata(pdev); 90748a98db73SStephen M. Cameron 90758a98db73SStephen M. Cameron /* Get rid of any controller monitoring work items */ 90768a98db73SStephen M. Cameron spin_lock_irqsave(&h->lock, flags); 90778a98db73SStephen M. Cameron h->remove_in_progress = 1; 90788a98db73SStephen M. Cameron spin_unlock_irqrestore(&h->lock, flags); 90796636e7f4SDon Brace cancel_delayed_work_sync(&h->monitor_ctlr_work); 90806636e7f4SDon Brace cancel_delayed_work_sync(&h->rescan_ctlr_work); 90816636e7f4SDon Brace destroy_workqueue(h->rescan_ctlr_wq); 90826636e7f4SDon Brace destroy_workqueue(h->resubmit_wq); 9083cc64c817SRobert Elliott 90842d041306SDon Brace /* 90852d041306SDon Brace * Call before disabling interrupts. 90862d041306SDon Brace * scsi_remove_host can trigger I/O operations especially 90872d041306SDon Brace * when multipath is enabled. There can be SYNCHRONIZE CACHE 90882d041306SDon Brace * operations which cannot complete and will hang the system. 90892d041306SDon Brace */ 90902d041306SDon Brace if (h->scsi_host) 90912d041306SDon Brace scsi_remove_host(h->scsi_host); /* init_one 8 */ 9092105a3dbcSRobert Elliott /* includes hpsa_free_irqs - init_one 4 */ 9093195f2c65SRobert Elliott /* includes hpsa_disable_interrupt_mode - pci_init 2 */ 9094edd16368SStephen M. Cameron hpsa_shutdown(pdev); 9095cc64c817SRobert Elliott 9096105a3dbcSRobert Elliott hpsa_free_device_info(h); /* scan */ 9097105a3dbcSRobert Elliott 90982946e82bSRobert Elliott kfree(h->hba_inquiry_data); /* init_one 10 */ 90992946e82bSRobert Elliott h->hba_inquiry_data = NULL; /* init_one 10 */ 91002946e82bSRobert Elliott hpsa_free_ioaccel2_sg_chain_blocks(h); 9101105a3dbcSRobert Elliott hpsa_free_performant_mode(h); /* init_one 7 */ 9102105a3dbcSRobert Elliott hpsa_free_sg_chain_blocks(h); /* init_one 6 */ 91031fb7c98aSRobert Elliott hpsa_free_cmd_pool(h); /* init_one 5 */ 910434592254SScott Teel kfree(h->lastlogicals); 9105105a3dbcSRobert Elliott 9106105a3dbcSRobert Elliott /* hpsa_free_irqs already called via hpsa_shutdown init_one 4 */ 9107195f2c65SRobert Elliott 91082946e82bSRobert Elliott scsi_host_put(h->scsi_host); /* init_one 3 */ 91092946e82bSRobert Elliott h->scsi_host = NULL; /* init_one 3 */ 91102946e82bSRobert Elliott 9111195f2c65SRobert Elliott /* includes hpsa_disable_interrupt_mode - pci_init 2 */ 91122946e82bSRobert Elliott hpsa_free_pci_init(h); /* init_one 2.5 */ 9113195f2c65SRobert Elliott 9114105a3dbcSRobert Elliott free_percpu(h->lockup_detected); /* init_one 2 */ 9115105a3dbcSRobert Elliott h->lockup_detected = NULL; /* init_one 2 */ 9116105a3dbcSRobert Elliott /* (void) pci_disable_pcie_error_reporting(pdev); */ /* init_one 1 */ 9117d04e62b9SKevin Barnett 9118d04e62b9SKevin Barnett hpsa_delete_sas_host(h); 9119d04e62b9SKevin Barnett 9120105a3dbcSRobert Elliott kfree(h); /* init_one 1 */ 9121edd16368SStephen M. Cameron } 9122edd16368SStephen M. Cameron 9123edd16368SStephen M. Cameron static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev, 9124edd16368SStephen M. Cameron __attribute__((unused)) pm_message_t state) 9125edd16368SStephen M. Cameron { 9126edd16368SStephen M. Cameron return -ENOSYS; 9127edd16368SStephen M. Cameron } 9128edd16368SStephen M. Cameron 9129edd16368SStephen M. Cameron static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev) 9130edd16368SStephen M. Cameron { 9131edd16368SStephen M. Cameron return -ENOSYS; 9132edd16368SStephen M. Cameron } 9133edd16368SStephen M. Cameron 9134edd16368SStephen M. Cameron static struct pci_driver hpsa_pci_driver = { 9135f79cfec6SStephen M. Cameron .name = HPSA, 9136edd16368SStephen M. Cameron .probe = hpsa_init_one, 91376f039790SGreg Kroah-Hartman .remove = hpsa_remove_one, 9138edd16368SStephen M. Cameron .id_table = hpsa_pci_device_id, /* id_table */ 9139edd16368SStephen M. Cameron .shutdown = hpsa_shutdown, 9140edd16368SStephen M. Cameron .suspend = hpsa_suspend, 9141edd16368SStephen M. Cameron .resume = hpsa_resume, 9142edd16368SStephen M. Cameron }; 9143edd16368SStephen M. Cameron 9144303932fdSDon Brace /* Fill in bucket_map[], given nsgs (the max number of 9145303932fdSDon Brace * scatter gather elements supported) and bucket[], 9146303932fdSDon Brace * which is an array of 8 integers. The bucket[] array 9147303932fdSDon Brace * contains 8 different DMA transfer sizes (in 16 9148303932fdSDon Brace * byte increments) which the controller uses to fetch 9149303932fdSDon Brace * commands. This function fills in bucket_map[], which 9150303932fdSDon Brace * maps a given number of scatter gather elements to one of 9151303932fdSDon Brace * the 8 DMA transfer sizes. The point of it is to allow the 9152303932fdSDon Brace * controller to only do as much DMA as needed to fetch the 9153303932fdSDon Brace * command, with the DMA transfer size encoded in the lower 9154303932fdSDon Brace * bits of the command address. 9155303932fdSDon Brace */ 9156303932fdSDon Brace static void calc_bucket_map(int bucket[], int num_buckets, 91572b08b3e9SDon Brace int nsgs, int min_blocks, u32 *bucket_map) 9158303932fdSDon Brace { 9159303932fdSDon Brace int i, j, b, size; 9160303932fdSDon Brace 9161303932fdSDon Brace /* Note, bucket_map must have nsgs+1 entries. */ 9162303932fdSDon Brace for (i = 0; i <= nsgs; i++) { 9163303932fdSDon Brace /* Compute size of a command with i SG entries */ 9164e1f7de0cSMatt Gates size = i + min_blocks; 9165303932fdSDon Brace b = num_buckets; /* Assume the biggest bucket */ 9166303932fdSDon Brace /* Find the bucket that is just big enough */ 9167e1f7de0cSMatt Gates for (j = 0; j < num_buckets; j++) { 9168303932fdSDon Brace if (bucket[j] >= size) { 9169303932fdSDon Brace b = j; 9170303932fdSDon Brace break; 9171303932fdSDon Brace } 9172303932fdSDon Brace } 9173303932fdSDon Brace /* for a command with i SG entries, use bucket b. */ 9174303932fdSDon Brace bucket_map[i] = b; 9175303932fdSDon Brace } 9176303932fdSDon Brace } 9177303932fdSDon Brace 9178105a3dbcSRobert Elliott /* 9179105a3dbcSRobert Elliott * return -ENODEV on err, 0 on success (or no action) 9180105a3dbcSRobert Elliott * allocates numerous items that must be freed later 9181105a3dbcSRobert Elliott */ 9182c706a795SRobert Elliott static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support) 9183303932fdSDon Brace { 91846c311b57SStephen M. Cameron int i; 91856c311b57SStephen M. Cameron unsigned long register_value; 9186e1f7de0cSMatt Gates unsigned long transMethod = CFGTBL_Trans_Performant | 9187e1f7de0cSMatt Gates (trans_support & CFGTBL_Trans_use_short_tags) | 9188e1f7de0cSMatt Gates CFGTBL_Trans_enable_directed_msix | 9189b9af4937SStephen M. Cameron (trans_support & (CFGTBL_Trans_io_accel1 | 9190b9af4937SStephen M. Cameron CFGTBL_Trans_io_accel2)); 9191e1f7de0cSMatt Gates struct access_method access = SA5_performant_access; 9192def342bdSStephen M. Cameron 9193def342bdSStephen M. Cameron /* This is a bit complicated. There are 8 registers on 9194def342bdSStephen M. Cameron * the controller which we write to to tell it 8 different 9195def342bdSStephen M. Cameron * sizes of commands which there may be. It's a way of 9196def342bdSStephen M. Cameron * reducing the DMA done to fetch each command. Encoded into 9197def342bdSStephen M. Cameron * each command's tag are 3 bits which communicate to the controller 9198def342bdSStephen M. Cameron * which of the eight sizes that command fits within. The size of 9199def342bdSStephen M. Cameron * each command depends on how many scatter gather entries there are. 9200def342bdSStephen M. Cameron * Each SG entry requires 16 bytes. The eight registers are programmed 9201def342bdSStephen M. Cameron * with the number of 16-byte blocks a command of that size requires. 9202def342bdSStephen M. Cameron * The smallest command possible requires 5 such 16 byte blocks. 9203d66ae08bSStephen M. Cameron * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte 9204def342bdSStephen M. Cameron * blocks. Note, this only extends to the SG entries contained 9205def342bdSStephen M. Cameron * within the command block, and does not extend to chained blocks 9206def342bdSStephen M. Cameron * of SG elements. bft[] contains the eight values we write to 9207def342bdSStephen M. Cameron * the registers. They are not evenly distributed, but have more 9208def342bdSStephen M. Cameron * sizes for small commands, and fewer sizes for larger commands. 9209def342bdSStephen M. Cameron */ 9210d66ae08bSStephen M. Cameron int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4}; 9211b9af4937SStephen M. Cameron #define MIN_IOACCEL2_BFT_ENTRY 5 9212b9af4937SStephen M. Cameron #define HPSA_IOACCEL2_HEADER_SZ 4 9213b9af4937SStephen M. Cameron int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12, 9214b9af4937SStephen M. Cameron 13, 14, 15, 16, 17, 18, 19, 9215b9af4937SStephen M. Cameron HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES}; 9216b9af4937SStephen M. Cameron BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16); 9217b9af4937SStephen M. Cameron BUILD_BUG_ON(ARRAY_SIZE(bft) != 8); 9218b9af4937SStephen M. Cameron BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) > 9219b9af4937SStephen M. Cameron 16 * MIN_IOACCEL2_BFT_ENTRY); 9220b9af4937SStephen M. Cameron BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16); 9221d66ae08bSStephen M. Cameron BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4); 9222303932fdSDon Brace /* 5 = 1 s/g entry or 4k 9223303932fdSDon Brace * 6 = 2 s/g entry or 8k 9224303932fdSDon Brace * 8 = 4 s/g entry or 16k 9225303932fdSDon Brace * 10 = 6 s/g entry or 24k 9226303932fdSDon Brace */ 9227303932fdSDon Brace 9228b3a52e79SStephen M. Cameron /* If the controller supports either ioaccel method then 9229b3a52e79SStephen M. Cameron * we can also use the RAID stack submit path that does not 9230b3a52e79SStephen M. Cameron * perform the superfluous readl() after each command submission. 9231b3a52e79SStephen M. Cameron */ 9232b3a52e79SStephen M. Cameron if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2)) 9233b3a52e79SStephen M. Cameron access = SA5_performant_access_no_read; 9234b3a52e79SStephen M. Cameron 9235303932fdSDon Brace /* Controller spec: zero out this buffer. */ 9236072b0518SStephen M. Cameron for (i = 0; i < h->nreply_queues; i++) 9237072b0518SStephen M. Cameron memset(h->reply_queue[i].head, 0, h->reply_queue_size); 9238303932fdSDon Brace 9239d66ae08bSStephen M. Cameron bft[7] = SG_ENTRIES_IN_CMD + 4; 9240d66ae08bSStephen M. Cameron calc_bucket_map(bft, ARRAY_SIZE(bft), 9241e1f7de0cSMatt Gates SG_ENTRIES_IN_CMD, 4, h->blockFetchTable); 9242303932fdSDon Brace for (i = 0; i < 8; i++) 9243303932fdSDon Brace writel(bft[i], &h->transtable->BlockFetch[i]); 9244303932fdSDon Brace 9245303932fdSDon Brace /* size of controller ring buffer */ 9246303932fdSDon Brace writel(h->max_commands, &h->transtable->RepQSize); 9247254f796bSMatt Gates writel(h->nreply_queues, &h->transtable->RepQCount); 9248303932fdSDon Brace writel(0, &h->transtable->RepQCtrAddrLow32); 9249303932fdSDon Brace writel(0, &h->transtable->RepQCtrAddrHigh32); 9250254f796bSMatt Gates 9251254f796bSMatt Gates for (i = 0; i < h->nreply_queues; i++) { 9252254f796bSMatt Gates writel(0, &h->transtable->RepQAddr[i].upper); 9253072b0518SStephen M. Cameron writel(h->reply_queue[i].busaddr, 9254254f796bSMatt Gates &h->transtable->RepQAddr[i].lower); 9255254f796bSMatt Gates } 9256254f796bSMatt Gates 9257b9af4937SStephen M. Cameron writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi); 9258e1f7de0cSMatt Gates writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest)); 9259e1f7de0cSMatt Gates /* 9260e1f7de0cSMatt Gates * enable outbound interrupt coalescing in accelerator mode; 9261e1f7de0cSMatt Gates */ 9262e1f7de0cSMatt Gates if (trans_support & CFGTBL_Trans_io_accel1) { 9263e1f7de0cSMatt Gates access = SA5_ioaccel_mode1_access; 9264e1f7de0cSMatt Gates writel(10, &h->cfgtable->HostWrite.CoalIntDelay); 9265e1f7de0cSMatt Gates writel(4, &h->cfgtable->HostWrite.CoalIntCount); 9266c349775eSScott Teel } else { 9267c349775eSScott Teel if (trans_support & CFGTBL_Trans_io_accel2) { 9268c349775eSScott Teel access = SA5_ioaccel_mode2_access; 9269c349775eSScott Teel writel(10, &h->cfgtable->HostWrite.CoalIntDelay); 9270c349775eSScott Teel writel(4, &h->cfgtable->HostWrite.CoalIntCount); 9271c349775eSScott Teel } 9272e1f7de0cSMatt Gates } 9273303932fdSDon Brace writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 9274c706a795SRobert Elliott if (hpsa_wait_for_mode_change_ack(h)) { 9275c706a795SRobert Elliott dev_err(&h->pdev->dev, 9276c706a795SRobert Elliott "performant mode problem - doorbell timeout\n"); 9277c706a795SRobert Elliott return -ENODEV; 9278c706a795SRobert Elliott } 9279303932fdSDon Brace register_value = readl(&(h->cfgtable->TransportActive)); 9280303932fdSDon Brace if (!(register_value & CFGTBL_Trans_Performant)) { 9281050f7147SStephen Cameron dev_err(&h->pdev->dev, 9282050f7147SStephen Cameron "performant mode problem - transport not active\n"); 9283c706a795SRobert Elliott return -ENODEV; 9284303932fdSDon Brace } 9285960a30e7SStephen M. Cameron /* Change the access methods to the performant access methods */ 9286e1f7de0cSMatt Gates h->access = access; 9287e1f7de0cSMatt Gates h->transMethod = transMethod; 9288e1f7de0cSMatt Gates 9289b9af4937SStephen M. Cameron if (!((trans_support & CFGTBL_Trans_io_accel1) || 9290b9af4937SStephen M. Cameron (trans_support & CFGTBL_Trans_io_accel2))) 9291c706a795SRobert Elliott return 0; 9292e1f7de0cSMatt Gates 9293b9af4937SStephen M. Cameron if (trans_support & CFGTBL_Trans_io_accel1) { 9294e1f7de0cSMatt Gates /* Set up I/O accelerator mode */ 9295e1f7de0cSMatt Gates for (i = 0; i < h->nreply_queues; i++) { 9296e1f7de0cSMatt Gates writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX); 9297e1f7de0cSMatt Gates h->reply_queue[i].current_entry = 9298e1f7de0cSMatt Gates readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX); 9299e1f7de0cSMatt Gates } 9300283b4a9bSStephen M. Cameron bft[7] = h->ioaccel_maxsg + 8; 9301283b4a9bSStephen M. Cameron calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8, 9302e1f7de0cSMatt Gates h->ioaccel1_blockFetchTable); 9303e1f7de0cSMatt Gates 9304e1f7de0cSMatt Gates /* initialize all reply queue entries to unused */ 9305072b0518SStephen M. Cameron for (i = 0; i < h->nreply_queues; i++) 9306072b0518SStephen M. Cameron memset(h->reply_queue[i].head, 9307072b0518SStephen M. Cameron (u8) IOACCEL_MODE1_REPLY_UNUSED, 9308072b0518SStephen M. Cameron h->reply_queue_size); 9309e1f7de0cSMatt Gates 9310e1f7de0cSMatt Gates /* set all the constant fields in the accelerator command 9311e1f7de0cSMatt Gates * frames once at init time to save CPU cycles later. 9312e1f7de0cSMatt Gates */ 9313e1f7de0cSMatt Gates for (i = 0; i < h->nr_cmds; i++) { 9314e1f7de0cSMatt Gates struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i]; 9315e1f7de0cSMatt Gates 9316e1f7de0cSMatt Gates cp->function = IOACCEL1_FUNCTION_SCSIIO; 9317e1f7de0cSMatt Gates cp->err_info = (u32) (h->errinfo_pool_dhandle + 9318e1f7de0cSMatt Gates (i * sizeof(struct ErrorInfo))); 9319e1f7de0cSMatt Gates cp->err_info_len = sizeof(struct ErrorInfo); 9320e1f7de0cSMatt Gates cp->sgl_offset = IOACCEL1_SGLOFFSET; 93212b08b3e9SDon Brace cp->host_context_flags = 93222b08b3e9SDon Brace cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT); 9323e1f7de0cSMatt Gates cp->timeout_sec = 0; 9324e1f7de0cSMatt Gates cp->ReplyQueue = 0; 932550a0decfSStephen M. Cameron cp->tag = 9326f2405db8SDon Brace cpu_to_le64((i << DIRECT_LOOKUP_SHIFT)); 932750a0decfSStephen M. Cameron cp->host_addr = 932850a0decfSStephen M. Cameron cpu_to_le64(h->ioaccel_cmd_pool_dhandle + 9329e1f7de0cSMatt Gates (i * sizeof(struct io_accel1_cmd))); 9330e1f7de0cSMatt Gates } 9331b9af4937SStephen M. Cameron } else if (trans_support & CFGTBL_Trans_io_accel2) { 9332b9af4937SStephen M. Cameron u64 cfg_offset, cfg_base_addr_index; 9333b9af4937SStephen M. Cameron u32 bft2_offset, cfg_base_addr; 9334b9af4937SStephen M. Cameron int rc; 9335b9af4937SStephen M. Cameron 9336b9af4937SStephen M. Cameron rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 9337b9af4937SStephen M. Cameron &cfg_base_addr_index, &cfg_offset); 9338b9af4937SStephen M. Cameron BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64); 9339b9af4937SStephen M. Cameron bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ; 9340b9af4937SStephen M. Cameron calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg, 9341b9af4937SStephen M. Cameron 4, h->ioaccel2_blockFetchTable); 9342b9af4937SStephen M. Cameron bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset); 9343b9af4937SStephen M. Cameron BUILD_BUG_ON(offsetof(struct CfgTable, 9344b9af4937SStephen M. Cameron io_accel_request_size_offset) != 0xb8); 9345b9af4937SStephen M. Cameron h->ioaccel2_bft2_regs = 9346b9af4937SStephen M. Cameron remap_pci_mem(pci_resource_start(h->pdev, 9347b9af4937SStephen M. Cameron cfg_base_addr_index) + 9348b9af4937SStephen M. Cameron cfg_offset + bft2_offset, 9349b9af4937SStephen M. Cameron ARRAY_SIZE(bft2) * 9350b9af4937SStephen M. Cameron sizeof(*h->ioaccel2_bft2_regs)); 9351b9af4937SStephen M. Cameron for (i = 0; i < ARRAY_SIZE(bft2); i++) 9352b9af4937SStephen M. Cameron writel(bft2[i], &h->ioaccel2_bft2_regs[i]); 9353b9af4937SStephen M. Cameron } 9354b9af4937SStephen M. Cameron writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 9355c706a795SRobert Elliott if (hpsa_wait_for_mode_change_ack(h)) { 9356c706a795SRobert Elliott dev_err(&h->pdev->dev, 9357c706a795SRobert Elliott "performant mode problem - enabling ioaccel mode\n"); 9358c706a795SRobert Elliott return -ENODEV; 9359c706a795SRobert Elliott } 9360c706a795SRobert Elliott return 0; 9361e1f7de0cSMatt Gates } 9362e1f7de0cSMatt Gates 93631fb7c98aSRobert Elliott /* Free ioaccel1 mode command blocks and block fetch table */ 93641fb7c98aSRobert Elliott static void hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info *h) 93651fb7c98aSRobert Elliott { 9366105a3dbcSRobert Elliott if (h->ioaccel_cmd_pool) { 93671fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 93681fb7c98aSRobert Elliott h->nr_cmds * sizeof(*h->ioaccel_cmd_pool), 93691fb7c98aSRobert Elliott h->ioaccel_cmd_pool, 93701fb7c98aSRobert Elliott h->ioaccel_cmd_pool_dhandle); 9371105a3dbcSRobert Elliott h->ioaccel_cmd_pool = NULL; 9372105a3dbcSRobert Elliott h->ioaccel_cmd_pool_dhandle = 0; 9373105a3dbcSRobert Elliott } 93741fb7c98aSRobert Elliott kfree(h->ioaccel1_blockFetchTable); 9375105a3dbcSRobert Elliott h->ioaccel1_blockFetchTable = NULL; 93761fb7c98aSRobert Elliott } 93771fb7c98aSRobert Elliott 9378d37ffbe4SRobert Elliott /* Allocate ioaccel1 mode command blocks and block fetch table */ 9379d37ffbe4SRobert Elliott static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h) 9380e1f7de0cSMatt Gates { 9381283b4a9bSStephen M. Cameron h->ioaccel_maxsg = 9382283b4a9bSStephen M. Cameron readl(&(h->cfgtable->io_accel_max_embedded_sg_count)); 9383283b4a9bSStephen M. Cameron if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES) 9384283b4a9bSStephen M. Cameron h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES; 9385283b4a9bSStephen M. Cameron 9386e1f7de0cSMatt Gates /* Command structures must be aligned on a 128-byte boundary 9387e1f7de0cSMatt Gates * because the 7 lower bits of the address are used by the 9388e1f7de0cSMatt Gates * hardware. 9389e1f7de0cSMatt Gates */ 9390e1f7de0cSMatt Gates BUILD_BUG_ON(sizeof(struct io_accel1_cmd) % 9391e1f7de0cSMatt Gates IOACCEL1_COMMANDLIST_ALIGNMENT); 9392e1f7de0cSMatt Gates h->ioaccel_cmd_pool = 9393e1f7de0cSMatt Gates pci_alloc_consistent(h->pdev, 9394e1f7de0cSMatt Gates h->nr_cmds * sizeof(*h->ioaccel_cmd_pool), 9395e1f7de0cSMatt Gates &(h->ioaccel_cmd_pool_dhandle)); 9396e1f7de0cSMatt Gates 9397e1f7de0cSMatt Gates h->ioaccel1_blockFetchTable = 9398283b4a9bSStephen M. Cameron kmalloc(((h->ioaccel_maxsg + 1) * 9399e1f7de0cSMatt Gates sizeof(u32)), GFP_KERNEL); 9400e1f7de0cSMatt Gates 9401e1f7de0cSMatt Gates if ((h->ioaccel_cmd_pool == NULL) || 9402e1f7de0cSMatt Gates (h->ioaccel1_blockFetchTable == NULL)) 9403e1f7de0cSMatt Gates goto clean_up; 9404e1f7de0cSMatt Gates 9405e1f7de0cSMatt Gates memset(h->ioaccel_cmd_pool, 0, 9406e1f7de0cSMatt Gates h->nr_cmds * sizeof(*h->ioaccel_cmd_pool)); 9407e1f7de0cSMatt Gates return 0; 9408e1f7de0cSMatt Gates 9409e1f7de0cSMatt Gates clean_up: 94101fb7c98aSRobert Elliott hpsa_free_ioaccel1_cmd_and_bft(h); 94112dd02d74SRobert Elliott return -ENOMEM; 94126c311b57SStephen M. Cameron } 94136c311b57SStephen M. Cameron 94141fb7c98aSRobert Elliott /* Free ioaccel2 mode command blocks and block fetch table */ 94151fb7c98aSRobert Elliott static void hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info *h) 94161fb7c98aSRobert Elliott { 9417d9a729f3SWebb Scales hpsa_free_ioaccel2_sg_chain_blocks(h); 9418d9a729f3SWebb Scales 9419105a3dbcSRobert Elliott if (h->ioaccel2_cmd_pool) { 94201fb7c98aSRobert Elliott pci_free_consistent(h->pdev, 94211fb7c98aSRobert Elliott h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 94221fb7c98aSRobert Elliott h->ioaccel2_cmd_pool, 94231fb7c98aSRobert Elliott h->ioaccel2_cmd_pool_dhandle); 9424105a3dbcSRobert Elliott h->ioaccel2_cmd_pool = NULL; 9425105a3dbcSRobert Elliott h->ioaccel2_cmd_pool_dhandle = 0; 9426105a3dbcSRobert Elliott } 94271fb7c98aSRobert Elliott kfree(h->ioaccel2_blockFetchTable); 9428105a3dbcSRobert Elliott h->ioaccel2_blockFetchTable = NULL; 94291fb7c98aSRobert Elliott } 94301fb7c98aSRobert Elliott 9431d37ffbe4SRobert Elliott /* Allocate ioaccel2 mode command blocks and block fetch table */ 9432d37ffbe4SRobert Elliott static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h) 9433aca9012aSStephen M. Cameron { 9434d9a729f3SWebb Scales int rc; 9435d9a729f3SWebb Scales 9436aca9012aSStephen M. Cameron /* Allocate ioaccel2 mode command blocks and block fetch table */ 9437aca9012aSStephen M. Cameron 9438aca9012aSStephen M. Cameron h->ioaccel_maxsg = 9439aca9012aSStephen M. Cameron readl(&(h->cfgtable->io_accel_max_embedded_sg_count)); 9440aca9012aSStephen M. Cameron if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES) 9441aca9012aSStephen M. Cameron h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES; 9442aca9012aSStephen M. Cameron 9443aca9012aSStephen M. Cameron BUILD_BUG_ON(sizeof(struct io_accel2_cmd) % 9444aca9012aSStephen M. Cameron IOACCEL2_COMMANDLIST_ALIGNMENT); 9445aca9012aSStephen M. Cameron h->ioaccel2_cmd_pool = 9446aca9012aSStephen M. Cameron pci_alloc_consistent(h->pdev, 9447aca9012aSStephen M. Cameron h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 9448aca9012aSStephen M. Cameron &(h->ioaccel2_cmd_pool_dhandle)); 9449aca9012aSStephen M. Cameron 9450aca9012aSStephen M. Cameron h->ioaccel2_blockFetchTable = 9451aca9012aSStephen M. Cameron kmalloc(((h->ioaccel_maxsg + 1) * 9452aca9012aSStephen M. Cameron sizeof(u32)), GFP_KERNEL); 9453aca9012aSStephen M. Cameron 9454aca9012aSStephen M. Cameron if ((h->ioaccel2_cmd_pool == NULL) || 9455d9a729f3SWebb Scales (h->ioaccel2_blockFetchTable == NULL)) { 9456d9a729f3SWebb Scales rc = -ENOMEM; 9457d9a729f3SWebb Scales goto clean_up; 9458d9a729f3SWebb Scales } 9459d9a729f3SWebb Scales 9460d9a729f3SWebb Scales rc = hpsa_allocate_ioaccel2_sg_chain_blocks(h); 9461d9a729f3SWebb Scales if (rc) 9462aca9012aSStephen M. Cameron goto clean_up; 9463aca9012aSStephen M. Cameron 9464aca9012aSStephen M. Cameron memset(h->ioaccel2_cmd_pool, 0, 9465aca9012aSStephen M. Cameron h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool)); 9466aca9012aSStephen M. Cameron return 0; 9467aca9012aSStephen M. Cameron 9468aca9012aSStephen M. Cameron clean_up: 94691fb7c98aSRobert Elliott hpsa_free_ioaccel2_cmd_and_bft(h); 9470d9a729f3SWebb Scales return rc; 9471aca9012aSStephen M. Cameron } 9472aca9012aSStephen M. Cameron 9473105a3dbcSRobert Elliott /* Free items allocated by hpsa_put_ctlr_into_performant_mode */ 9474105a3dbcSRobert Elliott static void hpsa_free_performant_mode(struct ctlr_info *h) 9475105a3dbcSRobert Elliott { 9476105a3dbcSRobert Elliott kfree(h->blockFetchTable); 9477105a3dbcSRobert Elliott h->blockFetchTable = NULL; 9478105a3dbcSRobert Elliott hpsa_free_reply_queues(h); 9479105a3dbcSRobert Elliott hpsa_free_ioaccel1_cmd_and_bft(h); 9480105a3dbcSRobert Elliott hpsa_free_ioaccel2_cmd_and_bft(h); 9481105a3dbcSRobert Elliott } 9482105a3dbcSRobert Elliott 9483105a3dbcSRobert Elliott /* return -ENODEV on error, 0 on success (or no action) 9484105a3dbcSRobert Elliott * allocates numerous items that must be freed later 9485105a3dbcSRobert Elliott */ 9486105a3dbcSRobert Elliott static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h) 94876c311b57SStephen M. Cameron { 94886c311b57SStephen M. Cameron u32 trans_support; 9489e1f7de0cSMatt Gates unsigned long transMethod = CFGTBL_Trans_Performant | 9490e1f7de0cSMatt Gates CFGTBL_Trans_use_short_tags; 9491105a3dbcSRobert Elliott int i, rc; 94926c311b57SStephen M. Cameron 949302ec19c8SStephen M. Cameron if (hpsa_simple_mode) 9494105a3dbcSRobert Elliott return 0; 949502ec19c8SStephen M. Cameron 949667c99a72Sscameron@beardog.cce.hp.com trans_support = readl(&(h->cfgtable->TransportSupport)); 949767c99a72Sscameron@beardog.cce.hp.com if (!(trans_support & PERFORMANT_MODE)) 9498105a3dbcSRobert Elliott return 0; 949967c99a72Sscameron@beardog.cce.hp.com 9500e1f7de0cSMatt Gates /* Check for I/O accelerator mode support */ 9501e1f7de0cSMatt Gates if (trans_support & CFGTBL_Trans_io_accel1) { 9502e1f7de0cSMatt Gates transMethod |= CFGTBL_Trans_io_accel1 | 9503e1f7de0cSMatt Gates CFGTBL_Trans_enable_directed_msix; 9504105a3dbcSRobert Elliott rc = hpsa_alloc_ioaccel1_cmd_and_bft(h); 9505105a3dbcSRobert Elliott if (rc) 9506105a3dbcSRobert Elliott return rc; 9507105a3dbcSRobert Elliott } else if (trans_support & CFGTBL_Trans_io_accel2) { 9508aca9012aSStephen M. Cameron transMethod |= CFGTBL_Trans_io_accel2 | 9509aca9012aSStephen M. Cameron CFGTBL_Trans_enable_directed_msix; 9510105a3dbcSRobert Elliott rc = hpsa_alloc_ioaccel2_cmd_and_bft(h); 9511105a3dbcSRobert Elliott if (rc) 9512105a3dbcSRobert Elliott return rc; 9513e1f7de0cSMatt Gates } 9514e1f7de0cSMatt Gates 9515bc2bb154SChristoph Hellwig h->nreply_queues = h->msix_vectors > 0 ? h->msix_vectors : 1; 9516cba3d38bSStephen M. Cameron hpsa_get_max_perf_mode_cmds(h); 95176c311b57SStephen M. Cameron /* Performant mode ring buffer and supporting data structures */ 9518072b0518SStephen M. Cameron h->reply_queue_size = h->max_commands * sizeof(u64); 95196c311b57SStephen M. Cameron 9520254f796bSMatt Gates for (i = 0; i < h->nreply_queues; i++) { 9521072b0518SStephen M. Cameron h->reply_queue[i].head = pci_alloc_consistent(h->pdev, 9522072b0518SStephen M. Cameron h->reply_queue_size, 9523072b0518SStephen M. Cameron &(h->reply_queue[i].busaddr)); 9524105a3dbcSRobert Elliott if (!h->reply_queue[i].head) { 9525105a3dbcSRobert Elliott rc = -ENOMEM; 9526105a3dbcSRobert Elliott goto clean1; /* rq, ioaccel */ 9527105a3dbcSRobert Elliott } 9528254f796bSMatt Gates h->reply_queue[i].size = h->max_commands; 9529254f796bSMatt Gates h->reply_queue[i].wraparound = 1; /* spec: init to 1 */ 9530254f796bSMatt Gates h->reply_queue[i].current_entry = 0; 9531254f796bSMatt Gates } 9532254f796bSMatt Gates 95336c311b57SStephen M. Cameron /* Need a block fetch table for performant mode */ 9534d66ae08bSStephen M. Cameron h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) * 95356c311b57SStephen M. Cameron sizeof(u32)), GFP_KERNEL); 9536105a3dbcSRobert Elliott if (!h->blockFetchTable) { 9537105a3dbcSRobert Elliott rc = -ENOMEM; 9538105a3dbcSRobert Elliott goto clean1; /* rq, ioaccel */ 9539105a3dbcSRobert Elliott } 95406c311b57SStephen M. Cameron 9541105a3dbcSRobert Elliott rc = hpsa_enter_performant_mode(h, trans_support); 9542105a3dbcSRobert Elliott if (rc) 9543105a3dbcSRobert Elliott goto clean2; /* bft, rq, ioaccel */ 9544105a3dbcSRobert Elliott return 0; 9545303932fdSDon Brace 9546105a3dbcSRobert Elliott clean2: /* bft, rq, ioaccel */ 9547303932fdSDon Brace kfree(h->blockFetchTable); 9548105a3dbcSRobert Elliott h->blockFetchTable = NULL; 9549105a3dbcSRobert Elliott clean1: /* rq, ioaccel */ 9550105a3dbcSRobert Elliott hpsa_free_reply_queues(h); 9551105a3dbcSRobert Elliott hpsa_free_ioaccel1_cmd_and_bft(h); 9552105a3dbcSRobert Elliott hpsa_free_ioaccel2_cmd_and_bft(h); 9553105a3dbcSRobert Elliott return rc; 9554303932fdSDon Brace } 9555303932fdSDon Brace 955623100dd9SStephen M. Cameron static int is_accelerated_cmd(struct CommandList *c) 955776438d08SStephen M. Cameron { 955823100dd9SStephen M. Cameron return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2; 955923100dd9SStephen M. Cameron } 956023100dd9SStephen M. Cameron 956123100dd9SStephen M. Cameron static void hpsa_drain_accel_commands(struct ctlr_info *h) 956223100dd9SStephen M. Cameron { 956323100dd9SStephen M. Cameron struct CommandList *c = NULL; 9564f2405db8SDon Brace int i, accel_cmds_out; 9565281a7fd0SWebb Scales int refcount; 956676438d08SStephen M. Cameron 9567f2405db8SDon Brace do { /* wait for all outstanding ioaccel commands to drain out */ 956823100dd9SStephen M. Cameron accel_cmds_out = 0; 9569f2405db8SDon Brace for (i = 0; i < h->nr_cmds; i++) { 9570f2405db8SDon Brace c = h->cmd_pool + i; 9571281a7fd0SWebb Scales refcount = atomic_inc_return(&c->refcount); 9572281a7fd0SWebb Scales if (refcount > 1) /* Command is allocated */ 957323100dd9SStephen M. Cameron accel_cmds_out += is_accelerated_cmd(c); 9574281a7fd0SWebb Scales cmd_free(h, c); 9575f2405db8SDon Brace } 957623100dd9SStephen M. Cameron if (accel_cmds_out <= 0) 957776438d08SStephen M. Cameron break; 957876438d08SStephen M. Cameron msleep(100); 957976438d08SStephen M. Cameron } while (1); 958076438d08SStephen M. Cameron } 958176438d08SStephen M. Cameron 9582d04e62b9SKevin Barnett static struct hpsa_sas_phy *hpsa_alloc_sas_phy( 9583d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port) 9584d04e62b9SKevin Barnett { 9585d04e62b9SKevin Barnett struct hpsa_sas_phy *hpsa_sas_phy; 9586d04e62b9SKevin Barnett struct sas_phy *phy; 9587d04e62b9SKevin Barnett 9588d04e62b9SKevin Barnett hpsa_sas_phy = kzalloc(sizeof(*hpsa_sas_phy), GFP_KERNEL); 9589d04e62b9SKevin Barnett if (!hpsa_sas_phy) 9590d04e62b9SKevin Barnett return NULL; 9591d04e62b9SKevin Barnett 9592d04e62b9SKevin Barnett phy = sas_phy_alloc(hpsa_sas_port->parent_node->parent_dev, 9593d04e62b9SKevin Barnett hpsa_sas_port->next_phy_index); 9594d04e62b9SKevin Barnett if (!phy) { 9595d04e62b9SKevin Barnett kfree(hpsa_sas_phy); 9596d04e62b9SKevin Barnett return NULL; 9597d04e62b9SKevin Barnett } 9598d04e62b9SKevin Barnett 9599d04e62b9SKevin Barnett hpsa_sas_port->next_phy_index++; 9600d04e62b9SKevin Barnett hpsa_sas_phy->phy = phy; 9601d04e62b9SKevin Barnett hpsa_sas_phy->parent_port = hpsa_sas_port; 9602d04e62b9SKevin Barnett 9603d04e62b9SKevin Barnett return hpsa_sas_phy; 9604d04e62b9SKevin Barnett } 9605d04e62b9SKevin Barnett 9606d04e62b9SKevin Barnett static void hpsa_free_sas_phy(struct hpsa_sas_phy *hpsa_sas_phy) 9607d04e62b9SKevin Barnett { 9608d04e62b9SKevin Barnett struct sas_phy *phy = hpsa_sas_phy->phy; 9609d04e62b9SKevin Barnett 9610d04e62b9SKevin Barnett sas_port_delete_phy(hpsa_sas_phy->parent_port->port, phy); 9611d04e62b9SKevin Barnett sas_phy_free(phy); 9612d04e62b9SKevin Barnett if (hpsa_sas_phy->added_to_port) 9613d04e62b9SKevin Barnett list_del(&hpsa_sas_phy->phy_list_entry); 9614d04e62b9SKevin Barnett kfree(hpsa_sas_phy); 9615d04e62b9SKevin Barnett } 9616d04e62b9SKevin Barnett 9617d04e62b9SKevin Barnett static int hpsa_sas_port_add_phy(struct hpsa_sas_phy *hpsa_sas_phy) 9618d04e62b9SKevin Barnett { 9619d04e62b9SKevin Barnett int rc; 9620d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9621d04e62b9SKevin Barnett struct sas_phy *phy; 9622d04e62b9SKevin Barnett struct sas_identify *identify; 9623d04e62b9SKevin Barnett 9624d04e62b9SKevin Barnett hpsa_sas_port = hpsa_sas_phy->parent_port; 9625d04e62b9SKevin Barnett phy = hpsa_sas_phy->phy; 9626d04e62b9SKevin Barnett 9627d04e62b9SKevin Barnett identify = &phy->identify; 9628d04e62b9SKevin Barnett memset(identify, 0, sizeof(*identify)); 9629d04e62b9SKevin Barnett identify->sas_address = hpsa_sas_port->sas_address; 9630d04e62b9SKevin Barnett identify->device_type = SAS_END_DEVICE; 9631d04e62b9SKevin Barnett identify->initiator_port_protocols = SAS_PROTOCOL_STP; 9632d04e62b9SKevin Barnett identify->target_port_protocols = SAS_PROTOCOL_STP; 9633d04e62b9SKevin Barnett phy->minimum_linkrate_hw = SAS_LINK_RATE_UNKNOWN; 9634d04e62b9SKevin Barnett phy->maximum_linkrate_hw = SAS_LINK_RATE_UNKNOWN; 9635d04e62b9SKevin Barnett phy->minimum_linkrate = SAS_LINK_RATE_UNKNOWN; 9636d04e62b9SKevin Barnett phy->maximum_linkrate = SAS_LINK_RATE_UNKNOWN; 9637d04e62b9SKevin Barnett phy->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN; 9638d04e62b9SKevin Barnett 9639d04e62b9SKevin Barnett rc = sas_phy_add(hpsa_sas_phy->phy); 9640d04e62b9SKevin Barnett if (rc) 9641d04e62b9SKevin Barnett return rc; 9642d04e62b9SKevin Barnett 9643d04e62b9SKevin Barnett sas_port_add_phy(hpsa_sas_port->port, hpsa_sas_phy->phy); 9644d04e62b9SKevin Barnett list_add_tail(&hpsa_sas_phy->phy_list_entry, 9645d04e62b9SKevin Barnett &hpsa_sas_port->phy_list_head); 9646d04e62b9SKevin Barnett hpsa_sas_phy->added_to_port = true; 9647d04e62b9SKevin Barnett 9648d04e62b9SKevin Barnett return 0; 9649d04e62b9SKevin Barnett } 9650d04e62b9SKevin Barnett 9651d04e62b9SKevin Barnett static int 9652d04e62b9SKevin Barnett hpsa_sas_port_add_rphy(struct hpsa_sas_port *hpsa_sas_port, 9653d04e62b9SKevin Barnett struct sas_rphy *rphy) 9654d04e62b9SKevin Barnett { 9655d04e62b9SKevin Barnett struct sas_identify *identify; 9656d04e62b9SKevin Barnett 9657d04e62b9SKevin Barnett identify = &rphy->identify; 9658d04e62b9SKevin Barnett identify->sas_address = hpsa_sas_port->sas_address; 9659d04e62b9SKevin Barnett identify->initiator_port_protocols = SAS_PROTOCOL_STP; 9660d04e62b9SKevin Barnett identify->target_port_protocols = SAS_PROTOCOL_STP; 9661d04e62b9SKevin Barnett 9662d04e62b9SKevin Barnett return sas_rphy_add(rphy); 9663d04e62b9SKevin Barnett } 9664d04e62b9SKevin Barnett 9665d04e62b9SKevin Barnett static struct hpsa_sas_port 9666d04e62b9SKevin Barnett *hpsa_alloc_sas_port(struct hpsa_sas_node *hpsa_sas_node, 9667d04e62b9SKevin Barnett u64 sas_address) 9668d04e62b9SKevin Barnett { 9669d04e62b9SKevin Barnett int rc; 9670d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9671d04e62b9SKevin Barnett struct sas_port *port; 9672d04e62b9SKevin Barnett 9673d04e62b9SKevin Barnett hpsa_sas_port = kzalloc(sizeof(*hpsa_sas_port), GFP_KERNEL); 9674d04e62b9SKevin Barnett if (!hpsa_sas_port) 9675d04e62b9SKevin Barnett return NULL; 9676d04e62b9SKevin Barnett 9677d04e62b9SKevin Barnett INIT_LIST_HEAD(&hpsa_sas_port->phy_list_head); 9678d04e62b9SKevin Barnett hpsa_sas_port->parent_node = hpsa_sas_node; 9679d04e62b9SKevin Barnett 9680d04e62b9SKevin Barnett port = sas_port_alloc_num(hpsa_sas_node->parent_dev); 9681d04e62b9SKevin Barnett if (!port) 9682d04e62b9SKevin Barnett goto free_hpsa_port; 9683d04e62b9SKevin Barnett 9684d04e62b9SKevin Barnett rc = sas_port_add(port); 9685d04e62b9SKevin Barnett if (rc) 9686d04e62b9SKevin Barnett goto free_sas_port; 9687d04e62b9SKevin Barnett 9688d04e62b9SKevin Barnett hpsa_sas_port->port = port; 9689d04e62b9SKevin Barnett hpsa_sas_port->sas_address = sas_address; 9690d04e62b9SKevin Barnett list_add_tail(&hpsa_sas_port->port_list_entry, 9691d04e62b9SKevin Barnett &hpsa_sas_node->port_list_head); 9692d04e62b9SKevin Barnett 9693d04e62b9SKevin Barnett return hpsa_sas_port; 9694d04e62b9SKevin Barnett 9695d04e62b9SKevin Barnett free_sas_port: 9696d04e62b9SKevin Barnett sas_port_free(port); 9697d04e62b9SKevin Barnett free_hpsa_port: 9698d04e62b9SKevin Barnett kfree(hpsa_sas_port); 9699d04e62b9SKevin Barnett 9700d04e62b9SKevin Barnett return NULL; 9701d04e62b9SKevin Barnett } 9702d04e62b9SKevin Barnett 9703d04e62b9SKevin Barnett static void hpsa_free_sas_port(struct hpsa_sas_port *hpsa_sas_port) 9704d04e62b9SKevin Barnett { 9705d04e62b9SKevin Barnett struct hpsa_sas_phy *hpsa_sas_phy; 9706d04e62b9SKevin Barnett struct hpsa_sas_phy *next; 9707d04e62b9SKevin Barnett 9708d04e62b9SKevin Barnett list_for_each_entry_safe(hpsa_sas_phy, next, 9709d04e62b9SKevin Barnett &hpsa_sas_port->phy_list_head, phy_list_entry) 9710d04e62b9SKevin Barnett hpsa_free_sas_phy(hpsa_sas_phy); 9711d04e62b9SKevin Barnett 9712d04e62b9SKevin Barnett sas_port_delete(hpsa_sas_port->port); 9713d04e62b9SKevin Barnett list_del(&hpsa_sas_port->port_list_entry); 9714d04e62b9SKevin Barnett kfree(hpsa_sas_port); 9715d04e62b9SKevin Barnett } 9716d04e62b9SKevin Barnett 9717d04e62b9SKevin Barnett static struct hpsa_sas_node *hpsa_alloc_sas_node(struct device *parent_dev) 9718d04e62b9SKevin Barnett { 9719d04e62b9SKevin Barnett struct hpsa_sas_node *hpsa_sas_node; 9720d04e62b9SKevin Barnett 9721d04e62b9SKevin Barnett hpsa_sas_node = kzalloc(sizeof(*hpsa_sas_node), GFP_KERNEL); 9722d04e62b9SKevin Barnett if (hpsa_sas_node) { 9723d04e62b9SKevin Barnett hpsa_sas_node->parent_dev = parent_dev; 9724d04e62b9SKevin Barnett INIT_LIST_HEAD(&hpsa_sas_node->port_list_head); 9725d04e62b9SKevin Barnett } 9726d04e62b9SKevin Barnett 9727d04e62b9SKevin Barnett return hpsa_sas_node; 9728d04e62b9SKevin Barnett } 9729d04e62b9SKevin Barnett 9730d04e62b9SKevin Barnett static void hpsa_free_sas_node(struct hpsa_sas_node *hpsa_sas_node) 9731d04e62b9SKevin Barnett { 9732d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9733d04e62b9SKevin Barnett struct hpsa_sas_port *next; 9734d04e62b9SKevin Barnett 9735d04e62b9SKevin Barnett if (!hpsa_sas_node) 9736d04e62b9SKevin Barnett return; 9737d04e62b9SKevin Barnett 9738d04e62b9SKevin Barnett list_for_each_entry_safe(hpsa_sas_port, next, 9739d04e62b9SKevin Barnett &hpsa_sas_node->port_list_head, port_list_entry) 9740d04e62b9SKevin Barnett hpsa_free_sas_port(hpsa_sas_port); 9741d04e62b9SKevin Barnett 9742d04e62b9SKevin Barnett kfree(hpsa_sas_node); 9743d04e62b9SKevin Barnett } 9744d04e62b9SKevin Barnett 9745d04e62b9SKevin Barnett static struct hpsa_scsi_dev_t 9746d04e62b9SKevin Barnett *hpsa_find_device_by_sas_rphy(struct ctlr_info *h, 9747d04e62b9SKevin Barnett struct sas_rphy *rphy) 9748d04e62b9SKevin Barnett { 9749d04e62b9SKevin Barnett int i; 9750d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *device; 9751d04e62b9SKevin Barnett 9752d04e62b9SKevin Barnett for (i = 0; i < h->ndevices; i++) { 9753d04e62b9SKevin Barnett device = h->dev[i]; 9754d04e62b9SKevin Barnett if (!device->sas_port) 9755d04e62b9SKevin Barnett continue; 9756d04e62b9SKevin Barnett if (device->sas_port->rphy == rphy) 9757d04e62b9SKevin Barnett return device; 9758d04e62b9SKevin Barnett } 9759d04e62b9SKevin Barnett 9760d04e62b9SKevin Barnett return NULL; 9761d04e62b9SKevin Barnett } 9762d04e62b9SKevin Barnett 9763d04e62b9SKevin Barnett static int hpsa_add_sas_host(struct ctlr_info *h) 9764d04e62b9SKevin Barnett { 9765d04e62b9SKevin Barnett int rc; 9766d04e62b9SKevin Barnett struct device *parent_dev; 9767d04e62b9SKevin Barnett struct hpsa_sas_node *hpsa_sas_node; 9768d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9769d04e62b9SKevin Barnett struct hpsa_sas_phy *hpsa_sas_phy; 9770d04e62b9SKevin Barnett 9771d04e62b9SKevin Barnett parent_dev = &h->scsi_host->shost_gendev; 9772d04e62b9SKevin Barnett 9773d04e62b9SKevin Barnett hpsa_sas_node = hpsa_alloc_sas_node(parent_dev); 9774d04e62b9SKevin Barnett if (!hpsa_sas_node) 9775d04e62b9SKevin Barnett return -ENOMEM; 9776d04e62b9SKevin Barnett 9777d04e62b9SKevin Barnett hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, h->sas_address); 9778d04e62b9SKevin Barnett if (!hpsa_sas_port) { 9779d04e62b9SKevin Barnett rc = -ENODEV; 9780d04e62b9SKevin Barnett goto free_sas_node; 9781d04e62b9SKevin Barnett } 9782d04e62b9SKevin Barnett 9783d04e62b9SKevin Barnett hpsa_sas_phy = hpsa_alloc_sas_phy(hpsa_sas_port); 9784d04e62b9SKevin Barnett if (!hpsa_sas_phy) { 9785d04e62b9SKevin Barnett rc = -ENODEV; 9786d04e62b9SKevin Barnett goto free_sas_port; 9787d04e62b9SKevin Barnett } 9788d04e62b9SKevin Barnett 9789d04e62b9SKevin Barnett rc = hpsa_sas_port_add_phy(hpsa_sas_phy); 9790d04e62b9SKevin Barnett if (rc) 9791d04e62b9SKevin Barnett goto free_sas_phy; 9792d04e62b9SKevin Barnett 9793d04e62b9SKevin Barnett h->sas_host = hpsa_sas_node; 9794d04e62b9SKevin Barnett 9795d04e62b9SKevin Barnett return 0; 9796d04e62b9SKevin Barnett 9797d04e62b9SKevin Barnett free_sas_phy: 9798d04e62b9SKevin Barnett hpsa_free_sas_phy(hpsa_sas_phy); 9799d04e62b9SKevin Barnett free_sas_port: 9800d04e62b9SKevin Barnett hpsa_free_sas_port(hpsa_sas_port); 9801d04e62b9SKevin Barnett free_sas_node: 9802d04e62b9SKevin Barnett hpsa_free_sas_node(hpsa_sas_node); 9803d04e62b9SKevin Barnett 9804d04e62b9SKevin Barnett return rc; 9805d04e62b9SKevin Barnett } 9806d04e62b9SKevin Barnett 9807d04e62b9SKevin Barnett static void hpsa_delete_sas_host(struct ctlr_info *h) 9808d04e62b9SKevin Barnett { 9809d04e62b9SKevin Barnett hpsa_free_sas_node(h->sas_host); 9810d04e62b9SKevin Barnett } 9811d04e62b9SKevin Barnett 9812d04e62b9SKevin Barnett static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node, 9813d04e62b9SKevin Barnett struct hpsa_scsi_dev_t *device) 9814d04e62b9SKevin Barnett { 9815d04e62b9SKevin Barnett int rc; 9816d04e62b9SKevin Barnett struct hpsa_sas_port *hpsa_sas_port; 9817d04e62b9SKevin Barnett struct sas_rphy *rphy; 9818d04e62b9SKevin Barnett 9819d04e62b9SKevin Barnett hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, device->sas_address); 9820d04e62b9SKevin Barnett if (!hpsa_sas_port) 9821d04e62b9SKevin Barnett return -ENOMEM; 9822d04e62b9SKevin Barnett 9823d04e62b9SKevin Barnett rphy = sas_end_device_alloc(hpsa_sas_port->port); 9824d04e62b9SKevin Barnett if (!rphy) { 9825d04e62b9SKevin Barnett rc = -ENODEV; 9826d04e62b9SKevin Barnett goto free_sas_port; 9827d04e62b9SKevin Barnett } 9828d04e62b9SKevin Barnett 9829d04e62b9SKevin Barnett hpsa_sas_port->rphy = rphy; 9830d04e62b9SKevin Barnett device->sas_port = hpsa_sas_port; 9831d04e62b9SKevin Barnett 9832d04e62b9SKevin Barnett rc = hpsa_sas_port_add_rphy(hpsa_sas_port, rphy); 9833d04e62b9SKevin Barnett if (rc) 9834d04e62b9SKevin Barnett goto free_sas_port; 9835d04e62b9SKevin Barnett 9836d04e62b9SKevin Barnett return 0; 9837d04e62b9SKevin Barnett 9838d04e62b9SKevin Barnett free_sas_port: 9839d04e62b9SKevin Barnett hpsa_free_sas_port(hpsa_sas_port); 9840d04e62b9SKevin Barnett device->sas_port = NULL; 9841d04e62b9SKevin Barnett 9842d04e62b9SKevin Barnett return rc; 9843d04e62b9SKevin Barnett } 9844d04e62b9SKevin Barnett 9845d04e62b9SKevin Barnett static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device) 9846d04e62b9SKevin Barnett { 9847d04e62b9SKevin Barnett if (device->sas_port) { 9848d04e62b9SKevin Barnett hpsa_free_sas_port(device->sas_port); 9849d04e62b9SKevin Barnett device->sas_port = NULL; 9850d04e62b9SKevin Barnett } 9851d04e62b9SKevin Barnett } 9852d04e62b9SKevin Barnett 9853d04e62b9SKevin Barnett static int 9854d04e62b9SKevin Barnett hpsa_sas_get_linkerrors(struct sas_phy *phy) 9855d04e62b9SKevin Barnett { 9856d04e62b9SKevin Barnett return 0; 9857d04e62b9SKevin Barnett } 9858d04e62b9SKevin Barnett 9859d04e62b9SKevin Barnett static int 9860d04e62b9SKevin Barnett hpsa_sas_get_enclosure_identifier(struct sas_rphy *rphy, u64 *identifier) 9861d04e62b9SKevin Barnett { 9862aa105695SDan Carpenter *identifier = 0; 9863d04e62b9SKevin Barnett return 0; 9864d04e62b9SKevin Barnett } 9865d04e62b9SKevin Barnett 9866d04e62b9SKevin Barnett static int 9867d04e62b9SKevin Barnett hpsa_sas_get_bay_identifier(struct sas_rphy *rphy) 9868d04e62b9SKevin Barnett { 9869d04e62b9SKevin Barnett return -ENXIO; 9870d04e62b9SKevin Barnett } 9871d04e62b9SKevin Barnett 9872d04e62b9SKevin Barnett static int 9873d04e62b9SKevin Barnett hpsa_sas_phy_reset(struct sas_phy *phy, int hard_reset) 9874d04e62b9SKevin Barnett { 9875d04e62b9SKevin Barnett return 0; 9876d04e62b9SKevin Barnett } 9877d04e62b9SKevin Barnett 9878d04e62b9SKevin Barnett static int 9879d04e62b9SKevin Barnett hpsa_sas_phy_enable(struct sas_phy *phy, int enable) 9880d04e62b9SKevin Barnett { 9881d04e62b9SKevin Barnett return 0; 9882d04e62b9SKevin Barnett } 9883d04e62b9SKevin Barnett 9884d04e62b9SKevin Barnett static int 9885d04e62b9SKevin Barnett hpsa_sas_phy_setup(struct sas_phy *phy) 9886d04e62b9SKevin Barnett { 9887d04e62b9SKevin Barnett return 0; 9888d04e62b9SKevin Barnett } 9889d04e62b9SKevin Barnett 9890d04e62b9SKevin Barnett static void 9891d04e62b9SKevin Barnett hpsa_sas_phy_release(struct sas_phy *phy) 9892d04e62b9SKevin Barnett { 9893d04e62b9SKevin Barnett } 9894d04e62b9SKevin Barnett 9895d04e62b9SKevin Barnett static int 9896d04e62b9SKevin Barnett hpsa_sas_phy_speed(struct sas_phy *phy, struct sas_phy_linkrates *rates) 9897d04e62b9SKevin Barnett { 9898d04e62b9SKevin Barnett return -EINVAL; 9899d04e62b9SKevin Barnett } 9900d04e62b9SKevin Barnett 9901d04e62b9SKevin Barnett /* SMP = Serial Management Protocol */ 9902d04e62b9SKevin Barnett static int 9903d04e62b9SKevin Barnett hpsa_sas_smp_handler(struct Scsi_Host *shost, struct sas_rphy *rphy, 9904d04e62b9SKevin Barnett struct request *req) 9905d04e62b9SKevin Barnett { 9906d04e62b9SKevin Barnett return -EINVAL; 9907d04e62b9SKevin Barnett } 9908d04e62b9SKevin Barnett 9909d04e62b9SKevin Barnett static struct sas_function_template hpsa_sas_transport_functions = { 9910d04e62b9SKevin Barnett .get_linkerrors = hpsa_sas_get_linkerrors, 9911d04e62b9SKevin Barnett .get_enclosure_identifier = hpsa_sas_get_enclosure_identifier, 9912d04e62b9SKevin Barnett .get_bay_identifier = hpsa_sas_get_bay_identifier, 9913d04e62b9SKevin Barnett .phy_reset = hpsa_sas_phy_reset, 9914d04e62b9SKevin Barnett .phy_enable = hpsa_sas_phy_enable, 9915d04e62b9SKevin Barnett .phy_setup = hpsa_sas_phy_setup, 9916d04e62b9SKevin Barnett .phy_release = hpsa_sas_phy_release, 9917d04e62b9SKevin Barnett .set_phy_speed = hpsa_sas_phy_speed, 9918d04e62b9SKevin Barnett .smp_handler = hpsa_sas_smp_handler, 9919d04e62b9SKevin Barnett }; 9920d04e62b9SKevin Barnett 9921edd16368SStephen M. Cameron /* 9922edd16368SStephen M. Cameron * This is it. Register the PCI driver information for the cards we control 9923edd16368SStephen M. Cameron * the OS will call our registered routines when it finds one of our cards. 9924edd16368SStephen M. Cameron */ 9925edd16368SStephen M. Cameron static int __init hpsa_init(void) 9926edd16368SStephen M. Cameron { 9927d04e62b9SKevin Barnett int rc; 9928d04e62b9SKevin Barnett 9929d04e62b9SKevin Barnett hpsa_sas_transport_template = 9930d04e62b9SKevin Barnett sas_attach_transport(&hpsa_sas_transport_functions); 9931d04e62b9SKevin Barnett if (!hpsa_sas_transport_template) 9932d04e62b9SKevin Barnett return -ENODEV; 9933d04e62b9SKevin Barnett 9934d04e62b9SKevin Barnett rc = pci_register_driver(&hpsa_pci_driver); 9935d04e62b9SKevin Barnett 9936d04e62b9SKevin Barnett if (rc) 9937d04e62b9SKevin Barnett sas_release_transport(hpsa_sas_transport_template); 9938d04e62b9SKevin Barnett 9939d04e62b9SKevin Barnett return rc; 9940edd16368SStephen M. Cameron } 9941edd16368SStephen M. Cameron 9942edd16368SStephen M. Cameron static void __exit hpsa_cleanup(void) 9943edd16368SStephen M. Cameron { 9944edd16368SStephen M. Cameron pci_unregister_driver(&hpsa_pci_driver); 9945d04e62b9SKevin Barnett sas_release_transport(hpsa_sas_transport_template); 9946edd16368SStephen M. Cameron } 9947edd16368SStephen M. Cameron 9948e1f7de0cSMatt Gates static void __attribute__((unused)) verify_offsets(void) 9949e1f7de0cSMatt Gates { 9950e1f7de0cSMatt Gates #define VERIFY_OFFSET(member, offset) \ 9951dd0e19f3SScott Teel BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset) 9952dd0e19f3SScott Teel 9953dd0e19f3SScott Teel VERIFY_OFFSET(structure_size, 0); 9954dd0e19f3SScott Teel VERIFY_OFFSET(volume_blk_size, 4); 9955dd0e19f3SScott Teel VERIFY_OFFSET(volume_blk_cnt, 8); 9956dd0e19f3SScott Teel VERIFY_OFFSET(phys_blk_shift, 16); 9957dd0e19f3SScott Teel VERIFY_OFFSET(parity_rotation_shift, 17); 9958dd0e19f3SScott Teel VERIFY_OFFSET(strip_size, 18); 9959dd0e19f3SScott Teel VERIFY_OFFSET(disk_starting_blk, 20); 9960dd0e19f3SScott Teel VERIFY_OFFSET(disk_blk_cnt, 28); 9961dd0e19f3SScott Teel VERIFY_OFFSET(data_disks_per_row, 36); 9962dd0e19f3SScott Teel VERIFY_OFFSET(metadata_disks_per_row, 38); 9963dd0e19f3SScott Teel VERIFY_OFFSET(row_cnt, 40); 9964dd0e19f3SScott Teel VERIFY_OFFSET(layout_map_count, 42); 9965dd0e19f3SScott Teel VERIFY_OFFSET(flags, 44); 9966dd0e19f3SScott Teel VERIFY_OFFSET(dekindex, 46); 9967dd0e19f3SScott Teel /* VERIFY_OFFSET(reserved, 48 */ 9968dd0e19f3SScott Teel VERIFY_OFFSET(data, 64); 9969dd0e19f3SScott Teel 9970dd0e19f3SScott Teel #undef VERIFY_OFFSET 9971dd0e19f3SScott Teel 9972dd0e19f3SScott Teel #define VERIFY_OFFSET(member, offset) \ 9973b66cc250SMike Miller BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset) 9974b66cc250SMike Miller 9975b66cc250SMike Miller VERIFY_OFFSET(IU_type, 0); 9976b66cc250SMike Miller VERIFY_OFFSET(direction, 1); 9977b66cc250SMike Miller VERIFY_OFFSET(reply_queue, 2); 9978b66cc250SMike Miller /* VERIFY_OFFSET(reserved1, 3); */ 9979b66cc250SMike Miller VERIFY_OFFSET(scsi_nexus, 4); 9980b66cc250SMike Miller VERIFY_OFFSET(Tag, 8); 9981b66cc250SMike Miller VERIFY_OFFSET(cdb, 16); 9982b66cc250SMike Miller VERIFY_OFFSET(cciss_lun, 32); 9983b66cc250SMike Miller VERIFY_OFFSET(data_len, 40); 9984b66cc250SMike Miller VERIFY_OFFSET(cmd_priority_task_attr, 44); 9985b66cc250SMike Miller VERIFY_OFFSET(sg_count, 45); 9986b66cc250SMike Miller /* VERIFY_OFFSET(reserved3 */ 9987b66cc250SMike Miller VERIFY_OFFSET(err_ptr, 48); 9988b66cc250SMike Miller VERIFY_OFFSET(err_len, 56); 9989b66cc250SMike Miller /* VERIFY_OFFSET(reserved4 */ 9990b66cc250SMike Miller VERIFY_OFFSET(sg, 64); 9991b66cc250SMike Miller 9992b66cc250SMike Miller #undef VERIFY_OFFSET 9993b66cc250SMike Miller 9994b66cc250SMike Miller #define VERIFY_OFFSET(member, offset) \ 9995e1f7de0cSMatt Gates BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset) 9996e1f7de0cSMatt Gates 9997e1f7de0cSMatt Gates VERIFY_OFFSET(dev_handle, 0x00); 9998e1f7de0cSMatt Gates VERIFY_OFFSET(reserved1, 0x02); 9999e1f7de0cSMatt Gates VERIFY_OFFSET(function, 0x03); 10000e1f7de0cSMatt Gates VERIFY_OFFSET(reserved2, 0x04); 10001e1f7de0cSMatt Gates VERIFY_OFFSET(err_info, 0x0C); 10002e1f7de0cSMatt Gates VERIFY_OFFSET(reserved3, 0x10); 10003e1f7de0cSMatt Gates VERIFY_OFFSET(err_info_len, 0x12); 10004e1f7de0cSMatt Gates VERIFY_OFFSET(reserved4, 0x13); 10005e1f7de0cSMatt Gates VERIFY_OFFSET(sgl_offset, 0x14); 10006e1f7de0cSMatt Gates VERIFY_OFFSET(reserved5, 0x15); 10007e1f7de0cSMatt Gates VERIFY_OFFSET(transfer_len, 0x1C); 10008e1f7de0cSMatt Gates VERIFY_OFFSET(reserved6, 0x20); 10009e1f7de0cSMatt Gates VERIFY_OFFSET(io_flags, 0x24); 10010e1f7de0cSMatt Gates VERIFY_OFFSET(reserved7, 0x26); 10011e1f7de0cSMatt Gates VERIFY_OFFSET(LUN, 0x34); 10012e1f7de0cSMatt Gates VERIFY_OFFSET(control, 0x3C); 10013e1f7de0cSMatt Gates VERIFY_OFFSET(CDB, 0x40); 10014e1f7de0cSMatt Gates VERIFY_OFFSET(reserved8, 0x50); 10015e1f7de0cSMatt Gates VERIFY_OFFSET(host_context_flags, 0x60); 10016e1f7de0cSMatt Gates VERIFY_OFFSET(timeout_sec, 0x62); 10017e1f7de0cSMatt Gates VERIFY_OFFSET(ReplyQueue, 0x64); 10018e1f7de0cSMatt Gates VERIFY_OFFSET(reserved9, 0x65); 1001950a0decfSStephen M. Cameron VERIFY_OFFSET(tag, 0x68); 10020e1f7de0cSMatt Gates VERIFY_OFFSET(host_addr, 0x70); 10021e1f7de0cSMatt Gates VERIFY_OFFSET(CISS_LUN, 0x78); 10022e1f7de0cSMatt Gates VERIFY_OFFSET(SG, 0x78 + 8); 10023e1f7de0cSMatt Gates #undef VERIFY_OFFSET 10024e1f7de0cSMatt Gates } 10025e1f7de0cSMatt Gates 10026edd16368SStephen M. Cameron module_init(hpsa_init); 10027edd16368SStephen M. Cameron module_exit(hpsa_cleanup); 10028