xref: /openbmc/linux/drivers/scsi/hpsa.c (revision 7630b3a599e2c6d1c042945d32ff2debc855ad29)
1edd16368SStephen M. Cameron /*
2edd16368SStephen M. Cameron  *    Disk Array driver for HP Smart Array SAS controllers
394c7bc31SDon Brace  *    Copyright 2016 Microsemi Corporation
41358f6dcSDon Brace  *    Copyright 2014-2015 PMC-Sierra, Inc.
51358f6dcSDon Brace  *    Copyright 2000,2009-2015 Hewlett-Packard Development Company, L.P.
6edd16368SStephen M. Cameron  *
7edd16368SStephen M. Cameron  *    This program is free software; you can redistribute it and/or modify
8edd16368SStephen M. Cameron  *    it under the terms of the GNU General Public License as published by
9edd16368SStephen M. Cameron  *    the Free Software Foundation; version 2 of the License.
10edd16368SStephen M. Cameron  *
11edd16368SStephen M. Cameron  *    This program is distributed in the hope that it will be useful,
12edd16368SStephen M. Cameron  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
13edd16368SStephen M. Cameron  *    MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
14edd16368SStephen M. Cameron  *    NON INFRINGEMENT.  See the GNU General Public License for more details.
15edd16368SStephen M. Cameron  *
1694c7bc31SDon Brace  *    Questions/Comments/Bugfixes to esc.storagedev@microsemi.com
17edd16368SStephen M. Cameron  *
18edd16368SStephen M. Cameron  */
19edd16368SStephen M. Cameron 
20edd16368SStephen M. Cameron #include <linux/module.h>
21edd16368SStephen M. Cameron #include <linux/interrupt.h>
22edd16368SStephen M. Cameron #include <linux/types.h>
23edd16368SStephen M. Cameron #include <linux/pci.h>
24e5a44df8SMatthew Garrett #include <linux/pci-aspm.h>
25edd16368SStephen M. Cameron #include <linux/kernel.h>
26edd16368SStephen M. Cameron #include <linux/slab.h>
27edd16368SStephen M. Cameron #include <linux/delay.h>
28edd16368SStephen M. Cameron #include <linux/fs.h>
29edd16368SStephen M. Cameron #include <linux/timer.h>
30edd16368SStephen M. Cameron #include <linux/init.h>
31edd16368SStephen M. Cameron #include <linux/spinlock.h>
32edd16368SStephen M. Cameron #include <linux/compat.h>
33edd16368SStephen M. Cameron #include <linux/blktrace_api.h>
34edd16368SStephen M. Cameron #include <linux/uaccess.h>
35edd16368SStephen M. Cameron #include <linux/io.h>
36edd16368SStephen M. Cameron #include <linux/dma-mapping.h>
37edd16368SStephen M. Cameron #include <linux/completion.h>
38edd16368SStephen M. Cameron #include <linux/moduleparam.h>
39edd16368SStephen M. Cameron #include <scsi/scsi.h>
40edd16368SStephen M. Cameron #include <scsi/scsi_cmnd.h>
41edd16368SStephen M. Cameron #include <scsi/scsi_device.h>
42edd16368SStephen M. Cameron #include <scsi/scsi_host.h>
43667e23d4SStephen M. Cameron #include <scsi/scsi_tcq.h>
449437ac43SStephen Cameron #include <scsi/scsi_eh.h>
45d04e62b9SKevin Barnett #include <scsi/scsi_transport_sas.h>
4673153fe5SWebb Scales #include <scsi/scsi_dbg.h>
47edd16368SStephen M. Cameron #include <linux/cciss_ioctl.h>
48edd16368SStephen M. Cameron #include <linux/string.h>
49edd16368SStephen M. Cameron #include <linux/bitmap.h>
5060063497SArun Sharma #include <linux/atomic.h>
51a0c12413SStephen M. Cameron #include <linux/jiffies.h>
5242a91641SDon Brace #include <linux/percpu-defs.h>
53094963daSStephen M. Cameron #include <linux/percpu.h>
542b08b3e9SDon Brace #include <asm/unaligned.h>
55283b4a9bSStephen M. Cameron #include <asm/div64.h>
56edd16368SStephen M. Cameron #include "hpsa_cmd.h"
57edd16368SStephen M. Cameron #include "hpsa.h"
58edd16368SStephen M. Cameron 
59ec2c3aa9SDon Brace /*
60ec2c3aa9SDon Brace  * HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.'
61ec2c3aa9SDon Brace  * with an optional trailing '-' followed by a byte value (0-255).
62ec2c3aa9SDon Brace  */
63ff54aee4SDon Brace #define HPSA_DRIVER_VERSION "3.4.16-0"
64edd16368SStephen M. Cameron #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
65f79cfec6SStephen M. Cameron #define HPSA "hpsa"
66edd16368SStephen M. Cameron 
67007e7aa9SRobert Elliott /* How long to wait for CISS doorbell communication */
68007e7aa9SRobert Elliott #define CLEAR_EVENT_WAIT_INTERVAL 20	/* ms for each msleep() call */
69007e7aa9SRobert Elliott #define MODE_CHANGE_WAIT_INTERVAL 10	/* ms for each msleep() call */
70007e7aa9SRobert Elliott #define MAX_CLEAR_EVENT_WAIT 30000	/* times 20 ms = 600 s */
71007e7aa9SRobert Elliott #define MAX_MODE_CHANGE_WAIT 2000	/* times 10 ms = 20 s */
72edd16368SStephen M. Cameron #define MAX_IOCTL_CONFIG_WAIT 1000
73edd16368SStephen M. Cameron 
74edd16368SStephen M. Cameron /*define how many times we will try a command because of bus resets */
75edd16368SStephen M. Cameron #define MAX_CMD_RETRIES 3
76edd16368SStephen M. Cameron 
77edd16368SStephen M. Cameron /* Embedded module documentation macros - see modules.h */
78edd16368SStephen M. Cameron MODULE_AUTHOR("Hewlett-Packard Company");
79edd16368SStephen M. Cameron MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
80edd16368SStephen M. Cameron 	HPSA_DRIVER_VERSION);
81edd16368SStephen M. Cameron MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
82edd16368SStephen M. Cameron MODULE_VERSION(HPSA_DRIVER_VERSION);
83edd16368SStephen M. Cameron MODULE_LICENSE("GPL");
84edd16368SStephen M. Cameron 
85edd16368SStephen M. Cameron static int hpsa_allow_any;
86edd16368SStephen M. Cameron module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
87edd16368SStephen M. Cameron MODULE_PARM_DESC(hpsa_allow_any,
88edd16368SStephen M. Cameron 		"Allow hpsa driver to access unknown HP Smart Array hardware");
8902ec19c8SStephen M. Cameron static int hpsa_simple_mode;
9002ec19c8SStephen M. Cameron module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
9102ec19c8SStephen M. Cameron MODULE_PARM_DESC(hpsa_simple_mode,
9202ec19c8SStephen M. Cameron 	"Use 'simple mode' rather than 'performant mode'");
93edd16368SStephen M. Cameron 
94edd16368SStephen M. Cameron /* define the PCI info for the cards we can control */
95edd16368SStephen M. Cameron static const struct pci_device_id hpsa_pci_device_id[] = {
96edd16368SStephen M. Cameron 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3241},
97edd16368SStephen M. Cameron 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3243},
98edd16368SStephen M. Cameron 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3245},
99edd16368SStephen M. Cameron 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3247},
100edd16368SStephen M. Cameron 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3249},
101163dbcd8SMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x324A},
102163dbcd8SMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x324B},
103f8b01eb9SMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3233},
1049143a961Sscameron@beardog.cce.hp.com 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3350},
1059143a961Sscameron@beardog.cce.hp.com 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3351},
1069143a961Sscameron@beardog.cce.hp.com 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3352},
1079143a961Sscameron@beardog.cce.hp.com 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3353},
1089143a961Sscameron@beardog.cce.hp.com 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3354},
1099143a961Sscameron@beardog.cce.hp.com 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3355},
1109143a961Sscameron@beardog.cce.hp.com 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3356},
111fe0c9610SMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1921},
112fe0c9610SMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1922},
113fe0c9610SMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1923},
114fe0c9610SMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1924},
115fe0c9610SMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1926},
116fe0c9610SMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1928},
11797b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1929},
11897b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BD},
11997b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BE},
12097b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BF},
12197b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C0},
12297b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C1},
12397b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C2},
12497b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C3},
12597b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C4},
12697b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C5},
1273b7a45e5SJoe Handzik 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C6},
12897b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C7},
12997b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C8},
13097b9f53dSMike Miller 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C9},
1313b7a45e5SJoe Handzik 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CA},
1323b7a45e5SJoe Handzik 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CB},
1333b7a45e5SJoe Handzik 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CC},
1343b7a45e5SJoe Handzik 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CD},
1353b7a45e5SJoe Handzik 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CE},
136fdfa4b6dSDon Brace 	{PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0580},
137cbb47dcbSDon Brace 	{PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0581},
138cbb47dcbSDon Brace 	{PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0582},
139cbb47dcbSDon Brace 	{PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0583},
140cbb47dcbSDon Brace 	{PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0584},
141cbb47dcbSDon Brace 	{PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0585},
1428e616a5eSStephen M. Cameron 	{PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076},
1438e616a5eSStephen M. Cameron 	{PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087},
1448e616a5eSStephen M. Cameron 	{PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D},
1458e616a5eSStephen M. Cameron 	{PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088},
1468e616a5eSStephen M. Cameron 	{PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f},
147edd16368SStephen M. Cameron 	{PCI_VENDOR_ID_HP,     PCI_ANY_ID,	PCI_ANY_ID, PCI_ANY_ID,
148edd16368SStephen M. Cameron 		PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
149edd16368SStephen M. Cameron 	{0,}
150edd16368SStephen M. Cameron };
151edd16368SStephen M. Cameron 
152edd16368SStephen M. Cameron MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
153edd16368SStephen M. Cameron 
154edd16368SStephen M. Cameron /*  board_id = Subsystem Device ID & Vendor ID
155edd16368SStephen M. Cameron  *  product = Marketing Name for the board
156edd16368SStephen M. Cameron  *  access = Address of the struct of function pointers
157edd16368SStephen M. Cameron  */
158edd16368SStephen M. Cameron static struct board_type products[] = {
159edd16368SStephen M. Cameron 	{0x3241103C, "Smart Array P212", &SA5_access},
160edd16368SStephen M. Cameron 	{0x3243103C, "Smart Array P410", &SA5_access},
161edd16368SStephen M. Cameron 	{0x3245103C, "Smart Array P410i", &SA5_access},
162edd16368SStephen M. Cameron 	{0x3247103C, "Smart Array P411", &SA5_access},
163edd16368SStephen M. Cameron 	{0x3249103C, "Smart Array P812", &SA5_access},
164163dbcd8SMike Miller 	{0x324A103C, "Smart Array P712m", &SA5_access},
165163dbcd8SMike Miller 	{0x324B103C, "Smart Array P711m", &SA5_access},
1667d2cce58SStephen M. Cameron 	{0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */
167fe0c9610SMike Miller 	{0x3350103C, "Smart Array P222", &SA5_access},
168fe0c9610SMike Miller 	{0x3351103C, "Smart Array P420", &SA5_access},
169fe0c9610SMike Miller 	{0x3352103C, "Smart Array P421", &SA5_access},
170fe0c9610SMike Miller 	{0x3353103C, "Smart Array P822", &SA5_access},
171fe0c9610SMike Miller 	{0x3354103C, "Smart Array P420i", &SA5_access},
172fe0c9610SMike Miller 	{0x3355103C, "Smart Array P220i", &SA5_access},
173fe0c9610SMike Miller 	{0x3356103C, "Smart Array P721m", &SA5_access},
1741fd6c8e3SMike Miller 	{0x1921103C, "Smart Array P830i", &SA5_access},
1751fd6c8e3SMike Miller 	{0x1922103C, "Smart Array P430", &SA5_access},
1761fd6c8e3SMike Miller 	{0x1923103C, "Smart Array P431", &SA5_access},
1771fd6c8e3SMike Miller 	{0x1924103C, "Smart Array P830", &SA5_access},
1781fd6c8e3SMike Miller 	{0x1926103C, "Smart Array P731m", &SA5_access},
1791fd6c8e3SMike Miller 	{0x1928103C, "Smart Array P230i", &SA5_access},
1801fd6c8e3SMike Miller 	{0x1929103C, "Smart Array P530", &SA5_access},
18127fb8137SDon Brace 	{0x21BD103C, "Smart Array P244br", &SA5_access},
18227fb8137SDon Brace 	{0x21BE103C, "Smart Array P741m", &SA5_access},
18327fb8137SDon Brace 	{0x21BF103C, "Smart HBA H240ar", &SA5_access},
18427fb8137SDon Brace 	{0x21C0103C, "Smart Array P440ar", &SA5_access},
185c8ae0ab1SDon Brace 	{0x21C1103C, "Smart Array P840ar", &SA5_access},
18627fb8137SDon Brace 	{0x21C2103C, "Smart Array P440", &SA5_access},
18727fb8137SDon Brace 	{0x21C3103C, "Smart Array P441", &SA5_access},
18897b9f53dSMike Miller 	{0x21C4103C, "Smart Array", &SA5_access},
18927fb8137SDon Brace 	{0x21C5103C, "Smart Array P841", &SA5_access},
19027fb8137SDon Brace 	{0x21C6103C, "Smart HBA H244br", &SA5_access},
19127fb8137SDon Brace 	{0x21C7103C, "Smart HBA H240", &SA5_access},
19227fb8137SDon Brace 	{0x21C8103C, "Smart HBA H241", &SA5_access},
19397b9f53dSMike Miller 	{0x21C9103C, "Smart Array", &SA5_access},
19427fb8137SDon Brace 	{0x21CA103C, "Smart Array P246br", &SA5_access},
19527fb8137SDon Brace 	{0x21CB103C, "Smart Array P840", &SA5_access},
1963b7a45e5SJoe Handzik 	{0x21CC103C, "Smart Array", &SA5_access},
1973b7a45e5SJoe Handzik 	{0x21CD103C, "Smart Array", &SA5_access},
19827fb8137SDon Brace 	{0x21CE103C, "Smart HBA", &SA5_access},
199fdfa4b6dSDon Brace 	{0x05809005, "SmartHBA-SA", &SA5_access},
200cbb47dcbSDon Brace 	{0x05819005, "SmartHBA-SA 8i", &SA5_access},
201cbb47dcbSDon Brace 	{0x05829005, "SmartHBA-SA 8i8e", &SA5_access},
202cbb47dcbSDon Brace 	{0x05839005, "SmartHBA-SA 8e", &SA5_access},
203cbb47dcbSDon Brace 	{0x05849005, "SmartHBA-SA 16i", &SA5_access},
204cbb47dcbSDon Brace 	{0x05859005, "SmartHBA-SA 4i4e", &SA5_access},
2058e616a5eSStephen M. Cameron 	{0x00761590, "HP Storage P1224 Array Controller", &SA5_access},
2068e616a5eSStephen M. Cameron 	{0x00871590, "HP Storage P1224e Array Controller", &SA5_access},
2078e616a5eSStephen M. Cameron 	{0x007D1590, "HP Storage P1228 Array Controller", &SA5_access},
2088e616a5eSStephen M. Cameron 	{0x00881590, "HP Storage P1228e Array Controller", &SA5_access},
2098e616a5eSStephen M. Cameron 	{0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access},
210edd16368SStephen M. Cameron 	{0xFFFF103C, "Unknown Smart Array", &SA5_access},
211edd16368SStephen M. Cameron };
212edd16368SStephen M. Cameron 
213d04e62b9SKevin Barnett static struct scsi_transport_template *hpsa_sas_transport_template;
214d04e62b9SKevin Barnett static int hpsa_add_sas_host(struct ctlr_info *h);
215d04e62b9SKevin Barnett static void hpsa_delete_sas_host(struct ctlr_info *h);
216d04e62b9SKevin Barnett static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node,
217d04e62b9SKevin Barnett 			struct hpsa_scsi_dev_t *device);
218d04e62b9SKevin Barnett static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device);
219d04e62b9SKevin Barnett static struct hpsa_scsi_dev_t
220d04e62b9SKevin Barnett 	*hpsa_find_device_by_sas_rphy(struct ctlr_info *h,
221d04e62b9SKevin Barnett 		struct sas_rphy *rphy);
222d04e62b9SKevin Barnett 
223a58e7e53SWebb Scales #define SCSI_CMD_BUSY ((struct scsi_cmnd *)&hpsa_cmd_busy)
224a58e7e53SWebb Scales static const struct scsi_cmnd hpsa_cmd_busy;
225a58e7e53SWebb Scales #define SCSI_CMD_IDLE ((struct scsi_cmnd *)&hpsa_cmd_idle)
226a58e7e53SWebb Scales static const struct scsi_cmnd hpsa_cmd_idle;
227edd16368SStephen M. Cameron static int number_of_controllers;
228edd16368SStephen M. Cameron 
22910f66018SStephen M. Cameron static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
23010f66018SStephen M. Cameron static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
23142a91641SDon Brace static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg);
232edd16368SStephen M. Cameron 
233edd16368SStephen M. Cameron #ifdef CONFIG_COMPAT
23442a91641SDon Brace static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd,
23542a91641SDon Brace 	void __user *arg);
236edd16368SStephen M. Cameron #endif
237edd16368SStephen M. Cameron 
238edd16368SStephen M. Cameron static void cmd_free(struct ctlr_info *h, struct CommandList *c);
239edd16368SStephen M. Cameron static struct CommandList *cmd_alloc(struct ctlr_info *h);
24073153fe5SWebb Scales static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c);
24173153fe5SWebb Scales static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h,
24273153fe5SWebb Scales 					    struct scsi_cmnd *scmd);
243a2dac136SStephen M. Cameron static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
244b7bb24ebSStephen M. Cameron 	void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
245edd16368SStephen M. Cameron 	int cmd_type);
2462c143342SRobert Elliott static void hpsa_free_cmd_pool(struct ctlr_info *h);
247b7bb24ebSStephen M. Cameron #define VPD_PAGE (1 << 8)
248b48d9804SDon Brace #define HPSA_SIMPLE_ERROR_BITS 0x03
249edd16368SStephen M. Cameron 
250f281233dSJeff Garzik static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
251a08a8471SStephen M. Cameron static void hpsa_scan_start(struct Scsi_Host *);
252a08a8471SStephen M. Cameron static int hpsa_scan_finished(struct Scsi_Host *sh,
253a08a8471SStephen M. Cameron 	unsigned long elapsed_time);
2547c0a0229SDon Brace static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth);
255edd16368SStephen M. Cameron 
256edd16368SStephen M. Cameron static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
25775167d2cSStephen M. Cameron static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd);
258edd16368SStephen M. Cameron static int hpsa_slave_alloc(struct scsi_device *sdev);
25941ce4c35SStephen Cameron static int hpsa_slave_configure(struct scsi_device *sdev);
260edd16368SStephen M. Cameron static void hpsa_slave_destroy(struct scsi_device *sdev);
261edd16368SStephen M. Cameron 
2628aa60681SDon Brace static void hpsa_update_scsi_devices(struct ctlr_info *h);
263edd16368SStephen M. Cameron static int check_for_unit_attention(struct ctlr_info *h,
264edd16368SStephen M. Cameron 	struct CommandList *c);
265edd16368SStephen M. Cameron static void check_ioctl_unit_attention(struct ctlr_info *h,
266edd16368SStephen M. Cameron 	struct CommandList *c);
267303932fdSDon Brace /* performant mode helper functions */
268303932fdSDon Brace static void calc_bucket_map(int *bucket, int num_buckets,
2692b08b3e9SDon Brace 	int nsgs, int min_blocks, u32 *bucket_map);
270105a3dbcSRobert Elliott static void hpsa_free_performant_mode(struct ctlr_info *h);
271105a3dbcSRobert Elliott static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
272254f796bSMatt Gates static inline u32 next_command(struct ctlr_info *h, u8 q);
2736f039790SGreg Kroah-Hartman static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
2746f039790SGreg Kroah-Hartman 			       u32 *cfg_base_addr, u64 *cfg_base_addr_index,
2751df8552aSStephen M. Cameron 			       u64 *cfg_offset);
2766f039790SGreg Kroah-Hartman static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
2771df8552aSStephen M. Cameron 				    unsigned long *memory_bar);
2786f039790SGreg Kroah-Hartman static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
2796f039790SGreg Kroah-Hartman static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
2806f039790SGreg Kroah-Hartman 				     int wait_for_ready);
28175167d2cSStephen M. Cameron static inline void finish_cmd(struct CommandList *c);
282c706a795SRobert Elliott static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h);
283fe5389c8SStephen M. Cameron #define BOARD_NOT_READY 0
284fe5389c8SStephen M. Cameron #define BOARD_READY 1
28523100dd9SStephen M. Cameron static void hpsa_drain_accel_commands(struct ctlr_info *h);
28676438d08SStephen M. Cameron static void hpsa_flush_cache(struct ctlr_info *h);
287c349775eSScott Teel static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
288c349775eSScott Teel 	struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
28903383736SDon Brace 	u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk);
290080ef1ccSDon Brace static void hpsa_command_resubmit_worker(struct work_struct *work);
29125163bd5SWebb Scales static u32 lockup_detected(struct ctlr_info *h);
29225163bd5SWebb Scales static int detect_controller_lockup(struct ctlr_info *h);
293c2adae44SScott Teel static void hpsa_disable_rld_caching(struct ctlr_info *h);
294d04e62b9SKevin Barnett static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
295d04e62b9SKevin Barnett 	struct ReportExtendedLUNdata *buf, int bufsize);
2968383278dSScott Teel static bool hpsa_vpd_page_supported(struct ctlr_info *h,
2978383278dSScott Teel 	unsigned char scsi3addr[], u8 page);
29834592254SScott Teel static int hpsa_luns_changed(struct ctlr_info *h);
299ba74fdc4SDon Brace static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c,
300ba74fdc4SDon Brace 			       struct hpsa_scsi_dev_t *dev,
301ba74fdc4SDon Brace 			       unsigned char *scsi3addr);
302edd16368SStephen M. Cameron 
303edd16368SStephen M. Cameron static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
304edd16368SStephen M. Cameron {
305edd16368SStephen M. Cameron 	unsigned long *priv = shost_priv(sdev->host);
306edd16368SStephen M. Cameron 	return (struct ctlr_info *) *priv;
307edd16368SStephen M. Cameron }
308edd16368SStephen M. Cameron 
309a23513e8SStephen M. Cameron static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
310a23513e8SStephen M. Cameron {
311a23513e8SStephen M. Cameron 	unsigned long *priv = shost_priv(sh);
312a23513e8SStephen M. Cameron 	return (struct ctlr_info *) *priv;
313a23513e8SStephen M. Cameron }
314a23513e8SStephen M. Cameron 
315a58e7e53SWebb Scales static inline bool hpsa_is_cmd_idle(struct CommandList *c)
316a58e7e53SWebb Scales {
317a58e7e53SWebb Scales 	return c->scsi_cmd == SCSI_CMD_IDLE;
318a58e7e53SWebb Scales }
319a58e7e53SWebb Scales 
320d604f533SWebb Scales static inline bool hpsa_is_pending_event(struct CommandList *c)
321d604f533SWebb Scales {
322d604f533SWebb Scales 	return c->abort_pending || c->reset_pending;
323d604f533SWebb Scales }
324d604f533SWebb Scales 
3259437ac43SStephen Cameron /* extract sense key, asc, and ascq from sense data.  -1 means invalid. */
3269437ac43SStephen Cameron static void decode_sense_data(const u8 *sense_data, int sense_data_len,
3279437ac43SStephen Cameron 			u8 *sense_key, u8 *asc, u8 *ascq)
3289437ac43SStephen Cameron {
3299437ac43SStephen Cameron 	struct scsi_sense_hdr sshdr;
3309437ac43SStephen Cameron 	bool rc;
3319437ac43SStephen Cameron 
3329437ac43SStephen Cameron 	*sense_key = -1;
3339437ac43SStephen Cameron 	*asc = -1;
3349437ac43SStephen Cameron 	*ascq = -1;
3359437ac43SStephen Cameron 
3369437ac43SStephen Cameron 	if (sense_data_len < 1)
3379437ac43SStephen Cameron 		return;
3389437ac43SStephen Cameron 
3399437ac43SStephen Cameron 	rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr);
3409437ac43SStephen Cameron 	if (rc) {
3419437ac43SStephen Cameron 		*sense_key = sshdr.sense_key;
3429437ac43SStephen Cameron 		*asc = sshdr.asc;
3439437ac43SStephen Cameron 		*ascq = sshdr.ascq;
3449437ac43SStephen Cameron 	}
3459437ac43SStephen Cameron }
3469437ac43SStephen Cameron 
347edd16368SStephen M. Cameron static int check_for_unit_attention(struct ctlr_info *h,
348edd16368SStephen M. Cameron 	struct CommandList *c)
349edd16368SStephen M. Cameron {
3509437ac43SStephen Cameron 	u8 sense_key, asc, ascq;
3519437ac43SStephen Cameron 	int sense_len;
3529437ac43SStephen Cameron 
3539437ac43SStephen Cameron 	if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
3549437ac43SStephen Cameron 		sense_len = sizeof(c->err_info->SenseInfo);
3559437ac43SStephen Cameron 	else
3569437ac43SStephen Cameron 		sense_len = c->err_info->SenseLen;
3579437ac43SStephen Cameron 
3589437ac43SStephen Cameron 	decode_sense_data(c->err_info->SenseInfo, sense_len,
3599437ac43SStephen Cameron 				&sense_key, &asc, &ascq);
36081c27557SDon Brace 	if (sense_key != UNIT_ATTENTION || asc == 0xff)
361edd16368SStephen M. Cameron 		return 0;
362edd16368SStephen M. Cameron 
3639437ac43SStephen Cameron 	switch (asc) {
364edd16368SStephen M. Cameron 	case STATE_CHANGED:
3659437ac43SStephen Cameron 		dev_warn(&h->pdev->dev,
3662946e82bSRobert Elliott 			"%s: a state change detected, command retried\n",
3672946e82bSRobert Elliott 			h->devname);
368edd16368SStephen M. Cameron 		break;
369edd16368SStephen M. Cameron 	case LUN_FAILED:
3707f73695aSStephen M. Cameron 		dev_warn(&h->pdev->dev,
3712946e82bSRobert Elliott 			"%s: LUN failure detected\n", h->devname);
372edd16368SStephen M. Cameron 		break;
373edd16368SStephen M. Cameron 	case REPORT_LUNS_CHANGED:
3747f73695aSStephen M. Cameron 		dev_warn(&h->pdev->dev,
3752946e82bSRobert Elliott 			"%s: report LUN data changed\n", h->devname);
376edd16368SStephen M. Cameron 	/*
3774f4eb9f1SScott Teel 	 * Note: this REPORT_LUNS_CHANGED condition only occurs on the external
3784f4eb9f1SScott Teel 	 * target (array) devices.
379edd16368SStephen M. Cameron 	 */
380edd16368SStephen M. Cameron 		break;
381edd16368SStephen M. Cameron 	case POWER_OR_RESET:
3822946e82bSRobert Elliott 		dev_warn(&h->pdev->dev,
3832946e82bSRobert Elliott 			"%s: a power on or device reset detected\n",
3842946e82bSRobert Elliott 			h->devname);
385edd16368SStephen M. Cameron 		break;
386edd16368SStephen M. Cameron 	case UNIT_ATTENTION_CLEARED:
3872946e82bSRobert Elliott 		dev_warn(&h->pdev->dev,
3882946e82bSRobert Elliott 			"%s: unit attention cleared by another initiator\n",
3892946e82bSRobert Elliott 			h->devname);
390edd16368SStephen M. Cameron 		break;
391edd16368SStephen M. Cameron 	default:
3922946e82bSRobert Elliott 		dev_warn(&h->pdev->dev,
3932946e82bSRobert Elliott 			"%s: unknown unit attention detected\n",
3942946e82bSRobert Elliott 			h->devname);
395edd16368SStephen M. Cameron 		break;
396edd16368SStephen M. Cameron 	}
397edd16368SStephen M. Cameron 	return 1;
398edd16368SStephen M. Cameron }
399edd16368SStephen M. Cameron 
400852af20aSMatt Bondurant static int check_for_busy(struct ctlr_info *h, struct CommandList *c)
401852af20aSMatt Bondurant {
402852af20aSMatt Bondurant 	if (c->err_info->CommandStatus != CMD_TARGET_STATUS ||
403852af20aSMatt Bondurant 		(c->err_info->ScsiStatus != SAM_STAT_BUSY &&
404852af20aSMatt Bondurant 		 c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL))
405852af20aSMatt Bondurant 		return 0;
406852af20aSMatt Bondurant 	dev_warn(&h->pdev->dev, HPSA "device busy");
407852af20aSMatt Bondurant 	return 1;
408852af20aSMatt Bondurant }
409852af20aSMatt Bondurant 
410e985c58fSStephen Cameron static u32 lockup_detected(struct ctlr_info *h);
411e985c58fSStephen Cameron static ssize_t host_show_lockup_detected(struct device *dev,
412e985c58fSStephen Cameron 		struct device_attribute *attr, char *buf)
413e985c58fSStephen Cameron {
414e985c58fSStephen Cameron 	int ld;
415e985c58fSStephen Cameron 	struct ctlr_info *h;
416e985c58fSStephen Cameron 	struct Scsi_Host *shost = class_to_shost(dev);
417e985c58fSStephen Cameron 
418e985c58fSStephen Cameron 	h = shost_to_hba(shost);
419e985c58fSStephen Cameron 	ld = lockup_detected(h);
420e985c58fSStephen Cameron 
421e985c58fSStephen Cameron 	return sprintf(buf, "ld=%d\n", ld);
422e985c58fSStephen Cameron }
423e985c58fSStephen Cameron 
424da0697bdSScott Teel static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev,
425da0697bdSScott Teel 					 struct device_attribute *attr,
426da0697bdSScott Teel 					 const char *buf, size_t count)
427da0697bdSScott Teel {
428da0697bdSScott Teel 	int status, len;
429da0697bdSScott Teel 	struct ctlr_info *h;
430da0697bdSScott Teel 	struct Scsi_Host *shost = class_to_shost(dev);
431da0697bdSScott Teel 	char tmpbuf[10];
432da0697bdSScott Teel 
433da0697bdSScott Teel 	if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
434da0697bdSScott Teel 		return -EACCES;
435da0697bdSScott Teel 	len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
436da0697bdSScott Teel 	strncpy(tmpbuf, buf, len);
437da0697bdSScott Teel 	tmpbuf[len] = '\0';
438da0697bdSScott Teel 	if (sscanf(tmpbuf, "%d", &status) != 1)
439da0697bdSScott Teel 		return -EINVAL;
440da0697bdSScott Teel 	h = shost_to_hba(shost);
441da0697bdSScott Teel 	h->acciopath_status = !!status;
442da0697bdSScott Teel 	dev_warn(&h->pdev->dev,
443da0697bdSScott Teel 		"hpsa: HP SSD Smart Path %s via sysfs update.\n",
444da0697bdSScott Teel 		h->acciopath_status ? "enabled" : "disabled");
445da0697bdSScott Teel 	return count;
446da0697bdSScott Teel }
447da0697bdSScott Teel 
4482ba8bfc8SStephen M. Cameron static ssize_t host_store_raid_offload_debug(struct device *dev,
4492ba8bfc8SStephen M. Cameron 					 struct device_attribute *attr,
4502ba8bfc8SStephen M. Cameron 					 const char *buf, size_t count)
4512ba8bfc8SStephen M. Cameron {
4522ba8bfc8SStephen M. Cameron 	int debug_level, len;
4532ba8bfc8SStephen M. Cameron 	struct ctlr_info *h;
4542ba8bfc8SStephen M. Cameron 	struct Scsi_Host *shost = class_to_shost(dev);
4552ba8bfc8SStephen M. Cameron 	char tmpbuf[10];
4562ba8bfc8SStephen M. Cameron 
4572ba8bfc8SStephen M. Cameron 	if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
4582ba8bfc8SStephen M. Cameron 		return -EACCES;
4592ba8bfc8SStephen M. Cameron 	len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
4602ba8bfc8SStephen M. Cameron 	strncpy(tmpbuf, buf, len);
4612ba8bfc8SStephen M. Cameron 	tmpbuf[len] = '\0';
4622ba8bfc8SStephen M. Cameron 	if (sscanf(tmpbuf, "%d", &debug_level) != 1)
4632ba8bfc8SStephen M. Cameron 		return -EINVAL;
4642ba8bfc8SStephen M. Cameron 	if (debug_level < 0)
4652ba8bfc8SStephen M. Cameron 		debug_level = 0;
4662ba8bfc8SStephen M. Cameron 	h = shost_to_hba(shost);
4672ba8bfc8SStephen M. Cameron 	h->raid_offload_debug = debug_level;
4682ba8bfc8SStephen M. Cameron 	dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n",
4692ba8bfc8SStephen M. Cameron 		h->raid_offload_debug);
4702ba8bfc8SStephen M. Cameron 	return count;
4712ba8bfc8SStephen M. Cameron }
4722ba8bfc8SStephen M. Cameron 
473edd16368SStephen M. Cameron static ssize_t host_store_rescan(struct device *dev,
474edd16368SStephen M. Cameron 				 struct device_attribute *attr,
475edd16368SStephen M. Cameron 				 const char *buf, size_t count)
476edd16368SStephen M. Cameron {
477edd16368SStephen M. Cameron 	struct ctlr_info *h;
478edd16368SStephen M. Cameron 	struct Scsi_Host *shost = class_to_shost(dev);
479a23513e8SStephen M. Cameron 	h = shost_to_hba(shost);
48031468401SMike Miller 	hpsa_scan_start(h->scsi_host);
481edd16368SStephen M. Cameron 	return count;
482edd16368SStephen M. Cameron }
483edd16368SStephen M. Cameron 
484d28ce020SStephen M. Cameron static ssize_t host_show_firmware_revision(struct device *dev,
485d28ce020SStephen M. Cameron 	     struct device_attribute *attr, char *buf)
486d28ce020SStephen M. Cameron {
487d28ce020SStephen M. Cameron 	struct ctlr_info *h;
488d28ce020SStephen M. Cameron 	struct Scsi_Host *shost = class_to_shost(dev);
489d28ce020SStephen M. Cameron 	unsigned char *fwrev;
490d28ce020SStephen M. Cameron 
491d28ce020SStephen M. Cameron 	h = shost_to_hba(shost);
492d28ce020SStephen M. Cameron 	if (!h->hba_inquiry_data)
493d28ce020SStephen M. Cameron 		return 0;
494d28ce020SStephen M. Cameron 	fwrev = &h->hba_inquiry_data[32];
495d28ce020SStephen M. Cameron 	return snprintf(buf, 20, "%c%c%c%c\n",
496d28ce020SStephen M. Cameron 		fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
497d28ce020SStephen M. Cameron }
498d28ce020SStephen M. Cameron 
49994a13649SStephen M. Cameron static ssize_t host_show_commands_outstanding(struct device *dev,
50094a13649SStephen M. Cameron 	     struct device_attribute *attr, char *buf)
50194a13649SStephen M. Cameron {
50294a13649SStephen M. Cameron 	struct Scsi_Host *shost = class_to_shost(dev);
50394a13649SStephen M. Cameron 	struct ctlr_info *h = shost_to_hba(shost);
50494a13649SStephen M. Cameron 
5050cbf768eSStephen M. Cameron 	return snprintf(buf, 20, "%d\n",
5060cbf768eSStephen M. Cameron 			atomic_read(&h->commands_outstanding));
50794a13649SStephen M. Cameron }
50894a13649SStephen M. Cameron 
509745a7a25SStephen M. Cameron static ssize_t host_show_transport_mode(struct device *dev,
510745a7a25SStephen M. Cameron 	struct device_attribute *attr, char *buf)
511745a7a25SStephen M. Cameron {
512745a7a25SStephen M. Cameron 	struct ctlr_info *h;
513745a7a25SStephen M. Cameron 	struct Scsi_Host *shost = class_to_shost(dev);
514745a7a25SStephen M. Cameron 
515745a7a25SStephen M. Cameron 	h = shost_to_hba(shost);
516745a7a25SStephen M. Cameron 	return snprintf(buf, 20, "%s\n",
517960a30e7SStephen M. Cameron 		h->transMethod & CFGTBL_Trans_Performant ?
518745a7a25SStephen M. Cameron 			"performant" : "simple");
519745a7a25SStephen M. Cameron }
520745a7a25SStephen M. Cameron 
521da0697bdSScott Teel static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev,
522da0697bdSScott Teel 	struct device_attribute *attr, char *buf)
523da0697bdSScott Teel {
524da0697bdSScott Teel 	struct ctlr_info *h;
525da0697bdSScott Teel 	struct Scsi_Host *shost = class_to_shost(dev);
526da0697bdSScott Teel 
527da0697bdSScott Teel 	h = shost_to_hba(shost);
528da0697bdSScott Teel 	return snprintf(buf, 30, "HP SSD Smart Path %s\n",
529da0697bdSScott Teel 		(h->acciopath_status == 1) ?  "enabled" : "disabled");
530da0697bdSScott Teel }
531da0697bdSScott Teel 
53246380786SStephen M. Cameron /* List of controllers which cannot be hard reset on kexec with reset_devices */
533941b1cdaSStephen M. Cameron static u32 unresettable_controller[] = {
534941b1cdaSStephen M. Cameron 	0x324a103C, /* Smart Array P712m */
535941b1cdaSStephen M. Cameron 	0x324b103C, /* Smart Array P711m */
536941b1cdaSStephen M. Cameron 	0x3223103C, /* Smart Array P800 */
537941b1cdaSStephen M. Cameron 	0x3234103C, /* Smart Array P400 */
538941b1cdaSStephen M. Cameron 	0x3235103C, /* Smart Array P400i */
539941b1cdaSStephen M. Cameron 	0x3211103C, /* Smart Array E200i */
540941b1cdaSStephen M. Cameron 	0x3212103C, /* Smart Array E200 */
541941b1cdaSStephen M. Cameron 	0x3213103C, /* Smart Array E200i */
542941b1cdaSStephen M. Cameron 	0x3214103C, /* Smart Array E200i */
543941b1cdaSStephen M. Cameron 	0x3215103C, /* Smart Array E200i */
544941b1cdaSStephen M. Cameron 	0x3237103C, /* Smart Array E500 */
545941b1cdaSStephen M. Cameron 	0x323D103C, /* Smart Array P700m */
5467af0abbcSTomas Henzl 	0x40800E11, /* Smart Array 5i */
547941b1cdaSStephen M. Cameron 	0x409C0E11, /* Smart Array 6400 */
548941b1cdaSStephen M. Cameron 	0x409D0E11, /* Smart Array 6400 EM */
5495a4f934eSTomas Henzl 	0x40700E11, /* Smart Array 5300 */
5505a4f934eSTomas Henzl 	0x40820E11, /* Smart Array 532 */
5515a4f934eSTomas Henzl 	0x40830E11, /* Smart Array 5312 */
5525a4f934eSTomas Henzl 	0x409A0E11, /* Smart Array 641 */
5535a4f934eSTomas Henzl 	0x409B0E11, /* Smart Array 642 */
5545a4f934eSTomas Henzl 	0x40910E11, /* Smart Array 6i */
555941b1cdaSStephen M. Cameron };
556941b1cdaSStephen M. Cameron 
55746380786SStephen M. Cameron /* List of controllers which cannot even be soft reset */
55846380786SStephen M. Cameron static u32 soft_unresettable_controller[] = {
5597af0abbcSTomas Henzl 	0x40800E11, /* Smart Array 5i */
5605a4f934eSTomas Henzl 	0x40700E11, /* Smart Array 5300 */
5615a4f934eSTomas Henzl 	0x40820E11, /* Smart Array 532 */
5625a4f934eSTomas Henzl 	0x40830E11, /* Smart Array 5312 */
5635a4f934eSTomas Henzl 	0x409A0E11, /* Smart Array 641 */
5645a4f934eSTomas Henzl 	0x409B0E11, /* Smart Array 642 */
5655a4f934eSTomas Henzl 	0x40910E11, /* Smart Array 6i */
56646380786SStephen M. Cameron 	/* Exclude 640x boards.  These are two pci devices in one slot
56746380786SStephen M. Cameron 	 * which share a battery backed cache module.  One controls the
56846380786SStephen M. Cameron 	 * cache, the other accesses the cache through the one that controls
56946380786SStephen M. Cameron 	 * it.  If we reset the one controlling the cache, the other will
57046380786SStephen M. Cameron 	 * likely not be happy.  Just forbid resetting this conjoined mess.
57146380786SStephen M. Cameron 	 * The 640x isn't really supported by hpsa anyway.
57246380786SStephen M. Cameron 	 */
57346380786SStephen M. Cameron 	0x409C0E11, /* Smart Array 6400 */
57446380786SStephen M. Cameron 	0x409D0E11, /* Smart Array 6400 EM */
57546380786SStephen M. Cameron };
57646380786SStephen M. Cameron 
5779b5c48c2SStephen Cameron static u32 needs_abort_tags_swizzled[] = {
5789b5c48c2SStephen Cameron 	0x323D103C, /* Smart Array P700m */
5799b5c48c2SStephen Cameron 	0x324a103C, /* Smart Array P712m */
5809b5c48c2SStephen Cameron 	0x324b103C, /* SmartArray P711m */
5819b5c48c2SStephen Cameron };
5829b5c48c2SStephen Cameron 
5839b5c48c2SStephen Cameron static int board_id_in_array(u32 a[], int nelems, u32 board_id)
584941b1cdaSStephen M. Cameron {
585941b1cdaSStephen M. Cameron 	int i;
586941b1cdaSStephen M. Cameron 
5879b5c48c2SStephen Cameron 	for (i = 0; i < nelems; i++)
5889b5c48c2SStephen Cameron 		if (a[i] == board_id)
589941b1cdaSStephen M. Cameron 			return 1;
5909b5c48c2SStephen Cameron 	return 0;
5919b5c48c2SStephen Cameron }
5929b5c48c2SStephen Cameron 
5939b5c48c2SStephen Cameron static int ctlr_is_hard_resettable(u32 board_id)
5949b5c48c2SStephen Cameron {
5959b5c48c2SStephen Cameron 	return !board_id_in_array(unresettable_controller,
5969b5c48c2SStephen Cameron 			ARRAY_SIZE(unresettable_controller), board_id);
597941b1cdaSStephen M. Cameron }
598941b1cdaSStephen M. Cameron 
59946380786SStephen M. Cameron static int ctlr_is_soft_resettable(u32 board_id)
60046380786SStephen M. Cameron {
6019b5c48c2SStephen Cameron 	return !board_id_in_array(soft_unresettable_controller,
6029b5c48c2SStephen Cameron 			ARRAY_SIZE(soft_unresettable_controller), board_id);
60346380786SStephen M. Cameron }
60446380786SStephen M. Cameron 
60546380786SStephen M. Cameron static int ctlr_is_resettable(u32 board_id)
60646380786SStephen M. Cameron {
60746380786SStephen M. Cameron 	return ctlr_is_hard_resettable(board_id) ||
60846380786SStephen M. Cameron 		ctlr_is_soft_resettable(board_id);
60946380786SStephen M. Cameron }
61046380786SStephen M. Cameron 
6119b5c48c2SStephen Cameron static int ctlr_needs_abort_tags_swizzled(u32 board_id)
6129b5c48c2SStephen Cameron {
6139b5c48c2SStephen Cameron 	return board_id_in_array(needs_abort_tags_swizzled,
6149b5c48c2SStephen Cameron 			ARRAY_SIZE(needs_abort_tags_swizzled), board_id);
6159b5c48c2SStephen Cameron }
6169b5c48c2SStephen Cameron 
617941b1cdaSStephen M. Cameron static ssize_t host_show_resettable(struct device *dev,
618941b1cdaSStephen M. Cameron 	struct device_attribute *attr, char *buf)
619941b1cdaSStephen M. Cameron {
620941b1cdaSStephen M. Cameron 	struct ctlr_info *h;
621941b1cdaSStephen M. Cameron 	struct Scsi_Host *shost = class_to_shost(dev);
622941b1cdaSStephen M. Cameron 
623941b1cdaSStephen M. Cameron 	h = shost_to_hba(shost);
62446380786SStephen M. Cameron 	return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
625941b1cdaSStephen M. Cameron }
626941b1cdaSStephen M. Cameron 
627edd16368SStephen M. Cameron static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
628edd16368SStephen M. Cameron {
629edd16368SStephen M. Cameron 	return (scsi3addr[3] & 0xC0) == 0x40;
630edd16368SStephen M. Cameron }
631edd16368SStephen M. Cameron 
632f2ef0ce7SRobert Elliott static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6",
6337c59a0d4SDon Brace 	"1(+0)ADM", "UNKNOWN", "PHYS DRV"
634edd16368SStephen M. Cameron };
6356b80b18fSScott Teel #define HPSA_RAID_0	0
6366b80b18fSScott Teel #define HPSA_RAID_4	1
6376b80b18fSScott Teel #define HPSA_RAID_1	2	/* also used for RAID 10 */
6386b80b18fSScott Teel #define HPSA_RAID_5	3	/* also used for RAID 50 */
6396b80b18fSScott Teel #define HPSA_RAID_51	4
6406b80b18fSScott Teel #define HPSA_RAID_6	5	/* also used for RAID 60 */
6416b80b18fSScott Teel #define HPSA_RAID_ADM	6	/* also used for RAID 1+0 ADM */
6427c59a0d4SDon Brace #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 2)
6437c59a0d4SDon Brace #define PHYSICAL_DRIVE (ARRAY_SIZE(raid_label) - 1)
644edd16368SStephen M. Cameron 
645f3f01730SKevin Barnett static inline bool is_logical_device(struct hpsa_scsi_dev_t *device)
646f3f01730SKevin Barnett {
647f3f01730SKevin Barnett 	return !device->physical_device;
648f3f01730SKevin Barnett }
649edd16368SStephen M. Cameron 
650edd16368SStephen M. Cameron static ssize_t raid_level_show(struct device *dev,
651edd16368SStephen M. Cameron 	     struct device_attribute *attr, char *buf)
652edd16368SStephen M. Cameron {
653edd16368SStephen M. Cameron 	ssize_t l = 0;
65482a72c0aSStephen M. Cameron 	unsigned char rlevel;
655edd16368SStephen M. Cameron 	struct ctlr_info *h;
656edd16368SStephen M. Cameron 	struct scsi_device *sdev;
657edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *hdev;
658edd16368SStephen M. Cameron 	unsigned long flags;
659edd16368SStephen M. Cameron 
660edd16368SStephen M. Cameron 	sdev = to_scsi_device(dev);
661edd16368SStephen M. Cameron 	h = sdev_to_hba(sdev);
662edd16368SStephen M. Cameron 	spin_lock_irqsave(&h->lock, flags);
663edd16368SStephen M. Cameron 	hdev = sdev->hostdata;
664edd16368SStephen M. Cameron 	if (!hdev) {
665edd16368SStephen M. Cameron 		spin_unlock_irqrestore(&h->lock, flags);
666edd16368SStephen M. Cameron 		return -ENODEV;
667edd16368SStephen M. Cameron 	}
668edd16368SStephen M. Cameron 
669edd16368SStephen M. Cameron 	/* Is this even a logical drive? */
670f3f01730SKevin Barnett 	if (!is_logical_device(hdev)) {
671edd16368SStephen M. Cameron 		spin_unlock_irqrestore(&h->lock, flags);
672edd16368SStephen M. Cameron 		l = snprintf(buf, PAGE_SIZE, "N/A\n");
673edd16368SStephen M. Cameron 		return l;
674edd16368SStephen M. Cameron 	}
675edd16368SStephen M. Cameron 
676edd16368SStephen M. Cameron 	rlevel = hdev->raid_level;
677edd16368SStephen M. Cameron 	spin_unlock_irqrestore(&h->lock, flags);
67882a72c0aSStephen M. Cameron 	if (rlevel > RAID_UNKNOWN)
679edd16368SStephen M. Cameron 		rlevel = RAID_UNKNOWN;
680edd16368SStephen M. Cameron 	l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
681edd16368SStephen M. Cameron 	return l;
682edd16368SStephen M. Cameron }
683edd16368SStephen M. Cameron 
684edd16368SStephen M. Cameron static ssize_t lunid_show(struct device *dev,
685edd16368SStephen M. Cameron 	     struct device_attribute *attr, char *buf)
686edd16368SStephen M. Cameron {
687edd16368SStephen M. Cameron 	struct ctlr_info *h;
688edd16368SStephen M. Cameron 	struct scsi_device *sdev;
689edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *hdev;
690edd16368SStephen M. Cameron 	unsigned long flags;
691edd16368SStephen M. Cameron 	unsigned char lunid[8];
692edd16368SStephen M. Cameron 
693edd16368SStephen M. Cameron 	sdev = to_scsi_device(dev);
694edd16368SStephen M. Cameron 	h = sdev_to_hba(sdev);
695edd16368SStephen M. Cameron 	spin_lock_irqsave(&h->lock, flags);
696edd16368SStephen M. Cameron 	hdev = sdev->hostdata;
697edd16368SStephen M. Cameron 	if (!hdev) {
698edd16368SStephen M. Cameron 		spin_unlock_irqrestore(&h->lock, flags);
699edd16368SStephen M. Cameron 		return -ENODEV;
700edd16368SStephen M. Cameron 	}
701edd16368SStephen M. Cameron 	memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
702edd16368SStephen M. Cameron 	spin_unlock_irqrestore(&h->lock, flags);
703edd16368SStephen M. Cameron 	return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
704edd16368SStephen M. Cameron 		lunid[0], lunid[1], lunid[2], lunid[3],
705edd16368SStephen M. Cameron 		lunid[4], lunid[5], lunid[6], lunid[7]);
706edd16368SStephen M. Cameron }
707edd16368SStephen M. Cameron 
708edd16368SStephen M. Cameron static ssize_t unique_id_show(struct device *dev,
709edd16368SStephen M. Cameron 	     struct device_attribute *attr, char *buf)
710edd16368SStephen M. Cameron {
711edd16368SStephen M. Cameron 	struct ctlr_info *h;
712edd16368SStephen M. Cameron 	struct scsi_device *sdev;
713edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *hdev;
714edd16368SStephen M. Cameron 	unsigned long flags;
715edd16368SStephen M. Cameron 	unsigned char sn[16];
716edd16368SStephen M. Cameron 
717edd16368SStephen M. Cameron 	sdev = to_scsi_device(dev);
718edd16368SStephen M. Cameron 	h = sdev_to_hba(sdev);
719edd16368SStephen M. Cameron 	spin_lock_irqsave(&h->lock, flags);
720edd16368SStephen M. Cameron 	hdev = sdev->hostdata;
721edd16368SStephen M. Cameron 	if (!hdev) {
722edd16368SStephen M. Cameron 		spin_unlock_irqrestore(&h->lock, flags);
723edd16368SStephen M. Cameron 		return -ENODEV;
724edd16368SStephen M. Cameron 	}
725edd16368SStephen M. Cameron 	memcpy(sn, hdev->device_id, sizeof(sn));
726edd16368SStephen M. Cameron 	spin_unlock_irqrestore(&h->lock, flags);
727edd16368SStephen M. Cameron 	return snprintf(buf, 16 * 2 + 2,
728edd16368SStephen M. Cameron 			"%02X%02X%02X%02X%02X%02X%02X%02X"
729edd16368SStephen M. Cameron 			"%02X%02X%02X%02X%02X%02X%02X%02X\n",
730edd16368SStephen M. Cameron 			sn[0], sn[1], sn[2], sn[3],
731edd16368SStephen M. Cameron 			sn[4], sn[5], sn[6], sn[7],
732edd16368SStephen M. Cameron 			sn[8], sn[9], sn[10], sn[11],
733edd16368SStephen M. Cameron 			sn[12], sn[13], sn[14], sn[15]);
734edd16368SStephen M. Cameron }
735edd16368SStephen M. Cameron 
736ded1be4aSJoseph T Handzik static ssize_t sas_address_show(struct device *dev,
737ded1be4aSJoseph T Handzik 	      struct device_attribute *attr, char *buf)
738ded1be4aSJoseph T Handzik {
739ded1be4aSJoseph T Handzik 	struct ctlr_info *h;
740ded1be4aSJoseph T Handzik 	struct scsi_device *sdev;
741ded1be4aSJoseph T Handzik 	struct hpsa_scsi_dev_t *hdev;
742ded1be4aSJoseph T Handzik 	unsigned long flags;
743ded1be4aSJoseph T Handzik 	u64 sas_address;
744ded1be4aSJoseph T Handzik 
745ded1be4aSJoseph T Handzik 	sdev = to_scsi_device(dev);
746ded1be4aSJoseph T Handzik 	h = sdev_to_hba(sdev);
747ded1be4aSJoseph T Handzik 	spin_lock_irqsave(&h->lock, flags);
748ded1be4aSJoseph T Handzik 	hdev = sdev->hostdata;
749ded1be4aSJoseph T Handzik 	if (!hdev || is_logical_device(hdev) || !hdev->expose_device) {
750ded1be4aSJoseph T Handzik 		spin_unlock_irqrestore(&h->lock, flags);
751ded1be4aSJoseph T Handzik 		return -ENODEV;
752ded1be4aSJoseph T Handzik 	}
753ded1be4aSJoseph T Handzik 	sas_address = hdev->sas_address;
754ded1be4aSJoseph T Handzik 	spin_unlock_irqrestore(&h->lock, flags);
755ded1be4aSJoseph T Handzik 
756ded1be4aSJoseph T Handzik 	return snprintf(buf, PAGE_SIZE, "0x%016llx\n", sas_address);
757ded1be4aSJoseph T Handzik }
758ded1be4aSJoseph T Handzik 
759c1988684SScott Teel static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev,
760c1988684SScott Teel 	     struct device_attribute *attr, char *buf)
761c1988684SScott Teel {
762c1988684SScott Teel 	struct ctlr_info *h;
763c1988684SScott Teel 	struct scsi_device *sdev;
764c1988684SScott Teel 	struct hpsa_scsi_dev_t *hdev;
765c1988684SScott Teel 	unsigned long flags;
766c1988684SScott Teel 	int offload_enabled;
767c1988684SScott Teel 
768c1988684SScott Teel 	sdev = to_scsi_device(dev);
769c1988684SScott Teel 	h = sdev_to_hba(sdev);
770c1988684SScott Teel 	spin_lock_irqsave(&h->lock, flags);
771c1988684SScott Teel 	hdev = sdev->hostdata;
772c1988684SScott Teel 	if (!hdev) {
773c1988684SScott Teel 		spin_unlock_irqrestore(&h->lock, flags);
774c1988684SScott Teel 		return -ENODEV;
775c1988684SScott Teel 	}
776c1988684SScott Teel 	offload_enabled = hdev->offload_enabled;
777c1988684SScott Teel 	spin_unlock_irqrestore(&h->lock, flags);
778c1988684SScott Teel 	return snprintf(buf, 20, "%d\n", offload_enabled);
779c1988684SScott Teel }
780c1988684SScott Teel 
7818270b862SJoe Handzik #define MAX_PATHS 8
7828270b862SJoe Handzik static ssize_t path_info_show(struct device *dev,
7838270b862SJoe Handzik 	     struct device_attribute *attr, char *buf)
7848270b862SJoe Handzik {
7858270b862SJoe Handzik 	struct ctlr_info *h;
7868270b862SJoe Handzik 	struct scsi_device *sdev;
7878270b862SJoe Handzik 	struct hpsa_scsi_dev_t *hdev;
7888270b862SJoe Handzik 	unsigned long flags;
7898270b862SJoe Handzik 	int i;
7908270b862SJoe Handzik 	int output_len = 0;
7918270b862SJoe Handzik 	u8 box;
7928270b862SJoe Handzik 	u8 bay;
7938270b862SJoe Handzik 	u8 path_map_index = 0;
7948270b862SJoe Handzik 	char *active;
7958270b862SJoe Handzik 	unsigned char phys_connector[2];
7968270b862SJoe Handzik 
7978270b862SJoe Handzik 	sdev = to_scsi_device(dev);
7988270b862SJoe Handzik 	h = sdev_to_hba(sdev);
7998270b862SJoe Handzik 	spin_lock_irqsave(&h->devlock, flags);
8008270b862SJoe Handzik 	hdev = sdev->hostdata;
8018270b862SJoe Handzik 	if (!hdev) {
8028270b862SJoe Handzik 		spin_unlock_irqrestore(&h->devlock, flags);
8038270b862SJoe Handzik 		return -ENODEV;
8048270b862SJoe Handzik 	}
8058270b862SJoe Handzik 
8068270b862SJoe Handzik 	bay = hdev->bay;
8078270b862SJoe Handzik 	for (i = 0; i < MAX_PATHS; i++) {
8088270b862SJoe Handzik 		path_map_index = 1<<i;
8098270b862SJoe Handzik 		if (i == hdev->active_path_index)
8108270b862SJoe Handzik 			active = "Active";
8118270b862SJoe Handzik 		else if (hdev->path_map & path_map_index)
8128270b862SJoe Handzik 			active = "Inactive";
8138270b862SJoe Handzik 		else
8148270b862SJoe Handzik 			continue;
8158270b862SJoe Handzik 
8161faf072cSRasmus Villemoes 		output_len += scnprintf(buf + output_len,
8171faf072cSRasmus Villemoes 				PAGE_SIZE - output_len,
8181faf072cSRasmus Villemoes 				"[%d:%d:%d:%d] %20.20s ",
8198270b862SJoe Handzik 				h->scsi_host->host_no,
8208270b862SJoe Handzik 				hdev->bus, hdev->target, hdev->lun,
8218270b862SJoe Handzik 				scsi_device_type(hdev->devtype));
8228270b862SJoe Handzik 
823cca8f13bSDon Brace 		if (hdev->devtype == TYPE_RAID || is_logical_device(hdev)) {
8242708f295SDon Brace 			output_len += scnprintf(buf + output_len,
8251faf072cSRasmus Villemoes 						PAGE_SIZE - output_len,
8261faf072cSRasmus Villemoes 						"%s\n", active);
8278270b862SJoe Handzik 			continue;
8288270b862SJoe Handzik 		}
8298270b862SJoe Handzik 
8308270b862SJoe Handzik 		box = hdev->box[i];
8318270b862SJoe Handzik 		memcpy(&phys_connector, &hdev->phys_connector[i],
8328270b862SJoe Handzik 			sizeof(phys_connector));
8338270b862SJoe Handzik 		if (phys_connector[0] < '0')
8348270b862SJoe Handzik 			phys_connector[0] = '0';
8358270b862SJoe Handzik 		if (phys_connector[1] < '0')
8368270b862SJoe Handzik 			phys_connector[1] = '0';
8372708f295SDon Brace 		output_len += scnprintf(buf + output_len,
8381faf072cSRasmus Villemoes 				PAGE_SIZE - output_len,
8398270b862SJoe Handzik 				"PORT: %.2s ",
8408270b862SJoe Handzik 				phys_connector);
841af15ed36SDon Brace 		if ((hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC) &&
842af15ed36SDon Brace 			hdev->expose_device) {
8438270b862SJoe Handzik 			if (box == 0 || box == 0xFF) {
8442708f295SDon Brace 				output_len += scnprintf(buf + output_len,
8451faf072cSRasmus Villemoes 					PAGE_SIZE - output_len,
8468270b862SJoe Handzik 					"BAY: %hhu %s\n",
8478270b862SJoe Handzik 					bay, active);
8488270b862SJoe Handzik 			} else {
8492708f295SDon Brace 				output_len += scnprintf(buf + output_len,
8501faf072cSRasmus Villemoes 					PAGE_SIZE - output_len,
8518270b862SJoe Handzik 					"BOX: %hhu BAY: %hhu %s\n",
8528270b862SJoe Handzik 					box, bay, active);
8538270b862SJoe Handzik 			}
8548270b862SJoe Handzik 		} else if (box != 0 && box != 0xFF) {
8552708f295SDon Brace 			output_len += scnprintf(buf + output_len,
8561faf072cSRasmus Villemoes 				PAGE_SIZE - output_len, "BOX: %hhu %s\n",
8578270b862SJoe Handzik 				box, active);
8588270b862SJoe Handzik 		} else
8592708f295SDon Brace 			output_len += scnprintf(buf + output_len,
8601faf072cSRasmus Villemoes 				PAGE_SIZE - output_len, "%s\n", active);
8618270b862SJoe Handzik 	}
8628270b862SJoe Handzik 
8638270b862SJoe Handzik 	spin_unlock_irqrestore(&h->devlock, flags);
8641faf072cSRasmus Villemoes 	return output_len;
8658270b862SJoe Handzik }
8668270b862SJoe Handzik 
8673f5eac3aSStephen M. Cameron static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
8683f5eac3aSStephen M. Cameron static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
8693f5eac3aSStephen M. Cameron static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
8703f5eac3aSStephen M. Cameron static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
871ded1be4aSJoseph T Handzik static DEVICE_ATTR(sas_address, S_IRUGO, sas_address_show, NULL);
872c1988684SScott Teel static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO,
873c1988684SScott Teel 			host_show_hp_ssd_smart_path_enabled, NULL);
8748270b862SJoe Handzik static DEVICE_ATTR(path_info, S_IRUGO, path_info_show, NULL);
875da0697bdSScott Teel static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH,
876da0697bdSScott Teel 		host_show_hp_ssd_smart_path_status,
877da0697bdSScott Teel 		host_store_hp_ssd_smart_path_status);
8782ba8bfc8SStephen M. Cameron static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL,
8792ba8bfc8SStephen M. Cameron 			host_store_raid_offload_debug);
8803f5eac3aSStephen M. Cameron static DEVICE_ATTR(firmware_revision, S_IRUGO,
8813f5eac3aSStephen M. Cameron 	host_show_firmware_revision, NULL);
8823f5eac3aSStephen M. Cameron static DEVICE_ATTR(commands_outstanding, S_IRUGO,
8833f5eac3aSStephen M. Cameron 	host_show_commands_outstanding, NULL);
8843f5eac3aSStephen M. Cameron static DEVICE_ATTR(transport_mode, S_IRUGO,
8853f5eac3aSStephen M. Cameron 	host_show_transport_mode, NULL);
886941b1cdaSStephen M. Cameron static DEVICE_ATTR(resettable, S_IRUGO,
887941b1cdaSStephen M. Cameron 	host_show_resettable, NULL);
888e985c58fSStephen Cameron static DEVICE_ATTR(lockup_detected, S_IRUGO,
889e985c58fSStephen Cameron 	host_show_lockup_detected, NULL);
8903f5eac3aSStephen M. Cameron 
8913f5eac3aSStephen M. Cameron static struct device_attribute *hpsa_sdev_attrs[] = {
8923f5eac3aSStephen M. Cameron 	&dev_attr_raid_level,
8933f5eac3aSStephen M. Cameron 	&dev_attr_lunid,
8943f5eac3aSStephen M. Cameron 	&dev_attr_unique_id,
895c1988684SScott Teel 	&dev_attr_hp_ssd_smart_path_enabled,
8968270b862SJoe Handzik 	&dev_attr_path_info,
897ded1be4aSJoseph T Handzik 	&dev_attr_sas_address,
8983f5eac3aSStephen M. Cameron 	NULL,
8993f5eac3aSStephen M. Cameron };
9003f5eac3aSStephen M. Cameron 
9013f5eac3aSStephen M. Cameron static struct device_attribute *hpsa_shost_attrs[] = {
9023f5eac3aSStephen M. Cameron 	&dev_attr_rescan,
9033f5eac3aSStephen M. Cameron 	&dev_attr_firmware_revision,
9043f5eac3aSStephen M. Cameron 	&dev_attr_commands_outstanding,
9053f5eac3aSStephen M. Cameron 	&dev_attr_transport_mode,
906941b1cdaSStephen M. Cameron 	&dev_attr_resettable,
907da0697bdSScott Teel 	&dev_attr_hp_ssd_smart_path_status,
9082ba8bfc8SStephen M. Cameron 	&dev_attr_raid_offload_debug,
909fb53c439STomas Henzl 	&dev_attr_lockup_detected,
9103f5eac3aSStephen M. Cameron 	NULL,
9113f5eac3aSStephen M. Cameron };
9123f5eac3aSStephen M. Cameron 
91341ce4c35SStephen Cameron #define HPSA_NRESERVED_CMDS	(HPSA_CMDS_RESERVED_FOR_ABORTS + \
91441ce4c35SStephen Cameron 		HPSA_CMDS_RESERVED_FOR_DRIVER + HPSA_MAX_CONCURRENT_PASSTHRUS)
91541ce4c35SStephen Cameron 
9163f5eac3aSStephen M. Cameron static struct scsi_host_template hpsa_driver_template = {
9173f5eac3aSStephen M. Cameron 	.module			= THIS_MODULE,
918f79cfec6SStephen M. Cameron 	.name			= HPSA,
919f79cfec6SStephen M. Cameron 	.proc_name		= HPSA,
9203f5eac3aSStephen M. Cameron 	.queuecommand		= hpsa_scsi_queue_command,
9213f5eac3aSStephen M. Cameron 	.scan_start		= hpsa_scan_start,
9223f5eac3aSStephen M. Cameron 	.scan_finished		= hpsa_scan_finished,
9237c0a0229SDon Brace 	.change_queue_depth	= hpsa_change_queue_depth,
9243f5eac3aSStephen M. Cameron 	.this_id		= -1,
9253f5eac3aSStephen M. Cameron 	.use_clustering		= ENABLE_CLUSTERING,
92675167d2cSStephen M. Cameron 	.eh_abort_handler	= hpsa_eh_abort_handler,
9273f5eac3aSStephen M. Cameron 	.eh_device_reset_handler = hpsa_eh_device_reset_handler,
9283f5eac3aSStephen M. Cameron 	.ioctl			= hpsa_ioctl,
9293f5eac3aSStephen M. Cameron 	.slave_alloc		= hpsa_slave_alloc,
93041ce4c35SStephen Cameron 	.slave_configure	= hpsa_slave_configure,
9313f5eac3aSStephen M. Cameron 	.slave_destroy		= hpsa_slave_destroy,
9323f5eac3aSStephen M. Cameron #ifdef CONFIG_COMPAT
9333f5eac3aSStephen M. Cameron 	.compat_ioctl		= hpsa_compat_ioctl,
9343f5eac3aSStephen M. Cameron #endif
9353f5eac3aSStephen M. Cameron 	.sdev_attrs = hpsa_sdev_attrs,
9363f5eac3aSStephen M. Cameron 	.shost_attrs = hpsa_shost_attrs,
937c0d6a4d1SStephen M. Cameron 	.max_sectors = 8192,
93854b2b50cSMartin K. Petersen 	.no_write_same = 1,
9393f5eac3aSStephen M. Cameron };
9403f5eac3aSStephen M. Cameron 
941254f796bSMatt Gates static inline u32 next_command(struct ctlr_info *h, u8 q)
9423f5eac3aSStephen M. Cameron {
9433f5eac3aSStephen M. Cameron 	u32 a;
944072b0518SStephen M. Cameron 	struct reply_queue_buffer *rq = &h->reply_queue[q];
9453f5eac3aSStephen M. Cameron 
946e1f7de0cSMatt Gates 	if (h->transMethod & CFGTBL_Trans_io_accel1)
947e1f7de0cSMatt Gates 		return h->access.command_completed(h, q);
948e1f7de0cSMatt Gates 
9493f5eac3aSStephen M. Cameron 	if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
950254f796bSMatt Gates 		return h->access.command_completed(h, q);
9513f5eac3aSStephen M. Cameron 
952254f796bSMatt Gates 	if ((rq->head[rq->current_entry] & 1) == rq->wraparound) {
953254f796bSMatt Gates 		a = rq->head[rq->current_entry];
954254f796bSMatt Gates 		rq->current_entry++;
9550cbf768eSStephen M. Cameron 		atomic_dec(&h->commands_outstanding);
9563f5eac3aSStephen M. Cameron 	} else {
9573f5eac3aSStephen M. Cameron 		a = FIFO_EMPTY;
9583f5eac3aSStephen M. Cameron 	}
9593f5eac3aSStephen M. Cameron 	/* Check for wraparound */
960254f796bSMatt Gates 	if (rq->current_entry == h->max_commands) {
961254f796bSMatt Gates 		rq->current_entry = 0;
962254f796bSMatt Gates 		rq->wraparound ^= 1;
9633f5eac3aSStephen M. Cameron 	}
9643f5eac3aSStephen M. Cameron 	return a;
9653f5eac3aSStephen M. Cameron }
9663f5eac3aSStephen M. Cameron 
967c349775eSScott Teel /*
968c349775eSScott Teel  * There are some special bits in the bus address of the
969c349775eSScott Teel  * command that we have to set for the controller to know
970c349775eSScott Teel  * how to process the command:
971c349775eSScott Teel  *
972c349775eSScott Teel  * Normal performant mode:
973c349775eSScott Teel  * bit 0: 1 means performant mode, 0 means simple mode.
974c349775eSScott Teel  * bits 1-3 = block fetch table entry
975c349775eSScott Teel  * bits 4-6 = command type (== 0)
976c349775eSScott Teel  *
977c349775eSScott Teel  * ioaccel1 mode:
978c349775eSScott Teel  * bit 0 = "performant mode" bit.
979c349775eSScott Teel  * bits 1-3 = block fetch table entry
980c349775eSScott Teel  * bits 4-6 = command type (== 110)
981c349775eSScott Teel  * (command type is needed because ioaccel1 mode
982c349775eSScott Teel  * commands are submitted through the same register as normal
983c349775eSScott Teel  * mode commands, so this is how the controller knows whether
984c349775eSScott Teel  * the command is normal mode or ioaccel1 mode.)
985c349775eSScott Teel  *
986c349775eSScott Teel  * ioaccel2 mode:
987c349775eSScott Teel  * bit 0 = "performant mode" bit.
988c349775eSScott Teel  * bits 1-4 = block fetch table entry (note extra bit)
989c349775eSScott Teel  * bits 4-6 = not needed, because ioaccel2 mode has
990c349775eSScott Teel  * a separate special register for submitting commands.
991c349775eSScott Teel  */
992c349775eSScott Teel 
99325163bd5SWebb Scales /*
99425163bd5SWebb Scales  * set_performant_mode: Modify the tag for cciss performant
9953f5eac3aSStephen M. Cameron  * set bit 0 for pull model, bits 3-1 for block fetch
9963f5eac3aSStephen M. Cameron  * register number
9973f5eac3aSStephen M. Cameron  */
99825163bd5SWebb Scales #define DEFAULT_REPLY_QUEUE (-1)
99925163bd5SWebb Scales static void set_performant_mode(struct ctlr_info *h, struct CommandList *c,
100025163bd5SWebb Scales 					int reply_queue)
10013f5eac3aSStephen M. Cameron {
1002254f796bSMatt Gates 	if (likely(h->transMethod & CFGTBL_Trans_Performant)) {
10033f5eac3aSStephen M. Cameron 		c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
100425163bd5SWebb Scales 		if (unlikely(!h->msix_vector))
100525163bd5SWebb Scales 			return;
100625163bd5SWebb Scales 		if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
1007254f796bSMatt Gates 			c->Header.ReplyQueue =
1008804a5cb5SJohn Kacur 				raw_smp_processor_id() % h->nreply_queues;
100925163bd5SWebb Scales 		else
101025163bd5SWebb Scales 			c->Header.ReplyQueue = reply_queue % h->nreply_queues;
1011254f796bSMatt Gates 	}
10123f5eac3aSStephen M. Cameron }
10133f5eac3aSStephen M. Cameron 
1014c349775eSScott Teel static void set_ioaccel1_performant_mode(struct ctlr_info *h,
101525163bd5SWebb Scales 						struct CommandList *c,
101625163bd5SWebb Scales 						int reply_queue)
1017c349775eSScott Teel {
1018c349775eSScott Teel 	struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
1019c349775eSScott Teel 
102025163bd5SWebb Scales 	/*
102125163bd5SWebb Scales 	 * Tell the controller to post the reply to the queue for this
1022c349775eSScott Teel 	 * processor.  This seems to give the best I/O throughput.
1023c349775eSScott Teel 	 */
102425163bd5SWebb Scales 	if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
1025c349775eSScott Teel 		cp->ReplyQueue = smp_processor_id() % h->nreply_queues;
102625163bd5SWebb Scales 	else
102725163bd5SWebb Scales 		cp->ReplyQueue = reply_queue % h->nreply_queues;
102825163bd5SWebb Scales 	/*
102925163bd5SWebb Scales 	 * Set the bits in the address sent down to include:
1030c349775eSScott Teel 	 *  - performant mode bit (bit 0)
1031c349775eSScott Teel 	 *  - pull count (bits 1-3)
1032c349775eSScott Teel 	 *  - command type (bits 4-6)
1033c349775eSScott Teel 	 */
1034c349775eSScott Teel 	c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) |
1035c349775eSScott Teel 					IOACCEL1_BUSADDR_CMDTYPE;
1036c349775eSScott Teel }
1037c349775eSScott Teel 
10388be986ccSStephen Cameron static void set_ioaccel2_tmf_performant_mode(struct ctlr_info *h,
10398be986ccSStephen Cameron 						struct CommandList *c,
10408be986ccSStephen Cameron 						int reply_queue)
10418be986ccSStephen Cameron {
10428be986ccSStephen Cameron 	struct hpsa_tmf_struct *cp = (struct hpsa_tmf_struct *)
10438be986ccSStephen Cameron 		&h->ioaccel2_cmd_pool[c->cmdindex];
10448be986ccSStephen Cameron 
10458be986ccSStephen Cameron 	/* Tell the controller to post the reply to the queue for this
10468be986ccSStephen Cameron 	 * processor.  This seems to give the best I/O throughput.
10478be986ccSStephen Cameron 	 */
10488be986ccSStephen Cameron 	if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
10498be986ccSStephen Cameron 		cp->reply_queue = smp_processor_id() % h->nreply_queues;
10508be986ccSStephen Cameron 	else
10518be986ccSStephen Cameron 		cp->reply_queue = reply_queue % h->nreply_queues;
10528be986ccSStephen Cameron 	/* Set the bits in the address sent down to include:
10538be986ccSStephen Cameron 	 *  - performant mode bit not used in ioaccel mode 2
10548be986ccSStephen Cameron 	 *  - pull count (bits 0-3)
10558be986ccSStephen Cameron 	 *  - command type isn't needed for ioaccel2
10568be986ccSStephen Cameron 	 */
10578be986ccSStephen Cameron 	c->busaddr |= h->ioaccel2_blockFetchTable[0];
10588be986ccSStephen Cameron }
10598be986ccSStephen Cameron 
1060c349775eSScott Teel static void set_ioaccel2_performant_mode(struct ctlr_info *h,
106125163bd5SWebb Scales 						struct CommandList *c,
106225163bd5SWebb Scales 						int reply_queue)
1063c349775eSScott Teel {
1064c349775eSScott Teel 	struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
1065c349775eSScott Teel 
106625163bd5SWebb Scales 	/*
106725163bd5SWebb Scales 	 * Tell the controller to post the reply to the queue for this
1068c349775eSScott Teel 	 * processor.  This seems to give the best I/O throughput.
1069c349775eSScott Teel 	 */
107025163bd5SWebb Scales 	if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
1071c349775eSScott Teel 		cp->reply_queue = smp_processor_id() % h->nreply_queues;
107225163bd5SWebb Scales 	else
107325163bd5SWebb Scales 		cp->reply_queue = reply_queue % h->nreply_queues;
107425163bd5SWebb Scales 	/*
107525163bd5SWebb Scales 	 * Set the bits in the address sent down to include:
1076c349775eSScott Teel 	 *  - performant mode bit not used in ioaccel mode 2
1077c349775eSScott Teel 	 *  - pull count (bits 0-3)
1078c349775eSScott Teel 	 *  - command type isn't needed for ioaccel2
1079c349775eSScott Teel 	 */
1080c349775eSScott Teel 	c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]);
1081c349775eSScott Teel }
1082c349775eSScott Teel 
1083e85c5974SStephen M. Cameron static int is_firmware_flash_cmd(u8 *cdb)
1084e85c5974SStephen M. Cameron {
1085e85c5974SStephen M. Cameron 	return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE;
1086e85c5974SStephen M. Cameron }
1087e85c5974SStephen M. Cameron 
1088e85c5974SStephen M. Cameron /*
1089e85c5974SStephen M. Cameron  * During firmware flash, the heartbeat register may not update as frequently
1090e85c5974SStephen M. Cameron  * as it should.  So we dial down lockup detection during firmware flash. and
1091e85c5974SStephen M. Cameron  * dial it back up when firmware flash completes.
1092e85c5974SStephen M. Cameron  */
1093e85c5974SStephen M. Cameron #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ)
1094e85c5974SStephen M. Cameron #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ)
1095e85c5974SStephen M. Cameron static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h,
1096e85c5974SStephen M. Cameron 		struct CommandList *c)
1097e85c5974SStephen M. Cameron {
1098e85c5974SStephen M. Cameron 	if (!is_firmware_flash_cmd(c->Request.CDB))
1099e85c5974SStephen M. Cameron 		return;
1100e85c5974SStephen M. Cameron 	atomic_inc(&h->firmware_flash_in_progress);
1101e85c5974SStephen M. Cameron 	h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH;
1102e85c5974SStephen M. Cameron }
1103e85c5974SStephen M. Cameron 
1104e85c5974SStephen M. Cameron static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h,
1105e85c5974SStephen M. Cameron 		struct CommandList *c)
1106e85c5974SStephen M. Cameron {
1107e85c5974SStephen M. Cameron 	if (is_firmware_flash_cmd(c->Request.CDB) &&
1108e85c5974SStephen M. Cameron 		atomic_dec_and_test(&h->firmware_flash_in_progress))
1109e85c5974SStephen M. Cameron 		h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
1110e85c5974SStephen M. Cameron }
1111e85c5974SStephen M. Cameron 
111225163bd5SWebb Scales static void __enqueue_cmd_and_start_io(struct ctlr_info *h,
111325163bd5SWebb Scales 	struct CommandList *c, int reply_queue)
11143f5eac3aSStephen M. Cameron {
1115c05e8866SStephen Cameron 	dial_down_lockup_detection_during_fw_flash(h, c);
1116c05e8866SStephen Cameron 	atomic_inc(&h->commands_outstanding);
1117c349775eSScott Teel 	switch (c->cmd_type) {
1118c349775eSScott Teel 	case CMD_IOACCEL1:
111925163bd5SWebb Scales 		set_ioaccel1_performant_mode(h, c, reply_queue);
1120c05e8866SStephen Cameron 		writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);
1121c349775eSScott Teel 		break;
1122c349775eSScott Teel 	case CMD_IOACCEL2:
112325163bd5SWebb Scales 		set_ioaccel2_performant_mode(h, c, reply_queue);
1124c05e8866SStephen Cameron 		writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
1125c349775eSScott Teel 		break;
11268be986ccSStephen Cameron 	case IOACCEL2_TMF:
11278be986ccSStephen Cameron 		set_ioaccel2_tmf_performant_mode(h, c, reply_queue);
11288be986ccSStephen Cameron 		writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
11298be986ccSStephen Cameron 		break;
1130c349775eSScott Teel 	default:
113125163bd5SWebb Scales 		set_performant_mode(h, c, reply_queue);
1132f2405db8SDon Brace 		h->access.submit_command(h, c);
11333f5eac3aSStephen M. Cameron 	}
1134c05e8866SStephen Cameron }
11353f5eac3aSStephen M. Cameron 
1136a58e7e53SWebb Scales static void enqueue_cmd_and_start_io(struct ctlr_info *h, struct CommandList *c)
113725163bd5SWebb Scales {
1138d604f533SWebb Scales 	if (unlikely(hpsa_is_pending_event(c)))
1139a58e7e53SWebb Scales 		return finish_cmd(c);
1140a58e7e53SWebb Scales 
114125163bd5SWebb Scales 	__enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE);
114225163bd5SWebb Scales }
114325163bd5SWebb Scales 
11443f5eac3aSStephen M. Cameron static inline int is_hba_lunid(unsigned char scsi3addr[])
11453f5eac3aSStephen M. Cameron {
11463f5eac3aSStephen M. Cameron 	return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
11473f5eac3aSStephen M. Cameron }
11483f5eac3aSStephen M. Cameron 
11493f5eac3aSStephen M. Cameron static inline int is_scsi_rev_5(struct ctlr_info *h)
11503f5eac3aSStephen M. Cameron {
11513f5eac3aSStephen M. Cameron 	if (!h->hba_inquiry_data)
11523f5eac3aSStephen M. Cameron 		return 0;
11533f5eac3aSStephen M. Cameron 	if ((h->hba_inquiry_data[2] & 0x07) == 5)
11543f5eac3aSStephen M. Cameron 		return 1;
11553f5eac3aSStephen M. Cameron 	return 0;
11563f5eac3aSStephen M. Cameron }
11573f5eac3aSStephen M. Cameron 
1158edd16368SStephen M. Cameron static int hpsa_find_target_lun(struct ctlr_info *h,
1159edd16368SStephen M. Cameron 	unsigned char scsi3addr[], int bus, int *target, int *lun)
1160edd16368SStephen M. Cameron {
1161edd16368SStephen M. Cameron 	/* finds an unused bus, target, lun for a new physical device
1162edd16368SStephen M. Cameron 	 * assumes h->devlock is held
1163edd16368SStephen M. Cameron 	 */
1164edd16368SStephen M. Cameron 	int i, found = 0;
1165cfe5badcSScott Teel 	DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
1166edd16368SStephen M. Cameron 
1167263d9401SAkinobu Mita 	bitmap_zero(lun_taken, HPSA_MAX_DEVICES);
1168edd16368SStephen M. Cameron 
1169edd16368SStephen M. Cameron 	for (i = 0; i < h->ndevices; i++) {
1170edd16368SStephen M. Cameron 		if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
1171263d9401SAkinobu Mita 			__set_bit(h->dev[i]->target, lun_taken);
1172edd16368SStephen M. Cameron 	}
1173edd16368SStephen M. Cameron 
1174263d9401SAkinobu Mita 	i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES);
1175263d9401SAkinobu Mita 	if (i < HPSA_MAX_DEVICES) {
1176edd16368SStephen M. Cameron 		/* *bus = 1; */
1177edd16368SStephen M. Cameron 		*target = i;
1178edd16368SStephen M. Cameron 		*lun = 0;
1179edd16368SStephen M. Cameron 		found = 1;
1180edd16368SStephen M. Cameron 	}
1181edd16368SStephen M. Cameron 	return !found;
1182edd16368SStephen M. Cameron }
1183edd16368SStephen M. Cameron 
11841d33d85dSDon Brace static void hpsa_show_dev_msg(const char *level, struct ctlr_info *h,
11850d96ef5fSWebb Scales 	struct hpsa_scsi_dev_t *dev, char *description)
11860d96ef5fSWebb Scales {
11877c59a0d4SDon Brace #define LABEL_SIZE 25
11887c59a0d4SDon Brace 	char label[LABEL_SIZE];
11897c59a0d4SDon Brace 
11909975ec9dSDon Brace 	if (h == NULL || h->pdev == NULL || h->scsi_host == NULL)
11919975ec9dSDon Brace 		return;
11929975ec9dSDon Brace 
11937c59a0d4SDon Brace 	switch (dev->devtype) {
11947c59a0d4SDon Brace 	case TYPE_RAID:
11957c59a0d4SDon Brace 		snprintf(label, LABEL_SIZE, "controller");
11967c59a0d4SDon Brace 		break;
11977c59a0d4SDon Brace 	case TYPE_ENCLOSURE:
11987c59a0d4SDon Brace 		snprintf(label, LABEL_SIZE, "enclosure");
11997c59a0d4SDon Brace 		break;
12007c59a0d4SDon Brace 	case TYPE_DISK:
1201af15ed36SDon Brace 	case TYPE_ZBC:
12027c59a0d4SDon Brace 		if (dev->external)
12037c59a0d4SDon Brace 			snprintf(label, LABEL_SIZE, "external");
12047c59a0d4SDon Brace 		else if (!is_logical_dev_addr_mode(dev->scsi3addr))
12057c59a0d4SDon Brace 			snprintf(label, LABEL_SIZE, "%s",
12067c59a0d4SDon Brace 				raid_label[PHYSICAL_DRIVE]);
12077c59a0d4SDon Brace 		else
12087c59a0d4SDon Brace 			snprintf(label, LABEL_SIZE, "RAID-%s",
12097c59a0d4SDon Brace 				dev->raid_level > RAID_UNKNOWN ? "?" :
12107c59a0d4SDon Brace 				raid_label[dev->raid_level]);
12117c59a0d4SDon Brace 		break;
12127c59a0d4SDon Brace 	case TYPE_ROM:
12137c59a0d4SDon Brace 		snprintf(label, LABEL_SIZE, "rom");
12147c59a0d4SDon Brace 		break;
12157c59a0d4SDon Brace 	case TYPE_TAPE:
12167c59a0d4SDon Brace 		snprintf(label, LABEL_SIZE, "tape");
12177c59a0d4SDon Brace 		break;
12187c59a0d4SDon Brace 	case TYPE_MEDIUM_CHANGER:
12197c59a0d4SDon Brace 		snprintf(label, LABEL_SIZE, "changer");
12207c59a0d4SDon Brace 		break;
12217c59a0d4SDon Brace 	default:
12227c59a0d4SDon Brace 		snprintf(label, LABEL_SIZE, "UNKNOWN");
12237c59a0d4SDon Brace 		break;
12247c59a0d4SDon Brace 	}
12257c59a0d4SDon Brace 
12260d96ef5fSWebb Scales 	dev_printk(level, &h->pdev->dev,
12277c59a0d4SDon Brace 			"scsi %d:%d:%d:%d: %s %s %.8s %.16s %s SSDSmartPathCap%c En%c Exp=%d\n",
12280d96ef5fSWebb Scales 			h->scsi_host->host_no, dev->bus, dev->target, dev->lun,
12290d96ef5fSWebb Scales 			description,
12300d96ef5fSWebb Scales 			scsi_device_type(dev->devtype),
12310d96ef5fSWebb Scales 			dev->vendor,
12320d96ef5fSWebb Scales 			dev->model,
12337c59a0d4SDon Brace 			label,
12340d96ef5fSWebb Scales 			dev->offload_config ? '+' : '-',
12350d96ef5fSWebb Scales 			dev->offload_enabled ? '+' : '-',
12362a168208SKevin Barnett 			dev->expose_device);
12370d96ef5fSWebb Scales }
12380d96ef5fSWebb Scales 
1239edd16368SStephen M. Cameron /* Add an entry into h->dev[] array. */
12408aa60681SDon Brace static int hpsa_scsi_add_entry(struct ctlr_info *h,
1241edd16368SStephen M. Cameron 		struct hpsa_scsi_dev_t *device,
1242edd16368SStephen M. Cameron 		struct hpsa_scsi_dev_t *added[], int *nadded)
1243edd16368SStephen M. Cameron {
1244edd16368SStephen M. Cameron 	/* assumes h->devlock is held */
1245edd16368SStephen M. Cameron 	int n = h->ndevices;
1246edd16368SStephen M. Cameron 	int i;
1247edd16368SStephen M. Cameron 	unsigned char addr1[8], addr2[8];
1248edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *sd;
1249edd16368SStephen M. Cameron 
1250cfe5badcSScott Teel 	if (n >= HPSA_MAX_DEVICES) {
1251edd16368SStephen M. Cameron 		dev_err(&h->pdev->dev, "too many devices, some will be "
1252edd16368SStephen M. Cameron 			"inaccessible.\n");
1253edd16368SStephen M. Cameron 		return -1;
1254edd16368SStephen M. Cameron 	}
1255edd16368SStephen M. Cameron 
1256edd16368SStephen M. Cameron 	/* physical devices do not have lun or target assigned until now. */
1257edd16368SStephen M. Cameron 	if (device->lun != -1)
1258edd16368SStephen M. Cameron 		/* Logical device, lun is already assigned. */
1259edd16368SStephen M. Cameron 		goto lun_assigned;
1260edd16368SStephen M. Cameron 
1261edd16368SStephen M. Cameron 	/* If this device a non-zero lun of a multi-lun device
1262edd16368SStephen M. Cameron 	 * byte 4 of the 8-byte LUN addr will contain the logical
12632b08b3e9SDon Brace 	 * unit no, zero otherwise.
1264edd16368SStephen M. Cameron 	 */
1265edd16368SStephen M. Cameron 	if (device->scsi3addr[4] == 0) {
1266edd16368SStephen M. Cameron 		/* This is not a non-zero lun of a multi-lun device */
1267edd16368SStephen M. Cameron 		if (hpsa_find_target_lun(h, device->scsi3addr,
1268edd16368SStephen M. Cameron 			device->bus, &device->target, &device->lun) != 0)
1269edd16368SStephen M. Cameron 			return -1;
1270edd16368SStephen M. Cameron 		goto lun_assigned;
1271edd16368SStephen M. Cameron 	}
1272edd16368SStephen M. Cameron 
1273edd16368SStephen M. Cameron 	/* This is a non-zero lun of a multi-lun device.
1274edd16368SStephen M. Cameron 	 * Search through our list and find the device which
12759a4178b7Sshane.seymour 	 * has the same 8 byte LUN address, excepting byte 4 and 5.
1276edd16368SStephen M. Cameron 	 * Assign the same bus and target for this new LUN.
1277edd16368SStephen M. Cameron 	 * Use the logical unit number from the firmware.
1278edd16368SStephen M. Cameron 	 */
1279edd16368SStephen M. Cameron 	memcpy(addr1, device->scsi3addr, 8);
1280edd16368SStephen M. Cameron 	addr1[4] = 0;
12819a4178b7Sshane.seymour 	addr1[5] = 0;
1282edd16368SStephen M. Cameron 	for (i = 0; i < n; i++) {
1283edd16368SStephen M. Cameron 		sd = h->dev[i];
1284edd16368SStephen M. Cameron 		memcpy(addr2, sd->scsi3addr, 8);
1285edd16368SStephen M. Cameron 		addr2[4] = 0;
12869a4178b7Sshane.seymour 		addr2[5] = 0;
12879a4178b7Sshane.seymour 		/* differ only in byte 4 and 5? */
1288edd16368SStephen M. Cameron 		if (memcmp(addr1, addr2, 8) == 0) {
1289edd16368SStephen M. Cameron 			device->bus = sd->bus;
1290edd16368SStephen M. Cameron 			device->target = sd->target;
1291edd16368SStephen M. Cameron 			device->lun = device->scsi3addr[4];
1292edd16368SStephen M. Cameron 			break;
1293edd16368SStephen M. Cameron 		}
1294edd16368SStephen M. Cameron 	}
1295edd16368SStephen M. Cameron 	if (device->lun == -1) {
1296edd16368SStephen M. Cameron 		dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
1297edd16368SStephen M. Cameron 			" suspect firmware bug or unsupported hardware "
1298edd16368SStephen M. Cameron 			"configuration.\n");
1299edd16368SStephen M. Cameron 			return -1;
1300edd16368SStephen M. Cameron 	}
1301edd16368SStephen M. Cameron 
1302edd16368SStephen M. Cameron lun_assigned:
1303edd16368SStephen M. Cameron 
1304edd16368SStephen M. Cameron 	h->dev[n] = device;
1305edd16368SStephen M. Cameron 	h->ndevices++;
1306edd16368SStephen M. Cameron 	added[*nadded] = device;
1307edd16368SStephen M. Cameron 	(*nadded)++;
13080d96ef5fSWebb Scales 	hpsa_show_dev_msg(KERN_INFO, h, device,
13092a168208SKevin Barnett 		device->expose_device ? "added" : "masked");
1310a473d86cSRobert Elliott 	device->offload_to_be_enabled = device->offload_enabled;
1311a473d86cSRobert Elliott 	device->offload_enabled = 0;
1312edd16368SStephen M. Cameron 	return 0;
1313edd16368SStephen M. Cameron }
1314edd16368SStephen M. Cameron 
1315bd9244f7SScott Teel /* Update an entry in h->dev[] array. */
13168aa60681SDon Brace static void hpsa_scsi_update_entry(struct ctlr_info *h,
1317bd9244f7SScott Teel 	int entry, struct hpsa_scsi_dev_t *new_entry)
1318bd9244f7SScott Teel {
1319a473d86cSRobert Elliott 	int offload_enabled;
1320bd9244f7SScott Teel 	/* assumes h->devlock is held */
1321bd9244f7SScott Teel 	BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1322bd9244f7SScott Teel 
1323bd9244f7SScott Teel 	/* Raid level changed. */
1324bd9244f7SScott Teel 	h->dev[entry]->raid_level = new_entry->raid_level;
1325250fb125SStephen M. Cameron 
132603383736SDon Brace 	/* Raid offload parameters changed.  Careful about the ordering. */
132703383736SDon Brace 	if (new_entry->offload_config && new_entry->offload_enabled) {
132803383736SDon Brace 		/*
132903383736SDon Brace 		 * if drive is newly offload_enabled, we want to copy the
133003383736SDon Brace 		 * raid map data first.  If previously offload_enabled and
133103383736SDon Brace 		 * offload_config were set, raid map data had better be
133203383736SDon Brace 		 * the same as it was before.  if raid map data is changed
133303383736SDon Brace 		 * then it had better be the case that
133403383736SDon Brace 		 * h->dev[entry]->offload_enabled is currently 0.
133503383736SDon Brace 		 */
13369fb0de2dSStephen M. Cameron 		h->dev[entry]->raid_map = new_entry->raid_map;
133703383736SDon Brace 		h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
133803383736SDon Brace 	}
1339a3144e0bSJoe Handzik 	if (new_entry->hba_ioaccel_enabled) {
1340a3144e0bSJoe Handzik 		h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1341a3144e0bSJoe Handzik 		wmb(); /* set ioaccel_handle *before* hba_ioaccel_enabled */
1342a3144e0bSJoe Handzik 	}
1343a3144e0bSJoe Handzik 	h->dev[entry]->hba_ioaccel_enabled = new_entry->hba_ioaccel_enabled;
134403383736SDon Brace 	h->dev[entry]->offload_config = new_entry->offload_config;
134503383736SDon Brace 	h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror;
134603383736SDon Brace 	h->dev[entry]->queue_depth = new_entry->queue_depth;
1347250fb125SStephen M. Cameron 
134841ce4c35SStephen Cameron 	/*
134941ce4c35SStephen Cameron 	 * We can turn off ioaccel offload now, but need to delay turning
135041ce4c35SStephen Cameron 	 * it on until we can update h->dev[entry]->phys_disk[], but we
135141ce4c35SStephen Cameron 	 * can't do that until all the devices are updated.
135241ce4c35SStephen Cameron 	 */
135341ce4c35SStephen Cameron 	h->dev[entry]->offload_to_be_enabled = new_entry->offload_enabled;
135441ce4c35SStephen Cameron 	if (!new_entry->offload_enabled)
135541ce4c35SStephen Cameron 		h->dev[entry]->offload_enabled = 0;
135641ce4c35SStephen Cameron 
1357a473d86cSRobert Elliott 	offload_enabled = h->dev[entry]->offload_enabled;
1358a473d86cSRobert Elliott 	h->dev[entry]->offload_enabled = h->dev[entry]->offload_to_be_enabled;
13590d96ef5fSWebb Scales 	hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated");
1360a473d86cSRobert Elliott 	h->dev[entry]->offload_enabled = offload_enabled;
1361bd9244f7SScott Teel }
1362bd9244f7SScott Teel 
13632a8ccf31SStephen M. Cameron /* Replace an entry from h->dev[] array. */
13648aa60681SDon Brace static void hpsa_scsi_replace_entry(struct ctlr_info *h,
13652a8ccf31SStephen M. Cameron 	int entry, struct hpsa_scsi_dev_t *new_entry,
13662a8ccf31SStephen M. Cameron 	struct hpsa_scsi_dev_t *added[], int *nadded,
13672a8ccf31SStephen M. Cameron 	struct hpsa_scsi_dev_t *removed[], int *nremoved)
13682a8ccf31SStephen M. Cameron {
13692a8ccf31SStephen M. Cameron 	/* assumes h->devlock is held */
1370cfe5badcSScott Teel 	BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
13712a8ccf31SStephen M. Cameron 	removed[*nremoved] = h->dev[entry];
13722a8ccf31SStephen M. Cameron 	(*nremoved)++;
137301350d05SStephen M. Cameron 
137401350d05SStephen M. Cameron 	/*
137501350d05SStephen M. Cameron 	 * New physical devices won't have target/lun assigned yet
137601350d05SStephen M. Cameron 	 * so we need to preserve the values in the slot we are replacing.
137701350d05SStephen M. Cameron 	 */
137801350d05SStephen M. Cameron 	if (new_entry->target == -1) {
137901350d05SStephen M. Cameron 		new_entry->target = h->dev[entry]->target;
138001350d05SStephen M. Cameron 		new_entry->lun = h->dev[entry]->lun;
138101350d05SStephen M. Cameron 	}
138201350d05SStephen M. Cameron 
13832a8ccf31SStephen M. Cameron 	h->dev[entry] = new_entry;
13842a8ccf31SStephen M. Cameron 	added[*nadded] = new_entry;
13852a8ccf31SStephen M. Cameron 	(*nadded)++;
13860d96ef5fSWebb Scales 	hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced");
1387a473d86cSRobert Elliott 	new_entry->offload_to_be_enabled = new_entry->offload_enabled;
1388a473d86cSRobert Elliott 	new_entry->offload_enabled = 0;
13892a8ccf31SStephen M. Cameron }
13902a8ccf31SStephen M. Cameron 
1391edd16368SStephen M. Cameron /* Remove an entry from h->dev[] array. */
13928aa60681SDon Brace static void hpsa_scsi_remove_entry(struct ctlr_info *h, int entry,
1393edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *removed[], int *nremoved)
1394edd16368SStephen M. Cameron {
1395edd16368SStephen M. Cameron 	/* assumes h->devlock is held */
1396edd16368SStephen M. Cameron 	int i;
1397edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *sd;
1398edd16368SStephen M. Cameron 
1399cfe5badcSScott Teel 	BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1400edd16368SStephen M. Cameron 
1401edd16368SStephen M. Cameron 	sd = h->dev[entry];
1402edd16368SStephen M. Cameron 	removed[*nremoved] = h->dev[entry];
1403edd16368SStephen M. Cameron 	(*nremoved)++;
1404edd16368SStephen M. Cameron 
1405edd16368SStephen M. Cameron 	for (i = entry; i < h->ndevices-1; i++)
1406edd16368SStephen M. Cameron 		h->dev[i] = h->dev[i+1];
1407edd16368SStephen M. Cameron 	h->ndevices--;
14080d96ef5fSWebb Scales 	hpsa_show_dev_msg(KERN_INFO, h, sd, "removed");
1409edd16368SStephen M. Cameron }
1410edd16368SStephen M. Cameron 
1411edd16368SStephen M. Cameron #define SCSI3ADDR_EQ(a, b) ( \
1412edd16368SStephen M. Cameron 	(a)[7] == (b)[7] && \
1413edd16368SStephen M. Cameron 	(a)[6] == (b)[6] && \
1414edd16368SStephen M. Cameron 	(a)[5] == (b)[5] && \
1415edd16368SStephen M. Cameron 	(a)[4] == (b)[4] && \
1416edd16368SStephen M. Cameron 	(a)[3] == (b)[3] && \
1417edd16368SStephen M. Cameron 	(a)[2] == (b)[2] && \
1418edd16368SStephen M. Cameron 	(a)[1] == (b)[1] && \
1419edd16368SStephen M. Cameron 	(a)[0] == (b)[0])
1420edd16368SStephen M. Cameron 
1421edd16368SStephen M. Cameron static void fixup_botched_add(struct ctlr_info *h,
1422edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *added)
1423edd16368SStephen M. Cameron {
1424edd16368SStephen M. Cameron 	/* called when scsi_add_device fails in order to re-adjust
1425edd16368SStephen M. Cameron 	 * h->dev[] to match the mid layer's view.
1426edd16368SStephen M. Cameron 	 */
1427edd16368SStephen M. Cameron 	unsigned long flags;
1428edd16368SStephen M. Cameron 	int i, j;
1429edd16368SStephen M. Cameron 
1430edd16368SStephen M. Cameron 	spin_lock_irqsave(&h->lock, flags);
1431edd16368SStephen M. Cameron 	for (i = 0; i < h->ndevices; i++) {
1432edd16368SStephen M. Cameron 		if (h->dev[i] == added) {
1433edd16368SStephen M. Cameron 			for (j = i; j < h->ndevices-1; j++)
1434edd16368SStephen M. Cameron 				h->dev[j] = h->dev[j+1];
1435edd16368SStephen M. Cameron 			h->ndevices--;
1436edd16368SStephen M. Cameron 			break;
1437edd16368SStephen M. Cameron 		}
1438edd16368SStephen M. Cameron 	}
1439edd16368SStephen M. Cameron 	spin_unlock_irqrestore(&h->lock, flags);
1440edd16368SStephen M. Cameron 	kfree(added);
1441edd16368SStephen M. Cameron }
1442edd16368SStephen M. Cameron 
1443edd16368SStephen M. Cameron static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
1444edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *dev2)
1445edd16368SStephen M. Cameron {
1446edd16368SStephen M. Cameron 	/* we compare everything except lun and target as these
1447edd16368SStephen M. Cameron 	 * are not yet assigned.  Compare parts likely
1448edd16368SStephen M. Cameron 	 * to differ first
1449edd16368SStephen M. Cameron 	 */
1450edd16368SStephen M. Cameron 	if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
1451edd16368SStephen M. Cameron 		sizeof(dev1->scsi3addr)) != 0)
1452edd16368SStephen M. Cameron 		return 0;
1453edd16368SStephen M. Cameron 	if (memcmp(dev1->device_id, dev2->device_id,
1454edd16368SStephen M. Cameron 		sizeof(dev1->device_id)) != 0)
1455edd16368SStephen M. Cameron 		return 0;
1456edd16368SStephen M. Cameron 	if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
1457edd16368SStephen M. Cameron 		return 0;
1458edd16368SStephen M. Cameron 	if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
1459edd16368SStephen M. Cameron 		return 0;
1460edd16368SStephen M. Cameron 	if (dev1->devtype != dev2->devtype)
1461edd16368SStephen M. Cameron 		return 0;
1462edd16368SStephen M. Cameron 	if (dev1->bus != dev2->bus)
1463edd16368SStephen M. Cameron 		return 0;
1464edd16368SStephen M. Cameron 	return 1;
1465edd16368SStephen M. Cameron }
1466edd16368SStephen M. Cameron 
1467bd9244f7SScott Teel static inline int device_updated(struct hpsa_scsi_dev_t *dev1,
1468bd9244f7SScott Teel 	struct hpsa_scsi_dev_t *dev2)
1469bd9244f7SScott Teel {
1470bd9244f7SScott Teel 	/* Device attributes that can change, but don't mean
1471bd9244f7SScott Teel 	 * that the device is a different device, nor that the OS
1472bd9244f7SScott Teel 	 * needs to be told anything about the change.
1473bd9244f7SScott Teel 	 */
1474bd9244f7SScott Teel 	if (dev1->raid_level != dev2->raid_level)
1475bd9244f7SScott Teel 		return 1;
1476250fb125SStephen M. Cameron 	if (dev1->offload_config != dev2->offload_config)
1477250fb125SStephen M. Cameron 		return 1;
1478250fb125SStephen M. Cameron 	if (dev1->offload_enabled != dev2->offload_enabled)
1479250fb125SStephen M. Cameron 		return 1;
148093849508SDon Brace 	if (!is_logical_dev_addr_mode(dev1->scsi3addr))
148103383736SDon Brace 		if (dev1->queue_depth != dev2->queue_depth)
148203383736SDon Brace 			return 1;
1483bd9244f7SScott Teel 	return 0;
1484bd9244f7SScott Teel }
1485bd9244f7SScott Teel 
1486edd16368SStephen M. Cameron /* Find needle in haystack.  If exact match found, return DEVICE_SAME,
1487edd16368SStephen M. Cameron  * and return needle location in *index.  If scsi3addr matches, but not
1488edd16368SStephen M. Cameron  * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
1489bd9244f7SScott Teel  * location in *index.
1490bd9244f7SScott Teel  * In the case of a minor device attribute change, such as RAID level, just
1491bd9244f7SScott Teel  * return DEVICE_UPDATED, along with the updated device's location in index.
1492bd9244f7SScott Teel  * If needle not found, return DEVICE_NOT_FOUND.
1493edd16368SStephen M. Cameron  */
1494edd16368SStephen M. Cameron static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
1495edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *haystack[], int haystack_size,
1496edd16368SStephen M. Cameron 	int *index)
1497edd16368SStephen M. Cameron {
1498edd16368SStephen M. Cameron 	int i;
1499edd16368SStephen M. Cameron #define DEVICE_NOT_FOUND 0
1500edd16368SStephen M. Cameron #define DEVICE_CHANGED 1
1501edd16368SStephen M. Cameron #define DEVICE_SAME 2
1502bd9244f7SScott Teel #define DEVICE_UPDATED 3
15031d33d85dSDon Brace 	if (needle == NULL)
15041d33d85dSDon Brace 		return DEVICE_NOT_FOUND;
15051d33d85dSDon Brace 
1506edd16368SStephen M. Cameron 	for (i = 0; i < haystack_size; i++) {
150723231048SStephen M. Cameron 		if (haystack[i] == NULL) /* previously removed. */
150823231048SStephen M. Cameron 			continue;
1509edd16368SStephen M. Cameron 		if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
1510edd16368SStephen M. Cameron 			*index = i;
1511bd9244f7SScott Teel 			if (device_is_the_same(needle, haystack[i])) {
1512bd9244f7SScott Teel 				if (device_updated(needle, haystack[i]))
1513bd9244f7SScott Teel 					return DEVICE_UPDATED;
1514edd16368SStephen M. Cameron 				return DEVICE_SAME;
1515bd9244f7SScott Teel 			} else {
15169846590eSStephen M. Cameron 				/* Keep offline devices offline */
15179846590eSStephen M. Cameron 				if (needle->volume_offline)
15189846590eSStephen M. Cameron 					return DEVICE_NOT_FOUND;
1519edd16368SStephen M. Cameron 				return DEVICE_CHANGED;
1520edd16368SStephen M. Cameron 			}
1521edd16368SStephen M. Cameron 		}
1522bd9244f7SScott Teel 	}
1523edd16368SStephen M. Cameron 	*index = -1;
1524edd16368SStephen M. Cameron 	return DEVICE_NOT_FOUND;
1525edd16368SStephen M. Cameron }
1526edd16368SStephen M. Cameron 
15279846590eSStephen M. Cameron static void hpsa_monitor_offline_device(struct ctlr_info *h,
15289846590eSStephen M. Cameron 					unsigned char scsi3addr[])
15299846590eSStephen M. Cameron {
15309846590eSStephen M. Cameron 	struct offline_device_entry *device;
15319846590eSStephen M. Cameron 	unsigned long flags;
15329846590eSStephen M. Cameron 
15339846590eSStephen M. Cameron 	/* Check to see if device is already on the list */
15349846590eSStephen M. Cameron 	spin_lock_irqsave(&h->offline_device_lock, flags);
15359846590eSStephen M. Cameron 	list_for_each_entry(device, &h->offline_device_list, offline_list) {
15369846590eSStephen M. Cameron 		if (memcmp(device->scsi3addr, scsi3addr,
15379846590eSStephen M. Cameron 			sizeof(device->scsi3addr)) == 0) {
15389846590eSStephen M. Cameron 			spin_unlock_irqrestore(&h->offline_device_lock, flags);
15399846590eSStephen M. Cameron 			return;
15409846590eSStephen M. Cameron 		}
15419846590eSStephen M. Cameron 	}
15429846590eSStephen M. Cameron 	spin_unlock_irqrestore(&h->offline_device_lock, flags);
15439846590eSStephen M. Cameron 
15449846590eSStephen M. Cameron 	/* Device is not on the list, add it. */
15459846590eSStephen M. Cameron 	device = kmalloc(sizeof(*device), GFP_KERNEL);
15469846590eSStephen M. Cameron 	if (!device) {
15479846590eSStephen M. Cameron 		dev_warn(&h->pdev->dev, "out of memory in %s\n", __func__);
15489846590eSStephen M. Cameron 		return;
15499846590eSStephen M. Cameron 	}
15509846590eSStephen M. Cameron 	memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr));
15519846590eSStephen M. Cameron 	spin_lock_irqsave(&h->offline_device_lock, flags);
15529846590eSStephen M. Cameron 	list_add_tail(&device->offline_list, &h->offline_device_list);
15539846590eSStephen M. Cameron 	spin_unlock_irqrestore(&h->offline_device_lock, flags);
15549846590eSStephen M. Cameron }
15559846590eSStephen M. Cameron 
15569846590eSStephen M. Cameron /* Print a message explaining various offline volume states */
15579846590eSStephen M. Cameron static void hpsa_show_volume_status(struct ctlr_info *h,
15589846590eSStephen M. Cameron 	struct hpsa_scsi_dev_t *sd)
15599846590eSStephen M. Cameron {
15609846590eSStephen M. Cameron 	if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED)
15619846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
15629846590eSStephen M. Cameron 			"C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n",
15639846590eSStephen M. Cameron 			h->scsi_host->host_no,
15649846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
15659846590eSStephen M. Cameron 	switch (sd->volume_offline) {
15669846590eSStephen M. Cameron 	case HPSA_LV_OK:
15679846590eSStephen M. Cameron 		break;
15689846590eSStephen M. Cameron 	case HPSA_LV_UNDERGOING_ERASE:
15699846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
15709846590eSStephen M. Cameron 			"C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n",
15719846590eSStephen M. Cameron 			h->scsi_host->host_no,
15729846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
15739846590eSStephen M. Cameron 		break;
15745ca01204SScott Benesh 	case HPSA_LV_NOT_AVAILABLE:
15755ca01204SScott Benesh 		dev_info(&h->pdev->dev,
15765ca01204SScott Benesh 			"C%d:B%d:T%d:L%d Volume is waiting for transforming volume.\n",
15775ca01204SScott Benesh 			h->scsi_host->host_no,
15785ca01204SScott Benesh 			sd->bus, sd->target, sd->lun);
15795ca01204SScott Benesh 		break;
15809846590eSStephen M. Cameron 	case HPSA_LV_UNDERGOING_RPI:
15819846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
15825ca01204SScott Benesh 			"C%d:B%d:T%d:L%d Volume is undergoing rapid parity init.\n",
15839846590eSStephen M. Cameron 			h->scsi_host->host_no,
15849846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
15859846590eSStephen M. Cameron 		break;
15869846590eSStephen M. Cameron 	case HPSA_LV_PENDING_RPI:
15879846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
15889846590eSStephen M. Cameron 			"C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n",
15899846590eSStephen M. Cameron 			h->scsi_host->host_no,
15909846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
15919846590eSStephen M. Cameron 		break;
15929846590eSStephen M. Cameron 	case HPSA_LV_ENCRYPTED_NO_KEY:
15939846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
15949846590eSStephen M. Cameron 			"C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n",
15959846590eSStephen M. Cameron 			h->scsi_host->host_no,
15969846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
15979846590eSStephen M. Cameron 		break;
15989846590eSStephen M. Cameron 	case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
15999846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
16009846590eSStephen M. Cameron 			"C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n",
16019846590eSStephen M. Cameron 			h->scsi_host->host_no,
16029846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
16039846590eSStephen M. Cameron 		break;
16049846590eSStephen M. Cameron 	case HPSA_LV_UNDERGOING_ENCRYPTION:
16059846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
16069846590eSStephen M. Cameron 			"C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n",
16079846590eSStephen M. Cameron 			h->scsi_host->host_no,
16089846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
16099846590eSStephen M. Cameron 		break;
16109846590eSStephen M. Cameron 	case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
16119846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
16129846590eSStephen M. Cameron 			"C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n",
16139846590eSStephen M. Cameron 			h->scsi_host->host_no,
16149846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
16159846590eSStephen M. Cameron 		break;
16169846590eSStephen M. Cameron 	case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
16179846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
16189846590eSStephen M. Cameron 			"C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n",
16199846590eSStephen M. Cameron 			h->scsi_host->host_no,
16209846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
16219846590eSStephen M. Cameron 		break;
16229846590eSStephen M. Cameron 	case HPSA_LV_PENDING_ENCRYPTION:
16239846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
16249846590eSStephen M. Cameron 			"C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n",
16259846590eSStephen M. Cameron 			h->scsi_host->host_no,
16269846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
16279846590eSStephen M. Cameron 		break;
16289846590eSStephen M. Cameron 	case HPSA_LV_PENDING_ENCRYPTION_REKEYING:
16299846590eSStephen M. Cameron 		dev_info(&h->pdev->dev,
16309846590eSStephen M. Cameron 			"C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n",
16319846590eSStephen M. Cameron 			h->scsi_host->host_no,
16329846590eSStephen M. Cameron 			sd->bus, sd->target, sd->lun);
16339846590eSStephen M. Cameron 		break;
16349846590eSStephen M. Cameron 	}
16359846590eSStephen M. Cameron }
16369846590eSStephen M. Cameron 
163703383736SDon Brace /*
163803383736SDon Brace  * Figure the list of physical drive pointers for a logical drive with
163903383736SDon Brace  * raid offload configured.
164003383736SDon Brace  */
164103383736SDon Brace static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h,
164203383736SDon Brace 				struct hpsa_scsi_dev_t *dev[], int ndevices,
164303383736SDon Brace 				struct hpsa_scsi_dev_t *logical_drive)
164403383736SDon Brace {
164503383736SDon Brace 	struct raid_map_data *map = &logical_drive->raid_map;
164603383736SDon Brace 	struct raid_map_disk_data *dd = &map->data[0];
164703383736SDon Brace 	int i, j;
164803383736SDon Brace 	int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
164903383736SDon Brace 				le16_to_cpu(map->metadata_disks_per_row);
165003383736SDon Brace 	int nraid_map_entries = le16_to_cpu(map->row_cnt) *
165103383736SDon Brace 				le16_to_cpu(map->layout_map_count) *
165203383736SDon Brace 				total_disks_per_row;
165303383736SDon Brace 	int nphys_disk = le16_to_cpu(map->layout_map_count) *
165403383736SDon Brace 				total_disks_per_row;
165503383736SDon Brace 	int qdepth;
165603383736SDon Brace 
165703383736SDon Brace 	if (nraid_map_entries > RAID_MAP_MAX_ENTRIES)
165803383736SDon Brace 		nraid_map_entries = RAID_MAP_MAX_ENTRIES;
165903383736SDon Brace 
1660d604f533SWebb Scales 	logical_drive->nphysical_disks = nraid_map_entries;
1661d604f533SWebb Scales 
166203383736SDon Brace 	qdepth = 0;
166303383736SDon Brace 	for (i = 0; i < nraid_map_entries; i++) {
166403383736SDon Brace 		logical_drive->phys_disk[i] = NULL;
166503383736SDon Brace 		if (!logical_drive->offload_config)
166603383736SDon Brace 			continue;
166703383736SDon Brace 		for (j = 0; j < ndevices; j++) {
16681d33d85dSDon Brace 			if (dev[j] == NULL)
16691d33d85dSDon Brace 				continue;
1670ff615f06SPetros Koutoupis 			if (dev[j]->devtype != TYPE_DISK &&
1671ff615f06SPetros Koutoupis 			    dev[j]->devtype != TYPE_ZBC)
1672af15ed36SDon Brace 				continue;
1673f3f01730SKevin Barnett 			if (is_logical_device(dev[j]))
167403383736SDon Brace 				continue;
167503383736SDon Brace 			if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle)
167603383736SDon Brace 				continue;
167703383736SDon Brace 
167803383736SDon Brace 			logical_drive->phys_disk[i] = dev[j];
167903383736SDon Brace 			if (i < nphys_disk)
168003383736SDon Brace 				qdepth = min(h->nr_cmds, qdepth +
168103383736SDon Brace 				    logical_drive->phys_disk[i]->queue_depth);
168203383736SDon Brace 			break;
168303383736SDon Brace 		}
168403383736SDon Brace 
168503383736SDon Brace 		/*
168603383736SDon Brace 		 * This can happen if a physical drive is removed and
168703383736SDon Brace 		 * the logical drive is degraded.  In that case, the RAID
168803383736SDon Brace 		 * map data will refer to a physical disk which isn't actually
168903383736SDon Brace 		 * present.  And in that case offload_enabled should already
169003383736SDon Brace 		 * be 0, but we'll turn it off here just in case
169103383736SDon Brace 		 */
169203383736SDon Brace 		if (!logical_drive->phys_disk[i]) {
169303383736SDon Brace 			logical_drive->offload_enabled = 0;
169441ce4c35SStephen Cameron 			logical_drive->offload_to_be_enabled = 0;
169541ce4c35SStephen Cameron 			logical_drive->queue_depth = 8;
169603383736SDon Brace 		}
169703383736SDon Brace 	}
169803383736SDon Brace 	if (nraid_map_entries)
169903383736SDon Brace 		/*
170003383736SDon Brace 		 * This is correct for reads, too high for full stripe writes,
170103383736SDon Brace 		 * way too high for partial stripe writes
170203383736SDon Brace 		 */
170303383736SDon Brace 		logical_drive->queue_depth = qdepth;
170403383736SDon Brace 	else
170503383736SDon Brace 		logical_drive->queue_depth = h->nr_cmds;
170603383736SDon Brace }
170703383736SDon Brace 
170803383736SDon Brace static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h,
170903383736SDon Brace 				struct hpsa_scsi_dev_t *dev[], int ndevices)
171003383736SDon Brace {
171103383736SDon Brace 	int i;
171203383736SDon Brace 
171303383736SDon Brace 	for (i = 0; i < ndevices; i++) {
17141d33d85dSDon Brace 		if (dev[i] == NULL)
17151d33d85dSDon Brace 			continue;
1716ff615f06SPetros Koutoupis 		if (dev[i]->devtype != TYPE_DISK &&
1717ff615f06SPetros Koutoupis 		    dev[i]->devtype != TYPE_ZBC)
1718af15ed36SDon Brace 			continue;
1719f3f01730SKevin Barnett 		if (!is_logical_device(dev[i]))
172003383736SDon Brace 			continue;
172141ce4c35SStephen Cameron 
172241ce4c35SStephen Cameron 		/*
172341ce4c35SStephen Cameron 		 * If offload is currently enabled, the RAID map and
172441ce4c35SStephen Cameron 		 * phys_disk[] assignment *better* not be changing
172541ce4c35SStephen Cameron 		 * and since it isn't changing, we do not need to
172641ce4c35SStephen Cameron 		 * update it.
172741ce4c35SStephen Cameron 		 */
172841ce4c35SStephen Cameron 		if (dev[i]->offload_enabled)
172941ce4c35SStephen Cameron 			continue;
173041ce4c35SStephen Cameron 
173103383736SDon Brace 		hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]);
173203383736SDon Brace 	}
173303383736SDon Brace }
173403383736SDon Brace 
1735096ccff4SKevin Barnett static int hpsa_add_device(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
1736096ccff4SKevin Barnett {
1737096ccff4SKevin Barnett 	int rc = 0;
1738096ccff4SKevin Barnett 
1739096ccff4SKevin Barnett 	if (!h->scsi_host)
1740096ccff4SKevin Barnett 		return 1;
1741096ccff4SKevin Barnett 
1742d04e62b9SKevin Barnett 	if (is_logical_device(device)) /* RAID */
1743096ccff4SKevin Barnett 		rc = scsi_add_device(h->scsi_host, device->bus,
1744096ccff4SKevin Barnett 					device->target, device->lun);
1745d04e62b9SKevin Barnett 	else /* HBA */
1746d04e62b9SKevin Barnett 		rc = hpsa_add_sas_device(h->sas_host, device);
1747d04e62b9SKevin Barnett 
1748096ccff4SKevin Barnett 	return rc;
1749096ccff4SKevin Barnett }
1750096ccff4SKevin Barnett 
1751ba74fdc4SDon Brace static int hpsa_find_outstanding_commands_for_dev(struct ctlr_info *h,
1752ba74fdc4SDon Brace 						struct hpsa_scsi_dev_t *dev)
1753ba74fdc4SDon Brace {
1754ba74fdc4SDon Brace 	int i;
1755ba74fdc4SDon Brace 	int count = 0;
1756ba74fdc4SDon Brace 
1757ba74fdc4SDon Brace 	for (i = 0; i < h->nr_cmds; i++) {
1758ba74fdc4SDon Brace 		struct CommandList *c = h->cmd_pool + i;
1759ba74fdc4SDon Brace 		int refcount = atomic_inc_return(&c->refcount);
1760ba74fdc4SDon Brace 
1761ba74fdc4SDon Brace 		if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev,
1762ba74fdc4SDon Brace 				dev->scsi3addr)) {
1763ba74fdc4SDon Brace 			unsigned long flags;
1764ba74fdc4SDon Brace 
1765ba74fdc4SDon Brace 			spin_lock_irqsave(&h->lock, flags);	/* Implied MB */
1766ba74fdc4SDon Brace 			if (!hpsa_is_cmd_idle(c))
1767ba74fdc4SDon Brace 				++count;
1768ba74fdc4SDon Brace 			spin_unlock_irqrestore(&h->lock, flags);
1769ba74fdc4SDon Brace 		}
1770ba74fdc4SDon Brace 
1771ba74fdc4SDon Brace 		cmd_free(h, c);
1772ba74fdc4SDon Brace 	}
1773ba74fdc4SDon Brace 
1774ba74fdc4SDon Brace 	return count;
1775ba74fdc4SDon Brace }
1776ba74fdc4SDon Brace 
1777ba74fdc4SDon Brace static void hpsa_wait_for_outstanding_commands_for_dev(struct ctlr_info *h,
1778ba74fdc4SDon Brace 						struct hpsa_scsi_dev_t *device)
1779ba74fdc4SDon Brace {
1780ba74fdc4SDon Brace 	int cmds = 0;
1781ba74fdc4SDon Brace 	int waits = 0;
1782ba74fdc4SDon Brace 
1783ba74fdc4SDon Brace 	while (1) {
1784ba74fdc4SDon Brace 		cmds = hpsa_find_outstanding_commands_for_dev(h, device);
1785ba74fdc4SDon Brace 		if (cmds == 0)
1786ba74fdc4SDon Brace 			break;
1787ba74fdc4SDon Brace 		if (++waits > 20)
1788ba74fdc4SDon Brace 			break;
1789ba74fdc4SDon Brace 		dev_warn(&h->pdev->dev,
1790ba74fdc4SDon Brace 			"%s: removing device with %d outstanding commands!\n",
1791ba74fdc4SDon Brace 			__func__, cmds);
1792ba74fdc4SDon Brace 		msleep(1000);
1793ba74fdc4SDon Brace 	}
1794ba74fdc4SDon Brace }
1795ba74fdc4SDon Brace 
1796096ccff4SKevin Barnett static void hpsa_remove_device(struct ctlr_info *h,
1797096ccff4SKevin Barnett 			struct hpsa_scsi_dev_t *device)
1798096ccff4SKevin Barnett {
1799096ccff4SKevin Barnett 	struct scsi_device *sdev = NULL;
1800096ccff4SKevin Barnett 
1801096ccff4SKevin Barnett 	if (!h->scsi_host)
1802096ccff4SKevin Barnett 		return;
1803096ccff4SKevin Barnett 
1804d04e62b9SKevin Barnett 	if (is_logical_device(device)) { /* RAID */
1805096ccff4SKevin Barnett 		sdev = scsi_device_lookup(h->scsi_host, device->bus,
1806096ccff4SKevin Barnett 						device->target, device->lun);
1807096ccff4SKevin Barnett 		if (sdev) {
1808096ccff4SKevin Barnett 			scsi_remove_device(sdev);
1809096ccff4SKevin Barnett 			scsi_device_put(sdev);
1810096ccff4SKevin Barnett 		} else {
1811096ccff4SKevin Barnett 			/*
1812096ccff4SKevin Barnett 			 * We don't expect to get here.  Future commands
1813096ccff4SKevin Barnett 			 * to this device will get a selection timeout as
1814096ccff4SKevin Barnett 			 * if the device were gone.
1815096ccff4SKevin Barnett 			 */
1816096ccff4SKevin Barnett 			hpsa_show_dev_msg(KERN_WARNING, h, device,
1817096ccff4SKevin Barnett 					"didn't find device for removal.");
1818096ccff4SKevin Barnett 		}
1819ba74fdc4SDon Brace 	} else { /* HBA */
1820ba74fdc4SDon Brace 
1821ba74fdc4SDon Brace 		device->removed = 1;
1822ba74fdc4SDon Brace 		hpsa_wait_for_outstanding_commands_for_dev(h, device);
1823ba74fdc4SDon Brace 
1824d04e62b9SKevin Barnett 		hpsa_remove_sas_device(device);
1825096ccff4SKevin Barnett 	}
1826ba74fdc4SDon Brace }
1827096ccff4SKevin Barnett 
18288aa60681SDon Brace static void adjust_hpsa_scsi_table(struct ctlr_info *h,
1829edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *sd[], int nsds)
1830edd16368SStephen M. Cameron {
1831edd16368SStephen M. Cameron 	/* sd contains scsi3 addresses and devtypes, and inquiry
1832edd16368SStephen M. Cameron 	 * data.  This function takes what's in sd to be the current
1833edd16368SStephen M. Cameron 	 * reality and updates h->dev[] to reflect that reality.
1834edd16368SStephen M. Cameron 	 */
1835edd16368SStephen M. Cameron 	int i, entry, device_change, changes = 0;
1836edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *csd;
1837edd16368SStephen M. Cameron 	unsigned long flags;
1838edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t **added, **removed;
1839edd16368SStephen M. Cameron 	int nadded, nremoved;
1840edd16368SStephen M. Cameron 
1841da03ded0SDon Brace 	/*
1842da03ded0SDon Brace 	 * A reset can cause a device status to change
1843da03ded0SDon Brace 	 * re-schedule the scan to see what happened.
1844da03ded0SDon Brace 	 */
1845da03ded0SDon Brace 	if (h->reset_in_progress) {
1846da03ded0SDon Brace 		h->drv_req_rescan = 1;
1847da03ded0SDon Brace 		return;
1848da03ded0SDon Brace 	}
1849edd16368SStephen M. Cameron 
1850cfe5badcSScott Teel 	added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL);
1851cfe5badcSScott Teel 	removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL);
1852edd16368SStephen M. Cameron 
1853edd16368SStephen M. Cameron 	if (!added || !removed) {
1854edd16368SStephen M. Cameron 		dev_warn(&h->pdev->dev, "out of memory in "
1855edd16368SStephen M. Cameron 			"adjust_hpsa_scsi_table\n");
1856edd16368SStephen M. Cameron 		goto free_and_out;
1857edd16368SStephen M. Cameron 	}
1858edd16368SStephen M. Cameron 
1859edd16368SStephen M. Cameron 	spin_lock_irqsave(&h->devlock, flags);
1860edd16368SStephen M. Cameron 
1861edd16368SStephen M. Cameron 	/* find any devices in h->dev[] that are not in
1862edd16368SStephen M. Cameron 	 * sd[] and remove them from h->dev[], and for any
1863edd16368SStephen M. Cameron 	 * devices which have changed, remove the old device
1864edd16368SStephen M. Cameron 	 * info and add the new device info.
1865bd9244f7SScott Teel 	 * If minor device attributes change, just update
1866bd9244f7SScott Teel 	 * the existing device structure.
1867edd16368SStephen M. Cameron 	 */
1868edd16368SStephen M. Cameron 	i = 0;
1869edd16368SStephen M. Cameron 	nremoved = 0;
1870edd16368SStephen M. Cameron 	nadded = 0;
1871edd16368SStephen M. Cameron 	while (i < h->ndevices) {
1872edd16368SStephen M. Cameron 		csd = h->dev[i];
1873edd16368SStephen M. Cameron 		device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
1874edd16368SStephen M. Cameron 		if (device_change == DEVICE_NOT_FOUND) {
1875edd16368SStephen M. Cameron 			changes++;
18768aa60681SDon Brace 			hpsa_scsi_remove_entry(h, i, removed, &nremoved);
1877edd16368SStephen M. Cameron 			continue; /* remove ^^^, hence i not incremented */
1878edd16368SStephen M. Cameron 		} else if (device_change == DEVICE_CHANGED) {
1879edd16368SStephen M. Cameron 			changes++;
18808aa60681SDon Brace 			hpsa_scsi_replace_entry(h, i, sd[entry],
18812a8ccf31SStephen M. Cameron 				added, &nadded, removed, &nremoved);
1882c7f172dcSStephen M. Cameron 			/* Set it to NULL to prevent it from being freed
1883c7f172dcSStephen M. Cameron 			 * at the bottom of hpsa_update_scsi_devices()
1884c7f172dcSStephen M. Cameron 			 */
1885c7f172dcSStephen M. Cameron 			sd[entry] = NULL;
1886bd9244f7SScott Teel 		} else if (device_change == DEVICE_UPDATED) {
18878aa60681SDon Brace 			hpsa_scsi_update_entry(h, i, sd[entry]);
1888edd16368SStephen M. Cameron 		}
1889edd16368SStephen M. Cameron 		i++;
1890edd16368SStephen M. Cameron 	}
1891edd16368SStephen M. Cameron 
1892edd16368SStephen M. Cameron 	/* Now, make sure every device listed in sd[] is also
1893edd16368SStephen M. Cameron 	 * listed in h->dev[], adding them if they aren't found
1894edd16368SStephen M. Cameron 	 */
1895edd16368SStephen M. Cameron 
1896edd16368SStephen M. Cameron 	for (i = 0; i < nsds; i++) {
1897edd16368SStephen M. Cameron 		if (!sd[i]) /* if already added above. */
1898edd16368SStephen M. Cameron 			continue;
18999846590eSStephen M. Cameron 
19009846590eSStephen M. Cameron 		/* Don't add devices which are NOT READY, FORMAT IN PROGRESS
19019846590eSStephen M. Cameron 		 * as the SCSI mid-layer does not handle such devices well.
19029846590eSStephen M. Cameron 		 * It relentlessly loops sending TUR at 3Hz, then READ(10)
19039846590eSStephen M. Cameron 		 * at 160Hz, and prevents the system from coming up.
19049846590eSStephen M. Cameron 		 */
19059846590eSStephen M. Cameron 		if (sd[i]->volume_offline) {
19069846590eSStephen M. Cameron 			hpsa_show_volume_status(h, sd[i]);
19070d96ef5fSWebb Scales 			hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline");
19089846590eSStephen M. Cameron 			continue;
19099846590eSStephen M. Cameron 		}
19109846590eSStephen M. Cameron 
1911edd16368SStephen M. Cameron 		device_change = hpsa_scsi_find_entry(sd[i], h->dev,
1912edd16368SStephen M. Cameron 					h->ndevices, &entry);
1913edd16368SStephen M. Cameron 		if (device_change == DEVICE_NOT_FOUND) {
1914edd16368SStephen M. Cameron 			changes++;
19158aa60681SDon Brace 			if (hpsa_scsi_add_entry(h, sd[i], added, &nadded) != 0)
1916edd16368SStephen M. Cameron 				break;
1917edd16368SStephen M. Cameron 			sd[i] = NULL; /* prevent from being freed later. */
1918edd16368SStephen M. Cameron 		} else if (device_change == DEVICE_CHANGED) {
1919edd16368SStephen M. Cameron 			/* should never happen... */
1920edd16368SStephen M. Cameron 			changes++;
1921edd16368SStephen M. Cameron 			dev_warn(&h->pdev->dev,
1922edd16368SStephen M. Cameron 				"device unexpectedly changed.\n");
1923edd16368SStephen M. Cameron 			/* but if it does happen, we just ignore that device */
1924edd16368SStephen M. Cameron 		}
1925edd16368SStephen M. Cameron 	}
192641ce4c35SStephen Cameron 	hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices);
192741ce4c35SStephen Cameron 
192841ce4c35SStephen Cameron 	/* Now that h->dev[]->phys_disk[] is coherent, we can enable
192941ce4c35SStephen Cameron 	 * any logical drives that need it enabled.
193041ce4c35SStephen Cameron 	 */
19311d33d85dSDon Brace 	for (i = 0; i < h->ndevices; i++) {
19321d33d85dSDon Brace 		if (h->dev[i] == NULL)
19331d33d85dSDon Brace 			continue;
193441ce4c35SStephen Cameron 		h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled;
19351d33d85dSDon Brace 	}
193641ce4c35SStephen Cameron 
1937edd16368SStephen M. Cameron 	spin_unlock_irqrestore(&h->devlock, flags);
1938edd16368SStephen M. Cameron 
19399846590eSStephen M. Cameron 	/* Monitor devices which are in one of several NOT READY states to be
19409846590eSStephen M. Cameron 	 * brought online later. This must be done without holding h->devlock,
19419846590eSStephen M. Cameron 	 * so don't touch h->dev[]
19429846590eSStephen M. Cameron 	 */
19439846590eSStephen M. Cameron 	for (i = 0; i < nsds; i++) {
19449846590eSStephen M. Cameron 		if (!sd[i]) /* if already added above. */
19459846590eSStephen M. Cameron 			continue;
19469846590eSStephen M. Cameron 		if (sd[i]->volume_offline)
19479846590eSStephen M. Cameron 			hpsa_monitor_offline_device(h, sd[i]->scsi3addr);
19489846590eSStephen M. Cameron 	}
19499846590eSStephen M. Cameron 
1950edd16368SStephen M. Cameron 	/* Don't notify scsi mid layer of any changes the first time through
1951edd16368SStephen M. Cameron 	 * (or if there are no changes) scsi_scan_host will do it later the
1952edd16368SStephen M. Cameron 	 * first time through.
1953edd16368SStephen M. Cameron 	 */
19548aa60681SDon Brace 	if (!changes)
1955edd16368SStephen M. Cameron 		goto free_and_out;
1956edd16368SStephen M. Cameron 
1957edd16368SStephen M. Cameron 	/* Notify scsi mid layer of any removed devices */
1958edd16368SStephen M. Cameron 	for (i = 0; i < nremoved; i++) {
19591d33d85dSDon Brace 		if (removed[i] == NULL)
19601d33d85dSDon Brace 			continue;
1961096ccff4SKevin Barnett 		if (removed[i]->expose_device)
1962096ccff4SKevin Barnett 			hpsa_remove_device(h, removed[i]);
1963edd16368SStephen M. Cameron 		kfree(removed[i]);
1964edd16368SStephen M. Cameron 		removed[i] = NULL;
1965edd16368SStephen M. Cameron 	}
1966edd16368SStephen M. Cameron 
1967edd16368SStephen M. Cameron 	/* Notify scsi mid layer of any added devices */
1968edd16368SStephen M. Cameron 	for (i = 0; i < nadded; i++) {
1969096ccff4SKevin Barnett 		int rc = 0;
1970096ccff4SKevin Barnett 
19711d33d85dSDon Brace 		if (added[i] == NULL)
197241ce4c35SStephen Cameron 			continue;
19732a168208SKevin Barnett 		if (!(added[i]->expose_device))
1974edd16368SStephen M. Cameron 			continue;
1975096ccff4SKevin Barnett 		rc = hpsa_add_device(h, added[i]);
1976096ccff4SKevin Barnett 		if (!rc)
1977edd16368SStephen M. Cameron 			continue;
1978096ccff4SKevin Barnett 		dev_warn(&h->pdev->dev,
1979096ccff4SKevin Barnett 			"addition failed %d, device not added.", rc);
1980edd16368SStephen M. Cameron 		/* now we have to remove it from h->dev,
1981edd16368SStephen M. Cameron 		 * since it didn't get added to scsi mid layer
1982edd16368SStephen M. Cameron 		 */
1983edd16368SStephen M. Cameron 		fixup_botched_add(h, added[i]);
1984853633e8SDon Brace 		h->drv_req_rescan = 1;
1985edd16368SStephen M. Cameron 	}
1986edd16368SStephen M. Cameron 
1987edd16368SStephen M. Cameron free_and_out:
1988edd16368SStephen M. Cameron 	kfree(added);
1989edd16368SStephen M. Cameron 	kfree(removed);
1990edd16368SStephen M. Cameron }
1991edd16368SStephen M. Cameron 
1992edd16368SStephen M. Cameron /*
19939e03aa2fSJoe Perches  * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t *
1994edd16368SStephen M. Cameron  * Assume's h->devlock is held.
1995edd16368SStephen M. Cameron  */
1996edd16368SStephen M. Cameron static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
1997edd16368SStephen M. Cameron 	int bus, int target, int lun)
1998edd16368SStephen M. Cameron {
1999edd16368SStephen M. Cameron 	int i;
2000edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *sd;
2001edd16368SStephen M. Cameron 
2002edd16368SStephen M. Cameron 	for (i = 0; i < h->ndevices; i++) {
2003edd16368SStephen M. Cameron 		sd = h->dev[i];
2004edd16368SStephen M. Cameron 		if (sd->bus == bus && sd->target == target && sd->lun == lun)
2005edd16368SStephen M. Cameron 			return sd;
2006edd16368SStephen M. Cameron 	}
2007edd16368SStephen M. Cameron 	return NULL;
2008edd16368SStephen M. Cameron }
2009edd16368SStephen M. Cameron 
2010edd16368SStephen M. Cameron static int hpsa_slave_alloc(struct scsi_device *sdev)
2011edd16368SStephen M. Cameron {
2012*7630b3a5SHannes Reinecke 	struct hpsa_scsi_dev_t *sd = NULL;
2013edd16368SStephen M. Cameron 	unsigned long flags;
2014edd16368SStephen M. Cameron 	struct ctlr_info *h;
2015edd16368SStephen M. Cameron 
2016edd16368SStephen M. Cameron 	h = sdev_to_hba(sdev);
2017edd16368SStephen M. Cameron 	spin_lock_irqsave(&h->devlock, flags);
2018d04e62b9SKevin Barnett 	if (sdev_channel(sdev) == HPSA_PHYSICAL_DEVICE_BUS) {
2019d04e62b9SKevin Barnett 		struct scsi_target *starget;
2020d04e62b9SKevin Barnett 		struct sas_rphy *rphy;
2021d04e62b9SKevin Barnett 
2022d04e62b9SKevin Barnett 		starget = scsi_target(sdev);
2023d04e62b9SKevin Barnett 		rphy = target_to_rphy(starget);
2024d04e62b9SKevin Barnett 		sd = hpsa_find_device_by_sas_rphy(h, rphy);
2025d04e62b9SKevin Barnett 		if (sd) {
2026d04e62b9SKevin Barnett 			sd->target = sdev_id(sdev);
2027d04e62b9SKevin Barnett 			sd->lun = sdev->lun;
2028d04e62b9SKevin Barnett 		}
2029*7630b3a5SHannes Reinecke 	}
2030*7630b3a5SHannes Reinecke 	if (!sd)
2031edd16368SStephen M. Cameron 		sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
2032edd16368SStephen M. Cameron 					sdev_id(sdev), sdev->lun);
2033d04e62b9SKevin Barnett 
2034d04e62b9SKevin Barnett 	if (sd && sd->expose_device) {
203503383736SDon Brace 		atomic_set(&sd->ioaccel_cmds_out, 0);
2036d04e62b9SKevin Barnett 		sdev->hostdata = sd;
203741ce4c35SStephen Cameron 	} else
203841ce4c35SStephen Cameron 		sdev->hostdata = NULL;
2039edd16368SStephen M. Cameron 	spin_unlock_irqrestore(&h->devlock, flags);
2040edd16368SStephen M. Cameron 	return 0;
2041edd16368SStephen M. Cameron }
2042edd16368SStephen M. Cameron 
204341ce4c35SStephen Cameron /* configure scsi device based on internal per-device structure */
204441ce4c35SStephen Cameron static int hpsa_slave_configure(struct scsi_device *sdev)
204541ce4c35SStephen Cameron {
204641ce4c35SStephen Cameron 	struct hpsa_scsi_dev_t *sd;
204741ce4c35SStephen Cameron 	int queue_depth;
204841ce4c35SStephen Cameron 
204941ce4c35SStephen Cameron 	sd = sdev->hostdata;
20502a168208SKevin Barnett 	sdev->no_uld_attach = !sd || !sd->expose_device;
205141ce4c35SStephen Cameron 
205241ce4c35SStephen Cameron 	if (sd)
205341ce4c35SStephen Cameron 		queue_depth = sd->queue_depth != 0 ?
205441ce4c35SStephen Cameron 			sd->queue_depth : sdev->host->can_queue;
205541ce4c35SStephen Cameron 	else
205641ce4c35SStephen Cameron 		queue_depth = sdev->host->can_queue;
205741ce4c35SStephen Cameron 
205841ce4c35SStephen Cameron 	scsi_change_queue_depth(sdev, queue_depth);
205941ce4c35SStephen Cameron 
206041ce4c35SStephen Cameron 	return 0;
206141ce4c35SStephen Cameron }
206241ce4c35SStephen Cameron 
2063edd16368SStephen M. Cameron static void hpsa_slave_destroy(struct scsi_device *sdev)
2064edd16368SStephen M. Cameron {
2065bcc44255SStephen M. Cameron 	/* nothing to do. */
2066edd16368SStephen M. Cameron }
2067edd16368SStephen M. Cameron 
2068d9a729f3SWebb Scales static void hpsa_free_ioaccel2_sg_chain_blocks(struct ctlr_info *h)
2069d9a729f3SWebb Scales {
2070d9a729f3SWebb Scales 	int i;
2071d9a729f3SWebb Scales 
2072d9a729f3SWebb Scales 	if (!h->ioaccel2_cmd_sg_list)
2073d9a729f3SWebb Scales 		return;
2074d9a729f3SWebb Scales 	for (i = 0; i < h->nr_cmds; i++) {
2075d9a729f3SWebb Scales 		kfree(h->ioaccel2_cmd_sg_list[i]);
2076d9a729f3SWebb Scales 		h->ioaccel2_cmd_sg_list[i] = NULL;
2077d9a729f3SWebb Scales 	}
2078d9a729f3SWebb Scales 	kfree(h->ioaccel2_cmd_sg_list);
2079d9a729f3SWebb Scales 	h->ioaccel2_cmd_sg_list = NULL;
2080d9a729f3SWebb Scales }
2081d9a729f3SWebb Scales 
2082d9a729f3SWebb Scales static int hpsa_allocate_ioaccel2_sg_chain_blocks(struct ctlr_info *h)
2083d9a729f3SWebb Scales {
2084d9a729f3SWebb Scales 	int i;
2085d9a729f3SWebb Scales 
2086d9a729f3SWebb Scales 	if (h->chainsize <= 0)
2087d9a729f3SWebb Scales 		return 0;
2088d9a729f3SWebb Scales 
2089d9a729f3SWebb Scales 	h->ioaccel2_cmd_sg_list =
2090d9a729f3SWebb Scales 		kzalloc(sizeof(*h->ioaccel2_cmd_sg_list) * h->nr_cmds,
2091d9a729f3SWebb Scales 					GFP_KERNEL);
2092d9a729f3SWebb Scales 	if (!h->ioaccel2_cmd_sg_list)
2093d9a729f3SWebb Scales 		return -ENOMEM;
2094d9a729f3SWebb Scales 	for (i = 0; i < h->nr_cmds; i++) {
2095d9a729f3SWebb Scales 		h->ioaccel2_cmd_sg_list[i] =
2096d9a729f3SWebb Scales 			kmalloc(sizeof(*h->ioaccel2_cmd_sg_list[i]) *
2097d9a729f3SWebb Scales 					h->maxsgentries, GFP_KERNEL);
2098d9a729f3SWebb Scales 		if (!h->ioaccel2_cmd_sg_list[i])
2099d9a729f3SWebb Scales 			goto clean;
2100d9a729f3SWebb Scales 	}
2101d9a729f3SWebb Scales 	return 0;
2102d9a729f3SWebb Scales 
2103d9a729f3SWebb Scales clean:
2104d9a729f3SWebb Scales 	hpsa_free_ioaccel2_sg_chain_blocks(h);
2105d9a729f3SWebb Scales 	return -ENOMEM;
2106d9a729f3SWebb Scales }
2107d9a729f3SWebb Scales 
210833a2ffceSStephen M. Cameron static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
210933a2ffceSStephen M. Cameron {
211033a2ffceSStephen M. Cameron 	int i;
211133a2ffceSStephen M. Cameron 
211233a2ffceSStephen M. Cameron 	if (!h->cmd_sg_list)
211333a2ffceSStephen M. Cameron 		return;
211433a2ffceSStephen M. Cameron 	for (i = 0; i < h->nr_cmds; i++) {
211533a2ffceSStephen M. Cameron 		kfree(h->cmd_sg_list[i]);
211633a2ffceSStephen M. Cameron 		h->cmd_sg_list[i] = NULL;
211733a2ffceSStephen M. Cameron 	}
211833a2ffceSStephen M. Cameron 	kfree(h->cmd_sg_list);
211933a2ffceSStephen M. Cameron 	h->cmd_sg_list = NULL;
212033a2ffceSStephen M. Cameron }
212133a2ffceSStephen M. Cameron 
2122105a3dbcSRobert Elliott static int hpsa_alloc_sg_chain_blocks(struct ctlr_info *h)
212333a2ffceSStephen M. Cameron {
212433a2ffceSStephen M. Cameron 	int i;
212533a2ffceSStephen M. Cameron 
212633a2ffceSStephen M. Cameron 	if (h->chainsize <= 0)
212733a2ffceSStephen M. Cameron 		return 0;
212833a2ffceSStephen M. Cameron 
212933a2ffceSStephen M. Cameron 	h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
213033a2ffceSStephen M. Cameron 				GFP_KERNEL);
21313d4e6af8SRobert Elliott 	if (!h->cmd_sg_list) {
21323d4e6af8SRobert Elliott 		dev_err(&h->pdev->dev, "Failed to allocate SG list\n");
213333a2ffceSStephen M. Cameron 		return -ENOMEM;
21343d4e6af8SRobert Elliott 	}
213533a2ffceSStephen M. Cameron 	for (i = 0; i < h->nr_cmds; i++) {
213633a2ffceSStephen M. Cameron 		h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
213733a2ffceSStephen M. Cameron 						h->chainsize, GFP_KERNEL);
21383d4e6af8SRobert Elliott 		if (!h->cmd_sg_list[i]) {
21393d4e6af8SRobert Elliott 			dev_err(&h->pdev->dev, "Failed to allocate cmd SG\n");
214033a2ffceSStephen M. Cameron 			goto clean;
214133a2ffceSStephen M. Cameron 		}
21423d4e6af8SRobert Elliott 	}
214333a2ffceSStephen M. Cameron 	return 0;
214433a2ffceSStephen M. Cameron 
214533a2ffceSStephen M. Cameron clean:
214633a2ffceSStephen M. Cameron 	hpsa_free_sg_chain_blocks(h);
214733a2ffceSStephen M. Cameron 	return -ENOMEM;
214833a2ffceSStephen M. Cameron }
214933a2ffceSStephen M. Cameron 
2150d9a729f3SWebb Scales static int hpsa_map_ioaccel2_sg_chain_block(struct ctlr_info *h,
2151d9a729f3SWebb Scales 	struct io_accel2_cmd *cp, struct CommandList *c)
2152d9a729f3SWebb Scales {
2153d9a729f3SWebb Scales 	struct ioaccel2_sg_element *chain_block;
2154d9a729f3SWebb Scales 	u64 temp64;
2155d9a729f3SWebb Scales 	u32 chain_size;
2156d9a729f3SWebb Scales 
2157d9a729f3SWebb Scales 	chain_block = h->ioaccel2_cmd_sg_list[c->cmdindex];
2158a736e9b6SDon Brace 	chain_size = le32_to_cpu(cp->sg[0].length);
2159d9a729f3SWebb Scales 	temp64 = pci_map_single(h->pdev, chain_block, chain_size,
2160d9a729f3SWebb Scales 				PCI_DMA_TODEVICE);
2161d9a729f3SWebb Scales 	if (dma_mapping_error(&h->pdev->dev, temp64)) {
2162d9a729f3SWebb Scales 		/* prevent subsequent unmapping */
2163d9a729f3SWebb Scales 		cp->sg->address = 0;
2164d9a729f3SWebb Scales 		return -1;
2165d9a729f3SWebb Scales 	}
2166d9a729f3SWebb Scales 	cp->sg->address = cpu_to_le64(temp64);
2167d9a729f3SWebb Scales 	return 0;
2168d9a729f3SWebb Scales }
2169d9a729f3SWebb Scales 
2170d9a729f3SWebb Scales static void hpsa_unmap_ioaccel2_sg_chain_block(struct ctlr_info *h,
2171d9a729f3SWebb Scales 	struct io_accel2_cmd *cp)
2172d9a729f3SWebb Scales {
2173d9a729f3SWebb Scales 	struct ioaccel2_sg_element *chain_sg;
2174d9a729f3SWebb Scales 	u64 temp64;
2175d9a729f3SWebb Scales 	u32 chain_size;
2176d9a729f3SWebb Scales 
2177d9a729f3SWebb Scales 	chain_sg = cp->sg;
2178d9a729f3SWebb Scales 	temp64 = le64_to_cpu(chain_sg->address);
2179a736e9b6SDon Brace 	chain_size = le32_to_cpu(cp->sg[0].length);
2180d9a729f3SWebb Scales 	pci_unmap_single(h->pdev, temp64, chain_size, PCI_DMA_TODEVICE);
2181d9a729f3SWebb Scales }
2182d9a729f3SWebb Scales 
2183e2bea6dfSStephen M. Cameron static int hpsa_map_sg_chain_block(struct ctlr_info *h,
218433a2ffceSStephen M. Cameron 	struct CommandList *c)
218533a2ffceSStephen M. Cameron {
218633a2ffceSStephen M. Cameron 	struct SGDescriptor *chain_sg, *chain_block;
218733a2ffceSStephen M. Cameron 	u64 temp64;
218850a0decfSStephen M. Cameron 	u32 chain_len;
218933a2ffceSStephen M. Cameron 
219033a2ffceSStephen M. Cameron 	chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
219133a2ffceSStephen M. Cameron 	chain_block = h->cmd_sg_list[c->cmdindex];
219250a0decfSStephen M. Cameron 	chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN);
219350a0decfSStephen M. Cameron 	chain_len = sizeof(*chain_sg) *
21942b08b3e9SDon Brace 		(le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries);
219550a0decfSStephen M. Cameron 	chain_sg->Len = cpu_to_le32(chain_len);
219650a0decfSStephen M. Cameron 	temp64 = pci_map_single(h->pdev, chain_block, chain_len,
219733a2ffceSStephen M. Cameron 				PCI_DMA_TODEVICE);
2198e2bea6dfSStephen M. Cameron 	if (dma_mapping_error(&h->pdev->dev, temp64)) {
2199e2bea6dfSStephen M. Cameron 		/* prevent subsequent unmapping */
220050a0decfSStephen M. Cameron 		chain_sg->Addr = cpu_to_le64(0);
2201e2bea6dfSStephen M. Cameron 		return -1;
2202e2bea6dfSStephen M. Cameron 	}
220350a0decfSStephen M. Cameron 	chain_sg->Addr = cpu_to_le64(temp64);
2204e2bea6dfSStephen M. Cameron 	return 0;
220533a2ffceSStephen M. Cameron }
220633a2ffceSStephen M. Cameron 
220733a2ffceSStephen M. Cameron static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
220833a2ffceSStephen M. Cameron 	struct CommandList *c)
220933a2ffceSStephen M. Cameron {
221033a2ffceSStephen M. Cameron 	struct SGDescriptor *chain_sg;
221133a2ffceSStephen M. Cameron 
221250a0decfSStephen M. Cameron 	if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries)
221333a2ffceSStephen M. Cameron 		return;
221433a2ffceSStephen M. Cameron 
221533a2ffceSStephen M. Cameron 	chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
221650a0decfSStephen M. Cameron 	pci_unmap_single(h->pdev, le64_to_cpu(chain_sg->Addr),
221750a0decfSStephen M. Cameron 			le32_to_cpu(chain_sg->Len), PCI_DMA_TODEVICE);
221833a2ffceSStephen M. Cameron }
221933a2ffceSStephen M. Cameron 
2220a09c1441SScott Teel 
2221a09c1441SScott Teel /* Decode the various types of errors on ioaccel2 path.
2222a09c1441SScott Teel  * Return 1 for any error that should generate a RAID path retry.
2223a09c1441SScott Teel  * Return 0 for errors that don't require a RAID path retry.
2224a09c1441SScott Teel  */
2225a09c1441SScott Teel static int handle_ioaccel_mode2_error(struct ctlr_info *h,
2226c349775eSScott Teel 					struct CommandList *c,
2227c349775eSScott Teel 					struct scsi_cmnd *cmd,
2228ba74fdc4SDon Brace 					struct io_accel2_cmd *c2,
2229ba74fdc4SDon Brace 					struct hpsa_scsi_dev_t *dev)
2230c349775eSScott Teel {
2231c349775eSScott Teel 	int data_len;
2232a09c1441SScott Teel 	int retry = 0;
2233c40820d5SJoe Handzik 	u32 ioaccel2_resid = 0;
2234c349775eSScott Teel 
2235c349775eSScott Teel 	switch (c2->error_data.serv_response) {
2236c349775eSScott Teel 	case IOACCEL2_SERV_RESPONSE_COMPLETE:
2237c349775eSScott Teel 		switch (c2->error_data.status) {
2238c349775eSScott Teel 		case IOACCEL2_STATUS_SR_TASK_COMP_GOOD:
2239c349775eSScott Teel 			break;
2240c349775eSScott Teel 		case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND:
2241ee6b1889SStephen M. Cameron 			cmd->result |= SAM_STAT_CHECK_CONDITION;
2242c349775eSScott Teel 			if (c2->error_data.data_present !=
2243ee6b1889SStephen M. Cameron 					IOACCEL2_SENSE_DATA_PRESENT) {
2244ee6b1889SStephen M. Cameron 				memset(cmd->sense_buffer, 0,
2245ee6b1889SStephen M. Cameron 					SCSI_SENSE_BUFFERSIZE);
2246c349775eSScott Teel 				break;
2247ee6b1889SStephen M. Cameron 			}
2248c349775eSScott Teel 			/* copy the sense data */
2249c349775eSScott Teel 			data_len = c2->error_data.sense_data_len;
2250c349775eSScott Teel 			if (data_len > SCSI_SENSE_BUFFERSIZE)
2251c349775eSScott Teel 				data_len = SCSI_SENSE_BUFFERSIZE;
2252c349775eSScott Teel 			if (data_len > sizeof(c2->error_data.sense_data_buff))
2253c349775eSScott Teel 				data_len =
2254c349775eSScott Teel 					sizeof(c2->error_data.sense_data_buff);
2255c349775eSScott Teel 			memcpy(cmd->sense_buffer,
2256c349775eSScott Teel 				c2->error_data.sense_data_buff, data_len);
2257a09c1441SScott Teel 			retry = 1;
2258c349775eSScott Teel 			break;
2259c349775eSScott Teel 		case IOACCEL2_STATUS_SR_TASK_COMP_BUSY:
2260a09c1441SScott Teel 			retry = 1;
2261c349775eSScott Teel 			break;
2262c349775eSScott Teel 		case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON:
2263a09c1441SScott Teel 			retry = 1;
2264c349775eSScott Teel 			break;
2265c349775eSScott Teel 		case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL:
22664a8da22bSStephen Cameron 			retry = 1;
2267c349775eSScott Teel 			break;
2268c349775eSScott Teel 		case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED:
2269a09c1441SScott Teel 			retry = 1;
2270c349775eSScott Teel 			break;
2271c349775eSScott Teel 		default:
2272a09c1441SScott Teel 			retry = 1;
2273c349775eSScott Teel 			break;
2274c349775eSScott Teel 		}
2275c349775eSScott Teel 		break;
2276c349775eSScott Teel 	case IOACCEL2_SERV_RESPONSE_FAILURE:
2277c40820d5SJoe Handzik 		switch (c2->error_data.status) {
2278c40820d5SJoe Handzik 		case IOACCEL2_STATUS_SR_IO_ERROR:
2279c40820d5SJoe Handzik 		case IOACCEL2_STATUS_SR_IO_ABORTED:
2280c40820d5SJoe Handzik 		case IOACCEL2_STATUS_SR_OVERRUN:
2281c40820d5SJoe Handzik 			retry = 1;
2282c40820d5SJoe Handzik 			break;
2283c40820d5SJoe Handzik 		case IOACCEL2_STATUS_SR_UNDERRUN:
2284c40820d5SJoe Handzik 			cmd->result = (DID_OK << 16);		/* host byte */
2285c40820d5SJoe Handzik 			cmd->result |= (COMMAND_COMPLETE << 8);	/* msg byte */
2286c40820d5SJoe Handzik 			ioaccel2_resid = get_unaligned_le32(
2287c40820d5SJoe Handzik 						&c2->error_data.resid_cnt[0]);
2288c40820d5SJoe Handzik 			scsi_set_resid(cmd, ioaccel2_resid);
2289c40820d5SJoe Handzik 			break;
2290c40820d5SJoe Handzik 		case IOACCEL2_STATUS_SR_NO_PATH_TO_DEVICE:
2291c40820d5SJoe Handzik 		case IOACCEL2_STATUS_SR_INVALID_DEVICE:
2292c40820d5SJoe Handzik 		case IOACCEL2_STATUS_SR_IOACCEL_DISABLED:
2293ba74fdc4SDon Brace 			/*
2294ba74fdc4SDon Brace 			 * Did an HBA disk disappear? We will eventually
2295ba74fdc4SDon Brace 			 * get a state change event from the controller but
2296ba74fdc4SDon Brace 			 * in the meantime, we need to tell the OS that the
2297ba74fdc4SDon Brace 			 * HBA disk is no longer there and stop I/O
2298ba74fdc4SDon Brace 			 * from going down. This allows the potential re-insert
2299ba74fdc4SDon Brace 			 * of the disk to get the same device node.
2300ba74fdc4SDon Brace 			 */
2301ba74fdc4SDon Brace 			if (dev->physical_device && dev->expose_device) {
2302ba74fdc4SDon Brace 				cmd->result = DID_NO_CONNECT << 16;
2303ba74fdc4SDon Brace 				dev->removed = 1;
2304ba74fdc4SDon Brace 				h->drv_req_rescan = 1;
2305ba74fdc4SDon Brace 				dev_warn(&h->pdev->dev,
2306ba74fdc4SDon Brace 					"%s: device is gone!\n", __func__);
2307ba74fdc4SDon Brace 			} else
2308ba74fdc4SDon Brace 				/*
2309ba74fdc4SDon Brace 				 * Retry by sending down the RAID path.
2310ba74fdc4SDon Brace 				 * We will get an event from ctlr to
2311ba74fdc4SDon Brace 				 * trigger rescan regardless.
2312ba74fdc4SDon Brace 				 */
2313c40820d5SJoe Handzik 				retry = 1;
2314c40820d5SJoe Handzik 			break;
2315c40820d5SJoe Handzik 		default:
2316c40820d5SJoe Handzik 			retry = 1;
2317c40820d5SJoe Handzik 		}
2318c349775eSScott Teel 		break;
2319c349775eSScott Teel 	case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE:
2320c349775eSScott Teel 		break;
2321c349775eSScott Teel 	case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS:
2322c349775eSScott Teel 		break;
2323c349775eSScott Teel 	case IOACCEL2_SERV_RESPONSE_TMF_REJECTED:
2324a09c1441SScott Teel 		retry = 1;
2325c349775eSScott Teel 		break;
2326c349775eSScott Teel 	case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN:
2327c349775eSScott Teel 		break;
2328c349775eSScott Teel 	default:
2329a09c1441SScott Teel 		retry = 1;
2330c349775eSScott Teel 		break;
2331c349775eSScott Teel 	}
2332a09c1441SScott Teel 
2333a09c1441SScott Teel 	return retry;	/* retry on raid path? */
2334c349775eSScott Teel }
2335c349775eSScott Teel 
2336a58e7e53SWebb Scales static void hpsa_cmd_resolve_events(struct ctlr_info *h,
2337a58e7e53SWebb Scales 		struct CommandList *c)
2338a58e7e53SWebb Scales {
2339d604f533SWebb Scales 	bool do_wake = false;
2340d604f533SWebb Scales 
2341a58e7e53SWebb Scales 	/*
2342a58e7e53SWebb Scales 	 * Prevent the following race in the abort handler:
2343a58e7e53SWebb Scales 	 *
2344a58e7e53SWebb Scales 	 * 1. LLD is requested to abort a SCSI command
2345a58e7e53SWebb Scales 	 * 2. The SCSI command completes
2346a58e7e53SWebb Scales 	 * 3. The struct CommandList associated with step 2 is made available
2347a58e7e53SWebb Scales 	 * 4. New I/O request to LLD to another LUN re-uses struct CommandList
2348a58e7e53SWebb Scales 	 * 5. Abort handler follows scsi_cmnd->host_scribble and
2349a58e7e53SWebb Scales 	 *    finds struct CommandList and tries to aborts it
2350a58e7e53SWebb Scales 	 * Now we have aborted the wrong command.
2351a58e7e53SWebb Scales 	 *
2352d604f533SWebb Scales 	 * Reset c->scsi_cmd here so that the abort or reset handler will know
2353d604f533SWebb Scales 	 * this command has completed.  Then, check to see if the handler is
2354a58e7e53SWebb Scales 	 * waiting for this command, and, if so, wake it.
2355a58e7e53SWebb Scales 	 */
2356a58e7e53SWebb Scales 	c->scsi_cmd = SCSI_CMD_IDLE;
2357d604f533SWebb Scales 	mb();	/* Declare command idle before checking for pending events. */
2358a58e7e53SWebb Scales 	if (c->abort_pending) {
2359d604f533SWebb Scales 		do_wake = true;
2360a58e7e53SWebb Scales 		c->abort_pending = false;
2361a58e7e53SWebb Scales 	}
2362d604f533SWebb Scales 	if (c->reset_pending) {
2363d604f533SWebb Scales 		unsigned long flags;
2364d604f533SWebb Scales 		struct hpsa_scsi_dev_t *dev;
2365d604f533SWebb Scales 
2366d604f533SWebb Scales 		/*
2367d604f533SWebb Scales 		 * There appears to be a reset pending; lock the lock and
2368d604f533SWebb Scales 		 * reconfirm.  If so, then decrement the count of outstanding
2369d604f533SWebb Scales 		 * commands and wake the reset command if this is the last one.
2370d604f533SWebb Scales 		 */
2371d604f533SWebb Scales 		spin_lock_irqsave(&h->lock, flags);
2372d604f533SWebb Scales 		dev = c->reset_pending;		/* Re-fetch under the lock. */
2373d604f533SWebb Scales 		if (dev && atomic_dec_and_test(&dev->reset_cmds_out))
2374d604f533SWebb Scales 			do_wake = true;
2375d604f533SWebb Scales 		c->reset_pending = NULL;
2376d604f533SWebb Scales 		spin_unlock_irqrestore(&h->lock, flags);
2377d604f533SWebb Scales 	}
2378d604f533SWebb Scales 
2379d604f533SWebb Scales 	if (do_wake)
2380d604f533SWebb Scales 		wake_up_all(&h->event_sync_wait_queue);
2381a58e7e53SWebb Scales }
2382a58e7e53SWebb Scales 
238373153fe5SWebb Scales static void hpsa_cmd_resolve_and_free(struct ctlr_info *h,
238473153fe5SWebb Scales 				      struct CommandList *c)
238573153fe5SWebb Scales {
238673153fe5SWebb Scales 	hpsa_cmd_resolve_events(h, c);
238773153fe5SWebb Scales 	cmd_tagged_free(h, c);
238873153fe5SWebb Scales }
238973153fe5SWebb Scales 
23908a0ff92cSWebb Scales static void hpsa_cmd_free_and_done(struct ctlr_info *h,
23918a0ff92cSWebb Scales 		struct CommandList *c, struct scsi_cmnd *cmd)
23928a0ff92cSWebb Scales {
239373153fe5SWebb Scales 	hpsa_cmd_resolve_and_free(h, c);
2394d49c2077SDon Brace 	if (cmd && cmd->scsi_done)
23958a0ff92cSWebb Scales 		cmd->scsi_done(cmd);
23968a0ff92cSWebb Scales }
23978a0ff92cSWebb Scales 
23988a0ff92cSWebb Scales static void hpsa_retry_cmd(struct ctlr_info *h, struct CommandList *c)
23998a0ff92cSWebb Scales {
24008a0ff92cSWebb Scales 	INIT_WORK(&c->work, hpsa_command_resubmit_worker);
24018a0ff92cSWebb Scales 	queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work);
24028a0ff92cSWebb Scales }
24038a0ff92cSWebb Scales 
2404a58e7e53SWebb Scales static void hpsa_set_scsi_cmd_aborted(struct scsi_cmnd *cmd)
2405a58e7e53SWebb Scales {
2406a58e7e53SWebb Scales 	cmd->result = DID_ABORT << 16;
2407a58e7e53SWebb Scales }
2408a58e7e53SWebb Scales 
2409a58e7e53SWebb Scales static void hpsa_cmd_abort_and_free(struct ctlr_info *h, struct CommandList *c,
2410a58e7e53SWebb Scales 				    struct scsi_cmnd *cmd)
2411a58e7e53SWebb Scales {
2412a58e7e53SWebb Scales 	hpsa_set_scsi_cmd_aborted(cmd);
2413a58e7e53SWebb Scales 	dev_warn(&h->pdev->dev, "CDB %16phN was aborted with status 0x%x\n",
2414a58e7e53SWebb Scales 			 c->Request.CDB, c->err_info->ScsiStatus);
241573153fe5SWebb Scales 	hpsa_cmd_resolve_and_free(h, c);
2416a58e7e53SWebb Scales }
2417a58e7e53SWebb Scales 
2418c349775eSScott Teel static void process_ioaccel2_completion(struct ctlr_info *h,
2419c349775eSScott Teel 		struct CommandList *c, struct scsi_cmnd *cmd,
2420c349775eSScott Teel 		struct hpsa_scsi_dev_t *dev)
2421c349775eSScott Teel {
2422c349775eSScott Teel 	struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
2423c349775eSScott Teel 
2424c349775eSScott Teel 	/* check for good status */
2425c349775eSScott Teel 	if (likely(c2->error_data.serv_response == 0 &&
24268a0ff92cSWebb Scales 			c2->error_data.status == 0))
24278a0ff92cSWebb Scales 		return hpsa_cmd_free_and_done(h, c, cmd);
2428c349775eSScott Teel 
24298a0ff92cSWebb Scales 	/*
24308a0ff92cSWebb Scales 	 * Any RAID offload error results in retry which will use
2431c349775eSScott Teel 	 * the normal I/O path so the controller can handle whatever's
2432c349775eSScott Teel 	 * wrong.
2433c349775eSScott Teel 	 */
2434f3f01730SKevin Barnett 	if (is_logical_device(dev) &&
2435c349775eSScott Teel 		c2->error_data.serv_response ==
2436c349775eSScott Teel 			IOACCEL2_SERV_RESPONSE_FAILURE) {
2437080ef1ccSDon Brace 		if (c2->error_data.status ==
2438064d1b1dSDon Brace 			IOACCEL2_STATUS_SR_IOACCEL_DISABLED) {
2439c349775eSScott Teel 			dev->offload_enabled = 0;
2440064d1b1dSDon Brace 			dev->offload_to_be_enabled = 0;
2441064d1b1dSDon Brace 		}
24428a0ff92cSWebb Scales 
24438a0ff92cSWebb Scales 		return hpsa_retry_cmd(h, c);
2444080ef1ccSDon Brace 	}
2445080ef1ccSDon Brace 
2446ba74fdc4SDon Brace 	if (handle_ioaccel_mode2_error(h, c, cmd, c2, dev))
24478a0ff92cSWebb Scales 		return hpsa_retry_cmd(h, c);
2448080ef1ccSDon Brace 
24498a0ff92cSWebb Scales 	return hpsa_cmd_free_and_done(h, c, cmd);
2450c349775eSScott Teel }
2451c349775eSScott Teel 
24529437ac43SStephen Cameron /* Returns 0 on success, < 0 otherwise. */
24539437ac43SStephen Cameron static int hpsa_evaluate_tmf_status(struct ctlr_info *h,
24549437ac43SStephen Cameron 					struct CommandList *cp)
24559437ac43SStephen Cameron {
24569437ac43SStephen Cameron 	u8 tmf_status = cp->err_info->ScsiStatus;
24579437ac43SStephen Cameron 
24589437ac43SStephen Cameron 	switch (tmf_status) {
24599437ac43SStephen Cameron 	case CISS_TMF_COMPLETE:
24609437ac43SStephen Cameron 		/*
24619437ac43SStephen Cameron 		 * CISS_TMF_COMPLETE never happens, instead,
24629437ac43SStephen Cameron 		 * ei->CommandStatus == 0 for this case.
24639437ac43SStephen Cameron 		 */
24649437ac43SStephen Cameron 	case CISS_TMF_SUCCESS:
24659437ac43SStephen Cameron 		return 0;
24669437ac43SStephen Cameron 	case CISS_TMF_INVALID_FRAME:
24679437ac43SStephen Cameron 	case CISS_TMF_NOT_SUPPORTED:
24689437ac43SStephen Cameron 	case CISS_TMF_FAILED:
24699437ac43SStephen Cameron 	case CISS_TMF_WRONG_LUN:
24709437ac43SStephen Cameron 	case CISS_TMF_OVERLAPPED_TAG:
24719437ac43SStephen Cameron 		break;
24729437ac43SStephen Cameron 	default:
24739437ac43SStephen Cameron 		dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n",
24749437ac43SStephen Cameron 				tmf_status);
24759437ac43SStephen Cameron 		break;
24769437ac43SStephen Cameron 	}
24779437ac43SStephen Cameron 	return -tmf_status;
24789437ac43SStephen Cameron }
24799437ac43SStephen Cameron 
24801fb011fbSStephen M. Cameron static void complete_scsi_command(struct CommandList *cp)
2481edd16368SStephen M. Cameron {
2482edd16368SStephen M. Cameron 	struct scsi_cmnd *cmd;
2483edd16368SStephen M. Cameron 	struct ctlr_info *h;
2484edd16368SStephen M. Cameron 	struct ErrorInfo *ei;
2485283b4a9bSStephen M. Cameron 	struct hpsa_scsi_dev_t *dev;
2486d9a729f3SWebb Scales 	struct io_accel2_cmd *c2;
2487edd16368SStephen M. Cameron 
24889437ac43SStephen Cameron 	u8 sense_key;
24899437ac43SStephen Cameron 	u8 asc;      /* additional sense code */
24909437ac43SStephen Cameron 	u8 ascq;     /* additional sense code qualifier */
2491db111e18SStephen M. Cameron 	unsigned long sense_data_size;
2492edd16368SStephen M. Cameron 
2493edd16368SStephen M. Cameron 	ei = cp->err_info;
24947fa3030cSStephen Cameron 	cmd = cp->scsi_cmd;
2495edd16368SStephen M. Cameron 	h = cp->h;
2496d49c2077SDon Brace 
2497d49c2077SDon Brace 	if (!cmd->device) {
2498d49c2077SDon Brace 		cmd->result = DID_NO_CONNECT << 16;
2499d49c2077SDon Brace 		return hpsa_cmd_free_and_done(h, cp, cmd);
2500d49c2077SDon Brace 	}
2501d49c2077SDon Brace 
2502283b4a9bSStephen M. Cameron 	dev = cmd->device->hostdata;
250345e596cdSDon Brace 	if (!dev) {
250445e596cdSDon Brace 		cmd->result = DID_NO_CONNECT << 16;
250545e596cdSDon Brace 		return hpsa_cmd_free_and_done(h, cp, cmd);
250645e596cdSDon Brace 	}
2507d9a729f3SWebb Scales 	c2 = &h->ioaccel2_cmd_pool[cp->cmdindex];
2508edd16368SStephen M. Cameron 
2509edd16368SStephen M. Cameron 	scsi_dma_unmap(cmd); /* undo the DMA mappings */
2510e1f7de0cSMatt Gates 	if ((cp->cmd_type == CMD_SCSI) &&
25112b08b3e9SDon Brace 		(le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries))
251233a2ffceSStephen M. Cameron 		hpsa_unmap_sg_chain_block(h, cp);
2513edd16368SStephen M. Cameron 
2514d9a729f3SWebb Scales 	if ((cp->cmd_type == CMD_IOACCEL2) &&
2515d9a729f3SWebb Scales 		(c2->sg[0].chain_indicator == IOACCEL2_CHAIN))
2516d9a729f3SWebb Scales 		hpsa_unmap_ioaccel2_sg_chain_block(h, c2);
2517d9a729f3SWebb Scales 
2518edd16368SStephen M. Cameron 	cmd->result = (DID_OK << 16); 		/* host byte */
2519edd16368SStephen M. Cameron 	cmd->result |= (COMMAND_COMPLETE << 8);	/* msg byte */
2520c349775eSScott Teel 
2521d49c2077SDon Brace 	if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1) {
2522d49c2077SDon Brace 		if (dev->physical_device && dev->expose_device &&
2523d49c2077SDon Brace 			dev->removed) {
2524d49c2077SDon Brace 			cmd->result = DID_NO_CONNECT << 16;
2525d49c2077SDon Brace 			return hpsa_cmd_free_and_done(h, cp, cmd);
2526d49c2077SDon Brace 		}
2527d49c2077SDon Brace 		if (likely(cp->phys_disk != NULL))
252803383736SDon Brace 			atomic_dec(&cp->phys_disk->ioaccel_cmds_out);
2529d49c2077SDon Brace 	}
253003383736SDon Brace 
253125163bd5SWebb Scales 	/*
253225163bd5SWebb Scales 	 * We check for lockup status here as it may be set for
253325163bd5SWebb Scales 	 * CMD_SCSI, CMD_IOACCEL1 and CMD_IOACCEL2 commands by
253425163bd5SWebb Scales 	 * fail_all_oustanding_cmds()
253525163bd5SWebb Scales 	 */
253625163bd5SWebb Scales 	if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) {
253725163bd5SWebb Scales 		/* DID_NO_CONNECT will prevent a retry */
253825163bd5SWebb Scales 		cmd->result = DID_NO_CONNECT << 16;
25398a0ff92cSWebb Scales 		return hpsa_cmd_free_and_done(h, cp, cmd);
254025163bd5SWebb Scales 	}
254125163bd5SWebb Scales 
2542d604f533SWebb Scales 	if ((unlikely(hpsa_is_pending_event(cp)))) {
2543d604f533SWebb Scales 		if (cp->reset_pending)
2544d604f533SWebb Scales 			return hpsa_cmd_resolve_and_free(h, cp);
2545d604f533SWebb Scales 		if (cp->abort_pending)
2546d604f533SWebb Scales 			return hpsa_cmd_abort_and_free(h, cp, cmd);
2547d604f533SWebb Scales 	}
2548d604f533SWebb Scales 
2549c349775eSScott Teel 	if (cp->cmd_type == CMD_IOACCEL2)
2550c349775eSScott Teel 		return process_ioaccel2_completion(h, cp, cmd, dev);
2551c349775eSScott Teel 
25526aa4c361SRobert Elliott 	scsi_set_resid(cmd, ei->ResidualCnt);
25538a0ff92cSWebb Scales 	if (ei->CommandStatus == 0)
25548a0ff92cSWebb Scales 		return hpsa_cmd_free_and_done(h, cp, cmd);
25556aa4c361SRobert Elliott 
2556e1f7de0cSMatt Gates 	/* For I/O accelerator commands, copy over some fields to the normal
2557e1f7de0cSMatt Gates 	 * CISS header used below for error handling.
2558e1f7de0cSMatt Gates 	 */
2559e1f7de0cSMatt Gates 	if (cp->cmd_type == CMD_IOACCEL1) {
2560e1f7de0cSMatt Gates 		struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex];
25612b08b3e9SDon Brace 		cp->Header.SGList = scsi_sg_count(cmd);
25622b08b3e9SDon Brace 		cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList);
25632b08b3e9SDon Brace 		cp->Request.CDBLen = le16_to_cpu(c->io_flags) &
25642b08b3e9SDon Brace 			IOACCEL1_IOFLAGS_CDBLEN_MASK;
256550a0decfSStephen M. Cameron 		cp->Header.tag = c->tag;
2566e1f7de0cSMatt Gates 		memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8);
2567e1f7de0cSMatt Gates 		memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen);
2568283b4a9bSStephen M. Cameron 
2569283b4a9bSStephen M. Cameron 		/* Any RAID offload error results in retry which will use
2570283b4a9bSStephen M. Cameron 		 * the normal I/O path so the controller can handle whatever's
2571283b4a9bSStephen M. Cameron 		 * wrong.
2572283b4a9bSStephen M. Cameron 		 */
2573f3f01730SKevin Barnett 		if (is_logical_device(dev)) {
2574283b4a9bSStephen M. Cameron 			if (ei->CommandStatus == CMD_IOACCEL_DISABLED)
2575283b4a9bSStephen M. Cameron 				dev->offload_enabled = 0;
25768a0ff92cSWebb Scales 			return hpsa_retry_cmd(h, cp);
2577283b4a9bSStephen M. Cameron 		}
2578e1f7de0cSMatt Gates 	}
2579e1f7de0cSMatt Gates 
2580edd16368SStephen M. Cameron 	/* an error has occurred */
2581edd16368SStephen M. Cameron 	switch (ei->CommandStatus) {
2582edd16368SStephen M. Cameron 
2583edd16368SStephen M. Cameron 	case CMD_TARGET_STATUS:
25849437ac43SStephen Cameron 		cmd->result |= ei->ScsiStatus;
25859437ac43SStephen Cameron 		/* copy the sense data */
25869437ac43SStephen Cameron 		if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
25879437ac43SStephen Cameron 			sense_data_size = SCSI_SENSE_BUFFERSIZE;
25889437ac43SStephen Cameron 		else
25899437ac43SStephen Cameron 			sense_data_size = sizeof(ei->SenseInfo);
25909437ac43SStephen Cameron 		if (ei->SenseLen < sense_data_size)
25919437ac43SStephen Cameron 			sense_data_size = ei->SenseLen;
25929437ac43SStephen Cameron 		memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
25939437ac43SStephen Cameron 		if (ei->ScsiStatus)
25949437ac43SStephen Cameron 			decode_sense_data(ei->SenseInfo, sense_data_size,
25959437ac43SStephen Cameron 				&sense_key, &asc, &ascq);
2596edd16368SStephen M. Cameron 		if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
25971d3b3609SMatt Gates 			if (sense_key == ABORTED_COMMAND) {
25982e311fbaSStephen M. Cameron 				cmd->result |= DID_SOFT_ERROR << 16;
25991d3b3609SMatt Gates 				break;
26001d3b3609SMatt Gates 			}
2601edd16368SStephen M. Cameron 			break;
2602edd16368SStephen M. Cameron 		}
2603edd16368SStephen M. Cameron 		/* Problem was not a check condition
2604edd16368SStephen M. Cameron 		 * Pass it up to the upper layers...
2605edd16368SStephen M. Cameron 		 */
2606edd16368SStephen M. Cameron 		if (ei->ScsiStatus) {
2607edd16368SStephen M. Cameron 			dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
2608edd16368SStephen M. Cameron 				"Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
2609edd16368SStephen M. Cameron 				"Returning result: 0x%x\n",
2610edd16368SStephen M. Cameron 				cp, ei->ScsiStatus,
2611edd16368SStephen M. Cameron 				sense_key, asc, ascq,
2612edd16368SStephen M. Cameron 				cmd->result);
2613edd16368SStephen M. Cameron 		} else {  /* scsi status is zero??? How??? */
2614edd16368SStephen M. Cameron 			dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
2615edd16368SStephen M. Cameron 				"Returning no connection.\n", cp),
2616edd16368SStephen M. Cameron 
2617edd16368SStephen M. Cameron 			/* Ordinarily, this case should never happen,
2618edd16368SStephen M. Cameron 			 * but there is a bug in some released firmware
2619edd16368SStephen M. Cameron 			 * revisions that allows it to happen if, for
2620edd16368SStephen M. Cameron 			 * example, a 4100 backplane loses power and
2621edd16368SStephen M. Cameron 			 * the tape drive is in it.  We assume that
2622edd16368SStephen M. Cameron 			 * it's a fatal error of some kind because we
2623edd16368SStephen M. Cameron 			 * can't show that it wasn't. We will make it
2624edd16368SStephen M. Cameron 			 * look like selection timeout since that is
2625edd16368SStephen M. Cameron 			 * the most common reason for this to occur,
2626edd16368SStephen M. Cameron 			 * and it's severe enough.
2627edd16368SStephen M. Cameron 			 */
2628edd16368SStephen M. Cameron 
2629edd16368SStephen M. Cameron 			cmd->result = DID_NO_CONNECT << 16;
2630edd16368SStephen M. Cameron 		}
2631edd16368SStephen M. Cameron 		break;
2632edd16368SStephen M. Cameron 
2633edd16368SStephen M. Cameron 	case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2634edd16368SStephen M. Cameron 		break;
2635edd16368SStephen M. Cameron 	case CMD_DATA_OVERRUN:
2636f42e81e1SStephen Cameron 		dev_warn(&h->pdev->dev,
2637f42e81e1SStephen Cameron 			"CDB %16phN data overrun\n", cp->Request.CDB);
2638edd16368SStephen M. Cameron 		break;
2639edd16368SStephen M. Cameron 	case CMD_INVALID: {
2640edd16368SStephen M. Cameron 		/* print_bytes(cp, sizeof(*cp), 1, 0);
2641edd16368SStephen M. Cameron 		print_cmd(cp); */
2642edd16368SStephen M. Cameron 		/* We get CMD_INVALID if you address a non-existent device
2643edd16368SStephen M. Cameron 		 * instead of a selection timeout (no response).  You will
2644edd16368SStephen M. Cameron 		 * see this if you yank out a drive, then try to access it.
2645edd16368SStephen M. Cameron 		 * This is kind of a shame because it means that any other
2646edd16368SStephen M. Cameron 		 * CMD_INVALID (e.g. driver bug) will get interpreted as a
2647edd16368SStephen M. Cameron 		 * missing target. */
2648edd16368SStephen M. Cameron 		cmd->result = DID_NO_CONNECT << 16;
2649edd16368SStephen M. Cameron 	}
2650edd16368SStephen M. Cameron 		break;
2651edd16368SStephen M. Cameron 	case CMD_PROTOCOL_ERR:
2652256d0eaaSStephen M. Cameron 		cmd->result = DID_ERROR << 16;
2653f42e81e1SStephen Cameron 		dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n",
2654f42e81e1SStephen Cameron 				cp->Request.CDB);
2655edd16368SStephen M. Cameron 		break;
2656edd16368SStephen M. Cameron 	case CMD_HARDWARE_ERR:
2657edd16368SStephen M. Cameron 		cmd->result = DID_ERROR << 16;
2658f42e81e1SStephen Cameron 		dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n",
2659f42e81e1SStephen Cameron 			cp->Request.CDB);
2660edd16368SStephen M. Cameron 		break;
2661edd16368SStephen M. Cameron 	case CMD_CONNECTION_LOST:
2662edd16368SStephen M. Cameron 		cmd->result = DID_ERROR << 16;
2663f42e81e1SStephen Cameron 		dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n",
2664f42e81e1SStephen Cameron 			cp->Request.CDB);
2665edd16368SStephen M. Cameron 		break;
2666edd16368SStephen M. Cameron 	case CMD_ABORTED:
2667a58e7e53SWebb Scales 		/* Return now to avoid calling scsi_done(). */
2668a58e7e53SWebb Scales 		return hpsa_cmd_abort_and_free(h, cp, cmd);
2669edd16368SStephen M. Cameron 	case CMD_ABORT_FAILED:
2670edd16368SStephen M. Cameron 		cmd->result = DID_ERROR << 16;
2671f42e81e1SStephen Cameron 		dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n",
2672f42e81e1SStephen Cameron 			cp->Request.CDB);
2673edd16368SStephen M. Cameron 		break;
2674edd16368SStephen M. Cameron 	case CMD_UNSOLICITED_ABORT:
2675f6e76055SStephen M. Cameron 		cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
2676f42e81e1SStephen Cameron 		dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n",
2677f42e81e1SStephen Cameron 			cp->Request.CDB);
2678edd16368SStephen M. Cameron 		break;
2679edd16368SStephen M. Cameron 	case CMD_TIMEOUT:
2680edd16368SStephen M. Cameron 		cmd->result = DID_TIME_OUT << 16;
2681f42e81e1SStephen Cameron 		dev_warn(&h->pdev->dev, "CDB %16phN timed out\n",
2682f42e81e1SStephen Cameron 			cp->Request.CDB);
2683edd16368SStephen M. Cameron 		break;
26841d5e2ed0SStephen M. Cameron 	case CMD_UNABORTABLE:
26851d5e2ed0SStephen M. Cameron 		cmd->result = DID_ERROR << 16;
26861d5e2ed0SStephen M. Cameron 		dev_warn(&h->pdev->dev, "Command unabortable\n");
26871d5e2ed0SStephen M. Cameron 		break;
26889437ac43SStephen Cameron 	case CMD_TMF_STATUS:
26899437ac43SStephen Cameron 		if (hpsa_evaluate_tmf_status(h, cp)) /* TMF failed? */
26909437ac43SStephen Cameron 			cmd->result = DID_ERROR << 16;
26919437ac43SStephen Cameron 		break;
2692283b4a9bSStephen M. Cameron 	case CMD_IOACCEL_DISABLED:
2693283b4a9bSStephen M. Cameron 		/* This only handles the direct pass-through case since RAID
2694283b4a9bSStephen M. Cameron 		 * offload is handled above.  Just attempt a retry.
2695283b4a9bSStephen M. Cameron 		 */
2696283b4a9bSStephen M. Cameron 		cmd->result = DID_SOFT_ERROR << 16;
2697283b4a9bSStephen M. Cameron 		dev_warn(&h->pdev->dev,
2698283b4a9bSStephen M. Cameron 				"cp %p had HP SSD Smart Path error\n", cp);
2699283b4a9bSStephen M. Cameron 		break;
2700edd16368SStephen M. Cameron 	default:
2701edd16368SStephen M. Cameron 		cmd->result = DID_ERROR << 16;
2702edd16368SStephen M. Cameron 		dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
2703edd16368SStephen M. Cameron 				cp, ei->CommandStatus);
2704edd16368SStephen M. Cameron 	}
27058a0ff92cSWebb Scales 
27068a0ff92cSWebb Scales 	return hpsa_cmd_free_and_done(h, cp, cmd);
2707edd16368SStephen M. Cameron }
2708edd16368SStephen M. Cameron 
2709edd16368SStephen M. Cameron static void hpsa_pci_unmap(struct pci_dev *pdev,
2710edd16368SStephen M. Cameron 	struct CommandList *c, int sg_used, int data_direction)
2711edd16368SStephen M. Cameron {
2712edd16368SStephen M. Cameron 	int i;
2713edd16368SStephen M. Cameron 
271450a0decfSStephen M. Cameron 	for (i = 0; i < sg_used; i++)
271550a0decfSStephen M. Cameron 		pci_unmap_single(pdev, (dma_addr_t) le64_to_cpu(c->SG[i].Addr),
271650a0decfSStephen M. Cameron 				le32_to_cpu(c->SG[i].Len),
2717edd16368SStephen M. Cameron 				data_direction);
2718edd16368SStephen M. Cameron }
2719edd16368SStephen M. Cameron 
2720a2dac136SStephen M. Cameron static int hpsa_map_one(struct pci_dev *pdev,
2721edd16368SStephen M. Cameron 		struct CommandList *cp,
2722edd16368SStephen M. Cameron 		unsigned char *buf,
2723edd16368SStephen M. Cameron 		size_t buflen,
2724edd16368SStephen M. Cameron 		int data_direction)
2725edd16368SStephen M. Cameron {
272601a02ffcSStephen M. Cameron 	u64 addr64;
2727edd16368SStephen M. Cameron 
2728edd16368SStephen M. Cameron 	if (buflen == 0 || data_direction == PCI_DMA_NONE) {
2729edd16368SStephen M. Cameron 		cp->Header.SGList = 0;
273050a0decfSStephen M. Cameron 		cp->Header.SGTotal = cpu_to_le16(0);
2731a2dac136SStephen M. Cameron 		return 0;
2732edd16368SStephen M. Cameron 	}
2733edd16368SStephen M. Cameron 
273450a0decfSStephen M. Cameron 	addr64 = pci_map_single(pdev, buf, buflen, data_direction);
2735eceaae18SShuah Khan 	if (dma_mapping_error(&pdev->dev, addr64)) {
2736a2dac136SStephen M. Cameron 		/* Prevent subsequent unmap of something never mapped */
2737eceaae18SShuah Khan 		cp->Header.SGList = 0;
273850a0decfSStephen M. Cameron 		cp->Header.SGTotal = cpu_to_le16(0);
2739a2dac136SStephen M. Cameron 		return -1;
2740eceaae18SShuah Khan 	}
274150a0decfSStephen M. Cameron 	cp->SG[0].Addr = cpu_to_le64(addr64);
274250a0decfSStephen M. Cameron 	cp->SG[0].Len = cpu_to_le32(buflen);
274350a0decfSStephen M. Cameron 	cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */
274450a0decfSStephen M. Cameron 	cp->Header.SGList = 1;   /* no. SGs contig in this cmd */
274550a0decfSStephen M. Cameron 	cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */
2746a2dac136SStephen M. Cameron 	return 0;
2747edd16368SStephen M. Cameron }
2748edd16368SStephen M. Cameron 
274925163bd5SWebb Scales #define NO_TIMEOUT ((unsigned long) -1)
275025163bd5SWebb Scales #define DEFAULT_TIMEOUT 30000 /* milliseconds */
275125163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
275225163bd5SWebb Scales 	struct CommandList *c, int reply_queue, unsigned long timeout_msecs)
2753edd16368SStephen M. Cameron {
2754edd16368SStephen M. Cameron 	DECLARE_COMPLETION_ONSTACK(wait);
2755edd16368SStephen M. Cameron 
2756edd16368SStephen M. Cameron 	c->waiting = &wait;
275725163bd5SWebb Scales 	__enqueue_cmd_and_start_io(h, c, reply_queue);
275825163bd5SWebb Scales 	if (timeout_msecs == NO_TIMEOUT) {
275925163bd5SWebb Scales 		/* TODO: get rid of this no-timeout thing */
276025163bd5SWebb Scales 		wait_for_completion_io(&wait);
276125163bd5SWebb Scales 		return IO_OK;
276225163bd5SWebb Scales 	}
276325163bd5SWebb Scales 	if (!wait_for_completion_io_timeout(&wait,
276425163bd5SWebb Scales 					msecs_to_jiffies(timeout_msecs))) {
276525163bd5SWebb Scales 		dev_warn(&h->pdev->dev, "Command timed out.\n");
276625163bd5SWebb Scales 		return -ETIMEDOUT;
276725163bd5SWebb Scales 	}
276825163bd5SWebb Scales 	return IO_OK;
276925163bd5SWebb Scales }
277025163bd5SWebb Scales 
277125163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c,
277225163bd5SWebb Scales 				   int reply_queue, unsigned long timeout_msecs)
277325163bd5SWebb Scales {
277425163bd5SWebb Scales 	if (unlikely(lockup_detected(h))) {
277525163bd5SWebb Scales 		c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
277625163bd5SWebb Scales 		return IO_OK;
277725163bd5SWebb Scales 	}
277825163bd5SWebb Scales 	return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs);
2779edd16368SStephen M. Cameron }
2780edd16368SStephen M. Cameron 
2781094963daSStephen M. Cameron static u32 lockup_detected(struct ctlr_info *h)
2782094963daSStephen M. Cameron {
2783094963daSStephen M. Cameron 	int cpu;
2784094963daSStephen M. Cameron 	u32 rc, *lockup_detected;
2785094963daSStephen M. Cameron 
2786094963daSStephen M. Cameron 	cpu = get_cpu();
2787094963daSStephen M. Cameron 	lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
2788094963daSStephen M. Cameron 	rc = *lockup_detected;
2789094963daSStephen M. Cameron 	put_cpu();
2790094963daSStephen M. Cameron 	return rc;
2791094963daSStephen M. Cameron }
2792094963daSStephen M. Cameron 
27939c2fc160SStephen M. Cameron #define MAX_DRIVER_CMD_RETRIES 25
279425163bd5SWebb Scales static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
279525163bd5SWebb Scales 	struct CommandList *c, int data_direction, unsigned long timeout_msecs)
2796edd16368SStephen M. Cameron {
27979c2fc160SStephen M. Cameron 	int backoff_time = 10, retry_count = 0;
279825163bd5SWebb Scales 	int rc;
2799edd16368SStephen M. Cameron 
2800edd16368SStephen M. Cameron 	do {
28017630abd0SJoe Perches 		memset(c->err_info, 0, sizeof(*c->err_info));
280225163bd5SWebb Scales 		rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
280325163bd5SWebb Scales 						  timeout_msecs);
280425163bd5SWebb Scales 		if (rc)
280525163bd5SWebb Scales 			break;
2806edd16368SStephen M. Cameron 		retry_count++;
28079c2fc160SStephen M. Cameron 		if (retry_count > 3) {
28089c2fc160SStephen M. Cameron 			msleep(backoff_time);
28099c2fc160SStephen M. Cameron 			if (backoff_time < 1000)
28109c2fc160SStephen M. Cameron 				backoff_time *= 2;
28119c2fc160SStephen M. Cameron 		}
2812852af20aSMatt Bondurant 	} while ((check_for_unit_attention(h, c) ||
28139c2fc160SStephen M. Cameron 			check_for_busy(h, c)) &&
28149c2fc160SStephen M. Cameron 			retry_count <= MAX_DRIVER_CMD_RETRIES);
2815edd16368SStephen M. Cameron 	hpsa_pci_unmap(h->pdev, c, 1, data_direction);
281625163bd5SWebb Scales 	if (retry_count > MAX_DRIVER_CMD_RETRIES)
281725163bd5SWebb Scales 		rc = -EIO;
281825163bd5SWebb Scales 	return rc;
2819edd16368SStephen M. Cameron }
2820edd16368SStephen M. Cameron 
2821d1e8beacSStephen M. Cameron static void hpsa_print_cmd(struct ctlr_info *h, char *txt,
2822d1e8beacSStephen M. Cameron 				struct CommandList *c)
2823edd16368SStephen M. Cameron {
2824d1e8beacSStephen M. Cameron 	const u8 *cdb = c->Request.CDB;
2825d1e8beacSStephen M. Cameron 	const u8 *lun = c->Header.LUN.LunAddrBytes;
2826edd16368SStephen M. Cameron 
2827d1e8beacSStephen M. Cameron 	dev_warn(&h->pdev->dev, "%s: LUN:%02x%02x%02x%02x%02x%02x%02x%02x"
2828d1e8beacSStephen M. Cameron 	" CDB:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x\n",
2829d1e8beacSStephen M. Cameron 		txt, lun[0], lun[1], lun[2], lun[3],
2830d1e8beacSStephen M. Cameron 		lun[4], lun[5], lun[6], lun[7],
2831d1e8beacSStephen M. Cameron 		cdb[0], cdb[1], cdb[2], cdb[3],
2832d1e8beacSStephen M. Cameron 		cdb[4], cdb[5], cdb[6], cdb[7],
2833d1e8beacSStephen M. Cameron 		cdb[8], cdb[9], cdb[10], cdb[11],
2834d1e8beacSStephen M. Cameron 		cdb[12], cdb[13], cdb[14], cdb[15]);
2835d1e8beacSStephen M. Cameron }
2836d1e8beacSStephen M. Cameron 
2837d1e8beacSStephen M. Cameron static void hpsa_scsi_interpret_error(struct ctlr_info *h,
2838d1e8beacSStephen M. Cameron 			struct CommandList *cp)
2839d1e8beacSStephen M. Cameron {
2840d1e8beacSStephen M. Cameron 	const struct ErrorInfo *ei = cp->err_info;
2841d1e8beacSStephen M. Cameron 	struct device *d = &cp->h->pdev->dev;
28429437ac43SStephen Cameron 	u8 sense_key, asc, ascq;
28439437ac43SStephen Cameron 	int sense_len;
2844d1e8beacSStephen M. Cameron 
2845edd16368SStephen M. Cameron 	switch (ei->CommandStatus) {
2846edd16368SStephen M. Cameron 	case CMD_TARGET_STATUS:
28479437ac43SStephen Cameron 		if (ei->SenseLen > sizeof(ei->SenseInfo))
28489437ac43SStephen Cameron 			sense_len = sizeof(ei->SenseInfo);
28499437ac43SStephen Cameron 		else
28509437ac43SStephen Cameron 			sense_len = ei->SenseLen;
28519437ac43SStephen Cameron 		decode_sense_data(ei->SenseInfo, sense_len,
28529437ac43SStephen Cameron 					&sense_key, &asc, &ascq);
2853d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "SCSI status", cp);
2854d1e8beacSStephen M. Cameron 		if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION)
28559437ac43SStephen Cameron 			dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n",
28569437ac43SStephen Cameron 				sense_key, asc, ascq);
2857d1e8beacSStephen M. Cameron 		else
28589437ac43SStephen Cameron 			dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus);
2859edd16368SStephen M. Cameron 		if (ei->ScsiStatus == 0)
2860edd16368SStephen M. Cameron 			dev_warn(d, "SCSI status is abnormally zero.  "
2861edd16368SStephen M. Cameron 			"(probably indicates selection timeout "
2862edd16368SStephen M. Cameron 			"reported incorrectly due to a known "
2863edd16368SStephen M. Cameron 			"firmware bug, circa July, 2001.)\n");
2864edd16368SStephen M. Cameron 		break;
2865edd16368SStephen M. Cameron 	case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2866edd16368SStephen M. Cameron 		break;
2867edd16368SStephen M. Cameron 	case CMD_DATA_OVERRUN:
2868d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "overrun condition", cp);
2869edd16368SStephen M. Cameron 		break;
2870edd16368SStephen M. Cameron 	case CMD_INVALID: {
2871edd16368SStephen M. Cameron 		/* controller unfortunately reports SCSI passthru's
2872edd16368SStephen M. Cameron 		 * to non-existent targets as invalid commands.
2873edd16368SStephen M. Cameron 		 */
2874d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "invalid command", cp);
2875d1e8beacSStephen M. Cameron 		dev_warn(d, "probably means device no longer present\n");
2876edd16368SStephen M. Cameron 		}
2877edd16368SStephen M. Cameron 		break;
2878edd16368SStephen M. Cameron 	case CMD_PROTOCOL_ERR:
2879d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "protocol error", cp);
2880edd16368SStephen M. Cameron 		break;
2881edd16368SStephen M. Cameron 	case CMD_HARDWARE_ERR:
2882d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "hardware error", cp);
2883edd16368SStephen M. Cameron 		break;
2884edd16368SStephen M. Cameron 	case CMD_CONNECTION_LOST:
2885d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "connection lost", cp);
2886edd16368SStephen M. Cameron 		break;
2887edd16368SStephen M. Cameron 	case CMD_ABORTED:
2888d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "aborted", cp);
2889edd16368SStephen M. Cameron 		break;
2890edd16368SStephen M. Cameron 	case CMD_ABORT_FAILED:
2891d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "abort failed", cp);
2892edd16368SStephen M. Cameron 		break;
2893edd16368SStephen M. Cameron 	case CMD_UNSOLICITED_ABORT:
2894d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "unsolicited abort", cp);
2895edd16368SStephen M. Cameron 		break;
2896edd16368SStephen M. Cameron 	case CMD_TIMEOUT:
2897d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "timed out", cp);
2898edd16368SStephen M. Cameron 		break;
28991d5e2ed0SStephen M. Cameron 	case CMD_UNABORTABLE:
2900d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "unabortable", cp);
29011d5e2ed0SStephen M. Cameron 		break;
290225163bd5SWebb Scales 	case CMD_CTLR_LOCKUP:
290325163bd5SWebb Scales 		hpsa_print_cmd(h, "controller lockup detected", cp);
290425163bd5SWebb Scales 		break;
2905edd16368SStephen M. Cameron 	default:
2906d1e8beacSStephen M. Cameron 		hpsa_print_cmd(h, "unknown status", cp);
2907d1e8beacSStephen M. Cameron 		dev_warn(d, "Unknown command status %x\n",
2908edd16368SStephen M. Cameron 				ei->CommandStatus);
2909edd16368SStephen M. Cameron 	}
2910edd16368SStephen M. Cameron }
2911edd16368SStephen M. Cameron 
2912edd16368SStephen M. Cameron static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
2913b7bb24ebSStephen M. Cameron 			u16 page, unsigned char *buf,
2914edd16368SStephen M. Cameron 			unsigned char bufsize)
2915edd16368SStephen M. Cameron {
2916edd16368SStephen M. Cameron 	int rc = IO_OK;
2917edd16368SStephen M. Cameron 	struct CommandList *c;
2918edd16368SStephen M. Cameron 	struct ErrorInfo *ei;
2919edd16368SStephen M. Cameron 
292045fcb86eSStephen Cameron 	c = cmd_alloc(h);
2921edd16368SStephen M. Cameron 
2922a2dac136SStephen M. Cameron 	if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize,
2923a2dac136SStephen M. Cameron 			page, scsi3addr, TYPE_CMD)) {
2924a2dac136SStephen M. Cameron 		rc = -1;
2925a2dac136SStephen M. Cameron 		goto out;
2926a2dac136SStephen M. Cameron 	}
292725163bd5SWebb Scales 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
2928c448ecfaSDon Brace 					PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT);
292925163bd5SWebb Scales 	if (rc)
293025163bd5SWebb Scales 		goto out;
2931edd16368SStephen M. Cameron 	ei = c->err_info;
2932edd16368SStephen M. Cameron 	if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
2933d1e8beacSStephen M. Cameron 		hpsa_scsi_interpret_error(h, c);
2934edd16368SStephen M. Cameron 		rc = -1;
2935edd16368SStephen M. Cameron 	}
2936a2dac136SStephen M. Cameron out:
293745fcb86eSStephen Cameron 	cmd_free(h, c);
2938edd16368SStephen M. Cameron 	return rc;
2939edd16368SStephen M. Cameron }
2940edd16368SStephen M. Cameron 
2941bf711ac6SScott Teel static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr,
294225163bd5SWebb Scales 	u8 reset_type, int reply_queue)
2943edd16368SStephen M. Cameron {
2944edd16368SStephen M. Cameron 	int rc = IO_OK;
2945edd16368SStephen M. Cameron 	struct CommandList *c;
2946edd16368SStephen M. Cameron 	struct ErrorInfo *ei;
2947edd16368SStephen M. Cameron 
294845fcb86eSStephen Cameron 	c = cmd_alloc(h);
2949edd16368SStephen M. Cameron 
2950edd16368SStephen M. Cameron 
2951a2dac136SStephen M. Cameron 	/* fill_cmd can't fail here, no data buffer to map. */
29520b9b7b6eSScott Teel 	(void) fill_cmd(c, reset_type, h, NULL, 0, 0,
2953bf711ac6SScott Teel 			scsi3addr, TYPE_MSG);
2954c448ecfaSDon Brace 	rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT);
295525163bd5SWebb Scales 	if (rc) {
295625163bd5SWebb Scales 		dev_warn(&h->pdev->dev, "Failed to send reset command\n");
295725163bd5SWebb Scales 		goto out;
295825163bd5SWebb Scales 	}
2959edd16368SStephen M. Cameron 	/* no unmap needed here because no data xfer. */
2960edd16368SStephen M. Cameron 
2961edd16368SStephen M. Cameron 	ei = c->err_info;
2962edd16368SStephen M. Cameron 	if (ei->CommandStatus != 0) {
2963d1e8beacSStephen M. Cameron 		hpsa_scsi_interpret_error(h, c);
2964edd16368SStephen M. Cameron 		rc = -1;
2965edd16368SStephen M. Cameron 	}
296625163bd5SWebb Scales out:
296745fcb86eSStephen Cameron 	cmd_free(h, c);
2968edd16368SStephen M. Cameron 	return rc;
2969edd16368SStephen M. Cameron }
2970edd16368SStephen M. Cameron 
2971d604f533SWebb Scales static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c,
2972d604f533SWebb Scales 			       struct hpsa_scsi_dev_t *dev,
2973d604f533SWebb Scales 			       unsigned char *scsi3addr)
2974d604f533SWebb Scales {
2975d604f533SWebb Scales 	int i;
2976d604f533SWebb Scales 	bool match = false;
2977d604f533SWebb Scales 	struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
2978d604f533SWebb Scales 	struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2;
2979d604f533SWebb Scales 
2980d604f533SWebb Scales 	if (hpsa_is_cmd_idle(c))
2981d604f533SWebb Scales 		return false;
2982d604f533SWebb Scales 
2983d604f533SWebb Scales 	switch (c->cmd_type) {
2984d604f533SWebb Scales 	case CMD_SCSI:
2985d604f533SWebb Scales 	case CMD_IOCTL_PEND:
2986d604f533SWebb Scales 		match = !memcmp(scsi3addr, &c->Header.LUN.LunAddrBytes,
2987d604f533SWebb Scales 				sizeof(c->Header.LUN.LunAddrBytes));
2988d604f533SWebb Scales 		break;
2989d604f533SWebb Scales 
2990d604f533SWebb Scales 	case CMD_IOACCEL1:
2991d604f533SWebb Scales 	case CMD_IOACCEL2:
2992d604f533SWebb Scales 		if (c->phys_disk == dev) {
2993d604f533SWebb Scales 			/* HBA mode match */
2994d604f533SWebb Scales 			match = true;
2995d604f533SWebb Scales 		} else {
2996d604f533SWebb Scales 			/* Possible RAID mode -- check each phys dev. */
2997d604f533SWebb Scales 			/* FIXME:  Do we need to take out a lock here?  If
2998d604f533SWebb Scales 			 * so, we could just call hpsa_get_pdisk_of_ioaccel2()
2999d604f533SWebb Scales 			 * instead. */
3000d604f533SWebb Scales 			for (i = 0; i < dev->nphysical_disks && !match; i++) {
3001d604f533SWebb Scales 				/* FIXME: an alternate test might be
3002d604f533SWebb Scales 				 *
3003d604f533SWebb Scales 				 * match = dev->phys_disk[i]->ioaccel_handle
3004d604f533SWebb Scales 				 *              == c2->scsi_nexus;      */
3005d604f533SWebb Scales 				match = dev->phys_disk[i] == c->phys_disk;
3006d604f533SWebb Scales 			}
3007d604f533SWebb Scales 		}
3008d604f533SWebb Scales 		break;
3009d604f533SWebb Scales 
3010d604f533SWebb Scales 	case IOACCEL2_TMF:
3011d604f533SWebb Scales 		for (i = 0; i < dev->nphysical_disks && !match; i++) {
3012d604f533SWebb Scales 			match = dev->phys_disk[i]->ioaccel_handle ==
3013d604f533SWebb Scales 					le32_to_cpu(ac->it_nexus);
3014d604f533SWebb Scales 		}
3015d604f533SWebb Scales 		break;
3016d604f533SWebb Scales 
3017d604f533SWebb Scales 	case 0:		/* The command is in the middle of being initialized. */
3018d604f533SWebb Scales 		match = false;
3019d604f533SWebb Scales 		break;
3020d604f533SWebb Scales 
3021d604f533SWebb Scales 	default:
3022d604f533SWebb Scales 		dev_err(&h->pdev->dev, "unexpected cmd_type: %d\n",
3023d604f533SWebb Scales 			c->cmd_type);
3024d604f533SWebb Scales 		BUG();
3025d604f533SWebb Scales 	}
3026d604f533SWebb Scales 
3027d604f533SWebb Scales 	return match;
3028d604f533SWebb Scales }
3029d604f533SWebb Scales 
3030d604f533SWebb Scales static int hpsa_do_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev,
3031d604f533SWebb Scales 	unsigned char *scsi3addr, u8 reset_type, int reply_queue)
3032d604f533SWebb Scales {
3033d604f533SWebb Scales 	int i;
3034d604f533SWebb Scales 	int rc = 0;
3035d604f533SWebb Scales 
3036d604f533SWebb Scales 	/* We can really only handle one reset at a time */
3037d604f533SWebb Scales 	if (mutex_lock_interruptible(&h->reset_mutex) == -EINTR) {
3038d604f533SWebb Scales 		dev_warn(&h->pdev->dev, "concurrent reset wait interrupted.\n");
3039d604f533SWebb Scales 		return -EINTR;
3040d604f533SWebb Scales 	}
3041d604f533SWebb Scales 
3042d604f533SWebb Scales 	BUG_ON(atomic_read(&dev->reset_cmds_out) != 0);
3043d604f533SWebb Scales 
3044d604f533SWebb Scales 	for (i = 0; i < h->nr_cmds; i++) {
3045d604f533SWebb Scales 		struct CommandList *c = h->cmd_pool + i;
3046d604f533SWebb Scales 		int refcount = atomic_inc_return(&c->refcount);
3047d604f533SWebb Scales 
3048d604f533SWebb Scales 		if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, scsi3addr)) {
3049d604f533SWebb Scales 			unsigned long flags;
3050d604f533SWebb Scales 
3051d604f533SWebb Scales 			/*
3052d604f533SWebb Scales 			 * Mark the target command as having a reset pending,
3053d604f533SWebb Scales 			 * then lock a lock so that the command cannot complete
3054d604f533SWebb Scales 			 * while we're considering it.  If the command is not
3055d604f533SWebb Scales 			 * idle then count it; otherwise revoke the event.
3056d604f533SWebb Scales 			 */
3057d604f533SWebb Scales 			c->reset_pending = dev;
3058d604f533SWebb Scales 			spin_lock_irqsave(&h->lock, flags);	/* Implied MB */
3059d604f533SWebb Scales 			if (!hpsa_is_cmd_idle(c))
3060d604f533SWebb Scales 				atomic_inc(&dev->reset_cmds_out);
3061d604f533SWebb Scales 			else
3062d604f533SWebb Scales 				c->reset_pending = NULL;
3063d604f533SWebb Scales 			spin_unlock_irqrestore(&h->lock, flags);
3064d604f533SWebb Scales 		}
3065d604f533SWebb Scales 
3066d604f533SWebb Scales 		cmd_free(h, c);
3067d604f533SWebb Scales 	}
3068d604f533SWebb Scales 
3069d604f533SWebb Scales 	rc = hpsa_send_reset(h, scsi3addr, reset_type, reply_queue);
3070d604f533SWebb Scales 	if (!rc)
3071d604f533SWebb Scales 		wait_event(h->event_sync_wait_queue,
3072d604f533SWebb Scales 			atomic_read(&dev->reset_cmds_out) == 0 ||
3073d604f533SWebb Scales 			lockup_detected(h));
3074d604f533SWebb Scales 
3075d604f533SWebb Scales 	if (unlikely(lockup_detected(h))) {
3076d604f533SWebb Scales 		dev_warn(&h->pdev->dev,
3077d604f533SWebb Scales 			 "Controller lockup detected during reset wait\n");
3078d604f533SWebb Scales 		rc = -ENODEV;
3079d604f533SWebb Scales 	}
3080d604f533SWebb Scales 
3081d604f533SWebb Scales 	if (unlikely(rc))
3082d604f533SWebb Scales 		atomic_set(&dev->reset_cmds_out, 0);
3083d604f533SWebb Scales 
3084d604f533SWebb Scales 	mutex_unlock(&h->reset_mutex);
3085d604f533SWebb Scales 	return rc;
3086d604f533SWebb Scales }
3087d604f533SWebb Scales 
3088edd16368SStephen M. Cameron static void hpsa_get_raid_level(struct ctlr_info *h,
3089edd16368SStephen M. Cameron 	unsigned char *scsi3addr, unsigned char *raid_level)
3090edd16368SStephen M. Cameron {
3091edd16368SStephen M. Cameron 	int rc;
3092edd16368SStephen M. Cameron 	unsigned char *buf;
3093edd16368SStephen M. Cameron 
3094edd16368SStephen M. Cameron 	*raid_level = RAID_UNKNOWN;
3095edd16368SStephen M. Cameron 	buf = kzalloc(64, GFP_KERNEL);
3096edd16368SStephen M. Cameron 	if (!buf)
3097edd16368SStephen M. Cameron 		return;
30988383278dSScott Teel 
30998383278dSScott Teel 	if (!hpsa_vpd_page_supported(h, scsi3addr,
31008383278dSScott Teel 		HPSA_VPD_LV_DEVICE_GEOMETRY))
31018383278dSScott Teel 		goto exit;
31028383278dSScott Teel 
31038383278dSScott Teel 	rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE |
31048383278dSScott Teel 		HPSA_VPD_LV_DEVICE_GEOMETRY, buf, 64);
31058383278dSScott Teel 
3106edd16368SStephen M. Cameron 	if (rc == 0)
3107edd16368SStephen M. Cameron 		*raid_level = buf[8];
3108edd16368SStephen M. Cameron 	if (*raid_level > RAID_UNKNOWN)
3109edd16368SStephen M. Cameron 		*raid_level = RAID_UNKNOWN;
31108383278dSScott Teel exit:
3111edd16368SStephen M. Cameron 	kfree(buf);
3112edd16368SStephen M. Cameron 	return;
3113edd16368SStephen M. Cameron }
3114edd16368SStephen M. Cameron 
3115283b4a9bSStephen M. Cameron #define HPSA_MAP_DEBUG
3116283b4a9bSStephen M. Cameron #ifdef HPSA_MAP_DEBUG
3117283b4a9bSStephen M. Cameron static void hpsa_debug_map_buff(struct ctlr_info *h, int rc,
3118283b4a9bSStephen M. Cameron 				struct raid_map_data *map_buff)
3119283b4a9bSStephen M. Cameron {
3120283b4a9bSStephen M. Cameron 	struct raid_map_disk_data *dd = &map_buff->data[0];
3121283b4a9bSStephen M. Cameron 	int map, row, col;
3122283b4a9bSStephen M. Cameron 	u16 map_cnt, row_cnt, disks_per_row;
3123283b4a9bSStephen M. Cameron 
3124283b4a9bSStephen M. Cameron 	if (rc != 0)
3125283b4a9bSStephen M. Cameron 		return;
3126283b4a9bSStephen M. Cameron 
31272ba8bfc8SStephen M. Cameron 	/* Show details only if debugging has been activated. */
31282ba8bfc8SStephen M. Cameron 	if (h->raid_offload_debug < 2)
31292ba8bfc8SStephen M. Cameron 		return;
31302ba8bfc8SStephen M. Cameron 
3131283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "structure_size = %u\n",
3132283b4a9bSStephen M. Cameron 				le32_to_cpu(map_buff->structure_size));
3133283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "volume_blk_size = %u\n",
3134283b4a9bSStephen M. Cameron 			le32_to_cpu(map_buff->volume_blk_size));
3135283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n",
3136283b4a9bSStephen M. Cameron 			le64_to_cpu(map_buff->volume_blk_cnt));
3137283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "physicalBlockShift = %u\n",
3138283b4a9bSStephen M. Cameron 			map_buff->phys_blk_shift);
3139283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n",
3140283b4a9bSStephen M. Cameron 			map_buff->parity_rotation_shift);
3141283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "strip_size = %u\n",
3142283b4a9bSStephen M. Cameron 			le16_to_cpu(map_buff->strip_size));
3143283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n",
3144283b4a9bSStephen M. Cameron 			le64_to_cpu(map_buff->disk_starting_blk));
3145283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n",
3146283b4a9bSStephen M. Cameron 			le64_to_cpu(map_buff->disk_blk_cnt));
3147283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "data_disks_per_row = %u\n",
3148283b4a9bSStephen M. Cameron 			le16_to_cpu(map_buff->data_disks_per_row));
3149283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n",
3150283b4a9bSStephen M. Cameron 			le16_to_cpu(map_buff->metadata_disks_per_row));
3151283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "row_cnt = %u\n",
3152283b4a9bSStephen M. Cameron 			le16_to_cpu(map_buff->row_cnt));
3153283b4a9bSStephen M. Cameron 	dev_info(&h->pdev->dev, "layout_map_count = %u\n",
3154283b4a9bSStephen M. Cameron 			le16_to_cpu(map_buff->layout_map_count));
31552b08b3e9SDon Brace 	dev_info(&h->pdev->dev, "flags = 0x%x\n",
3156dd0e19f3SScott Teel 			le16_to_cpu(map_buff->flags));
31572b08b3e9SDon Brace 	dev_info(&h->pdev->dev, "encrypytion = %s\n",
31582b08b3e9SDon Brace 			le16_to_cpu(map_buff->flags) &
31592b08b3e9SDon Brace 			RAID_MAP_FLAG_ENCRYPT_ON ?  "ON" : "OFF");
3160dd0e19f3SScott Teel 	dev_info(&h->pdev->dev, "dekindex = %u\n",
3161dd0e19f3SScott Teel 			le16_to_cpu(map_buff->dekindex));
3162283b4a9bSStephen M. Cameron 	map_cnt = le16_to_cpu(map_buff->layout_map_count);
3163283b4a9bSStephen M. Cameron 	for (map = 0; map < map_cnt; map++) {
3164283b4a9bSStephen M. Cameron 		dev_info(&h->pdev->dev, "Map%u:\n", map);
3165283b4a9bSStephen M. Cameron 		row_cnt = le16_to_cpu(map_buff->row_cnt);
3166283b4a9bSStephen M. Cameron 		for (row = 0; row < row_cnt; row++) {
3167283b4a9bSStephen M. Cameron 			dev_info(&h->pdev->dev, "  Row%u:\n", row);
3168283b4a9bSStephen M. Cameron 			disks_per_row =
3169283b4a9bSStephen M. Cameron 				le16_to_cpu(map_buff->data_disks_per_row);
3170283b4a9bSStephen M. Cameron 			for (col = 0; col < disks_per_row; col++, dd++)
3171283b4a9bSStephen M. Cameron 				dev_info(&h->pdev->dev,
3172283b4a9bSStephen M. Cameron 					"    D%02u: h=0x%04x xor=%u,%u\n",
3173283b4a9bSStephen M. Cameron 					col, dd->ioaccel_handle,
3174283b4a9bSStephen M. Cameron 					dd->xor_mult[0], dd->xor_mult[1]);
3175283b4a9bSStephen M. Cameron 			disks_per_row =
3176283b4a9bSStephen M. Cameron 				le16_to_cpu(map_buff->metadata_disks_per_row);
3177283b4a9bSStephen M. Cameron 			for (col = 0; col < disks_per_row; col++, dd++)
3178283b4a9bSStephen M. Cameron 				dev_info(&h->pdev->dev,
3179283b4a9bSStephen M. Cameron 					"    M%02u: h=0x%04x xor=%u,%u\n",
3180283b4a9bSStephen M. Cameron 					col, dd->ioaccel_handle,
3181283b4a9bSStephen M. Cameron 					dd->xor_mult[0], dd->xor_mult[1]);
3182283b4a9bSStephen M. Cameron 		}
3183283b4a9bSStephen M. Cameron 	}
3184283b4a9bSStephen M. Cameron }
3185283b4a9bSStephen M. Cameron #else
3186283b4a9bSStephen M. Cameron static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h,
3187283b4a9bSStephen M. Cameron 			__attribute__((unused)) int rc,
3188283b4a9bSStephen M. Cameron 			__attribute__((unused)) struct raid_map_data *map_buff)
3189283b4a9bSStephen M. Cameron {
3190283b4a9bSStephen M. Cameron }
3191283b4a9bSStephen M. Cameron #endif
3192283b4a9bSStephen M. Cameron 
3193283b4a9bSStephen M. Cameron static int hpsa_get_raid_map(struct ctlr_info *h,
3194283b4a9bSStephen M. Cameron 	unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
3195283b4a9bSStephen M. Cameron {
3196283b4a9bSStephen M. Cameron 	int rc = 0;
3197283b4a9bSStephen M. Cameron 	struct CommandList *c;
3198283b4a9bSStephen M. Cameron 	struct ErrorInfo *ei;
3199283b4a9bSStephen M. Cameron 
320045fcb86eSStephen Cameron 	c = cmd_alloc(h);
3201bf43caf3SRobert Elliott 
3202283b4a9bSStephen M. Cameron 	if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map,
3203283b4a9bSStephen M. Cameron 			sizeof(this_device->raid_map), 0,
3204283b4a9bSStephen M. Cameron 			scsi3addr, TYPE_CMD)) {
32052dd02d74SRobert Elliott 		dev_warn(&h->pdev->dev, "hpsa_get_raid_map fill_cmd failed\n");
32062dd02d74SRobert Elliott 		cmd_free(h, c);
32072dd02d74SRobert Elliott 		return -1;
3208283b4a9bSStephen M. Cameron 	}
320925163bd5SWebb Scales 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
3210c448ecfaSDon Brace 					PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT);
321125163bd5SWebb Scales 	if (rc)
321225163bd5SWebb Scales 		goto out;
3213283b4a9bSStephen M. Cameron 	ei = c->err_info;
3214283b4a9bSStephen M. Cameron 	if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3215d1e8beacSStephen M. Cameron 		hpsa_scsi_interpret_error(h, c);
321625163bd5SWebb Scales 		rc = -1;
321725163bd5SWebb Scales 		goto out;
3218283b4a9bSStephen M. Cameron 	}
321945fcb86eSStephen Cameron 	cmd_free(h, c);
3220283b4a9bSStephen M. Cameron 
3221283b4a9bSStephen M. Cameron 	/* @todo in the future, dynamically allocate RAID map memory */
3222283b4a9bSStephen M. Cameron 	if (le32_to_cpu(this_device->raid_map.structure_size) >
3223283b4a9bSStephen M. Cameron 				sizeof(this_device->raid_map)) {
3224283b4a9bSStephen M. Cameron 		dev_warn(&h->pdev->dev, "RAID map size is too large!\n");
3225283b4a9bSStephen M. Cameron 		rc = -1;
3226283b4a9bSStephen M. Cameron 	}
3227283b4a9bSStephen M. Cameron 	hpsa_debug_map_buff(h, rc, &this_device->raid_map);
3228283b4a9bSStephen M. Cameron 	return rc;
322925163bd5SWebb Scales out:
323025163bd5SWebb Scales 	cmd_free(h, c);
323125163bd5SWebb Scales 	return rc;
3232283b4a9bSStephen M. Cameron }
3233283b4a9bSStephen M. Cameron 
3234d04e62b9SKevin Barnett static int hpsa_bmic_sense_subsystem_information(struct ctlr_info *h,
3235d04e62b9SKevin Barnett 		unsigned char scsi3addr[], u16 bmic_device_index,
3236d04e62b9SKevin Barnett 		struct bmic_sense_subsystem_info *buf, size_t bufsize)
3237d04e62b9SKevin Barnett {
3238d04e62b9SKevin Barnett 	int rc = IO_OK;
3239d04e62b9SKevin Barnett 	struct CommandList *c;
3240d04e62b9SKevin Barnett 	struct ErrorInfo *ei;
3241d04e62b9SKevin Barnett 
3242d04e62b9SKevin Barnett 	c = cmd_alloc(h);
3243d04e62b9SKevin Barnett 
3244d04e62b9SKevin Barnett 	rc = fill_cmd(c, BMIC_SENSE_SUBSYSTEM_INFORMATION, h, buf, bufsize,
3245d04e62b9SKevin Barnett 		0, RAID_CTLR_LUNID, TYPE_CMD);
3246d04e62b9SKevin Barnett 	if (rc)
3247d04e62b9SKevin Barnett 		goto out;
3248d04e62b9SKevin Barnett 
3249d04e62b9SKevin Barnett 	c->Request.CDB[2] = bmic_device_index & 0xff;
3250d04e62b9SKevin Barnett 	c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff;
3251d04e62b9SKevin Barnett 
3252d04e62b9SKevin Barnett 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
3253c448ecfaSDon Brace 				PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT);
3254d04e62b9SKevin Barnett 	if (rc)
3255d04e62b9SKevin Barnett 		goto out;
3256d04e62b9SKevin Barnett 	ei = c->err_info;
3257d04e62b9SKevin Barnett 	if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3258d04e62b9SKevin Barnett 		hpsa_scsi_interpret_error(h, c);
3259d04e62b9SKevin Barnett 		rc = -1;
3260d04e62b9SKevin Barnett 	}
3261d04e62b9SKevin Barnett out:
3262d04e62b9SKevin Barnett 	cmd_free(h, c);
3263d04e62b9SKevin Barnett 	return rc;
3264d04e62b9SKevin Barnett }
3265d04e62b9SKevin Barnett 
326666749d0dSScott Teel static int hpsa_bmic_id_controller(struct ctlr_info *h,
326766749d0dSScott Teel 	struct bmic_identify_controller *buf, size_t bufsize)
326866749d0dSScott Teel {
326966749d0dSScott Teel 	int rc = IO_OK;
327066749d0dSScott Teel 	struct CommandList *c;
327166749d0dSScott Teel 	struct ErrorInfo *ei;
327266749d0dSScott Teel 
327366749d0dSScott Teel 	c = cmd_alloc(h);
327466749d0dSScott Teel 
327566749d0dSScott Teel 	rc = fill_cmd(c, BMIC_IDENTIFY_CONTROLLER, h, buf, bufsize,
327666749d0dSScott Teel 		0, RAID_CTLR_LUNID, TYPE_CMD);
327766749d0dSScott Teel 	if (rc)
327866749d0dSScott Teel 		goto out;
327966749d0dSScott Teel 
328066749d0dSScott Teel 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
3281c448ecfaSDon Brace 		PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT);
328266749d0dSScott Teel 	if (rc)
328366749d0dSScott Teel 		goto out;
328466749d0dSScott Teel 	ei = c->err_info;
328566749d0dSScott Teel 	if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
328666749d0dSScott Teel 		hpsa_scsi_interpret_error(h, c);
328766749d0dSScott Teel 		rc = -1;
328866749d0dSScott Teel 	}
328966749d0dSScott Teel out:
329066749d0dSScott Teel 	cmd_free(h, c);
329166749d0dSScott Teel 	return rc;
329266749d0dSScott Teel }
329366749d0dSScott Teel 
329403383736SDon Brace static int hpsa_bmic_id_physical_device(struct ctlr_info *h,
329503383736SDon Brace 		unsigned char scsi3addr[], u16 bmic_device_index,
329603383736SDon Brace 		struct bmic_identify_physical_device *buf, size_t bufsize)
329703383736SDon Brace {
329803383736SDon Brace 	int rc = IO_OK;
329903383736SDon Brace 	struct CommandList *c;
330003383736SDon Brace 	struct ErrorInfo *ei;
330103383736SDon Brace 
330203383736SDon Brace 	c = cmd_alloc(h);
330303383736SDon Brace 	rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize,
330403383736SDon Brace 		0, RAID_CTLR_LUNID, TYPE_CMD);
330503383736SDon Brace 	if (rc)
330603383736SDon Brace 		goto out;
330703383736SDon Brace 
330803383736SDon Brace 	c->Request.CDB[2] = bmic_device_index & 0xff;
330903383736SDon Brace 	c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff;
331003383736SDon Brace 
331125163bd5SWebb Scales 	hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE,
3312c448ecfaSDon Brace 						DEFAULT_TIMEOUT);
331303383736SDon Brace 	ei = c->err_info;
331403383736SDon Brace 	if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
331503383736SDon Brace 		hpsa_scsi_interpret_error(h, c);
331603383736SDon Brace 		rc = -1;
331703383736SDon Brace 	}
331803383736SDon Brace out:
331903383736SDon Brace 	cmd_free(h, c);
3320d04e62b9SKevin Barnett 
332103383736SDon Brace 	return rc;
332203383736SDon Brace }
332303383736SDon Brace 
3324cca8f13bSDon Brace /*
3325cca8f13bSDon Brace  * get enclosure information
3326cca8f13bSDon Brace  * struct ReportExtendedLUNdata *rlep - Used for BMIC drive number
3327cca8f13bSDon Brace  * struct hpsa_scsi_dev_t *encl_dev - device entry for enclosure
3328cca8f13bSDon Brace  * Uses id_physical_device to determine the box_index.
3329cca8f13bSDon Brace  */
3330cca8f13bSDon Brace static void hpsa_get_enclosure_info(struct ctlr_info *h,
3331cca8f13bSDon Brace 			unsigned char *scsi3addr,
3332cca8f13bSDon Brace 			struct ReportExtendedLUNdata *rlep, int rle_index,
3333cca8f13bSDon Brace 			struct hpsa_scsi_dev_t *encl_dev)
3334cca8f13bSDon Brace {
3335cca8f13bSDon Brace 	int rc = -1;
3336cca8f13bSDon Brace 	struct CommandList *c = NULL;
3337cca8f13bSDon Brace 	struct ErrorInfo *ei = NULL;
3338cca8f13bSDon Brace 	struct bmic_sense_storage_box_params *bssbp = NULL;
3339cca8f13bSDon Brace 	struct bmic_identify_physical_device *id_phys = NULL;
3340cca8f13bSDon Brace 	struct ext_report_lun_entry *rle = &rlep->LUN[rle_index];
3341cca8f13bSDon Brace 	u16 bmic_device_index = 0;
3342cca8f13bSDon Brace 
3343cca8f13bSDon Brace 	bmic_device_index = GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]);
3344cca8f13bSDon Brace 
334517a9e54aSDon Brace 	if (bmic_device_index == 0xFF00 || MASKED_DEVICE(&rle->lunid[0])) {
334617a9e54aSDon Brace 		rc = IO_OK;
3347cca8f13bSDon Brace 		goto out;
334817a9e54aSDon Brace 	}
3349cca8f13bSDon Brace 
3350cca8f13bSDon Brace 	bssbp = kzalloc(sizeof(*bssbp), GFP_KERNEL);
3351cca8f13bSDon Brace 	if (!bssbp)
3352cca8f13bSDon Brace 		goto out;
3353cca8f13bSDon Brace 
3354cca8f13bSDon Brace 	id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
3355cca8f13bSDon Brace 	if (!id_phys)
3356cca8f13bSDon Brace 		goto out;
3357cca8f13bSDon Brace 
3358cca8f13bSDon Brace 	rc = hpsa_bmic_id_physical_device(h, scsi3addr, bmic_device_index,
3359cca8f13bSDon Brace 						id_phys, sizeof(*id_phys));
3360cca8f13bSDon Brace 	if (rc) {
3361cca8f13bSDon Brace 		dev_warn(&h->pdev->dev, "%s: id_phys failed %d bdi[0x%x]\n",
3362cca8f13bSDon Brace 			__func__, encl_dev->external, bmic_device_index);
3363cca8f13bSDon Brace 		goto out;
3364cca8f13bSDon Brace 	}
3365cca8f13bSDon Brace 
3366cca8f13bSDon Brace 	c = cmd_alloc(h);
3367cca8f13bSDon Brace 
3368cca8f13bSDon Brace 	rc = fill_cmd(c, BMIC_SENSE_STORAGE_BOX_PARAMS, h, bssbp,
3369cca8f13bSDon Brace 			sizeof(*bssbp), 0, RAID_CTLR_LUNID, TYPE_CMD);
3370cca8f13bSDon Brace 
3371cca8f13bSDon Brace 	if (rc)
3372cca8f13bSDon Brace 		goto out;
3373cca8f13bSDon Brace 
3374cca8f13bSDon Brace 	if (id_phys->phys_connector[1] == 'E')
3375cca8f13bSDon Brace 		c->Request.CDB[5] = id_phys->box_index;
3376cca8f13bSDon Brace 	else
3377cca8f13bSDon Brace 		c->Request.CDB[5] = 0;
3378cca8f13bSDon Brace 
3379cca8f13bSDon Brace 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE,
3380c448ecfaSDon Brace 						DEFAULT_TIMEOUT);
3381cca8f13bSDon Brace 	if (rc)
3382cca8f13bSDon Brace 		goto out;
3383cca8f13bSDon Brace 
3384cca8f13bSDon Brace 	ei = c->err_info;
3385cca8f13bSDon Brace 	if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3386cca8f13bSDon Brace 		rc = -1;
3387cca8f13bSDon Brace 		goto out;
3388cca8f13bSDon Brace 	}
3389cca8f13bSDon Brace 
3390cca8f13bSDon Brace 	encl_dev->box[id_phys->active_path_number] = bssbp->phys_box_on_port;
3391cca8f13bSDon Brace 	memcpy(&encl_dev->phys_connector[id_phys->active_path_number],
3392cca8f13bSDon Brace 		bssbp->phys_connector, sizeof(bssbp->phys_connector));
3393cca8f13bSDon Brace 
3394cca8f13bSDon Brace 	rc = IO_OK;
3395cca8f13bSDon Brace out:
3396cca8f13bSDon Brace 	kfree(bssbp);
3397cca8f13bSDon Brace 	kfree(id_phys);
3398cca8f13bSDon Brace 
3399cca8f13bSDon Brace 	if (c)
3400cca8f13bSDon Brace 		cmd_free(h, c);
3401cca8f13bSDon Brace 
3402cca8f13bSDon Brace 	if (rc != IO_OK)
3403cca8f13bSDon Brace 		hpsa_show_dev_msg(KERN_INFO, h, encl_dev,
3404cca8f13bSDon Brace 			"Error, could not get enclosure information\n");
3405cca8f13bSDon Brace }
3406cca8f13bSDon Brace 
3407d04e62b9SKevin Barnett static u64 hpsa_get_sas_address_from_report_physical(struct ctlr_info *h,
3408d04e62b9SKevin Barnett 						unsigned char *scsi3addr)
3409d04e62b9SKevin Barnett {
3410d04e62b9SKevin Barnett 	struct ReportExtendedLUNdata *physdev;
3411d04e62b9SKevin Barnett 	u32 nphysicals;
3412d04e62b9SKevin Barnett 	u64 sa = 0;
3413d04e62b9SKevin Barnett 	int i;
3414d04e62b9SKevin Barnett 
3415d04e62b9SKevin Barnett 	physdev = kzalloc(sizeof(*physdev), GFP_KERNEL);
3416d04e62b9SKevin Barnett 	if (!physdev)
3417d04e62b9SKevin Barnett 		return 0;
3418d04e62b9SKevin Barnett 
3419d04e62b9SKevin Barnett 	if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) {
3420d04e62b9SKevin Barnett 		dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
3421d04e62b9SKevin Barnett 		kfree(physdev);
3422d04e62b9SKevin Barnett 		return 0;
3423d04e62b9SKevin Barnett 	}
3424d04e62b9SKevin Barnett 	nphysicals = get_unaligned_be32(physdev->LUNListLength) / 24;
3425d04e62b9SKevin Barnett 
3426d04e62b9SKevin Barnett 	for (i = 0; i < nphysicals; i++)
3427d04e62b9SKevin Barnett 		if (!memcmp(&physdev->LUN[i].lunid[0], scsi3addr, 8)) {
3428d04e62b9SKevin Barnett 			sa = get_unaligned_be64(&physdev->LUN[i].wwid[0]);
3429d04e62b9SKevin Barnett 			break;
3430d04e62b9SKevin Barnett 		}
3431d04e62b9SKevin Barnett 
3432d04e62b9SKevin Barnett 	kfree(physdev);
3433d04e62b9SKevin Barnett 
3434d04e62b9SKevin Barnett 	return sa;
3435d04e62b9SKevin Barnett }
3436d04e62b9SKevin Barnett 
3437d04e62b9SKevin Barnett static void hpsa_get_sas_address(struct ctlr_info *h, unsigned char *scsi3addr,
3438d04e62b9SKevin Barnett 					struct hpsa_scsi_dev_t *dev)
3439d04e62b9SKevin Barnett {
3440d04e62b9SKevin Barnett 	int rc;
3441d04e62b9SKevin Barnett 	u64 sa = 0;
3442d04e62b9SKevin Barnett 
3443d04e62b9SKevin Barnett 	if (is_hba_lunid(scsi3addr)) {
3444d04e62b9SKevin Barnett 		struct bmic_sense_subsystem_info *ssi;
3445d04e62b9SKevin Barnett 
3446d04e62b9SKevin Barnett 		ssi = kzalloc(sizeof(*ssi), GFP_KERNEL);
3447d04e62b9SKevin Barnett 		if (ssi == NULL) {
3448d04e62b9SKevin Barnett 			dev_warn(&h->pdev->dev,
3449d04e62b9SKevin Barnett 				"%s: out of memory\n", __func__);
3450d04e62b9SKevin Barnett 			return;
3451d04e62b9SKevin Barnett 		}
3452d04e62b9SKevin Barnett 
3453d04e62b9SKevin Barnett 		rc = hpsa_bmic_sense_subsystem_information(h,
3454d04e62b9SKevin Barnett 					scsi3addr, 0, ssi, sizeof(*ssi));
3455d04e62b9SKevin Barnett 		if (rc == 0) {
3456d04e62b9SKevin Barnett 			sa = get_unaligned_be64(ssi->primary_world_wide_id);
3457d04e62b9SKevin Barnett 			h->sas_address = sa;
3458d04e62b9SKevin Barnett 		}
3459d04e62b9SKevin Barnett 
3460d04e62b9SKevin Barnett 		kfree(ssi);
3461d04e62b9SKevin Barnett 	} else
3462d04e62b9SKevin Barnett 		sa = hpsa_get_sas_address_from_report_physical(h, scsi3addr);
3463d04e62b9SKevin Barnett 
3464d04e62b9SKevin Barnett 	dev->sas_address = sa;
3465d04e62b9SKevin Barnett }
3466d04e62b9SKevin Barnett 
3467d04e62b9SKevin Barnett /* Get a device id from inquiry page 0x83 */
34688383278dSScott Teel static bool hpsa_vpd_page_supported(struct ctlr_info *h,
34691b70150aSStephen M. Cameron 	unsigned char scsi3addr[], u8 page)
34701b70150aSStephen M. Cameron {
34711b70150aSStephen M. Cameron 	int rc;
34721b70150aSStephen M. Cameron 	int i;
34731b70150aSStephen M. Cameron 	int pages;
34741b70150aSStephen M. Cameron 	unsigned char *buf, bufsize;
34751b70150aSStephen M. Cameron 
34761b70150aSStephen M. Cameron 	buf = kzalloc(256, GFP_KERNEL);
34771b70150aSStephen M. Cameron 	if (!buf)
34788383278dSScott Teel 		return false;
34791b70150aSStephen M. Cameron 
34801b70150aSStephen M. Cameron 	/* Get the size of the page list first */
34811b70150aSStephen M. Cameron 	rc = hpsa_scsi_do_inquiry(h, scsi3addr,
34821b70150aSStephen M. Cameron 				VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
34831b70150aSStephen M. Cameron 				buf, HPSA_VPD_HEADER_SZ);
34841b70150aSStephen M. Cameron 	if (rc != 0)
34851b70150aSStephen M. Cameron 		goto exit_unsupported;
34861b70150aSStephen M. Cameron 	pages = buf[3];
34871b70150aSStephen M. Cameron 	if ((pages + HPSA_VPD_HEADER_SZ) <= 255)
34881b70150aSStephen M. Cameron 		bufsize = pages + HPSA_VPD_HEADER_SZ;
34891b70150aSStephen M. Cameron 	else
34901b70150aSStephen M. Cameron 		bufsize = 255;
34911b70150aSStephen M. Cameron 
34921b70150aSStephen M. Cameron 	/* Get the whole VPD page list */
34931b70150aSStephen M. Cameron 	rc = hpsa_scsi_do_inquiry(h, scsi3addr,
34941b70150aSStephen M. Cameron 				VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
34951b70150aSStephen M. Cameron 				buf, bufsize);
34961b70150aSStephen M. Cameron 	if (rc != 0)
34971b70150aSStephen M. Cameron 		goto exit_unsupported;
34981b70150aSStephen M. Cameron 
34991b70150aSStephen M. Cameron 	pages = buf[3];
35001b70150aSStephen M. Cameron 	for (i = 1; i <= pages; i++)
35011b70150aSStephen M. Cameron 		if (buf[3 + i] == page)
35021b70150aSStephen M. Cameron 			goto exit_supported;
35031b70150aSStephen M. Cameron exit_unsupported:
35041b70150aSStephen M. Cameron 	kfree(buf);
35058383278dSScott Teel 	return false;
35061b70150aSStephen M. Cameron exit_supported:
35071b70150aSStephen M. Cameron 	kfree(buf);
35088383278dSScott Teel 	return true;
35091b70150aSStephen M. Cameron }
35101b70150aSStephen M. Cameron 
3511283b4a9bSStephen M. Cameron static void hpsa_get_ioaccel_status(struct ctlr_info *h,
3512283b4a9bSStephen M. Cameron 	unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
3513283b4a9bSStephen M. Cameron {
3514283b4a9bSStephen M. Cameron 	int rc;
3515283b4a9bSStephen M. Cameron 	unsigned char *buf;
3516283b4a9bSStephen M. Cameron 	u8 ioaccel_status;
3517283b4a9bSStephen M. Cameron 
3518283b4a9bSStephen M. Cameron 	this_device->offload_config = 0;
3519283b4a9bSStephen M. Cameron 	this_device->offload_enabled = 0;
352041ce4c35SStephen Cameron 	this_device->offload_to_be_enabled = 0;
3521283b4a9bSStephen M. Cameron 
3522283b4a9bSStephen M. Cameron 	buf = kzalloc(64, GFP_KERNEL);
3523283b4a9bSStephen M. Cameron 	if (!buf)
3524283b4a9bSStephen M. Cameron 		return;
35251b70150aSStephen M. Cameron 	if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS))
35261b70150aSStephen M. Cameron 		goto out;
3527283b4a9bSStephen M. Cameron 	rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3528b7bb24ebSStephen M. Cameron 			VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64);
3529283b4a9bSStephen M. Cameron 	if (rc != 0)
3530283b4a9bSStephen M. Cameron 		goto out;
3531283b4a9bSStephen M. Cameron 
3532283b4a9bSStephen M. Cameron #define IOACCEL_STATUS_BYTE 4
3533283b4a9bSStephen M. Cameron #define OFFLOAD_CONFIGURED_BIT 0x01
3534283b4a9bSStephen M. Cameron #define OFFLOAD_ENABLED_BIT 0x02
3535283b4a9bSStephen M. Cameron 	ioaccel_status = buf[IOACCEL_STATUS_BYTE];
3536283b4a9bSStephen M. Cameron 	this_device->offload_config =
3537283b4a9bSStephen M. Cameron 		!!(ioaccel_status & OFFLOAD_CONFIGURED_BIT);
3538283b4a9bSStephen M. Cameron 	if (this_device->offload_config) {
3539283b4a9bSStephen M. Cameron 		this_device->offload_enabled =
3540283b4a9bSStephen M. Cameron 			!!(ioaccel_status & OFFLOAD_ENABLED_BIT);
3541283b4a9bSStephen M. Cameron 		if (hpsa_get_raid_map(h, scsi3addr, this_device))
3542283b4a9bSStephen M. Cameron 			this_device->offload_enabled = 0;
3543283b4a9bSStephen M. Cameron 	}
354441ce4c35SStephen Cameron 	this_device->offload_to_be_enabled = this_device->offload_enabled;
3545283b4a9bSStephen M. Cameron out:
3546283b4a9bSStephen M. Cameron 	kfree(buf);
3547283b4a9bSStephen M. Cameron 	return;
3548283b4a9bSStephen M. Cameron }
3549283b4a9bSStephen M. Cameron 
3550edd16368SStephen M. Cameron /* Get the device id from inquiry page 0x83 */
3551edd16368SStephen M. Cameron static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
355275d23d89SDon Brace 	unsigned char *device_id, int index, int buflen)
3553edd16368SStephen M. Cameron {
3554edd16368SStephen M. Cameron 	int rc;
3555edd16368SStephen M. Cameron 	unsigned char *buf;
3556edd16368SStephen M. Cameron 
35578383278dSScott Teel 	/* Does controller have VPD for device id? */
35588383278dSScott Teel 	if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_DEVICE_ID))
35598383278dSScott Teel 		return 1; /* not supported */
35608383278dSScott Teel 
3561edd16368SStephen M. Cameron 	buf = kzalloc(64, GFP_KERNEL);
3562edd16368SStephen M. Cameron 	if (!buf)
3563a84d794dSStephen M. Cameron 		return -ENOMEM;
35648383278dSScott Teel 
35658383278dSScott Teel 	rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE |
35668383278dSScott Teel 					HPSA_VPD_LV_DEVICE_ID, buf, 64);
35678383278dSScott Teel 	if (rc == 0) {
35688383278dSScott Teel 		if (buflen > 16)
35698383278dSScott Teel 			buflen = 16;
35708383278dSScott Teel 		memcpy(device_id, &buf[8], buflen);
35718383278dSScott Teel 	}
357275d23d89SDon Brace 
3573edd16368SStephen M. Cameron 	kfree(buf);
357475d23d89SDon Brace 
35758383278dSScott Teel 	return rc; /*0 - got id,  otherwise, didn't */
3576edd16368SStephen M. Cameron }
3577edd16368SStephen M. Cameron 
3578edd16368SStephen M. Cameron static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
357903383736SDon Brace 		void *buf, int bufsize,
3580edd16368SStephen M. Cameron 		int extended_response)
3581edd16368SStephen M. Cameron {
3582edd16368SStephen M. Cameron 	int rc = IO_OK;
3583edd16368SStephen M. Cameron 	struct CommandList *c;
3584edd16368SStephen M. Cameron 	unsigned char scsi3addr[8];
3585edd16368SStephen M. Cameron 	struct ErrorInfo *ei;
3586edd16368SStephen M. Cameron 
358745fcb86eSStephen Cameron 	c = cmd_alloc(h);
3588bf43caf3SRobert Elliott 
3589e89c0ae7SStephen M. Cameron 	/* address the controller */
3590e89c0ae7SStephen M. Cameron 	memset(scsi3addr, 0, sizeof(scsi3addr));
3591a2dac136SStephen M. Cameron 	if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
3592a2dac136SStephen M. Cameron 		buf, bufsize, 0, scsi3addr, TYPE_CMD)) {
3593a2dac136SStephen M. Cameron 		rc = -1;
3594a2dac136SStephen M. Cameron 		goto out;
3595a2dac136SStephen M. Cameron 	}
3596edd16368SStephen M. Cameron 	if (extended_response)
3597edd16368SStephen M. Cameron 		c->Request.CDB[1] = extended_response;
359825163bd5SWebb Scales 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
3599c448ecfaSDon Brace 					PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT);
360025163bd5SWebb Scales 	if (rc)
360125163bd5SWebb Scales 		goto out;
3602edd16368SStephen M. Cameron 	ei = c->err_info;
3603edd16368SStephen M. Cameron 	if (ei->CommandStatus != 0 &&
3604edd16368SStephen M. Cameron 	    ei->CommandStatus != CMD_DATA_UNDERRUN) {
3605d1e8beacSStephen M. Cameron 		hpsa_scsi_interpret_error(h, c);
3606edd16368SStephen M. Cameron 		rc = -1;
3607283b4a9bSStephen M. Cameron 	} else {
360803383736SDon Brace 		struct ReportLUNdata *rld = buf;
360903383736SDon Brace 
361003383736SDon Brace 		if (rld->extended_response_flag != extended_response) {
3611283b4a9bSStephen M. Cameron 			dev_err(&h->pdev->dev,
3612283b4a9bSStephen M. Cameron 				"report luns requested format %u, got %u\n",
3613283b4a9bSStephen M. Cameron 				extended_response,
361403383736SDon Brace 				rld->extended_response_flag);
3615283b4a9bSStephen M. Cameron 			rc = -1;
3616283b4a9bSStephen M. Cameron 		}
3617edd16368SStephen M. Cameron 	}
3618a2dac136SStephen M. Cameron out:
361945fcb86eSStephen Cameron 	cmd_free(h, c);
3620edd16368SStephen M. Cameron 	return rc;
3621edd16368SStephen M. Cameron }
3622edd16368SStephen M. Cameron 
3623edd16368SStephen M. Cameron static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
362403383736SDon Brace 		struct ReportExtendedLUNdata *buf, int bufsize)
3625edd16368SStephen M. Cameron {
362603383736SDon Brace 	return hpsa_scsi_do_report_luns(h, 0, buf, bufsize,
362703383736SDon Brace 						HPSA_REPORT_PHYS_EXTENDED);
3628edd16368SStephen M. Cameron }
3629edd16368SStephen M. Cameron 
3630edd16368SStephen M. Cameron static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
3631edd16368SStephen M. Cameron 		struct ReportLUNdata *buf, int bufsize)
3632edd16368SStephen M. Cameron {
3633edd16368SStephen M. Cameron 	return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
3634edd16368SStephen M. Cameron }
3635edd16368SStephen M. Cameron 
3636edd16368SStephen M. Cameron static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
3637edd16368SStephen M. Cameron 	int bus, int target, int lun)
3638edd16368SStephen M. Cameron {
3639edd16368SStephen M. Cameron 	device->bus = bus;
3640edd16368SStephen M. Cameron 	device->target = target;
3641edd16368SStephen M. Cameron 	device->lun = lun;
3642edd16368SStephen M. Cameron }
3643edd16368SStephen M. Cameron 
36449846590eSStephen M. Cameron /* Use VPD inquiry to get details of volume status */
36459846590eSStephen M. Cameron static int hpsa_get_volume_status(struct ctlr_info *h,
36469846590eSStephen M. Cameron 					unsigned char scsi3addr[])
36479846590eSStephen M. Cameron {
36489846590eSStephen M. Cameron 	int rc;
36499846590eSStephen M. Cameron 	int status;
36509846590eSStephen M. Cameron 	int size;
36519846590eSStephen M. Cameron 	unsigned char *buf;
36529846590eSStephen M. Cameron 
36539846590eSStephen M. Cameron 	buf = kzalloc(64, GFP_KERNEL);
36549846590eSStephen M. Cameron 	if (!buf)
36559846590eSStephen M. Cameron 		return HPSA_VPD_LV_STATUS_UNSUPPORTED;
36569846590eSStephen M. Cameron 
36579846590eSStephen M. Cameron 	/* Does controller have VPD for logical volume status? */
365824a4b078SStephen M. Cameron 	if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS))
36599846590eSStephen M. Cameron 		goto exit_failed;
36609846590eSStephen M. Cameron 
36619846590eSStephen M. Cameron 	/* Get the size of the VPD return buffer */
36629846590eSStephen M. Cameron 	rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
36639846590eSStephen M. Cameron 					buf, HPSA_VPD_HEADER_SZ);
366424a4b078SStephen M. Cameron 	if (rc != 0)
36659846590eSStephen M. Cameron 		goto exit_failed;
36669846590eSStephen M. Cameron 	size = buf[3];
36679846590eSStephen M. Cameron 
36689846590eSStephen M. Cameron 	/* Now get the whole VPD buffer */
36699846590eSStephen M. Cameron 	rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
36709846590eSStephen M. Cameron 					buf, size + HPSA_VPD_HEADER_SZ);
367124a4b078SStephen M. Cameron 	if (rc != 0)
36729846590eSStephen M. Cameron 		goto exit_failed;
36739846590eSStephen M. Cameron 	status = buf[4]; /* status byte */
36749846590eSStephen M. Cameron 
36759846590eSStephen M. Cameron 	kfree(buf);
36769846590eSStephen M. Cameron 	return status;
36779846590eSStephen M. Cameron exit_failed:
36789846590eSStephen M. Cameron 	kfree(buf);
36799846590eSStephen M. Cameron 	return HPSA_VPD_LV_STATUS_UNSUPPORTED;
36809846590eSStephen M. Cameron }
36819846590eSStephen M. Cameron 
36829846590eSStephen M. Cameron /* Determine offline status of a volume.
36839846590eSStephen M. Cameron  * Return either:
36849846590eSStephen M. Cameron  *  0 (not offline)
368567955ba3SStephen M. Cameron  *  0xff (offline for unknown reasons)
36869846590eSStephen M. Cameron  *  # (integer code indicating one of several NOT READY states
36879846590eSStephen M. Cameron  *     describing why a volume is to be kept offline)
36889846590eSStephen M. Cameron  */
368967955ba3SStephen M. Cameron static int hpsa_volume_offline(struct ctlr_info *h,
36909846590eSStephen M. Cameron 					unsigned char scsi3addr[])
36919846590eSStephen M. Cameron {
36929846590eSStephen M. Cameron 	struct CommandList *c;
36939437ac43SStephen Cameron 	unsigned char *sense;
36949437ac43SStephen Cameron 	u8 sense_key, asc, ascq;
36959437ac43SStephen Cameron 	int sense_len;
369625163bd5SWebb Scales 	int rc, ldstat = 0;
36979846590eSStephen M. Cameron 	u16 cmd_status;
36989846590eSStephen M. Cameron 	u8 scsi_status;
36999846590eSStephen M. Cameron #define ASC_LUN_NOT_READY 0x04
37009846590eSStephen M. Cameron #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04
37019846590eSStephen M. Cameron #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02
37029846590eSStephen M. Cameron 
37039846590eSStephen M. Cameron 	c = cmd_alloc(h);
3704bf43caf3SRobert Elliott 
37059846590eSStephen M. Cameron 	(void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD);
3706c448ecfaSDon Brace 	rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
3707c448ecfaSDon Brace 					DEFAULT_TIMEOUT);
370825163bd5SWebb Scales 	if (rc) {
370925163bd5SWebb Scales 		cmd_free(h, c);
371025163bd5SWebb Scales 		return 0;
371125163bd5SWebb Scales 	}
37129846590eSStephen M. Cameron 	sense = c->err_info->SenseInfo;
37139437ac43SStephen Cameron 	if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
37149437ac43SStephen Cameron 		sense_len = sizeof(c->err_info->SenseInfo);
37159437ac43SStephen Cameron 	else
37169437ac43SStephen Cameron 		sense_len = c->err_info->SenseLen;
37179437ac43SStephen Cameron 	decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq);
37189846590eSStephen M. Cameron 	cmd_status = c->err_info->CommandStatus;
37199846590eSStephen M. Cameron 	scsi_status = c->err_info->ScsiStatus;
37209846590eSStephen M. Cameron 	cmd_free(h, c);
37219846590eSStephen M. Cameron 	/* Is the volume 'not ready'? */
37229846590eSStephen M. Cameron 	if (cmd_status != CMD_TARGET_STATUS ||
37239846590eSStephen M. Cameron 		scsi_status != SAM_STAT_CHECK_CONDITION ||
37249846590eSStephen M. Cameron 		sense_key != NOT_READY ||
37259846590eSStephen M. Cameron 		asc != ASC_LUN_NOT_READY)  {
37269846590eSStephen M. Cameron 		return 0;
37279846590eSStephen M. Cameron 	}
37289846590eSStephen M. Cameron 
37299846590eSStephen M. Cameron 	/* Determine the reason for not ready state */
37309846590eSStephen M. Cameron 	ldstat = hpsa_get_volume_status(h, scsi3addr);
37319846590eSStephen M. Cameron 
37329846590eSStephen M. Cameron 	/* Keep volume offline in certain cases: */
37339846590eSStephen M. Cameron 	switch (ldstat) {
37349846590eSStephen M. Cameron 	case HPSA_LV_UNDERGOING_ERASE:
37355ca01204SScott Benesh 	case HPSA_LV_NOT_AVAILABLE:
37369846590eSStephen M. Cameron 	case HPSA_LV_UNDERGOING_RPI:
37379846590eSStephen M. Cameron 	case HPSA_LV_PENDING_RPI:
37389846590eSStephen M. Cameron 	case HPSA_LV_ENCRYPTED_NO_KEY:
37399846590eSStephen M. Cameron 	case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
37409846590eSStephen M. Cameron 	case HPSA_LV_UNDERGOING_ENCRYPTION:
37419846590eSStephen M. Cameron 	case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
37429846590eSStephen M. Cameron 	case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
37439846590eSStephen M. Cameron 		return ldstat;
37449846590eSStephen M. Cameron 	case HPSA_VPD_LV_STATUS_UNSUPPORTED:
37459846590eSStephen M. Cameron 		/* If VPD status page isn't available,
37469846590eSStephen M. Cameron 		 * use ASC/ASCQ to determine state
37479846590eSStephen M. Cameron 		 */
37489846590eSStephen M. Cameron 		if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) ||
37499846590eSStephen M. Cameron 			(ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ))
37509846590eSStephen M. Cameron 			return ldstat;
37519846590eSStephen M. Cameron 		break;
37529846590eSStephen M. Cameron 	default:
37539846590eSStephen M. Cameron 		break;
37549846590eSStephen M. Cameron 	}
37559846590eSStephen M. Cameron 	return 0;
37569846590eSStephen M. Cameron }
37579846590eSStephen M. Cameron 
37589b5c48c2SStephen Cameron /*
37599b5c48c2SStephen Cameron  * Find out if a logical device supports aborts by simply trying one.
37609b5c48c2SStephen Cameron  * Smart Array may claim not to support aborts on logical drives, but
37619b5c48c2SStephen Cameron  * if a MSA2000 * is connected, the drives on that will be presented
37629b5c48c2SStephen Cameron  * by the Smart Array as logical drives, and aborts may be sent to
37639b5c48c2SStephen Cameron  * those devices successfully.  So the simplest way to find out is
37649b5c48c2SStephen Cameron  * to simply try an abort and see how the device responds.
37659b5c48c2SStephen Cameron  */
37669b5c48c2SStephen Cameron static int hpsa_device_supports_aborts(struct ctlr_info *h,
37679b5c48c2SStephen Cameron 					unsigned char *scsi3addr)
37689b5c48c2SStephen Cameron {
37699b5c48c2SStephen Cameron 	struct CommandList *c;
37709b5c48c2SStephen Cameron 	struct ErrorInfo *ei;
37719b5c48c2SStephen Cameron 	int rc = 0;
37729b5c48c2SStephen Cameron 
37739b5c48c2SStephen Cameron 	u64 tag = (u64) -1; /* bogus tag */
37749b5c48c2SStephen Cameron 
37759b5c48c2SStephen Cameron 	/* Assume that physical devices support aborts */
37769b5c48c2SStephen Cameron 	if (!is_logical_dev_addr_mode(scsi3addr))
37779b5c48c2SStephen Cameron 		return 1;
37789b5c48c2SStephen Cameron 
37799b5c48c2SStephen Cameron 	c = cmd_alloc(h);
3780bf43caf3SRobert Elliott 
37819b5c48c2SStephen Cameron 	(void) fill_cmd(c, HPSA_ABORT_MSG, h, &tag, 0, 0, scsi3addr, TYPE_MSG);
3782c448ecfaSDon Brace 	(void) hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
3783c448ecfaSDon Brace 					DEFAULT_TIMEOUT);
37849b5c48c2SStephen Cameron 	/* no unmap needed here because no data xfer. */
37859b5c48c2SStephen Cameron 	ei = c->err_info;
37869b5c48c2SStephen Cameron 	switch (ei->CommandStatus) {
37879b5c48c2SStephen Cameron 	case CMD_INVALID:
37889b5c48c2SStephen Cameron 		rc = 0;
37899b5c48c2SStephen Cameron 		break;
37909b5c48c2SStephen Cameron 	case CMD_UNABORTABLE:
37919b5c48c2SStephen Cameron 	case CMD_ABORT_FAILED:
37929b5c48c2SStephen Cameron 		rc = 1;
37939b5c48c2SStephen Cameron 		break;
37949437ac43SStephen Cameron 	case CMD_TMF_STATUS:
37959437ac43SStephen Cameron 		rc = hpsa_evaluate_tmf_status(h, c);
37969437ac43SStephen Cameron 		break;
37979b5c48c2SStephen Cameron 	default:
37989b5c48c2SStephen Cameron 		rc = 0;
37999b5c48c2SStephen Cameron 		break;
38009b5c48c2SStephen Cameron 	}
38019b5c48c2SStephen Cameron 	cmd_free(h, c);
38029b5c48c2SStephen Cameron 	return rc;
38039b5c48c2SStephen Cameron }
38049b5c48c2SStephen Cameron 
3805edd16368SStephen M. Cameron static int hpsa_update_device_info(struct ctlr_info *h,
38060b0e1d6cSStephen M. Cameron 	unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
38070b0e1d6cSStephen M. Cameron 	unsigned char *is_OBDR_device)
3808edd16368SStephen M. Cameron {
38090b0e1d6cSStephen M. Cameron 
38100b0e1d6cSStephen M. Cameron #define OBDR_SIG_OFFSET 43
38110b0e1d6cSStephen M. Cameron #define OBDR_TAPE_SIG "$DR-10"
38120b0e1d6cSStephen M. Cameron #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
38130b0e1d6cSStephen M. Cameron #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
38140b0e1d6cSStephen M. Cameron 
3815ea6d3bc3SStephen M. Cameron 	unsigned char *inq_buff;
38160b0e1d6cSStephen M. Cameron 	unsigned char *obdr_sig;
3817683fc444SDon Brace 	int rc = 0;
3818edd16368SStephen M. Cameron 
3819ea6d3bc3SStephen M. Cameron 	inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
3820683fc444SDon Brace 	if (!inq_buff) {
3821683fc444SDon Brace 		rc = -ENOMEM;
3822edd16368SStephen M. Cameron 		goto bail_out;
3823683fc444SDon Brace 	}
3824edd16368SStephen M. Cameron 
3825edd16368SStephen M. Cameron 	/* Do an inquiry to the device to see what it is. */
3826edd16368SStephen M. Cameron 	if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
3827edd16368SStephen M. Cameron 		(unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
3828edd16368SStephen M. Cameron 		/* Inquiry failed (msg printed already) */
3829edd16368SStephen M. Cameron 		dev_err(&h->pdev->dev,
3830edd16368SStephen M. Cameron 			"hpsa_update_device_info: inquiry failed\n");
3831683fc444SDon Brace 		rc = -EIO;
3832edd16368SStephen M. Cameron 		goto bail_out;
3833edd16368SStephen M. Cameron 	}
3834edd16368SStephen M. Cameron 
38354af61e4fSDon Brace 	scsi_sanitize_inquiry_string(&inq_buff[8], 8);
38364af61e4fSDon Brace 	scsi_sanitize_inquiry_string(&inq_buff[16], 16);
383775d23d89SDon Brace 
3838edd16368SStephen M. Cameron 	this_device->devtype = (inq_buff[0] & 0x1f);
3839edd16368SStephen M. Cameron 	memcpy(this_device->scsi3addr, scsi3addr, 8);
3840edd16368SStephen M. Cameron 	memcpy(this_device->vendor, &inq_buff[8],
3841edd16368SStephen M. Cameron 		sizeof(this_device->vendor));
3842edd16368SStephen M. Cameron 	memcpy(this_device->model, &inq_buff[16],
3843edd16368SStephen M. Cameron 		sizeof(this_device->model));
3844*7630b3a5SHannes Reinecke 	this_device->rev = inq_buff[2];
3845edd16368SStephen M. Cameron 	memset(this_device->device_id, 0,
3846edd16368SStephen M. Cameron 		sizeof(this_device->device_id));
38478383278dSScott Teel 	if (hpsa_get_device_id(h, scsi3addr, this_device->device_id, 8,
38488383278dSScott Teel 		sizeof(this_device->device_id)))
38498383278dSScott Teel 		dev_err(&h->pdev->dev,
38508383278dSScott Teel 			"hpsa%d: %s: can't get device id for host %d:C0:T%d:L%d\t%s\t%.16s\n",
38518383278dSScott Teel 			h->ctlr, __func__,
38528383278dSScott Teel 			h->scsi_host->host_no,
38538383278dSScott Teel 			this_device->target, this_device->lun,
38548383278dSScott Teel 			scsi_device_type(this_device->devtype),
38558383278dSScott Teel 			this_device->model);
3856edd16368SStephen M. Cameron 
3857af15ed36SDon Brace 	if ((this_device->devtype == TYPE_DISK ||
3858af15ed36SDon Brace 		this_device->devtype == TYPE_ZBC) &&
3859283b4a9bSStephen M. Cameron 		is_logical_dev_addr_mode(scsi3addr)) {
386067955ba3SStephen M. Cameron 		int volume_offline;
386167955ba3SStephen M. Cameron 
3862edd16368SStephen M. Cameron 		hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
3863283b4a9bSStephen M. Cameron 		if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC)
3864283b4a9bSStephen M. Cameron 			hpsa_get_ioaccel_status(h, scsi3addr, this_device);
386567955ba3SStephen M. Cameron 		volume_offline = hpsa_volume_offline(h, scsi3addr);
386667955ba3SStephen M. Cameron 		if (volume_offline < 0 || volume_offline > 0xff)
386767955ba3SStephen M. Cameron 			volume_offline = HPSA_VPD_LV_STATUS_UNSUPPORTED;
386867955ba3SStephen M. Cameron 		this_device->volume_offline = volume_offline & 0xff;
3869283b4a9bSStephen M. Cameron 	} else {
3870edd16368SStephen M. Cameron 		this_device->raid_level = RAID_UNKNOWN;
3871283b4a9bSStephen M. Cameron 		this_device->offload_config = 0;
3872283b4a9bSStephen M. Cameron 		this_device->offload_enabled = 0;
387341ce4c35SStephen Cameron 		this_device->offload_to_be_enabled = 0;
3874a3144e0bSJoe Handzik 		this_device->hba_ioaccel_enabled = 0;
38759846590eSStephen M. Cameron 		this_device->volume_offline = 0;
387603383736SDon Brace 		this_device->queue_depth = h->nr_cmds;
3877283b4a9bSStephen M. Cameron 	}
3878edd16368SStephen M. Cameron 
38790b0e1d6cSStephen M. Cameron 	if (is_OBDR_device) {
38800b0e1d6cSStephen M. Cameron 		/* See if this is a One-Button-Disaster-Recovery device
38810b0e1d6cSStephen M. Cameron 		 * by looking for "$DR-10" at offset 43 in inquiry data.
38820b0e1d6cSStephen M. Cameron 		 */
38830b0e1d6cSStephen M. Cameron 		obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
38840b0e1d6cSStephen M. Cameron 		*is_OBDR_device = (this_device->devtype == TYPE_ROM &&
38850b0e1d6cSStephen M. Cameron 					strncmp(obdr_sig, OBDR_TAPE_SIG,
38860b0e1d6cSStephen M. Cameron 						OBDR_SIG_LEN) == 0);
38870b0e1d6cSStephen M. Cameron 	}
3888edd16368SStephen M. Cameron 	kfree(inq_buff);
3889edd16368SStephen M. Cameron 	return 0;
3890edd16368SStephen M. Cameron 
3891edd16368SStephen M. Cameron bail_out:
3892edd16368SStephen M. Cameron 	kfree(inq_buff);
3893683fc444SDon Brace 	return rc;
3894edd16368SStephen M. Cameron }
3895edd16368SStephen M. Cameron 
38969b5c48c2SStephen Cameron static void hpsa_update_device_supports_aborts(struct ctlr_info *h,
38979b5c48c2SStephen Cameron 			struct hpsa_scsi_dev_t *dev, u8 *scsi3addr)
38989b5c48c2SStephen Cameron {
38999b5c48c2SStephen Cameron 	unsigned long flags;
39009b5c48c2SStephen Cameron 	int rc, entry;
39019b5c48c2SStephen Cameron 	/*
39029b5c48c2SStephen Cameron 	 * See if this device supports aborts.  If we already know
39039b5c48c2SStephen Cameron 	 * the device, we already know if it supports aborts, otherwise
39049b5c48c2SStephen Cameron 	 * we have to find out if it supports aborts by trying one.
39059b5c48c2SStephen Cameron 	 */
39069b5c48c2SStephen Cameron 	spin_lock_irqsave(&h->devlock, flags);
39079b5c48c2SStephen Cameron 	rc = hpsa_scsi_find_entry(dev, h->dev, h->ndevices, &entry);
39089b5c48c2SStephen Cameron 	if ((rc == DEVICE_SAME || rc == DEVICE_UPDATED) &&
39099b5c48c2SStephen Cameron 		entry >= 0 && entry < h->ndevices) {
39109b5c48c2SStephen Cameron 		dev->supports_aborts = h->dev[entry]->supports_aborts;
39119b5c48c2SStephen Cameron 		spin_unlock_irqrestore(&h->devlock, flags);
39129b5c48c2SStephen Cameron 	} else {
39139b5c48c2SStephen Cameron 		spin_unlock_irqrestore(&h->devlock, flags);
39149b5c48c2SStephen Cameron 		dev->supports_aborts =
39159b5c48c2SStephen Cameron 				hpsa_device_supports_aborts(h, scsi3addr);
39169b5c48c2SStephen Cameron 		if (dev->supports_aborts < 0)
39179b5c48c2SStephen Cameron 			dev->supports_aborts = 0;
39189b5c48c2SStephen Cameron 	}
39199b5c48c2SStephen Cameron }
39209b5c48c2SStephen Cameron 
3921c795505aSKevin Barnett /*
3922c795505aSKevin Barnett  * Helper function to assign bus, target, lun mapping of devices.
3923edd16368SStephen M. Cameron  * Logical drive target and lun are assigned at this time, but
3924edd16368SStephen M. Cameron  * physical device lun and target assignment are deferred (assigned
3925edd16368SStephen M. Cameron  * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
3926edd16368SStephen M. Cameron */
3927edd16368SStephen M. Cameron static void figure_bus_target_lun(struct ctlr_info *h,
39281f310bdeSStephen M. Cameron 	u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device)
3929edd16368SStephen M. Cameron {
3930c795505aSKevin Barnett 	u32 lunid = get_unaligned_le32(lunaddrbytes);
3931edd16368SStephen M. Cameron 
39321f310bdeSStephen M. Cameron 	if (!is_logical_dev_addr_mode(lunaddrbytes)) {
39331f310bdeSStephen M. Cameron 		/* physical device, target and lun filled in later */
3934*7630b3a5SHannes Reinecke 		if (is_hba_lunid(lunaddrbytes)) {
3935*7630b3a5SHannes Reinecke 			int bus = HPSA_HBA_BUS;
3936*7630b3a5SHannes Reinecke 
3937*7630b3a5SHannes Reinecke 			if (!device->rev)
3938*7630b3a5SHannes Reinecke 				bus = HPSA_LEGACY_HBA_BUS;
3939c795505aSKevin Barnett 			hpsa_set_bus_target_lun(device,
3940*7630b3a5SHannes Reinecke 					bus, 0, lunid & 0x3fff);
3941*7630b3a5SHannes Reinecke 		} else
39421f310bdeSStephen M. Cameron 			/* defer target, lun assignment for physical devices */
3943c795505aSKevin Barnett 			hpsa_set_bus_target_lun(device,
3944c795505aSKevin Barnett 					HPSA_PHYSICAL_DEVICE_BUS, -1, -1);
39451f310bdeSStephen M. Cameron 		return;
39461f310bdeSStephen M. Cameron 	}
39471f310bdeSStephen M. Cameron 	/* It's a logical device */
394866749d0dSScott Teel 	if (device->external) {
39491f310bdeSStephen M. Cameron 		hpsa_set_bus_target_lun(device,
3950c795505aSKevin Barnett 			HPSA_EXTERNAL_RAID_VOLUME_BUS, (lunid >> 16) & 0x3fff,
3951c795505aSKevin Barnett 			lunid & 0x00ff);
39521f310bdeSStephen M. Cameron 		return;
3953339b2b14SStephen M. Cameron 	}
3954c795505aSKevin Barnett 	hpsa_set_bus_target_lun(device, HPSA_RAID_VOLUME_BUS,
3955c795505aSKevin Barnett 				0, lunid & 0x3fff);
3956edd16368SStephen M. Cameron }
3957edd16368SStephen M. Cameron 
3958edd16368SStephen M. Cameron 
3959edd16368SStephen M. Cameron /*
396054b6e9e9SScott Teel  * Get address of physical disk used for an ioaccel2 mode command:
396154b6e9e9SScott Teel  *	1. Extract ioaccel2 handle from the command.
396254b6e9e9SScott Teel  *	2. Find a matching ioaccel2 handle from list of physical disks.
396354b6e9e9SScott Teel  *	3. Return:
396454b6e9e9SScott Teel  *		1 and set scsi3addr to address of matching physical
396554b6e9e9SScott Teel  *		0 if no matching physical disk was found.
396654b6e9e9SScott Teel  */
396754b6e9e9SScott Teel static int hpsa_get_pdisk_of_ioaccel2(struct ctlr_info *h,
396854b6e9e9SScott Teel 	struct CommandList *ioaccel2_cmd_to_abort, unsigned char *scsi3addr)
396954b6e9e9SScott Teel {
397041ce4c35SStephen Cameron 	struct io_accel2_cmd *c2 =
397141ce4c35SStephen Cameron 			&h->ioaccel2_cmd_pool[ioaccel2_cmd_to_abort->cmdindex];
397241ce4c35SStephen Cameron 	unsigned long flags;
397354b6e9e9SScott Teel 	int i;
397454b6e9e9SScott Teel 
397541ce4c35SStephen Cameron 	spin_lock_irqsave(&h->devlock, flags);
397641ce4c35SStephen Cameron 	for (i = 0; i < h->ndevices; i++)
397741ce4c35SStephen Cameron 		if (h->dev[i]->ioaccel_handle == le32_to_cpu(c2->scsi_nexus)) {
397841ce4c35SStephen Cameron 			memcpy(scsi3addr, h->dev[i]->scsi3addr,
397941ce4c35SStephen Cameron 				sizeof(h->dev[i]->scsi3addr));
398041ce4c35SStephen Cameron 			spin_unlock_irqrestore(&h->devlock, flags);
398154b6e9e9SScott Teel 			return 1;
398254b6e9e9SScott Teel 		}
398341ce4c35SStephen Cameron 	spin_unlock_irqrestore(&h->devlock, flags);
398441ce4c35SStephen Cameron 	return 0;
398541ce4c35SStephen Cameron }
398641ce4c35SStephen Cameron 
398766749d0dSScott Teel static int  figure_external_status(struct ctlr_info *h, int raid_ctlr_position,
398866749d0dSScott Teel 	int i, int nphysicals, int nlocal_logicals)
398966749d0dSScott Teel {
399066749d0dSScott Teel 	/* In report logicals, local logicals are listed first,
399166749d0dSScott Teel 	* then any externals.
399266749d0dSScott Teel 	*/
399366749d0dSScott Teel 	int logicals_start = nphysicals + (raid_ctlr_position == 0);
399466749d0dSScott Teel 
399566749d0dSScott Teel 	if (i == raid_ctlr_position)
399666749d0dSScott Teel 		return 0;
399766749d0dSScott Teel 
399866749d0dSScott Teel 	if (i < logicals_start)
399966749d0dSScott Teel 		return 0;
400066749d0dSScott Teel 
400166749d0dSScott Teel 	/* i is in logicals range, but still within local logicals */
400266749d0dSScott Teel 	if ((i - nphysicals - (raid_ctlr_position == 0)) < nlocal_logicals)
400366749d0dSScott Teel 		return 0;
400466749d0dSScott Teel 
400566749d0dSScott Teel 	return 1; /* it's an external lun */
400666749d0dSScott Teel }
400766749d0dSScott Teel 
400854b6e9e9SScott Teel /*
4009edd16368SStephen M. Cameron  * Do CISS_REPORT_PHYS and CISS_REPORT_LOG.  Data is returned in physdev,
4010edd16368SStephen M. Cameron  * logdev.  The number of luns in physdev and logdev are returned in
4011edd16368SStephen M. Cameron  * *nphysicals and *nlogicals, respectively.
4012edd16368SStephen M. Cameron  * Returns 0 on success, -1 otherwise.
4013edd16368SStephen M. Cameron  */
4014edd16368SStephen M. Cameron static int hpsa_gather_lun_info(struct ctlr_info *h,
401503383736SDon Brace 	struct ReportExtendedLUNdata *physdev, u32 *nphysicals,
401601a02ffcSStephen M. Cameron 	struct ReportLUNdata *logdev, u32 *nlogicals)
4017edd16368SStephen M. Cameron {
401803383736SDon Brace 	if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) {
4019edd16368SStephen M. Cameron 		dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
4020edd16368SStephen M. Cameron 		return -1;
4021edd16368SStephen M. Cameron 	}
402203383736SDon Brace 	*nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24;
4023edd16368SStephen M. Cameron 	if (*nphysicals > HPSA_MAX_PHYS_LUN) {
402403383736SDon Brace 		dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n",
402503383736SDon Brace 			HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN);
4026edd16368SStephen M. Cameron 		*nphysicals = HPSA_MAX_PHYS_LUN;
4027edd16368SStephen M. Cameron 	}
402803383736SDon Brace 	if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) {
4029edd16368SStephen M. Cameron 		dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
4030edd16368SStephen M. Cameron 		return -1;
4031edd16368SStephen M. Cameron 	}
40326df1e954SStephen M. Cameron 	*nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
4033edd16368SStephen M. Cameron 	/* Reject Logicals in excess of our max capability. */
4034edd16368SStephen M. Cameron 	if (*nlogicals > HPSA_MAX_LUN) {
4035edd16368SStephen M. Cameron 		dev_warn(&h->pdev->dev,
4036edd16368SStephen M. Cameron 			"maximum logical LUNs (%d) exceeded.  "
4037edd16368SStephen M. Cameron 			"%d LUNs ignored.\n", HPSA_MAX_LUN,
4038edd16368SStephen M. Cameron 			*nlogicals - HPSA_MAX_LUN);
4039edd16368SStephen M. Cameron 			*nlogicals = HPSA_MAX_LUN;
4040edd16368SStephen M. Cameron 	}
4041edd16368SStephen M. Cameron 	if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
4042edd16368SStephen M. Cameron 		dev_warn(&h->pdev->dev,
4043edd16368SStephen M. Cameron 			"maximum logical + physical LUNs (%d) exceeded. "
4044edd16368SStephen M. Cameron 			"%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
4045edd16368SStephen M. Cameron 			*nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
4046edd16368SStephen M. Cameron 		*nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
4047edd16368SStephen M. Cameron 	}
4048edd16368SStephen M. Cameron 	return 0;
4049edd16368SStephen M. Cameron }
4050edd16368SStephen M. Cameron 
405142a91641SDon Brace static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position,
405242a91641SDon Brace 	int i, int nphysicals, int nlogicals,
4053a93aa1feSMatt Gates 	struct ReportExtendedLUNdata *physdev_list,
4054339b2b14SStephen M. Cameron 	struct ReportLUNdata *logdev_list)
4055339b2b14SStephen M. Cameron {
4056339b2b14SStephen M. Cameron 	/* Helper function, figure out where the LUN ID info is coming from
4057339b2b14SStephen M. Cameron 	 * given index i, lists of physical and logical devices, where in
4058339b2b14SStephen M. Cameron 	 * the list the raid controller is supposed to appear (first or last)
4059339b2b14SStephen M. Cameron 	 */
4060339b2b14SStephen M. Cameron 
4061339b2b14SStephen M. Cameron 	int logicals_start = nphysicals + (raid_ctlr_position == 0);
4062339b2b14SStephen M. Cameron 	int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
4063339b2b14SStephen M. Cameron 
4064339b2b14SStephen M. Cameron 	if (i == raid_ctlr_position)
4065339b2b14SStephen M. Cameron 		return RAID_CTLR_LUNID;
4066339b2b14SStephen M. Cameron 
4067339b2b14SStephen M. Cameron 	if (i < logicals_start)
4068d5b5d964SStephen M. Cameron 		return &physdev_list->LUN[i -
4069d5b5d964SStephen M. Cameron 				(raid_ctlr_position == 0)].lunid[0];
4070339b2b14SStephen M. Cameron 
4071339b2b14SStephen M. Cameron 	if (i < last_device)
4072339b2b14SStephen M. Cameron 		return &logdev_list->LUN[i - nphysicals -
4073339b2b14SStephen M. Cameron 			(raid_ctlr_position == 0)][0];
4074339b2b14SStephen M. Cameron 	BUG();
4075339b2b14SStephen M. Cameron 	return NULL;
4076339b2b14SStephen M. Cameron }
4077339b2b14SStephen M. Cameron 
407803383736SDon Brace /* get physical drive ioaccel handle and queue depth */
407903383736SDon Brace static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h,
408003383736SDon Brace 		struct hpsa_scsi_dev_t *dev,
4081f2039b03SDon Brace 		struct ReportExtendedLUNdata *rlep, int rle_index,
408203383736SDon Brace 		struct bmic_identify_physical_device *id_phys)
408303383736SDon Brace {
408403383736SDon Brace 	int rc;
40854b6e5597SScott Teel 	struct ext_report_lun_entry *rle;
40864b6e5597SScott Teel 
40874b6e5597SScott Teel 	/*
40884b6e5597SScott Teel 	 * external targets don't support BMIC
40894b6e5597SScott Teel 	 */
40904b6e5597SScott Teel 	if (dev->external) {
40914b6e5597SScott Teel 		dev->queue_depth = 7;
40924b6e5597SScott Teel 		return;
40934b6e5597SScott Teel 	}
40944b6e5597SScott Teel 
40954b6e5597SScott Teel 	rle = &rlep->LUN[rle_index];
409603383736SDon Brace 
409703383736SDon Brace 	dev->ioaccel_handle = rle->ioaccel_handle;
4098f2039b03SDon Brace 	if ((rle->device_flags & 0x08) && dev->ioaccel_handle)
4099a3144e0bSJoe Handzik 		dev->hba_ioaccel_enabled = 1;
410003383736SDon Brace 	memset(id_phys, 0, sizeof(*id_phys));
4101f2039b03SDon Brace 	rc = hpsa_bmic_id_physical_device(h, &rle->lunid[0],
4102f2039b03SDon Brace 			GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]), id_phys,
410303383736SDon Brace 			sizeof(*id_phys));
410403383736SDon Brace 	if (!rc)
410503383736SDon Brace 		/* Reserve space for FW operations */
410603383736SDon Brace #define DRIVE_CMDS_RESERVED_FOR_FW 2
410703383736SDon Brace #define DRIVE_QUEUE_DEPTH 7
410803383736SDon Brace 		dev->queue_depth =
410903383736SDon Brace 			le16_to_cpu(id_phys->current_queue_depth_limit) -
411003383736SDon Brace 				DRIVE_CMDS_RESERVED_FOR_FW;
411103383736SDon Brace 	else
411203383736SDon Brace 		dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */
411303383736SDon Brace }
411403383736SDon Brace 
41158270b862SJoe Handzik static void hpsa_get_path_info(struct hpsa_scsi_dev_t *this_device,
4116f2039b03SDon Brace 	struct ReportExtendedLUNdata *rlep, int rle_index,
41178270b862SJoe Handzik 	struct bmic_identify_physical_device *id_phys)
41188270b862SJoe Handzik {
4119f2039b03SDon Brace 	struct ext_report_lun_entry *rle = &rlep->LUN[rle_index];
4120f2039b03SDon Brace 
4121f2039b03SDon Brace 	if ((rle->device_flags & 0x08) && this_device->ioaccel_handle)
41228270b862SJoe Handzik 		this_device->hba_ioaccel_enabled = 1;
41238270b862SJoe Handzik 
41248270b862SJoe Handzik 	memcpy(&this_device->active_path_index,
41258270b862SJoe Handzik 		&id_phys->active_path_number,
41268270b862SJoe Handzik 		sizeof(this_device->active_path_index));
41278270b862SJoe Handzik 	memcpy(&this_device->path_map,
41288270b862SJoe Handzik 		&id_phys->redundant_path_present_map,
41298270b862SJoe Handzik 		sizeof(this_device->path_map));
41308270b862SJoe Handzik 	memcpy(&this_device->box,
41318270b862SJoe Handzik 		&id_phys->alternate_paths_phys_box_on_port,
41328270b862SJoe Handzik 		sizeof(this_device->box));
41338270b862SJoe Handzik 	memcpy(&this_device->phys_connector,
41348270b862SJoe Handzik 		&id_phys->alternate_paths_phys_connector,
41358270b862SJoe Handzik 		sizeof(this_device->phys_connector));
41368270b862SJoe Handzik 	memcpy(&this_device->bay,
41378270b862SJoe Handzik 		&id_phys->phys_bay_in_box,
41388270b862SJoe Handzik 		sizeof(this_device->bay));
41398270b862SJoe Handzik }
41408270b862SJoe Handzik 
414166749d0dSScott Teel /* get number of local logical disks. */
414266749d0dSScott Teel static int hpsa_set_local_logical_count(struct ctlr_info *h,
414366749d0dSScott Teel 	struct bmic_identify_controller *id_ctlr,
414466749d0dSScott Teel 	u32 *nlocals)
414566749d0dSScott Teel {
414666749d0dSScott Teel 	int rc;
414766749d0dSScott Teel 
414866749d0dSScott Teel 	if (!id_ctlr) {
414966749d0dSScott Teel 		dev_warn(&h->pdev->dev, "%s: id_ctlr buffer is NULL.\n",
415066749d0dSScott Teel 			__func__);
415166749d0dSScott Teel 		return -ENOMEM;
415266749d0dSScott Teel 	}
415366749d0dSScott Teel 	memset(id_ctlr, 0, sizeof(*id_ctlr));
415466749d0dSScott Teel 	rc = hpsa_bmic_id_controller(h, id_ctlr, sizeof(*id_ctlr));
415566749d0dSScott Teel 	if (!rc)
415666749d0dSScott Teel 		if (id_ctlr->configured_logical_drive_count < 256)
415766749d0dSScott Teel 			*nlocals = id_ctlr->configured_logical_drive_count;
415866749d0dSScott Teel 		else
415966749d0dSScott Teel 			*nlocals = le16_to_cpu(
416066749d0dSScott Teel 					id_ctlr->extended_logical_unit_count);
416166749d0dSScott Teel 	else
416266749d0dSScott Teel 		*nlocals = -1;
416366749d0dSScott Teel 	return rc;
416466749d0dSScott Teel }
416566749d0dSScott Teel 
416664ce60caSDon Brace static bool hpsa_is_disk_spare(struct ctlr_info *h, u8 *lunaddrbytes)
416764ce60caSDon Brace {
416864ce60caSDon Brace 	struct bmic_identify_physical_device *id_phys;
416964ce60caSDon Brace 	bool is_spare = false;
417064ce60caSDon Brace 	int rc;
417164ce60caSDon Brace 
417264ce60caSDon Brace 	id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
417364ce60caSDon Brace 	if (!id_phys)
417464ce60caSDon Brace 		return false;
417564ce60caSDon Brace 
417664ce60caSDon Brace 	rc = hpsa_bmic_id_physical_device(h,
417764ce60caSDon Brace 					lunaddrbytes,
417864ce60caSDon Brace 					GET_BMIC_DRIVE_NUMBER(lunaddrbytes),
417964ce60caSDon Brace 					id_phys, sizeof(*id_phys));
418064ce60caSDon Brace 	if (rc == 0)
418164ce60caSDon Brace 		is_spare = (id_phys->more_flags >> 6) & 0x01;
418264ce60caSDon Brace 
418364ce60caSDon Brace 	kfree(id_phys);
418464ce60caSDon Brace 	return is_spare;
418564ce60caSDon Brace }
418664ce60caSDon Brace 
418764ce60caSDon Brace #define RPL_DEV_FLAG_NON_DISK                           0x1
418864ce60caSDon Brace #define RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED  0x2
418964ce60caSDon Brace #define RPL_DEV_FLAG_UNCONFIG_DISK                      0x4
419064ce60caSDon Brace 
419164ce60caSDon Brace #define BMIC_DEVICE_TYPE_ENCLOSURE  6
419264ce60caSDon Brace 
419364ce60caSDon Brace static bool hpsa_skip_device(struct ctlr_info *h, u8 *lunaddrbytes,
419464ce60caSDon Brace 				struct ext_report_lun_entry *rle)
419564ce60caSDon Brace {
419664ce60caSDon Brace 	u8 device_flags;
419764ce60caSDon Brace 	u8 device_type;
419864ce60caSDon Brace 
419964ce60caSDon Brace 	if (!MASKED_DEVICE(lunaddrbytes))
420064ce60caSDon Brace 		return false;
420164ce60caSDon Brace 
420264ce60caSDon Brace 	device_flags = rle->device_flags;
420364ce60caSDon Brace 	device_type = rle->device_type;
420464ce60caSDon Brace 
420564ce60caSDon Brace 	if (device_flags & RPL_DEV_FLAG_NON_DISK) {
420664ce60caSDon Brace 		if (device_type == BMIC_DEVICE_TYPE_ENCLOSURE)
420764ce60caSDon Brace 			return false;
420864ce60caSDon Brace 		return true;
420964ce60caSDon Brace 	}
421064ce60caSDon Brace 
421164ce60caSDon Brace 	if (!(device_flags & RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED))
421264ce60caSDon Brace 		return false;
421364ce60caSDon Brace 
421464ce60caSDon Brace 	if (device_flags & RPL_DEV_FLAG_UNCONFIG_DISK)
421564ce60caSDon Brace 		return false;
421664ce60caSDon Brace 
421764ce60caSDon Brace 	/*
421864ce60caSDon Brace 	 * Spares may be spun down, we do not want to
421964ce60caSDon Brace 	 * do an Inquiry to a RAID set spare drive as
422064ce60caSDon Brace 	 * that would have them spun up, that is a
422164ce60caSDon Brace 	 * performance hit because I/O to the RAID device
422264ce60caSDon Brace 	 * stops while the spin up occurs which can take
422364ce60caSDon Brace 	 * over 50 seconds.
422464ce60caSDon Brace 	 */
422564ce60caSDon Brace 	if (hpsa_is_disk_spare(h, lunaddrbytes))
422664ce60caSDon Brace 		return true;
422764ce60caSDon Brace 
422864ce60caSDon Brace 	return false;
422964ce60caSDon Brace }
423066749d0dSScott Teel 
42318aa60681SDon Brace static void hpsa_update_scsi_devices(struct ctlr_info *h)
4232edd16368SStephen M. Cameron {
4233edd16368SStephen M. Cameron 	/* the idea here is we could get notified
4234edd16368SStephen M. Cameron 	 * that some devices have changed, so we do a report
4235edd16368SStephen M. Cameron 	 * physical luns and report logical luns cmd, and adjust
4236edd16368SStephen M. Cameron 	 * our list of devices accordingly.
4237edd16368SStephen M. Cameron 	 *
4238edd16368SStephen M. Cameron 	 * The scsi3addr's of devices won't change so long as the
4239edd16368SStephen M. Cameron 	 * adapter is not reset.  That means we can rescan and
4240edd16368SStephen M. Cameron 	 * tell which devices we already know about, vs. new
4241edd16368SStephen M. Cameron 	 * devices, vs.  disappearing devices.
4242edd16368SStephen M. Cameron 	 */
4243a93aa1feSMatt Gates 	struct ReportExtendedLUNdata *physdev_list = NULL;
4244edd16368SStephen M. Cameron 	struct ReportLUNdata *logdev_list = NULL;
424503383736SDon Brace 	struct bmic_identify_physical_device *id_phys = NULL;
424666749d0dSScott Teel 	struct bmic_identify_controller *id_ctlr = NULL;
424701a02ffcSStephen M. Cameron 	u32 nphysicals = 0;
424801a02ffcSStephen M. Cameron 	u32 nlogicals = 0;
424966749d0dSScott Teel 	u32 nlocal_logicals = 0;
425001a02ffcSStephen M. Cameron 	u32 ndev_allocated = 0;
4251edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
4252edd16368SStephen M. Cameron 	int ncurrent = 0;
42534f4eb9f1SScott Teel 	int i, n_ext_target_devs, ndevs_to_allocate;
4254339b2b14SStephen M. Cameron 	int raid_ctlr_position;
425504fa2f44SKevin Barnett 	bool physical_device;
4256aca4a520SScott Teel 	DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS);
4257edd16368SStephen M. Cameron 
4258cfe5badcSScott Teel 	currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL);
425992084715SStephen M. Cameron 	physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL);
426092084715SStephen M. Cameron 	logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL);
4261edd16368SStephen M. Cameron 	tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
426203383736SDon Brace 	id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
426366749d0dSScott Teel 	id_ctlr = kzalloc(sizeof(*id_ctlr), GFP_KERNEL);
4264edd16368SStephen M. Cameron 
426503383736SDon Brace 	if (!currentsd || !physdev_list || !logdev_list ||
426666749d0dSScott Teel 		!tmpdevice || !id_phys || !id_ctlr) {
4267edd16368SStephen M. Cameron 		dev_err(&h->pdev->dev, "out of memory\n");
4268edd16368SStephen M. Cameron 		goto out;
4269edd16368SStephen M. Cameron 	}
4270edd16368SStephen M. Cameron 	memset(lunzerobits, 0, sizeof(lunzerobits));
4271edd16368SStephen M. Cameron 
4272853633e8SDon Brace 	h->drv_req_rescan = 0; /* cancel scheduled rescan - we're doing it. */
4273853633e8SDon Brace 
427403383736SDon Brace 	if (hpsa_gather_lun_info(h, physdev_list, &nphysicals,
4275853633e8SDon Brace 			logdev_list, &nlogicals)) {
4276853633e8SDon Brace 		h->drv_req_rescan = 1;
4277edd16368SStephen M. Cameron 		goto out;
4278853633e8SDon Brace 	}
4279edd16368SStephen M. Cameron 
428066749d0dSScott Teel 	/* Set number of local logicals (non PTRAID) */
428166749d0dSScott Teel 	if (hpsa_set_local_logical_count(h, id_ctlr, &nlocal_logicals)) {
428266749d0dSScott Teel 		dev_warn(&h->pdev->dev,
428366749d0dSScott Teel 			"%s: Can't determine number of local logical devices.\n",
428466749d0dSScott Teel 			__func__);
428566749d0dSScott Teel 	}
4286edd16368SStephen M. Cameron 
4287aca4a520SScott Teel 	/* We might see up to the maximum number of logical and physical disks
4288aca4a520SScott Teel 	 * plus external target devices, and a device for the local RAID
4289aca4a520SScott Teel 	 * controller.
4290edd16368SStephen M. Cameron 	 */
4291aca4a520SScott Teel 	ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1;
4292edd16368SStephen M. Cameron 
4293edd16368SStephen M. Cameron 	/* Allocate the per device structures */
4294edd16368SStephen M. Cameron 	for (i = 0; i < ndevs_to_allocate; i++) {
4295b7ec021fSScott Teel 		if (i >= HPSA_MAX_DEVICES) {
4296b7ec021fSScott Teel 			dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
4297b7ec021fSScott Teel 				"  %d devices ignored.\n", HPSA_MAX_DEVICES,
4298b7ec021fSScott Teel 				ndevs_to_allocate - HPSA_MAX_DEVICES);
4299b7ec021fSScott Teel 			break;
4300b7ec021fSScott Teel 		}
4301b7ec021fSScott Teel 
4302edd16368SStephen M. Cameron 		currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
4303edd16368SStephen M. Cameron 		if (!currentsd[i]) {
4304edd16368SStephen M. Cameron 			dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
4305edd16368SStephen M. Cameron 				__FILE__, __LINE__);
4306853633e8SDon Brace 			h->drv_req_rescan = 1;
4307edd16368SStephen M. Cameron 			goto out;
4308edd16368SStephen M. Cameron 		}
4309edd16368SStephen M. Cameron 		ndev_allocated++;
4310edd16368SStephen M. Cameron 	}
4311edd16368SStephen M. Cameron 
43128645291bSStephen M. Cameron 	if (is_scsi_rev_5(h))
4313339b2b14SStephen M. Cameron 		raid_ctlr_position = 0;
4314339b2b14SStephen M. Cameron 	else
4315339b2b14SStephen M. Cameron 		raid_ctlr_position = nphysicals + nlogicals;
4316339b2b14SStephen M. Cameron 
4317edd16368SStephen M. Cameron 	/* adjust our table of devices */
43184f4eb9f1SScott Teel 	n_ext_target_devs = 0;
4319edd16368SStephen M. Cameron 	for (i = 0; i < nphysicals + nlogicals + 1; i++) {
43200b0e1d6cSStephen M. Cameron 		u8 *lunaddrbytes, is_OBDR = 0;
4321683fc444SDon Brace 		int rc = 0;
4322f2039b03SDon Brace 		int phys_dev_index = i - (raid_ctlr_position == 0);
432364ce60caSDon Brace 		bool skip_device = false;
4324edd16368SStephen M. Cameron 
432504fa2f44SKevin Barnett 		physical_device = i < nphysicals + (raid_ctlr_position == 0);
4326edd16368SStephen M. Cameron 
4327edd16368SStephen M. Cameron 		/* Figure out where the LUN ID info is coming from */
4328339b2b14SStephen M. Cameron 		lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
4329339b2b14SStephen M. Cameron 			i, nphysicals, nlogicals, physdev_list, logdev_list);
433041ce4c35SStephen Cameron 
433186cf7130SDon Brace 		/* Determine if this is a lun from an external target array */
433286cf7130SDon Brace 		tmpdevice->external =
433386cf7130SDon Brace 			figure_external_status(h, raid_ctlr_position, i,
433486cf7130SDon Brace 						nphysicals, nlocal_logicals);
433586cf7130SDon Brace 
433664ce60caSDon Brace 		/*
433764ce60caSDon Brace 		 * Skip over some devices such as a spare.
433864ce60caSDon Brace 		 */
433964ce60caSDon Brace 		if (!tmpdevice->external && physical_device) {
434064ce60caSDon Brace 			skip_device = hpsa_skip_device(h, lunaddrbytes,
434164ce60caSDon Brace 					&physdev_list->LUN[phys_dev_index]);
434264ce60caSDon Brace 			if (skip_device)
4343edd16368SStephen M. Cameron 				continue;
434464ce60caSDon Brace 		}
4345edd16368SStephen M. Cameron 
4346edd16368SStephen M. Cameron 		/* Get device type, vendor, model, device id */
4347683fc444SDon Brace 		rc = hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
4348683fc444SDon Brace 							&is_OBDR);
4349683fc444SDon Brace 		if (rc == -ENOMEM) {
4350683fc444SDon Brace 			dev_warn(&h->pdev->dev,
4351683fc444SDon Brace 				"Out of memory, rescan deferred.\n");
4352853633e8SDon Brace 			h->drv_req_rescan = 1;
4353683fc444SDon Brace 			goto out;
4354853633e8SDon Brace 		}
4355683fc444SDon Brace 		if (rc) {
4356683fc444SDon Brace 			dev_warn(&h->pdev->dev,
4357683fc444SDon Brace 				"Inquiry failed, skipping device.\n");
4358683fc444SDon Brace 			continue;
4359683fc444SDon Brace 		}
4360683fc444SDon Brace 
43611f310bdeSStephen M. Cameron 		figure_bus_target_lun(h, lunaddrbytes, tmpdevice);
43629b5c48c2SStephen Cameron 		hpsa_update_device_supports_aborts(h, tmpdevice, lunaddrbytes);
4363edd16368SStephen M. Cameron 		this_device = currentsd[ncurrent];
4364edd16368SStephen M. Cameron 
436534592254SScott Teel 		/* Turn on discovery_polling if there are ext target devices.
436634592254SScott Teel 		 * Event-based change notification is unreliable for those.
4367edd16368SStephen M. Cameron 		 */
436834592254SScott Teel 		if (!h->discovery_polling) {
436934592254SScott Teel 			if (tmpdevice->external) {
437034592254SScott Teel 				h->discovery_polling = 1;
437134592254SScott Teel 				dev_info(&h->pdev->dev,
437234592254SScott Teel 					"External target, activate discovery polling.\n");
4373edd16368SStephen M. Cameron 			}
437434592254SScott Teel 		}
437534592254SScott Teel 
4376edd16368SStephen M. Cameron 
4377edd16368SStephen M. Cameron 		*this_device = *tmpdevice;
437804fa2f44SKevin Barnett 		this_device->physical_device = physical_device;
4379edd16368SStephen M. Cameron 
438004fa2f44SKevin Barnett 		/*
438104fa2f44SKevin Barnett 		 * Expose all devices except for physical devices that
438204fa2f44SKevin Barnett 		 * are masked.
438304fa2f44SKevin Barnett 		 */
438404fa2f44SKevin Barnett 		if (MASKED_DEVICE(lunaddrbytes) && this_device->physical_device)
43852a168208SKevin Barnett 			this_device->expose_device = 0;
43862a168208SKevin Barnett 		else
43872a168208SKevin Barnett 			this_device->expose_device = 1;
438841ce4c35SStephen Cameron 
4389d04e62b9SKevin Barnett 
4390d04e62b9SKevin Barnett 		/*
4391d04e62b9SKevin Barnett 		 * Get the SAS address for physical devices that are exposed.
4392d04e62b9SKevin Barnett 		 */
4393d04e62b9SKevin Barnett 		if (this_device->physical_device && this_device->expose_device)
4394d04e62b9SKevin Barnett 			hpsa_get_sas_address(h, lunaddrbytes, this_device);
4395edd16368SStephen M. Cameron 
4396edd16368SStephen M. Cameron 		switch (this_device->devtype) {
43970b0e1d6cSStephen M. Cameron 		case TYPE_ROM:
4398edd16368SStephen M. Cameron 			/* We don't *really* support actual CD-ROM devices,
4399edd16368SStephen M. Cameron 			 * just "One Button Disaster Recovery" tape drive
4400edd16368SStephen M. Cameron 			 * which temporarily pretends to be a CD-ROM drive.
4401edd16368SStephen M. Cameron 			 * So we check that the device is really an OBDR tape
4402edd16368SStephen M. Cameron 			 * device by checking for "$DR-10" in bytes 43-48 of
4403edd16368SStephen M. Cameron 			 * the inquiry data.
4404edd16368SStephen M. Cameron 			 */
44050b0e1d6cSStephen M. Cameron 			if (is_OBDR)
4406edd16368SStephen M. Cameron 				ncurrent++;
4407edd16368SStephen M. Cameron 			break;
4408edd16368SStephen M. Cameron 		case TYPE_DISK:
4409af15ed36SDon Brace 		case TYPE_ZBC:
441004fa2f44SKevin Barnett 			if (this_device->physical_device) {
4411b9092b79SKevin Barnett 				/* The disk is in HBA mode. */
4412b9092b79SKevin Barnett 				/* Never use RAID mapper in HBA mode. */
4413ecf418d1SJoe Handzik 				this_device->offload_enabled = 0;
441403383736SDon Brace 				hpsa_get_ioaccel_drive_info(h, this_device,
4415f2039b03SDon Brace 					physdev_list, phys_dev_index, id_phys);
4416f2039b03SDon Brace 				hpsa_get_path_info(this_device,
4417f2039b03SDon Brace 					physdev_list, phys_dev_index, id_phys);
4418b9092b79SKevin Barnett 			}
4419edd16368SStephen M. Cameron 			ncurrent++;
4420edd16368SStephen M. Cameron 			break;
4421edd16368SStephen M. Cameron 		case TYPE_TAPE:
4422edd16368SStephen M. Cameron 		case TYPE_MEDIUM_CHANGER:
4423cca8f13bSDon Brace 			ncurrent++;
4424cca8f13bSDon Brace 			break;
442541ce4c35SStephen Cameron 		case TYPE_ENCLOSURE:
442617a9e54aSDon Brace 			if (!this_device->external)
4427cca8f13bSDon Brace 				hpsa_get_enclosure_info(h, lunaddrbytes,
4428cca8f13bSDon Brace 						physdev_list, phys_dev_index,
4429cca8f13bSDon Brace 						this_device);
443041ce4c35SStephen Cameron 			ncurrent++;
443141ce4c35SStephen Cameron 			break;
4432edd16368SStephen M. Cameron 		case TYPE_RAID:
4433edd16368SStephen M. Cameron 			/* Only present the Smartarray HBA as a RAID controller.
4434edd16368SStephen M. Cameron 			 * If it's a RAID controller other than the HBA itself
4435edd16368SStephen M. Cameron 			 * (an external RAID controller, MSA500 or similar)
4436edd16368SStephen M. Cameron 			 * don't present it.
4437edd16368SStephen M. Cameron 			 */
4438edd16368SStephen M. Cameron 			if (!is_hba_lunid(lunaddrbytes))
4439edd16368SStephen M. Cameron 				break;
4440edd16368SStephen M. Cameron 			ncurrent++;
4441edd16368SStephen M. Cameron 			break;
4442edd16368SStephen M. Cameron 		default:
4443edd16368SStephen M. Cameron 			break;
4444edd16368SStephen M. Cameron 		}
4445cfe5badcSScott Teel 		if (ncurrent >= HPSA_MAX_DEVICES)
4446edd16368SStephen M. Cameron 			break;
4447edd16368SStephen M. Cameron 	}
4448d04e62b9SKevin Barnett 
4449d04e62b9SKevin Barnett 	if (h->sas_host == NULL) {
4450d04e62b9SKevin Barnett 		int rc = 0;
4451d04e62b9SKevin Barnett 
4452d04e62b9SKevin Barnett 		rc = hpsa_add_sas_host(h);
4453d04e62b9SKevin Barnett 		if (rc) {
4454d04e62b9SKevin Barnett 			dev_warn(&h->pdev->dev,
4455d04e62b9SKevin Barnett 				"Could not add sas host %d\n", rc);
4456d04e62b9SKevin Barnett 			goto out;
4457d04e62b9SKevin Barnett 		}
4458d04e62b9SKevin Barnett 	}
4459d04e62b9SKevin Barnett 
44608aa60681SDon Brace 	adjust_hpsa_scsi_table(h, currentsd, ncurrent);
4461edd16368SStephen M. Cameron out:
4462edd16368SStephen M. Cameron 	kfree(tmpdevice);
4463edd16368SStephen M. Cameron 	for (i = 0; i < ndev_allocated; i++)
4464edd16368SStephen M. Cameron 		kfree(currentsd[i]);
4465edd16368SStephen M. Cameron 	kfree(currentsd);
4466edd16368SStephen M. Cameron 	kfree(physdev_list);
4467edd16368SStephen M. Cameron 	kfree(logdev_list);
446866749d0dSScott Teel 	kfree(id_ctlr);
446903383736SDon Brace 	kfree(id_phys);
4470edd16368SStephen M. Cameron }
4471edd16368SStephen M. Cameron 
4472ec5cbf04SWebb Scales static void hpsa_set_sg_descriptor(struct SGDescriptor *desc,
4473ec5cbf04SWebb Scales 				   struct scatterlist *sg)
4474ec5cbf04SWebb Scales {
4475ec5cbf04SWebb Scales 	u64 addr64 = (u64) sg_dma_address(sg);
4476ec5cbf04SWebb Scales 	unsigned int len = sg_dma_len(sg);
4477ec5cbf04SWebb Scales 
4478ec5cbf04SWebb Scales 	desc->Addr = cpu_to_le64(addr64);
4479ec5cbf04SWebb Scales 	desc->Len = cpu_to_le32(len);
4480ec5cbf04SWebb Scales 	desc->Ext = 0;
4481ec5cbf04SWebb Scales }
4482ec5cbf04SWebb Scales 
4483c7ee65b3SWebb Scales /*
4484c7ee65b3SWebb Scales  * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
4485edd16368SStephen M. Cameron  * dma mapping  and fills in the scatter gather entries of the
4486edd16368SStephen M. Cameron  * hpsa command, cp.
4487edd16368SStephen M. Cameron  */
448833a2ffceSStephen M. Cameron static int hpsa_scatter_gather(struct ctlr_info *h,
4489edd16368SStephen M. Cameron 		struct CommandList *cp,
4490edd16368SStephen M. Cameron 		struct scsi_cmnd *cmd)
4491edd16368SStephen M. Cameron {
4492edd16368SStephen M. Cameron 	struct scatterlist *sg;
4493b3a7ba7cSWebb Scales 	int use_sg, i, sg_limit, chained, last_sg;
449433a2ffceSStephen M. Cameron 	struct SGDescriptor *curr_sg;
4495edd16368SStephen M. Cameron 
449633a2ffceSStephen M. Cameron 	BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
4497edd16368SStephen M. Cameron 
4498edd16368SStephen M. Cameron 	use_sg = scsi_dma_map(cmd);
4499edd16368SStephen M. Cameron 	if (use_sg < 0)
4500edd16368SStephen M. Cameron 		return use_sg;
4501edd16368SStephen M. Cameron 
4502edd16368SStephen M. Cameron 	if (!use_sg)
4503edd16368SStephen M. Cameron 		goto sglist_finished;
4504edd16368SStephen M. Cameron 
4505b3a7ba7cSWebb Scales 	/*
4506b3a7ba7cSWebb Scales 	 * If the number of entries is greater than the max for a single list,
4507b3a7ba7cSWebb Scales 	 * then we have a chained list; we will set up all but one entry in the
4508b3a7ba7cSWebb Scales 	 * first list (the last entry is saved for link information);
4509b3a7ba7cSWebb Scales 	 * otherwise, we don't have a chained list and we'll set up at each of
4510b3a7ba7cSWebb Scales 	 * the entries in the one list.
4511b3a7ba7cSWebb Scales 	 */
451233a2ffceSStephen M. Cameron 	curr_sg = cp->SG;
4513b3a7ba7cSWebb Scales 	chained = use_sg > h->max_cmd_sg_entries;
4514b3a7ba7cSWebb Scales 	sg_limit = chained ? h->max_cmd_sg_entries - 1 : use_sg;
4515b3a7ba7cSWebb Scales 	last_sg = scsi_sg_count(cmd) - 1;
4516b3a7ba7cSWebb Scales 	scsi_for_each_sg(cmd, sg, sg_limit, i) {
4517ec5cbf04SWebb Scales 		hpsa_set_sg_descriptor(curr_sg, sg);
451833a2ffceSStephen M. Cameron 		curr_sg++;
451933a2ffceSStephen M. Cameron 	}
4520ec5cbf04SWebb Scales 
4521b3a7ba7cSWebb Scales 	if (chained) {
4522b3a7ba7cSWebb Scales 		/*
4523b3a7ba7cSWebb Scales 		 * Continue with the chained list.  Set curr_sg to the chained
4524b3a7ba7cSWebb Scales 		 * list.  Modify the limit to the total count less the entries
4525b3a7ba7cSWebb Scales 		 * we've already set up.  Resume the scan at the list entry
4526b3a7ba7cSWebb Scales 		 * where the previous loop left off.
4527b3a7ba7cSWebb Scales 		 */
4528b3a7ba7cSWebb Scales 		curr_sg = h->cmd_sg_list[cp->cmdindex];
4529b3a7ba7cSWebb Scales 		sg_limit = use_sg - sg_limit;
4530b3a7ba7cSWebb Scales 		for_each_sg(sg, sg, sg_limit, i) {
4531b3a7ba7cSWebb Scales 			hpsa_set_sg_descriptor(curr_sg, sg);
4532b3a7ba7cSWebb Scales 			curr_sg++;
4533b3a7ba7cSWebb Scales 		}
4534b3a7ba7cSWebb Scales 	}
4535b3a7ba7cSWebb Scales 
4536ec5cbf04SWebb Scales 	/* Back the pointer up to the last entry and mark it as "last". */
4537b3a7ba7cSWebb Scales 	(curr_sg - 1)->Ext = cpu_to_le32(HPSA_SG_LAST);
453833a2ffceSStephen M. Cameron 
453933a2ffceSStephen M. Cameron 	if (use_sg + chained > h->maxSG)
454033a2ffceSStephen M. Cameron 		h->maxSG = use_sg + chained;
454133a2ffceSStephen M. Cameron 
454233a2ffceSStephen M. Cameron 	if (chained) {
454333a2ffceSStephen M. Cameron 		cp->Header.SGList = h->max_cmd_sg_entries;
454450a0decfSStephen M. Cameron 		cp->Header.SGTotal = cpu_to_le16(use_sg + 1);
4545e2bea6dfSStephen M. Cameron 		if (hpsa_map_sg_chain_block(h, cp)) {
4546e2bea6dfSStephen M. Cameron 			scsi_dma_unmap(cmd);
4547e2bea6dfSStephen M. Cameron 			return -1;
4548e2bea6dfSStephen M. Cameron 		}
454933a2ffceSStephen M. Cameron 		return 0;
4550edd16368SStephen M. Cameron 	}
4551edd16368SStephen M. Cameron 
4552edd16368SStephen M. Cameron sglist_finished:
4553edd16368SStephen M. Cameron 
455401a02ffcSStephen M. Cameron 	cp->Header.SGList = (u8) use_sg;   /* no. SGs contig in this cmd */
4555c7ee65b3SWebb Scales 	cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */
4556edd16368SStephen M. Cameron 	return 0;
4557edd16368SStephen M. Cameron }
4558edd16368SStephen M. Cameron 
4559283b4a9bSStephen M. Cameron #define IO_ACCEL_INELIGIBLE (1)
4560283b4a9bSStephen M. Cameron static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len)
4561283b4a9bSStephen M. Cameron {
4562283b4a9bSStephen M. Cameron 	int is_write = 0;
4563283b4a9bSStephen M. Cameron 	u32 block;
4564283b4a9bSStephen M. Cameron 	u32 block_cnt;
4565283b4a9bSStephen M. Cameron 
4566283b4a9bSStephen M. Cameron 	/* Perform some CDB fixups if needed using 10 byte reads/writes only */
4567283b4a9bSStephen M. Cameron 	switch (cdb[0]) {
4568283b4a9bSStephen M. Cameron 	case WRITE_6:
4569283b4a9bSStephen M. Cameron 	case WRITE_12:
4570283b4a9bSStephen M. Cameron 		is_write = 1;
4571283b4a9bSStephen M. Cameron 	case READ_6:
4572283b4a9bSStephen M. Cameron 	case READ_12:
4573283b4a9bSStephen M. Cameron 		if (*cdb_len == 6) {
4574abbada71SMahesh Rajashekhara 			block = (((cdb[1] & 0x1F) << 16) |
4575abbada71SMahesh Rajashekhara 				(cdb[2] << 8) |
4576abbada71SMahesh Rajashekhara 				cdb[3]);
4577283b4a9bSStephen M. Cameron 			block_cnt = cdb[4];
4578c8a6c9a6SDon Brace 			if (block_cnt == 0)
4579c8a6c9a6SDon Brace 				block_cnt = 256;
4580283b4a9bSStephen M. Cameron 		} else {
4581283b4a9bSStephen M. Cameron 			BUG_ON(*cdb_len != 12);
4582c8a6c9a6SDon Brace 			block = get_unaligned_be32(&cdb[2]);
4583c8a6c9a6SDon Brace 			block_cnt = get_unaligned_be32(&cdb[6]);
4584283b4a9bSStephen M. Cameron 		}
4585283b4a9bSStephen M. Cameron 		if (block_cnt > 0xffff)
4586283b4a9bSStephen M. Cameron 			return IO_ACCEL_INELIGIBLE;
4587283b4a9bSStephen M. Cameron 
4588283b4a9bSStephen M. Cameron 		cdb[0] = is_write ? WRITE_10 : READ_10;
4589283b4a9bSStephen M. Cameron 		cdb[1] = 0;
4590283b4a9bSStephen M. Cameron 		cdb[2] = (u8) (block >> 24);
4591283b4a9bSStephen M. Cameron 		cdb[3] = (u8) (block >> 16);
4592283b4a9bSStephen M. Cameron 		cdb[4] = (u8) (block >> 8);
4593283b4a9bSStephen M. Cameron 		cdb[5] = (u8) (block);
4594283b4a9bSStephen M. Cameron 		cdb[6] = 0;
4595283b4a9bSStephen M. Cameron 		cdb[7] = (u8) (block_cnt >> 8);
4596283b4a9bSStephen M. Cameron 		cdb[8] = (u8) (block_cnt);
4597283b4a9bSStephen M. Cameron 		cdb[9] = 0;
4598283b4a9bSStephen M. Cameron 		*cdb_len = 10;
4599283b4a9bSStephen M. Cameron 		break;
4600283b4a9bSStephen M. Cameron 	}
4601283b4a9bSStephen M. Cameron 	return 0;
4602283b4a9bSStephen M. Cameron }
4603283b4a9bSStephen M. Cameron 
4604c349775eSScott Teel static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h,
4605283b4a9bSStephen M. Cameron 	struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
460603383736SDon Brace 	u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4607e1f7de0cSMatt Gates {
4608e1f7de0cSMatt Gates 	struct scsi_cmnd *cmd = c->scsi_cmd;
4609e1f7de0cSMatt Gates 	struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
4610e1f7de0cSMatt Gates 	unsigned int len;
4611e1f7de0cSMatt Gates 	unsigned int total_len = 0;
4612e1f7de0cSMatt Gates 	struct scatterlist *sg;
4613e1f7de0cSMatt Gates 	u64 addr64;
4614e1f7de0cSMatt Gates 	int use_sg, i;
4615e1f7de0cSMatt Gates 	struct SGDescriptor *curr_sg;
4616e1f7de0cSMatt Gates 	u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE;
4617e1f7de0cSMatt Gates 
4618283b4a9bSStephen M. Cameron 	/* TODO: implement chaining support */
461903383736SDon Brace 	if (scsi_sg_count(cmd) > h->ioaccel_maxsg) {
462003383736SDon Brace 		atomic_dec(&phys_disk->ioaccel_cmds_out);
4621283b4a9bSStephen M. Cameron 		return IO_ACCEL_INELIGIBLE;
462203383736SDon Brace 	}
4623283b4a9bSStephen M. Cameron 
4624e1f7de0cSMatt Gates 	BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX);
4625e1f7de0cSMatt Gates 
462603383736SDon Brace 	if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
462703383736SDon Brace 		atomic_dec(&phys_disk->ioaccel_cmds_out);
4628283b4a9bSStephen M. Cameron 		return IO_ACCEL_INELIGIBLE;
462903383736SDon Brace 	}
4630283b4a9bSStephen M. Cameron 
4631e1f7de0cSMatt Gates 	c->cmd_type = CMD_IOACCEL1;
4632e1f7de0cSMatt Gates 
4633e1f7de0cSMatt Gates 	/* Adjust the DMA address to point to the accelerated command buffer */
4634e1f7de0cSMatt Gates 	c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle +
4635e1f7de0cSMatt Gates 				(c->cmdindex * sizeof(*cp));
4636e1f7de0cSMatt Gates 	BUG_ON(c->busaddr & 0x0000007F);
4637e1f7de0cSMatt Gates 
4638e1f7de0cSMatt Gates 	use_sg = scsi_dma_map(cmd);
463903383736SDon Brace 	if (use_sg < 0) {
464003383736SDon Brace 		atomic_dec(&phys_disk->ioaccel_cmds_out);
4641e1f7de0cSMatt Gates 		return use_sg;
464203383736SDon Brace 	}
4643e1f7de0cSMatt Gates 
4644e1f7de0cSMatt Gates 	if (use_sg) {
4645e1f7de0cSMatt Gates 		curr_sg = cp->SG;
4646e1f7de0cSMatt Gates 		scsi_for_each_sg(cmd, sg, use_sg, i) {
4647e1f7de0cSMatt Gates 			addr64 = (u64) sg_dma_address(sg);
4648e1f7de0cSMatt Gates 			len  = sg_dma_len(sg);
4649e1f7de0cSMatt Gates 			total_len += len;
465050a0decfSStephen M. Cameron 			curr_sg->Addr = cpu_to_le64(addr64);
465150a0decfSStephen M. Cameron 			curr_sg->Len = cpu_to_le32(len);
465250a0decfSStephen M. Cameron 			curr_sg->Ext = cpu_to_le32(0);
4653e1f7de0cSMatt Gates 			curr_sg++;
4654e1f7de0cSMatt Gates 		}
465550a0decfSStephen M. Cameron 		(--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST);
4656e1f7de0cSMatt Gates 
4657e1f7de0cSMatt Gates 		switch (cmd->sc_data_direction) {
4658e1f7de0cSMatt Gates 		case DMA_TO_DEVICE:
4659e1f7de0cSMatt Gates 			control |= IOACCEL1_CONTROL_DATA_OUT;
4660e1f7de0cSMatt Gates 			break;
4661e1f7de0cSMatt Gates 		case DMA_FROM_DEVICE:
4662e1f7de0cSMatt Gates 			control |= IOACCEL1_CONTROL_DATA_IN;
4663e1f7de0cSMatt Gates 			break;
4664e1f7de0cSMatt Gates 		case DMA_NONE:
4665e1f7de0cSMatt Gates 			control |= IOACCEL1_CONTROL_NODATAXFER;
4666e1f7de0cSMatt Gates 			break;
4667e1f7de0cSMatt Gates 		default:
4668e1f7de0cSMatt Gates 			dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4669e1f7de0cSMatt Gates 			cmd->sc_data_direction);
4670e1f7de0cSMatt Gates 			BUG();
4671e1f7de0cSMatt Gates 			break;
4672e1f7de0cSMatt Gates 		}
4673e1f7de0cSMatt Gates 	} else {
4674e1f7de0cSMatt Gates 		control |= IOACCEL1_CONTROL_NODATAXFER;
4675e1f7de0cSMatt Gates 	}
4676e1f7de0cSMatt Gates 
4677c349775eSScott Teel 	c->Header.SGList = use_sg;
4678e1f7de0cSMatt Gates 	/* Fill out the command structure to submit */
46792b08b3e9SDon Brace 	cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF);
46802b08b3e9SDon Brace 	cp->transfer_len = cpu_to_le32(total_len);
46812b08b3e9SDon Brace 	cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ |
46822b08b3e9SDon Brace 			(cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK));
46832b08b3e9SDon Brace 	cp->control = cpu_to_le32(control);
4684283b4a9bSStephen M. Cameron 	memcpy(cp->CDB, cdb, cdb_len);
4685283b4a9bSStephen M. Cameron 	memcpy(cp->CISS_LUN, scsi3addr, 8);
4686c349775eSScott Teel 	/* Tag was already set at init time. */
4687e1f7de0cSMatt Gates 	enqueue_cmd_and_start_io(h, c);
4688e1f7de0cSMatt Gates 	return 0;
4689e1f7de0cSMatt Gates }
4690edd16368SStephen M. Cameron 
4691283b4a9bSStephen M. Cameron /*
4692283b4a9bSStephen M. Cameron  * Queue a command directly to a device behind the controller using the
4693283b4a9bSStephen M. Cameron  * I/O accelerator path.
4694283b4a9bSStephen M. Cameron  */
4695283b4a9bSStephen M. Cameron static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h,
4696283b4a9bSStephen M. Cameron 	struct CommandList *c)
4697283b4a9bSStephen M. Cameron {
4698283b4a9bSStephen M. Cameron 	struct scsi_cmnd *cmd = c->scsi_cmd;
4699283b4a9bSStephen M. Cameron 	struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4700283b4a9bSStephen M. Cameron 
470145e596cdSDon Brace 	if (!dev)
470245e596cdSDon Brace 		return -1;
470345e596cdSDon Brace 
470403383736SDon Brace 	c->phys_disk = dev;
470503383736SDon Brace 
4706283b4a9bSStephen M. Cameron 	return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle,
470703383736SDon Brace 		cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev);
4708283b4a9bSStephen M. Cameron }
4709283b4a9bSStephen M. Cameron 
4710dd0e19f3SScott Teel /*
4711dd0e19f3SScott Teel  * Set encryption parameters for the ioaccel2 request
4712dd0e19f3SScott Teel  */
4713dd0e19f3SScott Teel static void set_encrypt_ioaccel2(struct ctlr_info *h,
4714dd0e19f3SScott Teel 	struct CommandList *c, struct io_accel2_cmd *cp)
4715dd0e19f3SScott Teel {
4716dd0e19f3SScott Teel 	struct scsi_cmnd *cmd = c->scsi_cmd;
4717dd0e19f3SScott Teel 	struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4718dd0e19f3SScott Teel 	struct raid_map_data *map = &dev->raid_map;
4719dd0e19f3SScott Teel 	u64 first_block;
4720dd0e19f3SScott Teel 
4721dd0e19f3SScott Teel 	/* Are we doing encryption on this device */
47222b08b3e9SDon Brace 	if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON))
4723dd0e19f3SScott Teel 		return;
4724dd0e19f3SScott Teel 	/* Set the data encryption key index. */
4725dd0e19f3SScott Teel 	cp->dekindex = map->dekindex;
4726dd0e19f3SScott Teel 
4727dd0e19f3SScott Teel 	/* Set the encryption enable flag, encoded into direction field. */
4728dd0e19f3SScott Teel 	cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK;
4729dd0e19f3SScott Teel 
4730dd0e19f3SScott Teel 	/* Set encryption tweak values based on logical block address
4731dd0e19f3SScott Teel 	 * If block size is 512, tweak value is LBA.
4732dd0e19f3SScott Teel 	 * For other block sizes, tweak is (LBA * block size)/ 512)
4733dd0e19f3SScott Teel 	 */
4734dd0e19f3SScott Teel 	switch (cmd->cmnd[0]) {
4735dd0e19f3SScott Teel 	/* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */
4736dd0e19f3SScott Teel 	case READ_6:
4737abbada71SMahesh Rajashekhara 	case WRITE_6:
4738abbada71SMahesh Rajashekhara 		first_block = (((cmd->cmnd[1] & 0x1F) << 16) |
4739abbada71SMahesh Rajashekhara 				(cmd->cmnd[2] << 8) |
4740abbada71SMahesh Rajashekhara 				cmd->cmnd[3]);
4741dd0e19f3SScott Teel 		break;
4742dd0e19f3SScott Teel 	case WRITE_10:
4743dd0e19f3SScott Teel 	case READ_10:
4744dd0e19f3SScott Teel 	/* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */
4745dd0e19f3SScott Teel 	case WRITE_12:
4746dd0e19f3SScott Teel 	case READ_12:
47472b08b3e9SDon Brace 		first_block = get_unaligned_be32(&cmd->cmnd[2]);
4748dd0e19f3SScott Teel 		break;
4749dd0e19f3SScott Teel 	case WRITE_16:
4750dd0e19f3SScott Teel 	case READ_16:
47512b08b3e9SDon Brace 		first_block = get_unaligned_be64(&cmd->cmnd[2]);
4752dd0e19f3SScott Teel 		break;
4753dd0e19f3SScott Teel 	default:
4754dd0e19f3SScott Teel 		dev_err(&h->pdev->dev,
47552b08b3e9SDon Brace 			"ERROR: %s: size (0x%x) not supported for encryption\n",
47562b08b3e9SDon Brace 			__func__, cmd->cmnd[0]);
4757dd0e19f3SScott Teel 		BUG();
4758dd0e19f3SScott Teel 		break;
4759dd0e19f3SScott Teel 	}
47602b08b3e9SDon Brace 
47612b08b3e9SDon Brace 	if (le32_to_cpu(map->volume_blk_size) != 512)
47622b08b3e9SDon Brace 		first_block = first_block *
47632b08b3e9SDon Brace 				le32_to_cpu(map->volume_blk_size)/512;
47642b08b3e9SDon Brace 
47652b08b3e9SDon Brace 	cp->tweak_lower = cpu_to_le32(first_block);
47662b08b3e9SDon Brace 	cp->tweak_upper = cpu_to_le32(first_block >> 32);
4767dd0e19f3SScott Teel }
4768dd0e19f3SScott Teel 
4769c349775eSScott Teel static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h,
4770c349775eSScott Teel 	struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
477103383736SDon Brace 	u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4772c349775eSScott Teel {
4773c349775eSScott Teel 	struct scsi_cmnd *cmd = c->scsi_cmd;
4774c349775eSScott Teel 	struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
4775c349775eSScott Teel 	struct ioaccel2_sg_element *curr_sg;
4776c349775eSScott Teel 	int use_sg, i;
4777c349775eSScott Teel 	struct scatterlist *sg;
4778c349775eSScott Teel 	u64 addr64;
4779c349775eSScott Teel 	u32 len;
4780c349775eSScott Teel 	u32 total_len = 0;
4781c349775eSScott Teel 
478245e596cdSDon Brace 	if (!cmd->device)
478345e596cdSDon Brace 		return -1;
478445e596cdSDon Brace 
478545e596cdSDon Brace 	if (!cmd->device->hostdata)
478645e596cdSDon Brace 		return -1;
478745e596cdSDon Brace 
4788d9a729f3SWebb Scales 	BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
4789c349775eSScott Teel 
479003383736SDon Brace 	if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
479103383736SDon Brace 		atomic_dec(&phys_disk->ioaccel_cmds_out);
4792c349775eSScott Teel 		return IO_ACCEL_INELIGIBLE;
479303383736SDon Brace 	}
479403383736SDon Brace 
4795c349775eSScott Teel 	c->cmd_type = CMD_IOACCEL2;
4796c349775eSScott Teel 	/* Adjust the DMA address to point to the accelerated command buffer */
4797c349775eSScott Teel 	c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle +
4798c349775eSScott Teel 				(c->cmdindex * sizeof(*cp));
4799c349775eSScott Teel 	BUG_ON(c->busaddr & 0x0000007F);
4800c349775eSScott Teel 
4801c349775eSScott Teel 	memset(cp, 0, sizeof(*cp));
4802c349775eSScott Teel 	cp->IU_type = IOACCEL2_IU_TYPE;
4803c349775eSScott Teel 
4804c349775eSScott Teel 	use_sg = scsi_dma_map(cmd);
480503383736SDon Brace 	if (use_sg < 0) {
480603383736SDon Brace 		atomic_dec(&phys_disk->ioaccel_cmds_out);
4807c349775eSScott Teel 		return use_sg;
480803383736SDon Brace 	}
4809c349775eSScott Teel 
4810c349775eSScott Teel 	if (use_sg) {
4811c349775eSScott Teel 		curr_sg = cp->sg;
4812d9a729f3SWebb Scales 		if (use_sg > h->ioaccel_maxsg) {
4813d9a729f3SWebb Scales 			addr64 = le64_to_cpu(
4814d9a729f3SWebb Scales 				h->ioaccel2_cmd_sg_list[c->cmdindex]->address);
4815d9a729f3SWebb Scales 			curr_sg->address = cpu_to_le64(addr64);
4816d9a729f3SWebb Scales 			curr_sg->length = 0;
4817d9a729f3SWebb Scales 			curr_sg->reserved[0] = 0;
4818d9a729f3SWebb Scales 			curr_sg->reserved[1] = 0;
4819d9a729f3SWebb Scales 			curr_sg->reserved[2] = 0;
4820d9a729f3SWebb Scales 			curr_sg->chain_indicator = 0x80;
4821d9a729f3SWebb Scales 
4822d9a729f3SWebb Scales 			curr_sg = h->ioaccel2_cmd_sg_list[c->cmdindex];
4823d9a729f3SWebb Scales 		}
4824c349775eSScott Teel 		scsi_for_each_sg(cmd, sg, use_sg, i) {
4825c349775eSScott Teel 			addr64 = (u64) sg_dma_address(sg);
4826c349775eSScott Teel 			len  = sg_dma_len(sg);
4827c349775eSScott Teel 			total_len += len;
4828c349775eSScott Teel 			curr_sg->address = cpu_to_le64(addr64);
4829c349775eSScott Teel 			curr_sg->length = cpu_to_le32(len);
4830c349775eSScott Teel 			curr_sg->reserved[0] = 0;
4831c349775eSScott Teel 			curr_sg->reserved[1] = 0;
4832c349775eSScott Teel 			curr_sg->reserved[2] = 0;
4833c349775eSScott Teel 			curr_sg->chain_indicator = 0;
4834c349775eSScott Teel 			curr_sg++;
4835c349775eSScott Teel 		}
4836c349775eSScott Teel 
4837c349775eSScott Teel 		switch (cmd->sc_data_direction) {
4838c349775eSScott Teel 		case DMA_TO_DEVICE:
4839dd0e19f3SScott Teel 			cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4840dd0e19f3SScott Teel 			cp->direction |= IOACCEL2_DIR_DATA_OUT;
4841c349775eSScott Teel 			break;
4842c349775eSScott Teel 		case DMA_FROM_DEVICE:
4843dd0e19f3SScott Teel 			cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4844dd0e19f3SScott Teel 			cp->direction |= IOACCEL2_DIR_DATA_IN;
4845c349775eSScott Teel 			break;
4846c349775eSScott Teel 		case DMA_NONE:
4847dd0e19f3SScott Teel 			cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4848dd0e19f3SScott Teel 			cp->direction |= IOACCEL2_DIR_NO_DATA;
4849c349775eSScott Teel 			break;
4850c349775eSScott Teel 		default:
4851c349775eSScott Teel 			dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4852c349775eSScott Teel 				cmd->sc_data_direction);
4853c349775eSScott Teel 			BUG();
4854c349775eSScott Teel 			break;
4855c349775eSScott Teel 		}
4856c349775eSScott Teel 	} else {
4857dd0e19f3SScott Teel 		cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4858dd0e19f3SScott Teel 		cp->direction |= IOACCEL2_DIR_NO_DATA;
4859c349775eSScott Teel 	}
4860dd0e19f3SScott Teel 
4861dd0e19f3SScott Teel 	/* Set encryption parameters, if necessary */
4862dd0e19f3SScott Teel 	set_encrypt_ioaccel2(h, c, cp);
4863dd0e19f3SScott Teel 
48642b08b3e9SDon Brace 	cp->scsi_nexus = cpu_to_le32(ioaccel_handle);
4865f2405db8SDon Brace 	cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT);
4866c349775eSScott Teel 	memcpy(cp->cdb, cdb, sizeof(cp->cdb));
4867c349775eSScott Teel 
4868c349775eSScott Teel 	cp->data_len = cpu_to_le32(total_len);
4869c349775eSScott Teel 	cp->err_ptr = cpu_to_le64(c->busaddr +
4870c349775eSScott Teel 			offsetof(struct io_accel2_cmd, error_data));
487150a0decfSStephen M. Cameron 	cp->err_len = cpu_to_le32(sizeof(cp->error_data));
4872c349775eSScott Teel 
4873d9a729f3SWebb Scales 	/* fill in sg elements */
4874d9a729f3SWebb Scales 	if (use_sg > h->ioaccel_maxsg) {
4875d9a729f3SWebb Scales 		cp->sg_count = 1;
4876a736e9b6SDon Brace 		cp->sg[0].length = cpu_to_le32(use_sg * sizeof(cp->sg[0]));
4877d9a729f3SWebb Scales 		if (hpsa_map_ioaccel2_sg_chain_block(h, cp, c)) {
4878d9a729f3SWebb Scales 			atomic_dec(&phys_disk->ioaccel_cmds_out);
4879d9a729f3SWebb Scales 			scsi_dma_unmap(cmd);
4880d9a729f3SWebb Scales 			return -1;
4881d9a729f3SWebb Scales 		}
4882d9a729f3SWebb Scales 	} else
4883d9a729f3SWebb Scales 		cp->sg_count = (u8) use_sg;
4884d9a729f3SWebb Scales 
4885c349775eSScott Teel 	enqueue_cmd_and_start_io(h, c);
4886c349775eSScott Teel 	return 0;
4887c349775eSScott Teel }
4888c349775eSScott Teel 
4889c349775eSScott Teel /*
4890c349775eSScott Teel  * Queue a command to the correct I/O accelerator path.
4891c349775eSScott Teel  */
4892c349775eSScott Teel static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
4893c349775eSScott Teel 	struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
489403383736SDon Brace 	u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4895c349775eSScott Teel {
489645e596cdSDon Brace 	if (!c->scsi_cmd->device)
489745e596cdSDon Brace 		return -1;
489845e596cdSDon Brace 
489945e596cdSDon Brace 	if (!c->scsi_cmd->device->hostdata)
490045e596cdSDon Brace 		return -1;
490145e596cdSDon Brace 
490203383736SDon Brace 	/* Try to honor the device's queue depth */
490303383736SDon Brace 	if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) >
490403383736SDon Brace 					phys_disk->queue_depth) {
490503383736SDon Brace 		atomic_dec(&phys_disk->ioaccel_cmds_out);
490603383736SDon Brace 		return IO_ACCEL_INELIGIBLE;
490703383736SDon Brace 	}
4908c349775eSScott Teel 	if (h->transMethod & CFGTBL_Trans_io_accel1)
4909c349775eSScott Teel 		return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle,
491003383736SDon Brace 						cdb, cdb_len, scsi3addr,
491103383736SDon Brace 						phys_disk);
4912c349775eSScott Teel 	else
4913c349775eSScott Teel 		return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle,
491403383736SDon Brace 						cdb, cdb_len, scsi3addr,
491503383736SDon Brace 						phys_disk);
4916c349775eSScott Teel }
4917c349775eSScott Teel 
49186b80b18fSScott Teel static void raid_map_helper(struct raid_map_data *map,
49196b80b18fSScott Teel 		int offload_to_mirror, u32 *map_index, u32 *current_group)
49206b80b18fSScott Teel {
49216b80b18fSScott Teel 	if (offload_to_mirror == 0)  {
49226b80b18fSScott Teel 		/* use physical disk in the first mirrored group. */
49232b08b3e9SDon Brace 		*map_index %= le16_to_cpu(map->data_disks_per_row);
49246b80b18fSScott Teel 		return;
49256b80b18fSScott Teel 	}
49266b80b18fSScott Teel 	do {
49276b80b18fSScott Teel 		/* determine mirror group that *map_index indicates */
49282b08b3e9SDon Brace 		*current_group = *map_index /
49292b08b3e9SDon Brace 			le16_to_cpu(map->data_disks_per_row);
49306b80b18fSScott Teel 		if (offload_to_mirror == *current_group)
49316b80b18fSScott Teel 			continue;
49322b08b3e9SDon Brace 		if (*current_group < le16_to_cpu(map->layout_map_count) - 1) {
49336b80b18fSScott Teel 			/* select map index from next group */
49342b08b3e9SDon Brace 			*map_index += le16_to_cpu(map->data_disks_per_row);
49356b80b18fSScott Teel 			(*current_group)++;
49366b80b18fSScott Teel 		} else {
49376b80b18fSScott Teel 			/* select map index from first group */
49382b08b3e9SDon Brace 			*map_index %= le16_to_cpu(map->data_disks_per_row);
49396b80b18fSScott Teel 			*current_group = 0;
49406b80b18fSScott Teel 		}
49416b80b18fSScott Teel 	} while (offload_to_mirror != *current_group);
49426b80b18fSScott Teel }
49436b80b18fSScott Teel 
4944283b4a9bSStephen M. Cameron /*
4945283b4a9bSStephen M. Cameron  * Attempt to perform offload RAID mapping for a logical volume I/O.
4946283b4a9bSStephen M. Cameron  */
4947283b4a9bSStephen M. Cameron static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h,
4948283b4a9bSStephen M. Cameron 	struct CommandList *c)
4949283b4a9bSStephen M. Cameron {
4950283b4a9bSStephen M. Cameron 	struct scsi_cmnd *cmd = c->scsi_cmd;
4951283b4a9bSStephen M. Cameron 	struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4952283b4a9bSStephen M. Cameron 	struct raid_map_data *map = &dev->raid_map;
4953283b4a9bSStephen M. Cameron 	struct raid_map_disk_data *dd = &map->data[0];
4954283b4a9bSStephen M. Cameron 	int is_write = 0;
4955283b4a9bSStephen M. Cameron 	u32 map_index;
4956283b4a9bSStephen M. Cameron 	u64 first_block, last_block;
4957283b4a9bSStephen M. Cameron 	u32 block_cnt;
4958283b4a9bSStephen M. Cameron 	u32 blocks_per_row;
4959283b4a9bSStephen M. Cameron 	u64 first_row, last_row;
4960283b4a9bSStephen M. Cameron 	u32 first_row_offset, last_row_offset;
4961283b4a9bSStephen M. Cameron 	u32 first_column, last_column;
49626b80b18fSScott Teel 	u64 r0_first_row, r0_last_row;
49636b80b18fSScott Teel 	u32 r5or6_blocks_per_row;
49646b80b18fSScott Teel 	u64 r5or6_first_row, r5or6_last_row;
49656b80b18fSScott Teel 	u32 r5or6_first_row_offset, r5or6_last_row_offset;
49666b80b18fSScott Teel 	u32 r5or6_first_column, r5or6_last_column;
49676b80b18fSScott Teel 	u32 total_disks_per_row;
49686b80b18fSScott Teel 	u32 stripesize;
49696b80b18fSScott Teel 	u32 first_group, last_group, current_group;
4970283b4a9bSStephen M. Cameron 	u32 map_row;
4971283b4a9bSStephen M. Cameron 	u32 disk_handle;
4972283b4a9bSStephen M. Cameron 	u64 disk_block;
4973283b4a9bSStephen M. Cameron 	u32 disk_block_cnt;
4974283b4a9bSStephen M. Cameron 	u8 cdb[16];
4975283b4a9bSStephen M. Cameron 	u8 cdb_len;
49762b08b3e9SDon Brace 	u16 strip_size;
4977283b4a9bSStephen M. Cameron #if BITS_PER_LONG == 32
4978283b4a9bSStephen M. Cameron 	u64 tmpdiv;
4979283b4a9bSStephen M. Cameron #endif
49806b80b18fSScott Teel 	int offload_to_mirror;
4981283b4a9bSStephen M. Cameron 
498245e596cdSDon Brace 	if (!dev)
498345e596cdSDon Brace 		return -1;
498445e596cdSDon Brace 
4985283b4a9bSStephen M. Cameron 	/* check for valid opcode, get LBA and block count */
4986283b4a9bSStephen M. Cameron 	switch (cmd->cmnd[0]) {
4987283b4a9bSStephen M. Cameron 	case WRITE_6:
4988283b4a9bSStephen M. Cameron 		is_write = 1;
4989283b4a9bSStephen M. Cameron 	case READ_6:
4990abbada71SMahesh Rajashekhara 		first_block = (((cmd->cmnd[1] & 0x1F) << 16) |
4991abbada71SMahesh Rajashekhara 				(cmd->cmnd[2] << 8) |
4992abbada71SMahesh Rajashekhara 				cmd->cmnd[3]);
4993283b4a9bSStephen M. Cameron 		block_cnt = cmd->cmnd[4];
49943fa89a04SStephen M. Cameron 		if (block_cnt == 0)
49953fa89a04SStephen M. Cameron 			block_cnt = 256;
4996283b4a9bSStephen M. Cameron 		break;
4997283b4a9bSStephen M. Cameron 	case WRITE_10:
4998283b4a9bSStephen M. Cameron 		is_write = 1;
4999283b4a9bSStephen M. Cameron 	case READ_10:
5000283b4a9bSStephen M. Cameron 		first_block =
5001283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[2]) << 24) |
5002283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[3]) << 16) |
5003283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[4]) << 8) |
5004283b4a9bSStephen M. Cameron 			cmd->cmnd[5];
5005283b4a9bSStephen M. Cameron 		block_cnt =
5006283b4a9bSStephen M. Cameron 			(((u32) cmd->cmnd[7]) << 8) |
5007283b4a9bSStephen M. Cameron 			cmd->cmnd[8];
5008283b4a9bSStephen M. Cameron 		break;
5009283b4a9bSStephen M. Cameron 	case WRITE_12:
5010283b4a9bSStephen M. Cameron 		is_write = 1;
5011283b4a9bSStephen M. Cameron 	case READ_12:
5012283b4a9bSStephen M. Cameron 		first_block =
5013283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[2]) << 24) |
5014283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[3]) << 16) |
5015283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[4]) << 8) |
5016283b4a9bSStephen M. Cameron 			cmd->cmnd[5];
5017283b4a9bSStephen M. Cameron 		block_cnt =
5018283b4a9bSStephen M. Cameron 			(((u32) cmd->cmnd[6]) << 24) |
5019283b4a9bSStephen M. Cameron 			(((u32) cmd->cmnd[7]) << 16) |
5020283b4a9bSStephen M. Cameron 			(((u32) cmd->cmnd[8]) << 8) |
5021283b4a9bSStephen M. Cameron 		cmd->cmnd[9];
5022283b4a9bSStephen M. Cameron 		break;
5023283b4a9bSStephen M. Cameron 	case WRITE_16:
5024283b4a9bSStephen M. Cameron 		is_write = 1;
5025283b4a9bSStephen M. Cameron 	case READ_16:
5026283b4a9bSStephen M. Cameron 		first_block =
5027283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[2]) << 56) |
5028283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[3]) << 48) |
5029283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[4]) << 40) |
5030283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[5]) << 32) |
5031283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[6]) << 24) |
5032283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[7]) << 16) |
5033283b4a9bSStephen M. Cameron 			(((u64) cmd->cmnd[8]) << 8) |
5034283b4a9bSStephen M. Cameron 			cmd->cmnd[9];
5035283b4a9bSStephen M. Cameron 		block_cnt =
5036283b4a9bSStephen M. Cameron 			(((u32) cmd->cmnd[10]) << 24) |
5037283b4a9bSStephen M. Cameron 			(((u32) cmd->cmnd[11]) << 16) |
5038283b4a9bSStephen M. Cameron 			(((u32) cmd->cmnd[12]) << 8) |
5039283b4a9bSStephen M. Cameron 			cmd->cmnd[13];
5040283b4a9bSStephen M. Cameron 		break;
5041283b4a9bSStephen M. Cameron 	default:
5042283b4a9bSStephen M. Cameron 		return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */
5043283b4a9bSStephen M. Cameron 	}
5044283b4a9bSStephen M. Cameron 	last_block = first_block + block_cnt - 1;
5045283b4a9bSStephen M. Cameron 
5046283b4a9bSStephen M. Cameron 	/* check for write to non-RAID-0 */
5047283b4a9bSStephen M. Cameron 	if (is_write && dev->raid_level != 0)
5048283b4a9bSStephen M. Cameron 		return IO_ACCEL_INELIGIBLE;
5049283b4a9bSStephen M. Cameron 
5050283b4a9bSStephen M. Cameron 	/* check for invalid block or wraparound */
50512b08b3e9SDon Brace 	if (last_block >= le64_to_cpu(map->volume_blk_cnt) ||
50522b08b3e9SDon Brace 		last_block < first_block)
5053283b4a9bSStephen M. Cameron 		return IO_ACCEL_INELIGIBLE;
5054283b4a9bSStephen M. Cameron 
5055283b4a9bSStephen M. Cameron 	/* calculate stripe information for the request */
50562b08b3e9SDon Brace 	blocks_per_row = le16_to_cpu(map->data_disks_per_row) *
50572b08b3e9SDon Brace 				le16_to_cpu(map->strip_size);
50582b08b3e9SDon Brace 	strip_size = le16_to_cpu(map->strip_size);
5059283b4a9bSStephen M. Cameron #if BITS_PER_LONG == 32
5060283b4a9bSStephen M. Cameron 	tmpdiv = first_block;
5061283b4a9bSStephen M. Cameron 	(void) do_div(tmpdiv, blocks_per_row);
5062283b4a9bSStephen M. Cameron 	first_row = tmpdiv;
5063283b4a9bSStephen M. Cameron 	tmpdiv = last_block;
5064283b4a9bSStephen M. Cameron 	(void) do_div(tmpdiv, blocks_per_row);
5065283b4a9bSStephen M. Cameron 	last_row = tmpdiv;
5066283b4a9bSStephen M. Cameron 	first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
5067283b4a9bSStephen M. Cameron 	last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
5068283b4a9bSStephen M. Cameron 	tmpdiv = first_row_offset;
50692b08b3e9SDon Brace 	(void) do_div(tmpdiv, strip_size);
5070283b4a9bSStephen M. Cameron 	first_column = tmpdiv;
5071283b4a9bSStephen M. Cameron 	tmpdiv = last_row_offset;
50722b08b3e9SDon Brace 	(void) do_div(tmpdiv, strip_size);
5073283b4a9bSStephen M. Cameron 	last_column = tmpdiv;
5074283b4a9bSStephen M. Cameron #else
5075283b4a9bSStephen M. Cameron 	first_row = first_block / blocks_per_row;
5076283b4a9bSStephen M. Cameron 	last_row = last_block / blocks_per_row;
5077283b4a9bSStephen M. Cameron 	first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
5078283b4a9bSStephen M. Cameron 	last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
50792b08b3e9SDon Brace 	first_column = first_row_offset / strip_size;
50802b08b3e9SDon Brace 	last_column = last_row_offset / strip_size;
5081283b4a9bSStephen M. Cameron #endif
5082283b4a9bSStephen M. Cameron 
5083283b4a9bSStephen M. Cameron 	/* if this isn't a single row/column then give to the controller */
5084283b4a9bSStephen M. Cameron 	if ((first_row != last_row) || (first_column != last_column))
5085283b4a9bSStephen M. Cameron 		return IO_ACCEL_INELIGIBLE;
5086283b4a9bSStephen M. Cameron 
5087283b4a9bSStephen M. Cameron 	/* proceeding with driver mapping */
50882b08b3e9SDon Brace 	total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
50892b08b3e9SDon Brace 				le16_to_cpu(map->metadata_disks_per_row);
5090283b4a9bSStephen M. Cameron 	map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
50912b08b3e9SDon Brace 				le16_to_cpu(map->row_cnt);
50926b80b18fSScott Teel 	map_index = (map_row * total_disks_per_row) + first_column;
50936b80b18fSScott Teel 
50946b80b18fSScott Teel 	switch (dev->raid_level) {
50956b80b18fSScott Teel 	case HPSA_RAID_0:
50966b80b18fSScott Teel 		break; /* nothing special to do */
50976b80b18fSScott Teel 	case HPSA_RAID_1:
50986b80b18fSScott Teel 		/* Handles load balance across RAID 1 members.
50996b80b18fSScott Teel 		 * (2-drive R1 and R10 with even # of drives.)
51006b80b18fSScott Teel 		 * Appropriate for SSDs, not optimal for HDDs
5101283b4a9bSStephen M. Cameron 		 */
51022b08b3e9SDon Brace 		BUG_ON(le16_to_cpu(map->layout_map_count) != 2);
5103283b4a9bSStephen M. Cameron 		if (dev->offload_to_mirror)
51042b08b3e9SDon Brace 			map_index += le16_to_cpu(map->data_disks_per_row);
5105283b4a9bSStephen M. Cameron 		dev->offload_to_mirror = !dev->offload_to_mirror;
51066b80b18fSScott Teel 		break;
51076b80b18fSScott Teel 	case HPSA_RAID_ADM:
51086b80b18fSScott Teel 		/* Handles N-way mirrors  (R1-ADM)
51096b80b18fSScott Teel 		 * and R10 with # of drives divisible by 3.)
51106b80b18fSScott Teel 		 */
51112b08b3e9SDon Brace 		BUG_ON(le16_to_cpu(map->layout_map_count) != 3);
51126b80b18fSScott Teel 
51136b80b18fSScott Teel 		offload_to_mirror = dev->offload_to_mirror;
51146b80b18fSScott Teel 		raid_map_helper(map, offload_to_mirror,
51156b80b18fSScott Teel 				&map_index, &current_group);
51166b80b18fSScott Teel 		/* set mirror group to use next time */
51176b80b18fSScott Teel 		offload_to_mirror =
51182b08b3e9SDon Brace 			(offload_to_mirror >=
51192b08b3e9SDon Brace 			le16_to_cpu(map->layout_map_count) - 1)
51206b80b18fSScott Teel 			? 0 : offload_to_mirror + 1;
51216b80b18fSScott Teel 		dev->offload_to_mirror = offload_to_mirror;
51226b80b18fSScott Teel 		/* Avoid direct use of dev->offload_to_mirror within this
51236b80b18fSScott Teel 		 * function since multiple threads might simultaneously
51246b80b18fSScott Teel 		 * increment it beyond the range of dev->layout_map_count -1.
51256b80b18fSScott Teel 		 */
51266b80b18fSScott Teel 		break;
51276b80b18fSScott Teel 	case HPSA_RAID_5:
51286b80b18fSScott Teel 	case HPSA_RAID_6:
51292b08b3e9SDon Brace 		if (le16_to_cpu(map->layout_map_count) <= 1)
51306b80b18fSScott Teel 			break;
51316b80b18fSScott Teel 
51326b80b18fSScott Teel 		/* Verify first and last block are in same RAID group */
51336b80b18fSScott Teel 		r5or6_blocks_per_row =
51342b08b3e9SDon Brace 			le16_to_cpu(map->strip_size) *
51352b08b3e9SDon Brace 			le16_to_cpu(map->data_disks_per_row);
51366b80b18fSScott Teel 		BUG_ON(r5or6_blocks_per_row == 0);
51372b08b3e9SDon Brace 		stripesize = r5or6_blocks_per_row *
51382b08b3e9SDon Brace 			le16_to_cpu(map->layout_map_count);
51396b80b18fSScott Teel #if BITS_PER_LONG == 32
51406b80b18fSScott Teel 		tmpdiv = first_block;
51416b80b18fSScott Teel 		first_group = do_div(tmpdiv, stripesize);
51426b80b18fSScott Teel 		tmpdiv = first_group;
51436b80b18fSScott Teel 		(void) do_div(tmpdiv, r5or6_blocks_per_row);
51446b80b18fSScott Teel 		first_group = tmpdiv;
51456b80b18fSScott Teel 		tmpdiv = last_block;
51466b80b18fSScott Teel 		last_group = do_div(tmpdiv, stripesize);
51476b80b18fSScott Teel 		tmpdiv = last_group;
51486b80b18fSScott Teel 		(void) do_div(tmpdiv, r5or6_blocks_per_row);
51496b80b18fSScott Teel 		last_group = tmpdiv;
51506b80b18fSScott Teel #else
51516b80b18fSScott Teel 		first_group = (first_block % stripesize) / r5or6_blocks_per_row;
51526b80b18fSScott Teel 		last_group = (last_block % stripesize) / r5or6_blocks_per_row;
51536b80b18fSScott Teel #endif
5154000ff7c2SStephen M. Cameron 		if (first_group != last_group)
51556b80b18fSScott Teel 			return IO_ACCEL_INELIGIBLE;
51566b80b18fSScott Teel 
51576b80b18fSScott Teel 		/* Verify request is in a single row of RAID 5/6 */
51586b80b18fSScott Teel #if BITS_PER_LONG == 32
51596b80b18fSScott Teel 		tmpdiv = first_block;
51606b80b18fSScott Teel 		(void) do_div(tmpdiv, stripesize);
51616b80b18fSScott Teel 		first_row = r5or6_first_row = r0_first_row = tmpdiv;
51626b80b18fSScott Teel 		tmpdiv = last_block;
51636b80b18fSScott Teel 		(void) do_div(tmpdiv, stripesize);
51646b80b18fSScott Teel 		r5or6_last_row = r0_last_row = tmpdiv;
51656b80b18fSScott Teel #else
51666b80b18fSScott Teel 		first_row = r5or6_first_row = r0_first_row =
51676b80b18fSScott Teel 						first_block / stripesize;
51686b80b18fSScott Teel 		r5or6_last_row = r0_last_row = last_block / stripesize;
51696b80b18fSScott Teel #endif
51706b80b18fSScott Teel 		if (r5or6_first_row != r5or6_last_row)
51716b80b18fSScott Teel 			return IO_ACCEL_INELIGIBLE;
51726b80b18fSScott Teel 
51736b80b18fSScott Teel 
51746b80b18fSScott Teel 		/* Verify request is in a single column */
51756b80b18fSScott Teel #if BITS_PER_LONG == 32
51766b80b18fSScott Teel 		tmpdiv = first_block;
51776b80b18fSScott Teel 		first_row_offset = do_div(tmpdiv, stripesize);
51786b80b18fSScott Teel 		tmpdiv = first_row_offset;
51796b80b18fSScott Teel 		first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row);
51806b80b18fSScott Teel 		r5or6_first_row_offset = first_row_offset;
51816b80b18fSScott Teel 		tmpdiv = last_block;
51826b80b18fSScott Teel 		r5or6_last_row_offset = do_div(tmpdiv, stripesize);
51836b80b18fSScott Teel 		tmpdiv = r5or6_last_row_offset;
51846b80b18fSScott Teel 		r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row);
51856b80b18fSScott Teel 		tmpdiv = r5or6_first_row_offset;
51866b80b18fSScott Teel 		(void) do_div(tmpdiv, map->strip_size);
51876b80b18fSScott Teel 		first_column = r5or6_first_column = tmpdiv;
51886b80b18fSScott Teel 		tmpdiv = r5or6_last_row_offset;
51896b80b18fSScott Teel 		(void) do_div(tmpdiv, map->strip_size);
51906b80b18fSScott Teel 		r5or6_last_column = tmpdiv;
51916b80b18fSScott Teel #else
51926b80b18fSScott Teel 		first_row_offset = r5or6_first_row_offset =
51936b80b18fSScott Teel 			(u32)((first_block % stripesize) %
51946b80b18fSScott Teel 						r5or6_blocks_per_row);
51956b80b18fSScott Teel 
51966b80b18fSScott Teel 		r5or6_last_row_offset =
51976b80b18fSScott Teel 			(u32)((last_block % stripesize) %
51986b80b18fSScott Teel 						r5or6_blocks_per_row);
51996b80b18fSScott Teel 
52006b80b18fSScott Teel 		first_column = r5or6_first_column =
52012b08b3e9SDon Brace 			r5or6_first_row_offset / le16_to_cpu(map->strip_size);
52026b80b18fSScott Teel 		r5or6_last_column =
52032b08b3e9SDon Brace 			r5or6_last_row_offset / le16_to_cpu(map->strip_size);
52046b80b18fSScott Teel #endif
52056b80b18fSScott Teel 		if (r5or6_first_column != r5or6_last_column)
52066b80b18fSScott Teel 			return IO_ACCEL_INELIGIBLE;
52076b80b18fSScott Teel 
52086b80b18fSScott Teel 		/* Request is eligible */
52096b80b18fSScott Teel 		map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
52102b08b3e9SDon Brace 			le16_to_cpu(map->row_cnt);
52116b80b18fSScott Teel 
52126b80b18fSScott Teel 		map_index = (first_group *
52132b08b3e9SDon Brace 			(le16_to_cpu(map->row_cnt) * total_disks_per_row)) +
52146b80b18fSScott Teel 			(map_row * total_disks_per_row) + first_column;
52156b80b18fSScott Teel 		break;
52166b80b18fSScott Teel 	default:
52176b80b18fSScott Teel 		return IO_ACCEL_INELIGIBLE;
5218283b4a9bSStephen M. Cameron 	}
52196b80b18fSScott Teel 
522007543e0cSStephen Cameron 	if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES))
522107543e0cSStephen Cameron 		return IO_ACCEL_INELIGIBLE;
522207543e0cSStephen Cameron 
522303383736SDon Brace 	c->phys_disk = dev->phys_disk[map_index];
5224c3390df4SDon Brace 	if (!c->phys_disk)
5225c3390df4SDon Brace 		return IO_ACCEL_INELIGIBLE;
522603383736SDon Brace 
5227283b4a9bSStephen M. Cameron 	disk_handle = dd[map_index].ioaccel_handle;
52282b08b3e9SDon Brace 	disk_block = le64_to_cpu(map->disk_starting_blk) +
52292b08b3e9SDon Brace 			first_row * le16_to_cpu(map->strip_size) +
52302b08b3e9SDon Brace 			(first_row_offset - first_column *
52312b08b3e9SDon Brace 			le16_to_cpu(map->strip_size));
5232283b4a9bSStephen M. Cameron 	disk_block_cnt = block_cnt;
5233283b4a9bSStephen M. Cameron 
5234283b4a9bSStephen M. Cameron 	/* handle differing logical/physical block sizes */
5235283b4a9bSStephen M. Cameron 	if (map->phys_blk_shift) {
5236283b4a9bSStephen M. Cameron 		disk_block <<= map->phys_blk_shift;
5237283b4a9bSStephen M. Cameron 		disk_block_cnt <<= map->phys_blk_shift;
5238283b4a9bSStephen M. Cameron 	}
5239283b4a9bSStephen M. Cameron 	BUG_ON(disk_block_cnt > 0xffff);
5240283b4a9bSStephen M. Cameron 
5241283b4a9bSStephen M. Cameron 	/* build the new CDB for the physical disk I/O */
5242283b4a9bSStephen M. Cameron 	if (disk_block > 0xffffffff) {
5243283b4a9bSStephen M. Cameron 		cdb[0] = is_write ? WRITE_16 : READ_16;
5244283b4a9bSStephen M. Cameron 		cdb[1] = 0;
5245283b4a9bSStephen M. Cameron 		cdb[2] = (u8) (disk_block >> 56);
5246283b4a9bSStephen M. Cameron 		cdb[3] = (u8) (disk_block >> 48);
5247283b4a9bSStephen M. Cameron 		cdb[4] = (u8) (disk_block >> 40);
5248283b4a9bSStephen M. Cameron 		cdb[5] = (u8) (disk_block >> 32);
5249283b4a9bSStephen M. Cameron 		cdb[6] = (u8) (disk_block >> 24);
5250283b4a9bSStephen M. Cameron 		cdb[7] = (u8) (disk_block >> 16);
5251283b4a9bSStephen M. Cameron 		cdb[8] = (u8) (disk_block >> 8);
5252283b4a9bSStephen M. Cameron 		cdb[9] = (u8) (disk_block);
5253283b4a9bSStephen M. Cameron 		cdb[10] = (u8) (disk_block_cnt >> 24);
5254283b4a9bSStephen M. Cameron 		cdb[11] = (u8) (disk_block_cnt >> 16);
5255283b4a9bSStephen M. Cameron 		cdb[12] = (u8) (disk_block_cnt >> 8);
5256283b4a9bSStephen M. Cameron 		cdb[13] = (u8) (disk_block_cnt);
5257283b4a9bSStephen M. Cameron 		cdb[14] = 0;
5258283b4a9bSStephen M. Cameron 		cdb[15] = 0;
5259283b4a9bSStephen M. Cameron 		cdb_len = 16;
5260283b4a9bSStephen M. Cameron 	} else {
5261283b4a9bSStephen M. Cameron 		cdb[0] = is_write ? WRITE_10 : READ_10;
5262283b4a9bSStephen M. Cameron 		cdb[1] = 0;
5263283b4a9bSStephen M. Cameron 		cdb[2] = (u8) (disk_block >> 24);
5264283b4a9bSStephen M. Cameron 		cdb[3] = (u8) (disk_block >> 16);
5265283b4a9bSStephen M. Cameron 		cdb[4] = (u8) (disk_block >> 8);
5266283b4a9bSStephen M. Cameron 		cdb[5] = (u8) (disk_block);
5267283b4a9bSStephen M. Cameron 		cdb[6] = 0;
5268283b4a9bSStephen M. Cameron 		cdb[7] = (u8) (disk_block_cnt >> 8);
5269283b4a9bSStephen M. Cameron 		cdb[8] = (u8) (disk_block_cnt);
5270283b4a9bSStephen M. Cameron 		cdb[9] = 0;
5271283b4a9bSStephen M. Cameron 		cdb_len = 10;
5272283b4a9bSStephen M. Cameron 	}
5273283b4a9bSStephen M. Cameron 	return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len,
527403383736SDon Brace 						dev->scsi3addr,
527503383736SDon Brace 						dev->phys_disk[map_index]);
5276283b4a9bSStephen M. Cameron }
5277283b4a9bSStephen M. Cameron 
527825163bd5SWebb Scales /*
527925163bd5SWebb Scales  * Submit commands down the "normal" RAID stack path
528025163bd5SWebb Scales  * All callers to hpsa_ciss_submit must check lockup_detected
528125163bd5SWebb Scales  * beforehand, before (opt.) and after calling cmd_alloc
528225163bd5SWebb Scales  */
5283574f05d3SStephen Cameron static int hpsa_ciss_submit(struct ctlr_info *h,
5284574f05d3SStephen Cameron 	struct CommandList *c, struct scsi_cmnd *cmd,
5285574f05d3SStephen Cameron 	unsigned char scsi3addr[])
5286edd16368SStephen M. Cameron {
5287edd16368SStephen M. Cameron 	cmd->host_scribble = (unsigned char *) c;
5288edd16368SStephen M. Cameron 	c->cmd_type = CMD_SCSI;
5289edd16368SStephen M. Cameron 	c->scsi_cmd = cmd;
5290edd16368SStephen M. Cameron 	c->Header.ReplyQueue = 0;  /* unused in simple mode */
5291edd16368SStephen M. Cameron 	memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
5292f2405db8SDon Brace 	c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT));
5293edd16368SStephen M. Cameron 
5294edd16368SStephen M. Cameron 	/* Fill in the request block... */
5295edd16368SStephen M. Cameron 
5296edd16368SStephen M. Cameron 	c->Request.Timeout = 0;
5297edd16368SStephen M. Cameron 	BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
5298edd16368SStephen M. Cameron 	c->Request.CDBLen = cmd->cmd_len;
5299edd16368SStephen M. Cameron 	memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
5300edd16368SStephen M. Cameron 	switch (cmd->sc_data_direction) {
5301edd16368SStephen M. Cameron 	case DMA_TO_DEVICE:
5302a505b86fSStephen M. Cameron 		c->Request.type_attr_dir =
5303a505b86fSStephen M. Cameron 			TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE);
5304edd16368SStephen M. Cameron 		break;
5305edd16368SStephen M. Cameron 	case DMA_FROM_DEVICE:
5306a505b86fSStephen M. Cameron 		c->Request.type_attr_dir =
5307a505b86fSStephen M. Cameron 			TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ);
5308edd16368SStephen M. Cameron 		break;
5309edd16368SStephen M. Cameron 	case DMA_NONE:
5310a505b86fSStephen M. Cameron 		c->Request.type_attr_dir =
5311a505b86fSStephen M. Cameron 			TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE);
5312edd16368SStephen M. Cameron 		break;
5313edd16368SStephen M. Cameron 	case DMA_BIDIRECTIONAL:
5314edd16368SStephen M. Cameron 		/* This can happen if a buggy application does a scsi passthru
5315edd16368SStephen M. Cameron 		 * and sets both inlen and outlen to non-zero. ( see
5316edd16368SStephen M. Cameron 		 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
5317edd16368SStephen M. Cameron 		 */
5318edd16368SStephen M. Cameron 
5319a505b86fSStephen M. Cameron 		c->Request.type_attr_dir =
5320a505b86fSStephen M. Cameron 			TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD);
5321edd16368SStephen M. Cameron 		/* This is technically wrong, and hpsa controllers should
5322edd16368SStephen M. Cameron 		 * reject it with CMD_INVALID, which is the most correct
5323edd16368SStephen M. Cameron 		 * response, but non-fibre backends appear to let it
5324edd16368SStephen M. Cameron 		 * slide by, and give the same results as if this field
5325edd16368SStephen M. Cameron 		 * were set correctly.  Either way is acceptable for
5326edd16368SStephen M. Cameron 		 * our purposes here.
5327edd16368SStephen M. Cameron 		 */
5328edd16368SStephen M. Cameron 
5329edd16368SStephen M. Cameron 		break;
5330edd16368SStephen M. Cameron 
5331edd16368SStephen M. Cameron 	default:
5332edd16368SStephen M. Cameron 		dev_err(&h->pdev->dev, "unknown data direction: %d\n",
5333edd16368SStephen M. Cameron 			cmd->sc_data_direction);
5334edd16368SStephen M. Cameron 		BUG();
5335edd16368SStephen M. Cameron 		break;
5336edd16368SStephen M. Cameron 	}
5337edd16368SStephen M. Cameron 
533833a2ffceSStephen M. Cameron 	if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
533973153fe5SWebb Scales 		hpsa_cmd_resolve_and_free(h, c);
5340edd16368SStephen M. Cameron 		return SCSI_MLQUEUE_HOST_BUSY;
5341edd16368SStephen M. Cameron 	}
5342edd16368SStephen M. Cameron 	enqueue_cmd_and_start_io(h, c);
5343edd16368SStephen M. Cameron 	/* the cmd'll come back via intr handler in complete_scsi_command()  */
5344edd16368SStephen M. Cameron 	return 0;
5345edd16368SStephen M. Cameron }
5346edd16368SStephen M. Cameron 
5347360c73bdSStephen Cameron static void hpsa_cmd_init(struct ctlr_info *h, int index,
5348360c73bdSStephen Cameron 				struct CommandList *c)
5349360c73bdSStephen Cameron {
5350360c73bdSStephen Cameron 	dma_addr_t cmd_dma_handle, err_dma_handle;
5351360c73bdSStephen Cameron 
5352360c73bdSStephen Cameron 	/* Zero out all of commandlist except the last field, refcount */
5353360c73bdSStephen Cameron 	memset(c, 0, offsetof(struct CommandList, refcount));
5354360c73bdSStephen Cameron 	c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT));
5355360c73bdSStephen Cameron 	cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
5356360c73bdSStephen Cameron 	c->err_info = h->errinfo_pool + index;
5357360c73bdSStephen Cameron 	memset(c->err_info, 0, sizeof(*c->err_info));
5358360c73bdSStephen Cameron 	err_dma_handle = h->errinfo_pool_dhandle
5359360c73bdSStephen Cameron 	    + index * sizeof(*c->err_info);
5360360c73bdSStephen Cameron 	c->cmdindex = index;
5361360c73bdSStephen Cameron 	c->busaddr = (u32) cmd_dma_handle;
5362360c73bdSStephen Cameron 	c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle);
5363360c73bdSStephen Cameron 	c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info));
5364360c73bdSStephen Cameron 	c->h = h;
5365a58e7e53SWebb Scales 	c->scsi_cmd = SCSI_CMD_IDLE;
5366360c73bdSStephen Cameron }
5367360c73bdSStephen Cameron 
5368360c73bdSStephen Cameron static void hpsa_preinitialize_commands(struct ctlr_info *h)
5369360c73bdSStephen Cameron {
5370360c73bdSStephen Cameron 	int i;
5371360c73bdSStephen Cameron 
5372360c73bdSStephen Cameron 	for (i = 0; i < h->nr_cmds; i++) {
5373360c73bdSStephen Cameron 		struct CommandList *c = h->cmd_pool + i;
5374360c73bdSStephen Cameron 
5375360c73bdSStephen Cameron 		hpsa_cmd_init(h, i, c);
5376360c73bdSStephen Cameron 		atomic_set(&c->refcount, 0);
5377360c73bdSStephen Cameron 	}
5378360c73bdSStephen Cameron }
5379360c73bdSStephen Cameron 
5380360c73bdSStephen Cameron static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index,
5381360c73bdSStephen Cameron 				struct CommandList *c)
5382360c73bdSStephen Cameron {
5383360c73bdSStephen Cameron 	dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
5384360c73bdSStephen Cameron 
538573153fe5SWebb Scales 	BUG_ON(c->cmdindex != index);
538673153fe5SWebb Scales 
5387360c73bdSStephen Cameron 	memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
5388360c73bdSStephen Cameron 	memset(c->err_info, 0, sizeof(*c->err_info));
5389360c73bdSStephen Cameron 	c->busaddr = (u32) cmd_dma_handle;
5390360c73bdSStephen Cameron }
5391360c73bdSStephen Cameron 
5392592a0ad5SWebb Scales static int hpsa_ioaccel_submit(struct ctlr_info *h,
5393592a0ad5SWebb Scales 		struct CommandList *c, struct scsi_cmnd *cmd,
5394592a0ad5SWebb Scales 		unsigned char *scsi3addr)
5395592a0ad5SWebb Scales {
5396592a0ad5SWebb Scales 	struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
5397592a0ad5SWebb Scales 	int rc = IO_ACCEL_INELIGIBLE;
5398592a0ad5SWebb Scales 
539945e596cdSDon Brace 	if (!dev)
540045e596cdSDon Brace 		return SCSI_MLQUEUE_HOST_BUSY;
540145e596cdSDon Brace 
5402592a0ad5SWebb Scales 	cmd->host_scribble = (unsigned char *) c;
5403592a0ad5SWebb Scales 
5404592a0ad5SWebb Scales 	if (dev->offload_enabled) {
5405592a0ad5SWebb Scales 		hpsa_cmd_init(h, c->cmdindex, c);
5406592a0ad5SWebb Scales 		c->cmd_type = CMD_SCSI;
5407592a0ad5SWebb Scales 		c->scsi_cmd = cmd;
5408592a0ad5SWebb Scales 		rc = hpsa_scsi_ioaccel_raid_map(h, c);
5409592a0ad5SWebb Scales 		if (rc < 0)     /* scsi_dma_map failed. */
5410592a0ad5SWebb Scales 			rc = SCSI_MLQUEUE_HOST_BUSY;
5411a3144e0bSJoe Handzik 	} else if (dev->hba_ioaccel_enabled) {
5412592a0ad5SWebb Scales 		hpsa_cmd_init(h, c->cmdindex, c);
5413592a0ad5SWebb Scales 		c->cmd_type = CMD_SCSI;
5414592a0ad5SWebb Scales 		c->scsi_cmd = cmd;
5415592a0ad5SWebb Scales 		rc = hpsa_scsi_ioaccel_direct_map(h, c);
5416592a0ad5SWebb Scales 		if (rc < 0)     /* scsi_dma_map failed. */
5417592a0ad5SWebb Scales 			rc = SCSI_MLQUEUE_HOST_BUSY;
5418592a0ad5SWebb Scales 	}
5419592a0ad5SWebb Scales 	return rc;
5420592a0ad5SWebb Scales }
5421592a0ad5SWebb Scales 
5422080ef1ccSDon Brace static void hpsa_command_resubmit_worker(struct work_struct *work)
5423080ef1ccSDon Brace {
5424080ef1ccSDon Brace 	struct scsi_cmnd *cmd;
5425080ef1ccSDon Brace 	struct hpsa_scsi_dev_t *dev;
54268a0ff92cSWebb Scales 	struct CommandList *c = container_of(work, struct CommandList, work);
5427080ef1ccSDon Brace 
5428080ef1ccSDon Brace 	cmd = c->scsi_cmd;
5429080ef1ccSDon Brace 	dev = cmd->device->hostdata;
5430080ef1ccSDon Brace 	if (!dev) {
5431080ef1ccSDon Brace 		cmd->result = DID_NO_CONNECT << 16;
54328a0ff92cSWebb Scales 		return hpsa_cmd_free_and_done(c->h, c, cmd);
5433080ef1ccSDon Brace 	}
5434d604f533SWebb Scales 	if (c->reset_pending)
5435d604f533SWebb Scales 		return hpsa_cmd_resolve_and_free(c->h, c);
5436a58e7e53SWebb Scales 	if (c->abort_pending)
5437a58e7e53SWebb Scales 		return hpsa_cmd_abort_and_free(c->h, c, cmd);
5438592a0ad5SWebb Scales 	if (c->cmd_type == CMD_IOACCEL2) {
5439592a0ad5SWebb Scales 		struct ctlr_info *h = c->h;
5440592a0ad5SWebb Scales 		struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
5441592a0ad5SWebb Scales 		int rc;
5442592a0ad5SWebb Scales 
5443592a0ad5SWebb Scales 		if (c2->error_data.serv_response ==
5444592a0ad5SWebb Scales 				IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL) {
5445592a0ad5SWebb Scales 			rc = hpsa_ioaccel_submit(h, c, cmd, dev->scsi3addr);
5446592a0ad5SWebb Scales 			if (rc == 0)
5447592a0ad5SWebb Scales 				return;
5448592a0ad5SWebb Scales 			if (rc == SCSI_MLQUEUE_HOST_BUSY) {
5449592a0ad5SWebb Scales 				/*
5450592a0ad5SWebb Scales 				 * If we get here, it means dma mapping failed.
5451592a0ad5SWebb Scales 				 * Try again via scsi mid layer, which will
5452592a0ad5SWebb Scales 				 * then get SCSI_MLQUEUE_HOST_BUSY.
5453592a0ad5SWebb Scales 				 */
5454592a0ad5SWebb Scales 				cmd->result = DID_IMM_RETRY << 16;
54558a0ff92cSWebb Scales 				return hpsa_cmd_free_and_done(h, c, cmd);
5456592a0ad5SWebb Scales 			}
5457592a0ad5SWebb Scales 			/* else, fall thru and resubmit down CISS path */
5458592a0ad5SWebb Scales 		}
5459592a0ad5SWebb Scales 	}
5460360c73bdSStephen Cameron 	hpsa_cmd_partial_init(c->h, c->cmdindex, c);
5461080ef1ccSDon Brace 	if (hpsa_ciss_submit(c->h, c, cmd, dev->scsi3addr)) {
5462080ef1ccSDon Brace 		/*
5463080ef1ccSDon Brace 		 * If we get here, it means dma mapping failed. Try
5464080ef1ccSDon Brace 		 * again via scsi mid layer, which will then get
5465080ef1ccSDon Brace 		 * SCSI_MLQUEUE_HOST_BUSY.
5466592a0ad5SWebb Scales 		 *
5467592a0ad5SWebb Scales 		 * hpsa_ciss_submit will have already freed c
5468592a0ad5SWebb Scales 		 * if it encountered a dma mapping failure.
5469080ef1ccSDon Brace 		 */
5470080ef1ccSDon Brace 		cmd->result = DID_IMM_RETRY << 16;
5471080ef1ccSDon Brace 		cmd->scsi_done(cmd);
5472080ef1ccSDon Brace 	}
5473080ef1ccSDon Brace }
5474080ef1ccSDon Brace 
5475574f05d3SStephen Cameron /* Running in struct Scsi_Host->host_lock less mode */
5476574f05d3SStephen Cameron static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd)
5477574f05d3SStephen Cameron {
5478574f05d3SStephen Cameron 	struct ctlr_info *h;
5479574f05d3SStephen Cameron 	struct hpsa_scsi_dev_t *dev;
5480574f05d3SStephen Cameron 	unsigned char scsi3addr[8];
5481574f05d3SStephen Cameron 	struct CommandList *c;
5482574f05d3SStephen Cameron 	int rc = 0;
5483574f05d3SStephen Cameron 
5484574f05d3SStephen Cameron 	/* Get the ptr to our adapter structure out of cmd->host. */
5485574f05d3SStephen Cameron 	h = sdev_to_hba(cmd->device);
548673153fe5SWebb Scales 
548773153fe5SWebb Scales 	BUG_ON(cmd->request->tag < 0);
548873153fe5SWebb Scales 
5489574f05d3SStephen Cameron 	dev = cmd->device->hostdata;
5490574f05d3SStephen Cameron 	if (!dev) {
5491ba74fdc4SDon Brace 		cmd->result = NOT_READY << 16; /* host byte */
5492ba74fdc4SDon Brace 		cmd->scsi_done(cmd);
5493ba74fdc4SDon Brace 		return 0;
5494ba74fdc4SDon Brace 	}
5495ba74fdc4SDon Brace 
5496ba74fdc4SDon Brace 	if (dev->removed) {
5497574f05d3SStephen Cameron 		cmd->result = DID_NO_CONNECT << 16;
5498574f05d3SStephen Cameron 		cmd->scsi_done(cmd);
5499574f05d3SStephen Cameron 		return 0;
5500574f05d3SStephen Cameron 	}
550173153fe5SWebb Scales 
5502574f05d3SStephen Cameron 	memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
5503574f05d3SStephen Cameron 
5504574f05d3SStephen Cameron 	if (unlikely(lockup_detected(h))) {
550525163bd5SWebb Scales 		cmd->result = DID_NO_CONNECT << 16;
5506574f05d3SStephen Cameron 		cmd->scsi_done(cmd);
5507574f05d3SStephen Cameron 		return 0;
5508574f05d3SStephen Cameron 	}
550973153fe5SWebb Scales 	c = cmd_tagged_alloc(h, cmd);
5510574f05d3SStephen Cameron 
5511407863cbSStephen Cameron 	/*
5512407863cbSStephen Cameron 	 * Call alternate submit routine for I/O accelerated commands.
5513574f05d3SStephen Cameron 	 * Retries always go down the normal I/O path.
5514574f05d3SStephen Cameron 	 */
5515574f05d3SStephen Cameron 	if (likely(cmd->retries == 0 &&
5516574f05d3SStephen Cameron 		cmd->request->cmd_type == REQ_TYPE_FS &&
5517574f05d3SStephen Cameron 		h->acciopath_status)) {
5518592a0ad5SWebb Scales 		rc = hpsa_ioaccel_submit(h, c, cmd, scsi3addr);
5519574f05d3SStephen Cameron 		if (rc == 0)
5520592a0ad5SWebb Scales 			return 0;
5521592a0ad5SWebb Scales 		if (rc == SCSI_MLQUEUE_HOST_BUSY) {
552273153fe5SWebb Scales 			hpsa_cmd_resolve_and_free(h, c);
5523574f05d3SStephen Cameron 			return SCSI_MLQUEUE_HOST_BUSY;
5524574f05d3SStephen Cameron 		}
5525574f05d3SStephen Cameron 	}
5526574f05d3SStephen Cameron 	return hpsa_ciss_submit(h, c, cmd, scsi3addr);
5527574f05d3SStephen Cameron }
5528574f05d3SStephen Cameron 
55298ebc9248SWebb Scales static void hpsa_scan_complete(struct ctlr_info *h)
55305f389360SStephen M. Cameron {
55315f389360SStephen M. Cameron 	unsigned long flags;
55325f389360SStephen M. Cameron 
55335f389360SStephen M. Cameron 	spin_lock_irqsave(&h->scan_lock, flags);
55345f389360SStephen M. Cameron 	h->scan_finished = 1;
55355f389360SStephen M. Cameron 	wake_up_all(&h->scan_wait_queue);
55365f389360SStephen M. Cameron 	spin_unlock_irqrestore(&h->scan_lock, flags);
55375f389360SStephen M. Cameron }
55385f389360SStephen M. Cameron 
5539a08a8471SStephen M. Cameron static void hpsa_scan_start(struct Scsi_Host *sh)
5540a08a8471SStephen M. Cameron {
5541a08a8471SStephen M. Cameron 	struct ctlr_info *h = shost_to_hba(sh);
5542a08a8471SStephen M. Cameron 	unsigned long flags;
5543a08a8471SStephen M. Cameron 
55448ebc9248SWebb Scales 	/*
55458ebc9248SWebb Scales 	 * Don't let rescans be initiated on a controller known to be locked
55468ebc9248SWebb Scales 	 * up.  If the controller locks up *during* a rescan, that thread is
55478ebc9248SWebb Scales 	 * probably hosed, but at least we can prevent new rescan threads from
55488ebc9248SWebb Scales 	 * piling up on a locked up controller.
55498ebc9248SWebb Scales 	 */
55508ebc9248SWebb Scales 	if (unlikely(lockup_detected(h)))
55518ebc9248SWebb Scales 		return hpsa_scan_complete(h);
55525f389360SStephen M. Cameron 
5553a08a8471SStephen M. Cameron 	/* wait until any scan already in progress is finished. */
5554a08a8471SStephen M. Cameron 	while (1) {
5555a08a8471SStephen M. Cameron 		spin_lock_irqsave(&h->scan_lock, flags);
5556a08a8471SStephen M. Cameron 		if (h->scan_finished)
5557a08a8471SStephen M. Cameron 			break;
5558a08a8471SStephen M. Cameron 		spin_unlock_irqrestore(&h->scan_lock, flags);
5559a08a8471SStephen M. Cameron 		wait_event(h->scan_wait_queue, h->scan_finished);
5560a08a8471SStephen M. Cameron 		/* Note: We don't need to worry about a race between this
5561a08a8471SStephen M. Cameron 		 * thread and driver unload because the midlayer will
5562a08a8471SStephen M. Cameron 		 * have incremented the reference count, so unload won't
5563a08a8471SStephen M. Cameron 		 * happen if we're in here.
5564a08a8471SStephen M. Cameron 		 */
5565a08a8471SStephen M. Cameron 	}
5566a08a8471SStephen M. Cameron 	h->scan_finished = 0; /* mark scan as in progress */
5567a08a8471SStephen M. Cameron 	spin_unlock_irqrestore(&h->scan_lock, flags);
5568a08a8471SStephen M. Cameron 
55698ebc9248SWebb Scales 	if (unlikely(lockup_detected(h)))
55708ebc9248SWebb Scales 		return hpsa_scan_complete(h);
55715f389360SStephen M. Cameron 
55728aa60681SDon Brace 	hpsa_update_scsi_devices(h);
5573a08a8471SStephen M. Cameron 
55748ebc9248SWebb Scales 	hpsa_scan_complete(h);
5575a08a8471SStephen M. Cameron }
5576a08a8471SStephen M. Cameron 
55777c0a0229SDon Brace static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth)
55787c0a0229SDon Brace {
557903383736SDon Brace 	struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata;
558003383736SDon Brace 
558103383736SDon Brace 	if (!logical_drive)
558203383736SDon Brace 		return -ENODEV;
55837c0a0229SDon Brace 
55847c0a0229SDon Brace 	if (qdepth < 1)
55857c0a0229SDon Brace 		qdepth = 1;
558603383736SDon Brace 	else if (qdepth > logical_drive->queue_depth)
558703383736SDon Brace 		qdepth = logical_drive->queue_depth;
558803383736SDon Brace 
558903383736SDon Brace 	return scsi_change_queue_depth(sdev, qdepth);
55907c0a0229SDon Brace }
55917c0a0229SDon Brace 
5592a08a8471SStephen M. Cameron static int hpsa_scan_finished(struct Scsi_Host *sh,
5593a08a8471SStephen M. Cameron 	unsigned long elapsed_time)
5594a08a8471SStephen M. Cameron {
5595a08a8471SStephen M. Cameron 	struct ctlr_info *h = shost_to_hba(sh);
5596a08a8471SStephen M. Cameron 	unsigned long flags;
5597a08a8471SStephen M. Cameron 	int finished;
5598a08a8471SStephen M. Cameron 
5599a08a8471SStephen M. Cameron 	spin_lock_irqsave(&h->scan_lock, flags);
5600a08a8471SStephen M. Cameron 	finished = h->scan_finished;
5601a08a8471SStephen M. Cameron 	spin_unlock_irqrestore(&h->scan_lock, flags);
5602a08a8471SStephen M. Cameron 	return finished;
5603a08a8471SStephen M. Cameron }
5604a08a8471SStephen M. Cameron 
56052946e82bSRobert Elliott static int hpsa_scsi_host_alloc(struct ctlr_info *h)
5606edd16368SStephen M. Cameron {
5607b705690dSStephen M. Cameron 	struct Scsi_Host *sh;
5608edd16368SStephen M. Cameron 
5609b705690dSStephen M. Cameron 	sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
56102946e82bSRobert Elliott 	if (sh == NULL) {
56112946e82bSRobert Elliott 		dev_err(&h->pdev->dev, "scsi_host_alloc failed\n");
56122946e82bSRobert Elliott 		return -ENOMEM;
56132946e82bSRobert Elliott 	}
5614b705690dSStephen M. Cameron 
5615b705690dSStephen M. Cameron 	sh->io_port = 0;
5616b705690dSStephen M. Cameron 	sh->n_io_port = 0;
5617b705690dSStephen M. Cameron 	sh->this_id = -1;
5618b705690dSStephen M. Cameron 	sh->max_channel = 3;
5619b705690dSStephen M. Cameron 	sh->max_cmd_len = MAX_COMMAND_SIZE;
5620b705690dSStephen M. Cameron 	sh->max_lun = HPSA_MAX_LUN;
5621b705690dSStephen M. Cameron 	sh->max_id = HPSA_MAX_LUN;
562241ce4c35SStephen Cameron 	sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS;
5623d54c5c24SStephen Cameron 	sh->cmd_per_lun = sh->can_queue;
5624b705690dSStephen M. Cameron 	sh->sg_tablesize = h->maxsgentries;
5625d04e62b9SKevin Barnett 	sh->transportt = hpsa_sas_transport_template;
5626b705690dSStephen M. Cameron 	sh->hostdata[0] = (unsigned long) h;
5627b705690dSStephen M. Cameron 	sh->irq = h->intr[h->intr_mode];
5628b705690dSStephen M. Cameron 	sh->unique_id = sh->irq;
562964d513acSChristoph Hellwig 
56302946e82bSRobert Elliott 	h->scsi_host = sh;
56312946e82bSRobert Elliott 	return 0;
56322946e82bSRobert Elliott }
56332946e82bSRobert Elliott 
56342946e82bSRobert Elliott static int hpsa_scsi_add_host(struct ctlr_info *h)
56352946e82bSRobert Elliott {
56362946e82bSRobert Elliott 	int rv;
56372946e82bSRobert Elliott 
56382946e82bSRobert Elliott 	rv = scsi_add_host(h->scsi_host, &h->pdev->dev);
56392946e82bSRobert Elliott 	if (rv) {
56402946e82bSRobert Elliott 		dev_err(&h->pdev->dev, "scsi_add_host failed\n");
56412946e82bSRobert Elliott 		return rv;
56422946e82bSRobert Elliott 	}
56432946e82bSRobert Elliott 	scsi_scan_host(h->scsi_host);
56442946e82bSRobert Elliott 	return 0;
5645edd16368SStephen M. Cameron }
5646edd16368SStephen M. Cameron 
5647b69324ffSWebb Scales /*
564873153fe5SWebb Scales  * The block layer has already gone to the trouble of picking out a unique,
564973153fe5SWebb Scales  * small-integer tag for this request.  We use an offset from that value as
565073153fe5SWebb Scales  * an index to select our command block.  (The offset allows us to reserve the
565173153fe5SWebb Scales  * low-numbered entries for our own uses.)
565273153fe5SWebb Scales  */
565373153fe5SWebb Scales static int hpsa_get_cmd_index(struct scsi_cmnd *scmd)
565473153fe5SWebb Scales {
565573153fe5SWebb Scales 	int idx = scmd->request->tag;
565673153fe5SWebb Scales 
565773153fe5SWebb Scales 	if (idx < 0)
565873153fe5SWebb Scales 		return idx;
565973153fe5SWebb Scales 
566073153fe5SWebb Scales 	/* Offset to leave space for internal cmds. */
566173153fe5SWebb Scales 	return idx += HPSA_NRESERVED_CMDS;
566273153fe5SWebb Scales }
566373153fe5SWebb Scales 
566473153fe5SWebb Scales /*
5665b69324ffSWebb Scales  * Send a TEST_UNIT_READY command to the specified LUN using the specified
5666b69324ffSWebb Scales  * reply queue; returns zero if the unit is ready, and non-zero otherwise.
5667b69324ffSWebb Scales  */
5668b69324ffSWebb Scales static int hpsa_send_test_unit_ready(struct ctlr_info *h,
5669b69324ffSWebb Scales 				struct CommandList *c, unsigned char lunaddr[],
5670b69324ffSWebb Scales 				int reply_queue)
5671edd16368SStephen M. Cameron {
56728919358eSTomas Henzl 	int rc;
5673edd16368SStephen M. Cameron 
5674a2dac136SStephen M. Cameron 	/* Send the Test Unit Ready, fill_cmd can't fail, no mapping */
5675a2dac136SStephen M. Cameron 	(void) fill_cmd(c, TEST_UNIT_READY, h,
5676a2dac136SStephen M. Cameron 			NULL, 0, 0, lunaddr, TYPE_CMD);
5677c448ecfaSDon Brace 	rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT);
567825163bd5SWebb Scales 	if (rc)
5679b69324ffSWebb Scales 		return rc;
5680edd16368SStephen M. Cameron 	/* no unmap needed here because no data xfer. */
5681edd16368SStephen M. Cameron 
5682b69324ffSWebb Scales 	/* Check if the unit is already ready. */
5683edd16368SStephen M. Cameron 	if (c->err_info->CommandStatus == CMD_SUCCESS)
5684b69324ffSWebb Scales 		return 0;
5685edd16368SStephen M. Cameron 
5686b69324ffSWebb Scales 	/*
5687b69324ffSWebb Scales 	 * The first command sent after reset will receive "unit attention" to
5688b69324ffSWebb Scales 	 * indicate that the LUN has been reset...this is actually what we're
5689b69324ffSWebb Scales 	 * looking for (but, success is good too).
5690b69324ffSWebb Scales 	 */
5691edd16368SStephen M. Cameron 	if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
5692edd16368SStephen M. Cameron 		c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
5693edd16368SStephen M. Cameron 			(c->err_info->SenseInfo[2] == NO_SENSE ||
5694edd16368SStephen M. Cameron 			 c->err_info->SenseInfo[2] == UNIT_ATTENTION))
5695b69324ffSWebb Scales 		return 0;
5696b69324ffSWebb Scales 
5697b69324ffSWebb Scales 	return 1;
5698b69324ffSWebb Scales }
5699b69324ffSWebb Scales 
5700b69324ffSWebb Scales /*
5701b69324ffSWebb Scales  * Wait for a TEST_UNIT_READY command to complete, retrying as necessary;
5702b69324ffSWebb Scales  * returns zero when the unit is ready, and non-zero when giving up.
5703b69324ffSWebb Scales  */
5704b69324ffSWebb Scales static int hpsa_wait_for_test_unit_ready(struct ctlr_info *h,
5705b69324ffSWebb Scales 				struct CommandList *c,
5706b69324ffSWebb Scales 				unsigned char lunaddr[], int reply_queue)
5707b69324ffSWebb Scales {
5708b69324ffSWebb Scales 	int rc;
5709b69324ffSWebb Scales 	int count = 0;
5710b69324ffSWebb Scales 	int waittime = 1; /* seconds */
5711b69324ffSWebb Scales 
5712b69324ffSWebb Scales 	/* Send test unit ready until device ready, or give up. */
5713b69324ffSWebb Scales 	for (count = 0; count < HPSA_TUR_RETRY_LIMIT; count++) {
5714b69324ffSWebb Scales 
5715b69324ffSWebb Scales 		/*
5716b69324ffSWebb Scales 		 * Wait for a bit.  do this first, because if we send
5717b69324ffSWebb Scales 		 * the TUR right away, the reset will just abort it.
5718b69324ffSWebb Scales 		 */
5719b69324ffSWebb Scales 		msleep(1000 * waittime);
5720b69324ffSWebb Scales 
5721b69324ffSWebb Scales 		rc = hpsa_send_test_unit_ready(h, c, lunaddr, reply_queue);
5722b69324ffSWebb Scales 		if (!rc)
5723edd16368SStephen M. Cameron 			break;
5724b69324ffSWebb Scales 
5725b69324ffSWebb Scales 		/* Increase wait time with each try, up to a point. */
5726b69324ffSWebb Scales 		if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
5727b69324ffSWebb Scales 			waittime *= 2;
5728b69324ffSWebb Scales 
5729b69324ffSWebb Scales 		dev_warn(&h->pdev->dev,
5730b69324ffSWebb Scales 			 "waiting %d secs for device to become ready.\n",
5731b69324ffSWebb Scales 			 waittime);
5732b69324ffSWebb Scales 	}
5733b69324ffSWebb Scales 
5734b69324ffSWebb Scales 	return rc;
5735b69324ffSWebb Scales }
5736b69324ffSWebb Scales 
5737b69324ffSWebb Scales static int wait_for_device_to_become_ready(struct ctlr_info *h,
5738b69324ffSWebb Scales 					   unsigned char lunaddr[],
5739b69324ffSWebb Scales 					   int reply_queue)
5740b69324ffSWebb Scales {
5741b69324ffSWebb Scales 	int first_queue;
5742b69324ffSWebb Scales 	int last_queue;
5743b69324ffSWebb Scales 	int rq;
5744b69324ffSWebb Scales 	int rc = 0;
5745b69324ffSWebb Scales 	struct CommandList *c;
5746b69324ffSWebb Scales 
5747b69324ffSWebb Scales 	c = cmd_alloc(h);
5748b69324ffSWebb Scales 
5749b69324ffSWebb Scales 	/*
5750b69324ffSWebb Scales 	 * If no specific reply queue was requested, then send the TUR
5751b69324ffSWebb Scales 	 * repeatedly, requesting a reply on each reply queue; otherwise execute
5752b69324ffSWebb Scales 	 * the loop exactly once using only the specified queue.
5753b69324ffSWebb Scales 	 */
5754b69324ffSWebb Scales 	if (reply_queue == DEFAULT_REPLY_QUEUE) {
5755b69324ffSWebb Scales 		first_queue = 0;
5756b69324ffSWebb Scales 		last_queue = h->nreply_queues - 1;
5757b69324ffSWebb Scales 	} else {
5758b69324ffSWebb Scales 		first_queue = reply_queue;
5759b69324ffSWebb Scales 		last_queue = reply_queue;
5760b69324ffSWebb Scales 	}
5761b69324ffSWebb Scales 
5762b69324ffSWebb Scales 	for (rq = first_queue; rq <= last_queue; rq++) {
5763b69324ffSWebb Scales 		rc = hpsa_wait_for_test_unit_ready(h, c, lunaddr, rq);
5764b69324ffSWebb Scales 		if (rc)
5765b69324ffSWebb Scales 			break;
5766edd16368SStephen M. Cameron 	}
5767edd16368SStephen M. Cameron 
5768edd16368SStephen M. Cameron 	if (rc)
5769edd16368SStephen M. Cameron 		dev_warn(&h->pdev->dev, "giving up on device.\n");
5770edd16368SStephen M. Cameron 	else
5771edd16368SStephen M. Cameron 		dev_warn(&h->pdev->dev, "device is ready.\n");
5772edd16368SStephen M. Cameron 
577345fcb86eSStephen Cameron 	cmd_free(h, c);
5774edd16368SStephen M. Cameron 	return rc;
5775edd16368SStephen M. Cameron }
5776edd16368SStephen M. Cameron 
5777edd16368SStephen M. Cameron /* Need at least one of these error handlers to keep ../scsi/hosts.c from
5778edd16368SStephen M. Cameron  * complaining.  Doing a host- or bus-reset can't do anything good here.
5779edd16368SStephen M. Cameron  */
5780edd16368SStephen M. Cameron static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
5781edd16368SStephen M. Cameron {
5782edd16368SStephen M. Cameron 	int rc;
5783edd16368SStephen M. Cameron 	struct ctlr_info *h;
5784edd16368SStephen M. Cameron 	struct hpsa_scsi_dev_t *dev;
57850b9b7b6eSScott Teel 	u8 reset_type;
57862dc127bbSDan Carpenter 	char msg[48];
5787edd16368SStephen M. Cameron 
5788edd16368SStephen M. Cameron 	/* find the controller to which the command to be aborted was sent */
5789edd16368SStephen M. Cameron 	h = sdev_to_hba(scsicmd->device);
5790edd16368SStephen M. Cameron 	if (h == NULL) /* paranoia */
5791edd16368SStephen M. Cameron 		return FAILED;
5792e345893bSDon Brace 
5793e345893bSDon Brace 	if (lockup_detected(h))
5794e345893bSDon Brace 		return FAILED;
5795e345893bSDon Brace 
5796edd16368SStephen M. Cameron 	dev = scsicmd->device->hostdata;
5797edd16368SStephen M. Cameron 	if (!dev) {
5798d604f533SWebb Scales 		dev_err(&h->pdev->dev, "%s: device lookup failed\n", __func__);
5799edd16368SStephen M. Cameron 		return FAILED;
5800edd16368SStephen M. Cameron 	}
580125163bd5SWebb Scales 
580225163bd5SWebb Scales 	/* if controller locked up, we can guarantee command won't complete */
580325163bd5SWebb Scales 	if (lockup_detected(h)) {
58042dc127bbSDan Carpenter 		snprintf(msg, sizeof(msg),
58052dc127bbSDan Carpenter 			 "cmd %d RESET FAILED, lockup detected",
580673153fe5SWebb Scales 			 hpsa_get_cmd_index(scsicmd));
580773153fe5SWebb Scales 		hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
580825163bd5SWebb Scales 		return FAILED;
580925163bd5SWebb Scales 	}
581025163bd5SWebb Scales 
581125163bd5SWebb Scales 	/* this reset request might be the result of a lockup; check */
581225163bd5SWebb Scales 	if (detect_controller_lockup(h)) {
58132dc127bbSDan Carpenter 		snprintf(msg, sizeof(msg),
58142dc127bbSDan Carpenter 			 "cmd %d RESET FAILED, new lockup detected",
581573153fe5SWebb Scales 			 hpsa_get_cmd_index(scsicmd));
581673153fe5SWebb Scales 		hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
581725163bd5SWebb Scales 		return FAILED;
581825163bd5SWebb Scales 	}
581925163bd5SWebb Scales 
5820d604f533SWebb Scales 	/* Do not attempt on controller */
5821d604f533SWebb Scales 	if (is_hba_lunid(dev->scsi3addr))
5822d604f533SWebb Scales 		return SUCCESS;
5823d604f533SWebb Scales 
58240b9b7b6eSScott Teel 	if (is_logical_dev_addr_mode(dev->scsi3addr))
58250b9b7b6eSScott Teel 		reset_type = HPSA_DEVICE_RESET_MSG;
58260b9b7b6eSScott Teel 	else
58270b9b7b6eSScott Teel 		reset_type = HPSA_PHYS_TARGET_RESET;
58280b9b7b6eSScott Teel 
58290b9b7b6eSScott Teel 	sprintf(msg, "resetting %s",
58300b9b7b6eSScott Teel 		reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ");
58310b9b7b6eSScott Teel 	hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
583225163bd5SWebb Scales 
5833da03ded0SDon Brace 	h->reset_in_progress = 1;
5834d416b0c7SStephen M. Cameron 
5835edd16368SStephen M. Cameron 	/* send a reset to the SCSI LUN which the command was sent to */
58360b9b7b6eSScott Teel 	rc = hpsa_do_reset(h, dev, dev->scsi3addr, reset_type,
583725163bd5SWebb Scales 			   DEFAULT_REPLY_QUEUE);
58380b9b7b6eSScott Teel 	sprintf(msg, "reset %s %s",
58390b9b7b6eSScott Teel 		reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ",
58402dc127bbSDan Carpenter 		rc == 0 ? "completed successfully" : "failed");
5841d604f533SWebb Scales 	hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
5842da03ded0SDon Brace 	h->reset_in_progress = 0;
5843d604f533SWebb Scales 	return rc == 0 ? SUCCESS : FAILED;
5844edd16368SStephen M. Cameron }
5845edd16368SStephen M. Cameron 
58466cba3f19SStephen M. Cameron static void swizzle_abort_tag(u8 *tag)
58476cba3f19SStephen M. Cameron {
58486cba3f19SStephen M. Cameron 	u8 original_tag[8];
58496cba3f19SStephen M. Cameron 
58506cba3f19SStephen M. Cameron 	memcpy(original_tag, tag, 8);
58516cba3f19SStephen M. Cameron 	tag[0] = original_tag[3];
58526cba3f19SStephen M. Cameron 	tag[1] = original_tag[2];
58536cba3f19SStephen M. Cameron 	tag[2] = original_tag[1];
58546cba3f19SStephen M. Cameron 	tag[3] = original_tag[0];
58556cba3f19SStephen M. Cameron 	tag[4] = original_tag[7];
58566cba3f19SStephen M. Cameron 	tag[5] = original_tag[6];
58576cba3f19SStephen M. Cameron 	tag[6] = original_tag[5];
58586cba3f19SStephen M. Cameron 	tag[7] = original_tag[4];
58596cba3f19SStephen M. Cameron }
58606cba3f19SStephen M. Cameron 
586117eb87d2SScott Teel static void hpsa_get_tag(struct ctlr_info *h,
58622b08b3e9SDon Brace 	struct CommandList *c, __le32 *taglower, __le32 *tagupper)
586317eb87d2SScott Teel {
58642b08b3e9SDon Brace 	u64 tag;
586517eb87d2SScott Teel 	if (c->cmd_type == CMD_IOACCEL1) {
586617eb87d2SScott Teel 		struct io_accel1_cmd *cm1 = (struct io_accel1_cmd *)
586717eb87d2SScott Teel 			&h->ioaccel_cmd_pool[c->cmdindex];
58682b08b3e9SDon Brace 		tag = le64_to_cpu(cm1->tag);
58692b08b3e9SDon Brace 		*tagupper = cpu_to_le32(tag >> 32);
58702b08b3e9SDon Brace 		*taglower = cpu_to_le32(tag);
587154b6e9e9SScott Teel 		return;
587254b6e9e9SScott Teel 	}
587354b6e9e9SScott Teel 	if (c->cmd_type == CMD_IOACCEL2) {
587454b6e9e9SScott Teel 		struct io_accel2_cmd *cm2 = (struct io_accel2_cmd *)
587554b6e9e9SScott Teel 			&h->ioaccel2_cmd_pool[c->cmdindex];
5876dd0e19f3SScott Teel 		/* upper tag not used in ioaccel2 mode */
5877dd0e19f3SScott Teel 		memset(tagupper, 0, sizeof(*tagupper));
5878dd0e19f3SScott Teel 		*taglower = cm2->Tag;
587954b6e9e9SScott Teel 		return;
588054b6e9e9SScott Teel 	}
58812b08b3e9SDon Brace 	tag = le64_to_cpu(c->Header.tag);
58822b08b3e9SDon Brace 	*tagupper = cpu_to_le32(tag >> 32);
58832b08b3e9SDon Brace 	*taglower = cpu_to_le32(tag);
588417eb87d2SScott Teel }
588554b6e9e9SScott Teel 
588675167d2cSStephen M. Cameron static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr,
58879b5c48c2SStephen Cameron 	struct CommandList *abort, int reply_queue)
588875167d2cSStephen M. Cameron {
588975167d2cSStephen M. Cameron 	int rc = IO_OK;
589075167d2cSStephen M. Cameron 	struct CommandList *c;
589175167d2cSStephen M. Cameron 	struct ErrorInfo *ei;
58922b08b3e9SDon Brace 	__le32 tagupper, taglower;
589375167d2cSStephen M. Cameron 
589445fcb86eSStephen Cameron 	c = cmd_alloc(h);
589575167d2cSStephen M. Cameron 
5896a2dac136SStephen M. Cameron 	/* fill_cmd can't fail here, no buffer to map */
58979b5c48c2SStephen Cameron 	(void) fill_cmd(c, HPSA_ABORT_MSG, h, &abort->Header.tag,
5898a2dac136SStephen M. Cameron 		0, 0, scsi3addr, TYPE_MSG);
58999b5c48c2SStephen Cameron 	if (h->needs_abort_tags_swizzled)
59006cba3f19SStephen M. Cameron 		swizzle_abort_tag(&c->Request.CDB[4]);
5901c448ecfaSDon Brace 	(void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT);
590217eb87d2SScott Teel 	hpsa_get_tag(h, abort, &taglower, &tagupper);
590325163bd5SWebb Scales 	dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd(abort) completed.\n",
590417eb87d2SScott Teel 		__func__, tagupper, taglower);
590575167d2cSStephen M. Cameron 	/* no unmap needed here because no data xfer. */
590675167d2cSStephen M. Cameron 
590775167d2cSStephen M. Cameron 	ei = c->err_info;
590875167d2cSStephen M. Cameron 	switch (ei->CommandStatus) {
590975167d2cSStephen M. Cameron 	case CMD_SUCCESS:
591075167d2cSStephen M. Cameron 		break;
59119437ac43SStephen Cameron 	case CMD_TMF_STATUS:
59129437ac43SStephen Cameron 		rc = hpsa_evaluate_tmf_status(h, c);
59139437ac43SStephen Cameron 		break;
591475167d2cSStephen M. Cameron 	case CMD_UNABORTABLE: /* Very common, don't make noise. */
591575167d2cSStephen M. Cameron 		rc = -1;
591675167d2cSStephen M. Cameron 		break;
591775167d2cSStephen M. Cameron 	default:
591875167d2cSStephen M. Cameron 		dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n",
591917eb87d2SScott Teel 			__func__, tagupper, taglower);
5920d1e8beacSStephen M. Cameron 		hpsa_scsi_interpret_error(h, c);
592175167d2cSStephen M. Cameron 		rc = -1;
592275167d2cSStephen M. Cameron 		break;
592375167d2cSStephen M. Cameron 	}
592445fcb86eSStephen Cameron 	cmd_free(h, c);
5925dd0e19f3SScott Teel 	dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n",
5926dd0e19f3SScott Teel 		__func__, tagupper, taglower);
592775167d2cSStephen M. Cameron 	return rc;
592875167d2cSStephen M. Cameron }
592975167d2cSStephen M. Cameron 
59308be986ccSStephen Cameron static void setup_ioaccel2_abort_cmd(struct CommandList *c, struct ctlr_info *h,
59318be986ccSStephen Cameron 	struct CommandList *command_to_abort, int reply_queue)
59328be986ccSStephen Cameron {
59338be986ccSStephen Cameron 	struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
59348be986ccSStephen Cameron 	struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2;
59358be986ccSStephen Cameron 	struct io_accel2_cmd *c2a =
59368be986ccSStephen Cameron 		&h->ioaccel2_cmd_pool[command_to_abort->cmdindex];
5937a58e7e53SWebb Scales 	struct scsi_cmnd *scmd = command_to_abort->scsi_cmd;
59388be986ccSStephen Cameron 	struct hpsa_scsi_dev_t *dev = scmd->device->hostdata;
59398be986ccSStephen Cameron 
594045e596cdSDon Brace 	if (!dev)
594145e596cdSDon Brace 		return;
594245e596cdSDon Brace 
59438be986ccSStephen Cameron 	/*
59448be986ccSStephen Cameron 	 * We're overlaying struct hpsa_tmf_struct on top of something which
59458be986ccSStephen Cameron 	 * was allocated as a struct io_accel2_cmd, so we better be sure it
59468be986ccSStephen Cameron 	 * actually fits, and doesn't overrun the error info space.
59478be986ccSStephen Cameron 	 */
59488be986ccSStephen Cameron 	BUILD_BUG_ON(sizeof(struct hpsa_tmf_struct) >
59498be986ccSStephen Cameron 			sizeof(struct io_accel2_cmd));
59508be986ccSStephen Cameron 	BUG_ON(offsetof(struct io_accel2_cmd, error_data) <
59518be986ccSStephen Cameron 			offsetof(struct hpsa_tmf_struct, error_len) +
59528be986ccSStephen Cameron 				sizeof(ac->error_len));
59538be986ccSStephen Cameron 
59548be986ccSStephen Cameron 	c->cmd_type = IOACCEL2_TMF;
5955a58e7e53SWebb Scales 	c->scsi_cmd = SCSI_CMD_BUSY;
5956a58e7e53SWebb Scales 
59578be986ccSStephen Cameron 	/* Adjust the DMA address to point to the accelerated command buffer */
59588be986ccSStephen Cameron 	c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle +
59598be986ccSStephen Cameron 				(c->cmdindex * sizeof(struct io_accel2_cmd));
59608be986ccSStephen Cameron 	BUG_ON(c->busaddr & 0x0000007F);
59618be986ccSStephen Cameron 
59628be986ccSStephen Cameron 	memset(ac, 0, sizeof(*c2)); /* yes this is correct */
59638be986ccSStephen Cameron 	ac->iu_type = IOACCEL2_IU_TMF_TYPE;
59648be986ccSStephen Cameron 	ac->reply_queue = reply_queue;
59658be986ccSStephen Cameron 	ac->tmf = IOACCEL2_TMF_ABORT;
59668be986ccSStephen Cameron 	ac->it_nexus = cpu_to_le32(dev->ioaccel_handle);
59678be986ccSStephen Cameron 	memset(ac->lun_id, 0, sizeof(ac->lun_id));
59688be986ccSStephen Cameron 	ac->tag = cpu_to_le64(c->cmdindex << DIRECT_LOOKUP_SHIFT);
59698be986ccSStephen Cameron 	ac->abort_tag = cpu_to_le64(le32_to_cpu(c2a->Tag));
59708be986ccSStephen Cameron 	ac->error_ptr = cpu_to_le64(c->busaddr +
59718be986ccSStephen Cameron 			offsetof(struct io_accel2_cmd, error_data));
59728be986ccSStephen Cameron 	ac->error_len = cpu_to_le32(sizeof(c2->error_data));
59738be986ccSStephen Cameron }
59748be986ccSStephen Cameron 
597554b6e9e9SScott Teel /* ioaccel2 path firmware cannot handle abort task requests.
597654b6e9e9SScott Teel  * Change abort requests to physical target reset, and send to the
597754b6e9e9SScott Teel  * address of the physical disk used for the ioaccel 2 command.
597854b6e9e9SScott Teel  * Return 0 on success (IO_OK)
597954b6e9e9SScott Teel  *	 -1 on failure
598054b6e9e9SScott Teel  */
598154b6e9e9SScott Teel 
598254b6e9e9SScott Teel static int hpsa_send_reset_as_abort_ioaccel2(struct ctlr_info *h,
598325163bd5SWebb Scales 	unsigned char *scsi3addr, struct CommandList *abort, int reply_queue)
598454b6e9e9SScott Teel {
598554b6e9e9SScott Teel 	int rc = IO_OK;
598654b6e9e9SScott Teel 	struct scsi_cmnd *scmd; /* scsi command within request being aborted */
598754b6e9e9SScott Teel 	struct hpsa_scsi_dev_t *dev; /* device to which scsi cmd was sent */
598854b6e9e9SScott Teel 	unsigned char phys_scsi3addr[8]; /* addr of phys disk with volume */
598954b6e9e9SScott Teel 	unsigned char *psa = &phys_scsi3addr[0];
599054b6e9e9SScott Teel 
599154b6e9e9SScott Teel 	/* Get a pointer to the hpsa logical device. */
59927fa3030cSStephen Cameron 	scmd = abort->scsi_cmd;
599354b6e9e9SScott Teel 	dev = (struct hpsa_scsi_dev_t *)(scmd->device->hostdata);
599454b6e9e9SScott Teel 	if (dev == NULL) {
599554b6e9e9SScott Teel 		dev_warn(&h->pdev->dev,
599654b6e9e9SScott Teel 			"Cannot abort: no device pointer for command.\n");
599754b6e9e9SScott Teel 			return -1; /* not abortable */
599854b6e9e9SScott Teel 	}
599954b6e9e9SScott Teel 
60002ba8bfc8SStephen M. Cameron 	if (h->raid_offload_debug > 0)
60012ba8bfc8SStephen M. Cameron 		dev_info(&h->pdev->dev,
60020d96ef5fSWebb Scales 			"scsi %d:%d:%d:%d %s scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
60032ba8bfc8SStephen M. Cameron 			h->scsi_host->host_no, dev->bus, dev->target, dev->lun,
60040d96ef5fSWebb Scales 			"Reset as abort",
60052ba8bfc8SStephen M. Cameron 			scsi3addr[0], scsi3addr[1], scsi3addr[2], scsi3addr[3],
60062ba8bfc8SStephen M. Cameron 			scsi3addr[4], scsi3addr[5], scsi3addr[6], scsi3addr[7]);
60072ba8bfc8SStephen M. Cameron 
600854b6e9e9SScott Teel 	if (!dev->offload_enabled) {
600954b6e9e9SScott Teel 		dev_warn(&h->pdev->dev,
601054b6e9e9SScott Teel 			"Can't abort: device is not operating in HP SSD Smart Path mode.\n");
601154b6e9e9SScott Teel 		return -1; /* not abortable */
601254b6e9e9SScott Teel 	}
601354b6e9e9SScott Teel 
601454b6e9e9SScott Teel 	/* Incoming scsi3addr is logical addr. We need physical disk addr. */
601554b6e9e9SScott Teel 	if (!hpsa_get_pdisk_of_ioaccel2(h, abort, psa)) {
601654b6e9e9SScott Teel 		dev_warn(&h->pdev->dev, "Can't abort: Failed lookup of physical address.\n");
601754b6e9e9SScott Teel 		return -1; /* not abortable */
601854b6e9e9SScott Teel 	}
601954b6e9e9SScott Teel 
602054b6e9e9SScott Teel 	/* send the reset */
60212ba8bfc8SStephen M. Cameron 	if (h->raid_offload_debug > 0)
60222ba8bfc8SStephen M. Cameron 		dev_info(&h->pdev->dev,
60232ba8bfc8SStephen M. Cameron 			"Reset as abort: Resetting physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
60242ba8bfc8SStephen M. Cameron 			psa[0], psa[1], psa[2], psa[3],
60252ba8bfc8SStephen M. Cameron 			psa[4], psa[5], psa[6], psa[7]);
6026b32ece0fSDon Brace 	rc = hpsa_do_reset(h, dev, psa, HPSA_PHYS_TARGET_RESET, reply_queue);
602754b6e9e9SScott Teel 	if (rc != 0) {
602854b6e9e9SScott Teel 		dev_warn(&h->pdev->dev,
602954b6e9e9SScott Teel 			"Reset as abort: Failed on physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
603054b6e9e9SScott Teel 			psa[0], psa[1], psa[2], psa[3],
603154b6e9e9SScott Teel 			psa[4], psa[5], psa[6], psa[7]);
603254b6e9e9SScott Teel 		return rc; /* failed to reset */
603354b6e9e9SScott Teel 	}
603454b6e9e9SScott Teel 
603554b6e9e9SScott Teel 	/* wait for device to recover */
6036b69324ffSWebb Scales 	if (wait_for_device_to_become_ready(h, psa, reply_queue) != 0) {
603754b6e9e9SScott Teel 		dev_warn(&h->pdev->dev,
603854b6e9e9SScott Teel 			"Reset as abort: Failed: Device never recovered from reset: 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
603954b6e9e9SScott Teel 			psa[0], psa[1], psa[2], psa[3],
604054b6e9e9SScott Teel 			psa[4], psa[5], psa[6], psa[7]);
604154b6e9e9SScott Teel 		return -1;  /* failed to recover */
604254b6e9e9SScott Teel 	}
604354b6e9e9SScott Teel 
604454b6e9e9SScott Teel 	/* device recovered */
604554b6e9e9SScott Teel 	dev_info(&h->pdev->dev,
604654b6e9e9SScott Teel 		"Reset as abort: Device recovered from reset: scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
604754b6e9e9SScott Teel 		psa[0], psa[1], psa[2], psa[3],
604854b6e9e9SScott Teel 		psa[4], psa[5], psa[6], psa[7]);
604954b6e9e9SScott Teel 
605054b6e9e9SScott Teel 	return rc; /* success */
605154b6e9e9SScott Teel }
605254b6e9e9SScott Teel 
60538be986ccSStephen Cameron static int hpsa_send_abort_ioaccel2(struct ctlr_info *h,
60548be986ccSStephen Cameron 	struct CommandList *abort, int reply_queue)
60558be986ccSStephen Cameron {
60568be986ccSStephen Cameron 	int rc = IO_OK;
60578be986ccSStephen Cameron 	struct CommandList *c;
60588be986ccSStephen Cameron 	__le32 taglower, tagupper;
60598be986ccSStephen Cameron 	struct hpsa_scsi_dev_t *dev;
60608be986ccSStephen Cameron 	struct io_accel2_cmd *c2;
60618be986ccSStephen Cameron 
60628be986ccSStephen Cameron 	dev = abort->scsi_cmd->device->hostdata;
606345e596cdSDon Brace 	if (!dev)
606445e596cdSDon Brace 		return -1;
606545e596cdSDon Brace 
60668be986ccSStephen Cameron 	if (!dev->offload_enabled && !dev->hba_ioaccel_enabled)
60678be986ccSStephen Cameron 		return -1;
60688be986ccSStephen Cameron 
60698be986ccSStephen Cameron 	c = cmd_alloc(h);
60708be986ccSStephen Cameron 	setup_ioaccel2_abort_cmd(c, h, abort, reply_queue);
60718be986ccSStephen Cameron 	c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
6072c448ecfaSDon Brace 	(void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT);
60738be986ccSStephen Cameron 	hpsa_get_tag(h, abort, &taglower, &tagupper);
60748be986ccSStephen Cameron 	dev_dbg(&h->pdev->dev,
60758be986ccSStephen Cameron 		"%s: Tag:0x%08x:%08x: do_simple_cmd(ioaccel2 abort) completed.\n",
60768be986ccSStephen Cameron 		__func__, tagupper, taglower);
60778be986ccSStephen Cameron 	/* no unmap needed here because no data xfer. */
60788be986ccSStephen Cameron 
60798be986ccSStephen Cameron 	dev_dbg(&h->pdev->dev,
60808be986ccSStephen Cameron 		"%s: Tag:0x%08x:%08x: abort service response = 0x%02x.\n",
60818be986ccSStephen Cameron 		__func__, tagupper, taglower, c2->error_data.serv_response);
60828be986ccSStephen Cameron 	switch (c2->error_data.serv_response) {
60838be986ccSStephen Cameron 	case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE:
60848be986ccSStephen Cameron 	case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS:
60858be986ccSStephen Cameron 		rc = 0;
60868be986ccSStephen Cameron 		break;
60878be986ccSStephen Cameron 	case IOACCEL2_SERV_RESPONSE_TMF_REJECTED:
60888be986ccSStephen Cameron 	case IOACCEL2_SERV_RESPONSE_FAILURE:
60898be986ccSStephen Cameron 	case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN:
60908be986ccSStephen Cameron 		rc = -1;
60918be986ccSStephen Cameron 		break;
60928be986ccSStephen Cameron 	default:
60938be986ccSStephen Cameron 		dev_warn(&h->pdev->dev,
60948be986ccSStephen Cameron 			"%s: Tag:0x%08x:%08x: unknown abort service response 0x%02x\n",
60958be986ccSStephen Cameron 			__func__, tagupper, taglower,
60968be986ccSStephen Cameron 			c2->error_data.serv_response);
60978be986ccSStephen Cameron 		rc = -1;
60988be986ccSStephen Cameron 	}
60998be986ccSStephen Cameron 	cmd_free(h, c);
61008be986ccSStephen Cameron 	dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", __func__,
61018be986ccSStephen Cameron 		tagupper, taglower);
61028be986ccSStephen Cameron 	return rc;
61038be986ccSStephen Cameron }
61048be986ccSStephen Cameron 
61056cba3f19SStephen M. Cameron static int hpsa_send_abort_both_ways(struct ctlr_info *h,
610639f3deb2SDon Brace 	struct hpsa_scsi_dev_t *dev, struct CommandList *abort, int reply_queue)
61076cba3f19SStephen M. Cameron {
61088be986ccSStephen Cameron 	/*
61098be986ccSStephen Cameron 	 * ioccelerator mode 2 commands should be aborted via the
611054b6e9e9SScott Teel 	 * accelerated path, since RAID path is unaware of these commands,
61118be986ccSStephen Cameron 	 * but not all underlying firmware can handle abort TMF.
61128be986ccSStephen Cameron 	 * Change abort to physical device reset when abort TMF is unsupported.
611354b6e9e9SScott Teel 	 */
61148be986ccSStephen Cameron 	if (abort->cmd_type == CMD_IOACCEL2) {
611539f3deb2SDon Brace 		if ((HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags) ||
611639f3deb2SDon Brace 			dev->physical_device)
61178be986ccSStephen Cameron 			return hpsa_send_abort_ioaccel2(h, abort,
61188be986ccSStephen Cameron 						reply_queue);
61198be986ccSStephen Cameron 		else
612039f3deb2SDon Brace 			return hpsa_send_reset_as_abort_ioaccel2(h,
612139f3deb2SDon Brace 							dev->scsi3addr,
612225163bd5SWebb Scales 							abort, reply_queue);
61238be986ccSStephen Cameron 	}
612439f3deb2SDon Brace 	return hpsa_send_abort(h, dev->scsi3addr, abort, reply_queue);
612525163bd5SWebb Scales }
612625163bd5SWebb Scales 
612725163bd5SWebb Scales /* Find out which reply queue a command was meant to return on */
612825163bd5SWebb Scales static int hpsa_extract_reply_queue(struct ctlr_info *h,
612925163bd5SWebb Scales 					struct CommandList *c)
613025163bd5SWebb Scales {
613125163bd5SWebb Scales 	if (c->cmd_type == CMD_IOACCEL2)
613225163bd5SWebb Scales 		return h->ioaccel2_cmd_pool[c->cmdindex].reply_queue;
613325163bd5SWebb Scales 	return c->Header.ReplyQueue;
61346cba3f19SStephen M. Cameron }
61356cba3f19SStephen M. Cameron 
61369b5c48c2SStephen Cameron /*
61379b5c48c2SStephen Cameron  * Limit concurrency of abort commands to prevent
61389b5c48c2SStephen Cameron  * over-subscription of commands
61399b5c48c2SStephen Cameron  */
61409b5c48c2SStephen Cameron static inline int wait_for_available_abort_cmd(struct ctlr_info *h)
61419b5c48c2SStephen Cameron {
61429b5c48c2SStephen Cameron #define ABORT_CMD_WAIT_MSECS 5000
61439b5c48c2SStephen Cameron 	return !wait_event_timeout(h->abort_cmd_wait_queue,
61449b5c48c2SStephen Cameron 			atomic_dec_if_positive(&h->abort_cmds_available) >= 0,
61459b5c48c2SStephen Cameron 			msecs_to_jiffies(ABORT_CMD_WAIT_MSECS));
61469b5c48c2SStephen Cameron }
61479b5c48c2SStephen Cameron 
614875167d2cSStephen M. Cameron /* Send an abort for the specified command.
614975167d2cSStephen M. Cameron  *	If the device and controller support it,
615075167d2cSStephen M. Cameron  *		send a task abort request.
615175167d2cSStephen M. Cameron  */
615275167d2cSStephen M. Cameron static int hpsa_eh_abort_handler(struct scsi_cmnd *sc)
615375167d2cSStephen M. Cameron {
615475167d2cSStephen M. Cameron 
6155a58e7e53SWebb Scales 	int rc;
615675167d2cSStephen M. Cameron 	struct ctlr_info *h;
615775167d2cSStephen M. Cameron 	struct hpsa_scsi_dev_t *dev;
615875167d2cSStephen M. Cameron 	struct CommandList *abort; /* pointer to command to be aborted */
615975167d2cSStephen M. Cameron 	struct scsi_cmnd *as;	/* ptr to scsi cmd inside aborted command. */
616075167d2cSStephen M. Cameron 	char msg[256];		/* For debug messaging. */
616175167d2cSStephen M. Cameron 	int ml = 0;
61622b08b3e9SDon Brace 	__le32 tagupper, taglower;
616325163bd5SWebb Scales 	int refcount, reply_queue;
616425163bd5SWebb Scales 
616525163bd5SWebb Scales 	if (sc == NULL)
616625163bd5SWebb Scales 		return FAILED;
616775167d2cSStephen M. Cameron 
61689b5c48c2SStephen Cameron 	if (sc->device == NULL)
61699b5c48c2SStephen Cameron 		return FAILED;
61709b5c48c2SStephen Cameron 
617175167d2cSStephen M. Cameron 	/* Find the controller of the command to be aborted */
617275167d2cSStephen M. Cameron 	h = sdev_to_hba(sc->device);
61739b5c48c2SStephen Cameron 	if (h == NULL)
617475167d2cSStephen M. Cameron 		return FAILED;
617575167d2cSStephen M. Cameron 
617625163bd5SWebb Scales 	/* Find the device of the command to be aborted */
617725163bd5SWebb Scales 	dev = sc->device->hostdata;
617825163bd5SWebb Scales 	if (!dev) {
617925163bd5SWebb Scales 		dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n",
618025163bd5SWebb Scales 				msg);
6181e345893bSDon Brace 		return FAILED;
618225163bd5SWebb Scales 	}
618325163bd5SWebb Scales 
618425163bd5SWebb Scales 	/* If controller locked up, we can guarantee command won't complete */
618525163bd5SWebb Scales 	if (lockup_detected(h)) {
618625163bd5SWebb Scales 		hpsa_show_dev_msg(KERN_WARNING, h, dev,
618725163bd5SWebb Scales 					"ABORT FAILED, lockup detected");
618825163bd5SWebb Scales 		return FAILED;
618925163bd5SWebb Scales 	}
619025163bd5SWebb Scales 
619125163bd5SWebb Scales 	/* This is a good time to check if controller lockup has occurred */
619225163bd5SWebb Scales 	if (detect_controller_lockup(h)) {
619325163bd5SWebb Scales 		hpsa_show_dev_msg(KERN_WARNING, h, dev,
619425163bd5SWebb Scales 					"ABORT FAILED, new lockup detected");
619525163bd5SWebb Scales 		return FAILED;
619625163bd5SWebb Scales 	}
6197e345893bSDon Brace 
619875167d2cSStephen M. Cameron 	/* Check that controller supports some kind of task abort */
619975167d2cSStephen M. Cameron 	if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) &&
620075167d2cSStephen M. Cameron 		!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
620175167d2cSStephen M. Cameron 		return FAILED;
620275167d2cSStephen M. Cameron 
620375167d2cSStephen M. Cameron 	memset(msg, 0, sizeof(msg));
62044b761557SRobert Elliott 	ml += sprintf(msg+ml, "scsi %d:%d:%d:%llu %s %p",
620575167d2cSStephen M. Cameron 		h->scsi_host->host_no, sc->device->channel,
62060d96ef5fSWebb Scales 		sc->device->id, sc->device->lun,
62074b761557SRobert Elliott 		"Aborting command", sc);
620875167d2cSStephen M. Cameron 
620975167d2cSStephen M. Cameron 	/* Get SCSI command to be aborted */
621075167d2cSStephen M. Cameron 	abort = (struct CommandList *) sc->host_scribble;
621175167d2cSStephen M. Cameron 	if (abort == NULL) {
6212281a7fd0SWebb Scales 		/* This can happen if the command already completed. */
6213281a7fd0SWebb Scales 		return SUCCESS;
6214281a7fd0SWebb Scales 	}
6215281a7fd0SWebb Scales 	refcount = atomic_inc_return(&abort->refcount);
6216281a7fd0SWebb Scales 	if (refcount == 1) { /* Command is done already. */
6217281a7fd0SWebb Scales 		cmd_free(h, abort);
6218281a7fd0SWebb Scales 		return SUCCESS;
621975167d2cSStephen M. Cameron 	}
62209b5c48c2SStephen Cameron 
62219b5c48c2SStephen Cameron 	/* Don't bother trying the abort if we know it won't work. */
62229b5c48c2SStephen Cameron 	if (abort->cmd_type != CMD_IOACCEL2 &&
62239b5c48c2SStephen Cameron 		abort->cmd_type != CMD_IOACCEL1 && !dev->supports_aborts) {
62249b5c48c2SStephen Cameron 		cmd_free(h, abort);
62259b5c48c2SStephen Cameron 		return FAILED;
62269b5c48c2SStephen Cameron 	}
62279b5c48c2SStephen Cameron 
6228a58e7e53SWebb Scales 	/*
6229a58e7e53SWebb Scales 	 * Check that we're aborting the right command.
6230a58e7e53SWebb Scales 	 * It's possible the CommandList already completed and got re-used.
6231a58e7e53SWebb Scales 	 */
6232a58e7e53SWebb Scales 	if (abort->scsi_cmd != sc) {
6233a58e7e53SWebb Scales 		cmd_free(h, abort);
6234a58e7e53SWebb Scales 		return SUCCESS;
6235a58e7e53SWebb Scales 	}
6236a58e7e53SWebb Scales 
6237a58e7e53SWebb Scales 	abort->abort_pending = true;
623817eb87d2SScott Teel 	hpsa_get_tag(h, abort, &taglower, &tagupper);
623925163bd5SWebb Scales 	reply_queue = hpsa_extract_reply_queue(h, abort);
624017eb87d2SScott Teel 	ml += sprintf(msg+ml, "Tag:0x%08x:%08x ", tagupper, taglower);
62417fa3030cSStephen Cameron 	as  = abort->scsi_cmd;
624275167d2cSStephen M. Cameron 	if (as != NULL)
62434b761557SRobert Elliott 		ml += sprintf(msg+ml,
62444b761557SRobert Elliott 			"CDBLen: %d CDB: 0x%02x%02x... SN: 0x%lx ",
62454b761557SRobert Elliott 			as->cmd_len, as->cmnd[0], as->cmnd[1],
62464b761557SRobert Elliott 			as->serial_number);
62474b761557SRobert Elliott 	dev_warn(&h->pdev->dev, "%s BEING SENT\n", msg);
62480d96ef5fSWebb Scales 	hpsa_show_dev_msg(KERN_WARNING, h, dev, "Aborting command");
62494b761557SRobert Elliott 
625075167d2cSStephen M. Cameron 	/*
625175167d2cSStephen M. Cameron 	 * Command is in flight, or possibly already completed
625275167d2cSStephen M. Cameron 	 * by the firmware (but not to the scsi mid layer) but we can't
625375167d2cSStephen M. Cameron 	 * distinguish which.  Send the abort down.
625475167d2cSStephen M. Cameron 	 */
62559b5c48c2SStephen Cameron 	if (wait_for_available_abort_cmd(h)) {
62569b5c48c2SStephen Cameron 		dev_warn(&h->pdev->dev,
62574b761557SRobert Elliott 			"%s FAILED, timeout waiting for an abort command to become available.\n",
62584b761557SRobert Elliott 			msg);
62599b5c48c2SStephen Cameron 		cmd_free(h, abort);
62609b5c48c2SStephen Cameron 		return FAILED;
62619b5c48c2SStephen Cameron 	}
626239f3deb2SDon Brace 	rc = hpsa_send_abort_both_ways(h, dev, abort, reply_queue);
62639b5c48c2SStephen Cameron 	atomic_inc(&h->abort_cmds_available);
62649b5c48c2SStephen Cameron 	wake_up_all(&h->abort_cmd_wait_queue);
626575167d2cSStephen M. Cameron 	if (rc != 0) {
62664b761557SRobert Elliott 		dev_warn(&h->pdev->dev, "%s SENT, FAILED\n", msg);
62670d96ef5fSWebb Scales 		hpsa_show_dev_msg(KERN_WARNING, h, dev,
62680d96ef5fSWebb Scales 				"FAILED to abort command");
6269281a7fd0SWebb Scales 		cmd_free(h, abort);
627075167d2cSStephen M. Cameron 		return FAILED;
627175167d2cSStephen M. Cameron 	}
62724b761557SRobert Elliott 	dev_info(&h->pdev->dev, "%s SENT, SUCCESS\n", msg);
6273d604f533SWebb Scales 	wait_event(h->event_sync_wait_queue,
6274a58e7e53SWebb Scales 		   abort->scsi_cmd != sc || lockup_detected(h));
6275281a7fd0SWebb Scales 	cmd_free(h, abort);
6276a58e7e53SWebb Scales 	return !lockup_detected(h) ? SUCCESS : FAILED;
627775167d2cSStephen M. Cameron }
627875167d2cSStephen M. Cameron 
6279edd16368SStephen M. Cameron /*
628073153fe5SWebb Scales  * For operations with an associated SCSI command, a command block is allocated
628173153fe5SWebb Scales  * at init, and managed by cmd_tagged_alloc() and cmd_tagged_free() using the
628273153fe5SWebb Scales  * block request tag as an index into a table of entries.  cmd_tagged_free() is
628373153fe5SWebb Scales  * the complement, although cmd_free() may be called instead.
628473153fe5SWebb Scales  */
628573153fe5SWebb Scales static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h,
628673153fe5SWebb Scales 					    struct scsi_cmnd *scmd)
628773153fe5SWebb Scales {
628873153fe5SWebb Scales 	int idx = hpsa_get_cmd_index(scmd);
628973153fe5SWebb Scales 	struct CommandList *c = h->cmd_pool + idx;
629073153fe5SWebb Scales 
629173153fe5SWebb Scales 	if (idx < HPSA_NRESERVED_CMDS || idx >= h->nr_cmds) {
629273153fe5SWebb Scales 		dev_err(&h->pdev->dev, "Bad block tag: %d not in [%d..%d]\n",
629373153fe5SWebb Scales 			idx, HPSA_NRESERVED_CMDS, h->nr_cmds - 1);
629473153fe5SWebb Scales 		/* The index value comes from the block layer, so if it's out of
629573153fe5SWebb Scales 		 * bounds, it's probably not our bug.
629673153fe5SWebb Scales 		 */
629773153fe5SWebb Scales 		BUG();
629873153fe5SWebb Scales 	}
629973153fe5SWebb Scales 
630073153fe5SWebb Scales 	atomic_inc(&c->refcount);
630173153fe5SWebb Scales 	if (unlikely(!hpsa_is_cmd_idle(c))) {
630273153fe5SWebb Scales 		/*
630373153fe5SWebb Scales 		 * We expect that the SCSI layer will hand us a unique tag
630473153fe5SWebb Scales 		 * value.  Thus, there should never be a collision here between
630573153fe5SWebb Scales 		 * two requests...because if the selected command isn't idle
630673153fe5SWebb Scales 		 * then someone is going to be very disappointed.
630773153fe5SWebb Scales 		 */
630873153fe5SWebb Scales 		dev_err(&h->pdev->dev,
630973153fe5SWebb Scales 			"tag collision (tag=%d) in cmd_tagged_alloc().\n",
631073153fe5SWebb Scales 			idx);
631173153fe5SWebb Scales 		if (c->scsi_cmd != NULL)
631273153fe5SWebb Scales 			scsi_print_command(c->scsi_cmd);
631373153fe5SWebb Scales 		scsi_print_command(scmd);
631473153fe5SWebb Scales 	}
631573153fe5SWebb Scales 
631673153fe5SWebb Scales 	hpsa_cmd_partial_init(h, idx, c);
631773153fe5SWebb Scales 	return c;
631873153fe5SWebb Scales }
631973153fe5SWebb Scales 
632073153fe5SWebb Scales static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c)
632173153fe5SWebb Scales {
632273153fe5SWebb Scales 	/*
632373153fe5SWebb Scales 	 * Release our reference to the block.  We don't need to do anything
632473153fe5SWebb Scales 	 * else to free it, because it is accessed by index.  (There's no point
632573153fe5SWebb Scales 	 * in checking the result of the decrement, since we cannot guarantee
632673153fe5SWebb Scales 	 * that there isn't a concurrent abort which is also accessing it.)
632773153fe5SWebb Scales 	 */
632873153fe5SWebb Scales 	(void)atomic_dec(&c->refcount);
632973153fe5SWebb Scales }
633073153fe5SWebb Scales 
633173153fe5SWebb Scales /*
6332edd16368SStephen M. Cameron  * For operations that cannot sleep, a command block is allocated at init,
6333edd16368SStephen M. Cameron  * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
6334edd16368SStephen M. Cameron  * which ones are free or in use.  Lock must be held when calling this.
6335edd16368SStephen M. Cameron  * cmd_free() is the complement.
6336bf43caf3SRobert Elliott  * This function never gives up and returns NULL.  If it hangs,
6337bf43caf3SRobert Elliott  * another thread must call cmd_free() to free some tags.
6338edd16368SStephen M. Cameron  */
6339281a7fd0SWebb Scales 
6340edd16368SStephen M. Cameron static struct CommandList *cmd_alloc(struct ctlr_info *h)
6341edd16368SStephen M. Cameron {
6342edd16368SStephen M. Cameron 	struct CommandList *c;
6343360c73bdSStephen Cameron 	int refcount, i;
634473153fe5SWebb Scales 	int offset = 0;
6345edd16368SStephen M. Cameron 
634633811026SRobert Elliott 	/*
634733811026SRobert Elliott 	 * There is some *extremely* small but non-zero chance that that
63484c413128SStephen M. Cameron 	 * multiple threads could get in here, and one thread could
63494c413128SStephen M. Cameron 	 * be scanning through the list of bits looking for a free
63504c413128SStephen M. Cameron 	 * one, but the free ones are always behind him, and other
63514c413128SStephen M. Cameron 	 * threads sneak in behind him and eat them before he can
63524c413128SStephen M. Cameron 	 * get to them, so that while there is always a free one, a
63534c413128SStephen M. Cameron 	 * very unlucky thread might be starved anyway, never able to
63544c413128SStephen M. Cameron 	 * beat the other threads.  In reality, this happens so
63554c413128SStephen M. Cameron 	 * infrequently as to be indistinguishable from never.
635673153fe5SWebb Scales 	 *
635773153fe5SWebb Scales 	 * Note that we start allocating commands before the SCSI host structure
635873153fe5SWebb Scales 	 * is initialized.  Since the search starts at bit zero, this
635973153fe5SWebb Scales 	 * all works, since we have at least one command structure available;
636073153fe5SWebb Scales 	 * however, it means that the structures with the low indexes have to be
636173153fe5SWebb Scales 	 * reserved for driver-initiated requests, while requests from the block
636273153fe5SWebb Scales 	 * layer will use the higher indexes.
63634c413128SStephen M. Cameron 	 */
63644c413128SStephen M. Cameron 
6365281a7fd0SWebb Scales 	for (;;) {
636673153fe5SWebb Scales 		i = find_next_zero_bit(h->cmd_pool_bits,
636773153fe5SWebb Scales 					HPSA_NRESERVED_CMDS,
636873153fe5SWebb Scales 					offset);
636973153fe5SWebb Scales 		if (unlikely(i >= HPSA_NRESERVED_CMDS)) {
6370281a7fd0SWebb Scales 			offset = 0;
6371281a7fd0SWebb Scales 			continue;
6372281a7fd0SWebb Scales 		}
6373edd16368SStephen M. Cameron 		c = h->cmd_pool + i;
6374281a7fd0SWebb Scales 		refcount = atomic_inc_return(&c->refcount);
6375281a7fd0SWebb Scales 		if (unlikely(refcount > 1)) {
6376281a7fd0SWebb Scales 			cmd_free(h, c); /* already in use */
637773153fe5SWebb Scales 			offset = (i + 1) % HPSA_NRESERVED_CMDS;
6378281a7fd0SWebb Scales 			continue;
6379281a7fd0SWebb Scales 		}
6380281a7fd0SWebb Scales 		set_bit(i & (BITS_PER_LONG - 1),
6381281a7fd0SWebb Scales 			h->cmd_pool_bits + (i / BITS_PER_LONG));
6382281a7fd0SWebb Scales 		break; /* it's ours now. */
6383281a7fd0SWebb Scales 	}
6384360c73bdSStephen Cameron 	hpsa_cmd_partial_init(h, i, c);
6385edd16368SStephen M. Cameron 	return c;
6386edd16368SStephen M. Cameron }
6387edd16368SStephen M. Cameron 
638873153fe5SWebb Scales /*
638973153fe5SWebb Scales  * This is the complementary operation to cmd_alloc().  Note, however, in some
639073153fe5SWebb Scales  * corner cases it may also be used to free blocks allocated by
639173153fe5SWebb Scales  * cmd_tagged_alloc() in which case the ref-count decrement does the trick and
639273153fe5SWebb Scales  * the clear-bit is harmless.
639373153fe5SWebb Scales  */
6394edd16368SStephen M. Cameron static void cmd_free(struct ctlr_info *h, struct CommandList *c)
6395edd16368SStephen M. Cameron {
6396281a7fd0SWebb Scales 	if (atomic_dec_and_test(&c->refcount)) {
6397edd16368SStephen M. Cameron 		int i;
6398edd16368SStephen M. Cameron 
6399edd16368SStephen M. Cameron 		i = c - h->cmd_pool;
6400edd16368SStephen M. Cameron 		clear_bit(i & (BITS_PER_LONG - 1),
6401edd16368SStephen M. Cameron 			  h->cmd_pool_bits + (i / BITS_PER_LONG));
6402edd16368SStephen M. Cameron 	}
6403281a7fd0SWebb Scales }
6404edd16368SStephen M. Cameron 
6405edd16368SStephen M. Cameron #ifdef CONFIG_COMPAT
6406edd16368SStephen M. Cameron 
640742a91641SDon Brace static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd,
640842a91641SDon Brace 	void __user *arg)
6409edd16368SStephen M. Cameron {
6410edd16368SStephen M. Cameron 	IOCTL32_Command_struct __user *arg32 =
6411edd16368SStephen M. Cameron 	    (IOCTL32_Command_struct __user *) arg;
6412edd16368SStephen M. Cameron 	IOCTL_Command_struct arg64;
6413edd16368SStephen M. Cameron 	IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
6414edd16368SStephen M. Cameron 	int err;
6415edd16368SStephen M. Cameron 	u32 cp;
6416edd16368SStephen M. Cameron 
6417938abd84SVasiliy Kulikov 	memset(&arg64, 0, sizeof(arg64));
6418edd16368SStephen M. Cameron 	err = 0;
6419edd16368SStephen M. Cameron 	err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
6420edd16368SStephen M. Cameron 			   sizeof(arg64.LUN_info));
6421edd16368SStephen M. Cameron 	err |= copy_from_user(&arg64.Request, &arg32->Request,
6422edd16368SStephen M. Cameron 			   sizeof(arg64.Request));
6423edd16368SStephen M. Cameron 	err |= copy_from_user(&arg64.error_info, &arg32->error_info,
6424edd16368SStephen M. Cameron 			   sizeof(arg64.error_info));
6425edd16368SStephen M. Cameron 	err |= get_user(arg64.buf_size, &arg32->buf_size);
6426edd16368SStephen M. Cameron 	err |= get_user(cp, &arg32->buf);
6427edd16368SStephen M. Cameron 	arg64.buf = compat_ptr(cp);
6428edd16368SStephen M. Cameron 	err |= copy_to_user(p, &arg64, sizeof(arg64));
6429edd16368SStephen M. Cameron 
6430edd16368SStephen M. Cameron 	if (err)
6431edd16368SStephen M. Cameron 		return -EFAULT;
6432edd16368SStephen M. Cameron 
643342a91641SDon Brace 	err = hpsa_ioctl(dev, CCISS_PASSTHRU, p);
6434edd16368SStephen M. Cameron 	if (err)
6435edd16368SStephen M. Cameron 		return err;
6436edd16368SStephen M. Cameron 	err |= copy_in_user(&arg32->error_info, &p->error_info,
6437edd16368SStephen M. Cameron 			 sizeof(arg32->error_info));
6438edd16368SStephen M. Cameron 	if (err)
6439edd16368SStephen M. Cameron 		return -EFAULT;
6440edd16368SStephen M. Cameron 	return err;
6441edd16368SStephen M. Cameron }
6442edd16368SStephen M. Cameron 
6443edd16368SStephen M. Cameron static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
644442a91641SDon Brace 	int cmd, void __user *arg)
6445edd16368SStephen M. Cameron {
6446edd16368SStephen M. Cameron 	BIG_IOCTL32_Command_struct __user *arg32 =
6447edd16368SStephen M. Cameron 	    (BIG_IOCTL32_Command_struct __user *) arg;
6448edd16368SStephen M. Cameron 	BIG_IOCTL_Command_struct arg64;
6449edd16368SStephen M. Cameron 	BIG_IOCTL_Command_struct __user *p =
6450edd16368SStephen M. Cameron 	    compat_alloc_user_space(sizeof(arg64));
6451edd16368SStephen M. Cameron 	int err;
6452edd16368SStephen M. Cameron 	u32 cp;
6453edd16368SStephen M. Cameron 
6454938abd84SVasiliy Kulikov 	memset(&arg64, 0, sizeof(arg64));
6455edd16368SStephen M. Cameron 	err = 0;
6456edd16368SStephen M. Cameron 	err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
6457edd16368SStephen M. Cameron 			   sizeof(arg64.LUN_info));
6458edd16368SStephen M. Cameron 	err |= copy_from_user(&arg64.Request, &arg32->Request,
6459edd16368SStephen M. Cameron 			   sizeof(arg64.Request));
6460edd16368SStephen M. Cameron 	err |= copy_from_user(&arg64.error_info, &arg32->error_info,
6461edd16368SStephen M. Cameron 			   sizeof(arg64.error_info));
6462edd16368SStephen M. Cameron 	err |= get_user(arg64.buf_size, &arg32->buf_size);
6463edd16368SStephen M. Cameron 	err |= get_user(arg64.malloc_size, &arg32->malloc_size);
6464edd16368SStephen M. Cameron 	err |= get_user(cp, &arg32->buf);
6465edd16368SStephen M. Cameron 	arg64.buf = compat_ptr(cp);
6466edd16368SStephen M. Cameron 	err |= copy_to_user(p, &arg64, sizeof(arg64));
6467edd16368SStephen M. Cameron 
6468edd16368SStephen M. Cameron 	if (err)
6469edd16368SStephen M. Cameron 		return -EFAULT;
6470edd16368SStephen M. Cameron 
647142a91641SDon Brace 	err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, p);
6472edd16368SStephen M. Cameron 	if (err)
6473edd16368SStephen M. Cameron 		return err;
6474edd16368SStephen M. Cameron 	err |= copy_in_user(&arg32->error_info, &p->error_info,
6475edd16368SStephen M. Cameron 			 sizeof(arg32->error_info));
6476edd16368SStephen M. Cameron 	if (err)
6477edd16368SStephen M. Cameron 		return -EFAULT;
6478edd16368SStephen M. Cameron 	return err;
6479edd16368SStephen M. Cameron }
648071fe75a7SStephen M. Cameron 
648142a91641SDon Brace static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void __user *arg)
648271fe75a7SStephen M. Cameron {
648371fe75a7SStephen M. Cameron 	switch (cmd) {
648471fe75a7SStephen M. Cameron 	case CCISS_GETPCIINFO:
648571fe75a7SStephen M. Cameron 	case CCISS_GETINTINFO:
648671fe75a7SStephen M. Cameron 	case CCISS_SETINTINFO:
648771fe75a7SStephen M. Cameron 	case CCISS_GETNODENAME:
648871fe75a7SStephen M. Cameron 	case CCISS_SETNODENAME:
648971fe75a7SStephen M. Cameron 	case CCISS_GETHEARTBEAT:
649071fe75a7SStephen M. Cameron 	case CCISS_GETBUSTYPES:
649171fe75a7SStephen M. Cameron 	case CCISS_GETFIRMVER:
649271fe75a7SStephen M. Cameron 	case CCISS_GETDRIVVER:
649371fe75a7SStephen M. Cameron 	case CCISS_REVALIDVOLS:
649471fe75a7SStephen M. Cameron 	case CCISS_DEREGDISK:
649571fe75a7SStephen M. Cameron 	case CCISS_REGNEWDISK:
649671fe75a7SStephen M. Cameron 	case CCISS_REGNEWD:
649771fe75a7SStephen M. Cameron 	case CCISS_RESCANDISK:
649871fe75a7SStephen M. Cameron 	case CCISS_GETLUNINFO:
649971fe75a7SStephen M. Cameron 		return hpsa_ioctl(dev, cmd, arg);
650071fe75a7SStephen M. Cameron 
650171fe75a7SStephen M. Cameron 	case CCISS_PASSTHRU32:
650271fe75a7SStephen M. Cameron 		return hpsa_ioctl32_passthru(dev, cmd, arg);
650371fe75a7SStephen M. Cameron 	case CCISS_BIG_PASSTHRU32:
650471fe75a7SStephen M. Cameron 		return hpsa_ioctl32_big_passthru(dev, cmd, arg);
650571fe75a7SStephen M. Cameron 
650671fe75a7SStephen M. Cameron 	default:
650771fe75a7SStephen M. Cameron 		return -ENOIOCTLCMD;
650871fe75a7SStephen M. Cameron 	}
650971fe75a7SStephen M. Cameron }
6510edd16368SStephen M. Cameron #endif
6511edd16368SStephen M. Cameron 
6512edd16368SStephen M. Cameron static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
6513edd16368SStephen M. Cameron {
6514edd16368SStephen M. Cameron 	struct hpsa_pci_info pciinfo;
6515edd16368SStephen M. Cameron 
6516edd16368SStephen M. Cameron 	if (!argp)
6517edd16368SStephen M. Cameron 		return -EINVAL;
6518edd16368SStephen M. Cameron 	pciinfo.domain = pci_domain_nr(h->pdev->bus);
6519edd16368SStephen M. Cameron 	pciinfo.bus = h->pdev->bus->number;
6520edd16368SStephen M. Cameron 	pciinfo.dev_fn = h->pdev->devfn;
6521edd16368SStephen M. Cameron 	pciinfo.board_id = h->board_id;
6522edd16368SStephen M. Cameron 	if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
6523edd16368SStephen M. Cameron 		return -EFAULT;
6524edd16368SStephen M. Cameron 	return 0;
6525edd16368SStephen M. Cameron }
6526edd16368SStephen M. Cameron 
6527edd16368SStephen M. Cameron static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
6528edd16368SStephen M. Cameron {
6529edd16368SStephen M. Cameron 	DriverVer_type DriverVer;
6530edd16368SStephen M. Cameron 	unsigned char vmaj, vmin, vsubmin;
6531edd16368SStephen M. Cameron 	int rc;
6532edd16368SStephen M. Cameron 
6533edd16368SStephen M. Cameron 	rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
6534edd16368SStephen M. Cameron 		&vmaj, &vmin, &vsubmin);
6535edd16368SStephen M. Cameron 	if (rc != 3) {
6536edd16368SStephen M. Cameron 		dev_info(&h->pdev->dev, "driver version string '%s' "
6537edd16368SStephen M. Cameron 			"unrecognized.", HPSA_DRIVER_VERSION);
6538edd16368SStephen M. Cameron 		vmaj = 0;
6539edd16368SStephen M. Cameron 		vmin = 0;
6540edd16368SStephen M. Cameron 		vsubmin = 0;
6541edd16368SStephen M. Cameron 	}
6542edd16368SStephen M. Cameron 	DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
6543edd16368SStephen M. Cameron 	if (!argp)
6544edd16368SStephen M. Cameron 		return -EINVAL;
6545edd16368SStephen M. Cameron 	if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
6546edd16368SStephen M. Cameron 		return -EFAULT;
6547edd16368SStephen M. Cameron 	return 0;
6548edd16368SStephen M. Cameron }
6549edd16368SStephen M. Cameron 
6550edd16368SStephen M. Cameron static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
6551edd16368SStephen M. Cameron {
6552edd16368SStephen M. Cameron 	IOCTL_Command_struct iocommand;
6553edd16368SStephen M. Cameron 	struct CommandList *c;
6554edd16368SStephen M. Cameron 	char *buff = NULL;
655550a0decfSStephen M. Cameron 	u64 temp64;
6556c1f63c8fSStephen M. Cameron 	int rc = 0;
6557edd16368SStephen M. Cameron 
6558edd16368SStephen M. Cameron 	if (!argp)
6559edd16368SStephen M. Cameron 		return -EINVAL;
6560edd16368SStephen M. Cameron 	if (!capable(CAP_SYS_RAWIO))
6561edd16368SStephen M. Cameron 		return -EPERM;
6562edd16368SStephen M. Cameron 	if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
6563edd16368SStephen M. Cameron 		return -EFAULT;
6564edd16368SStephen M. Cameron 	if ((iocommand.buf_size < 1) &&
6565edd16368SStephen M. Cameron 	    (iocommand.Request.Type.Direction != XFER_NONE)) {
6566edd16368SStephen M. Cameron 		return -EINVAL;
6567edd16368SStephen M. Cameron 	}
6568edd16368SStephen M. Cameron 	if (iocommand.buf_size > 0) {
6569edd16368SStephen M. Cameron 		buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
6570edd16368SStephen M. Cameron 		if (buff == NULL)
65712dd02d74SRobert Elliott 			return -ENOMEM;
65729233fb10SStephen M. Cameron 		if (iocommand.Request.Type.Direction & XFER_WRITE) {
6573edd16368SStephen M. Cameron 			/* Copy the data into the buffer we created */
6574b03a7771SStephen M. Cameron 			if (copy_from_user(buff, iocommand.buf,
6575b03a7771SStephen M. Cameron 				iocommand.buf_size)) {
6576c1f63c8fSStephen M. Cameron 				rc = -EFAULT;
6577c1f63c8fSStephen M. Cameron 				goto out_kfree;
6578edd16368SStephen M. Cameron 			}
6579b03a7771SStephen M. Cameron 		} else {
6580edd16368SStephen M. Cameron 			memset(buff, 0, iocommand.buf_size);
6581b03a7771SStephen M. Cameron 		}
6582b03a7771SStephen M. Cameron 	}
658345fcb86eSStephen Cameron 	c = cmd_alloc(h);
6584bf43caf3SRobert Elliott 
6585edd16368SStephen M. Cameron 	/* Fill in the command type */
6586edd16368SStephen M. Cameron 	c->cmd_type = CMD_IOCTL_PEND;
6587a58e7e53SWebb Scales 	c->scsi_cmd = SCSI_CMD_BUSY;
6588edd16368SStephen M. Cameron 	/* Fill in Command Header */
6589edd16368SStephen M. Cameron 	c->Header.ReplyQueue = 0; /* unused in simple mode */
6590edd16368SStephen M. Cameron 	if (iocommand.buf_size > 0) {	/* buffer to fill */
6591edd16368SStephen M. Cameron 		c->Header.SGList = 1;
659250a0decfSStephen M. Cameron 		c->Header.SGTotal = cpu_to_le16(1);
6593edd16368SStephen M. Cameron 	} else	{ /* no buffers to fill */
6594edd16368SStephen M. Cameron 		c->Header.SGList = 0;
659550a0decfSStephen M. Cameron 		c->Header.SGTotal = cpu_to_le16(0);
6596edd16368SStephen M. Cameron 	}
6597edd16368SStephen M. Cameron 	memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
6598edd16368SStephen M. Cameron 
6599edd16368SStephen M. Cameron 	/* Fill in Request block */
6600edd16368SStephen M. Cameron 	memcpy(&c->Request, &iocommand.Request,
6601edd16368SStephen M. Cameron 		sizeof(c->Request));
6602edd16368SStephen M. Cameron 
6603edd16368SStephen M. Cameron 	/* Fill in the scatter gather information */
6604edd16368SStephen M. Cameron 	if (iocommand.buf_size > 0) {
660550a0decfSStephen M. Cameron 		temp64 = pci_map_single(h->pdev, buff,
6606edd16368SStephen M. Cameron 			iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
660750a0decfSStephen M. Cameron 		if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) {
660850a0decfSStephen M. Cameron 			c->SG[0].Addr = cpu_to_le64(0);
660950a0decfSStephen M. Cameron 			c->SG[0].Len = cpu_to_le32(0);
6610bcc48ffaSStephen M. Cameron 			rc = -ENOMEM;
6611bcc48ffaSStephen M. Cameron 			goto out;
6612bcc48ffaSStephen M. Cameron 		}
661350a0decfSStephen M. Cameron 		c->SG[0].Addr = cpu_to_le64(temp64);
661450a0decfSStephen M. Cameron 		c->SG[0].Len = cpu_to_le32(iocommand.buf_size);
661550a0decfSStephen M. Cameron 		c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */
6616edd16368SStephen M. Cameron 	}
6617c448ecfaSDon Brace 	rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
66183fb134cbSDon Brace 					NO_TIMEOUT);
6619c2dd32e0SStephen M. Cameron 	if (iocommand.buf_size > 0)
6620edd16368SStephen M. Cameron 		hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
6621edd16368SStephen M. Cameron 	check_ioctl_unit_attention(h, c);
662225163bd5SWebb Scales 	if (rc) {
662325163bd5SWebb Scales 		rc = -EIO;
662425163bd5SWebb Scales 		goto out;
662525163bd5SWebb Scales 	}
6626edd16368SStephen M. Cameron 
6627edd16368SStephen M. Cameron 	/* Copy the error information out */
6628edd16368SStephen M. Cameron 	memcpy(&iocommand.error_info, c->err_info,
6629edd16368SStephen M. Cameron 		sizeof(iocommand.error_info));
6630edd16368SStephen M. Cameron 	if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
6631c1f63c8fSStephen M. Cameron 		rc = -EFAULT;
6632c1f63c8fSStephen M. Cameron 		goto out;
6633edd16368SStephen M. Cameron 	}
66349233fb10SStephen M. Cameron 	if ((iocommand.Request.Type.Direction & XFER_READ) &&
6635b03a7771SStephen M. Cameron 		iocommand.buf_size > 0) {
6636edd16368SStephen M. Cameron 		/* Copy the data out of the buffer we created */
6637edd16368SStephen M. Cameron 		if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
6638c1f63c8fSStephen M. Cameron 			rc = -EFAULT;
6639c1f63c8fSStephen M. Cameron 			goto out;
6640edd16368SStephen M. Cameron 		}
6641edd16368SStephen M. Cameron 	}
6642c1f63c8fSStephen M. Cameron out:
664345fcb86eSStephen Cameron 	cmd_free(h, c);
6644c1f63c8fSStephen M. Cameron out_kfree:
6645c1f63c8fSStephen M. Cameron 	kfree(buff);
6646c1f63c8fSStephen M. Cameron 	return rc;
6647edd16368SStephen M. Cameron }
6648edd16368SStephen M. Cameron 
6649edd16368SStephen M. Cameron static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
6650edd16368SStephen M. Cameron {
6651edd16368SStephen M. Cameron 	BIG_IOCTL_Command_struct *ioc;
6652edd16368SStephen M. Cameron 	struct CommandList *c;
6653edd16368SStephen M. Cameron 	unsigned char **buff = NULL;
6654edd16368SStephen M. Cameron 	int *buff_size = NULL;
665550a0decfSStephen M. Cameron 	u64 temp64;
6656edd16368SStephen M. Cameron 	BYTE sg_used = 0;
6657edd16368SStephen M. Cameron 	int status = 0;
665801a02ffcSStephen M. Cameron 	u32 left;
665901a02ffcSStephen M. Cameron 	u32 sz;
6660edd16368SStephen M. Cameron 	BYTE __user *data_ptr;
6661edd16368SStephen M. Cameron 
6662edd16368SStephen M. Cameron 	if (!argp)
6663edd16368SStephen M. Cameron 		return -EINVAL;
6664edd16368SStephen M. Cameron 	if (!capable(CAP_SYS_RAWIO))
6665edd16368SStephen M. Cameron 		return -EPERM;
6666edd16368SStephen M. Cameron 	ioc = (BIG_IOCTL_Command_struct *)
6667edd16368SStephen M. Cameron 	    kmalloc(sizeof(*ioc), GFP_KERNEL);
6668edd16368SStephen M. Cameron 	if (!ioc) {
6669edd16368SStephen M. Cameron 		status = -ENOMEM;
6670edd16368SStephen M. Cameron 		goto cleanup1;
6671edd16368SStephen M. Cameron 	}
6672edd16368SStephen M. Cameron 	if (copy_from_user(ioc, argp, sizeof(*ioc))) {
6673edd16368SStephen M. Cameron 		status = -EFAULT;
6674edd16368SStephen M. Cameron 		goto cleanup1;
6675edd16368SStephen M. Cameron 	}
6676edd16368SStephen M. Cameron 	if ((ioc->buf_size < 1) &&
6677edd16368SStephen M. Cameron 	    (ioc->Request.Type.Direction != XFER_NONE)) {
6678edd16368SStephen M. Cameron 		status = -EINVAL;
6679edd16368SStephen M. Cameron 		goto cleanup1;
6680edd16368SStephen M. Cameron 	}
6681edd16368SStephen M. Cameron 	/* Check kmalloc limits  using all SGs */
6682edd16368SStephen M. Cameron 	if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
6683edd16368SStephen M. Cameron 		status = -EINVAL;
6684edd16368SStephen M. Cameron 		goto cleanup1;
6685edd16368SStephen M. Cameron 	}
6686d66ae08bSStephen M. Cameron 	if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) {
6687edd16368SStephen M. Cameron 		status = -EINVAL;
6688edd16368SStephen M. Cameron 		goto cleanup1;
6689edd16368SStephen M. Cameron 	}
6690d66ae08bSStephen M. Cameron 	buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL);
6691edd16368SStephen M. Cameron 	if (!buff) {
6692edd16368SStephen M. Cameron 		status = -ENOMEM;
6693edd16368SStephen M. Cameron 		goto cleanup1;
6694edd16368SStephen M. Cameron 	}
6695d66ae08bSStephen M. Cameron 	buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL);
6696edd16368SStephen M. Cameron 	if (!buff_size) {
6697edd16368SStephen M. Cameron 		status = -ENOMEM;
6698edd16368SStephen M. Cameron 		goto cleanup1;
6699edd16368SStephen M. Cameron 	}
6700edd16368SStephen M. Cameron 	left = ioc->buf_size;
6701edd16368SStephen M. Cameron 	data_ptr = ioc->buf;
6702edd16368SStephen M. Cameron 	while (left) {
6703edd16368SStephen M. Cameron 		sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
6704edd16368SStephen M. Cameron 		buff_size[sg_used] = sz;
6705edd16368SStephen M. Cameron 		buff[sg_used] = kmalloc(sz, GFP_KERNEL);
6706edd16368SStephen M. Cameron 		if (buff[sg_used] == NULL) {
6707edd16368SStephen M. Cameron 			status = -ENOMEM;
6708edd16368SStephen M. Cameron 			goto cleanup1;
6709edd16368SStephen M. Cameron 		}
67109233fb10SStephen M. Cameron 		if (ioc->Request.Type.Direction & XFER_WRITE) {
6711edd16368SStephen M. Cameron 			if (copy_from_user(buff[sg_used], data_ptr, sz)) {
67120758f4f7SStephen M. Cameron 				status = -EFAULT;
6713edd16368SStephen M. Cameron 				goto cleanup1;
6714edd16368SStephen M. Cameron 			}
6715edd16368SStephen M. Cameron 		} else
6716edd16368SStephen M. Cameron 			memset(buff[sg_used], 0, sz);
6717edd16368SStephen M. Cameron 		left -= sz;
6718edd16368SStephen M. Cameron 		data_ptr += sz;
6719edd16368SStephen M. Cameron 		sg_used++;
6720edd16368SStephen M. Cameron 	}
672145fcb86eSStephen Cameron 	c = cmd_alloc(h);
6722bf43caf3SRobert Elliott 
6723edd16368SStephen M. Cameron 	c->cmd_type = CMD_IOCTL_PEND;
6724a58e7e53SWebb Scales 	c->scsi_cmd = SCSI_CMD_BUSY;
6725edd16368SStephen M. Cameron 	c->Header.ReplyQueue = 0;
672650a0decfSStephen M. Cameron 	c->Header.SGList = (u8) sg_used;
672750a0decfSStephen M. Cameron 	c->Header.SGTotal = cpu_to_le16(sg_used);
6728edd16368SStephen M. Cameron 	memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
6729edd16368SStephen M. Cameron 	memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
6730edd16368SStephen M. Cameron 	if (ioc->buf_size > 0) {
6731edd16368SStephen M. Cameron 		int i;
6732edd16368SStephen M. Cameron 		for (i = 0; i < sg_used; i++) {
673350a0decfSStephen M. Cameron 			temp64 = pci_map_single(h->pdev, buff[i],
6734edd16368SStephen M. Cameron 				    buff_size[i], PCI_DMA_BIDIRECTIONAL);
673550a0decfSStephen M. Cameron 			if (dma_mapping_error(&h->pdev->dev,
673650a0decfSStephen M. Cameron 							(dma_addr_t) temp64)) {
673750a0decfSStephen M. Cameron 				c->SG[i].Addr = cpu_to_le64(0);
673850a0decfSStephen M. Cameron 				c->SG[i].Len = cpu_to_le32(0);
6739bcc48ffaSStephen M. Cameron 				hpsa_pci_unmap(h->pdev, c, i,
6740bcc48ffaSStephen M. Cameron 					PCI_DMA_BIDIRECTIONAL);
6741bcc48ffaSStephen M. Cameron 				status = -ENOMEM;
6742e2d4a1f6SStephen M. Cameron 				goto cleanup0;
6743bcc48ffaSStephen M. Cameron 			}
674450a0decfSStephen M. Cameron 			c->SG[i].Addr = cpu_to_le64(temp64);
674550a0decfSStephen M. Cameron 			c->SG[i].Len = cpu_to_le32(buff_size[i]);
674650a0decfSStephen M. Cameron 			c->SG[i].Ext = cpu_to_le32(0);
6747edd16368SStephen M. Cameron 		}
674850a0decfSStephen M. Cameron 		c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST);
6749edd16368SStephen M. Cameron 	}
6750c448ecfaSDon Brace 	status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
67513fb134cbSDon Brace 						NO_TIMEOUT);
6752b03a7771SStephen M. Cameron 	if (sg_used)
6753edd16368SStephen M. Cameron 		hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
6754edd16368SStephen M. Cameron 	check_ioctl_unit_attention(h, c);
675525163bd5SWebb Scales 	if (status) {
675625163bd5SWebb Scales 		status = -EIO;
675725163bd5SWebb Scales 		goto cleanup0;
675825163bd5SWebb Scales 	}
675925163bd5SWebb Scales 
6760edd16368SStephen M. Cameron 	/* Copy the error information out */
6761edd16368SStephen M. Cameron 	memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
6762edd16368SStephen M. Cameron 	if (copy_to_user(argp, ioc, sizeof(*ioc))) {
6763edd16368SStephen M. Cameron 		status = -EFAULT;
6764e2d4a1f6SStephen M. Cameron 		goto cleanup0;
6765edd16368SStephen M. Cameron 	}
67669233fb10SStephen M. Cameron 	if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) {
67672b08b3e9SDon Brace 		int i;
67682b08b3e9SDon Brace 
6769edd16368SStephen M. Cameron 		/* Copy the data out of the buffer we created */
6770edd16368SStephen M. Cameron 		BYTE __user *ptr = ioc->buf;
6771edd16368SStephen M. Cameron 		for (i = 0; i < sg_used; i++) {
6772edd16368SStephen M. Cameron 			if (copy_to_user(ptr, buff[i], buff_size[i])) {
6773edd16368SStephen M. Cameron 				status = -EFAULT;
6774e2d4a1f6SStephen M. Cameron 				goto cleanup0;
6775edd16368SStephen M. Cameron 			}
6776edd16368SStephen M. Cameron 			ptr += buff_size[i];
6777edd16368SStephen M. Cameron 		}
6778edd16368SStephen M. Cameron 	}
6779edd16368SStephen M. Cameron 	status = 0;
6780e2d4a1f6SStephen M. Cameron cleanup0:
678145fcb86eSStephen Cameron 	cmd_free(h, c);
6782edd16368SStephen M. Cameron cleanup1:
6783edd16368SStephen M. Cameron 	if (buff) {
67842b08b3e9SDon Brace 		int i;
67852b08b3e9SDon Brace 
6786edd16368SStephen M. Cameron 		for (i = 0; i < sg_used; i++)
6787edd16368SStephen M. Cameron 			kfree(buff[i]);
6788edd16368SStephen M. Cameron 		kfree(buff);
6789edd16368SStephen M. Cameron 	}
6790edd16368SStephen M. Cameron 	kfree(buff_size);
6791edd16368SStephen M. Cameron 	kfree(ioc);
6792edd16368SStephen M. Cameron 	return status;
6793edd16368SStephen M. Cameron }
6794edd16368SStephen M. Cameron 
6795edd16368SStephen M. Cameron static void check_ioctl_unit_attention(struct ctlr_info *h,
6796edd16368SStephen M. Cameron 	struct CommandList *c)
6797edd16368SStephen M. Cameron {
6798edd16368SStephen M. Cameron 	if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
6799edd16368SStephen M. Cameron 			c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
6800edd16368SStephen M. Cameron 		(void) check_for_unit_attention(h, c);
6801edd16368SStephen M. Cameron }
68020390f0c0SStephen M. Cameron 
6803edd16368SStephen M. Cameron /*
6804edd16368SStephen M. Cameron  * ioctl
6805edd16368SStephen M. Cameron  */
680642a91641SDon Brace static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg)
6807edd16368SStephen M. Cameron {
6808edd16368SStephen M. Cameron 	struct ctlr_info *h;
6809edd16368SStephen M. Cameron 	void __user *argp = (void __user *)arg;
68100390f0c0SStephen M. Cameron 	int rc;
6811edd16368SStephen M. Cameron 
6812edd16368SStephen M. Cameron 	h = sdev_to_hba(dev);
6813edd16368SStephen M. Cameron 
6814edd16368SStephen M. Cameron 	switch (cmd) {
6815edd16368SStephen M. Cameron 	case CCISS_DEREGDISK:
6816edd16368SStephen M. Cameron 	case CCISS_REGNEWDISK:
6817edd16368SStephen M. Cameron 	case CCISS_REGNEWD:
6818a08a8471SStephen M. Cameron 		hpsa_scan_start(h->scsi_host);
6819edd16368SStephen M. Cameron 		return 0;
6820edd16368SStephen M. Cameron 	case CCISS_GETPCIINFO:
6821edd16368SStephen M. Cameron 		return hpsa_getpciinfo_ioctl(h, argp);
6822edd16368SStephen M. Cameron 	case CCISS_GETDRIVVER:
6823edd16368SStephen M. Cameron 		return hpsa_getdrivver_ioctl(h, argp);
6824edd16368SStephen M. Cameron 	case CCISS_PASSTHRU:
682534f0c627SDon Brace 		if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
68260390f0c0SStephen M. Cameron 			return -EAGAIN;
68270390f0c0SStephen M. Cameron 		rc = hpsa_passthru_ioctl(h, argp);
682834f0c627SDon Brace 		atomic_inc(&h->passthru_cmds_avail);
68290390f0c0SStephen M. Cameron 		return rc;
6830edd16368SStephen M. Cameron 	case CCISS_BIG_PASSTHRU:
683134f0c627SDon Brace 		if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
68320390f0c0SStephen M. Cameron 			return -EAGAIN;
68330390f0c0SStephen M. Cameron 		rc = hpsa_big_passthru_ioctl(h, argp);
683434f0c627SDon Brace 		atomic_inc(&h->passthru_cmds_avail);
68350390f0c0SStephen M. Cameron 		return rc;
6836edd16368SStephen M. Cameron 	default:
6837edd16368SStephen M. Cameron 		return -ENOTTY;
6838edd16368SStephen M. Cameron 	}
6839edd16368SStephen M. Cameron }
6840edd16368SStephen M. Cameron 
6841bf43caf3SRobert Elliott static void hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr,
68426f039790SGreg Kroah-Hartman 				u8 reset_type)
684364670ac8SStephen M. Cameron {
684464670ac8SStephen M. Cameron 	struct CommandList *c;
684564670ac8SStephen M. Cameron 
684664670ac8SStephen M. Cameron 	c = cmd_alloc(h);
6847bf43caf3SRobert Elliott 
6848a2dac136SStephen M. Cameron 	/* fill_cmd can't fail here, no data buffer to map */
6849a2dac136SStephen M. Cameron 	(void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
685064670ac8SStephen M. Cameron 		RAID_CTLR_LUNID, TYPE_MSG);
685164670ac8SStephen M. Cameron 	c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
685264670ac8SStephen M. Cameron 	c->waiting = NULL;
685364670ac8SStephen M. Cameron 	enqueue_cmd_and_start_io(h, c);
685464670ac8SStephen M. Cameron 	/* Don't wait for completion, the reset won't complete.  Don't free
685564670ac8SStephen M. Cameron 	 * the command either.  This is the last command we will send before
685664670ac8SStephen M. Cameron 	 * re-initializing everything, so it doesn't matter and won't leak.
685764670ac8SStephen M. Cameron 	 */
6858bf43caf3SRobert Elliott 	return;
685964670ac8SStephen M. Cameron }
686064670ac8SStephen M. Cameron 
6861a2dac136SStephen M. Cameron static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
6862b7bb24ebSStephen M. Cameron 	void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
6863edd16368SStephen M. Cameron 	int cmd_type)
6864edd16368SStephen M. Cameron {
6865edd16368SStephen M. Cameron 	int pci_dir = XFER_NONE;
68669b5c48c2SStephen Cameron 	u64 tag; /* for commands to be aborted */
6867edd16368SStephen M. Cameron 
6868edd16368SStephen M. Cameron 	c->cmd_type = CMD_IOCTL_PEND;
6869a58e7e53SWebb Scales 	c->scsi_cmd = SCSI_CMD_BUSY;
6870edd16368SStephen M. Cameron 	c->Header.ReplyQueue = 0;
6871edd16368SStephen M. Cameron 	if (buff != NULL && size > 0) {
6872edd16368SStephen M. Cameron 		c->Header.SGList = 1;
687350a0decfSStephen M. Cameron 		c->Header.SGTotal = cpu_to_le16(1);
6874edd16368SStephen M. Cameron 	} else {
6875edd16368SStephen M. Cameron 		c->Header.SGList = 0;
687650a0decfSStephen M. Cameron 		c->Header.SGTotal = cpu_to_le16(0);
6877edd16368SStephen M. Cameron 	}
6878edd16368SStephen M. Cameron 	memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
6879edd16368SStephen M. Cameron 
6880edd16368SStephen M. Cameron 	if (cmd_type == TYPE_CMD) {
6881edd16368SStephen M. Cameron 		switch (cmd) {
6882edd16368SStephen M. Cameron 		case HPSA_INQUIRY:
6883edd16368SStephen M. Cameron 			/* are we trying to read a vital product page */
6884b7bb24ebSStephen M. Cameron 			if (page_code & VPD_PAGE) {
6885edd16368SStephen M. Cameron 				c->Request.CDB[1] = 0x01;
6886b7bb24ebSStephen M. Cameron 				c->Request.CDB[2] = (page_code & 0xff);
6887edd16368SStephen M. Cameron 			}
6888edd16368SStephen M. Cameron 			c->Request.CDBLen = 6;
6889a505b86fSStephen M. Cameron 			c->Request.type_attr_dir =
6890a505b86fSStephen M. Cameron 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6891edd16368SStephen M. Cameron 			c->Request.Timeout = 0;
6892edd16368SStephen M. Cameron 			c->Request.CDB[0] = HPSA_INQUIRY;
6893edd16368SStephen M. Cameron 			c->Request.CDB[4] = size & 0xFF;
6894edd16368SStephen M. Cameron 			break;
6895edd16368SStephen M. Cameron 		case HPSA_REPORT_LOG:
6896edd16368SStephen M. Cameron 		case HPSA_REPORT_PHYS:
6897edd16368SStephen M. Cameron 			/* Talking to controller so It's a physical command
6898edd16368SStephen M. Cameron 			   mode = 00 target = 0.  Nothing to write.
6899edd16368SStephen M. Cameron 			 */
6900edd16368SStephen M. Cameron 			c->Request.CDBLen = 12;
6901a505b86fSStephen M. Cameron 			c->Request.type_attr_dir =
6902a505b86fSStephen M. Cameron 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6903edd16368SStephen M. Cameron 			c->Request.Timeout = 0;
6904edd16368SStephen M. Cameron 			c->Request.CDB[0] = cmd;
6905edd16368SStephen M. Cameron 			c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
6906edd16368SStephen M. Cameron 			c->Request.CDB[7] = (size >> 16) & 0xFF;
6907edd16368SStephen M. Cameron 			c->Request.CDB[8] = (size >> 8) & 0xFF;
6908edd16368SStephen M. Cameron 			c->Request.CDB[9] = size & 0xFF;
6909edd16368SStephen M. Cameron 			break;
6910c2adae44SScott Teel 		case BMIC_SENSE_DIAG_OPTIONS:
6911c2adae44SScott Teel 			c->Request.CDBLen = 16;
6912c2adae44SScott Teel 			c->Request.type_attr_dir =
6913c2adae44SScott Teel 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6914c2adae44SScott Teel 			c->Request.Timeout = 0;
6915c2adae44SScott Teel 			/* Spec says this should be BMIC_WRITE */
6916c2adae44SScott Teel 			c->Request.CDB[0] = BMIC_READ;
6917c2adae44SScott Teel 			c->Request.CDB[6] = BMIC_SENSE_DIAG_OPTIONS;
6918c2adae44SScott Teel 			break;
6919c2adae44SScott Teel 		case BMIC_SET_DIAG_OPTIONS:
6920c2adae44SScott Teel 			c->Request.CDBLen = 16;
6921c2adae44SScott Teel 			c->Request.type_attr_dir =
6922c2adae44SScott Teel 					TYPE_ATTR_DIR(cmd_type,
6923c2adae44SScott Teel 						ATTR_SIMPLE, XFER_WRITE);
6924c2adae44SScott Teel 			c->Request.Timeout = 0;
6925c2adae44SScott Teel 			c->Request.CDB[0] = BMIC_WRITE;
6926c2adae44SScott Teel 			c->Request.CDB[6] = BMIC_SET_DIAG_OPTIONS;
6927c2adae44SScott Teel 			break;
6928edd16368SStephen M. Cameron 		case HPSA_CACHE_FLUSH:
6929edd16368SStephen M. Cameron 			c->Request.CDBLen = 12;
6930a505b86fSStephen M. Cameron 			c->Request.type_attr_dir =
6931a505b86fSStephen M. Cameron 					TYPE_ATTR_DIR(cmd_type,
6932a505b86fSStephen M. Cameron 						ATTR_SIMPLE, XFER_WRITE);
6933edd16368SStephen M. Cameron 			c->Request.Timeout = 0;
6934edd16368SStephen M. Cameron 			c->Request.CDB[0] = BMIC_WRITE;
6935edd16368SStephen M. Cameron 			c->Request.CDB[6] = BMIC_CACHE_FLUSH;
6936bb158eabSStephen M. Cameron 			c->Request.CDB[7] = (size >> 8) & 0xFF;
6937bb158eabSStephen M. Cameron 			c->Request.CDB[8] = size & 0xFF;
6938edd16368SStephen M. Cameron 			break;
6939edd16368SStephen M. Cameron 		case TEST_UNIT_READY:
6940edd16368SStephen M. Cameron 			c->Request.CDBLen = 6;
6941a505b86fSStephen M. Cameron 			c->Request.type_attr_dir =
6942a505b86fSStephen M. Cameron 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6943edd16368SStephen M. Cameron 			c->Request.Timeout = 0;
6944edd16368SStephen M. Cameron 			break;
6945283b4a9bSStephen M. Cameron 		case HPSA_GET_RAID_MAP:
6946283b4a9bSStephen M. Cameron 			c->Request.CDBLen = 12;
6947a505b86fSStephen M. Cameron 			c->Request.type_attr_dir =
6948a505b86fSStephen M. Cameron 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6949283b4a9bSStephen M. Cameron 			c->Request.Timeout = 0;
6950283b4a9bSStephen M. Cameron 			c->Request.CDB[0] = HPSA_CISS_READ;
6951283b4a9bSStephen M. Cameron 			c->Request.CDB[1] = cmd;
6952283b4a9bSStephen M. Cameron 			c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
6953283b4a9bSStephen M. Cameron 			c->Request.CDB[7] = (size >> 16) & 0xFF;
6954283b4a9bSStephen M. Cameron 			c->Request.CDB[8] = (size >> 8) & 0xFF;
6955283b4a9bSStephen M. Cameron 			c->Request.CDB[9] = size & 0xFF;
6956283b4a9bSStephen M. Cameron 			break;
6957316b221aSStephen M. Cameron 		case BMIC_SENSE_CONTROLLER_PARAMETERS:
6958316b221aSStephen M. Cameron 			c->Request.CDBLen = 10;
6959a505b86fSStephen M. Cameron 			c->Request.type_attr_dir =
6960a505b86fSStephen M. Cameron 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6961316b221aSStephen M. Cameron 			c->Request.Timeout = 0;
6962316b221aSStephen M. Cameron 			c->Request.CDB[0] = BMIC_READ;
6963316b221aSStephen M. Cameron 			c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS;
6964316b221aSStephen M. Cameron 			c->Request.CDB[7] = (size >> 16) & 0xFF;
6965316b221aSStephen M. Cameron 			c->Request.CDB[8] = (size >> 8) & 0xFF;
6966316b221aSStephen M. Cameron 			break;
696703383736SDon Brace 		case BMIC_IDENTIFY_PHYSICAL_DEVICE:
696803383736SDon Brace 			c->Request.CDBLen = 10;
696903383736SDon Brace 			c->Request.type_attr_dir =
697003383736SDon Brace 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
697103383736SDon Brace 			c->Request.Timeout = 0;
697203383736SDon Brace 			c->Request.CDB[0] = BMIC_READ;
697303383736SDon Brace 			c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE;
697403383736SDon Brace 			c->Request.CDB[7] = (size >> 16) & 0xFF;
697503383736SDon Brace 			c->Request.CDB[8] = (size >> 8) & 0XFF;
697603383736SDon Brace 			break;
6977d04e62b9SKevin Barnett 		case BMIC_SENSE_SUBSYSTEM_INFORMATION:
6978d04e62b9SKevin Barnett 			c->Request.CDBLen = 10;
6979d04e62b9SKevin Barnett 			c->Request.type_attr_dir =
6980d04e62b9SKevin Barnett 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6981d04e62b9SKevin Barnett 			c->Request.Timeout = 0;
6982d04e62b9SKevin Barnett 			c->Request.CDB[0] = BMIC_READ;
6983d04e62b9SKevin Barnett 			c->Request.CDB[6] = BMIC_SENSE_SUBSYSTEM_INFORMATION;
6984d04e62b9SKevin Barnett 			c->Request.CDB[7] = (size >> 16) & 0xFF;
6985d04e62b9SKevin Barnett 			c->Request.CDB[8] = (size >> 8) & 0XFF;
6986d04e62b9SKevin Barnett 			break;
6987cca8f13bSDon Brace 		case BMIC_SENSE_STORAGE_BOX_PARAMS:
6988cca8f13bSDon Brace 			c->Request.CDBLen = 10;
6989cca8f13bSDon Brace 			c->Request.type_attr_dir =
6990cca8f13bSDon Brace 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6991cca8f13bSDon Brace 			c->Request.Timeout = 0;
6992cca8f13bSDon Brace 			c->Request.CDB[0] = BMIC_READ;
6993cca8f13bSDon Brace 			c->Request.CDB[6] = BMIC_SENSE_STORAGE_BOX_PARAMS;
6994cca8f13bSDon Brace 			c->Request.CDB[7] = (size >> 16) & 0xFF;
6995cca8f13bSDon Brace 			c->Request.CDB[8] = (size >> 8) & 0XFF;
6996cca8f13bSDon Brace 			break;
699766749d0dSScott Teel 		case BMIC_IDENTIFY_CONTROLLER:
699866749d0dSScott Teel 			c->Request.CDBLen = 10;
699966749d0dSScott Teel 			c->Request.type_attr_dir =
700066749d0dSScott Teel 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
700166749d0dSScott Teel 			c->Request.Timeout = 0;
700266749d0dSScott Teel 			c->Request.CDB[0] = BMIC_READ;
700366749d0dSScott Teel 			c->Request.CDB[1] = 0;
700466749d0dSScott Teel 			c->Request.CDB[2] = 0;
700566749d0dSScott Teel 			c->Request.CDB[3] = 0;
700666749d0dSScott Teel 			c->Request.CDB[4] = 0;
700766749d0dSScott Teel 			c->Request.CDB[5] = 0;
700866749d0dSScott Teel 			c->Request.CDB[6] = BMIC_IDENTIFY_CONTROLLER;
700966749d0dSScott Teel 			c->Request.CDB[7] = (size >> 16) & 0xFF;
701066749d0dSScott Teel 			c->Request.CDB[8] = (size >> 8) & 0XFF;
701166749d0dSScott Teel 			c->Request.CDB[9] = 0;
701266749d0dSScott Teel 			break;
7013edd16368SStephen M. Cameron 		default:
7014edd16368SStephen M. Cameron 			dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
7015edd16368SStephen M. Cameron 			BUG();
7016a2dac136SStephen M. Cameron 			return -1;
7017edd16368SStephen M. Cameron 		}
7018edd16368SStephen M. Cameron 	} else if (cmd_type == TYPE_MSG) {
7019edd16368SStephen M. Cameron 		switch (cmd) {
7020edd16368SStephen M. Cameron 
70210b9b7b6eSScott Teel 		case  HPSA_PHYS_TARGET_RESET:
70220b9b7b6eSScott Teel 			c->Request.CDBLen = 16;
70230b9b7b6eSScott Teel 			c->Request.type_attr_dir =
70240b9b7b6eSScott Teel 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
70250b9b7b6eSScott Teel 			c->Request.Timeout = 0; /* Don't time out */
70260b9b7b6eSScott Teel 			memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
70270b9b7b6eSScott Teel 			c->Request.CDB[0] = HPSA_RESET;
70280b9b7b6eSScott Teel 			c->Request.CDB[1] = HPSA_TARGET_RESET_TYPE;
70290b9b7b6eSScott Teel 			/* Physical target reset needs no control bytes 4-7*/
70300b9b7b6eSScott Teel 			c->Request.CDB[4] = 0x00;
70310b9b7b6eSScott Teel 			c->Request.CDB[5] = 0x00;
70320b9b7b6eSScott Teel 			c->Request.CDB[6] = 0x00;
70330b9b7b6eSScott Teel 			c->Request.CDB[7] = 0x00;
70340b9b7b6eSScott Teel 			break;
7035edd16368SStephen M. Cameron 		case  HPSA_DEVICE_RESET_MSG:
7036edd16368SStephen M. Cameron 			c->Request.CDBLen = 16;
7037a505b86fSStephen M. Cameron 			c->Request.type_attr_dir =
7038a505b86fSStephen M. Cameron 				TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
7039edd16368SStephen M. Cameron 			c->Request.Timeout = 0; /* Don't time out */
704064670ac8SStephen M. Cameron 			memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
704164670ac8SStephen M. Cameron 			c->Request.CDB[0] =  cmd;
704221e89afdSStephen M. Cameron 			c->Request.CDB[1] = HPSA_RESET_TYPE_LUN;
7043edd16368SStephen M. Cameron 			/* If bytes 4-7 are zero, it means reset the */
7044edd16368SStephen M. Cameron 			/* LunID device */
7045edd16368SStephen M. Cameron 			c->Request.CDB[4] = 0x00;
7046edd16368SStephen M. Cameron 			c->Request.CDB[5] = 0x00;
7047edd16368SStephen M. Cameron 			c->Request.CDB[6] = 0x00;
7048edd16368SStephen M. Cameron 			c->Request.CDB[7] = 0x00;
7049edd16368SStephen M. Cameron 			break;
705075167d2cSStephen M. Cameron 		case  HPSA_ABORT_MSG:
70519b5c48c2SStephen Cameron 			memcpy(&tag, buff, sizeof(tag));
70522b08b3e9SDon Brace 			dev_dbg(&h->pdev->dev,
70539b5c48c2SStephen Cameron 				"Abort Tag:0x%016llx using rqst Tag:0x%016llx",
70549b5c48c2SStephen Cameron 				tag, c->Header.tag);
705575167d2cSStephen M. Cameron 			c->Request.CDBLen = 16;
7056a505b86fSStephen M. Cameron 			c->Request.type_attr_dir =
7057a505b86fSStephen M. Cameron 					TYPE_ATTR_DIR(cmd_type,
7058a505b86fSStephen M. Cameron 						ATTR_SIMPLE, XFER_WRITE);
705975167d2cSStephen M. Cameron 			c->Request.Timeout = 0; /* Don't time out */
706075167d2cSStephen M. Cameron 			c->Request.CDB[0] = HPSA_TASK_MANAGEMENT;
706175167d2cSStephen M. Cameron 			c->Request.CDB[1] = HPSA_TMF_ABORT_TASK;
706275167d2cSStephen M. Cameron 			c->Request.CDB[2] = 0x00; /* reserved */
706375167d2cSStephen M. Cameron 			c->Request.CDB[3] = 0x00; /* reserved */
706475167d2cSStephen M. Cameron 			/* Tag to abort goes in CDB[4]-CDB[11] */
70659b5c48c2SStephen Cameron 			memcpy(&c->Request.CDB[4], &tag, sizeof(tag));
706675167d2cSStephen M. Cameron 			c->Request.CDB[12] = 0x00; /* reserved */
706775167d2cSStephen M. Cameron 			c->Request.CDB[13] = 0x00; /* reserved */
706875167d2cSStephen M. Cameron 			c->Request.CDB[14] = 0x00; /* reserved */
706975167d2cSStephen M. Cameron 			c->Request.CDB[15] = 0x00; /* reserved */
707075167d2cSStephen M. Cameron 		break;
7071edd16368SStephen M. Cameron 		default:
7072edd16368SStephen M. Cameron 			dev_warn(&h->pdev->dev, "unknown message type %d\n",
7073edd16368SStephen M. Cameron 				cmd);
7074edd16368SStephen M. Cameron 			BUG();
7075edd16368SStephen M. Cameron 		}
7076edd16368SStephen M. Cameron 	} else {
7077edd16368SStephen M. Cameron 		dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
7078edd16368SStephen M. Cameron 		BUG();
7079edd16368SStephen M. Cameron 	}
7080edd16368SStephen M. Cameron 
7081a505b86fSStephen M. Cameron 	switch (GET_DIR(c->Request.type_attr_dir)) {
7082edd16368SStephen M. Cameron 	case XFER_READ:
7083edd16368SStephen M. Cameron 		pci_dir = PCI_DMA_FROMDEVICE;
7084edd16368SStephen M. Cameron 		break;
7085edd16368SStephen M. Cameron 	case XFER_WRITE:
7086edd16368SStephen M. Cameron 		pci_dir = PCI_DMA_TODEVICE;
7087edd16368SStephen M. Cameron 		break;
7088edd16368SStephen M. Cameron 	case XFER_NONE:
7089edd16368SStephen M. Cameron 		pci_dir = PCI_DMA_NONE;
7090edd16368SStephen M. Cameron 		break;
7091edd16368SStephen M. Cameron 	default:
7092edd16368SStephen M. Cameron 		pci_dir = PCI_DMA_BIDIRECTIONAL;
7093edd16368SStephen M. Cameron 	}
7094a2dac136SStephen M. Cameron 	if (hpsa_map_one(h->pdev, c, buff, size, pci_dir))
7095a2dac136SStephen M. Cameron 		return -1;
7096a2dac136SStephen M. Cameron 	return 0;
7097edd16368SStephen M. Cameron }
7098edd16368SStephen M. Cameron 
7099edd16368SStephen M. Cameron /*
7100edd16368SStephen M. Cameron  * Map (physical) PCI mem into (virtual) kernel space
7101edd16368SStephen M. Cameron  */
7102edd16368SStephen M. Cameron static void __iomem *remap_pci_mem(ulong base, ulong size)
7103edd16368SStephen M. Cameron {
7104edd16368SStephen M. Cameron 	ulong page_base = ((ulong) base) & PAGE_MASK;
7105edd16368SStephen M. Cameron 	ulong page_offs = ((ulong) base) - page_base;
7106088ba34cSStephen M. Cameron 	void __iomem *page_remapped = ioremap_nocache(page_base,
7107088ba34cSStephen M. Cameron 		page_offs + size);
7108edd16368SStephen M. Cameron 
7109edd16368SStephen M. Cameron 	return page_remapped ? (page_remapped + page_offs) : NULL;
7110edd16368SStephen M. Cameron }
7111edd16368SStephen M. Cameron 
7112254f796bSMatt Gates static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q)
7113edd16368SStephen M. Cameron {
7114254f796bSMatt Gates 	return h->access.command_completed(h, q);
7115edd16368SStephen M. Cameron }
7116edd16368SStephen M. Cameron 
7117900c5440SStephen M. Cameron static inline bool interrupt_pending(struct ctlr_info *h)
7118edd16368SStephen M. Cameron {
7119edd16368SStephen M. Cameron 	return h->access.intr_pending(h);
7120edd16368SStephen M. Cameron }
7121edd16368SStephen M. Cameron 
7122edd16368SStephen M. Cameron static inline long interrupt_not_for_us(struct ctlr_info *h)
7123edd16368SStephen M. Cameron {
712410f66018SStephen M. Cameron 	return (h->access.intr_pending(h) == 0) ||
712510f66018SStephen M. Cameron 		(h->interrupts_enabled == 0);
7126edd16368SStephen M. Cameron }
7127edd16368SStephen M. Cameron 
712801a02ffcSStephen M. Cameron static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
712901a02ffcSStephen M. Cameron 	u32 raw_tag)
7130edd16368SStephen M. Cameron {
7131edd16368SStephen M. Cameron 	if (unlikely(tag_index >= h->nr_cmds)) {
7132edd16368SStephen M. Cameron 		dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
7133edd16368SStephen M. Cameron 		return 1;
7134edd16368SStephen M. Cameron 	}
7135edd16368SStephen M. Cameron 	return 0;
7136edd16368SStephen M. Cameron }
7137edd16368SStephen M. Cameron 
71385a3d16f5SStephen M. Cameron static inline void finish_cmd(struct CommandList *c)
7139edd16368SStephen M. Cameron {
7140e85c5974SStephen M. Cameron 	dial_up_lockup_detection_on_fw_flash_complete(c->h, c);
7141c349775eSScott Teel 	if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI
7142c349775eSScott Teel 			|| c->cmd_type == CMD_IOACCEL2))
71431fb011fbSStephen M. Cameron 		complete_scsi_command(c);
71448be986ccSStephen Cameron 	else if (c->cmd_type == CMD_IOCTL_PEND || c->cmd_type == IOACCEL2_TMF)
7145edd16368SStephen M. Cameron 		complete(c->waiting);
7146a104c99fSStephen M. Cameron }
7147a104c99fSStephen M. Cameron 
7148303932fdSDon Brace /* process completion of an indexed ("direct lookup") command */
71491d94f94dSStephen M. Cameron static inline void process_indexed_cmd(struct ctlr_info *h,
7150303932fdSDon Brace 	u32 raw_tag)
7151303932fdSDon Brace {
7152303932fdSDon Brace 	u32 tag_index;
7153303932fdSDon Brace 	struct CommandList *c;
7154303932fdSDon Brace 
7155f2405db8SDon Brace 	tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT;
71561d94f94dSStephen M. Cameron 	if (!bad_tag(h, tag_index, raw_tag)) {
7157303932fdSDon Brace 		c = h->cmd_pool + tag_index;
71585a3d16f5SStephen M. Cameron 		finish_cmd(c);
71591d94f94dSStephen M. Cameron 	}
7160303932fdSDon Brace }
7161303932fdSDon Brace 
716264670ac8SStephen M. Cameron /* Some controllers, like p400, will give us one interrupt
716364670ac8SStephen M. Cameron  * after a soft reset, even if we turned interrupts off.
716464670ac8SStephen M. Cameron  * Only need to check for this in the hpsa_xxx_discard_completions
716564670ac8SStephen M. Cameron  * functions.
716664670ac8SStephen M. Cameron  */
716764670ac8SStephen M. Cameron static int ignore_bogus_interrupt(struct ctlr_info *h)
716864670ac8SStephen M. Cameron {
716964670ac8SStephen M. Cameron 	if (likely(!reset_devices))
717064670ac8SStephen M. Cameron 		return 0;
717164670ac8SStephen M. Cameron 
717264670ac8SStephen M. Cameron 	if (likely(h->interrupts_enabled))
717364670ac8SStephen M. Cameron 		return 0;
717464670ac8SStephen M. Cameron 
717564670ac8SStephen M. Cameron 	dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
717664670ac8SStephen M. Cameron 		"(known firmware bug.)  Ignoring.\n");
717764670ac8SStephen M. Cameron 
717864670ac8SStephen M. Cameron 	return 1;
717964670ac8SStephen M. Cameron }
718064670ac8SStephen M. Cameron 
7181254f796bSMatt Gates /*
7182254f796bSMatt Gates  * Convert &h->q[x] (passed to interrupt handlers) back to h.
7183254f796bSMatt Gates  * Relies on (h-q[x] == x) being true for x such that
7184254f796bSMatt Gates  * 0 <= x < MAX_REPLY_QUEUES.
7185254f796bSMatt Gates  */
7186254f796bSMatt Gates static struct ctlr_info *queue_to_hba(u8 *queue)
718764670ac8SStephen M. Cameron {
7188254f796bSMatt Gates 	return container_of((queue - *queue), struct ctlr_info, q[0]);
7189254f796bSMatt Gates }
7190254f796bSMatt Gates 
7191254f796bSMatt Gates static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue)
7192254f796bSMatt Gates {
7193254f796bSMatt Gates 	struct ctlr_info *h = queue_to_hba(queue);
7194254f796bSMatt Gates 	u8 q = *(u8 *) queue;
719564670ac8SStephen M. Cameron 	u32 raw_tag;
719664670ac8SStephen M. Cameron 
719764670ac8SStephen M. Cameron 	if (ignore_bogus_interrupt(h))
719864670ac8SStephen M. Cameron 		return IRQ_NONE;
719964670ac8SStephen M. Cameron 
720064670ac8SStephen M. Cameron 	if (interrupt_not_for_us(h))
720164670ac8SStephen M. Cameron 		return IRQ_NONE;
7202a0c12413SStephen M. Cameron 	h->last_intr_timestamp = get_jiffies_64();
720364670ac8SStephen M. Cameron 	while (interrupt_pending(h)) {
7204254f796bSMatt Gates 		raw_tag = get_next_completion(h, q);
720564670ac8SStephen M. Cameron 		while (raw_tag != FIFO_EMPTY)
7206254f796bSMatt Gates 			raw_tag = next_command(h, q);
720764670ac8SStephen M. Cameron 	}
720864670ac8SStephen M. Cameron 	return IRQ_HANDLED;
720964670ac8SStephen M. Cameron }
721064670ac8SStephen M. Cameron 
7211254f796bSMatt Gates static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue)
721264670ac8SStephen M. Cameron {
7213254f796bSMatt Gates 	struct ctlr_info *h = queue_to_hba(queue);
721464670ac8SStephen M. Cameron 	u32 raw_tag;
7215254f796bSMatt Gates 	u8 q = *(u8 *) queue;
721664670ac8SStephen M. Cameron 
721764670ac8SStephen M. Cameron 	if (ignore_bogus_interrupt(h))
721864670ac8SStephen M. Cameron 		return IRQ_NONE;
721964670ac8SStephen M. Cameron 
7220a0c12413SStephen M. Cameron 	h->last_intr_timestamp = get_jiffies_64();
7221254f796bSMatt Gates 	raw_tag = get_next_completion(h, q);
722264670ac8SStephen M. Cameron 	while (raw_tag != FIFO_EMPTY)
7223254f796bSMatt Gates 		raw_tag = next_command(h, q);
722464670ac8SStephen M. Cameron 	return IRQ_HANDLED;
722564670ac8SStephen M. Cameron }
722664670ac8SStephen M. Cameron 
7227254f796bSMatt Gates static irqreturn_t do_hpsa_intr_intx(int irq, void *queue)
7228edd16368SStephen M. Cameron {
7229254f796bSMatt Gates 	struct ctlr_info *h = queue_to_hba((u8 *) queue);
7230303932fdSDon Brace 	u32 raw_tag;
7231254f796bSMatt Gates 	u8 q = *(u8 *) queue;
7232edd16368SStephen M. Cameron 
7233edd16368SStephen M. Cameron 	if (interrupt_not_for_us(h))
7234edd16368SStephen M. Cameron 		return IRQ_NONE;
7235a0c12413SStephen M. Cameron 	h->last_intr_timestamp = get_jiffies_64();
723610f66018SStephen M. Cameron 	while (interrupt_pending(h)) {
7237254f796bSMatt Gates 		raw_tag = get_next_completion(h, q);
723810f66018SStephen M. Cameron 		while (raw_tag != FIFO_EMPTY) {
72391d94f94dSStephen M. Cameron 			process_indexed_cmd(h, raw_tag);
7240254f796bSMatt Gates 			raw_tag = next_command(h, q);
724110f66018SStephen M. Cameron 		}
724210f66018SStephen M. Cameron 	}
724310f66018SStephen M. Cameron 	return IRQ_HANDLED;
724410f66018SStephen M. Cameron }
724510f66018SStephen M. Cameron 
7246254f796bSMatt Gates static irqreturn_t do_hpsa_intr_msi(int irq, void *queue)
724710f66018SStephen M. Cameron {
7248254f796bSMatt Gates 	struct ctlr_info *h = queue_to_hba(queue);
724910f66018SStephen M. Cameron 	u32 raw_tag;
7250254f796bSMatt Gates 	u8 q = *(u8 *) queue;
725110f66018SStephen M. Cameron 
7252a0c12413SStephen M. Cameron 	h->last_intr_timestamp = get_jiffies_64();
7253254f796bSMatt Gates 	raw_tag = get_next_completion(h, q);
7254303932fdSDon Brace 	while (raw_tag != FIFO_EMPTY) {
72551d94f94dSStephen M. Cameron 		process_indexed_cmd(h, raw_tag);
7256254f796bSMatt Gates 		raw_tag = next_command(h, q);
7257edd16368SStephen M. Cameron 	}
7258edd16368SStephen M. Cameron 	return IRQ_HANDLED;
7259edd16368SStephen M. Cameron }
7260edd16368SStephen M. Cameron 
7261a9a3a273SStephen M. Cameron /* Send a message CDB to the firmware. Careful, this only works
7262a9a3a273SStephen M. Cameron  * in simple mode, not performant mode due to the tag lookup.
7263a9a3a273SStephen M. Cameron  * We only ever use this immediately after a controller reset.
7264a9a3a273SStephen M. Cameron  */
72656f039790SGreg Kroah-Hartman static int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
7266edd16368SStephen M. Cameron 			unsigned char type)
7267edd16368SStephen M. Cameron {
7268edd16368SStephen M. Cameron 	struct Command {
7269edd16368SStephen M. Cameron 		struct CommandListHeader CommandHeader;
7270edd16368SStephen M. Cameron 		struct RequestBlock Request;
7271edd16368SStephen M. Cameron 		struct ErrDescriptor ErrorDescriptor;
7272edd16368SStephen M. Cameron 	};
7273edd16368SStephen M. Cameron 	struct Command *cmd;
7274edd16368SStephen M. Cameron 	static const size_t cmd_sz = sizeof(*cmd) +
7275edd16368SStephen M. Cameron 					sizeof(cmd->ErrorDescriptor);
7276edd16368SStephen M. Cameron 	dma_addr_t paddr64;
72772b08b3e9SDon Brace 	__le32 paddr32;
72782b08b3e9SDon Brace 	u32 tag;
7279edd16368SStephen M. Cameron 	void __iomem *vaddr;
7280edd16368SStephen M. Cameron 	int i, err;
7281edd16368SStephen M. Cameron 
7282edd16368SStephen M. Cameron 	vaddr = pci_ioremap_bar(pdev, 0);
7283edd16368SStephen M. Cameron 	if (vaddr == NULL)
7284edd16368SStephen M. Cameron 		return -ENOMEM;
7285edd16368SStephen M. Cameron 
7286edd16368SStephen M. Cameron 	/* The Inbound Post Queue only accepts 32-bit physical addresses for the
7287edd16368SStephen M. Cameron 	 * CCISS commands, so they must be allocated from the lower 4GiB of
7288edd16368SStephen M. Cameron 	 * memory.
7289edd16368SStephen M. Cameron 	 */
7290edd16368SStephen M. Cameron 	err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
7291edd16368SStephen M. Cameron 	if (err) {
7292edd16368SStephen M. Cameron 		iounmap(vaddr);
72931eaec8f3SRobert Elliott 		return err;
7294edd16368SStephen M. Cameron 	}
7295edd16368SStephen M. Cameron 
7296edd16368SStephen M. Cameron 	cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
7297edd16368SStephen M. Cameron 	if (cmd == NULL) {
7298edd16368SStephen M. Cameron 		iounmap(vaddr);
7299edd16368SStephen M. Cameron 		return -ENOMEM;
7300edd16368SStephen M. Cameron 	}
7301edd16368SStephen M. Cameron 
7302edd16368SStephen M. Cameron 	/* This must fit, because of the 32-bit consistent DMA mask.  Also,
7303edd16368SStephen M. Cameron 	 * although there's no guarantee, we assume that the address is at
7304edd16368SStephen M. Cameron 	 * least 4-byte aligned (most likely, it's page-aligned).
7305edd16368SStephen M. Cameron 	 */
73062b08b3e9SDon Brace 	paddr32 = cpu_to_le32(paddr64);
7307edd16368SStephen M. Cameron 
7308edd16368SStephen M. Cameron 	cmd->CommandHeader.ReplyQueue = 0;
7309edd16368SStephen M. Cameron 	cmd->CommandHeader.SGList = 0;
731050a0decfSStephen M. Cameron 	cmd->CommandHeader.SGTotal = cpu_to_le16(0);
73112b08b3e9SDon Brace 	cmd->CommandHeader.tag = cpu_to_le64(paddr64);
7312edd16368SStephen M. Cameron 	memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
7313edd16368SStephen M. Cameron 
7314edd16368SStephen M. Cameron 	cmd->Request.CDBLen = 16;
7315a505b86fSStephen M. Cameron 	cmd->Request.type_attr_dir =
7316a505b86fSStephen M. Cameron 			TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE);
7317edd16368SStephen M. Cameron 	cmd->Request.Timeout = 0; /* Don't time out */
7318edd16368SStephen M. Cameron 	cmd->Request.CDB[0] = opcode;
7319edd16368SStephen M. Cameron 	cmd->Request.CDB[1] = type;
7320edd16368SStephen M. Cameron 	memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
732150a0decfSStephen M. Cameron 	cmd->ErrorDescriptor.Addr =
73222b08b3e9SDon Brace 			cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd)));
732350a0decfSStephen M. Cameron 	cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo));
7324edd16368SStephen M. Cameron 
73252b08b3e9SDon Brace 	writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET);
7326edd16368SStephen M. Cameron 
7327edd16368SStephen M. Cameron 	for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
7328edd16368SStephen M. Cameron 		tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
73292b08b3e9SDon Brace 		if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64)
7330edd16368SStephen M. Cameron 			break;
7331edd16368SStephen M. Cameron 		msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
7332edd16368SStephen M. Cameron 	}
7333edd16368SStephen M. Cameron 
7334edd16368SStephen M. Cameron 	iounmap(vaddr);
7335edd16368SStephen M. Cameron 
7336edd16368SStephen M. Cameron 	/* we leak the DMA buffer here ... no choice since the controller could
7337edd16368SStephen M. Cameron 	 *  still complete the command.
7338edd16368SStephen M. Cameron 	 */
7339edd16368SStephen M. Cameron 	if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
7340edd16368SStephen M. Cameron 		dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
7341edd16368SStephen M. Cameron 			opcode, type);
7342edd16368SStephen M. Cameron 		return -ETIMEDOUT;
7343edd16368SStephen M. Cameron 	}
7344edd16368SStephen M. Cameron 
7345edd16368SStephen M. Cameron 	pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
7346edd16368SStephen M. Cameron 
7347edd16368SStephen M. Cameron 	if (tag & HPSA_ERROR_BIT) {
7348edd16368SStephen M. Cameron 		dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
7349edd16368SStephen M. Cameron 			opcode, type);
7350edd16368SStephen M. Cameron 		return -EIO;
7351edd16368SStephen M. Cameron 	}
7352edd16368SStephen M. Cameron 
7353edd16368SStephen M. Cameron 	dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
7354edd16368SStephen M. Cameron 		opcode, type);
7355edd16368SStephen M. Cameron 	return 0;
7356edd16368SStephen M. Cameron }
7357edd16368SStephen M. Cameron 
7358edd16368SStephen M. Cameron #define hpsa_noop(p) hpsa_message(p, 3, 0)
7359edd16368SStephen M. Cameron 
73601df8552aSStephen M. Cameron static int hpsa_controller_hard_reset(struct pci_dev *pdev,
736142a91641SDon Brace 	void __iomem *vaddr, u32 use_doorbell)
7362edd16368SStephen M. Cameron {
7363edd16368SStephen M. Cameron 
73641df8552aSStephen M. Cameron 	if (use_doorbell) {
73651df8552aSStephen M. Cameron 		/* For everything after the P600, the PCI power state method
73661df8552aSStephen M. Cameron 		 * of resetting the controller doesn't work, so we have this
73671df8552aSStephen M. Cameron 		 * other way using the doorbell register.
7368edd16368SStephen M. Cameron 		 */
73691df8552aSStephen M. Cameron 		dev_info(&pdev->dev, "using doorbell to reset controller\n");
7370cf0b08d0SStephen M. Cameron 		writel(use_doorbell, vaddr + SA5_DOORBELL);
737185009239SStephen M. Cameron 
737200701a96SJustin Lindley 		/* PMC hardware guys tell us we need a 10 second delay after
737385009239SStephen M. Cameron 		 * doorbell reset and before any attempt to talk to the board
737485009239SStephen M. Cameron 		 * at all to ensure that this actually works and doesn't fall
737585009239SStephen M. Cameron 		 * over in some weird corner cases.
737685009239SStephen M. Cameron 		 */
737700701a96SJustin Lindley 		msleep(10000);
73781df8552aSStephen M. Cameron 	} else { /* Try to do it the PCI power state way */
7379edd16368SStephen M. Cameron 
7380edd16368SStephen M. Cameron 		/* Quoting from the Open CISS Specification: "The Power
7381edd16368SStephen M. Cameron 		 * Management Control/Status Register (CSR) controls the power
7382edd16368SStephen M. Cameron 		 * state of the device.  The normal operating state is D0,
7383edd16368SStephen M. Cameron 		 * CSR=00h.  The software off state is D3, CSR=03h.  To reset
73841df8552aSStephen M. Cameron 		 * the controller, place the interface device in D3 then to D0,
73851df8552aSStephen M. Cameron 		 * this causes a secondary PCI reset which will reset the
73861df8552aSStephen M. Cameron 		 * controller." */
7387edd16368SStephen M. Cameron 
73882662cab8SDon Brace 		int rc = 0;
73892662cab8SDon Brace 
73901df8552aSStephen M. Cameron 		dev_info(&pdev->dev, "using PCI PM to reset controller\n");
73912662cab8SDon Brace 
7392edd16368SStephen M. Cameron 		/* enter the D3hot power management state */
73932662cab8SDon Brace 		rc = pci_set_power_state(pdev, PCI_D3hot);
73942662cab8SDon Brace 		if (rc)
73952662cab8SDon Brace 			return rc;
7396edd16368SStephen M. Cameron 
7397edd16368SStephen M. Cameron 		msleep(500);
7398edd16368SStephen M. Cameron 
7399edd16368SStephen M. Cameron 		/* enter the D0 power management state */
74002662cab8SDon Brace 		rc = pci_set_power_state(pdev, PCI_D0);
74012662cab8SDon Brace 		if (rc)
74022662cab8SDon Brace 			return rc;
7403c4853efeSMike Miller 
7404c4853efeSMike Miller 		/*
7405c4853efeSMike Miller 		 * The P600 requires a small delay when changing states.
7406c4853efeSMike Miller 		 * Otherwise we may think the board did not reset and we bail.
7407c4853efeSMike Miller 		 * This for kdump only and is particular to the P600.
7408c4853efeSMike Miller 		 */
7409c4853efeSMike Miller 		msleep(500);
74101df8552aSStephen M. Cameron 	}
74111df8552aSStephen M. Cameron 	return 0;
74121df8552aSStephen M. Cameron }
74131df8552aSStephen M. Cameron 
74146f039790SGreg Kroah-Hartman static void init_driver_version(char *driver_version, int len)
7415580ada3cSStephen M. Cameron {
7416580ada3cSStephen M. Cameron 	memset(driver_version, 0, len);
7417f79cfec6SStephen M. Cameron 	strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1);
7418580ada3cSStephen M. Cameron }
7419580ada3cSStephen M. Cameron 
74206f039790SGreg Kroah-Hartman static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable)
7421580ada3cSStephen M. Cameron {
7422580ada3cSStephen M. Cameron 	char *driver_version;
7423580ada3cSStephen M. Cameron 	int i, size = sizeof(cfgtable->driver_version);
7424580ada3cSStephen M. Cameron 
7425580ada3cSStephen M. Cameron 	driver_version = kmalloc(size, GFP_KERNEL);
7426580ada3cSStephen M. Cameron 	if (!driver_version)
7427580ada3cSStephen M. Cameron 		return -ENOMEM;
7428580ada3cSStephen M. Cameron 
7429580ada3cSStephen M. Cameron 	init_driver_version(driver_version, size);
7430580ada3cSStephen M. Cameron 	for (i = 0; i < size; i++)
7431580ada3cSStephen M. Cameron 		writeb(driver_version[i], &cfgtable->driver_version[i]);
7432580ada3cSStephen M. Cameron 	kfree(driver_version);
7433580ada3cSStephen M. Cameron 	return 0;
7434580ada3cSStephen M. Cameron }
7435580ada3cSStephen M. Cameron 
74366f039790SGreg Kroah-Hartman static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable,
74376f039790SGreg Kroah-Hartman 					  unsigned char *driver_ver)
7438580ada3cSStephen M. Cameron {
7439580ada3cSStephen M. Cameron 	int i;
7440580ada3cSStephen M. Cameron 
7441580ada3cSStephen M. Cameron 	for (i = 0; i < sizeof(cfgtable->driver_version); i++)
7442580ada3cSStephen M. Cameron 		driver_ver[i] = readb(&cfgtable->driver_version[i]);
7443580ada3cSStephen M. Cameron }
7444580ada3cSStephen M. Cameron 
74456f039790SGreg Kroah-Hartman static int controller_reset_failed(struct CfgTable __iomem *cfgtable)
7446580ada3cSStephen M. Cameron {
7447580ada3cSStephen M. Cameron 
7448580ada3cSStephen M. Cameron 	char *driver_ver, *old_driver_ver;
7449580ada3cSStephen M. Cameron 	int rc, size = sizeof(cfgtable->driver_version);
7450580ada3cSStephen M. Cameron 
7451580ada3cSStephen M. Cameron 	old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
7452580ada3cSStephen M. Cameron 	if (!old_driver_ver)
7453580ada3cSStephen M. Cameron 		return -ENOMEM;
7454580ada3cSStephen M. Cameron 	driver_ver = old_driver_ver + size;
7455580ada3cSStephen M. Cameron 
7456580ada3cSStephen M. Cameron 	/* After a reset, the 32 bytes of "driver version" in the cfgtable
7457580ada3cSStephen M. Cameron 	 * should have been changed, otherwise we know the reset failed.
7458580ada3cSStephen M. Cameron 	 */
7459580ada3cSStephen M. Cameron 	init_driver_version(old_driver_ver, size);
7460580ada3cSStephen M. Cameron 	read_driver_ver_from_cfgtable(cfgtable, driver_ver);
7461580ada3cSStephen M. Cameron 	rc = !memcmp(driver_ver, old_driver_ver, size);
7462580ada3cSStephen M. Cameron 	kfree(old_driver_ver);
7463580ada3cSStephen M. Cameron 	return rc;
7464580ada3cSStephen M. Cameron }
74651df8552aSStephen M. Cameron /* This does a hard reset of the controller using PCI power management
74661df8552aSStephen M. Cameron  * states or the using the doorbell register.
74671df8552aSStephen M. Cameron  */
74686b6c1cd7STomas Henzl static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id)
74691df8552aSStephen M. Cameron {
74701df8552aSStephen M. Cameron 	u64 cfg_offset;
74711df8552aSStephen M. Cameron 	u32 cfg_base_addr;
74721df8552aSStephen M. Cameron 	u64 cfg_base_addr_index;
74731df8552aSStephen M. Cameron 	void __iomem *vaddr;
74741df8552aSStephen M. Cameron 	unsigned long paddr;
7475580ada3cSStephen M. Cameron 	u32 misc_fw_support;
7476270d05deSStephen M. Cameron 	int rc;
74771df8552aSStephen M. Cameron 	struct CfgTable __iomem *cfgtable;
7478cf0b08d0SStephen M. Cameron 	u32 use_doorbell;
7479270d05deSStephen M. Cameron 	u16 command_register;
74801df8552aSStephen M. Cameron 
74811df8552aSStephen M. Cameron 	/* For controllers as old as the P600, this is very nearly
74821df8552aSStephen M. Cameron 	 * the same thing as
74831df8552aSStephen M. Cameron 	 *
74841df8552aSStephen M. Cameron 	 * pci_save_state(pci_dev);
74851df8552aSStephen M. Cameron 	 * pci_set_power_state(pci_dev, PCI_D3hot);
74861df8552aSStephen M. Cameron 	 * pci_set_power_state(pci_dev, PCI_D0);
74871df8552aSStephen M. Cameron 	 * pci_restore_state(pci_dev);
74881df8552aSStephen M. Cameron 	 *
74891df8552aSStephen M. Cameron 	 * For controllers newer than the P600, the pci power state
74901df8552aSStephen M. Cameron 	 * method of resetting doesn't work so we have another way
74911df8552aSStephen M. Cameron 	 * using the doorbell register.
74921df8552aSStephen M. Cameron 	 */
749318867659SStephen M. Cameron 
749460f923b9SRobert Elliott 	if (!ctlr_is_resettable(board_id)) {
749560f923b9SRobert Elliott 		dev_warn(&pdev->dev, "Controller not resettable\n");
749625c1e56aSStephen M. Cameron 		return -ENODEV;
749725c1e56aSStephen M. Cameron 	}
749846380786SStephen M. Cameron 
749946380786SStephen M. Cameron 	/* if controller is soft- but not hard resettable... */
750046380786SStephen M. Cameron 	if (!ctlr_is_hard_resettable(board_id))
750146380786SStephen M. Cameron 		return -ENOTSUPP; /* try soft reset later. */
750218867659SStephen M. Cameron 
7503270d05deSStephen M. Cameron 	/* Save the PCI command register */
7504270d05deSStephen M. Cameron 	pci_read_config_word(pdev, 4, &command_register);
7505270d05deSStephen M. Cameron 	pci_save_state(pdev);
75061df8552aSStephen M. Cameron 
75071df8552aSStephen M. Cameron 	/* find the first memory BAR, so we can find the cfg table */
75081df8552aSStephen M. Cameron 	rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
75091df8552aSStephen M. Cameron 	if (rc)
75101df8552aSStephen M. Cameron 		return rc;
75111df8552aSStephen M. Cameron 	vaddr = remap_pci_mem(paddr, 0x250);
75121df8552aSStephen M. Cameron 	if (!vaddr)
75131df8552aSStephen M. Cameron 		return -ENOMEM;
75141df8552aSStephen M. Cameron 
75151df8552aSStephen M. Cameron 	/* find cfgtable in order to check if reset via doorbell is supported */
75161df8552aSStephen M. Cameron 	rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
75171df8552aSStephen M. Cameron 					&cfg_base_addr_index, &cfg_offset);
75181df8552aSStephen M. Cameron 	if (rc)
75191df8552aSStephen M. Cameron 		goto unmap_vaddr;
75201df8552aSStephen M. Cameron 	cfgtable = remap_pci_mem(pci_resource_start(pdev,
75211df8552aSStephen M. Cameron 		       cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
75221df8552aSStephen M. Cameron 	if (!cfgtable) {
75231df8552aSStephen M. Cameron 		rc = -ENOMEM;
75241df8552aSStephen M. Cameron 		goto unmap_vaddr;
75251df8552aSStephen M. Cameron 	}
7526580ada3cSStephen M. Cameron 	rc = write_driver_ver_to_cfgtable(cfgtable);
7527580ada3cSStephen M. Cameron 	if (rc)
752803741d95STomas Henzl 		goto unmap_cfgtable;
75291df8552aSStephen M. Cameron 
7530cf0b08d0SStephen M. Cameron 	/* If reset via doorbell register is supported, use that.
7531cf0b08d0SStephen M. Cameron 	 * There are two such methods.  Favor the newest method.
7532cf0b08d0SStephen M. Cameron 	 */
75331df8552aSStephen M. Cameron 	misc_fw_support = readl(&cfgtable->misc_fw_support);
7534cf0b08d0SStephen M. Cameron 	use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
7535cf0b08d0SStephen M. Cameron 	if (use_doorbell) {
7536cf0b08d0SStephen M. Cameron 		use_doorbell = DOORBELL_CTLR_RESET2;
7537cf0b08d0SStephen M. Cameron 	} else {
75381df8552aSStephen M. Cameron 		use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
7539cf0b08d0SStephen M. Cameron 		if (use_doorbell) {
7540050f7147SStephen Cameron 			dev_warn(&pdev->dev,
7541050f7147SStephen Cameron 				"Soft reset not supported. Firmware update is required.\n");
754264670ac8SStephen M. Cameron 			rc = -ENOTSUPP; /* try soft reset */
7543cf0b08d0SStephen M. Cameron 			goto unmap_cfgtable;
7544cf0b08d0SStephen M. Cameron 		}
7545cf0b08d0SStephen M. Cameron 	}
75461df8552aSStephen M. Cameron 
75471df8552aSStephen M. Cameron 	rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
75481df8552aSStephen M. Cameron 	if (rc)
75491df8552aSStephen M. Cameron 		goto unmap_cfgtable;
7550edd16368SStephen M. Cameron 
7551270d05deSStephen M. Cameron 	pci_restore_state(pdev);
7552270d05deSStephen M. Cameron 	pci_write_config_word(pdev, 4, command_register);
7553edd16368SStephen M. Cameron 
75541df8552aSStephen M. Cameron 	/* Some devices (notably the HP Smart Array 5i Controller)
75551df8552aSStephen M. Cameron 	   need a little pause here */
75561df8552aSStephen M. Cameron 	msleep(HPSA_POST_RESET_PAUSE_MSECS);
75571df8552aSStephen M. Cameron 
7558fe5389c8SStephen M. Cameron 	rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
7559fe5389c8SStephen M. Cameron 	if (rc) {
7560fe5389c8SStephen M. Cameron 		dev_warn(&pdev->dev,
7561050f7147SStephen Cameron 			"Failed waiting for board to become ready after hard reset\n");
7562fe5389c8SStephen M. Cameron 		goto unmap_cfgtable;
7563fe5389c8SStephen M. Cameron 	}
7564fe5389c8SStephen M. Cameron 
7565580ada3cSStephen M. Cameron 	rc = controller_reset_failed(vaddr);
7566580ada3cSStephen M. Cameron 	if (rc < 0)
7567580ada3cSStephen M. Cameron 		goto unmap_cfgtable;
7568580ada3cSStephen M. Cameron 	if (rc) {
756964670ac8SStephen M. Cameron 		dev_warn(&pdev->dev, "Unable to successfully reset "
757064670ac8SStephen M. Cameron 			"controller. Will try soft reset.\n");
757164670ac8SStephen M. Cameron 		rc = -ENOTSUPP;
7572580ada3cSStephen M. Cameron 	} else {
757364670ac8SStephen M. Cameron 		dev_info(&pdev->dev, "board ready after hard reset.\n");
75741df8552aSStephen M. Cameron 	}
75751df8552aSStephen M. Cameron 
75761df8552aSStephen M. Cameron unmap_cfgtable:
75771df8552aSStephen M. Cameron 	iounmap(cfgtable);
75781df8552aSStephen M. Cameron 
75791df8552aSStephen M. Cameron unmap_vaddr:
75801df8552aSStephen M. Cameron 	iounmap(vaddr);
75811df8552aSStephen M. Cameron 	return rc;
7582edd16368SStephen M. Cameron }
7583edd16368SStephen M. Cameron 
7584edd16368SStephen M. Cameron /*
7585edd16368SStephen M. Cameron  *  We cannot read the structure directly, for portability we must use
7586edd16368SStephen M. Cameron  *   the io functions.
7587edd16368SStephen M. Cameron  *   This is for debug only.
7588edd16368SStephen M. Cameron  */
758942a91641SDon Brace static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb)
7590edd16368SStephen M. Cameron {
759158f8665cSStephen M. Cameron #ifdef HPSA_DEBUG
7592edd16368SStephen M. Cameron 	int i;
7593edd16368SStephen M. Cameron 	char temp_name[17];
7594edd16368SStephen M. Cameron 
7595edd16368SStephen M. Cameron 	dev_info(dev, "Controller Configuration information\n");
7596edd16368SStephen M. Cameron 	dev_info(dev, "------------------------------------\n");
7597edd16368SStephen M. Cameron 	for (i = 0; i < 4; i++)
7598edd16368SStephen M. Cameron 		temp_name[i] = readb(&(tb->Signature[i]));
7599edd16368SStephen M. Cameron 	temp_name[4] = '\0';
7600edd16368SStephen M. Cameron 	dev_info(dev, "   Signature = %s\n", temp_name);
7601edd16368SStephen M. Cameron 	dev_info(dev, "   Spec Number = %d\n", readl(&(tb->SpecValence)));
7602edd16368SStephen M. Cameron 	dev_info(dev, "   Transport methods supported = 0x%x\n",
7603edd16368SStephen M. Cameron 	       readl(&(tb->TransportSupport)));
7604edd16368SStephen M. Cameron 	dev_info(dev, "   Transport methods active = 0x%x\n",
7605edd16368SStephen M. Cameron 	       readl(&(tb->TransportActive)));
7606edd16368SStephen M. Cameron 	dev_info(dev, "   Requested transport Method = 0x%x\n",
7607edd16368SStephen M. Cameron 	       readl(&(tb->HostWrite.TransportRequest)));
7608edd16368SStephen M. Cameron 	dev_info(dev, "   Coalesce Interrupt Delay = 0x%x\n",
7609edd16368SStephen M. Cameron 	       readl(&(tb->HostWrite.CoalIntDelay)));
7610edd16368SStephen M. Cameron 	dev_info(dev, "   Coalesce Interrupt Count = 0x%x\n",
7611edd16368SStephen M. Cameron 	       readl(&(tb->HostWrite.CoalIntCount)));
761269d6e33dSRobert Elliott 	dev_info(dev, "   Max outstanding commands = %d\n",
7613edd16368SStephen M. Cameron 	       readl(&(tb->CmdsOutMax)));
7614edd16368SStephen M. Cameron 	dev_info(dev, "   Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
7615edd16368SStephen M. Cameron 	for (i = 0; i < 16; i++)
7616edd16368SStephen M. Cameron 		temp_name[i] = readb(&(tb->ServerName[i]));
7617edd16368SStephen M. Cameron 	temp_name[16] = '\0';
7618edd16368SStephen M. Cameron 	dev_info(dev, "   Server Name = %s\n", temp_name);
7619edd16368SStephen M. Cameron 	dev_info(dev, "   Heartbeat Counter = 0x%x\n\n\n",
7620edd16368SStephen M. Cameron 		readl(&(tb->HeartBeat)));
7621edd16368SStephen M. Cameron #endif				/* HPSA_DEBUG */
762258f8665cSStephen M. Cameron }
7623edd16368SStephen M. Cameron 
7624edd16368SStephen M. Cameron static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
7625edd16368SStephen M. Cameron {
7626edd16368SStephen M. Cameron 	int i, offset, mem_type, bar_type;
7627edd16368SStephen M. Cameron 
7628edd16368SStephen M. Cameron 	if (pci_bar_addr == PCI_BASE_ADDRESS_0)	/* looking for BAR zero? */
7629edd16368SStephen M. Cameron 		return 0;
7630edd16368SStephen M. Cameron 	offset = 0;
7631edd16368SStephen M. Cameron 	for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
7632edd16368SStephen M. Cameron 		bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
7633edd16368SStephen M. Cameron 		if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
7634edd16368SStephen M. Cameron 			offset += 4;
7635edd16368SStephen M. Cameron 		else {
7636edd16368SStephen M. Cameron 			mem_type = pci_resource_flags(pdev, i) &
7637edd16368SStephen M. Cameron 			    PCI_BASE_ADDRESS_MEM_TYPE_MASK;
7638edd16368SStephen M. Cameron 			switch (mem_type) {
7639edd16368SStephen M. Cameron 			case PCI_BASE_ADDRESS_MEM_TYPE_32:
7640edd16368SStephen M. Cameron 			case PCI_BASE_ADDRESS_MEM_TYPE_1M:
7641edd16368SStephen M. Cameron 				offset += 4;	/* 32 bit */
7642edd16368SStephen M. Cameron 				break;
7643edd16368SStephen M. Cameron 			case PCI_BASE_ADDRESS_MEM_TYPE_64:
7644edd16368SStephen M. Cameron 				offset += 8;
7645edd16368SStephen M. Cameron 				break;
7646edd16368SStephen M. Cameron 			default:	/* reserved in PCI 2.2 */
7647edd16368SStephen M. Cameron 				dev_warn(&pdev->dev,
7648edd16368SStephen M. Cameron 				       "base address is invalid\n");
7649edd16368SStephen M. Cameron 				return -1;
7650edd16368SStephen M. Cameron 				break;
7651edd16368SStephen M. Cameron 			}
7652edd16368SStephen M. Cameron 		}
7653edd16368SStephen M. Cameron 		if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
7654edd16368SStephen M. Cameron 			return i + 1;
7655edd16368SStephen M. Cameron 	}
7656edd16368SStephen M. Cameron 	return -1;
7657edd16368SStephen M. Cameron }
7658edd16368SStephen M. Cameron 
7659cc64c817SRobert Elliott static void hpsa_disable_interrupt_mode(struct ctlr_info *h)
7660cc64c817SRobert Elliott {
7661cc64c817SRobert Elliott 	if (h->msix_vector) {
7662cc64c817SRobert Elliott 		if (h->pdev->msix_enabled)
7663cc64c817SRobert Elliott 			pci_disable_msix(h->pdev);
7664105a3dbcSRobert Elliott 		h->msix_vector = 0;
7665cc64c817SRobert Elliott 	} else if (h->msi_vector) {
7666cc64c817SRobert Elliott 		if (h->pdev->msi_enabled)
7667cc64c817SRobert Elliott 			pci_disable_msi(h->pdev);
7668105a3dbcSRobert Elliott 		h->msi_vector = 0;
7669cc64c817SRobert Elliott 	}
7670cc64c817SRobert Elliott }
7671cc64c817SRobert Elliott 
7672edd16368SStephen M. Cameron /* If MSI/MSI-X is supported by the kernel we will try to enable it on
7673050f7147SStephen Cameron  * controllers that are capable. If not, we use legacy INTx mode.
7674edd16368SStephen M. Cameron  */
76756f039790SGreg Kroah-Hartman static void hpsa_interrupt_mode(struct ctlr_info *h)
7676edd16368SStephen M. Cameron {
7677edd16368SStephen M. Cameron #ifdef CONFIG_PCI_MSI
7678254f796bSMatt Gates 	int err, i;
7679254f796bSMatt Gates 	struct msix_entry hpsa_msix_entries[MAX_REPLY_QUEUES];
7680254f796bSMatt Gates 
7681254f796bSMatt Gates 	for (i = 0; i < MAX_REPLY_QUEUES; i++) {
7682254f796bSMatt Gates 		hpsa_msix_entries[i].vector = 0;
7683254f796bSMatt Gates 		hpsa_msix_entries[i].entry = i;
7684254f796bSMatt Gates 	}
7685edd16368SStephen M. Cameron 
7686edd16368SStephen M. Cameron 	/* Some boards advertise MSI but don't really support it */
76876b3f4c52SStephen M. Cameron 	if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
76886b3f4c52SStephen M. Cameron 	    (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
7689edd16368SStephen M. Cameron 		goto default_int_mode;
769055c06c71SStephen M. Cameron 	if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
7691050f7147SStephen Cameron 		dev_info(&h->pdev->dev, "MSI-X capable controller\n");
7692eee0f03aSHannes Reinecke 		h->msix_vector = MAX_REPLY_QUEUES;
7693f89439bcSStephen M. Cameron 		if (h->msix_vector > num_online_cpus())
7694f89439bcSStephen M. Cameron 			h->msix_vector = num_online_cpus();
769518fce3c4SAlexander Gordeev 		err = pci_enable_msix_range(h->pdev, hpsa_msix_entries,
769618fce3c4SAlexander Gordeev 					    1, h->msix_vector);
769718fce3c4SAlexander Gordeev 		if (err < 0) {
769818fce3c4SAlexander Gordeev 			dev_warn(&h->pdev->dev, "MSI-X init failed %d\n", err);
769918fce3c4SAlexander Gordeev 			h->msix_vector = 0;
770018fce3c4SAlexander Gordeev 			goto single_msi_mode;
770118fce3c4SAlexander Gordeev 		} else if (err < h->msix_vector) {
770255c06c71SStephen M. Cameron 			dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
7703edd16368SStephen M. Cameron 			       "available\n", err);
7704eee0f03aSHannes Reinecke 		}
770518fce3c4SAlexander Gordeev 		h->msix_vector = err;
7706eee0f03aSHannes Reinecke 		for (i = 0; i < h->msix_vector; i++)
7707eee0f03aSHannes Reinecke 			h->intr[i] = hpsa_msix_entries[i].vector;
7708eee0f03aSHannes Reinecke 		return;
7709edd16368SStephen M. Cameron 	}
771018fce3c4SAlexander Gordeev single_msi_mode:
771155c06c71SStephen M. Cameron 	if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
7712050f7147SStephen Cameron 		dev_info(&h->pdev->dev, "MSI capable controller\n");
771355c06c71SStephen M. Cameron 		if (!pci_enable_msi(h->pdev))
7714edd16368SStephen M. Cameron 			h->msi_vector = 1;
7715edd16368SStephen M. Cameron 		else
771655c06c71SStephen M. Cameron 			dev_warn(&h->pdev->dev, "MSI init failed\n");
7717edd16368SStephen M. Cameron 	}
7718edd16368SStephen M. Cameron default_int_mode:
7719edd16368SStephen M. Cameron #endif				/* CONFIG_PCI_MSI */
7720edd16368SStephen M. Cameron 	/* if we get here we're going to use the default interrupt mode */
7721a9a3a273SStephen M. Cameron 	h->intr[h->intr_mode] = h->pdev->irq;
7722edd16368SStephen M. Cameron }
7723edd16368SStephen M. Cameron 
77246f039790SGreg Kroah-Hartman static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
7725e5c880d1SStephen M. Cameron {
7726e5c880d1SStephen M. Cameron 	int i;
7727e5c880d1SStephen M. Cameron 	u32 subsystem_vendor_id, subsystem_device_id;
7728e5c880d1SStephen M. Cameron 
7729e5c880d1SStephen M. Cameron 	subsystem_vendor_id = pdev->subsystem_vendor;
7730e5c880d1SStephen M. Cameron 	subsystem_device_id = pdev->subsystem_device;
7731e5c880d1SStephen M. Cameron 	*board_id = ((subsystem_device_id << 16) & 0xffff0000) |
7732e5c880d1SStephen M. Cameron 		    subsystem_vendor_id;
7733e5c880d1SStephen M. Cameron 
7734e5c880d1SStephen M. Cameron 	for (i = 0; i < ARRAY_SIZE(products); i++)
7735e5c880d1SStephen M. Cameron 		if (*board_id == products[i].board_id)
7736e5c880d1SStephen M. Cameron 			return i;
7737e5c880d1SStephen M. Cameron 
77386798cc0aSStephen M. Cameron 	if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
77396798cc0aSStephen M. Cameron 		subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
77406798cc0aSStephen M. Cameron 		!hpsa_allow_any) {
7741e5c880d1SStephen M. Cameron 		dev_warn(&pdev->dev, "unrecognized board ID: "
7742e5c880d1SStephen M. Cameron 			"0x%08x, ignoring.\n", *board_id);
7743e5c880d1SStephen M. Cameron 			return -ENODEV;
7744e5c880d1SStephen M. Cameron 	}
7745e5c880d1SStephen M. Cameron 	return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
7746e5c880d1SStephen M. Cameron }
7747e5c880d1SStephen M. Cameron 
77486f039790SGreg Kroah-Hartman static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
77493a7774ceSStephen M. Cameron 				    unsigned long *memory_bar)
77503a7774ceSStephen M. Cameron {
77513a7774ceSStephen M. Cameron 	int i;
77523a7774ceSStephen M. Cameron 
77533a7774ceSStephen M. Cameron 	for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
775412d2cd47SStephen M. Cameron 		if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
77553a7774ceSStephen M. Cameron 			/* addressing mode bits already removed */
775612d2cd47SStephen M. Cameron 			*memory_bar = pci_resource_start(pdev, i);
775712d2cd47SStephen M. Cameron 			dev_dbg(&pdev->dev, "memory BAR = %lx\n",
77583a7774ceSStephen M. Cameron 				*memory_bar);
77593a7774ceSStephen M. Cameron 			return 0;
77603a7774ceSStephen M. Cameron 		}
776112d2cd47SStephen M. Cameron 	dev_warn(&pdev->dev, "no memory BAR found\n");
77623a7774ceSStephen M. Cameron 	return -ENODEV;
77633a7774ceSStephen M. Cameron }
77643a7774ceSStephen M. Cameron 
77656f039790SGreg Kroah-Hartman static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
77666f039790SGreg Kroah-Hartman 				     int wait_for_ready)
77672c4c8c8bSStephen M. Cameron {
7768fe5389c8SStephen M. Cameron 	int i, iterations;
77692c4c8c8bSStephen M. Cameron 	u32 scratchpad;
7770fe5389c8SStephen M. Cameron 	if (wait_for_ready)
7771fe5389c8SStephen M. Cameron 		iterations = HPSA_BOARD_READY_ITERATIONS;
7772fe5389c8SStephen M. Cameron 	else
7773fe5389c8SStephen M. Cameron 		iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
77742c4c8c8bSStephen M. Cameron 
7775fe5389c8SStephen M. Cameron 	for (i = 0; i < iterations; i++) {
7776fe5389c8SStephen M. Cameron 		scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
7777fe5389c8SStephen M. Cameron 		if (wait_for_ready) {
77782c4c8c8bSStephen M. Cameron 			if (scratchpad == HPSA_FIRMWARE_READY)
77792c4c8c8bSStephen M. Cameron 				return 0;
7780fe5389c8SStephen M. Cameron 		} else {
7781fe5389c8SStephen M. Cameron 			if (scratchpad != HPSA_FIRMWARE_READY)
7782fe5389c8SStephen M. Cameron 				return 0;
7783fe5389c8SStephen M. Cameron 		}
77842c4c8c8bSStephen M. Cameron 		msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
77852c4c8c8bSStephen M. Cameron 	}
7786fe5389c8SStephen M. Cameron 	dev_warn(&pdev->dev, "board not ready, timed out.\n");
77872c4c8c8bSStephen M. Cameron 	return -ENODEV;
77882c4c8c8bSStephen M. Cameron }
77892c4c8c8bSStephen M. Cameron 
77906f039790SGreg Kroah-Hartman static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
77916f039790SGreg Kroah-Hartman 			       u32 *cfg_base_addr, u64 *cfg_base_addr_index,
7792a51fd47fSStephen M. Cameron 			       u64 *cfg_offset)
7793a51fd47fSStephen M. Cameron {
7794a51fd47fSStephen M. Cameron 	*cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
7795a51fd47fSStephen M. Cameron 	*cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
7796a51fd47fSStephen M. Cameron 	*cfg_base_addr &= (u32) 0x0000ffff;
7797a51fd47fSStephen M. Cameron 	*cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
7798a51fd47fSStephen M. Cameron 	if (*cfg_base_addr_index == -1) {
7799a51fd47fSStephen M. Cameron 		dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
7800a51fd47fSStephen M. Cameron 		return -ENODEV;
7801a51fd47fSStephen M. Cameron 	}
7802a51fd47fSStephen M. Cameron 	return 0;
7803a51fd47fSStephen M. Cameron }
7804a51fd47fSStephen M. Cameron 
7805195f2c65SRobert Elliott static void hpsa_free_cfgtables(struct ctlr_info *h)
7806195f2c65SRobert Elliott {
7807105a3dbcSRobert Elliott 	if (h->transtable) {
7808195f2c65SRobert Elliott 		iounmap(h->transtable);
7809105a3dbcSRobert Elliott 		h->transtable = NULL;
7810105a3dbcSRobert Elliott 	}
7811105a3dbcSRobert Elliott 	if (h->cfgtable) {
7812195f2c65SRobert Elliott 		iounmap(h->cfgtable);
7813105a3dbcSRobert Elliott 		h->cfgtable = NULL;
7814105a3dbcSRobert Elliott 	}
7815195f2c65SRobert Elliott }
7816195f2c65SRobert Elliott 
7817195f2c65SRobert Elliott /* Find and map CISS config table and transfer table
7818195f2c65SRobert Elliott + * several items must be unmapped (freed) later
7819195f2c65SRobert Elliott + * */
78206f039790SGreg Kroah-Hartman static int hpsa_find_cfgtables(struct ctlr_info *h)
7821edd16368SStephen M. Cameron {
782201a02ffcSStephen M. Cameron 	u64 cfg_offset;
782301a02ffcSStephen M. Cameron 	u32 cfg_base_addr;
782401a02ffcSStephen M. Cameron 	u64 cfg_base_addr_index;
7825303932fdSDon Brace 	u32 trans_offset;
7826a51fd47fSStephen M. Cameron 	int rc;
782777c4495cSStephen M. Cameron 
7828a51fd47fSStephen M. Cameron 	rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
7829a51fd47fSStephen M. Cameron 		&cfg_base_addr_index, &cfg_offset);
7830a51fd47fSStephen M. Cameron 	if (rc)
7831a51fd47fSStephen M. Cameron 		return rc;
783277c4495cSStephen M. Cameron 	h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
7833a51fd47fSStephen M. Cameron 		       cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
7834cd3c81c4SRobert Elliott 	if (!h->cfgtable) {
7835cd3c81c4SRobert Elliott 		dev_err(&h->pdev->dev, "Failed mapping cfgtable\n");
783677c4495cSStephen M. Cameron 		return -ENOMEM;
7837cd3c81c4SRobert Elliott 	}
7838580ada3cSStephen M. Cameron 	rc = write_driver_ver_to_cfgtable(h->cfgtable);
7839580ada3cSStephen M. Cameron 	if (rc)
7840580ada3cSStephen M. Cameron 		return rc;
784177c4495cSStephen M. Cameron 	/* Find performant mode table. */
7842a51fd47fSStephen M. Cameron 	trans_offset = readl(&h->cfgtable->TransMethodOffset);
784377c4495cSStephen M. Cameron 	h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
784477c4495cSStephen M. Cameron 				cfg_base_addr_index)+cfg_offset+trans_offset,
784577c4495cSStephen M. Cameron 				sizeof(*h->transtable));
7846195f2c65SRobert Elliott 	if (!h->transtable) {
7847195f2c65SRobert Elliott 		dev_err(&h->pdev->dev, "Failed mapping transfer table\n");
7848195f2c65SRobert Elliott 		hpsa_free_cfgtables(h);
784977c4495cSStephen M. Cameron 		return -ENOMEM;
7850195f2c65SRobert Elliott 	}
785177c4495cSStephen M. Cameron 	return 0;
785277c4495cSStephen M. Cameron }
785377c4495cSStephen M. Cameron 
78546f039790SGreg Kroah-Hartman static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
7855cba3d38bSStephen M. Cameron {
785641ce4c35SStephen Cameron #define MIN_MAX_COMMANDS 16
785741ce4c35SStephen Cameron 	BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS);
785841ce4c35SStephen Cameron 
785941ce4c35SStephen Cameron 	h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands);
786072ceeaecSStephen M. Cameron 
786172ceeaecSStephen M. Cameron 	/* Limit commands in memory limited kdump scenario. */
786272ceeaecSStephen M. Cameron 	if (reset_devices && h->max_commands > 32)
786372ceeaecSStephen M. Cameron 		h->max_commands = 32;
786472ceeaecSStephen M. Cameron 
786541ce4c35SStephen Cameron 	if (h->max_commands < MIN_MAX_COMMANDS) {
786641ce4c35SStephen Cameron 		dev_warn(&h->pdev->dev,
786741ce4c35SStephen Cameron 			"Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n",
786841ce4c35SStephen Cameron 			h->max_commands,
786941ce4c35SStephen Cameron 			MIN_MAX_COMMANDS);
787041ce4c35SStephen Cameron 		h->max_commands = MIN_MAX_COMMANDS;
7871cba3d38bSStephen M. Cameron 	}
7872cba3d38bSStephen M. Cameron }
7873cba3d38bSStephen M. Cameron 
7874c7ee65b3SWebb Scales /* If the controller reports that the total max sg entries is greater than 512,
7875c7ee65b3SWebb Scales  * then we know that chained SG blocks work.  (Original smart arrays did not
7876c7ee65b3SWebb Scales  * support chained SG blocks and would return zero for max sg entries.)
7877c7ee65b3SWebb Scales  */
7878c7ee65b3SWebb Scales static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h)
7879c7ee65b3SWebb Scales {
7880c7ee65b3SWebb Scales 	return h->maxsgentries > 512;
7881c7ee65b3SWebb Scales }
7882c7ee65b3SWebb Scales 
7883b93d7536SStephen M. Cameron /* Interrogate the hardware for some limits:
7884b93d7536SStephen M. Cameron  * max commands, max SG elements without chaining, and with chaining,
7885b93d7536SStephen M. Cameron  * SG chain block size, etc.
7886b93d7536SStephen M. Cameron  */
78876f039790SGreg Kroah-Hartman static void hpsa_find_board_params(struct ctlr_info *h)
7888b93d7536SStephen M. Cameron {
7889cba3d38bSStephen M. Cameron 	hpsa_get_max_perf_mode_cmds(h);
789045fcb86eSStephen Cameron 	h->nr_cmds = h->max_commands;
7891b93d7536SStephen M. Cameron 	h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
7892283b4a9bSStephen M. Cameron 	h->fw_support = readl(&(h->cfgtable->misc_fw_support));
7893c7ee65b3SWebb Scales 	if (hpsa_supports_chained_sg_blocks(h)) {
7894c7ee65b3SWebb Scales 		/* Limit in-command s/g elements to 32 save dma'able memory. */
7895b93d7536SStephen M. Cameron 		h->max_cmd_sg_entries = 32;
78961a63ea6fSWebb Scales 		h->chainsize = h->maxsgentries - h->max_cmd_sg_entries;
7897b93d7536SStephen M. Cameron 		h->maxsgentries--; /* save one for chain pointer */
7898b93d7536SStephen M. Cameron 	} else {
7899c7ee65b3SWebb Scales 		/*
7900c7ee65b3SWebb Scales 		 * Original smart arrays supported at most 31 s/g entries
7901c7ee65b3SWebb Scales 		 * embedded inline in the command (trying to use more
7902c7ee65b3SWebb Scales 		 * would lock up the controller)
7903c7ee65b3SWebb Scales 		 */
7904c7ee65b3SWebb Scales 		h->max_cmd_sg_entries = 31;
79051a63ea6fSWebb Scales 		h->maxsgentries = 31; /* default to traditional values */
7906c7ee65b3SWebb Scales 		h->chainsize = 0;
7907b93d7536SStephen M. Cameron 	}
790875167d2cSStephen M. Cameron 
790975167d2cSStephen M. Cameron 	/* Find out what task management functions are supported and cache */
791075167d2cSStephen M. Cameron 	h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags));
79110e7a7fceSScott Teel 	if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags))
79120e7a7fceSScott Teel 		dev_warn(&h->pdev->dev, "Physical aborts not supported\n");
79130e7a7fceSScott Teel 	if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
79140e7a7fceSScott Teel 		dev_warn(&h->pdev->dev, "Logical aborts not supported\n");
79158be986ccSStephen Cameron 	if (!(HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags))
79168be986ccSStephen Cameron 		dev_warn(&h->pdev->dev, "HP SSD Smart Path aborts not supported\n");
7917b93d7536SStephen M. Cameron }
7918b93d7536SStephen M. Cameron 
791976c46e49SStephen M. Cameron static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
792076c46e49SStephen M. Cameron {
79210fc9fd40SAkinobu Mita 	if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
7922050f7147SStephen Cameron 		dev_err(&h->pdev->dev, "not a valid CISS config table\n");
792376c46e49SStephen M. Cameron 		return false;
792476c46e49SStephen M. Cameron 	}
792576c46e49SStephen M. Cameron 	return true;
792676c46e49SStephen M. Cameron }
792776c46e49SStephen M. Cameron 
792897a5e98cSStephen M. Cameron static inline void hpsa_set_driver_support_bits(struct ctlr_info *h)
7929f7c39101SStephen M. Cameron {
793097a5e98cSStephen M. Cameron 	u32 driver_support;
7931f7c39101SStephen M. Cameron 
793297a5e98cSStephen M. Cameron 	driver_support = readl(&(h->cfgtable->driver_support));
79330b9e7b74SArnd Bergmann 	/* Need to enable prefetch in the SCSI core for 6400 in x86 */
79340b9e7b74SArnd Bergmann #ifdef CONFIG_X86
793597a5e98cSStephen M. Cameron 	driver_support |= ENABLE_SCSI_PREFETCH;
7936f7c39101SStephen M. Cameron #endif
793728e13446SStephen M. Cameron 	driver_support |= ENABLE_UNIT_ATTN;
793828e13446SStephen M. Cameron 	writel(driver_support, &(h->cfgtable->driver_support));
7939f7c39101SStephen M. Cameron }
7940f7c39101SStephen M. Cameron 
79413d0eab67SStephen M. Cameron /* Disable DMA prefetch for the P600.  Otherwise an ASIC bug may result
79423d0eab67SStephen M. Cameron  * in a prefetch beyond physical memory.
79433d0eab67SStephen M. Cameron  */
79443d0eab67SStephen M. Cameron static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
79453d0eab67SStephen M. Cameron {
79463d0eab67SStephen M. Cameron 	u32 dma_prefetch;
79473d0eab67SStephen M. Cameron 
79483d0eab67SStephen M. Cameron 	if (h->board_id != 0x3225103C)
79493d0eab67SStephen M. Cameron 		return;
79503d0eab67SStephen M. Cameron 	dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
79513d0eab67SStephen M. Cameron 	dma_prefetch |= 0x8000;
79523d0eab67SStephen M. Cameron 	writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
79533d0eab67SStephen M. Cameron }
79543d0eab67SStephen M. Cameron 
7955c706a795SRobert Elliott static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h)
795676438d08SStephen M. Cameron {
795776438d08SStephen M. Cameron 	int i;
795876438d08SStephen M. Cameron 	u32 doorbell_value;
795976438d08SStephen M. Cameron 	unsigned long flags;
796076438d08SStephen M. Cameron 	/* wait until the clear_event_notify bit 6 is cleared by controller. */
7961007e7aa9SRobert Elliott 	for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) {
796276438d08SStephen M. Cameron 		spin_lock_irqsave(&h->lock, flags);
796376438d08SStephen M. Cameron 		doorbell_value = readl(h->vaddr + SA5_DOORBELL);
796476438d08SStephen M. Cameron 		spin_unlock_irqrestore(&h->lock, flags);
796576438d08SStephen M. Cameron 		if (!(doorbell_value & DOORBELL_CLEAR_EVENTS))
7966c706a795SRobert Elliott 			goto done;
796776438d08SStephen M. Cameron 		/* delay and try again */
7968007e7aa9SRobert Elliott 		msleep(CLEAR_EVENT_WAIT_INTERVAL);
796976438d08SStephen M. Cameron 	}
7970c706a795SRobert Elliott 	return -ENODEV;
7971c706a795SRobert Elliott done:
7972c706a795SRobert Elliott 	return 0;
797376438d08SStephen M. Cameron }
797476438d08SStephen M. Cameron 
7975c706a795SRobert Elliott static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
7976eb6b2ae9SStephen M. Cameron {
7977eb6b2ae9SStephen M. Cameron 	int i;
79786eaf46fdSStephen M. Cameron 	u32 doorbell_value;
79796eaf46fdSStephen M. Cameron 	unsigned long flags;
7980eb6b2ae9SStephen M. Cameron 
7981eb6b2ae9SStephen M. Cameron 	/* under certain very rare conditions, this can take awhile.
7982eb6b2ae9SStephen M. Cameron 	 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
7983eb6b2ae9SStephen M. Cameron 	 * as we enter this code.)
7984eb6b2ae9SStephen M. Cameron 	 */
7985007e7aa9SRobert Elliott 	for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) {
798625163bd5SWebb Scales 		if (h->remove_in_progress)
798725163bd5SWebb Scales 			goto done;
79886eaf46fdSStephen M. Cameron 		spin_lock_irqsave(&h->lock, flags);
79896eaf46fdSStephen M. Cameron 		doorbell_value = readl(h->vaddr + SA5_DOORBELL);
79906eaf46fdSStephen M. Cameron 		spin_unlock_irqrestore(&h->lock, flags);
7991382be668SDan Carpenter 		if (!(doorbell_value & CFGTBL_ChangeReq))
7992c706a795SRobert Elliott 			goto done;
7993eb6b2ae9SStephen M. Cameron 		/* delay and try again */
7994007e7aa9SRobert Elliott 		msleep(MODE_CHANGE_WAIT_INTERVAL);
7995eb6b2ae9SStephen M. Cameron 	}
7996c706a795SRobert Elliott 	return -ENODEV;
7997c706a795SRobert Elliott done:
7998c706a795SRobert Elliott 	return 0;
79993f4336f3SStephen M. Cameron }
80003f4336f3SStephen M. Cameron 
8001c706a795SRobert Elliott /* return -ENODEV or other reason on error, 0 on success */
80026f039790SGreg Kroah-Hartman static int hpsa_enter_simple_mode(struct ctlr_info *h)
80033f4336f3SStephen M. Cameron {
80043f4336f3SStephen M. Cameron 	u32 trans_support;
80053f4336f3SStephen M. Cameron 
80063f4336f3SStephen M. Cameron 	trans_support = readl(&(h->cfgtable->TransportSupport));
80073f4336f3SStephen M. Cameron 	if (!(trans_support & SIMPLE_MODE))
80083f4336f3SStephen M. Cameron 		return -ENOTSUPP;
80093f4336f3SStephen M. Cameron 
80103f4336f3SStephen M. Cameron 	h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
8011283b4a9bSStephen M. Cameron 
80123f4336f3SStephen M. Cameron 	/* Update the field, and then ring the doorbell */
80133f4336f3SStephen M. Cameron 	writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
8014b9af4937SStephen M. Cameron 	writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
80153f4336f3SStephen M. Cameron 	writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
8016c706a795SRobert Elliott 	if (hpsa_wait_for_mode_change_ack(h))
8017c706a795SRobert Elliott 		goto error;
8018eb6b2ae9SStephen M. Cameron 	print_cfg_table(&h->pdev->dev, h->cfgtable);
8019283b4a9bSStephen M. Cameron 	if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple))
8020283b4a9bSStephen M. Cameron 		goto error;
8021960a30e7SStephen M. Cameron 	h->transMethod = CFGTBL_Trans_Simple;
8022eb6b2ae9SStephen M. Cameron 	return 0;
8023283b4a9bSStephen M. Cameron error:
8024050f7147SStephen Cameron 	dev_err(&h->pdev->dev, "failed to enter simple mode\n");
8025283b4a9bSStephen M. Cameron 	return -ENODEV;
8026eb6b2ae9SStephen M. Cameron }
8027eb6b2ae9SStephen M. Cameron 
8028195f2c65SRobert Elliott /* free items allocated or mapped by hpsa_pci_init */
8029195f2c65SRobert Elliott static void hpsa_free_pci_init(struct ctlr_info *h)
8030195f2c65SRobert Elliott {
8031195f2c65SRobert Elliott 	hpsa_free_cfgtables(h);			/* pci_init 4 */
8032195f2c65SRobert Elliott 	iounmap(h->vaddr);			/* pci_init 3 */
8033105a3dbcSRobert Elliott 	h->vaddr = NULL;
8034195f2c65SRobert Elliott 	hpsa_disable_interrupt_mode(h);		/* pci_init 2 */
8035943a7021SRobert Elliott 	/*
8036943a7021SRobert Elliott 	 * call pci_disable_device before pci_release_regions per
8037943a7021SRobert Elliott 	 * Documentation/PCI/pci.txt
8038943a7021SRobert Elliott 	 */
8039195f2c65SRobert Elliott 	pci_disable_device(h->pdev);		/* pci_init 1 */
8040943a7021SRobert Elliott 	pci_release_regions(h->pdev);		/* pci_init 2 */
8041195f2c65SRobert Elliott }
8042195f2c65SRobert Elliott 
8043195f2c65SRobert Elliott /* several items must be freed later */
80446f039790SGreg Kroah-Hartman static int hpsa_pci_init(struct ctlr_info *h)
804577c4495cSStephen M. Cameron {
8046eb6b2ae9SStephen M. Cameron 	int prod_index, err;
8047edd16368SStephen M. Cameron 
8048e5c880d1SStephen M. Cameron 	prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
8049e5c880d1SStephen M. Cameron 	if (prod_index < 0)
805060f923b9SRobert Elliott 		return prod_index;
8051e5c880d1SStephen M. Cameron 	h->product_name = products[prod_index].product_name;
8052e5c880d1SStephen M. Cameron 	h->access = *(products[prod_index].access);
8053e5c880d1SStephen M. Cameron 
80549b5c48c2SStephen Cameron 	h->needs_abort_tags_swizzled =
80559b5c48c2SStephen Cameron 		ctlr_needs_abort_tags_swizzled(h->board_id);
80569b5c48c2SStephen Cameron 
8057e5a44df8SMatthew Garrett 	pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
8058e5a44df8SMatthew Garrett 			       PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
8059e5a44df8SMatthew Garrett 
806055c06c71SStephen M. Cameron 	err = pci_enable_device(h->pdev);
8061edd16368SStephen M. Cameron 	if (err) {
8062195f2c65SRobert Elliott 		dev_err(&h->pdev->dev, "failed to enable PCI device\n");
8063943a7021SRobert Elliott 		pci_disable_device(h->pdev);
8064edd16368SStephen M. Cameron 		return err;
8065edd16368SStephen M. Cameron 	}
8066edd16368SStephen M. Cameron 
8067f79cfec6SStephen M. Cameron 	err = pci_request_regions(h->pdev, HPSA);
8068edd16368SStephen M. Cameron 	if (err) {
806955c06c71SStephen M. Cameron 		dev_err(&h->pdev->dev,
8070195f2c65SRobert Elliott 			"failed to obtain PCI resources\n");
8071943a7021SRobert Elliott 		pci_disable_device(h->pdev);
8072943a7021SRobert Elliott 		return err;
8073edd16368SStephen M. Cameron 	}
80744fa604e1SRobert Elliott 
80754fa604e1SRobert Elliott 	pci_set_master(h->pdev);
80764fa604e1SRobert Elliott 
80776b3f4c52SStephen M. Cameron 	hpsa_interrupt_mode(h);
807812d2cd47SStephen M. Cameron 	err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
80793a7774ceSStephen M. Cameron 	if (err)
8080195f2c65SRobert Elliott 		goto clean2;	/* intmode+region, pci */
8081edd16368SStephen M. Cameron 	h->vaddr = remap_pci_mem(h->paddr, 0x250);
8082204892e9SStephen M. Cameron 	if (!h->vaddr) {
8083195f2c65SRobert Elliott 		dev_err(&h->pdev->dev, "failed to remap PCI mem\n");
8084204892e9SStephen M. Cameron 		err = -ENOMEM;
8085195f2c65SRobert Elliott 		goto clean2;	/* intmode+region, pci */
8086204892e9SStephen M. Cameron 	}
8087fe5389c8SStephen M. Cameron 	err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
80882c4c8c8bSStephen M. Cameron 	if (err)
8089195f2c65SRobert Elliott 		goto clean3;	/* vaddr, intmode+region, pci */
809077c4495cSStephen M. Cameron 	err = hpsa_find_cfgtables(h);
809177c4495cSStephen M. Cameron 	if (err)
8092195f2c65SRobert Elliott 		goto clean3;	/* vaddr, intmode+region, pci */
8093b93d7536SStephen M. Cameron 	hpsa_find_board_params(h);
8094edd16368SStephen M. Cameron 
809576c46e49SStephen M. Cameron 	if (!hpsa_CISS_signature_present(h)) {
8096edd16368SStephen M. Cameron 		err = -ENODEV;
8097195f2c65SRobert Elliott 		goto clean4;	/* cfgtables, vaddr, intmode+region, pci */
8098edd16368SStephen M. Cameron 	}
809997a5e98cSStephen M. Cameron 	hpsa_set_driver_support_bits(h);
81003d0eab67SStephen M. Cameron 	hpsa_p600_dma_prefetch_quirk(h);
8101eb6b2ae9SStephen M. Cameron 	err = hpsa_enter_simple_mode(h);
8102eb6b2ae9SStephen M. Cameron 	if (err)
8103195f2c65SRobert Elliott 		goto clean4;	/* cfgtables, vaddr, intmode+region, pci */
8104edd16368SStephen M. Cameron 	return 0;
8105edd16368SStephen M. Cameron 
8106195f2c65SRobert Elliott clean4:	/* cfgtables, vaddr, intmode+region, pci */
8107195f2c65SRobert Elliott 	hpsa_free_cfgtables(h);
8108195f2c65SRobert Elliott clean3:	/* vaddr, intmode+region, pci */
8109204892e9SStephen M. Cameron 	iounmap(h->vaddr);
8110105a3dbcSRobert Elliott 	h->vaddr = NULL;
8111195f2c65SRobert Elliott clean2:	/* intmode+region, pci */
8112195f2c65SRobert Elliott 	hpsa_disable_interrupt_mode(h);
8113943a7021SRobert Elliott 	/*
8114943a7021SRobert Elliott 	 * call pci_disable_device before pci_release_regions per
8115943a7021SRobert Elliott 	 * Documentation/PCI/pci.txt
8116943a7021SRobert Elliott 	 */
8117195f2c65SRobert Elliott 	pci_disable_device(h->pdev);
8118943a7021SRobert Elliott 	pci_release_regions(h->pdev);
8119edd16368SStephen M. Cameron 	return err;
8120edd16368SStephen M. Cameron }
8121edd16368SStephen M. Cameron 
81226f039790SGreg Kroah-Hartman static void hpsa_hba_inquiry(struct ctlr_info *h)
8123339b2b14SStephen M. Cameron {
8124339b2b14SStephen M. Cameron 	int rc;
8125339b2b14SStephen M. Cameron 
8126339b2b14SStephen M. Cameron #define HBA_INQUIRY_BYTE_COUNT 64
8127339b2b14SStephen M. Cameron 	h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
8128339b2b14SStephen M. Cameron 	if (!h->hba_inquiry_data)
8129339b2b14SStephen M. Cameron 		return;
8130339b2b14SStephen M. Cameron 	rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
8131339b2b14SStephen M. Cameron 		h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
8132339b2b14SStephen M. Cameron 	if (rc != 0) {
8133339b2b14SStephen M. Cameron 		kfree(h->hba_inquiry_data);
8134339b2b14SStephen M. Cameron 		h->hba_inquiry_data = NULL;
8135339b2b14SStephen M. Cameron 	}
8136339b2b14SStephen M. Cameron }
8137339b2b14SStephen M. Cameron 
81386b6c1cd7STomas Henzl static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id)
8139edd16368SStephen M. Cameron {
81401df8552aSStephen M. Cameron 	int rc, i;
81413b747298STomas Henzl 	void __iomem *vaddr;
8142edd16368SStephen M. Cameron 
81434c2a8c40SStephen M. Cameron 	if (!reset_devices)
81444c2a8c40SStephen M. Cameron 		return 0;
81454c2a8c40SStephen M. Cameron 
8146132aa220STomas Henzl 	/* kdump kernel is loading, we don't know in which state is
8147132aa220STomas Henzl 	 * the pci interface. The dev->enable_cnt is equal zero
8148132aa220STomas Henzl 	 * so we call enable+disable, wait a while and switch it on.
8149132aa220STomas Henzl 	 */
8150132aa220STomas Henzl 	rc = pci_enable_device(pdev);
8151132aa220STomas Henzl 	if (rc) {
8152132aa220STomas Henzl 		dev_warn(&pdev->dev, "Failed to enable PCI device\n");
8153132aa220STomas Henzl 		return -ENODEV;
8154132aa220STomas Henzl 	}
8155132aa220STomas Henzl 	pci_disable_device(pdev);
8156132aa220STomas Henzl 	msleep(260);			/* a randomly chosen number */
8157132aa220STomas Henzl 	rc = pci_enable_device(pdev);
8158132aa220STomas Henzl 	if (rc) {
8159132aa220STomas Henzl 		dev_warn(&pdev->dev, "failed to enable device.\n");
8160132aa220STomas Henzl 		return -ENODEV;
8161132aa220STomas Henzl 	}
81624fa604e1SRobert Elliott 
8163859c75abSTomas Henzl 	pci_set_master(pdev);
81644fa604e1SRobert Elliott 
81653b747298STomas Henzl 	vaddr = pci_ioremap_bar(pdev, 0);
81663b747298STomas Henzl 	if (vaddr == NULL) {
81673b747298STomas Henzl 		rc = -ENOMEM;
81683b747298STomas Henzl 		goto out_disable;
81693b747298STomas Henzl 	}
81703b747298STomas Henzl 	writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET);
81713b747298STomas Henzl 	iounmap(vaddr);
81723b747298STomas Henzl 
81731df8552aSStephen M. Cameron 	/* Reset the controller with a PCI power-cycle or via doorbell */
81746b6c1cd7STomas Henzl 	rc = hpsa_kdump_hard_reset_controller(pdev, board_id);
8175edd16368SStephen M. Cameron 
81761df8552aSStephen M. Cameron 	/* -ENOTSUPP here means we cannot reset the controller
81771df8552aSStephen M. Cameron 	 * but it's already (and still) up and running in
817818867659SStephen M. Cameron 	 * "performant mode".  Or, it might be 640x, which can't reset
817918867659SStephen M. Cameron 	 * due to concerns about shared bbwc between 6402/6404 pair.
81801df8552aSStephen M. Cameron 	 */
8181adf1b3a3SRobert Elliott 	if (rc)
8182132aa220STomas Henzl 		goto out_disable;
8183edd16368SStephen M. Cameron 
8184edd16368SStephen M. Cameron 	/* Now try to get the controller to respond to a no-op */
81851ba66c9cSRobert Elliott 	dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n");
8186edd16368SStephen M. Cameron 	for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
8187edd16368SStephen M. Cameron 		if (hpsa_noop(pdev) == 0)
8188edd16368SStephen M. Cameron 			break;
8189edd16368SStephen M. Cameron 		else
8190edd16368SStephen M. Cameron 			dev_warn(&pdev->dev, "no-op failed%s\n",
8191edd16368SStephen M. Cameron 					(i < 11 ? "; re-trying" : ""));
8192edd16368SStephen M. Cameron 	}
8193132aa220STomas Henzl 
8194132aa220STomas Henzl out_disable:
8195132aa220STomas Henzl 
8196132aa220STomas Henzl 	pci_disable_device(pdev);
8197132aa220STomas Henzl 	return rc;
8198edd16368SStephen M. Cameron }
8199edd16368SStephen M. Cameron 
82001fb7c98aSRobert Elliott static void hpsa_free_cmd_pool(struct ctlr_info *h)
82011fb7c98aSRobert Elliott {
82021fb7c98aSRobert Elliott 	kfree(h->cmd_pool_bits);
8203105a3dbcSRobert Elliott 	h->cmd_pool_bits = NULL;
8204105a3dbcSRobert Elliott 	if (h->cmd_pool) {
82051fb7c98aSRobert Elliott 		pci_free_consistent(h->pdev,
82061fb7c98aSRobert Elliott 				h->nr_cmds * sizeof(struct CommandList),
82071fb7c98aSRobert Elliott 				h->cmd_pool,
82081fb7c98aSRobert Elliott 				h->cmd_pool_dhandle);
8209105a3dbcSRobert Elliott 		h->cmd_pool = NULL;
8210105a3dbcSRobert Elliott 		h->cmd_pool_dhandle = 0;
8211105a3dbcSRobert Elliott 	}
8212105a3dbcSRobert Elliott 	if (h->errinfo_pool) {
82131fb7c98aSRobert Elliott 		pci_free_consistent(h->pdev,
82141fb7c98aSRobert Elliott 				h->nr_cmds * sizeof(struct ErrorInfo),
82151fb7c98aSRobert Elliott 				h->errinfo_pool,
82161fb7c98aSRobert Elliott 				h->errinfo_pool_dhandle);
8217105a3dbcSRobert Elliott 		h->errinfo_pool = NULL;
8218105a3dbcSRobert Elliott 		h->errinfo_pool_dhandle = 0;
8219105a3dbcSRobert Elliott 	}
82201fb7c98aSRobert Elliott }
82211fb7c98aSRobert Elliott 
8222d37ffbe4SRobert Elliott static int hpsa_alloc_cmd_pool(struct ctlr_info *h)
82232e9d1b36SStephen M. Cameron {
82242e9d1b36SStephen M. Cameron 	h->cmd_pool_bits = kzalloc(
82252e9d1b36SStephen M. Cameron 		DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
82262e9d1b36SStephen M. Cameron 		sizeof(unsigned long), GFP_KERNEL);
82272e9d1b36SStephen M. Cameron 	h->cmd_pool = pci_alloc_consistent(h->pdev,
82282e9d1b36SStephen M. Cameron 		    h->nr_cmds * sizeof(*h->cmd_pool),
82292e9d1b36SStephen M. Cameron 		    &(h->cmd_pool_dhandle));
82302e9d1b36SStephen M. Cameron 	h->errinfo_pool = pci_alloc_consistent(h->pdev,
82312e9d1b36SStephen M. Cameron 		    h->nr_cmds * sizeof(*h->errinfo_pool),
82322e9d1b36SStephen M. Cameron 		    &(h->errinfo_pool_dhandle));
82332e9d1b36SStephen M. Cameron 	if ((h->cmd_pool_bits == NULL)
82342e9d1b36SStephen M. Cameron 	    || (h->cmd_pool == NULL)
82352e9d1b36SStephen M. Cameron 	    || (h->errinfo_pool == NULL)) {
82362e9d1b36SStephen M. Cameron 		dev_err(&h->pdev->dev, "out of memory in %s", __func__);
82372c143342SRobert Elliott 		goto clean_up;
82382e9d1b36SStephen M. Cameron 	}
8239360c73bdSStephen Cameron 	hpsa_preinitialize_commands(h);
82402e9d1b36SStephen M. Cameron 	return 0;
82412c143342SRobert Elliott clean_up:
82422c143342SRobert Elliott 	hpsa_free_cmd_pool(h);
82432c143342SRobert Elliott 	return -ENOMEM;
82442e9d1b36SStephen M. Cameron }
82452e9d1b36SStephen M. Cameron 
824641b3cf08SStephen M. Cameron static void hpsa_irq_affinity_hints(struct ctlr_info *h)
824741b3cf08SStephen M. Cameron {
8248ec429952SFabian Frederick 	int i, cpu;
824941b3cf08SStephen M. Cameron 
825041b3cf08SStephen M. Cameron 	cpu = cpumask_first(cpu_online_mask);
825141b3cf08SStephen M. Cameron 	for (i = 0; i < h->msix_vector; i++) {
8252ec429952SFabian Frederick 		irq_set_affinity_hint(h->intr[i], get_cpu_mask(cpu));
825341b3cf08SStephen M. Cameron 		cpu = cpumask_next(cpu, cpu_online_mask);
825441b3cf08SStephen M. Cameron 	}
825541b3cf08SStephen M. Cameron }
825641b3cf08SStephen M. Cameron 
8257ec501a18SRobert Elliott /* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */
8258ec501a18SRobert Elliott static void hpsa_free_irqs(struct ctlr_info *h)
8259ec501a18SRobert Elliott {
8260ec501a18SRobert Elliott 	int i;
8261ec501a18SRobert Elliott 
8262ec501a18SRobert Elliott 	if (!h->msix_vector || h->intr_mode != PERF_MODE_INT) {
8263ec501a18SRobert Elliott 		/* Single reply queue, only one irq to free */
8264ec501a18SRobert Elliott 		i = h->intr_mode;
8265ec501a18SRobert Elliott 		irq_set_affinity_hint(h->intr[i], NULL);
8266ec501a18SRobert Elliott 		free_irq(h->intr[i], &h->q[i]);
8267105a3dbcSRobert Elliott 		h->q[i] = 0;
8268ec501a18SRobert Elliott 		return;
8269ec501a18SRobert Elliott 	}
8270ec501a18SRobert Elliott 
8271ec501a18SRobert Elliott 	for (i = 0; i < h->msix_vector; i++) {
8272ec501a18SRobert Elliott 		irq_set_affinity_hint(h->intr[i], NULL);
8273ec501a18SRobert Elliott 		free_irq(h->intr[i], &h->q[i]);
8274105a3dbcSRobert Elliott 		h->q[i] = 0;
8275ec501a18SRobert Elliott 	}
8276a4e17fc1SRobert Elliott 	for (; i < MAX_REPLY_QUEUES; i++)
8277a4e17fc1SRobert Elliott 		h->q[i] = 0;
8278ec501a18SRobert Elliott }
8279ec501a18SRobert Elliott 
82809ee61794SRobert Elliott /* returns 0 on success; cleans up and returns -Enn on error */
82819ee61794SRobert Elliott static int hpsa_request_irqs(struct ctlr_info *h,
82820ae01a32SStephen M. Cameron 	irqreturn_t (*msixhandler)(int, void *),
82830ae01a32SStephen M. Cameron 	irqreturn_t (*intxhandler)(int, void *))
82840ae01a32SStephen M. Cameron {
8285254f796bSMatt Gates 	int rc, i;
82860ae01a32SStephen M. Cameron 
8287254f796bSMatt Gates 	/*
8288254f796bSMatt Gates 	 * initialize h->q[x] = x so that interrupt handlers know which
8289254f796bSMatt Gates 	 * queue to process.
8290254f796bSMatt Gates 	 */
8291254f796bSMatt Gates 	for (i = 0; i < MAX_REPLY_QUEUES; i++)
8292254f796bSMatt Gates 		h->q[i] = (u8) i;
8293254f796bSMatt Gates 
8294eee0f03aSHannes Reinecke 	if (h->intr_mode == PERF_MODE_INT && h->msix_vector > 0) {
8295254f796bSMatt Gates 		/* If performant mode and MSI-X, use multiple reply queues */
8296a4e17fc1SRobert Elliott 		for (i = 0; i < h->msix_vector; i++) {
82978b47004aSRobert Elliott 			sprintf(h->intrname[i], "%s-msix%d", h->devname, i);
8298254f796bSMatt Gates 			rc = request_irq(h->intr[i], msixhandler,
82998b47004aSRobert Elliott 					0, h->intrname[i],
8300254f796bSMatt Gates 					&h->q[i]);
8301a4e17fc1SRobert Elliott 			if (rc) {
8302a4e17fc1SRobert Elliott 				int j;
8303a4e17fc1SRobert Elliott 
8304a4e17fc1SRobert Elliott 				dev_err(&h->pdev->dev,
8305a4e17fc1SRobert Elliott 					"failed to get irq %d for %s\n",
8306a4e17fc1SRobert Elliott 				       h->intr[i], h->devname);
8307a4e17fc1SRobert Elliott 				for (j = 0; j < i; j++) {
8308a4e17fc1SRobert Elliott 					free_irq(h->intr[j], &h->q[j]);
8309a4e17fc1SRobert Elliott 					h->q[j] = 0;
8310a4e17fc1SRobert Elliott 				}
8311a4e17fc1SRobert Elliott 				for (; j < MAX_REPLY_QUEUES; j++)
8312a4e17fc1SRobert Elliott 					h->q[j] = 0;
8313a4e17fc1SRobert Elliott 				return rc;
8314a4e17fc1SRobert Elliott 			}
8315a4e17fc1SRobert Elliott 		}
831641b3cf08SStephen M. Cameron 		hpsa_irq_affinity_hints(h);
8317254f796bSMatt Gates 	} else {
8318254f796bSMatt Gates 		/* Use single reply pool */
8319eee0f03aSHannes Reinecke 		if (h->msix_vector > 0 || h->msi_vector) {
83208b47004aSRobert Elliott 			if (h->msix_vector)
83218b47004aSRobert Elliott 				sprintf(h->intrname[h->intr_mode],
83228b47004aSRobert Elliott 					"%s-msix", h->devname);
83238b47004aSRobert Elliott 			else
83248b47004aSRobert Elliott 				sprintf(h->intrname[h->intr_mode],
83258b47004aSRobert Elliott 					"%s-msi", h->devname);
8326254f796bSMatt Gates 			rc = request_irq(h->intr[h->intr_mode],
83278b47004aSRobert Elliott 				msixhandler, 0,
83288b47004aSRobert Elliott 				h->intrname[h->intr_mode],
8329254f796bSMatt Gates 				&h->q[h->intr_mode]);
8330254f796bSMatt Gates 		} else {
83318b47004aSRobert Elliott 			sprintf(h->intrname[h->intr_mode],
83328b47004aSRobert Elliott 				"%s-intx", h->devname);
8333254f796bSMatt Gates 			rc = request_irq(h->intr[h->intr_mode],
83348b47004aSRobert Elliott 				intxhandler, IRQF_SHARED,
83358b47004aSRobert Elliott 				h->intrname[h->intr_mode],
8336254f796bSMatt Gates 				&h->q[h->intr_mode]);
8337254f796bSMatt Gates 		}
8338105a3dbcSRobert Elliott 		irq_set_affinity_hint(h->intr[h->intr_mode], NULL);
8339254f796bSMatt Gates 	}
83400ae01a32SStephen M. Cameron 	if (rc) {
8341195f2c65SRobert Elliott 		dev_err(&h->pdev->dev, "failed to get irq %d for %s\n",
83420ae01a32SStephen M. Cameron 		       h->intr[h->intr_mode], h->devname);
8343195f2c65SRobert Elliott 		hpsa_free_irqs(h);
83440ae01a32SStephen M. Cameron 		return -ENODEV;
83450ae01a32SStephen M. Cameron 	}
83460ae01a32SStephen M. Cameron 	return 0;
83470ae01a32SStephen M. Cameron }
83480ae01a32SStephen M. Cameron 
83496f039790SGreg Kroah-Hartman static int hpsa_kdump_soft_reset(struct ctlr_info *h)
835064670ac8SStephen M. Cameron {
835139c53f55SRobert Elliott 	int rc;
8352bf43caf3SRobert Elliott 	hpsa_send_host_reset(h, RAID_CTLR_LUNID, HPSA_RESET_TYPE_CONTROLLER);
835364670ac8SStephen M. Cameron 
835464670ac8SStephen M. Cameron 	dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
835539c53f55SRobert Elliott 	rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY);
835639c53f55SRobert Elliott 	if (rc) {
835764670ac8SStephen M. Cameron 		dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
835839c53f55SRobert Elliott 		return rc;
835964670ac8SStephen M. Cameron 	}
836064670ac8SStephen M. Cameron 
836164670ac8SStephen M. Cameron 	dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
836239c53f55SRobert Elliott 	rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
836339c53f55SRobert Elliott 	if (rc) {
836464670ac8SStephen M. Cameron 		dev_warn(&h->pdev->dev, "Board failed to become ready "
836564670ac8SStephen M. Cameron 			"after soft reset.\n");
836639c53f55SRobert Elliott 		return rc;
836764670ac8SStephen M. Cameron 	}
836864670ac8SStephen M. Cameron 
836964670ac8SStephen M. Cameron 	return 0;
837064670ac8SStephen M. Cameron }
837164670ac8SStephen M. Cameron 
8372072b0518SStephen M. Cameron static void hpsa_free_reply_queues(struct ctlr_info *h)
8373072b0518SStephen M. Cameron {
8374072b0518SStephen M. Cameron 	int i;
8375072b0518SStephen M. Cameron 
8376072b0518SStephen M. Cameron 	for (i = 0; i < h->nreply_queues; i++) {
8377072b0518SStephen M. Cameron 		if (!h->reply_queue[i].head)
8378072b0518SStephen M. Cameron 			continue;
83791fb7c98aSRobert Elliott 		pci_free_consistent(h->pdev,
83801fb7c98aSRobert Elliott 					h->reply_queue_size,
83811fb7c98aSRobert Elliott 					h->reply_queue[i].head,
83821fb7c98aSRobert Elliott 					h->reply_queue[i].busaddr);
8383072b0518SStephen M. Cameron 		h->reply_queue[i].head = NULL;
8384072b0518SStephen M. Cameron 		h->reply_queue[i].busaddr = 0;
8385072b0518SStephen M. Cameron 	}
8386105a3dbcSRobert Elliott 	h->reply_queue_size = 0;
8387072b0518SStephen M. Cameron }
8388072b0518SStephen M. Cameron 
83890097f0f4SStephen M. Cameron static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
83900097f0f4SStephen M. Cameron {
8391105a3dbcSRobert Elliott 	hpsa_free_performant_mode(h);		/* init_one 7 */
8392105a3dbcSRobert Elliott 	hpsa_free_sg_chain_blocks(h);		/* init_one 6 */
8393105a3dbcSRobert Elliott 	hpsa_free_cmd_pool(h);			/* init_one 5 */
8394105a3dbcSRobert Elliott 	hpsa_free_irqs(h);			/* init_one 4 */
83952946e82bSRobert Elliott 	scsi_host_put(h->scsi_host);		/* init_one 3 */
83962946e82bSRobert Elliott 	h->scsi_host = NULL;			/* init_one 3 */
83972946e82bSRobert Elliott 	hpsa_free_pci_init(h);			/* init_one 2_5 */
83989ecd953aSRobert Elliott 	free_percpu(h->lockup_detected);	/* init_one 2 */
83999ecd953aSRobert Elliott 	h->lockup_detected = NULL;		/* init_one 2 */
84009ecd953aSRobert Elliott 	if (h->resubmit_wq) {
84019ecd953aSRobert Elliott 		destroy_workqueue(h->resubmit_wq);	/* init_one 1 */
84029ecd953aSRobert Elliott 		h->resubmit_wq = NULL;
84039ecd953aSRobert Elliott 	}
84049ecd953aSRobert Elliott 	if (h->rescan_ctlr_wq) {
84059ecd953aSRobert Elliott 		destroy_workqueue(h->rescan_ctlr_wq);
84069ecd953aSRobert Elliott 		h->rescan_ctlr_wq = NULL;
84079ecd953aSRobert Elliott 	}
8408105a3dbcSRobert Elliott 	kfree(h);				/* init_one 1 */
840964670ac8SStephen M. Cameron }
841064670ac8SStephen M. Cameron 
8411a0c12413SStephen M. Cameron /* Called when controller lockup detected. */
8412f2405db8SDon Brace static void fail_all_outstanding_cmds(struct ctlr_info *h)
8413a0c12413SStephen M. Cameron {
8414281a7fd0SWebb Scales 	int i, refcount;
8415281a7fd0SWebb Scales 	struct CommandList *c;
841625163bd5SWebb Scales 	int failcount = 0;
8417a0c12413SStephen M. Cameron 
8418080ef1ccSDon Brace 	flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */
8419f2405db8SDon Brace 	for (i = 0; i < h->nr_cmds; i++) {
8420f2405db8SDon Brace 		c = h->cmd_pool + i;
8421281a7fd0SWebb Scales 		refcount = atomic_inc_return(&c->refcount);
8422281a7fd0SWebb Scales 		if (refcount > 1) {
842325163bd5SWebb Scales 			c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
84245a3d16f5SStephen M. Cameron 			finish_cmd(c);
8425433b5f4dSStephen Cameron 			atomic_dec(&h->commands_outstanding);
842625163bd5SWebb Scales 			failcount++;
8427a0c12413SStephen M. Cameron 		}
8428281a7fd0SWebb Scales 		cmd_free(h, c);
8429281a7fd0SWebb Scales 	}
843025163bd5SWebb Scales 	dev_warn(&h->pdev->dev,
843125163bd5SWebb Scales 		"failed %d commands in fail_all\n", failcount);
8432a0c12413SStephen M. Cameron }
8433a0c12413SStephen M. Cameron 
8434094963daSStephen M. Cameron static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value)
8435094963daSStephen M. Cameron {
8436c8ed0010SRusty Russell 	int cpu;
8437094963daSStephen M. Cameron 
8438c8ed0010SRusty Russell 	for_each_online_cpu(cpu) {
8439094963daSStephen M. Cameron 		u32 *lockup_detected;
8440094963daSStephen M. Cameron 		lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
8441094963daSStephen M. Cameron 		*lockup_detected = value;
8442094963daSStephen M. Cameron 	}
8443094963daSStephen M. Cameron 	wmb(); /* be sure the per-cpu variables are out to memory */
8444094963daSStephen M. Cameron }
8445094963daSStephen M. Cameron 
8446a0c12413SStephen M. Cameron static void controller_lockup_detected(struct ctlr_info *h)
8447a0c12413SStephen M. Cameron {
8448a0c12413SStephen M. Cameron 	unsigned long flags;
8449094963daSStephen M. Cameron 	u32 lockup_detected;
8450a0c12413SStephen M. Cameron 
8451a0c12413SStephen M. Cameron 	h->access.set_intr_mask(h, HPSA_INTR_OFF);
8452a0c12413SStephen M. Cameron 	spin_lock_irqsave(&h->lock, flags);
8453094963daSStephen M. Cameron 	lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
8454094963daSStephen M. Cameron 	if (!lockup_detected) {
8455094963daSStephen M. Cameron 		/* no heartbeat, but controller gave us a zero. */
8456094963daSStephen M. Cameron 		dev_warn(&h->pdev->dev,
845725163bd5SWebb Scales 			"lockup detected after %d but scratchpad register is zero\n",
845825163bd5SWebb Scales 			h->heartbeat_sample_interval / HZ);
8459094963daSStephen M. Cameron 		lockup_detected = 0xffffffff;
8460094963daSStephen M. Cameron 	}
8461094963daSStephen M. Cameron 	set_lockup_detected_for_all_cpus(h, lockup_detected);
8462a0c12413SStephen M. Cameron 	spin_unlock_irqrestore(&h->lock, flags);
846325163bd5SWebb Scales 	dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n",
846425163bd5SWebb Scales 			lockup_detected, h->heartbeat_sample_interval / HZ);
8465a0c12413SStephen M. Cameron 	pci_disable_device(h->pdev);
8466f2405db8SDon Brace 	fail_all_outstanding_cmds(h);
8467a0c12413SStephen M. Cameron }
8468a0c12413SStephen M. Cameron 
846925163bd5SWebb Scales static int detect_controller_lockup(struct ctlr_info *h)
8470a0c12413SStephen M. Cameron {
8471a0c12413SStephen M. Cameron 	u64 now;
8472a0c12413SStephen M. Cameron 	u32 heartbeat;
8473a0c12413SStephen M. Cameron 	unsigned long flags;
8474a0c12413SStephen M. Cameron 
8475a0c12413SStephen M. Cameron 	now = get_jiffies_64();
8476a0c12413SStephen M. Cameron 	/* If we've received an interrupt recently, we're ok. */
8477a0c12413SStephen M. Cameron 	if (time_after64(h->last_intr_timestamp +
8478e85c5974SStephen M. Cameron 				(h->heartbeat_sample_interval), now))
847925163bd5SWebb Scales 		return false;
8480a0c12413SStephen M. Cameron 
8481a0c12413SStephen M. Cameron 	/*
8482a0c12413SStephen M. Cameron 	 * If we've already checked the heartbeat recently, we're ok.
8483a0c12413SStephen M. Cameron 	 * This could happen if someone sends us a signal. We
8484a0c12413SStephen M. Cameron 	 * otherwise don't care about signals in this thread.
8485a0c12413SStephen M. Cameron 	 */
8486a0c12413SStephen M. Cameron 	if (time_after64(h->last_heartbeat_timestamp +
8487e85c5974SStephen M. Cameron 				(h->heartbeat_sample_interval), now))
848825163bd5SWebb Scales 		return false;
8489a0c12413SStephen M. Cameron 
8490a0c12413SStephen M. Cameron 	/* If heartbeat has not changed since we last looked, we're not ok. */
8491a0c12413SStephen M. Cameron 	spin_lock_irqsave(&h->lock, flags);
8492a0c12413SStephen M. Cameron 	heartbeat = readl(&h->cfgtable->HeartBeat);
8493a0c12413SStephen M. Cameron 	spin_unlock_irqrestore(&h->lock, flags);
8494a0c12413SStephen M. Cameron 	if (h->last_heartbeat == heartbeat) {
8495a0c12413SStephen M. Cameron 		controller_lockup_detected(h);
849625163bd5SWebb Scales 		return true;
8497a0c12413SStephen M. Cameron 	}
8498a0c12413SStephen M. Cameron 
8499a0c12413SStephen M. Cameron 	/* We're ok. */
8500a0c12413SStephen M. Cameron 	h->last_heartbeat = heartbeat;
8501a0c12413SStephen M. Cameron 	h->last_heartbeat_timestamp = now;
850225163bd5SWebb Scales 	return false;
8503a0c12413SStephen M. Cameron }
8504a0c12413SStephen M. Cameron 
85059846590eSStephen M. Cameron static void hpsa_ack_ctlr_events(struct ctlr_info *h)
850676438d08SStephen M. Cameron {
850776438d08SStephen M. Cameron 	int i;
850876438d08SStephen M. Cameron 	char *event_type;
850976438d08SStephen M. Cameron 
8510e4aa3e6aSStephen Cameron 	if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
8511e4aa3e6aSStephen Cameron 		return;
8512e4aa3e6aSStephen Cameron 
851376438d08SStephen M. Cameron 	/* Ask the controller to clear the events we're handling. */
85141f7cee8cSStephen M. Cameron 	if ((h->transMethod & (CFGTBL_Trans_io_accel1
85151f7cee8cSStephen M. Cameron 			| CFGTBL_Trans_io_accel2)) &&
851676438d08SStephen M. Cameron 		(h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE ||
851776438d08SStephen M. Cameron 		 h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) {
851876438d08SStephen M. Cameron 
851976438d08SStephen M. Cameron 		if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE)
852076438d08SStephen M. Cameron 			event_type = "state change";
852176438d08SStephen M. Cameron 		if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)
852276438d08SStephen M. Cameron 			event_type = "configuration change";
852376438d08SStephen M. Cameron 		/* Stop sending new RAID offload reqs via the IO accelerator */
852476438d08SStephen M. Cameron 		scsi_block_requests(h->scsi_host);
85255323ed74SDon Brace 		for (i = 0; i < h->ndevices; i++) {
852676438d08SStephen M. Cameron 			h->dev[i]->offload_enabled = 0;
85275323ed74SDon Brace 			h->dev[i]->offload_to_be_enabled = 0;
85285323ed74SDon Brace 		}
852923100dd9SStephen M. Cameron 		hpsa_drain_accel_commands(h);
853076438d08SStephen M. Cameron 		/* Set 'accelerator path config change' bit */
853176438d08SStephen M. Cameron 		dev_warn(&h->pdev->dev,
853276438d08SStephen M. Cameron 			"Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n",
853376438d08SStephen M. Cameron 			h->events, event_type);
853476438d08SStephen M. Cameron 		writel(h->events, &(h->cfgtable->clear_event_notify));
853576438d08SStephen M. Cameron 		/* Set the "clear event notify field update" bit 6 */
853676438d08SStephen M. Cameron 		writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
853776438d08SStephen M. Cameron 		/* Wait until ctlr clears 'clear event notify field', bit 6 */
853876438d08SStephen M. Cameron 		hpsa_wait_for_clear_event_notify_ack(h);
853976438d08SStephen M. Cameron 		scsi_unblock_requests(h->scsi_host);
854076438d08SStephen M. Cameron 	} else {
854176438d08SStephen M. Cameron 		/* Acknowledge controller notification events. */
854276438d08SStephen M. Cameron 		writel(h->events, &(h->cfgtable->clear_event_notify));
854376438d08SStephen M. Cameron 		writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
854476438d08SStephen M. Cameron 		hpsa_wait_for_clear_event_notify_ack(h);
854576438d08SStephen M. Cameron #if 0
854676438d08SStephen M. Cameron 		writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
854776438d08SStephen M. Cameron 		hpsa_wait_for_mode_change_ack(h);
854876438d08SStephen M. Cameron #endif
854976438d08SStephen M. Cameron 	}
85509846590eSStephen M. Cameron 	return;
855176438d08SStephen M. Cameron }
855276438d08SStephen M. Cameron 
855376438d08SStephen M. Cameron /* Check a register on the controller to see if there are configuration
855476438d08SStephen M. Cameron  * changes (added/changed/removed logical drives, etc.) which mean that
8555e863d68eSScott Teel  * we should rescan the controller for devices.
8556e863d68eSScott Teel  * Also check flag for driver-initiated rescan.
855776438d08SStephen M. Cameron  */
85589846590eSStephen M. Cameron static int hpsa_ctlr_needs_rescan(struct ctlr_info *h)
855976438d08SStephen M. Cameron {
8560853633e8SDon Brace 	if (h->drv_req_rescan) {
8561853633e8SDon Brace 		h->drv_req_rescan = 0;
8562853633e8SDon Brace 		return 1;
8563853633e8SDon Brace 	}
8564853633e8SDon Brace 
856576438d08SStephen M. Cameron 	if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
85669846590eSStephen M. Cameron 		return 0;
856776438d08SStephen M. Cameron 
856876438d08SStephen M. Cameron 	h->events = readl(&(h->cfgtable->event_notify));
85699846590eSStephen M. Cameron 	return h->events & RESCAN_REQUIRED_EVENT_BITS;
85709846590eSStephen M. Cameron }
857176438d08SStephen M. Cameron 
857276438d08SStephen M. Cameron /*
85739846590eSStephen M. Cameron  * Check if any of the offline devices have become ready
857476438d08SStephen M. Cameron  */
85759846590eSStephen M. Cameron static int hpsa_offline_devices_ready(struct ctlr_info *h)
85769846590eSStephen M. Cameron {
85779846590eSStephen M. Cameron 	unsigned long flags;
85789846590eSStephen M. Cameron 	struct offline_device_entry *d;
85799846590eSStephen M. Cameron 	struct list_head *this, *tmp;
85809846590eSStephen M. Cameron 
85819846590eSStephen M. Cameron 	spin_lock_irqsave(&h->offline_device_lock, flags);
85829846590eSStephen M. Cameron 	list_for_each_safe(this, tmp, &h->offline_device_list) {
85839846590eSStephen M. Cameron 		d = list_entry(this, struct offline_device_entry,
85849846590eSStephen M. Cameron 				offline_list);
85859846590eSStephen M. Cameron 		spin_unlock_irqrestore(&h->offline_device_lock, flags);
8586d1fea47cSStephen M. Cameron 		if (!hpsa_volume_offline(h, d->scsi3addr)) {
8587d1fea47cSStephen M. Cameron 			spin_lock_irqsave(&h->offline_device_lock, flags);
8588d1fea47cSStephen M. Cameron 			list_del(&d->offline_list);
8589d1fea47cSStephen M. Cameron 			spin_unlock_irqrestore(&h->offline_device_lock, flags);
85909846590eSStephen M. Cameron 			return 1;
8591d1fea47cSStephen M. Cameron 		}
85929846590eSStephen M. Cameron 		spin_lock_irqsave(&h->offline_device_lock, flags);
859376438d08SStephen M. Cameron 	}
85949846590eSStephen M. Cameron 	spin_unlock_irqrestore(&h->offline_device_lock, flags);
85959846590eSStephen M. Cameron 	return 0;
85969846590eSStephen M. Cameron }
85979846590eSStephen M. Cameron 
859834592254SScott Teel static int hpsa_luns_changed(struct ctlr_info *h)
859934592254SScott Teel {
860034592254SScott Teel 	int rc = 1; /* assume there are changes */
860134592254SScott Teel 	struct ReportLUNdata *logdev = NULL;
860234592254SScott Teel 
860334592254SScott Teel 	/* if we can't find out if lun data has changed,
860434592254SScott Teel 	 * assume that it has.
860534592254SScott Teel 	 */
860634592254SScott Teel 
860734592254SScott Teel 	if (!h->lastlogicals)
860834592254SScott Teel 		goto out;
860934592254SScott Teel 
861034592254SScott Teel 	logdev = kzalloc(sizeof(*logdev), GFP_KERNEL);
861134592254SScott Teel 	if (!logdev) {
861234592254SScott Teel 		dev_warn(&h->pdev->dev,
861334592254SScott Teel 			"Out of memory, can't track lun changes.\n");
861434592254SScott Teel 		goto out;
861534592254SScott Teel 	}
861634592254SScott Teel 	if (hpsa_scsi_do_report_luns(h, 1, logdev, sizeof(*logdev), 0)) {
861734592254SScott Teel 		dev_warn(&h->pdev->dev,
861834592254SScott Teel 			"report luns failed, can't track lun changes.\n");
861934592254SScott Teel 		goto out;
862034592254SScott Teel 	}
862134592254SScott Teel 	if (memcmp(logdev, h->lastlogicals, sizeof(*logdev))) {
862234592254SScott Teel 		dev_info(&h->pdev->dev,
862334592254SScott Teel 			"Lun changes detected.\n");
862434592254SScott Teel 		memcpy(h->lastlogicals, logdev, sizeof(*logdev));
862534592254SScott Teel 		goto out;
862634592254SScott Teel 	} else
862734592254SScott Teel 		rc = 0; /* no changes detected. */
862834592254SScott Teel out:
862934592254SScott Teel 	kfree(logdev);
863034592254SScott Teel 	return rc;
863134592254SScott Teel }
863234592254SScott Teel 
86336636e7f4SDon Brace static void hpsa_rescan_ctlr_worker(struct work_struct *work)
8634a0c12413SStephen M. Cameron {
8635a0c12413SStephen M. Cameron 	unsigned long flags;
86368a98db73SStephen M. Cameron 	struct ctlr_info *h = container_of(to_delayed_work(work),
86376636e7f4SDon Brace 					struct ctlr_info, rescan_ctlr_work);
86386636e7f4SDon Brace 
86396636e7f4SDon Brace 
86406636e7f4SDon Brace 	if (h->remove_in_progress)
86418a98db73SStephen M. Cameron 		return;
86429846590eSStephen M. Cameron 
86439846590eSStephen M. Cameron 	if (hpsa_ctlr_needs_rescan(h) || hpsa_offline_devices_ready(h)) {
86449846590eSStephen M. Cameron 		scsi_host_get(h->scsi_host);
86459846590eSStephen M. Cameron 		hpsa_ack_ctlr_events(h);
86469846590eSStephen M. Cameron 		hpsa_scan_start(h->scsi_host);
86479846590eSStephen M. Cameron 		scsi_host_put(h->scsi_host);
864834592254SScott Teel 	} else if (h->discovery_polling) {
8649c2adae44SScott Teel 		hpsa_disable_rld_caching(h);
865034592254SScott Teel 		if (hpsa_luns_changed(h)) {
865134592254SScott Teel 			struct Scsi_Host *sh = NULL;
865234592254SScott Teel 
865334592254SScott Teel 			dev_info(&h->pdev->dev,
865434592254SScott Teel 				"driver discovery polling rescan.\n");
865534592254SScott Teel 			sh = scsi_host_get(h->scsi_host);
865634592254SScott Teel 			if (sh != NULL) {
865734592254SScott Teel 				hpsa_scan_start(sh);
865834592254SScott Teel 				scsi_host_put(sh);
865934592254SScott Teel 			}
866034592254SScott Teel 		}
86619846590eSStephen M. Cameron 	}
86626636e7f4SDon Brace 	spin_lock_irqsave(&h->lock, flags);
86636636e7f4SDon Brace 	if (!h->remove_in_progress)
86646636e7f4SDon Brace 		queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
86656636e7f4SDon Brace 				h->heartbeat_sample_interval);
86666636e7f4SDon Brace 	spin_unlock_irqrestore(&h->lock, flags);
86676636e7f4SDon Brace }
86686636e7f4SDon Brace 
86696636e7f4SDon Brace static void hpsa_monitor_ctlr_worker(struct work_struct *work)
86706636e7f4SDon Brace {
86716636e7f4SDon Brace 	unsigned long flags;
86726636e7f4SDon Brace 	struct ctlr_info *h = container_of(to_delayed_work(work),
86736636e7f4SDon Brace 					struct ctlr_info, monitor_ctlr_work);
86746636e7f4SDon Brace 
86756636e7f4SDon Brace 	detect_controller_lockup(h);
86766636e7f4SDon Brace 	if (lockup_detected(h))
86776636e7f4SDon Brace 		return;
86789846590eSStephen M. Cameron 
86798a98db73SStephen M. Cameron 	spin_lock_irqsave(&h->lock, flags);
86806636e7f4SDon Brace 	if (!h->remove_in_progress)
86818a98db73SStephen M. Cameron 		schedule_delayed_work(&h->monitor_ctlr_work,
86828a98db73SStephen M. Cameron 				h->heartbeat_sample_interval);
86838a98db73SStephen M. Cameron 	spin_unlock_irqrestore(&h->lock, flags);
8684a0c12413SStephen M. Cameron }
8685a0c12413SStephen M. Cameron 
86866636e7f4SDon Brace static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h,
86876636e7f4SDon Brace 						char *name)
86886636e7f4SDon Brace {
86896636e7f4SDon Brace 	struct workqueue_struct *wq = NULL;
86906636e7f4SDon Brace 
8691397ea9cbSDon Brace 	wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr);
86926636e7f4SDon Brace 	if (!wq)
86936636e7f4SDon Brace 		dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name);
86946636e7f4SDon Brace 
86956636e7f4SDon Brace 	return wq;
86966636e7f4SDon Brace }
86976636e7f4SDon Brace 
86986f039790SGreg Kroah-Hartman static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
86994c2a8c40SStephen M. Cameron {
87004c2a8c40SStephen M. Cameron 	int dac, rc;
87014c2a8c40SStephen M. Cameron 	struct ctlr_info *h;
870264670ac8SStephen M. Cameron 	int try_soft_reset = 0;
870364670ac8SStephen M. Cameron 	unsigned long flags;
87046b6c1cd7STomas Henzl 	u32 board_id;
87054c2a8c40SStephen M. Cameron 
87064c2a8c40SStephen M. Cameron 	if (number_of_controllers == 0)
87074c2a8c40SStephen M. Cameron 		printk(KERN_INFO DRIVER_NAME "\n");
87084c2a8c40SStephen M. Cameron 
87096b6c1cd7STomas Henzl 	rc = hpsa_lookup_board_id(pdev, &board_id);
87106b6c1cd7STomas Henzl 	if (rc < 0) {
87116b6c1cd7STomas Henzl 		dev_warn(&pdev->dev, "Board ID not found\n");
87126b6c1cd7STomas Henzl 		return rc;
87136b6c1cd7STomas Henzl 	}
87146b6c1cd7STomas Henzl 
87156b6c1cd7STomas Henzl 	rc = hpsa_init_reset_devices(pdev, board_id);
871664670ac8SStephen M. Cameron 	if (rc) {
871764670ac8SStephen M. Cameron 		if (rc != -ENOTSUPP)
87184c2a8c40SStephen M. Cameron 			return rc;
871964670ac8SStephen M. Cameron 		/* If the reset fails in a particular way (it has no way to do
872064670ac8SStephen M. Cameron 		 * a proper hard reset, so returns -ENOTSUPP) we can try to do
872164670ac8SStephen M. Cameron 		 * a soft reset once we get the controller configured up to the
872264670ac8SStephen M. Cameron 		 * point that it can accept a command.
872364670ac8SStephen M. Cameron 		 */
872464670ac8SStephen M. Cameron 		try_soft_reset = 1;
872564670ac8SStephen M. Cameron 		rc = 0;
872664670ac8SStephen M. Cameron 	}
872764670ac8SStephen M. Cameron 
872864670ac8SStephen M. Cameron reinit_after_soft_reset:
87294c2a8c40SStephen M. Cameron 
8730303932fdSDon Brace 	/* Command structures must be aligned on a 32-byte boundary because
8731303932fdSDon Brace 	 * the 5 lower bits of the address are used by the hardware. and by
8732303932fdSDon Brace 	 * the driver.  See comments in hpsa.h for more info.
8733303932fdSDon Brace 	 */
8734303932fdSDon Brace 	BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
8735edd16368SStephen M. Cameron 	h = kzalloc(sizeof(*h), GFP_KERNEL);
8736105a3dbcSRobert Elliott 	if (!h) {
8737105a3dbcSRobert Elliott 		dev_err(&pdev->dev, "Failed to allocate controller head\n");
8738ecd9aad4SStephen M. Cameron 		return -ENOMEM;
8739105a3dbcSRobert Elliott 	}
8740edd16368SStephen M. Cameron 
874155c06c71SStephen M. Cameron 	h->pdev = pdev;
8742105a3dbcSRobert Elliott 
8743a9a3a273SStephen M. Cameron 	h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
87449846590eSStephen M. Cameron 	INIT_LIST_HEAD(&h->offline_device_list);
87456eaf46fdSStephen M. Cameron 	spin_lock_init(&h->lock);
87469846590eSStephen M. Cameron 	spin_lock_init(&h->offline_device_lock);
87476eaf46fdSStephen M. Cameron 	spin_lock_init(&h->scan_lock);
874834f0c627SDon Brace 	atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS);
87499b5c48c2SStephen Cameron 	atomic_set(&h->abort_cmds_available, HPSA_CMDS_RESERVED_FOR_ABORTS);
8750094963daSStephen M. Cameron 
8751094963daSStephen M. Cameron 	/* Allocate and clear per-cpu variable lockup_detected */
8752094963daSStephen M. Cameron 	h->lockup_detected = alloc_percpu(u32);
87532a5ac326SStephen M. Cameron 	if (!h->lockup_detected) {
8754105a3dbcSRobert Elliott 		dev_err(&h->pdev->dev, "Failed to allocate lockup detector\n");
87552a5ac326SStephen M. Cameron 		rc = -ENOMEM;
87562efa5929SRobert Elliott 		goto clean1;	/* aer/h */
87572a5ac326SStephen M. Cameron 	}
8758094963daSStephen M. Cameron 	set_lockup_detected_for_all_cpus(h, 0);
8759094963daSStephen M. Cameron 
876055c06c71SStephen M. Cameron 	rc = hpsa_pci_init(h);
8761105a3dbcSRobert Elliott 	if (rc)
87622946e82bSRobert Elliott 		goto clean2;	/* lu, aer/h */
8763edd16368SStephen M. Cameron 
87642946e82bSRobert Elliott 	/* relies on h-> settings made by hpsa_pci_init, including
87652946e82bSRobert Elliott 	 * interrupt_mode h->intr */
87662946e82bSRobert Elliott 	rc = hpsa_scsi_host_alloc(h);
87672946e82bSRobert Elliott 	if (rc)
87682946e82bSRobert Elliott 		goto clean2_5;	/* pci, lu, aer/h */
87692946e82bSRobert Elliott 
87702946e82bSRobert Elliott 	sprintf(h->devname, HPSA "%d", h->scsi_host->host_no);
8771edd16368SStephen M. Cameron 	h->ctlr = number_of_controllers;
8772edd16368SStephen M. Cameron 	number_of_controllers++;
8773edd16368SStephen M. Cameron 
8774edd16368SStephen M. Cameron 	/* configure PCI DMA stuff */
8775ecd9aad4SStephen M. Cameron 	rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
8776ecd9aad4SStephen M. Cameron 	if (rc == 0) {
8777edd16368SStephen M. Cameron 		dac = 1;
8778ecd9aad4SStephen M. Cameron 	} else {
8779ecd9aad4SStephen M. Cameron 		rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
8780ecd9aad4SStephen M. Cameron 		if (rc == 0) {
8781edd16368SStephen M. Cameron 			dac = 0;
8782ecd9aad4SStephen M. Cameron 		} else {
8783edd16368SStephen M. Cameron 			dev_err(&pdev->dev, "no suitable DMA available\n");
87842946e82bSRobert Elliott 			goto clean3;	/* shost, pci, lu, aer/h */
8785edd16368SStephen M. Cameron 		}
8786ecd9aad4SStephen M. Cameron 	}
8787edd16368SStephen M. Cameron 
8788edd16368SStephen M. Cameron 	/* make sure the board interrupts are off */
8789edd16368SStephen M. Cameron 	h->access.set_intr_mask(h, HPSA_INTR_OFF);
879010f66018SStephen M. Cameron 
8791105a3dbcSRobert Elliott 	rc = hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx);
8792105a3dbcSRobert Elliott 	if (rc)
87932946e82bSRobert Elliott 		goto clean3;	/* shost, pci, lu, aer/h */
8794d37ffbe4SRobert Elliott 	rc = hpsa_alloc_cmd_pool(h);
87958947fd10SRobert Elliott 	if (rc)
87962946e82bSRobert Elliott 		goto clean4;	/* irq, shost, pci, lu, aer/h */
8797105a3dbcSRobert Elliott 	rc = hpsa_alloc_sg_chain_blocks(h);
8798105a3dbcSRobert Elliott 	if (rc)
87992946e82bSRobert Elliott 		goto clean5;	/* cmd, irq, shost, pci, lu, aer/h */
8800a08a8471SStephen M. Cameron 	init_waitqueue_head(&h->scan_wait_queue);
88019b5c48c2SStephen Cameron 	init_waitqueue_head(&h->abort_cmd_wait_queue);
8802d604f533SWebb Scales 	init_waitqueue_head(&h->event_sync_wait_queue);
8803d604f533SWebb Scales 	mutex_init(&h->reset_mutex);
8804a08a8471SStephen M. Cameron 	h->scan_finished = 1; /* no scan currently in progress */
8805edd16368SStephen M. Cameron 
8806edd16368SStephen M. Cameron 	pci_set_drvdata(pdev, h);
88079a41338eSStephen M. Cameron 	h->ndevices = 0;
88082946e82bSRobert Elliott 
88099a41338eSStephen M. Cameron 	spin_lock_init(&h->devlock);
8810105a3dbcSRobert Elliott 	rc = hpsa_put_ctlr_into_performant_mode(h);
8811105a3dbcSRobert Elliott 	if (rc)
88122946e82bSRobert Elliott 		goto clean6; /* sg, cmd, irq, shost, pci, lu, aer/h */
88132946e82bSRobert Elliott 
88142efa5929SRobert Elliott 	/* create the resubmit workqueue */
88152efa5929SRobert Elliott 	h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan");
88162efa5929SRobert Elliott 	if (!h->rescan_ctlr_wq) {
88172efa5929SRobert Elliott 		rc = -ENOMEM;
88182efa5929SRobert Elliott 		goto clean7;
88192efa5929SRobert Elliott 	}
88202efa5929SRobert Elliott 
88212efa5929SRobert Elliott 	h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit");
88222efa5929SRobert Elliott 	if (!h->resubmit_wq) {
88232efa5929SRobert Elliott 		rc = -ENOMEM;
88242efa5929SRobert Elliott 		goto clean7;	/* aer/h */
88252efa5929SRobert Elliott 	}
882664670ac8SStephen M. Cameron 
8827105a3dbcSRobert Elliott 	/*
8828105a3dbcSRobert Elliott 	 * At this point, the controller is ready to take commands.
882964670ac8SStephen M. Cameron 	 * Now, if reset_devices and the hard reset didn't work, try
883064670ac8SStephen M. Cameron 	 * the soft reset and see if that works.
883164670ac8SStephen M. Cameron 	 */
883264670ac8SStephen M. Cameron 	if (try_soft_reset) {
883364670ac8SStephen M. Cameron 
883464670ac8SStephen M. Cameron 		/* This is kind of gross.  We may or may not get a completion
883564670ac8SStephen M. Cameron 		 * from the soft reset command, and if we do, then the value
883664670ac8SStephen M. Cameron 		 * from the fifo may or may not be valid.  So, we wait 10 secs
883764670ac8SStephen M. Cameron 		 * after the reset throwing away any completions we get during
883864670ac8SStephen M. Cameron 		 * that time.  Unregister the interrupt handler and register
883964670ac8SStephen M. Cameron 		 * fake ones to scoop up any residual completions.
884064670ac8SStephen M. Cameron 		 */
884164670ac8SStephen M. Cameron 		spin_lock_irqsave(&h->lock, flags);
884264670ac8SStephen M. Cameron 		h->access.set_intr_mask(h, HPSA_INTR_OFF);
884364670ac8SStephen M. Cameron 		spin_unlock_irqrestore(&h->lock, flags);
8844ec501a18SRobert Elliott 		hpsa_free_irqs(h);
88459ee61794SRobert Elliott 		rc = hpsa_request_irqs(h, hpsa_msix_discard_completions,
884664670ac8SStephen M. Cameron 					hpsa_intx_discard_completions);
884764670ac8SStephen M. Cameron 		if (rc) {
88489ee61794SRobert Elliott 			dev_warn(&h->pdev->dev,
88499ee61794SRobert Elliott 				"Failed to request_irq after soft reset.\n");
8850d498757cSRobert Elliott 			/*
8851b2ef480cSRobert Elliott 			 * cannot goto clean7 or free_irqs will be called
8852b2ef480cSRobert Elliott 			 * again. Instead, do its work
8853b2ef480cSRobert Elliott 			 */
8854b2ef480cSRobert Elliott 			hpsa_free_performant_mode(h);	/* clean7 */
8855b2ef480cSRobert Elliott 			hpsa_free_sg_chain_blocks(h);	/* clean6 */
8856b2ef480cSRobert Elliott 			hpsa_free_cmd_pool(h);		/* clean5 */
8857b2ef480cSRobert Elliott 			/*
8858b2ef480cSRobert Elliott 			 * skip hpsa_free_irqs(h) clean4 since that
8859b2ef480cSRobert Elliott 			 * was just called before request_irqs failed
8860d498757cSRobert Elliott 			 */
8861d498757cSRobert Elliott 			goto clean3;
886264670ac8SStephen M. Cameron 		}
886364670ac8SStephen M. Cameron 
886464670ac8SStephen M. Cameron 		rc = hpsa_kdump_soft_reset(h);
886564670ac8SStephen M. Cameron 		if (rc)
886664670ac8SStephen M. Cameron 			/* Neither hard nor soft reset worked, we're hosed. */
88677ef7323fSDon Brace 			goto clean7;
886864670ac8SStephen M. Cameron 
886964670ac8SStephen M. Cameron 		dev_info(&h->pdev->dev, "Board READY.\n");
887064670ac8SStephen M. Cameron 		dev_info(&h->pdev->dev,
887164670ac8SStephen M. Cameron 			"Waiting for stale completions to drain.\n");
887264670ac8SStephen M. Cameron 		h->access.set_intr_mask(h, HPSA_INTR_ON);
887364670ac8SStephen M. Cameron 		msleep(10000);
887464670ac8SStephen M. Cameron 		h->access.set_intr_mask(h, HPSA_INTR_OFF);
887564670ac8SStephen M. Cameron 
887664670ac8SStephen M. Cameron 		rc = controller_reset_failed(h->cfgtable);
887764670ac8SStephen M. Cameron 		if (rc)
887864670ac8SStephen M. Cameron 			dev_info(&h->pdev->dev,
887964670ac8SStephen M. Cameron 				"Soft reset appears to have failed.\n");
888064670ac8SStephen M. Cameron 
888164670ac8SStephen M. Cameron 		/* since the controller's reset, we have to go back and re-init
888264670ac8SStephen M. Cameron 		 * everything.  Easiest to just forget what we've done and do it
888364670ac8SStephen M. Cameron 		 * all over again.
888464670ac8SStephen M. Cameron 		 */
888564670ac8SStephen M. Cameron 		hpsa_undo_allocations_after_kdump_soft_reset(h);
888664670ac8SStephen M. Cameron 		try_soft_reset = 0;
888764670ac8SStephen M. Cameron 		if (rc)
8888b2ef480cSRobert Elliott 			/* don't goto clean, we already unallocated */
888964670ac8SStephen M. Cameron 			return -ENODEV;
889064670ac8SStephen M. Cameron 
889164670ac8SStephen M. Cameron 		goto reinit_after_soft_reset;
889264670ac8SStephen M. Cameron 	}
8893edd16368SStephen M. Cameron 
8894da0697bdSScott Teel 	/* Enable Accelerated IO path at driver layer */
8895da0697bdSScott Teel 	h->acciopath_status = 1;
889634592254SScott Teel 	/* Disable discovery polling.*/
889734592254SScott Teel 	h->discovery_polling = 0;
8898da0697bdSScott Teel 
8899e863d68eSScott Teel 
8900edd16368SStephen M. Cameron 	/* Turn the interrupts on so we can service requests */
8901edd16368SStephen M. Cameron 	h->access.set_intr_mask(h, HPSA_INTR_ON);
8902edd16368SStephen M. Cameron 
8903339b2b14SStephen M. Cameron 	hpsa_hba_inquiry(h);
89048a98db73SStephen M. Cameron 
890534592254SScott Teel 	h->lastlogicals = kzalloc(sizeof(*(h->lastlogicals)), GFP_KERNEL);
890634592254SScott Teel 	if (!h->lastlogicals)
890734592254SScott Teel 		dev_info(&h->pdev->dev,
890834592254SScott Teel 			"Can't track change to report lun data\n");
890934592254SScott Teel 
8910cf477237SDon Brace 	/* hook into SCSI subsystem */
8911cf477237SDon Brace 	rc = hpsa_scsi_add_host(h);
8912cf477237SDon Brace 	if (rc)
8913cf477237SDon Brace 		goto clean7; /* perf, sg, cmd, irq, shost, pci, lu, aer/h */
8914cf477237SDon Brace 
89158a98db73SStephen M. Cameron 	/* Monitor the controller for firmware lockups */
89168a98db73SStephen M. Cameron 	h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
89178a98db73SStephen M. Cameron 	INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker);
89188a98db73SStephen M. Cameron 	schedule_delayed_work(&h->monitor_ctlr_work,
89198a98db73SStephen M. Cameron 				h->heartbeat_sample_interval);
89206636e7f4SDon Brace 	INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker);
89216636e7f4SDon Brace 	queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
89226636e7f4SDon Brace 				h->heartbeat_sample_interval);
892388bf6d62SStephen M. Cameron 	return 0;
8924edd16368SStephen M. Cameron 
89252946e82bSRobert Elliott clean7: /* perf, sg, cmd, irq, shost, pci, lu, aer/h */
8926105a3dbcSRobert Elliott 	hpsa_free_performant_mode(h);
8927105a3dbcSRobert Elliott 	h->access.set_intr_mask(h, HPSA_INTR_OFF);
8928105a3dbcSRobert Elliott clean6: /* sg, cmd, irq, pci, lockup, wq/aer/h */
892933a2ffceSStephen M. Cameron 	hpsa_free_sg_chain_blocks(h);
89302946e82bSRobert Elliott clean5: /* cmd, irq, shost, pci, lu, aer/h */
89312e9d1b36SStephen M. Cameron 	hpsa_free_cmd_pool(h);
89322946e82bSRobert Elliott clean4: /* irq, shost, pci, lu, aer/h */
8933ec501a18SRobert Elliott 	hpsa_free_irqs(h);
89342946e82bSRobert Elliott clean3: /* shost, pci, lu, aer/h */
89352946e82bSRobert Elliott 	scsi_host_put(h->scsi_host);
89362946e82bSRobert Elliott 	h->scsi_host = NULL;
89372946e82bSRobert Elliott clean2_5: /* pci, lu, aer/h */
8938195f2c65SRobert Elliott 	hpsa_free_pci_init(h);
89392946e82bSRobert Elliott clean2: /* lu, aer/h */
8940105a3dbcSRobert Elliott 	if (h->lockup_detected) {
8941094963daSStephen M. Cameron 		free_percpu(h->lockup_detected);
8942105a3dbcSRobert Elliott 		h->lockup_detected = NULL;
8943105a3dbcSRobert Elliott 	}
8944105a3dbcSRobert Elliott clean1:	/* wq/aer/h */
8945105a3dbcSRobert Elliott 	if (h->resubmit_wq) {
8946105a3dbcSRobert Elliott 		destroy_workqueue(h->resubmit_wq);
8947105a3dbcSRobert Elliott 		h->resubmit_wq = NULL;
8948105a3dbcSRobert Elliott 	}
8949105a3dbcSRobert Elliott 	if (h->rescan_ctlr_wq) {
8950105a3dbcSRobert Elliott 		destroy_workqueue(h->rescan_ctlr_wq);
8951105a3dbcSRobert Elliott 		h->rescan_ctlr_wq = NULL;
8952105a3dbcSRobert Elliott 	}
8953edd16368SStephen M. Cameron 	kfree(h);
8954ecd9aad4SStephen M. Cameron 	return rc;
8955edd16368SStephen M. Cameron }
8956edd16368SStephen M. Cameron 
8957edd16368SStephen M. Cameron static void hpsa_flush_cache(struct ctlr_info *h)
8958edd16368SStephen M. Cameron {
8959edd16368SStephen M. Cameron 	char *flush_buf;
8960edd16368SStephen M. Cameron 	struct CommandList *c;
896125163bd5SWebb Scales 	int rc;
8962702890e3SStephen M. Cameron 
8963094963daSStephen M. Cameron 	if (unlikely(lockup_detected(h)))
8964702890e3SStephen M. Cameron 		return;
8965edd16368SStephen M. Cameron 	flush_buf = kzalloc(4, GFP_KERNEL);
8966edd16368SStephen M. Cameron 	if (!flush_buf)
8967edd16368SStephen M. Cameron 		return;
8968edd16368SStephen M. Cameron 
896945fcb86eSStephen Cameron 	c = cmd_alloc(h);
8970bf43caf3SRobert Elliott 
8971a2dac136SStephen M. Cameron 	if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
8972a2dac136SStephen M. Cameron 		RAID_CTLR_LUNID, TYPE_CMD)) {
8973a2dac136SStephen M. Cameron 		goto out;
8974a2dac136SStephen M. Cameron 	}
897525163bd5SWebb Scales 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
8976c448ecfaSDon Brace 					PCI_DMA_TODEVICE, DEFAULT_TIMEOUT);
897725163bd5SWebb Scales 	if (rc)
897825163bd5SWebb Scales 		goto out;
8979edd16368SStephen M. Cameron 	if (c->err_info->CommandStatus != 0)
8980a2dac136SStephen M. Cameron out:
8981edd16368SStephen M. Cameron 		dev_warn(&h->pdev->dev,
8982edd16368SStephen M. Cameron 			"error flushing cache on controller\n");
898345fcb86eSStephen Cameron 	cmd_free(h, c);
8984edd16368SStephen M. Cameron 	kfree(flush_buf);
8985edd16368SStephen M. Cameron }
8986edd16368SStephen M. Cameron 
8987c2adae44SScott Teel /* Make controller gather fresh report lun data each time we
8988c2adae44SScott Teel  * send down a report luns request
8989c2adae44SScott Teel  */
8990c2adae44SScott Teel static void hpsa_disable_rld_caching(struct ctlr_info *h)
8991c2adae44SScott Teel {
8992c2adae44SScott Teel 	u32 *options;
8993c2adae44SScott Teel 	struct CommandList *c;
8994c2adae44SScott Teel 	int rc;
8995c2adae44SScott Teel 
8996c2adae44SScott Teel 	/* Don't bother trying to set diag options if locked up */
8997c2adae44SScott Teel 	if (unlikely(h->lockup_detected))
8998c2adae44SScott Teel 		return;
8999c2adae44SScott Teel 
9000c2adae44SScott Teel 	options = kzalloc(sizeof(*options), GFP_KERNEL);
9001c2adae44SScott Teel 	if (!options) {
9002c2adae44SScott Teel 		dev_err(&h->pdev->dev,
9003c2adae44SScott Teel 			"Error: failed to disable rld caching, during alloc.\n");
9004c2adae44SScott Teel 		return;
9005c2adae44SScott Teel 	}
9006c2adae44SScott Teel 
9007c2adae44SScott Teel 	c = cmd_alloc(h);
9008c2adae44SScott Teel 
9009c2adae44SScott Teel 	/* first, get the current diag options settings */
9010c2adae44SScott Teel 	if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0,
9011c2adae44SScott Teel 		RAID_CTLR_LUNID, TYPE_CMD))
9012c2adae44SScott Teel 		goto errout;
9013c2adae44SScott Teel 
9014c2adae44SScott Teel 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
9015c448ecfaSDon Brace 		PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT);
9016c2adae44SScott Teel 	if ((rc != 0) || (c->err_info->CommandStatus != 0))
9017c2adae44SScott Teel 		goto errout;
9018c2adae44SScott Teel 
9019c2adae44SScott Teel 	/* Now, set the bit for disabling the RLD caching */
9020c2adae44SScott Teel 	*options |= HPSA_DIAG_OPTS_DISABLE_RLD_CACHING;
9021c2adae44SScott Teel 
9022c2adae44SScott Teel 	if (fill_cmd(c, BMIC_SET_DIAG_OPTIONS, h, options, 4, 0,
9023c2adae44SScott Teel 		RAID_CTLR_LUNID, TYPE_CMD))
9024c2adae44SScott Teel 		goto errout;
9025c2adae44SScott Teel 
9026c2adae44SScott Teel 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
9027c448ecfaSDon Brace 		PCI_DMA_TODEVICE, DEFAULT_TIMEOUT);
9028c2adae44SScott Teel 	if ((rc != 0)  || (c->err_info->CommandStatus != 0))
9029c2adae44SScott Teel 		goto errout;
9030c2adae44SScott Teel 
9031c2adae44SScott Teel 	/* Now verify that it got set: */
9032c2adae44SScott Teel 	if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0,
9033c2adae44SScott Teel 		RAID_CTLR_LUNID, TYPE_CMD))
9034c2adae44SScott Teel 		goto errout;
9035c2adae44SScott Teel 
9036c2adae44SScott Teel 	rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
9037c448ecfaSDon Brace 		PCI_DMA_FROMDEVICE, DEFAULT_TIMEOUT);
9038c2adae44SScott Teel 	if ((rc != 0)  || (c->err_info->CommandStatus != 0))
9039c2adae44SScott Teel 		goto errout;
9040c2adae44SScott Teel 
9041d8a080c3SDan Carpenter 	if (*options & HPSA_DIAG_OPTS_DISABLE_RLD_CACHING)
9042c2adae44SScott Teel 		goto out;
9043c2adae44SScott Teel 
9044c2adae44SScott Teel errout:
9045c2adae44SScott Teel 	dev_err(&h->pdev->dev,
9046c2adae44SScott Teel 			"Error: failed to disable report lun data caching.\n");
9047c2adae44SScott Teel out:
9048c2adae44SScott Teel 	cmd_free(h, c);
9049c2adae44SScott Teel 	kfree(options);
9050c2adae44SScott Teel }
9051c2adae44SScott Teel 
9052edd16368SStephen M. Cameron static void hpsa_shutdown(struct pci_dev *pdev)
9053edd16368SStephen M. Cameron {
9054edd16368SStephen M. Cameron 	struct ctlr_info *h;
9055edd16368SStephen M. Cameron 
9056edd16368SStephen M. Cameron 	h = pci_get_drvdata(pdev);
9057edd16368SStephen M. Cameron 	/* Turn board interrupts off  and send the flush cache command
9058edd16368SStephen M. Cameron 	 * sendcmd will turn off interrupt, and send the flush...
9059edd16368SStephen M. Cameron 	 * To write all data in the battery backed cache to disks
9060edd16368SStephen M. Cameron 	 */
9061edd16368SStephen M. Cameron 	hpsa_flush_cache(h);
9062edd16368SStephen M. Cameron 	h->access.set_intr_mask(h, HPSA_INTR_OFF);
9063105a3dbcSRobert Elliott 	hpsa_free_irqs(h);			/* init_one 4 */
9064cc64c817SRobert Elliott 	hpsa_disable_interrupt_mode(h);		/* pci_init 2 */
9065edd16368SStephen M. Cameron }
9066edd16368SStephen M. Cameron 
90676f039790SGreg Kroah-Hartman static void hpsa_free_device_info(struct ctlr_info *h)
906855e14e76SStephen M. Cameron {
906955e14e76SStephen M. Cameron 	int i;
907055e14e76SStephen M. Cameron 
9071105a3dbcSRobert Elliott 	for (i = 0; i < h->ndevices; i++) {
907255e14e76SStephen M. Cameron 		kfree(h->dev[i]);
9073105a3dbcSRobert Elliott 		h->dev[i] = NULL;
9074105a3dbcSRobert Elliott 	}
907555e14e76SStephen M. Cameron }
907655e14e76SStephen M. Cameron 
90776f039790SGreg Kroah-Hartman static void hpsa_remove_one(struct pci_dev *pdev)
9078edd16368SStephen M. Cameron {
9079edd16368SStephen M. Cameron 	struct ctlr_info *h;
90808a98db73SStephen M. Cameron 	unsigned long flags;
9081edd16368SStephen M. Cameron 
9082edd16368SStephen M. Cameron 	if (pci_get_drvdata(pdev) == NULL) {
9083edd16368SStephen M. Cameron 		dev_err(&pdev->dev, "unable to remove device\n");
9084edd16368SStephen M. Cameron 		return;
9085edd16368SStephen M. Cameron 	}
9086edd16368SStephen M. Cameron 	h = pci_get_drvdata(pdev);
90878a98db73SStephen M. Cameron 
90888a98db73SStephen M. Cameron 	/* Get rid of any controller monitoring work items */
90898a98db73SStephen M. Cameron 	spin_lock_irqsave(&h->lock, flags);
90908a98db73SStephen M. Cameron 	h->remove_in_progress = 1;
90918a98db73SStephen M. Cameron 	spin_unlock_irqrestore(&h->lock, flags);
90926636e7f4SDon Brace 	cancel_delayed_work_sync(&h->monitor_ctlr_work);
90936636e7f4SDon Brace 	cancel_delayed_work_sync(&h->rescan_ctlr_work);
90946636e7f4SDon Brace 	destroy_workqueue(h->rescan_ctlr_wq);
90956636e7f4SDon Brace 	destroy_workqueue(h->resubmit_wq);
9096cc64c817SRobert Elliott 
90972d041306SDon Brace 	/*
90982d041306SDon Brace 	 * Call before disabling interrupts.
90992d041306SDon Brace 	 * scsi_remove_host can trigger I/O operations especially
91002d041306SDon Brace 	 * when multipath is enabled. There can be SYNCHRONIZE CACHE
91012d041306SDon Brace 	 * operations which cannot complete and will hang the system.
91022d041306SDon Brace 	 */
91032d041306SDon Brace 	if (h->scsi_host)
91042d041306SDon Brace 		scsi_remove_host(h->scsi_host);		/* init_one 8 */
9105105a3dbcSRobert Elliott 	/* includes hpsa_free_irqs - init_one 4 */
9106195f2c65SRobert Elliott 	/* includes hpsa_disable_interrupt_mode - pci_init 2 */
9107edd16368SStephen M. Cameron 	hpsa_shutdown(pdev);
9108cc64c817SRobert Elliott 
9109105a3dbcSRobert Elliott 	hpsa_free_device_info(h);		/* scan */
9110105a3dbcSRobert Elliott 
91112946e82bSRobert Elliott 	kfree(h->hba_inquiry_data);			/* init_one 10 */
91122946e82bSRobert Elliott 	h->hba_inquiry_data = NULL;			/* init_one 10 */
91132946e82bSRobert Elliott 	hpsa_free_ioaccel2_sg_chain_blocks(h);
9114105a3dbcSRobert Elliott 	hpsa_free_performant_mode(h);			/* init_one 7 */
9115105a3dbcSRobert Elliott 	hpsa_free_sg_chain_blocks(h);			/* init_one 6 */
91161fb7c98aSRobert Elliott 	hpsa_free_cmd_pool(h);				/* init_one 5 */
911734592254SScott Teel 	kfree(h->lastlogicals);
9118105a3dbcSRobert Elliott 
9119105a3dbcSRobert Elliott 	/* hpsa_free_irqs already called via hpsa_shutdown init_one 4 */
9120195f2c65SRobert Elliott 
91212946e82bSRobert Elliott 	scsi_host_put(h->scsi_host);			/* init_one 3 */
91222946e82bSRobert Elliott 	h->scsi_host = NULL;				/* init_one 3 */
91232946e82bSRobert Elliott 
9124195f2c65SRobert Elliott 	/* includes hpsa_disable_interrupt_mode - pci_init 2 */
91252946e82bSRobert Elliott 	hpsa_free_pci_init(h);				/* init_one 2.5 */
9126195f2c65SRobert Elliott 
9127105a3dbcSRobert Elliott 	free_percpu(h->lockup_detected);		/* init_one 2 */
9128105a3dbcSRobert Elliott 	h->lockup_detected = NULL;			/* init_one 2 */
9129105a3dbcSRobert Elliott 	/* (void) pci_disable_pcie_error_reporting(pdev); */	/* init_one 1 */
9130d04e62b9SKevin Barnett 
9131d04e62b9SKevin Barnett 	hpsa_delete_sas_host(h);
9132d04e62b9SKevin Barnett 
9133105a3dbcSRobert Elliott 	kfree(h);					/* init_one 1 */
9134edd16368SStephen M. Cameron }
9135edd16368SStephen M. Cameron 
9136edd16368SStephen M. Cameron static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
9137edd16368SStephen M. Cameron 	__attribute__((unused)) pm_message_t state)
9138edd16368SStephen M. Cameron {
9139edd16368SStephen M. Cameron 	return -ENOSYS;
9140edd16368SStephen M. Cameron }
9141edd16368SStephen M. Cameron 
9142edd16368SStephen M. Cameron static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
9143edd16368SStephen M. Cameron {
9144edd16368SStephen M. Cameron 	return -ENOSYS;
9145edd16368SStephen M. Cameron }
9146edd16368SStephen M. Cameron 
9147edd16368SStephen M. Cameron static struct pci_driver hpsa_pci_driver = {
9148f79cfec6SStephen M. Cameron 	.name = HPSA,
9149edd16368SStephen M. Cameron 	.probe = hpsa_init_one,
91506f039790SGreg Kroah-Hartman 	.remove = hpsa_remove_one,
9151edd16368SStephen M. Cameron 	.id_table = hpsa_pci_device_id,	/* id_table */
9152edd16368SStephen M. Cameron 	.shutdown = hpsa_shutdown,
9153edd16368SStephen M. Cameron 	.suspend = hpsa_suspend,
9154edd16368SStephen M. Cameron 	.resume = hpsa_resume,
9155edd16368SStephen M. Cameron };
9156edd16368SStephen M. Cameron 
9157303932fdSDon Brace /* Fill in bucket_map[], given nsgs (the max number of
9158303932fdSDon Brace  * scatter gather elements supported) and bucket[],
9159303932fdSDon Brace  * which is an array of 8 integers.  The bucket[] array
9160303932fdSDon Brace  * contains 8 different DMA transfer sizes (in 16
9161303932fdSDon Brace  * byte increments) which the controller uses to fetch
9162303932fdSDon Brace  * commands.  This function fills in bucket_map[], which
9163303932fdSDon Brace  * maps a given number of scatter gather elements to one of
9164303932fdSDon Brace  * the 8 DMA transfer sizes.  The point of it is to allow the
9165303932fdSDon Brace  * controller to only do as much DMA as needed to fetch the
9166303932fdSDon Brace  * command, with the DMA transfer size encoded in the lower
9167303932fdSDon Brace  * bits of the command address.
9168303932fdSDon Brace  */
9169303932fdSDon Brace static void  calc_bucket_map(int bucket[], int num_buckets,
91702b08b3e9SDon Brace 	int nsgs, int min_blocks, u32 *bucket_map)
9171303932fdSDon Brace {
9172303932fdSDon Brace 	int i, j, b, size;
9173303932fdSDon Brace 
9174303932fdSDon Brace 	/* Note, bucket_map must have nsgs+1 entries. */
9175303932fdSDon Brace 	for (i = 0; i <= nsgs; i++) {
9176303932fdSDon Brace 		/* Compute size of a command with i SG entries */
9177e1f7de0cSMatt Gates 		size = i + min_blocks;
9178303932fdSDon Brace 		b = num_buckets; /* Assume the biggest bucket */
9179303932fdSDon Brace 		/* Find the bucket that is just big enough */
9180e1f7de0cSMatt Gates 		for (j = 0; j < num_buckets; j++) {
9181303932fdSDon Brace 			if (bucket[j] >= size) {
9182303932fdSDon Brace 				b = j;
9183303932fdSDon Brace 				break;
9184303932fdSDon Brace 			}
9185303932fdSDon Brace 		}
9186303932fdSDon Brace 		/* for a command with i SG entries, use bucket b. */
9187303932fdSDon Brace 		bucket_map[i] = b;
9188303932fdSDon Brace 	}
9189303932fdSDon Brace }
9190303932fdSDon Brace 
9191105a3dbcSRobert Elliott /*
9192105a3dbcSRobert Elliott  * return -ENODEV on err, 0 on success (or no action)
9193105a3dbcSRobert Elliott  * allocates numerous items that must be freed later
9194105a3dbcSRobert Elliott  */
9195c706a795SRobert Elliott static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support)
9196303932fdSDon Brace {
91976c311b57SStephen M. Cameron 	int i;
91986c311b57SStephen M. Cameron 	unsigned long register_value;
9199e1f7de0cSMatt Gates 	unsigned long transMethod = CFGTBL_Trans_Performant |
9200e1f7de0cSMatt Gates 			(trans_support & CFGTBL_Trans_use_short_tags) |
9201e1f7de0cSMatt Gates 				CFGTBL_Trans_enable_directed_msix |
9202b9af4937SStephen M. Cameron 			(trans_support & (CFGTBL_Trans_io_accel1 |
9203b9af4937SStephen M. Cameron 				CFGTBL_Trans_io_accel2));
9204e1f7de0cSMatt Gates 	struct access_method access = SA5_performant_access;
9205def342bdSStephen M. Cameron 
9206def342bdSStephen M. Cameron 	/* This is a bit complicated.  There are 8 registers on
9207def342bdSStephen M. Cameron 	 * the controller which we write to to tell it 8 different
9208def342bdSStephen M. Cameron 	 * sizes of commands which there may be.  It's a way of
9209def342bdSStephen M. Cameron 	 * reducing the DMA done to fetch each command.  Encoded into
9210def342bdSStephen M. Cameron 	 * each command's tag are 3 bits which communicate to the controller
9211def342bdSStephen M. Cameron 	 * which of the eight sizes that command fits within.  The size of
9212def342bdSStephen M. Cameron 	 * each command depends on how many scatter gather entries there are.
9213def342bdSStephen M. Cameron 	 * Each SG entry requires 16 bytes.  The eight registers are programmed
9214def342bdSStephen M. Cameron 	 * with the number of 16-byte blocks a command of that size requires.
9215def342bdSStephen M. Cameron 	 * The smallest command possible requires 5 such 16 byte blocks.
9216d66ae08bSStephen M. Cameron 	 * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte
9217def342bdSStephen M. Cameron 	 * blocks.  Note, this only extends to the SG entries contained
9218def342bdSStephen M. Cameron 	 * within the command block, and does not extend to chained blocks
9219def342bdSStephen M. Cameron 	 * of SG elements.   bft[] contains the eight values we write to
9220def342bdSStephen M. Cameron 	 * the registers.  They are not evenly distributed, but have more
9221def342bdSStephen M. Cameron 	 * sizes for small commands, and fewer sizes for larger commands.
9222def342bdSStephen M. Cameron 	 */
9223d66ae08bSStephen M. Cameron 	int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
9224b9af4937SStephen M. Cameron #define MIN_IOACCEL2_BFT_ENTRY 5
9225b9af4937SStephen M. Cameron #define HPSA_IOACCEL2_HEADER_SZ 4
9226b9af4937SStephen M. Cameron 	int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12,
9227b9af4937SStephen M. Cameron 			13, 14, 15, 16, 17, 18, 19,
9228b9af4937SStephen M. Cameron 			HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES};
9229b9af4937SStephen M. Cameron 	BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16);
9230b9af4937SStephen M. Cameron 	BUILD_BUG_ON(ARRAY_SIZE(bft) != 8);
9231b9af4937SStephen M. Cameron 	BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) >
9232b9af4937SStephen M. Cameron 				 16 * MIN_IOACCEL2_BFT_ENTRY);
9233b9af4937SStephen M. Cameron 	BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16);
9234d66ae08bSStephen M. Cameron 	BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
9235303932fdSDon Brace 	/*  5 = 1 s/g entry or 4k
9236303932fdSDon Brace 	 *  6 = 2 s/g entry or 8k
9237303932fdSDon Brace 	 *  8 = 4 s/g entry or 16k
9238303932fdSDon Brace 	 * 10 = 6 s/g entry or 24k
9239303932fdSDon Brace 	 */
9240303932fdSDon Brace 
9241b3a52e79SStephen M. Cameron 	/* If the controller supports either ioaccel method then
9242b3a52e79SStephen M. Cameron 	 * we can also use the RAID stack submit path that does not
9243b3a52e79SStephen M. Cameron 	 * perform the superfluous readl() after each command submission.
9244b3a52e79SStephen M. Cameron 	 */
9245b3a52e79SStephen M. Cameron 	if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2))
9246b3a52e79SStephen M. Cameron 		access = SA5_performant_access_no_read;
9247b3a52e79SStephen M. Cameron 
9248303932fdSDon Brace 	/* Controller spec: zero out this buffer. */
9249072b0518SStephen M. Cameron 	for (i = 0; i < h->nreply_queues; i++)
9250072b0518SStephen M. Cameron 		memset(h->reply_queue[i].head, 0, h->reply_queue_size);
9251303932fdSDon Brace 
9252d66ae08bSStephen M. Cameron 	bft[7] = SG_ENTRIES_IN_CMD + 4;
9253d66ae08bSStephen M. Cameron 	calc_bucket_map(bft, ARRAY_SIZE(bft),
9254e1f7de0cSMatt Gates 				SG_ENTRIES_IN_CMD, 4, h->blockFetchTable);
9255303932fdSDon Brace 	for (i = 0; i < 8; i++)
9256303932fdSDon Brace 		writel(bft[i], &h->transtable->BlockFetch[i]);
9257303932fdSDon Brace 
9258303932fdSDon Brace 	/* size of controller ring buffer */
9259303932fdSDon Brace 	writel(h->max_commands, &h->transtable->RepQSize);
9260254f796bSMatt Gates 	writel(h->nreply_queues, &h->transtable->RepQCount);
9261303932fdSDon Brace 	writel(0, &h->transtable->RepQCtrAddrLow32);
9262303932fdSDon Brace 	writel(0, &h->transtable->RepQCtrAddrHigh32);
9263254f796bSMatt Gates 
9264254f796bSMatt Gates 	for (i = 0; i < h->nreply_queues; i++) {
9265254f796bSMatt Gates 		writel(0, &h->transtable->RepQAddr[i].upper);
9266072b0518SStephen M. Cameron 		writel(h->reply_queue[i].busaddr,
9267254f796bSMatt Gates 			&h->transtable->RepQAddr[i].lower);
9268254f796bSMatt Gates 	}
9269254f796bSMatt Gates 
9270b9af4937SStephen M. Cameron 	writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
9271e1f7de0cSMatt Gates 	writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest));
9272e1f7de0cSMatt Gates 	/*
9273e1f7de0cSMatt Gates 	 * enable outbound interrupt coalescing in accelerator mode;
9274e1f7de0cSMatt Gates 	 */
9275e1f7de0cSMatt Gates 	if (trans_support & CFGTBL_Trans_io_accel1) {
9276e1f7de0cSMatt Gates 		access = SA5_ioaccel_mode1_access;
9277e1f7de0cSMatt Gates 		writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
9278e1f7de0cSMatt Gates 		writel(4, &h->cfgtable->HostWrite.CoalIntCount);
9279c349775eSScott Teel 	} else {
9280c349775eSScott Teel 		if (trans_support & CFGTBL_Trans_io_accel2) {
9281c349775eSScott Teel 			access = SA5_ioaccel_mode2_access;
9282c349775eSScott Teel 			writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
9283c349775eSScott Teel 			writel(4, &h->cfgtable->HostWrite.CoalIntCount);
9284c349775eSScott Teel 		}
9285e1f7de0cSMatt Gates 	}
9286303932fdSDon Brace 	writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
9287c706a795SRobert Elliott 	if (hpsa_wait_for_mode_change_ack(h)) {
9288c706a795SRobert Elliott 		dev_err(&h->pdev->dev,
9289c706a795SRobert Elliott 			"performant mode problem - doorbell timeout\n");
9290c706a795SRobert Elliott 		return -ENODEV;
9291c706a795SRobert Elliott 	}
9292303932fdSDon Brace 	register_value = readl(&(h->cfgtable->TransportActive));
9293303932fdSDon Brace 	if (!(register_value & CFGTBL_Trans_Performant)) {
9294050f7147SStephen Cameron 		dev_err(&h->pdev->dev,
9295050f7147SStephen Cameron 			"performant mode problem - transport not active\n");
9296c706a795SRobert Elliott 		return -ENODEV;
9297303932fdSDon Brace 	}
9298960a30e7SStephen M. Cameron 	/* Change the access methods to the performant access methods */
9299e1f7de0cSMatt Gates 	h->access = access;
9300e1f7de0cSMatt Gates 	h->transMethod = transMethod;
9301e1f7de0cSMatt Gates 
9302b9af4937SStephen M. Cameron 	if (!((trans_support & CFGTBL_Trans_io_accel1) ||
9303b9af4937SStephen M. Cameron 		(trans_support & CFGTBL_Trans_io_accel2)))
9304c706a795SRobert Elliott 		return 0;
9305e1f7de0cSMatt Gates 
9306b9af4937SStephen M. Cameron 	if (trans_support & CFGTBL_Trans_io_accel1) {
9307e1f7de0cSMatt Gates 		/* Set up I/O accelerator mode */
9308e1f7de0cSMatt Gates 		for (i = 0; i < h->nreply_queues; i++) {
9309e1f7de0cSMatt Gates 			writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX);
9310e1f7de0cSMatt Gates 			h->reply_queue[i].current_entry =
9311e1f7de0cSMatt Gates 				readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX);
9312e1f7de0cSMatt Gates 		}
9313283b4a9bSStephen M. Cameron 		bft[7] = h->ioaccel_maxsg + 8;
9314283b4a9bSStephen M. Cameron 		calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8,
9315e1f7de0cSMatt Gates 				h->ioaccel1_blockFetchTable);
9316e1f7de0cSMatt Gates 
9317e1f7de0cSMatt Gates 		/* initialize all reply queue entries to unused */
9318072b0518SStephen M. Cameron 		for (i = 0; i < h->nreply_queues; i++)
9319072b0518SStephen M. Cameron 			memset(h->reply_queue[i].head,
9320072b0518SStephen M. Cameron 				(u8) IOACCEL_MODE1_REPLY_UNUSED,
9321072b0518SStephen M. Cameron 				h->reply_queue_size);
9322e1f7de0cSMatt Gates 
9323e1f7de0cSMatt Gates 		/* set all the constant fields in the accelerator command
9324e1f7de0cSMatt Gates 		 * frames once at init time to save CPU cycles later.
9325e1f7de0cSMatt Gates 		 */
9326e1f7de0cSMatt Gates 		for (i = 0; i < h->nr_cmds; i++) {
9327e1f7de0cSMatt Gates 			struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i];
9328e1f7de0cSMatt Gates 
9329e1f7de0cSMatt Gates 			cp->function = IOACCEL1_FUNCTION_SCSIIO;
9330e1f7de0cSMatt Gates 			cp->err_info = (u32) (h->errinfo_pool_dhandle +
9331e1f7de0cSMatt Gates 					(i * sizeof(struct ErrorInfo)));
9332e1f7de0cSMatt Gates 			cp->err_info_len = sizeof(struct ErrorInfo);
9333e1f7de0cSMatt Gates 			cp->sgl_offset = IOACCEL1_SGLOFFSET;
93342b08b3e9SDon Brace 			cp->host_context_flags =
93352b08b3e9SDon Brace 				cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT);
9336e1f7de0cSMatt Gates 			cp->timeout_sec = 0;
9337e1f7de0cSMatt Gates 			cp->ReplyQueue = 0;
933850a0decfSStephen M. Cameron 			cp->tag =
9339f2405db8SDon Brace 				cpu_to_le64((i << DIRECT_LOOKUP_SHIFT));
934050a0decfSStephen M. Cameron 			cp->host_addr =
934150a0decfSStephen M. Cameron 				cpu_to_le64(h->ioaccel_cmd_pool_dhandle +
9342e1f7de0cSMatt Gates 					(i * sizeof(struct io_accel1_cmd)));
9343e1f7de0cSMatt Gates 		}
9344b9af4937SStephen M. Cameron 	} else if (trans_support & CFGTBL_Trans_io_accel2) {
9345b9af4937SStephen M. Cameron 		u64 cfg_offset, cfg_base_addr_index;
9346b9af4937SStephen M. Cameron 		u32 bft2_offset, cfg_base_addr;
9347b9af4937SStephen M. Cameron 		int rc;
9348b9af4937SStephen M. Cameron 
9349b9af4937SStephen M. Cameron 		rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
9350b9af4937SStephen M. Cameron 			&cfg_base_addr_index, &cfg_offset);
9351b9af4937SStephen M. Cameron 		BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64);
9352b9af4937SStephen M. Cameron 		bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ;
9353b9af4937SStephen M. Cameron 		calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg,
9354b9af4937SStephen M. Cameron 				4, h->ioaccel2_blockFetchTable);
9355b9af4937SStephen M. Cameron 		bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset);
9356b9af4937SStephen M. Cameron 		BUILD_BUG_ON(offsetof(struct CfgTable,
9357b9af4937SStephen M. Cameron 				io_accel_request_size_offset) != 0xb8);
9358b9af4937SStephen M. Cameron 		h->ioaccel2_bft2_regs =
9359b9af4937SStephen M. Cameron 			remap_pci_mem(pci_resource_start(h->pdev,
9360b9af4937SStephen M. Cameron 					cfg_base_addr_index) +
9361b9af4937SStephen M. Cameron 					cfg_offset + bft2_offset,
9362b9af4937SStephen M. Cameron 					ARRAY_SIZE(bft2) *
9363b9af4937SStephen M. Cameron 					sizeof(*h->ioaccel2_bft2_regs));
9364b9af4937SStephen M. Cameron 		for (i = 0; i < ARRAY_SIZE(bft2); i++)
9365b9af4937SStephen M. Cameron 			writel(bft2[i], &h->ioaccel2_bft2_regs[i]);
9366b9af4937SStephen M. Cameron 	}
9367b9af4937SStephen M. Cameron 	writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
9368c706a795SRobert Elliott 	if (hpsa_wait_for_mode_change_ack(h)) {
9369c706a795SRobert Elliott 		dev_err(&h->pdev->dev,
9370c706a795SRobert Elliott 			"performant mode problem - enabling ioaccel mode\n");
9371c706a795SRobert Elliott 		return -ENODEV;
9372c706a795SRobert Elliott 	}
9373c706a795SRobert Elliott 	return 0;
9374e1f7de0cSMatt Gates }
9375e1f7de0cSMatt Gates 
93761fb7c98aSRobert Elliott /* Free ioaccel1 mode command blocks and block fetch table */
93771fb7c98aSRobert Elliott static void hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info *h)
93781fb7c98aSRobert Elliott {
9379105a3dbcSRobert Elliott 	if (h->ioaccel_cmd_pool) {
93801fb7c98aSRobert Elliott 		pci_free_consistent(h->pdev,
93811fb7c98aSRobert Elliott 			h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
93821fb7c98aSRobert Elliott 			h->ioaccel_cmd_pool,
93831fb7c98aSRobert Elliott 			h->ioaccel_cmd_pool_dhandle);
9384105a3dbcSRobert Elliott 		h->ioaccel_cmd_pool = NULL;
9385105a3dbcSRobert Elliott 		h->ioaccel_cmd_pool_dhandle = 0;
9386105a3dbcSRobert Elliott 	}
93871fb7c98aSRobert Elliott 	kfree(h->ioaccel1_blockFetchTable);
9388105a3dbcSRobert Elliott 	h->ioaccel1_blockFetchTable = NULL;
93891fb7c98aSRobert Elliott }
93901fb7c98aSRobert Elliott 
9391d37ffbe4SRobert Elliott /* Allocate ioaccel1 mode command blocks and block fetch table */
9392d37ffbe4SRobert Elliott static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h)
9393e1f7de0cSMatt Gates {
9394283b4a9bSStephen M. Cameron 	h->ioaccel_maxsg =
9395283b4a9bSStephen M. Cameron 		readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
9396283b4a9bSStephen M. Cameron 	if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES)
9397283b4a9bSStephen M. Cameron 		h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES;
9398283b4a9bSStephen M. Cameron 
9399e1f7de0cSMatt Gates 	/* Command structures must be aligned on a 128-byte boundary
9400e1f7de0cSMatt Gates 	 * because the 7 lower bits of the address are used by the
9401e1f7de0cSMatt Gates 	 * hardware.
9402e1f7de0cSMatt Gates 	 */
9403e1f7de0cSMatt Gates 	BUILD_BUG_ON(sizeof(struct io_accel1_cmd) %
9404e1f7de0cSMatt Gates 			IOACCEL1_COMMANDLIST_ALIGNMENT);
9405e1f7de0cSMatt Gates 	h->ioaccel_cmd_pool =
9406e1f7de0cSMatt Gates 		pci_alloc_consistent(h->pdev,
9407e1f7de0cSMatt Gates 			h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
9408e1f7de0cSMatt Gates 			&(h->ioaccel_cmd_pool_dhandle));
9409e1f7de0cSMatt Gates 
9410e1f7de0cSMatt Gates 	h->ioaccel1_blockFetchTable =
9411283b4a9bSStephen M. Cameron 		kmalloc(((h->ioaccel_maxsg + 1) *
9412e1f7de0cSMatt Gates 				sizeof(u32)), GFP_KERNEL);
9413e1f7de0cSMatt Gates 
9414e1f7de0cSMatt Gates 	if ((h->ioaccel_cmd_pool == NULL) ||
9415e1f7de0cSMatt Gates 		(h->ioaccel1_blockFetchTable == NULL))
9416e1f7de0cSMatt Gates 		goto clean_up;
9417e1f7de0cSMatt Gates 
9418e1f7de0cSMatt Gates 	memset(h->ioaccel_cmd_pool, 0,
9419e1f7de0cSMatt Gates 		h->nr_cmds * sizeof(*h->ioaccel_cmd_pool));
9420e1f7de0cSMatt Gates 	return 0;
9421e1f7de0cSMatt Gates 
9422e1f7de0cSMatt Gates clean_up:
94231fb7c98aSRobert Elliott 	hpsa_free_ioaccel1_cmd_and_bft(h);
94242dd02d74SRobert Elliott 	return -ENOMEM;
94256c311b57SStephen M. Cameron }
94266c311b57SStephen M. Cameron 
94271fb7c98aSRobert Elliott /* Free ioaccel2 mode command blocks and block fetch table */
94281fb7c98aSRobert Elliott static void hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info *h)
94291fb7c98aSRobert Elliott {
9430d9a729f3SWebb Scales 	hpsa_free_ioaccel2_sg_chain_blocks(h);
9431d9a729f3SWebb Scales 
9432105a3dbcSRobert Elliott 	if (h->ioaccel2_cmd_pool) {
94331fb7c98aSRobert Elliott 		pci_free_consistent(h->pdev,
94341fb7c98aSRobert Elliott 			h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
94351fb7c98aSRobert Elliott 			h->ioaccel2_cmd_pool,
94361fb7c98aSRobert Elliott 			h->ioaccel2_cmd_pool_dhandle);
9437105a3dbcSRobert Elliott 		h->ioaccel2_cmd_pool = NULL;
9438105a3dbcSRobert Elliott 		h->ioaccel2_cmd_pool_dhandle = 0;
9439105a3dbcSRobert Elliott 	}
94401fb7c98aSRobert Elliott 	kfree(h->ioaccel2_blockFetchTable);
9441105a3dbcSRobert Elliott 	h->ioaccel2_blockFetchTable = NULL;
94421fb7c98aSRobert Elliott }
94431fb7c98aSRobert Elliott 
9444d37ffbe4SRobert Elliott /* Allocate ioaccel2 mode command blocks and block fetch table */
9445d37ffbe4SRobert Elliott static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h)
9446aca9012aSStephen M. Cameron {
9447d9a729f3SWebb Scales 	int rc;
9448d9a729f3SWebb Scales 
9449aca9012aSStephen M. Cameron 	/* Allocate ioaccel2 mode command blocks and block fetch table */
9450aca9012aSStephen M. Cameron 
9451aca9012aSStephen M. Cameron 	h->ioaccel_maxsg =
9452aca9012aSStephen M. Cameron 		readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
9453aca9012aSStephen M. Cameron 	if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES)
9454aca9012aSStephen M. Cameron 		h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES;
9455aca9012aSStephen M. Cameron 
9456aca9012aSStephen M. Cameron 	BUILD_BUG_ON(sizeof(struct io_accel2_cmd) %
9457aca9012aSStephen M. Cameron 			IOACCEL2_COMMANDLIST_ALIGNMENT);
9458aca9012aSStephen M. Cameron 	h->ioaccel2_cmd_pool =
9459aca9012aSStephen M. Cameron 		pci_alloc_consistent(h->pdev,
9460aca9012aSStephen M. Cameron 			h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
9461aca9012aSStephen M. Cameron 			&(h->ioaccel2_cmd_pool_dhandle));
9462aca9012aSStephen M. Cameron 
9463aca9012aSStephen M. Cameron 	h->ioaccel2_blockFetchTable =
9464aca9012aSStephen M. Cameron 		kmalloc(((h->ioaccel_maxsg + 1) *
9465aca9012aSStephen M. Cameron 				sizeof(u32)), GFP_KERNEL);
9466aca9012aSStephen M. Cameron 
9467aca9012aSStephen M. Cameron 	if ((h->ioaccel2_cmd_pool == NULL) ||
9468d9a729f3SWebb Scales 		(h->ioaccel2_blockFetchTable == NULL)) {
9469d9a729f3SWebb Scales 		rc = -ENOMEM;
9470d9a729f3SWebb Scales 		goto clean_up;
9471d9a729f3SWebb Scales 	}
9472d9a729f3SWebb Scales 
9473d9a729f3SWebb Scales 	rc = hpsa_allocate_ioaccel2_sg_chain_blocks(h);
9474d9a729f3SWebb Scales 	if (rc)
9475aca9012aSStephen M. Cameron 		goto clean_up;
9476aca9012aSStephen M. Cameron 
9477aca9012aSStephen M. Cameron 	memset(h->ioaccel2_cmd_pool, 0,
9478aca9012aSStephen M. Cameron 		h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool));
9479aca9012aSStephen M. Cameron 	return 0;
9480aca9012aSStephen M. Cameron 
9481aca9012aSStephen M. Cameron clean_up:
94821fb7c98aSRobert Elliott 	hpsa_free_ioaccel2_cmd_and_bft(h);
9483d9a729f3SWebb Scales 	return rc;
9484aca9012aSStephen M. Cameron }
9485aca9012aSStephen M. Cameron 
9486105a3dbcSRobert Elliott /* Free items allocated by hpsa_put_ctlr_into_performant_mode */
9487105a3dbcSRobert Elliott static void hpsa_free_performant_mode(struct ctlr_info *h)
9488105a3dbcSRobert Elliott {
9489105a3dbcSRobert Elliott 	kfree(h->blockFetchTable);
9490105a3dbcSRobert Elliott 	h->blockFetchTable = NULL;
9491105a3dbcSRobert Elliott 	hpsa_free_reply_queues(h);
9492105a3dbcSRobert Elliott 	hpsa_free_ioaccel1_cmd_and_bft(h);
9493105a3dbcSRobert Elliott 	hpsa_free_ioaccel2_cmd_and_bft(h);
9494105a3dbcSRobert Elliott }
9495105a3dbcSRobert Elliott 
9496105a3dbcSRobert Elliott /* return -ENODEV on error, 0 on success (or no action)
9497105a3dbcSRobert Elliott  * allocates numerous items that must be freed later
9498105a3dbcSRobert Elliott  */
9499105a3dbcSRobert Elliott static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
95006c311b57SStephen M. Cameron {
95016c311b57SStephen M. Cameron 	u32 trans_support;
9502e1f7de0cSMatt Gates 	unsigned long transMethod = CFGTBL_Trans_Performant |
9503e1f7de0cSMatt Gates 					CFGTBL_Trans_use_short_tags;
9504105a3dbcSRobert Elliott 	int i, rc;
95056c311b57SStephen M. Cameron 
950602ec19c8SStephen M. Cameron 	if (hpsa_simple_mode)
9507105a3dbcSRobert Elliott 		return 0;
950802ec19c8SStephen M. Cameron 
950967c99a72Sscameron@beardog.cce.hp.com 	trans_support = readl(&(h->cfgtable->TransportSupport));
951067c99a72Sscameron@beardog.cce.hp.com 	if (!(trans_support & PERFORMANT_MODE))
9511105a3dbcSRobert Elliott 		return 0;
951267c99a72Sscameron@beardog.cce.hp.com 
9513e1f7de0cSMatt Gates 	/* Check for I/O accelerator mode support */
9514e1f7de0cSMatt Gates 	if (trans_support & CFGTBL_Trans_io_accel1) {
9515e1f7de0cSMatt Gates 		transMethod |= CFGTBL_Trans_io_accel1 |
9516e1f7de0cSMatt Gates 				CFGTBL_Trans_enable_directed_msix;
9517105a3dbcSRobert Elliott 		rc = hpsa_alloc_ioaccel1_cmd_and_bft(h);
9518105a3dbcSRobert Elliott 		if (rc)
9519105a3dbcSRobert Elliott 			return rc;
9520105a3dbcSRobert Elliott 	} else if (trans_support & CFGTBL_Trans_io_accel2) {
9521aca9012aSStephen M. Cameron 		transMethod |= CFGTBL_Trans_io_accel2 |
9522aca9012aSStephen M. Cameron 				CFGTBL_Trans_enable_directed_msix;
9523105a3dbcSRobert Elliott 		rc = hpsa_alloc_ioaccel2_cmd_and_bft(h);
9524105a3dbcSRobert Elliott 		if (rc)
9525105a3dbcSRobert Elliott 			return rc;
9526e1f7de0cSMatt Gates 	}
9527e1f7de0cSMatt Gates 
9528eee0f03aSHannes Reinecke 	h->nreply_queues = h->msix_vector > 0 ? h->msix_vector : 1;
9529cba3d38bSStephen M. Cameron 	hpsa_get_max_perf_mode_cmds(h);
95306c311b57SStephen M. Cameron 	/* Performant mode ring buffer and supporting data structures */
9531072b0518SStephen M. Cameron 	h->reply_queue_size = h->max_commands * sizeof(u64);
95326c311b57SStephen M. Cameron 
9533254f796bSMatt Gates 	for (i = 0; i < h->nreply_queues; i++) {
9534072b0518SStephen M. Cameron 		h->reply_queue[i].head = pci_alloc_consistent(h->pdev,
9535072b0518SStephen M. Cameron 						h->reply_queue_size,
9536072b0518SStephen M. Cameron 						&(h->reply_queue[i].busaddr));
9537105a3dbcSRobert Elliott 		if (!h->reply_queue[i].head) {
9538105a3dbcSRobert Elliott 			rc = -ENOMEM;
9539105a3dbcSRobert Elliott 			goto clean1;	/* rq, ioaccel */
9540105a3dbcSRobert Elliott 		}
9541254f796bSMatt Gates 		h->reply_queue[i].size = h->max_commands;
9542254f796bSMatt Gates 		h->reply_queue[i].wraparound = 1;  /* spec: init to 1 */
9543254f796bSMatt Gates 		h->reply_queue[i].current_entry = 0;
9544254f796bSMatt Gates 	}
9545254f796bSMatt Gates 
95466c311b57SStephen M. Cameron 	/* Need a block fetch table for performant mode */
9547d66ae08bSStephen M. Cameron 	h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
95486c311b57SStephen M. Cameron 				sizeof(u32)), GFP_KERNEL);
9549105a3dbcSRobert Elliott 	if (!h->blockFetchTable) {
9550105a3dbcSRobert Elliott 		rc = -ENOMEM;
9551105a3dbcSRobert Elliott 		goto clean1;	/* rq, ioaccel */
9552105a3dbcSRobert Elliott 	}
95536c311b57SStephen M. Cameron 
9554105a3dbcSRobert Elliott 	rc = hpsa_enter_performant_mode(h, trans_support);
9555105a3dbcSRobert Elliott 	if (rc)
9556105a3dbcSRobert Elliott 		goto clean2;	/* bft, rq, ioaccel */
9557105a3dbcSRobert Elliott 	return 0;
9558303932fdSDon Brace 
9559105a3dbcSRobert Elliott clean2:	/* bft, rq, ioaccel */
9560303932fdSDon Brace 	kfree(h->blockFetchTable);
9561105a3dbcSRobert Elliott 	h->blockFetchTable = NULL;
9562105a3dbcSRobert Elliott clean1:	/* rq, ioaccel */
9563105a3dbcSRobert Elliott 	hpsa_free_reply_queues(h);
9564105a3dbcSRobert Elliott 	hpsa_free_ioaccel1_cmd_and_bft(h);
9565105a3dbcSRobert Elliott 	hpsa_free_ioaccel2_cmd_and_bft(h);
9566105a3dbcSRobert Elliott 	return rc;
9567303932fdSDon Brace }
9568303932fdSDon Brace 
956923100dd9SStephen M. Cameron static int is_accelerated_cmd(struct CommandList *c)
957076438d08SStephen M. Cameron {
957123100dd9SStephen M. Cameron 	return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2;
957223100dd9SStephen M. Cameron }
957323100dd9SStephen M. Cameron 
957423100dd9SStephen M. Cameron static void hpsa_drain_accel_commands(struct ctlr_info *h)
957523100dd9SStephen M. Cameron {
957623100dd9SStephen M. Cameron 	struct CommandList *c = NULL;
9577f2405db8SDon Brace 	int i, accel_cmds_out;
9578281a7fd0SWebb Scales 	int refcount;
957976438d08SStephen M. Cameron 
9580f2405db8SDon Brace 	do { /* wait for all outstanding ioaccel commands to drain out */
958123100dd9SStephen M. Cameron 		accel_cmds_out = 0;
9582f2405db8SDon Brace 		for (i = 0; i < h->nr_cmds; i++) {
9583f2405db8SDon Brace 			c = h->cmd_pool + i;
9584281a7fd0SWebb Scales 			refcount = atomic_inc_return(&c->refcount);
9585281a7fd0SWebb Scales 			if (refcount > 1) /* Command is allocated */
958623100dd9SStephen M. Cameron 				accel_cmds_out += is_accelerated_cmd(c);
9587281a7fd0SWebb Scales 			cmd_free(h, c);
9588f2405db8SDon Brace 		}
958923100dd9SStephen M. Cameron 		if (accel_cmds_out <= 0)
959076438d08SStephen M. Cameron 			break;
959176438d08SStephen M. Cameron 		msleep(100);
959276438d08SStephen M. Cameron 	} while (1);
959376438d08SStephen M. Cameron }
959476438d08SStephen M. Cameron 
9595d04e62b9SKevin Barnett static struct hpsa_sas_phy *hpsa_alloc_sas_phy(
9596d04e62b9SKevin Barnett 				struct hpsa_sas_port *hpsa_sas_port)
9597d04e62b9SKevin Barnett {
9598d04e62b9SKevin Barnett 	struct hpsa_sas_phy *hpsa_sas_phy;
9599d04e62b9SKevin Barnett 	struct sas_phy *phy;
9600d04e62b9SKevin Barnett 
9601d04e62b9SKevin Barnett 	hpsa_sas_phy = kzalloc(sizeof(*hpsa_sas_phy), GFP_KERNEL);
9602d04e62b9SKevin Barnett 	if (!hpsa_sas_phy)
9603d04e62b9SKevin Barnett 		return NULL;
9604d04e62b9SKevin Barnett 
9605d04e62b9SKevin Barnett 	phy = sas_phy_alloc(hpsa_sas_port->parent_node->parent_dev,
9606d04e62b9SKevin Barnett 		hpsa_sas_port->next_phy_index);
9607d04e62b9SKevin Barnett 	if (!phy) {
9608d04e62b9SKevin Barnett 		kfree(hpsa_sas_phy);
9609d04e62b9SKevin Barnett 		return NULL;
9610d04e62b9SKevin Barnett 	}
9611d04e62b9SKevin Barnett 
9612d04e62b9SKevin Barnett 	hpsa_sas_port->next_phy_index++;
9613d04e62b9SKevin Barnett 	hpsa_sas_phy->phy = phy;
9614d04e62b9SKevin Barnett 	hpsa_sas_phy->parent_port = hpsa_sas_port;
9615d04e62b9SKevin Barnett 
9616d04e62b9SKevin Barnett 	return hpsa_sas_phy;
9617d04e62b9SKevin Barnett }
9618d04e62b9SKevin Barnett 
9619d04e62b9SKevin Barnett static void hpsa_free_sas_phy(struct hpsa_sas_phy *hpsa_sas_phy)
9620d04e62b9SKevin Barnett {
9621d04e62b9SKevin Barnett 	struct sas_phy *phy = hpsa_sas_phy->phy;
9622d04e62b9SKevin Barnett 
9623d04e62b9SKevin Barnett 	sas_port_delete_phy(hpsa_sas_phy->parent_port->port, phy);
9624d04e62b9SKevin Barnett 	sas_phy_free(phy);
9625d04e62b9SKevin Barnett 	if (hpsa_sas_phy->added_to_port)
9626d04e62b9SKevin Barnett 		list_del(&hpsa_sas_phy->phy_list_entry);
9627d04e62b9SKevin Barnett 	kfree(hpsa_sas_phy);
9628d04e62b9SKevin Barnett }
9629d04e62b9SKevin Barnett 
9630d04e62b9SKevin Barnett static int hpsa_sas_port_add_phy(struct hpsa_sas_phy *hpsa_sas_phy)
9631d04e62b9SKevin Barnett {
9632d04e62b9SKevin Barnett 	int rc;
9633d04e62b9SKevin Barnett 	struct hpsa_sas_port *hpsa_sas_port;
9634d04e62b9SKevin Barnett 	struct sas_phy *phy;
9635d04e62b9SKevin Barnett 	struct sas_identify *identify;
9636d04e62b9SKevin Barnett 
9637d04e62b9SKevin Barnett 	hpsa_sas_port = hpsa_sas_phy->parent_port;
9638d04e62b9SKevin Barnett 	phy = hpsa_sas_phy->phy;
9639d04e62b9SKevin Barnett 
9640d04e62b9SKevin Barnett 	identify = &phy->identify;
9641d04e62b9SKevin Barnett 	memset(identify, 0, sizeof(*identify));
9642d04e62b9SKevin Barnett 	identify->sas_address = hpsa_sas_port->sas_address;
9643d04e62b9SKevin Barnett 	identify->device_type = SAS_END_DEVICE;
9644d04e62b9SKevin Barnett 	identify->initiator_port_protocols = SAS_PROTOCOL_STP;
9645d04e62b9SKevin Barnett 	identify->target_port_protocols = SAS_PROTOCOL_STP;
9646d04e62b9SKevin Barnett 	phy->minimum_linkrate_hw = SAS_LINK_RATE_UNKNOWN;
9647d04e62b9SKevin Barnett 	phy->maximum_linkrate_hw = SAS_LINK_RATE_UNKNOWN;
9648d04e62b9SKevin Barnett 	phy->minimum_linkrate = SAS_LINK_RATE_UNKNOWN;
9649d04e62b9SKevin Barnett 	phy->maximum_linkrate = SAS_LINK_RATE_UNKNOWN;
9650d04e62b9SKevin Barnett 	phy->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN;
9651d04e62b9SKevin Barnett 
9652d04e62b9SKevin Barnett 	rc = sas_phy_add(hpsa_sas_phy->phy);
9653d04e62b9SKevin Barnett 	if (rc)
9654d04e62b9SKevin Barnett 		return rc;
9655d04e62b9SKevin Barnett 
9656d04e62b9SKevin Barnett 	sas_port_add_phy(hpsa_sas_port->port, hpsa_sas_phy->phy);
9657d04e62b9SKevin Barnett 	list_add_tail(&hpsa_sas_phy->phy_list_entry,
9658d04e62b9SKevin Barnett 			&hpsa_sas_port->phy_list_head);
9659d04e62b9SKevin Barnett 	hpsa_sas_phy->added_to_port = true;
9660d04e62b9SKevin Barnett 
9661d04e62b9SKevin Barnett 	return 0;
9662d04e62b9SKevin Barnett }
9663d04e62b9SKevin Barnett 
9664d04e62b9SKevin Barnett static int
9665d04e62b9SKevin Barnett 	hpsa_sas_port_add_rphy(struct hpsa_sas_port *hpsa_sas_port,
9666d04e62b9SKevin Barnett 				struct sas_rphy *rphy)
9667d04e62b9SKevin Barnett {
9668d04e62b9SKevin Barnett 	struct sas_identify *identify;
9669d04e62b9SKevin Barnett 
9670d04e62b9SKevin Barnett 	identify = &rphy->identify;
9671d04e62b9SKevin Barnett 	identify->sas_address = hpsa_sas_port->sas_address;
9672d04e62b9SKevin Barnett 	identify->initiator_port_protocols = SAS_PROTOCOL_STP;
9673d04e62b9SKevin Barnett 	identify->target_port_protocols = SAS_PROTOCOL_STP;
9674d04e62b9SKevin Barnett 
9675d04e62b9SKevin Barnett 	return sas_rphy_add(rphy);
9676d04e62b9SKevin Barnett }
9677d04e62b9SKevin Barnett 
9678d04e62b9SKevin Barnett static struct hpsa_sas_port
9679d04e62b9SKevin Barnett 	*hpsa_alloc_sas_port(struct hpsa_sas_node *hpsa_sas_node,
9680d04e62b9SKevin Barnett 				u64 sas_address)
9681d04e62b9SKevin Barnett {
9682d04e62b9SKevin Barnett 	int rc;
9683d04e62b9SKevin Barnett 	struct hpsa_sas_port *hpsa_sas_port;
9684d04e62b9SKevin Barnett 	struct sas_port *port;
9685d04e62b9SKevin Barnett 
9686d04e62b9SKevin Barnett 	hpsa_sas_port = kzalloc(sizeof(*hpsa_sas_port), GFP_KERNEL);
9687d04e62b9SKevin Barnett 	if (!hpsa_sas_port)
9688d04e62b9SKevin Barnett 		return NULL;
9689d04e62b9SKevin Barnett 
9690d04e62b9SKevin Barnett 	INIT_LIST_HEAD(&hpsa_sas_port->phy_list_head);
9691d04e62b9SKevin Barnett 	hpsa_sas_port->parent_node = hpsa_sas_node;
9692d04e62b9SKevin Barnett 
9693d04e62b9SKevin Barnett 	port = sas_port_alloc_num(hpsa_sas_node->parent_dev);
9694d04e62b9SKevin Barnett 	if (!port)
9695d04e62b9SKevin Barnett 		goto free_hpsa_port;
9696d04e62b9SKevin Barnett 
9697d04e62b9SKevin Barnett 	rc = sas_port_add(port);
9698d04e62b9SKevin Barnett 	if (rc)
9699d04e62b9SKevin Barnett 		goto free_sas_port;
9700d04e62b9SKevin Barnett 
9701d04e62b9SKevin Barnett 	hpsa_sas_port->port = port;
9702d04e62b9SKevin Barnett 	hpsa_sas_port->sas_address = sas_address;
9703d04e62b9SKevin Barnett 	list_add_tail(&hpsa_sas_port->port_list_entry,
9704d04e62b9SKevin Barnett 			&hpsa_sas_node->port_list_head);
9705d04e62b9SKevin Barnett 
9706d04e62b9SKevin Barnett 	return hpsa_sas_port;
9707d04e62b9SKevin Barnett 
9708d04e62b9SKevin Barnett free_sas_port:
9709d04e62b9SKevin Barnett 	sas_port_free(port);
9710d04e62b9SKevin Barnett free_hpsa_port:
9711d04e62b9SKevin Barnett 	kfree(hpsa_sas_port);
9712d04e62b9SKevin Barnett 
9713d04e62b9SKevin Barnett 	return NULL;
9714d04e62b9SKevin Barnett }
9715d04e62b9SKevin Barnett 
9716d04e62b9SKevin Barnett static void hpsa_free_sas_port(struct hpsa_sas_port *hpsa_sas_port)
9717d04e62b9SKevin Barnett {
9718d04e62b9SKevin Barnett 	struct hpsa_sas_phy *hpsa_sas_phy;
9719d04e62b9SKevin Barnett 	struct hpsa_sas_phy *next;
9720d04e62b9SKevin Barnett 
9721d04e62b9SKevin Barnett 	list_for_each_entry_safe(hpsa_sas_phy, next,
9722d04e62b9SKevin Barnett 			&hpsa_sas_port->phy_list_head, phy_list_entry)
9723d04e62b9SKevin Barnett 		hpsa_free_sas_phy(hpsa_sas_phy);
9724d04e62b9SKevin Barnett 
9725d04e62b9SKevin Barnett 	sas_port_delete(hpsa_sas_port->port);
9726d04e62b9SKevin Barnett 	list_del(&hpsa_sas_port->port_list_entry);
9727d04e62b9SKevin Barnett 	kfree(hpsa_sas_port);
9728d04e62b9SKevin Barnett }
9729d04e62b9SKevin Barnett 
9730d04e62b9SKevin Barnett static struct hpsa_sas_node *hpsa_alloc_sas_node(struct device *parent_dev)
9731d04e62b9SKevin Barnett {
9732d04e62b9SKevin Barnett 	struct hpsa_sas_node *hpsa_sas_node;
9733d04e62b9SKevin Barnett 
9734d04e62b9SKevin Barnett 	hpsa_sas_node = kzalloc(sizeof(*hpsa_sas_node), GFP_KERNEL);
9735d04e62b9SKevin Barnett 	if (hpsa_sas_node) {
9736d04e62b9SKevin Barnett 		hpsa_sas_node->parent_dev = parent_dev;
9737d04e62b9SKevin Barnett 		INIT_LIST_HEAD(&hpsa_sas_node->port_list_head);
9738d04e62b9SKevin Barnett 	}
9739d04e62b9SKevin Barnett 
9740d04e62b9SKevin Barnett 	return hpsa_sas_node;
9741d04e62b9SKevin Barnett }
9742d04e62b9SKevin Barnett 
9743d04e62b9SKevin Barnett static void hpsa_free_sas_node(struct hpsa_sas_node *hpsa_sas_node)
9744d04e62b9SKevin Barnett {
9745d04e62b9SKevin Barnett 	struct hpsa_sas_port *hpsa_sas_port;
9746d04e62b9SKevin Barnett 	struct hpsa_sas_port *next;
9747d04e62b9SKevin Barnett 
9748d04e62b9SKevin Barnett 	if (!hpsa_sas_node)
9749d04e62b9SKevin Barnett 		return;
9750d04e62b9SKevin Barnett 
9751d04e62b9SKevin Barnett 	list_for_each_entry_safe(hpsa_sas_port, next,
9752d04e62b9SKevin Barnett 			&hpsa_sas_node->port_list_head, port_list_entry)
9753d04e62b9SKevin Barnett 		hpsa_free_sas_port(hpsa_sas_port);
9754d04e62b9SKevin Barnett 
9755d04e62b9SKevin Barnett 	kfree(hpsa_sas_node);
9756d04e62b9SKevin Barnett }
9757d04e62b9SKevin Barnett 
9758d04e62b9SKevin Barnett static struct hpsa_scsi_dev_t
9759d04e62b9SKevin Barnett 	*hpsa_find_device_by_sas_rphy(struct ctlr_info *h,
9760d04e62b9SKevin Barnett 					struct sas_rphy *rphy)
9761d04e62b9SKevin Barnett {
9762d04e62b9SKevin Barnett 	int i;
9763d04e62b9SKevin Barnett 	struct hpsa_scsi_dev_t *device;
9764d04e62b9SKevin Barnett 
9765d04e62b9SKevin Barnett 	for (i = 0; i < h->ndevices; i++) {
9766d04e62b9SKevin Barnett 		device = h->dev[i];
9767d04e62b9SKevin Barnett 		if (!device->sas_port)
9768d04e62b9SKevin Barnett 			continue;
9769d04e62b9SKevin Barnett 		if (device->sas_port->rphy == rphy)
9770d04e62b9SKevin Barnett 			return device;
9771d04e62b9SKevin Barnett 	}
9772d04e62b9SKevin Barnett 
9773d04e62b9SKevin Barnett 	return NULL;
9774d04e62b9SKevin Barnett }
9775d04e62b9SKevin Barnett 
9776d04e62b9SKevin Barnett static int hpsa_add_sas_host(struct ctlr_info *h)
9777d04e62b9SKevin Barnett {
9778d04e62b9SKevin Barnett 	int rc;
9779d04e62b9SKevin Barnett 	struct device *parent_dev;
9780d04e62b9SKevin Barnett 	struct hpsa_sas_node *hpsa_sas_node;
9781d04e62b9SKevin Barnett 	struct hpsa_sas_port *hpsa_sas_port;
9782d04e62b9SKevin Barnett 	struct hpsa_sas_phy *hpsa_sas_phy;
9783d04e62b9SKevin Barnett 
9784d04e62b9SKevin Barnett 	parent_dev = &h->scsi_host->shost_gendev;
9785d04e62b9SKevin Barnett 
9786d04e62b9SKevin Barnett 	hpsa_sas_node = hpsa_alloc_sas_node(parent_dev);
9787d04e62b9SKevin Barnett 	if (!hpsa_sas_node)
9788d04e62b9SKevin Barnett 		return -ENOMEM;
9789d04e62b9SKevin Barnett 
9790d04e62b9SKevin Barnett 	hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, h->sas_address);
9791d04e62b9SKevin Barnett 	if (!hpsa_sas_port) {
9792d04e62b9SKevin Barnett 		rc = -ENODEV;
9793d04e62b9SKevin Barnett 		goto free_sas_node;
9794d04e62b9SKevin Barnett 	}
9795d04e62b9SKevin Barnett 
9796d04e62b9SKevin Barnett 	hpsa_sas_phy = hpsa_alloc_sas_phy(hpsa_sas_port);
9797d04e62b9SKevin Barnett 	if (!hpsa_sas_phy) {
9798d04e62b9SKevin Barnett 		rc = -ENODEV;
9799d04e62b9SKevin Barnett 		goto free_sas_port;
9800d04e62b9SKevin Barnett 	}
9801d04e62b9SKevin Barnett 
9802d04e62b9SKevin Barnett 	rc = hpsa_sas_port_add_phy(hpsa_sas_phy);
9803d04e62b9SKevin Barnett 	if (rc)
9804d04e62b9SKevin Barnett 		goto free_sas_phy;
9805d04e62b9SKevin Barnett 
9806d04e62b9SKevin Barnett 	h->sas_host = hpsa_sas_node;
9807d04e62b9SKevin Barnett 
9808d04e62b9SKevin Barnett 	return 0;
9809d04e62b9SKevin Barnett 
9810d04e62b9SKevin Barnett free_sas_phy:
9811d04e62b9SKevin Barnett 	hpsa_free_sas_phy(hpsa_sas_phy);
9812d04e62b9SKevin Barnett free_sas_port:
9813d04e62b9SKevin Barnett 	hpsa_free_sas_port(hpsa_sas_port);
9814d04e62b9SKevin Barnett free_sas_node:
9815d04e62b9SKevin Barnett 	hpsa_free_sas_node(hpsa_sas_node);
9816d04e62b9SKevin Barnett 
9817d04e62b9SKevin Barnett 	return rc;
9818d04e62b9SKevin Barnett }
9819d04e62b9SKevin Barnett 
9820d04e62b9SKevin Barnett static void hpsa_delete_sas_host(struct ctlr_info *h)
9821d04e62b9SKevin Barnett {
9822d04e62b9SKevin Barnett 	hpsa_free_sas_node(h->sas_host);
9823d04e62b9SKevin Barnett }
9824d04e62b9SKevin Barnett 
9825d04e62b9SKevin Barnett static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node,
9826d04e62b9SKevin Barnett 				struct hpsa_scsi_dev_t *device)
9827d04e62b9SKevin Barnett {
9828d04e62b9SKevin Barnett 	int rc;
9829d04e62b9SKevin Barnett 	struct hpsa_sas_port *hpsa_sas_port;
9830d04e62b9SKevin Barnett 	struct sas_rphy *rphy;
9831d04e62b9SKevin Barnett 
9832d04e62b9SKevin Barnett 	hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, device->sas_address);
9833d04e62b9SKevin Barnett 	if (!hpsa_sas_port)
9834d04e62b9SKevin Barnett 		return -ENOMEM;
9835d04e62b9SKevin Barnett 
9836d04e62b9SKevin Barnett 	rphy = sas_end_device_alloc(hpsa_sas_port->port);
9837d04e62b9SKevin Barnett 	if (!rphy) {
9838d04e62b9SKevin Barnett 		rc = -ENODEV;
9839d04e62b9SKevin Barnett 		goto free_sas_port;
9840d04e62b9SKevin Barnett 	}
9841d04e62b9SKevin Barnett 
9842d04e62b9SKevin Barnett 	hpsa_sas_port->rphy = rphy;
9843d04e62b9SKevin Barnett 	device->sas_port = hpsa_sas_port;
9844d04e62b9SKevin Barnett 
9845d04e62b9SKevin Barnett 	rc = hpsa_sas_port_add_rphy(hpsa_sas_port, rphy);
9846d04e62b9SKevin Barnett 	if (rc)
9847d04e62b9SKevin Barnett 		goto free_sas_port;
9848d04e62b9SKevin Barnett 
9849d04e62b9SKevin Barnett 	return 0;
9850d04e62b9SKevin Barnett 
9851d04e62b9SKevin Barnett free_sas_port:
9852d04e62b9SKevin Barnett 	hpsa_free_sas_port(hpsa_sas_port);
9853d04e62b9SKevin Barnett 	device->sas_port = NULL;
9854d04e62b9SKevin Barnett 
9855d04e62b9SKevin Barnett 	return rc;
9856d04e62b9SKevin Barnett }
9857d04e62b9SKevin Barnett 
9858d04e62b9SKevin Barnett static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device)
9859d04e62b9SKevin Barnett {
9860d04e62b9SKevin Barnett 	if (device->sas_port) {
9861d04e62b9SKevin Barnett 		hpsa_free_sas_port(device->sas_port);
9862d04e62b9SKevin Barnett 		device->sas_port = NULL;
9863d04e62b9SKevin Barnett 	}
9864d04e62b9SKevin Barnett }
9865d04e62b9SKevin Barnett 
9866d04e62b9SKevin Barnett static int
9867d04e62b9SKevin Barnett hpsa_sas_get_linkerrors(struct sas_phy *phy)
9868d04e62b9SKevin Barnett {
9869d04e62b9SKevin Barnett 	return 0;
9870d04e62b9SKevin Barnett }
9871d04e62b9SKevin Barnett 
9872d04e62b9SKevin Barnett static int
9873d04e62b9SKevin Barnett hpsa_sas_get_enclosure_identifier(struct sas_rphy *rphy, u64 *identifier)
9874d04e62b9SKevin Barnett {
9875aa105695SDan Carpenter 	*identifier = 0;
9876d04e62b9SKevin Barnett 	return 0;
9877d04e62b9SKevin Barnett }
9878d04e62b9SKevin Barnett 
9879d04e62b9SKevin Barnett static int
9880d04e62b9SKevin Barnett hpsa_sas_get_bay_identifier(struct sas_rphy *rphy)
9881d04e62b9SKevin Barnett {
9882d04e62b9SKevin Barnett 	return -ENXIO;
9883d04e62b9SKevin Barnett }
9884d04e62b9SKevin Barnett 
9885d04e62b9SKevin Barnett static int
9886d04e62b9SKevin Barnett hpsa_sas_phy_reset(struct sas_phy *phy, int hard_reset)
9887d04e62b9SKevin Barnett {
9888d04e62b9SKevin Barnett 	return 0;
9889d04e62b9SKevin Barnett }
9890d04e62b9SKevin Barnett 
9891d04e62b9SKevin Barnett static int
9892d04e62b9SKevin Barnett hpsa_sas_phy_enable(struct sas_phy *phy, int enable)
9893d04e62b9SKevin Barnett {
9894d04e62b9SKevin Barnett 	return 0;
9895d04e62b9SKevin Barnett }
9896d04e62b9SKevin Barnett 
9897d04e62b9SKevin Barnett static int
9898d04e62b9SKevin Barnett hpsa_sas_phy_setup(struct sas_phy *phy)
9899d04e62b9SKevin Barnett {
9900d04e62b9SKevin Barnett 	return 0;
9901d04e62b9SKevin Barnett }
9902d04e62b9SKevin Barnett 
9903d04e62b9SKevin Barnett static void
9904d04e62b9SKevin Barnett hpsa_sas_phy_release(struct sas_phy *phy)
9905d04e62b9SKevin Barnett {
9906d04e62b9SKevin Barnett }
9907d04e62b9SKevin Barnett 
9908d04e62b9SKevin Barnett static int
9909d04e62b9SKevin Barnett hpsa_sas_phy_speed(struct sas_phy *phy, struct sas_phy_linkrates *rates)
9910d04e62b9SKevin Barnett {
9911d04e62b9SKevin Barnett 	return -EINVAL;
9912d04e62b9SKevin Barnett }
9913d04e62b9SKevin Barnett 
9914d04e62b9SKevin Barnett /* SMP = Serial Management Protocol */
9915d04e62b9SKevin Barnett static int
9916d04e62b9SKevin Barnett hpsa_sas_smp_handler(struct Scsi_Host *shost, struct sas_rphy *rphy,
9917d04e62b9SKevin Barnett struct request *req)
9918d04e62b9SKevin Barnett {
9919d04e62b9SKevin Barnett 	return -EINVAL;
9920d04e62b9SKevin Barnett }
9921d04e62b9SKevin Barnett 
9922d04e62b9SKevin Barnett static struct sas_function_template hpsa_sas_transport_functions = {
9923d04e62b9SKevin Barnett 	.get_linkerrors = hpsa_sas_get_linkerrors,
9924d04e62b9SKevin Barnett 	.get_enclosure_identifier = hpsa_sas_get_enclosure_identifier,
9925d04e62b9SKevin Barnett 	.get_bay_identifier = hpsa_sas_get_bay_identifier,
9926d04e62b9SKevin Barnett 	.phy_reset = hpsa_sas_phy_reset,
9927d04e62b9SKevin Barnett 	.phy_enable = hpsa_sas_phy_enable,
9928d04e62b9SKevin Barnett 	.phy_setup = hpsa_sas_phy_setup,
9929d04e62b9SKevin Barnett 	.phy_release = hpsa_sas_phy_release,
9930d04e62b9SKevin Barnett 	.set_phy_speed = hpsa_sas_phy_speed,
9931d04e62b9SKevin Barnett 	.smp_handler = hpsa_sas_smp_handler,
9932d04e62b9SKevin Barnett };
9933d04e62b9SKevin Barnett 
9934edd16368SStephen M. Cameron /*
9935edd16368SStephen M. Cameron  *  This is it.  Register the PCI driver information for the cards we control
9936edd16368SStephen M. Cameron  *  the OS will call our registered routines when it finds one of our cards.
9937edd16368SStephen M. Cameron  */
9938edd16368SStephen M. Cameron static int __init hpsa_init(void)
9939edd16368SStephen M. Cameron {
9940d04e62b9SKevin Barnett 	int rc;
9941d04e62b9SKevin Barnett 
9942d04e62b9SKevin Barnett 	hpsa_sas_transport_template =
9943d04e62b9SKevin Barnett 		sas_attach_transport(&hpsa_sas_transport_functions);
9944d04e62b9SKevin Barnett 	if (!hpsa_sas_transport_template)
9945d04e62b9SKevin Barnett 		return -ENODEV;
9946d04e62b9SKevin Barnett 
9947d04e62b9SKevin Barnett 	rc = pci_register_driver(&hpsa_pci_driver);
9948d04e62b9SKevin Barnett 
9949d04e62b9SKevin Barnett 	if (rc)
9950d04e62b9SKevin Barnett 		sas_release_transport(hpsa_sas_transport_template);
9951d04e62b9SKevin Barnett 
9952d04e62b9SKevin Barnett 	return rc;
9953edd16368SStephen M. Cameron }
9954edd16368SStephen M. Cameron 
9955edd16368SStephen M. Cameron static void __exit hpsa_cleanup(void)
9956edd16368SStephen M. Cameron {
9957edd16368SStephen M. Cameron 	pci_unregister_driver(&hpsa_pci_driver);
9958d04e62b9SKevin Barnett 	sas_release_transport(hpsa_sas_transport_template);
9959edd16368SStephen M. Cameron }
9960edd16368SStephen M. Cameron 
9961e1f7de0cSMatt Gates static void __attribute__((unused)) verify_offsets(void)
9962e1f7de0cSMatt Gates {
9963e1f7de0cSMatt Gates #define VERIFY_OFFSET(member, offset) \
9964dd0e19f3SScott Teel 	BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset)
9965dd0e19f3SScott Teel 
9966dd0e19f3SScott Teel 	VERIFY_OFFSET(structure_size, 0);
9967dd0e19f3SScott Teel 	VERIFY_OFFSET(volume_blk_size, 4);
9968dd0e19f3SScott Teel 	VERIFY_OFFSET(volume_blk_cnt, 8);
9969dd0e19f3SScott Teel 	VERIFY_OFFSET(phys_blk_shift, 16);
9970dd0e19f3SScott Teel 	VERIFY_OFFSET(parity_rotation_shift, 17);
9971dd0e19f3SScott Teel 	VERIFY_OFFSET(strip_size, 18);
9972dd0e19f3SScott Teel 	VERIFY_OFFSET(disk_starting_blk, 20);
9973dd0e19f3SScott Teel 	VERIFY_OFFSET(disk_blk_cnt, 28);
9974dd0e19f3SScott Teel 	VERIFY_OFFSET(data_disks_per_row, 36);
9975dd0e19f3SScott Teel 	VERIFY_OFFSET(metadata_disks_per_row, 38);
9976dd0e19f3SScott Teel 	VERIFY_OFFSET(row_cnt, 40);
9977dd0e19f3SScott Teel 	VERIFY_OFFSET(layout_map_count, 42);
9978dd0e19f3SScott Teel 	VERIFY_OFFSET(flags, 44);
9979dd0e19f3SScott Teel 	VERIFY_OFFSET(dekindex, 46);
9980dd0e19f3SScott Teel 	/* VERIFY_OFFSET(reserved, 48 */
9981dd0e19f3SScott Teel 	VERIFY_OFFSET(data, 64);
9982dd0e19f3SScott Teel 
9983dd0e19f3SScott Teel #undef VERIFY_OFFSET
9984dd0e19f3SScott Teel 
9985dd0e19f3SScott Teel #define VERIFY_OFFSET(member, offset) \
9986b66cc250SMike Miller 	BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset)
9987b66cc250SMike Miller 
9988b66cc250SMike Miller 	VERIFY_OFFSET(IU_type, 0);
9989b66cc250SMike Miller 	VERIFY_OFFSET(direction, 1);
9990b66cc250SMike Miller 	VERIFY_OFFSET(reply_queue, 2);
9991b66cc250SMike Miller 	/* VERIFY_OFFSET(reserved1, 3);  */
9992b66cc250SMike Miller 	VERIFY_OFFSET(scsi_nexus, 4);
9993b66cc250SMike Miller 	VERIFY_OFFSET(Tag, 8);
9994b66cc250SMike Miller 	VERIFY_OFFSET(cdb, 16);
9995b66cc250SMike Miller 	VERIFY_OFFSET(cciss_lun, 32);
9996b66cc250SMike Miller 	VERIFY_OFFSET(data_len, 40);
9997b66cc250SMike Miller 	VERIFY_OFFSET(cmd_priority_task_attr, 44);
9998b66cc250SMike Miller 	VERIFY_OFFSET(sg_count, 45);
9999b66cc250SMike Miller 	/* VERIFY_OFFSET(reserved3 */
10000b66cc250SMike Miller 	VERIFY_OFFSET(err_ptr, 48);
10001b66cc250SMike Miller 	VERIFY_OFFSET(err_len, 56);
10002b66cc250SMike Miller 	/* VERIFY_OFFSET(reserved4  */
10003b66cc250SMike Miller 	VERIFY_OFFSET(sg, 64);
10004b66cc250SMike Miller 
10005b66cc250SMike Miller #undef VERIFY_OFFSET
10006b66cc250SMike Miller 
10007b66cc250SMike Miller #define VERIFY_OFFSET(member, offset) \
10008e1f7de0cSMatt Gates 	BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset)
10009e1f7de0cSMatt Gates 
10010e1f7de0cSMatt Gates 	VERIFY_OFFSET(dev_handle, 0x00);
10011e1f7de0cSMatt Gates 	VERIFY_OFFSET(reserved1, 0x02);
10012e1f7de0cSMatt Gates 	VERIFY_OFFSET(function, 0x03);
10013e1f7de0cSMatt Gates 	VERIFY_OFFSET(reserved2, 0x04);
10014e1f7de0cSMatt Gates 	VERIFY_OFFSET(err_info, 0x0C);
10015e1f7de0cSMatt Gates 	VERIFY_OFFSET(reserved3, 0x10);
10016e1f7de0cSMatt Gates 	VERIFY_OFFSET(err_info_len, 0x12);
10017e1f7de0cSMatt Gates 	VERIFY_OFFSET(reserved4, 0x13);
10018e1f7de0cSMatt Gates 	VERIFY_OFFSET(sgl_offset, 0x14);
10019e1f7de0cSMatt Gates 	VERIFY_OFFSET(reserved5, 0x15);
10020e1f7de0cSMatt Gates 	VERIFY_OFFSET(transfer_len, 0x1C);
10021e1f7de0cSMatt Gates 	VERIFY_OFFSET(reserved6, 0x20);
10022e1f7de0cSMatt Gates 	VERIFY_OFFSET(io_flags, 0x24);
10023e1f7de0cSMatt Gates 	VERIFY_OFFSET(reserved7, 0x26);
10024e1f7de0cSMatt Gates 	VERIFY_OFFSET(LUN, 0x34);
10025e1f7de0cSMatt Gates 	VERIFY_OFFSET(control, 0x3C);
10026e1f7de0cSMatt Gates 	VERIFY_OFFSET(CDB, 0x40);
10027e1f7de0cSMatt Gates 	VERIFY_OFFSET(reserved8, 0x50);
10028e1f7de0cSMatt Gates 	VERIFY_OFFSET(host_context_flags, 0x60);
10029e1f7de0cSMatt Gates 	VERIFY_OFFSET(timeout_sec, 0x62);
10030e1f7de0cSMatt Gates 	VERIFY_OFFSET(ReplyQueue, 0x64);
10031e1f7de0cSMatt Gates 	VERIFY_OFFSET(reserved9, 0x65);
1003250a0decfSStephen M. Cameron 	VERIFY_OFFSET(tag, 0x68);
10033e1f7de0cSMatt Gates 	VERIFY_OFFSET(host_addr, 0x70);
10034e1f7de0cSMatt Gates 	VERIFY_OFFSET(CISS_LUN, 0x78);
10035e1f7de0cSMatt Gates 	VERIFY_OFFSET(SG, 0x78 + 8);
10036e1f7de0cSMatt Gates #undef VERIFY_OFFSET
10037e1f7de0cSMatt Gates }
10038e1f7de0cSMatt Gates 
10039edd16368SStephen M. Cameron module_init(hpsa_init);
10040edd16368SStephen M. Cameron module_exit(hpsa_cleanup);
10041